Transactifying Applications Using an Open Compiler Framework

Once the landing pad has the type info selector, the code branches to the code for the first catch. The catch then checks the value of the type info @@ -249,7 +252,7 @@

@@ -258,7 +261,12 @@ from a landing pad to the first catch. Control may actually flow from the landing pad to clean up code and then to the first catch. Since the required clean up for each invoke in a try may be different (ex., intervening -constructor), there may be several landing pads for a given try.

+constructor), there may be several landing pads for a given try. If cleanups +need to be run, the number zero should be passed as the last +llvm.eh.selector argument. +However for C++ a null i8* must be passed +instead. +

+ +

The semantics of the invoke instruction require that any exception that +unwinds through an invoke call should result in a branch to the invoke's unwind +label. However such a branch will only happen if the +llvm.eh.selector matches. +Thus in order to ensure correct operation, the front-end must only generate +llvm.eh.selector calls that are +guaranteed to always match whatever exception unwinds through the invoke. +For most languages it is enough to pass zero, indicating the presence of +a cleanup, as the last +llvm.eh.selector argument. +However for C++ this is not sufficient, because the C++ personality function +will terminate the program if it detects that unwinding the exception only +results in matches with cleanups. For C++ a null i8* should +be passed as the last +llvm.eh.selector argument instead. +This is interpreted as a catch-all by the C++ personality function, and will +always match. +

+ +

llvm.eh.selector takes a minimum of three arguments. The first argument is the reference to the exception structure. The second argument is a reference to the personality function to be -used for this try catch sequence. Each of the remaining arguments is either a -reference to the type info for a catch statement, or a non-negative integer -followed by that many type info references, representing a -filter. +used for this try catch sequence. Each of the remaining arguments is either a +reference to the type info for a catch statement, +a filter expression, +or the number zero representing a cleanup. The exception is tested against the arguments sequentially from first to last. -The catch all (...) is represented with a null i8*. The result -of the llvm.eh.selector is a positive -number if the exception matched a type info, a negative number if it matched a -filter, and zero if it didn't match anything. If a type info matched then the -returned value is the index of the type info in the exception table.

Abstract:

+ Transactional memory dramatically reduces the complexity of writing concurrent + code. Yet, seamless integration of transactional constructs in application code + typically comes with a significant performance penalty. Recent studies have + shown that compiler support allows producing highly efficient STM-based + applications without putting the hassle on the programmer. So far, STM + integration has been partially implemented in custom, proprietary compiler + infrastructures. In this paper, we propose and evaluate the use of the LLVM + open compiler framework to generate efficient concurrent applications using + word-based STM libraries. Since LLVM uses the GCC compiler suite as front-end, + it can process code written in C or C++ (with partial support for other + languages). We also present a tool that allows ``transactifying'' assembly code + and can complement LLVM for legacy code and libraries. Experiments using a + lightweight C word-based STM library show that LLVM integration performs as + well as hand-optimized calls to the STM library and better than assembly code + instrumentation of the application code. +

Bibtex:

+ @inproceedings { felber2007tanger, + title = {Transactifying Applications using an Open Compiler Framework}, + author = {Pascal Felber and Christof Fetzer and Ulrich M\"uller and + Torvald Riegel and Martin S\"u{\ss}kraut and Heiko Sturzrehm }, + booktitle = {TRANSACT}, + month = {August}, + year = {2007}, + } +

Download:

"Transactifying Applications +Using an Open Compiler Framework"
Pascal Felber, Christof Fetzer, +Ulrich Mueller, Torvald Riegel, Martin Suesskraut, and Heiko Sturzrehm
+TRANSACT 2007, August 2007.

"LLVM 2.0 and Beyond!"
Chris Lattner
From baldrick at free.fr Tue Aug 28 01:36:41 2007 From: baldrick at free.fr (Duncan Sands) Date: Tue, 28 Aug 2007 06:36:41 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r41534 - /llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp Message-ID: <200708280636.l7S6afwb016444@zion.cs.uiuc.edu> Author: baldrick Date: Tue Aug 28 01:36:41 2007 New Revision: 41534 URL: http://llvm.org/viewvc/llvm-project?rev=41534&view=rev Log: Turn off eh codegen because it breaks the x86 darwin build. Modified: llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp Modified: llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp?rev=41534&r1=41533&r2=41534&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp Tue Aug 28 01:36:41 2007 @@ -122,8 +122,9 @@ Args.push_back("--debug-pass=Structure"); if (flag_debug_pass_arguments) Args.push_back("--debug-pass=Arguments"); - if (flag_exceptions) - Args.push_back("--enable-eh"); +// Breaks the x86-darwin build +// if (flag_exceptions) +// Args.push_back("--enable-eh"); // If there are options that should be passed through to the LLVM backend // directly from the command line, do so now. This is mainly for debugging From baldrick at free.fr Tue Aug 28 01:40:16 2007 From: baldrick at free.fr (Duncan Sands) Date: Tue, 28 Aug 2007 06:40:16 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41535 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Message-ID: <200708280640.l7S6eHNo016598@zion.cs.uiuc.edu> Author: baldrick Date: Tue Aug 28 01:40:16 2007 New Revision: 41535 URL: http://llvm.org/viewvc/llvm-project?rev=41535&view=rev Log: Turn off eh codegen because it breaks the x86 darwin build. Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=41535&r1=41534&r2=41535&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Tue Aug 28 01:40:16 2007 @@ -123,8 +123,9 @@ Args.push_back("--debug-pass=Structure"); if (flag_debug_pass_arguments) Args.push_back("--debug-pass=Arguments"); - if (flag_exceptions) - Args.push_back("--enable-eh"); +// Breaks the x86-darwin build +// if (flag_exceptions) +// Args.push_back("--enable-eh"); // If there are options that should be passed through to the LLVM backend // directly from the command line, do so now. This is mainly for debugging From evan.cheng at apple.com Tue Aug 28 03:28:53 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 28 Aug 2007 08:28:53 -0000 Subject: [llvm-commits] [llvm] r41536 - in /llvm/trunk: include/llvm/CodeGen/LiveInterval.h include/llvm/CodeGen/SimpleRegisterCoalescing.h lib/CodeGen/LiveInterval.cpp lib/CodeGen/SimpleRegisterCoalescing.cpp Message-ID: <200708280828.l7S8SspI027995@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 28 03:28:51 2007 New Revision: 41536 URL: http://llvm.org/viewvc/llvm-project?rev=41536&view=rev Log: Recover most of the compile time regression due to recent live interval changes. 1. Eliminate the costly live interval "swapping". 2. Change ValueNumberInfo container from SmallVector to std::vector. The former performs slowly when the vector size is very large. Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h llvm/trunk/lib/CodeGen/LiveInterval.cpp llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveInterval.h?rev=41536&r1=41535&r2=41536&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveInterval.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveInterval.h Tue Aug 28 03:28:51 2007 @@ -99,14 +99,19 @@ VNInfo() : def(~1U), reg(0) {} VNInfo(unsigned d, unsigned r) : def(d), reg(r) {} }; - private: - SmallVector ValueNumberInfo; - public: + typedef std::vector VNInfoList; + VNInfoList ValueNumberInfo; + + public: LiveInterval(unsigned Reg, float Weight) : reg(Reg), preference(0), weight(Weight) { } + ~LiveInterval() { + ValueNumberInfo.clear(); + } + typedef Ranges::iterator iterator; iterator begin() { return ranges.begin(); } iterator end() { return ranges.end(); } @@ -115,6 +120,13 @@ const_iterator begin() const { return ranges.begin(); } const_iterator end() const { return ranges.end(); } + typedef VNInfoList::iterator vni_iterator; + vni_iterator vni_begin() { return ValueNumberInfo.begin(); } + vni_iterator vni_end() { return ValueNumberInfo.end(); } + + typedef VNInfoList::const_iterator const_vni_iterator; + const_vni_iterator vni_begin() const { return ValueNumberInfo.begin(); } + const_vni_iterator vni_end() const { return ValueNumberInfo.end(); } /// advanceTo - Advance the specified iterator to point to the LiveRange /// containing the specified position, or end() if the position is past the @@ -128,17 +140,37 @@ return I; } - void swap(LiveInterval& other) { - std::swap(reg, other.reg); - std::swap(weight, other.weight); - std::swap(ranges, other.ranges); - std::swap(ValueNumberInfo, other.ValueNumberInfo); - } - bool containsOneValue() const { return ValueNumberInfo.size() == 1; } unsigned getNumValNums() const { return ValueNumberInfo.size(); } + /// getValNumInfo - Returns a copy of the specified val#. + /// + inline VNInfo& getValNumInfo(unsigned ValNo) { + return ValueNumberInfo[ValNo]; + } + inline const VNInfo& getValNumInfo(unsigned ValNo) const { + return ValueNumberInfo[ValNo]; + } + + /// copyValNumInfo - Copy the value number info for one value number to + /// another. + void copyValNumInfo(unsigned DstValNo, unsigned SrcValNo) { + VNInfo &vnd = getValNumInfo(DstValNo); + const VNInfo &vns = getValNumInfo(SrcValNo); + vnd.def = vns.def; + vnd.reg = vns.reg; + vnd.kills = vns.kills; + } + void copyValNumInfo(unsigned DstValNo, const LiveInterval &SrcLI, + unsigned SrcValNo) { + VNInfo &vnd = getValNumInfo(DstValNo); + const VNInfo &vns = SrcLI.getValNumInfo(SrcValNo); + vnd.def = vns.def; + vnd.reg = vns.reg; + vnd.kills = vns.kills; + } + /// getNextValue - Create a new value number and return it. MIIdx specifies /// the instruction that defines the value number. unsigned getNextValue(unsigned MIIdx, unsigned SrcReg) { @@ -149,44 +181,38 @@ /// getDefForValNum - Return the machine instruction index that defines the /// specified value number. unsigned getDefForValNum(unsigned ValNo) const { - assert(ValNo < ValueNumberInfo.size()); - return ValueNumberInfo[ValNo].def; + return getValNumInfo(ValNo).def; } /// getSrcRegForValNum - If the machine instruction that defines the /// specified value number is a copy, returns the source register. Otherwise, /// returns zero. unsigned getSrcRegForValNum(unsigned ValNo) const { - assert(ValNo < ValueNumberInfo.size()); - return ValueNumberInfo[ValNo].reg; + return getValNumInfo(ValNo).reg; } /// setDefForValNum - Set the machine instruction index that defines the /// specified value number. void setDefForValNum(unsigned ValNo, unsigned NewDef) { - assert(ValNo < ValueNumberInfo.size()); - ValueNumberInfo[ValNo].def = NewDef; + getValNumInfo(ValNo).def = NewDef; } /// setSrcRegForValNum - Set the source register of the specified value /// number. void setSrcRegForValNum(unsigned ValNo, unsigned NewReg) { - assert(ValNo < ValueNumberInfo.size()); - ValueNumberInfo[ValNo].reg = NewReg; + getValNumInfo(ValNo).reg = NewReg; } /// getKillsForValNum - Return the kill instruction indexes of the specified /// value number. const SmallVector &getKillsForValNum(unsigned ValNo) const { - assert(ValNo < ValueNumberInfo.size()); - return ValueNumberInfo[ValNo].kills; + return getValNumInfo(ValNo).kills; } /// addKillForValNum - Add a kill instruction index to the specified value /// number. void addKillForValNum(unsigned ValNo, unsigned KillIdx) { - assert(ValNo < ValueNumberInfo.size()); - SmallVector &kills = ValueNumberInfo[ValNo].kills; + SmallVector &kills = getValNumInfo(ValNo).kills; if (kills.empty()) { kills.push_back(KillIdx); } else { @@ -213,14 +239,13 @@ /// the specified value number. void addKillsForValNum(unsigned ValNo, const SmallVector &kills) { - addKills(ValueNumberInfo[ValNo], kills); + addKills(getValNumInfo(ValNo), kills); } /// isKillForValNum - Returns true if KillIdx is a kill of the specified /// val#. bool isKillForValNum(unsigned ValNo, unsigned KillIdx) const { - assert(ValNo < ValueNumberInfo.size()); - const SmallVector &kills = ValueNumberInfo[ValNo].kills; + const SmallVector &kills = getValNumInfo(ValNo).kills; SmallVector::const_iterator I = std::lower_bound(kills.begin(), kills.end(), KillIdx); if (I == kills.end()) @@ -244,15 +269,13 @@ /// removeKillForValNum - Remove the specified kill from the list of kills /// of the specified val#. bool removeKillForValNum(unsigned ValNo, unsigned KillIdx) { - assert(ValNo < ValueNumberInfo.size()); - return removeKill(ValueNumberInfo[ValNo], KillIdx); + return removeKill(getValNumInfo(ValNo), KillIdx); } /// removeKillForValNum - Remove all the kills in specified range /// [Start, End] of the specified val#. void removeKillForValNum(unsigned ValNo, unsigned Start, unsigned End) { - assert(ValNo < ValueNumberInfo.size()); - SmallVector &kills = ValueNumberInfo[ValNo].kills; + SmallVector &kills = getValNumInfo(ValNo).kills; SmallVector::iterator I = std::lower_bound(kills.begin(), kills.end(), Start); SmallVector::iterator @@ -278,32 +301,9 @@ bool replaceKillForValNum(unsigned ValNo, unsigned OldKill, unsigned NewKill) { assert(ValNo < ValueNumberInfo.size()); - return replaceKill(ValueNumberInfo[ValNo], OldKill, NewKill); - } - - /// getValNumInfo - Returns a copy of the specified val#. - /// - VNInfo getValNumInfo(unsigned ValNo) const { - assert(ValNo < ValueNumberInfo.size()); - return ValueNumberInfo[ValNo]; + return replaceKill(getValNumInfo(ValNo), OldKill, NewKill); } - /// setValNumInfo - Change the value number info for the specified - /// value number. - void setValNumInfo(unsigned ValNo, const VNInfo &I) { - ValueNumberInfo[ValNo] = I; - } - - /// copyValNumInfo - Copy the value number info for one value number to - /// another. - void copyValNumInfo(unsigned DstValNo, unsigned SrcValNo) { - ValueNumberInfo[DstValNo] = ValueNumberInfo[SrcValNo]; - } - void copyValNumInfo(unsigned DstValNo, const LiveInterval &SrcLI, - unsigned SrcValNo) { - ValueNumberInfo[DstValNo] = SrcLI.ValueNumberInfo[SrcValNo]; - } - /// MergeValueNumberInto - This method is called when two value nubmers /// are found to be equivalent. This eliminates V1, replacing all /// LiveRanges with the V1 value number with the V2 value number. This can Modified: llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h?rev=41536&r1=41535&r2=41536&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h (original) +++ llvm/trunk/include/llvm/CodeGen/SimpleRegisterCoalescing.h Tue Aug 28 03:28:51 2007 @@ -105,7 +105,7 @@ /// physreg, this method always canonicalizes DestInt to be it. The output /// "SrcInt" will not have been modified, so we can use this information /// below to update aliases. - bool JoinIntervals(LiveInterval &LHS, LiveInterval &RHS); + bool JoinIntervals(LiveInterval &LHS, LiveInterval &RHS, bool &Swapped); /// SimpleJoin - Attempt to join the specified interval into this one. The /// caller of this method must guarantee that the RHS only contains a single Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveInterval.cpp?rev=41536&r1=41535&r2=41536&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveInterval.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveInterval.cpp Tue Aug 28 03:28:51 2007 @@ -288,25 +288,12 @@ void LiveInterval::join(LiveInterval &Other, int *LHSValNoAssignments, int *RHSValNoAssignments, SmallVector &NewValueNumberInfo) { - - // Try to do the least amount of work possible. In particular, if there are - // more liverange chunks in the other set than there are in the 'this' set, - // swap sets to merge the fewest chunks in possible. - // - // Also, if one range is a physreg and one is a vreg, we always merge from the - // vreg into the physreg, which leaves the vreg intervals pristine. - if ((Other.ranges.size() > ranges.size() && - MRegisterInfo::isVirtualRegister(reg)) || - MRegisterInfo::isPhysicalRegister(Other.reg)) { - swap(Other); - std::swap(LHSValNoAssignments, RHSValNoAssignments); - } // Determine if any of our live range values are mapped. This is uncommon, so // we want to avoid the interval scan if not. bool MustMapCurValNos = false; for (unsigned i = 0, e = getNumValNums(); i != e; ++i) { - if (ValueNumberInfo[i].def == ~1U) continue; // tombstone value # + if (getDefForValNum(i) == ~1U) continue; // tombstone value # if (i != (unsigned)LHSValNoAssignments[i]) { MustMapCurValNos = true; break; @@ -345,7 +332,9 @@ // Update val# info first. Increasing live ranges may invalidate some kills. ValueNumberInfo.clear(); - ValueNumberInfo.append(NewValueNumberInfo.begin(), NewValueNumberInfo.end()); + for (SmallVector::iterator I = NewValueNumberInfo.begin(), + E = NewValueNumberInfo.end(); I != E; ++I) + ValueNumberInfo.push_back(*I); // Okay, now insert the RHS live ranges into the LHS. iterator InsertPos = begin(); @@ -472,7 +461,7 @@ ValueNumberInfo.pop_back(); } while (ValueNumberInfo.back().def == ~1U); } else { - ValueNumberInfo[V1].def = ~1U; + setDefForValNum(V1, ~1U); } } @@ -511,22 +500,25 @@ // Print value number info. if (getNumValNums()) { OS << " "; - for (unsigned i = 0; i != getNumValNums(); ++i) { - if (i) OS << " "; - OS << i << "@"; - if (ValueNumberInfo[i].def == ~1U) { + unsigned vnum = 0; + for (const_vni_iterator i = vni_begin(), e = vni_end(); i != e; + ++i, ++vnum) { + const VNInfo &vni = *i; + if (vnum) OS << " "; + OS << vnum << "@"; + if (vni.def == ~1U) { OS << "x"; } else { - if (ValueNumberInfo[i].def == ~0U) + if (vni.def == ~0U) OS << "?"; else - OS << ValueNumberInfo[i].def; - unsigned e = ValueNumberInfo[i].kills.size(); - if (e) { + OS << vni.def; + unsigned ee = vni.kills.size(); + if (ee) { OS << "-("; - for (unsigned j = 0; j != e; ++j) { - OS << ValueNumberInfo[i].kills[j]; - if (j != e-1) + for (unsigned j = 0; j != ee; ++j) { + OS << vni.kills[j]; + if (j != ee-1) OS << " "; } OS << ")"; Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=41536&r1=41535&r2=41536&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Tue Aug 28 03:28:51 2007 @@ -309,7 +309,8 @@ // Otherwise, if one of the intervals being joined is a physreg, this method // always canonicalizes DstInt to be it. The output "SrcInt" will not have // been modified, so we can use this information below to update aliases. - if (JoinIntervals(DstInt, SrcInt)) { + bool Swapped = false; + if (JoinIntervals(DstInt, SrcInt, Swapped)) { if (isDead) { // Result of the copy is dead. Propagate this property. if (SrcStart == 0) { @@ -330,8 +331,8 @@ if (isShorten || isDead) { // Shorten the destination live interval. - if (repSrcReg == DstInt.reg) - DstInt.removeRange(RemoveStart, RemoveEnd); + if (Swapped) + SrcInt.removeRange(RemoveStart, RemoveEnd); } } else { // Coalescing failed. @@ -345,9 +346,12 @@ return false; } - bool Swapped = repSrcReg == DstInt.reg; - if (Swapped) + LiveInterval *ResSrcInt = &SrcInt; + LiveInterval *ResDstInt = &DstInt; + if (Swapped) { std::swap(repSrcReg, repDstReg); + std::swap(ResSrcInt, ResDstInt); + } assert(MRegisterInfo::isVirtualRegister(repSrcReg) && "LiveInterval::join didn't work right!"); @@ -356,15 +360,15 @@ // have clobbered values for this range. if (MRegisterInfo::isPhysicalRegister(repDstReg)) { // Unset unnecessary kills. - if (!DstInt.containsOneValue()) { - for (LiveInterval::Ranges::const_iterator I = SrcInt.begin(), - E = SrcInt.end(); I != E; ++I) + if (!ResDstInt->containsOneValue()) { + for (LiveInterval::Ranges::const_iterator I = ResSrcInt->begin(), + E = ResSrcInt->end(); I != E; ++I) unsetRegisterKills(I->start, I->end, repDstReg); } // Update the liveintervals of sub-registers. for (const unsigned *AS = mri_->getSubRegisters(repDstReg); *AS; ++AS) - li_->getInterval(*AS).MergeInClobberRanges(SrcInt); + li_->getInterval(*AS).MergeInClobberRanges(*ResSrcInt); } else { // Merge use info if the destination is a virtual register. LiveVariables::VarInfo& dVI = lv_->getVarInfo(repDstReg); @@ -372,7 +376,7 @@ dVI.NumUses += sVI.NumUses; } - DOUT << "\n\t\tJoined. Result = "; DstInt.print(DOUT, mri_); + DOUT << "\n\t\tJoined. Result = "; ResDstInt->print(DOUT, mri_); DOUT << "\n"; // Remember these liveintervals have been joined. @@ -380,10 +384,6 @@ if (MRegisterInfo::isVirtualRegister(repDstReg)) JoinedLIs.set(repDstReg - MRegisterInfo::FirstVirtualRegister); - // If the intervals were swapped by Join, swap them back so that the register - // mapping (in the r2i map) is correct. - if (Swapped) SrcInt.swap(DstInt); - // repSrcReg is guarateed to be the register whose live interval that is // being merged. li_->removeInterval(repSrcReg); @@ -586,7 +586,8 @@ /// physreg, this method always canonicalizes LHS to be it. The output /// "RHS" will not have been modified, so we can use this information /// below to update aliases. -bool SimpleRegisterCoalescing::JoinIntervals(LiveInterval &LHS, LiveInterval &RHS) { +bool SimpleRegisterCoalescing::JoinIntervals(LiveInterval &LHS, + LiveInterval &RHS, bool &Swapped) { // Compute the final value assignment, assuming that the live ranges can be // coalesced. SmallVector LHSValNoAssignments; @@ -815,8 +816,17 @@ // If we get here, we know that we can coalesce the live ranges. Ask the // intervals to coalesce themselves now. - LHS.join(RHS, &LHSValNoAssignments[0], &RHSValNoAssignments[0], - ValueNumberInfo); + if ((RHS.ranges.size() > LHS.ranges.size() && + MRegisterInfo::isVirtualRegister(LHS.reg)) || + MRegisterInfo::isPhysicalRegister(RHS.reg)) { + RHS.join(LHS, &RHSValNoAssignments[0], &LHSValNoAssignments[0], + ValueNumberInfo); + Swapped = true; + } else { + LHS.join(RHS, &LHSValNoAssignments[0], &RHSValNoAssignments[0], + ValueNumberInfo); + Swapped = false; + } return true; } From espindola at google.com Tue Aug 28 04:45:28 2007 From: espindola at google.com (Rafael Espindola) Date: Tue, 28 Aug 2007 10:45:28 +0100 Subject: [llvm-commits] [llvm] r41489 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGISel.h lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp test/CodeGen/X86/memmove-0.ll test/CodeGen/X86/memmove-1.ll test/CodeGen/X86/memmove-2.ll test/CodeGen/X86/memmov Message-ID: <38a0d8450708280245m2958a27co399b9cd8db2691d5@mail.gmail.com> > I'm not aware of any cases where memmove vs. memcpy matters before > codegen currently. If it were done at the LLVM IR level, would it be > too trivial to be in a pass by itself, or would you want to add it, > along with an addRequired, to some existing pass? Doing it at the LLVM IL would also benefit non-DAG codegens (like the CBE). > Dan > Cheers, -- Rafael Avila de Espindola Google Ireland Ltd. Gordon House Barrow Street Dublin 4 Ireland Registered in Dublin, Ireland Registration Number: 368047 From asl at math.spbu.ru Tue Aug 28 07:24:18 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 28 Aug 2007 12:24:18 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41537 - in /llvm-gcc-4.2/trunk/gcc/config/i386: cygming.h t-cygming t-mingw32 winnt.c Message-ID: <200708281224.l7SCOIXp003002@zion.cs.uiuc.edu> Author: asl Date: Tue Aug 28 07:24:17 2007 New Revision: 41537 URL: http://llvm.org/viewvc/llvm-project?rev=41537&view=rev Log: Unbreak mingw32 build from merge bugs. Modified: llvm-gcc-4.2/trunk/gcc/config/i386/cygming.h llvm-gcc-4.2/trunk/gcc/config/i386/t-cygming llvm-gcc-4.2/trunk/gcc/config/i386/t-mingw32 llvm-gcc-4.2/trunk/gcc/config/i386/winnt.c Modified: llvm-gcc-4.2/trunk/gcc/config/i386/cygming.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/cygming.h?rev=41537&r1=41536&r2=41537&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/cygming.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/cygming.h Tue Aug 28 07:24:17 2007 @@ -389,427 +389,15 @@ #ifndef BUFSIZ # undef FILE #endif -/* Operating system specific defines to be used when targeting GCC for - hosting on Windows32, using a Unix style C library and tools. - Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, - 2004, 2005 - Free Software Foundation, Inc. - -This file is part of GCC. - -GCC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GCC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GCC; see the file COPYING. If not, write to -the Free Software Foundation, 51 Franklin Street, Fifth Floor, -Boston, MA 02110-1301, USA. */ - -#define DBX_DEBUGGING_INFO 1 -#define SDB_DEBUGGING_INFO 1 -#undef PREFERRED_DEBUGGING_TYPE -#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG - -#ifdef HAVE_GAS_PE_SECREL32_RELOC -#define DWARF2_DEBUGGING_INFO 1 - -#undef DBX_REGISTER_NUMBER -#define DBX_REGISTER_NUMBER(n) (write_symbols == DWARF2_DEBUG \ - ? svr4_dbx_register_map[n] \ - : dbx_register_map[n]) - -/* Use section relative relocations for debugging offsets. Unlike - other targets that fake this by putting the section VMA at 0, PE - won't allow it. */ -#define ASM_OUTPUT_DWARF_OFFSET(FILE, SIZE, LABEL, SECTION) \ - do { \ - if (SIZE != 4) \ - abort (); \ - \ - fputs ("\t.secrel32\t", FILE); \ - assemble_name (FILE, LABEL); \ - } while (0) -#endif - -#define TARGET_EXECUTABLE_SUFFIX ".exe" - -#include - -#define MAYBE_UWIN_CPP_BUILTINS() /* Nothing. */ - -#define TARGET_OS_CPP_BUILTINS() \ - do \ - { \ - builtin_define ("_X86_=1"); \ - builtin_assert ("system=winnt"); \ - builtin_define ("__stdcall=__attribute__((__stdcall__))"); \ - builtin_define ("__fastcall=__attribute__((__fastcall__))"); \ - builtin_define ("__cdecl=__attribute__((__cdecl__))"); \ - if (!flag_iso) \ - { \ - builtin_define ("_stdcall=__attribute__((__stdcall__))"); \ - builtin_define ("_fastcall=__attribute__((__fastcall__))"); \ - builtin_define ("_cdecl=__attribute__((__cdecl__))"); \ - } \ - /* Even though linkonce works with static libs, this is needed \ - to compare typeinfo symbols across dll boundaries. */ \ - builtin_define ("__GXX_MERGED_TYPEINFO_NAMES=0"); \ - MAYBE_UWIN_CPP_BUILTINS (); \ - EXTRA_OS_CPP_BUILTINS (); \ - } \ - while (0) - -/* Get tree.c to declare a target-specific specialization of - merge_decl_attributes. */ -#define TARGET_DLLIMPORT_DECL_ATTRIBUTES 1 - -/* This macro defines names of additional specifications to put in the specs - that can be used in various specifications like CC1_SPEC. Its definition - is an initializer with a subgrouping for each command option. - - Each subgrouping contains a string constant, that defines the - specification name, and a string constant that used by the GCC driver - program. - - Do not define this macro if it does not need to do anything. */ - -#undef SUBTARGET_EXTRA_SPECS -#define SUBTARGET_EXTRA_SPECS \ - { "mingw_include_path", DEFAULT_TARGET_MACHINE } - -#undef MATH_LIBRARY -#define MATH_LIBRARY "" - -#define SIZE_TYPE "unsigned int" -#define PTRDIFF_TYPE "int" -#define WCHAR_TYPE_SIZE 16 -#define WCHAR_TYPE "short unsigned int" - - -/* Enable parsing of #pragma pack(push,) and #pragma pack(pop). */ -#define HANDLE_PRAGMA_PACK_PUSH_POP 1 - -union tree_node; -#define TREE union tree_node * - -#define drectve_section() \ - (fprintf (asm_out_file, "\t.section .drectve\n"), \ - in_section = NULL) - -/* Older versions of gas don't handle 'r' as data. - Explicitly set data flag with 'd'. */ -#define READONLY_DATA_SECTION_ASM_OP "\t.section .rdata,\"dr\"" - -/* Don't allow flag_pic to propagate since gas may produce invalid code - otherwise. */ - -#undef SUBTARGET_OVERRIDE_OPTIONS -#define SUBTARGET_OVERRIDE_OPTIONS \ -do { \ - if (flag_pic) \ - { \ - warning (0, "-f%s ignored for target (all code is position independent)",\ - (flag_pic > 1) ? "PIC" : "pic"); \ - flag_pic = 0; \ - } \ -} while (0) \ - -/* Define this macro if references to a symbol must be treated - differently depending on something about the variable or - function named by the symbol (such as what section it is in). - - On i386 running Windows NT, modify the assembler name with a suffix - consisting of an atsign (@) followed by string of digits that represents - the number of bytes of arguments passed to the function, if it has the - attribute STDCALL. - - In addition, we must mark dll symbols specially. Definitions of - dllexport'd objects install some info in the .drectve section. - References to dllimport'd objects are fetched indirectly via - _imp__. If both are declared, dllexport overrides. This is also - needed to implement one-only vtables: they go into their own - section and we need to set DECL_SECTION_NAME so we do that here. - Note that we can be called twice on the same decl. */ - -#undef SUBTARGET_ENCODE_SECTION_INFO -#define SUBTARGET_ENCODE_SECTION_INFO i386_pe_encode_section_info -#undef TARGET_STRIP_NAME_ENCODING -#define TARGET_STRIP_NAME_ENCODING i386_pe_strip_name_encoding_full - -/* Output a reference to a label. */ -#undef ASM_OUTPUT_LABELREF -#define ASM_OUTPUT_LABELREF i386_pe_output_labelref - -#undef COMMON_ASM_OP -#define COMMON_ASM_OP "\t.comm\t" - - /* APPLE LOCAL begin mainline 2005-07-31 */ -#undef COMMON_ASM_OP -#define COMMON_ASM_OP "\t.comm\t" - /* APPLE LOCAL end mainline 2005-07-31 */ - -/* Output a common block. */ -#undef ASM_OUTPUT_COMMON -#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \ -do { \ - if (i386_pe_dllexport_name_p (NAME)) \ - i386_pe_record_exported_symbol (NAME, 1); \ - if (! i386_pe_dllimport_name_p (NAME)) \ - { \ - fprintf ((STREAM), "\t.comm\t"); \ - assemble_name ((STREAM), (NAME)); \ - fprintf ((STREAM), ", %d\t%s %d\n", \ - (int)(ROUNDED), ASM_COMMENT_START, (int)(SIZE)); \ - } \ -} while (0) - -/* Output the label for an initialized variable. */ -#undef ASM_DECLARE_OBJECT_NAME -#define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \ -do { \ - if (i386_pe_dllexport_name_p (NAME)) \ - i386_pe_record_exported_symbol (NAME, 1); \ - ASM_OUTPUT_LABEL ((STREAM), (NAME)); \ -} while (0) - - -/* Emit code to check the stack when allocating more that 4000 - bytes in one go. */ - -#define CHECK_STACK_LIMIT 4000 - -/* By default, target has a 80387, uses IEEE compatible arithmetic, - returns float values in the 387 and needs stack probes. - We also align doubles to 64-bits for MSVC default compatibility. */ - -#undef TARGET_SUBTARGET_DEFAULT -#define TARGET_SUBTARGET_DEFAULT \ - (MASK_80387 | MASK_IEEE_FP | MASK_FLOAT_RETURNS | MASK_STACK_PROBE \ - | MASK_ALIGN_DOUBLE) - -/* This is how to output an assembler line - that says to advance the location counter - to a multiple of 2**LOG bytes. */ - -#undef ASM_OUTPUT_ALIGN -#define ASM_OUTPUT_ALIGN(FILE,LOG) \ - if ((LOG)!=0) fprintf ((FILE), "\t.align %d\n", 1<<(LOG)) - -/* Windows uses explicit import from shared libraries. */ -#define MULTIPLE_SYMBOL_SPACES 1 - -extern void i386_pe_unique_section (TREE, int); -#define TARGET_ASM_UNIQUE_SECTION i386_pe_unique_section -#define TARGET_ASM_FUNCTION_RODATA_SECTION default_no_function_rodata_section - -#define SUPPORTS_ONE_ONLY 1 - -/* Switch into a generic section. */ -#define TARGET_ASM_NAMED_SECTION i386_pe_asm_named_section - -/* Select attributes for named sections. */ -#define TARGET_SECTION_TYPE_FLAGS i386_pe_section_type_flags - -/* Write the extra assembler code needed to declare a function - properly. If we are generating SDB debugging information, this - will happen automatically, so we only need to handle other cases. */ -#undef ASM_DECLARE_FUNCTION_NAME -#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ - do \ - { \ - if (i386_pe_dllexport_name_p (NAME)) \ - i386_pe_record_exported_symbol (NAME, 0); \ - if (write_symbols != SDB_DEBUG) \ - i386_pe_declare_function_type (FILE, NAME, TREE_PUBLIC (DECL)); \ - ASM_OUTPUT_LABEL (FILE, NAME); \ - } \ - while (0) - -/* Add an external function to the list of functions to be declared at - the end of the file. */ -#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \ - do \ - { \ - if (TREE_CODE (DECL) == FUNCTION_DECL) \ - i386_pe_record_external_function ((DECL), (NAME)); \ - } \ - while (0) - -/* Declare the type properly for any external libcall. */ -#define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \ - i386_pe_declare_function_type (FILE, XSTR (FUN, 0), 1) - -/* This says out to put a global symbol in the BSS section. */ -#undef ASM_OUTPUT_ALIGNED_BSS -#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ - asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN)) - -/* Output function declarations at the end of the file. */ -#undef TARGET_ASM_FILE_END -#define TARGET_ASM_FILE_END i386_pe_file_end - -#undef ASM_COMMENT_START -#define ASM_COMMENT_START " #" - -/* DWARF2 Unwinding doesn't work with exception handling yet. To make - it work, we need to build a libgcc_s.dll, and dcrt0.o should be - changed to call __register_frame_info/__deregister_frame_info. */ -#define DWARF2_UNWIND_INFO 0 - -/* Don't assume anything about the header files. */ -#define NO_IMPLICIT_EXTERN_C - -#undef PROFILE_HOOK -#define PROFILE_HOOK(LABEL) \ - if (MAIN_NAME_P (DECL_NAME (current_function_decl))) \ - { \ - emit_call_insn (gen_rtx_CALL (VOIDmode, \ - gen_rtx_MEM (FUNCTION_MODE, \ - gen_rtx_SYMBOL_REF (Pmode, "_monstartup")), \ - const0_rtx)); \ - } - -/* Java Native Interface (JNI) methods on Win32 are invoked using the - stdcall calling convention. */ -#undef MODIFY_JNI_METHOD_CALL -#define MODIFY_JNI_METHOD_CALL(MDECL) \ - build_type_attribute_variant ((MDECL), \ - build_tree_list (get_identifier ("stdcall"), \ - NULL)) - -/* External function declarations. */ - -extern void i386_pe_record_external_function (tree, const char *); -extern void i386_pe_declare_function_type (FILE *, const char *, int); -extern void i386_pe_record_exported_symbol (const char *, int); -extern void i386_pe_file_end (void); -extern int i386_pe_dllexport_name_p (const char *); -extern int i386_pe_dllimport_name_p (const char *); -extern int i386_pe_dllexport_p (tree); -extern int i386_pe_dllimport_p (tree); - -/* For Win32 ABI compatibility */ -#undef DEFAULT_PCC_STRUCT_RETURN -#define DEFAULT_PCC_STRUCT_RETURN 0 - -/* MSVC returns aggregate types of up to 8 bytes via registers. - See i386.c:ix86_return_in_memory. */ -#undef MS_AGGREGATE_RETURN -#define MS_AGGREGATE_RETURN 1 - -/* No data type wants to be aligned rounder than this. */ -#undef BIGGEST_ALIGNMENT -#define BIGGEST_ALIGNMENT 128 - -/* Biggest alignment supported by the object file format of this - machine. Use this macro to limit the alignment which can be - specified using the `__attribute__ ((aligned (N)))' construct. If - not defined, the default value is `BIGGEST_ALIGNMENT'. */ -#undef MAX_OFILE_ALIGNMENT -/* IMAGE_SCN_ALIGN_8192BYTES is the largest section alignment flag - specified in the PECOFF60 spec. Native MS compiler also limits - user-specified alignment to 8192 bytes. */ -#define MAX_OFILE_ALIGNMENT (8192 * 8) - -/* Native complier aligns internal doubles in structures on dword boundaries. */ -#undef BIGGEST_FIELD_ALIGNMENT -#define BIGGEST_FIELD_ALIGNMENT 64 - -/* A bit-field declared as `int' forces `int' alignment for the struct. */ -#undef PCC_BITFIELD_TYPE_MATTERS -#define PCC_BITFIELD_TYPE_MATTERS 1 -#define GROUP_BITFIELDS_BY_ALIGN TYPE_NATIVE(rec) - -/* Enable alias attribute support. */ -#ifndef SET_ASM_OP -#define SET_ASM_OP "\t.set\t" -#endif -/* This implements the `alias' attribute, keeping any stdcall or - fastcall decoration. */ -#undef ASM_OUTPUT_DEF_FROM_DECLS -#define ASM_OUTPUT_DEF_FROM_DECLS(STREAM, DECL, TARGET) \ - do \ - { \ - const char *alias; \ - rtx rtlname = XEXP (DECL_RTL (DECL), 0); \ - if (GET_CODE (rtlname) == SYMBOL_REF) \ - alias = XSTR (rtlname, 0); \ - else \ - abort (); \ - if (TREE_CODE (DECL) == FUNCTION_DECL) \ - i386_pe_declare_function_type (STREAM, alias, \ - TREE_PUBLIC (DECL)); \ - ASM_OUTPUT_DEF (STREAM, alias, IDENTIFIER_POINTER (TARGET)); \ - } while (0) - -/* GNU as supports weak symbols on PECOFF. */ -#ifdef HAVE_GAS_WEAK -#define ASM_WEAKEN_LABEL(FILE, NAME) \ - do \ - { \ - fputs ("\t.weak\t", (FILE)); \ - assemble_name ((FILE), (NAME)); \ - fputc ('\n', (FILE)); \ - } \ - while (0) -#endif /* HAVE_GAS_WEAK */ - -/* FIXME: SUPPORTS_WEAK && TARGET_HAVE_NAMED_SECTIONS is true, - but for .jcr section to work we also need crtbegin and crtend - objects. */ -#define TARGET_USE_JCR_SECTION 0 - -/* Decide whether it is safe to use a local alias for a virtual function - when constructing thunks. */ -#undef TARGET_USE_LOCAL_THUNK_ALIAS_P -#define TARGET_USE_LOCAL_THUNK_ALIAS_P(DECL) (!DECL_ONE_ONLY (DECL)) - -#define SUBTARGET_ATTRIBUTE_TABLE \ - /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */ \ - { "selectany", 0, 0, true, false, false, ix86_handle_selectany_attribute } - -/* mcount() does not need a counter variable. */ -#undef NO_PROFILE_COUNTERS -#define NO_PROFILE_COUNTERS 1 - -#define TARGET_VALID_DLLIMPORT_ATTRIBUTE_P i386_pe_valid_dllimport_attribute_p -#define TARGET_CXX_ADJUST_CLASS_AT_DEFINITION i386_pe_adjust_class_at_definition - - /* APPLE LOCAL begin mainline 2005-10-12 */ -#define TARGET_VALID_DLLIMPORT_ATTRIBUTE_P i386_pe_valid_dllimport_attribute_p -#define TARGET_CXX_ADJUST_CLASS_AT_DEFINITION i386_pe_adjust_class_at_definition - /* APPLE LOCAL end mainline 2005-10-12 */ - - /* APPLE LOCAL begin mainline 2005-06-01 */ -/* mcount() does not need a counter variable. */ -#undef NO_PROFILE_COUNTERS -#define NO_PROFILE_COUNTERS 1 - /* APPLE LOCAL end mainline 2005-06-01 */ - - /* APPLE LOCAL begin mainline 2005-04-01 */ -#define SUBTARGET_ATTRIBUTE_TABLE \ - /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */ \ - { "selectany", 0, 0, true, false, false, ix86_handle_selectany_attribute } - /* APPLE LOCAL end mainline 2005-04-01 */ - -#undef TREE - -#ifndef BUFSIZ -# undef FILE -#endif /* LLVM LOCAL begin */ #ifdef ENABLE_LLVM /* LLVM specific stuff for supporting dllimport & dllexport linkage output */ +extern bool i386_pe_dllimport_p(tree); +extern bool i386_pe_dllexport_p(tree); + #define TARGET_ADJUST_LLVM_LINKAGE(GV, decl) \ { \ if (i386_pe_dllimport_p((decl))) { \ Modified: llvm-gcc-4.2/trunk/gcc/config/i386/t-cygming URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/t-cygming?rev=41537&r1=41536&r2=41537&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/t-cygming (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/t-cygming Tue Aug 28 07:24:17 2007 @@ -30,50 +30,3 @@ $(srcdir)/config/i386/winnt-stubs.c STMP_FIXINC=stmp-fixinc -LIB1ASMSRC = i386/cygwin.asm -LIB1ASMFUNCS = _chkstk - -# cygwin and mingw always have a limits.h, but, depending upon how we are -# doing the build, it may not be installed yet. -LIMITS_H_TEST = true - -# If we are building next to winsup, this will let us find the real -# limits.h when building libgcc2. Otherwise, winsup must be installed -# first. -LIBGCC2_INCLUDES = -I$(srcdir)/../winsup/w32api/include - -winnt.o: $(srcdir)/config/i386/winnt.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ - $(TM_H) $(RTL_H) $(REGS_H) hard-reg-set.h output.h $(TREE_H) flags.h \ - $(TM_P_H) toplev.h $(HASHTAB_H) $(GGC_H) - $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ - $(srcdir)/config/i386/winnt.c - -winnt-cxx.o: $(srcdir)/config/i386/winnt-cxx.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ - $(TM_H) $(RTL_H) $(REGS_H) hard-reg-set.h output.h $(TREE_H) flags.h \ - $(TM_P_H) toplev.h $(HASHTAB_H) $(GGC_H) - $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ - $(srcdir)/config/i386/winnt-cxx.c - - -winnt-stubs.o: $(srcdir)/config/i386/winnt-stubs.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ - $(TM_H) $(RTL_H) $(REGS_H) hard-reg-set.h output.h $(TREE_H) flags.h \ - $(TM_P_H) toplev.h $(HASHTAB_H) $(GGC_H) - $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ - $(srcdir)/config/i386/winnt-stubs.c - - # APPLE LOCAL begin mainline 2005-10-12 -winnt-cxx.o: $(srcdir)/config/i386/winnt-cxx.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ - $(TM_H) $(RTL_H) $(REGS_H) hard-reg-set.h output.h $(TREE_H) flags.h \ - $(TM_P_H) toplev.h $(HASHTAB_H) $(GGC_H) - $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ - $(srcdir)/config/i386/winnt-cxx.c - - -winnt-stubs.o: $(srcdir)/config/i386/winnt-stubs.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ - $(TM_H) $(RTL_H) $(REGS_H) hard-reg-set.h output.h $(TREE_H) flags.h \ - $(TM_P_H) toplev.h $(HASHTAB_H) $(GGC_H) - $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ - $(srcdir)/config/i386/winnt-stubs.c - # APPLE LOCAL end mainline 2005-10-12 - -STMP_FIXINC=stmp-fixinc Modified: llvm-gcc-4.2/trunk/gcc/config/i386/t-mingw32 URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/t-mingw32?rev=41537&r1=41536&r2=41537&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/t-mingw32 (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/t-mingw32 Tue Aug 28 07:24:17 2007 @@ -1,7 +1,3 @@ # Match SYSTEM_INCLUDE_DIR NATIVE_SYSTEM_HEADER_DIR = /mingw/include - # APPLE LOCAL begin mainline 2005-08-02 -# Match SYSTEM_INCLUDE_DIR -NATIVE_SYSTEM_HEADER_DIR = /mingw/include - # APPLE LOCAL end mainline 2005-08-02 Modified: llvm-gcc-4.2/trunk/gcc/config/i386/winnt.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/winnt.c?rev=41537&r1=41536&r2=41537&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/winnt.c (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/winnt.c Tue Aug 28 07:24:17 2007 @@ -48,8 +48,6 @@ static tree associated_type (tree); static tree gen_stdcall_or_fastcall_suffix (tree, bool); -static bool i386_pe_dllexport_p (tree); -static bool i386_pe_dllimport_p (tree); static void i386_pe_mark_dllexport (tree); static void i386_pe_mark_dllimport (tree); @@ -115,7 +113,7 @@ /* Return true if DECL is a dllexport'd object. */ -static bool +bool i386_pe_dllexport_p (tree decl) { if (TREE_CODE (decl) != VAR_DECL @@ -134,7 +132,7 @@ return false; } -static bool +bool i386_pe_dllimport_p (tree decl) { if (TREE_CODE (decl) != VAR_DECL @@ -734,764 +732,3 @@ } #include "gt-winnt.h" -/* Subroutines for insn-output.c for Windows NT. - Contributed by Douglas Rupp (drupp at cs.washington.edu) - Copyright (C) 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, - 2005, 2006 Free Software Foundation, Inc. - -This file is part of GCC. - -GCC is free software; you can redistribute it and/or modify it under -the terms of the GNU General Public License as published by the Free -Software Foundation; either version 2, or (at your option) any later -version. - -GCC is distributed in the hope that it will be useful, but WITHOUT ANY -WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -for more details. - -You should have received a copy of the GNU General Public License -along with GCC; see the file COPYING. If not, write to the Free -Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA -02110-1301, USA. */ - -#include "config.h" -#include "system.h" -#include "coretypes.h" -#include "tm.h" -#include "rtl.h" -#include "regs.h" -#include "hard-reg-set.h" -#include "output.h" -#include "tree.h" -#include "flags.h" -#include "tm_p.h" -#include "toplev.h" -#include "hashtab.h" -#include "ggc.h" - -/* i386/PE specific attribute support. - - i386/PE has two new attributes: - dllexport - for exporting a function/variable that will live in a dll - dllimport - for importing a function/variable from a dll - - Microsoft allows multiple declspecs in one __declspec, separating - them with spaces. We do NOT support this. Instead, use __declspec - multiple times. -*/ - -static tree associated_type (tree); -static tree gen_stdcall_or_fastcall_suffix (tree, bool); -static bool i386_pe_dllexport_p (tree); -static bool i386_pe_dllimport_p (tree); -static void i386_pe_mark_dllexport (tree); -static void i386_pe_mark_dllimport (tree); - -/* This is we how mark internal identifiers with dllimport or dllexport - attributes. */ -#ifndef DLL_IMPORT_PREFIX -#define DLL_IMPORT_PREFIX "#i." -#endif -#ifndef DLL_EXPORT_PREFIX -#define DLL_EXPORT_PREFIX "#e." -#endif - -/* Handle a "shared" attribute; - arguments as in struct attribute_spec.handler. */ -tree -ix86_handle_shared_attribute (tree *node, tree name, - tree args ATTRIBUTE_UNUSED, - int flags ATTRIBUTE_UNUSED, bool *no_add_attrs) -{ - if (TREE_CODE (*node) != VAR_DECL) - { - warning (OPT_Wattributes, "%qs attribute only applies to variables", - IDENTIFIER_POINTER (name)); - *no_add_attrs = true; - } - - return NULL_TREE; -} - -/* Handle a "selectany" attribute; - arguments as in struct attribute_spec.handler. */ -tree -ix86_handle_selectany_attribute (tree *node, tree name, - tree args ATTRIBUTE_UNUSED, - int flags ATTRIBUTE_UNUSED, - bool *no_add_attrs) -{ - /* The attribute applies only to objects that are initialized and have - external linkage. However, we may not know about initialization - until the language frontend has processed the decl. We'll check for - initialization later in encode_section_info. */ - if (TREE_CODE (*node) != VAR_DECL || !TREE_PUBLIC (*node)) - { - error ("%qs attribute applies only to initialized variables" - " with external linkage", IDENTIFIER_POINTER (name)); - *no_add_attrs = true; - } - - return NULL_TREE; -} - - -/* Return the type that we should use to determine if DECL is - imported or exported. */ - -static tree -associated_type (tree decl) -{ - return (DECL_CONTEXT (decl) && TYPE_P (DECL_CONTEXT (decl))) - ? DECL_CONTEXT (decl) : NULL_TREE; -} - - -/* Return true if DECL is a dllexport'd object. */ - -static bool -i386_pe_dllexport_p (tree decl) -{ - if (TREE_CODE (decl) != VAR_DECL - && TREE_CODE (decl) != FUNCTION_DECL) - return false; - - if (lookup_attribute ("dllexport", DECL_ATTRIBUTES (decl))) - return true; - - /* Also mark class members of exported classes with dllexport. */ - if (associated_type (decl) - && lookup_attribute ("dllexport", - TYPE_ATTRIBUTES (associated_type (decl)))) - return i386_pe_type_dllexport_p (decl); - - return false; -} - -static bool -i386_pe_dllimport_p (tree decl) -{ - if (TREE_CODE (decl) != VAR_DECL - && TREE_CODE (decl) != FUNCTION_DECL) - return false; - - /* Lookup the attribute in addition to checking the DECL_DLLIMPORT_P flag. - We may need to override an earlier decision. */ - if (DECL_DLLIMPORT_P (decl) - && lookup_attribute ("dllimport", DECL_ATTRIBUTES (decl))) - { - /* Make a final check to see if this is a definition before we generate - RTL for an indirect reference. */ - if (!DECL_EXTERNAL (decl)) - { - error ("%q+D: definition is marked as dllimport", decl); - DECL_DLLIMPORT_P (decl) = 0; - return false; - } - return true; - } - /* The DECL_DLLIMPORT_P flag was set for decls in the class definition - by targetm.cxx.adjust_class_at_definition. Check again to emit - warnings if the class attribute has been overridden by an - out-of-class definition. */ - else if (associated_type (decl) - && lookup_attribute ("dllimport", - TYPE_ATTRIBUTES (associated_type (decl)))) - return i386_pe_type_dllimport_p (decl); - - return false; -} - -/* Handle the -mno-fun-dllimport target switch. */ -bool -i386_pe_valid_dllimport_attribute_p (tree decl) -{ - if (TARGET_NOP_FUN_DLLIMPORT && TREE_CODE (decl) == FUNCTION_DECL) - return false; - return true; -} - -/* Return nonzero if SYMBOL is marked as being dllexport'd. */ - -int -i386_pe_dllexport_name_p (const char *symbol) -{ - return (strncmp (DLL_EXPORT_PREFIX, symbol, - strlen (DLL_EXPORT_PREFIX)) == 0); -} - -/* Return nonzero if SYMBOL is marked as being dllimport'd. */ - -int -i386_pe_dllimport_name_p (const char *symbol) -{ - return (strncmp (DLL_IMPORT_PREFIX, symbol, - strlen (DLL_IMPORT_PREFIX)) == 0); -} - -/* Mark a DECL as being dllexport'd. - Note that we override the previous setting (e.g.: dllimport). */ - -static void -i386_pe_mark_dllexport (tree decl) -{ - const char *oldname; - char *newname; - rtx rtlname; - rtx symref; - tree idp; - - rtlname = XEXP (DECL_RTL (decl), 0); - if (GET_CODE (rtlname) == MEM) - rtlname = XEXP (rtlname, 0); - gcc_assert (GET_CODE (rtlname) == SYMBOL_REF); - oldname = XSTR (rtlname, 0); - if (i386_pe_dllimport_name_p (oldname)) - { - warning (0, "inconsistent dll linkage for %q+D, dllexport assumed", - decl); - /* Remove DLL_IMPORT_PREFIX. */ - oldname += strlen (DLL_IMPORT_PREFIX); - } - else if (i386_pe_dllexport_name_p (oldname)) - return; /* already done */ - - newname = alloca (strlen (DLL_EXPORT_PREFIX) + strlen (oldname) + 1); - sprintf (newname, "%s%s", DLL_EXPORT_PREFIX, oldname); - - /* We pass newname through get_identifier to ensure it has a unique - address. RTL processing can sometimes peek inside the symbol ref - and compare the string's addresses to see if two symbols are - identical. */ - idp = get_identifier (newname); - - symref = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp)); - SET_SYMBOL_REF_DECL (symref, decl); - XEXP (DECL_RTL (decl), 0) = symref; -} - -/* Mark a DECL as being dllimport'd. */ - -static void -i386_pe_mark_dllimport (tree decl) -{ - const char *oldname; - char *newname; - tree idp; - rtx rtlname, newrtl; - rtx symref; - - rtlname = XEXP (DECL_RTL (decl), 0); - if (GET_CODE (rtlname) == MEM) - rtlname = XEXP (rtlname, 0); - gcc_assert (GET_CODE (rtlname) == SYMBOL_REF); - oldname = XSTR (rtlname, 0); - if (i386_pe_dllexport_name_p (oldname)) - { - error ("%qs declared as both exported to and imported from a DLL", - IDENTIFIER_POINTER (DECL_NAME (decl))); - return; - } - else if (i386_pe_dllimport_name_p (oldname)) - { - /* Already done, but do a sanity check to prevent assembler - errors. */ - gcc_assert (DECL_EXTERNAL (decl) && TREE_PUBLIC (decl) - && DECL_DLLIMPORT_P (decl)); - return; - } - - newname = alloca (strlen (DLL_IMPORT_PREFIX) + strlen (oldname) + 1); - sprintf (newname, "%s%s", DLL_IMPORT_PREFIX, oldname); - - /* We pass newname through get_identifier to ensure it has a unique - address. RTL processing can sometimes peek inside the symbol ref - and compare the string's addresses to see if two symbols are - identical. */ - idp = get_identifier (newname); - - symref = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp)); - SET_SYMBOL_REF_DECL (symref, decl); - newrtl = gen_rtx_MEM (Pmode,symref); - XEXP (DECL_RTL (decl), 0) = newrtl; - - DECL_DLLIMPORT_P (decl) = 1; -} - -/* Return string which is the former assembler name modified with a - suffix consisting of an atsign (@) followed by the number of bytes of - arguments. If FASTCALL is true, also add the FASTCALL_PREFIX. */ - -static tree -gen_stdcall_or_fastcall_suffix (tree decl, bool fastcall) -{ - int total = 0; - /* ??? This probably should use XSTR (XEXP (DECL_RTL (decl), 0), 0) instead - of DECL_ASSEMBLER_NAME. */ - const char *asmname = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl)); - char *newsym; - char *p; - tree formal_type; - - /* Do not change the identifier if a verbatim asmspec or already done. */ - if (*asmname == '*' || strchr (asmname, '@')) - return DECL_ASSEMBLER_NAME (decl); - - formal_type = TYPE_ARG_TYPES (TREE_TYPE (decl)); - if (formal_type != NULL_TREE) - { - /* These attributes are ignored for variadic functions in - i386.c:ix86_return_pops_args. For compatibility with MS - compiler do not add @0 suffix here. */ - if (TREE_VALUE (tree_last (formal_type)) != void_type_node) - return DECL_ASSEMBLER_NAME (decl); - - /* Quit if we hit an incomplete type. Error is reported - by convert_arguments in c-typeck.c or cp/typeck.c. */ - while (TREE_VALUE (formal_type) != void_type_node - && COMPLETE_TYPE_P (TREE_VALUE (formal_type))) - { - int parm_size - = TREE_INT_CST_LOW (TYPE_SIZE (TREE_VALUE (formal_type))); - /* Must round up to include padding. This is done the same - way as in store_one_arg. */ - parm_size = ((parm_size + PARM_BOUNDARY - 1) - / PARM_BOUNDARY * PARM_BOUNDARY); - total += parm_size; - formal_type = TREE_CHAIN (formal_type);\ - } - } - - /* Assume max of 8 base 10 digits in the suffix. */ - newsym = alloca (1 + strlen (asmname) + 1 + 8 + 1); - p = newsym; - if (fastcall) - *p++ = FASTCALL_PREFIX; - sprintf (p, "%s@%d", asmname, total/BITS_PER_UNIT); - return get_identifier (newsym); -} - -void -i386_pe_encode_section_info (tree decl, rtx rtl, int first) -{ - default_encode_section_info (decl, rtl, first); - - if (first && TREE_CODE (decl) == FUNCTION_DECL) - { - tree type_attributes = TYPE_ATTRIBUTES (TREE_TYPE (decl)); - tree newid = NULL_TREE; - - if (lookup_attribute ("stdcall", type_attributes)) - newid = gen_stdcall_or_fastcall_suffix (decl, false); - else if (lookup_attribute ("fastcall", type_attributes)) - newid = gen_stdcall_or_fastcall_suffix (decl, true); - if (newid != NULL_TREE) - { - rtx rtlname = XEXP (rtl, 0); - if (GET_CODE (rtlname) == MEM) - rtlname = XEXP (rtlname, 0); - XSTR (rtlname, 0) = IDENTIFIER_POINTER (newid); - /* These attributes must be present on first declaration, - change_decl_assembler_name will warn if they are added - later and the decl has been referenced, but duplicate_decls - should catch the mismatch before this is called. */ - change_decl_assembler_name (decl, newid); - } - } - - else if (TREE_CODE (decl) == VAR_DECL - && lookup_attribute ("selectany", DECL_ATTRIBUTES (decl))) - { - if (DECL_INITIAL (decl) - /* If an object is initialized with a ctor, the static - initialization and destruction code for it is present in - each unit defining the object. The code that calls the - ctor is protected by a link-once guard variable, so that - the object still has link-once semantics, */ - || TYPE_NEEDS_CONSTRUCTING (TREE_TYPE (decl))) - make_decl_one_only (decl); - else - error ("%q+D:'selectany' attribute applies only to initialized objects", - decl); - } - - /* Mark the decl so we can tell from the rtl whether the object is - dllexport'd or dllimport'd. tree.c: merge_dllimport_decl_attributes - handles dllexport/dllimport override semantics. */ - - if (i386_pe_dllexport_p (decl)) - i386_pe_mark_dllexport (decl); - else if (i386_pe_dllimport_p (decl)) - i386_pe_mark_dllimport (decl); - /* It might be that DECL has been declared as dllimport, but a - subsequent definition nullified that. Assert that - tree.c: merge_dllimport_decl_attributes has removed the attribute - before the RTL name was marked with the DLL_IMPORT_PREFIX. */ - else - gcc_assert (!((TREE_CODE (decl) == FUNCTION_DECL - || TREE_CODE (decl) == VAR_DECL) - && rtl != NULL_RTX - && GET_CODE (rtl) == MEM - && GET_CODE (XEXP (rtl, 0)) == MEM - && GET_CODE (XEXP (XEXP (rtl, 0), 0)) == SYMBOL_REF - && i386_pe_dllimport_name_p (XSTR (XEXP (XEXP (rtl, 0), 0), 0)))); -} - -/* Strip only the leading encoding, leaving the stdcall suffix and fastcall - prefix if it exists. */ - -const char * -i386_pe_strip_name_encoding (const char *str) -{ - if (strncmp (str, DLL_IMPORT_PREFIX, strlen (DLL_IMPORT_PREFIX)) - == 0) - str += strlen (DLL_IMPORT_PREFIX); - else if (strncmp (str, DLL_EXPORT_PREFIX, strlen (DLL_EXPORT_PREFIX)) - == 0) - str += strlen (DLL_EXPORT_PREFIX); - if (*str == '*') - str += 1; - return str; -} - -/* Also strip the fastcall prefix and stdcall suffix. */ - -const char * -i386_pe_strip_name_encoding_full (const char *str) -{ - const char *p; - const char *name = i386_pe_strip_name_encoding (str); - - /* Strip leading '@' on fastcall symbols. */ - if (*name == '@') - name++; - - /* Strip trailing "@n". */ - p = strchr (name, '@'); - if (p) - return ggc_alloc_string (name, p - name); - - return name; -} - -/* Output a reference to a label. Fastcall symbols are prefixed with @, - whereas symbols for functions using other calling conventions don't - have a prefix (unless they are marked dllimport or dllexport). */ - -void i386_pe_output_labelref (FILE *stream, const char *name) -{ - if (strncmp (name, DLL_IMPORT_PREFIX, strlen (DLL_IMPORT_PREFIX)) - == 0) - /* A dll import */ - { - if (name[strlen (DLL_IMPORT_PREFIX)] == FASTCALL_PREFIX) - /* A dllimport fastcall symbol. */ - { - fprintf (stream, "__imp_%s", - i386_pe_strip_name_encoding (name)); - } - else - /* A dllimport non-fastcall symbol. */ - { - fprintf (stream, "__imp__%s", - i386_pe_strip_name_encoding (name)); - } - } - else if ((name[0] == FASTCALL_PREFIX) - || (strncmp (name, DLL_EXPORT_PREFIX, strlen (DLL_EXPORT_PREFIX)) - == 0 - && name[strlen (DLL_EXPORT_PREFIX)] == FASTCALL_PREFIX)) - /* A fastcall symbol. */ - { - fprintf (stream, "%s", - i386_pe_strip_name_encoding (name)); - } - else - /* Everything else. */ - { - fprintf (stream, "%s%s", USER_LABEL_PREFIX, - i386_pe_strip_name_encoding (name)); - } -} - -void -i386_pe_unique_section (tree decl, int reloc) -{ - int len; - const char *name, *prefix; - char *string; - - name = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl)); - name = i386_pe_strip_name_encoding_full (name); - - /* The object is put in, for example, section .text$foo. - The linker will then ultimately place them in .text - (everything from the $ on is stripped). Don't put - read-only data in .rdata section to avoid a PE linker - bug when .rdata$* grouped sections are used in code - without a .rdata section. */ - if (TREE_CODE (decl) == FUNCTION_DECL) - prefix = ".text$"; - else if (decl_readonly_section (decl, reloc)) - prefix = ".rdata$"; - else - prefix = ".data$"; - len = strlen (name) + strlen (prefix); - string = alloca (len + 1); - sprintf (string, "%s%s", prefix, name); - - DECL_SECTION_NAME (decl) = build_string (len, string); -} - -/* Select a set of attributes for section NAME based on the properties - of DECL and whether or not RELOC indicates that DECL's initializer - might contain runtime relocations. - - We make the section read-only and executable for a function decl, - read-only for a const data decl, and writable for a non-const data decl. - - If the section has already been defined, to not allow it to have - different attributes, as (1) this is ambiguous since we're not seeing - all the declarations up front and (2) some assemblers (e.g. SVR4) - do not recognize section redefinitions. */ -/* ??? This differs from the "standard" PE implementation in that we - handle the SHARED variable attribute. Should this be done for all - PE targets? */ - -#define SECTION_PE_SHARED SECTION_MACH_DEP - -unsigned int -i386_pe_section_type_flags (tree decl, const char *name, int reloc) -{ - static htab_t htab; - unsigned int flags; - unsigned int **slot; - - /* The names we put in the hashtable will always be the unique - versions given to us by the stringtable, so we can just use - their addresses as the keys. */ - if (!htab) - htab = htab_create (31, htab_hash_pointer, htab_eq_pointer, NULL); - - if (decl && TREE_CODE (decl) == FUNCTION_DECL) - flags = SECTION_CODE; - else if (decl && decl_readonly_section (decl, reloc)) - flags = 0; - else - { - flags = SECTION_WRITE; - - if (decl && TREE_CODE (decl) == VAR_DECL - && lookup_attribute ("shared", DECL_ATTRIBUTES (decl))) - flags |= SECTION_PE_SHARED; - } - - if (decl && DECL_ONE_ONLY (decl)) - flags |= SECTION_LINKONCE; - - /* See if we already have an entry for this section. */ - slot = (unsigned int **) htab_find_slot (htab, name, INSERT); - if (!*slot) - { - *slot = (unsigned int *) xmalloc (sizeof (unsigned int)); - **slot = flags; - } - else - { - if (decl && **slot != flags) - error ("%q+D causes a section type conflict", decl); - } - - return flags; -} - -void -i386_pe_asm_named_section (const char *name, unsigned int flags, - tree decl) -{ - char flagchars[8], *f = flagchars; - - if ((flags & (SECTION_CODE | SECTION_WRITE)) == 0) - /* readonly data */ - { - *f++ ='d'; /* This is necessary for older versions of gas. */ - *f++ ='r'; - } - else - { - if (flags & SECTION_CODE) - *f++ = 'x'; - if (flags & SECTION_WRITE) - *f++ = 'w'; - if (flags & SECTION_PE_SHARED) - *f++ = 's'; - } - - *f = '\0'; - - fprintf (asm_out_file, "\t.section\t%s,\"%s\"\n", name, flagchars); - - if (flags & SECTION_LINKONCE) - { - /* Functions may have been compiled at various levels of - optimization so we can't use `same_size' here. - Instead, have the linker pick one, without warning. - If 'selectany' attribute has been specified, MS compiler - sets 'discard' characteristic, rather than telling linker - to warn of size or content mismatch, so do the same. */ - bool discard = (flags & SECTION_CODE) - || lookup_attribute ("selectany", - DECL_ATTRIBUTES (decl)); - fprintf (asm_out_file, "\t.linkonce %s\n", - (discard ? "discard" : "same_size")); - } -} - /* APPLE LOCAL begin mainline 2005-04-01 */ - -/* Handle a "selectany" attribute; - arguments as in struct attribute_spec.handler. */ -tree -ix86_handle_selectany_attribute (tree *node, tree name, - tree args ATTRIBUTE_UNUSED, - int flags ATTRIBUTE_UNUSED, - bool *no_add_attrs) -{ - /* The attribute applies only to objects that are initialized and have - external linkage. However, we may not know about initialization - until the language frontend has processed the decl. We'll check for - initialization later in encode_section_info. */ - if (TREE_CODE (*node) != VAR_DECL || !TREE_PUBLIC (*node)) - { - error ("%qs attribute applies only to initialized variables" - " with external linkage", IDENTIFIER_POINTER (name)); - *no_add_attrs = true; - } - - return NULL_TREE; -} - - /* APPLE LOCAL end mainline 2005-04-01 */ - -/* The Microsoft linker requires that every function be marked as - DT_FCN. When using gas on cygwin, we must emit appropriate .type - directives. */ - -#include "gsyms.h" - -/* Mark a function appropriately. This should only be called for - functions for which we are not emitting COFF debugging information. - FILE is the assembler output file, NAME is the name of the - function, and PUBLIC is nonzero if the function is globally - visible. */ - -void -i386_pe_declare_function_type (FILE *file, const char *name, int public) -{ - fprintf (file, "\t.def\t"); - assemble_name (file, name); - fprintf (file, ";\t.scl\t%d;\t.type\t%d;\t.endef\n", - public ? (int) C_EXT : (int) C_STAT, - (int) DT_FCN << N_BTSHFT); -} - -/* Keep a list of external functions. */ - -struct extern_list GTY(()) -{ - struct extern_list *next; - tree decl; - const char *name; -}; - -static GTY(()) struct extern_list *extern_head; - -/* Assemble an external function reference. We need to keep a list of - these, so that we can output the function types at the end of the - assembly. We can't output the types now, because we might see a - definition of the function later on and emit debugging information - for it then. */ - -void -i386_pe_record_external_function (tree decl, const char *name) -{ - struct extern_list *p; - - p = (struct extern_list *) ggc_alloc (sizeof *p); - p->next = extern_head; - p->decl = decl; - p->name = name; - extern_head = p; -} - -/* Keep a list of exported symbols. */ - -struct export_list GTY(()) -{ - struct export_list *next; - const char *name; - int is_data; /* used to type tag exported symbols. */ -}; - -static GTY(()) struct export_list *export_head; - -/* Assemble an export symbol entry. We need to keep a list of - these, so that we can output the export list at the end of the - assembly. We used to output these export symbols in each function, - but that causes problems with GNU ld when the sections are - linkonce. */ - -void -i386_pe_record_exported_symbol (const char *name, int is_data) -{ - struct export_list *p; - - p = (struct export_list *) ggc_alloc (sizeof *p); - p->next = export_head; - p->name = name; - p->is_data = is_data; - export_head = p; -} - -/* This is called at the end of assembly. For each external function - which has not been defined, we output a declaration now. We also - output the .drectve section. */ - -void -i386_pe_file_end (void) -{ - struct extern_list *p; - - ix86_file_end (); - - for (p = extern_head; p != NULL; p = p->next) - { - tree decl; - - decl = p->decl; - - /* Positively ensure only one declaration for any given symbol. */ - if (! TREE_ASM_WRITTEN (decl) - && TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl))) - { - TREE_ASM_WRITTEN (decl) = 1; - i386_pe_declare_function_type (asm_out_file, p->name, - TREE_PUBLIC (decl)); - } - } - - if (export_head) - { - struct export_list *q; - drectve_section (); - for (q = export_head; q != NULL; q = q->next) - { - fprintf (asm_out_file, "\t.ascii \" -export:%s%s\"\n", - i386_pe_strip_name_encoding (q->name), - (q->is_data) ? ",data" : ""); - } - } -} - -#include "gt-winnt.h" From djg at cray.com Tue Aug 28 09:26:37 2007 From: djg at cray.com (Dan Gohman) Date: Tue, 28 Aug 2007 09:26:37 -0500 Subject: [llvm-commits] [patch] fix the alignment of i64 and f64 on linux x86-64 Message-ID: <20070828142637.GB11786@gold.us.cray.com> >> According to table 3.1 of http://www.x86-64.org/documentation/abi.pdf, >> the i64 and f64 types should have 8 byte alignment. >> >> The attached patch changes this for targets that are not darwin. > > Dan, Evan, is this ok? Evan, doesn't darwin follow the same ABI on > x86-64? It looks good to me. Dan -- Dan Gohman, Cray Inc. From asl at math.spbu.ru Tue Aug 28 10:57:27 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 28 Aug 2007 15:57:27 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41538 - in /llvm-gcc-4.2/trunk/gcc: c-parser.c cp/parser.c Message-ID: <200708281557.l7SFvS8i009363@zion.cs.uiuc.edu> Author: asl Date: Tue Aug 28 10:57:24 2007 New Revision: 41538 URL: http://llvm.org/viewvc/llvm-project?rev=41538&view=rev Log: Fix handling of cw-style asm blocks. Modified: llvm-gcc-4.2/trunk/gcc/c-parser.c llvm-gcc-4.2/trunk/gcc/cp/parser.c Modified: llvm-gcc-4.2/trunk/gcc/c-parser.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/c-parser.c?rev=41538&r1=41537&r2=41538&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/c-parser.c (original) +++ llvm-gcc-4.2/trunk/gcc/c-parser.c Tue Aug 28 10:57:24 2007 @@ -4464,12 +4464,14 @@ } return NULL_TREE; } - if (c_parser_next_token_is (parser, CPP_DOT) - || c_parser_next_token_is (parser, CPP_ATSIGN) - || c_parser_next_token_is (parser, CPP_NAME) - || c_parser_next_token_is_keyword (parser, RID_ASM) - || c_parser_next_token_is (parser, CPP_SEMICOLON) - || c_parser_iasm_bol (parser)) + if (quals == NULL_TREE + && (c_parser_next_token_is (parser, CPP_DOT) + || c_parser_next_token_is (parser, CPP_ATSIGN) + || c_parser_next_token_is (parser, CPP_NAME) + || c_parser_next_token_is_keyword (parser, RID_ASM) + || c_parser_next_token_is (parser, CPP_SEMICOLON) + || (c_parser_iasm_bol (parser) + && ! c_parser_next_token_is (parser, CPP_OPEN_PAREN)))) { if (flag_iasm_blocks) c_parser_iasm_top_statement (parser); @@ -5338,6 +5340,8 @@ postfix-expression [ expression ] postfix-expression ( argument-expression-list[opt] ) postfix-expression . identifier + APPLE LOCAL CW asm blocks + typedef-name . identifier postfix-expression -> identifier postfix-expression ++ postfix-expression -- @@ -5351,7 +5355,11 @@ argument-expression-list , argument-expression primary-expression: + APPLE LOCAL CW asm blocks + . identifier + APPLE LOCAL CW asm blocks + @identifier constant string-literal ( expression ) @@ -5442,6 +5450,16 @@ /* APPLE LOCAL end radar 5277239 */ if (c_parser_peek_token (parser)->id_kind != C_ID_ID) { + /* APPLE LOCAL begin CW asm blocks (in 4.2 bf) */ + if (inside_iasm_block + && c_parser_peek_2nd_token (parser)->type == CPP_DOT) + { + expr.value = c_parser_peek_token (parser)->value; + expr.original_code = ERROR_MARK; + c_parser_consume_token (parser); + break; + } + /* APPLE LOCAL end CW asm blocks (in 4.2 bf) */ c_parser_error (parser, "expected expression"); expr.value = error_mark_node; expr.original_code = ERROR_MARK; @@ -5828,6 +5846,29 @@ expr.original_code = ERROR_MARK; break; } + /* (in 4.2 be) */ + if (c_parser_next_token_is (parser, CPP_ATSIGN)) + { + tree id; + location_t loc = c_parser_peek_token (parser)->location; + c_parser_consume_token (parser); + if (c_parser_peek_token (parser)->id_kind != C_ID_ID) + { + c_parser_error (parser, "expected identifier"); + expr.value = error_mark_node; + expr.original_code = ERROR_MARK; + break; + } + + id = c_parser_peek_token (parser)->value; + c_parser_consume_token (parser); + id = prepend_char_identifier (id, '@'); + expr.value = build_external_ref (id, + (c_parser_peek_token (parser)->type + == CPP_OPEN_PAREN), loc); + expr.original_code = ERROR_MARK; + break; + } } /* APPLE LOCAL end CW asm blocks */ c_parser_error (parser, "expected expression"); @@ -5882,6 +5923,11 @@ tree ident, idx, exprlist; while (true) { + /* APPLE LOCAL begin CW asm blocks */ + if (inside_iasm_block + && c_parser_iasm_bol (parser)) + return expr; + /* APPLE LOCAL end CW asm blocks */ switch (c_parser_peek_token (parser)->type) { case CPP_OPEN_SQUARE: @@ -5894,6 +5940,10 @@ expr.original_code = ERROR_MARK; break; case CPP_OPEN_PAREN: + /* APPLE LOCAL begin CW asm blocks (in 4.2 bd) */ + if (inside_iasm_block) + return expr; + /* APPLE LOCAL end CW asm blocks (in 4.2 bd) */ /* Function call. */ c_parser_consume_token (parser); if (c_parser_next_token_is (parser, CPP_CLOSE_PAREN)) @@ -5909,19 +5959,24 @@ /* Structure element reference. */ c_parser_consume_token (parser); expr = default_function_array_conversion (expr); - if (c_parser_next_token_is (parser, CPP_NAME)) - ident = c_parser_peek_token (parser)->value; - /* APPLE LOCAL begin CW asm blocks (in 4.2 bc) */ - else if (inside_iasm_block - && c_parser_next_token_is (parser, CPP_NUMBER)) + /* APPLE LOCAL begin CW asm blocks */ + if (inside_iasm_block) { - tree c = c_parser_peek_token (parser)->value; - c_parser_consume_token (parser); - expr.value = iasm_c_build_component_ref (expr.value, c); - expr.original_code = ERROR_MARK; - break; + /* (in 4.2 bf) */ + if (c_parser_next_token_is (parser, CPP_NAME) + /* (in 4.2 bc) */ + || c_parser_next_token_is (parser, CPP_NUMBER)) + { + tree c = c_parser_peek_token (parser)->value; + c_parser_consume_token (parser); + expr.value = iasm_c_build_component_ref (expr.value, c); + expr.original_code = ERROR_MARK; + break; + } } /* APPLE LOCAL end CW asm blocks */ + if (c_parser_next_token_is (parser, CPP_NAME)) + ident = c_parser_peek_token (parser)->value; else { c_parser_error (parser, "expected identifier"); @@ -8660,13 +8715,16 @@ static bool c_parser_iasm_bol (c_parser *parser) { + location_t loc; c_token *token; /* We can't use c_parser_peek_token here, as it will give errors for things like 1st in MS-stype asm. */ if (parser->tokens_avail == 0) { + loc = input_location; parser->tokens_avail = 1; c_lex_one_token (&parser->tokens[0], parser); + input_location = loc; } token = &parser->tokens[0]; @@ -8719,6 +8777,8 @@ { /* Parse a single statement. */ c_parser_iasm_statement (parser); + /* Resynchronize from c_parser_iasm_bol. */ + input_location = c_parser_peek_token (parser)->location; check = 1; } @@ -9003,6 +9063,17 @@ /* Jump into the usual operand precedence stack. */ operand = c_parser_binary_expression (parser, false).value; + /* (in 4.2 bd) */ + while (c_parser_next_token_is (parser, CPP_OPEN_PAREN)) + { + struct c_expr op2; + c_parser_consume_token (parser); + op2 = c_parser_expr_no_commas (parser, NULL); + c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, + "expected %<)%>"); + operand = iasm_build_register_offset (operand, op2.value); + } + return operand; } Modified: llvm-gcc-4.2/trunk/gcc/cp/parser.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/parser.c?rev=41538&r1=41537&r2=41538&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/cp/parser.c (original) +++ llvm-gcc-4.2/trunk/gcc/cp/parser.c Tue Aug 28 10:57:24 2007 @@ -11791,7 +11791,8 @@ || cp_lexer_next_token_is (parser->lexer, CPP_NAME) || cp_lexer_next_token_is_keyword (parser->lexer, RID_ASM) || cp_lexer_next_token_is (parser->lexer, CPP_SEMICOLON) - || cp_lexer_iasm_bol (parser->lexer)) + || (cp_lexer_iasm_bol (parser->lexer) + && !cp_lexer_next_token_is (parser->lexer, CPP_OPEN_PAREN))) { if (flag_iasm_blocks) cp_parser_iasm_top_statement (parser); From baldrick at free.fr Tue Aug 28 11:11:03 2007 From: baldrick at free.fr (Duncan Sands) Date: Tue, 28 Aug 2007 16:11:03 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41539 - /llvm-gcc-4.2/trunk/gcc/Makefile.in Message-ID: <200708281611.l7SGB3jS009815@zion.cs.uiuc.edu> Author: baldrick Date: Tue Aug 28 11:11:02 2007 New Revision: 41539 URL: http://llvm.org/viewvc/llvm-project?rev=41539&view=rev Log: Forward port of r40542. Restore llvm version info. Modified: llvm-gcc-4.2/trunk/gcc/Makefile.in Modified: llvm-gcc-4.2/trunk/gcc/Makefile.in URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/Makefile.in?rev=41539&r1=41538&r2=41539&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/Makefile.in (original) +++ llvm-gcc-4.2/trunk/gcc/Makefile.in Tue Aug 28 11:11:02 2007 @@ -231,10 +231,6 @@ @checkingenabled_flag@ LLVMOBJDIR = @LLVMBASEPATH@ -ifdef LLVM_VERSION_INFO -CPPFLAGS += -DLLVM_VERSION_INFO='"$(LLVM_VERSION_INFO)"' -endif - # Determine BUILDMODE from configure run (--enable-llvm) BUILDMODE := @LLVMBUILDMODE@ @@ -249,6 +245,10 @@ # srcdir != objdir builds. LLVMSRCDIR := $(shell $(LLVMBINPATH)/llvm-config --src-root) endif + +ifdef LLVM_VERSION_INFO +CPPFLAGS += -DLLVM_VERSION_INFO='"$(LLVM_VERSION_INFO)"' +endif # LLVM LOCAL end # These exists to be overridden by the x-* and t-* files, respectively. From baldrick at free.fr Tue Aug 28 13:46:08 2007 From: baldrick at free.fr (Duncan Sands) Date: Tue, 28 Aug 2007 20:46:08 +0200 Subject: [llvm-commits] Trampoline support (pointers nested funtions) In-Reply-To: <58FA8553-7B71-44ED-B78A-730170AF6DC7@apple.com> References: <200707261656.20050.baldrick@free.fr> <200707271238.09287.baldrick@free.fr> <58FA8553-7B71-44ED-B78A-730170AF6DC7@apple.com> Message-ID: <200708282046.09468.baldrick@free.fr> Hi Evan, thanks for your comments. > >> 3. In X86TargetLowering::LowerTRAMPOLINE(): > >> + case CallingConv::X86_StdCall: { > >> + Move = 0xb9; // Pass chain in ECX > >> > >> I assume this is the ModR/M byte? > > > > Well, it's MOV32ri. > > Then it should be 0xb8? It already had ECX or'd in. > Please factor out getX86RegNum() as well. Perhaps put them in > X86RegisterInfo.cpp (since lowering really shouldn't depend on > codeemitter...) Do getX86RegNum(X86::EAX) rather than make use > N86::EAX directly. ... > Please go through X86InstrInfo to get the opcode numbers instead of > hard coding it. Does the attached patch seem OK? Ciao, Duncan. -------------- next part -------------- A non-text attachment was scrubbed... Name: tr.diff Type: text/x-diff Size: 11866 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070828/2fb237ac/attachment.bin From cfr at adobe.com Tue Aug 28 13:59:02 2007 From: cfr at adobe.com (Chuck Rose III) Date: Tue, 28 Aug 2007 18:59:02 -0000 Subject: [llvm-commits] [llvm] r41553 - in /llvm/trunk/win32: Support/Support.vcproj Transforms/Transforms.vcproj VMCore/VMCore.vcproj x86/x86.vcproj Message-ID: <200708281859.l7SIx2Iu015844@zion.cs.uiuc.edu> Author: cfr Date: Tue Aug 28 13:59:02 2007 New Revision: 41553 URL: http://llvm.org/viewvc/llvm-project?rev=41553&view=rev Log: Update win32 VStudio project files to keep pace with recently added and deleted files Modified: llvm/trunk/win32/Support/Support.vcproj llvm/trunk/win32/Transforms/Transforms.vcproj llvm/trunk/win32/VMCore/VMCore.vcproj llvm/trunk/win32/x86/x86.vcproj Modified: llvm/trunk/win32/Support/Support.vcproj URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/win32/Support/Support.vcproj?rev=41553&r1=41552&r2=41553&view=diff ============================================================================== --- llvm/trunk/win32/Support/Support.vcproj (original) +++ llvm/trunk/win32/Support/Support.vcproj Tue Aug 28 13:59:02 2007 @@ -49,10 +49,11 @@ ForceConformanceInForLoopScope="true" RuntimeTypeInfo="true" UsePrecompiledHeader="0" + ProgramDataBaseFileName="$(OutDir)\$(ProjectName).pdb" BrowseInformation="1" WarningLevel="3" Detect64BitPortabilityProblems="false" - DebugInformationFormat="4" + DebugInformationFormat="3" DisableSpecificWarnings="4355,4146,4800" /> + + @@ -223,13 +229,6 @@ RelativePath="..\..\lib\Support\SlowOperationInformer.cpp" > - - - @@ -309,10 +308,6 @@ > - - @@ -445,6 +440,10 @@ > + + Modified: llvm/trunk/win32/Transforms/Transforms.vcproj URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/win32/Transforms/Transforms.vcproj?rev=41553&r1=41552&r2=41553&view=diff ============================================================================== --- llvm/trunk/win32/Transforms/Transforms.vcproj (original) +++ llvm/trunk/win32/Transforms/Transforms.vcproj Tue Aug 28 13:59:02 2007 @@ -309,10 +309,6 @@ > - - @@ -337,6 +333,10 @@ > + + @@ -417,6 +417,10 @@ > + + Modified: llvm/trunk/win32/VMCore/VMCore.vcproj URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/win32/VMCore/VMCore.vcproj?rev=41553&r1=41552&r2=41553&view=diff ============================================================================== --- llvm/trunk/win32/VMCore/VMCore.vcproj (original) +++ llvm/trunk/win32/VMCore/VMCore.vcproj Tue Aug 28 13:59:02 2007 @@ -167,6 +167,10 @@ > + + Modified: llvm/trunk/win32/x86/x86.vcproj URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/win32/x86/x86.vcproj?rev=41553&r1=41552&r2=41553&view=diff ============================================================================== --- llvm/trunk/win32/x86/x86.vcproj (original) +++ llvm/trunk/win32/x86/x86.vcproj Tue Aug 28 13:59:02 2007 @@ -217,6 +217,10 @@ > + + From djg at cray.com Tue Aug 28 15:32:58 2007 From: djg at cray.com (Dan Gohman) Date: Tue, 28 Aug 2007 20:32:58 -0000 Subject: [llvm-commits] [llvm] r41556 - in /llvm/trunk: include/llvm/CodeGen/ScheduleDAG.h lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp Message-ID: <200708282032.l7SKWw2H020125@zion.cs.uiuc.edu> Author: djg Date: Tue Aug 28 15:32:58 2007 New Revision: 41556 URL: http://llvm.org/viewvc/llvm-project?rev=41556&view=rev Log: Add an option, -view-sunit-dags, for viewing the actual SUnit DAGs used by scheduling. Modified: llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp Modified: llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h?rev=41556&r1=41555&r2=41556&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h (original) +++ llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h Tue Aug 28 15:32:58 2007 @@ -17,6 +17,7 @@ #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/GraphTraits.h" #include "llvm/ADT/SmallSet.h" namespace llvm { @@ -191,6 +192,11 @@ virtual ~ScheduleDAG() {} + /// viewGraph - Pop up a GraphViz/gv window with the ScheduleDAG rendered + /// using 'dot'. + /// + void viewGraph(); + /// Run - perform scheduling. /// MachineBasicBlock *Run(); @@ -315,6 +321,68 @@ ScheduleDAG* createDefaultScheduler(SelectionDAGISel *IS, SelectionDAG *DAG, MachineBasicBlock *BB); + + class SUnitIterator : public forward_iterator { + SUnit *Node; + unsigned Operand; + + SUnitIterator(SUnit *N, unsigned Op) : Node(N), Operand(Op) {} + public: + bool operator==(const SUnitIterator& x) const { + return Operand == x.Operand; + } + bool operator!=(const SUnitIterator& x) const { return !operator==(x); } + + const SUnitIterator &operator=(const SUnitIterator &I) { + assert(I.Node == Node && "Cannot assign iterators to two different nodes!"); + Operand = I.Operand; + return *this; + } + + pointer operator*() const { + return Node->Preds[Operand].first; + } + pointer operator->() const { return operator*(); } + + SUnitIterator& operator++() { // Preincrement + ++Operand; + return *this; + } + SUnitIterator operator++(int) { // Postincrement + SUnitIterator tmp = *this; ++*this; return tmp; + } + + static SUnitIterator begin(SUnit *N) { return SUnitIterator(N, 0); } + static SUnitIterator end (SUnit *N) { + return SUnitIterator(N, N->Preds.size()); + } + + unsigned getOperand() const { return Operand; } + const SUnit *getNode() const { return Node; } + bool isChain() const { return Node->Preds[Operand].second; } + }; + + template <> struct GraphTraits { + typedef SUnit NodeType; + typedef SUnitIterator ChildIteratorType; + static inline NodeType *getEntryNode(SUnit *N) { return N; } + static inline ChildIteratorType child_begin(NodeType *N) { + return SUnitIterator::begin(N); + } + static inline ChildIteratorType child_end(NodeType *N) { + return SUnitIterator::end(N); + } + }; + + template <> struct GraphTraits : public GraphTraits { + typedef std::vector::iterator nodes_iterator; + static nodes_iterator nodes_begin(ScheduleDAG *G) { + return G->SUnits.begin(); + } + static nodes_iterator nodes_end(ScheduleDAG *G) { + return G->SUnits.end(); + } + }; } #endif Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=41556&r1=41555&r2=41556&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Aug 28 15:32:58 2007 @@ -54,8 +54,11 @@ static cl::opt ViewSchedDAGs("view-sched-dags", cl::Hidden, cl::desc("Pop up a window to show sched dags as they are processed")); +static cl::opt +ViewSUnitDAGs("view-sunit-dags", cl::Hidden, + cl::desc("Pop up a window to show SUnit dags after they are processed")); #else -static const bool ViewISelDAGs = 0, ViewSchedDAGs = 0; +static const bool ViewISelDAGs = 0, ViewSchedDAGs = 0, ViewSUnitDAGs = 0; #endif //===---------------------------------------------------------------------===// @@ -4842,6 +4845,9 @@ ScheduleDAG *SL = Ctor(this, &DAG, BB); BB = SL->Run(); + + if (ViewSUnitDAGs) SL->viewGraph(); + delete SL; } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp?rev=41556&r1=41555&r2=41556&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp Tue Aug 28 15:32:58 2007 @@ -15,6 +15,7 @@ #include "llvm/Function.h" #include "llvm/Assembly/Writer.h" #include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/CodeGen/ScheduleDAG.h" #include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/Target/MRegisterInfo.h" @@ -243,3 +244,72 @@ #endif } +namespace llvm { + template<> + struct DOTGraphTraits : public DefaultDOTGraphTraits { + static std::string getGraphName(const ScheduleDAG *G) { + return DOTGraphTraits::getGraphName(&G->DAG); + } + + static bool renderGraphFromBottomUp() { + return true; + } + + static bool hasNodeAddressLabel(const SUnit *Node, + const ScheduleDAG *Graph) { + return true; + } + + /// If you want to override the dot attributes printed for a particular + /// edge, override this method. + template + static std::string getEdgeAttributes(const void *Node, EdgeIter EI) { + if (EI.isChain()) + return "color=blue,style=dashed"; + return ""; + } + + + static std::string getNodeLabel(const SUnit *Node, + const ScheduleDAG *Graph); + static std::string getNodeAttributes(const SUnit *N, + const ScheduleDAG *Graph) { + return "shape=Mrecord"; + } + + static void addCustomGraphFeatures(ScheduleDAG *G, + GraphWriter &GW) { + GW.emitSimpleNode(0, "plaintext=circle", "GraphRoot"); + if (G->DAG.getRoot().Val) + GW.emitEdge(0, -1, G->SUnitMap[G->DAG.getRoot().Val], -1, ""); + } + }; +} + +std::string DOTGraphTraits::getNodeLabel(const SUnit *SU, + const ScheduleDAG *G) { + std::string Op; + + for (unsigned i = 0; i < SU->FlaggedNodes.size(); ++i) { + Op += DOTGraphTraits::getNodeLabel(SU->FlaggedNodes[i], + &G->DAG) + "\n"; + } + + Op += DOTGraphTraits::getNodeLabel(SU->Node, &G->DAG); + + return Op; +} + + +/// viewGraph - Pop up a ghostview window with the reachable parts of the DAG +/// rendered using 'dot'. +/// +void ScheduleDAG::viewGraph() { +// This code is only for debugging! +#ifndef NDEBUG + ViewGraph(this, "dag." + DAG.getMachineFunction().getFunction()->getName()); +#else + cerr << "ScheduleDAG::viewGraph is only available in debug builds on " + << "systems with Graphviz or gv!\n"; +#endif // NDEBUG +} From baldrick at free.fr Wed Aug 29 02:01:19 2007 From: baldrick at free.fr (Duncan Sands) Date: Wed, 29 Aug 2007 07:01:19 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41561 - in /llvm-gcc-4.2/trunk/gcc: ada/misc.c c-decl.c cp/except.c except.c expr.h java/decl.c libfuncs.h llvm-convert.cpp llvm-internal.h objc/objc-act.c optabs.c Message-ID: <200708290701.l7T71JMD007449@zion.cs.uiuc.edu> Author: baldrick Date: Wed Aug 29 02:01:18 2007 New Revision: 41561 URL: http://llvm.org/viewvc/llvm-project?rev=41561&view=rev Log: Use the correct personality and unwind_resume functions for the language being compiled. Modified: llvm-gcc-4.2/trunk/gcc/ada/misc.c llvm-gcc-4.2/trunk/gcc/c-decl.c llvm-gcc-4.2/trunk/gcc/cp/except.c llvm-gcc-4.2/trunk/gcc/except.c llvm-gcc-4.2/trunk/gcc/expr.h llvm-gcc-4.2/trunk/gcc/java/decl.c llvm-gcc-4.2/trunk/gcc/libfuncs.h llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp llvm-gcc-4.2/trunk/gcc/llvm-internal.h llvm-gcc-4.2/trunk/gcc/objc/objc-act.c llvm-gcc-4.2/trunk/gcc/optabs.c Modified: llvm-gcc-4.2/trunk/gcc/ada/misc.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/ada/misc.c?rev=41561&r1=41560&r2=41561&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/ada/misc.c (original) +++ llvm-gcc-4.2/trunk/gcc/ada/misc.c Wed Aug 29 02:01:18 2007 @@ -512,8 +512,8 @@ right exception regions. */ using_eh_for_cleanups (); - eh_personality_libfunc = init_one_libfunc ("__gnat_eh_personality"); /* LLVM LOCAL begin */ + llvm_eh_personality_libfunc = llvm_init_one_libfunc ("__gnat_eh_personality"); default_init_unwind_resume_libfunc (); /* LLVM LOCAL end */ lang_eh_type_covers = gnat_eh_type_covers; Modified: llvm-gcc-4.2/trunk/gcc/c-decl.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/c-decl.c?rev=41561&r1=41560&r2=41561&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/c-decl.c (original) +++ llvm-gcc-4.2/trunk/gcc/c-decl.c Wed Aug 29 02:01:18 2007 @@ -3550,10 +3550,12 @@ return; c_eh_initialized_p = true; - eh_personality_libfunc - = init_one_libfunc (USING_SJLJ_EXCEPTIONS - ? "__gcc_personality_sj0" - : "__gcc_personality_v0"); + /* LLVM local begin */ + llvm_eh_personality_libfunc + = llvm_init_one_libfunc (USING_SJLJ_EXCEPTIONS + ? "__gcc_personality_sj0" + : "__gcc_personality_v0"); + /* LLVM local end */ default_init_unwind_resume_libfunc (); using_eh_for_cleanups (); } Modified: llvm-gcc-4.2/trunk/gcc/cp/except.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/except.c?rev=41561&r1=41560&r2=41561&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/cp/except.c (original) +++ llvm-gcc-4.2/trunk/gcc/cp/except.c Wed Aug 29 02:01:18 2007 @@ -78,11 +78,15 @@ call_unexpected_node = push_throw_library_fn (get_identifier ("__cxa_call_unexpected"), tmp); - eh_personality_libfunc = init_one_libfunc (USING_SJLJ_EXCEPTIONS - ? "__gxx_personality_sj0" - : "__gxx_personality_v0"); + /* LLVM local begin */ + llvm_eh_personality_libfunc + = llvm_init_one_libfunc (USING_SJLJ_EXCEPTIONS + ? "__gxx_personality_sj0" + : "__gxx_personality_v0"); + /* LLVM local end */ if (targetm.arm_eabi_unwinder) - unwind_resume_libfunc = init_one_libfunc ("__cxa_end_cleanup"); + /* LLVM local */ + llvm_unwind_resume_libfunc = llvm_init_one_libfunc ("__cxa_end_cleanup"); else default_init_unwind_resume_libfunc (); @@ -354,9 +358,12 @@ case lang_java: state = chose_java; - eh_personality_libfunc = init_one_libfunc (USING_SJLJ_EXCEPTIONS - ? "__gcj_personality_sj0" - : "__gcj_personality_v0"); + /* LLVM local begin */ + llvm_eh_personality_libfunc + = llvm_init_one_libfunc (USING_SJLJ_EXCEPTIONS + ? "__gcj_personality_sj0" + : "__gcj_personality_v0"); + /* LLVM local end */ break; default: Modified: llvm-gcc-4.2/trunk/gcc/except.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/except.c?rev=41561&r1=41560&r2=41561&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/except.c (original) +++ llvm-gcc-4.2/trunk/gcc/except.c Wed Aug 29 02:01:18 2007 @@ -4007,9 +4007,11 @@ default_init_unwind_resume_libfunc (void) { /* The default c++ routines aren't actually c++ specific, so use those. */ - unwind_resume_libfunc = - init_one_libfunc ( USING_SJLJ_EXCEPTIONS ? "_Unwind_SjLj_Resume" - : "_Unwind_Resume"); + /* LLVM local begin */ + llvm_unwind_resume_libfunc = llvm_init_one_libfunc ( USING_SJLJ_EXCEPTIONS ? + "_Unwind_SjLj_Resume" + : "_Unwind_Resume"); + /* LLVM local end */ } Modified: llvm-gcc-4.2/trunk/gcc/expr.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/expr.h?rev=41561&r1=41560&r2=41561&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/expr.h (original) +++ llvm-gcc-4.2/trunk/gcc/expr.h Wed Aug 29 02:01:18 2007 @@ -750,6 +750,14 @@ /* Call this to initialize an optab function entry. */ extern rtx init_one_libfunc (const char *); +/* LLVM LOCAL begin */ +/* Call this to initialize an optab function tree. */ +#ifdef ENABLE_LLVM +extern tree llvm_init_one_libfunc (const char *); +#else +#define llvm_init_one_libfunc init_one_libfunc +#endif +/* LLVM LOCAL end */ extern int vector_mode_valid_p (enum machine_mode); Modified: llvm-gcc-4.2/trunk/gcc/java/decl.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/java/decl.c?rev=41561&r1=41560&r2=41561&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/java/decl.c (original) +++ llvm-gcc-4.2/trunk/gcc/java/decl.c Wed Aug 29 02:01:18 2007 @@ -1131,9 +1131,12 @@ 0, NOT_BUILT_IN, NULL, NULL_TREE); /* Initialize variables for except.c. */ - eh_personality_libfunc = init_one_libfunc (USING_SJLJ_EXCEPTIONS - ? "__gcj_personality_sj0" - : "__gcj_personality_v0"); + /* LLVM local begin */ + llvm_eh_personality_libfunc + = llvm_init_one_libfunc (USING_SJLJ_EXCEPTIONS + ? "__gcj_personality_sj0" + : "__gcj_personality_v0"); + /* LLVM local end */ default_init_unwind_resume_libfunc (); lang_eh_runtime_type = do_nothing; Modified: llvm-gcc-4.2/trunk/gcc/libfuncs.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/libfuncs.h?rev=41561&r1=41560&r2=41561&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/libfuncs.h (original) +++ llvm-gcc-4.2/trunk/gcc/libfuncs.h Wed Aug 29 02:01:18 2007 @@ -20,6 +20,8 @@ #ifndef GCC_LIBFUNCS_H #define GCC_LIBFUNCS_H +/* LOCAL LLVM */ +#include "tree.h" /* Enumeration of indexes into libfunc_table. */ enum libfunc_index @@ -49,6 +51,13 @@ /* SYMBOL_REF rtx's for the library functions that are called implicitly and not via optabs. */ extern GTY(()) rtx libfunc_table[LTI_MAX]; +/* LLVM LOCAL begin */ +#ifdef ENABLE_LLVM +/* FUNCTION_DECL nodes for the library functions that are called + implicitly and not via optabs. */ +extern GTY(()) tree llvm_libfunc_table[LTI_MAX]; +#endif +/* LLVM LOCAL end */ /* Accessor macros for libfunc_table. */ @@ -66,6 +75,15 @@ #define unwind_sjlj_register_libfunc (libfunc_table[LTI_unwind_sjlj_register]) #define unwind_sjlj_unregister_libfunc \ (libfunc_table[LTI_unwind_sjlj_unregister]) +/* LLVM LOCAL begin */ +#ifdef ENABLE_LLVM +#define llvm_unwind_resume_libfunc (llvm_libfunc_table[LTI_unwind_resume]) +#define llvm_eh_personality_libfunc (llvm_libfunc_table[LTI_eh_personality]) +#else +#define llvm_unwind_resume_libfunc unwind_resume_libfunc +#define llvm_eh_personality_libfunc eh_personality_libfunc +#endif +/* LLVM LOCAL end */ #define profile_function_entry_libfunc (libfunc_table[LTI_profile_function_entry]) #define profile_function_exit_libfunc (libfunc_table[LTI_profile_function_exit]) Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=41561&r1=41560&r2=41561&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Wed Aug 29 02:01:18 2007 @@ -62,6 +62,7 @@ #include "hard-reg-set.h" #include "except.h" #include "rtl.h" +#include "libfuncs.h" #include "tree-flow.h" extern bool tree_could_throw_p(tree); // tree-flow.h uses non-C++ C constructs. extern int get_pointer_alignment (tree exp, unsigned int max_align); @@ -368,7 +369,7 @@ FuncEHException = 0; FuncEHSelector = 0; FuncEHGetTypeID = 0; - FuncCPPPersonality = 0; + FuncEHPersonality = 0; FuncUnwindResume = 0; NumAddressTakenBlocks = 0; @@ -1744,17 +1745,13 @@ FuncEHGetTypeID = Intrinsic::getDeclaration(TheModule, Intrinsic::eh_typeid_for); - FuncCPPPersonality = - TheModule->getOrInsertFunction("__gxx_personality_v0", - Type::getPrimitiveType(Type::VoidTyID), - NULL); - - FuncUnwindResume = - TheModule->getOrInsertFunction("_Unwind_Resume", - Type::getPrimitiveType(Type::VoidTyID), - PointerType::get(Type::Int8Ty), - NULL); - + assert(llvm_eh_personality_libfunc + && "no exception handling personality function!"); + FuncEHPersonality = DECL_LLVM(llvm_eh_personality_libfunc); + + assert(llvm_unwind_resume_libfunc + && "no unwind resume function!"); + FuncUnwindResume = DECL_LLVM(llvm_unwind_resume_libfunc); } /// getPostPad - Return the post landing pad for the given exception handling @@ -1798,7 +1795,7 @@ // The exception and the personality function. Args.push_back(Builder.CreateLoad(ExceptionValue, "eh_ptr")); - Args.push_back(CastToType(Instruction::BitCast, FuncCPPPersonality, + Args.push_back(CastToType(Instruction::BitCast, FuncEHPersonality, PointerType::get(Type::Int8Ty))); // Add selections for each handler. Modified: llvm-gcc-4.2/trunk/gcc/llvm-internal.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-internal.h?rev=41561&r1=41560&r2=41561&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-internal.h (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-internal.h Wed Aug 29 02:01:18 2007 @@ -287,8 +287,8 @@ /// FuncEHGetTypeID - Function used to return type id for give typeinfo. Function *FuncEHGetTypeID; - /// FuncCPPPersonality - Function handling c++ personality. - Value *FuncCPPPersonality; + /// FuncEHPersonality - Function providing the exception handling personality. + Value *FuncEHPersonality; /// FuncUnwindResume - Function used to continue exception unwinding. Value *FuncUnwindResume; Modified: llvm-gcc-4.2/trunk/gcc/objc/objc-act.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/objc/objc-act.c?rev=41561&r1=41560&r2=41561&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/objc/objc-act.c (original) +++ llvm-gcc-4.2/trunk/gcc/objc/objc-act.c Wed Aug 29 02:01:18 2007 @@ -7555,8 +7555,10 @@ #endif /* APPPLE LOCAL radar 5023725 */ OBJC_FLAG_ZEROCOST_EXCEPTIONS; - eh_personality_libfunc - = init_one_libfunc ("__objc_personality_v0"); + /* LLVM local begin */ + llvm_eh_personality_libfunc + = llvm_init_one_libfunc ("__objc_personality_v0"); + /* LLVM local end */ default_init_unwind_resume_libfunc (); using_eh_for_cleanups (); lang_eh_runtime_type = objc2_eh_runtime_type; @@ -7568,10 +7570,12 @@ else { c_eh_initialized_p = true; - eh_personality_libfunc - = init_one_libfunc (USING_SJLJ_EXCEPTIONS - ? "__gnu_objc_personality_sj0" - : "__gnu_objc_personality_v0"); + /* LLVM local begin */ + llvm_eh_personality_libfunc + = llvm_init_one_libfunc (USING_SJLJ_EXCEPTIONS + ? "__gnu_objc_personality_sj0" + : "__gnu_objc_personality_v0"); + /* LLVM local end */ default_init_unwind_resume_libfunc (); using_eh_for_cleanups (); lang_eh_runtime_type = objc_eh_runtime_type; Modified: llvm-gcc-4.2/trunk/gcc/optabs.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/optabs.c?rev=41561&r1=41560&r2=41561&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/optabs.c (original) +++ llvm-gcc-4.2/trunk/gcc/optabs.c Wed Aug 29 02:01:18 2007 @@ -58,6 +58,8 @@ optab optab_table[OTI_MAX]; rtx libfunc_table[LTI_MAX]; +/* LLVM LOCAL */ +tree llvm_libfunc_table[LTI_MAX]; /* Tables of patterns for converting one mode to another. */ convert_optab convert_optab_table[COI_MAX]; @@ -5133,29 +5135,42 @@ } -rtx -init_one_libfunc (const char *name) +/* LLVM local begin */ +tree +llvm_init_one_libfunc (const char *name) { - rtx symbol; - /* Create a FUNCTION_DECL that can be passed to targetm.encode_section_info. */ /* ??? We don't have any type information except for this is a function. Pretend this is "int foo()". */ tree decl; - /* LLVM LOCAL begin */ -#ifdef ENABLE_LLVM - return NULL_RTX; -#endif decl = build_decl (FUNCTION_DECL, get_identifier (name), build_function_type (integer_type_node, NULL_TREE)); - /* LLVM LOCAL end */ DECL_ARTIFICIAL (decl) = 1; DECL_EXTERNAL (decl) = 1; TREE_PUBLIC (decl) = 1; + return decl; +} + +/* LLVM local end */ +rtx +init_one_libfunc (const char *name) +{ + rtx symbol; + + /* LLVM local begin */ + tree decl; + +#ifdef ENABLE_LLVM + return NULL_RTX; +#endif + + decl = llvm_init_one_libfunc (name); + /* LLVM local end */ + symbol = XEXP (DECL_RTL (decl), 0); /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with From asl at math.spbu.ru Wed Aug 29 04:27:52 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 29 Aug 2007 09:27:52 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r41562 - /llvm-gcc-4.0/trunk/gcc/config/sparc/sparc.h Message-ID: <200708290927.l7T9RroY018645@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 29 04:27:52 2007 New Revision: 41562 URL: http://llvm.org/viewvc/llvm-project?rev=41562&view=rev Log: Unbreak sparc builds Modified: llvm-gcc-4.0/trunk/gcc/config/sparc/sparc.h Modified: llvm-gcc-4.0/trunk/gcc/config/sparc/sparc.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/config/sparc/sparc.h?rev=41562&r1=41561&r2=41562&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/config/sparc/sparc.h (original) +++ llvm-gcc-4.0/trunk/gcc/config/sparc/sparc.h Wed Aug 29 04:27:52 2007 @@ -1547,7 +1547,7 @@ is at the high-address end of the local variables; that is, each additional local variable allocated goes at a more negative offset in the frame. */ -#define FRAME_GROWS_DOWNWARD +#define FRAME_GROWS_DOWNWARD 1 /* Offset within stack frame to start allocating local variables at. If FRAME_GROWS_DOWNWARD, this is the offset to the END of the From baldrick at free.fr Wed Aug 29 09:34:37 2007 From: baldrick at free.fr (Duncan Sands) Date: Wed, 29 Aug 2007 14:34:37 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41563 - in /llvm-gcc-4.2/trunk/gcc: cp/except.c except.c except.h llvm-convert.cpp Message-ID: <200708291434.l7TEYb33028661@zion.cs.uiuc.edu> Author: baldrick Date: Wed Aug 29 09:34:36 2007 New Revision: 41563 URL: http://llvm.org/viewvc/llvm-project?rev=41563&view=rev Log: Let languages specify how to add a catch-all to the end of an eh_selector call. Modified: llvm-gcc-4.2/trunk/gcc/cp/except.c llvm-gcc-4.2/trunk/gcc/except.c llvm-gcc-4.2/trunk/gcc/except.h llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/cp/except.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/except.c?rev=41563&r1=41562&r2=41563&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/cp/except.c (original) +++ llvm-gcc-4.2/trunk/gcc/cp/except.c Wed Aug 29 09:34:36 2007 @@ -56,6 +56,16 @@ static int can_convert_eh (tree, tree); static tree cp_protect_cleanup_actions (void); +/* LLVM local begin */ +/* Do nothing (return NULL_TREE). */ + +tree +return_null_tree (void) +{ + return NULL_TREE; +} +/* LLVM local end */ + /* Sets up all the global eh stuff that needs to be initialized at the start of compilation. */ @@ -92,6 +102,8 @@ lang_eh_runtime_type = build_eh_type_type; lang_protect_cleanup_actions = &cp_protect_cleanup_actions; + /* LLVM local */ + lang_eh_catch_all = return_null_tree; } /* Returns an expression to be executed if an unhandled exception is Modified: llvm-gcc-4.2/trunk/gcc/except.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/except.c?rev=41563&r1=41562&r2=41563&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/except.c (original) +++ llvm-gcc-4.2/trunk/gcc/except.c Wed Aug 29 09:34:36 2007 @@ -95,6 +95,11 @@ /* Map a type to a runtime object to match type. */ tree (*lang_eh_runtime_type) (tree); +/* LLVM local begin */ +/* Return a type that catches all others */ +tree (*lang_eh_catch_all) (void); +/* LLVM local end */ + /* A hash table of label to region number. */ struct ehl_map_entry GTY(()) Modified: llvm-gcc-4.2/trunk/gcc/except.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/except.h?rev=41563&r1=41562&r2=41563&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/except.h (original) +++ llvm-gcc-4.2/trunk/gcc/except.h Wed Aug 29 09:34:36 2007 @@ -139,6 +139,13 @@ /* Map a type to a runtime object to match type. */ extern tree (*lang_eh_runtime_type) (tree); +/* LLVM local begin */ +/* If non-NULL, this function returns a type that covers all others, + a "catch-all" type. It may also return NULL_TREE, indicating that + the null runtime object catches all types, as in C++. */ +extern tree (*lang_eh_catch_all) (void); +/* LLVM local end */ + /* Just because the user configured --with-sjlj-exceptions=no doesn't mean that we can use call frame exceptions. Detect that the target Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=41563&r1=41562&r2=41563&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Wed Aug 29 09:34:36 2007 @@ -1840,12 +1840,27 @@ } } - if (can_throw_external_1(i, false)) + if (can_throw_external_1(i, false)) { // Some exceptions from this region may not be caught by any handler. // Since invokes are required to branch to the unwind label no matter // what exception is being unwound, append a catch-all. - // FIXME: The use of null as catch-all is C++ specific. - Args.push_back(Constant::getNullValue(PointerType::get(Type::Int8Ty))); + + // The representation of a catch-all is language specific. + Value *Catch_All; + if (!lang_eh_catch_all) { + // Use a "cleanup" - this should be good enough for most languages. + Catch_All = ConstantInt::get(Type::Int32Ty, 0); + } else { + tree catch_all_type = lang_eh_catch_all(); + if (catch_all_type == NULL_TREE) + // Use a C++ style null catch-all object. + Catch_All = Constant::getNullValue(PointerType::get(Type::Int8Ty)); + else + // This language has a type that catches all others. + Catch_All = Emit(lookup_type_for_runtime(catch_all_type), 0); + } + Args.push_back(Catch_All); + } // Emit the selector call. Value *Select = Builder.CreateCall(FuncEHSelector, Args.begin(), Args.end(), From sabre at nondot.org Wed Aug 29 11:15:23 2007 From: sabre at nondot.org (Chris Lattner) Date: Wed, 29 Aug 2007 16:15:23 -0000 Subject: [llvm-commits] [llvm] r41565 - in /llvm/trunk/lib/AsmParser: llvmAsmParser.cpp.cvs llvmAsmParser.y.cvs Message-ID: <200708291615.l7TGFNMH032275@zion.cs.uiuc.edu> Author: lattner Date: Wed Aug 29 11:15:23 2007 New Revision: 41565 URL: http://llvm.org/viewvc/llvm-project?rev=41565&view=rev Log: update these Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs?rev=41565&r1=41564&r2=41565&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs Wed Aug 29 11:15:23 2007 @@ -4549,7 +4549,7 @@ } // Create the InvokeInst - InvokeInst *II = new InvokeInst(V, Normal, Except, &Args[0], Args.size()); + InvokeInst *II = new InvokeInst(V, Normal, Except, Args.begin(), Args.end()); II->setCallingConv(yyvsp[-12].UIntVal); yyval.TermInstVal = II; delete yyvsp[-8].ValueRefList; Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs?rev=41565&r1=41564&r2=41565&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Wed Aug 29 11:15:23 2007 @@ -2652,7 +2652,7 @@ } // Create the InvokeInst - InvokeInst *II = new InvokeInst(V, Normal, Except, &Args[0], Args.size()); + InvokeInst *II = new InvokeInst(V, Normal, Except, Args.begin(), Args.end()); II->setCallingConv($2); $$ = II; delete $6; From sabre at nondot.org Wed Aug 29 11:21:19 2007 From: sabre at nondot.org (Chris Lattner) Date: Wed, 29 Aug 2007 16:21:19 -0000 Subject: [llvm-commits] [llvm] r41566 - /llvm/trunk/include/llvm/ADT/APInt.h Message-ID: <200708291621.l7TGLJFd032473@zion.cs.uiuc.edu> Author: lattner Date: Wed Aug 29 11:21:18 2007 New Revision: 41566 URL: http://llvm.org/viewvc/llvm-project?rev=41566&view=rev Log: getMinSignedBits needs to take into consider the sign bit when the value is positive. Modified: llvm/trunk/include/llvm/ADT/APInt.h Modified: llvm/trunk/include/llvm/ADT/APInt.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APInt.h?rev=41566&r1=41565&r2=41566&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/APInt.h (original) +++ llvm/trunk/include/llvm/ADT/APInt.h Wed Aug 29 11:21:18 2007 @@ -856,7 +856,7 @@ inline uint32_t getMinSignedBits() const { if (isNegative()) return BitWidth - countLeadingOnes() + 1; - return getActiveBits(); + return getActiveBits()+1; } /// This method attempts to return the value of this APInt as a zero extended From sabre at nondot.org Wed Aug 29 11:32:51 2007 From: sabre at nondot.org (Chris Lattner) Date: Wed, 29 Aug 2007 16:32:51 -0000 Subject: [llvm-commits] [llvm] r41567 - /llvm/trunk/include/llvm/Instructions.h Message-ID: <200708291632.l7TGWpEZ001452@zion.cs.uiuc.edu> Author: lattner Date: Wed Aug 29 11:32:50 2007 New Revision: 41567 URL: http://llvm.org/viewvc/llvm-project?rev=41567&view=rev Log: Silence implicit 64->32-bit conversion warnings. Modified: llvm/trunk/include/llvm/Instructions.h Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=41567&r1=41566&r2=41567&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Wed Aug 29 11:32:50 2007 @@ -762,17 +762,10 @@ // This argument ensures that we have an iterator we can // do arithmetic on in constant time std::random_access_iterator_tag) { - typename std::iterator_traits::difference_type NumArgs = - std::distance(ArgBegin, ArgEnd); - - if (NumArgs > 0) { - // This requires that the iterator points to contiguous memory. - init(Func, &*ArgBegin, NumArgs); - } - else { - init(Func, 0, NumArgs); - } + unsigned NumArgs = (unsigned)std::distance(ArgBegin, ArgEnd); + // This requires that the iterator points to contiguous memory. + init(Func, NumArgs ? &*ArgBegin : 0, NumArgs); setName(Name); } @@ -1552,17 +1545,10 @@ // This argument ensures that we have an iterator we can // do arithmetic on in constant time std::random_access_iterator_tag) { - typename std::iterator_traits::difference_type NumArgs = - std::distance(ArgBegin, ArgEnd); - - if (NumArgs > 0) { - // This requires that the iterator points to contiguous memory. - init(Func, IfNormal, IfException, &*ArgBegin, NumArgs); - } - else { - init(Func, IfNormal, IfException, 0, NumArgs); - } + unsigned NumArgs = (unsigned)std::distance(ArgBegin, ArgEnd); + // This requires that the iterator points to contiguous memory. + init(Func, IfNormal, IfException, NumArgs ? &*ArgBegin : 0, NumArgs); setName(Name); } From tonic at nondot.org Wed Aug 29 11:38:16 2007 From: tonic at nondot.org (Tanya Lattner) Date: Wed, 29 Aug 2007 16:38:16 -0000 Subject: [llvm-commits] [llvm] r41568 - /llvm/trunk/configure Message-ID: <200708291638.l7TGcHGw001990@zion.cs.uiuc.edu> Author: tbrethou Date: Wed Aug 29 11:38:16 2007 New Revision: 41568 URL: http://llvm.org/viewvc/llvm-project?rev=41568&view=rev Log: Updating configure script to enable MIPS. Modified: llvm/trunk/configure Modified: llvm/trunk/configure URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=41568&r1=41567&r2=41568&view=diff ============================================================================== --- llvm/trunk/configure (original) +++ llvm/trunk/configure Wed Aug 29 11:38:16 2007 @@ -2360,6 +2360,7 @@ alpha*-*) llvm_cv_target_arch="Alpha" ;; ia64-*) llvm_cv_target_arch="IA64" ;; arm-*) llvm_cv_target_arch="ARM" ;; + mips-*) llvm_cv_target_arch="Mips" ;; *) llvm_cv_target_arch="Unknown" ;; esac fi @@ -4645,6 +4646,8 @@ ;; ARM) TARGET_HAS_JIT=0 ;; + Mips) TARGET_HAS_JIT=0 + ;; *) TARGET_HAS_JIT=0 ;; esac @@ -4726,7 +4729,7 @@ fi case "$enableval" in - all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM" ;; + all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips" ;; host-only) case "$llvm_cv_target_arch" in x86) TARGETS_TO_BUILD="X86" ;; @@ -4736,6 +4739,7 @@ Alpha) TARGETS_TO_BUILD="Alpha" ;; IA64) TARGETS_TO_BUILD="IA64" ;; ARM) TARGETS_TO_BUILD="ARM" ;; + Mips) TARGETS_TO_BUILD="Mips" ;; *) { { echo "$as_me:$LINENO: error: Can not set target to build" >&5 echo "$as_me: error: Can not set target to build" >&2;} { (exit 1); exit 1; }; } ;; @@ -4750,6 +4754,7 @@ alpha) TARGETS_TO_BUILD="Alpha $TARGETS_TO_BUILD" ;; ia64) TARGETS_TO_BUILD="IA64 $TARGETS_TO_BUILD" ;; arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;; + mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;; *) { { echo "$as_me:$LINENO: error: Unrecognized target $a_target" >&5 echo "$as_me: error: Unrecognized target $a_target" >&2;} { (exit 1); exit 1; }; } ;; @@ -10369,7 +10374,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext < conftest.$ac_ext + echo '#line 12521 "configure"' > conftest.$ac_ext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? @@ -14231,11 +14236,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14234: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14239: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:14238: \$? = $ac_status" >&5 + echo "$as_me:14243: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -14499,11 +14504,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14502: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14507: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:14506: \$? = $ac_status" >&5 + echo "$as_me:14511: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -14603,11 +14608,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14606: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14611: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:14610: \$? = $ac_status" >&5 + echo "$as_me:14615: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -17055,7 +17060,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext < conftest.$ac_ext <&5) + (eval echo "\"\$as_me:19531: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:19530: \$? = $ac_status" >&5 + echo "$as_me:19535: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -19627,11 +19632,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:19630: $lt_compile\"" >&5) + (eval echo "\"\$as_me:19635: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:19634: \$? = $ac_status" >&5 + echo "$as_me:19639: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -21197,11 +21202,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:21200: $lt_compile\"" >&5) + (eval echo "\"\$as_me:21205: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:21204: \$? = $ac_status" >&5 + echo "$as_me:21209: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -21301,11 +21306,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:21304: $lt_compile\"" >&5) + (eval echo "\"\$as_me:21309: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:21308: \$? = $ac_status" >&5 + echo "$as_me:21313: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -23536,11 +23541,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:23539: $lt_compile\"" >&5) + (eval echo "\"\$as_me:23544: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:23543: \$? = $ac_status" >&5 + echo "$as_me:23548: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -23804,11 +23809,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:23807: $lt_compile\"" >&5) + (eval echo "\"\$as_me:23812: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:23811: \$? = $ac_status" >&5 + echo "$as_me:23816: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -23908,11 +23913,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:23911: $lt_compile\"" >&5) + (eval echo "\"\$as_me:23916: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:23915: \$? = $ac_status" >&5 + echo "$as_me:23920: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized From raulherbster at gmail.com Wed Aug 29 11:51:53 2007 From: raulherbster at gmail.com (Raul Herbster) Date: Wed, 29 Aug 2007 16:51:53 -0000 Subject: [llvm-commits] [llvm] r41569 - /llvm/trunk/CREDITS.TXT Message-ID: <200708291651.l7TGpr6j002570@zion.cs.uiuc.edu> Author: raulherbster Date: Wed Aug 29 11:51:52 2007 New Revision: 41569 URL: http://llvm.org/viewvc/llvm-project?rev=41569&view=rev Log: New contributor added Modified: llvm/trunk/CREDITS.TXT Modified: llvm/trunk/CREDITS.TXT URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CREDITS.TXT?rev=41569&r1=41568&r2=41569&view=diff ============================================================================== --- llvm/trunk/CREDITS.TXT (original) +++ llvm/trunk/CREDITS.TXT Wed Aug 29 11:51:52 2007 @@ -240,4 +240,6 @@ D: MMX & SSSE3 instructions D: SPEC2006 support - +N: Raul Fernandes Herbster +E: raul at dsc.ufcg.edu.br +D: JIT support for ARM From evan.cheng at apple.com Wed Aug 29 12:55:47 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 29 Aug 2007 17:55:47 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r41573 - /llvm-gcc-4.0/trunk/gcc/config/i386/i386.h Message-ID: <200708291755.l7THtlV8004365@zion.cs.uiuc.edu> Author: evancheng Date: Wed Aug 29 12:55:47 2007 New Revision: 41573 URL: http://llvm.org/viewvc/llvm-project?rev=41573&view=rev Log: Added missing x86 feature string for 64-bit mode. Modified: llvm-gcc-4.0/trunk/gcc/config/i386/i386.h Modified: llvm-gcc-4.0/trunk/gcc/config/i386/i386.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/config/i386/i386.h?rev=41573&r1=41572&r2=41573&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/config/i386/i386.h (original) +++ llvm-gcc-4.0/trunk/gcc/config/i386/i386.h Wed Aug 29 12:55:47 2007 @@ -4037,6 +4037,7 @@ F.setCPU(TARGET_64BIT ? "core2" : "yonah"); \ else \ F.setCPU(ix86_arch_string); \ + if (TARGET_64BIT) F.AddFeature("64bit"); \ if (TARGET_MMX) F.AddFeature("mmx"); \ if (TARGET_SSE) F.AddFeature("sse"); \ if (TARGET_SSE2) F.AddFeature("sse2"); \ From clattner at apple.com Wed Aug 29 12:57:51 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 29 Aug 2007 10:57:51 -0700 Subject: [llvm-commits] [llvm-gcc-4.0] r41573 - /llvm-gcc-4.0/trunk/gcc/config/i386/i386.h In-Reply-To: <200708291755.l7THtlV8004365@zion.cs.uiuc.edu> References: <200708291755.l7THtlV8004365@zion.cs.uiuc.edu> Message-ID: <62F03796-9F3F-4609-8F84-0D8D54D7589F@apple.com> Thanks Evan, don't forget to apply this to 4.2 also :) -Chris On Aug 29, 2007, at 10:55 AM, Evan Cheng wrote: > Author: evancheng > Date: Wed Aug 29 12:55:47 2007 > New Revision: 41573 > > URL: http://llvm.org/viewvc/llvm-project?rev=41573&view=rev > Log: > Added missing x86 feature string for 64-bit mode. > > Modified: > llvm-gcc-4.0/trunk/gcc/config/i386/i386.h > > Modified: llvm-gcc-4.0/trunk/gcc/config/i386/i386.h > URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/ > config/i386/i386.h?rev=41573&r1=41572&r2=41573&view=diff > > ====================================================================== > ======== > --- llvm-gcc-4.0/trunk/gcc/config/i386/i386.h (original) > +++ llvm-gcc-4.0/trunk/gcc/config/i386/i386.h Wed Aug 29 12:55:47 2007 > @@ -4037,6 +4037,7 @@ > F.setCPU(TARGET_64BIT ? "core2" : "yonah"); \ > else \ > F.setCPU(ix86_arch_string); \ > + if (TARGET_64BIT) F.AddFeature("64bit"); \ > if (TARGET_MMX) F.AddFeature("mmx"); \ > if (TARGET_SSE) F.AddFeature("sse"); \ > if (TARGET_SSE2) F.AddFeature("sse2"); \ > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Wed Aug 29 12:58:48 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 29 Aug 2007 10:58:48 -0700 Subject: [llvm-commits] Trampoline support (pointers nested funtions) In-Reply-To: <200708282046.09468.baldrick@free.fr> References: <200707261656.20050.baldrick@free.fr> <200707271238.09287.baldrick@free.fr> <58FA8553-7B71-44ED-B78A-730170AF6DC7@apple.com> <200708282046.09468.baldrick@free.fr> Message-ID: <0A3629A9-F675-45B9-84EA-E6EC21E27E74@apple.com> On Aug 28, 2007, at 11:46 AM, Duncan Sands wrote: > Hi Evan, thanks for your comments. > >>>> 3. In X86TargetLowering::LowerTRAMPOLINE(): >>>> + case CallingConv::X86_StdCall: { >>>> + Move = 0xb9; // Pass chain in ECX >>>> >>>> I assume this is the ModR/M byte? >>> >>> Well, it's MOV32ri. >> >> Then it should be 0xb8? > > It already had ECX or'd in. Then plz write something like "0xb8 | 1" and comment it so it's more clear (to me at least :-). > >> Please factor out getX86RegNum() as well. Perhaps put them in >> X86RegisterInfo.cpp (since lowering really shouldn't depend on >> codeemitter...) Do getX86RegNum(X86::EAX) rather than make use >> N86::EAX directly. > ... >> Please go through X86InstrInfo to get the opcode numbers instead of >> hard coding it. > > Does the attached patch seem OK? Yes, thx. Evan > > Ciao, > > Duncan. > From isanbard at gmail.com Wed Aug 29 13:00:13 2007 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 29 Aug 2007 11:00:13 -0700 Subject: [llvm-commits] [llvm] r41569 - /llvm/trunk/CREDITS.TXT In-Reply-To: <200708291651.l7TGpr6j002570@zion.cs.uiuc.edu> References: <200708291651.l7TGpr6j002570@zion.cs.uiuc.edu> Message-ID: <16e5fdf90708291100h174c054bub0e3eb489bc93e5f@mail.gmail.com> On 8/29/07, Raul Herbster wrote: > --- llvm/trunk/CREDITS.TXT (original) > +++ llvm/trunk/CREDITS.TXT Wed Aug 29 11:51:52 2007 > @@ -240,4 +240,6 @@ > D: MMX & SSSE3 instructions > D: SPEC2006 support > > - > +N: Raul Fernandes Herbster > +E: raul at dsc.ufcg.edu.br > +D: JIT support for ARM > Please alphabetize. Thanks! -bw From evan.cheng at apple.com Wed Aug 29 13:19:23 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 29 Aug 2007 18:19:23 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41575 - /llvm-gcc-4.2/trunk/gcc/config/i386/i386.h Message-ID: <200708291819.l7TIJNhO005355@zion.cs.uiuc.edu> Author: evancheng Date: Wed Aug 29 13:19:23 2007 New Revision: 41575 URL: http://llvm.org/viewvc/llvm-project?rev=41575&view=rev Log: Merge -r41572:41573 llvm-gcc-4.0/trunk Modified: llvm-gcc-4.2/trunk/gcc/config/i386/i386.h Modified: llvm-gcc-4.2/trunk/gcc/config/i386/i386.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/i386.h?rev=41575&r1=41574&r2=41575&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/i386.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/i386.h Wed Aug 29 13:19:23 2007 @@ -3707,6 +3707,7 @@ F.setCPU(TARGET_64BIT ? "core2" : "yonah"); \ else \ F.setCPU(ix86_arch_string); \ + if (TARGET_64BIT) F.AddFeature("64bit"); \ if (TARGET_MMX) F.AddFeature("mmx"); \ if (TARGET_SSE) F.AddFeature("sse"); \ if (TARGET_SSE2) F.AddFeature("sse2"); \ From raulherbster at gmail.com Wed Aug 29 13:21:29 2007 From: raulherbster at gmail.com (Raul Herbster) Date: Wed, 29 Aug 2007 18:21:29 -0000 Subject: [llvm-commits] [llvm] r41576 - /llvm/trunk/CREDITS.TXT Message-ID: <200708291821.l7TILT6X005463@zion.cs.uiuc.edu> Author: raulherbster Date: Wed Aug 29 13:21:29 2007 New Revision: 41576 URL: http://llvm.org/viewvc/llvm-project?rev=41576&view=rev Log: Alphabetize Raul's entry. Modified: llvm/trunk/CREDITS.TXT Modified: llvm/trunk/CREDITS.TXT URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CREDITS.TXT?rev=41576&r1=41575&r2=41576&view=diff ============================================================================== --- llvm/trunk/CREDITS.TXT (original) +++ llvm/trunk/CREDITS.TXT Wed Aug 29 13:21:29 2007 @@ -105,6 +105,10 @@ D: Miscellaneous bug fixes D: Register allocation refactoring +N: Raul Fernandes Herbster +E: raul at dsc.ufcg.edu.br +D: JIT support for ARM + N: Paolo Invernizzi E: arathorn at fastwebnet.it D: Visual C++ compatibility fixes @@ -240,6 +244,3 @@ D: MMX & SSSE3 instructions D: SPEC2006 support -N: Raul Fernandes Herbster -E: raul at dsc.ufcg.edu.br -D: JIT support for ARM From baldrick at free.fr Wed Aug 29 14:01:21 2007 From: baldrick at free.fr (Duncan Sands) Date: Wed, 29 Aug 2007 19:01:21 -0000 Subject: [llvm-commits] [llvm] r41577 - in /llvm/trunk/lib/Target/X86: X86CodeEmitter.cpp X86CodeEmitter.h X86ISelLowering.cpp X86InstrInfo.h X86RegisterInfo.cpp X86RegisterInfo.h Message-ID: <200708291901.l7TJ1LPC007790@zion.cs.uiuc.edu> Author: baldrick Date: Wed Aug 29 14:01:20 2007 New Revision: 41577 URL: http://llvm.org/viewvc/llvm-project?rev=41577&view=rev Log: Move getX86RegNum into X86RegisterInfo and use it in the trampoline lowering. Lookup the jump and mov opcodes for the trampoline rather than hard coding them. Removed: llvm/trunk/lib/Target/X86/X86CodeEmitter.h Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86InstrInfo.h llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp llvm/trunk/lib/Target/X86/X86RegisterInfo.h Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=41577&r1=41576&r2=41577&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Wed Aug 29 14:01:20 2007 @@ -13,7 +13,6 @@ //===----------------------------------------------------------------------===// #define DEBUG_TYPE "x86-emitter" -#include "X86CodeEmitter.h" #include "X86InstrInfo.h" #include "X86Subtarget.h" #include "X86TargetMachine.h" @@ -193,60 +192,8 @@ MCE.emitWordLE(0); // The relocated value will be added to the displacement } -// getX86RegNum - This function maps LLVM register identifiers to their X86 -// specific numbering, which is used in various places encoding instructions. -// unsigned Emitter::getX86RegNum(unsigned RegNo) { - switch(RegNo) { - case X86::RAX: case X86::EAX: case X86::AX: case X86::AL: return N86::EAX; - case X86::RCX: case X86::ECX: case X86::CX: case X86::CL: return N86::ECX; - case X86::RDX: case X86::EDX: case X86::DX: case X86::DL: return N86::EDX; - case X86::RBX: case X86::EBX: case X86::BX: case X86::BL: return N86::EBX; - case X86::RSP: case X86::ESP: case X86::SP: case X86::SPL: case X86::AH: - return N86::ESP; - case X86::RBP: case X86::EBP: case X86::BP: case X86::BPL: case X86::CH: - return N86::EBP; - case X86::RSI: case X86::ESI: case X86::SI: case X86::SIL: case X86::DH: - return N86::ESI; - case X86::RDI: case X86::EDI: case X86::DI: case X86::DIL: case X86::BH: - return N86::EDI; - - case X86::R8: case X86::R8D: case X86::R8W: case X86::R8B: - return N86::EAX; - case X86::R9: case X86::R9D: case X86::R9W: case X86::R9B: - return N86::ECX; - case X86::R10: case X86::R10D: case X86::R10W: case X86::R10B: - return N86::EDX; - case X86::R11: case X86::R11D: case X86::R11W: case X86::R11B: - return N86::EBX; - case X86::R12: case X86::R12D: case X86::R12W: case X86::R12B: - return N86::ESP; - case X86::R13: case X86::R13D: case X86::R13W: case X86::R13B: - return N86::EBP; - case X86::R14: case X86::R14D: case X86::R14W: case X86::R14B: - return N86::ESI; - case X86::R15: case X86::R15D: case X86::R15W: case X86::R15B: - return N86::EDI; - - case X86::ST0: case X86::ST1: case X86::ST2: case X86::ST3: - case X86::ST4: case X86::ST5: case X86::ST6: case X86::ST7: - return RegNo-X86::ST0; - - case X86::XMM0: case X86::XMM1: case X86::XMM2: case X86::XMM3: - case X86::XMM4: case X86::XMM5: case X86::XMM6: case X86::XMM7: - return II->getRegisterInfo().getDwarfRegNum(RegNo) - - II->getRegisterInfo().getDwarfRegNum(X86::XMM0); - case X86::XMM8: case X86::XMM9: case X86::XMM10: case X86::XMM11: - case X86::XMM12: case X86::XMM13: case X86::XMM14: case X86::XMM15: - return II->getRegisterInfo().getDwarfRegNum(RegNo) - - II->getRegisterInfo().getDwarfRegNum(X86::XMM8); - - default: - assert(MRegisterInfo::isVirtualRegister(RegNo) && - "Unknown physical register!"); - assert(0 && "Register allocator hasn't allocated reg correctly yet!"); - return 0; - } + return ((X86RegisterInfo&)II->getRegisterInfo()).getX86RegNum(RegNo); } inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode, Removed: llvm/trunk/lib/Target/X86/X86CodeEmitter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.h?rev=41576&view=auto ============================================================================== --- llvm/trunk/lib/Target/X86/X86CodeEmitter.h (original) +++ llvm/trunk/lib/Target/X86/X86CodeEmitter.h (removed) @@ -1,25 +0,0 @@ -//===-- X86CodeEmitter.h - X86 DAG Lowering Interface -----------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by Duncan Sands and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file defines utilities for X86 code emission. -// -//===----------------------------------------------------------------------===// - -#ifndef X86CODEEMITTER_H -#define X86CODEEMITTER_H - -/// N86 namespace - Native X86 Register numbers... used by X86 backend. -/// -namespace N86 { - enum { - EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7 - }; -} - -#endif // X86CODEEMITTER_H Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=41577&r1=41576&r2=41577&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Aug 29 14:01:20 2007 @@ -13,7 +13,6 @@ //===----------------------------------------------------------------------===// #include "X86.h" -#include "X86CodeEmitter.h" #include "X86InstrBuilder.h" #include "X86ISelLowering.h" #include "X86MachineFunctionInfo.h" @@ -4330,7 +4329,7 @@ Function *Func = (Function *) cast(cast(Op.getOperand(5))->getValue()); unsigned CC = Func->getCallingConv(); - unsigned char NestReg; + unsigned NestReg; switch (CC) { default: @@ -4340,7 +4339,7 @@ case CallingConv::X86_StdCall: { // Pass 'nest' parameter in ECX. // Must be kept in sync with X86CallingConv.td - NestReg = N86::ECX; + NestReg = X86::ECX; // Check that ECX wasn't needed by an 'inreg' parameter. const FunctionType *FTy = Func->getFunctionType(); @@ -4366,26 +4365,29 @@ case CallingConv::X86_FastCall: // Pass 'nest' parameter in EAX. // Must be kept in sync with X86CallingConv.td - NestReg = N86::EAX; + NestReg = X86::EAX; break; } + const X86InstrInfo *TII = + ((X86TargetMachine&)getTargetMachine()).getInstrInfo(); + SDOperand OutChains[4]; SDOperand Addr, Disp; Addr = DAG.getNode(ISD::ADD, MVT::i32, Trmp, DAG.getConstant(10, MVT::i32)); Disp = DAG.getNode(ISD::SUB, MVT::i32, FPtr, Addr); - const unsigned char MOV32ri = 0xB8; - const unsigned char JMP = 0xE9; - - OutChains[0] = DAG.getStore(Root, DAG.getConstant(MOV32ri|NestReg, MVT::i8), + unsigned char MOV32ri = TII->getBaseOpcodeFor(X86::MOV32ri); + unsigned char N86Reg = ((X86RegisterInfo&)RegInfo).getX86RegNum(NestReg); + OutChains[0] = DAG.getStore(Root, DAG.getConstant(MOV32ri|N86Reg, MVT::i8), Trmp, TrmpSV->getValue(), TrmpSV->getOffset()); Addr = DAG.getNode(ISD::ADD, MVT::i32, Trmp, DAG.getConstant(1, MVT::i32)); OutChains[1] = DAG.getStore(Root, Nest, Addr, TrmpSV->getValue(), TrmpSV->getOffset() + 1, false, 1); + unsigned char JMP = TII->getBaseOpcodeFor(X86::JMP); Addr = DAG.getNode(ISD::ADD, MVT::i32, Trmp, DAG.getConstant(5, MVT::i32)); OutChains[2] = DAG.getStore(Root, DAG.getConstant(JMP, MVT::i8), Addr, TrmpSV->getValue() + 5, TrmpSV->getOffset()); Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=41577&r1=41576&r2=41577&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Wed Aug 29 14:01:20 2007 @@ -275,11 +275,14 @@ const TargetRegisterClass *getPointerRegClass() const; // getBaseOpcodeFor - This function returns the "base" X86 opcode for the - // specified opcode number. + // specified machine instruction. // unsigned char getBaseOpcodeFor(const TargetInstrDescriptor *TID) const { return TID->TSFlags >> X86II::OpcodeShift; } + unsigned char getBaseOpcodeFor(MachineOpCode Opcode) const { + return getBaseOpcodeFor(&get(Opcode)); + } }; } // End llvm namespace Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=41577&r1=41576&r2=41577&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Wed Aug 29 14:01:20 2007 @@ -65,6 +65,59 @@ } } +// getX86RegNum - This function maps LLVM register identifiers to their X86 +// specific numbering, which is used in various places encoding instructions. +// +unsigned X86RegisterInfo::getX86RegNum(unsigned RegNo) { + switch(RegNo) { + case X86::RAX: case X86::EAX: case X86::AX: case X86::AL: return N86::EAX; + case X86::RCX: case X86::ECX: case X86::CX: case X86::CL: return N86::ECX; + case X86::RDX: case X86::EDX: case X86::DX: case X86::DL: return N86::EDX; + case X86::RBX: case X86::EBX: case X86::BX: case X86::BL: return N86::EBX; + case X86::RSP: case X86::ESP: case X86::SP: case X86::SPL: case X86::AH: + return N86::ESP; + case X86::RBP: case X86::EBP: case X86::BP: case X86::BPL: case X86::CH: + return N86::EBP; + case X86::RSI: case X86::ESI: case X86::SI: case X86::SIL: case X86::DH: + return N86::ESI; + case X86::RDI: case X86::EDI: case X86::DI: case X86::DIL: case X86::BH: + return N86::EDI; + + case X86::R8: case X86::R8D: case X86::R8W: case X86::R8B: + return N86::EAX; + case X86::R9: case X86::R9D: case X86::R9W: case X86::R9B: + return N86::ECX; + case X86::R10: case X86::R10D: case X86::R10W: case X86::R10B: + return N86::EDX; + case X86::R11: case X86::R11D: case X86::R11W: case X86::R11B: + return N86::EBX; + case X86::R12: case X86::R12D: case X86::R12W: case X86::R12B: + return N86::ESP; + case X86::R13: case X86::R13D: case X86::R13W: case X86::R13B: + return N86::EBP; + case X86::R14: case X86::R14D: case X86::R14W: case X86::R14B: + return N86::ESI; + case X86::R15: case X86::R15D: case X86::R15W: case X86::R15B: + return N86::EDI; + + case X86::ST0: case X86::ST1: case X86::ST2: case X86::ST3: + case X86::ST4: case X86::ST5: case X86::ST6: case X86::ST7: + return RegNo-X86::ST0; + + case X86::XMM0: case X86::XMM1: case X86::XMM2: case X86::XMM3: + case X86::XMM4: case X86::XMM5: case X86::XMM6: case X86::XMM7: + return getDwarfRegNum(RegNo) - getDwarfRegNum(X86::XMM0); + case X86::XMM8: case X86::XMM9: case X86::XMM10: case X86::XMM11: + case X86::XMM12: case X86::XMM13: case X86::XMM14: case X86::XMM15: + return getDwarfRegNum(RegNo) - getDwarfRegNum(X86::XMM8); + + default: + assert(isVirtualRegister(RegNo) && "Unknown physical register!"); + assert(0 && "Register allocator hasn't allocated reg correctly yet!"); + return 0; + } +} + bool X86RegisterInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector &CSI) const { Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.h?rev=41577&r1=41576&r2=41577&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.h (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.h Wed Aug 29 14:01:20 2007 @@ -22,6 +22,14 @@ class TargetInstrInfo; class X86TargetMachine; +/// N86 namespace - Native X86 register numbers +/// +namespace N86 { + enum { + EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7 + }; +} + class X86RegisterInfo : public X86GenRegisterInfo { public: X86TargetMachine &TM; @@ -43,6 +51,10 @@ public: X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii); + /// getX86RegNum - Returns the native X86 register number for the given LLVM + /// register identifier. + unsigned getX86RegNum(unsigned RegNo); + /// Code Generation virtual methods... bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, From baldrick at free.fr Wed Aug 29 14:03:09 2007 From: baldrick at free.fr (Duncan Sands) Date: Wed, 29 Aug 2007 21:03:09 +0200 Subject: [llvm-commits] Trampoline support (pointers nested funtions) In-Reply-To: <0A3629A9-F675-45B9-84EA-E6EC21E27E74@apple.com> References: <200707261656.20050.baldrick@free.fr> <200708282046.09468.baldrick@free.fr> <0A3629A9-F675-45B9-84EA-E6EC21E27E74@apple.com> Message-ID: <200708292103.10371.baldrick@free.fr> Hi Evan, > > It already had ECX or'd in. > > Then plz write something like "0xb8 | 1" and comment it so it's more > clear (to me at least :-). this is from the original version - the version I committed before the holidays already did 0xb8 | 1, and the version I just committed does it even better :) > > Does the attached patch seem OK? > > Yes, thx. Thanks for the review! I just committed it. Ciao, Duncan. From asl at math.spbu.ru Wed Aug 29 14:28:30 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 29 Aug 2007 19:28:30 -0000 Subject: [llvm-commits] [llvm] r41578 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200708291928.l7TJSUTw009259@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 29 14:28:29 2007 New Revision: 41578 URL: http://llvm.org/viewvc/llvm-project?rev=41578&view=rev Log: Lower FRAME_TO_ADDR_OFFSET to zero by default (if not custom lowered) Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=41578&r1=41577&r2=41578&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Aug 29 14:28:29 2007 @@ -733,7 +733,6 @@ break; case ISD::FRAMEADDR: case ISD::RETURNADDR: - case ISD::FRAME_TO_ARGS_OFFSET: // The only option for these nodes is to custom lower them. If the target // does not custom lower them, then return zero. Tmp1 = TLI.LowerOperation(Op, DAG); @@ -742,6 +741,19 @@ else Result = DAG.getConstant(0, TLI.getPointerTy()); break; + case ISD::FRAME_TO_ARGS_OFFSET: + MVT::ValueType VT = Node->getValueType(0); + switch (TLI.getOperationAction(Node->getOpcode(), VT)) { + default: assert(0 && "This action is not supported yet!"); + case TargetLowering::Custom: + Result = TLI.LowerOperation(Op, DAG); + if (Result.Val) break; + // Fall Thru + case TargetLowering::Legal: + Result = DAG.getConstant(0, VT); + break; + } + break; case ISD::EXCEPTIONADDR: { Tmp1 = LegalizeOp(Node->getOperand(0)); MVT::ValueType VT = Node->getValueType(0); From evan.cheng at apple.com Wed Aug 29 15:45:00 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 29 Aug 2007 20:45:00 -0000 Subject: [llvm-commits] [llvm] r41579 - in /llvm/trunk: include/llvm/CodeGen/LiveInterval.h include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveInterval.cpp lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/SimpleRegisterCoalescing.cpp Message-ID: <200708292045.l7TKj0nV013628@zion.cs.uiuc.edu> Author: evancheng Date: Wed Aug 29 15:45:00 2007 New Revision: 41579 URL: http://llvm.org/viewvc/llvm-project?rev=41579&view=rev Log: Change LiveRange so it keeps a pointer to the VNInfo rather than an index. Changes related modules so VNInfo's are not copied. This decrease copy coalescing time by 45% and overall compilation time by 10% on siod. Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h llvm/trunk/lib/CodeGen/LiveInterval.cpp llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveInterval.h?rev=41579&r1=41578&r2=41579&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveInterval.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveInterval.h Wed Aug 29 15:45:00 2007 @@ -30,6 +30,26 @@ namespace llvm { class MachineInstr; class MRegisterInfo; + struct LiveInterval; + + /// VNInfo - If the value number definition is undefined (e.g. phi + /// merge point), it contains ~0u,x. If the value number is not in use, it + /// contains ~1u,x to indicate that the value # is not used. + /// parent- LiveInterval parent. + /// def - Instruction # of the definition. + /// reg - Source reg iff val# is defined by a copy; zero otherwise. + /// kills - Instruction # of the kills. If a kill is an odd #, it means + /// the kill is a phi join point. + struct VNInfo { + LiveInterval *parent; + unsigned id; + unsigned def; + unsigned reg; + SmallVector kills; + VNInfo() : parent(0), id(~1U), def(~1U), reg(0) {} + VNInfo(LiveInterval *p, unsigned i, unsigned d, unsigned r) + : parent(p), id(i), def(d), reg(r) {} + }; /// LiveRange structure - This represents a simple register range in the /// program, with an inclusive start point and an exclusive end point. @@ -37,9 +57,9 @@ struct LiveRange { unsigned start; // Start point of the interval (inclusive) unsigned end; // End point of the interval (exclusive) - unsigned ValId; // identifier for the value contained in this interval. + VNInfo *valno; // identifier for the value contained in this interval. - LiveRange(unsigned S, unsigned E, unsigned V) : start(S), end(E), ValId(V) { + LiveRange(unsigned S, unsigned E, VNInfo *V) : start(S), end(E), valno(V) { assert(S < E && "Cannot create empty or backwards range"); } @@ -80,36 +100,18 @@ /// state. struct LiveInterval { typedef SmallVector Ranges; + typedef SmallVector VNInfoList; + unsigned reg; // the register of this interval unsigned preference; // preferred register to allocate for this interval float weight; // weight of this interval Ranges ranges; // the ranges in which this register is live - - /// ValueNumberInfo - If the value number definition is undefined (e.g. phi - /// merge point), it contains ~0u,x. If the value number is not in use, it - /// contains ~1u,x to indicate that the value # is not used. - /// def - Instruction # of the definition. - /// reg - Source reg iff val# is defined by a copy; zero otherwise. - /// kills - Instruction # of the kills. If a kill is an odd #, it means - /// the kill is a phi join point. - struct VNInfo { - unsigned def; - unsigned reg; - SmallVector kills; - VNInfo() : def(~1U), reg(0) {} - VNInfo(unsigned d, unsigned r) : def(d), reg(r) {} - }; - - typedef std::vector VNInfoList; - VNInfoList ValueNumberInfo; + unsigned numvals; // number of value#'s + VNInfoList valnos; // value#'s public: LiveInterval(unsigned Reg, float Weight) - : reg(Reg), preference(0), weight(Weight) { - } - - ~LiveInterval() { - ValueNumberInfo.clear(); + : reg(Reg), preference(0), weight(Weight), numvals(0) { } typedef Ranges::iterator iterator; @@ -121,12 +123,21 @@ const_iterator end() const { return ranges.end(); } typedef VNInfoList::iterator vni_iterator; - vni_iterator vni_begin() { return ValueNumberInfo.begin(); } - vni_iterator vni_end() { return ValueNumberInfo.end(); } + vni_iterator vni_begin() { return valnos.begin(); } + vni_iterator vni_end() { return valnos.end(); } typedef VNInfoList::const_iterator const_vni_iterator; - const_vni_iterator vni_begin() const { return ValueNumberInfo.begin(); } - const_vni_iterator vni_end() const { return ValueNumberInfo.end(); } + const_vni_iterator vni_begin() const { return valnos.begin(); } + const_vni_iterator vni_end() const { return valnos.end(); } + + ~LiveInterval() { + for (vni_iterator i = vni_begin(), e = vni_end(); i != e; ++i) { + VNInfo *VNI = *i; + if (VNI->parent == this) + delete VNI; + } + valnos.clear(); + } /// advanceTo - Advance the specified iterator to point to the LiveRange /// containing the specified position, or end() if the position is past the @@ -140,79 +151,39 @@ return I; } - bool containsOneValue() const { return ValueNumberInfo.size() == 1; } + bool containsOneValue() const { return numvals == 1; } - unsigned getNumValNums() const { return ValueNumberInfo.size(); } + unsigned getNumValNums() const { return numvals; } - /// getValNumInfo - Returns a copy of the specified val#. + /// getFirstValNumInfo - Returns pointer to the first val#. /// - inline VNInfo& getValNumInfo(unsigned ValNo) { - return ValueNumberInfo[ValNo]; + inline VNInfo *getFirstValNumInfo() { + return valnos.front(); } - inline const VNInfo& getValNumInfo(unsigned ValNo) const { - return ValueNumberInfo[ValNo]; + inline const VNInfo *getFirstValNumInfo() const { + return valnos.front(); } /// copyValNumInfo - Copy the value number info for one value number to /// another. - void copyValNumInfo(unsigned DstValNo, unsigned SrcValNo) { - VNInfo &vnd = getValNumInfo(DstValNo); - const VNInfo &vns = getValNumInfo(SrcValNo); - vnd.def = vns.def; - vnd.reg = vns.reg; - vnd.kills = vns.kills; - } - void copyValNumInfo(unsigned DstValNo, const LiveInterval &SrcLI, - unsigned SrcValNo) { - VNInfo &vnd = getValNumInfo(DstValNo); - const VNInfo &vns = SrcLI.getValNumInfo(SrcValNo); - vnd.def = vns.def; - vnd.reg = vns.reg; - vnd.kills = vns.kills; + void copyValNumInfo(VNInfo &DstValNo, VNInfo &SrcValNo) { + DstValNo.def = SrcValNo.def; + DstValNo.reg = SrcValNo.reg; + DstValNo.kills = SrcValNo.kills; } /// getNextValue - Create a new value number and return it. MIIdx specifies /// the instruction that defines the value number. - unsigned getNextValue(unsigned MIIdx, unsigned SrcReg) { - ValueNumberInfo.push_back(VNInfo(MIIdx, SrcReg)); - return ValueNumberInfo.size()-1; - } - - /// getDefForValNum - Return the machine instruction index that defines the - /// specified value number. - unsigned getDefForValNum(unsigned ValNo) const { - return getValNumInfo(ValNo).def; - } - - /// getSrcRegForValNum - If the machine instruction that defines the - /// specified value number is a copy, returns the source register. Otherwise, - /// returns zero. - unsigned getSrcRegForValNum(unsigned ValNo) const { - return getValNumInfo(ValNo).reg; - } - - /// setDefForValNum - Set the machine instruction index that defines the - /// specified value number. - void setDefForValNum(unsigned ValNo, unsigned NewDef) { - getValNumInfo(ValNo).def = NewDef; - } - - /// setSrcRegForValNum - Set the source register of the specified value - /// number. - void setSrcRegForValNum(unsigned ValNo, unsigned NewReg) { - getValNumInfo(ValNo).reg = NewReg; - } - - /// getKillsForValNum - Return the kill instruction indexes of the specified - /// value number. - const SmallVector &getKillsForValNum(unsigned ValNo) const { - return getValNumInfo(ValNo).kills; + VNInfo *getNextValue(unsigned MIIdx, unsigned SrcReg) { + VNInfo *VNI = new VNInfo(this, numvals++, MIIdx, SrcReg); + valnos.push_back(VNI); + return VNI; } /// addKillForValNum - Add a kill instruction index to the specified value /// number. - void addKillForValNum(unsigned ValNo, unsigned KillIdx) { - SmallVector &kills = getValNumInfo(ValNo).kills; + static void addKill(VNInfo &VNI, unsigned KillIdx) { + SmallVector &kills = VNI.kills; if (kills.empty()) { kills.push_back(KillIdx); } else { @@ -235,24 +206,6 @@ } } - /// addKillsForValNum - Add a number of kills into the kills vector of - /// the specified value number. - void addKillsForValNum(unsigned ValNo, - const SmallVector &kills) { - addKills(getValNumInfo(ValNo), kills); - } - - /// isKillForValNum - Returns true if KillIdx is a kill of the specified - /// val#. - bool isKillForValNum(unsigned ValNo, unsigned KillIdx) const { - const SmallVector &kills = getValNumInfo(ValNo).kills; - SmallVector::const_iterator - I = std::lower_bound(kills.begin(), kills.end(), KillIdx); - if (I == kills.end()) - return false; - return *I == KillIdx; - } - /// removeKill - Remove the specified kill from the list of kills of /// the specified val#. static bool removeKill(VNInfo &VNI, unsigned KillIdx) { @@ -266,49 +219,22 @@ return false; } - /// removeKillForValNum - Remove the specified kill from the list of kills - /// of the specified val#. - bool removeKillForValNum(unsigned ValNo, unsigned KillIdx) { - return removeKill(getValNumInfo(ValNo), KillIdx); - } - - /// removeKillForValNum - Remove all the kills in specified range + /// removeKills - Remove all the kills in specified range /// [Start, End] of the specified val#. - void removeKillForValNum(unsigned ValNo, unsigned Start, unsigned End) { - SmallVector &kills = getValNumInfo(ValNo).kills; + void removeKills(VNInfo &VNI, unsigned Start, unsigned End) { + SmallVector &kills = VNI.kills; SmallVector::iterator I = std::lower_bound(kills.begin(), kills.end(), Start); SmallVector::iterator E = std::upper_bound(kills.begin(), kills.end(), End); kills.erase(I, E); } - - /// replaceKill - Replace a kill index of the specified value# with a new - /// kill. Returns true if OldKill was indeed a kill point. - static bool replaceKill(VNInfo &VNI, unsigned OldKill, unsigned NewKill) { - SmallVector &kills = VNI.kills; - SmallVector::iterator - I = std::lower_bound(kills.begin(), kills.end(), OldKill); - if (I != kills.end() && *I == OldKill) { - *I = NewKill; - return true; - } - return false; - } - - /// replaceKillForValNum - Replace a kill index of the specified value# with - /// a new kill. Returns true if OldKill was indeed a kill point. - bool replaceKillForValNum(unsigned ValNo, unsigned OldKill, - unsigned NewKill) { - assert(ValNo < ValueNumberInfo.size()); - return replaceKill(getValNumInfo(ValNo), OldKill, NewKill); - } /// MergeValueNumberInto - This method is called when two value nubmers /// are found to be equivalent. This eliminates V1, replacing all /// LiveRanges with the V1 value number with the V2 value number. This can /// cause merging of V1/V2 values numbers and compaction of the value space. - void MergeValueNumberInto(unsigned V1, unsigned V2); + void MergeValueNumberInto(VNInfo *V1, VNInfo *V2); /// MergeInClobberRanges - For any live ranges that are not defined in the /// current interval, but are defined in the Clobbers interval, mark them @@ -320,7 +246,7 @@ /// interval as the specified value number. The LiveRanges in RHS are /// allowed to overlap with LiveRanges in the current interval, but only if /// the overlapping LiveRanges have the specified value number. - void MergeRangesInAsValue(const LiveInterval &RHS, unsigned LHSValNo); + void MergeRangesInAsValue(const LiveInterval &RHS, VNInfo *LHSValNo); bool empty() const { return ranges.empty(); } @@ -386,8 +312,7 @@ /// mappings to the value numbers in the LHS/RHS intervals as specified. If /// the intervals are not joinable, this aborts. void join(LiveInterval &Other, int *ValNoAssignments, - int *RHSValNoAssignments, - SmallVector &NewValueNumberInfo); + int *RHSValNoAssignments, SmallVector &NewVNInfo); /// removeRange - Remove the specified range from this interval. Note that /// the range must already be in this interval in its entirety. Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=41579&r1=41578&r2=41579&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Wed Aug 29 15:45:00 2007 @@ -239,7 +239,7 @@ /// isReMaterializable - Returns true if the definition MI of the specified /// val# of the specified interval is re-materializable. - bool isReMaterializable(const LiveInterval &li, unsigned ValNum, + bool isReMaterializable(const LiveInterval &li, const VNInfo *ValNo, MachineInstr *MI); /// tryFoldMemoryOperand - Attempts to fold a spill / restore from slot Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveInterval.cpp?rev=41579&r1=41578&r2=41579&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveInterval.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveInterval.cpp Wed Aug 29 15:45:00 2007 @@ -108,13 +108,13 @@ /// not invalidated. void LiveInterval::extendIntervalEndTo(Ranges::iterator I, unsigned NewEnd) { assert(I != ranges.end() && "Not a valid interval!"); - unsigned ValId = I->ValId; + VNInfo *ValNo = I->valno; unsigned OldEnd = I->end; // Search for the first interval that we can't merge with. Ranges::iterator MergeTo = next(I); for (; MergeTo != ranges.end() && NewEnd >= MergeTo->end; ++MergeTo) { - assert(MergeTo->ValId == ValId && "Cannot merge with differing values!"); + assert(MergeTo->valno == ValNo && "Cannot merge with differing values!"); } // If NewEnd was in the middle of an interval, make sure to get its endpoint. @@ -124,12 +124,12 @@ ranges.erase(next(I), MergeTo); // Update kill info. - removeKillForValNum(ValId, OldEnd, I->end-1); + removeKills(*ValNo, OldEnd, I->end-1); // If the newly formed range now touches the range after it and if they have // the same value number, merge the two ranges into one range. Ranges::iterator Next = next(I); - if (Next != ranges.end() && Next->start <= I->end && Next->ValId == ValId) { + if (Next != ranges.end() && Next->start <= I->end && Next->valno == ValNo) { I->end = Next->end; ranges.erase(Next); } @@ -142,7 +142,7 @@ LiveInterval::Ranges::iterator LiveInterval::extendIntervalStartTo(Ranges::iterator I, unsigned NewStart) { assert(I != ranges.end() && "Not a valid interval!"); - unsigned ValId = I->ValId; + VNInfo *ValNo = I->valno; // Search for the first interval that we can't merge with. Ranges::iterator MergeTo = I; @@ -152,13 +152,13 @@ ranges.erase(MergeTo, I); return I; } - assert(MergeTo->ValId == ValId && "Cannot merge with differing values!"); + assert(MergeTo->valno == ValNo && "Cannot merge with differing values!"); --MergeTo; } while (NewStart <= MergeTo->start); // If we start in the middle of another interval, just delete a range and // extend that interval. - if (MergeTo->end >= NewStart && MergeTo->ValId == ValId) { + if (MergeTo->end >= NewStart && MergeTo->valno == ValNo) { MergeTo->end = I->end; } else { // Otherwise, extend the interval right after. @@ -180,14 +180,14 @@ // another interval, just extend that interval to contain the range of LR. if (it != ranges.begin()) { iterator B = prior(it); - if (LR.ValId == B->ValId) { + if (LR.valno == B->valno) { if (B->start <= Start && B->end >= Start) { extendIntervalEndTo(B, End); return B; } } else { // Check to make sure that we are not overlapping two live ranges with - // different ValId's. + // different valno's. assert(B->end <= Start && "Cannot overlap two LiveRanges with differing ValID's" " (did you def the same reg twice in a MachineInstr?)"); @@ -197,7 +197,7 @@ // Otherwise, if this range ends in the middle of, or right next to, another // interval, merge it into that interval. if (it != ranges.end()) - if (LR.ValId == it->ValId) { + if (LR.valno == it->valno) { if (it->start <= End) { it = extendIntervalStartTo(it, Start); @@ -209,7 +209,7 @@ } } else { // Check to make sure that we are not overlapping two live ranges with - // different ValId's. + // different valno's. assert(it->start >= End && "Cannot overlap two LiveRanges with differing ValID's"); } @@ -233,7 +233,7 @@ // If the span we are removing is at the start of the LiveRange, adjust it. if (I->start == Start) { if (I->end == End) { - removeKillForValNum(I->ValId, Start, End); + removeKills(*I->valno, Start, End); ranges.erase(I); // Removed the whole LiveRange. } else I->start = End; @@ -243,7 +243,7 @@ // Otherwise if the span we are removing is at the end of the LiveRange, // adjust the other way. if (I->end == End) { - removeKillForValNum(I->ValId, Start, End); + removeKills(*I->valno, Start, End); I->end = Start; return; } @@ -253,7 +253,7 @@ I->end = Start; // Trim the old interval. // Insert the new one. - ranges.insert(next(I), LiveRange(End, OldEnd, I->ValId)); + ranges.insert(next(I), LiveRange(End, OldEnd, I->valno)); } /// getLiveRangeContaining - Return the live range that contains the @@ -287,33 +287,44 @@ /// the intervals are not joinable, this aborts. void LiveInterval::join(LiveInterval &Other, int *LHSValNoAssignments, int *RHSValNoAssignments, - SmallVector &NewValueNumberInfo) { + SmallVector &NewVNInfo) { + + // There might be some dead val#, create VNInfo for them. + for (unsigned i = 0, e = NewVNInfo.size(); i != e; ++i) { + VNInfo *VNI = NewVNInfo[i]; + if (!VNI) { + VNI = new VNInfo(this, i, ~1U, 0); + NewVNInfo[i] = VNI; + } + } // Determine if any of our live range values are mapped. This is uncommon, so // we want to avoid the interval scan if not. bool MustMapCurValNos = false; - for (unsigned i = 0, e = getNumValNums(); i != e; ++i) { - if (getDefForValNum(i) == ~1U) continue; // tombstone value # - if (i != (unsigned)LHSValNoAssignments[i]) { + for (vni_iterator i = vni_begin(), e = vni_end(); i != e; ++i) { + VNInfo *VNI = *i; + unsigned VN = VNI->id; + if (VNI->def == ~1U) continue; // tombstone value # + if (VNI != NewVNInfo[LHSValNoAssignments[VN]]) { MustMapCurValNos = true; break; } } - + // If we have to apply a mapping to our base interval assignment, rewrite it // now. if (MustMapCurValNos) { // Map the first live range. iterator OutIt = begin(); - OutIt->ValId = LHSValNoAssignments[OutIt->ValId]; + OutIt->valno = NewVNInfo[LHSValNoAssignments[OutIt->valno->id]]; ++OutIt; for (iterator I = OutIt, E = end(); I != E; ++I) { - OutIt->ValId = LHSValNoAssignments[I->ValId]; + OutIt->valno = NewVNInfo[LHSValNoAssignments[I->valno->id]]; // If this live range has the same value # as its immediate predecessor, // and if they are neighbors, remove one LiveRange. This happens when we // have [0,3:0)[4,7:1) and map 0/1 onto the same value #. - if (OutIt->ValId == (OutIt-1)->ValId && (OutIt-1)->end == OutIt->start) { + if (OutIt->valno == (OutIt-1)->valno && (OutIt-1)->end == OutIt->start) { (OutIt-1)->end = OutIt->end; } else { if (I != OutIt) { @@ -330,17 +341,29 @@ ranges.erase(OutIt, end()); } - // Update val# info first. Increasing live ranges may invalidate some kills. - ValueNumberInfo.clear(); - for (SmallVector::iterator I = NewValueNumberInfo.begin(), - E = NewValueNumberInfo.end(); I != E; ++I) - ValueNumberInfo.push_back(*I); + // Remember assignements because val# ids are changing. + std::vector OtherAssignments; + for (iterator I = Other.begin(), E = Other.end(); I != E; ++I) + OtherAssignments.push_back(RHSValNoAssignments[I->valno->id]); + + // Update val# info. Renumber them and make sure they all belong to this + // LiveInterval now. + valnos.clear(); + numvals = 0; + for (unsigned i = 0, e = NewVNInfo.size(); i != e; ++i) { + VNInfo *VNI = NewVNInfo[i]; + VNI->parent = this; + VNI->id = i; // Renumber val#. + valnos.push_back(VNI); + ++numvals; + } // Okay, now insert the RHS live ranges into the LHS. iterator InsertPos = begin(); - for (iterator I = Other.begin(), E = Other.end(); I != E; ++I) { - // Map the ValId in the other live range to the current live range. - I->ValId = RHSValNoAssignments[I->ValId]; + unsigned RangeNo = 0; + for (iterator I = Other.begin(), E = Other.end(); I != E; ++I, ++RangeNo) { + // Map the valno in the other live range to the current live range. + I->valno = NewVNInfo[OtherAssignments[RangeNo]]; InsertPos = addRangeFrom(*I, InsertPos); } @@ -354,13 +377,13 @@ /// allowed to overlap with LiveRanges in the current interval, but only if /// the overlapping LiveRanges have the specified value number. void LiveInterval::MergeRangesInAsValue(const LiveInterval &RHS, - unsigned LHSValNo) { + VNInfo *LHSValNo) { // TODO: Make this more efficient. iterator InsertPos = begin(); for (const_iterator I = RHS.begin(), E = RHS.end(); I != E; ++I) { - // Map the ValId in the other live range to the current live range. + // Map the valno in the other live range to the current live range. LiveRange Tmp = *I; - Tmp.ValId = LHSValNo; + Tmp.valno = LHSValNo; InsertPos = addRangeFrom(Tmp, InsertPos); } } @@ -375,7 +398,7 @@ // Find a value # to use for the clobber ranges. If there is already a value# // for unknown values, use it. // FIXME: Use a single sentinal number for these! - unsigned ClobberValNo = getNextValue(~0U, 0); + VNInfo *ClobberValNo = getNextValue(~0U, 0); iterator IP = begin(); for (const_iterator I = Clobbers.begin(), E = Clobbers.end(); I != E; ++I) { @@ -404,7 +427,7 @@ /// are found to be equivalent. This eliminates V1, replacing all /// LiveRanges with the V1 value number with the V2 value number. This can /// cause merging of V1/V2 values numbers and compaction of the value space. -void LiveInterval::MergeValueNumberInto(unsigned V1, unsigned V2) { +void LiveInterval::MergeValueNumberInto(VNInfo *V1, VNInfo *V2) { assert(V1 != V2 && "Identical value#'s are always equivalent!"); // This code actually merges the (numerically) larger value number into the @@ -413,21 +436,21 @@ // instruction that defines the result value. // Make sure V2 is smaller than V1. - if (V1 < V2) { - copyValNumInfo(V1, V2); + if (V1->id < V2->id) { + copyValNumInfo(*V1, *V2); std::swap(V1, V2); } // Merge V1 live ranges into V2. for (iterator I = begin(); I != end(); ) { iterator LR = I++; - if (LR->ValId != V1) continue; // Not a V1 LiveRange. + if (LR->valno != V1) continue; // Not a V1 LiveRange. // Okay, we found a V1 live range. If it had a previous, touching, V2 live // range, extend it. if (LR != begin()) { iterator Prev = LR-1; - if (Prev->ValId == V2 && Prev->end == LR->start) { + if (Prev->valno == V2 && Prev->end == LR->start) { Prev->end = LR->end; // Erase this live-range. @@ -439,13 +462,13 @@ // Okay, now we have a V1 or V2 live range that is maximally merged forward. // Ensure that it is a V2 live-range. - LR->ValId = V2; + LR->valno = V2; // If we can merge it into later V2 live ranges, do so now. We ignore any // following V1 live ranges, as they will be merged in subsequent iterations // of the loop. if (I != end()) { - if (I->start == LR->end && I->ValId == V2) { + if (I->start == LR->end && I->valno == V2) { LR->end = I->end; ranges.erase(I); I = LR+1; @@ -456,12 +479,15 @@ // Now that V1 is dead, remove it. If it is the largest value number, just // nuke it (and any other deleted values neighboring it), otherwise mark it as // ~1U so it can be nuked later. - if (V1 == getNumValNums()-1) { + if (V1->id == getNumValNums()-1) { do { - ValueNumberInfo.pop_back(); - } while (ValueNumberInfo.back().def == ~1U); + VNInfo *VNI = valnos.back(); + valnos.pop_back(); + delete VNI; + --numvals; + } while (valnos.back()->def == ~1U); } else { - setDefForValNum(V1, ~1U); + V1->def = ~1U; } } @@ -473,7 +499,7 @@ } std::ostream& llvm::operator<<(std::ostream& os, const LiveRange &LR) { - return os << '[' << LR.start << ',' << LR.end << ':' << LR.ValId << ")"; + return os << '[' << LR.start << ',' << LR.end << ':' << LR.valno->id << ")"; } void LiveRange::dump() const { @@ -503,21 +529,21 @@ unsigned vnum = 0; for (const_vni_iterator i = vni_begin(), e = vni_end(); i != e; ++i, ++vnum) { - const VNInfo &vni = *i; + const VNInfo *vni = *i; if (vnum) OS << " "; OS << vnum << "@"; - if (vni.def == ~1U) { + if (vni->def == ~1U) { OS << "x"; } else { - if (vni.def == ~0U) + if (vni->def == ~0U) OS << "?"; else - OS << vni.def; - unsigned ee = vni.kills.size(); + OS << vni->def; + unsigned ee = vni->kills.size(); if (ee) { OS << "-("; for (unsigned j = 0; j != ee; ++j) { - OS << vni.kills[j]; + OS << vni->kills[j]; if (j != ee-1) OS << " "; } Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=41579&r1=41578&r2=41579&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Wed Aug 29 15:45:00 2007 @@ -205,8 +205,8 @@ /// isReMaterializable - Returns true if the definition MI of the specified /// val# of the specified interval is re-materializable. -bool LiveIntervals::isReMaterializable(const LiveInterval &li, unsigned ValNum, - MachineInstr *MI) { +bool LiveIntervals::isReMaterializable(const LiveInterval &li, + const VNInfo *ValNo, MachineInstr *MI) { if (DisableReMat) return false; @@ -220,10 +220,12 @@ // This is a load from fixed stack slot. It can be rematerialized unless it's // re-defined by a two-address instruction. - for (unsigned i = 0, e = li.getNumValNums(); i != e; ++i) { - if (i == ValNum) + for (LiveInterval::const_vni_iterator i = li.vni_begin(), e = li.vni_end(); + i != e; ++i) { + const VNInfo *VNI = *i; + if (VNI == ValNo) continue; - unsigned DefIdx = li.getDefForValNum(i); + unsigned DefIdx = VNI->def; if (DefIdx == ~1U) continue; // Dead val#. MachineInstr *DefMI = (DefIdx == ~0u) @@ -283,25 +285,27 @@ unsigned slot = VirtRegMap::MAX_STACK_SLOT; bool NeedStackSlot = false; - for (unsigned i = 0; i != NumValNums; ++i) { - unsigned DefIdx = li.getDefForValNum(i); + for (LiveInterval::const_vni_iterator i = li.vni_begin(), e = li.vni_end(); + i != e; ++i) { + const VNInfo *VNI = *i; + unsigned VN = VNI->id; + unsigned DefIdx = VNI->def; if (DefIdx == ~1U) continue; // Dead val#. // Is the def for the val# rematerializable? MachineInstr *DefMI = (DefIdx == ~0u) ? NULL : getInstructionFromIndex(DefIdx); - if (DefMI && isReMaterializable(li, i, DefMI)) { + if (DefMI && isReMaterializable(li, VNI, DefMI)) { // Remember how to remat the def of this val#. - ReMatOrigDefs[i] = DefMI; + ReMatOrigDefs[VN] = DefMI; // Original def may be modified so we have to make a copy here. vrm must // delete these! - ReMatDefs[i] = DefMI = DefMI->clone(); + ReMatDefs[VN] = DefMI = DefMI->clone(); vrm.setVirtIsReMaterialized(reg, DefMI); bool CanDelete = true; - const SmallVector &kills = li.getKillsForValNum(i); - for (unsigned j = 0, ee = kills.size(); j != ee; ++j) { - unsigned KillIdx = kills[j]; + for (unsigned j = 0, ee = VNI->kills.size(); j != ee; ++j) { + unsigned KillIdx = VNI->kills[j]; MachineInstr *KillMI = (KillIdx & 1) ? NULL : getInstructionFromIndex(KillIdx); // Kill is a phi node, not all of its uses can be rematerialized. @@ -316,7 +320,7 @@ } if (CanDelete) - ReMatDelete.set(i); + ReMatDelete.set(VN); } else { // Need a stack slot if there is any live range where uses cannot be // rematerialized. @@ -330,10 +334,10 @@ for (LiveInterval::Ranges::const_iterator I = li.ranges.begin(), E = li.ranges.end(); I != E; ++I) { - MachineInstr *DefMI = ReMatDefs[I->ValId]; - MachineInstr *OrigDefMI = ReMatOrigDefs[I->ValId]; + MachineInstr *DefMI = ReMatDefs[I->valno->id]; + MachineInstr *OrigDefMI = ReMatOrigDefs[I->valno->id]; bool DefIsReMat = DefMI != NULL; - bool CanDelete = ReMatDelete[I->ValId]; + bool CanDelete = ReMatDelete[I->valno->id]; int LdSlot = 0; bool isLoadSS = DefIsReMat && tii_->isLoadFromStackSlot(DefMI, LdSlot); unsigned index = getBaseIndex(I->start); @@ -407,11 +411,11 @@ vrm.grow(); if (DefIsReMat) { vrm.setVirtIsReMaterialized(NewVReg, DefMI/*, CanDelete*/); - if (ReMatIds[I->ValId] == VirtRegMap::MAX_STACK_SLOT) { + if (ReMatIds[I->valno->id] == VirtRegMap::MAX_STACK_SLOT) { // Each valnum may have its own remat id. - ReMatIds[I->ValId] = vrm.assignVirtReMatId(NewVReg); + ReMatIds[I->valno->id] = vrm.assignVirtReMatId(NewVReg); } else { - vrm.assignVirtReMatId(NewVReg, ReMatIds[I->ValId]); + vrm.assignVirtReMatId(NewVReg, ReMatIds[I->valno->id]); } if (!CanDelete || (HasUse && HasDef)) { // If this is a two-addr instruction then its use operands are @@ -482,15 +486,14 @@ if (interval.empty()) { // Get the Idx of the defining instructions. unsigned defIndex = getDefIndex(MIIdx); - unsigned ValNum; + VNInfo *ValNo; unsigned SrcReg, DstReg; if (!tii_->isMoveInstr(*mi, SrcReg, DstReg)) - ValNum = interval.getNextValue(defIndex, 0); + ValNo = interval.getNextValue(defIndex, 0); else - ValNum = interval.getNextValue(defIndex, SrcReg); - - assert(ValNum == 0 && "First value in interval is not 0?"); - ValNum = 0; // Clue in the optimizer. + ValNo = interval.getNextValue(defIndex, SrcReg); + + assert(ValNo->id == 0 && "First value in interval is not 0?"); // Loop over all of the blocks that the vreg is defined in. There are // two cases we have to handle here. The most common case is a vreg @@ -509,10 +512,10 @@ if (killIdx > defIndex) { assert(vi.AliveBlocks.none() && "Shouldn't be alive across any blocks!"); - LiveRange LR(defIndex, killIdx, ValNum); + LiveRange LR(defIndex, killIdx, ValNo); interval.addRange(LR); DOUT << " +" << LR << "\n"; - interval.addKillForValNum(ValNum, killIdx); + interval.addKill(*ValNo, killIdx); return; } } @@ -523,7 +526,7 @@ // range that goes from this definition to the end of the defining block. LiveRange NewLR(defIndex, getInstructionIndex(&mbb->back()) + InstrSlots::NUM, - ValNum); + ValNo); DOUT << " +" << NewLR; interval.addRange(NewLR); @@ -536,7 +539,7 @@ if (!MBB->empty()) { LiveRange LR(getMBBStartIdx(i), getInstructionIndex(&MBB->back()) + InstrSlots::NUM, - ValNum); + ValNo); interval.addRange(LR); DOUT << " +" << LR; } @@ -549,9 +552,9 @@ MachineInstr *Kill = vi.Kills[i]; unsigned killIdx = getUseIndex(getInstructionIndex(Kill))+1; LiveRange LR(getMBBStartIdx(Kill->getParent()), - killIdx, ValNum); + killIdx, ValNo); interval.addRange(LR); - interval.addKillForValNum(ValNum, killIdx); + interval.addKill(*ValNo, killIdx); DOUT << " +" << LR; } @@ -570,6 +573,7 @@ unsigned RedefIndex = getDefIndex(MIIdx); const LiveRange *OldLR = interval.getLiveRangeContaining(RedefIndex-1); + VNInfo *OldValNo = OldLR->valno; unsigned OldEnd = OldLR->end; // Delete the initial value, which should be short and continuous, @@ -582,24 +586,24 @@ // The new value number (#1) is defined by the instruction we claimed // defined value #0. - unsigned ValNo = interval.getNextValue(0, 0); - interval.copyValNumInfo(ValNo, 0); + VNInfo *ValNo = interval.getNextValue(0, 0); + interval.copyValNumInfo(*ValNo, *OldValNo); // Value#0 is now defined by the 2-addr instruction. - interval.setDefForValNum(0, RedefIndex); - interval.setSrcRegForValNum(0, 0); + OldValNo->def = RedefIndex; + OldValNo->reg = 0; // Add the new live interval which replaces the range for the input copy. LiveRange LR(DefIndex, RedefIndex, ValNo); DOUT << " replace range with " << LR; interval.addRange(LR); - interval.addKillForValNum(ValNo, RedefIndex); - interval.removeKillForValNum(ValNo, RedefIndex, OldEnd); + interval.addKill(*ValNo, RedefIndex); + interval.removeKills(*ValNo, RedefIndex, OldEnd); // If this redefinition is dead, we need to add a dummy unit live // range covering the def slot. if (lv_->RegisterDefIsDead(mi, interval.reg)) - interval.addRange(LiveRange(RedefIndex, RedefIndex+1, 0)); + interval.addRange(LiveRange(RedefIndex, RedefIndex+1, OldValNo)); DOUT << " RESULT: "; interval.print(DOUT, mri_); @@ -613,13 +617,14 @@ "PHI elimination vreg should have one kill, the PHI itself!"); // Remove the old range that we now know has an incorrect number. + VNInfo *VNI = interval.getFirstValNumInfo(); MachineInstr *Killer = vi.Kills[0]; unsigned Start = getMBBStartIdx(Killer->getParent()); unsigned End = getUseIndex(getInstructionIndex(Killer))+1; DOUT << " Removing [" << Start << "," << End << "] from: "; interval.print(DOUT, mri_); DOUT << "\n"; interval.removeRange(Start, End); - interval.addKillForValNum(0, Start+1); // odd # means phi node + interval.addKill(*VNI, Start+1); // odd # means phi node DOUT << " RESULT: "; interval.print(DOUT, mri_); // Replace the interval with one of a NEW value number. Note that this @@ -627,7 +632,7 @@ LiveRange LR(Start, End, interval.getNextValue(~0, 0)); DOUT << " replace range with " << LR; interval.addRange(LR); - interval.addKillForValNum(LR.ValId, End); + interval.addKill(*LR.valno, End); DOUT << " RESULT: "; interval.print(DOUT, mri_); } @@ -636,17 +641,17 @@ // rest of the live range. unsigned defIndex = getDefIndex(MIIdx); - unsigned ValNum; + VNInfo *ValNo; unsigned SrcReg, DstReg; if (!tii_->isMoveInstr(*mi, SrcReg, DstReg)) - ValNum = interval.getNextValue(defIndex, 0); + ValNo = interval.getNextValue(defIndex, 0); else - ValNum = interval.getNextValue(defIndex, SrcReg); + ValNo = interval.getNextValue(defIndex, SrcReg); unsigned killIndex = getInstructionIndex(&mbb->back()) + InstrSlots::NUM; - LiveRange LR(defIndex, killIndex, ValNum); + LiveRange LR(defIndex, killIndex, ValNo); interval.addRange(LR); - interval.addKillForValNum(ValNum, killIndex-1); // odd # means phi node + interval.addKill(*ValNo, killIndex-1); // odd # means phi node DOUT << " +" << LR; } } @@ -707,11 +712,11 @@ // Already exists? Extend old live interval. LiveInterval::iterator OldLR = interval.FindLiveRangeContaining(start); - unsigned Id = (OldLR != interval.end()) - ? OldLR->ValId : interval.getNextValue(start, SrcReg); - LiveRange LR(start, end, Id); + VNInfo *ValNo = (OldLR != interval.end()) + ? OldLR->valno : interval.getNextValue(start, SrcReg); + LiveRange LR(start, end, ValNo); interval.addRange(LR); - interval.addKillForValNum(LR.ValId, end); + interval.addKill(*LR.valno, end); DOUT << " +" << LR << '\n'; } @@ -778,7 +783,7 @@ LiveRange LR(start, end, interval.getNextValue(start, 0)); interval.addRange(LR); - interval.addKillForValNum(LR.ValId, end); + interval.addKill(*LR.valno, end); DOUT << " +" << LR << '\n'; } Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=41579&r1=41578&r2=41579&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Wed Aug 29 15:45:00 2007 @@ -85,24 +85,23 @@ // BValNo is a value number in B that is defined by a copy from A. 'B3' in // the example above. LiveInterval::iterator BLR = IntB.FindLiveRangeContaining(CopyIdx); - unsigned BValNo = BLR->ValId; + VNInfo *BValNo = BLR->valno; // Get the location that B is defined at. Two options: either this value has // an unknown definition point or it is defined at CopyIdx. If unknown, we // can't process it. - unsigned BValNoDefIdx = IntB.getDefForValNum(BValNo); - if (!IntB.getSrcRegForValNum(BValNo)) return false; - assert(BValNoDefIdx == CopyIdx && + if (!BValNo->reg) return false; + assert(BValNo->def == CopyIdx && "Copy doesn't define the value?"); // AValNo is the value number in A that defines the copy, A0 in the example. LiveInterval::iterator AValLR = IntA.FindLiveRangeContaining(CopyIdx-1); - unsigned AValNo = AValLR->ValId; + VNInfo *AValNo = AValLR->valno; // If AValNo is defined as a copy from IntB, we can potentially process this. // Get the instruction that defines this value number. - unsigned SrcReg = IntA.getSrcRegForValNum(AValNo); + unsigned SrcReg = AValNo->reg; if (!SrcReg) return false; // Not defined by a copy. // If the value number is not defined by a copy instruction, ignore it. @@ -112,8 +111,7 @@ if (rep(SrcReg) != IntB.reg) return false; // Get the LiveRange in IntB that this value number starts with. - unsigned AValNoInstIdx = IntA.getDefForValNum(AValNo); - LiveInterval::iterator ValLR = IntB.FindLiveRangeContaining(AValNoInstIdx-1); + LiveInterval::iterator ValLR = IntB.FindLiveRangeContaining(AValNo->def-1); // Make sure that the end of the live range is inside the same block as // CopyMI. @@ -145,8 +143,8 @@ // We are about to delete CopyMI, so need to remove it as the 'instruction // that defines this value #'. Update the the valnum with the new defining // instruction #. - IntB.setDefForValNum(BValNo, FillerStart); - IntB.setSrcRegForValNum(BValNo, 0); + BValNo->def = FillerStart; + BValNo->reg = 0; // Okay, we can merge them. We need to insert a new liverange: // [ValLR.end, BLR.begin) of either value number, then we merge the @@ -165,8 +163,8 @@ } // Okay, merge "B1" into the same value number as "B0". - if (BValNo != ValLR->ValId) - IntB.MergeValueNumberInto(BValNo, ValLR->ValId); + if (BValNo != ValLR->valno) + IntB.MergeValueNumberInto(BValNo, ValLR->valno); DOUT << " result = "; IntB.print(DOUT, mri_); DOUT << "\n"; @@ -412,43 +410,42 @@ /// ThisFromOther[x] - If x is defined as a copy from the other interval, this /// contains the value number the copy is from. /// -static unsigned ComputeUltimateVN(unsigned VN, - SmallVector &ValueNumberInfo, - SmallVector &ThisFromOther, - SmallVector &OtherFromThis, +static unsigned ComputeUltimateVN(VNInfo *VNI, + SmallVector &NewVNInfo, + SmallVector &ThisFromOther, + SmallVector &OtherFromThis, SmallVector &ThisValNoAssignments, - SmallVector &OtherValNoAssignments, - LiveInterval &ThisLI, LiveInterval &OtherLI) { + SmallVector &OtherValNoAssignments) { + unsigned VN = VNI->id; + // If the VN has already been computed, just return it. if (ThisValNoAssignments[VN] >= 0) return ThisValNoAssignments[VN]; // assert(ThisValNoAssignments[VN] != -2 && "Cyclic case?"); - + // If this val is not a copy from the other val, then it must be a new value // number in the destination. - int OtherValNo = ThisFromOther[VN]; - if (OtherValNo == -1) { - ValueNumberInfo.push_back(ThisLI.getValNumInfo(VN)); - return ThisValNoAssignments[VN] = ValueNumberInfo.size()-1; + VNInfo *OtherValNo = ThisFromOther[VN]; + if (!OtherValNo) { + NewVNInfo.push_back(VNI); + return ThisValNoAssignments[VN] = NewVNInfo.size()-1; } // Otherwise, this *is* a copy from the RHS. If the other side has already // been computed, return it. - if (OtherValNoAssignments[OtherValNo] >= 0) - return ThisValNoAssignments[VN] = OtherValNoAssignments[OtherValNo]; + if (OtherValNoAssignments[OtherValNo->id] >= 0) + return ThisValNoAssignments[VN] = OtherValNoAssignments[OtherValNo->id]; // Mark this value number as currently being computed, then ask what the // ultimate value # of the other value is. ThisValNoAssignments[VN] = -2; unsigned UltimateVN = - ComputeUltimateVN(OtherValNo, ValueNumberInfo, - OtherFromThis, ThisFromOther, - OtherValNoAssignments, ThisValNoAssignments, - OtherLI, ThisLI); + ComputeUltimateVN(OtherValNo, NewVNInfo, OtherFromThis, ThisFromOther, + OtherValNoAssignments, ThisValNoAssignments); return ThisValNoAssignments[VN] = UltimateVN; } -static bool InVector(unsigned Val, const SmallVector &V) { +static bool InVector(VNInfo *Val, const SmallVector &V) { return std::find(V.begin(), V.end(), Val) != V.end(); } @@ -477,7 +474,7 @@ if (RHSIt != RHS.begin()) --RHSIt; } - SmallVector EliminatedLHSVals; + SmallVector EliminatedLHSVals; while (1) { // Determine if these live intervals overlap. @@ -493,13 +490,13 @@ // coalesce these live ranges and we bail out. if (Overlaps) { // If we haven't already recorded that this value # is safe, check it. - if (!InVector(LHSIt->ValId, EliminatedLHSVals)) { + if (!InVector(LHSIt->valno, EliminatedLHSVals)) { // Copy from the RHS? - unsigned SrcReg = LHS.getSrcRegForValNum(LHSIt->ValId); + unsigned SrcReg = LHSIt->valno->reg; if (rep(SrcReg) != RHS.reg) return false; // Nope, bail out. - EliminatedLHSVals.push_back(LHSIt->ValId); + EliminatedLHSVals.push_back(LHSIt->valno); } // We know this entire LHS live range is okay, so skip it now. @@ -516,15 +513,15 @@ // want to notice this copy (so that it gets coalesced away) even though // the live ranges don't actually overlap. if (LHSIt->start == RHSIt->end) { - if (InVector(LHSIt->ValId, EliminatedLHSVals)) { + if (InVector(LHSIt->valno, EliminatedLHSVals)) { // We already know that this value number is going to be merged in // if coalescing succeeds. Just skip the liverange. if (++LHSIt == LHSEnd) break; } else { // Otherwise, if this is a copy from the RHS, mark it as being merged // in. - if (rep(LHS.getSrcRegForValNum(LHSIt->ValId)) == RHS.reg) { - EliminatedLHSVals.push_back(LHSIt->ValId); + if (rep(LHSIt->valno->reg) == RHS.reg) { + EliminatedLHSVals.push_back(LHSIt->valno); // We know this entire LHS live range is okay, so skip it now. if (++LHSIt == LHSEnd) break; @@ -542,13 +539,13 @@ // optimize for it: if there is more than one value, we merge them all into // the lowest numbered one, then handle the interval as if we were merging // with one value number. - unsigned LHSValNo; + VNInfo *LHSValNo; if (EliminatedLHSVals.size() > 1) { // Loop through all the equal value numbers merging them into the smallest // one. - unsigned Smallest = EliminatedLHSVals[0]; + VNInfo *Smallest = EliminatedLHSVals[0]; for (unsigned i = 1, e = EliminatedLHSVals.size(); i != e; ++i) { - if (EliminatedLHSVals[i] < Smallest) { + if (EliminatedLHSVals[i]->id < Smallest->id) { // Merge the current notion of the smallest into the smaller one. LHS.MergeValueNumberInto(Smallest, EliminatedLHSVals[i]); Smallest = EliminatedLHSVals[i]; @@ -566,13 +563,13 @@ // Okay, now that there is a single LHS value number that we're merging the // RHS into, update the value number info for the LHS to indicate that the // value number is defined where the RHS value number was. - const LiveInterval::VNInfo VNI = RHS.getValNumInfo(0); - LHS.setDefForValNum(LHSValNo, VNI.def); - LHS.setSrcRegForValNum(LHSValNo, VNI.reg); + const VNInfo *VNI = RHS.getFirstValNumInfo(); + LHSValNo->def = VNI->def; + LHSValNo->reg = VNI->reg; // Okay, the final step is to loop over the RHS live intervals, adding them to // the LHS. - LHS.addKillsForValNum(LHSValNo, VNI.kills); + LHS.addKills(*LHSValNo, VNI->kills); LHS.MergeRangesInAsValue(RHS, LHSValNo); LHS.weight += RHS.weight; if (RHS.preference && !LHS.preference) @@ -592,9 +589,9 @@ // coalesced. SmallVector LHSValNoAssignments; SmallVector RHSValNoAssignments; - SmallVector LHSValsDefinedFromRHS; - SmallVector RHSValsDefinedFromLHS; - SmallVector ValueNumberInfo; + SmallVector LHSValsDefinedFromRHS; + SmallVector RHSValsDefinedFromLHS; + SmallVector NewVNInfo; // If a live interval is a physical register, conservatively check if any // of its sub-registers is overlapping the live interval of the virtual @@ -617,6 +614,9 @@ } } + LHSValsDefinedFromRHS.resize(LHS.getNumValNums(), NULL); + RHSValsDefinedFromLHS.resize(RHS.getNumValNums(), NULL); + // Compute ultimate value numbers for the LHS and RHS values. if (RHS.containsOneValue()) { // Copies from a liveinterval with a single value are simple to handle and @@ -626,8 +626,8 @@ // Find out if the RHS is defined as a copy from some value in the LHS. int RHSVal0DefinedFromLHS = -1; int RHSValID = -1; - LiveInterval::VNInfo RHSValNoInfo; - unsigned RHSSrcReg = RHS.getSrcRegForValNum(0); + VNInfo *RHSValNoInfo = NULL; + unsigned RHSSrcReg = RHS.getFirstValNumInfo()->reg; if ((RHSSrcReg == 0 || rep(RHSSrcReg) != LHS.reg)) { // If RHS is not defined as a copy from the LHS, we can use simpler and // faster checks to see if the live ranges are coalescable. This joiner @@ -635,47 +635,48 @@ if (!MRegisterInfo::isPhysicalRegister(RHS.reg)) { return SimpleJoin(LHS, RHS); } else { - RHSValNoInfo = RHS.getValNumInfo(0); + RHSValNoInfo = RHS.getFirstValNumInfo(); } } else { // It was defined as a copy from the LHS, find out what value # it is. - unsigned ValInst = RHS.getDefForValNum(0); - RHSValID = LHS.getLiveRangeContaining(ValInst-1)->ValId; - RHSValNoInfo = LHS.getValNumInfo(RHSValID); + const VNInfo *VNI = RHS.getFirstValNumInfo(); + RHSValNoInfo = LHS.getLiveRangeContaining(VNI->def-1)->valno; + RHSValID = RHSValNoInfo->id; RHSVal0DefinedFromLHS = RHSValID; } LHSValNoAssignments.resize(LHS.getNumValNums(), -1); RHSValNoAssignments.resize(RHS.getNumValNums(), -1); - ValueNumberInfo.resize(LHS.getNumValNums()); + NewVNInfo.resize(LHS.getNumValNums(), NULL); // Okay, *all* of the values in LHS that are defined as a copy from RHS // should now get updated. - for (unsigned VN = 0, e = LHS.getNumValNums(); VN != e; ++VN) { - if (unsigned LHSSrcReg = LHS.getSrcRegForValNum(VN)) { + for (LiveInterval::vni_iterator i = LHS.vni_begin(), e = LHS.vni_end(); + i != e; ++i) { + VNInfo *VNI = *i; + unsigned VN = VNI->id; + if (unsigned LHSSrcReg = VNI->reg) { if (rep(LHSSrcReg) != RHS.reg) { // If this is not a copy from the RHS, its value number will be // unmodified by the coalescing. - ValueNumberInfo[VN] = LHS.getValNumInfo(VN); + NewVNInfo[VN] = VNI; LHSValNoAssignments[VN] = VN; } else if (RHSValID == -1) { // Otherwise, it is a copy from the RHS, and we don't already have a // value# for it. Keep the current value number, but remember it. LHSValNoAssignments[VN] = RHSValID = VN; - ValueNumberInfo[VN] = RHSValNoInfo; - RHS.addKills(ValueNumberInfo[VN], LHS.getKillsForValNum(VN)); + NewVNInfo[VN] = RHSValNoInfo; + LHSValsDefinedFromRHS[VN] = VNI; } else { // Otherwise, use the specified value #. LHSValNoAssignments[VN] = RHSValID; - if (VN != (unsigned)RHSValID) - ValueNumberInfo[VN].def = ~1U; // Now this val# is dead. - else { - ValueNumberInfo[VN] = RHSValNoInfo; - RHS.addKills(ValueNumberInfo[VN], LHS.getKillsForValNum(VN)); + if (VN == (unsigned)RHSValID) { // Else this val# is dead. + NewVNInfo[VN] = RHSValNoInfo; + LHSValsDefinedFromRHS[VN] = VNI; } } } else { - ValueNumberInfo[VN] = LHS.getValNumInfo(VN); + NewVNInfo[VN] = VNI; LHSValNoAssignments[VN] = VN; } } @@ -683,17 +684,17 @@ assert(RHSValID != -1 && "Didn't find value #?"); RHSValNoAssignments[0] = RHSValID; if (RHSVal0DefinedFromLHS != -1) { - int LHSValId = LHSValNoAssignments[RHSVal0DefinedFromLHS]; - unsigned DefIdx = RHS.getDefForValNum(0); - LiveInterval::removeKill(ValueNumberInfo[LHSValId], DefIdx); - LHS.addKills(ValueNumberInfo[LHSValId], RHS.getKillsForValNum(0)); + const VNInfo *VNI = RHS.getFirstValNumInfo(); + RHSValsDefinedFromLHS[0] = LHS.getLiveRangeContaining(VNI->def-1)->valno; } } else { // Loop over the value numbers of the LHS, seeing if any are defined from // the RHS. - LHSValsDefinedFromRHS.resize(LHS.getNumValNums(), -1); - for (unsigned VN = 0, e = LHS.getNumValNums(); VN != e; ++VN) { - unsigned ValSrcReg = LHS.getSrcRegForValNum(VN); + for (LiveInterval::vni_iterator i = LHS.vni_begin(), e = LHS.vni_end(); + i != e; ++i) { + VNInfo *VNI = *i; + unsigned VN = VNI->id; + unsigned ValSrcReg = VNI->reg; if (ValSrcReg == 0) // Src not defined by a copy? continue; @@ -703,15 +704,16 @@ continue; // Figure out the value # from the RHS. - unsigned ValInst = LHS.getDefForValNum(VN); - LHSValsDefinedFromRHS[VN] = RHS.getLiveRangeContaining(ValInst-1)->ValId; + LHSValsDefinedFromRHS[VN] = RHS.getLiveRangeContaining(VNI->def-1)->valno; } // Loop over the value numbers of the RHS, seeing if any are defined from // the LHS. - RHSValsDefinedFromLHS.resize(RHS.getNumValNums(), -1); - for (unsigned VN = 0, e = RHS.getNumValNums(); VN != e; ++VN) { - unsigned ValSrcReg = RHS.getSrcRegForValNum(VN); + for (LiveInterval::vni_iterator i = RHS.vni_begin(), e = RHS.vni_end(); + i != e; ++i) { + VNInfo *VNI = *i; + unsigned VN = VNI->id; + unsigned ValSrcReg = VNI->reg; if (ValSrcReg == 0) // Src not defined by a copy? continue; @@ -721,34 +723,39 @@ continue; // Figure out the value # from the LHS. - unsigned ValInst = RHS.getDefForValNum(VN); - RHSValsDefinedFromLHS[VN] = LHS.getLiveRangeContaining(ValInst-1)->ValId; + RHSValsDefinedFromLHS[VN] = LHS.getLiveRangeContaining(VNI->def-1)->valno; } LHSValNoAssignments.resize(LHS.getNumValNums(), -1); RHSValNoAssignments.resize(RHS.getNumValNums(), -1); - ValueNumberInfo.reserve(LHS.getNumValNums() + RHS.getNumValNums()); + NewVNInfo.reserve(LHS.getNumValNums() + RHS.getNumValNums()); - for (unsigned VN = 0, e = LHS.getNumValNums(); VN != e; ++VN) { - if (LHSValNoAssignments[VN] >= 0 || LHS.getDefForValNum(VN) == ~1U) + for (LiveInterval::vni_iterator i = LHS.vni_begin(), e = LHS.vni_end(); + i != e; ++i) { + VNInfo *VNI = *i; + unsigned VN = VNI->id; + if (LHSValNoAssignments[VN] >= 0 || VNI->def == ~1U) continue; - ComputeUltimateVN(VN, ValueNumberInfo, + ComputeUltimateVN(VNI, NewVNInfo, LHSValsDefinedFromRHS, RHSValsDefinedFromLHS, - LHSValNoAssignments, RHSValNoAssignments, LHS, RHS); + LHSValNoAssignments, RHSValNoAssignments); } - for (unsigned VN = 0, e = RHS.getNumValNums(); VN != e; ++VN) { - if (RHSValNoAssignments[VN] >= 0 || RHS.getDefForValNum(VN) == ~1U) + for (LiveInterval::vni_iterator i = RHS.vni_begin(), e = RHS.vni_end(); + i != e; ++i) { + VNInfo *VNI = *i; + unsigned VN = VNI->id; + if (RHSValNoAssignments[VN] >= 0 || VNI->def == ~1U) continue; // If this value number isn't a copy from the LHS, it's a new number. - if (RHSValsDefinedFromLHS[VN] == -1) { - ValueNumberInfo.push_back(RHS.getValNumInfo(VN)); - RHSValNoAssignments[VN] = ValueNumberInfo.size()-1; + if (!RHSValsDefinedFromLHS[VN]) { + NewVNInfo.push_back(VNI); + RHSValNoAssignments[VN] = NewVNInfo.size()-1; continue; } - ComputeUltimateVN(VN, ValueNumberInfo, + ComputeUltimateVN(VNI, NewVNInfo, RHSValsDefinedFromLHS, LHSValsDefinedFromRHS, - RHSValNoAssignments, LHSValNoAssignments, RHS, LHS); + RHSValNoAssignments, LHSValNoAssignments); } } @@ -781,7 +788,8 @@ if (Overlaps) { // If the live range overlap will map to the same value number in the // result liverange, we can still coalesce them. If not, we can't. - if (LHSValNoAssignments[I->ValId] != RHSValNoAssignments[J->ValId]) + if (LHSValNoAssignments[I->valno->id] != + RHSValNoAssignments[J->valno->id]) return false; } @@ -795,23 +803,25 @@ } // Update kill info. Some live ranges are extended due to copy coalescing. - for (unsigned i = 0, e = RHSValsDefinedFromLHS.size(); i != e; ++i) { - int LHSValId = RHSValsDefinedFromLHS[i]; - if (LHSValId == -1) + for (LiveInterval::vni_iterator i = RHS.vni_begin(), e = RHS.vni_end(); + i != e; ++i) { + VNInfo *VNI = *i; + unsigned VN = VNI->id; + if (VN >= RHSValsDefinedFromLHS.size() || !RHSValsDefinedFromLHS[VN]) continue; - unsigned RHSValId = RHSValNoAssignments[i]; - unsigned DefIdx = RHS.getDefForValNum(i); - LiveInterval::removeKill(ValueNumberInfo[RHSValId], DefIdx); - LHS.addKills(ValueNumberInfo[RHSValId], RHS.getKillsForValNum(i)); - } - for (unsigned i = 0, e = LHSValsDefinedFromRHS.size(); i != e; ++i) { - int RHSValId = LHSValsDefinedFromRHS[i]; - if (RHSValId == -1) + unsigned RHSValID = RHSValNoAssignments[VN]; + LiveInterval::removeKill(*NewVNInfo[RHSValID], VNI->def); + LHS.addKills(*NewVNInfo[RHSValID], VNI->kills); + } + for (LiveInterval::vni_iterator i = LHS.vni_begin(), e = LHS.vni_end(); + i != e; ++i) { + VNInfo *VNI = *i; + unsigned VN = VNI->id; + if (VN >= LHSValsDefinedFromRHS.size() || !LHSValsDefinedFromRHS[VN]) continue; - unsigned LHSValId = LHSValNoAssignments[i]; - unsigned DefIdx = LHS.getDefForValNum(i); - LiveInterval::removeKill(ValueNumberInfo[LHSValId], DefIdx); - RHS.addKills(ValueNumberInfo[LHSValId], LHS.getKillsForValNum(i)); + unsigned LHSValID = LHSValNoAssignments[VN]; + LiveInterval::removeKill(*NewVNInfo[LHSValID], VNI->def); + RHS.addKills(*NewVNInfo[LHSValID], VNI->kills); } // If we get here, we know that we can coalesce the live ranges. Ask the @@ -819,12 +829,10 @@ if ((RHS.ranges.size() > LHS.ranges.size() && MRegisterInfo::isVirtualRegister(LHS.reg)) || MRegisterInfo::isPhysicalRegister(RHS.reg)) { - RHS.join(LHS, &RHSValNoAssignments[0], &LHSValNoAssignments[0], - ValueNumberInfo); + RHS.join(LHS, &RHSValNoAssignments[0], &LHSValNoAssignments[0], NewVNInfo); Swapped = true; } else { - LHS.join(RHS, &LHSValNoAssignments[0], &RHSValNoAssignments[0], - ValueNumberInfo); + LHS.join(RHS, &LHSValNoAssignments[0], &RHSValNoAssignments[0], NewVNInfo); Swapped = false; } return true; From asl at math.spbu.ru Wed Aug 29 18:18:49 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 29 Aug 2007 23:18:49 -0000 Subject: [llvm-commits] [llvm] r41584 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200708292318.l7TNInTE022341@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 29 18:18:48 2007 New Revision: 41584 URL: http://llvm.org/viewvc/llvm-project?rev=41584&view=rev Log: Fix use of declaration inside case block Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=41584&r1=41583&r2=41584&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Aug 29 18:18:48 2007 @@ -741,7 +741,7 @@ else Result = DAG.getConstant(0, TLI.getPointerTy()); break; - case ISD::FRAME_TO_ARGS_OFFSET: + case ISD::FRAME_TO_ARGS_OFFSET: { MVT::ValueType VT = Node->getValueType(0); switch (TLI.getOperationAction(Node->getOpcode(), VT)) { default: assert(0 && "This action is not supported yet!"); @@ -753,6 +753,7 @@ Result = DAG.getConstant(0, VT); break; } + } break; case ISD::EXCEPTIONADDR: { Tmp1 = LegalizeOp(Node->getOperand(0)); From dalej at apple.com Wed Aug 29 19:23:21 2007 From: dalej at apple.com (Dale Johannesen) Date: Thu, 30 Aug 2007 00:23:21 -0000 Subject: [llvm-commits] [llvm] r41587 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAG.h include/llvm/CodeGen/SelectionDAGNodes.h include/llvm/Constants.h include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/Support/APFloat.cpp lib/Target/Alpha/AlphaISelLowering.cpp lib/Target/IA64/IA64ISelLowering.cpp lib/Target/X86/X86ISelLowering.cpp lib/VMCore/Constants.cpp Message-ID: <200708300023.l7U0NMGd025693@zion.cs.uiuc.edu> Author: johannes Date: Wed Aug 29 19:23:21 2007 New Revision: 41587 URL: http://llvm.org/viewvc/llvm-project?rev=41587&view=rev Log: Change LegalFPImmediates to use APFloat. Add APFloat interfaces to ConstantFP, SelectionDAG. Fix integer bit in double->APFloat conversion. Convert LegalizeDAG to use APFloat interface in ConstantFPSDNode uses. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h llvm/trunk/include/llvm/Constants.h llvm/trunk/include/llvm/Target/TargetLowering.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/Support/APFloat.cpp llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/VMCore/Constants.cpp Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=41587&r1=41586&r2=41587&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Wed Aug 29 19:23:21 2007 @@ -174,9 +174,14 @@ return getConstant(Val, VT, true); } SDOperand getConstantFP(double Val, MVT::ValueType VT, bool isTarget = false); + SDOperand getConstantFP(const APFloat& Val, MVT::ValueType VT, + bool isTarget = false); SDOperand getTargetConstantFP(double Val, MVT::ValueType VT) { return getConstantFP(Val, VT, true); } + SDOperand getTargetConstantFP(const APFloat& Val, MVT::ValueType VT) { + return getConstantFP(Val, VT, true); + } SDOperand getGlobalAddress(const GlobalValue *GV, MVT::ValueType VT, int offset = 0, bool isTargetGA = false); SDOperand getTargetGlobalAddress(const GlobalValue *GV, MVT::ValueType VT, Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=41587&r1=41586&r2=41587&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Wed Aug 29 19:23:21 2007 @@ -1182,6 +1182,8 @@ } bool isExactlyValue(const APFloat& V) const; + bool isValueValidForType(MVT::ValueType VT, const APFloat& Val); + static bool classof(const ConstantFPSDNode *) { return true; } static bool classof(const SDNode *N) { return N->getOpcode() == ISD::ConstantFP || Modified: llvm/trunk/include/llvm/Constants.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constants.h?rev=41587&r1=41586&r2=41587&view=diff ============================================================================== --- llvm/trunk/include/llvm/Constants.h (original) +++ llvm/trunk/include/llvm/Constants.h Wed Aug 29 19:23:21 2007 @@ -218,12 +218,20 @@ ConstantFP(const ConstantFP &); // DO NOT IMPLEMENT protected: ConstantFP(const Type *Ty, double V); + ConstantFP(const Type *Ty, const APFloat& V); public: /// get() - Static factory methods - Return objects of the specified value static ConstantFP *get(const Type *Ty, double V); + static ConstantFP *get(const Type *Ty, const APFloat& V); /// isValueValidForType - return true if Ty is big enough to represent V. - static bool isValueValidForType(const Type *Ty, double V); + static bool isValueValidForType(const Type *Ty, const APFloat& V); + static bool isValueValidForType(const Type *Ty, double V) { + if (Ty == Type::FloatTy) + return isValueValidForType(Ty, APFloat((float)V)); + else + return isValueValidForType(Ty, APFloat(V)); + } inline double getValue() const { if (&Val.getSemantics() == &APFloat::IEEEdouble) return Val.convertToDouble(); @@ -232,6 +240,7 @@ else assert(0); } + inline const APFloat& getValueAPF() const { return Val; } /// isNullValue - Return true if this is the value that would be returned by /// getNullValue. Don't depend on == for doubles to tell us it's zero, it @@ -242,8 +251,15 @@ /// it returns true for things that are clearly not equal, like -0.0 and 0.0. /// As such, this method can be used to do an exact bit-for-bit comparison of /// two floating point values. - bool isExactlyValue(double V) const; - + bool isExactlyValue(const APFloat& V) const; + bool isExactlyValue(double V) const { + if (&Val.getSemantics() == &APFloat::IEEEdouble) + return isExactlyValue(APFloat(V)); + else if (&Val.getSemantics() == &APFloat::IEEEsingle) + return isExactlyValue(APFloat((float)V)); + else + assert(0); + } /// Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const ConstantFP *) { return true; } static bool classof(const Value *V) { Modified: llvm/trunk/include/llvm/Target/TargetLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=41587&r1=41586&r2=41587&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) +++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Aug 29 19:23:21 2007 @@ -24,6 +24,7 @@ #include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/CodeGen/RuntimeLibcalls.h" +#include "llvm/ADT/APFloat.h" #include #include @@ -220,7 +221,7 @@ unsigned &NumIntermediates, MVT::ValueType &RegisterVT) const; - typedef std::vector::const_iterator legal_fpimm_iterator; + typedef std::vector::const_iterator legal_fpimm_iterator; legal_fpimm_iterator legal_fpimm_begin() const { return LegalFPImmediates.begin(); } @@ -781,8 +782,18 @@ /// addLegalFPImmediate - Indicate that this target can instruction select /// the specified FP immediate natively. - void addLegalFPImmediate(double Imm) { + void addLegalFPImmediate(const APFloat& Imm) { + // Incoming constants are expected to be double. We also add + // the float version. It is expected that all constants are exactly + // representable as floats. + assert(&Imm.getSemantics() == &APFloat::IEEEdouble); + APFloat Immf = APFloat(Imm); + // Rounding mode is not supposed to matter here... + if (Immf.convert(APFloat::IEEEsingle, APFloat::rmNearestTiesToEven) != + APFloat::opOK) + assert(0); LegalFPImmediates.push_back(Imm); + LegalFPImmediates.push_back(Immf); } /// setTargetDAGCombine - Targets should invoke this method for each target @@ -1118,7 +1129,7 @@ ValueTypeActionImpl ValueTypeActions; - std::vector LegalFPImmediates; + std::vector LegalFPImmediates; std::vector > AvailableRegClasses; Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=41587&r1=41586&r2=41587&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Aug 29 19:23:21 2007 @@ -487,15 +487,15 @@ MVT::ValueType VT = CFP->getValueType(0); bool isDouble = VT == MVT::f64; ConstantFP *LLVMC = ConstantFP::get(isDouble ? Type::DoubleTy : - Type::FloatTy, CFP->getValue()); + Type::FloatTy, CFP->getValueAPF()); if (!UseCP) { - double Val = LLVMC->getValue(); + const APFloat& Val = LLVMC->getValueAPF(); return isDouble - ? DAG.getConstant(DoubleToBits(Val), MVT::i64) - : DAG.getConstant(FloatToBits(Val), MVT::i32); + ? DAG.getConstant(DoubleToBits(Val.convertToDouble()), MVT::i64) + : DAG.getConstant(FloatToBits(Val.convertToFloat()), MVT::i32); } - if (isDouble && CFP->isExactlyValue((float)CFP->getValue()) && + if (isDouble && CFP->isValueValidForType(MVT::f32, CFP->getValueAPF()) && // Only do this if the target has a native EXTLOAD instruction from f32. TLI.isLoadXLegal(ISD::EXTLOAD, MVT::f32)) { LLVMC = cast(ConstantExpr::getFPTrunc(LLVMC,Type::FloatTy)); @@ -1017,7 +1017,8 @@ // If this is a legal constant, turn it into a TargetConstantFP node. if (isLegal) { - Result = DAG.getTargetConstantFP(CFP->getValue(), CFP->getValueType(0)); + Result = DAG.getTargetConstantFP(CFP->getValueAPF(), + CFP->getValueType(0)); break; } @@ -1942,10 +1943,12 @@ // together. if (ConstantFPSDNode *CFP = dyn_cast(ST->getValue())) { if (CFP->getValueType(0) == MVT::f32) { - Tmp3 = DAG.getConstant(FloatToBits(CFP->getValue()), MVT::i32); + Tmp3 = DAG.getConstant(FloatToBits(CFP->getValueAPF(). + convertToFloat()), MVT::i32); } else { assert(CFP->getValueType(0) == MVT::f64 && "Unknown FP type!"); - Tmp3 = DAG.getConstant(DoubleToBits(CFP->getValue()), MVT::i64); + Tmp3 = DAG.getConstant(DoubleToBits(CFP->getValueAPF(). + convertToDouble()), MVT::i64); } Result = DAG.getStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(), SVOffset, isVolatile, Alignment); @@ -4212,7 +4215,7 @@ for (unsigned i = 0, e = NumElems; i != e; ++i) { if (ConstantFPSDNode *V = dyn_cast(Node->getOperand(i))) { - CV.push_back(ConstantFP::get(OpNTy, V->getValue())); + CV.push_back(ConstantFP::get(OpNTy, V->getValueAPF())); } else if (ConstantSDNode *V = dyn_cast(Node->getOperand(i))) { CV.push_back(ConstantInt::get(OpNTy, V->getValue())); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=41587&r1=41586&r2=41587&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Aug 29 19:23:21 2007 @@ -52,6 +52,32 @@ return Value.bitwiseIsEqual(V); } +bool ConstantFPSDNode::isValueValidForType(MVT::ValueType VT, + const APFloat& Val) { + // convert modifies in place, so make a copy. + APFloat Val2 = APFloat(Val); + switch (VT) { + default: + return false; // These can't be represented as floating point! + + // FIXME rounding mode needs to be more flexible + case MVT::f32: + return &Val2.getSemantics() == &APFloat::IEEEsingle || + Val2.convert(APFloat::IEEEsingle, APFloat::rmNearestTiesToEven) == + APFloat::opOK; + case MVT::f64: + return &Val2.getSemantics() == &APFloat::IEEEsingle || + &Val2.getSemantics() == &APFloat::IEEEdouble || + Val2.convert(APFloat::IEEEdouble, APFloat::rmNearestTiesToEven) == + APFloat::opOK; + // TODO: Figure out how to test if we can use a shorter type instead! + case MVT::f80: + case MVT::f128: + case MVT::ppcf128: + return true; + } +} + //===----------------------------------------------------------------------===// // ISD Namespace //===----------------------------------------------------------------------===// @@ -669,18 +695,20 @@ return SDOperand(N, 0); } -SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT, +SDOperand SelectionDAG::getConstantFP(const APFloat& V, MVT::ValueType VT, bool isTarget) { assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!"); + MVT::ValueType EltVT = MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT; - if (EltVT == MVT::f32) - Val = (float)Val; // Mask out extra precision. + bool isDouble = (EltVT == MVT::f64); + double Val = isDouble ? V.convertToDouble() : (double)V.convertToFloat(); // Do the map lookup using the actual bit pattern for the floating point // value, so that we don't have problems with 0.0 comparing equal to -0.0, and // we don't have issues with SNANs. unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; + // ?? Should we store float/double/longdouble separately in ID? FoldingSetNodeID ID; AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); ID.AddDouble(Val); @@ -704,6 +732,16 @@ return Result; } +SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT, + bool isTarget) { + MVT::ValueType EltVT = + MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT; + if (EltVT==MVT::f32) + return getConstantFP(APFloat((float)Val), VT, isTarget); + else + return getConstantFP(APFloat(Val), VT, isTarget); +} + SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV, MVT::ValueType VT, int Offset, bool isTargetGA) { Modified: llvm/trunk/lib/Support/APFloat.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APFloat.cpp?rev=41587&r1=41586&r2=41587&view=diff ============================================================================== --- llvm/trunk/lib/Support/APFloat.cpp (original) +++ llvm/trunk/lib/Support/APFloat.cpp Wed Aug 29 19:23:21 2007 @@ -1617,7 +1617,7 @@ sign = mysign; category = fcNormal; exponent = myexponent - 1023; - *significandParts() = mysignificand | 0x100000000000000LL; + *significandParts() = mysignificand | 0x10000000000000LL; } } Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp?rev=41587&r1=41586&r2=41587&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Wed Aug 29 19:23:21 2007 @@ -142,8 +142,8 @@ setOperationAction(ISD::ConstantFP, MVT::f64, Expand); setOperationAction(ISD::ConstantFP, MVT::f32, Expand); - addLegalFPImmediate(+0.0); //F31 - addLegalFPImmediate(-0.0); //-F31 + addLegalFPImmediate(APFloat(+0.0)); //F31 + addLegalFPImmediate(APFloat(-0.0)); //-F31 setJumpBufSize(272); setJumpBufAlignment(16); Modified: llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp?rev=41587&r1=41586&r2=41587&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp Wed Aug 29 19:23:21 2007 @@ -121,8 +121,8 @@ computeRegisterProperties(); setOperationAction(ISD::ConstantFP, MVT::f64, Expand); - addLegalFPImmediate(+0.0); - addLegalFPImmediate(+1.0); + addLegalFPImmediate(APFloat(+0.0)); + addLegalFPImmediate(APFloat(+1.0)); } const char *IA64TargetLowering::getTargetNodeName(unsigned Opcode) const { Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=41587&r1=41586&r2=41587&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Aug 29 19:23:21 2007 @@ -296,7 +296,7 @@ // cases we handle. setOperationAction(ISD::ConstantFP, MVT::f64, Expand); setOperationAction(ISD::ConstantFP, MVT::f32, Expand); - addLegalFPImmediate(+0.0); // xorps / xorpd + addLegalFPImmediate(APFloat(+0.0)); // xorps / xorpd // Conversions to long double (in X87) go through memory. setConvertAction(MVT::f32, MVT::f80, Expand); @@ -327,10 +327,10 @@ setOperationAction(ISD::ConstantFP, MVT::f64, Expand); setOperationAction(ISD::ConstantFP, MVT::f32, Expand); - addLegalFPImmediate(+0.0); // FLD0 - addLegalFPImmediate(+1.0); // FLD1 - addLegalFPImmediate(-0.0); // FLD0/FCHS - addLegalFPImmediate(-1.0); // FLD1/FCHS + addLegalFPImmediate(APFloat(+0.0)); // FLD0 + addLegalFPImmediate(APFloat(+1.0)); // FLD1 + addLegalFPImmediate(APFloat(-0.0)); // FLD0/FCHS + addLegalFPImmediate(APFloat(-1.0)); // FLD1/FCHS } // Long double always uses X87. Modified: llvm/trunk/lib/VMCore/Constants.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=41587&r1=41586&r2=41587&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Constants.cpp (original) +++ llvm/trunk/lib/VMCore/Constants.cpp Wed Aug 29 19:23:21 2007 @@ -240,15 +240,24 @@ ConstantFP::ConstantFP(const Type *Ty, double V) - : Constant(Ty, ConstantFPVal, 0, 0), Val(APFloat(V)) { + : Constant(Ty, ConstantFPVal, 0, 0), + Val(Ty==Type::FloatTy ? APFloat((float)V) : APFloat(V)) { +} +ConstantFP::ConstantFP(const Type *Ty, const APFloat& V) + : Constant(Ty, ConstantFPVal, 0, 0), Val(V) { + // temporary + if (Ty==Type::FloatTy) + assert(&V.getSemantics()==&APFloat::IEEEsingle); + else + assert(&V.getSemantics()==&APFloat::IEEEdouble); } bool ConstantFP::isNullValue() const { return Val.isZero() && !Val.isNegative(); } -bool ConstantFP::isExactlyValue(double V) const { - return Val.bitwiseIsEqual(APFloat(V)); +bool ConstantFP::isExactlyValue(const APFloat& V) const { + return Val.bitwiseIsEqual(V); } namespace { @@ -289,14 +298,14 @@ DenseMapAPFloatKeyInfo::KeyTy Key(APFloat((float)V)); ConstantFP *&Slot = (*FPConstants)[Key]; if (Slot) return Slot; - return Slot = new ConstantFP(Ty, (float)V); + return Slot = new ConstantFP(Ty, APFloat((float)V)); } else if (Ty == Type::DoubleTy) { // Without the redundant cast, the following is taken to be // a function declaration. What a language. DenseMapAPFloatKeyInfo::KeyTy Key(APFloat((double)V)); ConstantFP *&Slot = (*FPConstants)[Key]; if (Slot) return Slot; - return Slot = new ConstantFP(Ty, V); + return Slot = new ConstantFP(Ty, APFloat(V)); } else if (Ty == Type::X86_FP80Ty || Ty == Type::PPC_FP128Ty || Ty == Type::FP128Ty) { assert(0 && "Long double constants not handled yet."); @@ -305,6 +314,18 @@ } } +ConstantFP *ConstantFP::get(const Type *Ty, const APFloat& V) { + // temporary + if (Ty==Type::FloatTy) + assert(&V.getSemantics()==&APFloat::IEEEsingle); + else + assert(&V.getSemantics()==&APFloat::IEEEdouble); + + DenseMapAPFloatKeyInfo::KeyTy Key(V); + ConstantFP *&Slot = (*FPConstants)[Key]; + if (Slot) return Slot; + return Slot = new ConstantFP(Ty, V); +} //===----------------------------------------------------------------------===// // ConstantXXX Classes @@ -699,14 +720,24 @@ return (Val >= Min && Val <= Max); } -bool ConstantFP::isValueValidForType(const Type *Ty, double Val) { +bool ConstantFP::isValueValidForType(const Type *Ty, const APFloat& Val) { + // convert modifies in place, so make a copy. + APFloat Val2 = APFloat(Val); switch (Ty->getTypeID()) { default: return false; // These can't be represented as floating point! - // TODO: Figure out how to test if we can use a shorter type instead! + // FIXME rounding mode needs to be more flexible case Type::FloatTyID: + return &Val2.getSemantics() == &APFloat::IEEEsingle || + Val2.convert(APFloat::IEEEsingle, APFloat::rmNearestTiesToEven) == + APFloat::opOK; case Type::DoubleTyID: + return &Val2.getSemantics() == &APFloat::IEEEsingle || + &Val2.getSemantics() == &APFloat::IEEEdouble || + Val2.convert(APFloat::IEEEdouble, APFloat::rmNearestTiesToEven) == + APFloat::opOK; + // TODO: Figure out how to test if we can use a shorter type instead! case Type::X86_FP80TyID: case Type::PPC_FP128TyID: case Type::FP128TyID: From isanbard at gmail.com Wed Aug 29 19:59:19 2007 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 30 Aug 2007 00:59:19 -0000 Subject: [llvm-commits] [llvm] r41590 - /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200708300059.l7U0xJ7V027177@zion.cs.uiuc.edu> Author: void Date: Wed Aug 29 19:59:19 2007 New Revision: 41590 URL: http://llvm.org/viewvc/llvm-project?rev=41590&view=rev Log: Use i64 on a PPC64 machine Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=41590&r1=41589&r2=41590&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Wed Aug 29 19:59:19 2007 @@ -3466,7 +3466,7 @@ if (isPPC64) return DAG.getCopyFromReg(DAG.getEntryNode(), is31 ? PPC::X31 : PPC::X1, - MVT::i32); + MVT::i64); else return DAG.getCopyFromReg(DAG.getEntryNode(), is31 ? PPC::R31 : PPC::R1, MVT::i32); From isanbard at gmail.com Wed Aug 29 20:10:18 2007 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 30 Aug 2007 01:10:18 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r41593 - /llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp Message-ID: <200708300110.l7U1AIEl027676@zion.cs.uiuc.edu> Author: void Date: Wed Aug 29 20:10:18 2007 New Revision: 41593 URL: http://llvm.org/viewvc/llvm-project?rev=41593&view=rev Log: Enable exception handling by default. Modified: llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp Modified: llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp?rev=41593&r1=41592&r2=41593&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp Wed Aug 29 20:10:18 2007 @@ -122,9 +122,8 @@ Args.push_back("--debug-pass=Structure"); if (flag_debug_pass_arguments) Args.push_back("--debug-pass=Arguments"); -// Breaks the x86-darwin build -// if (flag_exceptions) -// Args.push_back("--enable-eh"); + if (flag_exceptions) + Args.push_back("--enable-eh"); // If there are options that should be passed through to the LLVM backend // directly from the command line, do so now. This is mainly for debugging From isanbard at gmail.com Wed Aug 29 20:14:03 2007 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 30 Aug 2007 01:14:03 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41594 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Message-ID: <200708300114.l7U1E3p8027841@zion.cs.uiuc.edu> Author: void Date: Wed Aug 29 20:14:03 2007 New Revision: 41594 URL: http://llvm.org/viewvc/llvm-project?rev=41594&view=rev Log: Enable EH by default Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=41594&r1=41593&r2=41594&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Wed Aug 29 20:14:03 2007 @@ -123,9 +123,8 @@ Args.push_back("--debug-pass=Structure"); if (flag_debug_pass_arguments) Args.push_back("--debug-pass=Arguments"); -// Breaks the x86-darwin build -// if (flag_exceptions) -// Args.push_back("--enable-eh"); + if (flag_exceptions) + Args.push_back("--enable-eh"); // If there are options that should be passed through to the LLVM backend // directly from the command line, do so now. This is mainly for debugging From evan.cheng at apple.com Thu Aug 30 00:49:44 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 30 Aug 2007 05:49:44 -0000 Subject: [llvm-commits] [llvm] r41595 - in /llvm/trunk/lib/Target/X86: X86InstrFPStack.td X86InstrInfo.td X86InstrMMX.td X86InstrSSE.td X86InstrX86-64.td Message-ID: <200708300549.l7U5niXj005980@zion.cs.uiuc.edu> Author: evancheng Date: Thu Aug 30 00:49:43 2007 New Revision: 41595 URL: http://llvm.org/viewvc/llvm-project?rev=41595&view=rev Log: Mark load instructions with isLoad = 1. Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td llvm/trunk/lib/Target/X86/X86InstrInfo.td llvm/trunk/lib/Target/X86/X86InstrMMX.td llvm/trunk/lib/Target/X86/X86InstrSSE.td llvm/trunk/lib/Target/X86/X86InstrX86-64.td Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFPStack.td?rev=41595&r1=41594&r2=41595&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrFPStack.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrFPStack.td Thu Aug 30 00:49:43 2007 @@ -334,12 +334,14 @@ "fcmovnu\t{$op, %st(0)|%ST(0), $op}">, DB; // Floating point loads & stores. +let isLoad = 1 in { def LD_Fp32m : FpI<(outs RFP32:$dst), (ins f32mem:$src), ZeroArgFP, [(set RFP32:$dst, (loadf32 addr:$src))]>; def LD_Fp64m : FpI<(outs RFP64:$dst), (ins f64mem:$src), ZeroArgFP, [(set RFP64:$dst, (loadf64 addr:$src))]>; def LD_Fp80m : FpI_<(outs RFP80:$dst), (ins f80mem:$src), ZeroArgFP, [(set RFP80:$dst, (loadf80 addr:$src))]>; +} def LD_Fp32m64 : FpI<(outs RFP64:$dst), (ins f32mem:$src), ZeroArgFP, [(set RFP64:$dst, (f64 (extloadf32 addr:$src)))]>; def LD_Fp64m80 : FpI_<(outs RFP80:$dst), (ins f64mem:$src), ZeroArgFP, Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=41595&r1=41594&r2=41595&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Thu Aug 30 00:49:43 2007 @@ -521,6 +521,7 @@ "mov{l}\t{$src, $dst|$dst, $src}", [(store (i32 imm:$src), addr:$dst)]>; +let isLoad = 1 in { def MOV8rm : I<0x8A, MRMSrcMem, (outs GR8 :$dst), (ins i8mem :$src), "mov{b}\t{$src, $dst|$dst, $src}", [(set GR8:$dst, (load addr:$src))]>; @@ -530,6 +531,7 @@ def MOV32rm : I<0x8B, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src), "mov{l}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (load addr:$src))]>; +} def MOV8mr : I<0x88, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src), "mov{b}\t{$src, $dst|$dst, $src}", @@ -2332,10 +2334,12 @@ "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32_rr : I<0x89, MRMDestReg, (outs GR32_:$dst), (ins GR32_:$src), "mov{l}\t{$src, $dst|$dst, $src}", []>; +let isLoad = 1 in { def MOV16_rm : I<0x8B, MRMSrcMem, (outs GR16_:$dst), (ins i16mem:$src), "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32_rm : I<0x8B, MRMSrcMem, (outs GR32_:$dst), (ins i32mem:$src), "mov{l}\t{$src, $dst|$dst, $src}", []>; +} def MOV16_mr : I<0x89, MRMDestMem, (outs), (ins i16mem:$dst, GR16_:$src), "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32_mr : I<0x89, MRMDestMem, (outs), (ins i32mem:$dst, GR32_:$src), Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=41595&r1=41594&r2=41595&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Thu Aug 30 00:49:43 2007 @@ -157,7 +157,7 @@ // Data Transfer Instructions def MMX_MOVD64rr : MMXI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR32:$src), "movd\t{$src, $dst|$dst, $src}", []>; -let isReMaterializable = 1 in +let isLoad = 1, isReMaterializable = 1 in def MMX_MOVD64rm : MMXI<0x6E, MRMSrcMem, (outs VR64:$dst), (ins i32mem:$src), "movd\t{$src, $dst|$dst, $src}", []>; def MMX_MOVD64mr : MMXI<0x7E, MRMDestMem, (outs), (ins i32mem:$dst, VR64:$src), @@ -168,7 +168,7 @@ def MMX_MOVQ64rr : MMXI<0x6F, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src), "movq\t{$src, $dst|$dst, $src}", []>; -let isReMaterializable = 1 in +let isLoad = 1, isReMaterializable = 1 in def MMX_MOVQ64rm : MMXI<0x6F, MRMSrcMem, (outs VR64:$dst), (ins i64mem:$src), "movq\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (load_mmx addr:$src))]>; Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=41595&r1=41594&r2=41595&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Thu Aug 30 00:49:43 2007 @@ -296,7 +296,7 @@ // Move Instructions def MOVSSrr : SSI<0x10, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src), "movss\t{$src, $dst|$dst, $src}", []>; -let isReMaterializable = 1 in +let isLoad = 1, isReMaterializable = 1 in def MOVSSrm : SSI<0x10, MRMSrcMem, (outs FR32:$dst), (ins f32mem:$src), "movss\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (loadf32 addr:$src))]>; @@ -410,6 +410,7 @@ // Alias instruction to load FR32 from f128mem using movaps. Upper bits are // disregarded. +let isLoad = 1 in def FsMOVAPSrm : PSI<0x28, MRMSrcMem, (outs FR32:$dst), (ins f128mem:$src), "movaps\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (alignedloadfsf32 addr:$src))]>; @@ -586,7 +587,7 @@ // Move Instructions def MOVAPSrr : PSI<0x28, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), "movaps\t{$src, $dst|$dst, $src}", []>; -let isReMaterializable = 1 in +let isLoad = 1, isReMaterializable = 1 in def MOVAPSrm : PSI<0x28, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), "movaps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (alignedloadv4f32 addr:$src))]>; @@ -597,6 +598,7 @@ def MOVUPSrr : PSI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), "movups\t{$src, $dst|$dst, $src}", []>; +let isLoad = 1 in def MOVUPSrm : PSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), "movups\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (loadv4f32 addr:$src))]>; @@ -605,6 +607,7 @@ [(store (v4f32 VR128:$src), addr:$dst)]>; // Intrinsic forms of MOVUPS load and store +let isLoad = 1 in def MOVUPSrm_Int : PSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), "movups\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse_loadu_ps addr:$src))]>; @@ -954,7 +957,7 @@ // Move Instructions def MOVSDrr : SDI<0x10, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src), "movsd\t{$src, $dst|$dst, $src}", []>; -let isReMaterializable = 1 in +let isLoad = 1, isReMaterializable = 1 in def MOVSDrm : SDI<0x10, MRMSrcMem, (outs FR64:$dst), (ins f64mem:$src), "movsd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (loadf64 addr:$src))]>; @@ -1071,6 +1074,7 @@ // Alias instruction to load FR64 from f128mem using movapd. Upper bits are // disregarded. +let isLoad = 1 in def FsMOVAPDrm : PDI<0x28, MRMSrcMem, (outs FR64:$dst), (ins f128mem:$src), "movapd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (alignedloadfsf64 addr:$src))]>; @@ -1247,7 +1251,7 @@ // Move Instructions def MOVAPDrr : PDI<0x28, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), "movapd\t{$src, $dst|$dst, $src}", []>; -let isReMaterializable = 1 in +let isLoad = 1, isReMaterializable = 1 in def MOVAPDrm : PDI<0x28, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), "movapd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (alignedloadv2f64 addr:$src))]>; @@ -1258,6 +1262,7 @@ def MOVUPDrr : PDI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), "movupd\t{$src, $dst|$dst, $src}", []>; +let isLoad = 1 in def MOVUPDrm : PDI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), "movupd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (loadv2f64 addr:$src))]>; @@ -1620,12 +1625,14 @@ // Move Instructions def MOVDQArr : PDI<0x6F, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), "movdqa\t{$src, $dst|$dst, $src}", []>; +let isLoad = 1 in def MOVDQArm : PDI<0x6F, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), "movdqa\t{$src, $dst|$dst, $src}", [/*(set VR128:$dst, (alignedloadv2i64 addr:$src))*/]>; def MOVDQAmr : PDI<0x7F, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src), "movdqa\t{$src, $dst|$dst, $src}", [/*(alignedstore (v2i64 VR128:$src), addr:$dst)*/]>; +let isLoad = 1 in def MOVDQUrm : I<0x6F, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), "movdqu\t{$src, $dst|$dst, $src}", [/*(set VR128:$dst, (loadv2i64 addr:$src))*/]>, @@ -1636,6 +1643,7 @@ XS, Requires<[HasSSE2]>; // Intrinsic forms of MOVDQU load and store +let isLoad = 1 in def MOVDQUrm_Int : I<0x6F, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), "movdqu\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_loadu_dq addr:$src))]>, Modified: llvm/trunk/lib/Target/X86/X86InstrX86-64.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrX86-64.td?rev=41595&r1=41594&r2=41595&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrX86-64.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrX86-64.td Thu Aug 30 00:49:43 2007 @@ -163,6 +163,7 @@ "mov{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, i64immSExt32:$src)]>; +let isLoad = 1 in def MOV64rm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src), "mov{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (load addr:$src))]>; From evan.cheng at apple.com Thu Aug 30 00:50:32 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 30 Aug 2007 05:50:32 -0000 Subject: [llvm-commits] [llvm] r41596 - /llvm/trunk/include/llvm/CodeGen/MachineInstr.h Message-ID: <200708300550.l7U5oWjg006012@zion.cs.uiuc.edu> Author: evancheng Date: Thu Aug 30 00:50:32 2007 New Revision: 41596 URL: http://llvm.org/viewvc/llvm-project?rev=41596&view=rev Log: Added CreateFrameIndex to create a FrameIndex MachineOperand without a MachineInstr. Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=41596&r1=41595&r2=41596&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineInstr.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h Thu Aug 30 00:50:32 2007 @@ -102,6 +102,18 @@ return Op; } + static MachineOperand CreateFrameIndex(unsigned Idx) { + MachineOperand Op; + Op.opType = MachineOperand::MO_FrameIndex; + Op.contents.immedVal = Idx; + Op.IsDef = false; + Op.IsImp = false; + Op.IsKill = false; + Op.IsDead = false; + Op.auxInfo.offset = 0; + return Op; + } + const MachineOperand &operator=(const MachineOperand &MO) { contents = MO.contents; IsDef = MO.IsDef; From evan.cheng at apple.com Thu Aug 30 00:52:20 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 30 Aug 2007 05:52:20 -0000 Subject: [llvm-commits] [llvm] r41597 - in /llvm/trunk: include/llvm/CodeGen/LiveIntervalAnalysis.h include/llvm/Target/MRegisterInfo.h lib/Target/ARM/ARMRegisterInfo.h lib/Target/Alpha/AlphaRegisterInfo.h lib/Target/Mips/MipsRegisterInfo.h lib/Target/PowerPC/PPCRegisterInfo.h lib/Target/Sparc/SparcRegisterInfo.h Message-ID: <200708300552.l7U5qKml006058@zion.cs.uiuc.edu> Author: evancheng Date: Thu Aug 30 00:52:20 2007 New Revision: 41597 URL: http://llvm.org/viewvc/llvm-project?rev=41597&view=rev Log: Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots. Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h llvm/trunk/include/llvm/Target/MRegisterInfo.h llvm/trunk/lib/Target/ARM/ARMRegisterInfo.h llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=41597&r1=41596&r2=41597&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Thu Aug 30 00:52:20 2007 @@ -242,11 +242,13 @@ bool isReMaterializable(const LiveInterval &li, const VNInfo *ValNo, MachineInstr *MI); - /// tryFoldMemoryOperand - Attempts to fold a spill / restore from slot - /// to reg into ith operand of specified MI. If it is successul, MI is - /// updated with the newly created MI and returns true. - bool tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm, unsigned index, - unsigned i, int slot, unsigned reg); + /// tryFoldMemoryOperand - Attempts to fold either a spill / restore from + /// slot / to reg or any rematerialized load into ith operand of specified + /// MI. If it is successul, MI is updated with the newly created MI and + /// returns true. + bool tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm, + unsigned index, unsigned i, bool isSS, + MachineInstr *DefMI, int slot, unsigned reg); static LiveInterval createInterval(unsigned Reg); Modified: llvm/trunk/include/llvm/Target/MRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/MRegisterInfo.h?rev=41597&r1=41596&r2=41597&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/MRegisterInfo.h (original) +++ llvm/trunk/include/llvm/Target/MRegisterInfo.h Thu Aug 30 00:52:20 2007 @@ -521,6 +521,15 @@ return 0; } + /// foldMemoryOperand - Same as the previous version except it allows folding + /// of any load and store from / to any address, not just from a specific + /// stack slot. + virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, + unsigned OpNum, + MachineInstr* LoadMI) const { + return 0; + } + /// targetHandlesStackFrameRounding - Returns true if the target is responsible /// for rounding up the stack frame (probably at emitPrologue time). virtual bool targetHandlesStackFrameRounding() const { Modified: llvm/trunk/lib/Target/ARM/ARMRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRegisterInfo.h?rev=41597&r1=41596&r2=41597&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMRegisterInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMRegisterInfo.h Thu Aug 30 00:52:20 2007 @@ -66,6 +66,11 @@ MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum, int FrameIndex) const; + MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum, + MachineInstr* LoadMI) const { + return 0; + } + const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const; const TargetRegisterClass* const* Modified: llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h?rev=41597&r1=41596&r2=41597&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h (original) +++ llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h Thu Aug 30 00:52:20 2007 @@ -41,6 +41,11 @@ MachineInstr* foldMemoryOperand(MachineInstr *MI, unsigned OpNum, int FrameIndex) const; + MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum, + MachineInstr* LoadMI) const { + return 0; + } + void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *RC) const; Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h?rev=41597&r1=41596&r2=41597&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h (original) +++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h Thu Aug 30 00:52:20 2007 @@ -48,6 +48,11 @@ MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum, int FrameIndex) const; + MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum, + MachineInstr* LoadMI) const { + return 0; + } + void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *RC) const; Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h?rev=41597&r1=41596&r2=41597&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h Thu Aug 30 00:52:20 2007 @@ -57,6 +57,11 @@ virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum, int FrameIndex) const; + virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum, + MachineInstr* LoadMI) const { + return 0; + } + const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const; const TargetRegisterClass* const* Modified: llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h?rev=41597&r1=41596&r2=41597&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h (original) +++ llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h Thu Aug 30 00:52:20 2007 @@ -51,6 +51,12 @@ unsigned OpNum, int FrameIndex) const; + virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, + unsigned OpNum, + MachineInstr* LoadMI) const { + return 0; + } + const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const; const TargetRegisterClass* const* getCalleeSavedRegClasses( From evan.cheng at apple.com Thu Aug 30 00:53:02 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 30 Aug 2007 05:53:02 -0000 Subject: [llvm-commits] [llvm] r41598 - /llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Message-ID: <200708300553.l7U5r2pT006084@zion.cs.uiuc.edu> Author: evancheng Date: Thu Aug 30 00:53:02 2007 New Revision: 41598 URL: http://llvm.org/viewvc/llvm-project?rev=41598&view=rev Log: Try fold re-materialized load instructions into its uses. Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=41598&r1=41597&r2=41598&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Thu Aug 30 00:53:02 2007 @@ -236,10 +236,17 @@ return true; } +/// tryFoldMemoryOperand - Attempts to fold either a spill / restore from +/// slot / to reg or any rematerialized load into ith operand of specified +/// MI. If it is successul, MI is updated with the newly created MI and +/// returns true. bool LiveIntervals::tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm, unsigned index, unsigned i, + bool isSS, MachineInstr *DefMI, int slot, unsigned reg) { - MachineInstr *fmi = mri_->foldMemoryOperand(MI, i, slot); + MachineInstr *fmi = isSS + ? mri_->foldMemoryOperand(MI, i, slot) + : mri_->foldMemoryOperand(MI, i, DefMI); if (fmi) { // Attempt to fold the memory reference into the instruction. If // we can do this, we don't need to insert spill code. @@ -340,6 +347,8 @@ bool CanDelete = ReMatDelete[I->valno->id]; int LdSlot = 0; bool isLoadSS = DefIsReMat && tii_->isLoadFromStackSlot(DefMI, LdSlot); + bool isLoad = isLoadSS || + (DefIsReMat && (DefMI->getInstrDescriptor()->Flags & M_LOAD_FLAG)); unsigned index = getBaseIndex(I->start); unsigned end = getBaseIndex(I->end-1) + InstrSlots::NUM; for (; index != end; index += InstrSlots::NUM) { @@ -362,20 +371,22 @@ RemoveMachineInstrFromMaps(MI); MI->eraseFromParent(); break; - } else if (tryFoldMemoryOperand(MI, vrm, index, i, slot, li.reg)) + } else if (tryFoldMemoryOperand(MI, vrm, index, i, true, + DefMI, slot, li.reg)) { // Folding the load/store can completely change the instruction // in unpredictable ways, rescan it from the beginning. goto RestartInstruction; - } else if (isLoadSS && - tryFoldMemoryOperand(MI, vrm, index, i, LdSlot, li.reg)){ - // FIXME: Other rematerializable loads can be folded as well. - // Folding the load/store can completely change the - // instruction in unpredictable ways, rescan it from - // the beginning. - goto RestartInstruction; - } + } + } else if (isLoad && + tryFoldMemoryOperand(MI, vrm, index, i, isLoadSS, + DefMI, LdSlot, li.reg)) + // Folding the load/store can completely change the + // instruction in unpredictable ways, rescan it from + // the beginning. + goto RestartInstruction; } else { - if (tryFoldMemoryOperand(MI, vrm, index, i, slot, li.reg)) + if (tryFoldMemoryOperand(MI, vrm, index, i, true, DefMI, + slot, li.reg)) // Folding the load/store can completely change the instruction in // unpredictable ways, rescan it from the beginning. goto RestartInstruction; From evan.cheng at apple.com Thu Aug 30 00:54:07 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 30 Aug 2007 05:54:07 -0000 Subject: [llvm-commits] [llvm] r41599 - in /llvm/trunk: lib/Target/X86/X86RegisterInfo.cpp lib/Target/X86/X86RegisterInfo.h test/CodeGen/X86/constant-pool-remat-0.ll Message-ID: <200708300554.l7U5s77C006120@zion.cs.uiuc.edu> Author: evancheng Date: Thu Aug 30 00:54:07 2007 New Revision: 41599 URL: http://llvm.org/viewvc/llvm-project?rev=41599&view=rev Log: Added support to fold X86 load / store instructions. This allow rematerialized loads to be folded into their uses. Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp llvm/trunk/lib/Target/X86/X86RegisterInfo.h llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=41599&r1=41598&r2=41599&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Thu Aug 30 00:54:07 2007 @@ -270,63 +270,81 @@ MBB.insert(I, MI); } -static MachineInstr *FuseTwoAddrInst(unsigned Opcode, unsigned FrameIndex, - MachineInstr *MI, - const TargetInstrInfo &TII) { +static const MachineInstrBuilder &FuseInstrAddOperand(MachineInstrBuilder &MIB, + MachineOperand &MO) { + if (MO.isReg()) + MIB = MIB.addReg(MO.getReg(), MO.isDef(), MO.isImplicit()); + else if (MO.isImm()) + MIB = MIB.addImm(MO.getImm()); + else if (MO.isFrameIndex()) + MIB = MIB.addFrameIndex(MO.getFrameIndex()); + else if (MO.isGlobalAddress()) + MIB = MIB.addGlobalAddress(MO.getGlobal(), MO.getOffset()); + else if (MO.isConstantPoolIndex()) + MIB = MIB.addConstantPoolIndex(MO.getConstantPoolIndex(), MO.getOffset()); + else if (MO.isJumpTableIndex()) + MIB = MIB.addJumpTableIndex(MO.getJumpTableIndex()); + else if (MO.isExternalSymbol()) + MIB = MIB.addExternalSymbol(MO.getSymbolName()); + else + assert(0 && "Unknown operand for FuseInst!"); + + return MIB; +} + +static MachineInstr *FuseTwoAddrInst(unsigned Opcode, + SmallVector &MOs, + MachineInstr *MI, const TargetInstrInfo &TII) { unsigned NumOps = TII.getNumOperands(MI->getOpcode())-2; + // Create the base instruction with the memory operand as the first part. - MachineInstrBuilder MIB = addFrameReference(BuildMI(TII.get(Opcode)), - FrameIndex); + MachineInstrBuilder MIB = BuildMI(TII.get(Opcode)); + unsigned NumAddrOps = MOs.size(); + for (unsigned i = 0; i != NumAddrOps; ++i) + MIB = FuseInstrAddOperand(MIB, MOs[i]); + if (NumAddrOps < 4) // FrameIndex only + MIB.addImm(1).addReg(0).addImm(0); // Loop over the rest of the ri operands, converting them over. for (unsigned i = 0; i != NumOps; ++i) { MachineOperand &MO = MI->getOperand(i+2); - if (MO.isReg()) - MIB = MIB.addReg(MO.getReg(), false, MO.isImplicit()); - else if (MO.isImm()) - MIB = MIB.addImm(MO.getImm()); - else if (MO.isGlobalAddress()) - MIB = MIB.addGlobalAddress(MO.getGlobal(), MO.getOffset()); - else if (MO.isJumpTableIndex()) - MIB = MIB.addJumpTableIndex(MO.getJumpTableIndex()); - else if (MO.isExternalSymbol()) - MIB = MIB.addExternalSymbol(MO.getSymbolName()); - else - assert(0 && "Unknown operand type!"); + MIB = FuseInstrAddOperand(MIB, MO); } return MIB; } static MachineInstr *FuseInst(unsigned Opcode, unsigned OpNo, - unsigned FrameIndex, MachineInstr *MI, - const TargetInstrInfo &TII) { + SmallVector &MOs, + MachineInstr *MI, const TargetInstrInfo &TII) { MachineInstrBuilder MIB = BuildMI(TII.get(Opcode)); for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { MachineOperand &MO = MI->getOperand(i); if (i == OpNo) { assert(MO.isReg() && "Expected to fold into reg operand!"); - MIB = addFrameReference(MIB, FrameIndex); - } else if (MO.isReg()) - MIB = MIB.addReg(MO.getReg(), MO.isDef(), MO.isImplicit()); - else if (MO.isImm()) - MIB = MIB.addImm(MO.getImm()); - else if (MO.isGlobalAddress()) - MIB = MIB.addGlobalAddress(MO.getGlobal(), MO.getOffset()); - else if (MO.isJumpTableIndex()) - MIB = MIB.addJumpTableIndex(MO.getJumpTableIndex()); - else if (MO.isExternalSymbol()) - MIB = MIB.addExternalSymbol(MO.getSymbolName()); - else - assert(0 && "Unknown operand for FuseInst!"); + unsigned NumAddrOps = MOs.size(); + for (unsigned i = 0; i != NumAddrOps; ++i) + MIB = FuseInstrAddOperand(MIB, MOs[i]); + if (NumAddrOps < 4) // FrameIndex only + MIB.addImm(1).addReg(0).addImm(0); + } else { + MIB = FuseInstrAddOperand(MIB, MO); + } } return MIB; } -static MachineInstr *MakeM0Inst(const TargetInstrInfo &TII, - unsigned Opcode, unsigned FrameIndex, +static MachineInstr *MakeM0Inst(const TargetInstrInfo &TII, unsigned Opcode, + SmallVector &MOs, MachineInstr *MI) { - return addFrameReference(BuildMI(TII.get(Opcode)), FrameIndex).addImm(0); + MachineInstrBuilder MIB = BuildMI(TII.get(Opcode)); + + unsigned NumAddrOps = MOs.size(); + for (unsigned i = 0; i != NumAddrOps; ++i) + MIB = FuseInstrAddOperand(MIB, MOs[i]); + if (NumAddrOps < 4) // FrameIndex only + MIB.addImm(1).addReg(0).addImm(0); + return MIB.addImm(0); } @@ -390,13 +408,9 @@ } #endif - -MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr *MI, - unsigned i, - int FrameIndex) const { - // Check switch flag - if (NoFusing) return NULL; - +MachineInstr* +X86RegisterInfo::foldMemoryOperand(MachineInstr *MI, unsigned i, + SmallVector &MOs) const { // Table (and size) to search const TableEntry *OpcodeTablePtr = NULL; unsigned OpcodeTableSize = 0; @@ -412,7 +426,7 @@ if (isTwoAddr && NumOps >= 2 && i < 2 && MI->getOperand(0).isReg() && MI->getOperand(1).isReg() && - MI->getOperand(0).getReg() == MI->getOperand(1).getReg()) { + MI->getOperand(0).getReg() == MI->getOperand(1).getReg()) { static const TableEntry OpcodeTable[] = { { X86::ADC32ri, X86::ADC32mi }, { X86::ADC32ri8, X86::ADC32mi8 }, @@ -580,13 +594,13 @@ isTwoAddrFold = true; } else if (i == 0) { // If operand 0 if (MI->getOpcode() == X86::MOV16r0) - NewMI = MakeM0Inst(TII, X86::MOV16mi, FrameIndex, MI); + NewMI = MakeM0Inst(TII, X86::MOV16mi, MOs, MI); else if (MI->getOpcode() == X86::MOV32r0) - NewMI = MakeM0Inst(TII, X86::MOV32mi, FrameIndex, MI); + NewMI = MakeM0Inst(TII, X86::MOV32mi, MOs, MI); else if (MI->getOpcode() == X86::MOV64r0) - NewMI = MakeM0Inst(TII, X86::MOV64mi32, FrameIndex, MI); + NewMI = MakeM0Inst(TII, X86::MOV64mi32, MOs, MI); else if (MI->getOpcode() == X86::MOV8r0) - NewMI = MakeM0Inst(TII, X86::MOV8mi, FrameIndex, MI); + NewMI = MakeM0Inst(TII, X86::MOV8mi, MOs, MI); if (NewMI) { NewMI->copyKillDeadInfo(MI); return NewMI; @@ -658,6 +672,7 @@ { X86::XCHG64rr, X86::XCHG64mr }, { X86::XCHG8rr, X86::XCHG8mr } }; + ASSERT_SORTED(OpcodeTable); OpcodeTablePtr = OpcodeTable; OpcodeTableSize = ARRAY_SIZE(OpcodeTable); @@ -766,6 +781,7 @@ { X86::XCHG64rr, X86::XCHG64rm }, { X86::XCHG8rr, X86::XCHG8rm } }; + ASSERT_SORTED(OpcodeTable); OpcodeTablePtr = OpcodeTable; OpcodeTableSize = ARRAY_SIZE(OpcodeTable); @@ -960,6 +976,7 @@ { X86::XORPDrr, X86::XORPDrm }, { X86::XORPSrr, X86::XORPSrm } }; + ASSERT_SORTED(OpcodeTable); OpcodeTablePtr = OpcodeTable; OpcodeTableSize = ARRAY_SIZE(OpcodeTable); @@ -973,9 +990,9 @@ if (const TableEntry *Entry = TableLookup(OpcodeTablePtr, OpcodeTableSize, fromOpcode)) { if (isTwoAddrFold) - NewMI = FuseTwoAddrInst(Entry->to, FrameIndex, MI, TII); + NewMI = FuseTwoAddrInst(Entry->to, MOs, MI, TII); else - NewMI = FuseInst(Entry->to, i, FrameIndex, MI, TII); + NewMI = FuseInst(Entry->to, i, MOs, MI, TII); NewMI->copyKillDeadInfo(MI); return NewMI; } @@ -989,6 +1006,26 @@ } +MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr *MI, unsigned OpNum, + int FrameIndex) const { + // Check switch flag + if (NoFusing) return NULL; + SmallVector MOs; + MOs.push_back(MachineOperand::CreateFrameIndex(FrameIndex)); + return foldMemoryOperand(MI, OpNum, MOs); +} + +MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr *MI, unsigned OpNum, + MachineInstr *LoadMI) const { + // Check switch flag + if (NoFusing) return NULL; + SmallVector MOs; + unsigned NumOps = TII.getNumOperands(LoadMI->getOpcode()); + for (unsigned i = NumOps - 4; i != NumOps; ++i) + MOs.push_back(LoadMI->getOperand(i)); + return foldMemoryOperand(MI, OpNum, MOs); +} + const unsigned * X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { static const unsigned CalleeSavedRegs32Bit[] = { Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.h?rev=41599&r1=41598&r2=41599&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.h (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.h Thu Aug 30 00:54:07 2007 @@ -14,6 +14,7 @@ #ifndef X86REGISTERINFO_H #define X86REGISTERINFO_H +#include "llvm/ADT/SmallVector.h" #include "llvm/Target/MRegisterInfo.h" #include "X86GenRegisterInfo.h.inc" @@ -92,6 +93,13 @@ unsigned OpNum, int FrameIndex) const; + /// foldMemoryOperand - Same as the previous version except it allows folding + /// of any load and store from / to any address, not just from a specific + /// stack slot. + MachineInstr* foldMemoryOperand(MachineInstr* MI, + unsigned OpNum, + MachineInstr* LoadMI) const; + /// getCalleeSavedRegs - Return a null-terminated list of all of the /// callee-save registers on this target. const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const; @@ -132,6 +140,11 @@ // Exception handling queries. unsigned getEHExceptionRegister() const; unsigned getEHHandlerRegister() const; + +private: + MachineInstr* foldMemoryOperand(MachineInstr* MI, + unsigned OpNum, + SmallVector &MOs) const; }; // getX86SubSuperRegister - X86 utility function. It returns the sub or super Modified: llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll?rev=41599&r1=41598&r2=41599&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll (original) +++ llvm/trunk/test/CodeGen/X86/constant-pool-remat-0.ll Thu Aug 30 00:54:07 2007 @@ -1,6 +1,7 @@ ; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | count 3 +; RUN: llvm-as < %s | llc -march=x86-64 -stats -info-output-file - | grep asm-printer | grep 6 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep LCPI | count 3 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats -info-output-file - | grep asm-printer | grep 9 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats -info-output-file - | grep asm-printer | grep 8 declare fastcc float @qux(float %y) From evan.cheng at apple.com Thu Aug 30 01:00:17 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 29 Aug 2007 23:00:17 -0700 Subject: [llvm-commits] [llvm] r40736 - in /llvm/trunk: lib/Target/X86/X86InstrMMX.td lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/constant-pool-remat-0.ll In-Reply-To: <6C2FA8F5-8BFE-4825-AD59-14D357786E7B@apple.com> References: <200708021427.l72ERvxa006217@zion.cs.uiuc.edu> <6C2FA8F5-8BFE-4825-AD59-14D357786E7B@apple.com> Message-ID: This is done. Now we emit this: _array: subq $8, %rsp mulss LCPI1_0(%rip), %xmm0 call _qux mulss LCPI1_0(%rip), %xmm0 addq $8, %rsp ret Evan On Aug 2, 2007, at 8:50 AM, Chris Lattner wrote: >> Mark the SSE and MMX load instructions that >> X86InstrInfo::isReallyTriviallyReMaterializable knows how to handle >> with the isReMaterializable flag so that it is given a chance to >> handle >> them. Without hoisting constant-pool loads from loops this isn't very >> visible, though it does keep CodeGen/X86/constant-pool-remat-0.ll >> from >> making a copy of the constant pool on the stack. >> >> @@ -0,0 +1,10 @@ >> +; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | wc -l | grep 3 >> + >> +declare float @qux(float %y) >> + >> +define float @array(float %a) { >> + %n = mul float %a, 9.0 >> + %m = call float @qux(float %n) >> + %o = mul float %m, 9.0 >> + ret float %o >> +} > > Interesting testcase. I'm now getting: > > _array: > subq $8, %rsp > movss LCPI1_0(%rip), %xmm1 > mulss %xmm1, %xmm0 > call _qux > movss LCPI1_0(%rip), %xmm1 > mulss %xmm1, %xmm0 > addq $8, %rsp > ret > > for this. Both loads should be folded into the mulss's. Because the > load is shared at isel time, this can't be done there, but it can be > done after the remat. Maybe the register allocator needs to call > MRegisterInfo::foldMemoryOperand if the remat is a load that has a > single use? > > -Chris > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From tonic at nondot.org Thu Aug 30 11:07:21 2007 From: tonic at nondot.org (Tanya Lattner) Date: Thu, 30 Aug 2007 16:07:21 -0000 Subject: [llvm-commits] [llvm] r41608 - /llvm/trunk/test/CodeGen/X86/2004-02-12-Memcpy.llx Message-ID: <200708301607.l7UG7LPi003225@zion.cs.uiuc.edu> Author: tbrethou Date: Thu Aug 30 11:07:20 2007 New Revision: 41608 URL: http://llvm.org/viewvc/llvm-project?rev=41608&view=rev Log: Do not run on darwin. Modified: llvm/trunk/test/CodeGen/X86/2004-02-12-Memcpy.llx Modified: llvm/trunk/test/CodeGen/X86/2004-02-12-Memcpy.llx URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2004-02-12-Memcpy.llx?rev=41608&r1=41607&r2=41608&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2004-02-12-Memcpy.llx (original) +++ llvm/trunk/test/CodeGen/X86/2004-02-12-Memcpy.llx Thu Aug 30 11:07:20 2007 @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep movs | count 1 -; RUN: llvm-as < %s | llc -march=x86 | grep memcpy | count 2 +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | grep movs | count 1 +; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | grep memcpy | count 2 @A = global [32 x i32] zeroinitializer @B = global [32 x i32] zeroinitializer From kremenek at apple.com Thu Aug 30 12:01:41 2007 From: kremenek at apple.com (Ted Kremenek) Date: Thu, 30 Aug 2007 17:01:41 -0000 Subject: [llvm-commits] [llvm] r41610 - /llvm/trunk/include/llvm/Support/GraphWriter.h Message-ID: <200708301701.l7UH1fZH007059@zion.cs.uiuc.edu> Author: kremenek Date: Thu Aug 30 12:01:41 2007 New Revision: 41610 URL: http://llvm.org/viewvc/llvm-project?rev=41610&view=rev Log: Added Graphviz escaping for the '|' character. Modified: llvm/trunk/include/llvm/Support/GraphWriter.h Modified: llvm/trunk/include/llvm/Support/GraphWriter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/GraphWriter.h?rev=41610&r1=41609&r2=41610&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/GraphWriter.h (original) +++ llvm/trunk/include/llvm/Support/GraphWriter.h Thu Aug 30 12:01:41 2007 @@ -52,7 +52,7 @@ break; // don't disturb \l case '{': case '}': case '<': case '>': - case '"': + case '|': case '"': Str.insert(Str.begin()+i, '\\'); // Escape character... ++i; // don't infinite loop break; From clattner at apple.com Thu Aug 30 13:05:45 2007 From: clattner at apple.com (Chris Lattner) Date: Thu, 30 Aug 2007 11:05:45 -0700 Subject: [llvm-commits] [llvm] r40736 - in /llvm/trunk: lib/Target/X86/X86InstrMMX.td lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/constant-pool-remat-0.ll In-Reply-To: References: <200708021427.l72ERvxa006217@zion.cs.uiuc.edu> <6C2FA8F5-8BFE-4825-AD59-14D357786E7B@apple.com> Message-ID: <424AA080-1742-4F51-93EC-B98815AEC13D@apple.com> Woot, nice! The codegen looks great on x86-32 also. I noticed that we're apparently not remat'ing loads "flds" and friends on the fpstack side, but that doesn't seem very critical. -Chris On Aug 29, 2007, at 11:00 PM, Evan Cheng wrote: > This is done. Now we emit this: > > _array: > subq $8, %rsp > mulss LCPI1_0(%rip), %xmm0 > call _qux > mulss LCPI1_0(%rip), %xmm0 > addq $8, %rsp > ret > > Evan > > On Aug 2, 2007, at 8:50 AM, Chris Lattner wrote: > >>> Mark the SSE and MMX load instructions that >>> X86InstrInfo::isReallyTriviallyReMaterializable knows how to handle >>> with the isReMaterializable flag so that it is given a chance to >>> handle >>> them. Without hoisting constant-pool loads from loops this isn't >>> very >>> visible, though it does keep CodeGen/X86/constant-pool-remat-0.ll >>> from >>> making a copy of the constant pool on the stack. >>> >>> @@ -0,0 +1,10 @@ >>> +; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | wc -l | >>> grep 3 >>> + >>> +declare float @qux(float %y) >>> + >>> +define float @array(float %a) { >>> + %n = mul float %a, 9.0 >>> + %m = call float @qux(float %n) >>> + %o = mul float %m, 9.0 >>> + ret float %o >>> +} >> >> Interesting testcase. I'm now getting: >> >> _array: >> subq $8, %rsp >> movss LCPI1_0(%rip), %xmm1 >> mulss %xmm1, %xmm0 >> call _qux >> movss LCPI1_0(%rip), %xmm1 >> mulss %xmm1, %xmm0 >> addq $8, %rsp >> ret >> >> for this. Both loads should be folded into the mulss's. Because the >> load is shared at isel time, this can't be done there, but it can be >> done after the remat. Maybe the register allocator needs to call >> MRegisterInfo::foldMemoryOperand if the remat is a load that has a >> single use? >> >> -Chris >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From asl at math.spbu.ru Thu Aug 30 17:27:48 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Fri, 31 Aug 2007 02:27:48 +0400 Subject: [llvm-commits] Unbreak objc FE compilation on non-darwin Message-ID: <1188512868.10219.21.camel@asl.dorms.spbu.ru> Hello, Everyone. Please find attached patch for unbreaking objc FE for llvm-gcc 4.2. I've just fixed couple of "apple local" stuff (some of them were "generalized", some - just cleaned). Ok to commit? -- With best regards, Anton Korobeynikov. Faculty of Mathematics & Mechanics, Saint Petersburg State University. -------------- next part -------------- Fix compilation of objc fe From: Anton Korobeynikov --- gcc/config/darwin-protos.h | 1 - gcc/config/darwin.h | 14 ++++++++++++++ gcc/objc/objc-act.c | 30 +++++++++++++++++++++++------- 3 files changed, 37 insertions(+), 8 deletions(-) diff --git a/gcc/config/darwin-protos.h b/gcc/config/darwin-protos.h index 646651e..eefb408 100644 --- a/gcc/config/darwin-protos.h +++ b/gcc/config/darwin-protos.h @@ -134,7 +134,6 @@ extern bool objc_check_cfstringref_type (tree); /* APPLE LOCAL begin radar 2996215 */ extern tree objc_create_init_utf16_var (const unsigned char *, size_t, size_t *); -extern bool objc_cvt_utf8_utf16 (const unsigned char *, size_t, unsigned char **, size_t *); /* APPLE LOCAL end radar 2996215 */ /* APPLE LOCAL radar 5202926 */ extern bool objc_anonymous_local_objc_name (const char *); diff --git a/gcc/config/darwin.h b/gcc/config/darwin.h index e45023c..d5ad9c1 100644 --- a/gcc/config/darwin.h +++ b/gcc/config/darwin.h @@ -694,6 +694,20 @@ do { \ error ("Mac OS X version 10.5 or later is needed for zerocost-exceptions"); \ } while (0) /* APPLE LOCAL end radar 5023725 */ + +/* LLVM LOCAL begin */ +/* APPLE LOCAL begin radar 4590191 */ +#undef OBJC_FLAG_SJLJ_EXCEPTIONS +#define OBJC_FLAG_SJLJ_EXCEPTIONS \ + do { \ + if (darwin_macosx_version_min \ + && strverscmp (darwin_macosx_version_min, "10.3") < 0) \ + warning (0, "Mac OS X version 10.3 or later is needed instead of %s for objc/obj-c++ exceptions", \ + darwin_macosx_version_min); \ + } while(0) +/* APPLE LOCAL end radar 4590191 */ +/* LLVM LOCAL end */ + /* APPLE LOCAL begin radar 4862848 */ #undef OBJC_FLAG_OBJC_ABI #define OBJC_FLAG_OBJC_ABI \ diff --git a/gcc/objc/objc-act.c b/gcc/objc/objc-act.c index b35c30a..774fc4c 100644 --- a/gcc/objc/objc-act.c +++ b/gcc/objc/objc-act.c @@ -123,6 +123,13 @@ static bool should_call_super_finalize = false; #define OBJC_FLAG_ZEROCOST_EXCEPTIONS #endif /* APPLE LOCAL end radar 5023725 */ +/* LLVM LOCAL begin */ +/* APPLE LOCAL begin radar 4590191 */ +#ifndef OBJC_FLAG_SJLJ_EXCEPTIONS +#define OBJC_FLAG_SJLJ_EXCEPTIONS +#endif +/* APPLE LOCAL end radar 4590191 */ +/* LLVM LOCAL end */ /* APPLE LOCAL begin radar 4531086 */ #ifndef OBJC_WARN_OBJC2_FEATURES #define OBJC_WARN_OBJC2_FEATURES(MESSAGE) @@ -7541,10 +7548,9 @@ objc_init_exceptions (void) /* APPLE LOCAL begin radar 4590191 */ if (flag_objc_sjlj_exceptions) { - if (darwin_macosx_version_min - && strverscmp (darwin_macosx_version_min, "10.3") < 0) - warning (0, "Mac OS X version 10.3 or later is needed instead of %s for objc/obj-c++ exceptions", - darwin_macosx_version_min); + /* LLVM LOCAL begin */ + OBJC_FLAG_SJLJ_EXCEPTIONS; + /* LLVM LOCAL end */ } /* APPLE LOCAL end radar 4590191 */ /* APPLE LOCAL begin radar 2848255 */ @@ -17855,7 +17861,7 @@ handle_class_ref (tree chain) set_user_assembler_name(decl, string); /* Let optimizer know that this decl is not removable. */ DECL_PRESERVE_P (decl) = 1; -#endif ENABLE_LLVM +#endif /* LLVM LOCAL end */ pushdecl (decl); @@ -17874,7 +17880,7 @@ handle_class_ref (tree chain) /* This decl's name is special. Ask llvm to not add leading underscore by setting it as a user supplied asm name. */ set_user_assembler_name(decl, string); -#endif ENABLE_LLVM +#endif /* LLVM LOCAL end */ /* Force the output of the decl as this forces the reference of the class. */ mark_decl_referenced (decl); @@ -17958,7 +17964,7 @@ handle_impent (struct imp_entry *impent) set_user_assembler_name(decl, string); /* Let optimizer know that this decl is not removable. */ DECL_PRESERVE_P (decl) = 1; -#endif ENABLE_LLVM +#endif /* LLVM LOCAL end */ DECL_INITIAL (decl) = init; assemble_variable (decl, 1, 0, 0); @@ -18811,7 +18817,17 @@ objc_check_format_nsstring (tree argument, } /* APPLE LOCAL end radar 4985544 - 5195402 */ +/* LLVM LOCAL begin */ /* APPLE LOCAL begin radar 2996215 */ +/* Objc wrapper to call libcpp's conversion routine. */ +static bool +objc_cvt_utf8_utf16 (const unsigned char *inbuf, size_t length, + unsigned char **uniCharBuf, size_t *numUniChars) +{ + return cpp_utf8_utf16 (parse_in, inbuf, length, uniCharBuf, numUniChars); +} +/* LLVM LOCAL end */ + /* This routine declares static char __utf16_string [numUniChars] in __TEXT,__ustring section and initializes it with uniCharBuf[numUniChars] characters. */ From raulherbster at gmail.com Thu Aug 30 18:21:28 2007 From: raulherbster at gmail.com (Raul Herbster) Date: Thu, 30 Aug 2007 23:21:28 -0000 Subject: [llvm-commits] [llvm] r41625 - /llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp Message-ID: <200708302321.l7UNLSIT022839@zion.cs.uiuc.edu> Author: raulherbster Date: Thu Aug 30 18:21:27 2007 New Revision: 41625 URL: http://llvm.org/viewvc/llvm-project?rev=41625&view=rev Log: JITInfo now resolves function addrs and also relocations. It always emits a stub. Modified: llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp Modified: llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp?rev=41625&r1=41624&r2=41625&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp Thu Aug 30 18:21:27 2007 @@ -21,12 +21,7 @@ using namespace llvm; void ARMJITInfo::replaceMachineCodeForFunction(void *Old, void *New) { - unsigned char *OldByte = (unsigned char *)Old; - *OldByte++ = 0xEA; // Emit B opcode. - unsigned *OldWord = (unsigned *)OldByte; - unsigned NewAddr = (intptr_t)New; - unsigned OldAddr = (intptr_t)OldWord; - *OldWord = NewAddr - OldAddr - 4; // Emit PC-relative addr of New code. + abort(); } /// JITCompilerFunction - This contains the address of the JIT function used to @@ -80,18 +75,16 @@ << ": Resolving call to function: " << TheVM->getFunctionReferencedName((void*)RetAddr) << "\n"; #endif + intptr_t Addr = RetAddr - 4; - // Sanity check to make sure this really is a branch and link instruction. - assert(((unsigned char*)RetAddr-1)[3] == 0xEB && "Not a branch and link instr!"); - - intptr_t NewVal = (intptr_t)JITCompilerFunction((void*)RetAddr); + intptr_t NewVal = (intptr_t)JITCompilerFunction((void*)Addr); // Rewrite the call target... so that we don't end up here every time we // execute the call. - *(intptr_t *)RetAddr = (intptr_t)(NewVal-RetAddr-4); + *(intptr_t *)Addr = NewVal; // Change the return address to reexecute the branch and link instruction... - *RetAddrLoc -= 1; + *RetAddrLoc -= 12; } TargetJITInfo::LazyResolverFn @@ -101,23 +94,25 @@ } void *ARMJITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) { - unsigned addr = (intptr_t)Fn-MCE.getCurrentPCValue()-4; + unsigned addr = (intptr_t)Fn; // If this is just a call to an external function, emit a branch instead of a // call. The code is the same except for one bit of the last instruction. if (Fn != (void*)(intptr_t)ARMCompilationCallback) { - MCE.startFunctionStub(4, 2); - MCE.emitByte(0xEA); // branch to the corresponding function addr - MCE.emitByte((unsigned char)(addr >> 0)); - MCE.emitByte((unsigned char)(addr >> 8)); - MCE.emitByte((unsigned char)(addr >> 16)); - return MCE.finishFunctionStub(0); + // branch to the corresponding function addr + // the stub is 8-byte size and 4-aligned + MCE.startFunctionStub(8, 4); + MCE.emitWordLE(0xE51FF004); // LDR PC, [PC,#-4] + MCE.emitWordLE(addr); // addr of function } else { - MCE.startFunctionStub(5, 2); - MCE.emitByte(0xEB); // branch and link to the corresponding function addr + // branch and link to the corresponding function addr + // the stub is 20-byte size and 4-aligned + MCE.startFunctionStub(20, 4); + MCE.emitWordLE(0xE92D4800); // STMFD SP!, [R11, LR] + MCE.emitWordLE(0xE28FE004); // ADD LR, PC, #4 + MCE.emitWordLE(0xE51FF004); // LDR PC, [PC,#-4] + MCE.emitWordLE(addr); // addr of function + MCE.emitWordLE(0xE8BD8800); // LDMFD SP!, [R11, PC] } - MCE.emitByte((unsigned char)(addr >> 0)); - MCE.emitByte((unsigned char)(addr >> 8)); - MCE.emitByte((unsigned char)(addr >> 16)); return MCE.finishFunctionStub(0); } @@ -132,15 +127,33 @@ intptr_t ResultPtr = (intptr_t)MR->getResultPointer(); switch ((ARM::RelocationType)MR->getRelocationType()) { case ARM::reloc_arm_relative: { - // PC relative relocation - *((unsigned*)RelocPos) += (unsigned)ResultPtr; + // It is necessary to calculate the correct PC relative value. We + // subtract the base addr from the target addr to form a byte offset. + ResultPtr = ResultPtr-(intptr_t)RelocPos-8; + // If the result is positive, set bit U(23) to 1. + if (ResultPtr >= 0) + *((unsigned*)RelocPos) |= 1 << 23; + else { + // otherwise, obtain the absolute value and set + // bit U(23) to 0. + ResultPtr *= -1; + *((unsigned*)RelocPos) &= 0xFF7FFFFF; + } + // set the immed value calculated + *((unsigned*)RelocPos) |= (unsigned)ResultPtr; + // set register Rn to PC + *((unsigned*)RelocPos) |= 0xF << 16; break; } - case ARM::reloc_arm_absolute: - break; case ARM::reloc_arm_branch: { - // relocation to b and bl instructions - ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2; + // It is necessary to calculate the correct value of signed_immed_24 + // field. We subtract the base addr from the target addr to form a + // byte offset, which must be inside the range -33554432 and +33554428. + // Then, we set the signed_immed_24 field of the instruction to bits + // [25:2] of the byte offset. More details ARM-ARM p. A4-11. + ResultPtr = ResultPtr-(intptr_t)RelocPos-8; + ResultPtr = (ResultPtr & 0x03FFFFFC) >> 2; + assert(ResultPtr >= -33554432 && ResultPtr <= 33554428); *((unsigned*)RelocPos) |= ResultPtr; break; } From raulherbster at gmail.com Thu Aug 30 18:25:47 2007 From: raulherbster at gmail.com (Raul Herbster) Date: Thu, 30 Aug 2007 23:25:47 -0000 Subject: [llvm-commits] [llvm] r41626 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Message-ID: <200708302325.l7UNPlNx022983@zion.cs.uiuc.edu> Author: raulherbster Date: Thu Aug 30 18:25:47 2007 New Revision: 41626 URL: http://llvm.org/viewvc/llvm-project?rev=41626&view=rev Log: ARM instruction table was modified by adding information to generate multiply instruction of V5TE. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=41626&r1=41625&r2=41626&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu Aug 30 18:25:47 2007 @@ -342,33 +342,38 @@ def Pseudo : Format<1>; def MulFrm : Format<2>; -def Branch : Format<3>; -def BranchMisc : Format<4>; - -def DPRdIm : Format<5>; -def DPRdReg : Format<6>; -def DPRdSoReg : Format<7>; -def DPRdMisc : Format<8>; -def DPRnIm : Format<9>; -def DPRnReg : Format<10>; -def DPRnSoReg : Format<11>; -def DPRIm : Format<12>; -def DPRReg : Format<13>; -def DPRSoReg : Format<14>; -def DPRImS : Format<15>; -def DPRRegS : Format<16>; -def DPRSoRegS : Format<17>; - -def LdFrm : Format<18>; -def StFrm : Format<19>; - -def ArithMisc : Format<20>; -def ThumbFrm : Format<21>; -def VFPFrm : Format<22>; +def MulSMLAW : Format<3>; +def MulSMULW : Format<4>; +def MulSMLA : Format<5>; +def MulSMUL : Format<6>; +def Branch : Format<7>; +def BranchMisc : Format<8>; + +def DPRdIm : Format<9>; +def DPRdReg : Format<10>; +def DPRdSoReg : Format<11>; +def DPRdMisc : Format<12>; +def DPRnIm : Format<13>; +def DPRnReg : Format<14>; +def DPRnSoReg : Format<15>; +def DPRIm : Format<16>; +def DPRReg : Format<17>; +def DPRSoReg : Format<18>; +def DPRImS : Format<19>; +def DPRRegS : Format<20>; +def DPRSoRegS : Format<21>; + +def LdFrm : Format<22>; +def StFrm : Format<23>; + +def ArithMisc : Format<24>; +def ThumbFrm : Format<25>; +def VFPFrm : Format<26>; //===----------------------------------------------------------------------===// + // ARM Instruction templates. // @@ -776,7 +781,7 @@ // FIXME: should be able to write a pattern for ARMBrcond, but can't use // a two-value operand where a dag node expects two operands. :( - def Bcc : AI<0x0, (outs), (ins brtarget:$target), Branch, + def Bcc : AI<0xA, (outs), (ins brtarget:$target), Branch, "b", " $target", [/*(ARMbrcond bb:$target, imm:$cc, CCR:$ccr)*/]>; } @@ -815,7 +820,7 @@ [(set GPR:$dst, (sextloadi8 addrmode3:$addr))]>; // Load doubleword -def LDRD : AI3<0x0, (outs GPR:$dst), (ins addrmode3:$addr), LdFrm, +def LDRD : AI3<0xD, (outs GPR:$dst), (ins addrmode3:$addr), LdFrm, "ldr", "d $dst, $addr", []>, Requires<[IsARM, HasV5T]>; @@ -877,7 +882,7 @@ [(truncstorei8 GPR:$src, addrmode2:$addr)]>; // Store doubleword -def STRD : AI3<0x0, (outs), (ins GPR:$src, addrmode3:$addr), StFrm, +def STRD : AI3<0xF, (outs), (ins GPR:$src, addrmode3:$addr), StFrm, "str", "d $src, $addr", []>, Requires<[IsARM, HasV5T]>; @@ -1125,76 +1130,86 @@ [(set GPR:$dst, (sub GPR:$c, (mulhs GPR:$a, GPR:$b)))]>, Requires<[IsARM, HasV6]>; -multiclass AI_smul opcod, string opc, PatFrag opnode> { - def BB : AI { + def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL, !strconcat(opc, "bb"), " $dst, $a, $b", [(set GPR:$dst, (opnode (sext_inreg GPR:$a, i16), (sext_inreg GPR:$b, i16)))]>, Requires<[IsARM, HasV5TE]>; - def BT : AI, Requires<[IsARM, HasV5TE]>; - def TB : AI, Requires<[IsARM, HasV5TE]>; - def TT : AI, Requires<[IsARM, HasV5TE]>; - def WB : AI, Requires<[IsARM, HasV5TE]>; - def WT : AI, Requires<[IsARM, HasV5TE]>; } -multiclass AI_smla opcod, string opc, PatFrag opnode> { - def BB : AI { + def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), MulSMLA, !strconcat(opc, "bb"), " $dst, $a, $b, $acc", [(set GPR:$dst, (add GPR:$acc, (opnode (sext_inreg GPR:$a, i16), (sext_inreg GPR:$b, i16))))]>, Requires<[IsARM, HasV5TE]>; - def BT : AI, Requires<[IsARM, HasV5TE]>; - def TB : AI, Requires<[IsARM, HasV5TE]>; - def TT : AI, Requires<[IsARM, HasV5TE]>; - def WB : AI, Requires<[IsARM, HasV5TE]>; - def WT : AI, Requires<[IsARM, HasV5TE]>; } -defm SMUL : AI_smul<0x0, "smul", BinOpFrag<(mul node:$LHS, node:$RHS)>>; -defm SMLA : AI_smla<0x0, "smla", BinOpFrag<(mul node:$LHS, node:$RHS)>>; +defm SMUL : AI_smul<"smul", BinOpFrag<(mul node:$LHS, node:$RHS)>>; +defm SMLA : AI_smla<"smla", BinOpFrag<(mul node:$LHS, node:$RHS)>>; // TODO: Halfword multiple accumulate long: SMLAL // TODO: Dual halfword multiple: SMUAD, SMUSD, SMLAD, SMLSD, SMLALD, SMLSLD From raulherbster at gmail.com Thu Aug 30 18:29:26 2007 From: raulherbster at gmail.com (Raul Herbster) Date: Thu, 30 Aug 2007 23:29:26 -0000 Subject: [llvm-commits] [llvm] r41627 - /llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Message-ID: <200708302329.l7UNTQrL023150@zion.cs.uiuc.edu> Author: raulherbster Date: Thu Aug 30 18:29:26 2007 New Revision: 41627 URL: http://llvm.org/viewvc/llvm-project?rev=41627&view=rev Log: Comments added. It now generates V5TE multiply instructions. However, it is still necessary to model PUWLSH bits more clearly. Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=41627&r1=41626&r2=41627&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Thu Aug 30 18:29:26 2007 @@ -54,9 +54,9 @@ } void emitInstruction(const MachineInstr &MI); - unsigned getBinaryCodeForInstr(const MachineInstr &MI); int getMachineOpValue(const MachineInstr &MI, unsigned OpIndex); unsigned getBaseOpcodeFor(const TargetInstrDescriptor *TID); + unsigned getBinaryCodeForInstr(const MachineInstr &MI); void emitGlobalAddressForCall(GlobalValue *GV, bool DoesntNeedStub); void emitExternalSymbolAddress(const char *ES, unsigned Reloc); @@ -64,6 +64,8 @@ int Disp = 0, unsigned PCAdj = 0 ); void emitJumpTableAddress(unsigned JTI, unsigned Reloc, unsigned PCAdj = 0); + void emitGlobalConstant(const Constant *CV); + void emitMachineBasicBlock(MachineBasicBlock *BB); private: int getShiftOp(const MachineOperand &MO); @@ -100,10 +102,13 @@ return false; } +/// getBaseOpcodeFor - Return the opcode value unsigned Emitter::getBaseOpcodeFor(const TargetInstrDescriptor *TID) { return (TID->TSFlags & ARMII::OpcodeMask) >> ARMII::OpcodeShift; } +/// getShiftOp - Verify which is the shift opcode (bit[6:5]) of the +/// machine operand. int Emitter::getShiftOp(const MachineOperand &MO) { unsigned ShiftOp = 0x0; switch(ARM_AM::getAM2ShiftOpc(MO.getImmedValue())) { @@ -133,20 +138,18 @@ rv = ARMRegisterInfo::getRegisterNumbering(MO.getReg()); } else if (MO.isImmediate()) { rv = MO.getImmedValue(); - } else if (MO.isGlobalAddress() || MO.isExternalSymbol() || - MO.isConstantPoolIndex() || MO.isJumpTableIndex()) { - - if (MO.isGlobalAddress()) { - emitGlobalAddressForCall(MO.getGlobal(), true); - } else if (MO.isExternalSymbol()) { - emitExternalSymbolAddress(MO.getSymbolName(), ARM::reloc_arm_relative); - } else if (MO.isConstantPoolIndex()) { - emitConstPoolAddress(MO.getConstantPoolIndex(), ARM::reloc_arm_relative); - } else if (MO.isJumpTableIndex()) { - emitJumpTableAddress(MO.getJumpTableIndex(), ARM::reloc_arm_relative); - } - + } else if (MO.isGlobalAddress()) { + emitGlobalAddressForCall(MO.getGlobal(), false); + } else if (MO.isExternalSymbol()) { + emitExternalSymbolAddress(MO.getSymbolName(), ARM::reloc_arm_relative); + } else if (MO.isConstantPoolIndex()) { + emitConstPoolAddress(MO.getConstantPoolIndex(), ARM::reloc_arm_relative); + } else if (MO.isJumpTableIndex()) { + emitJumpTableAddress(MO.getJumpTableIndex(), ARM::reloc_arm_relative); + } else if (MO.isMachineBasicBlock()) { + emitMachineBasicBlock(MO.getMachineBasicBlock()); } + return rv; } @@ -186,7 +189,11 @@ Reloc, JTI, PCAdj)); } - +/// emitMachineBasicBlock - Emit the specified address basic block. +void Emitter::emitMachineBasicBlock(MachineBasicBlock *BB) { + MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(), + ARM::reloc_arm_branch, BB)); +} void Emitter::emitInstruction(const MachineInstr &MI) { NumEmitted++; // Keep track of the # of mi's emitted @@ -196,6 +203,7 @@ unsigned Emitter::getBinaryCodeForInstr(const MachineInstr &MI) { const TargetInstrDescriptor *Desc = MI.getInstrDescriptor(); const unsigned opcode = MI.getOpcode(); + // initial instruction mask unsigned Value = 0xE0000000; unsigned op; @@ -204,10 +212,11 @@ switch(Desc->TSFlags & ARMII::FormMask) { default: { assert(0 && "Unknown instruction subtype!"); + // treat special instruction CLZ if(opcode == ARM::CLZ) { // set first operand op = getMachineOpValue(MI,0); - Value |= op << 12; + Value |= op << ARMII::RegRdShift; // set second operand op = getMachineOpValue(MI,1); @@ -215,9 +224,51 @@ } break; } + case ARMII::MulSMLAW: + case ARMII::MulSMULW: + // set bit W(21) + Value |= 1 << 21; + case ARMII::MulSMLA: + case ARMII::MulSMUL: { + // set bit W(21) + Value |= 1 << 24; + + // set opcode (bit[7:4]). For more information, see ARM-ARM page A3-31 + // SMLA - 1yx0 + // SMLAW - 1y00 + // SMULW - 1y10 + // SMUL - 1yx0 + unsigned char BaseOpcode = getBaseOpcodeFor(Desc); + Value |= BaseOpcode << 4; + + unsigned Format = (Desc->TSFlags & ARMII::FormMask); + if (Format == ARMII::MulSMUL) + Value |= 1 << 22; + + // set first operand + op = getMachineOpValue(MI,0); + Value |= op << ARMII::RegRnShift; + + // set second operand + op = getMachineOpValue(MI,1); + Value |= op; + + // set third operand + op = getMachineOpValue(MI,2); + Value |= op << ARMII::RegRsShift; + + // instructions SMLA and SMLAW have a fourth operand + if (Format != ARMII::MulSMULW && Format != ARMII::MulSMUL) { + op = getMachineOpValue(MI,3); + Value |= op << ARMII::RegRdShift; + } + + break; + } case ARMII::MulFrm: { + // bit[7:4] is always 9 Value |= 9 << 4; - + // set opcode (bit[23:20]) unsigned char BaseOpcode = getBaseOpcodeFor(Desc); Value |= BaseOpcode << 20; @@ -226,40 +277,53 @@ // set first operand op = getMachineOpValue(MI,0); - Value |= op << (isMUL || isMLA ? 16 : 12); + Value |= op << (isMUL || isMLA ? ARMII::RegRnShift : ARMII::RegRdShift); // set second operand op = getMachineOpValue(MI,1); - Value |= op << (isMUL || isMLA ? 0 : 16); + Value |= op << (isMUL || isMLA ? 0 : ARMII::RegRnShift); // set third operand op = getMachineOpValue(MI,2); - Value |= op << (isMUL || isMLA ? 8 : 0); + Value |= op << (isMUL || isMLA ? ARMII::RegRsShift : 0); + // multiply instructions (except MUL), have a fourth operand if (!isMUL) { op = getMachineOpValue(MI,3); - Value |= op << (isMLA ? 12 : 8); + Value |= op << (isMLA ? ARMII::RegRdShift : ARMII::RegRsShift); } break; } case ARMII::Branch: { + // set opcode (bit[27:24]) unsigned BaseOpcode = getBaseOpcodeFor(Desc); Value |= BaseOpcode << 24; + // set signed_immed_24 field op = getMachineOpValue(MI,0); Value |= op; + // if it is a conditional branch, set cond field + if (opcode == ARM::Bcc) { + op = getMachineOpValue(MI,1); + Value &= 0x0FFFFFFF; // clear conditional field + Value |= op << 28; // set conditional field + } + break; } case ARMII::BranchMisc: { + // set opcode (bit[7:4]) unsigned char BaseOpcode = getBaseOpcodeFor(Desc); Value |= BaseOpcode << 4; + // set bit[27:24] to 1, set bit[23:20] to 2 and set bit[19:8] to 0xFFF Value |= 0x12fff << 8; if (opcode == ARM::BX_RET) - op = 0xe; + op = 0xe; // the return register is LR else + // otherwise, set the return register op = getMachineOpValue(MI,0); Value |= op; @@ -272,12 +336,15 @@ break; } case ARMII::AddrMode1: { + // set opcode (bit[24:21]) of data-processing instructions unsigned char BaseOpcode = getBaseOpcodeFor(Desc); Value |= BaseOpcode << 21; + // treat 3 special instructions: MOVsra_flag, MOVsrl_flag and + // MOVrx. unsigned Format = (Desc->TSFlags & ARMII::FormMask); if (Format == ARMII::DPRdMisc) { - Value |= getMachineOpValue(MI,0) << 12; + Value |= getMachineOpValue(MI,0) << ARMII::RegRdShift; Value |= getMachineOpValue(MI,1); switch(opcode) { case ARM::MOVsra_flag: { @@ -298,20 +365,26 @@ break; } - bool IsDataProcessing3 = false; - - if (Format == ARMII::DPRImS || Format == ARMII::DPRRegS || - Format == ARMII::DPRSoRegS) { - Value |= 1 << 20; - IsDataProcessing3 = true; - } - + // Data processing operand instructions has 3 possible encodings (for more + // information, see ARM-ARM page A3-10): + // 1. , + // 2. , + // 3. ,, bool IsDataProcessing1 = Format == ARMII::DPRdIm || Format == ARMII::DPRdReg || Format == ARMII::DPRdSoReg; bool IsDataProcessing2 = Format == ARMII::DPRnIm || Format == ARMII::DPRnReg || Format == ARMII::DPRnSoReg; + bool IsDataProcessing3 = false; + + // set bit S(20) + if (Format == ARMII::DPRImS || Format == ARMII::DPRRegS || + Format == ARMII::DPRSoRegS || IsDataProcessing2) { + Value |= 1 << ARMII::S_BitShift; + IsDataProcessing3 = !IsDataProcessing2; + } + IsDataProcessing3 = Format == ARMII::DPRIm || Format == ARMII::DPRReg || Format == ARMII::DPRSoReg || @@ -320,22 +393,24 @@ // set first operand op = getMachineOpValue(MI,0); if (IsDataProcessing1 || IsDataProcessing3) { - Value |= op << 12; + Value |= op << ARMII::RegRdShift; } else if (IsDataProcessing2) { - Value |= op << 16; + Value |= op << ARMII::RegRnShift; } + // set second operand of data processing #3 instructions if (IsDataProcessing3) { op = getMachineOpValue(MI,1); - Value |= op << 16; + Value |= op << ARMII::RegRnShift; } unsigned OperandIndex = IsDataProcessing3 ? 2 : 1; - // set shift operand switch (Format) { case ARMII::DPRdIm: case ARMII::DPRnIm: case ARMII::DPRIm: case ARMII::DPRImS: { - Value |= 1 << 25; + // set bit I(25) to identify this is the immediate form of + Value |= 1 << ARMII::I_BitShift; + // set immed_8 field const MachineOperand &MO = MI.getOperand(OperandIndex); op = ARM_AM::getSOImmVal(MO.getImmedValue()); Value |= op; @@ -344,6 +419,7 @@ } case ARMII::DPRdReg: case ARMII::DPRnReg: case ARMII::DPRReg: case ARMII::DPRRegS: { + // set last operand (register Rm) op = getMachineOpValue(MI,OperandIndex); Value |= op; @@ -351,12 +427,20 @@ } case ARMII::DPRdSoReg: case ARMII::DPRnSoReg: case ARMII::DPRSoReg: case ARMII::DPRSoRegS: { + // set last operand (register Rm) op = getMachineOpValue(MI,OperandIndex); Value |= op; const MachineOperand &MO1 = MI.getOperand(OperandIndex + 1); const MachineOperand &MO2 = MI.getOperand(OperandIndex + 2); + // identify it the instr is in immed or register shifts encoding bool IsShiftByRegister = MO1.getReg() > 0; + // set shift operand (bit[6:4]). + // ASR - 101 if it is in register shifts encoding; 100, otherwise. + // LSL - 001 if it is in register shifts encoding; 000, otherwise. + // LSR - 011 if it is in register shifts encoding; 010, otherwise. + // ROR - 111 if it is in register shifts encoding; 110, otherwise. + // RRX - 110 and bit[11:7] clear. switch(ARM_AM::getSORegShOp(MO2.getImmedValue())) { default: assert(0 && "Unknown shift opc!"); case ARM_AM::asr: { @@ -390,13 +474,16 @@ break; } } + // set the field related to shift operations (except rrx). if(ARM_AM::getSORegShOp(MO2.getImmedValue()) != ARM_AM::rrx) if(IsShiftByRegister) { + // set the value of bit[11:8] (register Rs). assert(MRegisterInfo::isPhysicalRegister(MO1.getReg())); op = ARMRegisterInfo::getRegisterNumbering(MO1.getReg()); assert(ARM_AM::getSORegOffset(MO2.getImm()) == 0); - Value |= op << 8; + Value |= op << ARMII::RegRsShift; } else { + // set the value of bit [11:7] (shift_immed field). op = ARM_AM::getSORegOffset(MO2.getImm()); Value |= op << 7; } @@ -409,83 +496,107 @@ break; } case ARMII::AddrMode2: { + // bit 26 is always 1 Value |= 1 << 26; unsigned Index = (Desc->TSFlags & ARMII::IndexModeMask); + // if the instruction uses offset addressing or pre-indexed addressing, + // set bit P(24) to 1 if (Index == ARMII::IndexModePre || Index == 0) - Value |= 1 << 24; + Value |= 1 << ARMII::IndexShift; + // if the instruction uses post-indexed addressing, set bit W(21) to 1 if (Index == ARMII::IndexModePre) Value |= 1 << 21; unsigned Format = (Desc->TSFlags & ARMII::FormMask); + // If it is a load instruction (except LDRD), set bit L(20) to 1 if (Format == ARMII::LdFrm) - Value |= 1 << 20; + Value |= 1 << ARMII::L_BitShift; + // set bit B(22) unsigned BitByte = getBaseOpcodeFor(Desc); Value |= BitByte << 22; // set first operand op = getMachineOpValue(MI,0); - Value |= op << 12; + Value |= op << ARMII::RegRdShift; - // addressing mode + // set second operand op = getMachineOpValue(MI,1); - Value |= op << 16; + Value |= op << ARMII::RegRnShift; const MachineOperand &MO2 = MI.getOperand(2); const MachineOperand &MO3 = MI.getOperand(3); - Value |= (ARM_AM::getAM2Op(MO3.getImm()) == ARM_AM::add ? 1 : 0) << 23; + // set bit U(23) according to signal of immed value (positive or negative) + Value |= (ARM_AM::getAM2Op(MO3.getImm()) == ARM_AM::add ? 1 : 0) << + ARMII::U_BitShift; if (!MO2.getReg()) { // is immediate if (ARM_AM::getAM2Offset(MO3.getImm())) + // set the value of offset_12 field Value |= ARM_AM::getAM2Offset(MO3.getImm()); break; } - Value |= 1 << 25; + // set bit I(25), because this is not in immediate enconding. + Value |= 1 << ARMII::I_BitShift; assert(MRegisterInfo::isPhysicalRegister(MO2.getReg())); + // set bit[3:0] to the corresponding Rm register Value |= ARMRegisterInfo::getRegisterNumbering(MO2.getReg()); + // if this instr is in scaled register offset/index instruction, set + // shift_immed(bit[11:7]) and shift(bit[6:5]) fields. if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm())) { unsigned ShiftOp = getShiftOp(MO3); - Value |= ShiftOp << 5; - Value |= ShImm << 7; + Value |= ShiftOp << 5; // shift + Value |= ShImm << 7; // shift_immed } break; } case ARMII::AddrMode3: { + unsigned Index = (Desc->TSFlags & ARMII::IndexModeMask); + // if the instruction uses offset addressing or pre-indexed addressing, + // set bit P(24) to 1 if (Index == ARMII::IndexModePre || Index == 0) - Value |= 1 << 24; + Value |= 1 << ARMII::IndexShift; unsigned Format = (Desc->TSFlags & ARMII::FormMask); - if (Format == ARMII::LdFrm) - Value |= 1 << 20; + // If it is a load instruction (except LDRD), set bit L(20) to 1 + if (Format == ARMII::LdFrm && opcode != ARM::LDRD) + Value |= 1 << ARMII::L_BitShift; + // bit[7:4] is the opcode of this instruction class (bits S and H). unsigned char BaseOpcode = getBaseOpcodeFor(Desc); Value |= BaseOpcode << 4; // set first operand op = getMachineOpValue(MI,0); - Value |= op << 12; + Value |= op << ARMII::RegRdShift; - // addressing mode + // set second operand op = getMachineOpValue(MI,1); - Value |= op << 16; + Value |= op << ARMII::RegRnShift; const MachineOperand &MO2 = MI.getOperand(2); const MachineOperand &MO3 = MI.getOperand(3); - Value |= (ARM_AM::getAM2Op(MO3.getImm()) == ARM_AM::add ? 1 : 0) << 23; + // set bit U(23) according to signal of immed value (positive or negative) + Value |= (ARM_AM::getAM2Op(MO3.getImm()) == ARM_AM::add ? 1 : 0) << + ARMII::U_BitShift; + // if this instr is in register offset/index encoding, set bit[3:0] + // to the corresponding Rm register. if (MO2.getReg()) { Value |= ARMRegisterInfo::getRegisterNumbering(MO2.getReg()); break; } + // if this instr is in immediate offset/index encoding, set bit 22 to 1 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm())) { Value |= 1 << 22; + // set operands Value |= (ImmOffs >> 4) << 8; // immedH Value |= (ImmOffs & ~0xF); // immedL } @@ -493,30 +604,36 @@ break; } case ARMII::AddrMode4: { + // bit 27 is always 1 Value |= 1 << 27; unsigned Format = (Desc->TSFlags & ARMII::FormMask); + // if it is a load instr, set bit L(20) to 1 if (Format == ARMII::LdFrm) - Value |= 1 << 20; + Value |= 1 << ARMII::L_BitShift; unsigned OpIndex = 0; // set first operand op = getMachineOpValue(MI,OpIndex); - Value |= op << 16; + Value |= op << ARMII::RegRnShift; - // set addressing mode + // set addressing mode by modifying bits U(23) and P(24) + // IA - Increment after - bit U = 1 and bit P = 0 + // IB - Increment before - bit U = 1 and bit P = 1 + // DA - Decrement after - bit U = 0 and bit P = 0 + // DB - Decrement before - bit U = 0 and bit P = 1 const MachineOperand &MO = MI.getOperand(OpIndex + 1); ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO.getImm()); switch(Mode) { default: assert(0 && "Unknown addressing sub-mode!"); case ARM_AM::ia: Value |= 0x1 << 23; break; - case ARM_AM::ib: Value |= 0x2 << 23; break; + case ARM_AM::ib: Value |= 0x3 << 23; break; case ARM_AM::da: break; case ARM_AM::db: Value |= 0x1 << 24; break; } - // set flag W + // set bit W(21) if (ARM_AM::getAM4WBFlag(MO.getImm())) Value |= 0x1 << 21; From raulherbster at gmail.com Thu Aug 30 18:31:36 2007 From: raulherbster at gmail.com (Raul Herbster) Date: Thu, 30 Aug 2007 23:31:36 -0000 Subject: [llvm-commits] [llvm] r41628 - /llvm/trunk/lib/Target/ARM/ARMRelocations.h Message-ID: <200708302331.l7UNVa6e023269@zion.cs.uiuc.edu> Author: raulherbster Date: Thu Aug 30 18:31:35 2007 New Revision: 41628 URL: http://llvm.org/viewvc/llvm-project?rev=41628&view=rev Log: Unused relocation type reloc_arm_absolute removed. Modified: llvm/trunk/lib/Target/ARM/ARMRelocations.h Modified: llvm/trunk/lib/Target/ARM/ARMRelocations.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRelocations.h?rev=41628&r1=41627&r2=41628&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMRelocations.h (original) +++ llvm/trunk/lib/Target/ARM/ARMRelocations.h Thu Aug 30 18:31:35 2007 @@ -21,8 +21,6 @@ enum RelocationType { reloc_arm_relative, - reloc_arm_absolute, - reloc_arm_branch }; } From raulherbster at gmail.com Thu Aug 30 18:34:15 2007 From: raulherbster at gmail.com (Raul Herbster) Date: Thu, 30 Aug 2007 23:34:15 -0000 Subject: [llvm-commits] [llvm] r41629 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Message-ID: <200708302334.l7UNYFIP023483@zion.cs.uiuc.edu> Author: raulherbster Date: Thu Aug 30 18:34:14 2007 New Revision: 41629 URL: http://llvm.org/viewvc/llvm-project?rev=41629&view=rev Log: Instruction formats added used to generate multiply instructions of V5TE. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=41629&r1=41628&r2=41629&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Thu Aug 30 18:34:14 2007 @@ -68,48 +68,61 @@ FormShift = 13, FormMask = 31 << FormShift, -// Pseudo instructions + // Pseudo instructions Pseudo = 1 << FormShift, -// Multiply instructions + // Multiply instructions MulFrm = 2 << FormShift, - -// Branch instructions - Branch = 3 << FormShift, - BranchMisc = 4 << FormShift, - -// Data Processing instructions - DPRdIm = 5 << FormShift, - DPRdReg = 6 << FormShift, - DPRdSoReg = 7 << FormShift, - DPRdMisc = 8 << FormShift, - - DPRnIm = 9 << FormShift, - DPRnReg = 10 << FormShift, - DPRnSoReg = 11 << FormShift, - - DPRIm = 12 << FormShift, - DPRReg = 13 << FormShift, - DPRSoReg = 14 << FormShift, - - DPRImS = 15 << FormShift, - DPRRegS = 16 << FormShift, - DPRSoRegS = 17 << FormShift, - -// Load and Store - LdFrm = 18 << FormShift, - StFrm = 19 << FormShift, - -// Miscellaneous arithmetic instructions - ArithMisc = 20 << FormShift, - -// Thumb format - ThumbFrm = 21 << FormShift, - -// VFP format - VPFFrm = 22 << FormShift - - + MulSMLAW = 3 << FormShift, + MulSMULW = 4 << FormShift, + MulSMLA = 5 << FormShift, + MulSMUL = 6 << FormShift, + + // Branch instructions + Branch = 7 << FormShift, + BranchMisc = 8 << FormShift, + + // Data Processing instructions + DPRdIm = 9 << FormShift, + DPRdReg = 10 << FormShift, + DPRdSoReg = 11 << FormShift, + DPRdMisc = 12 << FormShift, + + DPRnIm = 13 << FormShift, + DPRnReg = 14 << FormShift, + DPRnSoReg = 15 << FormShift, + + DPRIm = 16 << FormShift, + DPRReg = 17 << FormShift, + DPRSoReg = 18 << FormShift, + + DPRImS = 19 << FormShift, + DPRRegS = 20 << FormShift, + DPRSoRegS = 21 << FormShift, + + // Load and Store + LdFrm = 22 << FormShift, + StFrm = 23 << FormShift, + + // Miscellaneous arithmetic instructions + ArithMisc = 24 << FormShift, + + // Thumb format + ThumbFrm = 25 << FormShift, + + // VFP format + VPFFrm = 26 << FormShift, + + // Field shifts - such shifts are used to set field while generating + // machine instructions. + RegRsShift = 8, + RegRdShift = 12, + RegRnShift = 16, + L_BitShift = 20, + S_BitShift = 20, + U_BitShift = 23, + IndexShift = 24, + I_BitShift = 25 }; } From dalej at apple.com Thu Aug 30 23:03:46 2007 From: dalej at apple.com (Dale Johannesen) Date: Fri, 31 Aug 2007 04:03:46 -0000 Subject: [llvm-commits] [llvm] r41632 - in /llvm/trunk: include/llvm/ADT/APFloat.h include/llvm/ADT/StringExtras.h lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp lib/Support/APFloat.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/Alpha/AlphaISelDAGToDAG.cpp lib/Target/IA64/IA64ISelDAGToDAG.cpp lib/Target/PowerPC/PPCISelLowering.cpp lib/Target/X86/X86ISelDAGToDAG.cpp lib/Target/X86/X86ISelLowering.cpp Message-ID: <200708310403.l7V43lqi001325@zion.cs.uiuc.edu> Author: johannes Date: Thu Aug 30 23:03:46 2007 New Revision: 41632 URL: http://llvm.org/viewvc/llvm-project?rev=41632&view=rev Log: Enhance APFloat to retain bits of NaNs (fixes oggenc). Use APFloat interfaces for more references, mostly of ConstantFPSDNode. Modified: llvm/trunk/include/llvm/ADT/APFloat.h llvm/trunk/include/llvm/ADT/StringExtras.h llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp llvm/trunk/lib/Support/APFloat.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/include/llvm/ADT/APFloat.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APFloat.h?rev=41632&r1=41631&r2=41632&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/APFloat.h (original) +++ llvm/trunk/include/llvm/ADT/APFloat.h Thu Aug 30 23:03:46 2007 @@ -64,8 +64,11 @@ so that the smallest denormal has just the least significant bit of the significand set. The sign of zeroes and infinities is significant; the exponent and significand of such numbers is - indeterminate and meaningless. For QNaNs the sign bit, as well as - the exponent and significand are indeterminate and meaningless. + not stored, but has a known implicit (deterministic) value: + 0 for the significands, 0 for zero exponent, all 1 bits for + infinity exponent. For NaNs the sign and significand are + deterministic, although not really meaningful; the exponent is + implicitly all 1 bits. TODO ==== @@ -155,7 +158,7 @@ /* Category of internally-represented number. */ enum fltCategory { fcInfinity, - fcQNaN, + fcNaN, fcNormal, fcZero }; @@ -192,7 +195,7 @@ whatever it is you really mean. */ // bool operator==(const APFloat &) const; // DO NOT IMPLEMENT - /* IEEE comparison with another floating point number (QNaNs + /* IEEE comparison with another floating point number (NaNs compare unordered, 0==-0). */ cmpResult compare(const APFloat &) const; @@ -205,6 +208,8 @@ bool isZero() const { return category == fcZero; } bool isNonZero() const { return category != fcZero; } bool isNegative() const { return sign; } + bool isPosZero() const { return isZero() && !isNegative(); } + bool isNegZero() const { return isZero() && isNegative(); } APFloat& operator=(const APFloat &); Modified: llvm/trunk/include/llvm/ADT/StringExtras.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/StringExtras.h?rev=41632&r1=41631&r2=41632&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/StringExtras.h (original) +++ llvm/trunk/include/llvm/ADT/StringExtras.h Thu Aug 30 23:03:46 2007 @@ -15,6 +15,7 @@ #define LLVM_ADT_STRINGEXTRAS_H #include "llvm/Support/DataTypes.h" +#include "llvm/ADT/APFloat.h" #include #include #include @@ -92,6 +93,14 @@ return B; } +static inline std::string ftostr(APFloat V) { + if (&V.getSemantics() == &APFloat::IEEEsingle) + return ftostr(V.convertToDouble()); + else if (&V.getSemantics() == &APFloat::IEEEdouble) + return ftostr((double)V.convertToFloat()); + return 0; // error +} + static inline std::string LowercaseString(const std::string &S) { std::string result(S); for (unsigned i = 0; i < S.length(); ++i) Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=41632&r1=41631&r2=41632&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Aug 30 23:03:46 2007 @@ -109,11 +109,13 @@ } else if (isa(NotZero)) { MVT::ValueType VT = NotZero.getValueType(); if (VT== MVT::f64) { - if (DoubleToBits(cast(NotZero)->getValue()) != + if (DoubleToBits(cast(NotZero)-> + getValueAPF().convertToDouble()) != (uint64_t)-1) return false; } else { - if (FloatToBits(cast(NotZero)->getValue()) != + if (FloatToBits(cast(NotZero)-> + getValueAPF().convertToFloat()) != (uint32_t)-1) return false; } @@ -155,7 +157,7 @@ if (!cast(Zero)->isNullValue()) return false; } else if (isa(Zero)) { - if (!cast(Zero)->isExactlyValue(0.0)) + if (!cast(Zero)->getValueAPF().isPosZero()) return false; } else return false; @@ -320,9 +322,16 @@ ID.AddInteger(cast(N)->getValue()); break; case ISD::TargetConstantFP: - case ISD::ConstantFP: - ID.AddDouble(cast(N)->getValue()); + case ISD::ConstantFP: { + APFloat V = cast(N)->getValueAPF(); + if (&V.getSemantics() == &APFloat::IEEEdouble) + ID.AddDouble(V.convertToDouble()); + else if (&V.getSemantics() == &APFloat::IEEEsingle) + ID.AddDouble((double)V.convertToFloat()); + else + assert(0); break; + } case ISD::TargetGlobalAddress: case ISD::GlobalAddress: case ISD::TargetGlobalTLSAddress: @@ -966,16 +975,36 @@ } if (ConstantFPSDNode *N1C = dyn_cast(N1.Val)) if (ConstantFPSDNode *N2C = dyn_cast(N2.Val)) { - double C1 = N1C->getValue(), C2 = N2C->getValue(); - + + APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); switch (Cond) { - default: break; // FIXME: Implement the rest of these! - case ISD::SETEQ: return getConstant(C1 == C2, VT); - case ISD::SETNE: return getConstant(C1 != C2, VT); - case ISD::SETLT: return getConstant(C1 < C2, VT); - case ISD::SETGT: return getConstant(C1 > C2, VT); - case ISD::SETLE: return getConstant(C1 <= C2, VT); - case ISD::SETGE: return getConstant(C1 >= C2, VT); + default: break; + case ISD::SETOEQ: + case ISD::SETEQ: return getConstant(R==APFloat::cmpEqual, VT); + case ISD::SETONE: + case ISD::SETNE: return getConstant(R==APFloat::cmpGreaterThan || + R==APFloat::cmpLessThan, VT); + case ISD::SETOLT: + case ISD::SETLT: return getConstant(R==APFloat::cmpLessThan, VT); + case ISD::SETOGT: + case ISD::SETGT: return getConstant(R==APFloat::cmpGreaterThan, VT); + case ISD::SETOLE: + case ISD::SETLE: return getConstant(R==APFloat::cmpLessThan || + R==APFloat::cmpEqual, VT); + case ISD::SETOGE: + case ISD::SETGE: return getConstant(R==APFloat::cmpGreaterThan || + R==APFloat::cmpEqual, VT); + case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); + case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); + case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || + R==APFloat::cmpEqual, VT); + case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); + case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || + R==APFloat::cmpLessThan, VT); + case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || + R==APFloat::cmpUnordered, VT); + case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); + case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); } } else { // Ensure that the constant occurs on the RHS. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp?rev=41632&r1=41631&r2=41632&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp Thu Aug 30 23:03:46 2007 @@ -95,7 +95,7 @@ if (const ConstantSDNode *CSDN = dyn_cast(Node)) { Op += ": " + utostr(CSDN->getValue()); } else if (const ConstantFPSDNode *CSDN = dyn_cast(Node)) { - Op += ": " + ftostr(CSDN->getValue()); + Op += ": " + ftostr(CSDN->getValueAPF()); } else if (const GlobalAddressSDNode *GADN = dyn_cast(Node)) { int offset = GADN->getOffset(); @@ -115,7 +115,7 @@ Op += "<" + SS.str() + ">"; } else { if (ConstantFP *CFP = dyn_cast(CP->getConstVal())) - Op += "<" + ftostr(CFP->getValue()) + ">"; + Op += "<" + ftostr(CFP->getValueAPF()) + ">"; else if (ConstantInt *CI = dyn_cast(CP->getConstVal())) Op += "<" + utostr(CI->getZExtValue()) + ">"; else { Modified: llvm/trunk/lib/Support/APFloat.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APFloat.cpp?rev=41632&r1=41631&r2=41632&view=diff ============================================================================== --- llvm/trunk/lib/Support/APFloat.cpp (original) +++ llvm/trunk/lib/Support/APFloat.cpp Thu Aug 30 23:03:46 2007 @@ -247,14 +247,14 @@ sign = rhs.sign; category = rhs.category; exponent = rhs.exponent; - if(category == fcNormal) + if(category == fcNormal || category == fcNaN) copySignificand(rhs); } void APFloat::copySignificand(const APFloat &rhs) { - assert(category == fcNormal); + assert(category == fcNormal || category == fcNaN); assert(rhs.partCount() >= partCount()); APInt::tcAssign(significandParts(), rhs.significandParts(), @@ -280,15 +280,14 @@ if (this == &rhs) return true; if (semantics != rhs.semantics || - category != rhs.category) + category != rhs.category || + sign != rhs.sign) return false; - if (category==fcQNaN) + if (category==fcZero || category==fcInfinity) return true; - else if (category==fcZero || category==fcInfinity) - return sign==rhs.sign; + else if (category==fcNormal && exponent!=rhs.exponent) + return false; else { - if (sign!=rhs.sign || exponent!=rhs.exponent) - return false; int i= partCount(); const integerPart* p=significandParts(); const integerPart* q=rhs.significandParts(); @@ -358,7 +357,7 @@ integerPart * APFloat::significandParts() { - assert(category == fcNormal); + assert(category == fcNormal || category == fcNaN); if(partCount() > 1) return significand.parts; @@ -701,7 +700,7 @@ APFloat::roundAwayFromZero(roundingMode rounding_mode, lostFraction lost_fraction) { - /* QNaNs and infinities should not have lost fractions. */ + /* NaNs and infinities should not have lost fractions. */ assert(category == fcNormal || category == fcZero); /* Our caller has already handled this case. */ @@ -851,19 +850,20 @@ default: assert(0); - case convolve(fcQNaN, fcZero): - case convolve(fcQNaN, fcNormal): - case convolve(fcQNaN, fcInfinity): - case convolve(fcQNaN, fcQNaN): + case convolve(fcNaN, fcZero): + case convolve(fcNaN, fcNormal): + case convolve(fcNaN, fcInfinity): + case convolve(fcNaN, fcNaN): case convolve(fcNormal, fcZero): case convolve(fcInfinity, fcNormal): case convolve(fcInfinity, fcZero): return opOK; - case convolve(fcZero, fcQNaN): - case convolve(fcNormal, fcQNaN): - case convolve(fcInfinity, fcQNaN): - category = fcQNaN; + case convolve(fcZero, fcNaN): + case convolve(fcNormal, fcNaN): + case convolve(fcInfinity, fcNaN): + category = fcNaN; + copySignificand(rhs); return opOK; case convolve(fcNormal, fcInfinity): @@ -885,7 +885,9 @@ /* Differently signed infinities can only be validly subtracted. */ if(sign ^ rhs.sign != subtract) { - category = fcQNaN; + category = fcNaN; + // Arbitrary but deterministic value for significand + APInt::tcSet(significandParts(), ~0U, partCount()); return opInvalidOp; } @@ -974,14 +976,17 @@ default: assert(0); - case convolve(fcQNaN, fcZero): - case convolve(fcQNaN, fcNormal): - case convolve(fcQNaN, fcInfinity): - case convolve(fcQNaN, fcQNaN): - case convolve(fcZero, fcQNaN): - case convolve(fcNormal, fcQNaN): - case convolve(fcInfinity, fcQNaN): - category = fcQNaN; + case convolve(fcNaN, fcZero): + case convolve(fcNaN, fcNormal): + case convolve(fcNaN, fcInfinity): + case convolve(fcNaN, fcNaN): + return opOK; + + case convolve(fcZero, fcNaN): + case convolve(fcNormal, fcNaN): + case convolve(fcInfinity, fcNaN): + category = fcNaN; + copySignificand(rhs); return opOK; case convolve(fcNormal, fcInfinity): @@ -998,7 +1003,9 @@ case convolve(fcZero, fcInfinity): case convolve(fcInfinity, fcZero): - category = fcQNaN; + category = fcNaN; + // Arbitrary but deterministic value for significand + APInt::tcSet(significandParts(), ~0U, partCount()); return opInvalidOp; case convolve(fcNormal, fcNormal): @@ -1013,20 +1020,21 @@ default: assert(0); - case convolve(fcQNaN, fcZero): - case convolve(fcQNaN, fcNormal): - case convolve(fcQNaN, fcInfinity): - case convolve(fcQNaN, fcQNaN): + case convolve(fcNaN, fcZero): + case convolve(fcNaN, fcNormal): + case convolve(fcNaN, fcInfinity): + case convolve(fcNaN, fcNaN): case convolve(fcInfinity, fcZero): case convolve(fcInfinity, fcNormal): case convolve(fcZero, fcInfinity): case convolve(fcZero, fcNormal): return opOK; - case convolve(fcZero, fcQNaN): - case convolve(fcNormal, fcQNaN): - case convolve(fcInfinity, fcQNaN): - category = fcQNaN; + case convolve(fcZero, fcNaN): + case convolve(fcNormal, fcNaN): + case convolve(fcInfinity, fcNaN): + category = fcNaN; + copySignificand(rhs); return opOK; case convolve(fcNormal, fcInfinity): @@ -1039,7 +1047,9 @@ case convolve(fcInfinity, fcInfinity): case convolve(fcZero, fcZero): - category = fcQNaN; + category = fcNaN; + // Arbitrary but deterministic value for significand + APInt::tcSet(significandParts(), ~0U, partCount()); return opInvalidOp; case convolve(fcNormal, fcNormal): @@ -1172,7 +1182,7 @@ /* FS can only be opOK or opInvalidOp. There is no more work to do in the latter case. The IEEE-754R standard says it is implementation-defined in this case whether, if ADDEND is a - quiet QNaN, we raise invalid op; this implementation does so. + quiet NaN, we raise invalid op; this implementation does so. If we need to do the addition we can do so with normal precision. */ @@ -1195,13 +1205,13 @@ default: assert(0); - case convolve(fcQNaN, fcZero): - case convolve(fcQNaN, fcNormal): - case convolve(fcQNaN, fcInfinity): - case convolve(fcQNaN, fcQNaN): - case convolve(fcZero, fcQNaN): - case convolve(fcNormal, fcQNaN): - case convolve(fcInfinity, fcQNaN): + case convolve(fcNaN, fcZero): + case convolve(fcNaN, fcNormal): + case convolve(fcNaN, fcInfinity): + case convolve(fcNaN, fcNaN): + case convolve(fcZero, fcNaN): + case convolve(fcNormal, fcNaN): + case convolve(fcInfinity, fcNaN): return cmpUnordered; case convolve(fcInfinity, fcNormal): @@ -1309,7 +1319,7 @@ int bits; /* Handle the three special cases first. */ - if(category == fcInfinity || category == fcQNaN) + if(category == fcInfinity || category == fcNaN) return opInvalidOp; partsCount = partCountForBits(width); @@ -1517,7 +1527,7 @@ APFloat::getHashValue() const { if (category==fcZero) return sign<<8 | semantics->precision ; else if (category==fcInfinity) return sign<<9 | semantics->precision; - else if (category==fcQNaN) return 1<<10 | semantics->precision; + else if (category==fcNaN) return 1<<10 | semantics->precision; else { uint32_t hash = sign<<11 | semantics->precision | exponent<<12; const integerPart* p = significandParts(); @@ -1538,28 +1548,25 @@ assert(semantics == (const llvm::fltSemantics* const)&IEEEdouble); assert (partCount()==1); - uint64_t myexponent, mysign, mysignificand; + uint64_t myexponent, mysignificand; if (category==fcNormal) { - mysign = sign; mysignificand = *significandParts(); myexponent = exponent+1023; //bias } else if (category==fcZero) { - mysign = sign; myexponent = 0; mysignificand = 0; } else if (category==fcInfinity) { - mysign = sign; myexponent = 0x7ff; mysignificand = 0; - } else if (category==fcQNaN) { - mysign = 0; + } else if (category==fcNaN) { myexponent = 0x7ff; - mysignificand = 0xfffffffffffffLL; + mysignificand = *significandParts(); } else assert(0); - return BitsToDouble(((mysign & 1) << 63) | ((myexponent & 0x7ff) << 52) | + return BitsToDouble((((uint64_t)sign & 1) << 63) | + ((myexponent & 0x7ff) << 52) | (mysignificand & 0xfffffffffffffLL)); } @@ -1568,82 +1575,74 @@ assert(semantics == (const llvm::fltSemantics* const)&IEEEsingle); assert (partCount()==1); - uint32_t mysign, myexponent, mysignificand; + uint32_t myexponent, mysignificand; if (category==fcNormal) { - mysign = sign; myexponent = exponent+127; //bias mysignificand = *significandParts(); } else if (category==fcZero) { - mysign = sign; myexponent = 0; mysignificand = 0; } else if (category==fcInfinity) { - mysign = sign; myexponent = 0xff; mysignificand = 0; - } else if (category==fcQNaN) { - mysign = sign; + } else if (category==fcNaN) { myexponent = 0x7ff; - mysignificand = 0x7fffff; + mysignificand = *significandParts(); } else assert(0); - return BitsToFloat(((mysign&1) << 31) | ((myexponent&0xff) << 23) | + return BitsToFloat(((sign&1) << 31) | ((myexponent&0xff) << 23) | (mysignificand & 0x7fffff)); } APFloat::APFloat(double d) { uint64_t i = DoubleToBits(d); - uint64_t mysign = i >> 63; uint64_t myexponent = (i >> 52) & 0x7ff; uint64_t mysignificand = i & 0xfffffffffffffLL; initialize(&APFloat::IEEEdouble); assert(partCount()==1); + sign = i>>63; if (myexponent==0 && mysignificand==0) { // exponent, significand meaningless category = fcZero; - sign = mysign; } else if (myexponent==0x7ff && mysignificand==0) { // exponent, significand meaningless category = fcInfinity; - sign = mysign; - } else if (myexponent==0x7ff && (mysignificand & 0x8000000000000LL)) { - // sign, exponent, significand meaningless - category = fcQNaN; + } else if (myexponent==0x7ff && mysignificand!=0) { + // exponent meaningless + category = fcNaN; + *significandParts() = mysignificand; } else { - sign = mysign; category = fcNormal; exponent = myexponent - 1023; - *significandParts() = mysignificand | 0x10000000000000LL; - } + *significandParts() = mysignificand | 0x10000000000000LL; + } } APFloat::APFloat(float f) { uint32_t i = FloatToBits(f); - uint32_t mysign = i >> 31; uint32_t myexponent = (i >> 23) & 0xff; uint32_t mysignificand = i & 0x7fffff; initialize(&APFloat::IEEEsingle); assert(partCount()==1); + sign = i >> 31; if (myexponent==0 && mysignificand==0) { // exponent, significand meaningless category = fcZero; - sign = mysign; } else if (myexponent==0xff && mysignificand==0) { // exponent, significand meaningless category = fcInfinity; - sign = mysign; } else if (myexponent==0xff && (mysignificand & 0x400000)) { // sign, exponent, significand meaningless - category = fcQNaN; + category = fcNaN; + *significandParts() = mysignificand; } else { category = fcNormal; - sign = mysign; exponent = myexponent - 127; //bias *significandParts() = mysignificand | 0x800000; // integer bit } Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=41632&r1=41631&r2=41632&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Thu Aug 30 23:03:46 2007 @@ -1033,14 +1033,14 @@ /// isFloatingPointZero - Return true if this is +0.0. static bool isFloatingPointZero(SDOperand Op) { if (ConstantFPSDNode *CFP = dyn_cast(Op)) - return CFP->isExactlyValue(0.0); + return CFP->getValueAPF().isPosZero(); else if (ISD::isEXTLoad(Op.Val) || ISD::isNON_EXTLoad(Op.Val)) { // Maybe this has already been legalized into the constant pool? if (Op.getOperand(1).getOpcode() == ARMISD::Wrapper) { SDOperand WrapperOp = Op.getOperand(1).getOperand(0); if (ConstantPoolSDNode *CP = dyn_cast(WrapperOp)) if (ConstantFP *CFP = dyn_cast(CP->getConstVal())) - return CFP->isExactlyValue(0.0); + return CFP->getValueAPF().isPosZero(); } } return false; Modified: llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp?rev=41632&r1=41631&r2=41632&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp Thu Aug 30 23:03:46 2007 @@ -131,15 +131,15 @@ static bool isFPZ(SDOperand N) { ConstantFPSDNode *CN = dyn_cast(N); - return (CN && (CN->isExactlyValue(+0.0) || CN->isExactlyValue(-0.0))); + return (CN && (CN->getValueAPF().isZero())); } static bool isFPZn(SDOperand N) { ConstantFPSDNode *CN = dyn_cast(N); - return (CN && CN->isExactlyValue(-0.0)); + return (CN && CN->getValueAPF().isNegZero()); } static bool isFPZp(SDOperand N) { ConstantFPSDNode *CN = dyn_cast(N); - return (CN && CN->isExactlyValue(+0.0)); + return (CN && CN->getValueAPF().isPosZero()); } public: @@ -334,11 +334,11 @@ ConstantFPSDNode *CN = cast(N); bool isDouble = N->getValueType(0) == MVT::f64; MVT::ValueType T = isDouble ? MVT::f64 : MVT::f32; - if (CN->isExactlyValue(+0.0)) { + if (CN->getValueAPF().isPosZero()) { return CurDAG->SelectNodeTo(N, isDouble ? Alpha::CPYST : Alpha::CPYSS, T, CurDAG->getRegister(Alpha::F31, T), CurDAG->getRegister(Alpha::F31, T)); - } else if ( CN->isExactlyValue(-0.0)) { + } else if (CN->getValueAPF().isNegZero()) { return CurDAG->SelectNodeTo(N, isDouble ? Alpha::CPYSNT : Alpha::CPYSNS, T, CurDAG->getRegister(Alpha::F31, T), CurDAG->getRegister(Alpha::F31, T)); Modified: llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp?rev=41632&r1=41631&r2=41632&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp Thu Aug 30 23:03:46 2007 @@ -404,9 +404,9 @@ SDOperand Chain = CurDAG->getEntryNode(); // this is a constant, so.. SDOperand V; - if (cast(N)->isExactlyValue(+0.0)) { + if (cast(N)->getValueAPF().isPosZero()) { V = CurDAG->getCopyFromReg(Chain, IA64::F0, MVT::f64); - } else if (cast(N)->isExactlyValue(+1.0)) { + } else if (cast(N)->isExactlyValue(APFloat(+1.0))) { V = CurDAG->getCopyFromReg(Chain, IA64::F1, MVT::f64); } else assert(0 && "Unexpected FP constant!"); Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=41632&r1=41631&r2=41632&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Thu Aug 30 23:03:46 2007 @@ -362,12 +362,12 @@ /// isFloatingPointZero - Return true if this is 0.0 or -0.0. static bool isFloatingPointZero(SDOperand Op) { if (ConstantFPSDNode *CFP = dyn_cast(Op)) - return CFP->isExactlyValue(-0.0) || CFP->isExactlyValue(0.0); + return CFP->getValueAPF().isZero(); else if (ISD::isEXTLoad(Op.Val) || ISD::isNON_EXTLoad(Op.Val)) { // Maybe this has already been legalized into the constant pool? if (ConstantPoolSDNode *CP = dyn_cast(Op.getOperand(1))) if (ConstantFP *CFP = dyn_cast(CP->getConstVal())) - return CFP->isExactlyValue(-0.0) || CFP->isExactlyValue(0.0); + return CFP->getValueAPF().isZero(); } return false; } @@ -530,7 +530,7 @@ assert(N->getOpcode() == ISD::BUILD_VECTOR); if (PPC::isSplatShuffleMask(N, N->getNumOperands())) if (ConstantFPSDNode *CFP = dyn_cast(N)) - return CFP->isExactlyValue(-0.0); + return CFP->getValueAPF().isNegZero(); return false; } @@ -622,7 +622,7 @@ ValSizeInBytes = MVT::getSizeInBits(CN->getValueType(0))/8; } else if (ConstantFPSDNode *CN = dyn_cast(OpVal)) { assert(CN->getValueType(0) == MVT::f32 && "Only one legal FP vector type!"); - Value = FloatToBits(CN->getValue()); + Value = FloatToBits(CN->getValueAPF().convertToFloat()); ValSizeInBytes = 4; } @@ -2194,7 +2194,7 @@ } else if (ConstantFPSDNode *CN = dyn_cast(OpVal)) { assert(CN->getValueType(0) == MVT::f32 && "Only one legal FP vector type!"); - EltBits = FloatToBits(CN->getValue()); + EltBits = FloatToBits(CN->getValueAPF().convertToFloat()); } else { // Nonconstant element. return true; Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=41632&r1=41631&r2=41632&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Thu Aug 30 23:03:46 2007 @@ -817,7 +817,7 @@ return ((isa(Elt) && cast(Elt)->getValue() == 0) || (isa(Elt) && - cast(Elt)->isExactlyValue(0.0))); + cast(Elt)->getValueAPF().isPosZero())); } Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=41632&r1=41631&r2=41632&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Aug 30 23:03:46 2007 @@ -2303,7 +2303,7 @@ return ((isa(Elt) && cast(Elt)->getValue() == 0) || (isa(Elt) && - cast(Elt)->isExactlyValue(0.0))); + cast(Elt)->getValueAPF().isPosZero())); } /// isZeroShuffle - Returns true if N is a VECTOR_SHUFFLE that can be resolved From dalej at apple.com Thu Aug 30 23:06:57 2007 From: dalej at apple.com (Dale Johannesen) Date: Thu, 30 Aug 2007 21:06:57 -0700 Subject: [llvm-commits] [llvm] r41632 - in /llvm/trunk: include/llvm/ADT/APFloat.h include/llvm/ADT/StringExtras.h lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp lib/Support/APFloat.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/Alpha/AlphaISelDAGToDAG.cpp lib/Target/IA64/IA64ISelDAGToDAG.cpp lib/Target/PowerPC/PPCISelLowering.cpp lib/Target/X86/X86ISelDAGToDAG.cpp lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <200708310403.l7V43lqi001325@zion.cs.uiuc.edu> References: <200708310403.l7V43lqi001325@zion.cs.uiuc.edu> Message-ID: <2123F14E-92A8-4B46-8730-22821FBB9DD7@apple.com> On Aug 30, 2007, at 9:03 PM, Dale Johannesen wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=41632&view=rev This patch breaks test/CodeGen/X86/2007-07-25-EpilogueBug.ll. The patch is correct, the testcase needs adjustment; Evan and I are discussing how. From clattner at apple.com Thu Aug 30 23:08:47 2007 From: clattner at apple.com (Chris Lattner) Date: Thu, 30 Aug 2007 21:08:47 -0700 Subject: [llvm-commits] [llvm] r41632 - in /llvm/trunk: include/llvm/ADT/APFloat.h include/llvm/ADT/StringExtras.h lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp lib/Support/APFloat.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/Alpha/AlphaISelDAGToDAG.cpp lib/Target/IA64/IA64ISelDAGToDAG.cpp lib/Target/PowerPC/PPCISelLowering.cpp lib/Target/X86/X86ISelDAGToDAG.cpp lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <2123F14E-92A8-4B46-8730-22821FBB9DD7@apple.com> References: <200708310403.l7V43lqi001325@zion.cs.uiuc.edu> <2123F14E-92A8-4B46-8730-22821FBB9DD7@apple.com> Message-ID: On Aug 30, 2007, at 9:06 PM, Dale Johannesen wrote: > > On Aug 30, 2007, at 9:03 PM, Dale Johannesen wrote: > >> URL: http://llvm.org/viewvc/llvm-project?rev=41632&view=rev > > This patch breaks test/CodeGen/X86/2007-07-25-EpilogueBug.ll. The > patch is correct, the testcase needs adjustment; Evan and I are > discussing how. Thanks for the head's up Dale, -Chris From evan.cheng at apple.com Fri Aug 31 01:29:33 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 31 Aug 2007 06:29:33 -0000 Subject: [llvm-commits] [llvm] r41639 - /llvm/trunk/test/CodeGen/X86/2007-07-25-EpilogueBug.ll Message-ID: <200708310629.l7V6TXbX005461@zion.cs.uiuc.edu> Author: evancheng Date: Fri Aug 31 01:29:32 2007 New Revision: 41639 URL: http://llvm.org/viewvc/llvm-project?rev=41639&view=rev Log: Update test case to reflect Dale's change. Modified: llvm/trunk/test/CodeGen/X86/2007-07-25-EpilogueBug.ll Modified: llvm/trunk/test/CodeGen/X86/2007-07-25-EpilogueBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-07-25-EpilogueBug.ll?rev=41639&r1=41638&r2=41639&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-07-25-EpilogueBug.ll (original) +++ llvm/trunk/test/CodeGen/X86/2007-07-25-EpilogueBug.ll Fri Aug 31 01:29:32 2007 @@ -42,7 +42,9 @@ ret i8 0 cond_false391: ; preds = %cond_next229 - %tmp400 = fcmp une float 0.000000e+00, 0.000000e+00 ; [#uses=1] + %tmp1 = getelementptr %struct.c34006f__TsB* %y, i32 0, i32 3, i32 0, i32 0 + %tmp2 = load float* %tmp1 + %tmp400 = fcmp une float %tmp2, 0.000000e+00 ; [#uses=1] %not.tmp400 = xor i1 %tmp400, true ; [#uses=1] %retval = zext i1 %not.tmp400 to i8 ; [#uses=1] ret i8 %retval From evan.cheng at apple.com Fri Aug 31 01:31:25 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 30 Aug 2007 23:31:25 -0700 Subject: [llvm-commits] [llvm] r41632 - in /llvm/trunk: include/llvm/ADT/APFloat.h include/llvm/ADT/StringExtras.h lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp lib/Support/APFloat.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/Alpha/AlphaISelDAGToDAG.cpp lib/Target/IA64/IA64ISelDAGToDAG.cpp lib/Target/PowerPC/PPCISelLowering.cpp lib/Target/X86/X86ISelDAGToDAG.cpp lib/Target/X86/X86ISelLowering.cpp In-Reply-To: References: <200708310403.l7V43lqi001325@zion.cs.uiuc.edu> <2123F14E-92A8-4B46-8730-22821FBB9DD7@apple.com> Message-ID: <78D62961-DB3B-4148-AB18-33F7D260470D@apple.com> Test case is fixed. Evan On Aug 30, 2007, at 9:08 PM, Chris Lattner wrote: > > On Aug 30, 2007, at 9:06 PM, Dale Johannesen wrote: > >> >> On Aug 30, 2007, at 9:03 PM, Dale Johannesen wrote: >> >>> URL: http://llvm.org/viewvc/llvm-project?rev=41632&view=rev >> >> This patch breaks test/CodeGen/X86/2007-07-25-EpilogueBug.ll. The >> patch is correct, the testcase needs adjustment; Evan and I are >> discussing how. > > Thanks for the head's up Dale, > > -Chris > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Fri Aug 31 03:04:17 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 31 Aug 2007 08:04:17 -0000 Subject: [llvm-commits] [llvm] r41640 - /llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Message-ID: <200708310804.l7V84Hjq014443@zion.cs.uiuc.edu> Author: evancheng Date: Fri Aug 31 03:04:17 2007 New Revision: 41640 URL: http://llvm.org/viewvc/llvm-project?rev=41640&view=rev Log: Use std::map instead of a (potentially very sparse) array to track val# defined by copy from the other live range. Minor compile time win when number of val# is large. Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=41640&r1=41639&r2=41640&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Fri Aug 31 03:04:17 2007 @@ -412,8 +412,8 @@ /// static unsigned ComputeUltimateVN(VNInfo *VNI, SmallVector &NewVNInfo, - SmallVector &ThisFromOther, - SmallVector &OtherFromThis, + std::map &ThisFromOther, + std::map &OtherFromThis, SmallVector &ThisValNoAssignments, SmallVector &OtherValNoAssignments) { unsigned VN = VNI->id; @@ -425,11 +425,12 @@ // If this val is not a copy from the other val, then it must be a new value // number in the destination. - VNInfo *OtherValNo = ThisFromOther[VN]; - if (!OtherValNo) { + std::map::iterator I = ThisFromOther.find(VNI); + if (I == ThisFromOther.end()) { NewVNInfo.push_back(VNI); return ThisValNoAssignments[VN] = NewVNInfo.size()-1; } + VNInfo *OtherValNo = I->second; // Otherwise, this *is* a copy from the RHS. If the other side has already // been computed, return it. @@ -589,8 +590,8 @@ // coalesced. SmallVector LHSValNoAssignments; SmallVector RHSValNoAssignments; - SmallVector LHSValsDefinedFromRHS; - SmallVector RHSValsDefinedFromLHS; + std::map LHSValsDefinedFromRHS; + std::map RHSValsDefinedFromLHS; SmallVector NewVNInfo; // If a live interval is a physical register, conservatively check if any @@ -614,9 +615,6 @@ } } - LHSValsDefinedFromRHS.resize(LHS.getNumValNums(), NULL); - RHSValsDefinedFromLHS.resize(RHS.getNumValNums(), NULL); - // Compute ultimate value numbers for the LHS and RHS values. if (RHS.containsOneValue()) { // Copies from a liveinterval with a single value are simple to handle and @@ -627,7 +625,8 @@ int RHSVal0DefinedFromLHS = -1; int RHSValID = -1; VNInfo *RHSValNoInfo = NULL; - unsigned RHSSrcReg = RHS.getFirstValNumInfo()->reg; + VNInfo *RHSValNoInfo0 = RHS.getFirstValNumInfo(); + unsigned RHSSrcReg = RHSValNoInfo0->reg; if ((RHSSrcReg == 0 || rep(RHSSrcReg) != LHS.reg)) { // If RHS is not defined as a copy from the LHS, we can use simpler and // faster checks to see if the live ranges are coalescable. This joiner @@ -635,12 +634,11 @@ if (!MRegisterInfo::isPhysicalRegister(RHS.reg)) { return SimpleJoin(LHS, RHS); } else { - RHSValNoInfo = RHS.getFirstValNumInfo(); + RHSValNoInfo = RHSValNoInfo0; } } else { // It was defined as a copy from the LHS, find out what value # it is. - const VNInfo *VNI = RHS.getFirstValNumInfo(); - RHSValNoInfo = LHS.getLiveRangeContaining(VNI->def-1)->valno; + RHSValNoInfo = LHS.getLiveRangeContaining(RHSValNoInfo0->def-1)->valno; RHSValID = RHSValNoInfo->id; RHSVal0DefinedFromLHS = RHSValID; } @@ -666,13 +664,13 @@ // value# for it. Keep the current value number, but remember it. LHSValNoAssignments[VN] = RHSValID = VN; NewVNInfo[VN] = RHSValNoInfo; - LHSValsDefinedFromRHS[VN] = VNI; + LHSValsDefinedFromRHS[VNI] = RHSValNoInfo0; } else { // Otherwise, use the specified value #. LHSValNoAssignments[VN] = RHSValID; if (VN == (unsigned)RHSValID) { // Else this val# is dead. NewVNInfo[VN] = RHSValNoInfo; - LHSValsDefinedFromRHS[VN] = VNI; + LHSValsDefinedFromRHS[VNI] = RHSValNoInfo0; } } } else { @@ -684,8 +682,8 @@ assert(RHSValID != -1 && "Didn't find value #?"); RHSValNoAssignments[0] = RHSValID; if (RHSVal0DefinedFromLHS != -1) { - const VNInfo *VNI = RHS.getFirstValNumInfo(); - RHSValsDefinedFromLHS[0] = LHS.getLiveRangeContaining(VNI->def-1)->valno; + RHSValsDefinedFromLHS[RHSValNoInfo0] = + LHS.getLiveRangeContaining(RHSValNoInfo0->def-1)->valno; } } else { // Loop over the value numbers of the LHS, seeing if any are defined from @@ -693,7 +691,6 @@ for (LiveInterval::vni_iterator i = LHS.vni_begin(), e = LHS.vni_end(); i != e; ++i) { VNInfo *VNI = *i; - unsigned VN = VNI->id; unsigned ValSrcReg = VNI->reg; if (ValSrcReg == 0) // Src not defined by a copy? continue; @@ -704,7 +701,7 @@ continue; // Figure out the value # from the RHS. - LHSValsDefinedFromRHS[VN] = RHS.getLiveRangeContaining(VNI->def-1)->valno; + LHSValsDefinedFromRHS[VNI] = RHS.getLiveRangeContaining(VNI->def-1)->valno; } // Loop over the value numbers of the RHS, seeing if any are defined from @@ -712,7 +709,6 @@ for (LiveInterval::vni_iterator i = RHS.vni_begin(), e = RHS.vni_end(); i != e; ++i) { VNInfo *VNI = *i; - unsigned VN = VNI->id; unsigned ValSrcReg = VNI->reg; if (ValSrcReg == 0) // Src not defined by a copy? continue; @@ -723,7 +719,7 @@ continue; // Figure out the value # from the LHS. - RHSValsDefinedFromLHS[VN] = LHS.getLiveRangeContaining(VNI->def-1)->valno; + RHSValsDefinedFromLHS[VNI]= LHS.getLiveRangeContaining(VNI->def-1)->valno; } LHSValNoAssignments.resize(LHS.getNumValNums(), -1); @@ -747,7 +743,7 @@ if (RHSValNoAssignments[VN] >= 0 || VNI->def == ~1U) continue; // If this value number isn't a copy from the LHS, it's a new number. - if (!RHSValsDefinedFromLHS[VN]) { + if (RHSValsDefinedFromLHS.find(VNI) == RHSValsDefinedFromLHS.end()) { NewVNInfo.push_back(VNI); RHSValNoAssignments[VN] = NewVNInfo.size()-1; continue; @@ -803,23 +799,18 @@ } // Update kill info. Some live ranges are extended due to copy coalescing. - for (LiveInterval::vni_iterator i = RHS.vni_begin(), e = RHS.vni_end(); - i != e; ++i) { - VNInfo *VNI = *i; - unsigned VN = VNI->id; - if (VN >= RHSValsDefinedFromLHS.size() || !RHSValsDefinedFromLHS[VN]) - continue; - unsigned RHSValID = RHSValNoAssignments[VN]; + for (std::map::iterator I = RHSValsDefinedFromLHS.begin(), + E = RHSValsDefinedFromLHS.end(); I != E; ++I) { + VNInfo *VNI = I->first; + unsigned RHSValID = RHSValNoAssignments[VNI->id]; LiveInterval::removeKill(*NewVNInfo[RHSValID], VNI->def); LHS.addKills(*NewVNInfo[RHSValID], VNI->kills); } - for (LiveInterval::vni_iterator i = LHS.vni_begin(), e = LHS.vni_end(); - i != e; ++i) { - VNInfo *VNI = *i; - unsigned VN = VNI->id; - if (VN >= LHSValsDefinedFromRHS.size() || !LHSValsDefinedFromRHS[VN]) - continue; - unsigned LHSValID = LHSValNoAssignments[VN]; + + for (std::map::iterator I = LHSValsDefinedFromRHS.begin(), + E = LHSValsDefinedFromRHS.end(); I != E; ++I) { + VNInfo *VNI = I->first; + unsigned LHSValID = LHSValNoAssignments[VNI->id]; LiveInterval::removeKill(*NewVNInfo[LHSValID], VNI->def); RHS.addKills(*NewVNInfo[LHSValID], VNI->kills); } From evan.cheng at apple.com Fri Aug 31 03:26:44 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 31 Aug 2007 08:26:44 -0000 Subject: [llvm-commits] [llvm] r41641 - in /llvm/trunk: include/llvm/CodeGen/LiveInterval.h lib/CodeGen/LiveInterval.cpp Message-ID: <200708310826.l7V8QiR3014926@zion.cs.uiuc.edu> Author: evancheng Date: Fri Aug 31 03:26:44 2007 New Revision: 41641 URL: http://llvm.org/viewvc/llvm-project?rev=41641&view=rev Log: Remove an unnecessary element, saving 4 bytes per LiveInterval. Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h llvm/trunk/lib/CodeGen/LiveInterval.cpp Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveInterval.h?rev=41641&r1=41640&r2=41641&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveInterval.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveInterval.h Fri Aug 31 03:26:44 2007 @@ -106,12 +106,11 @@ unsigned preference; // preferred register to allocate for this interval float weight; // weight of this interval Ranges ranges; // the ranges in which this register is live - unsigned numvals; // number of value#'s VNInfoList valnos; // value#'s public: LiveInterval(unsigned Reg, float Weight) - : reg(Reg), preference(0), weight(Weight), numvals(0) { + : reg(Reg), preference(0), weight(Weight) { } typedef Ranges::iterator iterator; @@ -151,9 +150,9 @@ return I; } - bool containsOneValue() const { return numvals == 1; } + bool containsOneValue() const { return valnos.size() == 1; } - unsigned getNumValNums() const { return numvals; } + unsigned getNumValNums() const { return valnos.size(); } /// getFirstValNumInfo - Returns pointer to the first val#. /// @@ -175,7 +174,7 @@ /// getNextValue - Create a new value number and return it. MIIdx specifies /// the instruction that defines the value number. VNInfo *getNextValue(unsigned MIIdx, unsigned SrcReg) { - VNInfo *VNI = new VNInfo(this, numvals++, MIIdx, SrcReg); + VNInfo *VNI = new VNInfo(this, valnos.size(), MIIdx, SrcReg); valnos.push_back(VNI); return VNI; } Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveInterval.cpp?rev=41641&r1=41640&r2=41641&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveInterval.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveInterval.cpp Fri Aug 31 03:26:44 2007 @@ -349,13 +349,11 @@ // Update val# info. Renumber them and make sure they all belong to this // LiveInterval now. valnos.clear(); - numvals = 0; for (unsigned i = 0, e = NewVNInfo.size(); i != e; ++i) { VNInfo *VNI = NewVNInfo[i]; VNI->parent = this; VNI->id = i; // Renumber val#. valnos.push_back(VNI); - ++numvals; } // Okay, now insert the RHS live ranges into the LHS. @@ -484,7 +482,6 @@ VNInfo *VNI = valnos.back(); valnos.pop_back(); delete VNI; - --numvals; } while (valnos.back()->def == ~1U); } else { V1->def = ~1U; From rafael.espindola at gmail.com Fri Aug 31 07:23:59 2007 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Fri, 31 Aug 2007 12:23:59 -0000 Subject: [llvm-commits] [llvm] r41642 - /llvm/trunk/lib/Target/X86/X86Subtarget.h Message-ID: <200708311223.l7VCNxKR021042@zion.cs.uiuc.edu> Author: rafael Date: Fri Aug 31 07:23:58 2007 New Revision: 41642 URL: http://llvm.org/viewvc/llvm-project?rev=41642&view=rev Log: Align i64 and f64 at 8 byte on x86-64. This is mandated table 3.1 at http://www.x86-64.org/documentation/abi.pdf Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=41642&r1=41641&r2=41642&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86Subtarget.h (original) +++ llvm/trunk/lib/Target/X86/X86Subtarget.h Fri Aug 31 07:23:58 2007 @@ -145,12 +145,18 @@ std::string getDataLayout() const { const char *p; - if (is64Bit()) - p = "e-p:64:64-f64:32:64-i64:32:64-f80:128:128"; - else if (isTargetDarwin()) - p = "e-p:32:32-f64:32:64-i64:32:64-f80:128:128"; - else - p = "e-p:32:32-f64:32:64-i64:32:64-f80:32:32"; + if (is64Bit()) { + if (isTargetDarwin()) + p = "e-p:64:64-f64:32:64-i64:32:64-f80:128:128"; + else + p = "e-p:64:64-f64:64:64-i64:64:64-f80:128:128"; + } + else { + if (isTargetDarwin()) + p = "e-p:32:32-f64:32:64-i64:32:64-f80:128:128"; + else + p = "e-p:32:32-f64:32:64-i64:32:64-f80:32:32"; + } return std::string(p); } From rafael.espindola at gmail.com Fri Aug 31 10:06:30 2007 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Fri, 31 Aug 2007 15:06:30 -0000 Subject: [llvm-commits] [llvm] r41643 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86ISelLowering.h test/CodeGen/X86/byval2.ll Message-ID: <200708311506.l7VF6UQX025131@zion.cs.uiuc.edu> Author: rafael Date: Fri Aug 31 10:06:30 2007 New Revision: 41643 URL: http://llvm.org/viewvc/llvm-project?rev=41643&view=rev Log: Initial support for calling functions with byval arguments on x86-64 Added: llvm/trunk/test/CodeGen/X86/byval2.ll Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=41643&r1=41642&r2=41643&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Aug 31 10:06:30 2007 @@ -1036,6 +1036,34 @@ &ArgValues[0], ArgValues.size()).getValue(Op.ResNo); } +SDOperand +X86TargetLowering::LowerMemOpCallTo(SDOperand Op, SelectionDAG &DAG, + const SDOperand &StackPtr, + const CCValAssign &VA, + SDOperand Chain, + SDOperand Arg) { + SDOperand PtrOff = DAG.getConstant(VA.getLocMemOffset(), getPointerTy()); + PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); + SDOperand FlagsOp = Op.getOperand(6+2*VA.getValNo()); + unsigned Flags = cast(FlagsOp)->getValue(); + if (Flags & ISD::ParamFlags::ByVal) { + unsigned Align = 1 << ((Flags & ISD::ParamFlags::ByValAlign) >> + ISD::ParamFlags::ByValAlignOffs); + + assert (Align >= 8); + unsigned Size = (Flags & ISD::ParamFlags::ByValSize) >> + ISD::ParamFlags::ByValSizeOffs; + + SDOperand AlignNode = DAG.getConstant(Align, MVT::i32); + SDOperand SizeNode = DAG.getConstant(Size, MVT::i32); + + return DAG.getNode(ISD::MEMCPY, MVT::Other, Chain, PtrOff, Arg, SizeNode, + AlignNode); + } else { + return DAG.getStore(Chain, Arg, PtrOff, NULL, 0); + } +} + SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG, unsigned CC) { SDOperand Chain = Op.getOperand(0); @@ -1375,29 +1403,9 @@ assert(VA.isMemLoc()); if (StackPtr.Val == 0) StackPtr = DAG.getRegister(getStackPtrReg(), getPointerTy()); - SDOperand PtrOff = DAG.getConstant(VA.getLocMemOffset(), getPointerTy()); - PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); - SDOperand FlagsOp = Op.getOperand(6+2*VA.getValNo()); - unsigned Flags = cast(FlagsOp)->getValue(); - if (Flags & ISD::ParamFlags::ByVal) { - unsigned Align = 1 << ((Flags & ISD::ParamFlags::ByValAlign) >> - ISD::ParamFlags::ByValAlignOffs); - unsigned Size = (Flags & ISD::ParamFlags::ByValSize) >> - ISD::ParamFlags::ByValSizeOffs; - - SDOperand AlignNode = DAG.getConstant(Align, MVT::i32); - SDOperand SizeNode = DAG.getConstant(Size, MVT::i32); - - assert(0 && "Not Implemented"); - - SDOperand Copy = DAG.getNode(ISD::MEMCPY, MVT::Other, Chain, PtrOff, - Arg, SizeNode, AlignNode); - MemOpChains.push_back(Copy); - } - else { - MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); - } + MemOpChains.push_back(LowerMemOpCallTo(Op, DAG, StackPtr, VA, Chain, + Arg)); } } Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=41643&r1=41642&r2=41643&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Fri Aug 31 10:06:30 2007 @@ -19,6 +19,7 @@ #include "X86RegisterInfo.h" #include "llvm/Target/TargetLowering.h" #include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/CodeGen/CallingConvLower.h" namespace llvm { namespace X86ISD { @@ -378,6 +379,12 @@ SDNode *LowerCallResult(SDOperand Chain, SDOperand InFlag, SDNode*TheCall, unsigned CallingConv, SelectionDAG &DAG); + + SDOperand LowerMemOpCallTo(SDOperand Op, SelectionDAG &DAG, + const SDOperand &StackPtr, + const CCValAssign &VA, SDOperand Chain, + SDOperand Arg); + // C and StdCall Calling Convention implementation. SDOperand LowerCCCArguments(SDOperand Op, SelectionDAG &DAG, bool isStdCall = false); Added: llvm/trunk/test/CodeGen/X86/byval2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/byval2.ll?rev=41643&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/byval2.ll (added) +++ llvm/trunk/test/CodeGen/X86/byval2.ll Fri Aug 31 10:06:30 2007 @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep rep.movsl | count 2 + +%struct.s = type { i64, i64, i64 } + +define void @g(i64 %a, i64 %b, i64 %c) { +entry: + %d = alloca %struct.s, align 16 + %tmp = getelementptr %struct.s* %d, i32 0, i32 0 + store i64 %a, i64* %tmp, align 16 + %tmp2 = getelementptr %struct.s* %d, i32 0, i32 1 + store i64 %b, i64* %tmp2, align 16 + %tmp4 = getelementptr %struct.s* %d, i32 0, i32 2 + store i64 %c, i64* %tmp4, align 16 + call void @f( %struct.s* %d byval) + call void @f( %struct.s* %d byval) + ret void +} + +declare void @f(%struct.s* byval) From clattner at apple.com Fri Aug 31 11:39:21 2007 From: clattner at apple.com (Chris Lattner) Date: Fri, 31 Aug 2007 09:39:21 -0700 Subject: [llvm-commits] Unbreak objc FE compilation on non-darwin In-Reply-To: <1188512868.10219.21.camel@asl.dorms.spbu.ru> References: <1188512868.10219.21.camel@asl.dorms.spbu.ru> Message-ID: <1F653CB6-72A0-4FC9-8C01-FE65D5584C24@apple.com> On Aug 30, 2007, at 3:27 PM, Anton Korobeynikov wrote: > Hello, Everyone. > Please find attached patch for unbreaking objc FE for llvm-gcc 4.2. > I've > just fixed couple of "apple local" stuff (some of them were > "generalized", some - just cleaned). In my quick read, this patch looks fine, please commit it. Devang, please take a closer look when you get back. Thanks Anton! -Chris From dalej at apple.com Fri Aug 31 12:03:33 2007 From: dalej at apple.com (Dale Johannesen) Date: Fri, 31 Aug 2007 17:03:33 -0000 Subject: [llvm-commits] [llvm] r41645 - in /llvm/trunk: include/llvm/ADT/StringExtras.h lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/Target/IA64/IA64ISelDAGToDAG.cpp Message-ID: <200708311703.l7VH3XkK029867@zion.cs.uiuc.edu> Author: johannes Date: Fri Aug 31 12:03:33 2007 New Revision: 41645 URL: http://llvm.org/viewvc/llvm-project?rev=41645&view=rev Log: Revise per review of previous patch. Modified: llvm/trunk/include/llvm/ADT/StringExtras.h llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp Modified: llvm/trunk/include/llvm/ADT/StringExtras.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/StringExtras.h?rev=41645&r1=41644&r2=41645&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/StringExtras.h (original) +++ llvm/trunk/include/llvm/ADT/StringExtras.h Fri Aug 31 12:03:33 2007 @@ -93,7 +93,7 @@ return B; } -static inline std::string ftostr(APFloat V) { +static inline std::string ftostr(const APFloat& V) { if (&V.getSemantics() == &APFloat::IEEEsingle) return ftostr(V.convertToDouble()); else if (&V.getSemantics() == &APFloat::IEEEdouble) Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=41645&r1=41644&r2=41645&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Fri Aug 31 12:03:33 2007 @@ -979,20 +979,32 @@ APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); switch (Cond) { default: break; - case ISD::SETOEQ: - case ISD::SETEQ: return getConstant(R==APFloat::cmpEqual, VT); - case ISD::SETONE: - case ISD::SETNE: return getConstant(R==APFloat::cmpGreaterThan || + case ISD::SETEQ: if (R==APFloat::cmpUnordered) + return getNode(ISD::UNDEF, VT); + // fall through + case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); + case ISD::SETNE: if (R==APFloat::cmpUnordered) + return getNode(ISD::UNDEF, VT); + // fall through + case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || R==APFloat::cmpLessThan, VT); - case ISD::SETOLT: - case ISD::SETLT: return getConstant(R==APFloat::cmpLessThan, VT); - case ISD::SETOGT: - case ISD::SETGT: return getConstant(R==APFloat::cmpGreaterThan, VT); - case ISD::SETOLE: - case ISD::SETLE: return getConstant(R==APFloat::cmpLessThan || + case ISD::SETLT: if (R==APFloat::cmpUnordered) + return getNode(ISD::UNDEF, VT); + // fall through + case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); + case ISD::SETGT: if (R==APFloat::cmpUnordered) + return getNode(ISD::UNDEF, VT); + // fall through + case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); + case ISD::SETLE: if (R==APFloat::cmpUnordered) + return getNode(ISD::UNDEF, VT); + // fall through + case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || R==APFloat::cmpEqual, VT); - case ISD::SETOGE: - case ISD::SETGE: return getConstant(R==APFloat::cmpGreaterThan || + case ISD::SETGE: if (R==APFloat::cmpUnordered) + return getNode(ISD::UNDEF, VT); + // fall through + case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || R==APFloat::cmpEqual, VT); case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); Modified: llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp?rev=41645&r1=41644&r2=41645&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp Fri Aug 31 12:03:33 2007 @@ -404,9 +404,11 @@ SDOperand Chain = CurDAG->getEntryNode(); // this is a constant, so.. SDOperand V; - if (cast(N)->getValueAPF().isPosZero()) { + ConstantFPSDNode* N2 = cast(N); + if (N2->getValueAPF().isPosZero()) { V = CurDAG->getCopyFromReg(Chain, IA64::F0, MVT::f64); - } else if (cast(N)->isExactlyValue(APFloat(+1.0))) { + } else if (N2->isExactlyValue(N2->getValueType(0) == MVT::f32 ? + APFloat(+1.0f) : APFloat(+1.0))) { V = CurDAG->getCopyFromReg(Chain, IA64::F1, MVT::f64); } else assert(0 && "Unexpected FP constant!"); From espindola at google.com Fri Aug 31 12:51:14 2007 From: espindola at google.com (Rafael Espindola) Date: Fri, 31 Aug 2007 18:51:14 +0100 Subject: [llvm-commits] representing the alignment of a function argument Message-ID: <38a0d8450708311051s56b824b9u470fbeb5b2d78217@mail.gmail.com> To handle calls to functions with byval arguments, the code generator must create copies of those arguments. To do that efficiently, it needs to know the alignment. On x86-64, all stack arguments are 8 byte aligned. I am trying to find out how to represent that on LLVM. The GCC way would be to add another method to the subtarget that given a type returns the assured stack alignment of arguments. Another way would be to make the FE handle the stack and issue llvm.memcpy with the correct alignment :-) Thoughts? Cheers, -- Rafael Avila de Espindola Google Ireland Ltd. Gordon House Barrow Street Dublin 4 Ireland Registered in Dublin, Ireland Registration Number: 368047 From rspencer at reidspencer.com Fri Aug 31 14:53:43 2007 From: rspencer at reidspencer.com (Reid Spencer) Date: Fri, 31 Aug 2007 19:53:43 -0000 Subject: [llvm-commits] [llvm] r41649 - /llvm/trunk/build-for-llvm-top.sh Message-ID: <200708311953.l7VJrhaA005108@zion.cs.uiuc.edu> Author: reid Date: Fri Aug 31 14:53:42 2007 New Revision: 41649 URL: http://llvm.org/viewvc/llvm-project?rev=41649&view=rev Log: Allow the configure options to be set according to the llvm-top options. Patch improved from one by Holger Schurig. Modified: llvm/trunk/build-for-llvm-top.sh Modified: llvm/trunk/build-for-llvm-top.sh URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/build-for-llvm-top.sh?rev=41649&r1=41648&r2=41649&view=diff ============================================================================== --- llvm/trunk/build-for-llvm-top.sh (original) +++ llvm/trunk/build-for-llvm-top.sh Fri Aug 31 14:53:42 2007 @@ -9,15 +9,48 @@ # variables. process_arguments "$@" -# See if we have previously been configured by sensing the presense +# See if we have previously been configured by sensing the presence # of the config.status scripts if test ! -x "config.status" ; then # We must configure so build a list of configure options config_options="--prefix=$PREFIX --with-llvmgccdir=$PREFIX" + if test "$OPTIMIZED" -eq 1 ; then + config_options="$config_options --enable-optimized" + else + config_options="$config_options --disable-optimized" + fi + if test "$DEBUG" -eq 1 ; then + config_options="$config_options --enable-debug" + else + config_options="$config_options --disable-debug" + fi + if test "$ASSERTIONS" -eq 1 ; then + config_options="$config_options --enable-assertions" + else + config_options="$config_options --disable-assertions" + fi + if test "$CHECKING" -eq 1 ; then + config_options="$config_options --enable-expensive-checks" + else + config_options="$config_options --disable-expensive-checks" + fi + if test "$DOXYGEN" -eq 1 ; then + config_options="$config_options --enable-doxygen" + else + config_options="$config_options --disable-doxygen" + fi + if test "$THREADS" -eq 1 ; then + config_options="$config_options --enable-threads" + else + config_options="$config_options --disable-threads" + fi config_options="$config_options $OPTIONS_DASH $OPTIONS_DASH_DASH" msg 0 Configuring $module with: msg 0 " ./configure" $config_options - ./configure $config_options || (echo "Can't configure llvm" ; exit 1) + $LLVM_TOP/llvm/configure $config_options || \ + die $? "Configuring llvm module failed" +else + msg 0 Module $module already configured, ignoring configure options. fi msg 0 Building $module with: From evan.cheng at apple.com Fri Aug 31 16:23:06 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 31 Aug 2007 21:23:06 -0000 Subject: [llvm-commits] [llvm] r41650 - /llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Message-ID: <200708312123.l7VLN6E8008091@zion.cs.uiuc.edu> Author: evancheng Date: Fri Aug 31 16:23:06 2007 New Revision: 41650 URL: http://llvm.org/viewvc/llvm-project?rev=41650&view=rev Log: std::map -> DenseMap for slight compile time benefit. Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=41650&r1=41649&r2=41650&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Fri Aug 31 16:23:06 2007 @@ -412,8 +412,8 @@ /// static unsigned ComputeUltimateVN(VNInfo *VNI, SmallVector &NewVNInfo, - std::map &ThisFromOther, - std::map &OtherFromThis, + DenseMap &ThisFromOther, + DenseMap &OtherFromThis, SmallVector &ThisValNoAssignments, SmallVector &OtherValNoAssignments) { unsigned VN = VNI->id; @@ -425,7 +425,7 @@ // If this val is not a copy from the other val, then it must be a new value // number in the destination. - std::map::iterator I = ThisFromOther.find(VNI); + DenseMap::iterator I = ThisFromOther.find(VNI); if (I == ThisFromOther.end()) { NewVNInfo.push_back(VNI); return ThisValNoAssignments[VN] = NewVNInfo.size()-1; @@ -590,8 +590,8 @@ // coalesced. SmallVector LHSValNoAssignments; SmallVector RHSValNoAssignments; - std::map LHSValsDefinedFromRHS; - std::map RHSValsDefinedFromLHS; + DenseMap LHSValsDefinedFromRHS; + DenseMap RHSValsDefinedFromLHS; SmallVector NewVNInfo; // If a live interval is a physical register, conservatively check if any @@ -799,7 +799,7 @@ } // Update kill info. Some live ranges are extended due to copy coalescing. - for (std::map::iterator I = RHSValsDefinedFromLHS.begin(), + for (DenseMap::iterator I = RHSValsDefinedFromLHS.begin(), E = RHSValsDefinedFromLHS.end(); I != E; ++I) { VNInfo *VNI = I->first; unsigned RHSValID = RHSValNoAssignments[VNI->id]; @@ -807,7 +807,7 @@ LHS.addKills(*NewVNInfo[RHSValID], VNI->kills); } - for (std::map::iterator I = LHSValsDefinedFromRHS.begin(), + for (DenseMap::iterator I = LHSValsDefinedFromRHS.begin(), E = LHSValsDefinedFromRHS.end(); I != E; ++I) { VNInfo *VNI = I->first; unsigned LHSValID = LHSValNoAssignments[VNI->id]; From djg at cray.com Fri Aug 31 16:28:37 2007 From: djg at cray.com (Dan Gohman) Date: Fri, 31 Aug 2007 16:28:37 -0500 Subject: [llvm-commits] representing the alignment of a function argument Message-ID: <20070831212837.GA4760@village.us.cray.com> > To handle calls to functions with byval arguments, the code generator > must create copies of those arguments. To do that efficiently, it > needs to know the alignment. > > On x86-64, all stack arguments are 8 byte aligned. I am trying to find > out how to represent that on LLVM. > > The GCC way would be to add another method to the subtarget that given > a type returns the assured stack alignment of arguments. > > Another way would be to make the FE handle the stack and issue > llvm.memcpy with the correct alignment :-) Where do you need the representation? Loads and stores in the LLVM IR and the target-independent load and store nodes in the SelectionDAG IR have an alignment attribute; are either of those sufficient? Dan -- Dan Gohman, Cray Inc. From dalej at apple.com Fri Aug 31 18:34:27 2007 From: dalej at apple.com (Dale Johannesen) Date: Fri, 31 Aug 2007 23:34:27 -0000 Subject: [llvm-commits] [llvm] r41664 - in /llvm/trunk: include/llvm/ADT/APFloat.h include/llvm/CodeGen/SelectionDAGNodes.h lib/CodeGen/SelectionDAG/DAGCombiner.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <200708312334.l7VNYR6u014058@zion.cs.uiuc.edu> Author: johannes Date: Fri Aug 31 18:34:27 2007 New Revision: 41664 URL: http://llvm.org/viewvc/llvm-project?rev=41664&view=rev Log: Add mod, copysign, abs operations to APFloat. Implement some constant folding in SelectionDAG and DAGCombiner using APFloat. Remove double versions of constructor and getValue from ConstantFPSDNode. Modified: llvm/trunk/include/llvm/ADT/APFloat.h llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/include/llvm/ADT/APFloat.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APFloat.h?rev=41664&r1=41663&r2=41664&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/APFloat.h (original) +++ llvm/trunk/include/llvm/ADT/APFloat.h Fri Aug 31 18:34:27 2007 @@ -95,6 +95,7 @@ // APInt contains static functions implementing bignum arithmetic. #include "llvm/ADT/APInt.h" +#include "llvm/CodeGen/ValueTypes.h" namespace llvm { @@ -177,8 +178,11 @@ opStatus subtract(const APFloat &, roundingMode); opStatus multiply(const APFloat &, roundingMode); opStatus divide(const APFloat &, roundingMode); + opStatus mod(const APFloat &, roundingMode); + void copySign(const APFloat &); opStatus fusedMultiplyAdd(const APFloat &, const APFloat &, roundingMode); - void changeSign(); + void changeSign(); // neg + void clearSign(); // abs /* Conversions. */ opStatus convert(const fltSemantics &, roundingMode); Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=41664&r1=41663&r2=41664&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Fri Aug 31 18:34:27 2007 @@ -1147,33 +1147,26 @@ class ConstantFPSDNode : public SDNode { APFloat Value; virtual void ANCHOR(); // Out-of-line virtual method to give class a home. + // Longterm plan: replace all uses of getValue with getValueAPF, remove + // getValue, rename getValueAPF to getValue. protected: friend class SelectionDAG; - ConstantFPSDNode(bool isTarget, double val, MVT::ValueType VT) - : SDNode(isTarget ? ISD::TargetConstantFP : ISD::ConstantFP, - getSDVTList(VT)), - Value(VT==MVT::f64 ? APFloat(val) : APFloat((float)val)) { - } ConstantFPSDNode(bool isTarget, const APFloat& val, MVT::ValueType VT) : SDNode(isTarget ? ISD::TargetConstantFP : ISD::ConstantFP, getSDVTList(VT)), Value(val) { } public: - // Longterm plan: replace all uses of getValue with getValueAPF, remove - // getValue, rename getValueAPF to getValue. - double getValue() const { - if ( getValueType(0)==MVT::f64) - return Value.convertToDouble(); - else - return Value.convertToFloat(); - } const APFloat& getValueAPF() const { return Value; } /// isExactlyValue - We don't rely on operator== working on double values, as /// it returns true for things that are clearly not equal, like -0.0 and 0.0. /// As such, this method can be used to do an exact bit-for-bit comparison of /// two floating point values. + + /// We leave the version with the double argument here because it's just so + /// convenient to write "2.0" and the like. Without this function we'd + /// have to duplicate its logic everywhere it's called. bool isExactlyValue(double V) const { if (getValueType(0)==MVT::f64) return isExactlyValue(APFloat(V)); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=41664&r1=41663&r2=41664&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Aug 31 18:34:27 2007 @@ -410,9 +410,11 @@ assert(Depth <= 6 && "GetNegatedExpression doesn't match isNegatibleForFree"); switch (Op.getOpcode()) { default: assert(0 && "Unknown code"); - case ISD::ConstantFP: - return DAG.getConstantFP(-cast(Op)->getValue(), - Op.getValueType()); + case ISD::ConstantFP: { + APFloat V = cast(Op)->getValueAPF(); + V.changeSign(); + return DAG.getConstantFP(V, Op.getValueType()); + } case ISD::FADD: // FIXME: determine better conditions for this xform. assert(UnsafeFPMath); @@ -432,7 +434,7 @@ // -(0-B) -> B if (ConstantFPSDNode *N0CFP = dyn_cast(Op.getOperand(0))) - if (N0CFP->getValue() == 0.0) + if (N0CFP->getValueAPF().isZero()) return Op.getOperand(1); // -(A-B) -> B-A @@ -3080,7 +3082,7 @@ if (N0CFP && N1CFP) return DAG.getNode(ISD::FSUB, VT, N0, N1); // fold (0-B) -> -B - if (UnsafeFPMath && N0CFP && N0CFP->getValue() == 0.0) { + if (UnsafeFPMath && N0CFP && N0CFP->getValueAPF().isZero()) { if (isNegatibleForFree(N1)) return GetNegatedExpression(N1, DAG); return DAG.getNode(ISD::FNEG, VT, N1); @@ -3304,7 +3306,7 @@ // fold (fp_round_inreg c1fp) -> c1fp if (N0CFP) { - SDOperand Round = DAG.getConstantFP(N0CFP->getValue(), EVT); + SDOperand Round = DAG.getConstantFP(N0CFP->getValueAPF(), EVT); return DAG.getNode(ISD::FP_EXTEND, VT, Round); } return SDOperand(); @@ -4207,7 +4209,7 @@ if ((RHSOp.getOpcode() == ISD::Constant && cast(RHSOp.Val)->isNullValue()) || (RHSOp.getOpcode() == ISD::ConstantFP && - !cast(RHSOp.Val)->getValue())) + cast(RHSOp.Val)->getValueAPF().isZero())) break; } Ops.push_back(DAG.getNode(N->getOpcode(), EltType, LHSOp, RHSOp)); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=41664&r1=41663&r2=41664&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Fri Aug 31 18:34:27 2007 @@ -727,7 +727,8 @@ if (!MVT::isVector(VT)) return SDOperand(N, 0); if (!N) { - N = new ConstantFPSDNode(isTarget, Val, EltVT); + N = new ConstantFPSDNode(isTarget, + isDouble ? APFloat(Val) : APFloat((float)Val), EltVT); CSEMap.InsertNode(N, IP); AllNodes.push_back(N); } @@ -1665,27 +1666,44 @@ } } - // Constant fold unary operations with an floating point constant operand. - if (ConstantFPSDNode *C = dyn_cast(Operand.Val)) + // Constant fold unary operations with a floating point constant operand. + if (ConstantFPSDNode *C = dyn_cast(Operand.Val)) { + APFloat V = C->getValueAPF(); // make copy switch (Opcode) { case ISD::FNEG: - return getConstantFP(-C->getValue(), VT); + V.changeSign(); + return getConstantFP(V, VT); case ISD::FABS: - return getConstantFP(fabs(C->getValue()), VT); + V.clearSign(); + return getConstantFP(V, VT); case ISD::FP_ROUND: case ISD::FP_EXTEND: - return getConstantFP(C->getValue(), VT); + // This can return overflow, underflow, or inexact; we don't care. + // FIXME need to be more flexible about rounding mode. + (void) V.convert(VT==MVT::f32 ? APFloat::IEEEsingle : + APFloat::IEEEdouble, + APFloat::rmNearestTiesToEven); + return getConstantFP(V, VT); case ISD::FP_TO_SINT: - return getConstant((int64_t)C->getValue(), VT); - case ISD::FP_TO_UINT: - return getConstant((uint64_t)C->getValue(), VT); + case ISD::FP_TO_UINT: { + integerPart x; + assert(integerPartWidth >= 64); + // FIXME need to be more flexible about rounding mode. + APFloat::opStatus s = V.convertToInteger(&x, 64U, + Opcode==ISD::FP_TO_SINT, + APFloat::rmTowardZero); + if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual + break; + return getConstant(x, VT); + } case ISD::BIT_CONVERT: if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) - return getConstant(FloatToBits(C->getValue()), VT); + return getConstant(FloatToBits(V.convertToFloat()), VT); else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) - return getConstant(DoubleToBits(C->getValue()), VT); + return getConstant(DoubleToBits(V.convertToDouble()), VT); break; } + } unsigned OpOpcode = Operand.Val->getOpcode(); switch (Opcode) { @@ -1914,29 +1932,37 @@ ConstantFPSDNode *N2CFP = dyn_cast(N2.Val); if (N1CFP) { if (N2CFP) { - double C1 = N1CFP->getValue(), C2 = N2CFP->getValue(); + APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); + APFloat::opStatus s; switch (Opcode) { - case ISD::FADD: return getConstantFP(C1 + C2, VT); - case ISD::FSUB: return getConstantFP(C1 - C2, VT); - case ISD::FMUL: return getConstantFP(C1 * C2, VT); + case ISD::FADD: + s = V1.add(V2, APFloat::rmNearestTiesToEven); + if (s!=APFloat::opInvalidOp) + return getConstantFP(V1, VT); + break; + case ISD::FSUB: + s = V1.subtract(V2, APFloat::rmNearestTiesToEven); + if (s!=APFloat::opInvalidOp) + return getConstantFP(V1, VT); + break; + case ISD::FMUL: + s = V1.multiply(V2, APFloat::rmNearestTiesToEven); + if (s!=APFloat::opInvalidOp) + return getConstantFP(V1, VT); + break; case ISD::FDIV: - if (C2) return getConstantFP(C1 / C2, VT); + s = V1.divide(V2, APFloat::rmNearestTiesToEven); + if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) + return getConstantFP(V1, VT); break; case ISD::FREM : - if (C2) return getConstantFP(fmod(C1, C2), VT); + s = V1.mod(V2, APFloat::rmNearestTiesToEven); + if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) + return getConstantFP(V1, VT); break; - case ISD::FCOPYSIGN: { - union { - double F; - uint64_t I; - } u1; - u1.F = C1; - if (int64_t(DoubleToBits(C2)) < 0) // Sign bit of RHS set? - u1.I |= 1ULL << 63; // Set the sign bit of the LHS. - else - u1.I &= (1ULL << 63)-1; // Clear the sign bit of the LHS. - return getConstantFP(u1.F, VT); - } + case ISD::FCOPYSIGN: + V1.copySign(V2); + return getConstantFP(V1, VT); default: break; } } else { // Cannonicalize constant to RHS if commutative @@ -3688,7 +3714,9 @@ if (const ConstantSDNode *CSDN = dyn_cast(this)) { cerr << "<" << CSDN->getValue() << ">"; } else if (const ConstantFPSDNode *CSDN = dyn_cast(this)) { - cerr << "<" << CSDN->getValue() << ">"; + cerr << "<" << (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle ? + CSDN->getValueAPF().convertToFloat() : + CSDN->getValueAPF().convertToDouble()) << ">"; } else if (const GlobalAddressSDNode *GADN = dyn_cast(this)) { int offset = GADN->getOffset(); From dalej at apple.com Fri Aug 31 18:35:31 2007 From: dalej at apple.com (Dale Johannesen) Date: Fri, 31 Aug 2007 23:35:31 -0000 Subject: [llvm-commits] [llvm] r41665 - /llvm/trunk/lib/Support/APFloat.cpp Message-ID: <200708312335.l7VNZVi6014117@zion.cs.uiuc.edu> Author: johannes Date: Fri Aug 31 18:35:31 2007 New Revision: 41665 URL: http://llvm.org/viewvc/llvm-project?rev=41665&view=rev Log: Oops, should be part of 41664; won't work very well without this piece. Modified: llvm/trunk/lib/Support/APFloat.cpp Modified: llvm/trunk/lib/Support/APFloat.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APFloat.cpp?rev=41665&r1=41664&r2=41665&view=diff ============================================================================== --- llvm/trunk/lib/Support/APFloat.cpp (original) +++ llvm/trunk/lib/Support/APFloat.cpp Fri Aug 31 18:35:31 2007 @@ -1065,6 +1065,20 @@ sign = !sign; } +void +APFloat::clearSign() +{ + /* So is this one. */ + sign = 0; +} + +void +APFloat::copySign(const APFloat &rhs) +{ + /* And this one. */ + sign = rhs.sign; +} + /* Normalized addition or subtraction. */ APFloat::opStatus APFloat::addOrSubtract(const APFloat &rhs, roundingMode rounding_mode, @@ -1148,6 +1162,30 @@ return fs; } +/* Normalized remainder. */ +APFloat::opStatus +APFloat::mod(const APFloat &rhs, roundingMode rounding_mode) +{ + opStatus fs; + APFloat V = *this; + fs = V.divide(rhs, rmNearestTiesToEven); + if (fs == opDivByZero) + return fs; + + integerPart x; + fs = V.convertToInteger(&x, integerPartWidth, true, rmNearestTiesToEven); + if (fs==opInvalidOp) + return fs; + + fs = V.convertFromInteger(&x, integerPartWidth, true, rmNearestTiesToEven); + assert(fs==opOK); // should always work + fs = V.multiply(rhs, rounding_mode); + assert(fs==opOK); // should not overflow or underflow + fs = subtract(V, rounding_mode); + assert(fs==opOK); + return fs; +} + /* Normalized fused-multiply-add. */ APFloat::opStatus APFloat::fusedMultiplyAdd(const APFloat &multiplicand, From evan.cheng at apple.com Fri Aug 31 21:00:51 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Sat, 01 Sep 2007 02:00:51 -0000 Subject: [llvm-commits] [llvm] r41668 - in /llvm/trunk: lib/Transforms/Scalar/LowerGC.cpp test/CodeGen/Generic/GC/lower_gcroot.ll Message-ID: <200709010200.l8120p9r019518@zion.cs.uiuc.edu> Author: evancheng Date: Fri Aug 31 21:00:51 2007 New Revision: 41668 URL: http://llvm.org/viewvc/llvm-project?rev=41668&view=rev Log: Fix a gcroot lowering bug. Added: llvm/trunk/test/CodeGen/Generic/GC/lower_gcroot.ll Modified: llvm/trunk/lib/Transforms/Scalar/LowerGC.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LowerGC.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LowerGC.cpp?rev=41668&r1=41667&r2=41668&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LowerGC.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LowerGC.cpp Fri Aug 31 21:00:51 2007 @@ -262,7 +262,7 @@ cast(GCRootInt->getFunctionType()->getParamType(0)); Constant *Null = ConstantPointerNull::get(PtrLocTy); - // Initialize all of the gcroot records now, and eliminate them as we go. + // Initialize all of the gcroot records now. for (unsigned i = 0, e = GCRoots.size(); i != e; ++i) { // Initialize the meta-data pointer. Par[2] = ConstantInt::get(Type::Int32Ty, i); @@ -282,7 +282,6 @@ new StoreInst(Constant::getNullValue(PtrLocTy->getElementType()), GCRoots[i]->getOperand(1), GCRoots[i]); new StoreInst(GCRoots[i]->getOperand(1), RootPtrPtr, GCRoots[i]); - GCRoots[i]->getParent()->getInstList().erase(GCRoots[i]); } // Now that the record is all initialized, store the pointer into the global @@ -290,6 +289,10 @@ Value *C = new BitCastInst(AI, PointerType::get(MainRootRecordType), "", IP); new StoreInst(C, RootChain, IP); + // Eliminate all the gcroot records now. + for (unsigned i = 0, e = GCRoots.size(); i != e; ++i) + GCRoots[i]->getParent()->getInstList().erase(GCRoots[i]); + // On exit from the function we have to remove the entry from the GC root // chain. Doing this is straight-forward for return and unwind instructions: // just insert the appropriate copy. Added: llvm/trunk/test/CodeGen/Generic/GC/lower_gcroot.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/GC/lower_gcroot.ll?rev=41668&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Generic/GC/lower_gcroot.ll (added) +++ llvm/trunk/test/CodeGen/Generic/GC/lower_gcroot.ll Fri Aug 31 21:00:51 2007 @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc + + %Env = type opaque* + +define void @.main(%Env) { + call void @llvm.gcroot( %Env* null, %Env null ) + unreachable +} + +declare void @llvm.gcroot(%Env*, %Env) From evan.cheng at apple.com Fri Aug 31 21:03:18 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Sat, 01 Sep 2007 02:03:18 -0000 Subject: [llvm-commits] [llvm] r41669 - in /llvm/trunk/lib/CodeGen: LiveInterval.cpp SimpleRegisterCoalescing.cpp Message-ID: <200709010203.l8123Iwk019667@zion.cs.uiuc.edu> Author: evancheng Date: Fri Aug 31 21:03:17 2007 New Revision: 41669 URL: http://llvm.org/viewvc/llvm-project?rev=41669&view=rev Log: More tweaks to improve compile time. Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveInterval.cpp?rev=41669&r1=41668&r2=41669&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveInterval.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveInterval.cpp Fri Aug 31 21:03:17 2007 @@ -288,26 +288,24 @@ void LiveInterval::join(LiveInterval &Other, int *LHSValNoAssignments, int *RHSValNoAssignments, SmallVector &NewVNInfo) { - - // There might be some dead val#, create VNInfo for them. - for (unsigned i = 0, e = NewVNInfo.size(); i != e; ++i) { - VNInfo *VNI = NewVNInfo[i]; - if (!VNI) { - VNI = new VNInfo(this, i, ~1U, 0); - NewVNInfo[i] = VNI; - } - } - // Determine if any of our live range values are mapped. This is uncommon, so - // we want to avoid the interval scan if not. + // we want to avoid the interval scan if not. bool MustMapCurValNos = false; - for (vni_iterator i = vni_begin(), e = vni_end(); i != e; ++i) { - VNInfo *VNI = *i; - unsigned VN = VNI->id; - if (VNI->def == ~1U) continue; // tombstone value # - if (VNI != NewVNInfo[LHSValNoAssignments[VN]]) { + unsigned NumVals = getNumValNums(); + unsigned NumNewVals = NewVNInfo.size(); + for (unsigned i = 0; i != NumVals; ++i) { + unsigned LHSValID = LHSValNoAssignments[i]; + if (i != LHSValID || + (NewVNInfo[LHSValID] && NewVNInfo[LHSValID]->parent != this)) MustMapCurValNos = true; - break; + + // There might be some dead val#, create VNInfo for them. + if (i < NumNewVals) { + VNInfo *VNI = NewVNInfo[i]; + if (!VNI) { + VNI = new VNInfo(this, i, ~1U, 0); + NewVNInfo[i] = VNI; + } } } @@ -342,19 +340,34 @@ } // Remember assignements because val# ids are changing. - std::vector OtherAssignments; + SmallVector OtherAssignments; for (iterator I = Other.begin(), E = Other.end(); I != E; ++I) OtherAssignments.push_back(RHSValNoAssignments[I->valno->id]); // Update val# info. Renumber them and make sure they all belong to this // LiveInterval now. - valnos.clear(); - for (unsigned i = 0, e = NewVNInfo.size(); i != e; ++i) { + for (unsigned i = 0; i != NumVals; ++i) { + if (i == NumNewVals) + break; VNInfo *VNI = NewVNInfo[i]; - VNI->parent = this; - VNI->id = i; // Renumber val#. + if (VNI->parent != this || VNI->id != i) { + VNI->parent = this; + VNI->id = i; // Renumber val#. + valnos[i] = VNI; + } + } + for (unsigned i = NumVals; i < NumNewVals; ++i) { + VNInfo *VNI = NewVNInfo[i]; + if (!VNI) + VNI = new VNInfo(this, i, ~1U, 0); + else { + VNI->parent = this; + VNI->id = i; // Renumber val#. + } valnos.push_back(VNI); } + if (NumNewVals < NumVals) + valnos.resize(NumNewVals); // shrinkify // Okay, now insert the RHS live ranges into the LHS. iterator InsertPos = begin(); Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=41669&r1=41668&r2=41669&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Fri Aug 31 21:03:17 2007 @@ -682,8 +682,9 @@ assert(RHSValID != -1 && "Didn't find value #?"); RHSValNoAssignments[0] = RHSValID; if (RHSVal0DefinedFromLHS != -1) { - RHSValsDefinedFromLHS[RHSValNoInfo0] = - LHS.getLiveRangeContaining(RHSValNoInfo0->def-1)->valno; + // This path doesn't go through ComputeUltimateVN so just set + // it to anything. + RHSValsDefinedFromLHS[RHSValNoInfo0] = (VNInfo*)1; } } else { // Loop over the value numbers of the LHS, seeing if any are defined from @@ -798,31 +799,32 @@ } } - // Update kill info. Some live ranges are extended due to copy coalescing. - for (DenseMap::iterator I = RHSValsDefinedFromLHS.begin(), - E = RHSValsDefinedFromLHS.end(); I != E; ++I) { - VNInfo *VNI = I->first; - unsigned RHSValID = RHSValNoAssignments[VNI->id]; - LiveInterval::removeKill(*NewVNInfo[RHSValID], VNI->def); - LHS.addKills(*NewVNInfo[RHSValID], VNI->kills); - } - - for (DenseMap::iterator I = LHSValsDefinedFromRHS.begin(), - E = LHSValsDefinedFromRHS.end(); I != E; ++I) { - VNInfo *VNI = I->first; - unsigned LHSValID = LHSValNoAssignments[VNI->id]; - LiveInterval::removeKill(*NewVNInfo[LHSValID], VNI->def); - RHS.addKills(*NewVNInfo[LHSValID], VNI->kills); - } - // If we get here, we know that we can coalesce the live ranges. Ask the // intervals to coalesce themselves now. if ((RHS.ranges.size() > LHS.ranges.size() && MRegisterInfo::isVirtualRegister(LHS.reg)) || MRegisterInfo::isPhysicalRegister(RHS.reg)) { + // Update kill info. Some live ranges are extended due to copy coalescing. + for (DenseMap::iterator I = LHSValsDefinedFromRHS.begin(), + E = LHSValsDefinedFromRHS.end(); I != E; ++I) { + VNInfo *VNI = I->first; + unsigned LHSValID = LHSValNoAssignments[VNI->id]; + LiveInterval::removeKill(*NewVNInfo[LHSValID], VNI->def); + RHS.addKills(*NewVNInfo[LHSValID], VNI->kills); + } + RHS.join(LHS, &RHSValNoAssignments[0], &LHSValNoAssignments[0], NewVNInfo); Swapped = true; } else { + // Update kill info. Some live ranges are extended due to copy coalescing. + for (DenseMap::iterator I = RHSValsDefinedFromLHS.begin(), + E = RHSValsDefinedFromLHS.end(); I != E; ++I) { + VNInfo *VNI = I->first; + unsigned RHSValID = RHSValNoAssignments[VNI->id]; + LiveInterval::removeKill(*NewVNInfo[RHSValID], VNI->def); + LHS.addKills(*NewVNInfo[RHSValID], VNI->kills); + } + LHS.join(RHS, &LHSValNoAssignments[0], &RHSValNoAssignments[0], NewVNInfo); Swapped = false; } From gordonhenriksen at mac.com Sat Sep 1 00:15:47 2007 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Sat, 1 Sep 2007 01:15:47 -0400 Subject: [llvm-commits] [llvm] r41668 - in /llvm/trunk: lib/Transforms/Scalar/LowerGC.cpp test/CodeGen/Generic/GC/lower_gcroot.ll In-Reply-To: <200709010200.l8120p9r019518@zion.cs.uiuc.edu> References: <200709010200.l8120p9r019518@zion.cs.uiuc.edu> Message-ID: <14156248-D006-4B2A-9E04-5EF82BF108AD@mac.com> Evan, > + call void @llvm.gcroot( %Env* null, %Env null ) This is invalid. The first argument to gcroot must be an alloca, not any other value. I'll see what I can do about having the validator look at GC intrinsics, but here's a fixed test case. ? Gordon -------------- next part -------------- A non-text attachment was scrubbed... Name: gcroottest.patch Type: application/octet-stream Size: 481 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20070901/f6de68ae/attachment.obj From espindola at google.com Sat Sep 1 02:46:12 2007 From: espindola at google.com (Rafael Espindola) Date: Sat, 1 Sep 2007 08:46:12 +0100 Subject: [llvm-commits] representing the alignment of a function argument In-Reply-To: <20070831212837.GA4760@village.us.cray.com> References: <20070831212837.GA4760@village.us.cray.com> Message-ID: <38a0d8450709010046x32f448d1s36a03935cf958ab2@mail.gmail.com> > Where do you need the representation? Loads and stores in the LLVM IR and > the target-independent load and store nodes in the SelectionDAG IR have an > alignment attribute; are either of those sufficient? I need the alignment while expanding a call to a function. In this case I have the DAG nodes for what is to be passed and for the formal argument. I need to create a store or a memcpy. The best alignment I can get so far is the ABI type alignment. > Dan > > Cheers, -- Rafael Avila de Espindola Google Ireland Ltd. Gordon House Barrow Street Dublin 4 Ireland Registered in Dublin, Ireland Registration Number: 368047 From asl at math.spbu.ru Sun Sep 2 15:16:58 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Sun, 02 Sep 2007 20:16:58 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41673 - /llvm-gcc-4.2/trunk/gcc/doc/extend.texi Message-ID: <200709022016.l82KGwiP024893@zion.cs.uiuc.edu> Author: asl Date: Sun Sep 2 15:16:58 2007 New Revision: 41673 URL: http://llvm.org/viewvc/llvm-project?rev=41673&view=rev Log: Another merge error Modified: llvm-gcc-4.2/trunk/gcc/doc/extend.texi Modified: llvm-gcc-4.2/trunk/gcc/doc/extend.texi URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/doc/extend.texi?rev=41673&r1=41672&r2=41673&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/doc/extend.texi (original) +++ llvm-gcc-4.2/trunk/gcc/doc/extend.texi Sun Sep 2 15:16:58 2007 @@ -2322,22 +2322,6 @@ The @code{longjmp}-like counterpart of such function, if any, might need to be marked with the @code{noreturn} attribute. - at c APPLE LOCAL begin 4356747 stack realign - at item force_align_arg_pointer - at cindex @code{force_align_arg_pointer} attribute -On the Intel x86, the @code{force_align_arg_pointer} attribute may be -applied to individual function definitions, generating an alternate -prologue and epilogue that realigns the runtime stack. This supports -mixing legacy codes that run with a 4-byte aligned stack with modern -codes that keep a 16-byte stack for SSE compatibility. The alternate -prologue/epilogue is slower and bigger than the regular one, and it -requires one dedicated register for the life of the function. This -also lowers the number of registers available if used in conjunction -with the @code{regparm} attribute. The @code{force_align_arg_pointer} -attribute is incompatible with nested functions; this is considered a -hard error. - at c APPLE LOCAL end 4356747 stack realign - @item saveall @cindex save all registers on the Blackfin, H8/300, H8/300H, and H8S Use this attribute on the Blackfin, H8/300, H8/300H, and H8S to indicate that From asl at math.spbu.ru Sun Sep 2 17:07:21 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Sun, 02 Sep 2007 22:07:21 -0000 Subject: [llvm-commits] [llvm] r41675 - /llvm/trunk/lib/CodeGen/DwarfWriter.cpp Message-ID: <200709022207.l82M7LUL030253@zion.cs.uiuc.edu> Author: asl Date: Sun Sep 2 17:07:21 2007 New Revision: 41675 URL: http://llvm.org/viewvc/llvm-project?rev=41675&view=rev Log: Emit proper "secrel" directive, where possible. This fixes invalid asm syntax of debug info on mingw32. Also, cleanup some stuff. Modified: llvm/trunk/lib/CodeGen/DwarfWriter.cpp Modified: llvm/trunk/lib/CodeGen/DwarfWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DwarfWriter.cpp?rev=41675&r1=41674&r2=41675&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/DwarfWriter.cpp (original) +++ llvm/trunk/lib/CodeGen/DwarfWriter.cpp Sun Sep 2 17:07:21 2007 @@ -823,17 +823,24 @@ MachineModuleInfo *getMMI() const { return MMI; } const TargetAsmInfo *getTargetAsmInfo() const { return TAI; } + void PrintRelDirective(bool Force32Bit = false, bool isInSection = false) + const { + if (isInSection && TAI->getDwarfSectionOffsetDirective()) + O << TAI->getDwarfSectionOffsetDirective(); + else if (Force32Bit || TAI->getAddressSize() == sizeof(int32_t)) + O << TAI->getData32bitsDirective(); + else + O << TAI->getData64bitsDirective(); + } + /// PrintLabelName - Print label name in form used by Dwarf writer. /// void PrintLabelName(DWLabel Label) const { PrintLabelName(Label.Tag, Label.Number); } - void PrintLabelName(const char *Tag, unsigned Number, - bool isInSection = false) const { - if (isInSection && TAI->getDwarfSectionOffsetDirective()) - O << TAI->getDwarfSectionOffsetDirective() << Tag; - else - O << TAI->getPrivateGlobalPrefix() << Tag; + void PrintLabelName(const char *Tag, unsigned Number) const { + + O << TAI->getPrivateGlobalPrefix() << Tag; if (Number) O << Number; } @@ -854,21 +861,14 @@ } void EmitReference(const char *Tag, unsigned Number, bool IsPCRelative = false) const { - if (TAI->getAddressSize() == sizeof(int32_t)) - O << TAI->getData32bitsDirective(); - else - O << TAI->getData64bitsDirective(); - + PrintRelDirective(); PrintLabelName(Tag, Number); if (IsPCRelative) O << "-" << TAI->getPCSymbol(); } void EmitReference(const std::string &Name, bool IsPCRelative = false) const { - if (TAI->getAddressSize() == sizeof(int32_t)) - O << TAI->getData32bitsDirective(); - else - O << TAI->getData64bitsDirective(); - + PrintRelDirective(); + O << Name; if (IsPCRelative) O << "-" << TAI->getPCSymbol(); @@ -894,20 +894,14 @@ O << "-"; PrintLabelName(TagLo, NumberLo); O << "\n"; - - if (IsSmall || TAI->getAddressSize() == sizeof(int32_t)) - O << TAI->getData32bitsDirective(); - else - O << TAI->getData64bitsDirective(); + + PrintRelDirective(IsSmall); PrintLabelName("set", SetCounter); ++SetCounter; } else { - if (IsSmall || TAI->getAddressSize() == sizeof(int32_t)) - O << TAI->getData32bitsDirective(); - else - O << TAI->getData64bitsDirective(); + PrintRelDirective(IsSmall); PrintLabelName(TagHi, NumberHi); O << "-"; @@ -923,7 +917,7 @@ O << "\t.set\t"; PrintLabelName("set", SetCounter); O << ","; - PrintLabelName(Label, LabelNumber, true); + PrintLabelName(Label, LabelNumber); if (isEH) printAbsolute = TAI->isAbsoluteEHSectionOffsets(); @@ -935,21 +929,15 @@ PrintLabelName(Section, SectionNumber); } O << "\n"; - - if (IsSmall || TAI->getAddressSize() == sizeof(int32_t)) - O << TAI->getData32bitsDirective(); - else - O << TAI->getData64bitsDirective(); + + PrintRelDirective(IsSmall); PrintLabelName("set", SetCounter); ++SetCounter; } else { - if (IsSmall || TAI->getAddressSize() == sizeof(int32_t)) - O << TAI->getData32bitsDirective(); - else - O << TAI->getData64bitsDirective(); + PrintRelDirective(IsSmall, true); - PrintLabelName(Label, LabelNumber, true); + PrintLabelName(Label, LabelNumber); if (isEH) printAbsolute = TAI->isAbsoluteEHSectionOffsets(); @@ -2811,12 +2799,12 @@ Asm->EmitExternalGlobal((const GlobalVariable *)(Personality)); O << "-" << TAI->getPCSymbol(); Asm->EOL("Set Personality"); - O << TAI->getData32bitsDirective(); + PrintRelDirective(); PrintLabelName("set", SetCounter); Asm->EOL("Personality"); ++SetCounter; } else { - O << TAI->getData32bitsDirective(); + PrintRelDirective(); Asm->EmitExternalGlobal((const GlobalVariable *)(Personality)); O << "-" << TAI->getPCSymbol(); Asm->EOL("Personality"); @@ -3188,11 +3176,8 @@ // Emit the type ids. for (unsigned M = TypeInfos.size(); M; --M) { GlobalVariable *GV = TypeInfos[M - 1]; - - if (TAI->getAddressSize() == sizeof(int32_t)) - O << TAI->getData32bitsDirective(); - else - O << TAI->getData64bitsDirective(); + + PrintRelDirective(); if (GV) O << Asm->getGlobalLinkName(GV); From asl at math.spbu.ru Sun Sep 2 17:11:14 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Sun, 02 Sep 2007 22:11:14 -0000 Subject: [llvm-commits] [llvm] r41676 - in /llvm/trunk/lib: CodeGen/MachineBasicBlock.cpp Transforms/Utils/DemoteRegToStack.cpp Message-ID: <200709022211.l82MBFiD030426@zion.cs.uiuc.edu> Author: asl Date: Sun Sep 2 17:11:14 2007 New Revision: 41676 URL: http://llvm.org/viewvc/llvm-project?rev=41676&view=rev Log: Silence warning while compiling with gcc 4.2 Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp llvm/trunk/lib/Transforms/Utils/DemoteRegToStack.cpp Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=41676&r1=41675&r2=41676&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Sun Sep 2 17:11:14 2007 @@ -81,7 +81,8 @@ MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() { const TargetInstrInfo& TII = *getParent()->getTarget().getInstrInfo(); iterator I = end(); - while (I != begin() && TII.isTerminatorInstr((--I)->getOpcode())); + while (I != begin() && TII.isTerminatorInstr((--I)->getOpcode())) + ; /*noop */ if (I != end() && !TII.isTerminatorInstr(I->getOpcode())) ++I; return I; } Modified: llvm/trunk/lib/Transforms/Utils/DemoteRegToStack.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/DemoteRegToStack.cpp?rev=41676&r1=41675&r2=41676&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/DemoteRegToStack.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/DemoteRegToStack.cpp Sun Sep 2 17:11:14 2007 @@ -122,7 +122,8 @@ // Insert load in place of the phi and replace all uses. BasicBlock::iterator InsertPt; for (InsertPt = P->getParent()->getInstList().begin(); - isa(InsertPt); ++InsertPt); + isa(InsertPt); ++InsertPt) + ; /*noop */ Value *V = new LoadInst(Slot, P->getName()+".reload", P); P->replaceAllUsesWith(V); From asl at math.spbu.ru Sun Sep 2 17:22:45 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Sun, 02 Sep 2007 22:22:45 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41677 - in /llvm-gcc-4.2/trunk/gcc: config/darwin-c.c config/darwin-protos.h config/darwin.h objc/objc-act.c Message-ID: <200709022222.l82MMjQY030897@zion.cs.uiuc.edu> Author: asl Date: Sun Sep 2 17:22:45 2007 New Revision: 41677 URL: http://llvm.org/viewvc/llvm-project?rev=41677&view=rev Log: Unbreak building of objc FE on non-darwin. Just moved some apple local stuff into proper places :) Modified: llvm-gcc-4.2/trunk/gcc/config/darwin-c.c llvm-gcc-4.2/trunk/gcc/config/darwin-protos.h llvm-gcc-4.2/trunk/gcc/config/darwin.h llvm-gcc-4.2/trunk/gcc/objc/objc-act.c Modified: llvm-gcc-4.2/trunk/gcc/config/darwin-c.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/darwin-c.c?rev=41677&r1=41676&r2=41677&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/darwin-c.c (original) +++ llvm-gcc-4.2/trunk/gcc/config/darwin-c.c Sun Sep 2 17:22:45 2007 @@ -1071,13 +1071,3 @@ return true; } /* APPLE LOCAL end radar 4985544 - radar 5096648 - radar 5195402 */ - -/* APPLE LOCAL begin radar 2996215 */ -/* Objc wrapper to call libcpp's conversion routine. */ -bool -objc_cvt_utf8_utf16 (const unsigned char *inbuf, size_t length, - unsigned char **uniCharBuf, size_t *numUniChars) -{ - return cpp_utf8_utf16 (parse_in, inbuf, length, uniCharBuf, numUniChars); -} -/* APPLE LOCAL end radar 2996215 */ Modified: llvm-gcc-4.2/trunk/gcc/config/darwin-protos.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/darwin-protos.h?rev=41677&r1=41676&r2=41677&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/darwin-protos.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/darwin-protos.h Sun Sep 2 17:22:45 2007 @@ -134,7 +134,6 @@ /* APPLE LOCAL begin radar 2996215 */ extern tree objc_create_init_utf16_var (const unsigned char *, size_t, size_t *); -extern bool objc_cvt_utf8_utf16 (const unsigned char *, size_t, unsigned char **, size_t *); /* APPLE LOCAL end radar 2996215 */ /* APPLE LOCAL radar 5202926 */ extern bool objc_anonymous_local_objc_name (const char *); Modified: llvm-gcc-4.2/trunk/gcc/config/darwin.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/darwin.h?rev=41677&r1=41676&r2=41677&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/darwin.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/darwin.h Sun Sep 2 17:22:45 2007 @@ -694,6 +694,20 @@ error ("Mac OS X version 10.5 or later is needed for zerocost-exceptions"); \ } while (0) /* APPLE LOCAL end radar 5023725 */ + +/* LLVM LOCAL begin */ +/* APPLE LOCAL begin radar 4590191 */ +#undef OBJC_FLAG_SJLJ_EXCEPTIONS +#define OBJC_FLAG_SJLJ_EXCEPTIONS \ + do { \ + if (darwin_macosx_version_min \ + && strverscmp (darwin_macosx_version_min, "10.3") < 0) \ + warning (0, "Mac OS X version 10.3 or later is needed instead of %s for objc/obj-c++ exceptions", \ + darwin_macosx_version_min); \ + } while(0) +/* APPLE LOCAL end radar 4590191 */ +/* LLVM LOCAL end */ + /* APPLE LOCAL begin radar 4862848 */ #undef OBJC_FLAG_OBJC_ABI #define OBJC_FLAG_OBJC_ABI \ Modified: llvm-gcc-4.2/trunk/gcc/objc/objc-act.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/objc/objc-act.c?rev=41677&r1=41676&r2=41677&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/objc/objc-act.c (original) +++ llvm-gcc-4.2/trunk/gcc/objc/objc-act.c Sun Sep 2 17:22:45 2007 @@ -123,6 +123,13 @@ #define OBJC_FLAG_ZEROCOST_EXCEPTIONS #endif /* APPLE LOCAL end radar 5023725 */ +/* LLVM LOCAL begin */ +/* APPLE LOCAL begin radar 4590191 */ +#ifndef OBJC_FLAG_SJLJ_EXCEPTIONS +#define OBJC_FLAG_SJLJ_EXCEPTIONS +#endif +/* APPLE LOCAL end radar 4590191 */ +/* LLVM LOCAL end */ /* APPLE LOCAL begin radar 4531086 */ #ifndef OBJC_WARN_OBJC2_FEATURES #define OBJC_WARN_OBJC2_FEATURES(MESSAGE) @@ -7541,10 +7548,9 @@ /* APPLE LOCAL begin radar 4590191 */ if (flag_objc_sjlj_exceptions) { - if (darwin_macosx_version_min - && strverscmp (darwin_macosx_version_min, "10.3") < 0) - warning (0, "Mac OS X version 10.3 or later is needed instead of %s for objc/obj-c++ exceptions", - darwin_macosx_version_min); + /* LLVM LOCAL begin */ + OBJC_FLAG_SJLJ_EXCEPTIONS; + /* LLVM LOCAL end */ } /* APPLE LOCAL end radar 4590191 */ /* APPLE LOCAL begin radar 2848255 */ @@ -17855,7 +17861,7 @@ set_user_assembler_name(decl, string); /* Let optimizer know that this decl is not removable. */ DECL_PRESERVE_P (decl) = 1; -#endif ENABLE_LLVM +#endif /* LLVM LOCAL end */ pushdecl (decl); @@ -17874,7 +17880,7 @@ /* This decl's name is special. Ask llvm to not add leading underscore by setting it as a user supplied asm name. */ set_user_assembler_name(decl, string); -#endif ENABLE_LLVM +#endif /* LLVM LOCAL end */ /* Force the output of the decl as this forces the reference of the class. */ mark_decl_referenced (decl); @@ -17958,7 +17964,7 @@ set_user_assembler_name(decl, string); /* Let optimizer know that this decl is not removable. */ DECL_PRESERVE_P (decl) = 1; -#endif ENABLE_LLVM +#endif /* LLVM LOCAL end */ DECL_INITIAL (decl) = init; assemble_variable (decl, 1, 0, 0); @@ -18811,7 +18817,17 @@ } /* APPLE LOCAL end radar 4985544 - 5195402 */ +/* LLVM LOCAL begin */ /* APPLE LOCAL begin radar 2996215 */ +/* Objc wrapper to call libcpp's conversion routine. */ +static bool +objc_cvt_utf8_utf16 (const unsigned char *inbuf, size_t length, + unsigned char **uniCharBuf, size_t *numUniChars) +{ + return cpp_utf8_utf16 (parse_in, inbuf, length, uniCharBuf, numUniChars); +} +/* LLVM LOCAL end */ + /* This routine declares static char __utf16_string [numUniChars] in __TEXT,__ustring section and initializes it with uniCharBuf[numUniChars] characters. */ From asl at math.spbu.ru Sun Sep 2 17:26:15 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Sun, 02 Sep 2007 22:26:15 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41678 - /llvm-gcc-4.2/trunk/gcc/convert.c Message-ID: <200709022226.l82MQFcR031037@zion.cs.uiuc.edu> Author: asl Date: Sun Sep 2 17:26:15 2007 New Revision: 41678 URL: http://llvm.org/viewvc/llvm-project?rev=41678&view=rev Log: Disable emitting lroundf() and friends. This should be fixed sometimes. Modified: llvm-gcc-4.2/trunk/gcc/convert.c Modified: llvm-gcc-4.2/trunk/gcc/convert.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/convert.c?rev=41678&r1=41677&r2=41678&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/convert.c (original) +++ llvm-gcc-4.2/trunk/gcc/convert.c Sun Sep 2 17:26:15 2007 @@ -38,6 +38,7 @@ #include "langhooks.h" #include "real.h" +#include "llvm.h" /* Convert EXPR to some pointer or reference type TYPE. EXPR must be pointer, reference, integer, enumeral, or literal zero; in other cases error is called. */ @@ -394,6 +395,12 @@ /* Only convert in ISO C99 mode. */ if (!TARGET_C99_FUNCTIONS) break; + /* LLVM LOCAL begin */ + /* FIXME: l-functions should be supported sometimes */ + #ifdef ENABLE_LLVM + break; + #endif + /* LLVM LOCAL end */ if (outprec < TYPE_PRECISION (long_integer_type_node) || (outprec == TYPE_PRECISION (long_integer_type_node) && !TYPE_UNSIGNED (type))) @@ -407,6 +414,10 @@ /* Only convert in ISO C99 mode. */ if (!TARGET_C99_FUNCTIONS) break; + /* LLVM LOCAL begin */ + #ifdef ENABLER_LLVM + break; + #endif if (outprec < TYPE_PRECISION (long_integer_type_node) || (outprec == TYPE_PRECISION (long_integer_type_node) && !TYPE_UNSIGNED (type))) From asl at math.spbu.ru Sun Sep 2 17:27:32 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Sun, 02 Sep 2007 22:27:32 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r41679 - in /llvm-gcc-4.2/trunk/gcc: expr.h libfuncs.h optabs.c Message-ID: <200709022227.l82MRWOb031127@zion.cs.uiuc.edu> Author: asl Date: Sun Sep 2 17:27:29 2007 New Revision: 41679 URL: http://llvm.org/viewvc/llvm-project?rev=41679&view=rev Log: Fix compilation without LLVM Modified: llvm-gcc-4.2/trunk/gcc/expr.h llvm-gcc-4.2/trunk/gcc/libfuncs.h llvm-gcc-4.2/trunk/gcc/optabs.c Modified: llvm-gcc-4.2/trunk/gcc/expr.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/expr.h?rev=41679&r1=41678&r2=41679&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/expr.h (original) +++ llvm-gcc-4.2/trunk/gcc/expr.h Sun Sep 2 17:27:29 2007 @@ -752,11 +752,7 @@ extern rtx init_one_libfunc (const char *); /* LLVM LOCAL begin */ /* Call this to initialize an optab function tree. */ -#ifdef ENABLE_LLVM extern tree llvm_init_one_libfunc (const char *); -#else -#define llvm_init_one_libfunc init_one_libfunc -#endif /* LLVM LOCAL end */ extern int vector_mode_valid_p (enum machine_mode); Modified: llvm-gcc-4.2/trunk/gcc/libfuncs.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/libfuncs.h?rev=41679&r1=41678&r2=41679&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/libfuncs.h (original) +++ llvm-gcc-4.2/trunk/gcc/libfuncs.h Sun Sep 2 17:27:29 2007 @@ -52,11 +52,9 @@ implicitly and not via optabs. */ extern GTY(()) rtx libfunc_table[LTI_MAX]; /* LLVM LOCAL begin */ -#ifdef ENABLE_LLVM /* FUNCTION_DECL nodes for the library functions that are called implicitly and not via optabs. */ extern GTY(()) tree llvm_libfunc_table[LTI_MAX]; -#endif /* LLVM LOCAL end */ /* Accessor macros for libfunc_table. */ Modified: llvm-gcc-4.2/trunk/gcc/optabs.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/optabs.c?rev=41679&r1=41678&r2=41679&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/optabs.c (original) +++ llvm-gcc-4.2/trunk/gcc/optabs.c Sun Sep 2 17:27:29 2007 @@ -58,8 +58,9 @@ optab optab_table[OTI_MAX]; rtx libfunc_table[LTI_MAX]; -/* LLVM LOCAL */ +/* LLVM LOCAL begin */ tree llvm_libfunc_table[LTI_MAX]; +/* LLVM LOCAL end */ /* Tables of patterns for converting one mode to another. */ convert_optab convert_optab_table[COI_MAX]; From asl at math.spbu.ru Sun Sep 2 19:36:07 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 03 Sep 2007 00:36:07 -0000 Subject: [llvm-commits] [llvm] r41680 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200709030036.l830a7dw004990@zion.cs.uiuc.edu> Author: asl Date: Sun Sep 2 19:36:06 2007 New Revision: 41680 URL: http://llvm.org/viewvc/llvm-project?rev=41680&view=rev Log: Reapply r41578 with proper fix Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=41680&r1=41679&r2=41680&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Sep 2 19:36:06 2007 @@ -244,6 +244,7 @@ setExceptionPointerRegister(X86::EAX); setExceptionSelectorRegister(X86::EDX); } + setOperationAction(ISD::FRAME_TO_ARGS_OFFSET, MVT::i32, Custom); setOperationAction(ISD::ADJUST_TRAMP, MVT::i32, Expand); setOperationAction(ISD::ADJUST_TRAMP, MVT::i64, Expand);