From baldrick at free.fr Mon Dec 17 00:34:35 2007 From: baldrick at free.fr (Duncan Sands) Date: Mon, 17 Dec 2007 06:34:35 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r45088 - /llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Message-ID: <200712170634.lBH6YZEq004932@zion.cs.uiuc.edu> Author: baldrick Date: Mon Dec 17 00:34:34 2007 New Revision: 45088 URL: http://llvm.org/viewvc/llvm-project?rev=45088&view=rev Log: Add the nounwind attribute to inline asm calls. Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp?rev=45088&r1=45087&r2=45088&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Mon Dec 17 00:34:34 2007 @@ -3735,6 +3735,16 @@ //===----------------------------------------------------------------------===// +/// Return a ParamAttrsList for the given function return attributes. +const ParamAttrsList *getReturnAttrs(uint16_t attrs) { + if (attrs == ParamAttr::None) + return NULL; + + ParamAttrsVector Attrs; + Attrs.push_back(ParamAttrsWithIndex::get(0, attrs)); + return ParamAttrsList::get(Attrs); +} + /// Reads from register variables are handled by emitting an inline asm node /// that copies the value out of the specified register. Value *TreeToLLVM::EmitReadOfRegisterVariable(tree decl, const MemRef *DestLoc){ @@ -3752,7 +3762,9 @@ const char *Name = IDENTIFIER_POINTER(DECL_ASSEMBLER_NAME(decl)); InlineAsm *IA = InlineAsm::get(FTy, "", "={"+std::string(Name)+"}", false); - return Builder.CreateCall(IA, "tmp"); + CallInst *Call = Builder.CreateCall(IA, "tmp"); + Call->setParamAttrs(getReturnAttrs(ParamAttr::NoUnwind)); + return Call; } /// Stores to register variables are handled by emitting an inline asm node @@ -3769,7 +3781,8 @@ const char *Name = IDENTIFIER_POINTER(DECL_ASSEMBLER_NAME(decl)); InlineAsm *IA = InlineAsm::get(FTy, "", "{"+std::string(Name)+"}", true); - Builder.CreateCall(IA, RHS); + CallInst *Call = Builder.CreateCall(IA, RHS); + Call->setParamAttrs(getReturnAttrs(ParamAttr::NoUnwind)); } /// ConvertInlineAsmStr - Convert the specified inline asm string to an LLVM @@ -4192,7 +4205,8 @@ ASM_VOLATILE_P(exp) || !ASM_OUTPUTS(exp)); CallInst *CV = Builder.CreateCall(Asm, CallOps.begin(), CallOps.end(), StoreCallResultAddr ? "tmp" : ""); - + CV->setParamAttrs(getReturnAttrs(ParamAttr::NoUnwind)); + // If the call produces a value, store it into the destination. if (StoreCallResultAddr) Builder.CreateStore(CV, StoreCallResultAddr); From gordonhenriksen at mac.com Mon Dec 17 10:08:34 2007 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Mon, 17 Dec 2007 16:08:34 -0000 Subject: [llvm-commits] [llvm] r45096 - in /llvm/trunk: bindings/ocaml/llvm/llvm.ml bindings/ocaml/llvm/llvm.mli bindings/ocaml/llvm/llvm_ocaml.c include/llvm-c/Core.h lib/VMCore/Core.cpp test/Bindings/Ocaml/vmcore.ml Message-ID: <200712171608.lBHG8ZUZ008548@zion.cs.uiuc.edu> Author: gordon Date: Mon Dec 17 10:08:32 2007 New Revision: 45096 URL: http://llvm.org/viewvc/llvm-project?rev=45096&view=rev Log: C and Ocaml bindings for address spaces, for that burgeoning market for Ocaml-based compilers targeting embedded devices. :) Modified: llvm/trunk/bindings/ocaml/llvm/llvm.ml llvm/trunk/bindings/ocaml/llvm/llvm.mli llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c llvm/trunk/include/llvm-c/Core.h llvm/trunk/lib/VMCore/Core.cpp llvm/trunk/test/Bindings/Ocaml/vmcore.ml Modified: llvm/trunk/bindings/ocaml/llvm/llvm.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm.ml?rev=45096&r1=45095&r2=45096&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm.ml (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm.ml Mon Dec 17 10:08:32 2007 @@ -144,11 +144,14 @@ (*--... Operations on pointer, vector, and array types .....................--*) external array_type : lltype -> int -> lltype = "llvm_array_type" -external pointer_type : lltype -> lltype = "LLVMPointerType" +external pointer_type : lltype -> lltype = "llvm_pointer_type" +external qualified_pointer_type : lltype -> int -> lltype + = "llvm_qualified_pointer_type" external vector_type : lltype -> int -> lltype = "llvm_vector_type" external element_type : lltype -> lltype = "LLVMGetElementType" external array_length : lltype -> int = "llvm_array_length" +external address_space : lltype -> int = "llvm_address_space" external vector_size : lltype -> int = "llvm_vector_size" (*--... Operations on other types ..........................................--*) Modified: llvm/trunk/bindings/ocaml/llvm/llvm.mli URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm.mli?rev=45096&r1=45095&r2=45096&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm.mli (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm.mli Mon Dec 17 10:08:32 2007 @@ -258,8 +258,15 @@ external array_type : lltype -> int -> lltype = "llvm_array_type" (** [pointer_type ty] returns the pointer type referencing objects of type - [ty]. See the method [llvm::PointerType::get]. **) -external pointer_type : lltype -> lltype = "LLVMPointerType" + [ty] in the default address space (0). + See the method [llvm::PointerType::getUnqual]. **) +external pointer_type : lltype -> lltype = "llvm_pointer_type" + +(** [qualified_pointer_type ty as] returns the pointer type referencing objects + of type [ty] in address space [as]. + See the method [llvm::PointerType::get]. **) +external qualified_pointer_type : lltype -> int -> lltype + = "llvm_qualified_pointer_type" (** [vector_type ty n] returns the array type containing [n] elements of the primitive type [ty]. See the method [llvm::ArrayType::get]. **) @@ -273,6 +280,10 @@ See the method [llvm::ArrayType::getNumElements]. **) external array_length : lltype -> int = "llvm_array_length" +(** [address_space pty] returns the address space qualifier of the pointer type + [pty]. See the method [llvm::PointerType::getAddressSpace]. **) +external address_space : lltype -> int = "llvm_address_space" + (** [element_type ty] returns the element count of the vector type [ty]. See the method [llvm::VectorType::getNumElements]. **) external vector_size : lltype -> int = "llvm_vector_size" Modified: llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c?rev=45096&r1=45095&r2=45096&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c Mon Dec 17 10:08:32 2007 @@ -163,6 +163,17 @@ return LLVMArrayType(ElementTy, Int_val(Count)); } +/* lltype -> lltype */ +CAMLprim LLVMTypeRef llvm_pointer_type(LLVMTypeRef ElementTy) { + return LLVMPointerType(ElementTy, 0); +} + +/* lltype -> int -> lltype */ +CAMLprim LLVMTypeRef llvm_qualified_pointer_type(LLVMTypeRef ElementTy, + value AddressSpace) { + return LLVMPointerType(ElementTy, Int_val(AddressSpace)); +} + /* lltype -> int -> lltype */ CAMLprim LLVMTypeRef llvm_vector_type(LLVMTypeRef ElementTy, value Count) { return LLVMVectorType(ElementTy, Int_val(Count)); @@ -174,6 +185,11 @@ } /* lltype -> int */ +CAMLprim value llvm_address_space(LLVMTypeRef PtrTy) { + return Val_int(LLVMGetPointerAddressSpace(PtrTy)); +} + +/* lltype -> int */ CAMLprim value llvm_vector_size(LLVMTypeRef VectorTy) { return Val_int(LLVMGetVectorSize(VectorTy)); } @@ -399,7 +415,7 @@ LLVMValueRef GlobalVar; if ((GlobalVar = LLVMGetNamedGlobal(M, String_val(Name)))) { if (LLVMGetElementType(LLVMTypeOf(GlobalVar)) != Ty) - return LLVMConstBitCast(GlobalVar, LLVMPointerType(Ty)); + return LLVMConstBitCast(GlobalVar, LLVMPointerType(Ty, 0)); return GlobalVar; } return LLVMAddGlobal(M, Ty, String_val(Name)); @@ -476,7 +492,7 @@ LLVMValueRef Fn; if ((Fn = LLVMGetNamedFunction(M, String_val(Name)))) { if (LLVMGetElementType(LLVMTypeOf(Fn)) != Ty) - return LLVMConstBitCast(Fn, LLVMPointerType(Ty)); + return LLVMConstBitCast(Fn, LLVMPointerType(Ty, 0)); return Fn; } return LLVMAddFunction(M, String_val(Name), Ty); Modified: llvm/trunk/include/llvm-c/Core.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm-c/Core.h?rev=45096&r1=45095&r2=45096&view=diff ============================================================================== --- llvm/trunk/include/llvm-c/Core.h (original) +++ llvm/trunk/include/llvm-c/Core.h Mon Dec 17 10:08:32 2007 @@ -194,11 +194,12 @@ /* Operations on array, pointer, and vector types (sequence types) */ LLVMTypeRef LLVMArrayType(LLVMTypeRef ElementType, unsigned ElementCount); -LLVMTypeRef LLVMPointerType(LLVMTypeRef ElementType); +LLVMTypeRef LLVMPointerType(LLVMTypeRef ElementType, unsigned AddressSpace); LLVMTypeRef LLVMVectorType(LLVMTypeRef ElementType, unsigned ElementCount); LLVMTypeRef LLVMGetElementType(LLVMTypeRef Ty); unsigned LLVMGetArrayLength(LLVMTypeRef ArrayTy); +unsigned LLVMGetPointerAddressSpace(LLVMTypeRef PointerTy); unsigned LLVMGetVectorSize(LLVMTypeRef VectorTy); /* Operations on other types */ Modified: llvm/trunk/lib/VMCore/Core.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Core.cpp?rev=45096&r1=45095&r2=45096&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Core.cpp (original) +++ llvm/trunk/lib/VMCore/Core.cpp Mon Dec 17 10:08:32 2007 @@ -145,16 +145,15 @@ /*--.. Operations on array, pointer, and vector types (sequence types) .....--*/ -LLVMTypeRef LLVMArrayType(LLVMTypeRef ElementType, unsigned ElementCount){ +LLVMTypeRef LLVMArrayType(LLVMTypeRef ElementType, unsigned ElementCount) { return wrap(ArrayType::get(unwrap(ElementType), ElementCount)); } -LLVMTypeRef LLVMPointerType(LLVMTypeRef ElementType) { - // FIXME: Needst to handle address spaces - return wrap(PointerType::getUnqual(unwrap(ElementType))); +LLVMTypeRef LLVMPointerType(LLVMTypeRef ElementType, unsigned AddressSpace) { + return wrap(PointerType::get(unwrap(ElementType), AddressSpace)); } -LLVMTypeRef LLVMVectorType(LLVMTypeRef ElementType,unsigned ElementCount){ +LLVMTypeRef LLVMVectorType(LLVMTypeRef ElementType, unsigned ElementCount) { return wrap(VectorType::get(unwrap(ElementType), ElementCount)); } @@ -166,6 +165,10 @@ return unwrap(ArrayTy)->getNumElements(); } +unsigned LLVMGetPointerAddressSpace(LLVMTypeRef PointerTy) { + return unwrap(PointerTy)->getAddressSpace(); +} + unsigned LLVMGetVectorSize(LLVMTypeRef VectorTy) { return unwrap(VectorTy)->getNumElements(); } Modified: llvm/trunk/test/Bindings/Ocaml/vmcore.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bindings/Ocaml/vmcore.ml?rev=45096&r1=45095&r2=45096&view=diff ============================================================================== --- llvm/trunk/test/Bindings/Ocaml/vmcore.ml (original) +++ llvm/trunk/test/Bindings/Ocaml/vmcore.ml Mon Dec 17 10:08:32 2007 @@ -103,13 +103,24 @@ insist (i8_type == element_type ty); insist (Array_type == classify_type ty); - (* RUN: grep {Ty10.*float\*} < %t.ll - *) - group "pointer"; - let ty = pointer_type float_type in - insist (define_type_name "Ty10" ty m); - insist (float_type == element_type ty); - insist (Pointer_type == classify_type ty); + begin group "pointer"; + (* RUN: grep {UnqualPtrTy.*float\*} < %t.ll + *) + let ty = pointer_type float_type in + insist (define_type_name "UnqualPtrTy" ty m); + insist (float_type == element_type ty); + insist (0 == address_space ty); + insist (Pointer_type == classify_type ty) + end; + + begin group "qualified_pointer"; + (* RUN: grep {QualPtrTy.*i8.*3.*\*} < %t.ll + *) + let ty = qualified_pointer_type i8_type 3 in + insist (define_type_name "QualPtrTy" ty m); + insist (i8_type == element_type ty); + insist (3 == address_space ty) + end; (* RUN: grep {Ty11.*\<4 x i16\>} < %t.ll *) From gordonhenriksen at mac.com Mon Dec 17 10:09:28 2007 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Mon, 17 Dec 2007 16:09:28 -0000 Subject: [llvm-commits] [llvm] r45097 - /llvm/trunk/test/Bindings/Ocaml/vmcore.ml Message-ID: <200712171609.lBHG9Sdk008607@zion.cs.uiuc.edu> Author: gordon Date: Mon Dec 17 10:09:28 2007 New Revision: 45097 URL: http://llvm.org/viewvc/llvm-project?rev=45097&view=rev Log: Disabling a RUN line that's broken until addrspace roundtrips through llvm-as|llvm-dis. Modified: llvm/trunk/test/Bindings/Ocaml/vmcore.ml Modified: llvm/trunk/test/Bindings/Ocaml/vmcore.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bindings/Ocaml/vmcore.ml?rev=45097&r1=45096&r2=45097&view=diff ============================================================================== --- llvm/trunk/test/Bindings/Ocaml/vmcore.ml (original) +++ llvm/trunk/test/Bindings/Ocaml/vmcore.ml Mon Dec 17 10:09:28 2007 @@ -114,7 +114,7 @@ end; begin group "qualified_pointer"; - (* RUN: grep {QualPtrTy.*i8.*3.*\*} < %t.ll + (* XXX: grep {QualPtrTy.*i8.*3.*\*} < %t.ll *) let ty = qualified_pointer_type i8_type 3 in insist (define_type_name "QualPtrTy" ty m); From greened at obbligato.org Mon Dec 17 11:40:29 2007 From: greened at obbligato.org (David Greene) Date: Mon, 17 Dec 2007 17:40:29 -0000 Subject: [llvm-commits] [llvm] r45100 - /llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Message-ID: <200712171740.lBHHeTMZ012936@zion.cs.uiuc.edu> Author: greened Date: Mon Dec 17 11:40:29 2007 New Revision: 45100 URL: http://llvm.org/viewvc/llvm-project?rev=45100&view=rev Log: Get rid of annoying spaces. Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp?rev=45100&r1=45099&r2=45100&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Mon Dec 17 11:40:29 2007 @@ -636,7 +636,7 @@ BasicBlock *B = *DI++; if (L->contains(B)) continue; - + DF->removeFromFrontier(DFI, B); LoopDF.insert(B); } From greened at obbligato.org Mon Dec 17 11:42:04 2007 From: greened at obbligato.org (David Greene) Date: Mon, 17 Dec 2007 17:42:04 -0000 Subject: [llvm-commits] [llvm] r45101 - /llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp Message-ID: <200712171742.lBHHg43B013007@zion.cs.uiuc.edu> Author: greened Date: Mon Dec 17 11:42:03 2007 New Revision: 45101 URL: http://llvm.org/viewvc/llvm-project?rev=45101&view=rev Log: GLIBCXX_DEBUG fix. std::vector<>::end() is invalidated by erase. Modified: llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp Modified: llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp?rev=45101&r1=45100&r2=45101&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp Mon Dec 17 11:42:03 2007 @@ -248,7 +248,7 @@ // Merge case into clusters if (Cases.size()>=2) - for (CaseItr I=Cases.begin(), J=next(Cases.begin()), E=Cases.end(); J!=E; ) { + for (CaseItr I=Cases.begin(), J=next(Cases.begin()); J!=Cases.end(); ) { int64_t nextValue = cast(J->Low)->getSExtValue(); int64_t currentValue = cast(I->High)->getSExtValue(); BasicBlock* nextBB = J->BB; From dalej at apple.com Mon Dec 17 11:44:04 2007 From: dalej at apple.com (Dale Johannesen) Date: Mon, 17 Dec 2007 09:44:04 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r45054 - /llvm-gcc-4.2/trunk/gcc/testsuite/gcc.c-torture/compile/930411-1.c In-Reply-To: <8C0C40F5-E935-48D2-8774-67C7C78DE65F@apple.com> References: <200712150130.lBF1UWoS017082@zion.cs.uiuc.edu> <6E250CEF-134B-4621-B699-676E2732C5E2@apple.com> <739EC833-7359-4202-B565-6EBEFBDE0C34@apple.com> <8C0C40F5-E935-48D2-8774-67C7C78DE65F@apple.com> Message-ID: <33481545-6B37-4548-8CF9-740717C03B4E@apple.com> On Dec 16, 2007, at 2:02 PM, Chris Lattner wrote: > > On Dec 16, 2007, at 1:59 PM, Dale Johannesen wrote: > >>> I definitely agree, which is why I added it in the first place :). >>> The problem is that it isn't hooked up with any of the other >>> diagnostics machinery, so it isn't controllable and doesn't give >>> decent location info (for example). >>> >>> I don't know that it really provides a good user experience. In the >>> LTO case with debug info, we could do better. >> >> So what's your idea, detect it somewhere else? Where were you >> thinking? > > For now I think we just just disable the warning. I'd prefer to wait until the replacement is in place, if you're OK with that. > In the future, this could naturally be handled with Ted's work on > static analysis stuff. The nice thing about doing it at the source > level is that you can detect mismatches that are broken in more subtle > ways as well, such as int foo() vs long foo(). You also get good > diagnostics hooks and location info. > > -Chris > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From greened at obbligato.org Mon Dec 17 11:39:51 2007 From: greened at obbligato.org (David Greene) Date: Mon, 17 Dec 2007 17:39:51 -0000 Subject: [llvm-commits] [llvm] r45099 - /llvm/trunk/lib/Transforms/Scalar/DCE.cpp Message-ID: <200712171739.lBHHdpNw012894@zion.cs.uiuc.edu> Author: greened Date: Mon Dec 17 11:39:51 2007 New Revision: 45099 URL: http://llvm.org/viewvc/llvm-project?rev=45099&view=rev Log: Fix GLIBCXX_DEBUG errors. Erase invalidates std::vector iterators passed the erased element. Modified: llvm/trunk/lib/Transforms/Scalar/DCE.cpp Modified: llvm/trunk/lib/Transforms/Scalar/DCE.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/DCE.cpp?rev=45099&r1=45098&r2=45099&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/DCE.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/DCE.cpp Mon Dec 17 11:39:51 2007 @@ -109,11 +109,10 @@ I->eraseFromParent(); // Remove the instruction from the worklist if it still exists in it. - for (std::vector::iterator WI = WorkList.begin(), - E = WorkList.end(); WI != E; ++WI) + for (std::vector::iterator WI = WorkList.begin(); + WI != WorkList.end(); ++WI) if (*WI == I) { - WorkList.erase(WI); - --E; + WI = WorkList.erase(WI); --WI; } From clattner at apple.com Mon Dec 17 12:05:36 2007 From: clattner at apple.com (Chris Lattner) Date: Mon, 17 Dec 2007 10:05:36 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r45054 - /llvm-gcc-4.2/trunk/gcc/testsuite/gcc.c-torture/compile/930411-1.c In-Reply-To: <33481545-6B37-4548-8CF9-740717C03B4E@apple.com> References: <200712150130.lBF1UWoS017082@zion.cs.uiuc.edu> <6E250CEF-134B-4621-B699-676E2732C5E2@apple.com> <739EC833-7359-4202-B565-6EBEFBDE0C34@apple.com> <8C0C40F5-E935-48D2-8774-67C7C78DE65F@apple.com> <33481545-6B37-4548-8CF9-740717C03B4E@apple.com> Message-ID: <59C8103E-C3B0-4A50-A7A9-EFDADF505805@apple.com> >>>> I definitely agree, which is why I added it in the first place :). >>>> The problem is that it isn't hooked up with any of the other >>>> diagnostics machinery, so it isn't controllable and doesn't give >>>> decent location info (for example). >>>> >>>> I don't know that it really provides a good user experience. In >>>> the >>>> LTO case with debug info, we could do better. >>> >>> So what's your idea, detect it somewhere else? Where were you >>> thinking? >> >> For now I think we just just disable the warning. > > I'd prefer to wait until the replacement is in place, if you're OK > with that. I'm ok with that, but please reevaluate if it is causing chaos in the testsuite :) -Chris From baldrick at free.fr Mon Dec 17 12:08:19 2007 From: baldrick at free.fr (Duncan Sands) Date: Mon, 17 Dec 2007 18:08:19 -0000 Subject: [llvm-commits] [llvm] r45108 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Transforms/Utils/InlineFunction.cpp lib/VMCore/Verifier.cpp test/CodeGen/Generic/2007-12-17-InvokeAsm.ll test/Transforms/Inline/2007-04-15-InlineEH.ll Message-ID: <200712171808.lBHI8JA7014759@zion.cs.uiuc.edu> Author: baldrick Date: Mon Dec 17 12:08:19 2007 New Revision: 45108 URL: http://llvm.org/viewvc/llvm-project?rev=45108&view=rev Log: Make invokes of inline asm legal. Teach codegen how to lower them (with no attempt made to be efficient, since they should only occur for unoptimized code). Added: llvm/trunk/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp llvm/trunk/lib/VMCore/Verifier.cpp llvm/trunk/test/Transforms/Inline/2007-04-15-InlineEH.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=45108&r1=45107&r2=45108&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Dec 17 12:08:19 2007 @@ -597,7 +597,7 @@ void visitStore(StoreInst &I); void visitPHI(PHINode &I) { } // PHI nodes are handled specially. void visitCall(CallInst &I); - void visitInlineAsm(CallInst &I); + void visitInlineAsm(CallSite CS); const char *visitIntrinsicCall(CallInst &I, unsigned Intrinsic); void visitTargetIntrinsic(CallInst &I, unsigned Intrinsic); @@ -1449,11 +1449,14 @@ MachineBasicBlock *Return = FuncInfo.MBBMap[I.getSuccessor(0)]; MachineBasicBlock *LandingPad = FuncInfo.MBBMap[I.getSuccessor(1)]; - LowerCallTo(I, I.getCalledValue()->getType(), I.getParamAttrs(), - I.getCallingConv(), - false, - getValue(I.getOperand(0)), - 3, LandingPad); + if (isa(I.getCalledValue())) + visitInlineAsm(&I); + else + LowerCallTo(I, I.getCalledValue()->getType(), I.getParamAttrs(), + I.getCallingConv(), + false, + getValue(I.getOperand(0)), + 3, LandingPad); // If the value of the invoke is used outside of its defining block, make it // available as a virtual register. @@ -3044,7 +3047,7 @@ } } } else if (isa(I.getOperand(0))) { - visitInlineAsm(I); + visitInlineAsm(&I); return; } @@ -3425,8 +3428,8 @@ /// visitInlineAsm - Handle a call to an InlineAsm object. /// -void SelectionDAGLowering::visitInlineAsm(CallInst &I) { - InlineAsm *IA = cast(I.getOperand(0)); +void SelectionDAGLowering::visitInlineAsm(CallSite CS) { + InlineAsm *IA = cast(CS.getCalledValue()); /// ConstraintOperands - Information about all of the constraints. std::vector ConstraintOperands; @@ -3446,7 +3449,7 @@ // registers, because it will not know to avoid the earlyclobbered output reg. bool SawEarlyClobber = false; - unsigned OpNo = 1; // OpNo - The operand of the CallInst. + unsigned ArgNo = 0; // ArgNo - The argument of the CallInst. for (unsigned i = 0, e = ConstraintInfos.size(); i != e; ++i) { ConstraintOperands.push_back(AsmOperandInfo(ConstraintInfos[i])); AsmOperandInfo &OpInfo = ConstraintOperands.back(); @@ -3459,14 +3462,14 @@ if (!OpInfo.isIndirect) { // The return value of the call is this value. As such, there is no // corresponding argument. - assert(I.getType() != Type::VoidTy && "Bad inline asm!"); - OpVT = TLI.getValueType(I.getType()); + assert(CS.getType() != Type::VoidTy && "Bad inline asm!"); + OpVT = TLI.getValueType(CS.getType()); } else { - OpInfo.CallOperandVal = I.getOperand(OpNo++); + OpInfo.CallOperandVal = CS.getArgument(ArgNo++); } break; case InlineAsm::isInput: - OpInfo.CallOperandVal = I.getOperand(OpNo++); + OpInfo.CallOperandVal = CS.getArgument(ArgNo++); break; case InlineAsm::isClobber: // Nothing to do. @@ -3617,7 +3620,7 @@ // This is the result value of the call. assert(RetValRegs.Regs.empty() && "Cannot have multiple output constraints yet!"); - assert(I.getType() != Type::VoidTy && "Bad inline asm!"); + assert(CS.getType() != Type::VoidTy && "Bad inline asm!"); RetValRegs = OpInfo.AssignedRegs; } else { IndirectStoresToEmit.push_back(std::make_pair(OpInfo.AssignedRegs, @@ -3751,13 +3754,13 @@ // width/num elts. Make sure to convert it to the right type with // bit_convert. if (MVT::isVector(Val.getValueType())) { - const VectorType *VTy = cast(I.getType()); + const VectorType *VTy = cast(CS.getType()); MVT::ValueType DesiredVT = TLI.getValueType(VTy); Val = DAG.getNode(ISD::BIT_CONVERT, DesiredVT, Val); } - setValue(&I, Val); + setValue(CS.getInstruction(), Val); } std::vector > StoresToEmit; Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp?rev=45108&r1=45107&r2=45108&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Mon Dec 17 12:08:19 2007 @@ -69,9 +69,8 @@ if (!isa(I)) continue; CallInst *CI = cast(I); - // If this call cannot unwind or is an inline asm, don't - // convert it to an invoke. - if (CI->isNoUnwind() || isa(CI->getCalledValue())) + // If this call cannot unwind, don't convert it to an invoke. + if (CI->isNoUnwind()) continue; // Convert this function call into an invoke instruction. Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=45108&r1=45107&r2=45108&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Mon Dec 17 12:08:19 2007 @@ -1123,7 +1123,7 @@ "Instruction does not dominate all uses!", Op, &I); } } else if (isa(I.getOperand(i))) { - Assert1(i == 0 && isa(I), + Assert1(i == 0 && (isa(I) || isa(I)), "Cannot take the address of an inline asm!", &I); } } Added: llvm/trunk/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll?rev=45108&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll (added) +++ llvm/trunk/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll Mon Dec 17 12:08:19 2007 @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -enable-eh + +target triple = "i686-pc-linux-gnu" + +define fastcc void @bc__support__high_resolution_time__initialize_clock_rate() { +entry: + invoke void asm "rdtsc\0A\09movl %eax, $0\0A\09movl %edx, $1", "=*imr,=*imr,~{dirflag},~{fpsr},~{flags},~{dx},~{ax}"( i32* null, i32* null ) + to label %.noexc unwind label %cleanup144 + +.noexc: ; preds = %entry + ret void + +cleanup144: ; preds = %entry + unwind +} Modified: llvm/trunk/test/Transforms/Inline/2007-04-15-InlineEH.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/2007-04-15-InlineEH.ll?rev=45108&r1=45107&r2=45108&view=diff ============================================================================== --- llvm/trunk/test/Transforms/Inline/2007-04-15-InlineEH.ll (original) +++ llvm/trunk/test/Transforms/Inline/2007-04-15-InlineEH.ll Mon Dec 17 12:08:19 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | opt -inline -disable-output +; RUN: llvm-as < %s | opt -inline | llvm-dis | not grep {invoke void asm} ; PR1335 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" From sabre at nondot.org Mon Dec 17 12:58:23 2007 From: sabre at nondot.org (Chris Lattner) Date: Mon, 17 Dec 2007 18:58:23 -0000 Subject: [llvm-commits] [llvm] r45112 - /llvm/trunk/include/llvm/ADT/scoped_ptr.h Message-ID: <200712171858.lBHIwNPI017931@zion.cs.uiuc.edu> Author: lattner Date: Mon Dec 17 12:58:23 2007 New Revision: 45112 URL: http://llvm.org/viewvc/llvm-project?rev=45112&view=rev Log: cleanup this code, making it more "llvm-like". Add comments to reset indicating that it deletes its pointer. Add a new take() method, which can be used to get the pointer without it being deleted. Modified: llvm/trunk/include/llvm/ADT/scoped_ptr.h Modified: llvm/trunk/include/llvm/ADT/scoped_ptr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/scoped_ptr.h?rev=45112&r1=45111&r2=45112&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/scoped_ptr.h (original) +++ llvm/trunk/include/llvm/ADT/scoped_ptr.h Mon Dec 17 12:58:23 2007 @@ -23,105 +23,100 @@ // // http://www.boost.org/libs/smart_ptr/scoped_ptr.htm // - -#ifndef LLVM_SCOPED_PTR_HPP_INCLUDED -#define LLVM_SCOPED_PTR_HPP_INCLUDED +#ifndef LLVM_SCOPED_PTR_H_INCLUDED +#define LLVM_SCOPED_PTR_H_INCLUDED #include namespace llvm { // verify that types are complete for increased safety -template inline void checked_delete(T * x) { - // intentionally complex - simplification causes regressions - typedef char type_must_be_complete[ sizeof(T)? 1: -1 ]; - (void) sizeof(type_must_be_complete); - delete x; +template +inline void checked_delete(T * x) { + // intentionally complex - simplification causes warnings in some compilers. + typedef char type_must_be_complete[sizeof(T) ? 1 : -1]; + (void)sizeof(type_must_be_complete); + delete x; } -// scoped_ptr mimics a built-in pointer except that it guarantees deletion -// of the object pointed to, either on destruction of the scoped_ptr or via -// an explicit reset(). scoped_ptr is a simple solution for simple needs; -// use shared_ptr or std::auto_ptr if your needs are more complex. - -template class scoped_ptr // noncopyable -{ -private: - - T * ptr; - - scoped_ptr(scoped_ptr const &); - scoped_ptr & operator=(scoped_ptr const &); - - typedef scoped_ptr this_type; - +/// scoped_ptr mimics a built-in pointer except that it guarantees deletion +/// of the object pointed to, either on destruction of the scoped_ptr or via +/// an explicit reset(). scoped_ptr is a simple solution for simple needs; +/// use shared_ptr or std::auto_ptr if your needs are more complex. +template +class scoped_ptr {// noncopyable + T *ptr; + scoped_ptr(scoped_ptr const &); // DO NOT IMPLEMENT + scoped_ptr & operator=(scoped_ptr const &); // DO NOT IMPLEMENT + typedef scoped_ptr this_type; public: + typedef T element_type; - typedef T element_type; + explicit scoped_ptr(T * p = 0): ptr(p) {} // never throws - explicit scoped_ptr(T * p = 0): ptr(p) // never throws - { - } - - ~scoped_ptr() // never throws - { - llvm::checked_delete(ptr); - } - - void reset(T * p = 0) // never throws - { - assert( (p == 0 || p != ptr) && "scoped_ptr: self-reset error"); // catch self-reset errors - this_type(p).swap(*this); - } - - T & operator*() const // never throws - { - assert(ptr != 0 && "scoped_ptr: Trying to dereference a null pointeur"); - return *ptr; - } - - T * operator->() const // never throws - { - assert(ptr != 0 && "scoped_ptr: Trying to dereference a null pointeur"); - return ptr; - } - - T * get() const // never throws - { - return ptr; - } - - // implicit conversion to "bool" - typedef T * this_type::*unspecified_bool_type; - - operator unspecified_bool_type() const // never throws - { - return ptr == 0? 0: &this_type::ptr; - } - - bool operator! () const // never throws - { - return ptr == 0; - } - - void swap(scoped_ptr & b) // never throws - { - T * tmp = b.ptr; - b.ptr = ptr; - ptr = tmp; - } + ~scoped_ptr() { // never throws + llvm::checked_delete(ptr); + } + + /// reset - Change the current pointee to the specified pointer. Note that + /// calling this with any pointer (including a null pointer) deletes the + /// current pointer. + void reset(T *p = 0) { + // catch self-reset errors + assert((p == 0 || p != ptr) && "scoped_ptr: self-reset error"); + T *tmp = ptr; + ptr = p; + delete tmp; + } + + /// take - Reset the scoped pointer to null and return its pointer. This does + /// not delete the pointer before returning it. + T *take() { + T *P = ptr; + ptr = 0; + return P; + } + + T& operator*() const { + assert(ptr != 0 && "scoped_ptr: Trying to dereference a null pointer"); + return *ptr; + } + + T* operator->() const { + assert(ptr != 0 && "scoped_ptr: Trying to dereference a null pointer"); + return ptr; + } + + T* get() const { + return ptr; + } + + // implicit conversion to "bool" + typedef T * this_type::*unspecified_bool_type; + + operator unspecified_bool_type() const {// never throws + return ptr == 0? 0: &this_type::ptr; + } + + bool operator!() const { // never throws + return ptr == 0; + } + + void swap(scoped_ptr &b) {// never throws + T * tmp = b.ptr; + b.ptr = ptr; + ptr = tmp; + } }; -template inline void swap(scoped_ptr & a, scoped_ptr & b) // never throws -{ - a.swap(b); +template inline void swap(scoped_ptr &a, scoped_ptr &b) { + // never throws + a.swap(b); } // get_pointer(p) is a generic way to say p.get() - -template inline T * get_pointer(scoped_ptr const & p) -{ - return p.get(); +template inline T * get_pointer(scoped_ptr const &p) { + return p.get(); } } // namespace llvm From dpatel at apple.com Mon Dec 17 13:06:26 2007 From: dpatel at apple.com (Devang Patel) Date: Mon, 17 Dec 2007 19:06:26 -0000 Subject: [llvm-commits] [llvm] r45115 - /llvm/trunk/include/llvm/Support/LLVMBuilder.h Message-ID: <200712171906.lBHJ6Qnx018787@zion.cs.uiuc.edu> Author: dpatel Date: Mon Dec 17 13:06:26 2007 New Revision: 45115 URL: http://llvm.org/viewvc/llvm-project?rev=45115&view=rev Log: Add cast operators in LLVMFoldingBuilder. Patch by Richard Pennington. Modified: llvm/trunk/include/llvm/Support/LLVMBuilder.h Modified: llvm/trunk/include/llvm/Support/LLVMBuilder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/LLVMBuilder.h?rev=45115&r1=45114&r2=45115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/LLVMBuilder.h (original) +++ llvm/trunk/include/llvm/Support/LLVMBuilder.h Mon Dec 17 13:06:26 2007 @@ -536,6 +536,90 @@ return ConstantExpr::getAShr(LC, RC); return LLVMBuilder::CreateAShr(LHS, RHS, Name); } + + //===--------------------------------------------------------------------===// + // Instruction creation methods: Memory Instructions + //===--------------------------------------------------------------------===// + + template + Value *CreateGEP(Value *Ptr, InputIterator IdxBegin, + InputIterator IdxEnd, const char *Name = "") { + + if (Constant *PC = dyn_cast(Ptr)) { + // Every index must be constant. + InputIterator i; + for (i = IdxBegin; i < IdxEnd; ++i) + if (!dyn_cast(*i)) + break; + if (i == IdxEnd) + return ConstantExpr::getGetElementPtr(PC, &IdxBegin[0], IdxEnd - IdxBegin); + } + return LLVMBuilder::CreateGEP(Ptr, IdxBegin, IdxEnd, Name); + } + Value *CreateGEP(Value *Ptr, Value *Idx, const char *Name = "") { + if (Constant *PC = dyn_cast(Ptr)) + if (Constant *IC = dyn_cast(Idx)) + return ConstantExpr::getGetElementPtr(PC, &IC, 1); + return LLVMBuilder::CreateGEP(Ptr, Idx, Name); + } + + //===--------------------------------------------------------------------===// + // Instruction creation methods: Cast/Conversion Operators + //===--------------------------------------------------------------------===// + + Value *CreateTrunc(Value *V, const Type *DestTy, const char *Name = "") { + return CreateCast(Instruction::Trunc, V, DestTy, Name); + } + Value *CreateZExt(Value *V, const Type *DestTy, const char *Name = "") { + return CreateCast(Instruction::ZExt, V, DestTy, Name); + } + Value *CreateSExt(Value *V, const Type *DestTy, const char *Name = "") { + return CreateCast(Instruction::SExt, V, DestTy, Name); + } + Value *CreateFPToUI(Value *V, const Type *DestTy, const char *Name = ""){ + return CreateCast(Instruction::FPToUI, V, DestTy, Name); + } + Value *CreateFPToSI(Value *V, const Type *DestTy, const char *Name = ""){ + return CreateCast(Instruction::FPToSI, V, DestTy, Name); + } + Value *CreateUIToFP(Value *V, const Type *DestTy, const char *Name = ""){ + return CreateCast(Instruction::UIToFP, V, DestTy, Name); + } + Value *CreateSIToFP(Value *V, const Type *DestTy, const char *Name = ""){ + return CreateCast(Instruction::SIToFP, V, DestTy, Name); + } + Value *CreateFPTrunc(Value *V, const Type *DestTy, + const char *Name = "") { + return CreateCast(Instruction::FPTrunc, V, DestTy, Name); + } + Value *CreateFPExt(Value *V, const Type *DestTy, const char *Name = "") { + return CreateCast(Instruction::FPExt, V, DestTy, Name); + } + Value *CreatePtrToInt(Value *V, const Type *DestTy, + const char *Name = "") { + return CreateCast(Instruction::PtrToInt, V, DestTy, Name); + } + Value *CreateIntToPtr(Value *V, const Type *DestTy, + const char *Name = "") { + return CreateCast(Instruction::IntToPtr, V, DestTy, Name); + } + Value *CreateBitCast(Value *V, const Type *DestTy, + const char *Name = "") { + return CreateCast(Instruction::BitCast, V, DestTy, Name); + } + + Value *CreateCast(Instruction::CastOps Op, Value *V, const Type *DestTy, + const char *Name = "") { + if (Constant *VC = dyn_cast(V)) + return ConstantExpr::getCast(Op, VC, DestTy); + return LLVMBuilder::CreateCast(Op, V, DestTy, Name); + } + Value *CreateIntCast(Value *V, const Type *DestTy, bool isSigned, + const char *Name = "") { + if (Constant *VC = dyn_cast(V)) + return ConstantExpr::getIntegerCast(VC, DestTy, isSigned); + return LLVMBuilder::CreateIntCast(V, DestTy, isSigned, Name); + } //===--------------------------------------------------------------------===// // Instruction creation methods: Compare Instructions @@ -630,6 +714,45 @@ return ConstantExpr::getCompare(P, LC, RC); return LLVMBuilder::CreateFCmp(P, LHS, RHS, Name); } + + //===--------------------------------------------------------------------===// + // Instruction creation methods: Other Instructions + //===--------------------------------------------------------------------===// + + Value *CreateSelect(Value *C, Value *True, Value *False, + const char *Name = "") { + if (Constant *CC = dyn_cast(C)) + if (Constant *TC = dyn_cast(True)) + if (Constant *FC = dyn_cast(False)) + return ConstantExpr::getSelect(CC, TC, FC); + return LLVMBuilder::CreateSelect(C, True, False, Name); + } + + Value *CreateExtractElement(Value *Vec, Value *Idx, + const char *Name = "") { + if (Constant *VC = dyn_cast(Vec)) + if (Constant *IC = dyn_cast(Idx)) + return ConstantExpr::getExtractElement(VC, IC); + return LLVMBuilder::CreateExtractElement(Vec, Idx, Name); + } + + Value *CreateInsertElement(Value *Vec, Value *NewElt, Value *Idx, + const char *Name = "") { + if (Constant *VC = dyn_cast(Vec)) + if (Constant *NC = dyn_cast(NewElt)) + if (Constant *IC = dyn_cast(Idx)) + return ConstantExpr::getInsertElement(VC, NC, IC); + return LLVMBuilder::CreateInsertElement(Vec, NewElt, Idx, Name); + } + + Value *CreateShuffleVector(Value *V1, Value *V2, Value *Mask, + const char *Name = "") { + if (Constant *V1C = dyn_cast(V1)) + if (Constant *V2C = dyn_cast(V2)) + if (Constant *MC = dyn_cast(Mask)) + return ConstantExpr::getShuffleVector(V1C, V2C, MC); + return LLVMBuilder::CreateShuffleVector(V1, V2, Mask, Name); + } }; } From isanbard at gmail.com Mon Dec 17 13:40:34 2007 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 17 Dec 2007 11:40:34 -0800 Subject: [llvm-commits] [llvm] r45022 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/Target/Target.td utils/TableGen/CodeGenInstruction.h utils/TableGen/CodeGenTarget.cpp utils/TableGen/InstrInfoEmitter.cpp In-Reply-To: <8940D3A8-8C32-422E-A08A-BC0133789643@apple.com> References: <200712140148.lBE1mxh2005906@zion.cs.uiuc.edu> <8940D3A8-8C32-422E-A08A-BC0133789643@apple.com> Message-ID: <16e5fdf90712171140i45c63023nfe786e94f5e22ff5@mail.gmail.com> Hi Chris, > > +// M_MAY_HAVE_SIDE_EFFECTS - Set if this instruction *might* have > > side effects, > > +// e.g. load instructions. Note: This and M_NEVER_HAS_SIDE_EFFECTS > > are mutually > > +// exclusive. You can't set both! If neither flag is set, then the > > instruction > > +// *always* has side effects. > > +const unsigned M_MAY_HAVE_SIDE_EFFECTS = 1 << 18; > > + > > +// M_NEVER_HAS_SIDE_EFFECTS - Set if this instruction *never* has > > side effects, > > +// e.g., xor on X86. Note: This and M_MAY_HAVE_SIDE_EFFECTS are > > mutually > > +// exclusive. You can't set both! If neither flag is set, then the > > instruction > > +// *always* has side effects. > > +const unsigned M_NEVER_HAS_SIDE_EFFECTS = 1 << 19; > > As others have pointed out, we need to be much more clear about what > these mean. Specifically, I'd list "NEVER" first (it is easier to > explain). The pertinent point here is completely missing in the > comments: this flag is set on an instruction where there is a side > effect that is not captured by any *operands* of the instruction or > *other flags*. Instructions that are "isBranch" instructions but have > no other side effects should have M_NEVER_HAS_SIDE_EFFECTS set. This > flag should only be set on an instruction when *all instances* of an > instruction of that opcode have no side effects in this way. > I'm confused. If we set this for an instruction where there is a side effect that is not captured by any operands of the instr or other flags, then it has a side effect, right? Or do you mean that we *shouldn't* set it in this situation (which makes more sense to me)? -bw From evan.cheng at apple.com Mon Dec 17 14:46:17 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 17 Dec 2007 12:46:17 -0800 Subject: [llvm-commits] [llvm] r45022 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/Target/Target.td utils/TableGen/CodeGenInstruction.h utils/TableGen/CodeGenTarget.cpp utils/TableGen/InstrInfoEmitter.cpp In-Reply-To: <16e5fdf90712171140i45c63023nfe786e94f5e22ff5@mail.gmail.com> References: <200712140148.lBE1mxh2005906@zion.cs.uiuc.edu> <8940D3A8-8C32-422E-A08A-BC0133789643@apple.com> <16e5fdf90712171140i45c63023nfe786e94f5e22ff5@mail.gmail.com> Message-ID: On Dec 17, 2007, at 11:40 AM, Bill Wendling wrote: > Hi Chris, > >>> +// M_MAY_HAVE_SIDE_EFFECTS - Set if this instruction *might* have >>> side effects, >>> +// e.g. load instructions. Note: This and M_NEVER_HAS_SIDE_EFFECTS >>> are mutually >>> +// exclusive. You can't set both! If neither flag is set, then the >>> instruction >>> +// *always* has side effects. >>> +const unsigned M_MAY_HAVE_SIDE_EFFECTS = 1 << 18; >>> + >>> +// M_NEVER_HAS_SIDE_EFFECTS - Set if this instruction *never* has >>> side effects, >>> +// e.g., xor on X86. Note: This and M_MAY_HAVE_SIDE_EFFECTS are >>> mutually >>> +// exclusive. You can't set both! If neither flag is set, then the >>> instruction >>> +// *always* has side effects. >>> +const unsigned M_NEVER_HAS_SIDE_EFFECTS = 1 << 19; >> >> As others have pointed out, we need to be much more clear about what >> these mean. Specifically, I'd list "NEVER" first (it is easier to >> explain). The pertinent point here is completely missing in the >> comments: this flag is set on an instruction where there is a side >> effect that is not captured by any *operands* of the instruction or >> *other flags*. Instructions that are "isBranch" instructions but >> have >> no other side effects should have M_NEVER_HAS_SIDE_EFFECTS set. This >> flag should only be set on an instruction when *all instances* of an >> instruction of that opcode have no side effects in this way. >> > I'm confused. If we set this for an instruction where there is a side I am pretty sure he meant the opposite. If M_NEVER_HAS_SIDE_EFFECTS is set, that means the instruction would never have any side effects that are not captured in the operands. Evan > > effect that is not captured by any operands of the instr or other > flags, then it has a side effect, right? Or do you mean that we > *shouldn't* set it in this situation (which makes more sense to me)? > > -bw > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From criswell at uiuc.edu Mon Dec 17 14:50:02 2007 From: criswell at uiuc.edu (John Criswell) Date: Mon, 17 Dec 2007 20:50:02 -0000 Subject: [llvm-commits] [poolalloc] r45117 - in /poolalloc/trunk: include/poolalloc/PoolAllocate.h lib/PoolAllocate/PoolAllocate.cpp Message-ID: <200712172050.lBHKo2tp024146@zion.cs.uiuc.edu> Author: criswell Date: Mon Dec 17 14:50:01 2007 New Revision: 45117 URL: http://llvm.org/viewvc/llvm-project?rev=45117&view=rev Log: Add ID values to the pool allocation passes. Modify constructors accordingly. Modified: poolalloc/trunk/include/poolalloc/PoolAllocate.h poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Modified: poolalloc/trunk/include/poolalloc/PoolAllocate.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc/PoolAllocate.h?rev=45117&r1=45116&r2=45117&view=diff ============================================================================== --- poolalloc/trunk/include/poolalloc/PoolAllocate.h (original) +++ poolalloc/trunk/include/poolalloc/PoolAllocate.h Mon Dec 17 14:50:01 2007 @@ -148,11 +148,11 @@ public: static char ID; #ifdef SAFECODE - PoolAllocate(bool passAllArguments = true) - : ModulePass((intptr_t)&ID), PassAllArguments(passAllArguments) {} + PoolAllocate(bool passAllArguments = true, intptr_t IDp = (intptr_t) (&ID)) + : ModulePass((intptr_t)IDp), PassAllArguments(passAllArguments) {} #else - PoolAllocate(bool passAllArguments = false) - : ModulePass((intptr_t)&ID), PassAllArguments(passAllArguments) {} + PoolAllocate(bool passAllArguments = false, intptr_t IDp = (intptr_t) (&ID)) + : ModulePass((intptr_t)IDp), PassAllArguments(passAllArguments) {} #endif bool runOnModule(Module &M); @@ -283,7 +283,8 @@ /// pass, which requires a pool descriptor to be available for a pool if any /// load or store to that pool is performed. struct PoolAllocatePassAllPools : public PoolAllocate { - PoolAllocatePassAllPools() : PoolAllocate(true) {} + static char ID; + PoolAllocatePassAllPools() : PoolAllocate(true, (intptr_t) &ID) {} }; } Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp?rev=45117&r1=45116&r2=45117&view=diff ============================================================================== --- poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp (original) +++ poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Mon Dec 17 14:50:01 2007 @@ -43,6 +43,9 @@ using namespace CUA; #endif +char PoolAllocate::ID = 0; +char PoolAllocatePassAllPools::ID = 0; + const Type *PoolAllocate::PoolDescPtrTy = 0; #if 0 From isanbard at gmail.com Mon Dec 17 14:52:08 2007 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 17 Dec 2007 12:52:08 -0800 Subject: [llvm-commits] [llvm] r45022 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/Target/Target.td utils/TableGen/CodeGenInstruction.h utils/TableGen/CodeGenTarget.cpp utils/TableGen/InstrInfoEmitter.cpp In-Reply-To: References: <200712140148.lBE1mxh2005906@zion.cs.uiuc.edu> <8940D3A8-8C32-422E-A08A-BC0133789643@apple.com> <16e5fdf90712171140i45c63023nfe786e94f5e22ff5@mail.gmail.com> Message-ID: <16e5fdf90712171252m72e6c6fcwe2498bb185577fb0@mail.gmail.com> On Dec 17, 2007 12:46 PM, Evan Cheng wrote: > On Dec 17, 2007, at 11:40 AM, Bill Wendling wrote: > >> As others have pointed out, we need to be much more clear about what > >> these mean. Specifically, I'd list "NEVER" first (it is easier to > >> explain). The pertinent point here is completely missing in the > >> comments: this flag is set on an instruction where there is a side > >> effect that is not captured by any *operands* of the instruction or > >> *other flags*. Instructions that are "isBranch" instructions but > >> have > >> no other side effects should have M_NEVER_HAS_SIDE_EFFECTS set. This > >> flag should only be set on an instruction when *all instances* of an > >> instruction of that opcode have no side effects in this way. > >> > > I'm confused. If we set this for an instruction where there is a side > > I am pretty sure he meant the opposite. If M_NEVER_HAS_SIDE_EFFECTS is > set, that means the instruction would never have any side effects that > are not captured in the operands. > Okay. That makes more sense to me. I thought that there might have been a "not" or something missing. :-) -bw From isanbard at gmail.com Mon Dec 17 15:02:07 2007 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 17 Dec 2007 21:02:07 -0000 Subject: [llvm-commits] [llvm] r45120 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/Target/Target.td Message-ID: <200712172102.lBHL276u024863@zion.cs.uiuc.edu> Author: void Date: Mon Dec 17 15:02:07 2007 New Revision: 45120 URL: http://llvm.org/viewvc/llvm-project?rev=45120&view=rev Log: As per feedback, revised comments to (hopefully) make the different side effect flags clearer. Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h llvm/trunk/lib/Target/Target.td Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=45120&r1=45119&r2=45120&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Dec 17 15:02:07 2007 @@ -91,17 +91,23 @@ // ARM instructions which can set condition code if 's' bit is set. const unsigned M_HAS_OPTIONAL_DEF = 1 << 17; -// M_MAY_HAVE_SIDE_EFFECTS - Set if this instruction *might* have side effects, -// e.g. load instructions. Note: This and M_NEVER_HAS_SIDE_EFFECTS are mutually -// exclusive. You can't set both! If neither flag is set, then the instruction -// *always* has side effects. -const unsigned M_MAY_HAVE_SIDE_EFFECTS = 1 << 18; - -// M_NEVER_HAS_SIDE_EFFECTS - Set if this instruction *never* has side effects, -// e.g., xor on X86. Note: This and M_MAY_HAVE_SIDE_EFFECTS are mutually -// exclusive. You can't set both! If neither flag is set, then the instruction -// *always* has side effects. -const unsigned M_NEVER_HAS_SIDE_EFFECTS = 1 << 19; +// M_NEVER_HAS_SIDE_EFFECTS - Set if this instruction has no side effects that +// are not captured by any operands of the instruction or other flags, and when +// *all* instances of the instruction of that opcode have no side effects. +// +// Note: This and M_MAY_HAVE_SIDE_EFFECTS are mutually exclusive. You can't set +// both! If neither flag is set, then the instruction *always* has side effects. +const unsigned M_NEVER_HAS_SIDE_EFFECTS = 1 << 18; + +// M_MAY_HAVE_SIDE_EFFECTS - Set if some instances of this instruction can have +// side effects. The virtual method "isReallySideEffectFree" is called to +// determine this. Load instructions are an example of where this is useful. In +// general, loads always have side effects. However, loads from constant pools +// don't. We let the specific back end make this determination. +// +// Note: This and M_NEVER_HAS_SIDE_EFFECTS are mutually exclusive. You can't set +// both! If neither flag is set, then the instruction *always* has side effects. +const unsigned M_MAY_HAVE_SIDE_EFFECTS = 1 << 19; // Machine operand flags // M_LOOK_UP_PTR_REG_CLASS - Set if this operand is a pointer value and it @@ -321,6 +327,15 @@ return true; } + /// isReallySideEffectFree - If the M_MAY_HAVE_SIDE_EFFECTS flag is set, this + /// method is called to determine if the specific instance of this + /// instructions has side effects. This is useful in cases of instructions, + /// like loads, which generally always have side effects. A load from a + /// constant pool doesn't have side effects, though. So we need to + /// differentiate it from the general case. + virtual bool isReallySideEffectFree(MachineInstr *MI) const { + return false; + } public: /// getOperandConstraint - Returns the value of the specific constraint if /// it is set. Returns -1 if it is not set. Modified: llvm/trunk/lib/Target/Target.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Target.td?rev=45120&r1=45119&r2=45120&view=diff ============================================================================== --- llvm/trunk/lib/Target/Target.td (original) +++ llvm/trunk/lib/Target/Target.td Mon Dec 17 15:02:07 2007 @@ -205,9 +205,18 @@ bit isNotDuplicable = 0; // Is it unsafe to duplicate this instruction? // Side effect flags - If neither of these flags is set, then the instruction - // *always* has side effects. Otherwise, it's one or the other. - bit mayHaveSideEffects = 0; // This instruction *may* have side effects. - bit neverHasSideEffects = 0; // This instruction never has side effects. + // *always* has side effects. When set, the flags have these meanings: + // + // neverHasSideEffects - The instruction has no side effects that are not + // captured by any operands of the instruction or other flags, and when + // *all* instances of the instruction of that opcode have no side effects. + // mayHaveSideEffects - Some instances of the instruction can have side + // effects. The virtual method "isReallySideEffectFree" is called to + // determine this. Load instructions are an example of where this is + // useful. In general, loads always have side effects. However, loads from + // constant pools don't. Individual back ends make this determination. + bit neverHasSideEffects = 0; + bit mayHaveSideEffects = 0; InstrItinClass Itinerary = NoItinerary;// Execution steps used for scheduling. From isanbard at gmail.com Mon Dec 17 15:14:45 2007 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 17 Dec 2007 21:14:45 -0000 Subject: [llvm-commits] [llvm] r45123 - /llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj Message-ID: <200712172114.lBHLEjgr025766@zion.cs.uiuc.edu> Author: void Date: Mon Dec 17 15:14:45 2007 New Revision: 45123 URL: http://llvm.org/viewvc/llvm-project?rev=45123&view=rev Log: Add MachineLICM.cpp Modified: llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj Modified: llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj?rev=45123&r1=45122&r2=45123&view=diff ============================================================================== --- llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj (original) +++ llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj Mon Dec 17 15:14:45 2007 @@ -75,6 +75,7 @@ 35E98A830CBC2ED300C5CDC1 /* DenseSet.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = DenseSet.h; sourceTree = ""; }; 35E98A840CBC2ED300C5CDC1 /* ImmutableMap.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ImmutableMap.h; sourceTree = ""; }; 35E98A850CBC2ED300C5CDC1 /* ImmutableSet.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ImmutableSet.h; sourceTree = ""; }; + 754221420D171DFC00DDB61B /* MachineLICM.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = MachineLICM.cpp; sourceTree = ""; }; 84115FFE0B66D87400E1293E /* TargetMachOWriterInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = TargetMachOWriterInfo.cpp; sourceTree = ""; }; 84115FFF0B66D89B00E1293E /* PPCMachOWriterInfo.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = PPCMachOWriterInfo.cpp; sourceTree = ""; }; 841160000B66D8AC00E1293E /* PPCMachOWriterInfo.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = PPCMachOWriterInfo.h; sourceTree = ""; }; @@ -1520,6 +1521,7 @@ DE66ED3E08ABEC2A00323D32 /* lib/CodeGen */ = { isa = PBXGroup; children = ( + 754221420D171DFC00DDB61B /* MachineLICM.cpp */, 9FE450AB0C77AB6100C4FEA4 /* README.txt */, DE66ED8308ABEC2B00323D32 /* SelectionDAG */, DE66ED3F08ABEC2A00323D32 /* AsmPrinter.cpp */, From isanbard at gmail.com Mon Dec 17 15:53:30 2007 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 17 Dec 2007 21:53:30 -0000 Subject: [llvm-commits] [llvm] r45126 - /llvm/trunk/include/llvm/Target/TargetInstrInfo.h Message-ID: <200712172153.lBHLrVwg028230@zion.cs.uiuc.edu> Author: void Date: Mon Dec 17 15:53:30 2007 New Revision: 45126 URL: http://llvm.org/viewvc/llvm-project?rev=45126&view=rev Log: Add "hasSideEffects" method to MachineInstrInfo class. Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=45126&r1=45125&r2=45126&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Dec 17 15:53:30 2007 @@ -314,6 +314,15 @@ isReallyTriviallyReMaterializable(MI); } + /// hasSideEffects - Returns true if the instruction has side effects that are + /// not captured by any operands of the instruction or other flags. + bool hasSideEffects(MachineInstr *MI) const { + const TargetInstrDescriptor *TID = MI->getInstrDescriptor(); + if (!(TID->Flags & M_NEVER_HAS_SIDE_EFFECTS || + TID->Flags & M_MAY_HAVE_SIDE_EFFECTS)) return true; + if (TID->Flags & M_NEVER_HAS_SIDE_EFFECTS) return false; + return !isReallySideEffectFree(MI); // May have side effects + } protected: /// isReallyTriviallyReMaterializable - For instructions with opcodes for /// which the M_REMATERIALIZABLE flag is set, this function tests whether the @@ -329,7 +338,7 @@ /// isReallySideEffectFree - If the M_MAY_HAVE_SIDE_EFFECTS flag is set, this /// method is called to determine if the specific instance of this - /// instructions has side effects. This is useful in cases of instructions, + /// instruction has side effects. This is useful in cases of instructions, /// like loads, which generally always have side effects. A load from a /// constant pool doesn't have side effects, though. So we need to /// differentiate it from the general case. From isanbard at gmail.com Mon Dec 17 15:54:23 2007 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 17 Dec 2007 13:54:23 -0800 Subject: [llvm-commits] [llvm] r45126 - /llvm/trunk/include/llvm/Target/TargetInstrInfo.h In-Reply-To: <200712172153.lBHLrVwg028230@zion.cs.uiuc.edu> References: <200712172153.lBHLrVwg028230@zion.cs.uiuc.edu> Message-ID: <16e5fdf90712171354t9891051xb7928ee40b602139@mail.gmail.com> On Dec 17, 2007 1:53 PM, Bill Wendling wrote: > Author: void > Date: Mon Dec 17 15:53:30 2007 > New Revision: 45126 > > URL: http://llvm.org/viewvc/llvm-project?rev=45126&view=rev > Log: > Add "hasSideEffects" method to MachineInstrInfo class. > s/MachineInstrInfo/TargetInstrInfo/ -bw From dalej at apple.com Mon Dec 17 16:09:29 2007 From: dalej at apple.com (Dale Johannesen) Date: Mon, 17 Dec 2007 22:09:29 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r45127 - /llvm-gcc-4.2/trunk/gcc/config/darwin.h Message-ID: <200712172209.lBHM9TGo028949@zion.cs.uiuc.edu> Author: johannes Date: Mon Dec 17 16:09:28 2007 New Revision: 45127 URL: http://llvm.org/viewvc/llvm-project?rev=45127&view=rev Log: Make -O -g work. Modified: llvm-gcc-4.2/trunk/gcc/config/darwin.h Modified: llvm-gcc-4.2/trunk/gcc/config/darwin.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/darwin.h?rev=45127&r1=45126&r2=45127&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/darwin.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/darwin.h Mon Dec 17 16:09:28 2007 @@ -317,7 +317,7 @@ "/* APPLE LOCAL ARM 5342595 */"\ "/* LLVM LOCAL do not use dsymutil with -O1 or higher */"\ %{.c|.cc|.C|.cpp|.cp|.c++|.cxx|.CPP|.m|.mm: \ - %{!O1: %{!O2: %{!O3: %{!O4: %{!Os: %(darwin_dsymutil) }}}}}}}}}}}}}" + %{!O: %{!O1: %{!O2: %{!O3: %{!O4: %{!Os: %(darwin_dsymutil) }}}}}}}}}}}}}}" /* APPLE LOCAL end mainline */ #ifdef TARGET_SYSTEM_ROOT From isanbard at gmail.com Mon Dec 17 16:17:14 2007 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 17 Dec 2007 22:17:14 -0000 Subject: [llvm-commits] [llvm] r45128 - /llvm/trunk/lib/Target/X86/X86InstrFPStack.td Message-ID: <200712172217.lBHMHEt5029344@zion.cs.uiuc.edu> Author: void Date: Mon Dec 17 16:17:14 2007 New Revision: 45128 URL: http://llvm.org/viewvc/llvm-project?rev=45128&view=rev Log: LD_Fp64m should have "isRematerializable" set. Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFPStack.td?rev=45128&r1=45127&r2=45128&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrFPStack.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrFPStack.td Mon Dec 17 16:17:14 2007 @@ -349,7 +349,8 @@ let isLoad = 1 in { def LD_Fp32m : FpIf32<(outs RFP32:$dst), (ins f32mem:$src), ZeroArgFP, [(set RFP32:$dst, (loadf32 addr:$src))]>; -def LD_Fp64m : FpIf64<(outs RFP64:$dst), (ins f64mem:$src), ZeroArgFP, +let isReMaterializable = 1 in + def LD_Fp64m : FpIf64<(outs RFP64:$dst), (ins f64mem:$src), ZeroArgFP, [(set RFP64:$dst, (loadf64 addr:$src))]>; def LD_Fp80m : FpI_<(outs RFP80:$dst), (ins f80mem:$src), ZeroArgFP, [(set RFP80:$dst, (loadf80 addr:$src))]>; From kremenek at apple.com Mon Dec 17 16:25:13 2007 From: kremenek at apple.com (Ted Kremenek) Date: Mon, 17 Dec 2007 22:25:13 -0000 Subject: [llvm-commits] [llvm] r45129 - in /llvm/trunk: include/llvm/Bitcode/Deserialize.h lib/Bitcode/Reader/Deserialize.cpp Message-ID: <200712172225.lBHMPDV0029736@zion.cs.uiuc.edu> Author: kremenek Date: Mon Dec 17 16:25:12 2007 New Revision: 45129 URL: http://llvm.org/viewvc/llvm-project?rev=45129&view=rev Log: Modified Deserializer::ReadCStr to allow C-strings to be read into a std::vector starting from any index in the vector. Modified: llvm/trunk/include/llvm/Bitcode/Deserialize.h llvm/trunk/lib/Bitcode/Reader/Deserialize.cpp Modified: llvm/trunk/include/llvm/Bitcode/Deserialize.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Bitcode/Deserialize.h?rev=45129&r1=45128&r2=45129&view=diff ============================================================================== --- llvm/trunk/include/llvm/Bitcode/Deserialize.h (original) +++ llvm/trunk/include/llvm/Bitcode/Deserialize.h Mon Dec 17 16:25:12 2007 @@ -156,7 +156,7 @@ } char* ReadCStr(char* cstr = NULL, unsigned MaxLen=0, bool isNullTerm=true); - void ReadCStr(std::vector& buff, bool isNullTerm=false); + void ReadCStr(std::vector& buff, bool isNullTerm=false, unsigned Idx=0); template inline T* ReadOwnedPtr(bool AutoRegister = true) { Modified: llvm/trunk/lib/Bitcode/Reader/Deserialize.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/Deserialize.cpp?rev=45129&r1=45128&r2=45129&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/Deserialize.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/Deserialize.cpp Mon Dec 17 16:25:12 2007 @@ -329,11 +329,18 @@ return cstr; } -void Deserializer::ReadCStr(std::vector& buff, bool isNullTerm) { +void Deserializer::ReadCStr(std::vector& buff, bool isNullTerm, + unsigned Idx) { + unsigned len = ReadInt(); - buff.clear(); - buff.reserve(len); + // If Idx is beyond the current before size, reduce Idx to refer to the + // element after the last element. + if (Idx > buff.size()) + Idx = buff.size(); + + buff.reserve(len+Idx); + buff.resize(Idx); for (unsigned i = 0; i < len; ++i) buff.push_back((char) ReadInt()); From scottm at aero.org Mon Dec 17 16:32:34 2007 From: scottm at aero.org (Scott Michel) Date: Mon, 17 Dec 2007 22:32:34 -0000 Subject: [llvm-commits] [llvm] r45130 - in /llvm/trunk: lib/Target/CellSPU/SPUISelDAGToDAG.cpp lib/Target/CellSPU/SPUISelLowering.cpp lib/Target/CellSPU/SPUInstrInfo.cpp lib/Target/CellSPU/SPUInstrInfo.td lib/Target/CellSPU/SPUOperands.td lib/Target/CellSPU/SPURegisterInfo.cpp lib/Target/CellSPU/SPURegisterInfo.td test/CodeGen/CellSPU/and_ops.ll test/CodeGen/CellSPU/nand.ll Message-ID: <200712172232.lBHMWZQY030095@zion.cs.uiuc.edu> Author: pingbak Date: Mon Dec 17 16:32:34 2007 New Revision: 45130 URL: http://llvm.org/viewvc/llvm-project?rev=45130&view=rev Log: - Restore some i8 functionality in CellSPU - New test case: nand.ll Added: llvm/trunk/test/CodeGen/CellSPU/nand.ll Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td llvm/trunk/lib/Target/CellSPU/SPUOperands.td llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.td llvm/trunk/test/CodeGen/CellSPU/and_ops.ll Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp?rev=45130&r1=45129&r2=45130&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Mon Dec 17 16:32:34 2007 @@ -63,6 +63,13 @@ } #endif + //! ConstantSDNode predicate for i32 unsigned 10-bit immediate values + bool + isI32IntU10Immediate(ConstantSDNode *CN) + { + return isU10Constant((int) CN->getValue()); + } + //! ConstantSDNode predicate for i16 sign-extended, 10-bit immediate values bool isI16IntS10Immediate(ConstantSDNode *CN) Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=45130&r1=45129&r2=45130&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Mon Dec 17 16:32:34 2007 @@ -119,11 +119,13 @@ // Set up the SPU's register classes: // NOTE: i8 register class is not registered because we cannot determine when // we need to zero or sign extend for custom-lowered loads and stores. - addRegisterClass(MVT::i16, SPU::R16CRegisterClass); - addRegisterClass(MVT::i32, SPU::R32CRegisterClass); - addRegisterClass(MVT::i64, SPU::R64CRegisterClass); - addRegisterClass(MVT::f32, SPU::R32FPRegisterClass); - addRegisterClass(MVT::f64, SPU::R64FPRegisterClass); + // NOTE: Ignore the previous note. For now. :-) + addRegisterClass(MVT::i8, SPU::R8CRegisterClass); + addRegisterClass(MVT::i16, SPU::R16CRegisterClass); + addRegisterClass(MVT::i32, SPU::R32CRegisterClass); + addRegisterClass(MVT::i64, SPU::R64CRegisterClass); + addRegisterClass(MVT::f32, SPU::R32FPRegisterClass); + addRegisterClass(MVT::f64, SPU::R64FPRegisterClass); addRegisterClass(MVT::i128, SPU::GPRCRegisterClass); // SPU has no sign or zero extended loads for i1, i8, i16: @@ -925,7 +927,7 @@ } case MVT::i8: if (!isVarArg && ArgRegIdx < NumArgRegs) { - unsigned VReg = RegMap->createVirtualRegister(&SPU::R16CRegClass); + unsigned VReg = RegMap->createVirtualRegister(&SPU::R8CRegClass); MF.addLiveIn(ArgRegs[ArgRegIdx], VReg); ArgVal = DAG.getCopyFromReg(Root, VReg, MVT::i8); ++ArgRegIdx; Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp?rev=45130&r1=45129&r2=45130&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp Mon Dec 17 16:32:34 2007 @@ -54,11 +54,11 @@ case SPU::ORIr64: case SPU::ORHIv8i16: case SPU::ORHIr16: - // case SPU::ORHI1To2: + case SPU::ORHI1To2: case SPU::ORBIv16i8: - //case SPU::ORBIr8: + case SPU::ORBIr8: case SPU::ORI2To4: - // case SPU::ORI1To4: + case SPU::ORI1To4: case SPU::AHIvec: case SPU::AHIr16: case SPU::AIvec: Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td?rev=45130&r1=45129&r2=45130&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td (original) +++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td Mon Dec 17 16:32:34 2007 @@ -111,6 +111,11 @@ "lqd\t$rT, $src", LoadStore, [(set R16C:$rT, (load dform_addr:$src))]>; + def LQDr8: + RI10Form<0b00101100, (outs R8C:$rT), (ins memri10:$src), + "lqd\t$rT, $src", LoadStore, + [(set R8C:$rT, (load dform_addr:$src))]>; + def LQAv16i8: RI16Form<0b100001100, (outs VECREG:$rT), (ins addr256k:$src), "lqa\t$rT, $src", LoadStore, @@ -171,6 +176,11 @@ "lqa\t$rT, $src", LoadStore, [(set R16C:$rT, (load aform_addr:$src))]>; + def LQAr8: + RI16Form<0b100001100, (outs R8C:$rT), (ins addr256k:$src), + "lqa\t$rT, $src", LoadStore, + [(set R8C:$rT, (load aform_addr:$src))]>; + def LQXv16i8: RRForm<0b00100011100, (outs VECREG:$rT), (ins memrr:$src), "lqx\t$rT, $src", LoadStore, @@ -231,14 +241,17 @@ "lqx\t$rT, $src", LoadStore, [(set R16C:$rT, (load xform_addr:$src))]>; + def LQXr8: + RRForm<0b00100011100, (outs R8C:$rT), (ins memrr:$src), + "lqx\t$rT, $src", LoadStore, + [(set R8C:$rT, (load xform_addr:$src))]>; + /* Load quadword, PC relative: Not much use at this point in time. Might be of use later for relocatable code. def LQR : RI16Form<0b111001100, (outs VECREG:$rT), (ins s16imm:$disp), "lqr\t$rT, $disp", LoadStore, [(set VECREG:$rT, (load iaddr:$disp))]>; */ - - // Catch-all for unaligned loads: } //===----------------------------------------------------------------------===// @@ -295,6 +308,10 @@ "stqd\t$rT, $src", LoadStore, [(store R16C:$rT, dform_addr:$src)]>; + def STQDr8 : RI10Form<0b00100100, (outs), (ins R8C:$rT, memri10:$src), + "stqd\t$rT, $src", LoadStore, + [(store R8C:$rT, dform_addr:$src)]>; + def STQAv16i8 : RI10Form<0b00100100, (outs), (ins VECREG:$rT, addr256k:$src), "stqa\t$rT, $src", LoadStore, [(store (v16i8 VECREG:$rT), aform_addr:$src)]>; @@ -340,6 +357,14 @@ "stqa\t$rT, $src", LoadStore, [(store R64FP:$rT, aform_addr:$src)]>; + def STQAr16 : RI10Form<0b00100100, (outs), (ins R16C:$rT, addr256k:$src), + "stqa\t$rT, $src", LoadStore, + [(store R16C:$rT, aform_addr:$src)]>; + + def STQAr8 : RI10Form<0b00100100, (outs), (ins R8C:$rT, addr256k:$src), + "stqa\t$rT, $src", LoadStore, + [(store R8C:$rT, aform_addr:$src)]>; + def STQXv16i8 : RI10Form<0b00100100, (outs), (ins VECREG:$rT, memrr:$src), "stqx\t$rT, $src", LoadStore, [(store (v16i8 VECREG:$rT), xform_addr:$src)]>; @@ -368,26 +393,36 @@ "stqx\t$rT, $src", LoadStore, [(store GPRC:$rT, xform_addr:$src)]>; - def STQXr64 : RI10Form<0b00100100, (outs), (ins R64C:$rT, memrr:$src), + def STQXr64: + RI10Form<0b00100100, (outs), (ins R64C:$rT, memrr:$src), "stqx\t$rT, $src", LoadStore, [(store R64C:$rT, xform_addr:$src)]>; - def STQXr32 : RI10Form<0b00100100, (outs), (ins R32C:$rT, memrr:$src), + def STQXr32: + RI10Form<0b00100100, (outs), (ins R32C:$rT, memrr:$src), "stqx\t$rT, $src", LoadStore, [(store R32C:$rT, xform_addr:$src)]>; // Floating Point - def STQXf32 : RI10Form<0b00100100, (outs), (ins R32FP:$rT, memrr:$src), + def STQXf32: + RI10Form<0b00100100, (outs), (ins R32FP:$rT, memrr:$src), "stqx\t$rT, $src", LoadStore, [(store R32FP:$rT, xform_addr:$src)]>; - def STQXf64 : RI10Form<0b00100100, (outs), (ins R64FP:$rT, memrr:$src), + def STQXf64: + RI10Form<0b00100100, (outs), (ins R64FP:$rT, memrr:$src), "stqx\t$rT, $src", LoadStore, [(store R64FP:$rT, xform_addr:$src)]>; - def STQXr16 : RI10Form<0b00100100, (outs), (ins R16C:$rT, memrr:$src), + def STQXr16: + RI10Form<0b00100100, (outs), (ins R16C:$rT, memrr:$src), "stqx\t$rT, $src", LoadStore, [(store R16C:$rT, xform_addr:$src)]>; + + def STQXr8: + RI10Form<0b00100100, (outs), (ins R8C:$rT, memrr:$src), + "stqx\t$rT, $src", LoadStore, + [(store R8C:$rT, xform_addr:$src)]>; /* Store quadword, PC relative: Not much use at this point in time. Might be useful for relocatable code. @@ -448,6 +483,13 @@ "ilh\t$rT, $val", ImmLoad, [(set R16C:$rT, immSExt16:$val)]>; +// Cell SPU doesn't have a native 8-bit immediate load, but ILH works ("with +// the right constant") +def ILHr8: + RI16Form<0b110000010, (outs R8C:$rT), (ins s16imm_i8:$val), + "ilh\t$rT, $val", ImmLoad, + [(set R8C:$rT, immSExt8:$val)]>; + // IL does sign extension! def ILr64: RI16Form<0b100000010, (outs R64C:$rT), (ins s16imm_i64:$val), @@ -626,25 +668,32 @@ "a\t$rT, $rA, $rB", IntegerOp, [(set R32C:$rT, (add R32C:$rA, R32C:$rB))]>; +def Ar8: + RRForm<0b00000011000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), + "a\t$rT, $rA, $rB", IntegerOp, + [(set R8C:$rT, (add R8C:$rA, R8C:$rB))]>; + def AIvec: RI10Form<0b00111000, (outs VECREG:$rT), (ins VECREG:$rA, s10imm:$val), "ai\t$rT, $rA, $val", IntegerOp, [(set (v4i32 VECREG:$rT), (add (v4i32 VECREG:$rA), v4i32SExt10Imm:$val))]>; -def AIr32 : RI10Form<0b00111000, (outs R32C:$rT), - (ins R32C:$rA, s10imm_i32:$val), - "ai\t$rT, $rA, $val", IntegerOp, - [(set R32C:$rT, (add R32C:$rA, i32ImmSExt10:$val))]>; - -def SFHvec : RRForm<0b00010010000, (outs VECREG:$rT), - (ins VECREG:$rA, VECREG:$rB), - "sfh\t$rT, $rA, $rB", IntegerOp, - [(set (v8i16 VECREG:$rT), (sub (v8i16 VECREG:$rA), (v8i16 VECREG:$rB)))]>; - -def SFHr16 : RRForm<0b00010010000, (outs R16C:$rT), (ins R16C:$rA, R16C:$rB), - "sfh\t$rT, $rA, $rB", IntegerOp, - [(set R16C:$rT, (sub R16C:$rA, R16C:$rB))]>; +def AIr32: + RI10Form<0b00111000, (outs R32C:$rT), (ins R32C:$rA, s10imm_i32:$val), + "ai\t$rT, $rA, $val", IntegerOp, + [(set R32C:$rT, (add R32C:$rA, i32ImmSExt10:$val))]>; + +def SFHvec: + RRForm<0b00010010000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), + "sfh\t$rT, $rA, $rB", IntegerOp, + [(set (v8i16 VECREG:$rT), (sub (v8i16 VECREG:$rA), + (v8i16 VECREG:$rB)))]>; + +def SFHr16: + RRForm<0b00010010000, (outs R16C:$rT), (ins R16C:$rA, R16C:$rB), + "sfh\t$rT, $rA, $rB", IntegerOp, + [(set R16C:$rT, (sub R16C:$rA, R16C:$rB))]>; def SFHIvec: RI10Form<0b10110000, (outs VECREG:$rT), (ins VECREG:$rA, s10imm:$val), @@ -977,6 +1026,11 @@ "xsbh\t$rDst, $rSrc", IntegerOp, [(set R16C:$rDst, (sext_inreg R16C:$rSrc, i8))]>; +def XSBHr8: + RRForm_1<0b01101101010, (outs R16C:$rDst), (ins R8C:$rSrc), + "xsbh\t$rDst, $rSrc", IntegerOp, + [(set R16C:$rDst, (sext R8C:$rSrc))]>; + // 32-bit form for XSBH: used to sign extend 8-bit quantities to 16-bit // quantities to 32-bit quantities via a 32-bit register (see the sext 8->32 // pattern below). Intentionally doesn't match a pattern because we want the @@ -1070,6 +1124,11 @@ "and\t$rT, $rA, $rB", IntegerOp, [(set R16C:$rT, (and R16C:$rA, R16C:$rB))]>; +def ANDr8: + RRForm<0b10000011000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), + "and\t$rT, $rA, $rB", IntegerOp, + [(set R8C:$rT, (and R8C:$rA, R8C:$rB))]>; + // Hacked form of AND to zero-extend 16-bit quantities to 32-bit // quantities -- see 16->32 zext pattern. // @@ -1112,12 +1171,22 @@ "andc\t$rT, $rA, $rB", IntegerOp, [(set R16C:$rT, (and R16C:$rA, (not R16C:$rB)))]>; +def ANDCr8: + RRForm<0b10000011010, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), + "andc\t$rT, $rA, $rB", IntegerOp, + [(set R8C:$rT, (and R8C:$rA, (not R8C:$rB)))]>; + def ANDBIv16i8: RI10Form<0b01101000, (outs VECREG:$rT), (ins VECREG:$rA, u10imm:$val), "andbi\t$rT, $rA, $val", IntegerOp, [(set (v16i8 VECREG:$rT), (and (v16i8 VECREG:$rA), (v16i8 v16i8U8Imm:$val)))]>; +def ANDBIr8: + RI10Form<0b01101000, (outs R8C:$rT), (ins R8C:$rA, u10imm_i8:$val), + "andbi\t$rT, $rA, $val", IntegerOp, + [(set R8C:$rT, (and R8C:$rA, immU8:$val))]>; + def ANDHIv8i16: RI10Form<0b10101000, (outs VECREG:$rT), (ins VECREG:$rA, s10imm:$val), "andhi\t$rT, $rA, $val", IntegerOp, @@ -1127,7 +1196,12 @@ def ANDHIr16: RI10Form<0b10101000, (outs R16C:$rT), (ins R16C:$rA, s10imm:$val), "andhi\t$rT, $rA, $val", IntegerOp, - [(set R16C:$rT, (and R16C:$rA, i16ImmU10:$val))]>; + [(set R16C:$rT, (and R16C:$rA, i16ImmUns10:$val))]>; + +def ANDHI1To2: + RI10Form<0b10101000, (outs R16C:$rT), (ins R8C:$rA, s10imm:$val), + "andhi\t$rT, $rA, $val", IntegerOp, + [(set R16C:$rT, (and (zext R8C:$rA), i16ImmSExt10:$val))]>; def ANDIv4i32: RI10Form<0b00101000, (outs VECREG:$rT), (ins VECREG:$rA, s10imm:$val), @@ -1140,6 +1214,13 @@ "andi\t$rT, $rA, $val", IntegerOp, [(set R32C:$rT, (and R32C:$rA, i32ImmSExt10:$val))]>; +// Hacked form of ANDI to zero-extend i8 quantities to i32. See the zext 8->32 +// pattern below. +def ANDI1To4: + RI10Form<0b10101000, (outs R32C:$rT), (ins R8C:$rA, s10imm_i32:$val), + "andi\t$rT, $rA, $val", IntegerOp, + [(set R32C:$rT, (and (zext R8C:$rA), i32ImmSExt10:$val))]>; + // Hacked form of ANDI to zero-extend i16 quantities to i32. See the // zext 16->32 pattern below. // @@ -1199,7 +1280,20 @@ "or\t$rT, $rA, $rB", IntegerOp, [(set R16C:$rT, (or R16C:$rA, R16C:$rB))]>; +def ORr8: + RRForm<0b10000010000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), + "or\t$rT, $rA, $rB", IntegerOp, + [(set R8C:$rT, (or R8C:$rA, R8C:$rB))]>; + // ORv*_*: Used in scalar->vector promotions: +def ORv16i8_i8: + RRForm<0b10000010000, (outs VECREG:$rT), (ins R8C:$rA, R8C:$rB), + "or\t$rT, $rA, $rB", IntegerOp, + [/* no pattern */]>; + +def : Pat<(v16i8 (SPUpromote_scalar R8C:$rA)), + (ORv16i8_i8 R8C:$rA, R8C:$rA)>; + def ORv8i16_i16: RRForm<0b10000010000, (outs VECREG:$rT), (ins R16C:$rA, R16C:$rB), "or\t$rT, $rA, $rB", IntegerOp, @@ -1241,6 +1335,14 @@ (ORv2f64_f64 R64FP:$rA, R64FP:$rA)>; // ORi*_v*: Used to extract vector element 0 (the preferred slot) +def ORi8_v16i8: + RRForm<0b10000010000, (outs R8C:$rT), (ins VECREG:$rA, VECREG:$rB), + "or\t$rT, $rA, $rB", IntegerOp, + [/* no pattern */]>; + +def : Pat<(SPUextract_elt0 (v16i8 VECREG:$rA)), + (ORi8_v16i8 VECREG:$rA, VECREG:$rA)>; + def ORi16_v8i16: RRForm<0b10000010000, (outs R16C:$rT), (ins VECREG:$rA, VECREG:$rB), "or\t$rT, $rA, $rB", IntegerOp, @@ -1325,6 +1427,11 @@ "orc\t$rT, $rA, $rB", IntegerOp, [(set R16C:$rT, (or R16C:$rA, (not R16C:$rB)))]>; +def ORCr8: + RRForm<0b10010010000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), + "orc\t$rT, $rA, $rB", IntegerOp, + [(set R8C:$rT, (or R8C:$rA, (not R8C:$rB)))]>; + // OR byte immediate def ORBIv16i8: RI10Form<0b01100000, (outs VECREG:$rT), (ins VECREG:$rA, u10imm:$val), @@ -1332,29 +1439,40 @@ [(set (v16i8 VECREG:$rT), (or (v16i8 VECREG:$rA), (v16i8 v16i8U8Imm:$val)))]>; +def ORBIr8: + RI10Form<0b01100000, (outs R8C:$rT), (ins R8C:$rA, u10imm_i8:$val), + "orbi\t$rT, $rA, $val", IntegerOp, + [(set R8C:$rT, (or R8C:$rA, immU8:$val))]>; + // OR halfword immediate def ORHIv8i16: - RI10Form<0b10100000, (outs VECREG:$rT), (ins VECREG:$rA, s10imm:$val), + RI10Form<0b10100000, (outs VECREG:$rT), (ins VECREG:$rA, u10imm:$val), "orhi\t$rT, $rA, $val", IntegerOp, [(set (v8i16 VECREG:$rT), (or (v8i16 VECREG:$rA), - v8i16SExt10Imm:$val))]>; + v8i16Uns10Imm:$val))]>; def ORHIr16: - RI10Form<0b10100000, (outs R16C:$rT), (ins R16C:$rA, s10imm:$val), + RI10Form<0b10100000, (outs R16C:$rT), (ins R16C:$rA, u10imm:$val), "orhi\t$rT, $rA, $val", IntegerOp, - [(set R16C:$rT, (or R16C:$rA, i16ImmSExt10:$val))]>; + [(set R16C:$rT, (or R16C:$rA, i16ImmUns10:$val))]>; + +// Hacked form of ORHI used to promote 8-bit registers to 16-bit +def ORHI1To2: + RI10Form<0b10100000, (outs R16C:$rT), (ins R8C:$rA, s10imm:$val), + "orhi\t$rT, $rA, $val", IntegerOp, + [(set R16C:$rT, (or (anyext R8C:$rA), i16ImmSExt10:$val))]>; // Bitwise "or" with immediate def ORIv4i32: - RI10Form<0b00100000, (outs VECREG:$rT), (ins VECREG:$rA, s10imm:$val), + RI10Form<0b00100000, (outs VECREG:$rT), (ins VECREG:$rA, u10imm:$val), "ori\t$rT, $rA, $val", IntegerOp, [(set (v4i32 VECREG:$rT), (or (v4i32 VECREG:$rA), - v4i32SExt10Imm:$val))]>; + v4i32Uns10Imm:$val))]>; def ORIr32: - RI10Form<0b00100000, (outs R32C:$rT), (ins R32C:$rA, s10imm_i32:$val), + RI10Form<0b00100000, (outs R32C:$rT), (ins R32C:$rA, u10imm_i32:$val), "ori\t$rT, $rA, $val", IntegerOp, - [(set R32C:$rT, (or R32C:$rA, i32ImmSExt10:$val))]>; + [(set R32C:$rT, (or R32C:$rA, i32ImmUns10:$val))]>; // Hacked forms of or immediate to copy one 32- and 64-bit FP register // to another. Do not match patterns. @@ -1381,15 +1499,24 @@ "ori\t$rT, $rA, $val", IntegerOp, [(set R32C:$rT, (or (anyext R16C:$rA), i32ImmSExt10:$val))]>; +// ORI1To4: Hacked version of the ORI instruction to extend 16-bit quantities +// to 32-bit quantities. Used exclusively to match "anyext" conversions (vide +// infra "anyext 16->32" pattern.) +def ORI1To4: + RI10Form<0b00100000, (outs R32C:$rT), (ins R8C:$rA, s10imm_i32:$val), + "ori\t$rT, $rA, $val", IntegerOp, + [(set R32C:$rT, (or (anyext R8C:$rA), i32ImmSExt10:$val))]>; + // ORX: "or" across the vector: or's $rA's word slots leaving the result in // $rT[0], slots 1-3 are zeroed. // -// Needs to match an intrinsic pattern. +// FIXME: Needs to match an intrinsic pattern. def ORXv4i32: RRForm<0b10010010000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), "orx\t$rT, $rA, $rB", IntegerOp, []>; +// XOR: def XORv16i8: RRForm<0b10010010000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), "xor\t$rT, $rA, $rB", IntegerOp, @@ -1441,11 +1568,21 @@ "xor\t$rT, $rA, $rB", IntegerOp, [(set R16C:$rT, (xor R16C:$rA, R16C:$rB))]>; +def XORr8: + RRForm<0b10010010000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), + "xor\t$rT, $rA, $rB", IntegerOp, + [(set R8C:$rT, (xor R8C:$rA, R8C:$rB))]>; + def XORBIv16i8: RI10Form<0b01100000, (outs VECREG:$rT), (ins VECREG:$rA, u10imm:$val), "xorbi\t$rT, $rA, $val", IntegerOp, [(set (v16i8 VECREG:$rT), (xor (v16i8 VECREG:$rA), v16i8U8Imm:$val))]>; +def XORBIr8: + RI10Form<0b01100000, (outs R8C:$rT), (ins R8C:$rA, u10imm_i8:$val), + "xorbi\t$rT, $rA, $val", IntegerOp, + [(set R8C:$rT, (xor R8C:$rA, immU8:$val))]>; + def XORHIv8i16: RI10Form<0b10100000, (outs VECREG:$rT), (ins VECREG:$rA, s10imm:$val), "xorhi\t$rT, $rA, $val", IntegerOp, @@ -1497,6 +1634,11 @@ "nand\t$rT, $rA, $rB", IntegerOp, [(set R16C:$rT, (not (and R16C:$rA, R16C:$rB)))]>; +def NANDr8: + RRForm<0b10010010000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), + "nand\t$rT, $rA, $rB", IntegerOp, + [(set R8C:$rT, (not (and R8C:$rA, R8C:$rB)))]>; + // NOR: def NORv16i8: RRForm<0b10010010000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), @@ -1526,6 +1668,11 @@ "nor\t$rT, $rA, $rB", IntegerOp, [(set R16C:$rT, (not (or R16C:$rA, R16C:$rB)))]>; +def NORr8: + RRForm<0b10010010000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), + "nor\t$rT, $rA, $rB", IntegerOp, + [(set R8C:$rT, (not (or R8C:$rA, R8C:$rB)))]>; + // EQV: Equivalence (1 for each same bit, otherwise 0) def EQVv16i8: RRForm<0b10010010000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), @@ -1593,6 +1740,18 @@ def : Pat<(xor (not R16C:$rA), R16C:$rB), (EQVr16 R16C:$rA, R16C:$rB)>; +def EQVr8: + RRForm<0b10010010000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), + "eqv\t$rT, $rA, $rB", IntegerOp, + [(set R8C:$rT, (or (and R8C:$rA, R8C:$rB), + (and (not R8C:$rA), (not R8C:$rB))))]>; + +def : Pat<(xor R8C:$rA, (not R8C:$rB)), + (EQVr8 R8C:$rA, R8C:$rB)>; + +def : Pat<(xor (not R8C:$rA), R8C:$rB), + (EQVr8 R8C:$rA, R8C:$rB)>; + // gcc optimizes (p & q) | (~p & ~q) -> ~(p | q) | (p & q), so match that // pattern also: def : Pat<(or (vnot (or (v16i8 VECREG:$rA), (v16i8 VECREG:$rB))), @@ -1613,6 +1772,9 @@ def : Pat<(or (not (or R16C:$rA, R16C:$rB)), (and R16C:$rA, R16C:$rB)), (EQVr16 R16C:$rA, R16C:$rB)>; +def : Pat<(or (not (or R8C:$rA, R8C:$rB)), (and R8C:$rA, R8C:$rB)), + (EQVr8 R8C:$rA, R8C:$rB)>; + // Select bits: def SELBv16i8: RRRForm<0b1000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB, VECREG:$rC), @@ -1901,6 +2063,43 @@ def : Pat<(or (and (not R16C:$rC), R16C:$rA), (and R16C:$rC, R16C:$rB)), (SELBr16 R16C:$rA, R16C:$rB, R16C:$rC)>; + +def SELBr8: + RRRForm<0b1000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB, R8C:$rC), + "selb\t$rT, $rA, $rB, $rC", IntegerOp, + []>; + +def : Pat<(or (and R8C:$rA, R8C:$rC), + (and R8C:$rB, (not R8C:$rC))), + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; + +def : Pat<(or (and R8C:$rC, R8C:$rA), + (and R8C:$rB, (not R8C:$rC))), + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; + +def : Pat<(or (and R8C:$rA, R8C:$rC), + (and (not R8C:$rC), R8C:$rB)), + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; + +def : Pat<(or (and R8C:$rC, R8C:$rA), + (and (not R8C:$rC), R8C:$rB)), + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; + +def : Pat<(or (and R8C:$rA, (not R8C:$rC)), + (and R8C:$rB, R8C:$rC)), + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; + +def : Pat<(or (and R8C:$rA, (not R8C:$rC)), + (and R8C:$rC, R8C:$rB)), + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; + +def : Pat<(or (and (not R8C:$rC), R8C:$rA), + (and R8C:$rB, R8C:$rC)), + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; + +def : Pat<(or (and (not R8C:$rC), R8C:$rA), + (and R8C:$rC, R8C:$rB)), + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; //===----------------------------------------------------------------------===// // Vector shuffle... @@ -1958,10 +2157,13 @@ [(set R16C:$rT, (shl R16C:$rA, R32C:$rB))]>; def SHLHIv8i16: - RI7Form<0b11111010000, (outs VECREG:$rT), (ins VECREG:$rA, u7imm:$val), + RI7Form<0b11111010000, (outs VECREG:$rT), (ins VECREG:$rA, u7imm_i8:$val), "shlhi\t$rT, $rA, $val", RotateShift, [(set (v8i16 VECREG:$rT), - (SPUvec_shl_v8i16 (v8i16 VECREG:$rA), (i16 uimm7:$val)))]>; + (SPUvec_shl_v8i16 (v8i16 VECREG:$rA), (i8 uimm7:$val)))]>; + +def : Pat<(SPUvec_shl_v8i16 (v8i16 VECREG:$rA), (i16 uimm7:$val)), + (SHLHIv8i16 VECREG:$rA, imm:$val)>; def : Pat<(SPUvec_shl_v8i16 (v8i16 VECREG:$rA), (i32 uimm7:$val)), (SHLHIv8i16 VECREG:$rA, imm:$val)>; @@ -1970,6 +2172,9 @@ RI7Form<0b11111010000, (outs R16C:$rT), (ins R16C:$rA, u7imm_i32:$val), "shlhi\t$rT, $rA, $val", RotateShift, [(set R16C:$rT, (shl R16C:$rA, (i32 uimm7:$val)))]>; + +def : Pat<(shl R16C:$rA, (i8 uimm7:$val)), + (SHLHIr16 R16C:$rA, uimm7:$val)>; def : Pat<(shl R16C:$rA, (i16 uimm7:$val)), (SHLHIr16 R16C:$rA, uimm7:$val)>; @@ -1986,10 +2191,13 @@ [(set R32C:$rT, (shl R32C:$rA, R32C:$rB))]>; def SHLIv4i32: - RI7Form<0b11111010000, (outs VECREG:$rT), (ins VECREG:$rA, u7imm:$val), + RI7Form<0b11111010000, (outs VECREG:$rT), (ins VECREG:$rA, u7imm_i8:$val), "shli\t$rT, $rA, $val", RotateShift, [(set (v4i32 VECREG:$rT), - (SPUvec_shl_v4i32 (v4i32 VECREG:$rA), (i16 uimm7:$val)))]>; + (SPUvec_shl_v4i32 (v4i32 VECREG:$rA), (i8 uimm7:$val)))]>; + +def: Pat<(SPUvec_shl_v4i32 (v4i32 VECREG:$rA), (i16 uimm7:$val)), + (SHLIv4i32 VECREG:$rA, uimm7:$val)>; def: Pat<(SPUvec_shl_v4i32 (v4i32 VECREG:$rA), (i32 uimm7:$val)), (SHLIv4i32 VECREG:$rA, uimm7:$val)>; @@ -2002,6 +2210,9 @@ def : Pat<(shl R32C:$rA, (i16 uimm7:$val)), (SHLIr32 R32C:$rA, uimm7:$val)>; +def : Pat<(shl R32C:$rA, (i8 uimm7:$val)), + (SHLIr32 R32C:$rA, uimm7:$val)>; + // SHLQBI vec form: Note that this will shift the entire vector (the 128-bit // register) to the left. Vector form is here to ensure type correctness. def SHLQBIvec: @@ -2044,11 +2255,27 @@ "roth\t$rT, $rA, $rB", RotateShift, [(set R16C:$rT, (rotl R16C:$rA, R32C:$rB))]>; +// The rotate amount is in the same bits whether we've got an 8-bit, 16-bit or +// 32-bit register +def ROTHr16_r8: + RRForm<0b00111010000, (outs R16C:$rT), (ins R16C:$rA, R8C:$rB), + "roth\t$rT, $rA, $rB", RotateShift, + [(set R16C:$rT, (rotl R16C:$rA, (i32 (zext R8C:$rB))))]>; + +def : Pat<(rotl R16C:$rA, (i32 (sext R8C:$rB))), + (ROTHr16_r8 R16C:$rA, R8C:$rB)>; + +def : Pat<(rotl R16C:$rA, (i32 (zext R8C:$rB))), + (ROTHr16_r8 R16C:$rA, R8C:$rB)>; + +def : Pat<(rotl R16C:$rA, (i32 (anyext R8C:$rB))), + (ROTHr16_r8 R16C:$rA, R8C:$rB)>; + def ROTHIv8i16: - RI7Form<0b00111110000, (outs VECREG:$rT), (ins VECREG:$rA, u7imm:$val), + RI7Form<0b00111110000, (outs VECREG:$rT), (ins VECREG:$rA, u7imm_i8:$val), "rothi\t$rT, $rA, $val", RotateShift, [(set (v8i16 VECREG:$rT), - (SPUvec_rotl_v8i16 VECREG:$rA, (i16 uimm7:$val)))]>; + (SPUvec_rotl_v8i16 VECREG:$rA, (i8 uimm7:$val)))]>; def : Pat<(SPUvec_rotl_v8i16 VECREG:$rA, (i16 uimm7:$val)), (ROTHIv8i16 VECREG:$rA, imm:$val)>; @@ -2066,6 +2293,11 @@ "rothi\t$rT, $rA, $val", RotateShift, [(set R16C:$rT, (rotl R16C:$rA, (i32 uimm7:$val)))]>; +def ROTHIr16_i8: + RI7Form<0b00111110000, (outs R16C:$rT), (ins R16C:$rA, u7imm_i8:$val), + "rothi\t$rT, $rA, $val", RotateShift, + [(set R16C:$rT, (rotl R16C:$rA, (i8 uimm7:$val)))]>; + def ROTv4i32: RRForm<0b00011010000, (outs VECREG:$rT), (ins VECREG:$rA, R32C:$rB), "rot\t$rT, $rA, $rB", RotateShift, @@ -2077,6 +2309,30 @@ "rot\t$rT, $rA, $rB", RotateShift, [(set R32C:$rT, (rotl R32C:$rA, R32C:$rB))]>; +// The rotate amount is in the same bits whether we've got an 8-bit, 16-bit or +// 32-bit register +def ROTr32_r16_anyext: + RRForm<0b00011010000, (outs R32C:$rT), (ins R32C:$rA, R16C:$rB), + "rot\t$rT, $rA, $rB", RotateShift, + [(set R32C:$rT, (rotl R32C:$rA, (i32 (anyext R16C:$rB))))]>; + +def : Pat<(rotl R32C:$rA, (i32 (zext R16C:$rB))), + (ROTr32_r16_anyext R32C:$rA, R16C:$rB)>; + +def : Pat<(rotl R32C:$rA, (i32 (sext R16C:$rB))), + (ROTr32_r16_anyext R32C:$rA, R16C:$rB)>; + +def ROTr32_r8_anyext: + RRForm<0b00011010000, (outs R32C:$rT), (ins R32C:$rA, R8C:$rB), + "rot\t$rT, $rA, $rB", RotateShift, + [(set R32C:$rT, (rotl R32C:$rA, (i32 (anyext R8C:$rB))))]>; + +def : Pat<(rotl R32C:$rA, (i32 (zext R8C:$rB))), + (ROTr32_r8_anyext R32C:$rA, R8C:$rB)>; + +def : Pat<(rotl R32C:$rA, (i32 (sext R8C:$rB))), + (ROTr32_r8_anyext R32C:$rA, R8C:$rB)>; + def ROTIv4i32: RI7Form<0b00011110000, (outs VECREG:$rT), (ins VECREG:$rA, u7imm_i32:$val), "roti\t$rT, $rA, $val", RotateShift, @@ -2086,6 +2342,9 @@ def : Pat<(SPUvec_rotl_v4i32 (v4i32 VECREG:$rA), (i16 uimm7:$val)), (ROTIv4i32 VECREG:$rA, imm:$val)>; +def : Pat<(SPUvec_rotl_v4i32 (v4i32 VECREG:$rA), (i8 uimm7:$val)), + (ROTIv4i32 VECREG:$rA, imm:$val)>; + def ROTIr32: RI7Form<0b00011110000, (outs R32C:$rT), (ins R32C:$rA, u7imm_i32:$val), "roti\t$rT, $rA, $val", RotateShift, @@ -2096,6 +2355,11 @@ "roti\t$rT, $rA, $val", RotateShift, [(set R32C:$rT, (rotl R32C:$rA, (i16 uimm7:$val)))]>; +def ROTIr32_i8: + RI7Form<0b00111110000, (outs R32C:$rT), (ins R32C:$rA, u7imm_i8:$val), + "roti\t$rT, $rA, $val", RotateShift, + [(set R32C:$rT, (rotl R32C:$rA, (i8 uimm7:$val)))]>; + // ROTQBY* vector forms: This rotates the entire vector, but vector registers // are used here for type checking (instances where ROTQBI is used actually // use vector registers) @@ -2155,9 +2419,9 @@ (ROTHMv8i16 VECREG:$rA, (SFIr32 (XSHWr16 R16C:$rB), 0))>; -def : Pat<(SPUvec_srl_v8i16 (v8i16 VECREG:$rA), /* R8C */ R16C:$rB), +def : Pat<(SPUvec_srl_v8i16 (v8i16 VECREG:$rA), R8C:$rB), (ROTHMv8i16 VECREG:$rA, - (SFIr32 (XSHWr16 /* (XSBHr8 R8C */ R16C:$rB) /*)*/, 0))>; + (SFIr32 (XSHWr16 (XSBHr8 R8C:$rB) ), 0))>; // ROTHM r16 form: Rotate 16-bit quantity to right, zero fill at the left // Note: This instruction doesn't match a pattern because rB must be negated @@ -2174,9 +2438,9 @@ (ROTHMr16 R16C:$rA, (SFIr32 (XSHWr16 R16C:$rB), 0))>; -def : Pat<(srl R16C:$rA, /* R8C */ R16C:$rB), +def : Pat<(srl R16C:$rA, R8C:$rB), (ROTHMr16 R16C:$rA, - (SFIr32 (XSHWr16 /* (XSBHr8 R8C */ R16C:$rB) /* ) */, 0))>; + (SFIr32 (XSHWr16 (XSBHr8 R8C:$rB) ), 0))>; // ROTHMI v8i16 form: See the comment for ROTHM v8i16. The difference here is // that the immediate can be complemented, so that the user doesn't have to @@ -2189,6 +2453,9 @@ def: Pat<(SPUvec_srl_v8i16 (v8i16 VECREG:$rA), (i16 imm:$val)), (ROTHMIv8i16 VECREG:$rA, imm:$val)>; + +def: Pat<(SPUvec_srl_v8i16 (v8i16 VECREG:$rA), (i8 imm:$val)), + (ROTHMIv8i16 VECREG:$rA, imm:$val)>; def ROTHMIr16: RI7Form<0b10111110000, (outs R16C:$rT), (ins R16C:$rA, rothNeg7imm:$val), @@ -2198,6 +2465,9 @@ def: Pat<(srl R16C:$rA, (i16 uimm7:$val)), (ROTHMIr16 R16C:$rA, uimm7:$val)>; +def: Pat<(srl R16C:$rA, (i8 uimm7:$val)), + (ROTHMIr16 R16C:$rA, uimm7:$val)>; + // ROTM v4i32 form: See the ROTHM v8i16 comments. def ROTMv4i32: RRForm<0b10011010000, (outs VECREG:$rT), (ins VECREG:$rA, R32C:$rB), @@ -2227,6 +2497,10 @@ (ROTMr32 R32C:$rA, (SFIr32 (XSHWr16 R16C:$rB), 0))>; +def : Pat<(srl R32C:$rA, R8C:$rB), + (ROTMr32 R32C:$rA, + (SFIr32 (XSHWr16 (XSBHr8 R8C:$rB)), 0))>; + // ROTMI v4i32 form: See the comment for ROTHM v8i16. def ROTMIv4i32: RI7Form<0b10011110000, (outs VECREG:$rT), (ins VECREG:$rA, rotNeg7imm:$val), @@ -2236,6 +2510,9 @@ def : Pat<(SPUvec_srl_v4i32 VECREG:$rA, (i16 uimm7:$val)), (ROTMIv4i32 VECREG:$rA, uimm7:$val)>; + +def : Pat<(SPUvec_srl_v4i32 VECREG:$rA, (i8 uimm7:$val)), + (ROTMIv4i32 VECREG:$rA, uimm7:$val)>; // ROTMI r32 form: know how to complement the immediate value. def ROTMIr32: @@ -2246,6 +2523,9 @@ def : Pat<(srl R32C:$rA, (i16 imm:$val)), (ROTMIr32 R32C:$rA, uimm7:$val)>; +def : Pat<(srl R32C:$rA, (i8 imm:$val)), + (ROTMIr32 R32C:$rA, uimm7:$val)>; + // ROTQMBYvec: This is a vector form merely so that when used in an // instruction pattern, type checking will succeed. This instruction assumes // that the user knew to complement $rB. @@ -2291,6 +2571,10 @@ (ROTMAHv8i16 VECREG:$rA, (SFIr32 (XSHWr16 R16C:$rB), 0))>; +def : Pat<(SPUvec_sra_v8i16 VECREG:$rA, R8C:$rB), + (ROTMAHv8i16 VECREG:$rA, + (SFIr32 (XSHWr16 (XSBHr8 R8C:$rB)), 0))>; + def ROTMAHr16: RRForm<0b01111010000, (outs R16C:$rT), (ins R16C:$rA, R32C:$rB), "rotmah\t$rT, $rA, $rB", RotateShift, @@ -2303,6 +2587,10 @@ (ROTMAHr16 R16C:$rA, (SFIr32 (XSHWr16 R16C:$rB), 0))>; +def : Pat<(sra R16C:$rA, R8C:$rB), + (ROTMAHr16 R16C:$rA, + (SFIr32 (XSHWr16 (XSBHr8 R8C:$rB)), 0))>; + def ROTMAHIv8i16: RRForm<0b01111110000, (outs VECREG:$rT), (ins VECREG:$rA, rothNeg7imm:$val), "rotmahi\t$rT, $rA, $val", RotateShift, @@ -2312,6 +2600,9 @@ def : Pat<(SPUvec_sra_v8i16 (v8i16 VECREG:$rA), (i16 uimm7:$val)), (ROTMAHIv8i16 (v8i16 VECREG:$rA), (i32 uimm7:$val))>; +def : Pat<(SPUvec_sra_v8i16 (v8i16 VECREG:$rA), (i8 uimm7:$val)), + (ROTMAHIv8i16 (v8i16 VECREG:$rA), (i32 uimm7:$val))>; + def ROTMAHIr16: RRForm<0b01111110000, (outs R16C:$rT), (ins R16C:$rA, rothNeg7imm_i16:$val), "rotmahi\t$rT, $rA, $val", RotateShift, @@ -2320,6 +2611,9 @@ def : Pat<(sra R16C:$rA, (i32 imm:$val)), (ROTMAHIr16 R16C:$rA, uimm7:$val)>; +def : Pat<(sra R16C:$rA, (i8 imm:$val)), + (ROTMAHIr16 R16C:$rA, uimm7:$val)>; + def ROTMAv4i32: RRForm<0b01011010000, (outs VECREG:$rT), (ins VECREG:$rA, R32C:$rB), "rotma\t$rT, $rA, $rB", RotateShift, @@ -2332,6 +2626,10 @@ (ROTMAv4i32 (v4i32 VECREG:$rA), (SFIr32 (XSHWr16 R16C:$rB), 0))>; +def : Pat<(SPUvec_sra_v4i32 VECREG:$rA, R8C:$rB), + (ROTMAv4i32 (v4i32 VECREG:$rA), + (SFIr32 (XSHWr16 (XSBHr8 R8C:$rB)), 0))>; + def ROTMAr32: RRForm<0b01011010000, (outs R32C:$rT), (ins R32C:$rA, R32C:$rB), "rotma\t$rT, $rA, $rB", RotateShift, @@ -2344,6 +2642,10 @@ (ROTMAr32 R32C:$rA, (SFIr32 (XSHWr16 R16C:$rB), 0))>; +def : Pat<(sra R32C:$rA, R8C:$rB), + (ROTMAr32 R32C:$rA, + (SFIr32 (XSHWr16 (XSBHr8 R8C:$rB)), 0))>; + def ROTMAIv4i32: RRForm<0b01011110000, (outs VECREG:$rT), (ins VECREG:$rA, rotNeg7imm:$val), "rotmai\t$rT, $rA, $val", RotateShift, @@ -2361,6 +2663,9 @@ def : Pat<(sra R32C:$rA, (i16 uimm7:$val)), (ROTMAIr32 R32C:$rA, uimm7:$val)>; +def : Pat<(sra R32C:$rA, (i8 uimm7:$val)), + (ROTMAIr32 R32C:$rA, uimm7:$val)>; + //===----------------------------------------------------------------------===// // Branch and conditionals: //===----------------------------------------------------------------------===// @@ -2401,12 +2706,21 @@ } // Comparison operators: +def CEQBr8: + RRForm<0b00001011110, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), + "ceqb\t$rT, $rA, $rB", ByteOp, + [/* no pattern to match */]>; def CEQBv16i8: RRForm<0b00001011110, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), "ceqb\t$rT, $rA, $rB", ByteOp, [/* no pattern to match: intrinsic */]>; +def CEQBIr8: + RI10Form<0b01111110, (outs R8C:$rT), (ins R8C:$rA, s7imm:$val), + "ceqbi\t$rT, $rA, $val", ByteOp, + [/* no pattern to match: intrinsic */]>; + def CEQBIv16i8: RI10Form<0b01111110, (outs VECREG:$rT), (ins VECREG:$rA, s7imm:$val), "ceqbi\t$rT, $rA, $val", ByteOp, @@ -3075,6 +3389,10 @@ def : Pat<(v4i32 v4i32Imm:$imm), (IOHLvec (v4i32 (ILHUv4i32 (HI16_vec v4i32Imm:$imm))), (LO16_vec v4i32Imm:$imm))>; + +// 8-bit constants +def : Pat<(i8 imm:$imm), + (ILHr8 imm:$imm)>; //===----------------------------------------------------------------------===// // Call instruction patterns: @@ -3095,14 +3413,34 @@ def : Pat<(sext_inreg R32C:$rSrc, i8), (XSHWr32 (XSBHr32 R32C:$rSrc))>; +def : Pat<(i32 (sext R8C:$rSrc)), + (XSHWr16 (XSBHr8 R8C:$rSrc))>; + def : Pat<(SPUextract_i8_sext VECREG:$rSrc), (XSHWr32 (XSBHr32 (ORi32_v4i32 (v4i32 VECREG:$rSrc), (v4i32 VECREG:$rSrc))))>; +// zext 8->16: Zero extend bytes to halfwords +def : Pat<(i16 (zext R8C:$rSrc)), + (ANDHI1To2 R8C:$rSrc, 0xff)>; + +// zext 8->32 from preferred slot in load/store def : Pat<(SPUextract_i8_zext VECREG:$rSrc), (ANDIr32 (ORi32_v4i32 (v4i32 VECREG:$rSrc), (v4i32 VECREG:$rSrc)), 0xff)>; +// zext 8->32: Zero extend bytes to words +def : Pat<(i32 (zext R8C:$rSrc)), + (ANDI1To4 R8C:$rSrc, 0xff)>; + +// anyext 8->16: Extend 8->16 bits, irrespective of sign +def : Pat<(i16 (anyext R8C:$rSrc)), + (ORHI1To2 R8C:$rSrc, 0)>; + +// anyext 8->32: Extend 8->32 bits, irrespective of sign +def : Pat<(i32 (anyext R8C:$rSrc)), + (ORI1To4 R8C:$rSrc, 0)>; + // zext 16->32: Zero extend halfwords to words (note that we have to juggle the // 0xffff constant since it will not fit into an immediate.) def : Pat<(i32 (zext R16C:$rSrc)), Modified: llvm/trunk/lib/Target/CellSPU/SPUOperands.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUOperands.td?rev=45130&r1=45129&r2=45130&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUOperands.td (original) +++ llvm/trunk/lib/Target/CellSPU/SPUOperands.td Mon Dec 17 16:32:34 2007 @@ -99,15 +99,21 @@ return isI32IntS10Immediate(N); }]>; +// i32ImmUns10 predicate - True if the i32 immediate fits in a 10-bit unsigned +// field. Used by RI10Form instructions like 'ldq'. +def i32ImmUns10 : PatLeaf<(imm), [{ + return isI32IntU10Immediate(N); +}]>; + // i16ImmSExt10 predicate - True if the i16 immediate fits in a 10-bit sign // extended field. Used by RI10Form instructions like 'ldq'. def i16ImmSExt10 : PatLeaf<(imm), [{ return isI16IntS10Immediate(N); }]>; -// i16ImmU10 predicate - True if the i16 immediate fits into a 10-bit unsigned +// i16ImmUns10 predicate - True if the i16 immediate fits into a 10-bit unsigned // value. Used by RI10Form instructions. -def i16ImmU10 : PatLeaf<(imm), [{ +def i16ImmUns10 : PatLeaf<(imm), [{ return isI16IntU10Immediate(N); }]>; @@ -261,9 +267,21 @@ return SPU::get_vec_i10imm(N, *CurDAG, MVT::i16).Val != 0; }], v8i16SExt10Imm_xform>; +// v8i16Uns10Imm_xform function: convert build_vector to 16-bit unsigned +// immediate constant load for v8i16 vectors. +def v8i16Uns10Imm_xform: SDNodeXForm; + +// v8i16Uns10Imm: Predicate test for 16-bit unsigned immediate constant +// load, works in conjunction with its transform function. +def v8i16Uns10Imm: PatLeaf<(build_vector), [{ + return SPU::get_vec_i10imm(N, *CurDAG, MVT::i16).Val != 0; +}], v8i16Uns10Imm_xform>; + // v8i16SExt16Imm_xform function: convert build_vector to 16-bit sign extended // immediate constant load for v8i16 vectors. -def v8i16SExt16Imm_xform: SDNodeXForm; @@ -271,7 +289,7 @@ // load, works in conjunction with its transform function. def v8i16SExt16Imm: PatLeaf<(build_vector), [{ return SPU::get_vec_i16imm(N, *CurDAG, MVT::i16).Val != 0; -}], v8i16SExt16Imm_xform>; +}], v8i16Uns16Imm_xform>; // v4i32SExt10Imm_xform function: convert build_vector to 10-bit sign extended // immediate constant load for v4i32 vectors. @@ -285,6 +303,18 @@ return SPU::get_vec_i10imm(N, *CurDAG, MVT::i32).Val != 0; }], v4i32SExt10Imm_xform>; +// v4i32Uns10Imm_xform function: convert build_vector to 10-bit unsigned +// immediate constant load for v4i32 vectors. +def v4i32Uns10Imm_xform: SDNodeXForm; + +// v4i32Uns10Imm: Predicate test for 10-bit unsigned immediate constant +// load, works in conjunction with its transform function. +def v4i32Uns10Imm: PatLeaf<(build_vector), [{ + return SPU::get_vec_i10imm(N, *CurDAG, MVT::i32).Val != 0; +}], v4i32Uns10Imm_xform>; + // v4i32SExt16Imm_xform function: convert build_vector to 16-bit sign extended // immediate constant load for v4i32 vectors. def v4i32SExt16Imm_xform: SDNodeXForm { + let PrintMethod = "printU7ImmOperand"; +} + def u7imm_i32: Operand { let PrintMethod = "printU7ImmOperand"; } @@ -412,6 +446,10 @@ let PrintMethod = "printU10ImmOperand"; } +def u10imm_i8: Operand { + let PrintMethod = "printU10ImmOperand"; +} + def u10imm_i32: Operand { let PrintMethod = "printU10ImmOperand"; } @@ -420,6 +458,10 @@ let PrintMethod = "printS16ImmOperand"; } +def s16imm_i8: Operand { + let PrintMethod = "printS16ImmOperand"; +} + def s16imm_i32: Operand { let PrintMethod = "printS16ImmOperand"; } Modified: llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp?rev=45130&r1=45129&r2=45130&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp Mon Dec 17 16:32:34 2007 @@ -328,7 +328,9 @@ /* do what loadRegFromStackSlot does here... */ } else { unsigned Opc = 0; - if (RC == SPU::R16CRegisterClass) { + if (RC == SPU::R8CRegisterClass) { + /* do brilliance here */ + } else if (RC == SPU::R16CRegisterClass) { /* Opc = PPC::LWZ; */ } else if (RC == SPU::R32CRegisterClass) { /* Opc = PPC::LD; */ @@ -369,10 +371,9 @@ abort(); } - /* if (DestRC == SPU::R8CRegisterClass) { + if (DestRC == SPU::R8CRegisterClass) { BuildMI(MBB, MI, TII.get(SPU::ORBIr8), DestReg).addReg(SrcReg).addImm(0); - } else */ - if (DestRC == SPU::R16CRegisterClass) { + } else if (DestRC == SPU::R16CRegisterClass) { BuildMI(MBB, MI, TII.get(SPU::ORHIr16), DestReg).addReg(SrcReg).addImm(0); } else if (DestRC == SPU::R32CRegisterClass) { BuildMI(MBB, MI, TII.get(SPU::ORIr32), DestReg).addReg(SrcReg).addImm(0); Modified: llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.td?rev=45130&r1=45129&r2=45130&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.td (original) +++ llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.td Mon Dec 17 16:32:34 2007 @@ -359,6 +359,40 @@ }]; } +// The SPU's registers as 8-bit wide (byte) "preferred slot": +def R8C : RegisterClass<"SPU", [i8], 128, + [ + /* volatile register */ + R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, + R17, R18, R19, R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R31, + R32, R33, R34, R35, R36, R37, R38, R39, R40, R41, R42, R43, R44, R45, R46, + R47, R48, R49, R50, R51, R52, R53, R54, R55, R56, R57, R58, R59, R60, R61, + R62, R63, R64, R65, R66, R67, R68, R69, R70, R71, R72, R73, R74, R75, R76, + R77, R78, R79, + /* non-volatile register: take hint from PPC and allocate in reverse order */ + R127, R126, R125, R124, R123, R122, R121, R120, R119, R118, R117, R116, R115, + R114, R113, R112, R111, R110, R109, R108, R107, R106, R105, R104, R103, R102, + R101, R100, R99, R98, R97, R96, R95, R94, R93, R92, R91, R90, R89, R88, R87, + R86, R85, R84, R83, R82, R81, R80, + /* environment ptr, SP, LR */ + R2, R1, R0 ]> +{ + let MethodProtos = [{ + iterator allocation_order_begin(const MachineFunction &MF) const; + iterator allocation_order_end(const MachineFunction &MF) const; + }]; + let MethodBodies = [{ + R8CClass::iterator + R8CClass::allocation_order_begin(const MachineFunction &MF) const { + return begin(); + } + R8CClass::iterator + R8CClass::allocation_order_end(const MachineFunction &MF) const { + return end()-3; // don't allocate R2, R1, or R0 (envp, sp, lr) + } + }]; +} + // The SPU's registers as vector registers: def VECREG : RegisterClass<"SPU", [v16i8,v8i16,v4i32,v4f32,v2i64,v2f64], 128, [ Modified: llvm/trunk/test/CodeGen/CellSPU/and_ops.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/and_ops.ll?rev=45130&r1=45129&r2=45130&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/and_ops.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/and_ops.ll Mon Dec 17 16:32:34 2007 @@ -1,9 +1,9 @@ ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s -; RUN: grep and %t1.s | count 227 +; RUN: grep and %t1.s | count 232 ; RUN: grep andc %t1.s | count 85 ; RUN: grep andi %t1.s | count 36 -; RUN: grep andhi %t1.s | count 31 -; RUN: grep andbi %t1.s | count 1 +; RUN: grep andhi %t1.s | count 30 +; RUN: grep andbi %t1.s | count 4 ; AND instruction generation: define <4 x i32> @and_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) { @@ -258,13 +258,19 @@ } define i8 @and_u8(i8 zeroext %in) zeroext { - ; ANDI generated: - %tmp37 = and i8 %in, 37 ; [#uses=1] + ; ANDBI generated: + %tmp37 = and i8 %in, 37 ret i8 %tmp37 } -define i8 @and_i8(i8 signext %in) signext { - ; ANDHI generated - %tmp38 = and i8 %in, 37 ; [#uses=1] +define i8 @and_sext8(i8 signext %in) signext { + ; ANDBI generated + %tmp38 = and i8 %in, 37 + ret i8 %tmp38 +} + +define i8 @and_i8(i8 %in) { + ; ANDBI generated + %tmp38 = and i8 %in, 205 ret i8 %tmp38 } Added: llvm/trunk/test/CodeGen/CellSPU/nand.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/nand.ll?rev=45130&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/nand.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/nand.ll Mon Dec 17 16:32:34 2007 @@ -0,0 +1,119 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep nand %t1.s | count 90 +; RUN: grep and %t1.s | count 94 +; RUN: grep xsbh %t1.s | count 2 +; RUN: grep xshw %t1.s | count 4 + +define <4 x i32> @nand_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) { + %A = and <4 x i32> %arg2, %arg1 ; <<4 x i32>> [#uses=1] + %B = xor <4 x i32> %A, < i32 -1, i32 -1, i32 -1, i32 -1 > + ret <4 x i32> %B +} + +define <4 x i32> @nand_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2) { + %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] + %B = xor <4 x i32> %A, < i32 -1, i32 -1, i32 -1, i32 -1 > + ret <4 x i32> %B +} + +define <8 x i16> @nand_v8i16_1(<8 x i16> %arg1, <8 x i16> %arg2) { + %A = and <8 x i16> %arg2, %arg1 ; <<8 x i16>> [#uses=1] + %B = xor <8 x i16> %A, < i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1, i16 -1, i16 -1 > + ret <8 x i16> %B +} + +define <8 x i16> @nand_v8i16_2(<8 x i16> %arg1, <8 x i16> %arg2) { + %A = and <8 x i16> %arg1, %arg2 ; <<8 x i16>> [#uses=1] + %B = xor <8 x i16> %A, < i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1, i16 -1, i16 -1 > + ret <8 x i16> %B +} + +define <16 x i8> @nand_v16i8_1(<16 x i8> %arg1, <16 x i8> %arg2) { + %A = and <16 x i8> %arg2, %arg1 ; <<16 x i8>> [#uses=1] + %B = xor <16 x i8> %A, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + ret <16 x i8> %B +} + +define <16 x i8> @nand_v16i8_2(<16 x i8> %arg1, <16 x i8> %arg2) { + %A = and <16 x i8> %arg1, %arg2 ; <<16 x i8>> [#uses=1] + %B = xor <16 x i8> %A, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + ret <16 x i8> %B +} + +define i32 @nand_i32_1(i32 %arg1, i32 %arg2) { + %A = and i32 %arg2, %arg1 ; [#uses=1] + %B = xor i32 %A, -1 ; [#uses=1] + ret i32 %B +} + +define i32 @nand_i32_2(i32 %arg1, i32 %arg2) { + %A = and i32 %arg1, %arg2 ; [#uses=1] + %B = xor i32 %A, -1 ; [#uses=1] + ret i32 %B +} + +define i16 @nand_i16_1(i16 signext %arg1, i16 signext %arg2) signext { + %A = and i16 %arg2, %arg1 ; [#uses=1] + %B = xor i16 %A, -1 ; [#uses=1] + ret i16 %B +} + +define i16 @nand_i16_2(i16 signext %arg1, i16 signext %arg2) signext { + %A = and i16 %arg1, %arg2 ; [#uses=1] + %B = xor i16 %A, -1 ; [#uses=1] + ret i16 %B +} + +define i16 @nand_i16u_1(i16 zeroext %arg1, i16 zeroext %arg2) zeroext { + %A = and i16 %arg2, %arg1 ; [#uses=1] + %B = xor i16 %A, -1 ; [#uses=1] + ret i16 %B +} + +define i16 @nand_i16u_2(i16 zeroext %arg1, i16 zeroext %arg2) zeroext { + %A = and i16 %arg1, %arg2 ; [#uses=1] + %B = xor i16 %A, -1 ; [#uses=1] + ret i16 %B +} + +define i8 @nand_i8u_1(i8 zeroext %arg1, i8 zeroext %arg2) zeroext { + %A = and i8 %arg2, %arg1 ; [#uses=1] + %B = xor i8 %A, -1 ; [#uses=1] + ret i8 %B +} + +define i8 @nand_i8u_2(i8 zeroext %arg1, i8 zeroext %arg2) zeroext { + %A = and i8 %arg1, %arg2 ; [#uses=1] + %B = xor i8 %A, -1 ; [#uses=1] + ret i8 %B +} + +define i8 @nand_i8_1(i8 signext %arg1, i8 signext %arg2) signext { + %A = and i8 %arg2, %arg1 ; [#uses=1] + %B = xor i8 %A, -1 ; [#uses=1] + ret i8 %B +} + +define i8 @nand_i8_2(i8 signext %arg1, i8 signext %arg2) signext { + %A = and i8 %arg1, %arg2 ; [#uses=1] + %B = xor i8 %A, -1 ; [#uses=1] + ret i8 %B +} + +define i8 @nand_i8_3(i8 %arg1, i8 %arg2) { + %A = and i8 %arg2, %arg1 ; [#uses=1] + %B = xor i8 %A, -1 ; [#uses=1] + ret i8 %B +} + +define i8 @nand_i8_4(i8 %arg1, i8 %arg2) { + %A = and i8 %arg1, %arg2 ; [#uses=1] + %B = xor i8 %A, -1 ; [#uses=1] + ret i8 %B +} From evan.cheng at apple.com Mon Dec 17 16:33:23 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 17 Dec 2007 22:33:23 -0000 Subject: [llvm-commits] [llvm] r45131 - in /llvm/trunk: include/llvm/AutoUpgrade.h include/llvm/IntrinsicsX86.td lib/Bitcode/Reader/BitcodeReader.cpp lib/VMCore/AutoUpgrade.cpp test/Bitcode/sse2_movl_dq.ll test/Bitcode/sse2_movl_dq.ll.bc Message-ID: <200712172233.lBHMXO9U030150@zion.cs.uiuc.edu> Author: evancheng Date: Mon Dec 17 16:33:23 2007 New Revision: 45131 URL: http://llvm.org/viewvc/llvm-project?rev=45131&view=rev Log: Bring back int_x86_sse2_movl_dq intrinsic for backward compatibility. Make sure it's auto-upgraded to a shufflevector instruction. Added: llvm/trunk/test/Bitcode/sse2_movl_dq.ll llvm/trunk/test/Bitcode/sse2_movl_dq.ll.bc (with props) Modified: llvm/trunk/include/llvm/AutoUpgrade.h llvm/trunk/include/llvm/IntrinsicsX86.td llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp llvm/trunk/lib/VMCore/AutoUpgrade.cpp Modified: llvm/trunk/include/llvm/AutoUpgrade.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/AutoUpgrade.h?rev=45131&r1=45130&r2=45131&view=diff ============================================================================== --- llvm/trunk/include/llvm/AutoUpgrade.h (original) +++ llvm/trunk/include/llvm/AutoUpgrade.h Mon Dec 17 16:33:23 2007 @@ -20,8 +20,10 @@ class BasicBlock; /// This is a more granular function that simply checks an intrinsic function - /// for upgrading, and if it requires upgrading provides the new function. - Function* UpgradeIntrinsicFunction(Function *F); + /// for upgrading, and returns true if it requires upgrading. It may return + /// null in NewFn if the all calls to the original intrinsic function + /// should be transformed to non-function-call instructions. + bool UpgradeIntrinsicFunction(Function *F, Function *&NewFn); /// This is the complement to the above, replacing a specific call to an /// intrinsic function with a call to the specified new function. Modified: llvm/trunk/include/llvm/IntrinsicsX86.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsX86.td?rev=45131&r1=45130&r2=45131&view=diff ============================================================================== --- llvm/trunk/include/llvm/IntrinsicsX86.td (original) +++ llvm/trunk/include/llvm/IntrinsicsX86.td Mon Dec 17 16:33:23 2007 @@ -460,6 +460,8 @@ def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">, Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>; + def int_x86_sse2_movl_dq : GCCBuiltin<"__builtin_ia32_movqv4si">, + Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>; def int_x86_sse2_movmsk_pd : GCCBuiltin<"__builtin_ia32_movmskpd">, Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>; def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">, Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=45131&r1=45130&r2=45131&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Mon Dec 17 16:33:23 2007 @@ -873,7 +873,8 @@ // Look for intrinsic functions which need to be upgraded at some point for (Module::iterator FI = TheModule->begin(), FE = TheModule->end(); FI != FE; ++FI) { - if (Function* NewFn = UpgradeIntrinsicFunction(FI)) + Function* NewFn; + if (UpgradeIntrinsicFunction(FI, NewFn)) UpgradedIntrinsics.push_back(std::make_pair(FI, NewFn)); } Modified: llvm/trunk/lib/VMCore/AutoUpgrade.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AutoUpgrade.cpp?rev=45131&r1=45130&r2=45131&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/AutoUpgrade.cpp (original) +++ llvm/trunk/lib/VMCore/AutoUpgrade.cpp Mon Dec 17 16:33:23 2007 @@ -21,7 +21,7 @@ using namespace llvm; -static Function* UpgradeIntrinsicFunction1(Function *F) { +static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { assert(F && "Illegal to upgrade a non-existent Function."); // Get the Function's name. @@ -33,7 +33,7 @@ // Quickly eliminate it, if it's not a candidate. if (Name.length() <= 8 || Name[0] != 'l' || Name[1] != 'l' || Name[2] != 'v' || Name[3] != 'm' || Name[4] != '.') - return 0; + return false; Module *M = F->getParent(); switch (Name[5]) { @@ -49,7 +49,8 @@ if (delim != std::string::npos) { // Construct the new name as 'llvm.bswap' + '.i*' F->setName(Name.substr(0,10)+Name.substr(delim)); - return F; + NewFn = F; + return true; } } break; @@ -71,10 +72,11 @@ // Now construct the new intrinsic with the correct name and type. We // leave the old function around in order to query its type, whatever it // may be, and correctly convert up to the new type. - return cast(M->getOrInsertFunction(Name, - FTy->getParamType(0), - FTy->getParamType(0), - (Type *)0)); + NewFn = cast(M->getOrInsertFunction(Name, + FTy->getParamType(0), + FTy->getParamType(0), + (Type *)0)); + return true; } break; @@ -88,7 +90,8 @@ if (delim != std::string::npos) { // Construct a new name as 'llvm.part.select' + '.i*' F->setName(Name.substr(0,16)+Name.substr(delim)); - return F; + NewFn = F; + return true; } break; } @@ -105,7 +108,8 @@ Name.find('.',delim+1) != std::string::npos) { // Construct a new name as 'llvm.part.select' + '.i*.i*' F->setName(Name.substr(0,13)+Name.substr(delim)); - return F; + NewFn = F; + return true; } break; } @@ -137,12 +141,18 @@ // Now construct the new intrinsic with the correct name and type. We // leave the old function around in order to query its type, whatever it // may be, and correctly convert up to the new type. - return cast(M->getOrInsertFunction(Name, - FTy->getReturnType(), - FTy->getParamType(0), - VT, - (Type *)0)); + NewFn = cast(M->getOrInsertFunction(Name, + FTy->getReturnType(), + FTy->getParamType(0), + VT, + (Type *)0)); + return true; + } else if (Name.compare(5,16,"x86.sse2.movl.dq",16) == 0) { + // Calls to this intrinsic are transformed into ShuffleVector's. + NewFn = 0; + return true; } + break; } @@ -150,15 +160,16 @@ // to both detect an intrinsic which needs upgrading, and to provide the // upgraded form of the intrinsic. We should perhaps have two separate // functions for this. - return 0; + return false; } -Function* llvm::UpgradeIntrinsicFunction(Function *F) { - Function *Upgraded = UpgradeIntrinsicFunction1(F); +bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) { + NewFn = 0; + bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn); // Upgrade intrinsic attributes. This does not change the function. - if (Upgraded) - F = Upgraded; + if (NewFn) + F = NewFn; if (unsigned id = F->getIntrinsicID(true)) F->setParamAttrs(Intrinsic::getParamAttrs((Intrinsic::ID)id)); return Upgraded; @@ -168,11 +179,44 @@ // upgraded intrinsic. All argument and return casting must be provided in // order to seamlessly integrate with existing context. void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { - assert(NewFn && "Cannot upgrade an intrinsic call without a new function."); - Function *F = CI->getCalledFunction(); assert(F && "CallInst has no function associated with it."); - + + if (!NewFn) { + switch(F->getIntrinsicID()) { + default: assert(0 && "Unknown function for CallInst upgrade."); + case Intrinsic::x86_sse2_movl_dq: { + std::vector Idxs; + Constant *Zero = ConstantInt::get(Type::Int32Ty, 0); + Idxs.push_back(Zero); + Idxs.push_back(Zero); + Idxs.push_back(Zero); + Idxs.push_back(Zero); + Value *ZeroV = ConstantVector::get(Idxs); + + Idxs.clear(); + Idxs.push_back(ConstantInt::get(Type::Int32Ty, 4)); + Idxs.push_back(ConstantInt::get(Type::Int32Ty, 5)); + Idxs.push_back(ConstantInt::get(Type::Int32Ty, 2)); + Idxs.push_back(ConstantInt::get(Type::Int32Ty, 3)); + Value *Mask = ConstantVector::get(Idxs); + ShuffleVectorInst *SI = new ShuffleVectorInst(ZeroV, CI->getOperand(1), + Mask, "upgraded", CI); + + // Handle any uses of the old CallInst. + if (!CI->use_empty()) + // Replace all uses of the old call with the new cast which has the + // correct type. + CI->replaceAllUsesWith(SI); + + // Clean up the old call now that it has been completely upgraded. + CI->eraseFromParent(); + break; + } + } + return; + } + switch(NewFn->getIntrinsicID()) { default: assert(0 && "Unknown function for CallInst upgrade."); case Intrinsic::x86_mmx_psll_d: @@ -257,7 +301,8 @@ assert(F && "Illegal attempt to upgrade a non-existent intrinsic."); // Upgrade the function and check if it is a totaly new function. - if (Function* NewFn = UpgradeIntrinsicFunction(F)) { + Function* NewFn; + if (UpgradeIntrinsicFunction(F, NewFn)) { if (NewFn != F) { // Replace all uses to the old function with the new one if necessary. for (Value::use_iterator UI = F->use_begin(), UE = F->use_end(); Added: llvm/trunk/test/Bitcode/sse2_movl_dq.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bitcode/sse2_movl_dq.ll?rev=45131&view=auto ============================================================================== --- llvm/trunk/test/Bitcode/sse2_movl_dq.ll (added) +++ llvm/trunk/test/Bitcode/sse2_movl_dq.ll Mon Dec 17 16:33:23 2007 @@ -0,0 +1,2 @@ +; RUN: llvm-dis < %s.bc | not grep {i32 @llvm\\.movl.dq} +; RUN: llvm-dis < %s.bc | grep shufflevector Added: llvm/trunk/test/Bitcode/sse2_movl_dq.ll.bc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bitcode/sse2_movl_dq.ll.bc?rev=45131&view=auto ============================================================================== Binary file - no diff available. Propchange: llvm/trunk/test/Bitcode/sse2_movl_dq.ll.bc ------------------------------------------------------------------------------ svn:mime-type = application/octet-stream From isanbard at gmail.com Mon Dec 17 17:07:56 2007 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 17 Dec 2007 23:07:56 -0000 Subject: [llvm-commits] [llvm] r45132 - in /llvm/trunk/lib/Target/X86: X86InstrFPStack.td X86InstrInfo.cpp X86InstrInfo.h X86InstrInfo.td X86InstrMMX.td X86InstrSSE.td X86InstrX86-64.td Message-ID: <200712172307.lBHN7vQ7032252@zion.cs.uiuc.edu> Author: void Date: Mon Dec 17 17:07:56 2007 New Revision: 45132 URL: http://llvm.org/viewvc/llvm-project?rev=45132&view=rev Log: Add "mayHaveSideEffects" and "neverHasSideEffects" flags to some instructions. I based what flag to set on whether it was already marked as "isRematerializable". If there was a further check to determine if it's "really" rematerializable, then I marked it as "mayHaveSideEffects" and created a check in the X86 back-end similar to the remat one. Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td llvm/trunk/lib/Target/X86/X86InstrInfo.cpp llvm/trunk/lib/Target/X86/X86InstrInfo.h llvm/trunk/lib/Target/X86/X86InstrInfo.td llvm/trunk/lib/Target/X86/X86InstrMMX.td llvm/trunk/lib/Target/X86/X86InstrSSE.td llvm/trunk/lib/Target/X86/X86InstrX86-64.td Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFPStack.td?rev=45132&r1=45131&r2=45132&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrFPStack.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrFPStack.td Mon Dec 17 17:07:56 2007 @@ -349,7 +349,7 @@ let isLoad = 1 in { def LD_Fp32m : FpIf32<(outs RFP32:$dst), (ins f32mem:$src), ZeroArgFP, [(set RFP32:$dst, (loadf32 addr:$src))]>; -let isReMaterializable = 1 in +let isReMaterializable = 1, mayHaveSideEffects = 1 in def LD_Fp64m : FpIf64<(outs RFP64:$dst), (ins f64mem:$src), ZeroArgFP, [(set RFP64:$dst, (loadf64 addr:$src))]>; def LD_Fp80m : FpI_<(outs RFP80:$dst), (ins f80mem:$src), ZeroArgFP, @@ -466,7 +466,7 @@ def XCH_F : FPI<0xC8, AddRegFrm, (outs), (ins RST:$op), "fxch\t$op">, D9; // Floating point constant loads. -let isReMaterializable = 1 in { +let isReMaterializable = 1, neverHasSideEffects = 1 in { def LD_Fp032 : FpIf32<(outs RFP32:$dst), (ins), ZeroArgFP, [(set RFP32:$dst, fpimm0)]>; def LD_Fp132 : FpIf32<(outs RFP32:$dst), (ins), ZeroArgFP, Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=45132&r1=45131&r2=45132&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Dec 17 17:07:56 2007 @@ -144,6 +144,40 @@ return true; } +/// isReallySideEffectFree - If the M_MAY_HAVE_SIDE_EFFECTS flag is set, this +/// method is called to determine if the specific instance of this instruction +/// has side effects. This is useful in cases of instructions, like loads, which +/// generally always have side effects. A load from a constant pool doesn't have +/// side effects, though. So we need to differentiate it from the general case. +bool X86InstrInfo::isReallySideEffectFree(MachineInstr *MI) const { + switch (MI->getOpcode()) { + default: break; + case X86::MOV8rm: + case X86::MOV16rm: + case X86::MOV16_rm: + case X86::MOV32rm: + case X86::MOV32_rm: + case X86::MOV64rm: + case X86::LD_Fp64m: + case X86::MOVSSrm: + case X86::MOVSDrm: + case X86::MOVAPSrm: + case X86::MOVAPDrm: + case X86::MMX_MOVD64rm: + case X86::MMX_MOVQ64rm: + // Loads from constant pools have no side effects + return MI->getOperand(1).isRegister() && MI->getOperand(2).isImmediate() && + MI->getOperand(3).isRegister() && MI->getOperand(4).isConstantPoolIndex() && + MI->getOperand(1).getReg() == 0 && + MI->getOperand(2).getImmedValue() == 1 && + MI->getOperand(3).getReg() == 0; + } + + // All other instances of these instructions are presumed to have side + // effects. + return false; +} + /// hasLiveCondCodeDef - True if MI has a condition code def, e.g. EFLAGS, that /// is not marked dead. static bool hasLiveCondCodeDef(MachineInstr *MI) { Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=45132&r1=45131&r2=45132&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Mon Dec 17 17:07:56 2007 @@ -240,7 +240,8 @@ unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const; unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const; bool isReallyTriviallyReMaterializable(MachineInstr *MI) const; - + bool isReallySideEffectFree(MachineInstr *MI) const; + /// convertToThreeAddress - This method must be implemented by targets that /// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target /// may be able to convert a two-address instruction into a true Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=45132&r1=45131&r2=45132&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Mon Dec 17 17:07:56 2007 @@ -563,7 +563,7 @@ "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32rr : I<0x89, MRMDestReg, (outs GR32:$dst), (ins GR32:$src), "mov{l}\t{$src, $dst|$dst, $src}", []>; -let isReMaterializable = 1 in { +let isReMaterializable = 1, neverHasSideEffects = 1 in { def MOV8ri : Ii8 <0xB0, AddRegFrm, (outs GR8 :$dst), (ins i8imm :$src), "mov{b}\t{$src, $dst|$dst, $src}", [(set GR8:$dst, imm:$src)]>; @@ -584,7 +584,7 @@ "mov{l}\t{$src, $dst|$dst, $src}", [(store (i32 imm:$src), addr:$dst)]>; -let isLoad = 1 in { +let isLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in { def MOV8rm : I<0x8A, MRMSrcMem, (outs GR8 :$dst), (ins i8mem :$src), "mov{b}\t{$src, $dst|$dst, $src}", [(set GR8:$dst, (load addr:$src))]>; @@ -2463,7 +2463,7 @@ // Alias instructions that map movr0 to xor. // FIXME: remove when we can teach regalloc that xor reg, reg is ok. -let Defs = [EFLAGS], isReMaterializable = 1 in { +let Defs = [EFLAGS], isReMaterializable = 1, neverHasSideEffects = 1 in { def MOV8r0 : I<0x30, MRMInitReg, (outs GR8 :$dst), (ins), "xor{b}\t$dst, $dst", [(set GR8:$dst, 0)]>; @@ -2486,7 +2486,7 @@ "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32_rr : I<0x89, MRMDestReg, (outs GR32_:$dst), (ins GR32_:$src), "mov{l}\t{$src, $dst|$dst, $src}", []>; -let isLoad = 1 in { +let isLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in { def MOV16_rm : I<0x8B, MRMSrcMem, (outs GR16_:$dst), (ins i16mem:$src), "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize; def MOV32_rm : I<0x8B, MRMSrcMem, (outs GR32_:$dst), (ins i32mem:$src), Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=45132&r1=45131&r2=45132&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Mon Dec 17 17:07:56 2007 @@ -158,7 +158,7 @@ // Data Transfer Instructions def MMX_MOVD64rr : MMXI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR32:$src), "movd\t{$src, $dst|$dst, $src}", []>; -let isLoad = 1, isReMaterializable = 1 in +let isLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in def MMX_MOVD64rm : MMXI<0x6E, MRMSrcMem, (outs VR64:$dst), (ins i32mem:$src), "movd\t{$src, $dst|$dst, $src}", []>; def MMX_MOVD64mr : MMXI<0x7E, MRMDestMem, (outs), (ins i32mem:$dst, VR64:$src), @@ -169,7 +169,7 @@ def MMX_MOVQ64rr : MMXI<0x6F, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src), "movq\t{$src, $dst|$dst, $src}", []>; -let isLoad = 1, isReMaterializable = 1 in +let isLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in def MMX_MOVQ64rm : MMXI<0x6F, MRMSrcMem, (outs VR64:$dst), (ins i64mem:$src), "movq\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (load_mmx addr:$src))]>; @@ -487,7 +487,7 @@ //===----------------------------------------------------------------------===// // Alias instructions that map zero vector to pxor. -let isReMaterializable = 1 in { +let isReMaterializable = 1, neverHasSideEffects = 1 in { def MMX_V_SET0 : MMXI<0xEF, MRMInitReg, (outs VR64:$dst), (ins), "pxor\t$dst, $dst", [(set VR64:$dst, (v2i32 immAllZerosV))]>; Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=45132&r1=45131&r2=45132&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Mon Dec 17 17:07:56 2007 @@ -301,7 +301,7 @@ // Move Instructions def MOVSSrr : SSI<0x10, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src), "movss\t{$src, $dst|$dst, $src}", []>; -let isLoad = 1, isReMaterializable = 1 in +let isLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in def MOVSSrm : SSI<0x10, MRMSrcMem, (outs FR32:$dst), (ins f32mem:$src), "movss\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (loadf32 addr:$src))]>; @@ -445,7 +445,7 @@ // start with 'Fs'. // Alias instructions that map fld0 to pxor for sse. -let isReMaterializable = 1 in +let isReMaterializable = 1, neverHasSideEffects = 1 in def FsFLD0SS : I<0xEF, MRMInitReg, (outs FR32:$dst), (ins), "pxor\t$dst, $dst", [(set FR32:$dst, fp32imm0)]>, Requires<[HasSSE1]>, TB, OpSize; @@ -634,7 +634,7 @@ // Move Instructions def MOVAPSrr : PSI<0x28, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), "movaps\t{$src, $dst|$dst, $src}", []>; -let isLoad = 1, isReMaterializable = 1 in +let isLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in def MOVAPSrm : PSI<0x28, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), "movaps\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (alignedloadv4f32 addr:$src))]>; @@ -940,7 +940,7 @@ "stmxcsr\t$dst", [(int_x86_sse_stmxcsr addr:$dst)]>; // Alias instructions that map zero vector to pxor / xorp* for sse. -let isReMaterializable = 1 in +let isReMaterializable = 1, neverHasSideEffects = 1 in def V_SET0 : PSI<0x57, MRMInitReg, (outs VR128:$dst), (ins), "xorps\t$dst, $dst", [(set VR128:$dst, (v4i32 immAllZerosV))]>; @@ -1003,7 +1003,7 @@ // Move Instructions def MOVSDrr : SDI<0x10, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src), "movsd\t{$src, $dst|$dst, $src}", []>; -let isLoad = 1, isReMaterializable = 1 in +let isLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in def MOVSDrm : SDI<0x10, MRMSrcMem, (outs FR64:$dst), (ins f64mem:$src), "movsd\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (loadf64 addr:$src))]>; @@ -1141,7 +1141,7 @@ // start with 'Fs'. // Alias instructions that map fld0 to pxor for sse. -let isReMaterializable = 1 in +let isReMaterializable = 1, neverHasSideEffects = 1 in def FsFLD0SD : I<0xEF, MRMInitReg, (outs FR64:$dst), (ins), "pxor\t$dst, $dst", [(set FR64:$dst, fpimm0)]>, Requires<[HasSSE2]>, TB, OpSize; @@ -1330,7 +1330,7 @@ // Move Instructions def MOVAPDrr : PDI<0x28, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), "movapd\t{$src, $dst|$dst, $src}", []>; -let isLoad = 1, isReMaterializable = 1 in +let isLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in def MOVAPDrm : PDI<0x28, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), "movapd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (alignedloadv2f64 addr:$src))]>; @@ -2119,7 +2119,7 @@ // Alias instructions that map zero vector to pxor / xorp* for sse. -let isReMaterializable = 1 in +let isReMaterializable = 1, neverHasSideEffects = 1 in def V_SETALLONES : PDI<0x76, MRMInitReg, (outs VR128:$dst), (ins), "pcmpeqd\t$dst, $dst", [(set VR128:$dst, (v4i32 immAllOnesV))]>; Modified: llvm/trunk/lib/Target/X86/X86InstrX86-64.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrX86-64.td?rev=45132&r1=45131&r2=45132&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrX86-64.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrX86-64.td Mon Dec 17 17:07:56 2007 @@ -201,7 +201,7 @@ def MOV64rr : RI<0x89, MRMDestReg, (outs GR64:$dst), (ins GR64:$src), "mov{q}\t{$src, $dst|$dst, $src}", []>; -let isReMaterializable = 1 in { +let isReMaterializable = 1, neverHasSideEffects = 1 in { def MOV64ri : RIi64<0xB8, AddRegFrm, (outs GR64:$dst), (ins i64imm:$src), "movabs{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, imm:$src)]>; @@ -1105,13 +1105,14 @@ // FIXME: remove when we can teach regalloc that xor reg, reg is ok. // FIXME: AddedComplexity gives MOV64r0 a higher priority than MOV64ri32. Remove // when we have a better way to specify isel priority. -let Defs = [EFLAGS], AddedComplexity = 1, isReMaterializable = 1 in +let Defs = [EFLAGS], AddedComplexity = 1, isReMaterializable = 1, + neverHasSideEffects = 1 in def MOV64r0 : RI<0x31, MRMInitReg, (outs GR64:$dst), (ins), "xor{l}\t${dst:subreg32}, ${dst:subreg32}", [(set GR64:$dst, 0)]>; // Materialize i64 constant where top 32-bits are zero. -let AddedComplexity = 1, isReMaterializable = 1 in +let AddedComplexity = 1, isReMaterializable = 1, neverHasSideEffects = 1 in def MOV64ri64i32 : Ii32<0xB8, AddRegFrm, (outs GR64:$dst), (ins i64i32imm:$src), "mov{l}\t{$src, ${dst:subreg32}|${dst:subreg32}, $src}", [(set GR64:$dst, i64immZExt32:$src)]>; From clattner at apple.com Mon Dec 17 17:12:07 2007 From: clattner at apple.com (Chris Lattner) Date: Mon, 17 Dec 2007 15:12:07 -0800 Subject: [llvm-commits] [llvm] r45108 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Transforms/Utils/InlineFunction.cpp lib/VMCore/Verifier.cpp test/CodeGen/Generic/2007-12-17-InvokeAsm.ll test/Transforms/Inline/2007-04-15-InlineEH.ll In-Reply-To: <200712171808.lBHI8JA7014759@zion.cs.uiuc.edu> References: <200712171808.lBHI8JA7014759@zion.cs.uiuc.edu> Message-ID: <6ED08A42-848F-4763-89A5-6B46F167951D@apple.com> On Dec 17, 2007, at 10:08 AM, Duncan Sands wrote: > Author: baldrick > Date: Mon Dec 17 12:08:19 2007 > New Revision: 45108 > > URL: http://llvm.org/viewvc/llvm-project?rev=45108&view=rev > Log: > Make invokes of inline asm legal. Teach codegen > how to lower them (with no attempt made to be > efficient, since they should only occur for > unoptimized code). Woot, thanks Duncan. Please update langref if it says invoke (asm) is invalid. -Chris From clattner at apple.com Mon Dec 17 17:13:41 2007 From: clattner at apple.com (Chris Lattner) Date: Mon, 17 Dec 2007 15:13:41 -0800 Subject: [llvm-commits] [llvm] r45022 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/Target/Target.td utils/TableGen/CodeGenInstruction.h utils/TableGen/CodeGenTarget.cpp utils/TableGen/InstrInfoEmitter.cpp In-Reply-To: <16e5fdf90712171252m72e6c6fcwe2498bb185577fb0@mail.gmail.com> References: <200712140148.lBE1mxh2005906@zion.cs.uiuc.edu> <8940D3A8-8C32-422E-A08A-BC0133789643@apple.com> <16e5fdf90712171140i45c63023nfe786e94f5e22ff5@mail.gmail.com> <16e5fdf90712171252m72e6c6fcwe2498bb185577fb0@mail.gmail.com> Message-ID: On Dec 17, 2007, at 12:52 PM, Bill Wendling wrote: > On Dec 17, 2007 12:46 PM, Evan Cheng wrote: >> On Dec 17, 2007, at 11:40 AM, Bill Wendling wrote: >>>> As others have pointed out, we need to be much more clear about >>>> what >>>> these mean. Specifically, I'd list "NEVER" first (it is easier to >>>> explain). The pertinent point here is completely missing in the >>>> comments: this flag is set on an instruction where there is a side >>>> effect that is not captured by any *operands* of the instruction or >>>> *other flags*. Instructions that are "isBranch" instructions but >>>> have >>>> no other side effects should have M_NEVER_HAS_SIDE_EFFECTS set. >>>> This >>>> flag should only be set on an instruction when *all instances* >>>> of an >>>> instruction of that opcode have no side effects in this way. >>>> >>> I'm confused. If we set this for an instruction where there is a >>> side >> >> I am pretty sure he meant the opposite. If >> M_NEVER_HAS_SIDE_EFFECTS is >> set, that means the instruction would never have any side effects >> that >> are not captured in the operands. >> > Okay. That makes more sense to me. I thought that there might have > been a "not" or something missing. :-) Yeah, you're both right, sorry! :) One clarification: "not captured by operands or *other flags*". :) -Chris From clattner at apple.com Mon Dec 17 17:15:04 2007 From: clattner at apple.com (Chris Lattner) Date: Mon, 17 Dec 2007 15:15:04 -0800 Subject: [llvm-commits] [llvm] r45126 - /llvm/trunk/include/llvm/Target/TargetInstrInfo.h In-Reply-To: <200712172153.lBHLrVwg028230@zion.cs.uiuc.edu> References: <200712172153.lBHLrVwg028230@zion.cs.uiuc.edu> Message-ID: <3B217DFA-69CD-49D5-B269-F9B04D31F4AC@apple.com> On Dec 17, 2007, at 1:53 PM, Bill Wendling wrote: > > ====================================================================== > ======== > --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original) > +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Dec 17 > 15:53:30 2007 > @@ -314,6 +314,15 @@ > isReallyTriviallyReMaterializable(MI); > } > > + /// hasSideEffects - Returns true if the instruction has side > effects that are > + /// not captured by any operands of the instruction or other flags. > + bool hasSideEffects(MachineInstr *MI) const { How about "hasUnmodelledSideEffects() ? I would expect a method named 'hasSideEffects' to return true if flags/operands indicate a side effect. -Chris From isanbard at gmail.com Mon Dec 17 17:17:12 2007 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 17 Dec 2007 15:17:12 -0800 Subject: [llvm-commits] [llvm] r45126 - /llvm/trunk/include/llvm/Target/TargetInstrInfo.h In-Reply-To: <3B217DFA-69CD-49D5-B269-F9B04D31F4AC@apple.com> References: <200712172153.lBHLrVwg028230@zion.cs.uiuc.edu> <3B217DFA-69CD-49D5-B269-F9B04D31F4AC@apple.com> Message-ID: <16e5fdf90712171517x31df82c1k60472501bacd0409@mail.gmail.com> On Dec 17, 2007 3:15 PM, Chris Lattner wrote: > > > + /// hasSideEffects - Returns true if the instruction has side > > effects that are > > + /// not captured by any operands of the instruction or other flags. > > + bool hasSideEffects(MachineInstr *MI) const { > > How about "hasUnmodelledSideEffects() ? > > I would expect a method named 'hasSideEffects' to return true if > flags/operands indicate a side effect. > Good point. I'll make the change. :-) -bw From isanbard at gmail.com Mon Dec 17 17:19:54 2007 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 17 Dec 2007 23:19:54 -0000 Subject: [llvm-commits] [llvm] r45133 - /llvm/trunk/include/llvm/Target/TargetInstrInfo.h Message-ID: <200712172319.lBHNJsdD000418@zion.cs.uiuc.edu> Author: void Date: Mon Dec 17 17:19:54 2007 New Revision: 45133 URL: http://llvm.org/viewvc/llvm-project?rev=45133&view=rev Log: s/hasSideEffects/hasUnmodelledSideEffects/g Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=45133&r1=45132&r2=45133&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Dec 17 17:19:54 2007 @@ -314,9 +314,10 @@ isReallyTriviallyReMaterializable(MI); } - /// hasSideEffects - Returns true if the instruction has side effects that are - /// not captured by any operands of the instruction or other flags. - bool hasSideEffects(MachineInstr *MI) const { + /// hasUnmodelledSideEffects - Returns true if the instruction has side + /// effects that are not captured by any operands of the instruction or other + /// flags. + bool hasUnmodelledSideEffects(MachineInstr *MI) const { const TargetInstrDescriptor *TID = MI->getInstrDescriptor(); if (!(TID->Flags & M_NEVER_HAS_SIDE_EFFECTS || TID->Flags & M_MAY_HAVE_SIDE_EFFECTS)) return true; From clattner at apple.com Mon Dec 17 17:24:58 2007 From: clattner at apple.com (Chris Lattner) Date: Mon, 17 Dec 2007 15:24:58 -0800 Subject: [llvm-commits] [llvm] r45120 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/Target/Target.td In-Reply-To: <200712172102.lBHL276u024863@zion.cs.uiuc.edu> References: <200712172102.lBHL276u024863@zion.cs.uiuc.edu> Message-ID: <279C6A9F-E673-4174-B1F1-2745EE25DDEA@apple.com> On Dec 17, 2007, at 1:02 PM, Bill Wendling wrote: > As per feedback, revised comments to (hopefully) make the different > side effect > flags clearer. > > ====================================================================== > ======== > --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original) > +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Dec 17 > 15:02:07 2007 > @@ -91,17 +91,23 @@ > // ARM instructions which can set condition code if 's' bit is set. > const unsigned M_HAS_OPTIONAL_DEF = 1 << 17; > > +// M_NEVER_HAS_SIDE_EFFECTS - Set if this instruction has no side > effects that > +// are not captured by any operands of the instruction or other > flags, and when > +// *all* instances of the instruction of that opcode have no side > effects. > +// > +// Note: This and M_MAY_HAVE_SIDE_EFFECTS are mutually exclusive. > You can't set > +// both! If neither flag is set, then the instruction *always* has > side effects. Nice! -Chris From scottm at aero.org Mon Dec 17 17:45:52 2007 From: scottm at aero.org (Scott Michel) Date: Mon, 17 Dec 2007 23:45:52 -0000 Subject: [llvm-commits] [llvm] r45134 - /llvm/trunk/test/CodeGen/CellSPU/immed32.ll Message-ID: <200712172345.lBHNjqR4001768@zion.cs.uiuc.edu> Author: pingbak Date: Mon Dec 17 17:45:52 2007 New Revision: 45134 URL: http://llvm.org/viewvc/llvm-project?rev=45134&view=rev Log: i32 immediate constant test case for CellSPU Added: llvm/trunk/test/CodeGen/CellSPU/immed32.ll Added: llvm/trunk/test/CodeGen/CellSPU/immed32.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/immed32.ll?rev=45134&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/immed32.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/immed32.ll Mon Dec 17 17:45:52 2007 @@ -0,0 +1,70 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep ilhu %t1.s | count 8 && +; RUN: grep iohl %t1.s | count 6 && +; RUN: grep il %t1.s | count 11 && +; RUN: grep 16429 %t1.s | count 1 && +; RUN: grep 63572 %t1.s | count 1 && +; RUN: grep 128 %t1.s | count 1 && +; RUN: grep 32639 %t1.s | count 1 && +; RUN: grep 65535 %t1.s | count 1 && +; RUN: grep 16457 %t1.s | count 1 && +; RUN: grep 4059 %t1.s | count 1 && +; RUN: grep 49077 %t1.s | count 1 && +; RUN: grep 1267 %t1.s | count 2 && +; RUN: grep 16309 %t1.s | count 1 + +define i32 @test_1() { + ret i32 4784128 ;; ILHU via pattern (0x49000) +} + +define i32 @test_2() { + ret i32 5308431 ;; ILHU/IOHL via pattern (0x5100f) +} + +define i32 @test_3() { + ret i32 511 ;; IL via pattern +} + +define i32 @test_4() { + ret i32 -512 ;; IL via pattern +} + +;; double float floatval +;; 0x4005bf0a80000000 0x402d|f854 2.718282 +define float @float_const_1() { + ret float 0x4005BF0A80000000 ;; ILHU/IOHL +} + +;; double float floatval +;; 0x3810000000000000 0x0080|0000 0.000000 +define float @float_const_2() { + ret float 0x3810000000000000 ;; IL 128 +} + +;; double float floatval +;; 0x47efffffe0000000 0x7f7f|ffff NaN +define float @float_const_3() { + ret float 0x47EFFFFFE0000000 ;; ILHU/IOHL via pattern +} + +;; double float floatval +;; 0x400921fb60000000 0x4049|0fdb 3.141593 +define float @float_const_4() { + ret float 0x400921FB60000000 ;; ILHU/IOHL via pattern +} + +;; double float floatval +;; 0xbff6a09e60000000 0xbfb5|04f3 -1.414214 +define float @float_const_5() { + ret float 0xBFF6A09E60000000 ;; ILHU/IOHL via pattern +} + +;; double float floatval +;; 0x3ff6a09e60000000 0x3fb5|04f3 1.414214 +define float @float_const_6() { + ret float 0x3FF6A09E60000000 ;; ILHU/IOHL via pattern +} + +define float @float_const_7() { + ret float 0.000000e+00 ;; IL 0 via pattern +} From isanbard at gmail.com Mon Dec 17 18:06:14 2007 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 17 Dec 2007 16:06:14 -0800 Subject: [llvm-commits] [llvm] r45134 - /llvm/trunk/test/CodeGen/CellSPU/immed32.ll In-Reply-To: <200712172345.lBHNjqR4001768@zion.cs.uiuc.edu> References: <200712172345.lBHNjqR4001768@zion.cs.uiuc.edu> Message-ID: <16e5fdf90712171606k54be503r4086b8a528c751c0@mail.gmail.com> Hi Scott, > --- llvm/trunk/test/CodeGen/CellSPU/immed32.ll (added) > +++ llvm/trunk/test/CodeGen/CellSPU/immed32.ll Mon Dec 17 17:45:52 2007 > @@ -0,0 +1,70 @@ > +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s > +; RUN: grep ilhu %t1.s | count 8 && > +; RUN: grep iohl %t1.s | count 6 && > +; RUN: grep il %t1.s | count 11 && > +; RUN: grep 16429 %t1.s | count 1 && > +; RUN: grep 63572 %t1.s | count 1 && > +; RUN: grep 128 %t1.s | count 1 && > +; RUN: grep 32639 %t1.s | count 1 && > +; RUN: grep 65535 %t1.s | count 1 && > +; RUN: grep 16457 %t1.s | count 1 && > +; RUN: grep 4059 %t1.s | count 1 && > +; RUN: grep 49077 %t1.s | count 1 && > +; RUN: grep 1267 %t1.s | count 2 && > +; RUN: grep 16309 %t1.s | count 1 > + I don't think you need the "&&" here anymore. -bw From lattner at apple.com Mon Dec 17 18:05:51 2007 From: lattner at apple.com (Tanya Lattner) Date: Mon, 17 Dec 2007 16:05:51 -0800 Subject: [llvm-commits] [llvm] r45134 - /llvm/trunk/test/CodeGen/CellSPU/immed32.ll In-Reply-To: <200712172345.lBHNjqR4001768@zion.cs.uiuc.edu> References: <200712172345.lBHNjqR4001768@zion.cs.uiuc.edu> Message-ID: FYI.. You don't need the && on the end of each line. The test will fail if any of the run lines do not succeed. -Tanya On Dec 17, 2007, at 3:45 PM, Scott Michel wrote: > Author: pingbak > Date: Mon Dec 17 17:45:52 2007 > New Revision: 45134 > > URL: http://llvm.org/viewvc/llvm-project?rev=45134&view=rev > Log: > i32 immediate constant test case for CellSPU > > Added: > llvm/trunk/test/CodeGen/CellSPU/immed32.ll > > Added: llvm/trunk/test/CodeGen/CellSPU/immed32.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ > CellSPU/immed32.ll?rev=45134&view=auto > > ====================================================================== > ======== > --- llvm/trunk/test/CodeGen/CellSPU/immed32.ll (added) > +++ llvm/trunk/test/CodeGen/CellSPU/immed32.ll Mon Dec 17 17:45:52 > 2007 > @@ -0,0 +1,70 @@ > +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s > +; RUN: grep ilhu %t1.s | count 8 && > +; RUN: grep iohl %t1.s | count 6 && > +; RUN: grep il %t1.s | count 11 && > +; RUN: grep 16429 %t1.s | count 1 && > +; RUN: grep 63572 %t1.s | count 1 && > +; RUN: grep 128 %t1.s | count 1 && > +; RUN: grep 32639 %t1.s | count 1 && > +; RUN: grep 65535 %t1.s | count 1 && > +; RUN: grep 16457 %t1.s | count 1 && > +; RUN: grep 4059 %t1.s | count 1 && > +; RUN: grep 49077 %t1.s | count 1 && > +; RUN: grep 1267 %t1.s | count 2 && > +; RUN: grep 16309 %t1.s | count 1 > + > +define i32 @test_1() { > + ret i32 4784128 ;; ILHU via pattern (0x49000) > +} > + > +define i32 @test_2() { > + ret i32 5308431 ;; ILHU/IOHL via pattern (0x5100f) > +} > + > +define i32 @test_3() { > + ret i32 511 ;; IL via pattern > +} > + > +define i32 @test_4() { > + ret i32 -512 ;; IL via pattern > +} > + > +;; double float floatval > +;; 0x4005bf0a80000000 0x402d|f854 2.718282 > +define float @float_const_1() { > + ret float 0x4005BF0A80000000 ;; ILHU/IOHL > +} > + > +;; double float floatval > +;; 0x3810000000000000 0x0080|0000 0.000000 > +define float @float_const_2() { > + ret float 0x3810000000000000 ;; IL 128 > +} > + > +;; double float floatval > +;; 0x47efffffe0000000 0x7f7f|ffff NaN > +define float @float_const_3() { > + ret float 0x47EFFFFFE0000000 ;; ILHU/IOHL via pattern > +} > + > +;; double float floatval > +;; 0x400921fb60000000 0x4049|0fdb 3.141593 > +define float @float_const_4() { > + ret float 0x400921FB60000000 ;; ILHU/IOHL via pattern > +} > + > +;; double float floatval > +;; 0xbff6a09e60000000 0xbfb5|04f3 -1.414214 > +define float @float_const_5() { > + ret float 0xBFF6A09E60000000 ;; ILHU/IOHL via pattern > +} > + > +;; double float floatval > +;; 0x3ff6a09e60000000 0x3fb5|04f3 1.414214 > +define float @float_const_6() { > + ret float 0x3FF6A09E60000000 ;; ILHU/IOHL via pattern > +} > + > +define float @float_const_7() { > + ret float 0.000000e+00 ;; IL 0 via pattern > +} > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Mon Dec 17 18:27:34 2007 From: clattner at apple.com (Chris Lattner) Date: Mon, 17 Dec 2007 16:27:34 -0800 Subject: [llvm-commits] [llvm] r45131 - in /llvm/trunk: include/llvm/AutoUpgrade.h include/llvm/IntrinsicsX86.td lib/Bitcode/Reader/BitcodeReader.cpp lib/VMCore/AutoUpgrade.cpp test/Bitcode/sse2_movl_dq.ll test/Bitcode/sse2_movl_dq.ll.bc In-Reply-To: <200712172233.lBHMXO9U030150@zion.cs.uiuc.edu> References: <200712172233.lBHMXO9U030150@zion.cs.uiuc.edu> Message-ID: <9B1F1868-405A-4C31-A1F3-FBD9CA5063AC@apple.com> On Dec 17, 2007, at 2:33 PM, Evan Cheng wrote: > Author: evancheng > Date: Mon Dec 17 16:33:23 2007 > New Revision: 45131 > > URL: http://llvm.org/viewvc/llvm-project?rev=45131&view=rev > Log: > Bring back int_x86_sse2_movl_dq intrinsic for backward > compatibility. Make sure > it's auto-upgraded to a shufflevector instruction. Nice, thanks Evan. > +++ llvm/trunk/include/llvm/IntrinsicsX86.td Mon Dec 17 16:33:23 2007 > @@ -460,6 +460,8 @@ > def int_x86_sse2_packuswb_128 : > GCCBuiltin<"__builtin_ia32_packuswb128">, > Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, > llvm_v8i16_ty], [IntrNoMem]>; > + def int_x86_sse2_movl_dq : GCCBuiltin<"__builtin_ia32_movqv4si">, > + Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>; I don't think this is need anymore? The intrinsic can't get past the bc/ll readers now. -Chris From clattner at apple.com Mon Dec 17 18:29:13 2007 From: clattner at apple.com (Chris Lattner) Date: Mon, 17 Dec 2007 16:29:13 -0800 Subject: [llvm-commits] [llvm] r45128 - /llvm/trunk/lib/Target/X86/X86InstrFPStack.td In-Reply-To: <200712172217.lBHMHEt5029344@zion.cs.uiuc.edu> References: <200712172217.lBHMHEt5029344@zion.cs.uiuc.edu> Message-ID: <4A1C9E20-6EC5-4018-9DC0-19CAF9D0AC3E@apple.com> On Dec 17, 2007, at 2:17 PM, Bill Wendling wrote: > Author: void > Date: Mon Dec 17 16:17:14 2007 > New Revision: 45128 > > URL: http://llvm.org/viewvc/llvm-project?rev=45128&view=rev > Log: > LD_Fp64m should have "isRematerializable" set. It should? -Chris > Modified: > llvm/trunk/lib/Target/X86/X86InstrFPStack.td > > Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/ > X86InstrFPStack.td?rev=45128&r1=45127&r2=45128&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/Target/X86/X86InstrFPStack.td (original) > +++ llvm/trunk/lib/Target/X86/X86InstrFPStack.td Mon Dec 17 > 16:17:14 2007 > @@ -349,7 +349,8 @@ > let isLoad = 1 in { > def LD_Fp32m : FpIf32<(outs RFP32:$dst), (ins f32mem:$src), > ZeroArgFP, > [(set RFP32:$dst, (loadf32 addr:$src))]>; > -def LD_Fp64m : FpIf64<(outs RFP64:$dst), (ins f64mem:$src), > ZeroArgFP, > +let isReMaterializable = 1 in > + def LD_Fp64m : FpIf64<(outs RFP64:$dst), (ins f64mem:$src), > ZeroArgFP, > [(set RFP64:$dst, (loadf64 addr:$src))]>; > def LD_Fp80m : FpI_<(outs RFP80:$dst), (ins f80mem:$src), > ZeroArgFP, > [(set RFP80:$dst, (loadf80 addr:$src))]>; > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Mon Dec 17 18:31:53 2007 From: clattner at apple.com (Chris Lattner) Date: Mon, 17 Dec 2007 16:31:53 -0800 Subject: [llvm-commits] [llvm] r45128 - /llvm/trunk/lib/Target/X86/X86InstrFPStack.td In-Reply-To: <4A1C9E20-6EC5-4018-9DC0-19CAF9D0AC3E@apple.com> References: <200712172217.lBHMHEt5029344@zion.cs.uiuc.edu> <4A1C9E20-6EC5-4018-9DC0-19CAF9D0AC3E@apple.com> Message-ID: On Dec 17, 2007, at 4:29 PM, Chris Lattner wrote: > > On Dec 17, 2007, at 2:17 PM, Bill Wendling wrote: > >> Author: void >> Date: Mon Dec 17 16:17:14 2007 >> New Revision: 45128 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=45128&view=rev >> Log: >> LD_Fp64m should have "isRematerializable" set. > > It should? Oh right, because isReallyTriviallyReMaterializable handles it. Doh, I hate that flag :-) -Chris From dalej at apple.com Mon Dec 17 18:36:44 2007 From: dalej at apple.com (Dale Johannesen) Date: Tue, 18 Dec 2007 00:36:44 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r45137 - /llvm-gcc-4.2/trunk/gcc/passes.c Message-ID: <200712180036.lBI0ajk3004785@zion.cs.uiuc.edu> Author: johannes Date: Mon Dec 17 18:36:44 2007 New Revision: 45137 URL: http://llvm.org/viewvc/llvm-project?rev=45137&view=rev Log: Disable profiling as it was on 4.0. Prevents ICEs. Modified: llvm-gcc-4.2/trunk/gcc/passes.c Modified: llvm-gcc-4.2/trunk/gcc/passes.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/passes.c?rev=45137&r1=45136&r2=45137&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/passes.c (original) +++ llvm-gcc-4.2/trunk/gcc/passes.c Mon Dec 17 18:36:44 2007 @@ -511,11 +511,19 @@ #endif /* LLVM LOCAL end */ NEXT_PASS (pass_warn_function_return); + /* LLVM LOCAL begin */ +#ifndef ENABLE_LLVM NEXT_PASS (pass_early_tree_profile); +#endif + /* LLVM LOCAL end */ *p = NULL; p = &pass_early_local_passes.sub; + /* LLVM LOCAL begin */ +#ifndef ENABLE_LLVM NEXT_PASS (pass_tree_profile); +#endif + /* LLVM LOCAL end */ NEXT_PASS (pass_cleanup_cfg); NEXT_PASS (pass_rebuild_cgraph_edges); *p = NULL; From isanbard at gmail.com Mon Dec 17 18:43:59 2007 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 17 Dec 2007 16:43:59 -0800 Subject: [llvm-commits] [llvm] r45128 - /llvm/trunk/lib/Target/X86/X86InstrFPStack.td In-Reply-To: References: <200712172217.lBHMHEt5029344@zion.cs.uiuc.edu> <4A1C9E20-6EC5-4018-9DC0-19CAF9D0AC3E@apple.com> Message-ID: <16e5fdf90712171643g3bf0652bk1c946d70adca0ae1@mail.gmail.com> On Dec 17, 2007 4:31 PM, Chris Lattner wrote: > > On Dec 17, 2007, at 4:29 PM, Chris Lattner wrote: > > > > > On Dec 17, 2007, at 2:17 PM, Bill Wendling wrote: > > > >> Author: void > >> Date: Mon Dec 17 16:17:14 2007 > >> New Revision: 45128 > >> > >> URL: http://llvm.org/viewvc/llvm-project?rev=45128&view=rev > >> Log: > >> LD_Fp64m should have "isRematerializable" set. > > > > It should? > > Oh right, because isReallyTriviallyReMaterializable handles it. > > Doh, I hate that flag :-) > LOL. Yeah, it's not 100% great. I also added the isRemat flag to other functions that that method deals with (and marked them appropriately for LICM). -bw From evan.cheng at apple.com Mon Dec 17 18:45:21 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 17 Dec 2007 16:45:21 -0800 Subject: [llvm-commits] [llvm] r45131 - in /llvm/trunk: include/llvm/AutoUpgrade.h include/llvm/IntrinsicsX86.td lib/Bitcode/Reader/BitcodeReader.cpp lib/VMCore/AutoUpgrade.cpp test/Bitcode/sse2_movl_dq.ll test/Bitcode/sse2_movl_dq.ll.bc In-Reply-To: <9B1F1868-405A-4C31-A1F3-FBD9CA5063AC@apple.com> References: <200712172233.lBHMXO9U030150@zion.cs.uiuc.edu> <9B1F1868-405A-4C31-A1F3-FBD9CA5063AC@apple.com> Message-ID: On Dec 17, 2007, at 4:27 PM, Chris Lattner wrote: > > On Dec 17, 2007, at 2:33 PM, Evan Cheng wrote: > >> Author: evancheng >> Date: Mon Dec 17 16:33:23 2007 >> New Revision: 45131 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=45131&view=rev >> Log: >> Bring back int_x86_sse2_movl_dq intrinsic for backward >> compatibility. Make sure >> it's auto-upgraded to a shufflevector instruction. > > Nice, thanks Evan. > >> +++ llvm/trunk/include/llvm/IntrinsicsX86.td Mon Dec 17 16:33:23 2007 >> @@ -460,6 +460,8 @@ >> def int_x86_sse2_packuswb_128 : >> GCCBuiltin<"__builtin_ia32_packuswb128">, >> Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, >> llvm_v8i16_ty], [IntrNoMem]>; >> + def int_x86_sse2_movl_dq : GCCBuiltin<"__builtin_ia32_movqv4si">, >> + Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], >> [IntrNoMem]>; > > I don't think this is need anymore? The intrinsic can't get past the > bc/ll readers now. AutoUpgrade.cpp has to recognize it somehow? switch(F->getIntrinsicID()) { case Intrinsic::x86_sse2_movl_dq: { ... } Evan > > > -Chris > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dalej at apple.com Mon Dec 17 18:46:57 2007 From: dalej at apple.com (Dale Johannesen) Date: Tue, 18 Dec 2007 00:46:57 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r45138 - in /llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg: pr23584.c pure-1.c Message-ID: <200712180046.lBI0kvZv005185@zion.cs.uiuc.edu> Author: johannes Date: Mon Dec 17 18:46:57 2007 New Revision: 45138 URL: http://llvm.org/viewvc/llvm-project?rev=45138&view=rev Log: Disable some new -fdump tests for llvm. Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pr23584.c llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pure-1.c Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pr23584.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pr23584.c?rev=45138&r1=45137&r2=45138&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pr23584.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pr23584.c Mon Dec 17 18:46:57 2007 @@ -4,6 +4,8 @@ /* { dg-do compile } */ /* { dg-options "-O1 -fdump-ipa-pure-const" } */ +/* LLVM LOCAL test not applicable */ +/* { dg-require-fdump "" } */ int test1 (void) { Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pure-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pure-1.c?rev=45138&r1=45137&r2=45138&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pure-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pure-1.c Mon Dec 17 18:46:57 2007 @@ -4,6 +4,8 @@ /* { dg-do compile } */ /* { dg-options "-O1 -fdump-ipa-pure-const" } */ +/* LLVM LOCAL test not applicable */ +/* { dg-require-fdump "" } */ struct test_a { volatile int a; }; From clattner at apple.com Mon Dec 17 18:48:11 2007 From: clattner at apple.com (Chris Lattner) Date: Mon, 17 Dec 2007 16:48:11 -0800 Subject: [llvm-commits] [llvm] r45131 - in /llvm/trunk: include/llvm/AutoUpgrade.h include/llvm/IntrinsicsX86.td lib/Bitcode/Reader/BitcodeReader.cpp lib/VMCore/AutoUpgrade.cpp test/Bitcode/sse2_movl_dq.ll test/Bitcode/sse2_movl_dq.ll.bc In-Reply-To: References: <200712172233.lBHMXO9U030150@zion.cs.uiuc.edu> <9B1F1868-405A-4C31-A1F3-FBD9CA5063AC@apple.com> Message-ID: >>> +++ llvm/trunk/include/llvm/IntrinsicsX86.td Mon Dec 17 16:33:23 >>> 2007 >>> @@ -460,6 +460,8 @@ >>> def int_x86_sse2_packuswb_128 : >>> GCCBuiltin<"__builtin_ia32_packuswb128">, >>> Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, >>> llvm_v8i16_ty], [IntrNoMem]>; >>> + def int_x86_sse2_movl_dq : GCCBuiltin<"__builtin_ia32_movqv4si">, >>> + Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], >>> [IntrNoMem]>; >> >> I don't think this is need anymore? The intrinsic can't get past the >> bc/ll readers now. > > AutoUpgrade.cpp has to recognize it somehow? > > switch(F->getIntrinsicID()) { > case Intrinsic::x86_sse2_movl_dq: { > ... > } if (!strcmp(F->getNameStart(), "llvm.foo")) ? The "nice" thing about this is that it hides the upgrading grossness in one place instead of leaving a turd in the public .td file. -Chris From lattner at apple.com Mon Dec 17 18:48:13 2007 From: lattner at apple.com (Tanya Lattner) Date: Mon, 17 Dec 2007 16:48:13 -0800 Subject: [llvm-commits] [llvm] r45027 - in /llvm/trunk: include/llvm/IntrinsicsX86.td lib/VMCore/AutoUpgrade.cpp test/Assembler/AutoUpgradeIntrinsics.ll In-Reply-To: <200712140638.lBE6csKG028926@zion.cs.uiuc.edu> References: <200712140638.lBE6csKG028926@zion.cs.uiuc.edu> Message-ID: <9F20DF58-A59F-4C22-B197-EABAE6BFD7CD@apple.com> > > ====================================================================== > ======== > --- llvm/trunk/test/Assembler/AutoUpgradeIntrinsics.ll (original) > +++ llvm/trunk/test/Assembler/AutoUpgradeIntrinsics.ll Fri Dec 14 > 00:38:54 2007 > @@ -6,6 +6,8 @@ > ; RUN: not grep {llvm\\.part\\.select\\.i\[0-9\]*\\.i\[0-9\]*} > ; RUN: llvm-as < %s | llvm-dis | \ > ; RUN: not grep {llvm\\.bswap\\.i\[0-9\]*\\.i\[0-9\]*} > +; RUN: llvm-as < %s | llvm-dis | \ > +; RUN: grep {llvm\\.x86\\.mmx\\.ps} | grep {2 x i32> | count 6 > You are missing the closing curly brace on the last grep in the last line. -Tanya > declare i32 @llvm.ctpop.i28(i28 %val) > declare i32 @llvm.cttz.i29(i29 %val) > @@ -50,3 +52,30 @@ > ret i32 %d > } > > +declare <4 x i16> @llvm.x86.mmx.psra.w(<4 x i16>, <2 x i32>) > nounwind readnone > +declare <4 x i16> @llvm.x86.mmx.psll.w(<4 x i16>, <2 x i32>) > nounwind readnone > +declare <4 x i16> @llvm.x86.mmx.psrl.w(<4 x i16>, <2 x i32>) > nounwind readnone > +define void @sh16(<4 x i16> %A, <2 x i32> %B) { > + %r1 = call <4 x i16> @llvm.x86.mmx.psra.w( <4 x i16> %A, <2 x > i32> %B ) ; <<4 x i16>> [#uses=0] > + %r2 = call <4 x i16> @llvm.x86.mmx.psll.w( <4 x i16> %A, <2 x > i32> %B ) ; <<4 x i16>> [#uses=0] > + %r3 = call <4 x i16> @llvm.x86.mmx.psrl.w( <4 x i16> %A, <2 x > i32> %B ) ; <<4 x i16>> [#uses=0] > + ret void > +} > + > +declare <2 x i32> @llvm.x86.mmx.psra.d(<2 x i32>, <2 x i32>) > nounwind readnone > +declare <2 x i32> @llvm.x86.mmx.psll.d(<2 x i32>, <2 x i32>) > nounwind readnone > +declare <2 x i32> @llvm.x86.mmx.psrl.d(<2 x i32>, <2 x i32>) > nounwind readnone > +define void @sh32(<2 x i32> %A, <2 x i32> %B) { > + %r1 = call <2 x i32> @llvm.x86.mmx.psra.d( <2 x i32> %A, <2 x > i32> %B ) ; <<2 x i32>> [#uses=0] > + %r2 = call <2 x i32> @llvm.x86.mmx.psll.d( <2 x i32> %A, <2 x > i32> %B ) ; <<2 x i32>> [#uses=0] > + %r3 = call <2 x i32> @llvm.x86.mmx.psrl.d( <2 x i32> %A, <2 x > i32> %B ) ; <<2 x i32>> [#uses=0] > + ret void > +} > + > +declare <1 x i64> @llvm.x86.mmx.psll.q(<1 x i64>, <2 x i32>) > nounwind readnone > +declare <1 x i64> @llvm.x86.mmx.psrl.q(<1 x i64>, <2 x i32>) > nounwind readnone > +define void @sh64(<1 x i64> %A, <2 x i32> %B) { > + %r1 = call <1 x i64> @llvm.x86.mmx.psll.q( <1 x i64> %A, <2 x > i32> %B ) ; <<1 x i64>> [#uses=0] > + %r2 = call <1 x i64> @llvm.x86.mmx.psrl.q( <1 x i64> %A, <2 x > i32> %B ) ; <<1 x i64>> [#uses=0] > + ret void > +} > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Mon Dec 17 18:52:20 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 18 Dec 2007 00:52:20 -0000 Subject: [llvm-commits] [llvm] r45139 - /llvm/trunk/include/llvm/IntrinsicsX86.td Message-ID: <200712180052.lBI0qKC4005433@zion.cs.uiuc.edu> Author: evancheng Date: Mon Dec 17 18:52:20 2007 New Revision: 45139 URL: http://llvm.org/viewvc/llvm-project?rev=45139&view=rev Log: These have matching builtin's in 4.2. Modified: llvm/trunk/include/llvm/IntrinsicsX86.td Modified: llvm/trunk/include/llvm/IntrinsicsX86.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsX86.td?rev=45139&r1=45138&r2=45139&view=diff ============================================================================== --- llvm/trunk/include/llvm/IntrinsicsX86.td (original) +++ llvm/trunk/include/llvm/IntrinsicsX86.td Mon Dec 17 18:52:20 2007 @@ -339,10 +339,10 @@ def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">, Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty, llvm_i32_ty], [IntrNoMem]>; - def int_x86_sse2_psra_w : + def int_x86_sse2_psra_w : GCCBuiltin<"__builtin_ia32_psraw128">, Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4i32_ty], [IntrNoMem]>; - def int_x86_sse2_psra_d : + def int_x86_sse2_psra_d : GCCBuiltin<"__builtin_ia32_psrad128">, Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>; } From evan.cheng at apple.com Mon Dec 17 19:04:26 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 18 Dec 2007 01:04:26 -0000 Subject: [llvm-commits] [llvm] r45140 - in /llvm/trunk: include/llvm/IntrinsicsX86.td lib/VMCore/AutoUpgrade.cpp Message-ID: <200712180104.lBI14QBS006263@zion.cs.uiuc.edu> Author: evancheng Date: Mon Dec 17 19:04:25 2007 New Revision: 45140 URL: http://llvm.org/viewvc/llvm-project?rev=45140&view=rev Log: Remove int_x86_sse2_movl_dq. It's replaced with a string compare. Modified: llvm/trunk/include/llvm/IntrinsicsX86.td llvm/trunk/lib/VMCore/AutoUpgrade.cpp Modified: llvm/trunk/include/llvm/IntrinsicsX86.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsX86.td?rev=45140&r1=45139&r2=45140&view=diff ============================================================================== --- llvm/trunk/include/llvm/IntrinsicsX86.td (original) +++ llvm/trunk/include/llvm/IntrinsicsX86.td Mon Dec 17 19:04:25 2007 @@ -460,8 +460,6 @@ def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">, Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>; - def int_x86_sse2_movl_dq : GCCBuiltin<"__builtin_ia32_movqv4si">, - Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>; def int_x86_sse2_movmsk_pd : GCCBuiltin<"__builtin_ia32_movmskpd">, Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>; def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">, Modified: llvm/trunk/lib/VMCore/AutoUpgrade.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AutoUpgrade.cpp?rev=45140&r1=45139&r2=45140&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/AutoUpgrade.cpp (original) +++ llvm/trunk/lib/VMCore/AutoUpgrade.cpp Mon Dec 17 19:04:25 2007 @@ -183,9 +183,7 @@ assert(F && "CallInst has no function associated with it."); if (!NewFn) { - switch(F->getIntrinsicID()) { - default: assert(0 && "Unknown function for CallInst upgrade."); - case Intrinsic::x86_sse2_movl_dq: { + if (strcmp(F->getNameStart(), "llvm.x86.sse2.movl.dq") == 0) { std::vector Idxs; Constant *Zero = ConstantInt::get(Type::Int32Ty, 0); Idxs.push_back(Zero); @@ -211,8 +209,8 @@ // Clean up the old call now that it has been completely upgraded. CI->eraseFromParent(); - break; - } + } else { + assert(0 && "Unknown function for CallInst upgrade."); } return; } From sabre at nondot.org Mon Dec 17 19:19:18 2007 From: sabre at nondot.org (Chris Lattner) Date: Tue, 18 Dec 2007 01:19:18 -0000 Subject: [llvm-commits] [llvm] r45141 - /llvm/trunk/lib/Target/README.txt Message-ID: <200712180119.lBI1JIRh007194@zion.cs.uiuc.edu> Author: lattner Date: Mon Dec 17 19:19:18 2007 New Revision: 45141 URL: http://llvm.org/viewvc/llvm-project?rev=45141&view=rev Log: add a missed case. Modified: llvm/trunk/lib/Target/README.txt Modified: llvm/trunk/lib/Target/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=45141&r1=45140&r2=45141&view=diff ============================================================================== --- llvm/trunk/lib/Target/README.txt (original) +++ llvm/trunk/lib/Target/README.txt Mon Dec 17 19:19:18 2007 @@ -464,3 +464,21 @@ } //===---------------------------------------------------------------------===// + +This code is often produced by the SMAX expansion in SCEV: + +define i32 @foo(i32 %a) { +entry: + %tmp15 = sub i32 99, %a ; [#uses=2] + %tmp16 = icmp slt i32 %tmp15, 0 ; [#uses=1] + %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; [#uses=1] + %tmp12 = add i32 %smax, %a ; [#uses=1] + %tmp13 = add i32 %tmp12, 1 ; [#uses=1] + ret i32 %tmp13 +} + +Note that the tmp12 add can be pushed through the select operands, turning +it into a "select %tmp16, %a, 99". We apparently already do this in dag +combine because it isn't present in X86 output. + +//===---------------------------------------------------------------------===// From dalej at apple.com Mon Dec 17 19:45:01 2007 From: dalej at apple.com (Dale Johannesen) Date: Tue, 18 Dec 2007 01:45:01 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r45143 - in /llvm-gcc-4.2/trunk/gcc: llvm-debug.cpp llvm-types.cpp Message-ID: <200712180145.lBI1j1vK008454@zion.cs.uiuc.edu> Author: johannes Date: Mon Dec 17 19:45:00 2007 New Revision: 45143 URL: http://llvm.org/viewvc/llvm-project?rev=45143&view=rev Log: the gcc CFE is capable of producing a non-null TYPE_NAME with a null DECL_NAME in a pathological case. Allow this. Modified: llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp?rev=45143&r1=45142&r2=45143&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp Mon Dec 17 19:45:00 2007 @@ -141,7 +141,8 @@ if (Name) { if (TREE_CODE(Name) == IDENTIFIER_NODE) { return IDENTIFIER_POINTER(Name); - } else if (TREE_CODE(Name) == TYPE_DECL && !DECL_IGNORED_P(Name)) { + } else if (TREE_CODE(Name) == TYPE_DECL && DECL_NAME(Name) && + !DECL_IGNORED_P(Name)) { return IDENTIFIER_POINTER(DECL_NAME(Name)); } } Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-types.cpp?rev=45143&r1=45142&r2=45143&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-types.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Mon Dec 17 19:45:00 2007 @@ -245,7 +245,7 @@ if (TYPE_NAME(type)) if (TREE_CODE(TYPE_NAME(type)) == IDENTIFIER_NODE) Name = IDENTIFIER_POINTER(TYPE_NAME(type)); - else + else if (DECL_NAME(TYPE_NAME(type))) Name = IDENTIFIER_POINTER(DECL_NAME(TYPE_NAME(type))); std::string ContextStr; From dalej at apple.com Mon Dec 17 19:58:38 2007 From: dalej at apple.com (Dale Johannesen) Date: Tue, 18 Dec 2007 01:58:38 -0000 Subject: [llvm-commits] [llvm] r45144 - /llvm/trunk/test/CFrontend/2007-12-VarArrayDebug.c Message-ID: <200712180158.lBI1wcr4009065@zion.cs.uiuc.edu> Author: johannes Date: Mon Dec 17 19:58:38 2007 New Revision: 45144 URL: http://llvm.org/viewvc/llvm-project?rev=45144&view=rev Log: Testcase for preceding FE fix Added: llvm/trunk/test/CFrontend/2007-12-VarArrayDebug.c Added: llvm/trunk/test/CFrontend/2007-12-VarArrayDebug.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2007-12-VarArrayDebug.c?rev=45144&view=auto ============================================================================== --- llvm/trunk/test/CFrontend/2007-12-VarArrayDebug.c (added) +++ llvm/trunk/test/CFrontend/2007-12-VarArrayDebug.c Mon Dec 17 19:58:38 2007 @@ -0,0 +1,18 @@ +// RUN: %llvmgcc -S -g -O %s -o - | llvm-as | llc +// RUN: %llvmgcc -S -g %s -o - | llvm-as | llc + +extern void foo (void); + +static +void baz (int i) +{ + foo (); + typedef char A[i]; + struct { A b; } *x = 0; +} + +void +bar (i) +{ + baz (i); +} From christopher.lamb at gmail.com Mon Dec 17 21:49:36 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 18 Dec 2007 03:49:36 -0000 Subject: [llvm-commits] [llvm] r45147 - in /llvm/trunk: lib/VMCore/AsmWriter.cpp test/Bindings/Ocaml/vmcore.ml Message-ID: <200712180349.lBI3naF5014034@zion.cs.uiuc.edu> Author: clamb Date: Mon Dec 17 21:49:35 2007 New Revision: 45147 URL: http://llvm.org/viewvc/llvm-project?rev=45147&view=rev Log: Don't forget to print address space qualifiers when printing out the type table! Thanks to Gordon Henriksen for pointing this out. Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp llvm/trunk/test/Bindings/Ocaml/vmcore.ml Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AsmWriter.cpp?rev=45147&r1=45146&r2=45147&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/AsmWriter.cpp (original) +++ llvm/trunk/lib/VMCore/AsmWriter.cpp Mon Dec 17 21:49:35 2007 @@ -808,7 +808,10 @@ if (STy->isPacked()) Out << '>'; } else if (const PointerType *PTy = dyn_cast(Ty)) { - printType(PTy->getElementType()) << '*'; + printType(PTy->getElementType()); + if (unsigned AddressSpace = PTy->getAddressSpace()) + Out << " addrspace(" << AddressSpace << ")"; + Out << '*'; } else if (const ArrayType *ATy = dyn_cast(Ty)) { Out << '[' << ATy->getNumElements() << " x "; printType(ATy->getElementType()) << ']'; Modified: llvm/trunk/test/Bindings/Ocaml/vmcore.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bindings/Ocaml/vmcore.ml?rev=45147&r1=45146&r2=45147&view=diff ============================================================================== --- llvm/trunk/test/Bindings/Ocaml/vmcore.ml (original) +++ llvm/trunk/test/Bindings/Ocaml/vmcore.ml Mon Dec 17 21:49:35 2007 @@ -114,7 +114,7 @@ end; begin group "qualified_pointer"; - (* XXX: grep {QualPtrTy.*i8.*3.*\*} < %t.ll + (* RUN: grep {QualPtrTy.*i8.*3.*\*} < %t.ll *) let ty = qualified_pointer_type i8_type 3 in insist (define_type_name "QualPtrTy" ty m); From sabre at nondot.org Tue Dec 18 00:18:21 2007 From: sabre at nondot.org (Chris Lattner) Date: Tue, 18 Dec 2007 06:18:21 -0000 Subject: [llvm-commits] [llvm] r45150 - /llvm/trunk/docs/LangRef.html Message-ID: <200712180618.lBI6ILbb023236@zion.cs.uiuc.edu> Author: lattner Date: Tue Dec 18 00:18:21 2007 New Revision: 45150 URL: http://llvm.org/viewvc/llvm-project?rev=45150&view=rev Log: avoid confusing terminology (what is a "word"?), fix scary markup, add section to TOC. Modified: llvm/trunk/docs/LangRef.html Modified: llvm/trunk/docs/LangRef.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=45150&r1=45149&r2=45150&view=diff ============================================================================== --- llvm/trunk/docs/LangRef.html (original) +++ llvm/trunk/docs/LangRef.html Tue Dec 18 00:18:21 2007 @@ -40,6 +40,7 @@
  • Derived Types
      +
    1. Integer Type
    2. Array Type
    3. Function Type
    4. Pointer Type
      5. @@ -1069,28 +1070,18 @@
      Examples:
      - - - + + + + + + + + + + +
      - i1
      - i4
      - i8
      - i16
      - i32
      - i42
      - i64
      - i1942652
      -       		- A boolean integer of 1 bit
      - A nibble sized integer of 4 bits.
      - A byte sized integer of 8 bits.
      - A half word sized integer of 16 bits.
      - A word sized integer of 32 bits.
      - An integer whose bit width is the answer.
      - A double word sized integer of 64 bits.
      - A really big integer of over 1 million bits.
      -
      i1a single-bit integer.
      i32a 32-bit integer.
      i1942652a really big integer of over 1 million bits.
      From evan.cheng at apple.com Tue Dec 18 01:02:08 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 18 Dec 2007 07:02:08 -0000 Subject: [llvm-commits] [llvm] r45151 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <200712180702.lBI728EK025224@zion.cs.uiuc.edu> Author: evancheng Date: Tue Dec 18 01:02:08 2007 New Revision: 45151 URL: http://llvm.org/viewvc/llvm-project?rev=45151&view=rev Log: SelectionDAG::dump() should print SrcValue of LoadSDNode and StoreSDNode. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=45151&r1=45150&r2=45151&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Dec 18 01:02:08 2007 @@ -3958,6 +3958,15 @@ const char *AM = getIndexedModeName(LD->getAddressingMode()); if (*AM) cerr << " " << AM; + + const Value *SrcValue = LD->getSrcValue(); + int SrcOffset = LD->getSrcValueOffset(); + cerr << " <"; + if (SrcValue) + cerr << SrcValue; + else + cerr << "null"; + cerr << ":" << SrcOffset << ">"; } else if (const StoreSDNode *ST = dyn_cast(this)) { if (ST->isTruncatingStore()) cerr << " getAddressingMode()); if (*AM) cerr << " " << AM; + + const Value *SrcValue = ST->getSrcValue(); + int SrcOffset = ST->getSrcValueOffset(); + cerr << " <"; + if (SrcValue) + cerr << SrcValue; + else + cerr << "null"; + cerr << ":" << SrcOffset << ">"; } } From evan.cheng at apple.com Tue Dec 18 02:16:51 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 18 Dec 2007 00:16:51 -0800 Subject: [llvm-commits] [llvm] r45130 - in /llvm/trunk: lib/Target/CellSPU/SPUISelDAGToDAG.cpp lib/Target/CellSPU/SPUISelLowering.cpp lib/Target/CellSPU/SPUInstrInfo.cpp lib/Target/CellSPU/SPUInstrInfo.td lib/Target/CellSPU/SPUOperands.td lib/Target/CellSPU/SPURegisterInfo.cpp lib/Target/CellSPU/SPURegisterInfo.td test/CodeGen/CellSPU/and_ops.ll test/CodeGen/CellSPU/nand.ll In-Reply-To: <200712172232.lBHMWZQY030095@zion.cs.uiuc.edu> References: <200712172232.lBHMWZQY030095@zion.cs.uiuc.edu> Message-ID: Hi Scott, There are some compilation warnings. Please fix! SPUISelLowering.cpp: In function 'llvm::SDOperand LowerEXTRACT_VECTOR_ELT(llvm::SDOperand, llvm::SelectionDAG&)': SPUISelLowering.cpp:2103: warning: 'prefslot_begin' may be used uninitialized in this function SPUISelLowering.cpp:2103: warning: 'prefslot_end' may be used uninitialized in this function SPUISelLowering.cpp: In function 'llvm::SDOperand LowerBUILD_VECTOR (llvm::SDOperand, llvm::SelectionDAG&)': SPUISelLowering.cpp:1685: warning: 'val' may be used uninitialized in this function SPUISelLowering.cpp: In function 'llvm::SDOperand LowerLOAD (llvm::SDOperand, llvm::SelectionDAG&, const llvm::SPUSubtarget*)': SPUISelLowering.cpp:559: warning: 'NewOpC' may be used uninitialized in this function Thanks, Evan On Dec 17, 2007, at 2:32 PM, Scott Michel wrote: > Author: pingbak > Date: Mon Dec 17 16:32:34 2007 > New Revision: 45130 > > URL: http://llvm.org/viewvc/llvm-project?rev=45130&view=rev > Log: > - Restore some i8 functionality in CellSPU > - New test case: nand.ll > > Added: > llvm/trunk/test/CodeGen/CellSPU/nand.ll > Modified: > llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp > llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp > llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp > llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td > llvm/trunk/lib/Target/CellSPU/SPUOperands.td > llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp > llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.td > llvm/trunk/test/CodeGen/CellSPU/and_ops.ll > > Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ > CellSPU/SPUISelDAGToDAG.cpp?rev=45130&r1=45129&r2=45130&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp (original) > +++ llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Mon Dec 17 > 16:32:34 2007 > @@ -63,6 +63,13 @@ > } > #endif > > + //! ConstantSDNode predicate for i32 unsigned 10-bit immediate > values > + bool > + isI32IntU10Immediate(ConstantSDNode *CN) > + { > + return isU10Constant((int) CN->getValue()); > + } > + > //! ConstantSDNode predicate for i16 sign-extended, 10-bit > immediate values > bool > isI16IntS10Immediate(ConstantSDNode *CN) > > Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ > CellSPU/SPUISelLowering.cpp?rev=45130&r1=45129&r2=45130&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Mon Dec 17 > 16:32:34 2007 > @@ -119,11 +119,13 @@ > // Set up the SPU's register classes: > // NOTE: i8 register class is not registered because we cannot > determine when > // we need to zero or sign extend for custom-lowered loads and > stores. > - addRegisterClass(MVT::i16, SPU::R16CRegisterClass); > - addRegisterClass(MVT::i32, SPU::R32CRegisterClass); > - addRegisterClass(MVT::i64, SPU::R64CRegisterClass); > - addRegisterClass(MVT::f32, SPU::R32FPRegisterClass); > - addRegisterClass(MVT::f64, SPU::R64FPRegisterClass); > + // NOTE: Ignore the previous note. For now. :-) > + addRegisterClass(MVT::i8, SPU::R8CRegisterClass); > + addRegisterClass(MVT::i16, SPU::R16CRegisterClass); > + addRegisterClass(MVT::i32, SPU::R32CRegisterClass); > + addRegisterClass(MVT::i64, SPU::R64CRegisterClass); > + addRegisterClass(MVT::f32, SPU::R32FPRegisterClass); > + addRegisterClass(MVT::f64, SPU::R64FPRegisterClass); > addRegisterClass(MVT::i128, SPU::GPRCRegisterClass); > > // SPU has no sign or zero extended loads for i1, i8, i16: > @@ -925,7 +927,7 @@ > } > case MVT::i8: > if (!isVarArg && ArgRegIdx < NumArgRegs) { > - unsigned VReg = RegMap->createVirtualRegister > (&SPU::R16CRegClass); > + unsigned VReg = RegMap->createVirtualRegister > (&SPU::R8CRegClass); > MF.addLiveIn(ArgRegs[ArgRegIdx], VReg); > ArgVal = DAG.getCopyFromReg(Root, VReg, MVT::i8); > ++ArgRegIdx; > > Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ > CellSPU/SPUInstrInfo.cpp?rev=45130&r1=45129&r2=45130&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp (original) > +++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp Mon Dec 17 > 16:32:34 2007 > @@ -54,11 +54,11 @@ > case SPU::ORIr64: > case SPU::ORHIv8i16: > case SPU::ORHIr16: > - // case SPU::ORHI1To2: > + case SPU::ORHI1To2: > case SPU::ORBIv16i8: > - //case SPU::ORBIr8: > + case SPU::ORBIr8: > case SPU::ORI2To4: > - // case SPU::ORI1To4: > + case SPU::ORI1To4: > case SPU::AHIvec: > case SPU::AHIr16: > case SPU::AIvec: > > Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ > CellSPU/SPUInstrInfo.td?rev=45130&r1=45129&r2=45130&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td (original) > +++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td Mon Dec 17 > 16:32:34 2007 > @@ -111,6 +111,11 @@ > "lqd\t$rT, $src", LoadStore, > [(set R16C:$rT, (load dform_addr:$src))]>; > > + def LQDr8: > + RI10Form<0b00101100, (outs R8C:$rT), (ins memri10:$src), > + "lqd\t$rT, $src", LoadStore, > + [(set R8C:$rT, (load dform_addr:$src))]>; > + > def LQAv16i8: > RI16Form<0b100001100, (outs VECREG:$rT), (ins addr256k:$src), > "lqa\t$rT, $src", LoadStore, > @@ -171,6 +176,11 @@ > "lqa\t$rT, $src", LoadStore, > [(set R16C:$rT, (load aform_addr:$src))]>; > > + def LQAr8: > + RI16Form<0b100001100, (outs R8C:$rT), (ins addr256k:$src), > + "lqa\t$rT, $src", LoadStore, > + [(set R8C:$rT, (load aform_addr:$src))]>; > + > def LQXv16i8: > RRForm<0b00100011100, (outs VECREG:$rT), (ins memrr:$src), > "lqx\t$rT, $src", LoadStore, > @@ -231,14 +241,17 @@ > "lqx\t$rT, $src", LoadStore, > [(set R16C:$rT, (load xform_addr:$src))]>; > > + def LQXr8: > + RRForm<0b00100011100, (outs R8C:$rT), (ins memrr:$src), > + "lqx\t$rT, $src", LoadStore, > + [(set R8C:$rT, (load xform_addr:$src))]>; > + > /* Load quadword, PC relative: Not much use at this point in time. > Might be of use later for relocatable code. > def LQR : RI16Form<0b111001100, (outs VECREG:$rT), (ins s16imm: > $disp), > "lqr\t$rT, $disp", LoadStore, > [(set VECREG:$rT, (load iaddr:$disp))]>; > */ > - > - // Catch-all for unaligned loads: > } > > // > ===------------------------------------------------------------------- > ---===// > @@ -295,6 +308,10 @@ > "stqd\t$rT, $src", LoadStore, > [(store R16C:$rT, dform_addr:$src)]>; > > + def STQDr8 : RI10Form<0b00100100, (outs), (ins R8C:$rT, memri10: > $src), > + "stqd\t$rT, $src", LoadStore, > + [(store R8C:$rT, dform_addr:$src)]>; > + > def STQAv16i8 : RI10Form<0b00100100, (outs), (ins VECREG:$rT, > addr256k:$src), > "stqa\t$rT, $src", LoadStore, > [(store (v16i8 VECREG:$rT), aform_addr:$src)]>; > @@ -340,6 +357,14 @@ > "stqa\t$rT, $src", LoadStore, > [(store R64FP:$rT, aform_addr:$src)]>; > > + def STQAr16 : RI10Form<0b00100100, (outs), (ins R16C:$rT, > addr256k:$src), > + "stqa\t$rT, $src", LoadStore, > + [(store R16C:$rT, aform_addr:$src)]>; > + > + def STQAr8 : RI10Form<0b00100100, (outs), (ins R8C:$rT, addr256k: > $src), > + "stqa\t$rT, $src", LoadStore, > + [(store R8C:$rT, aform_addr:$src)]>; > + > def STQXv16i8 : RI10Form<0b00100100, (outs), (ins VECREG:$rT, > memrr:$src), > "stqx\t$rT, $src", LoadStore, > [(store (v16i8 VECREG:$rT), xform_addr:$src)]>; > @@ -368,26 +393,36 @@ > "stqx\t$rT, $src", LoadStore, > [(store GPRC:$rT, xform_addr:$src)]>; > > - def STQXr64 : RI10Form<0b00100100, (outs), (ins R64C:$rT, memrr: > $src), > + def STQXr64: > + RI10Form<0b00100100, (outs), (ins R64C:$rT, memrr:$src), > "stqx\t$rT, $src", LoadStore, > [(store R64C:$rT, xform_addr:$src)]>; > > - def STQXr32 : RI10Form<0b00100100, (outs), (ins R32C:$rT, memrr: > $src), > + def STQXr32: > + RI10Form<0b00100100, (outs), (ins R32C:$rT, memrr:$src), > "stqx\t$rT, $src", LoadStore, > [(store R32C:$rT, xform_addr:$src)]>; > > // Floating Point > - def STQXf32 : RI10Form<0b00100100, (outs), (ins R32FP:$rT, memrr: > $src), > + def STQXf32: > + RI10Form<0b00100100, (outs), (ins R32FP:$rT, memrr:$src), > "stqx\t$rT, $src", LoadStore, > [(store R32FP:$rT, xform_addr:$src)]>; > > - def STQXf64 : RI10Form<0b00100100, (outs), (ins R64FP:$rT, memrr: > $src), > + def STQXf64: > + RI10Form<0b00100100, (outs), (ins R64FP:$rT, memrr:$src), > "stqx\t$rT, $src", LoadStore, > [(store R64FP:$rT, xform_addr:$src)]>; > > - def STQXr16 : RI10Form<0b00100100, (outs), (ins R16C:$rT, memrr: > $src), > + def STQXr16: > + RI10Form<0b00100100, (outs), (ins R16C:$rT, memrr:$src), > "stqx\t$rT, $src", LoadStore, > [(store R16C:$rT, xform_addr:$src)]>; > + > + def STQXr8: > + RI10Form<0b00100100, (outs), (ins R8C:$rT, memrr:$src), > + "stqx\t$rT, $src", LoadStore, > + [(store R8C:$rT, xform_addr:$src)]>; > > /* Store quadword, PC relative: Not much use at this point in > time. Might > be useful for relocatable code. > @@ -448,6 +483,13 @@ > "ilh\t$rT, $val", ImmLoad, > [(set R16C:$rT, immSExt16:$val)]>; > > +// Cell SPU doesn't have a native 8-bit immediate load, but ILH > works ("with > +// the right constant") > +def ILHr8: > + RI16Form<0b110000010, (outs R8C:$rT), (ins s16imm_i8:$val), > + "ilh\t$rT, $val", ImmLoad, > + [(set R8C:$rT, immSExt8:$val)]>; > + > // IL does sign extension! > def ILr64: > RI16Form<0b100000010, (outs R64C:$rT), (ins s16imm_i64:$val), > @@ -626,25 +668,32 @@ > "a\t$rT, $rA, $rB", IntegerOp, > [(set R32C:$rT, (add R32C:$rA, R32C:$rB))]>; > > +def Ar8: > + RRForm<0b00000011000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), > + "a\t$rT, $rA, $rB", IntegerOp, > + [(set R8C:$rT, (add R8C:$rA, R8C:$rB))]>; > + > def AIvec: > RI10Form<0b00111000, (outs VECREG:$rT), (ins VECREG:$rA, > s10imm:$val), > "ai\t$rT, $rA, $val", IntegerOp, > [(set (v4i32 VECREG:$rT), (add (v4i32 VECREG:$rA), > v4i32SExt10Imm:$val))]>; > > -def AIr32 : RI10Form<0b00111000, (outs R32C:$rT), > - (ins R32C:$rA, s10imm_i32:$val), > - "ai\t$rT, $rA, $val", IntegerOp, > - [(set R32C:$rT, (add R32C:$rA, i32ImmSExt10:$val))]>; > - > -def SFHvec : RRForm<0b00010010000, (outs VECREG:$rT), > - (ins VECREG:$rA, VECREG:$rB), > - "sfh\t$rT, $rA, $rB", IntegerOp, > - [(set (v8i16 VECREG:$rT), (sub (v8i16 VECREG:$rA), (v8i16 VECREG: > $rB)))]>; > - > -def SFHr16 : RRForm<0b00010010000, (outs R16C:$rT), (ins R16C:$rA, > R16C:$rB), > - "sfh\t$rT, $rA, $rB", IntegerOp, > - [(set R16C:$rT, (sub R16C:$rA, R16C:$rB))]>; > +def AIr32: > + RI10Form<0b00111000, (outs R32C:$rT), (ins R32C:$rA, > s10imm_i32:$val), > + "ai\t$rT, $rA, $val", IntegerOp, > + [(set R32C:$rT, (add R32C:$rA, i32ImmSExt10:$val))]>; > + > +def SFHvec: > + RRForm<0b00010010000, (outs VECREG:$rT), (ins VECREG:$rA, > VECREG:$rB), > + "sfh\t$rT, $rA, $rB", IntegerOp, > + [(set (v8i16 VECREG:$rT), (sub (v8i16 VECREG:$rA), > + (v8i16 VECREG:$rB)))]>; > + > +def SFHr16: > + RRForm<0b00010010000, (outs R16C:$rT), (ins R16C:$rA, R16C:$rB), > + "sfh\t$rT, $rA, $rB", IntegerOp, > + [(set R16C:$rT, (sub R16C:$rA, R16C:$rB))]>; > > def SFHIvec: > RI10Form<0b10110000, (outs VECREG:$rT), (ins VECREG:$rA, > s10imm:$val), > @@ -977,6 +1026,11 @@ > "xsbh\t$rDst, $rSrc", IntegerOp, > [(set R16C:$rDst, (sext_inreg R16C:$rSrc, i8))]>; > > +def XSBHr8: > + RRForm_1<0b01101101010, (outs R16C:$rDst), (ins R8C:$rSrc), > + "xsbh\t$rDst, $rSrc", IntegerOp, > + [(set R16C:$rDst, (sext R8C:$rSrc))]>; > + > // 32-bit form for XSBH: used to sign extend 8-bit quantities to > 16-bit > // quantities to 32-bit quantities via a 32-bit register (see the > sext 8->32 > // pattern below). Intentionally doesn't match a pattern because > we want the > @@ -1070,6 +1124,11 @@ > "and\t$rT, $rA, $rB", IntegerOp, > [(set R16C:$rT, (and R16C:$rA, R16C:$rB))]>; > > +def ANDr8: > + RRForm<0b10000011000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), > + "and\t$rT, $rA, $rB", IntegerOp, > + [(set R8C:$rT, (and R8C:$rA, R8C:$rB))]>; > + > // Hacked form of AND to zero-extend 16-bit quantities to 32-bit > // quantities -- see 16->32 zext pattern. > // > @@ -1112,12 +1171,22 @@ > "andc\t$rT, $rA, $rB", IntegerOp, > [(set R16C:$rT, (and R16C:$rA, (not R16C:$rB)))]>; > > +def ANDCr8: > + RRForm<0b10000011010, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), > + "andc\t$rT, $rA, $rB", IntegerOp, > + [(set R8C:$rT, (and R8C:$rA, (not R8C:$rB)))]>; > + > def ANDBIv16i8: > RI10Form<0b01101000, (outs VECREG:$rT), (ins VECREG:$rA, > u10imm:$val), > "andbi\t$rT, $rA, $val", IntegerOp, > [(set (v16i8 VECREG:$rT), > (and (v16i8 VECREG:$rA), (v16i8 v16i8U8Imm:$val)))]>; > > +def ANDBIr8: > + RI10Form<0b01101000, (outs R8C:$rT), (ins R8C:$rA, u10imm_i8: > $val), > + "andbi\t$rT, $rA, $val", IntegerOp, > + [(set R8C:$rT, (and R8C:$rA, immU8:$val))]>; > + > def ANDHIv8i16: > RI10Form<0b10101000, (outs VECREG:$rT), (ins VECREG:$rA, > s10imm:$val), > "andhi\t$rT, $rA, $val", IntegerOp, > @@ -1127,7 +1196,12 @@ > def ANDHIr16: > RI10Form<0b10101000, (outs R16C:$rT), (ins R16C:$rA, s10imm: > $val), > "andhi\t$rT, $rA, $val", IntegerOp, > - [(set R16C:$rT, (and R16C:$rA, i16ImmU10:$val))]>; > + [(set R16C:$rT, (and R16C:$rA, i16ImmUns10:$val))]>; > + > +def ANDHI1To2: > + RI10Form<0b10101000, (outs R16C:$rT), (ins R8C:$rA, s10imm:$val), > + "andhi\t$rT, $rA, $val", IntegerOp, > + [(set R16C:$rT, (and (zext R8C:$rA), i16ImmSExt10:$val))]>; > > def ANDIv4i32: > RI10Form<0b00101000, (outs VECREG:$rT), (ins VECREG:$rA, > s10imm:$val), > @@ -1140,6 +1214,13 @@ > "andi\t$rT, $rA, $val", IntegerOp, > [(set R32C:$rT, (and R32C:$rA, i32ImmSExt10:$val))]>; > > +// Hacked form of ANDI to zero-extend i8 quantities to i32. See > the zext 8->32 > +// pattern below. > +def ANDI1To4: > + RI10Form<0b10101000, (outs R32C:$rT), (ins R8C:$rA, s10imm_i32: > $val), > + "andi\t$rT, $rA, $val", IntegerOp, > + [(set R32C:$rT, (and (zext R8C:$rA), i32ImmSExt10:$val))]>; > + > // Hacked form of ANDI to zero-extend i16 quantities to i32. See the > // zext 16->32 pattern below. > // > @@ -1199,7 +1280,20 @@ > "or\t$rT, $rA, $rB", IntegerOp, > [(set R16C:$rT, (or R16C:$rA, R16C:$rB))]>; > > +def ORr8: > + RRForm<0b10000010000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), > + "or\t$rT, $rA, $rB", IntegerOp, > + [(set R8C:$rT, (or R8C:$rA, R8C:$rB))]>; > + > // ORv*_*: Used in scalar->vector promotions: > +def ORv16i8_i8: > + RRForm<0b10000010000, (outs VECREG:$rT), (ins R8C:$rA, R8C:$rB), > + "or\t$rT, $rA, $rB", IntegerOp, > + [/* no pattern */]>; > + > +def : Pat<(v16i8 (SPUpromote_scalar R8C:$rA)), > + (ORv16i8_i8 R8C:$rA, R8C:$rA)>; > + > def ORv8i16_i16: > RRForm<0b10000010000, (outs VECREG:$rT), (ins R16C:$rA, R16C: > $rB), > "or\t$rT, $rA, $rB", IntegerOp, > @@ -1241,6 +1335,14 @@ > (ORv2f64_f64 R64FP:$rA, R64FP:$rA)>; > > // ORi*_v*: Used to extract vector element 0 (the preferred slot) > +def ORi8_v16i8: > + RRForm<0b10000010000, (outs R8C:$rT), (ins VECREG:$rA, VECREG: > $rB), > + "or\t$rT, $rA, $rB", IntegerOp, > + [/* no pattern */]>; > + > +def : Pat<(SPUextract_elt0 (v16i8 VECREG:$rA)), > + (ORi8_v16i8 VECREG:$rA, VECREG:$rA)>; > + > def ORi16_v8i16: > RRForm<0b10000010000, (outs R16C:$rT), (ins VECREG:$rA, VECREG: > $rB), > "or\t$rT, $rA, $rB", IntegerOp, > @@ -1325,6 +1427,11 @@ > "orc\t$rT, $rA, $rB", IntegerOp, > [(set R16C:$rT, (or R16C:$rA, (not R16C:$rB)))]>; > > +def ORCr8: > + RRForm<0b10010010000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), > + "orc\t$rT, $rA, $rB", IntegerOp, > + [(set R8C:$rT, (or R8C:$rA, (not R8C:$rB)))]>; > + > // OR byte immediate > def ORBIv16i8: > RI10Form<0b01100000, (outs VECREG:$rT), (ins VECREG:$rA, > u10imm:$val), > @@ -1332,29 +1439,40 @@ > [(set (v16i8 VECREG:$rT), > (or (v16i8 VECREG:$rA), (v16i8 v16i8U8Imm:$val)))]>; > > +def ORBIr8: > + RI10Form<0b01100000, (outs R8C:$rT), (ins R8C:$rA, u10imm_i8: > $val), > + "orbi\t$rT, $rA, $val", IntegerOp, > + [(set R8C:$rT, (or R8C:$rA, immU8:$val))]>; > + > // OR halfword immediate > def ORHIv8i16: > - RI10Form<0b10100000, (outs VECREG:$rT), (ins VECREG:$rA, > s10imm:$val), > + RI10Form<0b10100000, (outs VECREG:$rT), (ins VECREG:$rA, > u10imm:$val), > "orhi\t$rT, $rA, $val", IntegerOp, > [(set (v8i16 VECREG:$rT), (or (v8i16 VECREG:$rA), > - v8i16SExt10Imm:$val))]>; > + v8i16Uns10Imm:$val))]>; > > def ORHIr16: > - RI10Form<0b10100000, (outs R16C:$rT), (ins R16C:$rA, s10imm: > $val), > + RI10Form<0b10100000, (outs R16C:$rT), (ins R16C:$rA, u10imm: > $val), > "orhi\t$rT, $rA, $val", IntegerOp, > - [(set R16C:$rT, (or R16C:$rA, i16ImmSExt10:$val))]>; > + [(set R16C:$rT, (or R16C:$rA, i16ImmUns10:$val))]>; > + > +// Hacked form of ORHI used to promote 8-bit registers to 16-bit > +def ORHI1To2: > + RI10Form<0b10100000, (outs R16C:$rT), (ins R8C:$rA, s10imm:$val), > + "orhi\t$rT, $rA, $val", IntegerOp, > + [(set R16C:$rT, (or (anyext R8C:$rA), i16ImmSExt10:$val))]>; > > // Bitwise "or" with immediate > def ORIv4i32: > - RI10Form<0b00100000, (outs VECREG:$rT), (ins VECREG:$rA, > s10imm:$val), > + RI10Form<0b00100000, (outs VECREG:$rT), (ins VECREG:$rA, > u10imm:$val), > "ori\t$rT, $rA, $val", IntegerOp, > [(set (v4i32 VECREG:$rT), (or (v4i32 VECREG:$rA), > - v4i32SExt10Imm:$val))]>; > + v4i32Uns10Imm:$val))]>; > > def ORIr32: > - RI10Form<0b00100000, (outs R32C:$rT), (ins R32C:$rA, > s10imm_i32:$val), > + RI10Form<0b00100000, (outs R32C:$rT), (ins R32C:$rA, > u10imm_i32:$val), > "ori\t$rT, $rA, $val", IntegerOp, > - [(set R32C:$rT, (or R32C:$rA, i32ImmSExt10:$val))]>; > + [(set R32C:$rT, (or R32C:$rA, i32ImmUns10:$val))]>; > > // Hacked forms of or immediate to copy one 32- and 64-bit FP > register > // to another. Do not match patterns. > @@ -1381,15 +1499,24 @@ > "ori\t$rT, $rA, $val", IntegerOp, > [(set R32C:$rT, (or (anyext R16C:$rA), i32ImmSExt10:$val))]>; > > +// ORI1To4: Hacked version of the ORI instruction to extend 16-bit > quantities > +// to 32-bit quantities. Used exclusively to match "anyext" > conversions (vide > +// infra "anyext 16->32" pattern.) > +def ORI1To4: > + RI10Form<0b00100000, (outs R32C:$rT), (ins R8C:$rA, s10imm_i32: > $val), > + "ori\t$rT, $rA, $val", IntegerOp, > + [(set R32C:$rT, (or (anyext R8C:$rA), i32ImmSExt10:$val))]>; > + > // ORX: "or" across the vector: or's $rA's word slots leaving the > result in > // $rT[0], slots 1-3 are zeroed. > // > -// Needs to match an intrinsic pattern. > +// FIXME: Needs to match an intrinsic pattern. > def ORXv4i32: > RRForm<0b10010010000, (outs VECREG:$rT), (ins VECREG:$rA, > VECREG:$rB), > "orx\t$rT, $rA, $rB", IntegerOp, > []>; > > +// XOR: > def XORv16i8: > RRForm<0b10010010000, (outs VECREG:$rT), (ins VECREG:$rA, > VECREG:$rB), > "xor\t$rT, $rA, $rB", IntegerOp, > @@ -1441,11 +1568,21 @@ > "xor\t$rT, $rA, $rB", IntegerOp, > [(set R16C:$rT, (xor R16C:$rA, R16C:$rB))]>; > > +def XORr8: > + RRForm<0b10010010000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), > + "xor\t$rT, $rA, $rB", IntegerOp, > + [(set R8C:$rT, (xor R8C:$rA, R8C:$rB))]>; > + > def XORBIv16i8: > RI10Form<0b01100000, (outs VECREG:$rT), (ins VECREG:$rA, > u10imm:$val), > "xorbi\t$rT, $rA, $val", IntegerOp, > [(set (v16i8 VECREG:$rT), (xor (v16i8 VECREG:$rA), > v16i8U8Imm:$val))]>; > > +def XORBIr8: > + RI10Form<0b01100000, (outs R8C:$rT), (ins R8C:$rA, u10imm_i8: > $val), > + "xorbi\t$rT, $rA, $val", IntegerOp, > + [(set R8C:$rT, (xor R8C:$rA, immU8:$val))]>; > + > def XORHIv8i16: > RI10Form<0b10100000, (outs VECREG:$rT), (ins VECREG:$rA, > s10imm:$val), > "xorhi\t$rT, $rA, $val", IntegerOp, > @@ -1497,6 +1634,11 @@ > "nand\t$rT, $rA, $rB", IntegerOp, > [(set R16C:$rT, (not (and R16C:$rA, R16C:$rB)))]>; > > +def NANDr8: > + RRForm<0b10010010000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), > + "nand\t$rT, $rA, $rB", IntegerOp, > + [(set R8C:$rT, (not (and R8C:$rA, R8C:$rB)))]>; > + > // NOR: > def NORv16i8: > RRForm<0b10010010000, (outs VECREG:$rT), (ins VECREG:$rA, > VECREG:$rB), > @@ -1526,6 +1668,11 @@ > "nor\t$rT, $rA, $rB", IntegerOp, > [(set R16C:$rT, (not (or R16C:$rA, R16C:$rB)))]>; > > +def NORr8: > + RRForm<0b10010010000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), > + "nor\t$rT, $rA, $rB", IntegerOp, > + [(set R8C:$rT, (not (or R8C:$rA, R8C:$rB)))]>; > + > // EQV: Equivalence (1 for each same bit, otherwise 0) > def EQVv16i8: > RRForm<0b10010010000, (outs VECREG:$rT), (ins VECREG:$rA, > VECREG:$rB), > @@ -1593,6 +1740,18 @@ > def : Pat<(xor (not R16C:$rA), R16C:$rB), > (EQVr16 R16C:$rA, R16C:$rB)>; > > +def EQVr8: > + RRForm<0b10010010000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), > + "eqv\t$rT, $rA, $rB", IntegerOp, > + [(set R8C:$rT, (or (and R8C:$rA, R8C:$rB), > + (and (not R8C:$rA), (not R8C:$rB))))]>; > + > +def : Pat<(xor R8C:$rA, (not R8C:$rB)), > + (EQVr8 R8C:$rA, R8C:$rB)>; > + > +def : Pat<(xor (not R8C:$rA), R8C:$rB), > + (EQVr8 R8C:$rA, R8C:$rB)>; > + > // gcc optimizes (p & q) | (~p & ~q) -> ~(p | q) | (p & q), so > match that > // pattern also: > def : Pat<(or (vnot (or (v16i8 VECREG:$rA), (v16i8 VECREG:$rB))), > @@ -1613,6 +1772,9 @@ > def : Pat<(or (not (or R16C:$rA, R16C:$rB)), (and R16C:$rA, R16C: > $rB)), > (EQVr16 R16C:$rA, R16C:$rB)>; > > +def : Pat<(or (not (or R8C:$rA, R8C:$rB)), (and R8C:$rA, R8C:$rB)), > + (EQVr8 R8C:$rA, R8C:$rB)>; > + > // Select bits: > def SELBv16i8: > RRRForm<0b1000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG: > $rB, VECREG:$rC), > @@ -1901,6 +2063,43 @@ > def : Pat<(or (and (not R16C:$rC), R16C:$rA), > (and R16C:$rC, R16C:$rB)), > (SELBr16 R16C:$rA, R16C:$rB, R16C:$rC)>; > + > +def SELBr8: > + RRRForm<0b1000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB, R8C:$rC), > + "selb\t$rT, $rA, $rB, $rC", IntegerOp, > + []>; > + > +def : Pat<(or (and R8C:$rA, R8C:$rC), > + (and R8C:$rB, (not R8C:$rC))), > + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; > + > +def : Pat<(or (and R8C:$rC, R8C:$rA), > + (and R8C:$rB, (not R8C:$rC))), > + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; > + > +def : Pat<(or (and R8C:$rA, R8C:$rC), > + (and (not R8C:$rC), R8C:$rB)), > + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; > + > +def : Pat<(or (and R8C:$rC, R8C:$rA), > + (and (not R8C:$rC), R8C:$rB)), > + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; > + > +def : Pat<(or (and R8C:$rA, (not R8C:$rC)), > + (and R8C:$rB, R8C:$rC)), > + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; > + > +def : Pat<(or (and R8C:$rA, (not R8C:$rC)), > + (and R8C:$rC, R8C:$rB)), > + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; > + > +def : Pat<(or (and (not R8C:$rC), R8C:$rA), > + (and R8C:$rB, R8C:$rC)), > + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; > + > +def : Pat<(or (and (not R8C:$rC), R8C:$rA), > + (and R8C:$rC, R8C:$rB)), > + (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; > > // > ===------------------------------------------------------------------- > ---===// > // Vector shuffle... > @@ -1958,10 +2157,13 @@ > [(set R16C:$rT, (shl R16C:$rA, R32C:$rB))]>; > > def SHLHIv8i16: > - RI7Form<0b11111010000, (outs VECREG:$rT), (ins VECREG:$rA, > u7imm:$val), > + RI7Form<0b11111010000, (outs VECREG:$rT), (ins VECREG:$rA, > u7imm_i8:$val), > "shlhi\t$rT, $rA, $val", RotateShift, > [(set (v8i16 VECREG:$rT), > - (SPUvec_shl_v8i16 (v8i16 VECREG:$rA), (i16 uimm7: > $val)))]>; > + (SPUvec_shl_v8i16 (v8i16 VECREG:$rA), (i8 uimm7: > $val)))]>; > + > +def : Pat<(SPUvec_shl_v8i16 (v8i16 VECREG:$rA), (i16 uimm7:$val)), > + (SHLHIv8i16 VECREG:$rA, imm:$val)>; > > def : Pat<(SPUvec_shl_v8i16 (v8i16 VECREG:$rA), (i32 uimm7:$val)), > (SHLHIv8i16 VECREG:$rA, imm:$val)>; > @@ -1970,6 +2172,9 @@ > RI7Form<0b11111010000, (outs R16C:$rT), (ins R16C:$rA, > u7imm_i32:$val), > "shlhi\t$rT, $rA, $val", RotateShift, > [(set R16C:$rT, (shl R16C:$rA, (i32 uimm7:$val)))]>; > + > +def : Pat<(shl R16C:$rA, (i8 uimm7:$val)), > + (SHLHIr16 R16C:$rA, uimm7:$val)>; > > def : Pat<(shl R16C:$rA, (i16 uimm7:$val)), > (SHLHIr16 R16C:$rA, uimm7:$val)>; > @@ -1986,10 +2191,13 @@ > [(set R32C:$rT, (shl R32C:$rA, R32C:$rB))]>; > > def SHLIv4i32: > - RI7Form<0b11111010000, (outs VECREG:$rT), (ins VECREG:$rA, > u7imm:$val), > + RI7Form<0b11111010000, (outs VECREG:$rT), (ins VECREG:$rA, > u7imm_i8:$val), > "shli\t$rT, $rA, $val", RotateShift, > [(set (v4i32 VECREG:$rT), > - (SPUvec_shl_v4i32 (v4i32 VECREG:$rA), (i16 uimm7: > $val)))]>; > + (SPUvec_shl_v4i32 (v4i32 VECREG:$rA), (i8 uimm7: > $val)))]>; > + > +def: Pat<(SPUvec_shl_v4i32 (v4i32 VECREG:$rA), (i16 uimm7:$val)), > + (SHLIv4i32 VECREG:$rA, uimm7:$val)>; > > def: Pat<(SPUvec_shl_v4i32 (v4i32 VECREG:$rA), (i32 uimm7:$val)), > (SHLIv4i32 VECREG:$rA, uimm7:$val)>; > @@ -2002,6 +2210,9 @@ > def : Pat<(shl R32C:$rA, (i16 uimm7:$val)), > (SHLIr32 R32C:$rA, uimm7:$val)>; > > +def : Pat<(shl R32C:$rA, (i8 uimm7:$val)), > + (SHLIr32 R32C:$rA, uimm7:$val)>; > + > // SHLQBI vec form: Note that this will shift the entire vector > (the 128-bit > // register) to the left. Vector form is here to ensure type > correctness. > def SHLQBIvec: > @@ -2044,11 +2255,27 @@ > "roth\t$rT, $rA, $rB", RotateShift, > [(set R16C:$rT, (rotl R16C:$rA, R32C:$rB))]>; > > +// The rotate amount is in the same bits whether we've got an 8- > bit, 16-bit or > +// 32-bit register > +def ROTHr16_r8: > + RRForm<0b00111010000, (outs R16C:$rT), (ins R16C:$rA, R8C:$rB), > + "roth\t$rT, $rA, $rB", RotateShift, > + [(set R16C:$rT, (rotl R16C:$rA, (i32 (zext R8C:$rB))))]>; > + > +def : Pat<(rotl R16C:$rA, (i32 (sext R8C:$rB))), > + (ROTHr16_r8 R16C:$rA, R8C:$rB)>; > + > +def : Pat<(rotl R16C:$rA, (i32 (zext R8C:$rB))), > + (ROTHr16_r8 R16C:$rA, R8C:$rB)>; > + > +def : Pat<(rotl R16C:$rA, (i32 (anyext R8C:$rB))), > + (ROTHr16_r8 R16C:$rA, R8C:$rB)>; > + > def ROTHIv8i16: > - RI7Form<0b00111110000, (outs VECREG:$rT), (ins VECREG:$rA, > u7imm:$val), > + RI7Form<0b00111110000, (outs VECREG:$rT), (ins VECREG:$rA, > u7imm_i8:$val), > "rothi\t$rT, $rA, $val", RotateShift, > [(set (v8i16 VECREG:$rT), > - (SPUvec_rotl_v8i16 VECREG:$rA, (i16 uimm7:$val)))]>; > + (SPUvec_rotl_v8i16 VECREG:$rA, (i8 uimm7:$val)))]>; > > def : Pat<(SPUvec_rotl_v8i16 VECREG:$rA, (i16 uimm7:$val)), > (ROTHIv8i16 VECREG:$rA, imm:$val)>; > @@ -2066,6 +2293,11 @@ > "rothi\t$rT, $rA, $val", RotateShift, > [(set R16C:$rT, (rotl R16C:$rA, (i32 uimm7:$val)))]>; > > +def ROTHIr16_i8: > + RI7Form<0b00111110000, (outs R16C:$rT), (ins R16C:$rA, > u7imm_i8:$val), > + "rothi\t$rT, $rA, $val", RotateShift, > + [(set R16C:$rT, (rotl R16C:$rA, (i8 uimm7:$val)))]>; > + > def ROTv4i32: > RRForm<0b00011010000, (outs VECREG:$rT), (ins VECREG:$rA, R32C: > $rB), > "rot\t$rT, $rA, $rB", RotateShift, > @@ -2077,6 +2309,30 @@ > "rot\t$rT, $rA, $rB", RotateShift, > [(set R32C:$rT, (rotl R32C:$rA, R32C:$rB))]>; > > +// The rotate amount is in the same bits whether we've got an 8- > bit, 16-bit or > +// 32-bit register > +def ROTr32_r16_anyext: > + RRForm<0b00011010000, (outs R32C:$rT), (ins R32C:$rA, R16C:$rB), > + "rot\t$rT, $rA, $rB", RotateShift, > + [(set R32C:$rT, (rotl R32C:$rA, (i32 (anyext R16C:$rB))))]>; > + > +def : Pat<(rotl R32C:$rA, (i32 (zext R16C:$rB))), > + (ROTr32_r16_anyext R32C:$rA, R16C:$rB)>; > + > +def : Pat<(rotl R32C:$rA, (i32 (sext R16C:$rB))), > + (ROTr32_r16_anyext R32C:$rA, R16C:$rB)>; > + > +def ROTr32_r8_anyext: > + RRForm<0b00011010000, (outs R32C:$rT), (ins R32C:$rA, R8C:$rB), > + "rot\t$rT, $rA, $rB", RotateShift, > + [(set R32C:$rT, (rotl R32C:$rA, (i32 (anyext R8C:$rB))))]>; > + > +def : Pat<(rotl R32C:$rA, (i32 (zext R8C:$rB))), > + (ROTr32_r8_anyext R32C:$rA, R8C:$rB)>; > + > +def : Pat<(rotl R32C:$rA, (i32 (sext R8C:$rB))), > + (ROTr32_r8_anyext R32C:$rA, R8C:$rB)>; > + > def ROTIv4i32: > RI7Form<0b00011110000, (outs VECREG:$rT), (ins VECREG:$rA, > u7imm_i32:$val), > "roti\t$rT, $rA, $val", RotateShift, > @@ -2086,6 +2342,9 @@ > def : Pat<(SPUvec_rotl_v4i32 (v4i32 VECREG:$rA), (i16 uimm7:$val)), > (ROTIv4i32 VECREG:$rA, imm:$val)>; > > +def : Pat<(SPUvec_rotl_v4i32 (v4i32 VECREG:$rA), (i8 uimm7:$val)), > + (ROTIv4i32 VECREG:$rA, imm:$val)>; > + > def ROTIr32: > RI7Form<0b00011110000, (outs R32C:$rT), (ins R32C:$rA, > u7imm_i32:$val), > "roti\t$rT, $rA, $val", RotateShift, > @@ -2096,6 +2355,11 @@ > "roti\t$rT, $rA, $val", RotateShift, > [(set R32C:$rT, (rotl R32C:$rA, (i16 uimm7:$val)))]>; > > +def ROTIr32_i8: > + RI7Form<0b00111110000, (outs R32C:$rT), (ins R32C:$rA, > u7imm_i8:$val), > + "roti\t$rT, $rA, $val", RotateShift, > + [(set R32C:$rT, (rotl R32C:$rA, (i8 uimm7:$val)))]>; > + > // ROTQBY* vector forms: This rotates the entire vector, but > vector registers > // are used here for type checking (instances where ROTQBI is used > actually > // use vector registers) > @@ -2155,9 +2419,9 @@ > (ROTHMv8i16 VECREG:$rA, > (SFIr32 (XSHWr16 R16C:$rB), 0))>; > > -def : Pat<(SPUvec_srl_v8i16 (v8i16 VECREG:$rA), /* R8C */ R16C:$rB), > +def : Pat<(SPUvec_srl_v8i16 (v8i16 VECREG:$rA), R8C:$rB), > (ROTHMv8i16 VECREG:$rA, > - (SFIr32 (XSHWr16 /* (XSBHr8 R8C */ R16C: > $rB) /*)*/, 0))>; > + (SFIr32 (XSHWr16 (XSBHr8 R8C:$rB) ), 0))>; > > // ROTHM r16 form: Rotate 16-bit quantity to right, zero fill at > the left > // Note: This instruction doesn't match a pattern because rB must > be negated > @@ -2174,9 +2438,9 @@ > (ROTHMr16 R16C:$rA, > (SFIr32 (XSHWr16 R16C:$rB), 0))>; > > -def : Pat<(srl R16C:$rA, /* R8C */ R16C:$rB), > +def : Pat<(srl R16C:$rA, R8C:$rB), > (ROTHMr16 R16C:$rA, > - (SFIr32 (XSHWr16 /* (XSBHr8 R8C */ R16C:$rB) / > * ) */, 0))>; > + (SFIr32 (XSHWr16 (XSBHr8 R8C:$rB) ), 0))>; > > // ROTHMI v8i16 form: See the comment for ROTHM v8i16. The > difference here is > // that the immediate can be complemented, so that the user > doesn't have to > @@ -2189,6 +2453,9 @@ > > def: Pat<(SPUvec_srl_v8i16 (v8i16 VECREG:$rA), (i16 imm:$val)), > (ROTHMIv8i16 VECREG:$rA, imm:$val)>; > + > +def: Pat<(SPUvec_srl_v8i16 (v8i16 VECREG:$rA), (i8 imm:$val)), > + (ROTHMIv8i16 VECREG:$rA, imm:$val)>; > > def ROTHMIr16: > RI7Form<0b10111110000, (outs R16C:$rT), (ins R16C:$rA, > rothNeg7imm:$val), > @@ -2198,6 +2465,9 @@ > def: Pat<(srl R16C:$rA, (i16 uimm7:$val)), > (ROTHMIr16 R16C:$rA, uimm7:$val)>; > > +def: Pat<(srl R16C:$rA, (i8 uimm7:$val)), > + (ROTHMIr16 R16C:$rA, uimm7:$val)>; > + > // ROTM v4i32 form: See the ROTHM v8i16 comments. > def ROTMv4i32: > RRForm<0b10011010000, (outs VECREG:$rT), (ins VECREG:$rA, R32C: > $rB), > @@ -2227,6 +2497,10 @@ > (ROTMr32 R32C:$rA, > (SFIr32 (XSHWr16 R16C:$rB), 0))>; > > +def : Pat<(srl R32C:$rA, R8C:$rB), > + (ROTMr32 R32C:$rA, > + (SFIr32 (XSHWr16 (XSBHr8 R8C:$rB)), 0))>; > + > // ROTMI v4i32 form: See the comment for ROTHM v8i16. > def ROTMIv4i32: > RI7Form<0b10011110000, (outs VECREG:$rT), (ins VECREG:$rA, > rotNeg7imm:$val), > @@ -2236,6 +2510,9 @@ > > def : Pat<(SPUvec_srl_v4i32 VECREG:$rA, (i16 uimm7:$val)), > (ROTMIv4i32 VECREG:$rA, uimm7:$val)>; > + > +def : Pat<(SPUvec_srl_v4i32 VECREG:$rA, (i8 uimm7:$val)), > + (ROTMIv4i32 VECREG:$rA, uimm7:$val)>; > > // ROTMI r32 form: know how to complement the immediate value. > def ROTMIr32: > @@ -2246,6 +2523,9 @@ > def : Pat<(srl R32C:$rA, (i16 imm:$val)), > (ROTMIr32 R32C:$rA, uimm7:$val)>; > > +def : Pat<(srl R32C:$rA, (i8 imm:$val)), > + (ROTMIr32 R32C:$rA, uimm7:$val)>; > + > // ROTQMBYvec: This is a vector form merely so that when used in an > // instruction pattern, type checking will succeed. This > instruction assumes > // that the user knew to complement $rB. > @@ -2291,6 +2571,10 @@ > (ROTMAHv8i16 VECREG:$rA, > (SFIr32 (XSHWr16 R16C:$rB), 0))>; > > +def : Pat<(SPUvec_sra_v8i16 VECREG:$rA, R8C:$rB), > + (ROTMAHv8i16 VECREG:$rA, > + (SFIr32 (XSHWr16 (XSBHr8 R8C:$rB)), 0))>; > + > def ROTMAHr16: > RRForm<0b01111010000, (outs R16C:$rT), (ins R16C:$rA, R32C:$rB), > "rotmah\t$rT, $rA, $rB", RotateShift, > @@ -2303,6 +2587,10 @@ > (ROTMAHr16 R16C:$rA, > (SFIr32 (XSHWr16 R16C:$rB), 0))>; > > +def : Pat<(sra R16C:$rA, R8C:$rB), > + (ROTMAHr16 R16C:$rA, > + (SFIr32 (XSHWr16 (XSBHr8 R8C:$rB)), 0))>; > + > def ROTMAHIv8i16: > RRForm<0b01111110000, (outs VECREG:$rT), (ins VECREG:$rA, > rothNeg7imm:$val), > "rotmahi\t$rT, $rA, $val", RotateShift, > @@ -2312,6 +2600,9 @@ > def : Pat<(SPUvec_sra_v8i16 (v8i16 VECREG:$rA), (i16 uimm7:$val)), > (ROTMAHIv8i16 (v8i16 VECREG:$rA), (i32 uimm7:$val))>; > > +def : Pat<(SPUvec_sra_v8i16 (v8i16 VECREG:$rA), (i8 uimm7:$val)), > + (ROTMAHIv8i16 (v8i16 VECREG:$rA), (i32 uimm7:$val))>; > + > def ROTMAHIr16: > RRForm<0b01111110000, (outs R16C:$rT), (ins R16C:$rA, > rothNeg7imm_i16:$val), > "rotmahi\t$rT, $rA, $val", RotateShift, > @@ -2320,6 +2611,9 @@ > def : Pat<(sra R16C:$rA, (i32 imm:$val)), > (ROTMAHIr16 R16C:$rA, uimm7:$val)>; > > +def : Pat<(sra R16C:$rA, (i8 imm:$val)), > + (ROTMAHIr16 R16C:$rA, uimm7:$val)>; > + > def ROTMAv4i32: > RRForm<0b01011010000, (outs VECREG:$rT), (ins VECREG:$rA, R32C: > $rB), > "rotma\t$rT, $rA, $rB", RotateShift, > @@ -2332,6 +2626,10 @@ > (ROTMAv4i32 (v4i32 VECREG:$rA), > (SFIr32 (XSHWr16 R16C:$rB), 0))>; > > +def : Pat<(SPUvec_sra_v4i32 VECREG:$rA, R8C:$rB), > + (ROTMAv4i32 (v4i32 VECREG:$rA), > + (SFIr32 (XSHWr16 (XSBHr8 R8C:$rB)), 0))>; > + > def ROTMAr32: > RRForm<0b01011010000, (outs R32C:$rT), (ins R32C:$rA, R32C:$rB), > "rotma\t$rT, $rA, $rB", RotateShift, > @@ -2344,6 +2642,10 @@ > (ROTMAr32 R32C:$rA, > (SFIr32 (XSHWr16 R16C:$rB), 0))>; > > +def : Pat<(sra R32C:$rA, R8C:$rB), > + (ROTMAr32 R32C:$rA, > + (SFIr32 (XSHWr16 (XSBHr8 R8C:$rB)), 0))>; > + > def ROTMAIv4i32: > RRForm<0b01011110000, (outs VECREG:$rT), (ins VECREG:$rA, > rotNeg7imm:$val), > "rotmai\t$rT, $rA, $val", RotateShift, > @@ -2361,6 +2663,9 @@ > def : Pat<(sra R32C:$rA, (i16 uimm7:$val)), > (ROTMAIr32 R32C:$rA, uimm7:$val)>; > > +def : Pat<(sra R32C:$rA, (i8 uimm7:$val)), > + (ROTMAIr32 R32C:$rA, uimm7:$val)>; > + > // > ===------------------------------------------------------------------- > ---===// > // Branch and conditionals: > // > ===------------------------------------------------------------------- > ---===// > @@ -2401,12 +2706,21 @@ > } > > // Comparison operators: > +def CEQBr8: > + RRForm<0b00001011110, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), > + "ceqb\t$rT, $rA, $rB", ByteOp, > + [/* no pattern to match */]>; > > def CEQBv16i8: > RRForm<0b00001011110, (outs VECREG:$rT), (ins VECREG:$rA, VECREG: > $rB), > "ceqb\t$rT, $rA, $rB", ByteOp, > [/* no pattern to match: intrinsic */]>; > > +def CEQBIr8: > + RI10Form<0b01111110, (outs R8C:$rT), (ins R8C:$rA, s7imm:$val), > + "ceqbi\t$rT, $rA, $val", ByteOp, > + [/* no pattern to match: intrinsic */]>; > + > def CEQBIv16i8: > RI10Form<0b01111110, (outs VECREG:$rT), (ins VECREG:$rA, s7imm: > $val), > "ceqbi\t$rT, $rA, $val", ByteOp, > @@ -3075,6 +3389,10 @@ > def : Pat<(v4i32 v4i32Imm:$imm), > (IOHLvec (v4i32 (ILHUv4i32 (HI16_vec v4i32Imm:$imm))), > (LO16_vec v4i32Imm:$imm))>; > + > +// 8-bit constants > +def : Pat<(i8 imm:$imm), > + (ILHr8 imm:$imm)>; > > // > ===------------------------------------------------------------------- > ---===// > // Call instruction patterns: > @@ -3095,14 +3413,34 @@ > def : Pat<(sext_inreg R32C:$rSrc, i8), > (XSHWr32 (XSBHr32 R32C:$rSrc))>; > > +def : Pat<(i32 (sext R8C:$rSrc)), > + (XSHWr16 (XSBHr8 R8C:$rSrc))>; > + > def : Pat<(SPUextract_i8_sext VECREG:$rSrc), > (XSHWr32 (XSBHr32 (ORi32_v4i32 (v4i32 VECREG:$rSrc), > (v4i32 VECREG:$rSrc))))>; > > +// zext 8->16: Zero extend bytes to halfwords > +def : Pat<(i16 (zext R8C:$rSrc)), > + (ANDHI1To2 R8C:$rSrc, 0xff)>; > + > +// zext 8->32 from preferred slot in load/store > def : Pat<(SPUextract_i8_zext VECREG:$rSrc), > (ANDIr32 (ORi32_v4i32 (v4i32 VECREG:$rSrc), (v4i32 > VECREG:$rSrc)), > 0xff)>; > > +// zext 8->32: Zero extend bytes to words > +def : Pat<(i32 (zext R8C:$rSrc)), > + (ANDI1To4 R8C:$rSrc, 0xff)>; > + > +// anyext 8->16: Extend 8->16 bits, irrespective of sign > +def : Pat<(i16 (anyext R8C:$rSrc)), > + (ORHI1To2 R8C:$rSrc, 0)>; > + > +// anyext 8->32: Extend 8->32 bits, irrespective of sign > +def : Pat<(i32 (anyext R8C:$rSrc)), > + (ORI1To4 R8C:$rSrc, 0)>; > + > // zext 16->32: Zero extend halfwords to words (note that we have > to juggle the > // 0xffff constant since it will not fit into an immediate.) > def : Pat<(i32 (zext R16C:$rSrc)), > > Modified: llvm/trunk/lib/Target/CellSPU/SPUOperands.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ > CellSPU/SPUOperands.td?rev=45130&r1=45129&r2=45130&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/Target/CellSPU/SPUOperands.td (original) > +++ llvm/trunk/lib/Target/CellSPU/SPUOperands.td Mon Dec 17 > 16:32:34 2007 > @@ -99,15 +99,21 @@ > return isI32IntS10Immediate(N); > }]>; > > +// i32ImmUns10 predicate - True if the i32 immediate fits in a 10- > bit unsigned > +// field. Used by RI10Form instructions like 'ldq'. > +def i32ImmUns10 : PatLeaf<(imm), [{ > + return isI32IntU10Immediate(N); > +}]>; > + > // i16ImmSExt10 predicate - True if the i16 immediate fits in a 10- > bit sign > // extended field. Used by RI10Form instructions like 'ldq'. > def i16ImmSExt10 : PatLeaf<(imm), [{ > return isI16IntS10Immediate(N); > }]>; > > -// i16ImmU10 predicate - True if the i16 immediate fits into a 10- > bit unsigned > +// i16ImmUns10 predicate - True if the i16 immediate fits into a > 10-bit unsigned > // value. Used by RI10Form instructions. > -def i16ImmU10 : PatLeaf<(imm), [{ > +def i16ImmUns10 : PatLeaf<(imm), [{ > return isI16IntU10Immediate(N); > }]>; > > @@ -261,9 +267,21 @@ > return SPU::get_vec_i10imm(N, *CurDAG, MVT::i16).Val != 0; > }], v8i16SExt10Imm_xform>; > > +// v8i16Uns10Imm_xform function: convert build_vector to 16-bit > unsigned > +// immediate constant load for v8i16 vectors. > +def v8i16Uns10Imm_xform: SDNodeXForm + return SPU::get_vec_i10imm(N, *CurDAG, MVT::i16); > +}]>; > + > +// v8i16Uns10Imm: Predicate test for 16-bit unsigned immediate > constant > +// load, works in conjunction with its transform function. > +def v8i16Uns10Imm: PatLeaf<(build_vector), [{ > + return SPU::get_vec_i10imm(N, *CurDAG, MVT::i16).Val != 0; > +}], v8i16Uns10Imm_xform>; > + > // v8i16SExt16Imm_xform function: convert build_vector to 16-bit > sign extended > // immediate constant load for v8i16 vectors. > -def v8i16SExt16Imm_xform: SDNodeXForm +def v8i16Uns16Imm_xform: SDNodeXForm return SPU::get_vec_i16imm(N, *CurDAG, MVT::i16); > }]>; > > @@ -271,7 +289,7 @@ > // load, works in conjunction with its transform function. > def v8i16SExt16Imm: PatLeaf<(build_vector), [{ > return SPU::get_vec_i16imm(N, *CurDAG, MVT::i16).Val != 0; > -}], v8i16SExt16Imm_xform>; > +}], v8i16Uns16Imm_xform>; > > // v4i32SExt10Imm_xform function: convert build_vector to 10-bit > sign extended > // immediate constant load for v4i32 vectors. > @@ -285,6 +303,18 @@ > return SPU::get_vec_i10imm(N, *CurDAG, MVT::i32).Val != 0; > }], v4i32SExt10Imm_xform>; > > +// v4i32Uns10Imm_xform function: convert build_vector to 10-bit > unsigned > +// immediate constant load for v4i32 vectors. > +def v4i32Uns10Imm_xform: SDNodeXForm + return SPU::get_vec_i10imm(N, *CurDAG, MVT::i32); > +}]>; > + > +// v4i32Uns10Imm: Predicate test for 10-bit unsigned immediate > constant > +// load, works in conjunction with its transform function. > +def v4i32Uns10Imm: PatLeaf<(build_vector), [{ > + return SPU::get_vec_i10imm(N, *CurDAG, MVT::i32).Val != 0; > +}], v4i32Uns10Imm_xform>; > + > // v4i32SExt16Imm_xform function: convert build_vector to 16-bit > sign extended > // immediate constant load for v4i32 vectors. > def v4i32SExt16Imm_xform: SDNodeXForm @@ -390,6 +420,10 @@ > let PrintMethod = "printU7ImmOperand"; > } > > +def u7imm_i8: Operand { > + let PrintMethod = "printU7ImmOperand"; > +} > + > def u7imm_i32: Operand { > let PrintMethod = "printU7ImmOperand"; > } > @@ -412,6 +446,10 @@ > let PrintMethod = "printU10ImmOperand"; > } > > +def u10imm_i8: Operand { > + let PrintMethod = "printU10ImmOperand"; > +} > + > def u10imm_i32: Operand { > let PrintMethod = "printU10ImmOperand"; > } > @@ -420,6 +458,10 @@ > let PrintMethod = "printS16ImmOperand"; > } > > +def s16imm_i8: Operand { > + let PrintMethod = "printS16ImmOperand"; > +} > + > def s16imm_i32: Operand { > let PrintMethod = "printS16ImmOperand"; > } > > Modified: llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ > CellSPU/SPURegisterInfo.cpp?rev=45130&r1=45129&r2=45130&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp (original) > +++ llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp Mon Dec 17 > 16:32:34 2007 > @@ -328,7 +328,9 @@ > /* do what loadRegFromStackSlot does here... */ > } else { > unsigned Opc = 0; > - if (RC == SPU::R16CRegisterClass) { > + if (RC == SPU::R8CRegisterClass) { > + /* do brilliance here */ > + } else if (RC == SPU::R16CRegisterClass) { > /* Opc = PPC::LWZ; */ > } else if (RC == SPU::R32CRegisterClass) { > /* Opc = PPC::LD; */ > @@ -369,10 +371,9 @@ > abort(); > } > > - /* if (DestRC == SPU::R8CRegisterClass) { > + if (DestRC == SPU::R8CRegisterClass) { > BuildMI(MBB, MI, TII.get(SPU::ORBIr8), DestReg).addReg > (SrcReg).addImm(0); > - } else */ > - if (DestRC == SPU::R16CRegisterClass) { > + } else if (DestRC == SPU::R16CRegisterClass) { > BuildMI(MBB, MI, TII.get(SPU::ORHIr16), DestReg).addReg > (SrcReg).addImm(0); > } else if (DestRC == SPU::R32CRegisterClass) { > BuildMI(MBB, MI, TII.get(SPU::ORIr32), DestReg).addReg > (SrcReg).addImm(0); > > Modified: llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ > CellSPU/SPURegisterInfo.td?rev=45130&r1=45129&r2=45130&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.td (original) > +++ llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.td Mon Dec 17 > 16:32:34 2007 > @@ -359,6 +359,40 @@ > }]; > } > > +// The SPU's registers as 8-bit wide (byte) "preferred slot": > +def R8C : RegisterClass<"SPU", [i8], 128, > + [ > + /* volatile register */ > + R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, > + R17, R18, R19, R20, R21, R22, R23, R24, R25, R26, R27, R28, > R29, R30, R31, > + R32, R33, R34, R35, R36, R37, R38, R39, R40, R41, R42, R43, > R44, R45, R46, > + R47, R48, R49, R50, R51, R52, R53, R54, R55, R56, R57, R58, > R59, R60, R61, > + R62, R63, R64, R65, R66, R67, R68, R69, R70, R71, R72, R73, > R74, R75, R76, > + R77, R78, R79, > + /* non-volatile register: take hint from PPC and allocate in > reverse order */ > + R127, R126, R125, R124, R123, R122, R121, R120, R119, R118, > R117, R116, R115, > + R114, R113, R112, R111, R110, R109, R108, R107, R106, R105, > R104, R103, R102, > + R101, R100, R99, R98, R97, R96, R95, R94, R93, R92, R91, R90, > R89, R88, R87, > + R86, R85, R84, R83, R82, R81, R80, > + /* environment ptr, SP, LR */ > + R2, R1, R0 ]> > +{ > + let MethodProtos = [{ > + iterator allocation_order_begin(const MachineFunction &MF) const; > + iterator allocation_order_end(const MachineFunction &MF) const; > + }]; > + let MethodBodies = [{ > + R8CClass::iterator > + R8CClass::allocation_order_begin(const MachineFunction &MF) > const { > + return begin(); > + } > + R8CClass::iterator > + R8CClass::allocation_order_end(const MachineFunction &MF) const { > + return end()-3; // don't allocate R2, R1, or R0 (envp, sp, lr) > + } > + }]; > +} > + > // The SPU's registers as vector registers: > def VECREG : RegisterClass<"SPU", > [v16i8,v8i16,v4i32,v4f32,v2i64,v2f64], 128, > [ > > Modified: llvm/trunk/test/CodeGen/CellSPU/and_ops.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ > CellSPU/and_ops.ll?rev=45130&r1=45129&r2=45130&view=diff > > ====================================================================== > ======== > --- llvm/trunk/test/CodeGen/CellSPU/and_ops.ll (original) > +++ llvm/trunk/test/CodeGen/CellSPU/and_ops.ll Mon Dec 17 16:32:34 > 2007 > @@ -1,9 +1,9 @@ > ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s > -; RUN: grep and %t1.s | count 227 > +; RUN: grep and %t1.s | count 232 > ; RUN: grep andc %t1.s | count 85 > ; RUN: grep andi %t1.s | count 36 > -; RUN: grep andhi %t1.s | count 31 > -; RUN: grep andbi %t1.s | count 1 > +; RUN: grep andhi %t1.s | count 30 > +; RUN: grep andbi %t1.s | count 4 > > ; AND instruction generation: > define <4 x i32> @and_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) { > @@ -258,13 +258,19 @@ > } > > define i8 @and_u8(i8 zeroext %in) zeroext { > - ; ANDI generated: > - %tmp37 = and i8 %in, 37 ; [#uses=1] > + ; ANDBI generated: > + %tmp37 = and i8 %in, 37 > ret i8 %tmp37 > } > > -define i8 @and_i8(i8 signext %in) signext { > - ; ANDHI generated > - %tmp38 = and i8 %in, 37 ; [#uses=1] > +define i8 @and_sext8(i8 signext %in) signext { > + ; ANDBI generated > + %tmp38 = and i8 %in, 37 > + ret i8 %tmp38 > +} > + > +define i8 @and_i8(i8 %in) { > + ; ANDBI generated > + %tmp38 = and i8 %in, 205 > ret i8 %tmp38 > } > > Added: llvm/trunk/test/CodeGen/CellSPU/nand.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ > CellSPU/nand.ll?rev=45130&view=auto > > ====================================================================== > ======== > --- llvm/trunk/test/CodeGen/CellSPU/nand.ll (added) > +++ llvm/trunk/test/CodeGen/CellSPU/nand.ll Mon Dec 17 16:32:34 2007 > @@ -0,0 +1,119 @@ > +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s > +; RUN: grep nand %t1.s | count 90 > +; RUN: grep and %t1.s | count 94 > +; RUN: grep xsbh %t1.s | count 2 > +; RUN: grep xshw %t1.s | count 4 > + > +define <4 x i32> @nand_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) { > + %A = and <4 x i32> %arg2, %arg1 ; <<4 x i32>> [#uses=1] > + %B = xor <4 x i32> %A, < i32 -1, i32 -1, i32 -1, i32 -1 > > + ret <4 x i32> %B > +} > + > +define <4 x i32> @nand_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2) { > + %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] > + %B = xor <4 x i32> %A, < i32 -1, i32 -1, i32 -1, i32 -1 > > + ret <4 x i32> %B > +} > + > +define <8 x i16> @nand_v8i16_1(<8 x i16> %arg1, <8 x i16> %arg2) { > + %A = and <8 x i16> %arg2, %arg1 ; <<8 x i16>> [#uses=1] > + %B = xor <8 x i16> %A, < i16 -1, i16 -1, i16 -1, i16 -1, > + i16 -1, i16 -1, i16 -1, i16 -1 > > + ret <8 x i16> %B > +} > + > +define <8 x i16> @nand_v8i16_2(<8 x i16> %arg1, <8 x i16> %arg2) { > + %A = and <8 x i16> %arg1, %arg2 ; <<8 x i16>> [#uses=1] > + %B = xor <8 x i16> %A, < i16 -1, i16 -1, i16 -1, i16 -1, > + i16 -1, i16 -1, i16 -1, i16 -1 > > + ret <8 x i16> %B > +} > + > +define <16 x i8> @nand_v16i8_1(<16 x i8> %arg1, <16 x i8> %arg2) { > + %A = and <16 x i8> %arg2, %arg1 ; <<16 x i8>> [#uses=1] > + %B = xor <16 x i8> %A, < i8 -1, i8 -1, i8 -1, i8 -1, i8 > -1, i8 -1, > + i8 -1, i8 -1, i8 -1, i8 -1, i8 > -1, i8 -1, > + i8 -1, i8 -1, i8 -1, i8 -1 > > + ret <16 x i8> %B > +} > + > +define <16 x i8> @nand_v16i8_2(<16 x i8> %arg1, <16 x i8> %arg2) { > + %A = and <16 x i8> %arg1, %arg2 ; <<16 x i8>> [#uses=1] > + %B = xor <16 x i8> %A, < i8 -1, i8 -1, i8 -1, i8 -1, i8 > -1, i8 -1, > + i8 -1, i8 -1, i8 -1, i8 -1, i8 > -1, i8 -1, > + i8 -1, i8 -1, i8 -1, i8 -1 > > + ret <16 x i8> %B > +} > + > +define i32 @nand_i32_1(i32 %arg1, i32 %arg2) { > + %A = and i32 %arg2, %arg1 ; [#uses=1] > + %B = xor i32 %A, -1 ; [#uses=1] > + ret i32 %B > +} > + > +define i32 @nand_i32_2(i32 %arg1, i32 %arg2) { > + %A = and i32 %arg1, %arg2 ; [#uses=1] > + %B = xor i32 %A, -1 ; [#uses=1] > + ret i32 %B > +} > + > +define i16 @nand_i16_1(i16 signext %arg1, i16 signext %arg2) > signext { > + %A = and i16 %arg2, %arg1 ; [#uses=1] > + %B = xor i16 %A, -1 ; [#uses=1] > + ret i16 %B > +} > + > +define i16 @nand_i16_2(i16 signext %arg1, i16 signext %arg2) > signext { > + %A = and i16 %arg1, %arg2 ; [#uses=1] > + %B = xor i16 %A, -1 ; [#uses=1] > + ret i16 %B > +} > + > +define i16 @nand_i16u_1(i16 zeroext %arg1, i16 zeroext %arg2) > zeroext { > + %A = and i16 %arg2, %arg1 ; [#uses=1] > + %B = xor i16 %A, -1 ; [#uses=1] > + ret i16 %B > +} > + > +define i16 @nand_i16u_2(i16 zeroext %arg1, i16 zeroext %arg2) > zeroext { > + %A = and i16 %arg1, %arg2 ; [#uses=1] > + %B = xor i16 %A, -1 ; [#uses=1] > + ret i16 %B > +} > + > +define i8 @nand_i8u_1(i8 zeroext %arg1, i8 zeroext %arg2) > zeroext { > + %A = and i8 %arg2, %arg1 ; [#uses=1] > + %B = xor i8 %A, -1 ; [#uses=1] > + ret i8 %B > +} > + > +define i8 @nand_i8u_2(i8 zeroext %arg1, i8 zeroext %arg2) > zeroext { > + %A = and i8 %arg1, %arg2 ; [#uses=1] > + %B = xor i8 %A, -1 ; [#uses=1] > + ret i8 %B > +} > + > +define i8 @nand_i8_1(i8 signext %arg1, i8 signext %arg2) signext { > + %A = and i8 %arg2, %arg1 ; [#uses=1] > + %B = xor i8 %A, -1 ; [#uses=1] > + ret i8 %B > +} > + > +define i8 @nand_i8_2(i8 signext %arg1, i8 signext %arg2) signext { > + %A = and i8 %arg1, %arg2 ; [#uses=1] > + %B = xor i8 %A, -1 ; [#uses=1] > + ret i8 %B > +} > + > +define i8 @nand_i8_3(i8 %arg1, i8 %arg2) { > + %A = and i8 %arg2, %arg1 ; [#uses=1] > + %B = xor i8 %A, -1 ; [#uses=1] > + ret i8 %B > +} > + > +define i8 @nand_i8_4(i8 %arg1, i8 %arg2) { > + %A = and i8 %arg1, %arg2 ; [#uses=1] > + %B = xor i8 %A, -1 ; [#uses=1] > + ret i8 %B > +} > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Tue Dec 18 02:42:12 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 18 Dec 2007 08:42:12 -0000 Subject: [llvm-commits] [llvm] r45157 - in /llvm/trunk: lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll Message-ID: <200712180842.lBI8gC4c004788@zion.cs.uiuc.edu> Author: evancheng Date: Tue Dec 18 02:42:10 2007 New Revision: 45157 URL: http://llvm.org/viewvc/llvm-project?rev=45157&view=rev Log: FIX for PR1799: When a load is unfolded from an instruction, check if it is a new node. If not, do not create a new SUnit. Added: llvm/trunk/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=45157&r1=45156&r2=45157&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Tue Dec 18 02:42:10 2007 @@ -429,21 +429,9 @@ DAG.ReplaceAllUsesOfValueWith(SDOperand(SU->Node, OldNumVals-1), SDOperand(LoadNode, 1)); - SUnit *LoadSU = NewSUnit(LoadNode); SUnit *NewSU = NewSUnit(N); - SUnitMap[LoadNode].push_back(LoadSU); SUnitMap[N].push_back(NewSU); - const TargetInstrDescriptor *TID = &TII->get(LoadNode->getTargetOpcode()); - for (unsigned i = 0; i != TID->numOperands; ++i) { - if (TID->getOperandConstraint(i, TOI::TIED_TO) != -1) { - LoadSU->isTwoAddress = true; - break; - } - } - if (TID->Flags & M_COMMUTABLE) - LoadSU->isCommutable = true; - - TID = &TII->get(N->getTargetOpcode()); + const TargetInstrDescriptor *TID = &TII->get(N->getTargetOpcode()); for (unsigned i = 0; i != TID->numOperands; ++i) { if (TID->getOperandConstraint(i, TOI::TIED_TO) != -1) { NewSU->isTwoAddress = true; @@ -452,13 +440,30 @@ } if (TID->Flags & M_COMMUTABLE) NewSU->isCommutable = true; - // FIXME: Calculate height / depth and propagate the changes? - LoadSU->Depth = NewSU->Depth = SU->Depth; - LoadSU->Height = NewSU->Height = SU->Height; - ComputeLatency(LoadSU); + NewSU->Depth = SU->Depth; + NewSU->Height = SU->Height; ComputeLatency(NewSU); + // LoadNode may already exist. This can happen when there is another + // load from the same location and producing the same type of value + // but it has different alignment or volatileness. + bool isNewLoad = true; + SUnit *LoadSU; + DenseMap >::iterator SMI = + SUnitMap.find(LoadNode); + if (SMI != SUnitMap.end()) { + LoadSU = SMI->second.front(); + isNewLoad = false; + } else { + LoadSU = NewSUnit(LoadNode); + SUnitMap[LoadNode].push_back(LoadSU); + + LoadSU->Depth = SU->Depth; + LoadSU->Height = SU->Height; + ComputeLatency(LoadSU); + } + SUnit *ChainPred = NULL; SmallVector ChainSuccs; SmallVector LoadPreds; @@ -484,12 +489,14 @@ } SU->removePred(ChainPred, true, false); - LoadSU->addPred(ChainPred, true, false); + if (isNewLoad) + LoadSU->addPred(ChainPred, true, false); for (unsigned i = 0, e = LoadPreds.size(); i != e; ++i) { SDep *Pred = &LoadPreds[i]; SU->removePred(Pred->Dep, Pred->isCtrl, Pred->isSpecial); - LoadSU->addPred(Pred->Dep, Pred->isCtrl, Pred->isSpecial, - Pred->Reg, Pred->Cost); + if (isNewLoad) + LoadSU->addPred(Pred->Dep, Pred->isCtrl, Pred->isSpecial, + Pred->Reg, Pred->Cost); } for (unsigned i = 0, e = NodePreds.size(); i != e; ++i) { SDep *Pred = &NodePreds[i]; @@ -506,12 +513,15 @@ for (unsigned i = 0, e = ChainSuccs.size(); i != e; ++i) { SDep *Succ = &ChainSuccs[i]; Succ->Dep->removePred(SU, Succ->isCtrl, Succ->isSpecial); - Succ->Dep->addPred(LoadSU, Succ->isCtrl, Succ->isSpecial, - Succ->Reg, Succ->Cost); + if (isNewLoad) + Succ->Dep->addPred(LoadSU, Succ->isCtrl, Succ->isSpecial, + Succ->Reg, Succ->Cost); } - NewSU->addPred(LoadSU, false, false); + if (isNewLoad) + NewSU->addPred(LoadSU, false, false); - AvailableQueue->addNode(LoadSU); + if (isNewLoad) + AvailableQueue->addNode(LoadSU); AvailableQueue->addNode(NewSU); ++NumUnfolds; @@ -519,8 +529,8 @@ if (NewSU->NumSuccsLeft == 0) { NewSU->isAvailable = true; return NewSU; - } else - SU = NewSU; + } + SU = NewSU; } DOUT << "Duplicating SU # " << SU->NodeNum << "\n"; Added: llvm/trunk/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll?rev=45157&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll (added) +++ llvm/trunk/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll Tue Dec 18 02:42:10 2007 @@ -0,0 +1,35 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu +; PR1799 + + %struct.c34007g__designated___XUB = type { i32, i32, i32, i32 } + %struct.c34007g__pkg__parent = type { i32*, %struct.c34007g__designated___XUB* } + +define void @_ada_c34007g() { +entry: + %x8 = alloca %struct.c34007g__pkg__parent, align 8 ; <%struct.c34007g__pkg__parent*> [#uses=2] + br i1 true, label %bb1271, label %bb848 + +bb848: ; preds = %entry + ret void + +bb1271: ; preds = %bb898 + %tmp1272 = getelementptr %struct.c34007g__pkg__parent* %x8, i32 0, i32 0 ; [#uses=1] + %x82167 = bitcast %struct.c34007g__pkg__parent* %x8 to i64* ; [#uses=1] + br i1 true, label %bb4668, label %bb848 + +bb4668: ; preds = %bb4648 + %tmp5464 = load i64* %x82167, align 8 ; [#uses=1] + %tmp5467 = icmp ne i64 0, %tmp5464 ; [#uses=1] + %tmp5470 = load i32** %tmp1272, align 8 ; [#uses=1] + %tmp5471 = icmp eq i32* %tmp5470, null ; [#uses=1] + call fastcc void @c34007g__pkg__create.311( %struct.c34007g__pkg__parent* null, i32 7, i32 9, i32 2, i32 4, i32 1 ) + %tmp5475 = or i1 %tmp5471, %tmp5467 ; [#uses=1] + %tmp5497 = or i1 %tmp5475, false ; [#uses=1] + br i1 %tmp5497, label %bb848, label %bb5507 + +bb5507: ; preds = %bb4668 + ret void + +} + +declare fastcc void @c34007g__pkg__create.311(%struct.c34007g__pkg__parent*, i32, i32, i32, i32, i32) From christopher.lamb at gmail.com Tue Dec 18 03:34:42 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 18 Dec 2007 09:34:42 -0000 Subject: [llvm-commits] [llvm] r45158 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll Message-ID: <200712180934.lBI9Yg0u008900@zion.cs.uiuc.edu> Author: clamb Date: Tue Dec 18 03:34:41 2007 New Revision: 45158 URL: http://llvm.org/viewvc/llvm-project?rev=45158&view=rev Log: Fold certain additions through selects (and their compares) so as to eliminate subtractions. This code is often produced by the SMAX expansion in SCEV. This implements test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll Added: llvm/trunk/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll Modified: llvm/trunk/lib/Target/README.txt llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Modified: llvm/trunk/lib/Target/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=45158&r1=45157&r2=45158&view=diff ============================================================================== --- llvm/trunk/lib/Target/README.txt (original) +++ llvm/trunk/lib/Target/README.txt Tue Dec 18 03:34:41 2007 @@ -464,21 +464,3 @@ } //===---------------------------------------------------------------------===// - -This code is often produced by the SMAX expansion in SCEV: - -define i32 @foo(i32 %a) { -entry: - %tmp15 = sub i32 99, %a ; [#uses=2] - %tmp16 = icmp slt i32 %tmp15, 0 ; [#uses=1] - %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; [#uses=1] - %tmp12 = add i32 %smax, %a ; [#uses=1] - %tmp13 = add i32 %tmp12, 1 ; [#uses=1] - ret i32 %tmp13 -} - -Note that the tmp12 add can be pushed through the select operands, turning -it into a "select %tmp16, %a, 99". We apparently already do this in dag -combine because it isn't present in X86 output. - -//===---------------------------------------------------------------------===// Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=45158&r1=45157&r2=45158&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Dec 18 03:34:41 2007 @@ -2130,6 +2130,67 @@ return new PtrToIntInst(I2, CI->getType()); } } + + // add (select (icmp 0 (sub m A)) X Y) A -> + // add (select (icmp A m) X Y) A + // + // add (select X 0 (sub n A)) A -> + // select X A n -> + { + SelectInst *SI = dyn_cast(LHS); + Value *Other = RHS; + if (!SI) { + SI = dyn_cast(RHS); + Other = LHS; + } + if (SI) { + Value *TV = SI->getTrueValue(); + Value *FV = SI->getFalseValue(); + Value *A; + + // Can we fold the add into the argument of the compare? + Value *Cond = SI->getCondition(); + if (ICmpInst *IC = dyn_cast(Cond)) { + Value *ICOp0 = IC->getOperand(0); + Value *ICOp1 = IC->getOperand(1); + ConstantInt *C3, *C4; + + // Check both arguments of the compare for a matching subtract. + if (match(ICOp0, m_ConstantInt(C3)) && C3->getValue() == 0 && + match(ICOp1, m_Sub(m_ConstantInt(C4), m_Value(A))) && + A == Other) { + // We managed to fold the add into the RHS of the select condition. + Cond = new ICmpInst(IC->getPredicate(), A, C4, "asis", SI); + } else if (match(ICOp1, m_ConstantInt(C3)) && C3->getValue() == 0 && + match(ICOp0, m_Sub(m_ConstantInt(C4), m_Value(A))) && + A == Other) { + // We managed to fold the add into the LHS of the select condition. + Cond = new ICmpInst(IC->getPredicate(), C4, A, "asis", SI); + } + } + + // Can we fold the add into the argument of the select? + // We check both true and false select arguments for a matching subtract. + ConstantInt *C1, *C2; + if (match(FV, m_ConstantInt(C1)) && C1->getValue() == 0 && + match(TV, m_Sub(m_ConstantInt(C2), m_Value(A))) && + A == Other) { + // We managed to fold the add into the true select value, + // picking up a simplified condition, if available. + return new SelectInst(Cond, C2, A, "adselsub"); + } else if (match(TV, m_ConstantInt(C1)) && C1->getValue() == 0 && + match(FV, m_Sub(m_ConstantInt(C2), m_Value(A))) && + A == Other) { + // We managed to fold the add into the false select value, + // picking up a simplified condition, if available. + return new SelectInst(Cond, A, C2, "adselsub"); + } else if (Cond != SI->getCondition()) { + // We only managed to fold the add into the select condition. + SI->setOperand(0, Cond); + Changed = true; + } + } + } return Changed ? &I : 0; } Added: llvm/trunk/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll?rev=45158&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll (added) +++ llvm/trunk/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll Tue Dec 18 03:34:41 2007 @@ -0,0 +1,38 @@ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep {sub} + +define i32 @foo(i32 %a) { +entry: + %tmp15 = sub i32 99, %a ; [#uses=2] + %tmp16 = icmp slt i32 %tmp15, 0 ; [#uses=1] + %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; [#uses=1] + %tmp12 = add i32 %smax, %a ; [#uses=1] + %tmp13 = add i32 %tmp12, 1 ; [#uses=1] + ret i32 %tmp13 +} + +define i32 @bar(i32 %a) { +entry: + %tmp15 = sub i32 99, %a ; [#uses=2] + %tmp16 = icmp slt i32 %tmp15, 0 ; [#uses=1] + %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; [#uses=1] + %tmp12 = add i32 %smax, %a ; [#uses=1] + ret i32 %tmp12 +} + +define i32 @baz(i32 %a) { +entry: + %tmp15 = sub i32 99, %a ; [#uses=1] + %tmp16 = icmp slt i32 %tmp15, 0 ; [#uses=1] + %smax = select i1 %tmp16, i32 0, i32 42 ; [#uses=1] + %tmp12 = add i32 %smax, %a ; [#uses=1] + ret i32 %tmp12 +} + +define i32 @fun(i32 %a) { +entry: + %tmp15 = sub i32 99, %a ; [#uses=1] + %tmp16 = icmp slt i32 %a, 0 ; [#uses=1] + %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; [#uses=1] + %tmp12 = add i32 %smax, %a ; [#uses=1] + ret i32 %tmp12 +} \ No newline at end of file From baldrick at free.fr Tue Dec 18 03:34:40 2007 From: baldrick at free.fr (Duncan Sands) Date: Tue, 18 Dec 2007 10:34:40 +0100 Subject: [llvm-commits] [llvm] r45108 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Transforms/Utils/InlineFunction.cpp lib/VMCore/Verifier.cpp test/CodeGen/Generic/2007-12-17-InvokeAsm.ll test/Transforms/Inline/2007-04-15-InlineEH.ll Message-ID: <200712181034.41231.baldrick@free.fr> > Woot, thanks Duncan. Please update langref if it says invoke (asm) > is invalid. It doesn't. Ciao, Duncan. From christopher.lamb at gmail.com Tue Dec 18 03:43:16 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 18 Dec 2007 01:43:16 -0800 Subject: [llvm-commits] [llvm] r45141 - /llvm/trunk/lib/Target/README.txt In-Reply-To: <200712180119.lBI1JIRh007194@zion.cs.uiuc.edu> References: <200712180119.lBI1JIRh007194@zion.cs.uiuc.edu> Message-ID: Hopefully fixed by http://lists.cs.uiuc.edu/pipermail/llvm-commits/ Week-of-Mon-20071217/056446.html This is my first attempt hacking on Transforms, so some of the idioms were a little new to me. Hope the patch looks OK! =) On Dec 17, 2007, at 5:19 PM, Chris Lattner wrote: > Author: lattner > Date: Mon Dec 17 19:19:18 2007 > New Revision: 45141 > > URL: http://llvm.org/viewvc/llvm-project?rev=45141&view=rev > Log: > add a missed case. > > Modified: > llvm/trunk/lib/Target/README.txt > > Modified: llvm/trunk/lib/Target/README.txt > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ > README.txt?rev=45141&r1=45140&r2=45141&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/Target/README.txt (original) > +++ llvm/trunk/lib/Target/README.txt Mon Dec 17 19:19:18 2007 > @@ -464,3 +464,21 @@ > } > > // > ===------------------------------------------------------------------- > --===// > + > +This code is often produced by the SMAX expansion in SCEV: > + > +define i32 @foo(i32 %a) { > +entry: > + %tmp15 = sub i32 99, %a ; [#uses=2] > + %tmp16 = icmp slt i32 %tmp15, 0 ; [#uses=1] > + %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; > [#uses=1] > + %tmp12 = add i32 %smax, %a ; [#uses=1] > + %tmp13 = add i32 %tmp12, 1 ; [#uses=1] > + ret i32 %tmp13 > +} > + > +Note that the tmp12 add can be pushed through the select operands, > turning > +it into a "select %tmp16, %a, 99". We apparently already do this > in dag > +combine because it isn't present in X86 output. > + > +// > ===------------------------------------------------------------------- > --===// > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -- Christopher Lamb -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20071218/956fb991/attachment.html From christopher.lamb at gmail.com Tue Dec 18 03:45:44 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 18 Dec 2007 09:45:44 -0000 Subject: [llvm-commits] [llvm] r45159 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll Message-ID: <200712180945.lBI9jlEl009369@zion.cs.uiuc.edu> Author: clamb Date: Tue Dec 18 03:45:40 2007 New Revision: 45159 URL: http://llvm.org/viewvc/llvm-project?rev=45159&view=rev Log: Fix typos. Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp llvm/trunk/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=45159&r1=45158&r2=45159&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Dec 18 03:45:40 2007 @@ -2135,7 +2135,7 @@ // add (select (icmp A m) X Y) A // // add (select X 0 (sub n A)) A -> - // select X A n -> + // select X A n { SelectInst *SI = dyn_cast(LHS); Value *Other = RHS; Modified: llvm/trunk/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll?rev=45159&r1=45158&r2=45159&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll Tue Dec 18 03:45:40 2007 @@ -35,4 +35,4 @@ %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; [#uses=1] %tmp12 = add i32 %smax, %a ; [#uses=1] ret i32 %tmp12 -} \ No newline at end of file +} From baldrick at free.fr Tue Dec 18 03:59:54 2007 From: baldrick at free.fr (Duncan Sands) Date: Tue, 18 Dec 2007 09:59:54 -0000 Subject: [llvm-commits] [llvm] r45160 - in /llvm/trunk: include/llvm/Function.h include/llvm/Instructions.h include/llvm/Support/CallSite.h lib/Transforms/IPO/PruneEH.cpp lib/Transforms/Scalar/InstructionCombining.cpp lib/Transforms/Scalar/SimplifyCFG.cpp lib/Transforms/Utils/InlineFunction.cpp lib/VMCore/Instructions.cpp Message-ID: <200712180959.lBI9xuBt010398@zion.cs.uiuc.edu> Author: baldrick Date: Tue Dec 18 03:59:50 2007 New Revision: 45160 URL: http://llvm.org/viewvc/llvm-project?rev=45160&view=rev Log: Rename isNoReturn to doesNotReturn, and isNoUnwind to doesNotThrow. Modified: llvm/trunk/include/llvm/Function.h llvm/trunk/include/llvm/Instructions.h llvm/trunk/include/llvm/Support/CallSite.h llvm/trunk/lib/Transforms/IPO/PruneEH.cpp llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp llvm/trunk/lib/Transforms/Scalar/SimplifyCFG.cpp llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp llvm/trunk/lib/VMCore/Instructions.cpp Modified: llvm/trunk/include/llvm/Function.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Function.h?rev=45160&r1=45159&r2=45160&view=diff ============================================================================== --- llvm/trunk/include/llvm/Function.h (original) +++ llvm/trunk/include/llvm/Function.h Tue Dec 18 03:59:50 2007 @@ -166,12 +166,12 @@ } /// @brief Determine if the function cannot return. - bool isNoReturn() const { + bool doesNotReturn() const { return paramHasAttr(0, ParamAttr::NoReturn); } /// @brief Determine if the function cannot unwind. - bool isNoUnwind() const { + bool doesNotThrow() const { return paramHasAttr(0, ParamAttr::NoUnwind); } Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=45160&r1=45159&r2=45160&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Tue Dec 18 03:59:50 2007 @@ -940,12 +940,12 @@ } /// @brief Determine if the call cannot return. - bool isNoReturn() const { + bool doesNotReturn() const { return paramHasAttr(0, ParamAttr::NoReturn); } /// @brief Determine if the call cannot unwind. - bool isNoUnwind() const { + bool doesNotThrow() const { return paramHasAttr(0, ParamAttr::NoUnwind); } @@ -1744,12 +1744,12 @@ } /// @brief Determine if the call cannot return. - bool isNoReturn() const { + bool doesNotReturn() const { return paramHasAttr(0, ParamAttr::NoReturn); } /// @brief Determine if the call cannot unwind. - bool isNoUnwind() const { + bool doesNotThrow() const { return paramHasAttr(0, ParamAttr::NoUnwind); } Modified: llvm/trunk/include/llvm/Support/CallSite.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CallSite.h?rev=45160&r1=45159&r2=45160&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/CallSite.h (original) +++ llvm/trunk/include/llvm/Support/CallSite.h Tue Dec 18 03:59:50 2007 @@ -74,7 +74,7 @@ bool onlyReadsMemory() const; /// @brief Determine if the call cannot unwind. - bool isNoUnwind() const; + bool doesNotThrow() const; /// getType - Return the type of the instruction that generated this call site /// Modified: llvm/trunk/lib/Transforms/IPO/PruneEH.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PruneEH.cpp?rev=45160&r1=45159&r2=45160&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/PruneEH.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/PruneEH.cpp Tue Dec 18 03:59:50 2007 @@ -74,11 +74,11 @@ SCCMightUnwind = true; SCCMightReturn = true; } else if (F->isDeclaration()) { - SCCMightUnwind |= !F->isNoUnwind(); - SCCMightReturn |= !F->isNoReturn(); + SCCMightUnwind |= !F->doesNotThrow(); + SCCMightReturn |= !F->doesNotReturn(); } else { - bool CheckUnwind = !SCCMightUnwind && !F->isNoUnwind(); - bool CheckReturn = !SCCMightReturn && !F->isNoReturn(); + bool CheckUnwind = !SCCMightUnwind && !F->doesNotThrow(); + bool CheckReturn = !SCCMightReturn && !F->doesNotReturn(); if (!CheckUnwind && !CheckReturn) continue; @@ -98,7 +98,7 @@ if (CheckUnwind && !SCCMightUnwind) for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) if (CallInst *CI = dyn_cast(I)) { - if (CI->isNoUnwind()) { + if (CI->doesNotThrow()) { // This call cannot throw. } else if (Function *Callee = CI->getCalledFunction()) { CallGraphNode *CalleeNode = CG[Callee]; @@ -155,7 +155,7 @@ bool MadeChange = false; for (Function::iterator BB = F->begin(), E = F->end(); BB != E; ++BB) { if (InvokeInst *II = dyn_cast(BB->getTerminator())) - if (II->isNoUnwind()) { + if (II->doesNotThrow()) { SmallVector Args(II->op_begin()+3, II->op_end()); // Insert a call instruction before the invoke. CallInst *Call = new CallInst(II->getCalledValue(), @@ -187,7 +187,7 @@ for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ) if (CallInst *CI = dyn_cast(I++)) - if (CI->isNoReturn() && !isa(I)) { + if (CI->doesNotReturn() && !isa(I)) { // This call calls a function that cannot return. Insert an // unreachable instruction after it and simplify the code. Do this // by splitting the BB, adding the unreachable, then deleting the Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=45160&r1=45159&r2=45160&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Dec 18 03:59:50 2007 @@ -8039,7 +8039,7 @@ } } - if (isa(Callee) && !CS.isNoUnwind()) { + if (isa(Callee) && !CS.paramHasAttr(0, ParamAttr::NoUnwind)) { // Inline asm calls cannot throw - mark them 'nounwind'. const ParamAttrsList *PAL = CS.getParamAttrs(); uint16_t RAttributes = PAL ? PAL->getParamAttrs(0) : 0; Modified: llvm/trunk/lib/Transforms/Scalar/SimplifyCFG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SimplifyCFG.cpp?rev=45160&r1=45159&r2=45160&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/SimplifyCFG.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/SimplifyCFG.cpp Tue Dec 18 03:59:50 2007 @@ -111,7 +111,7 @@ // canonicalizes unreachable insts into stores to null or undef. for (BasicBlock::iterator BBI = BB->begin(), E = BB->end(); BBI != E;++BBI){ if (CallInst *CI = dyn_cast(BBI)) { - if (CI->isNoReturn()) { + if (CI->doesNotReturn()) { // If we found a call to a no-return function, insert an unreachable // instruction after it. Make sure there isn't *already* one there // though. @@ -135,7 +135,7 @@ // Turn invokes that call 'nounwind' functions into ordinary calls. if (InvokeInst *II = dyn_cast(BB->getTerminator())) - if (II->isNoUnwind()) { + if (II->doesNotThrow()) { ChangeToCall(II); Changed = true; } Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp?rev=45160&r1=45159&r2=45160&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Tue Dec 18 03:59:50 2007 @@ -70,7 +70,7 @@ CallInst *CI = cast(I); // If this call cannot unwind, don't convert it to an invoke. - if (CI->isNoUnwind()) + if (CI->doesNotThrow()) continue; // Convert this function call into an invoke instruction. Modified: llvm/trunk/lib/VMCore/Instructions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=45160&r1=45159&r2=45160&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instructions.cpp (original) +++ llvm/trunk/lib/VMCore/Instructions.cpp Tue Dec 18 03:59:50 2007 @@ -65,11 +65,11 @@ else return cast(I)->onlyReadsMemory(); } -bool CallSite::isNoUnwind() const { +bool CallSite::doesNotThrow() const { if (CallInst *CI = dyn_cast(I)) - return CI->isNoUnwind(); + return CI->doesNotThrow(); else - return cast(I)->isNoUnwind(); + return cast(I)->doesNotThrow(); } //===----------------------------------------------------------------------===// From duncan.sands at math.u-psud.fr Tue Dec 18 03:09:07 2007 From: duncan.sands at math.u-psud.fr (Duncan Sands) Date: Tue, 18 Dec 2007 10:09:07 +0100 Subject: [llvm-commits] [llvm] r45108 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Transforms/Utils/InlineFunction.cpp lib/VMCore/Verifier.cpp test/CodeGen/Generic/2007-12-17-InvokeAsm.ll test/Transforms/Inline/2007-04-15-InlineEH.ll In-Reply-To: <6ED08A42-848F-4763-89A5-6B46F167951D@apple.com> References: <200712171808.lBHI8JA7014759@zion.cs.uiuc.edu> <6ED08A42-848F-4763-89A5-6B46F167951D@apple.com> Message-ID: <200712181009.08135.duncan.sands@math.u-psud.fr> > Woot, thanks Duncan. Please update langref if it says invoke (asm) > is invalid. It doesn't. Ciao, Duncan. From sabre at nondot.org Tue Dec 18 10:48:15 2007 From: sabre at nondot.org (Chris Lattner) Date: Tue, 18 Dec 2007 16:48:15 -0000 Subject: [llvm-commits] [llvm] r45161 - /llvm/trunk/lib/Target/X86/README.txt Message-ID: <200712181648.lBIGmGgI029759@zion.cs.uiuc.edu> Author: lattner Date: Tue Dec 18 10:48:14 2007 New Revision: 45161 URL: http://llvm.org/viewvc/llvm-project?rev=45161&view=rev Log: add an obvious load folding missed optzn. Modified: llvm/trunk/lib/Target/X86/README.txt Modified: llvm/trunk/lib/Target/X86/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=45161&r1=45160&r2=45161&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README.txt (original) +++ llvm/trunk/lib/Target/X86/README.txt Tue Dec 18 10:48:14 2007 @@ -1552,3 +1552,24 @@ andl $65535, %eax ret +//===---------------------------------------------------------------------===// + +We're missing an obvious fold of a load into imul: + +int test(long a, long b) { return a * b; } + +LLVM produces: +_test: + movl 4(%esp), %ecx + movl 8(%esp), %eax + imull %ecx, %eax + ret + +vs: +_test: + movl 8(%esp), %eax + imull 4(%esp), %eax + ret + +//===---------------------------------------------------------------------===// + From kremenek at apple.com Tue Dec 18 12:25:57 2007 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 18 Dec 2007 18:25:57 -0000 Subject: [llvm-commits] [llvm] r45162 - /llvm/trunk/include/llvm/Bitcode/Serialize.h Message-ID: <200712181825.lBIIPvDT003690@zion.cs.uiuc.edu> Author: kremenek Date: Tue Dec 18 12:25:55 2007 New Revision: 45162 URL: http://llvm.org/viewvc/llvm-project?rev=45162&view=rev Log: Added some sectioning comments to Serialize.h. Added additional serialization functors for use with std::foreach. Modified: llvm/trunk/include/llvm/Bitcode/Serialize.h Modified: llvm/trunk/include/llvm/Bitcode/Serialize.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Bitcode/Serialize.h?rev=45162&r1=45161&r2=45162&view=diff ============================================================================== --- llvm/trunk/include/llvm/Bitcode/Serialize.h (original) +++ llvm/trunk/include/llvm/Bitcode/Serialize.h Tue Dec 18 12:25:55 2007 @@ -33,39 +33,41 @@ public: explicit Serializer(BitstreamWriter& stream); ~Serializer(); + + //==------------------------------------------------==// + // Template-based dispatch to emit arbitrary types. + //==------------------------------------------------==// - template + template inline void Emit(const T& X) { SerializeTrait::Emit(*this,X); } - template - struct Emitter { - Serializer &S; - - Emitter(Serializer& s) : S(s) {} - void operator()(const T& x) const { S.Emit(x); } - }; - - template - Emitter MakeEmitter() { return Emitter(*this); } + //==------------------------------------------------==// + // Methods to emit primitive types. + //==------------------------------------------------==// void EmitInt(uint64_t X); void EmitSInt(int64_t X); - void EmitBool(bool X) { EmitInt(X); } + inline void EmitBool(bool X) { EmitInt(X); } void EmitCStr(const char* beg, const char* end); void EmitCStr(const char* cstr); void EmitPtr(const void* ptr) { EmitInt(getPtrId(ptr)); } template - void EmitRef(const T& ref) { EmitPtr(&ref); } + inline void EmitRef(const T& ref) { EmitPtr(&ref); } template - void EmitOwnedPtr(T* ptr) { + inline void EmitOwnedPtr(T* ptr) { EmitPtr(ptr); if (ptr) SerializeTrait::Emit(*this,*ptr); } + + //==------------------------------------------------==// + // Batch emission of pointers. + //==------------------------------------------------==// + template void BatchEmitOwnedPtrs(T1* p1, T2* p2) { EmitPtr(p1); @@ -135,6 +137,61 @@ if (p2) SerializeTrait::Emit(*this,*p2); if (p3) SerializeTrait::Emit(*this,*p3); } + + //==------------------------------------------------==// + // Emitter Functors + //==------------------------------------------------==// + + template + struct Emitter0 { + Serializer& S; + Emitter0(Serializer& s) : S(s) {} + void operator()(const T& x) const { + SerializeTrait::Emit(S,x); + } + }; + + template + struct Emitter1 { + Serializer& S; + Arg1 A1; + + Emitter1(Serializer& s, Arg1 a1) : S(s), A1(a1) {} + void operator()(const T& x) const { + SerializeTrait::Emit(S,x,A1); + } + }; + + template + struct Emitter2 { + Serializer& S; + Arg1 A1; + Arg2 A2; + + Emitter2(Serializer& s, Arg1 a1, Arg2 a2) : S(s), A1(a1), A2(a2) {} + void operator()(const T& x) const { + SerializeTrait::Emit(S,x,A1,A2); + } + }; + + template + Emitter0 MakeEmitter() { + return Emitter0(*this); + } + + template + Emitter1 MakeEmitter(Arg1 a1) { + return Emitter1(*this,a1); + } + + template + Emitter2 MakeEmitter(Arg1 a1, Arg2 a2) { + return Emitter2(*this,a1,a2); + } + + //==------------------------------------------------==// + // Misc. query and block/record manipulation methods. + //==------------------------------------------------==// bool isRegistered(const void* p) const; From clattner at apple.com Tue Dec 18 12:55:22 2007 From: clattner at apple.com (Chris Lattner) Date: Tue, 18 Dec 2007 10:55:22 -0800 Subject: [llvm-commits] [llvm] r45158 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll In-Reply-To: <200712180934.lBI9Yg0u008900@zion.cs.uiuc.edu> References: <200712180934.lBI9Yg0u008900@zion.cs.uiuc.edu> Message-ID: <7ABE0934-1092-4C58-B9CB-2DE04CF5E48D@apple.com> On Dec 18, 2007, at 1:34 AM, Christopher Lamb wrote: > Author: clamb > Date: Tue Dec 18 03:34:41 2007 > New Revision: 45158 > > URL: http://llvm.org/viewvc/llvm-project?rev=45158&view=rev > Log: > Fold certain additions through selects (and their compares) so as > to eliminate subtractions. This code is often produced by the SMAX > expansion in SCEV. > > This implements test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll Nice! Thanks for tackling this, > --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp > (original) > +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue > Dec 18 03:34:41 2007 > @@ -2130,6 +2130,67 @@ > return new PtrToIntInst(I2, CI->getType()); > } > } > + > + // add (select (icmp 0 (sub m A)) X Y) A -> > + // add (select (icmp A m) X Y) A I'm not sure this is right: the idea is that this pushes the added value into the selected value, not into the compare: add (select cond 0 (sub m A)) A -> (select cond A m) right? We don't want to change the compare, because then a different value is picked. -Chris > + // > + // add (select X 0 (sub n A)) A -> > + // select X A n > + { > + SelectInst *SI = dyn_cast(LHS); > + Value *Other = RHS; > + if (!SI) { > + SI = dyn_cast(RHS); > + Other = LHS; > + } > + if (SI) { > + Value *TV = SI->getTrueValue(); > + Value *FV = SI->getFalseValue(); > + Value *A; > + > + // Can we fold the add into the argument of the compare? > + Value *Cond = SI->getCondition(); > + if (ICmpInst *IC = dyn_cast(Cond)) { > + Value *ICOp0 = IC->getOperand(0); > + Value *ICOp1 = IC->getOperand(1); > + ConstantInt *C3, *C4; > + > + // Check both arguments of the compare for a matching > subtract. > + if (match(ICOp0, m_ConstantInt(C3)) && C3->getValue() == 0 && > + match(ICOp1, m_Sub(m_ConstantInt(C4), m_Value(A))) && > + A == Other) { > + // We managed to fold the add into the RHS of the select > condition. > + Cond = new ICmpInst(IC->getPredicate(), A, C4, "asis", SI); > + } else if (match(ICOp1, m_ConstantInt(C3)) && C3->getValue > () == 0 && > + match(ICOp0, m_Sub(m_ConstantInt(C4), m_Value(A))) && > + A == Other) { > + // We managed to fold the add into the LHS of the select > condition. > + Cond = new ICmpInst(IC->getPredicate(), C4, A, "asis", SI); > + } > + } > + > + // Can we fold the add into the argument of the select? > + // We check both true and false select arguments for a > matching subtract. > + ConstantInt *C1, *C2; > + if (match(FV, m_ConstantInt(C1)) && C1->getValue() == 0 && > + match(TV, m_Sub(m_ConstantInt(C2), m_Value(A))) && > + A == Other) { > + // We managed to fold the add into the true select value, > + // picking up a simplified condition, if available. > + return new SelectInst(Cond, C2, A, "adselsub"); > + } else if (match(TV, m_ConstantInt(C1)) && C1->getValue() == > 0 && > + match(FV, m_Sub(m_ConstantInt(C2), m_Value(A))) && > + A == Other) { > + // We managed to fold the add into the false select value, > + // picking up a simplified condition, if available. > + return new SelectInst(Cond, A, C2, "adselsub"); > + } else if (Cond != SI->getCondition()) { > + // We only managed to fold the add into the select condition. > + SI->setOperand(0, Cond); > + Changed = true; > + } > + } > + } > > return Changed ? &I : 0; > } > > Added: llvm/trunk/test/Transforms/InstCombine/2007-12-18- > AddSelCmpSub.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ > InstCombine/2007-12-18-AddSelCmpSub.ll?rev=45158&view=auto > > ====================================================================== > ======== > --- llvm/trunk/test/Transforms/InstCombine/2007-12-18- > AddSelCmpSub.ll (added) > +++ llvm/trunk/test/Transforms/InstCombine/2007-12-18- > AddSelCmpSub.ll Tue Dec 18 03:34:41 2007 > @@ -0,0 +1,38 @@ > +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep {sub} > + > +define i32 @foo(i32 %a) { > +entry: > + %tmp15 = sub i32 99, %a ; [#uses=2] > + %tmp16 = icmp slt i32 %tmp15, 0 ; [#uses=1] > + %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; > [#uses=1] > + %tmp12 = add i32 %smax, %a ; [#uses=1] > + %tmp13 = add i32 %tmp12, 1 ; [#uses=1] > + ret i32 %tmp13 > +} > + > +define i32 @bar(i32 %a) { > +entry: > + %tmp15 = sub i32 99, %a ; [#uses=2] > + %tmp16 = icmp slt i32 %tmp15, 0 ; [#uses=1] > + %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; > [#uses=1] > + %tmp12 = add i32 %smax, %a ; [#uses=1] > + ret i32 %tmp12 > +} > + > +define i32 @baz(i32 %a) { > +entry: > + %tmp15 = sub i32 99, %a ; [#uses=1] > + %tmp16 = icmp slt i32 %tmp15, 0 ; [#uses=1] > + %smax = select i1 %tmp16, i32 0, i32 42 ; > [#uses=1] > + %tmp12 = add i32 %smax, %a ; [#uses=1] > + ret i32 %tmp12 > +} > + > +define i32 @fun(i32 %a) { > +entry: > + %tmp15 = sub i32 99, %a ; [#uses=1] > + %tmp16 = icmp slt i32 %a, 0 ; [#uses=1] > + %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; > [#uses=1] > + %tmp12 = add i32 %smax, %a ; [#uses=1] > + ret i32 %tmp12 > +} > \ No newline at end of file > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From sabre at nondot.org Tue Dec 18 13:04:25 2007 From: sabre at nondot.org (Chris Lattner) Date: Tue, 18 Dec 2007 19:04:25 -0000 Subject: [llvm-commits] [llvm] r45163 - in /llvm/trunk: include/llvm/InlineAsm.h lib/VMCore/InlineAsm.cpp Message-ID: <200712181904.lBIJ4PiM005740@zion.cs.uiuc.edu> Author: lattner Date: Tue Dec 18 13:04:24 2007 New Revision: 45163 URL: http://llvm.org/viewvc/llvm-project?rev=45163&view=rev Log: remove a dead annotation Modified: llvm/trunk/include/llvm/InlineAsm.h llvm/trunk/lib/VMCore/InlineAsm.cpp Modified: llvm/trunk/include/llvm/InlineAsm.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/InlineAsm.h?rev=45163&r1=45162&r2=45163&view=diff ============================================================================== --- llvm/trunk/include/llvm/InlineAsm.h (original) +++ llvm/trunk/include/llvm/InlineAsm.h Tue Dec 18 13:04:24 2007 @@ -132,7 +132,4 @@ } // End llvm namespace -// Make sure the InlineAsm.cpp file is linked when this one is #included. -FORCE_DEFINING_FILE_TO_BE_LINKED(InlineAsm) - #endif Modified: llvm/trunk/lib/VMCore/InlineAsm.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/InlineAsm.cpp?rev=45163&r1=45162&r2=45163&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/InlineAsm.cpp (original) +++ llvm/trunk/lib/VMCore/InlineAsm.cpp Tue Dec 18 13:04:24 2007 @@ -212,4 +212,3 @@ return true; } -DEFINING_FILE_FOR(InlineAsm) From evan.cheng at apple.com Tue Dec 18 13:06:30 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 18 Dec 2007 19:06:30 -0000 Subject: [llvm-commits] [llvm] r45164 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <200712181906.lBIJ6VRY005913@zion.cs.uiuc.edu> Author: evancheng Date: Tue Dec 18 13:06:30 2007 New Revision: 45164 URL: http://llvm.org/viewvc/llvm-project?rev=45164&view=rev Log: Also print alignment and volatileness. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=45164&r1=45163&r2=45164&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Dec 18 13:06:30 2007 @@ -3939,6 +3939,15 @@ } else if (const VTSDNode *N = dyn_cast(this)) { cerr << ":" << MVT::getValueTypeString(N->getVT()); } else if (const LoadSDNode *LD = dyn_cast(this)) { + const Value *SrcValue = LD->getSrcValue(); + int SrcOffset = LD->getSrcValueOffset(); + cerr << " <"; + if (SrcValue) + cerr << SrcValue; + else + cerr << "null"; + cerr << ":" << SrcOffset << ">"; + bool doExt = true; switch (LD->getExtensionType()) { default: doExt = false; break; @@ -3958,16 +3967,19 @@ const char *AM = getIndexedModeName(LD->getAddressingMode()); if (*AM) cerr << " " << AM; - - const Value *SrcValue = LD->getSrcValue(); - int SrcOffset = LD->getSrcValueOffset(); + if (LD->isVolatile()) + cerr << " "; + cerr << " alignment=" << LD->getAlignment(); + } else if (const StoreSDNode *ST = dyn_cast(this)) { + const Value *SrcValue = ST->getSrcValue(); + int SrcOffset = ST->getSrcValueOffset(); cerr << " <"; if (SrcValue) cerr << SrcValue; else cerr << "null"; cerr << ":" << SrcOffset << ">"; - } else if (const StoreSDNode *ST = dyn_cast(this)) { + if (ST->isTruncatingStore()) cerr << " getStoredVT()) << ">"; @@ -3975,15 +3987,9 @@ const char *AM = getIndexedModeName(ST->getAddressingMode()); if (*AM) cerr << " " << AM; - - const Value *SrcValue = ST->getSrcValue(); - int SrcOffset = ST->getSrcValueOffset(); - cerr << " <"; - if (SrcValue) - cerr << SrcValue; - else - cerr << "null"; - cerr << ":" << SrcOffset << ">"; + if (ST->isVolatile()) + cerr << " "; + cerr << " alignment=" << ST->getAlignment(); } } From sabre at nondot.org Tue Dec 18 13:15:49 2007 From: sabre at nondot.org (Chris Lattner) Date: Tue, 18 Dec 2007 19:15:49 -0000 Subject: [llvm-commits] [llvm] r45165 - in /llvm/trunk: include/llvm/InlineAsm.h include/llvm/System/Mutex.h include/llvm/System/Path.h include/llvm/System/TimeValue.h lib/System/Mutex.cpp lib/System/Path.cpp lib/System/TimeValue.cpp Message-ID: <200712181915.lBIJFnFR006696@zion.cs.uiuc.edu> Author: lattner Date: Tue Dec 18 13:15:48 2007 New Revision: 45165 URL: http://llvm.org/viewvc/llvm-project?rev=45165&view=rev Log: remove obviously dead uses of IncludeFile. Modified: llvm/trunk/include/llvm/InlineAsm.h llvm/trunk/include/llvm/System/Mutex.h llvm/trunk/include/llvm/System/Path.h llvm/trunk/include/llvm/System/TimeValue.h llvm/trunk/lib/System/Mutex.cpp llvm/trunk/lib/System/Path.cpp llvm/trunk/lib/System/TimeValue.cpp Modified: llvm/trunk/include/llvm/InlineAsm.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/InlineAsm.h?rev=45165&r1=45164&r2=45165&view=diff ============================================================================== --- llvm/trunk/include/llvm/InlineAsm.h (original) +++ llvm/trunk/include/llvm/InlineAsm.h Tue Dec 18 13:15:48 2007 @@ -17,7 +17,6 @@ #define LLVM_INLINEASM_H #include "llvm/Value.h" -#include "llvm/System/IncludeFile.h" #include namespace llvm { Modified: llvm/trunk/include/llvm/System/Mutex.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/Mutex.h?rev=45165&r1=45164&r2=45165&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/Mutex.h (original) +++ llvm/trunk/include/llvm/System/Mutex.h Tue Dec 18 13:15:48 2007 @@ -14,8 +14,6 @@ #ifndef LLVM_SYSTEM_MUTEX_H #define LLVM_SYSTEM_MUTEX_H -#include "llvm/System/IncludeFile.h" - namespace llvm { namespace sys @@ -83,6 +81,4 @@ } } -FORCE_DEFINING_FILE_TO_BE_LINKED(SystemMutex) - #endif Modified: llvm/trunk/include/llvm/System/Path.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/Path.h?rev=45165&r1=45164&r2=45165&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/Path.h (original) +++ llvm/trunk/include/llvm/System/Path.h Tue Dec 18 13:15:48 2007 @@ -15,7 +15,6 @@ #define LLVM_SYSTEM_PATH_H #include "llvm/System/TimeValue.h" -#include "llvm/System/IncludeFile.h" #include #include #include @@ -655,5 +654,4 @@ } -FORCE_DEFINING_FILE_TO_BE_LINKED(SystemPath) #endif Modified: llvm/trunk/include/llvm/System/TimeValue.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/TimeValue.h?rev=45165&r1=45164&r2=45165&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/TimeValue.h (original) +++ llvm/trunk/include/llvm/System/TimeValue.h Tue Dec 18 13:15:48 2007 @@ -12,7 +12,6 @@ //===----------------------------------------------------------------------===// #include "llvm/Support/DataTypes.h" -#include "llvm/System/IncludeFile.h" #include #ifndef LLVM_SYSTEM_TIMEVALUE_H @@ -380,6 +379,4 @@ } } -FORCE_DEFINING_FILE_TO_BE_LINKED(SystemTimeValue) - #endif Modified: llvm/trunk/lib/System/Mutex.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Mutex.cpp?rev=45165&r1=45164&r2=45165&view=diff ============================================================================== --- llvm/trunk/lib/System/Mutex.cpp (original) +++ llvm/trunk/lib/System/Mutex.cpp Tue Dec 18 13:15:48 2007 @@ -159,4 +159,3 @@ #endif #endif -DEFINING_FILE_FOR(SystemMutex) Modified: llvm/trunk/lib/System/Path.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Path.cpp?rev=45165&r1=45164&r2=45165&view=diff ============================================================================== --- llvm/trunk/lib/System/Path.cpp (original) +++ llvm/trunk/lib/System/Path.cpp Tue Dec 18 13:15:48 2007 @@ -181,4 +181,3 @@ #include "Win32/Path.inc" #endif -DEFINING_FILE_FOR(SystemPath) Modified: llvm/trunk/lib/System/TimeValue.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/TimeValue.cpp?rev=45165&r1=45164&r2=45165&view=diff ============================================================================== --- llvm/trunk/lib/System/TimeValue.cpp (original) +++ llvm/trunk/lib/System/TimeValue.cpp Tue Dec 18 13:15:48 2007 @@ -56,4 +56,3 @@ #include "Win32/TimeValue.inc" #endif -DEFINING_FILE_FOR(SystemTimeValue) From isanbard at gmail.com Tue Dec 18 13:21:53 2007 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 18 Dec 2007 19:21:53 -0000 Subject: [llvm-commits] [llvm] r45166 - /llvm/trunk/utils/buildit/build_llvm Message-ID: <200712181921.lBIJLrJP007116@zion.cs.uiuc.edu> Author: void Date: Tue Dec 18 13:21:52 2007 New Revision: 45166 URL: http://llvm.org/viewvc/llvm-project?rev=45166&view=rev Log: Ignore shell scripts when doing "dsymutil" call. Modified: llvm/trunk/utils/buildit/build_llvm Modified: llvm/trunk/utils/buildit/build_llvm URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/buildit/build_llvm?rev=45166&r1=45165&r2=45166&view=diff ============================================================================== --- llvm/trunk/utils/buildit/build_llvm (original) +++ llvm/trunk/utils/buildit/build_llvm Tue Dec 18 13:21:52 2007 @@ -201,7 +201,8 @@ rm -rf * || exit 1 # Generate .dSYM files -find $DEST_DIR -perm -0111 -type f -print | xargs -n 1 -P ${SYSCTL} dsymutil +find $DEST_DIR -perm -0111 -type f ! \( -name '*.la' -o -name gccas -o -name gccld -o -name llvm-config \) -print \ + | xargs -n 1 -P ${SYSCTL} dsymutil # Save .dSYM files and .a archives cd $DEST_DIR || exit 1 From evan.cheng at apple.com Tue Dec 18 13:38:14 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 18 Dec 2007 19:38:14 -0000 Subject: [llvm-commits] [llvm] r45167 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAG.cpp test/CodeGen/X86/2007-12-18-LoadCSEBug.ll Message-ID: <200712181938.lBIJcFb8008135@zion.cs.uiuc.edu> Author: evancheng Date: Tue Dec 18 13:38:14 2007 New Revision: 45167 URL: http://llvm.org/viewvc/llvm-project?rev=45167&view=rev Log: Fix PR1872: SrcValue and SrcValueOffset should not be used to compute load / store node id. Added: llvm/trunk/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=45167&r1=45166&r2=45167&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Dec 18 13:38:14 2007 @@ -372,8 +372,6 @@ ID.AddInteger(LD->getAddressingMode()); ID.AddInteger(LD->getExtensionType()); ID.AddInteger((unsigned int)(LD->getLoadedVT())); - ID.AddPointer(LD->getSrcValue()); - ID.AddInteger(LD->getSrcValueOffset()); ID.AddInteger(LD->getAlignment()); ID.AddInteger(LD->isVolatile()); break; @@ -383,8 +381,6 @@ ID.AddInteger(ST->getAddressingMode()); ID.AddInteger(ST->isTruncatingStore()); ID.AddInteger((unsigned int)(ST->getStoredVT())); - ID.AddPointer(ST->getSrcValue()); - ID.AddInteger(ST->getSrcValueOffset()); ID.AddInteger(ST->getAlignment()); ID.AddInteger(ST->isVolatile()); break; @@ -639,16 +635,12 @@ ID.AddInteger(LD->getAddressingMode()); ID.AddInteger(LD->getExtensionType()); ID.AddInteger((unsigned int)(LD->getLoadedVT())); - ID.AddPointer(LD->getSrcValue()); - ID.AddInteger(LD->getSrcValueOffset()); ID.AddInteger(LD->getAlignment()); ID.AddInteger(LD->isVolatile()); } else if (const StoreSDNode *ST = dyn_cast(N)) { ID.AddInteger(ST->getAddressingMode()); ID.AddInteger(ST->isTruncatingStore()); ID.AddInteger((unsigned int)(ST->getStoredVT())); - ID.AddPointer(ST->getSrcValue()); - ID.AddInteger(ST->getSrcValueOffset()); ID.AddInteger(ST->getAlignment()); ID.AddInteger(ST->isVolatile()); } @@ -2330,8 +2322,6 @@ ID.AddInteger(ISD::UNINDEXED); ID.AddInteger(ISD::NON_EXTLOAD); ID.AddInteger((unsigned int)VT); - ID.AddPointer(SV); - ID.AddInteger(SVOffset); ID.AddInteger(Alignment); ID.AddInteger(isVolatile); void *IP = 0; @@ -2385,8 +2375,6 @@ ID.AddInteger(ISD::UNINDEXED); ID.AddInteger(ExtType); ID.AddInteger((unsigned int)EVT); - ID.AddPointer(SV); - ID.AddInteger(SVOffset); ID.AddInteger(Alignment); ID.AddInteger(isVolatile); void *IP = 0; @@ -2413,8 +2401,6 @@ ID.AddInteger(AM); ID.AddInteger(LD->getExtensionType()); ID.AddInteger((unsigned int)(LD->getLoadedVT())); - ID.AddPointer(LD->getSrcValue()); - ID.AddInteger(LD->getSrcValueOffset()); ID.AddInteger(LD->getAlignment()); ID.AddInteger(LD->isVolatile()); void *IP = 0; @@ -2454,8 +2440,6 @@ ID.AddInteger(ISD::UNINDEXED); ID.AddInteger(false); ID.AddInteger((unsigned int)VT); - ID.AddPointer(SV); - ID.AddInteger(SVOffset); ID.AddInteger(Alignment); ID.AddInteger(isVolatile); void *IP = 0; @@ -2502,8 +2486,6 @@ ID.AddInteger(ISD::UNINDEXED); ID.AddInteger(1); ID.AddInteger((unsigned int)SVT); - ID.AddPointer(SV); - ID.AddInteger(SVOffset); ID.AddInteger(Alignment); ID.AddInteger(isVolatile); void *IP = 0; @@ -2529,8 +2511,6 @@ ID.AddInteger(AM); ID.AddInteger(ST->isTruncatingStore()); ID.AddInteger((unsigned int)(ST->getStoredVT())); - ID.AddPointer(ST->getSrcValue()); - ID.AddInteger(ST->getSrcValueOffset()); ID.AddInteger(ST->getAlignment()); ID.AddInteger(ST->isVolatile()); void *IP = 0; Added: llvm/trunk/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll?rev=45167&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll (added) +++ llvm/trunk/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll Tue Dec 18 13:38:14 2007 @@ -0,0 +1,28 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep {(%esp)} | count 2 +; PR1872 + + %struct.c34007g__designated___XUB = type { i32, i32, i32, i32 } + %struct.c34007g__pkg__parent = type { i32*, %struct.c34007g__designated___XUB* } + +define void @_ada_c34007g() { +entry: + %x8 = alloca %struct.c34007g__pkg__parent, align 8 ; <%struct.c34007g__pkg__parent*> [#uses=2] + %tmp1272 = getelementptr %struct.c34007g__pkg__parent* %x8, i32 0, i32 0 ; [#uses=1] + %x82167 = bitcast %struct.c34007g__pkg__parent* %x8 to i64* ; [#uses=1] + br i1 true, label %bb4668, label %bb848 + +bb4668: ; preds = %bb4648 + %tmp5464 = load i64* %x82167, align 8 ; [#uses=1] + %tmp5467 = icmp ne i64 0, %tmp5464 ; [#uses=1] + %tmp5470 = load i32** %tmp1272, align 8 ; [#uses=1] + %tmp5471 = icmp eq i32* %tmp5470, null ; [#uses=1] + %tmp5475 = or i1 %tmp5471, %tmp5467 ; [#uses=1] + %tmp5497 = or i1 %tmp5475, false ; [#uses=1] + br i1 %tmp5497, label %bb848, label %bb5507 + +bb848: ; preds = %entry + ret void + +bb5507: ; preds = %bb4668 + ret void +} From kremenek at apple.com Tue Dec 18 13:46:22 2007 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 18 Dec 2007 19:46:22 -0000 Subject: [llvm-commits] [llvm] r45168 - in /llvm/trunk: include/llvm/System/Path.h lib/System/Unix/Path.inc lib/System/Win32/Path.inc Message-ID: <200712181946.lBIJkMYQ008441@zion.cs.uiuc.edu> Author: kremenek Date: Tue Dec 18 13:46:22 2007 New Revision: 45168 URL: http://llvm.org/viewvc/llvm-project?rev=45168&view=rev Log: Added "isDirectory" method to llvm::sys::Path. Modified: llvm/trunk/include/llvm/System/Path.h llvm/trunk/lib/System/Unix/Path.inc llvm/trunk/lib/System/Win32/Path.inc Modified: llvm/trunk/include/llvm/System/Path.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/Path.h?rev=45168&r1=45167&r2=45168&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/Path.h (original) +++ llvm/trunk/include/llvm/System/Path.h Tue Dec 18 13:46:22 2007 @@ -321,7 +321,7 @@ /// shared library. /// @brief Determine if the path reference a dynamic library. bool isDynamicLibrary() const; - + /// This function determines if the path name references an existing file /// or directory in the file system. /// @returns true if the pathname references an existing file or @@ -330,6 +330,12 @@ /// the file system. bool exists() const; + /// This function determines if the path name refences an + /// existing directory. + /// @returns true if the pathname references an existing directory. + /// @brief Determins if the path is a directory in the file system. + bool isDirectory() const; + /// This function determines if the path name references a readable file /// or directory in the file system. This function checks for /// the existence and readability (by the current program) of the file Modified: llvm/trunk/lib/System/Unix/Path.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Unix/Path.inc?rev=45168&r1=45167&r2=45168&view=diff ============================================================================== --- llvm/trunk/lib/System/Unix/Path.inc (original) +++ llvm/trunk/lib/System/Unix/Path.inc Tue Dec 18 13:46:22 2007 @@ -289,6 +289,14 @@ } bool +Path::isDirectory() const { + struct stat buf; + if (0 != stat(path.c_str(), &buf)) + return false; + return buf.st_mode & S_IFDIR ? true : false; +} + +bool Path::canRead() const { return 0 == access(path.c_str(), F_OK | R_OK ); } Modified: llvm/trunk/lib/System/Win32/Path.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/Path.inc?rev=45168&r1=45167&r2=45168&view=diff ============================================================================== --- llvm/trunk/lib/System/Win32/Path.inc (original) +++ llvm/trunk/lib/System/Win32/Path.inc Tue Dec 18 13:46:22 2007 @@ -254,6 +254,13 @@ } bool +Path::isDirectory() const { + DWORD attr = GetFileAttributes(path.c_str()); + return (attr != INVALID_FILE_ATTRIBUTES) && + (attr & FILE_ATTRIBUTE_DIRECTORY); +} + +bool Path::canRead() const { // FIXME: take security attributes into account. DWORD attr = GetFileAttributes(path.c_str()); From christopher.lamb at gmail.com Tue Dec 18 14:08:07 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 18 Dec 2007 12:08:07 -0800 Subject: [llvm-commits] [llvm] r45158 - in /llvm/trunk: lib/Target/README.txt lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll In-Reply-To: <7ABE0934-1092-4C58-B9CB-2DE04CF5E48D@apple.com> References: <200712180934.lBI9Yg0u008900@zion.cs.uiuc.edu> <7ABE0934-1092-4C58-B9CB-2DE04CF5E48D@apple.com> Message-ID: <835874DD-B1CD-4A0F-9358-6BBBF2384212@gmail.com> On Dec 18, 2007, at 10:55 AM, Chris Lattner wrote: > > On Dec 18, 2007, at 1:34 AM, Christopher Lamb wrote: > >> Author: clamb >> Date: Tue Dec 18 03:34:41 2007 >> New Revision: 45158 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=45158&view=rev >> Log: >> Fold certain additions through selects (and their compares) so as >> to eliminate subtractions. This code is often produced by the SMAX >> expansion in SCEV. >> >> This implements test/Transforms/InstCombine/2007-12-18- >> AddSelCmpSub.ll > > Nice! Thanks for tackling this, > >> --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp >> (original) >> +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue >> Dec 18 03:34:41 2007 >> @@ -2130,6 +2130,67 @@ >> return new PtrToIntInst(I2, CI->getType()); >> } >> } >> + >> + // add (select (icmp 0 (sub m A)) X Y) A -> >> + // add (select (icmp A m) X Y) A > > I'm not sure this is right: the idea is that this pushes the added > value into the selected value, not into the compare: > > add (select cond 0 (sub m A)) A -> (select cond A m) > > right? We don't want to change the compare, because then a different > value is picked. I don't believe a different value is picked: 0 cond x - y 0 + y cond x - y + y y cond x However, (cmp 0 (sub m A)) -> (cmp A m) simply folds the subtract away and into the compare, it has nothing to do with the transform rooted at the add, so it probably should be done somewhere else if it's valuable. >> + // >> + // add (select X 0 (sub n A)) A -> >> + // select X A n >> + { >> + SelectInst *SI = dyn_cast(LHS); >> + Value *Other = RHS; >> + if (!SI) { >> + SI = dyn_cast(RHS); >> + Other = LHS; >> + } >> + if (SI) { >> + Value *TV = SI->getTrueValue(); >> + Value *FV = SI->getFalseValue(); >> + Value *A; >> + >> + // Can we fold the add into the argument of the compare? >> + Value *Cond = SI->getCondition(); >> + if (ICmpInst *IC = dyn_cast(Cond)) { >> + Value *ICOp0 = IC->getOperand(0); >> + Value *ICOp1 = IC->getOperand(1); >> + ConstantInt *C3, *C4; >> + >> + // Check both arguments of the compare for a matching >> subtract. >> + if (match(ICOp0, m_ConstantInt(C3)) && C3->getValue() == >> 0 && >> + match(ICOp1, m_Sub(m_ConstantInt(C4), m_Value(A))) && >> + A == Other) { >> + // We managed to fold the add into the RHS of the select >> condition. >> + Cond = new ICmpInst(IC->getPredicate(), A, C4, "asis", >> SI); >> + } else if (match(ICOp1, m_ConstantInt(C3)) && C3->getValue >> () == 0 && >> + match(ICOp0, m_Sub(m_ConstantInt(C4), m_Value(A))) && >> + A == Other) { >> + // We managed to fold the add into the LHS of the select >> condition. >> + Cond = new ICmpInst(IC->getPredicate(), C4, A, "asis", >> SI); >> + } >> + } >> + >> + // Can we fold the add into the argument of the select? >> + // We check both true and false select arguments for a >> matching subtract. >> + ConstantInt *C1, *C2; >> + if (match(FV, m_ConstantInt(C1)) && C1->getValue() == 0 && >> + match(TV, m_Sub(m_ConstantInt(C2), m_Value(A))) && >> + A == Other) { >> + // We managed to fold the add into the true select value, >> + // picking up a simplified condition, if available. >> + return new SelectInst(Cond, C2, A, "adselsub"); >> + } else if (match(TV, m_ConstantInt(C1)) && C1->getValue() == >> 0 && >> + match(FV, m_Sub(m_ConstantInt(C2), m_Value(A))) && >> + A == Other) { >> + // We managed to fold the add into the false select value, >> + // picking up a simplified condition, if available. >> + return new SelectInst(Cond, A, C2, "adselsub"); >> + } else if (Cond != SI->getCondition()) { >> + // We only managed to fold the add into the select >> condition. >> + SI->setOperand(0, Cond); >> + Changed = true; >> + } >> + } >> + } >> >> return Changed ? &I : 0; >> } >> >> Added: llvm/trunk/test/Transforms/InstCombine/2007-12-18- >> AddSelCmpSub.ll >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ >> InstCombine/2007-12-18-AddSelCmpSub.ll?rev=45158&view=auto >> >> ===================================================================== >> = >> ======== >> --- llvm/trunk/test/Transforms/InstCombine/2007-12-18- >> AddSelCmpSub.ll (added) >> +++ llvm/trunk/test/Transforms/InstCombine/2007-12-18- >> AddSelCmpSub.ll Tue Dec 18 03:34:41 2007 >> @@ -0,0 +1,38 @@ >> +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep {sub} >> + >> +define i32 @foo(i32 %a) { >> +entry: >> + %tmp15 = sub i32 99, %a ; [#uses=2] >> + %tmp16 = icmp slt i32 %tmp15, 0 ; [#uses=1] >> + %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; >> [#uses=1] >> + %tmp12 = add i32 %smax, %a ; [#uses=1] >> + %tmp13 = add i32 %tmp12, 1 ; [#uses=1] >> + ret i32 %tmp13 >> +} >> + >> +define i32 @bar(i32 %a) { >> +entry: >> + %tmp15 = sub i32 99, %a ; [#uses=2] >> + %tmp16 = icmp slt i32 %tmp15, 0 ; [#uses=1] >> + %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; >> [#uses=1] >> + %tmp12 = add i32 %smax, %a ; [#uses=1] >> + ret i32 %tmp12 >> +} >> + >> +define i32 @baz(i32 %a) { >> +entry: >> + %tmp15 = sub i32 99, %a ; [#uses=1] >> + %tmp16 = icmp slt i32 %tmp15, 0 ; [#uses=1] >> + %smax = select i1 %tmp16, i32 0, i32 42 ; >> [#uses=1] >> + %tmp12 = add i32 %smax, %a ; [#uses=1] >> + ret i32 %tmp12 >> +} >> + >> +define i32 @fun(i32 %a) { >> +entry: >> + %tmp15 = sub i32 99, %a ; [#uses=1] >> + %tmp16 = icmp slt i32 %a, 0 ; [#uses=1] >> + %smax = select i1 %tmp16, i32 0, i32 %tmp15 ; >> [#uses=1] >> + %tmp12 = add i32 %smax, %a ; [#uses=1] >> + ret i32 %tmp12 >> +} >> \ No newline at end of file >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -- Christopher Lamb -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20071218/88b4f6cb/attachment.html From christopher.lamb at gmail.com Tue Dec 18 14:30:28 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 18 Dec 2007 20:30:28 -0000 Subject: [llvm-commits] [llvm] r45169 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll Message-ID: <200712182030.lBIKUSwf011094@zion.cs.uiuc.edu> Author: clamb Date: Tue Dec 18 14:30:28 2007 New Revision: 45169 URL: http://llvm.org/viewvc/llvm-project?rev=45169&view=rev Log: Remove an orthogonal transformation of the selection condition from my most recent submission. Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp llvm/trunk/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=45169&r1=45168&r2=45169&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Dec 18 14:30:28 2007 @@ -2131,9 +2131,6 @@ } } - // add (select (icmp 0 (sub m A)) X Y) A -> - // add (select (icmp A m) X Y) A - // // add (select X 0 (sub n A)) A -> // select X A n { @@ -2147,27 +2144,6 @@ Value *TV = SI->getTrueValue(); Value *FV = SI->getFalseValue(); Value *A; - - // Can we fold the add into the argument of the compare? - Value *Cond = SI->getCondition(); - if (ICmpInst *IC = dyn_cast(Cond)) { - Value *ICOp0 = IC->getOperand(0); - Value *ICOp1 = IC->getOperand(1); - ConstantInt *C3, *C4; - - // Check both arguments of the compare for a matching subtract. - if (match(ICOp0, m_ConstantInt(C3)) && C3->getValue() == 0 && - match(ICOp1, m_Sub(m_ConstantInt(C4), m_Value(A))) && - A == Other) { - // We managed to fold the add into the RHS of the select condition. - Cond = new ICmpInst(IC->getPredicate(), A, C4, "asis", SI); - } else if (match(ICOp1, m_ConstantInt(C3)) && C3->getValue() == 0 && - match(ICOp0, m_Sub(m_ConstantInt(C4), m_Value(A))) && - A == Other) { - // We managed to fold the add into the LHS of the select condition. - Cond = new ICmpInst(IC->getPredicate(), C4, A, "asis", SI); - } - } // Can we fold the add into the argument of the select? // We check both true and false select arguments for a matching subtract. @@ -2177,17 +2153,13 @@ A == Other) { // We managed to fold the add into the true select value, // picking up a simplified condition, if available. - return new SelectInst(Cond, C2, A, "adselsub"); + return new SelectInst(SI->getCondition(), C2, A); } else if (match(TV, m_ConstantInt(C1)) && C1->getValue() == 0 && match(FV, m_Sub(m_ConstantInt(C2), m_Value(A))) && A == Other) { // We managed to fold the add into the false select value, // picking up a simplified condition, if available. - return new SelectInst(Cond, A, C2, "adselsub"); - } else if (Cond != SI->getCondition()) { - // We only managed to fold the add into the select condition. - SI->setOperand(0, Cond); - Changed = true; + return new SelectInst(SI->getCondition(), A, C2); } } } Modified: llvm/trunk/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll?rev=45169&r1=45168&r2=45169&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll Tue Dec 18 14:30:28 2007 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep {sub} +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {add} | count 1 define i32 @foo(i32 %a) { entry: @@ -19,15 +19,6 @@ ret i32 %tmp12 } -define i32 @baz(i32 %a) { -entry: - %tmp15 = sub i32 99, %a ; [#uses=1] - %tmp16 = icmp slt i32 %tmp15, 0 ; [#uses=1] - %smax = select i1 %tmp16, i32 0, i32 42 ; [#uses=1] - %tmp12 = add i32 %smax, %a ; [#uses=1] - ret i32 %tmp12 -} - define i32 @fun(i32 %a) { entry: %tmp15 = sub i32 99, %a ; [#uses=1] From christopher.lamb at gmail.com Tue Dec 18 14:33:11 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 18 Dec 2007 20:33:11 -0000 Subject: [llvm-commits] [llvm] r45170 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200712182033.lBIKXBNu011197@zion.cs.uiuc.edu> Author: clamb Date: Tue Dec 18 14:33:11 2007 New Revision: 45170 URL: http://llvm.org/viewvc/llvm-project?rev=45170&view=rev Log: Fix comments Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=45170&r1=45169&r2=45170&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Dec 18 14:33:11 2007 @@ -2151,14 +2151,12 @@ if (match(FV, m_ConstantInt(C1)) && C1->getValue() == 0 && match(TV, m_Sub(m_ConstantInt(C2), m_Value(A))) && A == Other) { - // We managed to fold the add into the true select value, - // picking up a simplified condition, if available. + // We managed to fold the add into the true select value. return new SelectInst(SI->getCondition(), C2, A); } else if (match(TV, m_ConstantInt(C1)) && C1->getValue() == 0 && match(FV, m_Sub(m_ConstantInt(C2), m_Value(A))) && A == Other) { - // We managed to fold the add into the false select value, - // picking up a simplified condition, if available. + // We managed to fold the add into the false select value. return new SelectInst(SI->getCondition(), A, C2); } } From asl at math.spbu.ru Tue Dec 18 14:53:41 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 18 Dec 2007 20:53:41 -0000 Subject: [llvm-commits] [llvm] r45172 - /llvm/trunk/lib/CodeGen/AsmPrinter.cpp Message-ID: <200712182053.lBIKrg92012392@zion.cs.uiuc.edu> Author: asl Date: Tue Dec 18 14:53:41 2007 New Revision: 45172 URL: http://llvm.org/viewvc/llvm-project?rev=45172&view=rev Log: Support more insane CEP's in AsmPrinter (Yes, PyPy folks do really use them). Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter.cpp?rev=45172&r1=45171&r2=45172&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter.cpp Tue Dec 18 14:53:41 2007 @@ -773,9 +773,32 @@ } case Instruction::Add: case Instruction::Sub: + case Instruction::And: + case Instruction::Or: + case Instruction::Xor: O << "("; EmitConstantValueOnly(CE->getOperand(0)); - O << (Opcode==Instruction::Add ? ") + (" : ") - ("); + O << ")"; + switch (Opcode) { + case Instruction::Add: + O << " + "; + break; + case Instruction::Sub: + O << " - "; + break; + case Instruction::And: + O << " & "; + break; + case Instruction::Or: + O << " | "; + break; + case Instruction::Xor: + O << " ^ "; + break; + default: + break; + } + O << "("; EmitConstantValueOnly(CE->getOperand(1)); O << ")"; break; From christopher.lamb at gmail.com Tue Dec 18 15:32:20 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Tue, 18 Dec 2007 21:32:20 -0000 Subject: [llvm-commits] [llvm] r45173 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200712182132.lBILWLpr014358@zion.cs.uiuc.edu> Author: clamb Date: Tue Dec 18 15:32:20 2007 New Revision: 45173 URL: http://llvm.org/viewvc/llvm-project?rev=45173&view=rev Log: Fold subtracts into integer compares vs. zero. This improves generate code for this case on X86 from _foo: movl $99, %ecx movl 4(%esp), %eax subl %eax, %ecx xorl %edx, %edx testl %ecx, %ecx cmovs %edx, %eax ret to _foo: xorl %ecx, %ecx movl 4(%esp), %eax cmpl $99, %eax cmovg %ecx, %eax ret Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=45173&r1=45172&r2=45173&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Dec 18 15:32:20 2007 @@ -4793,7 +4793,24 @@ if (isa(Op1)) // X icmp undef -> undef return ReplaceInstUsesWith(I, UndefValue::get(Type::Int1Ty)); - + + // (icmp cond (sub m A) 0) -> + // (icmp cond m A) + { + ConstantInt *C1, *C2; + Value *A; + // Check both arguments of the compare for a matching subtract. + if (match(Op0, m_ConstantInt(C1)) && C1->getValue() == 0 && + match(Op1, m_Sub(m_ConstantInt(C2), m_Value(A)))) { + // We managed to fold the add into the RHS of the select condition. + return new ICmpInst(I.getPredicate(), A, C2); + } else if (match(Op1, m_ConstantInt(C1)) && C1->getValue() == 0 && + match(Op0, m_Sub(m_ConstantInt(C2), m_Value(A)))) { + // We managed to fold the add into the LHS of the select condition. + return new ICmpInst(I.getPredicate(), C2, A); + } + } + // icmp , - Global/Stack value // addresses never equal each other! We already know that Op0 != Op1. if ((isa(Op0) || isa(Op0) || From isanbard at gmail.com Tue Dec 18 15:38:05 2007 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 18 Dec 2007 21:38:05 -0000 Subject: [llvm-commits] [llvm] r45178 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp Message-ID: <200712182138.lBILc5Ev014726@zion.cs.uiuc.edu> Author: void Date: Tue Dec 18 15:38:04 2007 New Revision: 45178 URL: http://llvm.org/viewvc/llvm-project?rev=45178&view=rev Log: Add debugging info. Use the newly created "hasUnmodelledSideEffects" method. Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=45178&r1=45177&r2=45178&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Dec 18 15:38:04 2007 @@ -103,25 +103,6 @@ return LI->getLoopFor(BB) != CurLoop; } - /// CanHoistInst - Checks that this instructions is one that can be hoisted - /// out of the loop. I.e., it has no side effects, isn't a control flow - /// instr, etc. - /// - bool CanHoistInst(MachineInstr &I) const { -#ifndef NDEBUG - DEBUG({ - DOUT << "--- Checking if we can hoist " << I << "\n"; - if (I.getInstrDescriptor()->ImplicitUses) - DOUT << " * Instruction has implicit uses.\n"; - else if (!TII->isTriviallyReMaterializable(&I)) - DOUT << " * Instruction has side effects.\n"; - }); -#endif - // Don't hoist if this instruction implicitly reads physical registers. - if (I.getInstrDescriptor()->ImplicitUses) return false; - return TII->isTriviallyReMaterializable(&I); - } - /// IsLoopInvariantInst - Returns true if the instruction is loop /// invariant. I.e., all virtual register operands are defined outside of /// the loop, physical registers aren't accessed (explicitly or implicitly), @@ -272,13 +253,46 @@ /// instruction is hoistable. /// bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) { - if (!CanHoistInst(I)) return false; + DEBUG({ + DOUT << "--- Checking if we can hoist " << I; + if (I.getInstrDescriptor()->ImplicitUses) { + DOUT << " * Instruction has implicit uses:\n"; + + const TargetMachine &TM = CurMF->getTarget(); + const MRegisterInfo *MRI = TM.getRegisterInfo(); + const unsigned *ImpUses = I.getInstrDescriptor()->ImplicitUses; + + for (; *ImpUses; ++ImpUses) + DOUT << " -> " << MRI->getName(*ImpUses) << "\n"; + } + + if (I.getInstrDescriptor()->ImplicitDefs) { + DOUT << " * Instruction has implicit defines:\n"; + + const TargetMachine &TM = CurMF->getTarget(); + const MRegisterInfo *MRI = TM.getRegisterInfo(); + const unsigned *ImpDefs = I.getInstrDescriptor()->ImplicitDefs; + + for (; *ImpDefs; ++ImpDefs) + DOUT << " -> " << MRI->getName(*ImpDefs) << "\n"; + } + + if (TII->hasUnmodelledSideEffects(&I)) + DOUT << " * Instruction has side effects.\n"; + }); + +#if 0 + // FIXME: Don't hoist if this instruction implicitly reads physical registers. + if (I.getInstrDescriptor()->ImplicitUses || + I.getInstrDescriptor()->ImplicitDefs) + return false; +#endif // The instruction is loop invariant if all of its operands are loop-invariant for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) { const MachineOperand &MO = I.getOperand(i); - if (!MO.isRegister() || !MO.isUse()) + if (!(MO.isRegister() && MO.getReg() && MO.isUse())) continue; unsigned Reg = MO.getReg(); @@ -295,6 +309,9 @@ return false; } + // Don't hoist something that has side effects. + if (TII->hasUnmodelledSideEffects(&I)) return false; + // If we got this far, the instruction is loop invariant! return true; } From dalej at apple.com Tue Dec 18 16:01:38 2007 From: dalej at apple.com (Dale Johannesen) Date: Tue, 18 Dec 2007 22:01:38 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r45181 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Message-ID: <200712182201.lBIM1cDT015898@zion.cs.uiuc.edu> Author: johannes Date: Tue Dec 18 16:01:38 2007 New Revision: 45181 URL: http://llvm.org/viewvc/llvm-project?rev=45181&view=rev Log: Fix an ICE from testsuite. Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-types.cpp?rev=45181&r1=45180&r2=45181&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-types.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Tue Dec 18 16:01:38 2007 @@ -301,8 +301,11 @@ TREE_CODE(type) == POINTER_TYPE || TREE_CODE(type) == REFERENCE_TYPE) && "not a sequential type!"); // This relies on gcc types with constant size mapping to LLVM types with the - // same size. - return !VOID_TYPE_P(TREE_TYPE(type)) && isInt64(TYPE_SIZE(TREE_TYPE(type)), true); + // same size. It is possible for the component type not to have a size: + // struct foo; extern foo bar[]; + return !VOID_TYPE_P(TREE_TYPE(type)) && + (!TYPE_SIZE(TREE_TYPE(type)) || + isInt64(TYPE_SIZE(TREE_TYPE(type)), true)); } /// isArrayCompatible - Return true if the specified gcc array or pointer type From kremenek at apple.com Tue Dec 18 16:07:34 2007 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 18 Dec 2007 22:07:34 -0000 Subject: [llvm-commits] [llvm] r45182 - in /llvm/trunk: include/llvm/System/Path.h lib/System/Unix/Path.inc lib/System/Win32/Path.inc Message-ID: <200712182207.lBIM7YAo016204@zion.cs.uiuc.edu> Author: kremenek Date: Tue Dec 18 16:07:33 2007 New Revision: 45182 URL: http://llvm.org/viewvc/llvm-project?rev=45182&view=rev Log: Added "GetCurrentDirectory()" to sys::Path. Modified: llvm/trunk/include/llvm/System/Path.h llvm/trunk/lib/System/Unix/Path.inc llvm/trunk/lib/System/Win32/Path.inc Modified: llvm/trunk/include/llvm/System/Path.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/Path.h?rev=45182&r1=45181&r2=45182&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/Path.h (original) +++ llvm/trunk/include/llvm/System/Path.h Tue Dec 18 16:07:33 2007 @@ -148,6 +148,11 @@ /// constructor must provide the same result as GetRootDirectory. /// @brief Construct a path to the current user's "home" directory static Path GetUserHomeDirectory(); + + /// Construct a path to the current directory for the current process. + /// @returns The current working directory. + /// @brief Returns the current working directory. + static Path GetCurrentDirectory(); /// Return the suffix commonly used on file names that contain a shared /// object, shared archive, or dynamic link library. Such files are Modified: llvm/trunk/lib/System/Unix/Path.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Unix/Path.inc?rev=45182&r1=45181&r2=45182&view=diff ============================================================================== --- llvm/trunk/lib/System/Unix/Path.inc (original) +++ llvm/trunk/lib/System/Unix/Path.inc Tue Dec 18 16:07:33 2007 @@ -250,6 +250,16 @@ return GetRootDirectory(); } +Path +Path::GetCurrentDirectory() { + char pathname[MAXPATHLEN]; + if (!getcwd(pathname,MAXPATHLEN)) { + assert (false && "Could not query current working directory."); + return Path(""); + } + + return Path(pathname); +} std::string Path::getBasename() const { Modified: llvm/trunk/lib/System/Win32/Path.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/Path.inc?rev=45182&r1=45181&r2=45182&view=diff ============================================================================== --- llvm/trunk/lib/System/Win32/Path.inc (original) +++ llvm/trunk/lib/System/Win32/Path.inc Tue Dec 18 16:07:33 2007 @@ -222,6 +222,15 @@ } return GetRootDirectory(); } + +Path +Path::GetCurrentDirectory() { + char pathname[MAX_PATH]; + GetCurrentDirectory(pathname,MAX_PATH); + return Path(pathname); +} + + // FIXME: the above set of functions don't map to Windows very well. From dalej at apple.com Tue Dec 18 19:31:26 2007 From: dalej at apple.com (Dale Johannesen) Date: Wed, 19 Dec 2007 01:31:26 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r45185 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200712190131.lBJ1VQQh026227@zion.cs.uiuc.edu> Author: johannes Date: Tue Dec 18 19:31:25 2007 New Revision: 45185 URL: http://llvm.org/viewvc/llvm-project?rev=45185&view=rev Log: Allow calls to reference types. From gcc testsuite. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=45185&r1=45184&r2=45185&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Dec 18 19:31:25 2007 @@ -2169,7 +2169,8 @@ Value *Callee = Emit(TREE_OPERAND(exp, 0), 0); assert(TREE_TYPE (TREE_OPERAND (exp, 0)) && - TREE_CODE(TREE_TYPE (TREE_OPERAND (exp, 0))) == POINTER_TYPE + (TREE_CODE(TREE_TYPE (TREE_OPERAND (exp, 0))) == POINTER_TYPE || + TREE_CODE(TREE_TYPE (TREE_OPERAND (exp, 0))) == REFERENCE_TYPE) && "Not calling a function pointer?"); tree function_type = TREE_TYPE(TREE_TYPE (TREE_OPERAND (exp, 0))); unsigned CallingConv; From evan.cheng at apple.com Tue Dec 18 19:34:39 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 19 Dec 2007 01:34:39 -0000 Subject: [llvm-commits] [llvm] r45186 - /llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Message-ID: <200712190134.lBJ1YdhM026347@zion.cs.uiuc.edu> Author: evancheng Date: Tue Dec 18 19:34:38 2007 New Revision: 45186 URL: http://llvm.org/viewvc/llvm-project?rev=45186&view=rev Log: Don't leave newly created nodes around if it turns out they are not needed. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=45186&r1=45185&r2=45186&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Dec 18 19:34:38 2007 @@ -1446,7 +1446,8 @@ TLI.isOperationLegal(LoOpt.getOpcode(), LoOpt.getValueType())) { RetVal = true; DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 0), LoOpt); - } + } else + DAG.DeleteNode(Lo.Val); } if (HiExists) { @@ -1457,7 +1458,8 @@ TLI.isOperationLegal(HiOpt.getOpcode(), HiOpt.getValueType())) { RetVal = true; DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 1), HiOpt); - } + } else + DAG.DeleteNode(Hi.Val); } return RetVal; From sabre at nondot.org Tue Dec 18 23:04:13 2007 From: sabre at nondot.org (Chris Lattner) Date: Wed, 19 Dec 2007 05:04:13 -0000 Subject: [llvm-commits] [llvm] r45187 - /llvm/trunk/docs/LangRef.html Message-ID: <200712190504.lBJ54D71003913@zion.cs.uiuc.edu> Author: lattner Date: Tue Dec 18 23:04:11 2007 New Revision: 45187 URL: http://llvm.org/viewvc/llvm-project?rev=45187&view=rev Log: fix more table abuses. Modified: llvm/trunk/docs/LangRef.html Modified: llvm/trunk/docs/LangRef.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=45187&r1=45186&r2=45187&view=diff ============================================================================== --- llvm/trunk/docs/LangRef.html (original) +++ llvm/trunk/docs/LangRef.html Tue Dec 18 23:04:11 2007 @@ -1108,31 +1108,31 @@
      Examples:
      - - + + + + + + + + + +
      - [40 x i32 ]
      - [41 x i32 ]
      - [40 x i8]
      -       		- Array of 40 32-bit integer values.
      - Array of 41 32-bit integer values.
      - Array of 40 8-bit integer values.
      -       		[40 x i32]Array of 40 32-bit integer values.
      [41 x i32]Array of 41 32-bit integer values.
      [4 x i8]Array of 4 8-bit integer values.

      Here are some examples of multidimensional arrays:

      - - + + + + + + + + + +
      - [3 x [4 x i32]]
      - [12 x [10 x float]]
      - [2 x [3 x [4 x i16]]]
      -       		- 3x4 array of 32-bit integer values.
      - 12x10 array of single precision floating point values.
      - 2x3x4 array of 16-bit integer values.
      -       		[3 x [4 x i32]]3x4 array of 32-bit integer values.
      [12 x [10 x float]]12x10 array of single precision floating point values.
      [2 x [3 x [4 x i16]]]2x3x4 array of 16-bit integer values.
      @@ -1239,7 +1239,7 @@ < { i32, i32, i32 } > A triple of three i32 values - < { float, i32 (i32) * } > + < { float, i32 (i32)* } > A pair, where the first element is a float and the second element is a pointer to a function that takes an i32, returning @@ -1262,20 +1262,20 @@
      Examples:
      - - + + + + + + i32. + + + +
      - [4x i32]*
      - i32 (i32 *) *
      - i32 addrspace(5)*
      -       		- A pointer to array of - four i32 values
      - A pointer to a [4x i32]*      		A pointer to array of four i32 values.
      i32 (i32 *) * A pointer to a function that takes an i32*, returning an - i32.
      - A pointer to an i32 value that resides - in address space 5.
      -
      i32 addrspace(5)*A pointer to an i32 value + that resides in address space #5.
      @@ -1307,16 +1307,16 @@ - - + + + + + + + + + +
      - <4 x i32>
      - <8 x float>
      - <2 x i64>
      -       		- Vector of 4 32-bit integer values.
      - Vector of 8 floating-point values.
      - Vector of 2 64-bit integer values.
      -       		<4 x i32>Vector of 4 32-bit integer values.
      <8 x float>Vector of 8 32-bit floating-point values.
      <2 x i64>Vector of 2 64-bit integer values.
      @@ -1342,12 +1342,8 @@ - - + +
      - opaque - - An opaque type.
      -       		opaqueAn opaque type.
      From isanbard at gmail.com Wed Dec 19 00:07:48 2007 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 19 Dec 2007 06:07:48 -0000 Subject: [llvm-commits] [llvm] r45190 - /llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Message-ID: <200712190607.lBJ67moq006645@zion.cs.uiuc.edu> Author: void Date: Wed Dec 19 00:07:48 2007 New Revision: 45190 URL: http://llvm.org/viewvc/llvm-project?rev=45190&view=rev Log: Mark the "isRemat" instruction as never having side effects. Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=45190&r1=45189&r2=45190&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Wed Dec 19 00:07:48 2007 @@ -687,7 +687,7 @@ "subfic $rD, $rA, $imm", IntGeneral, [(set GPRC:$rD, (subc immSExt16:$imm, GPRC:$rA))]>; -let isReMaterializable = 1 in { +let isReMaterializable = 1, neverHasSideEffects = 1 in { def LI : DForm_2_r0<14, (outs GPRC:$rD), (ins symbolLo:$imm), "li $rD, $imm", IntGeneral, [(set GPRC:$rD, immSExt16:$imm)]>; From isanbard at gmail.com Wed Dec 19 00:20:05 2007 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 19 Dec 2007 06:20:05 -0000 Subject: [llvm-commits] [llvm] r45192 - /llvm/trunk/utils/emacs/tablegen-mode.el Message-ID: <200712190620.lBJ6K5rx007237@zion.cs.uiuc.edu> Author: void Date: Wed Dec 19 00:20:05 2007 New Revision: 45192 URL: http://llvm.org/viewvc/llvm-project?rev=45192&view=rev Log: Modified to support comments better. Modified: llvm/trunk/utils/emacs/tablegen-mode.el Modified: llvm/trunk/utils/emacs/tablegen-mode.el URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/emacs/tablegen-mode.el?rev=45192&r1=45191&r2=45192&view=diff ============================================================================== --- llvm/trunk/utils/emacs/tablegen-mode.el (original) +++ llvm/trunk/utils/emacs/tablegen-mode.el Wed Dec 19 00:20:05 2007 @@ -1,15 +1,12 @@ ;; Maintainer: The LLVM team, http://llvm.org/ ;; Description: Major mode for TableGen description files (part of LLVM project) -;; Updated: 2007-03-26 +;; Updated: 2007-12-18 (require 'comint) (require 'custom) (require 'ansi-color) ;; Create mode-specific tables. -(defvar tablegen-mode-syntax-table nil - "Syntax table used while in TableGen mode.") - (defvar td-decorators-face 'td-decorators-face "Face method decorators.") (make-face 'td-decorators-face) @@ -25,7 +22,7 @@ ) (list ;; Comments - '("\/\/" . font-lock-comment-face) +;; '("\/\/" . font-lock-comment-face) ;; Strings '("\"[^\"]+\"" . font-lock-string-face) ;; Hex constants @@ -51,44 +48,36 @@ ;; Shamelessly ripped from jasmin.el ;; URL: http://www.neilvandyke.org/jasmin-emacs/jasmin.el -(if (not tablegen-mode-syntax-table) - (progn - (setq tablegen-mode-syntax-table (make-syntax-table)) - (mapcar (function - (lambda (n) - (modify-syntax-entry (aref n 0) - (aref n 1) - tablegen-mode-syntax-table))) - '( - ;; whitespace (` ') - [?\^m " "] - [?\f " "] - [?\n " "] - [?\t " "] - [?\ " "] - ;; word constituents (`w') - [?\% "w"] - ;;[?_ "w "] - ;; comments - [?\; "< "] - [?\n "> "] - ;;[?\r "> "] - ;;[?\^m "> "] - ;; symbol constituents (`_') - ;; punctuation (`.') - ;; open paren (`(') - [?\( "("] - [?\[ "("] - [?\{ "("] - [?\< "("] - ;; close paren (`)') - [?\) ")"] - [?\] ")"] - [?\} ")"] - [?\> ")"] - ;; string quote ('"') - [?\" "\""] - )))) +(defvar tablegen-mode-syntax-table nil + "Syntax table used in `tablegen-mode' buffers.") +(when (not tablegen-mode-syntax-table) + (setq tablegen-mode-syntax-table (make-syntax-table)) + ;; whitespace (` ') + (modify-syntax-entry ?\ " " tablegen-mode-syntax-table) + (modify-syntax-entry ?\t " " tablegen-mode-syntax-table) + (modify-syntax-entry ?\r " " tablegen-mode-syntax-table) + (modify-syntax-entry ?\n " " tablegen-mode-syntax-table) + (modify-syntax-entry ?\f " " tablegen-mode-syntax-table) + ;; word constituents (`w') + (modify-syntax-entry ?\% "w" tablegen-mode-syntax-table) + (modify-syntax-entry ?\_ "w" tablegen-mode-syntax-table) + ;; comments + (modify-syntax-entry ?/ ". 124b" tablegen-mode-syntax-table) + (modify-syntax-entry ?* ". 23" tablegen-mode-syntax-table) + (modify-syntax-entry ?\n "> b" tablegen-mode-syntax-table) + ;; open paren (`(') + (modify-syntax-entry ?\( "(" tablegen-mode-syntax-table) + (modify-syntax-entry ?\[ "(" tablegen-mode-syntax-table) + (modify-syntax-entry ?\{ "(" tablegen-mode-syntax-table) + (modify-syntax-entry ?\< "(" tablegen-mode-syntax-table) + ;; close paren (`)') + (modify-syntax-entry ?\) ")" tablegen-mode-syntax-table) + (modify-syntax-entry ?\] ")" tablegen-mode-syntax-table) + (modify-syntax-entry ?\} ")" tablegen-mode-syntax-table) + (modify-syntax-entry ?\> ")" tablegen-mode-syntax-table) + ;; string quote ('"') + (modify-syntax-entry ?\" "\"" tablegen-mode-syntax-table) + ) ;; --------------------- Abbrev table ----------------------------- @@ -112,19 +101,19 @@ Runs tablegen-mode-hook on startup." (interactive) (kill-all-local-variables) - (use-local-map tablegen-mode-map) ; Provides the local keymap. - (setq major-mode 'tablegen-mode) - + (use-local-map tablegen-mode-map) ; Provides the local keymap. (make-local-variable 'font-lock-defaults) - (setq major-mode 'tablegen-mode ; This is how describe-mode - ; finds the doc string to print. - mode-name "TableGen" ; This name goes into the modeline. - font-lock-defaults `(tablegen-font-lock-keywords)) + (setq major-mode 'tablegen-mode ; This is how describe-mode + ; finds the doc string to print. + mode-name "TableGen" ; This name goes into the modeline. + local-abbrev-table tablegen-mode-abbrev-table + font-lock-defaults `(tablegen-font-lock-keywords) + require-final-newline t + ) - (setq local-abbrev-table tablegen-mode-abbrev-table) (set-syntax-table tablegen-mode-syntax-table) - (run-hooks 'tablegen-mode-hook)) ; Finally, this permits the user to - ; customize the mode with a hook. + (run-hooks 'tablegen-mode-hook)) ; Finally, this permits the user to + ; customize the mode with a hook. ;; Associate .td files with tablegen-mode (setq auto-mode-alist (append '(("\\.td$" . tablegen-mode)) auto-mode-alist)) From duncan.sands at math.u-psud.fr Wed Dec 19 01:05:44 2007 From: duncan.sands at math.u-psud.fr (Duncan Sands) Date: Wed, 19 Dec 2007 08:05:44 +0100 Subject: [llvm-commits] [llvm-gcc-4.2] r45181 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp In-Reply-To: <200712182201.lBIM1cDT015898@zion.cs.uiuc.edu> References: <200712182201.lBIM1cDT015898@zion.cs.uiuc.edu> Message-ID: <200712190805.44460.duncan.sands@math.u-psud.fr> Hi Dale, > Fix an ICE from testsuite. what was the failing test? Thanks, D. From duncan.sands at math.u-psud.fr Wed Dec 19 01:12:22 2007 From: duncan.sands at math.u-psud.fr (Duncan Sands) Date: Wed, 19 Dec 2007 08:12:22 +0100 Subject: [llvm-commits] [llvm-gcc-4.2] r45181 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp In-Reply-To: <200712182201.lBIM1cDT015898@zion.cs.uiuc.edu> References: <200712182201.lBIM1cDT015898@zion.cs.uiuc.edu> Message-ID: <200712190812.22731.duncan.sands@math.u-psud.fr> PS: > TREE_CODE(type) == POINTER_TYPE || > TREE_CODE(type) == REFERENCE_TYPE) && "not a sequential type!"); > // This relies on gcc types with constant size mapping to LLVM types with the > - // same size. > - return !VOID_TYPE_P(TREE_TYPE(type)) && isInt64(TYPE_SIZE(TREE_TYPE(type)), true); > + // same size. It is possible for the component type not to have a size: > + // struct foo; extern foo bar[]; > + return !VOID_TYPE_P(TREE_TYPE(type)) && > + (!TYPE_SIZE(TREE_TYPE(type)) || > + isInt64(TYPE_SIZE(TREE_TYPE(type)), true)); > } does the !TYPE_SIZE test also catch !VOID_TYPE_P case? From duncan.sands at math.u-psud.fr Wed Dec 19 01:13:54 2007 From: duncan.sands at math.u-psud.fr (Duncan Sands) Date: Wed, 19 Dec 2007 08:13:54 +0100 Subject: [llvm-commits] [llvm-gcc-4.2] r45185 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <200712190131.lBJ1VQQh026227@zion.cs.uiuc.edu> References: <200712190131.lBJ1VQQh026227@zion.cs.uiuc.edu> Message-ID: <200712190813.55152.duncan.sands@math.u-psud.fr> Hi Dale, > assert(TREE_TYPE (TREE_OPERAND (exp, 0)) && > - TREE_CODE(TREE_TYPE (TREE_OPERAND (exp, 0))) == POINTER_TYPE > + (TREE_CODE(TREE_TYPE (TREE_OPERAND (exp, 0))) == POINTER_TYPE || > + TREE_CODE(TREE_TYPE (TREE_OPERAND (exp, 0))) == REFERENCE_TYPE) > && "Not calling a function pointer?"); > tree function_type = TREE_TYPE(TREE_TYPE (TREE_OPERAND (exp, 0))); for a reference type will function_type get the type of the function? Thanks, D. From scottm at aero.org Wed Dec 19 01:35:06 2007 From: scottm at aero.org (Scott Michel) Date: Wed, 19 Dec 2007 07:35:06 -0000 Subject: [llvm-commits] [llvm] r45196 - in /llvm/trunk: lib/Target/CellSPU/SPUISelDAGToDAG.cpp lib/Target/CellSPU/SPUISelLowering.cpp lib/Target/CellSPU/SPUInstrInfo.cpp lib/Target/CellSPU/SPUInstrInfo.td lib/Target/CellSPU/SPURegisterInfo.cpp test/CodeGen/CellSPU/immed16.ll Message-ID: <200712190735.lBJ7Z6ox011579@zion.cs.uiuc.edu> Author: pingbak Date: Wed Dec 19 01:35:06 2007 New Revision: 45196 URL: http://llvm.org/viewvc/llvm-project?rev=45196&view=rev Log: Add new immed16.ll test case, fix CellSPU errata to make test case work. Added: llvm/trunk/test/CodeGen/CellSPU/immed16.ll Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp?rev=45196&r1=45195&r2=45196&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Wed Dec 19 01:35:06 2007 @@ -597,7 +597,7 @@ int FI = cast(N)->getIndex(); SDOperand TFI = CurDAG->getTargetFrameIndex(FI, SPUtli.getPointerTy()); - DEBUG(cerr << "SPUDAGToDAGISel: Replacing FrameIndex with AI32 TFI, 0\n"); + DEBUG(cerr << "SPUDAGToDAGISel: Replacing FrameIndex with AI32 , 0\n"); return CurDAG->SelectNodeTo(N, SPU::AIr32, Op.getValueType(), TFI, CurDAG->getTargetConstant(0, MVT::i32)); } else if (Opc == SPUISD::LDRESULT) { Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=45196&r1=45195&r2=45196&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Wed Dec 19 01:35:06 2007 @@ -670,6 +670,11 @@ SDOperand ptrOp; int offset; + if (basep.getOpcode() == ISD::FrameIndex) { + // FrameIndex nodes are always properly aligned. Really. + return SDOperand(); + } + if (basep.getOpcode() == ISD::ADD) { const ConstantSDNode *CN = cast(basep.Val->getOperand(1)); assert(CN != NULL @@ -694,13 +699,10 @@ stVecVT = MVT::v16i8; vecVT = MVT::getVectorType(VT, (128 / MVT::getSizeInBits(VT))); - // Realign the pointer as a D-Form address (ptrOp is the pointer, - // to force a register load with the address; basep is the actual - // dform addr offs($reg). - ptrOp = DAG.getNode(SPUISD::DFormAddr, PtrVT, ptrOp, - DAG.getConstant(0, PtrVT)); - basep = DAG.getNode(SPUISD::DFormAddr, PtrVT, - ptrOp, DAG.getConstant((offset & ~0xf), PtrVT)); + // Realign the pointer as a D-Form address (ptrOp is the pointer, basep is + // the actual dform addr offs($reg). + basep = DAG.getNode(SPUISD::DFormAddr, PtrVT, ptrOp, + DAG.getConstant((offset & ~0xf), PtrVT)); // Create the 16-byte aligned vector load SDOperand alignLoad = Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp?rev=45196&r1=45195&r2=45196&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp Wed Dec 19 01:35:06 2007 @@ -62,7 +62,6 @@ case SPU::AHIvec: case SPU::AHIr16: case SPU::AIvec: - case SPU::AIr32: assert(MI.getNumOperands() == 3 && MI.getOperand(0).isRegister() && MI.getOperand(1).isRegister() && @@ -74,6 +73,19 @@ return true; } break; + case SPU::AIr32: + assert(MI.getNumOperands() == 3 && + "wrong number of operands to AIr32"); + if (MI.getOperand(0).isRegister() && + (MI.getOperand(1).isRegister() || + MI.getOperand(1).isFrameIndex()) && + (MI.getOperand(2).isImmediate() && + MI.getOperand(2).getImmedValue() == 0)) { + sourceReg = MI.getOperand(1).getReg(); + destReg = MI.getOperand(0).getReg(); + return true; + } + break; #if 0 case SPU::ORIf64: case SPU::ORIf32: Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td?rev=45196&r1=45195&r2=45196&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td (original) +++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td Wed Dec 19 01:35:06 2007 @@ -3476,10 +3476,8 @@ // Force load of global address to a register. These forms show up in // SPUISD::DFormAddr pseudo instructions: -/* def : Pat<(add tglobaladdr:$in, 0), (ILAlsa tglobaladdr:$in)>; def : Pat<(add tconstpool:$in, 0), (ILAlsa tglobaladdr:$in)>; def : Pat<(add tjumptable:$in, 0), (ILAlsa tglobaladdr:$in)>; - */ // Instrinsics: include "CellSDKIntrinsics.td" Modified: llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp?rev=45196&r1=45195&r2=45196&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp Wed Dec 19 01:35:06 2007 @@ -585,8 +585,6 @@ SPURegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, RegScavenger *RS) const { - assert(SPAdj == 0 && "Unexpected SP adjacency == 0"); - unsigned i = 0; MachineInstr &MI = *II; MachineBasicBlock &MBB = *MI.getParent(); Added: llvm/trunk/test/CodeGen/CellSPU/immed16.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/immed16.ll?rev=45196&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/immed16.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/immed16.ll Wed Dec 19 01:35:06 2007 @@ -0,0 +1,38 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep "ilh" %t1.s | count 5 + +define i16 @test_1() { + %x = alloca i16, align 16 + store i16 419, i16* %x ;; ILH via pattern + ret i16 0 +} + +define i16 @test_2() { + %x = alloca i16, align 16 + store i16 1023, i16* %x ;; ILH via pattern + ret i16 0 +} + +define i16 @test_3() { + %x = alloca i16, align 16 + store i16 -1023, i16* %x ;; ILH via pattern + ret i16 0 +} + +define i16 @test_4() { + %x = alloca i16, align 16 + store i16 32767, i16* %x ;; ILH via pattern + ret i16 0 +} + +define i16 @test_5() { + %x = alloca i16, align 16 + store i16 -32768, i16* %x ;; ILH via pattern + ret i16 0 +} + +define i16 @test_6() { + ret i16 0 +} + + From baldrick at free.fr Wed Dec 19 01:36:31 2007 From: baldrick at free.fr (Duncan Sands) Date: Wed, 19 Dec 2007 07:36:31 -0000 Subject: [llvm-commits] [llvm] r45197 - in /llvm/trunk/lib/CodeGen: DwarfWriter.cpp MachineModuleInfo.cpp SelectionDAG/SelectionDAGISel.cpp Message-ID: <200712190736.lBJ7aWIW011853@zion.cs.uiuc.edu> Author: baldrick Date: Wed Dec 19 01:36:31 2007 New Revision: 45197 URL: http://llvm.org/viewvc/llvm-project?rev=45197&view=rev Log: The C++ exception handling personality function wants to know about calls that cannot throw ('nounwind'): if such a call does throw for some reason then the personality will terminate the program. The distinction between an ordinary call and a nounwind call is that an ordinary call gets an entry in the exception table but a nounwind call does not. This patch sets up the exception table appropriately. One oddity is that I've chosen to bracket nounwind calls with labels (like invokes) - the other choice would have been to bracket ordinary calls with labels. While bracketing ordinary calls is more natural (because bracketing by labels would then correspond exactly to getting an entry in the exception table), I didn't do it because introducing labels impedes some optimizations and I'm guessing that ordinary calls occur more often than nounwind calls. This fixes the gcc filter2 eh test, at least at -O0 (the inliner needs some tweaking at higher optimization levels). Modified: llvm/trunk/lib/CodeGen/DwarfWriter.cpp llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Modified: llvm/trunk/lib/CodeGen/DwarfWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DwarfWriter.cpp?rev=45197&r1=45196&r2=45197&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/DwarfWriter.cpp (original) +++ llvm/trunk/lib/CodeGen/DwarfWriter.cpp Wed Dec 19 01:36:31 2007 @@ -3013,8 +3013,10 @@ /// CallSiteEntry - Structure describing an entry in the call-site table. struct CallSiteEntry { + // The 'try-range' is BeginLabel .. EndLabel. unsigned BeginLabel; // zero indicates the start of the function. unsigned EndLabel; // zero indicates the end of the function. + // The landing pad starts at PadLabel. unsigned PadLabel; // zero indicates that there is no landing pad. unsigned Action; }; @@ -3113,13 +3115,21 @@ SizeActions += SizeSiteActions; } - // Compute the call-site table. Entries must be ordered by address. + // Compute the call-site table. The entry for an invoke has a try-range + // containing the call, a non-zero landing pad and an appropriate action. + // The entry for an ordinary call has a try-range containing the call and + // zero for the landing pad and the action. Calls marked 'nounwind' have + // no entry and must not be contained in the try-range of any entry - they + // form gaps in the table. Entries must be ordered by try-range address. SmallVector CallSites; RangeMapType PadMap; + // Invokes and nounwind calls have entries in PadMap (due to being bracketed + // by try-range labels when lowered). Ordinary calls do not, so appropriate + // try-ranges for them need be deduced. for (unsigned i = 0, N = LandingPads.size(); i != N; ++i) { const LandingPadInfo *LandingPad = LandingPads[i]; - for (unsigned j=0, E = LandingPad->BeginLabels.size(); j != E; ++j) { + for (unsigned j = 0, E = LandingPad->BeginLabels.size(); j != E; ++j) { unsigned BeginLabel = LandingPad->BeginLabels[j]; assert(!PadMap.count(BeginLabel) && "Duplicate landing pad labels!"); PadRange P = { i, j }; @@ -3127,27 +3137,39 @@ } } - bool MayThrow = false; + // The end label of the previous invoke or nounwind try-range. unsigned LastLabel = 0; + + // Whether there is a potentially throwing instruction (currently this means + // an ordinary call) between the end of the previous try-range and now. + bool SawPotentiallyThrowing = false; + + // Whether the last callsite entry was for an invoke. + bool PreviousIsInvoke = false; + const TargetInstrInfo *TII = MF->getTarget().getInstrInfo(); + + // Visit all instructions in order of address. for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E; ++I) { for (MachineBasicBlock::const_iterator MI = I->begin(), E = I->end(); MI != E; ++MI) { if (MI->getOpcode() != TargetInstrInfo::LABEL) { - MayThrow |= TII->isCall(MI->getOpcode()); + SawPotentiallyThrowing |= TII->isCall(MI->getOpcode()); continue; } unsigned BeginLabel = MI->getOperand(0).getImmedValue(); assert(BeginLabel && "Invalid label!"); + // End of the previous try-range? if (BeginLabel == LastLabel) - MayThrow = false; + SawPotentiallyThrowing = false; + // Beginning of a new try-range? RangeMapType::iterator L = PadMap.find(BeginLabel); - if (L == PadMap.end()) + // Nope, it was just some random label. continue; PadRange P = L->second; @@ -3159,36 +3181,43 @@ // If some instruction between the previous try-range and this one may // throw, create a call-site entry with no landing pad for the region // between the try-ranges. - if (MayThrow) { + if (SawPotentiallyThrowing) { CallSiteEntry Site = {LastLabel, BeginLabel, 0, 0}; CallSites.push_back(Site); + PreviousIsInvoke = false; } LastLabel = LandingPad->EndLabels[P.RangeIndex]; - CallSiteEntry Site = {BeginLabel, LastLabel, - LandingPad->LandingPadLabel, FirstActions[P.PadIndex]}; + assert(BeginLabel && LastLabel && "Invalid landing pad!"); - assert(Site.BeginLabel && Site.EndLabel && Site.PadLabel && - "Invalid landing pad!"); - - // Try to merge with the previous call-site. - if (CallSites.size()) { - CallSiteEntry &Prev = CallSites[CallSites.size()-1]; - if (Site.PadLabel == Prev.PadLabel && Site.Action == Prev.Action) { - // Extend the range of the previous entry. - Prev.EndLabel = Site.EndLabel; - continue; + if (LandingPad->LandingPadLabel) { + // This try-range is for an invoke. + CallSiteEntry Site = {BeginLabel, LastLabel, + LandingPad->LandingPadLabel, FirstActions[P.PadIndex]}; + + // Try to merge with the previous call-site. + if (PreviousIsInvoke) { + CallSiteEntry &Prev = CallSites[CallSites.size()-1]; + if (Site.PadLabel == Prev.PadLabel && Site.Action == Prev.Action) { + // Extend the range of the previous entry. + Prev.EndLabel = Site.EndLabel; + continue; + } } - } - // Otherwise, create a new call-site. - CallSites.push_back(Site); + // Otherwise, create a new call-site. + CallSites.push_back(Site); + PreviousIsInvoke = true; + } else { + // Create a gap. + PreviousIsInvoke = false; + } } } // If some instruction between the previous try-range and the end of the // function may throw, create a call-site entry with no landing pad for the // region following the try-range. - if (MayThrow) { + if (SawPotentiallyThrowing) { CallSiteEntry Site = {LastLabel, 0, 0, 0}; CallSites.push_back(Site); } Modified: llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp?rev=45197&r1=45196&r2=45197&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp Wed Dec 19 01:36:31 2007 @@ -1747,7 +1747,7 @@ LandingPad.LandingPadLabel = MappedLabel(LandingPad.LandingPadLabel); // Special case: we *should* emit LPs with null LP MBB. This indicates - // "rethrow" case. + // "nounwind" case. if (!LandingPad.LandingPadLabel && LandingPad.LandingPadBlock) { LandingPads.erase(LandingPads.begin() + i); continue; @@ -1757,7 +1757,6 @@ unsigned BeginLabel = MappedLabel(LandingPad.BeginLabels[j]); unsigned EndLabel = MappedLabel(LandingPad.EndLabels[j]); - if (!BeginLabel || !EndLabel) { LandingPad.BeginLabels.erase(LandingPad.BeginLabels.begin() + j); LandingPad.EndLabels.erase(LandingPad.EndLabels.begin() + j); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=45197&r1=45196&r2=45197&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Dec 19 01:36:31 2007 @@ -2952,7 +2952,11 @@ Args.push_back(Entry); } - if (ExceptionHandling && MMI && LandingPad) { + bool MarkTryRange = LandingPad || + // C++ requires special handling of 'nounwind' calls. + (Attrs && Attrs->paramHasAttr(0, ParamAttr::NoUnwind)); + + if (MarkTryRange && ExceptionHandling && MMI) { // Insert a label before the invoke call to mark the try range. This can be // used to detect deletion of the invoke via the MachineModuleInfo. BeginLabel = MMI->NextLabelID(); @@ -2969,7 +2973,7 @@ setValue(&I, Result.first); DAG.setRoot(Result.second); - if (ExceptionHandling && MMI && LandingPad) { + if (MarkTryRange && ExceptionHandling && MMI) { // Insert a label at the end of the invoke call to mark the try range. This // can be used to detect deletion of the invoke via the MachineModuleInfo. EndLabel = MMI->NextLabelID(); From baldrick at free.fr Wed Dec 19 03:48:53 2007 From: baldrick at free.fr (Duncan Sands) Date: Wed, 19 Dec 2007 09:48:53 -0000 Subject: [llvm-commits] [llvm] r45198 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Message-ID: <200712190948.lBJ9msdr026158@zion.cs.uiuc.edu> Author: baldrick Date: Wed Dec 19 03:48:52 2007 New Revision: 45198 URL: http://llvm.org/viewvc/llvm-project?rev=45198&view=rev Log: Simplify LowerCallTo by using a callsite. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=45198&r1=45197&r2=45198&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Dec 19 03:48:52 2007 @@ -499,9 +499,7 @@ unsigned Opc); bool isExportableFromCurrentBlock(Value *V, const BasicBlock *FromBB); void ExportFromCurrentBlock(Value *V); - void LowerCallTo(Instruction &I, const Type *CalledValueTy, - const ParamAttrsList *PAL, unsigned CallingConv, - bool IsTailCall, SDOperand Callee, unsigned OpIdx, + void LowerCallTo(CallSite CS, SDOperand Callee, bool IsTailCall, MachineBasicBlock *LandingPad = NULL); // Terminator instructions. @@ -1452,11 +1450,7 @@ if (isa(I.getCalledValue())) visitInlineAsm(&I); else - LowerCallTo(I, I.getCalledValue()->getType(), I.getParamAttrs(), - I.getCallingConv(), - false, - getValue(I.getOperand(0)), - 3, LandingPad); + LowerCallTo(&I, getValue(I.getOperand(0)), false, LandingPad); // If the value of the invoke is used outside of its defining block, make it // available as a virtual register. @@ -2922,39 +2916,35 @@ } -void SelectionDAGLowering::LowerCallTo(Instruction &I, - const Type *CalledValueTy, - const ParamAttrsList *Attrs, - unsigned CallingConv, +void SelectionDAGLowering::LowerCallTo(CallSite CS, SDOperand Callee, bool IsTailCall, - SDOperand Callee, unsigned OpIdx, MachineBasicBlock *LandingPad) { - const PointerType *PT = cast(CalledValueTy); + const PointerType *PT = cast(CS.getCalledValue()->getType()); const FunctionType *FTy = cast(PT->getElementType()); MachineModuleInfo *MMI = DAG.getMachineModuleInfo(); unsigned BeginLabel = 0, EndLabel = 0; - + TargetLowering::ArgListTy Args; TargetLowering::ArgListEntry Entry; - Args.reserve(I.getNumOperands()); - for (unsigned i = OpIdx, e = I.getNumOperands(); i != e; ++i) { - Value *Arg = I.getOperand(i); - SDOperand ArgNode = getValue(Arg); - Entry.Node = ArgNode; Entry.Ty = Arg->getType(); - - unsigned attrInd = i - OpIdx + 1; - Entry.isSExt = Attrs && Attrs->paramHasAttr(attrInd, ParamAttr::SExt); - Entry.isZExt = Attrs && Attrs->paramHasAttr(attrInd, ParamAttr::ZExt); - Entry.isInReg = Attrs && Attrs->paramHasAttr(attrInd, ParamAttr::InReg); - Entry.isSRet = Attrs && Attrs->paramHasAttr(attrInd, ParamAttr::StructRet); - Entry.isNest = Attrs && Attrs->paramHasAttr(attrInd, ParamAttr::Nest); - Entry.isByVal = Attrs && Attrs->paramHasAttr(attrInd, ParamAttr::ByVal); + Args.reserve(CS.arg_size()); + for (CallSite::arg_iterator i = CS.arg_begin(), e = CS.arg_end(); + i != e; ++i) { + SDOperand ArgNode = getValue(*i); + Entry.Node = ArgNode; Entry.Ty = (*i)->getType(); + + unsigned attrInd = i - CS.arg_begin() + 1; + Entry.isSExt = CS.paramHasAttr(attrInd, ParamAttr::SExt); + Entry.isZExt = CS.paramHasAttr(attrInd, ParamAttr::ZExt); + Entry.isInReg = CS.paramHasAttr(attrInd, ParamAttr::InReg); + Entry.isSRet = CS.paramHasAttr(attrInd, ParamAttr::StructRet); + Entry.isNest = CS.paramHasAttr(attrInd, ParamAttr::Nest); + Entry.isByVal = CS.paramHasAttr(attrInd, ParamAttr::ByVal); Args.push_back(Entry); } bool MarkTryRange = LandingPad || // C++ requires special handling of 'nounwind' calls. - (Attrs && Attrs->paramHasAttr(0, ParamAttr::NoUnwind)); + (CS.doesNotThrow()); if (MarkTryRange && ExceptionHandling && MMI) { // Insert a label before the invoke call to mark the try range. This can be @@ -2963,14 +2953,14 @@ DAG.setRoot(DAG.getNode(ISD::LABEL, MVT::Other, getRoot(), DAG.getConstant(BeginLabel, MVT::i32))); } - + std::pair Result = - TLI.LowerCallTo(getRoot(), I.getType(), - Attrs && Attrs->paramHasAttr(0, ParamAttr::SExt), - FTy->isVarArg(), CallingConv, IsTailCall, + TLI.LowerCallTo(getRoot(), CS.getType(), + CS.paramHasAttr(0, ParamAttr::SExt), + FTy->isVarArg(), CS.getCallingConv(), IsTailCall, Callee, Args, DAG); - if (I.getType() != Type::VoidTy) - setValue(&I, Result.first); + if (CS.getType() != Type::VoidTy) + setValue(CS.getInstruction(), Result.first); DAG.setRoot(Result.second); if (MarkTryRange && ExceptionHandling && MMI) { @@ -2980,7 +2970,7 @@ DAG.setRoot(DAG.getNode(ISD::LABEL, MVT::Other, getRoot(), DAG.getConstant(EndLabel, MVT::i32))); - // Inform MachineModuleInfo of range. + // Inform MachineModuleInfo of range. MMI->addInvoke(LandingPad, BeginLabel, EndLabel); } } @@ -3061,11 +3051,7 @@ else Callee = DAG.getExternalSymbol(RenameFn, TLI.getPointerTy()); - LowerCallTo(I, I.getCalledValue()->getType(), I.getParamAttrs(), - I.getCallingConv(), - I.isTailCall(), - Callee, - 1); + LowerCallTo(&I, Callee, I.isTailCall()); } From dalej at apple.com Wed Dec 19 12:11:24 2007 From: dalej at apple.com (Dale Johannesen) Date: Wed, 19 Dec 2007 10:11:24 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r45185 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <200712190813.55152.duncan.sands@math.u-psud.fr> References: <200712190131.lBJ1VQQh026227@zion.cs.uiuc.edu> <200712190813.55152.duncan.sands@math.u-psud.fr> Message-ID: <2A318FE3-248E-4984-8FE1-CD65F4D14A44@apple.com> On Dec 18, 2007, at 11:13 PM, Duncan Sands wrote: > Hi Dale, > >> assert(TREE_TYPE (TREE_OPERAND (exp, 0)) && >> - TREE_CODE(TREE_TYPE (TREE_OPERAND (exp, 0))) == >> POINTER_TYPE >> + (TREE_CODE(TREE_TYPE (TREE_OPERAND (exp, 0))) == >> POINTER_TYPE || >> + TREE_CODE(TREE_TYPE (TREE_OPERAND (exp, 0))) == >> REFERENCE_TYPE) >> && "Not calling a function pointer?"); >> tree function_type = TREE_TYPE(TREE_TYPE (TREE_OPERAND (exp, 0))); > > for a reference type will function_type get the type of the function? Yes. From dalej at apple.com Wed Dec 19 12:11:40 2007 From: dalej at apple.com (Dale Johannesen) Date: Wed, 19 Dec 2007 10:11:40 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r45181 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp In-Reply-To: <200712190805.44460.duncan.sands@math.u-psud.fr> References: <200712182201.lBIM1cDT015898@zion.cs.uiuc.edu> <200712190805.44460.duncan.sands@math.u-psud.fr> Message-ID: On Dec 18, 2007, at 11:05 PM, Duncan Sands wrote: > Hi Dale, > >> Fix an ICE from testsuite. > > what was the failing test? The failing language construct is shown in the comment. The test is g++/opt/array1.C From dalej at apple.com Wed Dec 19 12:31:55 2007 From: dalej at apple.com (Dale Johannesen) Date: Wed, 19 Dec 2007 10:31:55 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r45181 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp In-Reply-To: <200712190812.22731.duncan.sands@math.u-psud.fr> References: <200712182201.lBIM1cDT015898@zion.cs.uiuc.edu> <200712190812.22731.duncan.sands@math.u-psud.fr> Message-ID: On Dec 18, 2007, at 11:12 PM, Duncan Sands wrote: > PS: > >> TREE_CODE(type) == POINTER_TYPE || >> TREE_CODE(type) == REFERENCE_TYPE) && "not a sequential >> type!"); >> // This relies on gcc types with constant size mapping to LLVM >> types with the >> - // same size. >> - return !VOID_TYPE_P(TREE_TYPE(type)) && >> isInt64(TYPE_SIZE(TREE_TYPE(type)), true); >> + // same size. It is possible for the component type not to have >> a size: >> + // struct foo; extern foo bar[]; >> + return !VOID_TYPE_P(TREE_TYPE(type)) && >> + (!TYPE_SIZE(TREE_TYPE(type)) || >> + isInt64(TYPE_SIZE(TREE_TYPE(type)), true)); >> } > > does the !TYPE_SIZE test also catch !VOID_TYPE_P case? Yes, it seems TYPE_SIZE(void) is currently null. It would be equally logical to represent it as size 0, but I guess the code would still work in that case. From dalej at apple.com Wed Dec 19 12:41:39 2007 From: dalej at apple.com (Dale Johannesen) Date: Wed, 19 Dec 2007 18:41:39 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r45207 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Message-ID: <200712191841.lBJIfe9o022866@zion.cs.uiuc.edu> Author: johannes Date: Wed Dec 19 12:41:39 2007 New Revision: 45207 URL: http://llvm.org/viewvc/llvm-project?rev=45207&view=rev Log: Improve previous patch per review feedback. Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-types.cpp?rev=45207&r1=45206&r2=45207&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-types.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Wed Dec 19 12:41:39 2007 @@ -303,9 +303,8 @@ // This relies on gcc types with constant size mapping to LLVM types with the // same size. It is possible for the component type not to have a size: // struct foo; extern foo bar[]; - return !VOID_TYPE_P(TREE_TYPE(type)) && - (!TYPE_SIZE(TREE_TYPE(type)) || - isInt64(TYPE_SIZE(TREE_TYPE(type)), true)); + return !TYPE_SIZE(TREE_TYPE(type)) || + isInt64(TYPE_SIZE(TREE_TYPE(type)), true); } /// isArrayCompatible - Return true if the specified gcc array or pointer type From sabre at nondot.org Wed Dec 19 13:48:50 2007 From: sabre at nondot.org (Chris Lattner) Date: Wed, 19 Dec 2007 19:48:50 -0000 Subject: [llvm-commits] [llvm] r45214 - /llvm/trunk/docs/CommandLine.html Message-ID: <200712191948.lBJJmo60027297@zion.cs.uiuc.edu> Author: lattner Date: Wed Dec 19 13:48:49 2007 New Revision: 45214 URL: http://llvm.org/viewvc/llvm-project?rev=45214&view=rev Log: fix formatting Modified: llvm/trunk/docs/CommandLine.html Modified: llvm/trunk/docs/CommandLine.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandLine.html?rev=45214&r1=45213&r2=45214&view=diff ============================================================================== --- llvm/trunk/docs/CommandLine.html (original) +++ llvm/trunk/docs/CommandLine.html Wed Dec 19 13:48:49 2007 @@ -60,7 +60,7 @@ cl::ParseCommandLineOptions function
    5. The cl::ParseEnvironmentOptions function
      6. -
    6. The cl::SetVersionPrinter +
    7. The cl::SetVersionPrinter function
    8. The cl::opt class
    9. The cl::list class
      10. From scottm at aero.org Wed Dec 19 14:15:47 2007 From: scottm at aero.org (Scott Michel) Date: Wed, 19 Dec 2007 20:15:47 -0000 Subject: [llvm-commits] [llvm] r45216 - in /llvm/trunk: lib/Target/CellSPU/SPUISelLowering.cpp lib/Target/CellSPU/SPUInstrInfo.cpp test/CodeGen/CellSPU/dg.exp test/CodeGen/CellSPU/or_ops.ll test/CodeGen/CellSPU/vecinsert.ll Message-ID: <200712192015.lBJKFl2b028900@zion.cs.uiuc.edu> Author: pingbak Date: Wed Dec 19 14:15:47 2007 New Revision: 45216 URL: http://llvm.org/viewvc/llvm-project?rev=45216&view=rev Log: Two more test cases: or_ops.ll (arithmetic or operations) and vecinsert.ll (vector insertions) Added: llvm/trunk/test/CodeGen/CellSPU/dg.exp llvm/trunk/test/CodeGen/CellSPU/or_ops.ll llvm/trunk/test/CodeGen/CellSPU/vecinsert.ll Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=45216&r1=45215&r2=45216&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Wed Dec 19 14:15:47 2007 @@ -880,13 +880,12 @@ assert((FP != 0) && "LowerConstantFP: Node is not ConstantFPSDNode"); - const APFloat &apf = FP->getValueAPF(); - if (VT == MVT::f32) { + float targetConst = FP->getValueAPF().convertToFloat(); return DAG.getNode(SPUISD::SFPConstant, VT, - DAG.getTargetConstantFP(apf.convertToFloat(), VT)); + DAG.getTargetConstantFP(targetConst, VT)); } else if (VT == MVT::f64) { - uint64_t dbits = DoubleToBits(apf.convertToDouble()); + uint64_t dbits = DoubleToBits(FP->getValueAPF().convertToDouble()); return DAG.getNode(ISD::BIT_CONVERT, VT, LowerConstant(DAG.getConstant(dbits, MVT::i64), DAG)); } Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp?rev=45216&r1=45215&r2=45216&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp Wed Dec 19 14:15:47 2007 @@ -98,13 +98,13 @@ destReg = MI.getOperand(0).getReg(); return true; #endif - // case SPU::ORv16i8_i8: + case SPU::ORv16i8_i8: case SPU::ORv8i16_i16: case SPU::ORv4i32_i32: case SPU::ORv2i64_i64: case SPU::ORv4f32_f32: case SPU::ORv2f64_f64: - // case SPU::ORi8_v16i8: + case SPU::ORi8_v16i8: case SPU::ORi16_v8i16: case SPU::ORi32_v4i32: case SPU::ORi64_v2i64: Added: llvm/trunk/test/CodeGen/CellSPU/dg.exp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/dg.exp?rev=45216&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/dg.exp (added) +++ llvm/trunk/test/CodeGen/CellSPU/dg.exp Wed Dec 19 14:15:47 2007 @@ -0,0 +1,5 @@ +load_lib llvm.exp + +if { [llvm_supports_target CellSPU] } { + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,llx,c,cpp,tr}]] +} Added: llvm/trunk/test/CodeGen/CellSPU/or_ops.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/or_ops.ll?rev=45216&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/or_ops.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/or_ops.ll Wed Dec 19 14:15:47 2007 @@ -0,0 +1,262 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep and %t1.s | count 2 +; RUN: grep orc %t1.s | count 85 +; RUN: grep ori %t1.s | count 30 +; RUN: grep orhi %t1.s | count 30 +; RUN: grep orbi %t1.s | count 15 + +; OR instruction generation: +define <4 x i32> @or_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) { + %A = or <4 x i32> %arg1, %arg2 + ret <4 x i32> %A +} + +define <4 x i32> @or_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2) { + %A = or <4 x i32> %arg2, %arg1 + ret <4 x i32> %A +} + +define <8 x i16> @or_v8i16_1(<8 x i16> %arg1, <8 x i16> %arg2) { + %A = or <8 x i16> %arg1, %arg2 + ret <8 x i16> %A +} + +define <8 x i16> @or_v8i16_2(<8 x i16> %arg1, <8 x i16> %arg2) { + %A = or <8 x i16> %arg2, %arg1 + ret <8 x i16> %A +} + +define <16 x i8> @or_v16i8_1(<16 x i8> %arg1, <16 x i8> %arg2) { + %A = or <16 x i8> %arg2, %arg1 + ret <16 x i8> %A +} + +define <16 x i8> @or_v16i8_2(<16 x i8> %arg1, <16 x i8> %arg2) { + %A = or <16 x i8> %arg1, %arg2 + ret <16 x i8> %A +} + +define i32 @or_i32_1(i32 %arg1, i32 %arg2) { + %A = or i32 %arg2, %arg1 + ret i32 %A +} + +define i32 @or_i32_2(i32 %arg1, i32 %arg2) { + %A = or i32 %arg1, %arg2 + ret i32 %A +} + +define i16 @or_i16_1(i16 %arg1, i16 %arg2) { + %A = or i16 %arg2, %arg1 + ret i16 %A +} + +define i16 @or_i16_2(i16 %arg1, i16 %arg2) { + %A = or i16 %arg1, %arg2 + ret i16 %A +} + +define i8 @or_i8_1(i8 %arg1, i8 %arg2) { + %A = or i8 %arg2, %arg1 + ret i8 %A +} + +define i8 @or_i8_2(i8 %arg1, i8 %arg2) { + %A = or i8 %arg1, %arg2 + ret i8 %A +} + +; ORC instruction generation: +define <4 x i32> @orc_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) { + %A = xor <4 x i32> %arg2, < i32 -1, i32 -1, i32 -1, i32 -1 > + %B = or <4 x i32> %arg1, %A + ret <4 x i32> %B +} + +define <4 x i32> @orc_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2) { + %A = xor <4 x i32> %arg1, < i32 -1, i32 -1, i32 -1, i32 -1 > + %B = or <4 x i32> %arg2, %A + ret <4 x i32> %B +} + +define <4 x i32> @orc_v4i32_3(<4 x i32> %arg1, <4 x i32> %arg2) { + %A = xor <4 x i32> %arg1, < i32 -1, i32 -1, i32 -1, i32 -1 > + %B = or <4 x i32> %A, %arg2 + ret <4 x i32> %B +} + +define <8 x i16> @orc_v8i16_1(<8 x i16> %arg1, <8 x i16> %arg2) { + %A = xor <8 x i16> %arg2, < i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1, i16 -1, i16 -1 > + %B = or <8 x i16> %arg1, %A + ret <8 x i16> %B +} + +define <8 x i16> @orc_v8i16_2(<8 x i16> %arg1, <8 x i16> %arg2) { + %A = xor <8 x i16> %arg1, < i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1, i16 -1, i16 -1 > + %B = or <8 x i16> %arg2, %A + ret <8 x i16> %B +} + +define <16 x i8> @orc_v16i8_1(<16 x i8> %arg1, <16 x i8> %arg2) { + %A = xor <16 x i8> %arg1, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = or <16 x i8> %arg2, %A + ret <16 x i8> %B +} + +define <16 x i8> @orc_v16i8_2(<16 x i8> %arg1, <16 x i8> %arg2) { + %A = xor <16 x i8> %arg2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = or <16 x i8> %arg1, %A + ret <16 x i8> %B +} + +define <16 x i8> @orc_v16i8_3(<16 x i8> %arg1, <16 x i8> %arg2) { + %A = xor <16 x i8> %arg2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = or <16 x i8> %A, %arg1 + ret <16 x i8> %B +} + +define i32 @orc_i32_1(i32 %arg1, i32 %arg2) { + %A = xor i32 %arg2, -1 + %B = or i32 %A, %arg1 + ret i32 %B +} + +define i32 @orc_i32_2(i32 %arg1, i32 %arg2) { + %A = xor i32 %arg1, -1 + %B = or i32 %A, %arg2 + ret i32 %B +} + +define i32 @orc_i32_3(i32 %arg1, i32 %arg2) { + %A = xor i32 %arg2, -1 + %B = or i32 %arg1, %A + ret i32 %B +} + +define i16 @orc_i16_1(i16 %arg1, i16 %arg2) { + %A = xor i16 %arg2, -1 + %B = or i16 %A, %arg1 + ret i16 %B +} + +define i16 @orc_i16_2(i16 %arg1, i16 %arg2) { + %A = xor i16 %arg1, -1 + %B = or i16 %A, %arg2 + ret i16 %B +} + +define i16 @orc_i16_3(i16 %arg1, i16 %arg2) { + %A = xor i16 %arg2, -1 + %B = or i16 %arg1, %A + ret i16 %B +} + +define i8 @orc_i8_1(i8 %arg1, i8 %arg2) { + %A = xor i8 %arg2, -1 + %B = or i8 %A, %arg1 + ret i8 %B +} + +define i8 @orc_i8_2(i8 %arg1, i8 %arg2) { + %A = xor i8 %arg1, -1 + %B = or i8 %A, %arg2 + ret i8 %B +} + +define i8 @orc_i8_3(i8 %arg1, i8 %arg2) { + %A = xor i8 %arg2, -1 + %B = or i8 %arg1, %A + ret i8 %B +} + +; ORI instruction generation (i32 data type): +define <4 x i32> @ori_v4i32_1(<4 x i32> %in) { + %tmp2 = or <4 x i32> %in, < i32 511, i32 511, i32 511, i32 511 > + ret <4 x i32> %tmp2 +} + +define <4 x i32> @ori_v4i32_2(<4 x i32> %in) { + %tmp2 = or <4 x i32> %in, < i32 510, i32 510, i32 510, i32 510 > + ret <4 x i32> %tmp2 +} + +define <4 x i32> @ori_v4i32_3(<4 x i32> %in) { + %tmp2 = or <4 x i32> %in, < i32 -1, i32 -1, i32 -1, i32 -1 > + ret <4 x i32> %tmp2 +} + +define <4 x i32> @ori_v4i32_4(<4 x i32> %in) { + %tmp2 = or <4 x i32> %in, < i32 -512, i32 -512, i32 -512, i32 -512 > + ret <4 x i32> %tmp2 +} + +define i32 @ori_u32(i32 zeroext %in) zeroext { + %tmp37 = or i32 %in, 37 ; [#uses=1] + ret i32 %tmp37 +} + +define i32 @ori_i32(i32 signext %in) signext { + %tmp38 = or i32 %in, 37 ; [#uses=1] + ret i32 %tmp38 +} + +; ORHI instruction generation (i16 data type): +define <8 x i16> @orhi_v8i16_1(<8 x i16> %in) { + %tmp2 = or <8 x i16> %in, < i16 511, i16 511, i16 511, i16 511, + i16 511, i16 511, i16 511, i16 511 > + ret <8 x i16> %tmp2 +} + +define <8 x i16> @orhi_v8i16_2(<8 x i16> %in) { + %tmp2 = or <8 x i16> %in, < i16 510, i16 510, i16 510, i16 510, + i16 510, i16 510, i16 510, i16 510 > + ret <8 x i16> %tmp2 +} + +define <8 x i16> @orhi_v8i16_3(<8 x i16> %in) { + %tmp2 = or <8 x i16> %in, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1, i16 -1 > + ret <8 x i16> %tmp2 +} + +define <8 x i16> @orhi_v8i16_4(<8 x i16> %in) { + %tmp2 = or <8 x i16> %in, < i16 -512, i16 -512, i16 -512, i16 -512, + i16 -512, i16 -512, i16 -512, i16 -512 > + ret <8 x i16> %tmp2 +} + +define i16 @orhi_u16(i16 zeroext %in) zeroext { + %tmp37 = or i16 %in, 37 ; [#uses=1] + ret i16 %tmp37 +} + +define i16 @orhi_i16(i16 signext %in) signext { + %tmp38 = or i16 %in, 37 ; [#uses=1] + ret i16 %tmp38 +} + +; ORBI instruction generation (i8 data type): +define <16 x i8> @orbi_v16i8(<16 x i8> %in) { + %tmp2 = or <16 x i8> %in, < i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, + i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, + i8 42, i8 42, i8 42, i8 42 > + ret <16 x i8> %tmp2 +} + +define i8 @orbi_u8(i8 zeroext %in) zeroext { + %tmp37 = or i8 %in, 37 ; [#uses=1] + ret i8 %tmp37 +} + +define i8 @orbi_i8(i8 signext %in) signext { + %tmp38 = or i8 %in, 37 ; [#uses=1] + ret i8 %tmp38 +} Added: llvm/trunk/test/CodeGen/CellSPU/vecinsert.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/vecinsert.ll?rev=45216&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/vecinsert.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/vecinsert.ll Wed Dec 19 14:15:47 2007 @@ -0,0 +1,53 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep cbd %t1.s | count 3 && +; RUN: grep chd %t1.s | count 3 && +; RUN: grep cwd %t1.s | count 6 && +; RUN: grep il %t1.s | count 4 && +; RUN: grep ilh %t1.s | count 3 && +; RUN: grep iohl %t1.s | count 1 && +; RUN: grep ilhu %t1.s | count 1 && +; RUN: grep shufb %t1.s | count 12 && +; RUN: grep 17219 %t1.s | count 1 && +; RUN: grep 22598 %t1.s | count 1 && +; RUN: grep -- -39 %t1.s | count 1 && +; RUN: grep 24 %t1.s | count 1 && +; RUN: grep 1159 %t1.s | count 1 +; ModuleID = 'vecinsert.bc' +target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128" +target triple = "spu-unknown-elf" + +; 67 -> 0x43, as 8-bit vector constant load = 0x4343 (17219)0x4343 +define <16 x i8> @test_v16i8(<16 x i8> %P, i8 %x) { +entry: + %tmp1 = insertelement <16 x i8> %P, i8 %x, i32 10 + %tmp1.1 = insertelement <16 x i8> %tmp1, i8 67, i32 7 + %tmp1.2 = insertelement <16 x i8> %tmp1.1, i8 %x, i32 15 + ret <16 x i8> %tmp1.2 +} + +; 22598 -> 0x5846 +define <8 x i16> @test_v8i16(<8 x i16> %P, i16 %x) { +entry: + %tmp1 = insertelement <8 x i16> %P, i16 %x, i32 5 + %tmp1.1 = insertelement <8 x i16> %tmp1, i16 22598, i32 7 + %tmp1.2 = insertelement <8 x i16> %tmp1.1, i16 %x, i32 2 + ret <8 x i16> %tmp1.2 +} + +; 1574023 -> 0x180487 (ILHU 24/IOHL 1159) +define <4 x i32> @test_v4i32_1(<4 x i32> %P, i32 %x) { +entry: + %tmp1 = insertelement <4 x i32> %P, i32 %x, i32 2 + %tmp1.1 = insertelement <4 x i32> %tmp1, i32 1574023, i32 1 + %tmp1.2 = insertelement <4 x i32> %tmp1.1, i32 %x, i32 3 + ret <4 x i32> %tmp1.2 +} + +; Should generate IL for the load +define <4 x i32> @test_v4i32_2(<4 x i32> %P, i32 %x) { +entry: + %tmp1 = insertelement <4 x i32> %P, i32 %x, i32 2 + %tmp1.1 = insertelement <4 x i32> %tmp1, i32 -39, i32 1 + %tmp1.2 = insertelement <4 x i32> %tmp1.1, i32 %x, i32 3 + ret <4 x i32> %tmp1.2 +} From scottm at aero.org Wed Dec 19 14:50:49 2007 From: scottm at aero.org (Scott Michel) Date: Wed, 19 Dec 2007 20:50:49 -0000 Subject: [llvm-commits] [llvm] r45217 - in /llvm/trunk/test/CodeGen/CellSPU: call.ll ctpop.ll dp_farith.ll eqv.ll fcmp.ll fdiv.ll fneg-fabs.ll int2fp.ll rotate_ops.ll select_bits.ll shift_ops.ll sp_farith.ll Message-ID: <200712192050.lBJKooaH030916@zion.cs.uiuc.edu> Author: pingbak Date: Wed Dec 19 14:50:49 2007 New Revision: 45217 URL: http://llvm.org/viewvc/llvm-project?rev=45217&view=rev Log: More working CellSPU test cases: - call.ll: Function call - ctpop.ll: Count population - dp_farith.ll: DP arithmetic - eqv.ll: Equivalence primitives - fcmp.ll: SP comparisons - fdiv.ll: SP division - fneg-fabs.ll: SP negation, aboslute value - int2fp.ll: Integer -> SP conversion - rotate_ops.ll: Rotation primitives - select_bits.ll: (a & c) | (b & ~c) bit selection - shift_ops.ll: Shift primitives - sp_farith.ll: SP arithmentic Added: llvm/trunk/test/CodeGen/CellSPU/call.ll llvm/trunk/test/CodeGen/CellSPU/ctpop.ll llvm/trunk/test/CodeGen/CellSPU/dp_farith.ll llvm/trunk/test/CodeGen/CellSPU/eqv.ll llvm/trunk/test/CodeGen/CellSPU/fcmp.ll llvm/trunk/test/CodeGen/CellSPU/fdiv.ll llvm/trunk/test/CodeGen/CellSPU/fneg-fabs.ll llvm/trunk/test/CodeGen/CellSPU/int2fp.ll llvm/trunk/test/CodeGen/CellSPU/rotate_ops.ll llvm/trunk/test/CodeGen/CellSPU/select_bits.ll llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll llvm/trunk/test/CodeGen/CellSPU/sp_farith.ll Added: llvm/trunk/test/CodeGen/CellSPU/call.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/call.ll?rev=45217&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/call.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/call.ll Wed Dec 19 14:50:49 2007 @@ -0,0 +1,20 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep brsl %t1.s | count 1 && +; RUN: grep brasl %t1.s | count 1 + +target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" +target triple = "spu" + +define i32 @main() { +entry: + %a = call i32 @stub_1(i32 1, float 0x400921FA00000000) + call void @extern_stub_1(i32 %a, i32 4) + ret i32 %a +} + +declare void @extern_stub_1(i32, i32) + +define i32 @stub_1(i32 %x, float %y) { +entry: + ret i32 0 +} Added: llvm/trunk/test/CodeGen/CellSPU/ctpop.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/ctpop.ll?rev=45217&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/ctpop.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/ctpop.ll Wed Dec 19 14:50:49 2007 @@ -0,0 +1,28 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep cntb %t1.s | count 3 && +; RUN: grep andi %t1.s | count 3 && +; RUN: grep rotmi %t1.s | count 2 && +; RUN: grep rothmi %t1.s | count 1 + +declare i32 @llvm.ctpop.i8(i8) +declare i32 @llvm.ctpop.i16(i16) +declare i32 @llvm.ctpop.i32(i32) + +define i32 @test_i8(i8 %X) { + call i32 @llvm.ctpop.i8(i8 %X) + %Y = bitcast i32 %1 to i32 + ret i32 %Y +} + +define i32 @test_i16(i16 %X) { + call i32 @llvm.ctpop.i16(i16 %X) + %Y = bitcast i32 %1 to i32 + ret i32 %Y +} + +define i32 @test_i32(i32 %X) { + call i32 @llvm.ctpop.i32(i32 %X) + %Y = bitcast i32 %1 to i32 + ret i32 %Y +} + Added: llvm/trunk/test/CodeGen/CellSPU/dp_farith.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/dp_farith.ll?rev=45217&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/dp_farith.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/dp_farith.ll Wed Dec 19 14:50:49 2007 @@ -0,0 +1,100 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep dfa %t1.s | count 2 && +; RUN: grep dfs %t1.s | count 2 && +; RUN: grep dfm %t1.s | count 6 && +; RUN: grep dfma %t1.s | count 2 && +; RUN: grep dfms %t1.s | count 2 && +; RUN: grep dfnms %t1.s | count 4 +; +; This file includes double precision floating point arithmetic instructions + +define double @fadd(double %arg1, double %arg2) { + %A = add double %arg1, %arg2 + ret double %A +} + +define <2 x double> @fadd_vec(<2 x double> %arg1, <2 x double> %arg2) { + %A = add <2 x double> %arg1, %arg2 + ret <2 x double> %A +} + +define double @fsub(double %arg1, double %arg2) { + %A = sub double %arg1, %arg2 + ret double %A +} + +define <2 x double> @fsub_vec(<2 x double> %arg1, <2 x double> %arg2) { + %A = sub <2 x double> %arg1, %arg2 + ret <2 x double> %A +} + +define double @fmul(double %arg1, double %arg2) { + %A = mul double %arg1, %arg2 + ret double %A +} + +define <2 x double> @fmul_vec(<2 x double> %arg1, <2 x double> %arg2) { + %A = mul <2 x double> %arg1, %arg2 + ret <2 x double> %A +} + +define double @fma(double %arg1, double %arg2, double %arg3) { + %A = mul double %arg1, %arg2 + %B = add double %A, %arg3 + ret double %B +} + +define <2 x double> @fma_vec(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) { + %A = mul <2 x double> %arg1, %arg2 + %B = add <2 x double> %A, %arg3 + ret <2 x double> %B +} + +define double @fms(double %arg1, double %arg2, double %arg3) { + %A = mul double %arg1, %arg2 + %B = sub double %A, %arg3 + ret double %B +} + +define <2 x double> @fms_vec(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) { + %A = mul <2 x double> %arg1, %arg2 + %B = sub <2 x double> %A, %arg3 + ret <2 x double> %B +} + +; - (a * b - c) +define double @d_fnms_1(double %arg1, double %arg2, double %arg3) { + %A = mul double %arg1, %arg2 + %B = sub double %A, %arg3 + %C = sub double -0.000000e+00, %B ; [#uses=1] + ret double %C +} + +; Annother way of getting fnms +; - ( a * b ) + c => c - (a * b) +define double @d_fnms_2(double %arg1, double %arg2, double %arg3) { + %A = mul double %arg1, %arg2 + %B = sub double %arg3, %A + ret double %B +} + +; FNMS: - (a * b - c) => c - (a * b) +define <2 x double> @d_fnms_vec_1(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) { + %A = mul <2 x double> %arg1, %arg2 + %B = sub <2 x double> %arg3, %A ; + ret <2 x double> %B +} + +; Another way to get fnms using a constant vector +; - ( a * b - c) +define <2 x double> @d_fnms_vec_2(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) { + %A = mul <2 x double> %arg1, %arg2 ; <<2 x double>> [#uses=1] + %B = sub <2 x double> %A, %arg3 ; <<2 x double>> [#uses=1] + %C = sub <2 x double> < double -0.00000e+00, double -0.00000e+00 >, %B + ret <2 x double> %C +} + +;define double @fdiv_1(double %arg1, double %arg2) { +; %A = fdiv double %arg1, %arg2 ; [#uses=1] +; ret double %A +;} Added: llvm/trunk/test/CodeGen/CellSPU/eqv.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/eqv.ll?rev=45217&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/eqv.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/eqv.ll Wed Dec 19 14:50:49 2007 @@ -0,0 +1,150 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep eqv %t1.s | count 18 && +; RUN: grep xshw %t1.s | count 6 && +; RUN: grep xsbh %t1.s | count 3 && +; RUN: grep andi %t1.s | count 3 + +; Test the 'eqv' instruction, whose boolean expression is: +; (a & b) | (~a & ~b), which simplifies to +; (a & b) | ~(a | b) +; Alternatively, a ^ ~b, which the compiler will also match. + +; ModuleID = 'eqv.bc' + +define <4 x i32> @equiv_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) { + %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] + %B = or <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] + %Bnot = xor <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] + %C = or <4 x i32> %A, %Bnot ; <<4 x i32>> [#uses=1] + ret <4 x i32> %C +} + +define <4 x i32> @equiv_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2) { + %B = or <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] + %Bnot = xor <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] + %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] + %C = or <4 x i32> %A, %Bnot ; <<4 x i32>> [#uses=1] + ret <4 x i32> %C +} + +define <4 x i32> @equiv_v4i32_3(<4 x i32> %arg1, <4 x i32> %arg2) { + %B = or <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] + %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] + %Bnot = xor <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] + %C = or <4 x i32> %A, %Bnot ; <<4 x i32>> [#uses=1] + ret <4 x i32> %C +} + +define <4 x i32> @equiv_v4i32_4(<4 x i32> %arg1, <4 x i32> %arg2) { + %arg2not = xor <4 x i32> %arg2, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] + %C = xor <4 x i32> %arg1, %arg2not + ret <4 x i32> %C +} + +define i32 @equiv_i32_1(i32 %arg1, i32 %arg2) { + %A = and i32 %arg1, %arg2 ; [#uses=1] + %B = or i32 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i32 %B, -1 ; [#uses=1] + %C = or i32 %A, %Bnot ; [#uses=1] + ret i32 %C +} + +define i32 @equiv_i32_2(i32 %arg1, i32 %arg2) { + %B = or i32 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i32 %B, -1 ; [#uses=1] + %A = and i32 %arg1, %arg2 ; [#uses=1] + %C = or i32 %A, %Bnot ; [#uses=1] + ret i32 %C +} + +define i32 @equiv_i32_3(i32 %arg1, i32 %arg2) { + %B = or i32 %arg1, %arg2 ; [#uses=1] + %A = and i32 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i32 %B, -1 ; [#uses=1] + %C = or i32 %A, %Bnot ; [#uses=1] + ret i32 %C +} + +define i32 @equiv_i32_4(i32 %arg1, i32 %arg2) { + %arg2not = xor i32 %arg2, -1 + %C = xor i32 %arg1, %arg2not + ret i32 %C +} + +define i32 @equiv_i32_5(i32 %arg1, i32 %arg2) { + %arg1not = xor i32 %arg1, -1 + %C = xor i32 %arg2, %arg1not + ret i32 %C +} + +define i16 @equiv_i16_1(i16 signext %arg1, i16 signext %arg2) signext { + %A = and i16 %arg1, %arg2 ; [#uses=1] + %B = or i16 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i16 %B, -1 ; [#uses=1] + %C = or i16 %A, %Bnot ; [#uses=1] + ret i16 %C +} + +define i16 @equiv_i16_2(i16 signext %arg1, i16 signext %arg2) signext { + %B = or i16 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i16 %B, -1 ; [#uses=1] + %A = and i16 %arg1, %arg2 ; [#uses=1] + %C = or i16 %A, %Bnot ; [#uses=1] + ret i16 %C +} + +define i16 @equiv_i16_3(i16 signext %arg1, i16 signext %arg2) signext { + %B = or i16 %arg1, %arg2 ; [#uses=1] + %A = and i16 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i16 %B, -1 ; [#uses=1] + %C = or i16 %A, %Bnot ; [#uses=1] + ret i16 %C +} + +define i8 @equiv_i8_1(i8 signext %arg1, i8 signext %arg2) signext { + %A = and i8 %arg1, %arg2 ; [#uses=1] + %B = or i8 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i8 %B, -1 ; [#uses=1] + %C = or i8 %A, %Bnot ; [#uses=1] + ret i8 %C +} + +define i8 @equiv_i8_2(i8 signext %arg1, i8 signext %arg2) signext { + %B = or i8 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i8 %B, -1 ; [#uses=1] + %A = and i8 %arg1, %arg2 ; [#uses=1] + %C = or i8 %A, %Bnot ; [#uses=1] + ret i8 %C +} + +define i8 @equiv_i8_3(i8 signext %arg1, i8 signext %arg2) signext { + %B = or i8 %arg1, %arg2 ; [#uses=1] + %A = and i8 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i8 %B, -1 ; [#uses=1] + %C = or i8 %A, %Bnot ; [#uses=1] + ret i8 %C +} + +define i8 @equiv_u8_1(i8 zeroext %arg1, i8 zeroext %arg2) zeroext { + %A = and i8 %arg1, %arg2 ; [#uses=1] + %B = or i8 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i8 %B, -1 ; [#uses=1] + %C = or i8 %A, %Bnot ; [#uses=1] + ret i8 %C +} + +define i8 @equiv_u8_2(i8 zeroext %arg1, i8 zeroext %arg2) zeroext { + %B = or i8 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i8 %B, -1 ; [#uses=1] + %A = and i8 %arg1, %arg2 ; [#uses=1] + %C = or i8 %A, %Bnot ; [#uses=1] + ret i8 %C +} + +define i8 @equiv_u8_3(i8 zeroext %arg1, i8 zeroext %arg2) zeroext { + %B = or i8 %arg1, %arg2 ; [#uses=1] + %A = and i8 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i8 %B, -1 ; [#uses=1] + %C = or i8 %A, %Bnot ; [#uses=1] + ret i8 %C +} Added: llvm/trunk/test/CodeGen/CellSPU/fcmp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/fcmp.ll?rev=45217&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/fcmp.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/fcmp.ll Wed Dec 19 14:50:49 2007 @@ -0,0 +1,20 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep fceq %t1.s | count 1 && +; RUN: grep fcmeq %t1.s | count 1 +; +; This file includes standard floating point arithmetic instructions + +declare double @fabs(double) +declare float @fabsf(float) + +define i1 @fcmp_eq(float %arg1, float %arg2) { + %A = fcmp oeq float %arg1, %arg2 ; [#uses=1] + ret i1 %A +} + +define i1 @fcmp_mag_eq(float %arg1, float %arg2) { + %A = call float @fabsf(float %arg1) ; [#uses=1] + %B = call float @fabsf(float %arg2) ; [#uses=1] + %C = fcmp oeq float %A, %B ; [#uses=1] + ret i1 %C +} Added: llvm/trunk/test/CodeGen/CellSPU/fdiv.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/fdiv.ll?rev=45217&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/fdiv.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/fdiv.ll Wed Dec 19 14:50:49 2007 @@ -0,0 +1,18 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep frest %t1.s | count 2 && +; RUN: grep fi %t1.s | count 2 && +; RUN: grep fm %t1.s | count 4 && +; RUN: grep fma %t1.s | count 2 && +; RUN: grep fnms %t1.s | count 2 +; +; This file includes standard floating point arithmetic instructions + +define float @fdiv32(float %arg1, float %arg2) { + %A = fdiv float %arg1, %arg2 + ret float %A +} + +define <4 x float> @fdiv_v4f32(<4 x float> %arg1, <4 x float> %arg2) { + %A = fdiv <4 x float> %arg1, %arg2 + ret <4 x float> %A +} Added: llvm/trunk/test/CodeGen/CellSPU/fneg-fabs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/fneg-fabs.ll?rev=45217&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/fneg-fabs.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/fneg-fabs.ll Wed Dec 19 14:50:49 2007 @@ -0,0 +1,41 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep fsmbi %t1.s | count 3 && +; RUN: grep 32768 %t1.s | count 2 && +; RUN: grep xor %t1.s | count 4 && +; RUN: grep and %t1.s | count 5 && +; RUN: grep andbi %t1.s | count 3 + +define double @fneg_dp(double %X) { + %Y = sub double -0.000000e+00, %X + ret double %Y +} + +define <2 x double> @fneg_dp_vec(<2 x double> %X) { + %Y = sub <2 x double> < double -0.0000e+00, double -0.0000e+00 >, %X + ret <2 x double> %Y +} + +define float @fneg_sp(float %X) { + %Y = sub float -0.000000e+00, %X + ret float %Y +} + +define <4 x float> @fneg_sp_vec(<4 x float> %X) { + %Y = sub <4 x float> , %X + ret <4 x float> %Y +} + +declare double @fabs(double) + +declare float @fabsf(float) + +define double @fabs_dp(double %X) { + %Y = call double @fabs( double %X ) ; [#uses=1] + ret double %Y +} + +define float @fabs_sp(float %X) { + %Y = call float @fabsf( float %X ) ; [#uses=1] + ret float %Y +} Added: llvm/trunk/test/CodeGen/CellSPU/int2fp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/int2fp.ll?rev=45217&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/int2fp.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/int2fp.ll Wed Dec 19 14:50:49 2007 @@ -0,0 +1,38 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep csflt %t1.s | count 5 && +; RUN: grep cuflt %t1.s | count 1 && +; RUN: grep xshw %t1.s | count 2 && +; RUN: grep xsbh %t1.s | count 1 && +; RUN: grep and %t1.s | count 2 && +; RUN: grep andi %t1.s | count 1 && +; RUN: grep ila %t1.s | count 1 + +define float @sitofp_i32(i32 %arg1) { + %A = sitofp i32 %arg1 to float ; [#uses=1] + ret float %A +} + +define float @uitofp_u32(i32 %arg1) { + %A = uitofp i32 %arg1 to float ; [#uses=1] + ret float %A +} + +define float @sitofp_i16(i16 %arg1) { + %A = sitofp i16 %arg1 to float ; [#uses=1] + ret float %A +} + +define float @uitofp_i16(i16 %arg1) { + %A = uitofp i16 %arg1 to float ; [#uses=1] + ret float %A +} + +define float @sitofp_i8(i8 %arg1) { + %A = sitofp i8 %arg1 to float ; [#uses=1] + ret float %A +} + +define float @uitofp_i8(i8 %arg1) { + %A = uitofp i8 %arg1 to float ; [#uses=1] + ret float %A +} Added: llvm/trunk/test/CodeGen/CellSPU/rotate_ops.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/rotate_ops.ll?rev=45217&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/rotate_ops.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/rotate_ops.ll Wed Dec 19 14:50:49 2007 @@ -0,0 +1,157 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu -f -o %t1.s +; RUN: grep rot %t1.s | count 85 +; RUN: grep roth %t1.s | count 8 +; RUN: grep roti.*5 %t1.s | count 1 +; RUN: grep roti.*27 %t1.s | count 1 +; RUN grep rothi.*5 %t1.s | count 2 +; RUN grep rothi.*11 %t1.s | count 1 +; RUN grep rothi.*,.3 %t1.s | count 1 +; RUN: grep andhi %t1.s | count 4 +; RUN: grep shlhi %t1.s | count 4 + +; Vector rotates are not currently supported in gcc or llvm assembly. These are +; not tested. + +; 32-bit rotates: +define i32 @rotl32_1a(i32 %arg1, i8 %arg2) { + %tmp1 = zext i8 %arg2 to i32 ; [#uses=1] + %B = shl i32 %arg1, %tmp1 ; [#uses=1] + %arg22 = sub i8 32, %arg2 ; [#uses=1] + %tmp2 = zext i8 %arg22 to i32 ; [#uses=1] + %C = lshr i32 %arg1, %tmp2 ; [#uses=1] + %D = or i32 %B, %C ; [#uses=1] + ret i32 %D +} + +define i32 @rotl32_1b(i32 %arg1, i16 %arg2) { + %tmp1 = zext i16 %arg2 to i32 ; [#uses=1] + %B = shl i32 %arg1, %tmp1 ; [#uses=1] + %arg22 = sub i16 32, %arg2 ; [#uses=1] + %tmp2 = zext i16 %arg22 to i32 ; [#uses=1] + %C = lshr i32 %arg1, %tmp2 ; [#uses=1] + %D = or i32 %B, %C ; [#uses=1] + ret i32 %D +} + +define i32 @rotl32_2(i32 %arg1, i32 %arg2) { + %B = shl i32 %arg1, %arg2 ; [#uses=1] + %tmp1 = sub i32 32, %arg2 ; [#uses=1] + %C = lshr i32 %arg1, %tmp1 ; [#uses=1] + %D = or i32 %B, %C ; [#uses=1] + ret i32 %D +} + +define i32 @rotl32_3(i32 %arg1, i32 %arg2) { + %tmp1 = sub i32 32, %arg2 ; [#uses=1] + %B = shl i32 %arg1, %arg2 ; [#uses=1] + %C = lshr i32 %arg1, %tmp1 ; [#uses=1] + %D = or i32 %B, %C ; [#uses=1] + ret i32 %D +} + +define i32 @rotl32_4(i32 %arg1, i32 %arg2) { + %tmp1 = sub i32 32, %arg2 ; [#uses=1] + %C = lshr i32 %arg1, %tmp1 ; [#uses=1] + %B = shl i32 %arg1, %arg2 ; [#uses=1] + %D = or i32 %B, %C ; [#uses=1] + ret i32 %D +} + +define i32 @rotr32_1(i32 %A, i8 %Amt) { + %tmp1 = zext i8 %Amt to i32 ; [#uses=1] + %B = lshr i32 %A, %tmp1 ; [#uses=1] + %Amt2 = sub i8 32, %Amt ; [#uses=1] + %tmp2 = zext i8 %Amt2 to i32 ; [#uses=1] + %C = shl i32 %A, %tmp2 ; [#uses=1] + %D = or i32 %B, %C ; [#uses=1] + ret i32 %D +} + +define i32 @rotr32_2(i32 %A, i8 %Amt) { + %Amt2 = sub i8 32, %Amt ; [#uses=1] + %tmp1 = zext i8 %Amt to i32 ; [#uses=1] + %B = lshr i32 %A, %tmp1 ; [#uses=1] + %tmp2 = zext i8 %Amt2 to i32 ; [#uses=1] + %C = shl i32 %A, %tmp2 ; [#uses=1] + %D = or i32 %B, %C ; [#uses=1] + ret i32 %D +} + +; Rotate left with immediate +define i32 @rotli32(i32 %A) { + %B = shl i32 %A, 5 ; [#uses=1] + %C = lshr i32 %A, 27 ; [#uses=1] + %D = or i32 %B, %C ; [#uses=1] + ret i32 %D +} + +; Rotate right with immediate +define i32 @rotri32(i32 %A) { + %B = lshr i32 %A, 5 ; [#uses=1] + %C = shl i32 %A, 27 ; [#uses=1] + %D = or i32 %B, %C ; [#uses=1] + ret i32 %D +} + +; 16-bit rotates: +define i16 @rotr16_1(i16 %arg1, i8 %arg) { + %tmp1 = zext i8 %arg to i16 ; [#uses=1] + %B = lshr i16 %arg1, %tmp1 ; [#uses=1] + %arg2 = sub i8 16, %arg ; [#uses=1] + %tmp2 = zext i8 %arg2 to i16 ; [#uses=1] + %C = shl i16 %arg1, %tmp2 ; [#uses=1] + %D = or i16 %B, %C ; [#uses=1] + ret i16 %D +} + +define i16 @rotr16_2(i16 %arg1, i16 %arg) { + %B = lshr i16 %arg1, %arg ; [#uses=1] + %tmp1 = sub i16 16, %arg ; [#uses=1] + %C = shl i16 %arg1, %tmp1 ; [#uses=1] + %D = or i16 %B, %C ; [#uses=1] + ret i16 %D +} + +define i16 @rotli16(i16 %A) { + %B = shl i16 %A, 5 ; [#uses=1] + %C = lshr i16 %A, 11 ; [#uses=1] + %D = or i16 %B, %C ; [#uses=1] + ret i16 %D +} + +define i16 @rotri16(i16 %A) { + %B = lshr i16 %A, 5 ; [#uses=1] + %C = shl i16 %A, 11 ; [#uses=1] + %D = or i16 %B, %C ; [#uses=1] + ret i16 %D +} + +define i8 @rotl8(i8 %A, i8 %Amt) { + %B = shl i8 %A, %Amt ; [#uses=1] + %Amt2 = sub i8 8, %Amt ; [#uses=1] + %C = lshr i8 %A, %Amt2 ; [#uses=1] + %D = or i8 %B, %C ; [#uses=1] + ret i8 %D +} + +define i8 @rotr8(i8 %A, i8 %Amt) { + %B = lshr i8 %A, %Amt ; [#uses=1] + %Amt2 = sub i8 8, %Amt ; [#uses=1] + %C = shl i8 %A, %Amt2 ; [#uses=1] + %D = or i8 %B, %C ; [#uses=1] + ret i8 %D +} + +define i8 @rotli8(i8 %A) { + %B = shl i8 %A, 5 ; [#uses=1] + %C = lshr i8 %A, 3 ; [#uses=1] + %D = or i8 %B, %C ; [#uses=1] + ret i8 %D +} + +define i8 @rotri8(i8 %A) { + %B = lshr i8 %A, 5 ; [#uses=1] + %C = shl i8 %A, 3 ; [#uses=1] + %D = or i8 %B, %C ; [#uses=1] + ret i8 %D +} Added: llvm/trunk/test/CodeGen/CellSPU/select_bits.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/select_bits.ll?rev=45217&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/select_bits.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/select_bits.ll Wed Dec 19 14:50:49 2007 @@ -0,0 +1,294 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep selb %t1.s | count 160 +; RUN: grep and %t1.s | count 2 +; RUN: grep xsbh %t1.s | count 1 +; RUN: grep xshw %t1.s | count 2 + +define <16 x i8> @selb_v16i8_1(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { + %A = xor <16 x i8> %arg3, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %A, %arg1 ; <<16 x i8>> [#uses=1] + %C = and <16 x i8> %arg2, %arg3 ; <<16 x i8>> [#uses=1] + %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] + ret <16 x i8> %D +} + +define <16 x i8> @selb_v16i8_11(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { + %A = xor <16 x i8> %arg3, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %arg1, %A ; <<16 x i8>> [#uses=1] + %C = and <16 x i8> %arg3, %arg2 ; <<16 x i8>> [#uses=1] + %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] + ret <16 x i8> %D +} + +define <16 x i8> @selb_v16i8_12(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { + %A = xor <16 x i8> %arg3, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %arg1, %A ; <<16 x i8>> [#uses=1] + %C = and <16 x i8> %arg2, %arg3 ; <<16 x i8>> [#uses=1] + %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] + ret <16 x i8> %D +} + +define <16 x i8> @selb_v16i8_13(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { + %A = xor <16 x i8> %arg3, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %A, %arg1 ; <<16 x i8>> [#uses=1] + %C = and <16 x i8> %arg2, %arg3 ; <<16 x i8>> [#uses=1] + %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] + ret <16 x i8> %D +} + +define <16 x i8> @selb_v16i8_2(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { + %A = xor <16 x i8> %arg1, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %A, %arg2 ; <<16 x i8>> [#uses=1] + %C = and <16 x i8> %arg3, %arg1 ; <<16 x i8>> [#uses=1] + %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] + ret <16 x i8> %D +} + +define <16 x i8> @selb_v16i8_21(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { + %A = xor <16 x i8> %arg1, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %arg2, %A ; <<16 x i8>> [#uses=1] + %C = and <16 x i8> %arg3, %arg1 ; <<16 x i8>> [#uses=1] + %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] + ret <16 x i8> %D +} + +define <16 x i8> @selb_v16i8_3(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { + %A = xor <16 x i8> %arg2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %A, %arg1 ; <<16 x i8>> [#uses=1] + %C = and <16 x i8> %arg3, %arg2 ; <<16 x i8>> [#uses=1] + %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] + ret <16 x i8> %D +} + +define <16 x i8> @selb_v16i8_4(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { + %C = and <16 x i8> %arg3, %arg2 ; <<16 x i8>> [#uses=1] + %A = xor <16 x i8> %arg2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %A, %arg1 ; <<16 x i8>> [#uses=1] + %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] + ret <16 x i8> %D +} + +define <16 x i8> @selb_v16i8_41(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { + %C = and <16 x i8> %arg2, %arg3 ; <<16 x i8>> [#uses=1] + %A = xor <16 x i8> %arg2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %arg1, %A ; <<16 x i8>> [#uses=1] + %D = or <16 x i8> %C, %B ; <<16 x i8>> [#uses=1] + ret <16 x i8> %D +} + +define <16 x i8> @selb_v16i8_42(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { + %C = and <16 x i8> %arg2, %arg3 ; <<16 x i8>> [#uses=1] + %A = xor <16 x i8> %arg2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %A, %arg1 ; <<16 x i8>> [#uses=1] + %D = or <16 x i8> %C, %B ; <<16 x i8>> [#uses=1] + ret <16 x i8> %D +} + +define <16 x i8> @selb_v16i8_5(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { + %C = and <16 x i8> %arg2, %arg1 ; <<16 x i8>> [#uses=1] + %A = xor <16 x i8> %arg1, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %A, %arg3 ; <<16 x i8>> [#uses=1] + %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] + ret <16 x i8> %D +} + +define <8 x i16> @selb_v8i16_1(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { + %A = xor <8 x i16> %arg3, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1 > + %B = and <8 x i16> %A, %arg1 ; <<8 x i16>> [#uses=1] + %C = and <8 x i16> %arg2, %arg3 ; <<8 x i16>> [#uses=1] + %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] + ret <8 x i16> %D +} + +define <8 x i16> @selb_v8i16_11(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { + %A = xor <8 x i16> %arg3, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1 > + %B = and <8 x i16> %arg1, %A ; <<8 x i16>> [#uses=1] + %C = and <8 x i16> %arg3, %arg2 ; <<8 x i16>> [#uses=1] + %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] + ret <8 x i16> %D +} + +define <8 x i16> @selb_v8i16_12(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { + %A = xor <8 x i16> %arg3, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1 > + %B = and <8 x i16> %arg1, %A ; <<8 x i16>> [#uses=1] + %C = and <8 x i16> %arg2, %arg3 ; <<8 x i16>> [#uses=1] + %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] + ret <8 x i16> %D +} + +define <8 x i16> @selb_v8i16_13(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { + %A = xor <8 x i16> %arg3, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1 > + %B = and <8 x i16> %A, %arg1 ; <<8 x i16>> [#uses=1] + %C = and <8 x i16> %arg2, %arg3 ; <<8 x i16>> [#uses=1] + %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] + ret <8 x i16> %D +} + +define <8 x i16> @selb_v8i16_2(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { + %A = xor <8 x i16> %arg1, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1 > + %B = and <8 x i16> %A, %arg2 ; <<8 x i16>> [#uses=1] + %C = and <8 x i16> %arg3, %arg1 ; <<8 x i16>> [#uses=1] + %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] + ret <8 x i16> %D +} + +define <8 x i16> @selb_v8i16_21(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { + %A = xor <8 x i16> %arg1, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1 > + %B = and <8 x i16> %arg2, %A ; <<8 x i16>> [#uses=1] + %C = and <8 x i16> %arg3, %arg1 ; <<8 x i16>> [#uses=1] + %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] + ret <8 x i16> %D +} + +define <8 x i16> @selb_v8i16_3(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { + %A = xor <8 x i16> %arg2, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1 > + %B = and <8 x i16> %A, %arg1 ; <<8 x i16>> [#uses=1] + %C = and <8 x i16> %arg3, %arg2 ; <<8 x i16>> [#uses=1] + %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] + ret <8 x i16> %D +} + +define <8 x i16> @selb_v8i16_4(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { + %C = and <8 x i16> %arg3, %arg2 ; <<8 x i16>> [#uses=1] + %A = xor <8 x i16> %arg2, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1 > + %B = and <8 x i16> %A, %arg1 ; <<8 x i16>> [#uses=1] + %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] + ret <8 x i16> %D +} + +define <8 x i16> @selb_v8i16_41(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { + %C = and <8 x i16> %arg2, %arg3 ; <<8 x i16>> [#uses=1] + %A = xor <8 x i16> %arg2, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1 > + %B = and <8 x i16> %arg1, %A ; <<8 x i16>> [#uses=1] + %D = or <8 x i16> %C, %B ; <<8 x i16>> [#uses=1] + ret <8 x i16> %D +} + +define <8 x i16> @selb_v8i16_42(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { + %C = and <8 x i16> %arg2, %arg3 ; <<8 x i16>> [#uses=1] + %A = xor <8 x i16> %arg2, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1 > + %B = and <8 x i16> %A, %arg1 ; <<8 x i16>> [#uses=1] + %D = or <8 x i16> %C, %B ; <<8 x i16>> [#uses=1] + ret <8 x i16> %D +} + +define <8 x i16> @selb_v8i16_5(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { + %C = and <8 x i16> %arg2, %arg1 ; <<8 x i16>> [#uses=1] + %A = xor <8 x i16> %arg1, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1 > + %B = and <8 x i16> %A, %arg3 ; <<8 x i16>> [#uses=1] + %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] + ret <8 x i16> %D +} + +define <4 x i32> @selb_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2, <4 x i32> %arg3) { + %tmpnot = xor <4 x i32> %arg3, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] + %tmp2 = and <4 x i32> %tmpnot, %arg1 ; <<4 x i32>> [#uses=1] + %tmp5 = and <4 x i32> %arg2, %arg3 ; <<4 x i32>> [#uses=1] + %tmp6 = or <4 x i32> %tmp2, %tmp5 ; <<4 x i32>> [#uses=1] + ret <4 x i32> %tmp6 +} + +define <4 x i32> @selb_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2, <4 x i32> %arg3) { + %tmpnot = xor <4 x i32> %arg3, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] + %tmp2 = and <4 x i32> %tmpnot, %arg1 ; <<4 x i32>> [#uses=1] + %tmp5 = and <4 x i32> %arg2, %arg3 ; <<4 x i32>> [#uses=1] + %tmp6 = or <4 x i32> %tmp2, %tmp5 ; <<4 x i32>> [#uses=1] + ret <4 x i32> %tmp6 +} + +define <4 x i32> @selb_v4i32_3(<4 x i32> %arg1, <4 x i32> %arg2, <4 x i32> %arg3) { + %tmpnot = xor <4 x i32> %arg3, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] + %tmp2 = and <4 x i32> %tmpnot, %arg1 ; <<4 x i32>> [#uses=1] + %tmp5 = and <4 x i32> %arg3, %arg2 ; <<4 x i32>> [#uses=1] + %tmp6 = or <4 x i32> %tmp2, %tmp5 ; <<4 x i32>> [#uses=1] + ret <4 x i32> %tmp6 +} + +define <4 x i32> @selb_v4i32_4(<4 x i32> %arg1, <4 x i32> %arg2, <4 x i32> %arg3) { + %tmp2 = and <4 x i32> %arg3, %arg2 ; <<4 x i32>> [#uses=1] + %tmp3not = xor <4 x i32> %arg3, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] + %tmp5 = and <4 x i32> %tmp3not, %arg1 ; <<4 x i32>> [#uses=1] + %tmp6 = or <4 x i32> %tmp2, %tmp5 ; <<4 x i32>> [#uses=1] + ret <4 x i32> %tmp6 +} + +define <4 x i32> @selb_v4i32_5(<4 x i32> %arg1, <4 x i32> %arg2, <4 x i32> %arg3) { + %tmp2 = and <4 x i32> %arg3, %arg2 ; <<4 x i32>> [#uses=1] + %tmp3not = xor <4 x i32> %arg3, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] + %tmp5 = and <4 x i32> %tmp3not, %arg1 ; <<4 x i32>> [#uses=1] + %tmp6 = or <4 x i32> %tmp2, %tmp5 ; <<4 x i32>> [#uses=1] + ret <4 x i32> %tmp6 +} + +define i32 @selb_i32(i32 %arg1, i32 %arg2, i32 %arg3) { + %tmp1not = xor i32 %arg3, -1 ; [#uses=1] + %tmp3 = and i32 %tmp1not, %arg1 ; [#uses=1] + %tmp6 = and i32 %arg3, %arg2 ; [#uses=1] + %tmp7 = or i32 %tmp3, %tmp6 ; [#uses=1] + ret i32 %tmp7 +} + +define i16 @selb_i16(i16 signext %arg1, i16 signext %arg2, i16 signext %arg3) signext { + %tmp3 = and i16 %arg3, %arg1 ; [#uses=1] + %tmp4not = xor i16 %arg3, -1 ; [#uses=1] + %tmp6 = and i16 %tmp4not, %arg2 ; [#uses=1] + %retval1011 = or i16 %tmp3, %tmp6 ; [#uses=1] + ret i16 %retval1011 +} + +define i16 @selb_i16u(i16 zeroext %arg1, i16 zeroext %arg2, i16 zeroext %arg3) zeroext { + %tmp3 = and i16 %arg3, %arg1 ; [#uses=1] + %tmp4not = xor i16 %arg3, -1 ; [#uses=1] + %tmp6 = and i16 %tmp4not, %arg2 ; [#uses=1] + %retval1011 = or i16 %tmp3, %tmp6 ; [#uses=1] + ret i16 %retval1011 +} + +define i8 @selb_i8u(i8 zeroext %arg1, i8 zeroext %arg2, i8 zeroext %arg3) zeroext { + %tmp3 = and i8 %arg3, %arg1 ; [#uses=1] + %tmp4not = xor i8 %arg3, -1 ; [#uses=1] + %tmp6 = and i8 %tmp4not, %arg2 ; [#uses=1] + %retval1011 = or i8 %tmp3, %tmp6 ; [#uses=1] + ret i8 %retval1011 +} + +define i8 @selb_i8(i8 signext %arg1, i8 signext %arg2, i8 signext %arg3) signext { + %tmp3 = and i8 %arg3, %arg1 ; [#uses=1] + %tmp4not = xor i8 %arg3, -1 ; [#uses=1] + %tmp6 = and i8 %tmp4not, %arg2 ; [#uses=1] + %retval1011 = or i8 %tmp3, %tmp6 ; [#uses=1] + ret i8 %retval1011 +} Added: llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll?rev=45217&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll Wed Dec 19 14:50:49 2007 @@ -0,0 +1,210 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep shlh %t1.s | count 84 +; RUN: grep shlhi %t1.s | count 51 +; RUN: grep shl %t1.s | count 168 +; RUN: grep shli %t1.s | count 51 +; RUN: grep xshw %t1.s | count 5 +; RUN: grep and %t1.s | count 5 + +; Vector shifts are not currently supported in gcc or llvm assembly. These are +; not tested. + +; Shift left i16 via register, note that the second operand to shl is promoted +; to a 32-bit type: + +define i16 @shlh_i16_1(i16 %arg1, i16 %arg2) { + %A = shl i16 %arg1, %arg2 + ret i16 %A +} + +define i16 @shlh_i16_2(i16 %arg1, i16 %arg2) { + %A = shl i16 %arg2, %arg1 + ret i16 %A +} + +define i16 @shlh_i16_3(i16 signext %arg1, i16 signext %arg2) signext { + %A = shl i16 %arg1, %arg2 + ret i16 %A +} + +define i16 @shlh_i16_4(i16 signext %arg1, i16 signext %arg2) signext { + %A = shl i16 %arg2, %arg1 + ret i16 %A +} + +define i16 @shlh_i16_5(i16 zeroext %arg1, i16 zeroext %arg2) zeroext { + %A = shl i16 %arg1, %arg2 + ret i16 %A +} + +define i16 @shlh_i16_6(i16 zeroext %arg1, i16 zeroext %arg2) zeroext { + %A = shl i16 %arg2, %arg1 + ret i16 %A +} + +; Shift left i16 with immediate: +define i16 @shlhi_i16_1(i16 %arg1) { + %A = shl i16 %arg1, 12 + ret i16 %A +} + +; Should not generate anything other than the return, arg1 << 0 = arg1 +define i16 @shlhi_i16_2(i16 %arg1) { + %A = shl i16 %arg1, 0 + ret i16 %A +} + +define i16 @shlhi_i16_3(i16 %arg1) { + %A = shl i16 16383, %arg1 + ret i16 %A +} + +; Should generate 0, 0 << arg1 = 0 +define i16 @shlhi_i16_4(i16 %arg1) { + %A = shl i16 0, %arg1 + ret i16 %A +} + +define i16 @shlhi_i16_5(i16 signext %arg1) signext { + %A = shl i16 %arg1, 12 + ret i16 %A +} + +; Should not generate anything other than the return, arg1 << 0 = arg1 +define i16 @shlhi_i16_6(i16 signext %arg1) signext { + %A = shl i16 %arg1, 0 + ret i16 %A +} + +define i16 @shlhi_i16_7(i16 signext %arg1) signext { + %A = shl i16 16383, %arg1 + ret i16 %A +} + +; Should generate 0, 0 << arg1 = 0 +define i16 @shlhi_i16_8(i16 signext %arg1) signext { + %A = shl i16 0, %arg1 + ret i16 %A +} + +define i16 @shlhi_i16_9(i16 zeroext %arg1) zeroext { + %A = shl i16 %arg1, 12 + ret i16 %A +} + +; Should not generate anything other than the return, arg1 << 0 = arg1 +define i16 @shlhi_i16_10(i16 zeroext %arg1) zeroext { + %A = shl i16 %arg1, 0 + ret i16 %A +} + +define i16 @shlhi_i16_11(i16 zeroext %arg1) zeroext { + %A = shl i16 16383, %arg1 + ret i16 %A +} + +; Should generate 0, 0 << arg1 = 0 +define i16 @shlhi_i16_12(i16 zeroext %arg1) zeroext { + %A = shl i16 0, %arg1 + ret i16 %A +} + +; Shift left i32 via register, note that the second operand to shl is promoted +; to a 32-bit type: + +define i32 @shl_i32_1(i32 %arg1, i32 %arg2) { + %A = shl i32 %arg1, %arg2 + ret i32 %A +} + +define i32 @shl_i32_2(i32 %arg1, i32 %arg2) { + %A = shl i32 %arg2, %arg1 + ret i32 %A +} + +define i32 @shl_i32_3(i32 signext %arg1, i32 signext %arg2) signext { + %A = shl i32 %arg1, %arg2 + ret i32 %A +} + +define i32 @shl_i32_4(i32 signext %arg1, i32 signext %arg2) signext { + %A = shl i32 %arg2, %arg1 + ret i32 %A +} + +define i32 @shl_i32_5(i32 zeroext %arg1, i32 zeroext %arg2) zeroext { + %A = shl i32 %arg1, %arg2 + ret i32 %A +} + +define i32 @shl_i32_6(i32 zeroext %arg1, i32 zeroext %arg2) zeroext { + %A = shl i32 %arg2, %arg1 + ret i32 %A +} + +; Shift left i32 with immediate: +define i32 @shli_i32_1(i32 %arg1) { + %A = shl i32 %arg1, 12 + ret i32 %A +} + +; Should not generate anything other than the return, arg1 << 0 = arg1 +define i32 @shli_i32_2(i32 %arg1) { + %A = shl i32 %arg1, 0 + ret i32 %A +} + +define i32 @shli_i32_3(i32 %arg1) { + %A = shl i32 16383, %arg1 + ret i32 %A +} + +; Should generate 0, 0 << arg1 = 0 +define i32 @shli_i32_4(i32 %arg1) { + %A = shl i32 0, %arg1 + ret i32 %A +} + +define i32 @shli_i32_5(i32 signext %arg1) signext { + %A = shl i32 %arg1, 12 + ret i32 %A +} + +; Should not generate anything other than the return, arg1 << 0 = arg1 +define i32 @shli_i32_6(i32 signext %arg1) signext { + %A = shl i32 %arg1, 0 + ret i32 %A +} + +define i32 @shli_i32_7(i32 signext %arg1) signext { + %A = shl i32 16383, %arg1 + ret i32 %A +} + +; Should generate 0, 0 << arg1 = 0 +define i32 @shli_i32_8(i32 signext %arg1) signext { + %A = shl i32 0, %arg1 + ret i32 %A +} + +define i32 @shli_i32_9(i32 zeroext %arg1) zeroext { + %A = shl i32 %arg1, 12 + ret i32 %A +} + +; Should not generate anything other than the return, arg1 << 0 = arg1 +define i32 @shli_i32_10(i32 zeroext %arg1) zeroext { + %A = shl i32 %arg1, 0 + ret i32 %A +} + +define i32 @shli_i32_11(i32 zeroext %arg1) zeroext { + %A = shl i32 16383, %arg1 + ret i32 %A +} + +; Should generate 0, 0 << arg1 = 0 +define i32 @shli_i32_12(i32 zeroext %arg1) zeroext { + %A = shl i32 0, %arg1 + ret i32 %A +} Added: llvm/trunk/test/CodeGen/CellSPU/sp_farith.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/sp_farith.ll?rev=45217&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/sp_farith.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/sp_farith.ll Wed Dec 19 14:50:49 2007 @@ -0,0 +1,88 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep fa %t1.s | count 2 && +; RUN: grep fs %t1.s | count 2 && +; RUN: grep fm %t1.s | count 6 && +; RUN: grep fma %t1.s | count 2 && +; RUN: grep fms %t1.s | count 2 && +; RUN: grep fnms %t1.s | count 3 +; +; This file includes standard floating point arithmetic instructions +; NOTE fdiv is tested separately since it is a compound operation + +define float @fp_add(float %arg1, float %arg2) { + %A = add float %arg1, %arg2 ; [#uses=1] + ret float %A +} + +define <4 x float> @fp_add_vec(<4 x float> %arg1, <4 x float> %arg2) { + %A = add <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1] + ret <4 x float> %A +} + +define float @fp_sub(float %arg1, float %arg2) { + %A = sub float %arg1, %arg2 ; [#uses=1] + ret float %A +} + +define <4 x float> @fp_sub_vec(<4 x float> %arg1, <4 x float> %arg2) { + %A = sub <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1] + ret <4 x float> %A +} + +define float @fp_mul(float %arg1, float %arg2) { + %A = mul float %arg1, %arg2 ; [#uses=1] + ret float %A +} + +define <4 x float> @fp_mul_vec(<4 x float> %arg1, <4 x float> %arg2) { + %A = mul <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1] + ret <4 x float> %A +} + +define float @fp_mul_add(float %arg1, float %arg2, float %arg3) { + %A = mul float %arg1, %arg2 ; [#uses=1] + %B = add float %A, %arg3 ; [#uses=1] + ret float %B +} + +define <4 x float> @fp_mul_add_vec(<4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3) { + %A = mul <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1] + %B = add <4 x float> %A, %arg3 ; <<4 x float>> [#uses=1] + ret <4 x float> %B +} + +define float @fp_mul_sub(float %arg1, float %arg2, float %arg3) { + %A = mul float %arg1, %arg2 ; [#uses=1] + %B = sub float %A, %arg3 ; [#uses=1] + ret float %B +} + +define <4 x float> @fp_mul_sub_vec(<4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3) { + %A = mul <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1] + %B = sub <4 x float> %A, %arg3 ; <<4 x float>> [#uses=1] + ret <4 x float> %B +} + +; Test the straightforward way of getting fnms +; c - a * b +define float @fp_neg_mul_sub_1(float %arg1, float %arg2, float %arg3) { + %A = mul float %arg1, %arg2 + %B = sub float %arg3, %A + ret float %B +} + +; Test another way of getting fnms +; - ( a *b -c ) = c - a * b +define float @fp_neg_mul_sub_2(float %arg1, float %arg2, float %arg3) { + %A = mul float %arg1, %arg2 + %B = sub float %A, %arg3 + %C = sub float -0.0, %B + ret float %C +} + +define <4 x float> @fp_neg_mul_sub_vec(<4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3) { + %A = mul <4 x float> %arg1, %arg2 + %B = sub <4 x float> %A, %arg3 + %D = sub <4 x float> < float -0.0, float -0.0, float -0.0, float -0.0 >, %B + ret <4 x float> %D +} From baldrick at free.fr Wed Dec 19 15:13:42 2007 From: baldrick at free.fr (Duncan Sands) Date: Wed, 19 Dec 2007 21:13:42 -0000 Subject: [llvm-commits] [llvm] r45218 - in /llvm/trunk: include/llvm/Instructions.h include/llvm/ParameterAttributes.h include/llvm/Support/CallSite.h lib/Transforms/IPO/PruneEH.cpp lib/Transforms/Scalar/InstructionCombining.cpp lib/Transforms/Utils/InlineFunction.cpp lib/VMCore/Function.cpp lib/VMCore/Instructions.cpp test/Transforms/Inline/2007-12-19-InlineNoUnwind.ll Message-ID: <200712192113.lBJLDg1x032040@zion.cs.uiuc.edu> Author: baldrick Date: Wed Dec 19 15:13:37 2007 New Revision: 45218 URL: http://llvm.org/viewvc/llvm-project?rev=45218&view=rev Log: When inlining through an 'nounwind' call, mark inlined calls 'nounwind'. It is important for correct C++ exception handling that nounwind markings do not get lost, so this transformation is actually needed for correctness. Added: llvm/trunk/test/Transforms/Inline/2007-12-19-InlineNoUnwind.ll Modified: llvm/trunk/include/llvm/Instructions.h llvm/trunk/include/llvm/ParameterAttributes.h llvm/trunk/include/llvm/Support/CallSite.h llvm/trunk/lib/Transforms/IPO/PruneEH.cpp llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp llvm/trunk/lib/VMCore/Function.cpp llvm/trunk/lib/VMCore/Instructions.cpp Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=45218&r1=45217&r2=45218&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Wed Dec 19 15:13:37 2007 @@ -948,6 +948,7 @@ bool doesNotThrow() const { return paramHasAttr(0, ParamAttr::NoUnwind); } + void setDoesNotThrow(bool doesNotThrow = true); /// @brief Determine if the call returns a structure. bool isStructReturn() const { @@ -1752,6 +1753,7 @@ bool doesNotThrow() const { return paramHasAttr(0, ParamAttr::NoUnwind); } + void setDoesNotThrow(bool doesNotThrow = true); /// @brief Determine if the call returns a structure. bool isStructReturn() const { Modified: llvm/trunk/include/llvm/ParameterAttributes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ParameterAttributes.h?rev=45218&r1=45217&r2=45218&view=diff ============================================================================== --- llvm/trunk/include/llvm/ParameterAttributes.h (original) +++ llvm/trunk/include/llvm/ParameterAttributes.h Wed Dec 19 15:13:37 2007 @@ -149,6 +149,14 @@ static const ParamAttrsList *getModified(const ParamAttrsList *PAL, const ParamAttrsVector &modVec); + /// @brief Add the specified attributes to those in PAL at index idx. + static const ParamAttrsList *includeAttrs(const ParamAttrsList *PAL, + uint16_t idx, uint16_t attrs); + + /// @brief Remove the specified attributes from those in PAL at index idx. + static const ParamAttrsList *excludeAttrs(const ParamAttrsList *PAL, + uint16_t idx, uint16_t attrs); + /// Returns whether each of the specified lists of attributes can be safely /// replaced with the other in a function or a function call. /// @brief Whether one attribute list can safely replace the other. Modified: llvm/trunk/include/llvm/Support/CallSite.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CallSite.h?rev=45218&r1=45217&r2=45218&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/CallSite.h (original) +++ llvm/trunk/include/llvm/Support/CallSite.h Wed Dec 19 15:13:37 2007 @@ -75,6 +75,7 @@ /// @brief Determine if the call cannot unwind. bool doesNotThrow() const; + void setDoesNotThrow(bool doesNotThrow = true); /// getType - Return the type of the instruction that generated this call site /// Modified: llvm/trunk/lib/Transforms/IPO/PruneEH.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PruneEH.cpp?rev=45218&r1=45217&r2=45218&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/PruneEH.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/PruneEH.cpp Wed Dec 19 15:13:37 2007 @@ -122,17 +122,15 @@ // If the SCC doesn't unwind or doesn't throw, note this fact. if (!SCCMightUnwind || !SCCMightReturn) for (unsigned i = 0, e = SCC.size(); i != e; ++i) { - const ParamAttrsList *PAL = SCC[i]->getFunction()->getParamAttrs(); - uint16_t RAttributes = PAL ? PAL->getParamAttrs(0) : 0; + uint16_t NewAttributes = ParamAttr::None; if (!SCCMightUnwind) - RAttributes |= ParamAttr::NoUnwind; + NewAttributes |= ParamAttr::NoUnwind; if (!SCCMightReturn) - RAttributes |= ParamAttr::NoReturn; + NewAttributes |= ParamAttr::NoReturn; - ParamAttrsVector modVec; - modVec.push_back(ParamAttrsWithIndex::get(0, RAttributes)); - PAL = ParamAttrsList::getModified(PAL, modVec); + const ParamAttrsList *PAL = SCC[i]->getFunction()->getParamAttrs(); + PAL = ParamAttrsList::includeAttrs(PAL, 0, NewAttributes); SCC[i]->getFunction()->setParamAttrs(PAL); } Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=45218&r1=45217&r2=45218&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Wed Dec 19 15:13:37 2007 @@ -8026,16 +8026,9 @@ } } - if (isa(Callee) && !CS.paramHasAttr(0, ParamAttr::NoUnwind)) { + if (isa(Callee) && !CS.doesNotThrow()) { // Inline asm calls cannot throw - mark them 'nounwind'. - const ParamAttrsList *PAL = CS.getParamAttrs(); - uint16_t RAttributes = PAL ? PAL->getParamAttrs(0) : 0; - RAttributes |= ParamAttr::NoUnwind; - - ParamAttrsVector modVec; - modVec.push_back(ParamAttrsWithIndex::get(0, RAttributes)); - PAL = ParamAttrsList::getModified(PAL, modVec); - CS.setParamAttrs(PAL); + CS.setDoesNotThrow(); Changed = true; } Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp?rev=45218&r1=45217&r2=45218&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Wed Dec 19 15:13:37 2007 @@ -194,6 +194,10 @@ bool MustClearTailCallFlags = isa(TheCall) && !cast(TheCall)->isTailCall(); + // If the call to the callee cannot throw, set the 'nounwind' flag on any + // calls that we inline. + bool MarkNoUnwind = CS.doesNotThrow(); + BasicBlock *OrigBB = TheCall->getParent(); Function *Caller = OrigBB->getParent(); @@ -207,7 +211,7 @@ std::vector Returns; ClonedCodeInfo InlinedFunctionInfo; Function::iterator FirstNewBlock; - + { // Scope to destroy ValueMap after cloning. DenseMap ValueMap; @@ -323,15 +327,33 @@ // If we are inlining tail call instruction through a call site that isn't // marked 'tail', we must remove the tail marker for any calls in the inlined - // code. - if (MustClearTailCallFlags && InlinedFunctionInfo.ContainsCalls) { + // code. Also, calls inlined through a 'nounwind' call site should be marked + // 'nounwind'. + if (InlinedFunctionInfo.ContainsCalls && + (MustClearTailCallFlags || MarkNoUnwind)) { for (Function::iterator BB = FirstNewBlock, E = Caller->end(); BB != E; ++BB) for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) - if (CallInst *CI = dyn_cast(I)) - CI->setTailCall(false); + if (CallInst *CI = dyn_cast(I)) { + if (MustClearTailCallFlags) + CI->setTailCall(false); + if (MarkNoUnwind) + CI->setDoesNotThrow(); + } } + // If we are inlining through a 'nounwind' call site then any inlined 'unwind' + // instructions are unreachable. + if (InlinedFunctionInfo.ContainsUnwinds && MarkNoUnwind) + for (Function::iterator BB = FirstNewBlock, E = Caller->end(); + BB != E; ++BB) { + TerminatorInst *Term = BB->getTerminator(); + if (isa(Term)) { + new UnreachableInst(Term); + BB->getInstList().erase(Term); + } + } + // If we are inlining for an invoke instruction, we must make sure to rewrite // any inlined 'unwind' instructions into branches to the invoke exception // destination, and call instructions into invoke instructions. Modified: llvm/trunk/lib/VMCore/Function.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Function.cpp?rev=45218&r1=45217&r2=45218&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Function.cpp (original) +++ llvm/trunk/lib/VMCore/Function.cpp Wed Dec 19 15:13:37 2007 @@ -261,6 +261,32 @@ return get(newVec); } +const ParamAttrsList * +ParamAttrsList::includeAttrs(const ParamAttrsList *PAL, + uint16_t idx, uint16_t attrs) { + uint16_t OldAttrs = PAL ? PAL->getParamAttrs(idx) : 0; + uint16_t NewAttrs = OldAttrs | attrs; + if (NewAttrs == OldAttrs) + return PAL; + + ParamAttrsVector modVec; + modVec.push_back(ParamAttrsWithIndex::get(idx, NewAttrs)); + return getModified(PAL, modVec); +} + +const ParamAttrsList * +ParamAttrsList::excludeAttrs(const ParamAttrsList *PAL, + uint16_t idx, uint16_t attrs) { + uint16_t OldAttrs = PAL ? PAL->getParamAttrs(idx) : 0; + uint16_t NewAttrs = OldAttrs & ~attrs; + if (NewAttrs == OldAttrs) + return PAL; + + ParamAttrsVector modVec; + modVec.push_back(ParamAttrsWithIndex::get(idx, NewAttrs)); + return getModified(PAL, modVec); +} + ParamAttrsList::~ParamAttrsList() { ParamAttrsLists->RemoveNode(this); } Modified: llvm/trunk/lib/VMCore/Instructions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=45218&r1=45217&r2=45218&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instructions.cpp (original) +++ llvm/trunk/lib/VMCore/Instructions.cpp Wed Dec 19 15:13:37 2007 @@ -71,6 +71,12 @@ else return cast(I)->doesNotThrow(); } +void CallSite::setDoesNotThrow(bool doesNotThrow) { + if (CallInst *CI = dyn_cast(I)) + CI->setDoesNotThrow(doesNotThrow); + else + cast(I)->setDoesNotThrow(doesNotThrow); +} //===----------------------------------------------------------------------===// // TerminatorInst Class @@ -405,6 +411,15 @@ return false; } +void CallInst::setDoesNotThrow(bool doesNotThrow) { + const ParamAttrsList *PAL = getParamAttrs(); + if (doesNotThrow) + PAL = ParamAttrsList::includeAttrs(PAL, 0, ParamAttr::NoUnwind); + else + PAL = ParamAttrsList::excludeAttrs(PAL, 0, ParamAttr::NoUnwind); + setParamAttrs(PAL); +} + //===----------------------------------------------------------------------===// // InvokeInst Implementation @@ -483,6 +498,15 @@ return false; } +void InvokeInst::setDoesNotThrow(bool doesNotThrow) { + const ParamAttrsList *PAL = getParamAttrs(); + if (doesNotThrow) + PAL = ParamAttrsList::includeAttrs(PAL, 0, ParamAttr::NoUnwind); + else + PAL = ParamAttrsList::excludeAttrs(PAL, 0, ParamAttr::NoUnwind); + setParamAttrs(PAL); +} + //===----------------------------------------------------------------------===// // ReturnInst Implementation Added: llvm/trunk/test/Transforms/Inline/2007-12-19-InlineNoUnwind.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/2007-12-19-InlineNoUnwind.ll?rev=45218&view=auto ============================================================================== --- llvm/trunk/test/Transforms/Inline/2007-12-19-InlineNoUnwind.ll (added) +++ llvm/trunk/test/Transforms/Inline/2007-12-19-InlineNoUnwind.ll Wed Dec 19 15:13:37 2007 @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s -o - | opt -inline | llvm-dis | grep nounwind +; RUN: llvm-as < %s -o - | opt -inline | llvm-dis | grep unreachable + +declare i1 @extern() + +define internal i32 @test() { +entry: + %n = call i1 @extern( ) + br i1 %n, label %r, label %u +r: + ret i32 0; +u: + unwind +} + +define i32 @caller() { + %X = call i32 @test( ) nounwind + ret i32 %X +} From scottm at aero.org Wed Dec 19 15:17:42 2007 From: scottm at aero.org (Scott Michel) Date: Wed, 19 Dec 2007 21:17:42 -0000 Subject: [llvm-commits] [llvm] r45219 - in /llvm/trunk: lib/Target/CellSPU/SPUISelLowering.cpp test/CodeGen/CellSPU/extract_elt.ll Message-ID: <200712192117.lBJLHgGv032212@zion.cs.uiuc.edu> Author: pingbak Date: Wed Dec 19 15:17:42 2007 New Revision: 45219 URL: http://llvm.org/viewvc/llvm-project?rev=45219&view=rev Log: CellSPU testcase, extract_elt.ll: extract vector element. Added: llvm/trunk/test/CodeGen/CellSPU/extract_elt.ll Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=45219&r1=45218&r2=45219&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Wed Dec 19 15:17:42 2007 @@ -2101,7 +2101,7 @@ } // Need to generate shuffle mask and extract: - int prefslot_begin, prefslot_end; + int prefslot_begin = -1, prefslot_end = -1; int elt_byte = EltNo * MVT::getSizeInBits(VT) / 8; switch (VT) { @@ -2123,6 +2123,9 @@ } } + assert(prefslot_begin != -1 && prefslot_end != -1 && + "LowerEXTRACT_VECTOR_ELT: preferred slots uninitialized"); + for (int i = 0; i < 16; ++i) { // zero fill uppper part of preferred slot, don't care about the // other slots: @@ -2134,7 +2137,7 @@ ? 0x80 : elt_byte + (i - prefslot_begin)); - ShufMask[i] = DAG.getConstant(mask_val, MVT::i16); + ShufMask[i] = DAG.getConstant(mask_val, MVT::i8); } else ShufMask[i] = ShufMask[i % (prefslot_end + 1)]; } Added: llvm/trunk/test/CodeGen/CellSPU/extract_elt.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/extract_elt.ll?rev=45219&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/extract_elt.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/extract_elt.ll Wed Dec 19 15:17:42 2007 @@ -0,0 +1,175 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llvm-as -o - %s | llc -march=cellspu -mattr=large_mem > %t2.s +; RUN: grep shufb %t1.s | count 27 && +; RUN: grep lqa %t1.s | count 27 && +; RUN: grep lqx %t2.s | count 27 && +; RUN: grep space %t1.s | count 8 && +; RUN: grep byte %t1.s | count 424 + +define i32 @i32_extract_0(<4 x i32> %v) { +entry: + %a = extractelement <4 x i32> %v, i32 0 + ret i32 %a +} + +define i32 @i32_extract_1(<4 x i32> %v) { +entry: + %a = extractelement <4 x i32> %v, i32 1 + ret i32 %a +} + +define i32 @i32_extract_2(<4 x i32> %v) { +entry: + %a = extractelement <4 x i32> %v, i32 2 + ret i32 %a +} + +define i32 @i32_extract_3(<4 x i32> %v) { +entry: + %a = extractelement <4 x i32> %v, i32 3 + ret i32 %a +} + +define i16 @i16_extract_0(<8 x i16> %v) { +entry: + %a = extractelement <8 x i16> %v, i32 0 + ret i16 %a +} + +define i16 @i16_extract_1(<8 x i16> %v) { +entry: + %a = extractelement <8 x i16> %v, i32 1 + ret i16 %a +} + +define i16 @i16_extract_2(<8 x i16> %v) { +entry: + %a = extractelement <8 x i16> %v, i32 2 + ret i16 %a +} + +define i16 @i16_extract_3(<8 x i16> %v) { +entry: + %a = extractelement <8 x i16> %v, i32 3 + ret i16 %a +} + +define i16 @i16_extract_4(<8 x i16> %v) { +entry: + %a = extractelement <8 x i16> %v, i32 4 + ret i16 %a +} + +define i16 @i16_extract_5(<8 x i16> %v) { +entry: + %a = extractelement <8 x i16> %v, i32 5 + ret i16 %a +} + +define i16 @i16_extract_6(<8 x i16> %v) { +entry: + %a = extractelement <8 x i16> %v, i32 6 + ret i16 %a +} + +define i16 @i16_extract_7(<8 x i16> %v) { +entry: + %a = extractelement <8 x i16> %v, i32 7 + ret i16 %a +} + +define i8 @i8_extract_0(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 0 + ret i8 %a +} + +define i8 @i8_extract_1(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 1 + ret i8 %a +} + +define i8 @i8_extract_2(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 2 + ret i8 %a +} + +define i8 @i8_extract_3(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 3 + ret i8 %a +} + +define i8 @i8_extract_4(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 4 + ret i8 %a +} + +define i8 @i8_extract_5(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 5 + ret i8 %a +} + +define i8 @i8_extract_6(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 6 + ret i8 %a +} + +define i8 @i8_extract_7(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 7 + ret i8 %a +} + +define i8 @i8_extract_8(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 8 + ret i8 %a +} + +define i8 @i8_extract_9(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 9 + ret i8 %a +} + +define i8 @i8_extract_10(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 10 + ret i8 %a +} + +define i8 @i8_extract_11(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 11 + ret i8 %a +} + +define i8 @i8_extract_12(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 12 + ret i8 %a +} + +define i8 @i8_extract_13(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 13 + ret i8 %a +} + +define i8 @i8_extract_14(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 14 + ret i8 %a +} + +define i8 @i8_extract_15(<16 x i8> %v) { +entry: + %a = extractelement <16 x i8> %v, i32 15 + ret i8 %a +} From baldrick at free.fr Wed Dec 19 15:19:51 2007 From: baldrick at free.fr (Duncan Sands) Date: Wed, 19 Dec 2007 21:19:51 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r45220 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200712192119.lBJLJpwZ032367@zion.cs.uiuc.edu> Author: baldrick Date: Wed Dec 19 15:19:51 2007 New Revision: 45220 URL: http://llvm.org/viewvc/llvm-project?rev=45220&view=rev Log: Simplify adding nounwind attributes using new helpers. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=45220&r1=45219&r2=45220&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Wed Dec 19 15:19:51 2007 @@ -2344,16 +2344,10 @@ } } - if (NoUnwind && !(PAL && PAL->paramHasAttr(0, ParamAttr::NoUnwind))) { + if (NoUnwind) // This particular call does not unwind even though the callee may // unwind in general. Add the 'nounwind' attribute to the call. - uint16_t RAttributes = PAL ? PAL->getParamAttrs(0) : 0; - RAttributes |= ParamAttr::NoUnwind; - - ParamAttrsVector modVec; - modVec.push_back(ParamAttrsWithIndex::get(0, RAttributes)); - PAL = ParamAttrsList::getModified(PAL, modVec); - } + PAL = ParamAttrsList::includeAttrs(PAL, 0, ParamAttr::NoUnwind); SmallVector CallOperands; CallingConv::ID CallingConvention; @@ -3295,16 +3289,6 @@ //===----------------------------------------------------------------------===// -/// Return a ParamAttrsList for the given function return attributes. -const ParamAttrsList *getReturnAttrs(uint16_t attrs) { - if (attrs == ParamAttr::None) - return NULL; - - ParamAttrsVector Attrs; - Attrs.push_back(ParamAttrsWithIndex::get(0, attrs)); - return ParamAttrsList::get(Attrs); -} - /// Reads from register variables are handled by emitting an inline asm node /// that copies the value out of the specified register. Value *TreeToLLVM::EmitReadOfRegisterVariable(tree decl, @@ -3324,7 +3308,7 @@ const char *Name = extractRegisterName(decl); InlineAsm *IA = InlineAsm::get(FTy, "", "={"+std::string(Name)+"}", false); CallInst *Call = Builder.CreateCall(IA, "tmp"); - Call->setParamAttrs(getReturnAttrs(ParamAttr::NoUnwind)); + Call->setDoesNotThrow(); return Call; } @@ -3343,7 +3327,7 @@ const char *Name = extractRegisterName(decl); InlineAsm *IA = InlineAsm::get(FTy, "", "{"+std::string(Name)+"}", true); CallInst *Call = Builder.CreateCall(IA, RHS); - Call->setParamAttrs(getReturnAttrs(ParamAttr::NoUnwind)); + Call->setDoesNotThrow(); } /// ConvertInlineAsmStr - Convert the specified inline asm string to an LLVM @@ -3766,7 +3750,7 @@ ASM_VOLATILE_P(exp) || !ASM_OUTPUTS(exp)); CallInst *CV = Builder.CreateCall(Asm, CallOps.begin(), CallOps.end(), StoreCallResultAddr ? "tmp" : ""); - CV->setParamAttrs(getReturnAttrs(ParamAttr::NoUnwind)); + CV->setDoesNotThrow(); // If the call produces a value, store it into the destination. if (StoreCallResultAddr) From dalej at apple.com Wed Dec 19 15:54:37 2007 From: dalej at apple.com (Dale Johannesen) Date: Wed, 19 Dec 2007 21:54:37 -0000 Subject: [llvm-commits] [llvm] r45221 - /llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp Message-ID: <200712192154.lBJLsbsA001971@zion.cs.uiuc.edu> Author: johannes Date: Wed Dec 19 15:54:36 2007 New Revision: 45221 URL: http://llvm.org/viewvc/llvm-project?rev=45221&view=rev Log: Enable EH on PPC Darwin. This basically works; there are a couple of issues that show up with the optimizer, but I don't think they're really EH problems. (llvm-gcc testsuite users note: By default the testsuite uses the unwinding code that's built as part of your local llvm-gcc, which does not work. You need to trick it into using the installed system unwinding code to get useful results.) Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp?rev=45221&r1=45220&r2=45221&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp Wed Dec 19 15:54:36 2007 @@ -58,7 +58,7 @@ WeakDefDirective = "\t.weak_definition\t"; WeakRefDirective = "\t.weak_reference\t"; HiddenDirective = "\t.private_extern\t"; - SupportsExceptionHandling = false; + SupportsExceptionHandling = true; NeedsIndirectEncoding = true; BSSSection = 0; From clattner at apple.com Wed Dec 19 16:21:38 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 19 Dec 2007 14:21:38 -0800 Subject: [llvm-commits] [llvm] r45221 - /llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp In-Reply-To: <200712192154.lBJLsbsA001971@zion.cs.uiuc.edu> References: <200712192154.lBJLsbsA001971@zion.cs.uiuc.edu> Message-ID: On Dec 19, 2007, at 1:54 PM, Dale Johannesen wrote: > Author: johannes > Date: Wed Dec 19 15:54:36 2007 > New Revision: 45221 > > URL: http://llvm.org/viewvc/llvm-project?rev=45221&view=rev > Log: > Enable EH on PPC Darwin. This basically works; there > are a couple of issues that show up with the optimizer, > but I don't think they're really EH problems. > (llvm-gcc testsuite users note: By default the testsuite > uses the unwinding code that's built as part of your local > llvm-gcc, which does not work. You need to trick it into > using the installed system unwinding code to get useful > results.) Nice! What is the magic needed to trick it into doing this? I'd like the nightly testers to do this. If you tell me the majik, I can try to hook it up to happen automatically. -Chris From asl at math.spbu.ru Wed Dec 19 16:25:50 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Thu, 20 Dec 2007 01:25:50 +0300 Subject: [llvm-commits] [llvm] r45221 - /llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp In-Reply-To: References: <200712192154.lBJLsbsA001971@zion.cs.uiuc.edu> Message-ID: <1198103150.10758.109.camel@asl.dorms.spbu.ru> Chris, > Nice! What is the magic needed to trick it into doing this? I'd > like the nightly testers to do this. If you tell me the majik, I can > try to hook it up to happen automatically. Usual magic is to generate .S file and compile/link it with native g++ -- With best regards, Anton Korobeynikov. Faculty of Mathematics & Mechanics, Saint Petersburg State University. From gordonhenriksen at mac.com Wed Dec 19 16:30:40 2007 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Wed, 19 Dec 2007 22:30:40 -0000 Subject: [llvm-commits] [llvm] r45226 - in /llvm/trunk: Xcode/LLVM.xcodeproj/ bindings/ocaml/analysis/ bindings/ocaml/bitreader/ bindings/ocaml/llvm/ include/llvm-c/ lib/Analysis/ lib/Bitcode/Reader/ lib/VMCore/ test/Bindings/Ocaml/ Message-ID: <200712192230.lBJMUflo003584@zion.cs.uiuc.edu> Author: gordon Date: Wed Dec 19 16:30:40 2007 New Revision: 45226 URL: http://llvm.org/viewvc/llvm-project?rev=45226&view=rev Log: Adding bindings for memory buffers and module providers. Switching to exceptions rather than variants for error handling in Ocaml. Modified: llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj llvm/trunk/bindings/ocaml/analysis/analysis_ocaml.c llvm/trunk/bindings/ocaml/bitreader/bitreader_ocaml.c llvm/trunk/bindings/ocaml/bitreader/llvm_bitreader.ml llvm/trunk/bindings/ocaml/bitreader/llvm_bitreader.mli llvm/trunk/bindings/ocaml/llvm/llvm.ml llvm/trunk/bindings/ocaml/llvm/llvm.mli llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c llvm/trunk/include/llvm-c/Analysis.h llvm/trunk/include/llvm-c/BitReader.h llvm/trunk/include/llvm-c/Core.h llvm/trunk/lib/Analysis/Analysis.cpp llvm/trunk/lib/Bitcode/Reader/BitReader.cpp llvm/trunk/lib/VMCore/Core.cpp llvm/trunk/test/Bindings/Ocaml/bitreader.ml llvm/trunk/test/Bindings/Ocaml/vmcore.ml Modified: llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj (original) +++ llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj Wed Dec 19 16:30:40 2007 @@ -98,6 +98,7 @@ 9F68EB130C77AD2C004AA152 /* BitcodeWriterPass.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = BitcodeWriterPass.cpp; sourceTree = ""; }; 9F68EB250C77AD2C004AA152 /* ValueEnumerator.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ValueEnumerator.cpp; sourceTree = ""; }; 9F68EB260C77AD2C004AA152 /* ValueEnumerator.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = ValueEnumerator.h; sourceTree = ""; }; + 9F6B2CC00D0F6E56000F00FD /* bitreader.ml */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = bitreader.ml; sourceTree = ""; }; 9F7793460C73BC2000551F9C /* CodeGenPrepare.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = CodeGenPrepare.cpp; sourceTree = ""; }; 9F7793470C73BC2000551F9C /* GVN.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = GVN.cpp; sourceTree = ""; }; 9F7793480C73BC2000551F9C /* GVNPRE.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = GVNPRE.cpp; sourceTree = ""; }; @@ -1241,6 +1242,7 @@ isa = PBXGroup; children = ( 9F7C2C4F0CB9496C00498408 /* analysis.ml */, + 9F6B2CC00D0F6E56000F00FD /* bitreader.ml */, 9F7C2C520CB9496C00498408 /* bitwriter.ml */, 9F7C2C5D0CB9496C00498408 /* vmcore.ml */, ); Modified: llvm/trunk/bindings/ocaml/analysis/analysis_ocaml.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/analysis/analysis_ocaml.c?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/analysis/analysis_ocaml.c (original) +++ llvm/trunk/bindings/ocaml/analysis/analysis_ocaml.c Wed Dec 19 16:30:40 2007 @@ -37,7 +37,7 @@ Store_field(Option, 0, String); } - LLVMDisposeVerifierMessage(Message); + LLVMDisposeMessage(Message); CAMLreturn(Option); } Modified: llvm/trunk/bindings/ocaml/bitreader/bitreader_ocaml.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/bitreader/bitreader_ocaml.c?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/bitreader/bitreader_ocaml.c (original) +++ llvm/trunk/bindings/ocaml/bitreader/bitreader_ocaml.c Wed Dec 19 16:30:40 2007 @@ -16,31 +16,46 @@ #include "caml/alloc.h" #include "caml/mlvalues.h" #include "caml/memory.h" +#include + + +/* Can't use the recommended caml_named_value mechanism for backwards + compatibility reasons. This is largely equivalent. */ +static value llvm_bitreader_error_exn; + +CAMLprim value llvm_register_bitreader_exns(value Error) { + llvm_bitreader_error_exn = Field(Error, 0); + register_global_root(&llvm_bitreader_error_exn); + return Val_unit; +} + +void llvm_raise(value Prototype, char *Message); + /*===-- Modules -----------------------------------------------------------===*/ -/* string -> bitreader_result +/* Llvm.llmemorybuffer -> Llvm.module */ +CAMLprim value llvm_get_module_provider(LLVMMemoryBufferRef MemBuf) { + CAMLparam0(); + CAMLlocal2(Variant, MessageVal); + char *Message; + + LLVMModuleProviderRef MP; + if (LLVMGetBitcodeModuleProvider(MemBuf, &MP, &Message)) + llvm_raise(llvm_bitreader_error_exn, Message); + + CAMLreturn((value) MemBuf); +} - type bitreader_result = - | Bitreader_success of Llvm.llmodule - | Bitreader_failure of string - */ -CAMLprim value llvm_read_bitcode_file(value Path) { +/* Llvm.llmemorybuffer -> Llvm.llmodule */ +CAMLprim value llvm_parse_bitcode(LLVMMemoryBufferRef MemBuf) { + CAMLparam0(); + CAMLlocal2(Variant, MessageVal); LLVMModuleRef M; char *Message; - CAMLparam1(Path); - CAMLlocal2(Variant, MessageVal); - if (LLVMReadBitcodeFromFile(String_val(Path), &M, &Message)) { - MessageVal = copy_string(Message); - LLVMDisposeBitcodeReaderMessage(Message); - - Variant = alloc(1, 1); - Field(Variant, 0) = MessageVal; - } else { - Variant = alloc(1, 0); - Field(Variant, 0) = Val_op(M); - } + if (LLVMParseBitcode(MemBuf, &M, &Message)) + llvm_raise(llvm_bitreader_error_exn, Message); - CAMLreturn(Variant); + CAMLreturn((value) M); } Modified: llvm/trunk/bindings/ocaml/bitreader/llvm_bitreader.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/bitreader/llvm_bitreader.ml?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/bitreader/llvm_bitreader.ml (original) +++ llvm/trunk/bindings/ocaml/bitreader/llvm_bitreader.ml Wed Dec 19 16:30:40 2007 @@ -8,10 +8,12 @@ *===----------------------------------------------------------------------===*) -type bitreader_result = -| Bitreader_success of Llvm.llmodule -| Bitreader_failure of string +exception Error of string +external register_exns : exn -> unit = "llvm_register_bitreader_exns" +let _ = register_exns (Error "") -external read_bitcode_file : string -> bitreader_result - = "llvm_read_bitcode_file" +external get_module_provider : Llvm.llmemorybuffer -> Llvm.llmoduleprovider + = "llvm_get_module_provider" +external parse_bitcode : Llvm.llmemorybuffer -> Llvm.llmodule + = "llvm_parse_bitcode" Modified: llvm/trunk/bindings/ocaml/bitreader/llvm_bitreader.mli URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/bitreader/llvm_bitreader.mli?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/bitreader/llvm_bitreader.mli (original) +++ llvm/trunk/bindings/ocaml/bitreader/llvm_bitreader.mli Wed Dec 19 16:30:40 2007 @@ -13,13 +13,18 @@ *===----------------------------------------------------------------------===*) -type bitreader_result = -| Bitreader_success of Llvm.llmodule -| Bitreader_failure of string +exception Error of string +(** [read_bitcode_file path] reads the bitcode for a new module [m] from the + file at [path]. Returns [Success m] if successful, and [Failure msg] + otherwise, where [msg] is a description of the error encountered. + See the function [llvm::getBitcodeModuleProvider]. **) +external get_module_provider : Llvm.llmemorybuffer -> Llvm.llmoduleprovider + = "llvm_get_module_provider" -(** [read_bitcode_file path] reads the bitcode for module [m] from the file at - [path]. Returns [Reader_success m] if successful, and [Reader_failure msg] - otherwise, where [msg] is a description of the error encountered. **) -external read_bitcode_file : string -> bitreader_result - = "llvm_read_bitcode_file" +(** [parse_bitcode mb] parses the bitcode for a new module [m] from the memory + buffer [mb]. Returns [Success m] if successful, and [Failure msg] otherwise, + where [msg] is a description of the error encountered. + See the function [llvm::ParseBitcodeFile]. **) +external parse_bitcode : Llvm.llmemorybuffer -> Llvm.llmodule + = "llvm_parse_bitcode" Modified: llvm/trunk/bindings/ocaml/llvm/llvm.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm.ml?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm.ml (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm.ml Wed Dec 19 16:30:40 2007 @@ -15,6 +15,7 @@ type llbasicblock type llbuilder type llmoduleprovider +type llmemorybuffer type type_kind = Void_type @@ -84,6 +85,11 @@ | Fcmp_une | Fcmp_true +exception IoError of string + +external register_exns : exn -> unit = "llvm_register_core_exns" +let _ = register_exns (IoError "") + (*===-- Modules -----------------------------------------------------------===*) @@ -432,10 +438,21 @@ (*===-- Module providers --------------------------------------------------===*) -external create_module_provider : llmodule -> llmoduleprovider - = "LLVMCreateModuleProviderForExistingModule" -external dispose_module_provider : llmoduleprovider -> unit - = "llvm_dispose_module_provider" + +module ModuleProvider = struct + external create : llmodule -> llmoduleprovider + = "LLVMCreateModuleProviderForExistingModule" + external dispose : llmoduleprovider -> unit = "llvm_dispose_module_provider" +end + + +(*===-- Memory buffers ----------------------------------------------------===*) + +module MemoryBuffer = struct + external of_file : string -> llmemorybuffer = "llvm_memorybuffer_of_file" + external of_stdin : unit -> llmemorybuffer = "llvm_memorybuffer_of_stdin" + external dispose : llmemorybuffer -> unit = "llvm_memorybuffer_dispose" +end (*===-- Non-Externs -------------------------------------------------------===*) Modified: llvm/trunk/bindings/ocaml/llvm/llvm.mli URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm.mli?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm.mli (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm.mli Wed Dec 19 16:30:40 2007 @@ -40,9 +40,14 @@ class. **) type llbuilder -(** Used to provide a module to JIT or interpreter. **) +(** Used to provide a module to JIT or interpreter. + See the [llvm::ModuleProvider] class. **) type llmoduleprovider +(** Used to efficiently handle large buffers of read-only binary data. + See the [llvm::MemoryBuffer] class. **) +type llmemorybuffer + (** The kind of an [lltype], the result of [classify_type ty]. See the [llvm::Type::TypeID] enumeration. **) type type_kind = @@ -129,6 +134,8 @@ | Fcmp_une | Fcmp_true +exception IoError of string + (*===-- Modules -----------------------------------------------------------===*) @@ -1235,13 +1242,30 @@ (*===-- Module providers --------------------------------------------------===*) -(** [create_module_provider m] encapsulates [m] in a module provider and takes - ownership of the module. See the constructor - [llvm::ExistingModuleProvider::ExistingModuleProvider]. **) -external create_module_provider : llmodule -> llmoduleprovider - = "LLVMCreateModuleProviderForExistingModule" - -(** [dispose_module_provider mp] destroys the module provider [mp] as well as - the contained module. **) -external dispose_module_provider : llmoduleprovider -> unit - = "llvm_dispose_module_provider" +module ModuleProvider : sig + (** [create_module_provider m] encapsulates [m] in a module provider and takes + ownership of the module. See the constructor + [llvm::ExistingModuleProvider::ExistingModuleProvider]. **) + external create : llmodule -> llmoduleprovider + = "LLVMCreateModuleProviderForExistingModule" + + (** [dispose_module_provider mp] destroys the module provider [mp] as well as + the contained module. **) + external dispose : llmoduleprovider -> unit = "llvm_dispose_module_provider" +end + + +(*===-- Memory buffers ----------------------------------------------------===*) + +module MemoryBuffer : sig + (** [of_file p] is the memory buffer containing the contents of the file at + path [p]. If the file could not be read, then [IoError msg] is raised. **) + external of_file : string -> llmemorybuffer = "llvm_memorybuffer_of_file" + + (** [stdin ()] is the memory buffer containing the contents of standard input. + If standard input is empty, then [IoError msg] is raised. **) + external of_stdin : unit -> llmemorybuffer = "llvm_memorybuffer_of_stdin" + + (** Disposes of a memory buffer. **) + external dispose : llmemorybuffer -> unit = "llvm_memorybuffer_dispose" +end Modified: llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c Wed Dec 19 16:30:40 2007 @@ -20,8 +20,33 @@ #include "caml/custom.h" #include "caml/mlvalues.h" #include "caml/memory.h" +#include "caml/fail.h" +#include "caml/callback.h" #include "llvm/Config/config.h" #include +#include + + +/* Can't use the recommended caml_named_value mechanism for backwards + compatibility reasons. This is largely equivalent. */ +static value llvm_ioerror_exn; + +CAMLprim value llvm_register_core_exns(value IoError) { + llvm_ioerror_exn = Field(IoError, 0); + register_global_root(&llvm_ioerror_exn); + return Val_unit; +} + +void llvm_raise(value Prototype, char *Message) { + CAMLparam1(Prototype); + CAMLlocal1(CamlMessage); + + CamlMessage = copy_string(Message); + LLVMDisposeMessage(Message); + + raise_with_arg(Prototype, CamlMessage); + CAMLnoreturn; +} /*===-- Modules -----------------------------------------------------------===*/ @@ -1071,3 +1096,39 @@ LLVMDisposeModuleProvider(MP); return Val_unit; } + + +/*===-- Memory buffers ----------------------------------------------------===*/ + +/* string -> llmemorybuffer + raises IoError msg on error */ +CAMLprim value llvm_memorybuffer_of_file(value Path) { + CAMLparam1(Path); + char *Message; + LLVMMemoryBufferRef MemBuf; + + if (LLVMCreateMemoryBufferWithContentsOfFile(String_val(Path), + &MemBuf, &Message)) + llvm_raise(llvm_ioerror_exn, Message); + + CAMLreturn((value) MemBuf); +} + +/* unit -> llmemorybuffer + raises IoError msg on error */ +CAMLprim LLVMMemoryBufferRef llvm_memorybuffer_of_stdin(value Unit) { + char *Message; + LLVMMemoryBufferRef MemBuf; + + if (LLVMCreateMemoryBufferWithSTDIN(&MemBuf, &Message)) + llvm_raise(llvm_ioerror_exn, Message); + + return MemBuf; +} + +/* llmemorybuffer -> unit */ +CAMLprim value llvm_memorybuffer_dispose(LLVMMemoryBufferRef MemBuf) { + LLVMDisposeMemoryBuffer(MemBuf); + return Val_unit; +} + Modified: llvm/trunk/include/llvm-c/Analysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm-c/Analysis.h?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/include/llvm-c/Analysis.h (original) +++ llvm/trunk/include/llvm-c/Analysis.h Wed Dec 19 16:30:40 2007 @@ -34,13 +34,11 @@ /* Verifies that a module is valid, taking the specified action if not. - Optionally returns a human-readable description of any invalid constructs. */ + Optionally returns a human-readable description of any invalid constructs. + OutMessage must be disposed with LLVMDisposeMessage. */ int LLVMVerifyModule(LLVMModuleRef M, LLVMVerifierFailureAction Action, char **OutMessage); -/* Disposes of the message allocated by the verifier, if any. */ -void LLVMDisposeVerifierMessage(char *Message); - /* Verifies that a single function is valid, taking the specified action. Useful for debugging. */ int LLVMVerifyFunction(LLVMValueRef Fn, LLVMVerifierFailureAction Action); Modified: llvm/trunk/include/llvm-c/BitReader.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm-c/BitReader.h?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/include/llvm-c/BitReader.h (original) +++ llvm/trunk/include/llvm-c/BitReader.h Wed Dec 19 16:30:40 2007 @@ -26,21 +26,18 @@ #endif -/* Reads a module from the specified path, returning a reference to the module - via the OutModule parameter. Returns 0 on success. Optionally returns a - human-readable error message. */ -int LLVMReadBitcodeFromFile(const char *Path, LLVMModuleRef *OutModule, - char **OutMessage); - -/* Reads a module from the specified path, returning a reference to a lazy - module provider via the OutModule parameter. Returns 0 on success. Optionally - returns a human-readable error message. */ -int LLVMCreateModuleProviderFromFile(const char *Path, - LLVMModuleProviderRef *OutMP, - char **OutMessage); - -/* Disposes of the message allocated by the bitcode reader, if any. */ -void LLVMDisposeBitcodeReaderMessage(char *Message); +/* Builds a module from the bitcode in the specified memory buffer, returning a + reference to the module via the OutModule parameter. Returns 0 on success. + Optionally returns a human-readable error message via OutMessage. */ +int LLVMParseBitcode(LLVMMemoryBufferRef MemBuf, + LLVMModuleRef *OutModule, char **OutMessage); + +/* Reads a module from the specified path, returning via the OutMP parameter + a module provider which performs lazy deserialization. Returns 0 on success. + Optionally returns a human-readable error message via OutMessage. */ +int LLVMGetBitcodeModuleProvider(LLVMMemoryBufferRef MemBuf, + LLVMModuleProviderRef *OutMP, + char **OutMessage); #ifdef __cplusplus Modified: llvm/trunk/include/llvm-c/Core.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm-c/Core.h?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/include/llvm-c/Core.h (original) +++ llvm/trunk/include/llvm-c/Core.h Wed Dec 19 16:30:40 2007 @@ -51,8 +51,17 @@ typedef struct LLVMOpaqueValue *LLVMValueRef; typedef struct LLVMOpaqueBasicBlock *LLVMBasicBlockRef; typedef struct LLVMOpaqueBuilder *LLVMBuilderRef; + +/* Used to provide a module to JIT or interpreter. + * See the llvm::ModuleProvider class. + */ typedef struct LLVMOpaqueModuleProvider *LLVMModuleProviderRef; +/* Used to provide a module to JIT or interpreter. + * See the llvm::MemoryBuffer class. + */ +typedef struct LLVMOpaqueMemoryBuffer *LLVMMemoryBufferRef; + typedef enum { LLVMVoidTypeKind, /* type with no size */ LLVMFloatTypeKind, /* 32 bit floating point type */ @@ -129,6 +138,11 @@ } LLVMRealPredicate; +/*===-- Error handling ----------------------------------------------------===*/ + +void LLVMDisposeMessage(char *Message); + + /*===-- Modules -----------------------------------------------------------===*/ /* Create and destroy modules. */ @@ -491,6 +505,7 @@ LLVMValueRef V2, LLVMValueRef Mask, const char *Name); + /*===-- Module providers --------------------------------------------------===*/ /* Encapsulates the module M in a module provider, taking ownership of the @@ -505,28 +520,45 @@ */ void LLVMDisposeModuleProvider(LLVMModuleProviderRef MP); + +/*===-- Memory buffers ----------------------------------------------------===*/ + +int LLVMCreateMemoryBufferWithContentsOfFile(const char *Path, + LLVMMemoryBufferRef *OutMemBuf, + char **OutMessage); +int LLVMCreateMemoryBufferWithSTDIN(LLVMMemoryBufferRef *OutMemBuf, + char **OutMessage); +void LLVMDisposeMemoryBuffer(LLVMMemoryBufferRef MemBuf); + #ifdef __cplusplus } namespace llvm { class ModuleProvider; + class MemoryBuffer; - /* Opaque module conversions - */ - inline Module *unwrap(LLVMModuleRef M) { - return reinterpret_cast(M); - } - - inline LLVMModuleRef wrap(Module *M) { - return reinterpret_cast(M); - } + #define DEFINE_SIMPLE_CONVERSION_FUNCTIONS(ty, ref) \ + inline ty *unwrap(ref P) { \ + return reinterpret_cast(P); \ + } \ + \ + inline ref wrap(const ty *P) { \ + return reinterpret_cast(const_cast(P)); \ + } + + DEFINE_SIMPLE_CONVERSION_FUNCTIONS(Type, LLVMTypeRef ) + DEFINE_SIMPLE_CONVERSION_FUNCTIONS(Value, LLVMValueRef ) + DEFINE_SIMPLE_CONVERSION_FUNCTIONS(Module, LLVMModuleRef ) + DEFINE_SIMPLE_CONVERSION_FUNCTIONS(BasicBlock, LLVMBasicBlockRef ) + DEFINE_SIMPLE_CONVERSION_FUNCTIONS(LLVMBuilder, LLVMBuilderRef ) + DEFINE_SIMPLE_CONVERSION_FUNCTIONS(PATypeHolder, LLVMTypeHandleRef ) + DEFINE_SIMPLE_CONVERSION_FUNCTIONS(ModuleProvider, LLVMModuleProviderRef) + DEFINE_SIMPLE_CONVERSION_FUNCTIONS(MemoryBuffer, LLVMMemoryBufferRef ) - /* Opaque type conversions - */ - inline Type *unwrap(LLVMTypeRef Ty) { - return reinterpret_cast(Ty); - } + #undef DEFINE_SIMPLE_CONVERSION_FUNCTIONS + /* Specialized opaque type conversions. + */ template inline T *unwrap(LLVMTypeRef Ty) { return cast(unwrap(Ty)); @@ -536,20 +568,12 @@ return reinterpret_cast(Tys); } - inline LLVMTypeRef wrap(const Type *Ty) { - return reinterpret_cast(const_cast(Ty)); - } - inline LLVMTypeRef *wrap(const Type **Tys) { return reinterpret_cast(const_cast(Tys)); } - /* Opaque value conversions + /* Specialized opaque value conversions. */ - inline Value *unwrap(LLVMValueRef Val) { - return reinterpret_cast(Val); - } - template inline T *unwrap(LLVMValueRef Val) { return cast(unwrap(Val)); @@ -568,53 +592,9 @@ return reinterpret_cast(Vals); } - inline LLVMValueRef wrap(const Value *Val) { - return reinterpret_cast(const_cast(Val)); - } - inline LLVMValueRef *wrap(const Value **Vals) { return reinterpret_cast(const_cast(Vals)); } - - /* Basic block conversions - */ - inline BasicBlock *unwrap(LLVMBasicBlockRef BBRef) { - return reinterpret_cast(BBRef); - } - - inline LLVMBasicBlockRef wrap(const BasicBlock *BB) { - return reinterpret_cast(const_cast(BB)); - } - - /* Opaque builder conversions. - */ - inline LLVMBuilder *unwrap(LLVMBuilderRef B) { - return reinterpret_cast(B); - } - - inline LLVMBuilderRef wrap(LLVMBuilder *B) { - return reinterpret_cast(B); - } - - /* Opaque type handle conversions. - */ - inline PATypeHolder *unwrap(LLVMTypeHandleRef B) { - return reinterpret_cast(B); - } - - inline LLVMTypeHandleRef wrap(PATypeHolder *B) { - return reinterpret_cast(B); - } - - /* Opaque module provider conversions. - */ - inline ModuleProvider *unwrap(LLVMModuleProviderRef P) { - return reinterpret_cast(P); - } - - inline LLVMModuleProviderRef wrap(ModuleProvider *P) { - return reinterpret_cast(P); - } } #endif /* !defined(__cplusplus) */ Modified: llvm/trunk/lib/Analysis/Analysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/Analysis.cpp?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/Analysis.cpp (original) +++ llvm/trunk/lib/Analysis/Analysis.cpp Wed Dec 19 16:30:40 2007 @@ -27,10 +27,6 @@ return Result; } -void LLVMDisposeVerifierMessage(char *Message) { - free(Message); -} - int LLVMVerifyFunction(LLVMValueRef Fn, LLVMVerifierFailureAction Action) { return verifyFunction(*unwrap(Fn), static_cast(Action)); Modified: llvm/trunk/lib/Bitcode/Reader/BitReader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitReader.cpp?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitReader.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/BitReader.cpp Wed Dec 19 16:30:40 2007 @@ -14,20 +14,33 @@ using namespace llvm; - -int LLVMReadBitcodeFromFile(const char *Path, LLVMModuleRef *OutModule, - char **OutMessage) { +/* Builds a module from the bitcode in the specified memory buffer, returning a + reference to the module via the OutModule parameter. Returns 0 on success. + Optionally returns a human-readable error message via OutMessage. */ +int LLVMParseBitcode(LLVMMemoryBufferRef MemBuf, + LLVMModuleRef *OutModule, char **OutMessage) { std::string Message; - MemoryBuffer *buf = MemoryBuffer::getFile(Path, strlen(Path), &Message); - if (!buf) { - if (!OutMessage) + *OutModule = wrap(ParseBitcodeFile(unwrap(MemBuf), &Message)); + if (!*OutModule) { + if (OutMessage) *OutMessage = strdup(Message.c_str()); return 1; } - *OutModule = wrap(ParseBitcodeFile(buf, &Message)); - if (!*OutModule) { + return 0; +} + +/* Reads a module from the specified path, returning via the OutModule parameter + a module provider which performs lazy deserialization. Returns 0 on success. + Optionally returns a human-readable error message via OutMessage. */ +int LLVMGetBitcodeModuleProvider(LLVMMemoryBufferRef MemBuf, + LLVMModuleProviderRef *OutMP, + char **OutMessage) { + std::string Message; + + *OutMP = wrap(getBitcodeModuleProvider(unwrap(MemBuf), &Message)); + if (!*OutMP) { if (OutMessage) *OutMessage = strdup(Message.c_str()); return 1; @@ -35,8 +48,3 @@ return 0; } - -void LLVMDisposeBitcodeReaderMessage(char *Message) { - if (Message) - free(Message); -} Modified: llvm/trunk/lib/VMCore/Core.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Core.cpp?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Core.cpp (original) +++ llvm/trunk/lib/VMCore/Core.cpp Wed Dec 19 16:30:40 2007 @@ -19,11 +19,20 @@ #include "llvm/GlobalVariable.h" #include "llvm/TypeSymbolTable.h" #include "llvm/ModuleProvider.h" +#include "llvm/Support/MemoryBuffer.h" #include +#include using namespace llvm; +/*===-- Error handling ----------------------------------------------------===*/ + +void LLVMDisposeMessage(char *Message) { + free(Message); +} + + /*===-- Operations on modules ---------------------------------------------===*/ LLVMModuleRef LLVMModuleCreateWithName(const char *ModuleID) { @@ -1048,3 +1057,33 @@ delete unwrap(MP); } + +/*===-- Memory buffers ----------------------------------------------------===*/ + +int LLVMCreateMemoryBufferWithContentsOfFile(const char *Path, + LLVMMemoryBufferRef *OutMemBuf, + char **OutMessage) { + std::string Error; + if (MemoryBuffer *MB = MemoryBuffer::getFile(Path, strlen(Path), &Error)) { + *OutMemBuf = wrap(MB); + return 0; + } + + *OutMessage = strdup(Error.c_str()); + return 1; +} + +int LLVMCreateMemoryBufferWithSTDIN(LLVMMemoryBufferRef *OutMemBuf, + char **OutMessage) { + if (MemoryBuffer *MB = MemoryBuffer::getSTDIN()) { + *OutMemBuf = wrap(MB); + return 0; + } + + *OutMessage = strdup("stdin is empty."); + return 1; +} + +void LLVMDisposeMemoryBuffer(LLVMMemoryBufferRef MemBuf) { + delete unwrap(MemBuf); +} Modified: llvm/trunk/test/Bindings/Ocaml/bitreader.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bindings/Ocaml/bitreader.ml?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/test/Bindings/Ocaml/bitreader.ml (original) +++ llvm/trunk/test/Bindings/Ocaml/bitreader.ml Wed Dec 19 16:30:40 2007 @@ -18,6 +18,58 @@ Llvm.dispose_module m; - test (match Llvm_bitreader.read_bitcode_file fn with - | Llvm_bitreader.Bitreader_success m -> Llvm.dispose_module m; true - | Llvm_bitreader.Bitreader_failure _ -> false) + (* parse_bitcode *) + begin + let mb = Llvm.MemoryBuffer.of_file fn in + begin try + let m = Llvm_bitreader.parse_bitcode mb in + Llvm.dispose_module m + with x -> + Llvm.MemoryBuffer.dispose; + raise x + end + end; + + (* MemoryBuffer.of_file *) + test begin try + let mb = Llvm.MemoryBuffer.of_file (fn ^ ".bogus") in + Llvm.MemoryBuffer.dispose mb; + false + with Llvm.IoError _ -> + true + end; + + (* get_module_provider *) + begin + let mb = Llvm.MemoryBuffer.of_file fn in + let mp = begin try + Llvm_bitreader.get_module_provider mb + with x -> + Llvm.MemoryBuffer.dispose mb; + raise x + end in + Llvm.ModuleProvider.dispose mp + end; + + (* corrupt the bitcode *) + let fn = fn ^ ".txt" in + begin let oc = open_out fn in + output_string oc "not a bitcode file\n"; + close_out oc + end; + + (* test get_module_provider exceptions *) + test begin + try + let mb = Llvm.MemoryBuffer.of_file fn in + let mp = begin try + Llvm_bitreader.get_module_provider mb + with x -> + Llvm.MemoryBuffer.dispose mb; + raise x + end in + Llvm.ModuleProvider.dispose mp; + false + with Llvm_bitreader.Error _ -> + true + end Modified: llvm/trunk/test/Bindings/Ocaml/vmcore.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bindings/Ocaml/vmcore.ml?rev=45226&r1=45225&r2=45226&view=diff ============================================================================== --- llvm/trunk/test/Bindings/Ocaml/vmcore.ml (original) +++ llvm/trunk/test/Bindings/Ocaml/vmcore.ml Wed Dec 19 16:30:40 2007 @@ -805,8 +805,8 @@ let test_module_provider () = let m = create_module "test" in - let mp = create_module_provider m in - dispose_module_provider mp + let mp = ModuleProvider.create m in + ModuleProvider.dispose mp (*===-- Writer ------------------------------------------------------------===*) From gordonhenriksen at mac.com Wed Dec 19 16:54:12 2007 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Wed, 19 Dec 2007 22:54:12 -0000 Subject: [llvm-commits] [llvm] r45229 - in /llvm/trunk: bindings/ocaml/llvm/llvm.ml bindings/ocaml/llvm/llvm.mli bindings/ocaml/llvm/llvm_ocaml.c test/Bindings/Ocaml/vmcore.ml Message-ID: <200712192254.lBJMsCqQ004642@zion.cs.uiuc.edu> Author: gordon Date: Wed Dec 19 16:54:12 2007 New Revision: 45229 URL: http://llvm.org/viewvc/llvm-project?rev=45229&view=rev Log: Using modules to group enumerations in Ocaml bindings. Modified: llvm/trunk/bindings/ocaml/llvm/llvm.ml llvm/trunk/bindings/ocaml/llvm/llvm.mli llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c llvm/trunk/test/Bindings/Ocaml/vmcore.ml Modified: llvm/trunk/bindings/ocaml/llvm/llvm.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm.ml?rev=45229&r1=45228&r2=45229&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm.ml (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm.ml Wed Dec 19 16:54:12 2007 @@ -17,37 +17,43 @@ type llmoduleprovider type llmemorybuffer -type type_kind = - Void_type -| Float_type -| Double_type -| X86fp80_type -| Fp128_type -| Ppc_fp128_type -| Label_type -| Integer_type -| Function_type -| Struct_type -| Array_type -| Pointer_type -| Opaque_type -| Vector_type - -type linkage = - External_linkage -| Link_once_linkage -| Weak_linkage -| Appending_linkage -| Internal_linkage -| Dllimport_linkage -| Dllexport_linkage -| External_weak_linkage -| Ghost_linkage - -type visibility = - Default_visibility -| Hidden_visibility -| Protected_visibility +module TypeKind = struct + type t = + | Void + | Float + | Double + | X86fp80 + | Fp128 + | Ppc_fp128 + | Label + | Integer + | Function + | Struct + | Array + | Pointer + | Opaque + | Vector +end + +module Linkage = struct + type t = + | External + | Link_once + | Weak + | Appending + | Internal + | Dllimport + | Dllexport + | External_weak + | Ghost +end + +module Visibility = struct + type t = + | Default + | Hidden + | Protected +end let ccc = 0 let fastcc = 8 @@ -55,35 +61,39 @@ let x86_stdcallcc = 64 let x86_fastcallcc = 65 -type int_predicate = - Icmp_eq -| Icmp_ne -| Icmp_ugt -| Icmp_uge -| Icmp_ult -| Icmp_ule -| Icmp_sgt -| Icmp_sge -| Icmp_slt -| Icmp_sle - -type real_predicate = - Fcmp_false -| Fcmp_oeq -| Fcmp_ogt -| Fcmp_oge -| Fcmp_olt -| Fcmp_ole -| Fcmp_one -| Fcmp_ord -| Fcmp_uno -| Fcmp_ueq -| Fcmp_ugt -| Fcmp_uge -| Fcmp_ult -| Fcmp_ule -| Fcmp_une -| Fcmp_true +module Icmp = struct + type t = + | Eq + | Ne + | Ugt + | Uge + | Ult + | Ule + | Sgt + | Sge + | Slt + | Sle +end + +module Fcmp = struct + type t = + | False + | Oeq + | Ogt + | Oge + | Olt + | Ole + | One + | Ord + | Uno + | Ueq + | Ugt + | Uge + | Ult + | Ule + | Une + | True +end exception IoError of string @@ -103,7 +113,7 @@ (*===-- Types -------------------------------------------------------------===*) -external classify_type : lltype -> type_kind = "llvm_classify_type" +external classify_type : lltype -> TypeKind.t = "llvm_classify_type" (*--... Operations on integer types ........................................--*) external _i1_type : unit -> lltype = "llvm_i1_type" @@ -220,9 +230,9 @@ external const_and : llvalue -> llvalue -> llvalue = "LLVMConstAnd" external const_or : llvalue -> llvalue -> llvalue = "LLVMConstOr" external const_xor : llvalue -> llvalue -> llvalue = "LLVMConstXor" -external const_icmp : int_predicate -> llvalue -> llvalue -> llvalue +external const_icmp : Icmp.t -> llvalue -> llvalue -> llvalue = "llvm_const_icmp" -external const_fcmp : real_predicate -> llvalue -> llvalue -> llvalue +external const_fcmp : Fcmp.t -> llvalue -> llvalue -> llvalue = "llvm_const_fcmp" external const_shl : llvalue -> llvalue -> llvalue = "LLVMConstShl" external const_lshr : llvalue -> llvalue -> llvalue = "LLVMConstLShr" @@ -251,12 +261,12 @@ (*--... Operations on global variables, functions, and aliases (globals) ...--*) external is_declaration : llvalue -> bool = "llvm_is_declaration" -external linkage : llvalue -> linkage = "llvm_linkage" -external set_linkage : linkage -> llvalue -> unit = "llvm_set_linkage" +external linkage : llvalue -> Linkage.t = "llvm_linkage" +external set_linkage : Linkage.t -> llvalue -> unit = "llvm_set_linkage" external section : llvalue -> string = "llvm_section" external set_section : string -> llvalue -> unit = "llvm_set_section" -external visibility : llvalue -> visibility = "llvm_visibility" -external set_visibility : visibility -> llvalue -> unit = "llvm_set_visibility" +external visibility : llvalue -> Visibility.t = "llvm_visibility" +external set_visibility : Visibility.t -> llvalue -> unit = "llvm_set_visibility" external alignment : llvalue -> int = "llvm_alignment" external set_alignment : int -> llvalue -> unit = "llvm_set_alignment" external is_global_constant : llvalue -> bool = "llvm_is_global_constant" @@ -415,9 +425,9 @@ = "llvm_build_bitcast" (*--... Comparisons ........................................................--*) -external build_icmp : int_predicate -> llvalue -> llvalue -> string -> +external build_icmp : Icmp.t -> llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_icmp" -external build_fcmp : real_predicate -> llvalue -> llvalue -> string -> +external build_fcmp : Fcmp.t -> llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_fcmp" (*--... Miscellaneous instructions .........................................--*) @@ -471,28 +481,28 @@ let rec string_of_lltype ty = (* FIXME: stop infinite recursion! :) *) match classify_type ty with - Integer_type -> "i" ^ string_of_int (integer_bitwidth ty) - | Pointer_type -> (string_of_lltype (element_type ty)) ^ "*" - | Struct_type -> + TypeKind.Integer -> "i" ^ string_of_int (integer_bitwidth ty) + | TypeKind.Pointer -> (string_of_lltype (element_type ty)) ^ "*" + | TypeKind.Struct -> let s = "{ " ^ (concat2 ", " ( Array.map string_of_lltype (element_types ty) )) ^ " }" in if is_packed ty then "<" ^ s ^ ">" else s - | Array_type -> "[" ^ (string_of_int (array_length ty)) ^ - " x " ^ (string_of_lltype (element_type ty)) ^ "]" - | Vector_type -> "<" ^ (string_of_int (vector_size ty)) ^ - " x " ^ (string_of_lltype (element_type ty)) ^ ">" - | Opaque_type -> "opaque" - | Function_type -> string_of_lltype (return_type ty) ^ - " (" ^ (concat2 ", " ( - Array.map string_of_lltype (param_types ty) - )) ^ ")" - | Label_type -> "label" - | Ppc_fp128_type -> "ppc_fp128" - | Fp128_type -> "fp128" - | X86fp80_type -> "x86_fp80" - | Double_type -> "double" - | Float_type -> "float" - | Void_type -> "void" + | TypeKind.Array -> "[" ^ (string_of_int (array_length ty)) ^ + " x " ^ (string_of_lltype (element_type ty)) ^ "]" + | TypeKind.Vector -> "<" ^ (string_of_int (vector_size ty)) ^ + " x " ^ (string_of_lltype (element_type ty)) ^ ">" + | TypeKind.Opaque -> "opaque" + | TypeKind.Function -> string_of_lltype (return_type ty) ^ + " (" ^ (concat2 ", " ( + Array.map string_of_lltype (param_types ty) + )) ^ ")" + | TypeKind.Label -> "label" + | TypeKind.Ppc_fp128 -> "ppc_fp128" + | TypeKind.Fp128 -> "fp128" + | TypeKind.X86fp80 -> "x86_fp80" + | TypeKind.Double -> "double" + | TypeKind.Float -> "float" + | TypeKind.Void -> "void" Modified: llvm/trunk/bindings/ocaml/llvm/llvm.mli URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm.mli?rev=45229&r1=45228&r2=45229&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm.mli (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm.mli Wed Dec 19 16:54:12 2007 @@ -50,41 +50,47 @@ (** The kind of an [lltype], the result of [classify_type ty]. See the [llvm::Type::TypeID] enumeration. **) -type type_kind = - Void_type -| Float_type -| Double_type -| X86fp80_type -| Fp128_type -| Ppc_fp128_type -| Label_type -| Integer_type -| Function_type -| Struct_type -| Array_type -| Pointer_type -| Opaque_type -| Vector_type +module TypeKind : sig + type t = + Void + | Float + | Double + | X86fp80 + | Fp128 + | Ppc_fp128 + | Label + | Integer + | Function + | Struct + | Array + | Pointer + | Opaque + | Vector +end (** The linkage of a global value, accessed with [linkage gv] and [set_linkage l gv]. See [llvm::GlobalValue::LinkageTypes]. **) -type linkage = - External_linkage -| Link_once_linkage -| Weak_linkage -| Appending_linkage -| Internal_linkage -| Dllimport_linkage -| Dllexport_linkage -| External_weak_linkage -| Ghost_linkage +module Linkage : sig + type t = + External + | Link_once + | Weak + | Appending + | Internal + | Dllimport + | Dllexport + | External_weak + | Ghost +end (** The linker visibility of a global value, accessed with [visibility gv] and [set_visibility v gv]. See [llvm::GlobalValue::VisibilityTypes]. **) -type visibility = - Default_visibility -| Hidden_visibility -| Protected_visibility +module Visibility : sig + type t = + Default + | Hidden + | Protected +end (* The following calling convention values may be accessed with [function_call_conv f] and [set_function_call_conv conv f]. Calling @@ -102,37 +108,41 @@ (** The predicate for an integer comparison ([icmp]) instruction. See the [llvm::ICmpInst::Predicate] enumeration. **) -type int_predicate = - Icmp_eq -| Icmp_ne -| Icmp_ugt -| Icmp_uge -| Icmp_ult -| Icmp_ule -| Icmp_sgt -| Icmp_sge -| Icmp_slt -| Icmp_sle +module Icmp : sig + type t = + | Eq + | Ne + | Ugt + | Uge + | Ult + | Ule + | Sgt + | Sge + | Slt + | Sle +end (** The predicate for a floating-point comparison ([fcmp]) instruction. See the [llvm::FCmpInst::Predicate] enumeration. **) -type real_predicate = - Fcmp_false -| Fcmp_oeq -| Fcmp_ogt -| Fcmp_oge -| Fcmp_olt -| Fcmp_ole -| Fcmp_one -| Fcmp_ord -| Fcmp_uno -| Fcmp_ueq -| Fcmp_ugt -| Fcmp_uge -| Fcmp_ult -| Fcmp_ule -| Fcmp_une -| Fcmp_true +module Fcmp : sig + type t = + | False + | Oeq + | Ogt + | Oge + | Olt + | Ole + | One + | Ord + | Uno + | Ueq + | Ugt + | Uge + | Ult + | Ule + | Une + | True +end exception IoError of string @@ -167,7 +177,7 @@ (** [classify_type ty] returns the [type_kind] corresponding to the type [ty]. See the method [llvm::Type::getTypeID]. **) -external classify_type : lltype -> type_kind = "llvm_classify_type" +external classify_type : lltype -> TypeKind.t = "llvm_classify_type" (** [string_of_lltype ty] returns a string describing the type [ty]. **) val string_of_lltype : lltype -> string @@ -504,13 +514,13 @@ (** [const_icmp pred c1 c2] returns the constant comparison of two integer constants, [c1 pred c2]. See the method [llvm::ConstantExpr::getICmp]. **) -external const_icmp : int_predicate -> llvalue -> llvalue -> llvalue +external const_icmp : Icmp.t -> llvalue -> llvalue -> llvalue = "llvm_const_icmp" (** [const_fcmp pred c1 c2] returns the constant comparison of two floating point constants, [c1 pred c2]. See the method [llvm::ConstantExpr::getFCmp]. **) -external const_fcmp : real_predicate -> llvalue -> llvalue -> llvalue +external const_fcmp : Fcmp.t -> llvalue -> llvalue -> llvalue = "llvm_const_fcmp" (** [const_shl c1 c2] returns the constant integer [c1] left-shifted by the @@ -631,11 +641,11 @@ (** [linkage g] returns the linkage of the global value [g]. See the method [llvm::GlobalValue::getLinkage]. **) -external linkage : llvalue -> linkage = "llvm_linkage" +external linkage : llvalue -> Linkage.t = "llvm_linkage" (** [set_linkage l g] sets the linkage of the global value [g] to [l]. See the method [llvm::GlobalValue::setLinkage]. **) -external set_linkage : linkage -> llvalue -> unit = "llvm_set_linkage" +external set_linkage : Linkage.t -> llvalue -> unit = "llvm_set_linkage" (** [section g] returns the linker section of the global value [g]. See the method [llvm::GlobalValue::getSection]. **) @@ -647,11 +657,12 @@ (** [visibility g] returns the linker visibility of the global value [g]. See the method [llvm::GlobalValue::getVisibility]. **) -external visibility : llvalue -> visibility = "llvm_visibility" +external visibility : llvalue -> Visibility.t = "llvm_visibility" (** [set_visibility v g] sets the linker visibility of the global value [g] to [v]. See the method [llvm::GlobalValue::setVisibility]. **) -external set_visibility : visibility -> llvalue -> unit = "llvm_set_visibility" +external set_visibility : Visibility.t -> llvalue -> unit + = "llvm_set_visibility" (** [alignment g] returns the required alignment of the global value [g]. See the method [llvm::GlobalValue::getAlignment]. **) @@ -1177,14 +1188,14 @@ [%name = icmp %pred %x, %y] instruction at the position specified by the instruction builder [b]. See the method [llvm::LLVMBuilder::CreateICmp]. **) -external build_icmp : int_predicate -> llvalue -> llvalue -> string -> +external build_icmp : Icmp.t -> llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_icmp" (** [build_fcmp pred x y name b] creates a [%name = fcmp %pred %x, %y] instruction at the position specified by the instruction builder [b]. See the method [llvm::LLVMBuilder::CreateFCmp]. **) -external build_fcmp : real_predicate -> llvalue -> llvalue -> string -> +external build_fcmp : Fcmp.t -> llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_fcmp" (*--... Miscellaneous instructions .........................................--*) Modified: llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c?rev=45229&r1=45228&r2=45229&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c Wed Dec 19 16:54:12 2007 @@ -77,7 +77,7 @@ /*===-- Types -------------------------------------------------------------===*/ -/* lltype -> type_kind */ +/* lltype -> TypeKind.t */ CAMLprim value llvm_classify_type(LLVMTypeRef Ty) { return Val_int(LLVMGetTypeKind(Ty)); } @@ -361,14 +361,14 @@ /*--... Constant expressions ...............................................--*/ -/* int_predicate -> llvalue -> llvalue -> llvalue */ +/* Icmp.t -> llvalue -> llvalue -> llvalue */ CAMLprim LLVMValueRef llvm_const_icmp(value Pred, LLVMValueRef LHSConstant, LLVMValueRef RHSConstant) { return LLVMConstICmp(Int_val(Pred) + LLVMIntEQ, LHSConstant, RHSConstant); } -/* real_predicate -> llvalue -> llvalue -> llvalue */ +/* Fcmp.t -> llvalue -> llvalue -> llvalue */ CAMLprim LLVMValueRef llvm_const_fcmp(value Pred, LLVMValueRef LHSConstant, LLVMValueRef RHSConstant) { @@ -388,12 +388,12 @@ return Val_bool(LLVMIsDeclaration(Global)); } -/* llvalue -> linkage */ +/* llvalue -> Linkage.t */ CAMLprim value llvm_linkage(LLVMValueRef Global) { return Val_int(LLVMGetLinkage(Global)); } -/* linkage -> llvalue -> unit */ +/* Linkage.t -> llvalue -> unit */ CAMLprim value llvm_set_linkage(value Linkage, LLVMValueRef Global) { LLVMSetLinkage(Global, Int_val(Linkage)); return Val_unit; @@ -410,12 +410,12 @@ return Val_unit; } -/* llvalue -> visibility */ +/* llvalue -> Visibility.t */ CAMLprim value llvm_visibility(LLVMValueRef Global) { return Val_int(LLVMGetVisibility(Global)); } -/* visibility -> llvalue -> unit */ +/* Visibility.t -> llvalue -> unit */ CAMLprim value llvm_set_visibility(value Viz, LLVMValueRef Global) { LLVMSetVisibility(Global, Int_val(Viz)); return Val_unit; @@ -1006,7 +1006,7 @@ /*--... Comparisons ........................................................--*/ -/* int_predicate -> llvalue -> llvalue -> string -> llbuilder -> llvalue */ +/* Icmp.t -> llvalue -> llvalue -> string -> llbuilder -> llvalue */ CAMLprim LLVMValueRef llvm_build_icmp(value Pred, LLVMValueRef LHS, LLVMValueRef RHS, value Name, value B) { @@ -1014,7 +1014,7 @@ String_val(Name)); } -/* real_predicate -> llvalue -> llvalue -> string -> llbuilder -> llvalue */ +/* Fcmp.t -> llvalue -> llvalue -> string -> llbuilder -> llvalue */ CAMLprim LLVMValueRef llvm_build_fcmp(value Pred, LLVMValueRef LHS, LLVMValueRef RHS, value Name, value B) { Modified: llvm/trunk/test/Bindings/Ocaml/vmcore.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bindings/Ocaml/vmcore.ml?rev=45229&r1=45228&r2=45229&view=diff ============================================================================== --- llvm/trunk/test/Bindings/Ocaml/vmcore.ml (original) +++ llvm/trunk/test/Bindings/Ocaml/vmcore.ml Wed Dec 19 16:54:12 2007 @@ -21,10 +21,7 @@ let insist cond = incr case_num; - let msg = if cond then " pass " else begin - exit_status := 10; - " FAIL " - end in + if not cond then exit_status := 10; prerr_endline (" " ^ (string_of_int !case_num) ^ if cond then "" else " FAIL") @@ -46,13 +43,13 @@ *) group "void"; insist (define_type_name "Ty01" void_type m); - insist (Void_type == classify_type void_type); + insist (TypeKind.Void == classify_type void_type); (* RUN: grep {Ty02.*i1} < %t.ll *) group "i1"; insist (define_type_name "Ty02" i1_type m); - insist (Integer_type == classify_type i1_type); + insist (TypeKind.Integer == classify_type i1_type); (* RUN: grep {Ty03.*i32} < %t.ll *) @@ -69,20 +66,20 @@ *) group "float"; insist (define_type_name "Ty05" float_type m); - insist (Float_type == classify_type float_type); + insist (TypeKind.Float == classify_type float_type); (* RUN: grep {Ty06.*double} < %t.ll *) group "double"; insist (define_type_name "Ty06" double_type m); - insist (Double_type == classify_type double_type); + insist (TypeKind.Double == classify_type double_type); (* RUN: grep {Ty07.*i32.*i1, double} < %t.ll *) group "function"; let ty = function_type i32_type [| i1_type; double_type |] in insist (define_type_name "Ty07" ty m); - insist (Function_type = classify_type ty); + insist (TypeKind.Function = classify_type ty); insist (not (is_var_arg ty)); insist (i32_type == return_type ty); insist (double_type == (param_types ty).(1)); @@ -101,7 +98,7 @@ insist (define_type_name "Ty09" ty m); insist (7 = array_length ty); insist (i8_type == element_type ty); - insist (Array_type == classify_type ty); + insist (TypeKind.Array == classify_type ty); begin group "pointer"; (* RUN: grep {UnqualPtrTy.*float\*} < %t.ll @@ -110,7 +107,7 @@ insist (define_type_name "UnqualPtrTy" ty m); insist (float_type == element_type ty); insist (0 == address_space ty); - insist (Pointer_type == classify_type ty) + insist (TypeKind.Pointer == classify_type ty) end; begin group "qualified_pointer"; @@ -289,8 +286,8 @@ ignore (define_global "ConstAnd" (const_and foldbomb five) m); ignore (define_global "ConstOr" (const_or foldbomb five) m); ignore (define_global "ConstXor" (const_xor foldbomb five) m); - ignore (define_global "ConstICmp" (const_icmp Icmp_sle foldbomb five) m); - ignore (define_global "ConstFCmp" (const_fcmp Fcmp_ole ffoldbomb ffive) m); + ignore (define_global "ConstICmp" (const_icmp Icmp.Sle foldbomb five) m); + ignore (define_global "ConstFCmp" (const_fcmp Fcmp.Ole ffoldbomb ffive) m); group "constant casts"; (* RUN: grep {ConstTrunc.*trunc} < %t.ll @@ -336,7 +333,7 @@ ignore (define_global "ConstSizeOf" (size_of (pointer_type i8_type)) m); ignore (define_global "ConstGEP" (const_gep foldbomb_gv [| five |]) m); ignore (define_global "ConstSelect" (const_select - (const_icmp Icmp_sle foldbomb five) + (const_icmp Icmp.Sle foldbomb five) (const_int i8_type (-1)) (const_int i8_type 0)) m); let zero = const_int i32_type 0 in @@ -371,8 +368,8 @@ *) group "linkage"; let g = define_global "GVal02" zero32 m ++ - set_linkage Link_once_linkage in - insist (Link_once_linkage = linkage g); + set_linkage Linkage.Link_once in + insist (Linkage.Link_once = linkage g); (* RUN: grep {GVal03.*Hanalei} < %t.ll *) @@ -385,8 +382,8 @@ *) group "visibility"; let g = define_global "GVal04" zero32 m ++ - set_visibility Hidden_visibility in - insist (Hidden_visibility = visibility g); + set_visibility Visibility.Hidden in + insist (Visibility.Hidden = visibility g); (* RUN: grep {GVal05.*align 128} < %t.ll *) @@ -745,10 +742,10 @@ * RUN: grep {Inst42.*fcmp.*false.*F1.*F2} < %t.ll * RUN: grep {Inst43.*fcmp.*true.*F2.*F1} < %t.ll *) - ignore (build_icmp Icmp_ne p1 p2 "Inst40" atentry); - ignore (build_icmp Icmp_sle p2 p1 "Inst41" atentry); - ignore (build_fcmp Fcmp_false f1 f2 "Inst42" atentry); - ignore (build_fcmp Fcmp_true f2 f1 "Inst43" atentry) + ignore (build_icmp Icmp.Ne p1 p2 "Inst40" atentry); + ignore (build_icmp Icmp.Sle p2 p1 "Inst41" atentry); + ignore (build_fcmp Fcmp.False f1 f2 "Inst42" atentry); + ignore (build_fcmp Fcmp.True f2 f1 "Inst43" atentry) end; group "miscellaneous"; begin @@ -760,7 +757,7 @@ * RUN: grep {Inst51.*shufflevector.*Vec1.*Vec2.*1.*1.*0.*0} < %t.ll *) ignore (build_call fn [| p2; p1 |] "Inst45" atentry); - let inst46 = build_icmp Icmp_eq p1 p2 "Inst46" atentry in + let inst46 = build_icmp Icmp.Eq p1 p2 "Inst46" atentry in ignore (build_select inst46 p1 p2 "Inst47" atentry); ignore (build_va_arg (const_null (pointer_type (pointer_type i8_type))) From clattner at apple.com Wed Dec 19 17:14:43 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 19 Dec 2007 15:14:43 -0800 Subject: [llvm-commits] [llvm] r45221 - /llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp In-Reply-To: <1198103150.10758.109.camel@asl.dorms.spbu.ru> References: <200712192154.lBJLsbsA001971@zion.cs.uiuc.edu> <1198103150.10758.109.camel@asl.dorms.spbu.ru> Message-ID: On Dec 19, 2007, at 2:25 PM, Anton Korobeynikov wrote: > Chris, > >> Nice! What is the magic needed to trick it into doing this? I'd >> like the nightly testers to do this. If you tell me the majik, I can >> try to hook it up to happen automatically. > Usual magic is to generate .S file and compile/link it with native g++ Is there a -L flag that can be passed? IIRC, llvm-test links apps with gcc -lstdc++ etc. It would be relatively easy to make this do something different for powerpc. -Chris From evan.cheng at apple.com Wed Dec 19 17:33:24 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 19 Dec 2007 23:33:24 -0000 Subject: [llvm-commits] [llvm] r45230 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Message-ID: <200712192333.lBJNXOv4006358@zion.cs.uiuc.edu> Author: evancheng Date: Wed Dec 19 17:33:23 2007 New Revision: 45230 URL: http://llvm.org/viewvc/llvm-project?rev=45230&view=rev Log: Allow iv reuse if the user is a PHI node which is in turn used as addresses. Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=45230&r1=45229&r2=45230&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Wed Dec 19 17:33:23 2007 @@ -34,6 +34,7 @@ #include "llvm/ADT/SmallPtrSet.h" #include "llvm/ADT/Statistic.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/CommandLine.h" #include "llvm/Support/Compiler.h" #include "llvm/Target/TargetLowering.h" #include @@ -46,6 +47,12 @@ STATISTIC(NumEliminated , "Number of strides eliminated"); namespace { + // Hidden options for help debugging. + cl::opt AllowPHIIVReuse("lsr-allow-phi-iv-reuse", + cl::init(true), cl::Hidden); +} + +namespace { struct BasedUser; @@ -980,6 +987,9 @@ bool LoopStrengthReduce::ValidStride(bool HasBaseReg, int64_t Scale, const std::vector& UsersToProcess) { + if (!TLI) + return true; + for (unsigned i=0, e = UsersToProcess.size(); i!=e; ++i) { // If this is a load or other access, pass the type of the access in. const Type *AccessTy = Type::VoidTy; @@ -987,6 +997,8 @@ AccessTy = SI->getOperand(0)->getType(); else if (LoadInst *LI = dyn_cast(UsersToProcess[i].Inst)) AccessTy = LI->getType(); + else if (PHINode *PN = dyn_cast(UsersToProcess[i].Inst)) + AccessTy = PN->getType(); TargetLowering::AddrMode AM; if (SCEVConstant *SC = dyn_cast(UsersToProcess[i].Imm)) @@ -995,7 +1007,7 @@ AM.Scale = Scale; // If load[imm+r*scale] is illegal, bail out. - if (TLI && !TLI->isLegalAddressingMode(AM, AccessTy)) + if (!TLI->isLegalAddressingMode(AM, AccessTy)) return false; } return true; @@ -1081,6 +1093,67 @@ return SC->getValue()->getValue().isNegative(); } +/// isAddress - Returns true if the specified instruction is using the +/// specified value as an address. +static bool isAddressUse(Instruction *Inst, Value *OperandVal) { + bool isAddress = isa(Inst); + if (StoreInst *SI = dyn_cast(Inst)) { + if (SI->getOperand(1) == OperandVal) + isAddress = true; + } else if (IntrinsicInst *II = dyn_cast(Inst)) { + // Addressing modes can also be folded into prefetches and a variety + // of intrinsics. + switch (II->getIntrinsicID()) { + default: break; + case Intrinsic::prefetch: + case Intrinsic::x86_sse2_loadu_dq: + case Intrinsic::x86_sse2_loadu_pd: + case Intrinsic::x86_sse_loadu_ps: + case Intrinsic::x86_sse_storeu_ps: + case Intrinsic::x86_sse2_storeu_pd: + case Intrinsic::x86_sse2_storeu_dq: + case Intrinsic::x86_sse2_storel_dq: + if (II->getOperand(1) == OperandVal) + isAddress = true; + break; + case Intrinsic::x86_sse2_loadh_pd: + case Intrinsic::x86_sse2_loadl_pd: + if (II->getOperand(2) == OperandVal) + isAddress = true; + break; + } + } + return isAddress; +} + +/// isAddressUsePHI - Returns if all uses of the specified PHI node are using +/// the PHI node value as an address. +static void isAddressUsePHI(Instruction *Inst, + SmallPtrSet &Processed, + bool &Result) { + if (!Result || !Processed.insert(Inst)) + return; + + for (Value::use_iterator UI = Inst->use_begin(), E = Inst->use_end(); + UI != E; ++UI) { + Instruction *User = cast(*UI); + if (isa(User) && !Processed.count(User)) { + bool ThisResult = true; + isAddressUsePHI(User, Processed, ThisResult); + if (!ThisResult) { + Result = false; + return; + } + continue; + } + + if (!isAddressUse(User, cast(Inst))) { + Result = false; + return; + } + } +} + // CollectIVUsers - Transform our list of users and offsets to a bit more // complex table. In this new vector, each 'BasedUser' contains 'Base' the base // of the strided accessas well as the old information from Uses. We @@ -1131,37 +1204,17 @@ // Addressing modes can be folded into loads and stores. Be careful that // the store is through the expression, not of the expression though. - bool isAddress = isa(UsersToProcess[i].Inst); - if (StoreInst *SI = dyn_cast(UsersToProcess[i].Inst)) { - if (SI->getOperand(1) == UsersToProcess[i].OperandValToReplace) - isAddress = true; - } else if (IntrinsicInst *II = - dyn_cast(UsersToProcess[i].Inst)) { - // Addressing modes can also be folded into prefetches and a variety - // of intrinsics. - switch (II->getIntrinsicID()) { - default: break; - case Intrinsic::prefetch: - case Intrinsic::x86_sse2_loadu_dq: - case Intrinsic::x86_sse2_loadu_pd: - case Intrinsic::x86_sse_loadu_ps: - case Intrinsic::x86_sse_storeu_ps: - case Intrinsic::x86_sse2_storeu_pd: - case Intrinsic::x86_sse2_storeu_dq: - case Intrinsic::x86_sse2_storel_dq: - if (II->getOperand(1) == UsersToProcess[i].OperandValToReplace) - isAddress = true; - break; - case Intrinsic::x86_sse2_loadh_pd: - case Intrinsic::x86_sse2_loadl_pd: - if (II->getOperand(2) == UsersToProcess[i].OperandValToReplace) - isAddress = true; - break; - } + bool isPtrPHI = false; + bool isAddress = isAddressUse(UsersToProcess[i].Inst, + UsersToProcess[i].OperandValToReplace); + if (isa(UsersToProcess[i].Inst)) { + SmallPtrSet Processed; + isPtrPHI = true; + isAddressUsePHI(UsersToProcess[i].Inst, Processed, isPtrPHI); } // If this use isn't an address, then not all uses are addresses. - if (!isAddress) + if (!isAddress && !(AllowPHIIVReuse && isPtrPHI)) AllUsesAreAddresses = false; MoveImmediateValues(TLI, UsersToProcess[i].Inst, UsersToProcess[i].Base, From dalej at apple.com Wed Dec 19 17:37:34 2007 From: dalej at apple.com (Dale Johannesen) Date: Wed, 19 Dec 2007 15:37:34 -0800 Subject: [llvm-commits] [llvm] r45221 - /llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp In-Reply-To: <1198103150.10758.109.camel@asl.dorms.spbu.ru> References: <200712192154.lBJLsbsA001971@zion.cs.uiuc.edu> <1198103150.10758.109.camel@asl.dorms.spbu.ru> Message-ID: On Dec 19, 2007, at 2:25 PM, Anton Korobeynikov wrote: > Chris, > >> Nice! What is the magic needed to trick it into doing this? I'd >> like the nightly testers to do this. If you tell me the majik, I can >> try to hook it up to happen automatically. > Usual magic is to generate .S file and compile/link it with native g++ (or .o file) That works on an individual file basis. The problem file is libgcc_s. 10.5.dylib (would be 10.4 on Tiger, though I haven't exercised that). Removing that from llvm-gcc.obj/gcc and anywhere in the ld search page you might have installed it, such as /usr/local/lib, is a necessary step (the testsuite harness passes in its own -L and I haven't found a way to override it). There is a good dylib in /usr/lib. However, there's more. To take a concrete example, I'll discuss g+ +.dg/eh/ctor1.C. In this case, the bad unwinding code will hang at runtime, while compiling from the command line with the local llvm-gcc and a good unwinding library works correctly. However, I have not been able to get things to work using 'make check RUNTESTFLAGS=...' even though cutting and pasting the failing compilation line from the log file works fine, and even though passing in -Wl,-t shows the same libraries are being found in both cases. The failing behavior is different: it says terminate called after throwing an instance of 'int' terminate called recursively rather than looping. This looks more like EH is not being turned on somehow. For your comfort and convenience, the harness deletes all the interesting files before exiting, so tracking this down is daunting. I'm sure this is a question of invoking the testsuite properly; can any testsuite gurus help? -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20071219/3c9b90d3/attachment.html From clattner at apple.com Wed Dec 19 17:57:57 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 19 Dec 2007 15:57:57 -0800 Subject: [llvm-commits] [llvm] r45230 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp In-Reply-To: <200712192333.lBJNXOv4006358@zion.cs.uiuc.edu> References: <200712192333.lBJNXOv4006358@zion.cs.uiuc.edu> Message-ID: On Dec 19, 2007, at 3:33 PM, Evan Cheng wrote: > Author: evancheng > Date: Wed Dec 19 17:33:23 2007 > New Revision: 45230 > > URL: http://llvm.org/viewvc/llvm-project?rev=45230&view=rev > Log: > Allow iv reuse if the user is a PHI node which is in turn used as > addresses. Out of curiousity, what sort of case is this helpful with? It seems that phis would prevent folding into addresses. -Chris From gordonhenriksen at mac.com Wed Dec 19 18:13:27 2007 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Thu, 20 Dec 2007 00:13:27 -0000 Subject: [llvm-commits] [llvm] r45236 - in /llvm/trunk: bindings/ocaml/llvm/llvm.ml bindings/ocaml/llvm/llvm.mli test/Bindings/Ocaml/vmcore.ml Message-ID: <200712200013.lBK0DRN8008596@zion.cs.uiuc.edu> Author: gordon Date: Wed Dec 19 18:13:26 2007 New Revision: 45236 URL: http://llvm.org/viewvc/llvm-project?rev=45236&view=rev Log: Use a module to group calling convention values, too. Modified: llvm/trunk/bindings/ocaml/llvm/llvm.ml llvm/trunk/bindings/ocaml/llvm/llvm.mli llvm/trunk/test/Bindings/Ocaml/vmcore.ml Modified: llvm/trunk/bindings/ocaml/llvm/llvm.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm.ml?rev=45236&r1=45235&r2=45236&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm.ml (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm.ml Wed Dec 19 18:13:26 2007 @@ -55,11 +55,13 @@ | Protected end -let ccc = 0 -let fastcc = 8 -let coldcc = 9 -let x86_stdcallcc = 64 -let x86_fastcallcc = 65 +module CallConv = struct + let c = 0 + let fast = 8 + let cold = 9 + let x86_stdcall = 64 + let x86_fastcall = 65 +end module Icmp = struct type t = Modified: llvm/trunk/bindings/ocaml/llvm/llvm.mli URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm.mli?rev=45236&r1=45235&r2=45236&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm.mli (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm.mli Wed Dec 19 18:13:26 2007 @@ -95,16 +95,18 @@ (* The following calling convention values may be accessed with [function_call_conv f] and [set_function_call_conv conv f]. Calling conventions are open-ended. *) -val ccc : int (** [ccc] is the C calling convention. **) -val fastcc : int (** [fastcc] is the calling convention to allow LLVM +module CallConv : sig + val c : int (** [c] is the C calling convention. **) + val fast : int (** [fast] is the calling convention to allow LLVM maximum optimization opportunities. Use only with internal linkage. **) -val coldcc : int (** [coldcc] is the calling convention for + val cold : int (** [cold] is the calling convention for callee-save. **) -val x86_stdcallcc : int (** [x86_stdcallcc] is the familiar stdcall calling + val x86_stdcall : int (** [x86_stdcall] is the familiar stdcall calling convention from C. **) -val x86_fastcallcc : int (** [x86_fastcallcc] is the familiar fastcall calling + val x86_fastcall : int (** [x86_fastcall] is the familiar fastcall calling convention from C. **) +end (** The predicate for an integer comparison ([icmp]) instruction. See the [llvm::ICmpInst::Predicate] enumeration. **) Modified: llvm/trunk/test/Bindings/Ocaml/vmcore.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bindings/Ocaml/vmcore.ml?rev=45236&r1=45235&r2=45236&view=diff ============================================================================== --- llvm/trunk/test/Bindings/Ocaml/vmcore.ml (original) +++ llvm/trunk/test/Bindings/Ocaml/vmcore.ml Wed Dec 19 18:13:26 2007 @@ -496,9 +496,9 @@ *) group "callconv"; let fn = define_function "Fn5" ty m in - insist (ccc = function_call_conv fn); - set_function_call_conv fastcc fn; - insist (fastcc = function_call_conv fn); + insist (CallConv.c = function_call_conv fn); + set_function_call_conv CallConv.fast fn; + insist (CallConv.fast = function_call_conv fn); ignore (build_unreachable (builder_at_end (entry_block fn))); begin group "collector"; From dpatel at apple.com Wed Dec 19 18:24:01 2007 From: dpatel at apple.com (Devang Patel) Date: Thu, 20 Dec 2007 00:24:01 -0000 Subject: [llvm-commits] [llvm] r45238 - in /llvm/trunk: include/llvm/LinkTimeOptimizer.h tools/lto/lto.cpp Message-ID: <200712200024.lBK0O1sL009000@zion.cs.uiuc.edu> Author: dpatel Date: Wed Dec 19 18:24:01 2007 New Revision: 45238 URL: http://llvm.org/viewvc/llvm-project?rev=45238&view=rev Log: Add lto version check mechanism. Modified: llvm/trunk/include/llvm/LinkTimeOptimizer.h llvm/trunk/tools/lto/lto.cpp Modified: llvm/trunk/include/llvm/LinkTimeOptimizer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LinkTimeOptimizer.h?rev=45238&r1=45237&r2=45238&view=diff ============================================================================== --- llvm/trunk/include/llvm/LinkTimeOptimizer.h (original) +++ llvm/trunk/include/llvm/LinkTimeOptimizer.h Wed Dec 19 18:24:01 2007 @@ -20,6 +20,8 @@ #include #include +#define LLVM_LTO_VERSION 1 + namespace llvm { class Module; @@ -148,6 +150,6 @@ /// linker to use dlopen() interface to dynamically load LinkTimeOptimizer. /// extern "C" helps, because dlopen() interface uses name to find the symbol. extern "C" -llvm::LinkTimeOptimizer *createLLVMOptimizer(); +llvm::LinkTimeOptimizer *createLLVMOptimizer(unsigned VERSION = LLVM_LTO_VERSION); #endif Modified: llvm/trunk/tools/lto/lto.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/lto.cpp?rev=45238&r1=45237&r2=45238&view=diff ============================================================================== --- llvm/trunk/tools/lto/lto.cpp (original) +++ llvm/trunk/tools/lto/lto.cpp Wed Dec 19 18:24:01 2007 @@ -45,8 +45,11 @@ using namespace llvm; extern "C" -llvm::LinkTimeOptimizer *createLLVMOptimizer() +llvm::LinkTimeOptimizer *createLLVMOptimizer(unsigned VERSION) { + if (VERSION != LLVM_LTO_VERSION) + return NULL; + llvm::LTO *l = new llvm::LTO(); return l; } From clattner at apple.com Wed Dec 19 18:32:25 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 19 Dec 2007 16:32:25 -0800 Subject: [llvm-commits] [llvm] r45238 - in /llvm/trunk: include/llvm/LinkTimeOptimizer.h tools/lto/lto.cpp In-Reply-To: <200712200024.lBK0O1sL009000@zion.cs.uiuc.edu> References: <200712200024.lBK0O1sL009000@zion.cs.uiuc.edu> Message-ID: On Dec 19, 2007, at 4:24 PM, Devang Patel wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=45238&view=rev > Log: > Add lto version check mechanism. nice. > #include > #include > > +#define LLVM_LTO_VERSION 1 > + > namespace llvm { Can this be an enum in the llvm namespace? > ====================================================================== > ======== > --- llvm/trunk/tools/lto/lto.cpp (original) > +++ llvm/trunk/tools/lto/lto.cpp Wed Dec 19 18:24:01 2007 > @@ -45,8 +45,11 @@ > using namespace llvm; > > extern "C" > -llvm::LinkTimeOptimizer *createLLVMOptimizer() > +llvm::LinkTimeOptimizer *createLLVMOptimizer(unsigned VERSION) > { > + if (VERSION != LLVM_LTO_VERSION) > + return NULL; Please add a comment about what this is doing, it is non-obvious. Thanks! -Chris From scottm at aero.org Wed Dec 19 18:44:13 2007 From: scottm at aero.org (Scott Michel) Date: Thu, 20 Dec 2007 00:44:13 -0000 Subject: [llvm-commits] [llvm] r45242 - in /llvm/trunk: lib/Target/CellSPU/SPUAsmPrinter.cpp lib/Target/CellSPU/SPUISelDAGToDAG.cpp lib/Target/CellSPU/SPUISelLowering.cpp lib/Target/CellSPU/SPUInstrInfo.cpp lib/Target/CellSPU/SPUInstrInfo.td lib/Target/CellSPU/SPURegisterInfo.cpp test/CodeGen/CellSPU/immed64.ll test/CodeGen/CellSPU/vec_const.ll Message-ID: <200712200044.lBK0iDAA010207@zion.cs.uiuc.edu> Author: pingbak Date: Wed Dec 19 18:44:13 2007 New Revision: 45242 URL: http://llvm.org/viewvc/llvm-project?rev=45242&view=rev Log: More working CellSPU tests: - vec_const.ll: Vector constant loads - immed64.ll: i64, f64 constant loads Added: llvm/trunk/test/CodeGen/CellSPU/immed64.ll llvm/trunk/test/CodeGen/CellSPU/vec_const.ll Modified: llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp Modified: llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp?rev=45242&r1=45241&r2=45242&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp Wed Dec 19 18:44:13 2007 @@ -635,7 +635,7 @@ DW.EndModule(); // Emit ident information - O << "\t.ident\t\"(llvm 1.9+) STI CBEA Cell SPU backend\"\n"; + O << "\t.ident\t\"(llvm 2.2+) STI CBEA Cell SPU backend\"\n"; return AsmPrinter::doFinalization(M); } Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp?rev=45242&r1=45241&r2=45242&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Wed Dec 19 18:44:13 2007 @@ -155,7 +155,7 @@ } //===------------------------------------------------------------------===// - //! MVT::ValueType to useful stuff structure: + //! MVT::ValueType to "useful stuff" mapping structure: struct valtype_map_s { MVT::ValueType VT; @@ -166,13 +166,13 @@ }; const valtype_map_s valtype_map[] = { - { MVT::i1, 0, 3, 0, 0 }, - { MVT::i8, 0, 3, 0, 0 }, - { MVT::i16, SPU::ORHIr16, 2, SPU::BRHZ, SPU::BRHNZ }, - { MVT::i32, SPU::ORIr32, 0, SPU::BRZ, SPU::BRNZ }, - { MVT::i64, SPU::ORIr64, 0, 0, 0 }, - { MVT::f32, SPU::ORIf32, 0, 0, 0 }, - { MVT::f64, SPU::ORIf64, 0, 0, 0 } + { MVT::i1, 0, 3, 0, 0 }, + { MVT::i8, 0, 3, 0, 0 }, + { MVT::i16, SPU::ORHIr16, 2, SPU::BRHZ, SPU::BRHNZ }, + { MVT::i32, SPU::ORIr32, 0, SPU::BRZ, SPU::BRNZ }, + { MVT::i64, SPU::ORIr64, 0, 0, 0 }, + { MVT::f32, 0, 0, 0, 0 }, + { MVT::f64, 0, 0, 0, 0 } }; const size_t n_valtype_map = sizeof(valtype_map) / sizeof(valtype_map[0]); @@ -605,23 +605,32 @@ unsigned VT = N->getValueType(0); SDOperand Arg = N->getOperand(0); SDOperand Chain = N->getOperand(1); - SDOperand Zero = CurDAG->getTargetConstant(0, VT); SDNode *Result; - const valtype_map_s *vtm = getValueTypeMapEntry(VT); - - if (vtm->ldresult_ins == 0) { - cerr << "LDRESULT for unsupported type: " - << MVT::getValueTypeString(VT) - << "\n"; - abort(); - } else - Opc = vtm->ldresult_ins; AddToISelQueue(Arg); - AddToISelQueue(Zero); - AddToISelQueue(Chain); - Result = CurDAG->SelectNodeTo(N, Opc, VT, MVT::Other, Arg, Zero, Chain); + if (!MVT::isFloatingPoint(VT)) { + SDOperand Zero = CurDAG->getTargetConstant(0, VT); + const valtype_map_s *vtm = getValueTypeMapEntry(VT); + + if (vtm->ldresult_ins == 0) { + cerr << "LDRESULT for unsupported type: " + << MVT::getValueTypeString(VT) + << "\n"; + abort(); + } else + Opc = vtm->ldresult_ins; + + AddToISelQueue(Zero); + Result = CurDAG->SelectNodeTo(N, Opc, VT, MVT::Other, Arg, Zero, Chain); + } else { + Result = + CurDAG->SelectNodeTo(N, (VT == MVT::f32 ? SPU::ORf32 : SPU::ORf64), + MVT::Other, Arg, Arg, Chain); + } + Chain = SDOperand(Result, 1); + AddToISelQueue(Chain); + return Result; } Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=45242&r1=45241&r2=45242&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Wed Dec 19 18:44:13 2007 @@ -263,10 +263,10 @@ setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom); setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); - setOperationAction(ISD::BIT_CONVERT, MVT::f32, Expand); - setOperationAction(ISD::BIT_CONVERT, MVT::i32, Expand); - setOperationAction(ISD::BIT_CONVERT, MVT::i64, Expand); - setOperationAction(ISD::BIT_CONVERT, MVT::f64, Expand); + setOperationAction(ISD::BIT_CONVERT, MVT::i32, Legal); + setOperationAction(ISD::BIT_CONVERT, MVT::f32, Legal); + setOperationAction(ISD::BIT_CONVERT, MVT::i64, Legal); + setOperationAction(ISD::BIT_CONVERT, MVT::f64, Legal); // We cannot sextinreg(i1). Expand to shifts. setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); @@ -441,6 +441,7 @@ LoadSDNode *LN = cast(Op); SDOperand basep = LN->getBasePtr(); SDOperand the_chain = LN->getChain(); + MVT::ValueType BasepOpc = basep.Val->getOpcode(); MVT::ValueType VT = LN->getLoadedVT(); MVT::ValueType OpVT = Op.Val->getValueType(0); MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); @@ -449,6 +450,11 @@ const valtype_map_s *vtm = getValueTypeMapEntry(VT); SDOperand Ops[8]; + if (BasepOpc == ISD::FrameIndex) { + // Loading from a frame index is always properly aligned. Always. + return SDOperand(); + } + // For an extending load of an i1 variable, just call it i8 (or whatever we // were passed) and make it zero-extended: if (VT == MVT::i1) { @@ -467,11 +473,9 @@ // The vector type we really want to be when we load the 16-byte chunk MVT::ValueType vecVT, opVecVT; + vecVT = MVT::v16i8; if (VT != MVT::i1) vecVT = MVT::getVectorType(VT, (128 / MVT::getSizeInBits(VT))); - else - vecVT = MVT::v16i8; - opVecVT = MVT::getVectorType(OpVT, (128 / MVT::getSizeInBits(OpVT))); if (basep.getOpcode() == ISD::ADD) { @@ -604,8 +608,8 @@ // address scheme: SDOperand ZeroOffs = DAG.getConstant(0, PtrVT); - SDOperand loOp = DAG.getNode(SPUISD::Lo, VT, basep, ZeroOffs); - SDOperand hiOp = DAG.getNode(SPUISD::Hi, VT, basep, ZeroOffs); + SDOperand loOp = DAG.getNode(SPUISD::Lo, PtrVT, basep, ZeroOffs); + SDOperand hiOp = DAG.getNode(SPUISD::Hi, PtrVT, basep, ZeroOffs); ptrp = DAG.getNode(ISD::ADD, PtrVT, loOp, hiOp); Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp?rev=45242&r1=45241&r2=45242&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp Wed Dec 19 18:44:13 2007 @@ -49,8 +49,6 @@ break; case SPU::ORIv4i32: case SPU::ORIr32: - case SPU::ORIf64: - case SPU::ORIf32: case SPU::ORIr64: case SPU::ORHIv8i16: case SPU::ORHIr16: @@ -86,18 +84,6 @@ return true; } break; -#if 0 - case SPU::ORIf64: - case SPU::ORIf32: - // Special case because there's no third immediate operand to the - // instruction (the constant is embedded in the instruction) - assert(MI.getOperand(0).isRegister() && - MI.getOperand(1).isRegister() && - "ORIf32/f64: operands not registers"); - sourceReg = MI.getOperand(1).getReg(); - destReg = MI.getOperand(0).getReg(); - return true; -#endif case SPU::ORv16i8_i8: case SPU::ORv8i16_i16: case SPU::ORv4i32_i32: @@ -115,6 +101,8 @@ case SPU::ORv4i32: case SPU::ORr32: case SPU::ORr64: + case SPU::ORf32: + case SPU::ORf64: case SPU::ORgprc: assert(MI.getNumOperands() == 3 && MI.getOperand(0).isRegister() && Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td?rev=45242&r1=45241&r2=45242&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td (original) +++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td Wed Dec 19 18:44:13 2007 @@ -1285,6 +1285,18 @@ "or\t$rT, $rA, $rB", IntegerOp, [(set R8C:$rT, (or R8C:$rA, R8C:$rB))]>; +// OR instruction forms that are used to copy f32 and f64 registers. +// They do not match patterns. +def ORf32: + RRForm<0b10000010000, (outs R32FP:$rT), (ins R32FP:$rA, R32FP:$rB), + "or\t$rT, $rA, $rB", IntegerOp, + [/* no pattern */]>; + +def ORf64: + RRForm<0b10000010000, (outs R64FP:$rT), (ins R64FP:$rA, R64FP:$rB), + "or\t$rT, $rA, $rB", IntegerOp, + [/* no pattern */]>; + // ORv*_*: Used in scalar->vector promotions: def ORv16i8_i8: RRForm<0b10000010000, (outs VECREG:$rT), (ins R8C:$rA, R8C:$rB), @@ -1474,18 +1486,6 @@ "ori\t$rT, $rA, $val", IntegerOp, [(set R32C:$rT, (or R32C:$rA, i32ImmUns10:$val))]>; -// Hacked forms of or immediate to copy one 32- and 64-bit FP register -// to another. Do not match patterns. -def ORIf32: - RI10Form_1<0b00100000, (outs R32FP:$rT), (ins R32FP:$rA, s10imm_i32:$val), - "ori\t$rT, $rA, $val", IntegerOp, - [/* no pattern */]>; - -def ORIf64: - RI10Form_1<0b00100000, (outs R64FP:$rT), (ins R64FP:$rA, s10imm_i32:$val), - "ori\t$rT, $rA, $val", IntegerOp, - [/* no pattern */]>; - def ORIr64: RI10Form_1<0b00100000, (outs R64C:$rT), (ins R64C:$rA, s10imm_i32:$val), "ori\t$rT, $rA, $val", IntegerOp, @@ -2108,7 +2108,7 @@ def SHUFB: RRRForm<0b1000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB, VECREG:$rC), "shufb\t$rT, $rA, $rB, $rC", IntegerOp, - [/* insert intrinsic here */]>; + [/* no pattern */]>; // SPUshuffle is generated in LowerVECTOR_SHUFFLE and gets replaced with SHUFB. // See the SPUshuffle SDNode operand above, which sets up the DAG pattern @@ -2123,9 +2123,15 @@ def : Pat<(SPUshuffle (v4i32 VECREG:$rA), (v4i32 VECREG:$rB), VECREG:$rC), (SHUFB VECREG:$rA, VECREG:$rB, VECREG:$rC)>; +def : Pat<(SPUshuffle (v4f32 VECREG:$rA), (v4f32 VECREG:$rB), VECREG:$rC), + (SHUFB VECREG:$rA, VECREG:$rB, VECREG:$rC)>; + def : Pat<(SPUshuffle (v2i64 VECREG:$rA), (v2i64 VECREG:$rB), VECREG:$rC), (SHUFB VECREG:$rA, VECREG:$rB, VECREG:$rC)>; +def : Pat<(SPUshuffle (v2f64 VECREG:$rA), (v2f64 VECREG:$rB), VECREG:$rC), + (SHUFB VECREG:$rA, VECREG:$rB, VECREG:$rC)>; + //===----------------------------------------------------------------------===// // Shift and rotate group: //===----------------------------------------------------------------------===// @@ -3372,6 +3378,7 @@ def : Pat<(v2f64 (bitconvert (v2f64 VECREG:$src))), (v2f64 VECREG:$src)>; def : Pat<(f32 (bitconvert (i32 R32C:$src))), (f32 R32FP:$src)>; +def : Pat<(f64 (bitconvert (i64 R64C:$src))), (f64 R64FP:$src)>; //===----------------------------------------------------------------------===// // Instruction patterns: Modified: llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp?rev=45242&r1=45241&r2=45242&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp Wed Dec 19 18:44:13 2007 @@ -378,11 +378,13 @@ } else if (DestRC == SPU::R32CRegisterClass) { BuildMI(MBB, MI, TII.get(SPU::ORIr32), DestReg).addReg(SrcReg).addImm(0); } else if (DestRC == SPU::R32FPRegisterClass) { - BuildMI(MBB, MI, TII.get(SPU::ORIf32), DestReg).addReg(SrcReg).addImm(0); + BuildMI(MBB, MI, TII.get(SPU::ORf32), DestReg).addReg(SrcReg) + .addReg(SrcReg); } else if (DestRC == SPU::R64CRegisterClass) { BuildMI(MBB, MI, TII.get(SPU::ORIr64), DestReg).addReg(SrcReg).addImm(0); } else if (DestRC == SPU::R64FPRegisterClass) { - BuildMI(MBB, MI, TII.get(SPU::ORIf64), DestReg).addReg(SrcReg).addImm(0); + BuildMI(MBB, MI, TII.get(SPU::ORf64), DestReg).addReg(SrcReg) + .addReg(SrcReg); } else if (DestRC == SPU::GPRCRegisterClass) { BuildMI(MBB, MI, TII.get(SPU::ORgprc), DestReg).addReg(SrcReg) .addReg(SrcReg); Added: llvm/trunk/test/CodeGen/CellSPU/immed64.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/immed64.ll?rev=45242&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/immed64.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/immed64.ll Wed Dec 19 18:44:13 2007 @@ -0,0 +1,81 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: grep lqa %t1.s | count 13 && +; RUN: grep shufb %t1.s | count 13 && +; RUN: grep 65520 %t1.s | count 1 && +; RUN: grep 43981 %t1.s | count 1 && +; RUN: grep 13702 %t1.s | count 1 && +; RUN: grep 81 %t1.s | count 2 && +; RUN: grep 28225 %t1.s | count 1 && +; RUN: grep 30720 %t1.s | count 1 && +; RUN: grep 192 %t1.s | count 32 && +; RUN: grep 128 %t1.s | count 30 && +; RUN: grep 224 %t1.s | count 2 + +; 1311768467750121234 => 0x 12345678 abcdef12 (4660,22136/43981,61202) +; 18446744073709551591 => 0x ffffffff ffffffe7 (-25) +; 18446744073708516742 => 0x ffffffff fff03586 (-1034874) +; 5308431 => 0x 00000000 0051000F +; 9223372038704560128 => 0x 80000000 6e417800 + +define i64 @i64_const_1() { + ret i64 1311768467750121234 ;; Constant pool spill +} + +define i64 @i64_const_2() { + ret i64 18446744073709551591 ;; IL/SHUFB +} + +define i64 @i64_const_3() { + ret i64 18446744073708516742 ;; IHLU/IOHL/SHUFB +} + +define i64 @i64_const_4() { + ret i64 5308431 ;; ILHU/IOHL/SHUFB +} + +define i64 @i64_const_5() { + ret i64 511 ;; IL/SHUFB +} + +define i64 @i64_const_6() { + ret i64 -512 ;; IL/SHUFB +} + +define i64 @i64_const_7() { + ret i64 9223372038704560128 ;; IHLU/IOHL/SHUFB +} + +define i64 @i64_const_8() { + ret i64 0 ;; IL +} + +; 0x4005bf0a8b145769 -> +; (ILHU 0x4005 [16389]/IOHL 0xbf0a [48906]) +; (ILHU 0x8b14 [35604]/IOHL 0x5769 [22377]) +define double @f64_const_1() { + ret double 0x4005bf0a8b145769 ;; ILHU/IOHL via pattern +} + +define double @f64_const_2() { + ret double 0x0010000000000000 +} + +define double @f64_const_3() { + ret double 0x7fefffffffffffff +} + +define double @f64_const_4() { + ret double 0x400921fb54442d18 +} + +define double @f64_const_5() { + ret double 0xbff6a09e667f3bcd ;; ILHU/IOHL via pattern +} + +define double @f64_const_6() { + ret double 0x3ff6a09e667f3bcd +} + +define double @f64_const_7() { + ret double 0.000000e+00 +} Added: llvm/trunk/test/CodeGen/CellSPU/vec_const.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/vec_const.ll?rev=45242&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/vec_const.ll (added) +++ llvm/trunk/test/CodeGen/CellSPU/vec_const.ll Wed Dec 19 18:44:13 2007 @@ -0,0 +1,155 @@ +; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llvm-as -o - %s | llc -march=cellspu -mattr=large_mem > %t2.s +; RUN: grep il %t1.s | count 16 && +; RUN: grep ilhu %t1.s | count 8 && +; RUN: grep ilh %t1.s | count 13 && +; RUN: grep iohl %t1.s | count 7 && +; RUN: grep lqa %t1.s | count 6 && +; RUN: grep 24672 %t1.s | count 2 && +; RUN: grep 16429 %t1.s | count 1 && +; RUN: grep 63572 %t1.s | count 1 && +; RUN: grep 4660 %t1.s | count 1 && +; RUN: grep 22136 %t1.s | count 1 && +; RUN: grep 43981 %t1.s | count 1 && +; RUN: grep 61202 %t1.s | count 1 && +; RUN: grep 16393 %t1.s | count 1 && +; RUN: grep 8699 %t1.s | count 1 && +; RUN: grep 21572 %t1.s | count 1 && +; RUN: grep 11544 %t1.s | count 1 && +; RUN: grep 1311768467750121234 %t1.s | count 1 && +; RUN: grep lqx %t2.s | count 6 && +; RUN: grep ila %t2.s | count 6 + +target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128" +target triple = "spu-unknown-elf" + +; Vector constant load tests: + +; IL , 2 +define <4 x i32> @v4i32_constvec() { + ret <4 x i32> < i32 2, i32 2, i32 2, i32 2 > +} + +; Spill to constant pool +define <4 x i32> @v4i32_constpool() { + ret <4 x i32> < i32 2, i32 1, i32 1, i32 2 > +} + +; Max negative range for IL +define <4 x i32> @v4i32_constvec_2() { + ret <4 x i32> < i32 -32768, i32 -32768, i32 -32768, i32 -32768 > +} + +; ILHU , 73 (0x49) +; 4784128 = 0x490000 +define <4 x i32> @v4i32_constvec_3() { + ret <4 x i32> < i32 4784128, i32 4784128, + i32 4784128, i32 4784128 > +} + +; ILHU , 61 (0x3d) +; IOHL , 15395 (0x3c23) +define <4 x i32> @v4i32_constvec_4() { + ret <4 x i32> < i32 4013091, i32 4013091, + i32 4013091, i32 4013091 > +} + +; ILHU , 0x5050 (20560) +; IOHL , 0x5050 (20560) +; Tests for whether we expand the size of the bit pattern properly, because +; this could be interpreted as an i8 pattern (0x50) +define <4 x i32> @v4i32_constvec_5() { + ret <4 x i32> < i32 1347440720, i32 1347440720, + i32 1347440720, i32 1347440720 > +} + +; ILH +define <8 x i16> @v8i16_constvec_1() { + ret <8 x i16> < i16 32767, i16 32767, i16 32767, i16 32767, + i16 32767, i16 32767, i16 32767, i16 32767 > +} + +; ILH +define <8 x i16> @v8i16_constvec_2() { + ret <8 x i16> < i16 511, i16 511, i16 511, i16 511, i16 511, + i16 511, i16 511, i16 511 > +} + +; ILH +define <8 x i16> @v8i16_constvec_3() { + ret <8 x i16> < i16 -512, i16 -512, i16 -512, i16 -512, i16 -512, + i16 -512, i16 -512, i16 -512 > +} + +; ILH , 24672 (0x6060) +; Tests whether we expand the size of the bit pattern properly, because +; this could be interpreted as an i8 pattern (0x60) +define <8 x i16> @v8i16_constvec_4() { + ret <8 x i16> < i16 24672, i16 24672, i16 24672, i16 24672, i16 24672, + i16 24672, i16 24672, i16 24672 > +} + +; ILH , 24672 (0x6060) +; Tests whether we expand the size of the bit pattern properly, because +; this is an i8 pattern but has to be expanded out to i16 to load it +; properly into the vector register. +define <16 x i8> @v16i8_constvec_1() { + ret <16 x i8> < i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, + i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96 > +} + +define <4 x float> @v4f32_constvec_1() { +entry: + ret <4 x float> < float 0x4005BF0A80000000, + float 0x4005BF0A80000000, + float 0x4005BF0A80000000, + float 0x4005BF0A80000000 > +} + +define <4 x float> @v4f32_constvec_2() { +entry: + ret <4 x float> < float 0.000000e+00, + float 0.000000e+00, + float 0.000000e+00, + float 0.000000e+00 > +} + + +define <4 x float> @v4f32_constvec_3() { +entry: + ret <4 x float> < float 0x4005BF0A80000000, + float 0x3810000000000000, + float 0x47EFFFFFE0000000, + float 0x400921FB60000000 > +} + +; 1311768467750121234 => 0x 12345678 abcdef12 +; HI32_hi: 4660 +; HI32_lo: 22136 +; LO32_hi: 43981 +; LO32_lo: 61202 +define <2 x i64> @i64_constvec_1() { +entry: + ret <2 x i64> < i64 1311768467750121234, + i64 1311768467750121234 > +} + +define <2 x i64> @i64_constvec_2() { +entry: + ret <2 x i64> < i64 1, i64 1311768467750121234 > +} + +define <2 x double> @f64_constvec_1() { +entry: + ret <2 x double> < double 0x400921fb54442d18, + double 0xbff6a09e667f3bcd > +} + +; 0x400921fb 54442d18 -> +; (ILHU 0x4009 [16393]/IOHL 0x21fb [ 8699]) +; (ILHU 0x5444 [21572]/IOHL 0x2d18 [11544]) +define <2 x double> @f64_constvec_2() { +entry: + ret <2 x double> < double 0x400921fb54442d18, + double 0x400921fb54442d18 > +} From clattner at apple.com Wed Dec 19 19:02:04 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 19 Dec 2007 17:02:04 -0800 Subject: [llvm-commits] [llvm] r45221 - /llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp In-Reply-To: References: <200712192154.lBJLsbsA001971@zion.cs.uiuc.edu> <1198103150.10758.109.camel@asl.dorms.spbu.ru> Message-ID: On Dec 19, 2007, at 3:37 PM, Dale Johannesen wrote: > On Dec 19, 2007, at 2:25 PM, Anton Korobeynikov wrote: >> Chris, >> >>> Nice! What is the magic needed to trick it into doing this? I'd >>> like the nightly testers to do this. If you tell me the majik, I >>> can >>> try to hook it up to happen automatically. >> Usual magic is to generate .S file and compile/link it with native >> g++ > > However, there's more. To take a concrete example, I'll discuss g+ > +.dg/eh/ctor1.C. Ah, ok! To be concrete, I meant the llvm nightly tester program suite, not the dejagnu suite. Is there any way to make *it* work on ppc? -Chris From evan.cheng at apple.com Wed Dec 19 19:03:52 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 19 Dec 2007 17:03:52 -0800 Subject: [llvm-commits] [llvm] r45230 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp In-Reply-To: References: <200712192333.lBJNXOv4006358@zion.cs.uiuc.edu> Message-ID: <747D819B-F437-4FB9-B002-21E6FD850CAA@apple.com> Sorry, the check in comment and some of the code is wrong. What it should say is "is all other uses are address and iv reuse for those are possible, then ignore the PHI use." In that case, an extra multiplication is needed (for PHI), but it eliminates an iv because the multiplication is folded into other uses. It turns out to be a good trade. I'll fix this in a bit. Evan On Dec 19, 2007, at 3:57 PM, Chris Lattner wrote: > > On Dec 19, 2007, at 3:33 PM, Evan Cheng wrote: > >> Author: evancheng >> Date: Wed Dec 19 17:33:23 2007 >> New Revision: 45230 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=45230&view=rev >> Log: >> Allow iv reuse if the user is a PHI node which is in turn used as >> addresses. > > Out of curiousity, what sort of case is this helpful with? It seems > that phis would prevent folding into addresses. > > -Chris > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Wed Dec 19 19:08:11 2007 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 20 Dec 2007 01:08:11 -0000 Subject: [llvm-commits] [llvm] r45245 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp Message-ID: <200712200108.lBK18BkB011604@zion.cs.uiuc.edu> Author: void Date: Wed Dec 19 19:08:10 2007 New Revision: 45245 URL: http://llvm.org/viewvc/llvm-project?rev=45245&view=rev Log: Updated comments to reflect what "side effects" means in this situation. Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=45245&r1=45244&r2=45245&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Wed Dec 19 19:08:10 2007 @@ -249,8 +249,8 @@ /// IsLoopInvariantInst - Returns true if the instruction is loop /// invariant. I.e., all virtual register operands are defined outside of the -/// loop, physical registers aren't accessed (explicitly or implicitly), and the -/// instruction is hoistable. +/// loop, physical registers aren't accessed explicitly, and there are no side +/// effects that aren't captured by the operands or other flags. /// bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) { DEBUG({ @@ -281,13 +281,6 @@ DOUT << " * Instruction has side effects.\n"; }); -#if 0 - // FIXME: Don't hoist if this instruction implicitly reads physical registers. - if (I.getInstrDescriptor()->ImplicitUses || - I.getInstrDescriptor()->ImplicitDefs) - return false; -#endif - // The instruction is loop invariant if all of its operands are loop-invariant for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) { const MachineOperand &MO = I.getOperand(i); @@ -309,7 +302,7 @@ return false; } - // Don't hoist something that has side effects. + // Don't hoist something that has unmodelled side effects. if (TII->hasUnmodelledSideEffects(&I)) return false; // If we got this far, the instruction is loop invariant! From clattner at apple.com Wed Dec 19 19:10:51 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 19 Dec 2007 17:10:51 -0800 Subject: [llvm-commits] [llvm] r45173 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp In-Reply-To: <200712182132.lBILWLpr014358@zion.cs.uiuc.edu> References: <200712182132.lBILWLpr014358@zion.cs.uiuc.edu> Message-ID: On Dec 18, 2007, at 1:32 PM, Christopher Lamb wrote: > Fold subtracts into integer compares vs. zero. This improves > generate code for this case on X86 > from Very nice xform! Please add a testcase to Transforms/Instcombine Also: > if (isa(Op1)) // X icmp undef -> undef > return ReplaceInstUsesWith(I, UndefValue::get(Type::Int1Ty)); > - > + > + // (icmp cond (sub m A) 0) -> > + // (icmp cond m A) > + { > + ConstantInt *C1, *C2; > + Value *A; This code can be simplified in two ways: first, you can drop the first version of the pattern: compares (and other binops, where possible) are canonicalized so that any constant will be on the RHS. This means you don't have to test to see if the LHS is a constant. Second, if you sink this down into this "if" block: // See if we are doing a comparison between a constant and an instruction that // can be folded into the comparison. if (ConstantInt *CI = dyn_cast(Op1)) { then you can turn the first match into just: if (CI->isNullValue() && match(Op0, ...) Finally, is "m" really required to be a constant? This xform seems valid for any "m" and "A", and more general is good. Thanks Christopher! -Chris > + // Check both arguments of the compare for a matching subtract. > + if (match(Op0, m_ConstantInt(C1)) && C1->getValue() == 0 && > + match(Op1, m_Sub(m_ConstantInt(C2), m_Value(A)))) { > + // We managed to fold the add into the RHS of the select > condition. > + return new ICmpInst(I.getPredicate(), A, C2); > + } else if (match(Op1, m_ConstantInt(C1)) && C1->getValue() == > 0 && > + match(Op0, m_Sub(m_ConstantInt(C2), m_Value(A)))) { > + // We managed to fold the add into the LHS of the select > condition. > + return new ICmpInst(I.getPredicate(), C2, A); > + } > + } > + > // icmp , - Global/ > Stack value > // addresses never equal each other! We already know that Op0 ! > = Op1. > if ((isa(Op0) || isa(Op0) || > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Wed Dec 19 19:11:34 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 19 Dec 2007 17:11:34 -0800 Subject: [llvm-commits] [llvm] r45230 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp In-Reply-To: <747D819B-F437-4FB9-B002-21E6FD850CAA@apple.com> References: <200712192333.lBJNXOv4006358@zion.cs.uiuc.edu> <747D819B-F437-4FB9-B002-21E6FD850CAA@apple.com> Message-ID: On Dec 19, 2007, at 5:03 PM, Evan Cheng wrote: > Sorry, the check in comment and some of the code is wrong. What it > should say is "is all other uses are address and iv reuse for those > are possible, then ignore the PHI use." In that case, an extra > multiplication is needed (for PHI), but it eliminates an iv because > the multiplication is folded into other uses. It turns out to be a > good trade. > > I'll fix this in a bit. > Ok! -Chris From dalej at apple.com Wed Dec 19 19:14:45 2007 From: dalej at apple.com (Dale Johannesen) Date: Wed, 19 Dec 2007 17:14:45 -0800 Subject: [llvm-commits] [llvm] r45221 - /llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp In-Reply-To: References: <200712192154.lBJLsbsA001971@zion.cs.uiuc.edu> <1198103150.10758.109.camel@asl.dorms.spbu.ru> Message-ID: <42C94773-9CB1-4EBD-95A7-FFC10FEB5F92@apple.com> On Dec 19, 2007, at 5:02 PM, Chris Lattner wrote: > On Dec 19, 2007, at 3:37 PM, Dale Johannesen wrote: >> On Dec 19, 2007, at 2:25 PM, Anton Korobeynikov wrote: >>> Chris, >>> >>>> Nice! What is the magic needed to trick it into doing this? I'd >>>> like the nightly testers to do this. If you tell me the majik, I >>>> can >>>> try to hook it up to happen automatically. >>> Usual magic is to generate .S file and compile/link it with native >>> g++ >> >> However, there's more. To take a concrete example, I'll discuss g+ >> +.dg/eh/ctor1.C. > > Ah, ok! To be concrete, I meant the llvm nightly tester program > suite, not the dejagnu suite. Is there any way to make *it* work on > ppc? Not sure what you mean. The unwinding library is not an issue in that case. The EH will work (modulo bugs) if you pass -enable-eh; however, the top-level Makefile currently sets -enable-correct-eh-support. From clattner at apple.com Wed Dec 19 19:15:00 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 19 Dec 2007 17:15:00 -0800 Subject: [llvm-commits] [llvm] r45173 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp In-Reply-To: References: <200712182132.lBILWLpr014358@zion.cs.uiuc.edu> Message-ID: <4793AE07-4C1B-42FE-B3DA-1A36055EB6EB@apple.com> On Dec 19, 2007, at 5:10 PM, Chris Lattner wrote: > Finally, is "m" really required to be a constant? This xform seems > valid for any "m" and "A", and more general is good. Incidentally, in the spirit of generalizing this, it seems like these are also valid forms of the same thing: (icmp lt (sub a, b), 1) (icmp sgt (sub a, b), -1) Instcombine will canonicalize (sle x, 0) -> (slt x, 1) and (sge x, 0) -> (sgt x, -1), so these extra cases are worth handling. -Chris From clattner at apple.com Wed Dec 19 19:16:25 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 19 Dec 2007 17:16:25 -0800 Subject: [llvm-commits] [llvm] r45221 - /llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp In-Reply-To: <42C94773-9CB1-4EBD-95A7-FFC10FEB5F92@apple.com> References: <200712192154.lBJLsbsA001971@zion.cs.uiuc.edu> <1198103150.10758.109.camel@asl.dorms.spbu.ru> <42C94773-9CB1-4EBD-95A7-FFC10FEB5F92@apple.com> Message-ID: <7812C605-BF1D-4D91-9007-2927BE76AD63@apple.com> On Dec 19, 2007, at 5:14 PM, Dale Johannesen wrote: >>> However, there's more. To take a concrete example, I'll discuss g+ >>> +.dg/eh/ctor1.C. >> >> Ah, ok! To be concrete, I meant the llvm nightly tester program >> suite, not the dejagnu suite. Is there any way to make *it* work on >> ppc? > > Not sure what you mean. The unwinding library is not an issue in that > case. Ok. My concern is that I want the nightly tester testing the most useful thing possible, ideally what users will get when they use "llvm-gcc foo.cpp; ./a.out". There are a couple of EH-using tests in the llvm-test suite, I'd like for them to "start passing" :) > The EH will work (modulo bugs) if you pass -enable-eh; however, > the top-level Makefile currently sets -enable-correct-eh-support. What is the difference these days? Should the top-level makefile be changed? -Chris From asl at math.spbu.ru Wed Dec 19 19:21:51 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Thu, 20 Dec 2007 01:21:51 -0000 Subject: [llvm-commits] [llvm] r45246 - /llvm/trunk/include/llvm/ADT/Trie.h Message-ID: <200712200121.lBK1LpKk012612@zion.cs.uiuc.edu> Author: asl Date: Wed Dec 19 19:21:50 2007 New Revision: 45246 URL: http://llvm.org/viewvc/llvm-project?rev=45246&view=rev Log: Add iterators for child traversal. Modified: llvm/trunk/include/llvm/ADT/Trie.h Modified: llvm/trunk/include/llvm/ADT/Trie.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Trie.h?rev=45246&r1=45245&r2=45246&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/Trie.h (original) +++ llvm/trunk/include/llvm/ADT/Trie.h Wed Dec 19 19:21:50 2007 @@ -34,8 +34,13 @@ public: class Node { friend class Trie; - friend class GraphTraits >; + public: + typedef std::vector NodeVectorType; + typedef typename NodeVectorType::iterator iterator; + typedef typename NodeVectorType::const_iterator const_iterator; + + private: typedef enum { Same = -3, StringIsPrefix = -2, @@ -43,8 +48,6 @@ DontMatch = 0, HaveCommonPart } QueryResult; - typedef std::vector NodeVector; - typedef typename std::vector::iterator NodeVectorIter; struct NodeCmp { bool operator() (Node* N1, Node* N2) { @@ -57,7 +60,7 @@ std::string Label; Payload Data; - NodeVector Children; + NodeVectorType Children; // Do not implement Node(const Node&); @@ -67,8 +70,8 @@ if (Children.empty()) Children.push_back(N); else { - NodeVectorIter I = std::lower_bound(Children.begin(), Children.end(), - N, NodeCmp()); + iterator I = std::lower_bound(Children.begin(), Children.end(), + N, NodeCmp()); // FIXME: no dups are allowed Children.insert(I, N); } @@ -76,8 +79,8 @@ inline void setEdge(Node* N) { char Id = N->Label[0]; - NodeVectorIter I = std::lower_bound(Children.begin(), Children.end(), - Id, NodeCmp()); + iterator I = std::lower_bound(Children.begin(), Children.end(), + Id, NodeCmp()); assert(I != Children.end() && "Node does not exists!"); *I = N; } @@ -119,20 +122,33 @@ << "Label: " << Label << "\n" << "Children:\n"; - for (NodeVectorIter I = Children.begin(), E = Children.end(); I != E; ++I) + for (iterator I = Children.begin(), E = Children.end(); I != E; ++I) std::cerr << (*I)->Label << "\n"; } #endif inline Node* getEdge(char Id) { Node* fNode = NULL; - NodeVectorIter I = std::lower_bound(Children.begin(), Children.end(), + iterator I = std::lower_bound(Children.begin(), Children.end(), Id, NodeCmp()); if (I != Children.end() && (*I)->Label[0] == Id) fNode = *I; return fNode; } + + inline iterator begin() { return Children.begin(); } + inline const_iterator begin() const { return Children.begin(); } + inline iterator end () { return Children.end(); } + inline const_iterator end () const { return Children.end(); } + + inline size_t size () const { return Children.size(); } + inline bool empty() const { return Children.empty(); } + inline const Node* &front() const { return Children.front(); } + inline Node* &front() { return Children.front(); } + inline const Node* &back() const { return Children.back(); } + inline Node* &back() { return Children.back(); } + }; private: @@ -260,17 +276,17 @@ template struct GraphTraits > { typedef typename Trie::Node NodeType; - typedef typename std::vector::iterator ChildIteratorType; + typedef typename Trie::Node::iterator ChildIteratorType; static inline NodeType *getEntryNode(const Trie& T) { return T.getRoot(); } static inline ChildIteratorType child_begin(NodeType *N) { - return N->Children.begin(); + return N->begin(); } static inline ChildIteratorType child_end(NodeType *N) { - return N->Children.end(); + return N->end(); } typedef typename std::vector::const_iterator nodes_iterator; From dalej at apple.com Wed Dec 19 19:25:18 2007 From: dalej at apple.com (Dale Johannesen) Date: Wed, 19 Dec 2007 17:25:18 -0800 Subject: [llvm-commits] [llvm] r45221 - /llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp In-Reply-To: <7812C605-BF1D-4D91-9007-2927BE76AD63@apple.com> References: <200712192154.lBJLsbsA001971@zion.cs.uiuc.edu> <1198103150.10758.109.camel@asl.dorms.spbu.ru> <42C94773-9CB1-4EBD-95A7-FFC10FEB5F92@apple.com> <7812C605-BF1D-4D91-9007-2927BE76AD63@apple.com> Message-ID: On Dec 19, 2007, at 5:16 PM, Chris Lattner wrote: > On Dec 19, 2007, at 5:14 PM, Dale Johannesen wrote: >>>> However, there's more. To take a concrete example, I'll discuss g+ >>>> +.dg/eh/ctor1.C. >>> >>> Ah, ok! To be concrete, I meant the llvm nightly tester program >>> suite, not the dejagnu suite. Is there any way to make *it* work on >>> ppc? >> >> Not sure what you mean. The unwinding library is not an issue in >> that >> case. > > Ok. My concern is that I want the nightly tester testing the most > useful thing possible, ideally what users will get when they use > "llvm-gcc foo.cpp; ./a.out". There are a couple of EH-using tests > in the llvm-test suite, I'd like for them to "start passing" :) Some will.:) >> The EH will work (modulo bugs) if you pass -enable-eh; however, >> the top-level Makefile currently sets -enable-correct-eh-support. > > What is the difference these days? I believe correct-eh uses sjlj, but haven't really looked at it. I'm pretty sure it's not something we want to worry about going forward. > Should the top-level makefile be changed? You're asking me? IMO it's appropriate to change it for targets where -enable-eh has been implemented, and not for others. From asl at math.spbu.ru Wed Dec 19 19:30:27 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Thu, 20 Dec 2007 01:30:27 -0000 Subject: [llvm-commits] [llvm] r45247 - /llvm/trunk/include/llvm/ADT/Trie.h Message-ID: <200712200130.lBK1URWS013002@zion.cs.uiuc.edu> Author: asl Date: Wed Dec 19 19:30:27 2007 New Revision: 45247 URL: http://llvm.org/viewvc/llvm-project?rev=45247&view=rev Log: More eye-candy stuff :) Modified: llvm/trunk/include/llvm/ADT/Trie.h Modified: llvm/trunk/include/llvm/ADT/Trie.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Trie.h?rev=45247&r1=45246&r2=45247&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/Trie.h (original) +++ llvm/trunk/include/llvm/ADT/Trie.h Wed Dec 19 19:30:27 2007 @@ -147,7 +147,7 @@ inline const Node* &front() const { return Children.front(); } inline Node* &front() { return Children.front(); } inline const Node* &back() const { return Children.back(); } - inline Node* &back() { return Children.back(); } + inline Node* &back() { return Children.back(); } }; @@ -275,26 +275,21 @@ template struct GraphTraits > { - typedef typename Trie::Node NodeType; - typedef typename Trie::Node::iterator ChildIteratorType; + typedef Trie TrieType; + typedef typename TrieType::Node NodeType; + typedef typename NodeType::iterator ChildIteratorType; - static inline NodeType *getEntryNode(const Trie& T) { - return T.getRoot(); - } + static inline NodeType *getEntryNode(const TrieType& T) { return T.getRoot(); } - static inline ChildIteratorType child_begin(NodeType *N) { - return N->begin(); - } - static inline ChildIteratorType child_end(NodeType *N) { - return N->end(); - } + static inline ChildIteratorType child_begin(NodeType *N) { return N->begin(); } + static inline ChildIteratorType child_end(NodeType *N) { return N->end(); } typedef typename std::vector::const_iterator nodes_iterator; - static inline nodes_iterator nodes_begin(const Trie& G) { + static inline nodes_iterator nodes_begin(const TrieType& G) { return G.Nodes.begin(); } - static inline nodes_iterator nodes_end(const Trie& G) { + static inline nodes_iterator nodes_end(const TrieType& G) { return G.Nodes.end(); } From dpatel at apple.com Wed Dec 19 19:46:01 2007 From: dpatel at apple.com (Devang Patel) Date: Thu, 20 Dec 2007 01:46:01 -0000 Subject: [llvm-commits] [llvm] r45249 - in /llvm/trunk: include/llvm/LinkTimeOptimizer.h tools/lto/lto.cpp Message-ID: <200712200146.lBK1k1gZ013640@zion.cs.uiuc.edu> Author: dpatel Date: Wed Dec 19 19:46:01 2007 New Revision: 45249 URL: http://llvm.org/viewvc/llvm-project?rev=45249&view=rev Log: Revert my previous check-in. Modified: llvm/trunk/include/llvm/LinkTimeOptimizer.h llvm/trunk/tools/lto/lto.cpp Modified: llvm/trunk/include/llvm/LinkTimeOptimizer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LinkTimeOptimizer.h?rev=45249&r1=45248&r2=45249&view=diff ============================================================================== --- llvm/trunk/include/llvm/LinkTimeOptimizer.h (original) +++ llvm/trunk/include/llvm/LinkTimeOptimizer.h Wed Dec 19 19:46:01 2007 @@ -20,8 +20,6 @@ #include #include -#define LLVM_LTO_VERSION 1 - namespace llvm { class Module; @@ -150,6 +148,6 @@ /// linker to use dlopen() interface to dynamically load LinkTimeOptimizer. /// extern "C" helps, because dlopen() interface uses name to find the symbol. extern "C" -llvm::LinkTimeOptimizer *createLLVMOptimizer(unsigned VERSION = LLVM_LTO_VERSION); +llvm::LinkTimeOptimizer *createLLVMOptimizer(); #endif Modified: llvm/trunk/tools/lto/lto.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/lto.cpp?rev=45249&r1=45248&r2=45249&view=diff ============================================================================== --- llvm/trunk/tools/lto/lto.cpp (original) +++ llvm/trunk/tools/lto/lto.cpp Wed Dec 19 19:46:01 2007 @@ -45,11 +45,8 @@ using namespace llvm; extern "C" -llvm::LinkTimeOptimizer *createLLVMOptimizer(unsigned VERSION) +llvm::LinkTimeOptimizer *createLLVMOptimizer() { - if (VERSION != LLVM_LTO_VERSION) - return NULL; - llvm::LTO *l = new llvm::LTO(); return l; } From dpatel at apple.com Wed Dec 19 19:54:04 2007 From: dpatel at apple.com (Devang Patel) Date: Wed, 19 Dec 2007 17:54:04 -0800 Subject: [llvm-commits] [llvm] r45221 - /llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp In-Reply-To: <7812C605-BF1D-4D91-9007-2927BE76AD63@apple.com> References: <200712192154.lBJLsbsA001971@zion.cs.uiuc.edu> <1198103150.10758.109.camel@asl.dorms.spbu.ru> <42C94773-9CB1-4EBD-95A7-FFC10FEB5F92@apple.com> <7812C605-BF1D-4D91-9007-2927BE76AD63@apple.com> Message-ID: <54DCC3CC-2A1A-4846-B8D7-AB017A17F6AF@apple.com> On Dec 19, 2007, at 5:16 PM, Chris Lattner wrote: > Ok. My concern is that I want the nightly tester testing the most > useful thing possible, ideally what users will get when they use > "llvm-gcc foo.cpp; ./a.out". There are a couple of EH-using tests > in the llvm-test suite, I'd like for them to "start passing" :) > >> The EH will work (modulo bugs) if you pass -enable-eh; however, >> the top-level Makefile currently sets -enable-correct-eh-support. > > What is the difference these days? Should the top-level makefile be > changed? If you build llvm-gcc using build_gcc script then it'll match what end users will use. - Devang From clattner at apple.com Wed Dec 19 19:56:15 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 19 Dec 2007 17:56:15 -0800 Subject: [llvm-commits] [llvm] r45169 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll In-Reply-To: <200712182030.lBIKUSwf011094@zion.cs.uiuc.edu> References: <200712182030.lBIKUSwf011094@zion.cs.uiuc.edu> Message-ID: <2D57B102-549C-49AD-B4BC-A346633471DA@apple.com> > URL: http://llvm.org/viewvc/llvm-project?rev=45169&view=rev > Log: > Remove an orthogonal transformation of the selection condition from > my most recent submission. Thanks for splitting this out, it makes it much easier for me to see the forest through the trees :) > +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue > Dec 18 14:30:28 2007 > // add (select X 0 (sub n A)) A -> > // select X A n > { > SelectInst *SI = dyn_cast(LHS); > Value *Other = RHS; > if (!SI) { > SI = dyn_cast(RHS); > Other = LHS; > } > if (SI) { > Value *TV = SI->getTrueValue(); > Value *FV = SI->getFalseValue(); > Value *A; > > // Can we fold the add into the argument of the select? > // We check both true and false select arguments for a > matching subtract. > ConstantInt *C1, *C2; > if (match(FV, m_ConstantInt(C1)) && C1->getValue() == 0 && > match(TV, m_Sub(m_ConstantInt(C2), m_Value(A))) && > A == Other) { > // We managed to fold the add into the true select value. > return new SelectInst(SI->getCondition(), C2, A); > } else if (match(TV, m_ConstantInt(C1)) && C1->getValue() == > 0 && > match(FV, m_Sub(m_ConstantInt(C2), m_Value(A))) && > A == Other) { > // We managed to fold the add into the false select value. > return new SelectInst(SI->getCondition(), A, C2); > } > } > } This looks very nice. The one bug I see is that it should only keep in if the select hasOneUse(). Changing it to "if (SI && SI->hasOneUse ())" should fix this. The reason for the check is that we don't want to create multiple select instructions if the add isn't the only thing that uses the select. This also inspires me to add a m_Zero() matching function, so I'll take care of the update :) Thanks Christopher, nice job, -Chris From sabre at nondot.org Wed Dec 19 19:56:58 2007 From: sabre at nondot.org (Chris Lattner) Date: Thu, 20 Dec 2007 01:56:58 -0000 Subject: [llvm-commits] [llvm] r45250 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200712200156.lBK1uxLG014150@zion.cs.uiuc.edu> Author: lattner Date: Wed Dec 19 19:56:58 2007 New Revision: 45250 URL: http://llvm.org/viewvc/llvm-project?rev=45250&view=rev Log: simplify this code with the new m_Zero() pattern. Make sure the select only has a single use, and generalize it to not require N to be a constant. Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=45250&r1=45249&r2=45250&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Wed Dec 19 19:56:58 2007 @@ -2109,8 +2109,7 @@ } // add (cast *A to intptrtype) B -> - // cast (GEP (cast *A to sbyte*) B) -> - // intptrtype + // cast (GEP (cast *A to sbyte*) B) --> intptrtype { CastInst *CI = dyn_cast(LHS); Value *Other = RHS; @@ -2131,8 +2130,7 @@ } } - // add (select X 0 (sub n A)) A -> - // select X A n + // add (select X 0 (sub n A)) A --> select X A n { SelectInst *SI = dyn_cast(LHS); Value *Other = RHS; @@ -2140,25 +2138,19 @@ SI = dyn_cast(RHS); Other = LHS; } - if (SI) { + if (SI && SI->hasOneUse()) { Value *TV = SI->getTrueValue(); Value *FV = SI->getFalseValue(); - Value *A; + Value *A, *N; // Can we fold the add into the argument of the select? // We check both true and false select arguments for a matching subtract. - ConstantInt *C1, *C2; - if (match(FV, m_ConstantInt(C1)) && C1->getValue() == 0 && - match(TV, m_Sub(m_ConstantInt(C2), m_Value(A))) && - A == Other) { - // We managed to fold the add into the true select value. - return new SelectInst(SI->getCondition(), C2, A); - } else if (match(TV, m_ConstantInt(C1)) && C1->getValue() == 0 && - match(FV, m_Sub(m_ConstantInt(C2), m_Value(A))) && - A == Other) { - // We managed to fold the add into the false select value. - return new SelectInst(SI->getCondition(), A, C2); - } + if (match(FV, m_Zero()) && match(TV, m_Sub(m_Value(N), m_Value(A))) && + A == Other) // Fold the add into the true select value. + return new SelectInst(SI->getCondition(), N, A); + if (match(TV, m_Zero()) && match(FV, m_Sub(m_Value(N), m_Value(A))) && + A == Other) // Fold the add into the false select value. + return new SelectInst(SI->getCondition(), A, N); } } From evan.cheng at apple.com Wed Dec 19 20:20:53 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 20 Dec 2007 02:20:53 -0000 Subject: [llvm-commits] [llvm] r45251 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Message-ID: <200712200220.lBK2KrPf015418@zion.cs.uiuc.edu> Author: evancheng Date: Wed Dec 19 20:20:53 2007 New Revision: 45251 URL: http://llvm.org/viewvc/llvm-project?rev=45251&view=rev Log: Clean up previous patch: PHI uses should not prevent iv reuse if all other uses are addresses. This trades a constant multiply for one fewer iv. Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=45251&r1=45250&r2=45251&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Wed Dec 19 20:20:53 2007 @@ -997,8 +997,11 @@ AccessTy = SI->getOperand(0)->getType(); else if (LoadInst *LI = dyn_cast(UsersToProcess[i].Inst)) AccessTy = LI->getType(); - else if (PHINode *PN = dyn_cast(UsersToProcess[i].Inst)) - AccessTy = PN->getType(); + else if (isa(UsersToProcess[i].Inst)) { + if (AllowPHIIVReuse) + continue; + return false; + } TargetLowering::AddrMode AM; if (SCEVConstant *SC = dyn_cast(UsersToProcess[i].Imm)) @@ -1126,34 +1129,6 @@ return isAddress; } -/// isAddressUsePHI - Returns if all uses of the specified PHI node are using -/// the PHI node value as an address. -static void isAddressUsePHI(Instruction *Inst, - SmallPtrSet &Processed, - bool &Result) { - if (!Result || !Processed.insert(Inst)) - return; - - for (Value::use_iterator UI = Inst->use_begin(), E = Inst->use_end(); - UI != E; ++UI) { - Instruction *User = cast(*UI); - if (isa(User) && !Processed.count(User)) { - bool ThisResult = true; - isAddressUsePHI(User, Processed, ThisResult); - if (!ThisResult) { - Result = false; - return; - } - continue; - } - - if (!isAddressUse(User, cast(Inst))) { - Result = false; - return; - } - } -} - // CollectIVUsers - Transform our list of users and offsets to a bit more // complex table. In this new vector, each 'BasedUser' contains 'Base' the base // of the strided accessas well as the old information from Uses. We @@ -1191,6 +1166,7 @@ // instructions. If we can represent anything there, move it to the imm // fields of the BasedUsers. We do this so that it increases the commonality // of the remaining uses. + unsigned NumPHI = 0; for (unsigned i = 0, e = UsersToProcess.size(); i != e; ++i) { // If the user is not in the current loop, this means it is using the exit // value of the IV. Do not put anything in the base, make sure it's all in @@ -1204,17 +1180,16 @@ // Addressing modes can be folded into loads and stores. Be careful that // the store is through the expression, not of the expression though. - bool isPtrPHI = false; + bool isPHI = false; bool isAddress = isAddressUse(UsersToProcess[i].Inst, UsersToProcess[i].OperandValToReplace); if (isa(UsersToProcess[i].Inst)) { - SmallPtrSet Processed; - isPtrPHI = true; - isAddressUsePHI(UsersToProcess[i].Inst, Processed, isPtrPHI); + isPHI = true; + ++NumPHI; } // If this use isn't an address, then not all uses are addresses. - if (!isAddress && !(AllowPHIIVReuse && isPtrPHI)) + if (!isAddress && !(AllowPHIIVReuse && isPHI)) AllUsesAreAddresses = false; MoveImmediateValues(TLI, UsersToProcess[i].Inst, UsersToProcess[i].Base, @@ -1222,6 +1197,12 @@ } } + // If one of the use if a PHI node and all other uses are addresses, still + // allow iv reuse. Essentially we are trading one constant multiplication + // for one fewer iv. + if (NumPHI > 1) + AllUsesAreAddresses = false; + return CommonExprs; } From evan.cheng at apple.com Wed Dec 19 20:22:36 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 20 Dec 2007 02:22:36 -0000 Subject: [llvm-commits] [llvm] r45252 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Message-ID: <200712200222.lBK2MarS015528@zion.cs.uiuc.edu> Author: evancheng Date: Wed Dec 19 20:22:36 2007 New Revision: 45252 URL: http://llvm.org/viewvc/llvm-project?rev=45252&view=rev Log: Bring back a burr scheduling heuristic that's still needed. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=45252&r1=45251&r2=45252&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Wed Dec 19 20:22:36 2007 @@ -1198,6 +1198,26 @@ return MaxCycle; } +/// calcMaxScratches - Returns an cost estimate of the worse case requirement +/// for scratch registers. Live-in operands and live-out results don't count +/// since they are "fixed". +static unsigned calcMaxScratches(const SUnit *SU) { + unsigned Scratches = 0; + for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); + I != E; ++I) { + if (I->isCtrl) continue; // ignore chain preds + if (I->Dep->Node->getOpcode() != ISD::CopyFromReg) + Scratches++; + } + for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); + I != E; ++I) { + if (I->isCtrl) continue; // ignore chain succs + if (I->Dep->Node->getOpcode() != ISD::CopyToReg) + Scratches += 10; + } + return Scratches; +} + // Bottom up bool bu_ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const { // There used to be a special tie breaker here that looked for @@ -1240,14 +1260,23 @@ if (LDist < RDist) return true; else if (LDist == RDist) { - if (left->Height > right->Height) + // Intuitively, it's good to push down instructions whose results are + // liveout so their long live ranges won't conflict with other values + // which are needed inside the BB. Further prioritize liveout instructions + // by the number of operands which are calculated within the BB. + unsigned LScratch = calcMaxScratches(left); + unsigned RScratch = calcMaxScratches(right); + if (LScratch > RScratch) return true; - else if (left->Height == right->Height) - if (left->Depth < right->Depth) + else if (LScratch == RScratch) + if (left->Height > right->Height) return true; - else if (left->Depth == right->Depth) - if (left->CycleBound > right->CycleBound) + else if (left->Height == right->Height) + if (left->Depth < right->Depth) return true; + else if (left->Depth == right->Depth) + if (left->CycleBound > right->CycleBound) + return true; } } return false; From evan.cheng at apple.com Wed Dec 19 20:23:25 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 20 Dec 2007 02:23:25 -0000 Subject: [llvm-commits] [llvm] r45253 - /llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Message-ID: <200712200223.lBK2NQJ2015575@zion.cs.uiuc.edu> Author: evancheng Date: Wed Dec 19 20:23:25 2007 New Revision: 45253 URL: http://llvm.org/viewvc/llvm-project?rev=45253&view=rev Log: The physical register + virtual register joining requirement was much too strict. Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=45253&r1=45252&r2=45253&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Wed Dec 19 20:23:25 2007 @@ -396,7 +396,7 @@ unsigned JoinVReg = SrcIsPhys ? repDstReg : repSrcReg; unsigned JoinPReg = SrcIsPhys ? repSrcReg : repDstReg; const TargetRegisterClass *RC = mf_->getSSARegMap()->getRegClass(JoinVReg); - unsigned Threshold = allocatableRCRegs_[RC].count(); + unsigned Threshold = allocatableRCRegs_[RC].count() * 2; if (TheCopy.isBackEdge) Threshold *= 2; // Favors back edge copies. From evan.cheng at apple.com Wed Dec 19 20:25:24 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 20 Dec 2007 02:25:24 -0000 Subject: [llvm-commits] [llvm] r45254 - /llvm/trunk/test/CodeGen/ARM/2007-03-13-InstrSched.ll Message-ID: <200712200225.lBK2POOl015644@zion.cs.uiuc.edu> Author: evancheng Date: Wed Dec 19 20:25:21 2007 New Revision: 45254 URL: http://llvm.org/viewvc/llvm-project?rev=45254&view=rev Log: Remove xfail. This is fixed. Modified: llvm/trunk/test/CodeGen/ARM/2007-03-13-InstrSched.ll Modified: llvm/trunk/test/CodeGen/ARM/2007-03-13-InstrSched.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2007-03-13-InstrSched.ll?rev=45254&r1=45253&r2=45254&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2007-03-13-InstrSched.ll (original) +++ llvm/trunk/test/CodeGen/ARM/2007-03-13-InstrSched.ll Wed Dec 19 20:25:21 2007 @@ -1,6 +1,5 @@ ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic \ ; RUN: -mattr=+v6 -stats |& grep asm-printer | grep 41 -; XFAIL: * define void @test(i32 %tmp56222, i32 %tmp36224, i32 %tmp46223, i32 %i.0196.0.ph, i32 %tmp8, i32* %tmp1011, i32** %tmp1, i32* %d2.1.out, i32* %d3.1.out, i32* %d0.1.out, i32* %d1.1.out) { newFuncRoot: From evan.cheng at apple.com Wed Dec 19 20:46:34 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 19 Dec 2007 18:46:34 -0800 Subject: [llvm-commits] [llvm] r45250 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp In-Reply-To: <200712200156.lBK1uxLG014150@zion.cs.uiuc.edu> References: <200712200156.lBK1uxLG014150@zion.cs.uiuc.edu> Message-ID: <024A2586-18F7-4AB0-B5A9-43258BFD3B63@apple.com> Hi Chris, Are you forgetting PatternMatch.h? m_Zero isn't defined anywhere. Evan On Dec 19, 2007, at 5:56 PM, Chris Lattner wrote: > Author: lattner > Date: Wed Dec 19 19:56:58 2007 > New Revision: 45250 > > URL: http://llvm.org/viewvc/llvm-project?rev=45250&view=rev > Log: > simplify this code with the new m_Zero() pattern. Make sure the > select only > has a single use, and generalize it to not require N to be a constant. > > > Modified: > llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp > > Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/ > Scalar/InstructionCombining.cpp?rev=45250&r1=45249&r2=45250&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp > (original) > +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Wed > Dec 19 19:56:58 2007 > @@ -2109,8 +2109,7 @@ > } > > // add (cast *A to intptrtype) B -> > - // cast (GEP (cast *A to sbyte*) B) -> > - // intptrtype > + // cast (GEP (cast *A to sbyte*) B) --> intptrtype > { > CastInst *CI = dyn_cast(LHS); > Value *Other = RHS; > @@ -2131,8 +2130,7 @@ > } > } > > - // add (select X 0 (sub n A)) A -> > - // select X A n > + // add (select X 0 (sub n A)) A --> select X A n > { > SelectInst *SI = dyn_cast(LHS); > Value *Other = RHS; > @@ -2140,25 +2138,19 @@ > SI = dyn_cast(RHS); > Other = LHS; > } > - if (SI) { > + if (SI && SI->hasOneUse()) { > Value *TV = SI->getTrueValue(); > Value *FV = SI->getFalseValue(); > - Value *A; > + Value *A, *N; > > // Can we fold the add into the argument of the select? > // We check both true and false select arguments for a > matching subtract. > - ConstantInt *C1, *C2; > - if (match(FV, m_ConstantInt(C1)) && C1->getValue() == 0 && > - match(TV, m_Sub(m_ConstantInt(C2), m_Value(A))) && > - A == Other) { > - // We managed to fold the add into the true select value. > - return new SelectInst(SI->getCondition(), C2, A); > - } else if (match(TV, m_ConstantInt(C1)) && C1->getValue() == > 0 && > - match(FV, m_Sub(m_ConstantInt(C2), m_Value(A))) && > - A == Other) { > - // We managed to fold the add into the false select value. > - return new SelectInst(SI->getCondition(), A, C2); > - } > + if (match(FV, m_Zero()) && match(TV, m_Sub(m_Value(N), > m_Value(A))) && > + A == Other) // Fold the add into the true select value. > + return new SelectInst(SI->getCondition(), N, A); > + if (match(TV, m_Zero()) && match(FV, m_Sub(m_Value(N), > m_Value(A))) && > + A == Other) // Fold the add into the false select value. > + return new SelectInst(SI->getCondition(), A, N); > } > } > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From sabre at nondot.org Wed Dec 19 22:47:45 2007 From: sabre at nondot.org (Chris Lattner) Date: Thu, 20 Dec 2007 04:47:45 -0000 Subject: [llvm-commits] [llvm] r45255 - /llvm/trunk/include/llvm/Support/PatternMatch.h Message-ID: <200712200447.lBK4ljwF023022@zion.cs.uiuc.edu> Author: lattner Date: Wed Dec 19 22:47:44 2007 New Revision: 45255 URL: http://llvm.org/viewvc/llvm-project?rev=45255&view=rev Log: Add m_Zero(). Modified: llvm/trunk/include/llvm/Support/PatternMatch.h Modified: llvm/trunk/include/llvm/Support/PatternMatch.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/PatternMatch.h?rev=45255&r1=45254&r2=45255&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/PatternMatch.h (original) +++ llvm/trunk/include/llvm/Support/PatternMatch.h Wed Dec 19 22:47:44 2007 @@ -46,9 +46,24 @@ bool match(ITy *V) { return isa(V); } }; +/// m_Value() - Match an arbitrary value and ignore it. inline leaf_ty m_Value() { return leaf_ty(); } +/// m_ConstantInt() - Match an arbitrary ConstantInt and ignore it. inline leaf_ty m_ConstantInt() { return leaf_ty(); } +struct zero_ty { + template + bool match(ITy *V) { + if (const Constant *C = dyn_cast(V)) + return C->isNullValue(); + return false; + } +}; + +/// m_Zero() - Match an arbitrary zero/null constant. +inline zero_ty m_Zero() { return zero_ty(); } + + template struct bind_ty { Class *&VR; @@ -64,7 +79,10 @@ } }; +/// m_Value - Match a value, capturing it if we match. inline bind_ty m_Value(Value *&V) { return V; } + +/// m_ConstantInt - Match a ConstantInt, capturing the value if we match. inline bind_ty m_ConstantInt(ConstantInt *&CI) { return CI; } //===----------------------------------------------------------------------===// From clattner at apple.com Wed Dec 19 22:47:55 2007 From: clattner at apple.com (Chris Lattner) Date: Wed, 19 Dec 2007 20:47:55 -0800 Subject: [llvm-commits] [llvm] r45250 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp In-Reply-To: <024A2586-18F7-4AB0-B5A9-43258BFD3B63@apple.com> References: <200712200156.lBK1uxLG014150@zion.cs.uiuc.edu> <024A2586-18F7-4AB0-B5A9-43258BFD3B63@apple.com> Message-ID: On Dec 19, 2007, at 6:46 PM, Evan Cheng wrote: > Hi Chris, > > Are you forgetting PatternMatch.h? m_Zero isn't defined anywhere. Doh, committed. Sorry for the breakage, -Chris From christopher.lamb at gmail.com Wed Dec 19 23:48:39 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Wed, 19 Dec 2007 21:48:39 -0800 Subject: [llvm-commits] [llvm] r45173 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp In-Reply-To: <4793AE07-4C1B-42FE-B3DA-1A36055EB6EB@apple.com> References: <200712182132.lBILWLpr014358@zion.cs.uiuc.edu> <4793AE07-4C1B-42FE-B3DA-1A36055EB6EB@apple.com> Message-ID: <318BF0D7-1ED8-4710-A552-303760310BBF@gmail.com> On Dec 19, 2007, at 5:15 PM, Chris Lattner wrote: > On Dec 19, 2007, at 5:10 PM, Chris Lattner wrote: >> Finally, is "m" really required to be a constant? This xform seems >> valid for any "m" and "A", and more general is good. > > Incidentally, in the spirit of generalizing this, it seems like these > are also valid forms of the same thing: > > (icmp lt (sub a, b), 1) > (icmp sgt (sub a, b), -1) > > Instcombine will canonicalize (sle x, 0) -> (slt x, 1) and (sge x, > 0) -> (sgt x, -1), so these extra cases are worth handling. I just noticed that the CFE is fond of producing these. I agree they're worth having. -- Christopher Lamb -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20071219/f15a9f0c/attachment.html From christopher.lamb at gmail.com Thu Dec 20 01:21:11 2007 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Thu, 20 Dec 2007 07:21:11 -0000 Subject: [llvm-commits] [llvm] r45256 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/2007-12-19-IcmpSub.ll Message-ID: <200712200721.lBK7LCpM031740@zion.cs.uiuc.edu> Author: clamb Date: Thu Dec 20 01:21:11 2007 New Revision: 45256 URL: http://llvm.org/viewvc/llvm-project?rev=45256&view=rev Log: Implement review feedback, including additional transforms (icmp slt (sub A B) 1) -> (icmp sle A B) icmp sgt (sub A B) -1) -> (icmp sge A B) and add testcase. Added: llvm/trunk/test/Transforms/InstCombine/2007-12-19-IcmpSub.ll Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=45256&r1=45255&r2=45256&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Thu Dec 20 01:21:11 2007 @@ -4785,23 +4785,6 @@ if (isa(Op1)) // X icmp undef -> undef return ReplaceInstUsesWith(I, UndefValue::get(Type::Int1Ty)); - - // (icmp cond (sub m A) 0) -> - // (icmp cond m A) - { - ConstantInt *C1, *C2; - Value *A; - // Check both arguments of the compare for a matching subtract. - if (match(Op0, m_ConstantInt(C1)) && C1->getValue() == 0 && - match(Op1, m_Sub(m_ConstantInt(C2), m_Value(A)))) { - // We managed to fold the add into the RHS of the select condition. - return new ICmpInst(I.getPredicate(), A, C2); - } else if (match(Op1, m_ConstantInt(C1)) && C1->getValue() == 0 && - match(Op0, m_Sub(m_ConstantInt(C2), m_Value(A)))) { - // We managed to fold the add into the LHS of the select condition. - return new ICmpInst(I.getPredicate(), C2, A); - } - } // icmp , - Global/Stack value // addresses never equal each other! We already know that Op0 != Op1. @@ -4850,6 +4833,12 @@ // See if we are doing a comparison between a constant and an instruction that // can be folded into the comparison. if (ConstantInt *CI = dyn_cast(Op1)) { + Value *A, *B; + + // (icmp cond (sub A B) 0) -> (icmp cond A B) + if (CI->isNullValue() && match(Op0, m_Sub(m_Value(A), m_Value(B)))) + return new ICmpInst(I.getPredicate(), A, B); + switch (I.getPredicate()) { default: break; case ICmpInst::ICMP_ULT: // A FALSE @@ -4873,6 +4862,10 @@ return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1); if (isMinValuePlusOne(CI,true)) // A A == MIN return new ICmpInst(ICmpInst::ICMP_EQ, Op0, SubOne(CI)); + + // (icmp slt (sub A B) 1) -> (icmp sle A B) + if (CI->isOne() && match(Op0, m_Sub(m_Value(A), m_Value(B)))) + return new ICmpInst(ICmpInst::ICMP_SLE, A, B); break; case ICmpInst::ICMP_UGT: @@ -4896,6 +4889,11 @@ return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1); if (isMaxValueMinusOne(CI, true)) // A >s MAX-1 -> A == MAX return new ICmpInst(ICmpInst::ICMP_EQ, Op0, AddOne(CI)); + + // (icmp sgt (sub A B) -1) -> (icmp sge A B) + if (CI->getValue().getSExtValue() == -1 && + match(Op0, m_Sub(m_Value(A), m_Value(B)))) + return new ICmpInst(ICmpInst::ICMP_SGE, A, B); break; case ICmpInst::ICMP_ULE: Added: llvm/trunk/test/Transforms/InstCombine/2007-12-19-IcmpSub.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2007-12-19-IcmpSub.ll?rev=45256&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2007-12-19-IcmpSub.ll (added) +++ llvm/trunk/test/Transforms/InstCombine/2007-12-19-IcmpSub.ll Thu Dec 20 01:21:11 2007 @@ -0,0 +1,25 @@ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep {sub} + +define i32 @foo(i32 %a) { +entry: + %tmp2 = sub i32 99, %a ; [#uses=1] + %tmp3 = icmp sgt i32 %tmp2, -1 ; [#uses=1] + %retval = select i1 %tmp3, i32 %a, i32 0 ; [#uses=1] + ret i32 %retval +} + +define i32 @bar(i32 %a) { +entry: + %tmp2 = sub i32 99, %a ; [#uses=1] + %tmp3 = icmp sge i32 %tmp2, 0; [#uses=1] + %retval = select i1 %tmp3, i32 %a, i32 0 ; [#uses=1] + ret i32 %retval +} + +define i32 @baz(i32 %a) { +entry: + %tmp2 = sub i32 99, %a ; [#uses=1] + %tmp3 = icmp slt i32 %tmp2, 1 ; [#uses=1] + %retval = select i1 %tmp3, i32 %a, i32 0 ; [#uses=1] + ret i32 %retval +} \ No newline at end of file From dalej at apple.com Thu Dec 20 01:46:04 2007 From: dalej at apple.com (Dale Johannesen) Date: Thu, 20 Dec 2007 07:46:04 -0000 Subject: [llvm-commits] [test-suite] r45258 - /test-suite/trunk/Makefile.programs Message-ID: <200712200746.lBK7k4jw000869@zion.cs.uiuc.edu> Author: johannes Date: Thu Dec 20 01:46:03 2007 New Revision: 45258 URL: http://llvm.org/viewvc/llvm-project?rev=45258&view=rev Log: Enable unwinding EH on PPC and x86. Damn the torpedos. Modified: test-suite/trunk/Makefile.programs Modified: test-suite/trunk/Makefile.programs URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=45258&r1=45257&r2=45258&view=diff ============================================================================== --- test-suite/trunk/Makefile.programs (original) +++ test-suite/trunk/Makefile.programs Thu Dec 20 01:46:03 2007 @@ -310,9 +310,18 @@ # If the program requires exception handling support, enable (potentially # expensive) support for it. ifdef REQUIRES_EH_SUPPORT +# PPC and X86 support DWARF exceptions, for everything else, default to SJLJ +ifeq ($(ARCH),PowerPC) +LLCFLAGS += -enable-eh +else +ifeq ($(ARCH),x86) +LLCFLAGS += -enable-eh +else LLCFLAGS += -enable-correct-eh-support LLVMLD_FLAGS += -disable-inlining endif +endif +endif # Pass target specific llc flags ifdef TARGET_LLCFLAGS From evan.cheng at apple.com Thu Dec 20 03:25:32 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 20 Dec 2007 09:25:32 -0000 Subject: [llvm-commits] [llvm] r45259 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Message-ID: <200712200925.lBK9PWxp014883@zion.cs.uiuc.edu> Author: evancheng Date: Thu Dec 20 03:25:31 2007 New Revision: 45259 URL: http://llvm.org/viewvc/llvm-project?rev=45259&view=rev Log: More accurate checks for two-address constraints. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=45259&r1=45258&r2=45259&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Thu Dec 20 03:25:31 2007 @@ -1064,9 +1064,11 @@ std::vector SethiUllmanNumbers; const TargetInstrInfo *TII; + const MRegisterInfo *MRI; public: - explicit BURegReductionPriorityQueue(const TargetInstrInfo *tii) - : TII(tii) {} + explicit BURegReductionPriorityQueue(const TargetInstrInfo *tii, + const MRegisterInfo *mri) + : TII(tii), MRI(mri) {} void initNodes(DenseMap > &sumap, std::vector &sunits) { @@ -1314,6 +1316,33 @@ return false; } +/// canClobberPhysRegDefs - True if SU would clobber one of SuccSU's +/// physical register def. +static bool canClobberPhysRegDefs(SUnit *SuccSU, SUnit *SU, + const TargetInstrInfo *TII, + const MRegisterInfo *MRI) { + SDNode *N = SuccSU->Node; + unsigned NumDefs = TII->getNumDefs(N->getTargetOpcode()); + const unsigned *ImpDefs = TII->getImplicitDefs(N->getTargetOpcode()); + if (!ImpDefs) + return false; + const unsigned *SUImpDefs = TII->getImplicitDefs(SU->Node->getTargetOpcode()); + if (!SUImpDefs) + return false; + for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { + MVT::ValueType VT = N->getValueType(i); + if (VT == MVT::Flag || VT == MVT::Other) + continue; + unsigned Reg = ImpDefs[i - NumDefs]; + for (;*SUImpDefs; ++SUImpDefs) { + unsigned SUReg = *SUImpDefs; + if (MRI->regsOverlap(Reg, SUReg)) + return true; + } + } + return false; +} + /// AddPseudoTwoAddrDeps - If two nodes share an operand and one of them uses /// it as a def&use operand. Add a pseudo control edge from it to the other /// node (if it won't create a cycle) so the two-address one will be scheduled @@ -1346,18 +1375,20 @@ I != E; ++I) { if (I->isCtrl) continue; SUnit *SuccSU = I->Dep; - // Don't constrain nodes with implicit defs. It can create cycles - // plus it may increase register pressures. - if (SuccSU == SU || SuccSU->hasPhysRegDefs) + if (SuccSU == SU) continue; // Be conservative. Ignore if nodes aren't at roughly the same // depth and height. if (SuccSU->Height < SU->Height && (SU->Height - SuccSU->Height) > 1) continue; - if (SuccSU->Depth > SU->Depth && (SuccSU->Depth - SU->Depth) > 1) - continue; if (!SuccSU->Node || !SuccSU->Node->isTargetOpcode()) continue; + // Don't constrain nodes with physical register defs if the + // predecessor can cloober them. + if (SuccSU->hasPhysRegDefs) { + if (canClobberPhysRegDefs(SuccSU, SU, TII, MRI)) + continue; + } // Don't constraint extract_subreg / insert_subreg these may be // coalesced away. We don't them close to their uses. unsigned SuccOpc = SuccSU->Node->getTargetOpcode(); @@ -1547,8 +1578,9 @@ SelectionDAG *DAG, MachineBasicBlock *BB) { const TargetInstrInfo *TII = DAG->getTarget().getInstrInfo(); + const MRegisterInfo *MRI = DAG->getTarget().getRegisterInfo(); return new ScheduleDAGRRList(*DAG, BB, DAG->getTarget(), true, - new BURegReductionPriorityQueue(TII)); + new BURegReductionPriorityQueue(TII, MRI)); } llvm::ScheduleDAG* llvm::createTDRRListDAGScheduler(SelectionDAGISel *IS, From evan.cheng at apple.com Thu Dec 20 03:35:28 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 20 Dec 2007 09:35:28 -0000 Subject: [llvm-commits] [llvm] r45260 - /llvm/trunk/include/llvm/IntrinsicsX86.td Message-ID: <200712200935.lBK9ZS4d015256@zion.cs.uiuc.edu> Author: evancheng Date: Thu Dec 20 03:35:28 2007 New Revision: 45260 URL: http://llvm.org/viewvc/llvm-project?rev=45260&view=rev Log: Type specification didn't match gcc's. Modified: llvm/trunk/include/llvm/IntrinsicsX86.td Modified: llvm/trunk/include/llvm/IntrinsicsX86.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsX86.td?rev=45260&r1=45259&r2=45260&view=diff ============================================================================== --- llvm/trunk/include/llvm/IntrinsicsX86.td (original) +++ llvm/trunk/include/llvm/IntrinsicsX86.td Thu Dec 20 03:35:28 2007 @@ -341,7 +341,7 @@ llvm_i32_ty], [IntrNoMem]>; def int_x86_sse2_psra_w : GCCBuiltin<"__builtin_ia32_psraw128">, Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, - llvm_v4i32_ty], [IntrNoMem]>; + llvm_v8i16_ty], [IntrNoMem]>; def int_x86_sse2_psra_d : GCCBuiltin<"__builtin_ia32_psrad128">, Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>; From duncan.sands at math.u-psud.fr Thu Dec 20 04:05:08 2007 From: duncan.sands at math.u-psud.fr (Duncan Sands) Date: Thu, 20 Dec 2007 11:05:08 +0100 Subject: [llvm-commits] =?iso-8859-1?q?=5Bllvm=5D_r45221=09-_/llvm/trunk/l?= =?iso-8859-1?q?ib/Target/PowerPC/PPCTargetAsmInfo=2Ecpp?= In-Reply-To: <7812C605-BF1D-4D91-9007-2927BE76AD63@apple.com> References: <200712192154.lBJLsbsA001971@zion.cs.uiuc.edu> <42C94773-9CB1-4EBD-95A7-FFC10FEB5F92@apple.com> <7812C605-BF1D-4D91-9007-2927BE76AD63@apple.com> Message-ID: <200712201105.08798.duncan.sands@math.u-psud.fr> > > The EH will work (modulo bugs) if you pass -enable-eh; however, > > the top-level Makefile currently sets -enable-correct-eh-support. > > What is the difference these days? Should the top-level makefile be > changed? They are not at all the same: -enable-eh turns on dwarf eh support, while -enable-correct-eh-support turns on sj/lj lowering. If you turn on both than you get -enable-eh on all targets, whether or not it supports dwarf eh (check out LLVMTargetMachine.cpp: the LowerInvoke pass is only scheduled if -enable-eh is not turned on). This is kind of problematic because in the testsuite we really want: -enable-eh on targets that support dwarf eh, and -enable-correct-eh-support otherwise. Presumably what needs to be done is: pass both options in the Makefile, and schedule a LowerInvoke pass if the target does not support dwarf eh or -enable-eh is not turned on. (The LowerInvoke pass itself returns without doing anything if -enable-correct-eh-support is not turned on). Ciao, Duncan. From sabre at nondot.org Thu Dec 20 13:14:03 2007 From: sabre at nondot.org (Chris Lattner) Date: Thu, 20 Dec 2007 19:14:03 -0000 Subject: [llvm-commits] [llvm] r45261 - /llvm/trunk/include/llvm/ADT/OwningPtr.h Message-ID: <200712201914.lBKJE3jU022572@zion.cs.uiuc.edu> Author: lattner Date: Thu Dec 20 13:14:02 2007 New Revision: 45261 URL: http://llvm.org/viewvc/llvm-project?rev=45261&view=rev Log: add new smart pointer for clang. Added: llvm/trunk/include/llvm/ADT/OwningPtr.h Added: llvm/trunk/include/llvm/ADT/OwningPtr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/OwningPtr.h?rev=45261&view=auto ============================================================================== --- llvm/trunk/include/llvm/ADT/OwningPtr.h (added) +++ llvm/trunk/include/llvm/ADT/OwningPtr.h Thu Dec 20 13:14:02 2007 @@ -0,0 +1,79 @@ +//===- llvm/ADT/OwningPtr.h - Smart ptr that owns the pointee ---*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by Chris Lattner and is distributed under the +// University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines and implements the OwningPtr class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_OWNING_PTR_H +#define LLVM_ADT_OWNING_PTR_H + +#include + +namespace llvm { + +/// OwningPtr smart pointer - OwningPtr mimics a built-in pointer except that it +/// guarantees deletion of the object pointed to, either on destruction of the +/// OwningPtr or via an explicit reset(). Once created, ownership of the +/// pointee object can be taken away from OwningPtr by using the take method. +template +class OwningPtr { + OwningPtr(OwningPtr const &); // DO NOT IMPLEMENT + OwningPtr &operator=(OwningPtr const &); // DO NOT IMPLEMENT + T *Ptr; +public: + explicit OwningPtr(T *P = 0) : Ptr(P) {} + + ~OwningPtr() { + delete Ptr; + } + + /// reset - Change the current pointee to the specified pointer. Note that + /// calling this with any pointer (including a null pointer) deletes the + /// current pointer. + void reset(T *P = 0) { + if (P == Ptr) return; + T *Tmp = Ptr; + Ptr = P; + delete Tmp; + } + + /// take - Reset the owning pointer to null and return its pointer. This does + /// not delete the pointer before returning it. + T *take() { + T *Tmp = Ptr; + Ptr = 0; + return Tmp; + } + + T &operator*() const { + assert(Ptr && "Cannot dereference null pointer"); + return *Ptr; + } + + T *operator->() const { return Ptr; } + T *get() const { return Ptr; } + operator bool() const { return Ptr != 0; } + bool operator!() const { return Ptr == 0; } + + void swap(OwningPtr &RHS) { + T *Tmp = RHS.Ptr; + RHS.Ptr = Ptr; + Ptr = Tmp; + } +}; + +template +inline void swap(OwningPtr &a, OwningPtr &b) { + a.swap(b); +} + +} // end namespace llvm + +#endif From criswell at uiuc.edu Thu Dec 20 13:47:16 2007 From: criswell at uiuc.edu (John Criswell) Date: Thu, 20 Dec 2007 19:47:16 -0000 Subject: [llvm-commits] [poolalloc] r45264 - /poolalloc/trunk/lib/DSA/StdLibPass.cpp Message-ID: <200712201947.lBKJlGOr024169@zion.cs.uiuc.edu> Author: criswell Date: Thu Dec 20 13:47:14 2007 New Revision: 45264 URL: http://llvm.org/viewvc/llvm-project?rev=45264&view=rev Log: Updated to use PointerType::getUnqual() to get pointer types. Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/StdLibPass.cpp?rev=45264&r1=45263&r2=45264&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/StdLibPass.cpp (original) +++ poolalloc/trunk/lib/DSA/StdLibPass.cpp Thu Dec 20 13:47:14 2007 @@ -121,7 +121,7 @@ // argument node. DSNodeHandle& EndNH = Graph.getNodeForValue(&*(++(I->arg_begin()))); EndNH.getNode()->clearNodeFlags()->setModifiedMarker(); - EndNH.getNode()->mergeTypeInfo(PointerType::get(Type::Int8Ty), + EndNH.getNode()->mergeTypeInfo(PointerType::getUnqual(Type::Int8Ty), EndNH.getOffset(), false); DSNodeHandle &Link = EndNH.getLink(0); Link.mergeWith(Str); From kremenek at apple.com Thu Dec 20 13:53:48 2007 From: kremenek at apple.com (Ted Kremenek) Date: Thu, 20 Dec 2007 19:53:48 -0000 Subject: [llvm-commits] [llvm] r45266 - /llvm/trunk/include/llvm/ADT/OwningPtr.h Message-ID: <200712201953.lBKJrmdB024541@zion.cs.uiuc.edu> Author: kremenek Date: Thu Dec 20 13:53:47 2007 New Revision: 45266 URL: http://llvm.org/viewvc/llvm-project?rev=45266&view=rev Log: Added OwningArrayPtr smart pointer class to provide an analogous class to OwningPtr except that it works for pointers to arrays. Modified: llvm/trunk/include/llvm/ADT/OwningPtr.h Modified: llvm/trunk/include/llvm/ADT/OwningPtr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/OwningPtr.h?rev=45266&r1=45265&r2=45266&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/OwningPtr.h (original) +++ llvm/trunk/include/llvm/ADT/OwningPtr.h Thu Dec 20 13:53:47 2007 @@ -74,6 +74,60 @@ a.swap(b); } +/// OwningArrayPtr smart pointer - OwningArrayPtr provides the same +/// functionality as OwningPtr, except that it works for array types. +template +class OwningArrayPtr { + OwningArrayPtr(OwningArrayPtr const &); // DO NOT IMPLEMENT + OwningArrayPtr &operator=(OwningArrayPtr const &); // DO NOT IMPLEMENT + T *Ptr; +public: + explicit OwningArrayPtr(T *P = 0) : Ptr(P) {} + + ~OwningArrayPtr() { + delete [] Ptr; + } + + /// reset - Change the current pointee to the specified pointer. Note that + /// calling this with any pointer (including a null pointer) deletes the + /// current pointer. + void reset(T *P = 0) { + if (P == Ptr) return; + T *Tmp = Ptr; + Ptr = P; + delete Tmp; + } + + /// take - Reset the owning pointer to null and return its pointer. This does + /// not delete the pointer before returning it. + T *take() { + T *Tmp = Ptr; + Ptr = 0; + return Tmp; + } + + T &operator[](std::ptrdiff_t i) const { + assert(Ptr && "Cannot dereference null pointer"); + return Ptr[i]; + } + + T *get() const { return Ptr; } + operator bool() const { return Ptr != 0; } + bool operator!() const { return Ptr == 0; } + + void swap(OwningArrayPtr &RHS) { + T *Tmp = RHS.Ptr; + RHS.Ptr = Ptr; + Ptr = Tmp; + } +}; + +template +inline void swap(OwningArrayPtr &a, OwningArrayPtr &b) { + a.swap(b); +} + + } // end namespace llvm #endif From criswell at uiuc.edu Thu Dec 20 13:56:51 2007 From: criswell at uiuc.edu (John Criswell) Date: Thu, 20 Dec 2007 19:56:51 -0000 Subject: [llvm-commits] [poolalloc] r45267 - in /poolalloc/trunk/lib/PoolAllocate: AccessTrace.cpp Heuristic.cpp PointerCompress.cpp PoolAllocate.cpp PoolOptimize.cpp TransformFunctionBody.cpp Message-ID: <200712201956.lBKJupM0024832@zion.cs.uiuc.edu> Author: criswell Date: Thu Dec 20 13:56:51 2007 New Revision: 45267 URL: http://llvm.org/viewvc/llvm-project?rev=45267&view=rev Log: Updated code to use PointerType::getUnqual() to get pointer types. Disabled the dependence of the ConvertUnsafeAllocas pass; this appears to be a performance hack that is not strictly needed and should be implemented within the SAFECode passes. Modified: poolalloc/trunk/lib/PoolAllocate/AccessTrace.cpp poolalloc/trunk/lib/PoolAllocate/Heuristic.cpp poolalloc/trunk/lib/PoolAllocate/PointerCompress.cpp poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp poolalloc/trunk/lib/PoolAllocate/PoolOptimize.cpp poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Modified: poolalloc/trunk/lib/PoolAllocate/AccessTrace.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/AccessTrace.cpp?rev=45267&r1=45266&r2=45267&view=diff ============================================================================== --- poolalloc/trunk/lib/PoolAllocate/AccessTrace.cpp (original) +++ poolalloc/trunk/lib/PoolAllocate/AccessTrace.cpp Thu Dec 20 13:56:51 2007 @@ -63,7 +63,7 @@ } void PoolAccessTrace::InitializeLibraryFunctions(Module &M) { - VoidPtrTy = PointerType::get(Type::Int8Ty); + VoidPtrTy = PointerType::getUnqual(Type::Int8Ty); AccessTraceInitFn = M.getOrInsertFunction("poolaccesstraceinit", Type::VoidTy,NULL); Modified: poolalloc/trunk/lib/PoolAllocate/Heuristic.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/Heuristic.cpp?rev=45267&r1=45266&r2=45267&view=diff ============================================================================== --- poolalloc/trunk/lib/PoolAllocate/Heuristic.cpp (original) +++ poolalloc/trunk/lib/PoolAllocate/Heuristic.cpp Thu Dec 20 13:56:51 2007 @@ -311,7 +311,7 @@ } else if (N->isArray() && !N->isNodeCompletelyFolded()) { // We never pool allocate array nodes. PoolDescriptors[N] = - Constant::getNullValue(PointerType::get(PoolDescType)); + Constant::getNullValue(PointerType::getUnqual(PoolDescType)); ++NumNonprofit; #endif } else { @@ -349,7 +349,7 @@ // If this node has predecessors that are in different pools, don't // pool allocate this node. PoolDescriptors[N] = - Constant::getNullValue(PointerType::get(PoolDescType)); + Constant::getNullValue(PointerType::getUnqual(PoolDescType)); ++NumNonprofit; } else if (PredPool) { // If all of the predecessors of this node are already in a pool, @@ -370,7 +370,7 @@ // reason to pool allocate it, don't. assert(PredPool == 0); PoolDescriptors[N] = - Constant::getNullValue(PointerType::get(PoolDescType)); + Constant::getNullValue(PointerType::getUnqual(PoolDescType)); ++NumNonprofit; } } Modified: poolalloc/trunk/lib/PoolAllocate/PointerCompress.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PointerCompress.cpp?rev=45267&r1=45266&r2=45267&view=diff ============================================================================== --- poolalloc/trunk/lib/PoolAllocate/PointerCompress.cpp (original) +++ poolalloc/trunk/lib/PoolAllocate/PointerCompress.cpp Thu Dec 20 13:56:51 2007 @@ -690,7 +690,7 @@ // The compressed type for the pool. FIXME: NOTE: This only works if 'Val' // pointed to the start of a node! - const Type *NTy = PointerType::get(PI->getNewType()); + const Type *NTy = PointerType::getUnqual(PI->getNewType()); //Check if we have a pointer to an array of Original Types this happens if //you do a malloc of [n x OrigTy] for a pool of Type OrigTy @@ -699,7 +699,7 @@ cast(GEPI.getOperand(0)->getType())->getElementType(); if(isa(PT)) { if (cast(PT)->getElementType() == PI->getNode()->getType()) - NTy = PointerType::get(ArrayType::get(PI->getNewType(), + NTy = PointerType::getUnqual(ArrayType::get(PI->getNewType(), cast(PT)->getNumElements())); } } @@ -776,7 +776,7 @@ Value *SrcPtr = new GetElementPtrInst(BasePtr, Ops, LI.getOperand(0)->getName()+".pp", &LI); const Type *DestTy = LoadingCompressedPtr ? MEMUINTTYPE : LI.getType(); - SrcPtr = CastInst::createPointerCast(SrcPtr, PointerType::get(DestTy), + SrcPtr = CastInst::createPointerCast(SrcPtr, PointerType::getUnqual(DestTy), SrcPtr->getName(), &LI); std::string OldName = LI.getName(); LI.setName(""); Value *NewLoad = new LoadInst(SrcPtr, OldName, &LI); @@ -843,7 +843,7 @@ SI.getOperand(1)->getName()+".pp", &SI); DestPtr = CastInst::createPointerCast(DestPtr, - PointerType::get(SrcVal->getType()), + PointerType::getUnqual(SrcVal->getType()), DestPtr->getName(), &SI); new StoreInst(SrcVal, DestPtr, &SI); @@ -1498,8 +1498,8 @@ /// InitializePoolLibraryFunctions - Create the function prototypes for pointer /// compress runtime library functions. void PointerCompress::InitializePoolLibraryFunctions(Module &M) { - const Type *VoidPtrTy = PointerType::get(Type::Int8Ty); - const Type *PoolDescPtrTy = PointerType::get(ArrayType::get(VoidPtrTy, 16)); + const Type *VoidPtrTy = PointerType::getUnqual(Type::Int8Ty); + const Type *PoolDescPtrTy = PointerType::getUnqual(ArrayType::get(VoidPtrTy, 16)); PoolInitPC = M.getOrInsertFunction("poolinit_pc", VoidPtrTy, PoolDescPtrTy, Type::Int32Ty, Type::Int32Ty, NULL); Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp?rev=45267&r1=45266&r2=45267&view=diff ============================================================================== --- poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp (original) +++ poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Thu Dec 20 13:56:51 2007 @@ -88,19 +88,16 @@ } void PoolAllocate::getAnalysisUsage(AnalysisUsage &AU) const { -#ifdef SAFECODE - AU.addRequired(); -#endif - AU.addRequired(); + AU.addRequiredTransitive(); AU.addPreserved(); #ifdef SAFECODE //Dinakar for preserving the pool information across passes AU.setPreservesAll(); #endif -#ifdef BOUNDS_CHECK +#ifdef BOUNDS_CHECK //Dinakar hack for preserving the pool information across passes AU.setPreservesAll(); -#endif +#endif AU.addRequired(); if (UseTDResolve) AU.addRequired(); @@ -109,7 +106,9 @@ bool PoolAllocate::runOnModule(Module &M) { if (M.begin() == M.end()) return false; #ifdef SAFECODE +#if 0 CUAPass = &getAnalysis(); +#endif #endif CurModule = &M; ECGraphs = &getAnalysis(); // folded inlined CBU graphs @@ -183,13 +182,13 @@ void PoolAllocate::AddPoolPrototypes() { if (VoidPtrTy == 0) { // NOTE: If these are changed, make sure to update PoolOptimize.cpp as well! - VoidPtrTy = PointerType::get(Type::Int8Ty); + VoidPtrTy = PointerType::getUnqual(Type::Int8Ty); #ifdef SAFECODE PoolDescType = ArrayType::get(VoidPtrTy, 50); #else PoolDescType = ArrayType::get(VoidPtrTy, 16); #endif - PoolDescPtrTy = PointerType::get(PoolDescType); + PoolDescPtrTy = PointerType::getUnqual(PoolDescType); } CurModule->addTypeName("PoolDescriptor", PoolDescType); @@ -514,7 +513,7 @@ // Any unallocated DSNodes get null pool descriptor pointers. for (hash_set::iterator I = GlobalHeapNodes.begin(), E = GlobalHeapNodes.end(); I != E; ++I) { - GlobalNodes[*I] = Constant::getNullValue(PointerType::get(PoolDescType)); + GlobalNodes[*I] = Constant::getNullValue(PointerType::getUnqual(PoolDescType)); ++NumNonprofit; } @@ -617,7 +616,7 @@ // Any unallocated DSNodes get null pool descriptor pointers. for (std::set::iterator I = UnallocatedNodes.begin(), E = UnallocatedNodes.end(); I != E; ++I) { - PoolDescriptors[*I] =Constant::getNullValue(PointerType::get(PoolDescType)); + PoolDescriptors[*I] =Constant::getNullValue(PointerType::getUnqual(PoolDescType)); ++NumNonprofit; } } Modified: poolalloc/trunk/lib/PoolAllocate/PoolOptimize.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolOptimize.cpp?rev=45267&r1=45266&r2=45267&view=diff ============================================================================== --- poolalloc/trunk/lib/PoolAllocate/PoolOptimize.cpp (original) +++ poolalloc/trunk/lib/PoolAllocate/PoolOptimize.cpp Thu Dec 20 13:56:51 2007 @@ -50,8 +50,8 @@ } bool PoolOptimize::runOnModule(Module &M) { - const Type *VoidPtrTy = PointerType::get(Type::Int8Ty); - const Type *PoolDescPtrTy = PointerType::get(ArrayType::get(VoidPtrTy, 16)); + const Type *VoidPtrTy = PointerType::getUnqual(Type::Int8Ty); + const Type *PoolDescPtrTy = PointerType::getUnqual(ArrayType::get(VoidPtrTy, 16)); // Get poolinit function. Modified: poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp?rev=45267&r1=45266&r2=45267&view=diff ============================================================================== --- poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp (original) +++ poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Thu Dec 20 13:56:51 2007 @@ -203,7 +203,18 @@ if (MI.isArrayAllocation()) AllocSize = BinaryOperator::create(Instruction::Mul, AllocSize, MI.getOperand(0), "sizetmp", &MI); +// +// NOTE: +// The code below used to be used by SAFECode. However, it requires +// Pool Allocation to depend upon SAFECode passes, which is messy. +// +// I believe the code below is an unneeded optimization. Basically, when +// SAFECode promotes a stack allocation to the heap, this makes it a stack +// allocation again if the DSNode has no heap allocations. This seems to be +// a performance optimization and unnecessary for the first prototype. +// #ifdef SAFECODE +#if 0 const MallocInst *originalMalloc = &MI; if (FI.NewToOldValueMap.count(&MI)) { originalMalloc = cast(FI.NewToOldValueMap[&MI]); @@ -218,8 +229,8 @@ MI.getParent()->getInstList().erase(&MI); Value *Casted = AI; Instruction *aiNext = AI->getNext(); - if (AI->getType() != PointerType::get(Type::Int8Ty)) - Casted = CastInst::createPointerCast(AI, PointerType::get(Type::Int8Ty), + if (AI->getType() != PointerType::getUnqual(Type::Int8Ty)) + Casted = CastInst::createPointerCast(AI, PointerType::getUnqual(Type::Int8Ty), AI->getName()+".casted",aiNext); Instruction *V = new CallInst(PAInfo.PoolRegister, @@ -229,6 +240,9 @@ #else TransformAllocationInstr(&MI, AllocSize); #endif +#else + TransformAllocationInstr(&MI, AllocSize); +#endif } void FuncTransform::visitAllocaInst(AllocaInst &MI) { @@ -247,7 +261,7 @@ MI.getOperand(0), "sizetmp", &MI); // TransformAllocationInstr(&MI, AllocSize); - Instruction *Casted = CastInst::createPointerCast(&MI, PointerType::get(Type::Int8Ty), + Instruction *Casted = CastInst::createPointerCast(&MI, PointerType::getUnqual(Type::Int8Ty), MI.getName()+".casted", MI.getNext()); Instruction *V = new CallInst(PAInfo.PoolRegister, make_vector(PH, Casted, AllocSize, 0), "", Casted->getNext()); @@ -263,8 +277,8 @@ // Insert a cast and a call to poolfree... Value *Casted = Arg; - if (Arg->getType() != PointerType::get(Type::Int8Ty)) { - Casted = CastInst::createPointerCast(Arg, PointerType::get(Type::Int8Ty), + if (Arg->getType() != PointerType::getUnqual(Type::Int8Ty)) { + Casted = CastInst::createPointerCast(Arg, PointerType::getUnqual(Type::Int8Ty), Arg->getName()+".casted", Where); G.getScalarMap()[Casted] = G.getScalarMap()[Arg]; } @@ -296,7 +310,7 @@ void FuncTransform::visitCallocCall(CallSite CS) { TargetData& TD = PAInfo.getAnalysis(); - bool useLong = TD.getABITypeSize(PointerType::get(Type::Int8Ty)) != 4; + bool useLong = TD.getABITypeSize(PointerType::getUnqual(Type::Int8Ty)) != 4; Module *M = CS.getInstruction()->getParent()->getParent()->getParent(); assert(CS.arg_end()-CS.arg_begin() == 2 && "calloc takes two arguments!"); @@ -320,12 +334,12 @@ // finish calloc, we need to zero out the memory. Constant *MemSet = M->getOrInsertFunction((useLong ? "llvm.memset.i64" : "llvm.memset.i32"), Type::VoidTy, - PointerType::get(Type::Int8Ty), + PointerType::getUnqual(Type::Int8Ty), Type::Int8Ty, (useLong ? Type::Int64Ty : Type::Int32Ty), Type::Int32Ty, NULL); - if (Ptr->getType() != PointerType::get(Type::Int8Ty)) - Ptr = CastInst::createPointerCast(Ptr, PointerType::get(Type::Int8Ty), Ptr->getName(), + if (Ptr->getType() != PointerType::getUnqual(Type::Int8Ty)) + Ptr = CastInst::createPointerCast(Ptr, PointerType::getUnqual(Type::Int8Ty), Ptr->getName(), BBI); // We know that the memory returned by poolalloc is at least 4 byte aligned. @@ -345,7 +359,7 @@ if (Size->getType() != Type::Int32Ty) Size = CastInst::createIntegerCast(Size, Type::Int32Ty, false, Size->getName(), I); - static Type *VoidPtrTy = PointerType::get(Type::Int8Ty); + static Type *VoidPtrTy = PointerType::getUnqual(Type::Int8Ty); if (OldPtr->getType() != VoidPtrTy) OldPtr = CastInst::createPointerCast(OldPtr, VoidPtrTy, OldPtr->getName(), I); @@ -407,7 +421,7 @@ Value *RetVal = Constant::getNullValue(I->getType()); I->replaceAllUsesWith(RetVal); - static const Type *PtrPtr=PointerType::get(PointerType::get(Type::Int8Ty)); + static const Type *PtrPtr=PointerType::getUnqual(PointerType::getUnqual(Type::Int8Ty)); if (ResultDest->getType() != PtrPtr) ResultDest = CastInst::createPointerCast(ResultDest, PtrPtr, ResultDest->getName(), I); } @@ -601,7 +615,7 @@ ArgTys.push_back((*I)->getType()); FunctionType *FTy = FunctionType::get(TheCall->getType(), ArgTys, false); - PointerType *PFTy = PointerType::get(FTy); + PointerType *PFTy = PointerType::getUnqual(FTy); // If there are any pool arguments cast the func ptr to the right type. NewCallee = CastInst::createPointerCast(CS.getCalledValue(), PFTy, "tmp", TheCall); @@ -650,7 +664,7 @@ if (!isa(TheCall)) { //Dinakar we need pooldescriptors for allocas in the callee if it escapes BasicBlock::iterator InsertPt = TheCall->getParent()->getParent()->front().begin(); - Type *VoidPtrTy = PointerType::get(Type::Int8Ty); + Type *VoidPtrTy = PointerType::getUnqual(Type::Int8Ty); ArgVal = new AllocaInst(ArrayType::get(VoidPtrTy, 16), 0, "PD", InsertPt); Value *ElSize = ConstantInt::get(Type::Int32Ty,0); Value *Align = ConstantInt::get(Type::Int32Ty,0); From evan.cheng at apple.com Thu Dec 20 13:57:09 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 20 Dec 2007 19:57:09 -0000 Subject: [llvm-commits] [llvm] r45268 - in /llvm/trunk/lib/Target/X86: X86InstrFormats.td X86InstrSSE.td Message-ID: <200712201957.lBKJv9pY024875@zion.cs.uiuc.edu> Author: evancheng Date: Thu Dec 20 13:57:09 2007 New Revision: 45268 URL: http://llvm.org/viewvc/llvm-project?rev=45268&view=rev Log: Fix JIT encoding for CMPSD as well. Modified: llvm/trunk/lib/Target/X86/X86InstrFormats.td llvm/trunk/lib/Target/X86/X86InstrSSE.td Modified: llvm/trunk/lib/Target/X86/X86InstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFormats.td?rev=45268&r1=45267&r2=45268&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrFormats.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrFormats.td Thu Dec 20 13:57:09 2007 @@ -156,11 +156,15 @@ // SSE2 Instruction Templates: // // SDI - SSE2 instructions with XD prefix. +// SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix. // PDI - SSE2 instructions with TB and OpSize prefixes. // PDIi8 - SSE2 instructions with ImmT == Imm8 and TB and OpSize prefixes. class SDI o, Format F, dag outs, dag ins, string asm, list pattern> : I, XD, Requires<[HasSSE2]>; +class SDIi8 o, Format F, dag outs, dag ins, string asm, + list pattern> + : Ii8, XD, Requires<[HasSSE2]>; class PDI o, Format F, dag outs, dag ins, string asm, list pattern> : I, TB, OpSize, Requires<[HasSSE2]>; class PDIi8 o, Format F, dag outs, dag ins, string asm, Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=45268&r1=45267&r2=45268&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Thu Dec 20 13:57:09 2007 @@ -1085,10 +1085,10 @@ // Comparison instructions let isTwoAddress = 1 in { - def CMPSDrr : SDI<0xC2, MRMSrcReg, + def CMPSDrr : SDIi8<0xC2, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src1, FR64:$src, SSECC:$cc), "cmp${cc}sd\t{$src, $dst|$dst, $src}", []>; - def CMPSDrm : SDI<0xC2, MRMSrcMem, + def CMPSDrm : SDIi8<0xC2, MRMSrcMem, (outs FR64:$dst), (ins FR64:$src1, f64mem:$src, SSECC:$cc), "cmp${cc}sd\t{$src, $dst|$dst, $src}", []>; } @@ -1105,12 +1105,12 @@ // Aliases to match intrinsics which expect XMM operand(s). let isTwoAddress = 1 in { - def Int_CMPSDrr : SDI<0xC2, MRMSrcReg, + def Int_CMPSDrr : SDIi8<0xC2, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc), "cmp${cc}sd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cmp_sd VR128:$src1, VR128:$src, imm:$cc))]>; - def Int_CMPSDrm : SDI<0xC2, MRMSrcMem, + def Int_CMPSDrm : SDIi8<0xC2, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f64mem:$src, SSECC:$cc), "cmp${cc}sd\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (int_x86_sse2_cmp_sd VR128:$src1, From dalej at apple.com Thu Dec 20 16:52:10 2007 From: dalej at apple.com (Dale Johannesen) Date: Thu, 20 Dec 2007 22:52:10 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r45270 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Message-ID: <200712202252.lBKMqAxL032744@zion.cs.uiuc.edu> Author: johannes Date: Thu Dec 20 16:52:10 2007 New Revision: 45270 URL: http://llvm.org/viewvc/llvm-project?rev=45270&view=rev Log: Assume unsized types do not have the same size in gcc and llvm. Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-types.cpp?rev=45270&r1=45269&r2=45270&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-types.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Thu Dec 20 16:52:10 2007 @@ -295,7 +295,7 @@ /// isSequentialCompatible - Return true if the specified gcc array or pointer /// type and the corresponding LLVM SequentialType lay out their components -/// identically in memory. +/// identically in memory. We assume that objects without a known size do not. bool isSequentialCompatible(tree_node *type) { assert((TREE_CODE(type) == ARRAY_TYPE || TREE_CODE(type) == POINTER_TYPE || @@ -303,7 +303,7 @@ // This relies on gcc types with constant size mapping to LLVM types with the // same size. It is possible for the component type not to have a size: // struct foo; extern foo bar[]; - return !TYPE_SIZE(TREE_TYPE(type)) || + return TYPE_SIZE(TREE_TYPE(type)) && isInt64(TYPE_SIZE(TREE_TYPE(type)), true); } From kremenek at apple.com Thu Dec 20 18:15:29 2007 From: kremenek at apple.com (Ted Kremenek) Date: Fri, 21 Dec 2007 00:15:29 -0000 Subject: [llvm-commits] [llvm] r45274 - /llvm/trunk/include/llvm/ADT/scoped_ptr.h Message-ID: <200712210015.lBL0FTlk003736@zion.cs.uiuc.edu> Author: kremenek Date: Thu Dec 20 18:15:29 2007 New Revision: 45274 URL: http://llvm.org/viewvc/llvm-project?rev=45274&view=rev Log: Removed scoped_ptr, as its functionality is subsumed by OwningPtr. Removed: llvm/trunk/include/llvm/ADT/scoped_ptr.h Removed: llvm/trunk/include/llvm/ADT/scoped_ptr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/scoped_ptr.h?rev=45273&view=auto ============================================================================== --- llvm/trunk/include/llvm/ADT/scoped_ptr.h (original) +++ llvm/trunk/include/llvm/ADT/scoped_ptr.h (removed) @@ -1,124 +0,0 @@ -//===- llvm/ADT/scoped_ptr.h - basic smart pointer --------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file defines the scoped_ptr smart pointer: scoped_ptr mimics a built-in -// pointer except that it guarantees deletion of the object pointed to, either -// on destruction of the scoped_ptr or via an explicit reset(). scoped_ptr is a -// simple solution for simple needs. -// -//===----------------------------------------------------------------------===// -// -// (C) Copyright Greg Colvin and Beman Dawes 1998, 1999. -// Copyright (c) 2001, 2002 Peter Dimov -// -// Distributed under the Boost Software License, Version 1.0. (See -// accompanying file llvm/docs/BOOST_LICENSE_1_0.txt or copy at -// http://www.boost.org/LICENSE_1_0.txt ) -// -// http://www.boost.org/libs/smart_ptr/scoped_ptr.htm -// -#ifndef LLVM_SCOPED_PTR_H_INCLUDED -#define LLVM_SCOPED_PTR_H_INCLUDED - -#include - -namespace llvm { - -// verify that types are complete for increased safety -template -inline void checked_delete(T * x) { - // intentionally complex - simplification causes warnings in some compilers. - typedef char type_must_be_complete[sizeof(T) ? 1 : -1]; - (void)sizeof(type_must_be_complete); - delete x; -} - -/// scoped_ptr mimics a built-in pointer except that it guarantees deletion -/// of the object pointed to, either on destruction of the scoped_ptr or via -/// an explicit reset(). scoped_ptr is a simple solution for simple needs; -/// use shared_ptr or std::auto_ptr if your needs are more complex. -template -class scoped_ptr {// noncopyable - T *ptr; - scoped_ptr(scoped_ptr const &); // DO NOT IMPLEMENT - scoped_ptr & operator=(scoped_ptr const &); // DO NOT IMPLEMENT - typedef scoped_ptr this_type; -public: - typedef T element_type; - - explicit scoped_ptr(T * p = 0): ptr(p) {} // never throws - - ~scoped_ptr() { // never throws - llvm::checked_delete(ptr); - } - - /// reset - Change the current pointee to the specified pointer. Note that - /// calling this with any pointer (including a null pointer) deletes the - /// current pointer. - void reset(T *p = 0) { - // catch self-reset errors - assert((p == 0 || p != ptr) && "scoped_ptr: self-reset error"); - T *tmp = ptr; - ptr = p; - delete tmp; - } - - /// take - Reset the scoped pointer to null and return its pointer. This does - /// not delete the pointer before returning it. - T *take() { - T *P = ptr; - ptr = 0; - return P; - } - - T& operator*() const { - assert(ptr != 0 && "scoped_ptr: Trying to dereference a null pointer"); - return *ptr; - } - - T* operator->() const { - assert(ptr != 0 && "scoped_ptr: Trying to dereference a null pointer"); - return ptr; - } - - T* get() const { - return ptr; - } - - // implicit conversion to "bool" - typedef T * this_type::*unspecified_bool_type; - - operator unspecified_bool_type() const {// never throws - return ptr == 0? 0: &this_type::ptr; - } - - bool operator!() const { // never throws - return ptr == 0; - } - - void swap(scoped_ptr &b) {// never throws - T * tmp = b.ptr; - b.ptr = ptr; - ptr = tmp; - } -}; - -template inline void swap(scoped_ptr &a, scoped_ptr &b) { - // never throws - a.swap(b); -} - -// get_pointer(p) is a generic way to say p.get() -template inline T * get_pointer(scoped_ptr const &p) { - return p.get(); -} - -} // namespace llvm - -#endif // #ifndef LLVM_SCOPED_PTR_HPP_INCLUDED From evan.cheng at apple.com Thu Dec 20 18:24:17 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 21 Dec 2007 00:24:17 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r45275 - /llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Message-ID: <200712210024.lBL0OHWF004016@zion.cs.uiuc.edu> Author: evancheng Date: Thu Dec 20 18:24:17 2007 New Revision: 45275 URL: http://llvm.org/viewvc/llvm-project?rev=45275&view=rev Log: Bug fix: parameter is i32 so create a v4i32 and then cast it to v8i16. Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp?rev=45275&r1=45274&r2=45275&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Thu Dec 20 18:24:17 2007 @@ -191,6 +191,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psra_w); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); + Ops[1] = Builder.CreateBitCast(Ops[1], Ops[0]->getType(), "tmp"); Result = Builder.CreateCall(psraw, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; From evan.cheng at apple.com Thu Dec 20 19:30:39 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 21 Dec 2007 01:30:39 -0000 Subject: [llvm-commits] [llvm] r45278 - /llvm/trunk/include/llvm/IntrinsicsX86.td Message-ID: <200712210130.lBL1UeNx007013@zion.cs.uiuc.edu> Author: evancheng Date: Thu Dec 20 19:30:39 2007 New Revision: 45278 URL: http://llvm.org/viewvc/llvm-project?rev=45278&view=rev Log: Add a few more missing gcc builtin's. Modified: llvm/trunk/include/llvm/IntrinsicsX86.td Modified: llvm/trunk/include/llvm/IntrinsicsX86.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsX86.td?rev=45278&r1=45277&r2=45278&view=diff ============================================================================== --- llvm/trunk/include/llvm/IntrinsicsX86.td (original) +++ llvm/trunk/include/llvm/IntrinsicsX86.td Thu Dec 20 19:30:39 2007 @@ -315,25 +315,25 @@ // Integer shift ops. let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". - def int_x86_sse2_psll_w : + def int_x86_sse2_psll_w : GCCBuiltin<"__builtin_ia32_psllw128">, Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, - llvm_v4i32_ty], [IntrNoMem]>; - def int_x86_sse2_psll_d : + llvm_v8i16_ty], [IntrNoMem]>; + def int_x86_sse2_psll_d : GCCBuiltin<"__builtin_ia32_pslld128">, Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>; - def int_x86_sse2_psll_q : + def int_x86_sse2_psll_q : GCCBuiltin<"__builtin_ia32_psllq128">, Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty, - llvm_v4i32_ty], [IntrNoMem]>; + llvm_v2i64_ty], [IntrNoMem]>; def int_x86_sse2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi128">, Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty, llvm_i32_ty], [IntrNoMem]>; - def int_x86_sse2_psrl_w : + def int_x86_sse2_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw128">, Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4i32_ty], [IntrNoMem]>; - def int_x86_sse2_psrl_d : + def int_x86_sse2_psrl_d : GCCBuiltin<"__builtin_ia32_psrld128">, Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>; - def int_x86_sse2_psrl_q : + def int_x86_sse2_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq128">, Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty, llvm_v4i32_ty], [IntrNoMem]>; def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">, From evan.cheng at apple.com Thu Dec 20 19:31:34 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 21 Dec 2007 01:31:34 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r45279 - /llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Message-ID: <200712210131.lBL1VYUD007068@zion.cs.uiuc.edu> Author: evancheng Date: Thu Dec 20 19:31:34 2007 New Revision: 45279 URL: http://llvm.org/viewvc/llvm-project?rev=45279&view=rev Log: More bug fixes: add necessary bitcast's. Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp?rev=45279&r1=45278&r2=45279&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Thu Dec 20 19:31:34 2007 @@ -89,6 +89,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psll_w); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); + Ops[1] = Builder.CreateBitCast(Ops[1], Ops[0]->getType(), "tmp"); Result = Builder.CreateCall(psllw, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; @@ -123,6 +124,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psll_q); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); + Ops[1] = Builder.CreateBitCast(Ops[1], Ops[0]->getType(), "tmp"); Result = Builder.CreateCall(psllq, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; @@ -140,6 +142,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psrl_w); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); + Ops[1] = Builder.CreateBitCast(Ops[1], Ops[0]->getType(), "tmp"); Result = Builder.CreateCall(psrlw, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; @@ -174,6 +177,7 @@ Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psrl_q); Value *Undef = UndefValue::get(Type::Int32Ty); Ops[1] = BuildVector(Ops[1], Undef, Undef, Undef, NULL); + Ops[1] = Builder.CreateBitCast(Ops[1], Ops[0]->getType(), "tmp"); Result = Builder.CreateCall(psrlq, Ops.begin(), Ops.begin()+2, "tmp"); Result = Builder.CreateBitCast(Result, ResultType, "tmp"); return true; From evan.cheng at apple.com Thu Dec 20 19:31:58 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 21 Dec 2007 01:31:58 -0000 Subject: [llvm-commits] [llvm] r45280 - /llvm/trunk/lib/Target/X86/README-SSE.txt Message-ID: <200712210131.lBL1VxlH007105@zion.cs.uiuc.edu> Author: evancheng Date: Thu Dec 20 19:31:58 2007 New Revision: 45280 URL: http://llvm.org/viewvc/llvm-project?rev=45280&view=rev Log: New entry. Modified: llvm/trunk/lib/Target/X86/README-SSE.txt Modified: llvm/trunk/lib/Target/X86/README-SSE.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-SSE.txt?rev=45280&r1=45279&r2=45280&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-SSE.txt (original) +++ llvm/trunk/lib/Target/X86/README-SSE.txt Thu Dec 20 19:31:58 2007 @@ -741,3 +741,18 @@ //===---------------------------------------------------------------------===// + +#include +int t1(double d) { return signbit(d); } + +This currently compiles to: + subl $12, %esp + movsd 16(%esp), %xmm0 + movsd %xmm0, (%esp) + movl 4(%esp), %eax + shrl $31, %eax + addl $12, %esp + ret + +We should use movmskp{s|d} instead. + From nicolas.geoffray at lip6.fr Fri Dec 21 05:02:50 2007 From: nicolas.geoffray at lip6.fr (Nicolas Geoffray) Date: Fri, 21 Dec 2007 12:02:50 +0100 Subject: [llvm-commits] linux/ppc32 exception handling Message-ID: <476B9D5A.6030208@lip6.fr> Hi everyone, This patch enables exception handling for linux/ppc32. OK to commit? -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: linux-ppc-eh.patch Url: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20071221/cfd4602d/attachment.pl From asl at math.spbu.ru Fri Dec 21 05:59:10 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Fri, 21 Dec 2007 14:59:10 +0300 Subject: [llvm-commits] linux/ppc32 exception handling In-Reply-To: <476B9D5A.6030208.SS4372SS@lip6.fr> References: <476B9D5A.6030208.SS4372SS@lip6.fr> Message-ID: <1198238350.10758.163.camel@asl.dorms.spbu.ru> Hello, Nicolas > This patch enables exception handling for linux/ppc32. OK to commit? Looks ok for me. Does it even work? :) (with gcc-compiled runtime) -- With best regards, Anton Korobeynikov. Faculty of Mathematics & Mechanics, Saint Petersburg State University. From nicolas.geoffray at lip6.fr Fri Dec 21 06:19:46 2007 From: nicolas.geoffray at lip6.fr (Nicolas Geoffray) Date: Fri, 21 Dec 2007 12:19:46 -0000 Subject: [llvm-commits] [llvm] r45281 - in /llvm/trunk/lib/Target/PowerPC: PPCISelLowering.cpp PPCTargetAsmInfo.cpp Message-ID: <200712211219.lBLCJmqN013693@zion.cs.uiuc.edu> Author: geoffray Date: Fri Dec 21 06:19:44 2007 New Revision: 45281 URL: http://llvm.org/viewvc/llvm-project?rev=45281&view=rev Log: Enable EH for linux/ppc32 targets Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=45281&r1=45280&r2=45281&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Fri Dec 21 06:19:44 2007 @@ -167,14 +167,12 @@ // Support label based line numbers. setOperationAction(ISD::LOCATION, MVT::Other, Expand); setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); - if (!TM.getSubtarget().isDarwin()) { - setOperationAction(ISD::LABEL, MVT::Other, Expand); - } else { - setOperationAction(ISD::EXCEPTIONADDR, MVT::i64, Expand); - setOperationAction(ISD::EHSELECTION, MVT::i64, Expand); - setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand); - setOperationAction(ISD::EHSELECTION, MVT::i32, Expand); - } + + setOperationAction(ISD::EXCEPTIONADDR, MVT::i64, Expand); + setOperationAction(ISD::EHSELECTION, MVT::i64, Expand); + setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand); + setOperationAction(ISD::EHSELECTION, MVT::i32, Expand); + // We want to legalize GlobalAddress and ConstantPool nodes into the // appropriate instructions to materialize the address. @@ -1771,9 +1769,9 @@ // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol // node so that legalize doesn't hack it. - if (GlobalAddressSDNode *G = dyn_cast(Callee)) - Callee = DAG.getTargetGlobalAddress(G->getGlobal(), Callee.getValueType()); - else if (ExternalSymbolSDNode *S = dyn_cast(Callee)) + //if (GlobalAddressSDNode *G = dyn_cast(Callee)) + // Callee = DAG.getTargetGlobalAddress(G->getGlobal(), Callee.getValueType()); + if (ExternalSymbolSDNode *S = dyn_cast(Callee)) Callee = DAG.getTargetExternalSymbol(S->getSymbol(), Callee.getValueType()); else if (SDNode *Dest = isBLACompatibleAddress(Callee, DAG)) // If this is an absolute destination address, use the munged value. Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp?rev=45281&r1=45280&r2=45281&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp Fri Dec 21 06:19:44 2007 @@ -28,10 +28,6 @@ InlineAsmEnd = "# InlineAsm End"; AssemblerDialect = TM.getSubtargetImpl()->getAsmFlavor(); - NeedsSet = true; - DwarfEHFrameSection = - ".section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support"; - DwarfExceptionSection = ".section __DATA,__gcc_except_tab"; } DarwinTargetAsmInfo::DarwinTargetAsmInfo(const PPCTargetMachine &TM) @@ -60,7 +56,12 @@ HiddenDirective = "\t.private_extern\t"; SupportsExceptionHandling = true; NeedsIndirectEncoding = true; + NeedsSet = true; BSSSection = 0; + + DwarfEHFrameSection = + ".section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support"; + DwarfExceptionSection = ".section __DATA,__gcc_except_tab"; DwarfAbbrevSection = ".section __DWARF,__debug_abbrev,regular,debug"; DwarfInfoSection = ".section __DWARF,__debug_info,regular,debug"; @@ -98,6 +99,9 @@ WeakRefDirective = "\t.weak\t"; BSSSection = "\t.section\t\".sbss\",\"aw\", at nobits"; + // Debug Information + AbsoluteDebugSectionOffsets = true; + SupportsDebugInformation = true; DwarfAbbrevSection = "\t.section\t.debug_abbrev,\"\", at progbits"; DwarfInfoSection = "\t.section\t.debug_info,\"\", at progbits"; DwarfLineSection = "\t.section\t.debug_line,\"\", at progbits"; @@ -109,4 +113,20 @@ DwarfARangesSection = "\t.section\t.debug_aranges,\"\", at progbits"; DwarfRangesSection = "\t.section\t.debug_ranges,\"\", at progbits"; DwarfMacInfoSection = "\t.section\t.debug_macinfo,\"\", at progbits"; + + ReadOnlySection = "\t.section\t.rodata"; + FourByteConstantSection = "\t.section\t.rodata.cst4,\"aM\", at progbits,4"; + EightByteConstantSection = "\t.section\t.rodata.cst8,\"aM\", at progbits,8"; + SixteenByteConstantSection = "\t.section\t.rodata.cst16,\"aM\", at progbits,16"; + PCSymbol = "."; + + // Set up DWARF directives + HasLEB128 = true; // Target asm supports leb128 directives (little-endian) + + // Exceptions handling + if (!TM.getSubtargetImpl()->isPPC64()) + SupportsExceptionHandling = true; + AbsoluteEHSectionOffsets = false; + DwarfEHFrameSection = "\t.section\t.eh_frame,\"aw\", at progbits"; + DwarfExceptionSection = "\t.section\t.gcc_except_table,\"a\", at progbits"; } From nicolas.geoffray at lip6.fr Fri Dec 21 06:22:30 2007 From: nicolas.geoffray at lip6.fr (Nicolas Geoffray) Date: Fri, 21 Dec 2007 12:22:30 -0000 Subject: [llvm-commits] [llvm] r45282 - /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200712211222.lBLCMVbw013819@zion.cs.uiuc.edu> Author: geoffray Date: Fri Dec 21 06:22:29 2007 New Revision: 45282 URL: http://llvm.org/viewvc/llvm-project?rev=45282&view=rev Log: Fix unintented change from last commit Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=45282&r1=45281&r2=45282&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Fri Dec 21 06:22:29 2007 @@ -1769,9 +1769,9 @@ // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol // node so that legalize doesn't hack it. - //if (GlobalAddressSDNode *G = dyn_cast(Callee)) - // Callee = DAG.getTargetGlobalAddress(G->getGlobal(), Callee.getValueType()); - if (ExternalSymbolSDNode *S = dyn_cast(Callee)) + if (GlobalAddressSDNode *G = dyn_cast(Callee)) + Callee = DAG.getTargetGlobalAddress(G->getGlobal(), Callee.getValueType()); + else if (ExternalSymbolSDNode *S = dyn_cast(Callee)) Callee = DAG.getTargetExternalSymbol(S->getSymbol(), Callee.getValueType()); else if (SDNode *Dest = isBLACompatibleAddress(Callee, DAG)) // If this is an absolute destination address, use the munged value. From baldrick at free.fr Fri Dec 21 13:16:17 2007 From: baldrick at free.fr (Duncan Sands) Date: Fri, 21 Dec 2007 19:16:17 -0000 Subject: [llvm-commits] [llvm] r45285 - in /llvm/trunk: include/llvm/ParameterAttributes.h lib/Transforms/IPO/DeadArgumentElimination.cpp test/Transforms/DeadArgElim/2007-12-20-ParamAttrs.ll Message-ID: <200712211916.lBLJGHFL003310@zion.cs.uiuc.edu> Author: baldrick Date: Fri Dec 21 13:16:16 2007 New Revision: 45285 URL: http://llvm.org/viewvc/llvm-project?rev=45285&view=rev Log: Make DAE not wipe out attributes on calls, and not drop return attributes on the floor. In the case of a call to a varargs function where the varargs arguments are being removed, any call attributes on those arguments need to be dropped. I didn't do this because I plan to make it illegal to have such attributes (see next patch). With this change, compiling the gcc filter2 eh test at -O0 and then running opt -std-compile-opts on it results in a correctly working program (compiling at -O1 or higher results in the test failing due to a problem with how we output eh info into the IR). Added: llvm/trunk/test/Transforms/DeadArgElim/2007-12-20-ParamAttrs.ll Modified: llvm/trunk/include/llvm/ParameterAttributes.h llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp Modified: llvm/trunk/include/llvm/ParameterAttributes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ParameterAttributes.h?rev=45285&r1=45284&r2=45285&view=diff ============================================================================== --- llvm/trunk/include/llvm/ParameterAttributes.h (original) +++ llvm/trunk/include/llvm/ParameterAttributes.h Fri Dec 21 13:16:16 2007 @@ -50,8 +50,6 @@ const uint16_t Informative = NoReturn | NoUnwind | NoAlias | ReadNone | ReadOnly; -/// The following attribute sets are used by the verifier: - /// @brief Attributes that only apply to function parameters. const uint16_t ParameterOnly = ByVal | InReg | Nest | StructRet; @@ -64,6 +62,10 @@ /// @brief Attributes that only apply to pointers. const uint16_t PointerTypeOnly = ByVal | Nest | NoAlias | StructRet; +/// @brief Attributes that do not apply to void type function return values. +const uint16_t VoidTypeIncompatible = IntegerTypeOnly | PointerTypeOnly | + ParameterOnly; + /// @brief Attributes that are mutually incompatible. const uint16_t MutuallyIncompatible[3] = { ByVal | InReg | Nest | StructRet, Modified: llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp?rev=45285&r1=45284&r2=45285&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp Fri Dec 21 13:16:16 2007 @@ -122,18 +122,18 @@ bool DAE::DeleteDeadVarargs(Function &Fn) { assert(Fn.getFunctionType()->isVarArg() && "Function isn't varargs!"); if (Fn.isDeclaration() || !Fn.hasInternalLinkage()) return false; - + // Ensure that the function is only directly called. for (Value::use_iterator I = Fn.use_begin(), E = Fn.use_end(); I != E; ++I) { // If this use is anything other than a call site, give up. CallSite CS = CallSite::get(*I); Instruction *TheCall = CS.getInstruction(); if (!TheCall) return false; // Not a direct call site? - + // The addr of this function is passed to the call. if (I.getOperandNo() != 0) return false; } - + // Okay, we know we can transform this function if safe. Scan its body // looking for calls to llvm.vastart. for (Function::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) { @@ -144,24 +144,24 @@ } } } - + // If we get here, there are no calls to llvm.vastart in the function body, // remove the "..." and adjust all the calls. - + // Start by computing a new prototype for the function, which is the same as // the old function, but has fewer arguments. const FunctionType *FTy = Fn.getFunctionType(); std::vector Params(FTy->param_begin(), FTy->param_end()); FunctionType *NFTy = FunctionType::get(FTy->getReturnType(), Params, false); unsigned NumArgs = Params.size(); - + // Create the new function body and insert it into the module... Function *NF = new Function(NFTy, Fn.getLinkage()); NF->setCallingConv(Fn.getCallingConv()); NF->setParamAttrs(Fn.getParamAttrs()); Fn.getParent()->getFunctionList().insert(&Fn, NF); NF->takeName(&Fn); - + // Loop over all of the callers of the function, transforming the call sites // to pass in a smaller number of arguments into the new function. // @@ -169,40 +169,40 @@ while (!Fn.use_empty()) { CallSite CS = CallSite::get(Fn.use_back()); Instruction *Call = CS.getInstruction(); - + // Pass all the same arguments. Args.assign(CS.arg_begin(), CS.arg_begin()+NumArgs); - + Instruction *New; if (InvokeInst *II = dyn_cast(Call)) { New = new InvokeInst(NF, II->getNormalDest(), II->getUnwindDest(), Args.begin(), Args.end(), "", Call); cast(New)->setCallingConv(CS.getCallingConv()); - cast(New)->setParamAttrs(NF->getParamAttrs()); + cast(New)->setParamAttrs(CS.getParamAttrs()); } else { New = new CallInst(NF, Args.begin(), Args.end(), "", Call); cast(New)->setCallingConv(CS.getCallingConv()); - cast(New)->setParamAttrs(NF->getParamAttrs()); + cast(New)->setParamAttrs(CS.getParamAttrs()); if (cast(Call)->isTailCall()) cast(New)->setTailCall(); } Args.clear(); - + if (!Call->use_empty()) Call->replaceAllUsesWith(New); - + New->takeName(Call); - + // Finally, remove the old call from the program, reducing the use-count of // F. Call->eraseFromParent(); } - + // Since we have now created the new function, splice the body of the old // function right into the new function, leaving the old rotting hulk of the // function empty. NF->getBasicBlockList().splice(NF->begin(), Fn.getBasicBlockList()); - + // Loop over the argument list, transfering uses of the old arguments over to // the new arguments, also transfering over the names as well. While we're at // it, remove the dead arguments from the DeadArguments list. @@ -213,7 +213,7 @@ I->replaceAllUsesWith(I2); I2->takeName(I); } - + // Finally, nuke the old function. Fn.eraseFromParent(); return true; @@ -496,6 +496,20 @@ ParamAttrsVector ParamAttrsVec; const ParamAttrsList *PAL = F->getParamAttrs(); + // The existing function return attributes. + uint16_t RAttrs = PAL ? PAL->getParamAttrs(0) : 0; + + // Make the function return void if the return value is dead. + const Type *RetTy = FTy->getReturnType(); + if (DeadRetVal.count(F)) { + RetTy = Type::VoidTy; + RAttrs &= ~ParamAttr::VoidTypeIncompatible; + DeadRetVal.erase(F); + } + + if (RAttrs) + ParamAttrsVec.push_back(ParamAttrsWithIndex::get(0, RAttrs)); + // Construct the new parameter list from non-dead arguments. Also construct // a new set of parameter attributes to correspond. unsigned index = 1; @@ -503,26 +517,13 @@ ++I, ++index) if (!DeadArguments.count(I)) { Params.push_back(I->getType()); - if (PAL) { - uint16_t Attrs = PAL->getParamAttrs(index); - if (Attrs != ParamAttr::None) - ParamAttrsVec.push_back(ParamAttrsWithIndex::get(Params.size(), - Attrs)); - } + uint16_t Attrs = PAL ? PAL->getParamAttrs(index) : 0; + if (Attrs) + ParamAttrsVec.push_back(ParamAttrsWithIndex::get(Params.size(), Attrs)); } // Reconstruct the ParamAttrsList based on the vector we constructed. - if (ParamAttrsVec.empty()) - PAL = 0; - else - PAL = ParamAttrsList::get(ParamAttrsVec); - - // Make the function return void if the return value is dead. - const Type *RetTy = FTy->getReturnType(); - if (DeadRetVal.count(F)) { - RetTy = Type::VoidTy; - DeadRetVal.erase(F); - } + PAL = ParamAttrsList::get(ParamAttrsVec); // Work around LLVM bug PR56: the CWriter cannot emit varargs functions which // have zero fixed arguments. @@ -550,13 +551,31 @@ while (!F->use_empty()) { CallSite CS = CallSite::get(F->use_back()); Instruction *Call = CS.getInstruction(); + ParamAttrsVec.clear(); + PAL = CS.getParamAttrs(); + + // The call return attributes. + uint16_t RAttrs = PAL ? PAL->getParamAttrs(0) : 0; + // Adjust in case the function was changed to return void. + if (NF->getReturnType() == Type::VoidTy) + RAttrs &= ~ParamAttr::VoidTypeIncompatible; + if (RAttrs) + ParamAttrsVec.push_back(ParamAttrsWithIndex::get(0, RAttrs)); // Loop over the operands, deleting dead ones... CallSite::arg_iterator AI = CS.arg_begin(); + index = 1; for (Function::arg_iterator I = F->arg_begin(), E = F->arg_end(); - I != E; ++I, ++AI) - if (!DeadArguments.count(I)) // Remove operands for dead arguments + I != E; ++I, ++AI, ++index) + if (!DeadArguments.count(I)) { // Remove operands for dead arguments Args.push_back(*AI); + uint16_t Attrs = PAL ? PAL->getParamAttrs(index) : 0; + if (Attrs) + ParamAttrsVec.push_back(ParamAttrsWithIndex::get(Args.size(), Attrs)); + } + + // Reconstruct the ParamAttrsList based on the vector we constructed. + PAL = ParamAttrsList::get(ParamAttrsVec); if (ExtraArgHack) Args.push_back(UndefValue::get(Type::Int32Ty)); Added: llvm/trunk/test/Transforms/DeadArgElim/2007-12-20-ParamAttrs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadArgElim/2007-12-20-ParamAttrs.ll?rev=45285&view=auto ============================================================================== --- llvm/trunk/test/Transforms/DeadArgElim/2007-12-20-ParamAttrs.ll (added) +++ llvm/trunk/test/Transforms/DeadArgElim/2007-12-20-ParamAttrs.ll Fri Dec 21 13:16:16 2007 @@ -0,0 +1,16 @@ +; RUN: llvm-as < %s | opt -deadargelim | llvm-dis | grep nounwind | count 2 +; RUN: llvm-as < %s | opt -deadargelim | llvm-dis | grep signext | count 2 +; RUN: llvm-as < %s | opt -deadargelim | llvm-dis | not grep inreg +; RUN: llvm-as < %s | opt -deadargelim | llvm-dis | not grep zeroext + + at g = global i8 0 + +define internal i8 @foo(i8* inreg %p, i8 signext %y, ... ) zeroext nounwind { + store i8 %y, i8* @g + ret i8 0 +} + +define i32 @bar() { + %A = call i8(i8*, i8, ...)* @foo(i8* inreg null, i8 signext 1, i8 2) zeroext nounwind + ret i32 0 +} From baldrick at free.fr Fri Dec 21 13:19:01 2007 From: baldrick at free.fr (Duncan Sands) Date: Fri, 21 Dec 2007 19:19:01 -0000 Subject: [llvm-commits] [llvm] r45286 - in /llvm/trunk: lib/VMCore/Verifier.cpp test/Verifier/2007-12-21-InvokeParamAttrs.ll Message-ID: <200712211919.lBLJJ12U003430@zion.cs.uiuc.edu> Author: baldrick Date: Fri Dec 21 13:19:01 2007 New Revision: 45286 URL: http://llvm.org/viewvc/llvm-project?rev=45286&view=rev Log: Get the verifier to check attributes on calls as well as on functions. Make it verify invokes and not just ordinary calls. As a (desired) side-effect, it is no longer legal to have call attributes on arguments that are being passed to the varargs part of a varargs function (llvm-as drops them on the floor anyway). Added: llvm/trunk/test/Verifier/2007-12-21-InvokeParamAttrs.ll Modified: llvm/trunk/lib/VMCore/Verifier.cpp Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=45286&r1=45285&r2=45286&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Fri Dec 21 13:19:01 2007 @@ -53,6 +53,7 @@ #include "llvm/PassManager.h" #include "llvm/Analysis/Dominators.h" #include "llvm/CodeGen/ValueTypes.h" +#include "llvm/Support/CallSite.h" #include "llvm/Support/CFG.h" #include "llvm/Support/InstVisitor.h" #include "llvm/Support/Streams.h" @@ -243,6 +244,7 @@ void visitShuffleVectorInst(ShuffleVectorInst &EI); void visitVAArgInst(VAArgInst &VAA) { visitInstruction(VAA); } void visitCallInst(CallInst &CI); + void visitInvokeInst(InvokeInst &II); void visitGetElementPtrInst(GetElementPtrInst &GEP); void visitLoadInst(LoadInst &LI); void visitStoreInst(StoreInst &SI); @@ -256,8 +258,11 @@ void visitIntrinsicFunctionCall(Intrinsic::ID ID, CallInst &CI); void visitAllocationInst(AllocationInst &AI); + void VerifyCallSite(CallSite CS); void VerifyIntrinsicPrototype(Intrinsic::ID ID, Function *F, unsigned Count, ...); + void VerifyParamAttrs(const FunctionType *FT, const ParamAttrsList *Attrs, + const Value *V); void WriteValue(const Value *V) { if (!V) return; @@ -377,6 +382,70 @@ void Verifier::verifyTypeSymbolTable(TypeSymbolTable &ST) { } +// VerifyParamAttrs - Check parameter attributes against a function type. +// The value V is printed in error messages. +void Verifier::VerifyParamAttrs(const FunctionType *FT, + const ParamAttrsList *Attrs, + const Value *V) { + if (!Attrs) + return; + + // Note that when calling a varargs function, the following test disallows + // parameter attributes for the arguments corresponding to the varargs part. + Assert1(Attrs->size() && + Attrs->getParamIndex(Attrs->size()-1) <= FT->getNumParams(), + "Attributes after end of type!", V); + + bool SawNest = false; + + for (unsigned Idx = 0; Idx <= FT->getNumParams(); ++Idx) { + uint16_t Attr = Attrs->getParamAttrs(Idx); + + if (!Idx) { + uint16_t RetI = Attr & ParamAttr::ParameterOnly; + Assert1(!RetI, "Attribute " + Attrs->getParamAttrsText(RetI) + + "does not apply to return values!", V); + } else { + uint16_t ParmI = Attr & ParamAttr::ReturnOnly; + Assert1(!ParmI, "Attribute " + Attrs->getParamAttrsText(ParmI) + + "only applies to return values!", V); + } + + for (unsigned i = 0; + i < array_lengthof(ParamAttr::MutuallyIncompatible); ++i) { + uint16_t MutI = Attr & ParamAttr::MutuallyIncompatible[i]; + Assert1(!(MutI & (MutI - 1)), "Attributes " + + Attrs->getParamAttrsText(MutI) + "are incompatible!", V); + } + + uint16_t IType = Attr & ParamAttr::IntegerTypeOnly; + Assert1(!IType || FT->getParamType(Idx-1)->isInteger(), + "Attribute " + Attrs->getParamAttrsText(IType) + + "should only apply to Integer type!", V); + + uint16_t PType = Attr & ParamAttr::PointerTypeOnly; + Assert1(!PType || isa(FT->getParamType(Idx-1)), + "Attribute " + Attrs->getParamAttrsText(PType) + + "should only apply to Pointer type!", V); + + if (Attr & ParamAttr::ByVal) { + const PointerType *Ty = + dyn_cast(FT->getParamType(Idx-1)); + Assert1(!Ty || isa(Ty->getElementType()), + "Attribute byval should only apply to pointer to structs!", V); + } + + if (Attr & ParamAttr::Nest) { + Assert1(!SawNest, "More than one parameter has attribute nest!", V); + SawNest = true; + } + + if (Attr & ParamAttr::StructRet) { + Assert1(Idx == 1, "Attribute sret not on first parameter!", V); + } + } +} + // visitFunction - Verify that a function is ok. // void Verifier::visitFunction(Function &F) { @@ -394,67 +463,8 @@ Assert1(!F.isStructReturn() || FT->getReturnType() == Type::VoidTy, "Invalid struct-return function!", &F); - bool SawSRet = false; - - if (const ParamAttrsList *Attrs = F.getParamAttrs()) { - Assert1(Attrs->size() && - Attrs->getParamIndex(Attrs->size()-1) <= FT->getNumParams(), - "Function has excess attributes!", &F); - - bool SawNest = false; - - for (unsigned Idx = 0; Idx <= FT->getNumParams(); ++Idx) { - uint16_t Attr = Attrs->getParamAttrs(Idx); - - if (!Idx) { - uint16_t RetI = Attr & ParamAttr::ParameterOnly; - Assert1(!RetI, "Attribute " + Attrs->getParamAttrsText(RetI) + - "should not apply to functions!", &F); - } else { - uint16_t ParmI = Attr & ParamAttr::ReturnOnly; - Assert1(!ParmI, "Attribute " + Attrs->getParamAttrsText(ParmI) + - "should only be applied to function!", &F); - - } - - for (unsigned i = 0; - i < array_lengthof(ParamAttr::MutuallyIncompatible); ++i) { - uint16_t MutI = Attr & ParamAttr::MutuallyIncompatible[i]; - Assert1(!(MutI & (MutI - 1)), "Attributes " + - Attrs->getParamAttrsText(MutI) + "are incompatible!", &F); - } - - uint16_t IType = Attr & ParamAttr::IntegerTypeOnly; - Assert1(!IType || FT->getParamType(Idx-1)->isInteger(), - "Attribute " + Attrs->getParamAttrsText(IType) + - "should only apply to Integer type!", &F); - - uint16_t PType = Attr & ParamAttr::PointerTypeOnly; - Assert1(!PType || isa(FT->getParamType(Idx-1)), - "Attribute " + Attrs->getParamAttrsText(PType) + - "should only apply to Pointer type!", &F); - - if (Attr & ParamAttr::ByVal) { - const PointerType *Ty = - dyn_cast(FT->getParamType(Idx-1)); - Assert1(!Ty || isa(Ty->getElementType()), - "Attribute byval should only apply to pointer to structs!", &F); - } - - if (Attr & ParamAttr::Nest) { - Assert1(!SawNest, "More than one parameter has attribute nest!", &F); - SawNest = true; - } - - if (Attr & ParamAttr::StructRet) { - SawSRet = true; - Assert1(Idx == 1, "Attribute sret not on first parameter!", &F); - } - } - } - - Assert1(SawSRet == F.isStructReturn(), - "StructReturn function with no sret attribute!", &F); + // Check function attributes. + VerifyParamAttrs(FT, F.getParamAttrs(), &F); // Check that this function meets the restrictions on this calling convention. switch (F.getCallingConv()) { @@ -825,35 +835,48 @@ visitInstruction(PN); } -void Verifier::visitCallInst(CallInst &CI) { - Assert1(isa(CI.getOperand(0)->getType()), - "Called function must be a pointer!", &CI); - const PointerType *FPTy = cast(CI.getOperand(0)->getType()); +void Verifier::VerifyCallSite(CallSite CS) { + Instruction *I = CS.getInstruction(); + + Assert1(isa(CS.getCalledValue()->getType()), + "Called function must be a pointer!", I); + const PointerType *FPTy = cast(CS.getCalledValue()->getType()); Assert1(isa(FPTy->getElementType()), - "Called function is not pointer to function type!", &CI); + "Called function is not pointer to function type!", I); const FunctionType *FTy = cast(FPTy->getElementType()); // Verify that the correct number of arguments are being passed if (FTy->isVarArg()) - Assert1(CI.getNumOperands()-1 >= FTy->getNumParams(), - "Called function requires more parameters than were provided!",&CI); + Assert1(CS.arg_size() >= FTy->getNumParams(), + "Called function requires more parameters than were provided!",I); else - Assert1(CI.getNumOperands()-1 == FTy->getNumParams(), - "Incorrect number of arguments passed to called function!", &CI); + Assert1(CS.arg_size() == FTy->getNumParams(), + "Incorrect number of arguments passed to called function!", I); // Verify that all arguments to the call match the function type... for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i) - Assert3(CI.getOperand(i+1)->getType() == FTy->getParamType(i), + Assert3(CS.getArgument(i)->getType() == FTy->getParamType(i), "Call parameter type does not match function signature!", - CI.getOperand(i+1), FTy->getParamType(i), &CI); + CS.getArgument(i), FTy->getParamType(i), I); + + // Verify call attributes. + VerifyParamAttrs(FTy, CS.getParamAttrs(), I); + + visitInstruction(*I); +} + +void Verifier::visitCallInst(CallInst &CI) { + VerifyCallSite(&CI); if (Function *F = CI.getCalledFunction()) { if (Intrinsic::ID ID = (Intrinsic::ID)F->getIntrinsicID()) visitIntrinsicFunctionCall(ID, CI); } - - visitInstruction(CI); +} + +void Verifier::visitInvokeInst(InvokeInst &II) { + VerifyCallSite(&II); } /// visitBinaryOperator - Check that both arguments to the binary operator are Added: llvm/trunk/test/Verifier/2007-12-21-InvokeParamAttrs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Verifier/2007-12-21-InvokeParamAttrs.ll?rev=45286&view=auto ============================================================================== --- llvm/trunk/test/Verifier/2007-12-21-InvokeParamAttrs.ll (added) +++ llvm/trunk/test/Verifier/2007-12-21-InvokeParamAttrs.ll Fri Dec 21 13:19:01 2007 @@ -0,0 +1,10 @@ +; RUN: not llvm-as < %s + +declare void @foo(i8*) + +define void @bar() { + invoke void @foo(i8* signext null) + to label %r unwind label %r +r: + ret void +} From baldrick at free.fr Fri Dec 21 14:18:41 2007 From: baldrick at free.fr (Duncan Sands) Date: Fri, 21 Dec 2007 20:18:41 -0000 Subject: [llvm-commits] [llvm] r45289 - /llvm/trunk/lib/Target/TargetData.cpp Message-ID: <200712212018.lBLKIf2J007224@zion.cs.uiuc.edu> Author: baldrick Date: Fri Dec 21 14:18:41 2007 New Revision: 45289 URL: http://llvm.org/viewvc/llvm-project?rev=45289&view=rev Log: Fix a brain fart by our beloved leader (the content of this patch is the last line). Modified: llvm/trunk/lib/Target/TargetData.cpp Modified: llvm/trunk/lib/Target/TargetData.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetData.cpp?rev=45289&r1=45288&r2=45289&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetData.cpp (original) +++ llvm/trunk/lib/Target/TargetData.cpp Fri Dec 21 14:18:41 2007 @@ -268,15 +268,14 @@ return ABIInfo ? Alignments[i].ABIAlign : Alignments[i].PrefAlign; // The best match so far depends on what we're looking for. - if (AlignType == VECTOR_ALIGN) { + if (AlignType == VECTOR_ALIGN && Alignments[i].AlignType == VECTOR_ALIGN) { // If this is a specification for a smaller vector type, we will fall back // to it. This happens because <128 x double> can be implemented in terms // of 64 <2 x double>. - if (Alignments[i].AlignType == VECTOR_ALIGN && - Alignments[i].TypeBitWidth < BitWidth) { + if (Alignments[i].TypeBitWidth < BitWidth) { // Verify that we pick the biggest of the fallbacks. if (BestMatchIdx == -1 || - Alignments[BestMatchIdx].TypeBitWidth < BitWidth) + Alignments[BestMatchIdx].TypeBitWidth < Alignments[i].TypeBitWidth) BestMatchIdx = i; } } else if (AlignType == INTEGER_ALIGN && From asl at math.spbu.ru Fri Dec 21 17:33:45 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Fri, 21 Dec 2007 23:33:45 -0000 Subject: [llvm-commits] [llvm] r45300 - /llvm/trunk/lib/Target/CBackend/CBackend.cpp Message-ID: <200712212333.lBLNXjoL021246@zion.cs.uiuc.edu> Author: asl Date: Fri Dec 21 17:33:44 2007 New Revision: 45300 URL: http://llvm.org/viewvc/llvm-project?rev=45300&view=rev Log: Fix silly typo in the FP CEP handling. Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=45300&r1=45299&r2=45300&view=diff ============================================================================== --- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original) +++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Fri Dec 21 17:33:44 2007 @@ -851,6 +851,7 @@ if (NeedsClosingParens) Out << "))"; Out << ')'; + return; } default: cerr << "CWriter Error: Unhandled constant expression: " From dalej at apple.com Fri Dec 21 18:35:53 2007 From: dalej at apple.com (Dale Johannesen) Date: Sat, 22 Dec 2007 00:35:53 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r45303 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Message-ID: <200712220035.lBM0ZrQH025500@zion.cs.uiuc.edu> Author: johannes Date: Fri Dec 21 18:35:53 2007 New Revision: 45303 URL: http://llvm.org/viewvc/llvm-project?rev=45303&view=rev Log: Comment explaining the data structure gcc uses for virtual base classes. Not what llvm thinks it is. Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-types.cpp?rev=45303&r1=45302&r2=45303&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-types.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Fri Dec 21 18:35:53 2007 @@ -1740,6 +1740,27 @@ /// ConvertRECORD - We know that 'type' is a RECORD_TYPE: convert it to an LLVM /// type. +// A note on C++ virtual base class layout. Consider the following example: +// class A { public: int i0; }; +// class B : public virtual A { public: int i1; }; +// class C : public virtual A { public: int i2; }; +// class D : public virtual B, public virtual C { public: int i3; }; +// +// The TYPE nodes gcc builds for classes represent that class as it looks +// standing alone. Thus B is size 12 and looks like { vptr; i2; baseclass A; } +// However, this is not the layout used when that class is a base class for +// some other class, yet the same TYPE node is still used. D in the above has +// both a BINFO list entry and a FIELD that reference type B, but the virtual +// base class A within B is not allocated in that case; B-within-D is only +// size 8. The correct size is in the FIELD node (does not match the size +// in its child TYPE node.) The fields to be omitted from the child TYPE, +// as far as I can tell, are always the last ones; but also, there is a +// TYPE_DECL node sitting in the middle of the FIELD list separating virtual +// base classes from everything else. +// +// For LLVM purposes, we probably need to build a new type for B-within-D that +// has the correct size and layout for that usage. + const Type *TypeConverter::ConvertRECORD(tree type, tree orig_type) { if (const Type *Ty = GET_TYPE_LLVM(type)) { // If we already compiled this type, and if it was not a forward From evan.cheng at apple.com Fri Dec 21 19:12:14 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Sat, 22 Dec 2007 01:12:14 -0000 Subject: [llvm-commits] [llvm] r45304 - /llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Message-ID: <200712220112.lBM1CEtK027722@zion.cs.uiuc.edu> Author: evancheng Date: Fri Dec 21 19:12:14 2007 New Revision: 45304 URL: http://llvm.org/viewvc/llvm-project?rev=45304&view=rev Log: Allow JIT with non-static relocation model. Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=45304&r1=45303&r2=45304&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Fri Dec 21 19:12:14 2007 @@ -170,7 +170,8 @@ bool X86TargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast, bool DumpAsm, MachineCodeEmitter &MCE) { // FIXME: Move this to TargetJITInfo! - setRelocationModel(Reloc::Static); + if (getRelocationModel() == Reloc::Default) + setRelocationModel(Reloc::Static); Subtarget.setPICStyle(PICStyle::None); // JIT cannot ensure globals are placed in the lower 4G of address. From dpatel at apple.com Fri Dec 21 19:32:53 2007 From: dpatel at apple.com (Devang Patel) Date: Sat, 22 Dec 2007 01:32:53 -0000 Subject: [llvm-commits] [llvm] r45305 - in /llvm/trunk: lib/Transforms/Utils/SimplifyCFG.cpp test/Transforms/SimplifyCFG/2007-12-21-Crash.ll Message-ID: <200712220132.lBM1WrRM029415@zion.cs.uiuc.edu> Author: dpatel Date: Fri Dec 21 19:32:53 2007 New Revision: 45305 URL: http://llvm.org/viewvc/llvm-project?rev=45305&view=rev Log: If succ has succ itself as one of the predecessors then do not merge current bb and succ even if bb's terminator is unconditional branch to succ. Added: llvm/trunk/test/Transforms/SimplifyCFG/2007-12-21-Crash.ll Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=45305&r1=45304&r2=45305&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Fri Dec 21 19:32:53 2007 @@ -110,10 +110,10 @@ // update the PHI nodes correctly. if (!isa(BB->begin()) || Succ->getSinglePredecessor()) return true; - // If the predecessors of Succ are only BB and Succ itself, handle it. + // If the predecessors of Succ are only BB, handle it. bool IsSafe = true; for (pred_iterator PI = pred_begin(Succ), E = pred_end(Succ); PI != E; ++PI) - if (*PI != Succ && *PI != BB) { + if (*PI != BB) { IsSafe = false; break; } Added: llvm/trunk/test/Transforms/SimplifyCFG/2007-12-21-Crash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyCFG/2007-12-21-Crash.ll?rev=45305&view=auto ============================================================================== --- llvm/trunk/test/Transforms/SimplifyCFG/2007-12-21-Crash.ll (added) +++ llvm/trunk/test/Transforms/SimplifyCFG/2007-12-21-Crash.ll Fri Dec 21 19:32:53 2007 @@ -0,0 +1,60 @@ +; RUN: llvm-as < %s | opt -std-compile-opts -disable-output + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" + +define i32 @bork() { +entry: + %retval = alloca i32 ; [#uses=2] + %opt = alloca i32 ; [#uses=3] + %undo = alloca i32 ; [#uses=3] + %tmp = alloca i32 ; [#uses=3] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + store i32 0, i32* %undo, align 4 + br label %bb5 + +bb: ; preds = %bb5 + %tmp1 = load i32* %opt, align 4 ; [#uses=1] + switch i32 %tmp1, label %bb4 [ + i32 102, label %bb3 + i32 110, label %bb2 + ] + +bb2: ; preds = %bb + store i32 1, i32* %undo, align 4 + br label %bb3 + +bb3: ; preds = %bb2, %bb + br label %bb5 + +bb4: ; preds = %bb + store i32 258, i32* %tmp, align 4 + br label %bb13 + +bb5: ; preds = %bb3, %entry + %tmp6 = call i32 (...)* @foo( ) nounwind ; [#uses=1] + store i32 %tmp6, i32* %opt, align 4 + %tmp7 = load i32* %opt, align 4 ; [#uses=1] + %tmp8 = icmp ne i32 %tmp7, -1 ; [#uses=1] + %tmp89 = zext i1 %tmp8 to i8 ; [#uses=1] + %toBool = icmp ne i8 %tmp89, 0 ; [#uses=1] + br i1 %toBool, label %bb, label %bb10 + +bb10: ; preds = %bb5 + %tmp11 = load i32* %undo, align 4 ; [#uses=1] + %tmp12 = call i32 (...)* @bar( i32 %tmp11 ) nounwind ; [#uses=0] + store i32 1, i32* %tmp, align 4 + br label %bb13 + +bb13: ; preds = %bb10, %bb4 + %tmp14 = load i32* %tmp, align 4 ; [#uses=1] + store i32 %tmp14, i32* %retval, align 4 + br label %return + +return: ; preds = %bb13 + %retval15 = load i32* %retval ; [#uses=1] + ret i32 %retval15 +} + +declare i32 @foo(...) + +declare i32 @bar(...) From evan.cheng at apple.com Fri Dec 21 20:26:47 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Sat, 22 Dec 2007 02:26:47 -0000 Subject: [llvm-commits] [llvm] r45307 - in /llvm/trunk/lib/Target/X86: X86ISelDAGToDAG.cpp X86InstrInfo.td Message-ID: <200712220226.lBM2QlH6032623@zion.cs.uiuc.edu> Author: evancheng Date: Fri Dec 21 20:26:46 2007 New Revision: 45307 URL: http://llvm.org/viewvc/llvm-project?rev=45307&view=rev Log: Fix JIT code emission of X86::MovePCtoStack. Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp llvm/trunk/lib/Target/X86/X86InstrInfo.td Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=45307&r1=45306&r2=45307&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Fri Dec 21 20:26:46 2007 @@ -994,7 +994,9 @@ unsigned PC = RegMap->createVirtualRegister(X86::GR32RegisterClass); const TargetInstrInfo *TII = TM.getInstrInfo(); - BuildMI(FirstMBB, MBBI, TII->get(X86::MovePCtoStack)); + // Operand of MovePCtoStack is completely ignored by asm printer. It's + // only used in JIT code emission as displacement to pc. + BuildMI(FirstMBB, MBBI, TII->get(X86::MovePCtoStack)).addImm(0); BuildMI(FirstMBB, MBBI, TII->get(X86::POP32r), PC); // If we're using vanilla 'GOT' PIC style, we should use relative addressing Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=45307&r1=45306&r2=45307&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Fri Dec 21 20:26:46 2007 @@ -356,8 +356,8 @@ let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0, MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, EFLAGS] in { - def CALLpcrel32 : I<0xE8, RawFrm, (outs), (ins i32imm:$dst, variable_ops), - "call\t${dst:call}", []>; + def CALLpcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i32imm:$dst,variable_ops), + "call\t${dst:call}", []>; def CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops), "call\t{*}$dst", [(X86call GR32:$dst)]>; def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops), @@ -408,8 +408,8 @@ let Defs = [ESP], Uses = [ESP, EFLAGS] in def PUSHFD : I<0x9C, RawFrm, (outs), (ins), "pushf", []>; -def MovePCtoStack : I<0, Pseudo, (outs), (ins piclabel:$label), - "call\t$label", []>; +def MovePCtoStack : Ii32<0xE8, RawFrm, (outs), (ins piclabel:$label), + "call\t$label", []>; let isTwoAddress = 1 in // GR32 = bswap GR32 def BSWAP32r : I<0xC8, AddRegFrm, From gordonhenriksen at mac.com Fri Dec 21 22:44:13 2007 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Sat, 22 Dec 2007 04:44:13 -0000 Subject: [llvm-commits] [llvm] r45308 - /llvm/trunk/test/CodeGen/CellSPU/ Message-ID: <200712220444.lBM4iDRV009469@zion.cs.uiuc.edu> Author: gordon Date: Fri Dec 21 22:44:11 2007 New Revision: 45308 URL: http://llvm.org/viewvc/llvm-project?rev=45308&view=rev Log: Ignoring generated files. Modified: llvm/trunk/test/CodeGen/CellSPU/ (props changed) Propchange: llvm/trunk/test/CodeGen/CellSPU/ ------------------------------------------------------------------------------ --- svn:ignore (added) +++ svn:ignore Fri Dec 21 22:44:11 2007 @@ -0,0 +1 @@ +Output From resistor at mac.com Fri Dec 21 22:50:12 2007 From: resistor at mac.com (Owen Anderson) Date: Sat, 22 Dec 2007 04:50:12 -0000 Subject: [llvm-commits] [llvm] r45309 - /llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Message-ID: <200712220450.lBM4oCm0009711@zion.cs.uiuc.edu> Author: resistor Date: Fri Dec 21 22:50:11 2007 New Revision: 45309 URL: http://llvm.org/viewvc/llvm-project?rev=45309&view=rev Log: Remove critical edge breaking. It won't be necessary as long as we are very careful when inserting copies. Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=45309&r1=45308&r2=45309&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original) +++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Fri Dec 21 22:50:11 2007 @@ -21,7 +21,6 @@ #define DEBUG_TYPE "strongphielim" #include "llvm/CodeGen/Passes.h" -#include "llvm/CodeGen/BreakCriticalMachineEdge.h" #include "llvm/CodeGen/LiveVariables.h" #include "llvm/CodeGen/MachineDominators.h" #include "llvm/CodeGen/MachineFunctionPass.h" @@ -101,7 +100,6 @@ std::set& PHIUnion, std::vector& DF, std::vector >& locals); - void breakCriticalEdges(MachineFunction &Fn); }; @@ -501,42 +499,7 @@ } } -/// breakCriticalEdges - Break critical edges coming into blocks with PHI -/// nodes, preserving dominator and livevariable info. -void StrongPHIElimination::breakCriticalEdges(MachineFunction &Fn) { - typedef std::pair MBB_pair; - - MachineDominatorTree& MDT = getAnalysis(); - LiveVariables& LV = getAnalysis(); - - // Find critical edges - std::vector criticals; - for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) - if (!I->empty() && - I->begin()->getOpcode() == TargetInstrInfo::PHI && - I->pred_size() > 1) - for (MachineBasicBlock::pred_iterator PI = I->pred_begin(), - PE = I->pred_end(); PI != PE; ++PI) - if ((*PI)->succ_size() > 1) - criticals.push_back(std::make_pair(*PI, I)); - - for (std::vector::iterator I = criticals.begin(), - E = criticals.end(); I != E; ++I) { - // Split the edge - MachineBasicBlock* new_bb = SplitCriticalMachineEdge(I->first, I->second); - - // Update dominators - MDT.splitBlock(I->first); - - // Update livevariables - for (unsigned var = 1024; var < Fn.getSSARegMap()->getLastVirtReg(); ++var) - if (isLiveOut(LV.getVarInfo(var), I->first)) - LV.getVarInfo(var).AliveBlocks.set(new_bb->getNumber()); - } -} - bool StrongPHIElimination::runOnMachineFunction(MachineFunction &Fn) { - breakCriticalEdges(Fn); computeDFS(Fn); for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) From resistor at mac.com Fri Dec 21 22:59:11 2007 From: resistor at mac.com (Owen Anderson) Date: Sat, 22 Dec 2007 04:59:11 -0000 Subject: [llvm-commits] [llvm] r45310 - /llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Message-ID: <200712220459.lBM4xB2k010231@zion.cs.uiuc.edu> Author: resistor Date: Fri Dec 21 22:59:10 2007 New Revision: 45310 URL: http://llvm.org/viewvc/llvm-project?rev=45310&view=rev Log: Note what still needs doing. Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=45310&r1=45309&r2=45310&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original) +++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Fri Dec 21 22:59:10 2007 @@ -397,7 +397,7 @@ std::vector > localInterferences; processPHIUnion(P, PHIUnion, DF, localInterferences); - // FIXME: Check for local interferences + // Check for local interferences for (std::vector >::iterator I = localInterferences.begin(), E = localInterferences.end(); I != E; ++I) { std::pair p = *I; @@ -439,6 +439,8 @@ } } + // FIXME: Cache renaming information + ProcessedNames.insert(PHIUnion.begin(), PHIUnion.end()); ++P; } @@ -507,5 +509,8 @@ I->begin()->getOpcode() == TargetInstrInfo::PHI) processBlock(I); + // FIXME: Insert copies + // FIXME: Perform renaming + return false; } From sabre at nondot.org Sat Dec 22 03:07:49 2007 From: sabre at nondot.org (Chris Lattner) Date: Sat, 22 Dec 2007 09:07:49 -0000 Subject: [llvm-commits] [llvm] r45311 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/shift-trunc-shift.ll Message-ID: <200712220907.lBM97otq030737@zion.cs.uiuc.edu> Author: lattner Date: Sat Dec 22 03:07:47 2007 New Revision: 45311 URL: http://llvm.org/viewvc/llvm-project?rev=45311&view=rev Log: implement InstCombine/shift-trunc-shift.ll. This allows us to compile: #include int t1(double d) { return signbit(d); } into: _t1: movd %xmm0, %rax shrq $63, %rax ret instead of: _t1: movd %xmm0, %rax shrq $32, %rax shrl $31, %eax ret on x86-64. Added: llvm/trunk/test/Transforms/InstCombine/shift-trunc-shift.ll Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=45311&r1=45310&r2=45311&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Sat Dec 22 03:07:47 2007 @@ -6004,6 +6004,50 @@ if (Instruction *NV = FoldOpIntoPhi(I)) return NV; + // Fold shift2(trunc(shift1(x,c1)), c2) -> trunc(shift2(shift1(x,c1),c2)) + if (TruncInst *TI = dyn_cast(Op0)) { + Instruction *TrOp = dyn_cast(TI->getOperand(0)); + // If 'shift2' is an ashr, we would have to get the sign bit into a funny + // place. Don't try to do this transformation in this case. Also, we + // require that the input operand is a shift-by-constant so that we have + // confidence that the shifts will get folded together. We could do this + // xform in more cases, but it is unlikely to be profitable. + if (TrOp && I.isLogicalShift() && TrOp->isShift() && + isa(TrOp->getOperand(1))) { + // Okay, we'll do this xform. Make the shift of shift. + Constant *ShAmt = ConstantExpr::getZExt(Op1, TrOp->getType()); + Instruction *NSh = BinaryOperator::create(I.getOpcode(), TrOp, ShAmt, + I.getName()); + InsertNewInstBefore(NSh, I); // (shift2 (shift1 & 0x00FF), c2) + + // For logical shifts, the truncation has the effect of making the high + // part of the register be zeros. Emulate this by inserting an AND to + // clear the top bits as needed. This 'and' will usually be zapped by + // other xforms later if dead. + unsigned SrcSize = TrOp->getType()->getPrimitiveSizeInBits(); + unsigned DstSize = TI->getType()->getPrimitiveSizeInBits(); + APInt MaskV(APInt::getLowBitsSet(SrcSize, DstSize)); + + // The mask we constructed says what the trunc would do if occurring + // between the shifts. We want to know the effect *after* the second + // shift. We know that it is a logical shift by a constant, so adjust the + // mask as appropriate. + if (I.getOpcode() == Instruction::Shl) + MaskV <<= Op1->getZExtValue(); + else { + assert(I.getOpcode() == Instruction::LShr && "Unknown logical shift"); + MaskV = MaskV.lshr(Op1->getZExtValue()); + } + + Instruction *And = BinaryOperator::createAnd(NSh, ConstantInt::get(MaskV), + TI->getName()); + InsertNewInstBefore(And, I); // shift1 & 0x00FF + + // Return the value truncated to the interesting size. + return new TruncInst(And, I.getType()); + } + } + if (Op0->hasOneUse()) { if (BinaryOperator *Op0BO = dyn_cast(Op0)) { // Turn ((X >> C) + Y) << C -> (X + (Y << C)) & (~0 << C) Added: llvm/trunk/test/Transforms/InstCombine/shift-trunc-shift.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift-trunc-shift.ll?rev=45311&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/shift-trunc-shift.ll (added) +++ llvm/trunk/test/Transforms/InstCombine/shift-trunc-shift.ll Sat Dec 22 03:07:47 2007 @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep lshr.*63 + +define i32 @t1(i64 %d18) { +entry: + %tmp916 = lshr i64 %d18, 32 ; [#uses=1] + %tmp917 = trunc i64 %tmp916 to i32 ; [#uses=1] + %tmp10 = lshr i32 %tmp917, 31 ; [#uses=1] + ret i32 %tmp10 +} + From evan.cheng at apple.com Sat Dec 22 03:14:34 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Sat, 22 Dec 2007 09:14:34 -0000 Subject: [llvm-commits] [llvm] r45312 - /llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Message-ID: <200712220914.lBM9EZtq031015@zion.cs.uiuc.edu> Author: evancheng Date: Sat Dec 22 03:14:34 2007 New Revision: 45312 URL: http://llvm.org/viewvc/llvm-project?rev=45312&view=rev Log: Oops. Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=45312&r1=45311&r2=45312&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Sat Dec 22 03:14:34 2007 @@ -170,8 +170,7 @@ bool X86TargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast, bool DumpAsm, MachineCodeEmitter &MCE) { // FIXME: Move this to TargetJITInfo! - if (getRelocationModel() == Reloc::Default) - setRelocationModel(Reloc::Static); + setRelocationModel(Reloc::Static); Subtarget.setPICStyle(PICStyle::None); // JIT cannot ensure globals are placed in the lower 4G of address. From evan.cheng at apple.com Sat Dec 22 03:40:22 2007 From: evan.cheng at apple.com (Evan Cheng) Date: Sat, 22 Dec 2007 09:40:22 -0000 Subject: [llvm-commits] [llvm] r45313 - in /llvm/trunk/lib/Target/X86: X86CodeEmitter.cpp X86JITInfo.cpp X86Relocations.h X86TargetMachine.cpp X86TargetMachine.h Message-ID: <200712220940.lBM9eOvA031916@zion.cs.uiuc.edu> Author: evancheng Date: Sat Dec 22 03:40:20 2007 New Revision: 45313 URL: http://llvm.org/viewvc/llvm-project?rev=45313&view=rev Log: Preliminary PIC JIT support for X86 (32-bit) / Darwin. Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp llvm/trunk/lib/Target/X86/X86JITInfo.cpp llvm/trunk/lib/Target/X86/X86Relocations.h llvm/trunk/lib/Target/X86/X86TargetMachine.cpp llvm/trunk/lib/Target/X86/X86TargetMachine.h Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=45313&r1=45312&r2=45313&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Sat Dec 22 03:40:20 2007 @@ -37,16 +37,20 @@ const TargetData *TD; TargetMachine &TM; MachineCodeEmitter &MCE; + intptr_t PICBase; bool Is64BitMode; + bool IsPIC; public: static char ID; explicit Emitter(TargetMachine &tm, MachineCodeEmitter &mce) : MachineFunctionPass((intptr_t)&ID), II(0), TD(0), TM(tm), - MCE(mce), Is64BitMode(false) {} + MCE(mce), PICBase(0), Is64BitMode(false), + IsPIC(TM.getRelocationModel() == Reloc::PIC_) {} Emitter(TargetMachine &tm, MachineCodeEmitter &mce, const X86InstrInfo &ii, const TargetData &td, bool is64) : MachineFunctionPass((intptr_t)&ID), II(&ii), TD(&td), TM(tm), - MCE(mce), Is64BitMode(is64) {} + MCE(mce), PICBase(0), Is64BitMode(is64), + IsPIC(TM.getRelocationModel() == Reloc::PIC_) {} bool runOnMachineFunction(MachineFunction &MF); @@ -58,17 +62,18 @@ private: void emitPCRelativeBlockAddress(MachineBasicBlock *MBB); - void emitPCRelativeValue(intptr_t Address); - void emitGlobalAddressForCall(GlobalValue *GV, bool DoesntNeedStub); - void emitGlobalAddressForPtr(GlobalValue *GV, unsigned Reloc, - int Disp = 0, unsigned PCAdj = 0); - void emitExternalSymbolAddress(const char *ES, unsigned Reloc); + void emitGlobalAddress(GlobalValue *GV, unsigned Reloc, + int Disp = 0, intptr_t PCAdj = 0, + bool DoesntNeedStub = false, bool isPIC = false); + void emitExternalSymbolAddress(const char *ES, unsigned Reloc, + bool isPIC = false); void emitConstPoolAddress(unsigned CPI, unsigned Reloc, int Disp = 0, - unsigned PCAdj = 0); - void emitJumpTableAddress(unsigned JTI, unsigned Reloc, unsigned PCAdj = 0); + intptr_t PCAdj = 0, bool isPIC = false); + void emitJumpTableAddress(unsigned JTI, unsigned Reloc, + intptr_t PCAdj = 0, bool isPIC = false); void emitDisplacementField(const MachineOperand *RelocOp, int DispVal, - unsigned PCAdj = 0); + intptr_t PCAdj = 0); void emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeField); void emitSIBByte(unsigned SS, unsigned Index, unsigned Base); @@ -76,7 +81,7 @@ void emitMemModRMByte(const MachineInstr &MI, unsigned Op, unsigned RegOpcodeField, - unsigned PCAdj = 0); + intptr_t PCAdj = 0); unsigned getX86RegNum(unsigned RegNo); bool isX86_64ExtendedReg(const MachineOperand &MO); @@ -115,12 +120,6 @@ return false; } -/// emitPCRelativeValue - Emit a PC relative address. -/// -void Emitter::emitPCRelativeValue(intptr_t Address) { - MCE.emitWordLE(Address-MCE.getCurrentPCValue()-4); -} - /// emitPCRelativeBlockAddress - This method keeps track of the information /// necessary to resolve the address of this block later and emits a dummy /// value. @@ -133,24 +132,17 @@ MCE.emitWordLE(0); } -/// emitGlobalAddressForCall - Emit the specified address to the code stream -/// assuming this is part of a function call, which is PC relative. -/// -void Emitter::emitGlobalAddressForCall(GlobalValue *GV, bool DoesntNeedStub) { - MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), - X86::reloc_pcrel_word, GV, 0, - DoesntNeedStub)); - MCE.emitWordLE(0); -} - /// emitGlobalAddress - Emit the specified address to the code stream assuming /// this is part of a "take the address of a global" instruction. /// -void Emitter::emitGlobalAddressForPtr(GlobalValue *GV, unsigned Reloc, - int Disp /* = 0 */, - unsigned PCAdj /* = 0 */) { +void Emitter::emitGlobalAddress(GlobalValue *GV, unsigned Reloc, + int Disp /* = 0 */, intptr_t PCAdj /* = 0 */, + bool DoesntNeedStub /* = false */, + bool isPIC /* = false */) { + if (isPIC) + PCAdj += PICBase; MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc, - GV, PCAdj)); + GV, PCAdj, DoesntNeedStub)); if (Reloc == X86::reloc_absolute_dword) MCE.emitWordLE(0); MCE.emitWordLE(Disp); // The relocated value will be added to the displacement @@ -159,9 +151,11 @@ /// emitExternalSymbolAddress - Arrange for the address of an external symbol to /// be emitted to the current location in the function, and allow it to be PC /// relative. -void Emitter::emitExternalSymbolAddress(const char *ES, unsigned Reloc) { +void Emitter::emitExternalSymbolAddress(const char *ES, unsigned Reloc, + bool isPIC /* = false */) { + intptr_t PCAdj = isPIC ? PICBase : 0; MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(), - Reloc, ES)); + Reloc, ES, PCAdj)); if (Reloc == X86::reloc_absolute_dword) MCE.emitWordLE(0); MCE.emitWordLE(0); @@ -172,7 +166,10 @@ /// relative. void Emitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc, int Disp /* = 0 */, - unsigned PCAdj /* = 0 */) { + intptr_t PCAdj /* = 0 */, + bool isPIC /* = false */) { + if (isPIC) + PCAdj += PICBase; MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(), Reloc, CPI, PCAdj)); if (Reloc == X86::reloc_absolute_dword) @@ -184,7 +181,10 @@ /// be emitted to the current location in the function, and allow it to be PC /// relative. void Emitter::emitJumpTableAddress(unsigned JTI, unsigned Reloc, - unsigned PCAdj /* = 0 */) { + intptr_t PCAdj /* = 0 */, + bool isPIC /* = false */) { + if (isPIC) + PCAdj += PICBase; MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(), Reloc, JTI, PCAdj)); if (Reloc == X86::reloc_absolute_dword) @@ -226,7 +226,7 @@ } void Emitter::emitDisplacementField(const MachineOperand *RelocOp, - int DispVal, unsigned PCAdj) { + int DispVal, intptr_t PCAdj) { // If this is a simple integer displacement that doesn't require a relocation, // emit it now. if (!RelocOp) { @@ -241,17 +241,18 @@ // But it's probably not beneficial. // 89 05 00 00 00 00 mov %eax,0(%rip) # PC-relative // 89 04 25 00 00 00 00 mov %eax,0x0 # Absolute - unsigned rt= Is64BitMode ? X86::reloc_pcrel_word : X86::reloc_absolute_word; - emitGlobalAddressForPtr(RelocOp->getGlobal(), rt, - RelocOp->getOffset(), PCAdj); + unsigned rt= Is64BitMode ? X86::reloc_pcrel_word + : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); + emitGlobalAddress(RelocOp->getGlobal(), rt, RelocOp->getOffset(), + PCAdj, false, IsPIC); } else if (RelocOp->isConstantPoolIndex()) { // Must be in 64-bit mode. emitConstPoolAddress(RelocOp->getConstantPoolIndex(), X86::reloc_pcrel_word, - RelocOp->getOffset(), PCAdj); + RelocOp->getOffset(), PCAdj, IsPIC); } else if (RelocOp->isJumpTableIndex()) { // Must be in 64-bit mode. emitJumpTableAddress(RelocOp->getJumpTableIndex(), X86::reloc_pcrel_word, - PCAdj); + PCAdj, IsPIC); } else { assert(0 && "Unknown value to relocate!"); } @@ -259,7 +260,7 @@ void Emitter::emitMemModRMByte(const MachineInstr &MI, unsigned Op, unsigned RegOpcodeField, - unsigned PCAdj) { + intptr_t PCAdj) { const MachineOperand &Op3 = MI.getOperand(Op+3); int DispVal = 0; const MachineOperand *DispForReloc = 0; @@ -605,15 +606,22 @@ bool NeedStub = Is64BitMode || Opcode == X86::TAILJMPd || Opcode == X86::TAILJMPr || Opcode == X86::TAILJMPm; - emitGlobalAddressForCall(MO.getGlobal(), !NeedStub); + emitGlobalAddress(MO.getGlobal(), X86::reloc_pcrel_word, + 0, 0, !NeedStub, false); } else if (MO.isExternalSymbol()) { - emitExternalSymbolAddress(MO.getSymbolName(), X86::reloc_pcrel_word); + emitExternalSymbolAddress(MO.getSymbolName(), + X86::reloc_pcrel_word, false); } else if (MO.isImmediate()) { emitConstant(MO.getImm(), sizeOfImm(Desc)); } else { assert(0 && "Unknown RawFrm operand!"); } } + + // Remember the current PC offset, this is the PIC relocation + // base address. + if (Opcode == X86::MovePCtoStack) + PICBase = MCE.getCurrentPCOffset(); break; case X86II::AddRegFrm: @@ -625,17 +633,18 @@ if (MO1.isImmediate()) emitConstant(MO1.getImm(), Size); else { - unsigned rt = Is64BitMode ? X86::reloc_pcrel_word : X86::reloc_absolute_word; + unsigned rt = Is64BitMode ? X86::reloc_pcrel_word + : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); if (Opcode == X86::MOV64ri) rt = X86::reloc_absolute_dword; // FIXME: add X86II flag? if (MO1.isGlobalAddress()) - emitGlobalAddressForPtr(MO1.getGlobal(), rt, MO1.getOffset()); + emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), false, IsPIC); else if (MO1.isExternalSymbol()) - emitExternalSymbolAddress(MO1.getSymbolName(), rt); + emitExternalSymbolAddress(MO1.getSymbolName(), rt, IsPIC); else if (MO1.isConstantPoolIndex()) - emitConstPoolAddress(MO1.getConstantPoolIndex(), rt); + emitConstPoolAddress(MO1.getConstantPoolIndex(), rt, IsPIC); else if (MO1.isJumpTableIndex()) - emitJumpTableAddress(MO1.getJumpTableIndex(), rt); + emitJumpTableAddress(MO1.getJumpTableIndex(), rt, IsPIC); } } break; @@ -668,7 +677,7 @@ break; case X86II::MRMSrcMem: { - unsigned PCAdj = (CurOp+5 != NumOps) ? sizeOfImm(Desc) : 0; + intptr_t PCAdj = (CurOp+5 != NumOps) ? sizeOfImm(Desc) : 0; MCE.emitByte(BaseOpcode); emitMemModRMByte(MI, CurOp+1, getX86RegNum(MI.getOperand(CurOp).getReg()), @@ -694,17 +703,17 @@ emitConstant(MO1.getImm(), Size); else { unsigned rt = Is64BitMode ? X86::reloc_pcrel_word - : X86::reloc_absolute_word; + : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); if (Opcode == X86::MOV64ri32) rt = X86::reloc_absolute_word; // FIXME: add X86II flag? if (MO1.isGlobalAddress()) - emitGlobalAddressForPtr(MO1.getGlobal(), rt, MO1.getOffset()); + emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), false, IsPIC); else if (MO1.isExternalSymbol()) - emitExternalSymbolAddress(MO1.getSymbolName(), rt); + emitExternalSymbolAddress(MO1.getSymbolName(), rt, IsPIC); else if (MO1.isConstantPoolIndex()) - emitConstPoolAddress(MO1.getConstantPoolIndex(), rt); + emitConstPoolAddress(MO1.getConstantPoolIndex(), rt, IsPIC); else if (MO1.isJumpTableIndex()) - emitJumpTableAddress(MO1.getJumpTableIndex(), rt); + emitJumpTableAddress(MO1.getJumpTableIndex(), rt, IsPIC); } } break; @@ -713,7 +722,7 @@ case X86II::MRM2m: case X86II::MRM3m: case X86II::MRM4m: case X86II::MRM5m: case X86II::MRM6m: case X86II::MRM7m: { - unsigned PCAdj = (CurOp+4 != NumOps) ? + intptr_t PCAdj = (CurOp+4 != NumOps) ? (MI.getOperand(CurOp+4).isImmediate() ? sizeOfImm(Desc) : 4) : 0; MCE.emitByte(BaseOpcode); @@ -728,17 +737,17 @@ emitConstant(MO.getImm(), Size); else { unsigned rt = Is64BitMode ? X86::reloc_pcrel_word - : X86::reloc_absolute_word; + : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); if (Opcode == X86::MOV64mi32) rt = X86::reloc_absolute_word; // FIXME: add X86II flag? if (MO.isGlobalAddress()) - emitGlobalAddressForPtr(MO.getGlobal(), rt, MO.getOffset()); + emitGlobalAddress(MO.getGlobal(), rt, MO.getOffset(), false, IsPIC); else if (MO.isExternalSymbol()) - emitExternalSymbolAddress(MO.getSymbolName(), rt); + emitExternalSymbolAddress(MO.getSymbolName(), rt, IsPIC); else if (MO.isConstantPoolIndex()) - emitConstPoolAddress(MO.getConstantPoolIndex(), rt); + emitConstPoolAddress(MO.getConstantPoolIndex(), rt, IsPIC); else if (MO.isJumpTableIndex()) - emitJumpTableAddress(MO.getJumpTableIndex(), rt); + emitJumpTableAddress(MO.getJumpTableIndex(), rt, IsPIC); } } break; Modified: llvm/trunk/lib/Target/X86/X86JITInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86JITInfo.cpp?rev=45313&r1=45312&r2=45313&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86JITInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86JITInfo.cpp Sat Dec 22 03:40:20 2007 @@ -437,7 +437,14 @@ case X86::reloc_pcrel_word: { // PC relative relocation, add the relocated value to the value already in // memory, after we adjust it for where the PC is. - ResultPtr = ResultPtr-(intptr_t)RelocPos-4-MR->getConstantVal(); + ResultPtr = ResultPtr -(intptr_t)RelocPos - 4 - MR->getConstantVal(); + *((unsigned*)RelocPos) += (unsigned)ResultPtr; + break; + } + case X86::reloc_picrel_word: { + // PIC base relative relocation, add the relocated value to the value + // already in memory, after we adjust it for where the PIC base is. + ResultPtr = ResultPtr - ((intptr_t)Function + MR->getConstantVal()); *((unsigned*)RelocPos) += (unsigned)ResultPtr; break; } Modified: llvm/trunk/lib/Target/X86/X86Relocations.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Relocations.h?rev=45313&r1=45312&r2=45313&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86Relocations.h (original) +++ llvm/trunk/lib/Target/X86/X86Relocations.h Sat Dec 22 03:40:20 2007 @@ -23,10 +23,15 @@ // the value already in memory, after we adjust it for where the PC is. reloc_pcrel_word = 0, + // reloc_picrel_word - PIC base relative relocation, add the relocated + // value to the value already in memory, after we adjust it for where the + // PIC base is. + reloc_picrel_word = 1, + // reloc_absolute_word, reloc_absolute_dword - Absolute relocation, just // add the relocated value to the value already in memory. - reloc_absolute_word = 1, - reloc_absolute_dword = 2 + reloc_absolute_word = 2, + reloc_absolute_dword = 3 }; } } Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=45313&r1=45312&r2=45313&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Sat Dec 22 03:40:20 2007 @@ -118,6 +118,7 @@ FrameInfo(TargetFrameInfo::StackGrowsDown, Subtarget.getStackAlignment(), Subtarget.is64Bit() ? -8 : -4), InstrInfo(*this), JITInfo(*this), TLInfo(*this) { + DefRelocModel = getRelocationModel(); if (getRelocationModel() == Reloc::Default) if (Subtarget.isTargetDarwin() || Subtarget.isTargetCygMing()) setRelocationModel(Reloc::DynamicNoPIC); @@ -170,7 +171,8 @@ bool X86TargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast, bool DumpAsm, MachineCodeEmitter &MCE) { // FIXME: Move this to TargetJITInfo! - setRelocationModel(Reloc::Static); + if (DefRelocModel == Reloc::Default) + setRelocationModel(Reloc::Static); Subtarget.setPICStyle(PICStyle::None); // JIT cannot ensure globals are placed in the lower 4G of address. Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=45313&r1=45312&r2=45313&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original) +++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Sat Dec 22 03:40:20 2007 @@ -34,6 +34,7 @@ X86JITInfo JITInfo; X86TargetLowering TLInfo; X86ELFWriterInfo ELFWriterInfo; + Reloc::Model DefRelocModel; // Reloc model before it's overridden. protected: virtual const TargetAsmInfo *createTargetAsmInfo() const; From asl at math.spbu.ru Sat Dec 22 08:26:49 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Sat, 22 Dec 2007 14:26:49 -0000 Subject: [llvm-commits] [llvm] r45314 - /llvm/trunk/lib/System/Win32/Path.inc Message-ID: <200712221426.lBMEQomh011711@zion.cs.uiuc.edu> Author: asl Date: Sat Dec 22 08:26:49 2007 New Revision: 45314 URL: http://llvm.org/viewvc/llvm-project?rev=45314&view=rev Log: Unbreak mingw build Modified: llvm/trunk/lib/System/Win32/Path.inc Modified: llvm/trunk/lib/System/Win32/Path.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/Path.inc?rev=45314&r1=45313&r2=45314&view=diff ============================================================================== --- llvm/trunk/lib/System/Win32/Path.inc (original) +++ llvm/trunk/lib/System/Win32/Path.inc Sat Dec 22 08:26:49 2007 @@ -24,6 +24,7 @@ // We need to undo a macro defined in Windows.h, otherwise we won't compile: #undef CopyFile +#undef GetCurrentDirectory // Windows happily accepts either forward or backward slashes, though any path // returned by a Win32 API will have backward slashes. As LLVM code basically @@ -226,7 +227,7 @@ Path Path::GetCurrentDirectory() { char pathname[MAX_PATH]; - GetCurrentDirectory(pathname,MAX_PATH); + ::GetCurrentDirectoryA(MAX_PATH,pathname); return Path(pathname); } From asl at math.spbu.ru Sat Dec 22 08:27:49 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Sat, 22 Dec 2007 14:27:49 -0000 Subject: [llvm-commits] [llvm] r45315 - /llvm/trunk/include/llvm/CodeGen/MachineLoopInfo.h Message-ID: <200712221427.lBMERnk8011753@zion.cs.uiuc.edu> Author: asl Date: Sat Dec 22 08:27:49 2007 New Revision: 45315 URL: http://llvm.org/viewvc/llvm-project?rev=45315&view=rev Log: Unbreak build on gcc 3.x Modified: llvm/trunk/include/llvm/CodeGen/MachineLoopInfo.h Modified: llvm/trunk/include/llvm/CodeGen/MachineLoopInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineLoopInfo.h?rev=45315&r1=45314&r2=45315&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineLoopInfo.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineLoopInfo.h Sat Dec 22 08:27:49 2007 @@ -70,9 +70,6 @@ return false; } -EXTERN_TEMPLATE_INSTANTIATION(class LoopBase); -EXTERN_TEMPLATE_INSTANTIATION(class LoopInfoBase); - typedef LoopBase MachineLoop; class MachineLoopInfo : public MachineFunctionPass { From gordonhenriksen at mac.com Sat Dec 22 11:27:01 2007 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Sat, 22 Dec 2007 17:27:01 -0000 Subject: [llvm-commits] [llvm] r45316 - /llvm/trunk/lib/CodeGen/Collector.cpp Message-ID: <200712221727.lBMHR1L7022633@zion.cs.uiuc.edu> Author: gordon Date: Sat Dec 22 11:27:01 2007 New Revision: 45316 URL: http://llvm.org/viewvc/llvm-project?rev=45316&view=rev Log: Use getIntrinsicID instead of looking up intrinsic prototypes. Also fixes a bug with indirect calls. (Test case will be included with ocaml collector patch.) Modified: llvm/trunk/lib/CodeGen/Collector.cpp Modified: llvm/trunk/lib/CodeGen/Collector.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/Collector.cpp?rev=45316&r1=45315&r2=45316&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/Collector.cpp (original) +++ llvm/trunk/lib/CodeGen/Collector.cpp Sat Dec 22 11:27:01 2007 @@ -35,10 +35,6 @@ /// directed by the Collector. It also performs automatic root initialization /// and custom intrinsic lowering. class VISIBILITY_HIDDEN LowerIntrinsics : public FunctionPass { - /// GCRootInt, GCReadInt, GCWriteInt - The function prototypes for the - /// llvm.gc* intrinsics. - Function *GCRootInt, *GCReadInt, *GCWriteInt; - static bool NeedsDefaultLoweringPass(const Collector &C); static bool NeedsCustomLoweringPass(const Collector &C); static bool CouldBecomeSafePoint(Instruction *I); @@ -138,8 +134,7 @@ char LowerIntrinsics::ID = 0; LowerIntrinsics::LowerIntrinsics() - : FunctionPass((intptr_t)&ID), - GCRootInt(0), GCReadInt(0), GCWriteInt(0) {} + : FunctionPass((intptr_t)&ID) {} const char *LowerIntrinsics::getPassName() const { return "Lower Garbage Collection Instructions"; @@ -152,10 +147,6 @@ /// doInitialization - If this module uses the GC intrinsics, find them now. bool LowerIntrinsics::doInitialization(Module &M) { - GCReadInt = M.getFunction("llvm.gcread"); - GCWriteInt = M.getFunction("llvm.gcwrite"); - GCRootInt = M.getFunction("llvm.gcroot"); - // FIXME: This is rather antisocial in the context of a JIT since it performs // work against the entire module. But this cannot be done at // runFunction time (initializeCustomLowering likely needs to change @@ -277,25 +268,35 @@ bool MadeChange = false; for (Function::iterator BB = F.begin(), E = F.end(); BB != E; ++BB) { for (BasicBlock::iterator II = BB->begin(), E = BB->end(); II != E;) { - if (CallInst *CI = dyn_cast(II++)) { + if (IntrinsicInst *CI = dyn_cast(II++)) { Function *F = CI->getCalledFunction(); - if (F == GCWriteInt && LowerWr) { - // Replace a write barrier with a simple store. - Value *St = new StoreInst(CI->getOperand(1), CI->getOperand(3), CI); - CI->replaceAllUsesWith(St); - CI->eraseFromParent(); - } else if (F == GCReadInt && LowerRd) { - // Replace a read barrier with a simple load. - Value *Ld = new LoadInst(CI->getOperand(2), "", CI); - Ld->takeName(CI); - CI->replaceAllUsesWith(Ld); - CI->eraseFromParent(); - } else if (F == GCRootInt && InitRoots) { - // Initialize the GC root, but do not delete the intrinsic. The - // backend needs the intrinsic to flag the stack slot. - Roots.push_back(cast( - IntrinsicInst::StripPointerCasts(CI->getOperand(1)))); - } else { + switch (F->getIntrinsicID()) { + case Intrinsic::gcwrite: + if (LowerWr) { + // Replace a write barrier with a simple store. + Value *St = new StoreInst(CI->getOperand(1), CI->getOperand(3), CI); + CI->replaceAllUsesWith(St); + CI->eraseFromParent(); + } + break; + case Intrinsic::gcread: + if (LowerRd) { + // Replace a read barrier with a simple load. + Value *Ld = new LoadInst(CI->getOperand(2), "", CI); + Ld->takeName(CI); + CI->replaceAllUsesWith(Ld); + CI->eraseFromParent(); + } + break; + case Intrinsic::gcroot: + if (InitRoots) { + // Initialize the GC root, but do not delete the intrinsic. The + // backend needs the intrinsic to flag the stack slot. + Roots.push_back(cast( + IntrinsicInst::StripPointerCasts(CI->getOperand(1)))); + } + break; + default: continue; } From clattner at apple.com Sat Dec 22 12:45:41 2007 From: clattner at apple.com (Chris Lattner) Date: Sat, 22 Dec 2007 10:45:41 -0800 Subject: [llvm-commits] [llvm] r45305 - in /llvm/trunk: lib/Transforms/Utils/SimplifyCFG.cpp test/Transforms/SimplifyCFG/2007-12-21-Crash.ll In-Reply-To: <200712220132.lBM1WrRM029415@zion.cs.uiuc.edu> References: <200712220132.lBM1WrRM029415@zion.cs.uiuc.edu> Message-ID: <7A1E81C4-31CB-4D3A-817C-06F118DCC9D9@apple.com> On Dec 21, 2007, at 5:32 PM, Devang Patel wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=45305&view=rev > Log: > If succ has succ itself as one of the predecessors then do > not merge current bb and succ even if bb's terminator is > unconditional branch to succ. Hi Devang, > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/test/Transforms/SimplifyCFG/2007-12-21-Crash.ll (added) > +++ llvm/trunk/test/Transforms/SimplifyCFG/2007-12-21-Crash.ll Fri > Dec 21 19:32:53 2007 > @@ -0,0 +1,60 @@ > +; RUN: llvm-as < %s | opt -std-compile-opts -disable-output Please just make the testcase use -simplifycfg instead of -std-compile- opts. The contents of -std-compile-opts can change over time and we want to make sure that this is testing the right thing. Thanks! -Chris From gordonhenriksen at mac.com Sat Dec 22 13:41:31 2007 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Sat, 22 Dec 2007 19:41:31 -0000 Subject: [llvm-commits] [llvm] r45317 - in /llvm/trunk/test/Bindings/Ocaml: analysis.ml bitreader.ml bitwriter.ml vmcore.ml Message-ID: <200712221941.lBMJfVI7029141@zion.cs.uiuc.edu> Author: gordon Date: Sat Dec 22 13:41:30 2007 New Revision: 45317 URL: http://llvm.org/viewvc/llvm-project?rev=45317&view=rev Log: Fix a partial application typo. Modified: llvm/trunk/test/Bindings/Ocaml/analysis.ml llvm/trunk/test/Bindings/Ocaml/bitreader.ml llvm/trunk/test/Bindings/Ocaml/bitwriter.ml llvm/trunk/test/Bindings/Ocaml/vmcore.ml Modified: llvm/trunk/test/Bindings/Ocaml/analysis.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bindings/Ocaml/analysis.ml?rev=45317&r1=45316&r2=45317&view=diff ============================================================================== --- llvm/trunk/test/Bindings/Ocaml/analysis.ml (original) +++ llvm/trunk/test/Bindings/Ocaml/analysis.ml Sat Dec 22 13:41:30 2007 @@ -1,4 +1,4 @@ -(* RUN: %ocamlc llvm.cma llvm_analysis.cma %s -o %t +(* RUN: %ocamlc -warn-error A llvm.cma llvm_analysis.cma %s -o %t * RUN: ./%t %t.bc *) Modified: llvm/trunk/test/Bindings/Ocaml/bitreader.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bindings/Ocaml/bitreader.ml?rev=45317&r1=45316&r2=45317&view=diff ============================================================================== --- llvm/trunk/test/Bindings/Ocaml/bitreader.ml (original) +++ llvm/trunk/test/Bindings/Ocaml/bitreader.ml Sat Dec 22 13:41:30 2007 @@ -1,4 +1,4 @@ -(* RUN: %ocamlc llvm.cma llvm_bitreader.cma llvm_bitwriter.cma %s -o %t +(* RUN: %ocamlc -warn-error A llvm.cma llvm_bitreader.cma llvm_bitwriter.cma %s -o %t * RUN: ./%t %t.bc * RUN: llvm-dis < %t.bc | grep caml_int_ty *) @@ -25,7 +25,7 @@ let m = Llvm_bitreader.parse_bitcode mb in Llvm.dispose_module m with x -> - Llvm.MemoryBuffer.dispose; + Llvm.MemoryBuffer.dispose mb; raise x end end; Modified: llvm/trunk/test/Bindings/Ocaml/bitwriter.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bindings/Ocaml/bitwriter.ml?rev=45317&r1=45316&r2=45317&view=diff ============================================================================== --- llvm/trunk/test/Bindings/Ocaml/bitwriter.ml (original) +++ llvm/trunk/test/Bindings/Ocaml/bitwriter.ml Sat Dec 22 13:41:30 2007 @@ -1,4 +1,4 @@ -(* RUN: %ocamlc llvm.cma llvm_bitwriter.cma %s -o %t +(* RUN: %ocamlc -warn-error A llvm.cma llvm_bitwriter.cma %s -o %t * RUN: ./%t %t.bc * RUN: llvm-dis < %t.bc | grep caml_int_ty *) Modified: llvm/trunk/test/Bindings/Ocaml/vmcore.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bindings/Ocaml/vmcore.ml?rev=45317&r1=45316&r2=45317&view=diff ============================================================================== --- llvm/trunk/test/Bindings/Ocaml/vmcore.ml (original) +++ llvm/trunk/test/Bindings/Ocaml/vmcore.ml Sat Dec 22 13:41:30 2007 @@ -1,4 +1,4 @@ -(* RUN: %ocamlc llvm.cma llvm_analysis.cma llvm_bitwriter.cma %s -o %t +(* RUN: %ocamlc -warn-error A llvm.cma llvm_analysis.cma llvm_bitwriter.cma %s -o %t * RUN: ./%t %t.bc * RUN: llvm-dis < %t.bc > %t.ll *) From asl at math.spbu.ru Sat Dec 22 14:41:12 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Sat, 22 Dec 2007 20:41:12 -0000 Subject: [llvm-commits] [llvm] r45318 - /llvm/trunk/lib/Target/X86/X86JITInfo.cpp Message-ID: <200712222041.lBMKfCQx031400@zion.cs.uiuc.edu> Author: asl Date: Sat Dec 22 14:41:12 2007 New Revision: 45318 URL: http://llvm.org/viewvc/llvm-project?rev=45318&view=rev Log: Disable, until we'll really need it Modified: llvm/trunk/lib/Target/X86/X86JITInfo.cpp Modified: llvm/trunk/lib/Target/X86/X86JITInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86JITInfo.cpp?rev=45318&r1=45317&r2=45318&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86JITInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86JITInfo.cpp Sat Dec 22 14:41:12 2007 @@ -53,6 +53,9 @@ #if defined(__APPLE__) # define CFI(x) #else +// FIXME: Disable this until we really want to use it. Also, we will +// need to add some workarounds for compilers, which support +// only subset of these directives. # define CFI(x) x #endif From asl at math.spbu.ru Sat Dec 22 14:46:25 2007 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Sat, 22 Dec 2007 20:46:25 -0000 Subject: [llvm-commits] [llvm] r45319 - /llvm/trunk/lib/Target/X86/X86JITInfo.cpp Message-ID: <200712222046.lBMKkPXV031640@zion.cs.uiuc.edu> Author: asl Date: Sat Dec 22 14:46:24 2007 New Revision: 45319 URL: http://llvm.org/viewvc/llvm-project?rev=45319&view=rev Log: Erm, really disable :) Modified: llvm/trunk/lib/Target/X86/X86JITInfo.cpp Modified: llvm/trunk/lib/Target/X86/X86JITInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86JITInfo.cpp?rev=45319&r1=45318&r2=45319&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86JITInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86JITInfo.cpp Sat Dec 22 14:46:24 2007 @@ -56,7 +56,7 @@ // FIXME: Disable this until we really want to use it. Also, we will // need to add some workarounds for compilers, which support // only subset of these directives. -# define CFI(x) x +# define CFI(x) #endif // Provide a wrapper for X86CompilationCallback2 that saves non-traditional From sabre at nondot.org Sat Dec 22 14:47:56 2007 From: sabre at nondot.org (Chris Lattner) Date: Sat, 22 Dec 2007 20:47:56 -0000 Subject: [llvm-commits] [llvm] r45320 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGNodes.h lib/CodeGen/SelectionDAG/TargetLowering.cpp Message-ID: <200712222047.lBMKlu9r031734@zion.cs.uiuc.edu> Author: lattner Date: Sat Dec 22 14:47:56 2007 New Revision: 45320 URL: http://llvm.org/viewvc/llvm-project?rev=45320&view=rev Log: Add a new FGETSIGN operation, which defaults to expand on all targets. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=45320&r1=45319&r2=45320&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Sat Dec 22 14:47:56 2007 @@ -271,6 +271,10 @@ // FCOPYSIGN(f32, f64) is allowed. FCOPYSIGN, + // INT = FGETSIGN(FP) - Return the sign bit of the specified floating point + // value as an integer 0/1 value. + FGETSIGN, + /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector /// with the specified, possibly variable, elements. The number of elements /// is required to be a power of two. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=45320&r1=45319&r2=45320&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Sat Dec 22 14:47:56 2007 @@ -155,13 +155,17 @@ memset(&IndexedModeActions, 0, sizeof(IndexedModeActions)); memset(&ConvertActions, 0, sizeof(ConvertActions)); - // Set all indexed load / store to expand. + // Set default actions for various operations. for (unsigned VT = 0; VT != (unsigned)MVT::LAST_VALUETYPE; ++VT) { + // Default all indexed load / store to expand. for (unsigned IM = (unsigned)ISD::PRE_INC; IM != (unsigned)ISD::LAST_INDEXED_MODE; ++IM) { setIndexedLoadAction(IM, (MVT::ValueType)VT, Expand); setIndexedStoreAction(IM, (MVT::ValueType)VT, Expand); } + + // These operations default to expand. + setOperationAction(ISD::FGETSIGN, (MVT::ValueType)VT, Expand); } IsLittleEndian = TD->isLittleEndian(); From sabre at nondot.org Sat Dec 22 14:56:36 2007 From: sabre at nondot.org (Chris Lattner) Date: Sat, 22 Dec 2007 20:56:36 -0000 Subject: [llvm-commits] [llvm] r45321 - in /llvm/trunk: include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/DAGCombiner.cpp Message-ID: <200712222056.lBMKuaGv032243@zion.cs.uiuc.edu> Author: lattner Date: Sat Dec 22 14:56:36 2007 New Revision: 45321 URL: http://llvm.org/viewvc/llvm-project?rev=45321&view=rev Log: Tell TargetLoweringOpt whether it is running before or after legalize. Modified: llvm/trunk/include/llvm/Target/TargetLowering.h llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Modified: llvm/trunk/include/llvm/Target/TargetLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=45321&r1=45320&r2=45321&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) +++ llvm/trunk/include/llvm/Target/TargetLowering.h Sat Dec 22 14:56:36 2007 @@ -557,10 +557,12 @@ /// that want to combine struct TargetLoweringOpt { SelectionDAG &DAG; + bool AfterLegalize; SDOperand Old; SDOperand New; - explicit TargetLoweringOpt(SelectionDAG &InDAG) : DAG(InDAG) {} + explicit TargetLoweringOpt(SelectionDAG &InDAG, bool afterLegalize) + : DAG(InDAG), AfterLegalize(afterLegalize) {} bool CombineTo(SDOperand O, SDOperand N) { Old = O; Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=45321&r1=45320&r2=45321&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sat Dec 22 14:56:36 2007 @@ -141,7 +141,7 @@ /// it can be simplified or if things it uses can be simplified by bit /// propagation. If so, return true. bool SimplifyDemandedBits(SDOperand Op, uint64_t Demanded = ~0ULL) { - TargetLowering::TargetLoweringOpt TLO(DAG); + TargetLowering::TargetLoweringOpt TLO(DAG, AfterLegalize); uint64_t KnownZero, KnownOne; Demanded &= MVT::getIntVTBitMask(Op.getValueType()); if (!TLI.SimplifyDemandedBits(Op, Demanded, KnownZero, KnownOne, TLO)) From sabre at nondot.org Sat Dec 22 15:26:52 2007 From: sabre at nondot.org (Chris Lattner) Date: Sat, 22 Dec 2007 21:26:52 -0000 Subject: [llvm-commits] [llvm] r45322 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <200712222126.lBMLQrUC002106@zion.cs.uiuc.edu> Author: lattner Date: Sat Dec 22 15:26:52 2007 New Revision: 45322 URL: http://llvm.org/viewvc/llvm-project?rev=45322&view=rev Log: improve support for fgetsign Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=45322&r1=45321&r2=45322&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sat Dec 22 15:26:52 2007 @@ -1323,6 +1323,11 @@ KnownZero |= (~InMask) & Mask; return; } + case ISD::FGETSIGN: + // All bits are zero except the low bit. + KnownZero = MVT::getIntVTBitMask(Op.getValueType()) ^ 1; + return; + case ISD::ADD: { // If either the LHS or the RHS are Zero, the result is zero. ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); @@ -3703,6 +3708,7 @@ case ISD::FDIV: return "fdiv"; case ISD::FREM: return "frem"; case ISD::FCOPYSIGN: return "fcopysign"; + case ISD::FGETSIGN: return "fgetsign"; case ISD::SETCC: return "setcc"; case ISD::SELECT: return "select"; From sabre at nondot.org Sat Dec 22 15:35:38 2007 From: sabre at nondot.org (Chris Lattner) Date: Sat, 22 Dec 2007 21:35:38 -0000 Subject: [llvm-commits] [llvm] r45323 - /llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Message-ID: <200712222135.lBMLZcdT002524@zion.cs.uiuc.edu> Author: lattner Date: Sat Dec 22 15:35:38 2007 New Revision: 45323 URL: http://llvm.org/viewvc/llvm-project?rev=45323&view=rev Log: initial code for forming an FGETSIGN node. This is disabled until legalizer support goes in. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=45323&r1=45322&r2=45323&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Sat Dec 22 15:35:38 2007 @@ -944,6 +944,32 @@ KnownZero |= ~InMask & DemandedMask; break; } + case ISD::FGETSIGN: + // All bits are zero except the low bit. + KnownZero = MVT::getIntVTBitMask(Op.getValueType()) ^ 1; + break; + case ISD::BIT_CONVERT: +#if 0 + // If this is an FP->Int bitcast and if the sign bit is the only thing that + // is demanded, turn this into a FGETSIGN. + if (DemandedMask == MVT::getIntVTSignBit(Op.getValueType()) && + MVT::isFloatingPoint(Op.getOperand(0).getValueType()) && + !MVT::isVector(Op.getOperand(0).getValueType())) { + // Only do this xform if FGETSIGN is valid or if before legalize. + if (!TLO.AfterLegalize || + isOperationLegal(ISD::FGETSIGN, Op.getValueType())) { + // Make a FGETSIGN + SHL to move the sign bit into the appropriate + // place. We expect the SHL to be eliminated by other optimizations. + SDOperand Sign = TLO.DAG.getNode(ISD::FGETSIGN, Op.getValueType(), + Op.getOperand(0)); + unsigned ShVal = MVT::getSizeInBits(Op.getValueType())-1; + SDOperand ShAmt = TLO.DAG.getConstant(ShVal, getShiftAmountTy()); + return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, Op.getValueType(), + Sign, ShAmt)); + } + } +#endif + break; case ISD::ADD: case ISD::SUB: case ISD::INTRINSIC_WO_CHAIN: From sabre at nondot.org Sat Dec 22 16:45:38 2007 From: sabre at nondot.org (Chris Lattner) Date: Sat, 22 Dec 2007 22:45:38 -0000 Subject: [llvm-commits] [llvm] r45324 - /llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Message-ID: <200712222245.lBMMjcxM006418@zion.cs.uiuc.edu> Author: lattner Date: Sat Dec 22 16:45:38 2007 New Revision: 45324 URL: http://llvm.org/viewvc/llvm-project?rev=45324&view=rev Log: fix strict-aliasing violation Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp?rev=45324&r1=45323&r2=45324&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Sat Dec 22 16:45:38 2007 @@ -143,9 +143,7 @@ { MVT::ValueType vt = FPN->getValueType(0); if (vt == MVT::f32) { - const APFloat &apf = FPN->getValueAPF(); - float fval = apf.convertToFloat(); - int val = *((int *) &fval); + int val = FloatToBits(FPN->getValueAPF().convertToFloat()); int sval = (int) ((val << 16) >> 16); Imm = (short) val; return val == sval; From sabre at nondot.org Sat Dec 22 16:47:04 2007 From: sabre at nondot.org (Chris Lattner) Date: Sat, 22 Dec 2007 22:47:04 -0000 Subject: [llvm-commits] [llvm] r45325 - /llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Message-ID: <200712222247.lBMMl4xX006485@zion.cs.uiuc.edu> Author: lattner Date: Sat Dec 22 16:47:03 2007 New Revision: 45325 URL: http://llvm.org/viewvc/llvm-project?rev=45325&view=rev Log: fix some warnings. This code needs to be de-tabified :( Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=45325&r1=45324&r2=45325&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Sat Dec 22 16:47:03 2007 @@ -566,7 +566,8 @@ NewOpC = (OpVT == MVT::i1 ? SPUISD::EXTRACT_I1_SEXT : SPUISD::EXTRACT_I8_SEXT); - } else if (ExtType == ISD::ZEXTLOAD) { + } else { + assert(ExtType == ISD::ZEXTLOAD); NewOpC = (OpVT == MVT::i1 ? SPUISD::EXTRACT_I1_ZEXT : SPUISD::EXTRACT_I8_ZEXT); @@ -1687,7 +1688,7 @@ for (int j = 0; j < 4; ++j) { SDOperand V; bool process_upper, process_lower; - uint64_t val; + uint64_t val = 0; process_upper = (upper_special && (i & 1) == 0); process_lower = (lower_special && (i & 1) == 1); From gordonhenriksen at mac.com Sat Dec 22 17:32:33 2007 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Sat, 22 Dec 2007 23:32:33 -0000 Subject: [llvm-commits] [llvm] r45326 - /llvm/trunk/docs/GarbageCollection.html Message-ID: <200712222332.lBMNWX2V008854@zion.cs.uiuc.edu> Author: gordon Date: Sat Dec 22 17:32:32 2007 New Revision: 45326 URL: http://llvm.org/viewvc/llvm-project?rev=45326&view=rev Log: Document a more robust implementation of performCustomLowering. Modified: llvm/trunk/docs/GarbageCollection.html Modified: llvm/trunk/docs/GarbageCollection.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GarbageCollection.html?rev=45326&r1=45325&r2=45326&view=diff ============================================================================== --- llvm/trunk/docs/GarbageCollection.html (original) +++ llvm/trunk/docs/GarbageCollection.html Sat Dec 22 17:32:32 2007 @@ -1084,37 +1084,35 @@ 
      #include "llvm/Module.h"
-#include "llvm/Instructions.h"
+#include "llvm/IntrinsicInst.h"
 
 bool MyCollector::initializeCustomLowering(Module &M) {
   return false;
 }
 
 bool MyCollector::performCustomLowering(Function &F) {
-  const Module *M = F.getParent();
-  
-  Function *GCReadInt  = M->getFunction("llvm.gcread"),
-           *GCWriteInt = M->getFunction("llvm.gcwrite"),
-           *GCRootInt  = M->getFunction("llvm.gcroot");
-  
   bool MadeChange = false;
   
   for (Function::iterator BB = F.begin(), E = F.end(); BB != E; ++BB)
-    for (BasicBlock::iterator II = BB->begin(), E = BB->end(); II != E;)
-      if (CallInst *CI = dyn_cast<CallInst>(II++))
-        if (Function *F = CI->getCalledFunction())
-          if (F == GCWriteInt) {
+    for (BasicBlock::iterator II = BB->begin(), E = BB->end(); II != E; ++II)
+      if (IntrinsicInst *CI = dyn_cast<IntrinsicInst>(II))
+        if (Function *F = CI->getCalledFunction())
+          switch (F->getIntrinsicID()) {
+          case Intrinsic::gcwrite:
             // Handle llvm.gcwrite.
-            CI->eraseFromParent();
+            CI->eraseFromParent();
             MadeChange = true;
-          } else if (F == GCReadInt) {
+            break;
+          case Intrinsic::gcread:
             // Handle llvm.gcread.
-            CI->eraseFromParent();
+            CI->eraseFromParent();
             MadeChange = true;
-          } else if (F == GCRootInt) {
+            break;
+          case Intrinsic::gcroot:
             // Handle llvm.gcroot.
-            CI->eraseFromParent();
+            CI->eraseFromParent();
             MadeChange = true;
+            break;
           }
   
   return MadeChange;




From gordonhenriksen at mac.com  Sat Dec 22 17:34:26 2007
From: gordonhenriksen at mac.com (Gordon Henriksen)
Date: Sat, 22 Dec 2007 23:34:26 -0000
Subject: [llvm-commits] [llvm] r45327 -
	/llvm/trunk/docs/GarbageCollection.html
Message-ID: <200712222334.lBMNYQf7008975@zion.cs.uiuc.edu>

Author: gordon
Date: Sat Dec 22 17:34:26 2007
New Revision: 45327

URL: http://llvm.org/viewvc/llvm-project?rev=45327&view=rev
Log:
Undo a wrong bit in that last patch.

Modified:
    llvm/trunk/docs/GarbageCollection.html

Modified: llvm/trunk/docs/GarbageCollection.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GarbageCollection.html?rev=45327&r1=45326&r2=45327&view=diff

==============================================================================
--- llvm/trunk/docs/GarbageCollection.html (original)
+++ llvm/trunk/docs/GarbageCollection.html Sat Dec 22 17:34:26 2007
@@ -1094,8 +1094,8 @@
   bool MadeChange = false;
   
   for (Function::iterator BB = F.begin(), E = F.end(); BB != E; ++BB)
-    for (BasicBlock::iterator II = BB->begin(), E = BB->end(); II != E; ++II)
-      if (IntrinsicInst *CI = dyn_cast<IntrinsicInst>(II))
+    for (BasicBlock::iterator II = BB->begin(), E = BB->end(); II != E; )
+      if (IntrinsicInst *CI = dyn_cast<IntrinsicInst>(II++))
         if (Function *F = CI->getCalledFunction())
           switch (F->getIntrinsicID()) {
           case Intrinsic::gcwrite:




From clattner at apple.com  Sat Dec 22 19:48:08 2007
From: clattner at apple.com (Chris Lattner)
Date: Sat, 22 Dec 2007 17:48:08 -0800
Subject: [llvm-commits] [llvm] r45256 - in /llvm/trunk:
	lib/Transforms/Scalar/InstructionCombining.cpp
	test/Transforms/InstCombine/2007-12-19-IcmpSub.ll
In-Reply-To: <200712200721.lBK7LCpM031740@zion.cs.uiuc.edu>
References: <200712200721.lBK7LCpM031740@zion.cs.uiuc.edu>
Message-ID: <3454A140-584F-4AF8-9685-66229778EE90@apple.com>


On Dec 19, 2007, at 11:21 PM, Christopher Lamb wrote:

> Author: clamb
> Date: Thu Dec 20 01:21:11 2007
> New Revision: 45256
>
> URL: http://llvm.org/viewvc/llvm-project?rev=45256&view=rev
> Log:
> Implement review feedback, including additional transforms
>
> (icmp slt (sub A B) 1) -> (icmp sle A B)
> icmp sgt (sub A B) -1) -> (icmp sge A B)
>
> and add testcase.

Very nice, thanks Christopher,

-Chris


From dalej at apple.com  Sat Dec 22 21:21:24 2007
From: dalej at apple.com (Dale Johannesen)
Date: Sun, 23 Dec 2007 03:21:24 -0000
Subject: [llvm-commits] [llvm-gcc-4.0] r45331 -
	/llvm-gcc-4.0/trunk/gcc/config/rs6000/llvm-rs6000.cpp
Message-ID: <200712230321.lBN3LOHk019345@zion.cs.uiuc.edu>

Author: johannes
Date: Sat Dec 22 21:21:24 2007
New Revision: 45331

URL: http://llvm.org/viewvc/llvm-project?rev=45331&view=rev
Log:
Add VPERM and VSEL builtins.


Modified:
    llvm-gcc-4.0/trunk/gcc/config/rs6000/llvm-rs6000.cpp

Modified: llvm-gcc-4.0/trunk/gcc/config/rs6000/llvm-rs6000.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/config/rs6000/llvm-rs6000.cpp?rev=45331&r1=45330&r2=45331&view=diff

==============================================================================
--- llvm-gcc-4.0/trunk/gcc/config/rs6000/llvm-rs6000.cpp (original)
+++ llvm-gcc-4.0/trunk/gcc/config/rs6000/llvm-rs6000.cpp Sat Dec 22 21:21:24 2007
@@ -329,6 +329,37 @@
     Result = Builder.CreateCall(smax, ActualOps, ActualOps+2, "tmp");
     return true;
   }
+  case ALTIVEC_BUILTIN_VPERM_4SI:
+  case ALTIVEC_BUILTIN_VPERM_4SF:
+  case ALTIVEC_BUILTIN_VPERM_8HI:
+  case ALTIVEC_BUILTIN_VPERM_16QI: {
+    // Operation is identical on all types; we have a single intrinsic.
+    const Type *VecTy = VectorType::get(Type::Int32Ty, 4);
+    Value *Op0 = CastToType(Instruction::BitCast, Ops[0], VecTy);
+    Value *Op1 = CastToType(Instruction::BitCast, Ops[1], VecTy);
+    Value *ActualOps[] = { Op0, Op1, Ops[2]};
+    Result = Builder.CreateCall(Intrinsic::getDeclaration(TheModule, 
+                                          Intrinsic::ppc_altivec_vperm), 
+                                ActualOps, ActualOps+3, "tmp");
+    Result = CastToType(Instruction::BitCast, Result, Ops[0]->getType());
+    return true;
+  }
+  case ALTIVEC_BUILTIN_VSEL_4SI:
+  case ALTIVEC_BUILTIN_VSEL_4SF:
+  case ALTIVEC_BUILTIN_VSEL_8HI:
+  case ALTIVEC_BUILTIN_VSEL_16QI: {
+    // Operation is identical on all types; we have a single intrinsic.
+    const Type *VecTy = VectorType::get(Type::Int32Ty, 4);
+    Value *Op0 = CastToType(Instruction::BitCast, Ops[0], VecTy);
+    Value *Op1 = CastToType(Instruction::BitCast, Ops[1], VecTy);
+    Value *Op2 = CastToType(Instruction::BitCast, Ops[2], VecTy);
+    Value *ActualOps[] = { Op0, Op1, Op2 };
+    Result = Builder.CreateCall(Intrinsic::getDeclaration(TheModule, 
+                                          Intrinsic::ppc_altivec_vsel), 
+                                ActualOps, ActualOps+3, "tmp");
+    Result = CastToType(Instruction::BitCast, Result, Ops[0]->getType());
+    return true;
+  }
   }
 
   return false;




From dalej at apple.com  Sun Dec 23 01:05:38 2007
From: dalej at apple.com (Dale Johannesen)
Date: Sun, 23 Dec 2007 07:05:38 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r45332 -
	/llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp
Message-ID: <200712230705.lBN75cU8028910@zion.cs.uiuc.edu>

Author: johannes
Date: Sun Dec 23 01:05:37 2007
New Revision: 45332

URL: http://llvm.org/viewvc/llvm-project?rev=45332&view=rev
Log:
Add VSEL and VPERM builtins.


Modified:
    llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp

Modified: llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp?rev=45332&r1=45331&r2=45332&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp Sun Dec 23 01:05:37 2007
@@ -329,6 +329,37 @@
     Result = Builder.CreateCall(smax, ActualOps, ActualOps+2, "tmp");
     return true;
   }
+  case ALTIVEC_BUILTIN_VPERM_4SI:
+  case ALTIVEC_BUILTIN_VPERM_4SF:
+  case ALTIVEC_BUILTIN_VPERM_8HI:
+  case ALTIVEC_BUILTIN_VPERM_16QI: {
+    // Operation is identical on all types; we have a single intrinsic.
+    const Type *VecTy = VectorType::get(Type::Int32Ty, 4);
+    Value *Op0 = CastToType(Instruction::BitCast, Ops[0], VecTy);
+    Value *Op1 = CastToType(Instruction::BitCast, Ops[1], VecTy);
+    Value *ActualOps[] = { Op0, Op1, Ops[2]};
+    Result = Builder.CreateCall(Intrinsic::getDeclaration(TheModule, 
+                                          Intrinsic::ppc_altivec_vperm), 
+                                ActualOps, ActualOps+3, "tmp");
+    Result = CastToType(Instruction::BitCast, Result, Ops[0]->getType());
+    return true;
+  }
+  case ALTIVEC_BUILTIN_VSEL_4SI:
+  case ALTIVEC_BUILTIN_VSEL_4SF:
+  case ALTIVEC_BUILTIN_VSEL_8HI:
+  case ALTIVEC_BUILTIN_VSEL_16QI: {
+    // Operation is identical on all types; we have a single intrinsic.
+    const Type *VecTy = VectorType::get(Type::Int32Ty, 4);
+    Value *Op0 = CastToType(Instruction::BitCast, Ops[0], VecTy);
+    Value *Op1 = CastToType(Instruction::BitCast, Ops[1], VecTy);
+    Value *Op2 = CastToType(Instruction::BitCast, Ops[2], VecTy);
+    Value *ActualOps[] = { Op0, Op1, Op2 };
+    Result = Builder.CreateCall(Intrinsic::getDeclaration(TheModule, 
+                                          Intrinsic::ppc_altivec_vsel), 
+                                ActualOps, ActualOps+3, "tmp");
+    Result = CastToType(Instruction::BitCast, Result, Ops[0]->getType());
+    return true;
+  }
   }
 
   return false;




From resistor at mac.com  Sun Dec 23 09:16:50 2007
From: resistor at mac.com (Owen Anderson)
Date: Sun, 23 Dec 2007 15:16:50 -0000
Subject: [llvm-commits] [llvm] r45333 -
	/llvm/trunk/include/llvm/CodeGen/MachineDominators.h
Message-ID: <200712231516.lBNFGr3n026394@zion.cs.uiuc.edu>

Author: resistor
Date: Sun Dec 23 09:16:46 2007
New Revision: 45333

URL: http://llvm.org/viewvc/llvm-project?rev=45333&view=rev
Log:
Add GraphTraits specializations for machine dominators.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineDominators.h

Modified: llvm/trunk/include/llvm/CodeGen/MachineDominators.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineDominators.h?rev=45333&r1=45332&r2=45333&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineDominators.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineDominators.h Sun Dec 23 09:16:46 2007
@@ -21,6 +21,7 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/Analysis/Dominators.h"
 #include "llvm/Analysis/DominatorInternals.h"
+#include "llvm/ADT/GraphTraits.h"
 
 namespace llvm {
 
@@ -182,6 +183,32 @@
   }
 };
 
+//===-------------------------------------
+/// DominatorTree GraphTraits specialization so the DominatorTree can be
+/// iterable by generic graph iterators.
+///
+template <> struct GraphTraits {
+  typedef MachineDomTreeNode NodeType;
+  typedef NodeType::iterator  ChildIteratorType;
+  
+  static NodeType *getEntryNode(NodeType *N) {
+    return N;
+  }
+  static inline ChildIteratorType child_begin(NodeType* N) {
+    return N->begin();
+  }
+  static inline ChildIteratorType child_end(NodeType* N) {
+    return N->end();
+  }
+};
+
+template <> struct GraphTraits
+  : public GraphTraits {
+  static NodeType *getEntryNode(MachineDominatorTree *DT) {
+    return DT->getRootNode();
+  }
+};
+
 }
 
 #endif




From resistor at mac.com  Sun Dec 23 09:37:30 2007
From: resistor at mac.com (Owen Anderson)
Date: Sun, 23 Dec 2007 15:37:30 -0000
Subject: [llvm-commits] [llvm] r45334 -
	/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
Message-ID: <200712231537.lBNFbWib027356@zion.cs.uiuc.edu>

Author: resistor
Date: Sun Dec 23 09:37:26 2007
New Revision: 45334

URL: http://llvm.org/viewvc/llvm-project?rev=45334&view=rev
Log:
Sketch out an implementation of Briggs' copy placement algorithm.

Modified:
    llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp

Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=45334&r1=45333&r2=45334&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original)
+++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Sun Dec 23 09:37:26 2007
@@ -28,6 +28,7 @@
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
+#include "llvm/ADT/DepthFirstIterator.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/Support/Compiler.h"
 using namespace llvm;
@@ -39,7 +40,10 @@
     StrongPHIElimination() : MachineFunctionPass((intptr_t)&ID) {}
 
     DenseMap, 2> > Waiting;
+             std::map > Waiting;
+    
+    std::map > Stacks;
+    std::set UsedByAnother;
 
     bool runOnMachineFunction(MachineFunction &Fn);
     
@@ -56,7 +60,7 @@
       preorder.clear();
       maxpreorder.clear();
       
-      waiting.clear();
+      Waiting.clear();
     }
 
   private:
@@ -89,8 +93,6 @@
     DenseMap preorder;
     DenseMap maxpreorder;
     
-    DenseMap > waiting;
-    
     
     void computeDFS(MachineFunction& MF);
     void processBlock(MachineBasicBlock* MBB);
@@ -100,7 +102,7 @@
                          std::set& PHIUnion,
                          std::vector& DF,
                          std::vector >& locals);
-    
+    void ScheduleCopies(MachineBasicBlock* MBB);
   };
 
   char StrongPHIElimination::ID = 0;
@@ -383,7 +385,8 @@
         
         // add a copy from a_i to p in Waiting[From[a_i]]
         MachineBasicBlock* From = P->getOperand(i).getMachineBasicBlock();
-        Waiting[From].push_back(std::make_pair(SrcReg, DestReg));
+        Waiting[From].insert(std::make_pair(SrcReg, DestReg));
+        UsedByAnother.insert(SrcReg);
       } else {
         PHIUnion.insert(SrcReg);
         UnionedBlocks.insert(SrcInfo.DefInst->getParent());
@@ -431,8 +434,10 @@
             unsigned SrcReg = p.first;
             MachineBasicBlock* From = P->getOperand(i).getMBB();
             
-            Waiting[From].push_back(std::make_pair(SrcReg,
-                                                   P->getOperand(0).getReg()));
+            Waiting[From].insert(std::make_pair(SrcReg,
+                                                P->getOperand(0).getReg()));
+            UsedByAnother.insert(SrcReg);
+            
             PHIUnion.erase(SrcReg);
           }
         }
@@ -481,7 +486,9 @@
             unsigned SrcReg = DFNode->getReg();
             MachineBasicBlock* From = Inst->getOperand(i).getMBB();
             
-            Waiting[From].push_back(std::make_pair(SrcReg, DestReg));
+            Waiting[From].insert(std::make_pair(SrcReg, DestReg));
+            UsedByAnother.insert(SrcReg);
+            
             PHIUnion.erase(SrcReg);
           }
         }
@@ -501,15 +508,102 @@
   }
 }
 
+/// ScheduleCopies - Insert copies into predecessor blocks, scheduling
+/// them properly so as to avoid the 'lost copy' and the 'virtual swap'
+/// problems.
+///
+/// Based on "Practical Improvements to the Construction and Destruction
+/// of Static Single Assignment Form" by Briggs, et al.
+void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB) {
+  std::map& copy_set= Waiting[MBB];
+  
+  std::map worklist;
+  std::map map;
+  
+  // Setup worklist of initial copies
+  for (std::map::iterator I = copy_set.begin(),
+       E = copy_set.end(); I != E; ) {
+    map.insert(std::make_pair(I->first, I->first));
+    map.insert(std::make_pair(I->second, I->second));
+         
+    if (!UsedByAnother.count(I->first)) {
+      worklist.insert(*I);
+      
+      // Avoid iterator invalidation
+      unsigned first = I->first;
+      ++I;
+      copy_set.erase(first);
+    } else {
+      ++I;
+    }
+  }
+  
+  LiveVariables& LV = getAnalysis();
+  
+  // Iterate over the worklist, inserting copies
+  while (!worklist.empty() || !copy_set.empty()) {
+    while (!worklist.empty()) {
+      std::pair curr = *worklist.begin();
+      worklist.erase(curr.first);
+      
+      if (isLiveOut(LV.getVarInfo(curr.second), MBB)) {
+        // Insert copy from curr.second to a temporary
+        // Push temporary on Stacks
+      }
+      
+      // Insert copy from map[curr.first] to curr.second
+      map[curr.first] = curr.second;
+      
+      // If curr.first is a destination in copy_set...
+      for (std::map::iterator I = copy_set.begin(),
+           E = copy_set.end(); I != E; )
+        if (curr.first == I->second) {
+          std::pair temp = *I;
+          
+          // Avoid iterator invalidation
+          ++I;
+          copy_set.erase(temp.first);
+          worklist.insert(temp);
+          
+          break;
+        } else {
+          ++I;
+        }
+    }
+    
+    if (!copy_set.empty()) {
+      std::pair curr = *copy_set.begin();
+      copy_set.erase(curr.first);
+      
+      // Insert a copy from dest to a new temporary t at the end of b
+      // map[curr.second] = t;
+      
+      worklist.insert(curr);
+    }
+  }
+}
+
 bool StrongPHIElimination::runOnMachineFunction(MachineFunction &Fn) {
+  // Compute DFS numbers of each block
   computeDFS(Fn);
   
+  // Determine which phi node operands need copies
   for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
     if (!I->empty() &&
         I->begin()->getOpcode() == TargetInstrInfo::PHI)
       processBlock(I);
   
-  // FIXME: Insert copies
+  // Insert copies
+  MachineDominatorTree& MDT = getAnalysis();
+  for (df_iterator DI = df_begin(MDT.getRootNode()), 
+       DE = df_end(MDT.getRootNode()); DI != DE; ++DI) {
+    MachineBasicBlock* block = DI->getBlock();
+    
+    // FIXME: Do rewriting with Stacks
+    
+    ScheduleCopies(block);
+  }
+  
   // FIXME: Perform renaming
   
   return false;




From gordonhenriksen at mac.com  Sun Dec 23 10:59:28 2007
From: gordonhenriksen at mac.com (Gordon Henriksen)
Date: Sun, 23 Dec 2007 16:59:28 -0000
Subject: [llvm-commits] [llvm] r45335 - in /llvm/trunk:
 Xcode/LLVM.xcodeproj/ bindings/ocaml/ bindings/ocaml/bitreader/
 bindings/ocaml/executionengine/ bindings/ocaml/llvm/ include/llvm-c/
 lib/ExecutionEngine/ test/Bindings/Ocaml/
Message-ID: <200712231659.lBNGxTBV030741@zion.cs.uiuc.edu>

Author: gordon
Date: Sun Dec 23 10:59:28 2007
New Revision: 45335

URL: http://llvm.org/viewvc/llvm-project?rev=45335&view=rev
Log:
C and Ocaml bindings for ExecutionEngine (i.e., the JIT compiler).

Added:
    llvm/trunk/bindings/ocaml/executionengine/   (with props)
    llvm/trunk/bindings/ocaml/executionengine/Makefile
    llvm/trunk/bindings/ocaml/executionengine/executionengine_ocaml.c
    llvm/trunk/bindings/ocaml/executionengine/llvm_executionengine.ml
    llvm/trunk/bindings/ocaml/executionengine/llvm_executionengine.mli
    llvm/trunk/include/llvm-c/ExecutionEngine.h
    llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp
    llvm/trunk/test/Bindings/Ocaml/executionengine.ml
Modified:
    llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj
    llvm/trunk/bindings/ocaml/Makefile
    llvm/trunk/bindings/ocaml/Makefile.ocaml
    llvm/trunk/bindings/ocaml/bitreader/bitreader_ocaml.c
    llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c

Modified: llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj?rev=45335&r1=45334&r2=45335&view=diff

==============================================================================
--- llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj (original)
+++ llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj Sun Dec 23 10:59:28 2007
@@ -85,6 +85,11 @@
 		9F4B0E600D0E02580061F270 /* llvm_bitreader.mli */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = llvm_bitreader.mli; sourceTree = ""; };
 		9F4B0E8C0D0E05ED0061F270 /* BitReader.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = BitReader.cpp; sourceTree = ""; };
 		9F4B0E8D0D0E05ED0061F270 /* DeserializeAPFloat.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = DeserializeAPFloat.cpp; sourceTree = ""; };
+		9F502ADB0D1D8CA3007939DF /* executionengine_ocaml.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = executionengine_ocaml.c; sourceTree = ""; };
+		9F502ADC0D1D8CA3007939DF /* llvm_executionengine.ml */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = llvm_executionengine.ml; sourceTree = ""; };
+		9F502ADD0D1D8CA3007939DF /* llvm_executionengine.mli */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = llvm_executionengine.mli; sourceTree = ""; };
+		9F502AEC0D1D8CF8007939DF /* executionengine.ml */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = executionengine.ml; sourceTree = ""; };
+		9F502B090D1D8D8D007939DF /* ExecutionEngineBindings.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = ExecutionEngineBindings.cpp; sourceTree = ""; };
 		9F5B90CB0D0CE87100CDFDEA /* StringPool.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = StringPool.cpp; sourceTree = ""; };
 		9F5B90CE0D0CE89300CDFDEA /* AlignOf.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = AlignOf.h; sourceTree = ""; };
 		9F5B90CF0D0CE89300CDFDEA /* Registry.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = Registry.h; sourceTree = ""; };
@@ -233,6 +238,7 @@
 		9FE450E00C77ABE400C4FEA4 /* ArchiveInternals.h */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.c.h; path = ArchiveInternals.h; sourceTree = ""; };
 		9FE450E10C77ABE400C4FEA4 /* ArchiveReader.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ArchiveReader.cpp; sourceTree = ""; };
 		9FE450E20C77ABE400C4FEA4 /* ArchiveWriter.cpp */ = {isa = PBXFileReference; fileEncoding = 30; lastKnownFileType = sourcecode.cpp.cpp; path = ArchiveWriter.cpp; sourceTree = ""; };
+		9FEB8C550D1CD1E200EE46BC /* ExecutionEngine.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = ExecutionEngine.h; sourceTree = ""; };
 		CF1ACC9709C9DE4400D3C5EB /* IntrinsicInst.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = IntrinsicInst.cpp; path = ../lib/VMCore/IntrinsicInst.cpp; sourceTree = ""; };
 		CF26835B09178F5500C5F253 /* TargetInstrItineraries.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = TargetInstrItineraries.h; sourceTree = ""; };
 		CF32AF5C0AEE6A4E00D24CD4 /* LLVMTargetMachine.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = LLVMTargetMachine.cpp; sourceTree = ""; };
@@ -1121,6 +1127,16 @@
 			path = bitreader;
 			sourceTree = "";
 		};
+		9F502ACD0D1D8CA3007939DF /* executionengine */ = {
+			isa = PBXGroup;
+			children = (
+				9F502ADB0D1D8CA3007939DF /* executionengine_ocaml.c */,
+				9F502ADC0D1D8CA3007939DF /* llvm_executionengine.ml */,
+				9F502ADD0D1D8CA3007939DF /* llvm_executionengine.mli */,
+			);
+			path = executionengine;
+			sourceTree = "";
+		};
 		9F68EB030C77AD2C004AA152 /* lib/Bitcode */ = {
 			isa = PBXGroup;
 			children = (
@@ -1244,6 +1260,7 @@
 				9F7C2C4F0CB9496C00498408 /* analysis.ml */,
 				9F6B2CC00D0F6E56000F00FD /* bitreader.ml */,
 				9F7C2C520CB9496C00498408 /* bitwriter.ml */,
+				9F502AEC0D1D8CF8007939DF /* executionengine.ml */,
 				9F7C2C5D0CB9496C00498408 /* vmcore.ml */,
 			);
 			path = Ocaml;
@@ -1269,6 +1286,7 @@
 		9FD3E56F0CA0116100E54D15 /* ocaml */ = {
 			isa = PBXGroup;
 			children = (
+				9F502ACD0D1D8CA3007939DF /* executionengine */,
 				9F7C240B0CB81ECD00498408 /* analysis */,
 				9F4B0E5D0D0E02580061F270 /* bitreader */,
 				9FD3E5700CA0116100E54D15 /* bitwriter */,
@@ -1316,6 +1334,7 @@
 				9F5B90E70D0DF19100CDFDEA /* BitReader.h */,
 				9FD3E58D0CA0125F00E54D15 /* BitWriter.h */,
 				9FD3E58E0CA0125F00E54D15 /* Core.h */,
+				9FEB8C550D1CD1E200EE46BC /* ExecutionEngine.h */,
 				CF8F1B490B64F7AB00BB4199 /* LinkTimeOptimizer.h */,
 			);
 			name = "include/llvm-c";
@@ -1607,6 +1626,7 @@
 				DE66EDC508ABEC9000323D32 /* Interpreter */,
 				DE66EDD308ABEC9000323D32 /* JIT */,
 				DE66EDC408ABEC9000323D32 /* ExecutionEngine.cpp */,
+				9F502B090D1D8D8D007939DF /* ExecutionEngineBindings.cpp */,
 			);
 			name = lib/ExecutionEngine;
 			path = ../lib/ExecutionEngine;

Modified: llvm/trunk/bindings/ocaml/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/Makefile?rev=45335&r1=45334&r2=45335&view=diff

==============================================================================
--- llvm/trunk/bindings/ocaml/Makefile (original)
+++ llvm/trunk/bindings/ocaml/Makefile Sun Dec 23 10:59:28 2007
@@ -8,6 +8,6 @@
 ##===----------------------------------------------------------------------===##
 
 LEVEL := ../..
-DIRS = llvm bitreader bitwriter analysis
+DIRS = llvm bitreader bitwriter analysis executionengine
 
 include $(LEVEL)/Makefile.common

Modified: llvm/trunk/bindings/ocaml/Makefile.ocaml
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/Makefile.ocaml?rev=45335&r1=45334&r2=45335&view=diff

==============================================================================
--- llvm/trunk/bindings/ocaml/Makefile.ocaml (original)
+++ llvm/trunk/bindings/ocaml/Makefile.ocaml Sun Dec 23 10:59:28 2007
@@ -41,13 +41,18 @@
                  $(filter-out -L$(LibDir),-l$(LIBRARYNAME) \
                                           $(shell $(LLVM_CONFIG) --ldflags)) \
                                           $(UsedLibs))
+ 
+ifneq ($(ENABLE_OPTIMIZED),1)
+  OCAMLDEBUGFLAG := -g
+endif
 
-Compile.CMI  := $(strip $(OCAMLC) -c $(OCAMLCFLAGS) -o)
-Compile.CMO  := $(strip $(OCAMLC) -c $(OCAMLCFLAGS) -o)
-Archive.CMA  := $(strip $(OCAMLC) -a -custom $(OCAMLAFLAGS) -o)
+Compile.CMI  := $(strip $(OCAMLC) -c $(OCAMLCFLAGS) $(OCAMLDEBUGFLAG) -o)
+Compile.CMO  := $(strip $(OCAMLC) -c $(OCAMLCFLAGS) $(OCAMLDEBUGFLAG) -o)
+Archive.CMA  := $(strip $(OCAMLC) -a -custom $(OCAMLAFLAGS) $(OCAMLDEBUGFLAG) \
+                                  -o)
 
-Compile.CMX  := $(strip $(OCAMLOPT) -c $(OCAMLCFLAGS) -o)
-Archive.CMXA := $(strip $(OCAMLOPT) -a $(OCAMLAFLAGS) -o)
+Compile.CMX  := $(strip $(OCAMLOPT) -c $(OCAMLCFLAGS) $(OCAMLDEBUGFLAG) -o)
+Archive.CMXA := $(strip $(OCAMLOPT) -a $(OCAMLAFLAGS) $(OCAMLDEBUGFLAG) -o)
 
 # Source files
 OcamlSources1 := $(sort $(wildcard $(PROJ_SRC_DIR)/*.ml))
@@ -137,6 +142,9 @@
 $(OcamlDir)/%.a: $(LibDir)/%.a
 	$(Verb) ln -sf $< $@
 
+$(OcamlDir)/%.o: $(LibDir)/%.o
+	$(Verb) ln -sf $< $@
+
 clean-deplibs:
 	$(Verb) rm -f $(OutputLibs)
 

Modified: llvm/trunk/bindings/ocaml/bitreader/bitreader_ocaml.c
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/bitreader/bitreader_ocaml.c?rev=45335&r1=45334&r2=45335&view=diff

==============================================================================
--- llvm/trunk/bindings/ocaml/bitreader/bitreader_ocaml.c (original)
+++ llvm/trunk/bindings/ocaml/bitreader/bitreader_ocaml.c Sun Dec 23 10:59:28 2007
@@ -14,9 +14,8 @@
 
 #include "llvm-c/BitReader.h"
 #include "caml/alloc.h"
-#include "caml/mlvalues.h"
+#include "caml/fail.h"
 #include "caml/memory.h"
-#include 
 
 
 /* Can't use the recommended caml_named_value mechanism for backwards
@@ -29,7 +28,17 @@
   return Val_unit;
 }
 
-void llvm_raise(value Prototype, char *Message);
+static void llvm_raise(value Prototype, char *Message) {
+  CAMLparam1(Prototype);
+  CAMLlocal1(CamlMessage);
+  
+  CamlMessage = copy_string(Message);
+  LLVMDisposeMessage(Message);
+  
+  raise_with_arg(Prototype, CamlMessage);
+  abort(); /* NOTREACHED */
+  CAMLnoreturn;
+}
 
 
 /*===-- Modules -----------------------------------------------------------===*/

Propchange: llvm/trunk/bindings/ocaml/executionengine/

------------------------------------------------------------------------------
--- svn:ignore (added)
+++ svn:ignore Sun Dec 23 10:59:28 2007
@@ -0,0 +1,2 @@
+Debug
+Release

Added: llvm/trunk/bindings/ocaml/executionengine/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/executionengine/Makefile?rev=45335&view=auto

==============================================================================
--- llvm/trunk/bindings/ocaml/executionengine/Makefile (added)
+++ llvm/trunk/bindings/ocaml/executionengine/Makefile Sun Dec 23 10:59:28 2007
@@ -0,0 +1,20 @@
+##===- bindings/ocaml/executionengine/Makefile --------------*- Makefile -*-===##
+# 
+#                     The LLVM Compiler Infrastructure
+#
+# This file was developed by Gordon Henriksen and is distributed under the
+# University of Illinois Open Source License. See LICENSE.TXT for details.
+# 
+##===----------------------------------------------------------------------===##
+# 
+# This is the makefile for the Objective Caml Llvm_executionengine interface.
+# 
+##===----------------------------------------------------------------------===##
+
+LEVEL := ../../..
+LIBRARYNAME := llvm_executionengine
+DONT_BUILD_RELINKED := 1
+UsedComponents := executionengine jit interpreter native
+UsedOcamlInterfaces := llvm
+
+include ../Makefile.ocaml

Added: llvm/trunk/bindings/ocaml/executionengine/executionengine_ocaml.c
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/executionengine/executionengine_ocaml.c?rev=45335&view=auto

==============================================================================
--- llvm/trunk/bindings/ocaml/executionengine/executionengine_ocaml.c (added)
+++ llvm/trunk/bindings/ocaml/executionengine/executionengine_ocaml.c Sun Dec 23 10:59:28 2007
@@ -0,0 +1,301 @@
+/*===-- analysis_ocaml.c - LLVM Ocaml Glue ----------------------*- C++ -*-===*\
+|*                                                                            *|
+|*                     The LLVM Compiler Infrastructure                       *|
+|*                                                                            *|
+|* This file was developed by Gordon Henriksen and is distributed under the   *|
+|* University of Illinois Open Source License. See LICENSE.TXT for details.   *|
+|*                                                                            *|
+|*===----------------------------------------------------------------------===*|
+|*                                                                            *|
+|* This file glues LLVM's ocaml interface to its C interface. These functions *|
+|* are by and large transparent wrappers to the corresponding C functions.    *|
+|*                                                                            *|
+|* Note that these functions intentionally take liberties with the CAMLparamX *|
+|* macros, since most of the parameters are not GC heap objects.              *|
+|*                                                                            *|
+\*===----------------------------------------------------------------------===*/
+
+#include "llvm-c/ExecutionEngine.h"
+#include "caml/alloc.h"
+#include "caml/custom.h"
+#include "caml/fail.h"
+#include "caml/memory.h"
+#include 
+#include 
+
+
+/* Can't use the recommended caml_named_value mechanism for backwards
+   compatibility reasons. This is largely equivalent. */
+static value llvm_ee_error_exn;
+
+CAMLprim value llvm_register_ee_exns(value Error) {
+  llvm_ee_error_exn = Field(Error, 0);
+  register_global_root(&llvm_ee_error_exn);
+  return Val_unit;
+}
+
+static void llvm_raise(value Prototype, char *Message) {
+  CAMLparam1(Prototype);
+  CAMLlocal1(CamlMessage);
+  
+  CamlMessage = copy_string(Message);
+  LLVMDisposeMessage(Message);
+  
+  raise_with_arg(Prototype, CamlMessage);
+  abort(); /* NOTREACHED */
+  CAMLnoreturn;
+}
+
+
+/*--... Operations on generic values .......................................--*/
+
+#define Genericvalue_val(v)  (*(LLVMGenericValueRef *)(Data_custom_val(v)))
+
+static void llvm_finalize_generic_value(value GenVal) {
+  LLVMDisposeGenericValue(Genericvalue_val(GenVal));
+}
+
+static struct custom_operations generic_value_ops = {
+  (char *) "LLVMGenericValue",
+  llvm_finalize_generic_value,
+  custom_compare_default,
+  custom_hash_default,
+  custom_serialize_default,
+  custom_deserialize_default
+};
+
+static value alloc_generic_value(LLVMGenericValueRef Ref) {
+  value Val = alloc_custom(&generic_value_ops, sizeof(LLVMGenericValueRef), 0, 1);
+  Genericvalue_val(Val) = Ref;
+  return Val;
+}
+
+/* Llvm.lltype -> float -> t */
+CAMLprim value llvm_genericvalue_of_float(LLVMTypeRef Ty, value N) {
+  return alloc_generic_value(LLVMCreateGenericValueOfFloat(Ty, Double_val(N)));
+}
+
+/* 'a -> t */
+CAMLprim value llvm_genericvalue_of_value(value V) {
+  return alloc_generic_value(LLVMCreateGenericValueOfPointer(Op_val(V)));
+}
+
+/* Llvm.lltype -> int -> t */
+CAMLprim value llvm_genericvalue_of_int(LLVMTypeRef Ty, value Int) {
+  return alloc_generic_value(LLVMCreateGenericValueOfInt(Ty, Int_val(Int), 1));
+}
+
+/* Llvm.lltype -> int32 -> t */
+CAMLprim value llvm_genericvalue_of_int32(LLVMTypeRef Ty, value Int32) {
+  return alloc_generic_value(LLVMCreateGenericValueOfInt(Ty, Int32_val(Int32),
+                                                         1));
+}
+
+/* Llvm.lltype -> nativeint -> t */
+CAMLprim value llvm_genericvalue_of_nativeint(LLVMTypeRef Ty, value NatInt) {
+  return alloc_generic_value(LLVMCreateGenericValueOfInt(Ty,
+                                                         Nativeint_val(NatInt),
+                                                         1));
+}
+
+/* Llvm.lltype -> int64 -> t */
+CAMLprim value llvm_genericvalue_of_int64(LLVMTypeRef Ty, value Int64) {
+  return alloc_generic_value(LLVMCreateGenericValueOfInt(Ty, Int64_val(Int64),
+                                                         1));
+}
+
+/* Llvm.lltype -> t -> float */
+CAMLprim value llvm_genericvalue_as_float(LLVMTypeRef Ty, value GenVal) {
+  return copy_double(LLVMGenericValueToFloat(Ty, Genericvalue_val(GenVal)));
+}
+
+/* t -> 'a */
+CAMLprim value llvm_genericvalue_as_value(value GenVal) {
+  return Val_op(LLVMGenericValueToPointer(Genericvalue_val(GenVal)));
+}
+
+/* t -> int */
+CAMLprim value llvm_genericvalue_as_int(value GenVal) {
+  assert(LLVMGenericValueIntWidth(Genericvalue_val(GenVal)) <= 8 * sizeof(value)
+         && "Generic value too wide to treat as an int!");
+  return Val_int(LLVMGenericValueToInt(Genericvalue_val(GenVal), 1));
+}
+
+/* t -> int32 */
+CAMLprim value llvm_genericvalue_as_int32(value GenVal) {
+  assert(LLVMGenericValueIntWidth(Genericvalue_val(GenVal)) <= 32
+         && "Generic value too wide to treat as an int32!");
+  return copy_int32(LLVMGenericValueToInt(Genericvalue_val(GenVal), 1));
+}
+
+/* t -> int64 */
+CAMLprim value llvm_genericvalue_as_int64(value GenVal) {
+  assert(LLVMGenericValueIntWidth(Genericvalue_val(GenVal)) <= 64
+         && "Generic value too wide to treat as an int64!");
+  return copy_int64(LLVMGenericValueToInt(Genericvalue_val(GenVal), 1));
+}
+
+/* t -> nativeint */
+CAMLprim value llvm_genericvalue_as_nativeint(value GenVal) {
+  assert(LLVMGenericValueIntWidth(Genericvalue_val(GenVal)) <= 8 * sizeof(value)
+         && "Generic value too wide to treat as a nativeint!");
+  return copy_nativeint(LLVMGenericValueToInt(Genericvalue_val(GenVal),1));
+}
+
+
+/*--... Operations on execution engines ....................................--*/
+
+/* llmoduleprovider -> ExecutionEngine.t */
+CAMLprim LLVMExecutionEngineRef llvm_ee_create(LLVMModuleProviderRef MP) {
+  LLVMExecutionEngineRef Interp;
+  char *Error;
+  if (LLVMCreateExecutionEngine(&Interp, MP, &Error))
+    llvm_raise(llvm_ee_error_exn, Error);
+  return Interp;
+}
+
+/* llmoduleprovider -> ExecutionEngine.t */
+CAMLprim LLVMExecutionEngineRef
+llvm_ee_create_interpreter(LLVMModuleProviderRef MP) {
+  LLVMExecutionEngineRef Interp;
+  char *Error;
+  if (LLVMCreateInterpreter(&Interp, MP, &Error))
+    llvm_raise(llvm_ee_error_exn, Error);
+  return Interp;
+}
+
+/* llmoduleprovider -> ExecutionEngine.t */
+CAMLprim LLVMExecutionEngineRef
+llvm_ee_create_jit(LLVMModuleProviderRef MP) {
+  LLVMExecutionEngineRef JIT;
+  char *Error;
+  if (LLVMCreateJITCompiler(&JIT, MP, &Error))
+    llvm_raise(llvm_ee_error_exn, Error);
+  return JIT;
+}
+
+/* ExecutionEngine.t -> unit */
+CAMLprim value llvm_ee_dispose(LLVMExecutionEngineRef EE) {
+  LLVMDisposeExecutionEngine(EE);
+  return Val_unit;
+}
+
+/* llmoduleprovider -> ExecutionEngine.t -> unit */
+CAMLprim value llvm_ee_add_mp(LLVMModuleProviderRef MP,
+                              LLVMExecutionEngineRef EE) {
+  LLVMAddModuleProvider(EE, MP);
+  return Val_unit;
+}
+
+/* llmoduleprovider -> ExecutionEngine.t -> llmodule */
+CAMLprim LLVMModuleRef llvm_ee_remove_mp(LLVMModuleProviderRef MP,
+                                         LLVMExecutionEngineRef EE) {
+  LLVMModuleRef RemovedModule;
+  char *Error;
+  if (LLVMRemoveModuleProvider(EE, MP, &RemovedModule, &Error))
+    llvm_raise(llvm_ee_error_exn, Error);
+  return RemovedModule;
+}
+
+/* string -> ExecutionEngine.t -> llvalue option */
+CAMLprim value llvm_ee_find_function(value Name, LLVMExecutionEngineRef EE) {
+  CAMLparam1(Name);
+  CAMLlocal1(Option);
+  LLVMValueRef Found;
+  if (LLVMFindFunction(EE, String_val(Name), &Found))
+    CAMLreturn(Val_unit);
+  Option = alloc(1, 1);
+  Field(Option, 0) = Val_op(Found);
+  CAMLreturn(Option);
+}
+
+/* llvalue -> GenericValue.t array -> ExecutionEngine.t -> GenericValue.t */
+CAMLprim value llvm_ee_run_function(LLVMValueRef F, value Args,
+                                    LLVMExecutionEngineRef EE) {
+  unsigned NumArgs;
+  LLVMGenericValueRef Result, *GVArgs;
+  unsigned I;
+  
+  NumArgs = Wosize_val(Args);
+  GVArgs = (LLVMGenericValueRef*) malloc(NumArgs * sizeof(LLVMGenericValueRef));
+  for (I = 0; I != NumArgs; ++I)
+    GVArgs[I] = Genericvalue_val(Field(Args, I));
+  
+  Result = LLVMRunFunction(EE, F, NumArgs, GVArgs);
+  
+  free(GVArgs);
+  return alloc_generic_value(Result);
+}
+
+/* ExecutionEngine.t -> unit */
+CAMLprim value llvm_ee_run_static_ctors(LLVMExecutionEngineRef EE) {
+  LLVMRunStaticConstructors(EE);
+  return Val_unit;
+}
+
+/* ExecutionEngine.t -> unit */
+CAMLprim value llvm_ee_run_static_dtors(LLVMExecutionEngineRef EE) {
+  LLVMRunStaticDestructors(EE);
+  return Val_unit;
+}
+
+/* llvalue -> string array -> (string * string) array -> ExecutionEngine.t ->
+   int */
+CAMLprim value llvm_ee_run_function_as_main(LLVMValueRef F,
+                                            value Args, value Env,
+                                            LLVMExecutionEngineRef EE) {
+  CAMLparam2(Args, Env);
+  int I, NumArgs, NumEnv, EnvSize, Result;
+  const char **CArgs, **CEnv;
+  char *CEnvBuf, *Pos;
+  
+  NumArgs = Wosize_val(Args);
+  NumEnv = Wosize_val(Env);
+  
+  /* Build the environment. */
+  CArgs = (const char **) malloc(NumArgs * sizeof(char*));
+  for (I = 0; I != NumArgs; ++I)
+    CArgs[I] = String_val(Field(Args, I));
+  
+  /* Compute the size of the environment string buffer. */
+  for (I = 0, EnvSize = 0; I != NumEnv; ++I) {
+    EnvSize += strlen(String_val(Field(Field(Env, I), 0))) + 1;
+    EnvSize += strlen(String_val(Field(Field(Env, I), 1))) + 1;
+  }
+  
+  /* Build the environment. */
+  CEnv = (const char **) malloc((NumEnv + 1) * sizeof(char*));
+  CEnvBuf = (char*) malloc(EnvSize);
+  Pos = CEnvBuf;
+  for (I = 0; I != NumEnv; ++I) {
+    char *Name  = String_val(Field(Field(Env, I), 0)),
+         *Value = String_val(Field(Field(Env, I), 1));
+    int NameLen  = strlen(Name),
+        ValueLen = strlen(Value);
+    
+    CEnv[I] = Pos;
+    memcpy(Pos, Name, NameLen);
+    Pos += NameLen;
+    *Pos++ = '=';
+    memcpy(Pos, Value, ValueLen);
+    Pos += ValueLen;
+    *Pos++ = '\0';
+  }
+  CEnv[NumEnv] = NULL;
+  
+  Result = LLVMRunFunctionAsMain(EE, F, NumArgs, CArgs, CEnv);
+  
+  free(CArgs);
+  free(CEnv);
+  free(CEnvBuf);
+  
+  CAMLreturn(Val_int(Result));
+}
+
+/* llvalue -> ExecutionEngine.t -> unit */
+CAMLprim value llvm_ee_free_machine_code(LLVMValueRef F,
+                                         LLVMExecutionEngineRef EE) {
+  LLVMFreeMachineCodeForFunction(EE, F);
+  return Val_unit;
+}
+

Added: llvm/trunk/bindings/ocaml/executionengine/llvm_executionengine.ml
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/executionengine/llvm_executionengine.ml?rev=45335&view=auto

==============================================================================
--- llvm/trunk/bindings/ocaml/executionengine/llvm_executionengine.ml (added)
+++ llvm/trunk/bindings/ocaml/executionengine/llvm_executionengine.ml Sun Dec 23 10:59:28 2007
@@ -0,0 +1,106 @@
+(*===-- llvm_executionengine.ml - LLVM Ocaml Interface ----------*- C++ -*-===*
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file was developed by Gordon Henriksen and is distributed under the
+ * University of Illinois Open Source License. See LICENSE.TXT for details.
+ *
+ *===----------------------------------------------------------------------===*)
+
+
+exception Error of string
+
+external register_exns: exn -> unit
+  = "llvm_register_ee_exns"
+
+
+module GenericValue = struct
+  type t
+  
+  external of_float: Llvm.lltype -> float -> t
+    = "llvm_genericvalue_of_float"
+  external of_pointer: 'a -> t
+    = "llvm_genericvalue_of_value"
+  external of_int32: Llvm.lltype -> int32 -> t
+    = "llvm_genericvalue_of_int32"
+  external of_int: Llvm.lltype -> int -> t
+    = "llvm_genericvalue_of_int"
+  external of_nativeint: Llvm.lltype -> nativeint -> t
+    = "llvm_genericvalue_of_nativeint"
+  external of_int64: Llvm.lltype -> int64 -> t
+    = "llvm_genericvalue_of_int64"
+  
+  external as_float: Llvm.lltype -> t -> float
+    = "llvm_genericvalue_as_float"
+  external as_pointer: t -> 'a
+    = "llvm_genericvalue_as_value"
+  external as_int32: t -> int32
+    = "llvm_genericvalue_as_int32"
+  external as_int: t -> int
+    = "llvm_genericvalue_as_int"
+  external as_nativeint: t -> nativeint
+    = "llvm_genericvalue_as_nativeint"
+  external as_int64: t -> int64
+    = "llvm_genericvalue_as_int64"
+end
+
+
+module ExecutionEngine = struct
+  type t
+  
+  (* FIXME: Ocaml is not running this setup code unless we use 'val' in the
+            interface, which causes the emission of a stub for each function;
+            using 'external' in the module allows direct calls into 
+            ocaml_executionengine.c. This is hardly fatal, but it is unnecessary
+            overhead on top of the two stubs that are already invoked for each 
+            call into LLVM. *)
+  let _ = register_exns (Error "")
+  
+  external create: Llvm.llmoduleprovider -> t
+    = "llvm_ee_create"
+  external create_interpreter: Llvm.llmoduleprovider -> t
+    = "llvm_ee_create_interpreter"
+  external create_jit: Llvm.llmoduleprovider -> t
+    = "llvm_ee_create_jit"
+  external dispose: t -> unit
+    = "llvm_ee_dispose"
+  external add_module_provider: Llvm.llmoduleprovider -> t -> unit
+    = "llvm_ee_add_mp"
+  external remove_module_provider: Llvm.llmoduleprovider -> t -> Llvm.llmodule
+    = "llvm_ee_remove_mp"
+  external find_function: string -> t -> Llvm.llvalue option
+    = "llvm_ee_find_function"
+  external run_function: Llvm.llvalue -> GenericValue.t array -> t ->
+                         GenericValue.t
+    = "llvm_ee_run_function"
+  external run_static_ctors: t -> unit
+    = "llvm_ee_run_static_ctors"
+  external run_static_dtors: t -> unit
+    = "llvm_ee_run_static_dtors"
+  external run_function_as_main: Llvm.llvalue -> string array ->
+                                 (string * string) array -> t -> int
+    = "llvm_ee_run_function_as_main"
+  external free_machine_code: Llvm.llvalue -> t -> unit
+    = "llvm_ee_free_machine_code"
+  
+  (* The following are not bound. Patches are welcome.
+  
+  get_target_data: t -> lltargetdata
+  add_global_mapping: llvalue -> llgenericvalue -> t -> unit
+  clear_all_global_mappings: t -> unit
+  update_global_mapping: llvalue -> llgenericvalue -> t -> unit
+  get_pointer_to_global_if_available: llvalue -> t -> llgenericvalue
+  get_pointer_to_global: llvalue -> t -> llgenericvalue
+  get_pointer_to_function: llvalue -> t -> llgenericvalue
+  get_pointer_to_function_or_stub: llvalue -> t -> llgenericvalue
+  get_global_value_at_address: llgenericvalue -> t -> llvalue option
+  store_value_to_memory: llgenericvalue -> llgenericvalue -> lltype -> unit
+  initialize_memory: llvalue -> llgenericvalue -> t -> unit
+  recompile_and_relink_function: llvalue -> t -> llgenericvalue
+  get_or_emit_global_variable: llvalue -> t -> llgenericvalue
+  disable_lazy_compilation: t -> unit
+  lazy_compilation_enabled: t -> bool
+  install_lazy_function_creator: (string -> llgenericvalue) -> t -> unit
+  
+   *)
+end

Added: llvm/trunk/bindings/ocaml/executionengine/llvm_executionengine.mli
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/executionengine/llvm_executionengine.mli?rev=45335&view=auto

==============================================================================
--- llvm/trunk/bindings/ocaml/executionengine/llvm_executionengine.mli (added)
+++ llvm/trunk/bindings/ocaml/executionengine/llvm_executionengine.mli Sun Dec 23 10:59:28 2007
@@ -0,0 +1,152 @@
+(*===-- llvm_executionengine.mli - LLVM Ocaml Interface ---------*- C++ -*-===*
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file was developed by Gordon Henriksen and is distributed under the
+ * University of Illinois Open Source License. See LICENSE.TXT for details.
+ *
+ *===----------------------------------------------------------------------===
+ *
+ * This interface provides an ocaml API for LLVM execution engine (JIT/
+ * interpreter), the classes in the ExecutionEngine library.
+ *
+ *===----------------------------------------------------------------------===*)
+
+
+exception Error of string
+
+
+module GenericValue: sig
+  (** [GenericValue.t] is a boxed union type used to portably pass arguments to
+      and receive values from the execution engine. It supports only a limited
+      selection of types; for more complex argument types, it is necessary to
+      generate a stub function by hand or to pass parameters by reference.
+      See the struct [llvm::GenericValue]. **)
+  type t
+  
+  (** [of_float fpty n] boxes the float [n] in a float-valued generic value
+      according to the floating point type [fpty]. See the fields 
+      [llvm::GenericValue::DoubleVal] and [llvm::GenericValue::FloatVal]. **)
+  val of_float: Llvm.lltype -> float -> t
+  
+  (** [of_pointer v] boxes the pointer value [v] in a generic value. See the
+      field [llvm::GenericValue::PointerVal]. **)
+  val of_pointer: 'a -> t
+  
+  (** [of_int32 n w] boxes the int32 [i] in a generic value with the bitwidth
+      [w]. See the field [llvm::GenericValue::IntVal]. **)
+  val of_int32: Llvm.lltype -> int32 -> t
+  
+  (** [of_int n w] boxes the int [i] in a generic value with the bitwidth
+      [w]. See the field [llvm::GenericValue::IntVal]. **)
+  val of_int: Llvm.lltype -> int -> t
+  
+  (** [of_natint n w] boxes the native int [i] in a generic value with the
+      bitwidth [w]. See the field [llvm::GenericValue::IntVal]. **)
+  val of_nativeint: Llvm.lltype -> nativeint -> t
+  
+  (** [of_int64 n w] boxes the int64 [i] in a generic value with the bitwidth
+      [w]. See the field [llvm::GenericValue::IntVal]. **)
+  val of_int64: Llvm.lltype -> int64 -> t
+  
+  (** [as_float fpty gv] unboxes the floating point-valued generic value [gv] of
+      floating point type [fpty]. See the fields [llvm::GenericValue::DoubleVal]
+      and [llvm::GenericValue::FloatVal]. **)
+  val as_float: Llvm.lltype -> t -> float
+  
+  (** [as_pointer gv] unboxes the pointer-valued generic value [gv]. See the
+      field [llvm::GenericValue::PointerVal]. **)
+  val as_pointer: t -> 'a
+  
+  (** [as_int32 gv] unboxes the integer-valued generic value [gv] as an [int32].
+      Is invalid if [gv] has a bitwidth greater than 32 bits. See the field
+      [llvm::GenericValue::IntVal]. **)
+  val as_int32: t -> int32
+  
+  (** [as_int gv] unboxes the integer-valued generic value [gv] as an [int].
+      Is invalid if [gv] has a bitwidth greater than the host bit width (but the
+      most significant bit may be lost). See the field
+      [llvm::GenericValue::IntVal]. **)
+  val as_int: t -> int
+  
+  (** [as_natint gv] unboxes the integer-valued generic value [gv] as a
+      [nativeint]. Is invalid if [gv] has a bitwidth greater than
+      [nativeint]. See the field [llvm::GenericValue::IntVal]. **)
+  val as_nativeint: t -> nativeint
+  
+  (** [as_int64 gv] returns the integer-valued generic value [gv] as an [int64].
+      Is invalid if [gv] has a bitwidth greater than [int64]. See the field
+      [llvm::GenericValue::IntVal]. **)
+  val as_int64: t -> int64
+end
+
+
+module ExecutionEngine: sig
+  (** An execution engine is either a JIT compiler or an interpreter, capable of
+      directly loading an LLVM module and executing its functions without first
+      invoking a static compiler and generating a native executable. **)
+  type t
+  
+  (** [create mp] creates a new execution engine, taking ownership of the
+      module provider [mp] if successful. Creates a JIT if possible, else falls
+      back to an interpreter. Raises [Error msg] if an error occurrs. The
+      execution engine is not garbage collected and must be destroyed with
+      [dispose ee]. See the function [llvm::ExecutionEngine::create]. **)
+  val create: Llvm.llmoduleprovider -> t
+  
+  (** [create_interpreter mp] creates a new interpreter, taking ownership of the
+      module provider [mp] if successful. Raises [Error msg] if an error
+      occurrs. The execution engine is not garbage collected and must be
+      destroyed with [dispose ee].
+      See the function [llvm::ExecutionEngine::create]. **)
+  val create_interpreter: Llvm.llmoduleprovider -> t
+  
+  (** [create_jit mp] creates a new JIT (just-in-time compiler), taking
+      ownership of the module provider [mp] if successful. Raises [Error msg] if
+      an error occurrs. The execution engine is not garbage collected and must
+      be destroyed with [dispose ee].
+      See the function [llvm::ExecutionEngine::create]. **)
+  val create_jit: Llvm.llmoduleprovider -> t
+  
+  (** [dispose ee] releases the memory used by the execution engine and must be
+      invoked to avoid memory leaks. **)
+  val dispose: t -> unit
+  
+  (** [add_module_provider mp ee] adds the module provider [mp] to the execution
+      engine [ee]. **)
+  val add_module_provider: Llvm.llmoduleprovider -> t -> unit
+  
+  (** [remove_module_provider mp ee] removes the module provider [mp] from the
+      execution engine [ee], disposing of [mp] and the module referenced by
+      [mp]. Raises [Error msg] if an error occurs. **)
+  val remove_module_provider: Llvm.llmoduleprovider -> t -> Llvm.llmodule
+  
+  (** [find_function n ee] finds the function named [n] defined in any of the 
+      modules owned by the execution engine [ee]. Returns [None] if the function
+      is not found and [Some f] otherwise. **)
+  val find_function: string -> t -> Llvm.llvalue option
+  
+  (** [run_function f args ee] synchronously executes the function [f] with the
+      arguments [args], which must be compatible with the parameter types. **)
+  val run_function: Llvm.llvalue -> GenericValue.t array -> t ->
+                    GenericValue.t
+  
+  (** [run_static_ctors ee] executes the static constructors of each module in
+      the execution engine [ee]. **)
+  val run_static_ctors: t -> unit
+  
+  (** [run_static_dtors ee] executes the static destructors of each module in
+      the execution engine [ee]. **)
+  val run_static_dtors: t -> unit
+  
+  (** [run_function_as_main f args env ee] executes the function [f] as a main 
+      function, passing it [argv] and [argc] according to the string array
+      [args], and [envp] as specified by the array [env]. Returns the integer 
+      return value of the function. **)
+  val run_function_as_main: Llvm.llvalue -> string array ->
+                            (string * string) array -> t -> int
+  
+  (** [free_machine_code f ee] releases the memory in the execution engine [ee]
+      used to store the machine code for the function [f]. **)
+  val free_machine_code: Llvm.llvalue -> t -> unit
+end

Modified: llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c?rev=45335&r1=45334&r2=45335&view=diff

==============================================================================
--- llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c (original)
+++ llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c Sun Dec 23 10:59:28 2007
@@ -18,7 +18,6 @@
 #include "llvm-c/Core.h"
 #include "caml/alloc.h"
 #include "caml/custom.h"
-#include "caml/mlvalues.h"
 #include "caml/memory.h"
 #include "caml/fail.h"
 #include "caml/callback.h"
@@ -37,7 +36,7 @@
   return Val_unit;
 }
 
-void llvm_raise(value Prototype, char *Message) {
+static void llvm_raise(value Prototype, char *Message) {
   CAMLparam1(Prototype);
   CAMLlocal1(CamlMessage);
   
@@ -45,6 +44,7 @@
   LLVMDisposeMessage(Message);
   
   raise_with_arg(Prototype, CamlMessage);
+  abort(); /* NOTREACHED */
   CAMLnoreturn;
 }
 
@@ -234,7 +234,7 @@
 
 #define Typehandle_val(v)  (*(LLVMTypeHandleRef *)(Data_custom_val(v)))
 
-void llvm_finalize_handle(value TH) {
+static void llvm_finalize_handle(value TH) {
   LLVMDisposeTypeHandle(Typehandle_val(TH));
 }
 

Added: llvm/trunk/include/llvm-c/ExecutionEngine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm-c/ExecutionEngine.h?rev=45335&view=auto

==============================================================================
--- llvm/trunk/include/llvm-c/ExecutionEngine.h (added)
+++ llvm/trunk/include/llvm-c/ExecutionEngine.h Sun Dec 23 10:59:28 2007
@@ -0,0 +1,115 @@
+/*===-- llvm-c/ExecutionEngine.h - ExecutionEngine Lib C Iface --*- C++ -*-===*\
+|*                                                                            *|
+|*                     The LLVM Compiler Infrastructure                       *|
+|*                                                                            *|
+|* This file was developed by Gordon Henriksen and is distributed under the   *|
+|* University of Illinois Open Source License. See LICENSE.TXT for details.   *|
+|*                                                                            *|
+|*===----------------------------------------------------------------------===*|
+|*                                                                            *|
+|* This header declares the C interface to libLLVMExecutionEngine.o, which    *|
+|* implements various analyses of the LLVM IR.                                *|
+|*                                                                            *|
+|* Many exotic languages can interoperate with C code but have a harder time  *|
+|* with C++ due to name mangling. So in addition to C, this interface enables *|
+|* tools written in such languages.                                           *|
+|*                                                                            *|
+\*===----------------------------------------------------------------------===*/
+
+#ifndef LLVM_C_EXECUTIONENGINE_H
+#define LLVM_C_EXECUTIONENGINE_H
+
+#include "llvm-c/Core.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct LLVMOpaqueGenericValue *LLVMGenericValueRef;
+typedef struct LLVMOpaqueExecutionEngine *LLVMExecutionEngineRef;
+
+/*===-- Operations on generic values --------------------------------------===*/
+
+LLVMGenericValueRef LLVMCreateGenericValueOfInt(LLVMTypeRef Ty,
+                                                unsigned long long N,
+                                                int IsSigned);
+
+LLVMGenericValueRef LLVMCreateGenericValueOfPointer(void *P);
+
+LLVMGenericValueRef LLVMCreateGenericValueOfFloat(LLVMTypeRef Ty, double N);
+
+unsigned LLVMGenericValueIntWidth(LLVMGenericValueRef GenValRef);
+
+unsigned long long LLVMGenericValueToInt(LLVMGenericValueRef GenVal,
+                                         int IsSigned);
+
+void *LLVMGenericValueToPointer(LLVMGenericValueRef GenVal);
+
+double LLVMGenericValueToFloat(LLVMTypeRef TyRef, LLVMGenericValueRef GenVal);
+
+void LLVMDisposeGenericValue(LLVMGenericValueRef GenVal);
+
+/*===-- Operations on execution engines -----------------------------------===*/
+
+int LLVMCreateExecutionEngine(LLVMExecutionEngineRef *OutEE,
+                              LLVMModuleProviderRef MP,
+                              char **OutError);
+
+int LLVMCreateInterpreter(LLVMExecutionEngineRef *OutInterp,
+                          LLVMModuleProviderRef MP,
+                          char **OutError);
+
+int LLVMCreateJITCompiler(LLVMExecutionEngineRef *OutJIT,
+                          LLVMModuleProviderRef MP,
+                          char **OutError);
+
+void LLVMDisposeExecutionEngine(LLVMExecutionEngineRef EE);
+
+void LLVMRunStaticConstructors(LLVMExecutionEngineRef EE);
+
+void LLVMRunStaticDestructors(LLVMExecutionEngineRef EE);
+
+int LLVMRunFunctionAsMain(LLVMExecutionEngineRef EE, LLVMValueRef F,
+                          unsigned ArgC, const char * const *ArgV,
+                          const char * const *EnvP);
+
+LLVMGenericValueRef LLVMRunFunction(LLVMExecutionEngineRef EE, LLVMValueRef F,
+                                    unsigned NumArgs,
+                                    LLVMGenericValueRef *Args);
+
+void LLVMFreeMachineCodeForFunction(LLVMExecutionEngineRef EE, LLVMValueRef F);
+
+void LLVMAddModuleProvider(LLVMExecutionEngineRef EE, LLVMModuleProviderRef MP);
+
+int LLVMRemoveModuleProvider(LLVMExecutionEngineRef EE,
+                             LLVMModuleProviderRef MP,
+                             LLVMModuleRef *OutMod, char **OutError);
+
+int LLVMFindFunction(LLVMExecutionEngineRef EE, const char *Name,
+                     LLVMValueRef *OutFn);
+
+#ifdef __cplusplus
+}
+
+namespace llvm {
+  class GenericValue;
+  class ExecutionEngine;
+  
+  #define DEFINE_SIMPLE_CONVERSION_FUNCTIONS(ty, ref)   \
+    inline ty *unwrap(ref P) {                          \
+      return reinterpret_cast(P);                  \
+    }                                                   \
+                                                        \
+    inline ref wrap(const ty *P) {                      \
+      return reinterpret_cast(const_cast(P)); \
+    }
+  
+  DEFINE_SIMPLE_CONVERSION_FUNCTIONS(GenericValue,    LLVMGenericValueRef   )
+  DEFINE_SIMPLE_CONVERSION_FUNCTIONS(ExecutionEngine, LLVMExecutionEngineRef)
+  
+  #undef DEFINE_SIMPLE_CONVERSION_FUNCTIONS
+}
+  
+#endif /* defined(__cplusplus) */
+
+#endif

Added: llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp?rev=45335&view=auto

==============================================================================
--- llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp (added)
+++ llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp Sun Dec 23 10:59:28 2007
@@ -0,0 +1,187 @@
+//===-- ExecutionEngineBindings.cpp - C bindings for EEs ------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by Gordon Henriksen and is distributed under the
+// University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the C bindings for the ExecutionEngine library.
+//
+//===----------------------------------------------------------------------===//
+
+#define DEBUG_TYPE "jit"
+#include "llvm-c/ExecutionEngine.h"
+#include "llvm/ExecutionEngine/GenericValue.h"
+#include "llvm/ExecutionEngine/ExecutionEngine.h"
+
+using namespace llvm;
+
+/*===-- Operations on generic values --------------------------------------===*/
+
+LLVMGenericValueRef LLVMCreateGenericValueOfInt(LLVMTypeRef Ty,
+                                                unsigned long long N,
+                                                int IsSigned) {
+  GenericValue *GenVal = new GenericValue();
+  GenVal->IntVal = APInt(unwrap(Ty)->getBitWidth(), N, IsSigned);
+  return wrap(GenVal);
+}
+
+LLVMGenericValueRef LLVMCreateGenericValueOfPointer(void *P) {
+  GenericValue *GenVal = new GenericValue();
+  GenVal->PointerVal = P;
+  return wrap(GenVal);
+}
+
+LLVMGenericValueRef LLVMCreateGenericValueOfFloat(LLVMTypeRef TyRef, double N) {
+  GenericValue *GenVal = new GenericValue();
+  switch (unwrap(TyRef)->getTypeID()) {
+  case Type::FloatTyID:
+    GenVal->FloatVal = N;
+    break;
+  case Type::DoubleTyID:
+    GenVal->DoubleVal = N;
+    break;
+  default:
+    assert(0 && "LLVMGenericValueToFloat supports only float and double.");
+    break;
+  }
+  return wrap(GenVal);
+}
+
+unsigned LLVMGenericValueIntWidth(LLVMGenericValueRef GenValRef) {
+  return unwrap(GenValRef)->IntVal.getBitWidth();
+}
+
+unsigned long long LLVMGenericValueToInt(LLVMGenericValueRef GenValRef,
+                                         int IsSigned) {
+  GenericValue *GenVal = unwrap(GenValRef);
+  if (IsSigned)
+    return GenVal->IntVal.getSExtValue();
+  else
+    return GenVal->IntVal.getZExtValue();
+}
+
+void *LLVMGenericValueToPointer(LLVMGenericValueRef GenVal) {
+  return unwrap(GenVal)->PointerVal;
+}
+
+double LLVMGenericValueToFloat(LLVMTypeRef TyRef, LLVMGenericValueRef GenVal) {
+  switch (unwrap(TyRef)->getTypeID()) {
+  case Type::FloatTyID:
+    return unwrap(GenVal)->FloatVal;
+  case Type::DoubleTyID:
+    return unwrap(GenVal)->DoubleVal;
+  default:
+    assert(0 && "LLVMGenericValueToFloat supports only float and double.");
+    break;
+  }
+}
+
+void LLVMDisposeGenericValue(LLVMGenericValueRef GenVal) {
+  delete unwrap(GenVal);
+}
+
+/*===-- Operations on execution engines -----------------------------------===*/
+
+int LLVMCreateExecutionEngine(LLVMExecutionEngineRef *OutEE,
+                              LLVMModuleProviderRef MP,
+                              char **OutError) {
+  std::string Error;
+  if (ExecutionEngine *EE = ExecutionEngine::create(unwrap(MP), false, &Error)){
+    *OutEE = wrap(EE);
+    return 0;
+  }
+  *OutError = strdup(Error.c_str());
+  return 1;
+}
+
+int LLVMCreateInterpreter(LLVMExecutionEngineRef *OutInterp,
+                          LLVMModuleProviderRef MP,
+                          char **OutError) {
+  std::string Error;
+  if (ExecutionEngine *Interp = ExecutionEngine::create(unwrap(MP), &Error)) {
+    *OutInterp = wrap(Interp);
+    return 0;
+  }
+  *OutError = strdup(Error.c_str());
+  return 1;
+}
+
+int LLVMCreateJITCompiler(LLVMExecutionEngineRef *OutJIT,
+                          LLVMModuleProviderRef MP,
+                          char **OutError) {
+  std::string Error;
+  if (ExecutionEngine *JIT = ExecutionEngine::createJIT(unwrap(MP), &Error)) {
+    *OutJIT = wrap(JIT);
+    return 0;
+  }
+  *OutError = strdup(Error.c_str());
+  return 1;
+}
+
+void LLVMDisposeExecutionEngine(LLVMExecutionEngineRef EE) {
+  delete unwrap(EE);
+}
+
+void LLVMRunStaticConstructors(LLVMExecutionEngineRef EE) {
+  unwrap(EE)->runStaticConstructorsDestructors(false);
+}
+
+void LLVMRunStaticDestructors(LLVMExecutionEngineRef EE) {
+  unwrap(EE)->runStaticConstructorsDestructors(true);
+}
+
+int LLVMRunFunctionAsMain(LLVMExecutionEngineRef EE, LLVMValueRef F,
+                          unsigned ArgC, const char * const *ArgV,
+                          const char * const *EnvP) {
+  std::vector ArgVec;
+  for (unsigned I = 0; I != ArgC; ++I)
+    ArgVec.push_back(ArgV[I]);
+  
+  return unwrap(EE)->runFunctionAsMain(unwrap(F), ArgVec, EnvP);
+}
+
+LLVMGenericValueRef LLVMRunFunction(LLVMExecutionEngineRef EE, LLVMValueRef F,
+                                    unsigned NumArgs,
+                                    LLVMGenericValueRef *Args) {
+  std::vector ArgVec;
+  ArgVec.reserve(NumArgs);
+  for (unsigned I = 0; I != NumArgs; ++I)
+    ArgVec.push_back(*unwrap(Args[I]));
+  
+  GenericValue *Result = new GenericValue();
+  *Result = unwrap(EE)->runFunction(unwrap(F), ArgVec);
+  return wrap(Result);
+}
+
+void LLVMFreeMachineCodeForFunction(LLVMExecutionEngineRef EE, LLVMValueRef F) {
+  unwrap(EE)->freeMachineCodeForFunction(unwrap(F));
+}
+
+void LLVMAddModuleProvider(LLVMExecutionEngineRef EE, LLVMModuleProviderRef MP){
+  unwrap(EE)->addModuleProvider(unwrap(MP));
+}
+
+int LLVMRemoveModuleProvider(LLVMExecutionEngineRef EE,
+                             LLVMModuleProviderRef MP,
+                             LLVMModuleRef *OutMod, char **OutError) {
+  std::string Error;
+  if (Module *Gone = unwrap(EE)->removeModuleProvider(unwrap(MP), &Error)) {
+    *OutMod = wrap(Gone);
+    return 0;
+  }
+  if (OutError)
+    *OutError = strdup(Error.c_str());
+  return 1;
+}
+
+int LLVMFindFunction(LLVMExecutionEngineRef EE, const char *Name,
+                     LLVMValueRef *OutFn) {
+  if (Function *F = unwrap(EE)->FindFunctionNamed(Name)) {
+    *OutFn = wrap(F);
+    return 0;
+  }
+  return 1;
+}

Added: llvm/trunk/test/Bindings/Ocaml/executionengine.ml
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bindings/Ocaml/executionengine.ml?rev=45335&view=auto

==============================================================================
--- llvm/trunk/test/Bindings/Ocaml/executionengine.ml (added)
+++ llvm/trunk/test/Bindings/Ocaml/executionengine.ml Sun Dec 23 10:59:28 2007
@@ -0,0 +1,101 @@
+(* RUN: %ocamlc -warn-error A llvm.cma llvm_executionengine.cma %s -o %t
+ * RUN: ./%t %t.bc
+ *)
+
+open Llvm
+open Llvm_executionengine
+
+(* Note that this takes a moment to link, so it's best to keep the number of
+   individual tests low. *)
+
+let bomb msg =
+  prerr_endline msg;
+  exit 2
+
+let define_main_fn m retval =
+  let fn =
+    let str_arr_type = pointer_type (pointer_type i8_type) in
+    define_function "main" (function_type i32_type [| i32_type;
+                                                      str_arr_type;
+                                                      str_arr_type |]) m in
+  let b = builder_at_end (entry_block fn) in
+  ignore (build_ret (const_int i32_type retval) b);
+  fn
+
+let define_plus m =
+  let fn = define_function "plus" (function_type i32_type [| i32_type;
+                                                             i32_type |]) m in
+  let b = builder_at_end (entry_block fn) in
+  let add = build_add (param fn 0) (param fn 1) "sum" b in
+  ignore (build_ret add b)
+
+let test_genericvalue () =
+  let tu = (1, 2) in
+  let ptrgv = GenericValue.of_pointer tu in
+  assert (tu = GenericValue.as_pointer ptrgv);
+  
+  let fpgv = GenericValue.of_float double_type 2. in
+  assert (2. = GenericValue.as_float double_type fpgv);
+  
+  let intgv = GenericValue.of_int i32_type 3 in
+  assert (3  = GenericValue.as_int intgv);
+  
+  let i32gv = GenericValue.of_int32 i32_type 4l in
+  assert (4l = GenericValue.as_int32 i32gv);
+  
+  let nigv = GenericValue.of_nativeint i32_type 5n in
+  assert (5n = GenericValue.as_nativeint nigv);
+  
+  let i64gv = GenericValue.of_int64 i64_type 6L in
+  assert (6L = GenericValue.as_int64 i64gv)
+
+let test_executionengine () =
+  (* create *)
+  let m = create_module "test_module" in
+  let main = define_main_fn m 42 in
+  
+  let m2 = create_module "test_module2" in
+  define_plus m2;
+  
+  let ee = ExecutionEngine.create (ModuleProvider.create m) in
+  let mp2 = ModuleProvider.create m2 in
+  ExecutionEngine.add_module_provider mp2 ee;
+  
+  (* run_static_ctors *)
+  ExecutionEngine.run_static_ctors ee;
+  
+  (* run_function_as_main *)
+  let res = ExecutionEngine.run_function_as_main main [|"test"|] [||] ee in
+  if 42 != res then bomb "main did not return 42";
+  
+  (* free_machine_code *)
+  ExecutionEngine.free_machine_code main ee;
+  
+  (* find_function *)
+  match ExecutionEngine.find_function "dne" ee with
+  | Some _ -> raise (Failure "find_function 'dne' failed")
+  | None ->
+  
+  match ExecutionEngine.find_function "plus" ee with
+  | None -> raise (Failure "find_function 'plus' failed")
+  | Some plus ->
+  
+  (* run_function *)
+  let res = ExecutionEngine.run_function plus
+                                         [| GenericValue.of_int i32_type 2;
+                                            GenericValue.of_int i32_type 2 |]
+                                         ee in
+  if 4 != GenericValue.as_int res then bomb "plus did not work";
+  
+  (* remove_module_provider *)
+  Llvm.dispose_module (ExecutionEngine.remove_module_provider mp2 ee);
+  
+  (* run_static_dtors *)
+  ExecutionEngine.run_static_dtors ee;
+  
+  (* dispose *)
+  ExecutionEngine.dispose ee
+
+let _ =
+  test_genericvalue ();
+  test_executionengine ()




From gordonhenriksen at mac.com  Sun Dec 23 11:10:24 2007
From: gordonhenriksen at mac.com (Gordon Henriksen)
Date: Sun, 23 Dec 2007 17:10:24 -0000
Subject: [llvm-commits] [llvm] r45336 -
 /llvm/trunk/bindings/ocaml/executionengine/executionengine_ocaml.c
Message-ID: <200712231710.lBNHAO6w031368@zion.cs.uiuc.edu>

Author: gordon
Date: Sun Dec 23 11:10:23 2007
New Revision: 45336

URL: http://llvm.org/viewvc/llvm-project?rev=45336&view=rev
Log:
Fix some Ocaml GC errors noticed upon review.

Modified:
    llvm/trunk/bindings/ocaml/executionengine/executionengine_ocaml.c

Modified: llvm/trunk/bindings/ocaml/executionengine/executionengine_ocaml.c
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/executionengine/executionengine_ocaml.c?rev=45336&r1=45335&r2=45336&view=diff

==============================================================================
--- llvm/trunk/bindings/ocaml/executionengine/executionengine_ocaml.c (original)
+++ llvm/trunk/bindings/ocaml/executionengine/executionengine_ocaml.c Sun Dec 23 11:10:23 2007
@@ -72,12 +72,15 @@
 
 /* Llvm.lltype -> float -> t */
 CAMLprim value llvm_genericvalue_of_float(LLVMTypeRef Ty, value N) {
-  return alloc_generic_value(LLVMCreateGenericValueOfFloat(Ty, Double_val(N)));
+  CAMLparam1(N);
+  CAMLreturn(alloc_generic_value(
+    LLVMCreateGenericValueOfFloat(Ty, Double_val(N))));
 }
 
 /* 'a -> t */
 CAMLprim value llvm_genericvalue_of_value(value V) {
-  return alloc_generic_value(LLVMCreateGenericValueOfPointer(Op_val(V)));
+  CAMLparam1(V);
+  CAMLreturn(alloc_generic_value(LLVMCreateGenericValueOfPointer(Op_val(V))));
 }
 
 /* Llvm.lltype -> int -> t */
@@ -87,26 +90,30 @@
 
 /* Llvm.lltype -> int32 -> t */
 CAMLprim value llvm_genericvalue_of_int32(LLVMTypeRef Ty, value Int32) {
-  return alloc_generic_value(LLVMCreateGenericValueOfInt(Ty, Int32_val(Int32),
-                                                         1));
+  CAMLparam1(Int32);
+  CAMLreturn(alloc_generic_value(
+    LLVMCreateGenericValueOfInt(Ty, Int32_val(Int32), 1)));
 }
 
 /* Llvm.lltype -> nativeint -> t */
 CAMLprim value llvm_genericvalue_of_nativeint(LLVMTypeRef Ty, value NatInt) {
-  return alloc_generic_value(LLVMCreateGenericValueOfInt(Ty,
-                                                         Nativeint_val(NatInt),
-                                                         1));
+  CAMLparam1(NatInt);
+  CAMLreturn(alloc_generic_value(
+    LLVMCreateGenericValueOfInt(Ty, Nativeint_val(NatInt), 1)));
 }
 
 /* Llvm.lltype -> int64 -> t */
 CAMLprim value llvm_genericvalue_of_int64(LLVMTypeRef Ty, value Int64) {
-  return alloc_generic_value(LLVMCreateGenericValueOfInt(Ty, Int64_val(Int64),
-                                                         1));
+  CAMLparam1(Int64);
+  CAMLreturn(alloc_generic_value(
+    LLVMCreateGenericValueOfInt(Ty, Int64_val(Int64), 1)));
 }
 
 /* Llvm.lltype -> t -> float */
 CAMLprim value llvm_genericvalue_as_float(LLVMTypeRef Ty, value GenVal) {
-  return copy_double(LLVMGenericValueToFloat(Ty, Genericvalue_val(GenVal)));
+  CAMLparam1(GenVal);
+  CAMLreturn(copy_double(
+    LLVMGenericValueToFloat(Ty, Genericvalue_val(GenVal))));
 }
 
 /* t -> 'a */
@@ -123,23 +130,26 @@
 
 /* t -> int32 */
 CAMLprim value llvm_genericvalue_as_int32(value GenVal) {
+  CAMLparam1(GenVal);
   assert(LLVMGenericValueIntWidth(Genericvalue_val(GenVal)) <= 32
          && "Generic value too wide to treat as an int32!");
-  return copy_int32(LLVMGenericValueToInt(Genericvalue_val(GenVal), 1));
+  CAMLreturn(copy_int32(LLVMGenericValueToInt(Genericvalue_val(GenVal), 1)));
 }
 
 /* t -> int64 */
 CAMLprim value llvm_genericvalue_as_int64(value GenVal) {
+  CAMLparam1(GenVal);
   assert(LLVMGenericValueIntWidth(Genericvalue_val(GenVal)) <= 64
          && "Generic value too wide to treat as an int64!");
-  return copy_int64(LLVMGenericValueToInt(Genericvalue_val(GenVal), 1));
+  CAMLreturn(copy_int64(LLVMGenericValueToInt(Genericvalue_val(GenVal), 1)));
 }
 
 /* t -> nativeint */
 CAMLprim value llvm_genericvalue_as_nativeint(value GenVal) {
+  CAMLparam1(GenVal);
   assert(LLVMGenericValueIntWidth(Genericvalue_val(GenVal)) <= 8 * sizeof(value)
          && "Generic value too wide to treat as a nativeint!");
-  return copy_nativeint(LLVMGenericValueToInt(Genericvalue_val(GenVal),1));
+  CAMLreturn(copy_nativeint(LLVMGenericValueToInt(Genericvalue_val(GenVal),1)));
 }
 
 




From clattner at apple.com  Sun Dec 23 12:57:37 2007
From: clattner at apple.com (Chris Lattner)
Date: Sun, 23 Dec 2007 10:57:37 -0800
Subject: [llvm-commits] [llvm] r45333 -
	/llvm/trunk/include/llvm/CodeGen/MachineDominators.h
In-Reply-To: <200712231516.lBNFGr3n026394@zion.cs.uiuc.edu>
References: <200712231516.lBNFGr3n026394@zion.cs.uiuc.edu>
Message-ID: <52B35251-9BD0-49CA-9392-D16F6133454B@apple.com>

> URL: http://llvm.org/viewvc/llvm-project?rev=45333&view=rev
> Log:
> Add GraphTraits specializations for machine dominators.

Nifty.

> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/include/llvm/CodeGen/MachineDominators.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/MachineDominators.h Sun Dec 23  
> 09:16:46 2007
> @@ -21,6 +21,7 @@
> #include "llvm/CodeGen/MachineInstr.h"
> #include "llvm/Analysis/Dominators.h"
> #include "llvm/Analysis/DominatorInternals.h"
> +#include "llvm/ADT/GraphTraits.h"

You should be able to just forward declare GraphTraits, instead of  
#including it.

Thanks Owen,

-Chris

>
> namespace llvm {
>
> @@ -182,6 +183,32 @@
>   }
> };
>
> +//===-------------------------------------
> +/// DominatorTree GraphTraits specialization so the DominatorTree  
> can be
> +/// iterable by generic graph iterators.
> +///
> +template <> struct GraphTraits {
> +  typedef MachineDomTreeNode NodeType;
> +  typedef NodeType::iterator  ChildIteratorType;
> +
> +  static NodeType *getEntryNode(NodeType *N) {
> +    return N;
> +  }
> +  static inline ChildIteratorType child_begin(NodeType* N) {
> +    return N->begin();
> +  }
> +  static inline ChildIteratorType child_end(NodeType* N) {
> +    return N->end();
> +  }
> +};
> +
> +template <> struct GraphTraits
> +  : public GraphTraits {
> +  static NodeType *getEntryNode(MachineDominatorTree *DT) {
> +    return DT->getRootNode();
> +  }
> +};
> +
> }
>
> #endif
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From resistor at mac.com  Sun Dec 23 14:34:07 2007
From: resistor at mac.com (Owen Anderson)
Date: Sun, 23 Dec 2007 20:34:07 -0000
Subject: [llvm-commits] [llvm] r45337 -
	/llvm/trunk/include/llvm/CodeGen/MachineDominators.h
Message-ID: <200712232034.lBNKY746011507@zion.cs.uiuc.edu>

Author: resistor
Date: Sun Dec 23 14:34:06 2007
New Revision: 45337

URL: http://llvm.org/viewvc/llvm-project?rev=45337&view=rev
Log:
Get rid of an unneeded #include.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineDominators.h

Modified: llvm/trunk/include/llvm/CodeGen/MachineDominators.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineDominators.h?rev=45337&r1=45336&r2=45337&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineDominators.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineDominators.h Sun Dec 23 14:34:06 2007
@@ -21,7 +21,6 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/Analysis/Dominators.h"
 #include "llvm/Analysis/DominatorInternals.h"
-#include "llvm/ADT/GraphTraits.h"
 
 namespace llvm {
 
@@ -187,6 +186,9 @@
 /// DominatorTree GraphTraits specialization so the DominatorTree can be
 /// iterable by generic graph iterators.
 ///
+
+template struct GraphTraits;
+
 template <> struct GraphTraits {
   typedef MachineDomTreeNode NodeType;
   typedef NodeType::iterator  ChildIteratorType;




From gordonhenriksen at mac.com  Sun Dec 23 14:58:16 2007
From: gordonhenriksen at mac.com (Gordon Henriksen)
Date: Sun, 23 Dec 2007 20:58:16 -0000
Subject: [llvm-commits] [llvm] r45338 - in /llvm/trunk/lib/Target:
 Mips/MipsTargetAsmInfo.cpp TargetAsmInfo.cpp
Message-ID: <200712232058.lBNKwGLq013205@zion.cs.uiuc.edu>

Author: gordon
Date: Sun Dec 23 14:58:16 2007
New Revision: 45338

URL: http://llvm.org/viewvc/llvm-project?rev=45338&view=rev
Log:
Setting GlobalDirective in TargetAsmInfo by default rather than
providing a misleading facility. It's used once in the MIPS backend
and hardcoded as "\t.globl\t" everywhere else.

Modified:
    llvm/trunk/lib/Target/Mips/MipsTargetAsmInfo.cpp
    llvm/trunk/lib/Target/TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/Mips/MipsTargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetAsmInfo.cpp?rev=45338&r1=45337&r2=45338&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsTargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsTargetAsmInfo.cpp Sun Dec 23 14:58:16 2007
@@ -26,7 +26,6 @@
   ReadOnlySection      = "\t.rdata";
   ZeroDirective        = "\t.space\t";
   BSSSection           = "\t.section\t.bss";
-  GlobalDirective      = "\t.globl\t";
   LCOMMDirective       = "\t.lcomm\t";
 
   if (TM.getRelocationModel() == Reloc::Static)

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=45338&r1=45337&r2=45338&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Sun Dec 23 14:58:16 2007
@@ -67,7 +67,7 @@
   EightByteConstantSection(0),
   SixteenByteConstantSection(0),
   ReadOnlySection(0),
-  GlobalDirective(0),
+  GlobalDirective("\t.globl\t"),
   SetDirective(0),
   LCOMMDirective(0),
   COMMDirective("\t.comm\t"),