From evan.cheng at apple.com Mon Feb 25 02:50:42 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 25 Feb 2008 08:50:42 -0000 Subject: [llvm-commits] [llvm] r47545 - in /llvm/trunk: include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveIntervalAnalysis.cpp Message-ID: <200802250850.m1P8oh4B004041@zion.cs.uiuc.edu> Author: evancheng Date: Mon Feb 25 02:50:41 2008 New Revision: 47545 URL: http://llvm.org/viewvc/llvm-project?rev=47545&view=rev Log: Correctly determine whether a argument load can be folded into its uses. Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=47545&r1=47544&r2=47545&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Mon Feb 25 02:50:41 2008 @@ -348,8 +348,8 @@ /// canFoldMemoryOperand - Return true if the specified load / store /// folding is possible. bool canFoldMemoryOperand(MachineInstr *MI, - SmallVector &Ops) const; - bool canFoldMemoryOperand(MachineInstr *MI, unsigned Reg) const; + SmallVector &Ops, + bool ReMatLoadSS) const; /// anyKillInMBBAfterIdx - Returns true if there is a kill of the specified /// VNInfo that's after the specified index but is within the basic block. Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=47545&r1=47544&r2=47545&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Feb 25 02:50:41 2008 @@ -647,6 +647,9 @@ int FrameIdx = 0; if (tii_->isLoadFromStackSlot(MI, FrameIdx) && mf_->getFrameInfo()->isImmutableObjectIndex(FrameIdx)) + // FIXME: Let target specific isReallyTriviallyReMaterializable determines + // this but remember this is not safe to fold into a two-address + // instruction. // This is a load from fixed stack slot. It can be rematerialized. return true; @@ -695,33 +698,22 @@ return true; } -/// tryFoldMemoryOperand - Attempts to fold either a spill / restore from -/// slot / to reg or any rematerialized load into ith operand of specified -/// MI. If it is successul, MI is updated with the newly created MI and -/// returns true. -bool LiveIntervals::tryFoldMemoryOperand(MachineInstr* &MI, - VirtRegMap &vrm, MachineInstr *DefMI, - unsigned InstrIdx, - SmallVector &Ops, - bool isSS, int Slot, unsigned Reg) { - unsigned MRInfo = 0; +/// FilterFoldedOps - Filter out two-address use operands. Return +/// true if it finds any issue with the operands that ought to prevent +/// folding. +static bool FilterFoldedOps(MachineInstr *MI, + SmallVector &Ops, + unsigned &MRInfo, + SmallVector &FoldOps) { const TargetInstrDesc &TID = MI->getDesc(); - // If it is an implicit def instruction, just delete it. - if (TID.isImplicitDef()) { - RemoveMachineInstrFromMaps(MI); - vrm.RemoveMachineInstrFromMaps(MI); - MI->eraseFromParent(); - ++numFolds; - return true; - } - SmallVector FoldOps; + MRInfo = 0; for (unsigned i = 0, e = Ops.size(); i != e; ++i) { unsigned OpIdx = Ops[i]; MachineOperand &MO = MI->getOperand(OpIdx); // FIXME: fold subreg use. if (MO.getSubReg()) - return false; + return true; if (MO.isDef()) MRInfo |= (unsigned)VirtRegMap::isMod; else { @@ -735,6 +727,35 @@ } FoldOps.push_back(OpIdx); } + return false; +} + + +/// tryFoldMemoryOperand - Attempts to fold either a spill / restore from +/// slot / to reg or any rematerialized load into ith operand of specified +/// MI. If it is successul, MI is updated with the newly created MI and +/// returns true. +bool LiveIntervals::tryFoldMemoryOperand(MachineInstr* &MI, + VirtRegMap &vrm, MachineInstr *DefMI, + unsigned InstrIdx, + SmallVector &Ops, + bool isSS, int Slot, unsigned Reg) { + const TargetInstrDesc &TID = MI->getDesc(); + // If it is an implicit def instruction, just delete it. + if (TID.isImplicitDef()) { + RemoveMachineInstrFromMaps(MI); + vrm.RemoveMachineInstrFromMaps(MI); + MI->eraseFromParent(); + ++numFolds; + return true; + } + + // Filter the list of operand indexes that are to be folded. Abort if + // any operand will prevent folding. + unsigned MRInfo = 0; + SmallVector FoldOps; + if (FilterFoldedOps(MI, Ops, MRInfo, FoldOps)) + return false; // Can't fold a load from fixed stack slot into a two address instruction. if (isSS && DefMI && (MRInfo & VirtRegMap::isMod)) @@ -767,33 +788,19 @@ /// canFoldMemoryOperand - Returns true if the specified load / store /// folding is possible. bool LiveIntervals::canFoldMemoryOperand(MachineInstr *MI, - SmallVector &Ops) const { + SmallVector &Ops, + bool ReMatLoadSS) const { + // Filter the list of operand indexes that are to be folded. Abort if + // any operand will prevent folding. + unsigned MRInfo = 0; SmallVector FoldOps; - for (unsigned i = 0, e = Ops.size(); i != e; ++i) { - unsigned OpIdx = Ops[i]; - // FIXME: fold subreg use. - if (MI->getOperand(OpIdx).getSubReg()) - return false; - FoldOps.push_back(OpIdx); - } + if (FilterFoldedOps(MI, Ops, MRInfo, FoldOps)) + return false; - return tii_->canFoldMemoryOperand(MI, FoldOps); -} + // Can't fold a load from fixed stack slot into a two address instruction. + if (ReMatLoadSS && (MRInfo & VirtRegMap::isMod)) + return false; -bool LiveIntervals::canFoldMemoryOperand(MachineInstr *MI, unsigned Reg) const { - SmallVector FoldOps; - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand& mop = MI->getOperand(i); - if (!mop.isRegister()) - continue; - unsigned UseReg = mop.getReg(); - if (UseReg != Reg) - continue; - // FIXME: fold subreg use. - if (mop.getSubReg()) - return false; - FoldOps.push_back(i); - } return tii_->canFoldMemoryOperand(MI, FoldOps); } @@ -944,7 +951,7 @@ goto RestartInstruction; } } else { - CanFold = canFoldMemoryOperand(MI, Ops); + CanFold = canFoldMemoryOperand(MI, Ops, DefIsReMat && isLoadSS); } } else CanFold = false; From baldrick at free.fr Mon Feb 25 03:16:17 2008 From: baldrick at free.fr (Duncan Sands) Date: Mon, 25 Feb 2008 10:16:17 +0100 Subject: [llvm-commits] [llvm] r47541 - in /llvm/trunk: lib/Transforms/Scalar/GVN.cpp test/Transforms/GVN/2008-02-24-NonDominatedMemcpy.ll test/Transforms/GVN/memcpy.ll In-Reply-To: <200802250040.m1P0egAO015954@zion.cs.uiuc.edu> References: <200802250040.m1P0egAO015954@zion.cs.uiuc.edu> Message-ID: <200802251016.19166.baldrick@free.fr> Hi Owen, > Fix an issue where GVN would try to use an instruction before its definition when performing return slot optimization. doesn't the memcpy+memcpy optimization potentially have the same problem? Ciao, Duncan. From baldrick at free.fr Mon Feb 25 10:21:22 2008 From: baldrick at free.fr (Duncan Sands) Date: Mon, 25 Feb 2008 16:21:22 -0000 Subject: [llvm-commits] [llvm] r47546 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Message-ID: <200802251621.m1PGLMjc016665@zion.cs.uiuc.edu> Author: baldrick Date: Mon Feb 25 10:21:21 2008 New Revision: 47546 URL: http://llvm.org/viewvc/llvm-project?rev=47546&view=rev Log: In debug builds check that the key property holds: all result and operand types are legal. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=47546&r1=47545&r2=47546&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Mon Feb 25 10:21:21 2008 @@ -173,18 +173,36 @@ #ifndef NDEBUG for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(), E = DAG.allnodes_end(); I != E; ++I) { - if (I->getNodeId() == Processed) - continue; - cerr << "Unprocessed node: "; - I->dump(&DAG); cerr << "\n"; - - if (I->getNodeId() == NewNode) - cerr << "New node not 'noticed'?\n"; - else if (I->getNodeId() > 0) - cerr << "Operand not processed?\n"; - else if (I->getNodeId() == ReadyToProcess) - cerr << "Not added to worklist?\n"; - abort(); + bool Failed = false; + + // Check that all result types are legal. + for (unsigned i = 0, NumVals = I->getNumValues(); i < NumVals; ++i) + if (!isTypeLegal(I->getValueType(i))) { + cerr << "Result type " << i << " illegal!\n"; + Failed = true; + } + + // Check that all operand types are legal. + for (unsigned i = 0, NumOps = I->getNumOperands(); i < NumOps; ++i) + if (!isTypeLegal(I->getOperand(i).getValueType())) { + cerr << "Operand type " << i << " illegal!\n"; + Failed = true; + } + + if (I->getNodeId() != Processed) { + if (I->getNodeId() == NewNode) + cerr << "New node not 'noticed'?\n"; + else if (I->getNodeId() > 0) + cerr << "Operand not processed?\n"; + else if (I->getNodeId() == ReadyToProcess) + cerr << "Not added to worklist?\n"; + Failed = true; + } + + if (Failed) { + I->dump(&DAG); cerr << "\n"; + abort(); + } } #endif } From tonic at nondot.org Mon Feb 25 12:11:09 2008 From: tonic at nondot.org (Tanya Lattner) Date: Mon, 25 Feb 2008 12:11:09 -0600 Subject: [llvm-commits] CVS: llvm-www/releases/2.2/llvm-2.2-x86-mingw32.tar.bz2 llvm-gcc4.0-2.2-x86-mingw32.tar.bz2 llvm-gcc4.2-2.2-x86-mingw32.tar.bz2 Message-ID: <200802251811.m1PIB9kw022860@zion.cs.uiuc.edu> Changes in directory llvm-www/releases/2.2: llvm-2.2-x86-mingw32.tar.bz2 added (r1.1) llvm-gcc4.0-2.2-x86-mingw32.tar.bz2 added (r1.1) llvm-gcc4.2-2.2-x86-mingw32.tar.bz2 added (r1.1) --- Log message: Adding mingw tarballs. --- Diffs of the changes: (+0 -0) llvm-2.2-x86-mingw32.tar.bz2 | 0 llvm-gcc4.0-2.2-x86-mingw32.tar.bz2 | 0 llvm-gcc4.2-2.2-x86-mingw32.tar.bz2 | 0 3 files changed Index: llvm-www/releases/2.2/llvm-2.2-x86-mingw32.tar.bz2 Index: llvm-www/releases/2.2/llvm-gcc4.0-2.2-x86-mingw32.tar.bz2 Index: llvm-www/releases/2.2/llvm-gcc4.2-2.2-x86-mingw32.tar.bz2 From clattner at apple.com Mon Feb 25 12:11:14 2008 From: clattner at apple.com (Chris Lattner) Date: Mon, 25 Feb 2008 10:11:14 -0800 Subject: [llvm-commits] [llvm] r47545 - in /llvm/trunk: include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveIntervalAnalysis.cpp In-Reply-To: <200802250850.m1P8oh4B004041@zion.cs.uiuc.edu> References: <200802250850.m1P8oh4B004041@zion.cs.uiuc.edu> Message-ID: <3CEEA21E-6D66-40C5-BEF1-78A0D4AA0EF3@apple.com> On Feb 25, 2008, at 12:50 AM, Evan Cheng wrote: > Author: evancheng > Date: Mon Feb 25 02:50:41 2008 > New Revision: 47545 > > URL: http://llvm.org/viewvc/llvm-project?rev=47545&view=rev > Log: > Correctly determine whether a argument load can be folded into its > uses. Hi Evan, How are argument loads different from any other rematerialized load? -Chris From clattner at apple.com Mon Feb 25 12:34:11 2008 From: clattner at apple.com (Chris Lattner) Date: Mon, 25 Feb 2008 10:34:11 -0800 Subject: [llvm-commits] [llvm] r47508 - in /llvm/trunk: include/llvm/Instructions.h include/llvm/User.h lib/AsmParser/llvmAsmParser.y lib/VMCore/AsmWriter.cpp lib/VMCore/Instructions.cpp lib/VMCore/Verifier.cpp In-Reply-To: <200802230035.m1N0ZJUj026317@zion.cs.uiuc.edu> References: <200802230035.m1N0ZJUj026317@zion.cs.uiuc.edu> Message-ID: <551BC6D8-0B5C-4D90-8D92-21A69959343B@apple.com> > URL: http://llvm.org/viewvc/llvm-project?rev=47508&view=rev > Log: > To support multiple return values, now ret instruction supports > multiple operands instead of one aggregate operand. Some more details: > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/include/llvm/Instructions.h (original) > +++ llvm/trunk/include/llvm/Instructions.h Fri Feb 22 18:35:18 2008 > @@ -1379,9 +1379,9 @@ > /// does not continue in this function any longer. > /// > class ReturnInst : public TerminatorInst { > - Use RetVal; // Return Value: null if 'void'. > ReturnInst(const ReturnInst &RI); > void init(Value *RetVal); > + void init(std::vector &RetVals); I'd suggest deleting the first version of 'init' here, and just use: void init(Value * const *RetVals, unsigned NumRetVals); which allows you to efficiently handle both with one function. > @@ -1397,21 +1397,15 @@ > // if it was passed NULL. > explicit ReturnInst(Value *retVal = 0, Instruction *InsertBefore = > 0); > ReturnInst(Value *retVal, BasicBlock *InsertAtEnd); > + ReturnInst(std::vector &retVals); > + ReturnInst(std::vector &retVals, Instruction > *InsertBefore); > + ReturnInst(std::vector &retVals, BasicBlock *InsertAtEnd); These should all take const vectors by reference. It would also be useful to provide versions that take pointer to pointer + num results to allow clients to use arrays and smallvectors or some other linear container. > Modified: llvm/trunk/lib/VMCore/Instructions.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=47508&r1=47507&r2=47508&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/VMCore/Instructions.cpp (original) > +++ llvm/trunk/lib/VMCore/Instructions.cpp Fri Feb 22 18:35:18 2008 > @@ -573,34 +573,75 @@ > > ReturnInst::ReturnInst(Value *retVal, Instruction *InsertBefore) > - : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, 0, > InsertBefore) { > + : TerminatorInst(Type::VoidTy, Instruction::Ret, OperandList, 0, > InsertBefore) { This should pass up null instead of OperandList. At this point, OperandList is uninitialized and you're initializing it with itself. Likewise for the other ctors. > void ReturnInst::init(Value *retVal) { > if (retVal && retVal->getType() != Type::VoidTy) { This is very strange. I know it's not your fault, but could you check to see whether you can change this to: if (retVal) { assert(retVal->getType() != VoidTy); It doesn't make sense to support passing in a void value to create a void return. > assert(!isa(retVal) && > "Cannot return basic block. Probably using the incorrect > ctor"); > NumOperands = 1; > - RetVal.init(retVal, this); > + Use *OL = OperandList = new Use[1]; > + OL[0].init(retVal, this); As an important optimization for the common case, please put a single 'Use' in the return instruction. It should only be used it if there is one return value: in the case when there are multiple retvals, just ignore it. The old version of ReturnInst did this optimization: in the case of 'ret void' the operand went unused. > +void ReturnInst::init(std::vector &retVals) { As above, please merge the two 'init' methods. > +Value *ReturnInst::getReturnValue(unsigned n) const { This should assert that n < NumOperands, and drop the return of null. If existing clients depend on the return of null behavior, they will need to be updated. Once you do this, this should be moved inline. Also, const methods should return const Value*'s. You'll need to duplicate this into two methods. One that is const and returns const, one that is not const and returns nonconst. > +ReturnInst::~ReturnInst() { > + if (NumOperands) > + delete [] OperandList; > +} This will need to be: if (NumOperands != 1) delete [] OperandList; > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/VMCore/Verifier.cpp (original) > +++ llvm/trunk/lib/VMCore/Verifier.cpp Fri Feb 22 18:35:18 2008 > @@ -576,14 +576,22 @@ > > void Verifier::visitReturnInst(ReturnInst &RI) { > Function *F = RI.getParent()->getParent(); > - if (RI.getNumOperands() == 0) > + unsigned N = RI.getNumOperands(); > + if (N == 0) > Assert2(F->getReturnType() == Type::VoidTy, > "Found return instr that returns void in Function of non- > void " > "return type!", &RI, F->getReturnType()); > - else > + else if (N == 1) > Assert2(F->getReturnType() == RI.getOperand(0)->getType(), > "Function return type does not match operand " > "type of return inst!", &RI, F->getReturnType()); > + else { > + const StructType *STy = cast(F->getReturnType()); This cast assumes that if the return has multiple operands that the function returns multiple results. The verifier should check assumptions like this. > > + for (unsigned i = 0; i < N; i++) You should also check that the number of elements in the struct match up with # return operands. -Chris From tonic at nondot.org Mon Feb 25 12:48:55 2008 From: tonic at nondot.org (Tanya Lattner) Date: Mon, 25 Feb 2008 12:48:55 -0600 Subject: [llvm-commits] CVS: llvm-www/releases/download.html Message-ID: <200802251848.m1PImtGW025285@zion.cs.uiuc.edu> Changes in directory llvm-www/releases: download.html updated: 1.50 -> 1.51 --- Log message: Adding mingw binaries. --- Diffs of the changes: (+3 -0) download.html | 3 +++ 1 files changed, 3 insertions(+) Index: llvm-www/releases/download.html diff -u llvm-www/releases/download.html:1.50 llvm-www/releases/download.html:1.51 --- llvm-www/releases/download.html:1.50 Thu Feb 14 12:58:19 2008 +++ llvm-www/releases/download.html Mon Feb 25 12:48:28 2008 @@ -41,12 +41,15 @@ From evan.cheng at apple.com Mon Feb 25 12:50:42 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 25 Feb 2008 10:50:42 -0800 Subject: [llvm-commits] [llvm] r47545 - in /llvm/trunk: include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveIntervalAnalysis.cpp In-Reply-To: <3CEEA21E-6D66-40C5-BEF1-78A0D4AA0EF3@apple.com> References: <200802250850.m1P8oh4B004041@zion.cs.uiuc.edu> <3CEEA21E-6D66-40C5-BEF1-78A0D4AA0EF3@apple.com> Message-ID: <9D1DEC0A-D5A4-47AD-BE5F-18ACC32B3217@apple.com> There isn't. However it is assigned a *stack slot* and the remat logic was mistaking it for folding a restore / spill. I'll clarify. Evan On Feb 25, 2008, at 10:11 AM, Chris Lattner wrote: > > On Feb 25, 2008, at 12:50 AM, Evan Cheng wrote: > >> Author: evancheng >> Date: Mon Feb 25 02:50:41 2008 >> New Revision: 47545 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=47545&view=rev >> Log: >> Correctly determine whether a argument load can be folded into its >> uses. > > Hi Evan, > > How are argument loads different from any other rematerialized load? > > -Chris > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From gohman at apple.com Mon Feb 25 13:08:02 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 25 Feb 2008 19:08:02 -0000 Subject: [llvm-commits] [llvm] r47552 - /llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Message-ID: <200802251908.m1PJ82oF025809@zion.cs.uiuc.edu> Author: djg Date: Mon Feb 25 13:08:02 2008 New Revision: 47552 URL: http://llvm.org/viewvc/llvm-project?rev=47552&view=rev Log: Add a new method to SDNode/SDOperand named getValueSizeInBits that combines getValueType and MVT::getSizeInBits, since this occurrs frequently. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=47552&r1=47551&r2=47552&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Mon Feb 25 13:08:02 2008 @@ -831,6 +831,12 @@ /// inline MVT::ValueType getValueType() const; + /// getValueSizeInBits - Returns MVT::getSizeInBits(getValueType()). + /// + unsigned getValueSizeInBits() const { + return MVT::getSizeInBits(getValueType()); + } + // Forwarding methods - These forward to the corresponding methods in SDNode. inline unsigned getOpcode() const; inline unsigned getNumOperands() const; @@ -1011,6 +1017,12 @@ return ValueList[ResNo]; } + /// getValueSizeInBits - Returns MVT::getSizeInBits(getValueType(ResNo)). + /// + unsigned getValueSizeInBits(unsigned ResNo) const { + return MVT::getSizeInBits(getValueType(ResNo)); + } + typedef const MVT::ValueType* value_iterator; value_iterator value_begin() const { return ValueList; } value_iterator value_end() const { return ValueList+NumValues; } From clattner at apple.com Mon Feb 25 13:11:32 2008 From: clattner at apple.com (Chris Lattner) Date: Mon, 25 Feb 2008 11:11:32 -0800 Subject: [llvm-commits] [llvm] r47545 - in /llvm/trunk: include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveIntervalAnalysis.cpp In-Reply-To: <9D1DEC0A-D5A4-47AD-BE5F-18ACC32B3217@apple.com> References: <200802250850.m1P8oh4B004041@zion.cs.uiuc.edu> <3CEEA21E-6D66-40C5-BEF1-78A0D4AA0EF3@apple.com> <9D1DEC0A-D5A4-47AD-BE5F-18ACC32B3217@apple.com> Message-ID: On Feb 25, 2008, at 10:50 AM, Evan Cheng wrote: > There isn't. However it is assigned a *stack slot* and the remat logic > was mistaking it for folding a restore / spill. I'll clarify. Ah ok! At some point we will want to remat other random loads (which might be from stack slots), so please make sure this isn't specific just to argument loads. I'm thinking of the FFT example in bugzilla. -Chris From dalej at apple.com Mon Feb 25 13:20:14 2008 From: dalej at apple.com (Dale Johannesen) Date: Mon, 25 Feb 2008 19:20:14 -0000 Subject: [llvm-commits] [llvm] r47554 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200802251920.m1PJKFO9026290@zion.cs.uiuc.edu> Author: johannes Date: Mon Feb 25 13:20:14 2008 New Revision: 47554 URL: http://llvm.org/viewvc/llvm-project?rev=47554&view=rev Log: Expand removal of MMX memory copies to allow 1 level of TokenFactor underneath chain (seems to be enough) Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47554&r1=47553&r2=47554&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Feb 25 13:20:14 2008 @@ -5878,50 +5878,86 @@ const X86Subtarget *Subtarget) { // Turn load->store of MMX types into GPR load/stores. This avoids clobbering // the FP state in cases where an emms may be missing. + // A preferable solution to the general problem is to figure out the right + // places to insert EMMS. This qualifies as a quick hack. if (MVT::isVector(St->getValue().getValueType()) && MVT::getSizeInBits(St->getValue().getValueType()) == 64 && - // Must be a store of a load. - isa(St->getChain()) && - St->getChain().Val == St->getValue().Val && - St->getValue().hasOneUse() && St->getChain().hasOneUse() && - !St->isVolatile() && !cast(St->getChain())->isVolatile()) { - LoadSDNode *Ld = cast(St->getChain()); - - // If we are a 64-bit capable x86, lower to a single movq load/store pair. - if (Subtarget->is64Bit()) { - SDOperand NewLd = DAG.getLoad(MVT::i64, Ld->getChain(), Ld->getBasePtr(), - Ld->getSrcValue(), Ld->getSrcValueOffset(), - Ld->isVolatile(), Ld->getAlignment()); - return DAG.getStore(NewLd.getValue(1), NewLd, St->getBasePtr(), + isa(St->getValue()) && + !cast(St->getValue())->isVolatile() && + St->getChain().hasOneUse() && !St->isVolatile()) { + LoadSDNode *Ld = 0; + int TokenFactorIndex = -1; + SmallVector Ops; + SDNode* ChainVal = St->getChain().Val; + // Must be a store of a load. We currently handle two cases: the load + // is a direct child, and it's under an intervening TokenFactor. It is + // possible to dig deeper under nested TokenFactors. + if (ChainVal == St->getValue().Val) + Ld = cast(St->getChain()); + else if (St->getValue().hasOneUse() && + ChainVal->getOpcode() == ISD::TokenFactor) { + for (unsigned i=0, e = ChainVal->getNumOperands(); i != e; ++i) { + if (ChainVal->getOperand(i).Val == St->getValue().Val) { + if (TokenFactorIndex != -1) + return SDOperand(); + TokenFactorIndex = i; + Ld = cast(St->getValue()); + } else + Ops.push_back(ChainVal->getOperand(i)); + } + } + if (Ld) { + // If we are a 64-bit capable x86, lower to a single movq load/store pair. + if (Subtarget->is64Bit()) { + SDOperand NewLd = DAG.getLoad(MVT::i64, Ld->getChain(), + Ld->getBasePtr(), Ld->getSrcValue(), + Ld->getSrcValueOffset(), Ld->isVolatile(), + Ld->getAlignment()); + SDOperand NewChain = NewLd.getValue(1); + if (TokenFactorIndex != -1) { + Ops.push_back(NewLd); + NewChain = DAG.getNode(ISD::TokenFactor, MVT::Other, &Ops[0], + Ops.size()); + } + return DAG.getStore(NewChain, NewLd, St->getBasePtr(), + St->getSrcValue(), St->getSrcValueOffset(), + St->isVolatile(), St->getAlignment()); + } + + // Otherwise, lower to two 32-bit copies. + SDOperand LoAddr = Ld->getBasePtr(); + SDOperand HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, + DAG.getConstant(MVT::i32, 4)); + + SDOperand LoLd = DAG.getLoad(MVT::i32, Ld->getChain(), LoAddr, + Ld->getSrcValue(), Ld->getSrcValueOffset(), + Ld->isVolatile(), Ld->getAlignment()); + SDOperand HiLd = DAG.getLoad(MVT::i32, Ld->getChain(), HiAddr, + Ld->getSrcValue(), Ld->getSrcValueOffset()+4, + Ld->isVolatile(), + MinAlign(Ld->getAlignment(), 4)); + + SDOperand NewChain = LoLd.getValue(1); + if (TokenFactorIndex != -1) { + Ops.push_back(LoLd); + Ops.push_back(HiLd); + NewChain = DAG.getNode(ISD::TokenFactor, MVT::Other, &Ops[0], + Ops.size()); + } + + LoAddr = St->getBasePtr(); + HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, + DAG.getConstant(MVT::i32, 4)); + + SDOperand LoSt = DAG.getStore(NewChain, LoLd, LoAddr, St->getSrcValue(), St->getSrcValueOffset(), St->isVolatile(), St->getAlignment()); + SDOperand HiSt = DAG.getStore(NewChain, HiLd, HiAddr, + St->getSrcValue(), St->getSrcValueOffset()+4, + St->isVolatile(), + MinAlign(St->getAlignment(), 4)); + return DAG.getNode(ISD::TokenFactor, MVT::Other, LoSt, HiSt); } - - // Otherwise, lower to two 32-bit copies. - SDOperand LoAddr = Ld->getBasePtr(); - SDOperand HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, - DAG.getConstant(MVT::i32, 4)); - - SDOperand LoLd = DAG.getLoad(MVT::i32, Ld->getChain(), LoAddr, - Ld->getSrcValue(), Ld->getSrcValueOffset(), - Ld->isVolatile(), Ld->getAlignment()); - SDOperand HiLd = DAG.getLoad(MVT::i32, Ld->getChain(), HiAddr, - Ld->getSrcValue(), Ld->getSrcValueOffset()+4, - Ld->isVolatile(), - MinAlign(Ld->getAlignment(), 4)); - - LoAddr = St->getBasePtr(); - HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, - DAG.getConstant(MVT::i32, 4)); - - SDOperand LoSt = DAG.getStore(LoLd.getValue(1), LoLd, LoAddr, - St->getSrcValue(), St->getSrcValueOffset(), - St->isVolatile(), St->getAlignment()); - SDOperand HiSt = DAG.getStore(HiLd.getValue(1), HiLd, HiAddr, - St->getSrcValue(), St->getSrcValueOffset()+4, - St->isVolatile(), - MinAlign(St->getAlignment(), 4)); - return DAG.getNode(ISD::TokenFactor, MVT::Other, LoSt, HiSt); } return SDOperand(); } From sabre at nondot.org Mon Feb 25 13:20:57 2008 From: sabre at nondot.org (Chris Lattner) Date: Mon, 25 Feb 2008 19:20:57 -0000 Subject: [llvm-commits] [llvm] r47555 - /llvm/trunk/include/llvm/ParameterAttributes.h Message-ID: <200802251920.m1PJKwri026320@zion.cs.uiuc.edu> Author: lattner Date: Mon Feb 25 13:20:57 2008 New Revision: 47555 URL: http://llvm.org/viewvc/llvm-project?rev=47555&view=rev Log: make this self contained. Modified: llvm/trunk/include/llvm/ParameterAttributes.h Modified: llvm/trunk/include/llvm/ParameterAttributes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ParameterAttributes.h?rev=47555&r1=47554&r2=47555&view=diff ============================================================================== --- llvm/trunk/include/llvm/ParameterAttributes.h (original) +++ llvm/trunk/include/llvm/ParameterAttributes.h Mon Feb 25 13:20:57 2008 @@ -15,6 +15,7 @@ #ifndef LLVM_PARAMETER_ATTRIBUTES_H #define LLVM_PARAMETER_ATTRIBUTES_H +#include "llvm/Support/DataTypes.h" #include namespace llvm { From sabre at nondot.org Mon Feb 25 13:21:38 2008 From: sabre at nondot.org (Chris Lattner) Date: Mon, 25 Feb 2008 19:21:38 -0000 Subject: [llvm-commits] [llvm] r47556 - in /llvm/trunk/include/llvm: ParamAttrsList.h Transforms/Utils/BasicBlockUtils.h Message-ID: <200802251921.m1PJLc4C026353@zion.cs.uiuc.edu> Author: lattner Date: Mon Feb 25 13:21:38 2008 New Revision: 47556 URL: http://llvm.org/viewvc/llvm-project?rev=47556&view=rev Log: prune #includes, fit in 80 cols. Modified: llvm/trunk/include/llvm/ParamAttrsList.h llvm/trunk/include/llvm/Transforms/Utils/BasicBlockUtils.h Modified: llvm/trunk/include/llvm/ParamAttrsList.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ParamAttrsList.h?rev=47556&r1=47555&r2=47556&view=diff ============================================================================== --- llvm/trunk/include/llvm/ParamAttrsList.h (original) +++ llvm/trunk/include/llvm/ParamAttrsList.h Mon Feb 25 13:21:38 2008 @@ -10,17 +10,16 @@ // This file contains classes used to represent the parameter attributes // associated with functions and their calls. // -// The implementation of ParamAttrsList is in lib/VMCore/ParameterAttributes.cpp. +// The implementation of ParamAttrsList is in VMCore/ParameterAttributes.cpp. // //===----------------------------------------------------------------------===// #ifndef LLVM_PARAM_ATTRS_LIST_H #define LLVM_PARAM_ATTRS_LIST_H +#include "llvm/ParameterAttributes.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/FoldingSet.h" -#include "llvm/ParameterAttributes.h" -#include namespace llvm { Modified: llvm/trunk/include/llvm/Transforms/Utils/BasicBlockUtils.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Utils/BasicBlockUtils.h?rev=47556&r1=47555&r2=47556&view=diff ============================================================================== --- llvm/trunk/include/llvm/Transforms/Utils/BasicBlockUtils.h (original) +++ llvm/trunk/include/llvm/Transforms/Utils/BasicBlockUtils.h Mon Feb 25 13:21:38 2008 @@ -61,9 +61,11 @@ bool AllowIdenticalEdges = false); /// SplitCriticalEdge - If this edge is a critical edge, insert a new node to -/// split the critical edge. This will update DominatorTree, and DominatorFrontier -/// information if it is available, thus calling this pass will not invalidate -/// either of them. This returns true if the edge was split, false otherwise. +/// split the critical edge. This will update DominatorTree and +/// DominatorFrontier information if it is available, thus calling this pass +/// will not invalidate either of them. This returns true if the edge was split, +/// false otherwise. +/// /// If MergeIdenticalEdges is true (the default), *all* edges from TI to the /// specified successor will be merged into the same critical edge block. /// This is most commonly interesting with switch instructions, which may From evan.cheng at apple.com Mon Feb 25 13:21:33 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 25 Feb 2008 11:21:33 -0800 Subject: [llvm-commits] [llvm] r47545 - in /llvm/trunk: include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveIntervalAnalysis.cpp In-Reply-To: References: <200802250850.m1P8oh4B004041@zion.cs.uiuc.edu> <3CEEA21E-6D66-40C5-BEF1-78A0D4AA0EF3@apple.com> <9D1DEC0A-D5A4-47AD-BE5F-18ACC32B3217@apple.com> Message-ID: We *are* remating other loads. Evan On Feb 25, 2008, at 11:11 AM, Chris Lattner wrote: > On Feb 25, 2008, at 10:50 AM, Evan Cheng wrote: >> There isn't. However it is assigned a *stack slot* and the remat >> logic >> was mistaking it for folding a restore / spill. I'll clarify. > > Ah ok! At some point we will want to remat other random loads (which > might be from stack slots), so please make sure this isn't specific > just to argument loads. I'm thinking of the FFT example in bugzilla. > > -Chris > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Mon Feb 25 13:21:56 2008 From: clattner at apple.com (Chris Lattner) Date: Mon, 25 Feb 2008 11:21:56 -0800 Subject: [llvm-commits] [llvm] r47504 - in /llvm/trunk: include/llvm/ lib/AsmParser/ lib/Bitcode/Reader/ lib/Bitcode/Writer/ lib/Target/CBackend/ lib/Target/X86/ lib/Transforms/IPO/ lib/Transforms/Scalar/ lib/VMCore/ tools/llvm-upgrade/ tools/llvm2cpp/ In-Reply-To: <200802222218.m1MMI0gJ022349@zion.cs.uiuc.edu> References: <200802222218.m1MMI0gJ022349@zion.cs.uiuc.edu> Message-ID: <77CCAD6A-181D-4DCD-9886-CCD3459576BA@apple.com> On Feb 22, 2008, at 2:17 PM, Dale Johannesen wrote: > Author: johannes > Date: Fri Feb 22 16:17:59 2008 > New Revision: 47504 > > URL: http://llvm.org/viewvc/llvm-project?rev=47504&view=rev > Log: > Split ParameterAttributes.h, putting the complicated > stuff into ParamAttrsList.h. Per feedback from > ParamAttrs changes. Thanks Dale, I appreciate it, -Chris From evan.cheng at apple.com Mon Feb 25 13:24:01 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 25 Feb 2008 19:24:01 -0000 Subject: [llvm-commits] [llvm] r47557 - /llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Message-ID: <200802251924.m1PJO1Tc026426@zion.cs.uiuc.edu> Author: evancheng Date: Mon Feb 25 13:24:01 2008 New Revision: 47557 URL: http://llvm.org/viewvc/llvm-project?rev=47557&view=rev Log: All remat'ed loads cannot be folded into two-address code. Not just argument loads. This change doesn't really have any impact on codegen. Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=47557&r1=47556&r2=47557&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Feb 25 13:24:01 2008 @@ -789,7 +789,7 @@ /// folding is possible. bool LiveIntervals::canFoldMemoryOperand(MachineInstr *MI, SmallVector &Ops, - bool ReMatLoadSS) const { + bool ReMatLoad) const { // Filter the list of operand indexes that are to be folded. Abort if // any operand will prevent folding. unsigned MRInfo = 0; @@ -797,8 +797,8 @@ if (FilterFoldedOps(MI, Ops, MRInfo, FoldOps)) return false; - // Can't fold a load from fixed stack slot into a two address instruction. - if (ReMatLoadSS && (MRInfo & VirtRegMap::isMod)) + // Can't fold a remat'ed load into a two address instruction. + if (ReMatLoad && (MRInfo & VirtRegMap::isMod)) return false; return tii_->canFoldMemoryOperand(MI, FoldOps); @@ -951,7 +951,7 @@ goto RestartInstruction; } } else { - CanFold = canFoldMemoryOperand(MI, Ops, DefIsReMat && isLoadSS); + CanFold = canFoldMemoryOperand(MI, Ops, DefIsReMat && isLoad); } } else CanFold = false; From clattner at apple.com Mon Feb 25 13:24:31 2008 From: clattner at apple.com (Chris Lattner) Date: Mon, 25 Feb 2008 11:24:31 -0800 Subject: [llvm-commits] [llvm] r47545 - in /llvm/trunk: include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveIntervalAnalysis.cpp In-Reply-To: References: <200802250850.m1P8oh4B004041@zion.cs.uiuc.edu> <3CEEA21E-6D66-40C5-BEF1-78A0D4AA0EF3@apple.com> <9D1DEC0A-D5A4-47AD-BE5F-18ACC32B3217@apple.com> Message-ID: On Feb 25, 2008, at 11:21 AM, Evan Cheng wrote: > We *are* remating other loads. The case I was thinking of was: tmp = load P add add use (tmp) add add use (tmp) to: add add tmp = load P use (tmp) add add tmp2 = load P use (tmp2) Which is safe for an arbitrary non-volatile load as long as there isn't a store that might alias P between the original load and the uses. As long as we can eventually handle this, I'm happy ;-) -Chris > > > Evan > > On Feb 25, 2008, at 11:11 AM, Chris Lattner wrote: > >> On Feb 25, 2008, at 10:50 AM, Evan Cheng wrote: >>> There isn't. However it is assigned a *stack slot* and the remat >>> logic >>> was mistaking it for folding a restore / spill. I'll clarify. >> >> Ah ok! At some point we will want to remat other random loads (which >> might be from stack slots), so please make sure this isn't specific >> just to argument loads. I'm thinking of the FFT example in bugzilla. >> >> -Chris >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From sabre at nondot.org Mon Feb 25 13:31:21 2008 From: sabre at nondot.org (Chris Lattner) Date: Mon, 25 Feb 2008 19:31:21 -0000 Subject: [llvm-commits] [llvm] r47558 - /llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Message-ID: <200802251931.m1PJVLrp026643@zion.cs.uiuc.edu> Author: lattner Date: Mon Feb 25 13:31:21 2008 New Revision: 47558 URL: http://llvm.org/viewvc/llvm-project?rev=47558&view=rev Log: add LSBaseSDNode::getOffset at Dan's request. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=47558&r1=47557&r2=47558&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Mon Feb 25 13:31:21 2008 @@ -1638,6 +1638,9 @@ const SDOperand &getBasePtr() const { return getOperand(getOpcode() == ISD::LOAD ? 1 : 2); } + const SDOperand &getOffset() const { + return getOperand(getOpcode() == ISD::LOAD ? 2 : 3); + } const Value *getSrcValue() const { return SrcValue; } int getSrcValueOffset() const { return SVOffset; } From evan.cheng at apple.com Mon Feb 25 13:44:23 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 25 Feb 2008 11:44:23 -0800 Subject: [llvm-commits] [llvm] r47554 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <200802251920.m1PJKFO9026290@zion.cs.uiuc.edu> References: <200802251920.m1PJKFO9026290@zion.cs.uiuc.edu> Message-ID: On Feb 25, 2008, at 11:20 AM, Dale Johannesen wrote: > const X86Subtarget *Subtarget) { > > + // Must be a store of a load. We currently handle two cases: > the load > + // is a direct child, and it's under an intervening > TokenFactor. It is > + // possible to dig deeper under nested TokenFactors. > + if (ChainVal == St->getValue().Val) > + Ld = cast(St->getChain()); I'm not sure how safe this is. It can be storing a value produced by any chain producing node. Can it be a CopyFromReg? Evan > > + else if (St->getValue().hasOneUse() && > + ChainVal->getOpcode() == ISD::TokenFactor) { > + for (unsigned i=0, e = ChainVal->getNumOperands(); i != e; + > +i) { > + if (ChainVal->getOperand(i).Val == St->getValue().Val) { > + if (TokenFactorIndex != -1) > + return SDOperand(); > + TokenFactorIndex = i; > + Ld = cast(St->getValue()); > + } else > + Ops.push_back(ChainVal->getOperand(i)); > + } > + } > + if (Ld) { > + // If we are a 64-bit capable x86, lower to a single movq > load/store pair. > + if (Subtarget->is64Bit()) { > + SDOperand NewLd = DAG.getLoad(MVT::i64, Ld->getChain(), > + Ld->getBasePtr(), Ld- > >getSrcValue(), > + Ld->getSrcValueOffset(), Ld- > >isVolatile(), > + Ld->getAlignment()); > + SDOperand NewChain = NewLd.getValue(1); > + if (TokenFactorIndex != -1) { > + Ops.push_back(NewLd); > + NewChain = DAG.getNode(ISD::TokenFactor, MVT::Other, > &Ops[0], > + Ops.size()); > + } > + return DAG.getStore(NewChain, NewLd, St->getBasePtr(), > + St->getSrcValue(), St- > >getSrcValueOffset(), > + St->isVolatile(), St->getAlignment()); > + } > + > + // Otherwise, lower to two 32-bit copies. > + SDOperand LoAddr = Ld->getBasePtr(); > + SDOperand HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, > + DAG.getConstant(MVT::i32, 4)); > + > + SDOperand LoLd = DAG.getLoad(MVT::i32, Ld->getChain(), LoAddr, > + Ld->getSrcValue(), Ld- > >getSrcValueOffset(), > + Ld->isVolatile(), Ld- > >getAlignment()); > + SDOperand HiLd = DAG.getLoad(MVT::i32, Ld->getChain(), HiAddr, > + Ld->getSrcValue(), Ld- > >getSrcValueOffset()+4, > + Ld->isVolatile(), > + MinAlign(Ld->getAlignment(), 4)); > + > + SDOperand NewChain = LoLd.getValue(1); > + if (TokenFactorIndex != -1) { > + Ops.push_back(LoLd); > + Ops.push_back(HiLd); > + NewChain = DAG.getNode(ISD::TokenFactor, MVT::Other, &Ops[0], > + Ops.size()); > + } > + > + LoAddr = St->getBasePtr(); > + HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, > + DAG.getConstant(MVT::i32, 4)); > + > + SDOperand LoSt = DAG.getStore(NewChain, LoLd, LoAddr, > St->getSrcValue(), St->getSrcValueOffset(), > St->isVolatile(), St->getAlignment()); > + SDOperand HiSt = DAG.getStore(NewChain, HiLd, HiAddr, > + St->getSrcValue(), St- > >getSrcValueOffset()+4, > + St->isVolatile(), > + MinAlign(St->getAlignment(), 4)); > + return DAG.getNode(ISD::TokenFactor, MVT::Other, LoSt, HiSt); > } > - > - // Otherwise, lower to two 32-bit copies. > - SDOperand LoAddr = Ld->getBasePtr(); > - SDOperand HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, > - DAG.getConstant(MVT::i32, 4)); > - > - SDOperand LoLd = DAG.getLoad(MVT::i32, Ld->getChain(), LoAddr, > - Ld->getSrcValue(), Ld- > >getSrcValueOffset(), > - Ld->isVolatile(), Ld- > >getAlignment()); > - SDOperand HiLd = DAG.getLoad(MVT::i32, Ld->getChain(), HiAddr, > - Ld->getSrcValue(), Ld- > >getSrcValueOffset()+4, > - Ld->isVolatile(), > - MinAlign(Ld->getAlignment(), 4)); > - > - LoAddr = St->getBasePtr(); > - HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, > - DAG.getConstant(MVT::i32, 4)); > - > - SDOperand LoSt = DAG.getStore(LoLd.getValue(1), LoLd, LoAddr, > - St->getSrcValue(), St->getSrcValueOffset(), > - St->isVolatile(), St->getAlignment()); > - SDOperand HiSt = DAG.getStore(HiLd.getValue(1), HiLd, HiAddr, > - St->getSrcValue(), St- > >getSrcValueOffset()+4, > - St->isVolatile(), > - MinAlign(St->getAlignment(), 4)); > - return DAG.getNode(ISD::TokenFactor, MVT::Other, LoSt, HiSt); > } > return SDOperand(); > } > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dalej at apple.com Mon Feb 25 13:49:05 2008 From: dalej at apple.com (Dale Johannesen) Date: Mon, 25 Feb 2008 11:49:05 -0800 Subject: [llvm-commits] [llvm] r47554 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: References: <200802251920.m1PJKFO9026290@zion.cs.uiuc.edu> Message-ID: On Feb 25, 2008, at 11:44 AM, Evan Cheng wrote: > > On Feb 25, 2008, at 11:20 AM, Dale Johannesen wrote: > >> const X86Subtarget *Subtarget) { >> >> + // Must be a store of a load. We currently handle two cases: >> the load >> + // is a direct child, and it's under an intervening >> TokenFactor. It is >> + // possible to dig deeper under nested TokenFactors. >> + if (ChainVal == St->getValue().Val) >> + Ld = cast(St->getChain()); > > I'm not sure how safe this is. It can be storing a value produced by > any chain producing node. Can it be a CopyFromReg? > > Evan It is checked above that St->getValue() is a load. Is that not enough? >> + else if (St->getValue().hasOneUse() && >> + ChainVal->getOpcode() == ISD::TokenFactor) { >> + for (unsigned i=0, e = ChainVal->getNumOperands(); i != e; + >> +i) { >> + if (ChainVal->getOperand(i).Val == St->getValue().Val) { >> + if (TokenFactorIndex != -1) >> + return SDOperand(); >> + TokenFactorIndex = i; >> + Ld = cast(St->getValue()); >> + } else >> + Ops.push_back(ChainVal->getOperand(i)); >> + } >> + } >> + if (Ld) { >> + // If we are a 64-bit capable x86, lower to a single movq >> load/store pair. >> + if (Subtarget->is64Bit()) { >> + SDOperand NewLd = DAG.getLoad(MVT::i64, Ld->getChain(), >> + Ld->getBasePtr(), Ld- >>> getSrcValue(), >> + Ld->getSrcValueOffset(), Ld- >>> isVolatile(), >> + Ld->getAlignment()); >> + SDOperand NewChain = NewLd.getValue(1); >> + if (TokenFactorIndex != -1) { >> + Ops.push_back(NewLd); >> + NewChain = DAG.getNode(ISD::TokenFactor, MVT::Other, >> &Ops[0], >> + Ops.size()); >> + } >> + return DAG.getStore(NewChain, NewLd, St->getBasePtr(), >> + St->getSrcValue(), St- >>> getSrcValueOffset(), >> + St->isVolatile(), St->getAlignment()); >> + } >> + >> + // Otherwise, lower to two 32-bit copies. >> + SDOperand LoAddr = Ld->getBasePtr(); >> + SDOperand HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, >> + DAG.getConstant(MVT::i32, 4)); >> + >> + SDOperand LoLd = DAG.getLoad(MVT::i32, Ld->getChain(), LoAddr, >> + Ld->getSrcValue(), Ld- >>> getSrcValueOffset(), >> + Ld->isVolatile(), Ld- >>> getAlignment()); >> + SDOperand HiLd = DAG.getLoad(MVT::i32, Ld->getChain(), HiAddr, >> + Ld->getSrcValue(), Ld- >>> getSrcValueOffset()+4, >> + Ld->isVolatile(), >> + MinAlign(Ld->getAlignment(), 4)); >> + >> + SDOperand NewChain = LoLd.getValue(1); >> + if (TokenFactorIndex != -1) { >> + Ops.push_back(LoLd); >> + Ops.push_back(HiLd); >> + NewChain = DAG.getNode(ISD::TokenFactor, MVT::Other, >> &Ops[0], >> + Ops.size()); >> + } >> + >> + LoAddr = St->getBasePtr(); >> + HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, >> + DAG.getConstant(MVT::i32, 4)); >> + >> + SDOperand LoSt = DAG.getStore(NewChain, LoLd, LoAddr, >> St->getSrcValue(), St->getSrcValueOffset(), >> St->isVolatile(), St->getAlignment()); >> + SDOperand HiSt = DAG.getStore(NewChain, HiLd, HiAddr, >> + St->getSrcValue(), St- >>> getSrcValueOffset()+4, >> + St->isVolatile(), >> + MinAlign(St->getAlignment(), >> 4)); >> + return DAG.getNode(ISD::TokenFactor, MVT::Other, LoSt, HiSt); >> } >> - >> - // Otherwise, lower to two 32-bit copies. >> - SDOperand LoAddr = Ld->getBasePtr(); >> - SDOperand HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, >> - DAG.getConstant(MVT::i32, 4)); >> - >> - SDOperand LoLd = DAG.getLoad(MVT::i32, Ld->getChain(), LoAddr, >> - Ld->getSrcValue(), Ld- >>> getSrcValueOffset(), >> - Ld->isVolatile(), Ld- >>> getAlignment()); >> - SDOperand HiLd = DAG.getLoad(MVT::i32, Ld->getChain(), HiAddr, >> - Ld->getSrcValue(), Ld- >>> getSrcValueOffset()+4, >> - Ld->isVolatile(), >> - MinAlign(Ld->getAlignment(), 4)); >> - >> - LoAddr = St->getBasePtr(); >> - HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, >> - DAG.getConstant(MVT::i32, 4)); >> - >> - SDOperand LoSt = DAG.getStore(LoLd.getValue(1), LoLd, LoAddr, >> - St->getSrcValue(), St->getSrcValueOffset(), >> - St->isVolatile(), St->getAlignment()); >> - SDOperand HiSt = DAG.getStore(HiLd.getValue(1), HiLd, HiAddr, >> - St->getSrcValue(), St- >>> getSrcValueOffset()+4, >> - St->isVolatile(), >> - MinAlign(St->getAlignment(), 4)); >> - return DAG.getNode(ISD::TokenFactor, MVT::Other, LoSt, HiSt); >> } >> return SDOperand(); >> } >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Mon Feb 25 13:52:31 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 25 Feb 2008 11:52:31 -0800 Subject: [llvm-commits] [llvm] r47554 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <200802251920.m1PJKFO9026290@zion.cs.uiuc.edu> References: <200802251920.m1PJKFO9026290@zion.cs.uiuc.edu> Message-ID: <2BA5497C-BA9C-49A2-A7B9-A3BF4D2EB654@apple.com> On Feb 25, 2008, at 11:20 AM, Dale Johannesen wrote: > Author: johannes > Date: Mon Feb 25 13:20:14 2008 > New Revision: 47554 > > URL: http://llvm.org/viewvc/llvm-project?rev=47554&view=rev > Log: > Expand removal of MMX memory copies to allow 1 level > of TokenFactor underneath chain (seems to be enough) > > > Modified: > llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47554&r1=47553&r2=47554&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Feb 25 > 13:20:14 2008 > @@ -5878,50 +5878,86 @@ > const X86Subtarget *Subtarget) { > // Turn load->store of MMX types into GPR load/stores. This > avoids clobbering > // the FP state in cases where an emms may be missing. > + // A preferable solution to the general problem is to figure out > the right > + // places to insert EMMS. This qualifies as a quick hack. > if (MVT::isVector(St->getValue().getValueType()) && > MVT::getSizeInBits(St->getValue().getValueType()) == 64 && > - // Must be a store of a load. > - isa(St->getChain()) && > - St->getChain().Val == St->getValue().Val && > - St->getValue().hasOneUse() && St->getChain().hasOneUse() && > - !St->isVolatile() && !cast(St->getChain())- > >isVolatile()) { > - LoadSDNode *Ld = cast(St->getChain()); > - > - // If we are a 64-bit capable x86, lower to a single movq load/ > store pair. > - if (Subtarget->is64Bit()) { > - SDOperand NewLd = DAG.getLoad(MVT::i64, Ld->getChain(), Ld- > >getBasePtr(), > - Ld->getSrcValue(), Ld- > >getSrcValueOffset(), > - Ld->isVolatile(), Ld- > >getAlignment()); > - return DAG.getStore(NewLd.getValue(1), NewLd, St->getBasePtr(), > + isa(St->getValue()) && > + !cast(St->getValue())->isVolatile() && > + St->getChain().hasOneUse() && !St->isVolatile()) { > + LoadSDNode *Ld = 0; > + int TokenFactorIndex = -1; > + SmallVector Ops; > + SDNode* ChainVal = St->getChain().Val; > + // Must be a store of a load. We currently handle two cases: > the load > + // is a direct child, and it's under an intervening > TokenFactor. It is > + // possible to dig deeper under nested TokenFactors. > + if (ChainVal == St->getValue().Val) > + Ld = cast(St->getChain()); > + else if (St->getValue().hasOneUse() && > + ChainVal->getOpcode() == ISD::TokenFactor) { > + for (unsigned i=0, e = ChainVal->getNumOperands(); i != e; + > +i) { > + if (ChainVal->getOperand(i).Val == St->getValue().Val) { > + if (TokenFactorIndex != -1) > + return SDOperand(); Is it necessary to abort the optimization here? You are creating a new TokenFactor node below, right? Why not just trim it? Perhaps SelectionDAG::getNode should ensure TokenFactor nodes do have duplicate operands? Evan > > + TokenFactorIndex = i; > + Ld = cast(St->getValue()); > + } else > + Ops.push_back(ChainVal->getOperand(i)); > + } > + } > + if (Ld) { > + // If we are a 64-bit capable x86, lower to a single movq > load/store pair. > + if (Subtarget->is64Bit()) { > + SDOperand NewLd = DAG.getLoad(MVT::i64, Ld->getChain(), > + Ld->getBasePtr(), Ld- > >getSrcValue(), > + Ld->getSrcValueOffset(), Ld- > >isVolatile(), > + Ld->getAlignment()); > + SDOperand NewChain = NewLd.getValue(1); > + if (TokenFactorIndex != -1) { > + Ops.push_back(NewLd); > + NewChain = DAG.getNode(ISD::TokenFactor, MVT::Other, > &Ops[0], > + Ops.size()); > + } > + return DAG.getStore(NewChain, NewLd, St->getBasePtr(), > + St->getSrcValue(), St- > >getSrcValueOffset(), > + St->isVolatile(), St->getAlignment()); > + } > + > + // Otherwise, lower to two 32-bit copies. > + SDOperand LoAddr = Ld->getBasePtr(); > + SDOperand HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, > + DAG.getConstant(MVT::i32, 4)); > + > + SDOperand LoLd = DAG.getLoad(MVT::i32, Ld->getChain(), LoAddr, > + Ld->getSrcValue(), Ld- > >getSrcValueOffset(), > + Ld->isVolatile(), Ld- > >getAlignment()); > + SDOperand HiLd = DAG.getLoad(MVT::i32, Ld->getChain(), HiAddr, > + Ld->getSrcValue(), Ld- > >getSrcValueOffset()+4, > + Ld->isVolatile(), > + MinAlign(Ld->getAlignment(), 4)); > + > + SDOperand NewChain = LoLd.getValue(1); > + if (TokenFactorIndex != -1) { > + Ops.push_back(LoLd); > + Ops.push_back(HiLd); > + NewChain = DAG.getNode(ISD::TokenFactor, MVT::Other, &Ops[0], > + Ops.size()); > + } > + > + LoAddr = St->getBasePtr(); > + HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, > + DAG.getConstant(MVT::i32, 4)); > + > + SDOperand LoSt = DAG.getStore(NewChain, LoLd, LoAddr, > St->getSrcValue(), St->getSrcValueOffset(), > St->isVolatile(), St->getAlignment()); > + SDOperand HiSt = DAG.getStore(NewChain, HiLd, HiAddr, > + St->getSrcValue(), St- > >getSrcValueOffset()+4, > + St->isVolatile(), > + MinAlign(St->getAlignment(), 4)); > + return DAG.getNode(ISD::TokenFactor, MVT::Other, LoSt, HiSt); > } > - > - // Otherwise, lower to two 32-bit copies. > - SDOperand LoAddr = Ld->getBasePtr(); > - SDOperand HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, > - DAG.getConstant(MVT::i32, 4)); > - > - SDOperand LoLd = DAG.getLoad(MVT::i32, Ld->getChain(), LoAddr, > - Ld->getSrcValue(), Ld- > >getSrcValueOffset(), > - Ld->isVolatile(), Ld- > >getAlignment()); > - SDOperand HiLd = DAG.getLoad(MVT::i32, Ld->getChain(), HiAddr, > - Ld->getSrcValue(), Ld- > >getSrcValueOffset()+4, > - Ld->isVolatile(), > - MinAlign(Ld->getAlignment(), 4)); > - > - LoAddr = St->getBasePtr(); > - HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, > - DAG.getConstant(MVT::i32, 4)); > - > - SDOperand LoSt = DAG.getStore(LoLd.getValue(1), LoLd, LoAddr, > - St->getSrcValue(), St->getSrcValueOffset(), > - St->isVolatile(), St->getAlignment()); > - SDOperand HiSt = DAG.getStore(HiLd.getValue(1), HiLd, HiAddr, > - St->getSrcValue(), St- > >getSrcValueOffset()+4, > - St->isVolatile(), > - MinAlign(St->getAlignment(), 4)); > - return DAG.getNode(ISD::TokenFactor, MVT::Other, LoSt, HiSt); > } > return SDOperand(); > } > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dalej at apple.com Mon Feb 25 13:57:41 2008 From: dalej at apple.com (Dale Johannesen) Date: Mon, 25 Feb 2008 11:57:41 -0800 Subject: [llvm-commits] [llvm] r47554 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <2BA5497C-BA9C-49A2-A7B9-A3BF4D2EB654@apple.com> References: <200802251920.m1PJKFO9026290@zion.cs.uiuc.edu> <2BA5497C-BA9C-49A2-A7B9-A3BF4D2EB654@apple.com> Message-ID: <2C7B1CA8-A5D8-4E2A-8200-0B3A58D7D49A@apple.com> On Feb 25, 2008, at 11:52 AM, Evan Cheng wrote: >> >> +i) { >> + if (ChainVal->getOperand(i).Val == St->getValue().Val) { >> + if (TokenFactorIndex != -1) >> + return SDOperand(); > > Is it necessary to abort the optimization here? You are creating a new > TokenFactor node below, right? Why not just trim it? Perhaps > SelectionDAG::getNode should ensure TokenFactor nodes do have > duplicate operands? Fair enough, I'll fix that. I'm not sure this can arise in practice, I haven't seen it. From dalej at apple.com Mon Feb 25 14:57:39 2008 From: dalej at apple.com (Dale Johannesen) Date: Mon, 25 Feb 2008 20:57:39 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47559 - /llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Message-ID: <200802252057.m1PKvdmj029008@zion.cs.uiuc.edu> Author: johannes Date: Mon Feb 25 14:57:39 2008 New Revision: 47559 URL: http://llvm.org/viewvc/llvm-project?rev=47559&view=rev Log: Do not pass union with a single long double as a scalar long double; not the same. Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp?rev=47559&r1=47558&r2=47559&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Mon Feb 25 14:57:39 2008 @@ -701,7 +701,7 @@ HOST_WIDE_INT SrcSize = int_size_in_bytes(TreeType); if (SrcSize <= 0 || SrcSize > 16) return false; - + // X86-32 passes aggregates on the stack. If this is an extremely simple // aggregate whose elements would be passed the same if passed as scalars, // pass them that way in order to promote SROA on the caller and callee side. @@ -710,13 +710,16 @@ // would be passed as stand-alone arguments. const StructType *STy = dyn_cast(Ty); if (!STy || STy->isPacked()) return false; - + for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { const Type *EltTy = STy->getElementType(i); - // 32 and 64-bit integers are fine, as are float, double, and long double. + // 32 and 64-bit integers are fine, as are float and double. Long double + // (which can be picked as the type for a union of 16 bytes) is not fine, + // as loads and stores of it get only 10 bytes. if (EltTy == Type::Int32Ty || EltTy == Type::Int64Ty || - EltTy->isFloatingPoint() || + EltTy == Type::FloatTy || + EltTy == Type::DoubleTy || isa(EltTy)) { Elts.push_back(EltTy); continue; From gohman at apple.com Mon Feb 25 15:11:39 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 25 Feb 2008 21:11:39 -0000 Subject: [llvm-commits] [llvm] r47561 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAG.h lib/CodeGen/SelectionDAG/DAGCombiner.cpp lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/CodeGen/SelectionDAG/TargetLowering.cpp lib/Target/Alpha/AlphaISelDAGToDAG.cpp lib/Target/X86/X86ISelDAGToDAG.cpp Message-ID: <200802252111.m1PLBeHM029651@zion.cs.uiuc.edu> Author: djg Date: Mon Feb 25 15:11:39 2008 New Revision: 47561 URL: http://llvm.org/viewvc/llvm-project?rev=47561&view=rev Log: Convert MaskedValueIsZero and all its users to use APInt. Also add a SignBitIsZero function to simplify a common use case. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=47561&r1=47560&r2=47561&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Mon Feb 25 15:11:39 2008 @@ -555,10 +555,14 @@ SDOperand FoldSetCC(MVT::ValueType VT, SDOperand N1, SDOperand N2, ISD::CondCode Cond); + /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We + /// use this predicate to simplify operations downstream. + bool SignBitIsZero(SDOperand Op, unsigned Depth = 0) const; + /// MaskedValueIsZero - Return true if 'Op & Mask' is known to be zero. We /// use this predicate to simplify operations downstream. Op and Mask are /// known to be the same type. - bool MaskedValueIsZero(SDOperand Op, uint64_t Mask, unsigned Depth = 0) + bool MaskedValueIsZero(SDOperand Op, const APInt &Mask, unsigned Depth = 0) const; /// ComputeMaskedBits - Determine which of the bits specified in Mask are Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=47561&r1=47560&r2=47561&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Feb 25 15:11:39 2008 @@ -218,7 +218,7 @@ SDNode *MatchRotate(SDOperand LHS, SDOperand RHS); SDOperand ReduceLoadWidth(SDNode *N); - SDOperand GetDemandedBits(SDOperand V, uint64_t Mask); + SDOperand GetDemandedBits(SDOperand V, const APInt &Mask); /// GatherAllAliases - Walk up chain skipping non-aliasing memory nodes, /// looking for aliasing nodes and adding them to the Aliases vector. @@ -1226,9 +1226,7 @@ // If we know the sign bits of both operands are zero, strength reduce to a // udiv instead. Handles (X&15) /s 4 -> X&15 >> 2 if (!MVT::isVector(VT)) { - uint64_t SignBit = MVT::getIntVTSignBit(VT); - if (DAG.MaskedValueIsZero(N1, SignBit) && - DAG.MaskedValueIsZero(N0, SignBit)) + if (DAG.SignBitIsZero(N1) && DAG.SignBitIsZero(N0)) return DAG.getNode(ISD::UDIV, N1.getValueType(), N0, N1); } // fold (sdiv X, pow2) -> simple ops after legalize @@ -1344,9 +1342,7 @@ // If we know the sign bits of both operands are zero, strength reduce to a // urem instead. Handles (X & 0x0FFFFFFF) %s 16 -> X&15 if (!MVT::isVector(VT)) { - uint64_t SignBit = MVT::getIntVTSignBit(VT); - if (DAG.MaskedValueIsZero(N1, SignBit) && - DAG.MaskedValueIsZero(N0, SignBit)) + if (DAG.SignBitIsZero(N1) && DAG.SignBitIsZero(N0)) return DAG.getNode(ISD::UREM, VT, N0, N1); } @@ -1588,6 +1584,7 @@ ConstantSDNode *N0C = dyn_cast(N0); ConstantSDNode *N1C = dyn_cast(N1); MVT::ValueType VT = N1.getValueType(); + unsigned BitWidth = MVT::getSizeInBits(VT); // fold vector ops if (MVT::isVector(VT)) { @@ -1608,7 +1605,8 @@ if (N1C && N1C->isAllOnesValue()) return N0; // if (and x, c) is known to be zero, return 0 - if (N1C && DAG.MaskedValueIsZero(SDOperand(N, 0), MVT::getIntVTBitMask(VT))) + if (N1C && DAG.MaskedValueIsZero(SDOperand(N, 0), + APInt::getAllOnesValue(BitWidth))) return DAG.getConstant(0, VT); // reassociate and SDOperand RAND = ReassociateOps(ISD::AND, N0, N1); @@ -1621,11 +1619,12 @@ return N1; // fold (and (any_ext V), c) -> (zero_ext V) if 'and' only clears top bits. if (N1C && N0.getOpcode() == ISD::ANY_EXTEND) { - unsigned InMask = MVT::getIntVTBitMask(N0.getOperand(0).getValueType()); - if (DAG.MaskedValueIsZero(N0.getOperand(0), - ~N1C->getValue() & InMask)) { + SDOperand N0Op0 = N0.getOperand(0); + APInt Mask = ~N1C->getAPIntValue(); + Mask.trunc(N0Op0.getValueSizeInBits()); + if (DAG.MaskedValueIsZero(N0Op0, Mask)) { SDOperand Zext = DAG.getNode(ISD::ZERO_EXTEND, N0.getValueType(), - N0.getOperand(0)); + N0Op0); // Replace uses of the AND with uses of the Zero extend node. CombineTo(N, Zext); @@ -1693,7 +1692,9 @@ MVT::ValueType EVT = LN0->getMemoryVT(); // If we zero all the possible extended bits, then we can turn this into // a zextload if we are running before legalize or the operation is legal. - if (DAG.MaskedValueIsZero(N1, ~0ULL << MVT::getSizeInBits(EVT)) && + unsigned BitWidth = N1.getValueSizeInBits(); + if (DAG.MaskedValueIsZero(N1, APInt::getHighBitsSet(BitWidth, + BitWidth - MVT::getSizeInBits(EVT))) && (!AfterLegalize || TLI.isLoadXLegal(ISD::ZEXTLOAD, EVT))) { SDOperand ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, VT, LN0->getChain(), LN0->getBasePtr(), LN0->getSrcValue(), @@ -1712,7 +1713,9 @@ MVT::ValueType EVT = LN0->getMemoryVT(); // If we zero all the possible extended bits, then we can turn this into // a zextload if we are running before legalize or the operation is legal. - if (DAG.MaskedValueIsZero(N1, ~0ULL << MVT::getSizeInBits(EVT)) && + unsigned BitWidth = N1.getValueSizeInBits(); + if (DAG.MaskedValueIsZero(N1, APInt::getHighBitsSet(BitWidth, + BitWidth - MVT::getSizeInBits(EVT))) && (!AfterLegalize || TLI.isLoadXLegal(ISD::ZEXTLOAD, EVT))) { SDOperand ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, VT, LN0->getChain(), LN0->getBasePtr(), LN0->getSrcValue(), @@ -1780,7 +1783,6 @@ ConstantSDNode *N0C = dyn_cast(N0); ConstantSDNode *N1C = dyn_cast(N1); MVT::ValueType VT = N1.getValueType(); - unsigned OpSizeInBits = MVT::getSizeInBits(VT); // fold vector ops if (MVT::isVector(VT)) { @@ -1804,8 +1806,7 @@ if (N1C && N1C->isAllOnesValue()) return N1; // fold (or x, c) -> c iff (x & ~c) == 0 - if (N1C && - DAG.MaskedValueIsZero(N0,~N1C->getValue() & (~0ULL>>(64-OpSizeInBits)))) + if (N1C && DAG.MaskedValueIsZero(N0, ~N1C->getAPIntValue())) return N1; // reassociate or SDOperand ROR = ReassociateOps(ISD::OR, N0, N1); @@ -1871,8 +1872,10 @@ (N0.Val->hasOneUse() || N1.Val->hasOneUse())) { // We can only do this xform if we know that bits from X that are set in C2 // but not in C1 are already zero. Likewise for Y. - uint64_t LHSMask = cast(N0.getOperand(1))->getValue(); - uint64_t RHSMask = cast(N1.getOperand(1))->getValue(); + const APInt &LHSMask = + cast(N0.getOperand(1))->getAPIntValue(); + const APInt &RHSMask = + cast(N1.getOperand(1))->getAPIntValue(); if (DAG.MaskedValueIsZero(N0.getOperand(0), RHSMask&~LHSMask) && DAG.MaskedValueIsZero(N1.getOperand(0), LHSMask&~RHSMask)) { @@ -2271,7 +2274,8 @@ if (N1C && N1C->isNullValue()) return N0; // if (shl x, c) is known to be zero, return 0 - if (DAG.MaskedValueIsZero(SDOperand(N, 0), MVT::getIntVTBitMask(VT))) + if (DAG.MaskedValueIsZero(SDOperand(N, 0), + APInt::getAllOnesValue(MVT::getSizeInBits(VT)))) return DAG.getConstant(0, VT); if (N1C && SimplifyDemandedBits(SDOperand(N, 0))) return SDOperand(N, 0); @@ -2363,7 +2367,7 @@ // If the sign bit is known to be zero, switch this to a SRL. - if (DAG.MaskedValueIsZero(N0, MVT::getIntVTSignBit(VT))) + if (DAG.SignBitIsZero(N0)) return DAG.getNode(ISD::SRL, VT, N0, N1); return N1C ? visitShiftByConstant(N, N1C->getValue()) : SDOperand(); @@ -2390,7 +2394,8 @@ if (N1C && N1C->isNullValue()) return N0; // if (srl x, c) is known to be zero, return 0 - if (N1C && DAG.MaskedValueIsZero(SDOperand(N, 0), ~0ULL >> (64-OpSizeInBits))) + if (N1C && DAG.MaskedValueIsZero(SDOperand(N, 0), + APInt::getAllOnesValue(OpSizeInBits))) return DAG.getConstant(0, VT); // fold (srl (srl x, c1), c2) -> 0 or (srl x, c1+c2) @@ -3026,7 +3031,7 @@ /// GetDemandedBits - See if the specified operand can be simplified with the /// knowledge that only the bits specified by Mask are used. If so, return the /// simpler operand, otherwise return a null SDOperand. -SDOperand DAGCombiner::GetDemandedBits(SDOperand V, uint64_t Mask) { +SDOperand DAGCombiner::GetDemandedBits(SDOperand V, const APInt &Mask) { switch (V.getOpcode()) { default: break; case ISD::OR: @@ -3044,8 +3049,8 @@ if (ConstantSDNode *RHSC = dyn_cast(V.getOperand(1))) { // See if we can recursively simplify the LHS. unsigned Amt = RHSC->getValue(); - Mask = (Mask << Amt) & MVT::getIntVTBitMask(V.getValueType()); - SDOperand SimplifyLHS = GetDemandedBits(V.getOperand(0), Mask); + APInt NewMask = Mask << Amt; + SDOperand SimplifyLHS = GetDemandedBits(V.getOperand(0), NewMask); if (SimplifyLHS.Val) { return DAG.getNode(ISD::SRL, V.getValueType(), SimplifyLHS, V.getOperand(1)); @@ -3147,6 +3152,7 @@ SDOperand N1 = N->getOperand(1); MVT::ValueType VT = N->getValueType(0); MVT::ValueType EVT = cast(N1)->getVT(); + unsigned VTBits = MVT::getSizeInBits(VT); unsigned EVTBits = MVT::getSizeInBits(EVT); // fold (sext_in_reg c1) -> c1 @@ -3164,7 +3170,7 @@ } // fold (sext_in_reg x) -> (zext_in_reg x) if the sign bit is known zero. - if (DAG.MaskedValueIsZero(N0, 1ULL << (EVTBits-1))) + if (DAG.MaskedValueIsZero(N0, APInt::getBitsSet(VTBits, EVTBits-1, EVTBits))) return DAG.getZeroExtendInReg(N0, EVT); // fold operands of sext_in_reg based on knowledge that the top bits are not @@ -3256,7 +3262,9 @@ // See if we can simplify the input to this truncate through knowledge that // only the low bits are being used. For example "trunc (or (shl x, 8), y)" // -> trunc y - SDOperand Shorter = GetDemandedBits(N0, MVT::getIntVTBitMask(VT)); + SDOperand Shorter = + GetDemandedBits(N0, APInt::getLowBitsSet(N0.getValueSizeInBits(), + MVT::getSizeInBits(VT))); if (Shorter.Val) return DAG.getNode(ISD::TRUNCATE, VT, Shorter); @@ -4468,7 +4476,9 @@ // only the low bits are being used. For example: // "truncstore (or (shl x, 8), y), i8" -> "truncstore y, i8" SDOperand Shorter = - GetDemandedBits(Value, MVT::getIntVTBitMask(ST->getMemoryVT())); + GetDemandedBits(Value, + APInt::getLowBitsSet(Value.getValueSizeInBits(), + MVT::getSizeInBits(ST->getMemoryVT()))); AddToWorkList(Value.Val); if (Shorter.Val) return DAG.getTruncStore(Chain, Shorter, Ptr, ST->getSrcValue(), Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47561&r1=47560&r2=47561&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Feb 25 15:11:39 2008 @@ -1779,16 +1779,18 @@ case Legal: Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the condition. break; - case Promote: + case Promote: { Tmp2 = PromoteOp(Node->getOperand(1)); // Promote the condition. // The top bits of the promoted condition are not necessarily zero, ensure // that the value is properly zero extended. + unsigned BitWidth = Tmp2.getValueSizeInBits(); if (!DAG.MaskedValueIsZero(Tmp2, - MVT::getIntVTBitMask(Tmp2.getValueType())^1)) + APInt::getHighBitsSet(BitWidth, BitWidth-1))) Tmp2 = DAG.getZeroExtendInReg(Tmp2, MVT::i1); break; } + } // Basic block destination (Op#2) is always legal. Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Node->getOperand(2)); @@ -2642,14 +2644,16 @@ case Legal: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the condition. break; - case Promote: + case Promote: { Tmp1 = PromoteOp(Node->getOperand(0)); // Promote the condition. // Make sure the condition is either zero or one. + unsigned BitWidth = Tmp1.getValueSizeInBits(); if (!DAG.MaskedValueIsZero(Tmp1, - MVT::getIntVTBitMask(Tmp1.getValueType())^1)) + APInt::getHighBitsSet(BitWidth, BitWidth-1))) Tmp1 = DAG.getZeroExtendInReg(Tmp1, MVT::i1); break; } + } Tmp2 = LegalizeOp(Node->getOperand(1)); // TrueVal Tmp3 = LegalizeOp(Node->getOperand(2)); // FalseVal @@ -6338,13 +6342,14 @@ SDOperand LL, LH, RL, RH; ExpandOp(Node->getOperand(0), LL, LH); ExpandOp(Node->getOperand(1), RL, RH); - unsigned BitSize = MVT::getSizeInBits(RH.getValueType()); + unsigned OuterBitSize = Op.getValueSizeInBits(); + unsigned InnerBitSize = RH.getValueSizeInBits(); unsigned LHSSB = DAG.ComputeNumSignBits(Op.getOperand(0)); unsigned RHSSB = DAG.ComputeNumSignBits(Op.getOperand(1)); - // FIXME: generalize this to handle other bit sizes - if (LHSSB == 32 && RHSSB == 32 && - DAG.MaskedValueIsZero(Op.getOperand(0), 0xFFFFFFFF00000000ULL) && - DAG.MaskedValueIsZero(Op.getOperand(1), 0xFFFFFFFF00000000ULL)) { + if (DAG.MaskedValueIsZero(Op.getOperand(0), + APInt::getHighBitsSet(OuterBitSize, LHSSB)) && + DAG.MaskedValueIsZero(Op.getOperand(1), + APInt::getHighBitsSet(OuterBitSize, RHSSB))) { // The inputs are both zero-extended. if (HasUMUL_LOHI) { // We can emit a umul_lohi. @@ -6359,7 +6364,7 @@ break; } } - if (LHSSB > BitSize && RHSSB > BitSize) { + if (LHSSB > InnerBitSize && RHSSB > InnerBitSize) { // The input values are both sign-extended. if (HasSMUL_LOHI) { // We can emit a smul_lohi. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp?rev=47561&r1=47560&r2=47561&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp Mon Feb 25 15:11:39 2008 @@ -507,14 +507,15 @@ SDOperand LL, LH, RL, RH; GetExpandedOp(N->getOperand(0), LL, LH); GetExpandedOp(N->getOperand(1), RL, RH); + unsigned OuterBitSize = MVT::getSizeInBits(VT); unsigned BitSize = MVT::getSizeInBits(NVT); unsigned LHSSB = DAG.ComputeNumSignBits(N->getOperand(0)); unsigned RHSSB = DAG.ComputeNumSignBits(N->getOperand(1)); - // FIXME: generalize this to handle other bit sizes - if (LHSSB == 32 && RHSSB == 32 && - DAG.MaskedValueIsZero(N->getOperand(0), 0xFFFFFFFF00000000ULL) && - DAG.MaskedValueIsZero(N->getOperand(1), 0xFFFFFFFF00000000ULL)) { + if (DAG.MaskedValueIsZero(N->getOperand(0), + APInt::getHighBitsSet(OuterBitSize, LHSSB)) && + DAG.MaskedValueIsZero(N->getOperand(1), + APInt::getHighBitsSet(OuterBitSize, RHSSB))) { // The inputs are both zero-extended. if (HasUMUL_LOHI) { // We can emit a umul_lohi. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp?rev=47561&r1=47560&r2=47561&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp Mon Feb 25 15:11:39 2008 @@ -446,8 +446,9 @@ // The top bits of the promoted condition are not necessarily zero, ensure // that the value is properly zero extended. + unsigned BitWidth = Cond.getValueSizeInBits(); if (!DAG.MaskedValueIsZero(Cond, - MVT::getIntVTBitMask(Cond.getValueType())^1)) { + APInt::getHighBitsSet(BitWidth, BitWidth-1))) { Cond = DAG.getZeroExtendInReg(Cond, MVT::i1); MarkNewNodes(Cond.Val); } @@ -463,8 +464,9 @@ // The top bits of the promoted condition are not necessarily zero, ensure // that the value is properly zero extended. + unsigned BitWidth = Cond.getValueSizeInBits(); if (!DAG.MaskedValueIsZero(Cond, - MVT::getIntVTBitMask(Cond.getValueType())^1)) { + APInt::getHighBitsSet(BitWidth, BitWidth-1))) { Cond = DAG.getZeroExtendInReg(Cond, MVT::i1); MarkNewNodes(Cond.Val); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=47561&r1=47560&r2=47561&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Feb 25 15:11:39 2008 @@ -1133,16 +1133,19 @@ return SDOperand(); } +/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We +/// use this predicate to simplify operations downstream. +bool SelectionDAG::SignBitIsZero(SDOperand Op, unsigned Depth) const { + unsigned BitWidth = Op.getValueSizeInBits(); + return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); +} + /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use /// this predicate to simplify operations downstream. Mask is known to be zero /// for bits that V cannot have. -bool SelectionDAG::MaskedValueIsZero(SDOperand Op, uint64_t Mask, +bool SelectionDAG::MaskedValueIsZero(SDOperand Op, const APInt &Mask, unsigned Depth) const { - // The masks are not wide enough to represent this type! Should use APInt. - if (Op.getValueType() == MVT::i128) - return false; - - uint64_t KnownZero, KnownOne; + APInt KnownZero, KnownOne; ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); return (KnownZero & Mask) == Mask; Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=47561&r1=47560&r2=47561&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Feb 25 15:11:39 2008 @@ -5211,20 +5211,20 @@ /// specified in the .td file (e.g. 255). bool SelectionDAGISel::CheckAndMask(SDOperand LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const { - uint64_t ActualMask = RHS->getValue(); - uint64_t DesiredMask =DesiredMaskS & MVT::getIntVTBitMask(LHS.getValueType()); + const APInt &ActualMask = RHS->getAPIntValue(); + const APInt &DesiredMask = APInt(LHS.getValueSizeInBits(), DesiredMaskS); // If the actual mask exactly matches, success! if (ActualMask == DesiredMask) return true; // If the actual AND mask is allowing unallowed bits, this doesn't match. - if (ActualMask & ~DesiredMask) + if (ActualMask.intersects(~DesiredMask)) return false; // Otherwise, the DAG Combiner may have proven that the value coming in is // either already zero or is not demanded. Check for known zero input bits. - uint64_t NeededMask = DesiredMask & ~ActualMask; + APInt NeededMask = DesiredMask & ~ActualMask; if (CurDAG->MaskedValueIsZero(LHS, NeededMask)) return true; @@ -5239,23 +5239,23 @@ /// actual value in the DAG on the RHS of an OR, and DesiredMaskS is the value /// specified in the .td file (e.g. 255). bool SelectionDAGISel::CheckOrMask(SDOperand LHS, ConstantSDNode *RHS, - int64_t DesiredMaskS) const { - uint64_t ActualMask = RHS->getValue(); - uint64_t DesiredMask =DesiredMaskS & MVT::getIntVTBitMask(LHS.getValueType()); + int64_t DesiredMaskS) const { + const APInt &ActualMask = RHS->getAPIntValue(); + const APInt &DesiredMask = APInt(LHS.getValueSizeInBits(), DesiredMaskS); // If the actual mask exactly matches, success! if (ActualMask == DesiredMask) return true; // If the actual AND mask is allowing unallowed bits, this doesn't match. - if (ActualMask & ~DesiredMask) + if (ActualMask.intersects(~DesiredMask)) return false; // Otherwise, the DAG Combiner may have proven that the value coming in is // either already zero or is not demanded. Check for known zero input bits. - uint64_t NeededMask = DesiredMask & ~ActualMask; + APInt NeededMask = DesiredMask & ~ActualMask; - uint64_t KnownZero, KnownOne; + APInt KnownZero, KnownOne; CurDAG->ComputeMaskedBits(LHS, NeededMask, KnownZero, KnownOne); // If all the missing bits in the or are already known to be set, match! Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47561&r1=47560&r2=47561&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Mon Feb 25 15:11:39 2008 @@ -1187,8 +1187,10 @@ cast(N0.getOperand(1))->getValue() == 1) { // If this is (X^1) == 0/1, swap the RHS and eliminate the xor. We // can only do this if the top bits are known zero. + unsigned BitWidth = N0.getValueSizeInBits(); if (DAG.MaskedValueIsZero(N0, - MVT::getIntVTBitMask(N0.getValueType())-1)){ + APInt::getHighBitsSet(BitWidth, + BitWidth-1))) { // Okay, get the un-inverted input value. SDOperand Val; if (N0.getOpcode() == ISD::XOR) @@ -1374,18 +1376,24 @@ if (N0.getOpcode() == ISD::XOR) // If we know that all of the inverted bits are zero, don't bother // performing the inversion. - if (DAG.MaskedValueIsZero(N0.getOperand(0), ~LHSR->getValue())) - return DAG.getSetCC(VT, N0.getOperand(0), - DAG.getConstant(LHSR->getValue()^RHSC->getValue(), - N0.getValueType()), Cond); + if (DAG.MaskedValueIsZero(N0.getOperand(0), ~LHSR->getAPIntValue())) + return + DAG.getSetCC(VT, N0.getOperand(0), + DAG.getConstant(LHSR->getAPIntValue() ^ + RHSC->getAPIntValue(), + N0.getValueType()), + Cond); } // Turn (C1-X) == C2 --> X == C1-C2 if (ConstantSDNode *SUBC = dyn_cast(N0.getOperand(0))) { if (N0.getOpcode() == ISD::SUB && N0.Val->hasOneUse()) { - return DAG.getSetCC(VT, N0.getOperand(1), - DAG.getConstant(SUBC->getValue()-RHSC->getValue(), - N0.getValueType()), Cond); + return + DAG.getSetCC(VT, N0.getOperand(1), + DAG.getConstant(SUBC->getAPIntValue() - + RHSC->getAPIntValue(), + N0.getValueType()), + Cond); } } } Modified: llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp?rev=47561&r1=47560&r2=47561&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp Mon Feb 25 15:11:39 2008 @@ -91,7 +91,9 @@ // see if the missing bits (0x1000) are already known zero if not, the zap // isn't okay to do, as it won't clear all the required bits. if (BitsToCheck && - !CurDAG->MaskedValueIsZero(LHS, BitsToCheck)) + !CurDAG->MaskedValueIsZero(LHS, + APInt(LHS.getValueSizeInBits(), + BitsToCheck))) return 0; return Result; Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=47561&r1=47560&r2=47561&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Feb 25 15:11:39 2008 @@ -819,7 +819,7 @@ // On x86-64, the resultant disp must fit in 32-bits. isInt32(AM.Disp + CN->getSignExtended()) && // Check to see if the LHS & C is zero. - CurDAG->MaskedValueIsZero(N.getOperand(0), CN->getValue())) { + CurDAG->MaskedValueIsZero(N.getOperand(0), CN->getAPIntValue())) { AM.Disp += CN->getValue(); return false; } From evan.cheng at apple.com Mon Feb 25 15:15:28 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 25 Feb 2008 13:15:28 -0800 Subject: [llvm-commits] [llvm] r47554 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: References: <200802251920.m1PJKFO9026290@zion.cs.uiuc.edu> Message-ID: <50308D2A-579C-4054-91D0-B59EAE530746@apple.com> On Feb 25, 2008, at 11:49 AM, Dale Johannesen wrote: > > On Feb 25, 2008, at 11:44 AM, Evan Cheng wrote: > >> >> On Feb 25, 2008, at 11:20 AM, Dale Johannesen wrote: >> >>> const X86Subtarget *Subtarget) { >>> >>> + // Must be a store of a load. We currently handle two cases: >>> the load >>> + // is a direct child, and it's under an intervening >>> TokenFactor. It is >>> + // possible to dig deeper under nested TokenFactors. >>> + if (ChainVal == St->getValue().Val) >>> + Ld = cast(St->getChain()); >> >> I'm not sure how safe this is. It can be storing a value produced by >> any chain producing node. Can it be a CopyFromReg? >> >> Evan > > It is checked above that St->getValue() is a load. Is that not > enough? Ok. Can you put ST->getValue() in an appropriately named variable to help me understand the code? Thanks. Evan > > >>> + else if (St->getValue().hasOneUse() && >>> + ChainVal->getOpcode() == ISD::TokenFactor) { >>> + for (unsigned i=0, e = ChainVal->getNumOperands(); i != e; + >>> +i) { >>> + if (ChainVal->getOperand(i).Val == St->getValue().Val) { >>> + if (TokenFactorIndex != -1) >>> + return SDOperand(); >>> + TokenFactorIndex = i; >>> + Ld = cast(St->getValue()); >>> + } else >>> + Ops.push_back(ChainVal->getOperand(i)); >>> + } >>> + } >>> + if (Ld) { >>> + // If we are a 64-bit capable x86, lower to a single movq >>> load/store pair. >>> + if (Subtarget->is64Bit()) { >>> + SDOperand NewLd = DAG.getLoad(MVT::i64, Ld->getChain(), >>> + Ld->getBasePtr(), Ld- >>>> getSrcValue(), >>> + Ld->getSrcValueOffset(), Ld- >>>> isVolatile(), >>> + Ld->getAlignment()); >>> + SDOperand NewChain = NewLd.getValue(1); >>> + if (TokenFactorIndex != -1) { >>> + Ops.push_back(NewLd); >>> + NewChain = DAG.getNode(ISD::TokenFactor, MVT::Other, >>> &Ops[0], >>> + Ops.size()); >>> + } >>> + return DAG.getStore(NewChain, NewLd, St->getBasePtr(), >>> + St->getSrcValue(), St- >>>> getSrcValueOffset(), >>> + St->isVolatile(), St->getAlignment()); >>> + } >>> + >>> + // Otherwise, lower to two 32-bit copies. >>> + SDOperand LoAddr = Ld->getBasePtr(); >>> + SDOperand HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, >>> + DAG.getConstant(MVT::i32, 4)); >>> + >>> + SDOperand LoLd = DAG.getLoad(MVT::i32, Ld->getChain(), >>> LoAddr, >>> + Ld->getSrcValue(), Ld- >>>> getSrcValueOffset(), >>> + Ld->isVolatile(), Ld- >>>> getAlignment()); >>> + SDOperand HiLd = DAG.getLoad(MVT::i32, Ld->getChain(), >>> HiAddr, >>> + Ld->getSrcValue(), Ld- >>>> getSrcValueOffset()+4, >>> + Ld->isVolatile(), >>> + MinAlign(Ld->getAlignment(), >>> 4)); >>> + >>> + SDOperand NewChain = LoLd.getValue(1); >>> + if (TokenFactorIndex != -1) { >>> + Ops.push_back(LoLd); >>> + Ops.push_back(HiLd); >>> + NewChain = DAG.getNode(ISD::TokenFactor, MVT::Other, >>> &Ops[0], >>> + Ops.size()); >>> + } >>> + >>> + LoAddr = St->getBasePtr(); >>> + HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, >>> + DAG.getConstant(MVT::i32, 4)); >>> + >>> + SDOperand LoSt = DAG.getStore(NewChain, LoLd, LoAddr, >>> St->getSrcValue(), St->getSrcValueOffset(), >>> St->isVolatile(), St->getAlignment()); >>> + SDOperand HiSt = DAG.getStore(NewChain, HiLd, HiAddr, >>> + St->getSrcValue(), St- >>>> getSrcValueOffset()+4, >>> + St->isVolatile(), >>> + MinAlign(St->getAlignment(), >>> 4)); >>> + return DAG.getNode(ISD::TokenFactor, MVT::Other, LoSt, HiSt); >>> } >>> - >>> - // Otherwise, lower to two 32-bit copies. >>> - SDOperand LoAddr = Ld->getBasePtr(); >>> - SDOperand HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, >>> - DAG.getConstant(MVT::i32, 4)); >>> - >>> - SDOperand LoLd = DAG.getLoad(MVT::i32, Ld->getChain(), LoAddr, >>> - Ld->getSrcValue(), Ld- >>>> getSrcValueOffset(), >>> - Ld->isVolatile(), Ld- >>>> getAlignment()); >>> - SDOperand HiLd = DAG.getLoad(MVT::i32, Ld->getChain(), HiAddr, >>> - Ld->getSrcValue(), Ld- >>>> getSrcValueOffset()+4, >>> - Ld->isVolatile(), >>> - MinAlign(Ld->getAlignment(), 4)); >>> - >>> - LoAddr = St->getBasePtr(); >>> - HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr, >>> - DAG.getConstant(MVT::i32, 4)); >>> - >>> - SDOperand LoSt = DAG.getStore(LoLd.getValue(1), LoLd, LoAddr, >>> - St->getSrcValue(), St->getSrcValueOffset(), >>> - St->isVolatile(), St->getAlignment()); >>> - SDOperand HiSt = DAG.getStore(HiLd.getValue(1), HiLd, HiAddr, >>> - St->getSrcValue(), St- >>>> getSrcValueOffset()+4, >>> - St->isVolatile(), >>> - MinAlign(St->getAlignment(), 4)); >>> - return DAG.getNode(ISD::TokenFactor, MVT::Other, LoSt, HiSt); >>> } >>> return SDOperand(); >>> } >>> >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Mon Feb 25 15:22:59 2008 From: clattner at apple.com (Chris Lattner) Date: Mon, 25 Feb 2008 13:22:59 -0800 Subject: [llvm-commits] [llvm] r47482 - /llvm/trunk/include/llvm/ADT/IntrusiveRefCntPtr.h In-Reply-To: <200802221726.m1MHQImH012966@zion.cs.uiuc.edu> References: <200802221726.m1MHQImH012966@zion.cs.uiuc.edu> Message-ID: <05CA39DD-3140-4D93-BD66-A474AC24BD78@apple.com> On Feb 22, 2008, at 9:26 AM, Anton Korobeynikov wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=47482&view=rev > Log: > Add smart refcounting pointer class to ADT back (known before as > IntrusiveSPtr.h). Hey Anton, > + > +#include > +#include Out of curiosity, what needs stddef here? > +template > +void IntrusivePtrAddRef(llvm::RefCountedBase*); > + > +template > +void IntrusivePtrRelease(llvm::RefCountedBase*); > + > +template > +void IntrusivePtrAddRef(llvm::RefCountedBaseVPTR*); > + > +template > +void IntrusivePtrRelease(llvm::RefCountedBaseVPTR*); Why aren't these in the llvm namespace? > +// > = > = > = > ----------------------------------------------------------------------= > ==// > +/// RefCountedBaseVPTR - A class that has the same function as > +/// RefCountedBase, but with a virtual destructor. Should be used > +/// instead of RefCountedBase for classes that have virtual > +/// destructors. > > + template > + class RefCountedBaseVPTR { Why do you need this class? The only way a ref counted object should be destroyable is through Release(), which should handle the case when "Derived" itself has a virtual dtor, no? > Classes that inherit from RefCountedBaseVPTR can't > +/// be allocated on stack. > +// > = > = > = > ----------------------------------------------------------------------= > ==// I don't think that classes inheriting from RefCountedBase should be allocated on the stack either. release'ing them cause them to be delete'd, which is badness for stack memory. Ref counted objects only make sense on the heap. > +// > = > = > = > ----------------------------------------------------------------------= > ==// > +/// IntrusivePtrAddRef - A utility function used by > IntrusiveRefCntPtr > +/// to increment the reference count of an RefCountedBase-derived > object. > +// > = > = > = > ----------------------------------------------------------------------= > ==// > +template > +void IntrusivePtrAddRef(llvm::RefCountedBase* O) { When are these helper functions used? Overall, this looks very useful, thanks for resurrecting it! -Chris From sabre at nondot.org Mon Feb 25 15:28:47 2008 From: sabre at nondot.org (Chris Lattner) Date: Mon, 25 Feb 2008 21:28:47 -0000 Subject: [llvm-commits] [llvm] r47563 - /llvm/trunk/include/llvm/Type.h Message-ID: <200802252128.m1PLSl6L030136@zion.cs.uiuc.edu> Author: lattner Date: Mon Feb 25 15:28:46 2008 New Revision: 47563 URL: http://llvm.org/viewvc/llvm-project?rev=47563&view=rev Log: add an assertion to catch a null PATypeHolder, patch by Erick Tryzelaar Modified: llvm/trunk/include/llvm/Type.h Modified: llvm/trunk/include/llvm/Type.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Type.h?rev=47563&r1=47562&r2=47563&view=diff ============================================================================== --- llvm/trunk/include/llvm/Type.h (original) +++ llvm/trunk/include/llvm/Type.h Mon Feb 25 15:28:46 2008 @@ -357,9 +357,10 @@ Ty->removeAbstractTypeUser(User); } -// Define inline methods for PATypeHolder... +// Define inline methods for PATypeHolder. inline void PATypeHolder::addRef() { + assert(Ty && "Type Holder has a null type!"); if (Ty->isAbstract()) Ty->addRef(); } From gohman at apple.com Mon Feb 25 15:39:34 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 25 Feb 2008 21:39:34 -0000 Subject: [llvm-commits] [llvm] r47566 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200802252139.m1PLdYYl030499@zion.cs.uiuc.edu> Author: djg Date: Mon Feb 25 15:39:34 2008 New Revision: 47566 URL: http://llvm.org/viewvc/llvm-project?rev=47566&view=rev Log: Make some static variables const. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47566&r1=47565&r2=47566&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Feb 25 15:39:34 2008 @@ -6543,13 +6543,13 @@ bool isSigned = Node->getOpcode() == ISD::SINT_TO_FP; MVT::ValueType SrcVT = Node->getOperand(0).getValueType(); if (VT == MVT::ppcf128 && SrcVT != MVT::i64) { - static uint64_t zero = 0; + static const uint64_t zero = 0; if (isSigned) { Hi = LegalizeOp(DAG.getNode(ISD::SINT_TO_FP, MVT::f64, Node->getOperand(0))); Lo = DAG.getConstantFP(APFloat(APInt(64, 1, &zero)), MVT::f64); } else { - static uint64_t TwoE32[] = { 0x41f0000000000000LL, 0 }; + static const uint64_t TwoE32[] = { 0x41f0000000000000LL, 0 }; Hi = LegalizeOp(DAG.getNode(ISD::SINT_TO_FP, MVT::f64, Node->getOperand(0))); Lo = DAG.getConstantFP(APFloat(APInt(64, 1, &zero)), MVT::f64); @@ -6569,7 +6569,7 @@ } if (VT == MVT::ppcf128 && SrcVT == MVT::i64 && !isSigned) { // si64->ppcf128 done by libcall, below - static uint64_t TwoE64[] = { 0x43f0000000000000LL, 0 }; + static const uint64_t TwoE64[] = { 0x43f0000000000000LL, 0 }; ExpandOp(DAG.getNode(ISD::SINT_TO_FP, MVT::ppcf128, Node->getOperand(0)), Lo, Hi); Hi = DAG.getNode(ISD::BUILD_PAIR, VT, Lo, Hi); From gohman at apple.com Mon Feb 25 15:57:05 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 25 Feb 2008 21:57:05 -0000 Subject: [llvm-commits] [llvm] r47567 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Message-ID: <200802252157.m1PLv5vJ031254@zion.cs.uiuc.edu> Author: djg Date: Mon Feb 25 15:57:04 2008 New Revision: 47567 URL: http://llvm.org/viewvc/llvm-project?rev=47567&view=rev Log: Remove the hack that turned an {S,U}MUL_LOHI with an unused high result into a MUL late in the X86 codegen process. ISD::MUL is once again Legal on X86, so this is no longer needed. And, the hack was suboptimal; see PR1874 for details. Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=47567&r1=47566&r2=47567&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Feb 25 15:57:04 2008 @@ -1224,15 +1224,6 @@ SDOperand N0 = Node->getOperand(0); SDOperand N1 = Node->getOperand(1); - // There are several forms of IMUL that just return the low part and - // don't have fixed-register operands. If we don't need the high part, - // use these instead. They can be selected with the generated ISel code. - if (NVT != MVT::i8 && - N.getValue(1).use_empty()) { - N = CurDAG->getNode(ISD::MUL, NVT, N0, N1); - break; - } - bool isSigned = Opcode == ISD::SMUL_LOHI; if (!isSigned) switch (NVT) { From gohman at apple.com Mon Feb 25 16:15:56 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 25 Feb 2008 22:15:56 -0000 Subject: [llvm-commits] [llvm] r47569 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Message-ID: <200802252215.m1PMFukG031897@zion.cs.uiuc.edu> Author: djg Date: Mon Feb 25 16:15:55 2008 New Revision: 47569 URL: http://llvm.org/viewvc/llvm-project?rev=47569&view=rev Log: Add an assert to verify that we don't see an {S,U}MUL_LOHI with an unused high value. Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=47569&r1=47568&r2=47569&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Feb 25 16:15:55 2008 @@ -1221,6 +1221,9 @@ case ISD::SMUL_LOHI: case ISD::UMUL_LOHI: { + assert(!N.getValue(1).use_empty() && + "A MUL_LOHI with an unused high result should fold to a MUL!"); + SDOperand N0 = Node->getOperand(0); SDOperand N1 = Node->getOperand(1); From gohman at apple.com Mon Feb 25 16:16:29 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 25 Feb 2008 22:16:29 -0000 Subject: [llvm-commits] [llvm] r47570 - /llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Message-ID: <200802252216.m1PMGTQG031922@zion.cs.uiuc.edu> Author: djg Date: Mon Feb 25 16:16:29 2008 New Revision: 47570 URL: http://llvm.org/viewvc/llvm-project?rev=47570&view=rev Log: Factor the assert for indexed loads/stores out of LoadSDNode and StoreSDNode into LSBaseSDNode. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=47570&r1=47569&r2=47570&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Mon Feb 25 16:16:29 2008 @@ -1632,6 +1632,8 @@ Ops[i] = Operands[i]; InitOperands(Ops, NumOperands); assert(Align != 0 && "Loads and stores should have non-zero aligment"); + assert((getOffset().getOpcode() == ISD::UNDEF || isIndexed()) && + "Only indexed loads and stores have a non-undef offset operand"); } const SDOperand &getChain() const { return getOperand(0); } @@ -1682,10 +1684,7 @@ const Value *SV, int O=0, unsigned Align=0, bool Vol=false) : LSBaseSDNode(ISD::LOAD, ChainPtrOff, 3, VTs, AM, LVT, SV, O, Align, Vol), - ExtType(ETy) { - assert((getOffset().getOpcode() == ISD::UNDEF || isIndexed()) && - "Only indexed loads and stores have a non-undef offset operand"); - } + ExtType(ETy) {} public: ISD::LoadExtType getExtensionType() const { return ExtType; } @@ -1712,10 +1711,7 @@ const Value *SV, int O=0, unsigned Align=0, bool Vol=false) : LSBaseSDNode(ISD::STORE, ChainValuePtrOff, 4, VTs, AM, SVT, SV, O, Align, Vol), - IsTruncStore(isTrunc) { - assert((getOffset().getOpcode() == ISD::UNDEF || isIndexed()) && - "Only indexed loads and stores have a non-undef offset operand"); - } + IsTruncStore(isTrunc) {} public: bool isTruncatingStore() const { return IsTruncStore; } From gohman at apple.com Mon Feb 25 16:18:30 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 25 Feb 2008 14:18:30 -0800 Subject: [llvm-commits] [llvm] r47558 - /llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h In-Reply-To: <200802251931.m1PJVLrp026643@zion.cs.uiuc.edu> References: <200802251931.m1PJVLrp026643@zion.cs.uiuc.edu> Message-ID: Thanks Chris! On Feb 25, 2008, at 11:31 AM, Chris Lattner wrote: > Author: lattner > Date: Mon Feb 25 13:31:21 2008 > New Revision: 47558 > > URL: http://llvm.org/viewvc/llvm-project?rev=47558&view=rev > Log: > add LSBaseSDNode::getOffset at Dan's request. > > > Modified: > llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h > > Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=47558&r1=47557&r2=47558&view=diff > From dalej at apple.com Mon Feb 25 16:20:38 2008 From: dalej at apple.com (Dale Johannesen) Date: Mon, 25 Feb 2008 22:20:38 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47571 - /llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Message-ID: <200802252220.m1PMKcig032058@zion.cs.uiuc.edu> Author: johannes Date: Mon Feb 25 16:20:38 2008 New Revision: 47571 URL: http://llvm.org/viewvc/llvm-project?rev=47571&view=rev Log: Don't pretend "all int" aggregates are not going to be passed in memory on x86-32; they are. (Note that llvm_x86_is_all_integer_types accepts vectors, which led to a problem here but is presumably right in other contexts.) Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp?rev=47571&r1=47570&r2=47571&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Mon Feb 25 16:20:38 2008 @@ -746,7 +746,8 @@ if (Bytes == 0) return false; - if (Bytes == GET_MODE_SIZE(SImode) || Bytes == GET_MODE_SIZE(DImode)) { + if (TARGET_64BIT && + (Bytes == GET_MODE_SIZE(SImode) || Bytes == GET_MODE_SIZE(DImode))) { // 32-bit or 64-bit and all elements are integers, not passed in memory. const Type *Ty = ConvertType(TreeType); if (llvm_x86_is_all_integer_types(Ty)) From dalej at apple.com Mon Feb 25 16:29:22 2008 From: dalej at apple.com (Dale Johannesen) Date: Mon, 25 Feb 2008 22:29:22 -0000 Subject: [llvm-commits] [llvm] r47573 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200802252229.m1PMTM63032363@zion.cs.uiuc.edu> Author: johannes Date: Mon Feb 25 16:29:22 2008 New Revision: 47573 URL: http://llvm.org/viewvc/llvm-project?rev=47573&view=rev Log: Revise previous patch per review. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47573&r1=47572&r2=47573&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Feb 25 16:29:22 2008 @@ -5885,6 +5885,7 @@ isa(St->getValue()) && !cast(St->getValue())->isVolatile() && St->getChain().hasOneUse() && !St->isVolatile()) { + SDNode* LdVal = St->getValue().Val; LoadSDNode *Ld = 0; int TokenFactorIndex = -1; SmallVector Ops; @@ -5892,14 +5893,12 @@ // Must be a store of a load. We currently handle two cases: the load // is a direct child, and it's under an intervening TokenFactor. It is // possible to dig deeper under nested TokenFactors. - if (ChainVal == St->getValue().Val) + if (ChainVal == LdVal) Ld = cast(St->getChain()); else if (St->getValue().hasOneUse() && ChainVal->getOpcode() == ISD::TokenFactor) { for (unsigned i=0, e = ChainVal->getNumOperands(); i != e; ++i) { - if (ChainVal->getOperand(i).Val == St->getValue().Val) { - if (TokenFactorIndex != -1) - return SDOperand(); + if (ChainVal->getOperand(i).Val == LdVal) { TokenFactorIndex = i; Ld = cast(St->getValue()); } else From evan.cheng at apple.com Mon Feb 25 16:33:42 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 25 Feb 2008 14:33:42 -0800 Subject: [llvm-commits] [llvm] r47573 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <200802252229.m1PMTM63032363@zion.cs.uiuc.edu> References: <200802252229.m1PMTM63032363@zion.cs.uiuc.edu> Message-ID: Thanks! Evan On Feb 25, 2008, at 2:29 PM, Dale Johannesen wrote: > Author: johannes > Date: Mon Feb 25 16:29:22 2008 > New Revision: 47573 > > URL: http://llvm.org/viewvc/llvm-project?rev=47573&view=rev > Log: > Revise previous patch per review. > > > Modified: > llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47573&r1=47572&r2=47573&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Feb 25 > 16:29:22 2008 > @@ -5885,6 +5885,7 @@ > isa(St->getValue()) && > !cast(St->getValue())->isVolatile() && > St->getChain().hasOneUse() && !St->isVolatile()) { > + SDNode* LdVal = St->getValue().Val; > LoadSDNode *Ld = 0; > int TokenFactorIndex = -1; > SmallVector Ops; > @@ -5892,14 +5893,12 @@ > // Must be a store of a load. We currently handle two cases: > the load > // is a direct child, and it's under an intervening > TokenFactor. It is > // possible to dig deeper under nested TokenFactors. > - if (ChainVal == St->getValue().Val) > + if (ChainVal == LdVal) > Ld = cast(St->getChain()); > else if (St->getValue().hasOneUse() && > ChainVal->getOpcode() == ISD::TokenFactor) { > for (unsigned i=0, e = ChainVal->getNumOperands(); i != e; + > +i) { > - if (ChainVal->getOperand(i).Val == St->getValue().Val) { > - if (TokenFactorIndex != -1) > - return SDOperand(); > + if (ChainVal->getOperand(i).Val == LdVal) { > TokenFactorIndex = i; > Ld = cast(St->getValue()); > } else > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Mon Feb 25 16:38:07 2008 From: clattner at apple.com (Chris Lattner) Date: Mon, 25 Feb 2008 14:38:07 -0800 Subject: [llvm-commits] [llvm] r47569 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp In-Reply-To: <200802252215.m1PMFukG031897@zion.cs.uiuc.edu> References: <200802252215.m1PMFukG031897@zion.cs.uiuc.edu> Message-ID: <66DA1152-0D72-414F-9930-3CF96BCE5652@apple.com> On Feb 25, 2008, at 2:15 PM, Dan Gohman wrote: > Author: djg > Date: Mon Feb 25 16:15:55 2008 > New Revision: 47569 > > URL: http://llvm.org/viewvc/llvm-project?rev=47569&view=rev > Log: > Add an assert to verify that we don't see an > {S,U}MUL_LOHI with an unused high value. Hey Dan, Is this a correctness or a performance thing? If we chose to turn of the dag combiner at -O0, could this assertion get triggered? -Chris > > > Modified: > llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp > > Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=47569&r1=47568&r2=47569&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Feb 25 > 16:15:55 2008 > @@ -1221,6 +1221,9 @@ > > case ISD::SMUL_LOHI: > case ISD::UMUL_LOHI: { > + assert(!N.getValue(1).use_empty() && > + "A MUL_LOHI with an unused high result should fold to > a MUL!"); > + > SDOperand N0 = Node->getOperand(0); > SDOperand N1 = Node->getOperand(1); > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From alenhar2 at cs.uiuc.edu Mon Feb 25 16:41:56 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Mon, 25 Feb 2008 22:41:56 -0000 Subject: [llvm-commits] [llvm] r47574 - /llvm/trunk/Makefile.rules Message-ID: <200802252241.m1PMfu5d032727@zion.cs.uiuc.edu> Author: alenhar2 Date: Mon Feb 25 16:41:55 2008 New Revision: 47574 URL: http://llvm.org/viewvc/llvm-project?rev=47574&view=rev Log: when making bytecode modules, link as library Modified: llvm/trunk/Makefile.rules Modified: llvm/trunk/Makefile.rules URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile.rules?rev=47574&r1=47573&r2=47574&view=diff ============================================================================== --- llvm/trunk/Makefile.rules (original) +++ llvm/trunk/Makefile.rules Mon Feb 25 16:41:55 2008 @@ -728,7 +728,7 @@ else Module := $(LibDir)/$(MODULE_NAME).bc -LinkModule := $(LLVMLD) -L$(CFERuntimeLibDir) +LinkModule := $(LLVMLD) -L$(CFERuntimeLibDir) -r ifdef EXPORTED_SYMBOL_FILE From gohman at apple.com Mon Feb 25 16:42:25 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 25 Feb 2008 14:42:25 -0800 Subject: [llvm-commits] [llvm] r47569 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp In-Reply-To: <66DA1152-0D72-414F-9930-3CF96BCE5652@apple.com> References: <200802252215.m1PMFukG031897@zion.cs.uiuc.edu> <66DA1152-0D72-414F-9930-3CF96BCE5652@apple.com> Message-ID: <8861B427-9140-40FF-8FD4-03D78ACEE31D@apple.com> On Feb 25, 2008, at 2:38 PM, Chris Lattner wrote: > > On Feb 25, 2008, at 2:15 PM, Dan Gohman wrote: > >> Author: djg >> Date: Mon Feb 25 16:15:55 2008 >> New Revision: 47569 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=47569&view=rev >> Log: >> Add an assert to verify that we don't see an >> {S,U}MUL_LOHI with an unused high value. > > Hey Dan, > > Is this a correctness or a performance thing? If we chose to turn of > the dag combiner at -O0, could this assertion get triggered? > It's a performance thing. I guess it's theoretically possible for a dead umulh to go through codegen at -O0, in which case this would trip. I'll take it out. Dan From gohman at apple.com Mon Feb 25 16:43:48 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 25 Feb 2008 22:43:48 -0000 Subject: [llvm-commits] [llvm] r47575 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Message-ID: <200802252243.m1PMhmrE000323@zion.cs.uiuc.edu> Author: djg Date: Mon Feb 25 16:43:48 2008 New Revision: 47575 URL: http://llvm.org/viewvc/llvm-project?rev=47575&view=rev Log: Revert the assert for MUL_LOHI with an unused high result; Chris pointed out that this isn't correct at -O0. Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=47575&r1=47574&r2=47575&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Feb 25 16:43:48 2008 @@ -1221,9 +1221,6 @@ case ISD::SMUL_LOHI: case ISD::UMUL_LOHI: { - assert(!N.getValue(1).use_empty() && - "A MUL_LOHI with an unused high result should fold to a MUL!"); - SDOperand N0 = Node->getOperand(0); SDOperand N1 = Node->getOperand(1); From resistor at mac.com Mon Feb 25 17:10:24 2008 From: resistor at mac.com (Owen Anderson) Date: Mon, 25 Feb 2008 17:10:24 -0600 Subject: [llvm-commits] [llvm] r47541 - in /llvm/trunk: lib/Transforms/Scalar/GVN.cpp test/Transforms/GVN/2008-02-24-NonDominatedMemcpy.ll test/Transforms/GVN/memcpy.ll In-Reply-To: <200802251016.19166.baldrick@free.fr> References: <200802250040.m1P0egAO015954@zion.cs.uiuc.edu> <200802251016.19166.baldrick@free.fr> Message-ID: <38069E48-5B16-4C4D-BFA7-2D2967489206@mac.com> Possibly. I'll check. --Owen On Feb 25, 2008, at 3:16 AM, Duncan Sands wrote: > Hi Owen, > >> Fix an issue where GVN would try to use an instruction before its >> definition when performing return slot optimization. > > doesn't the memcpy+memcpy optimization potentially have the same > problem? > > Ciao, > > Duncan. > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type: application/pkcs7-signature Size: 2555 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080225/2ea89e3f/attachment.bin From eli.friedman at gmail.com Mon Feb 25 17:35:32 2008 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 25 Feb 2008 23:35:32 -0000 Subject: [llvm-commits] [llvm] r47576 - /llvm/trunk/include/llvm/ADT/OwningPtr.h Message-ID: <200802252335.m1PNZWr0001935@zion.cs.uiuc.edu> Author: efriedma Date: Mon Feb 25 17:35:32 2008 New Revision: 47576 URL: http://llvm.org/viewvc/llvm-project?rev=47576&view=rev Log: Add missing include (for ptrdiff_t). Modified: llvm/trunk/include/llvm/ADT/OwningPtr.h Modified: llvm/trunk/include/llvm/ADT/OwningPtr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/OwningPtr.h?rev=47576&r1=47575&r2=47576&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/OwningPtr.h (original) +++ llvm/trunk/include/llvm/ADT/OwningPtr.h Mon Feb 25 17:35:32 2008 @@ -15,6 +15,7 @@ #define LLVM_ADT_OWNING_PTR_H #include +#include namespace llvm { From dpatel at apple.com Mon Feb 25 18:12:13 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 00:12:13 -0000 Subject: [llvm-commits] [llvm] r47577 - in /llvm/trunk: include/llvm/Instructions.h lib/VMCore/Instructions.cpp Message-ID: <200802260012.m1Q0CDae002925@zion.cs.uiuc.edu> Author: dpatel Date: Mon Feb 25 18:12:13 2008 New Revision: 47577 URL: http://llvm.org/viewvc/llvm-project?rev=47577&view=rev Log: Pass const vectors by reference. Modified: llvm/trunk/include/llvm/Instructions.h llvm/trunk/lib/VMCore/Instructions.cpp Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=47577&r1=47576&r2=47577&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Mon Feb 25 18:12:13 2008 @@ -1381,7 +1381,7 @@ class ReturnInst : public TerminatorInst { ReturnInst(const ReturnInst &RI); void init(Value *RetVal); - void init(std::vector &RetVals); + void init(const std::vector &RetVals); public: // ReturnInst constructors: @@ -1397,9 +1397,9 @@ // if it was passed NULL. explicit ReturnInst(Value *retVal = 0, Instruction *InsertBefore = 0); ReturnInst(Value *retVal, BasicBlock *InsertAtEnd); - ReturnInst(std::vector &retVals); - ReturnInst(std::vector &retVals, Instruction *InsertBefore); - ReturnInst(std::vector &retVals, BasicBlock *InsertAtEnd); + ReturnInst(const std::vector &retVals); + ReturnInst(const std::vector &retVals, Instruction *InsertBefore); + ReturnInst(const std::vector &retVals, BasicBlock *InsertAtEnd); explicit ReturnInst(BasicBlock *InsertAtEnd); virtual ~ReturnInst(); Modified: llvm/trunk/lib/VMCore/Instructions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=47577&r1=47576&r2=47577&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instructions.cpp (original) +++ llvm/trunk/lib/VMCore/Instructions.cpp Mon Feb 25 18:12:13 2008 @@ -592,15 +592,15 @@ : TerminatorInst(Type::VoidTy, Instruction::Ret, OperandList, 0, InsertAtEnd) { } -ReturnInst::ReturnInst(std::vector &retVals, Instruction *InsertBefore) +ReturnInst::ReturnInst(const std::vector &retVals, Instruction *InsertBefore) : TerminatorInst(Type::VoidTy, Instruction::Ret, OperandList, retVals.size(), InsertBefore) { init(retVals); } -ReturnInst::ReturnInst(std::vector &retVals, BasicBlock *InsertAtEnd) +ReturnInst::ReturnInst(const std::vector &retVals, BasicBlock *InsertAtEnd) : TerminatorInst(Type::VoidTy, Instruction::Ret, OperandList, retVals.size(), InsertAtEnd) { init(retVals); } -ReturnInst::ReturnInst(std::vector &retVals) +ReturnInst::ReturnInst(const std::vector &retVals) : TerminatorInst(Type::VoidTy, Instruction::Ret, OperandList, retVals.size()) { init(retVals); } @@ -615,7 +615,7 @@ } } -void ReturnInst::init(std::vector &retVals) { +void ReturnInst::init(const std::vector &retVals) { if (retVals.empty()) return; From dpatel at apple.com Mon Feb 25 19:29:33 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 01:29:33 -0000 Subject: [llvm-commits] [llvm] r47583 - in /llvm/trunk: lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Writer/BitcodeWriter.cpp test/Assembler/2008-02-20-MultipleReturnValue.ll Message-ID: <200802260129.m1Q1TXlK005059@zion.cs.uiuc.edu> Author: dpatel Date: Mon Feb 25 19:29:32 2008 New Revision: 47583 URL: http://llvm.org/viewvc/llvm-project?rev=47583&view=rev Log: Update bitcode reader and writer to handle multiple return values. Take 2. Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp llvm/trunk/test/Assembler/2008-02-20-MultipleReturnValue.ll Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=47583&r1=47582&r2=47583&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Mon Feb 25 19:29:32 2008 @@ -1337,17 +1337,24 @@ } case bitc::FUNC_CODE_INST_RET: // RET: [opty,opval] - if (Record.empty()) { - I = new ReturnInst(); - break; - } else { - unsigned OpNum = 0; - Value *Op; - if (getValueTypePair(Record, OpNum, NextValueNo, Op) || - OpNum != Record.size()) - return Error("Invalid RET record"); - I = new ReturnInst(Op); - break; + { + unsigned Size = Record.size(); + if (Size == 0) { + I = new ReturnInst(); + break; + } else { + unsigned OpNum = 0; + std::vector Vs; + do { + Value *Op = NULL; + if (getValueTypePair(Record, OpNum, NextValueNo, Op)) + return Error("Invalid RET record"); + Vs.push_back(Op); + } while(OpNum != Record.size()); + + I = new ReturnInst(Vs); + break; + } } case bitc::FUNC_CODE_INST_BR: { // BR: [bb#, bb#, opval] or [bb#] if (Record.size() != 1 && Record.size() != 3) Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=47583&r1=47582&r2=47583&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Mon Feb 25 19:29:32 2008 @@ -747,15 +747,24 @@ case Instruction::GetResult: Code = bitc::FUNC_CODE_INST_GETRESULT; PushValueAndType(I.getOperand(0), InstID, Vals, VE); - Vals.push_back(Log2_32(cast(I).getIndex())+1); + Vals.push_back(cast(I).getIndex()); break; - case Instruction::Ret: - Code = bitc::FUNC_CODE_INST_RET; - if (!I.getNumOperands()) - AbbrevToUse = FUNCTION_INST_RET_VOID_ABBREV; - else if (!PushValueAndType(I.getOperand(0), InstID, Vals, VE)) - AbbrevToUse = FUNCTION_INST_RET_VAL_ABBREV; + case Instruction::Ret: + { + Code = bitc::FUNC_CODE_INST_RET; + unsigned NumOperands = I.getNumOperands(); + // printf ("dpatel write %d\n", NumOperands); + if (NumOperands == 0) + AbbrevToUse = FUNCTION_INST_RET_VOID_ABBREV; + else if (NumOperands == 1) { + if (!PushValueAndType(I.getOperand(0), InstID, Vals, VE)) + AbbrevToUse = FUNCTION_INST_RET_VAL_ABBREV; + } else { + for (unsigned i = 0, e = NumOperands; i != e; ++i) + PushValueAndType(I.getOperand(i), InstID, Vals, VE); + } + } break; case Instruction::Br: Code = bitc::FUNC_CODE_INST_BR; Modified: llvm/trunk/test/Assembler/2008-02-20-MultipleReturnValue.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/2008-02-20-MultipleReturnValue.ll?rev=47583&r1=47582&r2=47583&view=diff ============================================================================== --- llvm/trunk/test/Assembler/2008-02-20-MultipleReturnValue.ll (original) +++ llvm/trunk/test/Assembler/2008-02-20-MultipleReturnValue.ll Mon Feb 25 19:29:32 2008 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s -disable-output +; RUN: llvm-as < %s | opt -verify | llvm-dis | llvm-as -disable-output define {i32, i8} @foo(i32 %p) { ret i32 1, i8 2 From dpatel at apple.com Mon Feb 25 19:42:38 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 01:42:38 -0000 Subject: [llvm-commits] [llvm] r47585 - /llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Message-ID: <200802260142.m1Q1gcMw005470@zion.cs.uiuc.edu> Author: dpatel Date: Mon Feb 25 19:42:38 2008 New Revision: 47585 URL: http://llvm.org/viewvc/llvm-project?rev=47585&view=rev Log: Remove debugging help. Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=47585&r1=47584&r2=47585&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Mon Feb 25 19:42:38 2008 @@ -754,7 +754,6 @@ { Code = bitc::FUNC_CODE_INST_RET; unsigned NumOperands = I.getNumOperands(); - // printf ("dpatel write %d\n", NumOperands); if (NumOperands == 0) AbbrevToUse = FUNCTION_INST_RET_VOID_ABBREV; else if (NumOperands == 1) { From evan.cheng at apple.com Mon Feb 25 20:33:44 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 26 Feb 2008 02:33:44 -0000 Subject: [llvm-commits] [llvm] r47587 - in /llvm/trunk: include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/CodeGen/SelectionDAG/TargetLowering.cpp Message-ID: <200802260233.m1Q2Xi3X006938@zion.cs.uiuc.edu> Author: evancheng Date: Mon Feb 25 20:33:44 2008 New Revision: 47587 URL: http://llvm.org/viewvc/llvm-project?rev=47587&view=rev Log: Refactor inline asm constraint matching code out of SDIsel into TargetLowering. Modified: llvm/trunk/include/llvm/Target/TargetLowering.h llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Modified: llvm/trunk/include/llvm/Target/TargetLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=47587&r1=47586&r2=47587&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) +++ llvm/trunk/include/llvm/Target/TargetLowering.h Mon Feb 25 20:33:44 2008 @@ -22,6 +22,8 @@ #ifndef LLVM_TARGET_TARGETLOWERING_H #define LLVM_TARGET_TARGETLOWERING_H +#include "llvm/Constants.h" +#include "llvm/InlineAsm.h" #include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/CodeGen/RuntimeLibcalls.h" #include "llvm/ADT/APFloat.h" @@ -992,11 +994,98 @@ C_Unknown // Unsupported constraint. }; + /// AsmOperandInfo - This contains information for each constraint that we are + /// lowering. + struct AsmOperandInfo : public InlineAsm::ConstraintInfo { + /// ConstraintCode - This contains the actual string for the code, like "m". + std::string ConstraintCode; + + /// ConstraintType - Information about the constraint code, e.g. Register, + /// RegisterClass, Memory, Other, Unknown. + TargetLowering::ConstraintType ConstraintType; + + /// CallOperandval - If this is the result output operand or a + /// clobber, this is null, otherwise it is the incoming operand to the + /// CallInst. This gets modified as the asm is processed. + Value *CallOperandVal; + + /// ConstraintVT - The ValueType for the operand value. + MVT::ValueType ConstraintVT; + + AsmOperandInfo(const InlineAsm::ConstraintInfo &info) + : InlineAsm::ConstraintInfo(info), + ConstraintType(TargetLowering::C_Unknown), + CallOperandVal(0), ConstraintVT(MVT::Other) { + } + + /// getConstraintGenerality - Return an integer indicating how general CT is. + unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) { + switch (CT) { + default: assert(0 && "Unknown constraint type!"); + case TargetLowering::C_Other: + case TargetLowering::C_Unknown: + return 0; + case TargetLowering::C_Register: + return 1; + case TargetLowering::C_RegisterClass: + return 2; + case TargetLowering::C_Memory: + return 3; + } + } + + /// ComputeConstraintToUse - Determines the constraint code and constraint + /// type to use. + void ComputeConstraintToUse(const TargetLowering &TLI) { + assert(!Codes.empty() && "Must have at least one constraint"); + + std::string *Current = &Codes[0]; + TargetLowering::ConstraintType CurType = TLI.getConstraintType(*Current); + if (Codes.size() == 1) { // Single-letter constraints ('r') are very common. + ConstraintCode = *Current; + ConstraintType = CurType; + } else { + unsigned CurGenerality = getConstraintGenerality(CurType); + + // If we have multiple constraints, try to pick the most general one ahead + // of time. This isn't a wonderful solution, but handles common cases. + for (unsigned j = 1, e = Codes.size(); j != e; ++j) { + TargetLowering::ConstraintType ThisType = TLI.getConstraintType(Codes[j]); + unsigned ThisGenerality = getConstraintGenerality(ThisType); + if (ThisGenerality > CurGenerality) { + // This constraint letter is more general than the previous one, + // use it. + CurType = ThisType; + Current = &Codes[j]; + CurGenerality = ThisGenerality; + } + } + + ConstraintCode = *Current; + ConstraintType = CurType; + } + + if (ConstraintCode == "X" && CallOperandVal) { + if (isa(CallOperandVal) || isa(CallOperandVal)) + return; + // This matches anything. Labels and constants we handle elsewhere + // ('X' is the only thing that matches labels). Otherwise, try to + // resolve it to something we know about by looking at the actual + // operand type. + std::string s = ""; + TLI.lowerXConstraint(ConstraintVT, s); + if (s!="") { + ConstraintCode = s; + ConstraintType = TLI.getConstraintType(ConstraintCode); + } + } + } + }; + /// getConstraintType - Given a constraint, return the type of constraint it /// is for this target. virtual ConstraintType getConstraintType(const std::string &Constraint) const; - /// getRegClassForInlineAsmConstraint - Given a constraint letter (e.g. "r"), /// return a list of registers that can be used to satisfy the constraint. /// This should only be used for C_RegisterClass constraints. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=47587&r1=47586&r2=47587&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Feb 25 20:33:44 2008 @@ -87,7 +87,7 @@ createDefaultScheduler); } // namespace -namespace { struct AsmOperandInfo; } +namespace { struct SDISelAsmOperandInfo; } namespace { /// RegsForValue - This struct represents the physical registers that a @@ -492,7 +492,7 @@ N = NewN; } - void GetRegistersForValue(AsmOperandInfo &OpInfo, bool HasEarlyClobber, + void GetRegistersForValue(SDISelAsmOperandInfo &OpInfo, bool HasEarlyClobber, std::set &OutputRegs, std::set &InputRegs); @@ -3347,35 +3347,20 @@ namespace { /// AsmOperandInfo - This contains information for each constraint that we are /// lowering. -struct AsmOperandInfo : public InlineAsm::ConstraintInfo { - /// ConstraintCode - This contains the actual string for the code, like "m". - std::string ConstraintCode; - - /// ConstraintType - Information about the constraint code, e.g. Register, - /// RegisterClass, Memory, Other, Unknown. - TargetLowering::ConstraintType ConstraintType; - - /// CallOperand/CallOperandval - If this is the result output operand or a - /// clobber, this is null, otherwise it is the incoming operand to the - /// CallInst. This gets modified as the asm is processed. +struct SDISelAsmOperandInfo : public TargetLowering::AsmOperandInfo { + /// CallOperand - If this is the result output operand or a clobber + /// this is null, otherwise it is the incoming operand to the CallInst. + /// This gets modified as the asm is processed. SDOperand CallOperand; - Value *CallOperandVal; - - /// ConstraintVT - The ValueType for the operand value. - MVT::ValueType ConstraintVT; - + /// AssignedRegs - If this is a register or register class operand, this /// contains the set of register corresponding to the operand. RegsForValue AssignedRegs; - AsmOperandInfo(const InlineAsm::ConstraintInfo &info) - : InlineAsm::ConstraintInfo(info), - ConstraintType(TargetLowering::C_Unknown), - CallOperand(0,0), CallOperandVal(0), ConstraintVT(MVT::Other) { + SDISelAsmOperandInfo(const InlineAsm::ConstraintInfo &info) + : TargetLowering::AsmOperandInfo(info), CallOperand(0,0) { } - void ComputeConstraintToUse(const TargetLowering &TLI); - /// MarkAllocatedRegs - Once AssignedRegs is set, mark the assigned registers /// busy in OutputRegs/InputRegs. void MarkAllocatedRegs(bool isOutReg, bool isInReg, @@ -3406,67 +3391,6 @@ }; } // end anon namespace. -/// getConstraintGenerality - Return an integer indicating how general CT is. -static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) { - switch (CT) { - default: assert(0 && "Unknown constraint type!"); - case TargetLowering::C_Other: - case TargetLowering::C_Unknown: - return 0; - case TargetLowering::C_Register: - return 1; - case TargetLowering::C_RegisterClass: - return 2; - case TargetLowering::C_Memory: - return 3; - } -} - -void AsmOperandInfo::ComputeConstraintToUse(const TargetLowering &TLI) { - assert(!Codes.empty() && "Must have at least one constraint"); - - std::string *Current = &Codes[0]; - TargetLowering::ConstraintType CurType = TLI.getConstraintType(*Current); - if (Codes.size() == 1) { // Single-letter constraints ('r') are very common. - ConstraintCode = *Current; - ConstraintType = CurType; - } else { - unsigned CurGenerality = getConstraintGenerality(CurType); - - // If we have multiple constraints, try to pick the most general one ahead - // of time. This isn't a wonderful solution, but handles common cases. - for (unsigned j = 1, e = Codes.size(); j != e; ++j) { - TargetLowering::ConstraintType ThisType = TLI.getConstraintType(Codes[j]); - unsigned ThisGenerality = getConstraintGenerality(ThisType); - if (ThisGenerality > CurGenerality) { - // This constraint letter is more general than the previous one, - // use it. - CurType = ThisType; - Current = &Codes[j]; - CurGenerality = ThisGenerality; - } - } - - ConstraintCode = *Current; - ConstraintType = CurType; - } - - if (ConstraintCode == "X") { - if (isa(CallOperandVal) || isa(CallOperandVal)) - return; - // This matches anything. Labels and constants we handle elsewhere - // ('X' is the only thing that matches labels). Otherwise, try to - // resolve it to something we know about by looking at the actual - // operand type. - std::string s = ""; - TLI.lowerXConstraint(ConstraintVT, s); - if (s!="") { - ConstraintCode = s; - ConstraintType = TLI.getConstraintType(ConstraintCode); - } - } -} - /// GetRegistersForValue - Assign registers (virtual or physical) for the /// specified operand. We prefer to assign virtual registers, to allow the @@ -3480,7 +3404,7 @@ /// Input and OutputRegs are the set of already allocated physical registers. /// void SelectionDAGLowering:: -GetRegistersForValue(AsmOperandInfo &OpInfo, bool HasEarlyClobber, +GetRegistersForValue(SDISelAsmOperandInfo &OpInfo, bool HasEarlyClobber, std::set &OutputRegs, std::set &InputRegs) { // Compute whether this value requires an input register, an output register, @@ -3648,7 +3572,7 @@ InlineAsm *IA = cast(CS.getCalledValue()); /// ConstraintOperands - Information about all of the constraints. - std::vector ConstraintOperands; + std::vector ConstraintOperands; SDOperand Chain = getRoot(); SDOperand Flag; @@ -3667,8 +3591,8 @@ unsigned ArgNo = 0; // ArgNo - The argument of the CallInst. for (unsigned i = 0, e = ConstraintInfos.size(); i != e; ++i) { - ConstraintOperands.push_back(AsmOperandInfo(ConstraintInfos[i])); - AsmOperandInfo &OpInfo = ConstraintOperands.back(); + ConstraintOperands.push_back(SDISelAsmOperandInfo(ConstraintInfos[i])); + SDISelAsmOperandInfo &OpInfo = ConstraintOperands.back(); MVT::ValueType OpVT = MVT::Other; @@ -3798,7 +3722,7 @@ // Second pass - Loop over all of the operands, assigning virtual or physregs // to registerclass operands. for (unsigned i = 0, e = ConstraintOperands.size(); i != e; ++i) { - AsmOperandInfo &OpInfo = ConstraintOperands[i]; + SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i]; // C_Register operands have already been allocated, Other/Memory don't need // to be. @@ -3821,7 +3745,7 @@ std::vector > IndirectStoresToEmit; for (unsigned i = 0, e = ConstraintOperands.size(); i != e; ++i) { - AsmOperandInfo &OpInfo = ConstraintOperands[i]; + SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i]; switch (OpInfo.Type) { case InlineAsm::isOutput: { Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47587&r1=47586&r2=47587&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Mon Feb 25 20:33:44 2008 @@ -11,18 +11,18 @@ // //===----------------------------------------------------------------------===// +#include "llvm/Target/TargetAsmInfo.h" #include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetSubtarget.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetRegisterInfo.h" +#include "llvm/CallingConv.h" #include "llvm/DerivedTypes.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/ADT/StringExtras.h" #include "llvm/ADT/STLExtras.h" #include "llvm/Support/MathExtras.h" -#include "llvm/Target/TargetAsmInfo.h" -#include "llvm/CallingConv.h" using namespace llvm; /// InitLibcallNames - Set default libcall names. From evan.cheng at apple.com Mon Feb 25 20:42:37 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 26 Feb 2008 02:42:37 -0000 Subject: [llvm-commits] [llvm] r47589 - in /llvm/trunk: lib/Transforms/Scalar/CodeGenPrepare.cpp test/CodeGen/X86/2008-02-25-InlineAsmBug.ll Message-ID: <200802260242.m1Q2gb0j007225@zion.cs.uiuc.edu> Author: evancheng Date: Mon Feb 25 20:42:37 2008 New Revision: 47589 URL: http://llvm.org/viewvc/llvm-project?rev=47589&view=rev Log: Fix PR2076. CodeGenPrepare now sinks address computation for inline asm memory operands into inline asm block. Added: llvm/trunk/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll Modified: llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp Modified: llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp?rev=47589&r1=47588&r2=47589&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp Mon Feb 25 20:42:37 2008 @@ -18,6 +18,7 @@ #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" #include "llvm/Function.h" +#include "llvm/InlineAsm.h" #include "llvm/Instructions.h" #include "llvm/Pass.h" #include "llvm/Target/TargetAsmInfo.h" @@ -28,6 +29,7 @@ #include "llvm/Transforms/Utils/Local.h" #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/SmallSet.h" +#include "llvm/Support/CallSite.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" @@ -58,6 +60,8 @@ bool OptimizeLoadStoreInst(Instruction *I, Value *Addr, const Type *AccessTy, DenseMap &SunkAddrs); + bool OptimizeInlineAsmInst(Instruction *I, CallSite CS, + DenseMap &SunkAddrs); bool OptimizeExtUses(Instruction *I); }; } @@ -928,6 +932,54 @@ return true; } +/// OptimizeInlineAsmInst - If there are any memory operands, use +/// OptimizeLoadStoreInt to sink their address computing into the block when +/// possible / profitable. +bool CodeGenPrepare::OptimizeInlineAsmInst(Instruction *I, CallSite CS, + DenseMap &SunkAddrs) { + bool MadeChange = false; + InlineAsm *IA = cast(CS.getCalledValue()); + + // Do a prepass over the constraints, canonicalizing them, and building up the + // ConstraintOperands list. + std::vector + ConstraintInfos = IA->ParseConstraints(); + + /// ConstraintOperands - Information about all of the constraints. + std::vector ConstraintOperands; + unsigned ArgNo = 0; // ArgNo - The argument of the CallInst. + for (unsigned i = 0, e = ConstraintInfos.size(); i != e; ++i) { + ConstraintOperands. + push_back(TargetLowering::AsmOperandInfo(ConstraintInfos[i])); + TargetLowering::AsmOperandInfo &OpInfo = ConstraintOperands.back(); + + // Compute the value type for each operand. + switch (OpInfo.Type) { + case InlineAsm::isOutput: + if (OpInfo.isIndirect) + OpInfo.CallOperandVal = CS.getArgument(ArgNo++); + break; + case InlineAsm::isInput: + OpInfo.CallOperandVal = CS.getArgument(ArgNo++); + break; + case InlineAsm::isClobber: + // Nothing to do. + break; + } + + // Compute the constraint code and ConstraintType to use. + OpInfo.ComputeConstraintToUse(*TLI); + + if (OpInfo.ConstraintType == TargetLowering::C_Memory) { + Value *OpVal = OpInfo.CallOperandVal; + MadeChange |= OptimizeLoadStoreInst(I, OpVal, OpVal->getType(), + SunkAddrs); + } + } + + return MadeChange; +} + bool CodeGenPrepare::OptimizeExtUses(Instruction *I) { BasicBlock *DefBB = I->getParent(); @@ -1076,6 +1128,9 @@ TLI->getTargetMachine().getTargetAsmInfo()) { if (TAI->ExpandInlineAsm(CI)) BBI = BB.begin(); + else + // Sink address computing for memory operands into the block. + MadeChange |= OptimizeInlineAsmInst(I, &(*CI), SunkAddrs); } } } Added: llvm/trunk/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll?rev=47589&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll (added) +++ llvm/trunk/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll Mon Feb 25 20:42:37 2008 @@ -0,0 +1,33 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -mattr=+sse2 +; PR2076 + +define void @h264_h_loop_filter_luma_mmx2(i8* %pix, i32 %stride, i32 %alpha, i32 %beta, i8* %tc0) nounwind { +entry: + %tmp164 = getelementptr [16 x i32]* null, i32 0, i32 11 ; [#uses=1] + %tmp169 = getelementptr [16 x i32]* null, i32 0, i32 13 ; [#uses=1] + %tmp174 = getelementptr [16 x i32]* null, i32 0, i32 15 ; [#uses=1] + %tmp154.sum317 = add i32 0, %stride ; [#uses=1] + %tmp154.sum315 = mul i32 %stride, 6 ; [#uses=1] + %tmp154.sum = mul i32 %stride, 7 ; [#uses=1] + %pix_addr.0327.rec = mul i32 0, 0 ; [#uses=4] + br i1 false, label %bb292, label %bb32 + +bb32: ; preds = %entry + %pix_addr.0327.sum340 = add i32 %pix_addr.0327.rec, 0 ; [#uses=1] + %tmp154 = getelementptr i8* %pix, i32 %pix_addr.0327.sum340 ; [#uses=1] + %tmp177178 = bitcast i8* %tmp154 to i32* ; [#uses=1] + %pix_addr.0327.sum339 = add i32 %pix_addr.0327.rec, %tmp154.sum317 ; [#uses=1] + %tmp181 = getelementptr i8* %pix, i32 %pix_addr.0327.sum339 ; [#uses=1] + %tmp181182 = bitcast i8* %tmp181 to i32* ; [#uses=1] + %pix_addr.0327.sum338 = add i32 %pix_addr.0327.rec, %tmp154.sum315 ; [#uses=1] + %tmp186 = getelementptr i8* %pix, i32 %pix_addr.0327.sum338 ; [#uses=1] + %tmp186187 = bitcast i8* %tmp186 to i32* ; [#uses=1] + %pix_addr.0327.sum337 = add i32 %pix_addr.0327.rec, %tmp154.sum ; [#uses=1] + %tmp191 = getelementptr i8* %pix, i32 %pix_addr.0327.sum337 ; [#uses=1] + %tmp191192 = bitcast i8* %tmp191 to i32* ; [#uses=1] + call void asm sideeffect "movd $4, %mm0 \0A\09movd $5, %mm1 \0A\09movd $6, %mm2 \0A\09movd $7, %mm3 \0A\09punpcklbw %mm1, %mm0 \0A\09punpcklbw %mm3, %mm2 \0A\09movq %mm0, %mm1 \0A\09punpcklwd %mm2, %mm0 \0A\09punpckhwd %mm2, %mm1 \0A\09movd %mm0, $0 \0A\09punpckhdq %mm0, %mm0 \0A\09movd %mm0, $1 \0A\09movd %mm1, $2 \0A\09punpckhdq %mm1, %mm1 \0A\09movd %mm1, $3 \0A\09", "=*m,=*m,=*m,=*m,*m,*m,*m,*m,~{dirflag},~{fpsr},~{flags}"( i32* null, i32* %tmp164, i32* %tmp169, i32* %tmp174, i32* %tmp177178, i32* %tmp181182, i32* %tmp186187, i32* %tmp191192 ) nounwind + unreachable + +bb292: ; preds = %entry + ret void +} From kledzik at apple.com Mon Feb 25 19:36:52 2008 From: kledzik at apple.com (Nick Kledzik) Date: Tue, 26 Feb 2008 01:36:52 -0000 Subject: [llvm-commits] [llvm] r47584 - /llvm/trunk/docs/LinkTimeOptimization.html Message-ID: <200802260136.m1Q1aqZ1005304@zion.cs.uiuc.edu> Author: kledzik Date: Mon Feb 25 19:36:52 2008 New Revision: 47584 URL: http://llvm.org/viewvc/llvm-project?rev=47584&view=rev Log: test svn commit capability Modified: llvm/trunk/docs/LinkTimeOptimization.html Modified: llvm/trunk/docs/LinkTimeOptimization.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LinkTimeOptimization.html?rev=47584&r1=47583&r2=47584&view=diff ============================================================================== --- llvm/trunk/docs/LinkTimeOptimization.html (original) +++ llvm/trunk/docs/LinkTimeOptimization.html Mon Feb 25 19:36:52 2008 @@ -390,3 +390,4 @@ + From sabre at nondot.org Tue Feb 26 01:04:55 2008 From: sabre at nondot.org (Chris Lattner) Date: Tue, 26 Feb 2008 07:04:55 -0000 Subject: [llvm-commits] [llvm] r47591 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/Generic/2008-02-25-NegateZero.ll Message-ID: <200802260704.m1Q74tng014659@zion.cs.uiuc.edu> Author: lattner Date: Tue Feb 26 01:04:54 2008 New Revision: 47591 URL: http://llvm.org/viewvc/llvm-project?rev=47591&view=rev Log: Fix isNegatibleForFree to not return true for ConstantFP nodes after legalize. Just because a constant is legal (e.g. 0.0 in SSE) doesn't mean that its negated value is legal (-0.0). We could make this stronger by checking to see if the negated constant is actually legal post negation, but it doesn't seem like a big deal. Added: llvm/trunk/test/CodeGen/Generic/2008-02-25-NegateZero.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=47591&r1=47590&r2=47591&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Feb 26 01:04:54 2008 @@ -306,7 +306,8 @@ /// isNegatibleForFree - Return 1 if we can compute the negated form of the /// specified expression for the same cost as the expression itself, or 2 if we /// can compute the negated form more cheaply than the expression itself. -static char isNegatibleForFree(SDOperand Op, unsigned Depth = 0) { +static char isNegatibleForFree(SDOperand Op, bool AfterLegalize, + unsigned Depth = 0) { // No compile time optimizations on this type. if (Op.getValueType() == MVT::ppcf128) return 0; @@ -323,16 +324,18 @@ switch (Op.getOpcode()) { default: return false; case ISD::ConstantFP: - return 1; + // Don't invert constant FP values after legalize. The negated constant + // isn't necessarily legal. + return AfterLegalize ? 0 : 1; case ISD::FADD: // FIXME: determine better conditions for this xform. if (!UnsafeFPMath) return 0; // -(A+B) -> -A - B - if (char V = isNegatibleForFree(Op.getOperand(0), Depth+1)) + if (char V = isNegatibleForFree(Op.getOperand(0), AfterLegalize, Depth+1)) return V; // -(A+B) -> -B - A - return isNegatibleForFree(Op.getOperand(1), Depth+1); + return isNegatibleForFree(Op.getOperand(1), AfterLegalize, Depth+1); case ISD::FSUB: // We can't turn -(A-B) into B-A when we honor signed zeros. if (!UnsafeFPMath) return 0; @@ -345,22 +348,22 @@ if (HonorSignDependentRoundingFPMath()) return 0; // -(X*Y) -> (-X * Y) or (X*-Y) - if (char V = isNegatibleForFree(Op.getOperand(0), Depth+1)) + if (char V = isNegatibleForFree(Op.getOperand(0), AfterLegalize, Depth+1)) return V; - return isNegatibleForFree(Op.getOperand(1), Depth+1); + return isNegatibleForFree(Op.getOperand(1), AfterLegalize, Depth+1); case ISD::FP_EXTEND: case ISD::FP_ROUND: case ISD::FSIN: - return isNegatibleForFree(Op.getOperand(0), Depth+1); + return isNegatibleForFree(Op.getOperand(0), AfterLegalize, Depth+1); } } /// GetNegatedExpression - If isNegatibleForFree returns true, this function /// returns the newly negated expression. static SDOperand GetNegatedExpression(SDOperand Op, SelectionDAG &DAG, - unsigned Depth = 0) { + bool AfterLegalize, unsigned Depth = 0) { // fneg is removable even if it has multiple uses. if (Op.getOpcode() == ISD::FNEG) return Op.getOperand(0); @@ -380,13 +383,15 @@ assert(UnsafeFPMath); // -(A+B) -> -A - B - if (isNegatibleForFree(Op.getOperand(0), Depth+1)) + if (isNegatibleForFree(Op.getOperand(0), AfterLegalize, Depth+1)) return DAG.getNode(ISD::FSUB, Op.getValueType(), - GetNegatedExpression(Op.getOperand(0), DAG, Depth+1), + GetNegatedExpression(Op.getOperand(0), DAG, + AfterLegalize, Depth+1), Op.getOperand(1)); // -(A+B) -> -B - A return DAG.getNode(ISD::FSUB, Op.getValueType(), - GetNegatedExpression(Op.getOperand(1), DAG, Depth+1), + GetNegatedExpression(Op.getOperand(1), DAG, + AfterLegalize, Depth+1), Op.getOperand(0)); case ISD::FSUB: // We can't turn -(A-B) into B-A when we honor signed zeros. @@ -408,21 +413,25 @@ // -(X*Y) -> -X * Y if (isNegatibleForFree(Op.getOperand(0), Depth+1)) return DAG.getNode(Op.getOpcode(), Op.getValueType(), - GetNegatedExpression(Op.getOperand(0), DAG, Depth+1), + GetNegatedExpression(Op.getOperand(0), DAG, + AfterLegalize, Depth+1), Op.getOperand(1)); // -(X*Y) -> X * -Y return DAG.getNode(Op.getOpcode(), Op.getValueType(), Op.getOperand(0), - GetNegatedExpression(Op.getOperand(1), DAG, Depth+1)); + GetNegatedExpression(Op.getOperand(1), DAG, + AfterLegalize, Depth+1)); case ISD::FP_EXTEND: case ISD::FSIN: return DAG.getNode(Op.getOpcode(), Op.getValueType(), - GetNegatedExpression(Op.getOperand(0), DAG, Depth+1)); + GetNegatedExpression(Op.getOperand(0), DAG, + AfterLegalize, Depth+1)); case ISD::FP_ROUND: return DAG.getNode(ISD::FP_ROUND, Op.getValueType(), - GetNegatedExpression(Op.getOperand(0), DAG, Depth+1), + GetNegatedExpression(Op.getOperand(0), DAG, + AfterLegalize, Depth+1), Op.getOperand(1)); } } @@ -3518,11 +3527,13 @@ if (N0CFP && !N1CFP) return DAG.getNode(ISD::FADD, VT, N1, N0); // fold (A + (-B)) -> A-B - if (isNegatibleForFree(N1) == 2) - return DAG.getNode(ISD::FSUB, VT, N0, GetNegatedExpression(N1, DAG)); + if (isNegatibleForFree(N1, AfterLegalize) == 2) + return DAG.getNode(ISD::FSUB, VT, N0, + GetNegatedExpression(N1, DAG, AfterLegalize)); // fold ((-A) + B) -> B-A - if (isNegatibleForFree(N0) == 2) - return DAG.getNode(ISD::FSUB, VT, N1, GetNegatedExpression(N0, DAG)); + if (isNegatibleForFree(N0, AfterLegalize) == 2) + return DAG.getNode(ISD::FSUB, VT, N1, + GetNegatedExpression(N0, DAG, AfterLegalize)); // If allowed, fold (fadd (fadd x, c1), c2) -> (fadd x, (fadd c1, c2)) if (UnsafeFPMath && N1CFP && N0.getOpcode() == ISD::FADD && @@ -3551,13 +3562,14 @@ return DAG.getNode(ISD::FSUB, VT, N0, N1); // fold (0-B) -> -B if (UnsafeFPMath && N0CFP && N0CFP->getValueAPF().isZero()) { - if (isNegatibleForFree(N1)) - return GetNegatedExpression(N1, DAG); + if (isNegatibleForFree(N1, AfterLegalize)) + return GetNegatedExpression(N1, DAG, AfterLegalize); return DAG.getNode(ISD::FNEG, VT, N1); } // fold (A-(-B)) -> A+B - if (isNegatibleForFree(N1)) - return DAG.getNode(ISD::FADD, VT, N0, GetNegatedExpression(N1, DAG)); + if (isNegatibleForFree(N1, AfterLegalize)) + return DAG.getNode(ISD::FADD, VT, N0, + GetNegatedExpression(N1, DAG, AfterLegalize)); return SDOperand(); } @@ -3589,13 +3601,14 @@ return DAG.getNode(ISD::FNEG, VT, N0); // -X * -Y -> X*Y - if (char LHSNeg = isNegatibleForFree(N0)) { - if (char RHSNeg = isNegatibleForFree(N1)) { + if (char LHSNeg = isNegatibleForFree(N0, AfterLegalize)) { + if (char RHSNeg = isNegatibleForFree(N1, AfterLegalize)) { // Both can be negated for free, check to see if at least one is cheaper // negated. if (LHSNeg == 2 || RHSNeg == 2) - return DAG.getNode(ISD::FMUL, VT, GetNegatedExpression(N0, DAG), - GetNegatedExpression(N1, DAG)); + return DAG.getNode(ISD::FMUL, VT, + GetNegatedExpression(N0, DAG, AfterLegalize), + GetNegatedExpression(N1, DAG, AfterLegalize)); } } @@ -3627,13 +3640,14 @@ // -X / -Y -> X*Y - if (char LHSNeg = isNegatibleForFree(N0)) { - if (char RHSNeg = isNegatibleForFree(N1)) { + if (char LHSNeg = isNegatibleForFree(N0, AfterLegalize)) { + if (char RHSNeg = isNegatibleForFree(N1, AfterLegalize)) { // Both can be negated for free, check to see if at least one is cheaper // negated. if (LHSNeg == 2 || RHSNeg == 2) - return DAG.getNode(ISD::FDIV, VT, GetNegatedExpression(N0, DAG), - GetNegatedExpression(N1, DAG)); + return DAG.getNode(ISD::FDIV, VT, + GetNegatedExpression(N0, DAG, AfterLegalize), + GetNegatedExpression(N1, DAG, AfterLegalize)); } } @@ -3837,8 +3851,8 @@ SDOperand DAGCombiner::visitFNEG(SDNode *N) { SDOperand N0 = N->getOperand(0); - if (isNegatibleForFree(N0)) - return GetNegatedExpression(N0, DAG); + if (isNegatibleForFree(N0, AfterLegalize)) + return GetNegatedExpression(N0, DAG, AfterLegalize); // Transform fneg(bitconvert(x)) -> bitconvert(x^sign) to avoid loading // constant pool values. Added: llvm/trunk/test/CodeGen/Generic/2008-02-25-NegateZero.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2008-02-25-NegateZero.ll?rev=47591&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Generic/2008-02-25-NegateZero.ll (added) +++ llvm/trunk/test/CodeGen/Generic/2008-02-25-NegateZero.ll Tue Feb 26 01:04:54 2008 @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc +; rdar://5763967 + +define void @test() { +entry: + %tmp98 = load float* null, align 4 ; [#uses=1] + %tmp106 = load float* null, align 4 ; [#uses=1] + %tmp113 = add float %tmp98, %tmp106 ; [#uses=1] + %tmp119 = sub float %tmp113, 0.000000e+00 ; [#uses=1] + call void (i32, ...)* @foo( i32 0, float 0.000000e+00, float %tmp119 ) nounwind + ret void +} + +declare void @foo(i32, ...) From evan.cheng at apple.com Tue Feb 26 02:03:43 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 26 Feb 2008 08:03:43 -0000 Subject: [llvm-commits] [llvm] r47592 - in /llvm/trunk: lib/CodeGen/SimpleRegisterCoalescing.cpp test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll Message-ID: <200802260803.m1Q83hcf016233@zion.cs.uiuc.edu> Author: evancheng Date: Tue Feb 26 02:03:41 2008 New Revision: 47592 URL: http://llvm.org/viewvc/llvm-project?rev=47592&view=rev Log: This is possible: vr1 = extract_subreg vr2, 3 .. vr3 = extract_subreg vr1, 2 The end result is vr3 is equal to vr2 with subidx 2. Added: llvm/trunk/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=47592&r1=47591&r2=47592&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Tue Feb 26 02:03:41 2008 @@ -457,8 +457,14 @@ O.setSubReg(0); } else { unsigned OldSubIdx = O.getSubReg(); - assert((!SubIdx || !OldSubIdx) && "Conflicting sub-register index!"); - if (SubIdx) + // Sub-register indexes goes from small to large. e.g. + // RAX: 0 -> AL, 1 -> AH, 2 -> AX, 3 -> EAX + // EAX: 0 -> AL, 1 -> AH, 2 -> AX + // So RAX's sub-register 2 is AX, RAX's sub-regsiter 3 is EAX, whose + // sub-register 2 is also AX. + if (SubIdx && OldSubIdx && SubIdx != OldSubIdx) + assert(OldSubIdx < SubIdx && "Conflicting sub-register index!"); + else if (SubIdx) O.setSubReg(SubIdx); O.setReg(DstReg); } Added: llvm/trunk/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll?rev=47592&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll (added) +++ llvm/trunk/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll Tue Feb 26 02:03:41 2008 @@ -0,0 +1,55 @@ +; RUN: llvm-as < %s | llc -march=x86-64 + + %struct.XX = type <{ i8 }> + %struct.YY = type { i64 } + %struct.ZZ = type opaque + +define i8 @f(%struct.XX*** %fontMap, %struct.XX* %uen) signext { +entry: + %tmp45 = add i16 0, 1 ; [#uses=2] + br i1 false, label %bb124, label %bb53 + +bb53: ; preds = %entry + %tmp55 = call %struct.YY** @AA( i64 1, %struct.XX* %uen ) ; <%struct.YY**> [#uses=3] + %tmp2728128 = load %struct.XX** null ; <%struct.XX*> [#uses=1] + %tmp61 = load %struct.YY** %tmp55, align 8 ; <%struct.YY*> [#uses=1] + %tmp62 = getelementptr %struct.YY* %tmp61, i32 0, i32 0 ; [#uses=1] + %tmp63 = load i64* %tmp62, align 8 ; [#uses=1] + %tmp6566 = zext i16 %tmp45 to i64 ; [#uses=1] + %tmp67 = shl i64 %tmp6566, 1 ; [#uses=1] + call void @BB( %struct.YY** %tmp55, i64 %tmp67, i8 signext 0, %struct.XX* %uen ) + %tmp121131 = icmp eq i16 %tmp45, 1 ; [#uses=1] + br i1 %tmp121131, label %bb124, label %bb70.preheader + +bb70.preheader: ; preds = %bb53 + %tmp72 = bitcast %struct.XX* %tmp2728128 to %struct.ZZ*** ; <%struct.ZZ***> [#uses=1] + br label %bb70 + +bb70: ; preds = %bb119, %bb70.preheader + %indvar133 = phi i32 [ %indvar.next134, %bb119 ], [ 0, %bb70.preheader ] ; [#uses=2] + %tmp.135 = trunc i64 %tmp63 to i32 ; [#uses=1] + %tmp136 = shl i32 %indvar133, 1 ; [#uses=1] + %DD = add i32 %tmp136, %tmp.135 ; [#uses=1] + %tmp73 = load %struct.ZZ*** %tmp72, align 8 ; <%struct.ZZ**> [#uses=0] + br i1 false, label %bb119, label %bb77 + +bb77: ; preds = %bb70 + %tmp8384 = trunc i32 %DD to i16 ; [#uses=1] + %tmp85 = sub i16 0, %tmp8384 ; [#uses=1] + store i16 %tmp85, i16* null, align 8 + call void @CC( %struct.YY** %tmp55, i64 0, i64 2, i8* null, %struct.XX* %uen ) + ret i8 0 + +bb119: ; preds = %bb70 + %indvar.next134 = add i32 %indvar133, 1 ; [#uses=1] + br label %bb70 + +bb124: ; preds = %bb53, %entry + ret i8 undef +} + +declare %struct.YY** @AA(i64, %struct.XX*) + +declare void @BB(%struct.YY**, i64, i8 signext , %struct.XX*) + +declare void @CC(%struct.YY**, i64, i64, i8*, %struct.XX*) From isanbard at gmail.com Tue Feb 26 03:18:52 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 26 Feb 2008 01:18:52 -0800 Subject: [llvm-commits] [llvm] r47534 - in /llvm/trunk: include/llvm/Target/TargetRegisterInfo.h lib/CodeGen/MachineInstr.cpp lib/Target/PowerPC/PPCRegisterInfo.td lib/Target/Target.td utils/TableGen/RegisterInfoEmitter.cpp In-Reply-To: References: <200802240056.m1O0uExD011393@zion.cs.uiuc.edu> Message-ID: <782B8D32-007E-4CCF-AD98-BA51DCEABF4B@gmail.com> On Feb 24, 2008, at 11:48 AM, Evan Cheng wrote: > I asked Bill to do this. Basically I want two names, one for > debugging, one for asmprinting. > > I am ok with the patch except for the name "PrintableName". I'd prefer > just Name and AsmName, the later is only used for asm printing. To me > it's silly to change TargetRegisterInfo::getName() to a virtual > machine and use a switch statement. The increase size to > TargetRegisterDesc can't be that big an issue? > I did it this way -- using PrintableName instead of AsmName -- because I didn't want to make so many changes to the various back- ends. That's error prone because they all access .Name already (and most of them do it directly without going through the getName() method). I'm willing, of course, to go in and change PrintableName to AsmName and have that be what the various *AsmPrinters use to emit register names to the assembly files, but I just want to make sure that there isn't a better way of going about this instead. :-) What do you think? -bw From arnold.schwaighofer at gmail.com Tue Feb 26 03:20:01 2008 From: arnold.schwaighofer at gmail.com (Arnold Schwaighofer) Date: Tue, 26 Feb 2008 09:20:01 -0000 Subject: [llvm-commits] [llvm] r47593 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86ISelLowering.h Message-ID: <200802260920.m1Q9K2Wt026034@zion.cs.uiuc.edu> Author: arnolds Date: Tue Feb 26 03:19:59 2008 New Revision: 47593 URL: http://llvm.org/viewvc/llvm-project?rev=47593&view=rev Log: Change the lowering of arguments for tail call optimized calls. Before arguments that could overwrite each other were explicitly lowered to a stack slot, not giving the register allocator a chance to optimize. Now a sequence of copyto/copyfrom virtual registers ensures that arguments are loaded in (virtual) registers before they are lowered to the stack slot (and might overwrite each other). Also parameter stack slots are marked mutable for (potentially) tail calling functions. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47593&r1=47592&r2=47593&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Feb 26 03:19:59 2008 @@ -1057,26 +1057,55 @@ return None; } - // IsPossiblyOverwrittenArgumentOfTailCall - Check if the operand could possibly // be overwritten when lowering the outgoing arguments in a tail call. Currently // the implementation of this call is very conservative and assumes all // arguments sourcing from FORMAL_ARGUMENTS or a CopyFromReg with virtual // registers would be overwritten by direct lowering. -// Possible improvement: -// Check FORMAL_ARGUMENTS corresponding MERGE_VALUES for CopyFromReg nodes -// indicating inreg passed arguments which also need not be lowered to a safe -// stack slot. -static bool IsPossiblyOverwrittenArgumentOfTailCall(SDOperand Op) { +static bool IsPossiblyOverwrittenArgumentOfTailCall(SDOperand Op, + MachineFrameInfo * MFI) { RegisterSDNode * OpReg = NULL; + FrameIndexSDNode * FrameIdxNode = NULL; + int FrameIdx = 0; if (Op.getOpcode() == ISD::FORMAL_ARGUMENTS || (Op.getOpcode()== ISD::CopyFromReg && - (OpReg = cast(Op.getOperand(1))) && - OpReg->getReg() >= TargetRegisterInfo::FirstVirtualRegister)) + (OpReg = dyn_cast(Op.getOperand(1))) && + (OpReg->getReg() >= TargetRegisterInfo::FirstVirtualRegister)) || + (Op.getOpcode() == ISD::LOAD && + (FrameIdxNode = dyn_cast(Op.getOperand(1))) && + (MFI->isFixedObjectIndex((FrameIdx = FrameIdxNode->getIndex()))) && + (MFI->getObjectOffset(FrameIdx) >= 0))) return true; return false; } +// CopyTailCallClobberedArgumentsToVRegs - Create virtual registers for all +// arguments to force loading and guarantee that arguments sourcing from +// incomming parameters are not overwriting each other. +static SDOperand +CopyTailCallClobberedArgumentsToVRegs(SDOperand Chain, + SmallVector, 8> &TailCallClobberedVRegs, + SelectionDAG &DAG, + MachineFunction &MF, + const TargetLowering * TL) { + + SDOperand InFlag; + for (unsigned i = 0, e = TailCallClobberedVRegs.size(); i != e; i++) { + SDOperand Arg = TailCallClobberedVRegs[i].second; + unsigned Idx = TailCallClobberedVRegs[i].first; + unsigned VReg = + MF.getRegInfo(). + createVirtualRegister(TL->getRegClassFor(Arg.getValueType())); + Chain = DAG.getCopyToReg(Chain, VReg, Arg, InFlag); + InFlag = Chain.getValue(1); + Arg = DAG.getCopyFromReg(Chain, VReg, Arg.getValueType(), InFlag); + TailCallClobberedVRegs[i] = std::make_pair(Idx, Arg); + Chain = Arg.getValue(1); + InFlag = Arg.getValue(2); + } + return Chain; +} + // CreateCopyOfByValArgument - Make a copy of an aggregate at address specified // by "Src" to address "Dst" with size and alignment information specified by // the specific parameter attribute. The copy will be passed as a byval function @@ -1097,15 +1126,20 @@ SDOperand X86TargetLowering::LowerMemArgument(SDOperand Op, SelectionDAG &DAG, const CCValAssign &VA, MachineFrameInfo *MFI, + unsigned CC, SDOperand Root, unsigned i) { // Create the nodes corresponding to a load from this parameter slot. unsigned Flags = cast(Op.getOperand(3 + i))->getValue(); + bool AlwaysUseMutable = (CC==CallingConv::Fast) && PerformTailCallOpt; bool isByVal = Flags & ISD::ParamFlags::ByVal; + bool isImmutable = !AlwaysUseMutable && !isByVal; - // FIXME: For now, all byval parameter objects are marked mutable. This - // can be changed with more analysis. + // FIXME: For now, all byval parameter objects are marked mutable. This can be + // changed with more analysis. + // In case of tail call optimization mark all arguments mutable. Since they + // could be overwritten by lowering of arguments in case of a tail call. int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT())/8, - VA.getLocMemOffset(), !isByVal); + VA.getLocMemOffset(), isImmutable); SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy()); if (isByVal) return FIN; @@ -1195,7 +1229,7 @@ ArgValues.push_back(ArgValue); } else { assert(VA.isMemLoc()); - ArgValues.push_back(LowerMemArgument(Op, DAG, VA, MFI, Root, i)); + ArgValues.push_back(LowerMemArgument(Op, DAG, VA, MFI, CC, Root, i)); } } @@ -1381,6 +1415,7 @@ SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) { MachineFunction &MF = DAG.getMachineFunction(); + MachineFrameInfo * MFI = MF.getFrameInfo(); SDOperand Chain = Op.getOperand(0); unsigned CC = cast(Op.getOperand(1))->getValue(); bool isVarArg = cast(Op.getOperand(2))->getValue() != 0; @@ -1442,7 +1477,7 @@ Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes)); - SDOperand RetAddrFrIdx, NewRetAddrFrIdx; + SDOperand RetAddrFrIdx; if (IsTailCall) { // Adjust the Return address stack slot. if (FPDiff) { @@ -1451,23 +1486,18 @@ // Load the "old" Return address. RetAddrFrIdx = DAG.getLoad(VT, Chain,RetAddrFrIdx, NULL, 0); - // Calculate the new stack slot for the return address. - int SlotSize = Is64Bit ? 8 : 4; - int NewReturnAddrFI = - MF.getFrameInfo()->CreateFixedObject(SlotSize, FPDiff-SlotSize); - NewRetAddrFrIdx = DAG.getFrameIndex(NewReturnAddrFI, VT); Chain = SDOperand(RetAddrFrIdx.Val, 1); } } SmallVector, 8> RegsToPass; + SmallVector, 8> TailCallClobberedVRegs; SmallVector MemOpChains; SDOperand StackPtr; // Walk the register/memloc assignments, inserting copies/loads. For tail - // calls, lower arguments which could otherwise be possibly overwritten to the - // stack slot where they would go on normal function calls. + // calls, remember all arguments for later special lowering. for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; SDOperand Arg = Op.getOperand(5+2*VA.getValNo()); @@ -1490,13 +1520,15 @@ if (VA.isRegLoc()) { RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); } else { - if (!IsTailCall || IsPossiblyOverwrittenArgumentOfTailCall(Arg)) { + if (!IsTailCall) { assert(VA.isMemLoc()); if (StackPtr.Val == 0) StackPtr = DAG.getCopyFromReg(Chain, X86StackPtr, getPointerTy()); MemOpChains.push_back(LowerMemOpCallTo(Op, DAG, StackPtr, VA, Chain, Arg)); + } else if (IsPossiblyOverwrittenArgumentOfTailCall(Arg, MFI)) { + TailCallClobberedVRegs.push_back(std::make_pair(i,Arg)); } } } @@ -1514,9 +1546,6 @@ InFlag = Chain.getValue(1); } - if (IsTailCall) - InFlag = SDOperand(); // ??? Isn't this nuking the preceding loop's output? - // ELF / PIC requires GOT in the EBX register before function calls via PLT // GOT pointer. // Does not work with tail call since ebx is not restored correctly by @@ -1551,11 +1580,18 @@ InFlag = Chain.getValue(1); } + // For tail calls lower the arguments to the 'real' stack slot. if (IsTailCall) { SmallVector MemOpChains2; SDOperand FIN; int FI = 0; + // Do not flag preceeding copytoreg stuff together with the following stuff. + InFlag = SDOperand(); + + Chain = CopyTailCallClobberedArgumentsToVRegs(Chain, TailCallClobberedVRegs, + DAG, MF, this); + for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; if (!VA.isRegLoc()) { @@ -1568,28 +1604,26 @@ uint32_t OpSize = (MVT::getSizeInBits(VA.getLocVT())+7)/8; FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset); FIN = DAG.getFrameIndex(FI, MVT::i32); - SDOperand Source = Arg; - if (IsPossiblyOverwrittenArgumentOfTailCall(Arg)) { - // Copy from stack slots to stack slot of a tail called function. This - // needs to be done because if we would lower the arguments directly - // to their real stack slot we might end up overwriting each other. - // Get source stack slot. - Source = DAG.getIntPtrConstant(VA.getLocMemOffset()); - if (StackPtr.Val == 0) - StackPtr = DAG.getCopyFromReg(Chain, X86StackPtr, getPointerTy()); - Source = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, Source); - if ((Flags & ISD::ParamFlags::ByVal)==0) - Source = DAG.getLoad(VA.getValVT(), Chain, Source, NULL, 0); - } + // Find virtual register for this argument. + bool Found=false; + for (unsigned idx=0, e= TailCallClobberedVRegs.size(); idx < e; idx++) + if (TailCallClobberedVRegs[idx].first==i) { + Arg = TailCallClobberedVRegs[idx].second; + Found=true; + break; + } + assert(IsPossiblyOverwrittenArgumentOfTailCall(Arg, MFI)==false || + (Found==true && "No corresponding Argument was found")); + if (Flags & ISD::ParamFlags::ByVal) { // Copy relative to framepointer. - MemOpChains2.push_back(CreateCopyOfByValArgument(Source, FIN, Chain, + MemOpChains2.push_back(CreateCopyOfByValArgument(Arg, FIN, Chain, Flags, DAG)); } else { // Store relative to framepointer. MemOpChains2.push_back( - DAG.getStore(Chain, Source, FIN, + DAG.getStore(Chain, Arg, FIN, PseudoSourceValue::getFixedStack(), FI)); } } @@ -1600,8 +1634,16 @@ &MemOpChains2[0], MemOpChains2.size()); // Store the return address to the appropriate stack slot. - if (FPDiff) - Chain = DAG.getStore(Chain,RetAddrFrIdx, NewRetAddrFrIdx, NULL, 0); + if (FPDiff) { + // Calculate the new stack slot for the return address. + int SlotSize = Is64Bit ? 8 : 4; + int NewReturnAddrFI = + MF.getFrameInfo()->CreateFixedObject(SlotSize, FPDiff-SlotSize); + MVT::ValueType VT = Is64Bit ? MVT::i64 : MVT::i32; + SDOperand NewRetAddrFrIdx = DAG.getFrameIndex(NewReturnAddrFI, VT); + Chain = DAG.getStore(Chain, RetAddrFrIdx, NewRetAddrFrIdx, + PseudoSourceValue::getFixedStack(), NewReturnAddrFI); + } } // If the callee is a GlobalAddress node (quite common, every direct call is) Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=47593&r1=47592&r2=47593&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Tue Feb 26 03:19:59 2008 @@ -482,7 +482,7 @@ SDOperand LowerMemArgument(SDOperand Op, SelectionDAG &DAG, const CCValAssign &VA, MachineFrameInfo *MFI, - SDOperand Root, unsigned i); + unsigned CC, SDOperand Root, unsigned i); SDOperand LowerMemOpCallTo(SDOperand Op, SelectionDAG &DAG, const SDOperand &StackPtr, From arnold.schwaighofer at gmail.com Tue Feb 26 04:22:05 2008 From: arnold.schwaighofer at gmail.com (Arnold Schwaighofer) Date: Tue, 26 Feb 2008 10:22:05 -0000 Subject: [llvm-commits] [llvm] r47594 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200802261022.m1QAM9cw028199@zion.cs.uiuc.edu> Author: arnolds Date: Tue Feb 26 04:21:54 2008 New Revision: 47594 URL: http://llvm.org/viewvc/llvm-project?rev=47594&view=rev Log: Add support for intermodule tail calls on x86/32bit with GOT-style position independent code. Before only tail calls to protected/hidden functions within the same module were optimized. Now all function calls are tail call optimized. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47594&r1=47593&r2=47594&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Feb 26 04:21:54 2008 @@ -1547,9 +1547,13 @@ } // ELF / PIC requires GOT in the EBX register before function calls via PLT - // GOT pointer. - // Does not work with tail call since ebx is not restored correctly by - // tailcaller. TODO: at least for x86 - verify for x86-64 + // GOT pointer. + // If we are tail calling and generating PIC/GOT style code load the address + // of the callee into ecx. The value in ecx is used as target of the tail + // jump. This is done to circumvent the ebx/callee-saved problem for tail + // calls on PIC/GOT architectures. Normally we would just put the address of + // GOT into ebx and then call target at PLT. But for tail callss ebx would be + // restored (since ebx is callee saved) before jumping to the target at PLT. if (!IsTailCall && !Is64Bit && getTargetMachine().getRelocationModel() == Reloc::PIC_ && Subtarget->isPICStyleGOT()) { @@ -1557,6 +1561,16 @@ DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), InFlag); InFlag = Chain.getValue(1); + } else if (!Is64Bit && IsTailCall && + getTargetMachine().getRelocationModel() == Reloc::PIC_ && + Subtarget->isPICStyleGOT() ) { + // Note: The actual moving to ecx is done further down. + GlobalAddressSDNode *G = dyn_cast(Callee); + if (G && !G->getGlobal()->hasHiddenVisibility() && + !G->getGlobal()->hasProtectedVisibility()) + Callee = LowerGlobalAddress(Callee, DAG); + else if (isa(Callee)) + Callee = LowerExternalSymbol(Callee,DAG); } if (Is64Bit && isVarArg) { @@ -1661,12 +1675,10 @@ getTargetMachine().getCodeModel() != CodeModel::Large) Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy()); } else if (IsTailCall) { - assert(Callee.getOpcode() == ISD::LOAD && - "Function destination must be loaded into virtual register"); unsigned Opc = Is64Bit ? X86::R9 : X86::ECX; Chain = DAG.getCopyToReg(Chain, - DAG.getRegister(Opc, getPointerTy()) , + DAG.getRegister(Opc, getPointerTy()), Callee,InFlag); Callee = DAG.getRegister(Opc, getPointerTy()); // Add register as live out. @@ -1773,9 +1785,8 @@ // provided: // * tailcallopt is enabled // * caller/callee are fastcc -// * elf/pic is disabled OR -// * elf/pic enabled + callee is in module + callee has -// visibility protected or hidden +// On X86_64 architecture with GOT-style position independent code only local +// (within module) calls are supported at the moment. // To keep the stack aligned according to platform abi the function // GetAlignedArgumentStackSize ensures that argument delta is always multiples // of stack alignment. (Dynamic linkers need this - darwin's dyld for example) @@ -1844,12 +1855,13 @@ unsigned CalleeCC = cast(Call.getOperand(1))->getValue(); if (CalleeCC == CallingConv::Fast && CallerCC == CalleeCC) { SDOperand Callee = Call.getOperand(4); - // On elf/pic %ebx needs to be livein. + // On x86/32Bit PIC/GOT tail calls are supported. if (getTargetMachine().getRelocationModel() != Reloc::PIC_ || - !Subtarget->isPICStyleGOT()) + !Subtarget->isPICStyleGOT()|| !Subtarget->is64Bit()) return true; - // Can only do local tail calls with PIC. + // Can only do local tail calls (in same module, hidden or protected) on + // x86_64 PIC/GOT at the moment. if (GlobalAddressSDNode *G = dyn_cast(Callee)) return G->getGlobal()->hasHiddenVisibility() || G->getGlobal()->hasProtectedVisibility(); From isanbard at gmail.com Tue Feb 26 04:45:34 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 26 Feb 2008 10:45:34 -0000 Subject: [llvm-commits] [llvm] r47595 - in /llvm/trunk/utils/TableGen: CodeGenDAGPatterns.cpp DAGISelEmitter.cpp Message-ID: <200802261045.m1QAjaVx029012@zion.cs.uiuc.edu> Author: void Date: Tue Feb 26 04:45:29 2008 New Revision: 47595 URL: http://llvm.org/viewvc/llvm-project?rev=47595&view=rev Log: De-tabify. Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp llvm/trunk/utils/TableGen/DAGISelEmitter.cpp Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp?rev=47595&r1=47594&r2=47595&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp (original) +++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp Tue Feb 26 04:45:29 2008 @@ -703,18 +703,18 @@ if (Size < 32) { int Val = (II->getValue() << (32-Size)) >> (32-Size); if (Val != II->getValue()) { - // If sign-extended doesn't fit, does it fit as unsigned? - unsigned ValueMask = unsigned(MVT::getIntVTBitMask(VT)); - unsigned UnsignedVal = unsigned(II->getValue()); - - if ((ValueMask & UnsignedVal) != UnsignedVal) { - TP.error("Integer value '" + itostr(II->getValue())+ - "' is out of range for type '" + - getEnumName(getTypeNum(0)) + "'!"); - } - } - } - } + // If sign-extended doesn't fit, does it fit as unsigned? + unsigned ValueMask = unsigned(MVT::getIntVTBitMask(VT)); + unsigned UnsignedVal = unsigned(II->getValue()); + + if ((ValueMask & UnsignedVal) != UnsignedVal) { + TP.error("Integer value '" + itostr(II->getValue())+ + "' is out of range for type '" + + getEnumName(getTypeNum(0)) + "'!"); + } + } + } + } } return MadeChange; Modified: llvm/trunk/utils/TableGen/DAGISelEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelEmitter.cpp?rev=47595&r1=47594&r2=47595&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/DAGISelEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/DAGISelEmitter.cpp Tue Feb 26 04:45:29 2008 @@ -731,9 +731,9 @@ std::string Val = VariableMap[VarName]; bool ModifiedVal = false; if (Val.empty()) { - cerr << "Variable '" << VarName << " referenced but not defined " - << "and not caught earlier!\n"; - abort(); + cerr << "Variable '" << VarName << " referenced but not defined " + << "and not caught earlier!\n"; + abort(); } if (Val[0] == 'T' && Val[1] == 'm' && Val[2] == 'p') { // Already selected this operand, just return the tmpval. @@ -1183,10 +1183,10 @@ } else if (InputHasChain && !NodeHasChain) { // One of the inner node produces a chain. if (NodeHasOutFlag) - emitCode("ReplaceUses(SDOperand(N.Val, " + utostr(NumPatResults+1) + - "), SDOperand(ResNode, N.ResNo-1));"); - emitCode("ReplaceUses(SDOperand(N.Val, " + utostr(NumPatResults) + - "), " + ChainName + ");"); + emitCode("ReplaceUses(SDOperand(N.Val, " + utostr(NumPatResults+1) + + "), SDOperand(ResNode, N.ResNo-1));"); + emitCode("ReplaceUses(SDOperand(N.Val, " + utostr(NumPatResults) + + "), " + ChainName + ");"); } emitCode("return ResNode;"); From isanbard at gmail.com Tue Feb 26 04:46:10 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 26 Feb 2008 10:46:10 -0000 Subject: [llvm-commits] [llvm] r47596 - in /llvm/trunk/tools: bugpoint/BugDriver.cpp bugpoint/ListReducer.h bugpoint/OptimizerDriver.cpp llvmc/CompilerDriver.cpp llvmc/Configuration.cpp Message-ID: <200802261046.m1QAkAaR029043@zion.cs.uiuc.edu> Author: void Date: Tue Feb 26 04:46:10 2008 New Revision: 47596 URL: http://llvm.org/viewvc/llvm-project?rev=47596&view=rev Log: Detabify. Modified: llvm/trunk/tools/bugpoint/BugDriver.cpp llvm/trunk/tools/bugpoint/ListReducer.h llvm/trunk/tools/bugpoint/OptimizerDriver.cpp llvm/trunk/tools/llvmc/CompilerDriver.cpp llvm/trunk/tools/llvmc/Configuration.cpp Modified: llvm/trunk/tools/bugpoint/BugDriver.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/BugDriver.cpp?rev=47596&r1=47595&r2=47596&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/BugDriver.cpp (original) +++ llvm/trunk/tools/bugpoint/BugDriver.cpp Tue Feb 26 04:46:10 2008 @@ -184,7 +184,7 @@ if (ReferenceOutputFile.empty()) { std::cout << "Generating reference output from raw program: "; if(!createReferenceFile(Program)){ - return debugCodeGeneratorCrash(); + return debugCodeGeneratorCrash(); } CreatedOutput = true; } Modified: llvm/trunk/tools/bugpoint/ListReducer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ListReducer.h?rev=47596&r1=47595&r2=47596&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/ListReducer.h (original) +++ llvm/trunk/tools/bugpoint/ListReducer.h Tue Feb 26 04:46:10 2008 @@ -80,18 +80,17 @@ std::cerr << "\n\n*** Reduction Interrupted, cleaning up...\n\n"; return true; } - + // If the loop doesn't make satisfying progress, try shuffling. // The purpose of shuffling is to avoid the heavy tails of the // distribution (improving the speed of convergence). if (ShufflingEnabled && - NumOfIterationsWithoutProgress > MaxIterations) { - - std::vector ShuffledList(TheList); - std::random_shuffle(ShuffledList.begin(), ShuffledList.end()); - std::cerr << "\n\n*** Testing shuffled set...\n\n"; - // Check that random shuffle doesn't loose the bug - if (doTest(ShuffledList, empty) == KeepPrefix) { + NumOfIterationsWithoutProgress > MaxIterations) { + std::vector ShuffledList(TheList); + std::random_shuffle(ShuffledList.begin(), ShuffledList.end()); + std::cerr << "\n\n*** Testing shuffled set...\n\n"; + // Check that random shuffle doesn't loose the bug + if (doTest(ShuffledList, empty) == KeepPrefix) { // If the bug is still here, use the shuffled list. TheList.swap(ShuffledList); MidTop = TheList.size(); @@ -99,11 +98,11 @@ // probability of inifinite looping without making progress. MaxIterations += 2; std::cerr << "\n\n*** Shuffling does not hide the bug...\n\n"; - } else { + } else { ShufflingEnabled = false; // Disable shuffling further on std::cerr << "\n\n*** Shuffling hides the bug...\n\n"; - } - NumOfIterationsWithoutProgress = 0; + } + NumOfIterationsWithoutProgress = 0; } unsigned Mid = MidTop / 2; Modified: llvm/trunk/tools/bugpoint/OptimizerDriver.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/OptimizerDriver.cpp?rev=47596&r1=47595&r2=47596&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/OptimizerDriver.cpp (original) +++ llvm/trunk/tools/bugpoint/OptimizerDriver.cpp Tue Feb 26 04:46:10 2008 @@ -157,7 +157,7 @@ // setup the child process' arguments const char** args = (const char**) alloca(sizeof(const char*) * - (Passes.size()+13+2*PluginLoader::getNumPlugins()+NumExtraArgs)); + (Passes.size()+13+2*PluginLoader::getNumPlugins()+NumExtraArgs)); int n = 0; sys::Path tool = sys::Program::FindProgramByName(ToolName); if (UseValgrind) { Modified: llvm/trunk/tools/llvmc/CompilerDriver.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/CompilerDriver.cpp?rev=47596&r1=47595&r2=47596&view=diff ============================================================================== --- llvm/trunk/tools/llvmc/CompilerDriver.cpp (original) +++ llvm/trunk/tools/llvmc/CompilerDriver.cpp Tue Feb 26 04:46:10 2008 @@ -259,43 +259,43 @@ if (programName[0] == '%' && programName.length() >2) { switch(programName[1]){ case 'b': - if (programName.substr(0,8) == "%bindir%") { - std::string tmp(LLVM_BINDIR); - tmp.append(programName.substr(8)); - pat->program.set(tmp); - } - break; + if (programName.substr(0,8) == "%bindir%") { + std::string tmp(LLVM_BINDIR); + tmp.append(programName.substr(8)); + pat->program.set(tmp); + } + break; case 'l': - if (programName.substr(0,12) == "%llvmgccdir%"){ - std::string tmp(LLVMGCCDIR); - tmp.append(programName.substr(12)); - pat->program.set(tmp); - }else if (programName.substr(0,13) == "%llvmgccarch%"){ - std::string tmp(LLVMGCCARCH); - tmp.append(programName.substr(13)); - pat->program.set(tmp); - }else if (programName.substr(0,9) == "%llvmgcc%"){ - std::string tmp(LLVMGCC); - tmp.append(programName.substr(9)); - pat->program.set(tmp); - }else if (programName.substr(0,9) == "%llvmgxx%"){ - std::string tmp(LLVMGXX); - tmp.append(programName.substr(9)); - pat->program.set(tmp); - }else if (programName.substr(0,9) == "%llvmcc1%"){ - std::string tmp(LLVMCC1); - tmp.append(programName.substr(9)); - pat->program.set(tmp); - }else if (programName.substr(0,13) == "%llvmcc1plus%"){ - std::string tmp(LLVMCC1PLUS); - tmp.append(programName.substr(13)); - pat->program.set(tmp); - }else if (programName.substr(0,8) == "%libdir%") { - std::string tmp(LLVM_LIBDIR); - tmp.append(programName.substr(8)); - pat->program.set(tmp); - } - break; + if (programName.substr(0,12) == "%llvmgccdir%"){ + std::string tmp(LLVMGCCDIR); + tmp.append(programName.substr(12)); + pat->program.set(tmp); + }else if (programName.substr(0,13) == "%llvmgccarch%"){ + std::string tmp(LLVMGCCARCH); + tmp.append(programName.substr(13)); + pat->program.set(tmp); + }else if (programName.substr(0,9) == "%llvmgcc%"){ + std::string tmp(LLVMGCC); + tmp.append(programName.substr(9)); + pat->program.set(tmp); + }else if (programName.substr(0,9) == "%llvmgxx%"){ + std::string tmp(LLVMGXX); + tmp.append(programName.substr(9)); + pat->program.set(tmp); + }else if (programName.substr(0,9) == "%llvmcc1%"){ + std::string tmp(LLVMCC1); + tmp.append(programName.substr(9)); + pat->program.set(tmp); + }else if (programName.substr(0,13) == "%llvmcc1plus%"){ + std::string tmp(LLVMCC1PLUS); + tmp.append(programName.substr(13)); + pat->program.set(tmp); + }else if (programName.substr(0,8) == "%libdir%") { + std::string tmp(LLVM_LIBDIR); + tmp.append(programName.substr(8)); + pat->program.set(tmp); + } + break; } } action->program = pat->program; Modified: llvm/trunk/tools/llvmc/Configuration.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/Configuration.cpp?rev=47596&r1=47595&r2=47596&view=diff ============================================================================== --- llvm/trunk/tools/llvmc/Configuration.cpp (original) +++ llvm/trunk/tools/llvmc/Configuration.cpp Tue Feb 26 04:46:10 2008 @@ -116,8 +116,8 @@ result.clear(); while (next_is_real()) { switch (token ) { - case LLVMGCCDIR_SUBST: - case LLVMGCCARCH_SUBST: + case LLVMGCCDIR_SUBST: + case LLVMGCCARCH_SUBST: case STRING : case OPTION : result += ConfigLexerState.StringVal; @@ -262,11 +262,11 @@ str.clear(); do { switch (token) { - case BINDIR_SUBST: - case LLVMGCC_SUBST: - case LLVMGXX_SUBST: - case LLVMCC1_SUBST: - case LLVMCC1PLUS_SUBST: + case BINDIR_SUBST: + case LLVMGCC_SUBST: + case LLVMGXX_SUBST: + case LLVMCC1_SUBST: + case LLVMCC1PLUS_SUBST: case OPTION: case STRING: case ARGS_SUBST: From isanbard at gmail.com Tue Feb 26 04:49:49 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 26 Feb 2008 10:49:49 -0000 Subject: [llvm-commits] [llvm] r47597 - in /llvm/trunk/include/llvm: ADT/APFloat.h ADT/APInt.h CodeGen/LiveInterval.h CodeGen/LiveIntervalAnalysis.h Message-ID: <200802261049.m1QAnoFY029144@zion.cs.uiuc.edu> Author: void Date: Tue Feb 26 04:49:39 2008 New Revision: 47597 URL: http://llvm.org/viewvc/llvm-project?rev=47597&view=rev Log: Detabify Modified: llvm/trunk/include/llvm/ADT/APFloat.h llvm/trunk/include/llvm/ADT/APInt.h llvm/trunk/include/llvm/CodeGen/LiveInterval.h llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Modified: llvm/trunk/include/llvm/ADT/APFloat.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APFloat.h?rev=47597&r1=47596&r2=47597&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/APFloat.h (original) +++ llvm/trunk/include/llvm/ADT/APFloat.h Tue Feb 26 04:49:39 2008 @@ -113,11 +113,11 @@ /* When bits of a floating point number are truncated, this enum is used to indicate what fraction of the LSB those bits represented. It essentially combines the roles of guard and sticky bits. */ - enum lostFraction { // Example of truncated bits: - lfExactlyZero, // 000000 - lfLessThanHalf, // 0xxxxx x's not all zero - lfExactlyHalf, // 100000 - lfMoreThanHalf // 1xxxxx x's not all zero + enum lostFraction { // Example of truncated bits: + lfExactlyZero, // 000000 + lfLessThanHalf, // 0xxxxx x's not all zero + lfExactlyHalf, // 100000 + lfMoreThanHalf // 1xxxxx x's not all zero }; class APFloat { @@ -207,7 +207,7 @@ /* Conversions. */ opStatus convert(const fltSemantics &, roundingMode); opStatus convertToInteger(integerPart *, unsigned int, bool, - roundingMode) const; + roundingMode) const; opStatus convertFromSignExtendedInteger(const integerPart *, unsigned int, bool, roundingMode); opStatus convertFromZeroExtendedInteger(const integerPart *, unsigned int, Modified: llvm/trunk/include/llvm/ADT/APInt.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APInt.h?rev=47597&r1=47596&r2=47597&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/APInt.h (original) +++ llvm/trunk/include/llvm/ADT/APInt.h Tue Feb 26 04:49:39 2008 @@ -1130,12 +1130,12 @@ /// DST += RHS + CARRY where CARRY is zero or one. Returns the /// carry flag. static integerPart tcAdd(integerPart *, const integerPart *, - integerPart carry, unsigned); + integerPart carry, unsigned); /// DST -= RHS + CARRY where CARRY is zero or one. Returns the /// carry flag. static integerPart tcSubtract(integerPart *, const integerPart *, - integerPart carry, unsigned); + integerPart carry, unsigned); /// DST += SRC * MULTIPLIER + PART if add is true /// DST = SRC * MULTIPLIER + PART if add is false @@ -1149,23 +1149,23 @@ /// parts were zero return zero, otherwise overflow occurred and /// return one. static int tcMultiplyPart(integerPart *dst, const integerPart *src, - integerPart multiplier, integerPart carry, - unsigned int srcParts, unsigned int dstParts, - bool add); + integerPart multiplier, integerPart carry, + unsigned int srcParts, unsigned int dstParts, + bool add); /// DST = LHS * RHS, where DST has the same width as the operands /// and is filled with the least significant parts of the result. /// Returns one if overflow occurred, otherwise zero. DST must be /// disjoint from both operands. static int tcMultiply(integerPart *, const integerPart *, - const integerPart *, unsigned); + const integerPart *, unsigned); /// DST = LHS * RHS, where DST has width the sum of the widths of /// the operands. No overflow occurs. DST must be disjoint from /// both operands. Returns the number of parts required to hold the /// result. static unsigned int tcFullMultiply(integerPart *, const integerPart *, - const integerPart *, unsigned, unsigned); + const integerPart *, unsigned, unsigned); /// If RHS is zero LHS and REMAINDER are left unchanged, return one. /// Otherwise set LHS to LHS / RHS with the fractional part @@ -1178,18 +1178,18 @@ /// and are destroyed. LHS, REMAINDER and SCRATCH must be /// distinct. static int tcDivide(integerPart *lhs, const integerPart *rhs, - integerPart *remainder, integerPart *scratch, - unsigned int parts); + integerPart *remainder, integerPart *scratch, + unsigned int parts); /// Shift a bignum left COUNT bits. Shifted in bits are zero. /// There are no restrictions on COUNT. static void tcShiftLeft(integerPart *, unsigned int parts, - unsigned int count); + unsigned int count); /// Shift a bignum right COUNT bits. Shifted in bits are zero. /// There are no restrictions on COUNT. static void tcShiftRight(integerPart *, unsigned int parts, - unsigned int count); + unsigned int count); /// The obvious AND, OR and XOR and complement operations. static void tcAnd(integerPart *, const integerPart *, unsigned int); @@ -1199,14 +1199,14 @@ /// Comparison (unsigned) of two bignums. static int tcCompare(const integerPart *, const integerPart *, - unsigned int); + unsigned int); /// Increment a bignum in-place. Return the carry flag. static integerPart tcIncrement(integerPart *, unsigned int); /// Set the least significant BITS and clear the rest. static void tcSetLeastSignificantBits(integerPart *, unsigned int, - unsigned int bits); + unsigned int bits); /// @brief debug method void dump() const; Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveInterval.h?rev=47597&r1=47596&r2=47597&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveInterval.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveInterval.h Tue Feb 26 04:49:39 2008 @@ -335,7 +335,7 @@ /// the intervals are not joinable, this aborts. void join(LiveInterval &Other, const int *ValNoAssignments, const int *RHSValNoAssignments, - SmallVector &NewVNInfo); + SmallVector &NewVNInfo); /// removeRange - Remove the specified range from this interval. Note that /// the range must already be in this interval in its entirety. Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=47597&r1=47596&r2=47597&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Tue Feb 26 04:49:39 2008 @@ -172,15 +172,15 @@ /// MBB return a pointer the MBB MachineBasicBlock* getMBBFromIndex(unsigned index) const { std::vector::const_iterator I = - std::lower_bound(Idx2MBBMap.begin(), Idx2MBBMap.end(), index); + std::lower_bound(Idx2MBBMap.begin(), Idx2MBBMap.end(), index); // Take the pair containing the index std::vector::const_iterator J = - ((I != Idx2MBBMap.end() && I->first > index) || - (I == Idx2MBBMap.end() && Idx2MBBMap.size()>0)) ? (I-1): I; + ((I != Idx2MBBMap.end() && I->first > index) || + (I == Idx2MBBMap.end() && Idx2MBBMap.size()>0)) ? (I-1): I; assert(J != Idx2MBBMap.end() && J->first < index+1 && - index <= getMBBEndIdx(J->second) && - "index does not correspond to an MBB"); + index <= getMBBEndIdx(J->second) && + "index does not correspond to an MBB"); return J->second; } From isanbard at gmail.com Tue Feb 26 04:51:54 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 26 Feb 2008 10:51:54 -0000 Subject: [llvm-commits] [llvm] r47598 - in /llvm/trunk/lib: Analysis/IPA/Andersens.cpp CodeGen/VirtRegMap.cpp Message-ID: <200802261051.m1QApsXe029210@zion.cs.uiuc.edu> Author: void Date: Tue Feb 26 04:51:52 2008 New Revision: 47598 URL: http://llvm.org/viewvc/llvm-project?rev=47598&view=rev Log: De-tabify. Modified: llvm/trunk/lib/Analysis/IPA/Andersens.cpp llvm/trunk/lib/CodeGen/VirtRegMap.cpp Modified: llvm/trunk/lib/Analysis/IPA/Andersens.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/IPA/Andersens.cpp?rev=47598&r1=47597&r2=47598&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/IPA/Andersens.cpp (original) +++ llvm/trunk/lib/Analysis/IPA/Andersens.cpp Tue Feb 26 04:51:52 2008 @@ -2347,15 +2347,15 @@ unsigned DestVar = *bi; unsigned Rep = FindNode(DestVar); - // If we ended up with this node as our destination, or we've already - // got an edge for the representative, delete the current edge. - if (Rep == CurrNodeIndex || - (Rep != DestVar && NewEdges.test(Rep))) { - ToErase.set(DestVar); - continue; - } + // If we ended up with this node as our destination, or we've already + // got an edge for the representative, delete the current edge. + if (Rep == CurrNodeIndex || + (Rep != DestVar && NewEdges.test(Rep))) { + ToErase.set(DestVar); + continue; + } - std::pair edge(CurrNodeIndex,Rep); + std::pair edge(CurrNodeIndex,Rep); // This is where we do lazy cycle detection. // If this is a cycle candidate (equal points-to sets and this Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=47598&r1=47597&r2=47598&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Tue Feb 26 04:51:52 2008 @@ -779,7 +779,7 @@ /// xorl %edi, %eax /// movl %eax, -32(%ebp) /// movl -36(%ebp), %eax -/// orl %eax, -32(%ebp) +/// orl %eax, -32(%ebp) /// ==> /// xorl %edi, %eax /// orl -36(%ebp), %eax From isanbard at gmail.com Tue Feb 26 04:53:38 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 26 Feb 2008 10:53:38 -0000 Subject: [llvm-commits] [llvm] r47599 - in /llvm/trunk/lib/Transforms/Scalar: InstructionCombining.cpp PredicateSimplifier.cpp Message-ID: <200802261053.m1QAreNI029267@zion.cs.uiuc.edu> Author: void Date: Tue Feb 26 04:53:30 2008 New Revision: 47599 URL: http://llvm.org/viewvc/llvm-project?rev=47599&view=rev Log: De-tabify. Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=47599&r1=47598&r2=47599&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Feb 26 04:53:30 2008 @@ -2163,10 +2163,10 @@ match(RHS, m_Mul(m_Value(Y), m_Value(Z)))) { if (W != Y) { if (W == Z) { - std::swap(Y, Z); + std::swap(Y, Z); } else if (Y == X) { - std::swap(W, X); - } else if (X == Z) { + std::swap(W, X); + } else if (X == Z) { std::swap(Y, Z); std::swap(W, X); } @@ -9484,7 +9484,7 @@ /// InstCombineLoadCast - Fold 'load (cast P)' -> cast (load P)' when possible. static Instruction *InstCombineLoadCast(InstCombiner &IC, LoadInst &LI, - const TargetData *TD) { + const TargetData *TD) { User *CI = cast(LI.getOperand(0)); Value *CastOp = CI->getOperand(0); @@ -9498,24 +9498,24 @@ unsigned numBits = Ty->getPrimitiveSizeInBits(); // Replace LI with immediate integer store. if ((numBits >> 3) == len + 1) { - APInt StrVal(numBits, 0); - APInt SingleChar(numBits, 0); - if (TD->isLittleEndian()) { - for (signed i = len-1; i >= 0; i--) { - SingleChar = (uint64_t) Str[i]; - StrVal = (StrVal << 8) | SingleChar; - } - } else { - for (unsigned i = 0; i < len; i++) { - SingleChar = (uint64_t) Str[i]; - StrVal = (StrVal << 8) | SingleChar; - } - // Append NULL at the end. - SingleChar = 0; - StrVal = (StrVal << 8) | SingleChar; - } - Value *NL = ConstantInt::get(StrVal); - return IC.ReplaceInstUsesWith(LI, NL); + APInt StrVal(numBits, 0); + APInt SingleChar(numBits, 0); + if (TD->isLittleEndian()) { + for (signed i = len-1; i >= 0; i--) { + SingleChar = (uint64_t) Str[i]; + StrVal = (StrVal << 8) | SingleChar; + } + } else { + for (unsigned i = 0; i < len; i++) { + SingleChar = (uint64_t) Str[i]; + StrVal = (StrVal << 8) | SingleChar; + } + // Append NULL at the end. + SingleChar = 0; + StrVal = (StrVal << 8) | SingleChar; + } + Value *NL = ConstantInt::get(StrVal); + return IC.ReplaceInstUsesWith(LI, NL); } } } Modified: llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp?rev=47599&r1=47598&r2=47599&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/PredicateSimplifier.cpp Tue Feb 26 04:53:30 2008 @@ -717,7 +717,7 @@ if (edge.LV == J->LV) return; // This update adds nothing new. - } + } if (I != B) { // We also have to tighten any edge beneath our update. @@ -729,7 +729,7 @@ } if (K == B) break; } - } + } // Insert new edge at Subtree if it isn't already there. if (I == E || I->To != n || Subtree != I->Subtree) From isanbard at gmail.com Tue Feb 26 04:57:25 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 26 Feb 2008 10:57:25 -0000 Subject: [llvm-commits] [llvm] r47600 - in /llvm/trunk/lib/Target: IA64/IA64ISelLowering.h MSIL/MSILWriter.cpp X86/X86CodeEmitter.cpp Message-ID: <200802261057.m1QAvQXQ029371@zion.cs.uiuc.edu> Author: void Date: Tue Feb 26 04:57:23 2008 New Revision: 47600 URL: http://llvm.org/viewvc/llvm-project?rev=47600&view=rev Log: De-tabify Modified: llvm/trunk/lib/Target/IA64/IA64ISelLowering.h llvm/trunk/lib/Target/MSIL/MSILWriter.cpp llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Modified: llvm/trunk/lib/Target/IA64/IA64ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelLowering.h?rev=47600&r1=47599&r2=47600&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64ISelLowering.h (original) +++ llvm/trunk/lib/Target/IA64/IA64ISelLowering.h Tue Feb 26 04:57:23 2008 @@ -41,13 +41,11 @@ int VarArgsFrameIndex; // FrameIndex for start of varargs area. //int ReturnAddrIndex; // FrameIndex for return slot. unsigned GP, SP, RP; // FIXME - clean this mess up - public: explicit IA64TargetLowering(TargetMachine &TM); unsigned VirtGPR; // this is public so it can be accessed in the selector // for ISD::RET. add an accessor instead? FIXME - const char *getTargetNodeName(unsigned Opcode) const; /// LowerArguments - This hook must be implemented to indicate how we should Modified: llvm/trunk/lib/Target/MSIL/MSILWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSIL/MSILWriter.cpp?rev=47600&r1=47599&r2=47600&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSIL/MSILWriter.cpp (original) +++ llvm/trunk/lib/Target/MSIL/MSILWriter.cpp Tue Feb 26 04:57:23 2008 @@ -1,6 +1,6 @@ //===-- MSILWriter.cpp - Library for converting LLVM code to MSIL ---------===// // -// The LLVM Compiler Infrastructure +// The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. @@ -1640,7 +1640,7 @@ //===----------------------------------------------------------------------===// -// External Interface declaration +// External Interface declaration //===----------------------------------------------------------------------===// bool MSILTarget::addPassesToEmitWholeFile(PassManager &PM, std::ostream &o, Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=47600&r1=47599&r2=47600&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Tue Feb 26 04:57:23 2008 @@ -271,8 +271,8 @@ if (RelocOp->isGlobalAddress()) { // In 64-bit static small code model, we could potentially emit absolute. // But it's probably not beneficial. - // 89 05 00 00 00 00 mov %eax,0(%rip) # PC-relative - // 89 04 25 00 00 00 00 mov %eax,0x0 # Absolute + // 89 05 00 00 00 00 mov %eax,0(%rip) # PC-relative + // 89 04 25 00 00 00 00 mov %eax,0x0 # Absolute unsigned rt = Is64BitMode ? X86::reloc_pcrel_word : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); bool NeedStub = isa(RelocOp->getGlobal()); From baldrick at free.fr Tue Feb 26 05:21:44 2008 From: baldrick at free.fr (Duncan Sands) Date: Tue, 26 Feb 2008 11:21:44 -0000 Subject: [llvm-commits] [llvm] r47601 - in /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeTypes.cpp LegalizeTypes.h LegalizeTypesExpand.cpp LegalizeTypesPromote.cpp LegalizeTypesScalarize.cpp LegalizeTypesSplit.cpp Message-ID: <200802261121.m1QBLj0E030082@zion.cs.uiuc.edu> Author: baldrick Date: Tue Feb 26 05:21:42 2008 New Revision: 47601 URL: http://llvm.org/viewvc/llvm-project?rev=47601&view=rev Log: Fix a nasty bug in LegalizeTypes (spotted in CodeGen/PowerPC/illegal-element-type.ll): suppose a node X is processed, and processing maps it to a node Y. Then X continues to exist in the DAG, but with no users. While processing some other node, a new node may be created that happens to be equal to X, and thus X will be reused rather than a truly new node. This can cause X to "magically reappear", and since it is in the Processed state in will not be reprocessed, so at the end of type legalization the illegal node X can still be present. The solution is to replace X with Y whenever X gets resurrected like this. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=47601&r1=47600&r2=47601&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Tue Feb 26 05:21:42 2008 @@ -207,9 +207,10 @@ #endif } -/// MarkNewNodes - The specified node is the root of a subtree of potentially -/// new nodes. Add the correct NodeId to mark it. -void DAGTypeLegalizer::MarkNewNodes(SDNode *N) { +/// AnalyzeNewNode - The specified node is the root of a subtree of potentially +/// new nodes. Correct any processed operands (this may change the node) and +/// calculate the NodeId. +void DAGTypeLegalizer::AnalyzeNewNode(SDNode *&N) { // If this was an existing node that is already done, we're done. if (N->getNodeId() != NewNode) return; @@ -221,15 +222,39 @@ // // As we walk the operands, keep track of the number of nodes that are // processed. If non-zero, this will become the new nodeid of this node. + // Already processed operands may need to be remapped to the node that + // replaced them, which can result in our node changing. Since remapping + // is rare, the code tries to minimize overhead in the non-remapping case. + + SmallVector NewOps; unsigned NumProcessed = 0; for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { - int OpId = N->getOperand(i).Val->getNodeId(); - if (OpId == NewNode) - MarkNewNodes(N->getOperand(i).Val); - else if (OpId == Processed) + SDOperand OrigOp = N->getOperand(i); + SDOperand Op = OrigOp; + + if (Op.Val->getNodeId() == Processed) + RemapNode(Op); + + if (Op.Val->getNodeId() == NewNode) + AnalyzeNewNode(Op.Val); + else if (Op.Val->getNodeId() == Processed) ++NumProcessed; + + if (!NewOps.empty()) { + // Some previous operand changed. Add this one to the list. + NewOps.push_back(Op); + } else if (Op != OrigOp) { + // This is the first operand to change - add all operands so far. + for (unsigned j = 0; j < i; ++j) + NewOps.push_back(N->getOperand(j)); + NewOps.push_back(Op); + } } - + + // Some operands changed - update the node. + if (!NewOps.empty()) + N = DAG.UpdateNodeOperands(SDOperand(N, 0), &NewOps[0], NewOps.size()).Val; + N->setNodeId(N->getNumOperands()-NumProcessed); if (N->getNodeId() == ReadyToProcess) Worklist.push_back(N); @@ -258,7 +283,7 @@ assert(N->getNodeId() != DAGTypeLegalizer::Processed && N->getNodeId() != DAGTypeLegalizer::ReadyToProcess && "RAUW updated processed node!"); - DTL.ReanalyzeNodeFlags(N); + DTL.ReanalyzeNode(N); } }; } @@ -269,11 +294,10 @@ /// of From to use To instead. void DAGTypeLegalizer::ReplaceValueWith(SDOperand From, SDOperand To) { if (From == To) return; - + // If expansion produced new nodes, make sure they are properly marked. - if (To.Val->getNodeId() == NewNode) - MarkNewNodes(To.Val); - + AnalyzeNewNode(To.Val); + // Anything that used the old node should now use the new one. Note that this // can potentially cause recursive merging. NodeUpdateListener NUL(*this); @@ -288,13 +312,13 @@ /// node's results. The from and to node must define identical result types. void DAGTypeLegalizer::ReplaceNodeWith(SDNode *From, SDNode *To) { if (From == To) return; + + // If expansion produced new nodes, make sure they are properly marked. + AnalyzeNewNode(To); + assert(From->getNumValues() == To->getNumValues() && "Node results don't match"); - - // If expansion produced new nodes, make sure they are properly marked. - if (To->getNodeId() == NewNode) - MarkNewNodes(To); - + // Anything that used the old node should now use the new one. Note that this // can potentially cause recursive merging. NodeUpdateListener NUL(*this); @@ -323,8 +347,7 @@ } void DAGTypeLegalizer::SetPromotedOp(SDOperand Op, SDOperand Result) { - if (Result.Val->getNodeId() == NewNode) - MarkNewNodes(Result.Val); + AnalyzeNewNode(Result.Val); SDOperand &OpEntry = PromotedNodes[Op]; assert(OpEntry.Val == 0 && "Node is already promoted!"); @@ -332,9 +355,8 @@ } void DAGTypeLegalizer::SetScalarizedOp(SDOperand Op, SDOperand Result) { - if (Result.Val->getNodeId() == NewNode) - MarkNewNodes(Result.Val); - + AnalyzeNewNode(Result.Val); + SDOperand &OpEntry = ScalarizedNodes[Op]; assert(OpEntry.Val == 0 && "Node is already scalarized!"); OpEntry = Result; @@ -352,17 +374,15 @@ } void DAGTypeLegalizer::SetExpandedOp(SDOperand Op, SDOperand Lo, SDOperand Hi) { + // Lo/Hi may have been newly allocated, if so, add nodeid's as relevant. + AnalyzeNewNode(Lo.Val); + AnalyzeNewNode(Hi.Val); + // Remember that this is the result of the node. std::pair &Entry = ExpandedNodes[Op]; assert(Entry.first.Val == 0 && "Node already expanded"); Entry.first = Lo; Entry.second = Hi; - - // Lo/Hi may have been newly allocated, if so, add nodeid's as relevant. - if (Lo.Val->getNodeId() == NewNode) - MarkNewNodes(Lo.Val); - if (Hi.Val->getNodeId() == NewNode) - MarkNewNodes(Hi.Val); } void DAGTypeLegalizer::GetSplitOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi) { @@ -375,17 +395,15 @@ } void DAGTypeLegalizer::SetSplitOp(SDOperand Op, SDOperand Lo, SDOperand Hi) { + // Lo/Hi may have been newly allocated, if so, add nodeid's as relevant. + AnalyzeNewNode(Lo.Val); + AnalyzeNewNode(Hi.Val); + // Remember that this is the result of the node. std::pair &Entry = SplitNodes[Op]; assert(Entry.first.Val == 0 && "Node already split"); Entry.first = Lo; Entry.second = Hi; - - // Lo/Hi may have been newly allocated, if so, add nodeid's as relevant. - if (Lo.Val->getNodeId() == NewNode) - MarkNewNodes(Lo.Val); - if (Hi.Val->getNodeId() == NewNode) - MarkNewNodes(Hi.Val); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=47601&r1=47600&r2=47601&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Tue Feb 26 05:21:42 2008 @@ -117,16 +117,16 @@ void run(); - /// ReanalyzeNodeFlags - Recompute the NodeID flags for the specified node, - /// adding it to the worklist if ready. - void ReanalyzeNodeFlags(SDNode *N) { + /// ReanalyzeNode - Recompute the NodeID and correct processed operands + /// for the specified node, adding it to the worklist if ready. + void ReanalyzeNode(SDNode *N) { N->setNodeId(NewNode); - MarkNewNodes(N); + AnalyzeNewNode(N); } - + private: - void MarkNewNodes(SDNode *N); - + void AnalyzeNewNode(SDNode *&N); + void ReplaceValueWith(SDOperand From, SDOperand To); void ReplaceNodeWith(SDNode *From, SDNode *To); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp?rev=47601&r1=47600&r2=47601&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp Tue Feb 26 05:21:42 2008 @@ -879,8 +879,7 @@ // Mark N as new and remark N and its operands. This allows us to correctly // revisit N if it needs another step of promotion and allows us to visit // any new operands to N. - N->setNodeId(NewNode); - MarkNewNodes(N); + ReanalyzeNode(N); return true; } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp?rev=47601&r1=47600&r2=47601&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp Tue Feb 26 05:21:42 2008 @@ -368,11 +368,10 @@ // Mark N as new and remark N and its operands. This allows us to correctly // revisit N if it needs another step of promotion and allows us to visit // any new operands to N. - N->setNodeId(NewNode); - MarkNewNodes(N); + ReanalyzeNode(N); return true; } - + assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 && "Invalid operand expansion"); @@ -448,10 +447,8 @@ // that the value is properly zero extended. unsigned BitWidth = Cond.getValueSizeInBits(); if (!DAG.MaskedValueIsZero(Cond, - APInt::getHighBitsSet(BitWidth, BitWidth-1))) { + APInt::getHighBitsSet(BitWidth, BitWidth-1))) Cond = DAG.getZeroExtendInReg(Cond, MVT::i1); - MarkNewNodes(Cond.Val); - } // The chain (Op#0) and basic block destination (Op#2) are always legal types. return DAG.UpdateNodeOperands(SDOperand(N, 0), Cond, N->getOperand(1), @@ -466,11 +463,9 @@ // that the value is properly zero extended. unsigned BitWidth = Cond.getValueSizeInBits(); if (!DAG.MaskedValueIsZero(Cond, - APInt::getHighBitsSet(BitWidth, BitWidth-1))) { + APInt::getHighBitsSet(BitWidth, BitWidth-1))) Cond = DAG.getZeroExtendInReg(Cond, MVT::i1); - MarkNewNodes(Cond.Val); - } - + // The chain (Op#0) and basic block destination (Op#2) are always legal types. return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0), Cond, N->getOperand(2)); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp?rev=47601&r1=47600&r2=47601&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp Tue Feb 26 05:21:42 2008 @@ -182,11 +182,10 @@ // Mark N as new and remark N and its operands. This allows us to correctly // revisit N if it needs another step of promotion and allows us to visit // any new operands to N. - N->setNodeId(NewNode); - MarkNewNodes(N); + ReanalyzeNode(N); return true; } - + assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 && "Invalid operand expansion"); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp?rev=47601&r1=47600&r2=47601&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp Tue Feb 26 05:21:42 2008 @@ -353,11 +353,10 @@ // Mark N as new and remark N and its operands. This allows us to correctly // revisit N if it needs another step of promotion and allows us to visit // any new operands to N. - N->setNodeId(NewNode); - MarkNewNodes(N); + ReanalyzeNode(N); return true; } - + assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 && "Invalid operand expansion"); From ggreif at gmail.com Tue Feb 26 06:09:04 2008 From: ggreif at gmail.com (Gabor Greif) Date: Tue, 26 Feb 2008 12:09:04 -0000 Subject: [llvm-commits] [llvm] r47602 - in /llvm/trunk/test: Makefile lib/llvm.exp Message-ID: <200802261209.m1QC96or031251@zion.cs.uiuc.edu> Author: ggreif Date: Tue Feb 26 06:08:55 2008 New Revision: 47602 URL: http://llvm.org/viewvc/llvm-project?rev=47602&view=rev Log: While hunting for two hanging tests, (on solaris10, which are: CodeGen/PowerPC/frounds.ll Transforms/InstCombine/2008-02-23-MulSub.ll) I needed a tool to figure out which one is the guilty. To this end I have added a verbosity option to the test/Makefile. It can be invoked thus: gmake check TESTSUITE=CodeGen/PowerPC VERBOSE="-v -v" (The number of "-v"s specifies the verbosity level. Instead of "-v" other aliases can be specified, please consult the dejagnu docs for info.) At level >= 2 following line is logged for each test, before running it: ABOUT TO RUN: .ll Modified: llvm/trunk/test/Makefile llvm/trunk/test/lib/llvm.exp Modified: llvm/trunk/test/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Makefile?rev=47602&r1=47601&r2=47602&view=diff ============================================================================== --- llvm/trunk/test/Makefile (original) +++ llvm/trunk/test/Makefile Tue Feb 26 06:08:55 2008 @@ -22,10 +22,14 @@ # DejaGNU testing support #===------------------------------------------------------------------------===# +ifdef VERBOSE +RUNTESTFLAGS := $(VERBOSE) +endif + ifdef TESTSUITE CLEANED_TESTSUITE := $(patsubst %/,%,$(TESTSUITE)) CLEANED_TESTSUITE := $(patsubst test/%,%,$(CLEANED_TESTSUITE)) -RUNTESTFLAGS := --tool $(CLEANED_TESTSUITE) +RUNTESTFLAGS += --tool $(CLEANED_TESTSUITE) endif IGNORE_TESTS := Modified: llvm/trunk/test/lib/llvm.exp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/lib/llvm.exp?rev=47602&r1=47601&r2=47602&view=diff ============================================================================== --- llvm/trunk/test/lib/llvm.exp (original) +++ llvm/trunk/test/lib/llvm.exp Tue Feb 26 06:08:55 2008 @@ -102,6 +102,7 @@ #set timeout 40 set filename [file tail $test] + verbose "ABOUT TO RUN: $filename" 2 set outcome PASS set tmpFile "$filename.tmp" From ggreif at gmail.com Tue Feb 26 07:27:59 2008 From: ggreif at gmail.com (Gabor Greif) Date: Tue, 26 Feb 2008 13:27:59 -0000 Subject: [llvm-commits] [llvm] r47603 - /llvm/trunk/test/Makefile Message-ID: <200802261328.m1QDS0IJ001241@zion.cs.uiuc.edu> Author: ggreif Date: Tue Feb 26 07:27:49 2008 New Revision: 47603 URL: http://llvm.org/viewvc/llvm-project?rev=47603&view=rev Log: unbreak check-one by supplying a dummy "verbose" procedure Modified: llvm/trunk/test/Makefile Modified: llvm/trunk/test/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Makefile?rev=47603&r1=47602&r2=47603&view=diff ============================================================================== --- llvm/trunk/test/Makefile (original) +++ llvm/trunk/test/Makefile Tue Feb 26 07:27:49 2008 @@ -66,6 +66,7 @@ echo "proc fail { msg } { puts \"FAIL: \$$msg\" }" ; \ echo "proc xfail { msg } { puts \"XFAIL: \$$msg\" }" ; \ echo "proc xpass { msg } { puts \"XPASS: \$$msg\" }" ; \ + echo "proc verbose args { }" ; \ echo "source $(LLVM_SRC_ROOT)/test/lib/llvm.exp" ; \ echo "RunLLVMTests $(TESTPATH)" ) | \ ( ulimit -t 600 ; ulimit -d 512000 ; \ From ggreif at gmail.com Tue Feb 26 07:37:21 2008 From: ggreif at gmail.com (Gabor Greif) Date: Tue, 26 Feb 2008 13:37:21 -0000 Subject: [llvm-commits] [llvm] r47604 - in /llvm/trunk/test: CodeGen/PowerPC/frounds.ll Transforms/InstCombine/2008-02-23-MulSub.ll Message-ID: <200802261337.m1QDbMOi001492@zion.cs.uiuc.edu> Author: ggreif Date: Tue Feb 26 07:37:13 2008 New Revision: 47604 URL: http://llvm.org/viewvc/llvm-project?rev=47604&view=rev Log: Really feed llvm-as with the testcase, do not let it read from stdin. This fixes the hangs seen on solaris10. Modified: llvm/trunk/test/CodeGen/PowerPC/frounds.ll llvm/trunk/test/Transforms/InstCombine/2008-02-23-MulSub.ll Modified: llvm/trunk/test/CodeGen/PowerPC/frounds.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/frounds.ll?rev=47604&r1=47603&r2=47604&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/frounds.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/frounds.ll Tue Feb 26 07:37:13 2008 @@ -1,4 +1,4 @@ -; RUN: llvm-as | llc -march=ppc32 +; RUN: llvm-as < %s | llc -march=ppc32 define i32 @foo() { entry: Modified: llvm/trunk/test/Transforms/InstCombine/2008-02-23-MulSub.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-02-23-MulSub.ll?rev=47604&r1=47603&r2=47604&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2008-02-23-MulSub.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2008-02-23-MulSub.ll Tue Feb 26 07:37:13 2008 @@ -1,4 +1,4 @@ -; RUN: llvm-as | opt -instcombine | llvm-dis | not grep mul +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep mul define i26 @mul_283(i26 %a) nounwind { entry: From kremenek at apple.com Tue Feb 26 10:44:05 2008 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 26 Feb 2008 08:44:05 -0800 Subject: [llvm-commits] [llvm] r47482 - /llvm/trunk/include/llvm/ADT/IntrusiveRefCntPtr.h In-Reply-To: <05CA39DD-3140-4D93-BD66-A474AC24BD78@apple.com> References: <200802221726.m1MHQImH012966@zion.cs.uiuc.edu> <05CA39DD-3140-4D93-BD66-A474AC24BD78@apple.com> Message-ID: On Feb 25, 2008, at 1:22 PM, Chris Lattner wrote: >> + template >> + class RefCountedBaseVPTR { > > Why do you need this class? The only way a ref counted object should > be destroyable is through Release(), which should handle the case when > "Derived" itself has a virtual dtor, no? I suppose that is true since "RefCountedBase::Release" performs a static cast to the derived class. The advantage of RefCountedBaseVPTR is that classes that derive from it (as opposed to deriving from RefCountedBase) can have the compiler *enforce* that they are never statk allocated. By making the dstor protected in RefCountedBaseVPTR, an object cannot be stack allocated (although subclasses have to make their dstor protected as well for this to work). With RefCountedBase, clients must make the dstor public in order for the static cast with the Release method to work. Thus clients that are already using a VPTR can engineer extra safety into their code by having the compiler enforce that objects derived from RefCountedBaseVPTR are never stack allocated; this same trick cannot be done with RefCountedBase (at least as far as I can tell without making RefCountedBase a friend class of Derived). >> Classes that inherit from RefCountedBaseVPTR can't >> +/// be allocated on stack. >> +// >> = >> = >> = >> ----------------------------------------------------------------------= >> ==// > > I don't think that classes inheriting from RefCountedBase should be > allocated on the stack either. release'ing them cause them to be > delete'd, which is badness for stack memory. Ref counted objects only > make sense on the heap. Neither classes should be allocated on the stack. The comments for both classes say this. From kremenek at apple.com Tue Feb 26 11:07:48 2008 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 26 Feb 2008 09:07:48 -0800 Subject: [llvm-commits] [llvm] r47482 - /llvm/trunk/include/llvm/ADT/IntrusiveRefCntPtr.h In-Reply-To: <05CA39DD-3140-4D93-BD66-A474AC24BD78@apple.com> References: <200802221726.m1MHQImH012966@zion.cs.uiuc.edu> <05CA39DD-3140-4D93-BD66-A474AC24BD78@apple.com> Message-ID: On Feb 25, 2008, at 1:22 PM, Chris Lattner wrote: >> >> + >> +#include >> +#include > > Out of curiosity, what needs stddef here? Eli added these for ptrdiff_t: http://llvm.org/viewvc/llvm-project?rev=47576&view=rev -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080226/27d97511/attachment.html From sabre at nondot.org Tue Feb 26 11:09:59 2008 From: sabre at nondot.org (Chris Lattner) Date: Tue, 26 Feb 2008 17:09:59 -0000 Subject: [llvm-commits] [llvm] r47605 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/Generic/2008-02-26-NegatableCrash.ll Message-ID: <200802261709.m1QH9xOq009507@zion.cs.uiuc.edu> Author: lattner Date: Tue Feb 26 11:09:59 2008 New Revision: 47605 URL: http://llvm.org/viewvc/llvm-project?rev=47605&view=rev Log: Fix PR2096, a regression introduced with my patch last night. This also fixes cfrac, flops, and 175.vpr Added: llvm/trunk/test/CodeGen/Generic/2008-02-26-NegatableCrash.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=47605&r1=47604&r2=47605&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Feb 26 11:09:59 2008 @@ -411,7 +411,7 @@ assert(!HonorSignDependentRoundingFPMath()); // -(X*Y) -> -X * Y - if (isNegatibleForFree(Op.getOperand(0), Depth+1)) + if (isNegatibleForFree(Op.getOperand(0), AfterLegalize, Depth+1)) return DAG.getNode(Op.getOpcode(), Op.getValueType(), GetNegatedExpression(Op.getOperand(0), DAG, AfterLegalize, Depth+1), Added: llvm/trunk/test/CodeGen/Generic/2008-02-26-NegatableCrash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2008-02-26-NegatableCrash.ll?rev=47605&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Generic/2008-02-26-NegatableCrash.ll (added) +++ llvm/trunk/test/CodeGen/Generic/2008-02-26-NegatableCrash.ll Tue Feb 26 11:09:59 2008 @@ -0,0 +1,50 @@ +; RUN: llvm-as < %s | llc +; PR2096 + %struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* } + %struct.AVCodec = type { i8*, i32, i32, i32, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32, i8*)*, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32*, i8*, i32)*, i32, %struct.AVCodec*, void (%struct.AVCodecContext*)*, %struct.AVRational*, i32* } + %struct.AVCodecContext = type { %struct.AVClass*, i32, i32, i32, i32, i32, i8*, i32, %struct.AVRational, i32, i32, i32, i32, i32, void (%struct.AVCodecContext*, %struct.AVFrame*, i32*, i32, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, float, float, i32, i32, i32, i32, float, i32, i32, i32, %struct.AVCodec*, i8*, i32, i32, void (%struct.AVCodecContext*, i8*, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, [32 x i8], i32, i32, i32, i32, i32, i32, i32, float, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, void (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i8*, i8*, float, float, i32, %struct.RcOverride*, i32, i8*, i32, i32, i32, float, float, float, float, i32, float, float, float, float, float, i32, i32, i32, i32*, i32, i32, i32, i32, %struct.AVRational, %struct.AVFrame*, i32, i32, [4 x i64], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32*)*, i32, i32, i32, i32, i32, i32, i8*, i32, i32! , i32, i32, i32, i32, i16*, i16*, i32, i32, i32, i32, %struct.AVPaletteControl*, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32 (%struct.AVCodecContext*, i8*)*, i8**, i32*, i32)*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i32, float } + %struct.AVFrame = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*] } + %struct.AVOption = type opaque + %struct.AVPaletteControl = type { i32, [256 x i32] } + %struct.AVPanScan = type { i32, i32, i32, [3 x [2 x i16]] } + %struct.AVRational = type { i32, i32 } + %struct.RcOverride = type { i32, i32, i32, float } + +define i32 @sonic_encode_frame(%struct.AVCodecContext* %avctx, i8* %buf, i32 %buf_size, i8* %data) { +entry: + switch i32 0, label %bb429 [ + i32 0, label %bb244.preheader + i32 1, label %bb279.preheader + ] + +bb279.preheader: ; preds = %entry + ret i32 0 + +bb244.preheader: ; preds = %entry + ret i32 0 + +bb429: ; preds = %entry + br i1 false, label %bb.nph1770, label %bb627 + +bb.nph1770: ; preds = %bb429 + br i1 false, label %bb471, label %bb505 + +bb471: ; preds = %bb471, %bb.nph1770 + %tmp487 = add double 0.000000e+00, 0.000000e+00 ; [#uses=1] + br i1 false, label %bb505, label %bb471 + +bb505: ; preds = %bb471, %bb.nph1770 + %xy.0.lcssa = phi double [ 0.000000e+00, %bb.nph1770 ], [ %tmp487, %bb471 ] ; [#uses=1] + %tmp507 = sub double -0.000000e+00, %xy.0.lcssa ; [#uses=1] + %tmp509 = fdiv double %tmp507, 0.000000e+00 ; [#uses=1] + %tmp510 = mul double %tmp509, 1.024000e+03 ; [#uses=1] + %tmp516 = fdiv double %tmp510, 0.000000e+00 ; [#uses=1] + %tmp517 = add double %tmp516, 5.000000e-01 ; [#uses=1] + %tmp518 = tail call double @floor( double %tmp517 ) nounwind readnone ; [#uses=0] + ret i32 0 + +bb627: ; preds = %bb429 + ret i32 0 +} + +declare double @floor(double) nounwind readnone From clattner at apple.com Tue Feb 26 11:19:52 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 26 Feb 2008 09:19:52 -0800 Subject: [llvm-commits] [llvm] r47534 - in /llvm/trunk: include/llvm/Target/TargetRegisterInfo.h lib/CodeGen/MachineInstr.cpp lib/Target/PowerPC/PPCRegisterInfo.td lib/Target/Target.td utils/TableGen/RegisterInfoEmitter.cpp In-Reply-To: <782B8D32-007E-4CCF-AD98-BA51DCEABF4B@gmail.com> References: <200802240056.m1O0uExD011393@zion.cs.uiuc.edu> <782B8D32-007E-4CCF-AD98-BA51DCEABF4B@gmail.com> Message-ID: On Feb 26, 2008, at 1:18 AM, Bill Wendling wrote: > On Feb 24, 2008, at 11:48 AM, Evan Cheng wrote: > >> I asked Bill to do this. Basically I want two names, one for >> debugging, one for asmprinting. >> >> I am ok with the patch except for the name "PrintableName". I'd >> prefer >> just Name and AsmName, the later is only used for asm printing. To me >> it's silly to change TargetRegisterInfo::getName() to a virtual >> machine and use a switch statement. The increase size to >> TargetRegisterDesc can't be that big an issue? >> > I did it this way -- using PrintableName instead of AsmName -- > because I didn't want to make so many changes to the various back- > ends. That's error prone because they all access .Name already (and > most of them do it directly without going through the getName() > method). I'm willing, of course, to go in and change PrintableName to > AsmName and have that be what the various *AsmPrinters use to emit > register names to the assembly files, but I just want to make sure > that there isn't a better way of going about this instead. :-) What > do you think? Just do it as two patches: #1 renames Name -> AsmName. Any places you miss will manifest as build errors, instead of subtle bugs. After that is committed, #2 is rename PrintableName -> Name. -Chris From lattner at apple.com Tue Feb 26 11:24:16 2008 From: lattner at apple.com (Tanya Lattner) Date: Tue, 26 Feb 2008 09:24:16 -0800 Subject: [llvm-commits] [llvm] r47593 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86ISelLowering.h In-Reply-To: <200802260920.m1Q9K2Wt026034@zion.cs.uiuc.edu> References: <200802260920.m1Q9K2Wt026034@zion.cs.uiuc.edu> Message-ID: <6A2BD03B-7607-42D7-A307-947DB3353E65@apple.com> Please use doxygen style comments for functions (///) -Tanya On Feb 26, 2008, at 1:20 AM, Arnold Schwaighofer wrote: > Author: arnolds > Date: Tue Feb 26 03:19:59 2008 > New Revision: 47593 > > URL: http://llvm.org/viewvc/llvm-project?rev=47593&view=rev > Log: > Change the lowering of arguments for tail call optimized > calls. Before arguments that could overwrite each other were > explicitly lowered to a stack slot, not giving the register allocator > a chance to optimize. Now a sequence of copyto/copyfrom virtual > registers ensures that arguments are loaded in (virtual) registers > before they are lowered to the stack slot (and might overwrite each > other). Also parameter stack slots are marked mutable for > (potentially) tail calling functions. > > Modified: > llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > llvm/trunk/lib/Target/X86/X86ISelLowering.h > > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/ > X86ISelLowering.cpp?rev=47593&r1=47592&r2=47593&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Feb 26 > 03:19:59 2008 > @@ -1057,26 +1057,55 @@ > return None; > } > > - > // IsPossiblyOverwrittenArgumentOfTailCall - Check if the operand > could possibly > // be overwritten when lowering the outgoing arguments in a tail > call. Currently > // the implementation of this call is very conservative and > assumes all > // arguments sourcing from FORMAL_ARGUMENTS or a CopyFromReg with > virtual > // registers would be overwritten by direct lowering. > -// Possible improvement: > -// Check FORMAL_ARGUMENTS corresponding MERGE_VALUES for > CopyFromReg nodes > -// indicating inreg passed arguments which also need not be > lowered to a safe > -// stack slot. > -static bool IsPossiblyOverwrittenArgumentOfTailCall(SDOperand Op) { > +static bool IsPossiblyOverwrittenArgumentOfTailCall(SDOperand Op, > + > MachineFrameInfo * MFI) { > RegisterSDNode * OpReg = NULL; > + FrameIndexSDNode * FrameIdxNode = NULL; > + int FrameIdx = 0; > if (Op.getOpcode() == ISD::FORMAL_ARGUMENTS || > (Op.getOpcode()== ISD::CopyFromReg && > - (OpReg = cast(Op.getOperand(1))) && > - OpReg->getReg() >= TargetRegisterInfo::FirstVirtualRegister)) > + (OpReg = dyn_cast(Op.getOperand(1))) && > + (OpReg->getReg() >= > TargetRegisterInfo::FirstVirtualRegister)) || > + (Op.getOpcode() == ISD::LOAD && > + (FrameIdxNode = dyn_cast(Op.getOperand > (1))) && > + (MFI->isFixedObjectIndex((FrameIdx = FrameIdxNode->getIndex > ()))) && > + (MFI->getObjectOffset(FrameIdx) >= 0))) > return true; > return false; > } > > +// CopyTailCallClobberedArgumentsToVRegs - Create virtual > registers for all > +// arguments to force loading and guarantee that arguments > sourcing from > +// incomming parameters are not overwriting each other. > +static SDOperand > +CopyTailCallClobberedArgumentsToVRegs(SDOperand Chain, > + SmallVector, 8> > &TailCallClobberedVRegs, > + SelectionDAG &DAG, > + MachineFunction &MF, > + const TargetLowering * TL) { > + > + SDOperand InFlag; > + for (unsigned i = 0, e = TailCallClobberedVRegs.size(); i != e; i > ++) { > + SDOperand Arg = TailCallClobberedVRegs[i].second; > + unsigned Idx = TailCallClobberedVRegs[i].first; > + unsigned VReg = > + MF.getRegInfo(). > + createVirtualRegister(TL->getRegClassFor(Arg.getValueType())); > + Chain = DAG.getCopyToReg(Chain, VReg, Arg, InFlag); > + InFlag = Chain.getValue(1); > + Arg = DAG.getCopyFromReg(Chain, VReg, Arg.getValueType(), > InFlag); > + TailCallClobberedVRegs[i] = std::make_pair(Idx, Arg); > + Chain = Arg.getValue(1); > + InFlag = Arg.getValue(2); > + } > + return Chain; > +} > + > // CreateCopyOfByValArgument - Make a copy of an aggregate at > address specified > // by "Src" to address "Dst" with size and alignment information > specified by > // the specific parameter attribute. The copy will be passed as a > byval function > @@ -1097,15 +1126,20 @@ > SDOperand X86TargetLowering::LowerMemArgument(SDOperand Op, > SelectionDAG &DAG, > const CCValAssign &VA, > MachineFrameInfo *MFI, > + unsigned CC, > SDOperand Root, > unsigned i) { > // Create the nodes corresponding to a load from this parameter > slot. > unsigned Flags = cast(Op.getOperand(3 + i))- > >getValue(); > + bool AlwaysUseMutable = (CC==CallingConv::Fast) && > PerformTailCallOpt; > bool isByVal = Flags & ISD::ParamFlags::ByVal; > + bool isImmutable = !AlwaysUseMutable && !isByVal; > > - // FIXME: For now, all byval parameter objects are marked > mutable. This > - // can be changed with more analysis. > + // FIXME: For now, all byval parameter objects are marked > mutable. This can be > + // changed with more analysis. > + // In case of tail call optimization mark all arguments mutable. > Since they > + // could be overwritten by lowering of arguments in case of a > tail call. > int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT > ())/8, > - VA.getLocMemOffset(), !isByVal); > + VA.getLocMemOffset(), isImmutable); > SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy()); > if (isByVal) > return FIN; > @@ -1195,7 +1229,7 @@ > ArgValues.push_back(ArgValue); > } else { > assert(VA.isMemLoc()); > - ArgValues.push_back(LowerMemArgument(Op, DAG, VA, MFI, Root, > i)); > + ArgValues.push_back(LowerMemArgument(Op, DAG, VA, MFI, CC, > Root, i)); > } > } > > @@ -1381,6 +1415,7 @@ > > SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG > &DAG) { > MachineFunction &MF = DAG.getMachineFunction(); > + MachineFrameInfo * MFI = MF.getFrameInfo(); > SDOperand Chain = Op.getOperand(0); > unsigned CC = cast(Op.getOperand(1))- > >getValue(); > bool isVarArg = cast(Op.getOperand(2))- > >getValue() != 0; > @@ -1442,7 +1477,7 @@ > > Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant > (NumBytes)); > > - SDOperand RetAddrFrIdx, NewRetAddrFrIdx; > + SDOperand RetAddrFrIdx; > if (IsTailCall) { > // Adjust the Return address stack slot. > if (FPDiff) { > @@ -1451,23 +1486,18 @@ > // Load the "old" Return address. > RetAddrFrIdx = > DAG.getLoad(VT, Chain,RetAddrFrIdx, NULL, 0); > - // Calculate the new stack slot for the return address. > - int SlotSize = Is64Bit ? 8 : 4; > - int NewReturnAddrFI = > - MF.getFrameInfo()->CreateFixedObject(SlotSize, FPDiff- > SlotSize); > - NewRetAddrFrIdx = DAG.getFrameIndex(NewReturnAddrFI, VT); > Chain = SDOperand(RetAddrFrIdx.Val, 1); > } > } > > SmallVector, 8> RegsToPass; > + SmallVector, 8> > TailCallClobberedVRegs; > SmallVector MemOpChains; > > SDOperand StackPtr; > > // Walk the register/memloc assignments, inserting copies/ > loads. For tail > - // calls, lower arguments which could otherwise be possibly > overwritten to the > - // stack slot where they would go on normal function calls. > + // calls, remember all arguments for later special lowering. > for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { > CCValAssign &VA = ArgLocs[i]; > SDOperand Arg = Op.getOperand(5+2*VA.getValNo()); > @@ -1490,13 +1520,15 @@ > if (VA.isRegLoc()) { > RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); > } else { > - if (!IsTailCall || IsPossiblyOverwrittenArgumentOfTailCall > (Arg)) { > + if (!IsTailCall) { > assert(VA.isMemLoc()); > if (StackPtr.Val == 0) > StackPtr = DAG.getCopyFromReg(Chain, X86StackPtr, > getPointerTy()); > > MemOpChains.push_back(LowerMemOpCallTo(Op, DAG, StackPtr, > VA, Chain, > Arg)); > + } else if (IsPossiblyOverwrittenArgumentOfTailCall(Arg, MFI)) { > + TailCallClobberedVRegs.push_back(std::make_pair(i,Arg)); > } > } > } > @@ -1514,9 +1546,6 @@ > InFlag = Chain.getValue(1); > } > > - if (IsTailCall) > - InFlag = SDOperand(); // ??? Isn't this nuking the preceding > loop's output? > - > // ELF / PIC requires GOT in the EBX register before function > calls via PLT > // GOT pointer. > // Does not work with tail call since ebx is not restored > correctly by > @@ -1551,11 +1580,18 @@ > InFlag = Chain.getValue(1); > } > > + > // For tail calls lower the arguments to the 'real' stack slot. > if (IsTailCall) { > SmallVector MemOpChains2; > SDOperand FIN; > int FI = 0; > + // Do not flag preceeding copytoreg stuff together with the > following stuff. > + InFlag = SDOperand(); > + > + Chain = CopyTailCallClobberedArgumentsToVRegs(Chain, > TailCallClobberedVRegs, > + DAG, MF, this); > + > for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { > CCValAssign &VA = ArgLocs[i]; > if (!VA.isRegLoc()) { > @@ -1568,28 +1604,26 @@ > uint32_t OpSize = (MVT::getSizeInBits(VA.getLocVT())+7)/8; > FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset); > FIN = DAG.getFrameIndex(FI, MVT::i32); > - SDOperand Source = Arg; > - if (IsPossiblyOverwrittenArgumentOfTailCall(Arg)) { > - // Copy from stack slots to stack slot of a tail called > function. This > - // needs to be done because if we would lower the > arguments directly > - // to their real stack slot we might end up overwriting > each other. > - // Get source stack slot. > - Source = DAG.getIntPtrConstant(VA.getLocMemOffset()); > - if (StackPtr.Val == 0) > - StackPtr = DAG.getCopyFromReg(Chain, X86StackPtr, > getPointerTy()); > - Source = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, > Source); > - if ((Flags & ISD::ParamFlags::ByVal)==0) > - Source = DAG.getLoad(VA.getValVT(), Chain, Source, > NULL, 0); > - } > > + // Find virtual register for this argument. > + bool Found=false; > + for (unsigned idx=0, e= TailCallClobberedVRegs.size(); idx > < e; idx++) > + if (TailCallClobberedVRegs[idx].first==i) { > + Arg = TailCallClobberedVRegs[idx].second; > + Found=true; > + break; > + } > + assert(IsPossiblyOverwrittenArgumentOfTailCall(Arg, MFI) > ==false || > + (Found==true && "No corresponding Argument was found")); > + > if (Flags & ISD::ParamFlags::ByVal) { > // Copy relative to framepointer. > - MemOpChains2.push_back(CreateCopyOfByValArgument(Source, > FIN, Chain, > + MemOpChains2.push_back(CreateCopyOfByValArgument(Arg, > FIN, Chain, > Flags, > DAG)); > } else { > // Store relative to framepointer. > MemOpChains2.push_back( > - DAG.getStore(Chain, Source, FIN, > + DAG.getStore(Chain, Arg, FIN, > PseudoSourceValue::getFixedStack(), FI)); > } > } > @@ -1600,8 +1634,16 @@ > &MemOpChains2[0], MemOpChains2.size()); > > // Store the return address to the appropriate stack slot. > - if (FPDiff) > - Chain = DAG.getStore(Chain,RetAddrFrIdx, NewRetAddrFrIdx, > NULL, 0); > + if (FPDiff) { > + // Calculate the new stack slot for the return address. > + int SlotSize = Is64Bit ? 8 : 4; > + int NewReturnAddrFI = > + MF.getFrameInfo()->CreateFixedObject(SlotSize, FPDiff- > SlotSize); > + MVT::ValueType VT = Is64Bit ? MVT::i64 : MVT::i32; > + SDOperand NewRetAddrFrIdx = DAG.getFrameIndex > (NewReturnAddrFI, VT); > + Chain = DAG.getStore(Chain, RetAddrFrIdx, NewRetAddrFrIdx, > + PseudoSourceValue::getFixedStack(), > NewReturnAddrFI); > + } > } > > // If the callee is a GlobalAddress node (quite common, every > direct call is) > > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/ > X86ISelLowering.h?rev=47593&r1=47592&r2=47593&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Tue Feb 26 03:19:59 > 2008 > @@ -482,7 +482,7 @@ > > SDOperand LowerMemArgument(SDOperand Op, SelectionDAG &DAG, > const CCValAssign &VA, > MachineFrameInfo *MFI, > - SDOperand Root, unsigned i); > + unsigned CC, SDOperand Root, > unsigned i); > > SDOperand LowerMemOpCallTo(SDOperand Op, SelectionDAG &DAG, > const SDOperand &StackPtr, > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From arnold.schwaighofer at gmail.com Tue Feb 26 11:46:40 2008 From: arnold.schwaighofer at gmail.com (Arnold Schwaighofer) Date: Tue, 26 Feb 2008 18:46:40 +0100 Subject: [llvm-commits] [llvm] r47593 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86ISelLowering.h In-Reply-To: <6A2BD03B-7607-42D7-A307-947DB3353E65@apple.com> References: <200802260920.m1Q9K2Wt026034@zion.cs.uiuc.edu> <6A2BD03B-7607-42D7-A307-947DB3353E65@apple.com> Message-ID: <5C3DE0BB-3AF2-459F-8A69-DD5AD8558987@gmail.com> Will correct. I always get them wrong. actually looked before commiting and many functions in that file had 2 so i followed :). On 26 Feb 2008, at 18:24, Tanya Lattner wrote: > Please use doxygen style comments for functions (///) > > -Tanya > > On Feb 26, 2008, at 1:20 AM, Arnold Schwaighofer wrote: > >> Author: arnolds >> Date: Tue Feb 26 03:19:59 2008 >> New Revision: 47593 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=47593&view=rev >> Log: >> Change the lowering of arguments for tail call optimized >> calls. Before arguments that could overwrite each other were >> explicitly lowered to a stack slot, not giving the register allocator >> a chance to optimize. Now a sequence of copyto/copyfrom virtual >> registers ensures that arguments are loaded in (virtual) registers >> before they are lowered to the stack slot (and might overwrite each >> other). Also parameter stack slots are marked mutable for >> (potentially) tail calling functions. >> >> Modified: >> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp >> llvm/trunk/lib/Target/X86/X86ISelLowering.h >> >> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/ >> X86ISelLowering.cpp?rev=47593&r1=47592&r2=47593&view=diff >> >> ===================================================================== >> = >> ======== >> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) >> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Feb 26 >> 03:19:59 2008 >> @@ -1057,26 +1057,55 @@ >> return None; >> } >> >> - >> // IsPossiblyOverwrittenArgumentOfTailCall - Check if the operand >> could possibly >> // be overwritten when lowering the outgoing arguments in a tail >> call. Currently >> // the implementation of this call is very conservative and >> assumes all >> // arguments sourcing from FORMAL_ARGUMENTS or a CopyFromReg with >> virtual >> // registers would be overwritten by direct lowering. >> -// Possible improvement: >> -// Check FORMAL_ARGUMENTS corresponding MERGE_VALUES for >> CopyFromReg nodes >> -// indicating inreg passed arguments which also need not be >> lowered to a safe >> -// stack slot. >> -static bool IsPossiblyOverwrittenArgumentOfTailCall(SDOperand Op) { >> +static bool IsPossiblyOverwrittenArgumentOfTailCall(SDOperand Op, >> + >> MachineFrameInfo * MFI) { >> RegisterSDNode * OpReg = NULL; >> + FrameIndexSDNode * FrameIdxNode = NULL; >> + int FrameIdx = 0; >> if (Op.getOpcode() == ISD::FORMAL_ARGUMENTS || >> (Op.getOpcode()== ISD::CopyFromReg && >> - (OpReg = cast(Op.getOperand(1))) && >> - OpReg->getReg() >= TargetRegisterInfo::FirstVirtualRegister)) >> + (OpReg = dyn_cast(Op.getOperand(1))) && >> + (OpReg->getReg() >= >> TargetRegisterInfo::FirstVirtualRegister)) || >> + (Op.getOpcode() == ISD::LOAD && >> + (FrameIdxNode = dyn_cast(Op.getOperand >> (1))) && >> + (MFI->isFixedObjectIndex((FrameIdx = FrameIdxNode->getIndex >> ()))) && >> + (MFI->getObjectOffset(FrameIdx) >= 0))) >> return true; >> return false; >> } >> >> +// CopyTailCallClobberedArgumentsToVRegs - Create virtual >> registers for all >> +// arguments to force loading and guarantee that arguments >> sourcing from >> +// incomming parameters are not overwriting each other. >> +static SDOperand >> +CopyTailCallClobberedArgumentsToVRegs(SDOperand Chain, >> + SmallVector, 8> >> &TailCallClobberedVRegs, >> + SelectionDAG &DAG, >> + MachineFunction &MF, >> + const TargetLowering * TL) { >> + >> + SDOperand InFlag; >> + for (unsigned i = 0, e = TailCallClobberedVRegs.size(); i != e; i >> ++) { >> + SDOperand Arg = TailCallClobberedVRegs[i].second; >> + unsigned Idx = TailCallClobberedVRegs[i].first; >> + unsigned VReg = >> + MF.getRegInfo(). >> + createVirtualRegister(TL->getRegClassFor(Arg.getValueType())); >> + Chain = DAG.getCopyToReg(Chain, VReg, Arg, InFlag); >> + InFlag = Chain.getValue(1); >> + Arg = DAG.getCopyFromReg(Chain, VReg, Arg.getValueType(), >> InFlag); >> + TailCallClobberedVRegs[i] = std::make_pair(Idx, Arg); >> + Chain = Arg.getValue(1); >> + InFlag = Arg.getValue(2); >> + } >> + return Chain; >> +} >> + >> // CreateCopyOfByValArgument - Make a copy of an aggregate at >> address specified >> // by "Src" to address "Dst" with size and alignment information >> specified by >> // the specific parameter attribute. The copy will be passed as a >> byval function >> @@ -1097,15 +1126,20 @@ >> SDOperand X86TargetLowering::LowerMemArgument(SDOperand Op, >> SelectionDAG &DAG, >> const CCValAssign &VA, >> MachineFrameInfo *MFI, >> + unsigned CC, >> SDOperand Root, >> unsigned i) { >> // Create the nodes corresponding to a load from this parameter >> slot. >> unsigned Flags = cast(Op.getOperand(3 + i))- >>> getValue(); >> + bool AlwaysUseMutable = (CC==CallingConv::Fast) && >> PerformTailCallOpt; >> bool isByVal = Flags & ISD::ParamFlags::ByVal; >> + bool isImmutable = !AlwaysUseMutable && !isByVal; >> >> - // FIXME: For now, all byval parameter objects are marked >> mutable. This >> - // can be changed with more analysis. >> + // FIXME: For now, all byval parameter objects are marked >> mutable. This can be >> + // changed with more analysis. >> + // In case of tail call optimization mark all arguments mutable. >> Since they >> + // could be overwritten by lowering of arguments in case of a >> tail call. >> int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT >> ())/8, >> - VA.getLocMemOffset(), !isByVal); >> + VA.getLocMemOffset(), >> isImmutable); >> SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy()); >> if (isByVal) >> return FIN; >> @@ -1195,7 +1229,7 @@ >> ArgValues.push_back(ArgValue); >> } else { >> assert(VA.isMemLoc()); >> - ArgValues.push_back(LowerMemArgument(Op, DAG, VA, MFI, Root, >> i)); >> + ArgValues.push_back(LowerMemArgument(Op, DAG, VA, MFI, CC, >> Root, i)); >> } >> } >> >> @@ -1381,6 +1415,7 @@ >> >> SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG >> &DAG) { >> MachineFunction &MF = DAG.getMachineFunction(); >> + MachineFrameInfo * MFI = MF.getFrameInfo(); >> SDOperand Chain = Op.getOperand(0); >> unsigned CC = cast(Op.getOperand(1))- >>> getValue(); >> bool isVarArg = cast(Op.getOperand(2))- >>> getValue() != 0; >> @@ -1442,7 +1477,7 @@ >> >> Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant >> (NumBytes)); >> >> - SDOperand RetAddrFrIdx, NewRetAddrFrIdx; >> + SDOperand RetAddrFrIdx; >> if (IsTailCall) { >> // Adjust the Return address stack slot. >> if (FPDiff) { >> @@ -1451,23 +1486,18 @@ >> // Load the "old" Return address. >> RetAddrFrIdx = >> DAG.getLoad(VT, Chain,RetAddrFrIdx, NULL, 0); >> - // Calculate the new stack slot for the return address. >> - int SlotSize = Is64Bit ? 8 : 4; >> - int NewReturnAddrFI = >> - MF.getFrameInfo()->CreateFixedObject(SlotSize, FPDiff- >> SlotSize); >> - NewRetAddrFrIdx = DAG.getFrameIndex(NewReturnAddrFI, VT); >> Chain = SDOperand(RetAddrFrIdx.Val, 1); >> } >> } >> >> SmallVector, 8> RegsToPass; >> + SmallVector, 8> >> TailCallClobberedVRegs; >> SmallVector MemOpChains; >> >> SDOperand StackPtr; >> >> // Walk the register/memloc assignments, inserting copies/ >> loads. For tail >> - // calls, lower arguments which could otherwise be possibly >> overwritten to the >> - // stack slot where they would go on normal function calls. >> + // calls, remember all arguments for later special lowering. >> for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { >> CCValAssign &VA = ArgLocs[i]; >> SDOperand Arg = Op.getOperand(5+2*VA.getValNo()); >> @@ -1490,13 +1520,15 @@ >> if (VA.isRegLoc()) { >> RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); >> } else { >> - if (!IsTailCall || IsPossiblyOverwrittenArgumentOfTailCall >> (Arg)) { >> + if (!IsTailCall) { >> assert(VA.isMemLoc()); >> if (StackPtr.Val == 0) >> StackPtr = DAG.getCopyFromReg(Chain, X86StackPtr, >> getPointerTy()); >> >> MemOpChains.push_back(LowerMemOpCallTo(Op, DAG, StackPtr, >> VA, Chain, >> Arg)); >> + } else if (IsPossiblyOverwrittenArgumentOfTailCall(Arg, >> MFI)) { >> + TailCallClobberedVRegs.push_back(std::make_pair(i,Arg)); >> } >> } >> } >> @@ -1514,9 +1546,6 @@ >> InFlag = Chain.getValue(1); >> } >> >> - if (IsTailCall) >> - InFlag = SDOperand(); // ??? Isn't this nuking the preceding >> loop's output? >> - >> // ELF / PIC requires GOT in the EBX register before function >> calls via PLT >> // GOT pointer. >> // Does not work with tail call since ebx is not restored >> correctly by >> @@ -1551,11 +1580,18 @@ >> InFlag = Chain.getValue(1); >> } >> >> + >> // For tail calls lower the arguments to the 'real' stack slot. >> if (IsTailCall) { >> SmallVector MemOpChains2; >> SDOperand FIN; >> int FI = 0; >> + // Do not flag preceeding copytoreg stuff together with the >> following stuff. >> + InFlag = SDOperand(); >> + >> + Chain = CopyTailCallClobberedArgumentsToVRegs(Chain, >> TailCallClobberedVRegs, >> + DAG, MF, this); >> + >> for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { >> CCValAssign &VA = ArgLocs[i]; >> if (!VA.isRegLoc()) { >> @@ -1568,28 +1604,26 @@ >> uint32_t OpSize = (MVT::getSizeInBits(VA.getLocVT())+7)/8; >> FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset); >> FIN = DAG.getFrameIndex(FI, MVT::i32); >> - SDOperand Source = Arg; >> - if (IsPossiblyOverwrittenArgumentOfTailCall(Arg)) { >> - // Copy from stack slots to stack slot of a tail called >> function. This >> - // needs to be done because if we would lower the >> arguments directly >> - // to their real stack slot we might end up overwriting >> each other. >> - // Get source stack slot. >> - Source = DAG.getIntPtrConstant(VA.getLocMemOffset()); >> - if (StackPtr.Val == 0) >> - StackPtr = DAG.getCopyFromReg(Chain, X86StackPtr, >> getPointerTy()); >> - Source = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, >> Source); >> - if ((Flags & ISD::ParamFlags::ByVal)==0) >> - Source = DAG.getLoad(VA.getValVT(), Chain, Source, >> NULL, 0); >> - } >> >> + // Find virtual register for this argument. >> + bool Found=false; >> + for (unsigned idx=0, e= TailCallClobberedVRegs.size(); idx >> < e; idx++) >> + if (TailCallClobberedVRegs[idx].first==i) { >> + Arg = TailCallClobberedVRegs[idx].second; >> + Found=true; >> + break; >> + } >> + assert(IsPossiblyOverwrittenArgumentOfTailCall(Arg, MFI) >> ==false || >> + (Found==true && "No corresponding Argument was found")); >> + >> if (Flags & ISD::ParamFlags::ByVal) { >> // Copy relative to framepointer. >> - MemOpChains2.push_back(CreateCopyOfByValArgument(Source, >> FIN, Chain, >> + MemOpChains2.push_back(CreateCopyOfByValArgument(Arg, >> FIN, Chain, >> Flags, >> DAG)); >> } else { >> // Store relative to framepointer. >> MemOpChains2.push_back( >> - DAG.getStore(Chain, Source, FIN, >> + DAG.getStore(Chain, Arg, FIN, >> PseudoSourceValue::getFixedStack(), FI)); >> } >> } >> @@ -1600,8 +1634,16 @@ >> &MemOpChains2[0], MemOpChains2.size()); >> >> // Store the return address to the appropriate stack slot. >> - if (FPDiff) >> - Chain = DAG.getStore(Chain,RetAddrFrIdx, NewRetAddrFrIdx, >> NULL, 0); >> + if (FPDiff) { >> + // Calculate the new stack slot for the return address. >> + int SlotSize = Is64Bit ? 8 : 4; >> + int NewReturnAddrFI = >> + MF.getFrameInfo()->CreateFixedObject(SlotSize, FPDiff- >> SlotSize); >> + MVT::ValueType VT = Is64Bit ? MVT::i64 : MVT::i32; >> + SDOperand NewRetAddrFrIdx = DAG.getFrameIndex >> (NewReturnAddrFI, VT); >> + Chain = DAG.getStore(Chain, RetAddrFrIdx, NewRetAddrFrIdx, >> + PseudoSourceValue::getFixedStack(), >> NewReturnAddrFI); >> + } >> } >> >> // If the callee is a GlobalAddress node (quite common, every >> direct call is) >> >> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/ >> X86ISelLowering.h?rev=47593&r1=47592&r2=47593&view=diff >> >> ===================================================================== >> = >> ======== >> --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) >> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Tue Feb 26 03:19:59 >> 2008 >> @@ -482,7 +482,7 @@ >> >> SDOperand LowerMemArgument(SDOperand Op, SelectionDAG &DAG, >> const CCValAssign &VA, >> MachineFrameInfo *MFI, >> - SDOperand Root, unsigned i); >> + unsigned CC, SDOperand Root, >> unsigned i); >> >> SDOperand LowerMemOpCallTo(SDOperand Op, SelectionDAG &DAG, >> const SDOperand &StackPtr, >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From arnold.schwaighofer at gmail.com Tue Feb 26 11:50:59 2008 From: arnold.schwaighofer at gmail.com (Arnold Schwaighofer) Date: Tue, 26 Feb 2008 17:50:59 -0000 Subject: [llvm-commits] [llvm] r47606 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200802261751.m1QHp0MR011092@zion.cs.uiuc.edu> Author: arnolds Date: Tue Feb 26 11:50:59 2008 New Revision: 47606 URL: http://llvm.org/viewvc/llvm-project?rev=47606&view=rev Log: Correct function comments. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47606&r1=47605&r2=47606&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Feb 26 11:50:59 2008 @@ -987,7 +987,8 @@ return VReg; } -// Determines whether a CALL node uses struct return semantics. +/// CallIsStructReturn - Determines whether a CALL node uses struct return +/// semantics. static bool CallIsStructReturn(SDOperand Op) { unsigned NumOps = (Op.getNumOperands() - 5) / 2; if (!NumOps) @@ -997,7 +998,8 @@ return Flags->getValue() & ISD::ParamFlags::StructReturn; } -// Determines whether a FORMAL_ARGUMENTS node uses struct return semantics. +/// ArgsAreStructReturn - Determines whether a FORMAL_ARGUMENTS node uses struct +/// return semantics. static bool ArgsAreStructReturn(SDOperand Op) { unsigned NumArgs = Op.Val->getNumValues() - 1; if (!NumArgs) @@ -1007,8 +1009,9 @@ return Flags->getValue() & ISD::ParamFlags::StructReturn; } -// Determines whether a CALL or FORMAL_ARGUMENTS node requires the callee to pop -// its own arguments. Callee pop is necessary to support tail calls. +/// IsCalleePop - Determines whether a CALL or FORMAL_ARGUMENTS node requires the +/// callee to pop its own arguments. Callee pop is necessary to support tail +/// calls. bool X86TargetLowering::IsCalleePop(SDOperand Op) { bool IsVarArg = cast(Op.getOperand(2))->getValue() != 0; if (IsVarArg) @@ -1026,7 +1029,8 @@ } } -// Selects the correct CCAssignFn for a CALL or FORMAL_ARGUMENTS node. +/// CCAssignFnForNode - Selects the correct CCAssignFn for a CALL or +/// FORMAL_ARGUMENTS node. CCAssignFn *X86TargetLowering::CCAssignFnForNode(SDOperand Op) const { unsigned CC = cast(Op.getOperand(1))->getValue(); @@ -1045,8 +1049,8 @@ return CC_X86_32_C; } -// Selects the appropriate decoration to apply to a MachineFunction containing a -// given FORMAL_ARGUMENTS node. +/// NameDecorationForFORMAL_ARGUMENTS - Selects the appropriate decoration to +/// apply to a MachineFunction containing a given FORMAL_ARGUMENTS node. NameDecorationStyle X86TargetLowering::NameDecorationForFORMAL_ARGUMENTS(SDOperand Op) { unsigned CC = cast(Op.getOperand(1))->getValue(); @@ -1057,11 +1061,11 @@ return None; } -// IsPossiblyOverwrittenArgumentOfTailCall - Check if the operand could possibly -// be overwritten when lowering the outgoing arguments in a tail call. Currently -// the implementation of this call is very conservative and assumes all -// arguments sourcing from FORMAL_ARGUMENTS or a CopyFromReg with virtual -// registers would be overwritten by direct lowering. +/// IsPossiblyOverwrittenArgumentOfTailCall - Check if the operand could +/// possibly be overwritten when lowering the outgoing arguments in a tail +/// call. Currently the implementation of this call is very conservative and +/// assumes all arguments sourcing from FORMAL_ARGUMENTS or a CopyFromReg with +/// virtual registers would be overwritten by direct lowering. static bool IsPossiblyOverwrittenArgumentOfTailCall(SDOperand Op, MachineFrameInfo * MFI) { RegisterSDNode * OpReg = NULL; @@ -1079,9 +1083,9 @@ return false; } -// CopyTailCallClobberedArgumentsToVRegs - Create virtual registers for all -// arguments to force loading and guarantee that arguments sourcing from -// incomming parameters are not overwriting each other. +/// CopyTailCallClobberedArgumentsToVRegs - Create virtual registers for all +/// arguments to force loading and guarantee that arguments sourcing from +/// incomming parameters are not overwriting each other. static SDOperand CopyTailCallClobberedArgumentsToVRegs(SDOperand Chain, SmallVector, 8> &TailCallClobberedVRegs, @@ -1106,10 +1110,10 @@ return Chain; } -// CreateCopyOfByValArgument - Make a copy of an aggregate at address specified -// by "Src" to address "Dst" with size and alignment information specified by -// the specific parameter attribute. The copy will be passed as a byval function -// parameter. +/// CreateCopyOfByValArgument - Make a copy of an aggregate at address specified +/// by "Src" to address "Dst" with size and alignment information specified by +/// the specific parameter attribute. The copy will be passed as a byval function +/// parameter. static SDOperand CreateCopyOfByValArgument(SDOperand Src, SDOperand Dst, SDOperand Chain, unsigned Flags, SelectionDAG &DAG) { From dpatel at apple.com Tue Feb 26 11:56:20 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 17:56:20 -0000 Subject: [llvm-commits] [llvm] r47607 - in /llvm/trunk: include/llvm/Instructions.h lib/VMCore/Instructions.cpp Message-ID: <200802261756.m1QHuKFK011279@zion.cs.uiuc.edu> Author: dpatel Date: Tue Feb 26 11:56:20 2008 New Revision: 47607 URL: http://llvm.org/viewvc/llvm-project?rev=47607&view=rev Log: Optimize most common case by using single RetVal in ReturnInst. Modified: llvm/trunk/include/llvm/Instructions.h llvm/trunk/lib/VMCore/Instructions.cpp Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=47607&r1=47606&r2=47607&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Tue Feb 26 11:56:20 2008 @@ -1379,6 +1379,7 @@ /// does not continue in this function any longer. /// class ReturnInst : public TerminatorInst { + Use RetVal; ReturnInst(const ReturnInst &RI); void init(Value *RetVal); void init(const std::vector &RetVals); @@ -1405,6 +1406,23 @@ virtual ReturnInst *clone() const; + // Transparently provide more efficient getOperand methods. + Value *getOperand(unsigned i) const { + assert(i < getNumOperands() && "getOperand() out of range!"); + if (getNumOperands() == 0 || getNumOperands() == 1) + return RetVal; + + return OperandList[i]; + } + + void setOperand(unsigned i, Value *Val) { + assert(i < getNumOperands() && "setOperand() out of range!"); + if (i == 0) + RetVal = Val; + else + OperandList[i] = Val; + } + Value *getReturnValue(unsigned n = 0) const; unsigned getNumSuccessors() const { return 0; } Modified: llvm/trunk/lib/VMCore/Instructions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=47607&r1=47606&r2=47607&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instructions.cpp (original) +++ llvm/trunk/lib/VMCore/Instructions.cpp Tue Feb 26 11:56:20 2008 @@ -573,35 +573,43 @@ ReturnInst::ReturnInst(const ReturnInst &RI) : TerminatorInst(Type::VoidTy, Instruction::Ret, - OperandList, RI.getNumOperands()) { + &RetVal, RI.getNumOperands()) { unsigned N = RI.getNumOperands(); - Use *OL = OperandList = new Use[N]; - for (unsigned i = 0; i < N; ++i) - OL[i].init(RI.getOperand(i), this); + if (N == 1) + RetVal.init(RI.RetVal, this); + else if (N) { + Use *OL = OperandList = new Use[N]; + for (unsigned i = 0; i < N; ++i) + OL[i].init(RI.getOperand(i), this); + } } ReturnInst::ReturnInst(Value *retVal, Instruction *InsertBefore) - : TerminatorInst(Type::VoidTy, Instruction::Ret, OperandList, 0, InsertBefore) { + : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, 0, InsertBefore) { init(retVal); } ReturnInst::ReturnInst(Value *retVal, BasicBlock *InsertAtEnd) - : TerminatorInst(Type::VoidTy, Instruction::Ret, OperandList, 0, InsertAtEnd) { + : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, 0, InsertAtEnd) { init(retVal); } ReturnInst::ReturnInst(BasicBlock *InsertAtEnd) - : TerminatorInst(Type::VoidTy, Instruction::Ret, OperandList, 0, InsertAtEnd) { + : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, 0, InsertAtEnd) { } -ReturnInst::ReturnInst(const std::vector &retVals, Instruction *InsertBefore) - : TerminatorInst(Type::VoidTy, Instruction::Ret, OperandList, retVals.size(), InsertBefore) { +ReturnInst::ReturnInst(const std::vector &retVals, + Instruction *InsertBefore) + : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, retVals.size(), + InsertBefore) { init(retVals); } -ReturnInst::ReturnInst(const std::vector &retVals, BasicBlock *InsertAtEnd) - : TerminatorInst(Type::VoidTy, Instruction::Ret, OperandList, retVals.size(), InsertAtEnd) { +ReturnInst::ReturnInst(const std::vector &retVals, + BasicBlock *InsertAtEnd) + : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, retVals.size(), + InsertAtEnd) { init(retVals); } ReturnInst::ReturnInst(const std::vector &retVals) - : TerminatorInst(Type::VoidTy, Instruction::Ret, OperandList, retVals.size()) { + : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, retVals.size()) { init(retVals); } @@ -610,8 +618,7 @@ assert(!isa(retVal) && "Cannot return basic block. Probably using the incorrect ctor"); NumOperands = 1; - Use *OL = OperandList = new Use[1]; - OL[0].init(retVal, this); + RetVal.init(retVal, this); } } @@ -624,9 +631,12 @@ Value *V = retVals[0]; if (V->getType() == Type::VoidTy) return; + RetVal.init(V, this); + return; } Use *OL = OperandList = new Use[NumOperands]; + RetVal.init(retVals[0], this); for (unsigned i = 0; i < NumOperands; ++i) { Value *V = retVals[i]; assert(!isa(V) && @@ -636,18 +646,22 @@ } Value *ReturnInst::getReturnValue(unsigned n) const { - if (NumOperands) - return OperandList[n]; - else + if (getNumOperands() == 0) return 0; + + assert (n < getNumOperands() && "getReturnValue out of range!"); + if (getNumOperands() == 1) + return RetVal; + else + return OperandList[n]; } unsigned ReturnInst::getNumSuccessorsV() const { return getNumSuccessors(); } -// Out-of-line ReturnInst method, put here so the C++ compiler can choose to -// emit the vtable for the class in this translation unit. +/// Out-of-line ReturnInst method, put here so the C++ compiler can choose to +/// emit the vtable for the class in this translation unit. void ReturnInst::setSuccessorV(unsigned idx, BasicBlock *NewSucc) { assert(0 && "ReturnInst has no successors!"); } @@ -659,7 +673,7 @@ } ReturnInst::~ReturnInst() { - if (NumOperands) + if (NumOperands > 1) delete [] OperandList; } From clattner at apple.com Tue Feb 26 11:52:23 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 26 Feb 2008 09:52:23 -0800 Subject: [llvm-commits] [llvm] r47482 - /llvm/trunk/include/llvm/ADT/IntrusiveRefCntPtr.h In-Reply-To: References: <200802221726.m1MHQImH012966@zion.cs.uiuc.edu> <05CA39DD-3140-4D93-BD66-A474AC24BD78@apple.com> Message-ID: <5EE4D431-19F3-4057-B87D-A769C8BA8BD5@apple.com> On Feb 26, 2008, at 8:44 AM, Ted Kremenek wrote: > > On Feb 25, 2008, at 1:22 PM, Chris Lattner wrote: > >>> + template >>> + class RefCountedBaseVPTR { >> >> Why do you need this class? The only way a ref counted object should >> be destroyable is through Release(), which should handle the case >> when >> "Derived" itself has a virtual dtor, no? > > I suppose that is true since "RefCountedBase::Release" performs a > static cast to the derived class. Right. > The advantage of RefCountedBaseVPTR is that classes that derive from > it (as opposed to deriving from RefCountedBase) can have the > compiler *enforce* that they are never statk allocated. But we want this for RefCountedBase also, right? > By making the dstor protected in RefCountedBaseVPTR, an object > cannot be stack allocated (although subclasses have to make their > dstor protected as well for this to work). With RefCountedBase, > clients must make the dstor public in order for the static cast with > the Release method to work. Thus clients that are already using a > VPTR can engineer extra safety into their code by having the > compiler enforce that objects derived from RefCountedBaseVPTR are > never stack allocated; this same trick cannot be done with > RefCountedBase (at least as far as I can tell without making > RefCountedBase a friend class of Derived). I don't really understand how having a vptr is relevant here. access control doesn't care about virtualness. In any case, is the complexity worth supporting for marginal utility? -Chris From evan.cheng at apple.com Tue Feb 26 12:08:41 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 26 Feb 2008 10:08:41 -0800 Subject: [llvm-commits] [llvm] r47594 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <200802261022.m1QAM9cw028199@zion.cs.uiuc.edu> References: <200802261022.m1QAM9cw028199@zion.cs.uiuc.edu> Message-ID: <0C15BE0F-1EDA-4B58-8814-B61146943BD4@apple.com> On Feb 26, 2008, at 2:22 AM, Arnold Schwaighofer wrote: > Author: arnolds > Date: Tue Feb 26 04:21:54 2008 > New Revision: 47594 > > URL: http://llvm.org/viewvc/llvm-project?rev=47594&view=rev > Log: > Add support for intermodule tail calls on x86/32bit with > GOT-style position independent code. Before only tail calls to > protected/hidden functions within the same module were optimized. > Now all function calls are tail call optimized. > > Modified: > llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47594&r1=47593&r2=47594&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Feb 26 > 04:21:54 2008 > @@ -1547,9 +1547,13 @@ > } > > // ELF / PIC requires GOT in the EBX register before function > calls via PLT > - // GOT pointer. > - // Does not work with tail call since ebx is not restored > correctly by > - // tailcaller. TODO: at least for x86 - verify for x86-64 > + // GOT pointer. > + // If we are tail calling and generating PIC/GOT style code load > the address > + // of the callee into ecx. The value in ecx is used as target of > the tail > + // jump. This is done to circumvent the ebx/callee-saved problem > for tail > + // calls on PIC/GOT architectures. Normally we would just put the > address of > + // GOT into ebx and then call target at PLT. But for tail callss ebx > would be > + // restored (since ebx is callee saved) before jumping to the > target at PLT. > if (!IsTailCall && !Is64Bit && > getTargetMachine().getRelocationModel() == Reloc::PIC_ && > Subtarget->isPICStyleGOT()) { > @@ -1557,6 +1561,16 @@ > DAG.getNode(X86ISD::GlobalBaseReg, > getPointerTy()), > InFlag); > InFlag = Chain.getValue(1); > + } else if (!Is64Bit && IsTailCall && > + getTargetMachine().getRelocationModel() == Reloc::PIC_ > && > + Subtarget->isPICStyleGOT() ) { > + // Note: The actual moving to ecx is done further down. > + GlobalAddressSDNode *G = dyn_cast(Callee); > + if (G && !G->getGlobal()->hasHiddenVisibility() && > + !G->getGlobal()->hasProtectedVisibility()) > + Callee = LowerGlobalAddress(Callee, DAG); > + else if (isa(Callee)) > + Callee = LowerExternalSymbol(Callee,DAG); > } Please combine the if (...) } else if (...) { to if (!Is64Bit && getTargetMachine().getRelocationModel() == Reloc::PIC_ && Subtarget->isPICStyleGot()) { if (!IsTailCall) { } else { } } Thanks, Evan > > > if (Is64Bit && isVarArg) { > @@ -1661,12 +1675,10 @@ > getTargetMachine().getCodeModel() != CodeModel::Large) > Callee = DAG.getTargetExternalSymbol(S->getSymbol(), > getPointerTy()); > } else if (IsTailCall) { > - assert(Callee.getOpcode() == ISD::LOAD && > - "Function destination must be loaded into virtual > register"); > unsigned Opc = Is64Bit ? X86::R9 : X86::ECX; > > Chain = DAG.getCopyToReg(Chain, > - DAG.getRegister(Opc, getPointerTy()) , > + DAG.getRegister(Opc, getPointerTy()), > Callee,InFlag); > Callee = DAG.getRegister(Opc, getPointerTy()); > // Add register as live out. > @@ -1773,9 +1785,8 @@ > // provided: > // * tailcallopt is enabled > // * caller/callee are fastcc > -// * elf/pic is disabled OR > -// * elf/pic enabled + callee is in module + callee > has > -// visibility protected or hidden > +// On X86_64 architecture with GOT-style position independent code > only local > +// (within module) calls are supported at the moment. > // To keep the stack aligned according to platform abi the function > // GetAlignedArgumentStackSize ensures that argument delta is > always multiples > // of stack alignment. (Dynamic linkers need this - darwin's dyld > for example) > @@ -1844,12 +1855,13 @@ > unsigned CalleeCC = cast(Call.getOperand(1))- > >getValue(); > if (CalleeCC == CallingConv::Fast && CallerCC == CalleeCC) { > SDOperand Callee = Call.getOperand(4); > - // On elf/pic %ebx needs to be livein. > + // On x86/32Bit PIC/GOT tail calls are supported. > if (getTargetMachine().getRelocationModel() != Reloc::PIC_ || > - !Subtarget->isPICStyleGOT()) > + !Subtarget->isPICStyleGOT()|| !Subtarget->is64Bit()) > return true; > > - // Can only do local tail calls with PIC. > + // Can only do local tail calls (in same module, hidden or > protected) on > + // x86_64 PIC/GOT at the moment. > if (GlobalAddressSDNode *G = > dyn_cast(Callee)) > return G->getGlobal()->hasHiddenVisibility() > || G->getGlobal()->hasProtectedVisibility(); > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From sabre at nondot.org Tue Feb 26 12:13:52 2008 From: sabre at nondot.org (Chris Lattner) Date: Tue, 26 Feb 2008 18:13:52 -0000 Subject: [llvm-commits] [llvm] r47608 - /llvm/trunk/test/Transforms/InstCombine/2008-02-23-MulSub.ll Message-ID: <200802261813.m1QIDqI8011799@zion.cs.uiuc.edu> Author: lattner Date: Tue Feb 26 12:13:51 2008 New Revision: 47608 URL: http://llvm.org/viewvc/llvm-project?rev=47608&view=rev Log: fix this test so that the fn name doesn't match the regex Modified: llvm/trunk/test/Transforms/InstCombine/2008-02-23-MulSub.ll Modified: llvm/trunk/test/Transforms/InstCombine/2008-02-23-MulSub.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-02-23-MulSub.ll?rev=47608&r1=47607&r2=47608&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2008-02-23-MulSub.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2008-02-23-MulSub.ll Tue Feb 26 12:13:51 2008 @@ -1,6 +1,6 @@ ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep mul -define i26 @mul_283(i26 %a) nounwind { +define i26 @test(i26 %a) nounwind { entry: %_add = mul i26 %a, 2885 ; [#uses=1] %_shl2 = mul i26 %a, 2884 ; [#uses=1] From clattner at apple.com Tue Feb 26 12:20:35 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 26 Feb 2008 10:20:35 -0800 Subject: [llvm-commits] [llvm] r47583 - in /llvm/trunk: lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Writer/BitcodeWriter.cpp test/Assembler/2008-02-20-MultipleReturnValue.ll In-Reply-To: <200802260129.m1Q1TXlK005059@zion.cs.uiuc.edu> References: <200802260129.m1Q1TXlK005059@zion.cs.uiuc.edu> Message-ID: <412D6830-C6CB-47F4-8A42-B3B55C38DC65@apple.com> On Feb 25, 2008, at 5:29 PM, Devang Patel wrote: > > URL: http://llvm.org/viewvc/llvm-project?rev=47583&view=rev > Log: > Update bitcode reader and writer to handle multiple return values. > Take 2. Thanks Devang, > +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Mon Feb 25 > 19:29:32 2008 > @@ -1337,17 +1337,24 @@ > } > > case bitc::FUNC_CODE_INST_RET: // RET: [opty,opval] > + { > + unsigned Size = Record.size(); > + if (Size == 0) { > + I = new ReturnInst(); > + break; > + } else { > + unsigned OpNum = 0; > + std::vector Vs; Using a std::vector for all cases will cause malloc traffic even in the size=1 case. It would be better to use an SmallVector here. However, that requires changing ReturnInst ctor to take pointer +count as input. While we don't care much about the performance of the .ll parser, we do care about the perf of the bc reader. -Chris From clattner at apple.com Tue Feb 26 12:26:24 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 26 Feb 2008 10:26:24 -0800 Subject: [llvm-commits] [llvm] r47607 - in /llvm/trunk: include/llvm/Instructions.h lib/VMCore/Instructions.cpp In-Reply-To: <200802261756.m1QHuKFK011279@zion.cs.uiuc.edu> References: <200802261756.m1QHuKFK011279@zion.cs.uiuc.edu> Message-ID: > URL: http://llvm.org/viewvc/llvm-project?rev=47607&view=rev > Log: > Optimize most common case by using single RetVal in ReturnInst. Nice! > > @@ -1405,6 +1406,23 @@ > > virtual ReturnInst *clone() const; > > + // Transparently provide more efficient getOperand methods. > + Value *getOperand(unsigned i) const { > + assert(i < getNumOperands() && "getOperand() out of range!"); > + if (getNumOperands() == 0 || getNumOperands() == 1) > + return RetVal; > + > + return OperandList[i]; > + } > + > + void setOperand(unsigned i, Value *Val) { > + assert(i < getNumOperands() && "setOperand() out of range!"); > + if (i == 0) > + RetVal = Val; > + else > + OperandList[i] = Val; > + } I would suggest just dropping these two methods: it's likely that dereferencing OperandList unconditionally is faster or as fast than conditional code. > ReturnInst::ReturnInst(const ReturnInst &RI) > : TerminatorInst(Type::VoidTy, Instruction::Ret, > - OperandList, RI.getNumOperands()) { > + &RetVal, RI.getNumOperands()) { > unsigned N = RI.getNumOperands(); > + if (N == 1) > + RetVal.init(RI.RetVal, this); > + else if (N) { > + Use *OL = OperandList = new Use[N]; > + for (unsigned i = 0; i < N; ++i) > + OL[i].init(RI.getOperand(i), this); > + } Nice, please set OperandList to null in the N = 0 case though. The best way to do this is to pass up null instead of &RetVal as the base. > Value *ReturnInst::getReturnValue(unsigned n) const { > + if (getNumOperands() == 0) > return 0; Is this needed? calling getReturnValue(0) should assert. > + assert (n < getNumOperands() && "getReturnValue out of range!"); > + if (getNumOperands() == 1) > + return RetVal; > + else > + return OperandList[n]; > } I think this whole method should just be an inline method that just does: return getOperand(n); no? -Chris From dpatel at apple.com Tue Feb 26 12:34:23 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 10:34:23 -0800 Subject: [llvm-commits] [llvm] r47607 - in /llvm/trunk: include/llvm/Instructions.h lib/VMCore/Instructions.cpp In-Reply-To: References: <200802261756.m1QHuKFK011279@zion.cs.uiuc.edu> Message-ID: On Feb 26, 2008, at 10:26 AM, Chris Lattner wrote: >> URL: http://llvm.org/viewvc/llvm-project?rev=47607&view=rev >> Log: >> Optimize most common case by using single RetVal in ReturnInst. > > Nice! > >> >> @@ -1405,6 +1406,23 @@ >> >> virtual ReturnInst *clone() const; >> >> + // Transparently provide more efficient getOperand methods. >> + Value *getOperand(unsigned i) const { >> + assert(i < getNumOperands() && "getOperand() out of range!"); >> + if (getNumOperands() == 0 || getNumOperands() == 1) >> + return RetVal; >> + >> + return OperandList[i]; >> + } >> + >> + void setOperand(unsigned i, Value *Val) { >> + assert(i < getNumOperands() && "setOperand() out of range!"); >> + if (i == 0) >> + RetVal = Val; >> + else >> + OperandList[i] = Val; >> + } > > I would suggest just dropping these two methods: it's likely that > dereferencing OperandList unconditionally is faster or as fast than > conditional code. ok > > > >> ReturnInst::ReturnInst(const ReturnInst &RI) >> : TerminatorInst(Type::VoidTy, Instruction::Ret, >> - OperandList, RI.getNumOperands()) { >> + &RetVal, RI.getNumOperands()) { >> unsigned N = RI.getNumOperands(); >> + if (N == 1) >> + RetVal.init(RI.RetVal, this); >> + else if (N) { >> + Use *OL = OperandList = new Use[N]; >> + for (unsigned i = 0; i < N; ++i) >> + OL[i].init(RI.getOperand(i), this); >> + } > > Nice, please set OperandList to null in the N = 0 case though. The > best way to do this is to pass up null instead of &RetVal as the base. ok > > >> Value *ReturnInst::getReturnValue(unsigned n) const { >> + if (getNumOperands() == 0) >> return 0; > > Is this needed? calling getReturnValue(0) should assert. > >> + assert (n < getNumOperands() && "getReturnValue out of range!"); >> + if (getNumOperands() == 1) >> + return RetVal; >> + else >> + return OperandList[n]; >> } > > I think this whole method should just be an inline method that just > does: return getOperand(n); > > no? yup, makes sense. - Devang From dpatel at apple.com Tue Feb 26 12:35:25 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 10:35:25 -0800 Subject: [llvm-commits] [llvm] r47583 - in /llvm/trunk: lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Writer/BitcodeWriter.cpp test/Assembler/2008-02-20-MultipleReturnValue.ll In-Reply-To: <412D6830-C6CB-47F4-8A42-B3B55C38DC65@apple.com> References: <200802260129.m1Q1TXlK005059@zion.cs.uiuc.edu> <412D6830-C6CB-47F4-8A42-B3B55C38DC65@apple.com> Message-ID: <9F84B805-DC80-4096-B43C-34FFA40C114F@apple.com> On Feb 26, 2008, at 10:20 AM, Chris Lattner wrote: > On Feb 25, 2008, at 5:29 PM, Devang Patel wrote: >> >> URL: http://llvm.org/viewvc/llvm-project?rev=47583&view=rev >> Log: >> Update bitcode reader and writer to handle multiple return values. >> Take 2. > > Thanks Devang, > >> +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Mon Feb 25 >> 19:29:32 2008 >> @@ -1337,17 +1337,24 @@ >> } >> >> case bitc::FUNC_CODE_INST_RET: // RET: [opty,opval] >> + { >> + unsigned Size = Record.size(); >> + if (Size == 0) { >> + I = new ReturnInst(); >> + break; >> + } else { >> + unsigned OpNum = 0; >> + std::vector Vs; > > Using a std::vector for all cases will cause malloc traffic even in > the size=1 case. It would be better to use an SmallVector > here. However, that requires changing ReturnInst ctor to take pointer > +count as input. yup, I'm going to add new ReturnInst constructors in separate patch. > While we don't care much about the performance of the .ll parser, we > do care about the perf of the bc reader. > > -Chris > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits - Devang From eli.friedman at gmail.com Tue Feb 26 12:37:49 2008 From: eli.friedman at gmail.com (Eli Friedman) Date: Tue, 26 Feb 2008 18:37:49 -0000 Subject: [llvm-commits] [llvm] r47610 - in /llvm/trunk: lib/Transforms/Scalar/CodeGenPrepare.cpp test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll Message-ID: <200802261837.m1QIbnmv012722@zion.cs.uiuc.edu> Author: efriedma Date: Tue Feb 26 12:37:49 2008 New Revision: 47610 URL: http://llvm.org/viewvc/llvm-project?rev=47610&view=rev Log: Fix for pr2093: direct operands aren't necessarily addresses, so don't try to simplify them. Added: llvm/trunk/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll Modified: llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp Modified: llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp?rev=47610&r1=47609&r2=47610&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp Tue Feb 26 12:37:49 2008 @@ -970,7 +970,8 @@ // Compute the constraint code and ConstraintType to use. OpInfo.ComputeConstraintToUse(*TLI); - if (OpInfo.ConstraintType == TargetLowering::C_Memory) { + if (OpInfo.ConstraintType == TargetLowering::C_Memory && + OpInfo.isIndirect) { Value *OpVal = OpInfo.CallOperandVal; MadeChange |= OptimizeLoadStoreInst(I, OpVal, OpVal->getType(), SunkAddrs); Added: llvm/trunk/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll?rev=47610&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll (added) +++ llvm/trunk/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll Tue Feb 26 12:37:49 2008 @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -march=x86 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" +target triple = "i386-pc-linux-gnu" + +define void @dct_unquantize_h263_intra_mmx(i16* %block, i32 %n, i32 %qscale) nounwind { +entry: + %tmp1 = shl i32 %qscale, 1 ; [#uses=1] + br i1 false, label %bb46, label %bb59 + +bb46: ; preds = %entry + ret void + +bb59: ; preds = %entry + tail call void asm sideeffect "movd $1, %mm6 \0A\09packssdw %mm6, %mm6 \0A\09packssdw %mm6, %mm6 \0A\09movd $2, %mm5 \0A\09pxor %mm7, %mm7 \0A\09packssdw %mm5, %mm5 \0A\09packssdw %mm5, %mm5 \0A\09psubw %mm5, %mm7 \0A\09pxor %mm4, %mm4 \0A\09.align 1<<4\0A\091: \0A\09movq ($0, $3), %mm0 \0A\09movq 8($0, $3), %mm1 \0A\09pmullw %mm6, %mm0 \0A\09pmullw %mm6, %mm1 \0A\09movq ($0, $3), %mm2 \0A\09movq 8($0, $3), %mm3 \0A\09pcmpgtw %mm4, %mm2 \0A\09pcmpgtw %mm4, %mm3 \0A\09pxor %mm2, %mm0 \0A\09pxor %mm3, %mm1 \0A\09paddw %mm7, %mm0 \0A\09paddw %mm7, %mm1 \0A\09pxor %mm0, %mm2 \0A\09pxor %mm1, %mm3 \0A\09pcmpeqw %mm7, %mm0 \0A\09pcmpeqw %mm7, %mm1 \0A\09pandn %mm2, %mm0 ! \0A\09pandn %mm3, %mm1 \0A\09movq %mm0, ($0, $3) \0A\09movq %mm1, 8($0, $3) \0A\09add $$16, $3 \0A\09jng 1b \0A\09", "r,imr,imr,r,~{dirflag},~{fpsr},~{flags},~{memory}"( i16* null, i32 %tmp1, i32 0, i32 0 ) nounwind + ret void +} From lattner at apple.com Tue Feb 26 12:45:54 2008 From: lattner at apple.com (Tanya Lattner) Date: Tue, 26 Feb 2008 10:45:54 -0800 Subject: [llvm-commits] [llvm] r47593 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86ISelLowering.h In-Reply-To: <5C3DE0BB-3AF2-459F-8A69-DD5AD8558987@gmail.com> References: <200802260920.m1Q9K2Wt026034@zion.cs.uiuc.edu> <6A2BD03B-7607-42D7-A307-947DB3353E65@apple.com> <5C3DE0BB-3AF2-459F-8A69-DD5AD8558987@gmail.com> Message-ID: <3D0B5EF6-FFB0-4020-AF0E-378579C7B11A@apple.com> On Feb 26, 2008, at 9:46 AM, Arnold Schwaighofer wrote: > Will correct. I always get them wrong. actually looked before > commiting and many functions in that file had 2 so i followed :). > Thanks! Feel free to update any that you see. Some always manage to get missed or they were there before we really started using doxygen. -Tanya > On 26 Feb 2008, at 18:24, Tanya Lattner wrote: > >> Please use doxygen style comments for functions (///) >> >> -Tanya >> >> On Feb 26, 2008, at 1:20 AM, Arnold Schwaighofer wrote: >> >>> Author: arnolds >>> Date: Tue Feb 26 03:19:59 2008 >>> New Revision: 47593 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=47593&view=rev >>> Log: >>> Change the lowering of arguments for tail call optimized >>> calls. Before arguments that could overwrite each other were >>> explicitly lowered to a stack slot, not giving the register >>> allocator >>> a chance to optimize. Now a sequence of copyto/copyfrom virtual >>> registers ensures that arguments are loaded in (virtual) registers >>> before they are lowered to the stack slot (and might overwrite each >>> other). Also parameter stack slots are marked mutable for >>> (potentially) tail calling functions. >>> >>> Modified: >>> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp >>> llvm/trunk/lib/Target/X86/X86ISelLowering.h >>> >>> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/ >>> X86ISelLowering.cpp?rev=47593&r1=47592&r2=47593&view=diff >>> >>> ==================================================================== >>> = >>> = >>> ======== >>> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) >>> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Feb 26 >>> 03:19:59 2008 >>> @@ -1057,26 +1057,55 @@ >>> return None; >>> } >>> >>> - >>> // IsPossiblyOverwrittenArgumentOfTailCall - Check if the operand >>> could possibly >>> // be overwritten when lowering the outgoing arguments in a tail >>> call. Currently >>> // the implementation of this call is very conservative and >>> assumes all >>> // arguments sourcing from FORMAL_ARGUMENTS or a CopyFromReg with >>> virtual >>> // registers would be overwritten by direct lowering. >>> -// Possible improvement: >>> -// Check FORMAL_ARGUMENTS corresponding MERGE_VALUES for >>> CopyFromReg nodes >>> -// indicating inreg passed arguments which also need not be >>> lowered to a safe >>> -// stack slot. >>> -static bool IsPossiblyOverwrittenArgumentOfTailCall(SDOperand Op) { >>> +static bool IsPossiblyOverwrittenArgumentOfTailCall(SDOperand Op, >>> + >>> MachineFrameInfo * MFI) { >>> RegisterSDNode * OpReg = NULL; >>> + FrameIndexSDNode * FrameIdxNode = NULL; >>> + int FrameIdx = 0; >>> if (Op.getOpcode() == ISD::FORMAL_ARGUMENTS || >>> (Op.getOpcode()== ISD::CopyFromReg && >>> - (OpReg = cast(Op.getOperand(1))) && >>> - OpReg->getReg() >= >>> TargetRegisterInfo::FirstVirtualRegister)) >>> + (OpReg = dyn_cast(Op.getOperand(1))) && >>> + (OpReg->getReg() >= >>> TargetRegisterInfo::FirstVirtualRegister)) || >>> + (Op.getOpcode() == ISD::LOAD && >>> + (FrameIdxNode = dyn_cast(Op.getOperand >>> (1))) && >>> + (MFI->isFixedObjectIndex((FrameIdx = FrameIdxNode->getIndex >>> ()))) && >>> + (MFI->getObjectOffset(FrameIdx) >= 0))) >>> return true; >>> return false; >>> } >>> >>> +// CopyTailCallClobberedArgumentsToVRegs - Create virtual >>> registers for all >>> +// arguments to force loading and guarantee that arguments >>> sourcing from >>> +// incomming parameters are not overwriting each other. >>> +static SDOperand >>> +CopyTailCallClobberedArgumentsToVRegs(SDOperand Chain, >>> + SmallVector, 8> >>> &TailCallClobberedVRegs, >>> + SelectionDAG &DAG, >>> + MachineFunction &MF, >>> + const TargetLowering * TL) { >>> + >>> + SDOperand InFlag; >>> + for (unsigned i = 0, e = TailCallClobberedVRegs.size(); i != e; i >>> ++) { >>> + SDOperand Arg = TailCallClobberedVRegs[i].second; >>> + unsigned Idx = TailCallClobberedVRegs[i].first; >>> + unsigned VReg = >>> + MF.getRegInfo(). >>> + createVirtualRegister(TL->getRegClassFor(Arg.getValueType >>> ())); >>> + Chain = DAG.getCopyToReg(Chain, VReg, Arg, InFlag); >>> + InFlag = Chain.getValue(1); >>> + Arg = DAG.getCopyFromReg(Chain, VReg, Arg.getValueType(), >>> InFlag); >>> + TailCallClobberedVRegs[i] = std::make_pair(Idx, Arg); >>> + Chain = Arg.getValue(1); >>> + InFlag = Arg.getValue(2); >>> + } >>> + return Chain; >>> +} >>> + >>> // CreateCopyOfByValArgument - Make a copy of an aggregate at >>> address specified >>> // by "Src" to address "Dst" with size and alignment information >>> specified by >>> // the specific parameter attribute. The copy will be passed as a >>> byval function >>> @@ -1097,15 +1126,20 @@ >>> SDOperand X86TargetLowering::LowerMemArgument(SDOperand Op, >>> SelectionDAG &DAG, >>> const CCValAssign >>> &VA, >>> MachineFrameInfo >>> *MFI, >>> + unsigned CC, >>> SDOperand Root, >>> unsigned i) { >>> // Create the nodes corresponding to a load from this parameter >>> slot. >>> unsigned Flags = cast(Op.getOperand(3 + i))- >>>> getValue(); >>> + bool AlwaysUseMutable = (CC==CallingConv::Fast) && >>> PerformTailCallOpt; >>> bool isByVal = Flags & ISD::ParamFlags::ByVal; >>> + bool isImmutable = !AlwaysUseMutable && !isByVal; >>> >>> - // FIXME: For now, all byval parameter objects are marked >>> mutable. This >>> - // can be changed with more analysis. >>> + // FIXME: For now, all byval parameter objects are marked >>> mutable. This can be >>> + // changed with more analysis. >>> + // In case of tail call optimization mark all arguments mutable. >>> Since they >>> + // could be overwritten by lowering of arguments in case of a >>> tail call. >>> int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT >>> ())/8, >>> - VA.getLocMemOffset(), !isByVal); >>> + VA.getLocMemOffset(), >>> isImmutable); >>> SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy()); >>> if (isByVal) >>> return FIN; >>> @@ -1195,7 +1229,7 @@ >>> ArgValues.push_back(ArgValue); >>> } else { >>> assert(VA.isMemLoc()); >>> - ArgValues.push_back(LowerMemArgument(Op, DAG, VA, MFI, Root, >>> i)); >>> + ArgValues.push_back(LowerMemArgument(Op, DAG, VA, MFI, CC, >>> Root, i)); >>> } >>> } >>> >>> @@ -1381,6 +1415,7 @@ >>> >>> SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG >>> &DAG) { >>> MachineFunction &MF = DAG.getMachineFunction(); >>> + MachineFrameInfo * MFI = MF.getFrameInfo(); >>> SDOperand Chain = Op.getOperand(0); >>> unsigned CC = cast(Op.getOperand(1))- >>>> getValue(); >>> bool isVarArg = cast(Op.getOperand(2))- >>>> getValue() != 0; >>> @@ -1442,7 +1477,7 @@ >>> >>> Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant >>> (NumBytes)); >>> >>> - SDOperand RetAddrFrIdx, NewRetAddrFrIdx; >>> + SDOperand RetAddrFrIdx; >>> if (IsTailCall) { >>> // Adjust the Return address stack slot. >>> if (FPDiff) { >>> @@ -1451,23 +1486,18 @@ >>> // Load the "old" Return address. >>> RetAddrFrIdx = >>> DAG.getLoad(VT, Chain,RetAddrFrIdx, NULL, 0); >>> - // Calculate the new stack slot for the return address. >>> - int SlotSize = Is64Bit ? 8 : 4; >>> - int NewReturnAddrFI = >>> - MF.getFrameInfo()->CreateFixedObject(SlotSize, FPDiff- >>> SlotSize); >>> - NewRetAddrFrIdx = DAG.getFrameIndex(NewReturnAddrFI, VT); >>> Chain = SDOperand(RetAddrFrIdx.Val, 1); >>> } >>> } >>> >>> SmallVector, 8> RegsToPass; >>> + SmallVector, 8> >>> TailCallClobberedVRegs; >>> SmallVector MemOpChains; >>> >>> SDOperand StackPtr; >>> >>> // Walk the register/memloc assignments, inserting copies/ >>> loads. For tail >>> - // calls, lower arguments which could otherwise be possibly >>> overwritten to the >>> - // stack slot where they would go on normal function calls. >>> + // calls, remember all arguments for later special lowering. >>> for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { >>> CCValAssign &VA = ArgLocs[i]; >>> SDOperand Arg = Op.getOperand(5+2*VA.getValNo()); >>> @@ -1490,13 +1520,15 @@ >>> if (VA.isRegLoc()) { >>> RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); >>> } else { >>> - if (!IsTailCall || IsPossiblyOverwrittenArgumentOfTailCall >>> (Arg)) { >>> + if (!IsTailCall) { >>> assert(VA.isMemLoc()); >>> if (StackPtr.Val == 0) >>> StackPtr = DAG.getCopyFromReg(Chain, X86StackPtr, >>> getPointerTy()); >>> >>> MemOpChains.push_back(LowerMemOpCallTo(Op, DAG, StackPtr, >>> VA, Chain, >>> Arg)); >>> + } else if (IsPossiblyOverwrittenArgumentOfTailCall(Arg, >>> MFI)) { >>> + TailCallClobberedVRegs.push_back(std::make_pair(i,Arg)); >>> } >>> } >>> } >>> @@ -1514,9 +1546,6 @@ >>> InFlag = Chain.getValue(1); >>> } >>> >>> - if (IsTailCall) >>> - InFlag = SDOperand(); // ??? Isn't this nuking the preceding >>> loop's output? >>> - >>> // ELF / PIC requires GOT in the EBX register before function >>> calls via PLT >>> // GOT pointer. >>> // Does not work with tail call since ebx is not restored >>> correctly by >>> @@ -1551,11 +1580,18 @@ >>> InFlag = Chain.getValue(1); >>> } >>> >>> + >>> // For tail calls lower the arguments to the 'real' stack slot. >>> if (IsTailCall) { >>> SmallVector MemOpChains2; >>> SDOperand FIN; >>> int FI = 0; >>> + // Do not flag preceeding copytoreg stuff together with the >>> following stuff. >>> + InFlag = SDOperand(); >>> + >>> + Chain = CopyTailCallClobberedArgumentsToVRegs(Chain, >>> TailCallClobberedVRegs, >>> + DAG, MF, this); >>> + >>> for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { >>> CCValAssign &VA = ArgLocs[i]; >>> if (!VA.isRegLoc()) { >>> @@ -1568,28 +1604,26 @@ >>> uint32_t OpSize = (MVT::getSizeInBits(VA.getLocVT())+7)/8; >>> FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset); >>> FIN = DAG.getFrameIndex(FI, MVT::i32); >>> - SDOperand Source = Arg; >>> - if (IsPossiblyOverwrittenArgumentOfTailCall(Arg)) { >>> - // Copy from stack slots to stack slot of a tail called >>> function. This >>> - // needs to be done because if we would lower the >>> arguments directly >>> - // to their real stack slot we might end up overwriting >>> each other. >>> - // Get source stack slot. >>> - Source = DAG.getIntPtrConstant(VA.getLocMemOffset()); >>> - if (StackPtr.Val == 0) >>> - StackPtr = DAG.getCopyFromReg(Chain, X86StackPtr, >>> getPointerTy()); >>> - Source = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, >>> Source); >>> - if ((Flags & ISD::ParamFlags::ByVal)==0) >>> - Source = DAG.getLoad(VA.getValVT(), Chain, Source, >>> NULL, 0); >>> - } >>> >>> + // Find virtual register for this argument. >>> + bool Found=false; >>> + for (unsigned idx=0, e= TailCallClobberedVRegs.size(); idx >>> < e; idx++) >>> + if (TailCallClobberedVRegs[idx].first==i) { >>> + Arg = TailCallClobberedVRegs[idx].second; >>> + Found=true; >>> + break; >>> + } >>> + assert(IsPossiblyOverwrittenArgumentOfTailCall(Arg, MFI) >>> ==false || >>> + (Found==true && "No corresponding Argument was found")); >>> + >>> if (Flags & ISD::ParamFlags::ByVal) { >>> // Copy relative to framepointer. >>> - MemOpChains2.push_back(CreateCopyOfByValArgument(Source, >>> FIN, Chain, >>> + MemOpChains2.push_back(CreateCopyOfByValArgument(Arg, >>> FIN, Chain, >>> Flags, >>> DAG)); >>> } else { >>> // Store relative to framepointer. >>> MemOpChains2.push_back( >>> - DAG.getStore(Chain, Source, FIN, >>> + DAG.getStore(Chain, Arg, FIN, >>> PseudoSourceValue::getFixedStack(), FI)); >>> } >>> } >>> @@ -1600,8 +1634,16 @@ >>> &MemOpChains2[0], MemOpChains2.size()); >>> >>> // Store the return address to the appropriate stack slot. >>> - if (FPDiff) >>> - Chain = DAG.getStore(Chain,RetAddrFrIdx, NewRetAddrFrIdx, >>> NULL, 0); >>> + if (FPDiff) { >>> + // Calculate the new stack slot for the return address. >>> + int SlotSize = Is64Bit ? 8 : 4; >>> + int NewReturnAddrFI = >>> + MF.getFrameInfo()->CreateFixedObject(SlotSize, FPDiff- >>> SlotSize); >>> + MVT::ValueType VT = Is64Bit ? MVT::i64 : MVT::i32; >>> + SDOperand NewRetAddrFrIdx = DAG.getFrameIndex >>> (NewReturnAddrFI, VT); >>> + Chain = DAG.getStore(Chain, RetAddrFrIdx, NewRetAddrFrIdx, >>> + PseudoSourceValue::getFixedStack(), >>> NewReturnAddrFI); >>> + } >>> } >>> >>> // If the callee is a GlobalAddress node (quite common, every >>> direct call is) >>> >>> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/ >>> X86ISelLowering.h?rev=47593&r1=47592&r2=47593&view=diff >>> >>> ==================================================================== >>> = >>> = >>> ======== >>> --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) >>> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Tue Feb 26 03:19:59 >>> 2008 >>> @@ -482,7 +482,7 @@ >>> >>> SDOperand LowerMemArgument(SDOperand Op, SelectionDAG &DAG, >>> const CCValAssign &VA, >>> MachineFrameInfo *MFI, >>> - SDOperand Root, unsigned i); >>> + unsigned CC, SDOperand Root, >>> unsigned i); >>> >>> SDOperand LowerMemOpCallTo(SDOperand Op, SelectionDAG &DAG, >>> const SDOperand &StackPtr, >>> >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dpatel at apple.com Tue Feb 26 12:49:29 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 18:49:29 -0000 Subject: [llvm-commits] [llvm] r47611 - in /llvm/trunk: include/llvm/Instructions.h lib/VMCore/Instructions.cpp Message-ID: <200802261849.m1QInTMD013078@zion.cs.uiuc.edu> Author: dpatel Date: Tue Feb 26 12:49:29 2008 New Revision: 47611 URL: http://llvm.org/viewvc/llvm-project?rev=47611&view=rev Log: Unify to ReturnInst::init() member functions. Modified: llvm/trunk/include/llvm/Instructions.h llvm/trunk/lib/VMCore/Instructions.cpp Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=47611&r1=47610&r2=47611&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Tue Feb 26 12:49:29 2008 @@ -1381,8 +1381,7 @@ class ReturnInst : public TerminatorInst { Use RetVal; ReturnInst(const ReturnInst &RI); - void init(Value *RetVal); - void init(const std::vector &RetVals); + void init(const Value * const* retVals, unsigned N); public: // ReturnInst constructors: Modified: llvm/trunk/lib/VMCore/Instructions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=47611&r1=47610&r2=47611&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instructions.cpp (original) +++ llvm/trunk/lib/VMCore/Instructions.cpp Tue Feb 26 12:49:29 2008 @@ -586,11 +586,13 @@ ReturnInst::ReturnInst(Value *retVal, Instruction *InsertBefore) : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, 0, InsertBefore) { - init(retVal); + if (retVal) + init(&retVal, 1); } ReturnInst::ReturnInst(Value *retVal, BasicBlock *InsertAtEnd) : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, 0, InsertAtEnd) { - init(retVal); + if (retVal) + init(&retVal, 1); } ReturnInst::ReturnInst(BasicBlock *InsertAtEnd) : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, 0, InsertAtEnd) { @@ -600,48 +602,41 @@ Instruction *InsertBefore) : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, retVals.size(), InsertBefore) { - init(retVals); + if (!retVals.empty()) + init(&retVals[0], retVals.size()); } ReturnInst::ReturnInst(const std::vector &retVals, BasicBlock *InsertAtEnd) : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, retVals.size(), InsertAtEnd) { - init(retVals); + if (!retVals.empty()) + init(&retVals[0], retVals.size()); } ReturnInst::ReturnInst(const std::vector &retVals) : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, retVals.size()) { - init(retVals); + if (!retVals.empty()) + init(&retVals[0], retVals.size()); } -void ReturnInst::init(Value *retVal) { - if (retVal && retVal->getType() != Type::VoidTy) { - assert(!isa(retVal) && - "Cannot return basic block. Probably using the incorrect ctor"); - NumOperands = 1; - RetVal.init(retVal, this); - } -} +void ReturnInst::init(const Value * const* retVals, unsigned N) { -void ReturnInst::init(const std::vector &retVals) { - if (retVals.empty()) - return; + assert (N > 0 && "Invalid operands numbers in ReturnInst init"); - NumOperands = retVals.size(); + NumOperands = N; if (NumOperands == 1) { - Value *V = retVals[0]; + const Value *V = *retVals; if (V->getType() == Type::VoidTy) return; - RetVal.init(V, this); + RetVal.init(const_cast(V), this); return; } Use *OL = OperandList = new Use[NumOperands]; - RetVal.init(retVals[0], this); for (unsigned i = 0; i < NumOperands; ++i) { - Value *V = retVals[i]; + const Value *V = *retVals++; assert(!isa(V) && "Cannot return basic block. Probably using the incorrect ctor"); - OL[i].init(V, this); + OL[i].init(const_cast(V), this); } } From asl at math.spbu.ru Tue Feb 26 12:48:48 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 26 Feb 2008 21:48:48 +0300 Subject: [llvm-commits] [llvm] r47594 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <0C15BE0F-1EDA-4B58-8814-B61146943BD4@apple.com> References: <200802261022.m1QAM9cw028199@zion.cs.uiuc.edu> <0C15BE0F-1EDA-4B58-8814-B61146943BD4@apple.com> Message-ID: <1204051728.20469.215.camel@asl.dorms.spbu.ru> > Please combine the if (...) } else if (...) { to > if (!Is64Bit && getTargetMachine().getRelocationModel() == Reloc::PIC_ > && Subtarget->isPICStyleGot()) { > if (!IsTailCall) { > } else { > } > } > Maybe it will be better to provide separate predicates for such stuff? -- With best regards, Anton Korobeynikov. Faculty of Mathematics & Mechanics, Saint Petersburg State University. From gohman at apple.com Tue Feb 26 12:50:50 2008 From: gohman at apple.com (Dan Gohman) Date: Tue, 26 Feb 2008 18:50:50 -0000 Subject: [llvm-commits] [llvm] r47612 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAG.cpp test/CodeGen/X86/invalid-shift-immediate.ll Message-ID: <200802261850.m1QIopms013143@zion.cs.uiuc.edu> Author: djg Date: Tue Feb 26 12:50:50 2008 New Revision: 47612 URL: http://llvm.org/viewvc/llvm-project?rev=47612&view=rev Log: Avoid aborting on invalid shift counts. Added: llvm/trunk/test/CodeGen/X86/invalid-shift-immediate.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=47612&r1=47611&r2=47612&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Feb 26 12:50:50 2008 @@ -1241,13 +1241,19 @@ case ISD::SHL: // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 if (ConstantSDNode *SA = dyn_cast(Op.getOperand(1))) { - ComputeMaskedBits(Op.getOperand(0), Mask.lshr(SA->getValue()), + unsigned ShAmt = SA->getValue(); + + // If the shift count is an invalid immediate, don't do anything. + if (ShAmt >= BitWidth) + return; + + ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), KnownZero, KnownOne, Depth+1); assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); - KnownZero <<= SA->getValue(); - KnownOne <<= SA->getValue(); + KnownZero <<= ShAmt; + KnownOne <<= ShAmt; // low bits known zero. - KnownZero |= APInt::getLowBitsSet(BitWidth, SA->getValue()); + KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); } return; case ISD::SRL: @@ -1255,6 +1261,10 @@ if (ConstantSDNode *SA = dyn_cast(Op.getOperand(1))) { unsigned ShAmt = SA->getValue(); + // If the shift count is an invalid immediate, don't do anything. + if (ShAmt >= BitWidth) + return; + ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), KnownZero, KnownOne, Depth+1); assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); @@ -1269,6 +1279,10 @@ if (ConstantSDNode *SA = dyn_cast(Op.getOperand(1))) { unsigned ShAmt = SA->getValue(); + // If the shift count is an invalid immediate, don't do anything. + if (ShAmt >= BitWidth) + return; + APInt InDemandedMask = (Mask << ShAmt); // If any of the demanded bits are produced by the sign extension, we also // demand the input sign bit. Added: llvm/trunk/test/CodeGen/X86/invalid-shift-immediate.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/invalid-shift-immediate.ll?rev=47612&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/invalid-shift-immediate.ll (added) +++ llvm/trunk/test/CodeGen/X86/invalid-shift-immediate.ll Tue Feb 26 12:50:50 2008 @@ -0,0 +1,30 @@ +; RUN: llvm-as < %s | llc -march=x86 +; PR2098 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin8" + +define void @foo(i32 %x) { +entry: + %x_addr = alloca i32 ; [#uses=2] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + store i32 %x, i32* %x_addr + %tmp = load i32* %x_addr, align 4 ; [#uses=1] + %tmp1 = ashr i32 %tmp, -2 ; [#uses=1] + %tmp2 = and i32 %tmp1, 1 ; [#uses=1] + %tmp23 = trunc i32 %tmp2 to i8 ; [#uses=1] + %toBool = icmp ne i8 %tmp23, 0 ; [#uses=1] + br i1 %toBool, label %bb, label %bb5 + +bb: ; preds = %entry + %tmp4 = call i32 (...)* @bar( ) nounwind ; [#uses=0] + br label %bb5 + +bb5: ; preds = %bb, %entry + br label %return + +return: ; preds = %bb5 + ret void +} + +declare i32 @bar(...) From isanbard at gmail.com Tue Feb 26 13:07:04 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 26 Feb 2008 11:07:04 -0800 Subject: [llvm-commits] [llvm] r47534 - in /llvm/trunk: include/llvm/Target/TargetRegisterInfo.h lib/CodeGen/MachineInstr.cpp lib/Target/PowerPC/PPCRegisterInfo.td lib/Target/Target.td utils/TableGen/RegisterInfoEmitter.cpp In-Reply-To: References: <200802240056.m1O0uExD011393@zion.cs.uiuc.edu> <782B8D32-007E-4CCF-AD98-BA51DCEABF4B@gmail.com> Message-ID: <16e5fdf90802261107o613a7412p698c9b6400d95551@mail.gmail.com> On Tue, Feb 26, 2008 at 9:19 AM, Chris Lattner wrote: > Just do it as two patches: #1 renames Name -> AsmName. Any places you > miss will manifest as build errors, instead of subtle bugs. After > that is committed, #2 is rename PrintableName -> Name. > Hmm...That's crazy enough to work! :-) -bw From dpatel at apple.com Tue Feb 26 13:08:13 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 19:08:13 -0000 Subject: [llvm-commits] [llvm] r47614 - in /llvm/trunk: include/llvm/Instructions.h lib/VMCore/Instructions.cpp Message-ID: <200802261908.m1QJ8DMd013919@zion.cs.uiuc.edu> Author: dpatel Date: Tue Feb 26 13:08:13 2008 New Revision: 47614 URL: http://llvm.org/viewvc/llvm-project?rev=47614&view=rev Log: Remove unnecessary getOperand/setOperand overriders. Simplify getReturnValue() Modified: llvm/trunk/include/llvm/Instructions.h llvm/trunk/lib/VMCore/Instructions.cpp Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=47614&r1=47613&r2=47614&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Tue Feb 26 13:08:13 2008 @@ -1405,25 +1405,12 @@ virtual ReturnInst *clone() const; - // Transparently provide more efficient getOperand methods. - Value *getOperand(unsigned i) const { - assert(i < getNumOperands() && "getOperand() out of range!"); - if (getNumOperands() == 0 || getNumOperands() == 1) + Value *getReturnValue(unsigned n = 0) const { + if (n == 0) return RetVal; - - return OperandList[i]; - } - - void setOperand(unsigned i, Value *Val) { - assert(i < getNumOperands() && "setOperand() out of range!"); - if (i == 0) - RetVal = Val; - else - OperandList[i] = Val; + return getOperand(n); } - Value *getReturnValue(unsigned n = 0) const; - unsigned getNumSuccessors() const { return 0; } // Methods for support type inquiry through isa, cast, and dyn_cast: Modified: llvm/trunk/lib/VMCore/Instructions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=47614&r1=47613&r2=47614&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instructions.cpp (original) +++ llvm/trunk/lib/VMCore/Instructions.cpp Tue Feb 26 13:08:13 2008 @@ -640,17 +640,6 @@ } } -Value *ReturnInst::getReturnValue(unsigned n) const { - if (getNumOperands() == 0) - return 0; - - assert (n < getNumOperands() && "getReturnValue out of range!"); - if (getNumOperands() == 1) - return RetVal; - else - return OperandList[n]; -} - unsigned ReturnInst::getNumSuccessorsV() const { return getNumSuccessors(); } From kremenek at apple.com Tue Feb 26 13:10:20 2008 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 26 Feb 2008 11:10:20 -0800 Subject: [llvm-commits] [llvm] r47482 - /llvm/trunk/include/llvm/ADT/IntrusiveRefCntPtr.h In-Reply-To: <5EE4D431-19F3-4057-B87D-A769C8BA8BD5@apple.com> References: <200802221726.m1MHQImH012966@zion.cs.uiuc.edu> <05CA39DD-3140-4D93-BD66-A474AC24BD78@apple.com> <5EE4D431-19F3-4057-B87D-A769C8BA8BD5@apple.com> Message-ID: On Feb 26, 2008, at 9:52 AM, Chris Lattner wrote: > Right. > >> The advantage of RefCountedBaseVPTR is that classes that derive >> from it (as opposed to deriving from RefCountedBase) can have the >> compiler *enforce* that they are never statk allocated. > > But we want this for RefCountedBase also, right? Sure. > > >> By making the dstor protected in RefCountedBaseVPTR, an object >> cannot be stack allocated (although subclasses have to make their >> dstor protected as well for this to work). With RefCountedBase, >> clients must make the dstor public in order for the static cast >> with the Release method to work. Thus clients that are already >> using a VPTR can engineer extra safety into their code by having >> the compiler enforce that objects derived from RefCountedBaseVPTR >> are never stack allocated; this same trick cannot be done with >> RefCountedBase (at least as far as I can tell without making >> RefCountedBase a friend class of Derived). > > I don't really understand how having a vptr is relevant here. access > control doesn't care about virtualness. In any case, is the > complexity worth supporting for marginal utility? The problem (I believe) is that a parent class cannot call a protected/ private method of a derived class unless its virtual. That's why RefCountedBaseVPTR does "delete this", instead of performing a static cast to Derived. The only way for the parent class to call Derived's private/protected non-virtual methods is if the parent class is registered as a friend of Derived. To answer your other question: no, the complexity is not worth it. If someone really wants to prevent a Derived class from being allocated on the stack, they can make the dstor private and make RefCountedBase a friend. From ggreif at gmail.com Tue Feb 26 13:13:21 2008 From: ggreif at gmail.com (Gabor Greif) Date: Tue, 26 Feb 2008 19:13:21 -0000 Subject: [llvm-commits] [llvm] r47615 - /llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp Message-ID: <200802261913.m1QJDLYG014077@zion.cs.uiuc.edu> Author: ggreif Date: Tue Feb 26 13:13:21 2008 New Revision: 47615 URL: http://llvm.org/viewvc/llvm-project?rev=47615&view=rev Log: fix http://llvm.org/bugs/show_bug.cgi?id=2097 Modified: llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp Modified: llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp?rev=47615&r1=47614&r2=47615&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp Tue Feb 26 13:13:21 2008 @@ -991,7 +991,7 @@ return false; // Only do this xform if truncating is free. - if (!TLI->isTruncateFree(I->getType(), Src->getType())) + if (TLI && !TLI->isTruncateFree(I->getType(), Src->getType())) return false; // Only safe to perform the optimization if the source is also defined in From dpatel at apple.com Tue Feb 26 13:15:27 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 19:15:27 -0000 Subject: [llvm-commits] [llvm] r47616 - in /llvm/trunk: include/llvm/Instructions.h lib/VMCore/Instructions.cpp Message-ID: <200802261915.m1QJFRRU014210@zion.cs.uiuc.edu> Author: dpatel Date: Tue Feb 26 13:15:26 2008 New Revision: 47616 URL: http://llvm.org/viewvc/llvm-project?rev=47616&view=rev Log: Avoid const_casts Modified: llvm/trunk/include/llvm/Instructions.h llvm/trunk/lib/VMCore/Instructions.cpp Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=47616&r1=47615&r2=47616&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Tue Feb 26 13:15:26 2008 @@ -1381,7 +1381,7 @@ class ReturnInst : public TerminatorInst { Use RetVal; ReturnInst(const ReturnInst &RI); - void init(const Value * const* retVals, unsigned N); + void init(Value * const* retVals, unsigned N); public: // ReturnInst constructors: Modified: llvm/trunk/lib/VMCore/Instructions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=47616&r1=47615&r2=47616&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instructions.cpp (original) +++ llvm/trunk/lib/VMCore/Instructions.cpp Tue Feb 26 13:15:26 2008 @@ -618,25 +618,25 @@ init(&retVals[0], retVals.size()); } -void ReturnInst::init(const Value * const* retVals, unsigned N) { +void ReturnInst::init(Value * const* retVals, unsigned N) { assert (N > 0 && "Invalid operands numbers in ReturnInst init"); NumOperands = N; if (NumOperands == 1) { - const Value *V = *retVals; + Value *V = *retVals; if (V->getType() == Type::VoidTy) return; - RetVal.init(const_cast(V), this); + RetVal.init(V, this); return; } Use *OL = OperandList = new Use[NumOperands]; for (unsigned i = 0; i < NumOperands; ++i) { - const Value *V = *retVals++; + Value *V = *retVals++; assert(!isa(V) && "Cannot return basic block. Probably using the incorrect ctor"); - OL[i].init(const_cast(V), this); + OL[i].init(V, this); } } From dpatel at apple.com Tue Feb 26 13:38:19 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 19:38:19 -0000 Subject: [llvm-commits] [llvm] r47619 - in /llvm/trunk: include/llvm/Instructions.h lib/Bitcode/Reader/BitcodeReader.cpp lib/VMCore/Instructions.cpp Message-ID: <200802261938.m1QJcKak015024@zion.cs.uiuc.edu> Author: dpatel Date: Tue Feb 26 13:38:17 2008 New Revision: 47619 URL: http://llvm.org/viewvc/llvm-project?rev=47619&view=rev Log: Use SmallVector while constructing ReturnInst. Modified: llvm/trunk/include/llvm/Instructions.h llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp llvm/trunk/lib/VMCore/Instructions.cpp Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=47619&r1=47618&r2=47619&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Tue Feb 26 13:38:17 2008 @@ -1400,6 +1400,9 @@ ReturnInst(const std::vector &retVals); ReturnInst(const std::vector &retVals, Instruction *InsertBefore); ReturnInst(const std::vector &retVals, BasicBlock *InsertAtEnd); + ReturnInst(Value * const* retVals, unsigned N); + ReturnInst(Value * const* retVals, unsigned N, Instruction *InsertBefore); + ReturnInst(Value * const* retVals, unsigned N, BasicBlock *InsertAtEnd); explicit ReturnInst(BasicBlock *InsertAtEnd); virtual ~ReturnInst(); Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=47619&r1=47618&r2=47619&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Tue Feb 26 13:38:17 2008 @@ -21,6 +21,7 @@ #include "llvm/ParamAttrsList.h" #include "llvm/AutoUpgrade.h" #include "llvm/ADT/SmallString.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/Support/MathExtras.h" #include "llvm/Support/MemoryBuffer.h" using namespace llvm; @@ -1344,7 +1345,7 @@ break; } else { unsigned OpNum = 0; - std::vector Vs; + SmallVector Vs; do { Value *Op = NULL; if (getValueTypePair(Record, OpNum, NextValueNo, Op)) @@ -1352,7 +1353,8 @@ Vs.push_back(Op); } while(OpNum != Record.size()); - I = new ReturnInst(Vs); + // SmallVector Vs has at least one element. + I = new ReturnInst(&Vs[0], Vs.size()); break; } } Modified: llvm/trunk/lib/VMCore/Instructions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=47619&r1=47618&r2=47619&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instructions.cpp (original) +++ llvm/trunk/lib/VMCore/Instructions.cpp Tue Feb 26 13:38:17 2008 @@ -618,6 +618,24 @@ init(&retVals[0], retVals.size()); } +ReturnInst::ReturnInst(Value * const* retVals, unsigned N, + Instruction *InsertBefore) + : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, N, InsertBefore) { + if (N != 0) + init(retVals, N); +} +ReturnInst::ReturnInst(Value * const* retVals, unsigned N, + BasicBlock *InsertAtEnd) + : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, N, InsertAtEnd) { + if (N != 0) + init(retVals, N); +} +ReturnInst::ReturnInst(Value * const* retVals, unsigned N) + : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, N) { + if (N != 0) + init(retVals, N); +} + void ReturnInst::init(Value * const* retVals, unsigned N) { assert (N > 0 && "Invalid operands numbers in ReturnInst init"); From evan.cheng at apple.com Tue Feb 26 13:58:17 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 26 Feb 2008 11:58:17 -0800 Subject: [llvm-commits] [llvm] r47594 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <1204051728.20469.215.camel@asl.dorms.spbu.ru> References: <200802261022.m1QAM9cw028199@zion.cs.uiuc.edu> <0C15BE0F-1EDA-4B58-8814-B61146943BD4@apple.com> <1204051728.20469.215.camel@asl.dorms.spbu.ru> Message-ID: <935E52AA-77EF-46AC-B15A-F020EFB5794E@apple.com> That's a good idea. The key point is, please refactor the code! :-) Evan On Feb 26, 2008, at 10:48 AM, Anton Korobeynikov wrote: > >> Please combine the if (...) } else if (...) { to >> if (!Is64Bit && getTargetMachine().getRelocationModel() == >> Reloc::PIC_ >> && Subtarget->isPICStyleGot()) { >> if (!IsTailCall) { >> } else { >> } >> } >> > Maybe it will be better to provide separate predicates for such stuff? > > -- > With best regards, Anton Korobeynikov. > > Faculty of Mathematics & Mechanics, Saint Petersburg State University. > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From kledzik at apple.com Tue Feb 26 14:26:44 2008 From: kledzik at apple.com (Nick Kledzik) Date: Tue, 26 Feb 2008 20:26:44 -0000 Subject: [llvm-commits] [llvm] r47621 - in /llvm/trunk: include/llvm-c/lto.h tools/lto2/ tools/lto2/LTOCodeGenerator.cpp tools/lto2/LTOCodeGenerator.h tools/lto2/LTOModule.cpp tools/lto2/LTOModule.h tools/lto2/Makefile tools/lto2/lto.cpp tools/lto2/lto.exports Message-ID: <200802262026.m1QKQjX8016450@zion.cs.uiuc.edu> Author: kledzik Date: Tue Feb 26 14:26:43 2008 New Revision: 47621 URL: http://llvm.org/viewvc/llvm-project?rev=47621&view=rev Log: first commit of new LTO system. It is not hooked up in the llvm/tools/Makefile, so no one will build it be default yet Added: llvm/trunk/include/llvm-c/lto.h llvm/trunk/tools/lto2/ llvm/trunk/tools/lto2/LTOCodeGenerator.cpp llvm/trunk/tools/lto2/LTOCodeGenerator.h llvm/trunk/tools/lto2/LTOModule.cpp llvm/trunk/tools/lto2/LTOModule.h llvm/trunk/tools/lto2/Makefile llvm/trunk/tools/lto2/lto.cpp llvm/trunk/tools/lto2/lto.exports Added: llvm/trunk/include/llvm-c/lto.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm-c/lto.h?rev=47621&view=auto ============================================================================== --- llvm/trunk/include/llvm-c/lto.h (added) +++ llvm/trunk/include/llvm-c/lto.h Tue Feb 26 14:26:43 2008 @@ -0,0 +1,234 @@ +/*===-- llvm-c/lto.h - LTO Public C Interface ---------------------*- C -*-===*\ +|* *| +|* The LLVM Compiler Infrastructure *| +|* *| +|* This file is distributed under the University of Illinois Open Source *| +|* License. See LICENSE.TXT for details. *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This header provides public interface to an abstract link time optimization*| +|* library. LLVM provides an implementation of this interface for use with *| +|* llvm bitcode files. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LTO_H +#define LTO_H 1 + +#include +#include + +typedef enum { + LTO_SYMBOL_ALIGNMENT_MASK = 0x0000001F, /* log2 of alignment */ + LTO_SYMBOL_PERMISSIONS_MASK = 0x000000E0, + LTO_SYMBOL_PERMISSIONS_CODE = 0x000000A0, + LTO_SYMBOL_PERMISSIONS_DATA = 0x000000C0, + LTO_SYMBOL_PERMISSIONS_RODATA = 0x00000080, + LTO_SYMBOL_DEFINITION_MASK = 0x00000700, + LTO_SYMBOL_DEFINITION_REGULAR = 0x00000100, + LTO_SYMBOL_DEFINITION_TENTATIVE = 0x00000200, + LTO_SYMBOL_DEFINITION_WEAK = 0x00000300, + LTO_SYMBOL_DEFINITION_UNDEFINED = 0x00000400, + LTO_SYMBOL_SCOPE_MASK = 0x00001800, + LTO_SYMBOL_SCOPE_INTERNAL = 0x00000800, + LTO_SYMBOL_SCOPE_HIDDEN = 0x00001000, + LTO_SYMBOL_SCOPE_DEFAULT = 0x00001800 +} lto_symbol_attributes; + +typedef enum { + LTO_DEBUG_MODEL_NONE = 0, + LTO_DEBUG_MODEL_DWARF = 1 +} lto_debug_model; + +typedef enum { + LTO_CODEGEN_PIC_MODEL_STATIC = 0, + LTO_CODEGEN_PIC_MODEL_DYNAMIC = 1, + LTO_CODEGEN_PIC_MODEL_DYNAMIC_NO_PIC = 2 +} lto_codegen_model; + + +/** opaque reference to a loaded object module */ +typedef struct LTOModule* lto_module_t; + +/** opaque reference to a code generator */ +typedef struct LTOCodeGenerator* lto_code_gen_t; + + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Returns a printable string. + */ +extern const char* +lto_get_version(); + + +/** + * Returns the last error string or NULL if last operation was sucessful. + */ +extern const char* +lto_get_error_message(); + + +/** + * Checks if a file is a loadable object file. + */ +extern bool +lto_module_is_object_file(const char* path); + + +/** + * Checks if a file is a loadable object compiled for requested target. + */ +extern bool +lto_module_is_object_file_for_target(const char* path, + const char* target_triple_prefix); + + +/** + * Checks if a buffer is a loadable object file. + */ +extern bool +lto_module_is_object_file_in_memory(const void* mem, size_t length); + + +/** + * Checks if a buffer is a loadable object compiled for requested target. + */ +extern bool +lto_module_is_object_file_in_memory_for_target(const void* mem, size_t length, + const char* target_triple_prefix); + + +/** + * Loads an object file from disk. + * Returns NULL on error (check lto_get_error_message() for details). + */ +extern lto_module_t +lto_module_create(const char* path); + + +/** + * Loads an object file from memory. + * Returns NULL on error (check lto_get_error_message() for details). + */ +extern lto_module_t +lto_module_create_from_memory(const void* mem, size_t length); + + +/** + * Frees all memory internally allocated by the module. + * Upon return the lto_module_t is no longer valid. + */ +extern void +lto_module_dispose(lto_module_t mod); + + +/** + * Returns triple string which the object module was compiled under. + */ +extern const char* +lto_module_get_target_triple(lto_module_t mod); + + +/** + * Returns the number of symbols in the object module. + */ +extern unsigned int +lto_module_get_num_symbols(lto_module_t mod); + + +/** + * Returns the name of the ith symbol in the object module. + */ +extern const char* +lto_module_get_symbol_name(lto_module_t mod, unsigned int index); + + +/** + * Returns the attributes of the ith symbol in the object module. + */ +extern lto_symbol_attributes +lto_module_get_symbol_attribute(lto_module_t mod, unsigned int index); + + +/** + * Instantiates a code generator. + * Returns NULL on error (check lto_get_error_message() for details). + */ +extern lto_code_gen_t +lto_codegen_create(); + + +/** + * Frees all code generator and all memory it internally allocated. + * Upon return the lto_code_gen_t is no longer valid. + */ +extern void +lto_codegen_dispose(lto_code_gen_t); + + + +/** + * Add an object module to the set of modules for which code will be generated. + * Returns true on error (check lto_get_error_message() for details). + */ +extern bool +lto_codegen_add_module(lto_code_gen_t cg, lto_module_t mod); + + + +/** + * Sets if debug info should be generated. + * Returns true on error (check lto_get_error_message() for details). + */ +extern bool +lto_codegen_set_debug_model(lto_code_gen_t cg, lto_debug_model); + + +/** + * Sets which PIC code model to generated. + * Returns true on error (check lto_get_error_message() for details). + */ +extern bool +lto_codegen_set_pic_model(lto_code_gen_t cg, lto_codegen_model); + + +/** + * Adds to a list of all global symbols that must exist in the final + * generated code. If a function is not listed, it might be + * inlined into every usage and optimized away. + */ +extern void +lto_codegen_add_must_preserve_symbol(lto_code_gen_t cg, const char* symbol); + + +/** + * Writes a new object file at the specified path that contains the + * merged contents of all modules added so far. + * Returns true on error (check lto_get_error_message() for details). + */ +extern bool +lto_codegen_write_merged_modules(lto_code_gen_t cg, const char* path); + + +/** + * Generates code for all added modules into one native object file. + * On sucess returns a pointer to a generated mach-o/ELF buffer and + * length set to the buffer size. Client owns the buffer and should + * free() it when done. + * On failure, returns NULL (check lto_get_error_message() for details). + */ +extern void* +lto_codegen_compile(lto_code_gen_t cg, size_t* length); + + +#ifdef __cplusplus +} +#endif + + +#endif Added: llvm/trunk/tools/lto2/LTOCodeGenerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto2/LTOCodeGenerator.cpp?rev=47621&view=auto ============================================================================== --- llvm/trunk/tools/lto2/LTOCodeGenerator.cpp (added) +++ llvm/trunk/tools/lto2/LTOCodeGenerator.cpp Tue Feb 26 14:26:43 2008 @@ -0,0 +1,465 @@ +//===-LTOCodeGenerator.cpp - LLVM Link Time Optimizer ---------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the Link Time Optimization library. This library is +// intended to be used by linker to optimize code at link time. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Module.h" +#include "llvm/PassManager.h" +#include "llvm/Linker.h" +#include "llvm/Constants.h" +#include "llvm/DerivedTypes.h" +#include "llvm/ModuleProvider.h" +#include "llvm/Bitcode/ReaderWriter.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/FileUtilities.h" +#include "llvm/Support/SystemUtils.h" +#include "llvm/Support/Mangler.h" +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/System/Program.h" +#include "llvm/System/Signals.h" +#include "llvm/Analysis/Passes.h" +#include "llvm/Analysis/LoopPass.h" +#include "llvm/Analysis/Verifier.h" +#include "llvm/CodeGen/FileWriters.h" +#include "llvm/Target/SubtargetFeature.h" +#include "llvm/Target/TargetOptions.h" +#include "llvm/Target/TargetData.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetMachineRegistry.h" +#include "llvm/Target/TargetAsmInfo.h" +#include "llvm/Transforms/IPO.h" +#include "llvm/Transforms/Scalar.h" +#include "llvm/Analysis/LoadValueNumbering.h" +#include "llvm/Support/MathExtras.h" +#include "llvm/Config/config.h" + +#include "LTOModule.h" +#include "LTOCodeGenerator.h" + +#include +#include +#include +#include + + +using namespace llvm; + + + +const char* LTOCodeGenerator::getVersionString() +{ +#ifdef LLVM_VERSION_INFO + return PACKAGE_NAME " version " PACKAGE_VERSION ", " LLVM_VERSION_INFO; +#else + return PACKAGE_NAME " version " PACKAGE_VERSION; +#endif +} + + +LTOCodeGenerator::LTOCodeGenerator() + : _linker("LinkTimeOptimizer", "ld-temp.o"), _target(NULL), + _emitDwarfDebugInfo(false), _scopeRestrictionsDone(false), + _codeModel(LTO_CODEGEN_PIC_MODEL_DYNAMIC) +{ + +} + +LTOCodeGenerator::~LTOCodeGenerator() +{ + // FIXME +} + + + +bool LTOCodeGenerator::addModule(LTOModule* mod, std::string& errMsg) +{ + return _linker.LinkInModule(mod->getLLVVMModule(), &errMsg); +} + + +bool LTOCodeGenerator::setDebugInfo(lto_debug_model debug, std::string& errMsg) +{ + switch (debug) { + case LTO_DEBUG_MODEL_NONE: + _emitDwarfDebugInfo = false; + return false; + + case LTO_DEBUG_MODEL_DWARF: + _emitDwarfDebugInfo = true; + return false; + } + errMsg = "unknown debug format"; + return true; +} + + +bool LTOCodeGenerator::setCodePICModel(lto_codegen_model model, + std::string& errMsg) +{ + switch (model) { + case LTO_CODEGEN_PIC_MODEL_STATIC: + case LTO_CODEGEN_PIC_MODEL_DYNAMIC: + case LTO_CODEGEN_PIC_MODEL_DYNAMIC_NO_PIC: + _codeModel = model; + return false; + } + errMsg = "unknown pic model"; + return true; +} + + +void LTOCodeGenerator::addMustPreserveSymbol(const char* sym) +{ + _mustPreserveSymbols[sym] = 1; +} + + +bool LTOCodeGenerator::writeMergedModules(const char* path, std::string& errMsg) +{ + if ( this->determineTarget(errMsg) ) + return true; + + // mark which symbols can not be internalized + this->applyScopeRestrictions(); + + // create output file + std::ofstream out(path, std::ios_base::out|std::ios::trunc|std::ios::binary); + if ( out.fail() ) { + errMsg = "could not open bitcode file for writing: "; + errMsg += path; + return true; + } + + // write bitcode to it + WriteBitcodeToFile(_linker.getModule(), out); + if ( out.fail() ) { + errMsg = "could not write bitcode file: "; + errMsg += path; + return true; + } + + return false; +} + + +void* LTOCodeGenerator::compile(size_t* length, std::string& errMsg) +{ + // make unqiue temp .s file to put generated assembly code + sys::Path uniqueAsmPath("lto-llvm.s"); + if ( uniqueAsmPath.createTemporaryFileOnDisk(true, &errMsg) ) + return NULL; + sys::RemoveFileOnSignal(uniqueAsmPath); + + // generate assembly code + std::ofstream asmFile(uniqueAsmPath.c_str()); + bool genResult = this->generateAssemblyCode(asmFile, errMsg); + asmFile.close(); + if ( genResult ) { + if ( uniqueAsmPath.exists() ) + uniqueAsmPath.eraseFromDisk(); + return NULL; + } + + // make unqiue temp .o file to put generated object file + sys::PathWithStatus uniqueObjPath("lto-llvm.o"); + if ( uniqueObjPath.createTemporaryFileOnDisk(true, &errMsg) ) { + if ( uniqueAsmPath.exists() ) + uniqueAsmPath.eraseFromDisk(); + return NULL; + } + sys::RemoveFileOnSignal(uniqueObjPath); + + // assemble the assembly code + void* buffer = NULL; + bool asmResult = this->assemble(uniqueAsmPath.toString(), + uniqueObjPath.toString(), errMsg); + if ( !asmResult ) { + // read .o file into memory buffer + const sys::FileStatus* objStatus; + objStatus = uniqueObjPath.getFileStatus(false, &errMsg); + if ( objStatus != NULL ) { + *length = objStatus->getSize(); + // use malloc() because caller will own this buffer and free() it + buffer = ::malloc(*length); + if ( buffer != NULL ) { + int fd = ::open(uniqueObjPath.c_str(), O_RDONLY, 0); + if ( fd != -1 ) { + // read object file contents into buffer + if ( ::read(fd, buffer, *length) != (ssize_t)*length ) { + errMsg = "error reading object file"; + free(buffer); + buffer = NULL; + } + close(fd); + } + else { + errMsg = "error opening object file"; + free(buffer); + buffer = NULL; + } + } + else { + errMsg = "error mallocing space for object file"; + } + } + else { + errMsg = "error stat'ing object file"; + } + } + // clean up temp files + uniqueAsmPath.eraseFromDisk(); + uniqueObjPath.eraseFromDisk(); + return buffer; +} + + +bool LTOCodeGenerator::assemble(const std::string& asmPath, + const std::string& objPath, std::string& errMsg) +{ + // find compiler driver + const sys::Path gcc = sys::Program::FindProgramByName("gcc"); + if ( gcc.isEmpty() ) { + errMsg = "can't locate gcc"; + return true; + } + + // build argument list + std::vector args; + std::string targetTriple = _linker.getModule()->getTargetTriple(); + args.push_back(gcc.c_str()); + if ( targetTriple.find("darwin") != targetTriple.size() ) { + if (strncmp(targetTriple.c_str(), "i686-apple-", 11) == 0) { + args.push_back("-arch"); + args.push_back("i386"); + } + else if (strncmp(targetTriple.c_str(), "x86_64-apple-", 13) == 0) { + args.push_back("-arch"); + args.push_back("x86_64"); + } + else if (strncmp(targetTriple.c_str(), "powerpc-apple-", 14) == 0) { + args.push_back("-arch"); + args.push_back("ppc"); + } + else if (strncmp(targetTriple.c_str(), "powerpc64-apple-", 16) == 0) { + args.push_back("-arch"); + args.push_back("ppc64"); + } + } + args.push_back("-c"); + args.push_back("-x"); + args.push_back("assembler"); + args.push_back("-o"); + args.push_back(objPath.c_str()); + args.push_back(asmPath.c_str()); + args.push_back(0); + + // invoke assembler + if ( sys::Program::ExecuteAndWait(gcc, &args[0], 0, 0, 0, 0, &errMsg) ) { + errMsg = "error in assembly"; + return true; + } + return false; // success +} + + + +bool LTOCodeGenerator::determineTarget(std::string& errMsg) +{ + if ( _target == NULL ) { + // create target machine from info for merged modules + Module* mergedModule = _linker.getModule(); + const TargetMachineRegistry::entry* march = + TargetMachineRegistry::getClosestStaticTargetForModule( + *mergedModule, errMsg); + if ( march == NULL ) + return true; + std::string features; + _target = march->CtorFn(*mergedModule, features); + } + return false; +} + +void LTOCodeGenerator::applyScopeRestrictions() +{ + if ( !_scopeRestrictionsDone ) { + Module* mergedModule = _linker.getModule(); + + // Start off with a verification pass. + PassManager passes; + passes.add(createVerifierPass()); + + // mark which symbols can not be internalized + if ( !_mustPreserveSymbols.empty() ) { + Mangler mangler(*mergedModule, + _target->getTargetAsmInfo()->getGlobalPrefix()); + std::vector mustPreserveList; + for (Module::iterator f = mergedModule->begin(), + e = mergedModule->end(); f != e; ++f) { + if ( !f->isDeclaration() + && _mustPreserveSymbols.count(mangler.getValueName(f)) ) + mustPreserveList.push_back(::strdup(f->getName().c_str())); + } + for (Module::global_iterator v = mergedModule->global_begin(), + e = mergedModule->global_end(); v != e; ++v) { + if ( !v->isDeclaration() + && _mustPreserveSymbols.count(mangler.getValueName(v)) ) + mustPreserveList.push_back(::strdup(v->getName().c_str())); + } + passes.add(createInternalizePass(mustPreserveList)); + } + // apply scope restrictions + passes.run(*mergedModule); + + _scopeRestrictionsDone = true; + } +} + + +/// Optimize merged modules using various IPO passes +bool LTOCodeGenerator::generateAssemblyCode(std::ostream& out, std::string& errMsg) +{ + if ( this->determineTarget(errMsg) ) + return true; + + // mark which symbols can not be internalized + this->applyScopeRestrictions(); + + Module* mergedModule = _linker.getModule(); + + // If target supports exception handling then enable it now. + if ( _target->getTargetAsmInfo()->doesSupportExceptionHandling() ) + llvm::ExceptionHandling = true; + + // set codegen model + switch( _codeModel ) { + case LTO_CODEGEN_PIC_MODEL_STATIC: + _target->setRelocationModel(Reloc::Static); + break; + case LTO_CODEGEN_PIC_MODEL_DYNAMIC: + _target->setRelocationModel(Reloc::PIC_); + break; + case LTO_CODEGEN_PIC_MODEL_DYNAMIC_NO_PIC: + _target->setRelocationModel(Reloc::DynamicNoPIC); + break; + } + + // Instantiate the pass manager to organize the passes. + PassManager passes; + + // Start off with a verification pass. + passes.add(createVerifierPass()); + + // Add an appropriate TargetData instance for this module... + passes.add(new TargetData(*_target->getTargetData())); + + // Now that we internalized some globals, see if we can hack on them! + passes.add(createGlobalOptimizerPass()); + + // Linking modules together can lead to duplicated global constants, only + // keep one copy of each constant... + passes.add(createConstantMergePass()); + + // If the -s command line option was specified, strip the symbols out of the + // resulting program to make it smaller. -s is a GLD option that we are + // supporting. + if( !llvm::ExceptionHandling ) { + // FIXME : This causes multiple nameless _.eh symbols on + // darwin when EH is ON. + passes.add(createStripSymbolsPass()); + } + + // Propagate constants at call sites into the functions they call. + passes.add(createIPConstantPropagationPass()); + + // Remove unused arguments from functions... + passes.add(createDeadArgEliminationPass()); + + passes.add(createFunctionInliningPass()); // Inline small functions + + passes.add(createPruneEHPass()); // Remove dead EH info + + passes.add(createGlobalDCEPass()); // Remove dead functions + + // If we didn't decide to inline a function, check to see if we can + // transform it to pass arguments by value instead of by reference. + passes.add(createArgumentPromotionPass()); + + // The IPO passes may leave cruft around. Clean up after them. + passes.add(createInstructionCombiningPass()); + + passes.add(createScalarReplAggregatesPass()); // Break up allocas + + // Run a few AA driven optimizations here and now, to cleanup the code. + passes.add(createGlobalsModRefPass()); // IP alias analysis + + passes.add(createLICMPass()); // Hoist loop invariants + passes.add(createLoadValueNumberingPass()); // GVN for load instrs + passes.add(createGCSEPass()); // Remove common subexprs + passes.add(createDeadStoreEliminationPass()); // Nuke dead stores + + // Cleanup and simplify the code after the scalar optimizations. + passes.add(createInstructionCombiningPass()); + + // Delete basic blocks, which optimization passes may have killed... + passes.add(createCFGSimplificationPass()); + + // Now that we have optimized the program, discard unreachable functions... + passes.add(createGlobalDCEPass()); + + // Make sure everything is still good. + passes.add(createVerifierPass()); + + FunctionPassManager* codeGenPasses = + new FunctionPassManager(new ExistingModuleProvider(mergedModule)); + + codeGenPasses->add(new TargetData(*_target->getTargetData())); + + MachineCodeEmitter* mce = NULL; + + switch (_target->addPassesToEmitFile(*codeGenPasses, out, + TargetMachine::AssemblyFile, true)) { + case FileModel::MachOFile: + mce = AddMachOWriter(*codeGenPasses, out, *_target); + break; + case FileModel::ElfFile: + mce = AddELFWriter(*codeGenPasses, out, *_target); + break; + case FileModel::AsmFile: + break; + case FileModel::Error: + case FileModel::None: + errMsg = "target file type not supported"; + return true; + } + + if (_target->addPassesToEmitFileFinish(*codeGenPasses, mce, true)) { + errMsg = "target does not support generation of this file type"; + return true; + } + + // Run our queue of passes all at once now, efficiently. + passes.run(*mergedModule); + + // Run the code generator, and write assembly file + codeGenPasses->doInitialization(); + for (Module::iterator it = mergedModule->begin(), + e = mergedModule->end(); it != e; ++it) { + if (!it->isDeclaration()) + codeGenPasses->run(*it); + } + codeGenPasses->doFinalization(); + + return false; // success +} + + + Added: llvm/trunk/tools/lto2/LTOCodeGenerator.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto2/LTOCodeGenerator.h?rev=47621&view=auto ============================================================================== --- llvm/trunk/tools/lto2/LTOCodeGenerator.h (added) +++ llvm/trunk/tools/lto2/LTOCodeGenerator.h Tue Feb 26 14:26:43 2008 @@ -0,0 +1,59 @@ +//===-LTOCodeGenerator.h - LLVM Link Time Optimizer -----------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the LTOCodeGenerator class. +// +//===----------------------------------------------------------------------===// + + +#ifndef LTO_CODE_GENERATOR_H +#define LTO_CODE_GENERATOR_H + +#include "llvm/Linker.h" +#include "llvm/ADT/StringMap.h" + + + +// +// C++ class which implements the opaque lto_code_gen_t +// +class LTOCodeGenerator { +public: + static const char* getVersionString(); + + LTOCodeGenerator(); + ~LTOCodeGenerator(); + + bool addModule(class LTOModule*, std::string& errMsg); + bool setDebugInfo(lto_debug_model, std::string& errMsg); + bool setCodePICModel(lto_codegen_model, std::string& errMsg); + void addMustPreserveSymbol(const char* sym); + bool writeMergedModules(const char* path, std::string& errMsg); + void* compile(size_t* length, std::string& errMsg); + +private: + bool generateAssemblyCode(std::ostream& out, + std::string& errMsg); + bool assemble(const std::string& asmPath, + const std::string& objPath, std::string& errMsg); + void applyScopeRestrictions(); + bool determineTarget(std::string& errMsg); + + typedef llvm::StringMap StringSet; + + llvm::Linker _linker; + llvm::TargetMachine* _target; + bool _emitDwarfDebugInfo; + bool _scopeRestrictionsDone; + lto_codegen_model _codeModel; + StringSet _mustPreserveSymbols; +}; + +#endif // LTO_CODE_GENERATOR_H + Added: llvm/trunk/tools/lto2/LTOModule.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto2/LTOModule.cpp?rev=47621&view=auto ============================================================================== --- llvm/trunk/tools/lto2/LTOModule.cpp (added) +++ llvm/trunk/tools/lto2/LTOModule.cpp Tue Feb 26 14:26:43 2008 @@ -0,0 +1,329 @@ +//===-LTOModule.cpp - LLVM Link Time Optimizer ----------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the Link Time Optimization library. This library is +// intended to be used by linker to optimize code at link time. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Module.h" +#include "llvm/PassManager.h" +#include "llvm/Linker.h" +#include "llvm/Constants.h" +#include "llvm/DerivedTypes.h" +#include "llvm/ModuleProvider.h" +#include "llvm/Bitcode/ReaderWriter.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/FileUtilities.h" +#include "llvm/Support/SystemUtils.h" +#include "llvm/Support/Mangler.h" +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/System/Program.h" +#include "llvm/System/Path.h" +#include "llvm/System/Signals.h" +#include "llvm/Target/SubtargetFeature.h" +#include "llvm/Target/TargetOptions.h" +#include "llvm/Target/TargetData.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetMachineRegistry.h" +#include "llvm/Target/TargetAsmInfo.h" +#include "llvm/Transforms/IPO.h" +#include "llvm/Transforms/Scalar.h" +#include "llvm/Analysis/LoadValueNumbering.h" +#include "llvm/Support/MathExtras.h" + +#include "LTOModule.h" + +#include + +using namespace llvm; + +bool LTOModule::isBitcodeFile(const void* mem, size_t length) +{ + return ( llvm::sys::IdentifyFileType((char*)mem, length) + == llvm::sys::Bitcode_FileType ); +} + +bool LTOModule::isBitcodeFile(const char* path) +{ + return llvm::sys::Path(path).isBitcodeFile(); +} + +bool LTOModule::isBitcodeFileForTarget(const void* mem, + size_t length, const char* triplePrefix) +{ + bool result = false; + MemoryBuffer* buffer; + buffer = MemoryBuffer::getMemBuffer((char*)mem, (char*)mem+length); + if ( buffer != NULL ) { + ModuleProvider* mp = getBitcodeModuleProvider(buffer); + if ( mp != NULL ) { + std::string actualTarget = mp->getModule()->getTargetTriple(); + if ( strncmp(actualTarget.c_str(), triplePrefix, + strlen(triplePrefix)) == 0) { + result = true; + } + // mp destructor will delete buffer + delete mp; + } + else { + // if getBitcodeModuleProvider failed, we need to delete buffer + delete buffer; + } + } + return result; +} + +bool LTOModule::isBitcodeFileForTarget(const char* path, + const char* triplePrefix) +{ + bool result = false; + MemoryBuffer* buffer; + buffer = MemoryBuffer::getFile(path, strlen(path)); + if ( buffer != NULL ) { + ModuleProvider* mp = getBitcodeModuleProvider(buffer); + if ( mp != NULL ) { + std::string actualTarget = mp->getModule()->getTargetTriple(); + if ( strncmp(actualTarget.c_str(), triplePrefix, + strlen(triplePrefix)) == 0) { + result = true; + } + // mp destructor will delete buffer + delete mp; + } + else { + // if getBitcodeModuleProvider failed, we need to delete buffer + delete buffer; + } + } + return result; +} + + +LTOModule::LTOModule(Module* m, TargetMachine* t) + : _module(m), _target(t), _symbolsParsed(false) +{ +} + +LTOModule::~LTOModule() +{ + delete _module; + if ( _target != NULL ) + delete _target; +} + + +LTOModule* LTOModule::makeLTOModule(const char* path, std::string& errMsg) +{ + MemoryBuffer* buffer = MemoryBuffer::getFile(path, strlen(path)); + if ( buffer != NULL ) { + Module* m = ParseBitcodeFile(buffer, &errMsg); + delete buffer; + if ( m != NULL ) { + const TargetMachineRegistry::entry* march = + TargetMachineRegistry::getClosestStaticTargetForModule(*m, errMsg); + if ( march != NULL ) { + std::string features; + TargetMachine* target = march->CtorFn(*m, features); + return new LTOModule(m, target); + } + } + } + return NULL; +} + +LTOModule* LTOModule::makeLTOModule(const void* mem, size_t length, + std::string& errMsg) +{ + MemoryBuffer* buffer; + buffer = MemoryBuffer::getMemBuffer((char*)mem, (char*)mem+length); + if ( buffer != NULL ) { + Module* m = ParseBitcodeFile(buffer, &errMsg); + delete buffer; + if ( m != NULL ) { + const TargetMachineRegistry::entry* march = + TargetMachineRegistry::getClosestStaticTargetForModule(*m, errMsg); + if ( march != NULL ) { + std::string features; + TargetMachine* target = march->CtorFn(*m, features); + return new LTOModule(m, target); + } + } + } + return NULL; +} + + +const char* LTOModule::getTargetTriple() +{ + return _module->getTargetTriple().c_str(); +} + +void LTOModule::addDefinedSymbol(GlobalValue* def, Mangler &mangler, + bool isFunction) +{ + const char* symbolName = ::strdup(mangler.getValueName(def).c_str()); + + // set alignment part log2() can have rounding errors + uint32_t align = def->getAlignment(); + uint32_t attr = align ? __builtin_ctz(def->getAlignment()) : 0; + + // set permissions part + if ( isFunction ) + attr |= LTO_SYMBOL_PERMISSIONS_CODE; + else { + GlobalVariable* gv = dyn_cast(def); + if ( (gv != NULL) && gv->isConstant() ) + attr |= LTO_SYMBOL_PERMISSIONS_RODATA; + else + attr |= LTO_SYMBOL_PERMISSIONS_DATA; + } + + // set definition part + if ( def->hasWeakLinkage() || def->hasLinkOnceLinkage() ) { + // lvm bitcode does not differenciate between weak def data + // and tentative definitions! + // HACK HACK HACK + // C++ does not use tentative definitions, but does use weak symbols + // so guess that anything that looks like a C++ symbol is weak and others + // are tentative definitions + if ( (strncmp(symbolName, "__Z", 3) == 0) ) + attr |= LTO_SYMBOL_DEFINITION_WEAK; + else { + attr |= LTO_SYMBOL_DEFINITION_TENTATIVE; + } + } + else { + attr |= LTO_SYMBOL_DEFINITION_REGULAR; + } + + // set scope part + if ( def->hasHiddenVisibility() ) + attr |= LTO_SYMBOL_SCOPE_HIDDEN; + else if ( def->hasExternalLinkage() || def->hasWeakLinkage() ) + attr |= LTO_SYMBOL_SCOPE_DEFAULT; + else + attr |= LTO_SYMBOL_SCOPE_INTERNAL; + + // add to table of symbols + NameAndAttributes info; + info.name = symbolName; + info.attributes = (lto_symbol_attributes)attr; + _symbols.push_back(info); + _defines[info.name] = 1; +} + + +void LTOModule::addUndefinedSymbol(const char* name) +{ + // ignore all llvm.* symbols + if ( strncmp(name, "llvm.", 5) != 0 ) { + _undefines[name] = 1; + } +} + + + +// Find exeternal symbols referenced by VALUE. This is a recursive function. +void LTOModule::findExternalRefs(Value* value, Mangler &mangler) { + + if (GlobalValue* gv = dyn_cast(value)) { + if ( !gv->hasExternalLinkage() ) + addUndefinedSymbol(mangler.getValueName(gv).c_str()); + } + + // GlobalValue, even with InternalLinkage type, may have operands with + // ExternalLinkage type. Do not ignore these operands. + if (Constant* c = dyn_cast(value)) { + // Handle ConstantExpr, ConstantStruct, ConstantArry etc.. + for (unsigned i = 0, e = c->getNumOperands(); i != e; ++i) + findExternalRefs(c->getOperand(i), mangler); + } +} + + +uint32_t LTOModule::getSymbolCount() +{ + if ( !_symbolsParsed ) { + _symbolsParsed = true; + + // Use mangler to add GlobalPrefix to names to match linker names. + Mangler mangler(*_module, _target->getTargetAsmInfo()->getGlobalPrefix()); + + // add functions + for (Module::iterator f = _module->begin(); f != _module->end(); ++f) { + if ( f->isDeclaration() ) { + addUndefinedSymbol(mangler.getValueName(f).c_str()); + } + else { + addDefinedSymbol(f, mangler, true); + // add external symbols referenced by this function. + for (Function::iterator b = f->begin(); b != f->end(); ++b) { + for (BasicBlock::iterator i = b->begin(); + i != b->end(); ++i) { + for (unsigned count = 0, total = i->getNumOperands(); + count != total; ++count) { + findExternalRefs(i->getOperand(count), mangler); + } + } + } + } + } + + // add data + for (Module::global_iterator v = _module->global_begin(), + e = _module->global_end(); v != e; ++v) { + if ( v->isDeclaration() ) { + addUndefinedSymbol(mangler.getValueName(v).c_str()); + } + else { + addDefinedSymbol(v, mangler, false); + // add external symbols referenced by this data + for (unsigned count = 0, total = v->getNumOperands(); + count != total; ++count) { + findExternalRefs(v->getOperand(count), mangler); + } + } + } + + // make symbols for all undefines + for (StringSet::iterator it=_undefines.begin(); + it != _undefines.end(); ++it) { + // if this symbol also has a definition, then don't make an undefine + // because it is a tentative definition + if ( _defines.find(it->getKeyData(), it->getKeyData()+it->getKeyLength()) == _defines.end() ) { + NameAndAttributes info; + info.name = it->getKeyData(); + info.attributes = LTO_SYMBOL_DEFINITION_UNDEFINED; + _symbols.push_back(info); + } + } + + } + + return _symbols.size(); +} + + +lto_symbol_attributes LTOModule::getSymbolAttributes(uint32_t index) +{ + if ( index < _symbols.size() ) + return _symbols[index].attributes; + else + return lto_symbol_attributes(0); +} + +const char* LTOModule::getSymbolName(uint32_t index) +{ + if ( index < _symbols.size() ) + return _symbols[index].name; + else + return NULL; +} + Added: llvm/trunk/tools/lto2/LTOModule.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto2/LTOModule.h?rev=47621&view=auto ============================================================================== --- llvm/trunk/tools/lto2/LTOModule.h (added) +++ llvm/trunk/tools/lto2/LTOModule.h Tue Feb 26 14:26:43 2008 @@ -0,0 +1,83 @@ +//===-LTOModule.h - LLVM Link Time Optimizer ------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the LTOModule class. +// +//===----------------------------------------------------------------------===// + +#ifndef LTO_MODULE_H +#define LTO_MODULE_H + +#include "llvm/Module.h" +#include "llvm/GlobalValue.h" +#include "llvm/Constants.h" +#include "llvm/Support/Mangler.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/ADT/StringMap.h" + +#include "llvm-c/lto.h" + +#include + + +// +// C++ class which implements the opaque lto_module_t +// +class LTOModule { +public: + + static bool isBitcodeFile(const void* mem, size_t length); + static bool isBitcodeFile(const char* path); + + static bool isBitcodeFileForTarget(const void* mem, + size_t length, const char* triplePrefix); + + static bool isBitcodeFileForTarget(const char* path, + const char* triplePrefix); + + static LTOModule* makeLTOModule(const char* path, std::string& errMsg); + static LTOModule* makeLTOModule(const void* mem, size_t length, + std::string& errMsg); + ~LTOModule(); + + const char* getTargetTriple(); + uint32_t getSymbolCount(); + lto_symbol_attributes getSymbolAttributes(uint32_t index); + const char* getSymbolName(uint32_t index); + + llvm::Module * getLLVVMModule() { return _module; } + bool targetSupported() { return (_target != NULL); } + +private: + LTOModule(llvm::Module* m, llvm::TargetMachine* t); + + void addDefinedSymbol(llvm::GlobalValue* def, + llvm::Mangler& mangler, + bool isFunction); + void addUndefinedSymbol(const char* name); + void findExternalRefs(llvm::Value* value, + llvm::Mangler& mangler); + + typedef llvm::StringMap StringSet; + + struct NameAndAttributes { + const char* name; + lto_symbol_attributes attributes; + }; + + llvm::Module * _module; + llvm::TargetMachine * _target; + bool _symbolsParsed; + std::vector _symbols; + StringSet _defines; // only needed to disambiguate tentative definitions + StringSet _undefines; // only needed to disambiguate tentative definitions +}; + +#endif // LTO_MODULE_H + Added: llvm/trunk/tools/lto2/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto2/Makefile?rev=47621&view=auto ============================================================================== --- llvm/trunk/tools/lto2/Makefile (added) +++ llvm/trunk/tools/lto2/Makefile Tue Feb 26 14:26:43 2008 @@ -0,0 +1,45 @@ +##===- tools/lto2/Makefile ---------------------------------*- Makefile -*-===## +# +# The LLVM Compiler Infrastructure +# +# This file is distributed under the University of Illinois Open Source +# License. See LICENSE.TXT for details. +# +##===----------------------------------------------------------------------===## + +LEVEL = ../.. +LIBRARYNAME = LTO + +# Include this here so we can get the configuration of the targets +# that have been configured for construction. We have to do this +# early so we can set up LINK_COMPONENTS before includeing Makefile.rules +include $(LEVEL)/Makefile.config + +LINK_LIBS_IN_SHARED = 1 +ifeq ($(OS),Darwin) + SHARED_LIBRARY = 1 + DONT_BUILD_RELINKED = 1 +else + BUILD_ARCHIVE = 1 +endif + +LINK_COMPONENTS := $(TARGETS_TO_BUILD) ipo scalaropts linker bitreader bitwriter + +include $(LEVEL)/Makefile.common + +ifeq ($(OS),Darwin) + # set dylib internal version number to llvmCore submission number + ifdef LLVM_SUBMIT_VERSION + LLVMLibsOptions := $(LLVMLibsOptions) -Wl,-current_version \ + -Wl,$(LLVM_SUBMIT_VERSION).$(LLVM_SUBMIT_SUBVERSION) + endif + # extra options to override libtool defaults + LLVMLibsOptions := $(LLVMLibsOptions) \ + -no-undefined -avoid-version \ + -Wl,-exported_symbols_list -Wl,lto.exports \ + -Wl,-dead_strip \ + -Wl,-install_name \ + -Wl,"@executable_path/../lib/lib$(LIBRARYNAME)$(SHLIBEXT)" \ + -Wl,-seg1addr -Wl,0xE0000000 + +endif Added: llvm/trunk/tools/lto2/lto.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto2/lto.cpp?rev=47621&view=auto ============================================================================== --- llvm/trunk/tools/lto2/lto.cpp (added) +++ llvm/trunk/tools/lto2/lto.cpp Tue Feb 26 14:26:43 2008 @@ -0,0 +1,240 @@ +//===-lto.cpp - LLVM Link Time Optimizer ----------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the Link Time Optimization library. This library is +// intended to be used by linker to optimize code at link time. +// +//===----------------------------------------------------------------------===// + +#include "llvm-c/lto.h" + +#include "LTOModule.h" +#include "LTOCodeGenerator.h" + + +// holds most recent error string +// *** not thread safe *** +static std::string sLastErrorString; + + + +// +// returns a printable string +// +extern const char* lto_get_version() +{ + return LTOCodeGenerator::getVersionString(); +} + +// +// returns the last error string or NULL if last operation was sucessful +// +const char* lto_get_error_message() +{ + return sLastErrorString.c_str(); +} + + + +// +// validates if a file is a loadable object file +// +bool lto_module_is_object_file(const char* path) +{ + return LTOModule::isBitcodeFile(path); +} + + +// +// validates if a file is a loadable object file compilable for requested target +// +bool lto_module_is_object_file_for_target(const char* path, + const char* target_triplet_prefix) +{ + return LTOModule::isBitcodeFileForTarget(path, target_triplet_prefix); +} + + +// +// validates if a buffer is a loadable object file +// +bool lto_module_is_object_file_in_memory(const void* mem, size_t length) +{ + return LTOModule::isBitcodeFile(mem, length); +} + + +// +// validates if a buffer is a loadable object file compilable for the target +// +bool lto_module_is_object_file_in_memory_for_target(const void* mem, + size_t length, const char* target_triplet_prefix) +{ + return LTOModule::isBitcodeFileForTarget(mem, length, target_triplet_prefix); +} + + + +// +// loads an object file from disk +// returns NULL on error (check lto_get_error_message() for details) +// +lto_module_t lto_module_create(const char* path) +{ + return LTOModule::makeLTOModule(path, sLastErrorString); +} + + +// +// loads an object file from memory +// returns NULL on error (check lto_get_error_message() for details) +// +lto_module_t lto_module_create_from_memory(const void* mem, size_t length) +{ + return LTOModule::makeLTOModule(mem, length, sLastErrorString); +} + + +// +// frees all memory for a module +// upon return the lto_module_t is no longer valid +// +void lto_module_dispose(lto_module_t mod) +{ + delete mod; +} + + +// +// returns triplet string which the object module was compiled under +// +const char* lto_module_get_target_triple(lto_module_t mod) +{ + return mod->getTargetTriple(); +} + + +// +// returns the number of symbols in the object module +// +uint32_t lto_module_get_num_symbols(lto_module_t mod) +{ + return mod->getSymbolCount(); +} + +// +// returns the name of the ith symbol in the object module +// +const char* lto_module_get_symbol_name(lto_module_t mod, uint32_t index) +{ + return mod->getSymbolName(index); +} + + +// +// returns the attributes of the ith symbol in the object module +// +lto_symbol_attributes lto_module_get_symbol_attribute(lto_module_t mod, + uint32_t index) +{ + return mod->getSymbolAttributes(index); +} + + + + + +// +// instantiates a code generator +// returns NULL if there is an error +// +lto_code_gen_t lto_codegen_create() +{ + return new LTOCodeGenerator(); +} + + + +// +// frees all memory for a code generator +// upon return the lto_code_gen_t is no longer valid +// +void lto_codegen_dispose(lto_code_gen_t cg) +{ + delete cg; +} + + + +// +// add an object module to the set of modules for which code will be generated +// returns true on error (check lto_get_error_message() for details) +// +bool lto_codegen_add_module(lto_code_gen_t cg, lto_module_t mod) +{ + return cg->addModule(mod, sLastErrorString); +} + + +// +// sets what if any format of debug info should be generated +// returns true on error (check lto_get_error_message() for details) +// +bool lto_codegen_set_debug_model(lto_code_gen_t cg, lto_debug_model debug) +{ + return cg->setDebugInfo(debug, sLastErrorString); +} + + +// +// sets what code model to generated +// returns true on error (check lto_get_error_message() for details) +// +bool lto_codegen_set_pic_model(lto_code_gen_t cg, lto_codegen_model model) +{ + return cg->setCodePICModel(model, sLastErrorString); +} + +// +// adds to a list of all global symbols that must exist in the final +// generated code. If a function is not listed there, it might be +// inlined into every usage and optimized away. +// +void lto_codegen_add_must_preserve_symbol(lto_code_gen_t cg, const char* symbol) +{ + cg->addMustPreserveSymbol(symbol); +} + + +// +// writes a new file at the specified path that contains the +// merged contents of all modules added so far. +// returns true on error (check lto_get_error_message() for details) +// +bool lto_codegen_write_merged_modules(lto_code_gen_t cg, const char* path) +{ + return cg->writeMergedModules(path, sLastErrorString); +} + + +// +// generates code for all added modules into one object file +// On sucess returns a pointer to a generated mach-o buffer and +// length set to the buffer size. Client must free() the buffer +// when done. +// On failure, returns NULL (check lto_get_error_message() for details) +// +extern void* +lto_codegen_compile(lto_code_gen_t cg, size_t* length) +{ + return cg->compile(length, sLastErrorString); +} + + + Added: llvm/trunk/tools/lto2/lto.exports URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto2/lto.exports?rev=47621&view=auto ============================================================================== --- llvm/trunk/tools/lto2/lto.exports (added) +++ llvm/trunk/tools/lto2/lto.exports Tue Feb 26 14:26:43 2008 @@ -0,0 +1,22 @@ +_lto_get_error_message +_lto_get_version +_lto_module_create +_lto_module_create_from_memory +_lto_module_get_num_symbols +_lto_module_get_symbol_attribute +_lto_module_get_symbol_name +_lto_module_get_target_triple +_lto_module_is_object_file +_lto_module_is_object_file_for_target +_lto_module_is_object_file_in_memory +_lto_module_is_object_file_in_memory_for_target +_lto_module_dispose +_lto_codegen_add_module +_lto_codegen_add_must_preserve_symbol +_lto_codegen_compile +_lto_codegen_create +_lto_codegen_dispose +_lto_codegen_set_debug_model +_lto_codegen_set_pic_model +_lto_codegen_write_merged_modules + From ggreif at gmail.com Tue Feb 26 14:36:35 2008 From: ggreif at gmail.com (Gabor Greif) Date: Tue, 26 Feb 2008 20:36:35 -0000 Subject: [llvm-commits] [llvm] r47622 - /llvm/trunk/lib/AsmParser/ Message-ID: <200802262036.m1QKaZIw016742@zion.cs.uiuc.edu> Author: ggreif Date: Tue Feb 26 14:36:35 2008 New Revision: 47622 URL: http://llvm.org/viewvc/llvm-project?rev=47622&view=rev Log: Do not treat Lexer.cpp as a generated file any more, let svn show it with a question mark if it is around. Modified: llvm/trunk/lib/AsmParser/ (props changed) Propchange: llvm/trunk/lib/AsmParser/ ------------------------------------------------------------------------------ --- svn:ignore (original) +++ svn:ignore Tue Feb 26 14:36:35 2008 @@ -2,6 +2,5 @@ Release Release-Asserts llvmAsmParser.output -Lexer.cpp llvmAsmParser.cpp llvmAsmParser.h From evan.cheng at apple.com Tue Feb 26 14:40:22 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 26 Feb 2008 20:40:22 -0000 Subject: [llvm-commits] [llvm] r47623 - in /llvm/trunk: lib/CodeGen/SimpleRegisterCoalescing.cpp test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll test/CodeGen/X86/coalescer-commute1.ll test/CodeGen/X86/coalescer-commute3.ll Message-ID: <200802262040.m1QKeNQ9016871@zion.cs.uiuc.edu> Author: evancheng Date: Tue Feb 26 14:40:22 2008 New Revision: 47623 URL: http://llvm.org/viewvc/llvm-project?rev=47623&view=rev Log: Enable -coalescer-commute-instrs by default. Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp llvm/trunk/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll llvm/trunk/test/CodeGen/X86/coalescer-commute1.ll llvm/trunk/test/CodeGen/X86/coalescer-commute3.ll Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=47623&r1=47622&r2=47623&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Tue Feb 26 14:40:22 2008 @@ -55,7 +55,7 @@ static cl::opt CommuteDef("coalescer-commute-instrs", - cl::init(false), cl::Hidden); + cl::init(true), cl::Hidden); static cl::opt CommuteLimit("commute-limit", Modified: llvm/trunk/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll?rev=47623&r1=47622&r2=47623&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll (original) +++ llvm/trunk/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll Tue Feb 26 14:40:22 2008 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llc -o - -march=x86 -mattr=+mmx | grep paddq | count 2 -; RUN: llvm-as < %s | llc -o - -march=x86 -mattr=+mmx | grep movq | count 3 +; RUN: llvm-as < %s | llc -o - -march=x86 -mattr=+mmx | grep movq | count 2 define <1 x i64> @unsigned_add3(<1 x i64>* %a, <1 x i64>* %b, i32 %count) { entry: Modified: llvm/trunk/test/CodeGen/X86/coalescer-commute1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/coalescer-commute1.ll?rev=47623&r1=47622&r2=47623&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/coalescer-commute1.ll (original) +++ llvm/trunk/test/CodeGen/X86/coalescer-commute1.ll Tue Feb 26 14:40:22 2008 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 -coalescer-commute-instrs | not grep movaps +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps ; PR1877 @NNTOT = weak global i32 0 ; [#uses=1] Modified: llvm/trunk/test/CodeGen/X86/coalescer-commute3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/coalescer-commute3.ll?rev=47623&r1=47622&r2=47623&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/coalescer-commute3.ll (original) +++ llvm/trunk/test/CodeGen/X86/coalescer-commute3.ll Tue Feb 26 14:40:22 2008 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 -coalescer-commute-instrs | grep mov | count 6 +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | count 6 %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* } From isanbard at gmail.com Tue Feb 26 15:11:01 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 26 Feb 2008 21:11:01 -0000 Subject: [llvm-commits] [llvm] r47625 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/ utils/TableGen/ Message-ID: <200802262111.m1QLB21G017954@zion.cs.uiuc.edu> Author: void Date: Tue Feb 26 15:11:01 2008 New Revision: 47625 URL: http://llvm.org/viewvc/llvm-project?rev=47625&view=rev Log: Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool would have been a Godsend here! Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h llvm/trunk/lib/CodeGen/LiveInterval.cpp llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp llvm/trunk/lib/CodeGen/MachineFunction.cpp llvm/trunk/lib/CodeGen/MachineLICM.cpp llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp llvm/trunk/lib/CodeGen/RegAllocLocal.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp llvm/trunk/lib/CodeGen/VirtRegMap.cpp llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp llvm/trunk/lib/Target/Target.td llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.h llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegisterInfo.h?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h Tue Feb 26 15:11:01 2008 @@ -48,7 +48,7 @@ /// register, e.g. RAX, EAX, are super-registers of AX. /// struct TargetRegisterDesc { - const char *Name; // Assembly language name for the register + const char *AsmName; // Assembly language name for the register const char *PrintableName;// Printable name for the reg (for debugging) const unsigned *AliasSet; // Register Alias Set, described above const unsigned *SubRegs; // Sub-register set, described above @@ -376,10 +376,10 @@ return get(RegNo).SuperRegs; } - /// getName - Return the symbolic target specific name for the specified - /// physical register. - const char *getName(unsigned RegNo) const { - return get(RegNo).Name; + /// getAsmName - Return the symbolic target specific name for the + /// specified physical register. + const char *getAsmName(unsigned RegNo) const { + return get(RegNo).AsmName; } /// getPrintableName - Return the human-readable symbolic target specific name Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveInterval.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveInterval.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveInterval.cpp Tue Feb 26 15:11:01 2008 @@ -665,7 +665,7 @@ void LiveInterval::print(std::ostream &OS, const TargetRegisterInfo *TRI) const { if (TRI && TargetRegisterInfo::isPhysicalRegister(reg)) - OS << TRI->getName(reg); + OS << TRI->getPrintableName(reg); else OS << "%reg" << reg; Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Feb 26 15:11:01 2008 @@ -189,7 +189,7 @@ void LiveIntervals::printRegName(unsigned reg) const { if (TargetRegisterInfo::isPhysicalRegister(reg)) - cerr << tri_->getName(reg); + cerr << tri_->getPrintableName(reg); else cerr << "%reg" << reg; } Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Tue Feb 26 15:11:01 2008 @@ -146,7 +146,7 @@ const TargetRegisterInfo *TRI = 0) { if (!RegNo || TargetRegisterInfo::isPhysicalRegister(RegNo)) { if (TRI) - os << " %" << TRI->get(RegNo).Name; + os << " %" << TRI->get(RegNo).PrintableName; else os << " %mreg(" << RegNo << ")"; } else Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Tue Feb 26 15:11:01 2008 @@ -214,7 +214,7 @@ for (MachineRegisterInfo::livein_iterator I = RegInfo->livein_begin(), E = RegInfo->livein_end(); I != E; ++I) { if (TRI) - OS << " " << TRI->getName(I->first); + OS << " " << TRI->getPrintableName(I->first); else OS << " Reg #" << I->first; @@ -228,7 +228,7 @@ for (MachineRegisterInfo::liveout_iterator I = RegInfo->liveout_begin(), E = RegInfo->liveout_end(); I != E; ++I) if (TRI) - OS << " " << TRI->getName(*I); + OS << " " << TRI->getPrintableName(*I); else OS << " Reg #" << *I; OS << "\n"; Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Feb 26 15:11:01 2008 @@ -251,7 +251,7 @@ const TargetRegisterInfo *TRI = TM->getRegisterInfo(); for (const unsigned *ImpUses = I.getDesc().getImplicitUses(); *ImpUses; ++ImpUses) - DOUT << " -> " << TRI->getName(*ImpUses) << "\n"; + DOUT << " -> " << TRI->getPrintableName(*ImpUses) << "\n"; } if (I.getDesc().getImplicitDefs()) { @@ -260,7 +260,7 @@ const TargetRegisterInfo *TRI = TM->getRegisterInfo(); for (const unsigned *ImpDefs = I.getDesc().getImplicitDefs(); *ImpDefs; ++ImpDefs) - DOUT << " -> " << TRI->getName(*ImpDefs) << "\n"; + DOUT << " -> " << TRI->getPrintableName(*ImpDefs) << "\n"; } //if (TII->hasUnmodelledSideEffects(&I)) Modified: llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp Tue Feb 26 15:11:01 2008 @@ -311,7 +311,7 @@ assert(VirtReg && "Spilling a physical register is illegal!" " Must not have appropriate kill for the register or use exists beyond" " the intended one."); - DOUT << " Spilling register " << RegInfo->getName(PhysReg) + DOUT << " Spilling register " << RegInfo->getPrintableName(PhysReg) << " containing %reg" << VirtReg; const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo(); @@ -535,7 +535,7 @@ markVirtRegModified(VirtReg, false); DOUT << " Reloading %reg" << VirtReg << " into " - << RegInfo->getName(PhysReg) << "\n"; + << RegInfo->getPrintableName(PhysReg) << "\n"; // Add move instruction(s) TII->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC); @@ -646,7 +646,7 @@ DOUT << " Regs have values: "; for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i) if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2) - DOUT << "[" << RegInfo->getName(i) + DOUT << "[" << RegInfo->getPrintableName(i) << ",%reg" << PhysRegsUsed[i] << "] "; DOUT << "\n"); @@ -700,14 +700,14 @@ } if (PhysReg) { - DOUT << " Last use of " << RegInfo->getName(PhysReg) + DOUT << " Last use of " << RegInfo->getPrintableName(PhysReg) << "[%reg" << VirtReg <<"], removing it from live set\n"; removePhysReg(PhysReg); for (const unsigned *AliasSet = RegInfo->getSubRegisters(PhysReg); *AliasSet; ++AliasSet) { if (PhysRegsUsed[*AliasSet] != -2) { DOUT << " Last use of " - << RegInfo->getName(*AliasSet) + << RegInfo->getPrintableName(*AliasSet) << "[%reg" << VirtReg <<"], removing it from live set\n"; removePhysReg(*AliasSet); } @@ -806,14 +806,14 @@ } if (PhysReg) { - DOUT << " Register " << RegInfo->getName(PhysReg) + DOUT << " Register " << RegInfo->getPrintableName(PhysReg) << " [%reg" << VirtReg << "] is never used, removing it frame live list\n"; removePhysReg(PhysReg); for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg); *AliasSet; ++AliasSet) { if (PhysRegsUsed[*AliasSet] != -2) { - DOUT << " Register " << RegInfo->getName(*AliasSet) + DOUT << " Register " << RegInfo->getPrintableName(*AliasSet) << " [%reg" << *AliasSet << "] is never used, removing it frame live list\n"; removePhysReg(*AliasSet); Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Tue Feb 26 15:11:01 2008 @@ -164,7 +164,7 @@ if (TargetRegisterInfo::isVirtualRegister(reg)) { reg = vrm_->getPhys(reg); } - DOUT << tri_->getName(reg) << '\n'; + DOUT << tri_->getPrintableName(reg) << '\n'; } } }; @@ -239,7 +239,8 @@ // Try to coalesce. if (!li_->conflictsWithPhysRegDef(cur, *vrm_, SrcReg)) { - DOUT << "Coalescing: " << cur << " -> " << tri_->getName(SrcReg) << '\n'; + DOUT << "Coalescing: " << cur << " -> " << tri_->getPrintableName(SrcReg) + << '\n'; vrm_->clearVirt(cur.reg); vrm_->assignVirt2Phys(cur.reg, SrcReg); ++NumCoalesce; @@ -627,7 +628,7 @@ // the free physical register and add this interval to the active // list. if (physReg) { - DOUT << tri_->getName(physReg) << '\n'; + DOUT << tri_->getPrintableName(physReg) << '\n'; vrm_->assignVirt2Phys(cur->reg, physReg); prt_->addRegUse(physReg); active_.push_back(std::make_pair(cur, cur->begin())); @@ -689,7 +690,7 @@ } DOUT << "\t\tregister with min weight: " - << tri_->getName(minReg) << " (" << minWeight << ")\n"; + << tri_->getPrintableName(minReg) << " (" << minWeight << ")\n"; // if the current has the minimum weight, we need to spill it and // add any added intervals back to unhandled, and restart @@ -868,11 +869,11 @@ if (cur->preference) { if (prt_->isRegAvail(cur->preference)) { DOUT << "\t\tassigned the preferred register: " - << tri_->getName(cur->preference) << "\n"; + << tri_->getPrintableName(cur->preference) << "\n"; return cur->preference; } else DOUT << "\t\tunable to assign the preferred register: " - << tri_->getName(cur->preference) << "\n"; + << tri_->getPrintableName(cur->preference) << "\n"; } // Scan for the first available register. Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Tue Feb 26 15:11:01 2008 @@ -286,7 +286,7 @@ assert(VirtReg && "Spilling a physical register is illegal!" " Must not have appropriate kill for the register or use exists beyond" " the intended one."); - DOUT << " Spilling register " << TRI->getName(PhysReg) + DOUT << " Spilling register " << TRI->getPrintableName(PhysReg) << " containing %reg" << VirtReg; const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo(); @@ -502,7 +502,7 @@ markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded DOUT << " Reloading %reg" << VirtReg << " into " - << TRI->getName(PhysReg) << "\n"; + << TRI->getPrintableName(PhysReg) << "\n"; // Add move instruction(s) const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo(); @@ -575,7 +575,7 @@ DOUT << " Regs have values: "; for (unsigned i = 0; i != TRI->getNumRegs(); ++i) if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2) - DOUT << "[" << TRI->getName(i) + DOUT << "[" << TRI->getPrintableName(i) << ",%reg" << PhysRegsUsed[i] << "] "; DOUT << "\n"); @@ -637,14 +637,14 @@ } if (PhysReg) { - DOUT << " Last use of " << TRI->getName(PhysReg) + DOUT << " Last use of " << TRI->getPrintableName(PhysReg) << "[%reg" << VirtReg <<"], removing it from live set\n"; removePhysReg(PhysReg); for (const unsigned *AliasSet = TRI->getSubRegisters(PhysReg); *AliasSet; ++AliasSet) { if (PhysRegsUsed[*AliasSet] != -2) { DOUT << " Last use of " - << TRI->getName(*AliasSet) + << TRI->getPrintableName(*AliasSet) << "[%reg" << VirtReg <<"], removing it from live set\n"; removePhysReg(*AliasSet); } @@ -728,7 +728,7 @@ MF->getRegInfo().setPhysRegUsed(DestPhysReg); markVirtRegModified(DestVirtReg); getVirtRegLastUse(DestVirtReg) = std::make_pair((MachineInstr*)0, 0); - DOUT << " Assigning " << TRI->getName(DestPhysReg) + DOUT << " Assigning " << TRI->getPrintableName(DestPhysReg) << " to %reg" << DestVirtReg << "\n"; MI->getOperand(i).setReg(DestPhysReg); // Assign the output register } @@ -751,14 +751,14 @@ } if (PhysReg) { - DOUT << " Register " << TRI->getName(PhysReg) + DOUT << " Register " << TRI->getPrintableName(PhysReg) << " [%reg" << VirtReg << "] is never used, removing it frame live list\n"; removePhysReg(PhysReg); for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg); *AliasSet; ++AliasSet) { if (PhysRegsUsed[*AliasSet] != -2) { - DOUT << " Register " << TRI->getName(*AliasSet) + DOUT << " Register " << TRI->getPrintableName(*AliasSet) << " [%reg" << *AliasSet << "] is never used, removing it frame live list\n"; removePhysReg(*AliasSet); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Feb 26 15:11:01 2008 @@ -4181,7 +4181,8 @@ } else if (const RegisterSDNode *R = dyn_cast(this)) { if (G && R->getReg() && TargetRegisterInfo::isPhysicalRegister(R->getReg())) { - cerr << " " <getTarget().getRegisterInfo()->getName(R->getReg()); + cerr << " " + << G->getTarget().getRegisterInfo()->getPrintableName(R->getReg()); } else { cerr << " #" << R->getReg(); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp Tue Feb 26 15:11:01 2008 @@ -133,7 +133,8 @@ } else if (const RegisterSDNode *R = dyn_cast(Node)) { if (G && R->getReg() != 0 && TargetRegisterInfo::isPhysicalRegister(R->getReg())) { - Op = Op + " " + G->getTarget().getRegisterInfo()->getName(R->getReg()); + Op = Op + " " + + G->getTarget().getRegisterInfo()->getPrintableName(R->getReg()); } else { Op += " #" + utostr(R->getReg()); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Tue Feb 26 15:11:01 2008 @@ -1648,7 +1648,7 @@ for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end(); I != E; ++I) { - if (StringsEqualNoCase(RegName, RI->get(*I).Name)) + if (StringsEqualNoCase(RegName, RI->get(*I).AsmName)) return std::make_pair(*I, RC); } } Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Tue Feb 26 15:11:01 2008 @@ -1537,7 +1537,7 @@ void SimpleRegisterCoalescing::printRegName(unsigned reg) const { if (TargetRegisterInfo::isPhysicalRegister(reg)) - cerr << tri_->getName(reg); + cerr << tri_->getPrintableName(reg); else cerr << "%reg" << reg; } Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Tue Feb 26 15:11:01 2008 @@ -141,8 +141,8 @@ for (unsigned i = TargetRegisterInfo::FirstVirtualRegister, e = MF.getRegInfo().getLastVirtReg(); i <= e; ++i) { if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG) - OS << "[reg" << i << " -> " << TRI->getName(Virt2PhysMap[i]) << "]\n"; - + OS << "[reg" << i << " -> " << TRI->getPrintableName(Virt2PhysMap[i]) + << "]\n"; } for (unsigned i = TargetRegisterInfo::FirstVirtualRegister, @@ -351,7 +351,7 @@ DOUT << "Remembering RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1; else DOUT << "Remembering SS#" << SlotOrReMat; - DOUT << " in physreg " << TRI->getName(Reg) << "\n"; + DOUT << " in physreg " << TRI->getPrintableName(Reg) << "\n"; } /// canClobberPhysReg - Return true if the spiller is allowed to change the @@ -392,7 +392,7 @@ assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg && "Bidirectional map mismatch!"); SpillSlotsOrReMatsAvailable[SlotOrReMat] &= ~1; - DOUT << "PhysReg " << TRI->getName(PhysReg) + DOUT << "PhysReg " << TRI->getPrintableName(PhysReg) << " copied, it is available for use but can no longer be modified\n"; } } @@ -417,7 +417,7 @@ assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg && "Bidirectional map mismatch!"); SpillSlotsOrReMatsAvailable.erase(SlotOrReMat); - DOUT << "PhysReg " << TRI->getName(PhysReg) + DOUT << "PhysReg " << TRI->getPrintableName(PhysReg) << " clobbered, invalidating "; if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT) DOUT << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 << "\n"; @@ -1135,9 +1135,9 @@ else DOUT << "Reusing SS#" << ReuseSlot; DOUT << " from physreg " - << TRI->getName(PhysReg) << " for vreg" + << TRI->getPrintableName(PhysReg) << " for vreg" << VirtReg <<" instead of reloading into physreg " - << TRI->getName(VRM.getPhys(VirtReg)) << "\n"; + << TRI->getPrintableName(VRM.getPhys(VirtReg)) << "\n"; unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg; MI.getOperand(i).setReg(RReg); @@ -1208,8 +1208,8 @@ DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1; else DOUT << "Reusing SS#" << ReuseSlot; - DOUT << " from physreg " << TRI->getName(PhysReg) << " for vreg" - << VirtReg + DOUT << " from physreg " << TRI->getPrintableName(PhysReg) + << " for vreg" << VirtReg << " instead of reloading into same physreg.\n"; unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg; MI.getOperand(i).setReg(RReg); Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Tue Feb 26 15:11:01 2008 @@ -273,7 +273,7 @@ switch (MO.getType()) { case MachineOperand::MO_Register: if (TargetRegisterInfo::isPhysicalRegister(MO.getReg())) - O << TM.getRegisterInfo()->get(MO.getReg()).Name; + O << TM.getRegisterInfo()->get(MO.getReg()).AsmName; else assert(0 && "not implemented"); break; @@ -393,7 +393,7 @@ const MachineOperand &MO3 = MI->getOperand(Op+2); assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg())); - O << TM.getRegisterInfo()->get(MO1.getReg()).Name; + O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; // Print the shift opc. O << ", " @@ -402,7 +402,7 @@ if (MO2.getReg()) { assert(TargetRegisterInfo::isPhysicalRegister(MO2.getReg())); - O << TM.getRegisterInfo()->get(MO2.getReg()).Name; + O << TM.getRegisterInfo()->get(MO2.getReg()).AsmName; assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0); } else { O << "#" << ARM_AM::getSORegOffset(MO3.getImm()); @@ -419,7 +419,7 @@ return; } - O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name; + O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; if (!MO2.getReg()) { if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0. @@ -432,7 +432,7 @@ O << ", " << (char)ARM_AM::getAM2Op(MO3.getImm()) - << TM.getRegisterInfo()->get(MO2.getReg()).Name; + << TM.getRegisterInfo()->get(MO2.getReg()).AsmName; if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm())) O << ", " @@ -455,7 +455,7 @@ } O << (char)ARM_AM::getAM2Op(MO2.getImm()) - << TM.getRegisterInfo()->get(MO1.getReg()).Name; + << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm())) O << ", " @@ -469,12 +469,12 @@ const MachineOperand &MO3 = MI->getOperand(Op+2); assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg())); - O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name; + O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; if (MO2.getReg()) { O << ", " << (char)ARM_AM::getAM3Op(MO3.getImm()) - << TM.getRegisterInfo()->get(MO2.getReg()).Name + << TM.getRegisterInfo()->get(MO2.getReg()).AsmName << "]"; return; } @@ -492,7 +492,7 @@ if (MO1.getReg()) { O << (char)ARM_AM::getAM3Op(MO2.getImm()) - << TM.getRegisterInfo()->get(MO1.getReg()).Name; + << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; return; } @@ -545,13 +545,13 @@ return; } else if (Modifier && strcmp(Modifier, "base") == 0) { // Used for FSTM{D|S} and LSTM{D|S} operations. - O << TM.getRegisterInfo()->get(MO1.getReg()).Name; + O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; if (ARM_AM::getAM5WBFlag(MO2.getImm())) O << "!"; return; } - O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name; + O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) { O << ", #" @@ -570,15 +570,15 @@ const MachineOperand &MO1 = MI->getOperand(Op); assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg())); - O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).Name << "]"; + O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName << "]"; } void ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) { const MachineOperand &MO1 = MI->getOperand(Op); const MachineOperand &MO2 = MI->getOperand(Op+1); - O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name; - O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).Name << "]"; + O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; + O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).AsmName << "]"; } void @@ -593,9 +593,9 @@ return; } - O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name; + O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; if (MO3.getReg()) - O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).Name; + O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).AsmName; else if (unsigned ImmOffs = MO2.getImm()) { O << ", #" << ImmOffs; if (Scale > 1) @@ -620,7 +620,7 @@ void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) { const MachineOperand &MO1 = MI->getOperand(Op); const MachineOperand &MO2 = MI->getOperand(Op+1); - O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name; + O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; if (unsigned ImmOffs = MO2.getImm()) O << ", #" << ImmOffs << " * 4"; O << "]"; Modified: llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp Tue Feb 26 15:11:01 2008 @@ -77,7 +77,7 @@ if (MO.getType() == MachineOperand::MO_Register) { assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) && "Not physreg??"); - O << TM.getRegisterInfo()->get(MO.getReg()).Name; + O << TM.getRegisterInfo()->get(MO.getReg()).AsmName; } else if (MO.isImmediate()) { O << MO.getImm(); assert(MO.getImm() < (1 << 30)); @@ -92,7 +92,7 @@ switch (MO.getType()) { case MachineOperand::MO_Register: - O << RI.get(MO.getReg()).Name; + O << RI.get(MO.getReg()).AsmName; return; case MachineOperand::MO_Immediate: Modified: llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp Tue Feb 26 15:11:01 2008 @@ -334,6 +334,6 @@ std::string AlphaRegisterInfo::getPrettyName(unsigned reg) { - std::string s(RegisterDescriptors[reg].Name); + std::string s(RegisterDescriptors[reg].PrintableName); return s; } Modified: llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp Tue Feb 26 15:11:01 2008 @@ -75,14 +75,14 @@ unsigned RegNo = MO.getReg(); assert(TargetRegisterInfo::isPhysicalRegister(RegNo) && "Not physreg??"); - O << TM.getRegisterInfo()->get(RegNo).Name; + O << TM.getRegisterInfo()->get(RegNo).AsmName; } void printOperand(const MachineInstr *MI, unsigned OpNo) { const MachineOperand &MO = MI->getOperand(OpNo); if (MO.isRegister()) { assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??"); - O << TM.getRegisterInfo()->get(MO.getReg()).Name; + O << TM.getRegisterInfo()->get(MO.getReg()).AsmName; } else if (MO.isImmediate()) { O << MO.getImm(); } else { @@ -149,7 +149,7 @@ // the value contained in the register. For this reason, the darwin // assembler requires that we print r0 as 0 (no r) when used as the base. const MachineOperand &MO = MI->getOperand(OpNo); - O << TM.getRegisterInfo()->get(MO.getReg()).Name; + O << TM.getRegisterInfo()->get(MO.getReg()).AsmName; O << ", "; printOperand(MI, OpNo+1); } Modified: llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp Tue Feb 26 15:11:01 2008 @@ -56,7 +56,7 @@ assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) && "Not physref??"); //XXX Bug Workaround: See note in Printer::doInitialization about %. - O << TM.getRegisterInfo()->get(MO.getReg()).Name; + O << TM.getRegisterInfo()->get(MO.getReg()).AsmName; } else { printOp(MO); } @@ -168,7 +168,7 @@ const TargetRegisterInfo &RI = *TM.getRegisterInfo(); switch (MO.getType()) { case MachineOperand::MO_Register: - O << RI.get(MO.getReg()).Name; + O << RI.get(MO.getReg()).AsmName; return; case MachineOperand::MO_Immediate: Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Tue Feb 26 15:11:01 2008 @@ -169,9 +169,9 @@ unsigned stackSize = MF.getFrameInfo()->getStackSize(); - O << "\t.frame\t" << "$" << LowercaseString(RI.get(stackReg).Name) + O << "\t.frame\t" << "$" << LowercaseString(RI.get(stackReg).AsmName) << "," << stackSize << "," - << "$" << LowercaseString(RI.get(returnReg).Name) + << "$" << LowercaseString(RI.get(returnReg).AsmName) << "\n"; } @@ -365,7 +365,7 @@ { case MachineOperand::MO_Register: if (TargetRegisterInfo::isPhysicalRegister(MO.getReg())) - O << "$" << LowercaseString (RI.get(MO.getReg()).Name); + O << "$" << LowercaseString (RI.get(MO.getReg()).AsmName); else O << "$" << MO.getReg(); break; Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Tue Feb 26 15:11:01 2008 @@ -113,7 +113,7 @@ return; } - const char *RegName = TM.getRegisterInfo()->get(RegNo).Name; + const char *RegName = TM.getRegisterInfo()->get(RegNo).AsmName; // Linux assembler (Others?) does not take register mnemonics. // FIXME - What about special registers used in mfspr/mtspr? if (!Subtarget.isDarwin()) RegName = stripRegisterPrefix(RegName); Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td Tue Feb 26 15:11:01 2008 @@ -22,7 +22,7 @@ } // GP8 - One of the 32 64-bit general-purpose registers -class GP8 : PPCReg { +class GP8 : PPCReg { field bits<5> Num = SubReg.Num; let SubRegs = [SubReg]; let PrintableName = n; Modified: llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp Tue Feb 26 15:11:01 2008 @@ -146,7 +146,7 @@ switch (MO.getType()) { case MachineOperand::MO_Register: if (TargetRegisterInfo::isPhysicalRegister(MO.getReg())) - O << "%" << LowercaseString (RI.get(MO.getReg()).Name); + O << "%" << LowercaseString (RI.get(MO.getReg()).AsmName); else O << "%reg" << MO.getReg(); break; Modified: llvm/trunk/lib/Target/Target.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Target.td?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/Target/Target.td (original) +++ llvm/trunk/lib/Target/Target.td Tue Feb 26 15:11:01 2008 @@ -25,7 +25,7 @@ // in the target machine. String n will become the "name" of the register. class Register { string Namespace = ""; - string Name = n; + string AsmName = n; string PrintableName = n; // SpillSize - If this value is set to a non-zero value, it is the size in Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Tue Feb 26 15:11:01 2008 @@ -229,7 +229,7 @@ ((strcmp(Modifier+6,"16") == 0) ? MVT::i16 : MVT::i8)); Reg = getX86SubSuperRegister(Reg, VT); } - for (const char *Name = RI.get(Reg).Name; *Name; ++Name) + for (const char *Name = RI.get(Reg).AsmName; *Name; ++Name) O << (char)tolower(*Name); return; } @@ -575,7 +575,7 @@ } O << '%'; - for (const char *Name = RI.get(Reg).Name; *Name; ++Name) + for (const char *Name = RI.get(Reg).AsmName; *Name; ++Name) O << (char)tolower(*Name); return false; } Modified: llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp Tue Feb 26 15:11:01 2008 @@ -125,7 +125,7 @@ ((strcmp(Modifier,"subreg16") == 0) ? MVT::i16 :MVT::i8)); Reg = getX86SubSuperRegister(Reg, VT); } - O << RI.get(Reg).Name; + O << RI.get(Reg).AsmName; } else O << "reg" << MO.getReg(); return; @@ -271,7 +271,7 @@ break; } - O << '%' << RI.get(Reg).Name; + O << '%' << RI.get(Reg).AsmName; return false; } Modified: llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.h?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.h (original) +++ llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.h Tue Feb 26 15:11:01 2008 @@ -43,7 +43,7 @@ if (MO.isRegister()) { assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) && "Not physreg??"); - O << TM.getRegisterInfo()->get(MO.getReg()).Name; + O << TM.getRegisterInfo()->get(MO.getReg()).AsmName; } else { printOp(MO, Modifier); } Modified: llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp?rev=47625&r1=47624&r2=47625&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp Tue Feb 26 15:11:01 2008 @@ -520,8 +520,8 @@ for (unsigned i = 0, e = Registers.size(); i != e; ++i) { const CodeGenRegister &Reg = Registers[i]; OS << " { \""; - if (!Reg.TheDef->getValueAsString("Name").empty()) - OS << Reg.TheDef->getValueAsString("Name"); + if (!Reg.TheDef->getValueAsString("AsmName").empty()) + OS << Reg.TheDef->getValueAsString("AsmName"); else OS << Reg.getName(); OS << "\",\t\""; From tonic at nondot.org Tue Feb 26 15:13:26 2008 From: tonic at nondot.org (Tanya Lattner) Date: Tue, 26 Feb 2008 15:13:26 -0600 Subject: [llvm-commits] CVS: llvm-www/InTheNews.html Message-ID: <200802262113.m1QLDQ2E018059@zion.cs.uiuc.edu> Changes in directory llvm-www: InTheNews.html updated: 1.25 -> 1.26 --- Log message: Fix typo in name. --- Diffs of the changes: (+2 -2) InTheNews.html | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-www/InTheNews.html diff -u llvm-www/InTheNews.html:1.25 llvm-www/InTheNews.html:1.26 --- llvm-www/InTheNews.html:1.25 Mon Oct 29 12:14:22 2007 +++ llvm-www/InTheNews.html Tue Feb 26 15:12:37 2008 @@ -75,7 +75,7 @@
  • Google BlogSearch For LLVM
    • -
  • Cliffs Of Inanity (T. Romey) +
  • Cliffs Of Inanity (T. Tromey)
    • Why LLVM Matters
    • LLVM Thoughts
      • @@ -112,6 +112,6 @@ Valid HTML 4.01!
      - Last modified: $Date: 2007/10/29 17:14:22 $ + Last modified: $Date: 2008/02/26 21:12:37 $ From tonic at nondot.org Tue Feb 26 15:18:00 2008 From: tonic at nondot.org (Tanya Lattner) Date: Tue, 26 Feb 2008 15:18:00 -0600 Subject: [llvm-commits] CVS: llvm-www/OpenProjects.html Message-ID: <200802262118.m1QLI0s2018231@zion.cs.uiuc.edu> Changes in directory llvm-www: OpenProjects.html updated: 1.33 -> 1.34 --- Log message: Fix broken link. --- Diffs of the changes: (+2 -2) OpenProjects.html | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-www/OpenProjects.html diff -u llvm-www/OpenProjects.html:1.33 llvm-www/OpenProjects.html:1.34 --- llvm-www/OpenProjects.html:1.33 Sun Jan 6 21:42:46 2008 +++ llvm-www/OpenProjects.html Tue Feb 26 15:17:40 2008 @@ -239,7 +239,7 @@
      -

      We have a strong base for development of +

      We have a strong base for development of both pointer analysis based optimizations as well as pointer analyses themselves. It seems natural to want to take advantage of this...

      @@ -424,7 +424,7 @@ src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!"> LLVM Compiler Infrastructure
      - Last modified: $Date: 2008/01/07 03:42:46 $ + Last modified: $Date: 2008/02/26 21:17:40 $ From clattner at apple.com Tue Feb 26 15:19:50 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 26 Feb 2008 13:19:50 -0800 Subject: [llvm-commits] [llvm] r47482 - /llvm/trunk/include/llvm/ADT/IntrusiveRefCntPtr.h In-Reply-To: References: <200802221726.m1MHQImH012966@zion.cs.uiuc.edu> <05CA39DD-3140-4D93-BD66-A474AC24BD78@apple.com> <5EE4D431-19F3-4057-B87D-A769C8BA8BD5@apple.com> Message-ID: <8A9D0343-EEEE-41EF-B518-7D06EF71F47F@apple.com> On Feb 26, 2008, at 11:10 AM, Ted Kremenek wrote: >>> By making the dstor protected in RefCountedBaseVPTR, an object >>> cannot be stack allocated (although subclasses have to make their >>> dstor protected as well for this to work). With RefCountedBase, >>> clients must make the dstor public in order for the static cast >>> with the Release method to work. Thus clients that are already >>> using a VPTR can engineer extra safety into their code by having >>> the compiler enforce that objects derived from RefCountedBaseVPTR >>> are never stack allocated; this same trick cannot be done with >>> RefCountedBase (at least as far as I can tell without making >>> RefCountedBase a friend class of Derived). >> >> I don't really understand how having a vptr is relevant here. >> access control doesn't care about virtualness. In any case, is the >> complexity worth supporting for marginal utility? > > The problem (I believe) is that a parent class cannot call a > protected/private method of a derived class unless its virtual. > That's why RefCountedBaseVPTR does "delete this", instead of > performing a static cast to Derived. The only way for the parent > class to call Derived's private/protected non-virtual methods is if > the parent class is registered as a friend of Derived. > > To answer your other question: no, the complexity is not worth it. > If someone really wants to prevent a Derived class from being > allocated on the stack, they can make the dstor private and make > RefCountedBase a friend. Sounds good, lets just go with RefCountedBase for now. If we find a need for RefCountedBaseVPTR, we can always add it later. Thanks! -Chris From evan.cheng at apple.com Tue Feb 26 15:34:27 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 26 Feb 2008 13:34:27 -0800 Subject: [llvm-commits] [llvm] r47625 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/ utils/TableGen/ In-Reply-To: <200802262111.m1QLB21G017954@zion.cs.uiuc.edu> References: <200802262111.m1QLB21G017954@zion.cs.uiuc.edu> Message-ID: Is getPrintableName() going to be eliminated? Evan On Feb 26, 2008, at 1:11 PM, Bill Wendling wrote: > Author: void > Date: Tue Feb 26 15:11:01 2008 > New Revision: 47625 > > URL: http://llvm.org/viewvc/llvm-project?rev=47625&view=rev > Log: > Change "Name" to "AsmName" in the target register info. Gee, a > refactoring tool > would have been a Godsend here! > > Modified: > llvm/trunk/include/llvm/Target/TargetRegisterInfo.h > llvm/trunk/lib/CodeGen/LiveInterval.cpp > llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp > llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp > llvm/trunk/lib/CodeGen/MachineFunction.cpp > llvm/trunk/lib/CodeGen/MachineLICM.cpp > llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp > llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp > llvm/trunk/lib/CodeGen/RegAllocLocal.cpp > llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp > llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp > llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp > llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp > llvm/trunk/lib/CodeGen/VirtRegMap.cpp > llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp > llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp > llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp > llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp > llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp > llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp > llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp > llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td > llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp > llvm/trunk/lib/Target/Target.td > llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp > llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp > llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.h > llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp > > Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegisterInfo.h?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h (original) > +++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h Tue Feb 26 > 15:11:01 2008 > @@ -48,7 +48,7 @@ > /// register, e.g. RAX, EAX, are super-registers of AX. > /// > struct TargetRegisterDesc { > - const char *Name; // Assembly language name for the > register > + const char *AsmName; // Assembly language name for the > register > const char *PrintableName;// Printable name for the reg (for > debugging) > const unsigned *AliasSet; // Register Alias Set, described above > const unsigned *SubRegs; // Sub-register set, described above > @@ -376,10 +376,10 @@ > return get(RegNo).SuperRegs; > } > > - /// getName - Return the symbolic target specific name for the > specified > - /// physical register. > - const char *getName(unsigned RegNo) const { > - return get(RegNo).Name; > + /// getAsmName - Return the symbolic target specific name for the > + /// specified physical register. > + const char *getAsmName(unsigned RegNo) const { > + return get(RegNo).AsmName; > } > > /// getPrintableName - Return the human-readable symbolic target > specific name > > Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveInterval.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/LiveInterval.cpp (original) > +++ llvm/trunk/lib/CodeGen/LiveInterval.cpp Tue Feb 26 15:11:01 2008 > @@ -665,7 +665,7 @@ > void LiveInterval::print(std::ostream &OS, > const TargetRegisterInfo *TRI) const { > if (TRI && TargetRegisterInfo::isPhysicalRegister(reg)) > - OS << TRI->getName(reg); > + OS << TRI->getPrintableName(reg); > else > OS << "%reg" << reg; > > > Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) > +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Feb 26 > 15:11:01 2008 > @@ -189,7 +189,7 @@ > > void LiveIntervals::printRegName(unsigned reg) const { > if (TargetRegisterInfo::isPhysicalRegister(reg)) > - cerr << tri_->getName(reg); > + cerr << tri_->getPrintableName(reg); > else > cerr << "%reg" << reg; > } > > Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original) > +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Tue Feb 26 15:11:01 > 2008 > @@ -146,7 +146,7 @@ > const TargetRegisterInfo *TRI = 0) { > if (!RegNo || TargetRegisterInfo::isPhysicalRegister(RegNo)) { > if (TRI) > - os << " %" << TRI->get(RegNo).Name; > + os << " %" << TRI->get(RegNo).PrintableName; > else > os << " %mreg(" << RegNo << ")"; > } else > > Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original) > +++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Tue Feb 26 15:11:01 > 2008 > @@ -214,7 +214,7 @@ > for (MachineRegisterInfo::livein_iterator > I = RegInfo->livein_begin(), E = RegInfo->livein_end(); I ! > = E; ++I) { > if (TRI) > - OS << " " << TRI->getName(I->first); > + OS << " " << TRI->getPrintableName(I->first); > else > OS << " Reg #" << I->first; > > @@ -228,7 +228,7 @@ > for (MachineRegisterInfo::liveout_iterator > I = RegInfo->liveout_begin(), E = RegInfo->liveout_end(); > I != E; ++I) > if (TRI) > - OS << " " << TRI->getName(*I); > + OS << " " << TRI->getPrintableName(*I); > else > OS << " Reg #" << *I; > OS << "\n"; > > Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original) > +++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Feb 26 15:11:01 2008 > @@ -251,7 +251,7 @@ > const TargetRegisterInfo *TRI = TM->getRegisterInfo(); > for (const unsigned *ImpUses = I.getDesc().getImplicitUses(); > *ImpUses; ++ImpUses) > - DOUT << " -> " << TRI->getName(*ImpUses) << "\n"; > + DOUT << " -> " << TRI->getPrintableName(*ImpUses) << > "\n"; > } > > if (I.getDesc().getImplicitDefs()) { > @@ -260,7 +260,7 @@ > const TargetRegisterInfo *TRI = TM->getRegisterInfo(); > for (const unsigned *ImpDefs = I.getDesc().getImplicitDefs(); > *ImpDefs; ++ImpDefs) > - DOUT << " -> " << TRI->getName(*ImpDefs) << "\n"; > + DOUT << " -> " << TRI->getPrintableName(*ImpDefs) << > "\n"; > } > > //if (TII->hasUnmodelledSideEffects(&I)) > > Modified: llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp (original) > +++ llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp Tue Feb 26 15:11:01 > 2008 > @@ -311,7 +311,7 @@ > assert(VirtReg && "Spilling a physical register is illegal!" > " Must not have appropriate kill for the register or use > exists beyond" > " the intended one."); > - DOUT << " Spilling register " << RegInfo->getName(PhysReg) > + DOUT << " Spilling register " << RegInfo- > >getPrintableName(PhysReg) > << " containing %reg" << VirtReg; > > const TargetInstrInfo* TII = MBB.getParent()- > >getTarget().getInstrInfo(); > @@ -535,7 +535,7 @@ > markVirtRegModified(VirtReg, false); > > DOUT << " Reloading %reg" << VirtReg << " into " > - << RegInfo->getName(PhysReg) << "\n"; > + << RegInfo->getPrintableName(PhysReg) << "\n"; > > // Add move instruction(s) > TII->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC); > @@ -646,7 +646,7 @@ > DOUT << " Regs have values: "; > for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i) > if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2) > - DOUT << "[" << RegInfo->getName(i) > + DOUT << "[" << RegInfo->getPrintableName(i) > << ",%reg" << PhysRegsUsed[i] << "] "; > DOUT << "\n"); > > @@ -700,14 +700,14 @@ > } > > if (PhysReg) { > - DOUT << " Last use of " << RegInfo->getName(PhysReg) > + DOUT << " Last use of " << RegInfo- > >getPrintableName(PhysReg) > << "[%reg" << VirtReg <<"], removing it from live set\n"; > removePhysReg(PhysReg); > for (const unsigned *AliasSet = RegInfo- > >getSubRegisters(PhysReg); > *AliasSet; ++AliasSet) { > if (PhysRegsUsed[*AliasSet] != -2) { > DOUT << " Last use of " > - << RegInfo->getName(*AliasSet) > + << RegInfo->getPrintableName(*AliasSet) > << "[%reg" << VirtReg <<"], removing it from live > set\n"; > removePhysReg(*AliasSet); > } > @@ -806,14 +806,14 @@ > } > > if (PhysReg) { > - DOUT << " Register " << RegInfo->getName(PhysReg) > + DOUT << " Register " << RegInfo->getPrintableName(PhysReg) > << " [%reg" << VirtReg > << "] is never used, removing it frame live list\n"; > removePhysReg(PhysReg); > for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg); > *AliasSet; ++AliasSet) { > if (PhysRegsUsed[*AliasSet] != -2) { > - DOUT << " Register " << RegInfo->getName(*AliasSet) > + DOUT << " Register " << RegInfo- > >getPrintableName(*AliasSet) > << " [%reg" << *AliasSet > << "] is never used, removing it frame live list\n"; > removePhysReg(*AliasSet); > > Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original) > +++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Tue Feb 26 > 15:11:01 2008 > @@ -164,7 +164,7 @@ > if (TargetRegisterInfo::isVirtualRegister(reg)) { > reg = vrm_->getPhys(reg); > } > - DOUT << tri_->getName(reg) << '\n'; > + DOUT << tri_->getPrintableName(reg) << '\n'; > } > } > }; > @@ -239,7 +239,8 @@ > > // Try to coalesce. > if (!li_->conflictsWithPhysRegDef(cur, *vrm_, SrcReg)) { > - DOUT << "Coalescing: " << cur << " -> " << tri_- > >getName(SrcReg) << '\n'; > + DOUT << "Coalescing: " << cur << " -> " << tri_- > >getPrintableName(SrcReg) > + << '\n'; > vrm_->clearVirt(cur.reg); > vrm_->assignVirt2Phys(cur.reg, SrcReg); > ++NumCoalesce; > @@ -627,7 +628,7 @@ > // the free physical register and add this interval to the active > // list. > if (physReg) { > - DOUT << tri_->getName(physReg) << '\n'; > + DOUT << tri_->getPrintableName(physReg) << '\n'; > vrm_->assignVirt2Phys(cur->reg, physReg); > prt_->addRegUse(physReg); > active_.push_back(std::make_pair(cur, cur->begin())); > @@ -689,7 +690,7 @@ > } > > DOUT << "\t\tregister with min weight: " > - << tri_->getName(minReg) << " (" << minWeight << ")\n"; > + << tri_->getPrintableName(minReg) << " (" << minWeight << ") > \n"; > > // if the current has the minimum weight, we need to spill it and > // add any added intervals back to unhandled, and restart > @@ -868,11 +869,11 @@ > if (cur->preference) { > if (prt_->isRegAvail(cur->preference)) { > DOUT << "\t\tassigned the preferred register: " > - << tri_->getName(cur->preference) << "\n"; > + << tri_->getPrintableName(cur->preference) << "\n"; > return cur->preference; > } else > DOUT << "\t\tunable to assign the preferred register: " > - << tri_->getName(cur->preference) << "\n"; > + << tri_->getPrintableName(cur->preference) << "\n"; > } > > // Scan for the first available register. > > Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original) > +++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Tue Feb 26 15:11:01 2008 > @@ -286,7 +286,7 @@ > assert(VirtReg && "Spilling a physical register is illegal!" > " Must not have appropriate kill for the register or use > exists beyond" > " the intended one."); > - DOUT << " Spilling register " << TRI->getName(PhysReg) > + DOUT << " Spilling register " << TRI->getPrintableName(PhysReg) > << " containing %reg" << VirtReg; > > const TargetInstrInfo* TII = MBB.getParent()- > >getTarget().getInstrInfo(); > @@ -502,7 +502,7 @@ > markVirtRegModified(VirtReg, false); // Note that this reg was > just reloaded > > DOUT << " Reloading %reg" << VirtReg << " into " > - << TRI->getName(PhysReg) << "\n"; > + << TRI->getPrintableName(PhysReg) << "\n"; > > // Add move instruction(s) > const TargetInstrInfo* TII = MBB.getParent()- > >getTarget().getInstrInfo(); > @@ -575,7 +575,7 @@ > DOUT << " Regs have values: "; > for (unsigned i = 0; i != TRI->getNumRegs(); ++i) > if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2) > - DOUT << "[" << TRI->getName(i) > + DOUT << "[" << TRI->getPrintableName(i) > << ",%reg" << PhysRegsUsed[i] << "] "; > DOUT << "\n"); > > @@ -637,14 +637,14 @@ > } > > if (PhysReg) { > - DOUT << " Last use of " << TRI->getName(PhysReg) > + DOUT << " Last use of " << TRI->getPrintableName(PhysReg) > << "[%reg" << VirtReg <<"], removing it from live set\n"; > removePhysReg(PhysReg); > for (const unsigned *AliasSet = TRI->getSubRegisters(PhysReg); > *AliasSet; ++AliasSet) { > if (PhysRegsUsed[*AliasSet] != -2) { > DOUT << " Last use of " > - << TRI->getName(*AliasSet) > + << TRI->getPrintableName(*AliasSet) > << "[%reg" << VirtReg <<"], removing it from live > set\n"; > removePhysReg(*AliasSet); > } > @@ -728,7 +728,7 @@ > MF->getRegInfo().setPhysRegUsed(DestPhysReg); > markVirtRegModified(DestVirtReg); > getVirtRegLastUse(DestVirtReg) = > std::make_pair((MachineInstr*)0, 0); > - DOUT << " Assigning " << TRI->getName(DestPhysReg) > + DOUT << " Assigning " << TRI->getPrintableName(DestPhysReg) > << " to %reg" << DestVirtReg << "\n"; > MI->getOperand(i).setReg(DestPhysReg); // Assign the output > register > } > @@ -751,14 +751,14 @@ > } > > if (PhysReg) { > - DOUT << " Register " << TRI->getName(PhysReg) > + DOUT << " Register " << TRI->getPrintableName(PhysReg) > << " [%reg" << VirtReg > << "] is never used, removing it frame live list\n"; > removePhysReg(PhysReg); > for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg); > *AliasSet; ++AliasSet) { > if (PhysRegsUsed[*AliasSet] != -2) { > - DOUT << " Register " << TRI->getName(*AliasSet) > + DOUT << " Register " << TRI- > >getPrintableName(*AliasSet) > << " [%reg" << *AliasSet > << "] is never used, removing it frame live list\n"; > removePhysReg(*AliasSet); > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Feb 26 > 15:11:01 2008 > @@ -4181,7 +4181,8 @@ > } else if (const RegisterSDNode *R = > dyn_cast(this)) { > if (G && R->getReg() && > TargetRegisterInfo::isPhysicalRegister(R->getReg())) { > - cerr << " " <getTarget().getRegisterInfo()->getName(R- > >getReg()); > + cerr << " " > + << G->getTarget().getRegisterInfo()->getPrintableName(R- > >getReg()); > } else { > cerr << " #" << R->getReg(); > } > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp > (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp Tue > Feb 26 15:11:01 2008 > @@ -133,7 +133,8 @@ > } else if (const RegisterSDNode *R = > dyn_cast(Node)) { > if (G && R->getReg() != 0 && > TargetRegisterInfo::isPhysicalRegister(R->getReg())) { > - Op = Op + " " + G->getTarget().getRegisterInfo()->getName(R- > >getReg()); > + Op = Op + " " + > + G->getTarget().getRegisterInfo()->getPrintableName(R->getReg()); > } else { > Op += " #" + utostr(R->getReg()); > } > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Tue Feb > 26 15:11:01 2008 > @@ -1648,7 +1648,7 @@ > > for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end(); > I != E; ++I) { > - if (StringsEqualNoCase(RegName, RI->get(*I).Name)) > + if (StringsEqualNoCase(RegName, RI->get(*I).AsmName)) > return std::make_pair(*I, RC); > } > } > > Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) > +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Tue Feb 26 > 15:11:01 2008 > @@ -1537,7 +1537,7 @@ > > void SimpleRegisterCoalescing::printRegName(unsigned reg) const { > if (TargetRegisterInfo::isPhysicalRegister(reg)) > - cerr << tri_->getName(reg); > + cerr << tri_->getPrintableName(reg); > else > cerr << "%reg" << reg; > } > > Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) > +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Tue Feb 26 15:11:01 2008 > @@ -141,8 +141,8 @@ > for (unsigned i = TargetRegisterInfo::FirstVirtualRegister, > e = MF.getRegInfo().getLastVirtReg(); i <= e; ++i) { > if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG) > - OS << "[reg" << i << " -> " << TRI->getName(Virt2PhysMap[i]) > << "]\n"; > - > + OS << "[reg" << i << " -> " << TRI- > >getPrintableName(Virt2PhysMap[i]) > + << "]\n"; > } > > for (unsigned i = TargetRegisterInfo::FirstVirtualRegister, > @@ -351,7 +351,7 @@ > DOUT << "Remembering RM#" << SlotOrReMat- > VirtRegMap::MAX_STACK_SLOT-1; > else > DOUT << "Remembering SS#" << SlotOrReMat; > - DOUT << " in physreg " << TRI->getName(Reg) << "\n"; > + DOUT << " in physreg " << TRI->getPrintableName(Reg) << "\n"; > } > > /// canClobberPhysReg - Return true if the spiller is allowed to > change the > @@ -392,7 +392,7 @@ > assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == > PhysReg && > "Bidirectional map mismatch!"); > SpillSlotsOrReMatsAvailable[SlotOrReMat] &= ~1; > - DOUT << "PhysReg " << TRI->getName(PhysReg) > + DOUT << "PhysReg " << TRI->getPrintableName(PhysReg) > << " copied, it is available for use but can no longer be > modified\n"; > } > } > @@ -417,7 +417,7 @@ > assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == > PhysReg && > "Bidirectional map mismatch!"); > SpillSlotsOrReMatsAvailable.erase(SlotOrReMat); > - DOUT << "PhysReg " << TRI->getName(PhysReg) > + DOUT << "PhysReg " << TRI->getPrintableName(PhysReg) > << " clobbered, invalidating "; > if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT) > DOUT << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 << > "\n"; > @@ -1135,9 +1135,9 @@ > else > DOUT << "Reusing SS#" << ReuseSlot; > DOUT << " from physreg " > - << TRI->getName(PhysReg) << " for vreg" > + << TRI->getPrintableName(PhysReg) << " for vreg" > << VirtReg <<" instead of reloading into physreg " > - << TRI->getName(VRM.getPhys(VirtReg)) << "\n"; > + << TRI->getPrintableName(VRM.getPhys(VirtReg)) << > "\n"; > unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : > PhysReg; > MI.getOperand(i).setReg(RReg); > > @@ -1208,8 +1208,8 @@ > DOUT << "Reusing RM#" << ReuseSlot- > VirtRegMap::MAX_STACK_SLOT-1; > else > DOUT << "Reusing SS#" << ReuseSlot; > - DOUT << " from physreg " << TRI->getName(PhysReg) << " > for vreg" > - << VirtReg > + DOUT << " from physreg " << TRI->getPrintableName(PhysReg) > + << " for vreg" << VirtReg > << " instead of reloading into same physreg.\n"; > unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : > PhysReg; > MI.getOperand(i).setReg(RReg); > > Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Tue Feb 26 15:11:01 > 2008 > @@ -273,7 +273,7 @@ > switch (MO.getType()) { > case MachineOperand::MO_Register: > if (TargetRegisterInfo::isPhysicalRegister(MO.getReg())) > - O << TM.getRegisterInfo()->get(MO.getReg()).Name; > + O << TM.getRegisterInfo()->get(MO.getReg()).AsmName; > else > assert(0 && "not implemented"); > break; > @@ -393,7 +393,7 @@ > const MachineOperand &MO3 = MI->getOperand(Op+2); > > assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg())); > - O << TM.getRegisterInfo()->get(MO1.getReg()).Name; > + O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; > > // Print the shift opc. > O << ", " > @@ -402,7 +402,7 @@ > > if (MO2.getReg()) { > assert(TargetRegisterInfo::isPhysicalRegister(MO2.getReg())); > - O << TM.getRegisterInfo()->get(MO2.getReg()).Name; > + O << TM.getRegisterInfo()->get(MO2.getReg()).AsmName; > assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0); > } else { > O << "#" << ARM_AM::getSORegOffset(MO3.getImm()); > @@ -419,7 +419,7 @@ > return; > } > > - O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name; > + O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; > > if (!MO2.getReg()) { > if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0. > @@ -432,7 +432,7 @@ > > O << ", " > << (char)ARM_AM::getAM2Op(MO3.getImm()) > - << TM.getRegisterInfo()->get(MO2.getReg()).Name; > + << TM.getRegisterInfo()->get(MO2.getReg()).AsmName; > > if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm())) > O << ", " > @@ -455,7 +455,7 @@ > } > > O << (char)ARM_AM::getAM2Op(MO2.getImm()) > - << TM.getRegisterInfo()->get(MO1.getReg()).Name; > + << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; > > if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm())) > O << ", " > @@ -469,12 +469,12 @@ > const MachineOperand &MO3 = MI->getOperand(Op+2); > > assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg())); > - O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name; > + O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; > > if (MO2.getReg()) { > O << ", " > << (char)ARM_AM::getAM3Op(MO3.getImm()) > - << TM.getRegisterInfo()->get(MO2.getReg()).Name > + << TM.getRegisterInfo()->get(MO2.getReg()).AsmName > << "]"; > return; > } > @@ -492,7 +492,7 @@ > > if (MO1.getReg()) { > O << (char)ARM_AM::getAM3Op(MO2.getImm()) > - << TM.getRegisterInfo()->get(MO1.getReg()).Name; > + << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; > return; > } > > @@ -545,13 +545,13 @@ > return; > } else if (Modifier && strcmp(Modifier, "base") == 0) { > // Used for FSTM{D|S} and LSTM{D|S} operations. > - O << TM.getRegisterInfo()->get(MO1.getReg()).Name; > + O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; > if (ARM_AM::getAM5WBFlag(MO2.getImm())) > O << "!"; > return; > } > > - O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name; > + O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; > > if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) { > O << ", #" > @@ -570,15 +570,15 @@ > > const MachineOperand &MO1 = MI->getOperand(Op); > assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg())); > - O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).Name << > "]"; > + O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName > << "]"; > } > > void > ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, > int Op) { > const MachineOperand &MO1 = MI->getOperand(Op); > const MachineOperand &MO2 = MI->getOperand(Op+1); > - O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name; > - O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).Name << "]"; > + O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; > + O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).AsmName << > "]"; > } > > void > @@ -593,9 +593,9 @@ > return; > } > > - O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name; > + O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; > if (MO3.getReg()) > - O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).Name; > + O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).AsmName; > else if (unsigned ImmOffs = MO2.getImm()) { > O << ", #" << ImmOffs; > if (Scale > 1) > @@ -620,7 +620,7 @@ > void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr > *MI,int Op) { > const MachineOperand &MO1 = MI->getOperand(Op); > const MachineOperand &MO2 = MI->getOperand(Op+1); > - O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).Name; > + O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; > if (unsigned ImmOffs = MO2.getImm()) > O << ", #" << ImmOffs << " * 4"; > O << "]"; > > Modified: llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp Tue Feb 26 > 15:11:01 2008 > @@ -77,7 +77,7 @@ > if (MO.getType() == MachineOperand::MO_Register) { > assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) && > "Not physreg??"); > - O << TM.getRegisterInfo()->get(MO.getReg()).Name; > + O << TM.getRegisterInfo()->get(MO.getReg()).AsmName; > } else if (MO.isImmediate()) { > O << MO.getImm(); > assert(MO.getImm() < (1 << 30)); > @@ -92,7 +92,7 @@ > > switch (MO.getType()) { > case MachineOperand::MO_Register: > - O << RI.get(MO.getReg()).Name; > + O << RI.get(MO.getReg()).AsmName; > return; > > case MachineOperand::MO_Immediate: > > Modified: llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp (original) > +++ llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp Tue Feb 26 > 15:11:01 2008 > @@ -334,6 +334,6 @@ > > std::string AlphaRegisterInfo::getPrettyName(unsigned reg) > { > - std::string s(RegisterDescriptors[reg].Name); > + std::string s(RegisterDescriptors[reg].PrintableName); > return s; > } > > Modified: llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp Tue Feb 26 > 15:11:01 2008 > @@ -75,14 +75,14 @@ > unsigned RegNo = MO.getReg(); > assert(TargetRegisterInfo::isPhysicalRegister(RegNo) && > "Not physreg??"); > - O << TM.getRegisterInfo()->get(RegNo).Name; > + O << TM.getRegisterInfo()->get(RegNo).AsmName; > } > > void printOperand(const MachineInstr *MI, unsigned OpNo) { > const MachineOperand &MO = MI->getOperand(OpNo); > if (MO.isRegister()) { > > assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not > physreg??"); > - O << TM.getRegisterInfo()->get(MO.getReg()).Name; > + O << TM.getRegisterInfo()->get(MO.getReg()).AsmName; > } else if (MO.isImmediate()) { > O << MO.getImm(); > } else { > @@ -149,7 +149,7 @@ > // the value contained in the register. For this reason, the > darwin > // assembler requires that we print r0 as 0 (no r) when used > as the base. > const MachineOperand &MO = MI->getOperand(OpNo); > - O << TM.getRegisterInfo()->get(MO.getReg()).Name; > + O << TM.getRegisterInfo()->get(MO.getReg()).AsmName; > O << ", "; > printOperand(MI, OpNo+1); > } > > Modified: llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp Tue Feb 26 > 15:11:01 2008 > @@ -56,7 +56,7 @@ > assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) && > "Not physref??"); > //XXX Bug Workaround: See note in Printer::doInitialization > about %. > - O << TM.getRegisterInfo()->get(MO.getReg()).Name; > + O << TM.getRegisterInfo()->get(MO.getReg()).AsmName; > } else { > printOp(MO); > } > @@ -168,7 +168,7 @@ > const TargetRegisterInfo &RI = *TM.getRegisterInfo(); > switch (MO.getType()) { > case MachineOperand::MO_Register: > - O << RI.get(MO.getReg()).Name; > + O << RI.get(MO.getReg()).AsmName; > return; > > case MachineOperand::MO_Immediate: > > Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Tue Feb 26 > 15:11:01 2008 > @@ -169,9 +169,9 @@ > unsigned stackSize = MF.getFrameInfo()->getStackSize(); > > > - O << "\t.frame\t" << "$" << LowercaseString(RI.get(stackReg).Name) > + O << "\t.frame\t" << "$" << > LowercaseString(RI.get(stackReg).AsmName) > << "," << stackSize << "," > - << "$" << LowercaseString(RI.get(returnReg).Name) > + << "$" << > LowercaseString(RI.get(returnReg).AsmName) > << "\n"; > } > > @@ -365,7 +365,7 @@ > { > case MachineOperand::MO_Register: > if (TargetRegisterInfo::isPhysicalRegister(MO.getReg())) > - O << "$" << LowercaseString (RI.get(MO.getReg()).Name); > + O << "$" << LowercaseString (RI.get(MO.getReg()).AsmName); > else > O << "$" << MO.getReg(); > break; > > Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Tue Feb 26 > 15:11:01 2008 > @@ -113,7 +113,7 @@ > return; > } > > - const char *RegName = TM.getRegisterInfo()->get(RegNo).Name; > + const char *RegName = TM.getRegisterInfo()->get(RegNo).AsmName; > // Linux assembler (Others?) does not take register mnemonics. > // FIXME - What about special registers used in mfspr/mtspr? > if (!Subtarget.isDarwin()) RegName = > stripRegisterPrefix(RegName); > > Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td (original) > +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td Tue Feb 26 > 15:11:01 2008 > @@ -22,7 +22,7 @@ > } > > // GP8 - One of the 32 64-bit general-purpose registers > -class GP8 : PPCReg { > +class GP8 : PPCReg { > field bits<5> Num = SubReg.Num; > let SubRegs = [SubReg]; > let PrintableName = n; > > Modified: llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp Tue Feb 26 > 15:11:01 2008 > @@ -146,7 +146,7 @@ > switch (MO.getType()) { > case MachineOperand::MO_Register: > if (TargetRegisterInfo::isPhysicalRegister(MO.getReg())) > - O << "%" << LowercaseString (RI.get(MO.getReg()).Name); > + O << "%" << LowercaseString (RI.get(MO.getReg()).AsmName); > else > O << "%reg" << MO.getReg(); > break; > > Modified: llvm/trunk/lib/Target/Target.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Target.td?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Target.td (original) > +++ llvm/trunk/lib/Target/Target.td Tue Feb 26 15:11:01 2008 > @@ -25,7 +25,7 @@ > // in the target machine. String n will become the "name" of the > register. > class Register { > string Namespace = ""; > - string Name = n; > + string AsmName = n; > string PrintableName = n; > > // SpillSize - If this value is set to a non-zero value, it is the > size in > > Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Tue Feb 26 > 15:11:01 2008 > @@ -229,7 +229,7 @@ > ((strcmp(Modifier+6,"16") == 0) ? MVT::i16 : > MVT::i8)); > Reg = getX86SubSuperRegister(Reg, VT); > } > - for (const char *Name = RI.get(Reg).Name; *Name; ++Name) > + for (const char *Name = RI.get(Reg).AsmName; *Name; ++Name) > O << (char)tolower(*Name); > return; > } > @@ -575,7 +575,7 @@ > } > > O << '%'; > - for (const char *Name = RI.get(Reg).Name; *Name; ++Name) > + for (const char *Name = RI.get(Reg).AsmName; *Name; ++Name) > O << (char)tolower(*Name); > return false; > } > > Modified: llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp Tue Feb 26 > 15:11:01 2008 > @@ -125,7 +125,7 @@ > ((strcmp(Modifier,"subreg16") == 0) ? > MVT::i16 :MVT::i8)); > Reg = getX86SubSuperRegister(Reg, VT); > } > - O << RI.get(Reg).Name; > + O << RI.get(Reg).AsmName; > } else > O << "reg" << MO.getReg(); > return; > @@ -271,7 +271,7 @@ > break; > } > > - O << '%' << RI.get(Reg).Name; > + O << '%' << RI.get(Reg).AsmName; > return false; > } > > > Modified: llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.h?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.h (original) > +++ llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.h Tue Feb 26 > 15:11:01 2008 > @@ -43,7 +43,7 @@ > if (MO.isRegister()) { > assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) && > "Not physreg??"); > - O << TM.getRegisterInfo()->get(MO.getReg()).Name; > + O << TM.getRegisterInfo()->get(MO.getReg()).AsmName; > } else { > printOp(MO, Modifier); > } > > Modified: llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp?rev=47625&r1=47624&r2=47625&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp (original) > +++ llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp Tue Feb 26 > 15:11:01 2008 > @@ -520,8 +520,8 @@ > for (unsigned i = 0, e = Registers.size(); i != e; ++i) { > const CodeGenRegister &Reg = Registers[i]; > OS << " { \""; > - if (!Reg.TheDef->getValueAsString("Name").empty()) > - OS << Reg.TheDef->getValueAsString("Name"); > + if (!Reg.TheDef->getValueAsString("AsmName").empty()) > + OS << Reg.TheDef->getValueAsString("AsmName"); > else > OS << Reg.getName(); > OS << "\",\t\""; > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From asl at math.spbu.ru Tue Feb 26 15:44:24 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 26 Feb 2008 21:44:24 -0000 Subject: [llvm-commits] [llvm] r47628 - /llvm/trunk/include/llvm/ADT/IntrusiveRefCntPtr.h Message-ID: <200802262144.m1QLiOjm019101@zion.cs.uiuc.edu> Author: asl Date: Tue Feb 26 15:44:24 2008 New Revision: 47628 URL: http://llvm.org/viewvc/llvm-project?rev=47628&view=rev Log: Update per review. Patch by Mikhail Glushenkov! Modified: llvm/trunk/include/llvm/ADT/IntrusiveRefCntPtr.h Modified: llvm/trunk/include/llvm/ADT/IntrusiveRefCntPtr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/IntrusiveRefCntPtr.h?rev=47628&r1=47627&r2=47628&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/IntrusiveRefCntPtr.h (original) +++ llvm/trunk/include/llvm/ADT/IntrusiveRefCntPtr.h Tue Feb 26 15:44:24 2008 @@ -22,34 +22,13 @@ #define LLVM_ADT_INTRUSIVE_REF_CNT_PTR #include -#include #include "llvm/Support/Casting.h" -// Forward declarations - namespace llvm { - template - class RefCountedBase; template - class RefCountedBaseVPTR; -} - -template -void IntrusivePtrAddRef(llvm::RefCountedBase*); - -template -void IntrusivePtrRelease(llvm::RefCountedBase*); - -template -void IntrusivePtrAddRef(llvm::RefCountedBaseVPTR*); - -template -void IntrusivePtrRelease(llvm::RefCountedBaseVPTR*); - - -namespace llvm { + class IntrusiveRefCntPtr; //===----------------------------------------------------------------------===// /// RefCountedBase - A generic base class for objects that wish to @@ -74,16 +53,16 @@ if (--ref_cnt == 0) delete static_cast(this); } - friend void IntrusivePtrAddRef(RefCountedBase*); - friend void IntrusivePtrRelease(RefCountedBase*); + friend class IntrusiveRefCntPtr; }; //===----------------------------------------------------------------------===// /// RefCountedBaseVPTR - A class that has the same function as /// RefCountedBase, but with a virtual destructor. Should be used -/// instead of RefCountedBase for classes that have virtual -/// destructors. Classes that inherit from RefCountedBaseVPTR can't -/// be allocated on stack. +/// instead of RefCountedBase for classes that already have virtual +/// methods to enforce dynamic allocation via 'new'. Classes that +/// inherit from RefCountedBaseVPTR can't be allocated on stack - +/// attempting to do this will produce a compile error. //===----------------------------------------------------------------------===// template class RefCountedBaseVPTR { @@ -99,33 +78,9 @@ if (--ref_cnt == 0) delete this; } - friend void IntrusivePtrAddRef(RefCountedBaseVPTR*); - friend void IntrusivePtrRelease(RefCountedBaseVPTR*); + friend class IntrusiveRefCntPtr; }; -} - -//===----------------------------------------------------------------------===// -/// IntrusivePtrAddRef - A utility function used by IntrusiveRefCntPtr -/// to increment the reference count of an RefCountedBase-derived object. -//===----------------------------------------------------------------------===// -template -void IntrusivePtrAddRef(llvm::RefCountedBase* O) { - O->Retain(); -} - -//===----------------------------------------------------------------------===// -/// IntrusivePtrRelease - The complement of IntrusivePtrAddRef; -/// decrements the reference count of a RefCounted object. -//===----------------------------------------------------------------------===// -template -void IntrusivePtrRelease(llvm::RefCountedBase* O) { - O->Release(); -} - - -namespace llvm { - //===----------------------------------------------------------------------===// /// IntrusiveRefCntPtr - A template class that implements a "smart pointer" /// that assumes the wrapped object has a reference count associated @@ -136,6 +91,12 @@ /// incremented and upon destruction of the smart pointer the /// reference count is decremented. This class also safely handles /// wrapping NULL pointers. +/// +/// Reference counting is implemented via calls to +/// Obj->Retain()/Obj->Release(). Release() is required to destroy +/// the object when the reference count reaches zero. Inheriting from +/// RefCountedBase/RefCountedBaseVPTR takes care of this +/// automatically. //===----------------------------------------------------------------------===// template class IntrusiveRefCntPtr { @@ -144,7 +105,7 @@ public: typedef T element_type; - explicit IntrusiveRefCntPtr() : Obj(NULL) {} + explicit IntrusiveRefCntPtr() : Obj(0) {} explicit IntrusiveRefCntPtr(T* obj) : Obj(obj) { retain(); @@ -181,7 +142,7 @@ typedef T * IntrusiveRefCntPtr::*unspecified_bool_type; operator unspecified_bool_type() const { - return Obj == NULL ? NULL : &IntrusiveRefCntPtr::getPtr; + return Obj == 0 ? 0 : &IntrusiveRefCntPtr::getPtr; } void swap(IntrusiveRefCntPtr& other) { @@ -191,8 +152,8 @@ } private: - void retain() { if (Obj) IntrusivePtrAddRef(Obj); } - void release() { if (Obj) IntrusivePtrRelease(Obj); } + void retain() { if (Obj) Obj->Retain(); } + void release() { if (Obj) Obj->Release(); } void replace(T* S) { this_type(S).swap(this); From isanbard at gmail.com Tue Feb 26 15:47:58 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 26 Feb 2008 21:47:58 -0000 Subject: [llvm-commits] [llvm] r47629 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Target/Alpha/ lib/Target/PowerPC/ utils/TableGen/ Message-ID: <200802262147.m1QLlwut019257@zion.cs.uiuc.edu> Author: void Date: Tue Feb 26 15:47:57 2008 New Revision: 47629 URL: http://llvm.org/viewvc/llvm-project?rev=47629&view=rev Log: Rename PrintableName to Name. Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h llvm/trunk/lib/CodeGen/LiveInterval.cpp llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp llvm/trunk/lib/CodeGen/MachineFunction.cpp llvm/trunk/lib/CodeGen/MachineInstr.cpp llvm/trunk/lib/CodeGen/MachineLICM.cpp llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp llvm/trunk/lib/CodeGen/RegAllocLocal.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp llvm/trunk/lib/CodeGen/VirtRegMap.cpp llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td llvm/trunk/lib/Target/Target.td llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegisterInfo.h?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h Tue Feb 26 15:47:57 2008 @@ -49,7 +49,7 @@ /// struct TargetRegisterDesc { const char *AsmName; // Assembly language name for the register - const char *PrintableName;// Printable name for the reg (for debugging) + const char *Name; // Printable name for the reg (for debugging) const unsigned *AliasSet; // Register Alias Set, described above const unsigned *SubRegs; // Sub-register set, described above const unsigned *ImmSubRegs; // Immediate sub-register set, described above @@ -376,16 +376,16 @@ return get(RegNo).SuperRegs; } - /// getAsmName - Return the symbolic target specific name for the + /// getAsmName - Return the symbolic target-specific name for the /// specified physical register. const char *getAsmName(unsigned RegNo) const { return get(RegNo).AsmName; } - /// getPrintableName - Return the human-readable symbolic target specific name - /// for the specified physical register. - const char *getPrintableName(unsigned RegNo) const { - return get(RegNo).PrintableName; + /// getName - Return the human-readable symbolic target-specific name for the + /// specified physical register. + const char *getName(unsigned RegNo) const { + return get(RegNo).Name; } /// getNumRegs - Return the number of registers this target has (useful for Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveInterval.cpp?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveInterval.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveInterval.cpp Tue Feb 26 15:47:57 2008 @@ -665,7 +665,7 @@ void LiveInterval::print(std::ostream &OS, const TargetRegisterInfo *TRI) const { if (TRI && TargetRegisterInfo::isPhysicalRegister(reg)) - OS << TRI->getPrintableName(reg); + OS << TRI->getName(reg); else OS << "%reg" << reg; Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Feb 26 15:47:57 2008 @@ -189,7 +189,7 @@ void LiveIntervals::printRegName(unsigned reg) const { if (TargetRegisterInfo::isPhysicalRegister(reg)) - cerr << tri_->getPrintableName(reg); + cerr << tri_->getName(reg); else cerr << "%reg" << reg; } Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Tue Feb 26 15:47:57 2008 @@ -146,7 +146,7 @@ const TargetRegisterInfo *TRI = 0) { if (!RegNo || TargetRegisterInfo::isPhysicalRegister(RegNo)) { if (TRI) - os << " %" << TRI->get(RegNo).PrintableName; + os << " %" << TRI->get(RegNo).Name; else os << " %mreg(" << RegNo << ")"; } else Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Tue Feb 26 15:47:57 2008 @@ -214,7 +214,7 @@ for (MachineRegisterInfo::livein_iterator I = RegInfo->livein_begin(), E = RegInfo->livein_end(); I != E; ++I) { if (TRI) - OS << " " << TRI->getPrintableName(I->first); + OS << " " << TRI->getName(I->first); else OS << " Reg #" << I->first; @@ -228,7 +228,7 @@ for (MachineRegisterInfo::liveout_iterator I = RegInfo->liveout_begin(), E = RegInfo->liveout_end(); I != E; ++I) if (TRI) - OS << " " << TRI->getPrintableName(*I); + OS << " " << TRI->getName(*I); else OS << " Reg #" << *I; OS << "\n"; Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Tue Feb 26 15:47:57 2008 @@ -174,7 +174,7 @@ TM = &MF->getTarget(); if (TM) - OS << "%" << TM->getRegisterInfo()->get(getReg()).PrintableName; + OS << "%" << TM->getRegisterInfo()->get(getReg()).Name; else OS << "%mreg" << getReg(); } Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Feb 26 15:47:57 2008 @@ -251,7 +251,7 @@ const TargetRegisterInfo *TRI = TM->getRegisterInfo(); for (const unsigned *ImpUses = I.getDesc().getImplicitUses(); *ImpUses; ++ImpUses) - DOUT << " -> " << TRI->getPrintableName(*ImpUses) << "\n"; + DOUT << " -> " << TRI->getName(*ImpUses) << "\n"; } if (I.getDesc().getImplicitDefs()) { @@ -260,7 +260,7 @@ const TargetRegisterInfo *TRI = TM->getRegisterInfo(); for (const unsigned *ImpDefs = I.getDesc().getImplicitDefs(); *ImpDefs; ++ImpDefs) - DOUT << " -> " << TRI->getPrintableName(*ImpDefs) << "\n"; + DOUT << " -> " << TRI->getName(*ImpDefs) << "\n"; } //if (TII->hasUnmodelledSideEffects(&I)) Modified: llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp Tue Feb 26 15:47:57 2008 @@ -311,7 +311,7 @@ assert(VirtReg && "Spilling a physical register is illegal!" " Must not have appropriate kill for the register or use exists beyond" " the intended one."); - DOUT << " Spilling register " << RegInfo->getPrintableName(PhysReg) + DOUT << " Spilling register " << RegInfo->getName(PhysReg) << " containing %reg" << VirtReg; const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo(); @@ -535,7 +535,7 @@ markVirtRegModified(VirtReg, false); DOUT << " Reloading %reg" << VirtReg << " into " - << RegInfo->getPrintableName(PhysReg) << "\n"; + << RegInfo->getName(PhysReg) << "\n"; // Add move instruction(s) TII->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC); @@ -646,7 +646,7 @@ DOUT << " Regs have values: "; for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i) if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2) - DOUT << "[" << RegInfo->getPrintableName(i) + DOUT << "[" << RegInfo->getName(i) << ",%reg" << PhysRegsUsed[i] << "] "; DOUT << "\n"); @@ -700,14 +700,14 @@ } if (PhysReg) { - DOUT << " Last use of " << RegInfo->getPrintableName(PhysReg) + DOUT << " Last use of " << RegInfo->getName(PhysReg) << "[%reg" << VirtReg <<"], removing it from live set\n"; removePhysReg(PhysReg); for (const unsigned *AliasSet = RegInfo->getSubRegisters(PhysReg); *AliasSet; ++AliasSet) { if (PhysRegsUsed[*AliasSet] != -2) { DOUT << " Last use of " - << RegInfo->getPrintableName(*AliasSet) + << RegInfo->getName(*AliasSet) << "[%reg" << VirtReg <<"], removing it from live set\n"; removePhysReg(*AliasSet); } @@ -806,14 +806,14 @@ } if (PhysReg) { - DOUT << " Register " << RegInfo->getPrintableName(PhysReg) + DOUT << " Register " << RegInfo->getName(PhysReg) << " [%reg" << VirtReg << "] is never used, removing it frame live list\n"; removePhysReg(PhysReg); for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg); *AliasSet; ++AliasSet) { if (PhysRegsUsed[*AliasSet] != -2) { - DOUT << " Register " << RegInfo->getPrintableName(*AliasSet) + DOUT << " Register " << RegInfo->getName(*AliasSet) << " [%reg" << *AliasSet << "] is never used, removing it frame live list\n"; removePhysReg(*AliasSet); Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Tue Feb 26 15:47:57 2008 @@ -164,7 +164,7 @@ if (TargetRegisterInfo::isVirtualRegister(reg)) { reg = vrm_->getPhys(reg); } - DOUT << tri_->getPrintableName(reg) << '\n'; + DOUT << tri_->getName(reg) << '\n'; } } }; @@ -239,7 +239,7 @@ // Try to coalesce. if (!li_->conflictsWithPhysRegDef(cur, *vrm_, SrcReg)) { - DOUT << "Coalescing: " << cur << " -> " << tri_->getPrintableName(SrcReg) + DOUT << "Coalescing: " << cur << " -> " << tri_->getName(SrcReg) << '\n'; vrm_->clearVirt(cur.reg); vrm_->assignVirt2Phys(cur.reg, SrcReg); @@ -628,7 +628,7 @@ // the free physical register and add this interval to the active // list. if (physReg) { - DOUT << tri_->getPrintableName(physReg) << '\n'; + DOUT << tri_->getName(physReg) << '\n'; vrm_->assignVirt2Phys(cur->reg, physReg); prt_->addRegUse(physReg); active_.push_back(std::make_pair(cur, cur->begin())); @@ -690,7 +690,7 @@ } DOUT << "\t\tregister with min weight: " - << tri_->getPrintableName(minReg) << " (" << minWeight << ")\n"; + << tri_->getName(minReg) << " (" << minWeight << ")\n"; // if the current has the minimum weight, we need to spill it and // add any added intervals back to unhandled, and restart @@ -869,11 +869,11 @@ if (cur->preference) { if (prt_->isRegAvail(cur->preference)) { DOUT << "\t\tassigned the preferred register: " - << tri_->getPrintableName(cur->preference) << "\n"; + << tri_->getName(cur->preference) << "\n"; return cur->preference; } else DOUT << "\t\tunable to assign the preferred register: " - << tri_->getPrintableName(cur->preference) << "\n"; + << tri_->getName(cur->preference) << "\n"; } // Scan for the first available register. Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Tue Feb 26 15:47:57 2008 @@ -286,7 +286,7 @@ assert(VirtReg && "Spilling a physical register is illegal!" " Must not have appropriate kill for the register or use exists beyond" " the intended one."); - DOUT << " Spilling register " << TRI->getPrintableName(PhysReg) + DOUT << " Spilling register " << TRI->getName(PhysReg) << " containing %reg" << VirtReg; const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo(); @@ -502,7 +502,7 @@ markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded DOUT << " Reloading %reg" << VirtReg << " into " - << TRI->getPrintableName(PhysReg) << "\n"; + << TRI->getName(PhysReg) << "\n"; // Add move instruction(s) const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo(); @@ -575,7 +575,7 @@ DOUT << " Regs have values: "; for (unsigned i = 0; i != TRI->getNumRegs(); ++i) if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2) - DOUT << "[" << TRI->getPrintableName(i) + DOUT << "[" << TRI->getName(i) << ",%reg" << PhysRegsUsed[i] << "] "; DOUT << "\n"); @@ -637,14 +637,14 @@ } if (PhysReg) { - DOUT << " Last use of " << TRI->getPrintableName(PhysReg) + DOUT << " Last use of " << TRI->getName(PhysReg) << "[%reg" << VirtReg <<"], removing it from live set\n"; removePhysReg(PhysReg); for (const unsigned *AliasSet = TRI->getSubRegisters(PhysReg); *AliasSet; ++AliasSet) { if (PhysRegsUsed[*AliasSet] != -2) { DOUT << " Last use of " - << TRI->getPrintableName(*AliasSet) + << TRI->getName(*AliasSet) << "[%reg" << VirtReg <<"], removing it from live set\n"; removePhysReg(*AliasSet); } @@ -728,7 +728,7 @@ MF->getRegInfo().setPhysRegUsed(DestPhysReg); markVirtRegModified(DestVirtReg); getVirtRegLastUse(DestVirtReg) = std::make_pair((MachineInstr*)0, 0); - DOUT << " Assigning " << TRI->getPrintableName(DestPhysReg) + DOUT << " Assigning " << TRI->getName(DestPhysReg) << " to %reg" << DestVirtReg << "\n"; MI->getOperand(i).setReg(DestPhysReg); // Assign the output register } @@ -751,14 +751,14 @@ } if (PhysReg) { - DOUT << " Register " << TRI->getPrintableName(PhysReg) + DOUT << " Register " << TRI->getName(PhysReg) << " [%reg" << VirtReg << "] is never used, removing it frame live list\n"; removePhysReg(PhysReg); for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg); *AliasSet; ++AliasSet) { if (PhysRegsUsed[*AliasSet] != -2) { - DOUT << " Register " << TRI->getPrintableName(*AliasSet) + DOUT << " Register " << TRI->getName(*AliasSet) << " [%reg" << *AliasSet << "] is never used, removing it frame live list\n"; removePhysReg(*AliasSet); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Feb 26 15:47:57 2008 @@ -4181,8 +4181,7 @@ } else if (const RegisterSDNode *R = dyn_cast(this)) { if (G && R->getReg() && TargetRegisterInfo::isPhysicalRegister(R->getReg())) { - cerr << " " - << G->getTarget().getRegisterInfo()->getPrintableName(R->getReg()); + cerr << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); } else { cerr << " #" << R->getReg(); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp Tue Feb 26 15:47:57 2008 @@ -134,7 +134,7 @@ if (G && R->getReg() != 0 && TargetRegisterInfo::isPhysicalRegister(R->getReg())) { Op = Op + " " + - G->getTarget().getRegisterInfo()->getPrintableName(R->getReg()); + G->getTarget().getRegisterInfo()->getName(R->getReg()); } else { Op += " #" + utostr(R->getReg()); } Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Tue Feb 26 15:47:57 2008 @@ -1537,7 +1537,7 @@ void SimpleRegisterCoalescing::printRegName(unsigned reg) const { if (TargetRegisterInfo::isPhysicalRegister(reg)) - cerr << tri_->getPrintableName(reg); + cerr << tri_->getName(reg); else cerr << "%reg" << reg; } Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Tue Feb 26 15:47:57 2008 @@ -141,7 +141,7 @@ for (unsigned i = TargetRegisterInfo::FirstVirtualRegister, e = MF.getRegInfo().getLastVirtReg(); i <= e; ++i) { if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG) - OS << "[reg" << i << " -> " << TRI->getPrintableName(Virt2PhysMap[i]) + OS << "[reg" << i << " -> " << TRI->getName(Virt2PhysMap[i]) << "]\n"; } @@ -351,7 +351,7 @@ DOUT << "Remembering RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1; else DOUT << "Remembering SS#" << SlotOrReMat; - DOUT << " in physreg " << TRI->getPrintableName(Reg) << "\n"; + DOUT << " in physreg " << TRI->getName(Reg) << "\n"; } /// canClobberPhysReg - Return true if the spiller is allowed to change the @@ -392,7 +392,7 @@ assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg && "Bidirectional map mismatch!"); SpillSlotsOrReMatsAvailable[SlotOrReMat] &= ~1; - DOUT << "PhysReg " << TRI->getPrintableName(PhysReg) + DOUT << "PhysReg " << TRI->getName(PhysReg) << " copied, it is available for use but can no longer be modified\n"; } } @@ -417,7 +417,7 @@ assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg && "Bidirectional map mismatch!"); SpillSlotsOrReMatsAvailable.erase(SlotOrReMat); - DOUT << "PhysReg " << TRI->getPrintableName(PhysReg) + DOUT << "PhysReg " << TRI->getName(PhysReg) << " clobbered, invalidating "; if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT) DOUT << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 << "\n"; @@ -1135,9 +1135,9 @@ else DOUT << "Reusing SS#" << ReuseSlot; DOUT << " from physreg " - << TRI->getPrintableName(PhysReg) << " for vreg" + << TRI->getName(PhysReg) << " for vreg" << VirtReg <<" instead of reloading into physreg " - << TRI->getPrintableName(VRM.getPhys(VirtReg)) << "\n"; + << TRI->getName(VRM.getPhys(VirtReg)) << "\n"; unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg; MI.getOperand(i).setReg(RReg); @@ -1208,7 +1208,7 @@ DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1; else DOUT << "Reusing SS#" << ReuseSlot; - DOUT << " from physreg " << TRI->getPrintableName(PhysReg) + DOUT << " from physreg " << TRI->getName(PhysReg) << " for vreg" << VirtReg << " instead of reloading into same physreg.\n"; unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg; Modified: llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp Tue Feb 26 15:47:57 2008 @@ -334,6 +334,6 @@ std::string AlphaRegisterInfo::getPrettyName(unsigned reg) { - std::string s(RegisterDescriptors[reg].PrintableName); + std::string s(RegisterDescriptors[reg].Name); return s; } Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td Tue Feb 26 15:47:57 2008 @@ -25,7 +25,7 @@ class GP8 : PPCReg { field bits<5> Num = SubReg.Num; let SubRegs = [SubReg]; - let PrintableName = n; + let Name = n; } // SPR - One of the 32-bit special-purpose registers Modified: llvm/trunk/lib/Target/Target.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Target.td?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/lib/Target/Target.td (original) +++ llvm/trunk/lib/Target/Target.td Tue Feb 26 15:47:57 2008 @@ -26,7 +26,7 @@ class Register { string Namespace = ""; string AsmName = n; - string PrintableName = n; + string Name = n; // SpillSize - If this value is set to a non-zero value, it is the size in // bits of the spill slot required to hold this register. If this value is Modified: llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp?rev=47629&r1=47628&r2=47629&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp Tue Feb 26 15:47:57 2008 @@ -525,12 +525,12 @@ else OS << Reg.getName(); OS << "\",\t\""; - if (!Reg.TheDef->getValueAsString("PrintableName").empty()) { - OS << Reg.TheDef->getValueAsString("PrintableName"); + if (!Reg.TheDef->getValueAsString("Name").empty()) { + OS << Reg.TheDef->getValueAsString("Name"); } else { // Default to "name". - if (!Reg.TheDef->getValueAsString("Name").empty()) - OS << Reg.TheDef->getValueAsString("Name"); + if (!Reg.TheDef->getValueAsString("AsmName").empty()) + OS << Reg.TheDef->getValueAsString("AsmName"); else OS << Reg.getName(); } From isanbard at gmail.com Tue Feb 26 16:01:14 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 26 Feb 2008 14:01:14 -0800 Subject: [llvm-commits] [llvm] r47625 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ l Message-ID: <16e5fdf90802261401t5574d980qd2c7ed0fd8af1dea@mail.gmail.com> On Tue, Feb 26, 2008 at 1:34 PM, Evan Cheng wrote: > Is getPrintableName() going to be eliminated? > Already done! :-) -bw From sabre at nondot.org Tue Feb 26 16:08:41 2008 From: sabre at nondot.org (Chris Lattner) Date: Tue, 26 Feb 2008 22:08:41 -0000 Subject: [llvm-commits] [llvm] r47631 - /llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Message-ID: <200802262208.m1QM8fa5019949@zion.cs.uiuc.edu> Author: lattner Date: Tue Feb 26 16:08:41 2008 New Revision: 47631 URL: http://llvm.org/viewvc/llvm-project?rev=47631&view=rev Log: Use a smallvector for inactiveCounts and initialize it lazily instead of init'ing it maximally to zeros on entry. getFreePhysReg is pretty hot and only a few elements are typically used. This speeds up linscan by 5% on 176.gcc. Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=47631&r1=47630&r2=47631&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Tue Feb 26 16:08:41 2008 @@ -839,7 +839,7 @@ /// getFreePhysReg - return a free physical register for this virtual register /// interval if we have one, otherwise return 0. unsigned RALinScan::getFreePhysReg(LiveInterval *cur) { - std::vector inactiveCounts(tri_->getNumRegs(), 0); + SmallVector inactiveCounts; unsigned MaxInactiveCount = 0; const TargetRegisterClass *RC = reginfo_->getRegClass(cur->reg); @@ -856,6 +856,8 @@ const TargetRegisterClass *RegRC = reginfo_->getRegClass(reg); if (RelatedRegClasses.getLeaderValue(RegRC) == RCLeader) { reg = vrm_->getPhys(reg); + if (inactiveCounts.size() <= reg) + inactiveCounts.resize(reg+1); ++inactiveCounts[reg]; MaxInactiveCount = std::max(MaxInactiveCount, inactiveCounts[reg]); } @@ -882,10 +884,13 @@ for (; I != E; ++I) if (prt_->isRegAvail(*I)) { FreeReg = *I; - FreeRegInactiveCount = inactiveCounts[FreeReg]; + if (FreeReg < inactiveCounts.size()) + FreeRegInactiveCount = inactiveCounts[FreeReg]; + else + FreeRegInactiveCount = 0; break; } - + // If there are no free regs, or if this reg has the max inactive count, // return this register. if (FreeReg == 0 || FreeRegInactiveCount == MaxInactiveCount) return FreeReg; @@ -896,7 +901,8 @@ // reevaluated now. for (; I != E; ++I) { unsigned Reg = *I; - if (prt_->isRegAvail(Reg) && FreeRegInactiveCount < inactiveCounts[Reg]) { + if (prt_->isRegAvail(Reg) && Reg < inactiveCounts.size() && + FreeRegInactiveCount < inactiveCounts[Reg]) { FreeReg = Reg; FreeRegInactiveCount = inactiveCounts[Reg]; if (FreeRegInactiveCount == MaxInactiveCount) From criswell at uiuc.edu Tue Feb 26 16:10:06 2008 From: criswell at uiuc.edu (John Criswell) Date: Tue, 26 Feb 2008 22:10:06 -0000 Subject: [llvm-commits] [poolalloc] r47632 - /poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Message-ID: <200802262210.m1QMA6bW020030@zion.cs.uiuc.edu> Author: criswell Date: Tue Feb 26 16:10:06 2008 New Revision: 47632 URL: http://llvm.org/viewvc/llvm-project?rev=47632&view=rev Log: Include ParamAttrsList.h to get the necessary class definitions for copying class attributes correctly to cloned functions. Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp?rev=47632&r1=47631&r2=47632&view=diff ============================================================================== --- poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp (original) +++ poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Tue Feb 26 16:10:06 2008 @@ -24,6 +24,7 @@ #include "llvm/Instructions.h" #include "llvm/Module.h" #include "llvm/Constants.h" +#include "llvm/ParamAttrsList.h" #include "llvm/ParameterAttributes.h" #include "llvm/Support/CFG.h" #include "llvm/Target/TargetData.h" From dpatel at apple.com Tue Feb 26 16:12:58 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 22:12:58 -0000 Subject: [llvm-commits] [llvm] r47633 - in /llvm/trunk: include/llvm/Instructions.h lib/AsmParser/llvmAsmParser.y lib/VMCore/Instructions.cpp Message-ID: <200802262212.m1QMCw5J020160@zion.cs.uiuc.edu> Author: dpatel Date: Tue Feb 26 16:12:58 2008 New Revision: 47633 URL: http://llvm.org/viewvc/llvm-project?rev=47633&view=rev Log: Remove unncessary ReturnInst constructors. Modified: llvm/trunk/include/llvm/Instructions.h llvm/trunk/lib/AsmParser/llvmAsmParser.y llvm/trunk/lib/VMCore/Instructions.cpp Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=47633&r1=47632&r2=47633&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Tue Feb 26 16:12:58 2008 @@ -1397,9 +1397,6 @@ // if it was passed NULL. explicit ReturnInst(Value *retVal = 0, Instruction *InsertBefore = 0); ReturnInst(Value *retVal, BasicBlock *InsertAtEnd); - ReturnInst(const std::vector &retVals); - ReturnInst(const std::vector &retVals, Instruction *InsertBefore); - ReturnInst(const std::vector &retVals, BasicBlock *InsertAtEnd); ReturnInst(Value * const* retVals, unsigned N); ReturnInst(Value * const* retVals, unsigned N, Instruction *InsertBefore); ReturnInst(Value * const* retVals, unsigned N, BasicBlock *InsertAtEnd); Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y?rev=47633&r1=47632&r2=47633&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.y (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y Tue Feb 26 16:12:58 2008 @@ -2580,7 +2580,9 @@ BBTerminatorInst : RET ReturnedVal { // Return with a result... - $$ = new ReturnInst(*$2); + ValueList &VL = *$2; + if (!VL.empty()) + $$ = new ReturnInst(&VL[0], VL.size()); delete $2; CHECK_FOR_ERROR } Modified: llvm/trunk/lib/VMCore/Instructions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=47633&r1=47632&r2=47633&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instructions.cpp (original) +++ llvm/trunk/lib/VMCore/Instructions.cpp Tue Feb 26 16:12:58 2008 @@ -598,26 +598,6 @@ : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, 0, InsertAtEnd) { } -ReturnInst::ReturnInst(const std::vector &retVals, - Instruction *InsertBefore) - : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, retVals.size(), - InsertBefore) { - if (!retVals.empty()) - init(&retVals[0], retVals.size()); -} -ReturnInst::ReturnInst(const std::vector &retVals, - BasicBlock *InsertAtEnd) - : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, retVals.size(), - InsertAtEnd) { - if (!retVals.empty()) - init(&retVals[0], retVals.size()); -} -ReturnInst::ReturnInst(const std::vector &retVals) - : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, retVals.size()) { - if (!retVals.empty()) - init(&retVals[0], retVals.size()); -} - ReturnInst::ReturnInst(Value * const* retVals, unsigned N, Instruction *InsertBefore) : TerminatorInst(Type::VoidTy, Instruction::Ret, &RetVal, N, InsertBefore) { From dalej at apple.com Tue Feb 26 16:15:37 2008 From: dalej at apple.com (Dale Johannesen) Date: Tue, 26 Feb 2008 14:15:37 -0800 Subject: [llvm-commits] [poolalloc] r47632 - /poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp In-Reply-To: <200802262210.m1QMA6bW020030@zion.cs.uiuc.edu> References: <200802262210.m1QMA6bW020030@zion.cs.uiuc.edu> Message-ID: <8988E7E1-BE04-47A5-82CC-3332E224CA95@apple.com> On Feb 26, 2008, at 2:10 PM, John Criswell wrote: > > #include "llvm/Constants.h" > +#include "llvm/ParamAttrsList.h" > #include "llvm/ParameterAttributes.h" > #include "llvm/Support/CFG.h" You can remove ParameterAttributes if you do that. From dpatel at apple.com Tue Feb 26 16:17:48 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 22:17:48 -0000 Subject: [llvm-commits] [llvm] r47634 - in /llvm/trunk/lib/AsmParser: llvmAsmParser.cpp.cvs llvmAsmParser.h.cvs llvmAsmParser.y.cvs Message-ID: <200802262217.m1QMHmUg020409@zion.cs.uiuc.edu> Author: dpatel Date: Tue Feb 26 16:17:48 2008 New Revision: 47634 URL: http://llvm.org/viewvc/llvm-project?rev=47634&view=rev Log: regenerate Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs?rev=47634&r1=47633&r2=47634&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs Tue Feb 26 16:17:48 2008 @@ -378,7 +378,7 @@ /* Copy the first part of user declarations. */ -#line 14 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 14 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" #include "ParserInternals.h" #include "llvm/CallingConv.h" @@ -1338,7 +1338,7 @@ #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED typedef union YYSTYPE -#line 953 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 953 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { llvm::Module *ModuleVal; llvm::Function *FunctionVal; @@ -1855,12 +1855,12 @@ 2250, 2384, 2384, 2386, 2395, 2395, 2397, 2402, 2414, 2418, 2423, 2427, 2431, 2435, 2439, 2443, 2447, 2451, 2455, 2480, 2484, 2494, 2498, 2502, 2507, 2514, 2514, 2520, 2529, 2534, - 2539, 2543, 2552, 2561, 2570, 2574, 2582, 2587, 2591, 2596, - 2606, 2625, 2634, 2725, 2729, 2736, 2747, 2760, 2770, 2781, - 2791, 2802, 2810, 2820, 2827, 2830, 2831, 2838, 2842, 2847, - 2863, 2880, 2894, 2908, 2920, 2928, 2935, 2941, 2947, 2953, - 2968, 3066, 3071, 3075, 3082, 3089, 3097, 3104, 3112, 3120, - 3134, 3151, 3159 + 2539, 2543, 2552, 2561, 2570, 2574, 2582, 2589, 2593, 2598, + 2608, 2627, 2636, 2727, 2731, 2738, 2749, 2762, 2772, 2783, + 2793, 2804, 2812, 2822, 2829, 2832, 2833, 2840, 2844, 2849, + 2865, 2882, 2896, 2910, 2922, 2930, 2937, 2943, 2949, 2955, + 2970, 3068, 3073, 3077, 3084, 3091, 3099, 3106, 3114, 3122, + 3136, 3153, 3161 }; #endif @@ -3474,152 +3474,152 @@ switch (yyn) { case 29: -#line 1121 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1121 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_EQ; ;} break; case 30: -#line 1121 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1121 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_NE; ;} break; case 31: -#line 1122 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1122 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_SLT; ;} break; case 32: -#line 1122 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1122 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_SGT; ;} break; case 33: -#line 1123 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1123 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_SLE; ;} break; case 34: -#line 1123 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1123 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_SGE; ;} break; case 35: -#line 1124 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1124 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_ULT; ;} break; case 36: -#line 1124 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1124 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_UGT; ;} break; case 37: -#line 1125 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1125 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_ULE; ;} break; case 38: -#line 1125 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1125 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_UGE; ;} break; case 39: -#line 1129 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1129 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_OEQ; ;} break; case 40: -#line 1129 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1129 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_ONE; ;} break; case 41: -#line 1130 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1130 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_OLT; ;} break; case 42: -#line 1130 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1130 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_OGT; ;} break; case 43: -#line 1131 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1131 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_OLE; ;} break; case 44: -#line 1131 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1131 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_OGE; ;} break; case 45: -#line 1132 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1132 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_ORD; ;} break; case 46: -#line 1132 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1132 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_UNO; ;} break; case 47: -#line 1133 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1133 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_UEQ; ;} break; case 48: -#line 1133 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1133 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_UNE; ;} break; case 49: -#line 1134 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1134 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_ULT; ;} break; case 50: -#line 1134 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1134 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_UGT; ;} break; case 51: -#line 1135 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1135 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_ULE; ;} break; case 52: -#line 1135 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1135 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_UGE; ;} break; case 53: -#line 1136 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1136 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_TRUE; ;} break; case 54: -#line 1137 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1137 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_FALSE; ;} break; case 65: -#line 1146 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1146 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = 0; ;} break; case 66: -#line 1148 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1148 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal)=(yyvsp[(3) - (4)].UInt64Val); ;} break; case 67: -#line 1149 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1149 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal)=0; ;} break; case 68: -#line 1153 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1153 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = (yyvsp[(1) - (2)].StrVal); CHECK_FOR_ERROR @@ -3627,7 +3627,7 @@ break; case 69: -#line 1157 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1157 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = 0; CHECK_FOR_ERROR @@ -3635,7 +3635,7 @@ break; case 73: -#line 1165 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1165 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = 0; CHECK_FOR_ERROR @@ -3643,7 +3643,7 @@ break; case 74: -#line 1170 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1170 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = (yyvsp[(1) - (2)].StrVal); CHECK_FOR_ERROR @@ -3651,152 +3651,152 @@ break; case 75: -#line 1176 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1176 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::InternalLinkage; ;} break; case 76: -#line 1177 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1177 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::WeakLinkage; ;} break; case 77: -#line 1178 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1178 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;} break; case 78: -#line 1179 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1179 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::AppendingLinkage; ;} break; case 79: -#line 1180 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1180 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;} break; case 80: -#line 1184 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1184 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;} break; case 81: -#line 1185 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1185 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;} break; case 82: -#line 1186 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1186 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} break; case 83: -#line 1190 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1190 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Visibility) = GlobalValue::DefaultVisibility; ;} break; case 84: -#line 1191 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1191 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Visibility) = GlobalValue::DefaultVisibility; ;} break; case 85: -#line 1192 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1192 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Visibility) = GlobalValue::HiddenVisibility; ;} break; case 86: -#line 1193 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1193 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Visibility) = GlobalValue::ProtectedVisibility; ;} break; case 87: -#line 1197 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1197 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} break; case 88: -#line 1198 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1198 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;} break; case 89: -#line 1199 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1199 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;} break; case 90: -#line 1203 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1203 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} break; case 91: -#line 1204 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1204 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::InternalLinkage; ;} break; case 92: -#line 1205 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1205 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;} break; case 93: -#line 1206 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1206 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::WeakLinkage; ;} break; case 94: -#line 1207 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1207 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;} break; case 95: -#line 1211 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1211 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} break; case 96: -#line 1212 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1212 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::WeakLinkage; ;} break; case 97: -#line 1213 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1213 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::InternalLinkage; ;} break; case 98: -#line 1216 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1216 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::C; ;} break; case 99: -#line 1217 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1217 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::C; ;} break; case 100: -#line 1218 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1218 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::Fast; ;} break; case 101: -#line 1219 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1219 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::Cold; ;} break; case 102: -#line 1220 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1220 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::X86_StdCall; ;} break; case 103: -#line 1221 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1221 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::X86_FastCall; ;} break; case 104: -#line 1222 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1222 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if ((unsigned)(yyvsp[(2) - (2)].UInt64Val) != (yyvsp[(2) - (2)].UInt64Val)) GEN_ERROR("Calling conv too large"); @@ -3806,129 +3806,129 @@ break; case 105: -#line 1229 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1229 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ZExt; ;} break; case 106: -#line 1230 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1230 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ZExt; ;} break; case 107: -#line 1231 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1231 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::SExt; ;} break; case 108: -#line 1232 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1232 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::SExt; ;} break; case 109: -#line 1233 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1233 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::InReg; ;} break; case 110: -#line 1234 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1234 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::StructRet; ;} break; case 111: -#line 1235 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1235 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::NoAlias; ;} break; case 112: -#line 1236 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1236 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ByVal; ;} break; case 113: -#line 1237 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1237 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::Nest; ;} break; case 114: -#line 1238 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1238 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::constructAlignmentFromInt((yyvsp[(2) - (2)].UInt64Val)); ;} break; case 115: -#line 1242 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1242 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::None; ;} break; case 116: -#line 1243 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1243 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = (yyvsp[(1) - (2)].ParamAttrs) | (yyvsp[(2) - (2)].ParamAttrs); ;} break; case 117: -#line 1248 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1248 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::NoReturn; ;} break; case 118: -#line 1249 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1249 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::NoUnwind; ;} break; case 119: -#line 1250 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1250 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ZExt; ;} break; case 120: -#line 1251 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1251 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::SExt; ;} break; case 121: -#line 1252 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1252 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ReadNone; ;} break; case 122: -#line 1253 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1253 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ReadOnly; ;} break; case 123: -#line 1256 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1256 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::None; ;} break; case 124: -#line 1257 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1257 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = (yyvsp[(1) - (2)].ParamAttrs) | (yyvsp[(2) - (2)].ParamAttrs); ;} break; case 125: -#line 1262 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1262 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = 0; ;} break; case 126: -#line 1263 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1263 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = (yyvsp[(2) - (2)].StrVal); ;} break; case 127: -#line 1270 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1270 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = 0; ;} break; case 128: -#line 1271 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1271 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = (yyvsp[(2) - (2)].UInt64Val); if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal))) @@ -3938,12 +3938,12 @@ break; case 129: -#line 1277 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1277 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = 0; ;} break; case 130: -#line 1278 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1278 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = (yyvsp[(3) - (3)].UInt64Val); if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal))) @@ -3953,7 +3953,7 @@ break; case 131: -#line 1287 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1287 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { for (unsigned i = 0, e = (yyvsp[(2) - (2)].StrVal)->length(); i != e; ++i) if ((*(yyvsp[(2) - (2)].StrVal))[i] == '"' || (*(yyvsp[(2) - (2)].StrVal))[i] == '\\') @@ -3964,27 +3964,27 @@ break; case 132: -#line 1295 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1295 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = 0; ;} break; case 133: -#line 1296 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1296 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = (yyvsp[(1) - (1)].StrVal); ;} break; case 134: -#line 1301 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1301 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" {;} break; case 135: -#line 1302 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1302 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" {;} break; case 136: -#line 1303 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1303 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV->setSection(*(yyvsp[(1) - (1)].StrVal)); delete (yyvsp[(1) - (1)].StrVal); @@ -3993,7 +3993,7 @@ break; case 137: -#line 1308 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1308 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(2) - (2)].UInt64Val) != 0 && !isPowerOf2_32((yyvsp[(2) - (2)].UInt64Val))) GEN_ERROR("Alignment must be a power of two"); @@ -4003,7 +4003,7 @@ break; case 145: -#line 1324 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1324 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeVal) = new PATypeHolder(OpaqueType::get()); CHECK_FOR_ERROR @@ -4011,7 +4011,7 @@ break; case 146: -#line 1328 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1328 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeVal) = new PATypeHolder((yyvsp[(1) - (1)].PrimType)); CHECK_FOR_ERROR @@ -4019,7 +4019,7 @@ break; case 147: -#line 1332 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1332 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Pointer type? if (*(yyvsp[(1) - (3)].TypeVal) == Type::LabelTy) GEN_ERROR("Cannot form a pointer to a basic block"); @@ -4030,7 +4030,7 @@ break; case 148: -#line 1339 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1339 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Named types are also simple types... const Type* tmp = getTypeVal((yyvsp[(1) - (1)].ValIDVal)); CHECK_FOR_ERROR @@ -4039,7 +4039,7 @@ break; case 149: -#line 1344 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1344 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Type UpReference if ((yyvsp[(2) - (2)].UInt64Val) > (uint64_t)~0U) GEN_ERROR("Value out of range"); OpaqueType *OT = OpaqueType::get(); // Use temporary placeholder @@ -4051,7 +4051,7 @@ break; case 150: -#line 1352 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1352 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Allow but ignore attributes on function types; this permits auto-upgrade. // FIXME: remove in LLVM 3.0. @@ -4085,7 +4085,7 @@ break; case 151: -#line 1382 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1382 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Allow but ignore attributes on function types; this permits auto-upgrade. // FIXME: remove in LLVM 3.0. @@ -4113,7 +4113,7 @@ break; case 152: -#line 1407 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1407 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Sized array type? (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(ArrayType::get(*(yyvsp[(4) - (5)].TypeVal), (unsigned)(yyvsp[(2) - (5)].UInt64Val)))); delete (yyvsp[(4) - (5)].TypeVal); @@ -4122,7 +4122,7 @@ break; case 153: -#line 1412 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1412 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Vector type? const llvm::Type* ElemTy = (yyvsp[(4) - (5)].TypeVal)->get(); if ((unsigned)(yyvsp[(2) - (5)].UInt64Val) != (yyvsp[(2) - (5)].UInt64Val)) @@ -4136,7 +4136,7 @@ break; case 154: -#line 1422 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1422 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Structure type? std::vector Elements; for (std::list::iterator I = (yyvsp[(2) - (3)].TypeList)->begin(), @@ -4150,7 +4150,7 @@ break; case 155: -#line 1432 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1432 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty structure type? (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector())); CHECK_FOR_ERROR @@ -4158,7 +4158,7 @@ break; case 156: -#line 1436 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1436 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { std::vector Elements; for (std::list::iterator I = (yyvsp[(3) - (5)].TypeList)->begin(), @@ -4172,7 +4172,7 @@ break; case 157: -#line 1446 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1446 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty structure type? (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector(), true)); CHECK_FOR_ERROR @@ -4180,7 +4180,7 @@ break; case 158: -#line 1453 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1453 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Allow but ignore attributes on function types; this permits auto-upgrade. // FIXME: remove in LLVM 3.0. @@ -4190,7 +4190,7 @@ break; case 159: -#line 1462 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1462 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (1)].TypeVal))->getDescription()); @@ -4201,14 +4201,14 @@ break; case 160: -#line 1469 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1469 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeVal) = new PATypeHolder(Type::VoidTy); ;} break; case 161: -#line 1474 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1474 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList) = new TypeWithAttrsList(); (yyval.TypeWithAttrsList)->push_back((yyvsp[(1) - (1)].TypeWithAttrs)); @@ -4217,7 +4217,7 @@ break; case 162: -#line 1479 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1479 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.TypeWithAttrsList)=(yyvsp[(1) - (3)].TypeWithAttrsList))->push_back((yyvsp[(3) - (3)].TypeWithAttrs)); CHECK_FOR_ERROR @@ -4225,7 +4225,7 @@ break; case 164: -#line 1487 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1487 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList)=(yyvsp[(1) - (3)].TypeWithAttrsList); TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None; @@ -4236,7 +4236,7 @@ break; case 165: -#line 1494 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1494 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList) = new TypeWithAttrsList; TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None; @@ -4247,7 +4247,7 @@ break; case 166: -#line 1501 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1501 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList) = new TypeWithAttrsList(); CHECK_FOR_ERROR @@ -4255,7 +4255,7 @@ break; case 167: -#line 1509 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1509 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeList) = new std::list(); (yyval.TypeList)->push_back(*(yyvsp[(1) - (1)].TypeVal)); @@ -4265,7 +4265,7 @@ break; case 168: -#line 1515 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1515 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.TypeList)=(yyvsp[(1) - (3)].TypeList))->push_back(*(yyvsp[(3) - (3)].TypeVal)); delete (yyvsp[(3) - (3)].TypeVal); @@ -4274,7 +4274,7 @@ break; case 169: -#line 1527 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1527 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized arr if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (4)].TypeVal))->getDescription()); @@ -4306,7 +4306,7 @@ break; case 170: -#line 1555 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1555 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription()); @@ -4326,7 +4326,7 @@ break; case 171: -#line 1571 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1571 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription()); @@ -4357,7 +4357,7 @@ break; case 172: -#line 1598 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1598 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized arr if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (4)].TypeVal))->getDescription()); @@ -4389,7 +4389,7 @@ break; case 173: -#line 1626 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1626 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { const StructType *STy = dyn_cast((yyvsp[(1) - (4)].TypeVal)->get()); if (STy == 0) @@ -4419,7 +4419,7 @@ break; case 174: -#line 1652 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1652 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription()); @@ -4443,7 +4443,7 @@ break; case 175: -#line 1672 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1672 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { const StructType *STy = dyn_cast((yyvsp[(1) - (6)].TypeVal)->get()); if (STy == 0) @@ -4473,7 +4473,7 @@ break; case 176: -#line 1698 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1698 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (5)].TypeVal))->getDescription()); @@ -4497,7 +4497,7 @@ break; case 177: -#line 1718 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1718 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -4513,7 +4513,7 @@ break; case 178: -#line 1730 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1730 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -4524,7 +4524,7 @@ break; case 179: -#line 1737 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1737 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -4594,7 +4594,7 @@ break; case 180: -#line 1803 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1803 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -4608,7 +4608,7 @@ break; case 181: -#line 1813 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1813 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -4622,7 +4622,7 @@ break; case 182: -#line 1823 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1823 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // integral constants if (!ConstantInt::isValueValidForType((yyvsp[(1) - (2)].PrimType), (yyvsp[(2) - (2)].SInt64Val))) GEN_ERROR("Constant value doesn't fit in type"); @@ -4632,7 +4632,7 @@ break; case 183: -#line 1829 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1829 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // arbitrary precision integer constants uint32_t BitWidth = cast((yyvsp[(1) - (2)].PrimType))->getBitWidth(); if ((yyvsp[(2) - (2)].APIntVal)->getBitWidth() > BitWidth) { @@ -4646,7 +4646,7 @@ break; case 184: -#line 1839 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1839 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // integral constants if (!ConstantInt::isValueValidForType((yyvsp[(1) - (2)].PrimType), (yyvsp[(2) - (2)].UInt64Val))) GEN_ERROR("Constant value doesn't fit in type"); @@ -4656,7 +4656,7 @@ break; case 185: -#line 1845 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1845 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // arbitrary precision integer constants uint32_t BitWidth = cast((yyvsp[(1) - (2)].PrimType))->getBitWidth(); if ((yyvsp[(2) - (2)].APIntVal)->getBitWidth() > BitWidth) { @@ -4670,7 +4670,7 @@ break; case 186: -#line 1855 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1855 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Boolean constants assert(cast((yyvsp[(1) - (2)].PrimType))->getBitWidth() == 1 && "Not Bool?"); (yyval.ConstVal) = ConstantInt::getTrue(); @@ -4679,7 +4679,7 @@ break; case 187: -#line 1860 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1860 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Boolean constants assert(cast((yyvsp[(1) - (2)].PrimType))->getBitWidth() == 1 && "Not Bool?"); (yyval.ConstVal) = ConstantInt::getFalse(); @@ -4688,7 +4688,7 @@ break; case 188: -#line 1865 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1865 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Floating point constants if (!ConstantFP::isValueValidForType((yyvsp[(1) - (2)].PrimType), *(yyvsp[(2) - (2)].FPVal))) GEN_ERROR("Floating point constant invalid for type"); @@ -4703,7 +4703,7 @@ break; case 189: -#line 1878 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1878 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(5) - (6)].TypeVal))->getDescription()); @@ -4719,7 +4719,7 @@ break; case 190: -#line 1890 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1890 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa((yyvsp[(3) - (5)].ConstVal)->getType())) GEN_ERROR("GetElementPtr requires a pointer operand"); @@ -4745,7 +4745,7 @@ break; case 191: -#line 1912 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1912 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(3) - (8)].ConstVal)->getType() != Type::Int1Ty) GEN_ERROR("Select condition must be of boolean type"); @@ -4757,7 +4757,7 @@ break; case 192: -#line 1920 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1920 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(3) - (6)].ConstVal)->getType() != (yyvsp[(5) - (6)].ConstVal)->getType()) GEN_ERROR("Binary operator types must match"); @@ -4767,7 +4767,7 @@ break; case 193: -#line 1926 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1926 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(3) - (6)].ConstVal)->getType() != (yyvsp[(5) - (6)].ConstVal)->getType()) GEN_ERROR("Logical operator types must match"); @@ -4782,7 +4782,7 @@ break; case 194: -#line 1937 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1937 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType()) GEN_ERROR("icmp operand types must match"); @@ -4791,7 +4791,7 @@ break; case 195: -#line 1942 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1942 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType()) GEN_ERROR("fcmp operand types must match"); @@ -4800,7 +4800,7 @@ break; case 196: -#line 1947 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1947 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ExtractElementInst::isValidOperands((yyvsp[(3) - (6)].ConstVal), (yyvsp[(5) - (6)].ConstVal))) GEN_ERROR("Invalid extractelement operands"); @@ -4810,7 +4810,7 @@ break; case 197: -#line 1953 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1953 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!InsertElementInst::isValidOperands((yyvsp[(3) - (8)].ConstVal), (yyvsp[(5) - (8)].ConstVal), (yyvsp[(7) - (8)].ConstVal))) GEN_ERROR("Invalid insertelement operands"); @@ -4820,7 +4820,7 @@ break; case 198: -#line 1959 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1959 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ShuffleVectorInst::isValidOperands((yyvsp[(3) - (8)].ConstVal), (yyvsp[(5) - (8)].ConstVal), (yyvsp[(7) - (8)].ConstVal))) GEN_ERROR("Invalid shufflevector operands"); @@ -4830,7 +4830,7 @@ break; case 199: -#line 1968 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1968 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.ConstVector) = (yyvsp[(1) - (3)].ConstVector))->push_back((yyvsp[(3) - (3)].ConstVal)); CHECK_FOR_ERROR @@ -4838,7 +4838,7 @@ break; case 200: -#line 1972 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1972 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ConstVector) = new std::vector(); (yyval.ConstVector)->push_back((yyvsp[(1) - (1)].ConstVal)); @@ -4847,27 +4847,27 @@ break; case 201: -#line 1980 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1980 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; ;} break; case 202: -#line 1980 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1980 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; ;} break; case 203: -#line 1983 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1983 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; ;} break; case 204: -#line 1983 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1983 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; ;} break; case 205: -#line 1986 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1986 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { const Type* VTy = (yyvsp[(1) - (2)].TypeVal)->get(); Value *V = getVal(VTy, (yyvsp[(2) - (2)].ValIDVal)); @@ -4883,7 +4883,7 @@ break; case 206: -#line 1998 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1998 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { Constant *Val = (yyvsp[(3) - (6)].ConstVal); const Type *DestTy = (yyvsp[(5) - (6)].TypeVal)->get(); @@ -4899,7 +4899,7 @@ break; case 207: -#line 2019 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2019 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule; CurModule.ModuleDone(); @@ -4908,7 +4908,7 @@ break; case 208: -#line 2024 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2024 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule; CurModule.ModuleDone(); @@ -4917,12 +4917,12 @@ break; case 211: -#line 2037 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2037 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.isDeclare = false; ;} break; case 212: -#line 2037 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2037 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.FunctionDone(); CHECK_FOR_ERROR @@ -4930,26 +4930,26 @@ break; case 213: -#line 2041 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2041 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.isDeclare = true; ;} break; case 214: -#line 2041 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2041 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 215: -#line 2044 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2044 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 216: -#line 2047 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2047 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (3)].TypeVal))->getDescription()); @@ -4977,7 +4977,7 @@ break; case 217: -#line 2071 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2071 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { ResolveTypeTo((yyvsp[(1) - (3)].StrVal), (yyvsp[(3) - (3)].PrimType)); @@ -4992,7 +4992,7 @@ break; case 218: -#line 2083 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2083 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { /* "Externally Visible" Linkage */ if ((yyvsp[(5) - (6)].ConstVal) == 0) @@ -5004,14 +5004,14 @@ break; case 219: -#line 2090 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2090 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ;} break; case 220: -#line 2094 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2094 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(6) - (7)].ConstVal) == 0) GEN_ERROR("Global value initializer is not a constant"); @@ -5021,14 +5021,14 @@ break; case 221: -#line 2099 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2099 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ;} break; case 222: -#line 2103 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2103 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(6) - (7)].TypeVal))->getDescription()); @@ -5039,7 +5039,7 @@ break; case 223: -#line 2109 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2109 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; CHECK_FOR_ERROR @@ -5047,7 +5047,7 @@ break; case 224: -#line 2113 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2113 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { std::string Name; if ((yyvsp[(1) - (5)].StrVal)) { @@ -5091,21 +5091,21 @@ break; case 225: -#line 2153 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2153 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 226: -#line 2156 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2156 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 227: -#line 2162 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2162 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { const std::string &AsmSoFar = CurModule.CurrentModule->getModuleInlineAsm(); if (AsmSoFar.empty()) @@ -5118,7 +5118,7 @@ break; case 228: -#line 2172 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2172 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->setTargetTriple(*(yyvsp[(3) - (3)].StrVal)); delete (yyvsp[(3) - (3)].StrVal); @@ -5126,7 +5126,7 @@ break; case 229: -#line 2176 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2176 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->setDataLayout(*(yyvsp[(3) - (3)].StrVal)); delete (yyvsp[(3) - (3)].StrVal); @@ -5134,7 +5134,7 @@ break; case 231: -#line 2183 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2183 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->addLibrary(*(yyvsp[(3) - (3)].StrVal)); delete (yyvsp[(3) - (3)].StrVal); @@ -5143,7 +5143,7 @@ break; case 232: -#line 2188 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2188 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->addLibrary(*(yyvsp[(1) - (1)].StrVal)); delete (yyvsp[(1) - (1)].StrVal); @@ -5152,14 +5152,14 @@ break; case 233: -#line 2193 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2193 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 234: -#line 2202 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2202 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (5)].TypeVal))->getDescription()); @@ -5173,7 +5173,7 @@ break; case 235: -#line 2212 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2212 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription()); @@ -5187,7 +5187,7 @@ break; case 236: -#line 2223 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2223 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = (yyvsp[(1) - (1)].ArgList); CHECK_FOR_ERROR @@ -5195,7 +5195,7 @@ break; case 237: -#line 2227 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2227 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = (yyvsp[(1) - (3)].ArgList); struct ArgListEntry E; @@ -5208,7 +5208,7 @@ break; case 238: -#line 2236 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2236 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = new ArgListType; struct ArgListEntry E; @@ -5221,7 +5221,7 @@ break; case 239: -#line 2245 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2245 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = 0; CHECK_FOR_ERROR @@ -5229,7 +5229,7 @@ break; case 240: -#line 2251 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2251 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { std::string FunctionName(*(yyvsp[(3) - (10)].StrVal)); delete (yyvsp[(3) - (10)].StrVal); // Free strdup'd memory! @@ -5365,7 +5365,7 @@ break; case 243: -#line 2386 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2386 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FunctionVal) = CurFun.CurrentFunction; @@ -5377,7 +5377,7 @@ break; case 246: -#line 2397 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2397 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal); CHECK_FOR_ERROR @@ -5385,7 +5385,7 @@ break; case 247: -#line 2402 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2402 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.CurrentFunction->setLinkage((yyvsp[(1) - (3)].Linkage)); CurFun.CurrentFunction->setVisibility((yyvsp[(2) - (3)].Visibility)); @@ -5396,7 +5396,7 @@ break; case 248: -#line 2414 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2414 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; CHECK_FOR_ERROR @@ -5404,7 +5404,7 @@ break; case 249: -#line 2418 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2418 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; CHECK_FOR_ERROR @@ -5412,7 +5412,7 @@ break; case 250: -#line 2423 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2423 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // A reference to a direct constant (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].SInt64Val)); CHECK_FOR_ERROR @@ -5420,7 +5420,7 @@ break; case 251: -#line 2427 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2427 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].UInt64Val)); CHECK_FOR_ERROR @@ -5428,7 +5428,7 @@ break; case 252: -#line 2431 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2431 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Perhaps it's an FP constant? (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].FPVal)); CHECK_FOR_ERROR @@ -5436,7 +5436,7 @@ break; case 253: -#line 2435 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2435 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create(ConstantInt::getTrue()); CHECK_FOR_ERROR @@ -5444,7 +5444,7 @@ break; case 254: -#line 2439 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2439 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create(ConstantInt::getFalse()); CHECK_FOR_ERROR @@ -5452,7 +5452,7 @@ break; case 255: -#line 2443 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2443 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createNull(); CHECK_FOR_ERROR @@ -5460,7 +5460,7 @@ break; case 256: -#line 2447 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2447 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createUndef(); CHECK_FOR_ERROR @@ -5468,7 +5468,7 @@ break; case 257: -#line 2451 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2451 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // A vector zero constant. (yyval.ValIDVal) = ValID::createZeroInit(); CHECK_FOR_ERROR @@ -5476,7 +5476,7 @@ break; case 258: -#line 2455 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2455 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized packed vector const Type *ETy = (*(yyvsp[(2) - (3)].ConstVector))[0]->getType(); int NumElements = (yyvsp[(2) - (3)].ConstVector)->size(); @@ -5505,7 +5505,7 @@ break; case 259: -#line 2480 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2480 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].ConstVal)); CHECK_FOR_ERROR @@ -5513,7 +5513,7 @@ break; case 260: -#line 2484 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2484 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createInlineAsm(*(yyvsp[(3) - (5)].StrVal), *(yyvsp[(5) - (5)].StrVal), (yyvsp[(2) - (5)].BoolVal)); delete (yyvsp[(3) - (5)].StrVal); @@ -5523,7 +5523,7 @@ break; case 261: -#line 2494 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2494 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it an integer reference...? (yyval.ValIDVal) = ValID::createLocalID((yyvsp[(1) - (1)].UIntVal)); CHECK_FOR_ERROR @@ -5531,7 +5531,7 @@ break; case 262: -#line 2498 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2498 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createGlobalID((yyvsp[(1) - (1)].UIntVal)); CHECK_FOR_ERROR @@ -5539,7 +5539,7 @@ break; case 263: -#line 2502 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2502 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it a named reference...? (yyval.ValIDVal) = ValID::createLocalName(*(yyvsp[(1) - (1)].StrVal)); delete (yyvsp[(1) - (1)].StrVal); @@ -5548,7 +5548,7 @@ break; case 264: -#line 2507 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2507 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it a named reference...? (yyval.ValIDVal) = ValID::createGlobalName(*(yyvsp[(1) - (1)].StrVal)); delete (yyvsp[(1) - (1)].StrVal); @@ -5557,7 +5557,7 @@ break; case 267: -#line 2520 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2520 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -5568,7 +5568,7 @@ break; case 268: -#line 2529 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2529 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValueList) = new std::vector(); (yyval.ValueList)->push_back((yyvsp[(1) - (1)].ValueVal)); @@ -5577,7 +5577,7 @@ break; case 269: -#line 2534 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2534 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.ValueList)=(yyvsp[(1) - (3)].ValueList))->push_back((yyvsp[(3) - (3)].ValueVal)); CHECK_FOR_ERROR @@ -5585,7 +5585,7 @@ break; case 270: -#line 2539 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2539 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal); CHECK_FOR_ERROR @@ -5593,7 +5593,7 @@ break; case 271: -#line 2543 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2543 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Do not allow functions with 0 basic blocks (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal); CHECK_FOR_ERROR @@ -5601,7 +5601,7 @@ break; case 272: -#line 2552 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2552 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { setValueName((yyvsp[(3) - (3)].TermInstVal), (yyvsp[(2) - (3)].StrVal)); CHECK_FOR_ERROR @@ -5613,7 +5613,7 @@ break; case 273: -#line 2561 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2561 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (CastInst *CI1 = dyn_cast((yyvsp[(2) - (2)].InstVal))) if (CastInst *CI2 = dyn_cast(CI1->getOperand(0))) @@ -5626,7 +5626,7 @@ break; case 274: -#line 2570 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2570 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty space between instruction lists (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalID(CurFun.NextValNum)); CHECK_FOR_ERROR @@ -5634,7 +5634,7 @@ break; case 275: -#line 2574 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2574 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Labelled (named) basic block (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalName(*(yyvsp[(1) - (1)].StrVal))); delete (yyvsp[(1) - (1)].StrVal); @@ -5644,16 +5644,18 @@ break; case 276: -#line 2582 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2582 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Return with a result... - (yyval.TermInstVal) = new ReturnInst(*(yyvsp[(2) - (2)].ValueList)); + ValueList &VL = *(yyvsp[(2) - (2)].ValueList); + if (!VL.empty()) + (yyval.TermInstVal) = new ReturnInst(&VL[0], VL.size()); delete (yyvsp[(2) - (2)].ValueList); CHECK_FOR_ERROR ;} break; case 277: -#line 2587 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2589 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Return with no result... (yyval.TermInstVal) = new ReturnInst(); CHECK_FOR_ERROR @@ -5661,7 +5663,7 @@ break; case 278: -#line 2591 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2593 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Unconditional Branch... BasicBlock* tmpBB = getBBVal((yyvsp[(3) - (3)].ValIDVal)); CHECK_FOR_ERROR @@ -5670,7 +5672,7 @@ break; case 279: -#line 2596 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2598 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { assert(cast((yyvsp[(2) - (9)].PrimType))->getBitWidth() == 1 && "Not Bool?"); BasicBlock* tmpBBA = getBBVal((yyvsp[(6) - (9)].ValIDVal)); @@ -5684,7 +5686,7 @@ break; case 280: -#line 2606 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2608 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { Value* tmpVal = getVal((yyvsp[(2) - (9)].PrimType), (yyvsp[(3) - (9)].ValIDVal)); CHECK_FOR_ERROR @@ -5707,7 +5709,7 @@ break; case 281: -#line 2625 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2627 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { Value* tmpVal = getVal((yyvsp[(2) - (8)].PrimType), (yyvsp[(3) - (8)].ValIDVal)); CHECK_FOR_ERROR @@ -5720,7 +5722,7 @@ break; case 282: -#line 2635 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2637 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Handle the short syntax @@ -5814,7 +5816,7 @@ break; case 283: -#line 2725 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2727 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TermInstVal) = new UnwindInst(); CHECK_FOR_ERROR @@ -5822,7 +5824,7 @@ break; case 284: -#line 2729 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2731 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TermInstVal) = new UnreachableInst(); CHECK_FOR_ERROR @@ -5830,7 +5832,7 @@ break; case 285: -#line 2736 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2738 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.JumpTable) = (yyvsp[(1) - (6)].JumpTable); Constant *V = cast(getExistingVal((yyvsp[(2) - (6)].PrimType), (yyvsp[(3) - (6)].ValIDVal))); @@ -5845,7 +5847,7 @@ break; case 286: -#line 2747 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2749 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.JumpTable) = new std::vector >(); Constant *V = cast(getExistingVal((yyvsp[(1) - (5)].PrimType), (yyvsp[(2) - (5)].ValIDVal))); @@ -5861,7 +5863,7 @@ break; case 287: -#line 2760 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2762 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Is this definition named?? if so, assign the name... setValueName((yyvsp[(2) - (2)].InstVal), (yyvsp[(1) - (2)].StrVal)); @@ -5873,7 +5875,7 @@ break; case 288: -#line 2770 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2772 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Used for PHI nodes if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (6)].TypeVal))->getDescription()); @@ -5888,7 +5890,7 @@ break; case 289: -#line 2781 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2783 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.PHIList) = (yyvsp[(1) - (7)].PHIList); Value* tmpVal = getVal((yyvsp[(1) - (7)].PHIList)->front().first->getType(), (yyvsp[(4) - (7)].ValIDVal)); @@ -5900,7 +5902,7 @@ break; case 290: -#line 2791 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2793 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0 if (!UpRefs.empty()) @@ -5915,7 +5917,7 @@ break; case 291: -#line 2802 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2804 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0 // Labels are only valid in ASMs @@ -5927,7 +5929,7 @@ break; case 292: -#line 2810 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2812 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0 if (!UpRefs.empty()) @@ -5941,7 +5943,7 @@ break; case 293: -#line 2820 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2822 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0 (yyval.ParamList) = (yyvsp[(1) - (6)].ParamList); @@ -5952,17 +5954,17 @@ break; case 294: -#line 2827 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2829 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamList) = new ParamList(); ;} break; case 295: -#line 2830 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2832 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValueList) = new std::vector(); ;} break; case 296: -#line 2831 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2833 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValueList) = (yyvsp[(1) - (3)].ValueList); (yyval.ValueList)->push_back((yyvsp[(3) - (3)].ValueVal)); @@ -5971,7 +5973,7 @@ break; case 297: -#line 2838 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2840 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; CHECK_FOR_ERROR @@ -5979,7 +5981,7 @@ break; case 298: -#line 2842 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2844 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; CHECK_FOR_ERROR @@ -5987,7 +5989,7 @@ break; case 299: -#line 2847 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2849 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (5)].TypeVal))->getDescription()); @@ -6007,7 +6009,7 @@ break; case 300: -#line 2863 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2865 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (5)].TypeVal))->getDescription()); @@ -6028,7 +6030,7 @@ break; case 301: -#line 2880 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2882 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription()); @@ -6046,7 +6048,7 @@ break; case 302: -#line 2894 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2896 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription()); @@ -6064,7 +6066,7 @@ break; case 303: -#line 2908 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2910 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(4) - (4)].TypeVal))->getDescription()); @@ -6080,7 +6082,7 @@ break; case 304: -#line 2920 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2922 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(2) - (6)].ValueVal)->getType() != Type::Int1Ty) GEN_ERROR("select condition must be boolean"); @@ -6092,7 +6094,7 @@ break; case 305: -#line 2928 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2930 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(4) - (4)].TypeVal))->getDescription()); @@ -6103,7 +6105,7 @@ break; case 306: -#line 2935 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2937 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ExtractElementInst::isValidOperands((yyvsp[(2) - (4)].ValueVal), (yyvsp[(4) - (4)].ValueVal))) GEN_ERROR("Invalid extractelement operands"); @@ -6113,7 +6115,7 @@ break; case 307: -#line 2941 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2943 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!InsertElementInst::isValidOperands((yyvsp[(2) - (6)].ValueVal), (yyvsp[(4) - (6)].ValueVal), (yyvsp[(6) - (6)].ValueVal))) GEN_ERROR("Invalid insertelement operands"); @@ -6123,7 +6125,7 @@ break; case 308: -#line 2947 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2949 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ShuffleVectorInst::isValidOperands((yyvsp[(2) - (6)].ValueVal), (yyvsp[(4) - (6)].ValueVal), (yyvsp[(6) - (6)].ValueVal))) GEN_ERROR("Invalid shufflevector operands"); @@ -6133,7 +6135,7 @@ break; case 309: -#line 2953 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2955 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { const Type *Ty = (yyvsp[(2) - (2)].PHIList)->front().first->getType(); if (!Ty->isFirstClassType()) @@ -6152,7 +6154,7 @@ break; case 310: -#line 2969 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2971 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { // Handle the short syntax @@ -6253,7 +6255,7 @@ break; case 311: -#line 3066 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3068 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.InstVal) = (yyvsp[(1) - (1)].InstVal); CHECK_FOR_ERROR @@ -6261,7 +6263,7 @@ break; case 312: -#line 3071 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3073 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; CHECK_FOR_ERROR @@ -6269,7 +6271,7 @@ break; case 313: -#line 3075 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3077 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; CHECK_FOR_ERROR @@ -6277,7 +6279,7 @@ break; case 314: -#line 3082 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3084 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (3)].TypeVal))->getDescription()); @@ -6288,7 +6290,7 @@ break; case 315: -#line 3089 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3091 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (6)].TypeVal))->getDescription()); @@ -6300,7 +6302,7 @@ break; case 316: -#line 3097 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3099 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (3)].TypeVal))->getDescription()); @@ -6311,7 +6313,7 @@ break; case 317: -#line 3104 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3106 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (6)].TypeVal))->getDescription()); @@ -6323,7 +6325,7 @@ break; case 318: -#line 3112 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3114 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa((yyvsp[(2) - (2)].ValueVal)->getType())) GEN_ERROR("Trying to free nonpointer type " + @@ -6334,7 +6336,7 @@ break; case 319: -#line 3120 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3122 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (5)].TypeVal))->getDescription()); @@ -6352,7 +6354,7 @@ break; case 320: -#line 3134 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3136 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(5) - (7)].TypeVal))->getDescription()); @@ -6373,7 +6375,7 @@ break; case 321: -#line 3151 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3153 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { Value *TmpVal = getVal((yyvsp[(2) - (5)].TypeVal)->get(), (yyvsp[(3) - (5)].ValIDVal)); if (!GetResultInst::isValidOperands(TmpVal, (yyvsp[(5) - (5)].UInt64Val))) @@ -6385,7 +6387,7 @@ break; case 322: -#line 3159 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3161 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (4)].TypeVal))->getDescription()); @@ -6405,7 +6407,7 @@ /* Line 1267 of yacc.c. */ -#line 6409 "llvmAsmParser.tab.c" +#line 6411 "llvmAsmParser.tab.c" default: break; } YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); @@ -6619,7 +6621,7 @@ } -#line 3176 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3178 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" // common code from the two 'RunVMAsmParser' functions Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs?rev=47634&r1=47633&r2=47634&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs Tue Feb 26 16:17:48 2008 @@ -344,7 +344,7 @@ #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED typedef union YYSTYPE -#line 953 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 953 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" { llvm::Module *ModuleVal; llvm::Function *FunctionVal; Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs?rev=47634&r1=47633&r2=47634&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Tue Feb 26 16:17:48 2008 @@ -2580,7 +2580,9 @@ BBTerminatorInst : RET ReturnedVal { // Return with a result... - $$ = new ReturnInst(*$2); + ValueList &VL = *$2; + if (!VL.empty()) + $$ = new ReturnInst(&VL[0], VL.size()); delete $2; CHECK_FOR_ERROR } From arnold.schwaighofer at gmail.com Tue Feb 26 16:21:54 2008 From: arnold.schwaighofer at gmail.com (Arnold Schwaighofer) Date: Tue, 26 Feb 2008 22:21:54 -0000 Subject: [llvm-commits] [llvm] r47635 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86ISelLowering.h Message-ID: <200802262221.m1QMLsA7020593@zion.cs.uiuc.edu> Author: arnolds Date: Tue Feb 26 16:21:54 2008 New Revision: 47635 URL: http://llvm.org/viewvc/llvm-project?rev=47635&view=rev Log: Refactor according to Evan's and Anton's suggestions. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47635&r1=47634&r2=47635&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Feb 26 16:21:54 2008 @@ -1083,6 +1083,24 @@ return false; } +/// CallRequiresGOTInRegister - Check whether the call requires the GOT pointer +/// in a register before calling. +bool X86TargetLowering::CallRequiresGOTPtrInReg(bool Is64Bit, bool IsTailCall) { + return !IsTailCall && !Is64Bit && + getTargetMachine().getRelocationModel() == Reloc::PIC_ && + Subtarget->isPICStyleGOT(); +} + + +/// CallRequiresFnAddressInReg - Check whether the call requires the function +/// address to be loaded in a register. +bool +X86TargetLowering::CallRequiresFnAddressInReg(bool Is64Bit, bool IsTailCall) { + return !Is64Bit && IsTailCall && + getTargetMachine().getRelocationModel() == Reloc::PIC_ && + Subtarget->isPICStyleGOT(); +} + /// CopyTailCallClobberedArgumentsToVRegs - Create virtual registers for all /// arguments to force loading and guarantee that arguments sourcing from /// incomming parameters are not overwriting each other. @@ -1552,22 +1570,19 @@ // ELF / PIC requires GOT in the EBX register before function calls via PLT // GOT pointer. + if (CallRequiresGOTPtrInReg(Is64Bit, IsTailCall)) { + Chain = DAG.getCopyToReg(Chain, X86::EBX, + DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), + InFlag); + InFlag = Chain.getValue(1); + } // If we are tail calling and generating PIC/GOT style code load the address // of the callee into ecx. The value in ecx is used as target of the tail // jump. This is done to circumvent the ebx/callee-saved problem for tail // calls on PIC/GOT architectures. Normally we would just put the address of // GOT into ebx and then call target at PLT. But for tail callss ebx would be // restored (since ebx is callee saved) before jumping to the target at PLT. - if (!IsTailCall && !Is64Bit && - getTargetMachine().getRelocationModel() == Reloc::PIC_ && - Subtarget->isPICStyleGOT()) { - Chain = DAG.getCopyToReg(Chain, X86::EBX, - DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), - InFlag); - InFlag = Chain.getValue(1); - } else if (!Is64Bit && IsTailCall && - getTargetMachine().getRelocationModel() == Reloc::PIC_ && - Subtarget->isPICStyleGOT() ) { + if (CallRequiresFnAddressInReg(Is64Bit, IsTailCall)) { // Note: The actual moving to ecx is done further down. GlobalAddressSDNode *G = dyn_cast(Callee); if (G && !G->getGlobal()->hasHiddenVisibility() && Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=47635&r1=47634&r2=47635&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Tue Feb 26 16:21:54 2008 @@ -491,6 +491,8 @@ // Call lowering helpers. bool IsCalleePop(SDOperand Op); + bool CallRequiresGOTPtrInReg(bool Is64Bit, bool IsTailCall); + bool CallRequiresFnAddressInReg(bool Is64Bit, bool IsTailCall); CCAssignFn *CCAssignFnForNode(SDOperand Op) const; NameDecorationStyle NameDecorationForFORMAL_ARGUMENTS(SDOperand Op); unsigned GetAlignedArgumentStackSize(unsigned StackSize, SelectionDAG &DAG); From clattner at apple.com Tue Feb 26 16:27:30 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 26 Feb 2008 14:27:30 -0800 Subject: [llvm-commits] [llvm] r47633 - in /llvm/trunk: include/llvm/Instructions.h lib/AsmParser/llvmAsmParser.y lib/VMCore/Instructions.cpp In-Reply-To: <200802262212.m1QMCw5J020160@zion.cs.uiuc.edu> References: <200802262212.m1QMCw5J020160@zion.cs.uiuc.edu> Message-ID: On Feb 26, 2008, at 2:12 PM, Devang Patel wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=47633&view=rev > Log: > Remove unncessary ReturnInst constructors. > BBTerminatorInst : > RET ReturnedVal { // Return with a result... > - $$ = new ReturnInst(*$2); > + ValueList &VL = *$2; > + if (!VL.empty()) > + $$ = new ReturnInst(&VL[0], VL.size()); This needs to create a return for ret void! This could not have passed make check. -Chris From dpatel at apple.com Tue Feb 26 16:34:49 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 14:34:49 -0800 Subject: [llvm-commits] [llvm] r47633 - in /llvm/trunk: include/llvm/Instructions.h lib/AsmParser/llvmAsmParser.y lib/VMCore/Instructions.cpp In-Reply-To: References: <200802262212.m1QMCw5J020160@zion.cs.uiuc.edu> Message-ID: <0B6FCBA2-C2BB-41F0-9854-0356E42294DE@apple.com> On Feb 26, 2008, at 2:27 PM, Chris Lattner wrote: > On Feb 26, 2008, at 2:12 PM, Devang Patel wrote: >> URL: http://llvm.org/viewvc/llvm-project?rev=47633&view=rev >> Log: >> Remove unncessary ReturnInst constructors. >> BBTerminatorInst : >> RET ReturnedVal { // Return with a result... >> - $$ = new ReturnInst(*$2); >> + ValueList &VL = *$2; >> + if (!VL.empty()) >> + $$ = new ReturnInst(&VL[0], VL.size()); > > This needs to create a return for ret void! This could not have > passed make check. we have | RET VOID { // Return with no result... $$ = new ReturnInst(); CHECK_FOR_ERROR } :) - Devang From clattner at apple.com Tue Feb 26 16:38:48 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 26 Feb 2008 14:38:48 -0800 Subject: [llvm-commits] [llvm] r47633 - in /llvm/trunk: include/llvm/Instructions.h lib/AsmParser/llvmAsmParser.y lib/VMCore/Instructions.cpp In-Reply-To: <0B6FCBA2-C2BB-41F0-9854-0356E42294DE@apple.com> References: <200802262212.m1QMCw5J020160@zion.cs.uiuc.edu> <0B6FCBA2-C2BB-41F0-9854-0356E42294DE@apple.com> Message-ID: <166C1B70-6C70-4D9C-965F-825B76DC85DA@apple.com> On Feb 26, 2008, at 2:34 PM, Devang Patel wrote: > > On Feb 26, 2008, at 2:27 PM, Chris Lattner wrote: > >> On Feb 26, 2008, at 2:12 PM, Devang Patel wrote: >>> URL: http://llvm.org/viewvc/llvm-project?rev=47633&view=rev >>> Log: >>> Remove unncessary ReturnInst constructors. >>> BBTerminatorInst : >>> RET ReturnedVal { // Return with a result... >>> - $$ = new ReturnInst(*$2); >>> + ValueList &VL = *$2; >>> + if (!VL.empty()) >>> + $$ = new ReturnInst(&VL[0], VL.size()); >> >> This needs to create a return for ret void! This could not have >> passed make check. > > > we have > > | RET VOID { // Return with no > result... > $$ = new ReturnInst(); > CHECK_FOR_ERROR > } Ahh, so the "if (!VL.empty())" check is dead? Sorry for the alarm! -Chris From dpatel at apple.com Tue Feb 26 16:43:35 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 14:43:35 -0800 Subject: [llvm-commits] [llvm] r47633 - in /llvm/trunk: include/llvm/Instructions.h lib/AsmParser/llvmAsmParser.y lib/VMCore/Instructions.cpp In-Reply-To: <166C1B70-6C70-4D9C-965F-825B76DC85DA@apple.com> References: <200802262212.m1QMCw5J020160@zion.cs.uiuc.edu> <0B6FCBA2-C2BB-41F0-9854-0356E42294DE@apple.com> <166C1B70-6C70-4D9C-965F-825B76DC85DA@apple.com> Message-ID: <20844547-5A2D-4AFC-AB4E-40EF413C2C5F@apple.com> > so the "if (!VL.empty())" check is dead? yes. I'm converting it into an assertion. - Devang From dpatel at apple.com Tue Feb 26 16:55:21 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 22:55:21 -0000 Subject: [llvm-commits] [llvm] r47637 - /llvm/trunk/lib/VMCore/Verifier.cpp Message-ID: <200802262255.m1QMtLm6021731@zion.cs.uiuc.edu> Author: dpatel Date: Tue Feb 26 16:55:21 2008 New Revision: 47637 URL: http://llvm.org/viewvc/llvm-project?rev=47637&view=rev Log: Add assert to check return type. Modified: llvm/trunk/lib/VMCore/Verifier.cpp Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=47637&r1=47636&r2=47637&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Tue Feb 26 16:55:21 2008 @@ -585,13 +585,13 @@ Assert2(F->getReturnType() == RI.getOperand(0)->getType(), "Function return type does not match operand " "type of return inst!", &RI, F->getReturnType()); - else { - const StructType *STy = cast(F->getReturnType()); + else if (const StructType *STy = dyn_cast(F->getReturnType())) { for (unsigned i = 0; i < N; i++) Assert2(STy->getElementType(i) == RI.getOperand(i)->getType(), - "Function return type does not match operand " - "type of return inst!", &RI, F->getReturnType()); - } + "Function return type does not match operand " + "type of return inst!", &RI, F->getReturnType()); + } else + Assert1(0, "Invalid return type!", &RI); // Check to make sure that the return value has necessary properties for // terminators... From resistor at mac.com Tue Feb 26 17:06:18 2008 From: resistor at mac.com (Owen Anderson) Date: Tue, 26 Feb 2008 23:06:18 -0000 Subject: [llvm-commits] [llvm] r47639 - in /llvm/trunk: lib/Transforms/Scalar/GVN.cpp test/Transforms/GVN/2008-02-26-MemCpySize.ll Message-ID: <200802262306.m1QN6ITv022118@zion.cs.uiuc.edu> Author: resistor Date: Tue Feb 26 17:06:17 2008 New Revision: 47639 URL: http://llvm.org/viewvc/llvm-project?rev=47639&view=rev Log: Fix an issue where GVN had the sizes of the two memcpy's reverse, resulting in an invalid transformation. Added: llvm/trunk/test/Transforms/GVN/2008-02-26-MemCpySize.ll Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=47639&r1=47638&r2=47639&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Tue Feb 26 17:06:17 2008 @@ -1188,8 +1188,8 @@ if (!C1 || !C2) return false; - uint64_t CpySize = C1->getValue().getZExtValue(); - uint64_t DepSize = C2->getValue().getZExtValue(); + uint64_t DepSize = C1->getValue().getZExtValue(); + uint64_t CpySize = C2->getValue().getZExtValue(); if (DepSize < CpySize) return false; Added: llvm/trunk/test/Transforms/GVN/2008-02-26-MemCpySize.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2008-02-26-MemCpySize.ll?rev=47639&view=auto ============================================================================== --- llvm/trunk/test/Transforms/GVN/2008-02-26-MemCpySize.ll (added) +++ llvm/trunk/test/Transforms/GVN/2008-02-26-MemCpySize.ll Tue Feb 26 17:06:17 2008 @@ -0,0 +1,45 @@ +; RUN: llvm-as < %s | opt -gvn -dse | llvm-dis | grep {call.*memcpy.*cell} | count 2 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i686-apple-darwin9" + %struct.s = type { [11 x i8], i32 } + at .str = internal constant [11 x i8] c"0123456789\00" ; <[11 x i8]*> [#uses=1] + at cell = weak global %struct.s zeroinitializer ; <%struct.s*> [#uses=2] + +declare i32 @check(%struct.s* byval %p) nounwind + +declare i32 @strcmp(i8*, i8*) nounwind readonly + +define i32 @main() noreturn nounwind { +entry: + %p = alloca %struct.s, align 8 ; <%struct.s*> [#uses=2] + store i32 99, i32* getelementptr (%struct.s* @cell, i32 0, i32 1), align 4 + call void @llvm.memcpy.i32( i8* getelementptr (%struct.s* @cell, i32 0, i32 0, i32 0), i8* getelementptr ([11 x i8]* @.str, i32 0, i32 0), i32 11, i32 1 ) + %tmp = getelementptr %struct.s* %p, i32 0, i32 0, i32 0 ; [#uses=2] + call void @llvm.memcpy.i64( i8* %tmp, i8* getelementptr (%struct.s* @cell, i32 0, i32 0, i32 0), i64 16, i32 8 ) + %tmp1.i = getelementptr %struct.s* %p, i32 0, i32 1 ; [#uses=1] + %tmp2.i = load i32* %tmp1.i, align 4 ; [#uses=1] + %tmp3.i = icmp eq i32 %tmp2.i, 99 ; [#uses=1] + br i1 %tmp3.i, label %bb5.i, label %bb + +bb5.i: ; preds = %entry + %tmp91.i = call i32 @strcmp( i8* %tmp, i8* getelementptr ([11 x i8]* @.str, i32 0, i32 0) ) nounwind readonly ; [#uses=1] + %tmp53 = icmp eq i32 %tmp91.i, 0 ; [#uses=1] + br i1 %tmp53, label %bb7, label %bb + +bb: ; preds = %bb5.i, %entry + call void @abort( ) noreturn nounwind + unreachable + +bb7: ; preds = %bb5.i + call void @exit( i32 0 ) noreturn nounwind + unreachable +} + +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind + +declare void @abort() noreturn nounwind + +declare void @exit(i32) noreturn nounwind + +declare void @llvm.memcpy.i64(i8*, i8*, i64, i32) nounwind From clattner at apple.com Tue Feb 26 17:12:16 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 26 Feb 2008 15:12:16 -0800 Subject: [llvm-commits] [llvm] r47621 - in /llvm/trunk: include/llvm-c/lto.h tools/lto2/ tools/lto2/LTOCodeGenerator.cpp tools/lto2/LTOCodeGenerator.h tools/lto2/LTOModule.cpp tools/lto2/LTOModule.h tools/lto2/Makefile tools/lto2/lto.cpp tools/lto2/lto.exports In-Reply-To: <200802262026.m1QKQjX8016450@zion.cs.uiuc.edu> References: <200802262026.m1QKQjX8016450@zion.cs.uiuc.edu> Message-ID: <277A0820-53A4-4A93-B4A3-B8636BC7E1D7@apple.com> On Feb 26, 2008, at 12:26 PM, Nick Kledzik wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=47621&view=rev > Log: > first commit of new LTO system. It is not hooked up in the llvm/ > tools/Makefile, so no one will build it be default yet Nice! Some details: > +/** > + * Returns the last error string or NULL if last operation was > sucessful. typo "sucessful" > > + > +/** > + * Returns the number of symbols in the object module. > + */ > +extern unsigned int > +lto_module_get_num_symbols(lto_module_t mod); Minor details which you should feel to ignore: the "int" in "unsigned int" is redundant, and the "extern" is also redundant. You could choose to drop those if you care. We tend to not use them in the rest of llvm, but it doesn't really matter either way. > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/tools/lto2/LTOCodeGenerator.cpp (added) > +++ llvm/trunk/tools/lto2/LTOCodeGenerator.cpp Tue Feb 26 14:26:43 > 2008 > > + > +#include "llvm/Module.h" > +#include "llvm/PassManager.h" > +#include "llvm/Linker.h" > +#include "llvm/Constants.h" > +#include "llvm/DerivedTypes.h" > +#include "llvm/ModuleProvider.h" > +#include "llvm/Bitcode/ReaderWriter.h" > +#include "llvm/Support/CommandLine.h" > +#include "llvm/Support/FileUtilities.h" > +#include "llvm/Support/SystemUtils.h" > +#include "llvm/Support/Mangler.h" > +#include "llvm/Support/MemoryBuffer.h" > +#include "llvm/System/Program.h" > +#include "llvm/System/Signals.h" > +#include "llvm/Analysis/Passes.h" > +#include "llvm/Analysis/LoopPass.h" > +#include "llvm/Analysis/Verifier.h" > +#include "llvm/CodeGen/FileWriters.h" > +#include "llvm/Target/SubtargetFeature.h" > +#include "llvm/Target/TargetOptions.h" > +#include "llvm/Target/TargetData.h" > +#include "llvm/Target/TargetMachine.h" > +#include "llvm/Target/TargetMachineRegistry.h" > +#include "llvm/Target/TargetAsmInfo.h" > +#include "llvm/Transforms/IPO.h" > +#include "llvm/Transforms/Scalar.h" > +#include "llvm/Analysis/LoadValueNumbering.h" > +#include "llvm/Support/MathExtras.h" > +#include "llvm/Config/config.h" > + > +#include "LTOModule.h" > +#include "LTOCodeGenerator.h" You should #include LTOCodeGenerator.h first in the list to ensure that it is self contained. Also, please remove any #includes that aren't needed. There is some justification and more info for this here: http://llvm.org/docs/CodingStandards.html#scf_includes > > + > +#include > +#include > +#include > +#include For standard c++ headers like stdlib, please use . Is it possible to avoid unistd.h/fcntl.h with the llvm/System/Path.h or MemoryBuffer.h stuff? MemoryBuffer.h is an efficient way to read an entire file in off the disk. > +void* LTOCodeGenerator::compile(size_t* length, std::string& errMsg) > +{ > + // make unqiue temp .s file to put generated assembly code typo "unqiue", also comments should end with proper punctuation and use capital letters :) > > + > + if ( !asmResult ) { > + // read .o file into memory buffer > + const sys::FileStatus* objStatus; > + objStatus = uniqueObjPath.getFileStatus(false, &errMsg); > + if ( objStatus != NULL ) { > + *length = objStatus->getSize(); > + // use malloc() because caller will own this buffer and > free() it > + buffer = ::malloc(*length); > + if ( buffer != NULL ) { > + int fd = ::open(uniqueObjPath.c_str(), O_RDONLY, 0); > + if ( fd != -1 ) { > + // read object file contents into buffer > + if ( ::read(fd, buffer, *length) != > (ssize_t)*length ) { > + errMsg = "error reading object file"; > + free(buffer); > + buffer = NULL; I don't think this is correct: read can return partial results, however it's best to use MemoryBuffer to avoid having to do this explicitly. > > + } > + close(fd); > + } > + else { > + errMsg = "error opening object file"; > + free(buffer); > + buffer = NULL; > + } > + } > + else { > + errMsg = "error mallocing space for object file"; > + } > + } > + else { > + errMsg = "error stat'ing object file"; > + } I think the code will end up getting simpler with MemoryBuffer, but if that we're going to happen, I'd suggest using early exits to avoid having the code be so nested. This would give you: if (fd == -1) { errMsg = "error opening object file"; return NULL; } for example, but this also requires using RAII to delete the files etc. If you use MemoryBuffer, the code will likely be simple enough that it's not worth doing this. > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/tools/lto2/LTOCodeGenerator.h (added) > +++ llvm/trunk/tools/lto2/LTOCodeGenerator.h Tue Feb 26 14:26:43 2008 > + bool writeMergedModules(const char* path, > std::string& errMsg); This goes over 80 columns. > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/tools/lto2/LTOModule.cpp (added) > +++ llvm/trunk/tools/lto2/LTOModule.cpp Tue Feb 26 14:26:43 2008 > @@ -0,0 +1,329 @@ > +//===-LTOModule.cpp - LLVM Link Time Optimizer > ----------------------------===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open > Source > +// License. See LICENSE.TXT for details. > +// > +// > = > = > = > ----------------------------------------------------------------------= > ==// > +// > +// This file implements the Link Time Optimization library. This > library is > +// intended to be used by linker to optimize code at link time. > +// > +// > = > = > = > ----------------------------------------------------------------------= > ==// > + > +#include "llvm/Module.h" > +#include "llvm/PassManager.h" > +#include "llvm/Linker.h" > +#include "llvm/Constants.h" > +#include "llvm/DerivedTypes.h" > +#include "llvm/ModuleProvider.h" > +#include "llvm/Bitcode/ReaderWriter.h" > +#include "llvm/Support/CommandLine.h" > +#include "llvm/Support/FileUtilities.h" > +#include "llvm/Support/SystemUtils.h" > +#include "llvm/Support/Mangler.h" > +#include "llvm/Support/MemoryBuffer.h" > +#include "llvm/System/Program.h" > +#include "llvm/System/Path.h" > +#include "llvm/System/Signals.h" > +#include "llvm/Target/SubtargetFeature.h" > +#include "llvm/Target/TargetOptions.h" > +#include "llvm/Target/TargetData.h" > +#include "llvm/Target/TargetMachine.h" > +#include "llvm/Target/TargetMachineRegistry.h" > +#include "llvm/Target/TargetAsmInfo.h" > +#include "llvm/Transforms/IPO.h" > +#include "llvm/Transforms/Scalar.h" > +#include "llvm/Analysis/LoadValueNumbering.h" > +#include "llvm/Support/MathExtras.h" > + > +#include "LTOModule.h" As before, pruning this down would be good if possible. Please move LTOModule.h to the top of the list. > +bool LTOModule::isBitcodeFileForTarget(const void* mem, > + size_t length, const char* > triplePrefix) > +{ > + bool result = false; > + MemoryBuffer* buffer; > + buffer = MemoryBuffer::getMemBuffer((char*)mem, (char*)mem > +length); > + if ( buffer != NULL ) { > + ModuleProvider* mp = getBitcodeModuleProvider(buffer); > + if ( mp != NULL ) { > + std::string actualTarget = mp->getModule()- > >getTargetTriple(); > + if ( strncmp(actualTarget.c_str(), triplePrefix, > + strlen(triplePrefix)) == 0) { > + result = true; > + } > + // mp destructor will delete buffer > + delete mp; > + } > + else { > + // if getBitcodeModuleProvider failed, we need to > delete buffer > + delete buffer; > + } > + } > + return result; > +} Please use RAII and early exits to simplify the code. A useful thing for this is llvm/ADT/OwningPtr.h. You should be able to do something like this: OwningPtr buffer = MemoryBuffer::getMemBuffer... if (buffer == 0) return 0; OwningPtr mp = getBitcodeModuleProvider(buffer); if (mp == 0) return 0; ... This makes all the error cases be early exits and makes the success case easier to understand. Also, no nesting! There are other methods that can use similar treatment. > +LTOModule::~LTOModule() > +{ > + delete _module; > + if ( _target != NULL ) > + delete _target; > +} delete accepts a null pointer, so you can just make the second delete unconditional. It might also make sense to make the "_module" and "_target" members of LTOModule be OwningPointers, which would mean you don't have to write the dtor manually. > +LTOModule* LTOModule::makeLTOModule(const char* path, std::string& > errMsg) > +{ > +LTOModule* LTOModule::makeLTOModule(const void* mem, size_t length, > + > std::string& errMsg) > +{ These two methods share all the target matching code. Please pull it out into a shared helper method (that takes a MemoryBuffer) or something. > +void LTOModule::addDefinedSymbol(GlobalValue* def, Mangler &mangler, > + bool isFunction) > +{ > + const char* symbolName > = ::strdup(mangler.getValueName(def).c_str()); > + > + // set alignment part log2() can have rounding errors > + uint32_t align = def->getAlignment(); > + uint32_t attr = align ? __builtin_ctz(def->getAlignment()) : 0; Please don't use __builtin_ctz(), use a helper from llvm/Support/ MathExtras.h. > + // set definition part > + if ( def->hasWeakLinkage() || def->hasLinkOnceLinkage() ) { > + // lvm bitcode does not differenciate between weak def data > + // and tentative definitions! > + // HACK HACK HACK > + // C++ does not use tentative definitions, but does use > weak symbols > + // so guess that anything that looks like a C++ symbol is > weak and others > + // are tentative definitions Wow, that is a hack. :) We should really fix this at the LLVM IR level, can you please file a radar that demonstrates how not distinguishing between these two cases cause a problem? > +uint32_t LTOModule::getSymbolCount() > +{ > + if ( !_symbolsParsed ) { > + _symbolsParsed = true; > + > + // Use mangler to add GlobalPrefix to names to match linker > names. > + Mangler mangler(*_module, _target->getTargetAsmInfo()- > >getGlobalPrefix()); There is one other aspect of configuration for the mangler: On darwin at least you have to call manger.setUseQuotes(true); This tells it that it is ok to make some symbols use double quotes (e.g. those with a space in them like objc methods) instead of mangling the space. I don't know if we can currently get this from TargetAsmInfo.h, but I think we should be able to. Dale or Evan can help with this part. > > + > + // add functions > + for (Module::iterator f = _module->begin(); f != _module- > >end(); ++f) { > + if ( f->isDeclaration() ) { > + addUndefinedSymbol(mangler.getValueName(f).c_str()); > + } > + else { To reduce nesting, I'd suggest writing this as: > + for (Module::iterator f = _module->begin(); f != _module- > >end(); ++f) { > + if ( f->isDeclaration() ) { > + addUndefinedSymbol(mangler.getValueName(f).c_str()); continue; > > + } which unnests the 'else' part. > > + addDefinedSymbol(f, mangler, true); > + // add external symbols referenced by this function. > + for (Function::iterator b = f->begin(); b != f- > >end(); ++b) { > + for (BasicBlock::iterator i = b->begin(); > + i != b- > >end(); ++i) { > + for (unsigned count = 0, total = i- > >getNumOperands(); > + count != total; > ++count) { > + findExternalRefs(i->getOperand(count), > mangler); > + } > + } > + } I'd suggest splitting this triply nested loop out into its own helper function. > > + } > + } > + > + // add data > + for (Module::global_iterator v = _module->global_begin(), > + e = _module->global_end(); v ! > = e; ++v) { > + if ( v->isDeclaration() ) { > + addUndefinedSymbol(mangler.getValueName(v).c_str()); > + } This can also use continue to reduce nesting. > > + // make symbols for all undefines > + for (StringSet::iterator it=_undefines.begin(); > + it != > _undefines.end(); ++it) { > + // if this symbol also has a definition, then don't > make an undefine > + // because it is a tentative definition > + if ( _defines.find(it->getKeyData(), it->getKeyData() > +it->getKeyLength()) == _defines.end() ) { likewise: if (_defines.find(..) != _defines.end()) continue; > > +++ llvm/trunk/tools/lto2/LTOModule.h Tue Feb 26 14:26:43 2008 > @@ -0,0 +1,83 @@ > +//===-LTOModule.h - LLVM Link Time Optimizer > ------------------------------===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open > Source > +// License. See LICENSE.TXT for details. > +// > +// > = > = > = > ----------------------------------------------------------------------= > ==// > +// > +// This file declares the LTOModule class. > +// > +// > = > = > = > ----------------------------------------------------------------------= > ==// > + > +#ifndef LTO_MODULE_H > +#define LTO_MODULE_H > + > +#include "llvm/Module.h" > +#include "llvm/GlobalValue.h" > +#include "llvm/Constants.h" > +#include "llvm/Support/Mangler.h" > +#include "llvm/Target/TargetMachine.h" > +#include "llvm/ADT/StringMap.h" I think that several of these #includes can be removed. GlobalValue.h is redundant, and I think you can forward declare most of the classes instead of #including their header. > + bool _symbolsParsed; > + std::vector _symbols; > + StringSet _defines; // only needed to > disambiguate tentative definitions > + StringSet _undefines; // only needed to > disambiguate tentative definitions 80 cols. > +//===-lto.cpp - LLVM Link Time Optimizer > ----------------------------------===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open > Source > +// License. See LICENSE.TXT for details. > +// > +// > = > = > = > ----------------------------------------------------------------------= > ==// > +// > +// This file implements the Link Time Optimization library. This > library is > +// intended to be used by linker to optimize code at link time. > +// > +// > = > = > = > ----------------------------------------------------------------------= > ==// > + > +#include "llvm-c/lto.h" > + > +#include "LTOModule.h" > +#include "LTOCodeGenerator.h" > + > + > +// holds most recent error string > +// *** not thread safe *** > +static std::string sLastErrorString; This also has a static ctor, which we try to avoid when possible (yes, we don't avoid very well, but we still try :). Is there another way to do this? Thanks Nick! -Chris From resistor at mac.com Tue Feb 26 17:16:11 2008 From: resistor at mac.com (Owen Anderson) Date: Tue, 26 Feb 2008 23:16:11 -0000 Subject: [llvm-commits] [llvm] r47640 - /llvm/trunk/test/Transforms/GVN/2008-02-26-MemCpySize.ll Message-ID: <200802262316.m1QNGBZc022507@zion.cs.uiuc.edu> Author: resistor Date: Tue Feb 26 17:16:11 2008 New Revision: 47640 URL: http://llvm.org/viewvc/llvm-project?rev=47640&view=rev Log: Add PR number to testcase. Modified: llvm/trunk/test/Transforms/GVN/2008-02-26-MemCpySize.ll Modified: llvm/trunk/test/Transforms/GVN/2008-02-26-MemCpySize.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2008-02-26-MemCpySize.ll?rev=47640&r1=47639&r2=47640&view=diff ============================================================================== --- llvm/trunk/test/Transforms/GVN/2008-02-26-MemCpySize.ll (original) +++ llvm/trunk/test/Transforms/GVN/2008-02-26-MemCpySize.ll Tue Feb 26 17:16:11 2008 @@ -1,4 +1,5 @@ ; RUN: llvm-as < %s | opt -gvn -dse | llvm-dis | grep {call.*memcpy.*cell} | count 2 +; PR2099 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin9" From dpatel at apple.com Tue Feb 26 17:17:51 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 23:17:51 -0000 Subject: [llvm-commits] [llvm] r47641 - /llvm/trunk/lib/AsmParser/llvmAsmParser.y Message-ID: <200802262317.m1QNHp8m022567@zion.cs.uiuc.edu> Author: dpatel Date: Tue Feb 26 17:17:50 2008 New Revision: 47641 URL: http://llvm.org/viewvc/llvm-project?rev=47641&view=rev Log: Add assert. Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y?rev=47641&r1=47640&r2=47641&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.y (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y Tue Feb 26 17:17:50 2008 @@ -2581,8 +2581,8 @@ BBTerminatorInst : RET ReturnedVal { // Return with a result... ValueList &VL = *$2; - if (!VL.empty()) - $$ = new ReturnInst(&VL[0], VL.size()); + assert(!VL.empty() && "Invalid ret operands!"); + $$ = new ReturnInst(&VL[0], VL.size()); delete $2; CHECK_FOR_ERROR } From dpatel at apple.com Tue Feb 26 17:19:09 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 26 Feb 2008 23:19:09 -0000 Subject: [llvm-commits] [llvm] r47642 - in /llvm/trunk/lib/AsmParser: llvmAsmParser.cpp.cvs llvmAsmParser.h.cvs llvmAsmParser.y.cvs Message-ID: <200802262319.m1QNJ903022616@zion.cs.uiuc.edu> Author: dpatel Date: Tue Feb 26 17:19:08 2008 New Revision: 47642 URL: http://llvm.org/viewvc/llvm-project?rev=47642&view=rev Log: regenerate. Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs?rev=47642&r1=47641&r2=47642&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs Tue Feb 26 17:19:08 2008 @@ -378,7 +378,7 @@ /* Copy the first part of user declarations. */ -#line 14 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 14 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" #include "ParserInternals.h" #include "llvm/CallingConv.h" @@ -1338,7 +1338,7 @@ #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED typedef union YYSTYPE -#line 953 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 953 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { llvm::Module *ModuleVal; llvm::Function *FunctionVal; @@ -3474,152 +3474,152 @@ switch (yyn) { case 29: -#line 1121 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1121 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_EQ; ;} break; case 30: -#line 1121 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1121 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_NE; ;} break; case 31: -#line 1122 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1122 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_SLT; ;} break; case 32: -#line 1122 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1122 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_SGT; ;} break; case 33: -#line 1123 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1123 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_SLE; ;} break; case 34: -#line 1123 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1123 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_SGE; ;} break; case 35: -#line 1124 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1124 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_ULT; ;} break; case 36: -#line 1124 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1124 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_UGT; ;} break; case 37: -#line 1125 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1125 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_ULE; ;} break; case 38: -#line 1125 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1125 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_UGE; ;} break; case 39: -#line 1129 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1129 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_OEQ; ;} break; case 40: -#line 1129 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1129 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_ONE; ;} break; case 41: -#line 1130 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1130 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_OLT; ;} break; case 42: -#line 1130 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1130 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_OGT; ;} break; case 43: -#line 1131 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1131 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_OLE; ;} break; case 44: -#line 1131 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1131 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_OGE; ;} break; case 45: -#line 1132 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1132 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_ORD; ;} break; case 46: -#line 1132 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1132 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_UNO; ;} break; case 47: -#line 1133 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1133 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_UEQ; ;} break; case 48: -#line 1133 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1133 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_UNE; ;} break; case 49: -#line 1134 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1134 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_ULT; ;} break; case 50: -#line 1134 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1134 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_UGT; ;} break; case 51: -#line 1135 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1135 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_ULE; ;} break; case 52: -#line 1135 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1135 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_UGE; ;} break; case 53: -#line 1136 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1136 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_TRUE; ;} break; case 54: -#line 1137 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1137 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_FALSE; ;} break; case 65: -#line 1146 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1146 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = 0; ;} break; case 66: -#line 1148 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1148 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal)=(yyvsp[(3) - (4)].UInt64Val); ;} break; case 67: -#line 1149 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1149 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal)=0; ;} break; case 68: -#line 1153 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1153 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = (yyvsp[(1) - (2)].StrVal); CHECK_FOR_ERROR @@ -3627,7 +3627,7 @@ break; case 69: -#line 1157 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1157 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = 0; CHECK_FOR_ERROR @@ -3635,7 +3635,7 @@ break; case 73: -#line 1165 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1165 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = 0; CHECK_FOR_ERROR @@ -3643,7 +3643,7 @@ break; case 74: -#line 1170 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1170 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = (yyvsp[(1) - (2)].StrVal); CHECK_FOR_ERROR @@ -3651,152 +3651,152 @@ break; case 75: -#line 1176 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1176 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::InternalLinkage; ;} break; case 76: -#line 1177 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1177 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::WeakLinkage; ;} break; case 77: -#line 1178 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1178 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;} break; case 78: -#line 1179 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1179 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::AppendingLinkage; ;} break; case 79: -#line 1180 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1180 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;} break; case 80: -#line 1184 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1184 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;} break; case 81: -#line 1185 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1185 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;} break; case 82: -#line 1186 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1186 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} break; case 83: -#line 1190 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1190 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Visibility) = GlobalValue::DefaultVisibility; ;} break; case 84: -#line 1191 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1191 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Visibility) = GlobalValue::DefaultVisibility; ;} break; case 85: -#line 1192 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1192 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Visibility) = GlobalValue::HiddenVisibility; ;} break; case 86: -#line 1193 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1193 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Visibility) = GlobalValue::ProtectedVisibility; ;} break; case 87: -#line 1197 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1197 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} break; case 88: -#line 1198 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1198 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;} break; case 89: -#line 1199 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1199 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;} break; case 90: -#line 1203 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1203 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} break; case 91: -#line 1204 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1204 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::InternalLinkage; ;} break; case 92: -#line 1205 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1205 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;} break; case 93: -#line 1206 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1206 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::WeakLinkage; ;} break; case 94: -#line 1207 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1207 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;} break; case 95: -#line 1211 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1211 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} break; case 96: -#line 1212 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1212 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::WeakLinkage; ;} break; case 97: -#line 1213 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1213 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::InternalLinkage; ;} break; case 98: -#line 1216 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1216 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::C; ;} break; case 99: -#line 1217 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1217 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::C; ;} break; case 100: -#line 1218 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1218 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::Fast; ;} break; case 101: -#line 1219 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1219 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::Cold; ;} break; case 102: -#line 1220 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1220 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::X86_StdCall; ;} break; case 103: -#line 1221 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1221 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::X86_FastCall; ;} break; case 104: -#line 1222 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1222 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((unsigned)(yyvsp[(2) - (2)].UInt64Val) != (yyvsp[(2) - (2)].UInt64Val)) GEN_ERROR("Calling conv too large"); @@ -3806,129 +3806,129 @@ break; case 105: -#line 1229 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1229 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ZExt; ;} break; case 106: -#line 1230 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1230 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ZExt; ;} break; case 107: -#line 1231 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1231 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::SExt; ;} break; case 108: -#line 1232 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1232 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::SExt; ;} break; case 109: -#line 1233 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1233 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::InReg; ;} break; case 110: -#line 1234 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1234 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::StructRet; ;} break; case 111: -#line 1235 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1235 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::NoAlias; ;} break; case 112: -#line 1236 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1236 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ByVal; ;} break; case 113: -#line 1237 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1237 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::Nest; ;} break; case 114: -#line 1238 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1238 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::constructAlignmentFromInt((yyvsp[(2) - (2)].UInt64Val)); ;} break; case 115: -#line 1242 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1242 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::None; ;} break; case 116: -#line 1243 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1243 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = (yyvsp[(1) - (2)].ParamAttrs) | (yyvsp[(2) - (2)].ParamAttrs); ;} break; case 117: -#line 1248 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1248 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::NoReturn; ;} break; case 118: -#line 1249 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1249 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::NoUnwind; ;} break; case 119: -#line 1250 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1250 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ZExt; ;} break; case 120: -#line 1251 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1251 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::SExt; ;} break; case 121: -#line 1252 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1252 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ReadNone; ;} break; case 122: -#line 1253 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1253 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ReadOnly; ;} break; case 123: -#line 1256 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1256 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::None; ;} break; case 124: -#line 1257 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1257 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = (yyvsp[(1) - (2)].ParamAttrs) | (yyvsp[(2) - (2)].ParamAttrs); ;} break; case 125: -#line 1262 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1262 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = 0; ;} break; case 126: -#line 1263 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1263 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = (yyvsp[(2) - (2)].StrVal); ;} break; case 127: -#line 1270 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1270 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = 0; ;} break; case 128: -#line 1271 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1271 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = (yyvsp[(2) - (2)].UInt64Val); if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal))) @@ -3938,12 +3938,12 @@ break; case 129: -#line 1277 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1277 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = 0; ;} break; case 130: -#line 1278 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1278 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = (yyvsp[(3) - (3)].UInt64Val); if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal))) @@ -3953,7 +3953,7 @@ break; case 131: -#line 1287 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1287 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { for (unsigned i = 0, e = (yyvsp[(2) - (2)].StrVal)->length(); i != e; ++i) if ((*(yyvsp[(2) - (2)].StrVal))[i] == '"' || (*(yyvsp[(2) - (2)].StrVal))[i] == '\\') @@ -3964,27 +3964,27 @@ break; case 132: -#line 1295 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1295 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = 0; ;} break; case 133: -#line 1296 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1296 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = (yyvsp[(1) - (1)].StrVal); ;} break; case 134: -#line 1301 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1301 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" {;} break; case 135: -#line 1302 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1302 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" {;} break; case 136: -#line 1303 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1303 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV->setSection(*(yyvsp[(1) - (1)].StrVal)); delete (yyvsp[(1) - (1)].StrVal); @@ -3993,7 +3993,7 @@ break; case 137: -#line 1308 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1308 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(2) - (2)].UInt64Val) != 0 && !isPowerOf2_32((yyvsp[(2) - (2)].UInt64Val))) GEN_ERROR("Alignment must be a power of two"); @@ -4003,7 +4003,7 @@ break; case 145: -#line 1324 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1324 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeVal) = new PATypeHolder(OpaqueType::get()); CHECK_FOR_ERROR @@ -4011,7 +4011,7 @@ break; case 146: -#line 1328 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1328 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeVal) = new PATypeHolder((yyvsp[(1) - (1)].PrimType)); CHECK_FOR_ERROR @@ -4019,7 +4019,7 @@ break; case 147: -#line 1332 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1332 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Pointer type? if (*(yyvsp[(1) - (3)].TypeVal) == Type::LabelTy) GEN_ERROR("Cannot form a pointer to a basic block"); @@ -4030,7 +4030,7 @@ break; case 148: -#line 1339 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1339 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Named types are also simple types... const Type* tmp = getTypeVal((yyvsp[(1) - (1)].ValIDVal)); CHECK_FOR_ERROR @@ -4039,7 +4039,7 @@ break; case 149: -#line 1344 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1344 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Type UpReference if ((yyvsp[(2) - (2)].UInt64Val) > (uint64_t)~0U) GEN_ERROR("Value out of range"); OpaqueType *OT = OpaqueType::get(); // Use temporary placeholder @@ -4051,7 +4051,7 @@ break; case 150: -#line 1352 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1352 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Allow but ignore attributes on function types; this permits auto-upgrade. // FIXME: remove in LLVM 3.0. @@ -4085,7 +4085,7 @@ break; case 151: -#line 1382 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1382 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Allow but ignore attributes on function types; this permits auto-upgrade. // FIXME: remove in LLVM 3.0. @@ -4113,7 +4113,7 @@ break; case 152: -#line 1407 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1407 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Sized array type? (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(ArrayType::get(*(yyvsp[(4) - (5)].TypeVal), (unsigned)(yyvsp[(2) - (5)].UInt64Val)))); delete (yyvsp[(4) - (5)].TypeVal); @@ -4122,7 +4122,7 @@ break; case 153: -#line 1412 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1412 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Vector type? const llvm::Type* ElemTy = (yyvsp[(4) - (5)].TypeVal)->get(); if ((unsigned)(yyvsp[(2) - (5)].UInt64Val) != (yyvsp[(2) - (5)].UInt64Val)) @@ -4136,7 +4136,7 @@ break; case 154: -#line 1422 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1422 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Structure type? std::vector Elements; for (std::list::iterator I = (yyvsp[(2) - (3)].TypeList)->begin(), @@ -4150,7 +4150,7 @@ break; case 155: -#line 1432 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1432 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty structure type? (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector())); CHECK_FOR_ERROR @@ -4158,7 +4158,7 @@ break; case 156: -#line 1436 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1436 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { std::vector Elements; for (std::list::iterator I = (yyvsp[(3) - (5)].TypeList)->begin(), @@ -4172,7 +4172,7 @@ break; case 157: -#line 1446 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1446 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty structure type? (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector(), true)); CHECK_FOR_ERROR @@ -4180,7 +4180,7 @@ break; case 158: -#line 1453 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1453 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Allow but ignore attributes on function types; this permits auto-upgrade. // FIXME: remove in LLVM 3.0. @@ -4190,7 +4190,7 @@ break; case 159: -#line 1462 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1462 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (1)].TypeVal))->getDescription()); @@ -4201,14 +4201,14 @@ break; case 160: -#line 1469 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1469 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeVal) = new PATypeHolder(Type::VoidTy); ;} break; case 161: -#line 1474 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1474 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList) = new TypeWithAttrsList(); (yyval.TypeWithAttrsList)->push_back((yyvsp[(1) - (1)].TypeWithAttrs)); @@ -4217,7 +4217,7 @@ break; case 162: -#line 1479 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1479 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.TypeWithAttrsList)=(yyvsp[(1) - (3)].TypeWithAttrsList))->push_back((yyvsp[(3) - (3)].TypeWithAttrs)); CHECK_FOR_ERROR @@ -4225,7 +4225,7 @@ break; case 164: -#line 1487 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1487 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList)=(yyvsp[(1) - (3)].TypeWithAttrsList); TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None; @@ -4236,7 +4236,7 @@ break; case 165: -#line 1494 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1494 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList) = new TypeWithAttrsList; TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None; @@ -4247,7 +4247,7 @@ break; case 166: -#line 1501 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1501 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList) = new TypeWithAttrsList(); CHECK_FOR_ERROR @@ -4255,7 +4255,7 @@ break; case 167: -#line 1509 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1509 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeList) = new std::list(); (yyval.TypeList)->push_back(*(yyvsp[(1) - (1)].TypeVal)); @@ -4265,7 +4265,7 @@ break; case 168: -#line 1515 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1515 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.TypeList)=(yyvsp[(1) - (3)].TypeList))->push_back(*(yyvsp[(3) - (3)].TypeVal)); delete (yyvsp[(3) - (3)].TypeVal); @@ -4274,7 +4274,7 @@ break; case 169: -#line 1527 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1527 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized arr if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (4)].TypeVal))->getDescription()); @@ -4306,7 +4306,7 @@ break; case 170: -#line 1555 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1555 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription()); @@ -4326,7 +4326,7 @@ break; case 171: -#line 1571 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1571 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription()); @@ -4357,7 +4357,7 @@ break; case 172: -#line 1598 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1598 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized arr if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (4)].TypeVal))->getDescription()); @@ -4389,7 +4389,7 @@ break; case 173: -#line 1626 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1626 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { const StructType *STy = dyn_cast((yyvsp[(1) - (4)].TypeVal)->get()); if (STy == 0) @@ -4419,7 +4419,7 @@ break; case 174: -#line 1652 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1652 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription()); @@ -4443,7 +4443,7 @@ break; case 175: -#line 1672 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1672 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { const StructType *STy = dyn_cast((yyvsp[(1) - (6)].TypeVal)->get()); if (STy == 0) @@ -4473,7 +4473,7 @@ break; case 176: -#line 1698 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1698 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (5)].TypeVal))->getDescription()); @@ -4497,7 +4497,7 @@ break; case 177: -#line 1718 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1718 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -4513,7 +4513,7 @@ break; case 178: -#line 1730 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1730 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -4524,7 +4524,7 @@ break; case 179: -#line 1737 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1737 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -4594,7 +4594,7 @@ break; case 180: -#line 1803 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1803 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -4608,7 +4608,7 @@ break; case 181: -#line 1813 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1813 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -4622,7 +4622,7 @@ break; case 182: -#line 1823 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1823 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // integral constants if (!ConstantInt::isValueValidForType((yyvsp[(1) - (2)].PrimType), (yyvsp[(2) - (2)].SInt64Val))) GEN_ERROR("Constant value doesn't fit in type"); @@ -4632,7 +4632,7 @@ break; case 183: -#line 1829 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1829 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // arbitrary precision integer constants uint32_t BitWidth = cast((yyvsp[(1) - (2)].PrimType))->getBitWidth(); if ((yyvsp[(2) - (2)].APIntVal)->getBitWidth() > BitWidth) { @@ -4646,7 +4646,7 @@ break; case 184: -#line 1839 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1839 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // integral constants if (!ConstantInt::isValueValidForType((yyvsp[(1) - (2)].PrimType), (yyvsp[(2) - (2)].UInt64Val))) GEN_ERROR("Constant value doesn't fit in type"); @@ -4656,7 +4656,7 @@ break; case 185: -#line 1845 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1845 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // arbitrary precision integer constants uint32_t BitWidth = cast((yyvsp[(1) - (2)].PrimType))->getBitWidth(); if ((yyvsp[(2) - (2)].APIntVal)->getBitWidth() > BitWidth) { @@ -4670,7 +4670,7 @@ break; case 186: -#line 1855 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1855 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Boolean constants assert(cast((yyvsp[(1) - (2)].PrimType))->getBitWidth() == 1 && "Not Bool?"); (yyval.ConstVal) = ConstantInt::getTrue(); @@ -4679,7 +4679,7 @@ break; case 187: -#line 1860 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1860 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Boolean constants assert(cast((yyvsp[(1) - (2)].PrimType))->getBitWidth() == 1 && "Not Bool?"); (yyval.ConstVal) = ConstantInt::getFalse(); @@ -4688,7 +4688,7 @@ break; case 188: -#line 1865 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1865 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Floating point constants if (!ConstantFP::isValueValidForType((yyvsp[(1) - (2)].PrimType), *(yyvsp[(2) - (2)].FPVal))) GEN_ERROR("Floating point constant invalid for type"); @@ -4703,7 +4703,7 @@ break; case 189: -#line 1878 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1878 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(5) - (6)].TypeVal))->getDescription()); @@ -4719,7 +4719,7 @@ break; case 190: -#line 1890 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1890 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa((yyvsp[(3) - (5)].ConstVal)->getType())) GEN_ERROR("GetElementPtr requires a pointer operand"); @@ -4745,7 +4745,7 @@ break; case 191: -#line 1912 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1912 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(3) - (8)].ConstVal)->getType() != Type::Int1Ty) GEN_ERROR("Select condition must be of boolean type"); @@ -4757,7 +4757,7 @@ break; case 192: -#line 1920 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1920 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(3) - (6)].ConstVal)->getType() != (yyvsp[(5) - (6)].ConstVal)->getType()) GEN_ERROR("Binary operator types must match"); @@ -4767,7 +4767,7 @@ break; case 193: -#line 1926 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1926 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(3) - (6)].ConstVal)->getType() != (yyvsp[(5) - (6)].ConstVal)->getType()) GEN_ERROR("Logical operator types must match"); @@ -4782,7 +4782,7 @@ break; case 194: -#line 1937 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1937 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType()) GEN_ERROR("icmp operand types must match"); @@ -4791,7 +4791,7 @@ break; case 195: -#line 1942 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1942 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType()) GEN_ERROR("fcmp operand types must match"); @@ -4800,7 +4800,7 @@ break; case 196: -#line 1947 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1947 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ExtractElementInst::isValidOperands((yyvsp[(3) - (6)].ConstVal), (yyvsp[(5) - (6)].ConstVal))) GEN_ERROR("Invalid extractelement operands"); @@ -4810,7 +4810,7 @@ break; case 197: -#line 1953 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1953 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!InsertElementInst::isValidOperands((yyvsp[(3) - (8)].ConstVal), (yyvsp[(5) - (8)].ConstVal), (yyvsp[(7) - (8)].ConstVal))) GEN_ERROR("Invalid insertelement operands"); @@ -4820,7 +4820,7 @@ break; case 198: -#line 1959 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1959 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ShuffleVectorInst::isValidOperands((yyvsp[(3) - (8)].ConstVal), (yyvsp[(5) - (8)].ConstVal), (yyvsp[(7) - (8)].ConstVal))) GEN_ERROR("Invalid shufflevector operands"); @@ -4830,7 +4830,7 @@ break; case 199: -#line 1968 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1968 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.ConstVector) = (yyvsp[(1) - (3)].ConstVector))->push_back((yyvsp[(3) - (3)].ConstVal)); CHECK_FOR_ERROR @@ -4838,7 +4838,7 @@ break; case 200: -#line 1972 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1972 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ConstVector) = new std::vector(); (yyval.ConstVector)->push_back((yyvsp[(1) - (1)].ConstVal)); @@ -4847,27 +4847,27 @@ break; case 201: -#line 1980 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1980 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; ;} break; case 202: -#line 1980 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1980 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; ;} break; case 203: -#line 1983 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1983 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; ;} break; case 204: -#line 1983 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1983 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; ;} break; case 205: -#line 1986 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1986 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { const Type* VTy = (yyvsp[(1) - (2)].TypeVal)->get(); Value *V = getVal(VTy, (yyvsp[(2) - (2)].ValIDVal)); @@ -4883,7 +4883,7 @@ break; case 206: -#line 1998 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1998 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { Constant *Val = (yyvsp[(3) - (6)].ConstVal); const Type *DestTy = (yyvsp[(5) - (6)].TypeVal)->get(); @@ -4899,7 +4899,7 @@ break; case 207: -#line 2019 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2019 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule; CurModule.ModuleDone(); @@ -4908,7 +4908,7 @@ break; case 208: -#line 2024 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2024 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule; CurModule.ModuleDone(); @@ -4917,12 +4917,12 @@ break; case 211: -#line 2037 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2037 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.isDeclare = false; ;} break; case 212: -#line 2037 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2037 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.FunctionDone(); CHECK_FOR_ERROR @@ -4930,26 +4930,26 @@ break; case 213: -#line 2041 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2041 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.isDeclare = true; ;} break; case 214: -#line 2041 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2041 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 215: -#line 2044 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2044 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 216: -#line 2047 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2047 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (3)].TypeVal))->getDescription()); @@ -4977,7 +4977,7 @@ break; case 217: -#line 2071 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2071 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { ResolveTypeTo((yyvsp[(1) - (3)].StrVal), (yyvsp[(3) - (3)].PrimType)); @@ -4992,7 +4992,7 @@ break; case 218: -#line 2083 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2083 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { /* "Externally Visible" Linkage */ if ((yyvsp[(5) - (6)].ConstVal) == 0) @@ -5004,14 +5004,14 @@ break; case 219: -#line 2090 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2090 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ;} break; case 220: -#line 2094 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2094 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(6) - (7)].ConstVal) == 0) GEN_ERROR("Global value initializer is not a constant"); @@ -5021,14 +5021,14 @@ break; case 221: -#line 2099 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2099 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ;} break; case 222: -#line 2103 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2103 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(6) - (7)].TypeVal))->getDescription()); @@ -5039,7 +5039,7 @@ break; case 223: -#line 2109 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2109 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; CHECK_FOR_ERROR @@ -5047,7 +5047,7 @@ break; case 224: -#line 2113 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2113 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { std::string Name; if ((yyvsp[(1) - (5)].StrVal)) { @@ -5091,21 +5091,21 @@ break; case 225: -#line 2153 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2153 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 226: -#line 2156 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2156 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 227: -#line 2162 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2162 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { const std::string &AsmSoFar = CurModule.CurrentModule->getModuleInlineAsm(); if (AsmSoFar.empty()) @@ -5118,7 +5118,7 @@ break; case 228: -#line 2172 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2172 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->setTargetTriple(*(yyvsp[(3) - (3)].StrVal)); delete (yyvsp[(3) - (3)].StrVal); @@ -5126,7 +5126,7 @@ break; case 229: -#line 2176 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2176 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->setDataLayout(*(yyvsp[(3) - (3)].StrVal)); delete (yyvsp[(3) - (3)].StrVal); @@ -5134,7 +5134,7 @@ break; case 231: -#line 2183 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2183 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->addLibrary(*(yyvsp[(3) - (3)].StrVal)); delete (yyvsp[(3) - (3)].StrVal); @@ -5143,7 +5143,7 @@ break; case 232: -#line 2188 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2188 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->addLibrary(*(yyvsp[(1) - (1)].StrVal)); delete (yyvsp[(1) - (1)].StrVal); @@ -5152,14 +5152,14 @@ break; case 233: -#line 2193 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2193 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 234: -#line 2202 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2202 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (5)].TypeVal))->getDescription()); @@ -5173,7 +5173,7 @@ break; case 235: -#line 2212 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2212 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription()); @@ -5187,7 +5187,7 @@ break; case 236: -#line 2223 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2223 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = (yyvsp[(1) - (1)].ArgList); CHECK_FOR_ERROR @@ -5195,7 +5195,7 @@ break; case 237: -#line 2227 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2227 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = (yyvsp[(1) - (3)].ArgList); struct ArgListEntry E; @@ -5208,7 +5208,7 @@ break; case 238: -#line 2236 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2236 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = new ArgListType; struct ArgListEntry E; @@ -5221,7 +5221,7 @@ break; case 239: -#line 2245 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2245 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = 0; CHECK_FOR_ERROR @@ -5229,7 +5229,7 @@ break; case 240: -#line 2251 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2251 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { std::string FunctionName(*(yyvsp[(3) - (10)].StrVal)); delete (yyvsp[(3) - (10)].StrVal); // Free strdup'd memory! @@ -5365,7 +5365,7 @@ break; case 243: -#line 2386 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2386 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FunctionVal) = CurFun.CurrentFunction; @@ -5377,7 +5377,7 @@ break; case 246: -#line 2397 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2397 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal); CHECK_FOR_ERROR @@ -5385,7 +5385,7 @@ break; case 247: -#line 2402 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2402 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.CurrentFunction->setLinkage((yyvsp[(1) - (3)].Linkage)); CurFun.CurrentFunction->setVisibility((yyvsp[(2) - (3)].Visibility)); @@ -5396,7 +5396,7 @@ break; case 248: -#line 2414 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2414 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; CHECK_FOR_ERROR @@ -5404,7 +5404,7 @@ break; case 249: -#line 2418 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2418 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; CHECK_FOR_ERROR @@ -5412,7 +5412,7 @@ break; case 250: -#line 2423 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2423 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // A reference to a direct constant (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].SInt64Val)); CHECK_FOR_ERROR @@ -5420,7 +5420,7 @@ break; case 251: -#line 2427 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2427 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].UInt64Val)); CHECK_FOR_ERROR @@ -5428,7 +5428,7 @@ break; case 252: -#line 2431 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2431 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Perhaps it's an FP constant? (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].FPVal)); CHECK_FOR_ERROR @@ -5436,7 +5436,7 @@ break; case 253: -#line 2435 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2435 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create(ConstantInt::getTrue()); CHECK_FOR_ERROR @@ -5444,7 +5444,7 @@ break; case 254: -#line 2439 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2439 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create(ConstantInt::getFalse()); CHECK_FOR_ERROR @@ -5452,7 +5452,7 @@ break; case 255: -#line 2443 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2443 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createNull(); CHECK_FOR_ERROR @@ -5460,7 +5460,7 @@ break; case 256: -#line 2447 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2447 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createUndef(); CHECK_FOR_ERROR @@ -5468,7 +5468,7 @@ break; case 257: -#line 2451 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2451 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // A vector zero constant. (yyval.ValIDVal) = ValID::createZeroInit(); CHECK_FOR_ERROR @@ -5476,7 +5476,7 @@ break; case 258: -#line 2455 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2455 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized packed vector const Type *ETy = (*(yyvsp[(2) - (3)].ConstVector))[0]->getType(); int NumElements = (yyvsp[(2) - (3)].ConstVector)->size(); @@ -5505,7 +5505,7 @@ break; case 259: -#line 2480 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2480 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].ConstVal)); CHECK_FOR_ERROR @@ -5513,7 +5513,7 @@ break; case 260: -#line 2484 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2484 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createInlineAsm(*(yyvsp[(3) - (5)].StrVal), *(yyvsp[(5) - (5)].StrVal), (yyvsp[(2) - (5)].BoolVal)); delete (yyvsp[(3) - (5)].StrVal); @@ -5523,7 +5523,7 @@ break; case 261: -#line 2494 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2494 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it an integer reference...? (yyval.ValIDVal) = ValID::createLocalID((yyvsp[(1) - (1)].UIntVal)); CHECK_FOR_ERROR @@ -5531,7 +5531,7 @@ break; case 262: -#line 2498 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2498 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createGlobalID((yyvsp[(1) - (1)].UIntVal)); CHECK_FOR_ERROR @@ -5539,7 +5539,7 @@ break; case 263: -#line 2502 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2502 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it a named reference...? (yyval.ValIDVal) = ValID::createLocalName(*(yyvsp[(1) - (1)].StrVal)); delete (yyvsp[(1) - (1)].StrVal); @@ -5548,7 +5548,7 @@ break; case 264: -#line 2507 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2507 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it a named reference...? (yyval.ValIDVal) = ValID::createGlobalName(*(yyvsp[(1) - (1)].StrVal)); delete (yyvsp[(1) - (1)].StrVal); @@ -5557,7 +5557,7 @@ break; case 267: -#line 2520 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2520 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -5568,7 +5568,7 @@ break; case 268: -#line 2529 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2529 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValueList) = new std::vector(); (yyval.ValueList)->push_back((yyvsp[(1) - (1)].ValueVal)); @@ -5577,7 +5577,7 @@ break; case 269: -#line 2534 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2534 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.ValueList)=(yyvsp[(1) - (3)].ValueList))->push_back((yyvsp[(3) - (3)].ValueVal)); CHECK_FOR_ERROR @@ -5585,7 +5585,7 @@ break; case 270: -#line 2539 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2539 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal); CHECK_FOR_ERROR @@ -5593,7 +5593,7 @@ break; case 271: -#line 2543 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2543 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Do not allow functions with 0 basic blocks (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal); CHECK_FOR_ERROR @@ -5601,7 +5601,7 @@ break; case 272: -#line 2552 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2552 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { setValueName((yyvsp[(3) - (3)].TermInstVal), (yyvsp[(2) - (3)].StrVal)); CHECK_FOR_ERROR @@ -5613,7 +5613,7 @@ break; case 273: -#line 2561 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2561 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (CastInst *CI1 = dyn_cast((yyvsp[(2) - (2)].InstVal))) if (CastInst *CI2 = dyn_cast(CI1->getOperand(0))) @@ -5626,7 +5626,7 @@ break; case 274: -#line 2570 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2570 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty space between instruction lists (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalID(CurFun.NextValNum)); CHECK_FOR_ERROR @@ -5634,7 +5634,7 @@ break; case 275: -#line 2574 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2574 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Labelled (named) basic block (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalName(*(yyvsp[(1) - (1)].StrVal))); delete (yyvsp[(1) - (1)].StrVal); @@ -5644,18 +5644,18 @@ break; case 276: -#line 2582 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2582 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Return with a result... ValueList &VL = *(yyvsp[(2) - (2)].ValueList); - if (!VL.empty()) - (yyval.TermInstVal) = new ReturnInst(&VL[0], VL.size()); + assert(!VL.empty() && "Invalid ret operands!"); + (yyval.TermInstVal) = new ReturnInst(&VL[0], VL.size()); delete (yyvsp[(2) - (2)].ValueList); CHECK_FOR_ERROR ;} break; case 277: -#line 2589 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2589 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Return with no result... (yyval.TermInstVal) = new ReturnInst(); CHECK_FOR_ERROR @@ -5663,7 +5663,7 @@ break; case 278: -#line 2593 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2593 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Unconditional Branch... BasicBlock* tmpBB = getBBVal((yyvsp[(3) - (3)].ValIDVal)); CHECK_FOR_ERROR @@ -5672,7 +5672,7 @@ break; case 279: -#line 2598 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2598 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { assert(cast((yyvsp[(2) - (9)].PrimType))->getBitWidth() == 1 && "Not Bool?"); BasicBlock* tmpBBA = getBBVal((yyvsp[(6) - (9)].ValIDVal)); @@ -5686,7 +5686,7 @@ break; case 280: -#line 2608 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2608 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { Value* tmpVal = getVal((yyvsp[(2) - (9)].PrimType), (yyvsp[(3) - (9)].ValIDVal)); CHECK_FOR_ERROR @@ -5709,7 +5709,7 @@ break; case 281: -#line 2627 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2627 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { Value* tmpVal = getVal((yyvsp[(2) - (8)].PrimType), (yyvsp[(3) - (8)].ValIDVal)); CHECK_FOR_ERROR @@ -5722,7 +5722,7 @@ break; case 282: -#line 2637 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2637 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Handle the short syntax @@ -5816,7 +5816,7 @@ break; case 283: -#line 2727 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2727 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TermInstVal) = new UnwindInst(); CHECK_FOR_ERROR @@ -5824,7 +5824,7 @@ break; case 284: -#line 2731 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2731 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TermInstVal) = new UnreachableInst(); CHECK_FOR_ERROR @@ -5832,7 +5832,7 @@ break; case 285: -#line 2738 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2738 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.JumpTable) = (yyvsp[(1) - (6)].JumpTable); Constant *V = cast(getExistingVal((yyvsp[(2) - (6)].PrimType), (yyvsp[(3) - (6)].ValIDVal))); @@ -5847,7 +5847,7 @@ break; case 286: -#line 2749 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2749 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.JumpTable) = new std::vector >(); Constant *V = cast(getExistingVal((yyvsp[(1) - (5)].PrimType), (yyvsp[(2) - (5)].ValIDVal))); @@ -5863,7 +5863,7 @@ break; case 287: -#line 2762 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2762 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Is this definition named?? if so, assign the name... setValueName((yyvsp[(2) - (2)].InstVal), (yyvsp[(1) - (2)].StrVal)); @@ -5875,7 +5875,7 @@ break; case 288: -#line 2772 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2772 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Used for PHI nodes if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (6)].TypeVal))->getDescription()); @@ -5890,7 +5890,7 @@ break; case 289: -#line 2783 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2783 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.PHIList) = (yyvsp[(1) - (7)].PHIList); Value* tmpVal = getVal((yyvsp[(1) - (7)].PHIList)->front().first->getType(), (yyvsp[(4) - (7)].ValIDVal)); @@ -5902,7 +5902,7 @@ break; case 290: -#line 2793 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2793 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0 if (!UpRefs.empty()) @@ -5917,7 +5917,7 @@ break; case 291: -#line 2804 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2804 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0 // Labels are only valid in ASMs @@ -5929,7 +5929,7 @@ break; case 292: -#line 2812 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2812 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0 if (!UpRefs.empty()) @@ -5943,7 +5943,7 @@ break; case 293: -#line 2822 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2822 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0 (yyval.ParamList) = (yyvsp[(1) - (6)].ParamList); @@ -5954,17 +5954,17 @@ break; case 294: -#line 2829 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2829 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamList) = new ParamList(); ;} break; case 295: -#line 2832 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2832 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValueList) = new std::vector(); ;} break; case 296: -#line 2833 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2833 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValueList) = (yyvsp[(1) - (3)].ValueList); (yyval.ValueList)->push_back((yyvsp[(3) - (3)].ValueVal)); @@ -5973,7 +5973,7 @@ break; case 297: -#line 2840 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2840 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; CHECK_FOR_ERROR @@ -5981,7 +5981,7 @@ break; case 298: -#line 2844 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2844 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; CHECK_FOR_ERROR @@ -5989,7 +5989,7 @@ break; case 299: -#line 2849 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2849 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (5)].TypeVal))->getDescription()); @@ -6009,7 +6009,7 @@ break; case 300: -#line 2865 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2865 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (5)].TypeVal))->getDescription()); @@ -6030,7 +6030,7 @@ break; case 301: -#line 2882 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2882 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription()); @@ -6048,7 +6048,7 @@ break; case 302: -#line 2896 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2896 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription()); @@ -6066,7 +6066,7 @@ break; case 303: -#line 2910 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2910 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(4) - (4)].TypeVal))->getDescription()); @@ -6082,7 +6082,7 @@ break; case 304: -#line 2922 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2922 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(2) - (6)].ValueVal)->getType() != Type::Int1Ty) GEN_ERROR("select condition must be boolean"); @@ -6094,7 +6094,7 @@ break; case 305: -#line 2930 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2930 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(4) - (4)].TypeVal))->getDescription()); @@ -6105,7 +6105,7 @@ break; case 306: -#line 2937 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2937 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ExtractElementInst::isValidOperands((yyvsp[(2) - (4)].ValueVal), (yyvsp[(4) - (4)].ValueVal))) GEN_ERROR("Invalid extractelement operands"); @@ -6115,7 +6115,7 @@ break; case 307: -#line 2943 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2943 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!InsertElementInst::isValidOperands((yyvsp[(2) - (6)].ValueVal), (yyvsp[(4) - (6)].ValueVal), (yyvsp[(6) - (6)].ValueVal))) GEN_ERROR("Invalid insertelement operands"); @@ -6125,7 +6125,7 @@ break; case 308: -#line 2949 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2949 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ShuffleVectorInst::isValidOperands((yyvsp[(2) - (6)].ValueVal), (yyvsp[(4) - (6)].ValueVal), (yyvsp[(6) - (6)].ValueVal))) GEN_ERROR("Invalid shufflevector operands"); @@ -6135,7 +6135,7 @@ break; case 309: -#line 2955 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2955 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { const Type *Ty = (yyvsp[(2) - (2)].PHIList)->front().first->getType(); if (!Ty->isFirstClassType()) @@ -6154,7 +6154,7 @@ break; case 310: -#line 2971 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2971 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Handle the short syntax @@ -6255,7 +6255,7 @@ break; case 311: -#line 3068 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3068 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.InstVal) = (yyvsp[(1) - (1)].InstVal); CHECK_FOR_ERROR @@ -6263,7 +6263,7 @@ break; case 312: -#line 3073 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3073 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; CHECK_FOR_ERROR @@ -6271,7 +6271,7 @@ break; case 313: -#line 3077 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3077 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; CHECK_FOR_ERROR @@ -6279,7 +6279,7 @@ break; case 314: -#line 3084 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3084 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (3)].TypeVal))->getDescription()); @@ -6290,7 +6290,7 @@ break; case 315: -#line 3091 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3091 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (6)].TypeVal))->getDescription()); @@ -6302,7 +6302,7 @@ break; case 316: -#line 3099 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3099 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (3)].TypeVal))->getDescription()); @@ -6313,7 +6313,7 @@ break; case 317: -#line 3106 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3106 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (6)].TypeVal))->getDescription()); @@ -6325,7 +6325,7 @@ break; case 318: -#line 3114 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3114 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa((yyvsp[(2) - (2)].ValueVal)->getType())) GEN_ERROR("Trying to free nonpointer type " + @@ -6336,7 +6336,7 @@ break; case 319: -#line 3122 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3122 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (5)].TypeVal))->getDescription()); @@ -6354,7 +6354,7 @@ break; case 320: -#line 3136 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3136 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(5) - (7)].TypeVal))->getDescription()); @@ -6375,7 +6375,7 @@ break; case 321: -#line 3153 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3153 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { Value *TmpVal = getVal((yyvsp[(2) - (5)].TypeVal)->get(), (yyvsp[(3) - (5)].ValIDVal)); if (!GetResultInst::isValidOperands(TmpVal, (yyvsp[(5) - (5)].UInt64Val))) @@ -6387,7 +6387,7 @@ break; case 322: -#line 3161 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3161 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (4)].TypeVal))->getDescription()); @@ -6621,7 +6621,7 @@ } -#line 3178 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3178 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" // common code from the two 'RunVMAsmParser' functions Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs?rev=47642&r1=47641&r2=47642&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs Tue Feb 26 17:19:08 2008 @@ -344,7 +344,7 @@ #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED typedef union YYSTYPE -#line 953 "/Volumes/Nanpura/w/llvm/lib/AsmParser/llvmAsmParser.y" +#line 953 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { llvm::Module *ModuleVal; llvm::Function *FunctionVal; Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs?rev=47642&r1=47641&r2=47642&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Tue Feb 26 17:19:08 2008 @@ -2581,8 +2581,8 @@ BBTerminatorInst : RET ReturnedVal { // Return with a result... ValueList &VL = *$2; - if (!VL.empty()) - $$ = new ReturnInst(&VL[0], VL.size()); + assert(!VL.empty() && "Invalid ret operands!"); + $$ = new ReturnInst(&VL[0], VL.size()); delete $2; CHECK_FOR_ERROR } From alenhar2 at cs.uiuc.edu Tue Feb 26 17:20:38 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Tue, 26 Feb 2008 23:20:38 -0000 Subject: [llvm-commits] [llvm-gcc-4.0] r47643 - in /llvm-gcc-4.0/trunk/gcc: llvm-abi.h llvm-convert.cpp llvm-types.cpp Message-ID: <200802262320.m1QNKcZD022683@zion.cs.uiuc.edu> Author: alenhar2 Date: Tue Feb 26 17:20:38 2008 New Revision: 47643 URL: http://llvm.org/viewvc/llvm-project?rev=47643&view=rev Log: Backport this patch. I know 4.0 is dead, but I still need it until 4.2 is a bit more stable. Modified: llvm-gcc-4.0/trunk/gcc/llvm-abi.h llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp llvm-gcc-4.0/trunk/gcc/llvm-types.cpp Modified: llvm-gcc-4.0/trunk/gcc/llvm-abi.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-abi.h?rev=47643&r1=47642&r2=47643&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-abi.h (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-abi.h Tue Feb 26 17:20:38 2008 @@ -201,7 +201,7 @@ /// argument and invokes methods on the client that indicate how its pieces /// should be handled. This handles things like decimating structures into /// their fields. - void HandleArgument(tree type, uint16_t *Attributes = NULL) { + void HandleArgument(tree type, ParameterAttributes *Attributes = NULL) { const Type *Ty = ConvertType(type); if (isPassedByInvisibleReference(type)) { // variable size -> by-ref. Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp?rev=47643&r1=47642&r2=47643&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Tue Feb 26 17:20:38 2008 @@ -34,7 +34,7 @@ #include "llvm/InlineAsm.h" #include "llvm/Instructions.h" #include "llvm/Module.h" -#include "llvm/ParameterAttributes.h" +#include "llvm/ParamAttrsList.h" #include "llvm/Analysis/ConstantFolding.h" #include "llvm/Support/MathExtras.h" #include "llvm/Target/TargetAsmInfo.h" @@ -2958,7 +2958,7 @@ LValue LV = EmitLV(TREE_VALUE(arg)); assert(!LV.isBitfield() && "Bitfields are first-class types!"); Client.setLocation(LV.Ptr); - uint16_t Attributes = ParamAttr::None; + ParameterAttributes Attributes = ParamAttr::None; ABIConverter.HandleArgument(TREE_TYPE(TREE_VALUE(arg)), &Attributes); if (Attributes != ParamAttr::None) PAL= ParamAttrsList::includeAttrs(PAL, CallOperands.size(), Attributes); Modified: llvm-gcc-4.0/trunk/gcc/llvm-types.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-types.cpp?rev=47643&r1=47642&r2=47643&view=diff ============================================================================== --- llvm-gcc-4.0/trunk/gcc/llvm-types.cpp (original) +++ llvm-gcc-4.0/trunk/gcc/llvm-types.cpp Tue Feb 26 17:20:38 2008 @@ -29,7 +29,7 @@ #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" #include "llvm/Module.h" -#include "llvm/ParameterAttributes.h" +#include "llvm/ParamAttrsList.h" #include "llvm/TypeSymbolTable.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetMachine.h" @@ -937,7 +937,7 @@ } -static uint16_t HandleArgumentExtension(tree ArgTy) { +static ParameterAttributes HandleArgumentExtension(tree ArgTy) { if (TREE_CODE(ArgTy) == BOOLEAN_TYPE) { if (TREE_INT_CST_LOW(TYPE_SIZE(ArgTy)) < INT_TYPE_SIZE) return ParamAttr::ZExt; @@ -972,7 +972,7 @@ ParamAttrsVector Attrs; // Compute whether the result needs to be zext or sext'd. - uint16_t RAttributes = HandleArgumentExtension(ReturnType); + ParameterAttributes RAttributes = HandleArgumentExtension(ReturnType); if (RAttributes != ParamAttr::None) Attrs.push_back(ParamAttrsWithIndex::get(0, RAttributes)); @@ -993,7 +993,7 @@ tree ArgTy = TREE_TYPE(Args); // Determine if there are any attributes for this param. - uint16_t Attributes = ParamAttr::None; + ParameterAttributes Attributes = ParamAttr::None; ABIConverter.HandleArgument(ArgTy, &Attributes); @@ -1029,7 +1029,7 @@ // Compute attributes for return type (and function attributes). ParamAttrsVector Attrs; - uint16_t RAttributes = ParamAttr::None; + ParameterAttributes RAttributes = ParamAttr::None; int flags = flags_from_decl_or_type(decl ? decl : type); @@ -1105,7 +1105,7 @@ } // Determine if there are any attributes for this param. - uint16_t Attributes = ParamAttr::None; + ParameterAttributes Attributes = ParamAttr::None; ABIConverter.HandleArgument(ArgTy, &Attributes); @@ -1145,7 +1145,7 @@ // write through the byval pointer argument, which LLVM does not allow for // readonly/readnone functions. if (HasByVal && Attrs[0].index == 0) { - uint16_t &RAttrs = Attrs[0].attrs; + ParameterAttributes &RAttrs = Attrs[0].attrs; RAttrs &= ~(ParamAttr::ReadNone | ParamAttr::ReadOnly); if (RAttrs == ParamAttr::None) Attrs.erase(Attrs.begin()); From isanbard at gmail.com Tue Feb 26 17:22:40 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 26 Feb 2008 23:22:40 -0000 Subject: [llvm-commits] [llvm] r47644 - /llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll Message-ID: <200802262322.m1QNMedl022747@zion.cs.uiuc.edu> Author: void Date: Tue Feb 26 17:22:40 2008 New Revision: 47644 URL: http://llvm.org/viewvc/llvm-project?rev=47644&view=rev Log: Upgrade testcase. Modified: llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll Modified: llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll?rev=47644&r1=47643&r2=47644&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll Tue Feb 26 17:22:40 2008 @@ -1,55 +1,37 @@ -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ ; RUN: grep {stw r31, 20(r1)} -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ ; RUN: grep {stwu r1, -64(r1)} -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | grep {lwz r1, 0(r1)} -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep {lwz r1, 0(r1)} +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ ; RUN: grep {lwz r31, 20(r1)} -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ ; RUN: grep {stw r31, 20(r1)} -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ ; RUN: grep {stwu r1, -64(r1)} -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ ; RUN: grep {lwz r1, 0(r1)} -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ ; RUN: grep {lwz r31, 20(r1)} -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ +; RUN: llvm-as < %s | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ ; RUN: grep {std r31, 40(r1)} -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ +; RUN: llvm-as < %s | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ ; RUN: grep {stdu r1, -112(r1)} -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ +; RUN: llvm-as < %s | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ ; RUN: grep {ld r1, 0(r1)} -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ +; RUN: llvm-as < %s | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \ ; RUN: grep {ld r31, 40(r1)} -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: llvm-as < %s | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ ; RUN: grep {std r31, 40(r1)} -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: llvm-as < %s | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ ; RUN: grep {stdu r1, -112(r1)} -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: llvm-as < %s | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ ; RUN: grep {ld r1, 0(r1)} -; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: llvm-as < %s | llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ ; RUN: grep {ld r31, 40(r1)} - -implementation - -int* %f1(uint %n) { - %tmp = alloca int, uint %n - ret int* %tmp +define i32* @f1(i32 %n) { + %tmp = alloca i32, i32 %n ; [#uses=1] + ret i32* %tmp } From isanbard at gmail.com Tue Feb 26 18:20:28 2008 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 27 Feb 2008 00:20:28 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47647 - /llvm-gcc-4.2/trunk/build_gcc Message-ID: <200802270020.m1R0KSQm024436@zion.cs.uiuc.edu> Author: void Date: Tue Feb 26 18:20:27 2008 New Revision: 47647 URL: http://llvm.org/viewvc/llvm-project?rev=47647&view=rev Log: We should install the "cpp" program as well. Some projects rely upon it. Name it "llvm-cpp-4.2" for consistency. Modified: llvm-gcc-4.2/trunk/build_gcc Modified: llvm-gcc-4.2/trunk/build_gcc URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/build_gcc?rev=47647&r1=47646&r2=47647&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/build_gcc (original) +++ llvm-gcc-4.2/trunk/build_gcc Tue Feb 26 18:20:27 2008 @@ -355,12 +355,9 @@ # bin # The native drivers ('native' is different in different architectures). -BIN_FILES=`ls $DIR/dst-$BUILD-$BUILD$DEST_ROOT/bin | grep '^[^-]*-[0-9.]*$' \ - | grep -v gccbug | grep -v gcov || exit 1` mkdir .$DEST_ROOT/bin -for f in $BIN_FILES ; do - lipo -output .$DEST_ROOT/bin/$f -create $DIR/dst-*$DEST_ROOT/bin/$f || exit 1 -done +lipo -output .$DEST_ROOT/bin/llvm-cpp-$MAJ_VERS -create $DIR/dst-*$DEST_ROOT/bin/{llvm-cpp,cpp-$MAJ_VERS} || exit 1 + # gcov, which is special only because it gets built multiple times and lipo # will complain if we try to add two architectures into the same output. TARG0=`echo $TARGETS | cut -d ' ' -f 1` @@ -524,6 +521,7 @@ cd $DEST_DIR$LLVM_BIN_DIR ln -s -f ../llvm-gcc-$MAJ_VERS/bin/llvm-gcc-$MAJ_VERS llvm-gcc-$MAJ_VERS || exit 1 ln -s -f ../llvm-gcc-$MAJ_VERS/bin/llvm-g++-$MAJ_VERS llvm-g++-$MAJ_VERS || exit 1 +ln -s -f ../llvm-gcc-$MAJ_VERS/bin/llvm-cpp-$MAJ_VERS llvm-cpp-$MAJ_VERS || exit 1 # FIXME: This is a hack to get things working. for h in $HOSTS ; do From gohman at apple.com Tue Feb 26 18:25:32 2008 From: gohman at apple.com (Dan Gohman) Date: Wed, 27 Feb 2008 00:25:32 -0000 Subject: [llvm-commits] [llvm] r47648 - in /llvm/trunk: include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/DAGCombiner.cpp lib/CodeGen/SelectionDAG/TargetLowering.cpp Message-ID: <200802270025.m1R0PWxX024582@zion.cs.uiuc.edu> Author: djg Date: Tue Feb 26 18:25:32 2008 New Revision: 47648 URL: http://llvm.org/viewvc/llvm-project?rev=47648&view=rev Log: Convert SimplifyDemandedMask and ShrinkDemandedConstant to use APInt. Change several cases in SimplifyDemandedMask that don't ever do any simplifying to reuse the logic in ComputeMaskedBits instead of duplicating it. Modified: llvm/trunk/include/llvm/Target/TargetLowering.h llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Modified: llvm/trunk/include/llvm/Target/TargetLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=47648&r1=47647&r2=47648&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) +++ llvm/trunk/include/llvm/Target/TargetLowering.h Tue Feb 26 18:25:32 2008 @@ -610,7 +610,7 @@ /// specified instruction is a constant integer. If so, check to see if /// there are any bits set in the constant that are not demanded. If so, /// shrink the constant and return true. - bool ShrinkDemandedConstant(SDOperand Op, uint64_t Demanded); + bool ShrinkDemandedConstant(SDOperand Op, const APInt &Demanded); }; /// SimplifyDemandedBits - Look at Op. At this point, we know that only the @@ -621,8 +621,8 @@ /// KnownZero bits for the expression (used to simplify the caller). /// The KnownZero/One bits may only be accurate for those bits in the /// DemandedMask. - bool SimplifyDemandedBits(SDOperand Op, uint64_t DemandedMask, - uint64_t &KnownZero, uint64_t &KnownOne, + bool SimplifyDemandedBits(SDOperand Op, const APInt &DemandedMask, + APInt &KnownZero, APInt &KnownOne, TargetLoweringOpt &TLO, unsigned Depth = 0) const; /// computeMaskedBitsForTargetNode - Determine which of the bits specified in Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=47648&r1=47647&r2=47648&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Feb 26 18:25:32 2008 @@ -118,7 +118,12 @@ /// SimplifyDemandedBits - Check the specified integer node value to see if /// it can be simplified or if things it uses can be simplified by bit /// propagation. If so, return true. - bool SimplifyDemandedBits(SDOperand Op, uint64_t Demanded = ~0ULL); + bool SimplifyDemandedBits(SDOperand Op) { + APInt Demanded = APInt::getAllOnesValue(Op.getValueSizeInBits()); + return SimplifyDemandedBits(Op, Demanded); + } + + bool SimplifyDemandedBits(SDOperand Op, const APInt &Demanded); bool CombineToPreIndexedLoadStore(SDNode *N); bool CombineToPostIndexedLoadStore(SDNode *N); @@ -534,10 +539,9 @@ /// SimplifyDemandedBits - Check the specified integer node value to see if /// it can be simplified or if things it uses can be simplified by bit /// propagation. If so, return true. -bool DAGCombiner::SimplifyDemandedBits(SDOperand Op, uint64_t Demanded) { +bool DAGCombiner::SimplifyDemandedBits(SDOperand Op, const APInt &Demanded) { TargetLowering::TargetLoweringOpt TLO(DAG, AfterLegalize); - uint64_t KnownZero, KnownOne; - Demanded &= MVT::getIntVTBitMask(Op.getValueType()); + APInt KnownZero, KnownOne; if (!TLI.SimplifyDemandedBits(Op, Demanded, KnownZero, KnownOne, TLO)) return false; @@ -4501,7 +4505,10 @@ // Otherwise, see if we can simplify the operation with // SimplifyDemandedBits, which only works if the value has a single use. - if (SimplifyDemandedBits(Value, MVT::getIntVTBitMask(ST->getMemoryVT()))) + if (SimplifyDemandedBits(Value, + APInt::getLowBitsSet( + Value.getValueSizeInBits(), + MVT::getSizeInBits(ST->getMemoryVT())))) return SDOperand(N, 0); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47648&r1=47647&r2=47648&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Tue Feb 26 18:25:32 2008 @@ -443,7 +443,7 @@ /// are any bits set in the constant that are not demanded. If so, shrink the /// constant and return true. bool TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(SDOperand Op, - uint64_t Demanded) { + const APInt &Demanded) { // FIXME: ISD::SELECT, ISD::SELECT_CC switch(Op.getOpcode()) { default: break; @@ -451,10 +451,11 @@ case ISD::OR: case ISD::XOR: if (ConstantSDNode *C = dyn_cast(Op.getOperand(1))) - if ((~Demanded & C->getValue()) != 0) { + if (C->getAPIntValue().intersects(~Demanded)) { MVT::ValueType VT = Op.getValueType(); SDOperand New = DAG.getNode(Op.getOpcode(), VT, Op.getOperand(0), - DAG.getConstant(Demanded & C->getValue(), + DAG.getConstant(Demanded & + C->getAPIntValue(), VT)); return CombineTo(Op, New); } @@ -470,17 +471,20 @@ /// analyze the expression and return a mask of KnownOne and KnownZero bits for /// the expression (used to simplify the caller). The KnownZero/One bits may /// only be accurate for those bits in the DemandedMask. -bool TargetLowering::SimplifyDemandedBits(SDOperand Op, uint64_t DemandedMask, - uint64_t &KnownZero, - uint64_t &KnownOne, +bool TargetLowering::SimplifyDemandedBits(SDOperand Op, + const APInt &DemandedMask, + APInt &KnownZero, + APInt &KnownOne, TargetLoweringOpt &TLO, unsigned Depth) const { - KnownZero = KnownOne = 0; // Don't know anything. + unsigned BitWidth = DemandedMask.getBitWidth(); + assert(Op.getValueSizeInBits() == BitWidth && + "Mask size mismatches value type size!"); + APInt NewMask = DemandedMask; + + // Don't know anything. + KnownZero = KnownOne = APInt(BitWidth, 0); - // The masks are not wide enough to represent this type! Should use APInt. - if (Op.getValueType() == MVT::i128) - return false; - // Other users may use these bits. if (!Op.Val->hasOneUse()) { if (Depth != 0) { @@ -490,8 +494,8 @@ return false; } // If this is the root being simplified, allow it to have multiple uses, - // just set the DemandedMask to all bits. - DemandedMask = MVT::getIntVTBitMask(Op.getValueType()); + // just set the NewMask to all bits. + NewMask = APInt::getAllOnesValue(BitWidth); } else if (DemandedMask == 0) { // Not demanding any bits from Op. if (Op.getOpcode() != ISD::UNDEF) @@ -501,12 +505,12 @@ return false; } - uint64_t KnownZero2, KnownOne2, KnownZeroOut, KnownOneOut; + APInt KnownZero2, KnownOne2, KnownZeroOut, KnownOneOut; switch (Op.getOpcode()) { case ISD::Constant: // We know all of the bits for a constant! - KnownOne = cast(Op)->getValue() & DemandedMask; - KnownZero = ~KnownOne & DemandedMask; + KnownOne = cast(Op)->getAPIntValue() & NewMask; + KnownZero = ~KnownOne & NewMask; return false; // Don't fall through, will infinitely loop. case ISD::AND: // If the RHS is a constant, check to see if the LHS would be zero without @@ -514,38 +518,38 @@ // simplify the LHS, here we're using information from the LHS to simplify // the RHS. if (ConstantSDNode *RHSC = dyn_cast(Op.getOperand(1))) { - uint64_t LHSZero, LHSOne; - TLO.DAG.ComputeMaskedBits(Op.getOperand(0), DemandedMask, + APInt LHSZero, LHSOne; + TLO.DAG.ComputeMaskedBits(Op.getOperand(0), NewMask, LHSZero, LHSOne, Depth+1); // If the LHS already has zeros where RHSC does, this and is dead. - if ((LHSZero & DemandedMask) == (~RHSC->getValue() & DemandedMask)) + if ((LHSZero & NewMask) == (~RHSC->getAPIntValue() & NewMask)) return TLO.CombineTo(Op, Op.getOperand(0)); // If any of the set bits in the RHS are known zero on the LHS, shrink // the constant. - if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & DemandedMask)) + if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & NewMask)) return true; } - if (SimplifyDemandedBits(Op.getOperand(1), DemandedMask, KnownZero, + if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero, KnownOne, TLO, Depth+1)) return true; assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); - if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask & ~KnownZero, + if (SimplifyDemandedBits(Op.getOperand(0), ~KnownZero & NewMask, KnownZero2, KnownOne2, TLO, Depth+1)) return true; assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); // If all of the demanded bits are known one on one side, return the other. // These bits cannot contribute to the result of the 'and'. - if ((DemandedMask & ~KnownZero2 & KnownOne)==(DemandedMask & ~KnownZero2)) + if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask)) return TLO.CombineTo(Op, Op.getOperand(0)); - if ((DemandedMask & ~KnownZero & KnownOne2)==(DemandedMask & ~KnownZero)) + if ((NewMask & ~KnownZero & KnownOne2) == (~KnownZero & NewMask)) return TLO.CombineTo(Op, Op.getOperand(1)); // If all of the demanded bits in the inputs are known zeros, return zero. - if ((DemandedMask & (KnownZero|KnownZero2)) == DemandedMask) + if ((NewMask & (KnownZero|KnownZero2)) == NewMask) return TLO.CombineTo(Op, TLO.DAG.getConstant(0, Op.getValueType())); // If the RHS is a constant, see if we can simplify it. - if (TLO.ShrinkDemandedConstant(Op, DemandedMask & ~KnownZero2)) + if (TLO.ShrinkDemandedConstant(Op, ~KnownZero2 & NewMask)) return true; // Output known-1 bits are only known if set in both the LHS & RHS. @@ -554,31 +558,29 @@ KnownZero |= KnownZero2; break; case ISD::OR: - if (SimplifyDemandedBits(Op.getOperand(1), DemandedMask, KnownZero, + if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero, KnownOne, TLO, Depth+1)) return true; assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); - if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask & ~KnownOne, + if (SimplifyDemandedBits(Op.getOperand(0), ~KnownOne & NewMask, KnownZero2, KnownOne2, TLO, Depth+1)) return true; assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); // If all of the demanded bits are known zero on one side, return the other. // These bits cannot contribute to the result of the 'or'. - if ((DemandedMask & ~KnownOne2 & KnownZero) == (DemandedMask & ~KnownOne2)) + if ((NewMask & ~KnownOne2 & KnownZero) == (~KnownOne2 & NewMask)) return TLO.CombineTo(Op, Op.getOperand(0)); - if ((DemandedMask & ~KnownOne & KnownZero2) == (DemandedMask & ~KnownOne)) + if ((NewMask & ~KnownOne & KnownZero2) == (~KnownOne & NewMask)) return TLO.CombineTo(Op, Op.getOperand(1)); // If all of the potentially set bits on one side are known to be set on // the other side, just use the 'other' side. - if ((DemandedMask & (~KnownZero) & KnownOne2) == - (DemandedMask & (~KnownZero))) + if ((NewMask & ~KnownZero & KnownOne2) == (~KnownZero & NewMask)) return TLO.CombineTo(Op, Op.getOperand(0)); - if ((DemandedMask & (~KnownZero2) & KnownOne) == - (DemandedMask & (~KnownZero2))) + if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask)) return TLO.CombineTo(Op, Op.getOperand(1)); // If the RHS is a constant, see if we can simplify it. - if (TLO.ShrinkDemandedConstant(Op, DemandedMask)) + if (TLO.ShrinkDemandedConstant(Op, NewMask)) return true; // Output known-0 bits are only known if clear in both the LHS & RHS. @@ -587,26 +589,26 @@ KnownOne |= KnownOne2; break; case ISD::XOR: - if (SimplifyDemandedBits(Op.getOperand(1), DemandedMask, KnownZero, + if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero, KnownOne, TLO, Depth+1)) return true; assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); - if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask, KnownZero2, + if (SimplifyDemandedBits(Op.getOperand(0), NewMask, KnownZero2, KnownOne2, TLO, Depth+1)) return true; assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); // If all of the demanded bits are known zero on one side, return the other. // These bits cannot contribute to the result of the 'xor'. - if ((DemandedMask & KnownZero) == DemandedMask) + if ((KnownZero & NewMask) == NewMask) return TLO.CombineTo(Op, Op.getOperand(0)); - if ((DemandedMask & KnownZero2) == DemandedMask) + if ((KnownZero2 & NewMask) == NewMask) return TLO.CombineTo(Op, Op.getOperand(1)); // If all of the unknown bits are known to be zero on one side or the other // (but not both) turn this into an *inclusive* or. // e.g. (A & C1)^(B & C2) -> (A & C1)|(B & C2) iff C1&C2 == 0 - if ((DemandedMask & ~KnownZero & ~KnownZero2) == 0) + if ((NewMask & ~KnownZero & ~KnownZero2) == 0) return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::OR, Op.getValueType(), Op.getOperand(0), Op.getOperand(1))); @@ -620,10 +622,10 @@ // bits on that side are also known to be set on the other side, turn this // into an AND, as we know the bits will be cleared. // e.g. (X | C1) ^ C2 --> (X | C1) & ~C2 iff (C1&C2) == C2 - if ((DemandedMask & (KnownZero|KnownOne)) == DemandedMask) { // all known + if ((NewMask & (KnownZero|KnownOne)) == NewMask) { // all known if ((KnownOne & KnownOne2) == KnownOne) { MVT::ValueType VT = Op.getValueType(); - SDOperand ANDC = TLO.DAG.getConstant(~KnownOne & DemandedMask, VT); + SDOperand ANDC = TLO.DAG.getConstant(~KnownOne & NewMask, VT); return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::AND, VT, Op.getOperand(0), ANDC)); } @@ -631,29 +633,24 @@ // If the RHS is a constant, see if we can simplify it. // FIXME: for XOR, we prefer to force bits to 1 if they will make a -1. - if (TLO.ShrinkDemandedConstant(Op, DemandedMask)) + if (TLO.ShrinkDemandedConstant(Op, NewMask)) return true; KnownZero = KnownZeroOut; KnownOne = KnownOneOut; break; - case ISD::SETCC: - // If we know the result of a setcc has the top bits zero, use this info. - if (getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult) - KnownZero |= (MVT::getIntVTBitMask(Op.getValueType()) ^ 1ULL); - break; case ISD::SELECT: - if (SimplifyDemandedBits(Op.getOperand(2), DemandedMask, KnownZero, + if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero, KnownOne, TLO, Depth+1)) return true; - if (SimplifyDemandedBits(Op.getOperand(1), DemandedMask, KnownZero2, + if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero2, KnownOne2, TLO, Depth+1)) return true; assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); // If the operands are constants, see if we can simplify them. - if (TLO.ShrinkDemandedConstant(Op, DemandedMask)) + if (TLO.ShrinkDemandedConstant(Op, NewMask)) return true; // Only known if known in both the LHS and RHS. @@ -661,17 +658,17 @@ KnownZero &= KnownZero2; break; case ISD::SELECT_CC: - if (SimplifyDemandedBits(Op.getOperand(3), DemandedMask, KnownZero, + if (SimplifyDemandedBits(Op.getOperand(3), NewMask, KnownZero, KnownOne, TLO, Depth+1)) return true; - if (SimplifyDemandedBits(Op.getOperand(2), DemandedMask, KnownZero2, + if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero2, KnownOne2, TLO, Depth+1)) return true; assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); // If the operands are constants, see if we can simplify them. - if (TLO.ShrinkDemandedConstant(Op, DemandedMask)) + if (TLO.ShrinkDemandedConstant(Op, NewMask)) return true; // Only known if known in both the LHS and RHS. @@ -683,12 +680,16 @@ unsigned ShAmt = SA->getValue(); SDOperand InOp = Op.getOperand(0); + // If the shift count is an invalid immediate, don't do anything. + if (ShAmt >= BitWidth) + break; + // If this is ((X >>u C1) << ShAmt), see if we can simplify this into a // single shift. We can do this if the bottom bits (which are shifted // out) are never demanded. if (InOp.getOpcode() == ISD::SRL && isa(InOp.getOperand(1))) { - if (ShAmt && (DemandedMask & ((1ULL << ShAmt)-1)) == 0) { + if (ShAmt && (NewMask & APInt::getLowBitsSet(BitWidth, ShAmt)) == 0) { unsigned C1 = cast(InOp.getOperand(1))->getValue(); unsigned Opc = ISD::SHL; int Diff = ShAmt-C1; @@ -705,28 +706,32 @@ } } - if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask >> ShAmt, + if (SimplifyDemandedBits(Op.getOperand(0), NewMask.lshr(ShAmt), KnownZero, KnownOne, TLO, Depth+1)) return true; KnownZero <<= SA->getValue(); KnownOne <<= SA->getValue(); - KnownZero |= (1ULL << SA->getValue())-1; // low bits known zero. + // low bits known zero. + KnownZero |= APInt::getLowBitsSet(BitWidth, SA->getValue()); } break; case ISD::SRL: if (ConstantSDNode *SA = dyn_cast(Op.getOperand(1))) { MVT::ValueType VT = Op.getValueType(); unsigned ShAmt = SA->getValue(); - uint64_t TypeMask = MVT::getIntVTBitMask(VT); unsigned VTSize = MVT::getSizeInBits(VT); SDOperand InOp = Op.getOperand(0); + // If the shift count is an invalid immediate, don't do anything. + if (ShAmt >= BitWidth) + break; + // If this is ((X << C1) >>u ShAmt), see if we can simplify this into a // single shift. We can do this if the top bits (which are shifted out) // are never demanded. if (InOp.getOpcode() == ISD::SHL && isa(InOp.getOperand(1))) { - if (ShAmt && (DemandedMask & (~0ULL << (VTSize-ShAmt))) == 0) { + if (ShAmt && (NewMask & APInt::getHighBitsSet(VTSize, ShAmt)) == 0) { unsigned C1 = cast(InOp.getOperand(1))->getValue(); unsigned Opc = ISD::SRL; int Diff = ShAmt-C1; @@ -743,17 +748,14 @@ } // Compute the new bits that are at the top now. - if (SimplifyDemandedBits(InOp, (DemandedMask << ShAmt) & TypeMask, + if (SimplifyDemandedBits(InOp, (NewMask << ShAmt), KnownZero, KnownOne, TLO, Depth+1)) return true; assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); - KnownZero &= TypeMask; - KnownOne &= TypeMask; - KnownZero >>= ShAmt; - KnownOne >>= ShAmt; + KnownZero = KnownZero.lshr(ShAmt); + KnownOne = KnownOne.lshr(ShAmt); - uint64_t HighBits = (1ULL << ShAmt)-1; - HighBits <<= VTSize - ShAmt; + APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); KnownZero |= HighBits; // High bits known zero. } break; @@ -762,37 +764,34 @@ MVT::ValueType VT = Op.getValueType(); unsigned ShAmt = SA->getValue(); - // Compute the new bits that are at the top now. - uint64_t TypeMask = MVT::getIntVTBitMask(VT); - - uint64_t InDemandedMask = (DemandedMask << ShAmt) & TypeMask; + // If the shift count is an invalid immediate, don't do anything. + if (ShAmt >= BitWidth) + break; + + APInt InDemandedMask = (NewMask << ShAmt); // If any of the demanded bits are produced by the sign extension, we also // demand the input sign bit. - uint64_t HighBits = (1ULL << ShAmt)-1; - HighBits <<= MVT::getSizeInBits(VT) - ShAmt; - if (HighBits & DemandedMask) - InDemandedMask |= MVT::getIntVTSignBit(VT); + APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); + if (HighBits.intersects(NewMask)) + InDemandedMask |= APInt::getSignBit(MVT::getSizeInBits(VT)); if (SimplifyDemandedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, TLO, Depth+1)) return true; assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); - KnownZero &= TypeMask; - KnownOne &= TypeMask; - KnownZero >>= ShAmt; - KnownOne >>= ShAmt; + KnownZero = KnownZero.lshr(ShAmt); + KnownOne = KnownOne.lshr(ShAmt); - // Handle the sign bits. - uint64_t SignBit = MVT::getIntVTSignBit(VT); - SignBit >>= ShAmt; // Adjust to where it is now in the mask. + // Handle the sign bit, adjusted to where it is now in the mask. + APInt SignBit = APInt::getSignBit(BitWidth).lshr(ShAmt); // If the input sign bit is known to be zero, or if none of the top bits // are demanded, turn this into an unsigned shift right. - if ((KnownZero & SignBit) || (HighBits & ~DemandedMask) == HighBits) { + if (KnownZero.intersects(SignBit) || (HighBits & ~NewMask) == HighBits) { return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, VT, Op.getOperand(0), Op.getOperand(1))); - } else if (KnownOne & SignBit) { // New bits are known one. + } else if (KnownOne.intersects(SignBit)) { // New bits are known one. KnownOne |= HighBits; } } @@ -802,14 +801,19 @@ // Sign extension. Compute the demanded bits in the result that are not // present in the input. - uint64_t NewBits = ~MVT::getIntVTBitMask(EVT) & DemandedMask; + APInt NewBits = APInt::getHighBitsSet(BitWidth, + BitWidth - MVT::getSizeInBits(EVT)) & + NewMask; // If none of the extended bits are demanded, eliminate the sextinreg. if (NewBits == 0) return TLO.CombineTo(Op, Op.getOperand(0)); - uint64_t InSignBit = MVT::getIntVTSignBit(EVT); - int64_t InputDemandedBits = DemandedMask & MVT::getIntVTBitMask(EVT); + APInt InSignBit = APInt::getSignBit(MVT::getSizeInBits(EVT)); + InSignBit.zext(BitWidth); + APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, + MVT::getSizeInBits(EVT)) & + NewMask; // Since the sign extended bits are demanded, we know that the sign // bit is demanded. @@ -824,11 +828,11 @@ // top bits of the result. // If the input sign bit is known zero, convert this into a zero extension. - if (KnownZero & InSignBit) + if (KnownZero.intersects(InSignBit)) return TLO.CombineTo(Op, TLO.DAG.getZeroExtendInReg(Op.getOperand(0), EVT)); - if (KnownOne & InSignBit) { // Input sign bit known set + if (KnownOne.intersects(InSignBit)) { // Input sign bit known set KnownOne |= NewBits; KnownZero &= ~NewBits; } else { // Input sign bit unknown @@ -837,45 +841,34 @@ } break; } - case ISD::CTTZ: - case ISD::CTLZ: - case ISD::CTPOP: { - MVT::ValueType VT = Op.getValueType(); - unsigned LowBits = Log2_32(MVT::getSizeInBits(VT))+1; - KnownZero = ~((1ULL << LowBits)-1) & MVT::getIntVTBitMask(VT); - KnownOne = 0; - break; - } - case ISD::LOAD: { - if (ISD::isZEXTLoad(Op.Val)) { - LoadSDNode *LD = cast(Op); - MVT::ValueType VT = LD->getMemoryVT(); - KnownZero |= ~MVT::getIntVTBitMask(VT) & DemandedMask; - } - break; - } case ISD::ZERO_EXTEND: { - uint64_t InMask = MVT::getIntVTBitMask(Op.getOperand(0).getValueType()); + unsigned OperandBitWidth = Op.getOperand(0).getValueSizeInBits(); + APInt InMask = NewMask; + InMask.trunc(OperandBitWidth); // If none of the top bits are demanded, convert this into an any_extend. - uint64_t NewBits = (~InMask) & DemandedMask; - if (NewBits == 0) + APInt NewBits = + APInt::getHighBitsSet(BitWidth, BitWidth - OperandBitWidth) & NewMask; + if (!NewBits.intersects(NewMask)) return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND, Op.getValueType(), Op.getOperand(0))); - if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask & InMask, + if (SimplifyDemandedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, TLO, Depth+1)) return true; assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + KnownZero.zext(BitWidth); + KnownOne.zext(BitWidth); KnownZero |= NewBits; break; } case ISD::SIGN_EXTEND: { MVT::ValueType InVT = Op.getOperand(0).getValueType(); - uint64_t InMask = MVT::getIntVTBitMask(InVT); - uint64_t InSignBit = MVT::getIntVTSignBit(InVT); - uint64_t NewBits = (~InMask) & DemandedMask; + unsigned InBits = MVT::getSizeInBits(InVT); + APInt InMask = APInt::getLowBitsSet(BitWidth, InBits); + APInt InSignBit = APInt::getLowBitsSet(BitWidth, InBits); + APInt NewBits = ~InMask & NewMask; // If none of the top bits are demanded, convert this into an any_extend. if (NewBits == 0) @@ -884,21 +877,24 @@ // Since some of the sign extended bits are demanded, we know that the sign // bit is demanded. - uint64_t InDemandedBits = DemandedMask & InMask; + APInt InDemandedBits = InMask & NewMask; InDemandedBits |= InSignBit; + InDemandedBits.trunc(InBits); if (SimplifyDemandedBits(Op.getOperand(0), InDemandedBits, KnownZero, KnownOne, TLO, Depth+1)) return true; + KnownZero.zext(BitWidth); + KnownOne.zext(BitWidth); // If the sign bit is known zero, convert this to a zero extend. - if (KnownZero & InSignBit) + if (KnownZero.intersects(InSignBit)) return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ZERO_EXTEND, Op.getValueType(), Op.getOperand(0))); // If the sign bit is known one, the top bits match. - if (KnownOne & InSignBit) { + if (KnownOne.intersects(InSignBit)) { KnownOne |= NewBits; KnownZero &= ~NewBits; } else { // Otherwise, top bits aren't known. @@ -908,36 +904,45 @@ break; } case ISD::ANY_EXTEND: { - uint64_t InMask = MVT::getIntVTBitMask(Op.getOperand(0).getValueType()); - if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask & InMask, + unsigned OperandBitWidth = Op.getOperand(0).getValueSizeInBits(); + APInt InMask = NewMask; + InMask.trunc(OperandBitWidth); + if (SimplifyDemandedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, TLO, Depth+1)) return true; assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + KnownZero.zext(BitWidth); + KnownOne.zext(BitWidth); break; } case ISD::TRUNCATE: { // Simplify the input, using demanded bit information, and compute the known // zero/one bits live out. - if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask, + APInt TruncMask = NewMask; + TruncMask.zext(Op.getOperand(0).getValueSizeInBits()); + if (SimplifyDemandedBits(Op.getOperand(0), TruncMask, KnownZero, KnownOne, TLO, Depth+1)) return true; + KnownZero.trunc(BitWidth); + KnownOne.trunc(BitWidth); // If the input is only used by this truncate, see if we can shrink it based // on the known demanded bits. if (Op.getOperand(0).Val->hasOneUse()) { SDOperand In = Op.getOperand(0); + unsigned InBitWidth = In.getValueSizeInBits(); switch (In.getOpcode()) { default: break; case ISD::SRL: // Shrink SRL by a constant if none of the high bits shifted in are // demanded. if (ConstantSDNode *ShAmt = dyn_cast(In.getOperand(1))){ - uint64_t HighBits = MVT::getIntVTBitMask(In.getValueType()); - HighBits &= ~MVT::getIntVTBitMask(Op.getValueType()); - HighBits >>= ShAmt->getValue(); + APInt HighBits = APInt::getHighBitsSet(InBitWidth, + InBitWidth - BitWidth); + HighBits = HighBits.lshr(ShAmt->getValue()); + HighBits.trunc(BitWidth); - if (ShAmt->getValue() < MVT::getSizeInBits(Op.getValueType()) && - (DemandedMask & HighBits) == 0) { + if (ShAmt->getValue() < BitWidth && !(HighBits & NewMask)) { // None of the shifted in bits are needed. Add a truncate of the // shift input, then shift it. SDOperand NewTrunc = TLO.DAG.getNode(ISD::TRUNCATE, @@ -952,30 +957,24 @@ } assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); - uint64_t OutMask = MVT::getIntVTBitMask(Op.getValueType()); - KnownZero &= OutMask; - KnownOne &= OutMask; break; } case ISD::AssertZext: { MVT::ValueType VT = cast(Op.getOperand(1))->getVT(); - uint64_t InMask = MVT::getIntVTBitMask(VT); - if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask & InMask, + APInt InMask = APInt::getLowBitsSet(BitWidth, + MVT::getSizeInBits(VT)); + if (SimplifyDemandedBits(Op.getOperand(0), InMask & NewMask, KnownZero, KnownOne, TLO, Depth+1)) return true; assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); - KnownZero |= ~InMask & DemandedMask; + KnownZero |= ~InMask & NewMask; break; } - case ISD::FGETSIGN: - // All bits are zero except the low bit. - KnownZero = MVT::getIntVTBitMask(Op.getValueType()) ^ 1; - break; case ISD::BIT_CONVERT: #if 0 // If this is an FP->Int bitcast and if the sign bit is the only thing that // is demanded, turn this into a FGETSIGN. - if (DemandedMask == MVT::getIntVTSignBit(Op.getValueType()) && + if (NewMask == MVT::getIntVTSignBit(Op.getValueType()) && MVT::isFloatingPoint(Op.getOperand(0).getValueType()) && !MVT::isVector(Op.getOperand(0).getValueType())) { // Only do this xform if FGETSIGN is valid or if before legalize. @@ -998,14 +997,20 @@ case ISD::INTRINSIC_WO_CHAIN: case ISD::INTRINSIC_W_CHAIN: case ISD::INTRINSIC_VOID: + case ISD::CTTZ: + case ISD::CTLZ: + case ISD::CTPOP: + case ISD::LOAD: + case ISD::SETCC: + case ISD::FGETSIGN: // Just use ComputeMaskedBits to compute output bits. - TLO.DAG.ComputeMaskedBits(Op, DemandedMask, KnownZero, KnownOne, Depth); + TLO.DAG.ComputeMaskedBits(Op, NewMask, KnownZero, KnownOne, Depth); break; } // If we know the value of all of the demanded bits, return this as a // constant. - if ((DemandedMask & (KnownZero|KnownOne)) == DemandedMask) + if ((NewMask & (KnownZero|KnownOne)) == NewMask) return TLO.CombineTo(Op, TLO.DAG.getConstant(KnownOne, Op.getValueType())); return false; From sabre at nondot.org Tue Feb 26 19:17:20 2008 From: sabre at nondot.org (Chris Lattner) Date: Wed, 27 Feb 2008 01:17:20 -0000 Subject: [llvm-commits] [llvm] r47652 - /llvm/trunk/lib/Target/X86/README-X86-64.txt Message-ID: <200802270117.m1R1HKU1025969@zion.cs.uiuc.edu> Author: lattner Date: Tue Feb 26 19:17:20 2008 New Revision: 47652 URL: http://llvm.org/viewvc/llvm-project?rev=47652&view=rev Log: add a note Modified: llvm/trunk/lib/Target/X86/README-X86-64.txt Modified: llvm/trunk/lib/Target/X86/README-X86-64.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-X86-64.txt?rev=47652&r1=47651&r2=47652&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-X86-64.txt (original) +++ llvm/trunk/lib/Target/X86/README-X86-64.txt Tue Feb 26 19:17:20 2008 @@ -234,3 +234,30 @@ allocation magic to make the hack go away (e.g. putting additional constraints on the result of the movb). +//===---------------------------------------------------------------------===// + +This function: +double a(double b) {return (unsigned)b;} +compiles to this code: + +_a: + subq $8, %rsp + cvttsd2siq %xmm0, %rax + movl $4294967295, %ecx + andq %rcx, %rax + cvtsi2sdq %rax, %xmm0 + addq $8, %rsp + ret + +note the dead rsp adjustments. Also, there is surely a better/shorter way +to clear the top 32-bits of a 64-bit register than movl+andq. Testcase here: + +unsigned long long c(unsigned long long a) {return a&4294967295; } + +_c: + movl $4294967295, %ecx + movq %rdi, %rax + andq %rcx, %rax + ret + +//===---------------------------------------------------------------------===// From dpatel at apple.com Tue Feb 26 19:20:54 2008 From: dpatel at apple.com (Devang Patel) Date: Wed, 27 Feb 2008 01:20:54 -0000 Subject: [llvm-commits] [llvm] r47653 - in /llvm/trunk: include/llvm/Instructions.h lib/VMCore/Instructions.cpp Message-ID: <200802270120.m1R1KthH026081@zion.cs.uiuc.edu> Author: dpatel Date: Tue Feb 26 19:20:54 2008 New Revision: 47653 URL: http://llvm.org/viewvc/llvm-project?rev=47653&view=rev Log: Add comment. Modified: llvm/trunk/include/llvm/Instructions.h llvm/trunk/lib/VMCore/Instructions.cpp Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=47653&r1=47652&r2=47653&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Tue Feb 26 19:20:54 2008 @@ -1392,6 +1392,9 @@ // ReturnInst(Value* X, Inst *I) - 'ret X' instruction, insert before I // ReturnInst( null, BB *B) - 'ret void' instruction, insert @ end of BB // ReturnInst(Value* X, BB *B) - 'ret X' instruction, insert @ end of BB + // ReturnInst(Value* X, N) - 'ret X,X+1...X+N-1' instruction + // ReturnInst(Value* X, N, Inst *) - 'ret X,X+1...X+N-1', insert before I + // ReturnInst(Value* X, N, BB *) - 'ret X,X+1...X+N-1', insert @ end of BB // // NOTE: If the Value* passed is of type void then the constructor behaves as // if it was passed NULL. Modified: llvm/trunk/lib/VMCore/Instructions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=47653&r1=47652&r2=47653&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instructions.cpp (original) +++ llvm/trunk/lib/VMCore/Instructions.cpp Tue Feb 26 19:20:54 2008 @@ -617,7 +617,6 @@ } void ReturnInst::init(Value * const* retVals, unsigned N) { - assert (N > 0 && "Invalid operands numbers in ReturnInst init"); NumOperands = N; From gohman at apple.com Tue Feb 26 19:23:58 2008 From: gohman at apple.com (Dan Gohman) Date: Wed, 27 Feb 2008 01:23:58 -0000 Subject: [llvm-commits] [llvm] r47654 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAG.h lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/Target/PowerPC/PPCISelDAGToDAG.cpp lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200802270123.m1R1NwhT026228@zion.cs.uiuc.edu> Author: djg Date: Tue Feb 26 19:23:58 2008 New Revision: 47654 URL: http://llvm.org/viewvc/llvm-project?rev=47654&view=rev Log: Convert the last remaining users of the non-APInt form of ComputeMaskedBits to use the APInt form, and remove the non-APInt form. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=47654&r1=47653&r2=47654&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Tue Feb 26 19:23:58 2008 @@ -573,12 +573,6 @@ void ComputeMaskedBits(SDOperand Op, const APInt &Mask, APInt &KnownZero, APInt &KnownOne, unsigned Depth = 0) const; - /// ComputeMaskedBits - This is a wrapper around the APInt-using - /// form of ComputeMaskedBits for use by clients that haven't been converted - /// to APInt yet. - void ComputeMaskedBits(SDOperand Op, uint64_t Mask, uint64_t &KnownZero, - uint64_t &KnownOne, unsigned Depth = 0) const; - /// ComputeNumSignBits - Return the number of times the sign bit of the /// register is replicated into the other bits. We know that at least 1 bit /// is always equal to the sign bit (itself), but other cases can give us Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=47654&r1=47653&r2=47654&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Feb 26 19:23:58 2008 @@ -1507,25 +1507,6 @@ } } -/// ComputeMaskedBits - This is a wrapper around the APInt-using -/// form of ComputeMaskedBits for use by clients that haven't been converted -/// to APInt yet. -void SelectionDAG::ComputeMaskedBits(SDOperand Op, uint64_t Mask, - uint64_t &KnownZero, uint64_t &KnownOne, - unsigned Depth) const { - // The masks are not wide enough to represent this type! Should use APInt. - if (Op.getValueType() == MVT::i128) - return; - - unsigned NumBits = MVT::getSizeInBits(Op.getValueType()); - APInt APIntMask(NumBits, Mask); - APInt APIntKnownZero(NumBits, 0); - APInt APIntKnownOne(NumBits, 0); - ComputeMaskedBits(Op, APIntMask, APIntKnownZero, APIntKnownOne, Depth); - KnownZero = APIntKnownZero.getZExtValue(); - KnownOne = APIntKnownOne.getZExtValue(); -} - /// ComputeNumSignBits - Return the number of times the sign bit of the /// register is replicated into the other bits. We know that at least 1 bit /// is always equal to the sign bit (itself), but other cases can give us @@ -1637,18 +1618,18 @@ // Special case decrementing a value (ADD X, -1): if (ConstantSDNode *CRHS = dyn_cast(Op.getOperand(0))) if (CRHS->isAllOnesValue()) { - uint64_t KnownZero, KnownOne; - uint64_t Mask = MVT::getIntVTBitMask(VT); + APInt KnownZero, KnownOne; + APInt Mask = APInt::getAllOnesValue(VTBits); ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); // If the input is known to be 0 or 1, the output is 0/-1, which is all // sign bits set. - if ((KnownZero|1) == Mask) + if ((KnownZero | APInt(VTBits, 1)) == Mask) return VTBits; // If we are subtracting one from a positive number, there is no carry // out of the result. - if (KnownZero & MVT::getIntVTSignBit(VT)) + if (KnownZero.isNegative()) return Tmp; } @@ -1664,17 +1645,17 @@ // Handle NEG. if (ConstantSDNode *CLHS = dyn_cast(Op.getOperand(0))) if (CLHS->getValue() == 0) { - uint64_t KnownZero, KnownOne; - uint64_t Mask = MVT::getIntVTBitMask(VT); + APInt KnownZero, KnownOne; + APInt Mask = APInt::getAllOnesValue(VTBits); ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); // If the input is known to be 0 or 1, the output is 0/-1, which is all // sign bits set. - if ((KnownZero|1) == Mask) + if ((KnownZero | APInt(VTBits, 1)) == Mask) return VTBits; // If the input is known to be positive (the sign bit is known clear), // the output of the NEG has the same number of sign bits as the input. - if (KnownZero & MVT::getIntVTSignBit(VT)) + if (KnownZero.isNegative()) return Tmp2; // Otherwise, we treat this like a SUB. @@ -1718,14 +1699,13 @@ // Finally, if we can prove that the top bits of the result are 0's or 1's, // use this information. - uint64_t KnownZero, KnownOne; - uint64_t Mask = MVT::getIntVTBitMask(VT); + APInt KnownZero, KnownOne; + APInt Mask = APInt::getAllOnesValue(VTBits); ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); - uint64_t SignBit = MVT::getIntVTSignBit(VT); - if (KnownZero & SignBit) { // SignBit is 0 + if (KnownZero.isNegative()) { // sign bit is 0 Mask = KnownZero; - } else if (KnownOne & SignBit) { // SignBit is 1; + } else if (KnownOne.isNegative()) { // sign bit is 1; Mask = KnownOne; } else { // Nothing known. @@ -1734,11 +1714,11 @@ // Okay, we know that the sign bit in Mask is set. Use CLZ to determine // the number of identical bits in the top of the input value. - Mask ^= ~0ULL; - Mask <<= 64-VTBits; + Mask = ~Mask; + Mask <<= Mask.getBitWidth()-VTBits; // Return # leading zeros. We use 'min' here in case Val was zero before // shifting. We don't want to return '64' as for an i32 "0". - return std::min(VTBits, CountLeadingZeros_64(Mask)); + return std::min(VTBits, Mask.countLeadingZeros()); } Modified: llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=47654&r1=47653&r2=47654&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Tue Feb 26 19:23:58 2008 @@ -424,12 +424,12 @@ SDOperand Op0 = N->getOperand(0); SDOperand Op1 = N->getOperand(1); - uint64_t LKZ, LKO, RKZ, RKO; - CurDAG->ComputeMaskedBits(Op0, 0xFFFFFFFFULL, LKZ, LKO); - CurDAG->ComputeMaskedBits(Op1, 0xFFFFFFFFULL, RKZ, RKO); + APInt LKZ, LKO, RKZ, RKO; + CurDAG->ComputeMaskedBits(Op0, APInt::getAllOnesValue(32), LKZ, LKO); + CurDAG->ComputeMaskedBits(Op1, APInt::getAllOnesValue(32), RKZ, RKO); - unsigned TargetMask = LKZ; - unsigned InsertMask = RKZ; + unsigned TargetMask = LKZ.getZExtValue(); + unsigned InsertMask = RKZ.getZExtValue(); if ((TargetMask | InsertMask) == 0xFFFFFFFF) { unsigned Op0Opc = Op0.getOpcode(); Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=47654&r1=47653&r2=47654&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Tue Feb 26 19:23:58 2008 @@ -738,12 +738,16 @@ // If this is an or of disjoint bitfields, we can codegen this as an add // (for better address arithmetic) if the LHS and RHS of the OR are provably // disjoint. - uint64_t LHSKnownZero, LHSKnownOne; - uint64_t RHSKnownZero, RHSKnownOne; - DAG.ComputeMaskedBits(N.getOperand(0), ~0U, LHSKnownZero, LHSKnownOne); - - if (LHSKnownZero) { - DAG.ComputeMaskedBits(N.getOperand(1), ~0U, RHSKnownZero, RHSKnownOne); + APInt LHSKnownZero, LHSKnownOne; + APInt RHSKnownZero, RHSKnownOne; + DAG.ComputeMaskedBits(N.getOperand(0), + APInt::getAllOnesValue(32), + LHSKnownZero, LHSKnownOne); + + if (LHSKnownZero.getBoolValue()) { + DAG.ComputeMaskedBits(N.getOperand(1), + APInt::getAllOnesValue(32), + RHSKnownZero, RHSKnownOne); // If all of the bits are known zero on the LHS or RHS, the add won't // carry. if ((LHSKnownZero | RHSKnownZero) == ~0U) { @@ -793,9 +797,11 @@ // If this is an or of disjoint bitfields, we can codegen this as an add // (for better address arithmetic) if the LHS and RHS of the OR are // provably disjoint. - uint64_t LHSKnownZero, LHSKnownOne; - DAG.ComputeMaskedBits(N.getOperand(0), ~0U, LHSKnownZero, LHSKnownOne); - if ((LHSKnownZero|~(unsigned)imm) == ~0U) { + APInt LHSKnownZero, LHSKnownOne; + DAG.ComputeMaskedBits(N.getOperand(0), + APInt::getAllOnesValue(32), + LHSKnownZero, LHSKnownOne); + if ((LHSKnownZero.getZExtValue()|~(uint64_t)imm) == ~0ULL) { // If all of the bits are known zero on the LHS or RHS, the add won't // carry. Base = N.getOperand(0); @@ -901,9 +907,11 @@ // If this is an or of disjoint bitfields, we can codegen this as an add // (for better address arithmetic) if the LHS and RHS of the OR are // provably disjoint. - uint64_t LHSKnownZero, LHSKnownOne; - DAG.ComputeMaskedBits(N.getOperand(0), ~0U, LHSKnownZero, LHSKnownOne); - if ((LHSKnownZero|~(unsigned)imm) == ~0U) { + APInt LHSKnownZero, LHSKnownOne; + DAG.ComputeMaskedBits(N.getOperand(0), + APInt::getAllOnesValue(32), + LHSKnownZero, LHSKnownOne); + if ((LHSKnownZero.getZExtValue()|~(uint64_t)imm) == ~0ULL) { // If all of the bits are known zero on the LHS or RHS, the add won't // carry. Base = N.getOperand(0); From dalej at apple.com Tue Feb 26 19:32:53 2008 From: dalej at apple.com (Dale Johannesen) Date: Wed, 27 Feb 2008 01:32:53 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47655 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Message-ID: <200802270132.m1R1Wr5w026552@zion.cs.uiuc.edu> Author: johannes Date: Tue Feb 26 19:32:53 2008 New Revision: 47655 URL: http://llvm.org/viewvc/llvm-project?rev=47655&view=rev Log: Hack to handle darwin ppc32's weird choice of representation for bool. Fixes gcc.dg-struct-layout-1/t009 Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-types.cpp?rev=47655&r1=47654&r2=47655&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-types.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Tue Feb 26 19:32:53 2008 @@ -2171,6 +2171,37 @@ continue; tree TheGccTy = TREE_TYPE(Field); +#ifdef TARGET_POWERPC + // Normally gcc reduces the size of bitfields to the size necessary + // to hold the bits, e.g. a 1-bit field becomes QI. It does not do + // this for bool, which is no problem on most targets because + // sizeof(bool)==1. On darwin ppc32, however, sizeof(bool)==4, so + // we can have field types bigger than the union type here. Evade + // this by creating an appropriate int type here. + // + // It's possible this issue is not specific to ppc, but I doubt it. + + if (TREE_CODE(TheGccTy) == BOOLEAN_TYPE && + TYPE_SIZE_UNIT(TheGccTy) && + DECL_SIZE_UNIT(Field) && + TREE_CODE(DECL_SIZE_UNIT(Field)) == INTEGER_CST && + TREE_CODE(TYPE_SIZE_UNIT(TheGccTy)) == INTEGER_CST && + TREE_INT_CST_LOW(TYPE_SIZE_UNIT(TheGccTy)) > + TREE_INT_CST_LOW(DECL_SIZE_UNIT(Field))) { + bool sign = DECL_UNSIGNED(Field); + switch(TREE_INT_CST_LOW(DECL_SIZE_UNIT(Field))) { + case 1: TheGccTy = sign ? intQI_type_node : unsigned_intQI_type_node; + break; + case 2: TheGccTy = sign ? intHI_type_node : unsigned_intHI_type_node; + break; + case 4: TheGccTy = sign ? intSI_type_node : unsigned_intSI_type_node; + break; + case 8: TheGccTy = sign ? intDI_type_node : unsigned_intDI_type_node; + break; + default: assert(0 && "Unexpected field size"); break; + } + } +#endif const Type *TheTy = ConvertType(TheGccTy); unsigned Size = TD.getABITypeSize(TheTy); unsigned Align = TD.getABITypeAlignment(TheTy); From gohman at apple.com Tue Feb 26 19:52:30 2008 From: gohman at apple.com (Dan Gohman) Date: Wed, 27 Feb 2008 01:52:30 -0000 Subject: [llvm-commits] [llvm] r47656 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200802270152.m1R1qUFW027088@zion.cs.uiuc.edu> Author: djg Date: Tue Feb 26 19:52:30 2008 New Revision: 47656 URL: http://llvm.org/viewvc/llvm-project?rev=47656&view=rev Log: Teach Legalize how to expand an EXTRACT_ELEMENT. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47656&r1=47655&r2=47656&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Feb 26 19:52:30 2008 @@ -5739,6 +5739,12 @@ #endif assert(0 && "Do not know how to expand this operator!"); abort(); + case ISD::EXTRACT_ELEMENT: + ExpandOp(Node->getOperand(0), Lo, Hi); + if (cast(Node->getOperand(1))->getValue()) + return ExpandOp(Hi, Lo, Hi); + else + return ExpandOp(Lo, Lo, Hi); case ISD::EXTRACT_VECTOR_ELT: assert(VT==MVT::i64 && "Do not know how to expand this operator!"); // ExpandEXTRACT_VECTOR_ELT tolerates invalid result types. From evan.cheng at apple.com Tue Feb 26 20:18:53 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 26 Feb 2008 18:18:53 -0800 Subject: [llvm-commits] [llvm] r47656 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp In-Reply-To: <200802270152.m1R1qUFW027088@zion.cs.uiuc.edu> References: <200802270152.m1R1qUFW027088@zion.cs.uiuc.edu> Message-ID: <52DBD6EF-EAB9-417E-B09F-0F3084D6F171@apple.com> On Feb 26, 2008, at 5:52 PM, Dan Gohman wrote: > Author: djg > Date: Tue Feb 26 19:52:30 2008 > New Revision: 47656 > > URL: http://llvm.org/viewvc/llvm-project?rev=47656&view=rev > Log: > Teach Legalize how to expand an EXTRACT_ELEMENT. > > Modified: > llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47656&r1=47655&r2=47656&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Feb 26 > 19:52:30 2008 > @@ -5739,6 +5739,12 @@ > #endif > assert(0 && "Do not know how to expand this operator!"); > abort(); > + case ISD::EXTRACT_ELEMENT: > + ExpandOp(Node->getOperand(0), Lo, Hi); > + if (cast(Node->getOperand(1))->getValue()) > + return ExpandOp(Hi, Lo, Hi); > + else > + return ExpandOp(Lo, Lo, Hi); Before Chris pick on you for this. I might as well. :-) 'else' is not needed. Evan > > case ISD::EXTRACT_VECTOR_ELT: > assert(VT==MVT::i64 && "Do not know how to expand this > operator!"); > // ExpandEXTRACT_VECTOR_ELT tolerates invalid result types. > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Tue Feb 26 21:04:06 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 27 Feb 2008 03:04:06 -0000 Subject: [llvm-commits] [llvm] r47657 - in /llvm/trunk: include/llvm/CodeGen/MachineFrameInfo.h lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/MachineFunction.cpp lib/CodeGen/PrologEpilogInserter.cpp lib/CodeGen/VirtRegMap.cpp lib/CodeGen/VirtRegMap.h lib/Target/ARM/ARMRegisterInfo.cpp test/CodeGen/X86/2008-02-22-ReMatBug.ll Message-ID: <200802270304.m1R347QR029375@zion.cs.uiuc.edu> Author: evancheng Date: Tue Feb 26 21:04:06 2008 New Revision: 47657 URL: http://llvm.org/viewvc/llvm-project?rev=47657&view=rev Log: Spiller now remove unused spill slots. Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/lib/CodeGen/MachineFunction.cpp llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp llvm/trunk/lib/CodeGen/VirtRegMap.cpp llvm/trunk/lib/CodeGen/VirtRegMap.h llvm/trunk/lib/Target/ARM/ARMRegisterInfo.cpp llvm/trunk/test/CodeGen/X86/2008-02-22-ReMatBug.ll Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=47657&r1=47656&r2=47657&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Tue Feb 26 21:04:06 2008 @@ -80,7 +80,8 @@ // StackObject - Represent a single object allocated on the stack. struct StackObject { - // The size of this object on the stack. 0 means a variable sized object + // The size of this object on the stack. 0 means a variable sized object, + // ~0ULL means a dead object. uint64_t Size; // Alignment - The required alignment of this stack slot. @@ -292,6 +293,14 @@ return Objects[ObjectIdx+NumFixedObjects].isImmutable; } + /// isDeadObjectIndex - Returns true if the specified index corresponds to + /// a dead object. + bool isDeadObjectIndex(int ObjectIdx) const { + assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() && + "Invalid Object Idx!"); + return Objects[ObjectIdx+NumFixedObjects].Size == ~0ULL; + } + /// CreateStackObject - Create a new statically sized stack object, returning /// a postive identifier to represent it. /// @@ -304,6 +313,17 @@ return Objects.size()-NumFixedObjects-1; } + /// RemoveStackObject - Remove or mark dead a statically sized stack object. + /// + void RemoveStackObject(int ObjectIdx) { + if (ObjectIdx == (int)(Objects.size()-NumFixedObjects-1)) + // Last object, simply pop it off the list. + Objects.pop_back(); + else + // Mark it dead. + Objects[ObjectIdx+NumFixedObjects].Size = ~0ULL; + } + /// CreateVariableSizedObject - Notify the MachineFrameInfo object that a /// variable sized object has been created. This must be created whenever a /// variable sized object is created, whether or not the index returned is Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=47657&r1=47656&r2=47657&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Feb 26 21:04:06 2008 @@ -764,6 +764,9 @@ MachineInstr *fmi = isSS ? tii_->foldMemoryOperand(*mf_, MI, FoldOps, Slot) : tii_->foldMemoryOperand(*mf_, MI, FoldOps, DefMI); if (fmi) { + // Remember this instruction uses the spill slot. + if (isSS) vrm.addSpillSlotUse(Slot, fmi); + // Attempt to fold the memory reference into the instruction. If // we can do this, we don't need to insert spill code. if (lv_) Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=47657&r1=47656&r2=47657&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Tue Feb 26 21:04:06 2008 @@ -350,6 +350,10 @@ for (unsigned i = 0, e = Objects.size(); i != e; ++i) { const StackObject &SO = Objects[i]; OS << " : "; + if (SO.Size == ~0ULL) { + OS << "dead\n"; + continue; + } if (SO.Size == 0) OS << "variable sized"; else Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=47657&r1=47656&r2=47657&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original) +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Tue Feb 26 21:04:06 2008 @@ -406,6 +406,8 @@ continue; if (RS && (int)i == RS->getScavengingFrameIndex()) continue; + if (FFI->isDeadObjectIndex(i)) + continue; // If stack grows down, we need to add size of find the lowest // address of the object. Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=47657&r1=47656&r2=47657&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Tue Feb 26 21:04:06 2008 @@ -42,6 +42,7 @@ STATISTIC(NumReused, "Number of values reused"); STATISTIC(NumDSE , "Number of dead stores elided"); STATISTIC(NumDCE , "Number of copies elided"); +STATISTIC(NumDSS , "Number of dead spill slots removed"); namespace { enum SpillerName { simple, local }; @@ -64,7 +65,9 @@ : TII(*mf.getTarget().getInstrInfo()), MF(mf), Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT), Virt2ReMatIdMap(NO_STACK_SLOT), Virt2SplitMap(0), - Virt2SplitKillMap(0), ReMatMap(NULL), ReMatId(MAX_STACK_SLOT+1) { + Virt2SplitKillMap(0), ReMatMap(NULL), ReMatId(MAX_STACK_SLOT+1), + LowSpillSlot(NO_STACK_SLOT), HighSpillSlot(NO_STACK_SLOT) { + SpillSlotToUsesMap.resize(8); grow(); } @@ -83,21 +86,28 @@ assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && "attempt to assign stack slot to already spilled register"); const TargetRegisterClass* RC = MF.getRegInfo().getRegClass(virtReg); - int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(), - RC->getAlignment()); - Virt2StackSlotMap[virtReg] = frameIndex; + int SS = MF.getFrameInfo()->CreateStackObject(RC->getSize(), + RC->getAlignment()); + if (LowSpillSlot == NO_STACK_SLOT) + LowSpillSlot = SS; + if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot) + HighSpillSlot = SS; + unsigned Idx = SS-LowSpillSlot; + while (Idx >= SpillSlotToUsesMap.size()) + SpillSlotToUsesMap.resize(SpillSlotToUsesMap.size()*2); + Virt2StackSlotMap[virtReg] = SS; ++NumSpills; - return frameIndex; + return SS; } -void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) { +void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) { assert(TargetRegisterInfo::isVirtualRegister(virtReg)); assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && "attempt to assign stack slot to already spilled register"); - assert((frameIndex >= 0 || - (frameIndex >= MF.getFrameInfo()->getObjectIndexBegin())) && + assert((SS >= 0 || + (SS >= MF.getFrameInfo()->getObjectIndexBegin())) && "illegal fixed frame index"); - Virt2StackSlotMap[virtReg] = frameIndex; + Virt2StackSlotMap[virtReg] = SS; } int VirtRegMap::assignVirtReMatId(unsigned virtReg) { @@ -115,6 +125,13 @@ Virt2ReMatIdMap[virtReg] = id; } +void VirtRegMap::addSpillSlotUse(int FI, MachineInstr *MI) { + if (!MF.getFrameInfo()->isFixedObjectIndex(FI)) { + assert(FI >= 0 && "Spill slot index should not be negative!"); + SpillSlotToUsesMap[FI-LowSpillSlot].insert(MI); + } +} + void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI, MachineInstr *NewMI, ModRef MRInfo) { // Move previous memory references folded to new instruction. @@ -134,6 +151,21 @@ MI2VirtMap.insert(IP, std::make_pair(MI, std::make_pair(VirtReg, MRInfo))); } +void VirtRegMap::RemoveMachineInstrFromMaps(MachineInstr *MI) { + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + MachineOperand &MO = MI->getOperand(i); + if (!MO.isFrameIndex()) + continue; + int FI = MO.getIndex(); + if (MF.getFrameInfo()->isFixedObjectIndex(FI)) + continue; + SpillSlotToUsesMap[FI-LowSpillSlot].erase(MI); + } + MI2VirtMap.erase(MI); + SpillPt2VirtMap.erase(MI); + RestorePt2VirtMap.erase(MI); +} + void VirtRegMap::print(std::ostream &OS) const { const TargetRegisterInfo* TRI = MF.getTarget().getRegisterInfo(); @@ -204,14 +236,18 @@ std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg) == LoadedRegs.end()) { TII.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC); + MachineInstr *LoadMI = prior(MII); + VRM.addSpillSlotUse(StackSlot, LoadMI); LoadedRegs.push_back(VirtReg); ++NumLoads; - DOUT << '\t' << *prior(MII); + DOUT << '\t' << *LoadMI; } if (MO.isDef()) { TII.storeRegToStackSlot(MBB, next(MII), PhysReg, true, StackSlot, RC); + MachineInstr *StoreMI = next(MII); + VRM.addSpillSlotUse(StackSlot, StoreMI); ++NumStores; } } @@ -260,6 +296,16 @@ MBB != E; ++MBB) RewriteMBB(*MBB, VRM); + // Mark unused spill slots. + MachineFrameInfo *MFI = MF.getFrameInfo(); + int SS = VRM.getLowSpillSlot(); + if (SS != VirtRegMap::NO_STACK_SLOT) + for (int e = VRM.getHighSpillSlot(); SS <= e; ++SS) + if (!VRM.isSpillSlotUsed(SS)) { + MFI->RemoveStackObject(SS); + ++NumDSS; + } + DOUT << "**** Post Machine Instrs ****\n"; DEBUG(MF.dump()); @@ -725,6 +771,8 @@ } else { TII->loadRegFromStackSlot(*MBB, MII, NewPhysReg, NewOp.StackSlotOrReMat, AliasRC); + MachineInstr *LoadMI = prior(MII); + VRM.addSpillSlotUse(NewOp.StackSlotOrReMat, LoadMI); // Any stores to this stack slot are not dead anymore. MaybeDeadStores[NewOp.StackSlotOrReMat] = NULL; ++NumLoads; @@ -906,7 +954,9 @@ std::vector &KillOps, VirtRegMap &VRM) { TII->storeRegToStackSlot(MBB, next(MII), PhysReg, true, StackSlot, RC); - DOUT << "Store:\t" << *next(MII); + MachineInstr *StoreMI = next(MII); + VRM.addSpillSlotUse(StackSlot, StoreMI); + DOUT << "Store:\t" << *StoreMI; // If there is a dead store to this stack slot, nuke it now. if (LastStore) { @@ -918,8 +968,8 @@ bool CheckDef = PrevMII != MBB.begin(); if (CheckDef) --PrevMII; - MBB.erase(LastStore); VRM.RemoveMachineInstrFromMaps(LastStore); + MBB.erase(LastStore); if (CheckDef) { // Look at defs of killed registers on the store. Mark the defs // as dead since the store has been deleted and they aren't @@ -931,8 +981,8 @@ if (ReMatDefs.count(DeadDef) && !HasOtherDef) { // FIXME: This assumes a remat def does not have side // effects. - MBB.erase(DeadDef); VRM.RemoveMachineInstrFromMaps(DeadDef); + MBB.erase(DeadDef); ++NumDRM; } } @@ -1006,8 +1056,10 @@ ReMaterialize(MBB, MII, Phys, VirtReg, TRI, VRM); } else { const TargetRegisterClass* RC = RegInfo->getRegClass(VirtReg); - TII->loadRegFromStackSlot(MBB, &MI, Phys, VRM.getStackSlot(VirtReg), - RC); + int SS = VRM.getStackSlot(VirtReg); + TII->loadRegFromStackSlot(MBB, &MI, Phys, SS, RC); + MachineInstr *LoadMI = prior(MII); + VRM.addSpillSlotUse(SS, LoadMI); ++NumLoads; } // This invalidates Phys. @@ -1031,6 +1083,7 @@ int StackSlot = VRM.getStackSlot(VirtReg); TII->storeRegToStackSlot(MBB, next(MII), Phys, isKill, StackSlot, RC); MachineInstr *StoreMI = next(MII); + VRM.addSpillSlotUse(StackSlot, StoreMI); DOUT << "Store:\t" << StoreMI; VRM.virtFolded(VirtReg, StoreMI, VirtRegMap::isMod); } @@ -1257,6 +1310,8 @@ } else { const TargetRegisterClass* RC = RegInfo->getRegClass(VirtReg); TII->loadRegFromStackSlot(MBB, &MI, PhysReg, SSorRMId, RC); + MachineInstr *LoadMI = prior(MII); + VRM.addSpillSlotUse(SSorRMId, LoadMI); ++NumLoads; } // This invalidates PhysReg. @@ -1431,9 +1486,9 @@ if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) { ++NumDCE; DOUT << "Removing now-noop copy: " << MI; + VRM.RemoveMachineInstrFromMaps(&MI); MBB.erase(&MI); Erased = true; - VRM.RemoveMachineInstrFromMaps(&MI); Spills.disallowClobberPhysReg(VirtReg); goto ProcessNextInst; } @@ -1507,9 +1562,9 @@ if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) { ++NumDCE; DOUT << "Removing now-noop copy: " << MI; + VRM.RemoveMachineInstrFromMaps(&MI); MBB.erase(&MI); Erased = true; - VRM.RemoveMachineInstrFromMaps(&MI); UpdateKills(*LastStore, RegKills, KillOps); goto ProcessNextInst; } Modified: llvm/trunk/lib/CodeGen/VirtRegMap.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.h?rev=47657&r1=47656&r2=47657&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.h (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.h Tue Feb 26 21:04:06 2008 @@ -20,6 +20,7 @@ #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/IndexedMap.h" +#include "llvm/ADT/SmallPtrSet.h" #include "llvm/Support/Streams.h" #include @@ -98,6 +99,12 @@ /// conflicts with stack slot numbers. int ReMatId; + /// LowSpillSlot, HighSpillSlot - Lowest and highest spill slot indexes. + int LowSpillSlot, HighSpillSlot; + + /// SpillSlotToUsesMap - Records uses for each register spill slot. + SmallVector, 8> SpillSlotToUsesMap; + VirtRegMap(const VirtRegMap&); // DO NOT IMPLEMENT void operator=(const VirtRegMap&); // DO NOT IMPLEMENT @@ -299,6 +306,25 @@ RestorePt2VirtMap.erase(I); } + /// @brief Return lowest spill slot index. + int getLowSpillSlot() const { + return LowSpillSlot; + } + + /// @brief Return highest spill slot index. + int getHighSpillSlot() const { + return HighSpillSlot; + } + + /// @brief Records a spill slot use. + void addSpillSlotUse(int FrameIndex, MachineInstr *MI); + + /// @brief Returns true if spill slot has been used. + bool isSpillSlotUsed(int FrameIndex) const { + assert(FrameIndex >= 0 && "Spill slot index should not be negative!"); + return !SpillSlotToUsesMap[FrameIndex-LowSpillSlot].empty(); + } + /// @brief Updates information about the specified virtual register's value /// folded into newMI machine instruction. void virtFolded(unsigned VirtReg, MachineInstr *OldMI, MachineInstr *NewMI, @@ -317,11 +343,7 @@ /// RemoveMachineInstrFromMaps - MI is being erased, remove it from the /// the folded instruction map and spill point map. - void RemoveMachineInstrFromMaps(MachineInstr *MI) { - MI2VirtMap.erase(MI); - SpillPt2VirtMap.erase(MI); - RestorePt2VirtMap.erase(MI); - } + void RemoveMachineInstrFromMaps(MachineInstr *MI); void print(std::ostream &OS) const; void print(std::ostream *OS) const { if (OS) print(*OS); } Modified: llvm/trunk/lib/Target/ARM/ARMRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRegisterInfo.cpp?rev=47657&r1=47656&r2=47657&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMRegisterInfo.cpp Tue Feb 26 21:04:06 2008 @@ -870,6 +870,8 @@ if (FixedOff > Offset) Offset = FixedOff; } for (unsigned i = 0, e = FFI->getObjectIndexEnd(); i != e; ++i) { + if (FFI->isDeadObjectIndex(i)) + continue; Offset += FFI->getObjectSize(i); unsigned Align = FFI->getObjectAlignment(i); // Adjust to alignment boundary Modified: llvm/trunk/test/CodeGen/X86/2008-02-22-ReMatBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-22-ReMatBug.ll?rev=47657&r1=47656&r2=47657&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2008-02-22-ReMatBug.ll (original) +++ llvm/trunk/test/CodeGen/X86/2008-02-22-ReMatBug.ll Tue Feb 26 21:04:06 2008 @@ -1,4 +1,5 @@ ; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of re-materialization} | grep 3 +; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of dead spill slots removed} ; rdar://5761454 %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* } From clattner at apple.com Tue Feb 26 23:20:26 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 26 Feb 2008 21:20:26 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r47655 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp In-Reply-To: <200802270132.m1R1Wr5w026552@zion.cs.uiuc.edu> References: <200802270132.m1R1Wr5w026552@zion.cs.uiuc.edu> Message-ID: On Feb 26, 2008, at 5:32 PM, Dale Johannesen wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=47655&view=rev > Log: > Hack to handle darwin ppc32's weird choice of > representation for bool. Fixes > gcc.dg-struct-layout-1/t009 Nice! > tree TheGccTy = TREE_TYPE(Field); > +#ifdef TARGET_POWERPC Eww. :) Is this information encoded in the trees somehow? Duncan, do you have any idea? Dale, can you include a tree dump of the type in this case? -Chris From sabre at nondot.org Tue Feb 26 23:47:54 2008 From: sabre at nondot.org (Chris Lattner) Date: Wed, 27 Feb 2008 05:47:54 -0000 Subject: [llvm-commits] [llvm] r47658 - in /llvm/trunk: lib/Target/X86/README-X86-64.txt lib/Target/X86/X86Instr64bit.td test/CodeGen/X86/x86-64-and-mask.ll Message-ID: <200802270547.m1R5ls0N001359@zion.cs.uiuc.edu> Author: lattner Date: Tue Feb 26 23:47:54 2008 New Revision: 47658 URL: http://llvm.org/viewvc/llvm-project?rev=47658&view=rev Log: Compile x86-64-and-mask.ll into: _test: movl %edi, %eax ret instead of: _test: movl $4294967295, %ecx movq %rdi, %rax andq %rcx, %rax ret It would be great to write this as a Pat pattern that used subregs instead of a 'pseudo' instruction, but I don't know how to do that in td files. Added: llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll Modified: llvm/trunk/lib/Target/X86/README-X86-64.txt llvm/trunk/lib/Target/X86/X86Instr64bit.td Modified: llvm/trunk/lib/Target/X86/README-X86-64.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-X86-64.txt?rev=47658&r1=47657&r2=47658&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-X86-64.txt (original) +++ llvm/trunk/lib/Target/X86/README-X86-64.txt Tue Feb 26 23:47:54 2008 @@ -249,15 +249,6 @@ addq $8, %rsp ret -note the dead rsp adjustments. Also, there is surely a better/shorter way -to clear the top 32-bits of a 64-bit register than movl+andq. Testcase here: - -unsigned long long c(unsigned long long a) {return a&4294967295; } - -_c: - movl $4294967295, %ecx - movq %rdi, %rax - andq %rcx, %rax - ret +note the dead rsp adjustments. //===---------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=47658&r1=47657&r2=47658&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original) +++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Tue Feb 26 23:47:54 2008 @@ -61,6 +61,13 @@ return (int64_t)N->getValue() == (int8_t)N->getValue(); }]>; +def i64immFFFFFFFF : PatLeaf<(i64 imm), [{ + // i64immFFFFFFFF - True if this is a specific constant we can't write in + // tblgen files. + return N->getValue() == 0x00000000FFFFFFFFULL; +}]>; + + def sextloadi64i8 : PatFrag<(ops node:$ptr), (i64 (sextloadi8 node:$ptr))>; def sextloadi64i16 : PatFrag<(ops node:$ptr), (i64 (sextloadi16 node:$ptr))>; def sextloadi64i32 : PatFrag<(ops node:$ptr), (i64 (sextloadi32 node:$ptr))>; @@ -1091,6 +1098,12 @@ "mov{l}\t{$src, ${dst:subreg32}|${dst:subreg32}, $src}", [(set GR64:$dst, (zextloadi64i32 addr:$src))]>; +/// PsAND64rrFFFFFFFF - r = r & (2^32-1) +def PsAND64rrFFFFFFFF + : I<0x89, MRMDestReg, (outs GR64:$dst), (ins GR64:$src), + "mov{l}\t{${src:subreg32}, ${dst:subreg32}|${dst:subreg32}, ${src:subreg32}}", + [(set GR64:$dst, (and GR64:$src, i64immFFFFFFFF))]>; + // Alias instructions that map movr0 to xor. Use xorl instead of xorq; it's // equivalent due to implicit zero-extending, and it sometimes has a smaller Added: llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll?rev=47658&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll (added) +++ llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll Tue Feb 26 23:47:54 2008 @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc | grep {movl.*%edi, %eax} +; This should be a single mov, not a load of immediate + andq. + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-apple-darwin8" + +define i64 @test(i64 %x) nounwind { +entry: + %tmp123 = and i64 %x, 4294967295 ; [#uses=1] + ret i64 %tmp123 +} + From sabre at nondot.org Tue Feb 26 23:48:44 2008 From: sabre at nondot.org (Chris Lattner) Date: Wed, 27 Feb 2008 05:48:44 -0000 Subject: [llvm-commits] [llvm] r47659 - /llvm/trunk/lib/Target/X86/README-X86-64.txt Message-ID: <200802270548.m1R5miC3001390@zion.cs.uiuc.edu> Author: lattner Date: Tue Feb 26 23:48:44 2008 New Revision: 47659 URL: http://llvm.org/viewvc/llvm-project?rev=47659&view=rev Log: this code is correct but strange looking ;-) Modified: llvm/trunk/lib/Target/X86/README-X86-64.txt Modified: llvm/trunk/lib/Target/X86/README-X86-64.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-X86-64.txt?rev=47659&r1=47658&r2=47659&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-X86-64.txt (original) +++ llvm/trunk/lib/Target/X86/README-X86-64.txt Tue Feb 26 23:48:44 2008 @@ -243,8 +243,7 @@ _a: subq $8, %rsp cvttsd2siq %xmm0, %rax - movl $4294967295, %ecx - andq %rcx, %rax + movl %eax, %eax cvtsi2sdq %rax, %xmm0 addq $8, %rsp ret From sabre at nondot.org Tue Feb 26 23:57:41 2008 From: sabre at nondot.org (Chris Lattner) Date: Wed, 27 Feb 2008 05:57:41 -0000 Subject: [llvm-commits] [llvm] r47660 - in /llvm/trunk: lib/Target/X86/README-X86-64.txt lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/x86-64-dead-stack-adjust.ll Message-ID: <200802270557.m1R5vf9h001642@zion.cs.uiuc.edu> Author: lattner Date: Tue Feb 26 23:57:41 2008 New Revision: 47660 URL: http://llvm.org/viewvc/llvm-project?rev=47660&view=rev Log: Make X86TargetLowering::LowerSINT_TO_FP return without creating a dead stack slot and store if the SINT_TO_FP is actually legal. This allows us to compile: double a(double b) {return (unsigned)b;} to: _a: cvttsd2siq %xmm0, %rax movl %eax, %eax cvtsi2sdq %rax, %xmm0 ret instead of: _a: subq $8, %rsp cvttsd2siq %xmm0, %rax movl %eax, %eax cvtsi2sdq %rax, %xmm0 addq $8, %rsp ret crazy. Added: llvm/trunk/test/CodeGen/X86/x86-64-dead-stack-adjust.ll Modified: llvm/trunk/lib/Target/X86/README-X86-64.txt llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/README-X86-64.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-X86-64.txt?rev=47660&r1=47659&r2=47660&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-X86-64.txt (original) +++ llvm/trunk/lib/Target/X86/README-X86-64.txt Tue Feb 26 23:57:41 2008 @@ -236,18 +236,3 @@ //===---------------------------------------------------------------------===// -This function: -double a(double b) {return (unsigned)b;} -compiles to this code: - -_a: - subq $8, %rsp - cvttsd2siq %xmm0, %rax - movl %eax, %eax - cvtsi2sdq %rax, %xmm0 - addq $8, %rsp - ret - -note the dead rsp adjustments. - -//===---------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47660&r1=47659&r2=47660&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Feb 26 23:57:41 2008 @@ -4148,12 +4148,17 @@ } SDOperand X86TargetLowering::LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) { - assert(Op.getOperand(0).getValueType() <= MVT::i64 && - Op.getOperand(0).getValueType() >= MVT::i16 && - "Unknown SINT_TO_FP to lower!"); - - SDOperand Result; MVT::ValueType SrcVT = Op.getOperand(0).getValueType(); + assert(SrcVT <= MVT::i64 && SrcVT >= MVT::i16 && + "Unknown SINT_TO_FP to lower!"); + + // These are really Legal; caller falls through into that case. + if (SrcVT == MVT::i32 && isScalarFPTypeInSSEReg(Op.getValueType())) + return SDOperand(); + if (SrcVT == MVT::i64 && Op.getValueType() != MVT::f80 && + Subtarget->is64Bit()) + return SDOperand(); + unsigned Size = MVT::getSizeInBits(SrcVT)/8; MachineFunction &MF = DAG.getMachineFunction(); int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size); @@ -4163,13 +4168,6 @@ PseudoSourceValue::getFixedStack(), SSFI); - // These are really Legal; caller falls through into that case. - if (SrcVT == MVT::i32 && isScalarFPTypeInSSEReg(Op.getValueType())) - return Result; - if (SrcVT == MVT::i64 && Op.getValueType() != MVT::f80 && - Subtarget->is64Bit()) - return Result; - // Build the FILD SDVTList Tys; bool useSSE = isScalarFPTypeInSSEReg(Op.getValueType()); @@ -4181,8 +4179,8 @@ Ops.push_back(Chain); Ops.push_back(StackSlot); Ops.push_back(DAG.getValueType(SrcVT)); - Result = DAG.getNode(useSSE ? X86ISD::FILD_FLAG :X86ISD::FILD, - Tys, &Ops[0], Ops.size()); + SDOperand Result = DAG.getNode(useSSE ? X86ISD::FILD_FLAG : X86ISD::FILD, + Tys, &Ops[0], Ops.size()); if (useSSE) { Chain = Result.getValue(1); Added: llvm/trunk/test/CodeGen/X86/x86-64-dead-stack-adjust.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-dead-stack-adjust.ll?rev=47660&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/x86-64-dead-stack-adjust.ll (added) +++ llvm/trunk/test/CodeGen/X86/x86-64-dead-stack-adjust.ll Tue Feb 26 23:57:41 2008 @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | not grep rsp +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-apple-darwin8" + +define double @a(double %b) nounwind { +entry: + %tmp12 = fptoui double %b to i32 ; [#uses=1] + %tmp123 = uitofp i32 %tmp12 to double ; [#uses=1] + ret double %tmp123 +} From sabre at nondot.org Wed Feb 27 00:17:10 2008 From: sabre at nondot.org (Chris Lattner) Date: Wed, 27 Feb 2008 06:17:10 -0000 Subject: [llvm-commits] [llvm] r47662 - in /llvm/trunk: include/llvm/System/Path.h lib/System/Path.cpp lib/System/Unix/Path.inc lib/System/Win32/Path.inc Message-ID: <200802270617.m1R6HAGo002173@zion.cs.uiuc.edu> Author: lattner Date: Wed Feb 27 00:17:10 2008 New Revision: 47662 URL: http://llvm.org/viewvc/llvm-project?rev=47662&view=rev Log: Add path separator support, patch by Sam Bishop. Modified: llvm/trunk/include/llvm/System/Path.h llvm/trunk/lib/System/Path.cpp llvm/trunk/lib/System/Unix/Path.inc llvm/trunk/lib/System/Win32/Path.inc Modified: llvm/trunk/include/llvm/System/Path.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/Path.h?rev=47662&r1=47661&r2=47662&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/Path.h (original) +++ llvm/trunk/include/llvm/System/Path.h Wed Feb 27 00:17:10 2008 @@ -662,6 +662,10 @@ /// @returns true if an error occurs, false otherwise /// @brief Copy one file to another. bool CopyFile(const Path& Dest, const Path& Src, std::string* ErrMsg); + + /// This is the OS-specific path separator: a colon on Unix or a semicolon + /// on Windows. + extern const char PathSeparator; } std::ostream& operator<<(std::ostream& strm, const sys::Path& aPath); Modified: llvm/trunk/lib/System/Path.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Path.cpp?rev=47662&r1=47661&r2=47662&view=diff ============================================================================== --- llvm/trunk/lib/System/Path.cpp (original) +++ llvm/trunk/lib/System/Path.cpp Wed Feb 27 00:17:10 2008 @@ -177,6 +177,25 @@ return path.substr(path.rfind('.') + 1); } +static void getPathList(const char*path, std::vector& Paths) { + const char* at = path; + const char* delim = strchr(at, PathSeparator); + Path tmpPath; + while (delim != 0) { + std::string tmp(at, size_t(delim-at)); + if (tmpPath.set(tmp)) + if (tmpPath.canRead()) + Paths.push_back(tmpPath); + at = delim + 1; + delim = strchr(at, PathSeparator); + } + + if (*at != 0) + if (tmpPath.set(std::string(at))) + if (tmpPath.canRead()) + Paths.push_back(tmpPath); +} + // Include the truly platform-specific parts of this class. #if defined(LLVM_ON_UNIX) #include "Unix/Path.inc" Modified: llvm/trunk/lib/System/Unix/Path.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Unix/Path.inc?rev=47662&r1=47661&r2=47662&view=diff ============================================================================== --- llvm/trunk/lib/System/Unix/Path.inc (original) +++ llvm/trunk/lib/System/Unix/Path.inc Wed Feb 27 00:17:10 2008 @@ -63,6 +63,8 @@ namespace llvm { using namespace sys; +extern const char sys::PathSeparator = ':'; + bool Path::isValid() const { // Check some obvious things @@ -183,25 +185,6 @@ #endif } -static void getPathList(const char*path, std::vector& Paths) { - const char* at = path; - const char* delim = strchr(at, ':'); - Path tmpPath; - while( delim != 0 ) { - std::string tmp(at, size_t(delim-at)); - if (tmpPath.set(tmp)) - if (tmpPath.canRead()) - Paths.push_back(tmpPath); - at = delim + 1; - delim = strchr(at, ':'); - } - if (*at != 0) - if (tmpPath.set(std::string(at))) - if (tmpPath.canRead()) - Paths.push_back(tmpPath); - -} - void Path::GetSystemLibraryPaths(std::vector& Paths) { #ifdef LTDL_SHLIBPATH_VAR Modified: llvm/trunk/lib/System/Win32/Path.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/Path.inc?rev=47662&r1=47661&r2=47662&view=diff ============================================================================== --- llvm/trunk/lib/System/Win32/Path.inc (original) +++ llvm/trunk/lib/System/Win32/Path.inc Wed Feb 27 00:17:10 2008 @@ -45,6 +45,8 @@ namespace llvm { namespace sys { +extern const char sys::PathSeparator = ';'; + bool Path::isValid() const { if (path.empty()) @@ -164,25 +166,6 @@ return result; } -static void getPathList(const char*path, std::vector& Paths) { - const char* at = path; - const char* delim = strchr(at, ';'); - Path tmpPath; - while (delim != 0) { - std::string tmp(at, size_t(delim-at)); - if (tmpPath.set(tmp)) - if (tmpPath.canRead()) - Paths.push_back(tmpPath); - at = delim + 1; - delim = strchr(at, ';'); - } - - if (*at != 0) - if (tmpPath.set(std::string(at))) - if (tmpPath.canRead()) - Paths.push_back(tmpPath); -} - void Path::GetSystemLibraryPaths(std::vector& Paths) { Paths.push_back(sys::Path("C:/WINDOWS/SYSTEM32")); From isanbard at gmail.com Wed Feb 27 00:33:06 2008 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 27 Feb 2008 06:33:06 -0000 Subject: [llvm-commits] [llvm] r47663 - in /llvm/trunk: include/llvm/IntrinsicsCellSPU.td lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp lib/CodeGen/VirtRegMap.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/Alpha/AlphaInstrInfo.td lib/Target/IA64/IA64InstrInfo.td lib/Target/IA64/IA64RegisterInfo.td lib/Target/Mips/MipsAsmPrinter.cpp lib/Target/PowerPC/PPCInstrInfo.td lib/Target/Sparc/SparcInstrInfo.td Message-ID: <200802270633.m1R6X63g002651@zion.cs.uiuc.edu> Author: void Date: Wed Feb 27 00:33:05 2008 New Revision: 47663 URL: http://llvm.org/viewvc/llvm-project?rev=47663&view=rev Log: Final de-tabification. Modified: llvm/trunk/include/llvm/IntrinsicsCellSPU.td llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp llvm/trunk/lib/CodeGen/VirtRegMap.cpp llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td llvm/trunk/lib/Target/IA64/IA64InstrInfo.td llvm/trunk/lib/Target/IA64/IA64RegisterInfo.td llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td Modified: llvm/trunk/include/llvm/IntrinsicsCellSPU.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsCellSPU.td?rev=47663&r1=47662&r2=47663&view=diff ============================================================================== --- llvm/trunk/include/llvm/IntrinsicsCellSPU.td (original) +++ llvm/trunk/include/llvm/IntrinsicsCellSPU.td Wed Feb 27 00:33:05 2008 @@ -86,18 +86,18 @@ class v4f32_rr : GCCBuiltin, Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty], - [IntrNoMem]>; + [IntrNoMem]>; class v4f32_rrr : GCCBuiltin, Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty], - [IntrNoMem]>; + [IntrNoMem]>; class v2f64_rr : GCCBuiltin, Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty], - [IntrNoMem]>; - + [IntrNoMem]>; + // All Cell SPU intrinsics start with "llvm.spu.". let TargetPrefix = "spu" in { def int_spu_si_fsmbi : v8i16_u16imm<"fsmbi">; @@ -213,31 +213,30 @@ def int_spu_si_nor: v4i32_rr<"nor">; def int_spu_si_nand: v4i32_rr<"nand">; - def int_spu_si_fa: v4f32_rr<"fa">; - def int_spu_si_fs: v4f32_rr<"fs">; - def int_spu_si_fm: v4f32_rr<"fm">; - - def int_spu_si_fceq: v4f32_rr<"fceq">; - def int_spu_si_fcmeq: v4f32_rr<"fcmeq">; - def int_spu_si_fcgt: v4f32_rr<"fcgt">; - def int_spu_si_fcmgt: v4f32_rr<"fcmgt">; - - def int_spu_si_fma: v4f32_rrr<"fma">; - def int_spu_si_fnms: v4f32_rrr<"fnms">; - def int_spu_si_fms: v4f32_rrr<"fms">; - - def int_spu_si_dfa: v2f64_rr<"dfa">; - def int_spu_si_dfs: v2f64_rr<"dfs">; - def int_spu_si_dfm: v2f64_rr<"dfm">; - -//def int_spu_si_dfceq: v2f64_rr<"dfceq">; -//def int_spu_si_dfcmeq: v2f64_rr<"dfcmeq">; -//def int_spu_si_dfcgt: v2f64_rr<"dfcgt">; -//def int_spu_si_dfcmgt: v2f64_rr<"dfcmgt">; - - def int_spu_si_dfnma: v2f64_rr<"dfnma">; - def int_spu_si_dfma: v2f64_rr<"dfma">; - def int_spu_si_dfnms: v2f64_rr<"dfnms">; - def int_spu_si_dfms: v2f64_rr<"dfms">; - + def int_spu_si_fa: v4f32_rr<"fa">; + def int_spu_si_fs: v4f32_rr<"fs">; + def int_spu_si_fm: v4f32_rr<"fm">; + + def int_spu_si_fceq: v4f32_rr<"fceq">; + def int_spu_si_fcmeq: v4f32_rr<"fcmeq">; + def int_spu_si_fcgt: v4f32_rr<"fcgt">; + def int_spu_si_fcmgt: v4f32_rr<"fcmgt">; + + def int_spu_si_fma: v4f32_rrr<"fma">; + def int_spu_si_fnms: v4f32_rrr<"fnms">; + def int_spu_si_fms: v4f32_rrr<"fms">; + + def int_spu_si_dfa: v2f64_rr<"dfa">; + def int_spu_si_dfs: v2f64_rr<"dfs">; + def int_spu_si_dfm: v2f64_rr<"dfm">; + +//def int_spu_si_dfceq: v2f64_rr<"dfceq">; +//def int_spu_si_dfcmeq: v2f64_rr<"dfcmeq">; +//def int_spu_si_dfcgt: v2f64_rr<"dfcgt">; +//def int_spu_si_dfcmgt: v2f64_rr<"dfcmgt">; + + def int_spu_si_dfnma: v2f64_rr<"dfnma">; + def int_spu_si_dfma: v2f64_rr<"dfma">; + def int_spu_si_dfnms: v2f64_rr<"dfnms">; + def int_spu_si_dfms: v2f64_rr<"dfms">; } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp?rev=47663&r1=47662&r2=47663&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp Wed Feb 27 00:33:05 2008 @@ -134,7 +134,7 @@ if (G && R->getReg() != 0 && TargetRegisterInfo::isPhysicalRegister(R->getReg())) { Op = Op + " " + - G->getTarget().getRegisterInfo()->getName(R->getReg()); + G->getTarget().getRegisterInfo()->getName(R->getReg()); } else { Op += " #" + utostr(R->getReg()); } Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=47663&r1=47662&r2=47663&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Wed Feb 27 00:33:05 2008 @@ -1262,7 +1262,7 @@ else DOUT << "Reusing SS#" << ReuseSlot; DOUT << " from physreg " << TRI->getName(PhysReg) - << " for vreg" << VirtReg + << " for vreg" << VirtReg << " instead of reloading into same physreg.\n"; unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg; MI.getOperand(i).setReg(RReg); Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=47663&r1=47662&r2=47663&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Feb 27 00:33:05 2008 @@ -46,9 +46,9 @@ def ARMWrapperJT : SDNode<"ARMISD::WrapperJT", SDTIntBinOp>; def ARMcallseq_start : SDNode<"ISD::CALLSEQ_START", SDT_ARMCallSeqStart, - [SDNPHasChain, SDNPOutFlag]>; + [SDNPHasChain, SDNPOutFlag]>; def ARMcallseq_end : SDNode<"ISD::CALLSEQ_END", SDT_ARMCallSeqEnd, - [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; + [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; def ARMcall : SDNode<"ARMISD::CALL", SDT_ARMcall, [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; Modified: llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td?rev=47663&r1=47662&r2=47663&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td (original) +++ llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td Wed Feb 27 00:33:05 2008 @@ -27,7 +27,7 @@ def Alpha_rellit : SDNode<"AlphaISD::RelLit", SDTIntBinOp, [SDNPMayLoad]>; def retflag : SDNode<"AlphaISD::RET_FLAG", SDTNone, - [SDNPHasChain, SDNPOptInFlag]>; + [SDNPHasChain, SDNPOptInFlag]>; // These are target-independent nodes, but have target-specific formats. def SDT_AlphaCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i64> ]>; @@ -35,7 +35,7 @@ SDTCisVT<1, i64> ]>; def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_AlphaCallSeqStart, - [SDNPHasChain, SDNPOutFlag]>; + [SDNPHasChain, SDNPOutFlag]>; def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_AlphaCallSeqEnd, [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; @@ -450,21 +450,21 @@ let OutOperandList = (ops), InOperandList = (ops GPRC:$RA, s64imm:$DISP, GPRC:$RB) in { def STB : MForm<0x0E, 0, "stb $RA,$DISP($RB)", - [(truncstorei8 GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_ist>; + [(truncstorei8 GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_ist>; def STBr : MForm<0x0E, 0, "stb $RA,$DISP($RB)\t\t!gprellow", - [(truncstorei8 GPRC:$RA, (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB))], s_ist>; + [(truncstorei8 GPRC:$RA, (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB))], s_ist>; def STW : MForm<0x0D, 0, "stw $RA,$DISP($RB)", - [(truncstorei16 GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_ist>; + [(truncstorei16 GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_ist>; def STWr : MForm<0x0D, 0, "stw $RA,$DISP($RB)\t\t!gprellow", - [(truncstorei16 GPRC:$RA, (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB))], s_ist>; + [(truncstorei16 GPRC:$RA, (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB))], s_ist>; def STL : MForm<0x2C, 0, "stl $RA,$DISP($RB)", - [(truncstorei32 GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_ist>; + [(truncstorei32 GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_ist>; def STLr : MForm<0x2C, 0, "stl $RA,$DISP($RB)\t\t!gprellow", - [(truncstorei32 GPRC:$RA, (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB))], s_ist>; + [(truncstorei32 GPRC:$RA, (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB))], s_ist>; def STQ : MForm<0x2D, 0, "stq $RA,$DISP($RB)", - [(store GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_ist>; + [(store GPRC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_ist>; def STQr : MForm<0x2D, 0, "stq $RA,$DISP($RB)\t\t!gprellow", - [(store GPRC:$RA, (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB))], s_ist>; + [(store GPRC:$RA, (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB))], s_ist>; } //Load address @@ -481,27 +481,27 @@ let OutOperandList = (ops), InOperandList = (ops F4RC:$RA, s64imm:$DISP, GPRC:$RB) in { def STS : MForm<0x26, 0, "sts $RA,$DISP($RB)", - [(store F4RC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_fst>; + [(store F4RC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_fst>; def STSr : MForm<0x26, 0, "sts $RA,$DISP($RB)\t\t!gprellow", - [(store F4RC:$RA, (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB))], s_fst>; + [(store F4RC:$RA, (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB))], s_fst>; } let OutOperandList = (ops F4RC:$RA), InOperandList = (ops s64imm:$DISP, GPRC:$RB) in { def LDS : MForm<0x22, 1, "lds $RA,$DISP($RB)", - [(set F4RC:$RA, (load (add GPRC:$RB, immSExt16:$DISP)))], s_fld>; + [(set F4RC:$RA, (load (add GPRC:$RB, immSExt16:$DISP)))], s_fld>; def LDSr : MForm<0x22, 1, "lds $RA,$DISP($RB)\t\t!gprellow", - [(set F4RC:$RA, (load (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB)))], s_fld>; + [(set F4RC:$RA, (load (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB)))], s_fld>; } let OutOperandList = (ops), InOperandList = (ops F8RC:$RA, s64imm:$DISP, GPRC:$RB) in { def STT : MForm<0x27, 0, "stt $RA,$DISP($RB)", - [(store F8RC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_fst>; + [(store F8RC:$RA, (add GPRC:$RB, immSExt16:$DISP))], s_fst>; def STTr : MForm<0x27, 0, "stt $RA,$DISP($RB)\t\t!gprellow", - [(store F8RC:$RA, (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB))], s_fst>; + [(store F8RC:$RA, (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB))], s_fst>; } let OutOperandList = (ops F8RC:$RA), InOperandList = (ops s64imm:$DISP, GPRC:$RB) in { def LDT : MForm<0x23, 1, "ldt $RA,$DISP($RB)", - [(set F8RC:$RA, (load (add GPRC:$RB, immSExt16:$DISP)))], s_fld>; + [(set F8RC:$RA, (load (add GPRC:$RB, immSExt16:$DISP)))], s_fld>; def LDTr : MForm<0x23, 1, "ldt $RA,$DISP($RB)\t\t!gprellow", - [(set F8RC:$RA, (load (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB)))], s_fld>; + [(set F8RC:$RA, (load (Alpha_gprello tglobaladdr:$DISP, GPRC:$RB)))], s_fld>; } Modified: llvm/trunk/lib/Target/IA64/IA64InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64InstrInfo.td?rev=47663&r1=47662&r2=47663&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64InstrInfo.td (original) +++ llvm/trunk/lib/Target/IA64/IA64InstrInfo.td Wed Feb 27 00:33:05 2008 @@ -23,7 +23,7 @@ def SDT_IA64RetFlag : SDTypeProfile<0, 0, []>; def retflag : SDNode<"IA64ISD::RET_FLAG", SDT_IA64RetFlag, - [SDNPHasChain, SDNPOptInFlag]>; + [SDNPHasChain, SDNPOptInFlag]>; //===--------- // Instruction types @@ -115,36 +115,36 @@ def ADD : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "add $dst = $src1, $src2", - [(set GR:$dst, (add GR:$src1, GR:$src2))]>, isA; + [(set GR:$dst, (add GR:$src1, GR:$src2))]>, isA; def ADD1 : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "add $dst = $src1, $src2, 1", - [(set GR:$dst, (add (add GR:$src1, GR:$src2), 1))]>, isA; + [(set GR:$dst, (add (add GR:$src1, GR:$src2), 1))]>, isA; def ADDS : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, s14imm:$imm), "adds $dst = $imm, $src1", - [(set GR:$dst, (add GR:$src1, immSExt14:$imm))]>, isA; + [(set GR:$dst, (add GR:$src1, immSExt14:$imm))]>, isA; def MOVL : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins s64imm:$imm), "movl $dst = $imm", - [(set GR:$dst, imm64:$imm)]>, isLX; + [(set GR:$dst, imm64:$imm)]>, isLX; def ADDL_GA : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, globaladdress:$imm), "addl $dst = $imm, $src1", - []>, isA; + []>, isA; // hmm def ADDL_EA : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, calltarget:$imm), "addl $dst = $imm, $src1", - []>, isA; + []>, isA; def SUB : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "sub $dst = $src1, $src2", - [(set GR:$dst, (sub GR:$src1, GR:$src2))]>, isA; + [(set GR:$dst, (sub GR:$src1, GR:$src2))]>, isA; def SUB1 : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "sub $dst = $src1, $src2, 1", - [(set GR:$dst, (add (sub GR: $src1, GR:$src2), -1))]>, isA; + [(set GR:$dst, (add (sub GR: $src1, GR:$src2), -1))]>, isA; let isTwoAddress = 1 in { def TPCADDIMM22 : AForm<0x03, 0x0b, @@ -182,33 +182,33 @@ // fixme: shrs vs shru? def MIX1L : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "mix1.l $dst = $src1, $src2", - [(set GR:$dst, (or (and GR:$src1, isMIX1Lable), - (and (srl GR:$src2, (i64 8)), isMIX1Lable)))]>, isI; + [(set GR:$dst, (or (and GR:$src1, isMIX1Lable), + (and (srl GR:$src2, (i64 8)), isMIX1Lable)))]>, isI; def MIX2L : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "mix2.l $dst = $src1, $src2", - [(set GR:$dst, (or (and GR:$src1, isMIX2Lable), - (and (srl GR:$src2, (i64 16)), isMIX2Lable)))]>, isI; + [(set GR:$dst, (or (and GR:$src1, isMIX2Lable), + (and (srl GR:$src2, (i64 16)), isMIX2Lable)))]>, isI; def MIX4L : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "mix4.l $dst = $src1, $src2", - [(set GR:$dst, (or (and GR:$src1, isMIX4Lable), - (and (srl GR:$src2, (i64 32)), isMIX4Lable)))]>, isI; + [(set GR:$dst, (or (and GR:$src1, isMIX4Lable), + (and (srl GR:$src2, (i64 32)), isMIX4Lable)))]>, isI; def MIX1R : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "mix1.r $dst = $src1, $src2", - [(set GR:$dst, (or (and (shl GR:$src1, (i64 8)), isMIX1Rable), - (and GR:$src2, isMIX1Rable)))]>, isI; + [(set GR:$dst, (or (and (shl GR:$src1, (i64 8)), isMIX1Rable), + (and GR:$src2, isMIX1Rable)))]>, isI; def MIX2R : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "mix2.r $dst = $src1, $src2", - [(set GR:$dst, (or (and (shl GR:$src1, (i64 16)), isMIX2Rable), - (and GR:$src2, isMIX2Rable)))]>, isI; + [(set GR:$dst, (or (and (shl GR:$src1, (i64 16)), isMIX2Rable), + (and GR:$src2, isMIX2Rable)))]>, isI; def MIX4R : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "mix4.r $dst = $src1, $src2", - [(set GR:$dst, (or (and (shl GR:$src1, (i64 32)), isMIX4Rable), - (and GR:$src2, isMIX4Rable)))]>, isI; + [(set GR:$dst, (or (and (shl GR:$src1, (i64 32)), isMIX4Rable), + (and GR:$src2, isMIX4Rable)))]>, isI; def GETFSIGD : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins FP:$src), "getf.sig $dst = $src", @@ -244,14 +244,14 @@ def AND : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "and $dst = $src1, $src2", - [(set GR:$dst, (and GR:$src1, GR:$src2))]>, isA; + [(set GR:$dst, (and GR:$src1, GR:$src2))]>, isA; def ANDCM : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "andcm $dst = $src1, $src2", - [(set GR:$dst, (and GR:$src1, (not GR:$src2)))]>, isA; + [(set GR:$dst, (and GR:$src1, (not GR:$src2)))]>, isA; // TODO: and/andcm/or/xor/add/sub/shift immediate forms def OR : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "or $dst = $src1, $src2", - [(set GR:$dst, (or GR:$src1, GR:$src2))]>, isA; + [(set GR:$dst, (or GR:$src1, GR:$src2))]>, isA; def pOR : AForm<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2, PR:$qp), "($qp) or $dst = $src1, $src2">, isA; @@ -260,34 +260,34 @@ // of the compare! def CMPEQ : AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins GR:$src1, GR:$src2), "cmp.eq $dst, p0 = $src1, $src2", - [(set PR:$dst, (seteq GR:$src1, GR:$src2))]>, isA; + [(set PR:$dst, (seteq GR:$src1, GR:$src2))]>, isA; def CMPGT : AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins GR:$src1, GR:$src2), "cmp.gt $dst, p0 = $src1, $src2", - [(set PR:$dst, (setgt GR:$src1, GR:$src2))]>, isA; + [(set PR:$dst, (setgt GR:$src1, GR:$src2))]>, isA; def CMPGE : AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins GR:$src1, GR:$src2), "cmp.ge $dst, p0 = $src1, $src2", - [(set PR:$dst, (setge GR:$src1, GR:$src2))]>, isA; + [(set PR:$dst, (setge GR:$src1, GR:$src2))]>, isA; def CMPLT : AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins GR:$src1, GR:$src2), "cmp.lt $dst, p0 = $src1, $src2", - [(set PR:$dst, (setlt GR:$src1, GR:$src2))]>, isA; + [(set PR:$dst, (setlt GR:$src1, GR:$src2))]>, isA; def CMPLE : AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins GR:$src1, GR:$src2), "cmp.le $dst, p0 = $src1, $src2", - [(set PR:$dst, (setle GR:$src1, GR:$src2))]>, isA; + [(set PR:$dst, (setle GR:$src1, GR:$src2))]>, isA; def CMPNE : AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins GR:$src1, GR:$src2), "cmp.ne $dst, p0 = $src1, $src2", - [(set PR:$dst, (setne GR:$src1, GR:$src2))]>, isA; + [(set PR:$dst, (setne GR:$src1, GR:$src2))]>, isA; def CMPLTU: AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins GR:$src1, GR:$src2), "cmp.ltu $dst, p0 = $src1, $src2", - [(set PR:$dst, (setult GR:$src1, GR:$src2))]>, isA; + [(set PR:$dst, (setult GR:$src1, GR:$src2))]>, isA; def CMPGTU: AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins GR:$src1, GR:$src2), "cmp.gtu $dst, p0 = $src1, $src2", - [(set PR:$dst, (setugt GR:$src1, GR:$src2))]>, isA; + [(set PR:$dst, (setugt GR:$src1, GR:$src2))]>, isA; def CMPLEU: AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins GR:$src1, GR:$src2), "cmp.leu $dst, p0 = $src1, $src2", - [(set PR:$dst, (setule GR:$src1, GR:$src2))]>, isA; + [(set PR:$dst, (setule GR:$src1, GR:$src2))]>, isA; def CMPGEU: AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins GR:$src1, GR:$src2), "cmp.geu $dst, p0 = $src1, $src2", - [(set PR:$dst, (setuge GR:$src1, GR:$src2))]>, isA; + [(set PR:$dst, (setuge GR:$src1, GR:$src2))]>, isA; // and we do the whole thing again for FP compares! def FCMPEQ : AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins FP:$src1, FP:$src2), @@ -295,38 +295,38 @@ [(set PR:$dst, (seteq FP:$src1, FP:$src2))]>, isF; def FCMPGT : AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins FP:$src1, FP:$src2), "fcmp.gt $dst, p0 = $src1, $src2", - [(set PR:$dst, (setgt FP:$src1, FP:$src2))]>, isF; + [(set PR:$dst, (setgt FP:$src1, FP:$src2))]>, isF; def FCMPGE : AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins FP:$src1, FP:$src2), "fcmp.ge $dst, p0 = $src1, $src2", - [(set PR:$dst, (setge FP:$src1, FP:$src2))]>, isF; + [(set PR:$dst, (setge FP:$src1, FP:$src2))]>, isF; def FCMPLT : AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins FP:$src1, FP:$src2), "fcmp.lt $dst, p0 = $src1, $src2", - [(set PR:$dst, (setlt FP:$src1, FP:$src2))]>, isF; + [(set PR:$dst, (setlt FP:$src1, FP:$src2))]>, isF; def FCMPLE : AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins FP:$src1, FP:$src2), "fcmp.le $dst, p0 = $src1, $src2", - [(set PR:$dst, (setle FP:$src1, FP:$src2))]>, isF; + [(set PR:$dst, (setle FP:$src1, FP:$src2))]>, isF; def FCMPNE : AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins FP:$src1, FP:$src2), "fcmp.neq $dst, p0 = $src1, $src2", - [(set PR:$dst, (setne FP:$src1, FP:$src2))]>, isF; + [(set PR:$dst, (setne FP:$src1, FP:$src2))]>, isF; def FCMPLTU: AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins FP:$src1, FP:$src2), "fcmp.lt $dst, p0 = $src1, $src2", - [(set PR:$dst, (setult FP:$src1, FP:$src2))]>, isF; + [(set PR:$dst, (setult FP:$src1, FP:$src2))]>, isF; def FCMPGTU: AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins FP:$src1, FP:$src2), "fcmp.gt $dst, p0 = $src1, $src2", - [(set PR:$dst, (setugt FP:$src1, FP:$src2))]>, isF; + [(set PR:$dst, (setugt FP:$src1, FP:$src2))]>, isF; def FCMPLEU: AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins FP:$src1, FP:$src2), "fcmp.le $dst, p0 = $src1, $src2", - [(set PR:$dst, (setule FP:$src1, FP:$src2))]>, isF; + [(set PR:$dst, (setule FP:$src1, FP:$src2))]>, isF; def FCMPGEU: AForm_DAG<0x03, 0x0b, (outs PR:$dst), (ins FP:$src1, FP:$src2), "fcmp.ge $dst, p0 = $src1, $src2", - [(set PR:$dst, (setuge FP:$src1, FP:$src2))]>, isF; + [(set PR:$dst, (setuge FP:$src1, FP:$src2))]>, isF; def PCMPEQUNCR0R0 : AForm<0x03, 0x0b, (outs PR:$dst), (ins PR:$qp), "($qp) cmp.eq.unc $dst, p0 = r0, r0">, isA; def : Pat<(trunc GR:$src), // truncate i64 to i1 (CMPNE GR:$src, r0)>; // $src!=0? If so, PR:$dst=true - + let isTwoAddress=1 in { def TPCMPEQR0R0 : AForm<0x03, 0x0b, (outs PR:$dst), (ins PR:$bogus, PR:$qp), "($qp) cmp.eq $dst, p0 = r0, r0">, isA; @@ -355,7 +355,7 @@ def bAND : Pat<(and PR:$src1, PR:$src2), ( TPCMPNER0R0 (PCMPEQUNCR0R0 PR:$src1), - (TPCMPNER0R0 (CMPEQ r0, r0), PR:$src2) )>; + (TPCMPNER0R0 (CMPEQ r0, r0), PR:$src2) )>; /* one possible routine for XOR on predicates is: @@ -391,12 +391,12 @@ def bXOR : Pat<(xor PR:$src1, PR:$src2), (TPCMPIMM8NE (PCMPEQUNCR0R0 PR:$src2), 1, - (TPCADDS (ADDS r0, 0), 1, PR:$src2), - PR:$src1)>; + (TPCADDS (ADDS r0, 0), 1, PR:$src2), + PR:$src1)>; def XOR : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "xor $dst = $src1, $src2", - [(set GR:$dst, (xor GR:$src1, GR:$src2))]>, isA; + [(set GR:$dst, (xor GR:$src1, GR:$src2))]>, isA; def SHLADD: AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1,s64imm:$imm,GR:$src2), "shladd $dst = $src1, $imm, $src2", @@ -404,15 +404,15 @@ def SHL : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "shl $dst = $src1, $src2", - [(set GR:$dst, (shl GR:$src1, GR:$src2))]>, isI; + [(set GR:$dst, (shl GR:$src1, GR:$src2))]>, isI; def SHRU : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "shr.u $dst = $src1, $src2", - [(set GR:$dst, (srl GR:$src1, GR:$src2))]>, isI; + [(set GR:$dst, (srl GR:$src1, GR:$src2))]>, isI; def SHRS : AForm_DAG<0x03, 0x0b, (outs GR:$dst), (ins GR:$src1, GR:$src2), "shr $dst = $src1, $src2", - [(set GR:$dst, (sra GR:$src1, GR:$src2))]>, isI; + [(set GR:$dst, (sra GR:$src1, GR:$src2))]>, isI; def MOV : AForm<0x03, 0x0b, (outs GR:$dst), (ins GR:$src), "mov $dst = $src">, isA; def FMOV : AForm<0x03, 0x0b, (outs FP:$dst), (ins FP:$src), Modified: llvm/trunk/lib/Target/IA64/IA64RegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64RegisterInfo.td?rev=47663&r1=47662&r2=47663&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64RegisterInfo.td (original) +++ llvm/trunk/lib/Target/IA64/IA64RegisterInfo.td Wed Feb 27 00:33:05 2008 @@ -419,7 +419,7 @@ r104, r105, r106, r107, r108, r109, r110, r111, r112, r113, r114, r115, r116, r117, r118, r119, r120, r121, r122, r123, r124, r125, r126, r127, - r0, r1, r2, r5, r12, r13, r22, rp]> // the last 16 are special (look down) + r0, r1, r2, r5, r12, r13, r22, rp]> // last 16 are special (look down) { let MethodProtos = [{ iterator allocation_order_begin(const MachineFunction &MF) const; @@ -428,19 +428,18 @@ let MethodBodies = [{ GRClass::iterator GRClass::allocation_order_begin(const MachineFunction &MF) const { - // hide the 8 out? registers appropriately: - return begin()+(8-(MF.getInfo()->outRegsUsed)); + // hide the 8 out? registers appropriately: + return begin()+(8-(MF.getInfo()->outRegsUsed)); } GRClass::iterator GRClass::allocation_order_end(const MachineFunction &MF) const { - int numReservedRegs=8; // the 8 special registers r0,r1,r2,r5,r12,r13 etc + int numReservedRegs=8;// the 8 special registers r0,r1,r2,r5,r12,r13 etc - // we also can't allocate registers for use as locals if they're - // already required as 'out' registers - numReservedRegs+=MF.getInfo()->outRegsUsed; - - return end()-numReservedRegs; // hide registers appropriately + // we also can't allocate registers for use as locals if they're already + // required as 'out' registers + numReservedRegs+=MF.getInfo()->outRegsUsed; + return end()-numReservedRegs; // hide registers appropriately } }]; } @@ -450,20 +449,20 @@ def FP : RegisterClass<"IA64", [f64], 64, [F6, F7, - F8, F9, F10, F11, F12, F13, F14, F15, - F32, F33, F34, F35, F36, F37, F38, F39, - F40, F41, F42, F43, F44, F45, F46, F47, - F48, F49, F50, F51, F52, F53, F54, F55, - F56, F57, F58, F59, F60, F61, F62, F63, - F64, F65, F66, F67, F68, F69, F70, F71, - F72, F73, F74, F75, F76, F77, F78, F79, - F80, F81, F82, F83, F84, F85, F86, F87, - F88, F89, F90, F91, F92, F93, F94, F95, - F96, F97, F98, F99, F100, F101, F102, F103, - F104, F105, F106, F107, F108, F109, F110, F111, - F112, F113, F114, F115, F116, F117, F118, F119, - F120, F121, F122, F123, F124, F125, F126, F127, - F0, F1]> // these last two are hidden + F8, F9, F10, F11, F12, F13, F14, F15, + F32, F33, F34, F35, F36, F37, F38, F39, + F40, F41, F42, F43, F44, F45, F46, F47, + F48, F49, F50, F51, F52, F53, F54, F55, + F56, F57, F58, F59, F60, F61, F62, F63, + F64, F65, F66, F67, F68, F69, F70, F71, + F72, F73, F74, F75, F76, F77, F78, F79, + F80, F81, F82, F83, F84, F85, F86, F87, + F88, F89, F90, F91, F92, F93, F94, F95, + F96, F97, F98, F99, F100, F101, F102, F103, + F104, F105, F106, F107, F108, F109, F110, F111, + F112, F113, F114, F115, F116, F117, F118, F119, + F120, F121, F122, F123, F124, F125, F126, F127, + F0, F1]> // these last two are hidden { // the 128s here are to make stf.spill/ldf.fill happy, // when storing full (82-bit) FP regs to stack slots @@ -478,13 +477,13 @@ let MethodBodies = [{ FPClass::iterator FPClass::allocation_order_begin(const MachineFunction &MF) const { - return begin(); // we don't hide any FP regs from the start - } + return begin(); // we don't hide any FP regs from the start + } - FPClass::iterator - FPClass::allocation_order_end(const MachineFunction &MF) const { - return end()-2; // we hide regs F0, F1 from the end - } + FPClass::iterator + FPClass::allocation_order_end(const MachineFunction &MF) const { + return end()-2; // we hide regs F0, F1 from the end + } }]; } Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=47663&r1=47662&r2=47663&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Wed Feb 27 00:33:05 2008 @@ -110,11 +110,11 @@ // // Consider the following function prologue: // -// .frame $fp,48,$ra -// .mask 0xc0000000,-8 -// addiu $sp, $sp, -48 -// sw $ra, 40($sp) -// sw $fp, 36($sp) +// .frame $fp,48,$ra +// .mask 0xc0000000,-8 +// addiu $sp, $sp, -48 +// sw $ra, 40($sp) +// sw $fp, 36($sp) // // With a 0xc0000000 mask, the assembler knows the register 31 (RA) and // 30 (FP) are saved at prologue. As the save order on prologue is from Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=47663&r1=47662&r2=47663&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Wed Feb 27 00:33:05 2008 @@ -106,13 +106,13 @@ def PPCmtctr : SDNode<"PPCISD::MTCTR", SDT_PPCCall, [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; def PPCbctrl_Macho : SDNode<"PPCISD::BCTRL_Macho", SDTNone, - [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; + [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; def PPCbctrl_ELF : SDNode<"PPCISD::BCTRL_ELF", SDTNone, - [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; + [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; def retflag : SDNode<"PPCISD::RET_FLAG", SDTNone, - [SDNPHasChain, SDNPOptInFlag]>; + [SDNPHasChain, SDNPOptInFlag]>; def PPCvcmp : SDNode<"PPCISD::VCMP" , SDT_PPCvcmp, []>; def PPCvcmp_o : SDNode<"PPCISD::VCMPo", SDT_PPCvcmp, [SDNPOutFlag]>; Modified: llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td?rev=47663&r1=47662&r2=47663&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td (original) +++ llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td Wed Feb 27 00:33:05 2008 @@ -125,11 +125,11 @@ def SDT_SPCall : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>; def call : SDNode<"SPISD::CALL", SDT_SPCall, - [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; + [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; def SDT_SPRetFlag : SDTypeProfile<0, 0, []>; def retflag : SDNode<"SPISD::RET_FLAG", SDT_SPRetFlag, - [SDNPHasChain, SDNPOptInFlag]>; + [SDNPHasChain, SDNPOptInFlag]>; //===----------------------------------------------------------------------===// // SPARC Flag Conditions From asl at math.spbu.ru Wed Feb 27 00:35:15 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 27 Feb 2008 09:35:15 +0300 Subject: [llvm-commits] [llvm-gcc-4.2] r47655 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp In-Reply-To: <200802270132.m1R1Wr5w026552@zion.cs.uiuc.edu> References: <200802270132.m1R1Wr5w026552@zion.cs.uiuc.edu> Message-ID: <1204094115.20469.225.camel@asl.dorms.spbu.ru> Hello, Dale > +#ifdef TARGET_POWERPC Also, maybe it will be better to move this chunk of code into config/rs6000 directory? The same way as TARGET_ADJUST_LLVM_CC and friends are working? -- With best regards, Anton Korobeynikov. Faculty of Mathematics & Mechanics, Saint Petersburg State University. From sabre at nondot.org Wed Feb 27 00:38:52 2008 From: sabre at nondot.org (Chris Lattner) Date: Wed, 27 Feb 2008 00:38:52 -0600 Subject: [llvm-commits] CVS: llvm-www/Users.html Message-ID: <200802270638.m1R6cqLm002856@zion.cs.uiuc.edu> Changes in directory llvm-www: Users.html updated: 1.26 -> 1.27 --- Log message: Add the "Embedded System Environment project" at uc irvine. --- Diffs of the changes: (+11 -2) Users.html | 13 +++++++++++-- 1 files changed, 11 insertions(+), 2 deletions(-) Index: llvm-www/Users.html diff -u llvm-www/Users.html:1.26 llvm-www/Users.html:1.27 --- llvm-www/Users.html:1.26 Tue Feb 19 14:52:32 2008 +++ llvm-www/Users.html Wed Feb 27 00:38:05 2008 @@ -154,6 +154,15 @@ + + + + University of California, Irvine + + Samar Abdi, Dan Gajski + Embedded System Environment project + + @@ -266,7 +275,7 @@ - + iPhone tool chain llvm-gcc Compiler for iPhone Dev Wiki toolchain. @@ -284,6 +293,6 @@ src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!">
      LLVM Development List
      - Last modified: $Date: 2008/02/19 20:52:32 $ + Last modified: $Date: 2008/02/27 06:38:05 $ From sabre at nondot.org Wed Feb 27 00:39:56 2008 From: sabre at nondot.org (Chris Lattner) Date: Wed, 27 Feb 2008 00:39:56 -0600 Subject: [llvm-commits] CVS: llvm-www/Users.html Message-ID: <200802270639.m1R6dtrs002910@zion.cs.uiuc.edu> Changes in directory llvm-www: Users.html updated: 1.27 -> 1.28 --- Log message: validation fixes --- Diffs of the changes: (+3 -3) Users.html | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm-www/Users.html diff -u llvm-www/Users.html:1.27 llvm-www/Users.html:1.28 --- llvm-www/Users.html:1.27 Wed Feb 27 00:38:05 2008 +++ llvm-www/Users.html Wed Feb 27 00:39:27 2008 @@ -139,7 +139,7 @@ Tampere University of Technology - Jarmo Takala's research group, Department of Computer Systems + Jarmo Takala's research group, Department of Computer Systems The TTA Based Codesign Environment (TCE) project @@ -292,7 +292,7 @@ Valid HTML 4.01! -
      LLVM Development List
      - Last modified: $Date: 2008/02/27 06:38:05 $ +
      LLVM Development List
      + Last modified: $Date: 2008/02/27 06:39:27 $ From baldrick at free.fr Wed Feb 27 02:43:10 2008 From: baldrick at free.fr (Duncan Sands) Date: Wed, 27 Feb 2008 09:43:10 +0100 Subject: [llvm-commits] [llvm-gcc-4.2] r47655 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp In-Reply-To: <200802270132.m1R1Wr5w026552@zion.cs.uiuc.edu> References: <200802270132.m1R1Wr5w026552@zion.cs.uiuc.edu> Message-ID: <200802270943.11719.baldrick@free.fr> Hi Dale, > Hack to handle darwin ppc32's weird choice of > representation for bool. Fixes > gcc.dg-struct-layout-1/t009 I can't find this test in the testsuite, which is bad because without it I'm pretty confused about what's going on! > + // Normally gcc reduces the size of bitfields to the size necessary > + // to hold the bits, e.g. a 1-bit field becomes QI. So this is a union with a bitfield member? If so, can you not just do: (1) use isBitfield to see if it is a bitfield. (2) rather than converting the type (which should be completely ignored in the case of a bitfield), generate i8, i16 or whatever based on DECL_SIZE. And don't condition this on PPC or other tests. If the problem is what I'm imagining it is, this is needed in general: though we usually get away with it by using the type generated by gcc's struct layout, we don't in fact want to use the types produced by gcc's struct layout for bitfields (we don't in the rest of the struct conversion stuff). Ciao, Duncan. From baldrick at free.fr Wed Feb 27 02:45:45 2008 From: baldrick at free.fr (Duncan Sands) Date: Wed, 27 Feb 2008 09:45:45 +0100 Subject: [llvm-commits] [llvm] r47656 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp In-Reply-To: <200802270152.m1R1qUFW027088@zion.cs.uiuc.edu> References: <200802270152.m1R1qUFW027088@zion.cs.uiuc.edu> Message-ID: <200802270945.45558.baldrick@free.fr> Hi, is there a testcase? LegalizeTypes already handles this by the way (not turned on yet). Ciao, Duncan. From baldrick at free.fr Wed Feb 27 02:53:45 2008 From: baldrick at free.fr (Duncan Sands) Date: Wed, 27 Feb 2008 08:53:45 -0000 Subject: [llvm-commits] [llvm] r47667 - in /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp LegalizeTypes.h LegalizeTypesPromote.cpp Message-ID: <200802270853.m1R8rj4o014854@zion.cs.uiuc.edu> Author: baldrick Date: Wed Feb 27 02:53:44 2008 New Revision: 47667 URL: http://llvm.org/viewvc/llvm-project?rev=47667&view=rev Log: Support for legalizing MEMBARRIER. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47667&r1=47666&r2=47667&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Feb 27 02:53:44 2008 @@ -1140,8 +1140,11 @@ case TargetLowering::Legal: { SDOperand Ops[6]; Ops[0] = LegalizeOp(Node->getOperand(0)); // Legalize the chain. - for (int x = 1; x < 6; ++x) - Ops[x] = PromoteOp(Node->getOperand(x)); + for (int x = 1; x < 6; ++x) { + Ops[x] = Node->getOperand(x); + if (!isTypeLegal(Ops[x].getValueType())) + Ops[x] = PromoteOp(Ops[x]); + } Result = DAG.UpdateNodeOperands(Result, &Ops[0], 6); break; } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=47667&r1=47666&r2=47667&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Wed Feb 27 02:53:44 2008 @@ -190,6 +190,7 @@ SDOperand PromoteOperand_FP_EXTEND(SDNode *N); SDOperand PromoteOperand_FP_ROUND(SDNode *N); SDOperand PromoteOperand_INT_TO_FP(SDNode *N); + SDOperand PromoteOperand_MEMBARRIER(SDNode *N); SDOperand PromoteOperand_RET(SDNode *N, unsigned OpNo); SDOperand PromoteOperand_SELECT(SDNode *N, unsigned OpNo); SDOperand PromoteOperand_SETCC(SDNode *N, unsigned OpNo); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp?rev=47667&r1=47666&r2=47667&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp Wed Feb 27 02:53:44 2008 @@ -359,6 +359,8 @@ case ISD::BUILD_VECTOR: Res = PromoteOperand_BUILD_VECTOR(N); break; case ISD::RET: Res = PromoteOperand_RET(N, OpNo); break; + + case ISD::MEMBARRIER: Res = PromoteOperand_MEMBARRIER(N); break; } // If the result is null, the sub-method took care of registering results etc. @@ -612,3 +614,14 @@ return DAG.UpdateNodeOperands(SDOperand (N, 0), &NewValues[0], NewValues.size()); } + +SDOperand DAGTypeLegalizer::PromoteOperand_MEMBARRIER(SDNode *N) { + SDOperand NewOps[6]; + NewOps[0] = N->getOperand(0); + for (unsigned i = 1; i < array_lengthof(NewOps); ++i) { + SDOperand Flag = GetPromotedOp(N->getOperand(i)); + NewOps[i] = DAG.getZeroExtendInReg(Flag, MVT::i1); + } + return DAG.UpdateNodeOperands(SDOperand (N, 0), NewOps, + array_lengthof(NewOps)); +} From baldrick at free.fr Wed Feb 27 04:18:29 2008 From: baldrick at free.fr (Duncan Sands) Date: Wed, 27 Feb 2008 10:18:29 -0000 Subject: [llvm-commits] [llvm] r47669 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGNodes.h lib/CodeGen/SelectionDAG/LegalizeTypes.h lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp Message-ID: <200802271018.m1RAIVaf017838@zion.cs.uiuc.edu> Author: baldrick Date: Wed Feb 27 04:18:23 2008 New Revision: 47669 URL: http://llvm.org/viewvc/llvm-project?rev=47669&view=rev Log: LegalizeTypes support for INSERT_VECTOR_ELT. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=47669&r1=47668&r2=47669&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Wed Feb 27 04:18:23 2008 @@ -283,7 +283,8 @@ BUILD_VECTOR, /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element - /// at IDX replaced with VAL. + /// at IDX replaced with VAL. If the type of VAL is larger than the vector + /// element type then VAL is truncated before replacement. INSERT_VECTOR_ELT, /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=47669&r1=47668&r2=47669&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Wed Feb 27 04:18:23 2008 @@ -190,6 +190,7 @@ SDOperand PromoteOperand_FP_EXTEND(SDNode *N); SDOperand PromoteOperand_FP_ROUND(SDNode *N); SDOperand PromoteOperand_INT_TO_FP(SDNode *N); + SDOperand PromoteOperand_INSERT_VECTOR_ELT(SDNode *N, unsigned OpNo); SDOperand PromoteOperand_MEMBARRIER(SDNode *N); SDOperand PromoteOperand_RET(SDNode *N, unsigned OpNo); SDOperand PromoteOperand_SELECT(SDNode *N, unsigned OpNo); @@ -269,15 +270,17 @@ // Result Vector Scalarization: <1 x ty> -> ty. void ScalarizeResult(SDNode *N, unsigned OpNo); - SDOperand ScalarizeRes_UNDEF(SDNode *N); - SDOperand ScalarizeRes_LOAD(LoadSDNode *N); SDOperand ScalarizeRes_BinOp(SDNode *N); SDOperand ScalarizeRes_UnaryOp(SDNode *N); - SDOperand ScalarizeRes_FPOWI(SDNode *N); - SDOperand ScalarizeRes_VECTOR_SHUFFLE(SDNode *N); + SDOperand ScalarizeRes_BIT_CONVERT(SDNode *N); + SDOperand ScalarizeRes_FPOWI(SDNode *N); + SDOperand ScalarizeRes_INSERT_VECTOR_ELT(SDNode *N); + SDOperand ScalarizeRes_LOAD(LoadSDNode *N); SDOperand ScalarizeRes_SELECT(SDNode *N); - + SDOperand ScalarizeRes_UNDEF(SDNode *N); + SDOperand ScalarizeRes_VECTOR_SHUFFLE(SDNode *N); + // Operand Vector Scalarization: <1 x ty> -> ty. bool ScalarizeOperand(SDNode *N, unsigned OpNo); SDOperand ScalarizeOp_EXTRACT_VECTOR_ELT(SDNode *N); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp?rev=47669&r1=47668&r2=47669&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp Wed Feb 27 04:18:23 2008 @@ -357,6 +357,9 @@ case ISD::MEMMOVE: Res = HandleMemIntrinsic(N); break; case ISD::BUILD_VECTOR: Res = PromoteOperand_BUILD_VECTOR(N); break; + case ISD::INSERT_VECTOR_ELT: + Res = PromoteOperand_INSERT_VECTOR_ELT(N, OpNo); + break; case ISD::RET: Res = PromoteOperand_RET(N, OpNo); break; @@ -591,6 +594,30 @@ return DAG.getNode(ISD::BIT_CONVERT, VecVT, NewVec); } +SDOperand DAGTypeLegalizer::PromoteOperand_INSERT_VECTOR_ELT(SDNode *N, + unsigned OpNo) { + if (OpNo == 1) { + // Promote the inserted value. This is valid because the type does not + // have to match the vector element type. + + // Check that any extra bits introduced will be truncated away. + assert(MVT::getSizeInBits(N->getOperand(1).getValueType()) >= + MVT::getSizeInBits(MVT::getVectorElementType(N->getValueType(0))) && + "Type of inserted value narrower than vector element type!"); + return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0), + GetPromotedOp(N->getOperand(1)), + N->getOperand(2)); + } + + assert(OpNo == 2 && "Different operand and result vector types?"); + + // Promote the index. + SDOperand Idx = N->getOperand(2); + Idx = DAG.getZeroExtendInReg(GetPromotedOp(Idx), Idx.getValueType()); + return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0), + N->getOperand(1), Idx); +} + SDOperand DAGTypeLegalizer::PromoteOperand_RET(SDNode *N, unsigned OpNo) { assert(!(OpNo & 1) && "Return values should be legally typed!"); assert((N->getNumOperands() & 1) && "Wrong number of operands!"); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp?rev=47669&r1=47668&r2=47669&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp Wed Feb 27 04:18:23 2008 @@ -77,7 +77,7 @@ case ISD::FCOS: R = ScalarizeRes_UnaryOp(N); break; case ISD::FPOWI: R = ScalarizeRes_FPOWI(N); break; case ISD::BUILD_VECTOR: R = N->getOperand(0); break; - case ISD::INSERT_VECTOR_ELT: R = N->getOperand(1); break; + case ISD::INSERT_VECTOR_ELT: R = ScalarizeRes_INSERT_VECTOR_ELT(N); break; case ISD::VECTOR_SHUFFLE: R = ScalarizeRes_VECTOR_SHUFFLE(N); break; case ISD::BIT_CONVERT: R = ScalarizeRes_BIT_CONVERT(N); break; case ISD::SELECT: R = ScalarizeRes_SELECT(N); break; @@ -120,6 +120,17 @@ return DAG.getNode(ISD::FPOWI, Op.getValueType(), Op, N->getOperand(1)); } +SDOperand DAGTypeLegalizer::ScalarizeRes_INSERT_VECTOR_ELT(SDNode *N) { + // The value to insert may have a wider type than the vector element type, + // so be sure to truncate it to the element type if necessary. + SDOperand Op = N->getOperand(1); + MVT::ValueType EltVT = MVT::getVectorElementType(N->getValueType(0)); + if (MVT::getSizeInBits(Op.getValueType()) > MVT::getSizeInBits(EltVT)) + Op = DAG.getNode(ISD::TRUNCATE, EltVT, Op); + assert(Op.getValueType() == EltVT && "Invalid type for inserted value!"); + return Op; +} + SDOperand DAGTypeLegalizer::ScalarizeRes_VECTOR_SHUFFLE(SDNode *N) { // Figure out if the scalar is the LHS or RHS and return it. SDOperand EltNum = N->getOperand(2).getOperand(0); From evan.cheng at apple.com Wed Feb 27 04:05:05 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 27 Feb 2008 10:05:05 -0000 Subject: [llvm-commits] [llvm] r47668 - in /llvm/trunk: include/llvm/CodeGen/MachineFrameInfo.h lib/CodeGen/PrologEpilogInserter.cpp test/CodeGen/X86/2008-02-27-PEICrash.ll Message-ID: <200802271005.m1RA579W017339@zion.cs.uiuc.edu> Author: evancheng Date: Wed Feb 27 04:04:56 2008 New Revision: 47668 URL: http://llvm.org/viewvc/llvm-project?rev=47668&view=rev Log: Don't track max alignment during stack object allocations since they can be deleted later. Let PEI compute it. Added: llvm/trunk/test/CodeGen/X86/2008-02-27-PEICrash.ll Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=47668&r1=47667&r2=47668&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Wed Feb 27 04:04:56 2008 @@ -305,9 +305,6 @@ /// a postive identifier to represent it. /// int CreateStackObject(uint64_t Size, unsigned Alignment) { - // Keep track of the maximum alignment. - if (MaxAlignment < Alignment) MaxAlignment = Alignment; - assert(Size != 0 && "Cannot allocate zero size stack objects!"); Objects.push_back(StackObject(Size, Alignment, -1)); return Objects.size()-NumFixedObjects-1; @@ -331,7 +328,6 @@ /// int CreateVariableSizedObject() { HasVarSizedObjects = true; - if (MaxAlignment < 1) MaxAlignment = 1; Objects.push_back(StackObject(0, 1, -1)); return Objects.size()-NumFixedObjects-1; } Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=47668&r1=47667&r2=47668&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original) +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Wed Feb 27 04:04:56 2008 @@ -475,8 +475,7 @@ // Remember the required stack alignment in case targets need it to perform // dynamic stack alignment. - assert(FFI->getMaxAlignment() == MaxAlign && - "Stack alignment calculation broken!"); + FFI->setMaxAlignment(MaxAlign); } Added: llvm/trunk/test/CodeGen/X86/2008-02-27-PEICrash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-27-PEICrash.ll?rev=47668&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2008-02-27-PEICrash.ll (added) +++ llvm/trunk/test/CodeGen/X86/2008-02-27-PEICrash.ll Wed Feb 27 04:04:56 2008 @@ -0,0 +1,33 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 + +define i64 @__divsc3(float %a, float %b, float %c, float %d) nounwind readnone { +entry: + br i1 false, label %bb56, label %bb33 + +bb33: ; preds = %entry + br label %bb56 + +bb56: ; preds = %bb33, %entry + %tmp36.pn = phi float [ 0.000000e+00, %bb33 ], [ 0.000000e+00, %entry ] ; [#uses=1] + %b.pn509 = phi float [ %b, %bb33 ], [ %a, %entry ] ; [#uses=1] + %a.pn = phi float [ %a, %bb33 ], [ %b, %entry ] ; [#uses=1] + %tmp41.pn508 = phi float [ 0.000000e+00, %bb33 ], [ 0.000000e+00, %entry ] ; [#uses=1] + %tmp51.pn = phi float [ 0.000000e+00, %bb33 ], [ %a, %entry ] ; [#uses=1] + %tmp44.pn = mul float %tmp36.pn, %b.pn509 ; [#uses=1] + %tmp46.pn = add float %tmp44.pn, %a.pn ; [#uses=1] + %tmp53.pn = sub float 0.000000e+00, %tmp51.pn ; [#uses=1] + %x.0 = fdiv float %tmp46.pn, %tmp41.pn508 ; [#uses=1] + %y.0 = fdiv float %tmp53.pn, 0.000000e+00 ; [#uses=1] + br i1 false, label %bb433, label %bb98 + +bb98: ; preds = %bb56 + %tmp102 = mul float 0.000000e+00, %a ; [#uses=1] + %tmp106 = mul float 0.000000e+00, %b ; [#uses=1] + br label %bb433 + +bb433: ; preds = %bb98, %bb56 + %x.1 = phi float [ %tmp102, %bb98 ], [ %x.0, %bb56 ] ; [#uses=0] + %y.1 = phi float [ %tmp106, %bb98 ], [ %y.0, %bb56 ] ; [#uses=1] + %tmp460 = add float %y.1, 0.000000e+00 ; [#uses=0] + ret i64 0 +} From baldrick at free.fr Wed Feb 27 07:03:46 2008 From: baldrick at free.fr (Duncan Sands) Date: Wed, 27 Feb 2008 13:03:46 -0000 Subject: [llvm-commits] [llvm] r47670 - in /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeTypes.h LegalizeTypesSplit.cpp Message-ID: <200802271303.m1RD3ldi022455@zion.cs.uiuc.edu> Author: baldrick Date: Wed Feb 27 07:03:44 2008 New Revision: 47670 URL: http://llvm.org/viewvc/llvm-project?rev=47670&view=rev Log: LegalizeTypes support for legalizing the mask operand of a VECTOR_SHUFFLE. The mask is a vector of constant integers. The code in LegalizeDAG doesn't bother to legalize the mask, since it's basically just storage for a bunch of constants, however LegalizeTypes is more picky. The problem is that there may not exist any legal vector-of-integers type with a legal element type, so it is impossible to create a legal mask! Unless of course you cheat by creating a BUILD_VECTOR where the operands have a different type to the element type of the vector being built... This is pretty ugly but works - all relevant tests in the testsuite pass, and produce the same assembler with and without LegalizeTypes. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=47670&r1=47669&r2=47670&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Wed Feb 27 07:03:44 2008 @@ -316,6 +316,7 @@ SDOperand SplitOp_EXTRACT_SUBVECTOR(SDNode *N); SDOperand SplitOp_RET(SDNode *N, unsigned OpNo); SDOperand SplitOp_STORE(StoreSDNode *N, unsigned OpNo); + SDOperand SplitOp_VECTOR_SHUFFLE(SDNode *N, unsigned OpNo); }; } // end namespace llvm. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp?rev=47670&r1=47669&r2=47670&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp Wed Feb 27 07:03:44 2008 @@ -341,6 +341,7 @@ case ISD::RET: Res = SplitOp_RET(N, OpNo); break; case ISD::EXTRACT_SUBVECTOR: Res = SplitOp_EXTRACT_SUBVECTOR(N); break; + case ISD::VECTOR_SHUFFLE: Res = SplitOp_VECTOR_SHUFFLE(N, OpNo); break; } } @@ -421,3 +422,57 @@ DAG.getConstant(IdxVal - LoElts, Idx.getValueType())); } } + +SDOperand DAGTypeLegalizer::SplitOp_VECTOR_SHUFFLE(SDNode *N, unsigned OpNo) { + assert(OpNo == 2 && "Shuffle source type differs from result type?"); + SDOperand Mask = N->getOperand(2); + unsigned MaskLength = MVT::getVectorNumElements(Mask.getValueType()); + unsigned LargestMaskEntryPlusOne = 2 * MaskLength; + unsigned MinimumBitWidth = Log2_32_Ceil(LargestMaskEntryPlusOne); + + // Look for a legal vector type to place the mask values in. + // Note that there may not be *any* legal vector-of-integer + // type for which the element type is legal! + for (MVT::SimpleValueType EltVT = MVT::FIRST_INTEGER_VALUETYPE; + EltVT <= MVT::LAST_INTEGER_VALUETYPE; + // Integer values types are consecutively numbered. Exploit this. + EltVT = MVT::SimpleValueType(EltVT + 1)) { + + // Is the element type big enough to hold the values? + if (MVT::getSizeInBits(EltVT) < MinimumBitWidth) + // Nope. + continue; + + // Is the vector type legal? + MVT::ValueType VecVT = MVT::getVectorType(EltVT, MaskLength); + if (!isTypeLegal(VecVT)) + // Nope. + continue; + + // If the element type is not legal, find a larger legal type to use for + // the BUILD_VECTOR operands. This is an ugly hack, but seems to work! + for (MVT::SimpleValueType OpVT = EltVT; OpVT <= MVT::LAST_INTEGER_VALUETYPE; + // Integer values types are consecutively numbered. Exploit this. + OpVT = MVT::SimpleValueType(OpVT + 1)) { + if (!isTypeLegal(OpVT)) + continue; + + // Success! Rebuild the vector using the legal types. + SmallVector Ops(MaskLength); + for (unsigned i = 0; i < MaskLength; ++i) { + uint64_t Idx = + cast(Mask.getOperand(i))->getValue(); + Ops[i] = DAG.getConstant(Idx, OpVT); + } + return DAG.UpdateNodeOperands(SDOperand(N,0), + N->getOperand(0), N->getOperand(1), + DAG.getNode(ISD::BUILD_VECTOR, + VecVT, &Ops[0], Ops.size())); + } + + // Continuing is pointless - failure is certain. + break; + } + assert(false && "Failed to find an appropriate mask type!"); + return SDOperand(N, 0); +} From ggreif at gmail.com Wed Feb 27 07:34:17 2008 From: ggreif at gmail.com (Gabor Greif) Date: Wed, 27 Feb 2008 13:34:17 -0000 Subject: [llvm-commits] [llvm] r47671 - /llvm/trunk/Makefile.rules Message-ID: <200802271334.m1RDYHrp023287@zion.cs.uiuc.edu> Author: ggreif Date: Wed Feb 27 07:34:15 2008 New Revision: 47671 URL: http://llvm.org/viewvc/llvm-project?rev=47671&view=rev Log: Remove inappropriate whitespace, change CVS to SVN where it makes sense. Modified: llvm/trunk/Makefile.rules Modified: llvm/trunk/Makefile.rules URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile.rules?rev=47671&r1=47670&r2=47671&view=diff ============================================================================== --- llvm/trunk/Makefile.rules (original) +++ llvm/trunk/Makefile.rules Wed Feb 27 07:34:15 2008 @@ -175,7 +175,7 @@ $(MKDIR) $(@D) ; \ $(CP) -f $< $@ ;; \ esac - + endif #------------------------------------------------------------------------ @@ -701,7 +701,7 @@ $(LLVM_CONFIG): @echo "*** llvm-config doesn't exist - rebuilding it." @$(MAKE) -C $(PROJ_OBJ_ROOT)/tools/llvm-config - + $(ToolDir)/$(strip $(TOOLNAME))$(EXEEXT): $(LLVM_CONFIG) ProjLibsOptions += $(shell $(LLVM_CONFIG) --libs $(LINK_COMPONENTS)) @@ -1086,7 +1086,7 @@ DEPEND_OPTIONS = -MMD -MP -MF "$(ObjDir)/$*.d.tmp" \ -MT "$(ObjDir)/$*.lo" -MT "$(ObjDir)/$*.o" -MT "$(ObjDir)/$*.d" - + # If the build succeeded, move the dependency file over. If it failed, put an # empty file there. DEPEND_MOVEFILE = then $(MV) -f "$(ObjDir)/$*.d.tmp" "$(ObjDir)/$*.d"; \ @@ -1342,8 +1342,8 @@ $(SED) 's/void \*yy_flex_realloc/inline void *yy_flex_realloc/' | \ $(SED) 's/#define YY_BUF_SIZE 16384/#define YY_BUF_SIZE (16384*64)/' \ > $(PROJ_SRC_DIR)/$*.cpp - -# IFF the .l file has changed since it was last checked into CVS, copy the .l + +# IFF the .l file has changed since it was last checked into SVN, copy the .l # file to .l.cvs and the generated .cpp file to .cpp.cvs. We use this mechanism # so that people without flex can build LLVM by copying the .cvs files to the # source location and building them. @@ -1385,7 +1385,7 @@ $(Verb) $(MV) -f $*.tab.c $(PROJ_SRC_DIR)/$*.cpp $(Verb) $(MV) -f $*.tab.h $(PROJ_SRC_DIR)/$*.h -# IFF the .y file has changed since it was last checked into CVS, copy the .y +# IFF the .y file has changed since it was last checked into SVN, copy the .y # file to .y.cvs and the generated .cpp/.h file to .cpp.cvs/.h.cvs. We use this # mechanism so that people without flex can build LLVM by copying the .cvs files # to the source location and building them. From baldrick at free.fr Wed Feb 27 07:34:41 2008 From: baldrick at free.fr (Duncan Sands) Date: Wed, 27 Feb 2008 13:34:41 -0000 Subject: [llvm-commits] [llvm] r47672 - in /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeTypes.cpp LegalizeTypes.h LegalizeTypesExpand.cpp LegalizeTypesPromote.cpp LegalizeTypesScalarize.cpp LegalizeTypesSplit.cpp Message-ID: <200802271334.m1RDYfPs023313@zion.cs.uiuc.edu> Author: baldrick Date: Wed Feb 27 07:34:40 2008 New Revision: 47672 URL: http://llvm.org/viewvc/llvm-project?rev=47672&view=rev Log: LegalizeTypes support for EXTRACT_VECTOR_ELT. The approach taken is different to that in LegalizeDAG when it is a question of expanding or promoting the result type: for example, if extracting an i64 from a <2 x i64>, when i64 needs expanding, it bitcasts the vector to <4 x i32>, extracts the appropriate two i32's, and uses those for the Lo and Hi parts. Likewise, when extracting an i16 from a <4 x i16>, and i16 needs promoting, it bitcasts the vector to <2 x i32>, extracts the appropriate i32, twiddles the bits if necessary, and uses that as the promoted value. This puts more pressure on bitcast legalization, and I've added the appropriate cases. They needed to be added anyway since users can generate such bitcasts too if they want to. Also, when considering various cases (Legal, Promote, Expand, Scalarize, Split) it is a pain that expand can correspond to Expand, Scalarize or Split, so I've changed the LegalizeTypes enum so it lists those different cases - now Expand only means splitting a scalar in two. The code produced is the same as by LegalizeDAG for all relevant testcases, except for 2007-10-31-extractelement-i64.ll, where the code seems to have improved (see below; can an expert please tell me if it is better or not). Before < vs after >. < subl $92, %esp < movaps %xmm0, 64(%esp) < movaps %xmm0, (%esp) < movl 4(%esp), %eax < movl %eax, 28(%esp) < movl (%esp), %eax < movl %eax, 24(%esp) < movq 24(%esp), %mm0 < movq %mm0, 56(%esp) --- > subl $44, %esp > movaps %xmm0, 16(%esp) > pshufd $1, %xmm0, %xmm1 > movd %xmm1, 4(%esp) > movd %xmm0, (%esp) > movq (%esp), %mm0 > movq %mm0, 8(%esp) < subl $92, %esp < movaps %xmm0, 64(%esp) < movaps %xmm0, (%esp) < movl 12(%esp), %eax < movl %eax, 28(%esp) < movl 8(%esp), %eax < movl %eax, 24(%esp) < movq 24(%esp), %mm0 < movq %mm0, 56(%esp) --- > subl $44, %esp > movaps %xmm0, 16(%esp) > pshufd $3, %xmm0, %xmm1 > movd %xmm1, 4(%esp) > movhlps %xmm0, %xmm0 > movd %xmm0, (%esp) > movq (%esp), %mm0 > movq %mm0, 8(%esp) < subl $92, %esp < movaps %xmm0, 64(%esp) --- > subl $44, %esp < movl 16(%esp), %eax < movl %eax, 48(%esp) < movl 20(%esp), %eax < movl %eax, 52(%esp) < movaps %xmm0, (%esp) < movl 4(%esp), %eax < movl %eax, 60(%esp) < movl (%esp), %eax < movl %eax, 56(%esp) --- > pshufd $1, %xmm0, %xmm1 > movd %xmm1, 4(%esp) > movd %xmm0, (%esp) > movd %xmm1, 12(%esp) > movd %xmm0, 8(%esp) < subl $92, %esp < movaps %xmm0, 64(%esp) --- > subl $44, %esp < movl 24(%esp), %eax < movl %eax, 48(%esp) < movl 28(%esp), %eax < movl %eax, 52(%esp) < movaps %xmm0, (%esp) < movl 12(%esp), %eax < movl %eax, 60(%esp) < movl 8(%esp), %eax < movl %eax, 56(%esp) --- > pshufd $3, %xmm0, %xmm1 > movd %xmm1, 4(%esp) > movhlps %xmm0, %xmm0 > movd %xmm0, (%esp) > movd %xmm1, 12(%esp) > movd %xmm0, 8(%esp) Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=47672&r1=47671&r2=47672&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Wed Feb 27 07:34:40 2008 @@ -68,25 +68,26 @@ unsigned NumResults = N->getNumValues(); do { MVT::ValueType ResultVT = N->getValueType(i); - LegalizeAction Action = getTypeAction(ResultVT); - if (Action == Promote) { + switch (getTypeAction(ResultVT)) { + default: + assert(false && "Unknown action!"); + case Legal: + break; + case Promote: PromoteResult(N, i); goto NodeDone; - } else if (Action == Expand) { - // Expand can mean 1) split integer in half 2) scalarize single-element - // vector 3) split vector in half. - if (!MVT::isVector(ResultVT)) - ExpandResult(N, i); - else if (MVT::getVectorNumElements(ResultVT) == 1) - ScalarizeResult(N, i); // Scalarize the single-element vector. - else - SplitResult(N, i); // Split the vector in half. + case Expand: + ExpandResult(N, i); + goto NodeDone; + case Scalarize: + ScalarizeResult(N, i); + goto NodeDone; + case Split: + SplitResult(N, i); goto NodeDone; - } else { - assert(Action == Legal && "Unknown action!"); } } while (++i < NumResults); - + // Scan the operand list for the node, handling any nodes with operands that // are illegal. { @@ -94,25 +95,25 @@ bool NeedsRevisit = false; for (i = 0; i != NumOperands; ++i) { MVT::ValueType OpVT = N->getOperand(i).getValueType(); - LegalizeAction Action = getTypeAction(OpVT); - if (Action == Promote) { + switch (getTypeAction(OpVT)) { + default: + assert(false && "Unknown action!"); + case Legal: + continue; + case Promote: NeedsRevisit = PromoteOperand(N, i); break; - } else if (Action == Expand) { - // Expand can mean 1) split integer in half 2) scalarize single-element - // vector 3) split vector in half. - if (!MVT::isVector(OpVT)) { - NeedsRevisit = ExpandOperand(N, i); - } else if (MVT::getVectorNumElements(OpVT) == 1) { - // Scalarize the single-element vector. - NeedsRevisit = ScalarizeOperand(N, i); - } else { - NeedsRevisit = SplitOperand(N, i); // Split the vector in half. - } + case Expand: + NeedsRevisit = ExpandOperand(N, i); + break; + case Scalarize: + NeedsRevisit = ScalarizeOperand(N, i); + break; + case Split: + NeedsRevisit = SplitOperand(N, i); break; - } else { - assert(Action == Legal && "Unknown action!"); } + break; } // If the node needs revisiting, don't add all users to the worklist etc. @@ -432,7 +433,7 @@ case Legal: break; case Promote: Op2 = GetPromotedOp(Op2); break; } - + // The length could have any action required. SDOperand Length = N->getOperand(3); switch (getTypeAction(Length.getValueType())) { @@ -444,21 +445,21 @@ GetExpandedOp(Length, Length, Dummy); break; } - + SDOperand Align = N->getOperand(4); switch (getTypeAction(Align.getValueType())) { default: assert(0 && "Unknown action for memop operand"); case Legal: break; case Promote: Align = GetPromotedZExtOp(Align); break; } - + SDOperand AlwaysInline = N->getOperand(5); switch (getTypeAction(AlwaysInline.getValueType())) { default: assert(0 && "Unknown action for memop operand"); case Legal: break; case Promote: AlwaysInline = GetPromotedZExtOp(AlwaysInline); break; } - + SDOperand Ops[] = { Chain, Ptr, Op2, Length, Align, AlwaysInline }; return DAG.UpdateNodeOperands(SDOperand(N, 0), Ops, 6); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=47672&r1=47671&r2=47672&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Wed Feb 27 07:34:40 2008 @@ -61,27 +61,46 @@ enum LegalizeAction { Legal, // The target natively supports this type. Promote, // This type should be executed in a larger type. - Expand // This type should be split into two types of half the size. + Expand, // This type should be split into two types of half the size. + Scalarize, // Replace this one-element vector type with its element type. + Split // This vector type should be split into smaller vectors. }; - + /// ValueTypeActions - This is a bitvector that contains two bits for each /// simple value type, where the two bits correspond to the LegalizeAction - /// enum. This can be queried with "getTypeAction(VT)". + /// enum from TargetLowering. This can be queried with "getTypeAction(VT)". TargetLowering::ValueTypeActionImpl ValueTypeActions; /// getTypeAction - Return how we should legalize values of this type, either - /// it is already legal or we need to expand it into multiple registers of - /// smaller integer type, or we need to promote it to a larger type. + /// it is already legal, or we need to promote it to a larger integer type, or + /// we need to expand it into multiple registers of a smaller integer type, or + /// we need to scalarize a one-element vector type into the element type, or + /// we need to split a vector type into smaller vector types. LegalizeAction getTypeAction(MVT::ValueType VT) const { - return (LegalizeAction)ValueTypeActions.getTypeAction(VT); + switch (ValueTypeActions.getTypeAction(VT)) { + default: + assert(false && "Unknown legalize action!"); + case TargetLowering::Legal: + return Legal; + case TargetLowering::Promote: + return Promote; + case TargetLowering::Expand: + // Expand can mean 1) split integer in half 2) scalarize single-element + // vector 3) split vector in two. + if (!MVT::isVector(VT)) + return Expand; + else if (MVT::getVectorNumElements(VT) == 1) + return Scalarize; + else + return Split; + } } - + /// isTypeLegal - Return true if this type is legal on this target. - /// bool isTypeLegal(MVT::ValueType VT) const { - return getTypeAction(VT) == Legal; + return ValueTypeActions.getTypeAction(VT) == TargetLowering::Legal; } - + /// PromotedNodes - For nodes that are below legal width, this map indicates /// what promoted value to use. DenseMap PromotedNodes; @@ -159,11 +178,13 @@ // Result Promotion. void PromoteResult(SDNode *N, unsigned ResNo); + SDOperand PromoteResult_BIT_CONVERT(SDNode *N); SDOperand PromoteResult_BUILD_PAIR(SDNode *N); SDOperand PromoteResult_Constant(SDNode *N); SDOperand PromoteResult_CTLZ(SDNode *N); SDOperand PromoteResult_CTPOP(SDNode *N); SDOperand PromoteResult_CTTZ(SDNode *N); + SDOperand PromoteResult_EXTRACT_VECTOR_ELT(SDNode *N); SDOperand PromoteResult_FP_ROUND(SDNode *N); SDOperand PromoteResult_FP_TO_XINT(SDNode *N); SDOperand PromoteResult_INT_EXTEND(SDNode *N); @@ -219,6 +240,7 @@ void ExpandResult_CTLZ (SDNode *N, SDOperand &Lo, SDOperand &Hi); void ExpandResult_CTPOP (SDNode *N, SDOperand &Lo, SDOperand &Hi); void ExpandResult_CTTZ (SDNode *N, SDOperand &Lo, SDOperand &Hi); + void ExpandResult_EXTRACT_VECTOR_ELT(SDNode *N, SDOperand &Lo, SDOperand &Hi); void ExpandResult_LOAD (LoadSDNode *N, SDOperand &Lo, SDOperand &Hi); void ExpandResult_MERGE_VALUES(SDNode *N, SDOperand &Lo, SDOperand &Hi); void ExpandResult_SIGN_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi); @@ -283,6 +305,7 @@ // Operand Vector Scalarization: <1 x ty> -> ty. bool ScalarizeOperand(SDNode *N, unsigned OpNo); + SDOperand ScalarizeOp_BIT_CONVERT(SDNode *N); SDOperand ScalarizeOp_EXTRACT_VECTOR_ELT(SDNode *N); SDOperand ScalarizeOp_STORE(StoreSDNode *N, unsigned OpNo); @@ -313,7 +336,9 @@ // Operand Vector Scalarization: <128 x ty> -> 2 x <64 x ty>. bool SplitOperand(SDNode *N, unsigned OpNo); + SDOperand SplitOp_BIT_CONVERT(SDNode *N); SDOperand SplitOp_EXTRACT_SUBVECTOR(SDNode *N); + SDOperand SplitOp_EXTRACT_VECTOR_ELT(SDNode *N); SDOperand SplitOp_RET(SDNode *N, unsigned OpNo); SDOperand SplitOp_STORE(StoreSDNode *N, unsigned OpNo); SDOperand SplitOp_VECTOR_SHUFFLE(SDNode *N, unsigned OpNo); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp?rev=47672&r1=47671&r2=47672&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp Wed Feb 27 07:34:40 2008 @@ -86,6 +86,10 @@ case ISD::CTLZ: ExpandResult_CTLZ(N, Lo, Hi); break; case ISD::CTPOP: ExpandResult_CTPOP(N, Lo, Hi); break; case ISD::CTTZ: ExpandResult_CTTZ(N, Lo, Hi); break; + + case ISD::EXTRACT_VECTOR_ELT: + ExpandResult_EXTRACT_VECTOR_ELT(N, Lo, Hi); + break; } // If Lo/Hi is null, the sub-method took care of registering results etc. @@ -147,7 +151,7 @@ // For example, extension of an i48 to an i64. The operand type necessarily // promotes to the result type, so will end up being expanded too. assert(getTypeAction(Op.getValueType()) == Promote && - "Don't know how to expand this result!"); + "Only know how to promote this result!"); SDOperand Res = GetPromotedOp(Op); assert(Res.getValueType() == N->getValueType(0) && "Operand over promoted?"); @@ -168,7 +172,7 @@ // For example, extension of an i48 to an i64. The operand type necessarily // promotes to the result type, so will end up being expanded too. assert(getTypeAction(Op.getValueType()) == Promote && - "Don't know how to expand this result!"); + "Only know how to promote this result!"); SDOperand Res = GetPromotedOp(Op); assert(Res.getValueType() == N->getValueType(0) && "Operand over promoted?"); @@ -195,7 +199,7 @@ // For example, extension of an i48 to an i64. The operand type necessarily // promotes to the result type, so will end up being expanded too. assert(getTypeAction(Op.getValueType()) == Promote && - "Don't know how to expand this result!"); + "Only know how to promote this result!"); SDOperand Res = GetPromotedOp(Op); assert(Res.getValueType() == N->getValueType(0) && "Operand over promoted?"); @@ -239,6 +243,8 @@ void DAGTypeLegalizer::ExpandResult_BIT_CONVERT(SDNode *N, SDOperand &Lo, SDOperand &Hi) { // Lower the bit-convert to a store/load from the stack, then expand the load. + // TODO: If the operand also needs expansion then this could be turned into + // conversion of the expanded pieces. But there needs to be a testcase first! SDOperand Op = CreateStackStoreLoad(N->getOperand(0), N->getValueType(0)); ExpandResult_LOAD(cast(Op.Val), Lo, Hi); } @@ -666,6 +672,41 @@ Hi = DAG.getConstant(0, NVT); } +void DAGTypeLegalizer::ExpandResult_EXTRACT_VECTOR_ELT(SDNode *N, + SDOperand &Lo, + SDOperand &Hi) { + SDOperand OldVec = N->getOperand(0); + unsigned OldElts = MVT::getVectorNumElements(OldVec.getValueType()); + + // Convert to a vector of the expanded element type, for example + // <2 x i64> -> <4 x i32>. + MVT::ValueType OldVT = N->getValueType(0); + MVT::ValueType NewVT = TLI.getTypeToTransformTo(OldVT); + assert(MVT::getSizeInBits(OldVT) == 2 * MVT::getSizeInBits(NewVT) && + "Do not know how to handle this expansion!"); + + SDOperand NewVec = DAG.getNode(ISD::BIT_CONVERT, + MVT::getVectorType(NewVT, 2 * OldElts), + OldVec); + + // Extract the elements at 2 * Idx and 2 * Idx + 1 from the new vector. + SDOperand Idx = N->getOperand(1); + + // Make sure the type of Idx is big enough to hold the new values. + if (MVT::getSizeInBits(Idx.getValueType()) < 32) + Idx = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Idx); + + Idx = DAG.getNode(ISD::ADD, Idx.getValueType(), Idx, Idx); + Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, NewVT, NewVec, Idx); + + Idx = DAG.getNode(ISD::ADD, Idx.getValueType(), Idx, + DAG.getConstant(1, Idx.getValueType())); + Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, NewVT, NewVec, Idx); + + if (TLI.isBigEndian()) + std::swap(Lo, Hi); +} + /// ExpandShiftByConstant - N is a shift by a value that needs to be expanded, /// and the shift amount is a constant 'Amt'. Expand the operation. void DAGTypeLegalizer::ExpandShiftByConstant(SDNode *N, unsigned Amt, @@ -898,6 +939,28 @@ } SDOperand DAGTypeLegalizer::ExpandOperand_BIT_CONVERT(SDNode *N) { + if (MVT::isVector(N->getValueType(0))) { + // An illegal integer type is being converted to a legal vector type. + // Make a two element vector out of the expanded parts and convert that + // instead, but only if the new vector type is legal (otherwise there + // is no point, and it might create expansion loops). For example, on + // x86 this turns v1i64 = BIT_CONVERT i64 into v1i64 = BIT_CONVERT v2i32. + MVT::ValueType OVT = N->getOperand(0).getValueType(); + MVT::ValueType NVT = MVT::getVectorType(TLI.getTypeToTransformTo(OVT), 2); + + if (isTypeLegal(NVT)) { + SDOperand Parts[2]; + GetExpandedOp(N->getOperand(0), Parts[0], Parts[1]); + + if (TLI.isBigEndian()) + std::swap(Parts[0], Parts[1]); + + SDOperand Vec = DAG.getNode(ISD::BUILD_VECTOR, NVT, Parts, 2); + return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0), Vec); + } + } + + // Otherwise, store to a temporary and load out again as the new type. return CreateStackStoreLoad(N->getOperand(0), N->getValueType(0)); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp?rev=47672&r1=47671&r2=47672&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp Wed Feb 27 07:34:40 2008 @@ -50,6 +50,7 @@ case ISD::SETCC: Result = PromoteResult_SETCC(N); break; case ISD::LOAD: Result = PromoteResult_LOAD(cast(N)); break; case ISD::BUILD_PAIR: Result = PromoteResult_BUILD_PAIR(N); break; + case ISD::BIT_CONVERT: Result = PromoteResult_BIT_CONVERT(N); break; case ISD::AND: case ISD::OR: @@ -74,8 +75,12 @@ case ISD::CTLZ: Result = PromoteResult_CTLZ(N); break; case ISD::CTPOP: Result = PromoteResult_CTPOP(N); break; case ISD::CTTZ: Result = PromoteResult_CTTZ(N); break; + + case ISD::EXTRACT_VECTOR_ELT: + Result = PromoteResult_EXTRACT_VECTOR_ELT(N); + break; } - + // If Result is null, the sub-method took care of registering the result. if (Result.Val) SetPromotedOp(SDOperand(N, ResNo), Result); @@ -214,6 +219,65 @@ return DAG.getNode(ISD::OR, NVT, Lo, Hi); } +SDOperand DAGTypeLegalizer::PromoteResult_BIT_CONVERT(SDNode *N) { + SDOperand InOp = N->getOperand(0); + MVT::ValueType InVT = InOp.getValueType(); + MVT::ValueType NInVT = TLI.getTypeToTransformTo(InVT); + MVT::ValueType OutVT = TLI.getTypeToTransformTo(N->getValueType(0)); + + switch (getTypeAction(InVT)) { + default: + assert(false && "Unknown type action!"); + break; + case Legal: + break; + case Promote: + if (MVT::getSizeInBits(OutVT) == MVT::getSizeInBits(NInVT)) + // The input promotes to the same size. Convert the promoted value. + return DAG.getNode(ISD::BIT_CONVERT, OutVT, GetPromotedOp(InOp)); + break; + case Expand: + break; + case Scalarize: + // Convert the element to an integer and promote it by hand. + InOp = DAG.getNode(ISD::BIT_CONVERT, + MVT::getIntegerType(MVT::getSizeInBits(InVT)), + GetScalarizedOp(InOp)); + InOp = DAG.getNode(ISD::ANY_EXTEND, + MVT::getIntegerType(MVT::getSizeInBits(OutVT)), InOp); + return DAG.getNode(ISD::BIT_CONVERT, OutVT, InOp); + case Split: + // For example, i32 = BIT_CONVERT v2i16 on alpha. Convert the split + // pieces of the input into integers and reassemble in the final type. + SDOperand Lo, Hi; + GetSplitOp(N->getOperand(0), Lo, Hi); + + unsigned LoBits = MVT::getSizeInBits(Lo.getValueType()); + Lo = DAG.getNode(ISD::BIT_CONVERT, MVT::getIntegerType(LoBits), Lo); + + unsigned HiBits = MVT::getSizeInBits(Hi.getValueType()); + Hi = DAG.getNode(ISD::BIT_CONVERT, MVT::getIntegerType(HiBits), Hi); + + if (TLI.isBigEndian()) + std::swap(Lo, Hi); + + MVT::ValueType TargetTy = MVT::getIntegerType(MVT::getSizeInBits(OutVT)); + Hi = DAG.getNode(ISD::ANY_EXTEND, TargetTy, Hi); + Hi = DAG.getNode(ISD::SHL, TargetTy, Hi, + DAG.getConstant(MVT::getSizeInBits(Lo.getValueType()), + TLI.getShiftAmountTy())); + Lo = DAG.getNode(ISD::ZERO_EXTEND, TargetTy, Lo); + + return DAG.getNode(ISD::BIT_CONVERT, OutVT, + DAG.getNode(ISD::OR, TargetTy, Lo, Hi)); + } + + // Otherwise, lower the bit-convert to a store/load from the stack, then + // promote the load. + SDOperand Op = CreateStackStoreLoad(InOp, N->getValueType(0)); + return PromoteResult_LOAD(cast(Op.Val)); +} + SDOperand DAGTypeLegalizer::PromoteResult_SimpleIntBinOp(SDNode *N) { // The input may have strange things in the top bits of the registers, but // these operations don't care. They may have weird bits going out, but @@ -315,6 +379,51 @@ return DAG.getNode(ISD::CTTZ, NVT, Op); } +SDOperand DAGTypeLegalizer::PromoteResult_EXTRACT_VECTOR_ELT(SDNode *N) { + MVT::ValueType OldVT = N->getValueType(0); + SDOperand OldVec = N->getOperand(0); + unsigned OldElts = MVT::getVectorNumElements(OldVec.getValueType()); + + if (OldElts == 1) { + assert(!isTypeLegal(OldVec.getValueType()) && + "Legal one-element vector of a type needing promotion!"); + // It is tempting to follow GetScalarizedOp by a call to GetPromotedOp, + // but this would be wrong because the scalarized value may not yet have + // been processed. + return DAG.getNode(ISD::ANY_EXTEND, TLI.getTypeToTransformTo(OldVT), + GetScalarizedOp(OldVec)); + } + + // Convert to a vector half as long with an element type of twice the width, + // for example <4 x i16> -> <2 x i32>. + assert(!(OldElts & 1) && "Odd length vectors not supported!"); + MVT::ValueType NewVT = MVT::getIntegerType(2 * MVT::getSizeInBits(OldVT)); + assert(!MVT::isExtendedVT(OldVT) && !MVT::isExtendedVT(NewVT)); + + SDOperand NewVec = DAG.getNode(ISD::BIT_CONVERT, + MVT::getVectorType(NewVT, OldElts / 2), + OldVec); + + // Extract the element at OldIdx / 2 from the new vector. + SDOperand OldIdx = N->getOperand(1); + SDOperand NewIdx = DAG.getNode(ISD::SRL, OldIdx.getValueType(), OldIdx, + DAG.getConstant(1, TLI.getShiftAmountTy())); + SDOperand Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, NewVT, NewVec, NewIdx); + + // Select the appropriate half of the element: Lo if OldIdx was even, + // Hi if it was odd. + SDOperand Lo = Elt; + SDOperand Hi = DAG.getNode(ISD::SRL, NewVT, Elt, + DAG.getConstant(MVT::getSizeInBits(OldVT), + TLI.getShiftAmountTy())); + if (TLI.isBigEndian()) + std::swap(Lo, Hi); + + SDOperand Odd = DAG.getNode(ISD::AND, OldIdx.getValueType(), OldIdx, + DAG.getConstant(1, TLI.getShiftAmountTy())); + return DAG.getNode(ISD::SELECT, NewVT, Odd, Hi, Lo); +} + //===----------------------------------------------------------------------===// // Operand Promotion //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp?rev=47672&r1=47671&r2=47672&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp Wed Feb 27 07:34:40 2008 @@ -176,6 +176,9 @@ assert(0 && "Do not know how to scalarize this operator's operand!"); abort(); + case ISD::BIT_CONVERT: + Res = ScalarizeOp_BIT_CONVERT(N); break; + case ISD::EXTRACT_VECTOR_ELT: Res = ScalarizeOp_EXTRACT_VECTOR_ELT(N); break; @@ -204,6 +207,13 @@ return false; } +/// ScalarizeOp_BIT_CONVERT - If the value to convert is a vector that needs +/// to be scalarized, it must be <1 x ty>. Convert the element instead. +SDOperand DAGTypeLegalizer::ScalarizeOp_BIT_CONVERT(SDNode *N) { + SDOperand Elt = GetScalarizedOp(N->getOperand(0)); + return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0), Elt); +} + /// ScalarizeOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to be /// scalarized, it must be <1 x ty>, so just return the element, ignoring the /// index. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp?rev=47672&r1=47671&r2=47672&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp Wed Feb 27 07:34:40 2008 @@ -172,7 +172,6 @@ else Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, Hi.getValueType(), Hi, ScalarOp, DAG.getConstant(Index - LoNumElts, TLI.getPointerTy())); - } void DAGTypeLegalizer::SplitRes_VECTOR_SHUFFLE(SDNode *N, @@ -253,22 +252,50 @@ SDOperand &Lo, SDOperand &Hi) { // We know the result is a vector. The input may be either a vector or a // scalar value. + MVT::ValueType LoVT, HiVT; + GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); + SDOperand InOp = N->getOperand(0); - if (MVT::isVector(InOp.getValueType()) && - MVT::getVectorNumElements(InOp.getValueType()) != 1) { - // If this is a vector, split the vector and convert each of the pieces now. - GetSplitOp(InOp, Lo, Hi); - - MVT::ValueType LoVT, HiVT; - GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); + MVT::ValueType InVT = InOp.getValueType(); + MVT::ValueType NewInVT = TLI.getTypeToTransformTo(InVT); + switch (getTypeAction(InVT)) { + default: + assert(false && "Unknown type action!"); + case Legal: + break; + case Promote: + break; + case Scalarize: + // While it is tempting to extract the scalarized operand, check whether it + // needs expansion, and if so process it in the Expand case below, there is + // no guarantee that the scalarized operand has been processed yet. If it + // hasn't then the call to GetExpandedOp will abort. So just give up. + break; + case Expand: + // A scalar to vector conversion, where the scalar needs expansion. + // Check that the vector is being split in two. + if (MVT::getSizeInBits(NewInVT) == MVT::getSizeInBits(LoVT)) { + // Convert each expanded piece of the scalar now. + GetExpandedOp(InOp, Lo, Hi); + if (TLI.isBigEndian()) + std::swap(Lo, Hi); + Lo = DAG.getNode(ISD::BIT_CONVERT, LoVT, Lo); + Hi = DAG.getNode(ISD::BIT_CONVERT, HiVT, Hi); + return; + } + break; + case Split: + // If the input is a vector that needs to be split, convert each split + // piece of the input now. + GetSplitOp(InOp, Lo, Hi); Lo = DAG.getNode(ISD::BIT_CONVERT, LoVT, Lo); Hi = DAG.getNode(ISD::BIT_CONVERT, HiVT, Hi); return; } - + // Lower the bit-convert to a store/load from the stack, then split the load. - SDOperand Op = CreateStackStoreLoad(N->getOperand(0), N->getValueType(0)); + SDOperand Op = CreateStackStoreLoad(InOp, N->getValueType(0)); SplitRes_LOAD(cast(Op.Val), Lo, Hi); } @@ -340,8 +367,11 @@ case ISD::STORE: Res = SplitOp_STORE(cast(N), OpNo); break; case ISD::RET: Res = SplitOp_RET(N, OpNo); break; - case ISD::EXTRACT_SUBVECTOR: Res = SplitOp_EXTRACT_SUBVECTOR(N); break; - case ISD::VECTOR_SHUFFLE: Res = SplitOp_VECTOR_SHUFFLE(N, OpNo); break; + case ISD::BIT_CONVERT: Res = SplitOp_BIT_CONVERT(N); break; + + case ISD::EXTRACT_VECTOR_ELT: Res = SplitOp_EXTRACT_VECTOR_ELT(N); break; + case ISD::EXTRACT_SUBVECTOR: Res = SplitOp_EXTRACT_SUBVECTOR(N); break; + case ISD::VECTOR_SHUFFLE: Res = SplitOp_VECTOR_SHUFFLE(N, OpNo); break; } } @@ -402,6 +432,72 @@ return DAG.getNode(ISD::RET, MVT::Other, Chain, Lo, Sign, Hi, Sign); } +SDOperand DAGTypeLegalizer::SplitOp_BIT_CONVERT(SDNode *N) { + // For example, i64 = BIT_CONVERT v4i16 on alpha. Typically the vector will + // end up being split all the way down to individual components. Convert the + // split pieces into integers and reassemble. + SDOperand Lo, Hi; + GetSplitOp(N->getOperand(0), Lo, Hi); + + unsigned LoBits = MVT::getSizeInBits(Lo.getValueType()); + Lo = DAG.getNode(ISD::BIT_CONVERT, MVT::getIntegerType(LoBits), Lo); + + unsigned HiBits = MVT::getSizeInBits(Hi.getValueType()); + Hi = DAG.getNode(ISD::BIT_CONVERT, MVT::getIntegerType(HiBits), Hi); + + if (TLI.isBigEndian()) + std::swap(Lo, Hi); + + assert(LoBits == HiBits && "Do not know how to assemble odd sized vectors!"); + + return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0), + DAG.getNode(ISD::BUILD_PAIR, + MVT::getIntegerType(LoBits+HiBits), Lo, Hi)); +} + +SDOperand DAGTypeLegalizer::SplitOp_EXTRACT_VECTOR_ELT(SDNode *N) { + SDOperand Vec = N->getOperand(0); + SDOperand Idx = N->getOperand(1); + MVT::ValueType VecVT = Vec.getValueType(); + + if (isa(Idx)) { + uint64_t IdxVal = cast(Idx)->getValue(); + assert(IdxVal < MVT::getVectorNumElements(VecVT) && + "Invalid vector index!"); + + SDOperand Lo, Hi; + GetSplitOp(Vec, Lo, Hi); + + uint64_t LoElts = MVT::getVectorNumElements(Lo.getValueType()); + + if (IdxVal < LoElts) + return DAG.UpdateNodeOperands(SDOperand(N, 0), Lo, Idx); + else + return DAG.UpdateNodeOperands(SDOperand(N, 0), Hi, + DAG.getConstant(IdxVal - LoElts, + Idx.getValueType())); + } + + // Store the vector to the stack and load back the required element. + SDOperand StackPtr = DAG.CreateStackTemporary(VecVT); + SDOperand Store = DAG.getStore(DAG.getEntryNode(), Vec, StackPtr, NULL, 0); + + // Add the offset to the index. + MVT::ValueType EltVT = MVT::getVectorElementType(VecVT); + unsigned EltSize = MVT::getSizeInBits(EltVT)/8; // FIXME: should be ABI size. + Idx = DAG.getNode(ISD::MUL, Idx.getValueType(), Idx, + DAG.getConstant(EltSize, Idx.getValueType())); + + if (MVT::getSizeInBits(Idx.getValueType()) > + MVT::getSizeInBits(TLI.getPointerTy())) + Idx = DAG.getNode(ISD::TRUNCATE, TLI.getPointerTy(), Idx); + else + Idx = DAG.getNode(ISD::ZERO_EXTEND, TLI.getPointerTy(), Idx); + + StackPtr = DAG.getNode(ISD::ADD, Idx.getValueType(), Idx, StackPtr); + return DAG.getLoad(EltVT, Store, StackPtr, NULL, 0); +} + SDOperand DAGTypeLegalizer::SplitOp_EXTRACT_SUBVECTOR(SDNode *N) { // We know that the extracted result type is legal. For now, assume the index // is a constant. From gohman at apple.com Wed Feb 27 10:39:08 2008 From: gohman at apple.com (gohman at apple.com) Date: Wed, 27 Feb 2008 08:39:08 -0800 (PST) Subject: [llvm-commits] [llvm] r47656 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp In-Reply-To: <200802270945.45558.baldrick@free.fr> References: <200802270152.m1R1qUFW027088@zion.cs.uiuc.edu> <200802270945.45558.baldrick@free.fr> Message-ID: <56210.76.126.221.87.1204130348.squirrel@webmail.apple.com> Hi Duncan, The testcase I'm working with doesn't work yet :-). While this change fixes one problem, llc now just gets a little further and hits another. I just sent a message to llvmdev about handling i128 return values on x86-32. Dan On Wed, February 27, 2008 12:45 am, Duncan Sands wrote: > Hi, is there a testcase? LegalizeTypes already handles this > by the way (not turned on yet). > > Ciao, > > Duncan. > From gohman at apple.com Wed Feb 27 10:42:12 2008 From: gohman at apple.com (gohman at apple.com) Date: Wed, 27 Feb 2008 08:42:12 -0800 (PST) Subject: [llvm-commits] [llvm] r47660 - in /llvm/trunk: lib/Target/X86/README-X86-64.txt lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/x86-64-dead-stack-adjust.ll In-Reply-To: <200802270557.m1R5vf9h001642@zion.cs.uiuc.edu> References: <200802270557.m1R5vf9h001642@zion.cs.uiuc.edu> Message-ID: <54386.76.126.221.87.1204130532.squirrel@webmail.apple.com> On Tue, February 26, 2008 9:57 pm, Chris Lattner wrote: > +; RUN: llvm-as < %s | not grep rsp This test would be more interesting if it ran llc -march=x86-64 :-). Dan From baldrick at free.fr Wed Feb 27 10:55:50 2008 From: baldrick at free.fr (Duncan Sands) Date: Wed, 27 Feb 2008 17:55:50 +0100 Subject: [llvm-commits] [llvm] r47656 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp In-Reply-To: <56210.76.126.221.87.1204130348.squirrel@webmail.apple.com> References: <200802270152.m1R1qUFW027088@zion.cs.uiuc.edu> <200802270945.45558.baldrick@free.fr> <56210.76.126.221.87.1204130348.squirrel@webmail.apple.com> Message-ID: <200802271755.50871.baldrick@free.fr> Hi Dan, > The testcase I'm working with doesn't work yet :-). While this > change fixes one problem, llc now just gets a little further and > hits another. I just sent a message to llvmdev about handling i128 > return values on x86-32. your message didn't turn up yet. At least with the LegalizeTypes machinery turned on, returning i128 x86-32 works except that the X86 calling convention doesn't know how to return a value requiring four registers. Ciao, D. From clattner at apple.com Wed Feb 27 11:13:59 2008 From: clattner at apple.com (Chris Lattner) Date: Wed, 27 Feb 2008 09:13:59 -0800 Subject: [llvm-commits] [llvm] r47660 - in /llvm/trunk: lib/Target/X86/README-X86-64.txt lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/x86-64-dead-stack-adjust.ll In-Reply-To: <54386.76.126.221.87.1204130532.squirrel@webmail.apple.com> References: <200802270557.m1R5vf9h001642@zion.cs.uiuc.edu> <54386.76.126.221.87.1204130532.squirrel@webmail.apple.com> Message-ID: <0F770FA5-9F53-40ED-8501-02DB687EA7B3@apple.com> On Feb 27, 2008, at 8:42 AM, gohman at apple.com wrote: > On Tue, February 26, 2008 9:57 pm, Chris Lattner wrote: >> +; RUN: llvm-as < %s | not grep rsp > > This test would be more interesting if it ran llc -march=x86-64 :-). It does! It has a target triple that specifies that :) -Chris From lauro.venancio at gmail.com Wed Feb 27 11:20:32 2008 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Wed, 27 Feb 2008 17:20:32 -0000 Subject: [llvm-commits] [llvm] r47674 - /llvm/trunk/lib/Linker/LinkItems.cpp Message-ID: <200802271720.m1RHKWm4029768@zion.cs.uiuc.edu> Author: laurov Date: Wed Feb 27 11:20:32 2008 New Revision: 47674 URL: http://llvm.org/viewvc/llvm-project?rev=47674&view=rev Log: Emit an error when a library is not found. It is the GNU ld behavior and it is expected by the configure scripts. Modified: llvm/trunk/lib/Linker/LinkItems.cpp Modified: llvm/trunk/lib/Linker/LinkItems.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkItems.cpp?rev=47674&r1=47673&r2=47674&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkItems.cpp (original) +++ llvm/trunk/lib/Linker/LinkItems.cpp Wed Feb 27 11:20:32 2008 @@ -74,7 +74,7 @@ // Determine where this library lives. sys::Path Pathname = FindLib(Lib); if (Pathname.isEmpty()) - return warning("Cannot find library '" + Lib + "'"); + return error("Cannot find library '" + Lib + "'"); // If its an archive, try to link it in std::string Magic; From clattner at apple.com Wed Feb 27 11:21:31 2008 From: clattner at apple.com (Chris Lattner) Date: Wed, 27 Feb 2008 09:21:31 -0800 Subject: [llvm-commits] [llvm] r47670 - in /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeTypes.h LegalizeTypesSplit.cpp In-Reply-To: <200802271303.m1RD3ldi022455@zion.cs.uiuc.edu> References: <200802271303.m1RD3ldi022455@zion.cs.uiuc.edu> Message-ID: <3C57AA0B-6836-4471-8FA2-AC58B345EECA@apple.com> On Feb 27, 2008, at 5:03 AM, Duncan Sands wrote: > Author: baldrick > Date: Wed Feb 27 07:03:44 2008 > New Revision: 47670 > > URL: http://llvm.org/viewvc/llvm-project?rev=47670&view=rev > Log: > LegalizeTypes support for legalizing the mask > operand of a VECTOR_SHUFFLE. The mask is a > vector of constant integers. The code in > LegalizeDAG doesn't bother to legalize the > mask, since it's basically just storage for > a bunch of constants, however LegalizeTypes > is more picky. The problem is that there may > not exist any legal vector-of-integers type > with a legal element type, so it is impossible > to create a legal mask! Unless of course you > cheat by creating a BUILD_VECTOR where the > operands have a different type to the element > type of the vector being built... This is > pretty ugly but works - all relevant tests in > the testsuite pass, and produce the same > assembler with and without LegalizeTypes. Yeah, this is horrible. :( The fix we eventually want to do is to change VECTOR_SHUFFLE to be a variadic node where the shuffle mask is a list of integer operands (operands #2..2+n) instead of a BUILD_VECTOR. This means that you just have to pick a legal integer type or use targetconstant nodes. Thanks for adding this to legalizetypes! -Chris From gohman at apple.com Wed Feb 27 11:27:37 2008 From: gohman at apple.com (Dan Gohman) Date: Wed, 27 Feb 2008 09:27:37 -0800 (PST) Subject: [llvm-commits] [llvm] r47660 - in /llvm/trunk: lib/Target/X86/README-X86-64.txt lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/x86-64-dead-stack-adjust.ll In-Reply-To: <0F770FA5-9F53-40ED-8501-02DB687EA7B3@apple.com> References: <200802270557.m1R5vf9h001642@zion.cs.uiuc.edu> <54386.76.126.221.87.1204130532.squirrel@webmail.apple.com> <0F770FA5-9F53-40ED-8501-02DB687EA7B3@apple.com> Message-ID: <54783.76.126.221.87.1204133257.squirrel@webmail.apple.com> On Wed, February 27, 2008 9:13 am, Chris Lattner wrote: > > On Feb 27, 2008, at 8:42 AM, gohman at apple.com wrote: > >> On Tue, February 26, 2008 9:57 pm, Chris Lattner wrote: >>> +; RUN: llvm-as < %s | not grep rsp >> >> This test would be more interesting if it ran llc -march=x86-64 :-). > > It does! It has a target triple that specifies that :) Ok, then it's just missing the llc part. Dan From baldrick at free.fr Wed Feb 27 11:39:14 2008 From: baldrick at free.fr (Duncan Sands) Date: Wed, 27 Feb 2008 17:39:14 -0000 Subject: [llvm-commits] [llvm] r47676 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp Message-ID: <200802271739.m1RHdEKL030313@zion.cs.uiuc.edu> Author: baldrick Date: Wed Feb 27 11:39:13 2008 New Revision: 47676 URL: http://llvm.org/viewvc/llvm-project?rev=47676&view=rev Log: Add a FIXME about the VECTOR_SHUFFLE evil hack. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp?rev=47676&r1=47675&r2=47676&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp Wed Feb 27 11:39:13 2008 @@ -547,6 +547,8 @@ // If the element type is not legal, find a larger legal type to use for // the BUILD_VECTOR operands. This is an ugly hack, but seems to work! + // FIXME: The real solution is to change VECTOR_SHUFFLE into a variadic + // node where the shuffle mask is a list of integer operands, #2 .. #2+n. for (MVT::SimpleValueType OpVT = EltVT; OpVT <= MVT::LAST_INTEGER_VALUETYPE; // Integer values types are consecutively numbered. Exploit this. OpVT = MVT::SimpleValueType(OpVT + 1)) { From baldrick at free.fr Wed Feb 27 11:39:27 2008 From: baldrick at free.fr (Duncan Sands) Date: Wed, 27 Feb 2008 18:39:27 +0100 Subject: [llvm-commits] [llvm] r47670 - in /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeTypes.h LegalizeTypesSplit.cpp In-Reply-To: <3C57AA0B-6836-4471-8FA2-AC58B345EECA@apple.com> References: <200802271303.m1RD3ldi022455@zion.cs.uiuc.edu> <3C57AA0B-6836-4471-8FA2-AC58B345EECA@apple.com> Message-ID: <200802271839.28032.baldrick@free.fr> > Yeah, this is horrible. :( The fix we eventually want to do is to > change VECTOR_SHUFFLE to be a variadic node where the shuffle mask is > a list of integer operands (operands #2..2+n) instead of a > BUILD_VECTOR. This means that you just have to pick a legal integer > type or use targetconstant nodes. Right, but it seemed better to leave that till later. I've added a big FIXME. > Thanks for adding this to legalizetypes! No problem :) Ciao, D. From sabre at nondot.org Wed Feb 27 11:46:55 2008 From: sabre at nondot.org (Chris Lattner) Date: Wed, 27 Feb 2008 17:46:55 -0000 Subject: [llvm-commits] [llvm] r47677 - /llvm/trunk/test/CodeGen/X86/x86-64-dead-stack-adjust.ll Message-ID: <200802271746.m1RHktVi030547@zion.cs.uiuc.edu> Author: lattner Date: Wed Feb 27 11:46:54 2008 New Revision: 47677 URL: http://llvm.org/viewvc/llvm-project?rev=47677&view=rev Log: actually run llc, thanks Dan :) Modified: llvm/trunk/test/CodeGen/X86/x86-64-dead-stack-adjust.ll Modified: llvm/trunk/test/CodeGen/X86/x86-64-dead-stack-adjust.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-dead-stack-adjust.ll?rev=47677&r1=47676&r2=47677&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/x86-64-dead-stack-adjust.ll (original) +++ llvm/trunk/test/CodeGen/X86/x86-64-dead-stack-adjust.ll Wed Feb 27 11:46:54 2008 @@ -1,4 +1,6 @@ -; RUN: llvm-as < %s | not grep rsp +; RUN: llvm-as < %s | llc | not grep rsp +; RUN: llvm-as < %s | llc | grep cvttsd2siq + target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin8" From clattner at apple.com Wed Feb 27 11:47:13 2008 From: clattner at apple.com (Chris Lattner) Date: Wed, 27 Feb 2008 09:47:13 -0800 Subject: [llvm-commits] [llvm] r47660 - in /llvm/trunk: lib/Target/X86/README-X86-64.txt lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/x86-64-dead-stack-adjust.ll In-Reply-To: <54783.76.126.221.87.1204133257.squirrel@webmail.apple.com> References: <200802270557.m1R5vf9h001642@zion.cs.uiuc.edu> <54386.76.126.221.87.1204130532.squirrel@webmail.apple.com> <0F770FA5-9F53-40ED-8501-02DB687EA7B3@apple.com> <54783.76.126.221.87.1204133257.squirrel@webmail.apple.com> Message-ID: <5A15BAC0-A67C-44CA-B04D-CF63AE6D543F@apple.com> On Feb 27, 2008, at 9:27 AM, Dan Gohman wrote: > On Wed, February 27, 2008 9:13 am, Chris Lattner wrote: >> >> On Feb 27, 2008, at 8:42 AM, gohman at apple.com wrote: >> >>> On Tue, February 26, 2008 9:57 pm, Chris Lattner wrote: >>>> +; RUN: llvm-as < %s | not grep rsp >>> >>> This test would be more interesting if it ran llc -march=x86-64 :-). >> >> It does! It has a target triple that specifies that :) > > Ok, then it's just missing the llc part. Gosh, some people are just impossible to make happy ;-) Fixed, thanks for noticing! -Chris From dalej at apple.com Wed Feb 27 11:59:59 2008 From: dalej at apple.com (Dale Johannesen) Date: Wed, 27 Feb 2008 09:59:59 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r47655 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp In-Reply-To: References: <200802270132.m1R1Wr5w026552@zion.cs.uiuc.edu> Message-ID: On Feb 26, 2008, at 9:20 PM, Chris Lattner wrote: > On Feb 26, 2008, at 5:32 PM, Dale Johannesen wrote: >> URL: http://llvm.org/viewvc/llvm-project?rev=47655&view=rev >> Log: >> Hack to handle darwin ppc32's weird choice of >> representation for bool. Fixes >> gcc.dg-struct-layout-1/t009 Sorry, I assumed some familiarity with the testsuite structure, and have the pathname wrong to boot. The file struct-layout-1.exp builds tests dynamically; it lives in /gcc/testsuite/gcc.dg/ compat. The dynamically built tests consist of 3 source files each of whose names contains a string of the form t0<2-digit number>. The easiest way to run them is cd make -k check RUNTESTFLAGS=struct-layout-1.exp and look at the log file in /gcc/testsuite/gcc/gcc.log to see what got executed. There is also a C++ variant. These tests exercise self-consistency in struct/union layout and calling convention very thoroughly (they are not ABI tests against the installed cc), and are well worth looking at. Currently, this passes cleanly on Darwin x86-32 (finally!) but there are lots of other failures on ppc32, which I'll be looking at. Anton said there are also a few failures left on Linux x86-32, but that thread seems to have died... >> Nice! Really? > >> tree TheGccTy = TREE_TYPE(Field); >> +#ifdef TARGET_POWERPC > > Eww. :) Is this information encoded in the trees somehow? Duncan, do > you have any idea? Dale, can you include a tree dump of the type in > this case? That's more like it. This is the source (remember _Bool is 4 bytes): typedef _Bool Tal2bool __attribute__((aligned (2))); union {Tal2bool g:1;} u; and this is the tree: constant invariant 16> unit size constant invariant 2> user align 16 symtab 0 alias set -1 fields unit size user align 16 symtab 0 alias set -1 precision 1 min max > unsigned external asm-frame-size 0 bit-field nonaddressable decl_4 SI file /Volumes/MacOS9/gcc/llvm-gcc-4.2.leo.obj/gcc/testsuite/ gcc/gcc.dg-struct-layout-1/t009_test.h line 47 size unit size align 1 offset_align 128 offset bit offset bit_field_type context > pointer_to_this chain > On Feb 26, 2008, at 10:35 PM, Anton Korobeynikov wrote: >> +#ifdef TARGET_POWERPC > Also, maybe it will be better to move this chunk of code into > config/rs6000 directory? The same way as TARGET_ADJUST_LLVM_CC and > friends are working? Sure, I can do that. Personally I've never like this part of gcc style, which seems to me to obscure what's going on, but it is traditional. > + // Normally gcc reduces the size of bitfields to the size > necessary > + // to hold the bits, e.g. a 1-bit field becomes QI. On Feb 27, 2008, at 12:43 AM, Duncan Sands wrote: >> + // Normally gcc reduces the size of bitfields to the size >> necessary >> + // to hold the bits, e.g. a 1-bit field becomes QI. > > So this is a union with a bitfield member? If so, can you not just > do: > > (1) use isBitfield to see if it is a bitfield. > (2) rather than converting the type (which should be completely > ignored in > the case of a bitfield), generate i8, i16 or whatever based on > DECL_SIZE. > > And don't condition this on PPC or other tests. If the problem is > what I'm > imagining it is, this is needed in general: though we usually get > away with > it by using the type generated by gcc's struct layout, we don't in > fact want > to use the types produced by gcc's struct layout for bitfields (we > don't in > the rest of the struct conversion stuff). ConvertUnion does in fact look at the type of bitfields; I didn't introduce this. In all other cases I've seen, gcc has already done the reduction to i8 etc. that you're talking about, so in general this works. The problem here is that the type of the bitfield is bigger than the type of the union; that is due to Darwin ppc32's bizarre choice of representation for bool, and I don't think it can happen otherwise. From baldrick at free.fr Wed Feb 27 12:12:42 2008 From: baldrick at free.fr (Duncan Sands) Date: Wed, 27 Feb 2008 19:12:42 +0100 Subject: [llvm-commits] [llvm-gcc-4.2] r47655 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp In-Reply-To: References: <200802270132.m1R1Wr5w026552@zion.cs.uiuc.edu> Message-ID: <200802271912.42547.baldrick@free.fr> Hi Dale, > ConvertUnion does in fact look at the type of bitfields; right, and that's a mistake right there it seems to me. I'm pretty sure that ConvertRECORD doesn't have this problem (which in that case would be a Darwin BOOL going off the end of the struct). Why not? Because it only uses DECL_SIZE and never TYPE_SIZE, and though it does look at types for bitfields it only does so in a mild way. > I didn't > introduce this. In all other cases I've seen, gcc has already done > the reduction to i8 etc. that you're talking about, so in general this > works. The problem here is that the type of the bitfield is bigger > than the type of the union; that is due to Darwin ppc32's bizarre > choice of representation for bool, and I don't think it can happen > otherwise. I think ConvertUNION should take the same approach as ConvertRECORD (only it's much simpler in this case): it makes sense to have them work and be designed in the same way as much as possible [*]. Ciao, Duncan. [*] In order to handle Fortran equivalence, they need to be merged anyway, so I have a vested interest in seeing the logic converge rather than diverge. From evan.cheng at apple.com Wed Feb 27 12:36:48 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 27 Feb 2008 18:36:48 -0000 Subject: [llvm-commits] [test-suite] r47679 - /test-suite/trunk/External/SPEC/CFP2006/444.namd/Makefile Message-ID: <200802271836.m1RIamoJ031958@zion.cs.uiuc.edu> Author: evancheng Date: Wed Feb 27 12:36:48 2008 New Revision: 47679 URL: http://llvm.org/viewvc/llvm-project?rev=47679&view=rev Log: Reflects llvm-ld changes. Modified: test-suite/trunk/External/SPEC/CFP2006/444.namd/Makefile Modified: test-suite/trunk/External/SPEC/CFP2006/444.namd/Makefile URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/External/SPEC/CFP2006/444.namd/Makefile?rev=47679&r1=47678&r2=47679&view=diff ============================================================================== --- test-suite/trunk/External/SPEC/CFP2006/444.namd/Makefile (original) +++ test-suite/trunk/External/SPEC/CFP2006/444.namd/Makefile Wed Feb 27 12:36:48 2008 @@ -14,4 +14,4 @@ STDOUT_FILENAME := namd.out LDFLAGS = -lstdc++ -lm -LIBS = -lstdc++ -lm +LIBS = -lm From gohman at apple.com Wed Feb 27 12:38:30 2008 From: gohman at apple.com (Dan Gohman) Date: Wed, 27 Feb 2008 18:38:30 -0000 Subject: [llvm-commits] [llvm] r47680 - in /llvm/trunk/include/llvm/Analysis: Dominators.h PostDominators.h Message-ID: <200802271838.m1RIcU9q032011@zion.cs.uiuc.edu> Author: djg Date: Wed Feb 27 12:38:29 2008 New Revision: 47680 URL: http://llvm.org/viewvc/llvm-project?rev=47680&view=rev Log: Add -analyze support to postdomtree. Modified: llvm/trunk/include/llvm/Analysis/Dominators.h llvm/trunk/include/llvm/Analysis/PostDominators.h Modified: llvm/trunk/include/llvm/Analysis/Dominators.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/Dominators.h?rev=47680&r1=47679&r2=47680&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/Dominators.h (original) +++ llvm/trunk/include/llvm/Analysis/Dominators.h Wed Feb 27 12:38:29 2008 @@ -508,7 +508,10 @@ /// virtual void print(std::ostream &o, const Module* ) const { o << "=============================--------------------------------\n"; - o << "Inorder Dominator Tree: "; + if (this->isPostDominator()) + o << "Inorder PostDominator Tree: "; + else + o << "Inorder Dominator Tree: "; if (this->DFSInfoValid) o << "DFSNumbers invalid: " << SlowQueries << " slow queries."; o << "\n"; Modified: llvm/trunk/include/llvm/Analysis/PostDominators.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/PostDominators.h?rev=47680&r1=47679&r2=47680&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/PostDominators.h (original) +++ llvm/trunk/include/llvm/Analysis/PostDominators.h Wed Feb 27 12:38:29 2008 @@ -54,6 +54,10 @@ inline bool properlyDominates(BasicBlock* A, BasicBlock* B) const { return DT->properlyDominates(A, B); } + + virtual void print(std::ostream &OS, const Module* M= 0) const { + DT->print(OS, M); + } }; From asl at math.spbu.ru Wed Feb 27 13:25:16 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 27 Feb 2008 19:25:16 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47684 - in /llvm-gcc-4.2/trunk/gcc: config.gcc config/i386/cygming-crtbegin.c config/i386/cygming-crtend.c config/i386/cygming.h config/i386/cygwin.h config/i386/mingw32.h config/i386/t-cygming libgcc2.c Message-ID: <200802271925.m1RJPH2d000820@zion.cs.uiuc.edu> Author: asl Date: Wed Feb 27 13:25:16 2008 New Revision: 47684 URL: http://llvm.org/viewvc/llvm-project?rev=47684&view=rev Log: Provide necessary bits for Dwarf2 EH on mingw32 Added: llvm-gcc-4.2/trunk/gcc/config/i386/cygming-crtbegin.c llvm-gcc-4.2/trunk/gcc/config/i386/cygming-crtend.c Modified: llvm-gcc-4.2/trunk/gcc/config.gcc llvm-gcc-4.2/trunk/gcc/config/i386/cygming.h llvm-gcc-4.2/trunk/gcc/config/i386/cygwin.h llvm-gcc-4.2/trunk/gcc/config/i386/mingw32.h llvm-gcc-4.2/trunk/gcc/config/i386/t-cygming llvm-gcc-4.2/trunk/gcc/libgcc2.c Modified: llvm-gcc-4.2/trunk/gcc/config.gcc URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config.gcc?rev=47684&r1=47683&r2=47684&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config.gcc (original) +++ llvm-gcc-4.2/trunk/gcc/config.gcc Wed Feb 27 13:25:16 2008 @@ -1321,6 +1321,7 @@ c_target_objs=cygwin2.o cxx_target_objs="cygwin2.o winnt-cxx.o" extra_gcc_objs=cygwin1.o + extra_parts="crtbegin.o crtend.o" if test x$enable_threads = xyes; then thread_file='posix' fi @@ -1333,6 +1334,7 @@ extra_options="${extra_options} i386/cygming.opt" extra_objs="winnt.o winnt-stubs.o" cxx_target_objs=winnt-cxx.o + extra_parts="crtbegin.o crtend.o" case ${enable_threads} in "" | yes | win32) thread_file='win32' Added: llvm-gcc-4.2/trunk/gcc/config/i386/cygming-crtbegin.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/cygming-crtbegin.c?rev=47684&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/cygming-crtbegin.c (added) +++ llvm-gcc-4.2/trunk/gcc/config/i386/cygming-crtbegin.c Wed Feb 27 13:25:16 2008 @@ -0,0 +1,140 @@ +/* crtbegin object for windows32 targets. + Copyright (C) 2007 Free Software Foundation, Inc. + + Contributed by Danny Smith + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. + +In addition to the permissions in the GNU General Public License, the +Free Software Foundation gives you unlimited permission to link the +compiled version of this file into combinations with other programs, +and to distribute those combinations without any restriction coming +from the use of this file. (The General Public License restrictions +do apply in other respects; for example, they cover modification of +the file, and distribution when not linked into a combine +executable.) + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ + +/* Target machine header files require this define. */ +#define IN_LIBGCC2 + +#include "auto-host.h" +#include "tconfig.h" +#include "tsystem.h" +#include "coretypes.h" +#include "tm.h" +#include "unwind-dw2-fde.h" + +#define WIN32_LEAN_AND_MEAN +#include + +#ifndef LIBGCC_SONAME +#define LIBGCC_SONAME "libgcc_s.dll" +#endif + +#ifndef LIBGCJ_SONAME +#define LIBGCJ_SONAME "libgcj_s.dll" +#endif + + +/* Make the declarations weak. This is critical for + _Jv_RegisterClasses because it lives in libgcj.a */ +extern void __register_frame_info (const void *, struct object *) + TARGET_ATTRIBUTE_WEAK; +extern void *__deregister_frame_info (const void *) + TARGET_ATTRIBUTE_WEAK; +extern void _Jv_RegisterClasses (const void *) TARGET_ATTRIBUTE_WEAK; + +#if defined(HAVE_LD_RO_RW_SECTION_MIXING) +# define EH_FRAME_SECTION_CONST const +#else +# define EH_FRAME_SECTION_CONST +#endif + +/* Stick a label at the beginning of the frame unwind info so we can + register/deregister it with the exception handling library code. */ +#if DWARF2_UNWIND_INFO +static EH_FRAME_SECTION_CONST char __EH_FRAME_BEGIN__[] + __attribute__((section(EH_FRAME_SECTION_NAME), aligned(4))) + = { }; + +static struct object obj; +#endif + +#if TARGET_USE_JCR_SECTION +static void *__JCR_LIST__[] + __attribute__ ((unused, section(JCR_SECTION_NAME), aligned(4))) + = { }; +#endif + +/* Pull in references from libgcc.a(unwind-dw2-fde.o) in the + startfile. These are referenced by a ctor and dtor in crtend.o. */ +extern void __gcc_register_frame (void); +extern void __gcc_deregister_frame (void); + +void +__gcc_register_frame (void) +{ +#if DWARF2_UNWIND_INFO +/* Weak undefined symbols won't be pulled in from dlls; hence + we first test if the dll is already loaded and, if so, + get the symbol's address at run-time. If the dll is not loaded, + fallback to weak linkage to static archive. */ + + void (*register_frame_fn) (const void *, struct object *); + HANDLE h = GetModuleHandle (LIBGCC_SONAME); + if (h) + register_frame_fn = (void (*) (const void *, struct object *)) + GetProcAddress (h, "__register_frame_info"); + else + register_frame_fn = __register_frame_info; + if (register_frame_fn) + register_frame_fn (__EH_FRAME_BEGIN__, &obj); +#endif + +#if TARGET_USE_JCR_SECTION + if (__JCR_LIST__[0]) + { + void (*register_class_fn) (const void *); + HANDLE h = GetModuleHandle (LIBGCJ_SONAME); + if (h) + register_class_fn = (void (*) (const void *)) + GetProcAddress (h, "_Jv_RegisterClasses"); + else + register_class_fn = _Jv_RegisterClasses; + + if (register_class_fn) + register_class_fn (__JCR_LIST__); + } +#endif +} + +void +__gcc_deregister_frame (void) +{ +#if DWARF2_UNWIND_INFO + void * (*deregister_frame_fn) (const void *); + HANDLE h = GetModuleHandle (LIBGCC_SONAME); + if (h) + deregister_frame_fn = (void* (*) (const void *)) + GetProcAddress (h, "__deregister_frame_info"); + else + deregister_frame_fn = __deregister_frame_info; + if (deregister_frame_fn) + deregister_frame_fn (__EH_FRAME_BEGIN__); +#endif +} Added: llvm-gcc-4.2/trunk/gcc/config/i386/cygming-crtend.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/cygming-crtend.c?rev=47684&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/cygming-crtend.c (added) +++ llvm-gcc-4.2/trunk/gcc/config/i386/cygming-crtend.c Wed Feb 27 13:25:16 2008 @@ -0,0 +1,92 @@ +/* crtend object for windows32 targets. + Copyright (C) 2007 Free Software Foundation, Inc. + + Contributed by Danny Smith + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. + +In addition to the permissions in the GNU General Public License, the +Free Software Foundation gives you unlimited permission to link the +compiled version of this file into combinations with other programs, +and to distribute those combinations without any restriction coming +from the use of this file. (The General Public License restrictions +do apply in other respects; for example, they cover modification of +the file, and distribution when not linked into a combine +executable.) + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ + +/* Target machine header files require this define. */ +#define IN_LIBGCC2 + +/* auto-host.h is needed by cygming.h for HAVE_GAS_WEAK and here + for HAVE_LD_RO_RW_SECTION_MIXING. */ +#include "auto-host.h" +#include "tconfig.h" +#include "tsystem.h" +#include "coretypes.h" +#include "tm.h" +#include "unwind-dw2-fde.h" + +#if defined(HAVE_LD_RO_RW_SECTION_MIXING) +# define EH_FRAME_SECTION_CONST const +#else +# define EH_FRAME_SECTION_CONST +#endif + +#if DWARF2_UNWIND_INFO +/* Terminate the frame unwind info section with a 0 as a sentinel; + this would be the 'length' field in a real FDE. */ + +static EH_FRAME_SECTION_CONST int __FRAME_END__[] + __attribute__ ((unused, section(EH_FRAME_SECTION_NAME), + aligned(4))) + = { 0 }; +#endif + +#if TARGET_USE_JCR_SECTION +/* Null terminate the .jcr section array. */ +static void *__JCR_END__[1] + __attribute__ ((unused, section(JCR_SECTION_NAME), + aligned(sizeof(void *)))) + = { 0 }; +#endif + + +/* +extern void __gcco_register_frame (void); +extern void __gcco_deregister_frame (void); +*/ + + +/* Register the eh_frame. This has to be the first .ctor to be invoked + so we put its address in the .ctor section of the last object and + give it a high priority (ld uses strcmp to sort sections by name). + The definition is in crtbegin.c since we need to pull in. + libgcc.a __register_frame_info. + Likewise for frame deregistration on exit from app or dll. */ + +/* FIXME: Port constructor(N) here */ + +__asm__( + ".section\t.ctors.zzzzz ,\"w\"\n\t" + ".align 4\n\t" + ".long\t___gcc_register_frame"); + +__asm__( + ".section\t.dtors.zzzzz ,\"w\"\n\t" + ".align 4\n\t" + ".long\t___gcc_deregister_frame "); Modified: llvm-gcc-4.2/trunk/gcc/config/i386/cygming.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/cygming.h?rev=47684&r1=47683&r2=47684&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/cygming.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/cygming.h Wed Feb 27 13:25:16 2008 @@ -29,11 +29,24 @@ #ifdef HAVE_GAS_PE_SECREL32_RELOC #define DWARF2_DEBUGGING_INFO 1 +/* LLVM LOCAL begin mainline 125696 */ +/* Map gcc register number to DBX register number. Maintain + compatibility with old -gstabs compiled code. */ +/* LLVM LOCAL end mainline 125696 */ #undef DBX_REGISTER_NUMBER #define DBX_REGISTER_NUMBER(n) (write_symbols == DWARF2_DEBUG \ ? svr4_dbx_register_map[n] \ : dbx_register_map[n]) +/* LLVM LOCAL begin mainline 125696 */ +/* Map gcc register number to DWARF 2 CFA column number. Always + use the svr4_dbx_register_map for DWARF .eh_frame even if we + don't use DWARF .debug_frame. */ +#undef DWARF_FRAME_REGNUM +#define DWARF_FRAME_REGNUM(n) svr4_dbx_register_map[(n)] +/* LLVM LOCAL end mainline 125696 */ + + /* Use section relative relocations for debugging offsets. Unlike other targets that fake this by putting the section VMA at 0, PE won't allow it. */ @@ -262,10 +275,17 @@ #undef ASM_COMMENT_START #define ASM_COMMENT_START " #" -/* DWARF2 Unwinding doesn't work with exception handling yet. To make - it work, we need to build a libgcc_s.dll, and dcrt0.o should be - changed to call __register_frame_info/__deregister_frame_info. */ +/* LLVM LOCAL begin mainline 125696 */ +#ifndef DWARF2_UNWIND_INFO +/* If configured with --disable-sjlj-exceptions, use DWARF2, else + default to SJLJ */ +#if defined (CONFIG_SJLJ_EXCEPTIONS) && !CONFIG_SJLJ_EXCEPTIONS +#define DWARF2_UNWIND_INFO 1 +#else #define DWARF2_UNWIND_INFO 0 +#endif +#endif +/* LLVM LOCAL end mainline 125696 */ /* Don't assume anything about the header files. */ #define NO_IMPLICIT_EXTERN_C Modified: llvm-gcc-4.2/trunk/gcc/config/i386/cygwin.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/cygwin.h?rev=47684&r1=47683&r2=47684&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/cygwin.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/cygwin.h Wed Feb 27 13:25:16 2008 @@ -33,12 +33,17 @@ %{!nostdinc:%{!mno-win32|mno-cygwin:-idirafter ../include/w32api%s -idirafter ../../include/w32api%s}}\ " +/* LLVM LOCAL begin mainline 125696 */ #undef STARTFILE_SPEC #define STARTFILE_SPEC "\ %{shared|mdll: %{mno-cygwin:dllcrt2%O%s}}\ %{!shared: %{!mdll: %{!mno-cygwin:crt0%O%s} %{mno-cygwin:crt2%O%s}\ %{pg:gcrt0%O%s}}}\ -" + crtbegin%O%s" + +#undef ENDFILE_SPEC +#define ENDFILE_SPEC "crtend%O%s" +/* LLVM LOCAL end mainline 125696 */ /* Normally, -lgcc is not needed since everything in it is in the DLL, but we want to allow things to be added to it when installing new versions of Modified: llvm-gcc-4.2/trunk/gcc/config/i386/mingw32.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/mingw32.h?rev=47684&r1=47683&r2=47684&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/mingw32.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/mingw32.h Wed Feb 27 13:25:16 2008 @@ -65,9 +65,16 @@ #define LIBGCC_SPEC \ "%{mthreads:-lmingwthrd} -lmingw32 -lgcc -lmoldname -lmingwex -lmsvcrt" +/* LLVM LOCAL begin mainline 125696 */ #undef STARTFILE_SPEC #define STARTFILE_SPEC "%{shared|mdll:dllcrt2%O%s} \ - %{!shared:%{!mdll:crt2%O%s}} %{pg:gcrt2%O%s}" + %{!shared:%{!mdll:crt2%O%s}} %{pg:gcrt2%O%s} \ + crtbegin%O%s" + +#undef ENDFILE_SPEC +#define ENDFILE_SPEC "crtend%O%s" +/* LLVM LOCAL end mainline 125696 */ + /* Override startfile prefix defaults. */ #ifndef STANDARD_STARTFILE_PREFIX_1 @@ -112,3 +119,10 @@ /* mingw32 uses the -mthreads option to enable thread support. */ #undef GOMP_SELF_SPECS #define GOMP_SELF_SPECS "%{fopenmp: -mthreads}" + + +/* LLVM LOCAL begin mainline 125696 */ +/* This works on mingw32. */ +#undef TARGET_USE_JCR_SECTION +#define TARGET_USE_JCR_SECTION 1 +/* LLVM LOCAL end mainline 125696 */ Modified: llvm-gcc-4.2/trunk/gcc/config/i386/t-cygming URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/t-cygming?rev=47684&r1=47683&r2=47684&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/t-cygming (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/t-cygming Wed Feb 27 13:25:16 2008 @@ -30,3 +30,18 @@ $(srcdir)/config/i386/winnt-stubs.c STMP_FIXINC=stmp-fixinc + +# LLVM LOCAL begin mainline 125696 +# Effectively disable the crtbegin/end rules using crtstuff.c +T = disable + +CRTSTUFF_T_CFLAGS = -fno-omit-frame-pointer + +crtbegin.o: $(srcdir)/config/i386/cygming-crtbegin.c $(GCC_PASSES) + $(GCC_FOR_TARGET) $(CRTSTUFF_CFLAGS) -c -o crtbegin.o \ + $(srcdir)/config/i386/cygming-crtbegin.c + +crtend.o: $(srcdir)/config/i386/cygming-crtend.c $(GCC_PASSES) + $(GCC_FOR_TARGET) $(CRTSTUFF_CFLAGS) -c -o crtend.o \ + $(srcdir)/config/i386/cygming-crtend.c +# LLVM LOCAL end mainline 125696 Modified: llvm-gcc-4.2/trunk/gcc/libgcc2.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/libgcc2.c?rev=47684&r1=47683&r2=47684&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/libgcc2.c (original) +++ llvm-gcc-4.2/trunk/gcc/libgcc2.c Wed Feb 27 13:25:16 2008 @@ -2126,7 +2126,7 @@ #endif #endif /* L_trampoline */ -#ifndef __CYGWIN__ +#if !defined (__CYGWIN__) && !defined(__MINGW32__) #ifdef L__main #include "gbl-ctors.h" From asl at math.spbu.ru Wed Feb 27 13:41:09 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 27 Feb 2008 19:41:09 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47685 - in /llvm-gcc-4.2/trunk/gcc/config/i386: mingw32.h w32-unwind.h Message-ID: <200802271941.m1RJfAok001449@zion.cs.uiuc.edu> Author: asl Date: Wed Feb 27 13:41:09 2008 New Revision: 47685 URL: http://llvm.org/viewvc/llvm-project?rev=47685&view=rev Log: Provide necesary unwinding hook. Backported from gcc 4.3 (pre GPLv3) and slightly adjusted for 4.2.x Added: llvm-gcc-4.2/trunk/gcc/config/i386/w32-unwind.h Modified: llvm-gcc-4.2/trunk/gcc/config/i386/mingw32.h Modified: llvm-gcc-4.2/trunk/gcc/config/i386/mingw32.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/mingw32.h?rev=47685&r1=47684&r2=47685&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/mingw32.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/mingw32.h Wed Feb 27 13:41:09 2008 @@ -125,4 +125,6 @@ /* This works on mingw32. */ #undef TARGET_USE_JCR_SECTION #define TARGET_USE_JCR_SECTION 1 + +#define MD_UNWIND_SUPPORT "config/i386/w32-unwind.h" /* LLVM LOCAL end mainline 125696 */ Added: llvm-gcc-4.2/trunk/gcc/config/i386/w32-unwind.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/w32-unwind.h?rev=47685&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/w32-unwind.h (added) +++ llvm-gcc-4.2/trunk/gcc/config/i386/w32-unwind.h Wed Feb 27 13:41:09 2008 @@ -0,0 +1,223 @@ +/* Definitions for Dwarf2 EH unwind support for Windows32 targets + Copyright (C) 2007 + Free Software Foundation, Inc. + Contributed by Pascal Obry + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. + +In addition to the permissions in the GNU General Public License, the +Free Software Foundation gives you unlimited permission to link the +compiled version of this file with other programs, and to distribute +those programs without any restriction coming from the use of this +file. (The General Public License restrictions do apply in other +respects; for example, they cover modification of the file, and +distribution when not linked into another program.) + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ + +/* This file implements the md_fallback_frame_state_for routine for + Windows, triggered when the GCC table based unwinding process hits a + frame for which no unwind info has been registered. This typically + occurs when raising an exception from a signal handler, because the + handler is actually called from the OS kernel. + + The basic idea is to detect that we are indeed trying to unwind past a + signal handler and to fill out the GCC internal unwinding structures for + the OS kernel frame as if it had been directly called from the + interrupted context. + + This is all assuming that the code to set the handler asked the kernel + to pass a pointer to such context information. + + There is three main parts. + + 1) The first thing to do is to check if we are in a signal context. If + not we can just return as there is nothing to do. We are probably on + some foreign code for which no unwind frame can be found. If this is + a call from the Windows signal handler, then: + + 2) We must get the signal context information. + + * With the standard exception filter: + + This is on Windows pointed to by an EXCEPTION_POINTERS. We know that + the signal handle will call an UnhandledExceptionFilter with this + parameter. The spec for this routine is: + + LONG WINAPI UnhandledExceptionFilter(struct _EXCEPTION_POINTERS*); + + So the pointer to struct _EXCEPTION_POINTERS must be somewhere on the + stack. + + This was found experimentally to always be at offset 0 of the context + frame in all cases handled by this implementation. + + * With the SEH exception handler: + + In this case the signal context is directly on the stack as the SEH + exception handler has the following prototype: + + DWORD + SEH_error_handler (PEXCEPTION_RECORD ExceptionRecord, + PVOID EstablisherFrame, + PCONTEXT ContextRecord, + PVOID DispatcherContext) + + This was found experimentally to always be at offset 56 of the + context frame in all cases handled by this implementation. + + 3) When we have the signal context we just have to save some registers + and set the return address based on the program counter (Eip). + + Note that this implementation follows closely the same principles as the + GNU/Linux and OSF ones. */ + +#define WIN32_MEAN_AND_LEAN +#include +/* Patterns found experimentally to be on a Windows signal handler */ + +/* In a standard exception filter */ + +#define SIG_PAT1 \ + (pc_[-2] == 0xff && pc_[-1] == 0xd0 /* call %eax */ \ + && pc_[0] == 0x83 && pc_[1] == 0xf8) /* cmp 0xdepl,%eax */ + +#define SIG_PAT2 \ + (pc_[-5] == 0xe8 && pc_[-4] == 0x68 /* call (depl16) */ \ + && pc_[0] == 0xc3) /* ret */ + +/* In a Win32 SEH handler */ + +#define SIG_SEH1 \ + (pc_[-5] == 0xe8 /* call addr */ \ + && pc_[0] == 0x83 && pc_[1] == 0xc4 /* add 0xval,%esp */ \ + && pc_[3] == 0xb8) /* mov 0xval,%eax */ + +#define SIG_SEH2 \ + (pc_[-5] == 0x8b && pc_[-4] == 0x4d /* mov depl(%ebp),%ecx */ \ + && pc_[0] == 0x64 && pc_[1] == 0x8b) /* mov %fs:(0), */ \ + +/* In the GCC alloca (stack probing) */ + +#define SIG_ALLOCA \ + (pc_[-1] == 0x83 /* orl $0x0,(%ecx) */ \ + && pc_[0] == 0x9 && pc_[1] == 0 \ + && pc_[2] == 0x2d && pc_[3] == 0 /* subl $0x1000,%eax */ \ + && pc_[4] == 0x10 && pc_[5] == 0) + + +#define MD_FALLBACK_FRAME_STATE_FOR i386_w32_fallback_frame_state + +static _Unwind_Reason_Code +i386_w32_fallback_frame_state (struct _Unwind_Context *context, + _Unwind_FrameState *fs) + +{ + void * ctx_ra_ = (void *)(context->ra); /* return address */ + void * ctx_cfa_ = (void *)(context->cfa); /* context frame address */ + unsigned char * pc_ = (unsigned char *) ctx_ra_; + + /* In the test below we look for two specific patterns found + experimentally to be in the Windows signal handler. */ + + if (SIG_PAT1 || SIG_PAT2 || SIG_SEH1 || SIG_SEH2) + { + PEXCEPTION_POINTERS weinfo_; + PCONTEXT proc_ctx_; + long new_cfa_; + + if (SIG_SEH1) + proc_ctx_ = (PCONTEXT) (*(int*)(ctx_cfa_ + 56)); + else if (SIG_SEH2) + proc_ctx_ = (PCONTEXT) (*(int*)(ctx_cfa_ + 8)); + else + { + weinfo_ = (PEXCEPTION_POINTERS) (*(int*)ctx_cfa_); + proc_ctx_ = weinfo_->ContextRecord; + } + + /* The new context frame address is the stack pointer. */ + + new_cfa_ = proc_ctx_->Esp; + /* LLVM LOCAL begin */ + /* Note, that this file was backported from mainline, but fs struct has + slightly different layout there. Thus adjusted. */ + fs->cfa_how = CFA_REG_OFFSET; + fs->cfa_reg = __builtin_dwarf_sp_column(); + fs->cfa_offset = new_cfa_ - (long) ctx_cfa_; + /* LLVM LOCAL end */ + + /* Save some registers. */ + + fs->regs.reg[0].how = REG_SAVED_OFFSET; + fs->regs.reg[0].loc.offset = (long)&proc_ctx_->Eax - new_cfa_; + fs->regs.reg[3].how = REG_SAVED_OFFSET; + fs->regs.reg[3].loc.offset = (long)&proc_ctx_->Ebx - new_cfa_; + fs->regs.reg[1].how = REG_SAVED_OFFSET; + fs->regs.reg[1].loc.offset = (long)&proc_ctx_->Ecx - new_cfa_; + fs->regs.reg[2].how = REG_SAVED_OFFSET; + fs->regs.reg[2].loc.offset = (long)&proc_ctx_->Edx - new_cfa_; + fs->regs.reg[6].how = REG_SAVED_OFFSET; + fs->regs.reg[6].loc.offset = (long)&proc_ctx_->Esi - new_cfa_; + fs->regs.reg[7].how = REG_SAVED_OFFSET; + fs->regs.reg[7].loc.offset = (long)&proc_ctx_->Edi - new_cfa_; + fs->regs.reg[9].how = REG_SAVED_OFFSET; + fs->regs.reg[9].loc.offset = (long)&proc_ctx_->Eip - new_cfa_; + fs->regs.reg[4].how = REG_SAVED_OFFSET; + fs->regs.reg[4].loc.offset = (long)&proc_ctx_->Ebp - new_cfa_; + + /* Set the return address to Eip + 1. As we can be called multiple + times we use another register for this. */ + + proc_ctx_->Dr0 = proc_ctx_->Eip + 1; + fs->regs.reg[8].how = REG_SAVED_OFFSET; + fs->regs.reg[8].loc.offset = (long)&proc_ctx_->Dr0 - new_cfa_; + fs->retaddr_column = 8; + return _URC_NO_REASON; + } + + /* Unwinding through _alloca, propagating from a trap triggered by + one of it's probes prior to the real SP adjustment. The only + operations of interest performed is "pushl %ecx", followed by + ecx clobbering. */ + + else if (SIG_ALLOCA) + { + /* Only one push between entry in _alloca and the probe trap. */ + long new_cfa_ = (long) ctx_cfa_ + 4; + + /* LLVM LOCAL begin */ + /* Note, that this file was backported from mainline, but fs struct has + slightly different layout there. Thus adjusted. */ + fs->cfa_how = CFA_REG_OFFSET; + fs->cfa_reg = __builtin_dwarf_sp_column(); + fs->cfa_offset = new_cfa_ - (long) ctx_cfa_; + /* LLVM LOCAL end */ + + /* The saved value of %ecx is at CFA - 4 */ + fs->regs.reg[1].how = REG_SAVED_OFFSET; + fs->regs.reg[1].loc.offset = -4; + + /* and what is stored at the CFA is the return address. */ + fs->retaddr_column = 8; + fs->regs.reg[8].how = REG_SAVED_OFFSET; + fs->regs.reg[8].loc.offset = 0; + + return _URC_NO_REASON; + } + else + return _URC_END_OF_STACK; +} From gohman at apple.com Wed Feb 27 13:44:58 2008 From: gohman at apple.com (Dan Gohman) Date: Wed, 27 Feb 2008 19:44:58 -0000 Subject: [llvm-commits] [llvm] r47686 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200802271944.m1RJiw6d001571@zion.cs.uiuc.edu> Author: djg Date: Wed Feb 27 13:44:57 2008 New Revision: 47686 URL: http://llvm.org/viewvc/llvm-project?rev=47686&view=rev Log: Remove the `else', at Evan's insistence. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47686&r1=47685&r2=47686&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Feb 27 13:44:57 2008 @@ -5746,8 +5746,7 @@ ExpandOp(Node->getOperand(0), Lo, Hi); if (cast(Node->getOperand(1))->getValue()) return ExpandOp(Hi, Lo, Hi); - else - return ExpandOp(Lo, Lo, Hi); + return ExpandOp(Lo, Lo, Hi); case ISD::EXTRACT_VECTOR_ELT: assert(VT==MVT::i64 && "Do not know how to expand this operator!"); // ExpandEXTRACT_VECTOR_ELT tolerates invalid result types. From evan.cheng at apple.com Wed Feb 27 13:57:11 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 27 Feb 2008 19:57:11 -0000 Subject: [llvm-commits] [llvm] r47687 - in /llvm/trunk: include/llvm/CodeGen/MachineFrameInfo.h lib/CodeGen/VirtRegMap.cpp test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll Message-ID: <200802271957.m1RJvBnM002123@zion.cs.uiuc.edu> Author: evancheng Date: Wed Feb 27 13:57:11 2008 New Revision: 47687 URL: http://llvm.org/viewvc/llvm-project?rev=47687&view=rev Log: Fix a bug in dead spill slot elimination. Added: llvm/trunk/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h llvm/trunk/lib/CodeGen/VirtRegMap.cpp Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=47687&r1=47686&r2=47687&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Wed Feb 27 13:57:11 2008 @@ -216,6 +216,8 @@ int64_t getObjectOffset(int ObjectIdx) const { assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() && "Invalid Object Idx!"); + assert(!isDeadObjectIndex(ObjectIdx) && + "Getting frame offset for a dead object?"); return Objects[ObjectIdx+NumFixedObjects].SPOffset; } @@ -225,6 +227,8 @@ void setObjectOffset(int ObjectIdx, int64_t SPOffset) { assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() && "Invalid Object Idx!"); + assert(!isDeadObjectIndex(ObjectIdx) && + "Setting frame offset for a dead object?"); Objects[ObjectIdx+NumFixedObjects].SPOffset = SPOffset; } Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=47687&r1=47686&r2=47687&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Wed Feb 27 13:57:11 2008 @@ -914,6 +914,7 @@ Ops.push_back(Idx); MachineInstr *FoldedMI = TII->foldMemoryOperand(MF, NewMI, Ops, SS); if (FoldedMI) { + VRM.addSpillSlotUse(SS, FoldedMI); if (!VRM.hasPhys(UnfoldVR)) VRM.assignVirt2Phys(UnfoldVR, UnfoldPR); VRM.virtFolded(VirtReg, FoldedMI, VirtRegMap::isRef); @@ -1414,6 +1415,7 @@ MBB.insert(MII, NewMIs[0]); NewStore = NewMIs[1]; MBB.insert(MII, NewStore); + VRM.addSpillSlotUse(SS, NewStore); VRM.RemoveMachineInstrFromMaps(&MI); MBB.erase(&MI); Erased = true; Added: llvm/trunk/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll?rev=47687&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll (added) +++ llvm/trunk/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll Wed Feb 27 13:57:11 2008 @@ -0,0 +1,66 @@ +; RUN: llvm-as < %s | llc -march=x86 + + %struct.CompAtom = type <{ %struct.Position, float, i32 }> + %struct.Lattice = type { %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, i32, i32, i32 } + %struct.Position = type { double, double, double } + +define fastcc %struct.CompAtom* @_ZNK7Lattice6createEP8CompAtomii(%struct.Lattice* %this, %struct.CompAtom* %d, i32 %n, i32 %i) { +entry: + %tmp18 = tail call i8* @_Znam( i32 0 ) ; [#uses=1] + %tmp1819 = bitcast i8* %tmp18 to %struct.CompAtom* ; <%struct.CompAtom*> [#uses=4] + %tmp3286 = icmp eq i32 %n, 0 ; [#uses=1] + br i1 %tmp3286, label %bb35, label %bb24 + +bb24: ; preds = %bb24, %entry + %tmp9.0.reg2mem.0.rec = phi i32 [ %indvar.next, %bb24 ], [ 0, %entry ] ; [#uses=3] + %tmp3.i.i = getelementptr %struct.CompAtom* %tmp1819, i32 %tmp9.0.reg2mem.0.rec, i32 0, i32 1 ; [#uses=0] + %tmp5.i.i = getelementptr %struct.CompAtom* %tmp1819, i32 %tmp9.0.reg2mem.0.rec, i32 0, i32 2 ; [#uses=1] + store double -9.999900e+04, double* %tmp5.i.i, align 4 + %indvar.next = add i32 %tmp9.0.reg2mem.0.rec, 1 ; [#uses=2] + %exitcond = icmp eq i32 %indvar.next, %n ; [#uses=1] + br i1 %exitcond, label %bb35, label %bb24 + +bb35: ; preds = %bb24, %entry + %tmp42 = sdiv i32 %i, 9 ; [#uses=1] + %tmp43 = add i32 %tmp42, -1 ; [#uses=1] + %tmp4344 = sitofp i32 %tmp43 to double ; [#uses=1] + %tmp17.i76 = mul double %tmp4344, 0.000000e+00 ; [#uses=1] + %tmp48 = sdiv i32 %i, 3 ; [#uses=1] + %tmp49 = srem i32 %tmp48, 3 ; [#uses=1] + %tmp50 = add i32 %tmp49, -1 ; [#uses=1] + %tmp5051 = sitofp i32 %tmp50 to double ; [#uses=1] + %tmp17.i63 = mul double %tmp5051, 0.000000e+00 ; [#uses=1] + %tmp55 = srem i32 %i, 3 ; [#uses=1] + %tmp56 = add i32 %tmp55, -1 ; [#uses=1] + %tmp5657 = sitofp i32 %tmp56 to double ; [#uses=1] + %tmp15.i49 = getelementptr %struct.Lattice* %this, i32 0, i32 0, i32 0 ; [#uses=1] + %tmp16.i50 = load double* %tmp15.i49, align 4 ; [#uses=1] + %tmp17.i = mul double %tmp5657, %tmp16.i50 ; [#uses=1] + %tmp20.i39 = add double %tmp17.i, %tmp17.i63 ; [#uses=1] + %tmp20.i23 = add double %tmp20.i39, %tmp17.i76 ; [#uses=1] + br i1 false, label %bb58.preheader, label %bb81 + +bb58.preheader: ; preds = %bb35 + %smax = select i1 false, i32 1, i32 %n ; [#uses=1] + br label %bb58 + +bb58: ; preds = %bb58, %bb58.preheader + %tmp20.i7 = getelementptr %struct.CompAtom* %d, i32 0, i32 2 ; [#uses=2] + %tmp25.i = getelementptr %struct.CompAtom* %tmp1819, i32 0, i32 2 ; [#uses=2] + %tmp74.i = load i32* %tmp20.i7, align 1 ; [#uses=1] + %tmp82.i = and i32 %tmp74.i, 134217728 ; [#uses=1] + %tmp85.i = or i32 0, %tmp82.i ; [#uses=1] + store i32 %tmp85.i, i32* %tmp25.i, align 1 + %tmp88.i = load i32* %tmp20.i7, align 1 ; [#uses=1] + %tmp95.i = and i32 %tmp88.i, -268435456 ; [#uses=1] + %tmp97.i = or i32 0, %tmp95.i ; [#uses=1] + store i32 %tmp97.i, i32* %tmp25.i, align 1 + %tmp6.i = add double 0.000000e+00, %tmp20.i23 ; [#uses=0] + %exitcond96 = icmp eq i32 0, %smax ; [#uses=1] + br i1 %exitcond96, label %bb81, label %bb58 + +bb81: ; preds = %bb58, %bb35 + ret %struct.CompAtom* %tmp1819 +} + +declare i8* @_Znam(i32) From evan.cheng at apple.com Wed Feb 27 14:26:32 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 27 Feb 2008 20:26:32 -0000 Subject: [llvm-commits] [llvm] r47688 - /llvm/trunk/lib/Target/X86/README.txt Message-ID: <200802272026.m1RKQWUB003069@zion.cs.uiuc.edu> Author: evancheng Date: Wed Feb 27 14:26:32 2008 New Revision: 47688 URL: http://llvm.org/viewvc/llvm-project?rev=47688&view=rev Log: This is done. Modified: llvm/trunk/lib/Target/X86/README.txt Modified: llvm/trunk/lib/Target/X86/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=47688&r1=47687&r2=47688&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README.txt (original) +++ llvm/trunk/lib/Target/X86/README.txt Wed Feb 27 14:26:32 2008 @@ -1554,30 +1554,6 @@ //===---------------------------------------------------------------------===// Consider: - -#include -uint64_t a; -uint16_t b; -uint64_t mul(void) { - return a * b; -} - -Currently, we generate the following: - -mul: - movzwl b, %ecx - movl %ecx, %eax - mull a - imull a+4, %ecx - addl %edx, %ecx - movl %ecx, %edx - ret - -llvm should be able to commute the addl so that the movl isn't necessary. - -//===---------------------------------------------------------------------===// - -Consider: int test(unsigned long a, unsigned long b) { return -(a < b); } We currently compile this to: From evan.cheng at apple.com Wed Feb 27 14:34:14 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 27 Feb 2008 12:34:14 -0800 Subject: [llvm-commits] [llvm] r47686 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp In-Reply-To: <200802271944.m1RJiw6d001571@zion.cs.uiuc.edu> References: <200802271944.m1RJiw6d001571@zion.cs.uiuc.edu> Message-ID: Hehe. Thanks Dan! Evan On Feb 27, 2008, at 11:44 AM, Dan Gohman wrote: > Author: djg > Date: Wed Feb 27 13:44:57 2008 > New Revision: 47686 > > URL: http://llvm.org/viewvc/llvm-project?rev=47686&view=rev > Log: > Remove the `else', at Evan's insistence. > > Modified: > llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47686&r1=47685&r2=47686&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Feb 27 > 13:44:57 2008 > @@ -5746,8 +5746,7 @@ > ExpandOp(Node->getOperand(0), Lo, Hi); > if (cast(Node->getOperand(1))->getValue()) > return ExpandOp(Hi, Lo, Hi); > - else > - return ExpandOp(Lo, Lo, Hi); > + return ExpandOp(Lo, Lo, Hi); > case ISD::EXTRACT_VECTOR_ELT: > assert(VT==MVT::i64 && "Do not know how to expand this > operator!"); > // ExpandEXTRACT_VECTOR_ELT tolerates invalid result types. > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Wed Feb 27 14:42:00 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 27 Feb 2008 12:42:00 -0800 Subject: [llvm-commits] [llvm] r47672 - in /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeTypes.cpp LegalizeTypes.h LegalizeTypesExpand.cpp LegalizeTypesPromote.cpp LegalizeTypesScalarize.cpp LegalizeTypesSplit.cpp In-Reply-To: <200802271334.m1RDYfPs023313@zion.cs.uiuc.edu> References: <200802271334.m1RDYfPs023313@zion.cs.uiuc.edu> Message-ID: <127ECC90-C4E1-4679-B557-0388F8100A34@apple.com> Very nice! Thanks. Evan On Feb 27, 2008, at 5:34 AM, Duncan Sands wrote: > Author: baldrick > Date: Wed Feb 27 07:34:40 2008 > New Revision: 47672 > > URL: http://llvm.org/viewvc/llvm-project?rev=47672&view=rev > Log: > LegalizeTypes support for EXTRACT_VECTOR_ELT. The > approach taken is different to that in LegalizeDAG > when it is a question of expanding or promoting the > result type: for example, if extracting an i64 from > a <2 x i64>, when i64 needs expanding, it bitcasts > the vector to <4 x i32>, extracts the appropriate > two i32's, and uses those for the Lo and Hi parts. > Likewise, when extracting an i16 from a <4 x i16>, > and i16 needs promoting, it bitcasts the vector to > <2 x i32>, extracts the appropriate i32, twiddles > the bits if necessary, and uses that as the promoted > value. This puts more pressure on bitcast legalization, > and I've added the appropriate cases. They needed to > be added anyway since users can generate such bitcasts > too if they want to. Also, when considering various > cases (Legal, Promote, Expand, Scalarize, Split) it is > a pain that expand can correspond to Expand, Scalarize > or Split, so I've changed the LegalizeTypes enum so it > lists those different cases - now Expand only means > splitting a scalar in two. > The code produced is the same as by LegalizeDAG for > all relevant testcases, except for > 2007-10-31-extractelement-i64.ll, where the code seems > to have improved (see below; can an expert please tell > me if it is better or not). > Before < vs after >. > > < subl $92, %esp > < movaps %xmm0, 64(%esp) > < movaps %xmm0, (%esp) > < movl 4(%esp), %eax > < movl %eax, 28(%esp) > < movl (%esp), %eax > < movl %eax, 24(%esp) > < movq 24(%esp), %mm0 > < movq %mm0, 56(%esp) > --- >> subl $44, %esp >> movaps %xmm0, 16(%esp) >> pshufd $1, %xmm0, %xmm1 >> movd %xmm1, 4(%esp) >> movd %xmm0, (%esp) >> movq (%esp), %mm0 >> movq %mm0, 8(%esp) > > < subl $92, %esp > < movaps %xmm0, 64(%esp) > < movaps %xmm0, (%esp) > < movl 12(%esp), %eax > < movl %eax, 28(%esp) > < movl 8(%esp), %eax > < movl %eax, 24(%esp) > < movq 24(%esp), %mm0 > < movq %mm0, 56(%esp) > --- >> subl $44, %esp >> movaps %xmm0, 16(%esp) >> pshufd $3, %xmm0, %xmm1 >> movd %xmm1, 4(%esp) >> movhlps %xmm0, %xmm0 >> movd %xmm0, (%esp) >> movq (%esp), %mm0 >> movq %mm0, 8(%esp) > > < subl $92, %esp > < movaps %xmm0, 64(%esp) > --- >> subl $44, %esp > > < movl 16(%esp), %eax > < movl %eax, 48(%esp) > < movl 20(%esp), %eax > < movl %eax, 52(%esp) > < movaps %xmm0, (%esp) > < movl 4(%esp), %eax > < movl %eax, 60(%esp) > < movl (%esp), %eax > < movl %eax, 56(%esp) > --- >> pshufd $1, %xmm0, %xmm1 >> movd %xmm1, 4(%esp) >> movd %xmm0, (%esp) >> movd %xmm1, 12(%esp) >> movd %xmm0, 8(%esp) > > < subl $92, %esp > < movaps %xmm0, 64(%esp) > --- >> subl $44, %esp > > < movl 24(%esp), %eax > < movl %eax, 48(%esp) > < movl 28(%esp), %eax > < movl %eax, 52(%esp) > < movaps %xmm0, (%esp) > < movl 12(%esp), %eax > < movl %eax, 60(%esp) > < movl 8(%esp), %eax > < movl %eax, 56(%esp) > --- >> pshufd $3, %xmm0, %xmm1 >> movd %xmm1, 4(%esp) >> movhlps %xmm0, %xmm0 >> movd %xmm0, (%esp) >> movd %xmm1, 12(%esp) >> movd %xmm0, 8(%esp) > > Modified: > llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp > llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h > llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp > llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp > llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp > llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=47672&r1=47671&r2=47672&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Wed Feb 27 > 07:34:40 2008 > @@ -68,25 +68,26 @@ > unsigned NumResults = N->getNumValues(); > do { > MVT::ValueType ResultVT = N->getValueType(i); > - LegalizeAction Action = getTypeAction(ResultVT); > - if (Action == Promote) { > + switch (getTypeAction(ResultVT)) { > + default: > + assert(false && "Unknown action!"); > + case Legal: > + break; > + case Promote: > PromoteResult(N, i); > goto NodeDone; > - } else if (Action == Expand) { > - // Expand can mean 1) split integer in half 2) scalarize > single-element > - // vector 3) split vector in half. > - if (!MVT::isVector(ResultVT)) > - ExpandResult(N, i); > - else if (MVT::getVectorNumElements(ResultVT) == 1) > - ScalarizeResult(N, i); // Scalarize the single- > element vector. > - else > - SplitResult(N, i); // Split the vector in half. > + case Expand: > + ExpandResult(N, i); > + goto NodeDone; > + case Scalarize: > + ScalarizeResult(N, i); > + goto NodeDone; > + case Split: > + SplitResult(N, i); > goto NodeDone; > - } else { > - assert(Action == Legal && "Unknown action!"); > } > } while (++i < NumResults); > - > + > // Scan the operand list for the node, handling any nodes with > operands that > // are illegal. > { > @@ -94,25 +95,25 @@ > bool NeedsRevisit = false; > for (i = 0; i != NumOperands; ++i) { > MVT::ValueType OpVT = N->getOperand(i).getValueType(); > - LegalizeAction Action = getTypeAction(OpVT); > - if (Action == Promote) { > + switch (getTypeAction(OpVT)) { > + default: > + assert(false && "Unknown action!"); > + case Legal: > + continue; > + case Promote: > NeedsRevisit = PromoteOperand(N, i); > break; > - } else if (Action == Expand) { > - // Expand can mean 1) split integer in half 2) scalarize > single-element > - // vector 3) split vector in half. > - if (!MVT::isVector(OpVT)) { > - NeedsRevisit = ExpandOperand(N, i); > - } else if (MVT::getVectorNumElements(OpVT) == 1) { > - // Scalarize the single-element vector. > - NeedsRevisit = ScalarizeOperand(N, i); > - } else { > - NeedsRevisit = SplitOperand(N, i); // Split the vector in > half. > - } > + case Expand: > + NeedsRevisit = ExpandOperand(N, i); > + break; > + case Scalarize: > + NeedsRevisit = ScalarizeOperand(N, i); > + break; > + case Split: > + NeedsRevisit = SplitOperand(N, i); > break; > - } else { > - assert(Action == Legal && "Unknown action!"); > } > + break; > } > > // If the node needs revisiting, don't add all users to the > worklist etc. > @@ -432,7 +433,7 @@ > case Legal: break; > case Promote: Op2 = GetPromotedOp(Op2); break; > } > - > + > // The length could have any action required. > SDOperand Length = N->getOperand(3); > switch (getTypeAction(Length.getValueType())) { > @@ -444,21 +445,21 @@ > GetExpandedOp(Length, Length, Dummy); > break; > } > - > + > SDOperand Align = N->getOperand(4); > switch (getTypeAction(Align.getValueType())) { > default: assert(0 && "Unknown action for memop operand"); > case Legal: break; > case Promote: Align = GetPromotedZExtOp(Align); break; > } > - > + > SDOperand AlwaysInline = N->getOperand(5); > switch (getTypeAction(AlwaysInline.getValueType())) { > default: assert(0 && "Unknown action for memop operand"); > case Legal: break; > case Promote: AlwaysInline = GetPromotedZExtOp(AlwaysInline); break; > } > - > + > SDOperand Ops[] = { Chain, Ptr, Op2, Length, Align, AlwaysInline }; > return DAG.UpdateNodeOperands(SDOperand(N, 0), Ops, 6); > } > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=47672&r1=47671&r2=47672&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Wed Feb 27 > 07:34:40 2008 > @@ -61,27 +61,46 @@ > enum LegalizeAction { > Legal, // The target natively supports this type. > Promote, // This type should be executed in a larger type. > - Expand // This type should be split into two types of half > the size. > + Expand, // This type should be split into two types of half > the size. > + Scalarize, // Replace this one-element vector type with its > element type. > + Split // This vector type should be split into smaller > vectors. > }; > - > + > /// ValueTypeActions - This is a bitvector that contains two bits > for each > /// simple value type, where the two bits correspond to the > LegalizeAction > - /// enum. This can be queried with "getTypeAction(VT)". > + /// enum from TargetLowering. This can be queried with > "getTypeAction(VT)". > TargetLowering::ValueTypeActionImpl ValueTypeActions; > > /// getTypeAction - Return how we should legalize values of this > type, either > - /// it is already legal or we need to expand it into multiple > registers of > - /// smaller integer type, or we need to promote it to a larger > type. > + /// it is already legal, or we need to promote it to a larger > integer type, or > + /// we need to expand it into multiple registers of a smaller > integer type, or > + /// we need to scalarize a one-element vector type into the > element type, or > + /// we need to split a vector type into smaller vector types. > LegalizeAction getTypeAction(MVT::ValueType VT) const { > - return (LegalizeAction)ValueTypeActions.getTypeAction(VT); > + switch (ValueTypeActions.getTypeAction(VT)) { > + default: > + assert(false && "Unknown legalize action!"); > + case TargetLowering::Legal: > + return Legal; > + case TargetLowering::Promote: > + return Promote; > + case TargetLowering::Expand: > + // Expand can mean 1) split integer in half 2) scalarize > single-element > + // vector 3) split vector in two. > + if (!MVT::isVector(VT)) > + return Expand; > + else if (MVT::getVectorNumElements(VT) == 1) > + return Scalarize; > + else > + return Split; > + } > } > - > + > /// isTypeLegal - Return true if this type is legal on this target. > - /// > bool isTypeLegal(MVT::ValueType VT) const { > - return getTypeAction(VT) == Legal; > + return ValueTypeActions.getTypeAction(VT) == > TargetLowering::Legal; > } > - > + > /// PromotedNodes - For nodes that are below legal width, this map > indicates > /// what promoted value to use. > DenseMap PromotedNodes; > @@ -159,11 +178,13 @@ > > // Result Promotion. > void PromoteResult(SDNode *N, unsigned ResNo); > + SDOperand PromoteResult_BIT_CONVERT(SDNode *N); > SDOperand PromoteResult_BUILD_PAIR(SDNode *N); > SDOperand PromoteResult_Constant(SDNode *N); > SDOperand PromoteResult_CTLZ(SDNode *N); > SDOperand PromoteResult_CTPOP(SDNode *N); > SDOperand PromoteResult_CTTZ(SDNode *N); > + SDOperand PromoteResult_EXTRACT_VECTOR_ELT(SDNode *N); > SDOperand PromoteResult_FP_ROUND(SDNode *N); > SDOperand PromoteResult_FP_TO_XINT(SDNode *N); > SDOperand PromoteResult_INT_EXTEND(SDNode *N); > @@ -219,6 +240,7 @@ > void ExpandResult_CTLZ (SDNode *N, SDOperand &Lo, SDOperand > &Hi); > void ExpandResult_CTPOP (SDNode *N, SDOperand &Lo, SDOperand > &Hi); > void ExpandResult_CTTZ (SDNode *N, SDOperand &Lo, SDOperand > &Hi); > + void ExpandResult_EXTRACT_VECTOR_ELT(SDNode *N, SDOperand &Lo, > SDOperand &Hi); > void ExpandResult_LOAD (LoadSDNode *N, SDOperand &Lo, > SDOperand &Hi); > void ExpandResult_MERGE_VALUES(SDNode *N, SDOperand &Lo, SDOperand > &Hi); > void ExpandResult_SIGN_EXTEND(SDNode *N, SDOperand &Lo, SDOperand > &Hi); > @@ -283,6 +305,7 @@ > > // Operand Vector Scalarization: <1 x ty> -> ty. > bool ScalarizeOperand(SDNode *N, unsigned OpNo); > + SDOperand ScalarizeOp_BIT_CONVERT(SDNode *N); > SDOperand ScalarizeOp_EXTRACT_VECTOR_ELT(SDNode *N); > SDOperand ScalarizeOp_STORE(StoreSDNode *N, unsigned OpNo); > > @@ -313,7 +336,9 @@ > // Operand Vector Scalarization: <128 x ty> -> 2 x <64 x ty>. > bool SplitOperand(SDNode *N, unsigned OpNo); > > + SDOperand SplitOp_BIT_CONVERT(SDNode *N); > SDOperand SplitOp_EXTRACT_SUBVECTOR(SDNode *N); > + SDOperand SplitOp_EXTRACT_VECTOR_ELT(SDNode *N); > SDOperand SplitOp_RET(SDNode *N, unsigned OpNo); > SDOperand SplitOp_STORE(StoreSDNode *N, unsigned OpNo); > SDOperand SplitOp_VECTOR_SHUFFLE(SDNode *N, unsigned OpNo); > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp?rev=47672&r1=47671&r2=47672&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp > (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp Wed > Feb 27 07:34:40 2008 > @@ -86,6 +86,10 @@ > case ISD::CTLZ: ExpandResult_CTLZ(N, Lo, Hi); break; > case ISD::CTPOP: ExpandResult_CTPOP(N, Lo, Hi); break; > case ISD::CTTZ: ExpandResult_CTTZ(N, Lo, Hi); break; > + > + case ISD::EXTRACT_VECTOR_ELT: > + ExpandResult_EXTRACT_VECTOR_ELT(N, Lo, Hi); > + break; > } > > // If Lo/Hi is null, the sub-method took care of registering > results etc. > @@ -147,7 +151,7 @@ > // For example, extension of an i48 to an i64. The operand type > necessarily > // promotes to the result type, so will end up being expanded too. > assert(getTypeAction(Op.getValueType()) == Promote && > - "Don't know how to expand this result!"); > + "Only know how to promote this result!"); > SDOperand Res = GetPromotedOp(Op); > assert(Res.getValueType() == N->getValueType(0) && > "Operand over promoted?"); > @@ -168,7 +172,7 @@ > // For example, extension of an i48 to an i64. The operand type > necessarily > // promotes to the result type, so will end up being expanded too. > assert(getTypeAction(Op.getValueType()) == Promote && > - "Don't know how to expand this result!"); > + "Only know how to promote this result!"); > SDOperand Res = GetPromotedOp(Op); > assert(Res.getValueType() == N->getValueType(0) && > "Operand over promoted?"); > @@ -195,7 +199,7 @@ > // For example, extension of an i48 to an i64. The operand type > necessarily > // promotes to the result type, so will end up being expanded too. > assert(getTypeAction(Op.getValueType()) == Promote && > - "Don't know how to expand this result!"); > + "Only know how to promote this result!"); > SDOperand Res = GetPromotedOp(Op); > assert(Res.getValueType() == N->getValueType(0) && > "Operand over promoted?"); > @@ -239,6 +243,8 @@ > void DAGTypeLegalizer::ExpandResult_BIT_CONVERT(SDNode *N, > SDOperand &Lo, > SDOperand &Hi) { > // Lower the bit-convert to a store/load from the stack, then > expand the load. > + // TODO: If the operand also needs expansion then this could be > turned into > + // conversion of the expanded pieces. But there needs to be a > testcase first! > SDOperand Op = CreateStackStoreLoad(N->getOperand(0), N- > >getValueType(0)); > ExpandResult_LOAD(cast(Op.Val), Lo, Hi); > } > @@ -666,6 +672,41 @@ > Hi = DAG.getConstant(0, NVT); > } > > +void DAGTypeLegalizer::ExpandResult_EXTRACT_VECTOR_ELT(SDNode *N, > + SDOperand &Lo, > + SDOperand > &Hi) { > + SDOperand OldVec = N->getOperand(0); > + unsigned OldElts = > MVT::getVectorNumElements(OldVec.getValueType()); > + > + // Convert to a vector of the expanded element type, for example > + // <2 x i64> -> <4 x i32>. > + MVT::ValueType OldVT = N->getValueType(0); > + MVT::ValueType NewVT = TLI.getTypeToTransformTo(OldVT); > + assert(MVT::getSizeInBits(OldVT) == 2 * MVT::getSizeInBits(NewVT) > && > + "Do not know how to handle this expansion!"); > + > + SDOperand NewVec = DAG.getNode(ISD::BIT_CONVERT, > + MVT::getVectorType(NewVT, 2 * > OldElts), > + OldVec); > + > + // Extract the elements at 2 * Idx and 2 * Idx + 1 from the new > vector. > + SDOperand Idx = N->getOperand(1); > + > + // Make sure the type of Idx is big enough to hold the new values. > + if (MVT::getSizeInBits(Idx.getValueType()) < 32) > + Idx = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Idx); > + > + Idx = DAG.getNode(ISD::ADD, Idx.getValueType(), Idx, Idx); > + Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, NewVT, NewVec, Idx); > + > + Idx = DAG.getNode(ISD::ADD, Idx.getValueType(), Idx, > + DAG.getConstant(1, Idx.getValueType())); > + Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, NewVT, NewVec, Idx); > + > + if (TLI.isBigEndian()) > + std::swap(Lo, Hi); > +} > + > /// ExpandShiftByConstant - N is a shift by a value that needs to be > expanded, > /// and the shift amount is a constant 'Amt'. Expand the operation. > void DAGTypeLegalizer::ExpandShiftByConstant(SDNode *N, unsigned Amt, > @@ -898,6 +939,28 @@ > } > > SDOperand DAGTypeLegalizer::ExpandOperand_BIT_CONVERT(SDNode *N) { > + if (MVT::isVector(N->getValueType(0))) { > + // An illegal integer type is being converted to a legal vector > type. > + // Make a two element vector out of the expanded parts and > convert that > + // instead, but only if the new vector type is legal (otherwise > there > + // is no point, and it might create expansion loops). For > example, on > + // x86 this turns v1i64 = BIT_CONVERT i64 into v1i64 = > BIT_CONVERT v2i32. > + MVT::ValueType OVT = N->getOperand(0).getValueType(); > + MVT::ValueType NVT = > MVT::getVectorType(TLI.getTypeToTransformTo(OVT), 2); > + > + if (isTypeLegal(NVT)) { > + SDOperand Parts[2]; > + GetExpandedOp(N->getOperand(0), Parts[0], Parts[1]); > + > + if (TLI.isBigEndian()) > + std::swap(Parts[0], Parts[1]); > + > + SDOperand Vec = DAG.getNode(ISD::BUILD_VECTOR, NVT, Parts, 2); > + return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0), Vec); > + } > + } > + > + // Otherwise, store to a temporary and load out again as the new > type. > return CreateStackStoreLoad(N->getOperand(0), N->getValueType(0)); > } > > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp?rev=47672&r1=47671&r2=47672&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp > (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesPromote.cpp Wed > Feb 27 07:34:40 2008 > @@ -50,6 +50,7 @@ > case ISD::SETCC: Result = PromoteResult_SETCC(N); break; > case ISD::LOAD: Result = > PromoteResult_LOAD(cast(N)); break; > case ISD::BUILD_PAIR: Result = PromoteResult_BUILD_PAIR(N); break; > + case ISD::BIT_CONVERT: Result = PromoteResult_BIT_CONVERT(N); > break; > > case ISD::AND: > case ISD::OR: > @@ -74,8 +75,12 @@ > case ISD::CTLZ: Result = PromoteResult_CTLZ(N); break; > case ISD::CTPOP: Result = PromoteResult_CTPOP(N); break; > case ISD::CTTZ: Result = PromoteResult_CTTZ(N); break; > + > + case ISD::EXTRACT_VECTOR_ELT: > + Result = PromoteResult_EXTRACT_VECTOR_ELT(N); > + break; > } > - > + > // If Result is null, the sub-method took care of registering the > result. > if (Result.Val) > SetPromotedOp(SDOperand(N, ResNo), Result); > @@ -214,6 +219,65 @@ > return DAG.getNode(ISD::OR, NVT, Lo, Hi); > } > > +SDOperand DAGTypeLegalizer::PromoteResult_BIT_CONVERT(SDNode *N) { > + SDOperand InOp = N->getOperand(0); > + MVT::ValueType InVT = InOp.getValueType(); > + MVT::ValueType NInVT = TLI.getTypeToTransformTo(InVT); > + MVT::ValueType OutVT = TLI.getTypeToTransformTo(N- > >getValueType(0)); > + > + switch (getTypeAction(InVT)) { > + default: > + assert(false && "Unknown type action!"); > + break; > + case Legal: > + break; > + case Promote: > + if (MVT::getSizeInBits(OutVT) == MVT::getSizeInBits(NInVT)) > + // The input promotes to the same size. Convert the promoted > value. > + return DAG.getNode(ISD::BIT_CONVERT, OutVT, > GetPromotedOp(InOp)); > + break; > + case Expand: > + break; > + case Scalarize: > + // Convert the element to an integer and promote it by hand. > + InOp = DAG.getNode(ISD::BIT_CONVERT, > + MVT::getIntegerType(MVT::getSizeInBits(InVT)), > + GetScalarizedOp(InOp)); > + InOp = DAG.getNode(ISD::ANY_EXTEND, > + > MVT::getIntegerType(MVT::getSizeInBits(OutVT)), InOp); > + return DAG.getNode(ISD::BIT_CONVERT, OutVT, InOp); > + case Split: > + // For example, i32 = BIT_CONVERT v2i16 on alpha. Convert the > split > + // pieces of the input into integers and reassemble in the > final type. > + SDOperand Lo, Hi; > + GetSplitOp(N->getOperand(0), Lo, Hi); > + > + unsigned LoBits = MVT::getSizeInBits(Lo.getValueType()); > + Lo = DAG.getNode(ISD::BIT_CONVERT, MVT::getIntegerType(LoBits), > Lo); > + > + unsigned HiBits = MVT::getSizeInBits(Hi.getValueType()); > + Hi = DAG.getNode(ISD::BIT_CONVERT, MVT::getIntegerType(HiBits), > Hi); > + > + if (TLI.isBigEndian()) > + std::swap(Lo, Hi); > + > + MVT::ValueType TargetTy = > MVT::getIntegerType(MVT::getSizeInBits(OutVT)); > + Hi = DAG.getNode(ISD::ANY_EXTEND, TargetTy, Hi); > + Hi = DAG.getNode(ISD::SHL, TargetTy, Hi, > + > DAG.getConstant(MVT::getSizeInBits(Lo.getValueType()), > + TLI.getShiftAmountTy())); > + Lo = DAG.getNode(ISD::ZERO_EXTEND, TargetTy, Lo); > + > + return DAG.getNode(ISD::BIT_CONVERT, OutVT, > + DAG.getNode(ISD::OR, TargetTy, Lo, Hi)); > + } > + > + // Otherwise, lower the bit-convert to a store/load from the > stack, then > + // promote the load. > + SDOperand Op = CreateStackStoreLoad(InOp, N->getValueType(0)); > + return PromoteResult_LOAD(cast(Op.Val)); > +} > + > SDOperand DAGTypeLegalizer::PromoteResult_SimpleIntBinOp(SDNode *N) { > // The input may have strange things in the top bits of the > registers, but > // these operations don't care. They may have weird bits going > out, but > @@ -315,6 +379,51 @@ > return DAG.getNode(ISD::CTTZ, NVT, Op); > } > > +SDOperand DAGTypeLegalizer::PromoteResult_EXTRACT_VECTOR_ELT(SDNode > *N) { > + MVT::ValueType OldVT = N->getValueType(0); > + SDOperand OldVec = N->getOperand(0); > + unsigned OldElts = > MVT::getVectorNumElements(OldVec.getValueType()); > + > + if (OldElts == 1) { > + assert(!isTypeLegal(OldVec.getValueType()) && > + "Legal one-element vector of a type needing promotion!"); > + // It is tempting to follow GetScalarizedOp by a call to > GetPromotedOp, > + // but this would be wrong because the scalarized value may not > yet have > + // been processed. > + return DAG.getNode(ISD::ANY_EXTEND, > TLI.getTypeToTransformTo(OldVT), > + GetScalarizedOp(OldVec)); > + } > + > + // Convert to a vector half as long with an element type of twice > the width, > + // for example <4 x i16> -> <2 x i32>. > + assert(!(OldElts & 1) && "Odd length vectors not supported!"); > + MVT::ValueType NewVT = MVT::getIntegerType(2 * > MVT::getSizeInBits(OldVT)); > + assert(!MVT::isExtendedVT(OldVT) && !MVT::isExtendedVT(NewVT)); > + > + SDOperand NewVec = DAG.getNode(ISD::BIT_CONVERT, > + MVT::getVectorType(NewVT, > OldElts / 2), > + OldVec); > + > + // Extract the element at OldIdx / 2 from the new vector. > + SDOperand OldIdx = N->getOperand(1); > + SDOperand NewIdx = DAG.getNode(ISD::SRL, OldIdx.getValueType(), > OldIdx, > + DAG.getConstant(1, > TLI.getShiftAmountTy())); > + SDOperand Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, NewVT, > NewVec, NewIdx); > + > + // Select the appropriate half of the element: Lo if OldIdx was > even, > + // Hi if it was odd. > + SDOperand Lo = Elt; > + SDOperand Hi = DAG.getNode(ISD::SRL, NewVT, Elt, > + > DAG.getConstant(MVT::getSizeInBits(OldVT), > + > TLI.getShiftAmountTy())); > + if (TLI.isBigEndian()) > + std::swap(Lo, Hi); > + > + SDOperand Odd = DAG.getNode(ISD::AND, OldIdx.getValueType(), > OldIdx, > + DAG.getConstant(1, > TLI.getShiftAmountTy())); > + return DAG.getNode(ISD::SELECT, NewVT, Odd, Hi, Lo); > +} > + > // > = > = > = > ----------------------------------------------------------------------= > ==// > // Operand Promotion > // > = > = > = > ----------------------------------------------------------------------= > ==// > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ > LegalizeTypesScalarize.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp?rev=47672&r1=47671&r2=47672&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp > (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesScalarize.cpp > Wed Feb 27 07:34:40 2008 > @@ -176,6 +176,9 @@ > assert(0 && "Do not know how to scalarize this operator's > operand!"); > abort(); > > + case ISD::BIT_CONVERT: > + Res = ScalarizeOp_BIT_CONVERT(N); break; > + > case ISD::EXTRACT_VECTOR_ELT: > Res = ScalarizeOp_EXTRACT_VECTOR_ELT(N); break; > > @@ -204,6 +207,13 @@ > return false; > } > > +/// ScalarizeOp_BIT_CONVERT - If the value to convert is a vector > that needs > +/// to be scalarized, it must be <1 x ty>. Convert the element > instead. > +SDOperand DAGTypeLegalizer::ScalarizeOp_BIT_CONVERT(SDNode *N) { > + SDOperand Elt = GetScalarizedOp(N->getOperand(0)); > + return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0), Elt); > +} > + > /// ScalarizeOp_EXTRACT_VECTOR_ELT - If the input is a vector that > needs to be > /// scalarized, it must be <1 x ty>, so just return the element, > ignoring the > /// index. > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp?rev=47672&r1=47671&r2=47672&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp > (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp Wed > Feb 27 07:34:40 2008 > @@ -172,7 +172,6 @@ > else > Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, Hi.getValueType(), Hi, > ScalarOp, > DAG.getConstant(Index - LoNumElts, > TLI.getPointerTy())); > - > } > > void DAGTypeLegalizer::SplitRes_VECTOR_SHUFFLE(SDNode *N, > @@ -253,22 +252,50 @@ > SDOperand &Lo, SDOperand > &Hi) { > // We know the result is a vector. The input may be either a > vector or a > // scalar value. > + MVT::ValueType LoVT, HiVT; > + GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); > + > SDOperand InOp = N->getOperand(0); > - if (MVT::isVector(InOp.getValueType()) && > - MVT::getVectorNumElements(InOp.getValueType()) != 1) { > - // If this is a vector, split the vector and convert each of > the pieces now. > - GetSplitOp(InOp, Lo, Hi); > - > - MVT::ValueType LoVT, HiVT; > - GetSplitDestVTs(N->getValueType(0), LoVT, HiVT); > + MVT::ValueType InVT = InOp.getValueType(); > + MVT::ValueType NewInVT = TLI.getTypeToTransformTo(InVT); > > + switch (getTypeAction(InVT)) { > + default: > + assert(false && "Unknown type action!"); > + case Legal: > + break; > + case Promote: > + break; > + case Scalarize: > + // While it is tempting to extract the scalarized operand, > check whether it > + // needs expansion, and if so process it in the Expand case > below, there is > + // no guarantee that the scalarized operand has been processed > yet. If it > + // hasn't then the call to GetExpandedOp will abort. So just > give up. > + break; > + case Expand: > + // A scalar to vector conversion, where the scalar needs > expansion. > + // Check that the vector is being split in two. > + if (MVT::getSizeInBits(NewInVT) == MVT::getSizeInBits(LoVT)) { > + // Convert each expanded piece of the scalar now. > + GetExpandedOp(InOp, Lo, Hi); > + if (TLI.isBigEndian()) > + std::swap(Lo, Hi); > + Lo = DAG.getNode(ISD::BIT_CONVERT, LoVT, Lo); > + Hi = DAG.getNode(ISD::BIT_CONVERT, HiVT, Hi); > + return; > + } > + break; > + case Split: > + // If the input is a vector that needs to be split, convert > each split > + // piece of the input now. > + GetSplitOp(InOp, Lo, Hi); > Lo = DAG.getNode(ISD::BIT_CONVERT, LoVT, Lo); > Hi = DAG.getNode(ISD::BIT_CONVERT, HiVT, Hi); > return; > } > - > + > // Lower the bit-convert to a store/load from the stack, then > split the load. > - SDOperand Op = CreateStackStoreLoad(N->getOperand(0), N- > >getValueType(0)); > + SDOperand Op = CreateStackStoreLoad(InOp, N->getValueType(0)); > SplitRes_LOAD(cast(Op.Val), Lo, Hi); > } > > @@ -340,8 +367,11 @@ > case ISD::STORE: Res = SplitOp_STORE(cast(N), > OpNo); break; > case ISD::RET: Res = SplitOp_RET(N, OpNo); break; > > - case ISD::EXTRACT_SUBVECTOR: Res = > SplitOp_EXTRACT_SUBVECTOR(N); break; > - case ISD::VECTOR_SHUFFLE: Res = SplitOp_VECTOR_SHUFFLE(N, > OpNo); break; > + case ISD::BIT_CONVERT: Res = SplitOp_BIT_CONVERT(N); break; > + > + case ISD::EXTRACT_VECTOR_ELT: Res = > SplitOp_EXTRACT_VECTOR_ELT(N); break; > + case ISD::EXTRACT_SUBVECTOR: Res = > SplitOp_EXTRACT_SUBVECTOR(N); break; > + case ISD::VECTOR_SHUFFLE: Res = SplitOp_VECTOR_SHUFFLE(N, > OpNo); break; > } > } > > @@ -402,6 +432,72 @@ > return DAG.getNode(ISD::RET, MVT::Other, Chain, Lo, Sign, Hi, Sign); > } > > +SDOperand DAGTypeLegalizer::SplitOp_BIT_CONVERT(SDNode *N) { > + // For example, i64 = BIT_CONVERT v4i16 on alpha. Typically the > vector will > + // end up being split all the way down to individual components. > Convert the > + // split pieces into integers and reassemble. > + SDOperand Lo, Hi; > + GetSplitOp(N->getOperand(0), Lo, Hi); > + > + unsigned LoBits = MVT::getSizeInBits(Lo.getValueType()); > + Lo = DAG.getNode(ISD::BIT_CONVERT, MVT::getIntegerType(LoBits), > Lo); > + > + unsigned HiBits = MVT::getSizeInBits(Hi.getValueType()); > + Hi = DAG.getNode(ISD::BIT_CONVERT, MVT::getIntegerType(HiBits), > Hi); > + > + if (TLI.isBigEndian()) > + std::swap(Lo, Hi); > + > + assert(LoBits == HiBits && "Do not know how to assemble odd sized > vectors!"); > + > + return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0), > + DAG.getNode(ISD::BUILD_PAIR, > + MVT::getIntegerType(LoBits > +HiBits), Lo, Hi)); > +} > + > +SDOperand DAGTypeLegalizer::SplitOp_EXTRACT_VECTOR_ELT(SDNode *N) { > + SDOperand Vec = N->getOperand(0); > + SDOperand Idx = N->getOperand(1); > + MVT::ValueType VecVT = Vec.getValueType(); > + > + if (isa(Idx)) { > + uint64_t IdxVal = cast(Idx)->getValue(); > + assert(IdxVal < MVT::getVectorNumElements(VecVT) && > + "Invalid vector index!"); > + > + SDOperand Lo, Hi; > + GetSplitOp(Vec, Lo, Hi); > + > + uint64_t LoElts = MVT::getVectorNumElements(Lo.getValueType()); > + > + if (IdxVal < LoElts) > + return DAG.UpdateNodeOperands(SDOperand(N, 0), Lo, Idx); > + else > + return DAG.UpdateNodeOperands(SDOperand(N, 0), Hi, > + DAG.getConstant(IdxVal - LoElts, > + > Idx.getValueType())); > + } > + > + // Store the vector to the stack and load back the required > element. > + SDOperand StackPtr = DAG.CreateStackTemporary(VecVT); > + SDOperand Store = DAG.getStore(DAG.getEntryNode(), Vec, StackPtr, > NULL, 0); > + > + // Add the offset to the index. > + MVT::ValueType EltVT = MVT::getVectorElementType(VecVT); > + unsigned EltSize = MVT::getSizeInBits(EltVT)/8; // FIXME: should > be ABI size. > + Idx = DAG.getNode(ISD::MUL, Idx.getValueType(), Idx, > + DAG.getConstant(EltSize, Idx.getValueType())); > + > + if (MVT::getSizeInBits(Idx.getValueType()) > > + MVT::getSizeInBits(TLI.getPointerTy())) > + Idx = DAG.getNode(ISD::TRUNCATE, TLI.getPointerTy(), Idx); > + else > + Idx = DAG.getNode(ISD::ZERO_EXTEND, TLI.getPointerTy(), Idx); > + > + StackPtr = DAG.getNode(ISD::ADD, Idx.getValueType(), Idx, > StackPtr); > + return DAG.getLoad(EltVT, Store, StackPtr, NULL, 0); > +} > + > SDOperand DAGTypeLegalizer::SplitOp_EXTRACT_SUBVECTOR(SDNode *N) { > // We know that the extracted result type is legal. For now, > assume the index > // is a constant. > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From kledzik at apple.com Wed Feb 27 16:22:23 2008 From: kledzik at apple.com (Nick Kledzik) Date: Wed, 27 Feb 2008 14:22:23 -0800 Subject: [llvm-commits] [llvm] r47621 - in /llvm/trunk: include/llvm-c/lto.h tools/lto2/ tools/lto2/LTOCodeGenerator.cpp tools/lto2/LTOCodeGenerator.h tools/lto2/LTOModule.cpp tools/lto2/LTOModule.h tools/lto2/Makefile tools/lto2/lto.cpp tools/lto2/lto.exports In-Reply-To: <277A0820-53A4-4A93-B4A3-B8636BC7E1D7@apple.com> References: <200802262026.m1QKQjX8016450@zion.cs.uiuc.edu> <277A0820-53A4-4A93-B4A3-B8636BC7E1D7@apple.com> Message-ID: <104CD24B-9AA0-4093-8F4A-DB19C8A5BB7E@apple.com> On Feb 26, 2008, at 3:12 PM, Chris Lattner wrote: > On Feb 26, 2008, at 12:26 PM, Nick Kledzik wrote: >> URL: http://llvm.org/viewvc/llvm-project?rev=47621&view=rev >> Log: >> first commit of new LTO system. It is not hooked up in the llvm/ >> tools/Makefile, so no one will build it be default yet > > Nice! Some details: > >> +/** >> + * Returns the last error string or NULL if last operation was >> sucessful. > typo "sucessful" fixed >> + >> +/** >> + * Returns the number of symbols in the object module. >> + */ >> +extern unsigned int >> +lto_module_get_num_symbols(lto_module_t mod); > > Minor details which you should feel to ignore: the "int" in > "unsigned int" is redundant, and the "extern" is also redundant. > You could choose to drop those if you care. We tend to not use > them in the rest of llvm, but it doesn't really matter either way. extern may be redundant on function prototypes, but it is very necessary in C headers on data declarations. Otherwise they become tentative definitions. So, I tend to explict and add extern everywhere. I've always found a raw "unsigned" to be like a dangle preposition. I'm keep thinking "unsigned what?". >> ===================================================================== >> ========= >> --- llvm/trunk/tools/lto2/LTOCodeGenerator.cpp (added) >> +++ llvm/trunk/tools/lto2/LTOCodeGenerator.cpp Tue Feb 26 14:26:43 >> 2008 > >> >> + >> +#include "llvm/Module.h" >> +#include "llvm/PassManager.h" >> +#include "llvm/Linker.h" >> +#include "llvm/Constants.h" >> +#include "llvm/DerivedTypes.h" >> +#include "llvm/ModuleProvider.h" >> +#include "llvm/Bitcode/ReaderWriter.h" >> +#include "llvm/Support/CommandLine.h" >> +#include "llvm/Support/FileUtilities.h" >> +#include "llvm/Support/SystemUtils.h" >> +#include "llvm/Support/Mangler.h" >> +#include "llvm/Support/MemoryBuffer.h" >> +#include "llvm/System/Program.h" >> +#include "llvm/System/Signals.h" >> +#include "llvm/Analysis/Passes.h" >> +#include "llvm/Analysis/LoopPass.h" >> +#include "llvm/Analysis/Verifier.h" >> +#include "llvm/CodeGen/FileWriters.h" >> +#include "llvm/Target/SubtargetFeature.h" >> +#include "llvm/Target/TargetOptions.h" >> +#include "llvm/Target/TargetData.h" >> +#include "llvm/Target/TargetMachine.h" >> +#include "llvm/Target/TargetMachineRegistry.h" >> +#include "llvm/Target/TargetAsmInfo.h" >> +#include "llvm/Transforms/IPO.h" >> +#include "llvm/Transforms/Scalar.h" >> +#include "llvm/Analysis/LoadValueNumbering.h" >> +#include "llvm/Support/MathExtras.h" >> +#include "llvm/Config/config.h" >> + >> +#include "LTOModule.h" >> +#include "LTOCodeGenerator.h" > > You should #include LTOCodeGenerator.h first in the list to ensure > that it is self contained. Also, please remove any #includes that > aren't needed. There is some justification and more info for this > here: > http://llvm.org/docs/CodingStandards.html#scf_includes fixed >> + >> +#include >> +#include >> +#include >> +#include > > For standard c++ headers like stdlib, please use . Is it > possible to avoid unistd.h/fcntl.h with the llvm/System/Path.h or > MemoryBuffer.h stuff? MemoryBuffer.h is an efficient way to read > an entire file in off the disk. The issue is that lto_codegen_compile() returns a malloc'ed block which the client frees when done. I don't see a way to use MemoryBuffer that allows me to transfer ownership of the underlying buffer away and then delete the buffer. Also if looks like MemoryBuffer::getFile() mmaps the file instead of using malloc() so, the client then can't free() it. What I've done is change the commensts for to_codegen_compile() to say that the returned buffer is owned by the lto_codegen_t object and is freed with it is disposed. Then I got rid of the malloc/open/read and used MemoryBuffer::getFile(). > >> +void* LTOCodeGenerator::compile(size_t* length, std::string& errMsg) >> +{ >> + // make unqiue temp .s file to put generated assembly code > > typo "unqiue", also comments should end with proper punctuation and > use capital letters :) Fixed > >> >> + >> + if ( !asmResult ) { >> + // read .o file into memory buffer >> + const sys::FileStatus* objStatus; >> + objStatus = uniqueObjPath.getFileStatus(false, &errMsg); >> + if ( objStatus != NULL ) { >> + *length = objStatus->getSize(); >> + // use malloc() because caller will own this buffer >> and free() it >> + buffer = ::malloc(*length); >> + if ( buffer != NULL ) { >> + int fd = ::open(uniqueObjPath.c_str(), O_RDONLY, 0); >> + if ( fd != -1 ) { >> + // read object file contents into buffer >> + if ( ::read(fd, buffer, *length) != (ssize_t) >> *length ) { >> + errMsg = "error reading object file"; >> + free(buffer); >> + buffer = NULL; > > I don't think this is correct: read can return partial results, > however it's best to use MemoryBuffer to avoid having to do this > explicitly. > >> >> + } >> + close(fd); >> + } >> + else { >> + errMsg = "error opening object file"; >> + free(buffer); >> + buffer = NULL; >> + } >> + } >> + else { >> + errMsg = "error mallocing space for object file"; >> + } >> + } >> + else { >> + errMsg = "error stat'ing object file"; >> + } > > I think the code will end up getting simpler with MemoryBuffer, but > if that we're going to happen, I'd suggest using early exits to > avoid having the code be so nested. This would give you: > > if (fd == -1) { > errMsg = "error opening object file"; > return NULL; > } > > for example, but this also requires using RAII to delete the files > etc. If you use MemoryBuffer, the code will likely be simple > enough that it's not worth doing this. Fixed. Now use MemoryBuffer. > >> ===================================================================== >> ========= >> --- llvm/trunk/tools/lto2/LTOCodeGenerator.h (added) >> +++ llvm/trunk/tools/lto2/LTOCodeGenerator.h Tue Feb 26 14:26:43 2008 > > >> + bool writeMergedModules(const char* path, >> std::string& errMsg); > > This goes over 80 columns. Fixed (I just threw that one in to see if the rumors were true, and the are ;-) >> ===================================================================== >> ========= >> --- llvm/trunk/tools/lto2/LTOModule.cpp (added) >> +++ llvm/trunk/tools/lto2/LTOModule.cpp Tue Feb 26 14:26:43 2008 >> @@ -0,0 +1,329 @@ >> +//===-LTOModule.cpp - LLVM Link Time Optimizer >> ----------------------------===// >> +// >> +// The LLVM Compiler Infrastructure >> +// >> +// This file is distributed under the University of Illinois Open >> Source >> +// License. See LICENSE.TXT for details. >> +// >> +// >> ===------------------------------------------------------------------ >> ----===// >> +// >> +// This file implements the Link Time Optimization library. This >> library is >> +// intended to be used by linker to optimize code at link time. >> +// >> +// >> ===------------------------------------------------------------------ >> ----===// >> + >> +#include "llvm/Module.h" >> +#include "llvm/PassManager.h" >> +#include "llvm/Linker.h" >> +#include "llvm/Constants.h" >> +#include "llvm/DerivedTypes.h" >> +#include "llvm/ModuleProvider.h" >> +#include "llvm/Bitcode/ReaderWriter.h" >> +#include "llvm/Support/CommandLine.h" >> +#include "llvm/Support/FileUtilities.h" >> +#include "llvm/Support/SystemUtils.h" >> +#include "llvm/Support/Mangler.h" >> +#include "llvm/Support/MemoryBuffer.h" >> +#include "llvm/System/Program.h" >> +#include "llvm/System/Path.h" >> +#include "llvm/System/Signals.h" >> +#include "llvm/Target/SubtargetFeature.h" >> +#include "llvm/Target/TargetOptions.h" >> +#include "llvm/Target/TargetData.h" >> +#include "llvm/Target/TargetMachine.h" >> +#include "llvm/Target/TargetMachineRegistry.h" >> +#include "llvm/Target/TargetAsmInfo.h" >> +#include "llvm/Transforms/IPO.h" >> +#include "llvm/Transforms/Scalar.h" >> +#include "llvm/Analysis/LoadValueNumbering.h" >> +#include "llvm/Support/MathExtras.h" >> + >> +#include "LTOModule.h" > > As before, pruning this down would be good if possible. Please > move LTOModule.h to the top of the list. Fixed > >> +bool LTOModule::isBitcodeFileForTarget(const void* mem, >> + size_t length, const char* >> triplePrefix) >> +{ >> + bool result = false; >> + MemoryBuffer* buffer; >> + buffer = MemoryBuffer::getMemBuffer((char*)mem, (char*)mem >> +length); >> + if ( buffer != NULL ) { >> + ModuleProvider* mp = getBitcodeModuleProvider(buffer); >> + if ( mp != NULL ) { >> + std::string actualTarget = mp->getModule()- >> >getTargetTriple(); >> + if ( strncmp(actualTarget.c_str(), triplePrefix, >> + strlen(triplePrefix)) == 0) { >> + result = true; >> + } >> + // mp destructor will delete buffer >> + delete mp; >> + } >> + else { >> + // if getBitcodeModuleProvider failed, we need to >> delete buffer >> + delete buffer; >> + } >> + } >> + return result; >> +} > > Please use RAII and early exits to simplify the code. A useful > thing for this is llvm/ADT/OwningPtr.h. You should be able to do > something like this: > > OwningPtr buffer = MemoryBuffer::getMemBuffer... > if (buffer == 0) return 0; > > OwningPtr mp = getBitcodeModuleProvider(buffer); > if (mp == 0) return 0; > > ... > > This makes all the error cases be early exits and makes the success > case easier to understand. Also, no nesting! There are other > methods that can use similar treatment. Hey! OwningPtr<> is not in the Xcode project. That is how I've been search llvm sources. I reworked this to use OwningPtr<> and factored out the target matching code, and yes it is all much smaller now. Cool! > >> +LTOModule::~LTOModule() >> +{ >> + delete _module; >> + if ( _target != NULL ) >> + delete _target; >> +} > > delete accepts a null pointer, so you can just make the second > delete unconditional. It might also make sense to make the > "_module" and "_target" members of LTOModule be OwningPointers, > which would mean you don't have to write the dtor manually. I made them OwningPtrs. > >> +LTOModule* LTOModule::makeLTOModule(const char* path, >> std::string& errMsg) >> +{ >> +LTOModule* LTOModule::makeLTOModule(const void* mem, size_t length, >> + >> std::string& errMsg) >> +{ > > These two methods share all the target matching code. Please pull > it out into a shared helper method (that takes a MemoryBuffer) or > something. Fixed. > >> +void LTOModule::addDefinedSymbol(GlobalValue* def, Mangler &mangler, >> + bool isFunction) >> +{ >> + const char* symbolName = ::strdup(mangler.getValueName >> (def).c_str()); >> + >> + // set alignment part log2() can have rounding errors >> + uint32_t align = def->getAlignment(); >> + uint32_t attr = align ? __builtin_ctz(def->getAlignment()) : 0; > > Please don't use __builtin_ctz(), use a helper from llvm/Support/ > MathExtras.h. Fixed > >> + // set definition part >> + if ( def->hasWeakLinkage() || def->hasLinkOnceLinkage() ) { >> + // lvm bitcode does not differenciate between weak def data >> + // and tentative definitions! >> + // HACK HACK HACK >> + // C++ does not use tentative definitions, but does use >> weak symbols >> + // so guess that anything that looks like a C++ symbol is >> weak and others >> + // are tentative definitions > > Wow, that is a hack. :) We should really fix this at the LLVM IR > level, can you please file a radar that demonstrates how not > distinguishing between these two cases cause a problem? We already have that Dale wrote up. > >> +uint32_t LTOModule::getSymbolCount() >> +{ >> + if ( !_symbolsParsed ) { >> + _symbolsParsed = true; >> + >> + // Use mangler to add GlobalPrefix to names to match >> linker names. >> + Mangler mangler(*_module, _target->getTargetAsmInfo()- >> >getGlobalPrefix()); > > There is one other aspect of configuration for the mangler: On > darwin at least you have to call manger.setUseQuotes(true); > > This tells it that it is ok to make some symbols use double quotes > (e.g. those with a space in them like objc methods) instead of > mangling the space. I don't know if we can currently get this from > TargetAsmInfo.h, but I think we should be able to. Dale or Evan > can help with this part. I don't think this is applicable at this level. You need double quotes around ObjC method names in the generated assembly source file because the otherwise the assembler can't parse the label name. The linker and LTO use raw const char* strings which can have embedded spaces. >> >> + >> + // add functions >> + for (Module::iterator f = _module->begin(); f != _module- >> >end(); ++f) { >> + if ( f->isDeclaration() ) { >> + addUndefinedSymbol(mangler.getValueName(f).c_str()); >> + } >> + else { > > To reduce nesting, I'd suggest writing this as: > >> + for (Module::iterator f = _module->begin(); f != _module- >> >end(); ++f) { >> + if ( f->isDeclaration() ) { >> + addUndefinedSymbol(mangler.getValueName(f).c_str()); > continue; >> >> + } > > which unnests the 'else' part. > > >> >> + addDefinedSymbol(f, mangler, true); >> + // add external symbols referenced by this function. >> + for (Function::iterator b = f->begin(); b != f- >> >end(); ++b) { >> + for (BasicBlock::iterator i = b->begin(); >> + i != b- >> >end(); ++i) { >> + for (unsigned count = 0, total = i- >> >getNumOperands(); >> + count != >> total; ++count) { >> + findExternalRefs(i->getOperand >> (count), mangler); >> + } >> + } >> + } > > I'd suggest splitting this triply nested loop out into its own > helper function. > >> >> + } >> + } >> + >> + // add data >> + for (Module::global_iterator v = _module->global_begin(), >> + e = _module->global_end(); v ! >> = e; ++v) { >> + if ( v->isDeclaration() ) { >> + addUndefinedSymbol(mangler.getValueName(v).c_str()); >> + } > > This can also use continue to reduce nesting. I pulled the nested for loops out into their own method, and this collapsed the function down to where we don't need the continue statements anymore. > >> >> + // make symbols for all undefines >> + for (StringSet::iterator it=_undefines.begin(); >> + it != >> _undefines.end(); ++it) { >> + // if this symbol also has a definition, then don't >> make an undefine >> + // because it is a tentative definition >> + if ( _defines.find(it->getKeyData(), it->getKeyData() >> +it->getKeyLength()) == _defines.end() ) { > > likewise: if (_defines.find(..) != _defines.end()) continue; Changed to use count() which shorts the line. > >> >> +++ llvm/trunk/tools/lto2/LTOModule.h Tue Feb 26 14:26:43 2008 >> @@ -0,0 +1,83 @@ >> +//===-LTOModule.h - LLVM Link Time Optimizer >> ------------------------------===// >> +// >> +// The LLVM Compiler Infrastructure >> +// >> +// This file is distributed under the University of Illinois Open >> Source >> +// License. See LICENSE.TXT for details. >> +// >> +// >> ===------------------------------------------------------------------ >> ----===// >> +// >> +// This file declares the LTOModule class. >> +// >> +// >> ===------------------------------------------------------------------ >> ----===// >> + >> +#ifndef LTO_MODULE_H >> +#define LTO_MODULE_H >> + >> +#include "llvm/Module.h" >> +#include "llvm/GlobalValue.h" >> +#include "llvm/Constants.h" >> +#include "llvm/Support/Mangler.h" >> +#include "llvm/Target/TargetMachine.h" >> +#include "llvm/ADT/StringMap.h" > > I think that several of these #includes can be removed. > GlobalValue.h is redundant, and I think you can forward declare > most of the classes instead of #including their header. I removed some, but then added some back because of new private methods that used those types as parameters. > >> + bool _symbolsParsed; >> + std::vector _symbols; >> + StringSet _defines; // only needed >> to disambiguate tentative definitions >> + StringSet _undefines; // only needed >> to disambiguate tentative definitions > > 80 cols. Fixed. > >> +//===-lto.cpp - LLVM Link Time Optimizer >> ----------------------------------===// >> +// >> +// The LLVM Compiler Infrastructure >> +// >> +// This file is distributed under the University of Illinois Open >> Source >> +// License. See LICENSE.TXT for details. >> +// >> +// >> ===------------------------------------------------------------------ >> ----===// >> +// >> +// This file implements the Link Time Optimization library. This >> library is >> +// intended to be used by linker to optimize code at link time. >> +// >> +// >> ===------------------------------------------------------------------ >> ----===// >> + >> +#include "llvm-c/lto.h" >> + >> +#include "LTOModule.h" >> +#include "LTOCodeGenerator.h" >> + >> + >> +// holds most recent error string >> +// *** not thread safe *** >> +static std::string sLastErrorString; > > This also has a static ctor, which we try to avoid when possible > (yes, we don't avoid very well, but we still try :). Is there > another way to do this? Even without it, there is still a static ctor in lto.o. Something to do with ManglerLinkVar and IncludeFile(). Given that there are a couple hundred ctors in the libLTO.dylib, I'm not to worried about this one. -Nick From kledzik at apple.com Wed Feb 27 16:23:46 2008 From: kledzik at apple.com (Nick Kledzik) Date: Wed, 27 Feb 2008 22:23:46 -0000 Subject: [llvm-commits] [llvm] r47694 - /llvm/trunk/tools/lto2/Makefile Message-ID: <200802272223.m1RMNkHW008407@zion.cs.uiuc.edu> Author: kledzik Date: Wed Feb 27 16:23:46 2008 New Revision: 47694 URL: http://llvm.org/viewvc/llvm-project?rev=47694&view=rev Log: use PROJ_SRC_DIR so this builds with Apple style builds Modified: llvm/trunk/tools/lto2/Makefile Modified: llvm/trunk/tools/lto2/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto2/Makefile?rev=47694&r1=47693&r2=47694&view=diff ============================================================================== --- llvm/trunk/tools/lto2/Makefile (original) +++ llvm/trunk/tools/lto2/Makefile Wed Feb 27 16:23:46 2008 @@ -36,7 +36,7 @@ # extra options to override libtool defaults LLVMLibsOptions := $(LLVMLibsOptions) \ -no-undefined -avoid-version \ - -Wl,-exported_symbols_list -Wl,lto.exports \ + -Wl,-exported_symbols_list -Wl,$(PROJ_SRC_DIR)/lto.exports \ -Wl,-dead_strip \ -Wl,-install_name \ -Wl,"@executable_path/../lib/lib$(LIBRARYNAME)$(SHLIBEXT)" \ From kledzik at apple.com Wed Feb 27 16:25:36 2008 From: kledzik at apple.com (Nick Kledzik) Date: Wed, 27 Feb 2008 22:25:36 -0000 Subject: [llvm-commits] [llvm] r47695 - in /llvm/trunk: include/llvm-c/lto.h tools/lto2/LTOCodeGenerator.cpp tools/lto2/LTOCodeGenerator.h tools/lto2/LTOModule.cpp tools/lto2/LTOModule.h tools/lto2/lto.cpp Message-ID: <200802272225.m1RMPb6Y008470@zion.cs.uiuc.edu> Author: kledzik Date: Wed Feb 27 16:25:36 2008 New Revision: 47695 URL: http://llvm.org/viewvc/llvm-project?rev=47695&view=rev Log: fixes from review of first commit Modified: llvm/trunk/include/llvm-c/lto.h llvm/trunk/tools/lto2/LTOCodeGenerator.cpp llvm/trunk/tools/lto2/LTOCodeGenerator.h llvm/trunk/tools/lto2/LTOModule.cpp llvm/trunk/tools/lto2/LTOModule.h llvm/trunk/tools/lto2/lto.cpp Modified: llvm/trunk/include/llvm-c/lto.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm-c/lto.h?rev=47695&r1=47694&r2=47695&view=diff ============================================================================== --- llvm/trunk/include/llvm-c/lto.h (original) +++ llvm/trunk/include/llvm-c/lto.h Wed Feb 27 16:25:36 2008 @@ -218,11 +218,12 @@ /** * Generates code for all added modules into one native object file. * On sucess returns a pointer to a generated mach-o/ELF buffer and - * length set to the buffer size. Client owns the buffer and should - * free() it when done. + * length set to the buffer size. The buffer is owned by the + * lto_code_gen_t and will be freed when lto_codegen_dispose() + * is called, or lto_codegen_compile() is called again. * On failure, returns NULL (check lto_get_error_message() for details). */ -extern void* +extern const void* lto_codegen_compile(lto_code_gen_t cg, size_t* length); Modified: llvm/trunk/tools/lto2/LTOCodeGenerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto2/LTOCodeGenerator.cpp?rev=47695&r1=47694&r2=47695&view=diff ============================================================================== --- llvm/trunk/tools/lto2/LTOCodeGenerator.cpp (original) +++ llvm/trunk/tools/lto2/LTOCodeGenerator.cpp Wed Feb 27 16:25:36 2008 @@ -12,6 +12,10 @@ // //===----------------------------------------------------------------------===// +#include "LTOModule.h" +#include "LTOCodeGenerator.h" + + #include "llvm/Module.h" #include "llvm/PassManager.h" #include "llvm/Linker.h" @@ -19,18 +23,15 @@ #include "llvm/DerivedTypes.h" #include "llvm/ModuleProvider.h" #include "llvm/Bitcode/ReaderWriter.h" -#include "llvm/Support/CommandLine.h" -#include "llvm/Support/FileUtilities.h" #include "llvm/Support/SystemUtils.h" #include "llvm/Support/Mangler.h" #include "llvm/Support/MemoryBuffer.h" -#include "llvm/System/Program.h" #include "llvm/System/Signals.h" #include "llvm/Analysis/Passes.h" #include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/Verifier.h" +#include "llvm/Analysis/LoadValueNumbering.h" #include "llvm/CodeGen/FileWriters.h" -#include "llvm/Target/SubtargetFeature.h" #include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetMachine.h" @@ -38,12 +39,8 @@ #include "llvm/Target/TargetAsmInfo.h" #include "llvm/Transforms/IPO.h" #include "llvm/Transforms/Scalar.h" -#include "llvm/Analysis/LoadValueNumbering.h" -#include "llvm/Support/MathExtras.h" #include "llvm/Config/config.h" -#include "LTOModule.h" -#include "LTOCodeGenerator.h" #include #include @@ -68,14 +65,16 @@ LTOCodeGenerator::LTOCodeGenerator() : _linker("LinkTimeOptimizer", "ld-temp.o"), _target(NULL), _emitDwarfDebugInfo(false), _scopeRestrictionsDone(false), - _codeModel(LTO_CODEGEN_PIC_MODEL_DYNAMIC) + _codeModel(LTO_CODEGEN_PIC_MODEL_DYNAMIC), + _nativeObjectFile(NULL) { } LTOCodeGenerator::~LTOCodeGenerator() { - // FIXME + delete _target; + delete _nativeObjectFile; } @@ -151,9 +150,9 @@ } -void* LTOCodeGenerator::compile(size_t* length, std::string& errMsg) +const void* LTOCodeGenerator::compile(size_t* length, std::string& errMsg) { - // make unqiue temp .s file to put generated assembly code + // make unique temp .s file to put generated assembly code sys::Path uniqueAsmPath("lto-llvm.s"); if ( uniqueAsmPath.createTemporaryFileOnDisk(true, &errMsg) ) return NULL; @@ -169,7 +168,7 @@ return NULL; } - // make unqiue temp .o file to put generated object file + // make unique temp .o file to put generated object file sys::PathWithStatus uniqueObjPath("lto-llvm.o"); if ( uniqueObjPath.createTemporaryFileOnDisk(true, &errMsg) ) { if ( uniqueAsmPath.exists() ) @@ -179,46 +178,27 @@ sys::RemoveFileOnSignal(uniqueObjPath); // assemble the assembly code - void* buffer = NULL; + const std::string& uniqueObjStr = uniqueObjPath.toString(); bool asmResult = this->assemble(uniqueAsmPath.toString(), - uniqueObjPath.toString(), errMsg); + uniqueObjStr, errMsg); if ( !asmResult ) { + // remove old buffer if compile() called twice + delete _nativeObjectFile; + // read .o file into memory buffer - const sys::FileStatus* objStatus; - objStatus = uniqueObjPath.getFileStatus(false, &errMsg); - if ( objStatus != NULL ) { - *length = objStatus->getSize(); - // use malloc() because caller will own this buffer and free() it - buffer = ::malloc(*length); - if ( buffer != NULL ) { - int fd = ::open(uniqueObjPath.c_str(), O_RDONLY, 0); - if ( fd != -1 ) { - // read object file contents into buffer - if ( ::read(fd, buffer, *length) != (ssize_t)*length ) { - errMsg = "error reading object file"; - free(buffer); - buffer = NULL; - } - close(fd); - } - else { - errMsg = "error opening object file"; - free(buffer); - buffer = NULL; - } - } - else { - errMsg = "error mallocing space for object file"; - } - } - else { - errMsg = "error stat'ing object file"; - } + _nativeObjectFile = MemoryBuffer::getFile(&uniqueObjStr[0], + uniqueObjStr.size(), &errMsg); } - // clean up temp files + + // remove temp files uniqueAsmPath.eraseFromDisk(); uniqueObjPath.eraseFromDisk(); - return buffer; + + // return buffer, unless error + if ( _nativeObjectFile == NULL ) + return NULL; + *length = _nativeObjectFile->getBufferSize(); + return _nativeObjectFile->getBufferStart(); } Modified: llvm/trunk/tools/lto2/LTOCodeGenerator.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto2/LTOCodeGenerator.h?rev=47695&r1=47694&r2=47695&view=diff ============================================================================== --- llvm/trunk/tools/lto2/LTOCodeGenerator.h (original) +++ llvm/trunk/tools/lto2/LTOCodeGenerator.h Wed Feb 27 16:25:36 2008 @@ -18,6 +18,7 @@ #include "llvm/Linker.h" #include "llvm/ADT/StringMap.h" +#include // @@ -34,8 +35,9 @@ bool setDebugInfo(lto_debug_model, std::string& errMsg); bool setCodePICModel(lto_codegen_model, std::string& errMsg); void addMustPreserveSymbol(const char* sym); - bool writeMergedModules(const char* path, std::string& errMsg); - void* compile(size_t* length, std::string& errMsg); + bool writeMergedModules(const char* path, + std::string& errMsg); + const void* compile(size_t* length, std::string& errMsg); private: bool generateAssemblyCode(std::ostream& out, @@ -53,6 +55,7 @@ bool _scopeRestrictionsDone; lto_codegen_model _codeModel; StringSet _mustPreserveSymbols; + llvm::MemoryBuffer* _nativeObjectFile; }; #endif // LTO_CODE_GENERATOR_H Modified: llvm/trunk/tools/lto2/LTOModule.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto2/LTOModule.cpp?rev=47695&r1=47694&r2=47695&view=diff ============================================================================== --- llvm/trunk/tools/lto2/LTOModule.cpp (original) +++ llvm/trunk/tools/lto2/LTOModule.cpp Wed Feb 27 16:25:36 2008 @@ -12,33 +12,21 @@ // //===----------------------------------------------------------------------===// +#include "LTOModule.h" + #include "llvm/Module.h" -#include "llvm/PassManager.h" -#include "llvm/Linker.h" -#include "llvm/Constants.h" -#include "llvm/DerivedTypes.h" #include "llvm/ModuleProvider.h" +#include "llvm/ADT/OwningPtr.h" #include "llvm/Bitcode/ReaderWriter.h" -#include "llvm/Support/CommandLine.h" -#include "llvm/Support/FileUtilities.h" #include "llvm/Support/SystemUtils.h" #include "llvm/Support/Mangler.h" #include "llvm/Support/MemoryBuffer.h" -#include "llvm/System/Program.h" +#include "llvm/Support/MathExtras.h" #include "llvm/System/Path.h" -#include "llvm/System/Signals.h" -#include "llvm/Target/SubtargetFeature.h" -#include "llvm/Target/TargetOptions.h" -#include "llvm/Target/TargetData.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachineRegistry.h" #include "llvm/Target/TargetAsmInfo.h" -#include "llvm/Transforms/IPO.h" -#include "llvm/Transforms/Scalar.h" -#include "llvm/Analysis/LoadValueNumbering.h" -#include "llvm/Support/MathExtras.h" -#include "LTOModule.h" #include @@ -58,51 +46,35 @@ bool LTOModule::isBitcodeFileForTarget(const void* mem, size_t length, const char* triplePrefix) { - bool result = false; - MemoryBuffer* buffer; - buffer = MemoryBuffer::getMemBuffer((char*)mem, (char*)mem+length); - if ( buffer != NULL ) { - ModuleProvider* mp = getBitcodeModuleProvider(buffer); - if ( mp != NULL ) { - std::string actualTarget = mp->getModule()->getTargetTriple(); - if ( strncmp(actualTarget.c_str(), triplePrefix, - strlen(triplePrefix)) == 0) { - result = true; - } - // mp destructor will delete buffer - delete mp; - } - else { - // if getBitcodeModuleProvider failed, we need to delete buffer - delete buffer; - } - } - return result; + MemoryBuffer* buffer = MemoryBuffer::getMemBuffer((char*)mem, + (char*)mem+length); + if ( buffer == NULL ) + return false; + return isTargetMatch(buffer, triplePrefix); } + bool LTOModule::isBitcodeFileForTarget(const char* path, const char* triplePrefix) { - bool result = false; - MemoryBuffer* buffer; - buffer = MemoryBuffer::getFile(path, strlen(path)); - if ( buffer != NULL ) { - ModuleProvider* mp = getBitcodeModuleProvider(buffer); - if ( mp != NULL ) { - std::string actualTarget = mp->getModule()->getTargetTriple(); - if ( strncmp(actualTarget.c_str(), triplePrefix, - strlen(triplePrefix)) == 0) { - result = true; - } - // mp destructor will delete buffer - delete mp; - } - else { - // if getBitcodeModuleProvider failed, we need to delete buffer - delete buffer; - } + MemoryBuffer* buffer = MemoryBuffer::getFile(path, strlen(path)); + if ( buffer == NULL ) + return false; + return isTargetMatch(buffer, triplePrefix); +} + +// takes ownership of buffer +bool LTOModule::isTargetMatch(MemoryBuffer* buffer, const char* triplePrefix) +{ + OwningPtr mp(getBitcodeModuleProvider(buffer)); + // on success, mp owns buffer and both are deleted at end of this method + if ( !mp ) { + delete buffer; + return false; } - return result; + std::string actualTarget = mp->getModule()->getTargetTriple(); + return ( strncmp(actualTarget.c_str(), triplePrefix, + strlen(triplePrefix)) == 0); } @@ -111,68 +83,86 @@ { } -LTOModule::~LTOModule() +LTOModule* LTOModule::makeLTOModule(const char* path, std::string& errMsg) { - delete _module; - if ( _target != NULL ) - delete _target; + OwningPtr buffer(MemoryBuffer::getFile( + path, strlen(path), &errMsg)); + if ( !buffer ) + return NULL; + return makeLTOModule(buffer.get(), errMsg); } +LTOModule* LTOModule::makeLTOModule(const void* mem, size_t length, + std::string& errMsg) +{ + OwningPtr buffer(MemoryBuffer::getMemBuffer((char*)mem, + (char*)mem+length)); + if ( !buffer ) + return NULL; + return makeLTOModule(buffer.get(), errMsg); +} -LTOModule* LTOModule::makeLTOModule(const char* path, std::string& errMsg) +LTOModule* LTOModule::makeLTOModule(MemoryBuffer* buffer, std::string& errMsg) { - MemoryBuffer* buffer = MemoryBuffer::getFile(path, strlen(path)); - if ( buffer != NULL ) { - Module* m = ParseBitcodeFile(buffer, &errMsg); - delete buffer; - if ( m != NULL ) { - const TargetMachineRegistry::entry* march = - TargetMachineRegistry::getClosestStaticTargetForModule(*m, errMsg); - if ( march != NULL ) { - std::string features; - TargetMachine* target = march->CtorFn(*m, features); - return new LTOModule(m, target); - } - } - } - return NULL; + // parse bitcode buffer + OwningPtr m(ParseBitcodeFile(buffer, &errMsg)); + if ( !m ) + return NULL; + // find machine architecture for this module + const TargetMachineRegistry::entry* march = + TargetMachineRegistry::getClosestStaticTargetForModule(*m, errMsg); + if ( march == NULL ) + return NULL; + // construct LTModule, hand over ownership of module and target + std::string features; + TargetMachine* target = march->CtorFn(*m, features); + return new LTOModule(m.take(), target); } -LTOModule* LTOModule::makeLTOModule(const void* mem, size_t length, - std::string& errMsg) + +const char* LTOModule::getTargetTriple() { - MemoryBuffer* buffer; - buffer = MemoryBuffer::getMemBuffer((char*)mem, (char*)mem+length); - if ( buffer != NULL ) { - Module* m = ParseBitcodeFile(buffer, &errMsg); - delete buffer; - if ( m != NULL ) { - const TargetMachineRegistry::entry* march = - TargetMachineRegistry::getClosestStaticTargetForModule(*m, errMsg); - if ( march != NULL ) { - std::string features; - TargetMachine* target = march->CtorFn(*m, features); - return new LTOModule(m, target); + return _module->getTargetTriple().c_str(); +} + +void LTOModule::addDefinedFunctionSymbol(Function* f, Mangler &mangler) +{ + // add to list of defined symbols + addDefinedSymbol(f, mangler, true); + + // add external symbols referenced by this function. + for (Function::iterator b = f->begin(); b != f->end(); ++b) { + for (BasicBlock::iterator i = b->begin(); i != b->end(); ++i) { + for (unsigned count = 0, total = i->getNumOperands(); + count != total; ++count) { + findExternalRefs(i->getOperand(count), mangler); } } } - return NULL; } +void LTOModule::addDefinedDataSymbol(GlobalValue* v, Mangler &mangler) +{ + // add to list of defined symbols + addDefinedSymbol(v, mangler, false); -const char* LTOModule::getTargetTriple() -{ - return _module->getTargetTriple().c_str(); + // add external symbols referenced by this data. + for (unsigned count = 0, total = v->getNumOperands();\ + count != total; ++count) { + findExternalRefs(v->getOperand(count), mangler); + } } + void LTOModule::addDefinedSymbol(GlobalValue* def, Mangler &mangler, bool isFunction) { + // string is owned by _defines const char* symbolName = ::strdup(mangler.getValueName(def).c_str()); // set alignment part log2() can have rounding errors uint32_t align = def->getAlignment(); - uint32_t attr = align ? __builtin_ctz(def->getAlignment()) : 0; + uint32_t attr = align ? CountTrailingZeros_32(def->getAlignment()) : 0; // set permissions part if ( isFunction ) @@ -220,8 +210,9 @@ } -void LTOModule::addUndefinedSymbol(const char* name) -{ +void LTOModule::addPotentialUndefinedSymbol(GlobalValue* decl, Mangler &mangler) +{ + const char* name = mangler.getValueName(decl).c_str(); // ignore all llvm.* symbols if ( strncmp(name, "llvm.", 5) != 0 ) { _undefines[name] = 1; @@ -235,7 +226,7 @@ if (GlobalValue* gv = dyn_cast(value)) { if ( !gv->hasExternalLinkage() ) - addUndefinedSymbol(mangler.getValueName(gv).c_str()); + addPotentialUndefinedSymbol(gv, mangler); } // GlobalValue, even with InternalLinkage type, may have operands with @@ -247,8 +238,7 @@ } } - -uint32_t LTOModule::getSymbolCount() +void LTOModule::lazyParseSymbols() { if ( !_symbolsParsed ) { _symbolsParsed = true; @@ -258,38 +248,19 @@ // add functions for (Module::iterator f = _module->begin(); f != _module->end(); ++f) { - if ( f->isDeclaration() ) { - addUndefinedSymbol(mangler.getValueName(f).c_str()); - } - else { - addDefinedSymbol(f, mangler, true); - // add external symbols referenced by this function. - for (Function::iterator b = f->begin(); b != f->end(); ++b) { - for (BasicBlock::iterator i = b->begin(); - i != b->end(); ++i) { - for (unsigned count = 0, total = i->getNumOperands(); - count != total; ++count) { - findExternalRefs(i->getOperand(count), mangler); - } - } - } - } + if ( f->isDeclaration() ) + addPotentialUndefinedSymbol(f, mangler); + else + addDefinedFunctionSymbol(f, mangler); } // add data for (Module::global_iterator v = _module->global_begin(), e = _module->global_end(); v != e; ++v) { - if ( v->isDeclaration() ) { - addUndefinedSymbol(mangler.getValueName(v).c_str()); - } - else { - addDefinedSymbol(v, mangler, false); - // add external symbols referenced by this data - for (unsigned count = 0, total = v->getNumOperands(); - count != total; ++count) { - findExternalRefs(v->getOperand(count), mangler); - } - } + if ( v->isDeclaration() ) + addPotentialUndefinedSymbol(v, mangler); + else + addDefinedDataSymbol(v, mangler); } // make symbols for all undefines @@ -297,22 +268,28 @@ it != _undefines.end(); ++it) { // if this symbol also has a definition, then don't make an undefine // because it is a tentative definition - if ( _defines.find(it->getKeyData(), it->getKeyData()+it->getKeyLength()) == _defines.end() ) { + if ( _defines.count(it->getKeyData(), it->getKeyData()+ + it->getKeyLength()) == 0 ) { NameAndAttributes info; info.name = it->getKeyData(); info.attributes = LTO_SYMBOL_DEFINITION_UNDEFINED; _symbols.push_back(info); } } - - } - + } +} + + +uint32_t LTOModule::getSymbolCount() +{ + lazyParseSymbols(); return _symbols.size(); } lto_symbol_attributes LTOModule::getSymbolAttributes(uint32_t index) { + lazyParseSymbols(); if ( index < _symbols.size() ) return _symbols[index].attributes; else @@ -321,6 +298,7 @@ const char* LTOModule::getSymbolName(uint32_t index) { + lazyParseSymbols(); if ( index < _symbols.size() ) return _symbols[index].name; else Modified: llvm/trunk/tools/lto2/LTOModule.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto2/LTOModule.h?rev=47695&r1=47694&r2=47695&view=diff ============================================================================== --- llvm/trunk/tools/lto2/LTOModule.h (original) +++ llvm/trunk/tools/lto2/LTOModule.h Wed Feb 27 16:25:36 2008 @@ -15,15 +15,24 @@ #define LTO_MODULE_H #include "llvm/Module.h" -#include "llvm/GlobalValue.h" -#include "llvm/Constants.h" -#include "llvm/Support/Mangler.h" +#include "llvm/ADT/OwningPtr.h" #include "llvm/Target/TargetMachine.h" #include "llvm/ADT/StringMap.h" #include "llvm-c/lto.h" #include +#include + + +// forward references to llvm classes +namespace llvm { + class Mangler; + class MemoryBuffer; + class GlobalValue; + class Value; + class Function; +} // @@ -44,26 +53,35 @@ static LTOModule* makeLTOModule(const char* path, std::string& errMsg); static LTOModule* makeLTOModule(const void* mem, size_t length, std::string& errMsg); - ~LTOModule(); const char* getTargetTriple(); uint32_t getSymbolCount(); lto_symbol_attributes getSymbolAttributes(uint32_t index); const char* getSymbolName(uint32_t index); - llvm::Module * getLLVVMModule() { return _module; } - bool targetSupported() { return (_target != NULL); } + llvm::Module * getLLVVMModule() { return _module.get(); } private: LTOModule(llvm::Module* m, llvm::TargetMachine* t); + void lazyParseSymbols(); void addDefinedSymbol(llvm::GlobalValue* def, llvm::Mangler& mangler, bool isFunction); - void addUndefinedSymbol(const char* name); + void addPotentialUndefinedSymbol(llvm::GlobalValue* decl, + llvm::Mangler &mangler); void findExternalRefs(llvm::Value* value, llvm::Mangler& mangler); + void addDefinedFunctionSymbol(llvm::Function* f, + llvm::Mangler &mangler); + void addDefinedDataSymbol(llvm::GlobalValue* v, + llvm::Mangler &mangler); + static bool isTargetMatch(llvm::MemoryBuffer* memBuffer, + const char* triplePrefix); + static LTOModule* makeLTOModule(llvm::MemoryBuffer* buffer, + std::string& errMsg); + typedef llvm::StringMap StringSet; struct NameAndAttributes { @@ -71,12 +89,13 @@ lto_symbol_attributes attributes; }; - llvm::Module * _module; - llvm::TargetMachine * _target; - bool _symbolsParsed; - std::vector _symbols; - StringSet _defines; // only needed to disambiguate tentative definitions - StringSet _undefines; // only needed to disambiguate tentative definitions + llvm::OwningPtr _module; + llvm::OwningPtr _target; + bool _symbolsParsed; + std::vector _symbols; + // _defines and _undefines only needed to disambiguate tentative definitions + StringSet _defines; + StringSet _undefines; }; #endif // LTO_MODULE_H Modified: llvm/trunk/tools/lto2/lto.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto2/lto.cpp?rev=47695&r1=47694&r2=47695&view=diff ============================================================================== --- llvm/trunk/tools/lto2/lto.cpp (original) +++ llvm/trunk/tools/lto2/lto.cpp Wed Feb 27 16:25:36 2008 @@ -33,7 +33,7 @@ } // -// returns the last error string or NULL if last operation was sucessful +// returns the last error string or NULL if last operation was successful // const char* lto_get_error_message() { @@ -224,13 +224,14 @@ // -// generates code for all added modules into one object file -// On sucess returns a pointer to a generated mach-o buffer and -// length set to the buffer size. Client must free() the buffer -// when done. -// On failure, returns NULL (check lto_get_error_message() for details) +// Generates code for all added modules into one native object file. +// On sucess returns a pointer to a generated mach-o/ELF buffer and +// length set to the buffer size. The buffer is owned by the +// lto_code_gen_t and will be freed when lto_codegen_dispose() +// is called, or lto_codegen_compile() is called again. +// On failure, returns NULL (check lto_get_error_message() for details). // -extern void* +extern const void* lto_codegen_compile(lto_code_gen_t cg, size_t* length) { return cg->compile(length, sLastErrorString); From gohman at apple.com Wed Feb 27 15:12:34 2008 From: gohman at apple.com (Dan Gohman) Date: Wed, 27 Feb 2008 21:12:34 -0000 Subject: [llvm-commits] [llvm] r47692 - in /llvm/trunk: lib/Target/PowerPC/PPCISelLowering.cpp test/CodeGen/PowerPC/mask64.ll Message-ID: <200802272112.m1RLCfSo005025@zion.cs.uiuc.edu> Author: djg Date: Wed Feb 27 15:12:32 2008 New Revision: 47692 URL: http://llvm.org/viewvc/llvm-project?rev=47692&view=rev Log: Don't hard-code the mask size to be 32, which is incorrect on ppc64 and was causing aborts with the new APInt changes. This may also be fixing an obscure ppc64 bug. Added: llvm/trunk/test/CodeGen/PowerPC/mask64.ll Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=47692&r1=47691&r2=47692&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Wed Feb 27 15:12:32 2008 @@ -741,16 +741,18 @@ APInt LHSKnownZero, LHSKnownOne; APInt RHSKnownZero, RHSKnownOne; DAG.ComputeMaskedBits(N.getOperand(0), - APInt::getAllOnesValue(32), + APInt::getAllOnesValue(N.getOperand(0) + .getValueSizeInBits()), LHSKnownZero, LHSKnownOne); if (LHSKnownZero.getBoolValue()) { DAG.ComputeMaskedBits(N.getOperand(1), - APInt::getAllOnesValue(32), + APInt::getAllOnesValue(N.getOperand(1) + .getValueSizeInBits()), RHSKnownZero, RHSKnownOne); // If all of the bits are known zero on the LHS or RHS, the add won't // carry. - if ((LHSKnownZero | RHSKnownZero) == ~0U) { + if (~(LHSKnownZero | RHSKnownZero) == 0) { Base = N.getOperand(0); Index = N.getOperand(1); return true; Added: llvm/trunk/test/CodeGen/PowerPC/mask64.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/mask64.ll?rev=47692&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/mask64.ll (added) +++ llvm/trunk/test/CodeGen/PowerPC/mask64.ll Wed Feb 27 15:12:32 2008 @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc + +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128" +target triple = "powerpc64-apple-darwin9.2.0" + %struct.re_pattern_buffer = type <{ i8*, i64, i8, [7 x i8] }> + +define i32 @xre_search_2(%struct.re_pattern_buffer* %bufp, i32 %range) nounwind { +entry: + br i1 false, label %bb16, label %bb49 + +bb16: ; preds = %entry + %tmp19 = load i8** null, align 1 ; [#uses=1] + %tmp21 = load i8* %tmp19, align 1 ; [#uses=1] + switch i8 %tmp21, label %bb49 [ + i8 0, label %bb45 + i8 1, label %bb34 + ] + +bb34: ; preds = %bb16 + ret i32 0 + +bb45: ; preds = %bb16 + ret i32 -1 + +bb49: ; preds = %bb16, %entry + ret i32 0 +} From dalej at apple.com Wed Feb 27 16:36:00 2008 From: dalej at apple.com (Dale Johannesen) Date: Wed, 27 Feb 2008 22:36:00 -0000 Subject: [llvm-commits] [llvm] r47696 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200802272236.m1RMa0i6008747@zion.cs.uiuc.edu> Author: johannes Date: Wed Feb 27 16:36:00 2008 New Revision: 47696 URL: http://llvm.org/viewvc/llvm-project?rev=47696&view=rev Log: Handle load/store of misaligned vectors that are the same size as an int type by doing a bitconvert of load/store of the int type (same algorithm as floating point). This makes them work for ppc Altivec. There was some code that purported to handle loads of (some) vectors by splitting them into two smaller vectors, but getExtLoad rejects subvector loads, so this could never have worked; the patch removes it. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47696&r1=47695&r2=47696&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Feb 27 16:36:00 2008 @@ -569,22 +569,32 @@ MVT::ValueType VT = Val.getValueType(); int Alignment = ST->getAlignment(); int SVOffset = ST->getSrcValueOffset(); - if (MVT::isFloatingPoint(ST->getMemoryVT())) { + if (MVT::isFloatingPoint(ST->getMemoryVT()) || + MVT::isVector(ST->getMemoryVT())) { // Expand to a bitconvert of the value to the integer type of the // same size, then a (misaligned) int store. MVT::ValueType intVT; - if (VT==MVT::f64) + if (VT == MVT::v8i16 || VT == MVT::v4i32 || + VT == MVT::v2i64 || VT == MVT::v2f64 || + VT == MVT::v4f32 || VT == MVT::v16i8 || + VT == MVT::ppcf128) + intVT = MVT::i128; + else if (VT==MVT::f64 || + VT == MVT::v8i8 || VT == MVT::v4i16 || + VT == MVT::v2i32 || VT == MVT::v1i64 || + VT == MVT::v2f32) intVT = MVT::i64; else if (VT==MVT::f32) intVT = MVT::i32; else - assert(0 && "Unaligned load of unsupported floating point type"); + assert(0 && "Unaligned load of unsupported type"); SDOperand Result = DAG.getNode(ISD::BIT_CONVERT, intVT, Val); return DAG.getStore(Chain, Result, Ptr, ST->getSrcValue(), SVOffset, ST->isVolatile(), Alignment); } assert(MVT::isInteger(ST->getMemoryVT()) && + !MVT::isVector(ST->getMemoryVT()) && "Unaligned store of unknown type."); // Get the half-size VT MVT::ValueType NewStoredVT = ST->getMemoryVT() - 1; @@ -620,43 +630,44 @@ SDOperand Ptr = LD->getBasePtr(); MVT::ValueType VT = LD->getValueType(0); MVT::ValueType LoadedVT = LD->getMemoryVT(); - if (MVT::isFloatingPoint(VT) && !MVT::isVector(VT)) { + if (MVT::isFloatingPoint(VT) || MVT::isVector(VT)) { // Expand to a (misaligned) integer load of the same size, - // then bitconvert to floating point. + // then bitconvert to floating point or vector. MVT::ValueType intVT; - if (LoadedVT == MVT::f64) + if (LoadedVT == MVT::v8i16 || LoadedVT == MVT::v4i32 || + LoadedVT == MVT::v2i64 || LoadedVT == MVT::v2f64 || + LoadedVT == MVT::v4f32 || LoadedVT == MVT::v16i8 || + LoadedVT == MVT::ppcf128) + intVT = MVT::i128; + else if (LoadedVT == MVT::f64 || + LoadedVT == MVT::v8i8 || LoadedVT == MVT::v4i16 || + LoadedVT == MVT::v2i32 || LoadedVT == MVT::v1i64 || + LoadedVT == MVT::v2f32) intVT = MVT::i64; else if (LoadedVT == MVT::f32) intVT = MVT::i32; else - assert(0 && "Unaligned load of unsupported floating point type"); + assert(0 && "Unaligned load of unsupported type"); SDOperand newLoad = DAG.getLoad(intVT, Chain, Ptr, LD->getSrcValue(), SVOffset, LD->isVolatile(), LD->getAlignment()); SDOperand Result = DAG.getNode(ISD::BIT_CONVERT, LoadedVT, newLoad); - if (LoadedVT != VT) + if (MVT::isFloatingPoint(VT) && LoadedVT != VT) Result = DAG.getNode(ISD::FP_EXTEND, VT, Result); SDOperand Ops[] = { Result, Chain }; return DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(VT, MVT::Other), Ops, 2); } - assert((MVT::isInteger(LoadedVT) || MVT::isVector(LoadedVT)) && + assert(MVT::isInteger(LoadedVT) && !MVT::isVector(LoadedVT) && "Unaligned load of unsupported type."); - // Compute the new VT that is half the size of the old one. We either have an - // integer MVT or we have a vector MVT. + // Compute the new VT that is half the size of the old one. This is an + // integer MVT. unsigned NumBits = MVT::getSizeInBits(LoadedVT); MVT::ValueType NewLoadedVT; - if (!MVT::isVector(LoadedVT)) { - NewLoadedVT = MVT::getIntegerType(NumBits/2); - } else { - // FIXME: This is not right for <1 x anything> it is also not right for - // non-power-of-two vectors. - NewLoadedVT = MVT::getVectorType(MVT::getVectorElementType(LoadedVT), - MVT::getVectorNumElements(LoadedVT)/2); - } + NewLoadedVT = MVT::getIntegerType(NumBits/2); NumBits >>= 1; unsigned Alignment = LD->getAlignment(); From asl at math.spbu.ru Wed Feb 27 16:37:28 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 27 Feb 2008 22:37:28 -0000 Subject: [llvm-commits] [llvm] r47697 - /llvm/trunk/include/llvm/Instructions.h Message-ID: <200802272237.m1RMbTMc008794@zion.cs.uiuc.edu> Author: asl Date: Wed Feb 27 16:37:28 2008 New Revision: 47697 URL: http://llvm.org/viewvc/llvm-project?rev=47697&view=rev Log: Assert on invalid PHINode::addIncoming() arguments. Patch by Erick Tryzelaar! Modified: llvm/trunk/include/llvm/Instructions.h Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=47697&r1=47696&r2=47697&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Wed Feb 27 16:37:28 2008 @@ -1312,6 +1312,8 @@ /// addIncoming - Add an incoming value to the end of the PHI list /// void addIncoming(Value *V, BasicBlock *BB) { + assert(V && "PHI node got a null value!"); + assert(BB && "PHI node got a null basic block!"); assert(getType() == V->getType() && "All operands to PHI node must be the same type as the PHI node!"); unsigned OpNo = NumOperands; From dalej at apple.com Wed Feb 27 17:14:50 2008 From: dalej at apple.com (Dale Johannesen) Date: Wed, 27 Feb 2008 23:14:50 -0000 Subject: [llvm-commits] [llvm] r47698 - /llvm/trunk/test/CodeGen/PowerPC/vec_misaligned.ll Message-ID: <200802272314.m1RNEoBp009927@zion.cs.uiuc.edu> Author: johannes Date: Wed Feb 27 17:14:50 2008 New Revision: 47698 URL: http://llvm.org/viewvc/llvm-project?rev=47698&view=rev Log: New test for misaligned Altivec laod/store. Added: llvm/trunk/test/CodeGen/PowerPC/vec_misaligned.ll Added: llvm/trunk/test/CodeGen/PowerPC/vec_misaligned.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/vec_misaligned.ll?rev=47698&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/vec_misaligned.ll (added) +++ llvm/trunk/test/CodeGen/PowerPC/vec_misaligned.ll Wed Feb 27 17:14:50 2008 @@ -0,0 +1,37 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 + +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128" +target triple = "powerpc-apple-darwin8" + %struct.S2203 = type { %struct.u16qi } + %struct.u16qi = type { <16 x i8> } + at s = weak global %struct.S2203 zeroinitializer ; <%struct.S2203*> [#uses=1] + +define void @foo(i32 %x, ...) { +entry: + %x_addr = alloca i32 ; [#uses=1] + %ap = alloca i8* ; [#uses=3] + %ap.0 = alloca i8* ; [#uses=3] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + store i32 %x, i32* %x_addr + %ap1 = bitcast i8** %ap to i8* ; [#uses=1] + call void @llvm.va_start( i8* %ap1 ) + %tmp = load i8** %ap, align 4 ; [#uses=1] + store i8* %tmp, i8** %ap.0, align 4 + %tmp2 = load i8** %ap.0, align 4 ; [#uses=1] + %tmp3 = getelementptr i8* %tmp2, i64 16 ; [#uses=1] + store i8* %tmp3, i8** %ap, align 4 + %tmp4 = load i8** %ap.0, align 4 ; [#uses=1] + %tmp45 = bitcast i8* %tmp4 to %struct.S2203* ; <%struct.S2203*> [#uses=1] + %tmp6 = getelementptr %struct.S2203* @s, i32 0, i32 0 ; <%struct.u16qi*> [#uses=1] + %tmp7 = getelementptr %struct.S2203* %tmp45, i32 0, i32 0 ; <%struct.u16qi*> [#uses=1] + %tmp8 = getelementptr %struct.u16qi* %tmp6, i32 0, i32 0 ; <<16 x i8>*> [#uses=1] + %tmp9 = getelementptr %struct.u16qi* %tmp7, i32 0, i32 0 ; <<16 x i8>*> [#uses=1] + %tmp10 = load <16 x i8>* %tmp9, align 4 ; <<16 x i8>> [#uses=1] + store <16 x i8> %tmp10, <16 x i8>* %tmp8, align 4 + br label %return + +return: ; preds = %entry + ret void +} + +declare void @llvm.va_start(i8*) nounwind From asl at math.spbu.ru Wed Feb 27 17:33:50 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 27 Feb 2008 23:33:50 -0000 Subject: [llvm-commits] [llvm] r47699 - in /llvm/trunk: include/llvm/Target/TargetAsmInfo.h lib/Target/TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.h Message-ID: <200802272333.m1RNXoCW010566@zion.cs.uiuc.edu> Author: asl Date: Wed Feb 27 17:33:50 2008 New Revision: 47699 URL: http://llvm.org/viewvc/llvm-project?rev=47699&view=rev Log: Preparation step for some cleanup/generalization in EH information emission: provide TAI hook for selection of EH data emission format. Currently unused. Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h llvm/trunk/lib/Target/TargetAsmInfo.cpp llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=47699&r1=47698&r2=47699&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Feb 27 17:33:50 2008 @@ -392,6 +392,12 @@ virtual bool ExpandInlineAsm(CallInst *CI) const { return false; } + + /// PreferredEHDataFormat - This hook allows the target to select data + /// format used for encoding pointers in exception handling data. Reason is + /// 0 for data, 1 for code labels, 2 for function pointers. Global is true + /// if the symbol can be relocated. + virtual unsigned PreferredEHDataFormat(unsigned Reason, bool Global) const; // Accessors. // Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=47699&r1=47698&r2=47699&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Feb 27 17:33:50 2008 @@ -13,6 +13,7 @@ //===----------------------------------------------------------------------===// #include "llvm/Target/TargetAsmInfo.h" +#include "llvm/Support/Dwarf.h" #include #include @@ -134,3 +135,8 @@ return Length; } +unsigned TargetAsmInfo::PreferredEHDataFormat(unsigned Reason, + bool Global) const { + return dwarf::DW_EH_PE_absptr; +} + Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=47699&r1=47698&r2=47699&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Feb 27 17:33:50 2008 @@ -20,7 +20,10 @@ #include "llvm/Intrinsics.h" #include "llvm/Module.h" #include "llvm/ADT/StringExtras.h" +#include "llvm/Support/Dwarf.h" + using namespace llvm; +using namespace llvm::dwarf; static const char* x86_asm_table[] = {"{si}", "S", "{di}", "D", @@ -35,7 +38,8 @@ X86TargetAsmInfo::X86TargetAsmInfo(const X86TargetMachine &TM) { const X86Subtarget *Subtarget = &TM.getSubtarget(); - + X86TM = &TM; + // FIXME - Should be simplified. AsmTransCBE = x86_asm_table; @@ -303,3 +307,63 @@ } return false; } + +/// PreferredEHDataFormat - This hook allows the target to select data +/// format used for encoding pointers in exception handling data. Reason is +/// 0 for data, 1 for code labels, 2 for function pointers. Global is true +/// if the symbol can be relocated. +unsigned X86TargetAsmInfo::PreferredEHDataFormat(unsigned Reason, + bool Global) const { + const X86Subtarget *Subtarget = &X86TM->getSubtarget(); + + switch (Subtarget->TargetType) { + case X86Subtarget::isDarwin: + if (Reason == 2 && Global) + return (DW_EH_PE_pcrel | DW_EH_PE_indirect | DW_EH_PE_sdata4); + else if (Reason == 1 || !Global) + return DW_EH_PE_pcrel; + else + return DW_EH_PE_absptr; + + case X86Subtarget::isELF: + case X86Subtarget::isCygwin: + case X86Subtarget::isMingw: { + CodeModel::Model CM = X86TM->getCodeModel(); + + if (X86TM->getRelocationModel() == Reloc::PIC_) { + unsigned Format = 0; + + if (!Subtarget->is64Bit()) + // 32 bit targets always encode pointers as 4 bytes + Format = DW_EH_PE_sdata4; + else { + // 64 bit targets encode pointers in 4 bytes iff: + // - code model is small OR + // - code model is medium and we're emitting externally visible symbols or + // any code symbols + if (CM == CodeModel::Small || + (CM == CodeModel::Medium && (Global || Reason))) + Format = DW_EH_PE_sdata4; + else + Format = DW_EH_PE_sdata8; + } + + if (Global) + Format |= DW_EH_PE_indirect; + + return (Format | DW_EH_PE_pcrel); + } else { + if (Subtarget->is64Bit() && + (CM == CodeModel::Small || + (CM == CodeModel::Medium && Reason))) + return DW_EH_PE_udata4; + else + return DW_EH_PE_absptr; + } + } + + default: + return TargetAsmInfo::PreferredEHDataFormat(Reason, Global); + } +} + Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=47699&r1=47698&r2=47699&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original) +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Wed Feb 27 17:33:50 2008 @@ -25,7 +25,10 @@ explicit X86TargetAsmInfo(const X86TargetMachine &TM); virtual bool ExpandInlineAsm(CallInst *CI) const; + virtual unsigned PreferredEHDataFormat(unsigned Reason, bool Global) const; + private: + const X86TargetMachine* X86TM; bool LowerToBSwap(CallInst *CI) const; }; } // namespace llvm From dpatel at apple.com Wed Feb 27 17:33:51 2008 From: dpatel at apple.com (Devang Patel) Date: Wed, 27 Feb 2008 23:33:51 -0000 Subject: [llvm-commits] [llvm] r47700 - in /llvm/trunk: include/llvm/PassManagers.h lib/VMCore/PassManager.cpp Message-ID: <200802272333.m1RNXpXG010579@zion.cs.uiuc.edu> Author: dpatel Date: Wed Feb 27 17:33:51 2008 New Revision: 47700 URL: http://llvm.org/viewvc/llvm-project?rev=47700&view=rev Log: Remove dead code. Modified: llvm/trunk/include/llvm/PassManagers.h llvm/trunk/lib/VMCore/PassManager.cpp Modified: llvm/trunk/include/llvm/PassManagers.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassManagers.h?rev=47700&r1=47699&r2=47700&view=diff ============================================================================== --- llvm/trunk/include/llvm/PassManagers.h (original) +++ llvm/trunk/include/llvm/PassManagers.h Wed Feb 27 17:33:51 2008 @@ -204,10 +204,6 @@ virtual ~PMDataManager(); - /// Return true IFF pass P's required analysis set does not required new - /// manager. - bool manageablePass(Pass *P); - /// Augment AvailableAnalysis by adding analysis made available by pass P. void recordAvailableAnalysis(Pass *P); Modified: llvm/trunk/lib/VMCore/PassManager.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/PassManager.cpp?rev=47700&r1=47699&r2=47700&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/PassManager.cpp (original) +++ llvm/trunk/lib/VMCore/PassManager.cpp Wed Feb 27 17:33:51 2008 @@ -547,20 +547,6 @@ //===----------------------------------------------------------------------===// // PMDataManager implementation -/// Return true IFF pass P's required analysis set does not required new -/// manager. -bool PMDataManager::manageablePass(Pass *P) { - - // TODO - // If this pass is not preserving information that is required by a - // pass maintained by higher level pass manager then do not insert - // this pass into current manager. Use new manager. For example, - // For example, If FunctionPass F is not preserving ModulePass Info M1 - // that is used by another ModulePass M2 then do not insert F in - // current function pass manager. - return true; -} - /// Augement AvailableAnalysis by adding analysis made available by pass P. void PMDataManager::recordAvailableAnalysis(Pass *P) { From asl at math.spbu.ru Wed Feb 27 17:49:15 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 27 Feb 2008 23:49:15 -0000 Subject: [llvm-commits] [llvm] r47701 - in /llvm/trunk/lib/Target/PowerPC: PPCTargetAsmInfo.cpp PPCTargetAsmInfo.h Message-ID: <200802272349.m1RNnFSi011015@zion.cs.uiuc.edu> Author: asl Date: Wed Feb 27 17:49:15 2008 New Revision: 47701 URL: http://llvm.org/viewvc/llvm-project?rev=47701&view=rev Log: EHPreferredDataFormat hook for PPC targets. Looks like Darwin uses the same encoding everywhere. Linux FIXME'ed. Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.h Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp?rev=47701&r1=47700&r2=47701&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp Wed Feb 27 17:49:15 2008 @@ -14,7 +14,10 @@ #include "PPCTargetAsmInfo.h" #include "PPCTargetMachine.h" #include "llvm/Function.h" +#include "llvm/Support/Dwarf.h" + using namespace llvm; +using namespace llvm::dwarf; PPCTargetAsmInfo::PPCTargetAsmInfo(const PPCTargetMachine &TM) { bool isPPC64 = TM.getSubtargetImpl()->isPPC64(); @@ -27,7 +30,6 @@ InlineAsmStart = "# InlineAsm Start"; InlineAsmEnd = "# InlineAsm End"; AssemblerDialect = TM.getSubtargetImpl()->getAsmFlavor(); - } DarwinTargetAsmInfo::DarwinTargetAsmInfo(const PPCTargetMachine &TM) @@ -86,6 +88,21 @@ } } +/// PreferredEHDataFormat - This hook allows the target to select data +/// format used for encoding pointers in exception handling data. Reason is +/// 0 for data, 1 for code labels, 2 for function pointers. Global is true +/// if the symbol can be relocated. +unsigned DarwinTargetAsmInfo::PreferredEHDataFormat(unsigned Reason, + bool Global) const { + if (Reason == 2 && Global) + return (DW_EH_PE_pcrel | DW_EH_PE_indirect | DW_EH_PE_sdata4); + else if (Reason == 1 || !Global) + return DW_EH_PE_pcrel; + else + return DW_EH_PE_absptr; +} + + LinuxTargetAsmInfo::LinuxTargetAsmInfo(const PPCTargetMachine &TM) : PPCTargetAsmInfo(TM) { @@ -132,3 +149,13 @@ DwarfEHFrameSection = "\t.section\t.eh_frame,\"aw\", at progbits"; DwarfExceptionSection = "\t.section\t.gcc_except_table,\"a\", at progbits"; } + +/// PreferredEHDataFormat - This hook allows the target to select data +/// format used for encoding pointers in exception handling data. Reason is +/// 0 for data, 1 for code labels, 2 for function pointers. Global is true +/// if the symbol can be relocated. +unsigned LinuxTargetAsmInfo::PreferredEHDataFormat(unsigned Reason, + bool Global) const { + // We really need to write something here. + return TargetAsmInfo::PreferredEHDataFormat(Reason, Global); +} Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.h?rev=47701&r1=47700&r2=47701&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.h Wed Feb 27 17:49:15 2008 @@ -27,10 +27,12 @@ struct DarwinTargetAsmInfo : public PPCTargetAsmInfo { explicit DarwinTargetAsmInfo(const PPCTargetMachine &TM); + virtual unsigned PreferredEHDataFormat(unsigned Reason, bool Global) const; }; struct LinuxTargetAsmInfo : public PPCTargetAsmInfo { explicit LinuxTargetAsmInfo(const PPCTargetMachine &TM); + virtual unsigned PreferredEHDataFormat(unsigned Reason, bool Global) const; }; } // namespace llvm From eli.friedman at gmail.com Wed Feb 27 18:21:46 2008 From: eli.friedman at gmail.com (Eli Friedman) Date: Thu, 28 Feb 2008 00:21:46 -0000 Subject: [llvm-commits] [llvm] r47702 - /llvm/trunk/lib/Target/X86/README.txt Message-ID: <200802280021.m1S0LmIi012046@zion.cs.uiuc.edu> Author: efriedma Date: Wed Feb 27 18:21:43 2008 New Revision: 47702 URL: http://llvm.org/viewvc/llvm-project?rev=47702&view=rev Log: A few more small things I've run into. Modified: llvm/trunk/lib/Target/X86/README.txt Modified: llvm/trunk/lib/Target/X86/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=47702&r1=47701&r2=47702&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README.txt (original) +++ llvm/trunk/lib/Target/X86/README.txt Wed Feb 27 18:21:43 2008 @@ -194,9 +194,9 @@ Evaluate what the best way to codegen sdiv X, (2^C) is. For X/8, we currently get this: -int %test1(int %X) { - %Y = div int %X, 8 - ret int %Y +define i32 @test1(i32 %X) { + %Y = sdiv i32 %X, 8 + ret i32 %Y } _test1: @@ -1604,3 +1604,86 @@ sbbl %ecx, %ecx //===---------------------------------------------------------------------===// + +Take the following code (from +http://gcc.gnu.org/bugzilla/show_bug.cgi?id=16541): + +extern unsigned char first_one[65536]; +int FirstOnet(unsigned long long arg1) +{ + if (arg1 >> 48) + return (first_one[arg1 >> 48]); + return 0; +} + + +The following code is currently generated: +FirstOnet: + movl 8(%esp), %eax + cmpl $65536, %eax + movl 4(%esp), %ecx + jb .LBB1_2 # UnifiedReturnBlock +.LBB1_1: # ifthen + shrl $16, %eax + movzbl first_one(%eax), %eax + ret +.LBB1_2: # UnifiedReturnBlock + xorl %eax, %eax + ret + +There are a few possible improvements here: +1. We should be able to eliminate the dead load into %ecx +2. We could change the "movl 8(%esp), %eax" into + "movzwl 10(%esp), %eax"; this lets us change the cmpl + into a testl, which is shorter, and eliminate the shift. + +We could also in theory eliminate the branch by using a conditional +for the address of the load, but that seems unlikely to be worthwhile +in general. + +//===---------------------------------------------------------------------===// + +Take the following code: + +#include +__m128i doload64(short x) {return _mm_set_epi16(x,x,x,x,x,x,x,x);} + +LLVM currently generates the following on x86: +doload64: + movzwl 4(%esp), %eax + movd %eax, %xmm0 + punpcklwd %xmm0, %xmm0 + pshufd $0, %xmm0, %xmm0 + ret + +gcc's generated code: +doload64: + movd 4(%esp), %xmm0 + punpcklwd %xmm0, %xmm0 + pshufd $0, %xmm0, %xmm0 + ret + +LLVM should be able to generate the same thing as gcc. + +//===---------------------------------------------------------------------===// + +Take the following code: +#include +__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);} + +On x86, LLVM generates the following: +doload64: + subl $28, %esp + movl $0, 4(%esp) + movl $1, (%esp) + movq (%esp), %xmm0 + addl $28, %esp + ret + +LLVM should instead generate something more like the following: +doload64: + movl $1, %eax + movd %eax, %xmm0 + ret + +//===---------------------------------------------------------------------===// From evan.cheng at apple.com Wed Feb 27 18:43:08 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 28 Feb 2008 00:43:08 -0000 Subject: [llvm-commits] [llvm] r47703 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/ Message-ID: <200802280043.m1S0hEBR012866@zion.cs.uiuc.edu> Author: evancheng Date: Wed Feb 27 18:43:03 2008 New Revision: 47703 URL: http://llvm.org/viewvc/llvm-project?rev=47703&view=rev Log: Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries. Added: llvm/trunk/lib/CodeGen/LoopAligner.cpp Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h llvm/trunk/include/llvm/CodeGen/Passes.h llvm/trunk/include/llvm/Target/TargetAsmInfo.h llvm/trunk/include/llvm/Target/TargetLowering.h llvm/trunk/lib/CodeGen/AsmPrinter.cpp llvm/trunk/lib/CodeGen/BranchFolding.cpp llvm/trunk/lib/CodeGen/IfConversion.cpp llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp llvm/trunk/lib/Target/X86/X86TargetMachine.cpp llvm/trunk/lib/Target/X86/X86TargetMachine.h Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Wed Feb 27 18:43:03 2008 @@ -78,6 +78,10 @@ /// CurrentSection - The current section we are emitting to. This is /// controlled and used by the SwitchSection method. std::string CurrentSection; + + /// IsInTextSection - True if the current section we are emitting to is a + /// text section. + bool IsInTextSection; protected: AsmPrinter(std::ostream &o, TargetMachine &TM, const TargetAsmInfo *T); @@ -269,9 +273,7 @@ /// an explicit alignment requested, it will unconditionally override the /// alignment request. However, if ForcedAlignBits is specified, this value /// has final say: the ultimate alignment will be the max of ForcedAlignBits - /// and the alignment computed with NumBits and the global. If UseFillExpr - /// is true, it also emits an optional second value FillValue which the - /// assembler uses to fill gaps to match alignment. + /// and the alignment computed with NumBits and the global /// /// The algorithm is: /// Align = NumBits; @@ -279,8 +281,7 @@ /// Align = std::max(Align, ForcedAlignBits); /// void EmitAlignment(unsigned NumBits, const GlobalValue *GV = 0, - unsigned ForcedAlignBits = 0, bool UseFillExpr = false, - unsigned FillValue = 0) const; + unsigned ForcedAlignBits = 0) const; /// printLabel - This method prints a local label used by debug and /// exception handling tables. @@ -317,6 +318,7 @@ /// printBasicBlockLabel - This method prints the label for the specified /// MachineBasicBlock virtual void printBasicBlockLabel(const MachineBasicBlock *MBB, + bool printAlign = false, bool printColon = false, bool printComment = true) const; Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Wed Feb 27 18:43:03 2008 @@ -75,6 +75,10 @@ /// LiveIns - Keep track of the physical registers that are livein of /// the basicblock. std::vector LiveIns; + + /// Alignment - Alignment of the basic block. Zero if the basic block does + /// not need to be aligned. + unsigned Alignment; /// IsLandingPad - Indicate that this basic block is entered via an /// exception handler. @@ -82,7 +86,8 @@ public: explicit MachineBasicBlock(const BasicBlock *bb = 0) - : Prev(0), Next(0), BB(bb), Number(-1), xParent(0), IsLandingPad(false) { + : Prev(0), Next(0), BB(bb), Number(-1), xParent(0), + Alignment(0), IsLandingPad(false) { Insts.parent = this; } @@ -181,6 +186,14 @@ const_livein_iterator livein_end() const { return LiveIns.end(); } bool livein_empty() const { return LiveIns.empty(); } + /// getAlignment - Return alignment of the basic block. + /// + unsigned getAlignment() const { return Alignment; } + + /// setAlignment - Set alignment of the basic block. + /// + void setAlignment(unsigned Align) { Alignment = Align; } + /// isLandingPad - Returns true if the block is a landing pad. That is /// this basic block is entered via an exception handler. bool isLandingPad() const { return IsLandingPad; } Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Wed Feb 27 18:43:03 2008 @@ -204,7 +204,7 @@ } /// getObjectAlignment - Return the alignment of the specified stack object... - int getObjectAlignment(int ObjectIdx) const { + unsigned getObjectAlignment(int ObjectIdx) const { assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() && "Invalid Object Idx!"); return Objects[ObjectIdx+NumFixedObjects].Alignment; Modified: llvm/trunk/include/llvm/CodeGen/Passes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/Passes.h (original) +++ llvm/trunk/include/llvm/CodeGen/Passes.h Wed Feb 27 18:43:03 2008 @@ -129,6 +129,10 @@ /// IfConverter Pass - This pass performs machine code if conversion. FunctionPass *createIfConverterPass(); + /// LoopAligner Pass - This pass aligns loop headers to target specific + /// alignment boundary. + FunctionPass *createLoopAlignerPass(); + /// DebugLabelFoldingPass - This pass prunes out redundant debug labels. This /// allows a debug emitter to determine if the range of two labels is empty, /// by seeing if the labels map to the same reduced label. Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Feb 27 18:43:03 2008 @@ -164,6 +164,10 @@ /// boundary. bool AlignmentIsInBytes; // Defaults to true + /// TextAlignFillValue - If non-zero, this is used to fill the executable + /// space created as the result of a alignment directive. + unsigned TextAlignFillValue; + //===--- Section Switching Directives ---------------------------------===// /// SwitchToSectionDirective - This is the directive used when we want to @@ -503,6 +507,9 @@ bool getAlignmentIsInBytes() const { return AlignmentIsInBytes; } + unsigned getTextAlignFillValue() const { + return TextAlignFillValue; + } const char *getSwitchToSectionDirective() const { return SwitchToSectionDirective; } Modified: llvm/trunk/include/llvm/Target/TargetLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) +++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Feb 27 18:43:03 2008 @@ -548,17 +548,23 @@ /// getIfCvtBlockLimit - returns the target specific if-conversion block size /// limit. Any block whose size is greater should not be predicated. - virtual unsigned getIfCvtBlockSizeLimit() const { + unsigned getIfCvtBlockSizeLimit() const { return IfCvtBlockSizeLimit; } /// getIfCvtDupBlockLimit - returns the target specific size limit for a /// block to be considered for duplication. Any block whose size is greater /// should not be duplicated to facilitate its predication. - virtual unsigned getIfCvtDupBlockSizeLimit() const { + unsigned getIfCvtDupBlockSizeLimit() const { return IfCvtDupBlockSizeLimit; } + /// getPrefLoopAlignment - return the preferred loop alignment. + /// + unsigned getPrefLoopAlignment() const { + return PrefLoopAlignment; + } + /// getPreIndexedAddressParts - returns true by value, base pointer and /// offset pointer and addressing mode by reference if the node's address /// can be legally represented as pre-indexed load / store address. @@ -583,7 +589,7 @@ /// jumptable. virtual SDOperand getPICJumpTableRelocBase(SDOperand Table, SelectionDAG &DAG) const; - + //===--------------------------------------------------------------------===// // TargetLowering Optimization Methods // @@ -890,6 +896,12 @@ void setIfCvtDupBlockSizeLimit(unsigned Limit) { IfCvtDupBlockSizeLimit = Limit; } + + /// setPrefLoopAlignment - Set the target's preferred loop alignment. Default + /// alignment is zero, it means the target does not care about loop alignment. + void setPrefLoopAlignment(unsigned Align) { + PrefLoopAlignment = Align; + } public: @@ -1276,6 +1288,10 @@ /// duplicated during if-conversion. unsigned IfCvtDupBlockSizeLimit; + /// PrefLoopAlignment - The perferred loop alignment. + /// + unsigned PrefLoopAlignment; + /// StackPointerRegisterToSaveRestore - If set to a physical register, this /// specifies the register that llvm.savestack/llvm.restorestack should save /// and restore. Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter.cpp Wed Feb 27 18:43:03 2008 @@ -39,7 +39,8 @@ char AsmPrinter::ID = 0; AsmPrinter::AsmPrinter(std::ostream &o, TargetMachine &tm, const TargetAsmInfo *T) - : MachineFunctionPass((intptr_t)&ID), FunctionNumber(0), O(o), TM(tm), TAI(T) + : MachineFunctionPass((intptr_t)&ID), FunctionNumber(0), O(o), TM(tm), TAI(T), + IsInTextSection(false) {} std::string AsmPrinter::getSectionForFunction(const Function &F) const { @@ -69,6 +70,8 @@ if (!CurrentSection.empty()) O << CurrentSection << TAI->getTextSectionStartSuffix() << '\n'; + + IsInTextSection = true; } /// SwitchToDataSection - Switch to the specified data section of the executable @@ -93,6 +96,8 @@ if (!CurrentSection.empty()) O << CurrentSection << TAI->getDataSectionStartSuffix() << '\n'; + + IsInTextSection = false; } @@ -344,7 +349,7 @@ O << TAI->getPrivateGlobalPrefix() << getFunctionNumber() << '_' << uid << "_set_" << MBB->getNumber(); } else { - printBasicBlockLabel(MBB, false, false); + printBasicBlockLabel(MBB, false, false, false); // If the arch uses custom Jump Table directives, don't calc relative to // JT if (!HadJTEntryDirective) @@ -352,7 +357,7 @@ << getFunctionNumber() << '_' << uid; } } else { - printBasicBlockLabel(MBB, false, false); + printBasicBlockLabel(MBB, false, false, false); } } @@ -679,8 +684,7 @@ // Align = std::max(Align, ForcedAlignBits); // void AsmPrinter::EmitAlignment(unsigned NumBits, const GlobalValue *GV, - unsigned ForcedAlignBits, bool UseFillExpr, - unsigned FillValue) const { + unsigned ForcedAlignBits) const { if (GV && GV->getAlignment()) NumBits = Log2_32(GV->getAlignment()); NumBits = std::max(NumBits, ForcedAlignBits); @@ -688,6 +692,9 @@ if (NumBits == 0) return; // No need to emit alignment. if (TAI->getAlignmentIsInBytes()) NumBits = 1 << NumBits; O << TAI->getAlignDirective() << NumBits; + + unsigned FillValue = TAI->getTextAlignFillValue(); + bool UseFillExpr = IsInTextSection && FillValue; if (UseFillExpr) O << ",0x" << std::hex << FillValue << std::dec; O << "\n"; } @@ -1252,7 +1259,7 @@ if (Modifier[0]=='l') // labels are target independent printBasicBlockLabel(MI->getOperand(OpNo).getMBB(), - false, false); + false, false, false); else { AsmPrinter *AP = const_cast(this); if ((OpFlags & 7) == 4 /*ADDR MODE*/) { @@ -1318,8 +1325,15 @@ /// printBasicBlockLabel - This method prints the label for the specified /// MachineBasicBlock void AsmPrinter::printBasicBlockLabel(const MachineBasicBlock *MBB, + bool printAlign, bool printColon, bool printComment) const { + if (printAlign) { + unsigned Align = MBB->getAlignment(); + if (Align) + EmitAlignment(Log2_32(Align)); + } + O << TAI->getPrivateGlobalPrefix() << "BB" << getFunctionNumber() << "_" << MBB->getNumber(); if (printColon) @@ -1338,7 +1352,7 @@ O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() << getFunctionNumber() << '_' << uid << "_set_" << MBB->getNumber() << ','; - printBasicBlockLabel(MBB, false, false); + printBasicBlockLabel(MBB, false, false, false); O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << '_' << uid << '\n'; } @@ -1351,7 +1365,7 @@ O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() << getFunctionNumber() << '_' << uid << '_' << uid2 << "_set_" << MBB->getNumber() << ','; - printBasicBlockLabel(MBB, false, false); + printBasicBlockLabel(MBB, false, false, false); O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << '_' << uid << '_' << uid2 << '\n'; } Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original) +++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Wed Feb 27 18:43:03 2008 @@ -44,7 +44,7 @@ cl::desc("Max number of predecessors to consider tail merging"), cl::init(100), cl::Hidden); - struct BranchFolder : public MachineFunctionPass { + struct VISIBILITY_HIDDEN BranchFolder : public MachineFunctionPass { static char ID; explicit BranchFolder(bool defaultEnableTailMerge) : MachineFunctionPass((intptr_t)&ID) { Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/IfConversion.cpp (original) +++ llvm/trunk/lib/CodeGen/IfConversion.cpp Wed Feb 27 18:43:03 2008 @@ -56,7 +56,7 @@ STATISTIC(NumDupBBs, "Number of duplicated blocks"); namespace { - class IfConverter : public MachineFunctionPass { + class VISIBILITY_HIDDEN IfConverter : public MachineFunctionPass { enum IfcvtKind { ICNotClassfied, // BB data valid, but not classified. ICSimpleFalse, // Same as ICSimple, but on the false path. Added: llvm/trunk/lib/CodeGen/LoopAligner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LoopAligner.cpp?rev=47703&view=auto ============================================================================== --- llvm/trunk/lib/CodeGen/LoopAligner.cpp (added) +++ llvm/trunk/lib/CodeGen/LoopAligner.cpp Wed Feb 27 18:43:03 2008 @@ -0,0 +1,65 @@ +//===-- LoopAligner.cpp - Loop aligner pass. ------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the pass that align loop headers to target specific +// alignment boundary. +// +//===----------------------------------------------------------------------===// + +#define DEBUG_TYPE "loopalign" +#include "llvm/CodeGen/MachineLoopInfo.h" +#include "llvm/CodeGen/MachineFunctionPass.h" +#include "llvm/CodeGen/Passes.h" +#include "llvm/Target/TargetLowering.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/Debug.h" +using namespace llvm; + +namespace { + class LoopAligner : public MachineFunctionPass { + const TargetLowering *TLI; + + public: + static char ID; + LoopAligner() : MachineFunctionPass((intptr_t)&ID) {} + + virtual bool runOnMachineFunction(MachineFunction &MF); + virtual const char *getPassName() const { return "Loop aligner"; } + + virtual void getAnalysisUsage(AnalysisUsage &AU) const { + AU.addRequired(); + AU.addPreserved(); + MachineFunctionPass::getAnalysisUsage(AU); + } + }; + + char LoopAligner::ID = 0; +} // end anonymous namespace + +FunctionPass *llvm::createLoopAlignerPass() { return new LoopAligner(); } + +bool LoopAligner::runOnMachineFunction(MachineFunction &MF) { + const MachineLoopInfo *MLI = &getAnalysis(); + + if (MLI->begin() == MLI->end()) + return false; // No loops. + + unsigned Align = MF.getTarget().getTargetLowering()->getPrefLoopAlignment(); + if (!Align) + return false; // Don't care about loop alignment. + + for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { + MachineBasicBlock *MBB = I; + if (MLI->isLoopHeader(MBB)) + MBB->setAlignment(Align); + } + + return true; +} Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Wed Feb 27 18:43:03 2008 @@ -166,6 +166,7 @@ if (LBB) OS << LBB->getName() << ": "; OS << (const void*)this << ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber(); + if (Alignment) OS << ", Alignment " << Alignment; if (isLandingPad()) OS << ", EH LANDING PAD"; OS << ":\n"; Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Feb 27 18:43:03 2008 @@ -206,6 +206,8 @@ JumpBufSize = 0; JumpBufAlignment = 0; IfCvtBlockSizeLimit = 2; + IfCvtDupBlockSizeLimit = 0; + PrefLoopAlignment = 0; InitLibcallNames(LibcallRoutineNames); InitCmpLibcallCCs(CmpLibcallCCs); Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Wed Feb 27 18:43:03 2008 @@ -248,7 +248,7 @@ I != E; ++I) { // Print a label for the basic block. if (I != MF.begin()) { - printBasicBlockLabel(I, true); + printBasicBlockLabel(I, true, true); O << '\n'; } for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); @@ -710,13 +710,13 @@ << '_' << JTI << '_' << MO2.getImm() << "_set_" << MBB->getNumber(); else if (TM.getRelocationModel() == Reloc::PIC_) { - printBasicBlockLabel(MBB, false, false); + printBasicBlockLabel(MBB, false, false, false); // If the arch uses custom Jump Table directives, don't calc relative to JT if (!TAI->getJumpTableDirective()) O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm(); } else - printBasicBlockLabel(MBB, false, false); + printBasicBlockLabel(MBB, false, false, false); if (i != e-1) O << '\n'; } Modified: llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp Wed Feb 27 18:43:03 2008 @@ -171,7 +171,7 @@ for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); I != E; ++I) { if (I != MF.begin()) { - printBasicBlockLabel(I, true); + printBasicBlockLabel(I, true, true); O << '\n'; } for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); Modified: llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp Wed Feb 27 18:43:03 2008 @@ -460,7 +460,7 @@ I != E; ++I) { // Print a label for the basic block. if (I != MF.begin()) { - printBasicBlockLabel(I, true); + printBasicBlockLabel(I, true, true); O << '\n'; } for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); Modified: llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp Wed Feb 27 18:43:03 2008 @@ -149,7 +149,7 @@ I != E; ++I) { // Print a label for the basic block if there are any predecessors. if (!I->pred_empty()) { - printBasicBlockLabel(I, true); + printBasicBlockLabel(I, true, true); O << '\n'; } for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Wed Feb 27 18:43:03 2008 @@ -297,7 +297,7 @@ // Print a label for the basic block. if (I != MF.begin()) { - printBasicBlockLabel(I, true); + printBasicBlockLabel(I, true, true); O << '\n'; } Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed Feb 27 18:43:03 2008 @@ -604,7 +604,7 @@ I != E; ++I) { // Print a label for the basic block. if (I != MF.begin()) { - printBasicBlockLabel(I, true); + printBasicBlockLabel(I, true, true); O << '\n'; } for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); @@ -838,7 +838,7 @@ I != E; ++I) { // Print a label for the basic block. if (I != MF.begin()) { - printBasicBlockLabel(I, true); + printBasicBlockLabel(I, true, true); O << '\n'; } for (MachineBasicBlock::const_iterator II = I->begin(), IE = I->end(); Modified: llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp Wed Feb 27 18:43:03 2008 @@ -116,7 +116,7 @@ I != E; ++I) { // Print a label for the basic block. if (I != MF.begin()) { - printBasicBlockLabel(I, true); + printBasicBlockLabel(I, true, true); O << '\n'; } for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Feb 27 18:43:03 2008 @@ -101,36 +101,25 @@ switch (F->getLinkage()) { default: assert(0 && "Unknown linkage type!"); case Function::InternalLinkage: // Symbols default to internal. - if (Subtarget->isTargetDarwin()) - // FIXME: This should be parameterized somewhere. - EmitAlignment(4, F, 0, true, 0x90); - else - EmitAlignment(4, F); + EmitAlignment(4, F); break; case Function::DLLExportLinkage: DLLExportedFns.insert(Mang->makeNameProper(F->getName(), "")); //FALLS THROUGH case Function::ExternalLinkage: - if (Subtarget->isTargetDarwin()) - // FIXME: This should be parameterized somewhere. - EmitAlignment(4, F, 0, true, 0x90); - else - EmitAlignment(4, F); + EmitAlignment(4, F); O << "\t.globl\t" << CurrentFnName << "\n"; break; case Function::LinkOnceLinkage: case Function::WeakLinkage: + EmitAlignment(4, F); if (Subtarget->isTargetDarwin()) { - // FIXME: This should be parameterized somewhere. - EmitAlignment(4, F, 0, true, 0x90); O << "\t.globl\t" << CurrentFnName << "\n"; O << TAI->getWeakDefDirective() << CurrentFnName << "\n"; } else if (Subtarget->isTargetCygMing()) { - EmitAlignment(4, F); O << "\t.globl\t" << CurrentFnName << "\n"; O << "\t.linkonce discard\n"; } else { - EmitAlignment(4, F); O << "\t.weak\t" << CurrentFnName << "\n"; } break; @@ -180,7 +169,7 @@ I != E; ++I) { // Print a label for the basic block. if (!I->pred_empty()) { - printBasicBlockLabel(I, true); + printBasicBlockLabel(I, true, true); O << '\n'; } for (MachineBasicBlock::const_iterator II = I->begin(), IE = I->end(); @@ -515,7 +504,7 @@ O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() << getFunctionNumber() << '_' << uid << "_set_" << MBB->getNumber() << ','; - printBasicBlockLabel(MBB, false, false); + printBasicBlockLabel(MBB, false, false, false); if (Subtarget->isPICStyleRIPRel()) O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << '_' << uid << '\n'; @@ -543,12 +532,12 @@ O << TAI->getPrivateGlobalPrefix() << getFunctionNumber() << '_' << uid << "_set_" << MBB->getNumber(); } else if (Subtarget->isPICStyleGOT()) { - printBasicBlockLabel(MBB, false, false); + printBasicBlockLabel(MBB, false, false, false); O << "@GOTOFF"; } else assert(0 && "Don't know how to print MBB label for this PIC mode"); } else - printBasicBlockLabel(MBB, false, false); + printBasicBlockLabel(MBB, false, false, false); } bool X86ATTAsmPrinter::printAsmMRegister(const MachineOperand &MO, Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Feb 27 18:43:03 2008 @@ -714,6 +714,7 @@ maxStoresPerMemcpy = 16; // For %llvm.memcpy -> sequence of stores maxStoresPerMemmove = 16; // For %llvm.memmove -> sequence of stores allowUnalignedMemoryAccesses = true; // x86 supports it! + setPrefLoopAlignment(16); } /// getMaxByValAlign - Helper for getByValTypeAlignment to determine Modified: llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp Wed Feb 27 18:43:03 2008 @@ -78,7 +78,7 @@ I != E; ++I) { // Print a label for the basic block if there are any predecessors. if (!I->pred_empty()) { - printBasicBlockLabel(I, true); + printBasicBlockLabel(I, true, true); O << '\n'; } for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); @@ -242,7 +242,7 @@ O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() << getFunctionNumber() << '_' << uid << "_set_" << MBB->getNumber() << ','; - printBasicBlockLabel(MBB, false, false); + printBasicBlockLabel(MBB, false, false, false); O << '-' << "\"L" << getFunctionNumber() << "$pb\"'\n"; } Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Feb 27 18:43:03 2008 @@ -47,6 +47,7 @@ switch (Subtarget->TargetType) { case X86Subtarget::isDarwin: AlignmentIsInBytes = false; + TextAlignFillValue = 0x90; GlobalPrefix = "_"; if (!Subtarget->is64Bit()) Data64bitsDirective = 0; // we can't emit a 64-bit unit Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Wed Feb 27 18:43:03 2008 @@ -164,6 +164,13 @@ return true; // -print-machineinstr should print after this. } +bool X86TargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) { + if (Fast) return false; + + PM.add(createLoopAlignerPass()); + return true; +} + bool X86TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, std::ostream &Out) { PM.add(createX86CodePrinterPass(Out, *this)); Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=47703&r1=47702&r2=47703&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original) +++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Wed Feb 27 18:43:03 2008 @@ -63,6 +63,7 @@ // Set up the pass pipeline. virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast); + virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast); virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, std::ostream &Out); virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast, From sabre at nondot.org Wed Feb 27 22:53:00 2008 From: sabre at nondot.org (Chris Lattner) Date: Thu, 28 Feb 2008 04:53:00 -0000 Subject: [llvm-commits] [llvm] r47704 - /llvm/trunk/lib/Target/X86/README.txt Message-ID: <200802280453.m1S4r0Gj021091@zion.cs.uiuc.edu> Author: lattner Date: Wed Feb 27 22:52:59 2008 New Revision: 47704 URL: http://llvm.org/viewvc/llvm-project?rev=47704&view=rev Log: Add a random not very important note Modified: llvm/trunk/lib/Target/X86/README.txt Modified: llvm/trunk/lib/Target/X86/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=47704&r1=47703&r2=47704&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README.txt (original) +++ llvm/trunk/lib/Target/X86/README.txt Wed Feb 27 22:52:59 2008 @@ -1687,3 +1687,41 @@ ret //===---------------------------------------------------------------------===// + +We compile this function: + +define i32 @foo(i32 %a, i32 %b, i32 %c, i8 zeroext %d) nounwind { +entry: + %tmp2 = icmp eq i8 %d, 0 ; [#uses=1] + br i1 %tmp2, label %bb7, label %bb + +bb: ; preds = %entry + %tmp6 = add i32 %b, %a ; [#uses=1] + ret i32 %tmp6 + +bb7: ; preds = %entry + %tmp10 = sub i32 %a, %c ; [#uses=1] + ret i32 %tmp10 +} + +to: + +_foo: + cmpb $0, 16(%esp) + movl 12(%esp), %ecx + movl 8(%esp), %eax + movl 4(%esp), %edx + je LBB1_2 # bb7 +LBB1_1: # bb + addl %edx, %eax + ret +LBB1_2: # bb7 + movl %edx, %eax + subl %ecx, %eax + ret + +The coallescer could coallesce "edx" with "eax" to avoid the movl in LBB1_2 +if it commuted the addl in LBB1_1. + +//===---------------------------------------------------------------------===// + From sabre at nondot.org Wed Feb 27 23:34:27 2008 From: sabre at nondot.org (Chris Lattner) Date: Thu, 28 Feb 2008 05:34:27 -0000 Subject: [llvm-commits] [llvm] r47705 - /llvm/trunk/lib/Target/README.txt Message-ID: <200802280534.m1S5YR4I022318@zion.cs.uiuc.edu> Author: lattner Date: Wed Feb 27 23:34:27 2008 New Revision: 47705 URL: http://llvm.org/viewvc/llvm-project?rev=47705&view=rev Log: target-indep codegen memcpy lowering issue. Modified: llvm/trunk/lib/Target/README.txt Modified: llvm/trunk/lib/Target/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=47705&r1=47704&r2=47705&view=diff ============================================================================== --- llvm/trunk/lib/Target/README.txt (original) +++ llvm/trunk/lib/Target/README.txt Wed Feb 27 23:34:27 2008 @@ -628,3 +628,47 @@ We should add an FRINT node to the DAG to model targets that have legal implementations of ceil/floor/rint. + +//===---------------------------------------------------------------------===// + +Consider: + +int test() { + long long input[8] = {1,1,1,1,1,1,1,1}; + foo(input); +} + +We currently compile this into a memcpy from a global array since the +initializer is fairly large and not memset'able. This is good, but the memcpy +gets lowered to load/stores in the code generator. This is also ok, except +that the codegen lowering for memcpy doesn't handle the case when the source +is a constant global. This gives us atrocious code like this: + + call "L1$pb" +"L1$pb": + popl %eax + movl _C.0.1444-"L1$pb"+32(%eax), %ecx + movl %ecx, 40(%esp) + movl _C.0.1444-"L1$pb"+20(%eax), %ecx + movl %ecx, 28(%esp) + movl _C.0.1444-"L1$pb"+36(%eax), %ecx + movl %ecx, 44(%esp) + movl _C.0.1444-"L1$pb"+44(%eax), %ecx + movl %ecx, 52(%esp) + movl _C.0.1444-"L1$pb"+40(%eax), %ecx + movl %ecx, 48(%esp) + movl _C.0.1444-"L1$pb"+12(%eax), %ecx + movl %ecx, 20(%esp) + movl _C.0.1444-"L1$pb"+4(%eax), %ecx +... + +instead of: + movl $1, 16(%esp) + movl $0, 20(%esp) + movl $1, 24(%esp) + movl $0, 28(%esp) + movl $1, 32(%esp) + movl $0, 36(%esp) + ... + +//===---------------------------------------------------------------------===// From sabre at nondot.org Wed Feb 27 23:44:20 2008 From: sabre at nondot.org (Chris Lattner) Date: Thu, 28 Feb 2008 05:44:20 -0000 Subject: [llvm-commits] [llvm] r47706 - in /llvm/trunk/lib/Target/Sparc: README.txt SparcISelDAGToDAG.cpp Message-ID: <200802280544.m1S5iK5u022700@zion.cs.uiuc.edu> Author: lattner Date: Wed Feb 27 23:44:20 2008 New Revision: 47706 URL: http://llvm.org/viewvc/llvm-project?rev=47706&view=rev Log: fix CodeGen/Generic/2008-01-25-dag-combine-mul.ll on sparc, PR2105 Modified: llvm/trunk/lib/Target/Sparc/README.txt llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/Sparc/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/README.txt?rev=47706&r1=47705&r2=47706&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/README.txt (original) +++ llvm/trunk/lib/Target/Sparc/README.txt Wed Feb 27 23:44:20 2008 @@ -7,6 +7,7 @@ * We can fold small constant offsets into the %hi/%lo references to constant pool addresses as well. * When in V9 mode, register allocate %icc[0-3]. +* Add support for isel'ing UMUL_LOHI instead of marking it as Expand. * Emit the 'Branch on Integer Register with Prediction' instructions. It's not clear how to write a pattern for this though: Modified: llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp?rev=47706&r1=47705&r2=47706&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp Wed Feb 27 23:44:20 2008 @@ -218,6 +218,9 @@ setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); + // FIXME: Sparc provides these multiplies, but we don't have them yet. + setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); + // We don't have line number support yet. setOperationAction(ISD::LOCATION, MVT::Other, Expand); setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); From sabre at nondot.org Wed Feb 27 23:48:04 2008 From: sabre at nondot.org (Chris Lattner) Date: Thu, 28 Feb 2008 05:48:04 -0000 Subject: [llvm-commits] [llvm] r47707 - /llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp Message-ID: <200802280548.m1S5m4mc023189@zion.cs.uiuc.edu> Author: lattner Date: Wed Feb 27 23:48:04 2008 New Revision: 47707 URL: http://llvm.org/viewvc/llvm-project?rev=47707&view=rev Log: Fix CodeGen/Generic/storetrunc-fp.ll on sparc, PR2105 Modified: llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp?rev=47707&r1=47706&r2=47707&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp Wed Feb 27 23:48:04 2008 @@ -140,9 +140,10 @@ // Turn FP extload into load/fextend setLoadXAction(ISD::EXTLOAD, MVT::f32, Expand); - // Sparc doesn't have i1 sign extending load setLoadXAction(ISD::SEXTLOAD, MVT::i1, Promote); + // Turn FP truncstore into trunc + store. + setTruncStoreAction(MVT::f64, MVT::f32, Expand); // Custom legalize GlobalAddress nodes into LO/HI parts. setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); From sabre at nondot.org Wed Feb 27 23:53:40 2008 From: sabre at nondot.org (Chris Lattner) Date: Thu, 28 Feb 2008 05:53:40 -0000 Subject: [llvm-commits] [llvm] r47708 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200802280553.m1S5rekK024032@zion.cs.uiuc.edu> Author: lattner Date: Wed Feb 27 23:53:40 2008 New Revision: 47708 URL: http://llvm.org/viewvc/llvm-project?rev=47708&view=rev Log: implement expand for ISD::DECLARE by just deleting it. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47708&r1=47707&r2=47708&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Feb 27 23:53:40 2008 @@ -1111,6 +1111,9 @@ Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the variable. Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3); break; + case TargetLowering::Expand: + Result = LegalizeOp(Node->getOperand(0)); + break; } break; From sabre at nondot.org Wed Feb 27 23:54:25 2008 From: sabre at nondot.org (Chris Lattner) Date: Thu, 28 Feb 2008 05:54:25 -0000 Subject: [llvm-commits] [llvm] r47709 - /llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp Message-ID: <200802280554.m1S5sPIt024154@zion.cs.uiuc.edu> Author: lattner Date: Wed Feb 27 23:54:25 2008 New Revision: 47709 URL: http://llvm.org/viewvc/llvm-project?rev=47709&view=rev Log: Sparc backend doesn't support debug info yet, mark the nodes as expand. This fixes a crash on test/DebugInfo/funccall.ll Modified: llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp?rev=47709&r1=47708&r2=47709&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp Wed Feb 27 23:54:25 2008 @@ -242,11 +242,15 @@ setOperationAction(ISD::STACKRESTORE , MVT::Other, Expand); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Custom); + // No debug info support yet. + setOperationAction(ISD::LOCATION, MVT::Other, Expand); + setOperationAction(ISD::LABEL, MVT::Other, Expand); + setOperationAction(ISD::DECLARE, MVT::Other, Expand); + setStackPointerRegisterToSaveRestore(SP::O6); - if (TM.getSubtarget().isV9()) { + if (TM.getSubtarget().isV9()) setOperationAction(ISD::CTPOP, MVT::i32, Legal); - } computeRegisterProperties(); } From baldrick at free.fr Thu Feb 28 01:06:08 2008 From: baldrick at free.fr (Duncan Sands) Date: Thu, 28 Feb 2008 08:06:08 +0100 Subject: [llvm-commits] [llvm] r47696 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp In-Reply-To: <200802272236.m1RMa0i6008747@zion.cs.uiuc.edu> References: <200802272236.m1RMa0i6008747@zion.cs.uiuc.edu> Message-ID: <200802280806.12584.baldrick@free.fr> Hi Dale, > - if (VT==MVT::f64) > + if (VT == MVT::v8i16 || VT == MVT::v4i32 || > + VT == MVT::v2i64 || VT == MVT::v2f64 || > + VT == MVT::v4f32 || VT == MVT::v16i8 || > + VT == MVT::ppcf128) > + intVT = MVT::i128; > + else if (VT==MVT::f64 || > + VT == MVT::v8i8 || VT == MVT::v4i16 || > + VT == MVT::v2i32 || VT == MVT::v1i64 || > + VT == MVT::v2f32) > intVT = MVT::i64; > else if (VT==MVT::f32) > intVT = MVT::i32; > else > - assert(0 && "Unaligned load of unsupported floating point type"); > + assert(0 && "Unaligned load of unsupported type"); how about replacing all that with: IntVT = MVT::getIntegerType(MVT::getSizeInBits(VT)); ? You might want to check that the integer type is not an extended value type. > - if (LoadedVT == MVT::f64) > + if (LoadedVT == MVT::v8i16 || LoadedVT == MVT::v4i32 || > + LoadedVT == MVT::v2i64 || LoadedVT == MVT::v2f64 || > + LoadedVT == MVT::v4f32 || LoadedVT == MVT::v16i8 || > + LoadedVT == MVT::ppcf128) > + intVT = MVT::i128; > + else if (LoadedVT == MVT::f64 || > + LoadedVT == MVT::v8i8 || LoadedVT == MVT::v4i16 || > + LoadedVT == MVT::v2i32 || LoadedVT == MVT::v1i64 || > + LoadedVT == MVT::v2f32) > intVT = MVT::i64; > else if (LoadedVT == MVT::f32) > intVT = MVT::i32; > else > - assert(0 && "Unaligned load of unsupported floating point type"); > + assert(0 && "Unaligned load of unsupported type"); Likewise. Ciao, Duncan. From baldrick at free.fr Thu Feb 28 01:08:37 2008 From: baldrick at free.fr (Duncan Sands) Date: Thu, 28 Feb 2008 08:08:37 +0100 Subject: [llvm-commits] [llvm] r47699 - in /llvm/trunk: include/llvm/Target/TargetAsmInfo.h lib/Target/TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.h In-Reply-To: <200802272333.m1RNXoCW010566@zion.cs.uiuc.edu> References: <200802272333.m1RNXoCW010566@zion.cs.uiuc.edu> Message-ID: <200802280808.37451.baldrick@free.fr> Hi Anton, > + /// PreferredEHDataFormat - This hook allows the target to select data > + /// format used for encoding pointers in exception handling data. Reason is > + /// 0 for data, 1 for code labels, 2 for function pointers. Global is true > + /// if the symbol can be relocated. > + virtual unsigned PreferredEHDataFormat(unsigned Reason, bool Global) const; how about using an enum for Reason? Ciao, Duncan. From evan.cheng at apple.com Thu Feb 28 01:40:24 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 28 Feb 2008 07:40:24 -0000 Subject: [llvm-commits] [llvm] r47710 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Message-ID: <200802280740.m1S7ePnq027190@zion.cs.uiuc.edu> Author: evancheng Date: Thu Feb 28 01:40:24 2008 New Revision: 47710 URL: http://llvm.org/viewvc/llvm-project?rev=47710&view=rev Log: Keep track how many commutes are performed by the scheduler. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=47710&r1=47709&r2=47710&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Thu Feb 28 01:40:24 2008 @@ -24,10 +24,13 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetLowering.h" +#include "llvm/ADT/Statistic.h" #include "llvm/Support/Debug.h" #include "llvm/Support/MathExtras.h" using namespace llvm; +STATISTIC(NumCommutes, "Number of instructions commuted"); + ScheduleDAG::ScheduleDAG(SelectionDAG &dag, MachineBasicBlock *bb, const TargetMachine &tm) : DAG(dag), BB(bb), TM(tm), RegInfo(BB->getParent()->getRegInfo()) { @@ -733,6 +736,7 @@ delete MI; MI = NewMI; } + ++NumCommutes; } } From evan.cheng at apple.com Thu Feb 28 01:46:38 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 28 Feb 2008 07:46:38 -0000 Subject: [llvm-commits] [llvm] r47711 - in /llvm/trunk: lib/Target/X86/X86ISelDAGToDAG.cpp test/CodeGen/X86/test-nofold.ll Message-ID: <200802280746.m1S7kcNJ027370@zion.cs.uiuc.edu> Author: evancheng Date: Thu Feb 28 01:46:38 2008 New Revision: 47711 URL: http://llvm.org/viewvc/llvm-project?rev=47711&view=rev Log: Set to default: x86 no longer fold and into test if it has more than one use. Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp llvm/trunk/test/CodeGen/X86/test-nofold.ll Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=47711&r1=47710&r2=47711&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Thu Feb 28 01:46:38 2008 @@ -48,7 +48,7 @@ static cl::opt AlwaysFoldAndInTest("always-fold-and-in-test", cl::desc("Always fold and operation in test"), - cl::init(true), cl::Hidden); + cl::init(false), cl::Hidden); } //===----------------------------------------------------------------------===// Modified: llvm/trunk/test/CodeGen/X86/test-nofold.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-nofold.ll?rev=47711&r1=47710&r2=47711&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/test-nofold.ll (original) +++ llvm/trunk/test/CodeGen/X86/test-nofold.ll Thu Feb 28 01:46:38 2008 @@ -1,6 +1,5 @@ ; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | grep {testl.*%e.x.*%e.x} ; rdar://5752025 -; XFAIL: * ; We don't want to fold the and into the test, because the and clobbers its ; input forcing a copy. We want: From ggreif at gmail.com Thu Feb 28 02:38:46 2008 From: ggreif at gmail.com (Gabor Greif) Date: Thu, 28 Feb 2008 08:38:46 -0000 Subject: [llvm-commits] [llvm] r47712 - in /llvm/trunk: lib/Analysis/AliasAnalysisEvaluator.cpp test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll Message-ID: <200802280838.m1S8ckMs000968@zion.cs.uiuc.edu> Author: ggreif Date: Thu Feb 28 02:38:45 2008 New Revision: 47712 URL: http://llvm.org/viewvc/llvm-project?rev=47712&view=rev Log: Fix http://llvm.org/bugs/show_bug.cgi?id=2104 by ordering lexicographically what gets printed. Be const-correct in PrintResults and uninline it too Modified: llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp llvm/trunk/test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll Modified: llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp?rev=47712&r1=47711&r2=47712&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp (original) +++ llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp Thu Feb 28 02:38:45 2008 @@ -31,6 +31,7 @@ #include "llvm/Support/Compiler.h" #include "llvm/Support/Streams.h" #include +#include using namespace llvm; namespace { @@ -80,12 +81,18 @@ FunctionPass *llvm::createAAEvalPass() { return new AAEval(); } -static inline void PrintResults(const char *Msg, bool P, Value *V1, Value *V2, - Module *M) { +static void PrintResults(const char *Msg, bool P, const Value *V1, const Value *V2, + const Module *M) { if (P) { - cerr << " " << Msg << ":\t"; - WriteAsOperand(*cerr.stream(), V1, true, M) << ", "; - WriteAsOperand(*cerr.stream(), V2, true, M) << "\n"; + std::stringstream s1, s2; + WriteAsOperand(s1, V1, true, M); + WriteAsOperand(s2, V2, true, M); + std::string o1(s1.str()), o2(s2.str()); + if (o2 < o1) + std::swap(o1, o2); + cerr << " " << Msg << ":\t" + << o1 << ", " + << o2 << "\n"; } } Modified: llvm/trunk/test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll?rev=47712&r1=47711&r2=47712&view=diff ============================================================================== --- llvm/trunk/test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll (original) +++ llvm/trunk/test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll Thu Feb 28 02:38:45 2008 @@ -1,6 +1,6 @@ ; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {9 no alias} ; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {6 may alias} -; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {MayAlias:.*i32\\* %Jpointer, i32\\* %Ipointer} +; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {MayAlias:.*i32\\* %Ipointer, i32\\* %Jpointer} define void @foo(i32* noalias %p, i32* noalias %q, i32 %i, i32 %j) { %Ipointer = getelementptr i32* %p, i32 %i From ggreif at gmail.com Thu Feb 28 05:48:19 2008 From: ggreif at gmail.com (Gabor Greif) Date: Thu, 28 Feb 2008 11:48:19 -0000 Subject: [llvm-commits] [llvm] r47715 - /llvm/trunk/Makefile Message-ID: <200802281148.m1SBmJ3d010478@zion.cs.uiuc.edu> Author: ggreif Date: Thu Feb 28 05:48:14 2008 New Revision: 47715 URL: http://llvm.org/viewvc/llvm-project?rev=47715&view=rev Log: Treat all targets serially at the toplevel. This allows to specify nice gmake --jobs all check and go to lunch, while a multiprocessor machine will build everything using spare resources and check the result thereafter. Since concurrency of make is not restricted in subdirectories, this should be a nearly optimal way to do it. Also teach the user about a configure switch. Modified: llvm/trunk/Makefile Modified: llvm/trunk/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile?rev=47715&r1=47714&r2=47715&view=diff ============================================================================== --- llvm/trunk/Makefile (original) +++ llvm/trunk/Makefile Thu Feb 28 05:48:14 2008 @@ -113,7 +113,8 @@ ifeq ($(BuildMode),Debug) $(Echo) '*****' Note: Debug build can be 10 times slower than an $(Echo) '*****' optimized build. Use 'make ENABLE_OPTIMIZED=1' to - $(Echo) '*****' make an optimized build. + $(Echo) '*****' make an optimized build. Alternatively you can + $(Echo) '*****' configure with --enable-optimized. endif check-llvm2cpp: @@ -143,3 +144,7 @@ .PHONY: srpm rpm +# declare all targets at this level to be serial: + +.NOTPARALLEL: + From ggreif at gmail.com Thu Feb 28 07:06:52 2008 From: ggreif at gmail.com (Gabor Greif) Date: Thu, 28 Feb 2008 13:06:52 -0000 Subject: [llvm-commits] [llvm] r47716 - /llvm/trunk/Makefile Message-ID: <200802281306.m1SD6qQt012651@zion.cs.uiuc.edu> Author: ggreif Date: Thu Feb 28 07:06:50 2008 New Revision: 47716 URL: http://llvm.org/viewvc/llvm-project?rev=47716&view=rev Log: Now that targets are serialized, introduce two new convenience targets: - update: svn update toplevel and try hard to locate updatable subdirectories using cunning tricks - happiness: update then build and test so what one wants to do now is: nice gmake --jobs happiness Have fun! Modified: llvm/trunk/Makefile Modified: llvm/trunk/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile?rev=47716&r1=47715&r2=47716&view=diff ============================================================================== --- llvm/trunk/Makefile (original) +++ llvm/trunk/Makefile Thu Feb 28 07:06:50 2008 @@ -142,7 +142,19 @@ fi $(Verb) $(MAKE) tools-only -.PHONY: srpm rpm + + +SVN = svn +AWK = awk +SUB-SVN-DIRS = $(AWK) '/\? / {print $$2}' | xargs $(SVN) info 2>/dev/null | grep "Path: " | $(AWK) '{print $$2}' + +update: + $(SVN) update + @ $(SVN) status | $(SUB-SVN-DIRS) | xargs $(SVN) update + +happiness: update all check + +.PHONY: srpm rpm update happiness # declare all targets at this level to be serial: From romix.llvm at googlemail.com Thu Feb 28 08:15:44 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Thu, 28 Feb 2008 15:15:44 +0100 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations Message-ID: Hi, I've implemented some improvements related to the computation of heights, depths and priorities and latencies of SUnits. The basic idea is that all these algorithms are computing the longest paths from the root node or to the exit node. Therefore I changed the existing implementation that uses and iterative and potentially exponential algorithm to a well-known graph algorithm based on dynamic programming. It has a linear run-time. Tests on very big input files with tens of thousends of instructions in a BB, e.g. big4.bc use-case from Duraid's testsuit, indicate huge speed-ups (up to 2x) compared to the current version, Please review and tell if it is OK for submission. - Roman -------------- next part -------------- A non-text attachment was scrubbed... Name: ScheduleDAG.patch Type: text/x-diff Size: 7615 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080228/1db8a052/attachment.bin From ggreif at gmail.com Thu Feb 28 08:58:14 2008 From: ggreif at gmail.com (Gabor Greif) Date: Thu, 28 Feb 2008 14:58:14 -0000 Subject: [llvm-commits] [llvm] r47717 - /llvm/trunk/Makefile Message-ID: <200802281458.m1SEwFb5015682@zion.cs.uiuc.edu> Author: ggreif Date: Thu Feb 28 08:58:14 2008 New Revision: 47717 URL: http://llvm.org/viewvc/llvm-project?rev=47717&view=rev Log: Simplify and clean up "update" target. Also add an SVN-UPDATE-OPTIONS variable that controls the update behaviour. This allows to go to a common older revision of all svn directories: gmake update SVN-UPDATE-OPTIONS=-r47717 would rewind both llvm and clang to a common revision (if clang is checked out into the llvm tree). Modified: llvm/trunk/Makefile Modified: llvm/trunk/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile?rev=47717&r1=47716&r2=47717&view=diff ============================================================================== --- llvm/trunk/Makefile (original) +++ llvm/trunk/Makefile Thu Feb 28 08:58:14 2008 @@ -142,15 +142,16 @@ fi $(Verb) $(MAKE) tools-only - - SVN = svn +SVN-UPDATE-OPTIONS = AWK = awk -SUB-SVN-DIRS = $(AWK) '/\? / {print $$2}' | xargs $(SVN) info 2>/dev/null | grep "Path: " | $(AWK) '{print $$2}' +SUB-SVN-DIRS = $(AWK) '/? / {print $$2}' \ + | xargs $(SVN) info 2>/dev/null \ + | $(AWK) '/Path: / {print $$2}' update: - $(SVN) update - @ $(SVN) status | $(SUB-SVN-DIRS) | xargs $(SVN) update + $(SVN) $(SVN-UPDATE-OPTIONS) update + @ $(SVN) status | $(SUB-SVN-DIRS) | xargs $(SVN) $(SVN-UPDATE-OPTIONS) update happiness: update all check From baldrick at free.fr Thu Feb 28 09:05:21 2008 From: baldrick at free.fr (Duncan Sands) Date: Thu, 28 Feb 2008 16:05:21 +0100 Subject: [llvm-commits] [llvm] r47717 - /llvm/trunk/Makefile In-Reply-To: <200802281458.m1SEwFb5015682@zion.cs.uiuc.edu> References: <200802281458.m1SEwFb5015682@zion.cs.uiuc.edu> Message-ID: <200802281605.22113.baldrick@free.fr> Is 'awk' universally available on peoples machines? Ciao, Duncan. From baldrick at free.fr Thu Feb 28 11:12:11 2008 From: baldrick at free.fr (Duncan Sands) Date: Thu, 28 Feb 2008 17:12:11 -0000 Subject: [llvm-commits] [llvm] r47719 - /llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Message-ID: <200802281712.m1SHCCkd026737@zion.cs.uiuc.edu> Author: baldrick Date: Thu Feb 28 11:12:11 2008 New Revision: 47719 URL: http://llvm.org/viewvc/llvm-project?rev=47719&view=rev Log: Document that the shuffle mask may contain undef values. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=47719&r1=47718&r2=47719&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Thu Feb 28 11:12:11 2008 @@ -301,16 +301,16 @@ /// vector value) starting with the (potentially variable) element number /// IDX, which must be a multiple of the result vector length. EXTRACT_SUBVECTOR, - + /// VECTOR_SHUFFLE(VEC1, VEC2, SHUFFLEVEC) - Returns a vector, of the same /// type as VEC1/VEC2. SHUFFLEVEC is a BUILD_VECTOR of constant int values - /// (regardless of whether its datatype is legal or not) that indicate - /// which value each result element will get. The elements of VEC1/VEC2 are - /// enumerated in order. This is quite similar to the Altivec 'vperm' - /// instruction, except that the indices must be constants and are in terms - /// of the element size of VEC1/VEC2, not in terms of bytes. + /// (maybe of an illegal datatype) or undef that indicate which value each + /// result element will get. The elements of VEC1/VEC2 are enumerated in + /// order. This is quite similar to the Altivec 'vperm' instruction, except + /// that the indices must be constants and are in terms of the element size + /// of VEC1/VEC2, not in terms of bytes. VECTOR_SHUFFLE, - + /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a /// scalar value into element 0 of the resultant vector type. The top /// elements 1 to N-1 of the N-element vector are undefined. From sabre at nondot.org Thu Feb 28 11:21:27 2008 From: sabre at nondot.org (Chris Lattner) Date: Thu, 28 Feb 2008 17:21:27 -0000 Subject: [llvm-commits] [llvm] r47720 - /llvm/trunk/lib/Target/README.txt Message-ID: <200802281721.m1SHLSXP026983@zion.cs.uiuc.edu> Author: lattner Date: Thu Feb 28 11:21:27 2008 New Revision: 47720 URL: http://llvm.org/viewvc/llvm-project?rev=47720&view=rev Log: add a note Modified: llvm/trunk/lib/Target/README.txt Modified: llvm/trunk/lib/Target/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=47720&r1=47719&r2=47720&view=diff ============================================================================== --- llvm/trunk/lib/Target/README.txt (original) +++ llvm/trunk/lib/Target/README.txt Thu Feb 28 11:21:27 2008 @@ -631,6 +631,25 @@ //===---------------------------------------------------------------------===// +This GCC bug: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=34043 +contains a testcase that compiles down to: + + %struct.XMM128 = type { <4 x float> } +.. + %src = alloca %struct.XMM128 +.. + %tmp6263 = bitcast %struct.XMM128* %src to <2 x i64>* + %tmp65 = getelementptr %struct.XMM128* %src, i32 0, i32 0 + store <2 x i64> %tmp5899, <2 x i64>* %tmp6263, align 16 + %tmp66 = load <4 x float>* %tmp65, align 16 + %tmp71 = add <4 x float> %tmp66, %tmp66 + +If the mid-level optimizer turned the bitcast of pointer + store of tmp5899 +into a bitcast of the vector value and a store to the pointer, then the +store->load could be easily removed. + +//===---------------------------------------------------------------------===// + Consider: int test() { From clattner at apple.com Thu Feb 28 11:28:18 2008 From: clattner at apple.com (Chris Lattner) Date: Thu, 28 Feb 2008 09:28:18 -0800 Subject: [llvm-commits] [llvm] r47711 - in /llvm/trunk: lib/Target/X86/X86ISelDAGToDAG.cpp test/CodeGen/X86/test-nofold.ll In-Reply-To: <200802280746.m1S7kcNJ027370@zion.cs.uiuc.edu> References: <200802280746.m1S7kcNJ027370@zion.cs.uiuc.edu> Message-ID: <798245DF-92A1-4166-BD98-5A709B7B39C5@apple.com> On Feb 27, 2008, at 11:46 PM, Evan Cheng wrote: > Author: evancheng > Date: Thu Feb 28 01:46:38 2008 > New Revision: 47711 > > URL: http://llvm.org/viewvc/llvm-project?rev=47711&view=rev > Log: > Set to default: x86 no longer fold and into test if it has more than > one use. Yay. Should the AlwaysFoldAndInTest option be removed? -Chris > > > Modified: > llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp > llvm/trunk/test/CodeGen/X86/test-nofold.ll > > Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=47711&r1=47710&r2=47711&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Thu Feb 28 > 01:46:38 2008 > @@ -48,7 +48,7 @@ > static cl::opt > AlwaysFoldAndInTest("always-fold-and-in-test", > cl::desc("Always fold and operation in test"), > - cl::init(true), cl::Hidden); > + cl::init(false), cl::Hidden); > } > > // > = > = > = > ----------------------------------------------------------------------= > ==// > > Modified: llvm/trunk/test/CodeGen/X86/test-nofold.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-nofold.ll?rev=47711&r1=47710&r2=47711&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/test/CodeGen/X86/test-nofold.ll (original) > +++ llvm/trunk/test/CodeGen/X86/test-nofold.ll Thu Feb 28 01:46:38 > 2008 > @@ -1,6 +1,5 @@ > ; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | grep {testl.* > %e.x.*%e.x} > ; rdar://5752025 > -; XFAIL: * > > ; We don't want to fold the and into the test, because the and > clobbers its > ; input forcing a copy. We want: > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dalej at apple.com Thu Feb 28 11:37:39 2008 From: dalej at apple.com (Dale Johannesen) Date: Thu, 28 Feb 2008 09:37:39 -0800 Subject: [llvm-commits] [llvm] r47717 - /llvm/trunk/Makefile In-Reply-To: <200802281605.22113.baldrick@free.fr> References: <200802281458.m1SEwFb5015682@zion.cs.uiuc.edu> <200802281605.22113.baldrick@free.fr> Message-ID: On Feb 28, 2008, at 7:05 AM, Duncan Sands wrote: > Is 'awk' universally available on peoples machines? There are awk sources in gcc, so any environment that can build gcc should have it. From sabre at nondot.org Thu Feb 28 11:57:22 2008 From: sabre at nondot.org (Chris Lattner) Date: Thu, 28 Feb 2008 17:57:22 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47721 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Message-ID: <200802281757.m1SHvMIo028107@zion.cs.uiuc.edu> Author: lattner Date: Thu Feb 28 11:57:22 2008 New Revision: 47721 URL: http://llvm.org/viewvc/llvm-project?rev=47721&view=rev Log: Fix a crash when the valuename is null, which happens when there is no name. This fixes PR1480 Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=47721&r1=47720&r2=47721&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Thu Feb 28 11:57:22 2008 @@ -1308,8 +1308,10 @@ /// llvm_get_decl_name - Used by varasm.c, returns the specified declaration's /// name. const char *llvm_get_decl_name(void *LLVM) { - if (LLVM == 0) return ""; - return ((Value*)LLVM)->getValueName()->getKeyData(); + if (LLVM) + if (const ValueName *VN = ((Value*)LLVM)->getValueName()) + return VN->getKeyData(); + return ""; } // llvm_mark_decl_weak - Used by varasm.c, called when a decl is found to be From dpatel at apple.com Thu Feb 28 12:26:54 2008 From: dpatel at apple.com (Devang Patel) Date: Thu, 28 Feb 2008 10:26:54 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r47721 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp In-Reply-To: <200802281757.m1SHvMIo028107@zion.cs.uiuc.edu> References: <200802281757.m1SHvMIo028107@zion.cs.uiuc.edu> Message-ID: <2CEAE537-D9DF-4DC1-BBCD-4DD684BFA823@apple.com> On Feb 28, 2008, at 9:57 AM, Chris Lattner wrote: > Author: lattner > Date: Thu Feb 28 11:57:22 2008 > New Revision: 47721 > > URL: http://llvm.org/viewvc/llvm-project?rev=47721&view=rev > Log: > Fix a crash when the valuename is null, which happens when > there is no name. This fixes PR1480 PR2111 - Devang From clattner at apple.com Thu Feb 28 12:28:49 2008 From: clattner at apple.com (Chris Lattner) Date: Thu, 28 Feb 2008 10:28:49 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r47721 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp In-Reply-To: <2CEAE537-D9DF-4DC1-BBCD-4DD684BFA823@apple.com> References: <200802281757.m1SHvMIo028107@zion.cs.uiuc.edu> <2CEAE537-D9DF-4DC1-BBCD-4DD684BFA823@apple.com> Message-ID: On Feb 28, 2008, at 10:26 AM, Devang Patel wrote: > > On Feb 28, 2008, at 9:57 AM, Chris Lattner wrote: > >> Author: lattner >> Date: Thu Feb 28 11:57:22 2008 >> New Revision: 47721 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=47721&view=rev >> Log: >> Fix a crash when the valuename is null, which happens when >> there is no name. This fixes PR1480 > > PR2111 Err right, thanks :) -Chris From dalej at apple.com Thu Feb 28 12:33:11 2008 From: dalej at apple.com (Dale Johannesen) Date: Thu, 28 Feb 2008 10:33:11 -0800 Subject: [llvm-commits] [llvm] r47696 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp In-Reply-To: <200802280806.12584.baldrick@free.fr> References: <200802272236.m1RMa0i6008747@zion.cs.uiuc.edu> <200802280806.12584.baldrick@free.fr> Message-ID: On Feb 27, 2008, at 11:06 PM, Duncan Sands wrote: > Hi Dale, > >> - if (VT==MVT::f64) >> + if (VT == MVT::v8i16 || VT == MVT::v4i32 || >> + VT == MVT::v2i64 || VT == MVT::v2f64 || >> + VT == MVT::v4f32 || VT == MVT::v16i8 || >> + VT == MVT::ppcf128) >> + intVT = MVT::i128; >> + else if (VT==MVT::f64 || >> + VT == MVT::v8i8 || VT == MVT::v4i16 || >> + VT == MVT::v2i32 || VT == MVT::v1i64 || >> + VT == MVT::v2f32) >> intVT = MVT::i64; >> else if (VT==MVT::f32) >> intVT = MVT::i32; >> else >> - assert(0 && "Unaligned load of unsupported floating point >> type"); >> + assert(0 && "Unaligned load of unsupported type"); > > how about replacing all that with: > IntVT = MVT::getIntegerType(MVT::getSizeInBits(VT)); I don't believe the algorithm works for the 80 and 96 bit basic types. "Unaligned load of unsupported type" seems like a good answer for them. > You might want to check that the integer type is not an extended > value type. > >> - if (LoadedVT == MVT::f64) >> + if (LoadedVT == MVT::v8i16 || LoadedVT == MVT::v4i32 || >> + LoadedVT == MVT::v2i64 || LoadedVT == MVT::v2f64 || >> + LoadedVT == MVT::v4f32 || LoadedVT == MVT::v16i8 || >> + LoadedVT == MVT::ppcf128) >> + intVT = MVT::i128; >> + else if (LoadedVT == MVT::f64 || >> + LoadedVT == MVT::v8i8 || LoadedVT == MVT::v4i16 || >> + LoadedVT == MVT::v2i32 || LoadedVT == MVT::v1i64 || >> + LoadedVT == MVT::v2f32) >> intVT = MVT::i64; >> else if (LoadedVT == MVT::f32) >> intVT = MVT::i32; >> else >> - assert(0 && "Unaligned load of unsupported floating point >> type"); >> + assert(0 && "Unaligned load of unsupported type"); > > Likewise. > > Ciao, > > Duncan. From dalej at apple.com Thu Feb 28 12:36:51 2008 From: dalej at apple.com (Dale Johannesen) Date: Thu, 28 Feb 2008 18:36:51 -0000 Subject: [llvm-commits] [llvm] r47722 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200802281836.m1SIapC5029374@zion.cs.uiuc.edu> Author: johannes Date: Thu Feb 28 12:36:51 2008 New Revision: 47722 URL: http://llvm.org/viewvc/llvm-project?rev=47722&view=rev Log: Fix an assertion message. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47722&r1=47721&r2=47722&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Feb 28 12:36:51 2008 @@ -587,7 +587,7 @@ else if (VT==MVT::f32) intVT = MVT::i32; else - assert(0 && "Unaligned load of unsupported type"); + assert(0 && "Unaligned store of unsupported type"); SDOperand Result = DAG.getNode(ISD::BIT_CONVERT, intVT, Val); return DAG.getStore(Chain, Result, Ptr, ST->getSrcValue(), From lauro.venancio at gmail.com Thu Feb 28 12:45:49 2008 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Thu, 28 Feb 2008 15:45:49 -0300 Subject: [llvm-commits] [llvm] r47703 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Targe Message-ID: <9c10c9f0802281045x4f0e285awf0b39d818ee122bc@mail.gmail.com> Hi Evan, This patch caused many regressions. See http://lists.cs.uiuc.edu/pipermail/llvm-testresults/2008-February/008336.html Lauro 2008/2/27, Evan Cheng : > Author: evancheng > Date: Wed Feb 27 18:43:03 2008 > New Revision: 47703 > > URL: http://llvm.org/viewvc/llvm-project?rev=47703&view=rev > Log: > Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries. > > Added: > llvm/trunk/lib/CodeGen/LoopAligner.cpp > Modified: > llvm/trunk/include/llvm/CodeGen/AsmPrinter.h > llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h > llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h > llvm/trunk/include/llvm/CodeGen/Passes.h > llvm/trunk/include/llvm/Target/TargetAsmInfo.h > llvm/trunk/include/llvm/Target/TargetLowering.h > llvm/trunk/lib/CodeGen/AsmPrinter.cpp > llvm/trunk/lib/CodeGen/BranchFolding.cpp > llvm/trunk/lib/CodeGen/IfConversion.cpp > llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp > llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp > llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp > llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp > llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp > llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp > llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp > llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp > llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp > llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp > llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp > llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp > llvm/trunk/lib/Target/X86/X86TargetMachine.cpp > llvm/trunk/lib/Target/X86/X86TargetMachine.h > > Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) > +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Wed Feb 27 18:43:03 2008 > @@ -78,6 +78,10 @@ > /// CurrentSection - The current section we are emitting to. This is > /// controlled and used by the SwitchSection method. > std::string CurrentSection; > + > + /// IsInTextSection - True if the current section we are emitting to is a > + /// text section. > + bool IsInTextSection; > > protected: > AsmPrinter(std::ostream &o, TargetMachine &TM, const TargetAsmInfo *T); > @@ -269,9 +273,7 @@ > /// an explicit alignment requested, it will unconditionally override the > /// alignment request. However, if ForcedAlignBits is specified, this value > /// has final say: the ultimate alignment will be the max of ForcedAlignBits > - /// and the alignment computed with NumBits and the global. If UseFillExpr > - /// is true, it also emits an optional second value FillValue which the > - /// assembler uses to fill gaps to match alignment. > + /// and the alignment computed with NumBits and the global > /// > /// The algorithm is: > /// Align = NumBits; > @@ -279,8 +281,7 @@ > /// Align = std::max(Align, ForcedAlignBits); > /// > void EmitAlignment(unsigned NumBits, const GlobalValue *GV = 0, > - unsigned ForcedAlignBits = 0, bool UseFillExpr = false, > - unsigned FillValue = 0) const; > + unsigned ForcedAlignBits = 0) const; > > /// printLabel - This method prints a local label used by debug and > /// exception handling tables. > @@ -317,6 +318,7 @@ > /// printBasicBlockLabel - This method prints the label for the specified > /// MachineBasicBlock > virtual void printBasicBlockLabel(const MachineBasicBlock *MBB, > + bool printAlign = false, > bool printColon = false, > bool printComment = true) const; > > > Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original) > +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Wed Feb 27 18:43:03 2008 > @@ -75,6 +75,10 @@ > /// LiveIns - Keep track of the physical registers that are livein of > /// the basicblock. > std::vector LiveIns; > + > + /// Alignment - Alignment of the basic block. Zero if the basic block does > + /// not need to be aligned. > + unsigned Alignment; > > /// IsLandingPad - Indicate that this basic block is entered via an > /// exception handler. > @@ -82,7 +86,8 @@ > > public: > explicit MachineBasicBlock(const BasicBlock *bb = 0) > - : Prev(0), Next(0), BB(bb), Number(-1), xParent(0), IsLandingPad(false) { > + : Prev(0), Next(0), BB(bb), Number(-1), xParent(0), > + Alignment(0), IsLandingPad(false) { > Insts.parent = this; > } > > @@ -181,6 +186,14 @@ > const_livein_iterator livein_end() const { return LiveIns.end(); } > bool livein_empty() const { return LiveIns.empty(); } > > + /// getAlignment - Return alignment of the basic block. > + /// > + unsigned getAlignment() const { return Alignment; } > + > + /// setAlignment - Set alignment of the basic block. > + /// > + void setAlignment(unsigned Align) { Alignment = Align; } > + > /// isLandingPad - Returns true if the block is a landing pad. That is > /// this basic block is entered via an exception handler. > bool isLandingPad() const { return IsLandingPad; } > > Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original) > +++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Wed Feb 27 18:43:03 2008 > @@ -204,7 +204,7 @@ > } > > /// getObjectAlignment - Return the alignment of the specified stack object... > - int getObjectAlignment(int ObjectIdx) const { > + unsigned getObjectAlignment(int ObjectIdx) const { > assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() && > "Invalid Object Idx!"); > return Objects[ObjectIdx+NumFixedObjects].Alignment; > > Modified: llvm/trunk/include/llvm/CodeGen/Passes.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/include/llvm/CodeGen/Passes.h (original) > +++ llvm/trunk/include/llvm/CodeGen/Passes.h Wed Feb 27 18:43:03 2008 > @@ -129,6 +129,10 @@ > /// IfConverter Pass - This pass performs machine code if conversion. > FunctionPass *createIfConverterPass(); > > + /// LoopAligner Pass - This pass aligns loop headers to target specific > + /// alignment boundary. > + FunctionPass *createLoopAlignerPass(); > + > /// DebugLabelFoldingPass - This pass prunes out redundant debug labels. This > /// allows a debug emitter to determine if the range of two labels is empty, > /// by seeing if the labels map to the same reduced label. > > Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original) > +++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Feb 27 18:43:03 2008 > @@ -164,6 +164,10 @@ > /// boundary. > bool AlignmentIsInBytes; // Defaults to true > > + /// TextAlignFillValue - If non-zero, this is used to fill the executable > + /// space created as the result of a alignment directive. > + unsigned TextAlignFillValue; > + > //===--- Section Switching Directives ---------------------------------===// > > /// SwitchToSectionDirective - This is the directive used when we want to > @@ -503,6 +507,9 @@ > bool getAlignmentIsInBytes() const { > return AlignmentIsInBytes; > } > + unsigned getTextAlignFillValue() const { > + return TextAlignFillValue; > + } > const char *getSwitchToSectionDirective() const { > return SwitchToSectionDirective; > } > > Modified: llvm/trunk/include/llvm/Target/TargetLowering.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) > +++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Feb 27 18:43:03 2008 > @@ -548,17 +548,23 @@ > > /// getIfCvtBlockLimit - returns the target specific if-conversion block size > /// limit. Any block whose size is greater should not be predicated. > - virtual unsigned getIfCvtBlockSizeLimit() const { > + unsigned getIfCvtBlockSizeLimit() const { > return IfCvtBlockSizeLimit; > } > > /// getIfCvtDupBlockLimit - returns the target specific size limit for a > /// block to be considered for duplication. Any block whose size is greater > /// should not be duplicated to facilitate its predication. > - virtual unsigned getIfCvtDupBlockSizeLimit() const { > + unsigned getIfCvtDupBlockSizeLimit() const { > return IfCvtDupBlockSizeLimit; > } > > + /// getPrefLoopAlignment - return the preferred loop alignment. > + /// > + unsigned getPrefLoopAlignment() const { > + return PrefLoopAlignment; > + } > + > /// getPreIndexedAddressParts - returns true by value, base pointer and > /// offset pointer and addressing mode by reference if the node's address > /// can be legally represented as pre-indexed load / store address. > @@ -583,7 +589,7 @@ > /// jumptable. > virtual SDOperand getPICJumpTableRelocBase(SDOperand Table, > SelectionDAG &DAG) const; > - > + > //===--------------------------------------------------------------------===// > // TargetLowering Optimization Methods > // > @@ -890,6 +896,12 @@ > void setIfCvtDupBlockSizeLimit(unsigned Limit) { > IfCvtDupBlockSizeLimit = Limit; > } > + > + /// setPrefLoopAlignment - Set the target's preferred loop alignment. Default > + /// alignment is zero, it means the target does not care about loop alignment. > + void setPrefLoopAlignment(unsigned Align) { > + PrefLoopAlignment = Align; > + } > > public: > > @@ -1276,6 +1288,10 @@ > /// duplicated during if-conversion. > unsigned IfCvtDupBlockSizeLimit; > > + /// PrefLoopAlignment - The perferred loop alignment. > + /// > + unsigned PrefLoopAlignment; > + > /// StackPointerRegisterToSaveRestore - If set to a physical register, this > /// specifies the register that llvm.savestack/llvm.restorestack should save > /// and restore. > > Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/CodeGen/AsmPrinter.cpp (original) > +++ llvm/trunk/lib/CodeGen/AsmPrinter.cpp Wed Feb 27 18:43:03 2008 > @@ -39,7 +39,8 @@ > char AsmPrinter::ID = 0; > AsmPrinter::AsmPrinter(std::ostream &o, TargetMachine &tm, > const TargetAsmInfo *T) > - : MachineFunctionPass((intptr_t)&ID), FunctionNumber(0), O(o), TM(tm), TAI(T) > + : MachineFunctionPass((intptr_t)&ID), FunctionNumber(0), O(o), TM(tm), TAI(T), > + IsInTextSection(false) > {} > > std::string AsmPrinter::getSectionForFunction(const Function &F) const { > @@ -69,6 +70,8 @@ > > if (!CurrentSection.empty()) > O << CurrentSection << TAI->getTextSectionStartSuffix() << '\n'; > + > + IsInTextSection = true; > } > > /// SwitchToDataSection - Switch to the specified data section of the executable > @@ -93,6 +96,8 @@ > > if (!CurrentSection.empty()) > O << CurrentSection << TAI->getDataSectionStartSuffix() << '\n'; > + > + IsInTextSection = false; > } > > > @@ -344,7 +349,7 @@ > O << TAI->getPrivateGlobalPrefix() << getFunctionNumber() > << '_' << uid << "_set_" << MBB->getNumber(); > } else { > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > // If the arch uses custom Jump Table directives, don't calc relative to > // JT > if (!HadJTEntryDirective) > @@ -352,7 +357,7 @@ > << getFunctionNumber() << '_' << uid; > } > } else { > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > } > } > > @@ -679,8 +684,7 @@ > // Align = std::max(Align, ForcedAlignBits); > // > void AsmPrinter::EmitAlignment(unsigned NumBits, const GlobalValue *GV, > - unsigned ForcedAlignBits, bool UseFillExpr, > - unsigned FillValue) const { > + unsigned ForcedAlignBits) const { > if (GV && GV->getAlignment()) > NumBits = Log2_32(GV->getAlignment()); > NumBits = std::max(NumBits, ForcedAlignBits); > @@ -688,6 +692,9 @@ > if (NumBits == 0) return; // No need to emit alignment. > if (TAI->getAlignmentIsInBytes()) NumBits = 1 << NumBits; > O << TAI->getAlignDirective() << NumBits; > + > + unsigned FillValue = TAI->getTextAlignFillValue(); > + bool UseFillExpr = IsInTextSection && FillValue; > if (UseFillExpr) O << ",0x" << std::hex << FillValue << std::dec; > O << "\n"; > } > @@ -1252,7 +1259,7 @@ > > if (Modifier[0]=='l') // labels are target independent > printBasicBlockLabel(MI->getOperand(OpNo).getMBB(), > - false, false); > + false, false, false); > else { > AsmPrinter *AP = const_cast(this); > if ((OpFlags & 7) == 4 /*ADDR MODE*/) { > @@ -1318,8 +1325,15 @@ > /// printBasicBlockLabel - This method prints the label for the specified > /// MachineBasicBlock > void AsmPrinter::printBasicBlockLabel(const MachineBasicBlock *MBB, > + bool printAlign, > bool printColon, > bool printComment) const { > + if (printAlign) { > + unsigned Align = MBB->getAlignment(); > + if (Align) > + EmitAlignment(Log2_32(Align)); > + } > + > O << TAI->getPrivateGlobalPrefix() << "BB" << getFunctionNumber() << "_" > << MBB->getNumber(); > if (printColon) > @@ -1338,7 +1352,7 @@ > > O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() > << getFunctionNumber() << '_' << uid << "_set_" << MBB->getNumber() << ','; > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() > << '_' << uid << '\n'; > } > @@ -1351,7 +1365,7 @@ > O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() > << getFunctionNumber() << '_' << uid << '_' << uid2 > << "_set_" << MBB->getNumber() << ','; > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() > << '_' << uid << '_' << uid2 << '\n'; > } > > Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original) > +++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Wed Feb 27 18:43:03 2008 > @@ -44,7 +44,7 @@ > cl::desc("Max number of predecessors to consider tail merging"), > cl::init(100), cl::Hidden); > > - struct BranchFolder : public MachineFunctionPass { > + struct VISIBILITY_HIDDEN BranchFolder : public MachineFunctionPass { > static char ID; > explicit BranchFolder(bool defaultEnableTailMerge) : > MachineFunctionPass((intptr_t)&ID) { > > Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/CodeGen/IfConversion.cpp (original) > +++ llvm/trunk/lib/CodeGen/IfConversion.cpp Wed Feb 27 18:43:03 2008 > @@ -56,7 +56,7 @@ > STATISTIC(NumDupBBs, "Number of duplicated blocks"); > > namespace { > - class IfConverter : public MachineFunctionPass { > + class VISIBILITY_HIDDEN IfConverter : public MachineFunctionPass { > enum IfcvtKind { > ICNotClassfied, // BB data valid, but not classified. > ICSimpleFalse, // Same as ICSimple, but on the false path. > > Added: llvm/trunk/lib/CodeGen/LoopAligner.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LoopAligner.cpp?rev=47703&view=auto > > ============================================================================== > --- llvm/trunk/lib/CodeGen/LoopAligner.cpp (added) > +++ llvm/trunk/lib/CodeGen/LoopAligner.cpp Wed Feb 27 18:43:03 2008 > @@ -0,0 +1,65 @@ > +//===-- LoopAligner.cpp - Loop aligner pass. ------------------------------===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open Source > +// License. See LICENSE.TXT for details. > +// > +//===----------------------------------------------------------------------===// > +// > +// This file implements the pass that align loop headers to target specific > +// alignment boundary. > +// > +//===----------------------------------------------------------------------===// > + > +#define DEBUG_TYPE "loopalign" > +#include "llvm/CodeGen/MachineLoopInfo.h" > +#include "llvm/CodeGen/MachineFunctionPass.h" > +#include "llvm/CodeGen/Passes.h" > +#include "llvm/Target/TargetLowering.h" > +#include "llvm/Target/TargetMachine.h" > +#include "llvm/Support/Compiler.h" > +#include "llvm/Support/Debug.h" > +using namespace llvm; > + > +namespace { > + class LoopAligner : public MachineFunctionPass { > + const TargetLowering *TLI; > + > + public: > + static char ID; > + LoopAligner() : MachineFunctionPass((intptr_t)&ID) {} > + > + virtual bool runOnMachineFunction(MachineFunction &MF); > + virtual const char *getPassName() const { return "Loop aligner"; } > + > + virtual void getAnalysisUsage(AnalysisUsage &AU) const { > + AU.addRequired(); > + AU.addPreserved(); > + MachineFunctionPass::getAnalysisUsage(AU); > + } > + }; > + > + char LoopAligner::ID = 0; > +} // end anonymous namespace > + > +FunctionPass *llvm::createLoopAlignerPass() { return new LoopAligner(); } > + > +bool LoopAligner::runOnMachineFunction(MachineFunction &MF) { > + const MachineLoopInfo *MLI = &getAnalysis(); > + > + if (MLI->begin() == MLI->end()) > + return false; // No loops. > + > + unsigned Align = MF.getTarget().getTargetLowering()->getPrefLoopAlignment(); > + if (!Align) > + return false; // Don't care about loop alignment. > + > + for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { > + MachineBasicBlock *MBB = I; > + if (MLI->isLoopHeader(MBB)) > + MBB->setAlignment(Align); > + } > + > + return true; > +} > > Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original) > +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Wed Feb 27 18:43:03 2008 > @@ -166,6 +166,7 @@ > if (LBB) OS << LBB->getName() << ": "; > OS << (const void*)this > << ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber(); > + if (Alignment) OS << ", Alignment " << Alignment; > if (isLandingPad()) OS << ", EH LANDING PAD"; > OS << ":\n"; > > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Feb 27 18:43:03 2008 > @@ -206,6 +206,8 @@ > JumpBufSize = 0; > JumpBufAlignment = 0; > IfCvtBlockSizeLimit = 2; > + IfCvtDupBlockSizeLimit = 0; > + PrefLoopAlignment = 0; > > InitLibcallNames(LibcallRoutineNames); > InitCmpLibcallCCs(CmpLibcallCCs); > > Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Wed Feb 27 18:43:03 2008 > @@ -248,7 +248,7 @@ > I != E; ++I) { > // Print a label for the basic block. > if (I != MF.begin()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); > @@ -710,13 +710,13 @@ > << '_' << JTI << '_' << MO2.getImm() > << "_set_" << MBB->getNumber(); > else if (TM.getRelocationModel() == Reloc::PIC_) { > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > // If the arch uses custom Jump Table directives, don't calc relative to JT > if (!TAI->getJumpTableDirective()) > O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" > << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm(); > } else > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > if (i != e-1) > O << '\n'; > } > > Modified: llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp Wed Feb 27 18:43:03 2008 > @@ -171,7 +171,7 @@ > for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); > I != E; ++I) { > if (I != MF.begin()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); > > Modified: llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp Wed Feb 27 18:43:03 2008 > @@ -460,7 +460,7 @@ > I != E; ++I) { > // Print a label for the basic block. > if (I != MF.begin()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); > > Modified: llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp Wed Feb 27 18:43:03 2008 > @@ -149,7 +149,7 @@ > I != E; ++I) { > // Print a label for the basic block if there are any predecessors. > if (!I->pred_empty()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); > > Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Wed Feb 27 18:43:03 2008 > @@ -297,7 +297,7 @@ > > // Print a label for the basic block. > if (I != MF.begin()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > > > Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed Feb 27 18:43:03 2008 > @@ -604,7 +604,7 @@ > I != E; ++I) { > // Print a label for the basic block. > if (I != MF.begin()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); > @@ -838,7 +838,7 @@ > I != E; ++I) { > // Print a label for the basic block. > if (I != MF.begin()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), IE = I->end(); > > Modified: llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp Wed Feb 27 18:43:03 2008 > @@ -116,7 +116,7 @@ > I != E; ++I) { > // Print a label for the basic block. > if (I != MF.begin()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); > > Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Feb 27 18:43:03 2008 > @@ -101,36 +101,25 @@ > switch (F->getLinkage()) { > default: assert(0 && "Unknown linkage type!"); > case Function::InternalLinkage: // Symbols default to internal. > - if (Subtarget->isTargetDarwin()) > - // FIXME: This should be parameterized somewhere. > - EmitAlignment(4, F, 0, true, 0x90); > - else > - EmitAlignment(4, F); > + EmitAlignment(4, F); > break; > case Function::DLLExportLinkage: > DLLExportedFns.insert(Mang->makeNameProper(F->getName(), "")); > //FALLS THROUGH > case Function::ExternalLinkage: > - if (Subtarget->isTargetDarwin()) > - // FIXME: This should be parameterized somewhere. > - EmitAlignment(4, F, 0, true, 0x90); > - else > - EmitAlignment(4, F); > + EmitAlignment(4, F); > O << "\t.globl\t" << CurrentFnName << "\n"; > break; > case Function::LinkOnceLinkage: > case Function::WeakLinkage: > + EmitAlignment(4, F); > if (Subtarget->isTargetDarwin()) { > - // FIXME: This should be parameterized somewhere. > - EmitAlignment(4, F, 0, true, 0x90); > O << "\t.globl\t" << CurrentFnName << "\n"; > O << TAI->getWeakDefDirective() << CurrentFnName << "\n"; > } else if (Subtarget->isTargetCygMing()) { > - EmitAlignment(4, F); > O << "\t.globl\t" << CurrentFnName << "\n"; > O << "\t.linkonce discard\n"; > } else { > - EmitAlignment(4, F); > O << "\t.weak\t" << CurrentFnName << "\n"; > } > break; > @@ -180,7 +169,7 @@ > I != E; ++I) { > // Print a label for the basic block. > if (!I->pred_empty()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), IE = I->end(); > @@ -515,7 +504,7 @@ > > O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() > << getFunctionNumber() << '_' << uid << "_set_" << MBB->getNumber() << ','; > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > if (Subtarget->isPICStyleRIPRel()) > O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() > << '_' << uid << '\n'; > @@ -543,12 +532,12 @@ > O << TAI->getPrivateGlobalPrefix() << getFunctionNumber() > << '_' << uid << "_set_" << MBB->getNumber(); > } else if (Subtarget->isPICStyleGOT()) { > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > O << "@GOTOFF"; > } else > assert(0 && "Don't know how to print MBB label for this PIC mode"); > } else > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > } > > bool X86ATTAsmPrinter::printAsmMRegister(const MachineOperand &MO, > > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Feb 27 18:43:03 2008 > @@ -714,6 +714,7 @@ > maxStoresPerMemcpy = 16; // For %llvm.memcpy -> sequence of stores > maxStoresPerMemmove = 16; // For %llvm.memmove -> sequence of stores > allowUnalignedMemoryAccesses = true; // x86 supports it! > + setPrefLoopAlignment(16); > } > > /// getMaxByValAlign - Helper for getByValTypeAlignment to determine > > Modified: llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp Wed Feb 27 18:43:03 2008 > @@ -78,7 +78,7 @@ > I != E; ++I) { > // Print a label for the basic block if there are any predecessors. > if (!I->pred_empty()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); > @@ -242,7 +242,7 @@ > > O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() > << getFunctionNumber() << '_' << uid << "_set_" << MBB->getNumber() << ','; > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > O << '-' << "\"L" << getFunctionNumber() << "$pb\"'\n"; > } > > > Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Feb 27 18:43:03 2008 > @@ -47,6 +47,7 @@ > switch (Subtarget->TargetType) { > case X86Subtarget::isDarwin: > AlignmentIsInBytes = false; > + TextAlignFillValue = 0x90; > GlobalPrefix = "_"; > if (!Subtarget->is64Bit()) > Data64bitsDirective = 0; // we can't emit a 64-bit unit > > Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Wed Feb 27 18:43:03 2008 > @@ -164,6 +164,13 @@ > return true; // -print-machineinstr should print after this. > } > > +bool X86TargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) { > + if (Fast) return false; > + > + PM.add(createLoopAlignerPass()); > + return true; > +} > + > bool X86TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, > std::ostream &Out) { > PM.add(createX86CodePrinterPass(Out, *this)); > > Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=47703&r1=47702&r2=47703&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original) > +++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Wed Feb 27 18:43:03 2008 > @@ -63,6 +63,7 @@ > // Set up the pass pipeline. > virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); > virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast); > + virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast); > virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, > std::ostream &Out); > virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast, > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From ggreif at gmail.com Thu Feb 28 12:46:56 2008 From: ggreif at gmail.com (Gabor Greif) Date: Thu, 28 Feb 2008 18:46:56 -0000 Subject: [llvm-commits] [llvm] r47723 - /llvm/trunk/Makefile Message-ID: <200802281846.m1SIkukn029665@zion.cs.uiuc.edu> Author: ggreif Date: Thu Feb 28 12:46:56 2008 New Revision: 47723 URL: http://llvm.org/viewvc/llvm-project?rev=47723&view=rev Log: Run 'svn info' in the C locale. Also appropriately escape spaces and ? for gawk in darwin. Modified: llvm/trunk/Makefile Modified: llvm/trunk/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile?rev=47723&r1=47722&r2=47723&view=diff ============================================================================== --- llvm/trunk/Makefile (original) +++ llvm/trunk/Makefile Thu Feb 28 12:46:56 2008 @@ -145,9 +145,9 @@ SVN = svn SVN-UPDATE-OPTIONS = AWK = awk -SUB-SVN-DIRS = $(AWK) '/? / {print $$2}' \ - | xargs $(SVN) info 2>/dev/null \ - | $(AWK) '/Path: / {print $$2}' +SUB-SVN-DIRS = $(AWK) '/\?\ \ \ \ \ \ / {print $$2}' \ + | LANG=C xargs $(SVN) info 2>/dev/null \ + | $(AWK) '/Path:\ / {print $$2}' update: $(SVN) $(SVN-UPDATE-OPTIONS) update From evan.cheng at apple.com Thu Feb 28 12:59:10 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 28 Feb 2008 10:59:10 -0800 Subject: [llvm-commits] [llvm] r47696 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp In-Reply-To: References: <200802272236.m1RMa0i6008747@zion.cs.uiuc.edu> <200802280806.12584.baldrick@free.fr> Message-ID: <399B631A-6F85-4F1E-9478-11F804688D38@apple.com> On Feb 28, 2008, at 10:33 AM, Dale Johannesen wrote: > > On Feb 27, 2008, at 11:06 PM, Duncan Sands wrote: > >> Hi Dale, >> >>> - if (VT==MVT::f64) >>> + if (VT == MVT::v8i16 || VT == MVT::v4i32 || >>> + VT == MVT::v2i64 || VT == MVT::v2f64 || >>> + VT == MVT::v4f32 || VT == MVT::v16i8 || >>> + VT == MVT::ppcf128) >>> + intVT = MVT::i128; >>> + else if (VT==MVT::f64 || >>> + VT == MVT::v8i8 || VT == MVT::v4i16 || >>> + VT == MVT::v2i32 || VT == MVT::v1i64 || >>> + VT == MVT::v2f32) >>> intVT = MVT::i64; >>> else if (VT==MVT::f32) >>> intVT = MVT::i32; >>> else >>> - assert(0 && "Unaligned load of unsupported floating point >>> type"); >>> + assert(0 && "Unaligned load of unsupported type"); >> >> how about replacing all that with: >> IntVT = MVT::getIntegerType(MVT::getSizeInBits(VT)); > > I don't believe the algorithm works for the 80 and 96 bit basic types. > "Unaligned load of unsupported type" seems like a good answer for > them. You can probably do something like: if ((isVector(VT) && MVT::getSizeInBits(VT) == MVT::getSizeInBits(MVT::i128)) || VT == MVT::ppcf128) intVT = MVT::i128 It's probably a good idea to add MVT::is128BitVector() so we don't have to type list all of these types over and over again. Evan > > >> You might want to check that the integer type is not an extended >> value type. >> >>> - if (LoadedVT == MVT::f64) >>> + if (LoadedVT == MVT::v8i16 || LoadedVT == MVT::v4i32 || >>> + LoadedVT == MVT::v2i64 || LoadedVT == MVT::v2f64 || >>> + LoadedVT == MVT::v4f32 || LoadedVT == MVT::v16i8 || >>> + LoadedVT == MVT::ppcf128) >>> + intVT = MVT::i128; >>> + else if (LoadedVT == MVT::f64 || >>> + LoadedVT == MVT::v8i8 || LoadedVT == MVT::v4i16 || >>> + LoadedVT == MVT::v2i32 || LoadedVT == MVT::v1i64 || >>> + LoadedVT == MVT::v2f32) >>> intVT = MVT::i64; >>> else if (LoadedVT == MVT::f32) >>> intVT = MVT::i32; >>> else >>> - assert(0 && "Unaligned load of unsupported floating point >>> type"); >>> + assert(0 && "Unaligned load of unsupported type"); >> >> Likewise. >> >> Ciao, >> >> Duncan. > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Thu Feb 28 13:38:25 2008 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 28 Feb 2008 11:38:25 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: Message-ID: <16e5fdf90802281138m54d1ea54u3b08bd364652ecc7@mail.gmail.com> On Thu, Feb 28, 2008 at 6:15 AM, Roman Levenstein wrote: > Hi, > > I've implemented some improvements related to the computation of > heights, depths and priorities and latencies of SUnits. > > The basic idea is that all these algorithms are computing the longest > paths from the root node or to the exit node. Therefore I changed the > existing implementation that uses and iterative and potentially > exponential algorithm to a well-known graph algorithm based on dynamic > programming. It has a linear run-time. > > Tests on very big input files with tens of thousends of instructions > in a BB, e.g. big4.bc use-case from Duraid's testsuit, indicate huge > speed-ups (up to 2x) compared to the current version, > > Please review and tell if it is OK for submission. > Hi Roman, (I haven't looked at the patch yet.) Did you run the llvm-test suite with your patch? -bw From lauro.venancio at gmail.com Thu Feb 28 14:26:05 2008 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Thu, 28 Feb 2008 20:26:05 -0000 Subject: [llvm-commits] [llvm] r47725 - /llvm/trunk/lib/Target/CBackend/CBackend.cpp Message-ID: <200802282026.m1SKQ5ax032433@zion.cs.uiuc.edu> Author: laurov Date: Thu Feb 28 14:26:04 2008 New Revision: 47725 URL: http://llvm.org/viewvc/llvm-project?rev=47725&view=rev Log: Avoid collisions in value names. Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=47725&r1=47724&r2=47725&view=diff ============================================================================== --- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original) +++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Thu Feb 28 14:26:04 2008 @@ -1156,9 +1156,11 @@ char ch = *I; if (!((ch >= 'a' && ch <= 'z') || (ch >= 'A' && ch <= 'Z') || - (ch >= '0' && ch <= '9') || ch == '_')) - VarName += '_'; - else + (ch >= '0' && ch <= '9') || ch == '_')) { + char buffer[5]; + sprintf(buffer, "_%x_", ch); + VarName += buffer; + } else VarName += ch; } From evan.cheng at apple.com Thu Feb 28 14:49:51 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 28 Feb 2008 20:49:51 -0000 Subject: [llvm-commits] [test-suite] r47728 - /test-suite/trunk/External/SPEC/CFP2006/447.dealII/Makefile Message-ID: <200802282049.m1SKnpJY000638@zion.cs.uiuc.edu> Author: evancheng Date: Thu Feb 28 14:49:51 2008 New Revision: 47728 URL: http://llvm.org/viewvc/llvm-project?rev=47728&view=rev Log: Reflects llvm-ld changes. Modified: test-suite/trunk/External/SPEC/CFP2006/447.dealII/Makefile Modified: test-suite/trunk/External/SPEC/CFP2006/447.dealII/Makefile URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/External/SPEC/CFP2006/447.dealII/Makefile?rev=47728&r1=47727&r2=47728&view=diff ============================================================================== --- test-suite/trunk/External/SPEC/CFP2006/447.dealII/Makefile (original) +++ test-suite/trunk/External/SPEC/CFP2006/447.dealII/Makefile Thu Feb 28 14:49:51 2008 @@ -24,4 +24,4 @@ STDOUT_FILENAME := log LDFLAGS = -lstdc++ -lm -LIBS = -lstdc++ -lm +LIBS = -lm From evan.cheng at apple.com Thu Feb 28 14:51:11 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 28 Feb 2008 20:51:11 -0000 Subject: [llvm-commits] [test-suite] r47729 - /test-suite/trunk/External/SPEC/CINT2000/252.eon/Makefile Message-ID: <200802282051.m1SKpBWg000686@zion.cs.uiuc.edu> Author: evancheng Date: Thu Feb 28 14:51:11 2008 New Revision: 47729 URL: http://llvm.org/viewvc/llvm-project?rev=47729&view=rev Log: Reflects llvm-ld changes. Modified: test-suite/trunk/External/SPEC/CINT2000/252.eon/Makefile Modified: test-suite/trunk/External/SPEC/CINT2000/252.eon/Makefile URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/External/SPEC/CINT2000/252.eon/Makefile?rev=47729&r1=47728&r2=47729&view=diff ============================================================================== --- test-suite/trunk/External/SPEC/CINT2000/252.eon/Makefile (original) +++ test-suite/trunk/External/SPEC/CINT2000/252.eon/Makefile Thu Feb 28 14:51:11 2008 @@ -66,5 +66,5 @@ CXXFLAGS += -fno-exceptions -Wno-deprecated -Wno-non-template-friend LDFLAGS = -lstdc++ -lm -LIBS = -lstdc++ -lm +LIBS = -lm From evan.cheng at apple.com Thu Feb 28 14:52:11 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 28 Feb 2008 20:52:11 -0000 Subject: [llvm-commits] [test-suite] r47730 - /test-suite/trunk/External/SPEC/CINT2006/471.omnetpp/Makefile Message-ID: <200802282052.m1SKqBB6000726@zion.cs.uiuc.edu> Author: evancheng Date: Thu Feb 28 14:52:11 2008 New Revision: 47730 URL: http://llvm.org/viewvc/llvm-project?rev=47730&view=rev Log: Reflects llvm-ld changes. Modified: test-suite/trunk/External/SPEC/CINT2006/471.omnetpp/Makefile Modified: test-suite/trunk/External/SPEC/CINT2006/471.omnetpp/Makefile URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/External/SPEC/CINT2006/471.omnetpp/Makefile?rev=47730&r1=47729&r2=47730&view=diff ============================================================================== --- test-suite/trunk/External/SPEC/CINT2006/471.omnetpp/Makefile (original) +++ test-suite/trunk/External/SPEC/CINT2006/471.omnetpp/Makefile Thu Feb 28 14:52:11 2008 @@ -62,7 +62,7 @@ STDOUT_FILENAME := omnetpp.log LDFLAGS = -lstdc++ -lm -LIBS = -lstdc++ -lm +LIBS = -lm ##===----------------------------------------------------------------------===## # Copy the source files to the working directory. Some files may have From evan.cheng at apple.com Thu Feb 28 14:53:28 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 28 Feb 2008 20:53:28 -0000 Subject: [llvm-commits] [test-suite] r47731 - /test-suite/trunk/External/SPEC/CINT2006/473.astar/Makefile Message-ID: <200802282053.m1SKrSwa000770@zion.cs.uiuc.edu> Author: evancheng Date: Thu Feb 28 14:53:28 2008 New Revision: 47731 URL: http://llvm.org/viewvc/llvm-project?rev=47731&view=rev Log: Reflects llvm-ld changes. Modified: test-suite/trunk/External/SPEC/CINT2006/473.astar/Makefile Modified: test-suite/trunk/External/SPEC/CINT2006/473.astar/Makefile URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/External/SPEC/CINT2006/473.astar/Makefile?rev=47731&r1=47730&r2=47731&view=diff ============================================================================== --- test-suite/trunk/External/SPEC/CINT2006/473.astar/Makefile (original) +++ test-suite/trunk/External/SPEC/CINT2006/473.astar/Makefile Thu Feb 28 14:53:28 2008 @@ -25,4 +25,4 @@ endif LDFLAGS = -lstdc++ -lm -LIBS = -lstdc++ -lm +LIBS = -lm From romix.llvm at googlemail.com Thu Feb 28 14:53:41 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Thu, 28 Feb 2008 23:53:41 +0300 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <16e5fdf90802281138m54d1ea54u3b08bd364652ecc7@mail.gmail.com> References: <16e5fdf90802281138m54d1ea54u3b08bd364652ecc7@mail.gmail.com> Message-ID: Hi Bill, 2008/2/28, Bill Wendling : > On Thu, Feb 28, 2008 at 6:15 AM, Roman Levenstein > wrote: > > Hi, > > > > I've implemented some improvements related to the computation of > > heights, depths and priorities and latencies of SUnits. > > > > The basic idea is that all these algorithms are computing the longest > > paths from the root node or to the exit node. Therefore I changed the > > existing implementation that uses and iterative and potentially > > exponential algorithm to a well-known graph algorithm based on dynamic > > programming. It has a linear run-time. > > > > Tests on very big input files with tens of thousends of instructions > > in a BB, e.g. big4.bc use-case from Duraid's testsuit, indicate huge > > speed-ups (up to 2x) compared to the current version, > > > > Please review and tell if it is OK for submission. > > > > Hi Roman, > > (I haven't looked at the patch yet.) Did you run the llvm-test suite > with your patch? No, I haven't done it yet, since I had no time. But I'll do it tomorrow. What I did so far was computing the corresponding values (height, depth, priority) with the old algorithm and with the new algorithm and then comparing them to check if they are equal. I did it on some use-cases involving huge MBBs. The speedup was really significant, e.g. the overall compilation took 10-15 seconds less (out of 35-40 sec) on those examples. Also the profiler shows that the number of iterations done by those algorithms was reduced by several orders of magniute. - Roman From evan.cheng at apple.com Thu Feb 28 14:55:20 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 28 Feb 2008 12:55:20 -0800 Subject: [llvm-commits] [llvm] r47703 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Targe In-Reply-To: <9c10c9f0802281045x4f0e285awf0b39d818ee122bc@mail.gmail.com> References: <9c10c9f0802281045x4f0e285awf0b39d818ee122bc@mail.gmail.com> Message-ID: <08CFC56C-E0C7-4157-8E5D-E7279A85A0C5@apple.com> They are not failing on Mac OS X so it's probably target / platform specific. Can you tell me how they are failing? Evan On Feb 28, 2008, at 10:45 AM, Lauro Ramos Venancio wrote: > Hi Evan, > > This patch caused many regressions. See > http://lists.cs.uiuc.edu/pipermail/llvm-testresults/2008-February/008336.html > > Lauro > > 2008/2/27, Evan Cheng : >> Author: evancheng >> Date: Wed Feb 27 18:43:03 2008 >> New Revision: 47703 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=47703&view=rev >> Log: >> Add a quick and dirty "loop aligner pass". x86 uses it to align its >> loops to 16-byte boundaries. >> >> Added: >> llvm/trunk/lib/CodeGen/LoopAligner.cpp >> Modified: >> llvm/trunk/include/llvm/CodeGen/AsmPrinter.h >> llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h >> llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h >> llvm/trunk/include/llvm/CodeGen/Passes.h >> llvm/trunk/include/llvm/Target/TargetAsmInfo.h >> llvm/trunk/include/llvm/Target/TargetLowering.h >> llvm/trunk/lib/CodeGen/AsmPrinter.cpp >> llvm/trunk/lib/CodeGen/BranchFolding.cpp >> llvm/trunk/lib/CodeGen/IfConversion.cpp >> llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp >> llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp >> llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp >> llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp >> llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp >> llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp >> llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp >> llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp >> llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp >> llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp >> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp >> llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp >> llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp >> llvm/trunk/lib/Target/X86/X86TargetMachine.cpp >> llvm/trunk/lib/Target/X86/X86TargetMachine.h >> >> Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) >> +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Wed Feb 27 >> 18:43:03 2008 >> @@ -78,6 +78,10 @@ >> /// CurrentSection - The current section we are emitting to. >> This is >> /// controlled and used by the SwitchSection method. >> std::string CurrentSection; >> + >> + /// IsInTextSection - True if the current section we are >> emitting to is a >> + /// text section. >> + bool IsInTextSection; >> >> protected: >> AsmPrinter(std::ostream &o, TargetMachine &TM, const >> TargetAsmInfo *T); >> @@ -269,9 +273,7 @@ >> /// an explicit alignment requested, it will unconditionally >> override the >> /// alignment request. However, if ForcedAlignBits is >> specified, this value >> /// has final say: the ultimate alignment will be the max of >> ForcedAlignBits >> - /// and the alignment computed with NumBits and the global. If >> UseFillExpr >> - /// is true, it also emits an optional second value FillValue >> which the >> - /// assembler uses to fill gaps to match alignment. >> + /// and the alignment computed with NumBits and the global >> /// >> /// The algorithm is: >> /// Align = NumBits; >> @@ -279,8 +281,7 @@ >> /// Align = std::max(Align, ForcedAlignBits); >> /// >> void EmitAlignment(unsigned NumBits, const GlobalValue *GV = 0, >> - unsigned ForcedAlignBits = 0, bool >> UseFillExpr = false, >> - unsigned FillValue = 0) const; >> + unsigned ForcedAlignBits = 0) const; >> >> /// printLabel - This method prints a local label used by debug >> and >> /// exception handling tables. >> @@ -317,6 +318,7 @@ >> /// printBasicBlockLabel - This method prints the label for the >> specified >> /// MachineBasicBlock >> virtual void printBasicBlockLabel(const MachineBasicBlock *MBB, >> + bool printAlign = false, >> bool printColon = false, >> bool printComment = true) >> const; >> >> >> Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original) >> +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Wed Feb 27 >> 18:43:03 2008 >> @@ -75,6 +75,10 @@ >> /// LiveIns - Keep track of the physical registers that are >> livein of >> /// the basicblock. >> std::vector LiveIns; >> + >> + /// Alignment - Alignment of the basic block. Zero if the basic >> block does >> + /// not need to be aligned. >> + unsigned Alignment; >> >> /// IsLandingPad - Indicate that this basic block is entered via an >> /// exception handler. >> @@ -82,7 +86,8 @@ >> >> public: >> explicit MachineBasicBlock(const BasicBlock *bb = 0) >> - : Prev(0), Next(0), BB(bb), Number(-1), xParent(0), >> IsLandingPad(false) { >> + : Prev(0), Next(0), BB(bb), Number(-1), xParent(0), >> + Alignment(0), IsLandingPad(false) { >> Insts.parent = this; >> } >> >> @@ -181,6 +186,14 @@ >> const_livein_iterator livein_end() const { return >> LiveIns.end(); } >> bool livein_empty() const { return LiveIns.empty(); } >> >> + /// getAlignment - Return alignment of the basic block. >> + /// >> + unsigned getAlignment() const { return Alignment; } >> + >> + /// setAlignment - Set alignment of the basic block. >> + /// >> + void setAlignment(unsigned Align) { Alignment = Align; } >> + >> /// isLandingPad - Returns true if the block is a landing pad. >> That is >> /// this basic block is entered via an exception handler. >> bool isLandingPad() const { return IsLandingPad; } >> >> Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original) >> +++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Wed Feb 27 >> 18:43:03 2008 >> @@ -204,7 +204,7 @@ >> } >> >> /// getObjectAlignment - Return the alignment of the specified >> stack object... >> - int getObjectAlignment(int ObjectIdx) const { >> + unsigned getObjectAlignment(int ObjectIdx) const { >> assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() && >> "Invalid Object Idx!"); >> return Objects[ObjectIdx+NumFixedObjects].Alignment; >> >> Modified: llvm/trunk/include/llvm/CodeGen/Passes.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/include/llvm/CodeGen/Passes.h (original) >> +++ llvm/trunk/include/llvm/CodeGen/Passes.h Wed Feb 27 18:43:03 2008 >> @@ -129,6 +129,10 @@ >> /// IfConverter Pass - This pass performs machine code if >> conversion. >> FunctionPass *createIfConverterPass(); >> >> + /// LoopAligner Pass - This pass aligns loop headers to target >> specific >> + /// alignment boundary. >> + FunctionPass *createLoopAlignerPass(); >> + >> /// DebugLabelFoldingPass - This pass prunes out redundant debug >> labels. This >> /// allows a debug emitter to determine if the range of two >> labels is empty, >> /// by seeing if the labels map to the same reduced label. >> >> Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original) >> +++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Feb 27 >> 18:43:03 2008 >> @@ -164,6 +164,10 @@ >> /// boundary. >> bool AlignmentIsInBytes; // Defaults to true >> >> + /// TextAlignFillValue - If non-zero, this is used to fill the >> executable >> + /// space created as the result of a alignment directive. >> + unsigned TextAlignFillValue; >> + >> //===--- Section Switching Directives >> ---------------------------------===// >> >> /// SwitchToSectionDirective - This is the directive used when >> we want to >> @@ -503,6 +507,9 @@ >> bool getAlignmentIsInBytes() const { >> return AlignmentIsInBytes; >> } >> + unsigned getTextAlignFillValue() const { >> + return TextAlignFillValue; >> + } >> const char *getSwitchToSectionDirective() const { >> return SwitchToSectionDirective; >> } >> >> Modified: llvm/trunk/include/llvm/Target/TargetLowering.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) >> +++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Feb 27 >> 18:43:03 2008 >> @@ -548,17 +548,23 @@ >> >> /// getIfCvtBlockLimit - returns the target specific if- >> conversion block size >> /// limit. Any block whose size is greater should not be >> predicated. >> - virtual unsigned getIfCvtBlockSizeLimit() const { >> + unsigned getIfCvtBlockSizeLimit() const { >> return IfCvtBlockSizeLimit; >> } >> >> /// getIfCvtDupBlockLimit - returns the target specific size >> limit for a >> /// block to be considered for duplication. Any block whose size >> is greater >> /// should not be duplicated to facilitate its predication. >> - virtual unsigned getIfCvtDupBlockSizeLimit() const { >> + unsigned getIfCvtDupBlockSizeLimit() const { >> return IfCvtDupBlockSizeLimit; >> } >> >> + /// getPrefLoopAlignment - return the preferred loop alignment. >> + /// >> + unsigned getPrefLoopAlignment() const { >> + return PrefLoopAlignment; >> + } >> + >> /// getPreIndexedAddressParts - returns true by value, base >> pointer and >> /// offset pointer and addressing mode by reference if the node's >> address >> /// can be legally represented as pre-indexed load / store address. >> @@ -583,7 +589,7 @@ >> /// jumptable. >> virtual SDOperand getPICJumpTableRelocBase(SDOperand Table, >> SelectionDAG &DAG) >> const; >> - >> + >> // >> = >> = >> = >> -------------------------------------------------------------------- >> ===// >> // TargetLowering Optimization Methods >> // >> @@ -890,6 +896,12 @@ >> void setIfCvtDupBlockSizeLimit(unsigned Limit) { >> IfCvtDupBlockSizeLimit = Limit; >> } >> + >> + /// setPrefLoopAlignment - Set the target's preferred loop >> alignment. Default >> + /// alignment is zero, it means the target does not care about >> loop alignment. >> + void setPrefLoopAlignment(unsigned Align) { >> + PrefLoopAlignment = Align; >> + } >> >> public: >> >> @@ -1276,6 +1288,10 @@ >> /// duplicated during if-conversion. >> unsigned IfCvtDupBlockSizeLimit; >> >> + /// PrefLoopAlignment - The perferred loop alignment. >> + /// >> + unsigned PrefLoopAlignment; >> + >> /// StackPointerRegisterToSaveRestore - If set to a physical >> register, this >> /// specifies the register that llvm.savestack/llvm.restorestack >> should save >> /// and restore. >> >> Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/CodeGen/AsmPrinter.cpp (original) >> +++ llvm/trunk/lib/CodeGen/AsmPrinter.cpp Wed Feb 27 18:43:03 2008 >> @@ -39,7 +39,8 @@ >> char AsmPrinter::ID = 0; >> AsmPrinter::AsmPrinter(std::ostream &o, TargetMachine &tm, >> const TargetAsmInfo *T) >> - : MachineFunctionPass((intptr_t)&ID), FunctionNumber(0), O(o), >> TM(tm), TAI(T) >> + : MachineFunctionPass((intptr_t)&ID), FunctionNumber(0), O(o), >> TM(tm), TAI(T), >> + IsInTextSection(false) >> {} >> >> std::string AsmPrinter::getSectionForFunction(const Function &F) >> const { >> @@ -69,6 +70,8 @@ >> >> if (!CurrentSection.empty()) >> O << CurrentSection << TAI->getTextSectionStartSuffix() << '\n'; >> + >> + IsInTextSection = true; >> } >> >> /// SwitchToDataSection - Switch to the specified data section of >> the executable >> @@ -93,6 +96,8 @@ >> >> if (!CurrentSection.empty()) >> O << CurrentSection << TAI->getDataSectionStartSuffix() << '\n'; >> + >> + IsInTextSection = false; >> } >> >> >> @@ -344,7 +349,7 @@ >> O << TAI->getPrivateGlobalPrefix() << getFunctionNumber() >> << '_' << uid << "_set_" << MBB->getNumber(); >> } else { >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> // If the arch uses custom Jump Table directives, don't calc >> relative to >> // JT >> if (!HadJTEntryDirective) >> @@ -352,7 +357,7 @@ >> << getFunctionNumber() << '_' << uid; >> } >> } else { >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> } >> } >> >> @@ -679,8 +684,7 @@ >> // Align = std::max(Align, ForcedAlignBits); >> // >> void AsmPrinter::EmitAlignment(unsigned NumBits, const GlobalValue >> *GV, >> - unsigned ForcedAlignBits, bool >> UseFillExpr, >> - unsigned FillValue) const { >> + unsigned ForcedAlignBits) const { >> if (GV && GV->getAlignment()) >> NumBits = Log2_32(GV->getAlignment()); >> NumBits = std::max(NumBits, ForcedAlignBits); >> @@ -688,6 +692,9 @@ >> if (NumBits == 0) return; // No need to emit alignment. >> if (TAI->getAlignmentIsInBytes()) NumBits = 1 << NumBits; >> O << TAI->getAlignDirective() << NumBits; >> + >> + unsigned FillValue = TAI->getTextAlignFillValue(); >> + bool UseFillExpr = IsInTextSection && FillValue; >> if (UseFillExpr) O << ",0x" << std::hex << FillValue << std::dec; >> O << "\n"; >> } >> @@ -1252,7 +1259,7 @@ >> >> if (Modifier[0]=='l') // labels are target independent >> printBasicBlockLabel(MI->getOperand(OpNo).getMBB(), >> - false, false); >> + false, false, false); >> else { >> AsmPrinter *AP = const_cast(this); >> if ((OpFlags & 7) == 4 /*ADDR MODE*/) { >> @@ -1318,8 +1325,15 @@ >> /// printBasicBlockLabel - This method prints the label for the >> specified >> /// MachineBasicBlock >> void AsmPrinter::printBasicBlockLabel(const MachineBasicBlock *MBB, >> + bool printAlign, >> bool printColon, >> bool printComment) const { >> + if (printAlign) { >> + unsigned Align = MBB->getAlignment(); >> + if (Align) >> + EmitAlignment(Log2_32(Align)); >> + } >> + >> O << TAI->getPrivateGlobalPrefix() << "BB" << getFunctionNumber() >> << "_" >> << MBB->getNumber(); >> if (printColon) >> @@ -1338,7 +1352,7 @@ >> >> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() >> << getFunctionNumber() << '_' << uid << "_set_" << MBB- >> >getNumber() << ','; >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << >> getFunctionNumber() >> << '_' << uid << '\n'; >> } >> @@ -1351,7 +1365,7 @@ >> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() >> << getFunctionNumber() << '_' << uid << '_' << uid2 >> << "_set_" << MBB->getNumber() << ','; >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << >> getFunctionNumber() >> << '_' << uid << '_' << uid2 << '\n'; >> } >> >> Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original) >> +++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Wed Feb 27 18:43:03 2008 >> @@ -44,7 +44,7 @@ >> cl::desc("Max number of predecessors to consider tail >> merging"), >> cl::init(100), cl::Hidden); >> >> - struct BranchFolder : public MachineFunctionPass { >> + struct VISIBILITY_HIDDEN BranchFolder : public >> MachineFunctionPass { >> static char ID; >> explicit BranchFolder(bool defaultEnableTailMerge) : >> MachineFunctionPass((intptr_t)&ID) { >> >> Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/CodeGen/IfConversion.cpp (original) >> +++ llvm/trunk/lib/CodeGen/IfConversion.cpp Wed Feb 27 18:43:03 2008 >> @@ -56,7 +56,7 @@ >> STATISTIC(NumDupBBs, "Number of duplicated blocks"); >> >> namespace { >> - class IfConverter : public MachineFunctionPass { >> + class VISIBILITY_HIDDEN IfConverter : public MachineFunctionPass { >> enum IfcvtKind { >> ICNotClassfied, // BB data valid, but not classified. >> ICSimpleFalse, // Same as ICSimple, but on the false path. >> >> Added: llvm/trunk/lib/CodeGen/LoopAligner.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LoopAligner.cpp?rev=47703&view=auto >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/CodeGen/LoopAligner.cpp (added) >> +++ llvm/trunk/lib/CodeGen/LoopAligner.cpp Wed Feb 27 18:43:03 2008 >> @@ -0,0 +1,65 @@ >> +//===-- LoopAligner.cpp - Loop aligner pass. >> ------------------------------===// >> +// >> +// The LLVM Compiler Infrastructure >> +// >> +// This file is distributed under the University of Illinois Open >> Source >> +// License. See LICENSE.TXT for details. >> +// >> +// >> = >> = >> = >> ----------------------------------------------------------------------= >> ==// >> +// >> +// This file implements the pass that align loop headers to target >> specific >> +// alignment boundary. >> +// >> +// >> = >> = >> = >> ----------------------------------------------------------------------= >> ==// >> + >> +#define DEBUG_TYPE "loopalign" >> +#include "llvm/CodeGen/MachineLoopInfo.h" >> +#include "llvm/CodeGen/MachineFunctionPass.h" >> +#include "llvm/CodeGen/Passes.h" >> +#include "llvm/Target/TargetLowering.h" >> +#include "llvm/Target/TargetMachine.h" >> +#include "llvm/Support/Compiler.h" >> +#include "llvm/Support/Debug.h" >> +using namespace llvm; >> + >> +namespace { >> + class LoopAligner : public MachineFunctionPass { >> + const TargetLowering *TLI; >> + >> + public: >> + static char ID; >> + LoopAligner() : MachineFunctionPass((intptr_t)&ID) {} >> + >> + virtual bool runOnMachineFunction(MachineFunction &MF); >> + virtual const char *getPassName() const { return "Loop >> aligner"; } >> + >> + virtual void getAnalysisUsage(AnalysisUsage &AU) const { >> + AU.addRequired(); >> + AU.addPreserved(); >> + MachineFunctionPass::getAnalysisUsage(AU); >> + } >> + }; >> + >> + char LoopAligner::ID = 0; >> +} // end anonymous namespace >> + >> +FunctionPass *llvm::createLoopAlignerPass() { return new >> LoopAligner(); } >> + >> +bool LoopAligner::runOnMachineFunction(MachineFunction &MF) { >> + const MachineLoopInfo *MLI = &getAnalysis(); >> + >> + if (MLI->begin() == MLI->end()) >> + return false; // No loops. >> + >> + unsigned Align = MF.getTarget().getTargetLowering()- >> >getPrefLoopAlignment(); >> + if (!Align) >> + return false; // Don't care about loop alignment. >> + >> + for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I ! >> = E; ++I) { >> + MachineBasicBlock *MBB = I; >> + if (MLI->isLoopHeader(MBB)) >> + MBB->setAlignment(Align); >> + } >> + >> + return true; >> +} >> >> Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original) >> +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -166,6 +166,7 @@ >> if (LBB) OS << LBB->getName() << ": "; >> OS << (const void*)this >> << ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber(); >> + if (Alignment) OS << ", Alignment " << Alignment; >> if (isLandingPad()) OS << ", EH LANDING PAD"; >> OS << ":\n"; >> >> >> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) >> +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Feb >> 27 18:43:03 2008 >> @@ -206,6 +206,8 @@ >> JumpBufSize = 0; >> JumpBufAlignment = 0; >> IfCvtBlockSizeLimit = 2; >> + IfCvtDupBlockSizeLimit = 0; >> + PrefLoopAlignment = 0; >> >> InitLibcallNames(LibcallRoutineNames); >> InitCmpLibcallCCs(CmpLibcallCCs); >> >> Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Wed Feb 27 18:43:03 >> 2008 >> @@ -248,7 +248,7 @@ >> I != E; ++I) { >> // Print a label for the basic block. >> if (I != MF.begin()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >> >end(); >> @@ -710,13 +710,13 @@ >> << '_' << JTI << '_' << MO2.getImm() >> << "_set_" << MBB->getNumber(); >> else if (TM.getRelocationModel() == Reloc::PIC_) { >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> // If the arch uses custom Jump Table directives, don't calc >> relative to JT >> if (!TAI->getJumpTableDirective()) >> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" >> << getFunctionNumber() << '_' << JTI << '_' << >> MO2.getImm(); >> } else >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> if (i != e-1) >> O << '\n'; >> } >> >> Modified: llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -171,7 +171,7 @@ >> for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); >> I != E; ++I) { >> if (I != MF.begin()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >> >end(); >> >> Modified: llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -460,7 +460,7 @@ >> I != E; ++I) { >> // Print a label for the basic block. >> if (I != MF.begin()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >> >end(); >> >> Modified: llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -149,7 +149,7 @@ >> I != E; ++I) { >> // Print a label for the basic block if there are any >> predecessors. >> if (!I->pred_empty()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >> >end(); >> >> Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -297,7 +297,7 @@ >> >> // Print a label for the basic block. >> if (I != MF.begin()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> >> >> Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -604,7 +604,7 @@ >> I != E; ++I) { >> // Print a label for the basic block. >> if (I != MF.begin()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >> >end(); >> @@ -838,7 +838,7 @@ >> I != E; ++I) { >> // Print a label for the basic block. >> if (I != MF.begin()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), IE = I- >> >end(); >> >> Modified: llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -116,7 +116,7 @@ >> I != E; ++I) { >> // Print a label for the basic block. >> if (I != MF.begin()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >> >end(); >> >> Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -101,36 +101,25 @@ >> switch (F->getLinkage()) { >> default: assert(0 && "Unknown linkage type!"); >> case Function::InternalLinkage: // Symbols default to internal. >> - if (Subtarget->isTargetDarwin()) >> - // FIXME: This should be parameterized somewhere. >> - EmitAlignment(4, F, 0, true, 0x90); >> - else >> - EmitAlignment(4, F); >> + EmitAlignment(4, F); >> break; >> case Function::DLLExportLinkage: >> DLLExportedFns.insert(Mang->makeNameProper(F->getName(), "")); >> //FALLS THROUGH >> case Function::ExternalLinkage: >> - if (Subtarget->isTargetDarwin()) >> - // FIXME: This should be parameterized somewhere. >> - EmitAlignment(4, F, 0, true, 0x90); >> - else >> - EmitAlignment(4, F); >> + EmitAlignment(4, F); >> O << "\t.globl\t" << CurrentFnName << "\n"; >> break; >> case Function::LinkOnceLinkage: >> case Function::WeakLinkage: >> + EmitAlignment(4, F); >> if (Subtarget->isTargetDarwin()) { >> - // FIXME: This should be parameterized somewhere. >> - EmitAlignment(4, F, 0, true, 0x90); >> O << "\t.globl\t" << CurrentFnName << "\n"; >> O << TAI->getWeakDefDirective() << CurrentFnName << "\n"; >> } else if (Subtarget->isTargetCygMing()) { >> - EmitAlignment(4, F); >> O << "\t.globl\t" << CurrentFnName << "\n"; >> O << "\t.linkonce discard\n"; >> } else { >> - EmitAlignment(4, F); >> O << "\t.weak\t" << CurrentFnName << "\n"; >> } >> break; >> @@ -180,7 +169,7 @@ >> I != E; ++I) { >> // Print a label for the basic block. >> if (!I->pred_empty()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), IE = I- >> >end(); >> @@ -515,7 +504,7 @@ >> >> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() >> << getFunctionNumber() << '_' << uid << "_set_" << MBB- >> >getNumber() << ','; >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> if (Subtarget->isPICStyleRIPRel()) >> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << >> getFunctionNumber() >> << '_' << uid << '\n'; >> @@ -543,12 +532,12 @@ >> O << TAI->getPrivateGlobalPrefix() << getFunctionNumber() >> << '_' << uid << "_set_" << MBB->getNumber(); >> } else if (Subtarget->isPICStyleGOT()) { >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> O << "@GOTOFF"; >> } else >> assert(0 && "Don't know how to print MBB label for this PIC >> mode"); >> } else >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> } >> >> bool X86ATTAsmPrinter::printAsmMRegister(const MachineOperand &MO, >> >> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) >> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -714,6 +714,7 @@ >> maxStoresPerMemcpy = 16; // For %llvm.memcpy -> sequence of stores >> maxStoresPerMemmove = 16; // For %llvm.memmove -> sequence of >> stores >> allowUnalignedMemoryAccesses = true; // x86 supports it! >> + setPrefLoopAlignment(16); >> } >> >> /// getMaxByValAlign - Helper for getByValTypeAlignment to determine >> >> Modified: llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -78,7 +78,7 @@ >> I != E; ++I) { >> // Print a label for the basic block if there are any >> predecessors. >> if (!I->pred_empty()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >> >end(); >> @@ -242,7 +242,7 @@ >> >> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() >> << getFunctionNumber() << '_' << uid << "_set_" << MBB- >> >getNumber() << ','; >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> O << '-' << "\"L" << getFunctionNumber() << "$pb\"'\n"; >> } >> >> >> Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original) >> +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -47,6 +47,7 @@ >> switch (Subtarget->TargetType) { >> case X86Subtarget::isDarwin: >> AlignmentIsInBytes = false; >> + TextAlignFillValue = 0x90; >> GlobalPrefix = "_"; >> if (!Subtarget->is64Bit()) >> Data64bitsDirective = 0; // we can't emit a 64-bit unit >> >> Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) >> +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -164,6 +164,13 @@ >> return true; // -print-machineinstr should print after this. >> } >> >> +bool X86TargetMachine::addPreEmitPass(FunctionPassManager &PM, >> bool Fast) { >> + if (Fast) return false; >> + >> + PM.add(createLoopAlignerPass()); >> + return true; >> +} >> + >> bool X86TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, >> bool Fast, >> std::ostream &Out) { >> PM.add(createX86CodePrinterPass(Out, *this)); >> >> Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original) >> +++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Wed Feb 27 >> 18:43:03 2008 >> @@ -63,6 +63,7 @@ >> // Set up the pass pipeline. >> virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); >> virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast); >> + virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast); >> virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, >> std::ostream &Out); >> virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast, >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> From gohman at apple.com Thu Feb 28 15:01:04 2008 From: gohman at apple.com (Dan Gohman) Date: Thu, 28 Feb 2008 13:01:04 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: Message-ID: <006239B7-1C62-450F-9BA3-DA002C24604C@apple.com> Hi Roman, This patch looks good to me. Watch out for tabs. And I have a few other minor corrections below. > + // Initialize the data structures > + for (unsigned i = 0, e = SUnits.size(); i != e; ++i) { This can use DAGSize instead of SUnits.size(). > + for (unsigned i = 0, e = SUnits.size(); i != e; ++i) { DItto. > + assert(WorkList.size() == 0 && "Should be empty"); ... > + assert(WorkList.size() == 0 && "Should be empty"); Please use WorkList.empty(). > + for (SUnit::succ_iterator I = SU->Preds.begin(), E = SU- >Preds.end(); > + I != E; ++I) { Use pred_iterator here instead of succ_iterator. > + Latencies[SU->NodeNum] = 1; Why 1? I guess it doesn't affect the schedule, but I'd prefer to see this be either 0 or SU->Latency. > + // Update InDegrees of all nodes depending on current SUnit > + for (SUnit::const_succ_iterator I = SU->Preds.begin(), E = SU- >Preds.end(); > + I != E; ++I) { For iterating through predecessors, use const_pred_iterator instead of const_succ_iterator. > + SUnit *SU = I->Dep; This can be `const SUnit *'. Dan On Feb 28, 2008, at 6:15 AM, Roman Levenstein wrote: > Hi, > > I've implemented some improvements related to the computation of > heights, depths and priorities and latencies of SUnits. > > The basic idea is that all these algorithms are computing the longest > paths from the root node or to the exit node. Therefore I changed the > existing implementation that uses and iterative and potentially > exponential algorithm to a well-known graph algorithm based on dynamic > programming. It has a linear run-time. > > Tests on very big input files with tens of thousends of instructions > in a BB, e.g. big4.bc use-case from Duraid's testsuit, indicate huge > speed-ups (up to 2x) compared to the current version, > > Please review and tell if it is OK for submission. > - Roman > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From gohman at apple.com Thu Feb 28 15:41:15 2008 From: gohman at apple.com (Dan Gohman) Date: Thu, 28 Feb 2008 13:41:15 -0800 Subject: [llvm-commits] [llvm] r47703 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/ In-Reply-To: <200802280043.m1S0hEBR012866@zion.cs.uiuc.edu> References: <200802280043.m1S0hEBR012866@zion.cs.uiuc.edu> Message-ID: Hi Evan, This is causing failures on x86-64 too: Regression/C++/EH/exception_spec_test [LLC compile, LLC-BETA compile, , ] Regression/C++/EH/function_try_block [LLC compile, LLC-BETA compile, , ] Dan On Feb 27, 2008, at 4:43 PM, Evan Cheng wrote: > Author: evancheng > Date: Wed Feb 27 18:43:03 2008 > New Revision: 47703 > > URL: http://llvm.org/viewvc/llvm-project?rev=47703&view=rev > Log: > Add a quick and dirty "loop aligner pass". x86 uses it to align its > loops to 16-byte boundaries. > > Added: > llvm/trunk/lib/CodeGen/LoopAligner.cpp > Modified: > llvm/trunk/include/llvm/CodeGen/AsmPrinter.h > llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h > llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h > llvm/trunk/include/llvm/CodeGen/Passes.h > llvm/trunk/include/llvm/Target/TargetAsmInfo.h > llvm/trunk/include/llvm/Target/TargetLowering.h > llvm/trunk/lib/CodeGen/AsmPrinter.cpp > llvm/trunk/lib/CodeGen/BranchFolding.cpp > llvm/trunk/lib/CodeGen/IfConversion.cpp > llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp > llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp > llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp > llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp > llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp > llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp > llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp > llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp > llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp > llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp > llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp > llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp > llvm/trunk/lib/Target/X86/X86TargetMachine.cpp > llvm/trunk/lib/Target/X86/X86TargetMachine.h > > Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) > +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Wed Feb 27 18:43:03 > 2008 > @@ -78,6 +78,10 @@ > /// CurrentSection - The current section we are emitting to. > This is > /// controlled and used by the SwitchSection method. > std::string CurrentSection; > + > + /// IsInTextSection - True if the current section we are > emitting to is a > + /// text section. > + bool IsInTextSection; > > protected: > AsmPrinter(std::ostream &o, TargetMachine &TM, const > TargetAsmInfo *T); > @@ -269,9 +273,7 @@ > /// an explicit alignment requested, it will unconditionally > override the > /// alignment request. However, if ForcedAlignBits is > specified, this value > /// has final say: the ultimate alignment will be the max of > ForcedAlignBits > - /// and the alignment computed with NumBits and the global. If > UseFillExpr > - /// is true, it also emits an optional second value FillValue > which the > - /// assembler uses to fill gaps to match alignment. > + /// and the alignment computed with NumBits and the global > /// > /// The algorithm is: > /// Align = NumBits; > @@ -279,8 +281,7 @@ > /// Align = std::max(Align, ForcedAlignBits); > /// > void EmitAlignment(unsigned NumBits, const GlobalValue *GV = 0, > - unsigned ForcedAlignBits = 0, bool > UseFillExpr = false, > - unsigned FillValue = 0) const; > + unsigned ForcedAlignBits = 0) const; > > /// printLabel - This method prints a local label used by debug > and > /// exception handling tables. > @@ -317,6 +318,7 @@ > /// printBasicBlockLabel - This method prints the label for the > specified > /// MachineBasicBlock > virtual void printBasicBlockLabel(const MachineBasicBlock *MBB, > + bool printAlign = false, > bool printColon = false, > bool printComment = true) const; > > > Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original) > +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Wed Feb 27 > 18:43:03 2008 > @@ -75,6 +75,10 @@ > /// LiveIns - Keep track of the physical registers that are livein > of > /// the basicblock. > std::vector LiveIns; > + > + /// Alignment - Alignment of the basic block. Zero if the basic > block does > + /// not need to be aligned. > + unsigned Alignment; > > /// IsLandingPad - Indicate that this basic block is entered via an > /// exception handler. > @@ -82,7 +86,8 @@ > > public: > explicit MachineBasicBlock(const BasicBlock *bb = 0) > - : Prev(0), Next(0), BB(bb), Number(-1), xParent(0), > IsLandingPad(false) { > + : Prev(0), Next(0), BB(bb), Number(-1), xParent(0), > + Alignment(0), IsLandingPad(false) { > Insts.parent = this; > } > > @@ -181,6 +186,14 @@ > const_livein_iterator livein_end() const { return LiveIns.end(); } > bool livein_empty() const { return LiveIns.empty(); } > > + /// getAlignment - Return alignment of the basic block. > + /// > + unsigned getAlignment() const { return Alignment; } > + > + /// setAlignment - Set alignment of the basic block. > + /// > + void setAlignment(unsigned Align) { Alignment = Align; } > + > /// isLandingPad - Returns true if the block is a landing pad. > That is > /// this basic block is entered via an exception handler. > bool isLandingPad() const { return IsLandingPad; } > > Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original) > +++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Wed Feb 27 > 18:43:03 2008 > @@ -204,7 +204,7 @@ > } > > /// getObjectAlignment - Return the alignment of the specified > stack object... > - int getObjectAlignment(int ObjectIdx) const { > + unsigned getObjectAlignment(int ObjectIdx) const { > assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() && > "Invalid Object Idx!"); > return Objects[ObjectIdx+NumFixedObjects].Alignment; > > Modified: llvm/trunk/include/llvm/CodeGen/Passes.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/include/llvm/CodeGen/Passes.h (original) > +++ llvm/trunk/include/llvm/CodeGen/Passes.h Wed Feb 27 18:43:03 2008 > @@ -129,6 +129,10 @@ > /// IfConverter Pass - This pass performs machine code if > conversion. > FunctionPass *createIfConverterPass(); > > + /// LoopAligner Pass - This pass aligns loop headers to target > specific > + /// alignment boundary. > + FunctionPass *createLoopAlignerPass(); > + > /// DebugLabelFoldingPass - This pass prunes out redundant debug > labels. This > /// allows a debug emitter to determine if the range of two labels > is empty, > /// by seeing if the labels map to the same reduced label. > > Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original) > +++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Feb 27 > 18:43:03 2008 > @@ -164,6 +164,10 @@ > /// boundary. > bool AlignmentIsInBytes; // Defaults to true > > + /// TextAlignFillValue - If non-zero, this is used to fill the > executable > + /// space created as the result of a alignment directive. > + unsigned TextAlignFillValue; > + > //===--- Section Switching Directives > ---------------------------------===// > > /// SwitchToSectionDirective - This is the directive used when > we want to > @@ -503,6 +507,9 @@ > bool getAlignmentIsInBytes() const { > return AlignmentIsInBytes; > } > + unsigned getTextAlignFillValue() const { > + return TextAlignFillValue; > + } > const char *getSwitchToSectionDirective() const { > return SwitchToSectionDirective; > } > > Modified: llvm/trunk/include/llvm/Target/TargetLowering.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) > +++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Feb 27 > 18:43:03 2008 > @@ -548,17 +548,23 @@ > > /// getIfCvtBlockLimit - returns the target specific if-conversion > block size > /// limit. Any block whose size is greater should not be predicated. > - virtual unsigned getIfCvtBlockSizeLimit() const { > + unsigned getIfCvtBlockSizeLimit() const { > return IfCvtBlockSizeLimit; > } > > /// getIfCvtDupBlockLimit - returns the target specific size limit > for a > /// block to be considered for duplication. Any block whose size > is greater > /// should not be duplicated to facilitate its predication. > - virtual unsigned getIfCvtDupBlockSizeLimit() const { > + unsigned getIfCvtDupBlockSizeLimit() const { > return IfCvtDupBlockSizeLimit; > } > > + /// getPrefLoopAlignment - return the preferred loop alignment. > + /// > + unsigned getPrefLoopAlignment() const { > + return PrefLoopAlignment; > + } > + > /// getPreIndexedAddressParts - returns true by value, base > pointer and > /// offset pointer and addressing mode by reference if the node's > address > /// can be legally represented as pre-indexed load / store address. > @@ -583,7 +589,7 @@ > /// jumptable. > virtual SDOperand getPICJumpTableRelocBase(SDOperand Table, > SelectionDAG &DAG) const; > - > + > // > = > = > =-------------------------------------------------------------------- > ===// > // TargetLowering Optimization Methods > // > @@ -890,6 +896,12 @@ > void setIfCvtDupBlockSizeLimit(unsigned Limit) { > IfCvtDupBlockSizeLimit = Limit; > } > + > + /// setPrefLoopAlignment - Set the target's preferred loop > alignment. Default > + /// alignment is zero, it means the target does not care about > loop alignment. > + void setPrefLoopAlignment(unsigned Align) { > + PrefLoopAlignment = Align; > + } > > public: > > @@ -1276,6 +1288,10 @@ > /// duplicated during if-conversion. > unsigned IfCvtDupBlockSizeLimit; > > + /// PrefLoopAlignment - The perferred loop alignment. > + /// > + unsigned PrefLoopAlignment; > + > /// StackPointerRegisterToSaveRestore - If set to a physical > register, this > /// specifies the register that llvm.savestack/llvm.restorestack > should save > /// and restore. > > Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/AsmPrinter.cpp (original) > +++ llvm/trunk/lib/CodeGen/AsmPrinter.cpp Wed Feb 27 18:43:03 2008 > @@ -39,7 +39,8 @@ > char AsmPrinter::ID = 0; > AsmPrinter::AsmPrinter(std::ostream &o, TargetMachine &tm, > const TargetAsmInfo *T) > - : MachineFunctionPass((intptr_t)&ID), FunctionNumber(0), O(o), > TM(tm), TAI(T) > + : MachineFunctionPass((intptr_t)&ID), FunctionNumber(0), O(o), > TM(tm), TAI(T), > + IsInTextSection(false) > {} > > std::string AsmPrinter::getSectionForFunction(const Function &F) > const { > @@ -69,6 +70,8 @@ > > if (!CurrentSection.empty()) > O << CurrentSection << TAI->getTextSectionStartSuffix() << '\n'; > + > + IsInTextSection = true; > } > > /// SwitchToDataSection - Switch to the specified data section of > the executable > @@ -93,6 +96,8 @@ > > if (!CurrentSection.empty()) > O << CurrentSection << TAI->getDataSectionStartSuffix() << '\n'; > + > + IsInTextSection = false; > } > > > @@ -344,7 +349,7 @@ > O << TAI->getPrivateGlobalPrefix() << getFunctionNumber() > << '_' << uid << "_set_" << MBB->getNumber(); > } else { > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > // If the arch uses custom Jump Table directives, don't calc > relative to > // JT > if (!HadJTEntryDirective) > @@ -352,7 +357,7 @@ > << getFunctionNumber() << '_' << uid; > } > } else { > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > } > } > > @@ -679,8 +684,7 @@ > // Align = std::max(Align, ForcedAlignBits); > // > void AsmPrinter::EmitAlignment(unsigned NumBits, const GlobalValue > *GV, > - unsigned ForcedAlignBits, bool > UseFillExpr, > - unsigned FillValue) const { > + unsigned ForcedAlignBits) const { > if (GV && GV->getAlignment()) > NumBits = Log2_32(GV->getAlignment()); > NumBits = std::max(NumBits, ForcedAlignBits); > @@ -688,6 +692,9 @@ > if (NumBits == 0) return; // No need to emit alignment. > if (TAI->getAlignmentIsInBytes()) NumBits = 1 << NumBits; > O << TAI->getAlignDirective() << NumBits; > + > + unsigned FillValue = TAI->getTextAlignFillValue(); > + bool UseFillExpr = IsInTextSection && FillValue; > if (UseFillExpr) O << ",0x" << std::hex << FillValue << std::dec; > O << "\n"; > } > @@ -1252,7 +1259,7 @@ > > if (Modifier[0]=='l') // labels are target independent > printBasicBlockLabel(MI->getOperand(OpNo).getMBB(), > - false, false); > + false, false, false); > else { > AsmPrinter *AP = const_cast(this); > if ((OpFlags & 7) == 4 /*ADDR MODE*/) { > @@ -1318,8 +1325,15 @@ > /// printBasicBlockLabel - This method prints the label for the > specified > /// MachineBasicBlock > void AsmPrinter::printBasicBlockLabel(const MachineBasicBlock *MBB, > + bool printAlign, > bool printColon, > bool printComment) const { > + if (printAlign) { > + unsigned Align = MBB->getAlignment(); > + if (Align) > + EmitAlignment(Log2_32(Align)); > + } > + > O << TAI->getPrivateGlobalPrefix() << "BB" << getFunctionNumber() > << "_" > << MBB->getNumber(); > if (printColon) > @@ -1338,7 +1352,7 @@ > > O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() > << getFunctionNumber() << '_' << uid << "_set_" << MBB- > >getNumber() << ','; > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << > getFunctionNumber() > << '_' << uid << '\n'; > } > @@ -1351,7 +1365,7 @@ > O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() > << getFunctionNumber() << '_' << uid << '_' << uid2 > << "_set_" << MBB->getNumber() << ','; > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << > getFunctionNumber() > << '_' << uid << '_' << uid2 << '\n'; > } > > Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original) > +++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Wed Feb 27 18:43:03 2008 > @@ -44,7 +44,7 @@ > cl::desc("Max number of predecessors to consider tail > merging"), > cl::init(100), cl::Hidden); > > - struct BranchFolder : public MachineFunctionPass { > + struct VISIBILITY_HIDDEN BranchFolder : public > MachineFunctionPass { > static char ID; > explicit BranchFolder(bool defaultEnableTailMerge) : > MachineFunctionPass((intptr_t)&ID) { > > Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/IfConversion.cpp (original) > +++ llvm/trunk/lib/CodeGen/IfConversion.cpp Wed Feb 27 18:43:03 2008 > @@ -56,7 +56,7 @@ > STATISTIC(NumDupBBs, "Number of duplicated blocks"); > > namespace { > - class IfConverter : public MachineFunctionPass { > + class VISIBILITY_HIDDEN IfConverter : public MachineFunctionPass { > enum IfcvtKind { > ICNotClassfied, // BB data valid, but not classified. > ICSimpleFalse, // Same as ICSimple, but on the false path. > > Added: llvm/trunk/lib/CodeGen/LoopAligner.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LoopAligner.cpp?rev=47703&view=auto > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/LoopAligner.cpp (added) > +++ llvm/trunk/lib/CodeGen/LoopAligner.cpp Wed Feb 27 18:43:03 2008 > @@ -0,0 +1,65 @@ > +//===-- LoopAligner.cpp - Loop aligner pass. > ------------------------------===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open > Source > +// License. See LICENSE.TXT for details. > +// > +// > = > = > = > ----------------------------------------------------------------------= > ==// > +// > +// This file implements the pass that align loop headers to target > specific > +// alignment boundary. > +// > +// > = > = > = > ----------------------------------------------------------------------= > ==// > + > +#define DEBUG_TYPE "loopalign" > +#include "llvm/CodeGen/MachineLoopInfo.h" > +#include "llvm/CodeGen/MachineFunctionPass.h" > +#include "llvm/CodeGen/Passes.h" > +#include "llvm/Target/TargetLowering.h" > +#include "llvm/Target/TargetMachine.h" > +#include "llvm/Support/Compiler.h" > +#include "llvm/Support/Debug.h" > +using namespace llvm; > + > +namespace { > + class LoopAligner : public MachineFunctionPass { > + const TargetLowering *TLI; > + > + public: > + static char ID; > + LoopAligner() : MachineFunctionPass((intptr_t)&ID) {} > + > + virtual bool runOnMachineFunction(MachineFunction &MF); > + virtual const char *getPassName() const { return "Loop > aligner"; } > + > + virtual void getAnalysisUsage(AnalysisUsage &AU) const { > + AU.addRequired(); > + AU.addPreserved(); > + MachineFunctionPass::getAnalysisUsage(AU); > + } > + }; > + > + char LoopAligner::ID = 0; > +} // end anonymous namespace > + > +FunctionPass *llvm::createLoopAlignerPass() { return new > LoopAligner(); } > + > +bool LoopAligner::runOnMachineFunction(MachineFunction &MF) { > + const MachineLoopInfo *MLI = &getAnalysis(); > + > + if (MLI->begin() == MLI->end()) > + return false; // No loops. > + > + unsigned Align = MF.getTarget().getTargetLowering()- > >getPrefLoopAlignment(); > + if (!Align) > + return false; // Don't care about loop alignment. > + > + for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != > E; ++I) { > + MachineBasicBlock *MBB = I; > + if (MLI->isLoopHeader(MBB)) > + MBB->setAlignment(Align); > + } > + > + return true; > +} > > Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original) > +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Wed Feb 27 18:43:03 > 2008 > @@ -166,6 +166,7 @@ > if (LBB) OS << LBB->getName() << ": "; > OS << (const void*)this > << ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber(); > + if (Alignment) OS << ", Alignment " << Alignment; > if (isLandingPad()) OS << ", EH LANDING PAD"; > OS << ":\n"; > > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Feb > 27 18:43:03 2008 > @@ -206,6 +206,8 @@ > JumpBufSize = 0; > JumpBufAlignment = 0; > IfCvtBlockSizeLimit = 2; > + IfCvtDupBlockSizeLimit = 0; > + PrefLoopAlignment = 0; > > InitLibcallNames(LibcallRoutineNames); > InitCmpLibcallCCs(CmpLibcallCCs); > > Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Wed Feb 27 18:43:03 > 2008 > @@ -248,7 +248,7 @@ > I != E; ++I) { > // Print a label for the basic block. > if (I != MF.begin()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), E = I- > >end(); > @@ -710,13 +710,13 @@ > << '_' << JTI << '_' << MO2.getImm() > << "_set_" << MBB->getNumber(); > else if (TM.getRelocationModel() == Reloc::PIC_) { > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > // If the arch uses custom Jump Table directives, don't calc > relative to JT > if (!TAI->getJumpTableDirective()) > O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" > << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm(); > } else > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > if (i != e-1) > O << '\n'; > } > > Modified: llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp Wed Feb 27 > 18:43:03 2008 > @@ -171,7 +171,7 @@ > for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); > I != E; ++I) { > if (I != MF.begin()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), E = I- > >end(); > > Modified: llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp Wed Feb 27 > 18:43:03 2008 > @@ -460,7 +460,7 @@ > I != E; ++I) { > // Print a label for the basic block. > if (I != MF.begin()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), E = I- > >end(); > > Modified: llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp Wed Feb 27 > 18:43:03 2008 > @@ -149,7 +149,7 @@ > I != E; ++I) { > // Print a label for the basic block if there are any > predecessors. > if (!I->pred_empty()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), E = I- > >end(); > > Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Wed Feb 27 > 18:43:03 2008 > @@ -297,7 +297,7 @@ > > // Print a label for the basic block. > if (I != MF.begin()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > > > Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed Feb 27 > 18:43:03 2008 > @@ -604,7 +604,7 @@ > I != E; ++I) { > // Print a label for the basic block. > if (I != MF.begin()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), E = I- > >end(); > @@ -838,7 +838,7 @@ > I != E; ++I) { > // Print a label for the basic block. > if (I != MF.begin()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), IE = I- > >end(); > > Modified: llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp Wed Feb 27 > 18:43:03 2008 > @@ -116,7 +116,7 @@ > I != E; ++I) { > // Print a label for the basic block. > if (I != MF.begin()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), E = I- > >end(); > > Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Feb 27 > 18:43:03 2008 > @@ -101,36 +101,25 @@ > switch (F->getLinkage()) { > default: assert(0 && "Unknown linkage type!"); > case Function::InternalLinkage: // Symbols default to internal. > - if (Subtarget->isTargetDarwin()) > - // FIXME: This should be parameterized somewhere. > - EmitAlignment(4, F, 0, true, 0x90); > - else > - EmitAlignment(4, F); > + EmitAlignment(4, F); > break; > case Function::DLLExportLinkage: > DLLExportedFns.insert(Mang->makeNameProper(F->getName(), "")); > //FALLS THROUGH > case Function::ExternalLinkage: > - if (Subtarget->isTargetDarwin()) > - // FIXME: This should be parameterized somewhere. > - EmitAlignment(4, F, 0, true, 0x90); > - else > - EmitAlignment(4, F); > + EmitAlignment(4, F); > O << "\t.globl\t" << CurrentFnName << "\n"; > break; > case Function::LinkOnceLinkage: > case Function::WeakLinkage: > + EmitAlignment(4, F); > if (Subtarget->isTargetDarwin()) { > - // FIXME: This should be parameterized somewhere. > - EmitAlignment(4, F, 0, true, 0x90); > O << "\t.globl\t" << CurrentFnName << "\n"; > O << TAI->getWeakDefDirective() << CurrentFnName << "\n"; > } else if (Subtarget->isTargetCygMing()) { > - EmitAlignment(4, F); > O << "\t.globl\t" << CurrentFnName << "\n"; > O << "\t.linkonce discard\n"; > } else { > - EmitAlignment(4, F); > O << "\t.weak\t" << CurrentFnName << "\n"; > } > break; > @@ -180,7 +169,7 @@ > I != E; ++I) { > // Print a label for the basic block. > if (!I->pred_empty()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), IE = I- > >end(); > @@ -515,7 +504,7 @@ > > O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() > << getFunctionNumber() << '_' << uid << "_set_" << MBB- > >getNumber() << ','; > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > if (Subtarget->isPICStyleRIPRel()) > O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << > getFunctionNumber() > << '_' << uid << '\n'; > @@ -543,12 +532,12 @@ > O << TAI->getPrivateGlobalPrefix() << getFunctionNumber() > << '_' << uid << "_set_" << MBB->getNumber(); > } else if (Subtarget->isPICStyleGOT()) { > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > O << "@GOTOFF"; > } else > assert(0 && "Don't know how to print MBB label for this PIC > mode"); > } else > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > } > > bool X86ATTAsmPrinter::printAsmMRegister(const MachineOperand &MO, > > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Feb 27 > 18:43:03 2008 > @@ -714,6 +714,7 @@ > maxStoresPerMemcpy = 16; // For %llvm.memcpy -> sequence of stores > maxStoresPerMemmove = 16; // For %llvm.memmove -> sequence of stores > allowUnalignedMemoryAccesses = true; // x86 supports it! > + setPrefLoopAlignment(16); > } > > /// getMaxByValAlign - Helper for getByValTypeAlignment to determine > > Modified: llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp Wed Feb 27 > 18:43:03 2008 > @@ -78,7 +78,7 @@ > I != E; ++I) { > // Print a label for the basic block if there are any > predecessors. > if (!I->pred_empty()) { > - printBasicBlockLabel(I, true); > + printBasicBlockLabel(I, true, true); > O << '\n'; > } > for (MachineBasicBlock::const_iterator II = I->begin(), E = I- > >end(); > @@ -242,7 +242,7 @@ > > O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() > << getFunctionNumber() << '_' << uid << "_set_" << MBB- > >getNumber() << ','; > - printBasicBlockLabel(MBB, false, false); > + printBasicBlockLabel(MBB, false, false, false); > O << '-' << "\"L" << getFunctionNumber() << "$pb\"'\n"; > } > > > Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Feb 27 > 18:43:03 2008 > @@ -47,6 +47,7 @@ > switch (Subtarget->TargetType) { > case X86Subtarget::isDarwin: > AlignmentIsInBytes = false; > + TextAlignFillValue = 0x90; > GlobalPrefix = "_"; > if (!Subtarget->is64Bit()) > Data64bitsDirective = 0; // we can't emit a 64-bit unit > > Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Wed Feb 27 > 18:43:03 2008 > @@ -164,6 +164,13 @@ > return true; // -print-machineinstr should print after this. > } > > +bool X86TargetMachine::addPreEmitPass(FunctionPassManager &PM, bool > Fast) { > + if (Fast) return false; > + > + PM.add(createLoopAlignerPass()); > + return true; > +} > + > bool X86TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, > bool Fast, > std::ostream &Out) { > PM.add(createX86CodePrinterPass(Out, *this)); > > Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=47703&r1=47702&r2=47703&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original) > +++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Wed Feb 27 18:43:03 > 2008 > @@ -63,6 +63,7 @@ > // Set up the pass pipeline. > virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); > virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast); > + virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast); > virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, > std::ostream &Out); > virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast, > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From lauro.venancio at gmail.com Thu Feb 28 16:14:09 2008 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Thu, 28 Feb 2008 22:14:09 -0000 Subject: [llvm-commits] [llvm] r47732 - /llvm/trunk/lib/Target/TargetAsmInfo.cpp Message-ID: <200802282214.m1SMEAsg014456@zion.cs.uiuc.edu> Author: laurov Date: Thu Feb 28 16:14:09 2008 New Revision: 47732 URL: http://llvm.org/viewvc/llvm-project?rev=47732&view=rev Log: Initialize TextAlignFillValue. Fix revision 47703. Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=47732&r1=47731&r2=47732&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Thu Feb 28 16:14:09 2008 @@ -54,6 +54,7 @@ Data64bitsDirective("\t.quad\t"), AlignDirective("\t.align\t"), AlignmentIsInBytes(true), + TextAlignFillValue(0), SwitchToSectionDirective("\t.section\t"), TextSectionStartSuffix(""), DataSectionStartSuffix(""), From alenhar2 at cs.uiuc.edu Thu Feb 28 16:24:49 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Thu, 28 Feb 2008 22:24:49 -0000 Subject: [llvm-commits] [llvm] r47733 - in /llvm/trunk: lib/Archive/ArchiveWriter.cpp tools/llvm-ar/llvm-ar.cpp Message-ID: <200802282224.m1SMOngl014864@zion.cs.uiuc.edu> Author: alenhar2 Date: Thu Feb 28 16:24:48 2008 New Revision: 47733 URL: http://llvm.org/viewvc/llvm-project?rev=47733&view=rev Log: Make llvm-ar behave like ar, if you create an empty archive, ar creates an empty archive. llvm-ar would not generate an output file in this case Modified: llvm/trunk/lib/Archive/ArchiveWriter.cpp llvm/trunk/tools/llvm-ar/llvm-ar.cpp Modified: llvm/trunk/lib/Archive/ArchiveWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Archive/ArchiveWriter.cpp?rev=47733&r1=47732&r2=47733&view=diff ============================================================================== --- llvm/trunk/lib/Archive/ArchiveWriter.cpp (original) +++ llvm/trunk/lib/Archive/ArchiveWriter.cpp Thu Feb 28 16:24:48 2008 @@ -348,7 +348,7 @@ { // Make sure they haven't opened up the file, not loaded it, // but are now trying to write it which would wipe out the file. - if (members.empty() && mapfile->size() > 8) { + if (members.empty() && mapfile && mapfile->size() > 8) { if (ErrMsg) *ErrMsg = "Can't write an archive not opened for writing"; return true; Modified: llvm/trunk/tools/llvm-ar/llvm-ar.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-ar/llvm-ar.cpp?rev=47733&r1=47732&r2=47733&view=diff ============================================================================== --- llvm/trunk/tools/llvm-ar/llvm-ar.cpp (original) +++ llvm/trunk/tools/llvm-ar/llvm-ar.cpp Thu Feb 28 16:24:48 2008 @@ -717,6 +717,7 @@ if (!Create) std::cerr << argv[0] << ": creating " << ArchivePath.toString() << "\n"; TheArchive = Archive::CreateEmpty(ArchivePath); + TheArchive->writeToDisk(); } else { std::string Error; TheArchive = Archive::OpenAndLoad(ArchivePath, &Error); From evan.cheng at apple.com Thu Feb 28 16:25:45 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 28 Feb 2008 14:25:45 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: Message-ID: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> Hi Roman, Thanks for doing this. It's been on my todo list forever. :-) I have additional comments apart from Dan's comments. +// Compute longest paths in the DAG void ScheduleDAG::CalculateDepths() { LLVM convention is /// CalculateDepths - Compute ... + WorkList.push_back(SU); + } Please don't use tabs. Latencies[SU->NodeNum] = 1; This should be 0, not 1 since the original code is: if (SU->Succs.empty()) WorkList.push_back(std::make_pair(SU, 0U)); + // If all dependencies of the node are processed already, Tabs. + if(SuccLatency + SU->Latency > SULatency) { Stylistic nitpick #1. Please make sure there is a space between if and '('. + unsigned Degree = --InDegree[SU->NodeNum]; + if (Degree == 0) Stylistic nitpick. if (--InDegree[SU->NodeNum]) For testing, it would be good to run the original code and then the new code and then verify they produce the same numbers. A bug in depth / height calculation is not likely to cause correctness failures but something much more subtile. Thanks, Evan On Feb 28, 2008, at 6:15 AM, Roman Levenstein wrote: > Hi, > > I've implemented some improvements related to the computation of > heights, depths and priorities and latencies of SUnits. > > The basic idea is that all these algorithms are computing the longest > paths from the root node or to the exit node. Therefore I changed the > existing implementation that uses and iterative and potentially > exponential algorithm to a well-known graph algorithm based on dynamic > programming. It has a linear run-time. > > Tests on very big input files with tens of thousends of instructions > in a BB, e.g. big4.bc use-case from Duraid's testsuit, indicate huge > speed-ups (up to 2x) compared to the current version, > > Please review and tell if it is OK for submission. > - Roman > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Thu Feb 28 16:26:27 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 28 Feb 2008 14:26:27 -0800 Subject: [llvm-commits] [llvm] r47703 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/ In-Reply-To: References: <200802280043.m1S0hEBR012866@zion.cs.uiuc.edu> Message-ID: <45405E66-6BB3-427C-B202-14E32653189C@apple.com> Thanks. Can you tell how is it failing? Evan On Feb 28, 2008, at 1:41 PM, Dan Gohman wrote: > Hi Evan, > > This is causing failures on x86-64 too: > > Regression/C++/EH/exception_spec_test [LLC compile, LLC-BETA > compile, , ] > Regression/C++/EH/function_try_block [LLC compile, LLC-BETA > compile, , ] > > Dan > > On Feb 27, 2008, at 4:43 PM, Evan Cheng wrote: > >> Author: evancheng >> Date: Wed Feb 27 18:43:03 2008 >> New Revision: 47703 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=47703&view=rev >> Log: >> Add a quick and dirty "loop aligner pass". x86 uses it to align its >> loops to 16-byte boundaries. >> >> Added: >> llvm/trunk/lib/CodeGen/LoopAligner.cpp >> Modified: >> llvm/trunk/include/llvm/CodeGen/AsmPrinter.h >> llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h >> llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h >> llvm/trunk/include/llvm/CodeGen/Passes.h >> llvm/trunk/include/llvm/Target/TargetAsmInfo.h >> llvm/trunk/include/llvm/Target/TargetLowering.h >> llvm/trunk/lib/CodeGen/AsmPrinter.cpp >> llvm/trunk/lib/CodeGen/BranchFolding.cpp >> llvm/trunk/lib/CodeGen/IfConversion.cpp >> llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp >> llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp >> llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp >> llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp >> llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp >> llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp >> llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp >> llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp >> llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp >> llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp >> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp >> llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp >> llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp >> llvm/trunk/lib/Target/X86/X86TargetMachine.cpp >> llvm/trunk/lib/Target/X86/X86TargetMachine.h >> >> Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) >> +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Wed Feb 27 18:43:03 >> 2008 >> @@ -78,6 +78,10 @@ >> /// CurrentSection - The current section we are emitting to. >> This is >> /// controlled and used by the SwitchSection method. >> std::string CurrentSection; >> + >> + /// IsInTextSection - True if the current section we are >> emitting to is a >> + /// text section. >> + bool IsInTextSection; >> >> protected: >> AsmPrinter(std::ostream &o, TargetMachine &TM, const >> TargetAsmInfo *T); >> @@ -269,9 +273,7 @@ >> /// an explicit alignment requested, it will unconditionally >> override the >> /// alignment request. However, if ForcedAlignBits is >> specified, this value >> /// has final say: the ultimate alignment will be the max of >> ForcedAlignBits >> - /// and the alignment computed with NumBits and the global. If >> UseFillExpr >> - /// is true, it also emits an optional second value FillValue >> which the >> - /// assembler uses to fill gaps to match alignment. >> + /// and the alignment computed with NumBits and the global >> /// >> /// The algorithm is: >> /// Align = NumBits; >> @@ -279,8 +281,7 @@ >> /// Align = std::max(Align, ForcedAlignBits); >> /// >> void EmitAlignment(unsigned NumBits, const GlobalValue *GV = 0, >> - unsigned ForcedAlignBits = 0, bool >> UseFillExpr = false, >> - unsigned FillValue = 0) const; >> + unsigned ForcedAlignBits = 0) const; >> >> /// printLabel - This method prints a local label used by debug >> and >> /// exception handling tables. >> @@ -317,6 +318,7 @@ >> /// printBasicBlockLabel - This method prints the label for the >> specified >> /// MachineBasicBlock >> virtual void printBasicBlockLabel(const MachineBasicBlock *MBB, >> + bool printAlign = false, >> bool printColon = false, >> bool printComment = true) const; >> >> >> Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original) >> +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Wed Feb 27 >> 18:43:03 2008 >> @@ -75,6 +75,10 @@ >> /// LiveIns - Keep track of the physical registers that are livein >> of >> /// the basicblock. >> std::vector LiveIns; >> + >> + /// Alignment - Alignment of the basic block. Zero if the basic >> block does >> + /// not need to be aligned. >> + unsigned Alignment; >> >> /// IsLandingPad - Indicate that this basic block is entered via an >> /// exception handler. >> @@ -82,7 +86,8 @@ >> >> public: >> explicit MachineBasicBlock(const BasicBlock *bb = 0) >> - : Prev(0), Next(0), BB(bb), Number(-1), xParent(0), >> IsLandingPad(false) { >> + : Prev(0), Next(0), BB(bb), Number(-1), xParent(0), >> + Alignment(0), IsLandingPad(false) { >> Insts.parent = this; >> } >> >> @@ -181,6 +186,14 @@ >> const_livein_iterator livein_end() const { return LiveIns.end(); } >> bool livein_empty() const { return LiveIns.empty(); } >> >> + /// getAlignment - Return alignment of the basic block. >> + /// >> + unsigned getAlignment() const { return Alignment; } >> + >> + /// setAlignment - Set alignment of the basic block. >> + /// >> + void setAlignment(unsigned Align) { Alignment = Align; } >> + >> /// isLandingPad - Returns true if the block is a landing pad. >> That is >> /// this basic block is entered via an exception handler. >> bool isLandingPad() const { return IsLandingPad; } >> >> Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original) >> +++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Wed Feb 27 >> 18:43:03 2008 >> @@ -204,7 +204,7 @@ >> } >> >> /// getObjectAlignment - Return the alignment of the specified >> stack object... >> - int getObjectAlignment(int ObjectIdx) const { >> + unsigned getObjectAlignment(int ObjectIdx) const { >> assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() && >> "Invalid Object Idx!"); >> return Objects[ObjectIdx+NumFixedObjects].Alignment; >> >> Modified: llvm/trunk/include/llvm/CodeGen/Passes.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/include/llvm/CodeGen/Passes.h (original) >> +++ llvm/trunk/include/llvm/CodeGen/Passes.h Wed Feb 27 18:43:03 2008 >> @@ -129,6 +129,10 @@ >> /// IfConverter Pass - This pass performs machine code if >> conversion. >> FunctionPass *createIfConverterPass(); >> >> + /// LoopAligner Pass - This pass aligns loop headers to target >> specific >> + /// alignment boundary. >> + FunctionPass *createLoopAlignerPass(); >> + >> /// DebugLabelFoldingPass - This pass prunes out redundant debug >> labels. This >> /// allows a debug emitter to determine if the range of two labels >> is empty, >> /// by seeing if the labels map to the same reduced label. >> >> Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original) >> +++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Feb 27 >> 18:43:03 2008 >> @@ -164,6 +164,10 @@ >> /// boundary. >> bool AlignmentIsInBytes; // Defaults to true >> >> + /// TextAlignFillValue - If non-zero, this is used to fill the >> executable >> + /// space created as the result of a alignment directive. >> + unsigned TextAlignFillValue; >> + >> //===--- Section Switching Directives >> ---------------------------------===// >> >> /// SwitchToSectionDirective - This is the directive used when >> we want to >> @@ -503,6 +507,9 @@ >> bool getAlignmentIsInBytes() const { >> return AlignmentIsInBytes; >> } >> + unsigned getTextAlignFillValue() const { >> + return TextAlignFillValue; >> + } >> const char *getSwitchToSectionDirective() const { >> return SwitchToSectionDirective; >> } >> >> Modified: llvm/trunk/include/llvm/Target/TargetLowering.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) >> +++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Feb 27 >> 18:43:03 2008 >> @@ -548,17 +548,23 @@ >> >> /// getIfCvtBlockLimit - returns the target specific if-conversion >> block size >> /// limit. Any block whose size is greater should not be predicated. >> - virtual unsigned getIfCvtBlockSizeLimit() const { >> + unsigned getIfCvtBlockSizeLimit() const { >> return IfCvtBlockSizeLimit; >> } >> >> /// getIfCvtDupBlockLimit - returns the target specific size limit >> for a >> /// block to be considered for duplication. Any block whose size >> is greater >> /// should not be duplicated to facilitate its predication. >> - virtual unsigned getIfCvtDupBlockSizeLimit() const { >> + unsigned getIfCvtDupBlockSizeLimit() const { >> return IfCvtDupBlockSizeLimit; >> } >> >> + /// getPrefLoopAlignment - return the preferred loop alignment. >> + /// >> + unsigned getPrefLoopAlignment() const { >> + return PrefLoopAlignment; >> + } >> + >> /// getPreIndexedAddressParts - returns true by value, base >> pointer and >> /// offset pointer and addressing mode by reference if the node's >> address >> /// can be legally represented as pre-indexed load / store address. >> @@ -583,7 +589,7 @@ >> /// jumptable. >> virtual SDOperand getPICJumpTableRelocBase(SDOperand Table, >> SelectionDAG &DAG) const; >> - >> + >> // >> = >> = >> =-------------------------------------------------------------------- >> ===// >> // TargetLowering Optimization Methods >> // >> @@ -890,6 +896,12 @@ >> void setIfCvtDupBlockSizeLimit(unsigned Limit) { >> IfCvtDupBlockSizeLimit = Limit; >> } >> + >> + /// setPrefLoopAlignment - Set the target's preferred loop >> alignment. Default >> + /// alignment is zero, it means the target does not care about >> loop alignment. >> + void setPrefLoopAlignment(unsigned Align) { >> + PrefLoopAlignment = Align; >> + } >> >> public: >> >> @@ -1276,6 +1288,10 @@ >> /// duplicated during if-conversion. >> unsigned IfCvtDupBlockSizeLimit; >> >> + /// PrefLoopAlignment - The perferred loop alignment. >> + /// >> + unsigned PrefLoopAlignment; >> + >> /// StackPointerRegisterToSaveRestore - If set to a physical >> register, this >> /// specifies the register that llvm.savestack/llvm.restorestack >> should save >> /// and restore. >> >> Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/CodeGen/AsmPrinter.cpp (original) >> +++ llvm/trunk/lib/CodeGen/AsmPrinter.cpp Wed Feb 27 18:43:03 2008 >> @@ -39,7 +39,8 @@ >> char AsmPrinter::ID = 0; >> AsmPrinter::AsmPrinter(std::ostream &o, TargetMachine &tm, >> const TargetAsmInfo *T) >> - : MachineFunctionPass((intptr_t)&ID), FunctionNumber(0), O(o), >> TM(tm), TAI(T) >> + : MachineFunctionPass((intptr_t)&ID), FunctionNumber(0), O(o), >> TM(tm), TAI(T), >> + IsInTextSection(false) >> {} >> >> std::string AsmPrinter::getSectionForFunction(const Function &F) >> const { >> @@ -69,6 +70,8 @@ >> >> if (!CurrentSection.empty()) >> O << CurrentSection << TAI->getTextSectionStartSuffix() << '\n'; >> + >> + IsInTextSection = true; >> } >> >> /// SwitchToDataSection - Switch to the specified data section of >> the executable >> @@ -93,6 +96,8 @@ >> >> if (!CurrentSection.empty()) >> O << CurrentSection << TAI->getDataSectionStartSuffix() << '\n'; >> + >> + IsInTextSection = false; >> } >> >> >> @@ -344,7 +349,7 @@ >> O << TAI->getPrivateGlobalPrefix() << getFunctionNumber() >> << '_' << uid << "_set_" << MBB->getNumber(); >> } else { >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> // If the arch uses custom Jump Table directives, don't calc >> relative to >> // JT >> if (!HadJTEntryDirective) >> @@ -352,7 +357,7 @@ >> << getFunctionNumber() << '_' << uid; >> } >> } else { >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> } >> } >> >> @@ -679,8 +684,7 @@ >> // Align = std::max(Align, ForcedAlignBits); >> // >> void AsmPrinter::EmitAlignment(unsigned NumBits, const GlobalValue >> *GV, >> - unsigned ForcedAlignBits, bool >> UseFillExpr, >> - unsigned FillValue) const { >> + unsigned ForcedAlignBits) const { >> if (GV && GV->getAlignment()) >> NumBits = Log2_32(GV->getAlignment()); >> NumBits = std::max(NumBits, ForcedAlignBits); >> @@ -688,6 +692,9 @@ >> if (NumBits == 0) return; // No need to emit alignment. >> if (TAI->getAlignmentIsInBytes()) NumBits = 1 << NumBits; >> O << TAI->getAlignDirective() << NumBits; >> + >> + unsigned FillValue = TAI->getTextAlignFillValue(); >> + bool UseFillExpr = IsInTextSection && FillValue; >> if (UseFillExpr) O << ",0x" << std::hex << FillValue << std::dec; >> O << "\n"; >> } >> @@ -1252,7 +1259,7 @@ >> >> if (Modifier[0]=='l') // labels are target independent >> printBasicBlockLabel(MI->getOperand(OpNo).getMBB(), >> - false, false); >> + false, false, false); >> else { >> AsmPrinter *AP = const_cast(this); >> if ((OpFlags & 7) == 4 /*ADDR MODE*/) { >> @@ -1318,8 +1325,15 @@ >> /// printBasicBlockLabel - This method prints the label for the >> specified >> /// MachineBasicBlock >> void AsmPrinter::printBasicBlockLabel(const MachineBasicBlock *MBB, >> + bool printAlign, >> bool printColon, >> bool printComment) const { >> + if (printAlign) { >> + unsigned Align = MBB->getAlignment(); >> + if (Align) >> + EmitAlignment(Log2_32(Align)); >> + } >> + >> O << TAI->getPrivateGlobalPrefix() << "BB" << getFunctionNumber() >> << "_" >> << MBB->getNumber(); >> if (printColon) >> @@ -1338,7 +1352,7 @@ >> >> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() >> << getFunctionNumber() << '_' << uid << "_set_" << MBB- >>> getNumber() << ','; >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << >> getFunctionNumber() >> << '_' << uid << '\n'; >> } >> @@ -1351,7 +1365,7 @@ >> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() >> << getFunctionNumber() << '_' << uid << '_' << uid2 >> << "_set_" << MBB->getNumber() << ','; >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << >> getFunctionNumber() >> << '_' << uid << '_' << uid2 << '\n'; >> } >> >> Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original) >> +++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Wed Feb 27 18:43:03 2008 >> @@ -44,7 +44,7 @@ >> cl::desc("Max number of predecessors to consider tail >> merging"), >> cl::init(100), cl::Hidden); >> >> - struct BranchFolder : public MachineFunctionPass { >> + struct VISIBILITY_HIDDEN BranchFolder : public >> MachineFunctionPass { >> static char ID; >> explicit BranchFolder(bool defaultEnableTailMerge) : >> MachineFunctionPass((intptr_t)&ID) { >> >> Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/CodeGen/IfConversion.cpp (original) >> +++ llvm/trunk/lib/CodeGen/IfConversion.cpp Wed Feb 27 18:43:03 2008 >> @@ -56,7 +56,7 @@ >> STATISTIC(NumDupBBs, "Number of duplicated blocks"); >> >> namespace { >> - class IfConverter : public MachineFunctionPass { >> + class VISIBILITY_HIDDEN IfConverter : public MachineFunctionPass { >> enum IfcvtKind { >> ICNotClassfied, // BB data valid, but not classified. >> ICSimpleFalse, // Same as ICSimple, but on the false path. >> >> Added: llvm/trunk/lib/CodeGen/LoopAligner.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LoopAligner.cpp?rev=47703&view=auto >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/CodeGen/LoopAligner.cpp (added) >> +++ llvm/trunk/lib/CodeGen/LoopAligner.cpp Wed Feb 27 18:43:03 2008 >> @@ -0,0 +1,65 @@ >> +//===-- LoopAligner.cpp - Loop aligner pass. >> ------------------------------===// >> +// >> +// The LLVM Compiler Infrastructure >> +// >> +// This file is distributed under the University of Illinois Open >> Source >> +// License. See LICENSE.TXT for details. >> +// >> +// >> = >> = >> = >> ----------------------------------------------------------------------= >> ==// >> +// >> +// This file implements the pass that align loop headers to target >> specific >> +// alignment boundary. >> +// >> +// >> = >> = >> = >> ----------------------------------------------------------------------= >> ==// >> + >> +#define DEBUG_TYPE "loopalign" >> +#include "llvm/CodeGen/MachineLoopInfo.h" >> +#include "llvm/CodeGen/MachineFunctionPass.h" >> +#include "llvm/CodeGen/Passes.h" >> +#include "llvm/Target/TargetLowering.h" >> +#include "llvm/Target/TargetMachine.h" >> +#include "llvm/Support/Compiler.h" >> +#include "llvm/Support/Debug.h" >> +using namespace llvm; >> + >> +namespace { >> + class LoopAligner : public MachineFunctionPass { >> + const TargetLowering *TLI; >> + >> + public: >> + static char ID; >> + LoopAligner() : MachineFunctionPass((intptr_t)&ID) {} >> + >> + virtual bool runOnMachineFunction(MachineFunction &MF); >> + virtual const char *getPassName() const { return "Loop >> aligner"; } >> + >> + virtual void getAnalysisUsage(AnalysisUsage &AU) const { >> + AU.addRequired(); >> + AU.addPreserved(); >> + MachineFunctionPass::getAnalysisUsage(AU); >> + } >> + }; >> + >> + char LoopAligner::ID = 0; >> +} // end anonymous namespace >> + >> +FunctionPass *llvm::createLoopAlignerPass() { return new >> LoopAligner(); } >> + >> +bool LoopAligner::runOnMachineFunction(MachineFunction &MF) { >> + const MachineLoopInfo *MLI = &getAnalysis(); >> + >> + if (MLI->begin() == MLI->end()) >> + return false; // No loops. >> + >> + unsigned Align = MF.getTarget().getTargetLowering()- >>> getPrefLoopAlignment(); >> + if (!Align) >> + return false; // Don't care about loop alignment. >> + >> + for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != >> E; ++I) { >> + MachineBasicBlock *MBB = I; >> + if (MLI->isLoopHeader(MBB)) >> + MBB->setAlignment(Align); >> + } >> + >> + return true; >> +} >> >> Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original) >> +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Wed Feb 27 18:43:03 >> 2008 >> @@ -166,6 +166,7 @@ >> if (LBB) OS << LBB->getName() << ": "; >> OS << (const void*)this >> << ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber(); >> + if (Alignment) OS << ", Alignment " << Alignment; >> if (isLandingPad()) OS << ", EH LANDING PAD"; >> OS << ":\n"; >> >> >> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) >> +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Feb >> 27 18:43:03 2008 >> @@ -206,6 +206,8 @@ >> JumpBufSize = 0; >> JumpBufAlignment = 0; >> IfCvtBlockSizeLimit = 2; >> + IfCvtDupBlockSizeLimit = 0; >> + PrefLoopAlignment = 0; >> >> InitLibcallNames(LibcallRoutineNames); >> InitCmpLibcallCCs(CmpLibcallCCs); >> >> Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Wed Feb 27 18:43:03 >> 2008 >> @@ -248,7 +248,7 @@ >> I != E; ++I) { >> // Print a label for the basic block. >> if (I != MF.begin()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >>> end(); >> @@ -710,13 +710,13 @@ >> << '_' << JTI << '_' << MO2.getImm() >> << "_set_" << MBB->getNumber(); >> else if (TM.getRelocationModel() == Reloc::PIC_) { >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> // If the arch uses custom Jump Table directives, don't calc >> relative to JT >> if (!TAI->getJumpTableDirective()) >> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" >> << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm(); >> } else >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> if (i != e-1) >> O << '\n'; >> } >> >> Modified: llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -171,7 +171,7 @@ >> for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); >> I != E; ++I) { >> if (I != MF.begin()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >>> end(); >> >> Modified: llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -460,7 +460,7 @@ >> I != E; ++I) { >> // Print a label for the basic block. >> if (I != MF.begin()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >>> end(); >> >> Modified: llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -149,7 +149,7 @@ >> I != E; ++I) { >> // Print a label for the basic block if there are any >> predecessors. >> if (!I->pred_empty()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >>> end(); >> >> Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -297,7 +297,7 @@ >> >> // Print a label for the basic block. >> if (I != MF.begin()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> >> >> Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -604,7 +604,7 @@ >> I != E; ++I) { >> // Print a label for the basic block. >> if (I != MF.begin()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >>> end(); >> @@ -838,7 +838,7 @@ >> I != E; ++I) { >> // Print a label for the basic block. >> if (I != MF.begin()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), IE = I- >>> end(); >> >> Modified: llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -116,7 +116,7 @@ >> I != E; ++I) { >> // Print a label for the basic block. >> if (I != MF.begin()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >>> end(); >> >> Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -101,36 +101,25 @@ >> switch (F->getLinkage()) { >> default: assert(0 && "Unknown linkage type!"); >> case Function::InternalLinkage: // Symbols default to internal. >> - if (Subtarget->isTargetDarwin()) >> - // FIXME: This should be parameterized somewhere. >> - EmitAlignment(4, F, 0, true, 0x90); >> - else >> - EmitAlignment(4, F); >> + EmitAlignment(4, F); >> break; >> case Function::DLLExportLinkage: >> DLLExportedFns.insert(Mang->makeNameProper(F->getName(), "")); >> //FALLS THROUGH >> case Function::ExternalLinkage: >> - if (Subtarget->isTargetDarwin()) >> - // FIXME: This should be parameterized somewhere. >> - EmitAlignment(4, F, 0, true, 0x90); >> - else >> - EmitAlignment(4, F); >> + EmitAlignment(4, F); >> O << "\t.globl\t" << CurrentFnName << "\n"; >> break; >> case Function::LinkOnceLinkage: >> case Function::WeakLinkage: >> + EmitAlignment(4, F); >> if (Subtarget->isTargetDarwin()) { >> - // FIXME: This should be parameterized somewhere. >> - EmitAlignment(4, F, 0, true, 0x90); >> O << "\t.globl\t" << CurrentFnName << "\n"; >> O << TAI->getWeakDefDirective() << CurrentFnName << "\n"; >> } else if (Subtarget->isTargetCygMing()) { >> - EmitAlignment(4, F); >> O << "\t.globl\t" << CurrentFnName << "\n"; >> O << "\t.linkonce discard\n"; >> } else { >> - EmitAlignment(4, F); >> O << "\t.weak\t" << CurrentFnName << "\n"; >> } >> break; >> @@ -180,7 +169,7 @@ >> I != E; ++I) { >> // Print a label for the basic block. >> if (!I->pred_empty()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), IE = I- >>> end(); >> @@ -515,7 +504,7 @@ >> >> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() >> << getFunctionNumber() << '_' << uid << "_set_" << MBB- >>> getNumber() << ','; >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> if (Subtarget->isPICStyleRIPRel()) >> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << >> getFunctionNumber() >> << '_' << uid << '\n'; >> @@ -543,12 +532,12 @@ >> O << TAI->getPrivateGlobalPrefix() << getFunctionNumber() >> << '_' << uid << "_set_" << MBB->getNumber(); >> } else if (Subtarget->isPICStyleGOT()) { >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> O << "@GOTOFF"; >> } else >> assert(0 && "Don't know how to print MBB label for this PIC >> mode"); >> } else >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> } >> >> bool X86ATTAsmPrinter::printAsmMRegister(const MachineOperand &MO, >> >> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) >> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -714,6 +714,7 @@ >> maxStoresPerMemcpy = 16; // For %llvm.memcpy -> sequence of stores >> maxStoresPerMemmove = 16; // For %llvm.memmove -> sequence of stores >> allowUnalignedMemoryAccesses = true; // x86 supports it! >> + setPrefLoopAlignment(16); >> } >> >> /// getMaxByValAlign - Helper for getByValTypeAlignment to determine >> >> Modified: llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -78,7 +78,7 @@ >> I != E; ++I) { >> // Print a label for the basic block if there are any >> predecessors. >> if (!I->pred_empty()) { >> - printBasicBlockLabel(I, true); >> + printBasicBlockLabel(I, true, true); >> O << '\n'; >> } >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >>> end(); >> @@ -242,7 +242,7 @@ >> >> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() >> << getFunctionNumber() << '_' << uid << "_set_" << MBB- >>> getNumber() << ','; >> - printBasicBlockLabel(MBB, false, false); >> + printBasicBlockLabel(MBB, false, false, false); >> O << '-' << "\"L" << getFunctionNumber() << "$pb\"'\n"; >> } >> >> >> Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original) >> +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -47,6 +47,7 @@ >> switch (Subtarget->TargetType) { >> case X86Subtarget::isDarwin: >> AlignmentIsInBytes = false; >> + TextAlignFillValue = 0x90; >> GlobalPrefix = "_"; >> if (!Subtarget->is64Bit()) >> Data64bitsDirective = 0; // we can't emit a 64-bit unit >> >> Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) >> +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Wed Feb 27 >> 18:43:03 2008 >> @@ -164,6 +164,13 @@ >> return true; // -print-machineinstr should print after this. >> } >> >> +bool X86TargetMachine::addPreEmitPass(FunctionPassManager &PM, bool >> Fast) { >> + if (Fast) return false; >> + >> + PM.add(createLoopAlignerPass()); >> + return true; >> +} >> + >> bool X86TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, >> bool Fast, >> std::ostream &Out) { >> PM.add(createX86CodePrinterPass(Out, *this)); >> >> Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=47703&r1=47702&r2=47703&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original) >> +++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Wed Feb 27 18:43:03 >> 2008 >> @@ -63,6 +63,7 @@ >> // Set up the pass pipeline. >> virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); >> virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast); >> + virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast); >> virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, >> std::ostream &Out); >> virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast, >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From lauro.venancio at gmail.com Thu Feb 28 16:29:16 2008 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Thu, 28 Feb 2008 19:29:16 -0300 Subject: [llvm-commits] [llvm] r47703 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Targe In-Reply-To: <08CFC56C-E0C7-4157-8E5D-E7279A85A0C5@apple.com> References: <9c10c9f0802281045x4f0e285awf0b39d818ee122bc@mail.gmail.com> <08CFC56C-E0C7-4157-8E5D-E7279A85A0C5@apple.com> Message-ID: <9c10c9f0802281429s5ff2bf27yc3761a84d2c39b91@mail.gmail.com> Thanks, Evan. I think I found the problem. http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20080225/058956.html Lauro 2008/2/28, Evan Cheng : > They are not failing on Mac OS X so it's probably target / platform > specific. Can you tell me how they are failing? > > > Evan > > > On Feb 28, 2008, at 10:45 AM, Lauro Ramos Venancio wrote: > > > Hi Evan, > > > > This patch caused many regressions. See > > http://lists.cs.uiuc.edu/pipermail/llvm-testresults/2008-February/008336.html > > > > Lauro > > > > 2008/2/27, Evan Cheng : > >> Author: evancheng > >> Date: Wed Feb 27 18:43:03 2008 > >> New Revision: 47703 > >> > >> URL: http://llvm.org/viewvc/llvm-project?rev=47703&view=rev > >> Log: > >> Add a quick and dirty "loop aligner pass". x86 uses it to align its > >> loops to 16-byte boundaries. > >> > >> Added: > >> llvm/trunk/lib/CodeGen/LoopAligner.cpp > >> Modified: > >> llvm/trunk/include/llvm/CodeGen/AsmPrinter.h > >> llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h > >> llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h > >> llvm/trunk/include/llvm/CodeGen/Passes.h > >> llvm/trunk/include/llvm/Target/TargetAsmInfo.h > >> llvm/trunk/include/llvm/Target/TargetLowering.h > >> llvm/trunk/lib/CodeGen/AsmPrinter.cpp > >> llvm/trunk/lib/CodeGen/BranchFolding.cpp > >> llvm/trunk/lib/CodeGen/IfConversion.cpp > >> llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp > >> llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp > >> llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp > >> llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp > >> llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp > >> llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp > >> llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp > >> llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp > >> llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp > >> llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp > >> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > >> llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp > >> llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp > >> llvm/trunk/lib/Target/X86/X86TargetMachine.cpp > >> llvm/trunk/lib/Target/X86/X86TargetMachine.h > >> > >> Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) > >> +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Wed Feb 27 > >> 18:43:03 2008 > >> @@ -78,6 +78,10 @@ > >> /// CurrentSection - The current section we are emitting to. > >> This is > >> /// controlled and used by the SwitchSection method. > >> std::string CurrentSection; > >> + > >> + /// IsInTextSection - True if the current section we are > >> emitting to is a > >> + /// text section. > >> + bool IsInTextSection; > >> > >> protected: > >> AsmPrinter(std::ostream &o, TargetMachine &TM, const > >> TargetAsmInfo *T); > >> @@ -269,9 +273,7 @@ > >> /// an explicit alignment requested, it will unconditionally > >> override the > >> /// alignment request. However, if ForcedAlignBits is > >> specified, this value > >> /// has final say: the ultimate alignment will be the max of > >> ForcedAlignBits > >> - /// and the alignment computed with NumBits and the global. If > >> UseFillExpr > >> - /// is true, it also emits an optional second value FillValue > >> which the > >> - /// assembler uses to fill gaps to match alignment. > >> + /// and the alignment computed with NumBits and the global > >> /// > >> /// The algorithm is: > >> /// Align = NumBits; > >> @@ -279,8 +281,7 @@ > >> /// Align = std::max(Align, ForcedAlignBits); > >> /// > >> void EmitAlignment(unsigned NumBits, const GlobalValue *GV = 0, > >> - unsigned ForcedAlignBits = 0, bool > >> UseFillExpr = false, > >> - unsigned FillValue = 0) const; > >> + unsigned ForcedAlignBits = 0) const; > >> > >> /// printLabel - This method prints a local label used by debug > >> and > >> /// exception handling tables. > >> @@ -317,6 +318,7 @@ > >> /// printBasicBlockLabel - This method prints the label for the > >> specified > >> /// MachineBasicBlock > >> virtual void printBasicBlockLabel(const MachineBasicBlock *MBB, > >> + bool printAlign = false, > >> bool printColon = false, > >> bool printComment = true) > >> const; > >> > >> > >> Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original) > >> +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Wed Feb 27 > >> 18:43:03 2008 > >> @@ -75,6 +75,10 @@ > >> /// LiveIns - Keep track of the physical registers that are > >> livein of > >> /// the basicblock. > >> std::vector LiveIns; > >> + > >> + /// Alignment - Alignment of the basic block. Zero if the basic > >> block does > >> + /// not need to be aligned. > >> + unsigned Alignment; > >> > >> /// IsLandingPad - Indicate that this basic block is entered via an > >> /// exception handler. > >> @@ -82,7 +86,8 @@ > >> > >> public: > >> explicit MachineBasicBlock(const BasicBlock *bb = 0) > >> - : Prev(0), Next(0), BB(bb), Number(-1), xParent(0), > >> IsLandingPad(false) { > >> + : Prev(0), Next(0), BB(bb), Number(-1), xParent(0), > >> + Alignment(0), IsLandingPad(false) { > >> Insts.parent = this; > >> } > >> > >> @@ -181,6 +186,14 @@ > >> const_livein_iterator livein_end() const { return > >> LiveIns.end(); } > >> bool livein_empty() const { return LiveIns.empty(); } > >> > >> + /// getAlignment - Return alignment of the basic block. > >> + /// > >> + unsigned getAlignment() const { return Alignment; } > >> + > >> + /// setAlignment - Set alignment of the basic block. > >> + /// > >> + void setAlignment(unsigned Align) { Alignment = Align; } > >> + > >> /// isLandingPad - Returns true if the block is a landing pad. > >> That is > >> /// this basic block is entered via an exception handler. > >> bool isLandingPad() const { return IsLandingPad; } > >> > >> Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original) > >> +++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Wed Feb 27 > >> 18:43:03 2008 > >> @@ -204,7 +204,7 @@ > >> } > >> > >> /// getObjectAlignment - Return the alignment of the specified > >> stack object... > >> - int getObjectAlignment(int ObjectIdx) const { > >> + unsigned getObjectAlignment(int ObjectIdx) const { > >> assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() && > >> "Invalid Object Idx!"); > >> return Objects[ObjectIdx+NumFixedObjects].Alignment; > >> > >> Modified: llvm/trunk/include/llvm/CodeGen/Passes.h > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/include/llvm/CodeGen/Passes.h (original) > >> +++ llvm/trunk/include/llvm/CodeGen/Passes.h Wed Feb 27 18:43:03 2008 > >> @@ -129,6 +129,10 @@ > >> /// IfConverter Pass - This pass performs machine code if > >> conversion. > >> FunctionPass *createIfConverterPass(); > >> > >> + /// LoopAligner Pass - This pass aligns loop headers to target > >> specific > >> + /// alignment boundary. > >> + FunctionPass *createLoopAlignerPass(); > >> + > >> /// DebugLabelFoldingPass - This pass prunes out redundant debug > >> labels. This > >> /// allows a debug emitter to determine if the range of two > >> labels is empty, > >> /// by seeing if the labels map to the same reduced label. > >> > >> Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original) > >> +++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Feb 27 > >> 18:43:03 2008 > >> @@ -164,6 +164,10 @@ > >> /// boundary. > >> bool AlignmentIsInBytes; // Defaults to true > >> > >> + /// TextAlignFillValue - If non-zero, this is used to fill the > >> executable > >> + /// space created as the result of a alignment directive. > >> + unsigned TextAlignFillValue; > >> + > >> //===--- Section Switching Directives > >> ---------------------------------===// > >> > >> /// SwitchToSectionDirective - This is the directive used when > >> we want to > >> @@ -503,6 +507,9 @@ > >> bool getAlignmentIsInBytes() const { > >> return AlignmentIsInBytes; > >> } > >> + unsigned getTextAlignFillValue() const { > >> + return TextAlignFillValue; > >> + } > >> const char *getSwitchToSectionDirective() const { > >> return SwitchToSectionDirective; > >> } > >> > >> Modified: llvm/trunk/include/llvm/Target/TargetLowering.h > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) > >> +++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Feb 27 > >> 18:43:03 2008 > >> @@ -548,17 +548,23 @@ > >> > >> /// getIfCvtBlockLimit - returns the target specific if- > >> conversion block size > >> /// limit. Any block whose size is greater should not be > >> predicated. > >> - virtual unsigned getIfCvtBlockSizeLimit() const { > >> + unsigned getIfCvtBlockSizeLimit() const { > >> return IfCvtBlockSizeLimit; > >> } > >> > >> /// getIfCvtDupBlockLimit - returns the target specific size > >> limit for a > >> /// block to be considered for duplication. Any block whose size > >> is greater > >> /// should not be duplicated to facilitate its predication. > >> - virtual unsigned getIfCvtDupBlockSizeLimit() const { > >> + unsigned getIfCvtDupBlockSizeLimit() const { > >> return IfCvtDupBlockSizeLimit; > >> } > >> > >> + /// getPrefLoopAlignment - return the preferred loop alignment. > >> + /// > >> + unsigned getPrefLoopAlignment() const { > >> + return PrefLoopAlignment; > >> + } > >> + > >> /// getPreIndexedAddressParts - returns true by value, base > >> pointer and > >> /// offset pointer and addressing mode by reference if the node's > >> address > >> /// can be legally represented as pre-indexed load / store address. > >> @@ -583,7 +589,7 @@ > >> /// jumptable. > >> virtual SDOperand getPICJumpTableRelocBase(SDOperand Table, > >> SelectionDAG &DAG) > >> const; > >> - > >> + > >> // > >> = > >> = > >> = > >> -------------------------------------------------------------------- > >> ===// > >> // TargetLowering Optimization Methods > >> // > >> @@ -890,6 +896,12 @@ > >> void setIfCvtDupBlockSizeLimit(unsigned Limit) { > >> IfCvtDupBlockSizeLimit = Limit; > >> } > >> + > >> + /// setPrefLoopAlignment - Set the target's preferred loop > >> alignment. Default > >> + /// alignment is zero, it means the target does not care about > >> loop alignment. > >> + void setPrefLoopAlignment(unsigned Align) { > >> + PrefLoopAlignment = Align; > >> + } > >> > >> public: > >> > >> @@ -1276,6 +1288,10 @@ > >> /// duplicated during if-conversion. > >> unsigned IfCvtDupBlockSizeLimit; > >> > >> + /// PrefLoopAlignment - The perferred loop alignment. > >> + /// > >> + unsigned PrefLoopAlignment; > >> + > >> /// StackPointerRegisterToSaveRestore - If set to a physical > >> register, this > >> /// specifies the register that llvm.savestack/llvm.restorestack > >> should save > >> /// and restore. > >> > >> Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/CodeGen/AsmPrinter.cpp (original) > >> +++ llvm/trunk/lib/CodeGen/AsmPrinter.cpp Wed Feb 27 18:43:03 2008 > >> @@ -39,7 +39,8 @@ > >> char AsmPrinter::ID = 0; > >> AsmPrinter::AsmPrinter(std::ostream &o, TargetMachine &tm, > >> const TargetAsmInfo *T) > >> - : MachineFunctionPass((intptr_t)&ID), FunctionNumber(0), O(o), > >> TM(tm), TAI(T) > >> + : MachineFunctionPass((intptr_t)&ID), FunctionNumber(0), O(o), > >> TM(tm), TAI(T), > >> + IsInTextSection(false) > >> {} > >> > >> std::string AsmPrinter::getSectionForFunction(const Function &F) > >> const { > >> @@ -69,6 +70,8 @@ > >> > >> if (!CurrentSection.empty()) > >> O << CurrentSection << TAI->getTextSectionStartSuffix() << '\n'; > >> + > >> + IsInTextSection = true; > >> } > >> > >> /// SwitchToDataSection - Switch to the specified data section of > >> the executable > >> @@ -93,6 +96,8 @@ > >> > >> if (!CurrentSection.empty()) > >> O << CurrentSection << TAI->getDataSectionStartSuffix() << '\n'; > >> + > >> + IsInTextSection = false; > >> } > >> > >> > >> @@ -344,7 +349,7 @@ > >> O << TAI->getPrivateGlobalPrefix() << getFunctionNumber() > >> << '_' << uid << "_set_" << MBB->getNumber(); > >> } else { > >> - printBasicBlockLabel(MBB, false, false); > >> + printBasicBlockLabel(MBB, false, false, false); > >> // If the arch uses custom Jump Table directives, don't calc > >> relative to > >> // JT > >> if (!HadJTEntryDirective) > >> @@ -352,7 +357,7 @@ > >> << getFunctionNumber() << '_' << uid; > >> } > >> } else { > >> - printBasicBlockLabel(MBB, false, false); > >> + printBasicBlockLabel(MBB, false, false, false); > >> } > >> } > >> > >> @@ -679,8 +684,7 @@ > >> // Align = std::max(Align, ForcedAlignBits); > >> // > >> void AsmPrinter::EmitAlignment(unsigned NumBits, const GlobalValue > >> *GV, > >> - unsigned ForcedAlignBits, bool > >> UseFillExpr, > >> - unsigned FillValue) const { > >> + unsigned ForcedAlignBits) const { > >> if (GV && GV->getAlignment()) > >> NumBits = Log2_32(GV->getAlignment()); > >> NumBits = std::max(NumBits, ForcedAlignBits); > >> @@ -688,6 +692,9 @@ > >> if (NumBits == 0) return; // No need to emit alignment. > >> if (TAI->getAlignmentIsInBytes()) NumBits = 1 << NumBits; > >> O << TAI->getAlignDirective() << NumBits; > >> + > >> + unsigned FillValue = TAI->getTextAlignFillValue(); > >> + bool UseFillExpr = IsInTextSection && FillValue; > >> if (UseFillExpr) O << ",0x" << std::hex << FillValue << std::dec; > >> O << "\n"; > >> } > >> @@ -1252,7 +1259,7 @@ > >> > >> if (Modifier[0]=='l') // labels are target independent > >> printBasicBlockLabel(MI->getOperand(OpNo).getMBB(), > >> - false, false); > >> + false, false, false); > >> else { > >> AsmPrinter *AP = const_cast(this); > >> if ((OpFlags & 7) == 4 /*ADDR MODE*/) { > >> @@ -1318,8 +1325,15 @@ > >> /// printBasicBlockLabel - This method prints the label for the > >> specified > >> /// MachineBasicBlock > >> void AsmPrinter::printBasicBlockLabel(const MachineBasicBlock *MBB, > >> + bool printAlign, > >> bool printColon, > >> bool printComment) const { > >> + if (printAlign) { > >> + unsigned Align = MBB->getAlignment(); > >> + if (Align) > >> + EmitAlignment(Log2_32(Align)); > >> + } > >> + > >> O << TAI->getPrivateGlobalPrefix() << "BB" << getFunctionNumber() > >> << "_" > >> << MBB->getNumber(); > >> if (printColon) > >> @@ -1338,7 +1352,7 @@ > >> > >> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() > >> << getFunctionNumber() << '_' << uid << "_set_" << MBB- > >> >getNumber() << ','; > >> - printBasicBlockLabel(MBB, false, false); > >> + printBasicBlockLabel(MBB, false, false, false); > >> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << > >> getFunctionNumber() > >> << '_' << uid << '\n'; > >> } > >> @@ -1351,7 +1365,7 @@ > >> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() > >> << getFunctionNumber() << '_' << uid << '_' << uid2 > >> << "_set_" << MBB->getNumber() << ','; > >> - printBasicBlockLabel(MBB, false, false); > >> + printBasicBlockLabel(MBB, false, false, false); > >> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << > >> getFunctionNumber() > >> << '_' << uid << '_' << uid2 << '\n'; > >> } > >> > >> Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original) > >> +++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Wed Feb 27 18:43:03 2008 > >> @@ -44,7 +44,7 @@ > >> cl::desc("Max number of predecessors to consider tail > >> merging"), > >> cl::init(100), cl::Hidden); > >> > >> - struct BranchFolder : public MachineFunctionPass { > >> + struct VISIBILITY_HIDDEN BranchFolder : public > >> MachineFunctionPass { > >> static char ID; > >> explicit BranchFolder(bool defaultEnableTailMerge) : > >> MachineFunctionPass((intptr_t)&ID) { > >> > >> Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/CodeGen/IfConversion.cpp (original) > >> +++ llvm/trunk/lib/CodeGen/IfConversion.cpp Wed Feb 27 18:43:03 2008 > >> @@ -56,7 +56,7 @@ > >> STATISTIC(NumDupBBs, "Number of duplicated blocks"); > >> > >> namespace { > >> - class IfConverter : public MachineFunctionPass { > >> + class VISIBILITY_HIDDEN IfConverter : public MachineFunctionPass { > >> enum IfcvtKind { > >> ICNotClassfied, // BB data valid, but not classified. > >> ICSimpleFalse, // Same as ICSimple, but on the false path. > >> > >> Added: llvm/trunk/lib/CodeGen/LoopAligner.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LoopAligner.cpp?rev=47703&view=auto > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/CodeGen/LoopAligner.cpp (added) > >> +++ llvm/trunk/lib/CodeGen/LoopAligner.cpp Wed Feb 27 18:43:03 2008 > >> @@ -0,0 +1,65 @@ > >> +//===-- LoopAligner.cpp - Loop aligner pass. > >> ------------------------------===// > >> +// > >> +// The LLVM Compiler Infrastructure > >> +// > >> +// This file is distributed under the University of Illinois Open > >> Source > >> +// License. See LICENSE.TXT for details. > >> +// > >> +// > >> = > >> = > >> = > >> ----------------------------------------------------------------------= > >> ==// > >> +// > >> +// This file implements the pass that align loop headers to target > >> specific > >> +// alignment boundary. > >> +// > >> +// > >> = > >> = > >> = > >> ----------------------------------------------------------------------= > >> ==// > >> + > >> +#define DEBUG_TYPE "loopalign" > >> +#include "llvm/CodeGen/MachineLoopInfo.h" > >> +#include "llvm/CodeGen/MachineFunctionPass.h" > >> +#include "llvm/CodeGen/Passes.h" > >> +#include "llvm/Target/TargetLowering.h" > >> +#include "llvm/Target/TargetMachine.h" > >> +#include "llvm/Support/Compiler.h" > >> +#include "llvm/Support/Debug.h" > >> +using namespace llvm; > >> + > >> +namespace { > >> + class LoopAligner : public MachineFunctionPass { > >> + const TargetLowering *TLI; > >> + > >> + public: > >> + static char ID; > >> + LoopAligner() : MachineFunctionPass((intptr_t)&ID) {} > >> + > >> + virtual bool runOnMachineFunction(MachineFunction &MF); > >> + virtual const char *getPassName() const { return "Loop > >> aligner"; } > >> + > >> + virtual void getAnalysisUsage(AnalysisUsage &AU) const { > >> + AU.addRequired(); > >> + AU.addPreserved(); > >> + MachineFunctionPass::getAnalysisUsage(AU); > >> + } > >> + }; > >> + > >> + char LoopAligner::ID = 0; > >> +} // end anonymous namespace > >> + > >> +FunctionPass *llvm::createLoopAlignerPass() { return new > >> LoopAligner(); } > >> + > >> +bool LoopAligner::runOnMachineFunction(MachineFunction &MF) { > >> + const MachineLoopInfo *MLI = &getAnalysis(); > >> + > >> + if (MLI->begin() == MLI->end()) > >> + return false; // No loops. > >> + > >> + unsigned Align = MF.getTarget().getTargetLowering()- > >> >getPrefLoopAlignment(); > >> + if (!Align) > >> + return false; // Don't care about loop alignment. > >> + > >> + for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I ! > >> = E; ++I) { > >> + MachineBasicBlock *MBB = I; > >> + if (MLI->isLoopHeader(MBB)) > >> + MBB->setAlignment(Align); > >> + } > >> + > >> + return true; > >> +} > >> > >> Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original) > >> +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Wed Feb 27 > >> 18:43:03 2008 > >> @@ -166,6 +166,7 @@ > >> if (LBB) OS << LBB->getName() << ": "; > >> OS << (const void*)this > >> << ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber(); > >> + if (Alignment) OS << ", Alignment " << Alignment; > >> if (isLandingPad()) OS << ", EH LANDING PAD"; > >> OS << ":\n"; > >> > >> > >> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) > >> +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Feb > >> 27 18:43:03 2008 > >> @@ -206,6 +206,8 @@ > >> JumpBufSize = 0; > >> JumpBufAlignment = 0; > >> IfCvtBlockSizeLimit = 2; > >> + IfCvtDupBlockSizeLimit = 0; > >> + PrefLoopAlignment = 0; > >> > >> InitLibcallNames(LibcallRoutineNames); > >> InitCmpLibcallCCs(CmpLibcallCCs); > >> > >> Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original) > >> +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Wed Feb 27 18:43:03 > >> 2008 > >> @@ -248,7 +248,7 @@ > >> I != E; ++I) { > >> // Print a label for the basic block. > >> if (I != MF.begin()) { > >> - printBasicBlockLabel(I, true); > >> + printBasicBlockLabel(I, true, true); > >> O << '\n'; > >> } > >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- > >> >end(); > >> @@ -710,13 +710,13 @@ > >> << '_' << JTI << '_' << MO2.getImm() > >> << "_set_" << MBB->getNumber(); > >> else if (TM.getRelocationModel() == Reloc::PIC_) { > >> - printBasicBlockLabel(MBB, false, false); > >> + printBasicBlockLabel(MBB, false, false, false); > >> // If the arch uses custom Jump Table directives, don't calc > >> relative to JT > >> if (!TAI->getJumpTableDirective()) > >> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" > >> << getFunctionNumber() << '_' << JTI << '_' << > >> MO2.getImm(); > >> } else > >> - printBasicBlockLabel(MBB, false, false); > >> + printBasicBlockLabel(MBB, false, false, false); > >> if (i != e-1) > >> O << '\n'; > >> } > >> > >> Modified: llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp (original) > >> +++ llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp Wed Feb 27 > >> 18:43:03 2008 > >> @@ -171,7 +171,7 @@ > >> for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); > >> I != E; ++I) { > >> if (I != MF.begin()) { > >> - printBasicBlockLabel(I, true); > >> + printBasicBlockLabel(I, true, true); > >> O << '\n'; > >> } > >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- > >> >end(); > >> > >> Modified: llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp (original) > >> +++ llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp Wed Feb 27 > >> 18:43:03 2008 > >> @@ -460,7 +460,7 @@ > >> I != E; ++I) { > >> // Print a label for the basic block. > >> if (I != MF.begin()) { > >> - printBasicBlockLabel(I, true); > >> + printBasicBlockLabel(I, true, true); > >> O << '\n'; > >> } > >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- > >> >end(); > >> > >> Modified: llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp (original) > >> +++ llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp Wed Feb 27 > >> 18:43:03 2008 > >> @@ -149,7 +149,7 @@ > >> I != E; ++I) { > >> // Print a label for the basic block if there are any > >> predecessors. > >> if (!I->pred_empty()) { > >> - printBasicBlockLabel(I, true); > >> + printBasicBlockLabel(I, true, true); > >> O << '\n'; > >> } > >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- > >> >end(); > >> > >> Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original) > >> +++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Wed Feb 27 > >> 18:43:03 2008 > >> @@ -297,7 +297,7 @@ > >> > >> // Print a label for the basic block. > >> if (I != MF.begin()) { > >> - printBasicBlockLabel(I, true); > >> + printBasicBlockLabel(I, true, true); > >> O << '\n'; > >> } > >> > >> > >> Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original) > >> +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed Feb 27 > >> 18:43:03 2008 > >> @@ -604,7 +604,7 @@ > >> I != E; ++I) { > >> // Print a label for the basic block. > >> if (I != MF.begin()) { > >> - printBasicBlockLabel(I, true); > >> + printBasicBlockLabel(I, true, true); > >> O << '\n'; > >> } > >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- > >> >end(); > >> @@ -838,7 +838,7 @@ > >> I != E; ++I) { > >> // Print a label for the basic block. > >> if (I != MF.begin()) { > >> - printBasicBlockLabel(I, true); > >> + printBasicBlockLabel(I, true, true); > >> O << '\n'; > >> } > >> for (MachineBasicBlock::const_iterator II = I->begin(), IE = I- > >> >end(); > >> > >> Modified: llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp (original) > >> +++ llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp Wed Feb 27 > >> 18:43:03 2008 > >> @@ -116,7 +116,7 @@ > >> I != E; ++I) { > >> // Print a label for the basic block. > >> if (I != MF.begin()) { > >> - printBasicBlockLabel(I, true); > >> + printBasicBlockLabel(I, true, true); > >> O << '\n'; > >> } > >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- > >> >end(); > >> > >> Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original) > >> +++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Feb 27 > >> 18:43:03 2008 > >> @@ -101,36 +101,25 @@ > >> switch (F->getLinkage()) { > >> default: assert(0 && "Unknown linkage type!"); > >> case Function::InternalLinkage: // Symbols default to internal. > >> - if (Subtarget->isTargetDarwin()) > >> - // FIXME: This should be parameterized somewhere. > >> - EmitAlignment(4, F, 0, true, 0x90); > >> - else > >> - EmitAlignment(4, F); > >> + EmitAlignment(4, F); > >> break; > >> case Function::DLLExportLinkage: > >> DLLExportedFns.insert(Mang->makeNameProper(F->getName(), "")); > >> //FALLS THROUGH > >> case Function::ExternalLinkage: > >> - if (Subtarget->isTargetDarwin()) > >> - // FIXME: This should be parameterized somewhere. > >> - EmitAlignment(4, F, 0, true, 0x90); > >> - else > >> - EmitAlignment(4, F); > >> + EmitAlignment(4, F); > >> O << "\t.globl\t" << CurrentFnName << "\n"; > >> break; > >> case Function::LinkOnceLinkage: > >> case Function::WeakLinkage: > >> + EmitAlignment(4, F); > >> if (Subtarget->isTargetDarwin()) { > >> - // FIXME: This should be parameterized somewhere. > >> - EmitAlignment(4, F, 0, true, 0x90); > >> O << "\t.globl\t" << CurrentFnName << "\n"; > >> O << TAI->getWeakDefDirective() << CurrentFnName << "\n"; > >> } else if (Subtarget->isTargetCygMing()) { > >> - EmitAlignment(4, F); > >> O << "\t.globl\t" << CurrentFnName << "\n"; > >> O << "\t.linkonce discard\n"; > >> } else { > >> - EmitAlignment(4, F); > >> O << "\t.weak\t" << CurrentFnName << "\n"; > >> } > >> break; > >> @@ -180,7 +169,7 @@ > >> I != E; ++I) { > >> // Print a label for the basic block. > >> if (!I->pred_empty()) { > >> - printBasicBlockLabel(I, true); > >> + printBasicBlockLabel(I, true, true); > >> O << '\n'; > >> } > >> for (MachineBasicBlock::const_iterator II = I->begin(), IE = I- > >> >end(); > >> @@ -515,7 +504,7 @@ > >> > >> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() > >> << getFunctionNumber() << '_' << uid << "_set_" << MBB- > >> >getNumber() << ','; > >> - printBasicBlockLabel(MBB, false, false); > >> + printBasicBlockLabel(MBB, false, false, false); > >> if (Subtarget->isPICStyleRIPRel()) > >> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << > >> getFunctionNumber() > >> << '_' << uid << '\n'; > >> @@ -543,12 +532,12 @@ > >> O << TAI->getPrivateGlobalPrefix() << getFunctionNumber() > >> << '_' << uid << "_set_" << MBB->getNumber(); > >> } else if (Subtarget->isPICStyleGOT()) { > >> - printBasicBlockLabel(MBB, false, false); > >> + printBasicBlockLabel(MBB, false, false, false); > >> O << "@GOTOFF"; > >> } else > >> assert(0 && "Don't know how to print MBB label for this PIC > >> mode"); > >> } else > >> - printBasicBlockLabel(MBB, false, false); > >> + printBasicBlockLabel(MBB, false, false, false); > >> } > >> > >> bool X86ATTAsmPrinter::printAsmMRegister(const MachineOperand &MO, > >> > >> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) > >> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Feb 27 > >> 18:43:03 2008 > >> @@ -714,6 +714,7 @@ > >> maxStoresPerMemcpy = 16; // For %llvm.memcpy -> sequence of stores > >> maxStoresPerMemmove = 16; // For %llvm.memmove -> sequence of > >> stores > >> allowUnalignedMemoryAccesses = true; // x86 supports it! > >> + setPrefLoopAlignment(16); > >> } > >> > >> /// getMaxByValAlign - Helper for getByValTypeAlignment to determine > >> > >> Modified: llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp (original) > >> +++ llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp Wed Feb 27 > >> 18:43:03 2008 > >> @@ -78,7 +78,7 @@ > >> I != E; ++I) { > >> // Print a label for the basic block if there are any > >> predecessors. > >> if (!I->pred_empty()) { > >> - printBasicBlockLabel(I, true); > >> + printBasicBlockLabel(I, true, true); > >> O << '\n'; > >> } > >> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- > >> >end(); > >> @@ -242,7 +242,7 @@ > >> > >> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() > >> << getFunctionNumber() << '_' << uid << "_set_" << MBB- > >> >getNumber() << ','; > >> - printBasicBlockLabel(MBB, false, false); > >> + printBasicBlockLabel(MBB, false, false, false); > >> O << '-' << "\"L" << getFunctionNumber() << "$pb\"'\n"; > >> } > >> > >> > >> Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original) > >> +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Feb 27 > >> 18:43:03 2008 > >> @@ -47,6 +47,7 @@ > >> switch (Subtarget->TargetType) { > >> case X86Subtarget::isDarwin: > >> AlignmentIsInBytes = false; > >> + TextAlignFillValue = 0x90; > >> GlobalPrefix = "_"; > >> if (!Subtarget->is64Bit()) > >> Data64bitsDirective = 0; // we can't emit a 64-bit unit > >> > >> Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) > >> +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Wed Feb 27 > >> 18:43:03 2008 > >> @@ -164,6 +164,13 @@ > >> return true; // -print-machineinstr should print after this. > >> } > >> > >> +bool X86TargetMachine::addPreEmitPass(FunctionPassManager &PM, > >> bool Fast) { > >> + if (Fast) return false; > >> + > >> + PM.add(createLoopAlignerPass()); > >> + return true; > >> +} > >> + > >> bool X86TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, > >> bool Fast, > >> std::ostream &Out) { > >> PM.add(createX86CodePrinterPass(Out, *this)); > >> > >> Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h > >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=47703&r1=47702&r2=47703&view=diff > >> > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> = > >> ===================================================================== > >> --- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original) > >> +++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Wed Feb 27 > >> 18:43:03 2008 > >> @@ -63,6 +63,7 @@ > >> // Set up the pass pipeline. > >> virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); > >> virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast); > >> + virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast); > >> virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, > >> std::ostream &Out); > >> virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast, > >> > >> > >> _______________________________________________ > >> llvm-commits mailing list > >> llvm-commits at cs.uiuc.edu > >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > >> > > From dalej at apple.com Thu Feb 28 16:31:51 2008 From: dalej at apple.com (Dale Johannesen) Date: Thu, 28 Feb 2008 22:31:51 -0000 Subject: [llvm-commits] [llvm] r47734 - in /llvm/trunk: include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/TargetLowering.cpp lib/Target/PowerPC/PPCISelLowering.cpp lib/Target/PowerPC/PPCISelLowering.h Message-ID: <200802282231.m1SMVp3M015125@zion.cs.uiuc.edu> Author: johannes Date: Thu Feb 28 16:31:51 2008 New Revision: 47734 URL: http://llvm.org/viewvc/llvm-project?rev=47734&view=rev Log: Interface of getByValTypeAlignment differed between generic & x86 versions; change generic to follow x86 and improve comments. Add PPC version (not right for non-Darwin.) Modified: llvm/trunk/include/llvm/Target/TargetLowering.h llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h Modified: llvm/trunk/include/llvm/Target/TargetLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=47734&r1=47733&r2=47734&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) +++ llvm/trunk/include/llvm/Target/TargetLowering.h Thu Feb 28 16:31:51 2008 @@ -420,7 +420,8 @@ } /// getByValTypeAlignment - Return the desired alignment for ByVal aggregate - /// function arguments in the caller parameter area. + /// function arguments in the caller parameter area. This is the actual + /// alignment, not its logarithm. virtual unsigned getByValTypeAlignment(const Type *Ty) const; /// getRegisterType - Return the type of registers that this ValueType will Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47734&r1=47733&r2=47734&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Thu Feb 28 16:31:51 2008 @@ -424,9 +424,10 @@ } /// getByValTypeAlignment - Return the desired alignment for ByVal aggregate -/// function arguments in the caller parameter area. +/// function arguments in the caller parameter area. This is the actual +/// alignment, not its logarithm. unsigned TargetLowering::getByValTypeAlignment(const Type *Ty) const { - return Log2_32(TD->getCallFrameTypeAlignment(Ty)); + return TD->getCallFrameTypeAlignment(Ty); } SDOperand TargetLowering::getPICJumpTableRelocBase(SDOperand Table, Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=47734&r1=47733&r2=47734&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Thu Feb 28 16:31:51 2008 @@ -351,6 +351,17 @@ computeRegisterProperties(); } +/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate +/// function arguments in the caller parameter area. +unsigned PPCTargetLowering::getByValTypeAlignment(const Type *Ty) const { + TargetMachine &TM = getTargetMachine(); + // Darwin passes everything on 4 byte boundary. + if (TM.getSubtarget().isDarwin()) + return 4; + // FIXME Elf TBD + return 4; +} + const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const { switch (Opcode) { default: return 0; Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h?rev=47734&r1=47733&r2=47734&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h Thu Feb 28 16:31:51 2008 @@ -268,6 +268,11 @@ getRegForInlineAsmConstraint(const std::string &Constraint, MVT::ValueType VT) const; + /// getByValTypeAlignment - Return the desired alignment for ByVal aggregate + /// function arguments in the caller parameter area. This is the actual + /// alignment, not its logarithm. + unsigned getByValTypeAlignment(const Type *Ty) const; + /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops /// vector. If it is invalid, don't add anything to Ops. virtual void LowerAsmOperandForConstraint(SDOperand Op, From gohman at apple.com Thu Feb 28 16:50:34 2008 From: gohman at apple.com (Dan Gohman) Date: Thu, 28 Feb 2008 14:50:34 -0800 Subject: [llvm-commits] [llvm] r47703 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/ In-Reply-To: <45405E66-6BB3-427C-B202-14E32653189C@apple.com> References: <200802280043.m1S0hEBR012866@zion.cs.uiuc.edu> <45405E66-6BB3-427C-B202-14E32653189C@apple.com> Message-ID: During the test run: ******************** TEST (llc) 'exception_spec_test' FAILED! ******************** Execution Context Diff: /Users/gohman/LLVM/build.llvm.x86-64/Debug/bin/fpcmp: FP Comparison failed, not a numeric difference between 'T' and 't' ******************** TEST (llc) 'exception_spec_test' **************************** The difff between the native an llc outputs looks like this: --- exception_spec_test.out-nat 2008-02-28 14:48:09.000000000 -0800 +++ exception_spec_test.out-llc 2008-02-28 14:48:09.000000000 -0800 @@ -1,9 +1,4 @@ +terminate called after throwing an instance of 'int' Throwing a double from a function which allows doubles! -Double successfully caught! -Throwing an int from a function which only allows doubles! -std::unexpected called: throwing a double -Double successfully caught! -Throwing an int from a function which only allows doubles! std::unexpected called: throwing an int! -std::terminate called -exit 1 +exit 134 Also, I just reran this with 47732 and it still fails. Dan On Feb 28, 2008, at 2:26 PM, Evan Cheng wrote: > Thanks. Can you tell how is it failing? > > Evan > > On Feb 28, 2008, at 1:41 PM, Dan Gohman wrote: > >> Hi Evan, >> >> This is causing failures on x86-64 too: >> >> Regression/C++/EH/exception_spec_test [LLC compile, LLC-BETA >> compile, , ] >> Regression/C++/EH/function_try_block [LLC compile, LLC-BETA >> compile, , ] >> >> Dan >> >> On Feb 27, 2008, at 4:43 PM, Evan Cheng wrote: >> >>> Author: evancheng >>> Date: Wed Feb 27 18:43:03 2008 >>> New Revision: 47703 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=47703&view=rev >>> Log: >>> Add a quick and dirty "loop aligner pass". x86 uses it to align its >>> loops to 16-byte boundaries. >>> >>> Added: >>> llvm/trunk/lib/CodeGen/LoopAligner.cpp >>> Modified: >>> llvm/trunk/include/llvm/CodeGen/AsmPrinter.h >>> llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h >>> llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h >>> llvm/trunk/include/llvm/CodeGen/Passes.h >>> llvm/trunk/include/llvm/Target/TargetAsmInfo.h >>> llvm/trunk/include/llvm/Target/TargetLowering.h >>> llvm/trunk/lib/CodeGen/AsmPrinter.cpp >>> llvm/trunk/lib/CodeGen/BranchFolding.cpp >>> llvm/trunk/lib/CodeGen/IfConversion.cpp >>> llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp >>> llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp >>> llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp >>> llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp >>> llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp >>> llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp >>> llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp >>> llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp >>> llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp >>> llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp >>> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp >>> llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp >>> llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp >>> llvm/trunk/lib/Target/X86/X86TargetMachine.cpp >>> llvm/trunk/lib/Target/X86/X86TargetMachine.h >>> >>> Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) >>> +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Wed Feb 27 18:43:03 >>> 2008 >>> @@ -78,6 +78,10 @@ >>> /// CurrentSection - The current section we are emitting to. >>> This is >>> /// controlled and used by the SwitchSection method. >>> std::string CurrentSection; >>> + >>> + /// IsInTextSection - True if the current section we are >>> emitting to is a >>> + /// text section. >>> + bool IsInTextSection; >>> >>> protected: >>> AsmPrinter(std::ostream &o, TargetMachine &TM, const >>> TargetAsmInfo *T); >>> @@ -269,9 +273,7 @@ >>> /// an explicit alignment requested, it will unconditionally >>> override the >>> /// alignment request. However, if ForcedAlignBits is >>> specified, this value >>> /// has final say: the ultimate alignment will be the max of >>> ForcedAlignBits >>> - /// and the alignment computed with NumBits and the global. If >>> UseFillExpr >>> - /// is true, it also emits an optional second value FillValue >>> which the >>> - /// assembler uses to fill gaps to match alignment. >>> + /// and the alignment computed with NumBits and the global >>> /// >>> /// The algorithm is: >>> /// Align = NumBits; >>> @@ -279,8 +281,7 @@ >>> /// Align = std::max(Align, ForcedAlignBits); >>> /// >>> void EmitAlignment(unsigned NumBits, const GlobalValue *GV = 0, >>> - unsigned ForcedAlignBits = 0, bool >>> UseFillExpr = false, >>> - unsigned FillValue = 0) const; >>> + unsigned ForcedAlignBits = 0) const; >>> >>> /// printLabel - This method prints a local label used by debug >>> and >>> /// exception handling tables. >>> @@ -317,6 +318,7 @@ >>> /// printBasicBlockLabel - This method prints the label for the >>> specified >>> /// MachineBasicBlock >>> virtual void printBasicBlockLabel(const MachineBasicBlock *MBB, >>> + bool printAlign = false, >>> bool printColon = false, >>> bool printComment = true) const; >>> >>> >>> Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original) >>> +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Wed Feb 27 >>> 18:43:03 2008 >>> @@ -75,6 +75,10 @@ >>> /// LiveIns - Keep track of the physical registers that are livein >>> of >>> /// the basicblock. >>> std::vector LiveIns; >>> + >>> + /// Alignment - Alignment of the basic block. Zero if the basic >>> block does >>> + /// not need to be aligned. >>> + unsigned Alignment; >>> >>> /// IsLandingPad - Indicate that this basic block is entered via an >>> /// exception handler. >>> @@ -82,7 +86,8 @@ >>> >>> public: >>> explicit MachineBasicBlock(const BasicBlock *bb = 0) >>> - : Prev(0), Next(0), BB(bb), Number(-1), xParent(0), >>> IsLandingPad(false) { >>> + : Prev(0), Next(0), BB(bb), Number(-1), xParent(0), >>> + Alignment(0), IsLandingPad(false) { >>> Insts.parent = this; >>> } >>> >>> @@ -181,6 +186,14 @@ >>> const_livein_iterator livein_end() const { return LiveIns.end(); } >>> bool livein_empty() const { return LiveIns.empty(); } >>> >>> + /// getAlignment - Return alignment of the basic block. >>> + /// >>> + unsigned getAlignment() const { return Alignment; } >>> + >>> + /// setAlignment - Set alignment of the basic block. >>> + /// >>> + void setAlignment(unsigned Align) { Alignment = Align; } >>> + >>> /// isLandingPad - Returns true if the block is a landing pad. >>> That is >>> /// this basic block is entered via an exception handler. >>> bool isLandingPad() const { return IsLandingPad; } >>> >>> Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original) >>> +++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Wed Feb 27 >>> 18:43:03 2008 >>> @@ -204,7 +204,7 @@ >>> } >>> >>> /// getObjectAlignment - Return the alignment of the specified >>> stack object... >>> - int getObjectAlignment(int ObjectIdx) const { >>> + unsigned getObjectAlignment(int ObjectIdx) const { >>> assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() && >>> "Invalid Object Idx!"); >>> return Objects[ObjectIdx+NumFixedObjects].Alignment; >>> >>> Modified: llvm/trunk/include/llvm/CodeGen/Passes.h >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/include/llvm/CodeGen/Passes.h (original) >>> +++ llvm/trunk/include/llvm/CodeGen/Passes.h Wed Feb 27 18:43:03 >>> 2008 >>> @@ -129,6 +129,10 @@ >>> /// IfConverter Pass - This pass performs machine code if >>> conversion. >>> FunctionPass *createIfConverterPass(); >>> >>> + /// LoopAligner Pass - This pass aligns loop headers to target >>> specific >>> + /// alignment boundary. >>> + FunctionPass *createLoopAlignerPass(); >>> + >>> /// DebugLabelFoldingPass - This pass prunes out redundant debug >>> labels. This >>> /// allows a debug emitter to determine if the range of two labels >>> is empty, >>> /// by seeing if the labels map to the same reduced label. >>> >>> Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original) >>> +++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Feb 27 >>> 18:43:03 2008 >>> @@ -164,6 +164,10 @@ >>> /// boundary. >>> bool AlignmentIsInBytes; // Defaults to true >>> >>> + /// TextAlignFillValue - If non-zero, this is used to fill the >>> executable >>> + /// space created as the result of a alignment directive. >>> + unsigned TextAlignFillValue; >>> + >>> //===--- Section Switching Directives >>> ---------------------------------===// >>> >>> /// SwitchToSectionDirective - This is the directive used when >>> we want to >>> @@ -503,6 +507,9 @@ >>> bool getAlignmentIsInBytes() const { >>> return AlignmentIsInBytes; >>> } >>> + unsigned getTextAlignFillValue() const { >>> + return TextAlignFillValue; >>> + } >>> const char *getSwitchToSectionDirective() const { >>> return SwitchToSectionDirective; >>> } >>> >>> Modified: llvm/trunk/include/llvm/Target/TargetLowering.h >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) >>> +++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Feb 27 >>> 18:43:03 2008 >>> @@ -548,17 +548,23 @@ >>> >>> /// getIfCvtBlockLimit - returns the target specific if-conversion >>> block size >>> /// limit. Any block whose size is greater should not be predicated. >>> - virtual unsigned getIfCvtBlockSizeLimit() const { >>> + unsigned getIfCvtBlockSizeLimit() const { >>> return IfCvtBlockSizeLimit; >>> } >>> >>> /// getIfCvtDupBlockLimit - returns the target specific size limit >>> for a >>> /// block to be considered for duplication. Any block whose size >>> is greater >>> /// should not be duplicated to facilitate its predication. >>> - virtual unsigned getIfCvtDupBlockSizeLimit() const { >>> + unsigned getIfCvtDupBlockSizeLimit() const { >>> return IfCvtDupBlockSizeLimit; >>> } >>> >>> + /// getPrefLoopAlignment - return the preferred loop alignment. >>> + /// >>> + unsigned getPrefLoopAlignment() const { >>> + return PrefLoopAlignment; >>> + } >>> + >>> /// getPreIndexedAddressParts - returns true by value, base >>> pointer and >>> /// offset pointer and addressing mode by reference if the node's >>> address >>> /// can be legally represented as pre-indexed load / store address. >>> @@ -583,7 +589,7 @@ >>> /// jumptable. >>> virtual SDOperand getPICJumpTableRelocBase(SDOperand Table, >>> SelectionDAG &DAG) const; >>> - >>> + >>> // >>> = >>> = >>> = >>> -------------------------------------------------------------------- >>> ===// >>> // TargetLowering Optimization Methods >>> // >>> @@ -890,6 +896,12 @@ >>> void setIfCvtDupBlockSizeLimit(unsigned Limit) { >>> IfCvtDupBlockSizeLimit = Limit; >>> } >>> + >>> + /// setPrefLoopAlignment - Set the target's preferred loop >>> alignment. Default >>> + /// alignment is zero, it means the target does not care about >>> loop alignment. >>> + void setPrefLoopAlignment(unsigned Align) { >>> + PrefLoopAlignment = Align; >>> + } >>> >>> public: >>> >>> @@ -1276,6 +1288,10 @@ >>> /// duplicated during if-conversion. >>> unsigned IfCvtDupBlockSizeLimit; >>> >>> + /// PrefLoopAlignment - The perferred loop alignment. >>> + /// >>> + unsigned PrefLoopAlignment; >>> + >>> /// StackPointerRegisterToSaveRestore - If set to a physical >>> register, this >>> /// specifies the register that llvm.savestack/llvm.restorestack >>> should save >>> /// and restore. >>> >>> Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/CodeGen/AsmPrinter.cpp (original) >>> +++ llvm/trunk/lib/CodeGen/AsmPrinter.cpp Wed Feb 27 18:43:03 2008 >>> @@ -39,7 +39,8 @@ >>> char AsmPrinter::ID = 0; >>> AsmPrinter::AsmPrinter(std::ostream &o, TargetMachine &tm, >>> const TargetAsmInfo *T) >>> - : MachineFunctionPass((intptr_t)&ID), FunctionNumber(0), O(o), >>> TM(tm), TAI(T) >>> + : MachineFunctionPass((intptr_t)&ID), FunctionNumber(0), O(o), >>> TM(tm), TAI(T), >>> + IsInTextSection(false) >>> {} >>> >>> std::string AsmPrinter::getSectionForFunction(const Function &F) >>> const { >>> @@ -69,6 +70,8 @@ >>> >>> if (!CurrentSection.empty()) >>> O << CurrentSection << TAI->getTextSectionStartSuffix() << '\n'; >>> + >>> + IsInTextSection = true; >>> } >>> >>> /// SwitchToDataSection - Switch to the specified data section of >>> the executable >>> @@ -93,6 +96,8 @@ >>> >>> if (!CurrentSection.empty()) >>> O << CurrentSection << TAI->getDataSectionStartSuffix() << '\n'; >>> + >>> + IsInTextSection = false; >>> } >>> >>> >>> @@ -344,7 +349,7 @@ >>> O << TAI->getPrivateGlobalPrefix() << getFunctionNumber() >>> << '_' << uid << "_set_" << MBB->getNumber(); >>> } else { >>> - printBasicBlockLabel(MBB, false, false); >>> + printBasicBlockLabel(MBB, false, false, false); >>> // If the arch uses custom Jump Table directives, don't calc >>> relative to >>> // JT >>> if (!HadJTEntryDirective) >>> @@ -352,7 +357,7 @@ >>> << getFunctionNumber() << '_' << uid; >>> } >>> } else { >>> - printBasicBlockLabel(MBB, false, false); >>> + printBasicBlockLabel(MBB, false, false, false); >>> } >>> } >>> >>> @@ -679,8 +684,7 @@ >>> // Align = std::max(Align, ForcedAlignBits); >>> // >>> void AsmPrinter::EmitAlignment(unsigned NumBits, const GlobalValue >>> *GV, >>> - unsigned ForcedAlignBits, bool >>> UseFillExpr, >>> - unsigned FillValue) const { >>> + unsigned ForcedAlignBits) const { >>> if (GV && GV->getAlignment()) >>> NumBits = Log2_32(GV->getAlignment()); >>> NumBits = std::max(NumBits, ForcedAlignBits); >>> @@ -688,6 +692,9 @@ >>> if (NumBits == 0) return; // No need to emit alignment. >>> if (TAI->getAlignmentIsInBytes()) NumBits = 1 << NumBits; >>> O << TAI->getAlignDirective() << NumBits; >>> + >>> + unsigned FillValue = TAI->getTextAlignFillValue(); >>> + bool UseFillExpr = IsInTextSection && FillValue; >>> if (UseFillExpr) O << ",0x" << std::hex << FillValue << std::dec; >>> O << "\n"; >>> } >>> @@ -1252,7 +1259,7 @@ >>> >>> if (Modifier[0]=='l') // labels are target independent >>> printBasicBlockLabel(MI->getOperand(OpNo).getMBB(), >>> - false, false); >>> + false, false, false); >>> else { >>> AsmPrinter *AP = const_cast(this); >>> if ((OpFlags & 7) == 4 /*ADDR MODE*/) { >>> @@ -1318,8 +1325,15 @@ >>> /// printBasicBlockLabel - This method prints the label for the >>> specified >>> /// MachineBasicBlock >>> void AsmPrinter::printBasicBlockLabel(const MachineBasicBlock *MBB, >>> + bool printAlign, >>> bool printColon, >>> bool printComment) const { >>> + if (printAlign) { >>> + unsigned Align = MBB->getAlignment(); >>> + if (Align) >>> + EmitAlignment(Log2_32(Align)); >>> + } >>> + >>> O << TAI->getPrivateGlobalPrefix() << "BB" << getFunctionNumber() >>> << "_" >>> << MBB->getNumber(); >>> if (printColon) >>> @@ -1338,7 +1352,7 @@ >>> >>> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() >>> << getFunctionNumber() << '_' << uid << "_set_" << MBB- >>>> getNumber() << ','; >>> - printBasicBlockLabel(MBB, false, false); >>> + printBasicBlockLabel(MBB, false, false, false); >>> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << >>> getFunctionNumber() >>> << '_' << uid << '\n'; >>> } >>> @@ -1351,7 +1365,7 @@ >>> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() >>> << getFunctionNumber() << '_' << uid << '_' << uid2 >>> << "_set_" << MBB->getNumber() << ','; >>> - printBasicBlockLabel(MBB, false, false); >>> + printBasicBlockLabel(MBB, false, false, false); >>> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << >>> getFunctionNumber() >>> << '_' << uid << '_' << uid2 << '\n'; >>> } >>> >>> Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original) >>> +++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Wed Feb 27 18:43:03 >>> 2008 >>> @@ -44,7 +44,7 @@ >>> cl::desc("Max number of predecessors to consider tail >>> merging"), >>> cl::init(100), cl::Hidden); >>> >>> - struct BranchFolder : public MachineFunctionPass { >>> + struct VISIBILITY_HIDDEN BranchFolder : public >>> MachineFunctionPass { >>> static char ID; >>> explicit BranchFolder(bool defaultEnableTailMerge) : >>> MachineFunctionPass((intptr_t)&ID) { >>> >>> Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/CodeGen/IfConversion.cpp (original) >>> +++ llvm/trunk/lib/CodeGen/IfConversion.cpp Wed Feb 27 18:43:03 2008 >>> @@ -56,7 +56,7 @@ >>> STATISTIC(NumDupBBs, "Number of duplicated blocks"); >>> >>> namespace { >>> - class IfConverter : public MachineFunctionPass { >>> + class VISIBILITY_HIDDEN IfConverter : public >>> MachineFunctionPass { >>> enum IfcvtKind { >>> ICNotClassfied, // BB data valid, but not classified. >>> ICSimpleFalse, // Same as ICSimple, but on the false path. >>> >>> Added: llvm/trunk/lib/CodeGen/LoopAligner.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LoopAligner.cpp?rev=47703&view=auto >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/CodeGen/LoopAligner.cpp (added) >>> +++ llvm/trunk/lib/CodeGen/LoopAligner.cpp Wed Feb 27 18:43:03 2008 >>> @@ -0,0 +1,65 @@ >>> +//===-- LoopAligner.cpp - Loop aligner pass. >>> ------------------------------===// >>> +// >>> +// The LLVM Compiler Infrastructure >>> +// >>> +// This file is distributed under the University of Illinois Open >>> Source >>> +// License. See LICENSE.TXT for details. >>> +// >>> +// >>> = >>> = >>> = >>> ----------------------------------------------------------------------= >>> ==// >>> +// >>> +// This file implements the pass that align loop headers to target >>> specific >>> +// alignment boundary. >>> +// >>> +// >>> = >>> = >>> = >>> ----------------------------------------------------------------------= >>> ==// >>> + >>> +#define DEBUG_TYPE "loopalign" >>> +#include "llvm/CodeGen/MachineLoopInfo.h" >>> +#include "llvm/CodeGen/MachineFunctionPass.h" >>> +#include "llvm/CodeGen/Passes.h" >>> +#include "llvm/Target/TargetLowering.h" >>> +#include "llvm/Target/TargetMachine.h" >>> +#include "llvm/Support/Compiler.h" >>> +#include "llvm/Support/Debug.h" >>> +using namespace llvm; >>> + >>> +namespace { >>> + class LoopAligner : public MachineFunctionPass { >>> + const TargetLowering *TLI; >>> + >>> + public: >>> + static char ID; >>> + LoopAligner() : MachineFunctionPass((intptr_t)&ID) {} >>> + >>> + virtual bool runOnMachineFunction(MachineFunction &MF); >>> + virtual const char *getPassName() const { return "Loop >>> aligner"; } >>> + >>> + virtual void getAnalysisUsage(AnalysisUsage &AU) const { >>> + AU.addRequired(); >>> + AU.addPreserved(); >>> + MachineFunctionPass::getAnalysisUsage(AU); >>> + } >>> + }; >>> + >>> + char LoopAligner::ID = 0; >>> +} // end anonymous namespace >>> + >>> +FunctionPass *llvm::createLoopAlignerPass() { return new >>> LoopAligner(); } >>> + >>> +bool LoopAligner::runOnMachineFunction(MachineFunction &MF) { >>> + const MachineLoopInfo *MLI = &getAnalysis(); >>> + >>> + if (MLI->begin() == MLI->end()) >>> + return false; // No loops. >>> + >>> + unsigned Align = MF.getTarget().getTargetLowering()- >>>> getPrefLoopAlignment(); >>> + if (!Align) >>> + return false; // Don't care about loop alignment. >>> + >>> + for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != >>> E; ++I) { >>> + MachineBasicBlock *MBB = I; >>> + if (MLI->isLoopHeader(MBB)) >>> + MBB->setAlignment(Align); >>> + } >>> + >>> + return true; >>> +} >>> >>> Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original) >>> +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Wed Feb 27 18:43:03 >>> 2008 >>> @@ -166,6 +166,7 @@ >>> if (LBB) OS << LBB->getName() << ": "; >>> OS << (const void*)this >>> << ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber(); >>> + if (Alignment) OS << ", Alignment " << Alignment; >>> if (isLandingPad()) OS << ", EH LANDING PAD"; >>> OS << ":\n"; >>> >>> >>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp >>> (original) >>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Feb >>> 27 18:43:03 2008 >>> @@ -206,6 +206,8 @@ >>> JumpBufSize = 0; >>> JumpBufAlignment = 0; >>> IfCvtBlockSizeLimit = 2; >>> + IfCvtDupBlockSizeLimit = 0; >>> + PrefLoopAlignment = 0; >>> >>> InitLibcallNames(LibcallRoutineNames); >>> InitCmpLibcallCCs(CmpLibcallCCs); >>> >>> Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original) >>> +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Wed Feb 27 18:43:03 >>> 2008 >>> @@ -248,7 +248,7 @@ >>> I != E; ++I) { >>> // Print a label for the basic block. >>> if (I != MF.begin()) { >>> - printBasicBlockLabel(I, true); >>> + printBasicBlockLabel(I, true, true); >>> O << '\n'; >>> } >>> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >>>> end(); >>> @@ -710,13 +710,13 @@ >>> << '_' << JTI << '_' << MO2.getImm() >>> << "_set_" << MBB->getNumber(); >>> else if (TM.getRelocationModel() == Reloc::PIC_) { >>> - printBasicBlockLabel(MBB, false, false); >>> + printBasicBlockLabel(MBB, false, false, false); >>> // If the arch uses custom Jump Table directives, don't calc >>> relative to JT >>> if (!TAI->getJumpTableDirective()) >>> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" >>> << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm(); >>> } else >>> - printBasicBlockLabel(MBB, false, false); >>> + printBasicBlockLabel(MBB, false, false, false); >>> if (i != e-1) >>> O << '\n'; >>> } >>> >>> Modified: llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp (original) >>> +++ llvm/trunk/lib/Target/Alpha/AlphaAsmPrinter.cpp Wed Feb 27 >>> 18:43:03 2008 >>> @@ -171,7 +171,7 @@ >>> for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); >>> I != E; ++I) { >>> if (I != MF.begin()) { >>> - printBasicBlockLabel(I, true); >>> + printBasicBlockLabel(I, true, true); >>> O << '\n'; >>> } >>> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >>>> end(); >>> >>> Modified: llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp (original) >>> +++ llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp Wed Feb 27 >>> 18:43:03 2008 >>> @@ -460,7 +460,7 @@ >>> I != E; ++I) { >>> // Print a label for the basic block. >>> if (I != MF.begin()) { >>> - printBasicBlockLabel(I, true); >>> + printBasicBlockLabel(I, true, true); >>> O << '\n'; >>> } >>> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >>>> end(); >>> >>> Modified: llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp (original) >>> +++ llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp Wed Feb 27 >>> 18:43:03 2008 >>> @@ -149,7 +149,7 @@ >>> I != E; ++I) { >>> // Print a label for the basic block if there are any >>> predecessors. >>> if (!I->pred_empty()) { >>> - printBasicBlockLabel(I, true); >>> + printBasicBlockLabel(I, true, true); >>> O << '\n'; >>> } >>> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >>>> end(); >>> >>> Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original) >>> +++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Wed Feb 27 >>> 18:43:03 2008 >>> @@ -297,7 +297,7 @@ >>> >>> // Print a label for the basic block. >>> if (I != MF.begin()) { >>> - printBasicBlockLabel(I, true); >>> + printBasicBlockLabel(I, true, true); >>> O << '\n'; >>> } >>> >>> >>> Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original) >>> +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed Feb 27 >>> 18:43:03 2008 >>> @@ -604,7 +604,7 @@ >>> I != E; ++I) { >>> // Print a label for the basic block. >>> if (I != MF.begin()) { >>> - printBasicBlockLabel(I, true); >>> + printBasicBlockLabel(I, true, true); >>> O << '\n'; >>> } >>> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >>>> end(); >>> @@ -838,7 +838,7 @@ >>> I != E; ++I) { >>> // Print a label for the basic block. >>> if (I != MF.begin()) { >>> - printBasicBlockLabel(I, true); >>> + printBasicBlockLabel(I, true, true); >>> O << '\n'; >>> } >>> for (MachineBasicBlock::const_iterator II = I->begin(), IE = I- >>>> end(); >>> >>> Modified: llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp (original) >>> +++ llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp Wed Feb 27 >>> 18:43:03 2008 >>> @@ -116,7 +116,7 @@ >>> I != E; ++I) { >>> // Print a label for the basic block. >>> if (I != MF.begin()) { >>> - printBasicBlockLabel(I, true); >>> + printBasicBlockLabel(I, true, true); >>> O << '\n'; >>> } >>> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >>>> end(); >>> >>> Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original) >>> +++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Feb 27 >>> 18:43:03 2008 >>> @@ -101,36 +101,25 @@ >>> switch (F->getLinkage()) { >>> default: assert(0 && "Unknown linkage type!"); >>> case Function::InternalLinkage: // Symbols default to internal. >>> - if (Subtarget->isTargetDarwin()) >>> - // FIXME: This should be parameterized somewhere. >>> - EmitAlignment(4, F, 0, true, 0x90); >>> - else >>> - EmitAlignment(4, F); >>> + EmitAlignment(4, F); >>> break; >>> case Function::DLLExportLinkage: >>> DLLExportedFns.insert(Mang->makeNameProper(F->getName(), "")); >>> //FALLS THROUGH >>> case Function::ExternalLinkage: >>> - if (Subtarget->isTargetDarwin()) >>> - // FIXME: This should be parameterized somewhere. >>> - EmitAlignment(4, F, 0, true, 0x90); >>> - else >>> - EmitAlignment(4, F); >>> + EmitAlignment(4, F); >>> O << "\t.globl\t" << CurrentFnName << "\n"; >>> break; >>> case Function::LinkOnceLinkage: >>> case Function::WeakLinkage: >>> + EmitAlignment(4, F); >>> if (Subtarget->isTargetDarwin()) { >>> - // FIXME: This should be parameterized somewhere. >>> - EmitAlignment(4, F, 0, true, 0x90); >>> O << "\t.globl\t" << CurrentFnName << "\n"; >>> O << TAI->getWeakDefDirective() << CurrentFnName << "\n"; >>> } else if (Subtarget->isTargetCygMing()) { >>> - EmitAlignment(4, F); >>> O << "\t.globl\t" << CurrentFnName << "\n"; >>> O << "\t.linkonce discard\n"; >>> } else { >>> - EmitAlignment(4, F); >>> O << "\t.weak\t" << CurrentFnName << "\n"; >>> } >>> break; >>> @@ -180,7 +169,7 @@ >>> I != E; ++I) { >>> // Print a label for the basic block. >>> if (!I->pred_empty()) { >>> - printBasicBlockLabel(I, true); >>> + printBasicBlockLabel(I, true, true); >>> O << '\n'; >>> } >>> for (MachineBasicBlock::const_iterator II = I->begin(), IE = I- >>>> end(); >>> @@ -515,7 +504,7 @@ >>> >>> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() >>> << getFunctionNumber() << '_' << uid << "_set_" << MBB- >>>> getNumber() << ','; >>> - printBasicBlockLabel(MBB, false, false); >>> + printBasicBlockLabel(MBB, false, false, false); >>> if (Subtarget->isPICStyleRIPRel()) >>> O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << >>> getFunctionNumber() >>> << '_' << uid << '\n'; >>> @@ -543,12 +532,12 @@ >>> O << TAI->getPrivateGlobalPrefix() << getFunctionNumber() >>> << '_' << uid << "_set_" << MBB->getNumber(); >>> } else if (Subtarget->isPICStyleGOT()) { >>> - printBasicBlockLabel(MBB, false, false); >>> + printBasicBlockLabel(MBB, false, false, false); >>> O << "@GOTOFF"; >>> } else >>> assert(0 && "Don't know how to print MBB label for this PIC >>> mode"); >>> } else >>> - printBasicBlockLabel(MBB, false, false); >>> + printBasicBlockLabel(MBB, false, false, false); >>> } >>> >>> bool X86ATTAsmPrinter::printAsmMRegister(const MachineOperand &MO, >>> >>> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) >>> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Feb 27 >>> 18:43:03 2008 >>> @@ -714,6 +714,7 @@ >>> maxStoresPerMemcpy = 16; // For %llvm.memcpy -> sequence of stores >>> maxStoresPerMemmove = 16; // For %llvm.memmove -> sequence of stores >>> allowUnalignedMemoryAccesses = true; // x86 supports it! >>> + setPrefLoopAlignment(16); >>> } >>> >>> /// getMaxByValAlign - Helper for getByValTypeAlignment to determine >>> >>> Modified: llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp (original) >>> +++ llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp Wed Feb 27 >>> 18:43:03 2008 >>> @@ -78,7 +78,7 @@ >>> I != E; ++I) { >>> // Print a label for the basic block if there are any >>> predecessors. >>> if (!I->pred_empty()) { >>> - printBasicBlockLabel(I, true); >>> + printBasicBlockLabel(I, true, true); >>> O << '\n'; >>> } >>> for (MachineBasicBlock::const_iterator II = I->begin(), E = I- >>>> end(); >>> @@ -242,7 +242,7 @@ >>> >>> O << TAI->getSetDirective() << ' ' << TAI->getPrivateGlobalPrefix() >>> << getFunctionNumber() << '_' << uid << "_set_" << MBB- >>>> getNumber() << ','; >>> - printBasicBlockLabel(MBB, false, false); >>> + printBasicBlockLabel(MBB, false, false, false); >>> O << '-' << "\"L" << getFunctionNumber() << "$pb\"'\n"; >>> } >>> >>> >>> Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original) >>> +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Feb 27 >>> 18:43:03 2008 >>> @@ -47,6 +47,7 @@ >>> switch (Subtarget->TargetType) { >>> case X86Subtarget::isDarwin: >>> AlignmentIsInBytes = false; >>> + TextAlignFillValue = 0x90; >>> GlobalPrefix = "_"; >>> if (!Subtarget->is64Bit()) >>> Data64bitsDirective = 0; // we can't emit a 64-bit unit >>> >>> Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) >>> +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Wed Feb 27 >>> 18:43:03 2008 >>> @@ -164,6 +164,13 @@ >>> return true; // -print-machineinstr should print after this. >>> } >>> >>> +bool X86TargetMachine::addPreEmitPass(FunctionPassManager &PM, bool >>> Fast) { >>> + if (Fast) return false; >>> + >>> + PM.add(createLoopAlignerPass()); >>> + return true; >>> +} >>> + >>> bool X86TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, >>> bool Fast, >>> std::ostream &Out) { >>> PM.add(createX86CodePrinterPass(Out, *this)); >>> >>> Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=47703&r1=47702&r2=47703&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original) >>> +++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Wed Feb 27 18:43:03 >>> 2008 >>> @@ -63,6 +63,7 @@ >>> // Set up the pass pipeline. >>> virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); >>> virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast); >>> + virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast); >>> virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, >>> std::ostream &Out); >>> virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast, >>> >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dalej at apple.com Thu Feb 28 17:04:55 2008 From: dalej at apple.com (Dale Johannesen) Date: Thu, 28 Feb 2008 15:04:55 -0800 Subject: [llvm-commits] [llvm] r47703 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/ In-Reply-To: References: <200802280043.m1S0hEBR012866@zion.cs.uiuc.edu> <45405E66-6BB3-427C-B202-14E32653189C@apple.com> Message-ID: Are you sure this is the same bug? Evan's patch doesn't look likely to produce this result. There was a big rewrite of EH by Anton that might well have broken something like this, however. On Feb 28, 2008, at 2:50 PM, Dan Gohman wrote: > During the test run: > > ******************** TEST (llc) 'exception_spec_test' FAILED! > ******************** > Execution Context Diff: > /Users/gohman/LLVM/build.llvm.x86-64/Debug/bin/fpcmp: FP Comparison > failed, not a numeric difference > between 'T' and 't' > ******************** TEST (llc) 'exception_spec_test' > **************************** > > > The difff between the native an llc outputs looks like this: > > --- exception_spec_test.out-nat 2008-02-28 14:48:09.000000000 -0800 > +++ exception_spec_test.out-llc 2008-02-28 14:48:09.000000000 -0800 > @@ -1,9 +1,4 @@ > +terminate called after throwing an instance of 'int' > Throwing a double from a function which allows doubles! > -Double successfully caught! > -Throwing an int from a function which only allows doubles! > -std::unexpected called: throwing a double > -Double successfully caught! > -Throwing an int from a function which only allows doubles! > std::unexpected called: throwing an int! > -std::terminate called > -exit 1 > +exit 134 > > > Also, I just reran this with 47732 and it still fails. From lauro.venancio at gmail.com Thu Feb 28 17:13:15 2008 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Thu, 28 Feb 2008 23:13:15 -0000 Subject: [llvm-commits] [llvm] r47735 - /llvm/trunk/test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll Message-ID: <200802282313.m1SNDFpc016299@zion.cs.uiuc.edu> Author: laurov Date: Thu Feb 28 17:13:15 2008 New Revision: 47735 URL: http://llvm.org/viewvc/llvm-project?rev=47735&view=rev Log: Update testcase. Modified: llvm/trunk/test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll Modified: llvm/trunk/test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll?rev=47735&r1=47734&r2=47735&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll (original) +++ llvm/trunk/test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll Thu Feb 28 17:13:15 2008 @@ -1,6 +1,6 @@ ; For PR1099 ; RUN: llvm-as < %s | llc -march=c | \ -; RUN: grep {return ((((llvm_cbe_tmp2 == llvm_cbe_b_0_0_val)) ? (1) : (0)))} +; RUN: grep {return ((((llvm_cbe_tmp2 == llvm_cbe_b_2e_0_2e_0_2e_val)) ? (1) : (0)))} target datalayout = "e-p:32:32" target triple = "i686-apple-darwin8" From gohman at apple.com Thu Feb 28 17:18:30 2008 From: gohman at apple.com (Dan Gohman) Date: Thu, 28 Feb 2008 15:18:30 -0800 Subject: [llvm-commits] [llvm] r47703 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/ In-Reply-To: References: <200802280043.m1S0hEBR012866@zion.cs.uiuc.edu> <45405E66-6BB3-427C-B202-14E32653189C@apple.com> Message-ID: On Feb 28, 2008, at 3:04 PM, Dale Johannesen wrote: > Are you sure this is the same bug? Evan's patch doesn't look likely > to produce this result. There was a big rewrite of EH by Anton that > might well have broken something like this, however. That was my first guess as well, but the test passes when I revert just 47703 and 47732. Dan From evan.cheng at apple.com Thu Feb 28 17:29:57 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 28 Feb 2008 23:29:57 -0000 Subject: [llvm-commits] [llvm] r47736 - in /llvm/trunk/lib: CodeGen/LLVMTargetMachine.cpp CodeGen/LoopAligner.cpp Target/X86/X86TargetMachine.cpp Target/X86/X86TargetMachine.h Message-ID: <200802282329.m1SNTwhY016788@zion.cs.uiuc.edu> Author: evancheng Date: Thu Feb 28 17:29:57 2008 New Revision: 47736 URL: http://llvm.org/viewvc/llvm-project?rev=47736&view=rev Log: Added option -align-loops= to disable loop aligner pass. Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp llvm/trunk/lib/CodeGen/LoopAligner.cpp llvm/trunk/lib/Target/X86/X86TargetMachine.cpp llvm/trunk/lib/Target/X86/X86TargetMachine.h Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=47736&r1=47735&r2=47736&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original) +++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Thu Feb 28 17:29:57 2008 @@ -37,6 +37,9 @@ EnableSinking("enable-sinking", cl::init(false), cl::Hidden, cl::desc("Perform sinking on machine code")); static cl::opt +AlignLoops("align-loops", cl::init(true), cl::Hidden, + cl::desc("Align loop headers")); +static cl::opt PerformLICM("machine-licm", cl::init(false), cl::Hidden, cl::desc("Perform loop-invariant code motion on machine code")); @@ -132,6 +135,9 @@ if (addPreEmitPass(PM, Fast) && PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); + if (AlignLoops) + PM.add(createLoopAlignerPass()); + switch (FileType) { default: break; Modified: llvm/trunk/lib/CodeGen/LoopAligner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LoopAligner.cpp?rev=47736&r1=47735&r2=47736&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LoopAligner.cpp (original) +++ llvm/trunk/lib/CodeGen/LoopAligner.cpp Thu Feb 28 17:29:57 2008 @@ -18,6 +18,7 @@ #include "llvm/CodeGen/Passes.h" #include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetMachine.h" +#include "llvm/Support/CommandLine.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" using namespace llvm; Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=47736&r1=47735&r2=47736&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Thu Feb 28 17:29:57 2008 @@ -164,13 +164,6 @@ return true; // -print-machineinstr should print after this. } -bool X86TargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) { - if (Fast) return false; - - PM.add(createLoopAlignerPass()); - return true; -} - bool X86TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, std::ostream &Out) { PM.add(createX86CodePrinterPass(Out, *this)); Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=47736&r1=47735&r2=47736&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original) +++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Thu Feb 28 17:29:57 2008 @@ -63,7 +63,6 @@ // Set up the pass pipeline. virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast); - virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast); virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, std::ostream &Out); virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast, From evan.cheng at apple.com Thu Feb 28 17:30:39 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 28 Feb 2008 23:30:39 -0000 Subject: [llvm-commits] [test-suite] r47737 - /test-suite/trunk/Makefile.programs Message-ID: <200802282330.m1SNUdG3016822@zion.cs.uiuc.edu> Author: evancheng Date: Thu Feb 28 17:30:39 2008 New Revision: 47737 URL: http://llvm.org/viewvc/llvm-project?rev=47737&view=rev Log: Test -align-loops=false as x86 llcbeta. Modified: test-suite/trunk/Makefile.programs Modified: test-suite/trunk/Makefile.programs URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=47737&r1=47736&r2=47737&view=diff ============================================================================== --- test-suite/trunk/Makefile.programs (original) +++ test-suite/trunk/Makefile.programs Thu Feb 28 17:30:39 2008 @@ -224,7 +224,8 @@ LLCBETAOPTION := -sched=simple endif ifeq ($(ARCH),x86) -LLCBETAOPTION := -enable-sinking +LLCBETAOPTION := -align-loops=false +#-enable-sinking #-coalescer-commute-instrs #-machine-licm #-new-coalescer-heuristic=true From gohman at apple.com Thu Feb 28 19:26:13 2008 From: gohman at apple.com (Dan Gohman) Date: Fri, 29 Feb 2008 01:26:13 -0000 Subject: [llvm-commits] [llvm] r47738 - in /llvm/trunk: include/llvm/ADT/APFloat.h lib/Support/APFloat.cpp Message-ID: <200802290126.m1T1QDAq019898@zion.cs.uiuc.edu> Author: djg Date: Thu Feb 28 19:26:11 2008 New Revision: 47738 URL: http://llvm.org/viewvc/llvm-project?rev=47738&view=rev Log: Add a method to APFloat to convert directly from APInt. Modified: llvm/trunk/include/llvm/ADT/APFloat.h llvm/trunk/lib/Support/APFloat.cpp Modified: llvm/trunk/include/llvm/ADT/APFloat.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APFloat.h?rev=47738&r1=47737&r2=47738&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/APFloat.h (original) +++ llvm/trunk/include/llvm/ADT/APFloat.h Thu Feb 28 19:26:11 2008 @@ -208,6 +208,8 @@ opStatus convert(const fltSemantics &, roundingMode); opStatus convertToInteger(integerPart *, unsigned int, bool, roundingMode) const; + opStatus convertFromAPInt(const APInt &, + bool, roundingMode); opStatus convertFromSignExtendedInteger(const integerPart *, unsigned int, bool, roundingMode); opStatus convertFromZeroExtendedInteger(const integerPart *, unsigned int, Modified: llvm/trunk/lib/Support/APFloat.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APFloat.cpp?rev=47738&r1=47737&r2=47738&view=diff ============================================================================== --- llvm/trunk/lib/Support/APFloat.cpp (original) +++ llvm/trunk/lib/Support/APFloat.cpp Thu Feb 28 19:26:11 2008 @@ -1913,6 +1913,23 @@ return normalize(rounding_mode, lost_fraction); } +APFloat::opStatus +APFloat::convertFromAPInt(const APInt &Val, + bool isSigned, + roundingMode rounding_mode) +{ + unsigned int partCount = Val.getNumWords(); + APInt api = Val; + + sign = false; + if (isSigned && api.isNegative()) { + sign = true; + api = -api; + } + + return convertFromUnsignedParts(api.getRawData(), partCount, rounding_mode); +} + /* Convert a two's complement integer SRC to a floating point number, rounding according to ROUNDING_MODE. ISSIGNED is true if the integer is signed, in which case it must be sign-extended. */ From gohman at apple.com Thu Feb 28 19:27:13 2008 From: gohman at apple.com (Dan Gohman) Date: Fri, 29 Feb 2008 01:27:13 -0000 Subject: [llvm-commits] [llvm] r47739 - /llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Message-ID: <200802290127.m1T1RDnM019932@zion.cs.uiuc.edu> Author: djg Date: Thu Feb 28 19:27:13 2008 New Revision: 47739 URL: http://llvm.org/viewvc/llvm-project?rev=47739&view=rev Log: Simplify code using convertFromZeroExtendedInteger with an APInt by using the new convertFromAPInt directly. Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp?rev=47739&r1=47738&r2=47739&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Thu Feb 28 19:27:13 2008 @@ -424,9 +424,9 @@ else if (CE->getType() == Type::X86_FP80Ty) { const uint64_t zero[] = {0, 0}; APFloat apf = APFloat(APInt(80, 2, zero)); - (void)apf.convertFromZeroExtendedInteger(GV.IntVal.getRawData(), - GV.IntVal.getBitWidth(), false, - APFloat::rmNearestTiesToEven); + (void)apf.convertFromAPInt(GV.IntVal, + false, + APFloat::rmNearestTiesToEven); GV.IntVal = apf.convertToAPInt(); } return GV; @@ -440,9 +440,9 @@ else if (CE->getType() == Type::X86_FP80Ty) { const uint64_t zero[] = { 0, 0}; APFloat apf = APFloat(APInt(80, 2, zero)); - (void)apf.convertFromZeroExtendedInteger(GV.IntVal.getRawData(), - GV.IntVal.getBitWidth(), true, - APFloat::rmNearestTiesToEven); + (void)apf.convertFromAPInt(GV.IntVal, + true, + APFloat::rmNearestTiesToEven); GV.IntVal = apf.convertToAPInt(); } return GV; From andersca at mac.com Thu Feb 28 19:35:12 2008 From: andersca at mac.com (Anders Carlsson) Date: Fri, 29 Feb 2008 01:35:12 -0000 Subject: [llvm-commits] [llvm] r47740 - /llvm/trunk/lib/Target/X86/X86InstrMMX.td Message-ID: <200802290135.m1T1ZC7B020129@zion.cs.uiuc.edu> Author: andersca Date: Thu Feb 28 19:35:12 2008 New Revision: 47740 URL: http://llvm.org/viewvc/llvm-project?rev=47740&view=rev Log: Use the correct instruction encodings for the 64-bit MMX movd. Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=47740&r1=47739&r2=47740&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Thu Feb 28 19:35:12 2008 @@ -199,14 +199,14 @@ let AddedComplexity = 15 in // movd to MMX register zero-extends -def MMX_MOVZDI2PDIrr : MMX2I<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR32:$src), +def MMX_MOVZDI2PDIrr : MMXI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR32:$src), "movd\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (v2i32 (vector_shuffle immAllZerosV, (v2i32 (scalar_to_vector GR32:$src)), MMX_MOVL_shuffle_mask)))]>; let AddedComplexity = 20 in -def MMX_MOVZDI2PDIrm : MMX2I<0x6E, MRMSrcMem, (outs VR64:$dst), (ins i32mem:$src), +def MMX_MOVZDI2PDIrm : MMXI<0x6E, MRMSrcMem, (outs VR64:$dst), (ins i32mem:$src), "movd\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (v2i32 (vector_shuffle immAllZerosV, From gohman at apple.com Thu Feb 28 19:40:47 2008 From: gohman at apple.com (Dan Gohman) Date: Fri, 29 Feb 2008 01:40:47 -0000 Subject: [llvm-commits] [llvm] r47741 - in /llvm/trunk: include/llvm/ADT/APInt.h lib/Support/APInt.cpp Message-ID: <200802290140.m1T1elB0020309@zion.cs.uiuc.edu> Author: djg Date: Thu Feb 28 19:40:47 2008 New Revision: 47741 URL: http://llvm.org/viewvc/llvm-project?rev=47741&view=rev Log: Add support to APInt for shift and rotate operations with APInt instead of uint32_t for the shift/rotate count operand type. Modified: llvm/trunk/include/llvm/ADT/APInt.h llvm/trunk/lib/Support/APInt.cpp Modified: llvm/trunk/include/llvm/ADT/APInt.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APInt.h?rev=47741&r1=47740&r2=47741&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/APInt.h (original) +++ llvm/trunk/include/llvm/ADT/APInt.h Thu Feb 28 19:40:47 2008 @@ -584,6 +584,10 @@ return shl(Bits); } + APInt operator<<(const APInt &Bits) const { + return shl(Bits); + } + /// Arithmetic right-shift this APInt by shiftAmt. /// @brief Arithmetic right-shift function. APInt ashr(uint32_t shiftAmt) const; @@ -602,6 +606,24 @@ /// @brief Rotate right by rotateAmt. APInt rotr(uint32_t rotateAmt) const; + /// Arithmetic right-shift this APInt by shiftAmt. + /// @brief Arithmetic right-shift function. + APInt ashr(const APInt &shiftAmt) const; + + /// Logical right-shift this APInt by shiftAmt. + /// @brief Logical right-shift function. + APInt lshr(const APInt &shiftAmt) const; + + /// Left-shift this APInt by shiftAmt. + /// @brief Left-shift function. + APInt shl(const APInt &shiftAmt) const; + + /// @brief Rotate left by rotateAmt. + APInt rotl(const APInt &rotateAmt) const; + + /// @brief Rotate right by rotateAmt. + APInt rotr(const APInt &rotateAmt) const; + /// Perform an unsigned divide operation on this APInt by RHS. Both this and /// RHS are treated as unsigned quantities for purposes of this division. /// @returns a new APInt value containing the division result Modified: llvm/trunk/lib/Support/APInt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=47741&r1=47740&r2=47741&view=diff ============================================================================== --- llvm/trunk/lib/Support/APInt.cpp (original) +++ llvm/trunk/lib/Support/APInt.cpp Thu Feb 28 19:40:47 2008 @@ -1085,6 +1085,12 @@ /// Arithmetic right-shift this APInt by shiftAmt. /// @brief Arithmetic right-shift function. +APInt APInt::ashr(const APInt &shiftAmt) const { + return ashr(shiftAmt.getLimitedValue(BitWidth)); +} + +/// Arithmetic right-shift this APInt by shiftAmt. +/// @brief Arithmetic right-shift function. APInt APInt::ashr(uint32_t shiftAmt) const { assert(shiftAmt <= BitWidth && "Invalid shift amount"); // Handle a degenerate case @@ -1168,6 +1174,12 @@ /// Logical right-shift this APInt by shiftAmt. /// @brief Logical right-shift function. +APInt APInt::lshr(const APInt &shiftAmt) const { + return ashr(shiftAmt.getLimitedValue(BitWidth)); +} + +/// Logical right-shift this APInt by shiftAmt. +/// @brief Logical right-shift function. APInt APInt::lshr(uint32_t shiftAmt) const { if (isSingleWord()) { if (shiftAmt == BitWidth) @@ -1230,6 +1242,13 @@ /// Left-shift this APInt by shiftAmt. /// @brief Left-shift function. +APInt APInt::shl(const APInt &shiftAmt) const { + // It's undefined behavior in C to shift by BitWidth or greater, but + return shl(shiftAmt.getLimitedValue(BitWidth)); +} + +/// Left-shift this APInt by shiftAmt. +/// @brief Left-shift function. APInt APInt::shl(uint32_t shiftAmt) const { assert(shiftAmt <= BitWidth && "Invalid shift amount"); if (isSingleWord()) { @@ -1287,6 +1306,10 @@ return APInt(val, BitWidth).clearUnusedBits(); } +APInt APInt::rotl(const APInt &rotateAmt) const { + return rotl(rotateAmt.getLimitedValue(BitWidth)); +} + APInt APInt::rotl(uint32_t rotateAmt) const { if (rotateAmt == 0) return *this; @@ -1298,6 +1321,10 @@ return hi | lo; } +APInt APInt::rotr(const APInt &rotateAmt) const { + return rotr(rotateAmt.getLimitedValue(BitWidth)); +} + APInt APInt::rotr(uint32_t rotateAmt) const { if (rotateAmt == 0) return *this; From gohman at apple.com Thu Feb 28 19:41:59 2008 From: gohman at apple.com (Dan Gohman) Date: Fri, 29 Feb 2008 01:41:59 -0000 Subject: [llvm-commits] [llvm] r47742 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Message-ID: <200802290142.m1T1g0Pw020400@zion.cs.uiuc.edu> Author: djg Date: Thu Feb 28 19:41:59 2008 New Revision: 47742 URL: http://llvm.org/viewvc/llvm-project?rev=47742&view=rev Log: Use the new APInt-enabled form of getConstant instead of converting an APInt into a uint64_t to call getConstant. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=47742&r1=47741&r2=47742&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Feb 28 19:41:59 2008 @@ -996,7 +996,7 @@ Ops.size()); } else { // Canonicalize all constant ints to be unsigned. - return N = DAG.getConstant(cast(C)->getZExtValue(),VT); + return N = DAG.getConstant(cast(C)->getValue(),VT); } } From dalej at apple.com Thu Feb 28 19:42:19 2008 From: dalej at apple.com (Dale Johannesen) Date: Fri, 29 Feb 2008 01:42:19 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47743 - in /llvm-gcc-4.2/trunk/gcc: config/i386/llvm-i386-target.h llvm-abi.h Message-ID: <200802290142.m1T1gJFk020446@zion.cs.uiuc.edu> Author: johannes Date: Thu Feb 28 19:42:19 2008 New Revision: 47743 URL: http://llvm.org/viewvc/llvm-project?rev=47743&view=rev Log: Compensate for an Undocumented Feature of darwin x86-32: a struct with a single data field and an arbitrary number of zero-length fields is returned as if it were the type of the single data field. This is not correct for ppc32, so I've added a target hook. I don't know if it's correct for Linux x86-32, but this is not an area where we've made darwin-specific modifications, so I'm guessing it is. Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386-target.h llvm-gcc-4.2/trunk/gcc/llvm-abi.h Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386-target.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386-target.h?rev=47743&r1=47742&r2=47743&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386-target.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386-target.h Thu Feb 28 19:42:19 2008 @@ -91,6 +91,13 @@ (TARGET_64BIT ? 0 : \ TARGET_SSE && contains_128bit_aligned_vector_p(T) ? 16 : 4) +/* Structs containing a single data field plus zero-length fields are + considered as if they were the type of the data field. */ +#ifndef LLVM_SHOULD_RETURN_STRUCT_AS_SCALAR +#define LLVM_SHOULD_RETURN_STRUCT_AS_SCALAR(X) \ + isSingleElementStructOrArray(X, true, false) +#endif + extern bool llvm_x86_should_pass_aggregate_in_memory(tree, const Type *); #define LLVM_SHOULD_PASS_AGGREGATE_USING_BYVAL_ATTR(X, TY) \ Modified: llvm-gcc-4.2/trunk/gcc/llvm-abi.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-abi.h?rev=47743&r1=47742&r2=47743&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-abi.h (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-abi.h Thu Feb 28 19:42:19 2008 @@ -87,9 +87,12 @@ /// isSingleElementStructOrArray - If this is (recursively) a structure with one /// field or an array with one element, return the field type, otherwise return -/// null. If rejectFatBitField, and the single element is a bitfield of a type -/// that's bigger than the struct, return null anyway. -static tree isSingleElementStructOrArray(tree type, bool rejectFatBitfield) { +/// null. If ignoreZeroLength, the struct (recursively) may include zero-length +/// fields in addition to the single element that has data. If +/// rejectFatBitField, and the single element is a bitfield of a type that's +/// bigger than the struct, return null anyway. +static tree isSingleElementStructOrArray(tree type, bool ignoreZeroLength, + bool rejectFatBitfield) { // Scalars are good. if (!isAggregateTreeType(type)) return type; @@ -107,6 +110,11 @@ for (tree Field = TYPE_FIELDS(type); Field; Field = TREE_CHAIN(Field)) if (TREE_CODE(Field) == FIELD_DECL) { + if (ignoreZeroLength) { + if (TREE_CODE(DECL_SIZE(Field)) == INTEGER_CST && + TREE_INT_CST_LOW(DECL_SIZE(Field)) == 0) + continue; + } if (!FoundField) { if (rejectFatBitfield && TREE_CODE(TYPE_SIZE(type)) == INTEGER_CST && @@ -114,15 +122,18 @@ TREE_INT_CST_LOW(TYPE_SIZE(type))) return 0; FoundField = getDeclaredType(Field); - } else + } else { return 0; // More than one field. + } } - return FoundField ? isSingleElementStructOrArray(FoundField, false) : 0; + return FoundField ? isSingleElementStructOrArray(FoundField, + ignoreZeroLength, false) + : 0; case ARRAY_TYPE: const ArrayType *Ty = dyn_cast(ConvertType(type)); if (!Ty || Ty->getNumElements() != 1) return 0; - return isSingleElementStructOrArray(TREE_TYPE(type), false); + return isSingleElementStructOrArray(TREE_TYPE(type), false, false); } } @@ -171,7 +182,14 @@ // for field-by-field struct passing does not handle this one right. #ifndef LLVM_SHOULD_PASS_AGGREGATE_IN_INTEGER_REGS #define LLVM_SHOULD_PASS_AGGREGATE_IN_INTEGER_REGS(X) \ - !isSingleElementStructOrArray(X, true) + !isSingleElementStructOrArray(X, false, true) +#endif + +// LLVM_SHOULD_RETURN_STRUCT_AS_SCALAR - Return a TYPE tree if this struct +// should be returned using the convention for that scalar TYPE, 0 otherwise. +#ifndef LLVM_SHOULD_RETURN_STRUCT_AS_SCALAR +#define LLVM_SHOULD_RETURN_STRUCT_AS_SCALAR(X) \ + isSingleElementStructOrArray(X, false, false) #endif /// DefaultABI - This class implements the default LLVM ABI where structures are @@ -201,7 +219,7 @@ // FIXME: this is a hack around returning 'complex double' by-val // which returns in r3/r4/r5/r6 on PowerPC. TREE_INT_CST_LOW(TYPE_SIZE_UNIT(type)) <= 8) { - if (tree SingleElt = isSingleElementStructOrArray(type, false)) { + if (tree SingleElt = LLVM_SHOULD_RETURN_STRUCT_AS_SCALAR(type)) { C.HandleAggregateResultAsScalar(ConvertType(SingleElt)); } else { // Otherwise return as an integer value large enough to hold the entire From gohman at apple.com Thu Feb 28 19:42:52 2008 From: gohman at apple.com (Dan Gohman) Date: Fri, 29 Feb 2008 01:42:52 -0000 Subject: [llvm-commits] [llvm] r47744 - /llvm/trunk/lib/VMCore/ConstantFold.cpp Message-ID: <200802290142.m1T1gqku020476@zion.cs.uiuc.edu> Author: djg Date: Thu Feb 28 19:42:52 2008 New Revision: 47744 URL: http://llvm.org/viewvc/llvm-project?rev=47744&view=rev Log: Use the new convertFromAPInt instead of convertFromZeroExtendedInteger. Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantFold.cpp?rev=47744&r1=47743&r2=47744&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/ConstantFold.cpp (original) +++ llvm/trunk/lib/VMCore/ConstantFold.cpp Thu Feb 28 19:42:52 2008 @@ -170,8 +170,6 @@ Constant *llvm::ConstantFoldCastInstruction(unsigned opc, const Constant *V, const Type *DestTy) { - const Type *SrcTy = V->getType(); - if (isa(V)) { // zext(undef) = 0, because the top bits will be zero. // sext(undef) = 0, because the top bits will all be the same. @@ -257,12 +255,11 @@ if (const ConstantInt *CI = dyn_cast(V)) { APInt api = CI->getValue(); const uint64_t zero[] = {0, 0}; - uint32_t BitWidth = cast(SrcTy)->getBitWidth(); APFloat apf = APFloat(APInt(DestTy->getPrimitiveSizeInBits(), 2, zero)); - (void)apf.convertFromZeroExtendedInteger(api.getRawData(), BitWidth, - opc==Instruction::SIToFP, - APFloat::rmNearestTiesToEven); + (void)apf.convertFromAPInt(api, + opc==Instruction::SIToFP, + APFloat::rmNearestTiesToEven); return ConstantFP::get(DestTy, apf); } if (const ConstantVector *CV = dyn_cast(V)) { From gohman at apple.com Thu Feb 28 19:44:25 2008 From: gohman at apple.com (Dan Gohman) Date: Fri, 29 Feb 2008 01:44:25 -0000 Subject: [llvm-commits] [llvm] r47745 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200802290144.m1T1iPSd020527@zion.cs.uiuc.edu> Author: djg Date: Thu Feb 28 19:44:25 2008 New Revision: 47745 URL: http://llvm.org/viewvc/llvm-project?rev=47745&view=rev Log: Use the new convertFromAPInt instead of convertFromZeroExtendedInteger, which allows more of the surrounding arithmetic to be done with APInt instead of uint64_t. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47745&r1=47744&r2=47745&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Feb 28 19:44:25 2008 @@ -3754,12 +3754,10 @@ SDOperand True, False; MVT::ValueType VT = Node->getOperand(0).getValueType(); MVT::ValueType NVT = Node->getValueType(0); - unsigned ShiftAmt = MVT::getSizeInBits(NVT)-1; const uint64_t zero[] = {0, 0}; APFloat apf = APFloat(APInt(MVT::getSizeInBits(VT), 2, zero)); - uint64_t x = 1ULL << ShiftAmt; - (void)apf.convertFromZeroExtendedInteger - (&x, MVT::getSizeInBits(NVT), false, APFloat::rmNearestTiesToEven); + APInt x = APInt::getSignBit(MVT::getSizeInBits(NVT)); + (void)apf.convertFromAPInt(x, false, APFloat::rmNearestTiesToEven); Tmp2 = DAG.getConstantFP(apf, VT); Tmp3 = DAG.getSetCC(TLI.getSetCCResultTy(), Node->getOperand(0), Tmp2, ISD::SETLT); @@ -3768,7 +3766,7 @@ DAG.getNode(ISD::FSUB, VT, Node->getOperand(0), Tmp2)); False = DAG.getNode(ISD::XOR, NVT, False, - DAG.getConstant(1ULL << ShiftAmt, NVT)); + DAG.getConstant(x, NVT)); Result = DAG.getNode(ISD::SELECT, NVT, Tmp3, True, False); break; } else { From gohman at apple.com Thu Feb 28 19:47:35 2008 From: gohman at apple.com (Dan Gohman) Date: Fri, 29 Feb 2008 01:47:35 -0000 Subject: [llvm-commits] [llvm] r47746 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <200802290147.m1T1lZpd020605@zion.cs.uiuc.edu> Author: djg Date: Thu Feb 28 19:47:35 2008 New Revision: 47746 URL: http://llvm.org/viewvc/llvm-project?rev=47746&view=rev Log: More APInt-ification. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=47746&r1=47745&r2=47746&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Feb 28 19:47:35 2008 @@ -113,17 +113,9 @@ if (!cast(NotZero)->isAllOnesValue()) return false; } else if (isa(NotZero)) { - MVT::ValueType VT = NotZero.getValueType(); - if (VT== MVT::f64) { - if (((cast(NotZero)->getValueAPF(). - convertToAPInt().getZExtValue())) != (uint64_t)-1) - return false; - } else { - if ((uint32_t)cast(NotZero)-> - getValueAPF().convertToAPInt().getZExtValue() != - (uint32_t)-1) - return false; - } + if (!cast(NotZero)->getValueAPF(). + convertToAPInt().isAllOnesValue()) + return false; } else return false; @@ -712,7 +704,8 @@ SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) { if (Op.getValueType() == VT) return Op; - int64_t Imm = ~0ULL >> (64-MVT::getSizeInBits(VT)); + APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), + MVT::getSizeInBits(VT)); return getNode(ISD::AND, Op.getValueType(), Op, getConstant(Imm, Op.getValueType())); } @@ -1050,28 +1043,22 @@ } if (ConstantSDNode *N2C = dyn_cast(N2.Val)) { - uint64_t C2 = N2C->getValue(); + const APInt &C2 = N2C->getAPIntValue(); if (ConstantSDNode *N1C = dyn_cast(N1.Val)) { - uint64_t C1 = N1C->getValue(); - - // Sign extend the operands if required - if (ISD::isSignedIntSetCC(Cond)) { - C1 = N1C->getSignExtended(); - C2 = N2C->getSignExtended(); - } + const APInt &C1 = N1C->getAPIntValue(); switch (Cond) { default: assert(0 && "Unknown integer setcc!"); case ISD::SETEQ: return getConstant(C1 == C2, VT); case ISD::SETNE: return getConstant(C1 != C2, VT); - case ISD::SETULT: return getConstant(C1 < C2, VT); - case ISD::SETUGT: return getConstant(C1 > C2, VT); - case ISD::SETULE: return getConstant(C1 <= C2, VT); - case ISD::SETUGE: return getConstant(C1 >= C2, VT); - case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT); - case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT); - case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT); - case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT); + case ISD::SETULT: return getConstant(C1.ult(C2), VT); + case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); + case ISD::SETULE: return getConstant(C1.ule(C2), VT); + case ISD::SETUGE: return getConstant(C1.uge(C2), VT); + case ISD::SETLT: return getConstant(C1.slt(C2), VT); + case ISD::SETGT: return getConstant(C1.sgt(C2), VT); + case ISD::SETLE: return getConstant(C1.sle(C2), VT); + case ISD::SETGE: return getConstant(C1.sge(C2), VT); } } } @@ -1749,88 +1736,42 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, SDOperand Operand) { - unsigned Tmp1; // Constant fold unary operations with an integer constant operand. if (ConstantSDNode *C = dyn_cast(Operand.Val)) { - uint64_t Val = C->getValue(); + const APInt &Val = C->getAPIntValue(); + unsigned BitWidth = MVT::getSizeInBits(VT); switch (Opcode) { default: break; - case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT); + case ISD::SIGN_EXTEND: return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); case ISD::ANY_EXTEND: - case ISD::ZERO_EXTEND: return getConstant(Val, VT); - case ISD::TRUNCATE: return getConstant(Val, VT); + case ISD::ZERO_EXTEND: + case ISD::TRUNCATE: return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); case ISD::UINT_TO_FP: case ISD::SINT_TO_FP: { const uint64_t zero[] = {0, 0}; // No compile time operations on this type. if (VT==MVT::ppcf128) break; - APFloat apf = APFloat(APInt(MVT::getSizeInBits(VT), 2, zero)); - (void)apf.convertFromZeroExtendedInteger(&Val, - MVT::getSizeInBits(Operand.getValueType()), - Opcode==ISD::SINT_TO_FP, - APFloat::rmNearestTiesToEven); + APFloat apf = APFloat(APInt(BitWidth, 2, zero)); + (void)apf.convertFromAPInt(Val, + Opcode==ISD::SINT_TO_FP, + APFloat::rmNearestTiesToEven); return getConstantFP(apf, VT); } case ISD::BIT_CONVERT: if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) - return getConstantFP(BitsToFloat(Val), VT); + return getConstantFP(Val.bitsToFloat(), VT); else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) - return getConstantFP(BitsToDouble(Val), VT); + return getConstantFP(Val.bitsToDouble(), VT); break; case ISD::BSWAP: - switch(VT) { - default: assert(0 && "Invalid bswap!"); break; - case MVT::i16: return getConstant(ByteSwap_16((unsigned short)Val), VT); - case MVT::i32: return getConstant(ByteSwap_32((unsigned)Val), VT); - case MVT::i64: return getConstant(ByteSwap_64(Val), VT); - } - break; + return getConstant(Val.byteSwap(), VT); case ISD::CTPOP: - switch(VT) { - default: assert(0 && "Invalid ctpop!"); break; - case MVT::i1: return getConstant(Val != 0, VT); - case MVT::i8: - Tmp1 = (unsigned)Val & 0xFF; - return getConstant(CountPopulation_32(Tmp1), VT); - case MVT::i16: - Tmp1 = (unsigned)Val & 0xFFFF; - return getConstant(CountPopulation_32(Tmp1), VT); - case MVT::i32: - return getConstant(CountPopulation_32((unsigned)Val), VT); - case MVT::i64: - return getConstant(CountPopulation_64(Val), VT); - } + return getConstant(Val.countPopulation(), VT); case ISD::CTLZ: - switch(VT) { - default: assert(0 && "Invalid ctlz!"); break; - case MVT::i1: return getConstant(Val == 0, VT); - case MVT::i8: - Tmp1 = (unsigned)Val & 0xFF; - return getConstant(CountLeadingZeros_32(Tmp1)-24, VT); - case MVT::i16: - Tmp1 = (unsigned)Val & 0xFFFF; - return getConstant(CountLeadingZeros_32(Tmp1)-16, VT); - case MVT::i32: - return getConstant(CountLeadingZeros_32((unsigned)Val), VT); - case MVT::i64: - return getConstant(CountLeadingZeros_64(Val), VT); - } + return getConstant(Val.countLeadingZeros(), VT); case ISD::CTTZ: - switch(VT) { - default: assert(0 && "Invalid cttz!"); break; - case MVT::i1: return getConstant(Val == 0, VT); - case MVT::i8: - Tmp1 = (unsigned)Val | 0x100; - return getConstant(CountTrailingZeros_32(Tmp1), VT); - case MVT::i16: - Tmp1 = (unsigned)Val | 0x10000; - return getConstant(CountTrailingZeros_32(Tmp1), VT); - case MVT::i32: - return getConstant(CountTrailingZeros_32((unsigned)Val), VT); - case MVT::i64: - return getConstant(CountTrailingZeros_64(Val), VT); - } + return getConstant(Val.countTrailingZeros(), VT); } } @@ -2090,10 +2031,10 @@ if (EVT == VT) return N1; // Not actually extending if (N1C) { - int64_t Val = N1C->getValue(); + APInt Val = N1C->getAPIntValue(); unsigned FromBits = MVT::getSizeInBits(cast(N2)->getVT()); - Val <<= 64-FromBits; - Val >>= 64-FromBits; + Val <<= Val.getBitWidth()-FromBits; + Val = Val.lshr(Val.getBitWidth()-FromBits); return getConstant(Val, VT); } break; @@ -2150,37 +2091,31 @@ if (N1C) { if (N2C) { - uint64_t C1 = N1C->getValue(), C2 = N2C->getValue(); + APInt C1 = N1C->getAPIntValue(), C2 = N2C->getAPIntValue(); switch (Opcode) { case ISD::ADD: return getConstant(C1 + C2, VT); case ISD::SUB: return getConstant(C1 - C2, VT); case ISD::MUL: return getConstant(C1 * C2, VT); case ISD::UDIV: - if (C2) return getConstant(C1 / C2, VT); + if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); break; case ISD::UREM : - if (C2) return getConstant(C1 % C2, VT); + if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); break; case ISD::SDIV : - if (C2) return getConstant(N1C->getSignExtended() / - N2C->getSignExtended(), VT); + if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); break; case ISD::SREM : - if (C2) return getConstant(N1C->getSignExtended() % - N2C->getSignExtended(), VT); + if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); break; case ISD::AND : return getConstant(C1 & C2, VT); case ISD::OR : return getConstant(C1 | C2, VT); case ISD::XOR : return getConstant(C1 ^ C2, VT); case ISD::SHL : return getConstant(C1 << C2, VT); - case ISD::SRL : return getConstant(C1 >> C2, VT); - case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT); - case ISD::ROTL : - return getConstant((C1 << C2) | (C1 >> (MVT::getSizeInBits(VT) - C2)), - VT); - case ISD::ROTR : - return getConstant((C1 >> C2) | (C1 << (MVT::getSizeInBits(VT) - C2)), - VT); + case ISD::SRL : return getConstant(C1.lshr(C2), VT); + case ISD::SRA : return getConstant(C1.ashr(C2), VT); + case ISD::ROTL : return getConstant(C1.rotl(C2), VT); + case ISD::ROTR : return getConstant(C1.rotr(C2), VT); default: break; } } else { // Cannonicalize constant to RHS if commutative From dalej at apple.com Thu Feb 28 19:54:54 2008 From: dalej at apple.com (Dale Johannesen) Date: Thu, 28 Feb 2008 17:54:54 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r47743 - in /llvm-gcc-4.2/trunk/gcc: config/i386/llvm-i386-target.h llvm-abi.h In-Reply-To: <200802290142.m1T1gJFk020446@zion.cs.uiuc.edu> References: <200802290142.m1T1gJFk020446@zion.cs.uiuc.edu> Message-ID: <5A5B3769-6ED6-4D1F-B186-8B60C79E45E8@apple.com> On Feb 28, 2008, at 5:42 PM, Dale Johannesen wrote: > Compensate for an Undocumented Feature of darwin > x86-32: a struct with a single data field and an > arbitrary number of zero-length fields is returned > as if it were the type of the single data field. > This is not correct for ppc32, so I've added a > target hook. I don't know if it's correct for Linux > x86-32, but this is not an area where we've made > darwin-specific modifications, so I'm guessing it is. The interesting case is something like struct BB { int :0; float x; union {} b; int :0; }; struct BB zz() { struct BB ret; ret.x=3.0f; return ret; } The return value goes in ST(0). From kledzik at apple.com Thu Feb 28 20:01:35 2008 From: kledzik at apple.com (Nick Kledzik) Date: Fri, 29 Feb 2008 02:01:35 -0000 Subject: [llvm-commits] [llvm] r47747 - /llvm/trunk/tools/lto2/Makefile Message-ID: <200802290201.m1T21ZcV020962@zion.cs.uiuc.edu> Author: kledzik Date: Thu Feb 28 20:01:34 2008 New Revision: 47747 URL: http://llvm.org/viewvc/llvm-project?rev=47747&view=rev Log: also pass -compatibility_version when linking shared object for Darwin Modified: llvm/trunk/tools/lto2/Makefile Modified: llvm/trunk/tools/lto2/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto2/Makefile?rev=47747&r1=47746&r2=47747&view=diff ============================================================================== --- llvm/trunk/tools/lto2/Makefile (original) +++ llvm/trunk/tools/lto2/Makefile Thu Feb 28 20:01:34 2008 @@ -18,6 +18,7 @@ LINK_LIBS_IN_SHARED = 1 ifeq ($(OS),Darwin) SHARED_LIBRARY = 1 + BUILD_ARCHIVE = 0 DONT_BUILD_RELINKED = 1 else BUILD_ARCHIVE = 1 @@ -31,7 +32,8 @@ # set dylib internal version number to llvmCore submission number ifdef LLVM_SUBMIT_VERSION LLVMLibsOptions := $(LLVMLibsOptions) -Wl,-current_version \ - -Wl,$(LLVM_SUBMIT_VERSION).$(LLVM_SUBMIT_SUBVERSION) + -Wl,$(LLVM_SUBMIT_VERSION).$(LLVM_SUBMIT_SUBVERSION) \ + -Wl,-compatibility_version -Wl,1 endif # extra options to override libtool defaults LLVMLibsOptions := $(LLVMLibsOptions) \ From evan.cheng at apple.com Thu Feb 28 20:49:15 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 29 Feb 2008 02:49:15 -0000 Subject: [llvm-commits] [llvm] r47748 - /llvm/trunk/lib/CodeGen/LoopAligner.cpp Message-ID: <200802290249.m1T2nFsj022175@zion.cs.uiuc.edu> Author: evancheng Date: Thu Feb 28 20:49:15 2008 New Revision: 47748 URL: http://llvm.org/viewvc/llvm-project?rev=47748&view=rev Log: Remove redundant #include. Modified: llvm/trunk/lib/CodeGen/LoopAligner.cpp Modified: llvm/trunk/lib/CodeGen/LoopAligner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LoopAligner.cpp?rev=47748&r1=47747&r2=47748&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LoopAligner.cpp (original) +++ llvm/trunk/lib/CodeGen/LoopAligner.cpp Thu Feb 28 20:49:15 2008 @@ -18,7 +18,6 @@ #include "llvm/CodeGen/Passes.h" #include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetMachine.h" -#include "llvm/Support/CommandLine.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" using namespace llvm; From evan.cheng at apple.com Thu Feb 28 20:50:03 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 29 Feb 2008 02:50:03 -0000 Subject: [llvm-commits] [llvm] r47749 - in /llvm/trunk/lib/CodeGen: SimpleRegisterCoalescing.cpp SimpleRegisterCoalescing.h Message-ID: <200802290250.m1T2o3Ib022212@zion.cs.uiuc.edu> Author: evancheng Date: Thu Feb 28 20:50:03 2008 New Revision: 47749 URL: http://llvm.org/viewvc/llvm-project?rev=47749&view=rev Log: No need for coalescer to update kills. Only copies are coalesced and those instructions will be deleted. Doh. Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=47749&r1=47748&r2=47749&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Thu Feb 28 20:50:03 2008 @@ -385,26 +385,6 @@ return true; } -/// RemoveUnnecessaryKills - Remove kill markers that are no longer accurate -/// due to live range lengthening as the result of coalescing. -void SimpleRegisterCoalescing::RemoveUnnecessaryKills(unsigned Reg, - LiveInterval &LI) { - for (MachineRegisterInfo::use_iterator UI = mri_->use_begin(Reg), - UE = mri_->use_end(); UI != UE; ++UI) { - MachineOperand &UseMO = UI.getOperand(); - if (UseMO.isKill()) { - MachineInstr *UseMI = UseMO.getParent(); - unsigned UseIdx = li_->getUseIndex(li_->getInstructionIndex(UseMI)); - if (JoinedCopies.count(UseMI)) - continue; - LiveInterval::const_iterator UI = LI.FindLiveRangeContaining(UseIdx); - assert(UI != LI.end()); - if (!LI.isKill(UI->valno, UseIdx+1)) - UseMO.setIsKill(false); - } - } -} - /// isBackEdgeCopy - Returns true if CopyMI is a back edge copy. /// bool SimpleRegisterCoalescing::isBackEdgeCopy(MachineInstr *CopyMI, @@ -734,13 +714,6 @@ // we have to update any aliased register's live ranges to indicate that they // have clobbered values for this range. if (TargetRegisterInfo::isPhysicalRegister(DstReg)) { - // Unset unnecessary kills. - if (!ResDstInt->containsOneValue()) { - for (LiveInterval::Ranges::const_iterator I = ResSrcInt->begin(), - E = ResSrcInt->end(); I != E; ++I) - unsetRegisterKills(I->start, I->end, DstReg); - } - // If this is a extract_subreg where dst is a physical register, e.g. // cl = EXTRACT_SUBREG reg1024, 1 // then create and update the actual physical register allocated to RHS. @@ -810,12 +783,6 @@ // Remember to delete the copy instruction. JoinedCopies.insert(CopyMI); - // Some live range has been lengthened due to colaescing, eliminate the - // unnecessary kills. - RemoveUnnecessaryKills(SrcReg, *ResDstInt); - if (TargetRegisterInfo::isVirtualRegister(DstReg)) - RemoveUnnecessaryKills(DstReg, *ResDstInt); - // SrcReg is guarateed to be the register whose live interval that is // being merged. li_->removeInterval(SrcReg); @@ -1496,6 +1463,7 @@ /// findDefOperand - Returns the MachineOperand that is a def of the specific /// register. It returns NULL if the def is not found. +/// FIXME: Move to MachineInstr. MachineOperand *SimpleRegisterCoalescing::findDefOperand(MachineInstr *MI, unsigned Reg) const { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { @@ -1507,34 +1475,8 @@ return NULL; } -/// unsetRegisterKills - Unset IsKill property of all uses of specific register -/// between cycles Start and End. -void SimpleRegisterCoalescing::unsetRegisterKills(unsigned Start, unsigned End, - unsigned Reg) { - int e = (End-1) / InstrSlots::NUM * InstrSlots::NUM; - int s = Start; - while (e >= s) { - // Skip deleted instructions - MachineInstr *MI = li_->getInstructionFromIndex(e); - while ((e - InstrSlots::NUM) >= s && !MI) { - e -= InstrSlots::NUM; - MI = li_->getInstructionFromIndex(e); - } - if (e < s || MI == NULL) - return; - - for (unsigned i = 0, NumOps = MI->getNumOperands(); i != NumOps; ++i) { - MachineOperand &MO = MI->getOperand(i); - if (MO.isRegister() && MO.isKill() && MO.getReg() && - tri_->regsOverlap(MO.getReg(), Reg)) { - MO.setIsKill(false); - } - } - - e -= InstrSlots::NUM; - } -} - +/// RemoveUnnecessaryKills - Remove kill markers that are no longer accurate +/// due to live range lengthening as the result of coalescing. void SimpleRegisterCoalescing::printRegName(unsigned reg) const { if (TargetRegisterInfo::isPhysicalRegister(reg)) cerr << tri_->getName(reg); Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h?rev=47749&r1=47748&r2=47749&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h Thu Feb 28 20:50:03 2008 @@ -190,10 +190,6 @@ bool RemoveCopyByCommutingDef(LiveInterval &IntA, LiveInterval &IntB, MachineInstr *CopyMI); - /// RemoveUnnecessaryKills - Remove kill markers that are no longer accurate - /// due to live range lengthening as the result of coalescing. - void RemoveUnnecessaryKills(unsigned Reg, LiveInterval &LI); - /// isBackEdgeCopy - Returns true if CopyMI is a back edge copy. /// bool isBackEdgeCopy(MachineInstr *CopyMI, unsigned DstReg); @@ -214,10 +210,6 @@ /// register. It returns NULL if the def is not found. MachineOperand *findDefOperand(MachineInstr *MI, unsigned Reg) const; - /// unsetRegisterKills - Unset IsKill property of all uses of specific register - /// between cycles Start and End. - void unsetRegisterKills(unsigned Start, unsigned End, unsigned Reg); - void printRegName(unsigned reg) const; }; From sabre at nondot.org Fri Feb 29 00:09:12 2008 From: sabre at nondot.org (Chris Lattner) Date: Fri, 29 Feb 2008 06:09:12 -0000 Subject: [llvm-commits] [llvm] r47750 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll Message-ID: <200802290609.m1T69C8K027363@zion.cs.uiuc.edu> Author: lattner Date: Fri Feb 29 00:09:11 2008 New Revision: 47750 URL: http://llvm.org/viewvc/llvm-project?rev=47750&view=rev Log: Folding or(fcmp,fcmp) only works if the operands of the fcmps are the same fp type. Added: llvm/trunk/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=47750&r1=47749&r2=47750&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Fri Feb 29 00:09:11 2008 @@ -4287,7 +4287,8 @@ if (FCmpInst *LHS = dyn_cast(I.getOperand(0))) { if (FCmpInst *RHS = dyn_cast(I.getOperand(1))) { if (LHS->getPredicate() == FCmpInst::FCMP_UNO && - RHS->getPredicate() == FCmpInst::FCMP_UNO) + RHS->getPredicate() == FCmpInst::FCMP_UNO && + LHS->getOperand(0)->getType() == RHS->getOperand(0)->getType()) if (ConstantFP *LHSC = dyn_cast(LHS->getOperand(1))) if (ConstantFP *RHSC = dyn_cast(RHS->getOperand(1))) { // If either of the constants are nans, then the whole thing returns Added: llvm/trunk/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll?rev=47750&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll (added) +++ llvm/trunk/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll Fri Feb 29 00:09:11 2008 @@ -0,0 +1,16 @@ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis +; rdar://5771353 + +define float @test(float %x, x86_fp80 %y) nounwind readonly { +entry: + %tmp67 = fcmp uno x86_fp80 %y, 0xK00000000000000000000 ; [#uses=1] + %tmp71 = fcmp uno float %x, 0.000000e+00 ; [#uses=1] + %bothcond = or i1 %tmp67, %tmp71 ; [#uses=1] + br i1 %bothcond, label %bb74, label %bb80 + +bb74: ; preds = %entry + ret float 0.000000e+00 + +bb80: ; preds = %entry + ret float 0.000000e+00 +} From sabre at nondot.org Fri Feb 29 01:03:13 2008 From: sabre at nondot.org (Chris Lattner) Date: Fri, 29 Feb 2008 07:03:13 -0000 Subject: [llvm-commits] [llvm] r47751 - /llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Message-ID: <200802290703.m1T73DHM028845@zion.cs.uiuc.edu> Author: lattner Date: Fri Feb 29 01:03:13 2008 New Revision: 47751 URL: http://llvm.org/viewvc/llvm-project?rev=47751&view=rev Log: Refactor some code out of ConvertUsesToScalar into their own methods, no functionality change. Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=47751&r1=47750&r2=47751&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Fri Feb 29 01:03:13 2008 @@ -118,6 +118,10 @@ const Type *CanConvertToScalar(Value *V, bool &IsNotTrivial); void ConvertToScalar(AllocationInst *AI, const Type *Ty); void ConvertUsesToScalar(Value *Ptr, AllocaInst *NewAI, unsigned Offset); + Value *ConvertUsesOfLoadToScalar(LoadInst *LI, AllocaInst *NewAI, + unsigned Offset); + Value *ConvertUsesOfStoreToScalar(StoreInst *SI, AllocaInst *NewAI, + unsigned Offset); static Instruction *isOnlyCopiedFromConstantGlobal(AllocationInst *AI); }; @@ -1071,163 +1075,17 @@ /// Offset is an offset from the original alloca, in bits that need to be /// shifted to the right. By the end of this, there should be no uses of Ptr. void SROA::ConvertUsesToScalar(Value *Ptr, AllocaInst *NewAI, unsigned Offset) { - const TargetData &TD = getAnalysis(); while (!Ptr->use_empty()) { Instruction *User = cast(Ptr->use_back()); if (LoadInst *LI = dyn_cast(User)) { - // The load is a bit extract from NewAI shifted right by Offset bits. - Value *NV = new LoadInst(NewAI, LI->getName(), LI); - if (NV->getType() == LI->getType() && Offset == 0) { - // We win, no conversion needed. - } else if (const VectorType *PTy = dyn_cast(NV->getType())) { - // If the result alloca is a vector type, this is either an element - // access or a bitcast to another vector type. - if (isa(LI->getType())) { - NV = new BitCastInst(NV, LI->getType(), LI->getName(), LI); - } else { - // Must be an element access. - unsigned Elt = Offset/TD.getABITypeSizeInBits(PTy->getElementType()); - NV = new ExtractElementInst( - NV, ConstantInt::get(Type::Int32Ty, Elt), "tmp", LI); - } - } else if (isa(NV->getType())) { - assert(isa(LI->getType())); - // Must be ptr->ptr cast. Anything else would result in NV being - // an integer. - NV = new BitCastInst(NV, LI->getType(), LI->getName(), LI); - } else { - const IntegerType *NTy = cast(NV->getType()); - - // If this is a big-endian system and the load is narrower than the - // full alloca type, we need to do a shift to get the right bits. - int ShAmt = 0; - if (TD.isBigEndian()) { - // On big-endian machines, the lowest bit is stored at the bit offset - // from the pointer given by getTypeStoreSizeInBits. This matters for - // integers with a bitwidth that is not a multiple of 8. - ShAmt = TD.getTypeStoreSizeInBits(NTy) - - TD.getTypeStoreSizeInBits(LI->getType()) - Offset; - } else { - ShAmt = Offset; - } - - // Note: we support negative bitwidths (with shl) which are not defined. - // We do this to support (f.e.) loads off the end of a structure where - // only some bits are used. - if (ShAmt > 0 && (unsigned)ShAmt < NTy->getBitWidth()) - NV = BinaryOperator::createLShr(NV, - ConstantInt::get(NV->getType(),ShAmt), - LI->getName(), LI); - else if (ShAmt < 0 && (unsigned)-ShAmt < NTy->getBitWidth()) - NV = BinaryOperator::createShl(NV, - ConstantInt::get(NV->getType(),-ShAmt), - LI->getName(), LI); - - // Finally, unconditionally truncate the integer to the right width. - unsigned LIBitWidth = TD.getTypeSizeInBits(LI->getType()); - if (LIBitWidth < NTy->getBitWidth()) - NV = new TruncInst(NV, IntegerType::get(LIBitWidth), - LI->getName(), LI); - - // If the result is an integer, this is a trunc or bitcast. - if (isa(LI->getType())) { - assert(NV->getType() == LI->getType() && "Truncate wasn't enough?"); - } else if (LI->getType()->isFloatingPoint()) { - // Just do a bitcast, we know the sizes match up. - NV = new BitCastInst(NV, LI->getType(), LI->getName(), LI); - } else { - // Otherwise must be a pointer. - NV = new IntToPtrInst(NV, LI->getType(), LI->getName(), LI); - } - } + Value *NV = ConvertUsesOfLoadToScalar(LI, NewAI, Offset); LI->replaceAllUsesWith(NV); LI->eraseFromParent(); } else if (StoreInst *SI = dyn_cast(User)) { assert(SI->getOperand(0) != Ptr && "Consistency error!"); - // Convert the stored type to the actual type, shift it left to insert - // then 'or' into place. - Value *SV = SI->getOperand(0); - const Type *AllocaType = NewAI->getType()->getElementType(); - if (SV->getType() == AllocaType && Offset == 0) { - // All is well. - } else if (const VectorType *PTy = dyn_cast(AllocaType)) { - Value *Old = new LoadInst(NewAI, NewAI->getName()+".in", SI); - - // If the result alloca is a vector type, this is either an element - // access or a bitcast to another vector type. - if (isa(SV->getType())) { - SV = new BitCastInst(SV, AllocaType, SV->getName(), SI); - } else { - // Must be an element insertion. - unsigned Elt = Offset/TD.getABITypeSizeInBits(PTy->getElementType()); - SV = new InsertElementInst(Old, SV, - ConstantInt::get(Type::Int32Ty, Elt), - "tmp", SI); - } - } else if (isa(AllocaType)) { - // If the alloca type is a pointer, then all the elements must be - // pointers. - if (SV->getType() != AllocaType) - SV = new BitCastInst(SV, AllocaType, SV->getName(), SI); - } else { - Value *Old = new LoadInst(NewAI, NewAI->getName()+".in", SI); - - // If SV is a float, convert it to the appropriate integer type. - // If it is a pointer, do the same, and also handle ptr->ptr casts - // here. - unsigned SrcWidth = TD.getTypeSizeInBits(SV->getType()); - unsigned DestWidth = TD.getTypeSizeInBits(AllocaType); - unsigned SrcStoreWidth = TD.getTypeStoreSizeInBits(SV->getType()); - unsigned DestStoreWidth = TD.getTypeStoreSizeInBits(AllocaType); - if (SV->getType()->isFloatingPoint()) - SV = new BitCastInst(SV, IntegerType::get(SrcWidth), - SV->getName(), SI); - else if (isa(SV->getType())) - SV = new PtrToIntInst(SV, TD.getIntPtrType(), SV->getName(), SI); - - // Always zero extend the value if needed. - if (SV->getType() != AllocaType) - SV = new ZExtInst(SV, AllocaType, SV->getName(), SI); - - // If this is a big-endian system and the store is narrower than the - // full alloca type, we need to do a shift to get the right bits. - int ShAmt = 0; - if (TD.isBigEndian()) { - // On big-endian machines, the lowest bit is stored at the bit offset - // from the pointer given by getTypeStoreSizeInBits. This matters for - // integers with a bitwidth that is not a multiple of 8. - ShAmt = DestStoreWidth - SrcStoreWidth - Offset; - } else { - ShAmt = Offset; - } - - // Note: we support negative bitwidths (with shr) which are not defined. - // We do this to support (f.e.) stores off the end of a structure where - // only some bits in the structure are set. - APInt Mask(APInt::getLowBitsSet(DestWidth, SrcWidth)); - if (ShAmt > 0 && (unsigned)ShAmt < DestWidth) { - SV = BinaryOperator::createShl(SV, - ConstantInt::get(SV->getType(), ShAmt), - SV->getName(), SI); - Mask <<= ShAmt; - } else if (ShAmt < 0 && (unsigned)-ShAmt < DestWidth) { - SV = BinaryOperator::createLShr(SV, - ConstantInt::get(SV->getType(),-ShAmt), - SV->getName(), SI); - Mask = Mask.lshr(ShAmt); - } - - // Mask out the bits we are about to insert from the old value, and or - // in the new bits. - if (SrcWidth != DestWidth) { - assert(DestWidth > SrcWidth); - Old = BinaryOperator::createAnd(Old, ConstantInt::get(~Mask), - Old->getName()+".mask", SI); - SV = BinaryOperator::createOr(Old, SV, SV->getName()+".ins", SI); - } - } + Value *SV = ConvertUsesOfStoreToScalar(SI, NewAI, Offset); new StoreInst(SV, NewAI, SI); SI->eraseFromParent(); @@ -1279,6 +1137,190 @@ } } +/// ConvertUsesOfLoadToScalar - Convert all of the users the specified load to +/// use the new alloca directly, returning the value that should replace the +/// load. This happens when we are converting an "integer union" to a +/// single integer scalar, or when we are converting a "vector union" to a +/// vector with insert/extractelement instructions. +/// +/// Offset is an offset from the original alloca, in bits that need to be +/// shifted to the right. By the end of this, there should be no uses of Ptr. +Value *SROA::ConvertUsesOfLoadToScalar(LoadInst *LI, AllocaInst *NewAI, + unsigned Offset) { + // The load is a bit extract from NewAI shifted right by Offset bits. + Value *NV = new LoadInst(NewAI, LI->getName(), LI); + + if (NV->getType() == LI->getType() && Offset == 0) { + // We win, no conversion needed. + return NV; + } + + if (const VectorType *PTy = dyn_cast(NV->getType())) { + // If the result alloca is a vector type, this is either an element + // access or a bitcast to another vector type. + if (isa(LI->getType())) { + NV = new BitCastInst(NV, LI->getType(), LI->getName(), LI); + } else { + // Must be an element access. + const TargetData &TD = getAnalysis(); + unsigned Elt = Offset/TD.getABITypeSizeInBits(PTy->getElementType()); + NV = new ExtractElementInst(NV, ConstantInt::get(Type::Int32Ty, Elt), + "tmp", LI); + } + } else if (isa(NV->getType())) { + assert(isa(LI->getType())); + // Must be ptr->ptr cast. Anything else would result in NV being + // an integer. + NV = new BitCastInst(NV, LI->getType(), LI->getName(), LI); + } else { + const IntegerType *NTy = cast(NV->getType()); + + // If this is a big-endian system and the load is narrower than the + // full alloca type, we need to do a shift to get the right bits. + int ShAmt = 0; + const TargetData &TD = getAnalysis(); + if (TD.isBigEndian()) { + // On big-endian machines, the lowest bit is stored at the bit offset + // from the pointer given by getTypeStoreSizeInBits. This matters for + // integers with a bitwidth that is not a multiple of 8. + ShAmt = TD.getTypeStoreSizeInBits(NTy) - + TD.getTypeStoreSizeInBits(LI->getType()) - Offset; + } else { + ShAmt = Offset; + } + + // Note: we support negative bitwidths (with shl) which are not defined. + // We do this to support (f.e.) loads off the end of a structure where + // only some bits are used. + if (ShAmt > 0 && (unsigned)ShAmt < NTy->getBitWidth()) + NV = BinaryOperator::createLShr(NV, + ConstantInt::get(NV->getType(),ShAmt), + LI->getName(), LI); + else if (ShAmt < 0 && (unsigned)-ShAmt < NTy->getBitWidth()) + NV = BinaryOperator::createShl(NV, + ConstantInt::get(NV->getType(),-ShAmt), + LI->getName(), LI); + + // Finally, unconditionally truncate the integer to the right width. + unsigned LIBitWidth = TD.getTypeSizeInBits(LI->getType()); + if (LIBitWidth < NTy->getBitWidth()) + NV = new TruncInst(NV, IntegerType::get(LIBitWidth), + LI->getName(), LI); + + // If the result is an integer, this is a trunc or bitcast. + if (isa(LI->getType())) { + assert(NV->getType() == LI->getType() && "Truncate wasn't enough?"); + } else if (LI->getType()->isFloatingPoint()) { + // Just do a bitcast, we know the sizes match up. + NV = new BitCastInst(NV, LI->getType(), LI->getName(), LI); + } else { + // Otherwise must be a pointer. + NV = new IntToPtrInst(NV, LI->getType(), LI->getName(), LI); + } + } + return NV; +} + + +/// ConvertUsesOfStoreToScalar - Convert the specified store to a load+store +/// pair of the new alloca directly, returning the value that should be stored +/// to the alloca. This happens when we are converting an "integer union" to a +/// single integer scalar, or when we are converting a "vector union" to a +/// vector with insert/extractelement instructions. +/// +/// Offset is an offset from the original alloca, in bits that need to be +/// shifted to the right. By the end of this, there should be no uses of Ptr. +Value *SROA::ConvertUsesOfStoreToScalar(StoreInst *SI, AllocaInst *NewAI, + unsigned Offset) { + + // Convert the stored type to the actual type, shift it left to insert + // then 'or' into place. + Value *SV = SI->getOperand(0); + const Type *AllocaType = NewAI->getType()->getElementType(); + if (SV->getType() == AllocaType && Offset == 0) { + // All is well. + } else if (const VectorType *PTy = dyn_cast(AllocaType)) { + Value *Old = new LoadInst(NewAI, NewAI->getName()+".in", SI); + + // If the result alloca is a vector type, this is either an element + // access or a bitcast to another vector type. + if (isa(SV->getType())) { + SV = new BitCastInst(SV, AllocaType, SV->getName(), SI); + } else { + // Must be an element insertion. + const TargetData &TD = getAnalysis(); + unsigned Elt = Offset/TD.getABITypeSizeInBits(PTy->getElementType()); + SV = new InsertElementInst(Old, SV, + ConstantInt::get(Type::Int32Ty, Elt), + "tmp", SI); + } + } else if (isa(AllocaType)) { + // If the alloca type is a pointer, then all the elements must be + // pointers. + if (SV->getType() != AllocaType) + SV = new BitCastInst(SV, AllocaType, SV->getName(), SI); + } else { + Value *Old = new LoadInst(NewAI, NewAI->getName()+".in", SI); + + // If SV is a float, convert it to the appropriate integer type. + // If it is a pointer, do the same, and also handle ptr->ptr casts + // here. + const TargetData &TD = getAnalysis(); + unsigned SrcWidth = TD.getTypeSizeInBits(SV->getType()); + unsigned DestWidth = TD.getTypeSizeInBits(AllocaType); + unsigned SrcStoreWidth = TD.getTypeStoreSizeInBits(SV->getType()); + unsigned DestStoreWidth = TD.getTypeStoreSizeInBits(AllocaType); + if (SV->getType()->isFloatingPoint()) + SV = new BitCastInst(SV, IntegerType::get(SrcWidth), + SV->getName(), SI); + else if (isa(SV->getType())) + SV = new PtrToIntInst(SV, TD.getIntPtrType(), SV->getName(), SI); + + // Always zero extend the value if needed. + if (SV->getType() != AllocaType) + SV = new ZExtInst(SV, AllocaType, SV->getName(), SI); + + // If this is a big-endian system and the store is narrower than the + // full alloca type, we need to do a shift to get the right bits. + int ShAmt = 0; + if (TD.isBigEndian()) { + // On big-endian machines, the lowest bit is stored at the bit offset + // from the pointer given by getTypeStoreSizeInBits. This matters for + // integers with a bitwidth that is not a multiple of 8. + ShAmt = DestStoreWidth - SrcStoreWidth - Offset; + } else { + ShAmt = Offset; + } + + // Note: we support negative bitwidths (with shr) which are not defined. + // We do this to support (f.e.) stores off the end of a structure where + // only some bits in the structure are set. + APInt Mask(APInt::getLowBitsSet(DestWidth, SrcWidth)); + if (ShAmt > 0 && (unsigned)ShAmt < DestWidth) { + SV = BinaryOperator::createShl(SV, + ConstantInt::get(SV->getType(), ShAmt), + SV->getName(), SI); + Mask <<= ShAmt; + } else if (ShAmt < 0 && (unsigned)-ShAmt < DestWidth) { + SV = BinaryOperator::createLShr(SV, + ConstantInt::get(SV->getType(),-ShAmt), + SV->getName(), SI); + Mask = Mask.lshr(ShAmt); + } + + // Mask out the bits we are about to insert from the old value, and or + // in the new bits. + if (SrcWidth != DestWidth) { + assert(DestWidth > SrcWidth); + Old = BinaryOperator::createAnd(Old, ConstantInt::get(~Mask), + Old->getName()+".mask", SI); + SV = BinaryOperator::createOr(Old, SV, SV->getName()+".ins", SI); + } + } + return SV; +} + + /// PointsToConstantGlobal - Return true if V (possibly indirectly) points to /// some part of a constant global variable. This intentionally only accepts From sabre at nondot.org Fri Feb 29 01:12:06 2008 From: sabre at nondot.org (Chris Lattner) Date: Fri, 29 Feb 2008 07:12:06 -0000 Subject: [llvm-commits] [llvm] r47752 - in /llvm/trunk: lib/Transforms/Scalar/ScalarReplAggregates.cpp test/Transforms/ScalarRepl/2008-02-28-SubElementExtractCrash.ll Message-ID: <200802290712.m1T7C6Mi029159@zion.cs.uiuc.edu> Author: lattner Date: Fri Feb 29 01:12:06 2008 New Revision: 47752 URL: http://llvm.org/viewvc/llvm-project?rev=47752&view=rev Log: fix a bug Anders ran into where scalarrepl would crash when promoting a union containing a vector and an array whose elements were smaller than the vector elements. this means we need to compile the load of the array elements into an extract element plus a truncate. Added: llvm/trunk/test/Transforms/ScalarRepl/2008-02-28-SubElementExtractCrash.ll Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=47752&r1=47751&r2=47752&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Fri Feb 29 01:12:06 2008 @@ -1154,70 +1154,81 @@ // We win, no conversion needed. return NV; } + + // If the result type of the 'union' is a pointer, then this must be ptr->ptr + // cast. Anything else would result in NV being an integer. + if (isa(NV->getType())) { + assert(isa(LI->getType())); + return new BitCastInst(NV, LI->getType(), LI->getName(), LI); + } - if (const VectorType *PTy = dyn_cast(NV->getType())) { + if (const VectorType *VTy = dyn_cast(NV->getType())) { // If the result alloca is a vector type, this is either an element // access or a bitcast to another vector type. - if (isa(LI->getType())) { - NV = new BitCastInst(NV, LI->getType(), LI->getName(), LI); - } else { - // Must be an element access. - const TargetData &TD = getAnalysis(); - unsigned Elt = Offset/TD.getABITypeSizeInBits(PTy->getElementType()); - NV = new ExtractElementInst(NV, ConstantInt::get(Type::Int32Ty, Elt), - "tmp", LI); - } - } else if (isa(NV->getType())) { - assert(isa(LI->getType())); - // Must be ptr->ptr cast. Anything else would result in NV being - // an integer. - NV = new BitCastInst(NV, LI->getType(), LI->getName(), LI); - } else { - const IntegerType *NTy = cast(NV->getType()); - - // If this is a big-endian system and the load is narrower than the - // full alloca type, we need to do a shift to get the right bits. - int ShAmt = 0; + if (isa(LI->getType())) + return new BitCastInst(NV, LI->getType(), LI->getName(), LI); + + // Otherwise it must be an element access. const TargetData &TD = getAnalysis(); - if (TD.isBigEndian()) { - // On big-endian machines, the lowest bit is stored at the bit offset - // from the pointer given by getTypeStoreSizeInBits. This matters for - // integers with a bitwidth that is not a multiple of 8. - ShAmt = TD.getTypeStoreSizeInBits(NTy) - - TD.getTypeStoreSizeInBits(LI->getType()) - Offset; - } else { - ShAmt = Offset; + unsigned Elt = 0; + if (Offset) { + unsigned EltSize = TD.getABITypeSizeInBits(VTy->getElementType()); + Elt = Offset/EltSize; + Offset -= EltSize*Elt; } + NV = new ExtractElementInst(NV, ConstantInt::get(Type::Int32Ty, Elt), + "tmp", LI); - // Note: we support negative bitwidths (with shl) which are not defined. - // We do this to support (f.e.) loads off the end of a structure where - // only some bits are used. - if (ShAmt > 0 && (unsigned)ShAmt < NTy->getBitWidth()) - NV = BinaryOperator::createLShr(NV, - ConstantInt::get(NV->getType(),ShAmt), - LI->getName(), LI); - else if (ShAmt < 0 && (unsigned)-ShAmt < NTy->getBitWidth()) - NV = BinaryOperator::createShl(NV, - ConstantInt::get(NV->getType(),-ShAmt), - LI->getName(), LI); - - // Finally, unconditionally truncate the integer to the right width. - unsigned LIBitWidth = TD.getTypeSizeInBits(LI->getType()); - if (LIBitWidth < NTy->getBitWidth()) - NV = new TruncInst(NV, IntegerType::get(LIBitWidth), - LI->getName(), LI); - - // If the result is an integer, this is a trunc or bitcast. - if (isa(LI->getType())) { - assert(NV->getType() == LI->getType() && "Truncate wasn't enough?"); - } else if (LI->getType()->isFloatingPoint()) { - // Just do a bitcast, we know the sizes match up. - NV = new BitCastInst(NV, LI->getType(), LI->getName(), LI); - } else { - // Otherwise must be a pointer. - NV = new IntToPtrInst(NV, LI->getType(), LI->getName(), LI); - } + // If we're done, return this element. + if (NV->getType() == LI->getType() && Offset == 0) + return NV; + } + + const IntegerType *NTy = cast(NV->getType()); + + // If this is a big-endian system and the load is narrower than the + // full alloca type, we need to do a shift to get the right bits. + int ShAmt = 0; + const TargetData &TD = getAnalysis(); + if (TD.isBigEndian()) { + // On big-endian machines, the lowest bit is stored at the bit offset + // from the pointer given by getTypeStoreSizeInBits. This matters for + // integers with a bitwidth that is not a multiple of 8. + ShAmt = TD.getTypeStoreSizeInBits(NTy) - + TD.getTypeStoreSizeInBits(LI->getType()) - Offset; + } else { + ShAmt = Offset; + } + + // Note: we support negative bitwidths (with shl) which are not defined. + // We do this to support (f.e.) loads off the end of a structure where + // only some bits are used. + if (ShAmt > 0 && (unsigned)ShAmt < NTy->getBitWidth()) + NV = BinaryOperator::createLShr(NV, + ConstantInt::get(NV->getType(),ShAmt), + LI->getName(), LI); + else if (ShAmt < 0 && (unsigned)-ShAmt < NTy->getBitWidth()) + NV = BinaryOperator::createShl(NV, + ConstantInt::get(NV->getType(),-ShAmt), + LI->getName(), LI); + + // Finally, unconditionally truncate the integer to the right width. + unsigned LIBitWidth = TD.getTypeSizeInBits(LI->getType()); + if (LIBitWidth < NTy->getBitWidth()) + NV = new TruncInst(NV, IntegerType::get(LIBitWidth), + LI->getName(), LI); + + // If the result is an integer, this is a trunc or bitcast. + if (isa(LI->getType())) { + // Should be done. + } else if (LI->getType()->isFloatingPoint()) { + // Just do a bitcast, we know the sizes match up. + NV = new BitCastInst(NV, LI->getType(), LI->getName(), LI); + } else { + // Otherwise must be a pointer. + NV = new IntToPtrInst(NV, LI->getType(), LI->getName(), LI); } + assert(NV->getType() == LI->getType() && "Didn't convert right?"); return NV; } Added: llvm/trunk/test/Transforms/ScalarRepl/2008-02-28-SubElementExtractCrash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ScalarRepl/2008-02-28-SubElementExtractCrash.ll?rev=47752&view=auto ============================================================================== --- llvm/trunk/test/Transforms/ScalarRepl/2008-02-28-SubElementExtractCrash.ll (added) +++ llvm/trunk/test/Transforms/ScalarRepl/2008-02-28-SubElementExtractCrash.ll Fri Feb 29 01:12:06 2008 @@ -0,0 +1,16 @@ +; RUN: llvm-as < %s | opt -scalarrepl | llvm-dis | not grep alloca +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i686-apple-darwin8" + %struct..0anon = type { <1 x i64> } + +define i32 @main(i32 %argc, i8** %argv) { +entry: + %c = alloca %struct..0anon ; <%struct..0anon*> [#uses=2] + %tmp2 = getelementptr %struct..0anon* %c, i32 0, i32 0 ; <<1 x i64>*> [#uses=1] + store <1 x i64> zeroinitializer, <1 x i64>* %tmp2, align 8 + %tmp7 = getelementptr %struct..0anon* %c, i32 0, i32 0 ; <<1 x i64>*> [#uses=1] + %tmp78 = bitcast <1 x i64>* %tmp7 to [2 x i32]* ; <[2 x i32]*> [#uses=1] + %tmp9 = getelementptr [2 x i32]* %tmp78, i32 0, i32 0 ; [#uses=1] + %tmp10 = load i32* %tmp9, align 4 ; [#uses=0] + unreachable +} From asl at math.spbu.ru Fri Feb 29 08:26:18 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Fri, 29 Feb 2008 17:26:18 +0300 Subject: [llvm-commits] [llvm] r47703 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Targe Message-ID: Hello, Dale On 2/29/08, Dale Johannesen wrote: > Are you sure this is the same bug? Evan's patch doesn't look likely > to produce this result. There was a big rewrite of EH by Anton that > might well have broken something like this, however. I haven't committed anything, which can change the behavior of EH. I just added few helpers, which are currently not used. More stuff to come :) -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From romix.llvm at googlemail.com Fri Feb 29 11:27:32 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Fri, 29 Feb 2008 18:27:32 +0100 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> References: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> Message-ID: Hi Evan, Hi Dan, Thanks a lot for your review of my patch. I'm working on incorporating the feedback. See my comments below. 2008/2/28, Evan Cheng : > Latencies[SU->NodeNum] = 1; > This should be 0, not 1 since the original code is: > if (SU->Succs.empty()) > WorkList.push_back(std::make_pair(SU, 0U)); Initially, I have though exactly like you and have written Latencies[SU->NodeNum] = 0; But then I let both old and new algorithm to run on the same data side-by-side and compared the results. It turned out that if you set this value to 0, then ALL latencies computed by the new algorithm are less by 1 then those computed by the old algorithm. Therefore I changed this assignment to 1, which fixed the problem, even though I do not quite understand why it does not produce the correct result with 0, Do you have any ideas? > For testing, it would be good to run the original code and then the > new code and then verify they produce the same numbers. This is what I did while developing the algorithm. The numbers were exactly the same on my use-cases. > A bug in depth / height calculation is not likely to cause correctness failures > but something much more subtile. Indeed ;-) Now, a new problem I have descovered: While improving my patch, I also looked at the LatencyPriorityQueue implementation and the RegReductionPriorityQueue implementation. Both are using priority queues and have an extremely inefficient remove() method, that consumes 90% of the compilation time on very big BBs. So, I changed the data structure from the priority queue to the ordered std::set. Obviously, the max element is basically the last element of the set. This change produces a 3x speedup of compilation time on huge basic blocks. But there is a problem (or a bug!): the comparison operator td_ls_rr_sort::operator()(const SUnit* left, const SUnit* right) (see ScheduleDAGRRList.cpp) seems to be implemented incorrectly (see the code below). bool td_ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const { unsigned LPriority = SPQ->getNodePriority(left); unsigned RPriority = SPQ->getNodePriority(right); bool LIsTarget = left->Node && left->Node->isTargetOpcode(); bool RIsTarget = right->Node && right->Node->isTargetOpcode(); bool LIsFloater = LIsTarget && left->NumPreds == 0; bool RIsFloater = RIsTarget && right->NumPreds == 0; unsigned LBonus = (SumOfUnscheduledPredsOfSuccs(left) == 1) ? 2 : 0; unsigned RBonus = (SumOfUnscheduledPredsOfSuccs(right) == 1) ? 2 : 0; if (left->NumSuccs == 0 && right->NumSuccs != 0) return false; else if (left->NumSuccs != 0 && right->NumSuccs == 0) return true; // Special tie breaker: if two nodes share a operand, the one that use it // as a def&use operand is preferred. if (LIsTarget && RIsTarget) { if (left->isTwoAddress && !right->isTwoAddress) { SDNode *DUNode = left->Node->getOperand(0).Val; if (DUNode->isOperand(right->Node)) RBonus += 2; } if (!left->isTwoAddress && right->isTwoAddress) { SDNode *DUNode = right->Node->getOperand(0).Val; if (DUNode->isOperand(left->Node)) LBonus += 2; } } if (LIsFloater) LBonus -= 2; if (RIsFloater) RBonus -= 2; if (left->NumSuccs == 1) LBonus += 2; if (right->NumSuccs == 1) RBonus += 2; if (LPriority+LBonus < RPriority+RBonus) return true; else if (LPriority == RPriority) { if (left->Depth < right->Depth) return true; else if (left->Depth == right->Depth) { if (left->NumSuccsLeft > right->NumSuccsLeft) return true; else if (left->NumSuccsLeft == right->NumSuccsLeft) { if (left->CycleBound > right->CycleBound) return true; } } } return false; } Namely, I discovered by debugging two specific values L and R, where L!=R, so that this operator returns FALSE (by return statement at the very end of the method) for both pair (L,R) and (R,L). That means that L >= R and R >=L and L!=R at the same time, which cannot be. This incorrect comparison operator breaks all set operations based on the ordering of elements, e.g. find() and insert(). Actually, I'm wondering why it didn't break the priority queue operations before. The same operator for bu_ls_rr_sort has a very long disclaimer related to a similar issue: // There used to be a special tie breaker here that looked for // two-address instructions and preferred the instruction with a // def&use operand. The special case triggered diagnostics when // _GLIBCXX_DEBUG was enabled because it broke the strict weak // ordering that priority_queue requires. It didn't help much anyway // because AddPseudoTwoAddrDeps already covers many of the cases // where it would have applied. In addition, it's counter-intuitive // that a tie breaker would be the first thing attempted. There's a // "real" tie breaker below that is the operation of last resort. // The fact that the "special tie breaker" would trigger when there // wasn't otherwise a tie is what broke the strict weak ordering // constraint. So, there seems to be a problem. But I don't have a solution for it. I need you help to understand how to fix it. Thanks, Roman From evan.cheng at apple.com Fri Feb 29 11:52:15 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 29 Feb 2008 17:52:15 -0000 Subject: [llvm-commits] [llvm] r47755 - /llvm/trunk/lib/CodeGen/LoopAligner.cpp Message-ID: <200802291752.m1THqGgq024843@zion.cs.uiuc.edu> Author: evancheng Date: Fri Feb 29 11:52:15 2008 New Revision: 47755 URL: http://llvm.org/viewvc/llvm-project?rev=47755&view=rev Log: Fix PR2112: don't run loop aligner if target doesn't have a TargetLowering object. Modified: llvm/trunk/lib/CodeGen/LoopAligner.cpp Modified: llvm/trunk/lib/CodeGen/LoopAligner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LoopAligner.cpp?rev=47755&r1=47754&r2=47755&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LoopAligner.cpp (original) +++ llvm/trunk/lib/CodeGen/LoopAligner.cpp Fri Feb 29 11:52:15 2008 @@ -24,8 +24,6 @@ namespace { class LoopAligner : public MachineFunctionPass { - const TargetLowering *TLI; - public: static char ID; LoopAligner() : MachineFunctionPass((intptr_t)&ID) {} @@ -51,7 +49,11 @@ if (MLI->begin() == MLI->end()) return false; // No loops. - unsigned Align = MF.getTarget().getTargetLowering()->getPrefLoopAlignment(); + const TargetLowering *TLI = MF.getTarget().getTargetLowering(); + if (!TLI) + return false; + + unsigned Align = TLI->getPrefLoopAlignment(); if (!Align) return false; // Don't care about loop alignment. From evan.cheng at apple.com Fri Feb 29 12:01:14 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 29 Feb 2008 18:01:14 -0000 Subject: [llvm-commits] [test-suite] r47756 - /test-suite/trunk/RunSafely.sh Message-ID: <200802291801.m1TI1E57025104@zion.cs.uiuc.edu> Author: evancheng Date: Fri Feb 29 12:01:13 2008 New Revision: 47756 URL: http://llvm.org/viewvc/llvm-project?rev=47756&view=rev Log: Try to make remote testing more robust. Modified: test-suite/trunk/RunSafely.sh Modified: test-suite/trunk/RunSafely.sh URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/RunSafely.sh?rev=47756&r1=47755&r2=47756&view=diff ============================================================================== --- test-suite/trunk/RunSafely.sh (original) +++ test-suite/trunk/RunSafely.sh Fri Feb 29 12:01:13 2008 @@ -104,8 +104,14 @@ COMMAND="${DIR}TimedExec.sh $ULIMIT $PWD $COMMAND" fi +rm -f "$PWD/${PROGRAM}.command" +rm -f "$PWD/${PROGRAM}.remote" +rm -f "$PWD/${PROGRAM}.remote.time" +echo "$ULIMITCMD (time -p ($COMMAND > $PWD/$OUTFILE.remote 2>&1 < $INFILE;); echo exit $?) > $PWD/$OUTFILE.remote.time 2>&1" > "$PWD/${PROGRAM}.command" +chmod +x "$PWD/${PROGRAM}.command" + if [ "x$RHOST" = x ] ; then - ( sh -c "$ULIMITCMD time -p $COMMAND >$OUTFILE 2>&1 < $INFILE; echo exit \$?" ) 2>&1 \ + ( sh -c "$ULIMITCMD"; time -p sh -c "$COMMAND >$OUTFILE 2>&1 < $INFILE" ; echo exit $? ) 2>&1 \ | awk -- '\ BEGIN { cpu = 0.0; } /^user/ { cpu += $2; print; } @@ -113,15 +119,18 @@ !/^user/ && !/^sys/ { print; } END { printf("program %f\n", cpu); }' > $OUTFILE.time else - ( rsh -l $RUSER $RHOST "$ULIMITCMD cd $PWD; time -p $COMMAND >$OUTFILE.remote 2>&1 < $INFILE; echo exit \$?" ) 2>&1 \ - | awk -- '\ + ( rsh -l $RUSER $RHOST "ls $PWD/${PROGRAM}.command" ) > /dev/null 2>&1 + ( rsh -l $RUSER $RHOST "$PWD/${PROGRAM}.command" ) + cat $OUTFILE.remote.time | awk -- '\ BEGIN { cpu = 0.0; } /^user/ { cpu += $2; print; } /^sys/ { cpu += $2; print; } !/^user/ && !/^sys/ { print; } END { printf("program %f\n", cpu); }' > $OUTFILE.time -cp $OUTFILE.remote $OUTFILE +sleep 1 +cp -f $OUTFILE.remote $OUTFILE rm -f $OUTFILE.remote +rm -f $OUTFILE.remote.time fi exitval=`grep '^exit ' $OUTFILE.time | sed -e 's/^exit //'` From evan.cheng at apple.com Fri Feb 29 12:22:59 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 29 Feb 2008 10:22:59 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> Message-ID: <68B13D00-6A6B-4DD6-B36A-7FA2B3E51895@apple.com> On Feb 29, 2008, at 9:27 AM, Roman Levenstein wrote: > Hi Evan, Hi Dan, > > Thanks a lot for your review of my patch. I'm working on incorporating > the feedback. See my comments below. > > 2008/2/28, Evan Cheng : > >> Latencies[SU->NodeNum] = 1; >> This should be 0, not 1 since the original code is: >> if (SU->Succs.empty()) >> WorkList.push_back(std::make_pair(SU, 0U)); > > Initially, I have though exactly like you and have written > Latencies[SU->NodeNum] = 0; > > But then I let both old and new algorithm to run on the same data > side-by-side and compared the results. It turned out that if you set > this value to 0, then ALL latencies computed by the new algorithm are > less by 1 then those computed by the old algorithm. Therefore I > changed this assignment to 1, which fixed the problem, even though I > do not quite understand why it does not produce the correct result > with 0, > > Do you have any ideas? Ok, the original code is: WorkList.push_back(std::make_pair(SU, 0U)); ... int &Latency = Latencies[SU->NodeNum]; if (Latency == -1 || (SU->Latency + SuccLat) > (unsigned)Latency) { Latency = SU->Latency + SuccLat; So SuccLat for nodes without successors are zero. So their resulting latency is SU->Latency. Perhaps you should initialize to SU->Latency. > > >> For testing, it would be good to run the original code and then the >> new code and then verify they produce the same numbers. > > This is what I did while developing the algorithm. The numbers were > exactly the same on my use-cases. Sounds good. > > >> A bug in depth / height calculation is not likely to cause >> correctness failures >> but something much more subtile. > Indeed ;-) > > Now, a new problem I have descovered: > While improving my patch, I also looked at the LatencyPriorityQueue > implementation and the RegReductionPriorityQueue implementation. Both > are using priority queues and have an extremely inefficient remove() Yes. > > method, that consumes 90% of the compilation time on very big BBs. So, > I changed the data structure from the priority queue to the ordered > std::set. Obviously, the max element is basically the last element of Hrm. std::set is also very inefficient (at least on Mac OS X). > > the set. This change produces a 3x speedup of compilation time on huge > basic blocks. But there is a problem (or a bug!): What about on normal sized basic blocks? > > > the comparison operator > td_ls_rr_sort::operator()(const SUnit* left, const SUnit* right) (see > ScheduleDAGRRList.cpp) > seems to be implemented incorrectly (see the code below). > > bool td_ls_rr_sort::operator()(const SUnit *left, const SUnit > *right) const { > unsigned LPriority = SPQ->getNodePriority(left); > unsigned RPriority = SPQ->getNodePriority(right); > bool LIsTarget = left->Node && left->Node->isTargetOpcode(); > bool RIsTarget = right->Node && right->Node->isTargetOpcode(); > bool LIsFloater = LIsTarget && left->NumPreds == 0; > bool RIsFloater = RIsTarget && right->NumPreds == 0; > unsigned LBonus = (SumOfUnscheduledPredsOfSuccs(left) == 1) ? 2 : 0; > unsigned RBonus = (SumOfUnscheduledPredsOfSuccs(right) == 1) ? 2 : 0; > > if (left->NumSuccs == 0 && right->NumSuccs != 0) > return false; > else if (left->NumSuccs != 0 && right->NumSuccs == 0) > return true; > > // Special tie breaker: if two nodes share a operand, the one that > use it > // as a def&use operand is preferred. > if (LIsTarget && RIsTarget) { > if (left->isTwoAddress && !right->isTwoAddress) { > SDNode *DUNode = left->Node->getOperand(0).Val; > if (DUNode->isOperand(right->Node)) > RBonus += 2; > } > if (!left->isTwoAddress && right->isTwoAddress) { > SDNode *DUNode = right->Node->getOperand(0).Val; > if (DUNode->isOperand(left->Node)) > LBonus += 2; > } > } > if (LIsFloater) > LBonus -= 2; > if (RIsFloater) > RBonus -= 2; > if (left->NumSuccs == 1) > LBonus += 2; > if (right->NumSuccs == 1) > RBonus += 2; > > if (LPriority+LBonus < RPriority+RBonus) > return true; > else if (LPriority == RPriority) { > if (left->Depth < right->Depth) > return true; > else if (left->Depth == right->Depth) { > if (left->NumSuccsLeft > right->NumSuccsLeft) > return true; > else if (left->NumSuccsLeft == right->NumSuccsLeft) { > if (left->CycleBound > right->CycleBound) > return true; > } > } > } > return false; > } > > Namely, I discovered by debugging two specific values L and R, where > L!=R, so that this operator returns FALSE (by return statement at the > very end of the method) for both pair (L,R) and (R,L). That means that > L >= R and R >=L and L!=R at the same time, which cannot be. This > incorrect comparison operator breaks all set operations based on the > ordering of elements, e.g. find() and insert(). Actually, I'm > wondering why it didn't break the priority queue operations before. > > The same operator for bu_ls_rr_sort has a very long disclaimer > related to a similar issue: > // There used to be a special tie breaker here that looked for > // two-address instructions and preferred the instruction with a > // def&use operand. The special case triggered diagnostics when > // _GLIBCXX_DEBUG was enabled because it broke the strict weak > // ordering that priority_queue requires. It didn't help much anyway > // because AddPseudoTwoAddrDeps already covers many of the cases > // where it would have applied. In addition, it's counter-intuitive > // that a tie breaker would be the first thing attempted. There's a > // "real" tie breaker below that is the operation of last resort. > // The fact that the "special tie breaker" would trigger when there > // wasn't otherwise a tie is what broke the strict weak ordering > // constraint. > > So, there seems to be a problem. But I don't have a solution for it. I > need you help to understand how to fix it. You can probably put in a deterministic tie-breaker to force ordering. Something like NodeNum? Evan > > > Thanks, > Roman > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Fri Feb 29 12:25:05 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 29 Feb 2008 10:25:05 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> Message-ID: <48E98535-C8D6-43E3-82ED-EF6911AD62A3@apple.com> BTW, please commit the depth / height patch before worrying about priorityqueue issue. Thanks! Evan On Feb 29, 2008, at 9:27 AM, Roman Levenstein wrote: > Hi Evan, Hi Dan, > > Thanks a lot for your review of my patch. I'm working on incorporating > the feedback. See my comments below. > > 2008/2/28, Evan Cheng : > >> Latencies[SU->NodeNum] = 1; >> This should be 0, not 1 since the original code is: >> if (SU->Succs.empty()) >> WorkList.push_back(std::make_pair(SU, 0U)); > > Initially, I have though exactly like you and have written > Latencies[SU->NodeNum] = 0; > > But then I let both old and new algorithm to run on the same data > side-by-side and compared the results. It turned out that if you set > this value to 0, then ALL latencies computed by the new algorithm are > less by 1 then those computed by the old algorithm. Therefore I > changed this assignment to 1, which fixed the problem, even though I > do not quite understand why it does not produce the correct result > with 0, > > Do you have any ideas? > >> For testing, it would be good to run the original code and then the >> new code and then verify they produce the same numbers. > > This is what I did while developing the algorithm. The numbers were > exactly the same on my use-cases. > >> A bug in depth / height calculation is not likely to cause >> correctness failures >> but something much more subtile. > Indeed ;-) > > Now, a new problem I have descovered: > While improving my patch, I also looked at the LatencyPriorityQueue > implementation and the RegReductionPriorityQueue implementation. Both > are using priority queues and have an extremely inefficient remove() > method, that consumes 90% of the compilation time on very big BBs. So, > I changed the data structure from the priority queue to the ordered > std::set. Obviously, the max element is basically the last element of > the set. This change produces a 3x speedup of compilation time on huge > basic blocks. But there is a problem (or a bug!): > > the comparison operator > td_ls_rr_sort::operator()(const SUnit* left, const SUnit* right) (see > ScheduleDAGRRList.cpp) > seems to be implemented incorrectly (see the code below). > > bool td_ls_rr_sort::operator()(const SUnit *left, const SUnit > *right) const { > unsigned LPriority = SPQ->getNodePriority(left); > unsigned RPriority = SPQ->getNodePriority(right); > bool LIsTarget = left->Node && left->Node->isTargetOpcode(); > bool RIsTarget = right->Node && right->Node->isTargetOpcode(); > bool LIsFloater = LIsTarget && left->NumPreds == 0; > bool RIsFloater = RIsTarget && right->NumPreds == 0; > unsigned LBonus = (SumOfUnscheduledPredsOfSuccs(left) == 1) ? 2 : 0; > unsigned RBonus = (SumOfUnscheduledPredsOfSuccs(right) == 1) ? 2 : 0; > > if (left->NumSuccs == 0 && right->NumSuccs != 0) > return false; > else if (left->NumSuccs != 0 && right->NumSuccs == 0) > return true; > > // Special tie breaker: if two nodes share a operand, the one that > use it > // as a def&use operand is preferred. > if (LIsTarget && RIsTarget) { > if (left->isTwoAddress && !right->isTwoAddress) { > SDNode *DUNode = left->Node->getOperand(0).Val; > if (DUNode->isOperand(right->Node)) > RBonus += 2; > } > if (!left->isTwoAddress && right->isTwoAddress) { > SDNode *DUNode = right->Node->getOperand(0).Val; > if (DUNode->isOperand(left->Node)) > LBonus += 2; > } > } > if (LIsFloater) > LBonus -= 2; > if (RIsFloater) > RBonus -= 2; > if (left->NumSuccs == 1) > LBonus += 2; > if (right->NumSuccs == 1) > RBonus += 2; > > if (LPriority+LBonus < RPriority+RBonus) > return true; > else if (LPriority == RPriority) { > if (left->Depth < right->Depth) > return true; > else if (left->Depth == right->Depth) { > if (left->NumSuccsLeft > right->NumSuccsLeft) > return true; > else if (left->NumSuccsLeft == right->NumSuccsLeft) { > if (left->CycleBound > right->CycleBound) > return true; > } > } > } > return false; > } > > Namely, I discovered by debugging two specific values L and R, where > L!=R, so that this operator returns FALSE (by return statement at the > very end of the method) for both pair (L,R) and (R,L). That means that > L >= R and R >=L and L!=R at the same time, which cannot be. This > incorrect comparison operator breaks all set operations based on the > ordering of elements, e.g. find() and insert(). Actually, I'm > wondering why it didn't break the priority queue operations before. > > The same operator for bu_ls_rr_sort has a very long disclaimer > related to a similar issue: > // There used to be a special tie breaker here that looked for > // two-address instructions and preferred the instruction with a > // def&use operand. The special case triggered diagnostics when > // _GLIBCXX_DEBUG was enabled because it broke the strict weak > // ordering that priority_queue requires. It didn't help much anyway > // because AddPseudoTwoAddrDeps already covers many of the cases > // where it would have applied. In addition, it's counter-intuitive > // that a tie breaker would be the first thing attempted. There's a > // "real" tie breaker below that is the operation of last resort. > // The fact that the "special tie breaker" would trigger when there > // wasn't otherwise a tie is what broke the strict weak ordering > // constraint. > > So, there seems to be a problem. But I don't have a solution for it. I > need you help to understand how to fix it. > > Thanks, > Roman > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Fri Feb 29 12:52:01 2008 From: isanbard at gmail.com (Bill Wendling) Date: Fri, 29 Feb 2008 18:52:01 -0000 Subject: [llvm-commits] [llvm] r47758 - in /llvm/trunk: lib/CodeGen/RegAllocLocal.cpp test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll Message-ID: <200802291852.m1TIq2Km026370@zion.cs.uiuc.edu> Author: void Date: Fri Feb 29 12:52:01 2008 New Revision: 47758 URL: http://llvm.org/viewvc/llvm-project?rev=47758&view=rev Log: If we reload a virtual register that's already been assigned, we want to mark that instruction as its "last use". This fixes PR1925. Added: llvm/trunk/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=47758&r1=47757&r2=47758&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Fri Feb 29 12:52:01 2008 @@ -480,8 +480,9 @@ // If the virtual register is already available, just update the instruction // and return. if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) { - MarkPhysRegRecentlyUsed(PR); // Already have this value available! + MarkPhysRegRecentlyUsed(PR); // Already have this value available! MI->getOperand(OpNum).setReg(PR); // Assign the input register + getVirtRegLastUse(VirtReg) = std::make_pair(MI, OpNum); return MI; } Added: llvm/trunk/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll?rev=47758&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll (added) +++ llvm/trunk/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll Fri Feb 29 12:52:01 2008 @@ -0,0 +1,250 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -regalloc=local +; PR1925 + + %struct..0._10 = type { i32 } + %struct..1__pthread_mutex_s = type { i32, i32, i32, i32, i32, %struct..0._10 } + %"struct.kc::impl_Ccode_option" = type { %"struct.kc::impl_abstract_phylum" } + %"struct.kc::impl_ID" = type { %"struct.kc::impl_abstract_phylum", %"struct.kc::impl_Ccode_option"*, %"struct.kc::impl_casestring__Str"*, i32, %"struct.kc::impl_casestring__Str"* } + %"struct.kc::impl_abstract_phylum" = type { i32 (...)** } + %"struct.kc::impl_casestring__Str" = type { %"struct.kc::impl_abstract_phylum", i8* } + %struct.pthread_attr_t = type { i32, [32 x i8] } + %struct.pthread_mutex_t = type { %struct..1__pthread_mutex_s } + + at _ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] + at _ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] + at _ZL27__gthrw_pthread_setspecificjPKv = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] + at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_ = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] + at _ZL22__gthrw_pthread_cancelm = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] + at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] + at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] + at _ZL26__gthrw_pthread_key_createPjPFvPvE = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] + at _ZL26__gthrw_pthread_key_deletej = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] + at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] + at _ZL20__gthrw_pthread_oncePiPFvvE3 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] + at _ZL27__gthrw_pthread_getspecificj4 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] + at _ZL27__gthrw_pthread_setspecificjPKv5 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] + at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_6 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] + at _ZL22__gthrw_pthread_cancelm7 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t8 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] + at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t9 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] + at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t10 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t11 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] + at _ZL26__gthrw_pthread_key_createPjPFvPvE12 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] + at _ZL26__gthrw_pthread_key_deletej13 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] + at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t14 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti15 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t16 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] + at _ZL20__gthrw_pthread_oncePiPFvvE19 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] + at _ZL27__gthrw_pthread_getspecificj20 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] + at _ZL27__gthrw_pthread_setspecificjPKv21 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] + at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_22 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] + at _ZL22__gthrw_pthread_cancelm23 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t24 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] + at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t25 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] + at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t26 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t27 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] + at _ZL26__gthrw_pthread_key_createPjPFvPvE28 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] + at _ZL26__gthrw_pthread_key_deletej29 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] + at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t30 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti31 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t32 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] + at _ZL20__gthrw_pthread_oncePiPFvvE45 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] + at _ZL27__gthrw_pthread_getspecificj46 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] + at _ZL27__gthrw_pthread_setspecificjPKv47 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] + at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_48 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] + at _ZL22__gthrw_pthread_cancelm49 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t50 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] + at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t51 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] + at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t52 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t53 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] + at _ZL26__gthrw_pthread_key_createPjPFvPvE54 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] + at _ZL26__gthrw_pthread_key_deletej55 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] + at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t56 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti57 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t58 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] + at _ZL20__gthrw_pthread_oncePiPFvvE113 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] + at _ZL27__gthrw_pthread_getspecificj114 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] + at _ZL27__gthrw_pthread_setspecificjPKv115 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] + at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_116 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] + at _ZL22__gthrw_pthread_cancelm117 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t118 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] + at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t119 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] + at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t120 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t121 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] + at _ZL26__gthrw_pthread_key_createPjPFvPvE122 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] + at _ZL26__gthrw_pthread_key_deletej123 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] + at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t124 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti125 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t126 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] + at _ZL20__gthrw_pthread_oncePiPFvvE547 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] + at _ZL27__gthrw_pthread_getspecificj548 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] + at _ZL27__gthrw_pthread_setspecificjPKv549 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] + at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_550 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] + at _ZL22__gthrw_pthread_cancelm551 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t552 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] + at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t553 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] + at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t554 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t555 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] + at _ZL26__gthrw_pthread_key_createPjPFvPvE556 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] + at _ZL26__gthrw_pthread_key_deletej557 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] + at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t558 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti559 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t560 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] + at _ZL20__gthrw_pthread_oncePiPFvvE820 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] + at _ZL27__gthrw_pthread_getspecificj821 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] + at _ZL27__gthrw_pthread_setspecificjPKv822 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] + at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_823 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] + at _ZL22__gthrw_pthread_cancelm824 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t825 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] + at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t826 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] + at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t827 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t828 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] + at _ZL26__gthrw_pthread_key_createPjPFvPvE829 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] + at _ZL26__gthrw_pthread_key_deletej830 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] + at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t831 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti832 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t833 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] + at _ZL20__gthrw_pthread_oncePiPFvvE963 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] + at _ZL27__gthrw_pthread_getspecificj964 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] + at _ZL27__gthrw_pthread_setspecificjPKv965 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] + at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_966 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] + at _ZL22__gthrw_pthread_cancelm967 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t968 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] + at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t969 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] + at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t970 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t971 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] + at _ZL26__gthrw_pthread_key_createPjPFvPvE972 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] + at _ZL26__gthrw_pthread_key_deletej973 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] + at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t974 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti975 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t976 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] + at _ZL20__gthrw_pthread_oncePiPFvvE1058 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] + at _ZL27__gthrw_pthread_getspecificj1059 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] + at _ZL27__gthrw_pthread_setspecificjPKv1060 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] + at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_1061 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] + at _ZL22__gthrw_pthread_cancelm1062 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t1063 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] + at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t1064 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] + at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t1065 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t1066 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] + at _ZL26__gthrw_pthread_key_createPjPFvPvE1067 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] + at _ZL26__gthrw_pthread_key_deletej1068 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] + at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t1069 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti1070 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t1071 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] + at _ZL20__gthrw_pthread_oncePiPFvvE1123 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] + at _ZL27__gthrw_pthread_getspecificj1124 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] + at _ZL27__gthrw_pthread_setspecificjPKv1125 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] + at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_1126 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] + at _ZL22__gthrw_pthread_cancelm1127 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t1128 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] + at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t1129 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] + at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t1130 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t1131 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] + at _ZL26__gthrw_pthread_key_createPjPFvPvE1132 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] + at _ZL26__gthrw_pthread_key_deletej1133 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] + at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t1134 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti1135 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t1136 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] + at _ZL20__gthrw_pthread_oncePiPFvvE1179 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] + at _ZL27__gthrw_pthread_getspecificj1180 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] + at _ZL27__gthrw_pthread_setspecificjPKv1181 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] + at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_1182 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] + at _ZL22__gthrw_pthread_cancelm1183 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t1184 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] + at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t1185 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] + at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t1186 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t1187 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] + at _ZL26__gthrw_pthread_key_createPjPFvPvE1188 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] + at _ZL26__gthrw_pthread_key_deletej1189 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] + at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t1190 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti1191 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t1192 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] + at _ZL20__gthrw_pthread_oncePiPFvvE1195 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] + at _ZL27__gthrw_pthread_getspecificj1196 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] + at _ZL27__gthrw_pthread_setspecificjPKv1197 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] + at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_1198 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] + at _ZL22__gthrw_pthread_cancelm1199 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t1200 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] + at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t1201 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] + at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t1202 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t1203 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] + at _ZL26__gthrw_pthread_key_createPjPFvPvE1204 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] + at _ZL26__gthrw_pthread_key_deletej1205 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] + at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t1206 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti1207 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t1208 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] + at _ZL20__gthrw_pthread_oncePiPFvvE1749 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] + at _ZL27__gthrw_pthread_getspecificj1750 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] + at _ZL27__gthrw_pthread_setspecificjPKv1751 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] + at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_1752 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] + at _ZL22__gthrw_pthread_cancelm1753 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t1754 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] + at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t1755 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] + at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t1756 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t1757 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] + at _ZL26__gthrw_pthread_key_createPjPFvPvE1758 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] + at _ZL26__gthrw_pthread_key_deletej1759 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] + at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t1760 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti1761 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t1762 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] + at _ZL20__gthrw_pthread_oncePiPFvvE1817 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] + at _ZL27__gthrw_pthread_getspecificj1818 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] + at _ZL27__gthrw_pthread_setspecificjPKv1819 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] + at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_1820 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] + at _ZL22__gthrw_pthread_cancelm1821 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t1822 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] + at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t1823 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] + at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t1824 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t1825 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] + at _ZL26__gthrw_pthread_key_createPjPFvPvE1826 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] + at _ZL26__gthrw_pthread_key_deletej1827 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] + at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t1828 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti1829 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t1830 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] + +declare i32 @pthread_once(i32*, void ()*) + +declare i8* @pthread_getspecific(i32) + +declare i32 @pthread_setspecific(i32, i8*) + +declare i32 @pthread_create(i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*) + +declare i32 @pthread_cancel(i32) + +declare i32 @pthread_mutex_lock(%struct.pthread_mutex_t*) + +declare i32 @pthread_mutex_trylock(%struct.pthread_mutex_t*) + +declare i32 @pthread_mutex_unlock(%struct.pthread_mutex_t*) + +declare i32 @pthread_mutex_init(%struct.pthread_mutex_t*, %struct..0._10*) + +declare i32 @pthread_key_create(i32*, void (i8*)*) + +declare i32 @pthread_key_delete(i32) + +declare i32 @pthread_mutexattr_init(%struct..0._10*) + +declare i32 @pthread_mutexattr_settype(%struct..0._10*, i32) + +declare i32 @pthread_mutexattr_destroy(%struct..0._10*) + +define %"struct.kc::impl_ID"* @_ZN2kc18f_typeofunpsubtermEPNS_15impl_unpsubtermEPNS_7impl_IDE(%"struct.kc::impl_Ccode_option"* %a_unpsubterm, %"struct.kc::impl_ID"* %a_operator) { +entry: + %tmp8 = getelementptr %"struct.kc::impl_Ccode_option"* %a_unpsubterm, i32 0, i32 0, i32 0 ; [#uses=0] + br i1 false, label %bb41, label %bb55 + +bb41: ; preds = %entry + ret %"struct.kc::impl_ID"* null + +bb55: ; preds = %entry + %tmp67 = tail call i32 null( %"struct.kc::impl_abstract_phylum"* null ) ; [#uses=0] + %tmp97 = tail call i32 null( %"struct.kc::impl_abstract_phylum"* null ) ; [#uses=0] + ret %"struct.kc::impl_ID"* null +} From dalej at apple.com Fri Feb 29 13:11:16 2008 From: dalej at apple.com (Dale Johannesen) Date: Fri, 29 Feb 2008 19:11:16 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47759 - /llvm-gcc-4.2/trunk/gcc/llvm-abi.h Message-ID: <200802291911.m1TJBG0G026905@zion.cs.uiuc.edu> Author: johannes Date: Fri Feb 29 13:11:16 2008 New Revision: 47759 URL: http://llvm.org/viewvc/llvm-project?rev=47759&view=rev Log: Reducing a struct to the type of its single element should be done only if their sizes are the same (__aligned__ can create structs where this is not true) Modified: llvm-gcc-4.2/trunk/gcc/llvm-abi.h Modified: llvm-gcc-4.2/trunk/gcc/llvm-abi.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-abi.h?rev=47759&r1=47758&r2=47759&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-abi.h (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-abi.h Fri Feb 29 13:11:16 2008 @@ -187,6 +187,9 @@ // LLVM_SHOULD_RETURN_STRUCT_AS_SCALAR - Return a TYPE tree if this struct // should be returned using the convention for that scalar TYPE, 0 otherwise. +// The returned TYPE must be the same size as X for this to work; that is +// checked elsewhere. (Structs where this is not the case can be constructed +// by abusing the __aligned__ attribute.) #ifndef LLVM_SHOULD_RETURN_STRUCT_AS_SCALAR #define LLVM_SHOULD_RETURN_STRUCT_AS_SCALAR(X) \ isSingleElementStructOrArray(X, false, false) @@ -219,7 +222,11 @@ // FIXME: this is a hack around returning 'complex double' by-val // which returns in r3/r4/r5/r6 on PowerPC. TREE_INT_CST_LOW(TYPE_SIZE_UNIT(type)) <= 8) { - if (tree SingleElt = LLVM_SHOULD_RETURN_STRUCT_AS_SCALAR(type)) { + tree SingleElt = LLVM_SHOULD_RETURN_STRUCT_AS_SCALAR(type); + if (SingleElt && TYPE_SIZE(SingleElt) && + TREE_CODE(TYPE_SIZE(SingleElt)) == INTEGER_CST && + TREE_INT_CST_LOW(TYPE_SIZE_UNIT(type)) == + TREE_INT_CST_LOW(TYPE_SIZE_UNIT(SingleElt))) { C.HandleAggregateResultAsScalar(ConvertType(SingleElt)); } else { // Otherwise return as an integer value large enough to hold the entire From asl at math.spbu.ru Fri Feb 29 13:15:38 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Fri, 29 Feb 2008 22:15:38 +0300 Subject: [llvm-commits] [llvm] r47758 - in /llvm/trunk: lib/CodeGen/RegAllocLocal.cpp test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll In-Reply-To: <200802291852.m1TIq2Km026370@zion.cs.uiuc.edu> References: <200802291852.m1TIq2Km026370@zion.cs.uiuc.edu> Message-ID: <1204312538.20469.248.camel@asl.dorms.spbu.ru> Hello, Bill > + at _ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] > + at _ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] What's about DCE'ing this testcase little bit? :) -- With best regards, Anton Korobeynikov. Faculty of Mathematics & Mechanics, Saint Petersburg State University. From isanbard at gmail.com Fri Feb 29 13:19:19 2008 From: isanbard at gmail.com (Bill Wendling) Date: Fri, 29 Feb 2008 11:19:19 -0800 Subject: [llvm-commits] [llvm] r47758 - in /llvm/trunk: lib/CodeGen/RegAllocLocal.cpp test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll In-Reply-To: <1204312538.20469.248.camel@asl.dorms.spbu.ru> References: <200802291852.m1TIq2Km026370@zion.cs.uiuc.edu> <1204312538.20469.248.camel@asl.dorms.spbu.ru> Message-ID: <16e5fdf90802291119u267b1d3bw499c0ea3cc0e9a43@mail.gmail.com> On Fri, Feb 29, 2008 at 11:15 AM, Anton Korobeynikov wrote: > Hello, Bill > > > > + at _ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] > > + at _ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] > What's about DCE'ing this testcase little bit? :) > Hi Anton, This is the output from bugpoint. ;-) We should probably modify bugpoint to do this for us. Anyway, sure. I'll give it a shot. -bw From isanbard at gmail.com Fri Feb 29 13:28:11 2008 From: isanbard at gmail.com (Bill Wendling) Date: Fri, 29 Feb 2008 19:28:11 -0000 Subject: [llvm-commits] [llvm] r47760 - /llvm/trunk/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll Message-ID: <200802291928.m1TJSBZH027350@zion.cs.uiuc.edu> Author: void Date: Fri Feb 29 13:28:11 2008 New Revision: 47760 URL: http://llvm.org/viewvc/llvm-project?rev=47760&view=rev Log: DCE'ed this testcase. Modified: llvm/trunk/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll Modified: llvm/trunk/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll?rev=47760&r1=47759&r2=47760&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll (original) +++ llvm/trunk/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll Fri Feb 29 13:28:11 2008 @@ -1,239 +1,10 @@ ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -regalloc=local ; PR1925 - %struct..0._10 = type { i32 } - %struct..1__pthread_mutex_s = type { i32, i32, i32, i32, i32, %struct..0._10 } %"struct.kc::impl_Ccode_option" = type { %"struct.kc::impl_abstract_phylum" } %"struct.kc::impl_ID" = type { %"struct.kc::impl_abstract_phylum", %"struct.kc::impl_Ccode_option"*, %"struct.kc::impl_casestring__Str"*, i32, %"struct.kc::impl_casestring__Str"* } %"struct.kc::impl_abstract_phylum" = type { i32 (...)** } %"struct.kc::impl_casestring__Str" = type { %"struct.kc::impl_abstract_phylum", i8* } - %struct.pthread_attr_t = type { i32, [32 x i8] } - %struct.pthread_mutex_t = type { %struct..1__pthread_mutex_s } - - at _ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] - at _ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] - at _ZL27__gthrw_pthread_setspecificjPKv = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] - at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_ = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] - at _ZL22__gthrw_pthread_cancelm = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] - at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] - at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] - at _ZL26__gthrw_pthread_key_createPjPFvPvE = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] - at _ZL26__gthrw_pthread_key_deletej = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] - at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] - at _ZL20__gthrw_pthread_oncePiPFvvE3 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] - at _ZL27__gthrw_pthread_getspecificj4 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] - at _ZL27__gthrw_pthread_setspecificjPKv5 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] - at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_6 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] - at _ZL22__gthrw_pthread_cancelm7 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t8 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] - at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t9 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] - at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t10 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t11 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] - at _ZL26__gthrw_pthread_key_createPjPFvPvE12 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] - at _ZL26__gthrw_pthread_key_deletej13 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] - at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t14 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti15 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t16 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] - at _ZL20__gthrw_pthread_oncePiPFvvE19 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] - at _ZL27__gthrw_pthread_getspecificj20 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] - at _ZL27__gthrw_pthread_setspecificjPKv21 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] - at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_22 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] - at _ZL22__gthrw_pthread_cancelm23 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t24 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] - at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t25 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] - at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t26 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t27 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] - at _ZL26__gthrw_pthread_key_createPjPFvPvE28 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] - at _ZL26__gthrw_pthread_key_deletej29 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] - at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t30 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti31 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t32 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] - at _ZL20__gthrw_pthread_oncePiPFvvE45 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] - at _ZL27__gthrw_pthread_getspecificj46 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] - at _ZL27__gthrw_pthread_setspecificjPKv47 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] - at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_48 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] - at _ZL22__gthrw_pthread_cancelm49 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t50 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] - at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t51 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] - at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t52 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t53 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] - at _ZL26__gthrw_pthread_key_createPjPFvPvE54 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] - at _ZL26__gthrw_pthread_key_deletej55 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] - at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t56 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti57 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t58 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] - at _ZL20__gthrw_pthread_oncePiPFvvE113 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] - at _ZL27__gthrw_pthread_getspecificj114 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] - at _ZL27__gthrw_pthread_setspecificjPKv115 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] - at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_116 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] - at _ZL22__gthrw_pthread_cancelm117 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t118 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] - at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t119 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] - at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t120 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t121 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] - at _ZL26__gthrw_pthread_key_createPjPFvPvE122 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] - at _ZL26__gthrw_pthread_key_deletej123 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] - at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t124 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti125 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t126 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] - at _ZL20__gthrw_pthread_oncePiPFvvE547 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] - at _ZL27__gthrw_pthread_getspecificj548 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] - at _ZL27__gthrw_pthread_setspecificjPKv549 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] - at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_550 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] - at _ZL22__gthrw_pthread_cancelm551 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t552 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] - at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t553 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] - at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t554 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t555 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] - at _ZL26__gthrw_pthread_key_createPjPFvPvE556 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] - at _ZL26__gthrw_pthread_key_deletej557 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] - at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t558 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti559 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t560 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] - at _ZL20__gthrw_pthread_oncePiPFvvE820 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] - at _ZL27__gthrw_pthread_getspecificj821 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] - at _ZL27__gthrw_pthread_setspecificjPKv822 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] - at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_823 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] - at _ZL22__gthrw_pthread_cancelm824 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t825 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] - at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t826 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] - at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t827 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t828 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] - at _ZL26__gthrw_pthread_key_createPjPFvPvE829 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] - at _ZL26__gthrw_pthread_key_deletej830 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] - at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t831 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti832 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t833 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] - at _ZL20__gthrw_pthread_oncePiPFvvE963 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] - at _ZL27__gthrw_pthread_getspecificj964 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] - at _ZL27__gthrw_pthread_setspecificjPKv965 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] - at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_966 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] - at _ZL22__gthrw_pthread_cancelm967 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t968 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] - at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t969 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] - at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t970 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t971 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] - at _ZL26__gthrw_pthread_key_createPjPFvPvE972 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] - at _ZL26__gthrw_pthread_key_deletej973 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] - at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t974 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti975 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t976 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] - at _ZL20__gthrw_pthread_oncePiPFvvE1058 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] - at _ZL27__gthrw_pthread_getspecificj1059 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] - at _ZL27__gthrw_pthread_setspecificjPKv1060 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] - at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_1061 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] - at _ZL22__gthrw_pthread_cancelm1062 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t1063 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] - at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t1064 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] - at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t1065 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t1066 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] - at _ZL26__gthrw_pthread_key_createPjPFvPvE1067 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] - at _ZL26__gthrw_pthread_key_deletej1068 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] - at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t1069 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti1070 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t1071 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] - at _ZL20__gthrw_pthread_oncePiPFvvE1123 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] - at _ZL27__gthrw_pthread_getspecificj1124 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] - at _ZL27__gthrw_pthread_setspecificjPKv1125 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] - at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_1126 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] - at _ZL22__gthrw_pthread_cancelm1127 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t1128 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] - at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t1129 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] - at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t1130 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t1131 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] - at _ZL26__gthrw_pthread_key_createPjPFvPvE1132 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] - at _ZL26__gthrw_pthread_key_deletej1133 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] - at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t1134 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti1135 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t1136 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] - at _ZL20__gthrw_pthread_oncePiPFvvE1179 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] - at _ZL27__gthrw_pthread_getspecificj1180 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] - at _ZL27__gthrw_pthread_setspecificjPKv1181 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] - at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_1182 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] - at _ZL22__gthrw_pthread_cancelm1183 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t1184 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] - at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t1185 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] - at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t1186 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t1187 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] - at _ZL26__gthrw_pthread_key_createPjPFvPvE1188 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] - at _ZL26__gthrw_pthread_key_deletej1189 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] - at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t1190 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti1191 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t1192 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] - at _ZL20__gthrw_pthread_oncePiPFvvE1195 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] - at _ZL27__gthrw_pthread_getspecificj1196 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] - at _ZL27__gthrw_pthread_setspecificjPKv1197 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] - at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_1198 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] - at _ZL22__gthrw_pthread_cancelm1199 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t1200 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] - at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t1201 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] - at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t1202 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t1203 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] - at _ZL26__gthrw_pthread_key_createPjPFvPvE1204 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] - at _ZL26__gthrw_pthread_key_deletej1205 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] - at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t1206 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti1207 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t1208 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] - at _ZL20__gthrw_pthread_oncePiPFvvE1749 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] - at _ZL27__gthrw_pthread_getspecificj1750 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] - at _ZL27__gthrw_pthread_setspecificjPKv1751 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] - at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_1752 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] - at _ZL22__gthrw_pthread_cancelm1753 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t1754 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] - at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t1755 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] - at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t1756 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t1757 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] - at _ZL26__gthrw_pthread_key_createPjPFvPvE1758 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] - at _ZL26__gthrw_pthread_key_deletej1759 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] - at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t1760 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti1761 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t1762 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] - at _ZL20__gthrw_pthread_oncePiPFvvE1817 = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] - at _ZL27__gthrw_pthread_getspecificj1818 = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] - at _ZL27__gthrw_pthread_setspecificjPKv1819 = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] - at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_1820 = alias weak i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] - at _ZL22__gthrw_pthread_cancelm1821 = alias weak i32 (i32)* @pthread_cancel ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t1822 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] - at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t1823 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] - at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t1824 = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] - at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t1825 = alias weak i32 (%struct.pthread_mutex_t*, %struct..0._10*)* @pthread_mutex_init ; [#uses=0] - at _ZL26__gthrw_pthread_key_createPjPFvPvE1826 = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] - at _ZL26__gthrw_pthread_key_deletej1827 = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] - at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t1828 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_init ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti1829 = alias weak i32 (%struct..0._10*, i32)* @pthread_mutexattr_settype ; [#uses=0] - at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t1830 = alias weak i32 (%struct..0._10*)* @pthread_mutexattr_destroy ; [#uses=0] - -declare i32 @pthread_once(i32*, void ()*) - -declare i8* @pthread_getspecific(i32) - -declare i32 @pthread_setspecific(i32, i8*) - -declare i32 @pthread_create(i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*) - -declare i32 @pthread_cancel(i32) - -declare i32 @pthread_mutex_lock(%struct.pthread_mutex_t*) - -declare i32 @pthread_mutex_trylock(%struct.pthread_mutex_t*) - -declare i32 @pthread_mutex_unlock(%struct.pthread_mutex_t*) - -declare i32 @pthread_mutex_init(%struct.pthread_mutex_t*, %struct..0._10*) - -declare i32 @pthread_key_create(i32*, void (i8*)*) - -declare i32 @pthread_key_delete(i32) - -declare i32 @pthread_mutexattr_init(%struct..0._10*) - -declare i32 @pthread_mutexattr_settype(%struct..0._10*, i32) - -declare i32 @pthread_mutexattr_destroy(%struct..0._10*) define %"struct.kc::impl_ID"* @_ZN2kc18f_typeofunpsubtermEPNS_15impl_unpsubtermEPNS_7impl_IDE(%"struct.kc::impl_Ccode_option"* %a_unpsubterm, %"struct.kc::impl_ID"* %a_operator) { entry: From kledzik at apple.com Fri Feb 29 13:30:24 2008 From: kledzik at apple.com (Nick Kledzik) Date: Fri, 29 Feb 2008 19:30:24 -0000 Subject: [llvm-commits] [llvm] r47761 - /llvm/trunk/utils/buildit/GNUmakefile Message-ID: <200802291930.m1TJUOEr027420@zion.cs.uiuc.edu> Author: kledzik Date: Fri Feb 29 13:30:23 2008 New Revision: 47761 URL: http://llvm.org/viewvc/llvm-project?rev=47761&view=rev Log: fix default RC_ProjectSourceSubversion to be zero Modified: llvm/trunk/utils/buildit/GNUmakefile Modified: llvm/trunk/utils/buildit/GNUmakefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/buildit/GNUmakefile?rev=47761&r1=47760&r2=47761&view=diff ============================================================================== --- llvm/trunk/utils/buildit/GNUmakefile (original) +++ llvm/trunk/utils/buildit/GNUmakefile Fri Feb 29 13:30:23 2008 @@ -53,7 +53,7 @@ endif ifndef RC_ProjectSourceSubversion -RC_ProjectSourceSubversion = 01 +RC_ProjectSourceSubversion = 0 endif # NOTE : Always put version numbers at the end because they are optional. From kledzik at apple.com Fri Feb 29 13:31:29 2008 From: kledzik at apple.com (Nick Kledzik) Date: Fri, 29 Feb 2008 19:31:29 -0000 Subject: [llvm-commits] [llvm] r47762 - /llvm/trunk/tools/Makefile Message-ID: <200802291931.m1TJVTmB027452@zion.cs.uiuc.edu> Author: kledzik Date: Fri Feb 29 13:31:29 2008 New Revision: 47762 URL: http://llvm.org/viewvc/llvm-project?rev=47762&view=rev Log: stop building lto on all platforms. Start building lto2 on Darwin Modified: llvm/trunk/tools/Makefile Modified: llvm/trunk/tools/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/Makefile?rev=47762&r1=47761&r2=47762&view=diff ============================================================================== --- llvm/trunk/tools/Makefile (original) +++ llvm/trunk/tools/Makefile Fri Feb 29 13:31:29 2008 @@ -21,9 +21,12 @@ include $(LEVEL)/Makefile.config -# Disable liblto on Windows until compatability is determined. -ifneq ($(OS), MingW) -PARALLEL_DIRS += lto +# Disable liblto as it is going away +#PARALLEL_DIRS += lto + +# only build new lto project on Darwin for now +ifeq ($(OS),Darwin) +PARALLEL_DIRS += lto2 endif include $(LEVEL)/Makefile.common From kledzik at apple.com Fri Feb 29 13:32:14 2008 From: kledzik at apple.com (Nick Kledzik) Date: Fri, 29 Feb 2008 19:32:14 -0000 Subject: [llvm-commits] [llvm] r47763 - /llvm/trunk/utils/buildit/build_llvm Message-ID: <200802291932.m1TJWEQN027489@zion.cs.uiuc.edu> Author: kledzik Date: Fri Feb 29 13:32:13 2008 New Revision: 47763 URL: http://llvm.org/viewvc/llvm-project?rev=47763&view=rev Log: install new lto dylib. pass down LLVM_SUBMIT_VERSION Modified: llvm/trunk/utils/buildit/build_llvm Modified: llvm/trunk/utils/buildit/build_llvm URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/buildit/build_llvm?rev=47763&r1=47762&r2=47763&view=diff ============================================================================== --- llvm/trunk/utils/buildit/build_llvm (original) +++ llvm/trunk/utils/buildit/build_llvm Fri Feb 29 13:32:13 2008 @@ -92,6 +92,8 @@ # don't want to make the builders hit swap by firing off too many gcc's at the # same time. make $OPTIMIZE_OPTS UNIVERSAL=1 UNIVERSAL_ARCH="$TARGETS" \ + LLVM_SUBMIT_VERSION=$LLVM_SUBMIT_VERSION \ + LLVM_SUBMIT_SUBVERSION=$LLVM_SUBMIT_SUBVERSION \ CXXFLAGS="-DLLVM_VERSION_INFO='\" Apple Build #$LLVM_VERSION\"'" if ! test $? == 0 ; then @@ -164,9 +166,10 @@ fi mkdir -p $LTO_HOME/lib -mv lib/LLVMlto* $LTO_HOME/lib/. -mkdir -p $LTO_HOME/include/llvm -mv $DEST_DIR/usr/local/include/llvm/LinkTimeOptimizer.h $LTO_HOME/include/llvm/. +mv lib/libLTO.dylib $LTO_HOME/lib/libLTO.dylib +rm -f lib/libLTO.a lib/libLTO.la + + ################################################################################ # Create SYM_DIR with information required for debugging. From kledzik at apple.com Fri Feb 29 13:34:53 2008 From: kledzik at apple.com (Nick Kledzik) Date: Fri, 29 Feb 2008 19:34:53 -0000 Subject: [llvm-commits] [llvm] r47764 - /llvm/trunk/docs/LinkTimeOptimization.html Message-ID: <200802291934.m1TJYrKd027566@zion.cs.uiuc.edu> Author: kledzik Date: Fri Feb 29 13:34:52 2008 New Revision: 47764 URL: http://llvm.org/viewvc/llvm-project?rev=47764&view=rev Log: update to document new lto API Modified: llvm/trunk/docs/LinkTimeOptimization.html Modified: llvm/trunk/docs/LinkTimeOptimization.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LinkTimeOptimization.html?rev=47764&r1=47763&r2=47764&view=diff ============================================================================== --- llvm/trunk/docs/LinkTimeOptimization.html (original) +++ llvm/trunk/docs/LinkTimeOptimization.html Fri Feb 29 13:34:52 2008 @@ -21,23 +21,18 @@ -
    • LLVMlto +
    • libLTO
      • -
    • Debugging Information
      • +
    • lto_module_t
      • +
    • lto_code_gen_t
      • +
-

Written by Devang Patel

+

Written by Devang Patel and Nick Kledzik

@@ -49,9 +44,9 @@

LLVM features powerful intermodular optimizations which can be used at link -time. Link Time Optimization is another name for intermodular optimization +time. Link Time Optimization (LTO) is another name for intermodular optimization when performed during the link stage. This document describes the interface -and design between the LLVM intermodular optimizer and the linker.

+and design between the LTO optimizer and the linker.

@@ -68,8 +63,8 @@ significant changes to the developer's makefiles or build system. This is achieved through tight integration with the linker. In this model, the linker treates LLVM bitcode files like native object files and allows mixing and -matching among them. The linker uses LLVMlto, a dynamically -loaded library, to handle LLVM bitcode files. This tight integration between +matching among them. The linker uses libLTO, a shared +object, to handle LLVM bitcode files. This tight integration between the linker and LLVM optimizer helps to do optimizations that are not possible in other models. The linker input allows the optimizer to avoid relying on conservative escape analysis. @@ -136,9 +131,8 @@ $ llvm-gcc a.o main.o -o main # <-- standard link command without any modifications

In this example, the linker recognizes that foo2() is an - externally visible symbol defined in LLVM bitcode file. This information - is collected using readLLVMObjectFile(). - Based on this information, the linker completes its usual symbol resolution + externally visible symbol defined in LLVM bitcode file. The linker completes + its usual symbol resolution pass and finds that foo2() is not used anywhere. This information is used by the LLVM optimizer and it removes foo2(). As soon as foo2() is removed, the optimizer recognizes that condition @@ -183,7 +177,7 @@

- Multi-phase communication between LLVM and linker + Multi-phase communication between libLTO and linker
@@ -208,14 +202,19 @@

The linker first reads all object files in natural order and collects symbol information. This includes native object files as well as LLVM bitcode - files. In this phase, the linker uses - readLLVMObjectFile() to collect symbol - information from each LLVM bitcode files and updates its internal global - symbol table accordingly. The intent of this interface is to avoid overhead - in the non LLVM case, where all input object files are native object files, - by putting this code in the error path of the linker. When the linker sees - the first llvm .o file, it dlopen()s the dynamic library. This is - to allow changes to the LLVM LTO code without relinking the linker. + files. To minimize the cost to the linker in the case that all .o files + are native object files, the linker only calls lto_module_create() + when a supplied object file is found to not be a native object file. If + lto_module_create() returns that the file is an LLVM bitcode file, + the linker + then iterates over the module using lto_module_get_symbol_name() and + lto_module_get_symbol_attribute() to get all symbols defined and + referenced. + This information is added to the linker's global symbol table. +

+

The lto* functions are all implemented in a shared object libLTO. This + allows the LLVM LTO code to be updated independently of the linker tool. + On platforms that support it, the shared object is lazily loaded.

@@ -225,12 +224,10 @@
-

In this stage, the linker resolves symbols using global symbol table - information to report undefined symbol errors, read archive members, resolve - weak symbols, etc. The linker is able to do this seamlessly even though it - does not know the exact content of input LLVM bitcode files because it uses - symbol information provided by - readLLVMObjectFile(). If dead code +

In this stage, the linker resolves symbols using global symbol table. + It may report undefined symbol errors, read archive members, replace + weak symbols, etc. The linker is able to do this seamlessly even though it + does not know the exact content of input LLVM bitcode files. If dead code stripping is enabled then the linker collects the list of live symbols.

@@ -240,14 +237,13 @@ Phase 3 : Optimize Bitcode Files
-

After symbol resolution, the linker updates symbol information supplied - by LLVM bitcode files appropriately. For example, whether certain LLVM - bitcode supplied symbols are used or not. In the example above, the linker - reports that foo2() is not used anywhere in the program, including - native .o files. This information is used by the LLVM interprocedural - optimizer. The linker uses optimizeModules() - and requests an optimized native object file of the LLVM portion of the - program. +

After symbol resolution, the linker tells the LTO shared object which + symbols are needed by native object files. In the example above, the linker + reports that only foo1() is used by native object files using + lto_codegen_add_must_preserve_symbol(). Next the linker invokes + the LLVM optimizer and code generators using lto_codegen_compile() + which returns a native object file creating by merging the LLVM bitcode files + and applying various optimization passes.

@@ -270,108 +266,75 @@
-LLVMlto +libLTO
-

LLVMlto is a dynamic library that is part of the LLVM tools, and - is intended for use by a linker. LLVMlto provides an abstract C++ +

libLTO is a shared object that is part of the LLVM tools, and + is intended for use by a linker. libLTO provides an abstract C interface to use the LLVM interprocedural optimizer without exposing details of LLVM's internals. The intention is to keep the interface as stable as - possible even when the LLVM optimizer continues to evolve.

-
- - -
- LLVMSymbol -
- -
-

The LLVMSymbol class is used to describe the externally visible - functions and global variables, defined in LLVM bitcode files, to the linker. - This includes symbol visibility information. This information is used by - the linker to do symbol resolution. For example: function foo2() is - defined inside an LLVM bitcode module and it is an externally visible symbol. - This helps the linker connect the use of foo2() in native object - files with a future definition of the symbol foo2(). The linker - will see the actual definition of foo2() when it receives the - optimized native object file in - Symbol Resolution after optimization phase. If the - linker does not find any uses of foo2(), it updates LLVMSymbol - visibility information to notify LLVM intermodular optimizer that it is dead. - The LLVM intermodular optimizer takes advantage of such information to - generate better code.

-
- - -
- readLLVMObjectFile() -
- -
-

The readLLVMObjectFile() function is used by the linker to read - LLVM bitcode files and collect LLVMSymbol information. This routine also - supplies a list of externally defined symbols that are used by LLVM bitcode - files. The linker uses this symbol information to do symbol resolution. - Internally, LLVMlto maintains LLVM bitcode modules in - memory. This function also provides a list of external references used by - bitcode files.

+ possible even when the LLVM optimizer continues to evolve. It should even + be possible for a completely different compilation technology to provide + a different libLTO that works with their object files and the standard + linker tool.

- optimizeModules() + lto_module_t
-

The linker invokes optimizeModules to optimize already read - LLVM bitcode files by applying LLVM intermodular optimization techniques. - This function runs the LLVM intermodular optimizer and generates native - object code as .o files at the name and location provided by the - linker.

-
- - -
- getTargetTriple() -
- -
-

The linker may use getTargetTriple() to query target architecture - while validating LLVM bitcode file.

-
- - -
- removeModule() -
- -
-

Internally, LLVMlto maintains LLVM bitcode modules in - memory. The linker may use removeModule() method to remove desired - modules from memory.

+

A non-native object file is handled via an lto_module_t. + The following functions allow the linker to check if a file (on disk + or in a memory buffer) is a file which libLTO can process: 

+   lto_module_is_object_file(const char*)
+   lto_module_is_object_file_for_target(const char*, const char*)
+   lto_module_is_object_file_in_memory(const void*, size_t)
+   lto_module_is_object_file_in_memory_for_target(const void*, size_t, const char*)
+ If the object file can be processed by libLTO, the linker creates a + lto_module_t by using one of 
+   lto_module_create(const char*)
+   lto_module_create_from_memory(const void*, size_t)
+ and when done, the handle is released via
+   lto_module_dispose(lto_module_t)
+ The linker can introspect the non-native object file by getting the number + of symbols and getting the name and attributes of each symbol via: 
+   lto_module_get_num_symbols(lto_module_t)
+   lto_module_get_symbol_name(lto_module_t, unsigned int)
+   lto_module_get_symbol_attribute(lto_module_t, unsigned int)
+ The attributes of a symbol include the alignment, visibility, and kind. +

- getAlignment() + lto_code_gen_t
-

The linker may use LLVMSymbol method - getAlignment() to query symbol alignment information.

-
- - -
- Debugging Information -
- - -
- -

... To be completed ...

- +

Once the linker has loaded each non-native object files into an + lto_module_t, it can request libLTO to process them all and + generate a native object file. This is done in a couple of steps. + First a code generator is created with:

+    lto_codegen_create()
+ then each non-native object file is added to the code generator with:
+    lto_codegen_add_module(lto_code_gen_t, lto_module_t)
+ The linker then has the option of setting some codegen options. Whether + or not to generate DWARF debug info is set with: 
+    lto_codegen_set_debug_model(lto_code_gen_t)
+ Which kind of position independence is set with: 
+    lto_codegen_set_pic_model(lto_code_gen_t)
+ And each symbol that is referenced by a native object file or otherwise + must not be optimized away is set with: 
+    lto_codegen_add_must_preserve_symbol(lto_code_gen_t, const char*)
+ After all these settings are done, the linker requests that a native + object file be created from the modules with the settings using: + lto_codegen_compile(lto_code_gen_t, size*) + which returns a pointer to a buffer containing the generated native + object file. The linker then parses that and links it with the rest + of the native object files.
@@ -383,7 +346,7 @@ Valid HTML 4.01! - Devang Patel
+ Devang Patel and Nick Kledzik
LLVM Compiler Infrastructure
Last modified: $Date$ From evan.cheng at apple.com Fri Feb 29 13:36:59 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 29 Feb 2008 19:36:59 -0000 Subject: [llvm-commits] [llvm] r47765 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h lib/CodeGen/AsmPrinter.cpp lib/CodeGen/DwarfWriter.cpp Message-ID: <200802291937.m1TJb0cx027632@zion.cs.uiuc.edu> Author: evancheng Date: Fri Feb 29 13:36:59 2008 New Revision: 47765 URL: http://llvm.org/viewvc/llvm-project?rev=47765&view=rev Log: Don't fill eh frames even though these are text sections. Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h llvm/trunk/lib/CodeGen/AsmPrinter.cpp llvm/trunk/lib/CodeGen/DwarfWriter.cpp Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=47765&r1=47764&r2=47765&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Fri Feb 29 13:36:59 2008 @@ -273,7 +273,10 @@ /// an explicit alignment requested, it will unconditionally override the /// alignment request. However, if ForcedAlignBits is specified, this value /// has final say: the ultimate alignment will be the max of ForcedAlignBits - /// and the alignment computed with NumBits and the global + /// and the alignment computed with NumBits and the global. If UseFillExpr + /// is true, it also emits an optional second value FillValue which the + /// assembler uses to fill gaps to match alignment for text sections if the + /// has specified a non-zero fill value. /// /// The algorithm is: /// Align = NumBits; @@ -281,7 +284,8 @@ /// Align = std::max(Align, ForcedAlignBits); /// void EmitAlignment(unsigned NumBits, const GlobalValue *GV = 0, - unsigned ForcedAlignBits = 0) const; + unsigned ForcedAlignBits = 0, + bool UseFillExpr = true) const; /// printLabel - This method prints a local label used by debug and /// exception handling tables. Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter.cpp?rev=47765&r1=47764&r2=47765&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter.cpp Fri Feb 29 13:36:59 2008 @@ -684,7 +684,8 @@ // Align = std::max(Align, ForcedAlignBits); // void AsmPrinter::EmitAlignment(unsigned NumBits, const GlobalValue *GV, - unsigned ForcedAlignBits) const { + unsigned ForcedAlignBits, + bool UseFillExpr) const { if (GV && GV->getAlignment()) NumBits = Log2_32(GV->getAlignment()); NumBits = std::max(NumBits, ForcedAlignBits); @@ -694,7 +695,7 @@ O << TAI->getAlignDirective() << NumBits; unsigned FillValue = TAI->getTextAlignFillValue(); - bool UseFillExpr = IsInTextSection && FillValue; + UseFillExpr &= IsInTextSection && FillValue; if (UseFillExpr) O << ",0x" << std::hex << FillValue << std::dec; O << "\n"; } Modified: llvm/trunk/lib/CodeGen/DwarfWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DwarfWriter.cpp?rev=47765&r1=47764&r2=47765&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/DwarfWriter.cpp (original) +++ llvm/trunk/lib/CodeGen/DwarfWriter.cpp Fri Feb 29 13:36:59 2008 @@ -2379,7 +2379,7 @@ EmitFrameMoves(NULL, 0, Moves, false); - Asm->EmitAlignment(2); + Asm->EmitAlignment(2, 0, 0, false); EmitLabel("debug_frame_common_end", 0); Asm->EOL(); @@ -2412,7 +2412,7 @@ EmitFrameMoves("func_begin", DebugFrameInfo.Number, DebugFrameInfo.Moves, false); - Asm->EmitAlignment(2); + Asm->EmitAlignment(2, 0, 0, false); EmitLabel("debug_frame_end", DebugFrameInfo.Number); Asm->EOL(); @@ -2865,7 +2865,7 @@ RI->getInitialFrameState(Moves); EmitFrameMoves(NULL, 0, Moves, true); - Asm->EmitAlignment(2); + Asm->EmitAlignment(2, 0, 0, false); EmitLabel("eh_frame_common_end", Index); Asm->EOL(); @@ -2951,7 +2951,7 @@ // frame. EmitFrameMoves("eh_func_begin", EHFrameInfo.Number, EHFrameInfo.Moves, true); - Asm->EmitAlignment(2); + Asm->EmitAlignment(2, 0, 0, false); EmitLabel("eh_frame_end", EHFrameInfo.Number); // If the function is marked used, this table should be also. We cannot @@ -3270,7 +3270,7 @@ // Begin the exception table. Asm->SwitchToDataSection(TAI->getDwarfExceptionSection()); O << "GCC_except_table" << SubprogramCount << ":\n"; - Asm->EmitAlignment(2); + Asm->EmitAlignment(2, 0, 0, false); for (unsigned i = 0; i != SizeAlign; ++i) { Asm->EmitInt8(0); Asm->EOL("Padding"); @@ -3362,7 +3362,7 @@ Asm->EOL("Filter TypeInfo index"); } - Asm->EmitAlignment(2); + Asm->EmitAlignment(2, 0, 0, false); } public: From dag at cray.com Fri Feb 29 14:29:22 2008 From: dag at cray.com (David Greene) Date: Fri, 29 Feb 2008 14:29:22 -0600 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> Message-ID: <200802291429.22322.dag@cray.com> On Friday 29 February 2008 11:27, Roman Levenstein wrote: > Now, a new problem I have descovered: > While improving my patch, I also looked at the LatencyPriorityQueue > implementation and the RegReductionPriorityQueue implementation. Both > are using priority queues and have an extremely inefficient remove() > method, that consumes 90% of the compilation time on very big BBs. So, > I changed the data structure from the priority queue to the ordered > std::set. Obviously, the max element is basically the last element of > the set. This change produces a 3x speedup of compilation time on huge > basic blocks. But there is a problem (or a bug!): The priority queue implementation is simply broken. The heap properties are not properly maintained. I proposed a patch to fix this some time ago but it is still in limbo. It also cleans up the remove() infefficiency but trades it off for time to recompute the heap. I've found it to be close to a wash, slower on some codes and faster on others. Evan, what do I need to do to get that patch into acceptable condition? > the comparison operator > td_ls_rr_sort::operator()(const SUnit* left, const SUnit* right) (see > ScheduleDAGRRList.cpp) > seems to be implemented incorrectly (see the code below). Heh. Yep, this looks familiar. > Namely, I discovered by debugging two specific values L and R, where > L!=R, so that this operator returns FALSE (by return statement at the > very end of the method) for both pair (L,R) and (R,L). That means that > L >= R and R >=L and L!=R at the same time, which cannot be. This > incorrect comparison operator breaks all set operations based on the > ordering of elements, e.g. find() and insert(). Actually, I'm > wondering why it didn't break the priority queue operations before. Configure with --enable-expensive-checks and you'll probably get an assert. > The same operator for bu_ls_rr_sort has a very long disclaimer > related to a similar issue: > // There used to be a special tie breaker here that looked for > // two-address instructions and preferred the instruction with a > // def&use operand. The special case triggered diagnostics when > // _GLIBCXX_DEBUG was enabled because it broke the strict weak > // ordering that priority_queue requires. It didn't help much anyway > // because AddPseudoTwoAddrDeps already covers many of the cases > // where it would have applied. In addition, it's counter-intuitive > // that a tie breaker would be the first thing attempted. There's a > // "real" tie breaker below that is the operation of last resort. > // The fact that the "special tie breaker" would trigger when there > // wasn't otherwise a tie is what broke the strict weak ordering > // constraint. Yep, I believe Dan Gohman fixed this one. > So, there seems to be a problem. But I don't have a solution for it. I > need you help to understand how to fix it. It's possible the compare bug was not caught earlier because std::poriority_queue doesn't check it with _GLIBCXX_DEBUG turned on. I don't know that for a fact, though. I would think that eliminating the special tie breaker might be a solution, similarly to what was done in bu_ls_rr_sort. I don't think this change will fix the issues with the priority queue because it's a problem with how the scheduling algorithm works. The algorithm updates priorities but doesn't call make_heap to re-sort the nodes. That call has to happen whenever priorities are updated. My patch fixes that problem. So I think we need both fixes. -Dave From evan.cheng at apple.com Fri Feb 29 15:00:38 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 29 Feb 2008 13:00:38 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <200802291429.22322.dag@cray.com> References: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> <200802291429.22322.dag@cray.com> Message-ID: On Feb 29, 2008, at 12:29 PM, David Greene wrote: > On Friday 29 February 2008 11:27, Roman Levenstein wrote: > >> Now, a new problem I have descovered: >> While improving my patch, I also looked at the LatencyPriorityQueue >> implementation and the RegReductionPriorityQueue implementation. >> Both >> are using priority queues and have an extremely inefficient remove() >> method, that consumes 90% of the compilation time on very big BBs. >> So, >> I changed the data structure from the priority queue to the ordered >> std::set. Obviously, the max element is basically the last element of >> the set. This change produces a 3x speedup of compilation time on >> huge >> basic blocks. But there is a problem (or a bug!): > > The priority queue implementation is simply broken. The heap > properties > are not properly maintained. I proposed a patch to fix this some > time ago > but it is still in limbo. It also cleans up the remove() > infefficiency but > trades it off for time to recompute the heap. I've found it to be > close to a > wash, slower on some codes and faster on others. > > Evan, what do I need to do to get that patch into acceptable > condition? Please resubmit it again. I'll evaluate the compile time penalty today. > > >> the comparison operator >> td_ls_rr_sort::operator()(const SUnit* left, const SUnit* right) (see >> ScheduleDAGRRList.cpp) >> seems to be implemented incorrectly (see the code below). > > Heh. Yep, this looks familiar. > >> Namely, I discovered by debugging two specific values L and R, where >> L!=R, so that this operator returns FALSE (by return statement at the >> very end of the method) for both pair (L,R) and (R,L). That means >> that >> L >= R and R >=L and L!=R at the same time, which cannot be. This >> incorrect comparison operator breaks all set operations based on the >> ordering of elements, e.g. find() and insert(). Actually, I'm >> wondering why it didn't break the priority queue operations before. > > Configure with --enable-expensive-checks and you'll probably get an > assert. > >> The same operator for bu_ls_rr_sort has a very long disclaimer >> related to a similar issue: >> // There used to be a special tie breaker here that looked for >> // two-address instructions and preferred the instruction with a >> // def&use operand. The special case triggered diagnostics when >> // _GLIBCXX_DEBUG was enabled because it broke the strict weak >> // ordering that priority_queue requires. It didn't help much anyway >> // because AddPseudoTwoAddrDeps already covers many of the cases >> // where it would have applied. In addition, it's counter-intuitive >> // that a tie breaker would be the first thing attempted. There's a >> // "real" tie breaker below that is the operation of last resort. >> // The fact that the "special tie breaker" would trigger when there >> // wasn't otherwise a tie is what broke the strict weak ordering >> // constraint. > > Yep, I believe Dan Gohman fixed this one. > >> So, there seems to be a problem. But I don't have a solution for >> it. I >> need you help to understand how to fix it. > > It's possible the compare bug was not caught earlier because > std::poriority_queue doesn't check it with _GLIBCXX_DEBUG turned > on. I don't know that for a fact, though. > > I would think that eliminating the special tie breaker might be a > solution, > similarly to what was done in bu_ls_rr_sort. There is something I am not grasping. I would think the problem can still occur even if the special tie breaker is removed. Take any two nodes A, B, suppose all of the conditions evaluates to false the function will returns false regardless if it's comparing A <= B or B <= A, right? I would think the right is just to change the default from return false; to return left->NodeNum < right->NodeNum; This forces a strict ordering between two nodes, no? Evan > > > I don't think this change will fix the issues with the priority > queue because > it's a problem with how the scheduling algorithm works. The > algorithm updates > priorities but doesn't call make_heap to re-sort the nodes. That > call has to > happen whenever priorities are updated. My patch fixes that problem. > > So I think we need both fixes. > > -Dave > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Fri Feb 29 15:14:43 2008 From: isanbard at gmail.com (Bill Wendling) Date: Fri, 29 Feb 2008 13:14:43 -0800 Subject: [llvm-commits] [llvm] r47761 - /llvm/trunk/utils/buildit/GNUmakefile In-Reply-To: <200802291930.m1TJUOEr027420@zion.cs.uiuc.edu> References: <200802291930.m1TJUOEr027420@zion.cs.uiuc.edu> Message-ID: <16e5fdf90802291314u70699267s306c514e56014d37@mail.gmail.com> Hi Nick, > --- llvm/trunk/utils/buildit/GNUmakefile (original) > +++ llvm/trunk/utils/buildit/GNUmakefile Fri Feb 29 13:30:23 2008 > @@ -53,7 +53,7 @@ > endif > > ifndef RC_ProjectSourceSubversion > -RC_ProjectSourceSubversion = 01 > +RC_ProjectSourceSubversion = 0 > endif > Is this necessary? Doesn't this get set to "00" automatically in B&I? And, if not, could you make it 00 instead of 0? -bw From clattner at apple.com Fri Feb 29 15:22:51 2008 From: clattner at apple.com (Chris Lattner) Date: Fri, 29 Feb 2008 13:22:51 -0800 Subject: [llvm-commits] [llvm] r47758 - in /llvm/trunk: lib/CodeGen/RegAllocLocal.cpp test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll In-Reply-To: <16e5fdf90802291119u267b1d3bw499c0ea3cc0e9a43@mail.gmail.com> References: <200802291852.m1TIq2Km026370@zion.cs.uiuc.edu> <1204312538.20469.248.camel@asl.dorms.spbu.ru> <16e5fdf90802291119u267b1d3bw499c0ea3cc0e9a43@mail.gmail.com> Message-ID: On Feb 29, 2008, at 11:19 AM, Bill Wendling wrote: > On Fri, Feb 29, 2008 at 11:15 AM, Anton Korobeynikov > wrote: >> Hello, Bill >> >> >>> + at _ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void >>> ()*)* @pthread_once ; [#uses=0] >>> + at _ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* >>> @pthread_getspecific ; [#uses=0] >> What's about DCE'ing this testcase little bit? :) >> > Hi Anton, > > This is the output from bugpoint. ;-) We should probably modify > bugpoint to do this for us. Anyway, sure. I'll give it a shot. If it is a single function, llvm-extract is good at doing this, just use llvm-extract -func whatever foo.bc -chris From dag at cray.com Fri Feb 29 15:33:39 2008 From: dag at cray.com (David Greene) Date: Fri, 29 Feb 2008 15:33:39 -0600 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <200802291429.22322.dag@cray.com> Message-ID: <200802291533.40155.dag@cray.com> On Friday 29 February 2008 15:00, Evan Cheng wrote: > Please resubmit it again. I'll evaluate the compile time penalty today. Ok, thanks. > There is something I am not grasping. I would think the problem can > still occur even if the special tie breaker is removed. Take any two > nodes A, B, suppose all of the conditions evaluates to false the > function will returns false regardless if it's comparing A <= B or B > <= A, right? I would think the right is just to change the default from > return false; > to > return left->NodeNum < right->NodeNum; > > This forces a strict ordering between two nodes, no? Yes, I think that's right. I glossed over that bit of code. -Dave From isanbard at gmail.com Fri Feb 29 15:34:57 2008 From: isanbard at gmail.com (Bill Wendling) Date: Fri, 29 Feb 2008 13:34:57 -0800 Subject: [llvm-commits] [llvm] r47758 - in /llvm/trunk: lib/CodeGen/RegAllocLocal.cpp test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll In-Reply-To: References: <200802291852.m1TIq2Km026370@zion.cs.uiuc.edu> <1204312538.20469.248.camel@asl.dorms.spbu.ru> <16e5fdf90802291119u267b1d3bw499c0ea3cc0e9a43@mail.gmail.com> Message-ID: <16e5fdf90802291334p7d948a2va3111aafa6b5c9ed@mail.gmail.com> On Fri, Feb 29, 2008 at 1:22 PM, Chris Lattner wrote: > > On Feb 29, 2008, at 11:19 AM, Bill Wendling wrote: > > > On Fri, Feb 29, 2008 at 11:15 AM, Anton Korobeynikov > > wrote: > >> Hello, Bill > >> > >> > >>> + at _ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void > >>> ()*)* @pthread_once ; [#uses=0] > >>> + at _ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* > >>> @pthread_getspecific ; [#uses=0] > >> What's about DCE'ing this testcase little bit? :) > >> > > Hi Anton, > > > > > This is the output from bugpoint. ;-) We should probably modify > > bugpoint to do this for us. Anyway, sure. I'll give it a shot. > > If it is a single function, llvm-extract is good at doing this, just > use llvm-extract -func whatever foo.bc > Good point. Anton also suggested running opt with -dce, -strip-dead-prototypes, -deadtypeelim, etc. -bw From romix.llvm at googlemail.com Fri Feb 29 15:44:17 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Sat, 1 Mar 2008 00:44:17 +0300 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> <200802291429.22322.dag@cray.com> Message-ID: Hi David, Hi Evan, 2008/3/1, Evan Cheng : > > On Feb 29, 2008, at 12:29 PM, David Greene wrote: > > > On Friday 29 February 2008 11:27, Roman Levenstein wrote: > > > >> Now, a new problem I have descovered: > >> While improving my patch, I also looked at the LatencyPriorityQueue > >> implementation and the RegReductionPriorityQueue implementation. > >> Both > >> are using priority queues and have an extremely inefficient remove() > >> method, that consumes 90% of the compilation time on very big BBs. > >> So, > >> I changed the data structure from the priority queue to the ordered > >> std::set. Obviously, the max element is basically the last element of > >> the set. This change produces a 3x speedup of compilation time on > >> huge > >> basic blocks. But there is a problem (or a bug!): > > > > The priority queue implementation is simply broken. The heap > > properties > > are not properly maintained. I proposed a patch to fix this some > > time ago > > but it is still in limbo. It also cleans up the remove() > > infefficiency but > > trades it off for time to recompute the heap. I've found it to be > > close to a > > wash, slower on some codes and faster on others. > > > > Evan, what do I need to do to get that patch into acceptable > > condition? > > > Please resubmit it again. I'll evaluate the compile time penalty today. David, I guess you mean this patch? http://www.nabble.com/RFC:-GLIBCXX_DEBUG-ScheduleDAG-Patch-td14382214.html Looking at it, I'd assume it is not extremely efficient since you still use the priority queue and rebuild it, when you remove elements. I'm pretty much sure that using std::set or any other efficient sorted set implementation (binary tree,etc) would perform better, if we need to delete elements from the middle of the heap and update priorities (which can be done by means of remove,change,insert). My preliminary tests done using std::set instead of priority queues for td-sched indicate a 3x performance boost. > > > > > >> the comparison operator > >> td_ls_rr_sort::operator()(const SUnit* left, const SUnit* right) (see > >> ScheduleDAGRRList.cpp) > >> seems to be implemented incorrectly (see the code below). > > > > Heh. Yep, this looks familiar. Good that you confirm it. > >> Namely, I discovered by debugging two specific values L and R, where > >> L!=R, so that this operator returns FALSE (by return statement at the > >> very end of the method) for both pair (L,R) and (R,L). That means > >> that > >> L >= R and R >=L and L!=R at the same time, which cannot be. This > >> incorrect comparison operator breaks all set operations based on the > >> ordering of elements, e.g. find() and insert(). Actually, I'm > >> wondering why it didn't break the priority queue operations before. > > > > Configure with --enable-expensive-checks and you'll probably get an > > assert. > > >> The same operator for bu_ls_rr_sort has a very long disclaimer > >> related to a similar issue: > >> // There used to be a special tie breaker here that looked for > >> // two-address instructions and preferred the instruction with a > >> // def&use operand. The special case triggered diagnostics when > >> // _GLIBCXX_DEBUG was enabled because it broke the strict weak > >> // ordering that priority_queue requires. It didn't help much anyway > >> // because AddPseudoTwoAddrDeps already covers many of the cases > >> // where it would have applied. In addition, it's counter-intuitive > >> // that a tie breaker would be the first thing attempted. There's a > >> // "real" tie breaker below that is the operation of last resort. > >> // The fact that the "special tie breaker" would trigger when there > >> // wasn't otherwise a tie is what broke the strict weak ordering > >> // constraint. > > > > Yep, I believe Dan Gohman fixed this one. > > > >> So, there seems to be a problem. But I don't have a solution for > >> it. I need you help to understand how to fix it. > > > > It's possible the compare bug was not caught earlier because > > std::poriority_queue doesn't check it with _GLIBCXX_DEBUG turned > > on. I don't know that for a fact, though. Could be. > > I would think that eliminating the special tie breaker might be a > > solution, > > similarly to what was done in bu_ls_rr_sort. > > > There is something I am not grasping. I would think the problem can > still occur even if the special tie breaker is removed. Take any two > nodes A, B, suppose all of the conditions evaluates to false the > function will returns false regardless if it's comparing A <= B or B > <= A, right? I would think the right is just to change the default from > return false; > to > return left->NodeNum < right->NodeNum; > > This forces a strict ordering between two nodes, no? Agreed, this should introduce a strict ordering and fix the problem. So, we need your fix to update the priorities, but I don't think that your data-structures are efficient. So, I'd like to ask you to wait until Monday, until I test my patch including your priority update changes. This would avoid any commit conflicts. Based on the performance test, we'll decide which approach should be committet. Is it OK with you? I'd be glad to submit the patch immediately, but I forgot my development machine in the office ;-( Regards, Roman From asl at math.spbu.ru Fri Feb 29 16:09:09 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Fri, 29 Feb 2008 22:09:09 -0000 Subject: [llvm-commits] [llvm] r47770 - in /llvm/trunk: include/llvm/Target/TargetAsmInfo.h lib/Target/PowerPC/PPCTargetAsmInfo.cpp lib/Target/PowerPC/PPCTargetAsmInfo.h lib/Target/TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.h Message-ID: <200802292209.m1TM99JY032199@zion.cs.uiuc.edu> Author: asl Date: Fri Feb 29 16:09:08 2008 New Revision: 47770 URL: http://llvm.org/viewvc/llvm-project?rev=47770&view=rev Log: Use enumeration for preffered EH dwarf encoding reason Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.h llvm/trunk/lib/Target/TargetAsmInfo.cpp llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=47770&r1=47769&r2=47770&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Fri Feb 29 16:09:08 2008 @@ -20,6 +20,15 @@ #include "llvm/Support/DataTypes.h" namespace llvm { + // DWARF encoding query type + namespace DwarfEncoding { + enum Target { + Data = 0, + CodeLabels = 1, + Functions = 2 + }; + } + class TargetMachine; class CallInst; @@ -401,7 +410,8 @@ /// format used for encoding pointers in exception handling data. Reason is /// 0 for data, 1 for code labels, 2 for function pointers. Global is true /// if the symbol can be relocated. - virtual unsigned PreferredEHDataFormat(unsigned Reason, bool Global) const; + virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason, + bool Global) const; // Accessors. // Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp?rev=47770&r1=47769&r2=47770&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.cpp Fri Feb 29 16:09:08 2008 @@ -92,11 +92,11 @@ /// format used for encoding pointers in exception handling data. Reason is /// 0 for data, 1 for code labels, 2 for function pointers. Global is true /// if the symbol can be relocated. -unsigned DarwinTargetAsmInfo::PreferredEHDataFormat(unsigned Reason, +unsigned DarwinTargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason, bool Global) const { - if (Reason == 2 && Global) + if (Reason == DwarfEncoding::Functions && Global) return (DW_EH_PE_pcrel | DW_EH_PE_indirect | DW_EH_PE_sdata4); - else if (Reason == 1 || !Global) + else if (Reason == DwarfEncoding::CodeLabels || !Global) return DW_EH_PE_pcrel; else return DW_EH_PE_absptr; @@ -154,7 +154,7 @@ /// format used for encoding pointers in exception handling data. Reason is /// 0 for data, 1 for code labels, 2 for function pointers. Global is true /// if the symbol can be relocated. -unsigned LinuxTargetAsmInfo::PreferredEHDataFormat(unsigned Reason, +unsigned LinuxTargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason, bool Global) const { // We really need to write something here. return TargetAsmInfo::PreferredEHDataFormat(Reason, Global); Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.h?rev=47770&r1=47769&r2=47770&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCTargetAsmInfo.h Fri Feb 29 16:09:08 2008 @@ -27,12 +27,14 @@ struct DarwinTargetAsmInfo : public PPCTargetAsmInfo { explicit DarwinTargetAsmInfo(const PPCTargetMachine &TM); - virtual unsigned PreferredEHDataFormat(unsigned Reason, bool Global) const; + virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason, + bool Global) const; }; struct LinuxTargetAsmInfo : public PPCTargetAsmInfo { explicit LinuxTargetAsmInfo(const PPCTargetMachine &TM); - virtual unsigned PreferredEHDataFormat(unsigned Reason, bool Global) const; + virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason, + bool Global) const; }; } // namespace llvm Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=47770&r1=47769&r2=47770&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Fri Feb 29 16:09:08 2008 @@ -136,7 +136,7 @@ return Length; } -unsigned TargetAsmInfo::PreferredEHDataFormat(unsigned Reason, +unsigned TargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason, bool Global) const { return dwarf::DW_EH_PE_absptr; } Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=47770&r1=47769&r2=47770&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Fri Feb 29 16:09:08 2008 @@ -313,15 +313,15 @@ /// format used for encoding pointers in exception handling data. Reason is /// 0 for data, 1 for code labels, 2 for function pointers. Global is true /// if the symbol can be relocated. -unsigned X86TargetAsmInfo::PreferredEHDataFormat(unsigned Reason, +unsigned X86TargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason, bool Global) const { const X86Subtarget *Subtarget = &X86TM->getSubtarget(); switch (Subtarget->TargetType) { case X86Subtarget::isDarwin: - if (Reason == 2 && Global) + if (Reason == DwarfEncoding::Functions && Global) return (DW_EH_PE_pcrel | DW_EH_PE_indirect | DW_EH_PE_sdata4); - else if (Reason == 1 || !Global) + else if (Reason == DwarfEncoding::CodeLabels || !Global) return DW_EH_PE_pcrel; else return DW_EH_PE_absptr; @@ -343,7 +343,8 @@ // - code model is medium and we're emitting externally visible symbols or // any code symbols if (CM == CodeModel::Small || - (CM == CodeModel::Medium && (Global || Reason))) + (CM == CodeModel::Medium && (Global || + Reason != DwarfEncoding::Data))) Format = DW_EH_PE_sdata4; else Format = DW_EH_PE_sdata8; @@ -356,7 +357,7 @@ } else { if (Subtarget->is64Bit() && (CM == CodeModel::Small || - (CM == CodeModel::Medium && Reason))) + (CM == CodeModel::Medium && Reason != DwarfEncoding::Data))) return DW_EH_PE_udata4; else return DW_EH_PE_absptr; Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=47770&r1=47769&r2=47770&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original) +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Fri Feb 29 16:09:08 2008 @@ -25,7 +25,8 @@ explicit X86TargetAsmInfo(const X86TargetMachine &TM); virtual bool ExpandInlineAsm(CallInst *CI) const; - virtual unsigned PreferredEHDataFormat(unsigned Reason, bool Global) const; + virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason, + bool Global) const; private: const X86TargetMachine* X86TM; From criswell at uiuc.edu Fri Feb 29 16:55:38 2008 From: criswell at uiuc.edu (John Criswell) Date: Fri, 29 Feb 2008 22:55:38 -0000 Subject: [llvm-commits] [poolalloc] r47772 - in /poolalloc/trunk/tools: ./ Makefile Pa/ Pa/Makefile Pa/pa.cpp Message-ID: <200802292255.m1TMtcFH001308@zion.cs.uiuc.edu> Author: criswell Date: Fri Feb 29 16:55:37 2008 New Revision: 47772 URL: http://llvm.org/viewvc/llvm-project?rev=47772&view=rev Log: Adding the pa tool for Automatically Pool Allocating programs. Added: poolalloc/trunk/tools/ poolalloc/trunk/tools/Makefile poolalloc/trunk/tools/Pa/ poolalloc/trunk/tools/Pa/Makefile poolalloc/trunk/tools/Pa/pa.cpp Added: poolalloc/trunk/tools/Makefile URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/tools/Makefile?rev=47772&view=auto ============================================================================== --- poolalloc/trunk/tools/Makefile (added) +++ poolalloc/trunk/tools/Makefile Fri Feb 29 16:55:37 2008 @@ -0,0 +1,11 @@ +# +# Relative path to the top of the source tree. +# +LEVEL=.. + +# +# List all of the subdirectories that we will compile. +# +PARALLEL_DIRS=Pa + +include $(LEVEL)/Makefile.common Added: poolalloc/trunk/tools/Pa/Makefile URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/tools/Pa/Makefile?rev=47772&view=auto ============================================================================== --- poolalloc/trunk/tools/Pa/Makefile (added) +++ poolalloc/trunk/tools/Pa/Makefile Fri Feb 29 16:55:37 2008 @@ -0,0 +1,24 @@ +#===- tools/pa/Makefile ------------------------------------*- Makefile -*-===## +# +# Automatic Pool Allocation Project +# +# This file was developed by the LLVM research group and is distributed under +# the University of Illinois Open Source License. See LICENSE.TXT for details. +# +##===----------------------------------------------------------------------===## + +LEVEL = ../.. +TOOLNAME=pa + +# Initialize the USEDLIBS so we can add to it + +LINK_COMPONENTS := bitreader bitwriter instrumentation scalaropts ipo + +USEDLIBS := poolalloc LLVMDataStructure + +# Include this here so we can get the configuration of the targets +# that have been configured for construction. We have to do this +# early so we can set up USEDLIBS properly before includeing Makefile.rules +include $(LEVEL)/Makefile.common + + Added: poolalloc/trunk/tools/Pa/pa.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/tools/Pa/pa.cpp?rev=47772&view=auto ============================================================================== --- poolalloc/trunk/tools/Pa/pa.cpp (added) +++ poolalloc/trunk/tools/Pa/pa.cpp Fri Feb 29 16:55:37 2008 @@ -0,0 +1,167 @@ +//===-- pa - Automatic Pool Allocation Compiler Tool --------------------===// +// +// Automatic Pool Allocation Project +// +// This file was developed by the LLVM research group and is distributed +// under the University of Illinois Open Source License. See LICENSE.TXT for +// details. +// +//===--------------------------------------------------------------------===// +// +// This program is a tool to run the Automatic Pool Allocation passes on a +// bytecode input file. +// +//===--------------------------------------------------------------------===// + +#include "llvm/Module.h" +#include "llvm/Bitcode/ReaderWriter.h" +#include "llvm/PassManager.h" +#include "llvm/Pass.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/Support/PluginLoader.h" +#include "llvm/Support/FileUtilities.h" +#include "llvm/Target/TargetData.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Analysis/Verifier.h" +#include "llvm/System/Signals.h" +#include "llvm/Config/config.h" + +#include "poolalloc/PoolAllocate.h" + +#include +#include +#include + +using namespace llvm; + +// General options for sc. +static cl::opt +InputFilename(cl::Positional, cl::desc(""), cl::init("-")); + +static cl::opt +OutputFilename("o", cl::desc("Output filename"), cl::value_desc("filename")); + +static cl::opt Force("f", cl::desc("Overwrite output files")); + +// GetFileNameRoot - Helper function to get the basename of a filename. +static inline std::string +GetFileNameRoot(const std::string &InputFilename) { + std::string IFN = InputFilename; + std::string outputFilename; + int Len = IFN.length(); + if ((Len > 2) && + IFN[Len-3] == '.' && IFN[Len-2] == 'b' && IFN[Len-1] == 'c') { + outputFilename = std::string(IFN.begin(), IFN.end()-3); // s/.bc/.s/ + } else { + outputFilename = IFN; + } + return outputFilename; +} + + +// main - Entry point for the sc compiler. +// +int main(int argc, char **argv) { + std::string mt; + std::string & msg = mt; + try { + cl::ParseCommandLineOptions(argc, argv, " llvm system compiler\n"); + sys::PrintStackTraceOnErrorSignal(); + + // Load the module to be compiled... + std::auto_ptr M; + std::string ErrorMessage; + if (MemoryBuffer *Buffer + = MemoryBuffer::getFileOrSTDIN(InputFilename, &ErrorMessage)) { + M.reset(ParseBitcodeFile(Buffer, &ErrorMessage)); + delete Buffer; + } + + if (M.get() == 0) { + std::cerr << argv[0] << ": bytecode didn't read correctly.\n"; + return 1; + } + Module &mod = *M.get(); + + // Build up all of the passes that we want to do to the module... + PassManager Passes; + + Passes.add(new TargetData(M.get())); + + // Currently deactiviated + Passes.add(new PoolAllocate()); + + // Verify the final result + Passes.add(createVerifierPass()); + + // Figure out where we are going to send the output... + std::ostream *Out = 0; + if (OutputFilename != "") { + if (OutputFilename != "-") { + // Specified an output filename? + if (!Force && std::ifstream(OutputFilename.c_str())) { + // If force is not specified, make sure not to overwrite a file! + std::cerr << argv[0] << ": error opening '" << OutputFilename + << "': file exists!\n" + << "Use -f command line argument to force output\n"; + return 1; + } + Out = new std::ofstream(OutputFilename.c_str()); + + // Make sure that the Out file gets unlinked from the disk if we get a + // SIGINT + sys::RemoveFileOnSignal(sys::Path(OutputFilename)); + } else { + Out = &std::cout; + } + } else { + if (InputFilename == "-") { + OutputFilename = "-"; + Out = &std::cout; + } else { + OutputFilename = GetFileNameRoot(InputFilename); + + OutputFilename += ".abc.bc"; + } + + if (!Force && std::ifstream(OutputFilename.c_str())) { + // If force is not specified, make sure not to overwrite a file! + std::cerr << argv[0] << ": error opening '" << OutputFilename + << "': file exists!\n" + << "Use -f command line argument to force output\n"; + return 1; + } + + Out = new std::ofstream(OutputFilename.c_str()); + if (!Out->good()) { + std::cerr << argv[0] << ": error opening " << OutputFilename << "!\n"; + delete Out; + return 1; + } + + // Make sure that the Out file gets unlinked from the disk if we get a + // SIGINT + sys::RemoveFileOnSignal(sys::Path(OutputFilename)); + } + + // Add the writing of the output file to the list of passes + Passes.add (CreateBitcodeWriterPass(*Out)); + + // Run our queue of passes all at once now, efficiently. + Passes.run(*M.get()); + + + + // Delete the ostream if it's not a stdout stream + if (Out != &std::cout) delete Out; + + return 0; + } catch (msg) { + std::cerr << argv[0] << ": " << msg << "\n"; + } catch (...) { + std::cerr << argv[0] << ": Unexpected unknown exception occurred.\n"; + } + return 1; +} + From clattner at apple.com Fri Feb 29 17:00:26 2008 From: clattner at apple.com (Chris Lattner) Date: Fri, 29 Feb 2008 15:00:26 -0800 Subject: [llvm-commits] [llvm] r47758 - in /llvm/trunk: lib/CodeGen/RegAllocLocal.cpp test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll In-Reply-To: <16e5fdf90802291334p7d948a2va3111aafa6b5c9ed@mail.gmail.com> References: <200802291852.m1TIq2Km026370@zion.cs.uiuc.edu> <1204312538.20469.248.camel@asl.dorms.spbu.ru> <16e5fdf90802291119u267b1d3bw499c0ea3cc0e9a43@mail.gmail.com> <16e5fdf90802291334p7d948a2va3111aafa6b5c9ed@mail.gmail.com> Message-ID: <4F6B314A-F1C6-4DA4-B774-B18B663E20EC@apple.com> On Feb 29, 2008, at 1:34 PM, Bill Wendling wrote: > On Fri, Feb 29, 2008 at 1:22 PM, Chris Lattner > wrote: >> >> On Feb 29, 2008, at 11:19 AM, Bill Wendling wrote: >> >>> On Fri, Feb 29, 2008 at 11:15 AM, Anton Korobeynikov >>> wrote: >>>> Hello, Bill >>>> >>>> >>>>> + at _ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void >>>>> ()*)* @pthread_once ; [#uses=0] >>>>> + at _ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* >>>>> @pthread_getspecific ; [#uses=0] >>>> What's about DCE'ing this testcase little bit? :) >>>> >>> Hi Anton, >> >>> >>> This is the output from bugpoint. ;-) We should probably modify >>> bugpoint to do this for us. Anyway, sure. I'll give it a shot. >> >> If it is a single function, llvm-extract is good at doing this, just >> use llvm-extract -func whatever foo.bc >> > Good point. Anton also suggested running opt with -dce, > -strip-dead-prototypes, -deadtypeelim, etc. llvmextract runs strip-dead-prototypes, -deadtypeelim. Usually dce is bad because it removes instructions that are important to the failure. Did you verify that you didn't break the testcase by cleaning it up? -chris From alenhar2 at cs.uiuc.edu Fri Feb 29 17:02:49 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Fri, 29 Feb 2008 23:02:49 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47773 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200802292302.m1TN2nOR001514@zion.cs.uiuc.edu> Author: alenhar2 Date: Fri Feb 29 17:02:49 2008 New Revision: 47773 URL: http://llvm.org/viewvc/llvm-project?rev=47773&view=rev Log: support for atomic intrinsics, once backends have them. Turning on this hunk of code breaks the build on backends that haven't implemented the intrinsics. (I am working on x86 right now, alpha is done) Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47773&r1=47772&r2=47773&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Fri Feb 29 17:02:49 2008 @@ -4294,6 +4294,77 @@ C, C + 5); return true; } +#if 0 //FIXME: these break the build for backends that haven't implemented them + //gcc uses many names for the sync intrinsics + case BUILT_IN_VAL_COMPARE_AND_SWAP_1: + case BUILT_IN_VAL_COMPARE_AND_SWAP_2: + case BUILT_IN_VAL_COMPARE_AND_SWAP_4: + case BUILT_IN_VAL_COMPARE_AND_SWAP_8: + case BUILT_IN_VAL_COMPARE_AND_SWAP_16: { + const Type *Ty = ConvertType(TREE_TYPE(exp)); + tree arglist = TREE_OPERAND(exp, 1); + Value* C[3] = { + Emit(TREE_VALUE(arglist), 0), + Emit(TREE_VALUE(TREE_CHAIN(arglist)), 0), + Emit(TREE_VALUE(TREE_CHAIN(TREE_CHAIN(arglist))), 0) + }; + if (C[1]->getType() != Ty) + C[1] = Builder.CreateIntCast(C[1], Ty, "cast"); + if (C[2]->getType() != Ty) + C[2] = Builder.CreateIntCast(C[2], Ty, "cast"); + + Result = + Builder.CreateCall(Intrinsic::getDeclaration(TheModule, + Intrinsic::atomic_lcs, + &Ty, 1), + C, C + 3); + + return true; + } + case BUILT_IN_FETCH_AND_ADD_1: + case BUILT_IN_FETCH_AND_ADD_2: + case BUILT_IN_FETCH_AND_ADD_4: + case BUILT_IN_FETCH_AND_ADD_8: + case BUILT_IN_FETCH_AND_ADD_16: { + const Type *Ty = ConvertType(TREE_TYPE(exp)); + tree arglist = TREE_OPERAND(exp, 1); + Value* C[2] = { + Emit(TREE_VALUE(arglist), 0), + Emit(TREE_VALUE(TREE_CHAIN(arglist)), 0) + }; + if (C[1]->getType() != Ty) + C[1] = Builder.CreateIntCast(C[1], Ty, "cast"); + Result = + Builder.CreateCall(Intrinsic::getDeclaration(TheModule, + Intrinsic::atomic_las, + &Ty, 1), + C, C + 2); + + return true; + } + case BUILT_IN_LOCK_TEST_AND_SET_1: + case BUILT_IN_LOCK_TEST_AND_SET_2: + case BUILT_IN_LOCK_TEST_AND_SET_4: + case BUILT_IN_LOCK_TEST_AND_SET_8: + case BUILT_IN_LOCK_TEST_AND_SET_16: { + const Type *Ty = ConvertType(TREE_TYPE(exp)); + tree arglist = TREE_OPERAND(exp, 1); + Value* C[2] = { + Emit(TREE_VALUE(arglist), 0), + Emit(TREE_VALUE(TREE_CHAIN(arglist)), 0) + }; + if (C[1]->getType() != Ty) + C[1] = Builder.CreateIntCast(C[1], Ty, "cast"); + Result = + Builder.CreateCall(Intrinsic::getDeclaration(TheModule, + Intrinsic::atomic_swap, + &Ty, 1), + C, C + 2); + + return true; + } +#endif //FIXME: these break the build for backends that haven't implemented them + #if 1 // FIXME: Should handle these GCC extensions eventually. case BUILT_IN_APPLY_ARGS: From isanbard at gmail.com Fri Feb 29 17:16:01 2008 From: isanbard at gmail.com (Bill Wendling) Date: Fri, 29 Feb 2008 15:16:01 -0800 Subject: [llvm-commits] [llvm] r47758 - in /llvm/trunk: lib/CodeGen/RegAllocLocal.cpp test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll In-Reply-To: <4F6B314A-F1C6-4DA4-B774-B18B663E20EC@apple.com> References: <200802291852.m1TIq2Km026370@zion.cs.uiuc.edu> <1204312538.20469.248.camel@asl.dorms.spbu.ru> <16e5fdf90802291119u267b1d3bw499c0ea3cc0e9a43@mail.gmail.com> <16e5fdf90802291334p7d948a2va3111aafa6b5c9ed@mail.gmail.com> <4F6B314A-F1C6-4DA4-B774-B18B663E20EC@apple.com> Message-ID: <16e5fdf90802291516x5ab48773u642d80c1c252f87@mail.gmail.com> On Fri, Feb 29, 2008 at 3:00 PM, Chris Lattner wrote: > > On Feb 29, 2008, at 1:34 PM, Bill Wendling wrote: > > > On Fri, Feb 29, 2008 at 1:22 PM, Chris Lattner > > wrote: > >> > >> On Feb 29, 2008, at 11:19 AM, Bill Wendling wrote: > >> > >>> On Fri, Feb 29, 2008 at 11:15 AM, Anton Korobeynikov > >>> wrote: > >>>> Hello, Bill > >>>> > >>>> > >>>>> + at _ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void > >>>>> ()*)* @pthread_once ; [#uses=0] > >>>>> + at _ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* > >>>>> @pthread_getspecific ; [#uses=0] > >>>> What's about DCE'ing this testcase little bit? :) > >>>> > >>> Hi Anton, > >> > >>> > >>> This is the output from bugpoint. ;-) We should probably modify > >>> bugpoint to do this for us. Anyway, sure. I'll give it a shot. > >> > >> If it is a single function, llvm-extract is good at doing this, just > >> use llvm-extract -func whatever foo.bc > >> > > Good point. Anton also suggested running opt with -dce, > > -strip-dead-prototypes, -deadtypeelim, etc. > > llvmextract runs strip-dead-prototypes, -deadtypeelim. > > Usually dce is bad because it removes instructions that are important > to the failure. Did you verify that you didn't break the testcase by > cleaning it up? > Actually, I cleaned it up by hand. But, yes, it still crashed without the fix. -bw From lattner at cs.uiuc.edu Fri Feb 29 17:32:56 2008 From: lattner at cs.uiuc.edu (Chris Lattner) Date: Fri, 29 Feb 2008 17:32:56 -0600 Subject: [llvm-commits] CVS: llvm-www/ProjectsWithLLVM/index.html Message-ID: <200802292332.m1TNWuwB002383@zion.cs.uiuc.edu> Changes in directory llvm-www/ProjectsWithLLVM: index.html updated: 1.40 -> 1.41 --- Log message: add an entry --- Diffs of the changes: (+21 -0) index.html | 21 +++++++++++++++++++++ 1 files changed, 21 insertions(+) Index: llvm-www/ProjectsWithLLVM/index.html diff -u llvm-www/ProjectsWithLLVM/index.html:1.40 llvm-www/ProjectsWithLLVM/index.html:1.41 --- llvm-www/ProjectsWithLLVM/index.html:1.40 Sat Dec 8 18:26:42 2007 +++ llvm-www/ProjectsWithLLVM/index.html Fri Feb 29 17:31:43 2008 @@ -35,6 +35,7 @@
    +
  • How to Writer Your Own Compiler
  • Register Allocation by Puzzle Solving
  • Faust Real-Time Signal Processing System
  • Adobe "Hydra" Language
    • @@ -61,6 +62,26 @@
    +How to Writer Your Own Compiler +
    + +
    +By Silvano Rivoira, Politecnico di Torino +
    + +
    +

    + +This project describes the development of a compiler front end producing +LLVM Assembly Code for a Java-like programming language. It is used in a +course on Compilers to show how to incrementally design and implement the +successive phases of the translation process by means of common tools such +as JFlex and Cup. The source code developed at each step is made available. +

    +
    + + +
    Register Allocation by Puzzle Solving
    From sabre at nondot.org Fri Feb 29 17:32:56 2008 From: sabre at nondot.org (Chris Lattner) Date: Fri, 29 Feb 2008 17:32:56 -0600 Subject: [llvm-commits] CVS: llvm-www/ProjectsWithLLVM/index.html Message-ID: <200802292332.m1TNWu1f002384@zion.cs.uiuc.edu> Changes in directory llvm-www/ProjectsWithLLVM: index.html updated: 1.41 -> 1.42 --- Log message: typo --- Diffs of the changes: (+2 -2) index.html | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-www/ProjectsWithLLVM/index.html diff -u llvm-www/ProjectsWithLLVM/index.html:1.41 llvm-www/ProjectsWithLLVM/index.html:1.42 --- llvm-www/ProjectsWithLLVM/index.html:1.41 Fri Feb 29 17:31:43 2008 +++ llvm-www/ProjectsWithLLVM/index.html Fri Feb 29 17:32:13 2008 @@ -35,7 +35,7 @@
      -
    • How to Writer Your Own Compiler
      • +
    • How to Write Your Own Compiler
    • Register Allocation by Puzzle Solving
    • Faust Real-Time Signal Processing System
    • Adobe "Hydra" Language
      • @@ -62,7 +62,7 @@
      -How to Writer Your Own Compiler +How to Write Your Own Compiler
      From dpatel at apple.com Fri Feb 29 17:34:12 2008 From: dpatel at apple.com (Devang Patel) Date: Fri, 29 Feb 2008 23:34:12 -0000 Subject: [llvm-commits] [llvm] r47776 - in /llvm/trunk: include/llvm/Transforms/IPO.h lib/Transforms/IPO/StructRetPromotion.cpp Message-ID: <200802292334.m1TNYDTJ002434@zion.cs.uiuc.edu> Author: dpatel Date: Fri Feb 29 17:34:08 2008 New Revision: 47776 URL: http://llvm.org/viewvc/llvm-project?rev=47776&view=rev Log: Add pass to promote sret. This pass transforms %struct._Point = type { i32, i32, i32, i32, i32, i32 } define internal void @foo(%struct._Point* sret %agg.result) into %struct._Point = type { i32, i32, i32, i32, i32, i32 } define internal %struct._Point @foo() This pass updates foo() clients appropriately to use getresult instruction to extract return values. This pass is not yet ready for prime time. Added: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Modified: llvm/trunk/include/llvm/Transforms/IPO.h Modified: llvm/trunk/include/llvm/Transforms/IPO.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/IPO.h?rev=47776&r1=47775&r2=47776&view=diff ============================================================================== --- llvm/trunk/include/llvm/Transforms/IPO.h (original) +++ llvm/trunk/include/llvm/Transforms/IPO.h Fri Feb 29 17:34:08 2008 @@ -125,6 +125,7 @@ /// be passed by value. /// Pass *createArgumentPromotionPass(); +Pass *createStructRetPromotionPass(); //===----------------------------------------------------------------------===// /// createIPConstantPropagationPass - This pass propagates constants from call Added: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp?rev=47776&view=auto ============================================================================== --- llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp (added) +++ llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Fri Feb 29 17:34:08 2008 @@ -0,0 +1,292 @@ +//===-- StructRetPromotion.cpp - Promote sret arguments -000000------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This pass promotes "by reference" arguments to be "by value" arguments. In +// practice, this means looking for internal functions that have pointer +// arguments. If it can prove, through the use of alias analysis, that an +// argument is *only* loaded, then it can pass the value into the function +// instead of the address of the value. This can cause recursive simplification +// of code and lead to the elimination of allocas (especially in C++ template +// code like the STL). +// +// This pass also handles aggregate arguments that are passed into a function, +// scalarizing them if the elements of the aggregate are only loaded. Note that +// it refuses to scalarize aggregates which would require passing in more than +// three operands to the function, because passing thousands of operands for a +// large array or structure is unprofitable! +// +// Note that this transformation could also be done for arguments that are only +// stored to (returning the value instead), but does not currently. This case +// would be best handled when and if LLVM begins supporting multiple return +// values from functions. +// +//===----------------------------------------------------------------------===// + +#define DEBUG_TYPE "sretpromotion" +#include "llvm/Transforms/IPO.h" +#include "llvm/Constants.h" +#include "llvm/DerivedTypes.h" +#include "llvm/Module.h" +#include "llvm/CallGraphSCCPass.h" +#include "llvm/Instructions.h" +#include "llvm/Analysis/CallGraph.h" +#include "llvm/Support/CallSite.h" +#include "llvm/Support/CFG.h" +#include "llvm/Support/Debug.h" +#include "llvm/ADT/Statistic.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/Support/Compiler.h" +using namespace llvm; + +namespace { + /// SRETPromotion - This pass removes sret parameter and updates + /// function to use multiple return value. + /// + struct VISIBILITY_HIDDEN SRETPromotion : public CallGraphSCCPass { + virtual void getAnalysisUsage(AnalysisUsage &AU) const { + CallGraphSCCPass::getAnalysisUsage(AU); + } + + virtual bool runOnSCC(const std::vector &SCC); + static char ID; // Pass identification, replacement for typeid + SRETPromotion() : CallGraphSCCPass((intptr_t)&ID) {} + + private: + bool PromoteReturn(CallGraphNode *CGN); + bool isSafeToUpdateAllCallers(Function *F); + Function *cloneFunctionBody(Function *F, const StructType *STy); + void updateCallSites(Function *F, Function *NF); + }; + + char SRETPromotion::ID = 0; + RegisterPass X("sretpromotion", + "Promote sret arguments to multiple ret values"); +} + +Pass *llvm::createStructRetPromotionPass() { + return new SRETPromotion(); +} + +bool SRETPromotion::runOnSCC(const std::vector &SCC) { + bool Changed = false; + + for (unsigned i = 0, e = SCC.size(); i != e; ++i) + Changed |= PromoteReturn(SCC[i]); + + return Changed; +} + +/// PromoteReturn - This method promotes function that uses StructRet paramater +/// into a function that uses mulitple return value. +bool SRETPromotion::PromoteReturn(CallGraphNode *CGN) { + Function *F = CGN->getFunction(); + + // Make sure that it is local to this module. + if (!F || !F->hasInternalLinkage()) + return false; + + // Make sure that function returns struct. + if (F->arg_size() == 0 || !F->isStructReturn() || F->doesNotReturn()) + return false; + + assert (F->getReturnType() == Type::VoidTy && "Invalid function return type"); + Function::arg_iterator AI = F->arg_begin(); + const llvm::PointerType *FArgType = dyn_cast(AI->getType()); + assert (FArgType && "Invalid sret paramater type"); + const llvm::StructType *STy = + dyn_cast(FArgType->getElementType()); + assert (STy && "Invalid sret parameter element type"); + + // Check if it is ok to perform this promotion. + if (isSafeToUpdateAllCallers(F) == false) + return false; + + // [1] Replace use of sret parameter + AllocaInst *TheAlloca = new AllocaInst (STy, NULL, "mrv", F->getEntryBlock().begin()); + Value *NFirstArg = F->arg_begin(); + NFirstArg->replaceAllUsesWith(TheAlloca); + + // Find and replace ret instructions + SmallVector RetVals; + for (Function::iterator FI = F->begin(), FE = F->end(); FI != FE; ++FI) + for(BasicBlock::iterator BI = FI->begin(), BE = FI->end(); BI != BE; ) { + Instruction *I = BI; + ++BI; + if (isa(I)) { + RetVals.clear(); + for (unsigned idx = 0; idx < STy->getNumElements(); ++idx) { + SmallVector GEPIdx; + GEPIdx.push_back(ConstantInt::get(Type::Int32Ty, 0)); + GEPIdx.push_back(ConstantInt::get(Type::Int32Ty, idx)); + Value *NGEPI = new GetElementPtrInst(TheAlloca, GEPIdx.begin(), GEPIdx.end(), + "mrv.gep", I); + Value *NV = new LoadInst(NGEPI, "mrv.ld", I); + RetVals.push_back(NV); + } + + ReturnInst *NR = new ReturnInst(&RetVals[0], RetVals.size(), I); + I->replaceAllUsesWith(NR); + I->eraseFromParent(); + } + } + + // Create the new function body and insert it into the module. + Function *NF = cloneFunctionBody(F, STy); + + // Update all call sites to use new function + updateCallSites(F, NF); + + F->eraseFromParent(); + getAnalysis().changeFunction(F, NF); + return true; +} + + // Check if it is ok to perform this promotion. +bool SRETPromotion::isSafeToUpdateAllCallers(Function *F) { + + if (F->use_empty()) + // No users. OK to modify signature. + return true; + + for (Value::use_iterator FnUseI = F->use_begin(), FnUseE = F->use_end(); + FnUseI != FnUseE; ++FnUseI) { + + CallSite CS = CallSite::get(*FnUseI); + Instruction *Call = CS.getInstruction(); + CallSite::arg_iterator AI = CS.arg_begin(); + Value *FirstArg = *AI; + + if (!isa(FirstArg)) + return false; + + // Check FirstArg's users. + for (Value::use_iterator ArgI = FirstArg->use_begin(), + ArgE = FirstArg->use_end(); ArgI != ArgE; ++ArgI) { + + // If FirstArg user is a CallInst that does not correspond to current + // call site then this function F is not suitable for sret promotion. + if (CallInst *CI = dyn_cast(ArgI)) { + if (CI != Call) + return false; + } + // If FirstArg user is a GEP whose all users are not LoadInst then + // this function F is not suitable for sret promotion. + else if (GetElementPtrInst *GEP = dyn_cast(ArgI)) { + for (Value::use_iterator GEPI = GEP->use_begin(), GEPE = GEP->use_end(); + GEPI != GEPE; ++GEPI) + if (!isa(GEPI)) + return false; + } + // Any other FirstArg users make this function unsuitable for sret + // promotion. + else + return false; + } + } + + return true; +} + +/// cloneFunctionBody - Create a new function based on F and +/// insert it into module. Remove first argument. Use STy as +/// the return type for new function. +Function *SRETPromotion::cloneFunctionBody(Function *F, + const StructType *STy) { + + // FIXME : Do not drop param attributes on the floor. + const FunctionType *FTy = F->getFunctionType(); + std::vector Params; + + // Skip first argument. + Function::arg_iterator I = F->arg_begin(), E = F->arg_end(); + ++I; + while (I != E) { + Params.push_back(I->getType()); + ++I; + } + + FunctionType *NFTy = FunctionType::get(STy, Params, FTy->isVarArg()); + Function *NF = new Function(NFTy, F->getLinkage(), F->getName()); + NF->setCallingConv(F->getCallingConv()); + F->getParent()->getFunctionList().insert(F, NF); + NF->getBasicBlockList().splice(NF->begin(), F->getBasicBlockList()); + + // Replace arguments + I = F->arg_begin(); + E = F->arg_end(); + Function::arg_iterator NI = NF->arg_begin(); + ++I; + while (I != E) { + I->replaceAllUsesWith(NI); + NI->takeName(I); + ++I; + ++NI; + } + + return NF; +} + +/// updateCallSites - Update all sites that call F to use NF. +void SRETPromotion::updateCallSites(Function *F, Function *NF) { + + // FIXME : Handle parameter attributes + SmallVector Args; + + for (Value::use_iterator FUI = F->use_begin(), FUE = F->use_end(); FUI != FUE;) { + CallSite CS = CallSite::get(*FUI); + ++FUI; + Instruction *Call = CS.getInstruction(); + + // Copy arguments, however skip first one. + CallSite::arg_iterator AI = CS.arg_begin(), AE = CS.arg_end(); + Value *FirstCArg = *AI; + ++AI; + while (AI != AE) { + Args.push_back(*AI); + ++AI; + } + + // Build new call instruction. + Instruction *New; + if (InvokeInst *II = dyn_cast(Call)) { + New = new InvokeInst(NF, II->getNormalDest(), II->getUnwindDest(), + Args.begin(), Args.end(), "", Call); + cast(New)->setCallingConv(CS.getCallingConv()); + } else { + New = new CallInst(NF, Args.begin(), Args.end(), "", Call); + cast(New)->setCallingConv(CS.getCallingConv()); + if (cast(Call)->isTailCall()) + cast(New)->setTailCall(); + } + Args.clear(); + New->takeName(Call); + + // Update all users of sret parameter to extract value using getresult. + for (Value::use_iterator UI = FirstCArg->use_begin(), + UE = FirstCArg->use_end(); UI != UE; ) { + User *U2 = *UI++; + CallInst *C2 = dyn_cast(U2); + if (C2 && (C2 == Call)) + continue; + else if (GetElementPtrInst *UGEP = dyn_cast(U2)) { + Value *GR = new GetResultInst(New, 5, "xxx", UGEP); + for (Value::use_iterator GI = UGEP->use_begin(), + GE = UGEP->use_end(); GI != GE; ++GI) { + if (LoadInst *L = dyn_cast(*GI)) { + L->replaceAllUsesWith(GR); + L->eraseFromParent(); + } + } + UGEP->eraseFromParent(); + } + else assert( 0 && "Unexpected sret parameter use"); + } + Call->eraseFromParent(); + } +} From dpatel at apple.com Fri Feb 29 17:41:13 2008 From: dpatel at apple.com (Devang Patel) Date: Fri, 29 Feb 2008 23:41:13 -0000 Subject: [llvm-commits] [llvm] r47777 - /llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Message-ID: <200802292341.m1TNfDad002637@zion.cs.uiuc.edu> Author: dpatel Date: Fri Feb 29 17:41:13 2008 New Revision: 47777 URL: http://llvm.org/viewvc/llvm-project?rev=47777&view=rev Log: Fix cut-n-pasto. Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp?rev=47777&r1=47776&r2=47777&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Fri Feb 29 17:41:13 2008 @@ -7,25 +7,7 @@ // //===----------------------------------------------------------------------===// // -// This pass promotes "by reference" arguments to be "by value" arguments. In -// practice, this means looking for internal functions that have pointer -// arguments. If it can prove, through the use of alias analysis, that an -// argument is *only* loaded, then it can pass the value into the function -// instead of the address of the value. This can cause recursive simplification -// of code and lead to the elimination of allocas (especially in C++ template -// code like the STL). -// -// This pass also handles aggregate arguments that are passed into a function, -// scalarizing them if the elements of the aggregate are only loaded. Note that -// it refuses to scalarize aggregates which would require passing in more than -// three operands to the function, because passing thousands of operands for a -// large array or structure is unprofitable! -// -// Note that this transformation could also be done for arguments that are only -// stored to (returning the value instead), but does not currently. This case -// would be best handled when and if LLVM begins supporting multiple return -// values from functions. -// +// TODO : Describe this pass. //===----------------------------------------------------------------------===// #define DEBUG_TYPE "sretpromotion" From evan.cheng at apple.com Fri Feb 29 17:49:38 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 29 Feb 2008 15:49:38 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> <200802291429.22322.dag@cray.com> Message-ID: Let's try to solve one problem at a time. 1. Roman's depth / height patch calculation is obviously goodness. Please commit that first. 2. It's probably safe to eliminate the "special tie-breaker" from top down sorting function. 3. We will need to fix up the sorting functions so strict ordering is preserved. We need to do so without breaking any of the existing test case. "return left->NodeNum < right->NodeNum;" doesn't. :-( What does "return false" mean? Is it favoring nodes that are inserted earlier? 4. It might be wise to add some debugging code so we can tell where things start diverge. 5. It would be nice to be able to rebalance the heap. Roman and David can fight it out when we get to that point. :-) Sounds like a plan? Let's resolve this soon or I will start hacking on it again. :-) Evan On Feb 29, 2008, at 1:44 PM, Roman Levenstein wrote: > Hi David, Hi Evan, > > 2008/3/1, Evan Cheng : >> >> On Feb 29, 2008, at 12:29 PM, David Greene wrote: >> >>> On Friday 29 February 2008 11:27, Roman Levenstein wrote: >>> >>>> Now, a new problem I have descovered: >>>> While improving my patch, I also looked at the LatencyPriorityQueue >>>> implementation and the RegReductionPriorityQueue implementation. >>>> Both >>>> are using priority queues and have an extremely inefficient >>>> remove() >>>> method, that consumes 90% of the compilation time on very big BBs. >>>> So, >>>> I changed the data structure from the priority queue to the ordered >>>> std::set. Obviously, the max element is basically the last >>>> element of >>>> the set. This change produces a 3x speedup of compilation time on >>>> huge >>>> basic blocks. But there is a problem (or a bug!): >>> >>> The priority queue implementation is simply broken. The heap >>> properties >>> are not properly maintained. I proposed a patch to fix this some >>> time ago >>> but it is still in limbo. It also cleans up the remove() >>> infefficiency but >>> trades it off for time to recompute the heap. I've found it to be >>> close to a >>> wash, slower on some codes and faster on others. >>> >>> Evan, what do I need to do to get that patch into acceptable >>> condition? >> >> >> Please resubmit it again. I'll evaluate the compile time penalty >> today. > > David, I guess you mean this patch? > http://www.nabble.com/RFC:-GLIBCXX_DEBUG-ScheduleDAG-Patch-td14382214.html > > Looking at it, I'd assume it is not extremely efficient since you > still use the priority queue and rebuild it, when you remove elements. > > I'm pretty much sure that using std::set or any other efficient sorted > set implementation (binary tree,etc) would perform better, if we need > to delete elements from the middle of the heap and update priorities > (which can be done by means of remove,change,insert). My preliminary > tests done using std::set instead of priority queues for td-sched > indicate a 3x performance boost. > >>> >>> >>>> the comparison operator >>>> td_ls_rr_sort::operator()(const SUnit* left, const SUnit* right) >>>> (see >>>> ScheduleDAGRRList.cpp) >>>> seems to be implemented incorrectly (see the code below). >>> >>> Heh. Yep, this looks familiar. > > Good that you confirm it. > >>>> Namely, I discovered by debugging two specific values L and R, >>>> where >>>> L!=R, so that this operator returns FALSE (by return statement at >>>> the >>>> very end of the method) for both pair (L,R) and (R,L). That means >>>> that >>>> L >= R and R >=L and L!=R at the same time, which cannot be. This >>>> incorrect comparison operator breaks all set operations based on >>>> the >>>> ordering of elements, e.g. find() and insert(). Actually, I'm >>>> wondering why it didn't break the priority queue operations before. >>> >>> Configure with --enable-expensive-checks and you'll probably get an >>> assert. >> >>>> The same operator for bu_ls_rr_sort has a very long disclaimer >>>> related to a similar issue: >>>> // There used to be a special tie breaker here that looked for >>>> // two-address instructions and preferred the instruction with a >>>> // def&use operand. The special case triggered diagnostics when >>>> // _GLIBCXX_DEBUG was enabled because it broke the strict weak >>>> // ordering that priority_queue requires. It didn't help much >>>> anyway >>>> // because AddPseudoTwoAddrDeps already covers many of the cases >>>> // where it would have applied. In addition, it's counter- >>>> intuitive >>>> // that a tie breaker would be the first thing attempted. >>>> There's a >>>> // "real" tie breaker below that is the operation of last resort. >>>> // The fact that the "special tie breaker" would trigger when there >>>> // wasn't otherwise a tie is what broke the strict weak ordering >>>> // constraint. >>> >>> Yep, I believe Dan Gohman fixed this one. >>> >>>> So, there seems to be a problem. But I don't have a solution for >>>> it. I need you help to understand how to fix it. >>> >>> It's possible the compare bug was not caught earlier because >>> std::poriority_queue doesn't check it with _GLIBCXX_DEBUG turned >>> on. I don't know that for a fact, though. > > Could be. > >>> I would think that eliminating the special tie breaker might be a >>> solution, >>> similarly to what was done in bu_ls_rr_sort. >> >> >> There is something I am not grasping. I would think the problem can >> still occur even if the special tie breaker is removed. Take any two >> nodes A, B, suppose all of the conditions evaluates to false the >> function will returns false regardless if it's comparing A <= B or B >> <= A, right? I would think the right is just to change the default >> from >> return false; >> to >> return left->NodeNum < right->NodeNum; >> >> This forces a strict ordering between two nodes, no? > > Agreed, this should introduce a strict ordering and fix the problem. > > So, we need your fix to update the priorities, but I don't think that > your data-structures are efficient. So, I'd like to ask you to wait > until Monday, until I test my patch including your priority update > changes. This would avoid any commit conflicts. Based on the > performance test, we'll decide which approach should be committet. Is > it OK with you? I'd be glad to submit the patch immediately, but I > forgot my development machine in the office ;-( > > Regards, > Roman > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Fri Feb 29 18:39:47 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Sat, 01 Mar 2008 00:39:47 -0000 Subject: [llvm-commits] [llvm] r47779 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Message-ID: <200803010039.m210dlqV004258@zion.cs.uiuc.edu> Author: evancheng Date: Fri Feb 29 18:39:47 2008 New Revision: 47779 URL: http://llvm.org/viewvc/llvm-project?rev=47779&view=rev Log: Refactor / clean up code; remove td list scheduler special tie breaker (no real benefit). Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=47779&r1=47778&r2=47779&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Fri Feb 29 18:39:47 2008 @@ -1126,7 +1126,7 @@ } private: - bool canClobber(SUnit *SU, SUnit *Op); + bool canClobber(const SUnit *SU, const SUnit *Op); void AddPseudoTwoAddrDeps(); void CalculateSethiUllmanNumbers(); unsigned CalcNodeSethiUllmanNumber(const SUnit *SU); @@ -1236,58 +1236,55 @@ unsigned LPriority = SPQ->getNodePriority(left); unsigned RPriority = SPQ->getNodePriority(right); - if (LPriority > RPriority) - return true; - else if (LPriority == RPriority) { - // Try schedule def + use closer when Sethi-Ullman numbers are the same. - // e.g. - // t1 = op t2, c1 - // t3 = op t4, c2 - // - // and the following instructions are both ready. - // t2 = op c3 - // t4 = op c4 - // - // Then schedule t2 = op first. - // i.e. - // t4 = op c4 - // t2 = op c3 - // t1 = op t2, c1 - // t3 = op t4, c2 - // - // This creates more short live intervals. - unsigned LDist = closestSucc(left); - unsigned RDist = closestSucc(right); - if (LDist < RDist) - return true; - else if (LDist == RDist) { - // Intuitively, it's good to push down instructions whose results are - // liveout so their long live ranges won't conflict with other values - // which are needed inside the BB. Further prioritize liveout instructions - // by the number of operands which are calculated within the BB. - unsigned LScratch = calcMaxScratches(left); - unsigned RScratch = calcMaxScratches(right); - if (LScratch > RScratch) - return true; - else if (LScratch == RScratch) { - if (left->Height > right->Height) - return true; - else if (left->Height == right->Height) { - if (left->Depth < right->Depth) - return true; - else if (left->Depth == right->Depth) { - if (left->CycleBound > right->CycleBound) - return true; - } - } - } - } - } + if (LPriority != RPriority) + return LPriority > RPriority; + + // Try schedule def + use closer when Sethi-Ullman numbers are the same. + // e.g. + // t1 = op t2, c1 + // t3 = op t4, c2 + // + // and the following instructions are both ready. + // t2 = op c3 + // t4 = op c4 + // + // Then schedule t2 = op first. + // i.e. + // t4 = op c4 + // t2 = op c3 + // t1 = op t2, c1 + // t3 = op t4, c2 + // + // This creates more short live intervals. + unsigned LDist = closestSucc(left); + unsigned RDist = closestSucc(right); + if (LDist != RDist) + return LDist < RDist; + + // Intuitively, it's good to push down instructions whose results are + // liveout so their long live ranges won't conflict with other values + // which are needed inside the BB. Further prioritize liveout instructions + // by the number of operands which are calculated within the BB. + unsigned LScratch = calcMaxScratches(left); + unsigned RScratch = calcMaxScratches(right); + if (LScratch != RScratch) + return LScratch > RScratch; + + if (left->Height != right->Height) + return left->Height > right->Height; + + if (left->Depth != right->Depth) + return left->Depth < right->Depth; + + if (left->CycleBound != right->CycleBound) + return left->CycleBound > right->CycleBound; + + // FIXME: No strict ordering. return false; } -template -bool BURegReductionPriorityQueue::canClobber(SUnit *SU, SUnit *Op) { +template bool +BURegReductionPriorityQueue::canClobber(const SUnit *SU, const SUnit *Op) { if (SU->isTwoAddress) { unsigned Opc = SU->Node->getTargetOpcode(); const TargetInstrDesc &TID = TII->get(Opc); @@ -1487,20 +1484,6 @@ else if (left->NumSuccs != 0 && right->NumSuccs == 0) return true; - // Special tie breaker: if two nodes share a operand, the one that use it - // as a def&use operand is preferred. - if (LIsTarget && RIsTarget) { - if (left->isTwoAddress && !right->isTwoAddress) { - SDNode *DUNode = left->Node->getOperand(0).Val; - if (DUNode->isOperand(right->Node)) - RBonus += 2; - } - if (!left->isTwoAddress && right->isTwoAddress) { - SDNode *DUNode = right->Node->getOperand(0).Val; - if (DUNode->isOperand(left->Node)) - LBonus += 2; - } - } if (LIsFloater) LBonus -= 2; if (RIsFloater) @@ -1510,21 +1493,19 @@ if (right->NumSuccs == 1) RBonus += 2; - if (LPriority+LBonus < RPriority+RBonus) - return true; - else if (LPriority == RPriority) { - if (left->Depth < right->Depth) - return true; - else if (left->Depth == right->Depth) { - if (left->NumSuccsLeft > right->NumSuccsLeft) - return true; - else if (left->NumSuccsLeft == right->NumSuccsLeft) { - if (left->CycleBound > right->CycleBound) - return true; - } - } - } + if (LPriority+LBonus != RPriority+RBonus) + return LPriority+LBonus < RPriority+RBonus; + + if (left->Depth != right->Depth) + return left->Depth < right->Depth; + + if (left->NumSuccsLeft != right->NumSuccsLeft) + return left->NumSuccsLeft > right->NumSuccsLeft; + + if (left->CycleBound != right->CycleBound) + return left->CycleBound > right->CycleBound; + // FIXME: No strict ordering. return false; } From evan.cheng at apple.com Fri Feb 29 18:40:15 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 29 Feb 2008 16:40:15 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> <200802291429.22322.dag@cray.com> Message-ID: <18F58AC8-AE78-4B8F-907F-C87380D8B565@apple.com> On Feb 29, 2008, at 3:49 PM, Evan Cheng wrote: > Let's try to solve one problem at a time. > > 1. Roman's depth / height patch calculation is obviously goodness. > Please commit that first. > 2. It's probably safe to eliminate the "special tie-breaker" from top > down sorting function. This is done. I've also cleaned up the code. Evan > > 3. We will need to fix up the sorting functions so strict ordering is > preserved. We need to do so without breaking any of the existing test > case. "return left->NodeNum < right->NodeNum;" doesn't. :-( What does > "return false" mean? Is it favoring nodes that are inserted earlier? > 4. It might be wise to add some debugging code so we can tell where > things start diverge. > 5. It would be nice to be able to rebalance the heap. Roman and David > can fight it out when we get to that point. :-) > > Sounds like a plan? Let's resolve this soon or I will start hacking on > it again. :-) > > Evan > > On Feb 29, 2008, at 1:44 PM, Roman Levenstein wrote: > >> Hi David, Hi Evan, >> >> 2008/3/1, Evan Cheng : >>> >>> On Feb 29, 2008, at 12:29 PM, David Greene wrote: >>> >>>> On Friday 29 February 2008 11:27, Roman Levenstein wrote: >>>> >>>>> Now, a new problem I have descovered: >>>>> While improving my patch, I also looked at the >>>>> LatencyPriorityQueue >>>>> implementation and the RegReductionPriorityQueue implementation. >>>>> Both >>>>> are using priority queues and have an extremely inefficient >>>>> remove() >>>>> method, that consumes 90% of the compilation time on very big BBs. >>>>> So, >>>>> I changed the data structure from the priority queue to the >>>>> ordered >>>>> std::set. Obviously, the max element is basically the last >>>>> element of >>>>> the set. This change produces a 3x speedup of compilation time on >>>>> huge >>>>> basic blocks. But there is a problem (or a bug!): >>>> >>>> The priority queue implementation is simply broken. The heap >>>> properties >>>> are not properly maintained. I proposed a patch to fix this some >>>> time ago >>>> but it is still in limbo. It also cleans up the remove() >>>> infefficiency but >>>> trades it off for time to recompute the heap. I've found it to be >>>> close to a >>>> wash, slower on some codes and faster on others. >>>> >>>> Evan, what do I need to do to get that patch into acceptable >>>> condition? >>> >>> >>> Please resubmit it again. I'll evaluate the compile time penalty >>> today. >> >> David, I guess you mean this patch? >> http://www.nabble.com/RFC:-GLIBCXX_DEBUG-ScheduleDAG-Patch-td14382214.html >> >> Looking at it, I'd assume it is not extremely efficient since you >> still use the priority queue and rebuild it, when you remove >> elements. >> >> I'm pretty much sure that using std::set or any other efficient >> sorted >> set implementation (binary tree,etc) would perform better, if we need >> to delete elements from the middle of the heap and update priorities >> (which can be done by means of remove,change,insert). My preliminary >> tests done using std::set instead of priority queues for td-sched >> indicate a 3x performance boost. >> >>>> >>>> >>>>> the comparison operator >>>>> td_ls_rr_sort::operator()(const SUnit* left, const SUnit* right) >>>>> (see >>>>> ScheduleDAGRRList.cpp) >>>>> seems to be implemented incorrectly (see the code below). >>>> >>>> Heh. Yep, this looks familiar. >> >> Good that you confirm it. >> >>>>> Namely, I discovered by debugging two specific values L and R, >>>>> where >>>>> L!=R, so that this operator returns FALSE (by return statement at >>>>> the >>>>> very end of the method) for both pair (L,R) and (R,L). That means >>>>> that >>>>> L >= R and R >=L and L!=R at the same time, which cannot be. This >>>>> incorrect comparison operator breaks all set operations based on >>>>> the >>>>> ordering of elements, e.g. find() and insert(). Actually, I'm >>>>> wondering why it didn't break the priority queue operations >>>>> before. >>>> >>>> Configure with --enable-expensive-checks and you'll probably get an >>>> assert. >>> >>>>> The same operator for bu_ls_rr_sort has a very long disclaimer >>>>> related to a similar issue: >>>>> // There used to be a special tie breaker here that looked for >>>>> // two-address instructions and preferred the instruction with a >>>>> // def&use operand. The special case triggered diagnostics when >>>>> // _GLIBCXX_DEBUG was enabled because it broke the strict weak >>>>> // ordering that priority_queue requires. It didn't help much >>>>> anyway >>>>> // because AddPseudoTwoAddrDeps already covers many of the cases >>>>> // where it would have applied. In addition, it's counter- >>>>> intuitive >>>>> // that a tie breaker would be the first thing attempted. >>>>> There's a >>>>> // "real" tie breaker below that is the operation of last resort. >>>>> // The fact that the "special tie breaker" would trigger when >>>>> there >>>>> // wasn't otherwise a tie is what broke the strict weak ordering >>>>> // constraint. >>>> >>>> Yep, I believe Dan Gohman fixed this one. >>>> >>>>> So, there seems to be a problem. But I don't have a solution for >>>>> it. I need you help to understand how to fix it. >>>> >>>> It's possible the compare bug was not caught earlier because >>>> std::poriority_queue doesn't check it with _GLIBCXX_DEBUG turned >>>> on. I don't know that for a fact, though. >> >> Could be. >> >>>> I would think that eliminating the special tie breaker might be a >>>> solution, >>>> similarly to what was done in bu_ls_rr_sort. >>> >>> >>> There is something I am not grasping. I would think the problem can >>> still occur even if the special tie breaker is removed. Take any >>> two >>> nodes A, B, suppose all of the conditions evaluates to false the >>> function will returns false regardless if it's comparing A <= B or B >>> <= A, right? I would think the right is just to change the default >>> from >>> return false; >>> to >>> return left->NodeNum < right->NodeNum; >>> >>> This forces a strict ordering between two nodes, no? >> >> Agreed, this should introduce a strict ordering and fix the problem. >> >> So, we need your fix to update the priorities, but I don't think that >> your data-structures are efficient. So, I'd like to ask you to wait >> until Monday, until I test my patch including your priority update >> changes. This would avoid any commit conflicts. Based on the >> performance test, we'll decide which approach should be committet. Is >> it OK with you? I'd be glad to submit the patch immediately, but I >> forgot my development machine in the office ;-( >> >> Regards, >> Roman >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Fri Feb 29 20:20:37 2008 From: isanbard at gmail.com (Bill Wendling) Date: Sat, 01 Mar 2008 02:20:37 -0000 Subject: [llvm-commits] [llvm] r47780 - /llvm/tags/Apple/llvmCore-2019/ Message-ID: <200803010220.m212Kbgf007101@zion.cs.uiuc.edu> Author: void Date: Fri Feb 29 20:20:37 2008 New Revision: 47780 URL: http://llvm.org/viewvc/llvm-project?rev=47780&view=rev Log: Creating llvmCore-2019 branch Added: llvm/tags/Apple/llvmCore-2019/ - copied from r47779, llvm/trunk/ From isanbard at gmail.com Fri Feb 29 20:20:43 2008 From: isanbard at gmail.com (Bill Wendling) Date: Sat, 01 Mar 2008 02:20:43 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47781 - /llvm-gcc-4.2/tags/Apple/llvmgcc42-2019/ Message-ID: <200803010220.m212KiPE007113@zion.cs.uiuc.edu> Author: void Date: Fri Feb 29 20:20:43 2008 New Revision: 47781 URL: http://llvm.org/viewvc/llvm-project?rev=47781&view=rev Log: Creating llvmgcc42-2019 branch Added: llvm-gcc-4.2/tags/Apple/llvmgcc42-2019/ - copied from r47780, llvm-gcc-4.2/trunk/ From dalej at apple.com Fri Feb 29 21:40:57 2008 From: dalej at apple.com (Dale Johannesen) Date: Sat, 01 Mar 2008 03:40:57 -0000 Subject: [llvm-commits] [llvm] r47782 - in /llvm/trunk: include/llvm/CodeGen/ValueTypes.h lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200803010340.m213ewlD009365@zion.cs.uiuc.edu> Author: johannes Date: Fri Feb 29 21:40:57 2008 New Revision: 47782 URL: http://llvm.org/viewvc/llvm-project?rev=47782&view=rev Log: Add MVT::is128BitVector and is64BitVector. Shrink unaligned load/store code using them. Per review of unaligned load/store vector patch. Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ValueTypes.h?rev=47782&r1=47781&r2=47782&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ValueTypes.h (original) +++ llvm/trunk/include/llvm/CodeGen/ValueTypes.h Fri Feb 29 21:40:57 2008 @@ -250,6 +250,19 @@ return (getSizeInBits(VT) + 7)/8*8; } + /// MVT::is64BitVector - Return true if this is a 64-bit vector type. + static inline bool is64BitVector(ValueType VT) { + return (VT==v8i8 || VT==v4i16 || VT==v2i32 || VT==v1i64 || VT==v2f32 || + (isExtendedVT(VT) && isVector(VT) && getSizeInBits(VT)==64)); + } + + /// MVT::is128BitVector - Return true if this is a 128-bit vector type. + static inline bool is128BitVector(ValueType VT) { + return (VT==v16i8 || VT==v8i16 || VT==v4i32 || VT==v2i64 || + VT==v4f32 || VT==v2f64 || + (isExtendedVT(VT) && isVector(VT) && getSizeInBits(VT)==128)); + } + /// MVT::getIntegerType - Returns the ValueType that represents an integer /// with the given number of bits. /// Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47782&r1=47781&r2=47782&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Feb 29 21:40:57 2008 @@ -574,15 +574,9 @@ // Expand to a bitconvert of the value to the integer type of the // same size, then a (misaligned) int store. MVT::ValueType intVT; - if (VT == MVT::v8i16 || VT == MVT::v4i32 || - VT == MVT::v2i64 || VT == MVT::v2f64 || - VT == MVT::v4f32 || VT == MVT::v16i8 || - VT == MVT::ppcf128) + if (MVT::is128BitVector(VT) || VT == MVT::ppcf128 || VT == MVT::f128) intVT = MVT::i128; - else if (VT==MVT::f64 || - VT == MVT::v8i8 || VT == MVT::v4i16 || - VT == MVT::v2i32 || VT == MVT::v1i64 || - VT == MVT::v2f32) + else if (MVT::is64BitVector(VT) || VT==MVT::f64) intVT = MVT::i64; else if (VT==MVT::f32) intVT = MVT::i32; @@ -634,15 +628,10 @@ // Expand to a (misaligned) integer load of the same size, // then bitconvert to floating point or vector. MVT::ValueType intVT; - if (LoadedVT == MVT::v8i16 || LoadedVT == MVT::v4i32 || - LoadedVT == MVT::v2i64 || LoadedVT == MVT::v2f64 || - LoadedVT == MVT::v4f32 || LoadedVT == MVT::v16i8 || - LoadedVT == MVT::ppcf128) + if (MVT::is128BitVector(LoadedVT) || + LoadedVT == MVT::ppcf128 || LoadedVT == MVT::f128) intVT = MVT::i128; - else if (LoadedVT == MVT::f64 || - LoadedVT == MVT::v8i8 || LoadedVT == MVT::v4i16 || - LoadedVT == MVT::v2i32 || LoadedVT == MVT::v1i64 || - LoadedVT == MVT::v2f32) + else if (MVT::is64BitVector(LoadedVT) || LoadedVT == MVT::f64) intVT = MVT::i64; else if (LoadedVT == MVT::f32) intVT = MVT::i32; From tonic at nondot.org Sat Mar 1 01:36:30 2008 From: tonic at nondot.org (Tanya Lattner) Date: Sat, 01 Mar 2008 07:36:30 -0000 Subject: [llvm-commits] [llvm] r47783 - /llvm/trunk/tools/Makefile Message-ID: <200803010736.m217aU7u015614@zion.cs.uiuc.edu> Author: tbrethou Date: Sat Mar 1 01:36:30 2008 New Revision: 47783 URL: http://llvm.org/viewvc/llvm-project?rev=47783&view=rev Log: Disable lto because its broken on tiger. Modified: llvm/trunk/tools/Makefile Modified: llvm/trunk/tools/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/Makefile?rev=47783&r1=47782&r2=47783&view=diff ============================================================================== --- llvm/trunk/tools/Makefile (original) +++ llvm/trunk/tools/Makefile Sat Mar 1 01:36:30 2008 @@ -26,7 +26,7 @@ # only build new lto project on Darwin for now ifeq ($(OS),Darwin) -PARALLEL_DIRS += lto2 +#PARALLEL_DIRS += lto2 endif include $(LEVEL)/Makefile.common From tonic at nondot.org Sat Mar 1 01:38:40 2008 From: tonic at nondot.org (Tanya Lattner) Date: Sat, 01 Mar 2008 07:38:40 -0000 Subject: [llvm-commits] [llvm] r47784 - /llvm/trunk/test/Feature/ Message-ID: <200803010738.m217cfTO015717@zion.cs.uiuc.edu> Author: tbrethou Date: Sat Mar 1 01:38:40 2008 New Revision: 47784 URL: http://llvm.org/viewvc/llvm-project?rev=47784&view=rev Log: Remove llvm-upgrade and update tests. Removed: llvm/trunk/test/Feature/globalredefinition2.ll Modified: llvm/trunk/test/Feature/alignment.ll llvm/trunk/test/Feature/basictest.ll llvm/trunk/test/Feature/callingconventions.ll llvm/trunk/test/Feature/calltest.ll llvm/trunk/test/Feature/casttest.ll llvm/trunk/test/Feature/cfgstructures.ll llvm/trunk/test/Feature/constexpr.ll llvm/trunk/test/Feature/constpointer.ll llvm/trunk/test/Feature/escaped_label.ll llvm/trunk/test/Feature/float.ll llvm/trunk/test/Feature/fold-fpcast.ll llvm/trunk/test/Feature/forwardreftest.ll llvm/trunk/test/Feature/global_section.ll llvm/trunk/test/Feature/globalredefinition.ll llvm/trunk/test/Feature/globalvars.ll llvm/trunk/test/Feature/indirectcall.ll llvm/trunk/test/Feature/indirectcall2.ll llvm/trunk/test/Feature/inlineasm.ll llvm/trunk/test/Feature/instructions.ll llvm/trunk/test/Feature/intrinsics.ll llvm/trunk/test/Feature/opaquetypes.ll llvm/trunk/test/Feature/packed.ll llvm/trunk/test/Feature/properties.ll llvm/trunk/test/Feature/prototype.ll llvm/trunk/test/Feature/recursivetype.ll llvm/trunk/test/Feature/simplecalltest.ll llvm/trunk/test/Feature/small.ll llvm/trunk/test/Feature/smallest.ll llvm/trunk/test/Feature/testalloca.ll llvm/trunk/test/Feature/testconstants.ll llvm/trunk/test/Feature/testlogical.ll llvm/trunk/test/Feature/testmemory.ll llvm/trunk/test/Feature/testswitch.ll llvm/trunk/test/Feature/testvarargs.ll llvm/trunk/test/Feature/undefined.ll llvm/trunk/test/Feature/unreachable.ll llvm/trunk/test/Feature/varargs.ll llvm/trunk/test/Feature/varargs_new.ll llvm/trunk/test/Feature/weirdnames.ll Modified: llvm/trunk/test/Feature/alignment.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Feature/alignment.ll?rev=47784&r1=47783&r2=47784&view=diff ============================================================================== --- llvm/trunk/test/Feature/alignment.ll (original) +++ llvm/trunk/test/Feature/alignment.ll Sat Mar 1 01:38:40 2008 @@ -1,20 +1,21 @@ -; RUN: llvm-upgrade < %s | llvm-as | llvm-dis > %t1.ll +; RUN: llvm-as < %s | llvm-dis > %t1.ll ; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll ; RUN: diff %t1.ll %t2.ll -%X = global int 4, align 16 + at X = global i32 4, align 16 ; [#uses=0] -int *%test() align 32 { - %X = alloca int, align 4 - %Y = alloca int, uint 42, align 16 - %Z = alloca int, align 0 - ret int *%X +define i32* @test() align 32 { + %X = alloca i32, align 4 ; [#uses=1] + %Y = alloca i32, i32 42, align 16 ; [#uses=0] + %Z = alloca i32 ; [#uses=0] + ret i32* %X } -int *%test2() { - %X = malloc int, align 4 - %Y = malloc int, uint 42, align 16 - %Z = malloc int, align 0 - %T = malloc int, align 256 - ret int *%X +define i32* @test2() { + %X = malloc i32, align 4 ; [#uses=1] + %Y = malloc i32, i32 42, align 16 ; [#uses=0] + %Z = malloc i32 ; [#uses=0] + %T = malloc i32, align 256 ; [#uses=0] + ret i32* %X } + Modified: llvm/trunk/test/Feature/basictest.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Feature/basictest.ll?rev=47784&r1=47783&r2=47784&view=diff ============================================================================== --- llvm/trunk/test/Feature/basictest.ll (original) +++ llvm/trunk/test/Feature/basictest.ll Sat Mar 1 01:38:40 2008 @@ -1,32 +1,31 @@ -; RUN: llvm-upgrade < %s | llvm-as | llvm-dis > %t1.ll +; RUN: llvm-as < %s | llvm-dis > %t1.ll ; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll ; RUN: diff %t1.ll %t2.ll -implementation - ; Test "stripped" format where nothing is symbolic... this is how the bytecode ; format looks anyways (except for negative vs positive offsets)... ; -void "void"(int, int) ; Def %0, %1 -begin - add int 0, 0 ; Def 2 - sub int 0, 4 ; Def 3 - br label %1 - add int %0, %1 ; Def 4 - sub int %4, %3 ; Def 5 - setle int %5, %2 ; Def 0 - bool plane - br bool %0, label %2, label %1 +define void @void(i32, i32) { + add i32 0, 0 ; :3 [#uses=2] + sub i32 0, 4 ; :4 [#uses=2] + br label %5 + +;