From romix.llvm at googlemail.com Mon Mar 3 05:05:57 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Mon, 3 Mar 2008 12:05:57 +0100 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> <200802291429.22322.dag@cray.com> Message-ID: Hi, 2008/3/1, Evan Cheng : > Let's try to solve one problem at a time. > > 1. Roman's depth / height patch calculation is obviously goodness. > Please commit that first. Please find attached the patch for depth/height calculation. All of the proposed improvements from the review by Evan and Dan are incorporated. Please have a look at it, and if it is OK, I'll submit. -Roman -------------- next part -------------- A non-text attachment was scrubbed... Name: ScheduleDAG.patch Type: text/x-diff Size: 4828 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080303/d1646650/attachment.bin From romix.llvm at googlemail.com Mon Mar 3 05:06:46 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Mon, 3 Mar 2008 12:06:46 +0100 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> <200802291429.22322.dag@cray.com> Message-ID: Hi, 2008/3/1, Evan Cheng : > Let's try to solve one problem at a time. > > 1. Roman's depth / height patch calculation is obviously goodness. > Please commit that first. Here is the patch for ScheduleDAGList.cpp: computing priorities using a linear algorithm. It uses the same idea as the height/depth computation, i.e. dynamic programming. I took into account all comments from Dan & Evan from last review. Additionally, I use now std::set instead of a priority queue. The results are exactly the same as with the current SVN version - I really compared it side-by-side during execution. Using std::set makes operations such as removal from the middle of the queue much faster and removes a bottleneck. Scheduling of very bigs BBs is now up to 3-4 times faster. Please, review this new version, if it is OK for submission. And there is one more patch to come, for the ScheduleDAGRRList.cpp, which would also use std::set instead of priority queues, introduce strict ordering and contain queue update changes as David suggested. -Roman -------------- next part -------------- A non-text attachment was scrubbed... Name: ScheduleDAGList.patch Type: text/x-diff Size: 5113 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080303/66404d47/attachment.bin From dag at cray.com Mon Mar 3 10:52:59 2008 From: dag at cray.com (David Greene) Date: Mon, 3 Mar 2008 10:52:59 -0600 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: Message-ID: <200803031053.00270.dag@cray.com> On Friday 29 February 2008 17:49, Evan Cheng wrote: > Let's try to solve one problem at a time. > > 1. Roman's depth / height patch calculation is obviously goodness. > Please commit that first. > 2. It's probably safe to eliminate the "special tie-breaker" from top > down sorting function. > 3. We will need to fix up the sorting functions so strict ordering is > preserved. We need to do so without breaking any of the existing test > case. "return left->NodeNum < right->NodeNum;" doesn't. :-( What does > "return false" mean? Is it favoring nodes that are inserted earlier? > 4. It might be wise to add some debugging code so we can tell where > things start diverge. > 5. It would be nice to be able to rebalance the heap. Roman and David > can fight it out when we get to that point. :-) Sounds good. I don't know what "fight it out" means, however. :) It's more than "nice" to rebalance the heap. It's necessary if we want to avoid traps when _GLIBCXX_DEBUG is enabled. And we want to do that because it finds lots of bugs. -Dave From romix.llvm at googlemail.com Mon Mar 3 11:18:51 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Mon, 3 Mar 2008 18:18:51 +0100 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <200803031053.00270.dag@cray.com> References: <200803031053.00270.dag@cray.com> Message-ID: Hi Dave, 2008/3/3, David Greene : > On Friday 29 February 2008 17:49, Evan Cheng wrote: > > Let's try to solve one problem at a time. > > > > 1. Roman's depth / height patch calculation is obviously goodness. > > Please commit that first. > > 2. It's probably safe to eliminate the "special tie-breaker" from top > > down sorting function. > > 3. We will need to fix up the sorting functions so strict ordering is > > preserved. We need to do so without breaking any of the existing test > > case. "return left->NodeNum < right->NodeNum;" doesn't. :-( What does > > "return false" mean? Is it favoring nodes that are inserted earlier? > > 4. It might be wise to add some debugging code so we can tell where > > things start diverge. > > 5. It would be nice to be able to rebalance the heap. Roman and David > > can fight it out when we get to that point. :-) > > > Sounds good. I don't know what "fight it out" means, however. :) Me either ;) > It's more than "nice" to rebalance the heap. It's necessary if we > want to avoid traps when _GLIBCXX_DEBUG is enabled. And we > want to do that because it finds lots of bugs. Totally agree. Here is a proposed patch for ScheduleDAGRRList.cpp. It contains the following changes: 1) Uses std::set instead of the priority queue. This makes removal of nodes very fast and removes a bottleneck 2) sorting functions use now strict ordering 3) According to your proposal, it takes node priority updates into account and updates the priority queue by removing and re-inserting the updated element. 4) SumOfUnscheduledPredsOfSuccs is slightly changed to avoid useless computations. This saves a LOT OF time on big basic blocks. Please review and test, if possible. I have problems with running the llvm-test test-suite. When I to run it (and keep in mind, I never did it before), I always get the following error messages on my X86/Ubuntu system: make[4]: *** No rule to make target `Output/sse.expandfft.linked.rbc', needed by `Output/sse.expandfft.linked.bc'. Stop. -Roman -------------- next part -------------- A non-text attachment was scrubbed... Name: ScheduleDAGRRList.patch Type: text/x-diff Size: 4571 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080303/bae9ca5c/attachment.bin From tonic at nondot.org Mon Mar 3 11:32:40 2008 From: tonic at nondot.org (Tanya Lattner) Date: Mon, 03 Mar 2008 17:32:40 -0000 Subject: [llvm-commits] [llvm] r47845 - /llvm/trunk/tools/Makefile Message-ID: <200803031732.m23HWePC004163@zion.cs.uiuc.edu> Author: tbrethou Date: Mon Mar 3 11:32:40 2008 New Revision: 47845 URL: http://llvm.org/viewvc/llvm-project?rev=47845&view=rev Log: Renable lto2 build. Modified: llvm/trunk/tools/Makefile Modified: llvm/trunk/tools/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/Makefile?rev=47845&r1=47844&r2=47845&view=diff ============================================================================== --- llvm/trunk/tools/Makefile (original) +++ llvm/trunk/tools/Makefile Mon Mar 3 11:32:40 2008 @@ -26,7 +26,7 @@ # only build new lto project on Darwin for now ifeq ($(OS),Darwin) -#PARALLEL_DIRS += lto2 +PARALLEL_DIRS += lto2 endif include $(LEVEL)/Makefile.common From dag at cray.com Mon Mar 3 11:48:51 2008 From: dag at cray.com (David Greene) Date: Mon, 3 Mar 2008 11:48:51 -0600 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <200803031053.00270.dag@cray.com> Message-ID: <200803031148.51509.dag@cray.com> On Monday 03 March 2008 11:18, Roman Levenstein wrote: > Here is a proposed patch for ScheduleDAGRRList.cpp. It contains the > following changes: > 1) Uses std::set instead of the priority queue. This makes removal of > nodes very fast and removes a bottleneck > 2) sorting functions use now strict ordering > 3) According to your proposal, it takes node priority updates into > account and updates the priority queue by removing and re-inserting > the updated element. > 4) SumOfUnscheduledPredsOfSuccs is slightly changed to avoid useless > computations. This saves a LOT OF time on big basic blocks. > > Please review and test, if possible. I have problems with running the I'm building and running tests with it right now. The patch is goodness. It avoids the clumsy and esoteric container_reference_wrapper and that alone makes it superior to my solution. If it speeds everything up as well, it's a no brainer to apply it assuming it passes testing. -Dave From lattner at apple.com Mon Mar 3 11:53:14 2008 From: lattner at apple.com (Tanya Lattner) Date: Mon, 3 Mar 2008 09:53:14 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <200803031053.00270.dag@cray.com> Message-ID: > Totally agree. > > Here is a proposed patch for ScheduleDAGRRList.cpp. It contains the > following changes: > 1) Uses std::set instead of the priority queue. This makes removal of > nodes very fast and removes a bottleneck > 2) sorting functions use now strict ordering > 3) According to your proposal, it takes node priority updates into > account and updates the priority queue by removing and re-inserting > the updated element. > 4) SumOfUnscheduledPredsOfSuccs is slightly changed to avoid useless > computations. This saves a LOT OF time on big basic blocks. > > Please review and test, if possible. I have problems with running the > llvm-test test-suite. When I to run it (and keep in mind, I never did > it before), I always get the following error messages on my X86/Ubuntu > system: > make[4]: *** No rule to make target > `Output/sse.expandfft.linked.rbc', needed by > `Output/sse.expandfft.linked.bc'. Stop. > > Please keep in mind that all proposed patches should have been tested before submitting. This includes llvm-test and 'make check'. http://llvm.org/docs/DeveloperPolicy.html#quality This will make Evan's job easier ;) As for the error in llvm-test that you are seeing, can you use 'make VERBOSE=1 TEST=nightly report' and post more details on what make is running? It looks like an error in configuration. Did you reconfigure once you set llvm-gcc path? Thanks, Tanya -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080303/c9452d9b/attachment.html From gohman at apple.com Mon Mar 3 11:58:42 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 3 Mar 2008 09:58:42 -0800 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> <200802291429.22322.dag@cray.com> Message-ID: Hi Roman, Just one comment on this patch from me; in this change: > SUnit *pop() { > if (empty()) return NULL; > - SUnit *V = Queue.top(); > - Queue.pop(); > + SUnit *V = *Queue.rbegin(); > + Queue.erase(V); > return V; > } The erase call here uses the "key" form of erase, so it incurs a lookup. This can can be avoided by using the iterator form, something like this: set::iterator i = prior(Queue.end()); SUnit *V = *i; Queue.erase(i); Dan On Mar 3, 2008, at 3:06 AM, Roman Levenstein wrote: > Hi, > > > 2008/3/1, Evan Cheng : > >> Let's try to solve one problem at a time. >> >> 1. Roman's depth / height patch calculation is obviously goodness. >> Please commit that first. > > > Here is the patch for ScheduleDAGList.cpp: computing priorities using > a linear algorithm. It uses the same idea as the height/depth > computation, i.e. dynamic programming. I took into account all > comments from Dan & Evan from last review. > > Additionally, I use now std::set instead of a priority queue. The > results are exactly the same as with the current SVN version - I > really compared it side-by-side during execution. Using std::set makes > operations such as removal from the middle of the queue much faster > and removes a bottleneck. Scheduling of very bigs BBs is now up to 3-4 > times faster. > > Please, review this new version, if it is OK for submission. > > And there is one more patch to come, for the ScheduleDAGRRList.cpp, > which would also use std::set instead of priority queues, introduce > strict ordering and contain queue update changes as David suggested. > > -Roman > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From lauro.venancio at gmail.com Mon Mar 3 12:24:36 2008 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Mon, 03 Mar 2008 18:24:36 -0000 Subject: [llvm-commits] [test-suite] r47846 - /test-suite/trunk/RunSafely.sh Message-ID: <200803031824.m23IOaac005910@zion.cs.uiuc.edu> Author: laurov Date: Mon Mar 3 12:24:36 2008 New Revision: 47846 URL: http://llvm.org/viewvc/llvm-project?rev=47846&view=rev Log: Fix remote tests on Linux. Modified: test-suite/trunk/RunSafely.sh Modified: test-suite/trunk/RunSafely.sh URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/RunSafely.sh?rev=47846&r1=47845&r2=47846&view=diff ============================================================================== --- test-suite/trunk/RunSafely.sh (original) +++ test-suite/trunk/RunSafely.sh Mon Mar 3 12:24:36 2008 @@ -99,7 +99,7 @@ # necessary I/O redirection. # PWD=`pwd` -COMMAND="$PROGRAM $*" +COMMAND="$PWD/$PROGRAM $*" if [ "$SYSTEM" = "Darwin" ]; then COMMAND="${DIR}TimedExec.sh $ULIMIT $PWD $COMMAND" fi From dpatel at apple.com Mon Mar 3 12:36:03 2008 From: dpatel at apple.com (Devang Patel) Date: Mon, 03 Mar 2008 18:36:03 -0000 Subject: [llvm-commits] [llvm] r47847 - /llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Message-ID: <200803031836.m23Ia3c5006434@zion.cs.uiuc.edu> Author: dpatel Date: Mon Mar 3 12:36:03 2008 New Revision: 47847 URL: http://llvm.org/viewvc/llvm-project?rev=47847&view=rev Log: Preserve paramater attributes. Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp?rev=47847&r1=47846&r2=47847&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Mon Mar 3 12:36:03 2008 @@ -17,6 +17,7 @@ #include "llvm/Module.h" #include "llvm/CallGraphSCCPass.h" #include "llvm/Instructions.h" +#include "llvm/ParamAttrsList.h" #include "llvm/Analysis/CallGraph.h" #include "llvm/Support/CallSite.h" #include "llvm/Support/CFG.h" @@ -181,21 +182,34 @@ Function *SRETPromotion::cloneFunctionBody(Function *F, const StructType *STy) { - // FIXME : Do not drop param attributes on the floor. const FunctionType *FTy = F->getFunctionType(); std::vector Params; + // ParamAttrs - Keep track of the parameter attributes for the arguments. + ParamAttrsVector ParamAttrsVec; + const ParamAttrsList *PAL = F->getParamAttrs(); + + // Add any return attributes. + if (ParameterAttributes attrs = PAL ? PAL->getParamAttrs(0) : ParamAttr::None) + ParamAttrsVec.push_back(ParamAttrsWithIndex::get(0, attrs)); + // Skip first argument. Function::arg_iterator I = F->arg_begin(), E = F->arg_end(); ++I; + unsigned ParamIndex = 1; // 0th parameter attribute is reserved for return type. while (I != E) { Params.push_back(I->getType()); + if (ParameterAttributes attrs = PAL ? PAL->getParamAttrs(ParamIndex) : + ParamAttr::None) + ParamAttrsVec.push_back(ParamAttrsWithIndex::get(Params.size(), attrs)); ++I; + ++ParamIndex; } FunctionType *NFTy = FunctionType::get(STy, Params, FTy->isVarArg()); Function *NF = new Function(NFTy, F->getLinkage(), F->getName()); NF->setCallingConv(F->getCallingConv()); + NF->setParamAttrs(ParamAttrsList::get(ParamAttrsVec)); F->getParent()->getFunctionList().insert(F, NF); NF->getBasicBlockList().splice(NF->begin(), F->getBasicBlockList()); @@ -217,20 +231,32 @@ /// updateCallSites - Update all sites that call F to use NF. void SRETPromotion::updateCallSites(Function *F, Function *NF) { - // FIXME : Handle parameter attributes SmallVector Args; + // ParamAttrs - Keep track of the parameter attributes for the arguments. + ParamAttrsVector ParamAttrsVec; + for (Value::use_iterator FUI = F->use_begin(), FUE = F->use_end(); FUI != FUE;) { CallSite CS = CallSite::get(*FUI); ++FUI; Instruction *Call = CS.getInstruction(); + const ParamAttrsList *PAL = F->getParamAttrs(); + // Add any return attributes. + if (ParameterAttributes attrs = PAL ? PAL->getParamAttrs(0) : ParamAttr::None) + ParamAttrsVec.push_back(ParamAttrsWithIndex::get(0, attrs)); + // Copy arguments, however skip first one. CallSite::arg_iterator AI = CS.arg_begin(), AE = CS.arg_end(); Value *FirstCArg = *AI; ++AI; + unsigned ParamIndex = 1; // 0th parameter attribute is reserved for return type. while (AI != AE) { Args.push_back(*AI); + if (ParameterAttributes Attrs = PAL ? PAL->getParamAttrs(ParamIndex) : + ParamAttr::None) + ParamAttrsVec.push_back(ParamAttrsWithIndex::get(Args.size(), Attrs)); + ++ParamIndex; ++AI; } @@ -240,13 +266,16 @@ New = new InvokeInst(NF, II->getNormalDest(), II->getUnwindDest(), Args.begin(), Args.end(), "", Call); cast(New)->setCallingConv(CS.getCallingConv()); + cast(New)->setParamAttrs(ParamAttrsList::get(ParamAttrsVec)); } else { New = new CallInst(NF, Args.begin(), Args.end(), "", Call); cast(New)->setCallingConv(CS.getCallingConv()); + cast(New)->setParamAttrs(ParamAttrsList::get(ParamAttrsVec)); if (cast(Call)->isTailCall()) cast(New)->setTailCall(); } Args.clear(); + ParamAttrsVec.clear(); New->takeName(Call); // Update all users of sret parameter to extract value using getresult. From dpatel at apple.com Mon Mar 3 12:58:16 2008 From: dpatel at apple.com (Devang Patel) Date: Mon, 03 Mar 2008 18:58:16 -0000 Subject: [llvm-commits] [llvm] r47848 - in /llvm/trunk/lib/VMCore: Function.cpp Verifier.cpp Message-ID: <200803031858.m23IwGpW007057@zion.cs.uiuc.edu> Author: dpatel Date: Mon Mar 3 12:58:16 2008 New Revision: 47848 URL: http://llvm.org/viewvc/llvm-project?rev=47848&view=rev Log: If a function uses multive values in ret instruction then it is returning a struct value. Modified: llvm/trunk/lib/VMCore/Function.cpp llvm/trunk/lib/VMCore/Verifier.cpp Modified: llvm/trunk/lib/VMCore/Function.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Function.cpp?rev=47848&r1=47847&r2=47848&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Function.cpp (original) +++ llvm/trunk/lib/VMCore/Function.cpp Mon Mar 3 12:58:16 2008 @@ -170,7 +170,8 @@ /// @brief Determine if the function returns a structure. bool Function::isStructReturn() const { - return paramHasAttr(1, ParamAttr::StructRet); + return paramHasAttr(1, ParamAttr::StructRet) + || isa(getReturnType()); } //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=47848&r1=47847&r2=47848&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Mon Mar 3 12:58:16 2008 @@ -455,9 +455,6 @@ isa(F.getReturnType()), "Functions cannot return aggregate values!", &F); - Assert1(!F.isStructReturn() || FT->getReturnType() == Type::VoidTy, - "Invalid struct-return function!", &F); - const ParamAttrsList *Attrs = F.getParamAttrs(); Assert1(!Attrs || From dpatel at apple.com Mon Mar 3 12:58:47 2008 From: dpatel at apple.com (Devang Patel) Date: Mon, 03 Mar 2008 18:58:47 -0000 Subject: [llvm-commits] [llvm] r47849 - in /llvm/trunk/lib/AsmParser: llvmAsmParser.cpp.cvs llvmAsmParser.h.cvs llvmAsmParser.y.cvs Message-ID: <200803031858.m23IwlsV007089@zion.cs.uiuc.edu> Author: dpatel Date: Mon Mar 3 12:58:47 2008 New Revision: 47849 URL: http://llvm.org/viewvc/llvm-project?rev=47849&view=rev Log: regenerate. Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs?rev=47849&r1=47848&r2=47849&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs Mon Mar 3 12:58:47 2008 @@ -139,89 +139,90 @@ X86_STDCALLCC_TOK = 320, X86_FASTCALLCC_TOK = 321, DATALAYOUT = 322, - RET = 323, - BR = 324, - SWITCH = 325, - INVOKE = 326, - UNWIND = 327, - UNREACHABLE = 328, - ADD = 329, - SUB = 330, - MUL = 331, - UDIV = 332, - SDIV = 333, - FDIV = 334, - UREM = 335, - SREM = 336, - FREM = 337, - AND = 338, - OR = 339, - XOR = 340, - SHL = 341, - LSHR = 342, - ASHR = 343, - ICMP = 344, - FCMP = 345, - EQ = 346, - NE = 347, - SLT = 348, - SGT = 349, - SLE = 350, - SGE = 351, - ULT = 352, - UGT = 353, - ULE = 354, - UGE = 355, - OEQ = 356, - ONE = 357, - OLT = 358, - OGT = 359, - OLE = 360, - OGE = 361, - ORD = 362, - UNO = 363, - UEQ = 364, - UNE = 365, - MALLOC = 366, - ALLOCA = 367, - FREE = 368, - LOAD = 369, - STORE = 370, - GETELEMENTPTR = 371, - TRUNC = 372, - ZEXT = 373, - SEXT = 374, - FPTRUNC = 375, - FPEXT = 376, - BITCAST = 377, - UITOFP = 378, - SITOFP = 379, - FPTOUI = 380, - FPTOSI = 381, - INTTOPTR = 382, - PTRTOINT = 383, - PHI_TOK = 384, - SELECT = 385, - VAARG = 386, - EXTRACTELEMENT = 387, - INSERTELEMENT = 388, - SHUFFLEVECTOR = 389, - GETRESULT = 390, - SIGNEXT = 391, - ZEROEXT = 392, - NORETURN = 393, - INREG = 394, - SRET = 395, - NOUNWIND = 396, - NOALIAS = 397, - BYVAL = 398, - NEST = 399, - READNONE = 400, - READONLY = 401, - GC = 402, - DEFAULT = 403, - HIDDEN = 404, - PROTECTED = 405 + UNWIND_TO = 323, + RET = 324, + BR = 325, + SWITCH = 326, + INVOKE = 327, + UNWIND = 328, + UNREACHABLE = 329, + ADD = 330, + SUB = 331, + MUL = 332, + UDIV = 333, + SDIV = 334, + FDIV = 335, + UREM = 336, + SREM = 337, + FREM = 338, + AND = 339, + OR = 340, + XOR = 341, + SHL = 342, + LSHR = 343, + ASHR = 344, + ICMP = 345, + FCMP = 346, + EQ = 347, + NE = 348, + SLT = 349, + SGT = 350, + SLE = 351, + SGE = 352, + ULT = 353, + UGT = 354, + ULE = 355, + UGE = 356, + OEQ = 357, + ONE = 358, + OLT = 359, + OGT = 360, + OLE = 361, + OGE = 362, + ORD = 363, + UNO = 364, + UEQ = 365, + UNE = 366, + MALLOC = 367, + ALLOCA = 368, + FREE = 369, + LOAD = 370, + STORE = 371, + GETELEMENTPTR = 372, + TRUNC = 373, + ZEXT = 374, + SEXT = 375, + FPTRUNC = 376, + FPEXT = 377, + BITCAST = 378, + UITOFP = 379, + SITOFP = 380, + FPTOUI = 381, + FPTOSI = 382, + INTTOPTR = 383, + PTRTOINT = 384, + PHI_TOK = 385, + SELECT = 386, + VAARG = 387, + EXTRACTELEMENT = 388, + INSERTELEMENT = 389, + SHUFFLEVECTOR = 390, + GETRESULT = 391, + SIGNEXT = 392, + ZEROEXT = 393, + NORETURN = 394, + INREG = 395, + SRET = 396, + NOUNWIND = 397, + NOALIAS = 398, + BYVAL = 399, + NEST = 400, + READNONE = 401, + READONLY = 402, + GC = 403, + DEFAULT = 404, + HIDDEN = 405, + PROTECTED = 406 }; #endif /* Tokens. */ @@ -290,89 +291,90 @@ #define X86_STDCALLCC_TOK 320 #define X86_FASTCALLCC_TOK 321 #define DATALAYOUT 322 -#define RET 323 -#define BR 324 -#define SWITCH 325 -#define INVOKE 326 -#define UNWIND 327 -#define UNREACHABLE 328 -#define ADD 329 -#define SUB 330 -#define MUL 331 -#define UDIV 332 -#define SDIV 333 -#define FDIV 334 -#define UREM 335 -#define SREM 336 -#define FREM 337 -#define AND 338 -#define OR 339 -#define XOR 340 -#define SHL 341 -#define LSHR 342 -#define ASHR 343 -#define ICMP 344 -#define FCMP 345 -#define EQ 346 -#define NE 347 -#define SLT 348 -#define SGT 349 -#define SLE 350 -#define SGE 351 -#define ULT 352 -#define UGT 353 -#define ULE 354 -#define UGE 355 -#define OEQ 356 -#define ONE 357 -#define OLT 358 -#define OGT 359 -#define OLE 360 -#define OGE 361 -#define ORD 362 -#define UNO 363 -#define UEQ 364 -#define UNE 365 -#define MALLOC 366 -#define ALLOCA 367 -#define FREE 368 -#define LOAD 369 -#define STORE 370 -#define GETELEMENTPTR 371 -#define TRUNC 372 -#define ZEXT 373 -#define SEXT 374 -#define FPTRUNC 375 -#define FPEXT 376 -#define BITCAST 377 -#define UITOFP 378 -#define SITOFP 379 -#define FPTOUI 380 -#define FPTOSI 381 -#define INTTOPTR 382 -#define PTRTOINT 383 -#define PHI_TOK 384 -#define SELECT 385 -#define VAARG 386 -#define EXTRACTELEMENT 387 -#define INSERTELEMENT 388 -#define SHUFFLEVECTOR 389 -#define GETRESULT 390 -#define SIGNEXT 391 -#define ZEROEXT 392 -#define NORETURN 393 -#define INREG 394 -#define SRET 395 -#define NOUNWIND 396 -#define NOALIAS 397 -#define BYVAL 398 -#define NEST 399 -#define READNONE 400 -#define READONLY 401 -#define GC 402 -#define DEFAULT 403 -#define HIDDEN 404 -#define PROTECTED 405 +#define UNWIND_TO 323 +#define RET 324 +#define BR 325 +#define SWITCH 326 +#define INVOKE 327 +#define UNWIND 328 +#define UNREACHABLE 329 +#define ADD 330 +#define SUB 331 +#define MUL 332 +#define UDIV 333 +#define SDIV 334 +#define FDIV 335 +#define UREM 336 +#define SREM 337 +#define FREM 338 +#define AND 339 +#define OR 340 +#define XOR 341 +#define SHL 342 +#define LSHR 343 +#define ASHR 344 +#define ICMP 345 +#define FCMP 346 +#define EQ 347 +#define NE 348 +#define SLT 349 +#define SGT 350 +#define SLE 351 +#define SGE 352 +#define ULT 353 +#define UGT 354 +#define ULE 355 +#define UGE 356 +#define OEQ 357 +#define ONE 358 +#define OLT 359 +#define OGT 360 +#define OLE 361 +#define OGE 362 +#define ORD 363 +#define UNO 364 +#define UEQ 365 +#define UNE 366 +#define MALLOC 367 +#define ALLOCA 368 +#define FREE 369 +#define LOAD 370 +#define STORE 371 +#define GETELEMENTPTR 372 +#define TRUNC 373 +#define ZEXT 374 +#define SEXT 375 +#define FPTRUNC 376 +#define FPEXT 377 +#define BITCAST 378 +#define UITOFP 379 +#define SITOFP 380 +#define FPTOUI 381 +#define FPTOSI 382 +#define INTTOPTR 383 +#define PTRTOINT 384 +#define PHI_TOK 385 +#define SELECT 386 +#define VAARG 387 +#define EXTRACTELEMENT 388 +#define INSERTELEMENT 389 +#define SHUFFLEVECTOR 390 +#define GETRESULT 391 +#define SIGNEXT 392 +#define ZEROEXT 393 +#define NORETURN 394 +#define INREG 395 +#define SRET 396 +#define NOUNWIND 397 +#define NOALIAS 398 +#define BYVAL 399 +#define NEST 400 +#define READNONE 401 +#define READONLY 402 +#define GC 403 +#define DEFAULT 404 +#define HIDDEN 405 +#define PROTECTED 406 @@ -886,7 +888,7 @@ /// defineBBVal - This is a definition of a new basic block with the specified /// identifier which must be the same as CurFun.NextValNum, if its numeric. -static BasicBlock *defineBBVal(const ValID &ID) { +static BasicBlock *defineBBVal(const ValID &ID, BasicBlock *unwindDest) { assert(inFunctionScope() && "Can't get basic block at global scope!"); BasicBlock *BB = 0; @@ -916,21 +918,19 @@ assert(ID.Num == CurFun.NextValNum && "Invalid new block number"); InsertValue(BB); } - - ID.destroy(); - return BB; - } - - // We haven't seen this BB before and its first mention is a definition. - // Just create it and return it. - std::string Name (ID.Type == ValID::LocalName ? ID.getName() : ""); - BB = new BasicBlock(Name, CurFun.CurrentFunction); - if (ID.Type == ValID::LocalID) { - assert(ID.Num == CurFun.NextValNum && "Invalid new block number"); - InsertValue(BB); + } else { + // We haven't seen this BB before and its first mention is a definition. + // Just create it and return it. + std::string Name (ID.Type == ValID::LocalName ? ID.getName() : ""); + BB = new BasicBlock(Name, CurFun.CurrentFunction); + if (ID.Type == ValID::LocalID) { + assert(ID.Num == CurFun.NextValNum && "Invalid new block number"); + InsertValue(BB); + } } - ID.destroy(); // Free strdup'd memory + ID.destroy(); + BB->setUnwindDest(unwindDest); return BB; } @@ -1338,7 +1338,7 @@ #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED typedef union YYSTYPE -#line 953 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 951 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { llvm::Module *ModuleVal; llvm::Function *FunctionVal; @@ -1614,20 +1614,20 @@ /* YYFINAL -- State number of the termination state. */ #define YYFINAL 43 /* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 1978 +#define YYLAST 2038 /* YYNTOKENS -- Number of terminals. */ -#define YYNTOKENS 165 +#define YYNTOKENS 166 /* YYNNTS -- Number of nonterminals. */ #define YYNNTS 85 /* YYNRULES -- Number of rules. */ -#define YYNRULES 322 +#define YYNRULES 324 /* YYNRULES -- Number of states. */ -#define YYNSTATES 629 +#define YYNSTATES 633 /* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ #define YYUNDEFTOK 2 -#define YYMAXUTOK 405 +#define YYMAXUTOK 406 #define YYTRANSLATE(YYX) \ ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) @@ -1639,15 +1639,15 @@ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 151, 152, 155, 2, 154, 2, 2, 2, 2, 2, + 152, 153, 156, 2, 155, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 160, 153, 161, 2, 2, 2, 2, 2, 2, 2, + 161, 154, 162, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 157, 156, 159, 2, 2, 2, 2, 2, 164, + 2, 158, 157, 160, 2, 2, 2, 2, 2, 165, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 158, 2, 2, 162, 2, 163, 2, 2, 2, 2, + 159, 2, 2, 163, 2, 164, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, @@ -1675,7 +1675,7 @@ 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, - 145, 146, 147, 148, 149, 150 + 145, 146, 147, 148, 149, 150, 151 }; #if YYDEBUG @@ -1710,157 +1710,158 @@ 664, 675, 677, 679, 684, 686, 688, 691, 695, 696, 698, 700, 702, 704, 706, 708, 710, 712, 714, 718, 720, 726, 728, 730, 732, 734, 736, 738, 741, 743, - 747, 750, 753, 757, 760, 761, 763, 766, 769, 773, - 783, 793, 802, 817, 819, 821, 828, 834, 837, 844, - 852, 857, 862, 869, 876, 877, 878, 882, 885, 887, - 893, 899, 906, 913, 918, 925, 930, 935, 942, 949, - 952, 961, 963, 965, 966, 970, 977, 981, 988, 991, - 997, 1005, 1011 + 747, 750, 753, 757, 760, 761, 764, 766, 770, 773, + 776, 780, 790, 800, 809, 824, 826, 828, 835, 841, + 844, 851, 859, 864, 869, 876, 883, 884, 885, 889, + 892, 894, 900, 906, 913, 920, 925, 932, 937, 942, + 949, 956, 959, 968, 970, 972, 973, 977, 984, 988, + 995, 998, 1004, 1012, 1018 }; /* YYRHS -- A `-1'-separated list of the rules' RHS. */ static const yytype_int16 yyrhs[] = { - 211, 0, -1, 74, -1, 75, -1, 76, -1, 77, - -1, 78, -1, 79, -1, 80, -1, 81, -1, 82, - -1, 86, -1, 87, -1, 88, -1, 83, -1, 84, - -1, 85, -1, 117, -1, 118, -1, 119, -1, 120, - -1, 121, -1, 122, -1, 123, -1, 124, -1, 125, - -1, 126, -1, 127, -1, 128, -1, 91, -1, 92, - -1, 93, -1, 94, -1, 95, -1, 96, -1, 97, - -1, 98, -1, 99, -1, 100, -1, 101, -1, 102, - -1, 103, -1, 104, -1, 105, -1, 106, -1, 107, - -1, 108, -1, 109, -1, 110, -1, 97, -1, 98, - -1, 99, -1, 100, -1, 26, -1, 27, -1, 11, + 212, 0, -1, 75, -1, 76, -1, 77, -1, 78, + -1, 79, -1, 80, -1, 81, -1, 82, -1, 83, + -1, 87, -1, 88, -1, 89, -1, 84, -1, 85, + -1, 86, -1, 118, -1, 119, -1, 120, -1, 121, + -1, 122, -1, 123, -1, 124, -1, 125, -1, 126, + -1, 127, -1, 128, -1, 129, -1, 92, -1, 93, + -1, 94, -1, 95, -1, 96, -1, 97, -1, 98, + -1, 99, -1, 100, -1, 101, -1, 102, -1, 103, + -1, 104, -1, 105, -1, 106, -1, 107, -1, 108, + -1, 109, -1, 110, -1, 111, -1, 98, -1, 99, + -1, 100, -1, 101, -1, 26, -1, 27, -1, 11, -1, 12, -1, 13, -1, 16, -1, 15, -1, 14, - -1, 19, -1, 22, -1, 24, -1, 173, -1, -1, - 54, 151, 4, 152, -1, -1, 173, 153, -1, -1, - 20, -1, 23, -1, 179, -1, -1, 177, 153, -1, + -1, 19, -1, 22, -1, 24, -1, 174, -1, -1, + 54, 152, 4, 153, -1, -1, 174, 154, -1, -1, + 20, -1, 23, -1, 180, -1, -1, 178, 154, -1, 42, -1, 44, -1, 43, -1, 45, -1, 47, -1, - 46, -1, 48, -1, 50, -1, -1, 148, -1, 149, - -1, 150, -1, -1, 46, -1, 48, -1, -1, 42, + 46, -1, 48, -1, 50, -1, -1, 149, -1, 150, + -1, 151, -1, -1, 46, -1, 48, -1, -1, 42, -1, 43, -1, 44, -1, 47, -1, -1, 44, -1, 42, -1, -1, 62, -1, 63, -1, 64, -1, 65, - -1, 66, -1, 61, 4, -1, 137, -1, 118, -1, - 136, -1, 119, -1, 139, -1, 140, -1, 142, -1, - 143, -1, 144, -1, 53, 4, -1, -1, 188, 187, - -1, 138, -1, 141, -1, 137, -1, 136, -1, 145, - -1, 146, -1, -1, 190, 189, -1, -1, 147, 22, - -1, -1, 53, 4, -1, -1, 154, 53, 4, -1, - 34, 22, -1, -1, 194, -1, -1, 154, 197, 196, - -1, 194, -1, 53, 4, -1, 11, -1, 12, -1, + -1, 66, -1, 61, 4, -1, 138, -1, 119, -1, + 137, -1, 120, -1, 140, -1, 141, -1, 143, -1, + 144, -1, 145, -1, 53, 4, -1, -1, 189, 188, + -1, 139, -1, 142, -1, 138, -1, 137, -1, 146, + -1, 147, -1, -1, 191, 190, -1, -1, 148, 22, + -1, -1, 53, 4, -1, -1, 155, 53, 4, -1, + 34, 22, -1, -1, 195, -1, -1, 155, 198, 197, + -1, 195, -1, 53, 4, -1, 11, -1, 12, -1, 13, -1, 16, -1, 15, -1, 14, -1, 17, -1, - 49, -1, 198, -1, 199, 175, 155, -1, 233, -1, - 156, 4, -1, 199, 151, 203, 152, 190, -1, 10, - 151, 203, 152, 190, -1, 157, 4, 158, 199, 159, - -1, 160, 4, 158, 199, 161, -1, 162, 204, 163, - -1, 162, 163, -1, 160, 162, 204, 163, 161, -1, - 160, 162, 163, 161, -1, 199, 188, -1, 199, -1, - 10, -1, 200, -1, 202, 154, 200, -1, 202, -1, - 202, 154, 39, -1, 39, -1, -1, 199, -1, 204, - 154, 199, -1, 199, 157, 207, 159, -1, 199, 157, - 159, -1, 199, 164, 22, -1, 199, 160, 207, 161, - -1, 199, 162, 207, 163, -1, 199, 162, 163, -1, - 199, 160, 162, 207, 163, 161, -1, 199, 160, 162, - 163, 161, -1, 199, 40, -1, 199, 41, -1, 199, - 233, -1, 199, 206, -1, 199, 25, -1, 171, 3, - -1, 171, 5, -1, 171, 4, -1, 171, 6, -1, - 11, 26, -1, 11, 27, -1, 172, 9, -1, 168, - 151, 205, 38, 199, 152, -1, 116, 151, 205, 245, - 152, -1, 130, 151, 205, 154, 205, 154, 205, 152, - -1, 166, 151, 205, 154, 205, 152, -1, 167, 151, - 205, 154, 205, 152, -1, 89, 169, 151, 205, 154, - 205, 152, -1, 90, 170, 151, 205, 154, 205, 152, - -1, 132, 151, 205, 154, 205, 152, -1, 133, 151, - 205, 154, 205, 154, 205, 152, -1, 134, 151, 205, - 154, 205, 154, 205, 152, -1, 207, 154, 205, -1, - 205, -1, 32, -1, 33, -1, 37, -1, -1, 201, - 233, -1, 122, 151, 210, 38, 199, 152, -1, 212, - -1, -1, 213, -1, 212, 213, -1, -1, 31, 214, - 229, -1, -1, 30, 215, 230, -1, 59, 58, 219, - -1, 176, 18, 199, -1, 176, 18, 10, -1, -1, - 178, 182, 209, 208, 205, 175, 216, 196, -1, -1, - 178, 180, 182, 209, 208, 205, 175, 217, 196, -1, - -1, 178, 181, 182, 209, 208, 199, 175, 218, 196, - -1, 178, 182, 35, 185, 210, -1, 51, 220, -1, - 55, 153, 221, -1, 22, -1, 52, 153, 22, -1, - 67, 153, 22, -1, 157, 222, 159, -1, 222, 154, - 22, -1, 22, -1, -1, 223, 154, 199, 188, 174, - -1, 199, 188, 174, -1, 223, -1, 223, 154, 39, - -1, 39, -1, -1, 186, 201, 177, 151, 224, 152, - 190, 195, 192, 191, -1, 28, -1, 162, -1, 184, - 182, 225, 226, -1, 29, -1, 163, -1, 237, 228, - -1, 183, 182, 225, -1, -1, 60, -1, 3, -1, + 49, -1, 199, -1, 200, 176, 156, -1, 234, -1, + 157, 4, -1, 200, 152, 204, 153, 191, -1, 10, + 152, 204, 153, 191, -1, 158, 4, 159, 200, 160, + -1, 161, 4, 159, 200, 162, -1, 163, 205, 164, + -1, 163, 164, -1, 161, 163, 205, 164, 162, -1, + 161, 163, 164, 162, -1, 200, 189, -1, 200, -1, + 10, -1, 201, -1, 203, 155, 201, -1, 203, -1, + 203, 155, 39, -1, 39, -1, -1, 200, -1, 205, + 155, 200, -1, 200, 158, 208, 160, -1, 200, 158, + 160, -1, 200, 165, 22, -1, 200, 161, 208, 162, + -1, 200, 163, 208, 164, -1, 200, 163, 164, -1, + 200, 161, 163, 208, 164, 162, -1, 200, 161, 163, + 164, 162, -1, 200, 40, -1, 200, 41, -1, 200, + 234, -1, 200, 207, -1, 200, 25, -1, 172, 3, + -1, 172, 5, -1, 172, 4, -1, 172, 6, -1, + 11, 26, -1, 11, 27, -1, 173, 9, -1, 169, + 152, 206, 38, 200, 153, -1, 117, 152, 206, 246, + 153, -1, 131, 152, 206, 155, 206, 155, 206, 153, + -1, 167, 152, 206, 155, 206, 153, -1, 168, 152, + 206, 155, 206, 153, -1, 90, 170, 152, 206, 155, + 206, 153, -1, 91, 171, 152, 206, 155, 206, 153, + -1, 133, 152, 206, 155, 206, 153, -1, 134, 152, + 206, 155, 206, 155, 206, 153, -1, 135, 152, 206, + 155, 206, 155, 206, 153, -1, 208, 155, 206, -1, + 206, -1, 32, -1, 33, -1, 37, -1, -1, 202, + 234, -1, 123, 152, 211, 38, 200, 153, -1, 213, + -1, -1, 214, -1, 213, 214, -1, -1, 31, 215, + 230, -1, -1, 30, 216, 231, -1, 59, 58, 220, + -1, 177, 18, 200, -1, 177, 18, 10, -1, -1, + 179, 183, 210, 209, 206, 176, 217, 197, -1, -1, + 179, 181, 183, 210, 209, 206, 176, 218, 197, -1, + -1, 179, 182, 183, 210, 209, 200, 176, 219, 197, + -1, 179, 183, 35, 186, 211, -1, 51, 221, -1, + 55, 154, 222, -1, 22, -1, 52, 154, 22, -1, + 67, 154, 22, -1, 158, 223, 160, -1, 223, 155, + 22, -1, 22, -1, -1, 224, 155, 200, 189, 175, + -1, 200, 189, 175, -1, 224, -1, 224, 155, 39, + -1, 39, -1, -1, 187, 202, 178, 152, 225, 153, + 191, 196, 193, 192, -1, 28, -1, 163, -1, 185, + 183, 226, 227, -1, 29, -1, 164, -1, 238, 229, + -1, 184, 183, 226, -1, -1, 60, -1, 3, -1, 4, -1, 9, -1, 26, -1, 27, -1, 40, -1, - 41, -1, 25, -1, 160, 207, 161, -1, 206, -1, - 58, 231, 22, 154, 22, -1, 7, -1, 8, -1, - 173, -1, 177, -1, 233, -1, 232, -1, 199, 234, - -1, 235, -1, 236, 154, 235, -1, 237, 238, -1, - 227, 238, -1, 239, 176, 240, -1, 239, 242, -1, - -1, 21, -1, 68, 236, -1, 68, 10, -1, 69, - 17, 234, -1, 69, 11, 234, 154, 17, 234, 154, - 17, 234, -1, 70, 171, 234, 154, 17, 234, 157, - 241, 159, -1, 70, 171, 234, 154, 17, 234, 157, - 159, -1, 71, 186, 201, 234, 151, 244, 152, 190, - 38, 17, 234, 72, 17, 234, -1, 72, -1, 73, - -1, 241, 171, 232, 154, 17, 234, -1, 171, 232, - 154, 17, 234, -1, 176, 247, -1, 199, 157, 234, - 154, 234, 159, -1, 243, 154, 157, 234, 154, 234, - 159, -1, 199, 188, 234, 188, -1, 17, 188, 234, - 188, -1, 244, 154, 199, 188, 234, 188, -1, 244, - 154, 17, 188, 234, 188, -1, -1, -1, 245, 154, - 235, -1, 57, 56, -1, 56, -1, 166, 199, 234, - 154, 234, -1, 167, 199, 234, 154, 234, -1, 89, - 169, 199, 234, 154, 234, -1, 90, 170, 199, 234, - 154, 234, -1, 168, 235, 38, 199, -1, 130, 235, - 154, 235, 154, 235, -1, 131, 235, 154, 199, -1, - 132, 235, 154, 235, -1, 133, 235, 154, 235, 154, - 235, -1, 134, 235, 154, 235, 154, 235, -1, 129, - 243, -1, 246, 186, 201, 234, 151, 244, 152, 190, - -1, 249, -1, 36, -1, -1, 111, 199, 193, -1, - 111, 199, 154, 11, 234, 193, -1, 112, 199, 193, - -1, 112, 199, 154, 11, 234, 193, -1, 113, 235, - -1, 248, 114, 199, 234, 193, -1, 248, 115, 235, - 154, 199, 234, 193, -1, 135, 199, 233, 154, 4, - -1, 116, 199, 234, 245, -1 + 41, -1, 25, -1, 161, 208, 162, -1, 207, -1, + 58, 232, 22, 155, 22, -1, 7, -1, 8, -1, + 174, -1, 178, -1, 234, -1, 233, -1, 200, 235, + -1, 236, -1, 237, 155, 236, -1, 238, 239, -1, + 228, 239, -1, 240, 177, 241, -1, 240, 243, -1, + -1, 68, 235, -1, 21, -1, 21, 68, 235, -1, + 69, 237, -1, 69, 10, -1, 70, 17, 235, -1, + 70, 11, 235, 155, 17, 235, 155, 17, 235, -1, + 71, 172, 235, 155, 17, 235, 158, 242, 160, -1, + 71, 172, 235, 155, 17, 235, 158, 160, -1, 72, + 187, 202, 235, 152, 245, 153, 191, 38, 17, 235, + 73, 17, 235, -1, 73, -1, 74, -1, 242, 172, + 233, 155, 17, 235, -1, 172, 233, 155, 17, 235, + -1, 177, 248, -1, 200, 158, 235, 155, 235, 160, + -1, 244, 155, 158, 235, 155, 235, 160, -1, 200, + 189, 235, 189, -1, 17, 189, 235, 189, -1, 245, + 155, 200, 189, 235, 189, -1, 245, 155, 17, 189, + 235, 189, -1, -1, -1, 246, 155, 236, -1, 57, + 56, -1, 56, -1, 167, 200, 235, 155, 235, -1, + 168, 200, 235, 155, 235, -1, 90, 170, 200, 235, + 155, 235, -1, 91, 171, 200, 235, 155, 235, -1, + 169, 236, 38, 200, -1, 131, 236, 155, 236, 155, + 236, -1, 132, 236, 155, 200, -1, 133, 236, 155, + 236, -1, 134, 236, 155, 236, 155, 236, -1, 135, + 236, 155, 236, 155, 236, -1, 130, 244, -1, 247, + 187, 202, 235, 152, 245, 153, 191, -1, 250, -1, + 36, -1, -1, 112, 200, 194, -1, 112, 200, 155, + 11, 235, 194, -1, 113, 200, 194, -1, 113, 200, + 155, 11, 235, 194, -1, 114, 236, -1, 249, 115, + 200, 235, 194, -1, 249, 116, 236, 155, 200, 235, + 194, -1, 136, 200, 234, 155, 4, -1, 117, 200, + 235, 246, -1 }; /* YYRLINE[YYN] -- source line where rule number YYN was defined. */ static const yytype_uint16 yyrline[] = { - 0, 1115, 1115, 1115, 1115, 1115, 1115, 1115, 1115, 1115, - 1115, 1116, 1116, 1116, 1116, 1116, 1116, 1117, 1117, 1117, - 1117, 1117, 1117, 1118, 1118, 1118, 1118, 1118, 1118, 1121, - 1121, 1122, 1122, 1123, 1123, 1124, 1124, 1125, 1125, 1129, - 1129, 1130, 1130, 1131, 1131, 1132, 1132, 1133, 1133, 1134, - 1134, 1135, 1135, 1136, 1137, 1142, 1143, 1143, 1143, 1143, - 1143, 1145, 1145, 1145, 1146, 1146, 1148, 1149, 1153, 1157, - 1162, 1162, 1164, 1165, 1170, 1176, 1177, 1178, 1179, 1180, - 1184, 1185, 1186, 1190, 1191, 1192, 1193, 1197, 1198, 1199, - 1203, 1204, 1205, 1206, 1207, 1211, 1212, 1213, 1216, 1217, - 1218, 1219, 1220, 1221, 1222, 1229, 1230, 1231, 1232, 1233, - 1234, 1235, 1236, 1237, 1238, 1242, 1243, 1248, 1249, 1250, - 1251, 1252, 1253, 1256, 1257, 1262, 1263, 1270, 1271, 1277, - 1278, 1287, 1295, 1296, 1301, 1302, 1303, 1308, 1321, 1321, - 1321, 1321, 1321, 1321, 1321, 1324, 1328, 1332, 1339, 1344, - 1352, 1382, 1407, 1412, 1422, 1432, 1436, 1446, 1453, 1462, - 1469, 1474, 1479, 1486, 1487, 1494, 1501, 1509, 1515, 1527, - 1555, 1571, 1598, 1626, 1652, 1672, 1698, 1718, 1730, 1737, - 1803, 1813, 1823, 1829, 1839, 1845, 1855, 1860, 1865, 1878, - 1890, 1912, 1920, 1926, 1937, 1942, 1947, 1953, 1959, 1968, - 1972, 1980, 1980, 1983, 1983, 1986, 1998, 2019, 2024, 2032, - 2033, 2037, 2037, 2041, 2041, 2044, 2047, 2071, 2083, 2082, - 2094, 2093, 2103, 2102, 2113, 2153, 2156, 2162, 2172, 2176, - 2181, 2183, 2188, 2193, 2202, 2212, 2223, 2227, 2236, 2245, - 2250, 2384, 2384, 2386, 2395, 2395, 2397, 2402, 2414, 2418, - 2423, 2427, 2431, 2435, 2439, 2443, 2447, 2451, 2455, 2480, - 2484, 2494, 2498, 2502, 2507, 2514, 2514, 2520, 2529, 2534, - 2539, 2543, 2552, 2561, 2570, 2574, 2582, 2589, 2593, 2598, - 2608, 2627, 2636, 2727, 2731, 2738, 2749, 2762, 2772, 2783, - 2793, 2804, 2812, 2822, 2829, 2832, 2833, 2840, 2844, 2849, - 2865, 2882, 2896, 2910, 2922, 2930, 2937, 2943, 2949, 2955, - 2970, 3068, 3073, 3077, 3084, 3091, 3099, 3106, 3114, 3122, - 3136, 3153, 3161 + 0, 1113, 1113, 1113, 1113, 1113, 1113, 1113, 1113, 1113, + 1113, 1114, 1114, 1114, 1114, 1114, 1114, 1115, 1115, 1115, + 1115, 1115, 1115, 1116, 1116, 1116, 1116, 1116, 1116, 1119, + 1119, 1120, 1120, 1121, 1121, 1122, 1122, 1123, 1123, 1127, + 1127, 1128, 1128, 1129, 1129, 1130, 1130, 1131, 1131, 1132, + 1132, 1133, 1133, 1134, 1135, 1140, 1141, 1141, 1141, 1141, + 1141, 1143, 1143, 1143, 1144, 1144, 1146, 1147, 1151, 1155, + 1160, 1160, 1162, 1163, 1168, 1174, 1175, 1176, 1177, 1178, + 1182, 1183, 1184, 1188, 1189, 1190, 1191, 1195, 1196, 1197, + 1201, 1202, 1203, 1204, 1205, 1209, 1210, 1211, 1214, 1215, + 1216, 1217, 1218, 1219, 1220, 1227, 1228, 1229, 1230, 1231, + 1232, 1233, 1234, 1235, 1236, 1240, 1241, 1246, 1247, 1248, + 1249, 1250, 1251, 1254, 1255, 1260, 1261, 1268, 1269, 1275, + 1276, 1285, 1293, 1294, 1299, 1300, 1301, 1306, 1319, 1319, + 1319, 1319, 1319, 1319, 1319, 1322, 1326, 1330, 1337, 1342, + 1350, 1380, 1405, 1410, 1420, 1430, 1434, 1444, 1451, 1460, + 1467, 1472, 1477, 1484, 1485, 1492, 1499, 1507, 1513, 1525, + 1553, 1569, 1596, 1624, 1650, 1670, 1696, 1716, 1728, 1735, + 1801, 1811, 1821, 1827, 1837, 1843, 1853, 1858, 1863, 1876, + 1888, 1910, 1918, 1924, 1935, 1940, 1945, 1951, 1957, 1966, + 1970, 1978, 1978, 1981, 1981, 1984, 1996, 2017, 2022, 2030, + 2031, 2035, 2035, 2039, 2039, 2042, 2045, 2069, 2081, 2080, + 2092, 2091, 2101, 2100, 2111, 2151, 2154, 2160, 2170, 2174, + 2179, 2181, 2186, 2191, 2200, 2210, 2221, 2225, 2234, 2243, + 2248, 2382, 2382, 2384, 2393, 2393, 2395, 2400, 2412, 2416, + 2421, 2425, 2429, 2433, 2437, 2441, 2445, 2449, 2453, 2478, + 2482, 2492, 2496, 2500, 2505, 2512, 2512, 2518, 2527, 2532, + 2537, 2541, 2550, 2559, 2568, 2572, 2576, 2581, 2588, 2595, + 2599, 2604, 2614, 2633, 2642, 2733, 2737, 2744, 2755, 2768, + 2778, 2789, 2799, 2810, 2818, 2828, 2835, 2838, 2839, 2846, + 2850, 2855, 2871, 2888, 2902, 2916, 2928, 2936, 2943, 2949, + 2955, 2961, 2976, 3074, 3079, 3083, 3090, 3097, 3105, 3112, + 3120, 3128, 3142, 3159, 3167 }; #endif @@ -1881,26 +1882,27 @@ "EXTERNAL", "TARGET", "TRIPLE", "ALIGN", "ADDRSPACE", "DEPLIBS", "CALL", "TAIL", "ASM_TOK", "MODULE", "SIDEEFFECT", "CC_TOK", "CCC_TOK", "FASTCC_TOK", "COLDCC_TOK", "X86_STDCALLCC_TOK", "X86_FASTCALLCC_TOK", - "DATALAYOUT", "RET", "BR", "SWITCH", "INVOKE", "UNWIND", "UNREACHABLE", - "ADD", "SUB", "MUL", "UDIV", "SDIV", "FDIV", "UREM", "SREM", "FREM", - "AND", "OR", "XOR", "SHL", "LSHR", "ASHR", "ICMP", "FCMP", "EQ", "NE", - "SLT", "SGT", "SLE", "SGE", "ULT", "UGT", "ULE", "UGE", "OEQ", "ONE", - "OLT", "OGT", "OLE", "OGE", "ORD", "UNO", "UEQ", "UNE", "MALLOC", - "ALLOCA", "FREE", "LOAD", "STORE", "GETELEMENTPTR", "TRUNC", "ZEXT", - "SEXT", "FPTRUNC", "FPEXT", "BITCAST", "UITOFP", "SITOFP", "FPTOUI", - "FPTOSI", "INTTOPTR", "PTRTOINT", "PHI_TOK", "SELECT", "VAARG", - "EXTRACTELEMENT", "INSERTELEMENT", "SHUFFLEVECTOR", "GETRESULT", - "SIGNEXT", "ZEROEXT", "NORETURN", "INREG", "SRET", "NOUNWIND", "NOALIAS", - "BYVAL", "NEST", "READNONE", "READONLY", "GC", "DEFAULT", "HIDDEN", - "PROTECTED", "'('", "')'", "'='", "','", "'*'", "'\\\\'", "'['", "'x'", - "']'", "'<'", "'>'", "'{'", "'}'", "'c'", "$accept", "ArithmeticOps", - "LogicalOps", "CastOps", "IPredicates", "FPredicates", "IntType", - "FPType", "LocalName", "OptLocalName", "OptAddrSpace", "OptLocalAssign", - "GlobalName", "OptGlobalAssign", "GlobalAssign", "GVInternalLinkage", - "GVExternalLinkage", "GVVisibilityStyle", "FunctionDeclareLinkage", - "FunctionDefineLinkage", "AliasLinkage", "OptCallingConv", "ParamAttr", - "OptParamAttrs", "FuncAttr", "OptFuncAttrs", "OptGC", "OptAlign", - "OptCAlign", "SectionString", "OptSection", "GlobalVarAttributes", + "DATALAYOUT", "UNWIND_TO", "RET", "BR", "SWITCH", "INVOKE", "UNWIND", + "UNREACHABLE", "ADD", "SUB", "MUL", "UDIV", "SDIV", "FDIV", "UREM", + "SREM", "FREM", "AND", "OR", "XOR", "SHL", "LSHR", "ASHR", "ICMP", + "FCMP", "EQ", "NE", "SLT", "SGT", "SLE", "SGE", "ULT", "UGT", "ULE", + "UGE", "OEQ", "ONE", "OLT", "OGT", "OLE", "OGE", "ORD", "UNO", "UEQ", + "UNE", "MALLOC", "ALLOCA", "FREE", "LOAD", "STORE", "GETELEMENTPTR", + "TRUNC", "ZEXT", "SEXT", "FPTRUNC", "FPEXT", "BITCAST", "UITOFP", + "SITOFP", "FPTOUI", "FPTOSI", "INTTOPTR", "PTRTOINT", "PHI_TOK", + "SELECT", "VAARG", "EXTRACTELEMENT", "INSERTELEMENT", "SHUFFLEVECTOR", + "GETRESULT", "SIGNEXT", "ZEROEXT", "NORETURN", "INREG", "SRET", + "NOUNWIND", "NOALIAS", "BYVAL", "NEST", "READNONE", "READONLY", "GC", + "DEFAULT", "HIDDEN", "PROTECTED", "'('", "')'", "'='", "','", "'*'", + "'\\\\'", "'['", "'x'", "']'", "'<'", "'>'", "'{'", "'}'", "'c'", + "$accept", "ArithmeticOps", "LogicalOps", "CastOps", "IPredicates", + "FPredicates", "IntType", "FPType", "LocalName", "OptLocalName", + "OptAddrSpace", "OptLocalAssign", "GlobalName", "OptGlobalAssign", + "GlobalAssign", "GVInternalLinkage", "GVExternalLinkage", + "GVVisibilityStyle", "FunctionDeclareLinkage", "FunctionDefineLinkage", + "AliasLinkage", "OptCallingConv", "ParamAttr", "OptParamAttrs", + "FuncAttr", "OptFuncAttrs", "OptGC", "OptAlign", "OptCAlign", + "SectionString", "OptSection", "GlobalVarAttributes", "GlobalVarAttribute", "PrimType", "Types", "ArgType", "ResultTypes", "ArgTypeList", "ArgTypeListI", "TypeListI", "ConstVal", "ConstExpr", "ConstVector", "GlobalType", "ThreadLocal", "AliaseeRef", "Module", @@ -1935,47 +1937,47 @@ 375, 376, 377, 378, 379, 380, 381, 382, 383, 384, 385, 386, 387, 388, 389, 390, 391, 392, 393, 394, 395, 396, 397, 398, 399, 400, 401, 402, 403, 404, - 405, 40, 41, 61, 44, 42, 92, 91, 120, 93, - 60, 62, 123, 125, 99 + 405, 406, 40, 41, 61, 44, 42, 92, 91, 120, + 93, 60, 62, 123, 125, 99 }; # endif /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ static const yytype_uint8 yyr1[] = { - 0, 165, 166, 166, 166, 166, 166, 166, 166, 166, - 166, 167, 167, 167, 167, 167, 167, 168, 168, 168, - 168, 168, 168, 168, 168, 168, 168, 168, 168, 169, + 0, 166, 167, 167, 167, 167, 167, 167, 167, 167, + 167, 168, 168, 168, 168, 168, 168, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 169, 170, - 170, 170, 170, 170, 170, 170, 170, 170, 170, 170, - 170, 170, 170, 170, 170, 171, 172, 172, 172, 172, - 172, 173, 173, 173, 174, 174, 175, 175, 176, 176, - 177, 177, 178, 178, 179, 180, 180, 180, 180, 180, - 181, 181, 181, 182, 182, 182, 182, 183, 183, 183, - 184, 184, 184, 184, 184, 185, 185, 185, 186, 186, - 186, 186, 186, 186, 186, 187, 187, 187, 187, 187, - 187, 187, 187, 187, 187, 188, 188, 189, 189, 189, - 189, 189, 189, 190, 190, 191, 191, 192, 192, 193, - 193, 194, 195, 195, 196, 196, 197, 197, 198, 198, - 198, 198, 198, 198, 198, 199, 199, 199, 199, 199, - 199, 199, 199, 199, 199, 199, 199, 199, 200, 201, - 201, 202, 202, 203, 203, 203, 203, 204, 204, 205, - 205, 205, 205, 205, 205, 205, 205, 205, 205, 205, - 205, 205, 205, 205, 205, 205, 205, 205, 205, 206, + 170, 170, 170, 170, 170, 170, 170, 170, 170, 171, + 171, 171, 171, 171, 171, 171, 171, 171, 171, 171, + 171, 171, 171, 171, 171, 172, 173, 173, 173, 173, + 173, 174, 174, 174, 175, 175, 176, 176, 177, 177, + 178, 178, 179, 179, 180, 181, 181, 181, 181, 181, + 182, 182, 182, 183, 183, 183, 183, 184, 184, 184, + 185, 185, 185, 185, 185, 186, 186, 186, 187, 187, + 187, 187, 187, 187, 187, 188, 188, 188, 188, 188, + 188, 188, 188, 188, 188, 189, 189, 190, 190, 190, + 190, 190, 190, 191, 191, 192, 192, 193, 193, 194, + 194, 195, 196, 196, 197, 197, 198, 198, 199, 199, + 199, 199, 199, 199, 199, 200, 200, 200, 200, 200, + 200, 200, 200, 200, 200, 200, 200, 200, 201, 202, + 202, 203, 203, 204, 204, 204, 204, 205, 205, 206, + 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, 206, 207, - 207, 208, 208, 209, 209, 210, 210, 211, 211, 212, - 212, 214, 213, 215, 213, 213, 213, 213, 216, 213, - 217, 213, 218, 213, 213, 213, 213, 219, 220, 220, - 221, 222, 222, 222, 223, 223, 224, 224, 224, 224, - 225, 226, 226, 227, 228, 228, 229, 230, 231, 231, - 232, 232, 232, 232, 232, 232, 232, 232, 232, 232, - 232, 233, 233, 233, 233, 234, 234, 235, 236, 236, - 237, 237, 238, 239, 239, 239, 240, 240, 240, 240, - 240, 240, 240, 240, 240, 241, 241, 242, 243, 243, - 244, 244, 244, 244, 244, 245, 245, 246, 246, 247, - 247, 247, 247, 247, 247, 247, 247, 247, 247, 247, - 247, 247, 248, 248, 249, 249, 249, 249, 249, 249, - 249, 249, 249 + 207, 207, 207, 207, 207, 207, 207, 207, 207, 208, + 208, 209, 209, 210, 210, 211, 211, 212, 212, 213, + 213, 215, 214, 216, 214, 214, 214, 214, 217, 214, + 218, 214, 219, 214, 214, 214, 214, 220, 221, 221, + 222, 223, 223, 223, 224, 224, 225, 225, 225, 225, + 226, 227, 227, 228, 229, 229, 230, 231, 232, 232, + 233, 233, 233, 233, 233, 233, 233, 233, 233, 233, + 233, 234, 234, 234, 234, 235, 235, 236, 237, 237, + 238, 238, 239, 240, 240, 240, 240, 240, 241, 241, + 241, 241, 241, 241, 241, 241, 241, 242, 242, 243, + 244, 244, 245, 245, 245, 245, 245, 246, 246, 247, + 247, 248, 248, 248, 248, 248, 248, 248, 248, 248, + 248, 248, 248, 248, 249, 249, 250, 250, 250, 250, + 250, 250, 250, 250, 250 }; /* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ @@ -2008,12 +2010,12 @@ 10, 1, 1, 4, 1, 1, 2, 3, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 3, 1, 5, 1, 1, 1, 1, 1, 1, 2, 1, 3, - 2, 2, 3, 2, 0, 1, 2, 2, 3, 9, - 9, 8, 14, 1, 1, 6, 5, 2, 6, 7, - 4, 4, 6, 6, 0, 0, 3, 2, 1, 5, - 5, 6, 6, 4, 6, 4, 4, 6, 6, 2, - 8, 1, 1, 0, 3, 6, 3, 6, 2, 5, - 7, 5, 4 + 2, 2, 3, 2, 0, 2, 1, 3, 2, 2, + 3, 9, 9, 8, 14, 1, 1, 6, 5, 2, + 6, 7, 4, 4, 6, 6, 0, 0, 3, 2, + 1, 5, 5, 6, 6, 4, 6, 4, 4, 6, + 6, 2, 8, 1, 1, 0, 3, 6, 3, 6, + 2, 5, 7, 5, 4 }; /* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state @@ -2030,158 +2032,160 @@ 226, 227, 215, 261, 262, 217, 138, 139, 140, 143, 142, 141, 144, 145, 0, 0, 0, 0, 263, 264, 146, 216, 148, 204, 204, 95, 203, 0, 98, 98, - 275, 271, 69, 244, 245, 246, 270, 228, 229, 232, - 0, 166, 149, 0, 0, 0, 0, 155, 167, 0, - 0, 166, 0, 0, 0, 97, 96, 0, 201, 202, - 0, 0, 99, 100, 101, 102, 103, 0, 247, 0, - 313, 273, 0, 230, 165, 115, 161, 163, 0, 0, - 0, 0, 0, 0, 154, 0, 0, 147, 0, 0, - 160, 0, 159, 0, 224, 138, 139, 140, 143, 142, - 141, 0, 0, 67, 67, 104, 0, 241, 242, 243, - 312, 298, 0, 0, 0, 0, 98, 283, 284, 2, - 3, 4, 5, 6, 7, 8, 9, 10, 14, 15, - 16, 11, 12, 13, 0, 0, 0, 0, 0, 0, - 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, - 27, 28, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 272, 98, 287, 0, 311, 231, 158, 0, - 123, 67, 67, 157, 0, 168, 0, 123, 67, 67, - 0, 205, 186, 187, 182, 184, 183, 185, 188, 181, - 177, 178, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 180, 179, 218, 0, - 297, 277, 67, 268, 276, 0, 0, 55, 0, 0, - 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, - 0, 53, 54, 49, 50, 51, 52, 39, 40, 41, - 42, 43, 44, 45, 46, 47, 48, 0, 129, 129, - 318, 67, 67, 309, 0, 0, 0, 0, 0, 67, - 67, 67, 0, 0, 0, 0, 0, 106, 108, 107, - 105, 109, 110, 111, 112, 113, 116, 164, 162, 151, - 152, 153, 156, 66, 150, 220, 222, 0, 0, 0, - 0, 0, 0, 0, 0, 170, 200, 0, 0, 0, - 174, 0, 171, 0, 0, 0, 134, 239, 250, 251, - 252, 257, 253, 254, 255, 256, 248, 0, 259, 266, - 265, 267, 0, 0, 278, 0, 0, 67, 67, 0, - 314, 0, 316, 295, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 67, 0, 114, 120, - 119, 117, 118, 121, 122, 124, 134, 134, 0, 0, - 0, 295, 0, 0, 0, 0, 0, 169, 155, 167, - 0, 172, 173, 0, 0, 0, 0, 219, 238, 115, - 236, 0, 249, 0, 0, 269, 0, 0, 0, 0, - 0, 0, 0, 0, 322, 0, 0, 0, 305, 306, - 0, 0, 0, 0, 0, 303, 0, 129, 0, 221, - 223, 67, 0, 0, 0, 0, 0, 0, 0, 199, - 176, 0, 0, 0, 0, 0, 0, 136, 134, 65, - 0, 123, 0, 258, 0, 0, 294, 0, 0, 129, - 130, 129, 0, 0, 0, 0, 0, 0, 321, 299, - 300, 294, 0, 319, 67, 206, 0, 0, 190, 0, - 0, 0, 0, 175, 0, 0, 67, 131, 137, 135, - 64, 235, 237, 115, 132, 0, 0, 0, 115, 115, - 0, 301, 302, 315, 317, 296, 0, 0, 304, 307, - 308, 0, 129, 0, 0, 0, 196, 0, 0, 192, - 193, 189, 65, 133, 127, 260, 0, 0, 0, 0, - 123, 0, 288, 0, 123, 320, 194, 195, 0, 0, - 0, 234, 0, 125, 0, 281, 0, 0, 106, 108, - 115, 115, 0, 115, 115, 289, 310, 191, 197, 198, - 128, 0, 240, 279, 0, 280, 0, 291, 290, 0, - 0, 0, 126, 0, 0, 0, 115, 115, 0, 0, - 0, 293, 292, 286, 0, 0, 285, 0, 282 + 276, 0, 271, 69, 244, 245, 246, 270, 228, 229, + 232, 0, 166, 149, 0, 0, 0, 0, 155, 167, + 0, 0, 166, 0, 0, 0, 97, 96, 0, 201, + 202, 0, 0, 99, 100, 101, 102, 103, 0, 247, + 0, 0, 250, 251, 252, 257, 253, 254, 255, 256, + 248, 2, 3, 4, 5, 6, 7, 8, 9, 10, + 14, 15, 16, 11, 12, 13, 0, 0, 0, 17, + 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, + 28, 0, 0, 0, 0, 0, 0, 0, 0, 259, + 266, 265, 275, 315, 273, 0, 230, 165, 115, 161, + 163, 0, 0, 0, 0, 0, 0, 154, 0, 0, + 147, 0, 0, 160, 0, 159, 0, 224, 138, 139, + 140, 143, 142, 141, 0, 0, 67, 67, 104, 0, + 241, 242, 243, 277, 249, 0, 29, 30, 31, 32, + 33, 34, 35, 36, 37, 38, 0, 53, 54, 49, + 50, 51, 52, 39, 40, 41, 42, 43, 44, 45, + 46, 47, 48, 0, 0, 0, 0, 0, 0, 200, + 0, 0, 0, 0, 314, 300, 0, 0, 0, 0, + 98, 285, 286, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 272, + 98, 289, 0, 313, 231, 158, 0, 123, 67, 67, + 157, 0, 168, 0, 123, 67, 67, 0, 205, 186, + 187, 182, 184, 183, 185, 188, 181, 177, 178, 0, + 0, 0, 0, 180, 179, 218, 0, 0, 0, 0, + 297, 0, 0, 0, 0, 0, 258, 0, 0, 0, + 299, 279, 67, 268, 278, 0, 0, 55, 0, 0, + 0, 0, 129, 129, 320, 67, 67, 311, 0, 0, + 0, 0, 0, 67, 67, 67, 0, 0, 0, 0, + 0, 106, 108, 107, 105, 109, 110, 111, 112, 113, + 116, 164, 162, 151, 152, 153, 156, 66, 150, 220, + 222, 0, 170, 0, 0, 0, 174, 0, 171, 134, + 239, 0, 0, 0, 0, 0, 0, 0, 0, 199, + 0, 0, 0, 267, 0, 0, 280, 0, 0, 67, + 67, 0, 316, 0, 318, 297, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 67, 0, + 114, 120, 119, 117, 118, 121, 122, 124, 134, 134, + 0, 169, 155, 167, 0, 172, 173, 0, 219, 238, + 115, 236, 0, 260, 0, 0, 190, 0, 0, 0, + 0, 0, 0, 0, 67, 269, 0, 0, 0, 0, + 0, 0, 0, 0, 324, 0, 0, 0, 307, 308, + 0, 0, 0, 0, 0, 305, 0, 129, 0, 221, + 223, 67, 176, 0, 0, 0, 136, 134, 65, 0, + 123, 0, 0, 298, 0, 196, 0, 0, 192, 193, + 189, 0, 0, 296, 0, 0, 129, 130, 129, 0, + 0, 0, 0, 0, 323, 301, 302, 296, 0, 321, + 67, 206, 175, 131, 137, 135, 64, 235, 237, 115, + 132, 194, 195, 0, 0, 0, 0, 0, 115, 115, + 0, 303, 304, 317, 319, 0, 0, 306, 309, 310, + 0, 129, 65, 133, 127, 191, 197, 198, 0, 0, + 0, 0, 123, 0, 290, 0, 123, 322, 234, 0, + 125, 0, 283, 0, 0, 106, 108, 115, 115, 0, + 115, 115, 291, 312, 128, 0, 240, 281, 0, 282, + 0, 293, 292, 0, 0, 0, 126, 0, 0, 0, + 115, 115, 0, 0, 0, 295, 294, 288, 0, 0, + 287, 0, 284 }; /* YYDEFGOTO[NTERM-NUM]. */ static const yytype_int16 yydefgoto[] = { - -1, 263, 264, 265, 290, 307, 161, 162, 78, 531, - 112, 12, 79, 14, 15, 40, 41, 42, 47, 53, - 117, 127, 336, 228, 415, 339, 602, 583, 390, 487, - 564, 437, 488, 80, 163, 136, 153, 137, 138, 109, - 356, 378, 357, 120, 87, 154, 16, 17, 18, 20, - 19, 366, 416, 417, 62, 23, 60, 100, 440, 441, - 128, 169, 54, 95, 55, 48, 443, 379, 82, 381, - 273, 274, 56, 91, 92, 222, 587, 131, 313, 540, - 454, 223, 224, 225, 226 + -1, 176, 177, 178, 236, 253, 214, 215, 78, 547, + 113, 12, 79, 14, 15, 40, 41, 42, 47, 53, + 118, 128, 380, 295, 447, 383, 606, 590, 422, 506, + 574, 458, 507, 80, 216, 189, 206, 190, 191, 110, + 259, 179, 260, 121, 87, 207, 16, 17, 18, 20, + 19, 399, 448, 449, 62, 23, 60, 101, 461, 462, + 129, 222, 54, 96, 55, 48, 225, 180, 82, 182, + 343, 344, 56, 92, 93, 289, 594, 184, 357, 560, + 404, 290, 291, 292, 293 }; /* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing STATE-NUM. */ -#define YYPACT_NINF -572 +#define YYPACT_NINF -565 static const yytype_int16 yypact[] = { - 284, -572, -572, -572, -572, -572, -572, -572, -13, -121, - 36, -94, 101, -55, 19, -572, 135, 883, -572, 165, - 162, 13, 27, -572, 4, 199, -572, 1464, -572, -572, - -572, -572, -572, -572, -572, -572, -572, -572, -572, -572, - 106, 106, 203, -572, -572, -572, -572, 106, -572, -572, - -572, -572, -572, 106, 210, -572, -10, 215, 219, 224, - -572, -572, -572, -572, -572, 99, -572, -572, -572, -572, - -572, -572, -572, -572, 265, 271, 2, 126, -572, -572, - -572, 1, -572, 259, 259, 205, -572, 9, 382, 382, - -572, -572, 78, -572, -572, -572, -572, -572, -572, -572, - -32, 1059, -572, 147, 151, 506, 99, -572, 1, -114, - 166, 1059, 158, 9, 9, -572, -572, 1014, -572, -572, - 1504, 315, -572, -572, -572, -572, -572, 1562, -572, -2, - 1843, -572, 294, -572, -572, 1, -572, 172, 168, 1620, - 1620, 170, -68, 1620, -572, 329, 185, -572, 1504, 1620, - 99, 187, 1, 339, -572, 77, 333, 335, 336, 340, - 341, 262, 342, 1115, 298, -572, 139, -572, -572, -572, - -572, -572, 292, 1660, 59, 343, 382, -572, -572, -572, - -572, -572, -572, -572, -572, -572, -572, -572, -572, -572, - -572, -572, -572, -572, 312, 787, 1620, 1620, 1620, 1620, - -572, -572, -572, -572, -572, -572, -572, -572, -572, -572, - -572, -572, 1620, 1620, 1620, 1620, 1620, 1620, 1620, 1620, - 1620, 1620, -572, 382, -572, -42, -572, -572, 434, 1345, - -572, -31, -30, -572, 194, 1, 208, -572, 298, 3, - 1014, -572, -572, -572, -572, -572, -572, -572, -572, -572, - -572, -572, 312, 787, 213, 214, 218, 225, 228, 1385, - 1678, 609, 346, 230, 231, 238, -572, -572, -572, 242, - -572, 99, 702, -572, 241, 841, 841, -572, 841, 1562, - -572, -572, -572, -572, -572, -572, -572, -572, -572, -572, - 1620, -572, -572, -572, -572, -572, -572, -572, -572, -572, - -572, -572, -572, -572, -572, -572, -572, 1620, 97, 125, - -572, 702, -25, 244, 245, 261, 263, 266, 269, 14, - 702, 702, 358, 1562, 1620, 1620, 409, -572, -572, -572, - -572, -572, -572, -572, -572, -572, -572, -572, -572, -93, - -572, -572, -572, -572, -93, -572, 158, 378, 275, 277, - 1504, 1504, 1504, 1504, 1504, -572, -572, 80, 788, -83, - -572, -64, -572, 1504, 1504, 1504, 276, 1406, -572, -572, - -572, -572, -572, -572, -572, -572, 369, 1504, -572, -572, - -572, -572, 1620, 281, -572, 282, 841, 702, 702, 5, - -572, 7, -572, -572, 841, 274, 1620, 1620, 1620, 1620, - 1620, 283, 285, 287, 1620, 841, 702, 295, -572, -572, - -572, -572, -572, -572, -572, -572, 276, 276, 1620, 1504, - 1504, -572, 296, 299, 300, 301, 1504, -572, 306, 969, - -58, -572, -572, 302, 303, 421, -3, -572, -572, 1, - 307, 308, -572, 440, 22, -572, 451, 452, 321, 319, - 320, 841, 471, 841, 323, 324, 841, 328, 1, -572, - 330, 332, 479, 841, 841, 1, 337, 344, 1620, -572, - -572, -45, 347, 349, 133, 1504, 1504, 1504, 1504, -572, - -572, 334, 1504, 1504, 1620, 468, 487, -572, 276, 1746, - 1446, -572, 350, -572, 841, 841, 1718, 841, 841, 344, - -572, 344, 1620, 841, 351, 1620, 1620, 1620, -572, -572, - -572, 1718, 441, -572, 702, -572, 1504, 1504, -572, 352, - 348, 353, 357, -572, 360, 363, 64, -572, -572, -572, - -572, -572, -572, 1, 81, 474, 370, 374, 123, 1, - 138, -572, -572, -572, -572, -572, 368, 841, -572, -572, - -572, 171, 344, 380, 381, 1504, -572, 1504, 1504, -572, - -572, -572, 1746, -572, 483, -572, 520, -4, 560, 560, - -572, 1736, -572, 379, -572, -572, -572, -572, 394, 395, - 398, -572, 550, 410, 841, -572, 1255, -1, 405, 407, - -572, -572, 87, 123, 1, -572, -93, -572, -572, -572, - -572, 537, -572, -572, 411, -572, 1255, 434, 434, 544, - 560, 560, -572, 549, 418, 841, -572, -572, 841, 558, - 509, 434, 434, -572, 841, 571, -572, 841, -572 + 641, -565, -565, -565, -565, -565, -565, -565, -29, -130, + -24, -105, 35, -59, 335, -565, 103, 1109, -565, 53, + 231, -28, 10, -565, 31, 139, -565, 1574, -565, -565, + -565, -565, -565, -565, -565, -565, -565, -565, -565, -565, + 95, 95, 164, -565, -565, -565, -565, 95, -565, -565, + -565, -565, -565, 95, -12, -565, 7, 151, 155, 181, + -565, -565, -565, -565, -565, -68, -565, -565, -565, -565, + -565, -565, -565, -565, 205, 225, 9, 108, -565, -565, + -565, 50, -565, 149, 149, 242, -565, 182, 414, 414, + 166, 965, -565, 198, -565, -565, -565, -565, -565, -565, + -565, -110, 1185, -565, 89, 118, 590, -68, -565, 50, + -81, 69, 1185, 82, 182, 182, -565, -565, 1139, -565, + -565, 1592, 281, -565, -565, -565, -565, -565, 1632, -565, + -21, 965, -565, -565, -565, -565, -565, -565, -565, -565, + 228, -565, -565, -565, -565, -565, -565, -565, -565, -565, + -565, -565, -565, -565, -565, -565, 395, 547, 143, -565, + -565, -565, -565, -565, -565, -565, -565, -565, -565, -565, + -565, 154, 159, 163, 169, 1592, 177, 184, 188, -565, + -565, -565, -565, 1902, -565, 311, -565, -565, 50, -565, + 189, 192, 1691, 1691, 196, -74, 1691, -565, 346, 203, + -565, 1592, 1691, -68, 199, 50, 411, -565, 343, 350, + 354, 355, 356, 357, 314, 358, 1241, 319, -565, 12, + -565, -565, -565, -565, -565, 353, -565, -565, -565, -565, + -565, -565, -565, -565, -565, -565, 224, -565, -565, -565, + -565, -565, -565, -565, -565, -565, -565, -565, -565, -565, + -565, -565, -565, 232, 1592, 1592, 1592, 1592, 1592, -565, + -50, 1592, 1592, 1592, -565, -565, 336, 1749, 62, 382, + 414, -565, -565, 395, 547, 1691, 1691, 1691, 1691, 1691, + 1691, 1691, 1691, 1691, 1691, 1691, 1691, 1691, 1691, -565, + 414, -565, 148, -565, -565, 393, 1473, -565, -43, -15, + -565, 233, 50, 243, -565, 319, -39, 1139, -565, -565, + -565, -565, -565, -565, -565, -565, -565, -565, -565, 47, + 1789, 769, 375, -565, -565, -565, 248, 246, 1592, 1592, + -565, 253, 254, 257, 261, 1592, -565, 266, 267, 369, + -565, -68, 825, -565, 268, 965, 965, -565, 965, 1632, + 1691, 1691, 23, 28, -565, 825, -44, 270, 271, 274, + 277, 282, 283, 174, 825, 825, 398, 1632, 1691, 1691, + 435, -565, -565, -565, -565, -565, -565, -565, -565, -565, + -565, -565, -565, 323, -565, -565, -565, -565, 323, -565, + 82, 402, -565, 40, 874, 57, -565, -70, -565, 287, + 1513, 421, 290, 294, 141, 1592, 1592, 1592, 1592, -565, + 1592, 1592, 1691, -565, 1691, 296, -565, 297, 965, 825, + 825, 15, -565, 19, -565, -565, 965, 295, 1691, 1691, + 1691, 1691, 1691, 299, 309, 313, 1691, 965, 825, 316, + -565, -565, -565, -565, -565, -565, -565, -565, 287, 287, + 1691, -565, 320, 1094, -64, -565, -565, -1, -565, -565, + 50, 318, 328, -565, 1592, 1592, -565, 1691, 344, 345, + 347, 348, 351, 363, 84, -565, 484, 492, 365, 364, + 368, 965, 506, 965, 371, 372, 965, 374, 50, -565, + 377, 380, 514, 965, 965, 50, 389, 387, 1691, -565, + -565, 87, -565, 362, 521, 540, -565, 287, 194, 1534, + -565, 392, 394, -565, 1592, -565, 1592, 1592, -565, -565, + -565, 965, 965, 1807, 965, 965, 387, -565, 387, 965, + 391, 1691, 1691, 1691, -565, -565, -565, 1807, 497, -565, + 825, -565, -565, -565, -565, -565, -565, -565, -565, 50, + -3, -565, -565, 399, 401, 405, 396, 397, 79, 50, + 175, -565, -565, -565, -565, 400, 965, -565, -565, -565, + 202, 387, 194, -565, 508, -565, -565, -565, 542, 3, + 682, 682, -565, 1850, -565, 403, -565, -565, -565, 560, + 418, 965, -565, 1382, 5, 415, 416, -565, -565, 252, + 79, 50, -565, 323, -565, 548, -565, -565, 420, -565, + 1382, 393, 393, 552, 682, 682, -565, 554, 422, 965, + -565, -565, 965, 559, 505, 393, 393, -565, 965, 562, + -565, 965, -565 }; /* YYPGOTO[NTERM-NUM]. */ static const yytype_int16 yypgoto[] = { - -572, 459, 460, 461, 345, 354, -173, -572, 0, 30, - -150, 502, 8, -572, -572, -572, -572, 189, -572, -572, - -572, -149, -572, -409, -572, -234, -572, -572, -289, 61, - -572, -404, -572, -572, -26, 367, -122, -572, 488, 493, - -92, -159, -214, 84, 217, 362, -572, -572, 586, -572, - -572, -572, -572, -572, -572, -572, -572, -572, -572, -572, - 515, -572, -572, -572, -572, -572, -572, -571, -76, 46, - -105, -572, -572, 552, -572, -572, -572, -572, -572, 94, - 188, -572, -572, -572, -572 + -565, 404, 406, 407, 307, 308, -267, -565, 0, 14, + -195, 488, 4, -565, -565, -565, -565, 269, -565, -565, + -565, -243, -565, -452, -565, -299, -565, -565, -341, 34, + -565, -429, -565, -565, -26, 298, -125, -565, 479, 486, + -103, -210, -232, 153, 217, 286, -565, -565, 582, -565, + -565, -565, -565, -565, -565, -565, -565, -565, -565, -565, + 519, -565, -565, -565, -565, -565, -565, -564, -66, 102, + -240, -565, -565, 555, -565, -565, -565, -565, -565, 78, + 191, -565, -565, -565, -565 }; /* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If @@ -2191,406 +2195,418 @@ #define YYTABLE_NINF -209 static const yytype_int16 yytable[] = { - 11, 81, 278, 344, 266, 166, 104, 277, 13, 110, - 277, 90, 469, 470, 268, 604, 451, 11, 453, 93, - 392, 63, 64, 110, 110, 13, 167, 279, 164, 110, - 489, 485, 24, 1, 2, 614, 3, 4, 5, 21, - 143, 118, 119, 409, 410, 411, 359, 361, 412, 144, - 486, 108, 413, 414, 22, 110, 238, 110, 452, 26, - 452, 29, 30, 31, 32, 33, 34, 35, 110, 36, - 275, 426, 324, 325, 323, 135, 276, 241, 431, 108, - -55, -55, -55, -55, 529, 135, 143, 267, 345, 346, - 426, 152, 11, 310, 25, 234, 426, 1, 28, 432, - 3, 152, 5, 242, 243, 481, 111, 515, 314, 315, - 316, 317, 318, 231, 232, 485, 322, 235, 110, 27, - 111, 111, 132, 239, 562, 609, 111, 133, 340, 568, - 569, 341, 394, 63, 64, 43, 106, 66, 67, 68, - 69, 70, 71, 72, 430, 1, 2, 272, 3, 4, - 5, 110, 111, 94, 111, 585, -67, 386, 605, 2, - 168, 59, 4, 444, 105, 111, 57, 37, 38, 39, - 308, 309, 272, 311, 269, 73, 426, -144, 513, 110, - 58, 607, 608, 493, 610, 611, 312, 272, 272, 272, - 272, 272, 319, 320, 321, 272, 380, 148, 149, 380, - 380, 405, 380, 135, 49, 50, 51, 621, 622, 52, - 543, 45, 544, 46, 152, 111, 561, 409, 410, 411, - 407, 61, 412, 409, 410, 411, 413, 414, 412, 83, - 84, 90, 413, 414, 426, 380, 88, 97, 85, 427, - 86, 98, 89, 401, 380, 380, 99, 115, 111, 116, - 101, 389, -67, 152, 37, 38, 39, 534, 421, 422, - 423, 424, 425, 575, 387, 244, 245, 246, 247, 102, - 266, 433, 434, 435, -144, 103, 111, 445, -144, 391, - -67, 388, 74, 75, -208, 518, 76, 502, 77, 107, - 570, 457, 571, 459, 460, 461, 86, 152, 406, 272, - 113, 114, -69, 1, 2, 139, 3, 4, 5, 140, - 380, 380, 380, 147, 6, 7, 227, 145, 380, 165, - 230, 383, 384, 574, 385, 571, 229, 472, 473, 380, - 380, 233, 429, 236, 479, 8, 592, 237, 240, 9, - 596, 439, -56, 10, -57, -60, 63, 64, 270, -59, - -58, 248, 110, 267, 277, 342, 272, 393, 1, 2, - 343, 3, 4, 5, 350, 351, 402, 403, 362, 352, - 272, 458, 272, 272, 272, 380, 353, 380, 465, 354, - 380, 363, 364, 519, 520, 521, 522, 380, 380, 365, - 524, 525, 471, 367, 586, 382, 404, 545, 395, 396, - 548, 549, 550, 280, 281, 282, 283, 284, 285, 286, - 287, 288, 289, 408, 606, 397, 418, 398, 380, 380, - 399, 380, 380, 400, 553, 554, 419, 380, 420, 442, - 436, 456, 448, 449, 450, 446, 447, 462, 380, 463, - 455, 464, 514, 121, 122, 123, 124, 125, 126, 468, - 475, 466, 467, 476, 477, 478, 482, 483, 526, 484, - 491, 490, 492, 578, 533, 579, 580, 480, 494, 495, - 539, 380, 496, 497, 498, 500, 272, 502, 503, 272, - 272, 272, 505, 508, 506, 539, 507, 326, 511, 530, - 527, 528, 380, 380, 452, 523, 565, 499, 512, 501, - 556, 516, 504, 517, 535, 547, 555, 557, 380, 509, - 510, 558, 559, 63, 64, 560, 106, 66, 67, 68, - 69, 70, 71, 72, 566, 1, 2, 572, 3, 4, - 5, 567, 576, 577, 380, 380, 582, 584, 595, 380, - 536, 537, 380, 541, 542, 594, 597, 598, 380, 546, - 599, 380, 327, 328, 600, 73, -18, 601, -19, 612, - 552, 615, 530, 368, 369, 613, 618, 63, 64, 370, - 329, 330, 619, 331, 332, 624, 333, 334, 335, 1, - 2, 625, 3, 4, 5, 371, 372, 373, 627, 219, - 220, 221, 581, 573, 130, 563, 338, 348, 142, 146, - 374, 375, 347, 44, 129, 551, 0, 349, 96, 474, - 0, 0, 0, 326, 590, 591, 63, 64, 376, 106, - 155, 156, 157, 158, 159, 160, 72, 0, 1, 2, - 603, 3, 4, 5, 179, 180, 181, 182, 183, 184, - 185, 186, 187, 188, 189, 190, 191, 192, 193, 252, - 253, 0, 0, 0, 0, 0, 616, 617, 73, 0, - 0, 620, 74, 75, 623, 0, 76, 0, 77, 141, - 626, 0, 0, 628, 0, 0, 254, 200, 588, 589, - 203, 204, 205, 206, 207, 208, 209, 210, 211, 0, - 255, 0, 256, 257, 258, 0, 329, 330, 0, 331, - 332, 0, 333, 334, 335, 368, 369, 0, 0, 63, - 64, 370, 0, 0, 0, 0, 0, 0, 0, 0, - 377, 1, 2, 0, 3, 4, 5, 371, 372, 373, + 11, 81, 348, 219, 13, 388, 323, 220, 508, 90, + 111, 111, 424, 105, 347, 111, 347, 11, 217, 499, + 500, 13, 325, 21, 24, 181, 481, 349, 90, 608, + 483, 504, 2, 504, 25, 4, 94, 354, 22, 111, + 358, 359, 360, 361, 362, 185, 618, 367, 366, 26, + 186, 109, 505, 27, 63, 64, 91, 107, 208, 209, + 210, 211, 212, 213, 72, 181, 1, 2, 482, 3, + 4, 5, 482, 345, 196, 91, 188, 111, 545, 346, + 109, 196, 111, 197, 102, 335, 188, 393, 395, 397, + 301, 335, 205, 11, 456, 28, 73, 572, 305, 45, + 503, 46, 205, 43, 111, 335, 580, 581, 112, 112, + 389, 390, 336, 112, 426, 63, 64, 384, 107, 66, + 67, 68, 69, 70, 71, 72, 57, 1, 2, 439, + 3, 4, 5, -144, 441, 442, 443, 112, 111, 444, + 308, 111, 221, 445, 446, 611, 612, 385, 614, 615, + 324, 330, 331, 332, 333, 334, 539, 73, 337, 338, + 339, 61, 454, 592, 58, 609, 298, 299, 625, 626, + 302, 95, 106, 98, 475, 112, 306, 99, 421, -67, + 112, 63, 64, 423, -67, 563, 86, 564, 487, 59, + 489, 490, 491, 1, 2, 335, 3, 4, 5, 85, + 451, 86, 112, 100, 74, 75, -67, 392, 76, 103, + 77, 550, 335, 1, 119, 120, 3, 1, 5, 455, + 3, 198, 5, 326, 418, 402, 403, 513, 111, 104, + 587, -144, 409, 223, 131, -144, 112, 520, 200, 112, + 541, 342, 437, 323, 37, 38, 39, 370, 192, 352, + 353, 342, 355, 356, 342, 342, 342, 342, 342, 363, + 364, 365, 342, 368, 369, 74, 75, 201, 202, 76, + 188, 77, 108, 49, 50, 51, 181, 193, 52, 181, + 181, 205, 181, 599, 116, 218, 117, 603, 224, 181, + 613, 567, 568, 569, 466, 254, 467, 433, 181, 181, + 114, 115, 468, 469, 470, 471, 255, 472, 473, 83, + 84, 256, 593, 371, 372, 257, 88, 311, 312, 313, + 314, 258, 89, 205, 419, 420, 112, 610, 582, 261, + 583, 373, 374, 294, 375, 376, 262, 377, 378, 379, + 263, 205, 438, 342, 296, 297, -55, -55, -55, -55, + 303, 307, 181, 181, 181, 586, 304, 583, 300, -56, + 181, 511, 512, -57, -60, -59, -58, 315, 453, 309, + 310, 181, 181, 111, 460, 327, 328, 29, 30, 31, + 32, 33, 34, 35, 329, 36, 474, 324, 342, 441, + 442, 443, 340, 347, 444, 386, 387, 398, 445, 446, + 400, 401, 342, 488, 342, 342, 342, 412, 405, 406, + 495, 553, 407, 554, 555, 181, 408, 181, 63, 64, + 181, 410, 411, 414, 501, 427, 428, 181, 181, 429, + 1, 2, 430, 3, 4, 5, 436, 431, 432, 440, + 450, 342, 457, 463, 413, 464, 370, 415, 416, 465, + 417, 476, 477, 486, 492, 181, 181, 425, 181, 181, + 441, 442, 443, 181, 493, 444, 434, 435, 494, 445, + 446, 498, 540, 509, 181, 122, 123, 124, 125, 126, + 127, 510, 502, 549, 37, 38, 39, 226, 227, 228, + 229, 230, 231, 232, 233, 234, 235, 559, 515, 514, + 181, 521, 516, 517, 518, 342, 342, 342, 546, 522, + 527, 559, 371, 372, 181, 181, 519, 523, 534, 524, + 478, 479, 480, 525, 542, 181, 467, 529, 485, 531, + 373, 374, 532, 375, 376, 533, 377, 378, 379, 496, + 497, 537, 538, 543, 544, 551, 566, 552, 181, 181, + 482, 578, 575, 181, 576, 579, 181, 601, 577, 591, + 584, 589, 181, 602, 604, 181, 605, -18, -19, 619, + 616, 622, 546, 237, 238, 617, 628, 623, 629, 631, + 350, 183, 351, 526, 573, 528, 588, 286, 530, 287, + 288, 199, 195, 391, 382, 535, 536, 63, 64, 44, + 107, 66, 67, 68, 69, 70, 71, 72, 130, 1, + 2, 97, 3, 4, 5, 570, 484, 0, 0, 0, + 0, 0, 0, 556, 557, 0, 561, 562, 0, 0, + 0, 565, 0, 0, 0, 0, 0, 0, 0, 73, + 0, -208, 571, 0, 0, 239, 240, 241, 242, 243, + 244, 245, 246, 247, 248, 249, 250, 251, 252, -69, + 1, 2, 0, 3, 4, 5, 0, 0, 585, 0, + 0, 6, 7, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 597, 598, 0, 132, 133, 0, 0, 63, + 64, 134, 8, 607, 0, 0, 9, 0, 0, 0, + 10, 1, 2, 0, 3, 4, 5, 135, 136, 137, + 0, 0, 0, 0, 0, 0, 620, 621, 0, 0, + 0, 624, 138, 139, 627, 0, 0, 0, 0, 0, + 630, 0, 0, 632, 0, 370, 0, 0, 0, 0, + 140, 0, 0, 0, 0, 0, 0, 74, 75, 0, + 0, 76, 0, 77, 194, 0, 0, 141, 142, 143, + 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, + 154, 155, 156, 157, 0, 0, 63, 64, 0, 107, + 208, 209, 210, 211, 212, 213, 72, 0, 1, 2, + 0, 3, 4, 5, 0, 0, 0, 0, 0, 158, + 159, 595, 596, 162, 163, 164, 165, 166, 167, 168, + 169, 170, 0, 171, 0, 172, 173, 174, 73, 373, + 374, 0, 375, 376, 0, 377, 378, 379, 132, 133, + 0, 0, 63, 64, 134, 0, 0, 0, 0, 0, + 0, 0, 0, 175, 1, 2, 0, 3, 4, 5, + 135, 136, 137, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 138, 139, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 111, + 0, 63, 64, 140, 107, 208, 209, 210, 211, 212, + 213, 72, 0, 1, 2, 0, 3, 4, 5, 0, + 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, + 151, 152, 153, 154, 155, 156, 157, 0, 0, 0, + 0, 0, 0, 73, 0, 0, 74, 75, 0, 0, + 76, 0, 77, 396, 0, 0, 0, 0, 0, 0, + 0, 0, 158, 159, 160, 161, 162, 163, 164, 165, + 166, 167, 168, 169, 170, 0, 171, 0, 172, 173, + 174, 0, 0, 0, 0, 0, 0, 0, 132, 133, + 0, 0, 63, 64, 134, 0, 0, 112, 0, 0, + 0, 0, 0, 0, 1, 2, 175, 3, 4, 5, + 135, 136, 137, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 138, 139, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 140, 0, 0, 0, 0, 0, 0, + 0, 74, 75, 0, 0, 76, 0, 77, 452, 0, + 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, + 151, 152, 153, 154, 155, 156, 157, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 374, 375, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 110, 0, 0, 0, - 376, 0, 0, 0, 0, 74, 75, 0, 0, 76, - 0, 77, 360, 0, 0, 0, 179, 180, 181, 182, - 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, - 193, 252, 253, 0, 0, 63, 64, 0, 106, 155, - 156, 157, 158, 159, 160, 72, 0, 1, 2, 0, - 3, 4, 5, 291, 292, 0, 0, 0, 254, 200, - 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, - 211, 0, 255, 0, 256, 257, 258, 73, 0, 0, - 0, 0, 0, 0, 368, 369, 0, 0, 63, 64, - 370, 0, 0, 111, 0, 0, 0, 0, 0, 0, - 1, 2, 377, 3, 4, 5, 371, 372, 373, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 374, 375, -207, 293, 294, 295, 296, 297, 298, - 299, 300, 301, 302, 303, 304, 305, 306, 0, 376, - 0, -69, 1, 2, 0, 3, 4, 5, 0, 0, - 0, 0, 0, 6, 7, 179, 180, 181, 182, 183, - 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, - 252, 253, 0, 0, 8, 0, 0, 0, 9, 0, - 0, 0, 10, 0, 74, 75, 0, 0, 76, 0, - 77, 428, 0, 0, 0, 0, 0, 254, 200, 201, - 202, 203, 204, 205, 206, 207, 208, 209, 210, 211, - 0, 255, 0, 256, 257, 258, 63, 64, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, - 0, 3, 4, 5, 249, 0, 0, 0, 0, 0, - 0, 377, 0, 0, 0, 0, 0, 0, 0, 250, - 251, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 63, 64, 110, 150, 66, 67, 68, 69, 70, - 71, 72, 0, 1, 2, 0, 3, 4, 5, 0, - 0, 0, 0, 179, 180, 181, 182, 183, 184, 185, - 186, 187, 188, 189, 190, 191, 192, 193, 252, 253, - 0, 0, 0, 73, 0, 0, 63, 64, 0, 106, + 0, 0, 158, 159, 160, 161, 162, 163, 164, 165, + 166, 167, 168, 169, 170, 0, 171, 0, 172, 173, + 174, 63, 64, 0, 0, 0, 0, 0, 0, -207, + 0, 0, 0, 1, 2, 0, 3, 4, 5, 316, + 0, 0, 0, 0, 0, 0, 175, -69, 1, 2, + 0, 3, 4, 5, 317, 318, 0, 0, 0, 6, + 7, 0, 0, 0, 0, 0, 63, 64, 111, 203, 66, 67, 68, 69, 70, 71, 72, 0, 1, 2, - 0, 3, 4, 5, 0, 254, 200, 201, 202, 203, - 204, 205, 206, 207, 208, 209, 210, 211, 134, 255, - 0, 256, 257, 258, 0, 0, 0, 0, 73, 0, + 8, 3, 4, 5, 9, 0, 0, 0, 10, 141, + 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, + 152, 153, 154, 155, 156, 157, 0, 0, 73, 0, + 0, 0, 63, 64, 0, 107, 66, 67, 68, 69, + 70, 71, 72, 0, 1, 2, 0, 3, 4, 5, + 0, 158, 159, 160, 161, 162, 163, 164, 165, 166, + 167, 168, 169, 170, 187, 171, 0, 172, 173, 174, + 0, 0, 0, 0, 73, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 112, 0, 63, 64, + -67, 0, 319, 0, 0, 320, 0, 321, 0, 322, + 1, 2, 204, 3, 4, 5, 316, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 111, 0, 63, 64, -67, 0, 259, 0, 0, 260, - 0, 261, 0, 262, 1, 2, 151, 3, 4, 5, - 249, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 250, 251, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 110, - 74, 75, 0, 0, 76, 0, 77, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 179, - 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, - 190, 191, 192, 193, 252, 253, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 74, 75, 0, 0, 76, - 0, 77, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 254, 200, 201, 202, 203, 204, 205, 206, 207, - 208, 209, 210, 211, 0, 255, 0, 256, 257, 258, - 0, 0, 0, 0, 0, 0, 0, 0, 368, 369, - 0, 0, 0, 0, 370, 0, 111, 0, 0, 0, - 0, 0, 259, 0, 0, 260, 0, 261, 0, 262, - 371, 372, 373, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 374, 375, 0, 0, 0, + 0, 317, 318, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 111, 74, 75, 0, 0, + 76, 0, 77, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 141, 142, 143, 144, + 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, + 155, 156, 157, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 74, 75, 0, 0, 76, 0, 77, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 158, 159, + 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, + 170, 0, 171, 0, 172, 173, 174, 0, 0, 0, + 0, 0, 0, 0, 0, 132, 133, 0, 0, 0, + 0, 134, 0, 112, 0, 0, 0, 0, 0, 319, + 0, 0, 320, 0, 321, 0, 322, 135, 136, 137, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 376, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 179, - 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, - 190, 191, 192, 193, 252, 253, 0, 0, 0, 0, - 0, 0, 63, 64, 0, 106, 66, 67, 68, 69, - 70, 71, 72, 0, 1, 2, 0, 3, 4, 5, - 0, 254, 200, 201, 202, 203, 204, 205, 206, 207, - 208, 209, 210, 211, 337, 255, 0, 256, 257, 258, - 0, 0, 63, 64, 73, 106, 155, 156, 157, 158, - 159, 160, 72, 0, 1, 2, 0, 3, 4, 5, - 0, 0, 0, 63, 64, 377, 106, 66, 67, 68, - 69, 70, 71, 72, 0, 1, 2, 0, 3, 4, - 5, 0, 0, 0, 73, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 438, 0, 0, 0, 0, - 0, 0, 0, 63, 64, 73, 106, 66, 67, 68, - 69, 70, 71, 72, 0, 1, 2, 0, 3, 4, - 5, 63, 64, 0, 65, 66, 67, 68, 69, 70, - 71, 72, 0, 1, 2, 532, 3, 4, 5, 0, - 0, 0, 0, 0, 0, 73, 0, 0, 0, 0, - 0, 74, 75, 0, 0, 76, 0, 77, 0, 0, - 0, 63, 64, 73, 106, 155, 156, 157, 158, 159, - 160, 72, 0, 1, 2, 0, 3, 4, 5, 0, + 0, 0, 138, 139, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 74, 75, 0, 355, 76, 0, 77, 0, 0, + 140, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 141, 142, 143, + 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, + 154, 155, 156, 157, 0, 0, 0, 0, 0, 0, + 63, 64, 0, 107, 66, 67, 68, 69, 70, 71, + 72, 0, 1, 2, 0, 3, 4, 5, 0, 158, + 159, 160, 161, 162, 163, 164, 165, 166, 167, 168, + 169, 170, 381, 171, 0, 172, 173, 174, 0, 0, + 63, 64, 73, 107, 66, 67, 68, 69, 70, 71, + 72, 0, 1, 2, 0, 3, 4, 5, 0, 0, + 0, 63, 64, 175, 107, 66, 67, 68, 69, 70, + 71, 72, 459, 1, 2, 0, 3, 4, 5, 0, + 0, 0, 73, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 548, 0, 0, 0, 0, 0, 0, + 0, 63, 64, 73, 65, 66, 67, 68, 69, 70, + 71, 72, 0, 1, 2, 0, 3, 4, 5, 63, + 64, 0, 107, 208, 209, 210, 211, 212, 213, 72, + 0, 1, 2, 0, 3, 4, 5, 0, 0, 0, 0, 0, 0, 73, 0, 0, 0, 0, 0, 0, - 0, 0, 74, 75, 0, 0, 76, 0, 77, 63, - 64, 0, 150, 66, 67, 68, 69, 70, 71, 72, + 74, 75, 0, 0, 76, 0, 77, 0, 0, 63, + 64, 73, 203, 66, 67, 68, 69, 70, 71, 72, 0, 1, 2, 0, 3, 4, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 74, 75, 0, 0, 76, 0, 77, 0, + 74, 75, 0, 0, 76, 0, 77, 0, 0, 0, 0, 73, 0, 0, 0, 0, 0, 0, 0, 0, - 74, 75, 0, 0, 76, 0, 77, 63, 64, 0, - 106, 66, 67, 68, 69, 70, 71, 72, 0, 1, - 2, 0, 3, 4, 5, 0, 0, 0, 0, 0, + 0, 74, 75, 0, 0, 76, 0, 77, 63, 64, + 0, 107, 66, 67, 68, 69, 70, 71, 72, 0, + 1, 2, 0, 3, 4, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 74, 75, 0, 0, 76, 0, 77, 63, 64, 73, - 271, 66, 67, 68, 69, 70, 71, 72, 0, 1, - 2, 0, 3, 4, 5, 63, 64, 0, 106, 155, - 156, 157, 158, 159, 160, 72, 0, 1, 2, 0, - 3, 4, 5, 0, 0, 0, 0, 0, 0, 73, + 0, 74, 75, 0, 0, 76, 0, 77, 0, 0, + 73, 0, 0, 0, 0, 0, 0, 0, 0, 74, + 75, 0, 0, 76, 0, 77, 63, 64, 0, 341, + 66, 67, 68, 69, 70, 71, 72, 0, 1, 2, + 0, 3, 4, 5, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 74, + 75, 0, 0, 76, 0, 77, 63, 64, 73, 107, + 208, 209, 210, 211, 212, 213, 72, 0, 1, 2, + 0, 3, 4, 5, 63, 64, 0, 107, 66, 67, + 68, 69, 70, 71, 558, 0, 1, 2, 0, 3, + 4, 5, 0, 0, 0, 0, 0, 0, 73, 0, 0, 0, 0, 0, 0, 0, 0, 0, 74, 75, - 0, 0, 76, 0, 77, 63, 64, 73, 106, 66, - 67, 68, 69, 70, 71, 538, 0, 1, 2, 0, - 3, 4, 5, 63, 64, 0, 106, 66, 67, 68, - 69, 70, 71, 593, 0, 1, 2, 0, 3, 4, - 5, 0, 0, 0, 0, 1, 0, 73, 3, 0, - 5, 0, 0, 0, 0, 0, 74, 75, 0, 0, - 76, 0, 77, 0, 0, 73, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 326, + 0, 0, 76, 0, 77, 0, 73, 63, 64, 0, + 107, 66, 67, 68, 69, 70, 71, 600, 0, 1, + 2, 0, 3, 4, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 73, 0, 0, 0, 0, 0, 0, 74, 75, 0, 0, 76, 0, 77, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 74, 75, 0, 0, 76, 0, - 358, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 327, 328, 0, 0, 0, 0, - 0, 0, 0, 0, 74, 75, 0, 0, 76, 170, - 77, 0, 329, 330, 0, 331, 332, 0, 333, 334, - 335, 0, 74, 75, 0, 0, 76, 0, 77, 171, - 172, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 173, 174, 175, 176, 177, 178, 179, 180, 181, - 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, - 192, 193, 194, 195, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 196, 197, 198, 0, 0, 199, - 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, - 210, 211, 212, 213, 214, 215, 216, 217, 218 + 0, 0, 0, 0, 0, 0, 0, 0, 264, 0, + 0, 0, 0, 0, 0, 0, 74, 75, 0, 0, + 76, 0, 394, 0, 0, 0, 0, 0, 265, 266, + 0, 0, 0, 0, 74, 75, 0, 0, 76, 0, + 77, 267, 268, 269, 270, 271, 272, 141, 142, 143, + 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, + 154, 155, 273, 274, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 74, 75, 0, + 0, 76, 0, 77, 275, 276, 277, 0, 0, 278, + 159, 160, 161, 162, 163, 164, 165, 166, 167, 168, + 169, 170, 279, 280, 281, 282, 283, 284, 285 }; static const yytype_int16 yycheck[] = { - 0, 27, 175, 237, 163, 127, 4, 11, 0, 54, - 11, 21, 416, 417, 164, 586, 11, 17, 11, 29, - 309, 7, 8, 54, 54, 17, 28, 176, 120, 54, - 439, 34, 153, 19, 20, 606, 22, 23, 24, 52, - 154, 32, 33, 136, 137, 138, 260, 261, 141, 163, - 53, 77, 145, 146, 67, 54, 148, 54, 53, 153, - 53, 42, 43, 44, 45, 46, 47, 48, 54, 50, - 11, 154, 114, 115, 223, 101, 17, 153, 161, 105, - 3, 4, 5, 6, 488, 111, 154, 163, 238, 239, - 154, 117, 92, 198, 58, 163, 154, 19, 153, 163, - 22, 127, 24, 26, 27, 163, 151, 152, 213, 214, - 215, 216, 217, 139, 140, 34, 221, 143, 54, 18, - 151, 151, 154, 149, 533, 38, 151, 159, 159, 538, - 539, 161, 157, 7, 8, 0, 10, 11, 12, 13, - 14, 15, 16, 17, 358, 19, 20, 173, 22, 23, - 24, 54, 151, 163, 151, 159, 155, 279, 159, 20, - 162, 157, 23, 377, 162, 151, 153, 148, 149, 150, - 196, 197, 198, 199, 166, 49, 154, 54, 467, 54, - 153, 590, 591, 161, 593, 594, 212, 213, 214, 215, - 216, 217, 218, 219, 220, 221, 272, 113, 114, 275, - 276, 323, 278, 229, 42, 43, 44, 616, 617, 47, - 499, 46, 501, 48, 240, 151, 152, 136, 137, 138, - 325, 22, 141, 136, 137, 138, 145, 146, 141, 40, - 41, 21, 145, 146, 154, 311, 47, 22, 35, 159, - 37, 22, 53, 319, 320, 321, 22, 42, 151, 44, - 151, 154, 155, 279, 148, 149, 150, 491, 350, 351, - 352, 353, 354, 552, 290, 3, 4, 5, 6, 4, - 429, 363, 364, 365, 151, 4, 151, 382, 155, 154, - 155, 307, 156, 157, 0, 152, 160, 154, 162, 163, - 152, 396, 154, 398, 399, 400, 37, 323, 324, 325, - 83, 84, 18, 19, 20, 158, 22, 23, 24, 158, - 386, 387, 388, 155, 30, 31, 22, 151, 394, 4, - 152, 275, 276, 152, 278, 154, 154, 419, 420, 405, - 406, 161, 358, 4, 426, 51, 570, 152, 151, 55, - 574, 367, 9, 59, 9, 9, 7, 8, 56, 9, - 9, 9, 54, 429, 11, 161, 382, 311, 19, 20, - 152, 22, 23, 24, 151, 151, 320, 321, 22, 151, - 396, 397, 398, 399, 400, 451, 151, 453, 404, 151, - 456, 151, 151, 475, 476, 477, 478, 463, 464, 151, - 482, 483, 418, 151, 567, 154, 38, 502, 154, 154, - 505, 506, 507, 91, 92, 93, 94, 95, 96, 97, - 98, 99, 100, 4, 587, 154, 38, 154, 494, 495, - 154, 497, 498, 154, 516, 517, 151, 503, 151, 60, - 154, 157, 386, 387, 388, 154, 154, 154, 514, 154, - 394, 154, 468, 61, 62, 63, 64, 65, 66, 154, - 154, 405, 406, 154, 154, 154, 154, 154, 484, 38, - 152, 154, 22, 555, 490, 557, 558, 161, 17, 17, - 496, 547, 151, 154, 154, 4, 502, 154, 154, 505, - 506, 507, 154, 4, 154, 511, 154, 53, 151, 489, - 22, 4, 568, 569, 53, 161, 22, 451, 154, 453, - 152, 154, 456, 154, 154, 154, 154, 154, 584, 463, - 464, 154, 152, 7, 8, 152, 10, 11, 12, 13, - 14, 15, 16, 17, 154, 19, 20, 159, 22, 23, - 24, 157, 152, 152, 610, 611, 53, 17, 159, 615, - 494, 495, 618, 497, 498, 571, 152, 152, 624, 503, - 152, 627, 118, 119, 4, 49, 151, 147, 151, 22, - 514, 17, 562, 3, 4, 154, 17, 7, 8, 9, - 136, 137, 154, 139, 140, 17, 142, 143, 144, 19, - 20, 72, 22, 23, 24, 25, 26, 27, 17, 130, - 130, 130, 562, 547, 92, 534, 229, 252, 105, 111, - 40, 41, 240, 17, 89, 511, -1, 253, 56, 421, - -1, -1, -1, 53, 568, 569, 7, 8, 58, 10, - 11, 12, 13, 14, 15, 16, 17, -1, 19, 20, - 584, 22, 23, 24, 74, 75, 76, 77, 78, 79, - 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, - 90, -1, -1, -1, -1, -1, 610, 611, 49, -1, - -1, 615, 156, 157, 618, -1, 160, -1, 162, 163, - 624, -1, -1, 627, -1, -1, 116, 117, 118, 119, - 120, 121, 122, 123, 124, 125, 126, 127, 128, -1, - 130, -1, 132, 133, 134, -1, 136, 137, -1, 139, - 140, -1, 142, 143, 144, 3, 4, -1, -1, 7, - 8, 9, -1, -1, -1, -1, -1, -1, -1, -1, - 160, 19, 20, -1, 22, 23, 24, 25, 26, 27, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, 40, 41, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, 54, -1, -1, -1, - 58, -1, -1, -1, -1, 156, 157, -1, -1, 160, - -1, 162, 163, -1, -1, -1, 74, 75, 76, 77, + 0, 27, 269, 128, 0, 304, 216, 28, 460, 21, + 54, 54, 353, 4, 11, 54, 11, 17, 121, 448, + 449, 17, 217, 52, 154, 91, 11, 270, 21, 593, + 11, 34, 20, 34, 58, 23, 29, 277, 67, 54, + 280, 281, 282, 283, 284, 155, 610, 290, 288, 154, + 160, 77, 53, 18, 7, 8, 68, 10, 11, 12, + 13, 14, 15, 16, 17, 131, 19, 20, 53, 22, + 23, 24, 53, 11, 155, 68, 102, 54, 507, 17, + 106, 155, 54, 164, 152, 155, 112, 319, 320, 321, + 164, 155, 118, 93, 164, 154, 49, 549, 201, 46, + 164, 48, 128, 0, 54, 155, 558, 559, 152, 152, + 305, 306, 162, 152, 158, 7, 8, 160, 10, 11, + 12, 13, 14, 15, 16, 17, 154, 19, 20, 369, + 22, 23, 24, 54, 137, 138, 139, 152, 54, 142, + 206, 54, 163, 146, 147, 597, 598, 162, 600, 601, + 216, 254, 255, 256, 257, 258, 497, 49, 261, 262, + 263, 22, 394, 160, 154, 160, 192, 193, 620, 621, + 196, 164, 163, 22, 414, 152, 202, 22, 155, 156, + 152, 7, 8, 155, 156, 526, 37, 528, 428, 158, + 430, 431, 432, 19, 20, 155, 22, 23, 24, 35, + 160, 37, 152, 22, 157, 158, 156, 160, 161, 4, + 163, 510, 155, 19, 32, 33, 22, 19, 24, 162, + 22, 152, 24, 219, 349, 328, 329, 467, 54, 4, + 571, 152, 335, 131, 68, 156, 152, 153, 156, 152, + 153, 267, 367, 453, 149, 150, 151, 53, 159, 275, + 276, 277, 278, 279, 280, 281, 282, 283, 284, 285, + 286, 287, 288, 115, 116, 157, 158, 114, 115, 161, + 296, 163, 164, 42, 43, 44, 342, 159, 47, 345, + 346, 307, 348, 582, 42, 4, 44, 586, 60, 355, + 38, 531, 532, 533, 153, 152, 155, 363, 364, 365, + 83, 84, 405, 406, 407, 408, 152, 410, 411, 40, + 41, 152, 579, 119, 120, 152, 47, 3, 4, 5, + 6, 152, 53, 349, 350, 351, 152, 594, 153, 152, + 155, 137, 138, 22, 140, 141, 152, 143, 144, 145, + 152, 367, 368, 369, 155, 153, 3, 4, 5, 6, + 4, 152, 418, 419, 420, 153, 153, 155, 162, 9, + 426, 464, 465, 9, 9, 9, 9, 9, 394, 26, + 27, 437, 438, 54, 400, 22, 152, 42, 43, 44, + 45, 46, 47, 48, 152, 50, 412, 453, 414, 137, + 138, 139, 56, 11, 142, 162, 153, 22, 146, 147, + 152, 155, 428, 429, 430, 431, 432, 38, 155, 155, + 436, 514, 155, 516, 517, 481, 155, 483, 7, 8, + 486, 155, 155, 155, 450, 155, 155, 493, 494, 155, + 19, 20, 155, 22, 23, 24, 38, 155, 155, 4, + 38, 467, 155, 22, 342, 155, 53, 345, 346, 155, + 348, 155, 155, 158, 155, 521, 522, 355, 524, 525, + 137, 138, 139, 529, 155, 142, 364, 365, 155, 146, + 147, 155, 498, 155, 540, 61, 62, 63, 64, 65, + 66, 153, 162, 509, 149, 150, 151, 92, 93, 94, + 95, 96, 97, 98, 99, 100, 101, 523, 153, 155, + 566, 17, 155, 155, 153, 531, 532, 533, 508, 17, + 4, 537, 119, 120, 580, 581, 153, 152, 4, 155, + 418, 419, 420, 155, 162, 591, 155, 155, 426, 155, + 137, 138, 155, 140, 141, 155, 143, 144, 145, 437, + 438, 152, 155, 22, 4, 153, 155, 153, 614, 615, + 53, 155, 153, 619, 153, 158, 622, 583, 153, 17, + 160, 53, 628, 160, 4, 631, 148, 152, 152, 17, + 22, 17, 572, 26, 27, 155, 17, 155, 73, 17, + 273, 93, 274, 481, 550, 483, 572, 183, 486, 183, + 183, 112, 106, 307, 296, 493, 494, 7, 8, 17, + 10, 11, 12, 13, 14, 15, 16, 17, 89, 19, + 20, 56, 22, 23, 24, 537, 425, -1, -1, -1, + -1, -1, -1, 521, 522, -1, 524, 525, -1, -1, + -1, 529, -1, -1, -1, -1, -1, -1, -1, 49, + -1, 0, 540, -1, -1, 98, 99, 100, 101, 102, + 103, 104, 105, 106, 107, 108, 109, 110, 111, 18, + 19, 20, -1, 22, 23, 24, -1, -1, 566, -1, + -1, 30, 31, -1, -1, -1, -1, -1, -1, -1, + -1, -1, 580, 581, -1, 3, 4, -1, -1, 7, + 8, 9, 51, 591, -1, -1, 55, -1, -1, -1, + 59, 19, 20, -1, 22, 23, 24, 25, 26, 27, + -1, -1, -1, -1, -1, -1, 614, 615, -1, -1, + -1, 619, 40, 41, 622, -1, -1, -1, -1, -1, + 628, -1, -1, 631, -1, 53, -1, -1, -1, -1, + 58, -1, -1, -1, -1, -1, -1, 157, 158, -1, + -1, 161, -1, 163, 164, -1, -1, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, - 88, 89, 90, -1, -1, 7, 8, -1, 10, 11, - 12, 13, 14, 15, 16, 17, -1, 19, 20, -1, - 22, 23, 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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 111, 112, 113, -1, -1, 116, - 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, - 127, 128, 129, 130, 131, 132, 133, 134, 135 + -1, -1, -1, -1, -1, -1, -1, -1, 36, -1, + -1, -1, -1, -1, -1, -1, 157, 158, -1, -1, + 161, -1, 163, -1, -1, -1, -1, -1, 56, 57, + -1, -1, -1, -1, 157, 158, -1, -1, 161, -1, + 163, 69, 70, 71, 72, 73, 74, 75, 76, 77, + 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, + 88, 89, 90, 91, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 157, 158, -1, + -1, 161, -1, 163, 112, 113, 114, -1, -1, 117, + 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, + 128, 129, 130, 131, 132, 133, 134, 135, 136 }; /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing @@ -2598,68 +2614,69 @@ static const yytype_uint8 yystos[] = { 0, 19, 20, 22, 23, 24, 30, 31, 51, 55, - 59, 173, 176, 177, 178, 179, 211, 212, 213, 215, - 214, 52, 67, 220, 153, 58, 153, 18, 153, 42, - 43, 44, 45, 46, 47, 48, 50, 148, 149, 150, - 180, 181, 182, 0, 213, 46, 48, 183, 230, 42, - 43, 44, 47, 184, 227, 229, 237, 153, 153, 157, - 221, 22, 219, 7, 8, 10, 11, 12, 13, 14, - 15, 16, 17, 49, 156, 157, 160, 162, 173, 177, - 198, 199, 233, 182, 182, 35, 37, 209, 182, 182, - 21, 238, 239, 29, 163, 228, 238, 22, 22, 22, - 222, 151, 4, 4, 4, 162, 10, 163, 199, 204, - 54, 151, 175, 209, 209, 42, 44, 185, 32, 33, - 208, 61, 62, 63, 64, 65, 66, 186, 225, 225, - 176, 242, 154, 159, 39, 199, 200, 202, 203, 158, - 158, 163, 204, 154, 163, 151, 203, 155, 208, 208, - 10, 122, 199, 201, 210, 11, 12, 13, 14, 15, - 16, 171, 172, 199, 205, 4, 201, 28, 162, 226, - 36, 56, 57, 68, 69, 70, 71, 72, 73, 74, - 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, - 85, 86, 87, 88, 89, 90, 111, 112, 113, 116, - 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, - 127, 128, 129, 130, 131, 132, 133, 134, 135, 166, - 167, 168, 240, 246, 247, 248, 249, 22, 188, 154, - 152, 199, 199, 161, 163, 199, 4, 152, 205, 199, - 151, 233, 26, 27, 3, 4, 5, 6, 9, 25, - 40, 41, 89, 90, 116, 130, 132, 133, 134, 157, - 160, 162, 164, 166, 167, 168, 206, 233, 175, 177, - 56, 10, 199, 235, 236, 11, 17, 11, 171, 186, - 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, - 169, 26, 27, 97, 98, 99, 100, 101, 102, 103, - 104, 105, 106, 107, 108, 109, 110, 170, 199, 199, - 235, 199, 199, 243, 235, 235, 235, 235, 235, 199, - 199, 199, 235, 186, 114, 115, 53, 118, 119, 136, - 137, 139, 140, 142, 143, 144, 187, 39, 200, 190, - 159, 161, 161, 152, 190, 175, 175, 210, 169, 170, - 151, 151, 151, 151, 151, 159, 205, 207, 162, 207, - 163, 207, 22, 151, 151, 151, 216, 151, 3, 4, - 9, 25, 26, 27, 40, 41, 58, 160, 206, 232, - 233, 234, 154, 234, 234, 234, 201, 199, 199, 154, - 193, 154, 193, 234, 157, 154, 154, 154, 154, 154, - 154, 233, 234, 234, 38, 201, 199, 235, 4, 136, - 137, 138, 141, 145, 146, 189, 217, 218, 38, 151, - 151, 205, 205, 205, 205, 205, 154, 159, 163, 199, - 207, 161, 163, 205, 205, 205, 154, 196, 39, 199, - 223, 224, 60, 231, 207, 235, 154, 154, 234, 234, - 234, 11, 53, 11, 245, 234, 157, 235, 199, 235, - 235, 235, 154, 154, 154, 199, 234, 234, 154, 196, - 196, 199, 205, 205, 245, 154, 154, 154, 154, 205, - 161, 163, 154, 154, 38, 34, 53, 194, 197, 188, - 154, 152, 22, 161, 17, 17, 151, 154, 154, 234, - 4, 234, 154, 154, 234, 154, 154, 154, 4, 234, - 234, 151, 154, 193, 199, 152, 154, 154, 152, 205, - 205, 205, 205, 161, 205, 205, 199, 22, 4, 196, - 173, 174, 39, 199, 190, 154, 234, 234, 17, 199, - 244, 234, 234, 193, 193, 235, 234, 154, 235, 235, - 235, 244, 234, 205, 205, 154, 152, 154, 154, 152, - 152, 152, 188, 194, 195, 22, 154, 157, 188, 188, - 152, 154, 159, 234, 152, 193, 152, 152, 205, 205, - 205, 174, 53, 192, 17, 159, 171, 241, 118, 119, - 234, 234, 190, 17, 199, 159, 190, 152, 152, 152, - 4, 147, 191, 234, 232, 159, 171, 188, 188, 38, - 188, 188, 22, 154, 232, 17, 234, 234, 17, 154, - 234, 188, 188, 234, 17, 72, 234, 17, 234 + 59, 174, 177, 178, 179, 180, 212, 213, 214, 216, + 215, 52, 67, 221, 154, 58, 154, 18, 154, 42, + 43, 44, 45, 46, 47, 48, 50, 149, 150, 151, + 181, 182, 183, 0, 214, 46, 48, 184, 231, 42, + 43, 44, 47, 185, 228, 230, 238, 154, 154, 158, + 222, 22, 220, 7, 8, 10, 11, 12, 13, 14, + 15, 16, 17, 49, 157, 158, 161, 163, 174, 178, + 199, 200, 234, 183, 183, 35, 37, 210, 183, 183, + 21, 68, 239, 240, 29, 164, 229, 239, 22, 22, + 22, 223, 152, 4, 4, 4, 163, 10, 164, 200, + 205, 54, 152, 176, 210, 210, 42, 44, 186, 32, + 33, 209, 61, 62, 63, 64, 65, 66, 187, 226, + 226, 68, 3, 4, 9, 25, 26, 27, 40, 41, + 58, 75, 76, 77, 78, 79, 80, 81, 82, 83, + 84, 85, 86, 87, 88, 89, 90, 91, 117, 118, + 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, + 129, 131, 133, 134, 135, 161, 167, 168, 169, 207, + 233, 234, 235, 177, 243, 155, 160, 39, 200, 201, + 203, 204, 159, 159, 164, 205, 155, 164, 152, 204, + 156, 209, 209, 10, 123, 200, 202, 211, 11, 12, + 13, 14, 15, 16, 172, 173, 200, 206, 4, 202, + 28, 163, 227, 235, 60, 232, 92, 93, 94, 95, + 96, 97, 98, 99, 100, 101, 170, 26, 27, 98, + 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, + 109, 110, 111, 171, 152, 152, 152, 152, 152, 206, + 208, 152, 152, 152, 36, 56, 57, 69, 70, 71, + 72, 73, 74, 90, 91, 112, 113, 114, 117, 130, + 131, 132, 133, 134, 135, 136, 167, 168, 169, 241, + 247, 248, 249, 250, 22, 189, 155, 153, 200, 200, + 162, 164, 200, 4, 153, 206, 200, 152, 234, 26, + 27, 3, 4, 5, 6, 9, 25, 40, 41, 158, + 161, 163, 165, 207, 234, 176, 178, 22, 152, 152, + 206, 206, 206, 206, 206, 155, 162, 206, 206, 206, + 56, 10, 200, 236, 237, 11, 17, 11, 172, 187, + 170, 171, 200, 200, 236, 200, 200, 244, 236, 236, + 236, 236, 236, 200, 200, 200, 236, 187, 115, 116, + 53, 119, 120, 137, 138, 140, 141, 143, 144, 145, + 188, 39, 201, 191, 160, 162, 162, 153, 191, 176, + 176, 211, 160, 208, 163, 208, 164, 208, 22, 217, + 152, 155, 206, 206, 246, 155, 155, 155, 155, 206, + 155, 155, 38, 235, 155, 235, 235, 235, 202, 200, + 200, 155, 194, 155, 194, 235, 158, 155, 155, 155, + 155, 155, 155, 234, 235, 235, 38, 202, 200, 236, + 4, 137, 138, 139, 142, 146, 147, 190, 218, 219, + 38, 160, 164, 200, 208, 162, 164, 155, 197, 39, + 200, 224, 225, 22, 155, 155, 153, 155, 206, 206, + 206, 206, 206, 206, 200, 236, 155, 155, 235, 235, + 235, 11, 53, 11, 246, 235, 158, 236, 200, 236, + 236, 236, 155, 155, 155, 200, 235, 235, 155, 197, + 197, 200, 162, 164, 34, 53, 195, 198, 189, 155, + 153, 206, 206, 236, 155, 153, 155, 155, 153, 153, + 153, 17, 17, 152, 155, 155, 235, 4, 235, 155, + 235, 155, 155, 155, 4, 235, 235, 152, 155, 194, + 200, 153, 162, 22, 4, 197, 174, 175, 39, 200, + 191, 153, 153, 206, 206, 206, 235, 235, 17, 200, + 245, 235, 235, 194, 194, 235, 155, 236, 236, 236, + 245, 235, 189, 195, 196, 153, 153, 153, 155, 158, + 189, 189, 153, 155, 160, 235, 153, 194, 175, 53, + 193, 17, 160, 172, 242, 119, 120, 235, 235, 191, + 17, 200, 160, 191, 4, 148, 192, 235, 233, 160, + 172, 189, 189, 38, 189, 189, 22, 155, 233, 17, + 235, 235, 17, 155, 235, 189, 189, 235, 17, 73, + 235, 17, 235 }; #define yyerrok (yyerrstatus = 0) @@ -3474,152 +3491,152 @@ switch (yyn) { case 29: -#line 1121 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1119 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_EQ; ;} break; case 30: -#line 1121 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1119 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_NE; ;} break; case 31: -#line 1122 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1120 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_SLT; ;} break; case 32: -#line 1122 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1120 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_SGT; ;} break; case 33: -#line 1123 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1121 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_SLE; ;} break; case 34: -#line 1123 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1121 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_SGE; ;} break; case 35: -#line 1124 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1122 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_ULT; ;} break; case 36: -#line 1124 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1122 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_UGT; ;} break; case 37: -#line 1125 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1123 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_ULE; ;} break; case 38: -#line 1125 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1123 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.IPredicate) = ICmpInst::ICMP_UGE; ;} break; case 39: -#line 1129 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1127 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_OEQ; ;} break; case 40: -#line 1129 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1127 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_ONE; ;} break; case 41: -#line 1130 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1128 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_OLT; ;} break; case 42: -#line 1130 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1128 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_OGT; ;} break; case 43: -#line 1131 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1129 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_OLE; ;} break; case 44: -#line 1131 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1129 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_OGE; ;} break; case 45: -#line 1132 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1130 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_ORD; ;} break; case 46: -#line 1132 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1130 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_UNO; ;} break; case 47: -#line 1133 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1131 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_UEQ; ;} break; case 48: -#line 1133 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1131 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_UNE; ;} break; case 49: -#line 1134 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1132 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_ULT; ;} break; case 50: -#line 1134 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1132 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_UGT; ;} break; case 51: -#line 1135 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1133 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_ULE; ;} break; case 52: -#line 1135 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1133 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_UGE; ;} break; case 53: -#line 1136 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1134 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_TRUE; ;} break; case 54: -#line 1137 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1135 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FPredicate) = FCmpInst::FCMP_FALSE; ;} break; case 65: -#line 1146 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1144 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = 0; ;} break; case 66: -#line 1148 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1146 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal)=(yyvsp[(3) - (4)].UInt64Val); ;} break; case 67: -#line 1149 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1147 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal)=0; ;} break; case 68: -#line 1153 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1151 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = (yyvsp[(1) - (2)].StrVal); CHECK_FOR_ERROR @@ -3627,7 +3644,7 @@ break; case 69: -#line 1157 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1155 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = 0; CHECK_FOR_ERROR @@ -3635,7 +3652,7 @@ break; case 73: -#line 1165 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1163 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = 0; CHECK_FOR_ERROR @@ -3643,7 +3660,7 @@ break; case 74: -#line 1170 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1168 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = (yyvsp[(1) - (2)].StrVal); CHECK_FOR_ERROR @@ -3651,152 +3668,152 @@ break; case 75: -#line 1176 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1174 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::InternalLinkage; ;} break; case 76: -#line 1177 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1175 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::WeakLinkage; ;} break; case 77: -#line 1178 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1176 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;} break; case 78: -#line 1179 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1177 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::AppendingLinkage; ;} break; case 79: -#line 1180 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1178 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;} break; case 80: -#line 1184 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1182 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;} break; case 81: -#line 1185 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1183 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;} break; case 82: -#line 1186 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1184 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} break; case 83: -#line 1190 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1188 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Visibility) = GlobalValue::DefaultVisibility; ;} break; case 84: -#line 1191 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1189 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Visibility) = GlobalValue::DefaultVisibility; ;} break; case 85: -#line 1192 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1190 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Visibility) = GlobalValue::HiddenVisibility; ;} break; case 86: -#line 1193 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1191 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Visibility) = GlobalValue::ProtectedVisibility; ;} break; case 87: -#line 1197 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1195 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} break; case 88: -#line 1198 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1196 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;} break; case 89: -#line 1199 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1197 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;} break; case 90: -#line 1203 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1201 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} break; case 91: -#line 1204 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1202 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::InternalLinkage; ;} break; case 92: -#line 1205 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1203 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;} break; case 93: -#line 1206 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1204 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::WeakLinkage; ;} break; case 94: -#line 1207 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1205 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;} break; case 95: -#line 1211 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1209 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;} break; case 96: -#line 1212 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1210 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::WeakLinkage; ;} break; case 97: -#line 1213 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1211 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.Linkage) = GlobalValue::InternalLinkage; ;} break; case 98: -#line 1216 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1214 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::C; ;} break; case 99: -#line 1217 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1215 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::C; ;} break; case 100: -#line 1218 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1216 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::Fast; ;} break; case 101: -#line 1219 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1217 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::Cold; ;} break; case 102: -#line 1220 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1218 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::X86_StdCall; ;} break; case 103: -#line 1221 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1219 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = CallingConv::X86_FastCall; ;} break; case 104: -#line 1222 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1220 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((unsigned)(yyvsp[(2) - (2)].UInt64Val) != (yyvsp[(2) - (2)].UInt64Val)) GEN_ERROR("Calling conv too large"); @@ -3806,129 +3823,129 @@ break; case 105: -#line 1229 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1227 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ZExt; ;} break; case 106: -#line 1230 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1228 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ZExt; ;} break; case 107: -#line 1231 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1229 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::SExt; ;} break; case 108: -#line 1232 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1230 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::SExt; ;} break; case 109: -#line 1233 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1231 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::InReg; ;} break; case 110: -#line 1234 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1232 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::StructRet; ;} break; case 111: -#line 1235 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1233 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::NoAlias; ;} break; case 112: -#line 1236 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1234 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ByVal; ;} break; case 113: -#line 1237 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1235 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::Nest; ;} break; case 114: -#line 1238 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1236 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::constructAlignmentFromInt((yyvsp[(2) - (2)].UInt64Val)); ;} break; case 115: -#line 1242 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1240 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::None; ;} break; case 116: -#line 1243 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1241 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = (yyvsp[(1) - (2)].ParamAttrs) | (yyvsp[(2) - (2)].ParamAttrs); ;} break; case 117: -#line 1248 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1246 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::NoReturn; ;} break; case 118: -#line 1249 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1247 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::NoUnwind; ;} break; case 119: -#line 1250 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1248 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ZExt; ;} break; case 120: -#line 1251 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1249 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::SExt; ;} break; case 121: -#line 1252 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1250 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ReadNone; ;} break; case 122: -#line 1253 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1251 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::ReadOnly; ;} break; case 123: -#line 1256 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1254 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = ParamAttr::None; ;} break; case 124: -#line 1257 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1255 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamAttrs) = (yyvsp[(1) - (2)].ParamAttrs) | (yyvsp[(2) - (2)].ParamAttrs); ;} break; case 125: -#line 1262 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1260 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = 0; ;} break; case 126: -#line 1263 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1261 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = (yyvsp[(2) - (2)].StrVal); ;} break; case 127: -#line 1270 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1268 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = 0; ;} break; case 128: -#line 1271 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1269 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = (yyvsp[(2) - (2)].UInt64Val); if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal))) @@ -3938,12 +3955,12 @@ break; case 129: -#line 1277 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1275 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = 0; ;} break; case 130: -#line 1278 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1276 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.UIntVal) = (yyvsp[(3) - (3)].UInt64Val); if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal))) @@ -3953,7 +3970,7 @@ break; case 131: -#line 1287 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1285 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { for (unsigned i = 0, e = (yyvsp[(2) - (2)].StrVal)->length(); i != e; ++i) if ((*(yyvsp[(2) - (2)].StrVal))[i] == '"' || (*(yyvsp[(2) - (2)].StrVal))[i] == '\\') @@ -3964,27 +3981,27 @@ break; case 132: -#line 1295 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1293 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = 0; ;} break; case 133: -#line 1296 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1294 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.StrVal) = (yyvsp[(1) - (1)].StrVal); ;} break; case 134: -#line 1301 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1299 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" {;} break; case 135: -#line 1302 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1300 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" {;} break; case 136: -#line 1303 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1301 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV->setSection(*(yyvsp[(1) - (1)].StrVal)); delete (yyvsp[(1) - (1)].StrVal); @@ -3993,7 +4010,7 @@ break; case 137: -#line 1308 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1306 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(2) - (2)].UInt64Val) != 0 && !isPowerOf2_32((yyvsp[(2) - (2)].UInt64Val))) GEN_ERROR("Alignment must be a power of two"); @@ -4003,7 +4020,7 @@ break; case 145: -#line 1324 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1322 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeVal) = new PATypeHolder(OpaqueType::get()); CHECK_FOR_ERROR @@ -4011,7 +4028,7 @@ break; case 146: -#line 1328 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1326 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeVal) = new PATypeHolder((yyvsp[(1) - (1)].PrimType)); CHECK_FOR_ERROR @@ -4019,7 +4036,7 @@ break; case 147: -#line 1332 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1330 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Pointer type? if (*(yyvsp[(1) - (3)].TypeVal) == Type::LabelTy) GEN_ERROR("Cannot form a pointer to a basic block"); @@ -4030,7 +4047,7 @@ break; case 148: -#line 1339 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1337 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Named types are also simple types... const Type* tmp = getTypeVal((yyvsp[(1) - (1)].ValIDVal)); CHECK_FOR_ERROR @@ -4039,7 +4056,7 @@ break; case 149: -#line 1344 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1342 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Type UpReference if ((yyvsp[(2) - (2)].UInt64Val) > (uint64_t)~0U) GEN_ERROR("Value out of range"); OpaqueType *OT = OpaqueType::get(); // Use temporary placeholder @@ -4051,7 +4068,7 @@ break; case 150: -#line 1352 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1350 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Allow but ignore attributes on function types; this permits auto-upgrade. // FIXME: remove in LLVM 3.0. @@ -4085,7 +4102,7 @@ break; case 151: -#line 1382 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1380 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Allow but ignore attributes on function types; this permits auto-upgrade. // FIXME: remove in LLVM 3.0. @@ -4113,7 +4130,7 @@ break; case 152: -#line 1407 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1405 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Sized array type? (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(ArrayType::get(*(yyvsp[(4) - (5)].TypeVal), (unsigned)(yyvsp[(2) - (5)].UInt64Val)))); delete (yyvsp[(4) - (5)].TypeVal); @@ -4122,7 +4139,7 @@ break; case 153: -#line 1412 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1410 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Vector type? const llvm::Type* ElemTy = (yyvsp[(4) - (5)].TypeVal)->get(); if ((unsigned)(yyvsp[(2) - (5)].UInt64Val) != (yyvsp[(2) - (5)].UInt64Val)) @@ -4136,7 +4153,7 @@ break; case 154: -#line 1422 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1420 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Structure type? std::vector Elements; for (std::list::iterator I = (yyvsp[(2) - (3)].TypeList)->begin(), @@ -4150,7 +4167,7 @@ break; case 155: -#line 1432 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1430 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty structure type? (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector())); CHECK_FOR_ERROR @@ -4158,7 +4175,7 @@ break; case 156: -#line 1436 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1434 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { std::vector Elements; for (std::list::iterator I = (yyvsp[(3) - (5)].TypeList)->begin(), @@ -4172,7 +4189,7 @@ break; case 157: -#line 1446 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1444 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty structure type? (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector(), true)); CHECK_FOR_ERROR @@ -4180,7 +4197,7 @@ break; case 158: -#line 1453 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1451 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Allow but ignore attributes on function types; this permits auto-upgrade. // FIXME: remove in LLVM 3.0. @@ -4190,7 +4207,7 @@ break; case 159: -#line 1462 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1460 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (1)].TypeVal))->getDescription()); @@ -4201,14 +4218,14 @@ break; case 160: -#line 1469 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1467 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeVal) = new PATypeHolder(Type::VoidTy); ;} break; case 161: -#line 1474 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1472 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList) = new TypeWithAttrsList(); (yyval.TypeWithAttrsList)->push_back((yyvsp[(1) - (1)].TypeWithAttrs)); @@ -4217,7 +4234,7 @@ break; case 162: -#line 1479 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1477 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.TypeWithAttrsList)=(yyvsp[(1) - (3)].TypeWithAttrsList))->push_back((yyvsp[(3) - (3)].TypeWithAttrs)); CHECK_FOR_ERROR @@ -4225,7 +4242,7 @@ break; case 164: -#line 1487 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1485 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList)=(yyvsp[(1) - (3)].TypeWithAttrsList); TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None; @@ -4236,7 +4253,7 @@ break; case 165: -#line 1494 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1492 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList) = new TypeWithAttrsList; TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None; @@ -4247,7 +4264,7 @@ break; case 166: -#line 1501 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1499 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeWithAttrsList) = new TypeWithAttrsList(); CHECK_FOR_ERROR @@ -4255,7 +4272,7 @@ break; case 167: -#line 1509 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1507 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TypeList) = new std::list(); (yyval.TypeList)->push_back(*(yyvsp[(1) - (1)].TypeVal)); @@ -4265,7 +4282,7 @@ break; case 168: -#line 1515 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1513 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.TypeList)=(yyvsp[(1) - (3)].TypeList))->push_back(*(yyvsp[(3) - (3)].TypeVal)); delete (yyvsp[(3) - (3)].TypeVal); @@ -4274,7 +4291,7 @@ break; case 169: -#line 1527 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1525 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized arr if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (4)].TypeVal))->getDescription()); @@ -4306,7 +4323,7 @@ break; case 170: -#line 1555 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1553 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription()); @@ -4326,7 +4343,7 @@ break; case 171: -#line 1571 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1569 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription()); @@ -4357,7 +4374,7 @@ break; case 172: -#line 1598 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1596 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized arr if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (4)].TypeVal))->getDescription()); @@ -4389,7 +4406,7 @@ break; case 173: -#line 1626 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1624 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { const StructType *STy = dyn_cast((yyvsp[(1) - (4)].TypeVal)->get()); if (STy == 0) @@ -4419,7 +4436,7 @@ break; case 174: -#line 1652 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1650 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription()); @@ -4443,7 +4460,7 @@ break; case 175: -#line 1672 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1670 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { const StructType *STy = dyn_cast((yyvsp[(1) - (6)].TypeVal)->get()); if (STy == 0) @@ -4473,7 +4490,7 @@ break; case 176: -#line 1698 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1696 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (5)].TypeVal))->getDescription()); @@ -4497,7 +4514,7 @@ break; case 177: -#line 1718 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1716 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -4513,7 +4530,7 @@ break; case 178: -#line 1730 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1728 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -4524,7 +4541,7 @@ break; case 179: -#line 1737 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1735 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -4594,7 +4611,7 @@ break; case 180: -#line 1803 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1801 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -4608,7 +4625,7 @@ break; case 181: -#line 1813 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1811 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -4622,7 +4639,7 @@ break; case 182: -#line 1823 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1821 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // integral constants if (!ConstantInt::isValueValidForType((yyvsp[(1) - (2)].PrimType), (yyvsp[(2) - (2)].SInt64Val))) GEN_ERROR("Constant value doesn't fit in type"); @@ -4632,7 +4649,7 @@ break; case 183: -#line 1829 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1827 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // arbitrary precision integer constants uint32_t BitWidth = cast((yyvsp[(1) - (2)].PrimType))->getBitWidth(); if ((yyvsp[(2) - (2)].APIntVal)->getBitWidth() > BitWidth) { @@ -4646,7 +4663,7 @@ break; case 184: -#line 1839 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1837 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // integral constants if (!ConstantInt::isValueValidForType((yyvsp[(1) - (2)].PrimType), (yyvsp[(2) - (2)].UInt64Val))) GEN_ERROR("Constant value doesn't fit in type"); @@ -4656,7 +4673,7 @@ break; case 185: -#line 1845 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1843 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // arbitrary precision integer constants uint32_t BitWidth = cast((yyvsp[(1) - (2)].PrimType))->getBitWidth(); if ((yyvsp[(2) - (2)].APIntVal)->getBitWidth() > BitWidth) { @@ -4670,7 +4687,7 @@ break; case 186: -#line 1855 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1853 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Boolean constants assert(cast((yyvsp[(1) - (2)].PrimType))->getBitWidth() == 1 && "Not Bool?"); (yyval.ConstVal) = ConstantInt::getTrue(); @@ -4679,7 +4696,7 @@ break; case 187: -#line 1860 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1858 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Boolean constants assert(cast((yyvsp[(1) - (2)].PrimType))->getBitWidth() == 1 && "Not Bool?"); (yyval.ConstVal) = ConstantInt::getFalse(); @@ -4688,7 +4705,7 @@ break; case 188: -#line 1865 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1863 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Floating point constants if (!ConstantFP::isValueValidForType((yyvsp[(1) - (2)].PrimType), *(yyvsp[(2) - (2)].FPVal))) GEN_ERROR("Floating point constant invalid for type"); @@ -4703,7 +4720,7 @@ break; case 189: -#line 1878 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1876 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(5) - (6)].TypeVal))->getDescription()); @@ -4719,7 +4736,7 @@ break; case 190: -#line 1890 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1888 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa((yyvsp[(3) - (5)].ConstVal)->getType())) GEN_ERROR("GetElementPtr requires a pointer operand"); @@ -4745,7 +4762,7 @@ break; case 191: -#line 1912 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1910 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(3) - (8)].ConstVal)->getType() != Type::Int1Ty) GEN_ERROR("Select condition must be of boolean type"); @@ -4757,7 +4774,7 @@ break; case 192: -#line 1920 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1918 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(3) - (6)].ConstVal)->getType() != (yyvsp[(5) - (6)].ConstVal)->getType()) GEN_ERROR("Binary operator types must match"); @@ -4767,7 +4784,7 @@ break; case 193: -#line 1926 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1924 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(3) - (6)].ConstVal)->getType() != (yyvsp[(5) - (6)].ConstVal)->getType()) GEN_ERROR("Logical operator types must match"); @@ -4782,7 +4799,7 @@ break; case 194: -#line 1937 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1935 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType()) GEN_ERROR("icmp operand types must match"); @@ -4791,7 +4808,7 @@ break; case 195: -#line 1942 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1940 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType()) GEN_ERROR("fcmp operand types must match"); @@ -4800,7 +4817,7 @@ break; case 196: -#line 1947 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1945 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ExtractElementInst::isValidOperands((yyvsp[(3) - (6)].ConstVal), (yyvsp[(5) - (6)].ConstVal))) GEN_ERROR("Invalid extractelement operands"); @@ -4810,7 +4827,7 @@ break; case 197: -#line 1953 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1951 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!InsertElementInst::isValidOperands((yyvsp[(3) - (8)].ConstVal), (yyvsp[(5) - (8)].ConstVal), (yyvsp[(7) - (8)].ConstVal))) GEN_ERROR("Invalid insertelement operands"); @@ -4820,7 +4837,7 @@ break; case 198: -#line 1959 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1957 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ShuffleVectorInst::isValidOperands((yyvsp[(3) - (8)].ConstVal), (yyvsp[(5) - (8)].ConstVal), (yyvsp[(7) - (8)].ConstVal))) GEN_ERROR("Invalid shufflevector operands"); @@ -4830,7 +4847,7 @@ break; case 199: -#line 1968 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1966 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.ConstVector) = (yyvsp[(1) - (3)].ConstVector))->push_back((yyvsp[(3) - (3)].ConstVal)); CHECK_FOR_ERROR @@ -4838,7 +4855,7 @@ break; case 200: -#line 1972 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1970 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ConstVector) = new std::vector(); (yyval.ConstVector)->push_back((yyvsp[(1) - (1)].ConstVal)); @@ -4847,27 +4864,27 @@ break; case 201: -#line 1980 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1978 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; ;} break; case 202: -#line 1980 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1978 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; ;} break; case 203: -#line 1983 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1981 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; ;} break; case 204: -#line 1983 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1981 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; ;} break; case 205: -#line 1986 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1984 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { const Type* VTy = (yyvsp[(1) - (2)].TypeVal)->get(); Value *V = getVal(VTy, (yyvsp[(2) - (2)].ValIDVal)); @@ -4883,7 +4900,7 @@ break; case 206: -#line 1998 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 1996 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { Constant *Val = (yyvsp[(3) - (6)].ConstVal); const Type *DestTy = (yyvsp[(5) - (6)].TypeVal)->get(); @@ -4899,7 +4916,7 @@ break; case 207: -#line 2019 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2017 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule; CurModule.ModuleDone(); @@ -4908,7 +4925,7 @@ break; case 208: -#line 2024 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2022 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule; CurModule.ModuleDone(); @@ -4917,12 +4934,12 @@ break; case 211: -#line 2037 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2035 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.isDeclare = false; ;} break; case 212: -#line 2037 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2035 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.FunctionDone(); CHECK_FOR_ERROR @@ -4930,26 +4947,26 @@ break; case 213: -#line 2041 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2039 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.isDeclare = true; ;} break; case 214: -#line 2041 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2039 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 215: -#line 2044 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2042 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 216: -#line 2047 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2045 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (3)].TypeVal))->getDescription()); @@ -4977,7 +4994,7 @@ break; case 217: -#line 2071 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2069 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { ResolveTypeTo((yyvsp[(1) - (3)].StrVal), (yyvsp[(3) - (3)].PrimType)); @@ -4992,7 +5009,7 @@ break; case 218: -#line 2083 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2081 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { /* "Externally Visible" Linkage */ if ((yyvsp[(5) - (6)].ConstVal) == 0) @@ -5004,14 +5021,14 @@ break; case 219: -#line 2090 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2088 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ;} break; case 220: -#line 2094 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2092 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(6) - (7)].ConstVal) == 0) GEN_ERROR("Global value initializer is not a constant"); @@ -5021,14 +5038,14 @@ break; case 221: -#line 2099 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2097 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; ;} break; case 222: -#line 2103 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2101 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(6) - (7)].TypeVal))->getDescription()); @@ -5039,7 +5056,7 @@ break; case 223: -#line 2109 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2107 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurGV = 0; CHECK_FOR_ERROR @@ -5047,7 +5064,7 @@ break; case 224: -#line 2113 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2111 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { std::string Name; if ((yyvsp[(1) - (5)].StrVal)) { @@ -5091,21 +5108,21 @@ break; case 225: -#line 2153 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2151 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 226: -#line 2156 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2154 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 227: -#line 2162 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2160 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { const std::string &AsmSoFar = CurModule.CurrentModule->getModuleInlineAsm(); if (AsmSoFar.empty()) @@ -5118,7 +5135,7 @@ break; case 228: -#line 2172 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2170 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->setTargetTriple(*(yyvsp[(3) - (3)].StrVal)); delete (yyvsp[(3) - (3)].StrVal); @@ -5126,7 +5143,7 @@ break; case 229: -#line 2176 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2174 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->setDataLayout(*(yyvsp[(3) - (3)].StrVal)); delete (yyvsp[(3) - (3)].StrVal); @@ -5134,7 +5151,7 @@ break; case 231: -#line 2183 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2181 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->addLibrary(*(yyvsp[(3) - (3)].StrVal)); delete (yyvsp[(3) - (3)].StrVal); @@ -5143,7 +5160,7 @@ break; case 232: -#line 2188 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2186 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurModule.CurrentModule->addLibrary(*(yyvsp[(1) - (1)].StrVal)); delete (yyvsp[(1) - (1)].StrVal); @@ -5152,14 +5169,14 @@ break; case 233: -#line 2193 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2191 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CHECK_FOR_ERROR ;} break; case 234: -#line 2202 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2200 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (5)].TypeVal))->getDescription()); @@ -5173,7 +5190,7 @@ break; case 235: -#line 2212 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2210 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription()); @@ -5187,7 +5204,7 @@ break; case 236: -#line 2223 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2221 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = (yyvsp[(1) - (1)].ArgList); CHECK_FOR_ERROR @@ -5195,7 +5212,7 @@ break; case 237: -#line 2227 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2225 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = (yyvsp[(1) - (3)].ArgList); struct ArgListEntry E; @@ -5208,7 +5225,7 @@ break; case 238: -#line 2236 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2234 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = new ArgListType; struct ArgListEntry E; @@ -5221,7 +5238,7 @@ break; case 239: -#line 2245 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2243 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ArgList) = 0; CHECK_FOR_ERROR @@ -5229,7 +5246,7 @@ break; case 240: -#line 2251 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2249 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { std::string FunctionName(*(yyvsp[(3) - (10)].StrVal)); delete (yyvsp[(3) - (10)].StrVal); // Free strdup'd memory! @@ -5365,7 +5382,7 @@ break; case 243: -#line 2386 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2384 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FunctionVal) = CurFun.CurrentFunction; @@ -5377,7 +5394,7 @@ break; case 246: -#line 2397 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2395 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal); CHECK_FOR_ERROR @@ -5385,7 +5402,7 @@ break; case 247: -#line 2402 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2400 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { CurFun.CurrentFunction->setLinkage((yyvsp[(1) - (3)].Linkage)); CurFun.CurrentFunction->setVisibility((yyvsp[(2) - (3)].Visibility)); @@ -5396,7 +5413,7 @@ break; case 248: -#line 2414 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2412 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; CHECK_FOR_ERROR @@ -5404,7 +5421,7 @@ break; case 249: -#line 2418 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2416 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; CHECK_FOR_ERROR @@ -5412,7 +5429,7 @@ break; case 250: -#line 2423 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2421 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // A reference to a direct constant (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].SInt64Val)); CHECK_FOR_ERROR @@ -5420,7 +5437,7 @@ break; case 251: -#line 2427 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2425 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].UInt64Val)); CHECK_FOR_ERROR @@ -5428,7 +5445,7 @@ break; case 252: -#line 2431 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2429 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Perhaps it's an FP constant? (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].FPVal)); CHECK_FOR_ERROR @@ -5436,7 +5453,7 @@ break; case 253: -#line 2435 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2433 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create(ConstantInt::getTrue()); CHECK_FOR_ERROR @@ -5444,7 +5461,7 @@ break; case 254: -#line 2439 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2437 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create(ConstantInt::getFalse()); CHECK_FOR_ERROR @@ -5452,7 +5469,7 @@ break; case 255: -#line 2443 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2441 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createNull(); CHECK_FOR_ERROR @@ -5460,7 +5477,7 @@ break; case 256: -#line 2447 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2445 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createUndef(); CHECK_FOR_ERROR @@ -5468,7 +5485,7 @@ break; case 257: -#line 2451 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2449 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // A vector zero constant. (yyval.ValIDVal) = ValID::createZeroInit(); CHECK_FOR_ERROR @@ -5476,7 +5493,7 @@ break; case 258: -#line 2455 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2453 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Nonempty unsized packed vector const Type *ETy = (*(yyvsp[(2) - (3)].ConstVector))[0]->getType(); int NumElements = (yyvsp[(2) - (3)].ConstVector)->size(); @@ -5505,7 +5522,7 @@ break; case 259: -#line 2480 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2478 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].ConstVal)); CHECK_FOR_ERROR @@ -5513,7 +5530,7 @@ break; case 260: -#line 2484 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2482 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createInlineAsm(*(yyvsp[(3) - (5)].StrVal), *(yyvsp[(5) - (5)].StrVal), (yyvsp[(2) - (5)].BoolVal)); delete (yyvsp[(3) - (5)].StrVal); @@ -5523,7 +5540,7 @@ break; case 261: -#line 2494 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2492 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it an integer reference...? (yyval.ValIDVal) = ValID::createLocalID((yyvsp[(1) - (1)].UIntVal)); CHECK_FOR_ERROR @@ -5531,7 +5548,7 @@ break; case 262: -#line 2498 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2496 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValIDVal) = ValID::createGlobalID((yyvsp[(1) - (1)].UIntVal)); CHECK_FOR_ERROR @@ -5539,7 +5556,7 @@ break; case 263: -#line 2502 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2500 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it a named reference...? (yyval.ValIDVal) = ValID::createLocalName(*(yyvsp[(1) - (1)].StrVal)); delete (yyvsp[(1) - (1)].StrVal); @@ -5548,7 +5565,7 @@ break; case 264: -#line 2507 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2505 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Is it a named reference...? (yyval.ValIDVal) = ValID::createGlobalName(*(yyvsp[(1) - (1)].StrVal)); delete (yyvsp[(1) - (1)].StrVal); @@ -5557,7 +5574,7 @@ break; case 267: -#line 2520 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2518 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription()); @@ -5568,7 +5585,7 @@ break; case 268: -#line 2529 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2527 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValueList) = new std::vector(); (yyval.ValueList)->push_back((yyvsp[(1) - (1)].ValueVal)); @@ -5577,7 +5594,7 @@ break; case 269: -#line 2534 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2532 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { ((yyval.ValueList)=(yyvsp[(1) - (3)].ValueList))->push_back((yyvsp[(3) - (3)].ValueVal)); CHECK_FOR_ERROR @@ -5585,7 +5602,7 @@ break; case 270: -#line 2539 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2537 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal); CHECK_FOR_ERROR @@ -5593,7 +5610,7 @@ break; case 271: -#line 2543 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2541 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Do not allow functions with 0 basic blocks (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal); CHECK_FOR_ERROR @@ -5601,7 +5618,7 @@ break; case 272: -#line 2552 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2550 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { setValueName((yyvsp[(3) - (3)].TermInstVal), (yyvsp[(2) - (3)].StrVal)); CHECK_FOR_ERROR @@ -5613,7 +5630,7 @@ break; case 273: -#line 2561 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2559 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (CastInst *CI1 = dyn_cast((yyvsp[(2) - (2)].InstVal))) if (CastInst *CI2 = dyn_cast(CI1->getOperand(0))) @@ -5626,25 +5643,41 @@ break; case 274: -#line 2570 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2568 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Empty space between instruction lists - (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalID(CurFun.NextValNum)); + (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalID(CurFun.NextValNum), 0); CHECK_FOR_ERROR ;} break; case 275: -#line 2574 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 2572 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + { // Only the unwind to block + (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalID(CurFun.NextValNum), getBBVal((yyvsp[(2) - (2)].ValIDVal))); + CHECK_FOR_ERROR + ;} + break; + + case 276: +#line 2576 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Labelled (named) basic block - (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalName(*(yyvsp[(1) - (1)].StrVal))); + (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalName(*(yyvsp[(1) - (1)].StrVal)), 0); delete (yyvsp[(1) - (1)].StrVal); CHECK_FOR_ERROR + ;} + break; + case 277: +#line 2581 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + { + (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalName(*(yyvsp[(1) - (3)].StrVal)), getBBVal((yyvsp[(3) - (3)].ValIDVal))); + delete (yyvsp[(1) - (3)].StrVal); + CHECK_FOR_ERROR ;} break; - case 276: -#line 2582 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 278: +#line 2588 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Return with a result... ValueList &VL = *(yyvsp[(2) - (2)].ValueList); assert(!VL.empty() && "Invalid ret operands!"); @@ -5654,16 +5687,16 @@ ;} break; - case 277: -#line 2589 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 279: +#line 2595 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Return with no result... (yyval.TermInstVal) = new ReturnInst(); CHECK_FOR_ERROR ;} break; - case 278: -#line 2593 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 280: +#line 2599 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Unconditional Branch... BasicBlock* tmpBB = getBBVal((yyvsp[(3) - (3)].ValIDVal)); CHECK_FOR_ERROR @@ -5671,8 +5704,8 @@ ;} break; - case 279: -#line 2598 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 281: +#line 2604 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { assert(cast((yyvsp[(2) - (9)].PrimType))->getBitWidth() == 1 && "Not Bool?"); BasicBlock* tmpBBA = getBBVal((yyvsp[(6) - (9)].ValIDVal)); @@ -5685,8 +5718,8 @@ ;} break; - case 280: -#line 2608 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 282: +#line 2614 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { Value* tmpVal = getVal((yyvsp[(2) - (9)].PrimType), (yyvsp[(3) - (9)].ValIDVal)); CHECK_FOR_ERROR @@ -5708,8 +5741,8 @@ ;} break; - case 281: -#line 2627 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 283: +#line 2633 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { Value* tmpVal = getVal((yyvsp[(2) - (8)].PrimType), (yyvsp[(3) - (8)].ValIDVal)); CHECK_FOR_ERROR @@ -5721,8 +5754,8 @@ ;} break; - case 282: -#line 2637 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 284: +#line 2643 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Handle the short syntax @@ -5815,24 +5848,24 @@ ;} break; - case 283: -#line 2727 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 285: +#line 2733 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TermInstVal) = new UnwindInst(); CHECK_FOR_ERROR ;} break; - case 284: -#line 2731 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 286: +#line 2737 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.TermInstVal) = new UnreachableInst(); CHECK_FOR_ERROR ;} break; - case 285: -#line 2738 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 287: +#line 2744 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.JumpTable) = (yyvsp[(1) - (6)].JumpTable); Constant *V = cast(getExistingVal((yyvsp[(2) - (6)].PrimType), (yyvsp[(3) - (6)].ValIDVal))); @@ -5846,8 +5879,8 @@ ;} break; - case 286: -#line 2749 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 288: +#line 2755 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.JumpTable) = new std::vector >(); Constant *V = cast(getExistingVal((yyvsp[(1) - (5)].PrimType), (yyvsp[(2) - (5)].ValIDVal))); @@ -5862,8 +5895,8 @@ ;} break; - case 287: -#line 2762 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 289: +#line 2768 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Is this definition named?? if so, assign the name... setValueName((yyvsp[(2) - (2)].InstVal), (yyvsp[(1) - (2)].StrVal)); @@ -5874,8 +5907,8 @@ ;} break; - case 288: -#line 2772 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 290: +#line 2778 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Used for PHI nodes if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (6)].TypeVal))->getDescription()); @@ -5889,8 +5922,8 @@ ;} break; - case 289: -#line 2783 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 291: +#line 2789 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.PHIList) = (yyvsp[(1) - (7)].PHIList); Value* tmpVal = getVal((yyvsp[(1) - (7)].PHIList)->front().first->getType(), (yyvsp[(4) - (7)].ValIDVal)); @@ -5901,8 +5934,8 @@ ;} break; - case 290: -#line 2793 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 292: +#line 2799 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0 if (!UpRefs.empty()) @@ -5916,8 +5949,8 @@ ;} break; - case 291: -#line 2804 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 293: +#line 2810 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0 // Labels are only valid in ASMs @@ -5928,8 +5961,8 @@ ;} break; - case 292: -#line 2812 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 294: +#line 2818 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0 if (!UpRefs.empty()) @@ -5942,8 +5975,8 @@ ;} break; - case 293: -#line 2822 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 295: +#line 2828 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0 (yyval.ParamList) = (yyvsp[(1) - (6)].ParamList); @@ -5953,18 +5986,18 @@ ;} break; - case 294: -#line 2829 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 296: +#line 2835 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ParamList) = new ParamList(); ;} break; - case 295: -#line 2832 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 297: +#line 2838 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValueList) = new std::vector(); ;} break; - case 296: -#line 2833 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 298: +#line 2839 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.ValueList) = (yyvsp[(1) - (3)].ValueList); (yyval.ValueList)->push_back((yyvsp[(3) - (3)].ValueVal)); @@ -5972,24 +6005,24 @@ ;} break; - case 297: -#line 2840 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 299: +#line 2846 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; CHECK_FOR_ERROR ;} break; - case 298: -#line 2844 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 300: +#line 2850 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; CHECK_FOR_ERROR ;} break; - case 299: -#line 2849 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 301: +#line 2855 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (5)].TypeVal))->getDescription()); @@ -6008,8 +6041,8 @@ ;} break; - case 300: -#line 2865 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 302: +#line 2871 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (5)].TypeVal))->getDescription()); @@ -6029,8 +6062,8 @@ ;} break; - case 301: -#line 2882 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 303: +#line 2888 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription()); @@ -6047,8 +6080,8 @@ ;} break; - case 302: -#line 2896 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 304: +#line 2902 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription()); @@ -6065,8 +6098,8 @@ ;} break; - case 303: -#line 2910 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 305: +#line 2916 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(4) - (4)].TypeVal))->getDescription()); @@ -6081,8 +6114,8 @@ ;} break; - case 304: -#line 2922 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 306: +#line 2928 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if ((yyvsp[(2) - (6)].ValueVal)->getType() != Type::Int1Ty) GEN_ERROR("select condition must be boolean"); @@ -6093,8 +6126,8 @@ ;} break; - case 305: -#line 2930 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 307: +#line 2936 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(4) - (4)].TypeVal))->getDescription()); @@ -6104,8 +6137,8 @@ ;} break; - case 306: -#line 2937 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 308: +#line 2943 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ExtractElementInst::isValidOperands((yyvsp[(2) - (4)].ValueVal), (yyvsp[(4) - (4)].ValueVal))) GEN_ERROR("Invalid extractelement operands"); @@ -6114,8 +6147,8 @@ ;} break; - case 307: -#line 2943 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 309: +#line 2949 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!InsertElementInst::isValidOperands((yyvsp[(2) - (6)].ValueVal), (yyvsp[(4) - (6)].ValueVal), (yyvsp[(6) - (6)].ValueVal))) GEN_ERROR("Invalid insertelement operands"); @@ -6124,8 +6157,8 @@ ;} break; - case 308: -#line 2949 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 310: +#line 2955 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!ShuffleVectorInst::isValidOperands((yyvsp[(2) - (6)].ValueVal), (yyvsp[(4) - (6)].ValueVal), (yyvsp[(6) - (6)].ValueVal))) GEN_ERROR("Invalid shufflevector operands"); @@ -6134,8 +6167,8 @@ ;} break; - case 309: -#line 2955 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 311: +#line 2961 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { const Type *Ty = (yyvsp[(2) - (2)].PHIList)->front().first->getType(); if (!Ty->isFirstClassType()) @@ -6153,8 +6186,8 @@ ;} break; - case 310: -#line 2971 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 312: +#line 2977 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { // Handle the short syntax @@ -6254,32 +6287,32 @@ ;} break; - case 311: -#line 3068 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 313: +#line 3074 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.InstVal) = (yyvsp[(1) - (1)].InstVal); CHECK_FOR_ERROR ;} break; - case 312: -#line 3073 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 314: +#line 3079 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = true; CHECK_FOR_ERROR ;} break; - case 313: -#line 3077 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 315: +#line 3083 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { (yyval.BoolVal) = false; CHECK_FOR_ERROR ;} break; - case 314: -#line 3084 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 316: +#line 3090 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (3)].TypeVal))->getDescription()); @@ -6289,8 +6322,8 @@ ;} break; - case 315: -#line 3091 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 317: +#line 3097 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (6)].TypeVal))->getDescription()); @@ -6301,8 +6334,8 @@ ;} break; - case 316: -#line 3099 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 318: +#line 3105 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (3)].TypeVal))->getDescription()); @@ -6312,8 +6345,8 @@ ;} break; - case 317: -#line 3106 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 319: +#line 3112 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (6)].TypeVal))->getDescription()); @@ -6324,8 +6357,8 @@ ;} break; - case 318: -#line 3114 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 320: +#line 3120 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!isa((yyvsp[(2) - (2)].ValueVal)->getType())) GEN_ERROR("Trying to free nonpointer type " + @@ -6335,8 +6368,8 @@ ;} break; - case 319: -#line 3122 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 321: +#line 3128 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (5)].TypeVal))->getDescription()); @@ -6353,8 +6386,8 @@ ;} break; - case 320: -#line 3136 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 322: +#line 3142 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(5) - (7)].TypeVal))->getDescription()); @@ -6374,8 +6407,8 @@ ;} break; - case 321: -#line 3153 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 323: +#line 3159 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { Value *TmpVal = getVal((yyvsp[(2) - (5)].TypeVal)->get(), (yyvsp[(3) - (5)].ValIDVal)); if (!GetResultInst::isValidOperands(TmpVal, (yyvsp[(5) - (5)].UInt64Val))) @@ -6386,8 +6419,8 @@ ;} break; - case 322: -#line 3161 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" + case 324: +#line 3167 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { if (!UpRefs.empty()) GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (4)].TypeVal))->getDescription()); @@ -6407,7 +6440,7 @@ /* Line 1267 of yacc.c. */ -#line 6411 "llvmAsmParser.tab.c" +#line 6444 "llvmAsmParser.tab.c" default: break; } YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); @@ -6621,7 +6654,7 @@ } -#line 3178 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 3184 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" // common code from the two 'RunVMAsmParser' functions Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs?rev=47849&r1=47848&r2=47849&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs Mon Mar 3 12:58:47 2008 @@ -104,89 +104,90 @@ X86_STDCALLCC_TOK = 320, X86_FASTCALLCC_TOK = 321, DATALAYOUT = 322, - RET = 323, - BR = 324, - SWITCH = 325, - INVOKE = 326, - UNWIND = 327, - UNREACHABLE = 328, - ADD = 329, - SUB = 330, - MUL = 331, - UDIV = 332, - SDIV = 333, - FDIV = 334, - UREM = 335, - SREM = 336, - FREM = 337, - AND = 338, - OR = 339, - XOR = 340, - SHL = 341, - LSHR = 342, - ASHR = 343, - ICMP = 344, - FCMP = 345, - EQ = 346, - NE = 347, - SLT = 348, - SGT = 349, - SLE = 350, - SGE = 351, - ULT = 352, - UGT = 353, - ULE = 354, - UGE = 355, - OEQ = 356, - ONE = 357, - OLT = 358, - OGT = 359, - OLE = 360, - OGE = 361, - ORD = 362, - UNO = 363, - UEQ = 364, - UNE = 365, - MALLOC = 366, - ALLOCA = 367, - FREE = 368, - LOAD = 369, - STORE = 370, - GETELEMENTPTR = 371, - TRUNC = 372, - ZEXT = 373, - SEXT = 374, - FPTRUNC = 375, - FPEXT = 376, - BITCAST = 377, - UITOFP = 378, - SITOFP = 379, - FPTOUI = 380, - FPTOSI = 381, - INTTOPTR = 382, - PTRTOINT = 383, - PHI_TOK = 384, - SELECT = 385, - VAARG = 386, - EXTRACTELEMENT = 387, - INSERTELEMENT = 388, - SHUFFLEVECTOR = 389, - GETRESULT = 390, - SIGNEXT = 391, - ZEROEXT = 392, - NORETURN = 393, - INREG = 394, - SRET = 395, - NOUNWIND = 396, - NOALIAS = 397, - BYVAL = 398, - NEST = 399, - READNONE = 400, - READONLY = 401, - GC = 402, - DEFAULT = 403, - HIDDEN = 404, - PROTECTED = 405 + UNWIND_TO = 323, + RET = 324, + BR = 325, + SWITCH = 326, + INVOKE = 327, + UNWIND = 328, + UNREACHABLE = 329, + ADD = 330, + SUB = 331, + MUL = 332, + UDIV = 333, + SDIV = 334, + FDIV = 335, + UREM = 336, + SREM = 337, + FREM = 338, + AND = 339, + OR = 340, + XOR = 341, + SHL = 342, + LSHR = 343, + ASHR = 344, + ICMP = 345, + FCMP = 346, + EQ = 347, + NE = 348, + SLT = 349, + SGT = 350, + SLE = 351, + SGE = 352, + ULT = 353, + UGT = 354, + ULE = 355, + UGE = 356, + OEQ = 357, + ONE = 358, + OLT = 359, + OGT = 360, + OLE = 361, + OGE = 362, + ORD = 363, + UNO = 364, + UEQ = 365, + UNE = 366, + MALLOC = 367, + ALLOCA = 368, + FREE = 369, + LOAD = 370, + STORE = 371, + GETELEMENTPTR = 372, + TRUNC = 373, + ZEXT = 374, + SEXT = 375, + FPTRUNC = 376, + FPEXT = 377, + BITCAST = 378, + UITOFP = 379, + SITOFP = 380, + FPTOUI = 381, + FPTOSI = 382, + INTTOPTR = 383, + PTRTOINT = 384, + PHI_TOK = 385, + SELECT = 386, + VAARG = 387, + EXTRACTELEMENT = 388, + INSERTELEMENT = 389, + SHUFFLEVECTOR = 390, + GETRESULT = 391, + SIGNEXT = 392, + ZEROEXT = 393, + NORETURN = 394, + INREG = 395, + SRET = 396, + NOUNWIND = 397, + NOALIAS = 398, + BYVAL = 399, + NEST = 400, + READNONE = 401, + READONLY = 402, + GC = 403, + DEFAULT = 404, + HIDDEN = 405, + PROTECTED = 406 }; #endif /* Tokens. */ @@ -255,96 +256,97 @@ #define X86_STDCALLCC_TOK 320 #define X86_FASTCALLCC_TOK 321 #define DATALAYOUT 322 -#define RET 323 -#define BR 324 -#define SWITCH 325 -#define INVOKE 326 -#define UNWIND 327 -#define UNREACHABLE 328 -#define ADD 329 -#define SUB 330 -#define MUL 331 -#define UDIV 332 -#define SDIV 333 -#define FDIV 334 -#define UREM 335 -#define SREM 336 -#define FREM 337 -#define AND 338 -#define OR 339 -#define XOR 340 -#define SHL 341 -#define LSHR 342 -#define ASHR 343 -#define ICMP 344 -#define FCMP 345 -#define EQ 346 -#define NE 347 -#define SLT 348 -#define SGT 349 -#define SLE 350 -#define SGE 351 -#define ULT 352 -#define UGT 353 -#define ULE 354 -#define UGE 355 -#define OEQ 356 -#define ONE 357 -#define OLT 358 -#define OGT 359 -#define OLE 360 -#define OGE 361 -#define ORD 362 -#define UNO 363 -#define UEQ 364 -#define UNE 365 -#define MALLOC 366 -#define ALLOCA 367 -#define FREE 368 -#define LOAD 369 -#define STORE 370 -#define GETELEMENTPTR 371 -#define TRUNC 372 -#define ZEXT 373 -#define SEXT 374 -#define FPTRUNC 375 -#define FPEXT 376 -#define BITCAST 377 -#define UITOFP 378 -#define SITOFP 379 -#define FPTOUI 380 -#define FPTOSI 381 -#define INTTOPTR 382 -#define PTRTOINT 383 -#define PHI_TOK 384 -#define SELECT 385 -#define VAARG 386 -#define EXTRACTELEMENT 387 -#define INSERTELEMENT 388 -#define SHUFFLEVECTOR 389 -#define GETRESULT 390 -#define SIGNEXT 391 -#define ZEROEXT 392 -#define NORETURN 393 -#define INREG 394 -#define SRET 395 -#define NOUNWIND 396 -#define NOALIAS 397 -#define BYVAL 398 -#define NEST 399 -#define READNONE 400 -#define READONLY 401 -#define GC 402 -#define DEFAULT 403 -#define HIDDEN 404 -#define PROTECTED 405 +#define UNWIND_TO 323 +#define RET 324 +#define BR 325 +#define SWITCH 326 +#define INVOKE 327 +#define UNWIND 328 +#define UNREACHABLE 329 +#define ADD 330 +#define SUB 331 +#define MUL 332 +#define UDIV 333 +#define SDIV 334 +#define FDIV 335 +#define UREM 336 +#define SREM 337 +#define FREM 338 +#define AND 339 +#define OR 340 +#define XOR 341 +#define SHL 342 +#define LSHR 343 +#define ASHR 344 +#define ICMP 345 +#define FCMP 346 +#define EQ 347 +#define NE 348 +#define SLT 349 +#define SGT 350 +#define SLE 351 +#define SGE 352 +#define ULT 353 +#define UGT 354 +#define ULE 355 +#define UGE 356 +#define OEQ 357 +#define ONE 358 +#define OLT 359 +#define OGT 360 +#define OLE 361 +#define OGE 362 +#define ORD 363 +#define UNO 364 +#define UEQ 365 +#define UNE 366 +#define MALLOC 367 +#define ALLOCA 368 +#define FREE 369 +#define LOAD 370 +#define STORE 371 +#define GETELEMENTPTR 372 +#define TRUNC 373 +#define ZEXT 374 +#define SEXT 375 +#define FPTRUNC 376 +#define FPEXT 377 +#define BITCAST 378 +#define UITOFP 379 +#define SITOFP 380 +#define FPTOUI 381 +#define FPTOSI 382 +#define INTTOPTR 383 +#define PTRTOINT 384 +#define PHI_TOK 385 +#define SELECT 386 +#define VAARG 387 +#define EXTRACTELEMENT 388 +#define INSERTELEMENT 389 +#define SHUFFLEVECTOR 390 +#define GETRESULT 391 +#define SIGNEXT 392 +#define ZEROEXT 393 +#define NORETURN 394 +#define INREG 395 +#define SRET 396 +#define NOUNWIND 397 +#define NOALIAS 398 +#define BYVAL 399 +#define NEST 400 +#define READNONE 401 +#define READONLY 402 +#define GC 403 +#define DEFAULT 404 +#define HIDDEN 405 +#define PROTECTED 406 #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED typedef union YYSTYPE -#line 953 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" +#line 951 "/Volumes/Nanpura/mrv/llvm/lib/AsmParser/llvmAsmParser.y" { llvm::Module *ModuleVal; llvm::Function *FunctionVal; @@ -392,7 +394,7 @@ llvm::FCmpInst::Predicate FPredicate; } /* Line 1529 of yacc.c. */ -#line 396 "llvmAsmParser.tab.h" +#line 398 "llvmAsmParser.tab.h" YYSTYPE; # define yystype YYSTYPE /* obsolescent; will be withdrawn */ # define YYSTYPE_IS_DECLARED 1 Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs?rev=47849&r1=47848&r2=47849&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Mon Mar 3 12:58:47 2008 @@ -518,7 +518,7 @@ /// defineBBVal - This is a definition of a new basic block with the specified /// identifier which must be the same as CurFun.NextValNum, if its numeric. -static BasicBlock *defineBBVal(const ValID &ID) { +static BasicBlock *defineBBVal(const ValID &ID, BasicBlock *unwindDest) { assert(inFunctionScope() && "Can't get basic block at global scope!"); BasicBlock *BB = 0; @@ -548,21 +548,19 @@ assert(ID.Num == CurFun.NextValNum && "Invalid new block number"); InsertValue(BB); } - - ID.destroy(); - return BB; - } - - // We haven't seen this BB before and its first mention is a definition. - // Just create it and return it. - std::string Name (ID.Type == ValID::LocalName ? ID.getName() : ""); - BB = new BasicBlock(Name, CurFun.CurrentFunction); - if (ID.Type == ValID::LocalID) { - assert(ID.Num == CurFun.NextValNum && "Invalid new block number"); - InsertValue(BB); + } else { + // We haven't seen this BB before and its first mention is a definition. + // Just create it and return it. + std::string Name (ID.Type == ValID::LocalName ? ID.getName() : ""); + BB = new BasicBlock(Name, CurFun.CurrentFunction); + if (ID.Type == ValID::LocalID) { + assert(ID.Num == CurFun.NextValNum && "Invalid new block number"); + InsertValue(BB); + } } - ID.destroy(); // Free strdup'd memory + ID.destroy(); + BB->setUnwindDest(unwindDest); return BB; } @@ -1066,7 +1064,7 @@ %token OPAQUE EXTERNAL TARGET TRIPLE ALIGN ADDRSPACE %token DEPLIBS CALL TAIL ASM_TOK MODULE SIDEEFFECT %token CC_TOK CCC_TOK FASTCC_TOK COLDCC_TOK X86_STDCALLCC_TOK X86_FASTCALLCC_TOK -%token DATALAYOUT +%token DATALAYOUT UNWIND_TO %type OptCallingConv %type OptParamAttrs ParamAttr %type OptFuncAttrs FuncAttr @@ -2568,14 +2566,22 @@ CHECK_FOR_ERROR } | /* empty */ { // Empty space between instruction lists - $$ = defineBBVal(ValID::createLocalID(CurFun.NextValNum)); + $$ = defineBBVal(ValID::createLocalID(CurFun.NextValNum), 0); + CHECK_FOR_ERROR + } + | UNWIND_TO ValueRef { // Only the unwind to block + $$ = defineBBVal(ValID::createLocalID(CurFun.NextValNum), getBBVal($2)); CHECK_FOR_ERROR } | LABELSTR { // Labelled (named) basic block - $$ = defineBBVal(ValID::createLocalName(*$1)); + $$ = defineBBVal(ValID::createLocalName(*$1), 0); + delete $1; + CHECK_FOR_ERROR + } + | LABELSTR UNWIND_TO ValueRef { + $$ = defineBBVal(ValID::createLocalName(*$1), getBBVal($3)); delete $1; CHECK_FOR_ERROR - }; BBTerminatorInst : From clattner at apple.com Mon Mar 3 13:39:03 2008 From: clattner at apple.com (Chris Lattner) Date: Mon, 3 Mar 2008 11:39:03 -0800 Subject: [llvm-commits] [llvm] r47848 - in /llvm/trunk/lib/VMCore: Function.cpp Verifier.cpp In-Reply-To: <200803031858.m23IwGpW007057@zion.cs.uiuc.edu> References: <200803031858.m23IwGpW007057@zion.cs.uiuc.edu> Message-ID: On Mar 3, 2008, at 10:58 AM, Devang Patel wrote: > Author: dpatel > Date: Mon Mar 3 12:58:16 2008 > New Revision: 47848 > > URL: http://llvm.org/viewvc/llvm-project?rev=47848&view=rev > Log: > If a function uses multive values in ret instruction then it > is returning a struct value. Why do you want to do this? I think it would make sense to rename isStructReturn to hasStructRetAttribute() or something, but I don't think it makes sense to return true if the function returns multiple results. What does this fix? -Chris > > > Modified: > llvm/trunk/lib/VMCore/Function.cpp > llvm/trunk/lib/VMCore/Verifier.cpp > > Modified: llvm/trunk/lib/VMCore/Function.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Function.cpp?rev=47848&r1=47847&r2=47848&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/VMCore/Function.cpp (original) > +++ llvm/trunk/lib/VMCore/Function.cpp Mon Mar 3 12:58:16 2008 > @@ -170,7 +170,8 @@ > > /// @brief Determine if the function returns a structure. > bool Function::isStructReturn() const { > - return paramHasAttr(1, ParamAttr::StructRet); > + return paramHasAttr(1, ParamAttr::StructRet) > + || isa(getReturnType()); > } > > // > = > = > = > ----------------------------------------------------------------------= > ==// > > Modified: llvm/trunk/lib/VMCore/Verifier.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=47848&r1=47847&r2=47848&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/VMCore/Verifier.cpp (original) > +++ llvm/trunk/lib/VMCore/Verifier.cpp Mon Mar 3 12:58:16 2008 > @@ -455,9 +455,6 @@ > isa(F.getReturnType()), > "Functions cannot return aggregate values!", &F); > > - Assert1(!F.isStructReturn() || FT->getReturnType() == Type::VoidTy, > - "Invalid struct-return function!", &F); > - > const ParamAttrsList *Attrs = F.getParamAttrs(); > > Assert1(!Attrs || > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From alenhar2 at cs.uiuc.edu Mon Mar 3 13:39:27 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Mon, 03 Mar 2008 19:39:27 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47853 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200803031939.m23JdRZT008833@zion.cs.uiuc.edu> Author: alenhar2 Date: Mon Mar 3 13:39:27 2008 New Revision: 47853 URL: http://llvm.org/viewvc/llvm-project?rev=47853&view=rev Log: add some other atomic builtins that don't require loops Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47853&r1=47852&r2=47853&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Mar 3 13:39:27 2008 @@ -4300,7 +4300,12 @@ case BUILT_IN_VAL_COMPARE_AND_SWAP_2: case BUILT_IN_VAL_COMPARE_AND_SWAP_4: case BUILT_IN_VAL_COMPARE_AND_SWAP_8: - case BUILT_IN_VAL_COMPARE_AND_SWAP_16: { + case BUILT_IN_VAL_COMPARE_AND_SWAP_16: + case BUILT_IN_BOOL_COMPARE_AND_SWAP_1: + case BUILT_IN_BOOL_COMPARE_AND_SWAP_2: + case BUILT_IN_BOOL_COMPARE_AND_SWAP_4: + case BUILT_IN_BOOL_COMPARE_AND_SWAP_8: + case BUILT_IN_BOOL_COMPARE_AND_SWAP_16: { const Type *Ty = ConvertType(TREE_TYPE(exp)); tree arglist = TREE_OPERAND(exp, 1); Value* C[3] = { @@ -4318,6 +4323,12 @@ Intrinsic::atomic_lcs, &Ty, 1), C, C + 3); + if (((DECL_FUNCTION_CODE(fndecl)) == BUILT_IN_BOOL_COMPARE_AND_SWAP_1) || + ((DECL_FUNCTION_CODE(fndecl)) == BUILT_IN_BOOL_COMPARE_AND_SWAP_2) || + ((DECL_FUNCTION_CODE(fndecl)) == BUILT_IN_BOOL_COMPARE_AND_SWAP_4) || + ((DECL_FUNCTION_CODE(fndecl)) == BUILT_IN_BOOL_COMPARE_AND_SWAP_8) || + ((DECL_FUNCTION_CODE(fndecl)) == BUILT_IN_BOOL_COMPARE_AND_SWAP_16)) + Result = Builder.CreateICmpEQ(Result, C[1]); return true; } @@ -4325,13 +4336,24 @@ case BUILT_IN_FETCH_AND_ADD_2: case BUILT_IN_FETCH_AND_ADD_4: case BUILT_IN_FETCH_AND_ADD_8: - case BUILT_IN_FETCH_AND_ADD_16: { + case BUILT_IN_FETCH_AND_ADD_16: + case BUILT_IN_FETCH_AND_SUB_1: + case BUILT_IN_FETCH_AND_SUB_2: + case BUILT_IN_FETCH_AND_SUB_4: + case BUILT_IN_FETCH_AND_SUB_8: + case BUILT_IN_FETCH_AND_SUB_16: { const Type *Ty = ConvertType(TREE_TYPE(exp)); tree arglist = TREE_OPERAND(exp, 1); Value* C[2] = { Emit(TREE_VALUE(arglist), 0), Emit(TREE_VALUE(TREE_CHAIN(arglist)), 0) }; + if (((DECL_FUNCTION_CODE(fndecl)) == BUILT_IN_FETCH_AND_SUB_1) || + ((DECL_FUNCTION_CODE(fndecl)) == BUILT_IN_FETCH_AND_SUB_2) || + ((DECL_FUNCTION_CODE(fndecl)) == BUILT_IN_FETCH_AND_SUB_4) || + ((DECL_FUNCTION_CODE(fndecl)) == BUILT_IN_FETCH_AND_SUB_8) || + ((DECL_FUNCTION_CODE(fndecl)) == BUILT_IN_FETCH_AND_SUB_16)) + C[1] = Builder.CreateNeg(C[1]); if (C[1]->getType() != Ty) C[1] = Builder.CreateIntCast(C[1], Ty, "cast"); Result = From gohman at apple.com Mon Mar 3 13:41:48 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 3 Mar 2008 11:41:48 -0800 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> <200802291429.22322.dag@cray.com> Message-ID: <48BE0336-D732-4228-96E7-D15B0736B6F3@apple.com> On Mar 3, 2008, at 3:05 AM, Roman Levenstein wrote: > > Please find attached the patch for depth/height calculation. > All of the proposed improvements from the review by Evan and Dan are > incorporated. > > Please have a look at it, and if it is OK, I'll submit. This patch looks good to me; please commit it. I've run a variety of tests here and the output with and without these patches is identical. Thanks for working on this! Dan From criswell at uiuc.edu Mon Mar 3 14:41:07 2008 From: criswell at uiuc.edu (John Criswell) Date: Mon, 03 Mar 2008 20:41:07 -0000 Subject: [llvm-commits] [poolalloc] r47854 - /poolalloc/trunk/include/poolalloc/PoolAllocate.h Message-ID: <200803032041.m23Kf7Zm011138@zion.cs.uiuc.edu> Author: criswell Date: Mon Mar 3 14:41:07 2008 New Revision: 47854 URL: http://llvm.org/viewvc/llvm-project?rev=47854&view=rev Log: Added support for strdup(). Modified: poolalloc/trunk/include/poolalloc/PoolAllocate.h Modified: poolalloc/trunk/include/poolalloc/PoolAllocate.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc/PoolAllocate.h?rev=47854&r1=47853&r2=47854&view=diff ============================================================================== --- poolalloc/trunk/include/poolalloc/PoolAllocate.h (original) +++ poolalloc/trunk/include/poolalloc/PoolAllocate.h Mon Mar 3 14:41:07 2008 @@ -132,6 +132,7 @@ #endif Constant *PoolInit, *PoolDestroy, *PoolAlloc, *PoolRealloc, *PoolMemAlign; Constant *PoolFree; + Constant *PoolStrdup; #if defined(SAFECODE) || defined(BOUNDS_CHECK) Constant *PoolRegister; #endif From dpatel at apple.com Mon Mar 3 14:42:21 2008 From: dpatel at apple.com (Devang Patel) Date: Mon, 3 Mar 2008 12:42:21 -0800 Subject: [llvm-commits] [llvm] r47848 - in /llvm/trunk/lib/VMCore: Function.cpp Verifier.cpp In-Reply-To: References: <200803031858.m23IwGpW007057@zion.cs.uiuc.edu> Message-ID: <4A6DCB4E-9D0D-40B9-8996-7A04E1CA7815@apple.com> On Mar 3, 2008, at 11:39 AM, Chris Lattner wrote: > > On Mar 3, 2008, at 10:58 AM, Devang Patel wrote: > >> Author: dpatel >> Date: Mon Mar 3 12:58:16 2008 >> New Revision: 47848 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=47848&view=rev >> Log: >> If a function uses multive values in ret instruction then it >> is returning a struct value. > > Why do you want to do this? I think it would make sense to rename > isStructReturn to hasStructRetAttribute() or something, but I don't > think it makes sense to return true if the function returns multiple > results. What does this fix? I did this to preserve the semantics - does function return structure, irrespective how return value is handled ?. If we want to keep this predicate to check sret attr only then I'll rename this as hasStructRetAttribute(). - Devang From criswell at uiuc.edu Mon Mar 3 14:50:33 2008 From: criswell at uiuc.edu (John Criswell) Date: Mon, 03 Mar 2008 20:50:33 -0000 Subject: [llvm-commits] [poolalloc] r47855 - in /poolalloc/trunk/lib/PoolAllocate: PoolAllocate.cpp PoolOptimize.cpp TransformFunctionBody.cpp Message-ID: <200803032050.m23KoXla011502@zion.cs.uiuc.edu> Author: criswell Date: Mon Mar 3 14:50:33 2008 New Revision: 47855 URL: http://llvm.org/viewvc/llvm-project?rev=47855&view=rev Log: Added support for strdup() (which is not automatically inlined on Mac OS X). Fixed the arguments used for poolregister(). Removed unneeded header file from PoolAllocate.cpp. Improved some formatting. Updated bounds checking code to compile correctly. Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp poolalloc/trunk/lib/PoolAllocate/PoolOptimize.cpp poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp?rev=47855&r1=47854&r2=47855&view=diff ============================================================================== --- poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp (original) +++ poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Mon Mar 3 14:50:33 2008 @@ -25,7 +25,6 @@ #include "llvm/Module.h" #include "llvm/Constants.h" #include "llvm/ParamAttrsList.h" -#include "llvm/ParameterAttributes.h" #include "llvm/Support/CFG.h" #include "llvm/Target/TargetData.h" #include "llvm/Transforms/Utils/BasicBlockUtils.h" @@ -215,18 +214,19 @@ Type::Int32Ty, Type::Int32Ty, NULL); + // The poolstrdup function. + PoolStrdup = CurModule->getOrInsertFunction("poolstrdup", + VoidPtrTy, PoolDescPtrTy, + VoidPtrTy, NULL); + // The poolmemalign function. // Get the poolfree function. PoolFree = CurModule->getOrInsertFunction("poolfree", Type::VoidTy, PoolDescPtrTy, VoidPtrTy, NULL); -#ifdef SAFECODE +#if defined(SAFECODE) || defined(BOUNDS_CHECK) //Get the poolregister function PoolRegister = CurModule->getOrInsertFunction("poolregister", Type::VoidTy, - PoolDescPtrTy, Type::Int32Ty, VoidPtrTy, NULL); + PoolDescPtrTy, VoidPtrTy, Type::Int32Ty, NULL); #endif -#ifdef BOUNDS_CHECK - PoolRegister = CurModule->getOrInsertFunction("poolregister", Type::VoidTy, - PoolDescPtrTy, VoidPtrTy, Type::Int32Ty, NULL); -#endif } static void getCallsOf(Constant *C, std::vector &Calls) { @@ -672,11 +672,11 @@ for (DSGraph::node_iterator I = G.node_begin(), E = G.node_end(); I != E;++I){ // We only need to make a pool if there is a heap object in it... DSNode *N = I; - if ( #ifdef BOUNDS_CHECK - (N->isArray() || + if ((N->isArray()) || (N->isHeapNode())) +#else + if (N->isHeapNode()) #endif - (N->isHeapNode())) if (GlobalsGraphNodeMapping.count(N)) { // If it is a global pool, set up the pool descriptor appropriately. DSNode *GGN = GlobalsGraphNodeMapping[N].getNode(); Modified: poolalloc/trunk/lib/PoolAllocate/PoolOptimize.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolOptimize.cpp?rev=47855&r1=47854&r2=47855&view=diff ============================================================================== --- poolalloc/trunk/lib/PoolAllocate/PoolOptimize.cpp (original) +++ poolalloc/trunk/lib/PoolAllocate/PoolOptimize.cpp Mon Mar 3 14:50:33 2008 @@ -51,7 +51,11 @@ bool PoolOptimize::runOnModule(Module &M) { const Type *VoidPtrTy = PointerType::getUnqual(Type::Int8Ty); +#ifdef SAFECODE + const Type *PoolDescPtrTy = PointerType::getUnqual(ArrayType::get(VoidPtrTy, 50)); +#else const Type *PoolDescPtrTy = PointerType::getUnqual(ArrayType::get(VoidPtrTy, 16)); +#endif // Get poolinit function. Modified: poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp?rev=47855&r1=47854&r2=47855&view=diff ============================================================================== --- poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp (original) +++ poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Mon Mar 3 14:50:33 2008 @@ -68,6 +68,7 @@ void visitCallocCall(CallSite CS); void visitReallocCall(CallSite CS); void visitMemAlignCall(CallSite CS); + void visitStrdupCall(CallSite CS); void visitFreeInst(FreeInst &FI); void visitCallSite(CallSite CS); void visitCallInst(CallInst &CI) { visitCallSite(&CI); } @@ -261,10 +262,16 @@ MI.getOperand(0), "sizetmp", &MI); // TransformAllocationInstr(&MI, AllocSize); + BasicBlock::iterator InsertPt(MI); + ++InsertPt; Instruction *Casted = CastInst::createPointerCast(&MI, PointerType::getUnqual(Type::Int8Ty), - MI.getName()+".casted", MI.getNext()); + MI.getName()+".casted", InsertPt); + std::vector args; + args.push_back (PH); + args.push_back (Casted); + args.push_back (AllocSize); Instruction *V = new CallInst(PAInfo.PoolRegister, - make_vector(PH, Casted, AllocSize, 0), "", Casted->getNext()); + args.begin(), args.end(), "", InsertPt); AddPoolUse(*V, PH, PoolUses); } #endif @@ -464,6 +471,57 @@ I->eraseFromParent(); } +/// visitStrdupCall - Handle strdup(). +/// +void FuncTransform::visitStrdupCall(CallSite CS) { + assert(CS.arg_end()-CS.arg_begin() == 1 && "strdup takes one argument!"); + Instruction *I = CS.getInstruction(); + DSNode *Node = getDSNodeHFor(I).getNode(); + assert (Node && "strdup has NULL DSNode!\n"); + Value *PH = getPoolHandle(I); +#if 0 + assert (PH && "PH for strdup is null!\n"); +#else + if (!PH) { + std::cerr << "strdup: NoPH" << std::endl; + return; + } +#endif + Value *OldPtr = CS.getArgument(0); + + static Type *VoidPtrTy = PointerType::getUnqual(Type::Int8Ty); + if (OldPtr->getType() != VoidPtrTy) + OldPtr = CastInst::createPointerCast(OldPtr, VoidPtrTy, OldPtr->getName(), I); + + std::string Name = I->getName(); I->setName(""); + Value* Opts[3] = {PH, OldPtr, 0}; + Instruction *V = new CallInst(PAInfo.PoolStrdup, Opts, Opts + 2, Name, I); + Instruction *Casted = V; + if (V->getType() != I->getType()) + Casted = CastInst::createPointerCast(V, I->getType(), V->getName(), I); + + // Update def-use info + I->replaceAllUsesWith(Casted); + + // If we are modifying the original function, update the DSGraph. + if (!FI.Clone) { + // V and Casted now point to whatever the original allocation did. + G.getScalarMap().replaceScalar(I, V); + if (V != Casted) + G.getScalarMap()[Casted] = G.getScalarMap()[V]; + } else { // Otherwise, update the NewToOldValueMap + UpdateNewToOldValueMap(I, V, V != Casted ? Casted : 0); + } + + // If this was an invoke, fix up the CFG. + if (InvokeInst *II = dyn_cast(I)) { + new BranchInst(II->getNormalDest(), I); + II->getUnwindDest()->removePredecessor(II->getParent(), true); + } + + // Remove old allocation instruction. + I->eraseFromParent(); +} void FuncTransform::visitCallSite(CallSite CS) { @@ -496,7 +554,10 @@ visitMemAlignCall(CS); return; } else if (CF->getName() == "strdup") { - assert(0 && "strdup should have been linked into the program!"); +#if 1 + visitStrdupCall(CS); +#endif + return; } else if (CF->getName() == "valloc") { std::cerr << "VALLOC USED BUT NOT HANDLED!\n"; abort(); From clattner at apple.com Mon Mar 3 14:51:03 2008 From: clattner at apple.com (Chris Lattner) Date: Mon, 3 Mar 2008 12:51:03 -0800 Subject: [llvm-commits] [llvm] r47848 - in /llvm/trunk/lib/VMCore: Function.cpp Verifier.cpp In-Reply-To: <4A6DCB4E-9D0D-40B9-8996-7A04E1CA7815@apple.com> References: <200803031858.m23IwGpW007057@zion.cs.uiuc.edu> <4A6DCB4E-9D0D-40B9-8996-7A04E1CA7815@apple.com> Message-ID: <7048DA52-B355-4158-A7AB-6069AB011D2A@apple.com> >> Why do you want to do this? I think it would make sense to rename >> isStructReturn to hasStructRetAttribute() or something, but I don't >> think it makes sense to return true if the function returns multiple >> results. What does this fix? > > I did this to preserve the semantics - does function return structure, > irrespective how return value is handled ?. If we want to keep this > predicate to check sret attr only then I'll rename this as > hasStructRetAttribute(). Previous clients of this were safe to assume that the function's first argument was a pointer where the result is returned through. I don't think you want to make this change. -Chris From evan.cheng at apple.com Mon Mar 3 15:26:46 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Mar 2008 13:26:46 -0800 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> <200802291429.22322.dag@cray.com> Message-ID: Thanks. Using std::set<> makes me queasy. :-) Too bad it doesn't seem possible to use SmallPtrSet (elements are not in sorted order). Evan On Mar 3, 2008, at 9:58 AM, Dan Gohman wrote: > Hi Roman, > > Just one comment on this patch from me; in this change: > >> SUnit *pop() { >> if (empty()) return NULL; >> - SUnit *V = Queue.top(); >> - Queue.pop(); >> + SUnit *V = *Queue.rbegin(); >> + Queue.erase(V); >> return V; >> } > > The erase call here uses the "key" form of erase, so it incurs a > lookup. This can can be avoided by using the iterator form, > something like this: > > set::iterator i = prior(Queue.end()); > SUnit *V = *i; > Queue.erase(i); > > Dan > > On Mar 3, 2008, at 3:06 AM, Roman Levenstein wrote: > >> Hi, >> >> >> 2008/3/1, Evan Cheng : >> >>> Let's try to solve one problem at a time. >>> >>> 1. Roman's depth / height patch calculation is obviously goodness. >>> Please commit that first. >> >> >> Here is the patch for ScheduleDAGList.cpp: computing priorities using >> a linear algorithm. It uses the same idea as the height/depth >> computation, i.e. dynamic programming. I took into account all >> comments from Dan & Evan from last review. >> >> Additionally, I use now std::set instead of a priority queue. The >> results are exactly the same as with the current SVN version - I >> really compared it side-by-side during execution. Using std::set >> makes >> operations such as removal from the middle of the queue much faster >> and removes a bottleneck. Scheduling of very bigs BBs is now up to >> 3-4 >> times faster. >> >> Please, review this new version, if it is OK for submission. >> >> And there is one more patch to come, for the ScheduleDAGRRList.cpp, >> which would also use std::set instead of priority queues, introduce >> strict ordering and contain queue update changes as David suggested. >> >> -Roman >> < >> ScheduleDAGList.patch>_______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Mon Mar 3 15:31:58 2008 From: clattner at apple.com (Chris Lattner) Date: Mon, 3 Mar 2008 13:31:58 -0800 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> <200802291429.22322.dag@cray.com> Message-ID: <522BCA72-6445-4857-BE7B-019B841AA9DB@apple.com> On Mar 3, 2008, at 1:26 PM, Evan Cheng wrote: > Thanks. > > Using std::set<> makes me queasy. :-) Too bad it doesn't seem possible > to use SmallPtrSet (elements are not in sorted order). I'm sad to say that std::set is probably the best thing we have right now that provides priority queue + removal from the middle support. Does anyone know of a better data structure to implement these operations? Even if you don't volunteer to implement it, we can add it to the open projects page. -Chris From dpatel at apple.com Mon Mar 3 15:46:28 2008 From: dpatel at apple.com (Devang Patel) Date: Mon, 03 Mar 2008 21:46:28 -0000 Subject: [llvm-commits] [llvm] r47857 - in /llvm/trunk: include/llvm/Function.h include/llvm/Instructions.h lib/Target/CBackend/CBackend.cpp lib/Target/X86/X86AsmPrinter.cpp lib/Transforms/IPO/DeadArgumentElimination.cpp lib/Transforms/IPO/StructRetPromotion.cpp lib/VMCore/Function.cpp lib/VMCore/Instructions.cpp lib/VMCore/Verifier.cpp Message-ID: <200803032146.m23LkSFJ013597@zion.cs.uiuc.edu> Author: dpatel Date: Mon Mar 3 15:46:28 2008 New Revision: 47857 URL: http://llvm.org/viewvc/llvm-project?rev=47857&view=rev Log: s/isReturnStruct()/hasStructRetAttr()/g Modified: llvm/trunk/include/llvm/Function.h llvm/trunk/include/llvm/Instructions.h llvm/trunk/lib/Target/CBackend/CBackend.cpp llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp llvm/trunk/lib/VMCore/Function.cpp llvm/trunk/lib/VMCore/Instructions.cpp llvm/trunk/lib/VMCore/Verifier.cpp Modified: llvm/trunk/include/llvm/Function.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Function.h?rev=47857&r1=47856&r2=47857&view=diff ============================================================================== --- llvm/trunk/include/llvm/Function.h (original) +++ llvm/trunk/include/llvm/Function.h Mon Mar 3 15:46:28 2008 @@ -181,8 +181,9 @@ /// @brief Determine if the function does not access or only reads memory. bool onlyReadsMemory() const; - /// @brief Determine if the function returns a structure. - bool isStructReturn() const; + /// @brief Determine if the function returns a structure through first + /// pointer argument. + bool hasStructRetAttr() const; /// deleteBody - This method deletes the body of the function, and converts /// the linkage to external. Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=47857&r1=47856&r2=47857&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Mon Mar 3 15:46:28 2008 @@ -957,8 +957,9 @@ bool doesNotThrow() const; void setDoesNotThrow(bool doesNotThrow = true); - /// @brief Determine if the call returns a structure. - bool isStructReturn() const; + /// @brief Determine if the call returns a structure through first + /// pointer argument. + bool hasStructRetAttr() const; /// @brief Determine if any call argument is an aggregate passed by value. bool hasByValArgument() const; @@ -1769,8 +1770,9 @@ bool doesNotThrow() const; void setDoesNotThrow(bool doesNotThrow = true); - /// @brief Determine if the call returns a structure. - bool isStructReturn() const; + /// @brief Determine if the call returns a structure through first + /// pointer argument. + bool hasStructRetAttr() const; /// getCalledFunction - Return the function called, or null if this is an /// indirect function invocation. Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=47857&r1=47856&r2=47857&view=diff ============================================================================== --- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original) +++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Mon Mar 3 15:46:28 2008 @@ -1904,7 +1904,7 @@ void CWriter::printFunctionSignature(const Function *F, bool Prototype) { /// isStructReturn - Should this function actually return a struct by-value? - bool isStructReturn = F->isStructReturn(); + bool isStructReturn = F->hasStructRetAttr(); if (F->hasInternalLinkage()) Out << "static "; if (F->hasDLLImportLinkage()) Out << "__declspec(dllimport) "; @@ -2024,7 +2024,7 @@ void CWriter::printFunction(Function &F) { /// isStructReturn - Should this function actually return a struct by-value? - bool isStructReturn = F.isStructReturn(); + bool isStructReturn = F.hasStructRetAttr(); printFunctionSignature(&F, false); Out << " {\n"; @@ -2148,7 +2148,7 @@ // void CWriter::visitReturnInst(ReturnInst &I) { // If this is a struct return function, return the temporary struct. - bool isStructReturn = I.getParent()->getParent()->isStructReturn(); + bool isStructReturn = I.getParent()->getParent()->hasStructRetAttr(); if (isStructReturn) { Out << " return StructReturn;\n"; @@ -2584,7 +2584,7 @@ // parameter instead of passing it to the call. const ParamAttrsList *PAL = I.getParamAttrs(); bool hasByVal = I.hasByValArgument(); - bool isStructRet = I.isStructReturn(); + bool isStructRet = I.hasStructRetAttr(); if (isStructRet) { writeOperandDeref(I.getOperand(1)); Out << " = "; Modified: llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp?rev=47857&r1=47856&r2=47857&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp Mon Mar 3 15:46:28 2008 @@ -102,13 +102,13 @@ case StdCall: // "Pure" variadic functions do not receive @0 suffix. if (!FT->isVarArg() || (FT->getNumParams() == 0) || - (FT->getNumParams() == 1 && F->isStructReturn())) + (FT->getNumParams() == 1 && F->hasStructRetAttr())) Name += '@' + utostr_32(Info->getBytesToPopOnReturn()); break; case FastCall: // "Pure" variadic functions do not receive @0 suffix. if (!FT->isVarArg() || (FT->getNumParams() == 0) || - (FT->getNumParams() == 1 && F->isStructReturn())) + (FT->getNumParams() == 1 && F->hasStructRetAttr())) Name += '@' + utostr_32(Info->getBytesToPopOnReturn()); if (Name[0] == '_') { Modified: llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp?rev=47857&r1=47856&r2=47857&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp Mon Mar 3 15:46:28 2008 @@ -255,7 +255,7 @@ const Function *F = A.getParent(); // If this is the return value of a struct function, it's not really dead. - if (F->isStructReturn() && &*(F->arg_begin()) == &A) + if (F->hasStructRetAttr() && &*(F->arg_begin()) == &A) return Live; if (A.use_empty()) // First check, directly dead? Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp?rev=47857&r1=47856&r2=47857&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Mon Mar 3 15:46:28 2008 @@ -75,7 +75,7 @@ return false; // Make sure that function returns struct. - if (F->arg_size() == 0 || !F->isStructReturn() || F->doesNotReturn()) + if (F->arg_size() == 0 || !F->hasStructRetAttr() || F->doesNotReturn()) return false; assert (F->getReturnType() == Type::VoidTy && "Invalid function return type"); Modified: llvm/trunk/lib/VMCore/Function.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Function.cpp?rev=47857&r1=47856&r2=47857&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Function.cpp (original) +++ llvm/trunk/lib/VMCore/Function.cpp Mon Mar 3 15:46:28 2008 @@ -168,10 +168,10 @@ return doesNotAccessMemory() || paramHasAttr(0, ParamAttr::ReadOnly); } -/// @brief Determine if the function returns a structure. -bool Function::isStructReturn() const { - return paramHasAttr(1, ParamAttr::StructRet) - || isa(getReturnType()); +/// @brief Determine if the function returns a structure through first +/// pointer argument. +bool Function::hasStructRetAttr() const { + return paramHasAttr(1, ParamAttr::StructRet); } //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/VMCore/Instructions.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=47857&r1=47856&r2=47857&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Instructions.cpp (original) +++ llvm/trunk/lib/VMCore/Instructions.cpp Mon Mar 3 15:46:28 2008 @@ -419,8 +419,9 @@ return paramHasAttr(0, ParamAttr::NoUnwind); } -/// @brief Determine if the call returns a structure. -bool CallInst::isStructReturn() const { +/// @brief Determine if the call returns a structure through first +/// pointer argument. +bool CallInst::hasStructRetAttr() const { // Be friendly and also check the callee. return paramHasAttr(1, ParamAttr::StructRet); } @@ -560,8 +561,9 @@ setParamAttrs(PAL); } -/// @brief Determine if the call returns a structure. -bool InvokeInst::isStructReturn() const { +/// @brief Determine if the invoke returns a structure through first +/// pointer argument. +bool InvokeInst::hasStructRetAttr() const { // Be friendly and also check the callee. return paramHasAttr(1, ParamAttr::StructRet); } Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=47857&r1=47856&r2=47857&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Mon Mar 3 15:46:28 2008 @@ -455,6 +455,9 @@ isa(F.getReturnType()), "Functions cannot return aggregate values!", &F); + Assert1(!F.hasStructRetAttr() || F.getReturnType() == Type::VoidTy, + "Invalid struct return type!", &F); + const ParamAttrsList *Attrs = F.getParamAttrs(); Assert1(!Attrs || From sabre at nondot.org Mon Mar 3 15:59:00 2008 From: sabre at nondot.org (Chris Lattner) Date: Mon, 03 Mar 2008 21:59:00 -0000 Subject: [llvm-commits] [llvm] r47858 - /llvm/trunk/test/CFrontend/2008-03-03-CtorAttrType.c Message-ID: <200803032159.m23Lx0Es014156@zion.cs.uiuc.edu> Author: lattner Date: Mon Mar 3 15:59:00 2008 New Revision: 47858 URL: http://llvm.org/viewvc/llvm-project?rev=47858&view=rev Log: new testcase Added: llvm/trunk/test/CFrontend/2008-03-03-CtorAttrType.c Added: llvm/trunk/test/CFrontend/2008-03-03-CtorAttrType.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2008-03-03-CtorAttrType.c?rev=47858&view=auto ============================================================================== --- llvm/trunk/test/CFrontend/2008-03-03-CtorAttrType.c (added) +++ llvm/trunk/test/CFrontend/2008-03-03-CtorAttrType.c Mon Mar 3 15:59:00 2008 @@ -0,0 +1,6 @@ +// RUN: %llvmgcc %s -S -emit-llvm -o - | grep llvm.global_ctors +int __attribute__((constructor)) foo(void) { + return 0; +} +void __attribute__((constructor)) bar(void) {} + From sabre at nondot.org Mon Mar 3 15:59:25 2008 From: sabre at nondot.org (Chris Lattner) Date: Mon, 03 Mar 2008 21:59:25 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47859 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Message-ID: <200803032159.m23LxPRx014179@zion.cs.uiuc.edu> Author: lattner Date: Mon Mar 3 15:59:25 2008 New Revision: 47859 URL: http://llvm.org/viewvc/llvm-project?rev=47859&view=rev Log: Fix test/CFrontend/2008-03-03-CtorAttrType.c by forcing all ctor functions to have the same type. Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=47859&r1=47858&r2=47859&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Mon Mar 3 15:59:25 2008 @@ -476,9 +476,17 @@ std::vector InitList; std::vector StructInit; StructInit.resize(2); + + const Type *FPTy = FunctionType::get(Type::VoidTy, std::vector(), + false); + FPTy = PointerType::getUnqual(FPTy); + for (unsigned i = 0, e = Tors.size(); i != e; ++i) { StructInit[0] = ConstantInt::get(Type::Int32Ty, Tors[i].second); - StructInit[1] = Tors[i].first; + + // __attribute__(constructor) can be on a function with any type. Make sure + // the pointer is void()*. + StructInit[1] = ConstantExpr::getBitCast(Tors[i].first, FPTy); InitList.push_back(ConstantStruct::get(StructInit, false)); } Constant *Array = From isanbard at gmail.com Mon Mar 3 16:11:16 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 03 Mar 2008 22:11:16 -0000 Subject: [llvm-commits] [llvm] r47860 - /llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Message-ID: <200803032211.m23MBGqd014690@zion.cs.uiuc.edu> Author: void Date: Mon Mar 3 16:11:16 2008 New Revision: 47860 URL: http://llvm.org/viewvc/llvm-project?rev=47860&view=rev Log: Multiple instructions can be inserted when eliminating frame indexes. We need the register scavenger to process all of those new instructions instead of just the last one inserted. Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=47860&r1=47859&r2=47860&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original) +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Mon Mar 3 16:11:16 2008 @@ -530,27 +530,44 @@ // Visit the instructions created by eliminateCallFramePseudoInstr(). I = next(PrevI); MI = NULL; - } else if (I->getOpcode() == TargetInstrInfo::DECLARE) + } else if (I->getOpcode() == TargetInstrInfo::DECLARE) { // Ignore it. - I++; - else { - I++; + ++I; + } else { + bool DoIncr = true; + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) if (MI->getOperand(i).isFrameIndex()) { + // Some instructions (e.g. inline asm instructions) can have + // multiple frame indices and/or cause eliminateFrameIndex to insert + // more than one instruction. We need the register scavenger to go + // through all of these instructions so that it can update its + // register information. We keep the iterator at the point before + // insertion so that we can revisit them in full. + bool AtBeginning = (I == BB->begin()); + if (!AtBeginning) --I; + // If this instruction has a FrameIndex operand, we need to use that // target machine register info object to eliminate it. TRI.eliminateFrameIndex(MI, SPAdj, RS); - // Revisit the instruction in full. Some instructions (e.g. inline - // asm instructions) can have multiple frame indices. - --I; + // Reset the iterator if we were at the beginning of the BB. + if (AtBeginning) { + I = BB->begin(); + DoIncr = false; + } + MI = 0; break; } + + if (DoIncr) ++I; } + // Update register states. if (RS && MI) RS->forward(MI); } + assert(SPAdj == 0 && "Unbalanced call frame setup / destroy pairs?"); } } From isanbard at gmail.com Mon Mar 3 16:12:26 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 03 Mar 2008 22:12:26 -0000 Subject: [llvm-commits] [llvm] r47861 - /llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Message-ID: <200803032212.m23MCQRq014745@zion.cs.uiuc.edu> Author: void Date: Mon Mar 3 16:12:25 2008 New Revision: 47861 URL: http://llvm.org/viewvc/llvm-project?rev=47861&view=rev Log: Make the register scavenger update the bookkeeping values for sub/super registers. Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=47861&r1=47860&r2=47861&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original) +++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Mon Mar 3 16:12:25 2008 @@ -25,6 +25,24 @@ #include "llvm/ADT/STLExtras.h" using namespace llvm; +/// setUsed - Set the register and its sub-registers as being used. +void RegScavenger::setUsed(unsigned Reg) { + RegsAvailable.reset(Reg); + + for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg); + unsigned SubReg = *SubRegs; ++SubRegs) + RegsAvailable.reset(SubReg); +} + +/// setUnused - Set the register and its sub-registers as being unused. +void RegScavenger::setUnused(unsigned Reg) { + RegsAvailable.set(Reg); + + for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg); + unsigned SubReg = *SubRegs; ++SubRegs) + RegsAvailable.set(SubReg); +} + void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) { const MachineFunction &MF = *mbb->getParent(); const TargetMachine &TM = MF.getTarget(); @@ -105,9 +123,10 @@ const MachineOperand &MO = MI->getOperand(i); if (!MO.isRegister() || !MO.isUse()) continue; + unsigned Reg = MO.getReg(); - if (Reg == 0) - continue; + if (Reg == 0) continue; + if (!isUsed(Reg)) { // Register has been scavenged. Restore it! if (Reg != ScavengedReg) @@ -115,9 +134,16 @@ else restoreScavengedReg(); } - if (MO.isKill() && !isReserved(Reg)) + + if (MO.isKill() && !isReserved(Reg)) { ChangedRegs.set(Reg); + + for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg); + unsigned SubReg = *SubRegs; ++SubRegs) + ChangedRegs.set(SubReg); + } } + // Change states of all registers after all the uses are processed to guard // against multiple uses. setUnused(ChangedRegs); @@ -125,19 +151,24 @@ // Process defs. for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); + if (!MO.isRegister() || !MO.isDef()) continue; + unsigned Reg = MO.getReg(); + // If it's dead upon def, then it is now free. if (MO.isDead()) { setUnused(Reg); continue; } + // Skip two-address destination operand. if (TID.findTiedToSrcOperand(i) != -1) { assert(isUsed(Reg) && "Using an undefined register!"); continue; } + assert((isUnused(Reg) || isReserved(Reg)) && "Re-defining a live register!"); setUsed(Reg); @@ -177,6 +208,11 @@ continue; assert(isUnused(Reg) || isReserved(Reg)); ChangedRegs.set(Reg); + + // Set the sub-registers as "used". + for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg); + unsigned SubReg = *SubRegs; ++SubRegs) + ChangedRegs.set(SubReg); } setUsed(ChangedRegs); } From isanbard at gmail.com Mon Mar 3 16:14:33 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 03 Mar 2008 22:14:33 -0000 Subject: [llvm-commits] [llvm] r47862 - /llvm/trunk/lib/CodeGen/MachineInstr.cpp Message-ID: <200803032214.m23MEXkF014824@zion.cs.uiuc.edu> Author: void Date: Mon Mar 3 16:14:33 2008 New Revision: 47862 URL: http://llvm.org/viewvc/llvm-project?rev=47862&view=rev Log: Go through the machine instruction's operands to make sure that we're not marking both a super- and sub-register as "killed". This removes implicit uses that are marked as "killed". Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=47862&r1=47861&r2=47862&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Mon Mar 3 16:14:33 2008 @@ -678,34 +678,74 @@ bool MachineInstr::addRegisterKilled(unsigned IncomingReg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound) { - bool Found = false; - for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { + // Go through the machine instruction's operands to eliminate any potentially + // illegal conditions. I.e., a super- and sub-register both marked "kill". + Restart: + for (unsigned i = 0, e = getNumOperands(); i < e; ++i) { MachineOperand &MO = getOperand(i); + if (MO.isRegister() && MO.isUse()) { unsigned Reg = MO.getReg(); - if (!Reg) + + if (!Reg || IncomingReg == Reg || + !TargetRegisterInfo::isPhysicalRegister(Reg) || + !TargetRegisterInfo::isPhysicalRegister(IncomingReg)) continue; + + if (RegInfo->isSubRegister(IncomingReg, Reg)) { + if (MO.isKill()) { + if (MO.isImplicit()) { + // Remove this implicit use that marks the sub-register "kill". Let + // the super-register take care of this information. + RemoveOperand(i); + goto Restart; // Instruction was modified, redo checking. + } else { + // The super-register is going to take care of this kill + // information. + MO.setIsKill(false); + } + } + } else if (RegInfo->isSuperRegister(IncomingReg, Reg) && MO.isKill()) { + // The kill information is already handled by a super-register. Don't + // add this sub-register as a kill. + return true; + } + } + } + + // If the register already exists, then make sure it or its super-register is + // marked "kill". + for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { + MachineOperand &MO = getOperand(i); + + if (MO.isRegister() && MO.isUse()) { + unsigned Reg = MO.getReg(); + if (!Reg) continue; + if (Reg == IncomingReg) { MO.setIsKill(); - Found = true; - break; + return true; } else if (TargetRegisterInfo::isPhysicalRegister(Reg) && TargetRegisterInfo::isPhysicalRegister(IncomingReg) && RegInfo->isSuperRegister(IncomingReg, Reg) && - MO.isKill()) + MO.isKill()) { // A super-register kill already exists. - Found = true; + return true; + } } } - // If not found, this means an alias of one of the operand is killed. Add a + // If not found, this means an alias of one of the operands is killed. Add a // new implicit operand if required. - if (!Found && AddIfNotFound) { - addOperand(MachineOperand::CreateReg(IncomingReg, false/*IsDef*/, - true/*IsImp*/,true/*IsKill*/)); + if (AddIfNotFound) { + addOperand(MachineOperand::CreateReg(IncomingReg, + false /*IsDef*/, + true /*IsImp*/, + true /*IsKill*/)); return true; } - return Found; + + return false; } bool MachineInstr::addRegisterDead(unsigned IncomingReg, From isanbard at gmail.com Mon Mar 3 16:19:16 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 03 Mar 2008 22:19:16 -0000 Subject: [llvm-commits] [llvm] r47863 - in /llvm/trunk: include/llvm/CodeGen/RegisterScavenging.h lib/Target/PowerPC/PPCInstrInfo.cpp lib/Target/PowerPC/PPCInstrInfo.td lib/Target/PowerPC/PPCMachineFunctionInfo.h lib/Target/PowerPC/PPCRegisterInfo.cpp lib/Target/PowerPC/PPCRegisterInfo.h test/CodeGen/PowerPC/Frames-alloca.ll Message-ID: <200803032219.m23MJG6l015020@zion.cs.uiuc.edu> Author: void Date: Mon Mar 3 16:19:16 2008 New Revision: 47863 URL: http://llvm.org/viewvc/llvm-project?rev=47863&view=rev Log: This is the initial check-in for adding register scavenging to PPC. (Currently, PPC-64 doesn't work.) This also lowers the spilling of the CR registers so that it uses a register other than the default R0 register (the scavenger scrounges for one). A significant part of this patch fixes how kill information is handled. Modified: llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td llvm/trunk/lib/Target/PowerPC/PPCMachineFunctionInfo.h llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll Modified: llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h?rev=47863&r1=47862&r2=47863&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h (original) +++ llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h Mon Mar 3 16:19:16 2008 @@ -96,9 +96,9 @@ /// setUsed / setUnused - Mark the state of one or a number of registers. /// - void setUsed(unsigned Reg) { RegsAvailable.reset(Reg); } + void setUsed(unsigned Reg); void setUsed(BitVector Regs) { RegsAvailable &= ~Regs; } - void setUnused(unsigned Reg) { RegsAvailable.set(Reg); } + void setUnused(unsigned Reg); void setUnused(BitVector Regs) { RegsAvailable |= Regs; } /// FindUnusedReg - Find a unused register of the specified register class Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=47863&r1=47862&r2=47863&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp Mon Mar 3 16:19:16 2008 @@ -13,6 +13,7 @@ #include "PPCInstrInfo.h" #include "PPCInstrBuilder.h" +#include "PPCMachineFunctionInfo.h" #include "PPCPredicates.h" #include "PPCGenInstrInfo.inc" #include "PPCTargetMachine.h" @@ -316,10 +317,11 @@ } } -static void StoreRegToStackSlot(const TargetInstrInfo &TII, +static bool StoreRegToStackSlot(const TargetInstrInfo &TII, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, - SmallVectorImpl &NewMIs) { + SmallVectorImpl &NewMIs, + bool isPPC64/*FIXME (64-bit): Remove.*/) { if (RC == PPC::GPRCRegisterClass) { if (SrcReg != PPC::LR) { NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STW)) @@ -351,22 +353,30 @@ NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STFS)) .addReg(SrcReg, false, false, isKill), FrameIdx)); } else if (RC == PPC::CRRCRegisterClass) { - // FIXME: We use R0 here, because it isn't available for RA. - // We need to store the CR in the low 4-bits of the saved value. First, - // issue a MFCR to save all of the CRBits. - NewMIs.push_back(BuildMI(TII.get(PPC::MFCR), PPC::R0)); + if (!isPPC64) { // FIXME (64-bit): Enable + NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::SPILL_CR)) + .addReg(SrcReg, false, false, isKill), + FrameIdx)); + return true; + } else { + // FIXME: We use R0 here, because it isn't available for RA. We need to + // store the CR in the low 4-bits of the saved value. First, issue a MFCR + // to save all of the CRBits. + NewMIs.push_back(BuildMI(TII.get(PPC::MFCR), PPC::R0)); - // If the saved register wasn't CR0, shift the bits left so that they are in - // CR0's slot. - if (SrcReg != PPC::CR0) { - unsigned ShiftBits = PPCRegisterInfo::getRegisterNumbering(SrcReg)*4; - // rlwinm r0, r0, ShiftBits, 0, 31. - NewMIs.push_back(BuildMI(TII.get(PPC::RLWINM), PPC::R0) - .addReg(PPC::R0).addImm(ShiftBits).addImm(0).addImm(31)); - } + // If the saved register wasn't CR0, shift the bits left so that they are + // in CR0's slot. + if (SrcReg != PPC::CR0) { + unsigned ShiftBits = PPCRegisterInfo::getRegisterNumbering(SrcReg)*4; + // rlwinm r0, r0, ShiftBits, 0, 31. + NewMIs.push_back(BuildMI(TII.get(PPC::RLWINM), PPC::R0) + .addReg(PPC::R0).addImm(ShiftBits).addImm(0).addImm(31)); + } - NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STW)) - .addReg(PPC::R0, false, false, isKill), FrameIdx)); + NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STW)) + .addReg(PPC::R0, false, false, isKill), + FrameIdx)); + } } else if (RC == PPC::VRRCRegisterClass) { // We don't have indexed addressing for vector loads. Emit: // R0 = ADDI FI# @@ -381,26 +391,39 @@ assert(0 && "Unknown regclass!"); abort(); } + + return false; } void PPCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - unsigned SrcReg, bool isKill, int FrameIdx, - const TargetRegisterClass *RC) const { + MachineBasicBlock::iterator MI, + unsigned SrcReg, bool isKill, int FrameIdx, + const TargetRegisterClass *RC) const { SmallVector NewMIs; - StoreRegToStackSlot(*this, SrcReg, isKill, FrameIdx, RC, NewMIs); + + if (StoreRegToStackSlot(*this, SrcReg, isKill, FrameIdx, RC, NewMIs, + TM.getSubtargetImpl()->isPPC64()/*FIXME (64-bit): Remove.*/)) { + PPCFunctionInfo *FuncInfo = MBB.getParent()->getInfo(); + FuncInfo->setSpillsCR(); + } + for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) MBB.insert(MI, NewMIs[i]); } void PPCInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, - bool isKill, - SmallVectorImpl &Addr, - const TargetRegisterClass *RC, - SmallVectorImpl &NewMIs) const { + bool isKill, + SmallVectorImpl &Addr, + const TargetRegisterClass *RC, + SmallVectorImpl &NewMIs) const{ if (Addr[0].isFrameIndex()) { - StoreRegToStackSlot(*this, SrcReg, isKill, Addr[0].getIndex(), RC, NewMIs); + if (StoreRegToStackSlot(*this, SrcReg, isKill, Addr[0].getIndex(), RC, NewMIs, + TM.getSubtargetImpl()->isPPC64()/*FIXME (64-bit): Remove.*/)) { + PPCFunctionInfo *FuncInfo = MF.getInfo(); + FuncInfo->setSpillsCR(); + } + return; } @@ -495,9 +518,9 @@ void PPCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - unsigned DestReg, int FrameIdx, - const TargetRegisterClass *RC) const { + MachineBasicBlock::iterator MI, + unsigned DestReg, int FrameIdx, + const TargetRegisterClass *RC) const { SmallVector NewMIs; LoadRegFromStackSlot(*this, DestReg, FrameIdx, RC, NewMIs); for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) @@ -505,9 +528,9 @@ } void PPCInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, - SmallVectorImpl &Addr, - const TargetRegisterClass *RC, - SmallVectorImpl &NewMIs) const{ + SmallVectorImpl &Addr, + const TargetRegisterClass *RC, + SmallVectorImpl &NewMIs)const{ if (Addr[0].isFrameIndex()) { LoadRegFromStackSlot(*this, DestReg, Addr[0].getIndex(), RC, NewMIs); return; Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=47863&r1=47862&r2=47863&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Mon Mar 3 16:19:16 2008 @@ -371,6 +371,11 @@ []>; } +// SPILL_CR - Indicate that we're dumping the CR register, so we'll need to +// scavenge a register for it. +def SPILL_CR : Pseudo<(outs), (ins GPRC:$cond, memri:$F), + "${:comment} SPILL_CR $cond $F", []>; + let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7 in { let isReturn = 1 in def BLR : XLForm_2_br<19, 16, 0, (outs), (ins pred:$p), @@ -380,8 +385,6 @@ def BCTR : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), "bctr", BrB, []>; } - - let Defs = [LR] in def MovePCtoLR : Pseudo<(outs), (ins piclabel:$label), "bl $label", []>, PPC970_Unit_BRU; Modified: llvm/trunk/lib/Target/PowerPC/PPCMachineFunctionInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCMachineFunctionInfo.h?rev=47863&r1=47862&r2=47863&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCMachineFunctionInfo.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCMachineFunctionInfo.h Mon Mar 3 16:19:16 2008 @@ -35,6 +35,9 @@ /// only valid after the initial scan of the function by PEI. bool UsesLR; + /// SpillsCR - Indicates whether CR is spilled in the current function. + bool SpillsCR; + /// LRStoreRequired - The bool indicates whether there is some explicit use of /// the LR/LR8 stack slot that is not obvious from scanning the code. This /// requires that the code generator produce a store of LR to the stack on @@ -42,7 +45,10 @@ bool LRStoreRequired; public: PPCFunctionInfo(MachineFunction &MF) - : FramePointerSaveIndex(0), ReturnAddrSaveIndex(0), LRStoreRequired(false){} + : FramePointerSaveIndex(0), + ReturnAddrSaveIndex(0), + SpillsCR(false), + LRStoreRequired(false) {} int getFramePointerSaveIndex() const { return FramePointerSaveIndex; } void setFramePointerSaveIndex(int Idx) { FramePointerSaveIndex = Idx; } @@ -57,9 +63,11 @@ void setUsesLR(bool U) { UsesLR = U; } bool usesLR() const { return UsesLR; } + void setSpillsCR() { SpillsCR = true; } + bool isCRSpilled() const { return SpillsCR; } + void setLRStoreRequired() { LRStoreRequired = true; } bool isLRStoreRequired() const { return LRStoreRequired; } - }; } // end of namespace llvm Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=47863&r1=47862&r2=47863&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Mon Mar 3 16:19:16 2008 @@ -28,6 +28,7 @@ #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineLocation.h" #include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/RegisterScavenging.h" #include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/Target/TargetFrameInfo.h" #include "llvm/Target/TargetInstrInfo.h" @@ -41,6 +42,12 @@ #include using namespace llvm; +// FIXME (64-bit): Should be inlined. +bool +PPCRegisterInfo::requiresRegisterScavenging(const MachineFunction &) const { + return !Subtarget.isPPC64(); +} + /// getRegisterNumbering - Given the enum value for some register, e.g. /// PPC::F14, return the number that it corresponds to (e.g. 14). unsigned PPCRegisterInfo::getRegisterNumbering(unsigned RegEnum) { @@ -280,23 +287,40 @@ return NoFramePointerElim || MFI->hasVarSizedObjects(); } +static bool spillsCR(const MachineFunction &MF) { + const PPCFunctionInfo *FuncInfo = MF.getInfo(); + return FuncInfo->isCRSpilled(); +} + BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); Reserved.set(PPC::R0); Reserved.set(PPC::R1); Reserved.set(PPC::LR); + Reserved.set(PPC::LR8); + // In Linux, r2 is reserved for the OS. if (!Subtarget.isDarwin()) Reserved.set(PPC::R2); - // On PPC64, r13 is the thread pointer. Never allocate this register. - // Note that this is overconservative, as it also prevents allocation of - // R31 when the FP is not needed. + + // On PPC64, r13 is the thread pointer. Never allocate this register. Note + // that this is over conservative, as it also prevents allocation of R31 when + // the FP is not needed. if (Subtarget.isPPC64()) { Reserved.set(PPC::R13); Reserved.set(PPC::R31); + + Reserved.set(PPC::R0); // FIXME (64-bit): Remove + + Reserved.set(PPC::X0); + Reserved.set(PPC::X1); + Reserved.set(PPC::X13); + Reserved.set(PPC::X31); } + if (needsFP(MF)) Reserved.set(PPC::R31); + return Reserved; } @@ -333,14 +357,29 @@ MBB.erase(I); } -/// LowerDynamicAlloc - Generate the code for allocating an object in the +/// findScratchRegister - Find a 'free' PPC register. Try for a call-clobbered +/// register first and then a spilled callee-saved register if that fails. +static +unsigned findScratchRegister(MachineBasicBlock::iterator II, RegScavenger *RS, + const TargetRegisterClass *RC, int SPAdj) { + assert(RS && "Register scavenging must be on"); + unsigned Reg = RS->FindUnusedReg(RC, true); + // FIXME: move ARM callee-saved reg scan to target independent code, then + // search for already spilled CS register here. + if (Reg == 0) + Reg = RS->scavengeRegister(RC, II, SPAdj); + return Reg; +} + +/// lowerDynamicAlloc - Generate the code for allocating an object in the /// current frame. The sequence of code with be in the general form /// /// addi R0, SP, #frameSize ; get the address of the previous frame /// stwxu R0, SP, Rnegsize ; add and update the SP with the negated size /// addi Rnew, SP, #maxCalFrameSize ; get the top of the allocation /// -void PPCRegisterInfo::lowerDynamicAlloc(MachineBasicBlock::iterator II) const { +void PPCRegisterInfo::lowerDynamicAlloc(MachineBasicBlock::iterator II, + int SPAdj, RegScavenger *RS) const { // Get the instruction. MachineInstr &MI = *II; // Get the instruction's basic block. @@ -369,44 +408,128 @@ // Because R0 is our only safe tmp register and addi/addis treat R0 as zero. // Constructing the constant and adding would take 3 instructions. // Fortunately, a frame greater than 32K is rare. + const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; + const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; + const TargetRegisterClass *RC = LP64 ? G8RC : GPRC; + + // FIXME (64-bit): Use "findScratchRegister" + unsigned Reg; + if (!LP64) + Reg = findScratchRegister(II, RS, RC, SPAdj); + else + Reg = PPC::R0; + if (MaxAlign < TargetAlign && isInt16(FrameSize)) { - BuildMI(MBB, II, TII.get(PPC::ADDI), PPC::R0) + BuildMI(MBB, II, TII.get(PPC::ADDI), Reg) .addReg(PPC::R31) .addImm(FrameSize); } else if (LP64) { - BuildMI(MBB, II, TII.get(PPC::LD), PPC::X0) + Reg = PPC::X0; // FIXME (64-bit): Remove. + BuildMI(MBB, II, TII.get(PPC::LD), Reg) .addImm(0) .addReg(PPC::X1); } else { - BuildMI(MBB, II, TII.get(PPC::LWZ), PPC::R0) + BuildMI(MBB, II, TII.get(PPC::LWZ), Reg) .addImm(0) .addReg(PPC::R1); } - // Grow the stack and update the stack pointer link, then - // determine the address of new allocated space. + // Grow the stack and update the stack pointer link, then determine the + // address of new allocated space. if (LP64) { +#if 0 // FIXME (64-bit): Enable BuildMI(MBB, II, TII.get(PPC::STDUX)) - .addReg(PPC::X0) + .addReg(Reg, false, false, true) .addReg(PPC::X1) .addReg(MI.getOperand(1).getReg()); - BuildMI(MBB, II, TII.get(PPC::ADDI8), MI.getOperand(0).getReg()) +#else + BuildMI(MBB, II, TII.get(PPC::STDUX)) + .addReg(PPC::X0, false, false, true) .addReg(PPC::X1) - .addImm(maxCallFrameSize); + .addReg(MI.getOperand(1).getReg()); +#endif + + if (!MI.getOperand(1).isKill()) + BuildMI(MBB, II, TII.get(PPC::ADDI8), MI.getOperand(0).getReg()) + .addReg(PPC::X1) + .addImm(maxCallFrameSize); + else + // Implicitly kill the register. + BuildMI(MBB, II, TII.get(PPC::ADDI8), MI.getOperand(0).getReg()) + .addReg(PPC::X1) + .addImm(maxCallFrameSize) + .addReg(MI.getOperand(1).getReg(), false, true, true); } else { BuildMI(MBB, II, TII.get(PPC::STWUX)) - .addReg(PPC::R0) + .addReg(Reg, false, false, true) .addReg(PPC::R1) .addReg(MI.getOperand(1).getReg()); - BuildMI(MBB, II, TII.get(PPC::ADDI), MI.getOperand(0).getReg()) - .addReg(PPC::R1) - .addImm(maxCallFrameSize); + + if (!MI.getOperand(1).isKill()) + BuildMI(MBB, II, TII.get(PPC::ADDI), MI.getOperand(0).getReg()) + .addReg(PPC::R1) + .addImm(maxCallFrameSize); + else + // Implicitly kill the register. + BuildMI(MBB, II, TII.get(PPC::ADDI), MI.getOperand(0).getReg()) + .addReg(PPC::R1) + .addImm(maxCallFrameSize) + .addReg(MI.getOperand(1).getReg(), false, true, true); } // Discard the DYNALLOC instruction. MBB.erase(II); } +/// lowerCRSpilling - Generate the code for spilling a CR register. Instead of +/// reserving a whole register (R0), we scrounge for one here. This generates +/// code like this: +/// +/// mfcr rA ; Move the conditional register into GPR rA. +/// rlwinm rA, rA, SB, 0, 31 ; Shift the bits left so they are in CR0's slot. +/// stw rA, FI ; Store rA to the frame. +/// +void PPCRegisterInfo::lowerCRSpilling(MachineBasicBlock::iterator II, + unsigned FrameIndex, int SPAdj, + RegScavenger *RS) const { + // Get the instruction. + MachineInstr &MI = *II; // ; SPILL_CR , , + // Get the instruction's basic block. + MachineBasicBlock &MBB = *MI.getParent(); + + const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; + const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; + const TargetRegisterClass *RC = Subtarget.isPPC64() ? G8RC : GPRC; + unsigned Reg = findScratchRegister(II, RS, RC, SPAdj); + + // We need to store the CR in the low 4-bits of the saved value. First, issue + // an MFCR to save all of the CRBits. + if (!MI.getOperand(0).isKill()) + BuildMI(MBB, II, TII.get(PPC::MFCR), Reg); + else + // Implicitly kill the CR register. + BuildMI(MBB, II, TII.get(PPC::MFCR), Reg) + .addReg(MI.getOperand(0).getReg(), false, true, true); + + // If the saved register wasn't CR0, shift the bits left so that they are in + // CR0's slot. + unsigned SrcReg = MI.getOperand(0).getReg(); + if (SrcReg != PPC::CR0) + // rlwinm rA, rA, ShiftBits, 0, 31. + BuildMI(MBB, II, TII.get(PPC::RLWINM), Reg) + .addReg(Reg, false, false, true) + .addImm(PPCRegisterInfo::getRegisterNumbering(SrcReg) * 4) + .addImm(0) + .addImm(31); + + addFrameReference(BuildMI(MBB, II, TII.get(PPC::STW)) + .addReg(Reg, false, false, MI.getOperand(1).getImm()), + FrameIndex); + + // Discard the pseudo instruction. + MBB.erase(II); +} + void PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, RegScavenger *RS) const { assert(SPAdj == 0 && "Unexpected"); @@ -431,10 +554,10 @@ unsigned OffsetOperandNo = (FIOperandNo == 2) ? 1 : 2; if (MI.getOpcode() == TargetInstrInfo::INLINEASM) OffsetOperandNo = FIOperandNo-1; - + // Get the frame index. int FrameIndex = MI.getOperand(FIOperandNo).getIndex(); - + // Get the frame pointer save index. Users of this index are primarily // DYNALLOC instructions. PPCFunctionInfo *FI = MF.getInfo(); @@ -445,7 +568,14 @@ // Special case for dynamic alloca. if (FPSI && FrameIndex == FPSI && (OpC == PPC::DYNALLOC || OpC == PPC::DYNALLOC8)) { - lowerDynamicAlloc(II); + lowerDynamicAlloc(II, SPAdj, RS); + return; + } + + // Special case for pseudo-op SPILL_CR. + if (!Subtarget.isPPC64()) // FIXME (64-bit): Remove. + if (OpC == PPC::SPILL_CR) { + lowerCRSpilling(II, FrameIndex, SPAdj, RS); return; } @@ -490,15 +620,31 @@ MI.getOperand(OffsetOperandNo).ChangeToImmediate(Offset); return; } - - // Insert a set of r0 with the full offset value before the ld, st, or add - BuildMI(MBB, II, TII.get(PPC::LIS), PPC::R0).addImm(Offset >> 16); - BuildMI(MBB, II, TII.get(PPC::ORI), PPC::R0).addReg(PPC::R0).addImm(Offset); - - // Convert into indexed form of the instruction - // sth 0:rA, 1:imm 2:(rB) ==> sthx 0:rA, 2:rB, 1:r0 - // addi 0:rA 1:rB, 2, imm ==> add 0:rA, 1:rB, 2:r0 + + // The offset doesn't fit into a single register, scavenge one to build the + // offset in. + // FIXME: figure out what SPAdj is doing here. + + // FIXME (64-bit): Use "findScratchRegister". + unsigned SReg; + if (!Subtarget.isPPC64()) + SReg = findScratchRegister(II, RS, &PPC::GPRCRegClass, SPAdj); + else + SReg = PPC::R0; + + // Insert a set of rA with the full offset value before the ld, st, or add + BuildMI(MBB, II, TII.get(PPC::LIS), SReg) + .addImm(Offset >> 16); + BuildMI(MBB, II, TII.get(PPC::ORI), SReg) + .addReg(SReg, false, false, true) + .addImm(Offset); + + // Convert into indexed form of the instruction: + // + // sth 0:rA, 1:imm 2:(rB) ==> sthx 0:rA, 2:rB, 1:r0 + // addi 0:rA 1:rB, 2, imm ==> add 0:rA, 1:rB, 2:r0 unsigned OperandBase; + if (OpC != TargetInstrInfo::INLINEASM) { assert(ImmToIdxMap.count(OpC) && "No indexed form of load or store available!"); @@ -511,7 +657,7 @@ unsigned StackReg = MI.getOperand(FIOperandNo).getReg(); MI.getOperand(OperandBase).ChangeToRegister(StackReg, false); - MI.getOperand(OperandBase+1).ChangeToRegister(PPC::R0, false); + MI.getOperand(OperandBase + 1).ChangeToRegister(SReg, false); } /// VRRegNo - Map from a numbered VR register to its enum value. @@ -598,24 +744,47 @@ UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be marked. } - unsigned SrcReg = MI->getOperand(1).getReg(); - unsigned DstReg = MI->getOperand(0).getReg(); // If no registers are used, turn this into a copy. if (UsedRegMask == 0) { // Remove all VRSAVE code. RemoveVRSaveCode(MI); return; - } else if ((UsedRegMask & 0xFFFF) == UsedRegMask) { - BuildMI(*MI->getParent(), MI, TII.get(PPC::ORI), DstReg) - .addReg(SrcReg).addImm(UsedRegMask); + } + + unsigned SrcReg = MI->getOperand(1).getReg(); + unsigned DstReg = MI->getOperand(0).getReg(); + + if ((UsedRegMask & 0xFFFF) == UsedRegMask) { + if (DstReg != SrcReg) + BuildMI(*MI->getParent(), MI, TII.get(PPC::ORI), DstReg) + .addReg(SrcReg) + .addImm(UsedRegMask); + else + BuildMI(*MI->getParent(), MI, TII.get(PPC::ORI), DstReg) + .addReg(SrcReg, false, false, true) + .addImm(UsedRegMask); } else if ((UsedRegMask & 0xFFFF0000) == UsedRegMask) { - BuildMI(*MI->getParent(), MI, TII.get(PPC::ORIS), DstReg) - .addReg(SrcReg).addImm(UsedRegMask >> 16); + if (DstReg != SrcReg) + BuildMI(*MI->getParent(), MI, TII.get(PPC::ORIS), DstReg) + .addReg(SrcReg) + .addImm(UsedRegMask >> 16); + else + BuildMI(*MI->getParent(), MI, TII.get(PPC::ORIS), DstReg) + .addReg(SrcReg, false, false, true) + .addImm(UsedRegMask >> 16); } else { - BuildMI(*MI->getParent(), MI, TII.get(PPC::ORIS), DstReg) - .addReg(SrcReg).addImm(UsedRegMask >> 16); + if (DstReg != SrcReg) + BuildMI(*MI->getParent(), MI, TII.get(PPC::ORIS), DstReg) + .addReg(SrcReg) + .addImm(UsedRegMask >> 16); + else + BuildMI(*MI->getParent(), MI, TII.get(PPC::ORIS), DstReg) + .addReg(SrcReg, false, false, true) + .addImm(UsedRegMask >> 16); + BuildMI(*MI->getParent(), MI, TII.get(PPC::ORI), DstReg) - .addReg(DstReg).addImm(UsedRegMask & 0xFFFF); + .addReg(DstReg, false, false, true) + .addImm(UsedRegMask & 0xFFFF); } // Remove the old UPDATE_VRSAVE instruction. @@ -675,9 +844,9 @@ MFI->setStackSize(FrameSize); } -void PPCRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, - RegScavenger *RS) - const { +void +PPCRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, + RegScavenger *RS) const { // Save and clear the LR state. PPCFunctionInfo *FI = MF.getInfo(); unsigned LR = getRARegister(); @@ -689,7 +858,7 @@ bool IsPPC64 = Subtarget.isPPC64(); bool IsELF32_ABI = Subtarget.isELF32_ABI(); bool IsMachoABI = Subtarget.isMachoABI(); - const MachineFrameInfo *MFI = MF.getFrameInfo(); + MachineFrameInfo *MFI = MF.getFrameInfo(); // If the frame pointer save index hasn't been defined yet. if (!FPSI && (NoFramePointerElim || MFI->hasVarSizedObjects()) && @@ -703,9 +872,25 @@ FI->setFramePointerSaveIndex(FPSI); } + // Reserve a slot closest to SP or frame pointer if we have a dynalloc or + // a large stack, which will require scavenging a register to materialize a + // large offset. + // FIXME: this doesn't actually check stack size, so is a bit pessimistic + // FIXME: doesn't detect whether or not we need to spill vXX, which requires + // r0 for now. + + if (!IsPPC64) // FIXME (64-bit): Enable. + if (needsFP(MF) || spillsCR(MF)) { + const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; + const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; + const TargetRegisterClass *RC = IsPPC64 ? G8RC : GPRC; + RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(), + RC->getAlignment())); + } } -void PPCRegisterInfo::emitPrologue(MachineFunction &MF) const { +void +PPCRegisterInfo::emitPrologue(MachineFunction &MF) const { MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB MachineBasicBlock::iterator MBBI = MBB.begin(); MachineFrameInfo *MFI = MF.getFrameInfo(); @@ -713,7 +898,7 @@ // Prepare for frame info. unsigned FrameLabelId = 0; - + // Scan the prolog, looking for an UPDATE_VRSAVE instruction. If we find it, // process it. for (unsigned i = 0; MBBI != MBB.end(); ++i, ++MBBI) { @@ -725,7 +910,7 @@ // Move MBBI back to the beginning of the function. MBBI = MBB.begin(); - + // Work out frame sizes. determineFrameLayout(MF); unsigned FrameSize = MFI->getStackSize(); @@ -743,29 +928,37 @@ int LROffset = PPCFrameInfo::getReturnSaveOffset(IsPPC64, IsMachoABI); int FPOffset = PPCFrameInfo::getFramePointerSaveOffset(IsPPC64, IsMachoABI); - + if (IsPPC64) { if (UsesLR) BuildMI(MBB, MBBI, TII.get(PPC::MFLR8), PPC::X0); if (HasFP) BuildMI(MBB, MBBI, TII.get(PPC::STD)) - .addReg(PPC::X31).addImm(FPOffset/4).addReg(PPC::X1); + .addReg(PPC::X31) + .addImm(FPOffset/4) + .addReg(PPC::X1); if (UsesLR) BuildMI(MBB, MBBI, TII.get(PPC::STD)) - .addReg(PPC::X0).addImm(LROffset/4).addReg(PPC::X1); + .addReg(PPC::X0) + .addImm(LROffset / 4) + .addReg(PPC::X1); } else { if (UsesLR) BuildMI(MBB, MBBI, TII.get(PPC::MFLR), PPC::R0); if (HasFP) BuildMI(MBB, MBBI, TII.get(PPC::STW)) - .addReg(PPC::R31).addImm(FPOffset).addReg(PPC::R1); + .addReg(PPC::R31) + .addImm(FPOffset) + .addReg(PPC::R1); if (UsesLR) BuildMI(MBB, MBBI, TII.get(PPC::STW)) - .addReg(PPC::R0).addImm(LROffset).addReg(PPC::R1); + .addReg(PPC::R0) + .addImm(LROffset) + .addReg(PPC::R1); } // Skip if a leaf routine. @@ -788,40 +981,65 @@ if (MaxAlign > TargetAlign) { assert(isPowerOf2_32(MaxAlign)&&isInt16(MaxAlign)&&"Invalid alignment!"); assert(isInt16(NegFrameSize) && "Unhandled stack size and alignment!"); + BuildMI(MBB, MBBI, TII.get(PPC::RLWINM), PPC::R0) - .addReg(PPC::R1).addImm(0).addImm(32-Log2_32(MaxAlign)).addImm(31); - BuildMI(MBB, MBBI, TII.get(PPC::SUBFIC) ,PPC::R0).addReg(PPC::R0) + .addReg(PPC::R1) + .addImm(0) + .addImm(32 - Log2_32(MaxAlign)) + .addImm(31); + BuildMI(MBB, MBBI, TII.get(PPC::SUBFIC) ,PPC::R0) + .addReg(PPC::R0, false, false, true) .addImm(NegFrameSize); BuildMI(MBB, MBBI, TII.get(PPC::STWUX)) - .addReg(PPC::R1).addReg(PPC::R1).addReg(PPC::R0); + .addReg(PPC::R1) + .addReg(PPC::R1) + .addReg(PPC::R0); } else if (isInt16(NegFrameSize)) { - BuildMI(MBB, MBBI, TII.get(PPC::STWU), - PPC::R1).addReg(PPC::R1).addImm(NegFrameSize).addReg(PPC::R1); + BuildMI(MBB, MBBI, TII.get(PPC::STWU), PPC::R1) + .addReg(PPC::R1) + .addImm(NegFrameSize) + .addReg(PPC::R1); } else { - BuildMI(MBB, MBBI, TII.get(PPC::LIS), PPC::R0).addImm(NegFrameSize >> 16); - BuildMI(MBB, MBBI, TII.get(PPC::ORI), PPC::R0).addReg(PPC::R0) + BuildMI(MBB, MBBI, TII.get(PPC::LIS), PPC::R0) + .addImm(NegFrameSize >> 16); + BuildMI(MBB, MBBI, TII.get(PPC::ORI), PPC::R0) + .addReg(PPC::R0, false, false, true) .addImm(NegFrameSize & 0xFFFF); - BuildMI(MBB, MBBI, TII.get(PPC::STWUX)).addReg(PPC::R1).addReg(PPC::R1) + BuildMI(MBB, MBBI, TII.get(PPC::STWUX)) + .addReg(PPC::R1) + .addReg(PPC::R1) .addReg(PPC::R0); } } else { // PPC64. if (MaxAlign > TargetAlign) { assert(isPowerOf2_32(MaxAlign)&&isInt16(MaxAlign)&&"Invalid alignment!"); assert(isInt16(NegFrameSize) && "Unhandled stack size and alignment!"); + BuildMI(MBB, MBBI, TII.get(PPC::RLDICL), PPC::X0) - .addReg(PPC::X1).addImm(0).addImm(64-Log2_32(MaxAlign)); - BuildMI(MBB, MBBI, TII.get(PPC::SUBFIC8), PPC::X0).addReg(PPC::X0) + .addReg(PPC::X1) + .addImm(0) + .addImm(64 - Log2_32(MaxAlign)); + BuildMI(MBB, MBBI, TII.get(PPC::SUBFIC8), PPC::X0) + .addReg(PPC::X0) .addImm(NegFrameSize); BuildMI(MBB, MBBI, TII.get(PPC::STDUX)) - .addReg(PPC::X1).addReg(PPC::X1).addReg(PPC::X0); + .addReg(PPC::X1) + .addReg(PPC::X1) + .addReg(PPC::X0); } else if (isInt16(NegFrameSize)) { BuildMI(MBB, MBBI, TII.get(PPC::STDU), PPC::X1) - .addReg(PPC::X1).addImm(NegFrameSize/4).addReg(PPC::X1); + .addReg(PPC::X1) + .addImm(NegFrameSize / 4) + .addReg(PPC::X1); } else { - BuildMI(MBB, MBBI, TII.get(PPC::LIS8), PPC::X0).addImm(NegFrameSize >>16); - BuildMI(MBB, MBBI, TII.get(PPC::ORI8), PPC::X0).addReg(PPC::X0) + BuildMI(MBB, MBBI, TII.get(PPC::LIS8), PPC::X0) + .addImm(NegFrameSize >> 16); + BuildMI(MBB, MBBI, TII.get(PPC::ORI8), PPC::X0) + .addReg(PPC::X0, false, false, true) .addImm(NegFrameSize & 0xFFFF); - BuildMI(MBB, MBBI, TII.get(PPC::STDUX)).addReg(PPC::X1).addReg(PPC::X1) + BuildMI(MBB, MBBI, TII.get(PPC::STDUX)) + .addReg(PPC::X1) + .addReg(PPC::X1) .addReg(PPC::X0); } } @@ -873,10 +1091,12 @@ // If there is a frame pointer, copy R1 into R31 if (HasFP) { if (!IsPPC64) { - BuildMI(MBB, MBBI, TII.get(PPC::OR), PPC::R31).addReg(PPC::R1) + BuildMI(MBB, MBBI, TII.get(PPC::OR), PPC::R31) + .addReg(PPC::R1) .addReg(PPC::R1); } else { - BuildMI(MBB, MBBI, TII.get(PPC::OR8), PPC::X31).addReg(PPC::X1) + BuildMI(MBB, MBBI, TII.get(PPC::OR8), PPC::X31) + .addReg(PPC::X1) .addReg(PPC::X1); } } Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h?rev=47863&r1=47862&r2=47863&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h Mon Mar 3 16:19:16 2008 @@ -51,13 +51,20 @@ /// time). bool targetHandlesStackFrameRounding() const { return true; } + /// requiresRegisterScavenging - We require a register scavenger. + /// FIXME (64-bit): Should be inlined. + bool requiresRegisterScavenging(const MachineFunction &MF) const; + bool hasFP(const MachineFunction &MF) const; void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; - void lowerDynamicAlloc(MachineBasicBlock::iterator II) const; + void lowerDynamicAlloc(MachineBasicBlock::iterator II, + int SPAdj, RegScavenger *RS) const; + void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex, + int SPAdj, RegScavenger *RS) const; void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, RegScavenger *RS = NULL) const; Modified: llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll?rev=47863&r1=47862&r2=47863&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll Mon Mar 3 16:19:16 2008 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ ; RUN: grep {stw r31, 20(r1)} ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ -; RUN: grep {stwu r1, -64(r1)} +; RUN: grep {stwu r1, -80(r1)} ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ ; RUN: grep {lwz r1, 0(r1)} ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ @@ -9,7 +9,7 @@ ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ ; RUN: grep {stw r31, 20(r1)} ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ -; RUN: grep {stwu r1, -64(r1)} +; RUN: grep {stwu r1, -80(r1)} ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ ; RUN: grep {lwz r1, 0(r1)} ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ From gohman at apple.com Mon Mar 3 16:20:46 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 03 Mar 2008 22:20:46 -0000 Subject: [llvm-commits] [llvm] r47864 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200803032220.m23MKkZm015081@zion.cs.uiuc.edu> Author: djg Date: Mon Mar 3 16:20:46 2008 New Revision: 47864 URL: http://llvm.org/viewvc/llvm-project?rev=47864&view=rev Log: More APInt-ification. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47864&r1=47863&r2=47864&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Mar 3 16:20:46 2008 @@ -5760,9 +5760,10 @@ Hi = DAG.getNode(ISD::UNDEF, NVT); break; case ISD::Constant: { - uint64_t Cst = cast(Node)->getValue(); - Lo = DAG.getConstant(Cst, NVT); - Hi = DAG.getConstant(Cst >> MVT::getSizeInBits(NVT), NVT); + unsigned NVTBits = MVT::getSizeInBits(NVT); + const APInt &Cst = cast(Node)->getAPIntValue(); + Lo = DAG.getConstant(APInt(Cst).trunc(NVTBits), NVT); + Hi = DAG.getConstant(Cst.lshr(NVTBits).trunc(NVTBits), NVT); break; } case ISD::ConstantFP: { From gohman at apple.com Mon Mar 3 16:22:10 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 03 Mar 2008 22:22:10 -0000 Subject: [llvm-commits] [llvm] r47865 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200803032222.m23MMAdA015134@zion.cs.uiuc.edu> Author: djg Date: Mon Mar 3 16:22:09 2008 New Revision: 47865 URL: http://llvm.org/viewvc/llvm-project?rev=47865&view=rev Log: Add support for lowering i64 SRA_PARTS and friends on x86-64. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47865&r1=47864&r2=47865&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Mar 3 16:22:09 2008 @@ -276,6 +276,11 @@ setOperationAction(ISD::SHL_PARTS , MVT::i32 , Custom); setOperationAction(ISD::SRA_PARTS , MVT::i32 , Custom); setOperationAction(ISD::SRL_PARTS , MVT::i32 , Custom); + if (Subtarget->is64Bit()) { + setOperationAction(ISD::SHL_PARTS , MVT::i64 , Custom); + setOperationAction(ISD::SRA_PARTS , MVT::i64 , Custom); + setOperationAction(ISD::SRL_PARTS , MVT::i64 , Custom); + } // X86 wants to expand memset / memcpy itself. setOperationAction(ISD::MEMSET , MVT::Other, Custom); setOperationAction(ISD::MEMCPY , MVT::Other, Custom); @@ -4087,64 +4092,65 @@ /// LowerShift - Lower SRA_PARTS and friends, which return two i32 values and /// take a 2 x i32 value to shift plus a shift amount. SDOperand X86TargetLowering::LowerShift(SDOperand Op, SelectionDAG &DAG) { - assert(Op.getNumOperands() == 3 && Op.getValueType() == MVT::i32 && - "Not an i64 shift!"); + assert(Op.getNumOperands() == 3 && "Not a double-shift!"); + MVT::ValueType VT = Op.getValueType(); + unsigned VTBits = MVT::getSizeInBits(VT); bool isSRA = Op.getOpcode() == ISD::SRA_PARTS; SDOperand ShOpLo = Op.getOperand(0); SDOperand ShOpHi = Op.getOperand(1); SDOperand ShAmt = Op.getOperand(2); SDOperand Tmp1 = isSRA ? - DAG.getNode(ISD::SRA, MVT::i32, ShOpHi, DAG.getConstant(31, MVT::i8)) : - DAG.getConstant(0, MVT::i32); + DAG.getNode(ISD::SRA, VT, ShOpHi, DAG.getConstant(VTBits - 1, MVT::i8)) : + DAG.getConstant(0, VT); SDOperand Tmp2, Tmp3; if (Op.getOpcode() == ISD::SHL_PARTS) { - Tmp2 = DAG.getNode(X86ISD::SHLD, MVT::i32, ShOpHi, ShOpLo, ShAmt); - Tmp3 = DAG.getNode(ISD::SHL, MVT::i32, ShOpLo, ShAmt); + Tmp2 = DAG.getNode(X86ISD::SHLD, VT, ShOpHi, ShOpLo, ShAmt); + Tmp3 = DAG.getNode(ISD::SHL, VT, ShOpLo, ShAmt); } else { - Tmp2 = DAG.getNode(X86ISD::SHRD, MVT::i32, ShOpLo, ShOpHi, ShAmt); - Tmp3 = DAG.getNode(isSRA ? ISD::SRA : ISD::SRL, MVT::i32, ShOpHi, ShAmt); + Tmp2 = DAG.getNode(X86ISD::SHRD, VT, ShOpLo, ShOpHi, ShAmt); + Tmp3 = DAG.getNode(isSRA ? ISD::SRA : ISD::SRL, VT, ShOpHi, ShAmt); } const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::Other, MVT::Flag); SDOperand AndNode = DAG.getNode(ISD::AND, MVT::i8, ShAmt, - DAG.getConstant(32, MVT::i8)); - SDOperand Cond = DAG.getNode(X86ISD::CMP, MVT::i32, + DAG.getConstant(VTBits, MVT::i8)); + SDOperand Cond = DAG.getNode(X86ISD::CMP, VT, AndNode, DAG.getConstant(0, MVT::i8)); SDOperand Hi, Lo; SDOperand CC = DAG.getConstant(X86::COND_NE, MVT::i8); - VTs = DAG.getNodeValueTypes(MVT::i32, MVT::Flag); + VTs = DAG.getNodeValueTypes(VT, MVT::Flag); SmallVector Ops; if (Op.getOpcode() == ISD::SHL_PARTS) { Ops.push_back(Tmp2); Ops.push_back(Tmp3); Ops.push_back(CC); Ops.push_back(Cond); - Hi = DAG.getNode(X86ISD::CMOV, MVT::i32, &Ops[0], Ops.size()); + Hi = DAG.getNode(X86ISD::CMOV, VT, &Ops[0], Ops.size()); Ops.clear(); Ops.push_back(Tmp3); Ops.push_back(Tmp1); Ops.push_back(CC); Ops.push_back(Cond); - Lo = DAG.getNode(X86ISD::CMOV, MVT::i32, &Ops[0], Ops.size()); + Lo = DAG.getNode(X86ISD::CMOV, VT, &Ops[0], Ops.size()); } else { Ops.push_back(Tmp2); Ops.push_back(Tmp3); Ops.push_back(CC); Ops.push_back(Cond); - Lo = DAG.getNode(X86ISD::CMOV, MVT::i32, &Ops[0], Ops.size()); + Lo = DAG.getNode(X86ISD::CMOV, VT, &Ops[0], Ops.size()); Ops.clear(); Ops.push_back(Tmp3); Ops.push_back(Tmp1); Ops.push_back(CC); Ops.push_back(Cond); - Hi = DAG.getNode(X86ISD::CMOV, MVT::i32, &Ops[0], Ops.size()); + Hi = DAG.getNode(X86ISD::CMOV, VT, &Ops[0], Ops.size()); } - VTs = DAG.getNodeValueTypes(MVT::i32, MVT::i32); + VTs = DAG.getNodeValueTypes(VT, VT); Ops.clear(); Ops.push_back(Lo); Ops.push_back(Hi); From gohman at apple.com Mon Mar 3 16:22:56 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 03 Mar 2008 22:22:56 -0000 Subject: [llvm-commits] [llvm] r47866 - /llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Message-ID: <200803032222.m23MMv2F015165@zion.cs.uiuc.edu> Author: djg Date: Mon Mar 3 16:22:56 2008 New Revision: 47866 URL: http://llvm.org/viewvc/llvm-project?rev=47866&view=rev Log: More APInt-ification. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47866&r1=47865&r2=47866&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Mon Mar 3 16:22:56 2008 @@ -1070,7 +1070,7 @@ } if (ConstantSDNode *N1C = dyn_cast(N1.Val)) { - uint64_t C1 = N1C->getValue(); + const APInt &C1 = N1C->getAPIntValue(); if (isa(N0.Val)) { return DAG.FoldSetCC(VT, N0, N1, Cond); } else { @@ -1104,8 +1104,8 @@ // If the comparison constant has bits in the upper part, the // zero-extended value could never match. - if (C1 & (~0ULL << InSize)) { - unsigned VSize = MVT::getSizeInBits(N0.getValueType()); + if (C1.intersects(APInt::getHighBitsSet(C1.getBitWidth(), + C1.getBitWidth() - InSize))) { switch (Cond) { case ISD::SETUGT: case ISD::SETUGE: @@ -1116,11 +1116,11 @@ case ISD::SETGT: case ISD::SETGE: // True if the sign bit of C1 is set. - return DAG.getConstant((C1 & (1ULL << (VSize-1))) != 0, VT); + return DAG.getConstant(C1.isNegative(), VT); case ISD::SETLT: case ISD::SETLE: // True if the sign bit of C1 isn't set. - return DAG.getConstant((C1 & (1ULL << (VSize-1))) == 0, VT); + return DAG.getConstant(C1.isNonNegative(), VT); default: break; } @@ -1135,7 +1135,8 @@ case ISD::SETULT: case ISD::SETULE: return DAG.getSetCC(VT, N0.getOperand(0), - DAG.getConstant(C1, N0.getOperand(0).getValueType()), + DAG.getConstant(APInt(C1).trunc(InSize), + N0.getOperand(0).getValueType()), Cond); default: break; // todo, be more careful with signed comparisons @@ -1150,8 +1151,8 @@ // If the extended part has any inconsistent bits, it cannot ever // compare equal. In other words, they have to be all ones or all // zeros. - uint64_t ExtBits = - (~0ULL >> (64-ExtSrcTyBits)) & (~0ULL << (ExtDstTyBits-1)); + APInt ExtBits = + APInt::getHighBitsSet(ExtDstTyBits, ExtDstTyBits - ExtSrcTyBits); if ((C1 & ExtBits) != 0 && (C1 & ExtBits) != ExtBits) return DAG.getConstant(Cond == ISD::SETNE, VT); @@ -1168,10 +1169,12 @@ DCI.AddToWorklist(ZextOp.Val); // Otherwise, make this a use of a zext. return DAG.getSetCC(VT, ZextOp, - DAG.getConstant(C1 & (~0ULL>>(64-ExtSrcTyBits)), + DAG.getConstant(C1 & APInt::getLowBitsSet( + ExtDstTyBits, + ExtSrcTyBits), ExtDstTy), Cond); - } else if ((N1C->getValue() == 0 || N1C->getValue() == 1) && + } else if ((N1C->isNullValue() || N1C->getAPIntValue() == 1) && (Cond == ISD::SETEQ || Cond == ISD::SETNE)) { // SETCC (SETCC), [0|1], [EQ|NE] -> SETCC @@ -1233,15 +1236,15 @@ // Canonicalize GE/LE comparisons to use GT/LT comparisons. if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { if (C1 == MinVal) return DAG.getConstant(1, VT); // X >= MIN --> true - --C1; // X >= C0 --> X > (C0-1) - return DAG.getSetCC(VT, N0, DAG.getConstant(C1, N1.getValueType()), + // X >= C0 --> X > (C0-1) + return DAG.getSetCC(VT, N0, DAG.getConstant(C1-1, N1.getValueType()), (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT); } if (Cond == ISD::SETLE || Cond == ISD::SETULE) { if (C1 == MaxVal) return DAG.getConstant(1, VT); // X <= MAX --> true - ++C1; // X <= C0 --> X < (C0+1) - return DAG.getSetCC(VT, N0, DAG.getConstant(C1, N1.getValueType()), + // X <= C0 --> X < (C0+1) + return DAG.getSetCC(VT, N0, DAG.getConstant(C1+1, N1.getValueType()), (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT); } @@ -1296,9 +1299,9 @@ } else if (Cond == ISD::SETEQ && C1 == AndRHS->getValue()) { // (X & 8) == 8 --> (X & 8) >> 3 // Perform the xform if C1 is a single bit. - if (isPowerOf2_64(C1)) { + if (C1.isPowerOf2()) { return DAG.getNode(ISD::SRL, VT, N0, - DAG.getConstant(Log2_64(C1), getShiftAmountTy())); + DAG.getConstant(C1.logBase2(), getShiftAmountTy())); } } } From gohman at apple.com Mon Mar 3 16:24:38 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 3 Mar 2008 14:24:38 -0800 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <522BCA72-6445-4857-BE7B-019B841AA9DB@apple.com> References: <2913F98D-C5BD-44BD-A404-5E6DFFEDCFBC@apple.com> <200802291429.22322.dag@cray.com> <522BCA72-6445-4857-BE7B-019B841AA9DB@apple.com> Message-ID: On Mar 3, 2008, at 1:31 PM, Chris Lattner wrote: > On Mar 3, 2008, at 1:26 PM, Evan Cheng wrote: >> Thanks. >> >> Using std::set<> makes me queasy. :-) Too bad it doesn't seem >> possible >> to use SmallPtrSet (elements are not in sorted order). > > I'm sad to say that std::set is probably the best thing we have right > now that provides priority queue + removal from the middle support. > > Does anyone know of a better data structure to implement these > operations? Even if you don't volunteer to implement it, we can add > it to the open projects page. There's make_heap/push_heap/etc. in that let a plain std::vector (or a SmallVector I guess) be used as a heap. Dan From isanbard at gmail.com Mon Mar 3 16:32:03 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 3 Mar 2008 14:32:03 -0800 Subject: [llvm-commits] [llvm] r47862 - /llvm/trunk/lib/CodeGen/MachineInstr.cpp In-Reply-To: <200803032214.m23MEXkF014824@zion.cs.uiuc.edu> References: <200803032214.m23MEXkF014824@zion.cs.uiuc.edu> Message-ID: <16e5fdf90803031432w66efb899j52b32154b0d78ea1@mail.gmail.com> On Mon, Mar 3, 2008 at 2:14 PM, Bill Wendling wrote: > Author: void > Date: Mon Mar 3 16:14:33 2008 > New Revision: 47862 > > URL: http://llvm.org/viewvc/llvm-project?rev=47862&view=rev > Log: > Go through the machine instruction's operands to make sure that we're not > marking both a super- and sub-register as "killed". This removes implicit uses > that are marked as "killed". > That is, they are implicit, marked "killed", and are sub-registers of a super-register that's already marked as killed. -bw From gohman at apple.com Mon Mar 3 16:37:52 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 03 Mar 2008 22:37:52 -0000 Subject: [llvm-commits] [llvm] r47867 - /llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Message-ID: <200803032237.m23MbqT5015621@zion.cs.uiuc.edu> Author: djg Date: Mon Mar 3 16:37:52 2008 New Revision: 47867 URL: http://llvm.org/viewvc/llvm-project?rev=47867&view=rev Log: Yet more APInt-ification. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47867&r1=47866&r2=47867&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Mon Mar 3 16:37:52 2008 @@ -1161,7 +1161,7 @@ if (Op0Ty == ExtSrcTy) { ZextOp = N0.getOperand(0); } else { - int64_t Imm = ~0ULL >> (64-ExtSrcTyBits); + APInt Imm = APInt::getLowBitsSet(ExtDstTyBits, ExtSrcTyBits); ZextOp = DAG.getNode(ISD::AND, Op0Ty, N0.getOperand(0), DAG.getConstant(Imm, Op0Ty)); } @@ -1220,17 +1220,14 @@ } } - uint64_t MinVal, MaxVal; + APInt MinVal, MaxVal; unsigned OperandBitSize = MVT::getSizeInBits(N1C->getValueType(0)); if (ISD::isSignedIntSetCC(Cond)) { - MinVal = 1ULL << (OperandBitSize-1); - if (OperandBitSize != 1) // Avoid X >> 64, which is undefined. - MaxVal = ~0ULL >> (65-OperandBitSize); - else - MaxVal = 0; + MinVal = APInt::getSignedMinValue(OperandBitSize); + MaxVal = APInt::getSignedMaxValue(OperandBitSize); } else { - MinVal = 0; - MaxVal = ~0ULL >> (64-OperandBitSize); + MinVal = APInt::getMinValue(OperandBitSize); + MaxVal = APInt::getMaxValue(OperandBitSize); } // Canonicalize GE/LE comparisons to use GT/LT comparisons. From evan.cheng at apple.com Mon Mar 3 16:56:10 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Mar 2008 14:56:10 -0800 Subject: [llvm-commits] [llvm] r47860 - /llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp In-Reply-To: <200803032211.m23MBGqd014690@zion.cs.uiuc.edu> References: <200803032211.m23MBGqd014690@zion.cs.uiuc.edu> Message-ID: On Mar 3, 2008, at 2:11 PM, Bill Wendling wrote: > Author: void > Date: Mon Mar 3 16:11:16 2008 > New Revision: 47860 > > URL: http://llvm.org/viewvc/llvm-project?rev=47860&view=rev > Log: > Multiple instructions can be inserted when eliminating frame > indexes. We need > the register scavenger to process all of those new instructions > instead of just > the last one inserted. > > > Modified: > llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp > > Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=47860&r1=47859&r2=47860&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original) > +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Mon Mar 3 > 16:11:16 2008 > @@ -530,27 +530,44 @@ > // Visit the instructions created by > eliminateCallFramePseudoInstr(). > I = next(PrevI); > MI = NULL; > - } else if (I->getOpcode() == TargetInstrInfo::DECLARE) > + } else if (I->getOpcode() == TargetInstrInfo::DECLARE) { > // Ignore it. > - I++; > - else { > - I++; > + ++I; This can be cleaned up. How about? if (I->getOpcode() == TargetInstrInfo::DECLARE) { // Ignore it. ++I; continue; } if (I->getOpcode() == FrameSetupOpcode || I->getOpcode() == FrameDestroyOpcode) { // Remember how much SP has been adjusted to create the call frame. int Size = I->getOperand(0).getImm(); if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) || (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode)) Size = -Size; SPAdj += Size; MachineBasicBlock::iterator PrevI = prior(I); TRI.eliminateCallFramePseudoInstr(Fn, *BB, I); // Visit the instructions created by eliminateCallFramePseudoInstr(). I = next(PrevI); continue; } Then the next chunk doesn't have to be in else {}. Evan > > + } else { > + bool DoIncr = true; > + > for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) > if (MI->getOperand(i).isFrameIndex()) { > + // Some instructions (e.g. inline asm instructions) can > have > + // multiple frame indices and/or cause > eliminateFrameIndex to insert > + // more than one instruction. We need the register > scavenger to go > + // through all of these instructions so that it can > update its > + // register information. We keep the iterator at the > point before > + // insertion so that we can revisit them in full. > + bool AtBeginning = (I == BB->begin()); > + if (!AtBeginning) --I; > + > // If this instruction has a FrameIndex operand, we need > to use that > // target machine register info object to eliminate it. > TRI.eliminateFrameIndex(MI, SPAdj, RS); > > - // Revisit the instruction in full. Some instructions > (e.g. inline > - // asm instructions) can have multiple frame indices. > - --I; > + // Reset the iterator if we were at the beginning of > the BB. > + if (AtBeginning) { > + I = BB->begin(); > + DoIncr = false; > + } > + > MI = 0; > break; > } > + > + if (DoIncr) ++I; > } > + > // Update register states. > if (RS && MI) RS->forward(MI); > } > + > assert(SPAdj == 0 && "Unbalanced call frame setup / destroy > pairs?"); > } > } > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Mon Mar 3 17:05:18 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Mar 2008 15:05:18 -0800 Subject: [llvm-commits] [llvm] r47863 - in /llvm/trunk: include/llvm/CodeGen/RegisterScavenging.h lib/Target/PowerPC/PPCInstrInfo.cpp lib/Target/PowerPC/PPCInstrInfo.td lib/Target/PowerPC/PPCMachineFunctionInfo.h lib/Target/PowerPC/PPCRegisterInfo.cpp lib/Target/PowerPC/PPCRegisterInfo.h test/CodeGen/PowerPC/Frames-alloca.ll In-Reply-To: <200803032219.m23MJG6l015020@zion.cs.uiuc.edu> References: <200803032219.m23MJG6l015020@zion.cs.uiuc.edu> Message-ID: Thanks. Some comments below. Evan On Mar 3, 2008, at 2:19 PM, Bill Wendling wrote: > Author: void > Date: Mon Mar 3 16:19:16 2008 > New Revision: 47863 > > URL: http://llvm.org/viewvc/llvm-project?rev=47863&view=rev > Log: > This is the initial check-in for adding register scavenging to PPC. > (Currently, > PPC-64 doesn't work.) This also lowers the spilling of the CR > registers so that > it uses a register other than the default R0 register (the scavenger > scrounges > for one). A significant part of this patch fixes how kill > information is > handled. > > > Modified: > llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h > llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp > llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td > llvm/trunk/lib/Target/PowerPC/PPCMachineFunctionInfo.h > llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp > llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h > llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll > > Modified: llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h?rev=47863&r1=47862&r2=47863&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h (original) > +++ llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h Mon Mar 3 > 16:19:16 2008 > @@ -96,9 +96,9 @@ > > /// setUsed / setUnused - Mark the state of one or a number of > registers. > /// > - void setUsed(unsigned Reg) { RegsAvailable.reset(Reg); } > + void setUsed(unsigned Reg); > void setUsed(BitVector Regs) { RegsAvailable &= ~Regs; } > - void setUnused(unsigned Reg) { RegsAvailable.set(Reg); } > + void setUnused(unsigned Reg); > void setUnused(BitVector Regs) { RegsAvailable |= Regs; } > > /// FindUnusedReg - Find a unused register of the specified > register class > > Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=47863&r1=47862&r2=47863&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp (original) > +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp Mon Mar 3 > 16:19:16 2008 > @@ -13,6 +13,7 @@ > > #include "PPCInstrInfo.h" > #include "PPCInstrBuilder.h" > +#include "PPCMachineFunctionInfo.h" > #include "PPCPredicates.h" > #include "PPCGenInstrInfo.inc" > #include "PPCTargetMachine.h" > @@ -316,10 +317,11 @@ > } > } > > -static void StoreRegToStackSlot(const TargetInstrInfo &TII, > +static bool StoreRegToStackSlot(const TargetInstrInfo &TII, > unsigned SrcReg, bool isKill, int > FrameIdx, > const TargetRegisterClass *RC, > - SmallVectorImpl > &NewMIs) { > + SmallVectorImpl > &NewMIs, > + bool isPPC64/*FIXME (64-bit): > Remove.*/) { > if (RC == PPC::GPRCRegisterClass) { > if (SrcReg != PPC::LR) { > NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STW)) > @@ -351,22 +353,30 @@ > NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STFS)) > .addReg(SrcReg, false, false, > isKill), FrameIdx)); > } else if (RC == PPC::CRRCRegisterClass) { > - // FIXME: We use R0 here, because it isn't available for RA. > - // We need to store the CR in the low 4-bits of the saved > value. First, > - // issue a MFCR to save all of the CRBits. > - NewMIs.push_back(BuildMI(TII.get(PPC::MFCR), PPC::R0)); > + if (!isPPC64) { // FIXME (64-bit): Enable > + > NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::SPILL_CR)) > + .addReg(SrcReg, false, > false, isKill), > + FrameIdx)); > + return true; > + } else { > + // FIXME: We use R0 here, because it isn't available for RA. > We need to > + // store the CR in the low 4-bits of the saved value. First, > issue a MFCR > + // to save all of the CRBits. > + NewMIs.push_back(BuildMI(TII.get(PPC::MFCR), PPC::R0)); Is this right? I thought the whole point of using RS is so we don't have to reserved R0? > > > - // If the saved register wasn't CR0, shift the bits left so > that they are in > - // CR0's slot. > - if (SrcReg != PPC::CR0) { > - unsigned ShiftBits = > PPCRegisterInfo::getRegisterNumbering(SrcReg)*4; > - // rlwinm r0, r0, ShiftBits, 0, 31. > - NewMIs.push_back(BuildMI(TII.get(PPC::RLWINM), PPC::R0) > - .addReg > (PPC::R0).addImm(ShiftBits).addImm(0).addImm(31)); > - } > + // If the saved register wasn't CR0, shift the bits left so > that they are > + // in CR0's slot. > + if (SrcReg != PPC::CR0) { > + unsigned ShiftBits = > PPCRegisterInfo::getRegisterNumbering(SrcReg)*4; > + // rlwinm r0, r0, ShiftBits, 0, 31. > + NewMIs.push_back(BuildMI(TII.get(PPC::RLWINM), PPC::R0) > + > .addReg > (PPC::R0).addImm(ShiftBits).addImm(0).addImm(31)); > + } > > - NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STW)) > - .addReg(PPC::R0, false, false, > isKill), FrameIdx)); > + NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STW)) > + .addReg(PPC::R0, false, > false, isKill), > + FrameIdx)); > + } > } else if (RC == PPC::VRRCRegisterClass) { > // We don't have indexed addressing for vector loads. Emit: > // R0 = ADDI FI# > @@ -381,26 +391,39 @@ > assert(0 && "Unknown regclass!"); > abort(); > } > + > + return false; > } > > void > PPCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, > - MachineBasicBlock::iterator MI, > - unsigned SrcReg, bool isKill, > int FrameIdx, > - const TargetRegisterClass *RC) > const { > + MachineBasicBlock::iterator MI, > + unsigned SrcReg, bool isKill, int > FrameIdx, > + const TargetRegisterClass *RC) > const { > SmallVector NewMIs; > - StoreRegToStackSlot(*this, SrcReg, isKill, FrameIdx, RC, NewMIs); > + > + if (StoreRegToStackSlot(*this, SrcReg, isKill, FrameIdx, RC, > NewMIs, > + TM.getSubtargetImpl()->isPPC64()/*FIXME (64-bit): > Remove.*/)) { > + PPCFunctionInfo *FuncInfo = MBB.getParent()- > >getInfo(); > + FuncInfo->setSpillsCR(); > + } > + > for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) > MBB.insert(MI, NewMIs[i]); > } > > void PPCInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned > SrcReg, > - bool isKill, > - > SmallVectorImpl &Addr, > - const TargetRegisterClass *RC, > - SmallVectorImpl > &NewMIs) const { > + bool isKill, > + SmallVectorImpl > &Addr, > + const TargetRegisterClass *RC, > + SmallVectorImpl > &NewMIs) const{ > if (Addr[0].isFrameIndex()) { > - StoreRegToStackSlot(*this, SrcReg, isKill, Addr[0].getIndex(), > RC, NewMIs); > + if (StoreRegToStackSlot(*this, SrcReg, isKill, > Addr[0].getIndex(), RC, NewMIs, > + TM.getSubtargetImpl()->isPPC64()/*FIXME (64-bit): > Remove.*/)) { > + PPCFunctionInfo *FuncInfo = MF.getInfo(); > + FuncInfo->setSpillsCR(); > + } > + > return; > } > > @@ -495,9 +518,9 @@ > > void > PPCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, > - MachineBasicBlock::iterator MI, > - unsigned DestReg, int FrameIdx, > - const TargetRegisterClass > *RC) const { > + MachineBasicBlock::iterator MI, > + unsigned DestReg, int FrameIdx, > + const TargetRegisterClass *RC) > const { > SmallVector NewMIs; > LoadRegFromStackSlot(*this, DestReg, FrameIdx, RC, NewMIs); > for (unsigned i = 0, e = NewMIs.size(); i != e; ++i) > @@ -505,9 +528,9 @@ > } > > void PPCInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned > DestReg, > - > SmallVectorImpl &Addr, > - const TargetRegisterClass *RC, > - SmallVectorImpl > &NewMIs) const{ > + SmallVectorImpl > &Addr, > + const TargetRegisterClass *RC, > + SmallVectorImpl > &NewMIs)const{ > if (Addr[0].isFrameIndex()) { > LoadRegFromStackSlot(*this, DestReg, Addr[0].getIndex(), RC, > NewMIs); > return; > > Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=47863&r1=47862&r2=47863&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original) > +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Mon Mar 3 > 16:19:16 2008 > @@ -371,6 +371,11 @@ > []>; > } > > +// SPILL_CR - Indicate that we're dumping the CR register, so we'll > need to > +// scavenge a register for it. > +def SPILL_CR : Pseudo<(outs), (ins GPRC:$cond, memri:$F), > + "${:comment} SPILL_CR $cond $F", []>; > + > let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7 in { > let isReturn = 1 in > def BLR : XLForm_2_br<19, 16, 0, (outs), (ins pred:$p), > @@ -380,8 +385,6 @@ > def BCTR : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), > "bctr", BrB, []>; > } > > - > - > let Defs = [LR] in > def MovePCtoLR : Pseudo<(outs), (ins piclabel:$label), "bl > $label", []>, > PPC970_Unit_BRU; > > Modified: llvm/trunk/lib/Target/PowerPC/PPCMachineFunctionInfo.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCMachineFunctionInfo.h?rev=47863&r1=47862&r2=47863&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PowerPC/PPCMachineFunctionInfo.h (original) > +++ llvm/trunk/lib/Target/PowerPC/PPCMachineFunctionInfo.h Mon Mar > 3 16:19:16 2008 > @@ -35,6 +35,9 @@ > /// only valid after the initial scan of the function by PEI. > bool UsesLR; > > + /// SpillsCR - Indicates whether CR is spilled in the current > function. > + bool SpillsCR; > + > /// LRStoreRequired - The bool indicates whether there is some > explicit use of > /// the LR/LR8 stack slot that is not obvious from scanning the > code. This > /// requires that the code generator produce a store of LR to the > stack on > @@ -42,7 +45,10 @@ > bool LRStoreRequired; > public: > PPCFunctionInfo(MachineFunction &MF) > - : FramePointerSaveIndex(0), ReturnAddrSaveIndex(0), > LRStoreRequired(false){} > + : FramePointerSaveIndex(0), > + ReturnAddrSaveIndex(0), > + SpillsCR(false), > + LRStoreRequired(false) {} > > int getFramePointerSaveIndex() const { return > FramePointerSaveIndex; } > void setFramePointerSaveIndex(int Idx) { FramePointerSaveIndex = > Idx; } > @@ -57,9 +63,11 @@ > void setUsesLR(bool U) { UsesLR = U; } > bool usesLR() const { return UsesLR; } > > + void setSpillsCR() { SpillsCR = true; } > + bool isCRSpilled() const { return SpillsCR; } > + > void setLRStoreRequired() { LRStoreRequired = true; } > bool isLRStoreRequired() const { return LRStoreRequired; } > - > }; > > } // end of namespace llvm > > Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=47863&r1=47862&r2=47863&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original) > +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Mon Mar 3 > 16:19:16 2008 > @@ -28,6 +28,7 @@ > #include "llvm/CodeGen/MachineFrameInfo.h" > #include "llvm/CodeGen/MachineLocation.h" > #include "llvm/CodeGen/MachineRegisterInfo.h" > +#include "llvm/CodeGen/RegisterScavenging.h" > #include "llvm/CodeGen/SelectionDAGNodes.h" > #include "llvm/Target/TargetFrameInfo.h" > #include "llvm/Target/TargetInstrInfo.h" > @@ -41,6 +42,12 @@ > #include > using namespace llvm; > > +// FIXME (64-bit): Should be inlined. > +bool > +PPCRegisterInfo::requiresRegisterScavenging(const MachineFunction > &) const { > + return !Subtarget.isPPC64(); > +} > + > /// getRegisterNumbering - Given the enum value for some register, > e.g. > /// PPC::F14, return the number that it corresponds to (e.g. 14). > unsigned PPCRegisterInfo::getRegisterNumbering(unsigned RegEnum) { > @@ -280,23 +287,40 @@ > return NoFramePointerElim || MFI->hasVarSizedObjects(); > } > > +static bool spillsCR(const MachineFunction &MF) { > + const PPCFunctionInfo *FuncInfo = MF.getInfo(); > + return FuncInfo->isCRSpilled(); > +} > + > BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction > &MF) const { > BitVector Reserved(getNumRegs()); > Reserved.set(PPC::R0); > Reserved.set(PPC::R1); > Reserved.set(PPC::LR); > + Reserved.set(PPC::LR8); > + > // In Linux, r2 is reserved for the OS. > if (!Subtarget.isDarwin()) > Reserved.set(PPC::R2); > - // On PPC64, r13 is the thread pointer. Never allocate this > register. > - // Note that this is overconservative, as it also prevents > allocation of > - // R31 when the FP is not needed. > + > + // On PPC64, r13 is the thread pointer. Never allocate this > register. Note > + // that this is over conservative, as it also prevents allocation > of R31 when > + // the FP is not needed. > if (Subtarget.isPPC64()) { > Reserved.set(PPC::R13); > Reserved.set(PPC::R31); > + > + Reserved.set(PPC::R0); // FIXME (64-bit): Remove > + > + Reserved.set(PPC::X0); > + Reserved.set(PPC::X1); > + Reserved.set(PPC::X13); > + Reserved.set(PPC::X31); > } > + > if (needsFP(MF)) > Reserved.set(PPC::R31); > + > return Reserved; > } > > @@ -333,14 +357,29 @@ > MBB.erase(I); > } > > -/// LowerDynamicAlloc - Generate the code for allocating an object > in the > +/// findScratchRegister - Find a 'free' PPC register. Try for a > call-clobbered > +/// register first and then a spilled callee-saved register if that > fails. > +static > +unsigned findScratchRegister(MachineBasicBlock::iterator II, > RegScavenger *RS, > + const TargetRegisterClass *RC, int > SPAdj) { > + assert(RS && "Register scavenging must be on"); > + unsigned Reg = RS->FindUnusedReg(RC, true); > + // FIXME: move ARM callee-saved reg scan to target independent > code, then > + // search for already spilled CS register here. > > + if (Reg == 0) > + Reg = RS->scavengeRegister(RC, II, SPAdj); > + return Reg; > +} > + > +/// lowerDynamicAlloc - Generate the code for allocating an object > in the > /// current frame. The sequence of code with be in the general form > /// > /// addi R0, SP, #frameSize ; get the address of the previous > frame > /// stwxu R0, SP, Rnegsize ; add and update the SP with the > negated size > /// addi Rnew, SP, #maxCalFrameSize ; get the top of the > allocation > /// > -void PPCRegisterInfo::lowerDynamicAlloc(MachineBasicBlock::iterator > II) const { > +void PPCRegisterInfo::lowerDynamicAlloc(MachineBasicBlock::iterator > II, > + int SPAdj, RegScavenger > *RS) const { > // Get the instruction. > MachineInstr &MI = *II; > // Get the instruction's basic block. > @@ -369,44 +408,128 @@ > // Because R0 is our only safe tmp register and addi/addis treat > R0 as zero. > // Constructing the constant and adding would take 3 instructions. > // Fortunately, a frame greater than 32K is rare. > + const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; > + const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; > + const TargetRegisterClass *RC = LP64 ? G8RC : GPRC; > + > + // FIXME (64-bit): Use "findScratchRegister" > + unsigned Reg; > + if (!LP64) > + Reg = findScratchRegister(II, RS, RC, SPAdj); > + else > + Reg = PPC::R0; Style police: unsigned Reg = ILP64 ? PPC:R0 : findScratchRegister()... Perhaps an assertion if findScratchRegister fails to scavenge a register? > > + > if (MaxAlign < TargetAlign && isInt16(FrameSize)) { > - BuildMI(MBB, II, TII.get(PPC::ADDI), PPC::R0) > + BuildMI(MBB, II, TII.get(PPC::ADDI), Reg) > .addReg(PPC::R31) > .addImm(FrameSize); > } else if (LP64) { > - BuildMI(MBB, II, TII.get(PPC::LD), PPC::X0) > + Reg = PPC::X0; // FIXME (64-bit): Remove. > + BuildMI(MBB, II, TII.get(PPC::LD), Reg) > .addImm(0) > .addReg(PPC::X1); > } else { > - BuildMI(MBB, II, TII.get(PPC::LWZ), PPC::R0) > + BuildMI(MBB, II, TII.get(PPC::LWZ), Reg) > .addImm(0) > .addReg(PPC::R1); > } > > - // Grow the stack and update the stack pointer link, then > - // determine the address of new allocated space. > + // Grow the stack and update the stack pointer link, then > determine the > + // address of new allocated space. > if (LP64) { > +#if 0 // FIXME (64-bit): Enable > BuildMI(MBB, II, TII.get(PPC::STDUX)) > - .addReg(PPC::X0) > + .addReg(Reg, false, false, true) > .addReg(PPC::X1) > .addReg(MI.getOperand(1).getReg()); > - BuildMI(MBB, II, TII.get(PPC::ADDI8), MI.getOperand(0).getReg()) > +#else > + BuildMI(MBB, II, TII.get(PPC::STDUX)) > + .addReg(PPC::X0, false, false, true) > .addReg(PPC::X1) > - .addImm(maxCallFrameSize); > + .addReg(MI.getOperand(1).getReg()); > +#endif > + > + if (!MI.getOperand(1).isKill()) > + BuildMI(MBB, II, TII.get(PPC::ADDI8), > MI.getOperand(0).getReg()) > + .addReg(PPC::X1) > + .addImm(maxCallFrameSize); > + else > + // Implicitly kill the register. > + BuildMI(MBB, II, TII.get(PPC::ADDI8), > MI.getOperand(0).getReg()) > + .addReg(PPC::X1) > + .addImm(maxCallFrameSize) > + .addReg(MI.getOperand(1).getReg(), false, true, true); > } else { > BuildMI(MBB, II, TII.get(PPC::STWUX)) > - .addReg(PPC::R0) > + .addReg(Reg, false, false, true) > .addReg(PPC::R1) > .addReg(MI.getOperand(1).getReg()); > - BuildMI(MBB, II, TII.get(PPC::ADDI), MI.getOperand(0).getReg()) > - .addReg(PPC::R1) > - .addImm(maxCallFrameSize); > + > + if (!MI.getOperand(1).isKill()) > + BuildMI(MBB, II, TII.get(PPC::ADDI), MI.getOperand(0).getReg()) > + .addReg(PPC::R1) > + .addImm(maxCallFrameSize); > + else > + // Implicitly kill the register. > + BuildMI(MBB, II, TII.get(PPC::ADDI), MI.getOperand(0).getReg()) > + .addReg(PPC::R1) > + .addImm(maxCallFrameSize) > + .addReg(MI.getOperand(1).getReg(), false, true, true); > } > > // Discard the DYNALLOC instruction. > MBB.erase(II); > } > > +/// lowerCRSpilling - Generate the code for spilling a CR register. > Instead of > +/// reserving a whole register (R0), we scrounge for one here. This > generates > +/// code like this: > +/// > +/// mfcr rA ; Move the conditional register into > GPR rA. > +/// rlwinm rA, rA, SB, 0, 31 ; Shift the bits left so they are in > CR0's slot. > +/// stw rA, FI ; Store rA to the frame. > +/// > +void PPCRegisterInfo::lowerCRSpilling(MachineBasicBlock::iterator II, > + unsigned FrameIndex, int SPAdj, > + RegScavenger *RS) const { > + // Get the instruction. > + MachineInstr &MI = *II; // ; SPILL_CR , , > > + // Get the instruction's basic block. > + MachineBasicBlock &MBB = *MI.getParent(); > + > + const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; > + const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; > + const TargetRegisterClass *RC = Subtarget.isPPC64() ? G8RC : GPRC; > + unsigned Reg = findScratchRegister(II, RS, RC, SPAdj); > + > + // We need to store the CR in the low 4-bits of the saved value. > First, issue > + // an MFCR to save all of the CRBits. > + if (!MI.getOperand(0).isKill()) > + BuildMI(MBB, II, TII.get(PPC::MFCR), Reg); > + else > + // Implicitly kill the CR register. > + BuildMI(MBB, II, TII.get(PPC::MFCR), Reg) > + .addReg(MI.getOperand(0).getReg(), false, true, true); > + > + // If the saved register wasn't CR0, shift the bits left so that > they are in > + // CR0's slot. > + unsigned SrcReg = MI.getOperand(0).getReg(); > + if (SrcReg != PPC::CR0) > + // rlwinm rA, rA, ShiftBits, 0, 31. > + BuildMI(MBB, II, TII.get(PPC::RLWINM), Reg) > + .addReg(Reg, false, false, true) > + .addImm(PPCRegisterInfo::getRegisterNumbering(SrcReg) * 4) > + .addImm(0) > + .addImm(31); > + > + addFrameReference(BuildMI(MBB, II, TII.get(PPC::STW)) > + .addReg(Reg, false, false, > MI.getOperand(1).getImm()), > + FrameIndex); > + > + // Discard the pseudo instruction. > + MBB.erase(II); > +} > + > void > PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, > int SPAdj, RegScavenger > *RS) const { > assert(SPAdj == 0 && "Unexpected"); > @@ -431,10 +554,10 @@ > unsigned OffsetOperandNo = (FIOperandNo == 2) ? 1 : 2; > if (MI.getOpcode() == TargetInstrInfo::INLINEASM) > OffsetOperandNo = FIOperandNo-1; > - > + > // Get the frame index. > int FrameIndex = MI.getOperand(FIOperandNo).getIndex(); > - > + > // Get the frame pointer save index. Users of this index are > primarily > // DYNALLOC instructions. > PPCFunctionInfo *FI = MF.getInfo(); > @@ -445,7 +568,14 @@ > // Special case for dynamic alloca. > if (FPSI && FrameIndex == FPSI && > (OpC == PPC::DYNALLOC || OpC == PPC::DYNALLOC8)) { > - lowerDynamicAlloc(II); > + lowerDynamicAlloc(II, SPAdj, RS); > + return; > + } > + > + // Special case for pseudo-op SPILL_CR. > + if (!Subtarget.isPPC64()) // FIXME (64-bit): Remove. > + if (OpC == PPC::SPILL_CR) { > + lowerCRSpilling(II, FrameIndex, SPAdj, RS); > return; > } > > @@ -490,15 +620,31 @@ > MI.getOperand(OffsetOperandNo).ChangeToImmediate(Offset); > return; > } > - > - // Insert a set of r0 with the full offset value before the ld, > st, or add > - BuildMI(MBB, II, TII.get(PPC::LIS), PPC::R0).addImm(Offset >> 16); > - BuildMI(MBB, II, TII.get(PPC::ORI), > PPC::R0).addReg(PPC::R0).addImm(Offset); > - > - // Convert into indexed form of the instruction > - // sth 0:rA, 1:imm 2:(rB) ==> sthx 0:rA, 2:rB, 1:r0 > - // addi 0:rA 1:rB, 2, imm ==> add 0:rA, 1:rB, 2:r0 > + > + // The offset doesn't fit into a single register, scavenge one to > build the > + // offset in. > + // FIXME: figure out what SPAdj is doing here. > + > + // FIXME (64-bit): Use "findScratchRegister". > + unsigned SReg; > + if (!Subtarget.isPPC64()) > + SReg = findScratchRegister(II, RS, &PPC::GPRCRegClass, SPAdj); > + else > + SReg = PPC::R0; > + > + // Insert a set of rA with the full offset value before the ld, > st, or add > + BuildMI(MBB, II, TII.get(PPC::LIS), SReg) > + .addImm(Offset >> 16); > + BuildMI(MBB, II, TII.get(PPC::ORI), SReg) > + .addReg(SReg, false, false, true) > + .addImm(Offset); > + > + // Convert into indexed form of the instruction: > + // > + // sth 0:rA, 1:imm 2:(rB) ==> sthx 0:rA, 2:rB, 1:r0 > + // addi 0:rA 1:rB, 2, imm ==> add 0:rA, 1:rB, 2:r0 > unsigned OperandBase; > + > if (OpC != TargetInstrInfo::INLINEASM) { > assert(ImmToIdxMap.count(OpC) && > "No indexed form of load or store available!"); > @@ -511,7 +657,7 @@ > > unsigned StackReg = MI.getOperand(FIOperandNo).getReg(); > MI.getOperand(OperandBase).ChangeToRegister(StackReg, false); > - MI.getOperand(OperandBase+1).ChangeToRegister(PPC::R0, false); > + MI.getOperand(OperandBase + 1).ChangeToRegister(SReg, false); > } > > /// VRRegNo - Map from a numbered VR register to its enum value. > @@ -598,24 +744,47 @@ > UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be > marked. > } > > - unsigned SrcReg = MI->getOperand(1).getReg(); > - unsigned DstReg = MI->getOperand(0).getReg(); > // If no registers are used, turn this into a copy. > if (UsedRegMask == 0) { > // Remove all VRSAVE code. > RemoveVRSaveCode(MI); > return; > - } else if ((UsedRegMask & 0xFFFF) == UsedRegMask) { > - BuildMI(*MI->getParent(), MI, TII.get(PPC::ORI), DstReg) > - .addReg(SrcReg).addImm(UsedRegMask); > + } > + > + unsigned SrcReg = MI->getOperand(1).getReg(); > + unsigned DstReg = MI->getOperand(0).getReg(); > + > + if ((UsedRegMask & 0xFFFF) == UsedRegMask) { > + if (DstReg != SrcReg) > + BuildMI(*MI->getParent(), MI, TII.get(PPC::ORI), DstReg) > + .addReg(SrcReg) > + .addImm(UsedRegMask); > + else > + BuildMI(*MI->getParent(), MI, TII.get(PPC::ORI), DstReg) > + .addReg(SrcReg, false, false, true) > + .addImm(UsedRegMask); > } else if ((UsedRegMask & 0xFFFF0000) == UsedRegMask) { > - BuildMI(*MI->getParent(), MI, TII.get(PPC::ORIS), DstReg) > - .addReg(SrcReg).addImm(UsedRegMask >> 16); > + if (DstReg != SrcReg) > + BuildMI(*MI->getParent(), MI, TII.get(PPC::ORIS), DstReg) > + .addReg(SrcReg) > + .addImm(UsedRegMask >> 16); > + else > + BuildMI(*MI->getParent(), MI, TII.get(PPC::ORIS), DstReg) > + .addReg(SrcReg, false, false, true) > + .addImm(UsedRegMask >> 16); > } else { > - BuildMI(*MI->getParent(), MI, TII.get(PPC::ORIS), DstReg) > - .addReg(SrcReg).addImm(UsedRegMask >> 16); > + if (DstReg != SrcReg) > + BuildMI(*MI->getParent(), MI, TII.get(PPC::ORIS), DstReg) > + .addReg(SrcReg) > + .addImm(UsedRegMask >> 16); > + else > + BuildMI(*MI->getParent(), MI, TII.get(PPC::ORIS), DstReg) > + .addReg(SrcReg, false, false, true) > + .addImm(UsedRegMask >> 16); > + > BuildMI(*MI->getParent(), MI, TII.get(PPC::ORI), DstReg) > - .addReg(DstReg).addImm(UsedRegMask & 0xFFFF); > + .addReg(DstReg, false, false, true) > + .addImm(UsedRegMask & 0xFFFF); > } > > // Remove the old UPDATE_VRSAVE instruction. > @@ -675,9 +844,9 @@ > MFI->setStackSize(FrameSize); > } > > -void > PPCRegisterInfo > ::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, > - > RegScavenger *RS) > - const { > +void > + > PPCRegisterInfo > ::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, > + RegScavenger > *RS) const { > // Save and clear the LR state. > PPCFunctionInfo *FI = MF.getInfo(); > unsigned LR = getRARegister(); > @@ -689,7 +858,7 @@ > bool IsPPC64 = Subtarget.isPPC64(); > bool IsELF32_ABI = Subtarget.isELF32_ABI(); > bool IsMachoABI = Subtarget.isMachoABI(); > - const MachineFrameInfo *MFI = MF.getFrameInfo(); > + MachineFrameInfo *MFI = MF.getFrameInfo(); > > // If the frame pointer save index hasn't been defined yet. > if (!FPSI && (NoFramePointerElim || MFI->hasVarSizedObjects()) && > @@ -703,9 +872,25 @@ > FI->setFramePointerSaveIndex(FPSI); > } > > + // Reserve a slot closest to SP or frame pointer if we have a > dynalloc or > + // a large stack, which will require scavenging a register to > materialize a > + // large offset. > + // FIXME: this doesn't actually check stack size, so is a bit > pessimistic > + // FIXME: doesn't detect whether or not we need to spill vXX, > which requires > + // r0 for now. > + > + if (!IsPPC64) // FIXME (64-bit): Enable. > + if (needsFP(MF) || spillsCR(MF)) { > + const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; > + const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; > + const TargetRegisterClass *RC = IsPPC64 ? G8RC : GPRC; > + RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(), > + RC- > >getAlignment())); > + } > } > > -void PPCRegisterInfo::emitPrologue(MachineFunction &MF) const { > +void > +PPCRegisterInfo::emitPrologue(MachineFunction &MF) const { > MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB > MachineBasicBlock::iterator MBBI = MBB.begin(); > MachineFrameInfo *MFI = MF.getFrameInfo(); > @@ -713,7 +898,7 @@ > > // Prepare for frame info. > unsigned FrameLabelId = 0; > - > + > // Scan the prolog, looking for an UPDATE_VRSAVE instruction. If > we find it, > // process it. > for (unsigned i = 0; MBBI != MBB.end(); ++i, ++MBBI) { > @@ -725,7 +910,7 @@ > > // Move MBBI back to the beginning of the function. > MBBI = MBB.begin(); > - > + > // Work out frame sizes. > determineFrameLayout(MF); > unsigned FrameSize = MFI->getStackSize(); > @@ -743,29 +928,37 @@ > > int LROffset = PPCFrameInfo::getReturnSaveOffset(IsPPC64, > IsMachoABI); > int FPOffset = PPCFrameInfo::getFramePointerSaveOffset(IsPPC64, > IsMachoABI); > - > + > if (IsPPC64) { > if (UsesLR) > BuildMI(MBB, MBBI, TII.get(PPC::MFLR8), PPC::X0); > > if (HasFP) > BuildMI(MBB, MBBI, TII.get(PPC::STD)) > - .addReg(PPC::X31).addImm(FPOffset/4).addReg(PPC::X1); > + .addReg(PPC::X31) > + .addImm(FPOffset/4) > + .addReg(PPC::X1); > > if (UsesLR) > BuildMI(MBB, MBBI, TII.get(PPC::STD)) > - .addReg(PPC::X0).addImm(LROffset/4).addReg(PPC::X1); > + .addReg(PPC::X0) > + .addImm(LROffset / 4) > + .addReg(PPC::X1); > } else { > if (UsesLR) > BuildMI(MBB, MBBI, TII.get(PPC::MFLR), PPC::R0); > > if (HasFP) > BuildMI(MBB, MBBI, TII.get(PPC::STW)) > - .addReg(PPC::R31).addImm(FPOffset).addReg(PPC::R1); > + .addReg(PPC::R31) > + .addImm(FPOffset) > + .addReg(PPC::R1); > > if (UsesLR) > BuildMI(MBB, MBBI, TII.get(PPC::STW)) > - .addReg(PPC::R0).addImm(LROffset).addReg(PPC::R1); > + .addReg(PPC::R0) > + .addImm(LROffset) > + .addReg(PPC::R1); > } > > // Skip if a leaf routine. > @@ -788,40 +981,65 @@ > if (MaxAlign > TargetAlign) { > assert(isPowerOf2_32(MaxAlign)&&isInt16(MaxAlign)&&"Invalid > alignment!"); > assert(isInt16(NegFrameSize) && "Unhandled stack size and > alignment!"); > + > BuildMI(MBB, MBBI, TII.get(PPC::RLWINM), PPC::R0) > - .addReg(PPC::R1).addImm(0).addImm(32- > Log2_32(MaxAlign)).addImm(31); > - BuildMI(MBB, MBBI, > TII.get(PPC::SUBFIC) ,PPC::R0).addReg(PPC::R0) > + .addReg(PPC::R1) > + .addImm(0) > + .addImm(32 - Log2_32(MaxAlign)) > + .addImm(31); > + BuildMI(MBB, MBBI, TII.get(PPC::SUBFIC) ,PPC::R0) > + .addReg(PPC::R0, false, false, true) > .addImm(NegFrameSize); > BuildMI(MBB, MBBI, TII.get(PPC::STWUX)) > - .addReg(PPC::R1).addReg(PPC::R1).addReg(PPC::R0); > + .addReg(PPC::R1) > + .addReg(PPC::R1) > + .addReg(PPC::R0); > } else if (isInt16(NegFrameSize)) { > - BuildMI(MBB, MBBI, TII.get(PPC::STWU), > - > PPC::R1).addReg(PPC::R1).addImm(NegFrameSize).addReg(PPC::R1); > + BuildMI(MBB, MBBI, TII.get(PPC::STWU), PPC::R1) > + .addReg(PPC::R1) > + .addImm(NegFrameSize) > + .addReg(PPC::R1); > } else { > - BuildMI(MBB, MBBI, TII.get(PPC::LIS), > PPC::R0).addImm(NegFrameSize >> 16); > - BuildMI(MBB, MBBI, TII.get(PPC::ORI), PPC::R0).addReg(PPC::R0) > + BuildMI(MBB, MBBI, TII.get(PPC::LIS), PPC::R0) > + .addImm(NegFrameSize >> 16); > + BuildMI(MBB, MBBI, TII.get(PPC::ORI), PPC::R0) > + .addReg(PPC::R0, false, false, true) > .addImm(NegFrameSize & 0xFFFF); > - BuildMI(MBB, MBBI, > TII.get(PPC::STWUX)).addReg(PPC::R1).addReg(PPC::R1) > + BuildMI(MBB, MBBI, TII.get(PPC::STWUX)) > + .addReg(PPC::R1) > + .addReg(PPC::R1) > .addReg(PPC::R0); > } > } else { // PPC64. > if (MaxAlign > TargetAlign) { > assert(isPowerOf2_32(MaxAlign)&&isInt16(MaxAlign)&&"Invalid > alignment!"); > assert(isInt16(NegFrameSize) && "Unhandled stack size and > alignment!"); > + > BuildMI(MBB, MBBI, TII.get(PPC::RLDICL), PPC::X0) > - .addReg(PPC::X1).addImm(0).addImm(64-Log2_32(MaxAlign)); > - BuildMI(MBB, MBBI, TII.get(PPC::SUBFIC8), > PPC::X0).addReg(PPC::X0) > + .addReg(PPC::X1) > + .addImm(0) > + .addImm(64 - Log2_32(MaxAlign)); > + BuildMI(MBB, MBBI, TII.get(PPC::SUBFIC8), PPC::X0) > + .addReg(PPC::X0) > .addImm(NegFrameSize); > BuildMI(MBB, MBBI, TII.get(PPC::STDUX)) > - .addReg(PPC::X1).addReg(PPC::X1).addReg(PPC::X0); > + .addReg(PPC::X1) > + .addReg(PPC::X1) > + .addReg(PPC::X0); > } else if (isInt16(NegFrameSize)) { > BuildMI(MBB, MBBI, TII.get(PPC::STDU), PPC::X1) > - .addReg(PPC::X1).addImm(NegFrameSize/4).addReg(PPC::X1); > + .addReg(PPC::X1) > + .addImm(NegFrameSize / 4) > + .addReg(PPC::X1); > } else { > - BuildMI(MBB, MBBI, TII.get(PPC::LIS8), > PPC::X0).addImm(NegFrameSize >>16); > - BuildMI(MBB, MBBI, TII.get(PPC::ORI8), PPC::X0).addReg(PPC::X0) > + BuildMI(MBB, MBBI, TII.get(PPC::LIS8), PPC::X0) > + .addImm(NegFrameSize >> 16); > + BuildMI(MBB, MBBI, TII.get(PPC::ORI8), PPC::X0) > + .addReg(PPC::X0, false, false, true) > .addImm(NegFrameSize & 0xFFFF); > - BuildMI(MBB, MBBI, > TII.get(PPC::STDUX)).addReg(PPC::X1).addReg(PPC::X1) > + BuildMI(MBB, MBBI, TII.get(PPC::STDUX)) > + .addReg(PPC::X1) > + .addReg(PPC::X1) > .addReg(PPC::X0); > } > } > @@ -873,10 +1091,12 @@ > // If there is a frame pointer, copy R1 into R31 > if (HasFP) { > if (!IsPPC64) { > - BuildMI(MBB, MBBI, TII.get(PPC::OR), PPC::R31).addReg(PPC::R1) > + BuildMI(MBB, MBBI, TII.get(PPC::OR), PPC::R31) > + .addReg(PPC::R1) > .addReg(PPC::R1); > } else { > - BuildMI(MBB, MBBI, TII.get(PPC::OR8), PPC::X31).addReg(PPC::X1) > + BuildMI(MBB, MBBI, TII.get(PPC::OR8), PPC::X31) > + .addReg(PPC::X1) > .addReg(PPC::X1); > } > } > > Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h?rev=47863&r1=47862&r2=47863&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h (original) > +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h Mon Mar 3 > 16:19:16 2008 > @@ -51,13 +51,20 @@ > /// time). > bool targetHandlesStackFrameRounding() const { return true; } > > + /// requiresRegisterScavenging - We require a register scavenger. > + /// FIXME (64-bit): Should be inlined. > + bool requiresRegisterScavenging(const MachineFunction &MF) const; > + > bool hasFP(const MachineFunction &MF) const; > > void eliminateCallFramePseudoInstr(MachineFunction &MF, > MachineBasicBlock &MBB, > MachineBasicBlock::iterator I) > const; > > - void lowerDynamicAlloc(MachineBasicBlock::iterator II) const; > + void lowerDynamicAlloc(MachineBasicBlock::iterator II, > + int SPAdj, RegScavenger *RS) const; > + void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned > FrameIndex, > + int SPAdj, RegScavenger *RS) const; > void eliminateFrameIndex(MachineBasicBlock::iterator II, > int SPAdj, RegScavenger *RS = NULL) const; > > > Modified: llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll?rev=47863&r1=47862&r2=47863&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll (original) > +++ llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll Mon Mar 3 > 16:19:16 2008 > @@ -1,7 +1,7 @@ > ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple- > darwin8 | \ > ; RUN: grep {stw r31, 20(r1)} > ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple- > darwin8 | \ > -; RUN: grep {stwu r1, -64(r1)} > +; RUN: grep {stwu r1, -80(r1)} > ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple- > darwin8 | \ > ; RUN: grep {lwz r1, 0(r1)} > ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple- > darwin8 | \ > @@ -9,7 +9,7 @@ > ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple- > darwin8 -disable-fp-elim | \ > ; RUN: grep {stw r31, 20(r1)} > ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple- > darwin8 -disable-fp-elim | \ > -; RUN: grep {stwu r1, -64(r1)} > +; RUN: grep {stwu r1, -80(r1)} > ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple- > darwin8 -disable-fp-elim | \ > ; RUN: grep {lwz r1, 0(r1)} > ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple- > darwin8 -disable-fp-elim | \ > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Mon Mar 3 17:14:56 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Mar 2008 15:14:56 -0800 Subject: [llvm-commits] [llvm] r47862 - /llvm/trunk/lib/CodeGen/MachineInstr.cpp In-Reply-To: <200803032214.m23MEXkF014824@zion.cs.uiuc.edu> References: <200803032214.m23MEXkF014824@zion.cs.uiuc.edu> Message-ID: On Mar 3, 2008, at 2:14 PM, Bill Wendling wrote: > Author: void > Date: Mon Mar 3 16:14:33 2008 > New Revision: 47862 > > URL: http://llvm.org/viewvc/llvm-project?rev=47862&view=rev > Log: > Go through the machine instruction's operands to make sure that > we're not > marking both a super- and sub-register as "killed". This removes > implicit uses > that are marked as "killed". > > > Modified: > llvm/trunk/lib/CodeGen/MachineInstr.cpp > > Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=47862&r1=47861&r2=47862&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original) > +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Mon Mar 3 16:14:33 2008 > @@ -678,34 +678,74 @@ > bool MachineInstr::addRegisterKilled(unsigned IncomingReg, > const TargetRegisterInfo > *RegInfo, > bool AddIfNotFound) { > - bool Found = false; > - for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { > + // Go through the machine instruction's operands to eliminate any > potentially > + // illegal conditions. I.e., a super- and sub-register both > marked "kill". > + Restart: > + for (unsigned i = 0, e = getNumOperands(); i < e; ++i) { > MachineOperand &MO = getOperand(i); > + > if (MO.isRegister() && MO.isUse()) { > unsigned Reg = MO.getReg(); > - if (!Reg) > + > + if (!Reg || IncomingReg == Reg || > + !TargetRegisterInfo::isPhysicalRegister(Reg) || > + !TargetRegisterInfo::isPhysicalRegister(IncomingReg)) > continue; > + > + if (RegInfo->isSubRegister(IncomingReg, Reg)) { > + if (MO.isKill()) { > + if (MO.isImplicit()) { > > + // Remove this implicit use that marks the sub-register > "kill". Let > + // the super-register take care of this information. > + RemoveOperand(i); > + goto Restart; // Instruction was modified, redo > checking. Seems like this may increase compile time unnecessarily? Do you have to restart from first operand? Can you simply recompute 'e' and make sure i isn't incremented? > > + } else { > + // The super-register is going to take care of this kill > + // information. > + MO.setIsKill(false); > + } > + } > + } else if (RegInfo->isSuperRegister(IncomingReg, Reg) && > MO.isKill()) { > + // The kill information is already handled by a super- > register. Don't > + // add this sub-register as a kill. > + return true; > + } Check this first so we can take advantage of the early exit to avoid nesting. > > + } > + } > + > + // If the register already exists, then make sure it or its super- > register is > + // marked "kill". > + for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { > + MachineOperand &MO = getOperand(i); > + > + if (MO.isRegister() && MO.isUse()) { > + unsigned Reg = MO.getReg(); > + if (!Reg) continue; > + > if (Reg == IncomingReg) { > MO.setIsKill(); > - Found = true; > - break; > + return true; > > } else if (TargetRegisterInfo::isPhysicalRegister(Reg) && No need for else here. Evan > > TargetRegisterInfo::isPhysicalRegister(IncomingReg) > && > RegInfo->isSuperRegister(IncomingReg, Reg) && > - MO.isKill()) > + MO.isKill()) { > // A super-register kill already exists. > - Found = true; > + return true; > + } > } > } > > - // If not found, this means an alias of one of the operand is > killed. Add a > + // If not found, this means an alias of one of the operands is > killed. Add a > // new implicit operand if required. > - if (!Found && AddIfNotFound) { > - addOperand(MachineOperand::CreateReg(IncomingReg, false/*IsDef*/, > - true/*IsImp*/,true/ > *IsKill*/)); > + if (AddIfNotFound) { > + addOperand(MachineOperand::CreateReg(IncomingReg, > + false /*IsDef*/, > + true /*IsImp*/, > + true /*IsKill*/)); > return true; > } > - return Found; > + > + return false; > } > > bool MachineInstr::addRegisterDead(unsigned IncomingReg, > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Mon Mar 3 17:19:03 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 3 Mar 2008 15:19:03 -0800 Subject: [llvm-commits] [llvm] r47863 - in /llvm/trunk: include/llvm/CodeGen/RegisterScavenging.h lib/Target/PowerPC/PPCInstrInfo.cpp lib/Target/PowerPC/PPCInstrInfo.td lib/Target/PowerPC/PPCMachineFunctionInfo.h lib/Target/PowerPC/PPCRegisterInfo.cpp lib Message-ID: <16e5fdf90803031519j47e6e99x80a67b59b733f40@mail.gmail.com> On Mon, Mar 3, 2008 at 3:05 PM, Evan Cheng wrote: > Thanks. Some comments below. > > > @@ -351,22 +353,30 @@ > > NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STFS)) > > .addReg(SrcReg, false, false, > > isKill), FrameIdx)); > > } else if (RC == PPC::CRRCRegisterClass) { > > - // FIXME: We use R0 here, because it isn't available for RA. > > - // We need to store the CR in the low 4-bits of the saved > > value. First, > > - // issue a MFCR to save all of the CRBits. > > - NewMIs.push_back(BuildMI(TII.get(PPC::MFCR), PPC::R0)); > > + if (!isPPC64) { // FIXME (64-bit): Enable > > + > > NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::SPILL_CR)) > > + .addReg(SrcReg, false, > > false, isKill), > > + FrameIdx)); > > + return true; > > + } else { > > + // FIXME: We use R0 here, because it isn't available for RA. > > We need to > > + // store the CR in the low 4-bits of the saved value. First, > > issue a MFCR > > + // to save all of the CRBits. > > + NewMIs.push_back(BuildMI(TII.get(PPC::MFCR), PPC::R0)); > > Is this right? I thought the whole point of using RS is so we don't > have to reserved R0? > This is part of a "FIXME". PPC64 can't handle the register scavenger just yet. When it does, then this will be removed. > > + // FIXME (64-bit): Use "findScratchRegister" > > + unsigned Reg; > > + if (!LP64) > > + Reg = findScratchRegister(II, RS, RC, SPAdj); > > + else > > + Reg = PPC::R0; > > Style police: unsigned Reg = ILP64 ? PPC:R0 : findScratchRegister()... > > Perhaps an assertion if findScratchRegister fails to scavenge a > register? > Sure. :-) -bw From isanbard at gmail.com Mon Mar 3 17:22:41 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 3 Mar 2008 15:22:41 -0800 Subject: [llvm-commits] [llvm] r47862 - /llvm/trunk/lib/CodeGen/MachineInstr.cpp In-Reply-To: References: <200803032214.m23MEXkF014824@zion.cs.uiuc.edu> Message-ID: <16e5fdf90803031522y7cd2c7c9nec7361de750844cf@mail.gmail.com> On Mon, Mar 3, 2008 at 3:14 PM, Evan Cheng wrote: > > --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original) > > +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Mon Mar 3 16:14:33 2008 > > @@ -678,34 +678,74 @@ > > bool MachineInstr::addRegisterKilled(unsigned IncomingReg, > > const TargetRegisterInfo > > *RegInfo, > > bool AddIfNotFound) { > > - bool Found = false; > > - for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { > > + // Go through the machine instruction's operands to eliminate any > > potentially > > + // illegal conditions. I.e., a super- and sub-register both > > marked "kill". > > + Restart: > > + for (unsigned i = 0, e = getNumOperands(); i < e; ++i) { > > MachineOperand &MO = getOperand(i); > > + > > if (MO.isRegister() && MO.isUse()) { > > unsigned Reg = MO.getReg(); > > - if (!Reg) > > + > > + if (!Reg || IncomingReg == Reg || > > + !TargetRegisterInfo::isPhysicalRegister(Reg) || > > + !TargetRegisterInfo::isPhysicalRegister(IncomingReg)) > > continue; > > + > > + if (RegInfo->isSubRegister(IncomingReg, Reg)) { > > + if (MO.isKill()) { > > + if (MO.isImplicit()) { > > > > + // Remove this implicit use that marks the sub-register > > "kill". Let > > + // the super-register take care of this information. > > + RemoveOperand(i); > > + goto Restart; // Instruction was modified, redo > > checking. > > Seems like this may increase compile time unnecessarily? Do you have > to restart from first operand? Can you simply recompute 'e' and make > sure i isn't incremented? > Okay. (I'm the only one who likes gotos ;-) > > + } else { > > + // The super-register is going to take care of this kill > > + // information. > > + MO.setIsKill(false); > > + } > > + } > > + } else if (RegInfo->isSuperRegister(IncomingReg, Reg) && > > MO.isKill()) { > > + // The kill information is already handled by a super- > > register. Don't > > + // add this sub-register as a kill. > > + return true; > > + } > > Check this first so we can take advantage of the early exit to avoid > nesting. > Okay. > > > > > + } > > + } > > + > > + // If the register already exists, then make sure it or its super- > > register is > > + // marked "kill". > > + for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { > > + MachineOperand &MO = getOperand(i); > > + > > + if (MO.isRegister() && MO.isUse()) { > > + unsigned Reg = MO.getReg(); > > + if (!Reg) continue; > > + > > if (Reg == IncomingReg) { > > MO.setIsKill(); > > - Found = true; > > - break; > > + return true; > > > > } else if (TargetRegisterInfo::isPhysicalRegister(Reg) && > > No need for else here. > Okay. -bw From dalej at apple.com Mon Mar 3 17:29:28 2008 From: dalej at apple.com (Dale Johannesen) Date: Mon, 3 Mar 2008 15:29:28 -0800 Subject: [llvm-commits] [llvm] r47862 - /llvm/trunk/lib/CodeGen/MachineInstr.cpp In-Reply-To: <16e5fdf90803031522y7cd2c7c9nec7361de750844cf@mail.gmail.com> References: <200803032214.m23MEXkF014824@zion.cs.uiuc.edu> <16e5fdf90803031522y7cd2c7c9nec7361de750844cf@mail.gmail.com> Message-ID: <72E52E44-C937-44C0-B9B6-5DA66057D71C@apple.com> On Mar 3, 2008, at 3:22 PM, Bill Wendling wrote: > On Mon, Mar 3, 2008 at 3:14 PM, Evan Cheng > wrote: >>> --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original) >>> +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Mon Mar 3 16:14:33 2008 >>> > Okay. (I'm the only one who likes gotos ;-) I don't mind them in rare cases, but I always get overruled:) From gohman at apple.com Mon Mar 3 17:35:36 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 03 Mar 2008 23:35:36 -0000 Subject: [llvm-commits] [llvm] r47868 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <200803032335.m23NZaZO017529@zion.cs.uiuc.edu> Author: djg Date: Mon Mar 3 17:35:36 2008 New Revision: 47868 URL: http://llvm.org/viewvc/llvm-project?rev=47868&view=rev Log: More APInt-ification. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=47868&r1=47867&r2=47868&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Mar 3 17:35:36 2008 @@ -1518,17 +1518,13 @@ return VTBits-Tmp; case ISD::Constant: { - uint64_t Val = cast(Op)->getValue(); - // If negative, invert the bits, then look at it. - if (Val & MVT::getIntVTSignBit(VT)) - Val = ~Val; - - // Shift the bits so they are the leading bits in the int64_t. - Val <<= 64-VTBits; - - // Return # leading zeros. We use 'min' here in case Val was zero before - // shifting. We don't want to return '64' as for an i32 "0". - return std::min(VTBits, CountLeadingZeros_64(Val)); + const APInt &Val = cast(Op)->getAPIntValue(); + // If negative, return # leading ones. + if (Val.isNegative()) + return Val.countLeadingOnes(); + + // Return # leading zeros. + return Val.countLeadingZeros(); } case ISD::SIGN_EXTEND: From evan.cheng at apple.com Mon Mar 3 17:47:04 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Mar 2008 15:47:04 -0800 Subject: [llvm-commits] [llvm] r47862 - /llvm/trunk/lib/CodeGen/MachineInstr.cpp In-Reply-To: <72E52E44-C937-44C0-B9B6-5DA66057D71C@apple.com> References: <200803032214.m23MEXkF014824@zion.cs.uiuc.edu> <16e5fdf90803031522y7cd2c7c9nec7361de750844cf@mail.gmail.com> <72E52E44-C937-44C0-B9B6-5DA66057D71C@apple.com> Message-ID: <3D7E8268-D07B-4EAC-A8CD-BF2C4FEF1CA0@apple.com> Haven't you heard goto's are evil? :-) I think goto's can be used tastefully. However, it's definitely not the right situation to use it in this case. Evan On Mar 3, 2008, at 3:29 PM, Dale Johannesen wrote: > > On Mar 3, 2008, at 3:22 PM, Bill Wendling wrote: > >> On Mon, Mar 3, 2008 at 3:14 PM, Evan Cheng >> wrote: >>>> --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original) >>>> +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Mon Mar 3 16:14:33 >>>> 2008 >>>> >> Okay. (I'm the only one who likes gotos ;-) > > I don't mind them in rare cases, but I always get overruled:) > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From gohman at apple.com Mon Mar 3 17:51:39 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 03 Mar 2008 23:51:39 -0000 Subject: [llvm-commits] [llvm] r47869 - /llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Message-ID: <200803032351.m23Npd58017963@zion.cs.uiuc.edu> Author: djg Date: Mon Mar 3 17:51:38 2008 New Revision: 47869 URL: http://llvm.org/viewvc/llvm-project?rev=47869&view=rev Log: Misc. APInt-ification in the DAGCombiner. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=47869&r1=47868&r2=47869&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Mar 3 17:51:38 2008 @@ -1984,15 +1984,15 @@ // If there is an AND of either shifted operand, apply it to the result. if (LHSMask.Val || RHSMask.Val) { - uint64_t Mask = MVT::getIntVTBitMask(VT); + APInt Mask = APInt::getAllOnesValue(OpSizeInBits); if (LHSMask.Val) { - uint64_t RHSBits = (1ULL << LShVal)-1; - Mask &= cast(LHSMask)->getValue() | RHSBits; + APInt RHSBits = APInt::getLowBitsSet(OpSizeInBits, LShVal); + Mask &= cast(LHSMask)->getAPIntValue() | RHSBits; } if (RHSMask.Val) { - uint64_t LHSBits = ~((1ULL << (OpSizeInBits-RShVal))-1); - Mask &= cast(RHSMask)->getValue() | LHSBits; + APInt LHSBits = APInt::getHighBitsSet(OpSizeInBits, RShVal); + Mask &= cast(RHSMask)->getAPIntValue() | LHSBits; } Rot = DAG.getNode(ISD::AND, VT, Rot, DAG.getConstant(Mask, VT)); @@ -2248,8 +2248,8 @@ // the constant which would cause it to be modified for this // operation. if (N->getOpcode() == ISD::SRA) { - uint64_t BinOpRHSSign = BinOpCst->getValue() >> (MVT::getSizeInBits(VT)-1); - if ((bool)BinOpRHSSign != HighBitSet) + bool BinOpRHSSignSet = BinOpCst->getAPIntValue().isNegative(); + if (BinOpRHSSignSet != HighBitSet) return SDOperand(); } @@ -2872,7 +2872,8 @@ } else if (X.getValueType() > VT) { X = DAG.getNode(ISD::TRUNCATE, VT, X); } - uint64_t Mask = cast(N0.getOperand(1))->getValue(); + APInt Mask = cast(N0.getOperand(1))->getAPIntValue(); + Mask.zext(MVT::getSizeInBits(VT)); return DAG.getNode(ISD::AND, VT, X, DAG.getConstant(Mask, VT)); } @@ -2988,7 +2989,8 @@ } else if (X.getValueType() > VT) { X = DAG.getNode(ISD::TRUNCATE, VT, X); } - uint64_t Mask = cast(N0.getOperand(1))->getValue(); + APInt Mask = cast(N0.getOperand(1))->getAPIntValue(); + Mask.zext(MVT::getSizeInBits(VT)); return DAG.getNode(ISD::AND, VT, X, DAG.getConstant(Mask, VT)); } @@ -3350,7 +3352,7 @@ SDOperand NewConv = DAG.getNode(ISD::BIT_CONVERT, VT, N0.getOperand(0)); AddToWorkList(NewConv.Val); - uint64_t SignBit = MVT::getIntVTSignBit(VT); + APInt SignBit = APInt::getSignBit(MVT::getSizeInBits(VT)); if (N0.getOpcode() == ISD::FNEG) return DAG.getNode(ISD::XOR, VT, NewConv, DAG.getConstant(SignBit, VT)); assert(N0.getOpcode() == ISD::FABS); @@ -3383,7 +3385,7 @@ AddToWorkList(X.Val); } - uint64_t SignBit = MVT::getIntVTSignBit(VT); + APInt SignBit = APInt::getSignBit(MVT::getSizeInBits(VT)); X = DAG.getNode(ISD::AND, VT, X, DAG.getConstant(SignBit, VT)); AddToWorkList(X.Val); @@ -3457,7 +3459,7 @@ for (unsigned i = 0, e = BV->getNumOperands(); i != e; i += NumInputsPerOutput) { bool isLE = TLI.isLittleEndian(); - uint64_t NewBits = 0; + APInt NewBits = APInt(DstBitSize, 0); bool EltIsUndef = true; for (unsigned j = 0; j != NumInputsPerOutput; ++j) { // Shift the previously computed bits over. @@ -3466,7 +3468,8 @@ if (Op.getOpcode() == ISD::UNDEF) continue; EltIsUndef = false; - NewBits |= cast(Op)->getValue(); + NewBits |= + APInt(cast(Op)->getAPIntValue()).zext(DstBitSize); } if (EltIsUndef) @@ -3492,14 +3495,14 @@ Ops.push_back(DAG.getNode(ISD::UNDEF, DstEltVT)); continue; } - uint64_t OpVal = cast(BV->getOperand(i))->getValue(); + APInt OpVal = cast(BV->getOperand(i))->getAPIntValue(); for (unsigned j = 0; j != NumOutputsPerInput; ++j) { - unsigned ThisVal = OpVal & ((1ULL << DstBitSize)-1); + APInt ThisVal = APInt(OpVal).trunc(DstBitSize); Ops.push_back(DAG.getConstant(ThisVal, DstEltVT)); - if (isS2V && i == 0 && j == 0 && ThisVal == OpVal) + if (isS2V && i == 0 && j == 0 && APInt(ThisVal).zext(SrcBitSize) == OpVal) // Simply turn this into a SCALAR_TO_VECTOR of the new type. return DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Ops[0]); - OpVal >>= DstBitSize; + OpVal = OpVal.lshr(DstBitSize); } // For big endian targets, swap the order of the pieces of each element. From isanbard at gmail.com Mon Mar 3 17:51:48 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 3 Mar 2008 15:51:48 -0800 Subject: [llvm-commits] [llvm] r47862 - /llvm/trunk/lib/CodeGen/MachineInstr.cpp In-Reply-To: <3D7E8268-D07B-4EAC-A8CD-BF2C4FEF1CA0@apple.com> References: <200803032214.m23MEXkF014824@zion.cs.uiuc.edu> <16e5fdf90803031522y7cd2c7c9nec7361de750844cf@mail.gmail.com> <72E52E44-C937-44C0-B9B6-5DA66057D71C@apple.com> <3D7E8268-D07B-4EAC-A8CD-BF2C4FEF1CA0@apple.com> Message-ID: <16e5fdf90803031551u70c97d29v174a4fde1286869c@mail.gmail.com> On Mon, Mar 3, 2008 at 3:47 PM, Evan Cheng wrote: > Haven't you heard goto's are evil? :-) > > I think goto's can be used tastefully. However, it's definitely not > the right situation to use it in this case. > Fair enough. I was 90% sure that that was going to be picked on when I submitted it. I did it that way because how the machine operands are stored in the machine instruction is non-intuitive and I didn't want to make a mistake of having an invalid iterator. :-) -bw From isanbard at gmail.com Mon Mar 3 17:57:28 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 03 Mar 2008 23:57:28 -0000 Subject: [llvm-commits] [llvm] r47870 - in /llvm/trunk/lib/CodeGen: MachineInstr.cpp PrologEpilogInserter.cpp Message-ID: <200803032357.m23NvSju018174@zion.cs.uiuc.edu> Author: void Date: Mon Mar 3 17:57:28 2008 New Revision: 47870 URL: http://llvm.org/viewvc/llvm-project?rev=47870&view=rev Log: Miscellaneous clean-ups based on Evan's feedback: - Cleaned up how the prologue-epilogue inserter loops over the instructions. - Instead of restarting the processing of an instruction if we remove an implicit kill, just update the end iterator and make sure that the iterator isn't incremented. Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=47870&r1=47869&r2=47870&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Mon Mar 3 17:57:28 2008 @@ -680,37 +680,40 @@ bool AddIfNotFound) { // Go through the machine instruction's operands to eliminate any potentially // illegal conditions. I.e., a super- and sub-register both marked "kill". - Restart: - for (unsigned i = 0, e = getNumOperands(); i < e; ++i) { + for (unsigned i = 0, e = getNumOperands(); i < e;) { MachineOperand &MO = getOperand(i); - if (MO.isRegister() && MO.isUse()) { unsigned Reg = MO.getReg(); if (!Reg || IncomingReg == Reg || !TargetRegisterInfo::isPhysicalRegister(Reg) || - !TargetRegisterInfo::isPhysicalRegister(IncomingReg)) + !TargetRegisterInfo::isPhysicalRegister(IncomingReg)) { + ++i; continue; + } - if (RegInfo->isSubRegister(IncomingReg, Reg)) { - if (MO.isKill()) { - if (MO.isImplicit()) { - // Remove this implicit use that marks the sub-register "kill". Let - // the super-register take care of this information. - RemoveOperand(i); - goto Restart; // Instruction was modified, redo checking. - } else { - // The super-register is going to take care of this kill - // information. - MO.setIsKill(false); - } - } - } else if (RegInfo->isSuperRegister(IncomingReg, Reg) && MO.isKill()) { + if (RegInfo->isSuperRegister(IncomingReg, Reg) && MO.isKill()) // The kill information is already handled by a super-register. Don't // add this sub-register as a kill. return true; + + if (RegInfo->isSubRegister(IncomingReg, Reg) && MO.isKill()) { + if (MO.isImplicit()) { + // Remove this implicit use that marks the sub-register + // "kill". Let the super-register take care of this + // information. + RemoveOperand(i); + e = getNumOperands(); + continue; + } else { + // The super-register is going to take care of this kill + // information. + MO.setIsKill(false); + } } } + + ++i; } // If the register already exists, then make sure it or its super-register is @@ -725,13 +728,14 @@ if (Reg == IncomingReg) { MO.setIsKill(); return true; - } else if (TargetRegisterInfo::isPhysicalRegister(Reg) && - TargetRegisterInfo::isPhysicalRegister(IncomingReg) && - RegInfo->isSuperRegister(IncomingReg, Reg) && - MO.isKill()) { + } + + if (TargetRegisterInfo::isPhysicalRegister(Reg) && + TargetRegisterInfo::isPhysicalRegister(IncomingReg) && + RegInfo->isSuperRegister(IncomingReg, Reg) && + MO.isKill()) // A super-register kill already exists. return true; - } } } Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=47870&r1=47869&r2=47870&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original) +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Mon Mar 3 17:57:28 2008 @@ -517,53 +517,63 @@ for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) { MachineInstr *MI = I; - if (I->getOpcode() == FrameSetupOpcode || - I->getOpcode() == FrameDestroyOpcode) { - // Remember how much SP has been adjustment to create the call frame. - int Size = I->getOperand(0).getImm(); - if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) || - (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode)) - Size = -Size; - SPAdj += Size; - MachineBasicBlock::iterator PrevI = prior(I); - TRI.eliminateCallFramePseudoInstr(Fn, *BB, I); - // Visit the instructions created by eliminateCallFramePseudoInstr(). - I = next(PrevI); - MI = NULL; - } else if (I->getOpcode() == TargetInstrInfo::DECLARE) { + if (I->getOpcode() == TargetInstrInfo::DECLARE) { // Ignore it. ++I; - } else { - bool DoIncr = true; - - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) - if (MI->getOperand(i).isFrameIndex()) { - // Some instructions (e.g. inline asm instructions) can have - // multiple frame indices and/or cause eliminateFrameIndex to insert - // more than one instruction. We need the register scavenger to go - // through all of these instructions so that it can update its - // register information. We keep the iterator at the point before - // insertion so that we can revisit them in full. - bool AtBeginning = (I == BB->begin()); - if (!AtBeginning) --I; - - // If this instruction has a FrameIndex operand, we need to use that - // target machine register info object to eliminate it. - TRI.eliminateFrameIndex(MI, SPAdj, RS); - - // Reset the iterator if we were at the beginning of the BB. - if (AtBeginning) { - I = BB->begin(); - DoIncr = false; - } - - MI = 0; - break; - } + continue; + } - if (DoIncr) ++I; + if (I->getOpcode() == FrameSetupOpcode || + I->getOpcode() == FrameDestroyOpcode) { + // Remember how much SP has been adjusted to create the call + // frame. + int Size = I->getOperand(0).getImm(); + + if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) || + (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode)) + Size = -Size; + + SPAdj += Size; + + MachineBasicBlock::iterator PrevI = prior(I); + TRI.eliminateCallFramePseudoInstr(Fn, *BB, I); + + // Visit the instructions created by eliminateCallFramePseudoInstr(). + I = next(PrevI); + continue; } + bool DoIncr = true; + + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) + if (MI->getOperand(i).isFrameIndex()) { + // Some instructions (e.g. inline asm instructions) can have + // multiple frame indices and/or cause eliminateFrameIndex + // to insert more than one instruction. We need the register + // scavenger to go through all of these instructions so that + // it can update its register information. We keep the + // iterator at the point before insertion so that we can + // revisit them in full. + bool AtBeginning = (I == BB->begin()); + if (!AtBeginning) --I; + + // If this instruction has a FrameIndex operand, we need to + // use that target machine register info object to eliminate + // it. + TRI.eliminateFrameIndex(MI, SPAdj, RS); + + // Reset the iterator if we were at the beginning of the BB. + if (AtBeginning) { + I = BB->begin(); + DoIncr = false; + } + + MI = 0; + break; + } + + if (DoIncr) ++I; + // Update register states. if (RS && MI) RS->forward(MI); } From evan.cheng at apple.com Mon Mar 3 18:07:48 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Mar 2008 16:07:48 -0800 Subject: [llvm-commits] [llvm] r47862 - /llvm/trunk/lib/CodeGen/MachineInstr.cpp In-Reply-To: <16e5fdf90803031551u70c97d29v174a4fde1286869c@mail.gmail.com> References: <200803032214.m23MEXkF014824@zion.cs.uiuc.edu> <16e5fdf90803031522y7cd2c7c9nec7361de750844cf@mail.gmail.com> <72E52E44-C937-44C0-B9B6-5DA66057D71C@apple.com> <3D7E8268-D07B-4EAC-A8CD-BF2C4FEF1CA0@apple.com> <16e5fdf90803031551u70c97d29v174a4fde1286869c@mail.gmail.com> Message-ID: <4A631404-9AD7-4325-9E66-5C8998C04602@apple.com> Except it's not using an iterator... Evan On Mar 3, 2008, at 3:51 PM, Bill Wendling wrote: > On Mon, Mar 3, 2008 at 3:47 PM, Evan Cheng > wrote: >> Haven't you heard goto's are evil? :-) >> >> I think goto's can be used tastefully. However, it's definitely not >> the right situation to use it in this case. >> > Fair enough. I was 90% sure that that was going to be picked on when I > submitted it. I did it that way because how the machine operands are > stored in the machine instruction is non-intuitive and I didn't want > to make a mistake of having an invalid iterator. :-) > > -bw > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Mon Mar 3 18:39:46 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Mar 2008 16:39:46 -0800 Subject: [llvm-commits] [llvm] r47870 - in /llvm/trunk/lib/CodeGen: MachineInstr.cpp PrologEpilogInserter.cpp In-Reply-To: <200803032357.m23NvSju018174@zion.cs.uiuc.edu> References: <200803032357.m23NvSju018174@zion.cs.uiuc.edu> Message-ID: <4942617B-8D8C-406E-AD5A-13D3B46EE8A4@apple.com> On Mar 3, 2008, at 3:57 PM, Bill Wendling wrote: > > + > + if (RegInfo->isSubRegister(IncomingReg, Reg) && MO.isKill()) { > + if (MO.isImplicit()) { > + // Remove this implicit use that marks the sub-register > + // "kill". Let the super-register take care of this > + // information. > + RemoveOperand(i); > + e = getNumOperands(); --e is sufficient. Evan > > + continue; > + } else { > + // The super-register is going to take care of this kill > + // information. > + MO.setIsKill(false); > + } > } > } > + > + ++i; > } > > // If the register already exists, then make sure it or its super- > register is > @@ -725,13 +728,14 @@ > if (Reg == IncomingReg) { > MO.setIsKill(); > return true; > - } else if (TargetRegisterInfo::isPhysicalRegister(Reg) && > - > TargetRegisterInfo::isPhysicalRegister(IncomingReg) && > - RegInfo->isSuperRegister(IncomingReg, Reg) && > - MO.isKill()) { > + } > + > + if (TargetRegisterInfo::isPhysicalRegister(Reg) && > + TargetRegisterInfo::isPhysicalRegister(IncomingReg) && > + RegInfo->isSuperRegister(IncomingReg, Reg) && > + MO.isKill()) > // A super-register kill already exists. > return true; > - } > } > } > > > Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=47870&r1=47869&r2=47870&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original) > +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Mon Mar 3 > 17:57:28 2008 > @@ -517,53 +517,63 @@ > for (MachineBasicBlock::iterator I = BB->begin(); I != BB- > >end(); ) { > MachineInstr *MI = I; > > - if (I->getOpcode() == FrameSetupOpcode || > - I->getOpcode() == FrameDestroyOpcode) { > - // Remember how much SP has been adjustment to create the > call frame. > - int Size = I->getOperand(0).getImm(); > - if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) > || > - (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode)) > - Size = -Size; > - SPAdj += Size; > - MachineBasicBlock::iterator PrevI = prior(I); > - TRI.eliminateCallFramePseudoInstr(Fn, *BB, I); > - // Visit the instructions created by > eliminateCallFramePseudoInstr(). > - I = next(PrevI); > - MI = NULL; > - } else if (I->getOpcode() == TargetInstrInfo::DECLARE) { > + if (I->getOpcode() == TargetInstrInfo::DECLARE) { > // Ignore it. > ++I; > - } else { > - bool DoIncr = true; > - > - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) > - if (MI->getOperand(i).isFrameIndex()) { > - // Some instructions (e.g. inline asm instructions) can > have > - // multiple frame indices and/or cause > eliminateFrameIndex to insert > - // more than one instruction. We need the register > scavenger to go > - // through all of these instructions so that it can > update its > - // register information. We keep the iterator at the > point before > - // insertion so that we can revisit them in full. > - bool AtBeginning = (I == BB->begin()); > - if (!AtBeginning) --I; > - > - // If this instruction has a FrameIndex operand, we > need to use that > - // target machine register info object to eliminate it. > - TRI.eliminateFrameIndex(MI, SPAdj, RS); > - > - // Reset the iterator if we were at the beginning of > the BB. > - if (AtBeginning) { > - I = BB->begin(); > - DoIncr = false; > - } > - > - MI = 0; > - break; > - } > + continue; > + } > > - if (DoIncr) ++I; > + if (I->getOpcode() == FrameSetupOpcode || > + I->getOpcode() == FrameDestroyOpcode) { > + // Remember how much SP has been adjusted to create the call > + // frame. > + int Size = I->getOperand(0).getImm(); > + > + if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) || > + (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode)) > + Size = -Size; > + > + SPAdj += Size; > + > + MachineBasicBlock::iterator PrevI = prior(I); > + TRI.eliminateCallFramePseudoInstr(Fn, *BB, I); > + > + // Visit the instructions created by > eliminateCallFramePseudoInstr(). > + I = next(PrevI); > + continue; > } > > + bool DoIncr = true; > + > + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) > + if (MI->getOperand(i).isFrameIndex()) { > + // Some instructions (e.g. inline asm instructions) can have > + // multiple frame indices and/or cause eliminateFrameIndex > + // to insert more than one instruction. We need the register > + // scavenger to go through all of these instructions so that > + // it can update its register information. We keep the > + // iterator at the point before insertion so that we can > + // revisit them in full. > + bool AtBeginning = (I == BB->begin()); > + if (!AtBeginning) --I; > + > + // If this instruction has a FrameIndex operand, we need to > + // use that target machine register info object to eliminate > + // it. > + TRI.eliminateFrameIndex(MI, SPAdj, RS); > + > + // Reset the iterator if we were at the beginning of the BB. > + if (AtBeginning) { > + I = BB->begin(); > + DoIncr = false; > + } > + > + MI = 0; > + break; > + } > + > + if (DoIncr) ++I; > + > // Update register states. > if (RS && MI) RS->forward(MI); > } > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Mon Mar 3 18:40:35 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Mar 2008 00:40:35 -0000 Subject: [llvm-commits] [llvm] r47871 - in /llvm/trunk/lib/Target/X86: X86ISelDAGToDAG.cpp X86InstrInfo.td Message-ID: <200803040040.m240eais019889@zion.cs.uiuc.edu> Author: evancheng Date: Mon Mar 3 18:40:35 2008 New Revision: 47871 URL: http://llvm.org/viewvc/llvm-project?rev=47871&view=rev Log: Remove -always-fold-and-in-test. Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp llvm/trunk/lib/Target/X86/X86InstrInfo.td Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=47871&r1=47870&r2=47871&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Mar 3 18:40:35 2008 @@ -44,13 +44,6 @@ STATISTIC(NumFPKill , "Number of FP_REG_KILL instructions added"); STATISTIC(NumLoadMoved, "Number of loads moved below TokenFactor"); -namespace { - static cl::opt - AlwaysFoldAndInTest("always-fold-and-in-test", - cl::desc("Always fold and operation in test"), - cl::init(false), cl::Hidden); -} - //===----------------------------------------------------------------------===// // Pattern Matcher Implementation //===----------------------------------------------------------------------===// @@ -433,7 +426,7 @@ RModW = true; std::swap(N10, N11); } - RModW = RModW && N10.Val->isOperand(Chain.Val) && N10.hasOneUse() && + RModW = RModW && N10.Val->isOperandOf(Chain.Val) && N10.hasOneUse() && (N10.getOperand(1) == N2) && (N10.Val->getValueType(0) == N1.getValueType()); if (RModW) @@ -452,7 +445,7 @@ case X86ISD::SHRD: { SDOperand N10 = N1.getOperand(0); if (ISD::isNON_EXTLoad(N10.Val)) - RModW = N10.Val->isOperand(Chain.Val) && N10.hasOneUse() && + RModW = N10.Val->isOperandOf(Chain.Val) && N10.hasOneUse() && (N10.getOperand(1) == N2) && (N10.Val->getValueType(0) == N1.getValueType()); if (RModW) Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=47871&r1=47870&r2=47871&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Mon Mar 3 18:40:35 2008 @@ -255,7 +255,7 @@ // An 'and' node with a single use. def and_su : PatFrag<(ops node:$lhs, node:$rhs), (and node:$lhs, node:$rhs), [{ - return AlwaysFoldAndInTest || N->hasOneUse(); + return N->hasOneUse(); }]>; //===----------------------------------------------------------------------===// From evan.cheng at apple.com Mon Mar 3 18:41:45 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Mar 2008 00:41:45 -0000 Subject: [llvm-commits] [llvm] r47872 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGNodes.h lib/CodeGen/SelectionDAG/DAGCombiner.cpp lib/CodeGen/SelectionDAG/ScheduleDAG.cpp lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <200803040041.m240fjGC019946@zion.cs.uiuc.edu> Author: evancheng Date: Mon Mar 3 18:41:45 2008 New Revision: 47872 URL: http://llvm.org/viewvc/llvm-project?rev=47872&view=rev Log: Rename isOperand() to isOperandOf() (and other similar methods). It always confuses me. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=47872&r1=47871&r2=47872&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Mon Mar 3 18:41:45 2008 @@ -825,8 +825,8 @@ return SDOperand(Val, R); } - // isOperand - Return true if this node is an operand of N. - bool isOperand(SDNode *N) const; + // isOperandOf - Return true if this node is an operand of N. + bool isOperandOf(SDNode *N) const; /// getValueType - Return the ValueType of the referenced return value. /// @@ -969,19 +969,19 @@ /// value. This method ignores uses of other values defined by this operation. bool hasAnyUseOfValue(unsigned Value) const; - /// isOnlyUse - Return true if this node is the only use of N. + /// isOnlyUseOf - Return true if this node is the only use of N. /// - bool isOnlyUse(SDNode *N) const; + bool isOnlyUseOf(SDNode *N) const; - /// isOperand - Return true if this node is an operand of N. + /// isOperandOf - Return true if this node is an operand of N. /// - bool isOperand(SDNode *N) const; + bool isOperandOf(SDNode *N) const; - /// isPredecessor - Return true if this node is a predecessor of N. This node - /// is either an operand of N or it can be reached by recursively traversing - /// up the operands. + /// isPredecessorOf - Return true if this node is a predecessor of N. This + /// node is either an operand of N or it can be reached by recursively + /// traversing up the operands. /// NOTE: this is an expensive method. Use it carefully. - bool isPredecessor(SDNode *N) const; + bool isPredecessorOf(SDNode *N) const; /// getNumOperands - Return the number of values used by this operation. /// Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=47872&r1=47871&r2=47872&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Mar 3 18:41:45 2008 @@ -4030,7 +4030,7 @@ // Check #2. if (!isLoad) { SDOperand Val = cast(N)->getValue(); - if (Val == BasePtr || BasePtr.Val->isPredecessor(Val.Val)) + if (Val == BasePtr || BasePtr.Val->isPredecessorOf(Val.Val)) return false; } @@ -4041,7 +4041,7 @@ SDNode *Use = *I; if (Use == N) continue; - if (Use->isPredecessor(N)) + if (Use->isPredecessorOf(N)) return false; if (!((Use->getOpcode() == ISD::LOAD && @@ -4179,7 +4179,7 @@ continue; // Check for #2 - if (!Op->isPredecessor(N) && !N->isPredecessor(Op)) { + if (!Op->isPredecessorOf(N) && !N->isPredecessorOf(Op)) { SDOperand Result = isLoad ? DAG.getIndexedLoad(SDOperand(N,0), BasePtr, Offset, AM) : DAG.getIndexedStore(SDOperand(N,0), BasePtr, Offset, AM); @@ -5008,8 +5008,8 @@ if (TheSelect->getOpcode() == ISD::SELECT) { // Check that the condition doesn't reach either load. If so, folding // this will induce a cycle into the DAG. - if (!LLD->isPredecessor(TheSelect->getOperand(0).Val) && - !RLD->isPredecessor(TheSelect->getOperand(0).Val)) { + if (!LLD->isPredecessorOf(TheSelect->getOperand(0).Val) && + !RLD->isPredecessorOf(TheSelect->getOperand(0).Val)) { Addr = DAG.getNode(ISD::SELECT, LLD->getBasePtr().getValueType(), TheSelect->getOperand(0), LLD->getBasePtr(), RLD->getBasePtr()); @@ -5017,10 +5017,10 @@ } else { // Check that the condition doesn't reach either load. If so, folding // this will induce a cycle into the DAG. - if (!LLD->isPredecessor(TheSelect->getOperand(0).Val) && - !RLD->isPredecessor(TheSelect->getOperand(0).Val) && - !LLD->isPredecessor(TheSelect->getOperand(1).Val) && - !RLD->isPredecessor(TheSelect->getOperand(1).Val)) { + if (!LLD->isPredecessorOf(TheSelect->getOperand(0).Val) && + !RLD->isPredecessorOf(TheSelect->getOperand(0).Val) && + !LLD->isPredecessorOf(TheSelect->getOperand(1).Val) && + !RLD->isPredecessorOf(TheSelect->getOperand(1).Val)) { Addr = DAG.getNode(ISD::SELECT_CC, LLD->getBasePtr().getValueType(), TheSelect->getOperand(0), TheSelect->getOperand(1), Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=47872&r1=47871&r2=47872&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Mon Mar 3 18:41:45 2008 @@ -128,7 +128,7 @@ bool HasFlagUse = false; for (SDNode::use_iterator UI = N->use_begin(), E = N->use_end(); UI != E; ++UI) - if (FlagVal.isOperand(*UI)) { + if (FlagVal.isOperandOf(*UI)) { HasFlagUse = true; NodeSUnit->FlaggedNodes.push_back(N); SUnitMap[N].push_back(NodeSUnit); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=47872&r1=47871&r2=47872&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Mon Mar 3 18:41:45 2008 @@ -472,7 +472,7 @@ I != E; ++I) { if (I->isCtrl) ChainPred = I->Dep; - else if (I->Dep->Node && I->Dep->Node->isOperand(LoadNode)) + else if (I->Dep->Node && I->Dep->Node->isOperandOf(LoadNode)) LoadPreds.push_back(SDep(I->Dep, I->Reg, I->Cost, false, false)); else NodePreds.push_back(SDep(I->Dep, I->Reg, I->Cost, false, false)); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=47872&r1=47871&r2=47872&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Mar 3 18:41:45 2008 @@ -3674,9 +3674,9 @@ } -/// isOnlyUse - Return true if this node is the only use of N. +/// isOnlyUseOf - Return true if this node is the only use of N. /// -bool SDNode::isOnlyUse(SDNode *N) const { +bool SDNode::isOnlyUseOf(SDNode *N) const { bool Seen = false; for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { SDNode *User = *I; @@ -3691,14 +3691,14 @@ /// isOperand - Return true if this node is an operand of N. /// -bool SDOperand::isOperand(SDNode *N) const { +bool SDOperand::isOperandOf(SDNode *N) const { for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) if (*this == N->getOperand(i)) return true; return false; } -bool SDNode::isOperand(SDNode *N) const { +bool SDNode::isOperandOf(SDNode *N) const { for (unsigned i = 0, e = N->NumOperands; i != e; ++i) if (this == N->OperandList[i].Val) return true; @@ -3751,11 +3751,11 @@ } } -/// isPredecessor - Return true if this node is a predecessor of N. This node +/// isPredecessorOf - Return true if this node is a predecessor of N. This node /// is either an operand of N or it can be reached by recursively traversing /// up the operands. /// NOTE: this is an expensive method. Use it carefully. -bool SDNode::isPredecessor(SDNode *N) const { +bool SDNode::isPredecessorOf(SDNode *N) const { SmallPtrSet Visited; bool found = false; findPredecessor(N, this, found, Visited); From isanbard at gmail.com Mon Mar 3 18:47:20 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 3 Mar 2008 16:47:20 -0800 Subject: [llvm-commits] [llvm] r47862 - /llvm/trunk/lib/CodeGen/MachineInstr.cpp In-Reply-To: <4A631404-9AD7-4325-9E66-5C8998C04602@apple.com> References: <200803032214.m23MEXkF014824@zion.cs.uiuc.edu> <16e5fdf90803031522y7cd2c7c9nec7361de750844cf@mail.gmail.com> <72E52E44-C937-44C0-B9B6-5DA66057D71C@apple.com> <3D7E8268-D07B-4EAC-A8CD-BF2C4FEF1CA0@apple.com> <16e5fdf90803031551u70c97d29v174a4fde1286869c@mail.gmail.com> <4A631404-9AD7-4325-9E66-5C8998C04602@apple.com> Message-ID: <16e5fdf90803031647t7d890eeal4626c00f23902123@mail.gmail.com> I meant it in the general case. From what I could gather, the operands are kept in at least two different lists. Anyway, no biggie. -bw On Mon, Mar 3, 2008 at 4:07 PM, Evan Cheng wrote: > Except it's not using an iterator... > > Evan > > > > On Mar 3, 2008, at 3:51 PM, Bill Wendling wrote: > > > On Mon, Mar 3, 2008 at 3:47 PM, Evan Cheng > > wrote: > >> Haven't you heard goto's are evil? :-) > >> > >> I think goto's can be used tastefully. However, it's definitely not > >> the right situation to use it in this case. > >> > > Fair enough. I was 90% sure that that was going to be picked on when I > > submitted it. I did it that way because how the machine operands are > > stored in the machine instruction is non-intuitive and I didn't want > > to make a mistake of having an invalid iterator. :-) > > > > -bw > > > > _______________________________________________ > > llvm-commits mailing list > > llvm-commits at cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From evan.cheng at apple.com Mon Mar 3 18:47:45 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Mar 2008 00:47:45 -0000 Subject: [llvm-commits] [llvm] r47874 - /llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll Message-ID: <200803040047.m240ljlT020156@zion.cs.uiuc.edu> Author: evancheng Date: Mon Mar 3 18:47:45 2008 New Revision: 47874 URL: http://llvm.org/viewvc/llvm-project?rev=47874&view=rev Log: Add PR1501 test case. Added: llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll Added: llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll?rev=47874&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll (added) +++ llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll Mon Mar 3 18:47:45 2008 @@ -0,0 +1,30 @@ +d; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps +; PR1501 + +efine float @foo(i32* %x, float* %y, i32 %c) nounwind { +entry: + %tmp2132 = icmp eq i32 %c, 0 ; [#uses=2] + br i1 %tmp2132, label %bb23, label %bb.preheader + +bb.preheader: ; preds = %entry + %umax = select i1 %tmp2132, i32 1, i32 %c ; [#uses=1] + br label %bb + +bb: ; preds = %bb, %bb.preheader + %i.0.reg2mem.0 = phi i32 [ 0, %bb.preheader ], [ %indvar.next, %bb ] ; [#uses=3] + %res.0.reg2mem.0 = phi float [ 0.000000e+00, %bb.preheader ], [ %tmp14, %bb ] ; [#uses=1] + %tmp3 = getelementptr i32* %x, i32 %i.0.reg2mem.0 ; [#uses=1] + %tmp4 = load i32* %tmp3, align 4 ; [#uses=1] + %tmp45 = sitofp i32 %tmp4 to float ; [#uses=1] + %tmp8 = getelementptr float* %y, i32 %i.0.reg2mem.0 ; [#uses=1] + %tmp9 = load float* %tmp8, align 4 ; [#uses=1] + %tmp11 = mul float %tmp9, %tmp45 ; [#uses=1] + %tmp14 = add float %tmp11, %res.0.reg2mem.0 ; [#uses=2] + %indvar.next = add i32 %i.0.reg2mem.0, 1 ; [#uses=2] + %exitcond = icmp eq i32 %indvar.next, %umax ; [#uses=1] + br i1 %exitcond, label %bb23, label %bb + +bb23: ; preds = %bb, %entry + %res.0.reg2mem.1 = phi float [ 0.000000e+00, %entry ], [ %tmp14, %bb ] ; [#uses=1] + ret float %res.0.reg2mem.1 +} From isanbard at gmail.com Mon Mar 3 18:48:16 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 04 Mar 2008 00:48:16 -0000 Subject: [llvm-commits] [llvm] r47875 - /llvm/trunk/lib/CodeGen/MachineInstr.cpp Message-ID: <200803040048.m240mG5E020178@zion.cs.uiuc.edu> Author: void Date: Mon Mar 3 18:48:15 2008 New Revision: 47875 URL: http://llvm.org/viewvc/llvm-project?rev=47875&view=rev Log: Did I say 'e = getNumOperands()'? I meant --e, of course. Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=47875&r1=47874&r2=47875&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Mon Mar 3 18:48:15 2008 @@ -703,7 +703,7 @@ // "kill". Let the super-register take care of this // information. RemoveOperand(i); - e = getNumOperands(); + --e; continue; } else { // The super-register is going to take care of this kill From evan.cheng at apple.com Mon Mar 3 21:14:39 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Mar 2008 19:14:39 -0800 Subject: [llvm-commits] [llvm] r47798 - in /llvm/trunk/lib: CodeGen/SelectionDAG/LegalizeDAG.cpp Target/X86/X86ISelLowering.cpp Target/X86/X86ISelLowering.h Target/X86/X86InstrInfo.td In-Reply-To: <200803012152.m21LqZx4015849@zion.cs.uiuc.edu> References: <200803012152.m21LqZx4015849@zion.cs.uiuc.edu> Message-ID: <5DE3990E-5E66-4039-AD32-FAA37D1059AD@apple.com> What about i64 ISD::ATOMIC_LCS? Also, there are quite a few 80-col violations in X86InstrInfo.td. Evan On Mar 1, 2008, at 1:52 PM, Andrew Lenharth wrote: > Author: alenhar2 > Date: Sat Mar 1 15:52:34 2008 > New Revision: 47798 > > URL: http://llvm.org/viewvc/llvm-project?rev=47798&view=rev > Log: > all but CAS working on x86 > > Modified: > llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp > llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > llvm/trunk/lib/Target/X86/X86ISelLowering.h > llvm/trunk/lib/Target/X86/X86InstrInfo.td > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47798&r1=47797&r2=47798&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sat Mar 1 > 15:52:34 2008 > @@ -1165,23 +1165,24 @@ > assert(((Node->getNumOperands() == 4 && Node->getOpcode() == > ISD::ATOMIC_LCS) || > (Node->getNumOperands() == 3 && Node->getOpcode() == > ISD::ATOMIC_LAS) || > (Node->getNumOperands() == 3 && Node->getOpcode() == > ISD::ATOMIC_SWAP)) && > - "Invalid MemBarrier node!"); > + "Invalid Atomic node!"); > int num = Node->getOpcode() == ISD::ATOMIC_LCS ? 4 : 3; > - MVT::ValueType VT = Node->getValueType(0); > - switch (TLI.getOperationAction(ISD::ATOMIC_LCS, VT)) { > + SDOperand Ops[4]; > + for (int x = 0; x < num; ++x) > + Ops[x] = LegalizeOp(Node->getOperand(x)); > + Result = DAG.UpdateNodeOperands(Result, &Ops[0], num); > + > + switch (TLI.getOperationAction(Node->getOpcode(), Node- > >getValueType(0))) { > default: assert(0 && "This action is not supported yet!"); > - case TargetLowering::Legal: { > - SDOperand Ops[4]; > - for (int x = 0; x < num; ++x) > - Ops[x] = LegalizeOp(Node->getOperand(x)); > - Result = DAG.UpdateNodeOperands(Result, &Ops[0], num); > - AddLegalizedOperand(SDOperand(Node, 0), Result.getValue(0)); > - AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); > - return Result.getValue(Op.ResNo); > + case TargetLowering::Custom: > + Result = TLI.LowerOperation(Result, DAG); > + break; > + case TargetLowering::Legal: > break; > } > - } > - break; > + AddLegalizedOperand(SDOperand(Node, 0), Result.getValue(0)); > + AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); > + return Result.getValue(Op.ResNo); > } > > case ISD::Constant: { > > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47798&r1=47797&r2=47798&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Mar 1 > 15:52:34 2008 > @@ -283,6 +283,9 @@ > if (!Subtarget->hasSSE2()) > setOperationAction(ISD::MEMBARRIER , MVT::Other, Expand); > > + setOperationAction(ISD::ATOMIC_LCS , MVT::i8, Custom); > + setOperationAction(ISD::ATOMIC_LCS , MVT::i16, Custom); > + setOperationAction(ISD::ATOMIC_LCS , MVT::i32, Custom); > > // Use the default ISD::LOCATION, ISD::DECLARE expansion. > setOperationAction(ISD::LOCATION, MVT::Other, Expand); > @@ -5345,11 +5348,35 @@ > return Op; > } > > +SDOperand X86TargetLowering::LowerCAS(SDOperand Op, SelectionDAG > &DAG) { > + MVT::ValueType T = cast(Op.Val)->getVT(); > + unsigned Reg; > + unsigned size; > + switch(T) { > + case MVT::i8: Reg = X86::AL; size = 1; break; > + case MVT::i16: Reg = X86::AX; size = 2; break; > + case MVT::i32: Reg = X86::EAX; size = 4; break; > + }; > + SDOperand cpIn = DAG.getCopyToReg(Op.getOperand(0), Reg, > + Op.getOperand(2), SDOperand()); > + SDOperand Ops[] = { cpIn.getValue(0), > + Op.getOperand(1), > + Op.getOperand(3), > + DAG.getTargetConstant(size, MVT::i8), > + cpIn.getValue(1) }; > + SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag); > + SDOperand Result = DAG.getNode(X86ISD::LCMPXCHG_DAG, Tys, Ops, 5); > + SDOperand cpOut = > + DAG.getCopyFromReg(Result.getValue(0), Reg, T, > Result.getValue(1)); > + return cpOut; > +} > + > /// LowerOperation - Provide custom lowering hooks for some > operations. > /// > SDOperand X86TargetLowering::LowerOperation(SDOperand Op, > SelectionDAG &DAG) { > switch (Op.getOpcode()) { > default: assert(0 && "Should not custom lower this!"); > + case ISD::ATOMIC_LCS: return LowerCAS(Op,DAG); > case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG); > case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); > case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR_ELT(Op, > DAG); > @@ -5454,6 +5481,7 @@ > case X86ISD::EH_RETURN: return "X86ISD::EH_RETURN"; > case X86ISD::TC_RETURN: return "X86ISD::TC_RETURN"; > case X86ISD::FNSTCW16m: return "X86ISD::FNSTCW16m"; > + case X86ISD::LCMPXCHG_DAG: return "x86ISD::LCMPXCHG_DAG"; > } > } > > > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=47798&r1=47797&r2=47798&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Sat Mar 1 15:52:34 > 2008 > @@ -208,6 +208,9 @@ > // operand #3 optional in flag > TC_RETURN, > > + // compare and swap > + LCMPXCHG_DAG, > + > // Store FP control world into i16 memory > FNSTCW16m > }; > @@ -540,6 +543,7 @@ > SDOperand LowerFLT_ROUNDS_(SDOperand Op, SelectionDAG &DAG); > SDOperand LowerCTLZ(SDOperand Op, SelectionDAG &DAG); > SDOperand LowerCTTZ(SDOperand Op, SelectionDAG &DAG); > + SDOperand LowerCAS(SDOperand Op, SelectionDAG &DAG); > SDNode *ExpandFP_TO_SINT(SDNode *N, SelectionDAG &DAG); > SDNode *ExpandREADCYCLECOUNTER(SDNode *N, SelectionDAG &DAG); > }; > > Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=47798&r1=47797&r2=47798&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) > +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Sat Mar 1 15:52:34 2008 > @@ -35,6 +35,9 @@ > [SDTCisVT<0, i8>, > SDTCisVT<1, i8>, SDTCisVT<2, > i32>]>; > > +def SDTX86cas : SDTypeProfile<0, 3, [SDTCisPtrTy<0>, SDTCisInt<1>, > + SDTCisVT<2, i8>]>; > + > def SDTX86Ret : SDTypeProfile<0, 1, [SDTCisVT<0, i16>]>; > > def SDT_X86CallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i32> ]>; > @@ -69,6 +72,10 @@ > [SDNPHasChain]>; > def X86setcc : SDNode<"X86ISD::SETCC", SDTX86SetCC>; > > +def X86cas : SDNode<"X86ISD::LCMPXCHG_DAG", SDTX86cas, > + [SDNPHasChain, SDNPInFlag, SDNPOutFlag, > SDNPMayStore, > + SDNPMayLoad]>; > + > def X86retflag : SDNode<"X86ISD::RET_FLAG", SDTX86Ret, > [SDNPHasChain, SDNPOptInFlag]>; > > @@ -2539,28 +2546,29 @@ > // Atomic support > // > > -//FIXME: Please check the format > - > -let Defs = [EAX], Uses = [EAX] in { > -def CMPXCHG32 : I<0xB1, Pseudo, (outs), (ins GR32:$ptr, GR32:$swap), > - "cmpxchgl $swap,($ptr)", []>, TB; > -def LCMPXCHG32 : I<0xB1, Pseudo, (outs), (ins GR32:$ptr, GR32:$swap), > - "lock cmpxchgl $swap,($ptr)", []>, TB, LOCK; > +//FIXME: Please check the format Pseudo is certainly wrong, but the > opcode and > +// prefixes should be correct > +let Defs = [EAX, EFLAGS], Uses = [EAX] in { > +def CMPXCHG32 : I<0xB1, Pseudo, (outs), (ins i32mem:$ptr, > GR32:$swap), > + "cmpxchgl $swap,$ptr", []>, TB; > +def LCMPXCHG32 : I<0xB1, Pseudo, (outs), (ins i32mem:$ptr, > GR32:$swap), > + "lock cmpxchgl $swap,$ptr", [(X86cas addr:$ptr, > GR32:$swap, 4)]>, TB, LOCK; > } > -let Defs = [AX], Uses = [AX] in { > -def CMPXCHG16 : I<0xB1, Pseudo, (outs), (ins GR32:$ptr, GR16:$swap), > + > +let Defs = [AX, EFLAGS], Uses = [AX] in { > +def CMPXCHG16 : I<0xB1, Pseudo, (outs), (ins i16mem:$ptr, > GR16:$swap), > "cmpxchgw $swap,($ptr)", []>, TB, OpSize; > -def LCMPXCHG16 : I<0xB1, Pseudo, (outs), (ins GR32:$ptr, GR16:$swap), > - "cmpxchgw $swap,($ptr)", []>, TB, OpSize, LOCK; > +def LCMPXCHG16 : I<0xB1, Pseudo, (outs), (ins i16mem:$ptr, > GR16:$swap), > + "lock cmpxchgw $swap,$ptr", [(X86cas addr:$ptr, > GR16:$swap, 2)]>, TB, OpSize, LOCK; > } > -let Defs = [AL], Uses = [AL] in { > -def CMPXCHG8 : I<0xB0, Pseudo, (outs), (ins GR32:$ptr, GR8:$swap), > +let Defs = [AL, EFLAGS], Uses = [AL] in { > +def CMPXCHG8 : I<0xB0, Pseudo, (outs), (ins i8mem:$ptr, GR8:$swap), > "cmpxchgb $swap,($ptr)", []>, TB; > -def LCMPXCHG8 : I<0xB0, Pseudo, (outs), (ins GR32:$ptr, GR8:$swap), > - "cmpxchgb $swap,($ptr)", []>, TB, LOCK; > +def LCMPXCHG8 : I<0xB0, Pseudo, (outs), (ins i8mem:$ptr, GR8:$swap), > + "lock cmpxchgb $swap,$ptr", [(X86cas addr:$ptr, > GR8:$swap, 1)]>, TB, LOCK; > } > > -let Constraints = "$val = $dst" in { > +let Constraints = "$val = $dst", Defs = [EFLAGS] in { > def LXADD32 : I<0xC1, Pseudo, (outs GR32:$dst), (ins i32mem:$ptr, > GR32:$val), > "lock xadd $val, $ptr", > [(set GR32:$dst, (atomic_las_32 addr:$ptr, > GR32:$val))]>, > @@ -2598,23 +2606,6 @@ > "lock xchg $val, $ptr", []>; > } > > -//FIXME: these are a hack until the patterns using the LCMPXCHG > written > -let Defs = [EAX], Uses = [EAX] in > -def PLCMPXCHG32 : I<0, Pseudo, (outs GR32:$dst), > - (ins i32mem:$ptr, GR32:$cmp, GR32:$swap), > - "movl $cmp, %eax \n lock \n cmpxchgl $swap,$ptr > \n movl %eax, $dst", > - [(set GR32:$dst, (atomic_lcs_32 addr:$ptr, > GR32:$cmp, GR32:$swap))]>; > -let Defs = [AX] in > -def PLCMPXCHG16 : I<0, Pseudo, (outs GR16:$dst), > - (ins i16mem:$ptr, GR16:$cmp, GR16:$swap), > - "movw $cmp, %ax \n lock \n cmpxchgw $swap,$ptr \n > movw %ax, $dst", > - [(set GR16:$dst, (atomic_lcs_16 addr:$ptr, > GR16:$cmp, GR16:$swap))]>; > -let Defs = [AL] in > -def PLCMPXCHG8 : I<0, Pseudo, (outs GR8:$dst), > - (ins i8mem:$ptr, GR8:$cmp, GR8:$swap), > - "movb $cmp, %al \n lock cmpxchgb $swap,$ptr \n > movb %al, $dst", > - [(set GR8:$dst, (atomic_lcs_8 addr:$ptr, > GR8:$cmp, GR8:$swap))]>; > - > // > = > = > = > ----------------------------------------------------------------------= > ==// > // Non-Instruction Patterns > // > = > = > = > ----------------------------------------------------------------------= > ==// > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Mon Mar 3 21:19:19 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Mar 2008 03:19:19 -0000 Subject: [llvm-commits] [llvm] r47877 - /llvm/trunk/include/llvm/Intrinsics.td Message-ID: <200803040319.m243JJ7O025171@zion.cs.uiuc.edu> Author: evancheng Date: Mon Mar 3 21:19:19 2008 New Revision: 47877 URL: http://llvm.org/viewvc/llvm-project?rev=47877&view=rev Log: Fix 80 column violations. Modified: llvm/trunk/include/llvm/Intrinsics.td Modified: llvm/trunk/include/llvm/Intrinsics.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Intrinsics.td?rev=47877&r1=47876&r2=47877&view=diff ============================================================================== --- llvm/trunk/include/llvm/Intrinsics.td (original) +++ llvm/trunk/include/llvm/Intrinsics.td Mon Mar 3 21:19:19 2008 @@ -265,18 +265,23 @@ //===------------------------- Atomic Intrinsics --------------------------===// // def int_memory_barrier : Intrinsic<[llvm_void_ty, llvm_i1_ty, llvm_i1_ty, - llvm_i1_ty, llvm_i1_ty, llvm_i1_ty], []>; + llvm_i1_ty, llvm_i1_ty, llvm_i1_ty], []>; -def int_atomic_lcs : Intrinsic<[llvm_anyint_ty, LLVMPointerType>, +def int_atomic_lcs : Intrinsic<[llvm_anyint_ty, + LLVMPointerType>, LLVMMatchType<0>, LLVMMatchType<0>], - [IntrWriteArgMem]>, GCCBuiltin<"__sync_val_compare_and_swap">; -def int_atomic_las : Intrinsic<[llvm_anyint_ty, LLVMPointerType>, + [IntrWriteArgMem]>, + GCCBuiltin<"__sync_val_compare_and_swap">; +def int_atomic_las : Intrinsic<[llvm_anyint_ty, + LLVMPointerType>, LLVMMatchType<0>], - [IntrWriteArgMem]>, GCCBuiltin<"__sync_fetch_and_add">; -def int_atomic_swap : Intrinsic<[llvm_anyint_ty, LLVMPointerType>, + [IntrWriteArgMem]>, + GCCBuiltin<"__sync_fetch_and_add">; +def int_atomic_swap : Intrinsic<[llvm_anyint_ty, + LLVMPointerType>, LLVMMatchType<0>], - [IntrWriteArgMem]>, GCCBuiltin<"__sync_lock_test_and_set">; - + [IntrWriteArgMem]>, + GCCBuiltin<"__sync_lock_test_and_set">; //===-------------------------- Other Intrinsics --------------------------===// // From evan.cheng at apple.com Mon Mar 3 21:20:06 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Mar 2008 03:20:06 -0000 Subject: [llvm-commits] [llvm] r47878 - /llvm/trunk/lib/Target/X86/X86InstrInfo.td Message-ID: <200803040320.m243K6XD025214@zion.cs.uiuc.edu> Author: evancheng Date: Mon Mar 3 21:20:06 2008 New Revision: 47878 URL: http://llvm.org/viewvc/llvm-project?rev=47878&view=rev Log: 80 column violations. Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=47878&r1=47877&r2=47878&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Mon Mar 3 21:20:06 2008 @@ -2553,20 +2553,23 @@ def CMPXCHG32 : I<0xB1, Pseudo, (outs), (ins i32mem:$ptr, GR32:$swap), "cmpxchgl $swap,$ptr", []>, TB; def LCMPXCHG32 : I<0xB1, Pseudo, (outs), (ins i32mem:$ptr, GR32:$swap), - "lock cmpxchgl $swap,$ptr", [(X86cas addr:$ptr, GR32:$swap, 4)]>, TB, LOCK; + "lock cmpxchgl $swap,$ptr", + [(X86cas addr:$ptr, GR32:$swap, 4)]>, TB, LOCK; } let Defs = [AX, EFLAGS], Uses = [AX] in { def CMPXCHG16 : I<0xB1, Pseudo, (outs), (ins i16mem:$ptr, GR16:$swap), "cmpxchgw $swap,($ptr)", []>, TB, OpSize; def LCMPXCHG16 : I<0xB1, Pseudo, (outs), (ins i16mem:$ptr, GR16:$swap), - "lock cmpxchgw $swap,$ptr", [(X86cas addr:$ptr, GR16:$swap, 2)]>, TB, OpSize, LOCK; + "lock cmpxchgw $swap,$ptr", + [(X86cas addr:$ptr, GR16:$swap, 2)]>, TB, OpSize, LOCK; } let Defs = [AL, EFLAGS], Uses = [AL] in { def CMPXCHG8 : I<0xB0, Pseudo, (outs), (ins i8mem:$ptr, GR8:$swap), "cmpxchgb $swap,($ptr)", []>, TB; def LCMPXCHG8 : I<0xB0, Pseudo, (outs), (ins i8mem:$ptr, GR8:$swap), - "lock cmpxchgb $swap,$ptr", [(X86cas addr:$ptr, GR8:$swap, 1)]>, TB, LOCK; + "lock cmpxchgb $swap,$ptr", + [(X86cas addr:$ptr, GR8:$swap, 1)]>, TB, LOCK; } let Constraints = "$val = $dst", Defs = [EFLAGS] in { From evan.cheng at apple.com Mon Mar 3 21:24:24 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Mar 2008 19:24:24 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r47801 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <200803012336.m21NaM6B018640@zion.cs.uiuc.edu> References: <200803012336.m21NaM6B018640@zion.cs.uiuc.edu> Message-ID: <8EDB1B64-6A30-433B-A606-D108BD0C9B7E@apple.com> This breaks x86-64. libgomp/critical compiles to: define void @GOMP_critical_name_start(i8** %pptr) nounwind { entry: ... tail call i64 @llvm.atomic.lcs.i64( i8** %pptr, i64 0, i64 %tmp1314 ) ; :0 [#uses=1] ... ret void } Evan On Mar 1, 2008, at 3:36 PM, Andrew Lenharth wrote: > Author: alenhar2 > Date: Sat Mar 1 17:36:21 2008 > New Revision: 47801 > > URL: http://llvm.org/viewvc/llvm-project?rev=47801&view=rev > Log: > turn on some atomics for a couple platforms > > Modified: > llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > > Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47801&r1=47800&r2=47801&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) > +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Sat Mar 1 17:36:21 2008 > @@ -4294,7 +4294,7 @@ > C, C + 5); > return true; > } > -#if 0 //FIXME: these break the build for backends that haven't > implemented them > +#if defined(TARGET_386) || defined(TARGET_ALPHA) > //gcc uses many names for the sync intrinsics > case BUILT_IN_VAL_COMPARE_AND_SWAP_1: > case BUILT_IN_VAL_COMPARE_AND_SWAP_2: > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Mon Mar 3 21:25:16 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Mar 2008 03:25:16 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47879 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200803040325.m243PGJ2025366@zion.cs.uiuc.edu> Author: evancheng Date: Mon Mar 3 21:25:15 2008 New Revision: 47879 URL: http://llvm.org/viewvc/llvm-project?rev=47879&view=rev Log: Unbreak x86-64 build. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47879&r1=47878&r2=47879&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Mar 3 21:25:15 2008 @@ -4294,7 +4294,7 @@ C, C + 5); return true; } -#if defined(TARGET_386) || defined(TARGET_ALPHA) +#if defined(TARGET_ALPHA) //gcc uses many names for the sync intrinsics case BUILT_IN_VAL_COMPARE_AND_SWAP_1: case BUILT_IN_VAL_COMPARE_AND_SWAP_2: From evan.cheng at apple.com Tue Mar 4 01:59:15 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Mar 2008 07:59:15 -0000 Subject: [llvm-commits] [llvm] r47881 - /llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll Message-ID: <200803040759.m247xFII000711@zion.cs.uiuc.edu> Author: evancheng Date: Tue Mar 4 01:59:13 2008 New Revision: 47881 URL: http://llvm.org/viewvc/llvm-project?rev=47881&view=rev Log: Fix broken test. Modified: llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll Modified: llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll?rev=47881&r1=47880&r2=47881&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll (original) +++ llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll Tue Mar 4 01:59:13 2008 @@ -1,4 +1,4 @@ -d; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps ; PR1501 efine float @foo(i32* %x, float* %y, i32 %c) nounwind { From evan.cheng at apple.com Tue Mar 4 02:01:56 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Mar 2008 08:01:56 -0000 Subject: [llvm-commits] [llvm] r47882 - /llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll Message-ID: <200803040801.m2481u3w000813@zion.cs.uiuc.edu> Author: evancheng Date: Tue Mar 4 02:01:56 2008 New Revision: 47882 URL: http://llvm.org/viewvc/llvm-project?rev=47882&view=rev Log: Really fix the test. Modified: llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll Modified: llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll?rev=47882&r1=47881&r2=47882&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll (original) +++ llvm/trunk/test/CodeGen/X86/coalescer-commute4.ll Tue Mar 4 02:01:56 2008 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps ; PR1501 -efine float @foo(i32* %x, float* %y, i32 %c) nounwind { +define float @foo(i32* %x, float* %y, i32 %c) nounwind { entry: %tmp2132 = icmp eq i32 %c, 0 ; [#uses=2] br i1 %tmp2132, label %bb23, label %bb.preheader From evan.cheng at apple.com Tue Mar 4 02:05:30 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Mar 2008 08:05:30 -0000 Subject: [llvm-commits] [llvm] r47883 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200803040805.m2485Uhk000936@zion.cs.uiuc.edu> Author: evancheng Date: Tue Mar 4 02:05:30 2008 New Revision: 47883 URL: http://llvm.org/viewvc/llvm-project?rev=47883&view=rev Log: Refactor ExpandConstantFP so it can optimize load from constpool of types larger than f64 into extload from smaller types. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47883&r1=47882&r2=47883&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Mar 4 02:05:30 2008 @@ -488,34 +488,37 @@ // the constant pool as a float, even if it's is statically typed as a // double. MVT::ValueType VT = CFP->getValueType(0); - bool isDouble = VT == MVT::f64; ConstantFP *LLVMC = ConstantFP::get(MVT::getTypeForValueType(VT), CFP->getValueAPF()); if (!UseCP) { if (VT!=MVT::f64 && VT!=MVT::f32) assert(0 && "Invalid type expansion"); return DAG.getConstant(LLVMC->getValueAPF().convertToAPInt().getZExtValue(), - isDouble ? MVT::i64 : MVT::i32); + (VT == MVT::f64) ? MVT::i64 : MVT::i32); } - if (isDouble && CFP->isValueValidForType(MVT::f32, CFP->getValueAPF()) && - // Only do this if the target has a native EXTLOAD instruction from f32. - // Do not try to be clever about long doubles (so far) - TLI.isLoadXLegal(ISD::EXTLOAD, MVT::f32)) { - LLVMC = cast(ConstantExpr::getFPTrunc(LLVMC,Type::FloatTy)); - VT = MVT::f32; - Extend = true; + MVT::ValueType OrigVT = VT; + MVT::ValueType SVT = VT; + while (SVT != MVT::f32) { + SVT = (unsigned)SVT - 1; + if (CFP->isValueValidForType(SVT, CFP->getValueAPF()) && + // Only do this if the target has a native EXTLOAD instruction from + // smaller type. + TLI.isLoadXLegal(ISD::EXTLOAD, SVT)) { + const Type *SType = MVT::getTypeForValueType(SVT); + LLVMC = cast(ConstantExpr::getFPTrunc(LLVMC, SType)); + VT = SVT; + Extend = true; + } } SDOperand CPIdx = DAG.getConstantPool(LLVMC, TLI.getPointerTy()); - if (Extend) { - return DAG.getExtLoad(ISD::EXTLOAD, MVT::f64, DAG.getEntryNode(), + if (Extend) + return DAG.getExtLoad(ISD::EXTLOAD, OrigVT, DAG.getEntryNode(), CPIdx, PseudoSourceValue::getConstantPool(), - 0, MVT::f32); - } else { - return DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, - PseudoSourceValue::getConstantPool(), 0); - } + 0, VT); + return DAG.getLoad(OrigVT, DAG.getEntryNode(), CPIdx, + PseudoSourceValue::getConstantPool(), 0); } From romix.llvm at googlemail.com Tue Mar 4 05:19:45 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Tue, 04 Mar 2008 11:19:45 -0000 Subject: [llvm-commits] [llvm] r47884 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Message-ID: <200803041119.m24BJj4H018854@zion.cs.uiuc.edu> Author: romix Date: Tue Mar 4 05:19:43 2008 New Revision: 47884 URL: http://llvm.org/viewvc/llvm-project?rev=47884&view=rev Log: Some improvements related to the computation of heights, depths of SUnits. The basic idea is that all these algorithms are computing the longest paths from the root node or to the exit node. Therefore the existing implementation that uses and iterative and potentially exponential algorithm was changed to a well-known graph algorithm based on dynamic programming. It has a linear run-time. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=47884&r1=47883&r2=47884&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Tue Mar 4 05:19:43 2008 @@ -232,39 +232,111 @@ } } +/// CalculateDepths - compute depths using algorithms for the longest +/// paths in the DAG void ScheduleDAG::CalculateDepths() { - std::vector > WorkList; - for (unsigned i = 0, e = SUnits.size(); i != e; ++i) - if (SUnits[i].Preds.empty()) - WorkList.push_back(std::make_pair(&SUnits[i], 0U)); + unsigned DAGSize = SUnits.size(); + std::vector InDegree(DAGSize); + std::vector WorkList; + WorkList.reserve(DAGSize); + + // Initialize the data structures + for (unsigned i = 0, e = DAGSize; i != e; ++i) { + SUnit *SU = &SUnits[i]; + int NodeNum = SU->NodeNum; + unsigned Degree = SU->Preds.size(); + InDegree[NodeNum] = Degree; + SU->Depth = 0; + + // Is it a node without dependencies? + if (Degree == 0) { + assert(SU->Preds.empty() && "SUnit should have no predecessors"); + // Collect leaf nodes + WorkList.push_back(SU); + } + } + // Process nodes in the topological order while (!WorkList.empty()) { - SUnit *SU = WorkList.back().first; - unsigned Depth = WorkList.back().second; + SUnit *SU = WorkList.back(); WorkList.pop_back(); - if (SU->Depth == 0 || Depth > SU->Depth) { - SU->Depth = Depth; - for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); - I != E; ++I) - WorkList.push_back(std::make_pair(I->Dep, Depth+1)); + unsigned &SUDepth = SU->Depth; + + // Use dynamic programming: + // When current node is being processed, all of its dependencies + // are already processed. + // So, just iterate over all predecessors and take the longest path + for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); + I != E; ++I) { + unsigned PredDepth = I->Dep->Depth; + if (PredDepth+1 > SUDepth) { + SUDepth = PredDepth + 1; + } + } + + // Update InDegrees of all nodes depending on current SUnit + for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); + I != E; ++I) { + SUnit *SU = I->Dep; + if (!--InDegree[SU->NodeNum]) + // If all dependencies of the node are processed already, + // then the longest path for the node can be computed now + WorkList.push_back(SU); } } } +/// CalculateHeights - compute heights using algorithms for the longest +/// paths in the DAG void ScheduleDAG::CalculateHeights() { - std::vector > WorkList; - SUnit *Root = SUnitMap[DAG.getRoot().Val].front(); - WorkList.push_back(std::make_pair(Root, 0U)); + unsigned DAGSize = SUnits.size(); + std::vector InDegree(DAGSize); + std::vector WorkList; + WorkList.reserve(DAGSize); + + // Initialize the data structures + for (unsigned i = 0, e = DAGSize; i != e; ++i) { + SUnit *SU = &SUnits[i]; + int NodeNum = SU->NodeNum; + unsigned Degree = SU->Succs.size(); + InDegree[NodeNum] = Degree; + SU->Height = 0; + + // Is it a node without dependencies? + if (Degree == 0) { + assert(SU->Succs.empty() && "Something wrong"); + assert(WorkList.empty() && "Should be empty"); + // Collect leaf nodes + WorkList.push_back(SU); + } + } + // Process nodes in the topological order while (!WorkList.empty()) { - SUnit *SU = WorkList.back().first; - unsigned Height = WorkList.back().second; + SUnit *SU = WorkList.back(); WorkList.pop_back(); - if (SU->Height == 0 || Height > SU->Height) { - SU->Height = Height; - for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); - I != E; ++I) - WorkList.push_back(std::make_pair(I->Dep, Height+1)); + unsigned &SUHeight = SU->Height; + + // Use dynamic programming: + // When current node is being processed, all of its dependencies + // are already processed. + // So, just iterate over all successors and take the longest path + for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); + I != E; ++I) { + unsigned SuccHeight = I->Dep->Height; + if (SuccHeight+1 > SUHeight) { + SUHeight = SuccHeight + 1; + } + } + + // Update InDegrees of all nodes depending on current SUnit + for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); + I != E; ++I) { + SUnit *SU = I->Dep; + if (!--InDegree[SU->NodeNum]) + // If all dependencies of the node are processed already, + // then the longest path for the node can be computed now + WorkList.push_back(SU); } } } From romix.llvm at googlemail.com Tue Mar 4 05:44:49 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Tue, 4 Mar 2008 12:44:49 +0100 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <522BCA72-6445-4857-BE7B-019B841AA9DB@apple.com> Message-ID: Hi, 2008/3/3, Dan Gohman : > > On Mar 3, 2008, at 1:31 PM, Chris Lattner wrote: > > > On Mar 3, 2008, at 1:26 PM, Evan Cheng wrote: > >> Thanks. > >> > >> Using std::set<> makes me queasy. :-) Too bad it doesn't seem > >> possible to use SmallPtrSet (elements are not in sorted order). > > > > I'm sad to say that std::set is probably the best thing we have right > > now that provides priority queue + removal from the middle support. > > > > There's make_heap/push_heap/etc. in that let a > plain std::vector (or a SmallVector I guess) be used as a heap. Yes, this is possible but produces much more overhead than std::set on my tests. BTW, this approach is used in DAGISel.inc files generated by tablegen. I tried to changed it to std::set as well and ,again, it works much (25%-30%) faster on BBs with few hundreds or thousends instructions. I'd like to understand better why Evan and Chris are some much against std::set? From some mails I got the impression that std::set implementation is very inefficient on Darwin or PowerPC? Is it correct? Or do you dislike that fact that std::set uses dynamic memory allocation extensively? > > Does anyone know of a better data structure to implement these > > operations? Even if you don't volunteer to implement it, we can add > > it to the open projects page. In principle, we need something like a balanced tree. And since we want to be able to remove from the middle, I'd say that it should not be mapped to something linear like std::vector, as it is done by make_heap, since it involves quite some overhead and a lot of copying around. Finding/creating a tree implementation is not such a big deal. But again, why it would be better than std::set, that anyway seems to be implemented internally as a read-black tree? To conclude: Guys, I'm still waiting for a review and approval of the two pending patches for ScheduleDAGList and ScheduleDAGRRList. Both of them use std::set approach among other things. - Roman From romix.llvm at googlemail.com Tue Mar 4 05:56:44 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Tue, 4 Mar 2008 12:56:44 +0100 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <200803031053.00270.dag@cray.com> Message-ID: Hi, 2008/3/3, Tanya Lattner : > Please review and test, if possible. I have problems with running the > llvm-test test-suite. When I to run it (and keep in mind, I never did > it before), I always get the following error messages on my X86/Ubuntu > system: > make[4]: *** No rule to make target > `Output/sse.expandfft.linked.rbc', needed > by > `Output/sse.expandfft.linked.bc'. > Stop. > > Please keep in mind that all proposed patches should have been tested before > submitting. This includes llvm-test and 'make check'. > http://llvm.org/docs/DeveloperPolicy.html#quality Sure! > This will make Evan's job easier ;) > > As for the error in llvm-test that you are seeing, can you use 'make > VERBOSE=1 TEST=nightly report' and post more details on what make is > running? It looks like an error in configuration. Did you reconfigure once > you set llvm-gcc path? Thanks for the advice, Tanya. OK. Here is what I did: First I reconfigured: ../../../llvm/projects/llvm-test/configure --with-llvmgccdir=/opt/llvm-gcc Than I execute 'make VERBOSE=1 TEST=nightly report' and get the following: make[1]: Entering directory `/opt/llvm.build/projects/llvm-test' if [ ! -f SingleSource/Makefile ]; \ then \ /opt/llvm/autoconf/mkinstalldirs SingleSource; \ cp /opt/llvm/projects/llvm-test/SingleSource/Makefile SingleSource/Makefile; \ fi; \ make -C SingleSource test -w make[2]: Entering directory `/opt/llvm.build/projects/llvm-test/SingleSource' if [ ! -f UnitTests/Makefile ]; \ then \ /opt/llvm/autoconf/mkinstalldirs UnitTests; \ cp /opt/llvm/projects/llvm-test/SingleSource/UnitTests/Makefile UnitTests/Makefile; \ fi; \ make -C UnitTests test -w make[3]: Entering directory `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests' for dir in Vector SignlessTypes Threads; do \ if [ ! -f $dir/Makefile ]; \ then \ /opt/llvm/autoconf/mkinstalldirs $dir; \ cp /opt/llvm/projects/llvm-test/SingleSource/UnitTests/$dir/Makefile $dir/Makefile; \ fi; \ (make -C $dir test -w) || exit 1; \ done make[4]: Entering directory `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests/Vector' for dir in SSE; do \ if [ ! -f $dir/Makefile ]; \ then \ /opt/llvm/autoconf/mkinstalldirs $dir; \ cp /opt/llvm/projects/llvm-test/SingleSource/UnitTests/Vector/$dir/Makefile $dir/Makefile; \ fi; \ (make -C $dir test -w) || exit 1; \ done make[5]: Entering directory `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests/Vector/SSE' make[5]: *** No rule to make target `Output/sse.expandfft.linked.rbc', needed by `Output/sse.expandfft.linked.bc'. Stop. make[5]: Leaving directory `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests/Vector/SSE' make[4]: *** [test] Error 1 make[4]: Leaving directory `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests/Vector' make[3]: *** [test] Error 1 make[3]: Leaving directory `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests' make[2]: *** [UnitTests/.maketest] Error 2 make[2]: Leaving directory `/opt/llvm.build/projects/llvm-test/SingleSource' make[1]: *** [SingleSource/.maketest] Error 2 make[1]: Leaving directory `/opt/llvm.build/projects/llvm-test' Any ideas about what I'm doing wrong? Thanks, Roman From zhousheng00 at gmail.com Tue Mar 4 07:44:11 2008 From: zhousheng00 at gmail.com (Zhou Sheng) Date: Tue, 4 Mar 2008 21:44:11 +0800 Subject: [llvm-commits] [test-suite] r47846 - /test-suite/trunk/RunSafely.sh Message-ID: <8abe0dc60803040544o77e1b354p3caa09daa7909ea8@mail.gmail.com> Hi, > @@ -99,7 +99,7 @@ > # necessary I/O redirection. > # > PWD=`pwd` > -COMMAND="$PROGRAM $*" > +COMMAND="$PWD/$PROGRAM $*" This is incorrect when PROGRAM=/xxx/bin/lli > if [ "$SYSTEM" = "Darwin" ]; then > COMMAND="${DIR}TimedExec.sh $ULIMIT $PWD $COMMAND" > fi -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080304/3f9e084c/attachment.html From lauro.venancio at gmail.com Tue Mar 4 08:38:02 2008 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Tue, 04 Mar 2008 14:38:02 -0000 Subject: [llvm-commits] [test-suite] r47885 - /test-suite/trunk/RunSafely.sh Message-ID: <200803041438.m24Ec2Nn024648@zion.cs.uiuc.edu> Author: laurov Date: Tue Mar 4 08:38:01 2008 New Revision: 47885 URL: http://llvm.org/viewvc/llvm-project?rev=47885&view=rev Log: Fix JIT tests. Modified: test-suite/trunk/RunSafely.sh Modified: test-suite/trunk/RunSafely.sh URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/RunSafely.sh?rev=47885&r1=47884&r2=47885&view=diff ============================================================================== --- test-suite/trunk/RunSafely.sh (original) +++ test-suite/trunk/RunSafely.sh Tue Mar 4 08:38:01 2008 @@ -99,17 +99,11 @@ # necessary I/O redirection. # PWD=`pwd` -COMMAND="$PWD/$PROGRAM $*" +COMMAND="$PROGRAM $*" if [ "$SYSTEM" = "Darwin" ]; then COMMAND="${DIR}TimedExec.sh $ULIMIT $PWD $COMMAND" fi -rm -f "$PWD/${PROGRAM}.command" -rm -f "$PWD/${PROGRAM}.remote" -rm -f "$PWD/${PROGRAM}.remote.time" -echo "$ULIMITCMD (time -p ($COMMAND > $PWD/$OUTFILE.remote 2>&1 < $INFILE;); echo exit $?) > $PWD/$OUTFILE.remote.time 2>&1" > "$PWD/${PROGRAM}.command" -chmod +x "$PWD/${PROGRAM}.command" - if [ "x$RHOST" = x ] ; then ( sh -c "$ULIMITCMD"; time -p sh -c "$COMMAND >$OUTFILE 2>&1 < $INFILE" ; echo exit $? ) 2>&1 \ | awk -- '\ @@ -119,6 +113,12 @@ !/^user/ && !/^sys/ { print; } END { printf("program %f\n", cpu); }' > $OUTFILE.time else + rm -f "$PWD/${PROGRAM}.command" + rm -f "$PWD/${PROGRAM}.remote" + rm -f "$PWD/${PROGRAM}.remote.time" + echo "$ULIMITCMD cd $PWD; (time -p ($COMMAND > $OUTFILE.remote 2>&1 < $INFILE;); echo exit $?) > $OUTFILE.remote.time 2>&1" > "$PWD/${PROGRAM}.command" + chmod +x "$PWD/${PROGRAM}.command" + ( rsh -l $RUSER $RHOST "ls $PWD/${PROGRAM}.command" ) > /dev/null 2>&1 ( rsh -l $RUSER $RHOST "$PWD/${PROGRAM}.command" ) cat $OUTFILE.remote.time | awk -- '\ From gordonhenriksen at mac.com Tue Mar 4 08:52:05 2008 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Tue, 04 Mar 2008 14:52:05 -0000 Subject: [llvm-commits] [llvm] r47886 - /llvm/trunk/bindings/ocaml/Makefile.ocaml Message-ID: <200803041452.m24Eq5Ou025079@zion.cs.uiuc.edu> Author: gordon Date: Tue Mar 4 08:52:05 2008 New Revision: 47886 URL: http://llvm.org/viewvc/llvm-project?rev=47886&view=rev Log: Fix a typo noticed by Erick Tryzelaar, Modified: llvm/trunk/bindings/ocaml/Makefile.ocaml Modified: llvm/trunk/bindings/ocaml/Makefile.ocaml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/Makefile.ocaml?rev=47886&r1=47885&r2=47886&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/Makefile.ocaml (original) +++ llvm/trunk/bindings/ocaml/Makefile.ocaml Tue Mar 4 08:52:05 2008 @@ -98,7 +98,7 @@ $(ObjDir)/$(LIBRARYNAME).ocamldep: $(OcamlSources) $(OcamlHeaders) \ $(OcamlDir)/.dir $(ObjDir)/.dir - $(Verb) $(OCAMLDEP) $(OCAMLCFLAGS) $(OcamlSources) $(OcamlHeader) > $@ + $(Verb) $(OCAMLDEP) $(OCAMLCFLAGS) $(OcamlSources) $(OcamlHeaders) > $@ $(ObjectsCMI): $(UsedOcamlInterfaces:%=$(OcamlDir)/%.cmi) From alenhar2 at cs.uiuc.edu Tue Mar 4 09:23:05 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Tue, 04 Mar 2008 15:23:05 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47887 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200803041523.m24FN5K1026265@zion.cs.uiuc.edu> Author: alenhar2 Date: Tue Mar 4 09:23:05 2008 New Revision: 47887 URL: http://llvm.org/viewvc/llvm-project?rev=47887&view=rev Log: Use type of first arg rather than return type for picking intrinsic. fixes PR2119 Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47887&r1=47886&r2=47887&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Mar 4 09:23:05 2008 @@ -4306,13 +4306,13 @@ case BUILT_IN_BOOL_COMPARE_AND_SWAP_4: case BUILT_IN_BOOL_COMPARE_AND_SWAP_8: case BUILT_IN_BOOL_COMPARE_AND_SWAP_16: { - const Type *Ty = ConvertType(TREE_TYPE(exp)); tree arglist = TREE_OPERAND(exp, 1); Value* C[3] = { Emit(TREE_VALUE(arglist), 0), Emit(TREE_VALUE(TREE_CHAIN(arglist)), 0), Emit(TREE_VALUE(TREE_CHAIN(TREE_CHAIN(arglist))), 0) }; + const Type *Ty = cast(C[0]->getType())->getElementType(); if (C[1]->getType() != Ty) C[1] = Builder.CreateIntCast(C[1], Ty, "cast"); if (C[2]->getType() != Ty) From evan.cheng at apple.com Tue Mar 4 11:30:49 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 4 Mar 2008 09:30:49 -0800 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <522BCA72-6445-4857-BE7B-019B841AA9DB@apple.com> Message-ID: <2DFEE2ED-2D57-4310-8F6C-1B08F18D4363@apple.com> On Mar 4, 2008, at 3:44 AM, Roman Levenstein wrote: > Hi, > > 2008/3/3, Dan Gohman : >> >> On Mar 3, 2008, at 1:31 PM, Chris Lattner wrote: >> >>> On Mar 3, 2008, at 1:26 PM, Evan Cheng wrote: >>>> Thanks. >>>> >>>> Using std::set<> makes me queasy. :-) Too bad it doesn't seem >>>> possible to use SmallPtrSet (elements are not in sorted order). >>> >>> I'm sad to say that std::set is probably the best thing we have >>> right >>> now that provides priority queue + removal from the middle support. >>> >> >> There's make_heap/push_heap/etc. in that let a >> plain std::vector (or a SmallVector I guess) be used as a heap. > > Yes, this is possible but produces much more overhead than std::set on > my tests. BTW, this approach is used in DAGISel.inc files generated by > tablegen. I tried to changed it to std::set as well and ,again, it > works much (25%-30%) faster on BBs with few hundreds or thousends > instructions. If you give me a patch, I'll test it on my end. Thanks. > > > I'd like to understand better why Evan and Chris are some much against > std::set? From some mails I got the impression that std::set > implementation is very inefficient on Darwin or PowerPC? Is it > correct? Or do you dislike that fact that std::set uses dynamic memory > allocation extensively? Right, it's very malloc intensive. That's the main issue. > > >>> Does anyone know of a better data structure to implement these >>> operations? Even if you don't volunteer to implement it, we can add >>> it to the open projects page. > > In principle, we need something like a balanced tree. And since we > want to be able to remove from the middle, I'd say that it should not > be mapped to something linear like std::vector, as it is done by > make_heap, since it involves quite some overhead and a lot of copying > around. Finding/creating a tree implementation is not such a big deal. > But again, why it would be better than std::set, that anyway seems to > be implemented internally as a read-black tree? Hard to say without testing. It might work better for small / medium sized programs if it were designed to avoid malloc for smallish queues. > > > To conclude: Guys, I'm still waiting for a review and approval of the > two pending patches for ScheduleDAGList and ScheduleDAGRRList. Both of > them use std::set approach among other things. I thought those were approved? We understanding std::set is probably the best choice of ADT for now. Thanks! Evan > > > - Roman > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dpatel at apple.com Tue Mar 4 11:44:38 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Mar 2008 17:44:38 -0000 Subject: [llvm-commits] [llvm] r47888 - /llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Message-ID: <200803041744.m24Hic6T030716@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 4 11:44:37 2008 New Revision: 47888 URL: http://llvm.org/viewvc/llvm-project?rev=47888&view=rev Log: Collect statistics. Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp?rev=47888&r1=47887&r2=47888&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Tue Mar 4 11:44:37 2008 @@ -24,9 +24,12 @@ #include "llvm/Support/Debug.h" #include "llvm/ADT/Statistic.h" #include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/Statistic.h" #include "llvm/Support/Compiler.h" using namespace llvm; +STATISTIC(NumRejectedSRETUses , "Number of sret rejected due to unexpected uses"); +STATISTIC(NumSRET , "Number of sret promoted"); namespace { /// SRETPromotion - This pass removes sret parameter and updates /// function to use multiple return value. @@ -87,15 +90,18 @@ assert (STy && "Invalid sret parameter element type"); // Check if it is ok to perform this promotion. - if (isSafeToUpdateAllCallers(F) == false) + if (isSafeToUpdateAllCallers(F) == false) { + NumRejectedSRETUses++; return false; + } // [1] Replace use of sret parameter - AllocaInst *TheAlloca = new AllocaInst (STy, NULL, "mrv", F->getEntryBlock().begin()); + AllocaInst *TheAlloca = new AllocaInst (STy, NULL, "mrv", + F->getEntryBlock().begin()); Value *NFirstArg = F->arg_begin(); NFirstArg->replaceAllUsesWith(TheAlloca); - // Find and replace ret instructions + // [2] Find and replace ret instructions SmallVector RetVals; for (Function::iterator FI = F->begin(), FE = F->end(); FI != FE; ++FI) for(BasicBlock::iterator BI = FI->begin(), BE = FI->end(); BI != BE; ) { @@ -119,10 +125,10 @@ } } - // Create the new function body and insert it into the module. + // [3] Create the new function body and insert it into the module. Function *NF = cloneFunctionBody(F, STy); - // Update all call sites to use new function + // [4] Update all call sites to use new function updateCallSites(F, NF); F->eraseFromParent(); From dpatel at apple.com Tue Mar 4 11:46:26 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Mar 2008 17:46:26 -0000 Subject: [llvm-commits] [llvm] r47889 - /llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Message-ID: <200803041746.m24HkQsT030782@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 4 11:46:26 2008 New Revision: 47889 URL: http://llvm.org/viewvc/llvm-project?rev=47889&view=rev Log: Process externally visible functions also. Later on code generator will do the right thing. Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp?rev=47889&r1=47888&r2=47889&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Tue Mar 4 11:46:26 2008 @@ -73,8 +73,7 @@ bool SRETPromotion::PromoteReturn(CallGraphNode *CGN) { Function *F = CGN->getFunction(); - // Make sure that it is local to this module. - if (!F || !F->hasInternalLinkage()) + if (!F) return false; // Make sure that function returns struct. From dpatel at apple.com Tue Mar 4 11:47:06 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Mar 2008 17:47:06 -0000 Subject: [llvm-commits] [llvm] r47890 - /llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Message-ID: <200803041747.m24Hl6jE030812@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 4 11:47:06 2008 New Revision: 47890 URL: http://llvm.org/viewvc/llvm-project?rev=47890&view=rev Log: Skip declarations. Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp?rev=47890&r1=47889&r2=47890&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Tue Mar 4 11:47:06 2008 @@ -73,7 +73,7 @@ bool SRETPromotion::PromoteReturn(CallGraphNode *CGN) { Function *F = CGN->getFunction(); - if (!F) + if (!F || F->isDeclaration()) return false; // Make sure that function returns struct. From dpatel at apple.com Tue Mar 4 11:48:12 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Mar 2008 17:48:12 -0000 Subject: [llvm-commits] [llvm] r47892 - /llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Message-ID: <200803041748.m24HmCWw030867@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 4 11:48:11 2008 New Revision: 47892 URL: http://llvm.org/viewvc/llvm-project?rev=47892&view=rev Log: Increment counter that keeps track of total number of sret promoted. Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp?rev=47892&r1=47891&r2=47892&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Tue Mar 4 11:48:11 2008 @@ -94,6 +94,7 @@ return false; } + NumSRET++; // [1] Replace use of sret parameter AllocaInst *TheAlloca = new AllocaInst (STy, NULL, "mrv", F->getEntryBlock().begin()); From dalej at apple.com Tue Mar 4 12:12:07 2008 From: dalej at apple.com (Dale Johannesen) Date: Tue, 4 Mar 2008 10:12:07 -0800 Subject: [llvm-commits] [llvm] r47883 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp In-Reply-To: <200803040805.m2485Uhk000936@zion.cs.uiuc.edu> References: <200803040805.m2485Uhk000936@zion.cs.uiuc.edu> Message-ID: <3C49DA82-8B85-47C0-B4D4-3216ADFF4E9C@apple.com> Btw, this optimization is sometimes a loser on speed, we should have a way to disable it. I ran into this in gcc a while back: http://gcc.gnu.org/ml/gcc/2005-07/msg00289.html On Mar 4, 2008, at 12:05 AM, Evan Cheng wrote: > Author: evancheng > Date: Tue Mar 4 02:05:30 2008 > New Revision: 47883 > > URL: http://llvm.org/viewvc/llvm-project?rev=47883&view=rev > Log: > Refactor ExpandConstantFP so it can optimize load from constpool of > types larger than f64 into extload from smaller types. From romix.llvm at googlemail.com Tue Mar 4 12:37:34 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Tue, 4 Mar 2008 21:37:34 +0300 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <2DFEE2ED-2D57-4310-8F6C-1B08F18D4363@apple.com> References: <522BCA72-6445-4857-BE7B-019B841AA9DB@apple.com> <2DFEE2ED-2D57-4310-8F6C-1B08F18D4363@apple.com> Message-ID: Hi Evan, 2008/3/4, Evan Cheng : > > On Mar 4, 2008, at 3:44 AM, Roman Levenstein wrote: > > > Hi, > > > > 2008/3/3, Dan Gohman : > >> > >> On Mar 3, 2008, at 1:31 PM, Chris Lattner wrote: > >> > >>> On Mar 3, 2008, at 1:26 PM, Evan Cheng wrote: > >>>> Thanks. > >>>> > >>>> Using std::set<> makes me queasy. :-) Too bad it doesn't seem > >>>> possible to use SmallPtrSet (elements are not in sorted order). > >>> > >>> I'm sad to say that std::set is probably the best thing we have > >>> right > >>> now that provides priority queue + removal from the middle support. > >>> > >> > >> There's make_heap/push_heap/etc. in that let a > >> plain std::vector (or a SmallVector I guess) be used as a heap. > > > > Yes, this is possible but produces much more overhead than std::set on > > my tests. BTW, this approach is used in DAGISel.inc files generated by > > tablegen. I tried to changed it to std::set as well and ,again, it > > works much (25%-30%) faster on BBs with few hundreds or thousends > > instructions. > > > If you give me a patch, I'll test it on my end. Thanks. Fine. I'll provide this patch tomorrow. It is not a patch for the tablegen yet, it is just a small change of the code selector generated by the tablegen for the X86 target. > > I'd like to understand better why Evan and Chris are some much against > > std::set? From some mails I got the impression that std::set > > implementation is very inefficient on Darwin or PowerPC? Is it > > correct? Or do you dislike that fact that std::set uses dynamic memory > > allocation extensively? > > > Right, it's very malloc intensive. That's the main issue. I think we may have a reasonable solution here. Remember that STL allows us to provide our own allocators as a template parameter for all collection classes including std::set. So, in principle we can use a cutom pool allocator or something like that to make std::set less memory intensive. BTW, here you can find a nice description about writing your own stl compatible allocator: http://www.codeguru.com/Cpp/Cpp/cpp_mfc/stl/article.php/c4079 > > > > > >>> Does anyone know of a better data structure to implement these > >>> operations? Even if you don't volunteer to implement it, we can add > >>> it to the open projects page. > > > > In principle, we need something like a balanced tree. And since we > > want to be able to remove from the middle, I'd say that it should not > > be mapped to something linear like std::vector, as it is done by > > make_heap, since it involves quite some overhead and a lot of copying > > around. Finding/creating a tree implementation is not such a big deal. > > But again, why it would be better than std::set, that anyway seems to > > be implemented internally as a read-black tree? > > > Hard to say without testing. It might work better for small / medium > sized programs if it were designed to avoid malloc for smallish queues. See above. Custom allocator may solve our problems. > > To conclude: Guys, I'm still waiting for a review and approval of the > > two pending patches for ScheduleDAGList and ScheduleDAGRRList. Both of > > them use std::set approach among other things. > > > I thought those were approved? We understanding std::set is probably > the best choice of ADT for now. Thanks! OK. I'll commit them tomorrow. But are you sure about the second one for the ScheduleDAGRRList? I mean this: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20080303/059078.html It also intorduces strict ordering for sorting functions and some other changes besides std::set. Would be nice to get a confirmation from others that it does not break any existing test-cases and compiled programms still produce correct results. - Roman From evan.cheng at apple.com Tue Mar 4 12:43:15 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 4 Mar 2008 10:43:15 -0800 Subject: [llvm-commits] [llvm] r47883 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp In-Reply-To: <3C49DA82-8B85-47C0-B4D4-3216ADFF4E9C@apple.com> References: <200803040805.m2485Uhk000936@zion.cs.uiuc.edu> <3C49DA82-8B85-47C0-B4D4-3216ADFF4E9C@apple.com> Message-ID: <13971D77-DA1A-4D2C-BB10-705ACF2F3D08@apple.com> Yep, that's the plan. See rdar://5755966 Evan On Mar 4, 2008, at 10:12 AM, Dale Johannesen wrote: > Btw, this optimization is sometimes a loser on speed, we should have a > way to disable it. > I ran into this in gcc a while back: > http://gcc.gnu.org/ml/gcc/2005-07/msg00289.html > > On Mar 4, 2008, at 12:05 AM, Evan Cheng wrote: > >> Author: evancheng >> Date: Tue Mar 4 02:05:30 2008 >> New Revision: 47883 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=47883&view=rev >> Log: >> Refactor ExpandConstantFP so it can optimize load from constpool of >> types larger than f64 into extload from smaller types. > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Tue Mar 4 12:44:45 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 4 Mar 2008 10:44:45 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <200803031053.00270.dag@cray.com> Message-ID: Are you sure llvm-gcc is in your path? Check Makefile.config make sure LLVMGCC etc. are pointing to the right executables. If not, make sure llvm-gcc is in the path and reconfigure the tree. Evan On Mar 4, 2008, at 3:56 AM, Roman Levenstein wrote: > Hi, > > 2008/3/3, Tanya Lattner : >> Please review and test, if possible. I have problems with running the >> llvm-test test-suite. When I to run it (and keep in mind, I never did >> it before), I always get the following error messages on my X86/ >> Ubuntu >> system: >> make[4]: *** No rule to make target >> `Output/sse.expandfft.linked.rbc', needed >> by >> `Output/sse.expandfft.linked.bc'. >> Stop. >> >> Please keep in mind that all proposed patches should have been >> tested before >> submitting. This includes llvm-test and 'make check'. >> http://llvm.org/docs/DeveloperPolicy.html#quality > > Sure! > >> This will make Evan's job easier ;) >> >> As for the error in llvm-test that you are seeing, can you use 'make >> VERBOSE=1 TEST=nightly report' and post more details on what make is >> running? It looks like an error in configuration. Did you >> reconfigure once >> you set llvm-gcc path? > > Thanks for the advice, Tanya. > > OK. Here is what I did: > > First I reconfigured: > ../../../llvm/projects/llvm-test/configure --with-llvmgccdir=/opt/ > llvm-gcc > > Than I execute 'make VERBOSE=1 TEST=nightly report' and get the > following: > > make[1]: Entering directory `/opt/llvm.build/projects/llvm-test' > if [ ! -f SingleSource/Makefile ]; \ > then \ > /opt/llvm/autoconf/mkinstalldirs SingleSource; \ > cp /opt/llvm/projects/llvm-test/SingleSource/Makefile > SingleSource/Makefile; \ > fi; \ > make -C SingleSource test -w > make[2]: Entering directory `/opt/llvm.build/projects/llvm-test/ > SingleSource' > if [ ! -f UnitTests/Makefile ]; \ > then \ > /opt/llvm/autoconf/mkinstalldirs UnitTests; \ > cp > /opt/llvm/projects/llvm-test/SingleSource/UnitTests/Makefile > UnitTests/Makefile; \ > fi; \ > make -C UnitTests test -w > make[3]: Entering directory > `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests' > for dir in Vector SignlessTypes Threads; do \ > if [ ! -f $dir/Makefile ]; \ > then \ > /opt/llvm/autoconf/mkinstalldirs $dir; \ > cp > /opt/llvm/projects/llvm-test/SingleSource/UnitTests/$dir/Makefile > $dir/Makefile; \ > fi; \ > (make -C $dir test -w) || exit 1; \ > done > make[4]: Entering directory > `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests/Vector' > for dir in SSE; do \ > if [ ! -f $dir/Makefile ]; \ > then \ > /opt/llvm/autoconf/mkinstalldirs $dir; \ > cp > /opt/llvm/projects/llvm-test/SingleSource/UnitTests/Vector/$dir/ > Makefile > $dir/Makefile; \ > fi; \ > (make -C $dir test -w) || exit 1; \ > done > make[5]: Entering directory > `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests/Vector/SSE' > make[5]: *** No rule to make target `Output/sse.expandfft.linked.rbc', > needed by `Output/sse.expandfft.linked.bc'. Stop. > make[5]: Leaving directory > `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests/Vector/SSE' > make[4]: *** [test] Error 1 > make[4]: Leaving directory > `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests/Vector' > make[3]: *** [test] Error 1 > make[3]: Leaving directory > `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests' > make[2]: *** [UnitTests/.maketest] Error 2 > make[2]: Leaving directory `/opt/llvm.build/projects/llvm-test/ > SingleSource' > make[1]: *** [SingleSource/.maketest] Error 2 > make[1]: Leaving directory `/opt/llvm.build/projects/llvm-test' > > Any ideas about what I'm doing wrong? > > Thanks, > Roman > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Tue Mar 4 12:44:45 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Mar 2008 10:44:45 -0800 Subject: [llvm-commits] [llvm] r47883 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp In-Reply-To: <13971D77-DA1A-4D2C-BB10-705ACF2F3D08@apple.com> References: <200803040805.m2485Uhk000936@zion.cs.uiuc.edu> <3C49DA82-8B85-47C0-B4D4-3216ADFF4E9C@apple.com> <13971D77-DA1A-4D2C-BB10-705ACF2F3D08@apple.com> Message-ID: <01F71675-0350-4C20-904A-49A43D80C801@apple.com> On Mar 4, 2008, at 10:43 AM, Evan Cheng wrote: > Yep, that's the plan. See rdar://5755966 aka PR1264. -Chris > > > Evan > On Mar 4, 2008, at 10:12 AM, Dale Johannesen wrote: > >> Btw, this optimization is sometimes a loser on speed, we should >> have a >> way to disable it. >> I ran into this in gcc a while back: >> http://gcc.gnu.org/ml/gcc/2005-07/msg00289.html >> >> On Mar 4, 2008, at 12:05 AM, Evan Cheng wrote: >> >>> Author: evancheng >>> Date: Tue Mar 4 02:05:30 2008 >>> New Revision: 47883 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=47883&view=rev >>> Log: >>> Refactor ExpandConstantFP so it can optimize load from constpool of >>> types larger than f64 into extload from smaller types. >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dpatel at apple.com Tue Mar 4 12:57:06 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Mar 2008 18:57:06 -0000 Subject: [llvm-commits] [llvm] r47895 - in /llvm/trunk: include/llvm/DerivedTypes.h lib/VMCore/Type.cpp Message-ID: <200803041857.m24Iv6Ck000553@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 4 12:57:05 2008 New Revision: 47895 URL: http://llvm.org/viewvc/llvm-project?rev=47895&view=rev Log: Add FunctionType ctor variant that takes SmallVector params. Modified: llvm/trunk/include/llvm/DerivedTypes.h llvm/trunk/lib/VMCore/Type.cpp Modified: llvm/trunk/include/llvm/DerivedTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/DerivedTypes.h?rev=47895&r1=47894&r2=47895&view=diff ============================================================================== --- llvm/trunk/include/llvm/DerivedTypes.h (original) +++ llvm/trunk/include/llvm/DerivedTypes.h Tue Mar 4 12:57:05 2008 @@ -19,6 +19,7 @@ #define LLVM_DERIVED_TYPES_H #include "llvm/Type.h" +#include "llvm/ADT/SmallVector.h" namespace llvm { @@ -144,6 +145,8 @@ const FunctionType &operator=(const FunctionType &); // Do not implement FunctionType(const Type *Result, const std::vector &Params, bool IsVarArgs); + FunctionType(const Type *Result, const SmallVectorImpl &Params, + bool IsVarArgs); public: /// FunctionType::get - This static method is the primary way of constructing @@ -155,6 +158,12 @@ bool isVarArg ///< Whether this is a variable argument length function ); + static FunctionType *get( + const Type *Result, ///< The result type + const SmallVectorImpl &Params, ///< The types of the parameters + bool isVarArg ///< Whether this is a variable argument length function + ); + inline bool isVarArg() const { return isVarArgs; } inline const Type *getReturnType() const { return ContainedTys[0]; } Modified: llvm/trunk/lib/VMCore/Type.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Type.cpp?rev=47895&r1=47894&r2=47895&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Type.cpp (original) +++ llvm/trunk/lib/VMCore/Type.cpp Tue Mar 4 12:57:05 2008 @@ -460,6 +460,30 @@ setAbstract(isAbstract); } +FunctionType::FunctionType(const Type *Result, + const SmallVectorImpl &Params, + bool IsVarArgs) + : DerivedType(FunctionTyID), isVarArgs(IsVarArgs) { + ContainedTys = reinterpret_cast(this+1); + NumContainedTys = Params.size() + 1; // + 1 for result type + assert((Result->isFirstClassType() || Result == Type::VoidTy || + Result->getTypeID() == Type::StructTyID || + isa(Result)) && + "LLVM functions cannot return aggregates"); + bool isAbstract = Result->isAbstract(); + new (&ContainedTys[0]) PATypeHandle(Result, this); + + for (unsigned i = 0; i != Params.size(); ++i) { + assert((Params[i]->isFirstClassType() || isa(Params[i])) && + "Function arguments must be value types!"); + new (&ContainedTys[i+1]) PATypeHandle(Params[i],this); + isAbstract |= Params[i]->isAbstract(); + } + + // Calculate whether or not this type is abstract + setAbstract(isAbstract); +} + StructType::StructType(const std::vector &Types, bool isPacked) : CompositeType(StructTyID) { ContainedTys = reinterpret_cast(this + 1); @@ -1055,6 +1079,12 @@ ArgTypes.push_back(args[i]); } + FunctionValType(const Type *ret, const SmallVectorImpl &args, + bool isVA) : RetTy(ret), isVarArg(isVA) { + for (unsigned i = 0; i < args.size(); ++i) + ArgTypes.push_back(args[i]); + } + static FunctionValType get(const FunctionType *FT); static unsigned hashTypeStructure(const FunctionType *FT) { @@ -1108,6 +1138,27 @@ return FT; } +// FunctionType::get - The factory function for the FunctionType class... +FunctionType *FunctionType::get(const Type *ReturnType, + const SmallVectorImpl &Params, + bool isVarArg) { + FunctionValType VT(ReturnType, Params, isVarArg); + FunctionType *FT = FunctionTypes->get(VT); + if (FT) { + return FT; + } + + FT = (FunctionType*) new char[sizeof(FunctionType) + + sizeof(PATypeHandle)*(Params.size()+1)]; + new (FT) FunctionType(ReturnType, Params, isVarArg); + FunctionTypes->add(VT, FT); + +#ifdef DEBUG_MERGE_TYPES + DOUT << "Derived new type: " << FT << "\n"; +#endif + return FT; +} + //===----------------------------------------------------------------------===// // Array Type Factory... // From evan.cheng at apple.com Tue Mar 4 13:11:37 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 4 Mar 2008 11:11:37 -0800 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <522BCA72-6445-4857-BE7B-019B841AA9DB@apple.com> <2DFEE2ED-2D57-4310-8F6C-1B08F18D4363@apple.com> Message-ID: <3F12013F-046B-4DF7-AFEE-6784E19CEE7D@apple.com> On Mar 4, 2008, at 10:37 AM, Roman Levenstein wrote: > Hi Evan, > > 2008/3/4, Evan Cheng : >> >> On Mar 4, 2008, at 3:44 AM, Roman Levenstein wrote: >> >>> Hi, >>> >>> 2008/3/3, Dan Gohman : >>>> >>>> On Mar 3, 2008, at 1:31 PM, Chris Lattner wrote: >>>> >>>>> On Mar 3, 2008, at 1:26 PM, Evan Cheng wrote: >>>>>> Thanks. >>>>>> >>>>>> Using std::set<> makes me queasy. :-) Too bad it doesn't seem >>>>>> possible to use SmallPtrSet (elements are not in sorted order). >>>>> >>>>> I'm sad to say that std::set is probably the best thing we have >>>>> right >>>>> now that provides priority queue + removal from the middle >>>>> support. >>>>> >>>> >>>> There's make_heap/push_heap/etc. in that let a >>>> plain std::vector (or a SmallVector I guess) be used as a heap. >>> >>> Yes, this is possible but produces much more overhead than >>> std::set on >>> my tests. BTW, this approach is used in DAGISel.inc files >>> generated by >>> tablegen. I tried to changed it to std::set as well and ,again, it >>> works much (25%-30%) faster on BBs with few hundreds or thousends >>> instructions. >> >> >> If you give me a patch, I'll test it on my end. Thanks. > > Fine. I'll provide this patch tomorrow. It is not a patch for the > tablegen yet, it is just a small change of the code selector generated > by the tablegen for the X86 target. Ok, thanks. > > >>> I'd like to understand better why Evan and Chris are some much >>> against >>> std::set? From some mails I got the impression that std::set >>> implementation is very inefficient on Darwin or PowerPC? Is it >>> correct? Or do you dislike that fact that std::set uses dynamic >>> memory >>> allocation extensively? >> >> >> Right, it's very malloc intensive. That's the main issue. > > I think we may have a reasonable solution here. Remember that STL > allows us to provide our own allocators as a template parameter for > all collection classes including std::set. So, in principle we can use > a cutom pool allocator or something like that to make std::set less > memory intensive. > > BTW, here you can find a nice description about writing your own stl > compatible allocator: > http://www.codeguru.com/Cpp/Cpp/cpp_mfc/stl/article.php/c4079 Ok. > > >>> >>> >>>>> Does anyone know of a better data structure to implement these >>>>> operations? Even if you don't volunteer to implement it, we can >>>>> add >>>>> it to the open projects page. >>> >>> In principle, we need something like a balanced tree. And since we >>> want to be able to remove from the middle, I'd say that it should >>> not >>> be mapped to something linear like std::vector, as it is done by >>> make_heap, since it involves quite some overhead and a lot of >>> copying >>> around. Finding/creating a tree implementation is not such a big >>> deal. >>> But again, why it would be better than std::set, that anyway seems >>> to >>> be implemented internally as a read-black tree? >> >> >> Hard to say without testing. It might work better for small / medium >> sized programs if it were designed to avoid malloc for smallish >> queues. > > See above. Custom allocator may solve our problems. > >>> To conclude: Guys, I'm still waiting for a review and approval of >>> the >>> two pending patches for ScheduleDAGList and ScheduleDAGRRList. >>> Both of >>> them use std::set approach among other things. >> >> >> I thought those were approved? We understanding std::set is probably >> the best choice of ADT for now. Thanks! > > OK. I'll commit them tomorrow. > > But are you sure about the second one for the ScheduleDAGRRList? > I mean this: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20080303/059078.html > > It also intorduces strict ordering for sorting functions and some > other changes besides std::set. Would be nice to get a confirmation > from others that it does not break any existing test-cases and > compiled programms still produce correct results. I'll take a look. Evan > > > - Roman > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dpatel at apple.com Tue Mar 4 13:12:58 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Mar 2008 19:12:58 -0000 Subject: [llvm-commits] [llvm] r47896 - /llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Message-ID: <200803041912.m24JCwEK001100@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 4 13:12:58 2008 New Revision: 47896 URL: http://llvm.org/viewvc/llvm-project?rev=47896&view=rev Log: Skip sret attribute while preparing attribute list for new function and new call sites. Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp?rev=47896&r1=47895&r2=47896&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Tue Mar 4 13:12:58 2008 @@ -205,9 +205,14 @@ unsigned ParamIndex = 1; // 0th parameter attribute is reserved for return type. while (I != E) { Params.push_back(I->getType()); - if (ParameterAttributes attrs = PAL ? PAL->getParamAttrs(ParamIndex) : - ParamAttr::None) - ParamAttrsVec.push_back(ParamAttrsWithIndex::get(Params.size(), attrs)); + ParameterAttributes Attrs; + if (PAL) { + Attrs = PAL->getParamAttrs(ParamIndex); + if (ParamIndex == 1) // Skip sret attribute + Attrs = Attrs ^ ParamAttr::StructRet; + } + if (Attrs != ParamAttr::None) + ParamAttrsVec.push_back(ParamAttrsWithIndex::get(ParamIndex, Attrs)); ++I; ++ParamIndex; } @@ -240,7 +245,7 @@ SmallVector Args; // ParamAttrs - Keep track of the parameter attributes for the arguments. - ParamAttrsVector ParamAttrsVec; + ParamAttrsVector ArgAttrsVec; for (Value::use_iterator FUI = F->use_begin(), FUE = F->use_end(); FUI != FUE;) { CallSite CS = CallSite::get(*FUI); @@ -250,7 +255,7 @@ const ParamAttrsList *PAL = F->getParamAttrs(); // Add any return attributes. if (ParameterAttributes attrs = PAL ? PAL->getParamAttrs(0) : ParamAttr::None) - ParamAttrsVec.push_back(ParamAttrsWithIndex::get(0, attrs)); + ArgAttrsVec.push_back(ParamAttrsWithIndex::get(0, attrs)); // Copy arguments, however skip first one. CallSite::arg_iterator AI = CS.arg_begin(), AE = CS.arg_end(); @@ -259,9 +264,14 @@ unsigned ParamIndex = 1; // 0th parameter attribute is reserved for return type. while (AI != AE) { Args.push_back(*AI); - if (ParameterAttributes Attrs = PAL ? PAL->getParamAttrs(ParamIndex) : - ParamAttr::None) - ParamAttrsVec.push_back(ParamAttrsWithIndex::get(Args.size(), Attrs)); + ParameterAttributes Attrs; + if (PAL) { + Attrs = PAL->getParamAttrs(ParamIndex); + if (ParamIndex == 1) // Skip sret attribute + Attrs = Attrs ^ ParamAttr::StructRet; + } + if (Attrs != ParamAttr::None) + ArgAttrsVec.push_back(ParamAttrsWithIndex::get(Args.size(), Attrs)); ++ParamIndex; ++AI; } @@ -272,16 +282,16 @@ New = new InvokeInst(NF, II->getNormalDest(), II->getUnwindDest(), Args.begin(), Args.end(), "", Call); cast(New)->setCallingConv(CS.getCallingConv()); - cast(New)->setParamAttrs(ParamAttrsList::get(ParamAttrsVec)); + cast(New)->setParamAttrs(ParamAttrsList::get(ArgAttrsVec)); } else { New = new CallInst(NF, Args.begin(), Args.end(), "", Call); cast(New)->setCallingConv(CS.getCallingConv()); - cast(New)->setParamAttrs(ParamAttrsList::get(ParamAttrsVec)); + cast(New)->setParamAttrs(ParamAttrsList::get(ArgAttrsVec)); if (cast(Call)->isTailCall()) cast(New)->setTailCall(); } Args.clear(); - ParamAttrsVec.clear(); + ArgAttrsVec.clear(); New->takeName(Call); // Update all users of sret parameter to extract value using getresult. From dpatel at apple.com Tue Mar 4 13:22:54 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Mar 2008 19:22:54 -0000 Subject: [llvm-commits] [llvm] r47897 - /llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Message-ID: <200803041922.m24JMstA001381@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 4 13:22:54 2008 New Revision: 47897 URL: http://llvm.org/viewvc/llvm-project?rev=47897&view=rev Log: Use appropriate index to get the result value. Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp?rev=47897&r1=47896&r2=47897&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Tue Mar 4 13:22:54 2008 @@ -302,7 +302,9 @@ if (C2 && (C2 == Call)) continue; else if (GetElementPtrInst *UGEP = dyn_cast(U2)) { - Value *GR = new GetResultInst(New, 5, "xxx", UGEP); + ConstantInt *Idx = dyn_cast(UGEP->getOperand(2)); + assert (Idx && "Unexpected getelementptr index!"); + Value *GR = new GetResultInst(New, Idx->getZExtValue(), "gr", UGEP); for (Value::use_iterator GI = UGEP->use_begin(), GE = UGEP->use_end(); GI != GE; ++GI) { if (LoadInst *L = dyn_cast(*GI)) { From clattner at apple.com Tue Mar 4 13:30:21 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Mar 2008 11:30:21 -0800 Subject: [llvm-commits] [llvm] r47895 - in /llvm/trunk: include/llvm/DerivedTypes.h lib/VMCore/Type.cpp In-Reply-To: <200803041857.m24Iv6Ck000553@zion.cs.uiuc.edu> References: <200803041857.m24Iv6Ck000553@zion.cs.uiuc.edu> Message-ID: On Mar 4, 2008, at 10:57 AM, Devang Patel wrote: > Author: dpatel > Date: Tue Mar 4 12:57:05 2008 > New Revision: 47895 > > URL: http://llvm.org/viewvc/llvm-project?rev=47895&view=rev > Log: > Add FunctionType ctor variant that takes SmallVector params. > > > #include "llvm/Type.h" > +#include "llvm/ADT/SmallVector.h" Instead of making this specific to smallvector, how about passing in pointer to pointer + count instead? That eliminates the #include and allows it to work with arrays on the stack and scalars. -Chris From clattner at apple.com Tue Mar 4 13:34:43 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Mar 2008 11:34:43 -0800 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <522BCA72-6445-4857-BE7B-019B841AA9DB@apple.com> <2DFEE2ED-2D57-4310-8F6C-1B08F18D4363@apple.com> Message-ID: <42F118AB-1A01-41F8-9DD8-7A3D16F47683@apple.com> >>> I'd like to understand better why Evan and Chris are some much >>> against >>> std::set? From some mails I got the impression that std::set >>> implementation is very inefficient on Darwin or PowerPC? Is it >>> correct? Or do you dislike that fact that std::set uses dynamic >>> memory >>> allocation extensively? >> >> >> Right, it's very malloc intensive. That's the main issue. There is a reasonable discussion of these issues here: http://llvm.org/docs/ProgrammersManual.html#datastructure > I think we may have a reasonable solution here. Remember that STL > allows us to provide our own allocators as a template parameter for > all collection classes including std::set. So, in principle we can use > a cutom pool allocator or something like that to make std::set less > memory intensive. This isn't really a good solution. Node based data structures are inherently less cache and memory efficient than dense ones (e.g. map vs densemap) regardless of the allocator you use. Making malloc faster improves the situation, but it doesn't solve the underlying problem. If you have per-datastructure heaps, you suffer significant fragmentation problems. -Chris From dpatel at apple.com Tue Mar 4 13:41:41 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 4 Mar 2008 11:41:41 -0800 Subject: [llvm-commits] [llvm] r47895 - in /llvm/trunk: include/llvm/DerivedTypes.h lib/VMCore/Type.cpp In-Reply-To: References: <200803041857.m24Iv6Ck000553@zion.cs.uiuc.edu> Message-ID: On Mar 4, 2008, at 11:30 AM, Chris Lattner wrote: > > On Mar 4, 2008, at 10:57 AM, Devang Patel wrote: > >> Author: dpatel >> Date: Tue Mar 4 12:57:05 2008 >> New Revision: 47895 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=47895&view=rev >> Log: >> Add FunctionType ctor variant that takes SmallVector params. >> >> >> #include "llvm/Type.h" >> +#include "llvm/ADT/SmallVector.h" > > Instead of making this specific to smallvector, how about passing in > pointer to pointer + count instead? That eliminates the #include and > allows it to work with arrays on the stack and scalars. I will do that conversion also. I did not do it immediately because it required many mechanical changes. - Devang From evan.cheng at apple.com Tue Mar 4 13:54:34 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 4 Mar 2008 11:54:34 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <200803031053.00270.dag@cray.com> Message-ID: <5B2F037F-C22F-4CDC-AE6E-1D711A11D975@apple.com> Some comments. + + if (!IsRemoved) + // fix the ordering here + AvailableQueue->updateNode(PredSU); Please start comment with a capital letter. :-) - virtual void updateNode(const SUnit *SU) {} + virtual void updateNode(const SUnit *SU) { + remove((SUnit *)SU); + push((SUnit *)SU); + } Rather than casting away the constness. It's probably ok to change the prototype instead. - Queue.push(U); + Queue.insert(U); <=== tab here } void push_all(const std::vector &Nodes) { - for (unsigned i = 0, e = Nodes.size(); i != e; ++i) - Queue.push(Nodes[i]); + for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { + Queue.insert(Nodes[i]); <=== tab here + } No tabs please. - // FIXME: No strict ordering. - return false; + return (left->NodeNum < right->NodeNum); I think this is ok for now. But perhaps we can add a field to SUnit to track the relative temporal order of when nodes are inserted in the queue. This should then be changed to prefer nodes that were entered earlier rather than NodeNum which can be arbitrary. What do you think? This can be a later patch. Thanks, Evan On Mar 3, 2008, at 9:18 AM, Roman Levenstein wrote: > Hi Dave, > > 2008/3/3, David Greene : >> On Friday 29 February 2008 17:49, Evan Cheng wrote: >>> Let's try to solve one problem at a time. >>> >>> 1. Roman's depth / height patch calculation is obviously goodness. >>> Please commit that first. >>> 2. It's probably safe to eliminate the "special tie-breaker" from >>> top >>> down sorting function. >>> 3. We will need to fix up the sorting functions so strict ordering >>> is >>> preserved. We need to do so without breaking any of the existing >>> test >>> case. "return left->NodeNum < right->NodeNum;" doesn't. :-( What >>> does >>> "return false" mean? Is it favoring nodes that are inserted earlier? >>> 4. It might be wise to add some debugging code so we can tell where >>> things start diverge. >>> 5. It would be nice to be able to rebalance the heap. Roman and >>> David >>> can fight it out when we get to that point. :-) >> >> >> Sounds good. I don't know what "fight it out" means, however. :) > Me either ;) > >> It's more than "nice" to rebalance the heap. It's necessary if we >> want to avoid traps when _GLIBCXX_DEBUG is enabled. And we >> want to do that because it finds lots of bugs. > Totally agree. > > Here is a proposed patch for ScheduleDAGRRList.cpp. It contains the > following changes: > 1) Uses std::set instead of the priority queue. This makes removal of > nodes very fast and removes a bottleneck > 2) sorting functions use now strict ordering > 3) According to your proposal, it takes node priority updates into > account and updates the priority queue by removing and re-inserting > the updated element. > 4) SumOfUnscheduledPredsOfSuccs is slightly changed to avoid useless > computations. This saves a LOT OF time on big basic blocks. > > Please review and test, if possible. I have problems with running the > llvm-test test-suite. When I to run it (and keep in mind, I never did > it before), I always get the following error messages on my X86/Ubuntu > system: > make[4]: *** No rule to make target > `Output/sse.expandfft.linked.rbc', needed by > `Output/sse.expandfft.linked.bc'. Stop. > > > -Roman > < > ScheduleDAGRRList > .patch>_______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From asl at math.spbu.ru Tue Mar 4 14:15:35 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 04 Mar 2008 20:15:35 -0000 Subject: [llvm-commits] [llvm] r47899 - /llvm/trunk/lib/Archive/Archive.cpp Message-ID: <200803042015.m24KFZVg003325@zion.cs.uiuc.edu> Author: asl Date: Tue Mar 4 14:15:35 2008 New Revision: 47899 URL: http://llvm.org/viewvc/llvm-project?rev=47899&view=rev Log: Add alias with non-external aliasee to the list of exported symbols of the library. Modified: llvm/trunk/lib/Archive/Archive.cpp Modified: llvm/trunk/lib/Archive/Archive.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Archive/Archive.cpp?rev=47899&r1=47898&r2=47899&view=diff ============================================================================== --- llvm/trunk/lib/Archive/Archive.cpp (original) +++ llvm/trunk/lib/Archive/Archive.cpp Tue Mar 4 14:15:35 2008 @@ -198,11 +198,20 @@ if (!GI->getName().empty()) symbols.push_back(GI->getName()); - // Loop over functions. + // Loop over functions for (Module::iterator FI = M->begin(), FE = M->end(); FI != FE; ++FI) if (!FI->isDeclaration() && !FI->hasInternalLinkage()) if (!FI->getName().empty()) symbols.push_back(FI->getName()); + + // Loop over aliases + for (Module::alias_iterator AI = M->alias_begin(), AE = M->alias_end(); + AI != AE; ++AI) { + const GlobalValue *Aliased = AI->getAliasedGlobal(); + if (!Aliased->isDeclaration()) + if (AI->hasName()) + symbols.push_back(AI->getName()); + } } // Get just the externally visible defined symbols from the bitcode From asl at math.spbu.ru Tue Mar 4 14:16:11 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 04 Mar 2008 20:16:11 -0000 Subject: [llvm-commits] [llvm] r47900 - /llvm/trunk/lib/Linker/LinkArchives.cpp Message-ID: <200803042016.m24KGBU8003352@zion.cs.uiuc.edu> Author: asl Date: Tue Mar 4 14:16:11 2008 New Revision: 47900 URL: http://llvm.org/viewvc/llvm-project?rev=47900&view=rev Log: Properly populate lists of defined/undefined symbols in presence of aliases Modified: llvm/trunk/lib/Linker/LinkArchives.cpp Modified: llvm/trunk/lib/Linker/LinkArchives.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkArchives.cpp?rev=47900&r1=47899&r2=47900&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkArchives.cpp (original) +++ llvm/trunk/lib/Linker/LinkArchives.cpp Tue Mar 4 14:16:11 2008 @@ -56,6 +56,7 @@ DefinedSymbols.insert(I->getName()); } } + for (Module::global_iterator I = M->global_begin(), E = M->global_end(); I != E; ++I) if (I->hasName()) { @@ -68,6 +69,16 @@ } } + for (Module::alias_iterator I = M->alias_begin(), E = M->alias_end(); + I != E; ++I) + if (I->hasName()) { + const GlobalValue *Aliased = I->getAliasedGlobal(); + if (Aliased->isDeclaration()) + UndefinedSymbols.insert(I->getName()); + else + DefinedSymbols.insert(I->getName()); + } + // Prune out any defined symbols from the undefined symbols set... for (std::set::iterator I = UndefinedSymbols.begin(); I != UndefinedSymbols.end(); ) @@ -88,7 +99,6 @@ /// FALSE - No errors. bool Linker::LinkInArchive(const sys::Path &Filename, bool &is_native) { - // Make sure this is an archive file we're dealing with if (!Filename.isArchive()) return error("File '" + Filename.toString() + "' is not an archive."); From andrewl at lenharth.org Tue Mar 4 14:19:04 2008 From: andrewl at lenharth.org (Andrew Lenharth) Date: Tue, 4 Mar 2008 14:19:04 -0600 Subject: [llvm-commits] [llvm-gcc-4.2] r47801 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <8EDB1B64-6A30-433B-A606-D108BD0C9B7E@apple.com> References: <200803012336.m21NaM6B018640@zion.cs.uiuc.edu> <8EDB1B64-6A30-433B-A606-D108BD0C9B7E@apple.com> Message-ID: <85dfcd7f0803041219r2bba36f7he19487951f9d830d@mail.gmail.com> right, 64 bit atomics aren't implemented on x86 yet. On 3/3/08, Evan Cheng wrote: > This breaks x86-64. libgomp/critical compiles to: > > define void @GOMP_critical_name_start(i8** %pptr) nounwind { > entry: > ... > tail call i64 @llvm.atomic.lcs.i64( i8** %pptr, i64 0, i64 > %tmp1314 ) ; :0 [#uses=1] > ... > ret void > } > > > Evan > > > > On Mar 1, 2008, at 3:36 PM, Andrew Lenharth wrote: > > > Author: alenhar2 > > Date: Sat Mar 1 17:36:21 2008 > > New Revision: 47801 > > > > URL: http://llvm.org/viewvc/llvm-project?rev=47801&view=rev > > Log: > > turn on some atomics for a couple platforms > > > > Modified: > > llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > > > > Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > > URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47801&r1=47800&r2=47801&view=diff > > > > = > > = > > = > > = > > = > > = > > = > > = > > ====================================================================== > > --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) > > +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Sat Mar 1 17:36:21 2008 > > @@ -4294,7 +4294,7 @@ > > C, C + 5); > > return true; > > } > > -#if 0 //FIXME: these break the build for backends that haven't > > implemented them > > +#if defined(TARGET_386) || defined(TARGET_ALPHA) > > //gcc uses many names for the sync intrinsics > > case BUILT_IN_VAL_COMPARE_AND_SWAP_1: > > case BUILT_IN_VAL_COMPARE_AND_SWAP_2: > > > > > > _______________________________________________ > > llvm-commits mailing list > > llvm-commits at cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From alenhar2 at cs.uiuc.edu Tue Mar 4 15:13:34 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Tue, 04 Mar 2008 21:13:34 -0000 Subject: [llvm-commits] [llvm] r47903 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86Instr64bit.td Message-ID: <200803042113.m24LDY50005171@zion.cs.uiuc.edu> Author: alenhar2 Date: Tue Mar 4 15:13:33 2008 New Revision: 47903 URL: http://llvm.org/viewvc/llvm-project?rev=47903&view=rev Log: x86-64 atomics Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86Instr64bit.td Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47903&r1=47902&r2=47903&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Mar 4 15:13:33 2008 @@ -291,6 +291,7 @@ setOperationAction(ISD::ATOMIC_LCS , MVT::i8, Custom); setOperationAction(ISD::ATOMIC_LCS , MVT::i16, Custom); setOperationAction(ISD::ATOMIC_LCS , MVT::i32, Custom); + setOperationAction(ISD::ATOMIC_LCS , MVT::i64, Custom); // Use the default ISD::LOCATION, ISD::DECLARE expansion. setOperationAction(ISD::LOCATION, MVT::Other, Expand); @@ -5356,12 +5357,13 @@ SDOperand X86TargetLowering::LowerCAS(SDOperand Op, SelectionDAG &DAG) { MVT::ValueType T = cast(Op.Val)->getVT(); - unsigned Reg; - unsigned size; + unsigned Reg = 0; + unsigned size = 0; switch(T) { case MVT::i8: Reg = X86::AL; size = 1; break; case MVT::i16: Reg = X86::AX; size = 2; break; case MVT::i32: Reg = X86::EAX; size = 4; break; + case MVT::i64: Reg = X86::RAX; size = 8; break; }; SDOperand cpIn = DAG.getCopyToReg(Op.getOperand(0), Reg, Op.getOperand(3), SDOperand()); Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=47903&r1=47902&r2=47903&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original) +++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Tue Mar 4 15:13:33 2008 @@ -1122,6 +1122,37 @@ "mov{l}\t{$src, ${dst:subreg32}|${dst:subreg32}, $src}", [(set GR64:$dst, i64immZExt32:$src)]>; + +//===----------------------------------------------------------------------===// +// Atomic Instructions +//===----------------------------------------------------------------------===// + +//FIXME: Please check the format Pseudo is certainly wrong, but the opcode and +// prefixes should be correct + +let Defs = [RAX, EFLAGS], Uses = [RAX] in { +def CMPXCHG64 : RI<0xB1, Pseudo, (outs), (ins i64mem:$ptr, GR64:$swap), + "cmpxchgq $swap,$ptr", []>, TB; +def LCMPXCHG64 : RI<0xB1, Pseudo, (outs), (ins i64mem:$ptr, GR64:$swap), + "lock cmpxchgq $swap,$ptr", + [(X86cas addr:$ptr, GR64:$swap, 8)]>, TB, LOCK; +} + +let Constraints = "$val = $dst", Defs = [EFLAGS] in { +def LXADD64 : RI<0xC1, Pseudo, (outs GR64:$dst), (ins i64mem:$ptr, GR64:$val), + "lock xadd $val, $ptr", + [(set GR64:$dst, (atomic_las_64 addr:$ptr, GR64:$val))]>, + TB, LOCK; +def XADD64 : RI<0xC1, Pseudo, (outs GR64:$dst), (ins i64mem:$ptr, GR64:$val), + "xadd $val, $ptr", []>, TB; +def LXCHG64 : RI<0x87, Pseudo, (outs GR64:$dst), (ins i64mem:$ptr, GR64:$val), + "lock xchg $val, $ptr", + [(set GR64:$dst, (atomic_swap_64 addr:$ptr, GR64:$val))]>, LOCK; +def XCHG64 : RI<0x87, Pseudo, (outs GR64:$dst), (ins i64mem:$ptr, GR64:$val), + "xchg $val, $ptr", []>; +} + + //===----------------------------------------------------------------------===// // Non-Instruction Patterns //===----------------------------------------------------------------------===// From andrewl at lenharth.org Tue Mar 4 15:15:00 2008 From: andrewl at lenharth.org (Andrew Lenharth) Date: Tue, 4 Mar 2008 15:15:00 -0600 Subject: [llvm-commits] [llvm-gcc-4.2] r47801 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <85dfcd7f0803041219r2bba36f7he19487951f9d830d@mail.gmail.com> References: <200803012336.m21NaM6B018640@zion.cs.uiuc.edu> <8EDB1B64-6A30-433B-A606-D108BD0C9B7E@apple.com> <85dfcd7f0803041219r2bba36f7he19487951f9d830d@mail.gmail.com> Message-ID: <85dfcd7f0803041315h63c9e79cvb90552e9733911ef@mail.gmail.com> fixed On 3/4/08, Andrew Lenharth wrote: > right, 64 bit atomics aren't implemented on x86 yet. > > > On 3/3/08, Evan Cheng wrote: > > This breaks x86-64. libgomp/critical compiles to: > > > > define void @GOMP_critical_name_start(i8** %pptr) nounwind { > > entry: > > ... > > tail call i64 @llvm.atomic.lcs.i64( i8** %pptr, i64 0, i64 > > %tmp1314 ) ; :0 [#uses=1] > > ... > > ret void > > } > > > > > > Evan > > > > > > > > On Mar 1, 2008, at 3:36 PM, Andrew Lenharth wrote: > > > > > Author: alenhar2 > > > Date: Sat Mar 1 17:36:21 2008 > > > New Revision: 47801 > > > > > > URL: http://llvm.org/viewvc/llvm-project?rev=47801&view=rev > > > Log: > > > turn on some atomics for a couple platforms > > > > > > Modified: > > > llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > > > > > > Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > > > URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47801&r1=47800&r2=47801&view=diff > > > > > > = > > > = > > > = > > > = > > > = > > > = > > > = > > > = > > > ====================================================================== > > > --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) > > > +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Sat Mar 1 17:36:21 2008 > > > @@ -4294,7 +4294,7 @@ > > > C, C + 5); > > > return true; > > > } > > > -#if 0 //FIXME: these break the build for backends that haven't > > > implemented them > > > +#if defined(TARGET_386) || defined(TARGET_ALPHA) > > > //gcc uses many names for the sync intrinsics > > > case BUILT_IN_VAL_COMPARE_AND_SWAP_1: > > > case BUILT_IN_VAL_COMPARE_AND_SWAP_2: > > > > > > > > > _______________________________________________ > > > llvm-commits mailing list > > > llvm-commits at cs.uiuc.edu > > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > > > _______________________________________________ > > llvm-commits mailing list > > llvm-commits at cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > > From dpatel at apple.com Tue Mar 4 15:15:16 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Mar 2008 21:15:16 -0000 Subject: [llvm-commits] [llvm] r47904 - in /llvm/trunk: lib/Transforms/Utils/InlineFunction.cpp test/Transforms/Inline/2008-03-04-StructRet.ll Message-ID: <200803042115.m24LFGx6005243@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 4 15:15:15 2008 New Revision: 47904 URL: http://llvm.org/viewvc/llvm-project?rev=47904&view=rev Log: Handle multiple return values. Added: llvm/trunk/test/Transforms/Inline/2008-03-04-StructRet.ll Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp?rev=47904&r1=47903&r2=47904&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Tue Mar 4 15:15:15 2008 @@ -442,9 +442,21 @@ // If the return instruction returned a value, replace uses of the call with // uses of the returned value. - if (!TheCall->use_empty()) - TheCall->replaceAllUsesWith(Returns[0]->getReturnValue()); - + if (!TheCall->use_empty()) { + ReturnInst *R = Returns[0]; + if (R->getNumOperands() > 1) { + // Multiple return values. + for (Value::use_iterator RUI = TheCall->use_begin(), + RUE = TheCall->use_end(); RUI != RUE; ) { + GetResultInst *GR = dyn_cast(RUI++); + assert (GR && "Invalid Call instruction use!"); + Value *RV = R->getOperand(GR->getIndex()); + GR->replaceAllUsesWith(RV); + GR->eraseFromParent(); + } + } else + TheCall->replaceAllUsesWith(R->getReturnValue()); + } // Since we are now done with the Call/Invoke, we can delete it. TheCall->getParent()->getInstList().erase(TheCall); Added: llvm/trunk/test/Transforms/Inline/2008-03-04-StructRet.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/2008-03-04-StructRet.ll?rev=47904&view=auto ============================================================================== --- llvm/trunk/test/Transforms/Inline/2008-03-04-StructRet.ll (added) +++ llvm/trunk/test/Transforms/Inline/2008-03-04-StructRet.ll Tue Mar 4 15:15:15 2008 @@ -0,0 +1,26 @@ +; RUN: llvm-as < %s | opt -inline -sretpromotion -disable-output + %struct.Benchmark = type { i32 (...)** } + %struct.Complex = type { double, double } + %struct.ComplexBenchmark = type { %struct.Benchmark } + +define void @_Zml7ComplexS_(%struct.Complex* sret %agg.result, double %a.0, double %a.1, double %b.0, double %b.1) nounwind { +entry: + ret void +} + +define void @_ZNK16ComplexBenchmark9oop_styleEv(%struct.ComplexBenchmark* %this) nounwind { +entry: + %tmp = alloca %struct.Complex ; <%struct.Complex*> [#uses=2] + br label %bb31 + +bb: ; preds = %bb31 + call void @_Zml7ComplexS_( %struct.Complex* sret %tmp, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00 ) nounwind + %tmp21 = getelementptr %struct.Complex* %tmp, i32 0, i32 1 ; [#uses=0] + br label %bb31 + +bb31: ; preds = %bb, %entry + br i1 false, label %bb, label %return + +return: ; preds = %bb31 + ret void +} From clattner at apple.com Tue Mar 4 15:17:09 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Mar 2008 13:17:09 -0800 Subject: [llvm-commits] [llvm] r47895 - in /llvm/trunk: include/llvm/DerivedTypes.h lib/VMCore/Type.cpp In-Reply-To: References: <200803041857.m24Iv6Ck000553@zion.cs.uiuc.edu> Message-ID: >>> URL: http://llvm.org/viewvc/llvm-project?rev=47895&view=rev >>> Log: >>> Add FunctionType ctor variant that takes SmallVector params. >>> >>> >>> #include "llvm/Type.h" >>> +#include "llvm/ADT/SmallVector.h" >> >> Instead of making this specific to smallvector, how about passing in >> pointer to pointer + count instead? That eliminates the #include and >> allows it to work with arrays on the stack and scalars. > > I will do that conversion also. I did not do it immediately because it > required many mechanical changes. Just start using it where you would use the smallvector one, other existing clients don't need to change. I'd really like to avoid DerivedTypes.h #including SmallVector. -Chris From alenhar2 at cs.uiuc.edu Tue Mar 4 15:18:39 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Tue, 04 Mar 2008 21:18:39 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47905 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200803042118.m24LIdd4005387@zion.cs.uiuc.edu> Author: alenhar2 Date: Tue Mar 4 15:18:39 2008 New Revision: 47905 URL: http://llvm.org/viewvc/llvm-project?rev=47905&view=rev Log: x86-64 supports these now, this builds fine now on linux/x86-64 Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47905&r1=47904&r2=47905&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Mar 4 15:18:39 2008 @@ -4294,7 +4294,7 @@ C, C + 5); return true; } -#if defined(TARGET_ALPHA) +#if defined(TARGET_ALPHA) || defined(TARGET_386) //gcc uses many names for the sync intrinsics case BUILT_IN_VAL_COMPARE_AND_SWAP_1: case BUILT_IN_VAL_COMPARE_AND_SWAP_2: From clattner at apple.com Tue Mar 4 15:19:35 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Mar 2008 13:19:35 -0800 Subject: [llvm-commits] [llvm] r47863 - in /llvm/trunk: include/llvm/CodeGen/RegisterScavenging.h lib/Target/PowerPC/PPCInstrInfo.cpp lib/Target/PowerPC/PPCInstrInfo.td lib/Target/PowerPC/PPCMachineFunctionInfo.h lib/Target/PowerPC/PPCRegisterInfo.cpp lib/Target/PowerPC/PPCRegisterInfo.h test/CodeGen/PowerPC/Frames-alloca.ll In-Reply-To: <200803032219.m23MJG6l015020@zion.cs.uiuc.edu> References: <200803032219.m23MJG6l015020@zion.cs.uiuc.edu> Message-ID: <2B2080EE-B63F-470C-9535-41097675B197@apple.com> On Mar 3, 2008, at 2:19 PM, Bill Wendling wrote: > Author: void > Date: Mon Mar 3 16:19:16 2008 > New Revision: 47863 > > URL: http://llvm.org/viewvc/llvm-project?rev=47863&view=rev > Log: > This is the initial check-in for adding register scavenging to PPC. > (Currently, > PPC-64 doesn't work.) This also lowers the spilling of the CR > registers so that > it uses a register other than the default R0 register (the scavenger > scrounges > for one). A significant part of this patch fixes how kill > information is > handled. To clarify, this is just not enabled for PPC64 - so it doesn't cause a regression, right? -Chris From clattner at apple.com Tue Mar 4 15:22:37 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Mar 2008 13:22:37 -0800 Subject: [llvm-commits] [llvm] r47862 - /llvm/trunk/lib/CodeGen/MachineInstr.cpp In-Reply-To: <3D7E8268-D07B-4EAC-A8CD-BF2C4FEF1CA0@apple.com> References: <200803032214.m23MEXkF014824@zion.cs.uiuc.edu> <16e5fdf90803031522y7cd2c7c9nec7361de750844cf@mail.gmail.com> <72E52E44-C937-44C0-B9B6-5DA66057D71C@apple.com> <3D7E8268-D07B-4EAC-A8CD-BF2C4FEF1CA0@apple.com> Message-ID: <5012AB20-340A-46E2-8CB4-AFDB5E2B1190@apple.com> On Mar 3, 2008, at 3:47 PM, Evan Cheng wrote: > Haven't you heard goto's are evil? :-) > > I think goto's can be used tastefully. However, it's definitely not > the right situation to use it in this case. I agree, there are some cases when they aren't heinous, but those places are good indicators when something bigger is wrong. Often the body of the loop needs to be factored out into a helper function or something. -Chris From clattner at apple.com Tue Mar 4 15:31:08 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Mar 2008 13:31:08 -0800 Subject: [llvm-commits] [llvm] r47904 - in /llvm/trunk: lib/Transforms/Utils/InlineFunction.cpp test/Transforms/Inline/2008-03-04-StructRet.ll In-Reply-To: <200803042115.m24LFGx6005243@zion.cs.uiuc.edu> References: <200803042115.m24LFGx6005243@zion.cs.uiuc.edu> Message-ID: On Mar 4, 2008, at 1:15 PM, Devang Patel wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=47904&view=rev > Log: > Handle multiple return values. Nice. > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original) > +++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Tue Mar 4 > 15:15:15 2008 > @@ -442,9 +442,21 @@ > > // If the return instruction returned a value, replace uses of > the call with > // uses of the returned value. > - if (!TheCall->use_empty()) > - TheCall->replaceAllUsesWith(Returns[0]->getReturnValue()); > - > + if (!TheCall->use_empty()) { > + ReturnInst *R = Returns[0]; > + if (R->getNumOperands() > 1) { > + // Multiple return values. > + for (Value::use_iterator RUI = TheCall->use_begin(), > + RUE = TheCall->use_end(); RUI != RUE; ) { > + GetResultInst *GR = dyn_cast(RUI++); > > + assert (GR && "Invalid Call instruction use!"); Just use cast<> here instead of dyn_cast. cast<> doesn't have a cost when assertions are disabled, dyn_cast does, this also allows you to remove the assert. Also, it isn't a big deal, but it is more idiomatic and simpler to write the loop as: while (!TheCall->use_empty()) { GetResultInst *GR = cast(TheCall->use_back()); ... } > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/test/Transforms/Inline/2008-03-04-StructRet.ll (added) > +++ llvm/trunk/test/Transforms/Inline/2008-03-04-StructRet.ll Tue > Mar 4 15:15:15 2008 > @@ -0,0 +1,26 @@ > +; RUN: llvm-as < %s | opt -inline -sretpromotion -disable-output This test should not run sretpromotion, just use a .ll file from after sretpromotion is run. -Chris > > + %struct.Benchmark = type { i32 (...)** } > + %struct.Complex = type { double, double } > + %struct.ComplexBenchmark = type { %struct.Benchmark } > + > +define void @_Zml7ComplexS_(%struct.Complex* sret %agg.result, > double %a.0, double %a.1, double %b.0, double %b.1) nounwind { > +entry: > + ret void > +} > + > +define void > @_ZNK16ComplexBenchmark9oop_styleEv(%struct.ComplexBenchmark* %this) > nounwind { > +entry: > + %tmp = alloca %struct.Complex ; <%struct.Complex*> [#uses=2] > + br label %bb31 > + > +bb: ; preds = %bb31 > + call void @_Zml7ComplexS_( %struct.Complex* sret %tmp, double > 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double > 0.000000e+00 ) nounwind > + %tmp21 = getelementptr %struct.Complex* %tmp, i32 0, i32 1 ; > [#uses=0] > + br label %bb31 > + > +bb31: ; preds = %bb, %entry > + br i1 false, label %bb, label %return > + > +return: ; preds = %bb31 > + ret void > +} > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dpatel at apple.com Tue Mar 4 15:32:09 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Mar 2008 21:32:09 -0000 Subject: [llvm-commits] [llvm] r47906 - /llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Message-ID: <200803042132.m24LW94w005772@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 4 15:32:09 2008 New Revision: 47906 URL: http://llvm.org/viewvc/llvm-project?rev=47906&view=rev Log: Filter nested structs Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp?rev=47906&r1=47905&r2=47906&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Tue Mar 4 15:32:09 2008 @@ -48,6 +48,7 @@ bool isSafeToUpdateAllCallers(Function *F); Function *cloneFunctionBody(Function *F, const StructType *STy); void updateCallSites(Function *F, Function *NF); + bool nestedStructType(const StructType *STy); }; char SRETPromotion::ID = 0; @@ -88,6 +89,9 @@ dyn_cast(FArgType->getElementType()); assert (STy && "Invalid sret parameter element type"); + if (nestedStructType(STy)) + return false; + // Check if it is ok to perform this promotion. if (isSafeToUpdateAllCallers(F) == false) { NumRejectedSRETUses++; @@ -319,3 +323,15 @@ Call->eraseFromParent(); } } + +/// nestedStructType - Return true if STy includes any +/// other aggregate types +bool SRETPromotion::nestedStructType(const StructType *STy) { + unsigned Num = STy->getNumElements(); + for (unsigned i = 0; i < Num; i++) { + const Type *Ty = STy->getElementType(i); + if (!Ty->isFirstClassType() && Ty != Type::VoidTy) + return true; + } + return false; +} From dpatel at apple.com Tue Mar 4 15:45:28 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Mar 2008 21:45:28 -0000 Subject: [llvm-commits] [llvm] r47907 - in /llvm/trunk: lib/Transforms/Utils/InlineFunction.cpp test/Transforms/Inline/2008-03-04-StructRet.ll Message-ID: <200803042145.m24LjSdX006288@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 4 15:45:28 2008 New Revision: 47907 URL: http://llvm.org/viewvc/llvm-project?rev=47907&view=rev Log: Use cast instead of dyn_cast. Update test to use multiple return value directly, instead of relying on -sretpromotion. Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp llvm/trunk/test/Transforms/Inline/2008-03-04-StructRet.ll Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp?rev=47907&r1=47906&r2=47907&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Tue Mar 4 15:45:28 2008 @@ -448,8 +448,7 @@ // Multiple return values. for (Value::use_iterator RUI = TheCall->use_begin(), RUE = TheCall->use_end(); RUI != RUE; ) { - GetResultInst *GR = dyn_cast(RUI++); - assert (GR && "Invalid Call instruction use!"); + GetResultInst *GR = cast(RUI++); Value *RV = R->getOperand(GR->getIndex()); GR->replaceAllUsesWith(RV); GR->eraseFromParent(); Modified: llvm/trunk/test/Transforms/Inline/2008-03-04-StructRet.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/2008-03-04-StructRet.ll?rev=47907&r1=47906&r2=47907&view=diff ============================================================================== --- llvm/trunk/test/Transforms/Inline/2008-03-04-StructRet.ll (original) +++ llvm/trunk/test/Transforms/Inline/2008-03-04-StructRet.ll Tue Mar 4 15:45:28 2008 @@ -1,26 +1,28 @@ -; RUN: llvm-as < %s | opt -inline -sretpromotion -disable-output +; RUN: llvm-as < %s | opt -inline -disable-output %struct.Benchmark = type { i32 (...)** } %struct.Complex = type { double, double } %struct.ComplexBenchmark = type { %struct.Benchmark } -define void @_Zml7ComplexS_(%struct.Complex* sret %agg.result, double %a.0, double %a.1, double %b.0, double %b.1) nounwind { +define %struct.Complex @_Zml7ComplexS_1(double %a.0, double %a.1, double %b.0, double %b.1) nounwind { entry: - ret void + %mrv = alloca %struct.Complex ; <%struct.Complex*> [#uses=2] + %mrv.gep = getelementptr %struct.Complex* %mrv, i32 0, i32 0 ; [#uses=1] + %mrv.ld = load double* %mrv.gep ; [#uses=1] + %mrv.gep1 = getelementptr %struct.Complex* %mrv, i32 0, i32 1 ; [#uses=1] + %mrv.ld2 = load double* %mrv.gep1 ; [#uses=1] + ret double %mrv.ld, double %mrv.ld2 } define void @_ZNK16ComplexBenchmark9oop_styleEv(%struct.ComplexBenchmark* %this) nounwind { entry: - %tmp = alloca %struct.Complex ; <%struct.Complex*> [#uses=2] + %tmp = alloca %struct.Complex ; <%struct.Complex*> [#uses=0] br label %bb31 - bb: ; preds = %bb31 - call void @_Zml7ComplexS_( %struct.Complex* sret %tmp, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00 ) nounwind - %tmp21 = getelementptr %struct.Complex* %tmp, i32 0, i32 1 ; [#uses=0] + call %struct.Complex @_Zml7ComplexS_1( double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00 ) nounwind ; <%struct.Complex>:0 [#uses=1] + %gr = getresult %struct.Complex %0, 1 ; [#uses=0] br label %bb31 - bb31: ; preds = %bb, %entry br i1 false, label %bb, label %return - return: ; preds = %bb31 ret void } From dpatel at apple.com Tue Mar 4 15:46:01 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 4 Mar 2008 13:46:01 -0800 Subject: [llvm-commits] [llvm] r47904 - in /llvm/trunk: lib/Transforms/Utils/InlineFunction.cpp test/Transforms/Inline/2008-03-04-StructRet.ll In-Reply-To: References: <200803042115.m24LFGx6005243@zion.cs.uiuc.edu> Message-ID: <49A88053-2044-4F73-AFCF-220D41E9F57D@apple.com> On Mar 4, 2008, at 1:31 PM, Chris Lattner wrote: > > Just use cast<> here instead of dyn_cast. cast<> doesn't have a cost > when assertions are disabled, dyn_cast does, this also allows you to > remove the assert. > > Also, it isn't a big deal, but it is more idiomatic and simpler to > write the loop as: > > while (!TheCall->use_empty()) { > GetResultInst *GR = cast(TheCall->use_back()); > ... > } ok >> >> = >> ===================================================================== >> --- llvm/trunk/test/Transforms/Inline/2008-03-04-StructRet.ll (added) >> +++ llvm/trunk/test/Transforms/Inline/2008-03-04-StructRet.ll Tue >> Mar 4 15:15:15 2008 >> @@ -0,0 +1,26 @@ >> +; RUN: llvm-as < %s | opt -inline -sretpromotion -disable-output > > This test should not run sretpromotion, just use a .ll file from after > sretpromotion is run. Done. - Devang From isanbard at gmail.com Tue Mar 4 15:54:03 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 4 Mar 2008 13:54:03 -0800 Subject: [llvm-commits] [llvm] r47863 - in /llvm/trunk: include/llvm/CodeGen/RegisterScavenging.h lib/Target/PowerPC/PPCInstrInfo.cpp lib/Target/PowerPC/PPCInstrInfo.td lib/Target/PowerPC/PPCMachineFunctionInfo.h lib/Target/PowerPC/PPCRegisterInfo.cpp lib Message-ID: <16e5fdf90803041354g24548589y8fbc2a9402bb2ccf@mail.gmail.com> On Tue, Mar 4, 2008 at 1:19 PM, Chris Lattner wrote: > > On Mar 3, 2008, at 2:19 PM, Bill Wendling wrote: > > Author: void > > Date: Mon Mar 3 16:19:16 2008 > > New Revision: 47863 > > > > URL: http://llvm.org/viewvc/llvm-project?rev=47863&view=rev > > Log: > > This is the initial check-in for adding register scavenging to PPC. > > (Currently, > > PPC-64 doesn't work.) This also lowers the spilling of the CR > > registers so that > > it uses a register other than the default R0 register (the scavenger > > scrounges > > for one). A significant part of this patch fixes how kill > > information is > > handled. > > To clarify, this is just not enabled for PPC64 - so it doesn't cause a > regression, right? > This shouldn't regress PPC64, yes. -bw From dpatel at apple.com Tue Mar 4 15:54:56 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Mar 2008 21:54:56 -0000 Subject: [llvm-commits] [llvm] r47908 - in /llvm/trunk: include/llvm/DerivedTypes.h lib/VMCore/Type.cpp Message-ID: <200803042154.m24Lsuq1006614@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 4 15:54:56 2008 New Revision: 47908 URL: http://llvm.org/viewvc/llvm-project?rev=47908&view=rev Log: Revert SmallVector ctor variants. Modified: llvm/trunk/include/llvm/DerivedTypes.h llvm/trunk/lib/VMCore/Type.cpp Modified: llvm/trunk/include/llvm/DerivedTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/DerivedTypes.h?rev=47908&r1=47907&r2=47908&view=diff ============================================================================== --- llvm/trunk/include/llvm/DerivedTypes.h (original) +++ llvm/trunk/include/llvm/DerivedTypes.h Tue Mar 4 15:54:56 2008 @@ -19,7 +19,6 @@ #define LLVM_DERIVED_TYPES_H #include "llvm/Type.h" -#include "llvm/ADT/SmallVector.h" namespace llvm { @@ -145,8 +144,6 @@ const FunctionType &operator=(const FunctionType &); // Do not implement FunctionType(const Type *Result, const std::vector &Params, bool IsVarArgs); - FunctionType(const Type *Result, const SmallVectorImpl &Params, - bool IsVarArgs); public: /// FunctionType::get - This static method is the primary way of constructing @@ -158,12 +155,6 @@ bool isVarArg ///< Whether this is a variable argument length function ); - static FunctionType *get( - const Type *Result, ///< The result type - const SmallVectorImpl &Params, ///< The types of the parameters - bool isVarArg ///< Whether this is a variable argument length function - ); - inline bool isVarArg() const { return isVarArgs; } inline const Type *getReturnType() const { return ContainedTys[0]; } Modified: llvm/trunk/lib/VMCore/Type.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Type.cpp?rev=47908&r1=47907&r2=47908&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Type.cpp (original) +++ llvm/trunk/lib/VMCore/Type.cpp Tue Mar 4 15:54:56 2008 @@ -460,30 +460,6 @@ setAbstract(isAbstract); } -FunctionType::FunctionType(const Type *Result, - const SmallVectorImpl &Params, - bool IsVarArgs) - : DerivedType(FunctionTyID), isVarArgs(IsVarArgs) { - ContainedTys = reinterpret_cast(this+1); - NumContainedTys = Params.size() + 1; // + 1 for result type - assert((Result->isFirstClassType() || Result == Type::VoidTy || - Result->getTypeID() == Type::StructTyID || - isa(Result)) && - "LLVM functions cannot return aggregates"); - bool isAbstract = Result->isAbstract(); - new (&ContainedTys[0]) PATypeHandle(Result, this); - - for (unsigned i = 0; i != Params.size(); ++i) { - assert((Params[i]->isFirstClassType() || isa(Params[i])) && - "Function arguments must be value types!"); - new (&ContainedTys[i+1]) PATypeHandle(Params[i],this); - isAbstract |= Params[i]->isAbstract(); - } - - // Calculate whether or not this type is abstract - setAbstract(isAbstract); -} - StructType::StructType(const std::vector &Types, bool isPacked) : CompositeType(StructTyID) { ContainedTys = reinterpret_cast(this + 1); @@ -1079,12 +1055,6 @@ ArgTypes.push_back(args[i]); } - FunctionValType(const Type *ret, const SmallVectorImpl &args, - bool isVA) : RetTy(ret), isVarArg(isVA) { - for (unsigned i = 0; i < args.size(); ++i) - ArgTypes.push_back(args[i]); - } - static FunctionValType get(const FunctionType *FT); static unsigned hashTypeStructure(const FunctionType *FT) { @@ -1138,27 +1108,6 @@ return FT; } -// FunctionType::get - The factory function for the FunctionType class... -FunctionType *FunctionType::get(const Type *ReturnType, - const SmallVectorImpl &Params, - bool isVarArg) { - FunctionValType VT(ReturnType, Params, isVarArg); - FunctionType *FT = FunctionTypes->get(VT); - if (FT) { - return FT; - } - - FT = (FunctionType*) new char[sizeof(FunctionType) + - sizeof(PATypeHandle)*(Params.size()+1)]; - new (FT) FunctionType(ReturnType, Params, isVarArg); - FunctionTypes->add(VT, FT); - -#ifdef DEBUG_MERGE_TYPES - DOUT << "Derived new type: " << FT << "\n"; -#endif - return FT; -} - //===----------------------------------------------------------------------===// // Array Type Factory... // From dpatel at apple.com Tue Mar 4 15:55:53 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 4 Mar 2008 13:55:53 -0800 Subject: [llvm-commits] [llvm] r47895 - in /llvm/trunk: include/llvm/DerivedTypes.h lib/VMCore/Type.cpp In-Reply-To: References: <200803041857.m24Iv6Ck000553@zion.cs.uiuc.edu> Message-ID: <0534867B-89DC-447E-98BA-189B21D6CFAC@apple.com> On Mar 4, 2008, at 1:17 PM, Chris Lattner wrote: >>>> URL: http://llvm.org/viewvc/llvm-project?rev=47895&view=rev >>>> Log: >>>> Add FunctionType ctor variant that takes SmallVector params. >>>> >>>> >>>> #include "llvm/Type.h" >>>> +#include "llvm/ADT/SmallVector.h" >>> >>> Instead of making this specific to smallvector, how about passing in >>> pointer to pointer + count instead? That eliminates the #include >>> and >>> allows it to work with arrays on the stack and scalars. >> >> I will do that conversion also. I did not do it immediately because >> it >> required many mechanical changes. > > Just start using it where you would use the smallvector one, other > existing clients don't need to change. I'd really like to avoid > DerivedTypes.h #including SmallVector. My simplification run into something else, so I am not using SmallVector version right now. I just reverted this patch for now :) - Devang From dpatel at apple.com Tue Mar 4 15:59:49 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Mar 2008 21:59:49 -0000 Subject: [llvm-commits] [llvm] r47909 - /llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Message-ID: <200803042159.m24Lxn2X006800@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 4 15:59:49 2008 New Revision: 47909 URL: http://llvm.org/viewvc/llvm-project?rev=47909&view=rev Log: Use while loop. Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp?rev=47909&r1=47908&r2=47909&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Tue Mar 4 15:59:49 2008 @@ -446,9 +446,8 @@ ReturnInst *R = Returns[0]; if (R->getNumOperands() > 1) { // Multiple return values. - for (Value::use_iterator RUI = TheCall->use_begin(), - RUE = TheCall->use_end(); RUI != RUE; ) { - GetResultInst *GR = cast(RUI++); + while (!TheCall->use_empty()) { + GetResultInst *GR = cast(TheCall->use_back()); Value *RV = R->getOperand(GR->getIndex()); GR->replaceAllUsesWith(RV); GR->eraseFromParent(); From dpatel at apple.com Tue Mar 4 16:05:14 2008 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Mar 2008 22:05:14 -0000 Subject: [llvm-commits] [llvm] r47911 - /llvm/trunk/lib/VMCore/AsmWriter.cpp Message-ID: <200803042205.m24M5EgE007013@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 4 16:05:14 2008 New Revision: 47911 URL: http://llvm.org/viewvc/llvm-project?rev=47911&view=rev Log: Print types for all ret operands. Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AsmWriter.cpp?rev=47911&r1=47910&r2=47911&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/AsmWriter.cpp (original) +++ llvm/trunk/lib/VMCore/AsmWriter.cpp Tue Mar 4 16:05:14 2008 @@ -1417,7 +1417,8 @@ const Type *TheType = Operand->getType(); // Select, Store and ShuffleVector always print all types. - if (isa(I) || isa(I) || isa(I)) { + if (isa(I) || isa(I) || isa(I) + || isa(I)) { PrintAllTypes = true; } else { for (unsigned i = 1, E = I.getNumOperands(); i != E; ++i) { From andrewl at lenharth.org Tue Mar 4 16:23:16 2008 From: andrewl at lenharth.org (Andrew Lenharth) Date: Tue, 4 Mar 2008 16:23:16 -0600 Subject: [llvm-commits] [llvm-gcc-4.2] r47905 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <200803042118.m24LIdd4005387@zion.cs.uiuc.edu> References: <200803042118.m24LIdd4005387@zion.cs.uiuc.edu> Message-ID: <85dfcd7f0803041423o521976ep8f15a9304b3570f9@mail.gmail.com> x86-32 doesn't support 64 bit CAS, working on it. On 3/4/08, Andrew Lenharth wrote: > Author: alenhar2 > Date: Tue Mar 4 15:18:39 2008 > New Revision: 47905 > > URL: http://llvm.org/viewvc/llvm-project?rev=47905&view=rev > Log: > x86-64 supports these now, this builds fine now on linux/x86-64 > > Modified: > llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > > Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47905&r1=47904&r2=47905&view=diff > > ============================================================================== > --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) > +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Mar 4 15:18:39 2008 > @@ -4294,7 +4294,7 @@ > C, C + 5); > return true; > } > -#if defined(TARGET_ALPHA) > +#if defined(TARGET_ALPHA) || defined(TARGET_386) > //gcc uses many names for the sync intrinsics > case BUILT_IN_VAL_COMPARE_AND_SWAP_1: > case BUILT_IN_VAL_COMPARE_AND_SWAP_2: > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From gohman at apple.com Tue Mar 4 16:39:55 2008 From: gohman at apple.com (Dan Gohman) Date: Tue, 4 Mar 2008 14:39:55 -0800 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <522BCA72-6445-4857-BE7B-019B841AA9DB@apple.com> <2DFEE2ED-2D57-4310-8F6C-1B08F18D4363@apple.com> Message-ID: <388F3E9D-F770-402B-8744-6D1501642885@apple.com> On Mar 4, 2008, at 10:37 AM, Roman Levenstein wrote: >> >> I thought those were approved? We understanding std::set is probably >> the best choice of ADT for now. Thanks! > > OK. I'll commit them tomorrow. Great! Note that I did have one comment on the ScheduleDAGList.cpp patch. > > But are you sure about the second one for the ScheduleDAGRRList? > I mean this: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20080303/059078.html I just took a look at this one. Here are my comments. > + // This may break the ordering in the priority queue. > PredSU->CycleBound = std::max(PredSU->CycleBound, > I->Dep->Cycle + PredSU->Latency); This seems dangerous. After this is done, updateNode is called, which attempts to remove the node from the set, but if the node has changed in a way that's significant to the comparison function, that remove may not work properly. It looks like the only way to be safe is to remove the node from the queue before making any modifications. > + for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { > + Queue.insert(Nodes[i]); > + } This could be simplified with Queue.insert(Nodes.begin(), Nodes.end()); > + SUnit *V = *Queue.rbegin(); > + Queue.erase(--Queue.end(),Queue.end()); This could be simplified with Queue.erase(prior(Queue.end()); or even iterator i = prior(Queue.rbegin()); SUnit *V = *i; Queue.erase(i); `prior' is defined in llvm/ADT/STLExtras.h. > - unsigned LBonus = (SumOfUnscheduledPredsOfSuccs(left) == 1) ? 2 : 0; > - unsigned RBonus = (SumOfUnscheduledPredsOfSuccs(right) == 1) ? 2 : 0; > + unsigned LBonus = (SumOfUnscheduledPredsOfSuccs(left,1) == 1) ? 2 : 0; > + unsigned RBonus = (SumOfUnscheduledPredsOfSuccs(right,1) == 1) ? 2 : 0; It's not clear to me what this change is doing. Well, the original code isn't quite clear to me either :-}. Is this a heuristic change? Dan From isanbard at gmail.com Tue Mar 4 17:13:51 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 04 Mar 2008 23:13:51 -0000 Subject: [llvm-commits] [llvm] r47915 - in /llvm/trunk/lib/Target/PowerPC: PPCInstrInfo.cpp PPCRegisterInfo.cpp Message-ID: <200803042313.m24NDqcq009236@zion.cs.uiuc.edu> Author: void Date: Tue Mar 4 17:13:51 2008 New Revision: 47915 URL: http://llvm.org/viewvc/llvm-project?rev=47915&view=rev Log: Use a command-line option to turn register scavenging on/off for PPC. Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=47915&r1=47914&r2=47915&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp Tue Mar 4 17:13:51 2008 @@ -19,8 +19,11 @@ #include "PPCTargetMachine.h" #include "llvm/ADT/STLExtras.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/Support/CommandLine.h" using namespace llvm; +extern cl::opt EnablePPCRS; // FIXME (64-bit): See PPCRegisterInfo.cpp. + PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm) : TargetInstrInfoImpl(PPCInsts, array_lengthof(PPCInsts)), TM(tm), RI(*TM.getSubtargetImpl(), *this) {} @@ -320,8 +323,7 @@ static bool StoreRegToStackSlot(const TargetInstrInfo &TII, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, - SmallVectorImpl &NewMIs, - bool isPPC64/*FIXME (64-bit): Remove.*/) { + SmallVectorImpl &NewMIs) { if (RC == PPC::GPRCRegisterClass) { if (SrcReg != PPC::LR) { NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STW)) @@ -353,7 +355,7 @@ NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STFS)) .addReg(SrcReg, false, false, isKill), FrameIdx)); } else if (RC == PPC::CRRCRegisterClass) { - if (!isPPC64) { // FIXME (64-bit): Enable + if (EnablePPCRS) { // FIXME (64-bit): Enable NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::SPILL_CR)) .addReg(SrcReg, false, false, isKill), FrameIdx)); @@ -402,8 +404,7 @@ const TargetRegisterClass *RC) const { SmallVector NewMIs; - if (StoreRegToStackSlot(*this, SrcReg, isKill, FrameIdx, RC, NewMIs, - TM.getSubtargetImpl()->isPPC64()/*FIXME (64-bit): Remove.*/)) { + if (StoreRegToStackSlot(*this, SrcReg, isKill, FrameIdx, RC, NewMIs)) { PPCFunctionInfo *FuncInfo = MBB.getParent()->getInfo(); FuncInfo->setSpillsCR(); } @@ -418,8 +419,8 @@ const TargetRegisterClass *RC, SmallVectorImpl &NewMIs) const{ if (Addr[0].isFrameIndex()) { - if (StoreRegToStackSlot(*this, SrcReg, isKill, Addr[0].getIndex(), RC, NewMIs, - TM.getSubtargetImpl()->isPPC64()/*FIXME (64-bit): Remove.*/)) { + if (StoreRegToStackSlot(*this, SrcReg, isKill, Addr[0].getIndex(), + RC, NewMIs)) { PPCFunctionInfo *FuncInfo = MF.getInfo(); FuncInfo->setSpillsCR(); } Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=47915&r1=47914&r2=47915&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Tue Mar 4 17:13:51 2008 @@ -42,10 +42,16 @@ #include using namespace llvm; +// FIXME (64-bit): Eventually enable by default. +cl::opt EnablePPCRS("enable-ppc-regscavenger", + cl::init(false), + cl::desc("enable PPC register scavenger"), + cl::Hidden); + // FIXME (64-bit): Should be inlined. bool PPCRegisterInfo::requiresRegisterScavenging(const MachineFunction &) const { - return !Subtarget.isPPC64(); + return EnablePPCRS; } /// getRegisterNumbering - Given the enum value for some register, e.g. @@ -310,7 +316,8 @@ Reserved.set(PPC::R13); Reserved.set(PPC::R31); - Reserved.set(PPC::R0); // FIXME (64-bit): Remove + if (!EnablePPCRS) + Reserved.set(PPC::R0); // FIXME (64-bit): Remove Reserved.set(PPC::X0); Reserved.set(PPC::X1); @@ -414,7 +421,7 @@ // FIXME (64-bit): Use "findScratchRegister" unsigned Reg; - if (!LP64) + if (EnablePPCRS) Reg = findScratchRegister(II, RS, RC, SPAdj); else Reg = PPC::R0; @@ -424,10 +431,15 @@ .addReg(PPC::R31) .addImm(FrameSize); } else if (LP64) { - Reg = PPC::X0; // FIXME (64-bit): Remove. - BuildMI(MBB, II, TII.get(PPC::LD), Reg) - .addImm(0) - .addReg(PPC::X1); + if (!EnablePPCRS) + if (EnablePPCRS) // FIXME (64-bit): Use "true" version. + BuildMI(MBB, II, TII.get(PPC::LD), Reg) + .addImm(0) + .addReg(PPC::X1); + else + BuildMI(MBB, II, TII.get(PPC::LD), PPC::X0) + .addImm(0) + .addReg(PPC::X1); } else { BuildMI(MBB, II, TII.get(PPC::LWZ), Reg) .addImm(0) @@ -437,17 +449,16 @@ // Grow the stack and update the stack pointer link, then determine the // address of new allocated space. if (LP64) { -#if 0 // FIXME (64-bit): Enable - BuildMI(MBB, II, TII.get(PPC::STDUX)) - .addReg(Reg, false, false, true) - .addReg(PPC::X1) - .addReg(MI.getOperand(1).getReg()); -#else - BuildMI(MBB, II, TII.get(PPC::STDUX)) - .addReg(PPC::X0, false, false, true) - .addReg(PPC::X1) - .addReg(MI.getOperand(1).getReg()); -#endif + if (EnablePPCRS) // FIXME (64-bit): Use "true" version. + BuildMI(MBB, II, TII.get(PPC::STDUX)) + .addReg(Reg, false, false, true) + .addReg(PPC::X1) + .addReg(MI.getOperand(1).getReg()); + else + BuildMI(MBB, II, TII.get(PPC::STDUX)) + .addReg(PPC::X0, false, false, true) + .addReg(PPC::X1) + .addReg(MI.getOperand(1).getReg()); if (!MI.getOperand(1).isKill()) BuildMI(MBB, II, TII.get(PPC::ADDI8), MI.getOperand(0).getReg()) @@ -573,11 +584,11 @@ } // Special case for pseudo-op SPILL_CR. - if (!Subtarget.isPPC64()) // FIXME (64-bit): Remove. - if (OpC == PPC::SPILL_CR) { - lowerCRSpilling(II, FrameIndex, SPAdj, RS); - return; - } + if (EnablePPCRS) // FIXME (64-bit): Enable by default + if (OpC == PPC::SPILL_CR) { + lowerCRSpilling(II, FrameIndex, SPAdj, RS); + return; + } // Replace the FrameIndex with base register with GPR1 (SP) or GPR31 (FP). MI.getOperand(FIOperandNo).ChangeToRegister(hasFP(MF) ? PPC::R31 : PPC::R1, @@ -627,7 +638,7 @@ // FIXME (64-bit): Use "findScratchRegister". unsigned SReg; - if (!Subtarget.isPPC64()) + if (EnablePPCRS) SReg = findScratchRegister(II, RS, &PPC::GPRCRegClass, SPAdj); else SReg = PPC::R0; @@ -879,14 +890,14 @@ // FIXME: doesn't detect whether or not we need to spill vXX, which requires // r0 for now. - if (!IsPPC64) // FIXME (64-bit): Enable. - if (needsFP(MF) || spillsCR(MF)) { - const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; - const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; - const TargetRegisterClass *RC = IsPPC64 ? G8RC : GPRC; - RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(), - RC->getAlignment())); - } + if (EnablePPCRS) // FIXME (64-bit): Enable. + if (needsFP(MF) || spillsCR(MF)) { + const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; + const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; + const TargetRegisterClass *RC = IsPPC64 ? G8RC : GPRC; + RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(), + RC->getAlignment())); + } } void From isanbard at gmail.com Tue Mar 4 17:16:26 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 04 Mar 2008 23:16:26 -0000 Subject: [llvm-commits] [llvm] r47916 - /llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll Message-ID: <200803042316.m24NGQbD009314@zion.cs.uiuc.edu> Author: void Date: Tue Mar 4 17:16:26 2008 New Revision: 47916 URL: http://llvm.org/viewvc/llvm-project?rev=47916&view=rev Log: Use -enable-ppc-regscavenger flag for these checks Modified: llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll Modified: llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll?rev=47916&r1=47915&r2=47916&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll Tue Mar 4 17:16:26 2008 @@ -1,6 +1,6 @@ ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ ; RUN: grep {stw r31, 20(r1)} -; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -enable-ppc-regscavenger | \ ; RUN: grep {stwu r1, -80(r1)} ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ ; RUN: grep {lwz r1, 0(r1)} @@ -8,7 +8,7 @@ ; RUN: grep {lwz r31, 20(r1)} ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ ; RUN: grep {stw r31, 20(r1)} -; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim -enable-ppc-regscavenger | \ ; RUN: grep {stwu r1, -80(r1)} ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \ ; RUN: grep {lwz r1, 0(r1)} From dalej at apple.com Tue Mar 4 17:17:14 2008 From: dalej at apple.com (Dale Johannesen) Date: Tue, 04 Mar 2008 23:17:14 -0000 Subject: [llvm-commits] [llvm] r47917 - in /llvm/trunk/lib/Target/PowerPC: PPCISelLowering.cpp PPCISelLowering.h Message-ID: <200803042317.m24NHEwO009351@zion.cs.uiuc.edu> Author: johannes Date: Tue Mar 4 17:17:14 2008 New Revision: 47917 URL: http://llvm.org/viewvc/llvm-project?rev=47917&view=rev Log: Move PPC lowering functions into PPCTargetLowering class (cosmetic). First piece of byval implementation; this doesn't work yet. No functional change. Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=47917&r1=47916&r2=47917&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Tue Mar 4 17:17:14 2008 @@ -1026,7 +1026,8 @@ // LowerOperation implementation //===----------------------------------------------------------------------===// -static SDOperand LowerConstantPool(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerConstantPool(SDOperand Op, + SelectionDAG &DAG) { MVT::ValueType PtrVT = Op.getValueType(); ConstantPoolSDNode *CP = cast(Op); Constant *C = CP->getConstVal(); @@ -1057,7 +1058,7 @@ return Lo; } -static SDOperand LowerJumpTable(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerJumpTable(SDOperand Op, SelectionDAG &DAG) { MVT::ValueType PtrVT = Op.getValueType(); JumpTableSDNode *JT = cast(Op); SDOperand JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT); @@ -1087,11 +1088,13 @@ return Lo; } -static SDOperand LowerGlobalTLSAddress(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerGlobalTLSAddress(SDOperand Op, + SelectionDAG &DAG) { assert(0 && "TLS not implemented for PPC."); } -static SDOperand LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerGlobalAddress(SDOperand Op, + SelectionDAG &DAG) { MVT::ValueType PtrVT = Op.getValueType(); GlobalAddressSDNode *GSDN = cast(Op); GlobalValue *GV = GSDN->getGlobal(); @@ -1131,7 +1134,7 @@ return DAG.getLoad(PtrVT, DAG.getEntryNode(), Lo, NULL, 0); } -static SDOperand LowerSETCC(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerSETCC(SDOperand Op, SelectionDAG &DAG) { ISD::CondCode CC = cast(Op.getOperand(2))->get(); // If we're comparing for equality to zero, expose the fact that this is @@ -1173,7 +1176,7 @@ return SDOperand(); } -static SDOperand LowerVAARG(SDOperand Op, SelectionDAG &DAG, +SDOperand PPCTargetLowering::LowerVAARG(SDOperand Op, SelectionDAG &DAG, int VarArgsFrameIndex, int VarArgsStackOffset, unsigned VarArgsNumGPR, @@ -1183,7 +1186,7 @@ assert(0 && "VAARG in ELF32 ABI not implemented yet!"); } -static SDOperand LowerVASTART(SDOperand Op, SelectionDAG &DAG, +SDOperand PPCTargetLowering::LowerVASTART(SDOperand Op, SelectionDAG &DAG, int VarArgsFrameIndex, int VarArgsStackOffset, unsigned VarArgsNumGPR, @@ -1289,7 +1292,8 @@ return FPR; } -static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG, +SDOperand PPCTargetLowering::LowerFORMAL_ARGUMENTS(SDOperand Op, + SelectionDAG &DAG, int &VarArgsFrameIndex, int &VarArgsStackOffset, unsigned &VarArgsNumGPR, @@ -1566,9 +1570,25 @@ DAG.getTargetLoweringInfo().getPointerTy()).Val; } +/// CreateCopyOfByValArgument - Make a copy of an aggregate at address specified +/// by "Src" to address "Dst" of size "Size". Alignment information is +/// specified by the specific parameter attribute. The copy will be passed as +/// a byval function parameter. +/// Sometimes what we are copying is the end of a larger object, the part that +/// does not fit in registers. +static SDOperand +CreateCopyOfByValArgument(SDOperand Src, SDOperand Dst, SDOperand Chain, + unsigned Flags, SelectionDAG &DAG, unsigned Size) { + unsigned Align = 1 << + ((Flags & ISD::ParamFlags::ByValAlign) >> ISD::ParamFlags::ByValAlignOffs); + SDOperand AlignNode = DAG.getConstant(Align, MVT::i32); + SDOperand SizeNode = DAG.getConstant(Size, MVT::i32); + SDOperand AlwaysInline = DAG.getConstant(1, MVT::i32); + return DAG.getMemcpy(Chain, Dst, Src, SizeNode, AlignNode, AlwaysInline); +} -static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG, - const PPCSubtarget &Subtarget) { +SDOperand PPCTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG, + const PPCSubtarget &Subtarget) { SDOperand Chain = Op.getOperand(0); bool isVarArg = cast(Op.getOperand(2))->getValue() != 0; SDOperand Callee = Op.getOperand(4); @@ -1592,7 +1612,11 @@ // Add up all the space actually used. for (unsigned i = 0; i != NumOps; ++i) { + unsigned Flags = cast(Op.getOperand(5+2*i+1))->getValue(); unsigned ArgSize =MVT::getSizeInBits(Op.getOperand(5+2*i).getValueType())/8; + if (Flags & ISD::ParamFlags::ByVal) + ArgSize = (Flags & ISD::ParamFlags::ByValSize) >> + ISD::ParamFlags::ByValSizeOffs; ArgSize = std::max(ArgSize, PtrByteSize); NumBytes += ArgSize; } @@ -1678,7 +1702,30 @@ Arg = DAG.getNode(ExtOp, MVT::i64, Arg); } - + + // FIXME Elf untested, what are alignment rules? + if (Flags & ISD::ParamFlags::ByVal) { + unsigned Size = (Flags & ISD::ParamFlags::ByValSize) >> + ISD::ParamFlags::ByValSizeOffs; + if (isELF32_ABI && Expand) GPR_idx += (GPR_idx % 2); + for (unsigned j=0; j RVLocs; unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg(); @@ -1954,7 +2002,7 @@ return DAG.getNode(PPCISD::RET_FLAG, MVT::Other, Chain); } -static SDOperand LowerSTACKRESTORE(SDOperand Op, SelectionDAG &DAG, +SDOperand PPCTargetLowering::LowerSTACKRESTORE(SDOperand Op, SelectionDAG &DAG, const PPCSubtarget &Subtarget) { // When we pop the dynamic allocation we need to restore the SP link. @@ -1980,7 +2028,8 @@ return DAG.getStore(Chain, LoadLinkSP, StackPtr, NULL, 0); } -static SDOperand LowerDYNAMIC_STACKALLOC(SDOperand Op, SelectionDAG &DAG, +SDOperand PPCTargetLowering::LowerDYNAMIC_STACKALLOC(SDOperand Op, + SelectionDAG &DAG, const PPCSubtarget &Subtarget) { MachineFunction &MF = DAG.getMachineFunction(); bool IsPPC64 = Subtarget.isPPC64(); @@ -2022,7 +2071,7 @@ /// LowerSELECT_CC - Lower floating point select_cc's into fsel instruction when /// possible. -static SDOperand LowerSELECT_CC(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerSELECT_CC(SDOperand Op, SelectionDAG &DAG) { // Not FP? Not a fsel. if (!MVT::isFloatingPoint(Op.getOperand(0).getValueType()) || !MVT::isFloatingPoint(Op.getOperand(2).getValueType())) @@ -2102,7 +2151,7 @@ } // FIXME: Split this code up when LegalizeDAGTypes lands. -static SDOperand LowerFP_TO_SINT(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerFP_TO_SINT(SDOperand Op, SelectionDAG &DAG) { assert(MVT::isFloatingPoint(Op.getOperand(0).getValueType())); SDOperand Src = Op.getOperand(0); if (Src.getValueType() == MVT::f32) @@ -2133,7 +2182,8 @@ return DAG.getLoad(Op.getValueType(), Chain, FIPtr, NULL, 0); } -static SDOperand LowerFP_ROUND_INREG(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerFP_ROUND_INREG(SDOperand Op, + SelectionDAG &DAG) { assert(Op.getValueType() == MVT::ppcf128); SDNode *Node = Op.Val; assert(Node->getOperand(0).getValueType() == MVT::ppcf128); @@ -2191,7 +2241,7 @@ return DAG.getNode(ISD::BUILD_PAIR, Lo.getValueType(), FPreg, FPreg); } -static SDOperand LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) { if (Op.getOperand(0).getValueType() == MVT::i64) { SDOperand Bits = DAG.getNode(ISD::BIT_CONVERT, MVT::f64, Op.getOperand(0)); SDOperand FP = DAG.getNode(PPCISD::FCFID, MVT::f64, Bits); @@ -2230,7 +2280,7 @@ return FP; } -static SDOperand LowerFLT_ROUNDS_(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerFLT_ROUNDS_(SDOperand Op, SelectionDAG &DAG) { /* The rounding mode is in bits 30:31 of FPSR, and has the following settings: @@ -2291,7 +2341,7 @@ ISD::TRUNCATE : ISD::ZERO_EXTEND), VT, RetVal); } -static SDOperand LowerSHL_PARTS(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerSHL_PARTS(SDOperand Op, SelectionDAG &DAG) { assert(Op.getNumOperands() == 3 && Op.getValueType() == MVT::i32 && Op.getOperand(1).getValueType() == MVT::i32 && "Unexpected SHL!"); @@ -2316,7 +2366,7 @@ OutOps, 2); } -static SDOperand LowerSRL_PARTS(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerSRL_PARTS(SDOperand Op, SelectionDAG &DAG) { assert(Op.getNumOperands() == 3 && Op.getValueType() == MVT::i32 && Op.getOperand(1).getValueType() == MVT::i32 && "Unexpected SRL!"); @@ -2341,7 +2391,7 @@ OutOps, 2); } -static SDOperand LowerSRA_PARTS(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerSRA_PARTS(SDOperand Op, SelectionDAG &DAG) { assert(Op.getNumOperands() == 3 && Op.getValueType() == MVT::i32 && Op.getOperand(1).getValueType() == MVT::i32 && "Unexpected SRA!"); @@ -2533,7 +2583,8 @@ // selects to a single instruction, return Op. Otherwise, if we can codegen // this case more efficiently than a constant pool load, lower it to the // sequence of ops that should be used. -static SDOperand LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerBUILD_VECTOR(SDOperand Op, + SelectionDAG &DAG) { // If this is a vector of constants or undefs, get the bits. A bit in // UndefBits is set if the corresponding element of the vector is an // ISD::UNDEF value. For undefs, the corresponding VectorBits values are @@ -2775,7 +2826,8 @@ /// is a shuffle we can handle in a single instruction, return it. Otherwise, /// return the code it can be lowered into. Worst case, it can always be /// lowered into a vperm. -static SDOperand LowerVECTOR_SHUFFLE(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerVECTOR_SHUFFLE(SDOperand Op, + SelectionDAG &DAG) { SDOperand V1 = Op.getOperand(0); SDOperand V2 = Op.getOperand(1); SDOperand PermMask = Op.getOperand(2); @@ -2939,7 +2991,8 @@ /// LowerINTRINSIC_WO_CHAIN - If this is an intrinsic that we want to custom /// lower, do it, otherwise return null. -static SDOperand LowerINTRINSIC_WO_CHAIN(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerINTRINSIC_WO_CHAIN(SDOperand Op, + SelectionDAG &DAG) { // If this is a lowered altivec predicate compare, CompareOpc is set to the // opcode number of the comparison. int CompareOpc; @@ -3005,7 +3058,8 @@ return Flags; } -static SDOperand LowerSCALAR_TO_VECTOR(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerSCALAR_TO_VECTOR(SDOperand Op, + SelectionDAG &DAG) { // Create a stack slot that is 16-byte aligned. MachineFrameInfo *FrameInfo = DAG.getMachineFunction().getFrameInfo(); int FrameIdx = FrameInfo->CreateStackObject(16, 16); @@ -3019,7 +3073,7 @@ return DAG.getLoad(Op.getValueType(), Store, FIdx, NULL, 0); } -static SDOperand LowerMUL(SDOperand Op, SelectionDAG &DAG) { +SDOperand PPCTargetLowering::LowerMUL(SDOperand Op, SelectionDAG &DAG) { if (Op.getValueType() == MVT::v4i32) { SDOperand LHS = Op.getOperand(0), RHS = Op.getOperand(1); Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h?rev=47917&r1=47916&r2=47917&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h Tue Mar 4 17:17:14 2008 @@ -295,6 +295,44 @@ SDOperand LowerRETURNADDR(SDOperand Op, SelectionDAG &DAG); SDOperand LowerFRAMEADDR(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerConstantPool(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerGlobalTLSAddress(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerJumpTable(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerSETCC(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerVASTART(SDOperand Op, SelectionDAG &DAG, + int VarArgsFrameIndex, int VarArgsStackOffset, + unsigned VarArgsNumGPR, unsigned VarArgsNumFPR, + const PPCSubtarget &Subtarget); + SDOperand LowerVAARG(SDOperand Op, SelectionDAG &DAG, int VarArgsFrameIndex, + int VarArgsStackOffset, unsigned VarArgsNumGPR, + unsigned VarArgsNumFPR, const PPCSubtarget &Subtarget); + SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG, + int &VarArgsFrameIndex, + int &VarArgsStackOffset, + unsigned &VarArgsNumGPR, + unsigned &VarArgsNumFPR, + const PPCSubtarget &Subtarget); + SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG, + const PPCSubtarget &Subtarget); + SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG, TargetMachine &TM); + SDOperand LowerSTACKRESTORE(SDOperand Op, SelectionDAG &DAG, + const PPCSubtarget &Subtarget); + SDOperand LowerDYNAMIC_STACKALLOC(SDOperand Op, SelectionDAG &DAG, + const PPCSubtarget &Subtarget); + SDOperand LowerSELECT_CC(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerFP_TO_SINT(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerFP_ROUND_INREG(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerFLT_ROUNDS_(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerSHL_PARTS(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerSRL_PARTS(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerSRA_PARTS(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerVECTOR_SHUFFLE(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerINTRINSIC_WO_CHAIN(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerSCALAR_TO_VECTOR(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerMUL(SDOperand Op, SelectionDAG &DAG); }; } From isanbard at gmail.com Tue Mar 4 17:27:33 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 04 Mar 2008 23:27:33 -0000 Subject: [llvm-commits] [llvm] r47918 - /llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Message-ID: <200803042327.m24NRX8U009675@zion.cs.uiuc.edu> Author: void Date: Tue Mar 4 17:27:33 2008 New Revision: 47918 URL: http://llvm.org/viewvc/llvm-project?rev=47918&view=rev Log: Removed spurious EnablePPCRS check. Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=47918&r1=47917&r2=47918&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Tue Mar 4 17:27:33 2008 @@ -431,7 +431,6 @@ .addReg(PPC::R31) .addImm(FrameSize); } else if (LP64) { - if (!EnablePPCRS) if (EnablePPCRS) // FIXME (64-bit): Use "true" version. BuildMI(MBB, II, TII.get(PPC::LD), Reg) .addImm(0) @@ -513,15 +512,15 @@ const TargetRegisterClass *RC = Subtarget.isPPC64() ? G8RC : GPRC; unsigned Reg = findScratchRegister(II, RS, RC, SPAdj); - // We need to store the CR in the low 4-bits of the saved value. First, issue - // an MFCR to save all of the CRBits. + // We need to store the CR in the low 4-bits of the saved value. First, issue + // an MFCR to save all of the CRBits. Add an implicit kill of the CR. if (!MI.getOperand(0).isKill()) BuildMI(MBB, II, TII.get(PPC::MFCR), Reg); else // Implicitly kill the CR register. BuildMI(MBB, II, TII.get(PPC::MFCR), Reg) .addReg(MI.getOperand(0).getReg(), false, true, true); - + // If the saved register wasn't CR0, shift the bits left so that they are in // CR0's slot. unsigned SrcReg = MI.getOperand(0).getReg(); From dpatel at apple.com Tue Mar 4 18:27:05 2008 From: dpatel at apple.com (Devang Patel) Date: Wed, 05 Mar 2008 00:27:05 -0000 Subject: [llvm-commits] [llvm] r47922 - /llvm/trunk/lib/VMCore/Verifier.cpp Message-ID: <200803050027.m250R5R1011689@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 4 18:27:05 2008 New Revision: 47922 URL: http://llvm.org/viewvc/llvm-project?rev=47922&view=rev Log: Check struct return type first. Modified: llvm/trunk/lib/VMCore/Verifier.cpp Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=47922&r1=47921&r2=47922&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Tue Mar 4 18:27:05 2008 @@ -581,18 +581,19 @@ Assert2(F->getReturnType() == Type::VoidTy, "Found return instr that returns void in Function of non-void " "return type!", &RI, F->getReturnType()); - else if (N == 1) - Assert2(F->getReturnType() == RI.getOperand(0)->getType(), - "Function return type does not match operand " - "type of return inst!", &RI, F->getReturnType()); else if (const StructType *STy = dyn_cast(F->getReturnType())) { for (unsigned i = 0; i < N; i++) Assert2(STy->getElementType(i) == RI.getOperand(i)->getType(), "Function return type does not match operand " "type of return inst!", &RI, F->getReturnType()); - } else + } + else if (N == 1) + Assert2(F->getReturnType() == RI.getOperand(0)->getType(), + "Function return type does not match operand " + "type of return inst!", &RI, F->getReturnType()); + else Assert1(0, "Invalid return type!", &RI); - + // Check to make sure that the return value has necessary properties for // terminators... visitTerminatorInst(RI); From dpatel at apple.com Tue Mar 4 18:36:59 2008 From: dpatel at apple.com (Devang Patel) Date: Wed, 05 Mar 2008 00:36:59 -0000 Subject: [llvm-commits] [llvm] r47924 - /llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp Message-ID: <200803050036.m250axON012027@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 4 18:36:59 2008 New Revision: 47924 URL: http://llvm.org/viewvc/llvm-project?rev=47924&view=rev Log: Skip functions that return multiple values. Modified: llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp Modified: llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp?rev=47924&r1=47923&r2=47924&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp Tue Mar 4 18:36:59 2008 @@ -50,6 +50,11 @@ // Loop over all of the blocks in a function, tracking all of the blocks that // return. // + + // PHINode can not handle aggregates returned by multiple value ret + // instructions. TODO: Handle each return value independently. + if (isa(F.getReturnType())) + return false; std::vector ReturningBlocks; std::vector UnwindingBlocks; std::vector UnreachableBlocks; From gohman at apple.com Tue Mar 4 18:41:34 2008 From: gohman at apple.com (Dan Gohman) Date: Tue, 4 Mar 2008 16:41:34 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <200803031053.00270.dag@cray.com> Message-ID: <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> On Mar 4, 2008, at 3:56 AM, Roman Levenstein wrote: > > make[5]: Entering directory > `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests/Vector/SSE' > make[5]: *** No rule to make target `Output/sse.expandfft.linked.rbc', > needed by `Output/sse.expandfft.linked.bc'. Stop. When I've seen this error, the problem has been that my base llvm build configure was run without an llvm-gcc in PATH. llvm-test apparently relies on the base llvm build to locate llvm-gcc for it. Dan From clattner at apple.com Tue Mar 4 18:43:01 2008 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Mar 2008 16:43:01 -0800 Subject: [llvm-commits] [llvm] r47924 - /llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp In-Reply-To: <200803050036.m250axON012027@zion.cs.uiuc.edu> References: <200803050036.m250axON012027@zion.cs.uiuc.edu> Message-ID: <048A68DE-20C1-4D02-806B-AB797E56F889@apple.com> On Mar 4, 2008, at 4:36 PM, Devang Patel wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=47924&view=rev > Log: > Skip functions that return multiple values. Why not fix this to insert multiple phi nodes? Clients of this pass only expect one return after it runs: you're breaking its invariant. -Chris > > > Modified: > llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp > > Modified: llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp?rev=47924&r1=47923&r2=47924&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp > (original) > +++ llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp Tue > Mar 4 18:36:59 2008 > @@ -50,6 +50,11 @@ > // Loop over all of the blocks in a function, tracking all of the > blocks that > // return. > // > + > + // PHINode can not handle aggregates returned by multiple value ret > + // instructions. TODO: Handle each return value independently. > + if (isa(F.getReturnType())) > + return false; > std::vector ReturningBlocks; > std::vector UnwindingBlocks; > std::vector UnreachableBlocks; > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Tue Mar 4 18:59:57 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 05 Mar 2008 00:59:57 -0000 Subject: [llvm-commits] [llvm] r47927 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/ lib/Target/ARM/ lib/Target/X86/ Message-ID: <200803050059.m250xwGF013035@zion.cs.uiuc.edu> Author: evancheng Date: Tue Mar 4 18:59:57 2008 New Revision: 47927 URL: http://llvm.org/viewvc/llvm-project?rev=47927&view=rev Log: Refactor code. Remove duplicated functions that basically do the same thing as findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies. Modified: llvm/trunk/include/llvm/CodeGen/LiveVariables.h llvm/trunk/include/llvm/CodeGen/MachineInstr.h llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/lib/CodeGen/LiveVariables.cpp llvm/trunk/lib/CodeGen/MachineInstr.cpp llvm/trunk/lib/CodeGen/PHIElimination.cpp llvm/trunk/lib/CodeGen/RegAllocLocal.cpp llvm/trunk/lib/CodeGen/RegisterScavenging.cpp llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp llvm/trunk/lib/CodeGen/VirtRegMap.cpp llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Modified: llvm/trunk/include/llvm/CodeGen/LiveVariables.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveVariables.h?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveVariables.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveVariables.h Tue Mar 4 18:59:57 2008 @@ -130,7 +130,7 @@ private: // Intermediate data structures MachineFunction *MF; - const TargetRegisterInfo *RegInfo; + const TargetRegisterInfo *TRI; // PhysRegInfo - Keep track of which instruction was the last def/use of a // physical register. This is a purely local property, because all physical @@ -175,18 +175,10 @@ virtual bool runOnMachineFunction(MachineFunction &MF); - /// KillsRegister - Return true if the specified instruction kills the - /// specified register. - bool KillsRegister(MachineInstr *MI, unsigned Reg) const; - /// RegisterDefIsDead - Return true if the specified instruction defines the /// specified register, but that definition is dead. bool RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const; - /// ModifiesRegister - Return true if the specified instruction modifies the - /// specified register. - bool ModifiesRegister(MachineInstr *MI, unsigned Reg) const; - //===--------------------------------------------------------------------===// // API to update live variable information @@ -202,7 +194,7 @@ /// not found. void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI, bool AddIfNotFound = false) { - if (MI->addRegisterKilled(IncomingReg, RegInfo, AddIfNotFound)) + if (MI->addRegisterKilled(IncomingReg, TRI, AddIfNotFound)) getVarInfo(IncomingReg).Kills.push_back(MI); } @@ -239,7 +231,7 @@ /// AddIfNotFound is true, add a implicit operand if it's not found. void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI, bool AddIfNotFound = false) { - if (MI->addRegisterDead(IncomingReg, RegInfo, AddIfNotFound)) + if (MI->addRegisterDead(IncomingReg, TRI, AddIfNotFound)) getVarInfo(IncomingReg).Kills.push_back(MI); } Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineInstr.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h Tue Mar 4 18:59:57 2008 @@ -138,14 +138,65 @@ /// bool isDebugLabel() const; + /// readsRegister - Return true if the MachineInstr reads the specified + /// register. If TargetRegisterInfo is passed, then it also checks if there + /// is a read of a super-register. + bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const { + return findRegisterUseOperandIdx(Reg, false, TRI) != -1; + } + + /// killsRegister - Return true if the MachineInstr kills the specified + /// register. If TargetRegisterInfo is passed, then it also checks if there is + /// a kill of a super-register. + bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const { + return findRegisterUseOperandIdx(Reg, true, TRI) != -1; + } + + /// modifiesRegister - Return true if the MachineInstr modifies the + /// specified register. If TargetRegisterInfo is passed, then it also checks + /// if there is a def of a super-register. + bool modifiesRegister(unsigned Reg, + const TargetRegisterInfo *TRI = NULL) const { + return findRegisterDefOperandIdx(Reg, false, TRI) != -1; + } + + /// registerDefIsDead - Returns true if the register is dead in this machine + /// instruction. If TargetRegisterInfo is passed, then it also checks + /// if there is a dead def of a super-register. + bool registerDefIsDead(unsigned Reg, + const TargetRegisterInfo *TRI = NULL) const { + return findRegisterDefOperandIdx(Reg, true, TRI) != -1; + } + /// findRegisterUseOperandIdx() - Returns the operand index that is a use of /// the specific register or -1 if it is not found. It further tightening /// the search criteria to a use that kills the register if isKill is true. - int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false) const; + int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false, + const TargetRegisterInfo *TRI = NULL) const; + + /// findRegisterUseOperand - Wrapper for findRegisterUseOperandIdx, it returns + /// a pointer to the MachineOperand rather than an index. + MachineOperand *findRegisterUseOperand(unsigned Reg,bool isKill = false, + const TargetRegisterInfo *TRI = NULL) { + int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI); + return (Idx == -1) ? NULL : &getOperand(Idx); + } - /// findRegisterDefOperand() - Returns the MachineOperand that is a def of - /// the specific register or NULL if it is not found. - MachineOperand *findRegisterDefOperand(unsigned Reg); + /// findRegisterDefOperandIdx() - Returns the operand index that is a def of + /// the specific register or -1 if it is not found. It further tightening + /// the search criteria to a def that is dead the register if isDead is true. + /// If TargetRegisterInfo is passed, then it also checks if there is a def of + /// a super-register. + int findRegisterDefOperandIdx(unsigned Reg, bool isDead = false, + const TargetRegisterInfo *TRI = NULL) const; + + /// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns + /// a pointer to the MachineOperand rather than an index. + MachineOperand *findRegisterDefOperand(unsigned Reg,bool isDead = false, + const TargetRegisterInfo *TRI = NULL) { + int Idx = findRegisterDefOperandIdx(Reg, isDead, TRI); + return (Idx == -1) ? NULL : &getOperand(Idx); + } /// findFirstPredOperandIdx() - Find the index of the first operand in the /// operand list that is used to represent the predicate. It returns -1 if Modified: llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h (original) +++ llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h Tue Mar 4 18:59:57 2008 @@ -127,7 +127,7 @@ } private: - const TargetRegisterInfo *RegInfo; + const TargetRegisterInfo *TRI; const TargetInstrInfo *TII; /// CalleeSavedrRegs - A bitvector of callee saved registers for the target. Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Mar 4 18:59:57 2008 @@ -324,7 +324,7 @@ // If this redefinition is dead, we need to add a dummy unit live // range covering the def slot. - if (lv_->RegisterDefIsDead(mi, interval.reg)) + if (mi->registerDefIsDead(interval.reg, tri_)) interval.addRange(LiveRange(RedefIndex, RedefIndex+1, OldValNo)); DOUT << " RESULT: "; @@ -399,7 +399,7 @@ // If it is not used after definition, it is considered dead at // the instruction defining it. Hence its interval is: // [defSlot(def), defSlot(def)+1) - if (lv_->RegisterDefIsDead(mi, interval.reg)) { + if (mi->registerDefIsDead(interval.reg, tri_)) { DOUT << " dead"; end = getDefIndex(start) + 1; goto exit; @@ -410,11 +410,11 @@ // [defSlot(def), useSlot(kill)+1) while (++mi != MBB->end()) { baseIndex += InstrSlots::NUM; - if (lv_->KillsRegister(mi, interval.reg)) { + if (mi->killsRegister(interval.reg, tri_)) { DOUT << " killed"; end = getUseIndex(baseIndex) + 1; goto exit; - } else if (lv_->ModifiesRegister(mi, interval.reg)) { + } else if (mi->modifiesRegister(interval.reg, tri_)) { // Another instruction redefines the register before it is ever read. // Then the register is essentially dead at the instruction that defines // it. Hence its interval is: @@ -459,8 +459,9 @@ handlePhysicalRegisterDef(MBB, MI, MIIdx, getOrCreateInterval(reg), CopyMI); // Def of a register also defines its sub-registers. for (const unsigned* AS = tri_->getSubRegisters(reg); *AS; ++AS) - // Avoid processing some defs more than once. - if (!MI->findRegisterDefOperand(*AS)) + // If MI also modifies the sub-register explicitly, avoid processing it + // more than once. Do not pass in TRI here so it checks for exact match. + if (!MI->modifiesRegister(*AS)) handlePhysicalRegisterDef(MBB, MI, MIIdx, getOrCreateInterval(*AS), 0); } } @@ -477,11 +478,11 @@ unsigned start = baseIndex; unsigned end = start; while (mi != MBB->end()) { - if (lv_->KillsRegister(mi, interval.reg)) { + if (mi->killsRegister(interval.reg, tri_)) { DOUT << " killed"; end = getUseIndex(baseIndex) + 1; goto exit; - } else if (lv_->ModifiesRegister(mi, interval.reg)) { + } else if (mi->modifiesRegister(interval.reg, tri_)) { // Another instruction redefines the register before it is ever read. // Then the register is essentially dead at the instruction that defines // it. Hence its interval is: @@ -842,9 +843,9 @@ if (!vrm.isReMaterialized(Reg)) continue; MachineInstr *ReMatMI = vrm.getReMaterializedMI(Reg); - int OpIdx = ReMatMI->findRegisterUseOperandIdx(li.reg); - if (OpIdx != -1) - ReMatMI->getOperand(OpIdx).setReg(NewVReg); + MachineOperand *UseMO = ReMatMI->findRegisterUseOperand(li.reg); + if (UseMO) + UseMO->setReg(NewVReg); } } @@ -1605,7 +1606,7 @@ LiveRange *LR = &LI->ranges[LI->ranges.size()-1]; unsigned LastUseIdx = getBaseIndex(LR->end); MachineInstr *LastUse = getInstructionFromIndex(LastUseIdx); - int UseIdx = LastUse->findRegisterUseOperandIdx(LI->reg); + int UseIdx = LastUse->findRegisterUseOperandIdx(LI->reg, false); assert(UseIdx != -1); if (LastUse->getOperand(UseIdx).isImplicit() || LastUse->getDesc().getOperandConstraint(UseIdx,TOI::TIED_TO) == -1){ Modified: llvm/trunk/lib/CodeGen/LiveVariables.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveVariables.cpp?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveVariables.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveVariables.cpp Tue Mar 4 18:59:57 2008 @@ -76,51 +76,6 @@ return VI; } -/// KillsRegister - Returns true if the machine instruction kills the specified -/// register. -bool LiveVariables::KillsRegister(MachineInstr *MI, unsigned Reg) const { - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - const MachineOperand &MO = MI->getOperand(i); - if (MO.isRegister() && MO.isKill()) { - unsigned MOReg = MO.getReg(); - if (MOReg == Reg || - (TargetRegisterInfo::isPhysicalRegister(MOReg) && - TargetRegisterInfo::isPhysicalRegister(Reg) && - RegInfo->isSubRegister(MOReg, Reg))) - return true; - } - } - return false; -} - -/// RegisterDefIsDead - Returns true if the register is dead in this machine -/// instruction. -bool LiveVariables::RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const { - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - const MachineOperand &MO = MI->getOperand(i); - if (MO.isRegister() && MO.isDead()) { - unsigned MOReg = MO.getReg(); - if ((MOReg == Reg) || - (TargetRegisterInfo::isPhysicalRegister(MOReg) && - TargetRegisterInfo::isPhysicalRegister(Reg) && - RegInfo->isSubRegister(MOReg, Reg))) - return true; - } - } - return false; -} - -/// ModifiesRegister - Returns true if the machine instruction modifies the -/// register. -bool LiveVariables::ModifiesRegister(MachineInstr *MI, unsigned Reg) const { - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - const MachineOperand &MO = MI->getOperand(i); - if (MO.isRegister() && MO.isDef() && MO.getReg() == Reg) - return true; - } - return false; -} - void LiveVariables::MarkVirtRegAliveInBlock(VarInfo& VRInfo, MachineBasicBlock *DefBlock, MachineBasicBlock *MBB, @@ -232,7 +187,7 @@ !PhysRegUsed[Reg]) { MachineInstr *Def = PhysRegInfo[Reg]; - if (!Def->findRegisterDefOperand(Reg)) + if (!Def->modifiesRegister(Reg)) Def->addOperand(MachineOperand::CreateReg(Reg, true /*IsDef*/, true /*IsImp*/)); @@ -244,14 +199,14 @@ PhysRegUsed[Reg] = true; // Now reset the use information for the sub-registers. - for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg); + for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) { PhysRegPartUse[SubReg] = NULL; PhysRegInfo[SubReg] = MI; PhysRegUsed[SubReg] = true; } - for (const unsigned *SuperRegs = RegInfo->getSuperRegisters(Reg); + for (const unsigned *SuperRegs = TRI->getSuperRegisters(Reg); unsigned SuperReg = *SuperRegs; ++SuperRegs) { // Remember the partial use of this super-register if it was previously // defined. @@ -261,7 +216,7 @@ // No need to go up more levels. A def of a register also sets its sub- // registers. So if PhysRegInfo[SuperReg] is NULL, it means SuperReg's // super-registers are not previously defined. - for (const unsigned *SSRegs = RegInfo->getSuperRegisters(SuperReg); + for (const unsigned *SSRegs = TRI->getSuperRegisters(SuperReg); unsigned SSReg = *SSRegs; ++SSRegs) if (PhysRegInfo[SSReg] != NULL) { HasPrevDef = true; @@ -281,11 +236,11 @@ void LiveVariables::addRegisterKills(unsigned Reg, MachineInstr *MI, SmallSet &SubKills) { if (SubKills.count(Reg) == 0) { - MI->addRegisterKilled(Reg, RegInfo, true); + MI->addRegisterKilled(Reg, TRI, true); return; } - for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg); + for (const unsigned *SubRegs = TRI->getImmediateSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) addRegisterKills(SubReg, MI, SubKills); } @@ -300,7 +255,7 @@ /// SubKills is filled with the set of sub-registers that are killed elsewhere. bool LiveVariables::HandlePhysRegKill(unsigned Reg, const MachineInstr *RefMI, SmallSet &SubKills) { - const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg); + const unsigned *SubRegs = TRI->getImmediateSubRegisters(Reg); for (; unsigned SubReg = *SubRegs; ++SubRegs) { const MachineInstr *LastRef = PhysRegInfo[SubReg]; @@ -330,12 +285,12 @@ if (HandlePhysRegKill(Reg, RefMI, SubKills)) { // This machine instruction kills this register. - RefMI->addRegisterKilled(Reg, RegInfo, true); + RefMI->addRegisterKilled(Reg, TRI, true); return true; } // Some sub-registers are killed by another machine instruction. - for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg); + for (const unsigned *SubRegs = TRI->getImmediateSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) addRegisterKills(SubReg, RefMI, SubKills); @@ -348,38 +303,38 @@ if (PhysRegUsed[Reg]) { if (!HandlePhysRegKill(Reg, LastRef)) { if (PhysRegPartUse[Reg]) - PhysRegPartUse[Reg]->addRegisterKilled(Reg, RegInfo, true); + PhysRegPartUse[Reg]->addRegisterKilled(Reg, TRI, true); } } else if (PhysRegPartUse[Reg]) { // Add implicit use / kill to last partial use. - PhysRegPartUse[Reg]->addRegisterKilled(Reg, RegInfo, true); + PhysRegPartUse[Reg]->addRegisterKilled(Reg, TRI, true); } else if (LastRef != MI) { // Defined, but not used. However, watch out for cases where a super-reg // is also defined on the same MI. - LastRef->addRegisterDead(Reg, RegInfo); + LastRef->addRegisterDead(Reg, TRI); } } - for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg); + for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) { if (MachineInstr *LastRef = PhysRegInfo[SubReg]) { if (PhysRegUsed[SubReg]) { if (!HandlePhysRegKill(SubReg, LastRef)) { if (PhysRegPartUse[SubReg]) - PhysRegPartUse[SubReg]->addRegisterKilled(SubReg, RegInfo, true); + PhysRegPartUse[SubReg]->addRegisterKilled(SubReg, TRI, true); } } else if (PhysRegPartUse[SubReg]) { // Add implicit use / kill to last use of a sub-register. - PhysRegPartUse[SubReg]->addRegisterKilled(SubReg, RegInfo, true); + PhysRegPartUse[SubReg]->addRegisterKilled(SubReg, TRI, true); } else if (LastRef != MI) { // This must be a def of the subreg on the same MI. - LastRef->addRegisterDead(SubReg, RegInfo); + LastRef->addRegisterDead(SubReg, TRI); } } } if (MI) { - for (const unsigned *SuperRegs = RegInfo->getSuperRegisters(Reg); + for (const unsigned *SuperRegs = TRI->getSuperRegisters(Reg); unsigned SuperReg = *SuperRegs; ++SuperRegs) { if (PhysRegInfo[SuperReg] && PhysRegInfo[SuperReg] != MI) { // The larger register is previously defined. Now a smaller part is @@ -404,7 +359,7 @@ PhysRegPartDef[Reg].clear(); PhysRegPartUse[Reg] = NULL; - for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg); + for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) { PhysRegInfo[SubReg] = MI; PhysRegUsed[SubReg] = false; @@ -416,13 +371,12 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) { MF = &mf; - RegInfo = MF->getTarget().getRegisterInfo(); + TRI = MF->getTarget().getRegisterInfo(); MachineRegisterInfo& MRI = mf.getRegInfo(); - assert(RegInfo && "Target doesn't have register information?"); - ReservedRegisters = RegInfo->getReservedRegs(mf); + ReservedRegisters = TRI->getReservedRegs(mf); - unsigned NumRegs = RegInfo->getNumRegs(); + unsigned NumRegs = TRI->getNumRegs(); PhysRegInfo = new MachineInstr*[NumRegs]; PhysRegUsed = new bool[NumRegs]; PhysRegPartUse = new MachineInstr*[NumRegs]; @@ -533,7 +487,7 @@ HandlePhysRegUse(*I, Ret); // Add live-out registers as implicit uses. - if (Ret->findRegisterUseOperandIdx(*I) == -1) + if (!Ret->readsRegister(*I)) Ret->addOperand(MachineOperand::CreateReg(*I, false, true)); } } @@ -562,12 +516,12 @@ VirtRegInfo[i] .Kills[j]->addRegisterDead(i + TargetRegisterInfo::FirstVirtualRegister, - RegInfo); + TRI); else VirtRegInfo[i] .Kills[j]->addRegisterKilled(i + TargetRegisterInfo::FirstVirtualRegister, - RegInfo); + TRI); // Check to make sure there are no unreachable blocks in the MC CFG for the // function. If so, it is due to a bug in the instruction selector or some Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Tue Mar 4 18:59:57 2008 @@ -532,25 +532,45 @@ /// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of /// the specific register or -1 if it is not found. It further tightening /// the search criteria to a use that kills the register if isKill is true. -int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill) const { +int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill, + const TargetRegisterInfo *TRI) const { for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { const MachineOperand &MO = getOperand(i); - if (MO.isRegister() && MO.isUse() && MO.getReg() == Reg) + if (!MO.isRegister() || !MO.isUse()) + continue; + unsigned MOReg = MO.getReg(); + if (!MOReg) + continue; + if (MOReg == Reg || + (TRI && + TargetRegisterInfo::isPhysicalRegister(MOReg) && + TargetRegisterInfo::isPhysicalRegister(Reg) && + TRI->isSubRegister(MOReg, Reg))) if (!isKill || MO.isKill()) return i; } return -1; } -/// findRegisterDefOperand() - Returns the MachineOperand that is a def of -/// the specific register or NULL if it is not found. -MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) { +/// findRegisterDefOperandIdx() - Returns the operand index that is a def of +/// the specific register or -1 if it is not found. It further tightening + /// the search criteria to a def that is dead the register if isDead is true. +int MachineInstr::findRegisterDefOperandIdx(unsigned Reg, bool isDead, + const TargetRegisterInfo *TRI) const { for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { - MachineOperand &MO = getOperand(i); - if (MO.isRegister() && MO.isDef() && MO.getReg() == Reg) - return &MO; + const MachineOperand &MO = getOperand(i); + if (!MO.isRegister() || !MO.isDef()) + continue; + unsigned MOReg = MO.getReg(); + if (MOReg == Reg || + (TRI && + TargetRegisterInfo::isPhysicalRegister(MOReg) && + TargetRegisterInfo::isPhysicalRegister(Reg) && + TRI->isSubRegister(MOReg, Reg))) + if (!isDead || MO.isDead()) + return i; } - return NULL; + return -1; } /// findFirstPredOperandIdx() - Find the index of the first operand in the Modified: llvm/trunk/lib/CodeGen/PHIElimination.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PHIElimination.cpp?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PHIElimination.cpp (original) +++ llvm/trunk/lib/CodeGen/PHIElimination.cpp Tue Mar 4 18:59:57 2008 @@ -161,7 +161,7 @@ LV->removeVirtualRegistersKilled(MPhi); // If the result is dead, update LV. - if (LV->RegisterDefIsDead(MPhi, DestReg)) { + if (MPhi->registerDefIsDead(DestReg)) { LV->addVirtualRegisterDead(DestReg, PHICopy); LV->removeVirtualRegistersDead(MPhi); } Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Tue Mar 4 18:59:57 2008 @@ -306,8 +306,7 @@ // If the instruction reads the register that's spilled, (e.g. this can // happen if it is a move to a physical register), then the spill // instruction is not a kill. - bool isKill = !(I != MBB.end() && - I->findRegisterUseOperandIdx(PhysReg) != -1); + bool isKill = !(I != MBB.end() && I->readsRegister(PhysReg)); TII->storeRegToStackSlot(MBB, I, PhysReg, isKill, FrameIndex, RC); ++NumStores; // Update statistics } Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original) +++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Tue Mar 4 18:59:57 2008 @@ -29,7 +29,7 @@ void RegScavenger::setUsed(unsigned Reg) { RegsAvailable.reset(Reg); - for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg); + for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) RegsAvailable.reset(SubReg); } @@ -38,7 +38,7 @@ void RegScavenger::setUnused(unsigned Reg) { RegsAvailable.set(Reg); - for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg); + for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) RegsAvailable.set(SubReg); } @@ -47,21 +47,21 @@ const MachineFunction &MF = *mbb->getParent(); const TargetMachine &TM = MF.getTarget(); TII = TM.getInstrInfo(); - RegInfo = TM.getRegisterInfo(); + TRI = TM.getRegisterInfo(); - assert((NumPhysRegs == 0 || NumPhysRegs == RegInfo->getNumRegs()) && + assert((NumPhysRegs == 0 || NumPhysRegs == TRI->getNumRegs()) && "Target changed?"); if (!MBB) { - NumPhysRegs = RegInfo->getNumRegs(); + NumPhysRegs = TRI->getNumRegs(); RegsAvailable.resize(NumPhysRegs); // Create reserved registers bitvector. - ReservedRegs = RegInfo->getReservedRegs(MF); + ReservedRegs = TRI->getReservedRegs(MF); // Create callee-saved registers bitvector. CalleeSavedRegs.resize(NumPhysRegs); - const unsigned *CSRegs = RegInfo->getCalleeSavedRegs(); + const unsigned *CSRegs = TRI->getCalleeSavedRegs(); if (CSRegs != NULL) for (unsigned i = 0; CSRegs[i]; ++i) CalleeSavedRegs.set(CSRegs[i]); @@ -93,7 +93,7 @@ TII->loadRegFromStackSlot(*MBB, MBBI, ScavengedReg, ScavengingFrameIndex, ScavengedRC); MachineBasicBlock::iterator II = prior(MBBI); - RegInfo->eliminateFrameIndex(II, 0, this); + TRI->eliminateFrameIndex(II, 0, this); setUsed(ScavengedReg); ScavengedReg = 0; ScavengedRC = NULL; @@ -138,7 +138,7 @@ if (MO.isKill() && !isReserved(Reg)) { ChangedRegs.set(Reg); - for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg); + for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) ChangedRegs.set(SubReg); } @@ -210,7 +210,7 @@ ChangedRegs.set(Reg); // Set the sub-registers as "used". - for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg); + for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) ChangedRegs.set(SubReg); } @@ -267,12 +267,13 @@ /// calcDistanceToUse - Calculate the distance to the first use of the /// specified register. static unsigned calcDistanceToUse(MachineBasicBlock *MBB, - MachineBasicBlock::iterator I, unsigned Reg) { + MachineBasicBlock::iterator I, unsigned Reg, + const TargetRegisterInfo *TRI) { unsigned Dist = 0; I = next(I); while (I != MBB->end()) { Dist++; - if (I->findRegisterUseOperandIdx(Reg) != -1) + if (I->readsRegister(Reg, TRI)) return Dist; I = next(I); } @@ -302,7 +303,7 @@ unsigned MaxDist = 0; int Reg = Candidates.find_first(); while (Reg != -1) { - unsigned Dist = calcDistanceToUse(MBB, I, Reg); + unsigned Dist = calcDistanceToUse(MBB, I, Reg, TRI); if (Dist >= MaxDist) { MaxDist = Dist; SReg = Reg; @@ -315,12 +316,12 @@ TII->loadRegFromStackSlot(*MBB, I, ScavengedReg, ScavengingFrameIndex, ScavengedRC); MachineBasicBlock::iterator II = prior(I); - RegInfo->eliminateFrameIndex(II, SPAdj, this); + TRI->eliminateFrameIndex(II, SPAdj, this); } TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC); MachineBasicBlock::iterator II = prior(I); - RegInfo->eliminateFrameIndex(II, SPAdj, this); + TRI->eliminateFrameIndex(II, SPAdj, this); ScavengedReg = SReg; ScavengedRC = RC; Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Tue Mar 4 18:59:57 2008 @@ -307,7 +307,7 @@ MBB->insert(DefMI, NewMI); MBB->erase(DefMI); } - unsigned OpIdx = NewMI->findRegisterUseOperandIdx(IntA.reg); + unsigned OpIdx = NewMI->findRegisterUseOperandIdx(IntA.reg, false); NewMI->getOperand(OpIdx).setIsKill(); // Update uses of IntA of the specific Val# with IntB. @@ -588,7 +588,7 @@ // Check if it is necessary to propagate "isDead" property before intervals // are joined. - MachineOperand *mopd = CopyMI->findRegisterDefOperand(DstReg); + MachineOperand *mopd = CopyMI->findRegisterDefOperand(DstReg, false); bool isDead = mopd->isDead(); bool isShorten = false; unsigned SrcStart = 0, RemoveStart = 0; @@ -617,12 +617,9 @@ RemoveEnd = SrcEnd; } else { MachineInstr *SrcMI = li_->getInstructionFromIndex(SrcStart); - if (SrcMI) { - MachineOperand *mops = findDefOperand(SrcMI, SrcReg); - if (mops) - // A dead def should have a single cycle interval. - ++RemoveStart; - } + if (SrcMI && SrcMI->modifiesRegister(SrcReg, tri_)) + // A dead def should have a single cycle interval. + ++RemoveStart; } } } @@ -672,9 +669,9 @@ } else { MachineInstr *SrcMI = li_->getInstructionFromIndex(SrcStart); if (SrcMI) { - MachineOperand *mops = findDefOperand(SrcMI, SrcReg); - if (mops) - mops->setIsDead(); + int DeadIdx = SrcMI->findRegisterDefOperandIdx(SrcReg, false, tri_); + if (DeadIdx != -1) + SrcMI->getOperand(DeadIdx).setIsDead(); } } } @@ -1461,20 +1458,6 @@ } -/// findDefOperand - Returns the MachineOperand that is a def of the specific -/// register. It returns NULL if the def is not found. -/// FIXME: Move to MachineInstr. -MachineOperand *SimpleRegisterCoalescing::findDefOperand(MachineInstr *MI, - unsigned Reg) const { - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand &MO = MI->getOperand(i); - if (MO.isRegister() && MO.isDef() && - tri_->regsOverlap(MO.getReg(), Reg)) - return &MO; - } - return NULL; -} - /// RemoveUnnecessaryKills - Remove kill markers that are no longer accurate /// due to live range lengthening as the result of coalescing. void SimpleRegisterCoalescing::printRegName(unsigned reg) const { @@ -1548,7 +1531,7 @@ if (tii_->isMoveInstr(*mii, srcReg, dstReg) && srcReg == dstReg) { // remove from def list LiveInterval &RegInt = li_->getOrCreateInterval(srcReg); - MachineOperand *MO = mii->findRegisterDefOperand(dstReg); + MachineOperand *MO = mii->findRegisterDefOperand(dstReg, false); // If def of this move instruction is dead, remove its live range from // the dstination register's live interval. if (MO->isDead()) { Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h Tue Mar 4 18:59:57 2008 @@ -206,10 +206,6 @@ MachineOperand *lastRegisterUse(unsigned Start, unsigned End, unsigned Reg, unsigned &LastUseIdx) const; - /// findDefOperand - Returns the MachineOperand that is a def of the specific - /// register. It returns NULL if the def is not found. - MachineOperand *findDefOperand(MachineInstr *MI, unsigned Reg) const; - void printRegName(unsigned reg) const; }; Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original) +++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Tue Mar 4 18:59:57 2008 @@ -351,10 +351,10 @@ break; } // Store KillInsts if they match up with the definition - } else if (LV.KillsRegister(curr, a)) { + } else if (curr->killsRegister(a)) { if (def == MRI->getVRegDef(a)) { kill = curr; - } else if (LV.KillsRegister(curr, b)) { + } else if (curr->killsRegister(b)) { if (def == MRI->getVRegDef(b)) { kill = curr; } @@ -373,7 +373,7 @@ break; } // Save KillInsts of First - } else if (LV.KillsRegister(curr, a)) { + } else if (curr->killsRegister(a)) { kill = curr; } // Symmetric with the above @@ -386,7 +386,7 @@ interference = false; break; } - } else if (LV.KillsRegister(curr, b)) { + } else if (curr->killsRegister(b)) { kill = curr; } } Modified: llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp (original) +++ llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp Tue Mar 4 18:59:57 2008 @@ -139,7 +139,7 @@ // rearrange the code to make it so. Making it the killing user will // allow us to coalesce A and B together, eliminating the copy we are // about to insert. - if (!LV.KillsRegister(mi, regB)) { + if (!mi->killsRegister(regB)) { // If this instruction is commutative, check to see if C dies. If // so, swap the B and C operands. This makes the live ranges of A // and C joinable. @@ -148,7 +148,7 @@ assert(mi->getOperand(3-si).isRegister() && "Not a proper commutative instruction!"); unsigned regC = mi->getOperand(3-si).getReg(); - if (LV.KillsRegister(mi, regC)) { + if (mi->killsRegister(regC)) { DOUT << "2addr: COMMUTING : " << *mi; MachineInstr *NewMI = TII.commuteInstruction(mi); if (NewMI == 0) { Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Tue Mar 4 18:59:57 2008 @@ -862,8 +862,7 @@ MachineInstr* DeadStore = MaybeDeadStores[FoldedSS]; if (DeadStore && (MR & VirtRegMap::isModRef)) { unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(FoldedSS); - if (!PhysReg || - DeadStore->findRegisterUseOperandIdx(PhysReg, true) == -1) + if (!PhysReg || !DeadStore->readsRegister(PhysReg)) continue; UnfoldPR = PhysReg; UnfoldedOpc = TII->getOpcodeAfterMemoryUnfold(MI.getOpcode(), @@ -908,7 +907,7 @@ assert(NewMIs.size() == 1); MachineInstr *NewMI = NewMIs.back(); NewMIs.clear(); - int Idx = NewMI->findRegisterUseOperandIdx(VirtReg); + int Idx = NewMI->findRegisterUseOperandIdx(VirtReg, false); assert(Idx != -1); SmallVector Ops; Ops.push_back(Idx); @@ -1410,7 +1409,7 @@ // the physreg. if (PhysReg && !TII->isStoreToStackSlot(&MI, SS) && // Not profitable! - DeadStore->findRegisterUseOperandIdx(PhysReg, true) != -1 && + DeadStore->killsRegister(PhysReg) && TII->unfoldMemoryOperand(MF, &MI, PhysReg, false, true, NewMIs)) { MBB.insert(MII, NewMIs[0]); NewStore = NewMIs[1]; Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Tue Mar 4 18:59:57 2008 @@ -294,8 +294,7 @@ for (unsigned j = 0; j < 2; ++j) { // Look at the two new MI's in reverse order. MachineInstr *NewMI = NewMIs[j]; - int NIdx = NewMI->findRegisterUseOperandIdx(Reg); - if (NIdx == -1) + if (!NewMI->readsRegister(Reg)) continue; LV.addVirtualRegisterKilled(Reg, NewMI); if (VI.removeKill(MI)) Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp?rev=47927&r1=47926&r2=47927&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp (original) +++ llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Tue Mar 4 18:59:57 2008 @@ -154,18 +154,6 @@ FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS(); } -/// KillsRegister - Return true if the specified instruction kills (is the last -/// use of) the specified register. Note that this routine does not check for -/// kills of subregisters. -static bool KillsRegister(MachineInstr *MI, unsigned Reg) { - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand &MO = MI->getOperand(i); - if (MO.isRegister() && MO.isKill() && MO.getReg() == Reg) - return true; - } - return false; -} - /// getFPReg - Return the X86::FPx register number for the specified operand. /// For example, this returns 3 for X86::FP3. static unsigned getFPReg(const MachineOperand &MO) { @@ -610,7 +598,7 @@ // Is this the last use of the source register? unsigned Reg = getFPReg(MI->getOperand(NumOps-1)); - bool KillsSrc = KillsRegister(MI, X86::FP0+Reg); + bool KillsSrc = MI->killsRegister(X86::FP0+Reg); // FISTP64m is strange because there isn't a non-popping versions. // If we have one _and_ we don't want to pop the operand, duplicate the value @@ -669,7 +657,7 @@ // Is this the last use of the source register? unsigned Reg = getFPReg(MI->getOperand(1)); - bool KillsSrc = KillsRegister(MI, X86::FP0+Reg); + bool KillsSrc = MI->killsRegister(X86::FP0+Reg); if (KillsSrc) { // If this is the last use of the source register, just make sure it's on @@ -778,8 +766,8 @@ unsigned Dest = getFPReg(MI->getOperand(0)); unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2)); unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1)); - bool KillsOp0 = KillsRegister(MI, X86::FP0+Op0); - bool KillsOp1 = KillsRegister(MI, X86::FP0+Op1); + bool KillsOp0 = MI->killsRegister(X86::FP0+Op0); + bool KillsOp1 = MI->killsRegister(X86::FP0+Op1); unsigned TOS = getStackEntry(0); @@ -875,8 +863,8 @@ assert(NumOperands == 2 && "Illegal FUCOM* instruction!"); unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2)); unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1)); - bool KillsOp0 = KillsRegister(MI, X86::FP0+Op0); - bool KillsOp1 = KillsRegister(MI, X86::FP0+Op1); + bool KillsOp0 = MI->killsRegister(X86::FP0+Op0); + bool KillsOp1 = MI->killsRegister(X86::FP0+Op1); // Make sure the first operand is on the top of stack, the other one can be // anywhere. @@ -901,7 +889,7 @@ unsigned Op0 = getFPReg(MI->getOperand(0)); unsigned Op1 = getFPReg(MI->getOperand(2)); - bool KillsOp1 = KillsRegister(MI, X86::FP0+Op1); + bool KillsOp1 = MI->killsRegister(X86::FP0+Op1); // The first operand *must* be on the top of the stack. moveToTop(Op0, I); @@ -958,7 +946,7 @@ unsigned SrcReg = getFPReg(MI->getOperand(1)); unsigned DestReg = getFPReg(MI->getOperand(0)); - if (KillsRegister(MI, X86::FP0+SrcReg)) { + if (MI->killsRegister(X86::FP0+SrcReg)) { // If the input operand is killed, we can just change the owner of the // incoming stack slot into the result. unsigned Slot = getSlot(SrcReg); From gohman at apple.com Tue Mar 4 19:08:18 2008 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Mar 2008 01:08:18 -0000 Subject: [llvm-commits] [llvm] r47928 - in /llvm/trunk: include/llvm/CodeGen/RuntimeLibcalls.h lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp lib/CodeGen/SelectionDAG/TargetLowering.cpp Message-ID: <200803050108.m2518IDg013299@zion.cs.uiuc.edu> Author: djg Date: Tue Mar 4 19:08:17 2008 New Revision: 47928 URL: http://llvm.org/viewvc/llvm-project?rev=47928&view=rev Log: Codegen support for i128 SINT_TO_FP. Modified: llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Modified: llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h?rev=47928&r1=47927&r2=47928&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h (original) +++ llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h Tue Mar 4 19:08:17 2008 @@ -110,6 +110,10 @@ SINTTOFP_I64_F64, SINTTOFP_I64_F80, SINTTOFP_I64_PPCF128, + SINTTOFP_I128_F32, + SINTTOFP_I128_F64, + SINTTOFP_I128_F80, + SINTTOFP_I128_PPCF128, UINTTOFP_I32_F32, UINTTOFP_I32_F64, UINTTOFP_I64_F32, Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47928&r1=47927&r2=47928&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Mar 4 19:08:17 2008 @@ -5275,12 +5275,12 @@ /// SDOperand SelectionDAGLegalize:: ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) { - assert(getTypeAction(Source.getValueType()) == Expand && + MVT::ValueType SourceVT = Source.getValueType(); + assert(getTypeAction(SourceVT) == Expand && "This is not an expansion!"); - assert(Source.getValueType() == MVT::i64 && "Only handle expand from i64!"); if (!isSigned) { - assert(Source.getValueType() == MVT::i64 && + assert(SourceVT == MVT::i64 && "This only works for 64-bit -> FP"); // The 64-bit value loaded will be incorrectly if the 'sign bit' of the // incoming integer is set. To handle this, we dynamically test to see if @@ -5291,7 +5291,7 @@ // If this is unsigned, and not supported, first perform the conversion to // signed, then adjust the result if the sign bit is set. SDOperand SignedConv = ExpandIntToFP(true, DestTy, - DAG.getNode(ISD::BUILD_PAIR, Source.getValueType(), Lo, Hi)); + DAG.getNode(ISD::BUILD_PAIR, SourceVT, Lo, Hi)); SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultTy(), Hi, DAG.getConstant(0, Hi.getValueType()), @@ -5301,7 +5301,8 @@ SignSet, Four, Zero); uint64_t FF = 0x5f800000ULL; if (TLI.isLittleEndian()) FF <<= 32; - static Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF); + static Constant *FudgeFactor = + ConstantInt::get(IntegerType::get(Source.getValueSizeInBits()), FF); SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy()); CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset); @@ -5323,8 +5324,8 @@ // Destination type needs to be expanded as well. The FADD now we are // constructing will be expanded into a libcall. if (MVT::getSizeInBits(SCVT) != MVT::getSizeInBits(DestTy)) { - assert(SCVT == MVT::i32 && DestTy == MVT::f64); - SignedConv = DAG.getNode(ISD::BUILD_PAIR, MVT::i64, + assert(MVT::getSizeInBits(SCVT) * 2 == MVT::getSizeInBits(DestTy)); + SignedConv = DAG.getNode(ISD::BUILD_PAIR, DestTy, SignedConv, SignedConv.getValue(1)); } SignedConv = DAG.getNode(ISD::BIT_CONVERT, DestTy, SignedConv); @@ -5333,7 +5334,7 @@ } // Check to see if the target has a custom way to lower this. If so, use it. - switch (TLI.getOperationAction(ISD::SINT_TO_FP, Source.getValueType())) { + switch (TLI.getOperationAction(ISD::SINT_TO_FP, SourceVT)) { default: assert(0 && "This action not implemented for this operation!"); case TargetLowering::Legal: case TargetLowering::Expand: @@ -5351,14 +5352,29 @@ // the source in case it is shared (this pass of legalize must traverse it). SDOperand SrcLo, SrcHi; ExpandOp(Source, SrcLo, SrcHi); - Source = DAG.getNode(ISD::BUILD_PAIR, Source.getValueType(), SrcLo, SrcHi); + Source = DAG.getNode(ISD::BUILD_PAIR, SourceVT, SrcLo, SrcHi); RTLIB::Libcall LC; - if (DestTy == MVT::f32) - LC = RTLIB::SINTTOFP_I64_F32; - else { - assert(DestTy == MVT::f64 && "Unknown fp value type!"); - LC = RTLIB::SINTTOFP_I64_F64; + if (SourceVT == MVT::i64) { + if (DestTy == MVT::f32) + LC = RTLIB::SINTTOFP_I64_F32; + else { + assert(DestTy == MVT::f64 && "Unknown fp value type!"); + LC = RTLIB::SINTTOFP_I64_F64; + } + } else if (SourceVT == MVT::i128) { + if (DestTy == MVT::f32) + LC = RTLIB::SINTTOFP_I128_F32; + else if (DestTy == MVT::f64) + LC = RTLIB::SINTTOFP_I128_F64; + else if (DestTy == MVT::f80) + LC = RTLIB::SINTTOFP_I128_F80; + else { + assert(DestTy == MVT::ppcf128 && "Unknown fp value type!"); + LC = RTLIB::SINTTOFP_I128_PPCF128; + } + } else { + assert(0 && "Unknown int value type"); } assert(TLI.getLibcallName(LC) && "Don't know how to expand this SINT_TO_FP!"); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp?rev=47928&r1=47927&r2=47928&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp Tue Mar 4 19:08:17 2008 @@ -967,10 +967,10 @@ SDOperand DAGTypeLegalizer::ExpandOperand_SINT_TO_FP(SDOperand Source, MVT::ValueType DestTy) { // We know the destination is legal, but that the input needs to be expanded. - assert(Source.getValueType() == MVT::i64 && "Only handle expand from i64!"); + MVT::ValueType SourceVT = Source.getValueType(); // Check to see if the target has a custom way to lower this. If so, use it. - switch (TLI.getOperationAction(ISD::SINT_TO_FP, Source.getValueType())) { + switch (TLI.getOperationAction(ISD::SINT_TO_FP, SourceVT)) { default: assert(0 && "This action not implemented for this operation!"); case TargetLowering::Legal: case TargetLowering::Expand: @@ -983,11 +983,26 @@ } RTLIB::Libcall LC; - if (DestTy == MVT::f32) - LC = RTLIB::SINTTOFP_I64_F32; - else { - assert(DestTy == MVT::f64 && "Unknown fp value type!"); - LC = RTLIB::SINTTOFP_I64_F64; + if (SourceVT == MVT::i64) { + if (DestTy == MVT::f32) + LC = RTLIB::SINTTOFP_I64_F32; + else { + assert(DestTy == MVT::f64 && "Unknown fp value type!"); + LC = RTLIB::SINTTOFP_I64_F64; + } + } else if (SourceVT == MVT::i128) { + if (DestTy == MVT::f32) + LC = RTLIB::SINTTOFP_I128_F32; + else if (DestTy == MVT::f64) + LC = RTLIB::SINTTOFP_I128_F64; + else if (DestTy == MVT::f80) + LC = RTLIB::SINTTOFP_I128_F80; + else { + assert(DestTy == MVT::ppcf128 && "Unknown fp value type!"); + LC = RTLIB::SINTTOFP_I128_PPCF128; + } + } else { + assert(0 && "Unknown int value type!"); } assert(0 && "FIXME: no libcalls yet!"); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=47928&r1=47927&r2=47928&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Tue Mar 4 19:08:17 2008 @@ -107,6 +107,10 @@ Names[RTLIB::SINTTOFP_I64_F64] = "__floatdidf"; Names[RTLIB::SINTTOFP_I64_F80] = "__floatdixf"; Names[RTLIB::SINTTOFP_I64_PPCF128] = "__floatditf"; + Names[RTLIB::SINTTOFP_I128_F32] = "__floattisf"; + Names[RTLIB::SINTTOFP_I128_F64] = "__floattidf"; + Names[RTLIB::SINTTOFP_I128_F80] = "__floattixf"; + Names[RTLIB::SINTTOFP_I128_PPCF128] = "__floattitf"; Names[RTLIB::UINTTOFP_I32_F32] = "__floatunsisf"; Names[RTLIB::UINTTOFP_I32_F64] = "__floatunsidf"; Names[RTLIB::UINTTOFP_I64_F32] = "__floatundisf"; From alenhar2 at cs.uiuc.edu Tue Mar 4 19:15:49 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 05 Mar 2008 01:15:49 -0000 Subject: [llvm-commits] [llvm] r47929 - in /llvm/trunk/lib: CodeGen/SelectionDAG/LegalizeDAG.cpp Target/X86/X86ISelLowering.cpp Target/X86/X86ISelLowering.h Target/X86/X86InstrInfo.td Message-ID: <200803050115.m251FnMs013504@zion.cs.uiuc.edu> Author: alenhar2 Date: Tue Mar 4 19:15:49 2008 New Revision: 47929 URL: http://llvm.org/viewvc/llvm-project?rev=47929&view=rev Log: 64bit CAS on 32bit x86. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h llvm/trunk/lib/Target/X86/X86InstrInfo.td Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47929&r1=47928&r2=47929&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Mar 4 19:15:49 2008 @@ -6095,6 +6095,17 @@ break; } + case ISD::ATOMIC_LCS: { + SDOperand Tmp = TLI.LowerOperation(Op, DAG); + assert(Tmp.Val && "Node must be custom expanded!"); + ExpandOp(Tmp.getValue(0), Lo, Hi); + AddLegalizedOperand(SDOperand(Node, 1), // Remember we legalized the chain. + LegalizeOp(Tmp.getValue(1))); + break; + } + + + // These operators cannot be expanded directly, emit them as calls to // library functions. case ISD::FP_TO_SINT: { Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47929&r1=47928&r2=47929&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Mar 4 19:15:49 2008 @@ -5355,7 +5355,7 @@ return Op; } -SDOperand X86TargetLowering::LowerCAS(SDOperand Op, SelectionDAG &DAG) { +SDOperand X86TargetLowering::LowerLCS(SDOperand Op, SelectionDAG &DAG) { MVT::ValueType T = cast(Op.Val)->getVT(); unsigned Reg = 0; unsigned size = 0; @@ -5363,15 +5363,20 @@ case MVT::i8: Reg = X86::AL; size = 1; break; case MVT::i16: Reg = X86::AX; size = 2; break; case MVT::i32: Reg = X86::EAX; size = 4; break; - case MVT::i64: Reg = X86::RAX; size = 8; break; + case MVT::i64: + if (Subtarget->is64Bit()) { + Reg = X86::RAX; size = 8; + } else //Should go away when LowerType stuff lands + return SDOperand(ExpandATOMIC_LCS(Op.Val, DAG), 0); + break; }; SDOperand cpIn = DAG.getCopyToReg(Op.getOperand(0), Reg, Op.getOperand(3), SDOperand()); SDOperand Ops[] = { cpIn.getValue(0), - Op.getOperand(1), - Op.getOperand(2), - DAG.getTargetConstant(size, MVT::i8), - cpIn.getValue(1) }; + Op.getOperand(1), + Op.getOperand(2), + DAG.getTargetConstant(size, MVT::i8), + cpIn.getValue(1) }; SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag); SDOperand Result = DAG.getNode(X86ISD::LCMPXCHG_DAG, Tys, Ops, 5); SDOperand cpOut = @@ -5379,12 +5384,48 @@ return cpOut; } +SDNode* X86TargetLowering::ExpandATOMIC_LCS(SDNode* Op, SelectionDAG &DAG) { + MVT::ValueType T = cast(Op)->getVT(); + assert (T == MVT::i64 && "Only know how to expand i64 CAS"); + SDOperand cpInL, cpInH; + cpInL = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op->getOperand(3), + DAG.getConstant(0, MVT::i32)); + cpInH = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op->getOperand(3), + DAG.getConstant(1, MVT::i32)); + cpInL = DAG.getCopyToReg(Op->getOperand(0), X86::EAX, + cpInL, SDOperand()); + cpInH = DAG.getCopyToReg(cpInL.getValue(0), X86::EDX, + cpInH, cpInL.getValue(1)); + SDOperand swapInL, swapInH; + swapInL = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op->getOperand(2), + DAG.getConstant(0, MVT::i32)); + swapInH = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op->getOperand(2), + DAG.getConstant(1, MVT::i32)); + swapInL = DAG.getCopyToReg(cpInH.getValue(0), X86::EBX, + swapInL, cpInH.getValue(1)); + swapInH = DAG.getCopyToReg(swapInL.getValue(0), X86::ECX, + swapInH, swapInL.getValue(1)); + SDOperand Ops[] = { swapInH.getValue(0), + Op->getOperand(1), + swapInH.getValue(1)}; + SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag); + SDOperand Result = DAG.getNode(X86ISD::LCMPXCHG8_DAG, Tys, Ops, 3); + SDOperand cpOutL = DAG.getCopyFromReg(Result.getValue(0), X86::EAX, MVT::i32, + Result.getValue(1)); + SDOperand cpOutH = DAG.getCopyFromReg(cpOutL.getValue(1), X86::EDX, MVT::i32, + cpOutL.getValue(2)); + SDOperand OpsF[] = { cpOutL.getValue(0), cpOutH.getValue(0)}; + SDOperand ResultVal = DAG.getNode(ISD::BUILD_PAIR, MVT::i64, OpsF, 2); + Tys = DAG.getVTList(MVT::i64, MVT::Other); + return DAG.getNode(ISD::MERGE_VALUES, Tys, ResultVal, cpOutH.getValue(1)).Val; +} + /// LowerOperation - Provide custom lowering hooks for some operations. /// SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { switch (Op.getOpcode()) { default: assert(0 && "Should not custom lower this!"); - case ISD::ATOMIC_LCS: return LowerCAS(Op,DAG); + case ISD::ATOMIC_LCS: return LowerLCS(Op,DAG); case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG); case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR_ELT(Op, DAG); @@ -5437,6 +5478,7 @@ default: assert(0 && "Should not custom lower this!"); case ISD::FP_TO_SINT: return ExpandFP_TO_SINT(N, DAG); case ISD::READCYCLECOUNTER: return ExpandREADCYCLECOUNTER(N, DAG); + case ISD::ATOMIC_LCS: return ExpandATOMIC_LCS(N, DAG); } } @@ -5490,6 +5532,7 @@ case X86ISD::TC_RETURN: return "X86ISD::TC_RETURN"; case X86ISD::FNSTCW16m: return "X86ISD::FNSTCW16m"; case X86ISD::LCMPXCHG_DAG: return "x86ISD::LCMPXCHG_DAG"; + case X86ISD::LCMPXCHG8_DAG: return "x86ISD::LCMPXCHG8_DAG"; } } Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=47929&r1=47928&r2=47929&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Tue Mar 4 19:15:49 2008 @@ -210,6 +210,7 @@ // compare and swap LCMPXCHG_DAG, + LCMPXCHG8_DAG, // Store FP control world into i16 memory FNSTCW16m @@ -543,9 +544,10 @@ SDOperand LowerFLT_ROUNDS_(SDOperand Op, SelectionDAG &DAG); SDOperand LowerCTLZ(SDOperand Op, SelectionDAG &DAG); SDOperand LowerCTTZ(SDOperand Op, SelectionDAG &DAG); - SDOperand LowerCAS(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerLCS(SDOperand Op, SelectionDAG &DAG); SDNode *ExpandFP_TO_SINT(SDNode *N, SelectionDAG &DAG); SDNode *ExpandREADCYCLECOUNTER(SDNode *N, SelectionDAG &DAG); + SDNode *ExpandATOMIC_LCS(SDNode *N, SelectionDAG &DAG); }; } Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=47929&r1=47928&r2=47929&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Mar 4 19:15:49 2008 @@ -37,6 +37,7 @@ def SDTX86cas : SDTypeProfile<0, 3, [SDTCisPtrTy<0>, SDTCisInt<1>, SDTCisVT<2, i8>]>; +def SDTX86cas8 : SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>; def SDTX86Ret : SDTypeProfile<0, 1, [SDTCisVT<0, i16>]>; @@ -75,6 +76,9 @@ def X86cas : SDNode<"X86ISD::LCMPXCHG_DAG", SDTX86cas, [SDNPHasChain, SDNPInFlag, SDNPOutFlag, SDNPMayStore, SDNPMayLoad]>; +def X86cas8 : SDNode<"X86ISD::LCMPXCHG8_DAG", SDTX86cas8, + [SDNPHasChain, SDNPInFlag, SDNPOutFlag, SDNPMayStore, + SDNPMayLoad]>; def X86retflag : SDNode<"X86ISD::RET_FLAG", SDTX86Ret, [SDNPHasChain, SDNPOptInFlag]>; @@ -2556,6 +2560,13 @@ "lock cmpxchgl $swap,$ptr", [(X86cas addr:$ptr, GR32:$swap, 4)]>, TB, LOCK; } +let Defs = [EAX, EBX, ECX, EDX, EFLAGS], Uses = [EAX, EBX, ECX, EDX] in { +def CMPXCHG8B : I<0xC7, Pseudo, (outs), (ins i32mem:$ptr), + "cmpxchg8b $ptr", []>, TB; +def LCMPXCHG8B : I<0xC7, Pseudo, (outs), (ins i32mem:$ptr), + "lock cmpxchg8b $ptr", + [(X86cas8 addr:$ptr)]>, TB, LOCK; +} let Defs = [AX, EFLAGS], Uses = [AX] in { def CMPXCHG16 : I<0xB1, Pseudo, (outs), (ins i16mem:$ptr, GR16:$swap), From evan.cheng at apple.com Tue Mar 4 19:30:59 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 05 Mar 2008 01:30:59 -0000 Subject: [llvm-commits] [llvm] r47931 - in /llvm/trunk: include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/Target/X86/X86ISelLowering.h test/CodeGen/X86/shrink-fp-const1.ll Message-ID: <200803050130.m251Uxsj013921@zion.cs.uiuc.edu> Author: evancheng Date: Tue Mar 4 19:30:59 2008 New Revision: 47931 URL: http://llvm.org/viewvc/llvm-project?rev=47931&view=rev Log: Add a target lowering hook to control whether it's worthwhile to compress fp constant. For x86, if sse2 is available, it's not a good idea since cvtss2sd is slower than a movsd load and it prevents load folding. On x87, it's important to shrink fp constant since fldt is very expensive. Added: llvm/trunk/test/CodeGen/X86/shrink-fp-const1.ll Modified: llvm/trunk/include/llvm/Target/TargetLowering.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h Modified: llvm/trunk/include/llvm/Target/TargetLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=47931&r1=47930&r2=47931&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) +++ llvm/trunk/include/llvm/Target/TargetLowering.h Tue Mar 4 19:30:59 2008 @@ -467,6 +467,11 @@ assert(0 && "Unsupported extended type!"); } + /// ShouldShrinkFPConstant - If true, then instruction selection should + /// seek to shrink the FP constant of the specified type to a smaller type + /// in order to save space and / or reduce runtime. + virtual bool ShouldShrinkFPConstant(MVT::ValueType VT) const { return true; } + /// hasTargetDAGCombine - If true, the target has custom DAG combine /// transformations that it can perform for the specified node. bool hasTargetDAGCombine(ISD::NodeType NT) const { Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47931&r1=47930&r2=47931&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Mar 4 19:30:59 2008 @@ -504,7 +504,8 @@ if (CFP->isValueValidForType(SVT, CFP->getValueAPF()) && // Only do this if the target has a native EXTLOAD instruction from // smaller type. - TLI.isLoadXLegal(ISD::EXTLOAD, SVT)) { + TLI.isLoadXLegal(ISD::EXTLOAD, SVT) && + TLI.ShouldShrinkFPConstant(VT)) { const Type *SType = MVT::getTypeForValueType(SVT); LLVMC = cast(ConstantExpr::getFPTrunc(LLVMC, SType)); VT = SVT; Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=47931&r1=47930&r2=47931&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Tue Mar 4 19:30:59 2008 @@ -434,6 +434,16 @@ virtual bool isVectorClearMaskLegal(std::vector &BVOps, MVT::ValueType EVT, SelectionDAG &DAG) const; + + /// ShouldShrinkFPConstant - If true, then instruction selection should + /// seek to shrink the FP constant of the specified type to a smaller type + /// in order to save space and / or reduce runtime. + virtual bool ShouldShrinkFPConstant(MVT::ValueType VT) const { + // Don't shrink FP constpool if SSE2 is available since cvtss2sd is more + // expensive than a straight movsd. On the other hand, it's important to + // shrink long double fp constant since fldt is very slow. + return !X86ScalarSSEf64 || VT == MVT::f80; + } /// IsEligibleForTailCallOptimization - Check whether the call is eligible /// for tail call optimization. Target which want to do tail call Added: llvm/trunk/test/CodeGen/X86/shrink-fp-const1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shrink-fp-const1.ll?rev=47931&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/shrink-fp-const1.ll (added) +++ llvm/trunk/test/CodeGen/X86/shrink-fp-const1.ll Tue Mar 4 19:30:59 2008 @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | not grep cvtss2sd +; PR1264 + +define double @foo(double %x) { + %y = mul double %x, 5.000000e-01 + ret double %y +} From gohman at apple.com Tue Mar 4 20:07:31 2008 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Mar 2008 02:07:31 -0000 Subject: [llvm-commits] [llvm] r47932 - in /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp LegalizeTypesExpand.cpp Message-ID: <200803050207.m2527W29014857@zion.cs.uiuc.edu> Author: djg Date: Tue Mar 4 20:07:31 2008 New Revision: 47932 URL: http://llvm.org/viewvc/llvm-project?rev=47932&view=rev Log: Codegen support for i128 UINT_TO_FP. This just fixes a bug in r47928 (Int64Ty is the correct type for the constant pool entry here) and removes the asserts, now that the code is capable of handling i128. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47932&r1=47931&r2=47932&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Mar 4 20:07:31 2008 @@ -5281,9 +5281,7 @@ "This is not an expansion!"); if (!isSigned) { - assert(SourceVT == MVT::i64 && - "This only works for 64-bit -> FP"); - // The 64-bit value loaded will be incorrectly if the 'sign bit' of the + // The integer value loaded will be incorrectly if the 'sign bit' of the // incoming integer is set. To handle this, we dynamically test to see if // it is set, and, if so, add a fudge factor. SDOperand Lo, Hi; @@ -5302,8 +5300,7 @@ SignSet, Four, Zero); uint64_t FF = 0x5f800000ULL; if (TLI.isLittleEndian()) FF <<= 32; - static Constant *FudgeFactor = - ConstantInt::get(IntegerType::get(Source.getValueSizeInBits()), FF); + static Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF); SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy()); CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp?rev=47932&r1=47931&r2=47932&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp Tue Mar 4 20:07:31 2008 @@ -1020,7 +1020,6 @@ // We know the destination is legal, but that the input needs to be expanded. assert(getTypeAction(Source.getValueType()) == Expand && "This is not an expansion!"); - assert(Source.getValueType() == MVT::i64 && "Only handle expand from i64!"); // If this is unsigned, and not supported, first perform the conversion to // signed, then adjust the result if the sign bit is set. From evan.cheng at apple.com Tue Mar 4 20:08:04 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 05 Mar 2008 02:08:04 -0000 Subject: [llvm-commits] [llvm] r47933 - /llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Message-ID: <200803050208.m252841t014884@zion.cs.uiuc.edu> Author: evancheng Date: Tue Mar 4 20:08:03 2008 New Revision: 47933 URL: http://llvm.org/viewvc/llvm-project?rev=47933&view=rev Log: Rather than asserting. Dump out the MI that we are not able to encode and abort. Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=47933&r1=47932&r2=47933&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Tue Mar 4 20:08:03 2008 @@ -807,5 +807,10 @@ break; } - assert((Desc->isVariadic() || CurOp == NumOps) && "Unknown encoding!"); + if (!Desc->isVariadic() && CurOp != NumOps) { + cerr << "Cannot encode: "; + MI.dump(); + cerr << '\n'; + abort(); + } } From evan.cheng at apple.com Tue Mar 4 20:34:36 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 05 Mar 2008 02:34:36 -0000 Subject: [llvm-commits] [llvm] r47934 - /llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Message-ID: <200803050234.m252YapO015622@zion.cs.uiuc.edu> Author: evancheng Date: Tue Mar 4 20:34:36 2008 New Revision: 47934 URL: http://llvm.org/viewvc/llvm-project?rev=47934&view=rev Log: Ignore debugging related instructions if they get this far. Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=47934&r1=47933&r2=47934&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Tue Mar 4 20:34:36 2008 @@ -610,11 +610,15 @@ switch (Opcode) { default: assert(0 && "psuedo instructions should be removed before code emission"); + break; case TargetInstrInfo::INLINEASM: assert(0 && "JIT does not support inline asm!\n"); + break; case TargetInstrInfo::LABEL: MCE.emitLabel(MI.getOperand(0).getImm()); break; + case TargetInstrInfo::DECLARE: + case X86::DWARF_LOC: case X86::IMPLICIT_DEF_GR8: case X86::IMPLICIT_DEF_GR16: case X86::IMPLICIT_DEF_GR32: From resistor at mac.com Tue Mar 4 23:41:20 2008 From: resistor at mac.com (Owen Anderson) Date: Tue, 4 Mar 2008 23:41:20 -0600 Subject: [llvm-commits] [llvm-gcc-4.2] r47879 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <200803040325.m243PGJ2025366@zion.cs.uiuc.edu> References: <200803040325.m243PGJ2025366@zion.cs.uiuc.edu> Message-ID: <8E59AE15-AB26-460F-9132-11476ADEDEED@mac.com> Evan, I'm seeing a failure in bootstrap when compiling libgomp after this patch. I'm reverting for now. --Owen On Mar 3, 2008, at 9:25 PM, Evan Cheng wrote: > Author: evancheng > Date: Mon Mar 3 21:25:15 2008 > New Revision: 47879 > > URL: http://llvm.org/viewvc/llvm-project?rev=47879&view=rev > Log: > Unbreak x86-64 build. > > Modified: > llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > > Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47879&r1=47878&r2=47879&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) > +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Mar 3 21:25:15 2008 > @@ -4294,7 +4294,7 @@ > C, C + 5); > return true; > } > -#if defined(TARGET_386) || defined(TARGET_ALPHA) > +#if defined(TARGET_ALPHA) > //gcc uses many names for the sync intrinsics > case BUILT_IN_VAL_COMPARE_AND_SWAP_1: > case BUILT_IN_VAL_COMPARE_AND_SWAP_2: > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From resistor at mac.com Wed Mar 5 00:08:26 2008 From: resistor at mac.com (Owen Anderson) Date: Wed, 05 Mar 2008 06:08:26 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47936 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200803050608.m2568Q7m022471@zion.cs.uiuc.edu> Author: resistor Date: Wed Mar 5 00:08:26 2008 New Revision: 47936 URL: http://llvm.org/viewvc/llvm-project?rev=47936&view=rev Log: Revert the last patch to this file. It was breaking the build on Darwin. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47936&r1=47935&r2=47936&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Wed Mar 5 00:08:26 2008 @@ -4294,7 +4294,7 @@ C, C + 5); return true; } -#if defined(TARGET_ALPHA) || defined(TARGET_386) +#if defined(TARGET_ALPHA) //gcc uses many names for the sync intrinsics case BUILT_IN_VAL_COMPARE_AND_SWAP_1: case BUILT_IN_VAL_COMPARE_AND_SWAP_2: From resistor at mac.com Wed Mar 5 00:08:50 2008 From: resistor at mac.com (Owen Anderson) Date: Wed, 5 Mar 2008 00:08:50 -0600 Subject: [llvm-commits] [llvm-gcc-4.2] r47879 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <8E59AE15-AB26-460F-9132-11476ADEDEED@mac.com> References: <200803040325.m243PGJ2025366@zion.cs.uiuc.edu> <8E59AE15-AB26-460F-9132-11476ADEDEED@mac.com> Message-ID: <0B2441E0-4406-4C8F-909B-FBB5D7E2B989@mac.com> Oops, looks like I spoke too soon. It was Andrew's patch that caused the real breakage. --Owen On Mar 4, 2008, at 11:41 PM, Owen Anderson wrote: > Evan, > > I'm seeing a failure in bootstrap when compiling libgomp after this > patch. I'm reverting for now. > > --Owen > > On Mar 3, 2008, at 9:25 PM, Evan Cheng wrote: > >> Author: evancheng >> Date: Mon Mar 3 21:25:15 2008 >> New Revision: 47879 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=47879&view=rev >> Log: >> Unbreak x86-64 build. >> >> Modified: >> llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp >> >> Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47879&r1=47878&r2=47879&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) >> +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Mar 3 21:25:15 2008 >> @@ -4294,7 +4294,7 @@ >> C, C + 5); >> return true; >> } >> -#if defined(TARGET_386) || defined(TARGET_ALPHA) >> +#if defined(TARGET_ALPHA) >> //gcc uses many names for the sync intrinsics >> case BUILT_IN_VAL_COMPARE_AND_SWAP_1: >> case BUILT_IN_VAL_COMPARE_AND_SWAP_2: >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From resistor at mac.com Wed Mar 5 00:09:28 2008 From: resistor at mac.com (Owen Anderson) Date: Wed, 5 Mar 2008 00:09:28 -0600 Subject: [llvm-commits] [llvm-gcc-4.2] r47905 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <200803042118.m24LIdd4005387@zion.cs.uiuc.edu> References: <200803042118.m24LIdd4005387@zion.cs.uiuc.edu> Message-ID: This was causing bootstrap failure on Darwin/X86, so I just reverted it. --Owen On Mar 4, 2008, at 3:18 PM, Andrew Lenharth wrote: > Author: alenhar2 > Date: Tue Mar 4 15:18:39 2008 > New Revision: 47905 > > URL: http://llvm.org/viewvc/llvm-project?rev=47905&view=rev > Log: > x86-64 supports these now, this builds fine now on linux/x86-64 > > Modified: > llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > > Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47905&r1=47904&r2=47905&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) > +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Mar 4 15:18:39 2008 > @@ -4294,7 +4294,7 @@ > C, C + 5); > return true; > } > -#if defined(TARGET_ALPHA) > +#if defined(TARGET_ALPHA) || defined(TARGET_386) > //gcc uses many names for the sync intrinsics > case BUILT_IN_VAL_COMPARE_AND_SWAP_1: > case BUILT_IN_VAL_COMPARE_AND_SWAP_2: > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From sabre at nondot.org Wed Mar 5 00:11:21 2008 From: sabre at nondot.org (Chris Lattner) Date: Wed, 5 Mar 2008 00:11:21 -0600 Subject: [llvm-commits] CVS: llvm-www/ProjectsWithLLVM/index.html Message-ID: <200803050611.m256BLwp022598@zion.cs.uiuc.edu> Changes in directory llvm-www/ProjectsWithLLVM: index.html updated: 1.42 -> 1.43 --- Log message: linkify AIF --- Diffs of the changes: (+2 -1) index.html | 3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm-www/ProjectsWithLLVM/index.html diff -u llvm-www/ProjectsWithLLVM/index.html:1.42 llvm-www/ProjectsWithLLVM/index.html:1.43 --- llvm-www/ProjectsWithLLVM/index.html:1.42 Fri Feb 29 17:32:13 2008 +++ llvm-www/ProjectsWithLLVM/index.html Wed Mar 5 00:10:34 2008 @@ -158,7 +158,8 @@

Efficient use of the computational resources available for image processing is -a goal of the Adobe Image Foundation project. Our language, "Hydra", is used +a goal of the Adobe +Image Foundation project. Our language, "Hydra", is used to describe single- and multi-stage image processing kernels, which are then compiled and run on a target machine within a larger application. Similarly to how its namesake had many heads, our Hydra can be run on the GPU or From sabre at nondot.org Wed Mar 5 00:46:59 2008 From: sabre at nondot.org (Chris Lattner) Date: Wed, 05 Mar 2008 06:46:59 -0000 Subject: [llvm-commits] [llvm] r47937 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200803050646.m256kx85023666@zion.cs.uiuc.edu> Author: lattner Date: Wed Mar 5 00:46:58 2008 New Revision: 47937 URL: http://llvm.org/viewvc/llvm-project?rev=47937&view=rev Log: Improve comment, pass in the original VT so that we can shrink a long double constant all the way to float, not stopping at double. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47937&r1=47936&r2=47937&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Mar 5 00:46:58 2008 @@ -486,7 +486,9 @@ // If a FP immediate is precise when represented as a float and if the // target can do an extending load from float to double, we put it into // the constant pool as a float, even if it's is statically typed as a - // double. + // double. This shrinks FP constants and canonicalizes them for targets where + // an FP extending load is the same cost as a normal load (such as on the x87 + // fp stack or PPC FP unit). MVT::ValueType VT = CFP->getValueType(0); ConstantFP *LLVMC = ConstantFP::get(MVT::getTypeForValueType(VT), CFP->getValueAPF()); @@ -505,7 +507,7 @@ // Only do this if the target has a native EXTLOAD instruction from // smaller type. TLI.isLoadXLegal(ISD::EXTLOAD, SVT) && - TLI.ShouldShrinkFPConstant(VT)) { + TLI.ShouldShrinkFPConstant(OrigVT)) { const Type *SType = MVT::getTypeForValueType(SVT); LLVMC = cast(ConstantExpr::getFPTrunc(LLVMC, SType)); VT = SVT; From sabre at nondot.org Wed Mar 5 00:48:14 2008 From: sabre at nondot.org (Chris Lattner) Date: Wed, 05 Mar 2008 06:48:14 -0000 Subject: [llvm-commits] [llvm] r47938 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAG.cpp test/CodeGen/X86/shrink-fp-const2.ll Message-ID: <200803050648.m256mEhj023710@zion.cs.uiuc.edu> Author: lattner Date: Wed Mar 5 00:48:13 2008 New Revision: 47938 URL: http://llvm.org/viewvc/llvm-project?rev=47938&view=rev Log: Generalize FP constant shrinking optimization to apply to any vt except ppc long double. This allows us to shrink constant pool entries for x86 long double constants, which in turn allows us to use flds/fldl instead of fldt. Added: llvm/trunk/test/CodeGen/X86/shrink-fp-const2.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=47938&r1=47937&r2=47938&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Mar 5 00:48:13 2008 @@ -44,6 +44,17 @@ return Res; } +static const fltSemantics *MVTToAPFloatSemantics(MVT::ValueType VT) { + switch (VT) { + default: assert(0 && "Unknown FP format"); + case MVT::f32: return &APFloat::IEEEsingle; + case MVT::f64: return &APFloat::IEEEdouble; + case MVT::f80: return &APFloat::x87DoubleExtended; + case MVT::f128: return &APFloat::IEEEquad; + case MVT::ppcf128: return &APFloat::PPCDoubleDouble; + } +} + SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} //===----------------------------------------------------------------------===// @@ -60,28 +71,20 @@ bool ConstantFPSDNode::isValueValidForType(MVT::ValueType VT, const APFloat& Val) { + assert(MVT::isFloatingPoint(VT) && "Can only convert between FP types"); + + // Anything can be extended to ppc long double. + if (VT == MVT::ppcf128) + return true; + + // PPC long double cannot be shrunk to anything though. + if (&Val.getSemantics() == &APFloat::PPCDoubleDouble) + return false; + // convert modifies in place, so make a copy. APFloat Val2 = APFloat(Val); - switch (VT) { - default: - return false; // These can't be represented as floating point! - - // FIXME rounding mode needs to be more flexible - case MVT::f32: - return &Val2.getSemantics() == &APFloat::IEEEsingle || - Val2.convert(APFloat::IEEEsingle, APFloat::rmNearestTiesToEven) == - APFloat::opOK; - case MVT::f64: - return &Val2.getSemantics() == &APFloat::IEEEsingle || - &Val2.getSemantics() == &APFloat::IEEEdouble || - Val2.convert(APFloat::IEEEdouble, APFloat::rmNearestTiesToEven) == - APFloat::opOK; - // TODO: Figure out how to test if we can use a shorter type instead! - case MVT::f80: - case MVT::f128: - case MVT::ppcf128: - return true; - } + return Val2.convert(*MVTToAPFloatSemantics(VT), + APFloat::rmNearestTiesToEven) == APFloat::opOK; } //===----------------------------------------------------------------------===// @@ -1786,12 +1789,8 @@ case ISD::FP_EXTEND: // This can return overflow, underflow, or inexact; we don't care. // FIXME need to be more flexible about rounding mode. - (void) V.convert(VT==MVT::f32 ? APFloat::IEEEsingle : - VT==MVT::f64 ? APFloat::IEEEdouble : - VT==MVT::f80 ? APFloat::x87DoubleExtended : - VT==MVT::f128 ? APFloat::IEEEquad : - APFloat::Bogus, - APFloat::rmNearestTiesToEven); + (void)V.convert(*MVTToAPFloatSemantics(VT), + APFloat::rmNearestTiesToEven); return getConstantFP(V, VT); case ISD::FP_TO_SINT: case ISD::FP_TO_UINT: { Added: llvm/trunk/test/CodeGen/X86/shrink-fp-const2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shrink-fp-const2.ll?rev=47938&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/shrink-fp-const2.ll (added) +++ llvm/trunk/test/CodeGen/X86/shrink-fp-const2.ll Wed Mar 5 00:48:13 2008 @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep flds +; This should be a flds, not fldt. +define x86_fp80 @test2() nounwind { +entry: + ret x86_fp80 0xK3FFFC000000000000000 +} + From romix.llvm at googlemail.com Wed Mar 5 01:08:39 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Wed, 5 Mar 2008 10:08:39 +0300 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <388F3E9D-F770-402B-8744-6D1501642885@apple.com> References: <522BCA72-6445-4857-BE7B-019B841AA9DB@apple.com> <2DFEE2ED-2D57-4310-8F6C-1B08F18D4363@apple.com> <388F3E9D-F770-402B-8744-6D1501642885@apple.com> Message-ID: Hi Dan, 2008/3/5, Dan Gohman : > > On Mar 4, 2008, at 10:37 AM, Roman Levenstein wrote: > >> > > >> I thought those were approved? We understanding std::set is probably > >> the best choice of ADT for now. Thanks! > > > > OK. I'll commit them tomorrow. > > > Great! Note that I did have one comment on the ScheduleDAGList.cpp > patch. Sure, proposed changes from your comment will be in the patch. > > But are you sure about the second one for the ScheduleDAGRRList? > > I mean this: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20080303/059078.html > > > > I just took a look at this one. Here are my comments. > > > + // This may break the ordering in the priority queue. > > PredSU->CycleBound = std::max(PredSU->CycleBound, > > I->Dep->Cycle + PredSU->Latency); > > This seems dangerous. After this is done, updateNode is called, > which attempts to remove the node from the set, but if the node has > changed > in a way that's significant to the comparison function, that remove > may not > work properly. It looks like the only way to be safe is to remove the > node > from the queue before making any modifications. Good catch. I'll see how to fix this. > > + for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { > > + Queue.insert(Nodes[i]); > > > + } > > This could be simplified with > > Queue.insert(Nodes.begin(), Nodes.end()); > > > + SUnit *V = *Queue.rbegin(); > > + Queue.erase(--Queue.end(),Queue.end()); > > This could be simplified with > > Queue.erase(prior(Queue.end()); > > or even > > iterator i = prior(Queue.rbegin()); > > SUnit *V = *i; > Queue.erase(i); > > > `prior' is defined in llvm/ADT/STLExtras.h. Thanks! This makes the code cleaner. > > - unsigned LBonus = (SumOfUnscheduledPredsOfSuccs(left) == 1) ? > > 2 : 0; > > - unsigned RBonus = (SumOfUnscheduledPredsOfSuccs(right) == 1) ? > 2 : 0; > > > + unsigned LBonus = (SumOfUnscheduledPredsOfSuccs(left,1) == 1) ? > 2 : 0; > > + unsigned RBonus = (SumOfUnscheduledPredsOfSuccs(right,1) == 1) ? > 2 : 0; > > It's not clear to me what this change is doing. Well, the original > code isn't > quite clear to me either :-}. Is this a heuristic change? No, it does not change the semantic. I don't know what the original code wanted to do. I just made it more efficient ;-) SumOfUnscheduledPredsOfSuccs is called from the comparison operator used by the priority queue, which is called rather often when any operations on the queue are performed. SumOfUnscheduledPredsOfSuccs tries every time to compute the number of ALL unscheduled predecessors of successors for a given node. And there can be hundreds/thousends of them for big BBs (On some of my testcases this function was taking up to 40-50% of the compilation time!). But then it compares this number to 1, as you can see above. So I modified SumOfUnscheduledPredsOfSuccs to compute only the number of predecessors until it reaches certain limit/treshold, since it is enough for our goals. After this change, SumOfUnscheduledPredsOfSuccs virtually does not consume any time at all, profiler does not even show it, and the overall compilation time is faster. -Roman From sabre at nondot.org Wed Mar 5 01:22:40 2008 From: sabre at nondot.org (Chris Lattner) Date: Wed, 05 Mar 2008 07:22:40 -0000 Subject: [llvm-commits] [llvm] r47939 - /llvm/trunk/lib/Target/X86/README-SSE.txt Message-ID: <200803050722.m257Mem8024675@zion.cs.uiuc.edu> Author: lattner Date: Wed Mar 5 01:22:39 2008 New Revision: 47939 URL: http://llvm.org/viewvc/llvm-project?rev=47939&view=rev Log: add a note Modified: llvm/trunk/lib/Target/X86/README-SSE.txt Modified: llvm/trunk/lib/Target/X86/README-SSE.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-SSE.txt?rev=47939&r1=47938&r2=47939&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-SSE.txt (original) +++ llvm/trunk/lib/Target/X86/README-SSE.txt Wed Mar 5 01:22:39 2008 @@ -748,3 +748,33 @@ right, but we shouldn't have to custom lower anything. This is probably related to <2 x i64> ops being so bad. +//===---------------------------------------------------------------------===// + +'select' on vectors and scalars could be a whole lot better. We currently +lower them to conditional branches. On x86-64 for example, we compile this: + +double test(double a, double b, double c, double d) { return a Author: evancheng Date: Wed Mar 5 02:11:27 2008 New Revision: 47940 URL: http://llvm.org/viewvc/llvm-project?rev=47940&view=rev Log: PSLLWri etc. are two-address instructions. Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=47940&r1=47939&r2=47940&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Wed Mar 5 02:11:27 2008 @@ -1765,7 +1765,7 @@ [(int_x86_sse2_storeu_dq addr:$dst, VR128:$src)]>, XS, Requires<[HasSSE2]>; -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { multiclass PDI_binop_rm_int opc, string OpcodeStr, Intrinsic IntId, bit Commutable = 0> { @@ -1866,6 +1866,7 @@ defm PSRAD : PDI_binop_rm_int<0xE2, "psrad", int_x86_sse2_psra_d>; // Some immediate variants need to match a bit_convert. +let Constraints = "$src1 = $dst" in { def PSLLWri : PDIi8<0x71, MRM6r, (outs VR128:$dst), (ins VR128:$src1, i32i8imm:$src2), "psllw\t{$src2, $dst|$dst, $src2}", @@ -1908,6 +1909,7 @@ "psrad\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_psra_d VR128:$src1, (scalar_to_vector (i32 imm:$src2))))]>; +} // PSRAQ doesn't exist in SSE[1-3]. From evan.cheng at apple.com Wed Mar 5 02:19:17 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 05 Mar 2008 08:19:17 -0000 Subject: [llvm-commits] [llvm] r47941 - /llvm/trunk/lib/Target/X86/X86InstrSSE.td Message-ID: <200803050819.m258JHBi026228@zion.cs.uiuc.edu> Author: evancheng Date: Wed Mar 5 02:19:16 2008 New Revision: 47941 URL: http://llvm.org/viewvc/llvm-project?rev=47941&view=rev Log: isTwoAddress = 1 -> Constraints. Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=47941&r1=47940&r2=47941&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Wed Mar 5 02:19:16 2008 @@ -360,7 +360,7 @@ "cvttps2pi\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (int_x86_sse_cvttps2pi (load addr:$src)))]>; -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { def Int_CVTPI2PSrr : PSI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR64:$src2), "cvtpi2ps\t{$src2, $dst|$dst, $src2}", @@ -383,7 +383,7 @@ [(set GR32:$dst, (int_x86_sse_cvttss2si(load addr:$src)))]>; -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { def Int_CVTSI2SSrr : SSI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR32:$src2), "cvtsi2ss\t{$src2, $dst|$dst, $src2}", @@ -397,7 +397,7 @@ } // Comparison instructions -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { let neverHasSideEffects = 1 in def CMPSSrr : SSIi8<0xC2, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src1, FR32:$src, SSECC:$cc), @@ -419,7 +419,7 @@ } // Defs = [EFLAGS] // Aliases to match intrinsics which expect XMM operand(s). -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { def Int_CMPSSrr : SSIi8<0xC2, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc), "cmp${cc}ss\t{$src, $dst|$dst, $src}", @@ -479,7 +479,7 @@ [(set FR32:$dst, (alignedloadfsf32 addr:$src))]>; // Alias bitwise logical operations using SSE logical ops on packed FP values. -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { let isCommutable = 1 in { def FsANDPSrr : PSI<0x54, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src1, FR32:$src2), "andps\t{$src2, $dst|$dst, $src2}", @@ -526,7 +526,7 @@ /// These three forms can each be reg+reg or reg+mem, so there are a total of /// six "instructions". /// -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { multiclass basic_sse1_fp_binop_rm opc, string OpcodeStr, SDNode OpNode, Intrinsic F32Int, bit Commutable = 0> { @@ -584,7 +584,7 @@ /// /// This provides a total of eight "instructions". /// -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { multiclass sse1_fp_binop_rm opc, string OpcodeStr, SDNode OpNode, Intrinsic F32Int, @@ -683,7 +683,7 @@ "movups\t{$src, $dst|$dst, $src}", [(int_x86_sse_storeu_ps addr:$dst, VR128:$src)]>; -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { let AddedComplexity = 20 in { def MOVLPSrm : PSI<0x12, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2), @@ -700,7 +700,7 @@ (bc_v4f32 (v2f64 (scalar_to_vector (loadf64 addr:$src2)))), MOVHP_shuffle_mask)))]>; } // AddedComplexity -} // isTwoAddress +} // Constraints = "$src1 = $dst" def MOVLPSmr : PSI<0x13, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src), "movlps\t{$src, $dst|$dst, $src}", @@ -717,7 +717,7 @@ UNPCKH_shuffle_mask)), (iPTR 0))), addr:$dst)]>; -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { let AddedComplexity = 15 in { def MOVLHPSrr : PSI<0x16, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), "movlhps\t{$src2, $dst|$dst, $src2}", @@ -731,7 +731,7 @@ (v4f32 (vector_shuffle VR128:$src1, VR128:$src2, MOVHLPS_shuffle_mask)))]>; } // AddedComplexity -} // isTwoAddress +} // Constraints = "$src1 = $dst" @@ -815,7 +815,7 @@ int_x86_sse_rcp_ss, int_x86_sse_rcp_ps>; // Logical -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { let isCommutable = 1 in { def ANDPSrr : PSI<0x54, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), @@ -865,7 +865,7 @@ (memopv2i64 addr:$src2))))]>; } -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { def CMPPSrri : PSIi8<0xC2, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc), "cmp${cc}ps\t{$src, $dst|$dst, $src}", @@ -879,7 +879,7 @@ } // Shuffle and unpack instructions -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { let isConvertibleToThreeAddress = 1 in // Convert to pshufd def SHUFPSrri : PSIi8<0xC6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, @@ -929,7 +929,7 @@ VR128:$src1, (memopv4f32 addr:$src2), UNPCKL_shuffle_mask)))]>; } // AddedComplexity -} // isTwoAddress +} // Constraints = "$src1 = $dst" // Mask creation def MOVMSKPSrr : PSI<0x50, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src), @@ -993,7 +993,7 @@ // Move to lower bits of a VR128, leaving upper bits alone. // Three operand (but two address) aliases. -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { let neverHasSideEffects = 1 in def MOVLSS2PSrr : SSI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, FR32:$src2), @@ -1107,7 +1107,7 @@ (load addr:$src)))]>; // Comparison instructions -let isTwoAddress = 1, neverHasSideEffects = 1 in { +let Constraints = "$src1 = $dst", neverHasSideEffects = 1 in { def CMPSDrr : SDIi8<0xC2, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src1, FR64:$src, SSECC:$cc), "cmp${cc}sd\t{$src, $dst|$dst, $src}", []>; @@ -1128,7 +1128,7 @@ } // Aliases to match intrinsics which expect XMM operand(s). -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { def Int_CMPSDrr : SDIi8<0xC2, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc), "cmp${cc}sd\t{$src, $dst|$dst, $src}", @@ -1184,7 +1184,7 @@ [(set FR64:$dst, (alignedloadfsf64 addr:$src))]>; // Alias bitwise logical operations using SSE logical ops on packed FP values. -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { let isCommutable = 1 in { def FsANDPDrr : PDI<0x54, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src1, FR64:$src2), "andpd\t{$src2, $dst|$dst, $src2}", @@ -1231,7 +1231,7 @@ /// These three forms can each be reg+reg or reg+mem, so there are a total of /// six "instructions". /// -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { multiclass basic_sse2_fp_binop_rm opc, string OpcodeStr, SDNode OpNode, Intrinsic F64Int, bit Commutable = 0> { @@ -1289,7 +1289,7 @@ /// /// This provides a total of eight "instructions". /// -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { multiclass sse2_fp_binop_rm opc, string OpcodeStr, SDNode OpNode, Intrinsic F64Int, @@ -1387,7 +1387,7 @@ "movupd\t{$src, $dst|$dst, $src}", [(int_x86_sse2_storeu_pd addr:$dst, VR128:$src)]>; -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { let AddedComplexity = 20 in { def MOVLPDrm : PDI<0x12, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2), @@ -1404,7 +1404,7 @@ (scalar_to_vector (loadf64 addr:$src2)), MOVHP_shuffle_mask)))]>; } // AddedComplexity -} // isTwoAddress +} // Constraints = "$src1 = $dst" def MOVLPDmr : PDI<0x13, MRMDestMem, (outs), (ins f64mem:$dst, VR128:$src), "movlpd\t{$src, $dst|$dst, $src}", @@ -1500,7 +1500,7 @@ // Match intrinsics which expect XMM operand(s). // Aliases for intrinsics -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { def Int_CVTSI2SDrr: SDI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR32:$src2), "cvtsi2sd\t{$src2, $dst|$dst, $src2}", @@ -1610,7 +1610,7 @@ // There is no f64 version of the reciprocal approximation instructions. // Logical -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { let isCommutable = 1 in { def ANDPDrr : PDI<0x54, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), @@ -1664,7 +1664,7 @@ (memopv2i64 addr:$src2)))]>; } -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { def CMPPDrri : PDIi8<0xC2, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc), "cmp${cc}pd\t{$src, $dst|$dst, $src}", @@ -1678,7 +1678,7 @@ } // Shuffle and unpack instructions -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { def SHUFPDrri : PDIi8<0xC6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i8imm:$src3), "shufpd\t{$src3, $src2, $dst|$dst, $src2, $src3}", @@ -1725,7 +1725,7 @@ VR128:$src1, (memopv2f64 addr:$src2), UNPCKL_shuffle_mask)))]>; } // AddedComplexity -} // isTwoAddress +} // Constraints = "$src1 = $dst" //===----------------------------------------------------------------------===// @@ -1811,7 +1811,7 @@ [(set VR128:$dst, (OpNode VR128:$src1,(memopv2i64 addr:$src2)))]>; } -} // isTwoAddress +} // Constraints = "$src1 = $dst" // 128-bit Integer Arithmetic @@ -1914,7 +1914,7 @@ // PSRAQ doesn't exist in SSE[1-3]. // 128-bit logical shifts. -let isTwoAddress = 1, neverHasSideEffects = 1 in { +let Constraints = "$src1 = $dst", neverHasSideEffects = 1 in { def PSLLDQri : PDIi8<0x73, MRM7r, (outs VR128:$dst), (ins VR128:$src1, i32i8imm:$src2), "pslldq\t{$src2, $dst|$dst, $src2}", []>; @@ -1938,7 +1938,7 @@ defm POR : PDI_binop_rm_v2i64<0xEB, "por" , or , 1>; defm PXOR : PDI_binop_rm_v2i64<0xEF, "pxor", xor, 1>; -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { def PANDNrr : PDI<0xDF, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), "pandn\t{$src2, $dst|$dst, $src2}", @@ -2015,7 +2015,7 @@ XD, Requires<[HasSSE2]>; -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { def PUNPCKLBWrr : PDI<0x60, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), "punpcklbw\t{$src2, $dst|$dst, $src2}", @@ -2129,7 +2129,7 @@ "pextrw\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set GR32:$dst, (X86pextrw (v8i16 VR128:$src1), imm:$src2))]>; -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { def PINSRWrri : PDIi8<0xC4, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR32:$src2, i32i8imm:$src3), @@ -2263,7 +2263,7 @@ // Move to lower bits of a VR128, leaving upper bits alone. // Three operand (but two address) aliases. -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { let neverHasSideEffects = 1 in def MOVLSD2PDrr : SDI<0x10, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, FR64:$src2), @@ -2386,7 +2386,7 @@ SSE_splat_lo_mask)))]>; // Arithmetic -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { def ADDSUBPSrr : S3DI<0xD0, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), "addsubps\t{$src2, $dst|$dst, $src2}", @@ -2431,7 +2431,7 @@ !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), [(set VR128:$dst, (v2f64 (IntId VR128:$src1, (load addr:$src2))))]>; -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { def HADDPSrr : S3D_Intrr<0x7C, "haddps", int_x86_sse3_hadd_ps>; def HADDPSrm : S3D_Intrm<0x7C, "haddps", int_x86_sse3_hadd_ps>; def HADDPDrr : S3_Intrr <0x7C, "haddpd", int_x86_sse3_hadd_pd>; @@ -2567,7 +2567,7 @@ int_x86_ssse3_pabs_d_128>; /// SS3I_binop_rm_int_8 - Simple SSSE3 binary operator whose type is v*i8. -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { multiclass SS3I_binop_rm_int_8 opc, string OpcodeStr, Intrinsic IntId64, Intrinsic IntId128, bit Commutable = 0> { @@ -2601,7 +2601,7 @@ } /// SS3I_binop_rm_int_16 - Simple SSSE3 binary operator whose type is v*i16. -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { multiclass SS3I_binop_rm_int_16 opc, string OpcodeStr, Intrinsic IntId64, Intrinsic IntId128, bit Commutable = 0> { @@ -2635,7 +2635,7 @@ } /// SS3I_binop_rm_int_32 - Simple SSSE3 binary operator whose type is v*i32. -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { multiclass SS3I_binop_rm_int_32 opc, string OpcodeStr, Intrinsic IntId64, Intrinsic IntId128, bit Commutable = 0> { @@ -2705,7 +2705,7 @@ int_x86_ssse3_psign_d, int_x86_ssse3_psign_d_128>; -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { def PALIGNR64rr : SS3AI<0x0F, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2, i16imm:$src3), "palignr\t{$src3, $src2, $dst|$dst, $src2, $src3}", @@ -3149,7 +3149,7 @@ int_x86_sse41_phminposuw>; /// SS41I_binop_rm_int - Simple SSE 4.1 binary operator -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { multiclass SS41I_binop_rm_int opc, string OpcodeStr, Intrinsic IntId128, bit Commutable = 0> { def rr : SS48I opc, string OpcodeStr, SDNode OpNode, Intrinsic IntId128, bit Commutable = 0> { def rr : SS48I opc, string OpcodeStr, Intrinsic IntId128, bit Commutable = 0> { def rri : SS4AI opc, string OpcodeStr, Intrinsic IntId> { def rr0 : SS48I; -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { multiclass SS41I_insert8 opc, string OpcodeStr> { def rr : SS4AI; -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { multiclass SS41I_insert32 opc, string OpcodeStr> { def rr : SS4AI; -let isTwoAddress = 1 in { +let Constraints = "$src1 = $dst" in { multiclass SS41I_insertf32 opc, string OpcodeStr> { def rr : SS4AI Author: evancheng Date: Wed Mar 5 02:26:18 2008 New Revision: 47942 URL: http://llvm.org/viewvc/llvm-project?rev=47942&view=rev Log: Add a test for _mm_slli_epi16 and _mm_srli_epi16. Added: test-suite/trunk/SingleSource/UnitTests/Vector/SSE/sse.shift.c Added: test-suite/trunk/SingleSource/UnitTests/Vector/SSE/sse.shift.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/SSE/sse.shift.c?rev=47942&view=auto ============================================================================== --- test-suite/trunk/SingleSource/UnitTests/Vector/SSE/sse.shift.c (added) +++ test-suite/trunk/SingleSource/UnitTests/Vector/SSE/sse.shift.c Wed Mar 5 02:26:18 2008 @@ -0,0 +1,21 @@ +#include +#include + +typedef union { + __m128i V; + int A[4]; +} IV; + +static void printIV(IV *F) { + printf("%08x %08x %08x %08x\n", F->A[0], F->A[1], F->A[2], F->A[3]); +} + +int main() { + __m128i allones, zeroones, onezeros; + allones = _mm_cmpeq_epi32(allones, allones); + zeroones = _mm_srli_epi16(allones, 8); + printIV((IV*)&zeroones); + onezeros = _mm_slli_epi16(allones, 8); + printIV((IV*)&onezeros); + return 0; +} From evan.cheng at apple.com Wed Mar 5 02:41:28 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 5 Mar 2008 00:41:28 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r47879 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <0B2441E0-4406-4C8F-909B-FBB5D7E2B989@mac.com> References: <200803040325.m243PGJ2025366@zion.cs.uiuc.edu> <8E59AE15-AB26-460F-9132-11476ADEDEED@mac.com> <0B2441E0-4406-4C8F-909B-FBB5D7E2B989@mac.com> Message-ID: <09AEE1B0-838F-4445-9D08-E81F9468B7FB@apple.com> Yeah, I know you want to blame me for *everything*. :-) Try again next time. Evan On Mar 4, 2008, at 10:08 PM, Owen Anderson wrote: > Oops, looks like I spoke too soon. It was Andrew's patch that caused > the real breakage. > > --Owen > > On Mar 4, 2008, at 11:41 PM, Owen Anderson wrote: > >> Evan, >> >> I'm seeing a failure in bootstrap when compiling libgomp after this >> patch. I'm reverting for now. >> >> --Owen >> >> On Mar 3, 2008, at 9:25 PM, Evan Cheng wrote: >> >>> Author: evancheng >>> Date: Mon Mar 3 21:25:15 2008 >>> New Revision: 47879 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=47879&view=rev >>> Log: >>> Unbreak x86-64 build. >>> >>> Modified: >>> llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp >>> >>> Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47879&r1=47878&r2=47879&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) >>> +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Mar 3 21:25:15 2008 >>> @@ -4294,7 +4294,7 @@ >>> C, C + 5); >>> return true; >>> } >>> -#if defined(TARGET_386) || defined(TARGET_ALPHA) >>> +#if defined(TARGET_ALPHA) >>> //gcc uses many names for the sync intrinsics >>> case BUILT_IN_VAL_COMPARE_AND_SWAP_1: >>> case BUILT_IN_VAL_COMPARE_AND_SWAP_2: >>> >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Wed Mar 5 03:28:03 2008 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 05 Mar 2008 09:28:03 -0000 Subject: [llvm-commits] [llvm] r47943 - in /llvm/trunk: autoconf/configure.ac configure Message-ID: <200803050928.m259S4qe003634@zion.cs.uiuc.edu> Author: void Date: Wed Mar 5 03:28:02 2008 New Revision: 47943 URL: http://llvm.org/viewvc/llvm-project?rev=47943&view=rev Log: Use AC_PATH_PROG correctly: http://www.gnu.org/software/autoconf/manual/autoconf.html#Generic-Programs Modified: llvm/trunk/autoconf/configure.ac llvm/trunk/configure Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=47943&r1=47942&r2=47943&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Wed Mar 5 03:28:02 2008 @@ -580,18 +580,18 @@ dnl are not found then they are set to "true" which always succeeds but does dnl nothing. This just lets the build output show that we could have done dnl something if the tool was available. -AC_PATH_PROG(BZIP2,[bzip2],[echo "Skipped: bzip2 not found"]) -AC_PATH_PROG(DOXYGEN,[doxygen],[echo "Skipped: doxygen not found"]) -AC_PATH_PROG(GROFF,[groff],[echo "Skipped: groff not found"]) -AC_PATH_PROG(GZIP,[gzip],[echo "Skipped: gzip not found"]) -AC_PATH_PROG(POD2HTML,[pod2html],[echo "Skipped: pod2html not found"]) -AC_PATH_PROG(POD2MAN,[pod2man],[echo "Skipped: pod2man not found"]) -AC_PATH_PROG(RUNTEST,[runtest],[echo "Skipped: runtest not found"]) +AC_PATH_PROG(BZIP2, [bzip2]) +AC_PATH_PROG(DOXYGEN, [doxygen]) +AC_PATH_PROG(GROFF, [groff]) +AC_PATH_PROG(GZIP, [gzip]) +AC_PATH_PROG(POD2HTML, [pod2html]) +AC_PATH_PROG(POD2MAN, [pod2man]) +AC_PATH_PROG(RUNTEST, [runtest]) DJ_AC_PATH_TCLSH -AC_PATH_PROG(ZIP,[zip],[echo "Skipped: zip not found"]) -AC_PATH_PROG(OCAMLC,[ocamlc],[echo "Skipped: ocamlc not found"]) -AC_PATH_PROG(OCAMLOPT,[ocamlopt],[echo "Skipped: ocamlopt not found"]) -AC_PATH_PROG(OCAMLDEP,[ocamldep],[echo "Skipped: ocamldep not found"]) +AC_PATH_PROG(ZIP, [zip]) +AC_PATH_PROG(OCAMLC, [ocamlc]) +AC_PATH_PROG(OCAMLOPT, [ocamlopt]) +AC_PATH_PROG(OCAMLDEP, [ocamldep]) dnl Determine if the linker supports the -R option. AC_LINK_USE_R Modified: llvm/trunk/configure URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=47943&r1=47942&r2=47943&view=diff ============================================================================== --- llvm/trunk/configure (original) +++ llvm/trunk/configure Wed Mar 5 03:28:02 2008 @@ -7604,7 +7604,6 @@ done IFS=$as_save_IFS - test -z "$ac_cv_path_BZIP2" && ac_cv_path_BZIP2="echo "Skipped: bzip2 not found"" ;; esac fi @@ -7645,7 +7644,6 @@ done IFS=$as_save_IFS - test -z "$ac_cv_path_DOXYGEN" && ac_cv_path_DOXYGEN="echo "Skipped: doxygen not found"" ;; esac fi @@ -7686,7 +7684,6 @@ done IFS=$as_save_IFS - test -z "$ac_cv_path_GROFF" && ac_cv_path_GROFF="echo "Skipped: groff not found"" ;; esac fi @@ -7727,7 +7724,6 @@ done IFS=$as_save_IFS - test -z "$ac_cv_path_GZIP" && ac_cv_path_GZIP="echo "Skipped: gzip not found"" ;; esac fi @@ -7768,7 +7764,6 @@ done IFS=$as_save_IFS - test -z "$ac_cv_path_POD2HTML" && ac_cv_path_POD2HTML="echo "Skipped: pod2html not found"" ;; esac fi @@ -7809,7 +7804,6 @@ done IFS=$as_save_IFS - test -z "$ac_cv_path_POD2MAN" && ac_cv_path_POD2MAN="echo "Skipped: pod2man not found"" ;; esac fi @@ -7850,7 +7844,6 @@ done IFS=$as_save_IFS - test -z "$ac_cv_path_RUNTEST" && ac_cv_path_RUNTEST="echo "Skipped: runtest not found"" ;; esac fi @@ -7981,7 +7974,6 @@ done IFS=$as_save_IFS - test -z "$ac_cv_path_ZIP" && ac_cv_path_ZIP="echo "Skipped: zip not found"" ;; esac fi @@ -8022,7 +8014,6 @@ done IFS=$as_save_IFS - test -z "$ac_cv_path_OCAMLC" && ac_cv_path_OCAMLC="echo "Skipped: ocamlc not found"" ;; esac fi @@ -8063,7 +8054,6 @@ done IFS=$as_save_IFS - test -z "$ac_cv_path_OCAMLOPT" && ac_cv_path_OCAMLOPT="echo "Skipped: ocamlopt not found"" ;; esac fi @@ -8104,7 +8094,6 @@ done IFS=$as_save_IFS - test -z "$ac_cv_path_OCAMLDEP" && ac_cv_path_OCAMLDEP="echo "Skipped: ocamldep not found"" ;; esac fi @@ -10580,7 +10569,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext < conftest.$ac_ext + echo '#line 12716 "configure"' > conftest.$ac_ext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? @@ -14442,11 +14431,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14445: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14434: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:14449: \$? = $ac_status" >&5 + echo "$as_me:14438: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -14710,11 +14699,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14713: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14702: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:14717: \$? = $ac_status" >&5 + echo "$as_me:14706: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -14814,11 +14803,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14817: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14806: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:14821: \$? = $ac_status" >&5 + echo "$as_me:14810: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -17266,7 +17255,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext < conftest.$ac_ext <&5) + (eval echo "\"\$as_me:19726: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:19741: \$? = $ac_status" >&5 + echo "$as_me:19730: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -19838,11 +19827,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:19841: $lt_compile\"" >&5) + (eval echo "\"\$as_me:19830: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:19845: \$? = $ac_status" >&5 + echo "$as_me:19834: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -21408,11 +21397,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:21411: $lt_compile\"" >&5) + (eval echo "\"\$as_me:21400: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:21415: \$? = $ac_status" >&5 + echo "$as_me:21404: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -21512,11 +21501,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:21515: $lt_compile\"" >&5) + (eval echo "\"\$as_me:21504: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:21519: \$? = $ac_status" >&5 + echo "$as_me:21508: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -23747,11 +23736,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:23750: $lt_compile\"" >&5) + (eval echo "\"\$as_me:23739: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:23754: \$? = $ac_status" >&5 + echo "$as_me:23743: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -24015,11 +24004,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:24018: $lt_compile\"" >&5) + (eval echo "\"\$as_me:24007: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:24022: \$? = $ac_status" >&5 + echo "$as_me:24011: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -24119,11 +24108,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:24122: $lt_compile\"" >&5) + (eval echo "\"\$as_me:24111: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:24126: \$? = $ac_status" >&5 + echo "$as_me:24115: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized From andrewl at lenharth.org Wed Mar 5 09:09:30 2008 From: andrewl at lenharth.org (Andrew Lenharth) Date: Wed, 5 Mar 2008 09:09:30 -0600 Subject: [llvm-commits] [llvm-gcc-4.2] r47905 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: References: <200803042118.m24LIdd4005387@zion.cs.uiuc.edu> Message-ID: <85dfcd7f0803050709i70959a5bu5f395d27abed6670@mail.gmail.com> It would be nice if someone on darwin/x86 would check why it is failing. I have no problems on 23 or 64 bit x86 linux. Andrew On 3/5/08, Owen Anderson wrote: > This was causing bootstrap failure on Darwin/X86, so I just reverted it. > > > --Owen > > > On Mar 4, 2008, at 3:18 PM, Andrew Lenharth wrote: > > > Author: alenhar2 > > Date: Tue Mar 4 15:18:39 2008 > > New Revision: 47905 > > > > URL: http://llvm.org/viewvc/llvm-project?rev=47905&view=rev > > Log: > > x86-64 supports these now, this builds fine now on linux/x86-64 > > > > Modified: > > llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > > > > Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > > URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47905&r1=47904&r2=47905&view=diff > > > > = > > = > > = > > = > > = > > = > > = > > = > > ====================================================================== > > --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) > > +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Mar 4 15:18:39 2008 > > @@ -4294,7 +4294,7 @@ > > C, C + 5); > > return true; > > } > > -#if defined(TARGET_ALPHA) > > +#if defined(TARGET_ALPHA) || defined(TARGET_386) > > //gcc uses many names for the sync intrinsics > > case BUILT_IN_VAL_COMPARE_AND_SWAP_1: > > case BUILT_IN_VAL_COMPARE_AND_SWAP_2: > > > > > > _______________________________________________ > > llvm-commits mailing list > > llvm-commits at cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From asl at math.spbu.ru Wed Mar 5 09:11:01 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Mar 2008 15:11:01 -0000 Subject: [llvm-commits] [llvm] r47944 - /llvm/trunk/lib/Linker/LinkModules.cpp Message-ID: <200803051511.m25FB1wT014017@zion.cs.uiuc.edu> Author: asl Date: Wed Mar 5 09:11:00 2008 New Revision: 47944 URL: http://llvm.org/viewvc/llvm-project?rev=47944&view=rev Log: Clarify the state-of-the-art Modified: llvm/trunk/lib/Linker/LinkModules.cpp Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=47944&r1=47943&r2=47944&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Wed Mar 5 09:11:00 2008 @@ -568,22 +568,25 @@ // LinkAlias - Loop through the alias in the src module and link them into the // dest module. static bool LinkAlias(Module *Dest, const Module *Src, std::string *Err) { + // FIXME: Desptie of the name, this function currently does not 'link' stuff, + // but only copies aliases from one Module to another. + // Loop over all alias in the src module for (Module::const_alias_iterator I = Src->alias_begin(), E = Src->alias_end(); I != E; ++I) { const GlobalAlias *GA = I; - GlobalValue *NewAliased = NULL; - const GlobalValue *Aliased = GA->getAliasedGlobal(); - if (isa(*Aliased)) - NewAliased = Dest->getGlobalVariable(Aliased->getName()); - else if (isa(*Aliased)) - NewAliased = Dest->getFunction(Aliased->getName()); - // FIXME: we should handle the bitcast alias. - assert(NewAliased && "Can't find the aliased GV."); + GlobalValue *NewAliasee = NULL; + const GlobalValue *Aliasee = GA->getAliasedGlobal(); + if (isa(Aliasee)) + NewAliasee = Dest->getGlobalVariable(Aliasee->getName()); + else if (isa(Aliasee)) + NewAliasee = Dest->getFunction(Aliasee->getName()); + // FIXME: we should handle the bitcasted aliasee. + assert(NewAliasee && "Can't find the aliased GV."); GlobalAlias *NewGA = new GlobalAlias(GA->getType(), GA->getLinkage(), - GA->getName(), NewAliased, Dest); + GA->getName(), NewAliasee, Dest); CopyGVAttributes(NewGA, GA); } return false; From asl at math.spbu.ru Wed Mar 5 09:27:21 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Mar 2008 15:27:21 -0000 Subject: [llvm-commits] [llvm] r47945 - /llvm/trunk/lib/Linker/LinkModules.cpp Message-ID: <200803051527.m25FRLEZ014524@zion.cs.uiuc.edu> Author: asl Date: Wed Mar 5 09:27:21 2008 New Revision: 47945 URL: http://llvm.org/viewvc/llvm-project?rev=47945&view=rev Log: Remember the source->dest mapping when copying aliases. This fixes PR2054 Modified: llvm/trunk/lib/Linker/LinkModules.cpp Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=47945&r1=47944&r2=47945&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Wed Mar 5 09:27:21 2008 @@ -567,7 +567,9 @@ // LinkAlias - Loop through the alias in the src module and link them into the // dest module. -static bool LinkAlias(Module *Dest, const Module *Src, std::string *Err) { +static bool LinkAlias(Module *Dest, const Module *Src, + std::map &ValueMap, + std::string *Err) { // FIXME: Desptie of the name, this function currently does not 'link' stuff, // but only copies aliases from one Module to another. @@ -588,6 +590,8 @@ GlobalAlias *NewGA = new GlobalAlias(GA->getType(), GA->getLinkage(), GA->getName(), NewAliasee, Dest); CopyGVAttributes(NewGA, GA); + + ValueMap.insert(std::make_pair(GA, NewGA)); } return false; } @@ -1033,6 +1037,11 @@ if (LinkFunctionProtos(Dest, Src, ValueMap, ErrorMsg)) return true; + // If there were any alias, link them now. We really need to do this now, + // because all of the aliases that may be referenced need to be available in + // ValueMap + if (LinkAlias(Dest, Src, ValueMap, ErrorMsg)) return true; + // Update the initializers in the Dest module now that all globals that may // be referenced are in Dest. if (LinkGlobalInits(Dest, Src, ValueMap, ErrorMsg)) return true; @@ -1045,9 +1054,6 @@ // If there were any appending global variables, link them together now. if (LinkAppendingVars(Dest, AppendingVars, ErrorMsg)) return true; - // If there were any alias, link them now. - if (LinkAlias(Dest, Src, ErrorMsg)) return true; - // If the source library's module id is in the dependent library list of the // destination library, remove it since that module is now linked in. sys::Path modId; From asl at math.spbu.ru Wed Mar 5 09:43:58 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Mar 2008 15:43:58 -0000 Subject: [llvm-commits] [llvm] r47946 - in /llvm/trunk/test/Linker: 2008-03-05-AliasReference.ll 2008-03-05-AliasReference2.ll Message-ID: <200803051543.m25Fhw83015264@zion.cs.uiuc.edu> Author: asl Date: Wed Mar 5 09:43:58 2008 New Revision: 47946 URL: http://llvm.org/viewvc/llvm-project?rev=47946&view=rev Log: Testcase for PR2054 Added: llvm/trunk/test/Linker/2008-03-05-AliasReference.ll llvm/trunk/test/Linker/2008-03-05-AliasReference2.ll Added: llvm/trunk/test/Linker/2008-03-05-AliasReference.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2008-03-05-AliasReference.ll?rev=47946&view=auto ============================================================================== --- llvm/trunk/test/Linker/2008-03-05-AliasReference.ll (added) +++ llvm/trunk/test/Linker/2008-03-05-AliasReference.ll Wed Mar 5 09:43:58 2008 @@ -0,0 +1,17 @@ +; PR2054 +; RUN: llvm-as %s -o %t1.bc -f +; RUN: llvm-as %p/2008-03-05-AliasReference2.ll -o %t2.bc -f +; RUN: llvm-link %t2.bc %t1.bc -f -o %t3.bc + +; ModuleID = 'bug.o' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-unknown-linux-gnu" + at foo = weak global i32 0 ; [#uses=1] + + at bar = alias weak i32* @foo ; [#uses=1] + +define i32 @baz() nounwind { +entry: + %tmp1 = load i32* @bar, align 4 ; [#uses=1] + ret i32 %tmp1 +} Added: llvm/trunk/test/Linker/2008-03-05-AliasReference2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2008-03-05-AliasReference2.ll?rev=47946&view=auto ============================================================================== --- llvm/trunk/test/Linker/2008-03-05-AliasReference2.ll (added) +++ llvm/trunk/test/Linker/2008-03-05-AliasReference2.ll Wed Mar 5 09:43:58 2008 @@ -0,0 +1,11 @@ +; This file is used by 2008-03-05-AliasReference.ll +; RUN: true + +; ModuleID = 'bug.o' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-unknown-linux-gnu" + +define i32 @baz1() nounwind { +entry: + ret i32 0 +} From asl at math.spbu.ru Wed Mar 5 09:44:25 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Mar 2008 15:44:25 -0000 Subject: [llvm-commits] [llvm] r47947 - /llvm/trunk/test/Linker/2006-01-19-ConstantPacked.ll Message-ID: <200803051544.m25FiP4B015302@zion.cs.uiuc.edu> Author: asl Date: Wed Mar 5 09:44:25 2008 New Revision: 47947 URL: http://llvm.org/viewvc/llvm-project?rev=47947&view=rev Log: Fix test not to emit junk into source directory Modified: llvm/trunk/test/Linker/2006-01-19-ConstantPacked.ll Modified: llvm/trunk/test/Linker/2006-01-19-ConstantPacked.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2006-01-19-ConstantPacked.ll?rev=47947&r1=47946&r2=47947&view=diff ============================================================================== --- llvm/trunk/test/Linker/2006-01-19-ConstantPacked.ll (original) +++ llvm/trunk/test/Linker/2006-01-19-ConstantPacked.ll Wed Mar 5 09:44:25 2008 @@ -1,5 +1,5 @@ -; RUN: llvm-upgrade < %s | llvm-as -f -o %s.bc -; RUN: llvm-link -f -o %s.linked %s.bc +; RUN: llvm-upgrade < %s | llvm-as -f -o %t1.bc +; RUN: llvm-link -f -o %t2.bc %t1.bc target endian = big target pointersize = 32 From romix.llvm at googlemail.com Wed Mar 5 10:48:51 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Wed, 5 Mar 2008 17:48:51 +0100 Subject: [llvm-commits] Speeding up instruction selection Message-ID: Hi Evan, 2008/3/4, Evan Cheng : > >> There's make_heap/push_heap/etc. in that let a > >> plain std::vector (or a SmallVector I guess) be used as a heap. > > > > Yes, this is possible but produces much more overhead than std::set on > > my tests. BTW, this approach is used in DAGISel.inc files generated by > > tablegen. I tried to changed it to std::set as well and ,again, it > > works much (25%-30%) faster on BBs with few hundreds or thousends > > instructions. > > If you give me a patch, I'll test it on my end. Thanks. Here is a patch for the DAGISel.inc. It is generated as a diff against the X86GenDAGISel.inc generated by tablegen. It is a bit ugly, but gives you the idea and enables testing. As a test, I used the big4.bc, which is one huge MBB. You can find it here: http://llvm.org/bugs/attachment.cgi?id=1275&action=edit I would be very interested if you could review it, test and provide some feedback. One thing I do not quite understand about the instruction selector is: 1) Can there be more than one SDNode with the same NodeId in the ISelQueue? I have the impression that it is possible, but I'm not sure. 2) Can _the same_ SDNode ocure more than once in the ISelQueue? These two questions are relevant, if std::set is to be used. Sets use the NodeId as a key of a given SDNode and std::set ensures the uniqueness of the the elements in the ISelQueue. If (1) is true, then probably std::multiset should be used instead of std::set. I tried with both set implementations and performance was roughly the same between them. I have also one more question regarding the ISelQueue: What exactly does it represent and how is it built? My understanding is that we start with the root element and then all of its dependencies are pushed into the queue as instruction selection proceeds. Then their dependencies and so on. But is it somehow related/similar to scheduler's dependencies? Would it be possible to do some sort of the topological sorting on the DAG first and then do the selection? For the above mentioned big4.bc use-case, the ISelQueue sometimes has up-to 2000 SDNodes in the queue, which makes make_heap() very inefficient. Is it normal that the queue becomes so long? Could it be that some dependencies are just selected already and could be safely removed? I cannot really explain and realize it at the moment yet, but it seems to me that a more efficient data structure than a priority queue could be used during instruction selection. -Roman -------------- next part -------------- A non-text attachment was scrubbed... Name: X86GenDAGISel.inc.patch Type: text/x-diff Size: 5614 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080305/07ddc900/attachment.bin From sabre at nondot.org Wed Mar 5 11:11:51 2008 From: sabre at nondot.org (Chris Lattner) Date: Wed, 05 Mar 2008 17:11:51 -0000 Subject: [llvm-commits] [llvm] r47948 - /llvm/trunk/lib/Target/X86/README-SSE.txt Message-ID: <200803051711.m25HBpi2017911@zion.cs.uiuc.edu> Author: lattner Date: Wed Mar 5 11:11:51 2008 New Revision: 47948 URL: http://llvm.org/viewvc/llvm-project?rev=47948&view=rev Log: evan implemented this. Modified: llvm/trunk/lib/Target/X86/README-SSE.txt Modified: llvm/trunk/lib/Target/X86/README-SSE.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-SSE.txt?rev=47948&r1=47947&r2=47948&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-SSE.txt (original) +++ llvm/trunk/lib/Target/X86/README-SSE.txt Wed Mar 5 11:11:51 2008 @@ -586,32 +586,6 @@ //===---------------------------------------------------------------------===// -"converting 64-bit constant pool entry to 32-bit not necessarily beneficial" -http://llvm.org/PR1264 - -For this test case: - -define double @foo(double %x) { - %y = mul double %x, 5.000000e-01 - ret double %y -} - -llc -march=x86-64 currently produces a 32-bit constant pool entry and this code: - - cvtss2sd .LCPI1_0(%rip), %xmm1 - mulsd %xmm1, %xmm0 - -instead of just using a 64-bit constant pool entry with this: - - mulsd .LCPI1_0(%rip), %xmm0 - -This is due to the code in ExpandConstantFP in LegalizeDAG.cpp. It notices that -x86-64 indeed has an instruction to load a 32-bit float from memory and convert -it into a 64-bit float in a register, however it doesn't notice that this isn't -beneficial because it prevents the load from being folded into the multiply. - -//===---------------------------------------------------------------------===// - These functions: #include From romix.llvm at googlemail.com Wed Mar 5 11:16:22 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Wed, 5 Mar 2008 18:16:22 +0100 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> References: <200803031053.00270.dag@cray.com> <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> Message-ID: 2008/3/5, Dan Gohman : > On Mar 4, 2008, at 3:56 AM, Roman Levenstein wrote: > > > > > make[5]: Entering directory > > `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests/Vector/SSE' > > make[5]: *** No rule to make target `Output/sse.expandfft.linked.rbc', > > needed by `Output/sse.expandfft.linked.bc'. Stop. > > > When I've seen this error, the problem has been that my base llvm > build configure was run without an llvm-gcc in PATH. llvm-test > apparently relies on the base llvm build to locate llvm-gcc for it. Thanks! Now I checked again and it seems to work. So, I have other questions about testing (I guess some of them are asked quite often ;-): 1) I do run llvm/test tests. At the end I get some figures about the number of PASSED and UNEXPECTEDLY FAILED tests. This is fine. But is it guaranteed that UNEXPECTEDLY FAILED are introduced by my code or is it possible that due to some recent changes to the repository some of those tests just fail? If it is due to the changes in the repository, how do I know what are the figures without my changes, so that I can compare and see new failures introduced by my code? Are those numbers published anywhere, may be in the nightly tests results??? Or should I basically have to source trees: one for repository version and one for my local modifications and then run tests under both trees? 2) If I run the llvm-test tests, how do I produce reports? How do I know that something failed? 3) How can I run only a selected subset of the tests from llvm-test? In particular, I only change LLC mostly. Do I have to run the llvm-test every time, or can I reduce it to something smaller? Basically, I have my ScheduleDAG patches ready, All of the proposals from the review by you and Evan are implemented. But I don't know how to test them properly using llvm tests and how can I understand if something is broken by them.... I attach both patches for now, so that someone else can test them as well, while I'm trying to figure out how to do it on my machine. -Roman -------------- next part -------------- A non-text attachment was scrubbed... Name: ScheduleDAGRRList.patch Type: text/x-diff Size: 5443 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080305/45eaecb7/attachment.bin -------------- next part -------------- A non-text attachment was scrubbed... Name: ScheduleDAGList.patch Type: text/x-diff Size: 5507 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080305/45eaecb7/attachment-0001.bin From evan.cheng at apple.com Wed Mar 5 11:30:37 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 5 Mar 2008 09:30:37 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <200803031053.00270.dag@cray.com> <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> Message-ID: On Mar 5, 2008, at 9:16 AM, Roman Levenstein wrote: > 2008/3/5, Dan Gohman : >> On Mar 4, 2008, at 3:56 AM, Roman Levenstein wrote: >>> >> >>> make[5]: Entering directory >>> `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests/Vector/ >>> SSE' >>> make[5]: *** No rule to make target `Output/ >>> sse.expandfft.linked.rbc', >>> needed by `Output/sse.expandfft.linked.bc'. Stop. >> >> >> When I've seen this error, the problem has been that my base llvm >> build configure was run without an llvm-gcc in PATH. llvm-test >> apparently relies on the base llvm build to locate llvm-gcc for it. > > Thanks! Now I checked again and it seems to work. > > So, I have other questions about testing (I guess some of them are > asked quite often ;-): > > 1) I do run llvm/test tests. At the end I get some figures about the > number of PASSED and UNEXPECTEDLY FAILED tests. This is fine. But is > it guaranteed that UNEXPECTEDLY FAILED are introduced by my code or is > it possible that due to some recent changes to the repository some of > those tests just fail? If it is due to the changes in the repository, > how do I know what are the figures without my changes, so that I can > compare and see new failures introduced by my code? Are those numbers > published anywhere, may be in the nightly tests results??? Or should I > basically have to source trees: one for repository version and one for > my local modifications and then run tests under both trees? There are lots of nightly testers and they include dejagnu tests. I maintain all the Grawp* and OldGrawp* testers. These are x86 Mac OS X testers. There are also x86 linux testers. http://www.llvm.org/nightlytest/ > > > 2) If I run the llvm-test tests, how do I produce reports? How do I > know that something failed? make TEST=nightly report It will produce a report at the end that's self-explanatory. > > > 3) How can I run only a selected subset of the tests from llvm-test? > In particular, I only change LLC mostly. Do I have to run the > llvm-test every time, or can I reduce it to something smaller? Ideally you run everything everytime. But you should run at least SingleSource and MultiSource. > > > Basically, I have my ScheduleDAG patches ready, All of the proposals > from the review by you and Evan are implemented. But I don't know how > to test them properly using llvm tests and how can I understand if > something is broken by them.... > > I attach both patches for now, so that someone else can test them as > well, while I'm trying to figure out how to do it on my machine. Ok. Thanks. Evan > > > -Roman > < > ScheduleDAGRRList > .patch > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Wed Mar 5 11:36:54 2008 From: clattner at apple.com (Chris Lattner) Date: Wed, 5 Mar 2008 09:36:54 -0800 Subject: [llvm-commits] [test-suite] r47942 - /test-suite/trunk/SingleSource/UnitTests/Vector/SSE/sse.shift.c In-Reply-To: <200803050826.m258QIo0026660@zion.cs.uiuc.edu> References: <200803050826.m258QIo0026660@zion.cs.uiuc.edu> Message-ID: <6D122EE9-AA60-42C6-BF5C-2000D24F9A21@apple.com> On Mar 5, 2008, at 12:26 AM, Evan Cheng wrote: > Author: evancheng > > +int main() { > + __m128i allones, zeroones, onezeros; > + allones = _mm_cmpeq_epi32(allones, allones); FYI, the two operands to _mm_cmpeq_epi32 are not guaranteed to have the same value. Please initialize allones. -Chris > > + zeroones = _mm_srli_epi16(allones, 8); > + printIV((IV*)&zeroones); > + onezeros = _mm_slli_epi16(allones, 8); > + printIV((IV*)&onezeros); > + return 0; > +} > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Wed Mar 5 11:42:07 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 05 Mar 2008 17:42:07 -0000 Subject: [llvm-commits] [test-suite] r47949 - /test-suite/trunk/SingleSource/UnitTests/Vector/SSE/sse.shift.c Message-ID: <200803051742.m25Hg7LK018868@zion.cs.uiuc.edu> Author: evancheng Date: Wed Mar 5 11:42:06 2008 New Revision: 47949 URL: http://llvm.org/viewvc/llvm-project?rev=47949&view=rev Log: Initialize a variable. Modified: test-suite/trunk/SingleSource/UnitTests/Vector/SSE/sse.shift.c Modified: test-suite/trunk/SingleSource/UnitTests/Vector/SSE/sse.shift.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/Vector/SSE/sse.shift.c?rev=47949&r1=47948&r2=47949&view=diff ============================================================================== --- test-suite/trunk/SingleSource/UnitTests/Vector/SSE/sse.shift.c (original) +++ test-suite/trunk/SingleSource/UnitTests/Vector/SSE/sse.shift.c Wed Mar 5 11:42:06 2008 @@ -11,7 +11,8 @@ } int main() { - __m128i allones, zeroones, onezeros; + __m128i allones = _mm_set1_epi32(0); + __m128i zeroones, onezeros; allones = _mm_cmpeq_epi32(allones, allones); zeroones = _mm_srli_epi16(allones, 8); printIV((IV*)&zeroones); From scottm at aero.org Wed Mar 5 11:49:05 2008 From: scottm at aero.org (Scott Michel) Date: Wed, 05 Mar 2008 17:49:05 -0000 Subject: [llvm-commits] [llvm] r47950 - in /llvm/trunk/utils/TableGen: CodeGenDAGPatterns.cpp CodeGenDAGPatterns.h Message-ID: <200803051749.m25Hn5tq019065@zion.cs.uiuc.edu> Author: pingbak Date: Wed Mar 5 11:49:05 2008 New Revision: 47950 URL: http://llvm.org/viewvc/llvm-project?rev=47950&view=rev Log: This patch fixes a problem encountered by the CellSPU backend where variants were being pruned in patterns where a variable was used more than once, e.g.: (or (and R32C:$rA, R32C:$rC), (and R32C:$rB, (not R32C:$rC))) In this example, $rC is used more than once and is actually significant to instruction selection pattern matching when commuted variants are produced. This patch scans the pattern's clauses and collects the variables, creating a set of variables that are used more than once. TreePatternNode::isIsomorphicTo() also understands that multiply-used variables are significant. Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp?rev=47950&r1=47949&r2=47950&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp (original) +++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp Wed Mar 5 11:49:05 2008 @@ -81,6 +81,53 @@ } // end namespace MVT. } // end namespace llvm. + +/// Dependent variable map for CodeGenDAGPattern variant generation +typedef std::map DepVarMap; + +/// Const iterator shorthand for DepVarMap +typedef DepVarMap::const_iterator DepVarMap_citer; + +namespace { +void FindDepVarsOf(TreePatternNode *N, DepVarMap &DepMap) { + if (N->isLeaf()) { + if (dynamic_cast(N->getLeafValue()) != NULL) { + DepMap[N->getName()]++; + } + } else { + for (size_t i = 0, e = N->getNumChildren(); i != e; ++i) + FindDepVarsOf(N->getChild(i), DepMap); + } +} + +//! Find dependent variables within child patterns +/*! + */ +void FindDepVars(TreePatternNode *N, MultipleUseVarSet &DepVars) { + DepVarMap depcounts; + FindDepVarsOf(N, depcounts); + for (DepVarMap_citer i = depcounts.begin(); i != depcounts.end(); ++i) { + if (i->second > 1) { // std::pair + DepVars.insert(i->first); + } + } +} + +//! Dump the dependent variable set: +void DumpDepVars(MultipleUseVarSet &DepVars) { + if (DepVars.empty()) { + DOUT << ""; + } else { + DOUT << "[ "; + for (MultipleUseVarSet::const_iterator i = DepVars.begin(), e = DepVars.end(); + i != e; ++i) { + DOUT << (*i) << " "; + } + DOUT << "]"; + } +} +} + //===----------------------------------------------------------------------===// // SDTypeConstraint implementation // @@ -497,11 +544,15 @@ print(*cerr.stream()); } -/// isIsomorphicTo - Return true if this node is recursively isomorphic to -/// the specified node. For this comparison, all of the state of the node -/// is considered, except for the assigned name. Nodes with differing names -/// that are otherwise identical are considered isomorphic. -bool TreePatternNode::isIsomorphicTo(const TreePatternNode *N) const { +/// isIsomorphicTo - Return true if this node is recursively +/// isomorphic to the specified node. For this comparison, the node's +/// entire state is considered. The assigned name is ignored, since +/// nodes with differing names are considered isomorphic. However, if +/// the assigned name is present in the dependent variable set, then +/// the assigned name is considered significant and the node is +/// isomorphic if the names match. +bool TreePatternNode::isIsomorphicTo(const TreePatternNode *N, + const MultipleUseVarSet &DepVars) const { if (N == this) return true; if (N->isLeaf() != isLeaf() || getExtTypes() != N->getExtTypes() || getPredicateFn() != N->getPredicateFn() || @@ -509,16 +560,20 @@ return false; if (isLeaf()) { - if (DefInit *DI = dynamic_cast(getLeafValue())) - if (DefInit *NDI = dynamic_cast(N->getLeafValue())) - return DI->getDef() == NDI->getDef(); + if (DefInit *DI = dynamic_cast(getLeafValue())) { + if (DefInit *NDI = dynamic_cast(N->getLeafValue())) { + return ((DI->getDef() == NDI->getDef()) + && (DepVars.find(getName()) == DepVars.end() + || getName() == N->getName())); + } + } return getLeafValue() == N->getLeafValue(); } if (N->getOperator() != getOperator() || N->getNumChildren() != getNumChildren()) return false; for (unsigned i = 0, e = getNumChildren(); i != e; ++i) - if (!getChild(i)->isIsomorphicTo(N->getChild(i))) + if (!getChild(i)->isIsomorphicTo(N->getChild(i), DepVars)) return false; return true; } @@ -1840,7 +1895,8 @@ static void CombineChildVariants(TreePatternNode *Orig, const std::vector > &ChildVariants, std::vector &OutVariants, - CodeGenDAGPatterns &CDP) { + CodeGenDAGPatterns &CDP, + const MultipleUseVarSet &DepVars) { // Make sure that each operand has at least one variant to choose from. for (unsigned i = 0, e = ChildVariants.size(); i != e; ++i) if (ChildVariants[i].empty()) @@ -1849,8 +1905,17 @@ // The end result is an all-pairs construction of the resultant pattern. std::vector Idxs; Idxs.resize(ChildVariants.size()); - bool NotDone = true; - while (NotDone) { + bool NotDone; + do { +#ifndef NDEBUG + if (DebugFlag && !Idxs.empty()) { + cerr << Orig->getOperator()->getName() << ": Idxs = [ "; + for (unsigned i = 0; i < Idxs.size(); ++i) { + cerr << Idxs[i] << " "; + } + cerr << "]\n"; + } +#endif // Create the variant and add it to the output list. std::vector NewChildren; for (unsigned i = 0, e = ChildVariants.size(); i != e; ++i) @@ -1863,7 +1928,7 @@ R->setTransformFn(Orig->getTransformFn()); R->setTypes(Orig->getExtTypes()); - // If this pattern cannot every match, do not include it as a variant. + // If this pattern cannot match, do not include it as a variant. std::string ErrString; if (!R->canPatternMatch(ErrString, CDP)) { delete R; @@ -1875,7 +1940,7 @@ // (and GPRC:$a, GPRC:$b) -> (and GPRC:$b, GPRC:$a) // which are the same pattern. Ignore the dups. for (unsigned i = 0, e = OutVariants.size(); i != e; ++i) - if (R->isIsomorphicTo(OutVariants[i])) { + if (R->isIsomorphicTo(OutVariants[i], DepVars)) { AlreadyExists = true; break; } @@ -1886,17 +1951,18 @@ OutVariants.push_back(R); } - // Increment indices to the next permutation. - NotDone = false; - // Look for something we can increment without causing a wrap-around. - for (unsigned IdxsIdx = 0; IdxsIdx != Idxs.size(); ++IdxsIdx) { - if (++Idxs[IdxsIdx] < ChildVariants[IdxsIdx].size()) { - NotDone = true; // Found something to increment. + // Increment indices to the next permutation by incrementing the + // indicies from last index backward, e.g., generate the sequence + // [0, 0], [0, 1], [1, 0], [1, 1]. + int IdxsIdx; + for (IdxsIdx = Idxs.size() - 1; IdxsIdx >= 0; --IdxsIdx) { + if (++Idxs[IdxsIdx] == ChildVariants[IdxsIdx].size()) + Idxs[IdxsIdx] = 0; + else break; - } - Idxs[IdxsIdx] = 0; } - } + NotDone = (IdxsIdx >= 0); + } while (NotDone); } /// CombineChildVariants - A helper function for binary operators. @@ -1905,11 +1971,12 @@ const std::vector &LHS, const std::vector &RHS, std::vector &OutVariants, - CodeGenDAGPatterns &CDP) { + CodeGenDAGPatterns &CDP, + const MultipleUseVarSet &DepVars) { std::vector > ChildVariants; ChildVariants.push_back(LHS); ChildVariants.push_back(RHS); - CombineChildVariants(Orig, ChildVariants, OutVariants, CDP); + CombineChildVariants(Orig, ChildVariants, OutVariants, CDP, DepVars); } @@ -1941,7 +2008,8 @@ /// static void GenerateVariantsOf(TreePatternNode *N, std::vector &OutVariants, - CodeGenDAGPatterns &CDP) { + CodeGenDAGPatterns &CDP, + const MultipleUseVarSet &DepVars) { // We cannot permute leaves. if (N->isLeaf()) { OutVariants.push_back(N); @@ -1962,9 +2030,9 @@ if (MaximalChildren.size() == 3) { // Find the variants of all of our maximal children. std::vector AVariants, BVariants, CVariants; - GenerateVariantsOf(MaximalChildren[0], AVariants, CDP); - GenerateVariantsOf(MaximalChildren[1], BVariants, CDP); - GenerateVariantsOf(MaximalChildren[2], CVariants, CDP); + GenerateVariantsOf(MaximalChildren[0], AVariants, CDP, DepVars); + GenerateVariantsOf(MaximalChildren[1], BVariants, CDP, DepVars); + GenerateVariantsOf(MaximalChildren[2], CVariants, CDP, DepVars); // There are only two ways we can permute the tree: // (A op B) op C and A op (B op C) @@ -1977,28 +2045,28 @@ std::vector CAVariants; std::vector BCVariants; std::vector CBVariants; - CombineChildVariants(N, AVariants, BVariants, ABVariants, CDP); - CombineChildVariants(N, BVariants, AVariants, BAVariants, CDP); - CombineChildVariants(N, AVariants, CVariants, ACVariants, CDP); - CombineChildVariants(N, CVariants, AVariants, CAVariants, CDP); - CombineChildVariants(N, BVariants, CVariants, BCVariants, CDP); - CombineChildVariants(N, CVariants, BVariants, CBVariants, CDP); + CombineChildVariants(N, AVariants, BVariants, ABVariants, CDP, DepVars); + CombineChildVariants(N, BVariants, AVariants, BAVariants, CDP, DepVars); + CombineChildVariants(N, AVariants, CVariants, ACVariants, CDP, DepVars); + CombineChildVariants(N, CVariants, AVariants, CAVariants, CDP, DepVars); + CombineChildVariants(N, BVariants, CVariants, BCVariants, CDP, DepVars); + CombineChildVariants(N, CVariants, BVariants, CBVariants, CDP, DepVars); // Combine those into the result: (x op x) op x - CombineChildVariants(N, ABVariants, CVariants, OutVariants, CDP); - CombineChildVariants(N, BAVariants, CVariants, OutVariants, CDP); - CombineChildVariants(N, ACVariants, BVariants, OutVariants, CDP); - CombineChildVariants(N, CAVariants, BVariants, OutVariants, CDP); - CombineChildVariants(N, BCVariants, AVariants, OutVariants, CDP); - CombineChildVariants(N, CBVariants, AVariants, OutVariants, CDP); + CombineChildVariants(N, ABVariants, CVariants, OutVariants, CDP, DepVars); + CombineChildVariants(N, BAVariants, CVariants, OutVariants, CDP, DepVars); + CombineChildVariants(N, ACVariants, BVariants, OutVariants, CDP, DepVars); + CombineChildVariants(N, CAVariants, BVariants, OutVariants, CDP, DepVars); + CombineChildVariants(N, BCVariants, AVariants, OutVariants, CDP, DepVars); + CombineChildVariants(N, CBVariants, AVariants, OutVariants, CDP, DepVars); // Combine those into the result: x op (x op x) - CombineChildVariants(N, CVariants, ABVariants, OutVariants, CDP); - CombineChildVariants(N, CVariants, BAVariants, OutVariants, CDP); - CombineChildVariants(N, BVariants, ACVariants, OutVariants, CDP); - CombineChildVariants(N, BVariants, CAVariants, OutVariants, CDP); - CombineChildVariants(N, AVariants, BCVariants, OutVariants, CDP); - CombineChildVariants(N, AVariants, CBVariants, OutVariants, CDP); + CombineChildVariants(N, CVariants, ABVariants, OutVariants, CDP, DepVars); + CombineChildVariants(N, CVariants, BAVariants, OutVariants, CDP, DepVars); + CombineChildVariants(N, BVariants, ACVariants, OutVariants, CDP, DepVars); + CombineChildVariants(N, BVariants, CAVariants, OutVariants, CDP, DepVars); + CombineChildVariants(N, AVariants, BCVariants, OutVariants, CDP, DepVars); + CombineChildVariants(N, AVariants, CBVariants, OutVariants, CDP, DepVars); return; } } @@ -2007,10 +2075,10 @@ std::vector > ChildVariants; ChildVariants.resize(N->getNumChildren()); for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i) - GenerateVariantsOf(N->getChild(i), ChildVariants[i], CDP); + GenerateVariantsOf(N->getChild(i), ChildVariants[i], CDP, DepVars); // Build all permutations based on how the children were formed. - CombineChildVariants(N, ChildVariants, OutVariants, CDP); + CombineChildVariants(N, ChildVariants, OutVariants, CDP, DepVars); // If this node is commutative, consider the commuted order. if (NodeInfo.hasProperty(SDNPCommutative)) { @@ -2030,7 +2098,7 @@ // Consider the commuted order. if (NC == 2) CombineChildVariants(N, ChildVariants[1], ChildVariants[0], - OutVariants, CDP); + OutVariants, CDP, DepVars); } } @@ -2050,8 +2118,13 @@ // already been added. // for (unsigned i = 0, e = PatternsToMatch.size(); i != e; ++i) { + MultipleUseVarSet DepVars; std::vector Variants; - GenerateVariantsOf(PatternsToMatch[i].getSrcPattern(), Variants, *this); + FindDepVars(PatternsToMatch[i].getSrcPattern(), DepVars); + DOUT << "Dependent/multiply used variables: "; + DEBUG(DumpDepVars(DepVars)); + DOUT << "\n"; + GenerateVariantsOf(PatternsToMatch[i].getSrcPattern(), Variants, *this, DepVars); assert(!Variants.empty() && "Must create at least original variant!"); Variants.erase(Variants.begin()); // Remove the original pattern. @@ -2074,7 +2147,7 @@ bool AlreadyExists = false; for (unsigned p = 0, e = PatternsToMatch.size(); p != e; ++p) { // Check to see if this variant already exists. - if (Variant->isIsomorphicTo(PatternsToMatch[p].getSrcPattern())) { + if (Variant->isIsomorphicTo(PatternsToMatch[p].getSrcPattern(), DepVars)) { DOUT << " *** ALREADY EXISTS, ignoring variant.\n"; AlreadyExists = true; break; Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h?rev=47950&r1=47949&r2=47950&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h (original) +++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h Wed Mar 5 11:49:05 2008 @@ -15,6 +15,8 @@ #ifndef CODEGEN_DAGPATTERNS_H #define CODEGEN_DAGPATTERNS_H +#include + #include "TableGenBackend.h" #include "CodeGenTarget.h" #include "CodeGenIntrinsics.h" @@ -48,6 +50,9 @@ bool isExtFloatingPointInVTs(const std::vector &EVTs); } +/// Set type used to track multiply used variables in patterns +typedef std::set MultipleUseVarSet; + /// SDTypeConstraint - This is a discriminated union of constraints, /// corresponding to the SDTypeConstraint tablegen class in Target.td. struct SDTypeConstraint { @@ -231,7 +236,8 @@ /// the specified node. For this comparison, all of the state of the node /// is considered, except for the assigned name. Nodes with differing names /// that are otherwise identical are considered isomorphic. - bool isIsomorphicTo(const TreePatternNode *N) const; + bool isIsomorphicTo(const TreePatternNode *N, + const MultipleUseVarSet &DepVars) const; /// SubstituteFormalArguments - Replace the formal arguments in this tree /// with actual values specified by ArgMap. From resistor at mac.com Wed Mar 5 12:18:37 2008 From: resistor at mac.com (Owen Anderson) Date: Wed, 5 Mar 2008 12:18:37 -0600 Subject: [llvm-commits] [llvm-gcc-4.2] r47905 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <85dfcd7f0803050709i70959a5bu5f395d27abed6670@mail.gmail.com> References: <200803042118.m24LIdd4005387@zion.cs.uiuc.edu> <85dfcd7f0803050709i70959a5bu5f395d27abed6670@mail.gmail.com> Message-ID: <70BE3971-F2D6-4448-AED8-544D74FC94C2@mac.com> The exact error message was: Assertion failed: (C->getType()->isInteger() && Ty->isInteger() && "Invalid cast"), function createIntegerCast, file Instructions.cpp, line 1949. ../../../llvm-gcc-4.2/libgomp/critical.c: In function 'GOMP_critical_name_start': ../../../llvm-gcc-4.2/libgomp/critical.c:54: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. --Owen On Mar 5, 2008, at 9:09 AM, Andrew Lenharth wrote: > It would be nice if someone on darwin/x86 would check why it is > failing. I have no problems on 23 or 64 bit x86 linux. > > Andrew > > On 3/5/08, Owen Anderson wrote: >> This was causing bootstrap failure on Darwin/X86, so I just >> reverted it. >> >> >> --Owen >> >> >> On Mar 4, 2008, at 3:18 PM, Andrew Lenharth wrote: >> >>> Author: alenhar2 >>> Date: Tue Mar 4 15:18:39 2008 >>> New Revision: 47905 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=47905&view=rev >>> Log: >>> x86-64 supports these now, this builds fine now on linux/x86-64 >>> >>> Modified: >>> llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp >>> >>> Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47905&r1=47904&r2=47905&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) >>> +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Mar 4 15:18:39 2008 >>> @@ -4294,7 +4294,7 @@ >>> C, C + 5); >>> return true; >>> } >>> -#if defined(TARGET_ALPHA) >>> +#if defined(TARGET_ALPHA) || defined(TARGET_386) >>> //gcc uses many names for the sync intrinsics >>> case BUILT_IN_VAL_COMPARE_AND_SWAP_1: >>> case BUILT_IN_VAL_COMPARE_AND_SWAP_2: >>> >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From andrewl at lenharth.org Wed Mar 5 12:26:08 2008 From: andrewl at lenharth.org (Andrew Lenharth) Date: Wed, 5 Mar 2008 12:26:08 -0600 Subject: [llvm-commits] [llvm-gcc-4.2] r47905 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <70BE3971-F2D6-4448-AED8-544D74FC94C2@mac.com> References: <200803042118.m24LIdd4005387@zion.cs.uiuc.edu> <85dfcd7f0803050709i70959a5bu5f395d27abed6670@mail.gmail.com> <70BE3971-F2D6-4448-AED8-544D74FC94C2@mac.com> Message-ID: <85dfcd7f0803051026g173c4af5sb89fded6d131d82b@mail.gmail.com> Thanks, that's what I needed to know. I was hoping gcc would normalize the types, but apparently it doesn't. Andrew On 3/5/08, Owen Anderson wrote: > The exact error message was: > > Assertion failed: (C->getType()->isInteger() && Ty->isInteger() && > "Invalid cast"), function createIntegerCast, file Instructions.cpp, > line 1949. > ../../../llvm-gcc-4.2/libgomp/critical.c: In function > 'GOMP_critical_name_start': > ../../../llvm-gcc-4.2/libgomp/critical.c:54: internal compiler error: > Abort trap > Please submit a full bug report, > with preprocessed source if appropriate. > > > --Owen > > > On Mar 5, 2008, at 9:09 AM, Andrew Lenharth wrote: > > > It would be nice if someone on darwin/x86 would check why it is > > failing. I have no problems on 23 or 64 bit x86 linux. > > > > Andrew > > > > On 3/5/08, Owen Anderson wrote: > >> This was causing bootstrap failure on Darwin/X86, so I just > >> reverted it. > >> > >> > >> --Owen > >> > >> > >> On Mar 4, 2008, at 3:18 PM, Andrew Lenharth wrote: > >> > >>> Author: alenhar2 > >>> Date: Tue Mar 4 15:18:39 2008 > >>> New Revision: 47905 > >>> > >>> URL: http://llvm.org/viewvc/llvm-project?rev=47905&view=rev > >>> Log: > >>> x86-64 supports these now, this builds fine now on linux/x86-64 > >>> > >>> Modified: > >>> llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > >>> > >>> Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > >>> URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47905&r1=47904&r2=47905&view=diff > >>> > >>> = > >>> = > >>> = > >>> = > >>> = > >>> = > >>> = > >>> = > >>> = > >>> = > >>> ==================================================================== > >>> --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) > >>> +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Mar 4 15:18:39 2008 > >>> @@ -4294,7 +4294,7 @@ > >>> C, C + 5); > >>> return true; > >>> } > >>> -#if defined(TARGET_ALPHA) > >>> +#if defined(TARGET_ALPHA) || defined(TARGET_386) > >>> //gcc uses many names for the sync intrinsics > >>> case BUILT_IN_VAL_COMPARE_AND_SWAP_1: > >>> case BUILT_IN_VAL_COMPARE_AND_SWAP_2: > >>> > >>> > >>> _______________________________________________ > >>> llvm-commits mailing list > >>> llvm-commits at cs.uiuc.edu > >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > >> > >> _______________________________________________ > >> llvm-commits mailing list > >> llvm-commits at cs.uiuc.edu > >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > >> > > _______________________________________________ > > llvm-commits mailing list > > llvm-commits at cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From lauro.venancio at gmail.com Wed Mar 5 13:05:26 2008 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Wed, 5 Mar 2008 16:05:26 -0300 Subject: [llvm-commits] [test-suite] r47756 - /test-suite/trunk/RunSafely.sh In-Reply-To: <200802291801.m1TI1E57025104@zion.cs.uiuc.edu> References: <200802291801.m1TI1E57025104@zion.cs.uiuc.edu> Message-ID: <9c10c9f0803051105r784ace72i5736f2da25b6e4b3@mail.gmail.com> > if [ "x$RHOST" = x ] ; then > - ( sh -c "$ULIMITCMD time -p $COMMAND >$OUTFILE 2>&1 < $INFILE; echo exit \$?" ) 2>&1 \ > + ( sh -c "$ULIMITCMD"; time -p sh -c "$COMMAND >$OUTFILE 2>&1 < $INFILE" ; echo exit $? ) 2>&1 \ Evan, I'm afraid you reverted the fix for PR1437. Lauro From dalej at apple.com Wed Mar 5 13:14:03 2008 From: dalej at apple.com (Dale Johannesen) Date: Wed, 05 Mar 2008 19:14:03 -0000 Subject: [llvm-commits] [llvm] r47957 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGNodes.h lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200803051914.m25JE38i021577@zion.cs.uiuc.edu> Author: johannes Date: Wed Mar 5 13:14:03 2008 New Revision: 47957 URL: http://llvm.org/viewvc/llvm-project?rev=47957&view=rev Log: Clarify that CALLSEQ_START..END may not be nested, and add some protection against creating such. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=47957&r1=47956&r2=47957&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Wed Mar 5 13:14:03 2008 @@ -529,6 +529,7 @@ // a call sequence, and carry arbitrary information that target might want // to know. The first operand is a chain, the rest are specified by the // target and not touched by the DAG optimizers. + // CALLSEQ_START..CALLSEQ_END pairs may not be nested. CALLSEQ_START, // Beginning of a call sequence CALLSEQ_END, // End of a call sequence Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47957&r1=47956&r2=47957&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Mar 5 13:14:03 2008 @@ -1266,6 +1266,13 @@ // The only option for this is to custom lower it. Tmp3 = TLI.LowerOperation(Result.getValue(0), DAG); assert(Tmp3.Val && "Target didn't custom lower this node!"); + // A call within a calling sequence must be legalized to something + // other than the normal CALLSEQ_END. Violating this gets Legalize + // into an infinite loop. + assert ((!IsLegalizingCall || + Node->getOpcode() != ISD::CALL || + Tmp3.Val->getOpcode() != ISD::CALLSEQ_END) && + "Nested CALLSEQ_START..CALLSEQ_END not supported."); // The number of incoming and outgoing values should match; unless the final // outgoing value is a flag. From dberlin at dberlin.org Wed Mar 5 13:31:47 2008 From: dberlin at dberlin.org (Daniel Berlin) Date: Wed, 05 Mar 2008 19:31:47 -0000 Subject: [llvm-commits] [llvm] r47959 - /llvm/trunk/lib/Analysis/IPA/Andersens.cpp Message-ID: <200803051931.m25JVla3022062@zion.cs.uiuc.edu> Author: dannyb Date: Wed Mar 5 13:31:47 2008 New Revision: 47959 URL: http://llvm.org/viewvc/llvm-project?rev=47959&view=rev Log: Add Hybrid Cycle Detection to Andersen's analysis. Patch by Curtis Dunham. Modified: llvm/trunk/lib/Analysis/IPA/Andersens.cpp Modified: llvm/trunk/lib/Analysis/IPA/Andersens.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/IPA/Andersens.cpp?rev=47959&r1=47958&r2=47959&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/IPA/Andersens.cpp (original) +++ llvm/trunk/lib/Analysis/IPA/Andersens.cpp Wed Mar 5 13:31:47 2008 @@ -31,10 +31,12 @@ // address taking. // // The offline constraint graph optimization portion includes offline variable -// substitution algorithms intended to computer pointer and location +// substitution algorithms intended to compute pointer and location // equivalences. Pointer equivalences are those pointers that will have the // same points-to sets, and location equivalences are those variables that -// always appear together in points-to sets. +// always appear together in points-to sets. It also includes an offline +// cycle detection algorithm that allows cycles to be collapsed sooner +// during solving. // // The inclusion constraint solving phase iteratively propagates the inclusion // constraints until a fixed point is reached. This is an O(N^3) algorithm. @@ -48,7 +50,7 @@ // CallReturnPos. The arguments start at getNode(F) + CallArgPos. // // Future Improvements: -// Offline detection of online cycles. Use of BDD's. +// Use of BDD's. //===----------------------------------------------------------------------===// #define DEBUG_TYPE "anders-aa" @@ -418,6 +420,13 @@ // pointer equivalent but not location equivalent variables. -1 if we have // no representative node for this pointer equivalence class yet. std::vector PENLEClass2Node; + // Union/Find for HCD + std::vector HCDSCCRep; + // HCD's offline-detected cycles; "Statically DeTected" + // -1 if not part of such a cycle, otherwise a representative node. + std::vector SDT; + // Whether to use SDT (UniteNodes can use it during solving, but not before) + bool SDTActive; public: static char ID; @@ -546,6 +555,8 @@ void RewriteConstraints(); void HU(); void HVN(); + void HCD(); + void Search(unsigned Node); void UnitePointerEquivalences(); void SolveConstraints(); bool QueryNode(unsigned Node); @@ -1985,11 +1996,141 @@ } } +/// The technique used here is described in "The Ant and the +/// Grasshopper: Fast and Accurate Pointer Analysis for Millions of +/// Lines of Code. In Programming Language Design and Implementation +/// (PLDI), June 2007." It is known as the "HCD" (Hybrid Cycle +/// Detection) algorithm. It is called a hybrid because it performs an +/// offline analysis and uses its results during the solving (online) +/// phase. This is just the offline portion; the results of this +/// operation are stored in SDT and are later used in SolveContraints() +/// and UniteNodes(). +void Andersens::HCD() { + DOUT << "Starting HCD.\n"; + HCDSCCRep.resize(GraphNodes.size()); + + for (unsigned i = 0; i < GraphNodes.size(); ++i) { + GraphNodes[i].Edges = new SparseBitVector<>; + HCDSCCRep[i] = i; + } + + for (unsigned i = 0, e = Constraints.size(); i != e; ++i) { + Constraint &C = Constraints[i]; + assert (C.Src < GraphNodes.size() && C.Dest < GraphNodes.size()); + if (C.Type == Constraint::AddressOf) { + continue; + } else if (C.Type == Constraint::Load) { + if( C.Offset == 0 ) + GraphNodes[C.Dest].Edges->set(C.Src + FirstRefNode); + } else if (C.Type == Constraint::Store) { + if( C.Offset == 0 ) + GraphNodes[C.Dest + FirstRefNode].Edges->set(C.Src); + } else { + GraphNodes[C.Dest].Edges->set(C.Src); + } + } + + Node2DFS.insert(Node2DFS.begin(), GraphNodes.size(), 0); + Node2Deleted.insert(Node2Deleted.begin(), GraphNodes.size(), false); + Node2Visited.insert(Node2Visited.begin(), GraphNodes.size(), false); + SDT.insert(SDT.begin(), GraphNodes.size() / 2, -1); + + DFSNumber = 0; + for (unsigned i = 0; i < GraphNodes.size(); ++i) { + unsigned Node = HCDSCCRep[i]; + if (!Node2Deleted[Node]) + Search(Node); + } + + for (unsigned i = 0; i < GraphNodes.size(); ++i) + if (GraphNodes[i].Edges != NULL) { + delete GraphNodes[i].Edges; + GraphNodes[i].Edges = NULL; + } + + while( !SCCStack.empty() ) + SCCStack.pop(); + + Node2DFS.clear(); + Node2Visited.clear(); + Node2Deleted.clear(); + HCDSCCRep.clear(); + DOUT << "HCD complete.\n"; +} + +// Component of HCD: +// Use Nuutila's variant of Tarjan's algorithm to detect +// Strongly-Connected Components (SCCs). For non-trivial SCCs +// containing ref nodes, insert the appropriate information in SDT. +void Andersens::Search(unsigned Node) { + unsigned MyDFS = DFSNumber++; + + Node2Visited[Node] = true; + Node2DFS[Node] = MyDFS; + + for (SparseBitVector<>::iterator Iter = GraphNodes[Node].Edges->begin(), + End = GraphNodes[Node].Edges->end(); + Iter != End; + ++Iter) { + unsigned J = HCDSCCRep[*Iter]; + assert(GraphNodes[J].isRep() && "Debug check; must be representative"); + if (!Node2Deleted[J]) { + if (!Node2Visited[J]) + Search(J); + if (Node2DFS[Node] > Node2DFS[J]) + Node2DFS[Node] = Node2DFS[J]; + } + } + + if( MyDFS != Node2DFS[Node] ) { + SCCStack.push(Node); + return; + } + + // This node is the root of a SCC, so process it. + // + // If the SCC is "non-trivial" (not a singleton) and contains a reference + // node, we place this SCC into SDT. We unite the nodes in any case. + if (!SCCStack.empty() && Node2DFS[SCCStack.top()] >= MyDFS) { + SparseBitVector<> SCC; + + SCC.set(Node); + + bool Ref = (Node >= FirstRefNode); + + Node2Deleted[Node] = true; + + do { + unsigned P = SCCStack.top(); SCCStack.pop(); + Ref |= (P >= FirstRefNode); + SCC.set(P); + HCDSCCRep[P] = Node; + } while (!SCCStack.empty() && Node2DFS[SCCStack.top()] >= MyDFS); + + if (Ref) { + unsigned Rep = SCC.find_first(); + assert(Rep < FirstRefNode && "The SCC didn't have a non-Ref node!"); + + SparseBitVector<>::iterator i = SCC.begin(); + + // Skip over the non-ref nodes + while( *i < FirstRefNode ) + ++i; + + while( i != SCC.end() ) + SDT[ (*i++) - FirstRefNode ] = Rep; + } + } +} + + /// Optimize the constraints by performing offline variable substitution and /// other optimizations. void Andersens::OptimizeConstraints() { DOUT << "Beginning constraint optimization\n"; + SDTActive = false; + // Function related nodes need to stay in the same relative position and can't // be location equivalent. for (std::map::iterator Iter = MaxK.begin(); @@ -2051,12 +2192,25 @@ if (FindNode(i) == i) { Node *N = &GraphNodes[i]; delete N->PointsTo; + N->PointsTo = NULL; delete N->PredEdges; + N->PredEdges = NULL; delete N->ImplicitPredEdges; + N->ImplicitPredEdges = NULL; delete N->PointedToBy; + N->PointedToBy = NULL; } } + + // perform Hybrid Cycle Detection (HCD) + HCD(); + SDTActive = true; + + // No longer any need for the upper half of GraphNodes (for ref nodes). GraphNodes.erase(GraphNodes.begin() + FirstRefNode, GraphNodes.end()); + + // HCD complete. + DOUT << "Finished constraint optimization\n"; FirstRefNode = 0; FirstAdrNode = 0; @@ -2221,6 +2375,14 @@ } } std::queue TarjanWL; +#if !FULL_UNIVERSAL + // "Rep and special variables" - in order for HCD to maintain conservative + // results when !FULL_UNIVERSAL, we need to treat the special variables in + // the same way that the !FULL_UNIVERSAL tweak does throughout the rest of + // the analysis - it's ok to add edges from the special nodes, but never + // *to* the special nodes. + std::vector RSV; +#endif while( !CurrWL->empty() ) { DOUT << "Starting iteration #" << ++NumIters << "\n"; @@ -2259,6 +2421,39 @@ continue; *(CurrNode->OldPointsTo) |= CurrPointsTo; + + // Check the offline-computed equivalencies from HCD. + bool SCC = false; + unsigned Rep; + + if (SDT[CurrNodeIndex] >= 0) { + SCC = true; + Rep = FindNode(SDT[CurrNodeIndex]); + +#if !FULL_UNIVERSAL + RSV.clear(); +#endif + for (SparseBitVector<>::iterator bi = CurrPointsTo.begin(); + bi != CurrPointsTo.end(); ++bi) { + unsigned Node = FindNode(*bi); +#if !FULL_UNIVERSAL + if (Node < NumberSpecialNodes) { + RSV.push_back(Node); + continue; + } +#endif + Rep = UniteNodes(Rep,Node); + } +#if !FULL_UNIVERSAL + RSV.push_back(Rep); +#endif + + NextWL->insert(&GraphNodes[Rep]); + + if ( ! CurrNode->isRep() ) + continue; + } + Seen.clear(); /* Now process the constraints for this node. */ @@ -2301,39 +2496,74 @@ li++; continue; } - // TODO: hybrid cycle detection would go here, we should check + + // See if we can use Hybrid Cycle Detection (that is, check // if it was a statically detected offline equivalence that - // involves pointers , and if so, remove the redundant constraints. + // involves pointers; if so, remove the redundant constraints). + if( SCC && K == 0 ) { +#if FULL_UNIVERSAL + CurrMember = Rep; - const SparseBitVector<> &Solution = CurrPointsTo; + if (GraphNodes[*Src].Edges->test_and_set(*Dest)) + if (GraphNodes[*Dest].PointsTo |= *(GraphNodes[*Src].PointsTo)) + NextWL->insert(&GraphNodes[*Dest]); +#else + for (unsigned i=0; i < RSV.size(); ++i) { + CurrMember = RSV[i]; - for (SparseBitVector<>::iterator bi = Solution.begin(); - bi != Solution.end(); - ++bi) { - CurrMember = *bi; - - // Need to increment the member by K since that is where we are - // supposed to copy to/from. Note that in positive weight cycles, - // which occur in address taking of fields, K can go past - // MaxK[CurrMember] elements, even though that is all it could point - // to. - if (K > 0 && K > MaxK[CurrMember]) - continue; - else - CurrMember = FindNode(CurrMember + K); + if (*Dest < NumberSpecialNodes) + continue; + if (GraphNodes[*Src].Edges->test_and_set(*Dest)) + if (GraphNodes[*Dest].PointsTo |= *(GraphNodes[*Src].PointsTo)) + NextWL->insert(&GraphNodes[*Dest]); + } +#endif + // since all future elements of the points-to set will be + // equivalent to the current ones, the complex constraints + // become redundant. + // + std::list::iterator lk = li; li++; +#if !FULL_UNIVERSAL + // In this case, we can still erase the constraints when the + // elements of the points-to sets are referenced by *Dest, + // but not when they are referenced by *Src (i.e. for a Load + // constraint). This is because if another special variable is + // put into the points-to set later, we still need to add the + // new edge from that special variable. + if( lk->Type != Constraint::Load) +#endif + GraphNodes[CurrNodeIndex].Constraints.erase(lk); + } else { + const SparseBitVector<> &Solution = CurrPointsTo; + + for (SparseBitVector<>::iterator bi = Solution.begin(); + bi != Solution.end(); + ++bi) { + CurrMember = *bi; + + // Need to increment the member by K since that is where we are + // supposed to copy to/from. Note that in positive weight cycles, + // which occur in address taking of fields, K can go past + // MaxK[CurrMember] elements, even though that is all it could point + // to. + if (K > 0 && K > MaxK[CurrMember]) + continue; + else + CurrMember = FindNode(CurrMember + K); - // Add an edge to the graph, so we can just do regular bitmap ior next - // time. It may also let us notice a cycle. + // Add an edge to the graph, so we can just do regular + // bitmap ior next time. It may also let us notice a cycle. #if !FULL_UNIVERSAL - if (*Dest < NumberSpecialNodes) - continue; + if (*Dest < NumberSpecialNodes) + continue; #endif - if (GraphNodes[*Src].Edges->test_and_set(*Dest)) - if (GraphNodes[*Dest].PointsTo |= *(GraphNodes[*Src].PointsTo)) - NextWL->insert(&GraphNodes[*Dest]); + if (GraphNodes[*Src].Edges->test_and_set(*Dest)) + if (GraphNodes[*Dest].PointsTo |= *(GraphNodes[*Src].PointsTo)) + NextWL->insert(&GraphNodes[*Dest]); + } + li++; } - li++; } SparseBitVector<> NewEdges; SparseBitVector<> ToErase; @@ -2351,8 +2581,8 @@ // got an edge for the representative, delete the current edge. if (Rep == CurrNodeIndex || (Rep != DestVar && NewEdges.test(Rep))) { - ToErase.set(DestVar); - continue; + ToErase.set(DestVar); + continue; } std::pair edge(CurrNodeIndex,Rep); @@ -2395,6 +2625,8 @@ delete N->OldPointsTo; delete N->Edges; } + SDTActive = false; + SDT.clear(); } //===----------------------------------------------------------------------===// @@ -2461,7 +2693,15 @@ DEBUG(PrintNode(SecondNode)); DOUT << "\n"; - // TODO: Handle SDT + if (SDTActive) + if (SDT[Second] >= 0) + if (SDT[First] < 0) + SDT[First] = SDT[Second]; + else { + UniteNodes( FindNode(SDT[First]), FindNode(SDT[Second]) ); + First = FindNode(First); + } + return First; } From evan.cheng at apple.com Wed Mar 5 13:41:09 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 5 Mar 2008 11:41:09 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <200803031053.00270.dag@cray.com> <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> Message-ID: <5E772510-8B4F-488A-A7B5-BBECBAE88451@apple.com> I'm seeing 2 dejagnu test failures on my machine. CodeGen/Generic/print-arith-fp.ll while running: llvm-as < /Users/echeng/LLVM/llvm/test/CodeGen/Generic/ print-arith-fp.ll | llc *** List scheduling failed! *** SU(54): 0x120edc0: i32,ch,flag = CopyFromReg 0x120e680, 0x120b6a0, 0x120e680:1 0x12073e0: ch,flag = CALLpcrel32 0x1209aa0, 0x120eaf0 0x120e680: ch,flag = ADJCALLSTACKUP 0x120f370, 0x120b100, 0x12073e0, 0x12073e0:1 has been released too many times! Assertion failed: (0), function ReleasePred, file ScheduleDAGRRList.cpp, line 213. CodeGen/X86/2007-07-03-GR64ToVR64.ll Are you seeing any issues? Evan On Mar 5, 2008, at 9:16 AM, Roman Levenstein wrote: > 2008/3/5, Dan Gohman : >> On Mar 4, 2008, at 3:56 AM, Roman Levenstein wrote: >>> >> >>> make[5]: Entering directory >>> `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests/Vector/ >>> SSE' >>> make[5]: *** No rule to make target `Output/ >>> sse.expandfft.linked.rbc', >>> needed by `Output/sse.expandfft.linked.bc'. Stop. >> >> >> When I've seen this error, the problem has been that my base llvm >> build configure was run without an llvm-gcc in PATH. llvm-test >> apparently relies on the base llvm build to locate llvm-gcc for it. > > Thanks! Now I checked again and it seems to work. > > So, I have other questions about testing (I guess some of them are > asked quite often ;-): > > 1) I do run llvm/test tests. At the end I get some figures about the > number of PASSED and UNEXPECTEDLY FAILED tests. This is fine. But is > it guaranteed that UNEXPECTEDLY FAILED are introduced by my code or is > it possible that due to some recent changes to the repository some of > those tests just fail? If it is due to the changes in the repository, > how do I know what are the figures without my changes, so that I can > compare and see new failures introduced by my code? Are those numbers > published anywhere, may be in the nightly tests results??? Or should I > basically have to source trees: one for repository version and one for > my local modifications and then run tests under both trees? > > 2) If I run the llvm-test tests, how do I produce reports? How do I > know that something failed? > > 3) How can I run only a selected subset of the tests from llvm-test? > In particular, I only change LLC mostly. Do I have to run the > llvm-test every time, or can I reduce it to something smaller? > > Basically, I have my ScheduleDAG patches ready, All of the proposals > from the review by you and Evan are implemented. But I don't know how > to test them properly using llvm tests and how can I understand if > something is broken by them.... > > I attach both patches for now, so that someone else can test them as > well, while I'm trying to figure out how to do it on my machine. > > -Roman > < > ScheduleDAGRRList > .patch > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From alenhar2 at cs.uiuc.edu Wed Mar 5 13:48:27 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 05 Mar 2008 19:48:27 -0000 Subject: [llvm-commits] [llvm] r47960 - /llvm/trunk/test/CFrontend/2008-03-05-syncPtr.c Message-ID: <200803051948.m25JmRi6022476@zion.cs.uiuc.edu> Author: alenhar2 Date: Wed Mar 5 13:48:27 2008 New Revision: 47960 URL: http://llvm.org/viewvc/llvm-project?rev=47960&view=rev Log: sync ops on ptrs, was breaking libgomp Added: llvm/trunk/test/CFrontend/2008-03-05-syncPtr.c Added: llvm/trunk/test/CFrontend/2008-03-05-syncPtr.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2008-03-05-syncPtr.c?rev=47960&view=auto ============================================================================== --- llvm/trunk/test/CFrontend/2008-03-05-syncPtr.c (added) +++ llvm/trunk/test/CFrontend/2008-03-05-syncPtr.c Wed Mar 5 13:48:27 2008 @@ -0,0 +1,25 @@ +// RUN: %llvmgcc %s -S -emit-llvm -o /dev/null + +int* foo(int** a, int* b, int* c) { +return __sync_val_compare_and_swap (a, b, c); +} + +int foo2(int** a, int* b, int* c) { +return __sync_bool_compare_and_swap (a, b, c); +} + +int* foo3(int** a, int b) { + return __sync_fetch_and_add (a, b); +} + +int* foo4(int** a, int b) { + return __sync_fetch_and_sub (a, b); +} + +int* foo5(int** a, int* b) { + return __sync_lock_test_and_set (a, b); +} + +int* foo6(int** a, int*** b) { + return __sync_lock_test_and_set (a, b); +} From alenhar2 at cs.uiuc.edu Wed Mar 5 13:49:26 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 05 Mar 2008 19:49:26 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47961 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200803051949.m25JnQZc022521@zion.cs.uiuc.edu> Author: alenhar2 Date: Wed Mar 5 13:49:26 2008 New Revision: 47961 URL: http://llvm.org/viewvc/llvm-project?rev=47961&view=rev Log: fix atomic ops on ptrs Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47961&r1=47960&r2=47961&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Wed Mar 5 13:49:26 2008 @@ -4306,14 +4306,21 @@ case BUILT_IN_BOOL_COMPARE_AND_SWAP_4: case BUILT_IN_BOOL_COMPARE_AND_SWAP_8: case BUILT_IN_BOOL_COMPARE_AND_SWAP_16: { + const Type *ResultTy = ConvertType(TREE_TYPE(exp)); tree arglist = TREE_OPERAND(exp, 1); Value* C[3] = { Emit(TREE_VALUE(arglist), 0), Emit(TREE_VALUE(TREE_CHAIN(arglist)), 0), Emit(TREE_VALUE(TREE_CHAIN(TREE_CHAIN(arglist))), 0) }; - const Type *Ty = cast(C[0]->getType())->getElementType(); - if (C[1]->getType() != Ty) + const Type *OrigTy = cast(C[0]->getType())->getElementType(); + const Type* Ty = OrigTy; + if (isa(Ty)) + Ty = TD.getIntPtrType(); + + if (C[0]->getType() != PointerType::getUnqual(Ty)) + C[0] = Builder.CreateBitCast(C[0], PointerType::getUnqual(Ty)); + if (C[1]->getType() != Ty) C[1] = Builder.CreateIntCast(C[1], Ty, "cast"); if (C[2]->getType() != Ty) C[2] = Builder.CreateIntCast(C[2], Ty, "cast"); @@ -4329,7 +4336,8 @@ ((DECL_FUNCTION_CODE(fndecl)) == BUILT_IN_BOOL_COMPARE_AND_SWAP_8) || ((DECL_FUNCTION_CODE(fndecl)) == BUILT_IN_BOOL_COMPARE_AND_SWAP_16)) Result = Builder.CreateICmpEQ(Result, C[1]); - + else if (Ty != OrigTy) + Result = Builder.CreateIntToPtr(Result, OrigTy); return true; } case BUILT_IN_FETCH_AND_ADD_1: @@ -4342,7 +4350,7 @@ case BUILT_IN_FETCH_AND_SUB_4: case BUILT_IN_FETCH_AND_SUB_8: case BUILT_IN_FETCH_AND_SUB_16: { - const Type *Ty = ConvertType(TREE_TYPE(exp)); + const Type *ResultTy = ConvertType(TREE_TYPE(exp)); tree arglist = TREE_OPERAND(exp, 1); Value* C[2] = { Emit(TREE_VALUE(arglist), 0), @@ -4354,6 +4362,13 @@ ((DECL_FUNCTION_CODE(fndecl)) == BUILT_IN_FETCH_AND_SUB_8) || ((DECL_FUNCTION_CODE(fndecl)) == BUILT_IN_FETCH_AND_SUB_16)) C[1] = Builder.CreateNeg(C[1]); + + const Type *OrigTy = cast(C[0]->getType())->getElementType(); + const Type* Ty = OrigTy; + if (isa(Ty)) + Ty = TD.getIntPtrType(); + if (C[0]->getType() != PointerType::getUnqual(Ty)) + C[0] = Builder.CreateBitCast(C[0], PointerType::getUnqual(Ty)); if (C[1]->getType() != Ty) C[1] = Builder.CreateIntCast(C[1], Ty, "cast"); Result = @@ -4361,7 +4376,8 @@ Intrinsic::atomic_las, &Ty, 1), C, C + 2); - + if (Ty != OrigTy) + Result = Builder.CreateIntToPtr(Result, OrigTy); return true; } case BUILT_IN_LOCK_TEST_AND_SET_1: @@ -4369,12 +4385,19 @@ case BUILT_IN_LOCK_TEST_AND_SET_4: case BUILT_IN_LOCK_TEST_AND_SET_8: case BUILT_IN_LOCK_TEST_AND_SET_16: { - const Type *Ty = ConvertType(TREE_TYPE(exp)); + const Type *ResultTy = ConvertType(TREE_TYPE(exp)); tree arglist = TREE_OPERAND(exp, 1); Value* C[2] = { Emit(TREE_VALUE(arglist), 0), Emit(TREE_VALUE(TREE_CHAIN(arglist)), 0) }; + + const Type *OrigTy = cast(C[0]->getType())->getElementType(); + const Type* Ty = OrigTy; + if (isa(Ty)) + Ty = TD.getIntPtrType(); + if (C[0]->getType() != PointerType::getUnqual(Ty)) + C[0] = Builder.CreateBitCast(C[0], PointerType::getUnqual(Ty)); if (C[1]->getType() != Ty) C[1] = Builder.CreateIntCast(C[1], Ty, "cast"); Result = @@ -4383,6 +4406,8 @@ &Ty, 1), C, C + 2); + if (Ty != OrigTy) + Result = Builder.CreateIntToPtr(Result, OrigTy); return true; } #endif //FIXME: these break the build for backends that haven't implemented them From andrewl at lenharth.org Wed Mar 5 13:50:54 2008 From: andrewl at lenharth.org (Andrew Lenharth) Date: Wed, 5 Mar 2008 13:50:54 -0600 Subject: [llvm-commits] [llvm-gcc-4.2] r47905 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <85dfcd7f0803051026g173c4af5sb89fded6d131d82b@mail.gmail.com> References: <200803042118.m24LIdd4005387@zion.cs.uiuc.edu> <85dfcd7f0803050709i70959a5bu5f395d27abed6670@mail.gmail.com> <70BE3971-F2D6-4448-AED8-544D74FC94C2@mac.com> <85dfcd7f0803051026g173c4af5sb89fded6d131d82b@mail.gmail.com> Message-ID: <85dfcd7f0803051150t2cc12b60h7c1c1827415af4e4@mail.gmail.com> > On 3/5/08, Owen Anderson wrote: > > The exact error message was: > > Would you try reenabling the sync builtins and try bootstrapping? It should be fixed now. Andrew From alenhar2 at cs.uiuc.edu Wed Mar 5 14:24:27 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 05 Mar 2008 20:24:27 -0000 Subject: [llvm-commits] [llvm] r47962 - /llvm/trunk/test/CFrontend/2008-03-05-syncPtr.c Message-ID: <200803052024.m25KORx5023500@zion.cs.uiuc.edu> Author: alenhar2 Date: Wed Mar 5 14:24:26 2008 New Revision: 47962 URL: http://llvm.org/viewvc/llvm-project?rev=47962&view=rev Log: test for something more interesting than not crashing Modified: llvm/trunk/test/CFrontend/2008-03-05-syncPtr.c Modified: llvm/trunk/test/CFrontend/2008-03-05-syncPtr.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2008-03-05-syncPtr.c?rev=47962&r1=47961&r2=47962&view=diff ============================================================================== --- llvm/trunk/test/CFrontend/2008-03-05-syncPtr.c (original) +++ llvm/trunk/test/CFrontend/2008-03-05-syncPtr.c Wed Mar 5 14:24:26 2008 @@ -1,4 +1,4 @@ -// RUN: %llvmgcc %s -S -emit-llvm -o /dev/null +// RUN: %llvmgcc %s -S -emit-llvm -o - | grep llvm.atomic int* foo(int** a, int* b, int* c) { return __sync_val_compare_and_swap (a, b, c); From lauro.venancio at gmail.com Wed Mar 5 15:10:26 2008 From: lauro.venancio at gmail.com (Lauro Ramos Venancio) Date: Wed, 05 Mar 2008 21:10:26 -0000 Subject: [llvm-commits] [test-suite] r47963 - in /test-suite/trunk/SingleSource/Benchmarks/Misc: flops-1.c flops-2.c flops-3.c flops-4.c flops-5.c flops-6.c flops-7.c flops-8.c Message-ID: <200803052110.m25LAQRc024722@zion.cs.uiuc.edu> Author: laurov Date: Wed Mar 5 15:10:26 2008 New Revision: 47963 URL: http://llvm.org/viewvc/llvm-project?rev=47963&view=rev Log: Implement SMALL_PROBLEM_SIZE. Modified: test-suite/trunk/SingleSource/Benchmarks/Misc/flops-1.c test-suite/trunk/SingleSource/Benchmarks/Misc/flops-2.c test-suite/trunk/SingleSource/Benchmarks/Misc/flops-3.c test-suite/trunk/SingleSource/Benchmarks/Misc/flops-4.c test-suite/trunk/SingleSource/Benchmarks/Misc/flops-5.c test-suite/trunk/SingleSource/Benchmarks/Misc/flops-6.c test-suite/trunk/SingleSource/Benchmarks/Misc/flops-7.c test-suite/trunk/SingleSource/Benchmarks/Misc/flops-8.c Modified: test-suite/trunk/SingleSource/Benchmarks/Misc/flops-1.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Benchmarks/Misc/flops-1.c?rev=47963&r1=47962&r2=47963&view=diff ============================================================================== --- test-suite/trunk/SingleSource/Benchmarks/Misc/flops-1.c (original) +++ test-suite/trunk/SingleSource/Benchmarks/Misc/flops-1.c Wed Mar 5 15:10:26 2008 @@ -228,7 +228,11 @@ /* in the timing. */ /* 50.0% +, 00.0% -, 42.9% *, and 07.1% / */ /*******************************************************/ +#ifdef SMALL_PROBLEM_SIZE + n = loops*200; +#else n = loops*10000; +#endif sa = 0.0; n = 2 * n; Modified: test-suite/trunk/SingleSource/Benchmarks/Misc/flops-2.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Benchmarks/Misc/flops-2.c?rev=47963&r1=47962&r2=47963&view=diff ============================================================================== --- test-suite/trunk/SingleSource/Benchmarks/Misc/flops-2.c (original) +++ test-suite/trunk/SingleSource/Benchmarks/Misc/flops-2.c Wed Mar 5 15:10:26 2008 @@ -227,8 +227,11 @@ /* in the timing. */ /* 42.9% +, 28.6% -, 14.3% *, and 14.3% / */ /*******************************************************/ - +#ifdef SMALL_PROBLEM_SIZE + m = loops*400; +#else m = loops*10000; +#endif s = -five; /********************/ sa = -one; /* Loop 2. */ /********************/ Modified: test-suite/trunk/SingleSource/Benchmarks/Misc/flops-3.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Benchmarks/Misc/flops-3.c?rev=47963&r1=47962&r2=47963&view=diff ============================================================================== --- test-suite/trunk/SingleSource/Benchmarks/Misc/flops-3.c (original) +++ test-suite/trunk/SingleSource/Benchmarks/Misc/flops-3.c Wed Mar 5 15:10:26 2008 @@ -220,8 +220,11 @@ /*************************/ /* Initialize the timer. */ /*************************/ - - m = loops*20000; +#ifdef SMALL_PROBLEM_SIZE + m = loops*400; +#else + m = loops*20000; +#endif /*******************************************************/ Modified: test-suite/trunk/SingleSource/Benchmarks/Misc/flops-4.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Benchmarks/Misc/flops-4.c?rev=47963&r1=47962&r2=47963&view=diff ============================================================================== --- test-suite/trunk/SingleSource/Benchmarks/Misc/flops-4.c (original) +++ test-suite/trunk/SingleSource/Benchmarks/Misc/flops-4.c Wed Mar 5 15:10:26 2008 @@ -220,8 +220,11 @@ /*************************/ /* Initialize the timer. */ /*************************/ - - m = loops*10000; +#ifdef SMALL_PROBLEM_SIZE + m = loops*400; +#else + m = loops*10000; +#endif /************************************************************/ Modified: test-suite/trunk/SingleSource/Benchmarks/Misc/flops-5.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Benchmarks/Misc/flops-5.c?rev=47963&r1=47962&r2=47963&view=diff ============================================================================== --- test-suite/trunk/SingleSource/Benchmarks/Misc/flops-5.c (original) +++ test-suite/trunk/SingleSource/Benchmarks/Misc/flops-5.c Wed Mar 5 15:10:26 2008 @@ -220,8 +220,11 @@ /*************************/ /* Initialize the timer. */ /*************************/ - - m = loops*10000; +#ifdef SMALL_PROBLEM_SIZE + m = loops*200; +#else + m = loops*10000; +#endif /************************************************************/ Modified: test-suite/trunk/SingleSource/Benchmarks/Misc/flops-6.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Benchmarks/Misc/flops-6.c?rev=47963&r1=47962&r2=47963&view=diff ============================================================================== --- test-suite/trunk/SingleSource/Benchmarks/Misc/flops-6.c (original) +++ test-suite/trunk/SingleSource/Benchmarks/Misc/flops-6.c Wed Mar 5 15:10:26 2008 @@ -220,8 +220,11 @@ /*************************/ /* Initialize the timer. */ /*************************/ - - m = loops*10000; +#ifdef SMALL_PROBLEM_SIZE + m = loops*200; +#else + m = loops*10000; +#endif /************************************************************/ Modified: test-suite/trunk/SingleSource/Benchmarks/Misc/flops-7.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Benchmarks/Misc/flops-7.c?rev=47963&r1=47962&r2=47963&view=diff ============================================================================== --- test-suite/trunk/SingleSource/Benchmarks/Misc/flops-7.c (original) +++ test-suite/trunk/SingleSource/Benchmarks/Misc/flops-7.c Wed Mar 5 15:10:26 2008 @@ -220,8 +220,11 @@ /*************************/ /* Initialize the timer. */ /*************************/ - - m = loops*10000; +#ifdef SMALL_PROBLEM_SIZE + m = loops*200; +#else + m = loops*10000; +#endif Modified: test-suite/trunk/SingleSource/Benchmarks/Misc/flops-8.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Benchmarks/Misc/flops-8.c?rev=47963&r1=47962&r2=47963&view=diff ============================================================================== --- test-suite/trunk/SingleSource/Benchmarks/Misc/flops-8.c (original) +++ test-suite/trunk/SingleSource/Benchmarks/Misc/flops-8.c Wed Mar 5 15:10:26 2008 @@ -220,8 +220,11 @@ /*************************/ /* Initialize the timer. */ /*************************/ - - m = loops*10000; +#ifdef SMALL_PROBLEM_SIZE + m = loops*200; +#else + m = loops*10000; +#endif From dpatel at apple.com Wed Mar 5 15:50:29 2008 From: dpatel at apple.com (Devang Patel) Date: Wed, 05 Mar 2008 21:50:29 -0000 Subject: [llvm-commits] [llvm] r47965 - /llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp Message-ID: <200803052150.m25LoVNY025963@zion.cs.uiuc.edu> Author: dpatel Date: Wed Mar 5 15:50:24 2008 New Revision: 47965 URL: http://llvm.org/viewvc/llvm-project?rev=47965&view=rev Log: Handle 'ret' with multiple values. Modified: llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp Modified: llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp?rev=47965&r1=47964&r2=47965&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp Wed Mar 5 15:50:24 2008 @@ -20,6 +20,7 @@ #include "llvm/Function.h" #include "llvm/Instructions.h" #include "llvm/Type.h" +#include "llvm/ADT/SmallVector.h" using namespace llvm; char UnifyFunctionExitNodes::ID = 0; @@ -50,11 +51,6 @@ // Loop over all of the blocks in a function, tracking all of the blocks that // return. // - - // PHINode can not handle aggregates returned by multiple value ret - // instructions. TODO: Handle each return value independently. - if (isa(F.getReturnType())) - return false; std::vector ReturningBlocks; std::vector UnwindingBlocks; std::vector UnreachableBlocks; @@ -110,18 +106,30 @@ } // Otherwise, we need to insert a new basic block into the function, add a PHI - // node (if the function returns a value), and convert all of the return + // nodes (if the function returns values), and convert all of the return // instructions into unconditional branches. // BasicBlock *NewRetBlock = new BasicBlock("UnifiedReturnBlock", &F); - PHINode *PN = 0; - if (F.getReturnType() != Type::VoidTy) { + SmallVector Phis; + unsigned NumRetVals = ReturningBlocks[0]->getTerminator()->getNumOperands(); + if (NumRetVals == 0) + new ReturnInst(NULL, NewRetBlock); + else if (const StructType *STy = dyn_cast(F.getReturnType())) { + for (unsigned i = 0; i < NumRetVals; ++i) { + PHINode *PN = new PHINode(STy->getElementType(i), "UnifiedRetVal"); + NewRetBlock->getInstList().push_back(PN); + Phis.push_back(PN); + } + new ReturnInst(&Phis[0], NumRetVals); + } + else { // If the function doesn't return void... add a PHI node to the block... - PN = new PHINode(F.getReturnType(), "UnifiedRetVal"); + PHINode *PN = new PHINode(F.getReturnType(), "UnifiedRetVal"); NewRetBlock->getInstList().push_back(PN); + Phis.push_back(PN); + new ReturnInst(PN, NewRetBlock); } - new ReturnInst(PN, NewRetBlock); // Loop over all of the blocks, replacing the return instruction with an // unconditional branch. @@ -132,7 +140,11 @@ // Add an incoming element to the PHI node for every return instruction that // is merging into this new block... - if (PN) PN->addIncoming(BB->getTerminator()->getOperand(0), BB); + if (!Phis.empty()) { + for (unsigned i = 0; i < NumRetVals; ++i) + cast(Phis[i])->addIncoming(BB->getTerminator()->getOperand(i), + BB); + } BB->getInstList().pop_back(); // Remove the return insn new BranchInst(NewRetBlock, BB); From evan.cheng at apple.com Wed Mar 5 16:09:43 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 05 Mar 2008 22:09:43 -0000 Subject: [llvm-commits] [llvm] r47966 - in /llvm/trunk: lib/CodeGen/SimpleRegisterCoalescing.cpp lib/CodeGen/SimpleRegisterCoalescing.h test/CodeGen/PowerPC/2008-03-05-RegScavengerAssert.ll Message-ID: <200803052209.m25M9hhE026634@zion.cs.uiuc.edu> Author: evancheng Date: Wed Mar 5 16:09:42 2008 New Revision: 47966 URL: http://llvm.org/viewvc/llvm-project?rev=47966&view=rev Log: Fix a coalescer bug wrt how dead copy interval is shortened. Added: llvm/trunk/test/CodeGen/PowerPC/2008-03-05-RegScavengerAssert.ll Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=47966&r1=47965&r2=47966&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Wed Mar 5 16:09:42 2008 @@ -451,6 +451,30 @@ } } +/// ShortenDeadCopyLiveRange - Shorten a live range as it's artificially +/// extended by a dead copy. Mark the last use (if any) of the val# as kill +/// as ends the live range there. If there isn't another use, then this +/// live range is dead. +void SimpleRegisterCoalescing::ShortenDeadCopyLiveRange(LiveInterval &li, + MachineInstr *CopyMI) { + unsigned CopyIdx = li_->getInstructionIndex(CopyMI); + LiveInterval::iterator MLR = + li.FindLiveRangeContaining(li_->getDefIndex(CopyIdx)); + unsigned RemoveStart = MLR->start; + unsigned RemoveEnd = MLR->end; + unsigned LastUseIdx; + MachineOperand *LastUse = lastRegisterUse(RemoveStart, CopyIdx, li.reg, + LastUseIdx); + if (LastUse) { + // Shorten the liveinterval to the end of last use. + LastUse->setIsKill(); + RemoveStart = li_->getDefIndex(LastUseIdx); + } + li.removeRange(RemoveStart, RemoveEnd, true); + if (li.empty()) + li_->removeInterval(li.reg); +} + /// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg, /// which are the src/dst of the copy instruction CopyMI. This returns true /// if the copy was successfully coalesced away. If it is not currently @@ -599,23 +623,22 @@ SrcInt.FindLiveRangeContaining(li_->getUseIndex(CopyIdx)); RemoveStart = SrcStart = SrcLR->start; RemoveEnd = SrcEnd = SrcLR->end; - // The instruction which defines the src is only truly dead if there are - // no intermediate uses and there isn't a use beyond the copy. - // FIXME: find the last use, mark is kill and shorten the live range. if (SrcEnd > li_->getDefIndex(CopyIdx)) { + // If there are other uses of SrcReg beyond the copy, there is nothing to do. isDead = false; } else { unsigned LastUseIdx; MachineOperand *LastUse = lastRegisterUse(SrcStart, CopyIdx, SrcReg, LastUseIdx); if (LastUse) { - // Shorten the liveinterval to the end of last use. + // There are uses before the copy, just shorten the live range to the end + // of last use. LastUse->setIsKill(); isDead = false; isShorten = true; RemoveStart = li_->getDefIndex(LastUseIdx); - RemoveEnd = SrcEnd; } else { + // This live range is truly dead. Remove it. MachineInstr *SrcMI = li_->getInstructionFromIndex(SrcStart); if (SrcMI && SrcMI->modifiesRegister(SrcReg, tri_)) // A dead def should have a single cycle interval. @@ -1531,16 +1554,10 @@ if (tii_->isMoveInstr(*mii, srcReg, dstReg) && srcReg == dstReg) { // remove from def list LiveInterval &RegInt = li_->getOrCreateInterval(srcReg); - MachineOperand *MO = mii->findRegisterDefOperand(dstReg, false); // If def of this move instruction is dead, remove its live range from // the dstination register's live interval. - if (MO->isDead()) { - unsigned MoveIdx = li_->getDefIndex(li_->getInstructionIndex(mii)); - LiveInterval::iterator MLR = RegInt.FindLiveRangeContaining(MoveIdx); - RegInt.removeRange(MLR->start, MoveIdx+1, true); - if (RegInt.empty()) - li_->removeInterval(srcReg); - } + if (mii->registerDefIsDead(dstReg)) + ShortenDeadCopyLiveRange(RegInt, mii); li_->RemoveMachineInstrFromMaps(mii); mii = mbbi->erase(mii); ++numPeep; Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h?rev=47966&r1=47965&r2=47966&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h Wed Mar 5 16:09:42 2008 @@ -201,6 +201,12 @@ /// subregister. void UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg, unsigned SubIdx); + /// ShortenDeadCopyLiveRange - Shorten a live range as it's artificially + /// extended by a dead copy. Mark the last use (if any) of the val# as kill + /// as ends the live range there. If there isn't another use, then this + /// live range is dead. + void ShortenDeadCopyLiveRange(LiveInterval &li, MachineInstr *CopyMI); + /// lastRegisterUse - Returns the last use of the specific register between /// cycles Start and End or NULL if there are no uses. MachineOperand *lastRegisterUse(unsigned Start, unsigned End, unsigned Reg, Added: llvm/trunk/test/CodeGen/PowerPC/2008-03-05-RegScavengerAssert.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2008-03-05-RegScavengerAssert.ll?rev=47966&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/2008-03-05-RegScavengerAssert.ll (added) +++ llvm/trunk/test/CodeGen/PowerPC/2008-03-05-RegScavengerAssert.ll Wed Mar 5 16:09:42 2008 @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | llc -mtriple=powerpc-apple-darwin -enable-ppc-regscavenger + +declare i8* @bar(i32) + +define void @foo(i8* %pp) nounwind { +entry: + %tmp2 = tail call i8* @bar( i32 14 ) nounwind ; [#uses=0] + %tmp28 = bitcast i8* %pp to void ()** ; [#uses=1] + %tmp38 = load void ()** %tmp28, align 4 ; [#uses=2] + br i1 false, label %bb34, label %bb25 +bb25: ; preds = %entry + %tmp30 = bitcast void ()* %tmp38 to void (i8*)* ; [#uses=1] + tail call void %tmp30( i8* null ) nounwind + ret void +bb34: ; preds = %entry + tail call void %tmp38( ) nounwind + ret void +} From asl at math.spbu.ru Wed Mar 5 16:22:47 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Mar 2008 22:22:47 -0000 Subject: [llvm-commits] [llvm] r47968 - /llvm/trunk/lib/Linker/LinkModules.cpp Message-ID: <200803052222.m25MMlxB027088@zion.cs.uiuc.edu> Author: asl Date: Wed Mar 5 16:22:46 2008 New Revision: 47968 URL: http://llvm.org/viewvc/llvm-project?rev=47968&view=rev Log: Try hard to link aliases. Checks can be too strict by now. Modified: llvm/trunk/lib/Linker/LinkModules.cpp Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=47968&r1=47967&r2=47968&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Wed Mar 5 16:22:46 2008 @@ -565,34 +565,115 @@ return false; } +static GlobalValue::LinkageTypes +CalculateAliasLinkage(const GlobalValue *SGV, const GlobalValue *DGV) { + if (SGV->hasExternalLinkage() || DGV->hasExternalLinkage()) + return GlobalValue::ExternalLinkage; + else if (SGV->hasWeakLinkage() || DGV->hasWeakLinkage()) + return GlobalValue::WeakLinkage; + else { + assert(SGV->hasInternalLinkage() && DGV->hasInternalLinkage() && + "Unexpected linkage type"); + return GlobalValue::InternalLinkage; + } +} + // LinkAlias - Loop through the alias in the src module and link them into the -// dest module. +// dest module. We're assuming, that all functions/global variables were already +// linked in. static bool LinkAlias(Module *Dest, const Module *Src, std::map &ValueMap, std::string *Err) { - // FIXME: Desptie of the name, this function currently does not 'link' stuff, - // but only copies aliases from one Module to another. - // Loop over all alias in the src module for (Module::const_alias_iterator I = Src->alias_begin(), E = Src->alias_end(); I != E; ++I) { - const GlobalAlias *GA = I; + const GlobalAlias *SGA = I; + const GlobalValue *SAliasee = SGA->getAliasedGlobal(); + GlobalAlias *NewGA = NULL; + + // Globals were already linked, thus we can just query ValueMap for variant + // of SAliasee in Dest + std::map::const_iterator I = ValueMap.find(SAliasee); + assert(I != ValueMap.end() && "Aliasee not linked"); + GlobalValue* DAliasee = cast(I->second); + + // Try to find something 'similar' to SGA in destination module. + if (GlobalAlias *DGA = Dest->getNamedAlias(SGA->getName())) { + // If types don't agree due to opaque types, try to resolve them. + if (RecursiveResolveTypes(SGA->getType(), DGA->getType(), + &Dest->getTypeSymbolTable(), "")) + return Error(Err, "Alias Collision on '" + + ToStr(SGA->getType(), Src) +"':%"+SGA->getName()+ + " - aliases have different types"); + + // Now types are known to be the same, check whether aliasees equal. As + // globals are already linked we just need query ValueMap to find the + // mapping. + if (DAliasee == DGA->getAliasedGlobal()) { + // This is just two copies of the same alias. Propagate linkage, if + // necessary. + DGA->setLinkage(CalculateAliasLinkage(SGA, DGA)); + + NewGA = DGA; + // Proceed to 'common' steps + } else + return Error(Err, "Alias Collision on '" + + ToStr(SGA->getType(), Src) +"':%"+SGA->getName()+ + " - aliases have different aliasees"); + } else if (GlobalVariable *DGV = Dest->getGlobalVariable(SGA->getName())) { + RecursiveResolveTypes(SGA->getType(), DGV->getType(), + &Dest->getTypeSymbolTable(), ""); + // The only allowed way is to link alias with external declaration. + if (DGV->isDeclaration()) { + NewGA = new GlobalAlias(SGA->getType(), SGA->getLinkage(), + SGA->getName(), DAliasee, Dest); + CopyGVAttributes(NewGA, SGA); + + // Any uses of DGV need to change to NewGA, with cast, if needed. + if (SGA->getType() != DGV->getType()) + DGV->replaceAllUsesWith(ConstantExpr::getBitCast(NewGA, + DGV->getType())); + else + DGV->replaceAllUsesWith(NewGA); + + // DGV will conflict with NewGA because they both had the same + // name. We must erase this now so ForceRenaming doesn't assert + // because DGV might not have internal linkage. + DGV->eraseFromParent(); + + // Proceed to 'common' steps + } else + return Error(Err, "Alias Collision on '" + + ToStr(SGA->getType(), Src) +"':%"+SGA->getName()+ + " - symbol multiple defined"); + } else if (Function *DF = Dest->getFunction(SGA->getName())) { + RecursiveResolveTypes(SGA->getType(), DF->getType(), + &Dest->getTypeSymbolTable(), ""); + assert(0 && "FIXME"); + } else { + // Nothing similar found, just copy alias into destination module. - GlobalValue *NewAliasee = NULL; - const GlobalValue *Aliasee = GA->getAliasedGlobal(); - if (isa(Aliasee)) - NewAliasee = Dest->getGlobalVariable(Aliasee->getName()); - else if (isa(Aliasee)) - NewAliasee = Dest->getFunction(Aliasee->getName()); - // FIXME: we should handle the bitcasted aliasee. - assert(NewAliasee && "Can't find the aliased GV."); - - GlobalAlias *NewGA = new GlobalAlias(GA->getType(), GA->getLinkage(), - GA->getName(), NewAliasee, Dest); - CopyGVAttributes(NewGA, GA); + NewGA = new GlobalAlias(SGA->getType(), SGA->getLinkage(), + SGA->getName(), DAliasee, Dest); + CopyGVAttributes(NewGA, SGA); - ValueMap.insert(std::make_pair(GA, NewGA)); + // Proceed to 'common' steps + } + + assert(NewGA && "No alias was created in destination module!"); + + // If the symbol table renamed the function, but it is an externally + // visible symbol, DGV must be an existing function with internal + // linkage. Rename it. + if (NewGA->getName() != SGA->getName() && + !NewGA->hasInternalLinkage()) + ForceRenaming(NewGA, SGA->getName()); + + // Remember this mapping so uses in the source module get remapped + // later by RemapOperand. + ValueMap.insert(std::make_pair(SGA, NewGA)); } + return false; } From snaroff at apple.com Wed Mar 5 16:30:39 2008 From: snaroff at apple.com (Steve Naroff) Date: Wed, 05 Mar 2008 22:30:39 -0000 Subject: [llvm-commits] [llvm] r47969 - /llvm/trunk/win32/Support/Support.vcproj Message-ID: <200803052230.m25MUdkx027491@zion.cs.uiuc.edu> Author: snaroff Date: Wed Mar 5 16:30:39 2008 New Revision: 47969 URL: http://llvm.org/viewvc/llvm-project?rev=47969&view=rev Log: Update vcproj file. Modified: llvm/trunk/win32/Support/Support.vcproj Modified: llvm/trunk/win32/Support/Support.vcproj URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/win32/Support/Support.vcproj?rev=47969&r1=47968&r2=47969&view=diff ============================================================================== --- llvm/trunk/win32/Support/Support.vcproj (original) +++ llvm/trunk/win32/Support/Support.vcproj Wed Mar 5 16:30:39 2008 @@ -4,6 +4,7 @@ Version="8.00" Name="support" ProjectGUID="{28AA9146-3482-4F41-9CC6-407B1D258508}" + RootNamespace="support" Keyword="Win32Proj" > @@ -321,6 +322,10 @@ > + + From scottm at aero.org Wed Mar 5 17:00:20 2008 From: scottm at aero.org (Scott Michel) Date: Wed, 05 Mar 2008 23:00:20 -0000 Subject: [llvm-commits] [llvm] r47972 - in /llvm/trunk/test/CodeGen/CellSPU: and_ops.ll call_indirect.ll ctpop.ll dp_farith.ll eqv.ll fcmp.ll fdiv.ll fneg-fabs.ll immed16.ll immed32.ll immed64.ll int2fp.ll intrinsics_branch.ll intrinsics_float.ll intrinsics_logical.ll mul_ops.ll or_ops.ll rotate_ops.ll select_bits.ll shift_ops.ll sp_farith.ll struct_1.ll vec_const.ll vecinsert.ll Message-ID: <200803052300.m25N0LbU028459@zion.cs.uiuc.edu> Author: pingbak Date: Wed Mar 5 17:00:19 2008 New Revision: 47972 URL: http://llvm.org/viewvc/llvm-project?rev=47972&view=rev Log: - Expand tabs to spaces. - select_bits.ll now fully functional now that PR1993 is closed. It was previously broken by refactoring in SPUInstrInfo.td and using multiclasses. - Same for eqv.ll Modified: llvm/trunk/test/CodeGen/CellSPU/and_ops.ll llvm/trunk/test/CodeGen/CellSPU/call_indirect.ll llvm/trunk/test/CodeGen/CellSPU/ctpop.ll llvm/trunk/test/CodeGen/CellSPU/dp_farith.ll llvm/trunk/test/CodeGen/CellSPU/eqv.ll llvm/trunk/test/CodeGen/CellSPU/fcmp.ll llvm/trunk/test/CodeGen/CellSPU/fdiv.ll llvm/trunk/test/CodeGen/CellSPU/fneg-fabs.ll llvm/trunk/test/CodeGen/CellSPU/immed16.ll llvm/trunk/test/CodeGen/CellSPU/immed32.ll llvm/trunk/test/CodeGen/CellSPU/immed64.ll llvm/trunk/test/CodeGen/CellSPU/int2fp.ll llvm/trunk/test/CodeGen/CellSPU/intrinsics_branch.ll llvm/trunk/test/CodeGen/CellSPU/intrinsics_float.ll llvm/trunk/test/CodeGen/CellSPU/intrinsics_logical.ll llvm/trunk/test/CodeGen/CellSPU/mul_ops.ll llvm/trunk/test/CodeGen/CellSPU/or_ops.ll llvm/trunk/test/CodeGen/CellSPU/rotate_ops.ll llvm/trunk/test/CodeGen/CellSPU/select_bits.ll llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll llvm/trunk/test/CodeGen/CellSPU/sp_farith.ll llvm/trunk/test/CodeGen/CellSPU/struct_1.ll llvm/trunk/test/CodeGen/CellSPU/vec_const.ll llvm/trunk/test/CodeGen/CellSPU/vecinsert.ll Modified: llvm/trunk/test/CodeGen/CellSPU/and_ops.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/and_ops.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/and_ops.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/and_ops.ll Wed Mar 5 17:00:19 2008 @@ -4,6 +4,7 @@ ; RUN: grep andi %t1.s | count 36 ; RUN: grep andhi %t1.s | count 30 ; RUN: grep andbi %t1.s | count 4 + target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" @@ -39,33 +40,33 @@ } define i32 @and_i32_1(i32 %arg1, i32 %arg2) { - %A = and i32 %arg2, %arg1 - ret i32 %A + %A = and i32 %arg2, %arg1 + ret i32 %A } define i32 @and_i32_2(i32 %arg1, i32 %arg2) { - %A = and i32 %arg1, %arg2 - ret i32 %A + %A = and i32 %arg1, %arg2 + ret i32 %A } define i16 @and_i16_1(i16 %arg1, i16 %arg2) { - %A = and i16 %arg2, %arg1 - ret i16 %A + %A = and i16 %arg2, %arg1 + ret i16 %A } define i16 @and_i16_2(i16 %arg1, i16 %arg2) { - %A = and i16 %arg1, %arg2 - ret i16 %A + %A = and i16 %arg1, %arg2 + ret i16 %A } define i8 @and_i8_1(i8 %arg1, i8 %arg2) { - %A = and i8 %arg2, %arg1 - ret i8 %A + %A = and i8 %arg2, %arg1 + ret i8 %A } define i8 @and_i8_2(i8 %arg1, i8 %arg2) { - %A = and i8 %arg1, %arg2 - ret i8 %A + %A = and i8 %arg1, %arg2 + ret i8 %A } ; ANDC instruction generation: @@ -126,57 +127,57 @@ } define i32 @andc_i32_1(i32 %arg1, i32 %arg2) { - %A = xor i32 %arg2, -1 - %B = and i32 %A, %arg1 - ret i32 %B + %A = xor i32 %arg2, -1 + %B = and i32 %A, %arg1 + ret i32 %B } define i32 @andc_i32_2(i32 %arg1, i32 %arg2) { - %A = xor i32 %arg1, -1 - %B = and i32 %A, %arg2 - ret i32 %B + %A = xor i32 %arg1, -1 + %B = and i32 %A, %arg2 + ret i32 %B } define i32 @andc_i32_3(i32 %arg1, i32 %arg2) { - %A = xor i32 %arg2, -1 - %B = and i32 %arg1, %A - ret i32 %B + %A = xor i32 %arg2, -1 + %B = and i32 %arg1, %A + ret i32 %B } define i16 @andc_i16_1(i16 %arg1, i16 %arg2) { - %A = xor i16 %arg2, -1 - %B = and i16 %A, %arg1 - ret i16 %B + %A = xor i16 %arg2, -1 + %B = and i16 %A, %arg1 + ret i16 %B } define i16 @andc_i16_2(i16 %arg1, i16 %arg2) { - %A = xor i16 %arg1, -1 - %B = and i16 %A, %arg2 - ret i16 %B + %A = xor i16 %arg1, -1 + %B = and i16 %A, %arg2 + ret i16 %B } define i16 @andc_i16_3(i16 %arg1, i16 %arg2) { - %A = xor i16 %arg2, -1 - %B = and i16 %arg1, %A - ret i16 %B + %A = xor i16 %arg2, -1 + %B = and i16 %arg1, %A + ret i16 %B } define i8 @andc_i8_1(i8 %arg1, i8 %arg2) { - %A = xor i8 %arg2, -1 - %B = and i8 %A, %arg1 - ret i8 %B + %A = xor i8 %arg2, -1 + %B = and i8 %A, %arg1 + ret i8 %B } define i8 @andc_i8_2(i8 %arg1, i8 %arg2) { - %A = xor i8 %arg1, -1 - %B = and i8 %A, %arg2 - ret i8 %B + %A = xor i8 %arg1, -1 + %B = and i8 %A, %arg2 + ret i8 %B } define i8 @andc_i8_3(i8 %arg1, i8 %arg2) { - %A = xor i8 %arg2, -1 - %B = and i8 %arg1, %A - ret i8 %B + %A = xor i8 %arg2, -1 + %B = and i8 %arg1, %A + ret i8 %B } ; ANDI instruction generation (i32 data type): @@ -252,7 +253,7 @@ ; i8 data type (s/b ANDBI if 8-bit registers were supported): define <16 x i8> @and_v16i8(<16 x i8> %in) { - ; ANDBI generated for vector types + ; ANDBI generated for vector types %tmp2 = and <16 x i8> %in, < i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42 > @@ -260,19 +261,19 @@ } define i8 @and_u8(i8 zeroext %in) zeroext { - ; ANDBI generated: + ; ANDBI generated: %tmp37 = and i8 %in, 37 ret i8 %tmp37 } define i8 @and_sext8(i8 signext %in) signext { - ; ANDBI generated + ; ANDBI generated %tmp38 = and i8 %in, 37 ret i8 %tmp38 } define i8 @and_i8(i8 %in) { - ; ANDBI generated + ; ANDBI generated %tmp38 = and i8 %in, 205 ret i8 %tmp38 } Modified: llvm/trunk/test/CodeGen/CellSPU/call_indirect.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/call_indirect.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/call_indirect.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/call_indirect.ll Wed Mar 5 17:00:19 2008 @@ -23,27 +23,27 @@ define void @dispatcher(i32 %i_arg, float %f_arg) { entry: - %tmp2 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 0), align 16 - tail call void %tmp2( i32 %i_arg, float %f_arg ) - %tmp2.1 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 1), align 4 - tail call void %tmp2.1( i32 %i_arg, float %f_arg ) - %tmp2.2 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 2), align 4 - tail call void %tmp2.2( i32 %i_arg, float %f_arg ) - %tmp2.3 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 3), align 4 - tail call void %tmp2.3( i32 %i_arg, float %f_arg ) - %tmp2.4 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 4), align 4 - tail call void %tmp2.4( i32 %i_arg, float %f_arg ) - %tmp2.5 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 5), align 4 - tail call void %tmp2.5( i32 %i_arg, float %f_arg ) - ret void + %tmp2 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 0), align 16 + tail call void %tmp2( i32 %i_arg, float %f_arg ) + %tmp2.1 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 1), align 4 + tail call void %tmp2.1( i32 %i_arg, float %f_arg ) + %tmp2.2 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 2), align 4 + tail call void %tmp2.2( i32 %i_arg, float %f_arg ) + %tmp2.3 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 3), align 4 + tail call void %tmp2.3( i32 %i_arg, float %f_arg ) + %tmp2.4 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 4), align 4 + tail call void %tmp2.4( i32 %i_arg, float %f_arg ) + %tmp2.5 = load void (i32, float)** getelementptr ([6 x void (i32, float)*]* @dispatch_tab, i32 0, i32 5), align 4 + tail call void %tmp2.5( i32 %i_arg, float %f_arg ) + ret void } @ptr_list = internal global [1 x void ()*] [ void ()* inttoptr (i64 4294967295 to void ()*) ], align 4 @ptr.a = internal global void ()** getelementptr ([1 x void ()*]* @ptr_list, i32 0, i32 1), align 16 define void @double_indirect_call() { - %a = load void ()*** @ptr.a, align 16 - %b = load void ()** %a, align 4 - tail call void %b() - ret void + %a = load void ()*** @ptr.a, align 16 + %b = load void ()** %a, align 4 + tail call void %b() + ret void } Modified: llvm/trunk/test/CodeGen/CellSPU/ctpop.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/ctpop.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/ctpop.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/ctpop.ll Wed Mar 5 17:00:19 2008 @@ -11,20 +11,20 @@ declare i32 @llvm.ctpop.i32(i32) define i32 @test_i8(i8 %X) { - call i32 @llvm.ctpop.i8(i8 %X) - %Y = bitcast i32 %1 to i32 - ret i32 %Y + call i32 @llvm.ctpop.i8(i8 %X) + %Y = bitcast i32 %1 to i32 + ret i32 %Y } define i32 @test_i16(i16 %X) { call i32 @llvm.ctpop.i16(i16 %X) - %Y = bitcast i32 %1 to i32 + %Y = bitcast i32 %1 to i32 ret i32 %Y } define i32 @test_i32(i32 %X) { call i32 @llvm.ctpop.i32(i32 %X) - %Y = bitcast i32 %1 to i32 + %Y = bitcast i32 %1 to i32 ret i32 %Y } Modified: llvm/trunk/test/CodeGen/CellSPU/dp_farith.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/dp_farith.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/dp_farith.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/dp_farith.ll Wed Mar 5 17:00:19 2008 @@ -11,92 +11,92 @@ target triple = "spu" define double @fadd(double %arg1, double %arg2) { - %A = add double %arg1, %arg2 - ret double %A + %A = add double %arg1, %arg2 + ret double %A } define <2 x double> @fadd_vec(<2 x double> %arg1, <2 x double> %arg2) { - %A = add <2 x double> %arg1, %arg2 - ret <2 x double> %A + %A = add <2 x double> %arg1, %arg2 + ret <2 x double> %A } define double @fsub(double %arg1, double %arg2) { - %A = sub double %arg1, %arg2 - ret double %A + %A = sub double %arg1, %arg2 + ret double %A } define <2 x double> @fsub_vec(<2 x double> %arg1, <2 x double> %arg2) { - %A = sub <2 x double> %arg1, %arg2 - ret <2 x double> %A + %A = sub <2 x double> %arg1, %arg2 + ret <2 x double> %A } define double @fmul(double %arg1, double %arg2) { - %A = mul double %arg1, %arg2 - ret double %A + %A = mul double %arg1, %arg2 + ret double %A } define <2 x double> @fmul_vec(<2 x double> %arg1, <2 x double> %arg2) { - %A = mul <2 x double> %arg1, %arg2 - ret <2 x double> %A + %A = mul <2 x double> %arg1, %arg2 + ret <2 x double> %A } define double @fma(double %arg1, double %arg2, double %arg3) { - %A = mul double %arg1, %arg2 - %B = add double %A, %arg3 - ret double %B + %A = mul double %arg1, %arg2 + %B = add double %A, %arg3 + ret double %B } define <2 x double> @fma_vec(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) { - %A = mul <2 x double> %arg1, %arg2 - %B = add <2 x double> %A, %arg3 - ret <2 x double> %B + %A = mul <2 x double> %arg1, %arg2 + %B = add <2 x double> %A, %arg3 + ret <2 x double> %B } define double @fms(double %arg1, double %arg2, double %arg3) { - %A = mul double %arg1, %arg2 - %B = sub double %A, %arg3 - ret double %B + %A = mul double %arg1, %arg2 + %B = sub double %A, %arg3 + ret double %B } define <2 x double> @fms_vec(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) { - %A = mul <2 x double> %arg1, %arg2 - %B = sub <2 x double> %A, %arg3 - ret <2 x double> %B + %A = mul <2 x double> %arg1, %arg2 + %B = sub <2 x double> %A, %arg3 + ret <2 x double> %B } ; - (a * b - c) define double @d_fnms_1(double %arg1, double %arg2, double %arg3) { - %A = mul double %arg1, %arg2 - %B = sub double %A, %arg3 - %C = sub double -0.000000e+00, %B ; [#uses=1] - ret double %C + %A = mul double %arg1, %arg2 + %B = sub double %A, %arg3 + %C = sub double -0.000000e+00, %B ; [#uses=1] + ret double %C } ; Annother way of getting fnms ; - ( a * b ) + c => c - (a * b) define double @d_fnms_2(double %arg1, double %arg2, double %arg3) { - %A = mul double %arg1, %arg2 - %B = sub double %arg3, %A - ret double %B + %A = mul double %arg1, %arg2 + %B = sub double %arg3, %A + ret double %B } ; FNMS: - (a * b - c) => c - (a * b) define <2 x double> @d_fnms_vec_1(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) { - %A = mul <2 x double> %arg1, %arg2 - %B = sub <2 x double> %arg3, %A ; - ret <2 x double> %B + %A = mul <2 x double> %arg1, %arg2 + %B = sub <2 x double> %arg3, %A ; + ret <2 x double> %B } ; Another way to get fnms using a constant vector ; - ( a * b - c) define <2 x double> @d_fnms_vec_2(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) { - %A = mul <2 x double> %arg1, %arg2 ; <<2 x double>> [#uses=1] - %B = sub <2 x double> %A, %arg3 ; <<2 x double>> [#uses=1] - %C = sub <2 x double> < double -0.00000e+00, double -0.00000e+00 >, %B - ret <2 x double> %C + %A = mul <2 x double> %arg1, %arg2 ; <<2 x double>> [#uses=1] + %B = sub <2 x double> %A, %arg3 ; <<2 x double>> [#uses=1] + %C = sub <2 x double> < double -0.00000e+00, double -0.00000e+00 >, %B + ret <2 x double> %C } ;define double @fdiv_1(double %arg1, double %arg2) { -; %A = fdiv double %arg1, %arg2 ; [#uses=1] -; ret double %A +; %A = fdiv double %arg1, %arg2 ; [#uses=1] +; ret double %A ;} Modified: llvm/trunk/test/CodeGen/CellSPU/eqv.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/eqv.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/eqv.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/eqv.ll Wed Mar 5 17:00:19 2008 @@ -14,139 +14,139 @@ target triple = "spu" define <4 x i32> @equiv_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2) { - %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] - %B = or <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] - %Bnot = xor <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] - %C = or <4 x i32> %A, %Bnot ; <<4 x i32>> [#uses=1] - ret <4 x i32> %C + %A = and <4 x i32> %arg1, %arg2 + %B = or <4 x i32> %arg1, %arg2 + %Bnot = xor <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 > + %C = or <4 x i32> %A, %Bnot + ret <4 x i32> %C } define <4 x i32> @equiv_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2) { - %B = or <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] - %Bnot = xor <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] - %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] - %C = or <4 x i32> %A, %Bnot ; <<4 x i32>> [#uses=1] - ret <4 x i32> %C + %B = or <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] + %Bnot = xor <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] + %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] + %C = or <4 x i32> %A, %Bnot ; <<4 x i32>> [#uses=1] + ret <4 x i32> %C } define <4 x i32> @equiv_v4i32_3(<4 x i32> %arg1, <4 x i32> %arg2) { - %B = or <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] - %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] - %Bnot = xor <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] - %C = or <4 x i32> %A, %Bnot ; <<4 x i32>> [#uses=1] - ret <4 x i32> %C + %B = or <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] + %A = and <4 x i32> %arg1, %arg2 ; <<4 x i32>> [#uses=1] + %Bnot = xor <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] + %C = or <4 x i32> %A, %Bnot ; <<4 x i32>> [#uses=1] + ret <4 x i32> %C } define <4 x i32> @equiv_v4i32_4(<4 x i32> %arg1, <4 x i32> %arg2) { - %arg2not = xor <4 x i32> %arg2, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] - %C = xor <4 x i32> %arg1, %arg2not - ret <4 x i32> %C + %arg2not = xor <4 x i32> %arg2, < i32 -1, i32 -1, i32 -1, i32 -1 > + %C = xor <4 x i32> %arg1, %arg2not + ret <4 x i32> %C } define i32 @equiv_i32_1(i32 %arg1, i32 %arg2) { - %A = and i32 %arg1, %arg2 ; [#uses=1] - %B = or i32 %arg1, %arg2 ; [#uses=1] - %Bnot = xor i32 %B, -1 ; [#uses=1] - %C = or i32 %A, %Bnot ; [#uses=1] - ret i32 %C + %A = and i32 %arg1, %arg2 ; [#uses=1] + %B = or i32 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i32 %B, -1 ; [#uses=1] + %C = or i32 %A, %Bnot ; [#uses=1] + ret i32 %C } define i32 @equiv_i32_2(i32 %arg1, i32 %arg2) { - %B = or i32 %arg1, %arg2 ; [#uses=1] - %Bnot = xor i32 %B, -1 ; [#uses=1] - %A = and i32 %arg1, %arg2 ; [#uses=1] - %C = or i32 %A, %Bnot ; [#uses=1] - ret i32 %C + %B = or i32 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i32 %B, -1 ; [#uses=1] + %A = and i32 %arg1, %arg2 ; [#uses=1] + %C = or i32 %A, %Bnot ; [#uses=1] + ret i32 %C } define i32 @equiv_i32_3(i32 %arg1, i32 %arg2) { - %B = or i32 %arg1, %arg2 ; [#uses=1] - %A = and i32 %arg1, %arg2 ; [#uses=1] - %Bnot = xor i32 %B, -1 ; [#uses=1] - %C = or i32 %A, %Bnot ; [#uses=1] - ret i32 %C + %B = or i32 %arg1, %arg2 ; [#uses=1] + %A = and i32 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i32 %B, -1 ; [#uses=1] + %C = or i32 %A, %Bnot ; [#uses=1] + ret i32 %C } define i32 @equiv_i32_4(i32 %arg1, i32 %arg2) { - %arg2not = xor i32 %arg2, -1 - %C = xor i32 %arg1, %arg2not - ret i32 %C + %arg2not = xor i32 %arg2, -1 + %C = xor i32 %arg1, %arg2not + ret i32 %C } define i32 @equiv_i32_5(i32 %arg1, i32 %arg2) { - %arg1not = xor i32 %arg1, -1 - %C = xor i32 %arg2, %arg1not - ret i32 %C + %arg1not = xor i32 %arg1, -1 + %C = xor i32 %arg2, %arg1not + ret i32 %C } define i16 @equiv_i16_1(i16 signext %arg1, i16 signext %arg2) signext { - %A = and i16 %arg1, %arg2 ; [#uses=1] - %B = or i16 %arg1, %arg2 ; [#uses=1] - %Bnot = xor i16 %B, -1 ; [#uses=1] - %C = or i16 %A, %Bnot ; [#uses=1] - ret i16 %C + %A = and i16 %arg1, %arg2 ; [#uses=1] + %B = or i16 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i16 %B, -1 ; [#uses=1] + %C = or i16 %A, %Bnot ; [#uses=1] + ret i16 %C } define i16 @equiv_i16_2(i16 signext %arg1, i16 signext %arg2) signext { - %B = or i16 %arg1, %arg2 ; [#uses=1] - %Bnot = xor i16 %B, -1 ; [#uses=1] - %A = and i16 %arg1, %arg2 ; [#uses=1] - %C = or i16 %A, %Bnot ; [#uses=1] - ret i16 %C + %B = or i16 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i16 %B, -1 ; [#uses=1] + %A = and i16 %arg1, %arg2 ; [#uses=1] + %C = or i16 %A, %Bnot ; [#uses=1] + ret i16 %C } define i16 @equiv_i16_3(i16 signext %arg1, i16 signext %arg2) signext { - %B = or i16 %arg1, %arg2 ; [#uses=1] - %A = and i16 %arg1, %arg2 ; [#uses=1] - %Bnot = xor i16 %B, -1 ; [#uses=1] - %C = or i16 %A, %Bnot ; [#uses=1] - ret i16 %C + %B = or i16 %arg1, %arg2 ; [#uses=1] + %A = and i16 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i16 %B, -1 ; [#uses=1] + %C = or i16 %A, %Bnot ; [#uses=1] + ret i16 %C } define i8 @equiv_i8_1(i8 signext %arg1, i8 signext %arg2) signext { - %A = and i8 %arg1, %arg2 ; [#uses=1] - %B = or i8 %arg1, %arg2 ; [#uses=1] - %Bnot = xor i8 %B, -1 ; [#uses=1] - %C = or i8 %A, %Bnot ; [#uses=1] - ret i8 %C + %A = and i8 %arg1, %arg2 ; [#uses=1] + %B = or i8 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i8 %B, -1 ; [#uses=1] + %C = or i8 %A, %Bnot ; [#uses=1] + ret i8 %C } define i8 @equiv_i8_2(i8 signext %arg1, i8 signext %arg2) signext { - %B = or i8 %arg1, %arg2 ; [#uses=1] - %Bnot = xor i8 %B, -1 ; [#uses=1] - %A = and i8 %arg1, %arg2 ; [#uses=1] - %C = or i8 %A, %Bnot ; [#uses=1] - ret i8 %C + %B = or i8 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i8 %B, -1 ; [#uses=1] + %A = and i8 %arg1, %arg2 ; [#uses=1] + %C = or i8 %A, %Bnot ; [#uses=1] + ret i8 %C } define i8 @equiv_i8_3(i8 signext %arg1, i8 signext %arg2) signext { - %B = or i8 %arg1, %arg2 ; [#uses=1] - %A = and i8 %arg1, %arg2 ; [#uses=1] - %Bnot = xor i8 %B, -1 ; [#uses=1] - %C = or i8 %A, %Bnot ; [#uses=1] - ret i8 %C + %B = or i8 %arg1, %arg2 ; [#uses=1] + %A = and i8 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i8 %B, -1 ; [#uses=1] + %C = or i8 %A, %Bnot ; [#uses=1] + ret i8 %C } define i8 @equiv_u8_1(i8 zeroext %arg1, i8 zeroext %arg2) zeroext { - %A = and i8 %arg1, %arg2 ; [#uses=1] - %B = or i8 %arg1, %arg2 ; [#uses=1] - %Bnot = xor i8 %B, -1 ; [#uses=1] - %C = or i8 %A, %Bnot ; [#uses=1] - ret i8 %C + %A = and i8 %arg1, %arg2 ; [#uses=1] + %B = or i8 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i8 %B, -1 ; [#uses=1] + %C = or i8 %A, %Bnot ; [#uses=1] + ret i8 %C } define i8 @equiv_u8_2(i8 zeroext %arg1, i8 zeroext %arg2) zeroext { - %B = or i8 %arg1, %arg2 ; [#uses=1] - %Bnot = xor i8 %B, -1 ; [#uses=1] - %A = and i8 %arg1, %arg2 ; [#uses=1] - %C = or i8 %A, %Bnot ; [#uses=1] - ret i8 %C + %B = or i8 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i8 %B, -1 ; [#uses=1] + %A = and i8 %arg1, %arg2 ; [#uses=1] + %C = or i8 %A, %Bnot ; [#uses=1] + ret i8 %C } define i8 @equiv_u8_3(i8 zeroext %arg1, i8 zeroext %arg2) zeroext { - %B = or i8 %arg1, %arg2 ; [#uses=1] - %A = and i8 %arg1, %arg2 ; [#uses=1] - %Bnot = xor i8 %B, -1 ; [#uses=1] - %C = or i8 %A, %Bnot ; [#uses=1] - ret i8 %C + %B = or i8 %arg1, %arg2 ; [#uses=1] + %A = and i8 %arg1, %arg2 ; [#uses=1] + %Bnot = xor i8 %B, -1 ; [#uses=1] + %C = or i8 %A, %Bnot ; [#uses=1] + ret i8 %C } Modified: llvm/trunk/test/CodeGen/CellSPU/fcmp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/fcmp.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/fcmp.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/fcmp.ll Wed Mar 5 17:00:19 2008 @@ -10,13 +10,13 @@ declare float @fabsf(float) define i1 @fcmp_eq(float %arg1, float %arg2) { - %A = fcmp oeq float %arg1, %arg2 ; [#uses=1] - ret i1 %A + %A = fcmp oeq float %arg1, %arg2 ; [#uses=1] + ret i1 %A } define i1 @fcmp_mag_eq(float %arg1, float %arg2) { - %A = call float @fabsf(float %arg1) ; [#uses=1] - %B = call float @fabsf(float %arg2) ; [#uses=1] - %C = fcmp oeq float %A, %B ; [#uses=1] - ret i1 %C + %A = call float @fabsf(float %arg1) ; [#uses=1] + %B = call float @fabsf(float %arg2) ; [#uses=1] + %C = fcmp oeq float %A, %B ; [#uses=1] + ret i1 %C } Modified: llvm/trunk/test/CodeGen/CellSPU/fdiv.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/fdiv.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/fdiv.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/fdiv.ll Wed Mar 5 17:00:19 2008 @@ -10,11 +10,11 @@ target triple = "spu" define float @fdiv32(float %arg1, float %arg2) { - %A = fdiv float %arg1, %arg2 - ret float %A + %A = fdiv float %arg1, %arg2 + ret float %A } define <4 x float> @fdiv_v4f32(<4 x float> %arg1, <4 x float> %arg2) { - %A = fdiv <4 x float> %arg1, %arg2 - ret <4 x float> %A + %A = fdiv <4 x float> %arg1, %arg2 + ret <4 x float> %A } Modified: llvm/trunk/test/CodeGen/CellSPU/fneg-fabs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/fneg-fabs.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/fneg-fabs.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/fneg-fabs.ll Wed Mar 5 17:00:19 2008 @@ -8,24 +8,24 @@ target triple = "spu" define double @fneg_dp(double %X) { - %Y = sub double -0.000000e+00, %X - ret double %Y + %Y = sub double -0.000000e+00, %X + ret double %Y } define <2 x double> @fneg_dp_vec(<2 x double> %X) { - %Y = sub <2 x double> < double -0.0000e+00, double -0.0000e+00 >, %X - ret <2 x double> %Y + %Y = sub <2 x double> < double -0.0000e+00, double -0.0000e+00 >, %X + ret <2 x double> %Y } define float @fneg_sp(float %X) { - %Y = sub float -0.000000e+00, %X - ret float %Y + %Y = sub float -0.000000e+00, %X + ret float %Y } define <4 x float> @fneg_sp_vec(<4 x float> %X) { - %Y = sub <4 x float> , %X - ret <4 x float> %Y + ret <4 x float> %Y } declare double @fabs(double) @@ -33,11 +33,11 @@ declare float @fabsf(float) define double @fabs_dp(double %X) { - %Y = call double @fabs( double %X ) ; [#uses=1] - ret double %Y + %Y = call double @fabs( double %X ) ; [#uses=1] + ret double %Y } define float @fabs_sp(float %X) { - %Y = call float @fabsf( float %X ) ; [#uses=1] - ret float %Y + %Y = call float @fabsf( float %X ) ; [#uses=1] + ret float %Y } Modified: llvm/trunk/test/CodeGen/CellSPU/immed16.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/immed16.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/immed16.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/immed16.ll Wed Mar 5 17:00:19 2008 @@ -5,31 +5,31 @@ define i16 @test_1() { %x = alloca i16, align 16 - store i16 419, i16* %x ;; ILH via pattern + store i16 419, i16* %x ;; ILH via pattern ret i16 0 } define i16 @test_2() { %x = alloca i16, align 16 - store i16 1023, i16* %x ;; ILH via pattern + store i16 1023, i16* %x ;; ILH via pattern ret i16 0 } define i16 @test_3() { %x = alloca i16, align 16 - store i16 -1023, i16* %x ;; ILH via pattern + store i16 -1023, i16* %x ;; ILH via pattern ret i16 0 } define i16 @test_4() { %x = alloca i16, align 16 - store i16 32767, i16* %x ;; ILH via pattern + store i16 32767, i16* %x ;; ILH via pattern ret i16 0 } define i16 @test_5() { %x = alloca i16, align 16 - store i16 -32768, i16* %x ;; ILH via pattern + store i16 -32768, i16* %x ;; ILH via pattern ret i16 0 } Modified: llvm/trunk/test/CodeGen/CellSPU/immed32.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/immed32.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/immed32.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/immed32.ll Wed Mar 5 17:00:19 2008 @@ -16,57 +16,57 @@ target triple = "spu" define i32 @test_1() { - ret i32 4784128 ;; ILHU via pattern (0x49000) + ret i32 4784128 ;; ILHU via pattern (0x49000) } define i32 @test_2() { - ret i32 5308431 ;; ILHU/IOHL via pattern (0x5100f) + ret i32 5308431 ;; ILHU/IOHL via pattern (0x5100f) } define i32 @test_3() { - ret i32 511 ;; IL via pattern + ret i32 511 ;; IL via pattern } define i32 @test_4() { - ret i32 -512 ;; IL via pattern + ret i32 -512 ;; IL via pattern } ;; double float floatval ;; 0x4005bf0a80000000 0x402d|f854 2.718282 define float @float_const_1() { - ret float 0x4005BF0A80000000 ;; ILHU/IOHL + ret float 0x4005BF0A80000000 ;; ILHU/IOHL } ;; double float floatval ;; 0x3810000000000000 0x0080|0000 0.000000 define float @float_const_2() { - ret float 0x3810000000000000 ;; IL 128 + ret float 0x3810000000000000 ;; IL 128 } ;; double float floatval ;; 0x47efffffe0000000 0x7f7f|ffff NaN define float @float_const_3() { - ret float 0x47EFFFFFE0000000 ;; ILHU/IOHL via pattern + ret float 0x47EFFFFFE0000000 ;; ILHU/IOHL via pattern } ;; double float floatval ;; 0x400921fb60000000 0x4049|0fdb 3.141593 define float @float_const_4() { - ret float 0x400921FB60000000 ;; ILHU/IOHL via pattern + ret float 0x400921FB60000000 ;; ILHU/IOHL via pattern } ;; double float floatval ;; 0xbff6a09e60000000 0xbfb5|04f3 -1.414214 define float @float_const_5() { - ret float 0xBFF6A09E60000000 ;; ILHU/IOHL via pattern + ret float 0xBFF6A09E60000000 ;; ILHU/IOHL via pattern } ;; double float floatval ;; 0x3ff6a09e60000000 0x3fb5|04f3 1.414214 define float @float_const_6() { - ret float 0x3FF6A09E60000000 ;; ILHU/IOHL via pattern + ret float 0x3FF6A09E60000000 ;; ILHU/IOHL via pattern } define float @float_const_7() { - ret float 0.000000e+00 ;; IL 0 via pattern + ret float 0.000000e+00 ;; IL 0 via pattern } Modified: llvm/trunk/test/CodeGen/CellSPU/immed64.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/immed64.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/immed64.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/immed64.ll Wed Mar 5 17:00:19 2008 @@ -1,5 +1,6 @@ ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s ; RUN: grep lqa %t1.s | count 13 +; RUN: grep il %t1.s | count 21 ; RUN: grep shufb %t1.s | count 13 ; RUN: grep 65520 %t1.s | count 1 ; RUN: grep 43981 %t1.s | count 1 @@ -52,6 +53,10 @@ ret i64 0 ;; IL } +define i64 @i64_const_9() { + ret i64 -1 ;; IL +} + ; 0x4005bf0a8b145769 -> ; (ILHU 0x4005 [16389]/IOHL 0xbf0a [48906]) ; (ILHU 0x8b14 [35604]/IOHL 0x5769 [22377]) Modified: llvm/trunk/test/CodeGen/CellSPU/int2fp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/int2fp.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/int2fp.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/int2fp.ll Wed Mar 5 17:00:19 2008 @@ -11,31 +11,31 @@ target triple = "spu" define float @sitofp_i32(i32 %arg1) { - %A = sitofp i32 %arg1 to float ; [#uses=1] - ret float %A + %A = sitofp i32 %arg1 to float ; [#uses=1] + ret float %A } define float @uitofp_u32(i32 %arg1) { - %A = uitofp i32 %arg1 to float ; [#uses=1] - ret float %A + %A = uitofp i32 %arg1 to float ; [#uses=1] + ret float %A } define float @sitofp_i16(i16 %arg1) { - %A = sitofp i16 %arg1 to float ; [#uses=1] - ret float %A + %A = sitofp i16 %arg1 to float ; [#uses=1] + ret float %A } define float @uitofp_i16(i16 %arg1) { - %A = uitofp i16 %arg1 to float ; [#uses=1] - ret float %A + %A = uitofp i16 %arg1 to float ; [#uses=1] + ret float %A } define float @sitofp_i8(i8 %arg1) { - %A = sitofp i8 %arg1 to float ; [#uses=1] - ret float %A + %A = sitofp i8 %arg1 to float ; [#uses=1] + ret float %A } define float @uitofp_i8(i8 %arg1) { - %A = uitofp i8 %arg1 to float ; [#uses=1] - ret float %A + %A = uitofp i8 %arg1 to float ; [#uses=1] + ret float %A } Modified: llvm/trunk/test/CodeGen/CellSPU/intrinsics_branch.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/intrinsics_branch.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/intrinsics_branch.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/intrinsics_branch.ll Wed Mar 5 17:00:19 2008 @@ -36,115 +36,115 @@ define <4 x i32> @test(<4 x i32> %A) { - call <4 x i32> @llvm.spu.si.shli(<4 x i32> %A, i8 3) - %Y = bitcast <4 x i32> %1 to <4 x i32> - ret <4 x i32> %Y + call <4 x i32> @llvm.spu.si.shli(<4 x i32> %A, i8 3) + %Y = bitcast <4 x i32> %1 to <4 x i32> + ret <4 x i32> %Y } define <4 x i32> @ceqtest(<4 x i32> %A, <4 x i32> %B) { - call <4 x i32> @llvm.spu.si.ceq(<4 x i32> %A, <4 x i32> %B) - %Y = bitcast <4 x i32> %1 to <4 x i32> - ret <4 x i32> %Y + call <4 x i32> @llvm.spu.si.ceq(<4 x i32> %A, <4 x i32> %B) + %Y = bitcast <4 x i32> %1 to <4 x i32> + ret <4 x i32> %Y } define <8 x i16> @ceqhtest(<8 x i16> %A, <8 x i16> %B) { - call <8 x i16> @llvm.spu.si.ceqh(<8 x i16> %A, <8 x i16> %B) - %Y = bitcast <8 x i16> %1 to <8 x i16> - ret <8 x i16> %Y + call <8 x i16> @llvm.spu.si.ceqh(<8 x i16> %A, <8 x i16> %B) + %Y = bitcast <8 x i16> %1 to <8 x i16> + ret <8 x i16> %Y } define <16 x i8> @ceqbtest(<16 x i8> %A, <16 x i8> %B) { - call <16 x i8> @llvm.spu.si.ceqb(<16 x i8> %A, <16 x i8> %B) - %Y = bitcast <16 x i8> %1 to <16 x i8> - ret <16 x i8> %Y + call <16 x i8> @llvm.spu.si.ceqb(<16 x i8> %A, <16 x i8> %B) + %Y = bitcast <16 x i8> %1 to <16 x i8> + ret <16 x i8> %Y } define <4 x i32> @ceqitest(<4 x i32> %A) { - call <4 x i32> @llvm.spu.si.ceqi(<4 x i32> %A, i16 65) - %Y = bitcast <4 x i32> %1 to <4 x i32> - ret <4 x i32> %Y + call <4 x i32> @llvm.spu.si.ceqi(<4 x i32> %A, i16 65) + %Y = bitcast <4 x i32> %1 to <4 x i32> + ret <4 x i32> %Y } define <8 x i16> @ceqhitest(<8 x i16> %A) { - call <8 x i16> @llvm.spu.si.ceqhi(<8 x i16> %A, i16 65) - %Y = bitcast <8 x i16> %1 to <8 x i16> - ret <8 x i16> %Y + call <8 x i16> @llvm.spu.si.ceqhi(<8 x i16> %A, i16 65) + %Y = bitcast <8 x i16> %1 to <8 x i16> + ret <8 x i16> %Y } define <16 x i8> @ceqbitest(<16 x i8> %A) { - call <16 x i8> @llvm.spu.si.ceqbi(<16 x i8> %A, i8 65) - %Y = bitcast <16 x i8> %1 to <16 x i8> - ret <16 x i8> %Y + call <16 x i8> @llvm.spu.si.ceqbi(<16 x i8> %A, i8 65) + %Y = bitcast <16 x i8> %1 to <16 x i8> + ret <16 x i8> %Y } define <4 x i32> @cgttest(<4 x i32> %A, <4 x i32> %B) { - call <4 x i32> @llvm.spu.si.cgt(<4 x i32> %A, <4 x i32> %B) - %Y = bitcast <4 x i32> %1 to <4 x i32> - ret <4 x i32> %Y + call <4 x i32> @llvm.spu.si.cgt(<4 x i32> %A, <4 x i32> %B) + %Y = bitcast <4 x i32> %1 to <4 x i32> + ret <4 x i32> %Y } define <8 x i16> @cgthtest(<8 x i16> %A, <8 x i16> %B) { - call <8 x i16> @llvm.spu.si.cgth(<8 x i16> %A, <8 x i16> %B) - %Y = bitcast <8 x i16> %1 to <8 x i16> - ret <8 x i16> %Y + call <8 x i16> @llvm.spu.si.cgth(<8 x i16> %A, <8 x i16> %B) + %Y = bitcast <8 x i16> %1 to <8 x i16> + ret <8 x i16> %Y } define <16 x i8> @cgtbtest(<16 x i8> %A, <16 x i8> %B) { - call <16 x i8> @llvm.spu.si.cgtb(<16 x i8> %A, <16 x i8> %B) - %Y = bitcast <16 x i8> %1 to <16 x i8> - ret <16 x i8> %Y + call <16 x i8> @llvm.spu.si.cgtb(<16 x i8> %A, <16 x i8> %B) + %Y = bitcast <16 x i8> %1 to <16 x i8> + ret <16 x i8> %Y } define <4 x i32> @cgtitest(<4 x i32> %A) { - call <4 x i32> @llvm.spu.si.cgti(<4 x i32> %A, i16 65) - %Y = bitcast <4 x i32> %1 to <4 x i32> - ret <4 x i32> %Y + call <4 x i32> @llvm.spu.si.cgti(<4 x i32> %A, i16 65) + %Y = bitcast <4 x i32> %1 to <4 x i32> + ret <4 x i32> %Y } define <8 x i16> @cgthitest(<8 x i16> %A) { - call <8 x i16> @llvm.spu.si.cgthi(<8 x i16> %A, i16 65) - %Y = bitcast <8 x i16> %1 to <8 x i16> - ret <8 x i16> %Y + call <8 x i16> @llvm.spu.si.cgthi(<8 x i16> %A, i16 65) + %Y = bitcast <8 x i16> %1 to <8 x i16> + ret <8 x i16> %Y } define <16 x i8> @cgtbitest(<16 x i8> %A) { - call <16 x i8> @llvm.spu.si.cgtbi(<16 x i8> %A, i8 65) - %Y = bitcast <16 x i8> %1 to <16 x i8> - ret <16 x i8> %Y + call <16 x i8> @llvm.spu.si.cgtbi(<16 x i8> %A, i8 65) + %Y = bitcast <16 x i8> %1 to <16 x i8> + ret <16 x i8> %Y } define <4 x i32> @clgttest(<4 x i32> %A, <4 x i32> %B) { - call <4 x i32> @llvm.spu.si.clgt(<4 x i32> %A, <4 x i32> %B) - %Y = bitcast <4 x i32> %1 to <4 x i32> - ret <4 x i32> %Y + call <4 x i32> @llvm.spu.si.clgt(<4 x i32> %A, <4 x i32> %B) + %Y = bitcast <4 x i32> %1 to <4 x i32> + ret <4 x i32> %Y } define <8 x i16> @clgthtest(<8 x i16> %A, <8 x i16> %B) { - call <8 x i16> @llvm.spu.si.clgth(<8 x i16> %A, <8 x i16> %B) - %Y = bitcast <8 x i16> %1 to <8 x i16> - ret <8 x i16> %Y + call <8 x i16> @llvm.spu.si.clgth(<8 x i16> %A, <8 x i16> %B) + %Y = bitcast <8 x i16> %1 to <8 x i16> + ret <8 x i16> %Y } define <16 x i8> @clgtbtest(<16 x i8> %A, <16 x i8> %B) { - call <16 x i8> @llvm.spu.si.clgtb(<16 x i8> %A, <16 x i8> %B) - %Y = bitcast <16 x i8> %1 to <16 x i8> - ret <16 x i8> %Y + call <16 x i8> @llvm.spu.si.clgtb(<16 x i8> %A, <16 x i8> %B) + %Y = bitcast <16 x i8> %1 to <16 x i8> + ret <16 x i8> %Y } define <4 x i32> @clgtitest(<4 x i32> %A) { - call <4 x i32> @llvm.spu.si.clgti(<4 x i32> %A, i16 65) - %Y = bitcast <4 x i32> %1 to <4 x i32> - ret <4 x i32> %Y + call <4 x i32> @llvm.spu.si.clgti(<4 x i32> %A, i16 65) + %Y = bitcast <4 x i32> %1 to <4 x i32> + ret <4 x i32> %Y } define <8 x i16> @clgthitest(<8 x i16> %A) { - call <8 x i16> @llvm.spu.si.clgthi(<8 x i16> %A, i16 65) - %Y = bitcast <8 x i16> %1 to <8 x i16> - ret <8 x i16> %Y + call <8 x i16> @llvm.spu.si.clgthi(<8 x i16> %A, i16 65) + %Y = bitcast <8 x i16> %1 to <8 x i16> + ret <8 x i16> %Y } define <16 x i8> @clgtbitest(<16 x i8> %A) { - call <16 x i8> @llvm.spu.si.clgtbi(<16 x i8> %A, i8 65) - %Y = bitcast <16 x i8> %1 to <16 x i8> - ret <16 x i8> %Y + call <16 x i8> @llvm.spu.si.clgtbi(<16 x i8> %A, i8 65) + %Y = bitcast <16 x i8> %1 to <16 x i8> + ret <16 x i8> %Y } Modified: llvm/trunk/test/CodeGen/CellSPU/intrinsics_float.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/intrinsics_float.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/intrinsics_float.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/intrinsics_float.ll Wed Mar 5 17:00:19 2008 @@ -28,15 +28,15 @@ declare <4 x float> @llvm.spu.si.fms(<4 x float>, <4 x float>, <4 x float>) define <4 x i32> @test(<4 x i32> %A) { - call <4 x i32> @llvm.spu.si.shli(<4 x i32> %A, i8 3) - %Y = bitcast <4 x i32> %1 to <4 x i32> - ret <4 x i32> %Y + call <4 x i32> @llvm.spu.si.shli(<4 x i32> %A, i8 3) + %Y = bitcast <4 x i32> %1 to <4 x i32> + ret <4 x i32> %Y } define <4 x float> @fatest(<4 x float> %A, <4 x float> %B) { - call <4 x float> @llvm.spu.si.fa(<4 x float> %A, <4 x float> %B) - %Y = bitcast <4 x float> %1 to <4 x float> - ret <4 x float> %Y + call <4 x float> @llvm.spu.si.fa(<4 x float> %A, <4 x float> %B) + %Y = bitcast <4 x float> %1 to <4 x float> + ret <4 x float> %Y } define <4 x float> @fstest(<4 x float> %A, <4 x float> %B) { @@ -46,49 +46,49 @@ } define <4 x float> @fmtest(<4 x float> %A, <4 x float> %B) { - call <4 x float> @llvm.spu.si.fm(<4 x float> %A, <4 x float> %B) - %Y = bitcast <4 x float> %1 to <4 x float> - ret <4 x float> %Y + call <4 x float> @llvm.spu.si.fm(<4 x float> %A, <4 x float> %B) + %Y = bitcast <4 x float> %1 to <4 x float> + ret <4 x float> %Y } define <4 x float> @fceqtest(<4 x float> %A, <4 x float> %B) { - call <4 x float> @llvm.spu.si.fceq(<4 x float> %A, <4 x float> %B) - %Y = bitcast <4 x float> %1 to <4 x float> - ret <4 x float> %Y + call <4 x float> @llvm.spu.si.fceq(<4 x float> %A, <4 x float> %B) + %Y = bitcast <4 x float> %1 to <4 x float> + ret <4 x float> %Y } define <4 x float> @fcmeqtest(<4 x float> %A, <4 x float> %B) { - call <4 x float> @llvm.spu.si.fcmeq(<4 x float> %A, <4 x float> %B) - %Y = bitcast <4 x float> %1 to <4 x float> - ret <4 x float> %Y + call <4 x float> @llvm.spu.si.fcmeq(<4 x float> %A, <4 x float> %B) + %Y = bitcast <4 x float> %1 to <4 x float> + ret <4 x float> %Y } define <4 x float> @fcgttest(<4 x float> %A, <4 x float> %B) { - call <4 x float> @llvm.spu.si.fcgt(<4 x float> %A, <4 x float> %B) - %Y = bitcast <4 x float> %1 to <4 x float> - ret <4 x float> %Y + call <4 x float> @llvm.spu.si.fcgt(<4 x float> %A, <4 x float> %B) + %Y = bitcast <4 x float> %1 to <4 x float> + ret <4 x float> %Y } define <4 x float> @fcmgttest(<4 x float> %A, <4 x float> %B) { - call <4 x float> @llvm.spu.si.fcmgt(<4 x float> %A, <4 x float> %B) - %Y = bitcast <4 x float> %1 to <4 x float> - ret <4 x float> %Y + call <4 x float> @llvm.spu.si.fcmgt(<4 x float> %A, <4 x float> %B) + %Y = bitcast <4 x float> %1 to <4 x float> + ret <4 x float> %Y } define <4 x float> @fmatest(<4 x float> %A, <4 x float> %B, <4 x float> %C) { - call <4 x float> @llvm.spu.si.fma(<4 x float> %A, <4 x float> %B, <4 x float> %C) - %Y = bitcast <4 x float> %1 to <4 x float> - ret <4 x float> %Y + call <4 x float> @llvm.spu.si.fma(<4 x float> %A, <4 x float> %B, <4 x float> %C) + %Y = bitcast <4 x float> %1 to <4 x float> + ret <4 x float> %Y } define <4 x float> @fnmstest(<4 x float> %A, <4 x float> %B, <4 x float> %C) { - call <4 x float> @llvm.spu.si.fnms(<4 x float> %A, <4 x float> %B, <4 x float> %C) - %Y = bitcast <4 x float> %1 to <4 x float> - ret <4 x float> %Y + call <4 x float> @llvm.spu.si.fnms(<4 x float> %A, <4 x float> %B, <4 x float> %C) + %Y = bitcast <4 x float> %1 to <4 x float> + ret <4 x float> %Y } define <4 x float> @fmstest(<4 x float> %A, <4 x float> %B, <4 x float> %C) { - call <4 x float> @llvm.spu.si.fms(<4 x float> %A, <4 x float> %B, <4 x float> %C) - %Y = bitcast <4 x float> %1 to <4 x float> - ret <4 x float> %Y + call <4 x float> @llvm.spu.si.fms(<4 x float> %A, <4 x float> %B, <4 x float> %C) + %Y = bitcast <4 x float> %1 to <4 x float> + ret <4 x float> %Y } Modified: llvm/trunk/test/CodeGen/CellSPU/intrinsics_logical.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/intrinsics_logical.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/intrinsics_logical.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/intrinsics_logical.ll Wed Mar 5 17:00:19 2008 @@ -25,9 +25,9 @@ declare <4 x i32> @llvm.spu.si.nor(<4 x i32>, <4 x i32>) define <4 x i32> @andtest(<4 x i32> %A, <4 x i32> %B) { - call <4 x i32> @llvm.spu.si.and(<4 x i32> %A, <4 x i32> %B) - %Y = bitcast <4 x i32> %1 to <4 x i32> - ret <4 x i32> %Y + call <4 x i32> @llvm.spu.si.and(<4 x i32> %A, <4 x i32> %B) + %Y = bitcast <4 x i32> %1 to <4 x i32> + ret <4 x i32> %Y } define <4 x i32> @andctest(<4 x i32> %A, <4 x i32> %B) { @@ -37,13 +37,13 @@ } define <4 x i32> @anditest(<4 x i32> %A) { - call <4 x i32> @llvm.spu.si.andi(<4 x i32> %A, i16 65) - %Y = bitcast <4 x i32> %1 to <4 x i32> - ret <4 x i32> %Y + call <4 x i32> @llvm.spu.si.andi(<4 x i32> %A, i16 65) + %Y = bitcast <4 x i32> %1 to <4 x i32> + ret <4 x i32> %Y } define <8 x i16> @andhitest(<8 x i16> %A) { - call <8 x i16> @llvm.spu.si.andhi(<8 x i16> %A, i16 65) - %Y = bitcast <8 x i16> %1 to <8 x i16> - ret <8 x i16> %Y + call <8 x i16> @llvm.spu.si.andhi(<8 x i16> %A, i16 65) + %Y = bitcast <8 x i16> %1 to <8 x i16> + ret <8 x i16> %Y } Modified: llvm/trunk/test/CodeGen/CellSPU/mul_ops.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/mul_ops.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/mul_ops.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/mul_ops.ll Wed Mar 5 17:00:19 2008 @@ -54,36 +54,36 @@ define i32 @mul_i32_1(i32 %arg1, i32 %arg2) { entry: - %A = mul i32 %arg2, %arg1 - ret i32 %A + %A = mul i32 %arg2, %arg1 + ret i32 %A } define i32 @mul_i32_2(i32 %arg1, i32 %arg2) { entry: - %A = mul i32 %arg1, %arg2 - ret i32 %A + %A = mul i32 %arg1, %arg2 + ret i32 %A } define i16 @mul_i16_1(i16 %arg1, i16 %arg2) { entry: - %A = mul i16 %arg2, %arg1 - ret i16 %A + %A = mul i16 %arg2, %arg1 + ret i16 %A } define i16 @mul_i16_2(i16 %arg1, i16 %arg2) { entry: - %A = mul i16 %arg1, %arg2 - ret i16 %A + %A = mul i16 %arg1, %arg2 + ret i16 %A } define i8 @mul_i8_1(i8 %arg1, i8 %arg2) { entry: - %A = mul i8 %arg2, %arg1 - ret i8 %A + %A = mul i8 %arg2, %arg1 + ret i8 %A } define i8 @mul_i8_2(i8 %arg1, i8 %arg2) { entry: - %A = mul i8 %arg1, %arg2 - ret i8 %A + %A = mul i8 %arg1, %arg2 + ret i8 %A } Modified: llvm/trunk/test/CodeGen/CellSPU/or_ops.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/or_ops.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/or_ops.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/or_ops.ll Wed Mar 5 17:00:19 2008 @@ -39,33 +39,33 @@ } define i32 @or_i32_1(i32 %arg1, i32 %arg2) { - %A = or i32 %arg2, %arg1 - ret i32 %A + %A = or i32 %arg2, %arg1 + ret i32 %A } define i32 @or_i32_2(i32 %arg1, i32 %arg2) { - %A = or i32 %arg1, %arg2 - ret i32 %A + %A = or i32 %arg1, %arg2 + ret i32 %A } define i16 @or_i16_1(i16 %arg1, i16 %arg2) { - %A = or i16 %arg2, %arg1 - ret i16 %A + %A = or i16 %arg2, %arg1 + ret i16 %A } define i16 @or_i16_2(i16 %arg1, i16 %arg2) { - %A = or i16 %arg1, %arg2 - ret i16 %A + %A = or i16 %arg1, %arg2 + ret i16 %A } define i8 @or_i8_1(i8 %arg1, i8 %arg2) { - %A = or i8 %arg2, %arg1 - ret i8 %A + %A = or i8 %arg2, %arg1 + ret i8 %A } define i8 @or_i8_2(i8 %arg1, i8 %arg2) { - %A = or i8 %arg1, %arg2 - ret i8 %A + %A = or i8 %arg1, %arg2 + ret i8 %A } ; ORC instruction generation: @@ -126,57 +126,57 @@ } define i32 @orc_i32_1(i32 %arg1, i32 %arg2) { - %A = xor i32 %arg2, -1 - %B = or i32 %A, %arg1 - ret i32 %B + %A = xor i32 %arg2, -1 + %B = or i32 %A, %arg1 + ret i32 %B } define i32 @orc_i32_2(i32 %arg1, i32 %arg2) { - %A = xor i32 %arg1, -1 - %B = or i32 %A, %arg2 - ret i32 %B + %A = xor i32 %arg1, -1 + %B = or i32 %A, %arg2 + ret i32 %B } define i32 @orc_i32_3(i32 %arg1, i32 %arg2) { - %A = xor i32 %arg2, -1 - %B = or i32 %arg1, %A - ret i32 %B + %A = xor i32 %arg2, -1 + %B = or i32 %arg1, %A + ret i32 %B } define i16 @orc_i16_1(i16 %arg1, i16 %arg2) { - %A = xor i16 %arg2, -1 - %B = or i16 %A, %arg1 - ret i16 %B + %A = xor i16 %arg2, -1 + %B = or i16 %A, %arg1 + ret i16 %B } define i16 @orc_i16_2(i16 %arg1, i16 %arg2) { - %A = xor i16 %arg1, -1 - %B = or i16 %A, %arg2 - ret i16 %B + %A = xor i16 %arg1, -1 + %B = or i16 %A, %arg2 + ret i16 %B } define i16 @orc_i16_3(i16 %arg1, i16 %arg2) { - %A = xor i16 %arg2, -1 - %B = or i16 %arg1, %A - ret i16 %B + %A = xor i16 %arg2, -1 + %B = or i16 %arg1, %A + ret i16 %B } define i8 @orc_i8_1(i8 %arg1, i8 %arg2) { - %A = xor i8 %arg2, -1 - %B = or i8 %A, %arg1 - ret i8 %B + %A = xor i8 %arg2, -1 + %B = or i8 %A, %arg1 + ret i8 %B } define i8 @orc_i8_2(i8 %arg1, i8 %arg2) { - %A = xor i8 %arg1, -1 - %B = or i8 %A, %arg2 - ret i8 %B + %A = xor i8 %arg1, -1 + %B = or i8 %A, %arg2 + ret i8 %B } define i8 @orc_i8_3(i8 %arg1, i8 %arg2) { - %A = xor i8 %arg2, -1 - %B = or i8 %arg1, %A - ret i8 %B + %A = xor i8 %arg2, -1 + %B = or i8 %arg1, %A + ret i8 %B } ; ORI instruction generation (i32 data type): Modified: llvm/trunk/test/CodeGen/CellSPU/rotate_ops.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/rotate_ops.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/rotate_ops.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/rotate_ops.ll Wed Mar 5 17:00:19 2008 @@ -115,45 +115,45 @@ } define i16 @rotli16(i16 %A) { - %B = shl i16 %A, 5 ; [#uses=1] - %C = lshr i16 %A, 11 ; [#uses=1] - %D = or i16 %B, %C ; [#uses=1] - ret i16 %D + %B = shl i16 %A, 5 ; [#uses=1] + %C = lshr i16 %A, 11 ; [#uses=1] + %D = or i16 %B, %C ; [#uses=1] + ret i16 %D } define i16 @rotri16(i16 %A) { - %B = lshr i16 %A, 5 ; [#uses=1] - %C = shl i16 %A, 11 ; [#uses=1] - %D = or i16 %B, %C ; [#uses=1] - ret i16 %D + %B = lshr i16 %A, 5 ; [#uses=1] + %C = shl i16 %A, 11 ; [#uses=1] + %D = or i16 %B, %C ; [#uses=1] + ret i16 %D } define i8 @rotl8(i8 %A, i8 %Amt) { - %B = shl i8 %A, %Amt ; [#uses=1] - %Amt2 = sub i8 8, %Amt ; [#uses=1] - %C = lshr i8 %A, %Amt2 ; [#uses=1] - %D = or i8 %B, %C ; [#uses=1] - ret i8 %D + %B = shl i8 %A, %Amt ; [#uses=1] + %Amt2 = sub i8 8, %Amt ; [#uses=1] + %C = lshr i8 %A, %Amt2 ; [#uses=1] + %D = or i8 %B, %C ; [#uses=1] + ret i8 %D } define i8 @rotr8(i8 %A, i8 %Amt) { - %B = lshr i8 %A, %Amt ; [#uses=1] - %Amt2 = sub i8 8, %Amt ; [#uses=1] - %C = shl i8 %A, %Amt2 ; [#uses=1] - %D = or i8 %B, %C ; [#uses=1] - ret i8 %D + %B = lshr i8 %A, %Amt ; [#uses=1] + %Amt2 = sub i8 8, %Amt ; [#uses=1] + %C = shl i8 %A, %Amt2 ; [#uses=1] + %D = or i8 %B, %C ; [#uses=1] + ret i8 %D } define i8 @rotli8(i8 %A) { - %B = shl i8 %A, 5 ; [#uses=1] - %C = lshr i8 %A, 3 ; [#uses=1] - %D = or i8 %B, %C ; [#uses=1] - ret i8 %D + %B = shl i8 %A, 5 ; [#uses=1] + %C = lshr i8 %A, 3 ; [#uses=1] + %D = or i8 %B, %C ; [#uses=1] + ret i8 %D } define i8 @rotri8(i8 %A) { - %B = lshr i8 %A, 5 ; [#uses=1] - %C = shl i8 %A, 3 ; [#uses=1] - %D = or i8 %B, %C ; [#uses=1] - ret i8 %D + %B = lshr i8 %A, 5 ; [#uses=1] + %C = shl i8 %A, 3 ; [#uses=1] + %D = or i8 %B, %C ; [#uses=1] + ret i8 %D } Modified: llvm/trunk/test/CodeGen/CellSPU/select_bits.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/select_bits.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/select_bits.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/select_bits.ll Wed Mar 5 17:00:19 2008 @@ -1,296 +1,569 @@ ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s -; RUN: grep selb %t1.s | count 160 -; RUN: grep and %t1.s | count 2 -; RUN: grep xsbh %t1.s | count 1 -; RUN: grep xshw %t1.s | count 2 +; RUN: grep selb %t1.s | count 280 + target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" -define <16 x i8> @selb_v16i8_1(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { - %A = xor <16 x i8> %arg3, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1 > - %B = and <16 x i8> %A, %arg1 ; <<16 x i8>> [#uses=1] - %C = and <16 x i8> %arg2, %arg3 ; <<16 x i8>> [#uses=1] - %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] - ret <16 x i8> %D -} - -define <16 x i8> @selb_v16i8_11(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { - %A = xor <16 x i8> %arg3, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1 > - %B = and <16 x i8> %arg1, %A ; <<16 x i8>> [#uses=1] - %C = and <16 x i8> %arg3, %arg2 ; <<16 x i8>> [#uses=1] - %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] - ret <16 x i8> %D -} - -define <16 x i8> @selb_v16i8_12(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { - %A = xor <16 x i8> %arg3, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1 > - %B = and <16 x i8> %arg1, %A ; <<16 x i8>> [#uses=1] - %C = and <16 x i8> %arg2, %arg3 ; <<16 x i8>> [#uses=1] - %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] - ret <16 x i8> %D -} - -define <16 x i8> @selb_v16i8_13(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { - %A = xor <16 x i8> %arg3, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1 > - %B = and <16 x i8> %A, %arg1 ; <<16 x i8>> [#uses=1] - %C = and <16 x i8> %arg2, %arg3 ; <<16 x i8>> [#uses=1] - %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] - ret <16 x i8> %D -} - -define <16 x i8> @selb_v16i8_2(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { - %A = xor <16 x i8> %arg1, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1 > - %B = and <16 x i8> %A, %arg2 ; <<16 x i8>> [#uses=1] - %C = and <16 x i8> %arg3, %arg1 ; <<16 x i8>> [#uses=1] - %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] - ret <16 x i8> %D -} - -define <16 x i8> @selb_v16i8_21(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { - %A = xor <16 x i8> %arg1, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1 > - %B = and <16 x i8> %arg2, %A ; <<16 x i8>> [#uses=1] - %C = and <16 x i8> %arg3, %arg1 ; <<16 x i8>> [#uses=1] - %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] - ret <16 x i8> %D -} - -define <16 x i8> @selb_v16i8_3(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { - %A = xor <16 x i8> %arg2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1 > - %B = and <16 x i8> %A, %arg1 ; <<16 x i8>> [#uses=1] - %C = and <16 x i8> %arg3, %arg2 ; <<16 x i8>> [#uses=1] - %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] - ret <16 x i8> %D -} - -define <16 x i8> @selb_v16i8_4(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { - %C = and <16 x i8> %arg3, %arg2 ; <<16 x i8>> [#uses=1] - %A = xor <16 x i8> %arg2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1 > - %B = and <16 x i8> %A, %arg1 ; <<16 x i8>> [#uses=1] - %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] - ret <16 x i8> %D -} - -define <16 x i8> @selb_v16i8_41(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { - %C = and <16 x i8> %arg2, %arg3 ; <<16 x i8>> [#uses=1] - %A = xor <16 x i8> %arg2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1 > - %B = and <16 x i8> %arg1, %A ; <<16 x i8>> [#uses=1] - %D = or <16 x i8> %C, %B ; <<16 x i8>> [#uses=1] - ret <16 x i8> %D -} - -define <16 x i8> @selb_v16i8_42(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { - %C = and <16 x i8> %arg2, %arg3 ; <<16 x i8>> [#uses=1] - %A = xor <16 x i8> %arg2, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1 > - %B = and <16 x i8> %A, %arg1 ; <<16 x i8>> [#uses=1] - %D = or <16 x i8> %C, %B ; <<16 x i8>> [#uses=1] - ret <16 x i8> %D -} - -define <16 x i8> @selb_v16i8_5(<16 x i8> %arg1, <16 x i8> %arg2, <16 x i8> %arg3) { - %C = and <16 x i8> %arg2, %arg1 ; <<16 x i8>> [#uses=1] - %A = xor <16 x i8> %arg1, < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, - i8 -1, i8 -1, i8 -1, i8 -1 > - %B = and <16 x i8> %A, %arg3 ; <<16 x i8>> [#uses=1] - %D = or <16 x i8> %B, %C ; <<16 x i8>> [#uses=1] - ret <16 x i8> %D -} - -define <8 x i16> @selb_v8i16_1(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { - %A = xor <8 x i16> %arg3, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, - i16 -1, i16 -1 > - %B = and <8 x i16> %A, %arg1 ; <<8 x i16>> [#uses=1] - %C = and <8 x i16> %arg2, %arg3 ; <<8 x i16>> [#uses=1] - %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] - ret <8 x i16> %D -} - -define <8 x i16> @selb_v8i16_11(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { - %A = xor <8 x i16> %arg3, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, - i16 -1, i16 -1 > - %B = and <8 x i16> %arg1, %A ; <<8 x i16>> [#uses=1] - %C = and <8 x i16> %arg3, %arg2 ; <<8 x i16>> [#uses=1] - %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] - ret <8 x i16> %D -} - -define <8 x i16> @selb_v8i16_12(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { - %A = xor <8 x i16> %arg3, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, - i16 -1, i16 -1 > - %B = and <8 x i16> %arg1, %A ; <<8 x i16>> [#uses=1] - %C = and <8 x i16> %arg2, %arg3 ; <<8 x i16>> [#uses=1] - %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] - ret <8 x i16> %D -} - -define <8 x i16> @selb_v8i16_13(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { - %A = xor <8 x i16> %arg3, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, - i16 -1, i16 -1 > - %B = and <8 x i16> %A, %arg1 ; <<8 x i16>> [#uses=1] - %C = and <8 x i16> %arg2, %arg3 ; <<8 x i16>> [#uses=1] - %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] - ret <8 x i16> %D -} - -define <8 x i16> @selb_v8i16_2(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { - %A = xor <8 x i16> %arg1, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, - i16 -1, i16 -1 > - %B = and <8 x i16> %A, %arg2 ; <<8 x i16>> [#uses=1] - %C = and <8 x i16> %arg3, %arg1 ; <<8 x i16>> [#uses=1] - %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] - ret <8 x i16> %D -} - -define <8 x i16> @selb_v8i16_21(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { - %A = xor <8 x i16> %arg1, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, - i16 -1, i16 -1 > - %B = and <8 x i16> %arg2, %A ; <<8 x i16>> [#uses=1] - %C = and <8 x i16> %arg3, %arg1 ; <<8 x i16>> [#uses=1] - %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] - ret <8 x i16> %D -} - -define <8 x i16> @selb_v8i16_3(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { - %A = xor <8 x i16> %arg2, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, - i16 -1, i16 -1 > - %B = and <8 x i16> %A, %arg1 ; <<8 x i16>> [#uses=1] - %C = and <8 x i16> %arg3, %arg2 ; <<8 x i16>> [#uses=1] - %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] - ret <8 x i16> %D -} - -define <8 x i16> @selb_v8i16_4(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { - %C = and <8 x i16> %arg3, %arg2 ; <<8 x i16>> [#uses=1] - %A = xor <8 x i16> %arg2, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, - i16 -1, i16 -1 > - %B = and <8 x i16> %A, %arg1 ; <<8 x i16>> [#uses=1] - %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] - ret <8 x i16> %D -} - -define <8 x i16> @selb_v8i16_41(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { - %C = and <8 x i16> %arg2, %arg3 ; <<8 x i16>> [#uses=1] - %A = xor <8 x i16> %arg2, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, - i16 -1, i16 -1 > - %B = and <8 x i16> %arg1, %A ; <<8 x i16>> [#uses=1] - %D = or <8 x i16> %C, %B ; <<8 x i16>> [#uses=1] - ret <8 x i16> %D -} - -define <8 x i16> @selb_v8i16_42(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { - %C = and <8 x i16> %arg2, %arg3 ; <<8 x i16>> [#uses=1] - %A = xor <8 x i16> %arg2, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, - i16 -1, i16 -1 > - %B = and <8 x i16> %A, %arg1 ; <<8 x i16>> [#uses=1] - %D = or <8 x i16> %C, %B ; <<8 x i16>> [#uses=1] - ret <8 x i16> %D -} - -define <8 x i16> @selb_v8i16_5(<8 x i16> %arg1, <8 x i16> %arg2, <8 x i16> %arg3) { - %C = and <8 x i16> %arg2, %arg1 ; <<8 x i16>> [#uses=1] - %A = xor <8 x i16> %arg1, < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, - i16 -1, i16 -1 > - %B = and <8 x i16> %A, %arg3 ; <<8 x i16>> [#uses=1] - %D = or <8 x i16> %B, %C ; <<8 x i16>> [#uses=1] - ret <8 x i16> %D -} - -define <4 x i32> @selb_v4i32_1(<4 x i32> %arg1, <4 x i32> %arg2, <4 x i32> %arg3) { - %tmpnot = xor <4 x i32> %arg3, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] - %tmp2 = and <4 x i32> %tmpnot, %arg1 ; <<4 x i32>> [#uses=1] - %tmp5 = and <4 x i32> %arg2, %arg3 ; <<4 x i32>> [#uses=1] - %tmp6 = or <4 x i32> %tmp2, %tmp5 ; <<4 x i32>> [#uses=1] - ret <4 x i32> %tmp6 -} - -define <4 x i32> @selb_v4i32_2(<4 x i32> %arg1, <4 x i32> %arg2, <4 x i32> %arg3) { - %tmpnot = xor <4 x i32> %arg3, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] - %tmp2 = and <4 x i32> %tmpnot, %arg1 ; <<4 x i32>> [#uses=1] - %tmp5 = and <4 x i32> %arg2, %arg3 ; <<4 x i32>> [#uses=1] - %tmp6 = or <4 x i32> %tmp2, %tmp5 ; <<4 x i32>> [#uses=1] - ret <4 x i32> %tmp6 -} - -define <4 x i32> @selb_v4i32_3(<4 x i32> %arg1, <4 x i32> %arg2, <4 x i32> %arg3) { - %tmpnot = xor <4 x i32> %arg3, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] - %tmp2 = and <4 x i32> %tmpnot, %arg1 ; <<4 x i32>> [#uses=1] - %tmp5 = and <4 x i32> %arg3, %arg2 ; <<4 x i32>> [#uses=1] - %tmp6 = or <4 x i32> %tmp2, %tmp5 ; <<4 x i32>> [#uses=1] - ret <4 x i32> %tmp6 -} - -define <4 x i32> @selb_v4i32_4(<4 x i32> %arg1, <4 x i32> %arg2, <4 x i32> %arg3) { - %tmp2 = and <4 x i32> %arg3, %arg2 ; <<4 x i32>> [#uses=1] - %tmp3not = xor <4 x i32> %arg3, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] - %tmp5 = and <4 x i32> %tmp3not, %arg1 ; <<4 x i32>> [#uses=1] - %tmp6 = or <4 x i32> %tmp2, %tmp5 ; <<4 x i32>> [#uses=1] - ret <4 x i32> %tmp6 -} - -define <4 x i32> @selb_v4i32_5(<4 x i32> %arg1, <4 x i32> %arg2, <4 x i32> %arg3) { - %tmp2 = and <4 x i32> %arg3, %arg2 ; <<4 x i32>> [#uses=1] - %tmp3not = xor <4 x i32> %arg3, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] - %tmp5 = and <4 x i32> %tmp3not, %arg1 ; <<4 x i32>> [#uses=1] - %tmp6 = or <4 x i32> %tmp2, %tmp5 ; <<4 x i32>> [#uses=1] - ret <4 x i32> %tmp6 -} - -define i32 @selb_i32(i32 %arg1, i32 %arg2, i32 %arg3) { - %tmp1not = xor i32 %arg3, -1 ; [#uses=1] - %tmp3 = and i32 %tmp1not, %arg1 ; [#uses=1] - %tmp6 = and i32 %arg3, %arg2 ; [#uses=1] - %tmp7 = or i32 %tmp3, %tmp6 ; [#uses=1] - ret i32 %tmp7 -} - -define i16 @selb_i16(i16 signext %arg1, i16 signext %arg2, i16 signext %arg3) signext { - %tmp3 = and i16 %arg3, %arg1 ; [#uses=1] - %tmp4not = xor i16 %arg3, -1 ; [#uses=1] - %tmp6 = and i16 %tmp4not, %arg2 ; [#uses=1] - %retval1011 = or i16 %tmp3, %tmp6 ; [#uses=1] - ret i16 %retval1011 -} - -define i16 @selb_i16u(i16 zeroext %arg1, i16 zeroext %arg2, i16 zeroext %arg3) zeroext { - %tmp3 = and i16 %arg3, %arg1 ; [#uses=1] - %tmp4not = xor i16 %arg3, -1 ; [#uses=1] - %tmp6 = and i16 %tmp4not, %arg2 ; [#uses=1] - %retval1011 = or i16 %tmp3, %tmp6 ; [#uses=1] - ret i16 %retval1011 -} - -define i8 @selb_i8u(i8 zeroext %arg1, i8 zeroext %arg2, i8 zeroext %arg3) zeroext { - %tmp3 = and i8 %arg3, %arg1 ; [#uses=1] - %tmp4not = xor i8 %arg3, -1 ; [#uses=1] - %tmp6 = and i8 %tmp4not, %arg2 ; [#uses=1] - %retval1011 = or i8 %tmp3, %tmp6 ; [#uses=1] - ret i8 %retval1011 -} - -define i8 @selb_i8(i8 signext %arg1, i8 signext %arg2, i8 signext %arg3) signext { - %tmp3 = and i8 %arg3, %arg1 ; [#uses=1] - %tmp4not = xor i8 %arg3, -1 ; [#uses=1] - %tmp6 = and i8 %tmp4not, %arg2 ; [#uses=1] - %retval1011 = or i8 %tmp3, %tmp6 ; [#uses=1] - ret i8 %retval1011 +;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~ +; v2i64 +;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~ + +; (or (and rC, rB), (and (not rC), rA)) +define <2 x i64> @selb_v2i64_01(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) { + %C = and <2 x i64> %rC, %rB + %A = xor <2 x i64> %rC, < i64 -1, i64 -1 > + %B = and <2 x i64> %A, %rA + %D = or <2 x i64> %C, %B + ret <2 x i64> %D +} + +; (or (and rB, rC), (and (not rC), rA)) +define <2 x i64> @selb_v2i64_02(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) { + %C = and <2 x i64> %rB, %rC + %A = xor <2 x i64> %rC, < i64 -1, i64 -1 > + %B = and <2 x i64> %A, %rA + %D = or <2 x i64> %C, %B + ret <2 x i64> %D +} + +; (or (and (not rC), rA), (and rB, rC)) +define <2 x i64> @selb_v2i64_03(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) { + %A = xor <2 x i64> %rC, < i64 -1, i64 -1 > + %B = and <2 x i64> %A, %rA + %C = and <2 x i64> %rB, %rC + %D = or <2 x i64> %C, %B + ret <2 x i64> %D +} + +; (or (and (not rC), rA), (and rC, rB)) +define <2 x i64> @selb_v2i64_04(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) { + %A = xor <2 x i64> %rC, < i64 -1, i64 -1 > + %B = and <2 x i64> %A, %rA + %C = and <2 x i64> %rC, %rB + %D = or <2 x i64> %C, %B + ret <2 x i64> %D +} + +; (or (and rC, rB), (and rA, (not rC))) +define <2 x i64> @selb_v2i64_05(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) { + %C = and <2 x i64> %rC, %rB + %A = xor <2 x i64> %rC, < i64 -1, i64 -1 > + %B = and <2 x i64> %rA, %A + %D = or <2 x i64> %C, %B + ret <2 x i64> %D +} + +; (or (and rB, rC), (and rA, (not rC))) +define <2 x i64> @selb_v2i64_06(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) { + %C = and <2 x i64> %rB, %rC + %A = xor <2 x i64> %rC, < i64 -1, i64 -1 > + %B = and <2 x i64> %rA, %A + %D = or <2 x i64> %C, %B + ret <2 x i64> %D +} + +; (or (and rA, (not rC)), (and rB, rC)) +define <2 x i64> @selb_v2i64_07(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) { + %A = xor <2 x i64> %rC, < i64 -1, i64 -1 > + %B = and <2 x i64> %rA, %A + %C = and <2 x i64> %rB, %rC + %D = or <2 x i64> %C, %B + ret <2 x i64> %D +} + +; (or (and rA, (not rC)), (and rC, rB)) +define <2 x i64> @selb_v2i64_08(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) { + %A = xor <2 x i64> %rC, < i64 -1, i64 -1 > + %B = and <2 x i64> %rA, %A + %C = and <2 x i64> %rC, %rB + %D = or <2 x i64> %C, %B + ret <2 x i64> %D +} + +;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~ +; v4i32 +;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~ + +; (or (and rC, rB), (and (not rC), rA)) +define <4 x i32> @selb_v4i32_01(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) { + %C = and <4 x i32> %rC, %rB + %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1 > + %B = and <4 x i32> %A, %rA + %D = or <4 x i32> %C, %B + ret <4 x i32> %D +} + +; (or (and rB, rC), (and (not rC), rA)) +define <4 x i32> @selb_v4i32_02(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) { + %C = and <4 x i32> %rB, %rC + %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1 > + %B = and <4 x i32> %A, %rA + %D = or <4 x i32> %C, %B + ret <4 x i32> %D +} + +; (or (and (not rC), rA), (and rB, rC)) +define <4 x i32> @selb_v4i32_03(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) { + %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1 > + %B = and <4 x i32> %A, %rA + %C = and <4 x i32> %rB, %rC + %D = or <4 x i32> %C, %B + ret <4 x i32> %D +} + +; (or (and (not rC), rA), (and rC, rB)) +define <4 x i32> @selb_v4i32_04(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) { + %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1> + %B = and <4 x i32> %A, %rA + %C = and <4 x i32> %rC, %rB + %D = or <4 x i32> %C, %B + ret <4 x i32> %D +} + +; (or (and rC, rB), (and rA, (not rC))) +define <4 x i32> @selb_v4i32_05(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) { + %C = and <4 x i32> %rC, %rB + %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1> + %B = and <4 x i32> %rA, %A + %D = or <4 x i32> %C, %B + ret <4 x i32> %D +} + +; (or (and rB, rC), (and rA, (not rC))) +define <4 x i32> @selb_v4i32_06(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) { + %C = and <4 x i32> %rB, %rC + %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1> + %B = and <4 x i32> %rA, %A + %D = or <4 x i32> %C, %B + ret <4 x i32> %D +} + +; (or (and rA, (not rC)), (and rB, rC)) +define <4 x i32> @selb_v4i32_07(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) { + %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1> + %B = and <4 x i32> %rA, %A + %C = and <4 x i32> %rB, %rC + %D = or <4 x i32> %C, %B + ret <4 x i32> %D +} + +; (or (and rA, (not rC)), (and rC, rB)) +define <4 x i32> @selb_v4i32_08(<4 x i32> %rA, <4 x i32> %rB, <4 x i32> %rC) { + %A = xor <4 x i32> %rC, < i32 -1, i32 -1, i32 -1, i32 -1> + %B = and <4 x i32> %rA, %A + %C = and <4 x i32> %rC, %rB + %D = or <4 x i32> %C, %B + ret <4 x i32> %D +} + +;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~ +; v8i16 +;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~ + +; (or (and rC, rB), (and (not rC), rA)) +define <8 x i16> @selb_v8i16_01(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) { + %C = and <8 x i16> %rC, %rB + %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1, i16 -1, i16 -1 > + %B = and <8 x i16> %A, %rA + %D = or <8 x i16> %C, %B + ret <8 x i16> %D +} + +; (or (and rB, rC), (and (not rC), rA)) +define <8 x i16> @selb_v8i16_02(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) { + %C = and <8 x i16> %rB, %rC + %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1, i16 -1, i16 -1 > + %B = and <8 x i16> %A, %rA + %D = or <8 x i16> %C, %B + ret <8 x i16> %D +} + +; (or (and (not rC), rA), (and rB, rC)) +define <8 x i16> @selb_v8i16_03(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) { + %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1, i16 -1, i16 -1 > + %B = and <8 x i16> %A, %rA + %C = and <8 x i16> %rB, %rC + %D = or <8 x i16> %C, %B + ret <8 x i16> %D +} + +; (or (and (not rC), rA), (and rC, rB)) +define <8 x i16> @selb_v8i16_04(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) { + %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1, i16 -1, i16 -1 > + %B = and <8 x i16> %A, %rA + %C = and <8 x i16> %rC, %rB + %D = or <8 x i16> %C, %B + ret <8 x i16> %D +} + +; (or (and rC, rB), (and rA, (not rC))) +define <8 x i16> @selb_v8i16_05(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) { + %C = and <8 x i16> %rC, %rB + %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1, i16 -1, i16 -1 > + %B = and <8 x i16> %rA, %A + %D = or <8 x i16> %C, %B + ret <8 x i16> %D +} + +; (or (and rB, rC), (and rA, (not rC))) +define <8 x i16> @selb_v8i16_06(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) { + %C = and <8 x i16> %rB, %rC + %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1, i16 -1, i16 -1 > + %B = and <8 x i16> %rA, %A + %D = or <8 x i16> %C, %B + ret <8 x i16> %D +} + +; (or (and rA, (not rC)), (and rB, rC)) +define <8 x i16> @selb_v8i16_07(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) { + %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1, i16 -1, i16 -1 > + %B = and <8 x i16> %rA, %A + %C = and <8 x i16> %rB, %rC + %D = or <8 x i16> %C, %B + ret <8 x i16> %D +} + +; (or (and rA, (not rC)), (and rC, rB)) +define <8 x i16> @selb_v8i16_08(<8 x i16> %rA, <8 x i16> %rB, <8 x i16> %rC) { + %A = xor <8 x i16> %rC, < i16 -1, i16 -1, i16 -1, i16 -1, + i16 -1, i16 -1, i16 -1, i16 -1 > + %B = and <8 x i16> %rA, %A + %C = and <8 x i16> %rC, %rB + %D = or <8 x i16> %C, %B + ret <8 x i16> %D +} + +;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~ +; v16i8 +;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~ + +; (or (and rC, rB), (and (not rC), rA)) +define <16 x i8> @selb_v16i8_01(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) { + %C = and <16 x i8> %rC, %rB + %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %A, %rA + %D = or <16 x i8> %C, %B + ret <16 x i8> %D +} + +; (or (and rB, rC), (and (not rC), rA)) +define <16 x i8> @selb_v16i8_02(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) { + %C = and <16 x i8> %rB, %rC + %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %A, %rA + %D = or <16 x i8> %C, %B + ret <16 x i8> %D +} + +; (or (and (not rC), rA), (and rB, rC)) +define <16 x i8> @selb_v16i8_03(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) { + %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %A, %rA + %C = and <16 x i8> %rB, %rC + %D = or <16 x i8> %C, %B + ret <16 x i8> %D +} + +; (or (and (not rC), rA), (and rC, rB)) +define <16 x i8> @selb_v16i8_04(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) { + %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %A, %rA + %C = and <16 x i8> %rC, %rB + %D = or <16 x i8> %C, %B + ret <16 x i8> %D +} + +; (or (and rC, rB), (and rA, (not rC))) +define <16 x i8> @selb_v16i8_05(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) { + %C = and <16 x i8> %rC, %rB + %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %rA, %A + %D = or <16 x i8> %C, %B + ret <16 x i8> %D +} + +; (or (and rB, rC), (and rA, (not rC))) +define <16 x i8> @selb_v16i8_06(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) { + %C = and <16 x i8> %rB, %rC + %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %rA, %A + %D = or <16 x i8> %C, %B + ret <16 x i8> %D +} + +; (or (and rA, (not rC)), (and rB, rC)) +define <16 x i8> @selb_v16i8_07(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) { + %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %rA, %A + %C = and <16 x i8> %rB, %rC + %D = or <16 x i8> %C, %B + ret <16 x i8> %D +} + +; (or (and rA, (not rC)), (and rC, rB)) +define <16 x i8> @selb_v16i8_08(<16 x i8> %rA, <16 x i8> %rB, <16 x i8> %rC) { + %A = xor <16 x i8> %rC, < i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1, + i8 -1, i8 -1, i8 -1, i8 -1 > + %B = and <16 x i8> %rA, %A + %C = and <16 x i8> %rC, %rB + %D = or <16 x i8> %C, %B + ret <16 x i8> %D +} + +;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~ +; i32 +;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~ + +; (or (and rC, rB), (and (not rC), rA)) +define i32 @selb_i32_01(i32 %rA, i32 %rB, i32 %rC) { + %C = and i32 %rC, %rB + %A = xor i32 %rC, -1 + %B = and i32 %A, %rA + %D = or i32 %C, %B + ret i32 %D +} + +; (or (and rB, rC), (and (not rC), rA)) +define i32 @selb_i32_02(i32 %rA, i32 %rB, i32 %rC) { + %C = and i32 %rB, %rC + %A = xor i32 %rC, -1 + %B = and i32 %A, %rA + %D = or i32 %C, %B + ret i32 %D +} + +; (or (and (not rC), rA), (and rB, rC)) +define i32 @selb_i32_03(i32 %rA, i32 %rB, i32 %rC) { + %A = xor i32 %rC, -1 + %B = and i32 %A, %rA + %C = and i32 %rB, %rC + %D = or i32 %C, %B + ret i32 %D +} + +; (or (and (not rC), rA), (and rC, rB)) +define i32 @selb_i32_04(i32 %rA, i32 %rB, i32 %rC) { + %A = xor i32 %rC, -1 + %B = and i32 %A, %rA + %C = and i32 %rC, %rB + %D = or i32 %C, %B + ret i32 %D +} + +; (or (and rC, rB), (and rA, (not rC))) +define i32 @selb_i32_05(i32 %rA, i32 %rB, i32 %rC) { + %C = and i32 %rC, %rB + %A = xor i32 %rC, -1 + %B = and i32 %rA, %A + %D = or i32 %C, %B + ret i32 %D +} + +; (or (and rB, rC), (and rA, (not rC))) +define i32 @selb_i32_06(i32 %rA, i32 %rB, i32 %rC) { + %C = and i32 %rB, %rC + %A = xor i32 %rC, -1 + %B = and i32 %rA, %A + %D = or i32 %C, %B + ret i32 %D +} + +; (or (and rA, (not rC)), (and rB, rC)) +define i32 @selb_i32_07(i32 %rA, i32 %rB, i32 %rC) { + %A = xor i32 %rC, -1 + %B = and i32 %rA, %A + %C = and i32 %rB, %rC + %D = or i32 %C, %B + ret i32 %D +} + +; (or (and rA, (not rC)), (and rC, rB)) +define i32 @selb_i32_08(i32 %rA, i32 %rB, i32 %rC) { + %A = xor i32 %rC, -1 + %B = and i32 %rA, %A + %C = and i32 %rC, %rB + %D = or i32 %C, %B + ret i32 %D +} + +;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~ +; i16 +;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~ + +; (or (and rC, rB), (and (not rC), rA)) +define i16 @selb_i16_01(i16 %rA, i16 %rB, i16 %rC) { + %C = and i16 %rC, %rB + %A = xor i16 %rC, -1 + %B = and i16 %A, %rA + %D = or i16 %C, %B + ret i16 %D +} + +; (or (and rB, rC), (and (not rC), rA)) +define i16 @selb_i16_02(i16 %rA, i16 %rB, i16 %rC) { + %C = and i16 %rB, %rC + %A = xor i16 %rC, -1 + %B = and i16 %A, %rA + %D = or i16 %C, %B + ret i16 %D +} + +; (or (and (not rC), rA), (and rB, rC)) +define i16 @selb_i16_03(i16 %rA, i16 %rB, i16 %rC) { + %A = xor i16 %rC, -1 + %B = and i16 %A, %rA + %C = and i16 %rB, %rC + %D = or i16 %C, %B + ret i16 %D +} + +; (or (and (not rC), rA), (and rC, rB)) +define i16 @selb_i16_04(i16 %rA, i16 %rB, i16 %rC) { + %A = xor i16 %rC, -1 + %B = and i16 %A, %rA + %C = and i16 %rC, %rB + %D = or i16 %C, %B + ret i16 %D +} + +; (or (and rC, rB), (and rA, (not rC))) +define i16 @selb_i16_05(i16 %rA, i16 %rB, i16 %rC) { + %C = and i16 %rC, %rB + %A = xor i16 %rC, -1 + %B = and i16 %rA, %A + %D = or i16 %C, %B + ret i16 %D +} + +; (or (and rB, rC), (and rA, (not rC))) +define i16 @selb_i16_06(i16 %rA, i16 %rB, i16 %rC) { + %C = and i16 %rB, %rC + %A = xor i16 %rC, -1 + %B = and i16 %rA, %A + %D = or i16 %C, %B + ret i16 %D +} + +; (or (and rA, (not rC)), (and rB, rC)) +define i16 @selb_i16_07(i16 %rA, i16 %rB, i16 %rC) { + %A = xor i16 %rC, -1 + %B = and i16 %rA, %A + %C = and i16 %rB, %rC + %D = or i16 %C, %B + ret i16 %D +} + +; (or (and rA, (not rC)), (and rC, rB)) +define i16 @selb_i16_08(i16 %rA, i16 %rB, i16 %rC) { + %A = xor i16 %rC, -1 + %B = and i16 %rA, %A + %C = and i16 %rC, %rB + %D = or i16 %C, %B + ret i16 %D +} + +;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~ +; i8 +;-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~ + +; (or (and rC, rB), (and (not rC), rA)) +define i8 @selb_i8_01(i8 %rA, i8 %rB, i8 %rC) { + %C = and i8 %rC, %rB + %A = xor i8 %rC, -1 + %B = and i8 %A, %rA + %D = or i8 %C, %B + ret i8 %D +} + +; (or (and rB, rC), (and (not rC), rA)) +define i8 @selb_i8_02(i8 %rA, i8 %rB, i8 %rC) { + %C = and i8 %rB, %rC + %A = xor i8 %rC, -1 + %B = and i8 %A, %rA + %D = or i8 %C, %B + ret i8 %D +} + +; (or (and (not rC), rA), (and rB, rC)) +define i8 @selb_i8_03(i8 %rA, i8 %rB, i8 %rC) { + %A = xor i8 %rC, -1 + %B = and i8 %A, %rA + %C = and i8 %rB, %rC + %D = or i8 %C, %B + ret i8 %D +} + +; (or (and (not rC), rA), (and rC, rB)) +define i8 @selb_i8_04(i8 %rA, i8 %rB, i8 %rC) { + %A = xor i8 %rC, -1 + %B = and i8 %A, %rA + %C = and i8 %rC, %rB + %D = or i8 %C, %B + ret i8 %D +} + +; (or (and rC, rB), (and rA, (not rC))) +define i8 @selb_i8_05(i8 %rA, i8 %rB, i8 %rC) { + %C = and i8 %rC, %rB + %A = xor i8 %rC, -1 + %B = and i8 %rA, %A + %D = or i8 %C, %B + ret i8 %D +} + +; (or (and rB, rC), (and rA, (not rC))) +define i8 @selb_i8_06(i8 %rA, i8 %rB, i8 %rC) { + %C = and i8 %rB, %rC + %A = xor i8 %rC, -1 + %B = and i8 %rA, %A + %D = or i8 %C, %B + ret i8 %D +} + +; (or (and rA, (not rC)), (and rB, rC)) +define i8 @selb_i8_07(i8 %rA, i8 %rB, i8 %rC) { + %A = xor i8 %rC, -1 + %B = and i8 %rA, %A + %C = and i8 %rB, %rC + %D = or i8 %C, %B + ret i8 %D +} + +; (or (and rA, (not rC)), (and rC, rB)) +define i8 @selb_i8_08(i8 %rA, i8 %rB, i8 %rC) { + %A = xor i8 %rC, -1 + %B = and i8 %rA, %A + %C = and i8 %rC, %rB + %D = or i8 %C, %B + ret i8 %D } Modified: llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll Wed Mar 5 17:00:19 2008 @@ -15,198 +15,198 @@ ; to a 32-bit type: define i16 @shlh_i16_1(i16 %arg1, i16 %arg2) { - %A = shl i16 %arg1, %arg2 - ret i16 %A + %A = shl i16 %arg1, %arg2 + ret i16 %A } define i16 @shlh_i16_2(i16 %arg1, i16 %arg2) { - %A = shl i16 %arg2, %arg1 - ret i16 %A + %A = shl i16 %arg2, %arg1 + ret i16 %A } define i16 @shlh_i16_3(i16 signext %arg1, i16 signext %arg2) signext { - %A = shl i16 %arg1, %arg2 - ret i16 %A + %A = shl i16 %arg1, %arg2 + ret i16 %A } define i16 @shlh_i16_4(i16 signext %arg1, i16 signext %arg2) signext { - %A = shl i16 %arg2, %arg1 - ret i16 %A + %A = shl i16 %arg2, %arg1 + ret i16 %A } define i16 @shlh_i16_5(i16 zeroext %arg1, i16 zeroext %arg2) zeroext { - %A = shl i16 %arg1, %arg2 - ret i16 %A + %A = shl i16 %arg1, %arg2 + ret i16 %A } define i16 @shlh_i16_6(i16 zeroext %arg1, i16 zeroext %arg2) zeroext { - %A = shl i16 %arg2, %arg1 - ret i16 %A + %A = shl i16 %arg2, %arg1 + ret i16 %A } ; Shift left i16 with immediate: define i16 @shlhi_i16_1(i16 %arg1) { - %A = shl i16 %arg1, 12 - ret i16 %A + %A = shl i16 %arg1, 12 + ret i16 %A } ; Should not generate anything other than the return, arg1 << 0 = arg1 define i16 @shlhi_i16_2(i16 %arg1) { - %A = shl i16 %arg1, 0 - ret i16 %A + %A = shl i16 %arg1, 0 + ret i16 %A } define i16 @shlhi_i16_3(i16 %arg1) { - %A = shl i16 16383, %arg1 - ret i16 %A + %A = shl i16 16383, %arg1 + ret i16 %A } ; Should generate 0, 0 << arg1 = 0 define i16 @shlhi_i16_4(i16 %arg1) { - %A = shl i16 0, %arg1 - ret i16 %A + %A = shl i16 0, %arg1 + ret i16 %A } define i16 @shlhi_i16_5(i16 signext %arg1) signext { - %A = shl i16 %arg1, 12 - ret i16 %A + %A = shl i16 %arg1, 12 + ret i16 %A } ; Should not generate anything other than the return, arg1 << 0 = arg1 define i16 @shlhi_i16_6(i16 signext %arg1) signext { - %A = shl i16 %arg1, 0 - ret i16 %A + %A = shl i16 %arg1, 0 + ret i16 %A } define i16 @shlhi_i16_7(i16 signext %arg1) signext { - %A = shl i16 16383, %arg1 - ret i16 %A + %A = shl i16 16383, %arg1 + ret i16 %A } ; Should generate 0, 0 << arg1 = 0 define i16 @shlhi_i16_8(i16 signext %arg1) signext { - %A = shl i16 0, %arg1 - ret i16 %A + %A = shl i16 0, %arg1 + ret i16 %A } define i16 @shlhi_i16_9(i16 zeroext %arg1) zeroext { - %A = shl i16 %arg1, 12 - ret i16 %A + %A = shl i16 %arg1, 12 + ret i16 %A } ; Should not generate anything other than the return, arg1 << 0 = arg1 define i16 @shlhi_i16_10(i16 zeroext %arg1) zeroext { - %A = shl i16 %arg1, 0 - ret i16 %A + %A = shl i16 %arg1, 0 + ret i16 %A } define i16 @shlhi_i16_11(i16 zeroext %arg1) zeroext { - %A = shl i16 16383, %arg1 - ret i16 %A + %A = shl i16 16383, %arg1 + ret i16 %A } ; Should generate 0, 0 << arg1 = 0 define i16 @shlhi_i16_12(i16 zeroext %arg1) zeroext { - %A = shl i16 0, %arg1 - ret i16 %A + %A = shl i16 0, %arg1 + ret i16 %A } ; Shift left i32 via register, note that the second operand to shl is promoted ; to a 32-bit type: define i32 @shl_i32_1(i32 %arg1, i32 %arg2) { - %A = shl i32 %arg1, %arg2 - ret i32 %A + %A = shl i32 %arg1, %arg2 + ret i32 %A } define i32 @shl_i32_2(i32 %arg1, i32 %arg2) { - %A = shl i32 %arg2, %arg1 - ret i32 %A + %A = shl i32 %arg2, %arg1 + ret i32 %A } define i32 @shl_i32_3(i32 signext %arg1, i32 signext %arg2) signext { - %A = shl i32 %arg1, %arg2 - ret i32 %A + %A = shl i32 %arg1, %arg2 + ret i32 %A } define i32 @shl_i32_4(i32 signext %arg1, i32 signext %arg2) signext { - %A = shl i32 %arg2, %arg1 - ret i32 %A + %A = shl i32 %arg2, %arg1 + ret i32 %A } define i32 @shl_i32_5(i32 zeroext %arg1, i32 zeroext %arg2) zeroext { - %A = shl i32 %arg1, %arg2 - ret i32 %A + %A = shl i32 %arg1, %arg2 + ret i32 %A } define i32 @shl_i32_6(i32 zeroext %arg1, i32 zeroext %arg2) zeroext { - %A = shl i32 %arg2, %arg1 - ret i32 %A + %A = shl i32 %arg2, %arg1 + ret i32 %A } ; Shift left i32 with immediate: define i32 @shli_i32_1(i32 %arg1) { - %A = shl i32 %arg1, 12 - ret i32 %A + %A = shl i32 %arg1, 12 + ret i32 %A } ; Should not generate anything other than the return, arg1 << 0 = arg1 define i32 @shli_i32_2(i32 %arg1) { - %A = shl i32 %arg1, 0 - ret i32 %A + %A = shl i32 %arg1, 0 + ret i32 %A } define i32 @shli_i32_3(i32 %arg1) { - %A = shl i32 16383, %arg1 - ret i32 %A + %A = shl i32 16383, %arg1 + ret i32 %A } ; Should generate 0, 0 << arg1 = 0 define i32 @shli_i32_4(i32 %arg1) { - %A = shl i32 0, %arg1 - ret i32 %A + %A = shl i32 0, %arg1 + ret i32 %A } define i32 @shli_i32_5(i32 signext %arg1) signext { - %A = shl i32 %arg1, 12 - ret i32 %A + %A = shl i32 %arg1, 12 + ret i32 %A } ; Should not generate anything other than the return, arg1 << 0 = arg1 define i32 @shli_i32_6(i32 signext %arg1) signext { - %A = shl i32 %arg1, 0 - ret i32 %A + %A = shl i32 %arg1, 0 + ret i32 %A } define i32 @shli_i32_7(i32 signext %arg1) signext { - %A = shl i32 16383, %arg1 - ret i32 %A + %A = shl i32 16383, %arg1 + ret i32 %A } ; Should generate 0, 0 << arg1 = 0 define i32 @shli_i32_8(i32 signext %arg1) signext { - %A = shl i32 0, %arg1 - ret i32 %A + %A = shl i32 0, %arg1 + ret i32 %A } define i32 @shli_i32_9(i32 zeroext %arg1) zeroext { - %A = shl i32 %arg1, 12 - ret i32 %A + %A = shl i32 %arg1, 12 + ret i32 %A } ; Should not generate anything other than the return, arg1 << 0 = arg1 define i32 @shli_i32_10(i32 zeroext %arg1) zeroext { - %A = shl i32 %arg1, 0 - ret i32 %A + %A = shl i32 %arg1, 0 + ret i32 %A } define i32 @shli_i32_11(i32 zeroext %arg1) zeroext { - %A = shl i32 16383, %arg1 - ret i32 %A + %A = shl i32 16383, %arg1 + ret i32 %A } ; Should generate 0, 0 << arg1 = 0 define i32 @shli_i32_12(i32 zeroext %arg1) zeroext { - %A = shl i32 0, %arg1 - ret i32 %A + %A = shl i32 0, %arg1 + ret i32 %A } Modified: llvm/trunk/test/CodeGen/CellSPU/sp_farith.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/sp_farith.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/sp_farith.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/sp_farith.ll Wed Mar 5 17:00:19 2008 @@ -12,79 +12,79 @@ target triple = "spu" define float @fp_add(float %arg1, float %arg2) { - %A = add float %arg1, %arg2 ; [#uses=1] - ret float %A + %A = add float %arg1, %arg2 ; [#uses=1] + ret float %A } define <4 x float> @fp_add_vec(<4 x float> %arg1, <4 x float> %arg2) { - %A = add <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1] - ret <4 x float> %A + %A = add <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1] + ret <4 x float> %A } define float @fp_sub(float %arg1, float %arg2) { - %A = sub float %arg1, %arg2 ; [#uses=1] - ret float %A + %A = sub float %arg1, %arg2 ; [#uses=1] + ret float %A } define <4 x float> @fp_sub_vec(<4 x float> %arg1, <4 x float> %arg2) { - %A = sub <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1] - ret <4 x float> %A + %A = sub <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1] + ret <4 x float> %A } define float @fp_mul(float %arg1, float %arg2) { - %A = mul float %arg1, %arg2 ; [#uses=1] - ret float %A + %A = mul float %arg1, %arg2 ; [#uses=1] + ret float %A } define <4 x float> @fp_mul_vec(<4 x float> %arg1, <4 x float> %arg2) { - %A = mul <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1] - ret <4 x float> %A + %A = mul <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1] + ret <4 x float> %A } define float @fp_mul_add(float %arg1, float %arg2, float %arg3) { - %A = mul float %arg1, %arg2 ; [#uses=1] - %B = add float %A, %arg3 ; [#uses=1] - ret float %B + %A = mul float %arg1, %arg2 ; [#uses=1] + %B = add float %A, %arg3 ; [#uses=1] + ret float %B } define <4 x float> @fp_mul_add_vec(<4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3) { - %A = mul <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1] - %B = add <4 x float> %A, %arg3 ; <<4 x float>> [#uses=1] - ret <4 x float> %B + %A = mul <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1] + %B = add <4 x float> %A, %arg3 ; <<4 x float>> [#uses=1] + ret <4 x float> %B } define float @fp_mul_sub(float %arg1, float %arg2, float %arg3) { - %A = mul float %arg1, %arg2 ; [#uses=1] - %B = sub float %A, %arg3 ; [#uses=1] - ret float %B + %A = mul float %arg1, %arg2 ; [#uses=1] + %B = sub float %A, %arg3 ; [#uses=1] + ret float %B } define <4 x float> @fp_mul_sub_vec(<4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3) { - %A = mul <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1] - %B = sub <4 x float> %A, %arg3 ; <<4 x float>> [#uses=1] - ret <4 x float> %B + %A = mul <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1] + %B = sub <4 x float> %A, %arg3 ; <<4 x float>> [#uses=1] + ret <4 x float> %B } ; Test the straightforward way of getting fnms ; c - a * b define float @fp_neg_mul_sub_1(float %arg1, float %arg2, float %arg3) { - %A = mul float %arg1, %arg2 - %B = sub float %arg3, %A - ret float %B + %A = mul float %arg1, %arg2 + %B = sub float %arg3, %A + ret float %B } ; Test another way of getting fnms ; - ( a *b -c ) = c - a * b define float @fp_neg_mul_sub_2(float %arg1, float %arg2, float %arg3) { - %A = mul float %arg1, %arg2 - %B = sub float %A, %arg3 - %C = sub float -0.0, %B - ret float %C + %A = mul float %arg1, %arg2 + %B = sub float %A, %arg3 + %C = sub float -0.0, %B + ret float %C } define <4 x float> @fp_neg_mul_sub_vec(<4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3) { - %A = mul <4 x float> %arg1, %arg2 - %B = sub <4 x float> %A, %arg3 - %D = sub <4 x float> < float -0.0, float -0.0, float -0.0, float -0.0 >, %B - ret <4 x float> %D + %A = mul <4 x float> %arg1, %arg2 + %B = sub <4 x float> %A, %arg3 + %D = sub <4 x float> < float -0.0, float -0.0, float -0.0, float -0.0 >, %B + ret <4 x float> %D } Modified: llvm/trunk/test/CodeGen/CellSPU/struct_1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/struct_1.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/struct_1.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/struct_1.ll Wed Mar 5 17:00:19 2008 @@ -49,96 +49,96 @@ define i8 @get_hackstate_c1() zeroext nounwind { entry: - %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 0), align 16 - ret i8 %tmp2 + %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 0), align 16 + ret i8 %tmp2 } define i8 @get_hackstate_c2() zeroext nounwind { entry: - %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 1), align 16 - ret i8 %tmp2 + %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 1), align 16 + ret i8 %tmp2 } define i8 @get_hackstate_c3() zeroext nounwind { entry: - %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 2), align 16 - ret i8 %tmp2 + %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 2), align 16 + ret i8 %tmp2 } define i32 @get_hackstate_i1() nounwind { entry: - %tmp2 = load i32* getelementptr (%struct.hackstate* @state, i32 0, i32 3), align 16 - ret i32 %tmp2 + %tmp2 = load i32* getelementptr (%struct.hackstate* @state, i32 0, i32 3), align 16 + ret i32 %tmp2 } define i16 @get_hackstate_s1() signext nounwind { entry: - %tmp2 = load i16* getelementptr (%struct.hackstate* @state, i32 0, i32 4), align 16 - ret i16 %tmp2 + %tmp2 = load i16* getelementptr (%struct.hackstate* @state, i32 0, i32 4), align 16 + ret i16 %tmp2 } define i8 @get_hackstate_c6() zeroext nounwind { entry: - %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 8), align 16 - ret i8 %tmp2 + %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 8), align 16 + ret i8 %tmp2 } define i8 @get_hackstate_c7() zeroext nounwind { entry: - %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 9), align 16 - ret i8 %tmp2 + %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 9), align 16 + ret i8 %tmp2 } define i32 @get_hackstate_i3() nounwind { entry: - %tmp2 = load i32* getelementptr (%struct.hackstate* @state, i32 0, i32 10), align 16 - ret i32 %tmp2 + %tmp2 = load i32* getelementptr (%struct.hackstate* @state, i32 0, i32 10), align 16 + ret i32 %tmp2 } define i32 @get_hackstate_i6() nounwind { entry: - %tmp2 = load i32* getelementptr (%struct.hackstate* @state, i32 0, i32 13), align 16 - ret i32 %tmp2 + %tmp2 = load i32* getelementptr (%struct.hackstate* @state, i32 0, i32 13), align 16 + ret i32 %tmp2 } define void @set_hackstate_c1(i8 zeroext %c) nounwind { entry: - store i8 %c, i8* getelementptr (%struct.hackstate* @state, i32 0, i32 0), align 16 - ret void + store i8 %c, i8* getelementptr (%struct.hackstate* @state, i32 0, i32 0), align 16 + ret void } define void @set_hackstate_c2(i8 zeroext %c) nounwind { entry: - store i8 %c, i8* getelementptr (%struct.hackstate* @state, i32 0, i32 1), align 16 - ret void + store i8 %c, i8* getelementptr (%struct.hackstate* @state, i32 0, i32 1), align 16 + ret void } define void @set_hackstate_c3(i8 zeroext %c) nounwind { entry: - store i8 %c, i8* getelementptr (%struct.hackstate* @state, i32 0, i32 2), align 16 - ret void + store i8 %c, i8* getelementptr (%struct.hackstate* @state, i32 0, i32 2), align 16 + ret void } define void @set_hackstate_i1(i32 %i) nounwind { entry: - store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 3), align 16 - ret void + store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 3), align 16 + ret void } define void @set_hackstate_s1(i16 signext %s) nounwind { entry: - store i16 %s, i16* getelementptr (%struct.hackstate* @state, i32 0, i32 4), align 16 - ret void + store i16 %s, i16* getelementptr (%struct.hackstate* @state, i32 0, i32 4), align 16 + ret void } define void @set_hackstate_i3(i32 %i) nounwind { entry: - store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 10), align 16 - ret void + store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 10), align 16 + ret void } define void @set_hackstate_i6(i32 %i) nounwind { entry: - store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 13), align 16 - ret void + store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 13), align 16 + ret void } Modified: llvm/trunk/test/CodeGen/CellSPU/vec_const.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/vec_const.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/vec_const.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/vec_const.ll Wed Mar 5 17:00:19 2008 @@ -26,30 +26,30 @@ ; IL , 2 define <4 x i32> @v4i32_constvec() { - ret <4 x i32> < i32 2, i32 2, i32 2, i32 2 > + ret <4 x i32> < i32 2, i32 2, i32 2, i32 2 > } ; Spill to constant pool define <4 x i32> @v4i32_constpool() { - ret <4 x i32> < i32 2, i32 1, i32 1, i32 2 > + ret <4 x i32> < i32 2, i32 1, i32 1, i32 2 > } ; Max negative range for IL define <4 x i32> @v4i32_constvec_2() { - ret <4 x i32> < i32 -32768, i32 -32768, i32 -32768, i32 -32768 > + ret <4 x i32> < i32 -32768, i32 -32768, i32 -32768, i32 -32768 > } ; ILHU , 73 (0x49) ; 4784128 = 0x490000 define <4 x i32> @v4i32_constvec_3() { - ret <4 x i32> < i32 4784128, i32 4784128, + ret <4 x i32> < i32 4784128, i32 4784128, i32 4784128, i32 4784128 > } ; ILHU , 61 (0x3d) ; IOHL , 15395 (0x3c23) define <4 x i32> @v4i32_constvec_4() { - ret <4 x i32> < i32 4013091, i32 4013091, + ret <4 x i32> < i32 4013091, i32 4013091, i32 4013091, i32 4013091 > } @@ -58,25 +58,25 @@ ; Tests for whether we expand the size of the bit pattern properly, because ; this could be interpreted as an i8 pattern (0x50) define <4 x i32> @v4i32_constvec_5() { - ret <4 x i32> < i32 1347440720, i32 1347440720, + ret <4 x i32> < i32 1347440720, i32 1347440720, i32 1347440720, i32 1347440720 > } ; ILH define <8 x i16> @v8i16_constvec_1() { - ret <8 x i16> < i16 32767, i16 32767, i16 32767, i16 32767, + ret <8 x i16> < i16 32767, i16 32767, i16 32767, i16 32767, i16 32767, i16 32767, i16 32767, i16 32767 > } ; ILH define <8 x i16> @v8i16_constvec_2() { - ret <8 x i16> < i16 511, i16 511, i16 511, i16 511, i16 511, + ret <8 x i16> < i16 511, i16 511, i16 511, i16 511, i16 511, i16 511, i16 511, i16 511 > } ; ILH define <8 x i16> @v8i16_constvec_3() { - ret <8 x i16> < i16 -512, i16 -512, i16 -512, i16 -512, i16 -512, + ret <8 x i16> < i16 -512, i16 -512, i16 -512, i16 -512, i16 -512, i16 -512, i16 -512, i16 -512 > } @@ -84,7 +84,7 @@ ; Tests whether we expand the size of the bit pattern properly, because ; this could be interpreted as an i8 pattern (0x60) define <8 x i16> @v8i16_constvec_4() { - ret <8 x i16> < i16 24672, i16 24672, i16 24672, i16 24672, i16 24672, + ret <8 x i16> < i16 24672, i16 24672, i16 24672, i16 24672, i16 24672, i16 24672, i16 24672, i16 24672 > } @@ -93,7 +93,7 @@ ; this is an i8 pattern but has to be expanded out to i16 to load it ; properly into the vector register. define <16 x i8> @v16i8_constvec_1() { - ret <16 x i8> < i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, + ret <16 x i8> < i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96, i8 96 > } @@ -101,16 +101,16 @@ entry: ret <4 x float> < float 0x4005BF0A80000000, float 0x4005BF0A80000000, - float 0x4005BF0A80000000, - float 0x4005BF0A80000000 > + float 0x4005BF0A80000000, + float 0x4005BF0A80000000 > } define <4 x float> @v4f32_constvec_2() { entry: ret <4 x float> < float 0.000000e+00, float 0.000000e+00, - float 0.000000e+00, - float 0.000000e+00 > + float 0.000000e+00, + float 0.000000e+00 > } @@ -118,8 +118,8 @@ entry: ret <4 x float> < float 0x4005BF0A80000000, float 0x3810000000000000, - float 0x47EFFFFFE0000000, - float 0x400921FB60000000 > + float 0x47EFFFFFE0000000, + float 0x400921FB60000000 > } ; 1311768467750121234 => 0x 12345678 abcdef12 @@ -129,13 +129,13 @@ ; LO32_lo: 61202 define <2 x i64> @i64_constvec_1() { entry: - ret <2 x i64> < i64 1311768467750121234, - i64 1311768467750121234 > + ret <2 x i64> < i64 1311768467750121234, + i64 1311768467750121234 > } define <2 x i64> @i64_constvec_2() { entry: - ret <2 x i64> < i64 1, i64 1311768467750121234 > + ret <2 x i64> < i64 1, i64 1311768467750121234 > } define <2 x double> @f64_constvec_1() { @@ -150,5 +150,5 @@ define <2 x double> @f64_constvec_2() { entry: ret <2 x double> < double 0x400921fb54442d18, - double 0x400921fb54442d18 > + double 0x400921fb54442d18 > } Modified: llvm/trunk/test/CodeGen/CellSPU/vecinsert.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/vecinsert.ll?rev=47972&r1=47971&r2=47972&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/vecinsert.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/vecinsert.ll Wed Mar 5 17:00:19 2008 @@ -19,35 +19,35 @@ ; 67 -> 0x43, as 8-bit vector constant load = 0x4343 (17219)0x4343 define <16 x i8> @test_v16i8(<16 x i8> %P, i8 %x) { entry: - %tmp1 = insertelement <16 x i8> %P, i8 %x, i32 10 - %tmp1.1 = insertelement <16 x i8> %tmp1, i8 67, i32 7 - %tmp1.2 = insertelement <16 x i8> %tmp1.1, i8 %x, i32 15 - ret <16 x i8> %tmp1.2 + %tmp1 = insertelement <16 x i8> %P, i8 %x, i32 10 + %tmp1.1 = insertelement <16 x i8> %tmp1, i8 67, i32 7 + %tmp1.2 = insertelement <16 x i8> %tmp1.1, i8 %x, i32 15 + ret <16 x i8> %tmp1.2 } ; 22598 -> 0x5846 define <8 x i16> @test_v8i16(<8 x i16> %P, i16 %x) { entry: - %tmp1 = insertelement <8 x i16> %P, i16 %x, i32 5 - %tmp1.1 = insertelement <8 x i16> %tmp1, i16 22598, i32 7 - %tmp1.2 = insertelement <8 x i16> %tmp1.1, i16 %x, i32 2 - ret <8 x i16> %tmp1.2 + %tmp1 = insertelement <8 x i16> %P, i16 %x, i32 5 + %tmp1.1 = insertelement <8 x i16> %tmp1, i16 22598, i32 7 + %tmp1.2 = insertelement <8 x i16> %tmp1.1, i16 %x, i32 2 + ret <8 x i16> %tmp1.2 } ; 1574023 -> 0x180487 (ILHU 24/IOHL 1159) define <4 x i32> @test_v4i32_1(<4 x i32> %P, i32 %x) { entry: - %tmp1 = insertelement <4 x i32> %P, i32 %x, i32 2 - %tmp1.1 = insertelement <4 x i32> %tmp1, i32 1574023, i32 1 - %tmp1.2 = insertelement <4 x i32> %tmp1.1, i32 %x, i32 3 - ret <4 x i32> %tmp1.2 + %tmp1 = insertelement <4 x i32> %P, i32 %x, i32 2 + %tmp1.1 = insertelement <4 x i32> %tmp1, i32 1574023, i32 1 + %tmp1.2 = insertelement <4 x i32> %tmp1.1, i32 %x, i32 3 + ret <4 x i32> %tmp1.2 } ; Should generate IL for the load define <4 x i32> @test_v4i32_2(<4 x i32> %P, i32 %x) { entry: - %tmp1 = insertelement <4 x i32> %P, i32 %x, i32 2 - %tmp1.1 = insertelement <4 x i32> %tmp1, i32 -39, i32 1 - %tmp1.2 = insertelement <4 x i32> %tmp1.1, i32 %x, i32 3 - ret <4 x i32> %tmp1.2 + %tmp1 = insertelement <4 x i32> %P, i32 %x, i32 2 + %tmp1.1 = insertelement <4 x i32> %tmp1, i32 -39, i32 1 + %tmp1.2 = insertelement <4 x i32> %tmp1.1, i32 %x, i32 3 + ret <4 x i32> %tmp1.2 } From scottm at aero.org Wed Mar 5 17:02:02 2008 From: scottm at aero.org (Scott Michel) Date: Wed, 05 Mar 2008 23:02:02 -0000 Subject: [llvm-commits] [llvm] r47973 - in /llvm/trunk/lib/Target/CellSPU: SPUISelLowering.cpp SPUInstrInfo.td SPUNodes.td SPUOperands.td Message-ID: <200803052302.m25N22tR028528@zion.cs.uiuc.edu> Author: pingbak Date: Wed Mar 5 17:02:02 2008 New Revision: 47973 URL: http://llvm.org/viewvc/llvm-project?rev=47973&view=rev Log: - Fix support for "special" i64 immediates that can be loaded using IL, ILA, et. al. v2i64 and i64 are now supported by the select bits (SELB) instruction. - Add missing comparison operations (testcase forthcoming) - More multiclass refactoring. Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td llvm/trunk/lib/Target/CellSPU/SPUNodes.td llvm/trunk/lib/Target/CellSPU/SPUOperands.td Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=47973&r1=47972&r2=47973&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Wed Mar 5 17:02:02 2008 @@ -243,15 +243,23 @@ setOperationAction(ISD::CTLZ , MVT::i32, Legal); - // SPU does not have select or setcc + // SPU has a version of select setOperationAction(ISD::SELECT, MVT::i1, Expand); setOperationAction(ISD::SELECT, MVT::i8, Expand); - setOperationAction(ISD::SELECT, MVT::i16, Expand); - setOperationAction(ISD::SELECT, MVT::i32, Expand); + setOperationAction(ISD::SELECT, MVT::i16, Legal); + setOperationAction(ISD::SELECT, MVT::i32, Legal); setOperationAction(ISD::SELECT, MVT::i64, Expand); setOperationAction(ISD::SELECT, MVT::f32, Expand); setOperationAction(ISD::SELECT, MVT::f64, Expand); + setOperationAction(ISD::SETCC, MVT::i1, Expand); + setOperationAction(ISD::SETCC, MVT::i8, Expand); + setOperationAction(ISD::SETCC, MVT::i16, Legal); + setOperationAction(ISD::SETCC, MVT::i32, Legal); + setOperationAction(ISD::SETCC, MVT::i64, Expand); + setOperationAction(ISD::SETCC, MVT::f32, Expand); + setOperationAction(ISD::SETCC, MVT::f64, Expand); + // Zero extension and sign extension for i64 have to be // custom legalized setOperationAction(ISD::ZERO_EXTEND, MVT::i64, Custom); @@ -838,7 +846,6 @@ SDOperand T = DAG.getConstant(CN->getValue(), MVT::i64); return DAG.getNode(SPUISD::EXTRACT_ELT0, VT, DAG.getNode(ISD::BUILD_VECTOR, MVT::v2i64, T, T)); - } else { cerr << "LowerConstant: unhandled constant type " << MVT::getValueTypeString(VT) @@ -981,6 +988,7 @@ break; case MVT::v2f64: case MVT::v4f32: + case MVT::v2i64: case MVT::v4i32: case MVT::v8i16: case MVT::v16i8: @@ -1359,24 +1367,9 @@ SDOperand SPU::get_vec_i16imm(SDNode *N, SelectionDAG &DAG, MVT::ValueType ValueType) { if (ConstantSDNode *CN = getVecImm(N)) { - if (ValueType == MVT::i32) { - int Value = (int) CN->getValue(); - int SExtValue = ((Value & 0xffff) << 16) >> 16; - - if (Value == SExtValue) - return DAG.getConstant(Value, ValueType); - } else if (ValueType == MVT::i16) { - short Value = (short) CN->getValue(); - int SExtValue = ((int) Value << 16) >> 16; - - if (Value == (short) SExtValue) - return DAG.getConstant(Value, ValueType); - } else if (ValueType == MVT::i64) { - int64_t Value = CN->getValue(); - int64_t SExtValue = ((Value & 0xffff) << (64 - 16)) >> (64 - 16); - - if (Value == SExtValue) - return DAG.getConstant(Value, ValueType); + int64_t Value = CN->getSignExtended(); + if (Value >= -(1 << 15) && Value <= ((1 << 15) - 1)) { + return DAG.getConstant(Value, ValueType); } } @@ -1389,9 +1382,8 @@ SDOperand SPU::get_vec_i10imm(SDNode *N, SelectionDAG &DAG, MVT::ValueType ValueType) { if (ConstantSDNode *CN = getVecImm(N)) { - int Value = (int) CN->getValue(); - if ((ValueType == MVT::i32 && isS10Constant(Value)) - || (ValueType == MVT::i16 && isS10Constant((short) Value))) + int64_t Value = CN->getSignExtended(); + if (isS10Constant(Value)) return DAG.getConstant(Value, ValueType); } @@ -1634,7 +1626,14 @@ uint32_t upper = uint32_t(val >> 32); uint32_t lower = uint32_t(val); - if (val != 0) { + if (val == 0) { + SDOperand Zero = DAG.getTargetConstant(0, MVT::i64); + return DAG.getNode(ISD::BUILD_VECTOR, VT, Zero, Zero); + } else if (val == 0xffffffffffffffffULL) { + // For -1, this and has a chance of matching immAllOnesV. + SDOperand NegOne = DAG.getTargetConstant(-1, MVT::i64); + return DAG.getNode(ISD::BUILD_VECTOR, VT, NegOne, NegOne); + } else { SDOperand LO32; SDOperand HI32; SmallVector ShufBytes; @@ -1708,12 +1707,6 @@ return DAG.getNode(SPUISD::SHUFB, VT, HI32, LO32, DAG.getNode(ISD::BUILD_VECTOR, MVT::v16i8, &ShufBytes[0], ShufBytes.size())); - } else { - // For zero, this can be lowered efficiently via v4i32 BUILD_VECTOR - SDOperand Zero = DAG.getConstant(0, MVT::i32); - return DAG.getNode(ISD::BIT_CONVERT, VT, - DAG.getNode(ISD::BUILD_VECTOR, MVT::v4i32, - Zero, Zero, Zero, Zero)); } } } Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td?rev=47973&r1=47972&r2=47973&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td (original) +++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td Wed Mar 5 17:02:02 2008 @@ -196,15 +196,13 @@ : RI16Form<0b0010010, (outs), (ins VECREG:$rT, addr256k:$src), "stqa\t$rT, $src", LoadStore, - [(store (vectype VECREG:$rT), aform_addr:$src)]> -{ } + [(store (vectype VECREG:$rT), aform_addr:$src)]>; class StoreAForm : RI16Form<0b001001, (outs), (ins rclass:$rT, addr256k:$src), "stqa\t$rT, $src", LoadStore, - [(store rclass:$rT, aform_addr:$src)]> -{ } + [(store rclass:$rT, aform_addr:$src)]>; multiclass StoreAForms { @@ -326,87 +324,89 @@ [(set R8C:$rT, immSExt8:$val)]>; // IL does sign extension! -def ILr64: - RI16Form<0b100000010, (outs R64C:$rT), (ins s16imm_i64:$val), - "il\t$rT, $val", ImmLoad, - [(set R64C:$rT, immSExt16:$val)]>; - -def ILv2i64: - RI16Form<0b100000010, (outs VECREG:$rT), (ins s16imm_i64:$val), - "il\t$rT, $val", ImmLoad, - [(set VECREG:$rT, (v2i64 v2i64SExt16Imm:$val))]>; - -def ILv4i32: - RI16Form<0b100000010, (outs VECREG:$rT), (ins s16imm:$val), - "il\t$rT, $val", ImmLoad, - [(set VECREG:$rT, (v4i32 v4i32SExt16Imm:$val))]>; - -def ILr32: - RI16Form<0b100000010, (outs R32C:$rT), (ins s16imm_i32:$val), - "il\t$rT, $val", ImmLoad, - [(set R32C:$rT, immSExt16:$val)]>; - -def ILf32: - RI16Form<0b100000010, (outs R32FP:$rT), (ins s16imm_f32:$val), - "il\t$rT, $val", ImmLoad, - [(set R32FP:$rT, fpimmSExt16:$val)]>; - -def ILf64: - RI16Form<0b100000010, (outs R64FP:$rT), (ins s16imm_f64:$val), - "il\t$rT, $val", ImmLoad, - [(set R64FP:$rT, fpimmSExt16:$val)]>; - -def ILHUv4i32: - RI16Form<0b010000010, (outs VECREG:$rT), (ins u16imm:$val), - "ilhu\t$rT, $val", ImmLoad, - [(set VECREG:$rT, (v4i32 immILHUvec:$val))]>; - -def ILHUr32: - RI16Form<0b010000010, (outs R32C:$rT), (ins u16imm:$val), - "ilhu\t$rT, $val", ImmLoad, - [(set R32C:$rT, hi16:$val)]>; - -// ILHUf32: Used to custom lower float constant loads -def ILHUf32: - RI16Form<0b010000010, (outs R32FP:$rT), (ins f16imm:$val), - "ilhu\t$rT, $val", ImmLoad, - [(set R32FP:$rT, hi16_f32:$val)]>; - -// ILHUhi: Used for loading high portion of an address. Note the symbolHi -// printer used for the operand. -def ILHUhi: - RI16Form<0b010000010, (outs R32C:$rT), (ins symbolHi:$val), - "ilhu\t$rT, $val", ImmLoad, - [(set R32C:$rT, hi16:$val)]>; + +class ILInst pattern>: + RI16Form<0b100000010, OOL, IOL, "il\t$rT, $val", + ImmLoad, pattern>; + +class ILVecInst: + ILInst<(outs VECREG:$rT), (ins immtype:$val), + [(set (vectype VECREG:$rT), (vectype xform:$val))]>; + +class ILRegInst: + ILInst<(outs rclass:$rT), (ins immtype:$val), + [(set rclass:$rT, xform:$val)]>; + +multiclass ImmediateLoad +{ + def v2i64: ILVecInst; + def v4i32: ILVecInst; + + // TODO: Need v2f64, v4f32 + + def r64: ILRegInst; + def r32: ILRegInst; + def f32: ILRegInst; + def f64: ILRegInst; +} + +defm IL : ImmediateLoad; + +class ILHUInst pattern>: + RI16Form<0b010000010, OOL, IOL, "ilhu\t$rT, $val", + ImmLoad, pattern>; + +class ILHUVecInst: + ILHUInst<(outs VECREG:$rT), (ins immtype:$val), + [(set (vectype VECREG:$rT), (vectype xform:$val))]>; + +class ILHURegInst: + ILHUInst<(outs rclass:$rT), (ins immtype:$val), + [(set rclass:$rT, xform:$val)]>; + +multiclass ImmLoadHalfwordUpper +{ + def v2i64: ILHUVecInst; + def v4i32: ILHUVecInst; + + def r64: ILHURegInst; + def r32: ILHURegInst; + + // Loads the high portion of an address + def hi: ILHURegInst; + + // Used in custom lowering constant SFP loads: + def f32: ILHURegInst; +} + +defm ILHU : ImmLoadHalfwordUpper; // Immediate load address (can also be used to load 18-bit unsigned constants, // see the zext 16->32 pattern) + class ILAInst pattern>: RI18Form<0b1000010, OOL, IOL, "ila\t$rT, $val", LoadNOP, pattern>; +class ILAVecInst: + ILAInst<(outs VECREG:$rT), (ins immtype:$val), + [(set (vectype VECREG:$rT), (vectype xform:$val))]>; + +class ILARegInst: + ILAInst<(outs rclass:$rT), (ins immtype:$val), + [(set rclass:$rT, xform:$val)]>; + multiclass ImmLoadAddress { - def v2i64: ILAInst<(outs VECREG:$rT), (ins u18imm:$val), - [(set (v2i64 VECREG:$rT), v2i64Uns18Imm:$val)]>; - - def v4i32: ILAInst<(outs VECREG:$rT), (ins u18imm:$val), - [(set (v4i32 VECREG:$rT), v4i32Uns18Imm:$val)]>; - - def r64: ILAInst<(outs R64C:$rT), (ins u18imm_i64:$val), - [(set R64C:$rT, imm18:$val)]>; - - def r32: ILAInst<(outs R32C:$rT), (ins u18imm:$val), - [(set R32C:$rT, imm18:$val)]>; + def v2i64: ILAVecInst; + def v4i32: ILAVecInst; - def f32: ILAInst<(outs R32FP:$rT), (ins f18imm:$val), - [(set R32FP:$rT, fpimm18:$val)]>; + def r64: ILARegInst; + def r32: ILARegInst; + def f32: ILARegInst; + def f64: ILARegInst; - def f64: ILAInst<(outs R64FP:$rT), (ins f18imm_f64:$val), - [(set R64FP:$rT, fpimm18:$val)]>; - - def lo: ILAInst<(outs R32C:$rT), (ins symbolLo:$val), - [(set R32C:$rT, imm18:$val)]>; + def lo: ILARegInst; def lsa: ILAInst<(outs R32C:$rT), (ins symbolLSA:$val), [/* no pattern */]>; @@ -419,43 +419,41 @@ // Note that these are really two operand instructions, but they're encoded // as three operands with the first two arguments tied-to each other. -def IOHLvec: - RI16Form<0b100000110, (outs VECREG:$rT), (ins VECREG:$rS, u16imm:$val), - "iohl\t$rT, $val", ImmLoad, - [/* insert intrinsic here */]>, - RegConstraint<"$rS = $rT">, - NoEncode<"$rS">; - -def IOHLr32: - RI16Form<0b100000110, (outs R32C:$rT), (ins R32C:$rS, i32imm:$val), - "iohl\t$rT, $val", ImmLoad, - [/* insert intrinsic here */]>, - RegConstraint<"$rS = $rT">, - NoEncode<"$rS">; - -def IOHLf32: - RI16Form<0b100000110, (outs R32FP:$rT), (ins R32FP:$rS, f32imm:$val), - "iohl\t$rT, $val", ImmLoad, - [/* insert intrinsic here */]>, - RegConstraint<"$rS = $rT">, - NoEncode<"$rS">; - -def IOHLlo: - RI16Form<0b100000110, (outs R32C:$rT), (ins R32C:$rS, symbolLo:$val), - "iohl\t$rT, $val", ImmLoad, - [/* no pattern */]>, - RegConstraint<"$rS = $rT">, - NoEncode<"$rS">; +class IOHLInst pattern>: + RI16Form<0b100000110, OOL, IOL, "iohl\t$rT, $val", + ImmLoad, pattern>, + RegConstraint<"$rS = $rT">, + NoEncode<"$rS">; + +class IOHLVecInst: + IOHLInst<(outs VECREG:$rT), (ins VECREG:$rS, immtype:$val), + [/* no pattern */]>; + +class IOHLRegInst: + IOHLInst<(outs rclass:$rT), (ins rclass:$rS, immtype:$val), + [/* no pattern */]>; + +multiclass ImmOrHalfwordLower +{ + def v2i64: IOHLVecInst; + def v4i32: IOHLVecInst; + + def r32: IOHLRegInst; + def f32: IOHLRegInst; + + def lo: IOHLRegInst; +} + +defm IOHL: ImmOrHalfwordLower; // Form select mask for bytes using immediate, used in conjunction with the // SELB instruction: -class FSMBIVec - : RI16Form<0b101001100, (outs VECREG:$rT), (ins u16imm:$val), - "fsmbi\t$rT, $val", - SelectOp, - [(set (vectype VECREG:$rT), (SPUfsmbi immU16:$val))]> -{ } +class FSMBIVec: + RI16Form<0b101001100, (outs VECREG:$rT), (ins u16imm:$val), + "fsmbi\t$rT, $val", + SelectOp, + [(set (vectype VECREG:$rT), (SPUfsmbi (i32 immU16:$val)))]>; multiclass FormSelectMaskBytesImm { @@ -470,22 +468,22 @@ // fsmb: Form select mask for bytes. N.B. Input operand, $rA, is 16-bits def FSMB: RRForm_1<0b01101101100, (outs VECREG:$rT), (ins R16C:$rA), - "fsmb\t$rT, $rA", SelectOp, - []>; + "fsmb\t$rT, $rA", SelectOp, + [(set (v16i8 VECREG:$rT), (SPUfsmbi R16C:$rA))]>; // fsmh: Form select mask for halfwords. N.B., Input operand, $rA, is // only 8-bits wide (even though it's input as 16-bits here) def FSMH: RRForm_1<0b10101101100, (outs VECREG:$rT), (ins R16C:$rA), "fsmh\t$rT, $rA", SelectOp, - []>; + [(set (v8i16 VECREG:$rT), (SPUfsmbi R16C:$rA))]>; // fsm: Form select mask for words. Like the other fsm* instructions, // only the lower 4 bits of $rA are significant. def FSM: RRForm_1<0b00101101100, (outs VECREG:$rT), (ins R16C:$rA), "fsm\t$rT, $rA", SelectOp, - []>; + [(set (v4i32 VECREG:$rT), (SPUfsmbi R16C:$rA))]>; //===----------------------------------------------------------------------===// // Integer and Logical Operations: @@ -926,6 +924,10 @@ [(set (vectype VECREG:$rT), (and (vectype VECREG:$rA), (vectype VECREG:$rB)))]>; +class ANDRegInst: + ANDInst<(outs rclass:$rT), (ins rclass:$rA, rclass:$rB), + [(set rclass:$rT, (and rclass:$rA, rclass:$rB))]>; + multiclass BitwiseAnd { def v16i8: ANDVecInst; @@ -933,17 +935,11 @@ def v4i32: ANDVecInst; def v2i64: ANDVecInst; - def r64: ANDInst<(outs R64C:$rT), (ins R64C:$rA, R64C:$rB), - [(set R64C:$rT, (and R64C:$rA, R64C:$rB))]>; - - def r32: ANDInst<(outs R32C:$rT), (ins R32C:$rA, R32C:$rB), - [(set R32C:$rT, (and R32C:$rA, R32C:$rB))]>; - - def r16: ANDInst<(outs R16C:$rT), (ins R16C:$rA, R16C:$rB), - [(set R16C:$rT, (and R16C:$rA, R16C:$rB))]>; - - def r8: ANDInst<(outs R8C:$rT), (ins R8C:$rA, R8C:$rB), - [(set R8C:$rT, (and R8C:$rA, R8C:$rB))]>; + def r128: ANDRegInst; + def r64: ANDRegInst; + def r32: ANDRegInst; + def r16: ANDRegInst; + def r8: ANDRegInst; //===--------------------------------------------- // Special instructions to perform the fabs instruction @@ -1323,61 +1319,49 @@ []>; // XOR: -def XORv16i8: - RRForm<0b10010010000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), - "xor\t$rT, $rA, $rB", IntegerOp, - [(set (v16i8 VECREG:$rT), (xor (v16i8 VECREG:$rA), (v16i8 VECREG:$rB)))]>; -def XORv8i16: - RRForm<0b10010010000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), - "xor\t$rT, $rA, $rB", IntegerOp, - [(set (v8i16 VECREG:$rT), (xor (v8i16 VECREG:$rA), (v8i16 VECREG:$rB)))]>; +class XORInst pattern> : + RRForm<0b10010010000, OOL, IOL, "xor\t$rT, $rA, $rB", + IntegerOp, pattern>; -def XORv4i32: - RRForm<0b10010010000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), - "xor\t$rT, $rA, $rB", IntegerOp, - [(set (v4i32 VECREG:$rT), (xor (v4i32 VECREG:$rA), (v4i32 VECREG:$rB)))]>; +class XORVecInst: + XORInst<(outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), + [(set (vectype VECREG:$rT), (xor (vectype VECREG:$rA), + (vectype VECREG:$rB)))]>; -def XORr32: - RRForm<0b10010010000, (outs R32C:$rT), (ins R32C:$rA, R32C:$rB), - "xor\t$rT, $rA, $rB", IntegerOp, - [(set R32C:$rT, (xor R32C:$rA, R32C:$rB))]>; +class XORRegInst: + XORInst<(outs rclass:$rT), (ins rclass:$rA, rclass:$rB), + [(set rclass:$rT, (xor rclass:$rA, rclass:$rB))]>; -//==---------------------------------------------------------- -// Special forms for floating point instructions. -// Bitwise ORs and ANDs don't make sense for normal floating -// point numbers. These operations (fneg and fabs), however, -// require bitwise logical ops to manipulate the sign bit. -def XORfneg32: - RRForm<0b10010010000, (outs R32FP:$rT), (ins R32FP:$rA, R32C:$rB), - "xor\t$rT, $rA, $rB", IntegerOp, - [/* Intentionally does not match a pattern, see fneg32 */]>; - -// KLUDGY! Better way to do this without a VECREG? bitconvert? -// VECREG is assumed to contain two identical 64-bit masks, so -// it doesn't matter which word we select for the xor -def XORfneg64: - RRForm<0b10010010000, (outs R64FP:$rT), (ins R64FP:$rA, VECREG:$rB), - "xor\t$rT, $rA, $rB", IntegerOp, - [/* Intentionally does not match a pattern, see fneg64 */]>; +multiclass BitwiseExclusiveOr +{ + def v16i8: XORVecInst; + def v8i16: XORVecInst; + def v4i32: XORVecInst; + def v2i64: XORVecInst; -// Could use XORv4i32, but will use this for clarity -def XORfnegvec: - RRForm<0b10010010000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), - "xor\t$rT, $rA, $rB", IntegerOp, - [/* Intentionally does not match a pattern, see fneg{32,64} */]>; + def r128: XORRegInst; + def r64: XORRegInst; + def r32: XORRegInst; + def r16: XORRegInst; + def r8: XORRegInst; -//==---------------------------------------------------------- + // Special forms for floating point instructions. + // fneg and fabs require bitwise logical ops to manipulate the sign bit. -def XORr16: - RRForm<0b10010010000, (outs R16C:$rT), (ins R16C:$rA, R16C:$rB), - "xor\t$rT, $rA, $rB", IntegerOp, - [(set R16C:$rT, (xor R16C:$rA, R16C:$rB))]>; + def fneg32: XORInst<(outs R32FP:$rT), (ins R32FP:$rA, R32C:$rB), + [/* no pattern */]>; -def XORr8: - RRForm<0b10010010000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), - "xor\t$rT, $rA, $rB", IntegerOp, - [(set R8C:$rT, (xor R8C:$rA, R8C:$rB))]>; + def fneg64: XORInst<(outs R64FP:$rT), (ins R64FP:$rA, VECREG:$rB), + [/* no pattern */]>; + + def fnegvec: XORInst<(outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), + [/* no pattern, see fneg{32,64} */]>; +} + +defm XOR : BitwiseExclusiveOr; + +//==---------------------------------------------------------- class XORBIInst pattern>: RI10Form<0b01100000, OOL, IOL, "xorbi\t$rT, $rA, $val", @@ -1486,433 +1470,156 @@ "nor\t$rT, $rA, $rB", IntegerOp, [(set R8C:$rT, (not (or R8C:$rA, R8C:$rB)))]>; -// EQV: Equivalence (1 for each same bit, otherwise 0) -def EQVv16i8: - RRForm<0b10010010000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), - "eqv\t$rT, $rA, $rB", IntegerOp, - [(set (v16i8 VECREG:$rT), (or (and (v16i8 VECREG:$rA), - (v16i8 VECREG:$rB)), - (and (vnot (v16i8 VECREG:$rA)), - (vnot (v16i8 VECREG:$rB)))))]>; - -def : Pat<(xor (v16i8 VECREG:$rA), (vnot (v16i8 VECREG:$rB))), - (EQVv16i8 VECREG:$rA, VECREG:$rB)>; - -def : Pat<(xor (vnot (v16i8 VECREG:$rA)), (v16i8 VECREG:$rB)), - (EQVv16i8 VECREG:$rA, VECREG:$rB)>; - -def EQVv8i16: - RRForm<0b10010010000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), - "eqv\t$rT, $rA, $rB", IntegerOp, - [(set (v8i16 VECREG:$rT), (or (and (v8i16 VECREG:$rA), - (v8i16 VECREG:$rB)), - (and (vnot (v8i16 VECREG:$rA)), - (vnot (v8i16 VECREG:$rB)))))]>; - -def : Pat<(xor (v8i16 VECREG:$rA), (vnot (v8i16 VECREG:$rB))), - (EQVv8i16 VECREG:$rA, VECREG:$rB)>; - -def : Pat<(xor (vnot (v8i16 VECREG:$rA)), (v8i16 VECREG:$rB)), - (EQVv8i16 VECREG:$rA, VECREG:$rB)>; - -def EQVv4i32: - RRForm<0b10010010000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), - "eqv\t$rT, $rA, $rB", IntegerOp, - [(set (v4i32 VECREG:$rT), (or (and (v4i32 VECREG:$rA), - (v4i32 VECREG:$rB)), - (and (vnot (v4i32 VECREG:$rA)), - (vnot (v4i32 VECREG:$rB)))))]>; - -def : Pat<(xor (v4i32 VECREG:$rA), (vnot (v4i32 VECREG:$rB))), - (EQVv4i32 VECREG:$rA, VECREG:$rB)>; - -def : Pat<(xor (vnot (v4i32 VECREG:$rA)), (v4i32 VECREG:$rB)), - (EQVv4i32 VECREG:$rA, VECREG:$rB)>; - -def EQVr32: - RRForm<0b10010010000, (outs R32C:$rT), (ins R32C:$rA, R32C:$rB), - "eqv\t$rT, $rA, $rB", IntegerOp, - [(set R32C:$rT, (or (and R32C:$rA, R32C:$rB), - (and (not R32C:$rA), (not R32C:$rB))))]>; - -def : Pat<(xor R32C:$rA, (not R32C:$rB)), - (EQVr32 R32C:$rA, R32C:$rB)>; - -def : Pat<(xor (not R32C:$rA), R32C:$rB), - (EQVr32 R32C:$rA, R32C:$rB)>; - -def EQVr16: - RRForm<0b10010010000, (outs R16C:$rT), (ins R16C:$rA, R16C:$rB), - "eqv\t$rT, $rA, $rB", IntegerOp, - [(set R16C:$rT, (or (and R16C:$rA, R16C:$rB), - (and (not R16C:$rA), (not R16C:$rB))))]>; - -def : Pat<(xor R16C:$rA, (not R16C:$rB)), - (EQVr16 R16C:$rA, R16C:$rB)>; - -def : Pat<(xor (not R16C:$rA), R16C:$rB), - (EQVr16 R16C:$rA, R16C:$rB)>; - -def EQVr8: - RRForm<0b10010010000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB), - "eqv\t$rT, $rA, $rB", IntegerOp, - [(set R8C:$rT, (or (and R8C:$rA, R8C:$rB), - (and (not R8C:$rA), (not R8C:$rB))))]>; - -def : Pat<(xor R8C:$rA, (not R8C:$rB)), - (EQVr8 R8C:$rA, R8C:$rB)>; - -def : Pat<(xor (not R8C:$rA), R8C:$rB), - (EQVr8 R8C:$rA, R8C:$rB)>; - -// gcc optimizes (p & q) | (~p & ~q) -> ~(p | q) | (p & q), so match that -// pattern also: -def : Pat<(or (vnot (or (v16i8 VECREG:$rA), (v16i8 VECREG:$rB))), - (and (v16i8 VECREG:$rA), (v16i8 VECREG:$rB))), - (EQVv16i8 VECREG:$rA, VECREG:$rB)>; - -def : Pat<(or (vnot (or (v8i16 VECREG:$rA), (v8i16 VECREG:$rB))), - (and (v8i16 VECREG:$rA), (v8i16 VECREG:$rB))), - (EQVv8i16 VECREG:$rA, VECREG:$rB)>; - -def : Pat<(or (vnot (or (v4i32 VECREG:$rA), (v4i32 VECREG:$rB))), - (and (v4i32 VECREG:$rA), (v4i32 VECREG:$rB))), - (EQVv4i32 VECREG:$rA, VECREG:$rB)>; - -def : Pat<(or (not (or R32C:$rA, R32C:$rB)), (and R32C:$rA, R32C:$rB)), - (EQVr32 R32C:$rA, R32C:$rB)>; - -def : Pat<(or (not (or R16C:$rA, R16C:$rB)), (and R16C:$rA, R16C:$rB)), - (EQVr16 R16C:$rA, R16C:$rB)>; - -def : Pat<(or (not (or R8C:$rA, R8C:$rB)), (and R8C:$rA, R8C:$rB)), - (EQVr8 R8C:$rA, R8C:$rB)>; - // Select bits: -def SELBv16i8: - RRRForm<0b1000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB, VECREG:$rC), - "selb\t$rT, $rA, $rB, $rC", IntegerOp, - [(set (v16i8 VECREG:$rT), - (SPUselb (v16i8 VECREG:$rA), (v16i8 VECREG:$rB), - (v16i8 VECREG:$rC)))]>; - -def : Pat<(or (and (v16i8 VECREG:$rA), (v16i8 VECREG:$rC)), - (and (v16i8 VECREG:$rB), (vnot (v16i8 VECREG:$rC)))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v16i8 VECREG:$rC), (v16i8 VECREG:$rA)), - (and (v16i8 VECREG:$rB), (vnot (v16i8 VECREG:$rC)))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v16i8 VECREG:$rA), (v16i8 VECREG:$rC)), - (and (vnot (v16i8 VECREG:$rC)), (v16i8 VECREG:$rB))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v16i8 VECREG:$rC), (v16i8 VECREG:$rA)), - (and (vnot (v16i8 VECREG:$rC)), (v16i8 VECREG:$rB))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v16i8 VECREG:$rA), (vnot (v16i8 VECREG:$rC))), - (and (v16i8 VECREG:$rB), (v16i8 VECREG:$rC))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v16i8 VECREG:$rA), (vnot (v16i8 VECREG:$rC))), - (and (v16i8 VECREG:$rC), (v16i8 VECREG:$rB))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (vnot (v16i8 VECREG:$rC)), (v16i8 VECREG:$rA)), - (and (v16i8 VECREG:$rB), (v16i8 VECREG:$rC))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (vnot (v16i8 VECREG:$rC)), (v16i8 VECREG:$rA)), - (and (v16i8 VECREG:$rC), (v16i8 VECREG:$rB))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v16i8 VECREG:$rA), (v16i8 VECREG:$rC)), - (and (v16i8 VECREG:$rB), (vnot (v16i8 VECREG:$rC)))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v16i8 VECREG:$rC), (v16i8 VECREG:$rA)), - (and (v16i8 VECREG:$rB), (vnot (v16i8 VECREG:$rC)))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v16i8 VECREG:$rA), (v16i8 VECREG:$rC)), - (and (vnot (v16i8 VECREG:$rC)), (v16i8 VECREG:$rB))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v16i8 VECREG:$rC), (v16i8 VECREG:$rA)), - (and (vnot (v16i8 VECREG:$rC)), (v16i8 VECREG:$rB))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v16i8 VECREG:$rA), (vnot (v16i8 VECREG:$rC))), - (and (v16i8 VECREG:$rB), (v16i8 VECREG:$rC))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v16i8 VECREG:$rA), (vnot (v16i8 VECREG:$rC))), - (and (v16i8 VECREG:$rC), (v16i8 VECREG:$rB))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (vnot (v16i8 VECREG:$rC)), (v16i8 VECREG:$rA)), - (and (v16i8 VECREG:$rB), (v16i8 VECREG:$rC))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (vnot (v16i8 VECREG:$rC)), (v16i8 VECREG:$rA)), - (and (v16i8 VECREG:$rC), (v16i8 VECREG:$rB))), - (SELBv16i8 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def SELBv8i16: - RRRForm<0b1000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB, VECREG:$rC), - "selb\t$rT, $rA, $rB, $rC", IntegerOp, - [(set (v8i16 VECREG:$rT), - (SPUselb (v8i16 VECREG:$rA), (v8i16 VECREG:$rB), - (v8i16 VECREG:$rC)))]>; +class SELBInst pattern>: + RRRForm<0b1000, OOL, IOL, "selb\t$rT, $rA, $rB, $rC", + IntegerOp, pattern>; -def : Pat<(or (and (v8i16 VECREG:$rA), (v8i16 VECREG:$rC)), - (and (v8i16 VECREG:$rB), (vnot (v8i16 VECREG:$rC)))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v8i16 VECREG:$rC), (v8i16 VECREG:$rA)), - (and (v8i16 VECREG:$rB), (vnot (v8i16 VECREG:$rC)))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v8i16 VECREG:$rA), (v8i16 VECREG:$rC)), - (and (vnot (v8i16 VECREG:$rC)), (v8i16 VECREG:$rB))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v8i16 VECREG:$rC), (v8i16 VECREG:$rA)), - (and (vnot (v8i16 VECREG:$rC)), (v8i16 VECREG:$rB))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v8i16 VECREG:$rA), (vnot (v8i16 VECREG:$rC))), - (and (v8i16 VECREG:$rB), (v8i16 VECREG:$rC))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v8i16 VECREG:$rA), (vnot (v8i16 VECREG:$rC))), - (and (v8i16 VECREG:$rC), (v8i16 VECREG:$rB))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (vnot (v8i16 VECREG:$rC)), (v8i16 VECREG:$rA)), - (and (v8i16 VECREG:$rB), (v8i16 VECREG:$rC))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (vnot (v8i16 VECREG:$rC)), (v8i16 VECREG:$rA)), - (and (v8i16 VECREG:$rC), (v8i16 VECREG:$rB))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v8i16 VECREG:$rA), (v8i16 VECREG:$rC)), - (and (v8i16 VECREG:$rB), (vnot (v8i16 VECREG:$rC)))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v8i16 VECREG:$rC), (v8i16 VECREG:$rA)), - (and (v8i16 VECREG:$rB), (vnot (v8i16 VECREG:$rC)))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v8i16 VECREG:$rA), (v8i16 VECREG:$rC)), - (and (vnot (v8i16 VECREG:$rC)), (v8i16 VECREG:$rB))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v8i16 VECREG:$rC), (v8i16 VECREG:$rA)), - (and (vnot (v8i16 VECREG:$rC)), (v8i16 VECREG:$rB))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v8i16 VECREG:$rA), (vnot (v8i16 VECREG:$rC))), - (and (v8i16 VECREG:$rB), (v8i16 VECREG:$rC))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v8i16 VECREG:$rA), (vnot (v8i16 VECREG:$rC))), - (and (v8i16 VECREG:$rC), (v8i16 VECREG:$rB))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (vnot (v8i16 VECREG:$rC)), (v8i16 VECREG:$rA)), - (and (v8i16 VECREG:$rB), (v8i16 VECREG:$rC))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (vnot (v8i16 VECREG:$rC)), (v8i16 VECREG:$rA)), - (and (v8i16 VECREG:$rC), (v8i16 VECREG:$rB))), - (SELBv8i16 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def SELBv4i32: - RRRForm<0b1000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB, VECREG:$rC), - "selb\t$rT, $rA, $rB, $rC", IntegerOp, - [(set (v4i32 VECREG:$rT), - (SPUselb (v4i32 VECREG:$rA), (v4i32 VECREG:$rB), - (v4i32 VECREG:$rC)))]>; +class SELBVecInst: + SELBInst<(outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB, VECREG:$rC), + [(set (vectype VECREG:$rT), + (or (and (vectype VECREG:$rC), (vectype VECREG:$rB)), + (and (vnot (vectype VECREG:$rC)), + (vectype VECREG:$rA))))]>; + +class SELBRegInst: + SELBInst<(outs rclass:$rT), (ins rclass:$rA, rclass:$rB, rclass:$rC), + [(set rclass:$rT, + (or (and rclass:$rA, rclass:$rC), + (and rclass:$rB, (not rclass:$rC))))]>; + +multiclass SelectBits +{ + def v16i8: SELBVecInst; + def v8i16: SELBVecInst; + def v4i32: SELBVecInst; + def v2i64: SELBVecInst; + + def r128: SELBRegInst; + def r64: SELBRegInst; + def r32: SELBRegInst; + def r16: SELBRegInst; + def r8: SELBRegInst; +} + +defm SELB : SelectBits; + +class SPUselbPat: + Pat<(SPUselb (vectype VECREG:$rA), (vectype VECREG:$rB), (vectype VECREG:$rC)), + (inst VECREG:$rA, VECREG:$rB, VECREG:$rC)>; + +def : SPUselbPat; +def : SPUselbPat; +def : SPUselbPat; +def : SPUselbPat; + +class SelectConditional: + Pat<(select rclass:$rCond, rclass:$rTrue, rclass:$rFalse), + (inst rclass:$rCond, rclass:$rFalse, rclass:$rTrue)>; + +def : SelectConditional; +def : SelectConditional; +def : SelectConditional; -def : Pat<(or (and (v4i32 VECREG:$rA), (v4i32 VECREG:$rC)), - (and (v4i32 VECREG:$rB), (vnot (v4i32 VECREG:$rC)))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v4i32 VECREG:$rC), (v4i32 VECREG:$rA)), - (and (v4i32 VECREG:$rB), (vnot (v4i32 VECREG:$rC)))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v4i32 VECREG:$rA), (v4i32 VECREG:$rC)), - (and (vnot (v4i32 VECREG:$rC)), (v4i32 VECREG:$rB))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v4i32 VECREG:$rC), (v4i32 VECREG:$rA)), - (and (vnot (v4i32 VECREG:$rC)), (v4i32 VECREG:$rB))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v4i32 VECREG:$rA), (vnot (v4i32 VECREG:$rC))), - (and (v4i32 VECREG:$rB), (v4i32 VECREG:$rC))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v4i32 VECREG:$rA), (vnot (v4i32 VECREG:$rC))), - (and (v4i32 VECREG:$rC), (v4i32 VECREG:$rB))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (vnot (v4i32 VECREG:$rC)), (v4i32 VECREG:$rA)), - (and (v4i32 VECREG:$rB), (v4i32 VECREG:$rC))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (vnot (v4i32 VECREG:$rC)), (v4i32 VECREG:$rA)), - (and (v4i32 VECREG:$rC), (v4i32 VECREG:$rB))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v4i32 VECREG:$rA), (v4i32 VECREG:$rC)), - (and (v4i32 VECREG:$rB), (vnot (v4i32 VECREG:$rC)))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v4i32 VECREG:$rC), (v4i32 VECREG:$rA)), - (and (v4i32 VECREG:$rB), (vnot (v4i32 VECREG:$rC)))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v4i32 VECREG:$rA), (v4i32 VECREG:$rC)), - (and (vnot (v4i32 VECREG:$rC)), (v4i32 VECREG:$rB))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v4i32 VECREG:$rC), (v4i32 VECREG:$rA)), - (and (vnot (v4i32 VECREG:$rC)), (v4i32 VECREG:$rB))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v4i32 VECREG:$rA), (vnot (v4i32 VECREG:$rC))), - (and (v4i32 VECREG:$rB), (v4i32 VECREG:$rC))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (v4i32 VECREG:$rA), (vnot (v4i32 VECREG:$rC))), - (and (v4i32 VECREG:$rC), (v4i32 VECREG:$rB))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (vnot (v4i32 VECREG:$rC)), (v4i32 VECREG:$rA)), - (and (v4i32 VECREG:$rB), (v4i32 VECREG:$rC))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def : Pat<(or (and (vnot (v4i32 VECREG:$rC)), (v4i32 VECREG:$rA)), - (and (v4i32 VECREG:$rC), (v4i32 VECREG:$rB))), - (SELBv4i32 VECREG:$rA, VECREG:$rB, VECREG:$rC)>; - -def SELBr32: - RRRForm<0b1000, (outs R32C:$rT), (ins R32C:$rA, R32C:$rB, R32C:$rC), - "selb\t$rT, $rA, $rB, $rC", IntegerOp, - []>; +// EQV: Equivalence (1 for each same bit, otherwise 0) +// +// Note: There are a lot of ways to match this bit operator and these patterns +// attempt to be as exhaustive as possible. -// And the various patterns that can be matched... (all 8 of them :-) -def : Pat<(or (and R32C:$rA, R32C:$rC), - (and R32C:$rB, (not R32C:$rC))), - (SELBr32 R32C:$rA, R32C:$rB, R32C:$rC)>; - -def : Pat<(or (and R32C:$rC, R32C:$rA), - (and R32C:$rB, (not R32C:$rC))), - (SELBr32 R32C:$rA, R32C:$rB, R32C:$rC)>; - -def : Pat<(or (and R32C:$rA, R32C:$rC), - (and (not R32C:$rC), R32C:$rB)), - (SELBr32 R32C:$rA, R32C:$rB, R32C:$rC)>; - -def : Pat<(or (and R32C:$rC, R32C:$rA), - (and (not R32C:$rC), R32C:$rB)), - (SELBr32 R32C:$rA, R32C:$rB, R32C:$rC)>; - -def : Pat<(or (and R32C:$rA, (not R32C:$rC)), - (and R32C:$rB, R32C:$rC)), - (SELBr32 R32C:$rA, R32C:$rB, R32C:$rC)>; - -def : Pat<(or (and R32C:$rA, (not R32C:$rC)), - (and R32C:$rC, R32C:$rB)), - (SELBr32 R32C:$rA, R32C:$rB, R32C:$rC)>; - -def : Pat<(or (and (not R32C:$rC), R32C:$rA), - (and R32C:$rB, R32C:$rC)), - (SELBr32 R32C:$rA, R32C:$rB, R32C:$rC)>; - -def : Pat<(or (and (not R32C:$rC), R32C:$rA), - (and R32C:$rC, R32C:$rB)), - (SELBr32 R32C:$rA, R32C:$rB, R32C:$rC)>; - -def SELBr16: - RRRForm<0b1000, (outs R16C:$rT), (ins R16C:$rA, R16C:$rB, R16C:$rC), - "selb\t$rT, $rA, $rB, $rC", IntegerOp, - []>; +class EQVInst pattern>: + RRForm<0b10010010000, OOL, IOL, "eqv\t$rT, $rA, $rB", + IntegerOp, pattern>; -def : Pat<(or (and R16C:$rA, R16C:$rC), - (and R16C:$rB, (not R16C:$rC))), - (SELBr16 R16C:$rA, R16C:$rB, R16C:$rC)>; - -def : Pat<(or (and R16C:$rC, R16C:$rA), - (and R16C:$rB, (not R16C:$rC))), - (SELBr16 R16C:$rA, R16C:$rB, R16C:$rC)>; - -def : Pat<(or (and R16C:$rA, R16C:$rC), - (and (not R16C:$rC), R16C:$rB)), - (SELBr16 R16C:$rA, R16C:$rB, R16C:$rC)>; - -def : Pat<(or (and R16C:$rC, R16C:$rA), - (and (not R16C:$rC), R16C:$rB)), - (SELBr16 R16C:$rA, R16C:$rB, R16C:$rC)>; - -def : Pat<(or (and R16C:$rA, (not R16C:$rC)), - (and R16C:$rB, R16C:$rC)), - (SELBr16 R16C:$rA, R16C:$rB, R16C:$rC)>; - -def : Pat<(or (and R16C:$rA, (not R16C:$rC)), - (and R16C:$rC, R16C:$rB)), - (SELBr16 R16C:$rA, R16C:$rB, R16C:$rC)>; - -def : Pat<(or (and (not R16C:$rC), R16C:$rA), - (and R16C:$rB, R16C:$rC)), - (SELBr16 R16C:$rA, R16C:$rB, R16C:$rC)>; - -def : Pat<(or (and (not R16C:$rC), R16C:$rA), - (and R16C:$rC, R16C:$rB)), - (SELBr16 R16C:$rA, R16C:$rB, R16C:$rC)>; - -def SELBr8: - RRRForm<0b1000, (outs R8C:$rT), (ins R8C:$rA, R8C:$rB, R8C:$rC), - "selb\t$rT, $rA, $rB, $rC", IntegerOp, - []>; +class EQVVecInst: + EQVInst<(outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), + [(set (vectype VECREG:$rT), + (or (and (vectype VECREG:$rA), (vectype VECREG:$rB)), + (and (vnot (vectype VECREG:$rA)), + (vnot (vectype VECREG:$rB)))))]>; + +class EQVRegInst: + EQVInst<(outs rclass:$rT), (ins rclass:$rA, rclass:$rB), + [(set rclass:$rT, (or (and rclass:$rA, rclass:$rB), + (and (not rclass:$rA), (not rclass:$rB))))]>; + +class EQVVecPattern1: + EQVInst<(outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), + [(set (vectype VECREG:$rT), + (xor (vectype VECREG:$rA), (vnot (vectype VECREG:$rB))))]>; + +class EQVRegPattern1: + EQVInst<(outs rclass:$rT), (ins rclass:$rA, rclass:$rB), + [(set rclass:$rT, (xor rclass:$rA, (not rclass:$rB)))]>; + +class EQVVecPattern2: + EQVInst<(outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), + [(set (vectype VECREG:$rT), + (or (and (vectype VECREG:$rA), (vectype VECREG:$rB)), + (vnot (or (vectype VECREG:$rA), (vectype VECREG:$rB)))))]>; + +class EQVRegPattern2: + EQVInst<(outs rclass:$rT), (ins rclass:$rA, rclass:$rB), + [(set rclass:$rT, + (or (and rclass:$rA, rclass:$rB), + (not (or rclass:$rA, rclass:$rB))))]>; + +class EQVVecPattern3: + EQVInst<(outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB), + [(set (vectype VECREG:$rT), + (not (xor (vectype VECREG:$rA), (vectype VECREG:$rB))))]>; + +class EQVRegPattern3: + EQVInst<(outs rclass:$rT), (ins rclass:$rA, rclass:$rB), + [(set rclass:$rT, (not (xor rclass:$rA, rclass:$rB)))]>; + +multiclass BitEquivalence +{ + def v16i8: EQVVecInst; + def v8i16: EQVVecInst; + def v4i32: EQVVecInst; + def v2i64: EQVVecInst; + + def v16i8_1: EQVVecPattern1; + def v8i16_1: EQVVecPattern1; + def v4i32_1: EQVVecPattern1; + def v2i64_1: EQVVecPattern1; + + def v16i8_2: EQVVecPattern2; + def v8i16_2: EQVVecPattern2; + def v4i32_2: EQVVecPattern2; + def v2i64_2: EQVVecPattern2; + + def v16i8_3: EQVVecPattern3; + def v8i16_3: EQVVecPattern3; + def v4i32_3: EQVVecPattern3; + def v2i64_3: EQVVecPattern3; + + def r128: EQVRegInst; + def r64: EQVRegInst; + def r32: EQVRegInst; + def r16: EQVRegInst; + def r8: EQVRegInst; + + def r128_1: EQVRegPattern1; + def r64_1: EQVRegPattern1; + def r32_1: EQVRegPattern1; + def r16_1: EQVRegPattern1; + def r8_1: EQVRegPattern1; + + def r128_2: EQVRegPattern2; + def r64_2: EQVRegPattern2; + def r32_2: EQVRegPattern2; + def r16_2: EQVRegPattern2; + def r8_2: EQVRegPattern2; + + def r128_3: EQVRegPattern3; + def r64_3: EQVRegPattern3; + def r32_3: EQVRegPattern3; + def r16_3: EQVRegPattern3; + def r8_3: EQVRegPattern3; +} -def : Pat<(or (and R8C:$rA, R8C:$rC), - (and R8C:$rB, (not R8C:$rC))), - (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; - -def : Pat<(or (and R8C:$rC, R8C:$rA), - (and R8C:$rB, (not R8C:$rC))), - (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; - -def : Pat<(or (and R8C:$rA, R8C:$rC), - (and (not R8C:$rC), R8C:$rB)), - (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; - -def : Pat<(or (and R8C:$rC, R8C:$rA), - (and (not R8C:$rC), R8C:$rB)), - (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; - -def : Pat<(or (and R8C:$rA, (not R8C:$rC)), - (and R8C:$rB, R8C:$rC)), - (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; - -def : Pat<(or (and R8C:$rA, (not R8C:$rC)), - (and R8C:$rC, R8C:$rB)), - (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; - -def : Pat<(or (and (not R8C:$rC), R8C:$rA), - (and R8C:$rB, R8C:$rC)), - (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; - -def : Pat<(or (and (not R8C:$rC), R8C:$rA), - (and R8C:$rC, R8C:$rB)), - (SELBr8 R8C:$rA, R8C:$rB, R8C:$rC)>; +defm EQV: BitEquivalence; //===----------------------------------------------------------------------===// // Vector shuffle... @@ -3062,7 +2769,7 @@ } class CLGTBInst pattern> : - RRForm<0b00001011010, OOL, IOL, "cgtb\t$rT, $rA, $rB", + RRForm<0b00001011010, OOL, IOL, "clgtb\t$rT, $rA, $rB", ByteOp, pattern>; multiclass CmpLGtrByte @@ -3078,7 +2785,7 @@ } class CLGTBIInst pattern> : - RI10Form<0b01111010, OOL, IOL, "cgtbi\t$rT, $rA, $val", + RI10Form<0b01111010, OOL, IOL, "clgtbi\t$rT, $rA, $val", ByteOp, pattern>; multiclass CmpLGtrByteImm @@ -3093,7 +2800,7 @@ } class CLGTHInst pattern> : - RRForm<0b00010011010, OOL, IOL, "cgth\t$rT, $rA, $rB", + RRForm<0b00010011010, OOL, IOL, "clgth\t$rT, $rA, $rB", ByteOp, pattern>; multiclass CmpLGtrHalfword @@ -3107,7 +2814,7 @@ } class CLGTHIInst pattern> : - RI10Form<0b10111010, OOL, IOL, "cgthi\t$rT, $rA, $val", + RI10Form<0b10111010, OOL, IOL, "clgthi\t$rT, $rA, $val", ByteOp, pattern>; multiclass CmpLGtrHalfwordImm @@ -3121,7 +2828,7 @@ } class CLGTInst pattern> : - RRForm<0b00000011010, OOL, IOL, "cgt\t$rT, $rA, $rB", + RRForm<0b00000011010, OOL, IOL, "clgt\t$rT, $rA, $rB", ByteOp, pattern>; multiclass CmpLGtrWord @@ -3135,7 +2842,7 @@ } class CLGTIInst pattern> : - RI10Form<0b00111010, OOL, IOL, "cgti\t$rT, $rA, $val", + RI10Form<0b00111010, OOL, IOL, "clgti\t$rT, $rA, $val", ByteOp, pattern>; multiclass CmpLGtrWordImm @@ -3146,7 +2853,7 @@ (v4i32 v4i32SExt16Imm:$val)))]>; def r32: CLGTIInst<(outs R32C:$rT), (ins R32C:$rA, s10imm_i32:$val), - [(set R32C:$rT, (setugt R32C:$rA, i32ImmSExt10:$val))]>; + [(set R32C:$rT, (setugt R32C:$rA, i32ImmSExt10:$val))]>; } defm CEQB : CmpEqualByte; @@ -3193,25 +2900,28 @@ def CLTBr8: SETCCBinOpReg; def CLTBIr8: SETCCBinOpImm; def CLTEQr8: Pat<(setle R8C:$rA, R8C:$rB), - (XORBIr8 (CGTBIr8 R8C:$rA, R8C:$rB), 0xff)>; + (XORBIr8 (CGTBr8 R8C:$rA, R8C:$rB), 0xff)>; def CLTEQIr8: Pat<(setle R8C:$rA, immU8:$imm), (XORBIr8 (CGTBIr8 R8C:$rA, immU8:$imm), 0xff)>; -def CGTEQHr16: SETCCBinOpReg; +def CGTEQHr16: SETCCBinOpReg; def CGTEQHIr16: SETCCBinOpImm; +def CLTHr16: SETCCBinOpReg; +def CLTHIr16: SETCCBinOpImm; def CLTEQr16: Pat<(setle R16C:$rA, R16C:$rB), - (XORHIr16 (CGTHIr16 R16C:$rA, R16C:$rB), 0xffff)>; -def CLTEQIr16: Pat<(setle R16C:$rA, i16ImmUns10:$imm), + (XORHIr16 (CGTHr16 R16C:$rA, R16C:$rB), 0xffff)>; +def CLTEQIr16: Pat<(setle R16C:$rA, i16ImmSExt10:$imm), (XORHIr16 (CGTHIr16 R16C:$rA, i16ImmSExt10:$imm), 0xffff)>; - -def CGTEQHr32: SETCCBinOpReg; -def CGTEQHIr32: SETCCBinOpImm; +def CGTEQHIr32: SETCCBinOpImm; +def CLTr32: SETCCBinOpReg; +def CLTIr32: SETCCBinOpImm; def CLTEQr32: Pat<(setle R32C:$rA, R32C:$rB), - (XORIr32 (CGTIr32 R32C:$rA, R32C:$rB), 0xffffffff)>; -def CLTEQIr32: Pat<(setle R32C:$rA, i32ImmUns10:$imm), + (XORIr32 (CGTr32 R32C:$rA, R32C:$rB), 0xffffffff)>; +def CLTEQIr32: Pat<(setle R32C:$rA, i32ImmSExt10:$imm), (XORIr32 (CGTIr32 R32C:$rA, i32ImmSExt10:$imm), 0xffffffff)>; def CLGTEQBr8: SETCCBinOpReg; @@ -3219,26 +2929,30 @@ def CLLTBr8: SETCCBinOpReg; def CLLTBIr8: SETCCBinOpImm; def CLLTEQr8: Pat<(setule R8C:$rA, R8C:$rB), - (XORBIr8 (CLGTBIr8 R8C:$rA, R8C:$rB), 0xff)>; + (XORBIr8 (CLGTBr8 R8C:$rA, R8C:$rB), 0xff)>; def CLLTEQIr8: Pat<(setule R8C:$rA, immU8:$imm), (XORBIr8 (CLGTBIr8 R8C:$rA, immU8:$imm), 0xff)>; -def CLGTEQHr16: SETCCBinOpReg; +def CLGTEQHr16: SETCCBinOpReg; def CLGTEQHIr16: SETCCBinOpImm; + ORr16, CLGTHIr16, CEQHIr16>; +def CLLTHr16: SETCCBinOpReg; +def CLLTHIr16: SETCCBinOpImm; def CLLTEQr16: Pat<(setule R16C:$rA, R16C:$rB), - (XORHIr16 (CLGTHIr16 R16C:$rA, R16C:$rB), 0xffff)>; + (XORHIr16 (CLGTHr16 R16C:$rA, R16C:$rB), 0xffff)>; def CLLTEQIr16: Pat<(setule R16C:$rA, i16ImmUns10:$imm), - (XORHIr16 (CLGTHIr16 R16C:$rA, i16ImmSExt10:$imm), 0xffff)>; + (XORHIr16 (CLGTHIr16 R16C:$rA, i16ImmSExt10:$imm), 0xffff)>; -def CLGTEQHr32: SETCCBinOpReg; +def CLGTEQHr32: SETCCBinOpReg; def CLGTEQHIr32: SETCCBinOpImm; + ORr32, CLGTIr32, CEQIr32>; +def CLLTr32: SETCCBinOpReg; +def CLLTIr32: SETCCBinOpImm; def CLLTEQr32: Pat<(setule R32C:$rA, R32C:$rB), - (XORIr32 (CLGTIr32 R32C:$rA, R32C:$rB), 0xffffffff)>; -def CLLTEQIr32: Pat<(setule R32C:$rA, i32ImmUns10:$imm), - (XORIr32 (CLGTIr32 R32C:$rA, i32ImmSExt10:$imm), 0xffffffff)>; + (XORIr32 (CLGTr32 R32C:$rA, R32C:$rB), 0xffffffff)>; +def CLLTEQIr32: Pat<(setule R32C:$rA, i32ImmSExt10:$imm), + (XORIr32 (CLGTIr32 R32C:$rA, i32ImmSExt10:$imm), 0xffffffff)>; //-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~ @@ -3959,8 +3673,8 @@ // General constant 32-bit vectors def : Pat<(v4i32 v4i32Imm:$imm), - (IOHLvec (v4i32 (ILHUv4i32 (HI16_vec v4i32Imm:$imm))), - (LO16_vec v4i32Imm:$imm))>; + (IOHLv4i32 (v4i32 (ILHUv4i32 (HI16_vec v4i32Imm:$imm))), + (LO16_vec v4i32Imm:$imm))>; // 8-bit constants def : Pat<(i8 imm:$imm), Modified: llvm/trunk/lib/Target/CellSPU/SPUNodes.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUNodes.td?rev=47973&r1=47972&r2=47973&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUNodes.td (original) +++ llvm/trunk/lib/Target/CellSPU/SPUNodes.td Wed Mar 5 17:02:02 2008 @@ -59,7 +59,7 @@ // FSMBI type constraints: There are several variations for the various // vector types (this avoids having to bit_convert all over the place.) def SPUfsmbi_type: SDTypeProfile<1, 1, [ - SDTCisVT<1, i32>]>; + /* SDTCisVT<1, i32> */ SDTCisInt<1>]>; // SELB type constraints: def SPUselb_type: SDTypeProfile<1, 3, [ Modified: llvm/trunk/lib/Target/CellSPU/SPUOperands.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUOperands.td?rev=47973&r1=47972&r2=47973&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUOperands.td (original) +++ llvm/trunk/lib/Target/CellSPU/SPUOperands.td Wed Mar 5 17:02:02 2008 @@ -141,7 +141,7 @@ }]>; def lo16 : PatLeaf<(imm), [{ - // hi16 predicate - returns true if the immediate has all zeros in the + // lo16 predicate - returns true if the immediate has all zeros in the // low order bits and is a 32-bit constant: if (N->getValueType(0) == MVT::i32) { uint32_t val = N->getValue(); @@ -155,8 +155,11 @@ // hi16 predicate - returns true if the immediate has all zeros in the // low order bits and is a 32-bit constant: if (N->getValueType(0) == MVT::i32) { - uint32_t val = N->getValue(); + uint32_t val = uint32_t(N->getValue()); return ((val & 0xffff0000) == val); + } else if (N->getValueType(0) == MVT::i64) { + uint64_t val = N->getValue(); + return ((val & 0xffff0000ULL) == val); } return false; @@ -503,6 +506,10 @@ let PrintMethod = "printS16ImmOperand"; } +def u16imm_i64 : Operand { + let PrintMethod = "printU16ImmOperand"; +} + def u16imm : Operand { let PrintMethod = "printU16ImmOperand"; } From asl at math.spbu.ru Wed Mar 5 17:08:16 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Mar 2008 23:08:16 -0000 Subject: [llvm-commits] [llvm] r47974 - /llvm/trunk/lib/Linker/LinkModules.cpp Message-ID: <200803052308.m25N8H5G028692@zion.cs.uiuc.edu> Author: asl Date: Wed Mar 5 17:08:16 2008 New Revision: 47974 URL: http://llvm.org/viewvc/llvm-project?rev=47974&view=rev Log: Handle functions as targets during linking of aliases as well Modified: llvm/trunk/lib/Linker/LinkModules.cpp Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=47974&r1=47973&r2=47974&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Wed Mar 5 17:08:16 2008 @@ -623,6 +623,7 @@ } else if (GlobalVariable *DGV = Dest->getGlobalVariable(SGA->getName())) { RecursiveResolveTypes(SGA->getType(), DGV->getType(), &Dest->getTypeSymbolTable(), ""); + // The only allowed way is to link alias with external declaration. if (DGV->isDeclaration()) { NewGA = new GlobalAlias(SGA->getType(), SGA->getLinkage(), @@ -649,7 +650,30 @@ } else if (Function *DF = Dest->getFunction(SGA->getName())) { RecursiveResolveTypes(SGA->getType(), DF->getType(), &Dest->getTypeSymbolTable(), ""); - assert(0 && "FIXME"); + + // The only allowed way is to link alias with external declaration. + if (DF->isDeclaration()) { + NewGA = new GlobalAlias(SGA->getType(), SGA->getLinkage(), + SGA->getName(), DAliasee, Dest); + CopyGVAttributes(NewGA, SGA); + + // Any uses of DF need to change to NewGA, with cast, if needed. + if (SGA->getType() != DF->getType()) + DF->replaceAllUsesWith(ConstantExpr::getBitCast(NewGA, + DF->getType())); + else + DF->replaceAllUsesWith(NewGA); + + // DF will conflict with NewGA because they both had the same + // name. We must erase this now so ForceRenaming doesn't assert + // because DF might not have internal linkage. + DF->eraseFromParent(); + + // Proceed to 'common' steps + } else + return Error(Err, "Alias Collision on '" + + ToStr(SGA->getType(), Src) +"':%"+SGA->getName()+ + " - symbol multiple defined"); } else { // Nothing similar found, just copy alias into destination module. From asl at math.spbu.ru Wed Mar 5 17:08:47 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Mar 2008 23:08:47 -0000 Subject: [llvm-commits] [llvm] r47975 - /llvm/trunk/lib/Linker/LinkModules.cpp Message-ID: <200803052308.m25N8ltp028714@zion.cs.uiuc.edu> Author: asl Date: Wed Mar 5 17:08:47 2008 New Revision: 47975 URL: http://llvm.org/viewvc/llvm-project?rev=47975&view=rev Log: Resolve aliases to aliasees, where possible Modified: llvm/trunk/lib/Linker/LinkModules.cpp Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=47975&r1=47974&r2=47975&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Wed Mar 5 17:08:47 2008 @@ -1159,6 +1159,9 @@ // If there were any appending global variables, link them together now. if (LinkAppendingVars(Dest, AppendingVars, ErrorMsg)) return true; + // Resolve all uses of aliases with aliasees + if (ResolveAliases(Dest)) return true; + // If the source library's module id is in the dependent library list of the // destination library, remove it since that module is now linked in. sys::Path modId; From resistor at mac.com Wed Mar 5 17:19:37 2008 From: resistor at mac.com (Owen Anderson) Date: Wed, 05 Mar 2008 23:19:37 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47976 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200803052319.m25NJcFd029026@zion.cs.uiuc.edu> Author: resistor Date: Wed Mar 5 17:19:37 2008 New Revision: 47976 URL: http://llvm.org/viewvc/llvm-project?rev=47976&view=rev Log: Reapply r47905 now that Andrew got things fixed. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47976&r1=47975&r2=47976&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Wed Mar 5 17:19:37 2008 @@ -4294,7 +4294,7 @@ C, C + 5); return true; } -#if defined(TARGET_ALPHA) +#if defined(TARGET_ALPHA) || defined(TARGET_386) //gcc uses many names for the sync intrinsics case BUILT_IN_VAL_COMPARE_AND_SWAP_1: case BUILT_IN_VAL_COMPARE_AND_SWAP_2: From resistor at mac.com Wed Mar 5 17:19:53 2008 From: resistor at mac.com (Owen Anderson) Date: Wed, 5 Mar 2008 17:19:53 -0600 Subject: [llvm-commits] [llvm-gcc-4.2] r47905 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <85dfcd7f0803051150t2cc12b60h7c1c1827415af4e4@mail.gmail.com> References: <200803042118.m24LIdd4005387@zion.cs.uiuc.edu> <85dfcd7f0803050709i70959a5bu5f395d27abed6670@mail.gmail.com> <70BE3971-F2D6-4448-AED8-544D74FC94C2@mac.com> <85dfcd7f0803051026g173c4af5sb89fded6d131d82b@mail.gmail.com> <85dfcd7f0803051150t2cc12b60h7c1c1827415af4e4@mail.gmail.com> Message-ID: Yup, it works now. Reapplying. --Owen On Mar 5, 2008, at 1:50 PM, Andrew Lenharth wrote: >> On 3/5/08, Owen Anderson wrote: >>> The exact error message was: >>> > > Would you try reenabling the sync builtins and try bootstrapping? It > should be fixed now. > > Andrew > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From asl at math.spbu.ru Wed Mar 5 17:21:40 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Mar 2008 23:21:40 -0000 Subject: [llvm-commits] [llvm] r47977 - /llvm/trunk/lib/Linker/LinkModules.cpp Message-ID: <200803052321.m25NLeim029107@zion.cs.uiuc.edu> Author: asl Date: Wed Mar 5 17:21:39 2008 New Revision: 47977 URL: http://llvm.org/viewvc/llvm-project?rev=47977&view=rev Log: Missed patch from my last commit Modified: llvm/trunk/lib/Linker/LinkModules.cpp Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=47977&r1=47976&r2=47977&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Wed Mar 5 17:21:39 2008 @@ -1046,6 +1046,16 @@ return false; } +static bool ResolveAliases(Module *Dest) { + for (Module::alias_iterator I = Dest->alias_begin(), E = Dest->alias_end(); + I != E; ++I) { + GlobalValue* GV = const_cast(I->getAliasedGlobal()); + if (!GV->isDeclaration()) + I->replaceAllUsesWith(GV); + } + + return false; +} // LinkModules - This function links two modules together, with the resulting // left module modified to be the composite of the two input modules. If an From dalej at apple.com Wed Mar 5 17:31:27 2008 From: dalej at apple.com (Dale Johannesen) Date: Wed, 05 Mar 2008 23:31:27 -0000 Subject: [llvm-commits] [llvm] r47978 - /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200803052331.m25NVRv2029409@zion.cs.uiuc.edu> Author: johannes Date: Wed Mar 5 17:31:27 2008 New Revision: 47978 URL: http://llvm.org/viewvc/llvm-project?rev=47978&view=rev Log: Next bit of PPC ByVal handling; call-site code seems correct now. Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=47978&r1=47977&r2=47978&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Wed Mar 5 17:31:27 2008 @@ -1583,7 +1583,7 @@ ((Flags & ISD::ParamFlags::ByValAlign) >> ISD::ParamFlags::ByValAlignOffs); SDOperand AlignNode = DAG.getConstant(Align, MVT::i32); SDOperand SizeNode = DAG.getConstant(Size, MVT::i32); - SDOperand AlwaysInline = DAG.getConstant(1, MVT::i32); + SDOperand AlwaysInline = DAG.getConstant(0, MVT::i32); return DAG.getMemcpy(Chain, Dst, Src, SizeNode, AlignNode, AlwaysInline); } @@ -1633,6 +1633,7 @@ // These operations are automatically eliminated by the prolog/epilog pass Chain = DAG.getCALLSEQ_START(Chain, DAG.getConstant(NumBytes, PtrVT)); + SDOperand CallSeqStart = Chain; // Set up a copy of the stack pointer for use loading and storing any // arguments that may not fit in the registers available for argument @@ -1713,13 +1714,20 @@ SDOperand AddArg = DAG.getNode(ISD::ADD, PtrVT, Arg, Const); if (GPR_idx != NumGPRs) { SDOperand Load = DAG.getLoad(PtrVT, Chain, AddArg, NULL, 0); + MemOpChains.push_back(Load.getValue(1)); RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load)); if (isMachoABI) ArgOffset += PtrByteSize; } else { SDOperand AddPtr = DAG.getNode(ISD::ADD, PtrVT, PtrOff, Const); - MemOpChains.push_back(CreateCopyOfByValArgument(AddArg, AddPtr, - Chain, Flags, DAG, Size - j)); + SDOperand MemcpyCall = CreateCopyOfByValArgument(AddArg, AddPtr, + CallSeqStart.Val->getOperand(0), + Flags, DAG, Size - j); + // This must go outside the CALLSEQ_START..END. + SDOperand NewCallSeqStart = DAG.getCALLSEQ_START(MemcpyCall, + CallSeqStart.Val->getOperand(1)); + DAG.ReplaceAllUsesWith(CallSeqStart.Val, NewCallSeqStart.Val); + CallSeqStart = NewCallSeqStart; ArgOffset += ((Size - j + 3)/4)*4; } } From dpatel at apple.com Wed Mar 5 17:39:23 2008 From: dpatel at apple.com (Devang Patel) Date: Wed, 05 Mar 2008 23:39:23 -0000 Subject: [llvm-commits] [llvm] r47980 - /llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Message-ID: <200803052339.m25NdNsN029651@zion.cs.uiuc.edu> Author: dpatel Date: Wed Mar 5 17:39:23 2008 New Revision: 47980 URL: http://llvm.org/viewvc/llvm-project?rev=47980&view=rev Log: Skip, for now, callsites where use of sret argument is not dominated by callsite. Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp?rev=47980&r1=47979&r2=47980&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Wed Mar 5 17:39:23 2008 @@ -171,6 +171,10 @@ // If FirstArg user is a GEP whose all users are not LoadInst then // this function F is not suitable for sret promotion. else if (GetElementPtrInst *GEP = dyn_cast(ArgI)) { + // TODO : Use dom info and insert PHINodes to collect get results + // from multiple call sites for this GEP. + if (GEP->getParent() != Call->getParent()) + return false; for (Value::use_iterator GEPI = GEP->use_begin(), GEPE = GEP->use_end(); GEPI != GEPE; ++GEPI) if (!isa(GEPI)) From alenhar2 at cs.uiuc.edu Wed Mar 5 17:41:38 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 05 Mar 2008 23:41:38 -0000 Subject: [llvm-commits] [llvm] r47981 - /llvm/trunk/lib/Target/CBackend/CBackend.cpp Message-ID: <200803052341.m25NfcIg029757@zion.cs.uiuc.edu> Author: alenhar2 Date: Wed Mar 5 17:41:37 2008 New Revision: 47981 URL: http://llvm.org/viewvc/llvm-project?rev=47981&view=rev Log: gcc likes things spelled correctly Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=47981&r1=47980&r2=47981&view=diff ============================================================================== --- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original) +++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Wed Mar 5 17:41:37 2008 @@ -2684,7 +2684,7 @@ return false; } case Intrinsic::memory_barrier: - Out << "__sync_syncronize()"; + Out << "__sync_synchronize()"; return true; case Intrinsic::vastart: Out << "0; "; From dag at cray.com Wed Mar 5 18:11:29 2008 From: dag at cray.com (David Greene) Date: Wed, 5 Mar 2008 18:11:29 -0600 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <2DFEE2ED-2D57-4310-8F6C-1B08F18D4363@apple.com> References: <2DFEE2ED-2D57-4310-8F6C-1B08F18D4363@apple.com> Message-ID: <200803051811.29524.dag@cray.com> On Tuesday 04 March 2008 11:30, Evan Cheng wrote: > > I'd like to understand better why Evan and Chris are some much against > > std::set? From some mails I got the impression that std::set > > implementation is very inefficient on Darwin or PowerPC? Is it > > correct? Or do you dislike that fact that std::set uses dynamic memory > > allocation extensively? > > Right, it's very malloc intensive. That's the main issue. So why not define an allocator for it? -Dave From dag at cray.com Wed Mar 5 18:19:18 2008 From: dag at cray.com (David Greene) Date: Wed, 5 Mar 2008 18:19:18 -0600 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> Message-ID: <200803051819.18406.dag@cray.com> On Wednesday 05 March 2008 11:16, Roman Levenstein wrote: > 1) I do run llvm/test tests. At the end I get some figures about the > number of PASSED and UNEXPECTEDLY FAILED tests. This is fine. But is > it guaranteed that UNEXPECTEDLY FAILED are introduced by my code or is > it possible that due to some recent changes to the repository some of > those tests just fail? If it is due to the changes in the repository, > how do I know what are the figures without my changes, so that I can > compare and see new failures introduced by my code? Are those numbers > published anywhere, may be in the nightly tests results??? Or should I > basically have to source trees: one for repository version and one for > my local modifications and then run tests under both trees? I find that the repository breaks rather a a lot. So what I do is keep two working copies: one official one and one with my changes. I run tests on both and compare the results. Yep, it's a pain. :( -Dave From evan.cheng at apple.com Wed Mar 5 20:11:43 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 06 Mar 2008 02:11:43 -0000 Subject: [llvm-commits] [test-suite] r47983 - /test-suite/trunk/RunSafely.sh Message-ID: <200803060211.m262BhfP001665@zion.cs.uiuc.edu> Author: evancheng Date: Wed Mar 5 20:11:43 2008 New Revision: 47983 URL: http://llvm.org/viewvc/llvm-project?rev=47983&view=rev Log: Re-apply fix for PR1437 that I accidentially removed. Modified: test-suite/trunk/RunSafely.sh Modified: test-suite/trunk/RunSafely.sh URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/RunSafely.sh?rev=47983&r1=47982&r2=47983&view=diff ============================================================================== --- test-suite/trunk/RunSafely.sh (original) +++ test-suite/trunk/RunSafely.sh Wed Mar 5 20:11:43 2008 @@ -105,7 +105,7 @@ fi if [ "x$RHOST" = x ] ; then - ( sh -c "$ULIMITCMD"; time -p sh -c "$COMMAND >$OUTFILE 2>&1 < $INFILE" ; echo exit $? ) 2>&1 \ + ( sh -c "$ULIMITCMD"; time -p "$COMMAND >$OUTFILE 2>&1 < $INFILE" ; echo exit $? ) 2>&1 \ | awk -- '\ BEGIN { cpu = 0.0; } /^user/ { cpu += $2; print; } From dalej at apple.com Wed Mar 5 20:50:06 2008 From: dalej at apple.com (Dale Johannesen) Date: Thu, 06 Mar 2008 02:50:06 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47984 - in /llvm-gcc-4.2/trunk/gcc: config/i386/llvm-i386-target.h llvm-abi.h llvm-convert.cpp llvm-types.cpp Message-ID: <200803060250.m262o6QI002666@zion.cs.uiuc.edu> Author: johannes Date: Wed Mar 5 20:50:05 2008 New Revision: 47984 URL: http://llvm.org/viewvc/llvm-project?rev=47984&view=rev Log: Believe it or not, MMX builtins use a different calling convention from non-builtins on Darwin x86-32. Fix builtins. Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386-target.h llvm-gcc-4.2/trunk/gcc/llvm-abi.h llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386-target.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386-target.h?rev=47984&r1=47983&r2=47984&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386-target.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386-target.h Wed Mar 5 20:50:05 2008 @@ -100,8 +100,9 @@ /* The MMX vector v1i64 is returned in EAX and EDX on Darwin. Communicate this by returning i64 here. */ -#define LLVM_SHOULD_RETURN_VECTOR_AS_SCALAR(X) \ +#define LLVM_SHOULD_RETURN_VECTOR_AS_SCALAR(X,isBuiltin)\ ((TARGET_MACHO && \ + !isBuiltin && \ !TARGET_64BIT && \ TREE_CODE(X) == VECTOR_TYPE && \ TYPE_SIZE(X) && \ @@ -111,8 +112,9 @@ /* MMX vectors v2i32, v4i16, v8i8, v2f32 are returned using sret on Darwin 32-bit. */ -#define LLVM_SHOULD_RETURN_VECTOR_AS_SHADOW(X) \ +#define LLVM_SHOULD_RETURN_VECTOR_AS_SHADOW(X,isBuiltin)\ ((TARGET_MACHO && \ + !isBuiltin && \ !TARGET_64BIT && \ TREE_CODE(X) == VECTOR_TYPE && \ TYPE_SIZE(X) && \ Modified: llvm-gcc-4.2/trunk/gcc/llvm-abi.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-abi.h?rev=47984&r1=47983&r2=47984&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-abi.h (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-abi.h Wed Mar 5 20:50:05 2008 @@ -199,7 +199,7 @@ // should be returned using the convention for that scalar TYPE, 0 otherwise. // X may be evaluated more than once. #ifndef LLVM_SHOULD_RETURN_VECTOR_AS_SCALAR -#define LLVM_SHOULD_RETURN_VECTOR_AS_SCALAR(X) 0 +#define LLVM_SHOULD_RETURN_VECTOR_AS_SCALAR(X,Y) 0 #endif // LLVM_SHOULD_RETURN_VECTOR_AS_SHADOW - Return true if this vector type @@ -226,14 +226,16 @@ /// return type. It potentially breaks down the argument and invokes methods /// on the client that indicate how its pieces should be handled. This /// handles things like returning structures via hidden parameters. - void HandleReturnType(tree type) { + void HandleReturnType(tree type, bool isBuiltin) { const Type *Ty = ConvertType(type); if (Ty->getTypeID() == Type::VectorTyID) { - // Vector handling is weird on x86. - tree ScalarType = LLVM_SHOULD_RETURN_VECTOR_AS_SCALAR(type); + // Vector handling is weird on x86. In particular builtin and + // non-builtin function of the same return types can use different + // calling conventions. + tree ScalarType = LLVM_SHOULD_RETURN_VECTOR_AS_SCALAR(type, isBuiltin); if (ScalarType) C.HandleAggregateResultAsScalar(ConvertType(ScalarType)); - else if (LLVM_SHOULD_RETURN_VECTOR_AS_SHADOW(type)) + else if (LLVM_SHOULD_RETURN_VECTOR_AS_SHADOW(type, isBuiltin)) C.HandleAggregateShadowArgument(PointerType::getUnqual(Ty), false); else C.HandleScalarResult(Ty); Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=47984&r1=47983&r2=47984&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Wed Mar 5 20:50:05 2008 @@ -660,7 +660,8 @@ TheLLVMABI ABIConverter(Client); // Handle the DECL_RESULT. - ABIConverter.HandleReturnType(TREE_TYPE(TREE_TYPE(FnDecl))); + ABIConverter.HandleReturnType(TREE_TYPE(TREE_TYPE(FnDecl)), + DECL_BUILT_IN(FnDecl)); // Prepend the static chain (if any) to the list of arguments. tree Args = static_chain ? static_chain : DECL_ARGUMENTS(FnDecl); @@ -2493,7 +2494,9 @@ TheLLVMABI ABIConverter(Client); // Handle the result, including struct returns. - ABIConverter.HandleReturnType(TREE_TYPE(exp)); + tree fndecl = get_callee_fndecl(exp); + ABIConverter.HandleReturnType(TREE_TYPE(exp), + fndecl ? DECL_BUILT_IN(fndecl) : false); // Pass the static chain, if any, as the first parameter. if (TREE_OPERAND(exp, 2)) Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-types.cpp?rev=47984&r1=47983&r2=47984&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-types.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Wed Mar 5 20:50:05 2008 @@ -1044,7 +1044,8 @@ FunctionTypeConversion Client(RetTy, ArgTys, CallingConv, true /*K&R*/); TheLLVMABI ABIConverter(Client); - ABIConverter.HandleReturnType(ReturnType); + // Builtins are always prototyped, so this isn't one. + ABIConverter.HandleReturnType(ReturnType, false); ParamAttrsVector Attrs; @@ -1098,7 +1099,8 @@ FunctionTypeConversion Client(RetTy, ArgTypes, CallingConv, false/*not K&R*/); TheLLVMABI ABIConverter(Client); - ABIConverter.HandleReturnType(TREE_TYPE(type)); + ABIConverter.HandleReturnType(TREE_TYPE(type), + decl ? DECL_BUILT_IN(decl) : false); // Allow the target to set the CC for things like fastcall etc. #ifdef TARGET_ADJUST_LLVM_CC From clattner at apple.com Wed Mar 5 21:52:04 2008 From: clattner at apple.com (Chris Lattner) Date: Wed, 5 Mar 2008 19:52:04 -0800 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <200803051811.29524.dag@cray.com> References: <2DFEE2ED-2D57-4310-8F6C-1B08F18D4363@apple.com> <200803051811.29524.dag@cray.com> Message-ID: <0E45612C-5CFA-4DE0-A685-09D648FBF204@apple.com> On Mar 5, 2008, at 4:11 PM, David Greene wrote: > On Tuesday 04 March 2008 11:30, Evan Cheng wrote: > >>> I'd like to understand better why Evan and Chris are some much >>> against >>> std::set? From some mails I got the impression that std::set >>> implementation is very inefficient on Darwin or PowerPC? Is it >>> correct? Or do you dislike that fact that std::set uses dynamic >>> memory >>> allocation extensively? >> >> Right, it's very malloc intensive. That's the main issue. > > So why not define an allocator for it? See the previous response. -Chris From scottm at aero.org Wed Mar 5 22:02:54 2008 From: scottm at aero.org (Scott Michel) Date: Thu, 06 Mar 2008 04:02:54 -0000 Subject: [llvm-commits] [llvm] r47985 - in /llvm/trunk: lib/Target/CellSPU/SPUISelLowering.cpp test/CodeGen/CellSPU/immed64.ll Message-ID: <200803060402.m2642snO004605@zion.cs.uiuc.edu> Author: pingbak Date: Wed Mar 5 22:02:54 2008 New Revision: 47985 URL: http://llvm.org/viewvc/llvm-project?rev=47985&view=rev Log: Refine Cell's i64 constant generation code to cover more constants where the upper and lower 32-bits are the same (in addition to 0 and -1 previously.) Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp llvm/trunk/test/CodeGen/CellSPU/immed64.ll Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=47985&r1=47984&r2=47985&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Wed Mar 5 22:02:54 2008 @@ -1354,6 +1354,14 @@ MVT::ValueType ValueType) { if (ConstantSDNode *CN = getVecImm(N)) { uint64_t Value = CN->getValue(); + if (ValueType == MVT::i64) { + uint64_t UValue = CN->getValue(); + uint32_t upper = uint32_t(UValue >> 32); + uint32_t lower = uint32_t(UValue); + if (upper != lower) + return SDOperand(); + Value = Value >> 32; + } if (Value <= 0x3ffff) return DAG.getConstant(Value, ValueType); } @@ -1368,6 +1376,14 @@ MVT::ValueType ValueType) { if (ConstantSDNode *CN = getVecImm(N)) { int64_t Value = CN->getSignExtended(); + if (ValueType == MVT::i64) { + uint64_t UValue = CN->getValue(); + uint32_t upper = uint32_t(UValue >> 32); + uint32_t lower = uint32_t(UValue); + if (upper != lower) + return SDOperand(); + Value = Value >> 32; + } if (Value >= -(1 << 15) && Value <= ((1 << 15) - 1)) { return DAG.getConstant(Value, ValueType); } @@ -1383,6 +1399,14 @@ MVT::ValueType ValueType) { if (ConstantSDNode *CN = getVecImm(N)) { int64_t Value = CN->getSignExtended(); + if (ValueType == MVT::i64) { + uint64_t UValue = CN->getValue(); + uint32_t upper = uint32_t(UValue >> 32); + uint32_t lower = uint32_t(UValue); + if (upper != lower) + return SDOperand(); + Value = Value >> 32; + } if (isS10Constant(Value)) return DAG.getConstant(Value, ValueType); } @@ -1626,13 +1650,10 @@ uint32_t upper = uint32_t(val >> 32); uint32_t lower = uint32_t(val); - if (val == 0) { - SDOperand Zero = DAG.getTargetConstant(0, MVT::i64); - return DAG.getNode(ISD::BUILD_VECTOR, VT, Zero, Zero); - } else if (val == 0xffffffffffffffffULL) { - // For -1, this and has a chance of matching immAllOnesV. - SDOperand NegOne = DAG.getTargetConstant(-1, MVT::i64); - return DAG.getNode(ISD::BUILD_VECTOR, VT, NegOne, NegOne); + if (upper == lower) { + // Magic constant that can be matched by IL, ILA, et. al. + SDOperand Val = DAG.getTargetConstant(val, MVT::i64); + return DAG.getNode(ISD::BUILD_VECTOR, VT, Val, Val); } else { SDOperand LO32; SDOperand HI32; Modified: llvm/trunk/test/CodeGen/CellSPU/immed64.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/immed64.ll?rev=47985&r1=47984&r2=47985&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/immed64.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/immed64.ll Wed Mar 5 22:02:54 2008 @@ -1,6 +1,6 @@ ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s ; RUN: grep lqa %t1.s | count 13 -; RUN: grep il %t1.s | count 21 +; RUN: grep il %t1.s | count 22 ; RUN: grep shufb %t1.s | count 13 ; RUN: grep 65520 %t1.s | count 1 ; RUN: grep 43981 %t1.s | count 1 @@ -57,6 +57,10 @@ ret i64 -1 ;; IL } +define i64 @i64_const_10() { + ret i64 281470681808895 ;; IL 65535 +} + ; 0x4005bf0a8b145769 -> ; (ILHU 0x4005 [16389]/IOHL 0xbf0a [48906]) ; (ILHU 0x8b14 [35604]/IOHL 0x5769 [22377]) From nicholas at mxc.ca Thu Mar 6 00:48:30 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Thu, 06 Mar 2008 06:48:30 -0000 Subject: [llvm-commits] [llvm] r47987 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/rem.ll Message-ID: <200803060648.m266mUMB009110@zion.cs.uiuc.edu> Author: nicholas Date: Thu Mar 6 00:48:30 2008 New Revision: 47987 URL: http://llvm.org/viewvc/llvm-project?rev=47987&view=rev Log: Don't try to simplify urem and srem using arithmetic rules that don't work under modulo (overflow). Fixes PR1933. Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp llvm/trunk/test/Transforms/InstCombine/rem.ll Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=47987&r1=47986&r2=47987&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Thu Mar 6 00:48:30 2008 @@ -834,6 +834,49 @@ return; } break; + case Instruction::SRem: + if (ConstantInt *Rem = dyn_cast(I->getOperand(1))) { + APInt RA = Rem->getValue(); + if (RA.isPowerOf2() || (-RA).isPowerOf2()) { + APInt LowBits = RA.isStrictlyPositive() ? ((RA - 1) | RA) : ~RA; + APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); + ComputeMaskedBits(I->getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); + + // The sign of a remainder is equal to the sign of the first + // operand (zero being positive). + if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) + KnownZero2 |= ~LowBits; + else if (KnownOne2[BitWidth-1]) + KnownOne2 |= ~LowBits; + + KnownZero |= KnownZero2 & Mask; + KnownOne |= KnownOne2 & Mask; + + assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); + } + } + break; + case Instruction::URem: + if (ConstantInt *Rem = dyn_cast(I->getOperand(1))) { + APInt RA = Rem->getValue(); + if (RA.isStrictlyPositive() && RA.isPowerOf2()) { + APInt LowBits = (RA - 1) | RA; + APInt Mask2 = LowBits & Mask; + KnownZero |= ~LowBits & Mask; + ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); + assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); + } + } else { + // Since the result is less than or equal to RHS, any leading zero bits + // in RHS must also exist in the result. + APInt AllOnes = APInt::getAllOnesValue(BitWidth); + ComputeMaskedBits(I->getOperand(1), AllOnes, KnownZero2, KnownOne2, Depth+1); + + uint32_t Leaders = KnownZero2.countLeadingOnes(); + KnownZero |= APInt::getHighBitsSet(BitWidth, Leaders) & Mask; + assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); + } + break; } } @@ -1418,6 +1461,52 @@ } } break; + case Instruction::SRem: + if (ConstantInt *Rem = dyn_cast(I->getOperand(1))) { + APInt RA = Rem->getValue(); + if (RA.isPowerOf2() || (-RA).isPowerOf2()) { + APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) | RA : ~RA; + APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); + if (SimplifyDemandedBits(I->getOperand(0), Mask2, + LHSKnownZero, LHSKnownOne, Depth+1)) + return true; + + if (LHSKnownZero[BitWidth-1] || ((LHSKnownZero & LowBits) == LowBits)) + LHSKnownZero |= ~LowBits; + else if (LHSKnownOne[BitWidth-1]) + LHSKnownOne |= ~LowBits; + + KnownZero |= LHSKnownZero & DemandedMask; + KnownOne |= LHSKnownOne & DemandedMask; + + assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); + } + } + break; + case Instruction::URem: + if (ConstantInt *Rem = dyn_cast(I->getOperand(1))) { + APInt RA = Rem->getValue(); + if (RA.isPowerOf2()) { + APInt LowBits = (RA - 1) | RA; + APInt Mask2 = LowBits & DemandedMask; + KnownZero |= ~LowBits & DemandedMask; + if (SimplifyDemandedBits(I->getOperand(0), Mask2, + KnownZero, KnownOne, Depth+1)) + return true; + + assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); + } + } else { + APInt KnownZero2(BitWidth, 0), KnownOne2(BitWidth, 0); + APInt AllOnes = APInt::getAllOnesValue(BitWidth); + if (SimplifyDemandedBits(I->getOperand(1), AllOnes, + KnownZero2, KnownOne2, Depth+1)) + return true; + + uint32_t Leaders = KnownZero2.countLeadingOnes(); + KnownZero |= APInt::getHighBitsSet(BitWidth, Leaders) & DemandedMask; + } + break; } // If the client is only demanding bits that we know, return the known @@ -2780,46 +2869,6 @@ return commonDivTransforms(I); } -/// GetFactor - If we can prove that the specified value is at least a multiple -/// of some factor, return that factor. -static Constant *GetFactor(Value *V) { - if (ConstantInt *CI = dyn_cast(V)) - return CI; - - // Unless we can be tricky, we know this is a multiple of 1. - Constant *Result = ConstantInt::get(V->getType(), 1); - - Instruction *I = dyn_cast(V); - if (!I) return Result; - - if (I->getOpcode() == Instruction::Mul) { - // Handle multiplies by a constant, etc. - return ConstantExpr::getMul(GetFactor(I->getOperand(0)), - GetFactor(I->getOperand(1))); - } else if (I->getOpcode() == Instruction::Shl) { - // (X< X * (1 << C) - if (Constant *ShRHS = dyn_cast(I->getOperand(1))) { - ShRHS = ConstantExpr::getShl(Result, ShRHS); - return ConstantExpr::getMul(GetFactor(I->getOperand(0)), ShRHS); - } - } else if (I->getOpcode() == Instruction::And) { - if (ConstantInt *RHS = dyn_cast(I->getOperand(1))) { - // X & 0xFFF0 is known to be a multiple of 16. - uint32_t Zeros = RHS->getValue().countTrailingZeros(); - if (Zeros != V->getType()->getPrimitiveSizeInBits())// don't shift by "32" - return ConstantExpr::getShl(Result, - ConstantInt::get(Result->getType(), Zeros)); - } - } else if (CastInst *CI = dyn_cast(I)) { - // Only handle int->int casts. - if (!CI->isIntegerCast()) - return Result; - Value *Op = CI->getOperand(0); - return ConstantExpr::getCast(CI->getOpcode(), GetFactor(Op), V->getType()); - } - return Result; -} - /// This function implements the transforms on rem instructions that work /// regardless of the kind of rem instruction it is (urem, srem, or frem). It /// is used by the visitors to those instructions. @@ -2901,9 +2950,13 @@ if (Instruction *NV = FoldOpIntoPhi(I)) return NV; } - // (X * C1) % C2 --> 0 iff C1 % C2 == 0 - if (ConstantExpr::getSRem(GetFactor(Op0I), RHS)->isNullValue()) - return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType())); + + // See if we can fold away this rem instruction. + uint32_t BitWidth = cast(I.getType())->getBitWidth(); + APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0); + if (SimplifyDemandedBits(&I, APInt::getAllOnesValue(BitWidth), + KnownZero, KnownOne)) + return &I; } } Modified: llvm/trunk/test/Transforms/InstCombine/rem.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/rem.ll?rev=47987&r1=47986&r2=47987&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/rem.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/rem.ll Thu Mar 6 00:48:30 2008 @@ -1,76 +1,83 @@ ; This test makes sure that these instructions are properly eliminated. ; ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep rem +; END. define i32 @test1(i32 %A) { - %B = srem i32 %A, 1 ; [#uses=1] + %B = srem i32 %A, 1 ; ISA constant 0 ret i32 %B } -define i32 @test2(i32 %A) { - %B = srem i32 0, %A ; [#uses=1] +define i32 @test2(i32 %A) { ; 0 % X = 0, we don't need to preserve traps + %B = srem i32 0, %A ret i32 %B } define i32 @test3(i32 %A) { - %B = urem i32 %A, 8 ; [#uses=1] + %B = urem i32 %A, 8 ret i32 %B } define i1 @test3a(i32 %A) { - %B = srem i32 %A, -8 ; [#uses=1] - %C = icmp ne i32 %B, 0 ; [#uses=1] + %B = srem i32 %A, -8 + %C = icmp ne i32 %B, 0 ret i1 %C } define i32 @test4(i32 %X, i1 %C) { - %V = select i1 %C, i32 1, i32 8 ; [#uses=1] - %R = urem i32 %X, %V ; [#uses=1] + %V = select i1 %C, i32 1, i32 8 + %R = urem i32 %X, %V ret i32 %R } define i32 @test5(i32 %X, i8 %B) { - %shift.upgrd.1 = zext i8 %B to i32 ; [#uses=1] - %Amt = shl i32 32, %shift.upgrd.1 ; [#uses=1] - %V = urem i32 %X, %Amt ; [#uses=1] + %shift.upgrd.1 = zext i8 %B to i32 + %Amt = shl i32 32, %shift.upgrd.1 + %V = urem i32 %X, %Amt ret i32 %V } define i32 @test6(i32 %A) { - %B = srem i32 %A, 0 ; [#uses=1] + %B = srem i32 %A, 0 ;; undef ret i32 %B } define i32 @test7(i32 %A) { - %B = mul i32 %A, 26 ; [#uses=1] - %C = srem i32 %B, 13 ; [#uses=1] + %B = mul i32 %A, 8 + %C = srem i32 %B, 4 ret i32 %C } define i32 @test8(i32 %A) { - %B = shl i32 %A, 4 ; [#uses=1] - %C = srem i32 %B, 8 ; [#uses=1] + %B = shl i32 %A, 4 + %C = srem i32 %B, 8 ret i32 %C } define i32 @test9(i32 %A) { - %B = mul i32 %A, 124 ; [#uses=1] - %C = urem i32 %B, 62 ; [#uses=1] + %B = mul i32 %A, 64 + %C = urem i32 %B, 32 ret i32 %C } define i32 @test10(i8 %c) { - %tmp.1 = zext i8 %c to i32 ; [#uses=1] - %tmp.2 = mul i32 %tmp.1, 3 ; [#uses=1] - %tmp.3 = sext i32 %tmp.2 to i64 ; [#uses=1] - %tmp.5 = urem i64 %tmp.3, 3 ; [#uses=1] - %tmp.6 = trunc i64 %tmp.5 to i32 ; [#uses=1] + %tmp.1 = zext i8 %c to i32 + %tmp.2 = mul i32 %tmp.1, 4 + %tmp.3 = sext i32 %tmp.2 to i64 + %tmp.5 = urem i64 %tmp.3, 4 + %tmp.6 = trunc i64 %tmp.5 to i32 ret i32 %tmp.6 } define i32 @test11(i32 %i) { - %tmp.1 = and i32 %i, -2 ; [#uses=1] - %tmp.3 = mul i32 %tmp.1, 3 ; [#uses=1] - %tmp.5 = srem i32 %tmp.3, 6 ; [#uses=1] + %tmp.1 = and i32 %i, -2 + %tmp.3 = mul i32 %tmp.1, 2 + %tmp.5 = urem i32 %tmp.3, 4 + ret i32 %tmp.5 +} + +define i32 @test12(i32 %i) { + %tmp.1 = and i32 %i, -4 + %tmp.5 = srem i32 %tmp.1, 2 ret i32 %tmp.5 } From nicholas at mxc.ca Thu Mar 6 00:50:04 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Thu, 06 Mar 2008 06:50:04 -0000 Subject: [llvm-commits] [llvm] r47988 - /llvm/trunk/test/Transforms/InstCombine/2008-02-13-MulURem.ll Message-ID: <200803060650.m266o4fJ009193@zion.cs.uiuc.edu> Author: nicholas Date: Thu Mar 6 00:50:03 2008 New Revision: 47988 URL: http://llvm.org/viewvc/llvm-project?rev=47988&view=rev Log: Commit the testcase too. Added: llvm/trunk/test/Transforms/InstCombine/2008-02-13-MulURem.ll Added: llvm/trunk/test/Transforms/InstCombine/2008-02-13-MulURem.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-02-13-MulURem.ll?rev=47988&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2008-02-13-MulURem.ll (added) +++ llvm/trunk/test/Transforms/InstCombine/2008-02-13-MulURem.ll Thu Mar 6 00:50:03 2008 @@ -0,0 +1,8 @@ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep rem +; PR1933 + +define i32 @fold(i32 %a) { + %s = mul i32 %a, 3 + %c = urem i32 %s, 3 + ret i32 %c +} From nicholas at mxc.ca Thu Mar 6 00:54:53 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Thu, 06 Mar 2008 06:54:53 -0000 Subject: [llvm-commits] [llvm] r47989 - /llvm/trunk/include/llvm/Support/CFG.h Message-ID: <200803060654.m266ssHY009370@zion.cs.uiuc.edu> Author: nicholas Date: Thu Mar 6 00:54:53 2008 New Revision: 47989 URL: http://llvm.org/viewvc/llvm-project?rev=47989&view=rev Log: Treat BBs that use BBs as proper predecessors and successors in the CFG. Modified: llvm/trunk/include/llvm/Support/CFG.h Modified: llvm/trunk/include/llvm/Support/CFG.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CFG.h?rev=47989&r1=47988&r2=47989&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/CFG.h (original) +++ llvm/trunk/include/llvm/Support/CFG.h Thu Mar 6 00:54:53 2008 @@ -34,14 +34,14 @@ typedef PredIterator<_Ptr,_USE_iterator> _Self; typedef typename super::pointer pointer; - inline void advancePastNonTerminators() { - // Loop to ignore non terminator uses (for example PHI nodes)... - while (!It.atEnd() && !isa(*It)) + inline void advancePastNonPreds() { + // Loop to ignore non predecessor uses (for example PHI nodes)... + while (!It.atEnd() && !isa(*It) && !isa(*It)) ++It; } inline PredIterator(_Ptr *bb) : It(bb->use_begin()) { - advancePastNonTerminators(); + advancePastNonPreds(); } inline PredIterator(_Ptr *bb, bool) : It(bb->use_end()) {} @@ -50,13 +50,16 @@ inline pointer operator*() const { assert(!It.atEnd() && "pred_iterator out of range!"); - return cast(*It)->getParent(); + if (isa(*It)) // not dyn_cast due to const-correctness + return cast(*It)->getParent(); + + return cast<_Ptr>(*It); } inline pointer *operator->() const { return &(operator*()); } inline _Self& operator++() { // Preincrement assert(!It.atEnd() && "pred_iterator out of range!"); - ++It; advancePastNonTerminators(); + ++It; advancePastNonPreds(); return *this; } @@ -100,6 +103,8 @@ inline SuccIterator(Term_ T, bool) // end iterator : Term(T), idx(Term->getNumSuccessors()) { assert(T && "getTerminator returned null!"); + if (Term->getParent()->getUnwindDest()) + ++idx; } inline const _Self &operator=(const _Self &I) { @@ -115,7 +120,12 @@ inline bool operator==(const _Self& x) const { return idx == x.idx; } inline bool operator!=(const _Self& x) const { return !operator==(x); } - inline pointer operator*() const { return Term->getSuccessor(idx); } + inline pointer operator*() const { + if (idx == Term->getNumSuccessors()) + return Term->getParent()->getUnwindDest(); + + return Term->getSuccessor(idx); + } inline pointer operator->() const { return operator*(); } inline _Self& operator++() { ++idx; return *this; } // Preincrement From nicholas at mxc.ca Thu Mar 6 00:55:58 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Thu, 06 Mar 2008 06:55:58 -0000 Subject: [llvm-commits] [llvm] r47990 - /llvm/trunk/test/Feature/unwindto.ll Message-ID: <200803060655.m266txYh009409@zion.cs.uiuc.edu> Author: nicholas Date: Thu Mar 6 00:55:58 2008 New Revision: 47990 URL: http://llvm.org/viewvc/llvm-project?rev=47990&view=rev Log: Exercise the new CFG change. Modified: llvm/trunk/test/Feature/unwindto.ll Modified: llvm/trunk/test/Feature/unwindto.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Feature/unwindto.ll?rev=47990&r1=47989&r2=47990&view=diff ============================================================================== --- llvm/trunk/test/Feature/unwindto.ll (original) +++ llvm/trunk/test/Feature/unwindto.ll Thu Mar 6 00:55:58 2008 @@ -52,3 +52,16 @@ unwind: unwind_to %unwind unwind } + +define i8 @test7(i1 %b) { +entry: unwind_to %cleanup + br i1 %b, label %cond_true, label %cond_false +cond_true: unwind_to %cleanup + br label %cleanup +cond_false: unwind_to %cleanup + br label %cleanup +cleanup: + %x = phi i8 [0, %entry], [1, %cond_true], [1, %cond_true], + [2, %cond_false], [2, %cond_false] + ret i8 %x +} From evan.cheng at apple.com Thu Mar 6 02:20:52 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 06 Mar 2008 08:20:52 -0000 Subject: [llvm-commits] [llvm] r47992 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAG.cpp test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll Message-ID: <200803060820.m268Kq7F011912@zion.cs.uiuc.edu> Author: evancheng Date: Thu Mar 6 02:20:51 2008 New Revision: 47992 URL: http://llvm.org/viewvc/llvm-project?rev=47992&view=rev Log: Constant fold SIGN_EXTEND_INREG with ashr not lshr. Added: llvm/trunk/test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=47992&r1=47991&r2=47992&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Mar 6 02:20:51 2008 @@ -2029,7 +2029,7 @@ APInt Val = N1C->getAPIntValue(); unsigned FromBits = MVT::getSizeInBits(cast(N2)->getVT()); Val <<= Val.getBitWidth()-FromBits; - Val = Val.lshr(Val.getBitWidth()-FromBits); + Val = Val.ashr(Val.getBitWidth()-FromBits); return getConstant(Val, VT); } break; Added: llvm/trunk/test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll?rev=47992&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll (added) +++ llvm/trunk/test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll Thu Mar 6 02:20:51 2008 @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | not grep 255 + +define i32 @main(i32 %argc, i8** %argv) { +entry: + br label %bb1 +bb1: ; preds = %entry + %tmp3.i.i = load i8* null, align 1 ; [#uses=1] + %tmp4.i.i = icmp slt i8 %tmp3.i.i, 0 ; [#uses=1] + br i1 %tmp4.i.i, label %bb2, label %bb3 +bb2: ; preds = %bb1 + ret i32 1 +bb3: ; preds = %bb1 + ret i32 0 +} From evan.cheng at apple.com Thu Mar 6 03:02:51 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 06 Mar 2008 09:02:51 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r47993 - /llvm-gcc-4.2/trunk/gcc/llvm-abi.h Message-ID: <200803060902.m2692pXw020755@zion.cs.uiuc.edu> Author: evancheng Date: Thu Mar 6 03:02:51 2008 New Revision: 47993 URL: http://llvm.org/viewvc/llvm-project?rev=47993&view=rev Log: LLVM_SHOULD_RETURN_VECTOR_AS_SHADOW takes two arguments. Modified: llvm-gcc-4.2/trunk/gcc/llvm-abi.h Modified: llvm-gcc-4.2/trunk/gcc/llvm-abi.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-abi.h?rev=47993&r1=47992&r2=47993&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-abi.h (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-abi.h Thu Mar 6 03:02:51 2008 @@ -206,7 +206,7 @@ // should be returned using the aggregate shadow (sret) convention, 0 otherwise. // X may be evaluated more than once. #ifndef LLVM_SHOULD_RETURN_VECTOR_AS_SHADOW -#define LLVM_SHOULD_RETURN_VECTOR_AS_SHADOW(X) 0 +#define LLVM_SHOULD_RETURN_VECTOR_AS_SHADOW(X,Y) 0 #endif /// DefaultABI - This class implements the default LLVM ABI where structures are From ggreif at gmail.com Thu Mar 6 04:36:01 2008 From: ggreif at gmail.com (Gabor Greif) Date: Thu, 06 Mar 2008 10:36:01 -0000 Subject: [llvm-commits] [llvm] r47994 - in /llvm/trunk: include/llvm/Transforms/Instrumentation.h lib/Transforms/Instrumentation/ProfilingUtils.cpp lib/Transforms/Instrumentation/ProfilingUtils.h Message-ID: <200803061036.m26Aa1mQ023835@zion.cs.uiuc.edu> Author: ggreif Date: Thu Mar 6 04:36:00 2008 New Revision: 47994 URL: http://llvm.org/viewvc/llvm-project?rev=47994&view=rev Log: fix typos Modified: llvm/trunk/include/llvm/Transforms/Instrumentation.h llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.h Modified: llvm/trunk/include/llvm/Transforms/Instrumentation.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Instrumentation.h?rev=47994&r1=47993&r2=47994&view=diff ============================================================================== --- llvm/trunk/include/llvm/Transforms/Instrumentation.h (original) +++ llvm/trunk/include/llvm/Transforms/Instrumentation.h Thu Mar 6 04:36:00 2008 @@ -7,7 +7,7 @@ // //===----------------------------------------------------------------------===// // -// This files defines constructor functions for instrumentation passes. +// This file defines constructor functions for instrumentation passes. // //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp?rev=47994&r1=47993&r2=47994&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp (original) +++ llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp Thu Mar 6 04:36:00 2008 @@ -7,7 +7,7 @@ // //===----------------------------------------------------------------------===// // -// This files implements a few helper functions which are used by profile +// This file implements a few helper functions which are used by profile // instrumentation code to instrument the code. This allows the profiler pass // to worry about *what* to insert, and these functions take care of *how* to do // it. Modified: llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.h?rev=47994&r1=47993&r2=47994&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.h (original) +++ llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.h Thu Mar 6 04:36:00 2008 @@ -7,7 +7,7 @@ // //===----------------------------------------------------------------------===// // -// This files defines a few helper functions which are used by profile +// This file defines a few helper functions which are used by profile // instrumentation code to instrument the code. This allows the profiler pass // to worry about *what* to insert, and these functions take care of *how* to do // it. From ggreif at gmail.com Thu Mar 6 04:51:22 2008 From: ggreif at gmail.com (Gabor Greif) Date: Thu, 06 Mar 2008 10:51:22 -0000 Subject: [llvm-commits] [llvm] r47996 - in /llvm/trunk: lib/CodeGen/StrongPHIElimination.cpp lib/Target/X86/README.txt test/CodeGen/Generic/2006-08-30-CoalescerCrash.ll test/CodeGen/Generic/2006-08-30-CoallescerCrash.ll Message-ID: <200803061051.m26ApMx3024276@zion.cs.uiuc.edu> Author: ggreif Date: Thu Mar 6 04:51:21 2008 New Revision: 47996 URL: http://llvm.org/viewvc/llvm-project?rev=47996&view=rev Log: some more spelling changes Added: llvm/trunk/test/CodeGen/Generic/2006-08-30-CoalescerCrash.ll - copied unchanged from r47993, llvm/trunk/test/CodeGen/Generic/2006-08-30-CoallescerCrash.ll Removed: llvm/trunk/test/CodeGen/Generic/2006-08-30-CoallescerCrash.ll Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp llvm/trunk/lib/Target/X86/README.txt Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=47996&r1=47995&r2=47996&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original) +++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Thu Mar 6 04:51:21 2008 @@ -522,7 +522,7 @@ } } -/// processPHIUnion - Take a set of candidate registers to be coallesced when +/// processPHIUnion - Take a set of candidate registers to be coalesced when /// decomposing the PHI instruction. Use the DominanceForest to remove the ones /// that are known to interfere, and flag others that need to be checked for /// local interferences. Modified: llvm/trunk/lib/Target/X86/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=47996&r1=47995&r2=47996&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README.txt (original) +++ llvm/trunk/lib/Target/X86/README.txt Thu Mar 6 04:51:21 2008 @@ -1693,7 +1693,7 @@ subl %ecx, %eax ret -The coallescer could coallesce "edx" with "eax" to avoid the movl in LBB1_2 +The coalescer could coalesce "edx" with "eax" to avoid the movl in LBB1_2 if it commuted the addl in LBB1_1. //===---------------------------------------------------------------------===// Removed: llvm/trunk/test/CodeGen/Generic/2006-08-30-CoallescerCrash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2006-08-30-CoallescerCrash.ll?rev=47995&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Generic/2006-08-30-CoallescerCrash.ll (original) +++ llvm/trunk/test/CodeGen/Generic/2006-08-30-CoallescerCrash.ll (removed) @@ -1,112 +0,0 @@ -; RUN: llvm-as < %s | llc -%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } - %struct.VEC_edge = type { i32, i32, [1 x %struct.edge_def*] } - %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] } - %struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, i64, i32, i32, i32, i32 } - %struct.bb_ann_d = type { %struct.tree_node*, i8, %struct.edge_prediction* } - %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [4 x i32] } - %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* } - %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack } - %struct.cost_pair = type { %struct.iv_cand*, i32, %struct.bitmap_head_def* } - %struct.dataflow_d = type { %struct.varray_head_tag*, [2 x %struct.tree_node*] } - %struct.def_operand_ptr = type { %struct.tree_node** } - %struct.def_optype_d = type { i32, [1 x %struct.def_operand_ptr] } - %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.location_t*, i32, i32, i64, i32 } - %struct.edge_def_insns = type { %struct.rtx_def* } - %struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, i32, i32 } - %struct.eh_status = type opaque - %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** } - %struct.et_node = type opaque - %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* } - %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i1, i1, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 } - %struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i32, i32, i32, i32, i32, i8* (i32, i32)*, void (i8*)*, i8*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i32 } - %struct.initial_value_struct = type opaque - %struct.iv = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i1, i1, i32 } - %struct.iv_cand = type { i32, i1, i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.iv*, i32 } - %struct.iv_use = type { i32, i32, %struct.iv*, %struct.tree_node*, %struct.tree_node**, %struct.bitmap_head_def*, i32, %struct.cost_pair*, %struct.iv_cand* } - %struct.ivopts_data = type { %struct.loop*, %struct.htab*, i32, %struct.version_info*, %struct.bitmap_head_def*, i32, %struct.varray_head_tag*, %struct.varray_head_tag*, %struct.bitmap_head_def*, i1 } - %struct.lang_decl = type opaque - %struct.language_function = type opaque - %struct.location_t = type { i8*, i32 } - %struct.loop = type { i32, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.lpt_decision, i32, i32, %struct.edge_def**, i32, %struct.basic_block_def*, %struct.basic_block_def*, i32, %struct.edge_def**, i32, %struct.edge_def**, i32, %struct.simple_bitmap_def*, i32, %struct.loop**, i32, %struct.loop*, %struct.loop*, %struct.loop*, %struct.loop*, i32, i8*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i32, %struct.tree_node*, %struct.tree_node*, %struct.nb_iter_bound*, %struct.edge_def*, i1 } - %struct.lpt_decision = type { i32, i32 } - %struct.machine_function = type { %struct.stack_local_entry*, i8*, %struct.rtx_def*, i32, i32, i32, i32, i32 } - %struct.nb_iter_bound = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.nb_iter_bound* } - %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (i8*, i32)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 } - %struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, i32, i32, i32 } - %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] } - %struct.rtx_def = type { i16, i8, i8, %struct.u } - %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* } - %struct.simple_bitmap_def = type { i32, i32, i32, [1 x i64] } - %struct.stack_local_entry = type opaque - %struct.stmt_ann_d = type { %struct.tree_ann_common_d, i8, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.dataflow_d*, %struct.bitmap_head_def*, i32 } - %struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.def_optype_d*, %struct.v_may_def_optype_d*, %struct.vuse_optype_d*, %struct.v_may_def_optype_d* } - %struct.temp_slot = type opaque - %struct.tree_ann_common_d = type { i32, i8*, %struct.tree_node* } - %struct.tree_ann_d = type { %struct.stmt_ann_d } - %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, i8, i8, i8, i8, i8 } - %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* } - %struct.tree_decl_u1 = type { i64 } - %struct.tree_decl_u2 = type { %struct.function* } - %struct.tree_node = type { %struct.tree_decl } - %struct.u = type { [1 x i64] } - %struct.v_def_use_operand_type_t = type { %struct.tree_node*, %struct.tree_node* } - %struct.v_may_def_optype_d = type { i32, [1 x %struct.v_def_use_operand_type_t] } - %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* } - %struct.varasm_status = type opaque - %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.u } - %struct.version_info = type { %struct.tree_node*, %struct.iv*, i1, i32, i1 } - %struct.vuse_optype_d = type { i32, [1 x %struct.tree_node*] } - -define i1 @determine_use_iv_cost(%struct.ivopts_data* %data, %struct.iv_use* %use, %struct.iv_cand* %cand) { -entry: - switch i32 0, label %bb91 [ - i32 0, label %bb - i32 1, label %bb6 - i32 3, label %cond_next135 - ] - -bb: ; preds = %entry - ret i1 false - -bb6: ; preds = %entry - br i1 false, label %bb87, label %cond_next27 - -cond_next27: ; preds = %bb6 - br i1 false, label %cond_true30, label %cond_next55 - -cond_true30: ; preds = %cond_next27 - br i1 false, label %cond_next41, label %cond_true35 - -cond_true35: ; preds = %cond_true30 - ret i1 false - -cond_next41: ; preds = %cond_true30 - %tmp44 = call i32 @force_var_cost( %struct.ivopts_data* %data, %struct.tree_node* null, %struct.bitmap_head_def** null ) ; [#uses=2] - %tmp46 = udiv i32 %tmp44, 5 ; [#uses=1] - call void @set_use_iv_cost( %struct.ivopts_data* %data, %struct.iv_use* %use, %struct.iv_cand* %cand, i32 %tmp46, %struct.bitmap_head_def* null ) - %tmp44.off = add i32 %tmp44, -50000000 ; [#uses=1] - %tmp52 = icmp ugt i32 %tmp44.off, 4 ; [#uses=1] - %tmp52.upgrd.1 = zext i1 %tmp52 to i32 ; [#uses=1] - br label %bb87 - -cond_next55: ; preds = %cond_next27 - ret i1 false - -bb87: ; preds = %cond_next41, %bb6 - %tmp2.0 = phi i32 [ %tmp52.upgrd.1, %cond_next41 ], [ 1, %bb6 ] ; [#uses=0] - ret i1 false - -bb91: ; preds = %entry - ret i1 false - -cond_next135: ; preds = %entry - %tmp193 = call i1 @determine_use_iv_cost_generic( %struct.ivopts_data* %data, %struct.iv_use* %use, %struct.iv_cand* %cand ) ; [#uses=0] - ret i1 false -} - -declare void @set_use_iv_cost(%struct.ivopts_data*, %struct.iv_use*, %struct.iv_cand*, i32, %struct.bitmap_head_def*) - -declare i32 @force_var_cost(%struct.ivopts_data*, %struct.tree_node*, %struct.bitmap_head_def**) - -declare i1 @determine_use_iv_cost_generic(%struct.ivopts_data*, %struct.iv_use*, %struct.iv_cand*) From romix.llvm at googlemail.com Thu Mar 6 07:28:00 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Thu, 6 Mar 2008 14:28:00 +0100 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <5E772510-8B4F-488A-A7B5-BBECBAE88451@apple.com> References: <200803031053.00270.dag@cray.com> <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> <5E772510-8B4F-488A-A7B5-BBECBAE88451@apple.com> Message-ID: Hi Evan, 2008/3/5, Evan Cheng : > I'm seeing 2 dejagnu test failures on my machine. > > CodeGen/Generic/print-arith-fp.ll > while running: llvm-as < /Users/echeng/LLVM/llvm/test/CodeGen/Generic/ > print-arith-fp.ll | llc > *** List scheduling failed! *** > SU(54): 0x120edc0: i32,ch,flag = CopyFromReg 0x120e680, 0x120b6a0, > 0x120e680:1 > 0x12073e0: ch,flag = CALLpcrel32 0x1209aa0, 0x120eaf0 > 0x120e680: ch,flag = ADJCALLSTACKUP 0x120f370, 0x120b100, > 0x12073e0, 0x12073e0:1 > has been released too many times! > Assertion failed: (0), function ReleasePred, file > ScheduleDAGRRList.cpp, line 213. OK. I can confirm this failure. I fixed it in the attached updated version of my patch (only the ScheduleDAGRRList patch is modified, the ScheduleDAGList patch is unaffected). There is still one moment, where I'm not quite sure, but in any case it is not worse than in the repository. It is related to Dan's comment about updates of PredSU->CycleBound in the CapturePred function. I inserted for now the following comment: // TODO: Check that PredSU is not in the AvailableQueue at this moment! The problem is that currently there is no way to check if a node in the AvailableQueue, AFAIK. But if it is, then the node should be removed and inserted back into the queue to preserve the ordering. All tests compile without problems, but I'd still like to be sure that when this comment line is reached, the node is not in the queue. > CodeGen/X86/2007-07-03-GR64ToVR64.ll OK. This one is not a real failure. Basically, the names of registers are swapped (see below), as far as I understand. Without my changes %rdi should be loaded into %mm1 and %rsi into %mm0. .text .align 16 .globl foo .type foo, at function foo: movd %rdi, %mm0 movd %rsi, %mm1 paddusw %mm1, %mm0 movq %mm0, R emms ret .size foo, .-foo > Are you seeing any issues? The same that you see. And some others related to the frontend, but they have nothing to do with this patch. Please, try again if possible and let me know if I can commit. -Roman > On Mar 5, 2008, at 9:16 AM, Roman Levenstein wrote: > > > > 2008/3/5, Dan Gohman : > >> On Mar 4, 2008, at 3:56 AM, Roman Levenstein wrote: > >>> > >> > >>> make[5]: Entering directory > >>> `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests/Vector/ > >>> SSE' > >>> make[5]: *** No rule to make target `Output/ > >>> sse.expandfft.linked.rbc', > >>> needed by `Output/sse.expandfft.linked.bc'. Stop. > >> > >> > >> When I've seen this error, the problem has been that my base llvm > >> build configure was run without an llvm-gcc in PATH. llvm-test > >> apparently relies on the base llvm build to locate llvm-gcc for it. > > > > Thanks! Now I checked again and it seems to work. > > > > So, I have other questions about testing (I guess some of them are > > asked quite often ;-): > > > > 1) I do run llvm/test tests. At the end I get some figures about the > > number of PASSED and UNEXPECTEDLY FAILED tests. This is fine. But is > > it guaranteed that UNEXPECTEDLY FAILED are introduced by my code or is > > it possible that due to some recent changes to the repository some of > > those tests just fail? If it is due to the changes in the repository, > > how do I know what are the figures without my changes, so that I can > > compare and see new failures introduced by my code? Are those numbers > > published anywhere, may be in the nightly tests results??? Or should I > > basically have to source trees: one for repository version and one for > > my local modifications and then run tests under both trees? > > > > 2) If I run the llvm-test tests, how do I produce reports? How do I > > know that something failed? > > > > 3) How can I run only a selected subset of the tests from llvm-test? > > In particular, I only change LLC mostly. Do I have to run the > > llvm-test every time, or can I reduce it to something smaller? > > > > Basically, I have my ScheduleDAG patches ready, All of the proposals > > from the review by you and Evan are implemented. But I don't know how > > to test them properly using llvm tests and how can I understand if > > something is broken by them.... > > > > I attach both patches for now, so that someone else can test them as > > well, while I'm trying to figure out how to do it on my machine. > > > > -Roman > > < > > > ScheduleDAGRRList > > .patch > > > > > _______________________________________________ > > > llvm-commits mailing list > > llvm-commits at cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > -------------- next part -------------- A non-text attachment was scrubbed... Name: ScheduleDAGRRList.patch Type: text/x-diff Size: 5389 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080306/635c6aef/attachment.bin From romix.llvm at googlemail.com Thu Mar 6 07:44:11 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Thu, 6 Mar 2008 14:44:11 +0100 Subject: [llvm-commits] Speeding up instruction selection In-Reply-To: References: Message-ID: Hi, One more observation: For big MBBs (like the one in big4,bc), llvm::SelectionDAG::ReplaceAllUsesOfValueWith can become a bottleneck if there are thousends of uses. SDNode.Uses is currently a small-vector, so that the deletion by means of removeUser is VERY, VERY slow. I thought that may be a set, map or hash-table should be used instead? So, I tried with std::set (see the attached proof-of-concept patch). This improves the overall compilation time by 10%-15% on big MBBs. Thus, may be there should be a combined approach decided at run-time? If there are just few uses, then SmallVector is used. But if the number of uses becomes much bigger, then std::set or something similar should be used. With all my recent changes to ScheduleDAG and instruction selector, the compilation time for big4.bc went down from 45-50 seconds to 6-9 seconds!!! This is almost a 10 times performance speed-up which makes the compiler much more scaleable. According to the profiler, after all those changes, there are no functions that are obvious bottlenecks. The biggest remaining performance hogs are the following functions (and that for both linear scan and bigalloc register allocators). All of them are mostly related to the FoldingSet implementation. 9.2% llvm::FoldingSetNodeID::ComputeHash 7.7% llvm::SmallVectorImpl::push_back 6.1% llvm::SmallVectorImpl::destroy_range 4.2% llvm::FoldingSetNodeID::AddPointer 3.7% AddNodeIDOperands I know too little about the FoldingSet to improve it, so I stop here for the time being ;-) Please review the idea of the patch and tell me, if it makes sense and I should prepare a cleaned-up one. -Roman 2008/3/5, Roman Levenstein : > Hi Evan, > > 2008/3/4, Evan Cheng : > > >> There's make_heap/push_heap/etc. in that let a > > >> plain std::vector (or a SmallVector I guess) be used as a heap. > > > > > > Yes, this is possible but produces much more overhead than std::set on > > > my tests. BTW, this approach is used in DAGISel.inc files generated by > > > tablegen. I tried to changed it to std::set as well and ,again, it > > > works much (25%-30%) faster on BBs with few hundreds or thousends > > > instructions. > > > > If you give me a patch, I'll test it on my end. Thanks. > > Here is a patch for the DAGISel.inc. It is generated as a diff against > the X86GenDAGISel.inc generated by tablegen. It is a bit ugly, but > gives you the idea and enables testing. > > As a test, I used the big4.bc, which is one huge MBB. You can find it here: > http://llvm.org/bugs/attachment.cgi?id=1275&action=edit > > I would be very interested if you could review it, test and provide > some feedback. > > One thing I do not quite understand about the instruction selector is: > 1) Can there be more than one SDNode with the same NodeId in the ISelQueue? > I have the impression that it is possible, but I'm not sure. > 2) Can _the same_ SDNode ocure more than once in the ISelQueue? > > These two questions are relevant, if std::set is to be used. Sets use > the NodeId as a key of a given SDNode and std::set ensures the > uniqueness of the the elements in the ISelQueue. If (1) is true, then > probably std::multiset should be used instead of std::set. I tried > with both set implementations and performance was roughly the same > between them. > > > I have also one more question regarding the ISelQueue: > > What exactly does it represent and how is it built? My understanding > is that we start with the root element and then all of its > dependencies are pushed into the queue as instruction selection > proceeds. Then their dependencies and so on. But is it somehow > related/similar to scheduler's dependencies? Would it be possible to > do some sort of the topological sorting on the DAG first and then do > the selection? For the above mentioned big4.bc use-case, the ISelQueue > sometimes has up-to 2000 SDNodes in the queue, which makes make_heap() > very inefficient. Is it normal that the queue becomes so long? Could > it be that some dependencies are just selected already and could be > safely removed? > > I cannot really explain and realize it at the moment yet, but it seems > to me that a more efficient data structure than a priority queue could > be used during instruction selection. > > > -Roman > > -------------- next part -------------- A non-text attachment was scrubbed... Name: SelectionDAG.patch Type: text/x-diff Size: 3855 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080306/a8583c8d/attachment.bin From evan.cheng at apple.com Thu Mar 6 11:41:05 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 06 Mar 2008 17:41:05 -0000 Subject: [llvm-commits] [test-suite] r47997 - /test-suite/trunk/RunSafely.sh Message-ID: <200803061741.m26Hf59v003282@zion.cs.uiuc.edu> Author: evancheng Date: Thu Mar 6 11:41:04 2008 New Revision: 47997 URL: http://llvm.org/viewvc/llvm-project?rev=47997&view=rev Log: My bad. Unbreak RunSafely.sh. Modified: test-suite/trunk/RunSafely.sh Modified: test-suite/trunk/RunSafely.sh URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/RunSafely.sh?rev=47997&r1=47996&r2=47997&view=diff ============================================================================== --- test-suite/trunk/RunSafely.sh (original) +++ test-suite/trunk/RunSafely.sh Thu Mar 6 11:41:04 2008 @@ -105,7 +105,7 @@ fi if [ "x$RHOST" = x ] ; then - ( sh -c "$ULIMITCMD"; time -p "$COMMAND >$OUTFILE 2>&1 < $INFILE" ; echo exit $? ) 2>&1 \ + ( sh -c "$ULIMITCMD time -p $COMMAND >$OUTFILE 2>&1 < $INFILE; echo exit \$?" ) 2>&1 \ | awk -- '\ BEGIN { cpu = 0.0; } /^user/ { cpu += $2; print; } From evan.cheng at apple.com Thu Mar 6 11:42:35 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 06 Mar 2008 17:42:35 -0000 Subject: [llvm-commits] [llvm] r47998 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <200803061742.m26HgZZ3003331@zion.cs.uiuc.edu> Author: evancheng Date: Thu Mar 6 11:42:34 2008 New Revision: 47998 URL: http://llvm.org/viewvc/llvm-project?rev=47998&view=rev Log: 80 col violation. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=47998&r1=47997&r2=47998&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Mar 6 11:42:34 2008 @@ -1741,10 +1741,12 @@ unsigned BitWidth = MVT::getSizeInBits(VT); switch (Opcode) { default: break; - case ISD::SIGN_EXTEND: return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); + case ISD::SIGN_EXTEND: + return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); case ISD::ANY_EXTEND: case ISD::ZERO_EXTEND: - case ISD::TRUNCATE: return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); + case ISD::TRUNCATE: + return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); case ISD::UINT_TO_FP: case ISD::SINT_TO_FP: { const uint64_t zero[] = {0, 0}; From isanbard at gmail.com Thu Mar 6 13:09:12 2008 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 06 Mar 2008 19:09:12 -0000 Subject: [llvm-commits] [llvm] r47999 - /llvm/tags/Apple/llvmCore-2020/ Message-ID: <200803061909.m26J9CQr005838@zion.cs.uiuc.edu> Author: void Date: Thu Mar 6 13:09:11 2008 New Revision: 47999 URL: http://llvm.org/viewvc/llvm-project?rev=47999&view=rev Log: Creating llvmCore-2020 Added: llvm/tags/Apple/llvmCore-2020/ - copied from r47961, llvm/trunk/ From isanbard at gmail.com Thu Mar 6 13:10:20 2008 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 06 Mar 2008 19:10:20 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r48000 - /llvm-gcc-4.2/tags/Apple/llvmgcc42-2020/ Message-ID: <200803061910.m26JAKQW005913@zion.cs.uiuc.edu> Author: void Date: Thu Mar 6 13:10:20 2008 New Revision: 48000 URL: http://llvm.org/viewvc/llvm-project?rev=48000&view=rev Log: Creating llvmgcc42-2020 Added: llvm-gcc-4.2/tags/Apple/llvmgcc42-2020/ - copied from r47961, llvm-gcc-4.2/trunk/ From clattner at apple.com Thu Mar 6 13:21:33 2008 From: clattner at apple.com (Chris Lattner) Date: Thu, 6 Mar 2008 11:21:33 -0800 Subject: [llvm-commits] Speeding up instruction selection In-Reply-To: References: Message-ID: <9B43CA3F-5C45-4D36-A80F-9A840E3DA5EB@apple.com> On Mar 6, 2008, at 5:44 AM, Roman Levenstein wrote: > Hi, > > One more observation: > For big MBBs (like the one in big4,bc), > llvm::SelectionDAG::ReplaceAllUsesOfValueWith can become a bottleneck > if there are thousends of uses. SDNode.Uses is currently a > small-vector, so that the deletion by means of removeUser is VERY, > VERY slow. If you are interested in this, it would be much better to use a linked data structure like LLVM Value/Use does and MachineRegisterInfo/ MachineOperand does. This allows constant time for all def/use maintenance operations. > With all my recent changes to ScheduleDAG and instruction selector, > the compilation time for big4.bc went down from 45-50 seconds to 6-9 > seconds!!! This is almost a 10 times performance speed-up which makes > the compiler much more scaleable. Nice! Does it also help more normal cases? That would be excellent. All the work you're doing is also very helpful when we start putting multiple basic blocks at once in a selectiondag. Thanks for working on this! -Chris From romix.llvm at googlemail.com Thu Mar 6 13:39:25 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Thu, 6 Mar 2008 22:39:25 +0300 Subject: [llvm-commits] Speeding up instruction selection In-Reply-To: <9B43CA3F-5C45-4D36-A80F-9A840E3DA5EB@apple.com> References: <9B43CA3F-5C45-4D36-A80F-9A840E3DA5EB@apple.com> Message-ID: Hi, 2008/3/6, Chris Lattner : > > On Mar 6, 2008, at 5:44 AM, Roman Levenstein wrote: > > > Hi, > > > > One more observation: > > For big MBBs (like the one in big4,bc), > > llvm::SelectionDAG::ReplaceAllUsesOfValueWith can become a bottleneck > > if there are thousends of uses. SDNode.Uses is currently a > > small-vector, so that the deletion by means of removeUser is VERY, > > VERY slow. > > > If you are interested in this, it would be much better to use a linked > data structure like LLVM Value/Use does and MachineRegisterInfo/ > MachineOperand does. This allows constant time for all def/use > maintenance operations. OK. But how does it help with removal operations, which is done by removeUser() function called from ReplaceAllUsesOfValueWith ? In case of big MBBs, these lists would contain thousends of uses, The big4.bc contains for example 8000 elements in such a list. So, linear search would be a disaster here. A sorted list is probably a better alternative, but may be still slow... So, sets or hash-tables are better candidates. Or do I miss something? > > > With all my recent changes to ScheduleDAG and instruction selector, > > the compilation time for big4.bc went down from 45-50 seconds to 6-9 > > seconds!!! This is almost a 10 times performance speed-up which makes > > the compiler much more scaleable. > > > Nice! Does it also help more normal cases? That would be excellent. How do I test on "normal" cases. For small MBBs everything is so fast, that it consumes virtually no time. Can you point out some test-cases, that are big enough to be measurable, but still can be considered normal? > All the work you're doing is also very helpful when we start putting > multiple basic blocks at once in a selectiondag. Thanks for working > on this! I'm glad to contribute!. -Roman From evan.cheng at apple.com Thu Mar 6 13:41:48 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 6 Mar 2008 11:41:48 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <200803031053.00270.dag@cray.com> <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> <5E772510-8B4F-488A-A7B5-BBECBAE88451@apple.com> Message-ID: <85087762-E617-46B4-BB1E-96582F05A58D@apple.com> On Mar 6, 2008, at 5:28 AM, Roman Levenstein wrote: > Hi Evan, > > 2008/3/5, Evan Cheng : >> I'm seeing 2 dejagnu test failures on my machine. >> >> CodeGen/Generic/print-arith-fp.ll >> while running: llvm-as < /Users/echeng/LLVM/llvm/test/CodeGen/ >> Generic/ >> print-arith-fp.ll | llc >> *** List scheduling failed! *** >> SU(54): 0x120edc0: i32,ch,flag = CopyFromReg 0x120e680, 0x120b6a0, >> 0x120e680:1 >> 0x12073e0: ch,flag = CALLpcrel32 0x1209aa0, 0x120eaf0 >> 0x120e680: ch,flag = ADJCALLSTACKUP 0x120f370, 0x120b100, >> 0x12073e0, 0x12073e0:1 >> has been released too many times! >> Assertion failed: (0), function ReleasePred, file >> ScheduleDAGRRList.cpp, line 213. > > OK. I can confirm this failure. I fixed it in the attached updated > version of my patch (only the ScheduleDAGRRList patch is modified, the > ScheduleDAGList patch is unaffected). Ok, will test. > > > There is still one moment, where I'm not quite sure, but in any case > it is not worse than in the repository. It is related to Dan's comment > about updates of PredSU->CycleBound in the CapturePred function. I > inserted for now the following comment: > // TODO: Check that PredSU is not in the AvailableQueue at this > moment! > The problem is that currently there is no way to check if a node in > the AvailableQueue, AFAIK. But if it is, then the node should be > removed and inserted back into the queue to preserve the ordering. All > tests compile without problems, but I'd still like to be sure that > when this comment line is reached, the node is not in the queue. There is a way. When a node is inserted into the AvailableQueue, the isAvailable field is set to true. Can you update the patch? > > > >> CodeGen/X86/2007-07-03-GR64ToVR64.ll > > OK. This one is not a real failure. Basically, the names of registers > are swapped (see below), as far as I understand. Without my changes > %rdi should be loaded into %mm1 and %rsi into %mm0. > > .text > .align 16 > .globl foo > .type foo, at function > foo: > movd %rdi, %mm0 > movd %rsi, %mm1 > paddusw %mm1, %mm0 > movq %mm0, R > emms > ret > .size foo, .-foo Yes, that's silly. Please change the run lines to grep for movd and paddusw instead. > > >> Are you seeing any issues? > > The same that you see. And some others related to the frontend, but > they have nothing to do with this patch. > > Please, try again if possible and let me know if I can commit. Will do. Evan > > > -Roman > >> On Mar 5, 2008, at 9:16 AM, Roman Levenstein wrote: >> >> >>> 2008/3/5, Dan Gohman : >>>> On Mar 4, 2008, at 3:56 AM, Roman Levenstein wrote: >>>>> >>>> >>>>> make[5]: Entering directory >>>>> `/opt/llvm.build/projects/llvm-test/SingleSource/UnitTests/Vector/ >>>>> SSE' >>>>> make[5]: *** No rule to make target `Output/ >>>>> sse.expandfft.linked.rbc', >>>>> needed by `Output/sse.expandfft.linked.bc'. Stop. >>>> >>>> >>>> When I've seen this error, the problem has been that my base llvm >>>> build configure was run without an llvm-gcc in PATH. llvm-test >>>> apparently relies on the base llvm build to locate llvm-gcc for it. >>> >>> Thanks! Now I checked again and it seems to work. >>> >>> So, I have other questions about testing (I guess some of them are >>> asked quite often ;-): >>> >>> 1) I do run llvm/test tests. At the end I get some figures about the >>> number of PASSED and UNEXPECTEDLY FAILED tests. This is fine. But is >>> it guaranteed that UNEXPECTEDLY FAILED are introduced by my code >>> or is >>> it possible that due to some recent changes to the repository some >>> of >>> those tests just fail? If it is due to the changes in the >>> repository, >>> how do I know what are the figures without my changes, so that I can >>> compare and see new failures introduced by my code? Are those >>> numbers >>> published anywhere, may be in the nightly tests results??? Or >>> should I >>> basically have to source trees: one for repository version and one >>> for >>> my local modifications and then run tests under both trees? >>> >>> 2) If I run the llvm-test tests, how do I produce reports? How do I >>> know that something failed? >>> >>> 3) How can I run only a selected subset of the tests from llvm-test? >>> In particular, I only change LLC mostly. Do I have to run the >>> llvm-test every time, or can I reduce it to something smaller? >>> >>> Basically, I have my ScheduleDAG patches ready, All of the proposals >>> from the review by you and Evan are implemented. But I don't know >>> how >>> to test them properly using llvm tests and how can I understand if >>> something is broken by them.... >>> >>> I attach both patches for now, so that someone else can test them as >>> well, while I'm trying to figure out how to do it on my machine. >>> >>> -Roman >>> < >> >>> ScheduleDAGRRList >>> .patch >>>> >>> < >>> ScheduleDAGList >>> .patch>_______________________________________________ >> >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> > < > ScheduleDAGRRList > .patch>_______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From romix.llvm at googlemail.com Thu Mar 6 14:02:48 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Thu, 6 Mar 2008 23:02:48 +0300 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <85087762-E617-46B4-BB1E-96582F05A58D@apple.com> References: <200803031053.00270.dag@cray.com> <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> <5E772510-8B4F-488A-A7B5-BBECBAE88451@apple.com> <85087762-E617-46B4-BB1E-96582F05A58D@apple.com> Message-ID: Hi Evan, 2008/3/6, Evan Cheng : > > There is still one moment, where I'm not quite sure, but in any case > > it is not worse than in the repository. It is related to Dan's comment > > about updates of PredSU->CycleBound in the CapturePred function. I > > inserted for now the following comment: > > // TODO: Check that PredSU is not in the AvailableQueue at this > > moment! > > The problem is that currently there is no way to check if a node in > > the AvailableQueue, AFAIK. But if it is, then the node should be > > removed and inserted back into the queue to preserve the ordering. All > > tests compile without problems, but I'd still like to be sure that > > when this comment line is reached, the node is not in the queue. > > > There is a way. When a node is inserted into the AvailableQueue, the > isAvailable field is set to true. Can you update the patch? Yes. I know this method. But if you look at the implementation of the CapturePred, it already checks for isAvailable and removes the node conditionally, if it is not isPending. So, the question is, can it happen, that after those conditional checks the node is not removed yet, i.e. the node has isAvailable set, and isPending set and is in the queue? > > > >> CodeGen/X86/2007-07-03-GR64ToVR64.ll > > > > OK. This one is not a real failure. Basically, the names of registers > > are swapped (see below), as far as I understand. Without my changes > > %rdi should be loaded into %mm1 and %rsi into %mm0. > > > > .text > > .align 16 > > .globl foo > > .type foo, at function > > foo: > > movd %rdi, %mm0 > > movd %rsi, %mm1 > > paddusw %mm1, %mm0 > > movq %mm0, R > > emms > > ret > > .size foo, .-foo > > > Yes, that's silly. Please change the run lines to grep for movd and > paddusw instead. Will do. - Roman From dag at cray.com Thu Mar 6 14:17:04 2008 From: dag at cray.com (David Greene) Date: Thu, 6 Mar 2008 14:17:04 -0600 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <0E45612C-5CFA-4DE0-A685-09D648FBF204@apple.com> References: <200803051811.29524.dag@cray.com> <0E45612C-5CFA-4DE0-A685-09D648FBF204@apple.com> Message-ID: <200803061417.04813.dag@cray.com> On Wednesday 05 March 2008 21:52, Chris Lattner wrote: > >> Right, it's very malloc intensive. That's the main issue. > > > > So why not define an allocator for it? > > See the previous response. Couldn't an allocator also handle fragmentation and layout? I agree that the standard containers aren't always optimal but I think it's a mistake to dismiss them out of hand. Most of the time we just don't care because they're not in performance-critical parts of the code (understanding that this case IS a performance-critical piece of code). -Dave From evan.cheng at apple.com Thu Mar 6 15:45:02 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Thu, 6 Mar 2008 13:45:02 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: References: <200803031053.00270.dag@cray.com> <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> <5E772510-8B4F-488A-A7B5-BBECBAE88451@apple.com> <85087762-E617-46B4-BB1E-96582F05A58D@apple.com> Message-ID: <1B24D1D3-3C36-4365-B885-B3DF27D03844@apple.com> On Mar 6, 2008, at 12:02 PM, Roman Levenstein wrote: > Hi Evan, > > 2008/3/6, Evan Cheng : >>> There is still one moment, where I'm not quite sure, but in any case >>> it is not worse than in the repository. It is related to Dan's >>> comment >>> about updates of PredSU->CycleBound in the CapturePred function. I >>> inserted for now the following comment: >>> // TODO: Check that PredSU is not in the AvailableQueue at this >>> moment! >>> The problem is that currently there is no way to check if a node in >>> the AvailableQueue, AFAIK. But if it is, then the node should be >>> removed and inserted back into the queue to preserve the ordering. >>> All >>> tests compile without problems, but I'd still like to be sure that >>> when this comment line is reached, the node is not in the queue. >> >> >> There is a way. When a node is inserted into the AvailableQueue, the >> isAvailable field is set to true. Can you update the patch? > > Yes. I know this method. But if you look at the implementation of the > CapturePred, it already checks for isAvailable and removes the node > conditionally, if it is not isPending. So, the question is, can it > happen, that after those conditional checks the node is not removed > yet, i.e. the node has isAvailable set, and isPending set and is in > the queue? I see. No it shouldn't happen or else it would result in an assertion later. BTW: bool IsAvailable = PredSU->isAvailable; if (PredSU->isAvailable) { IsAvailable is not used. Please remove. I've tested the patch. It's resulting in a slight compile time loss on Mac OS X. This includes some fairly large tests such as 403.gcc. The loss is around 1% so I am not too unhappy if it really helps other platforms. I assume you are testing this on Linux? Also, have you tested the compilation time benefit on something like kimwitu++? I just want to guard against loss against *normal* sized apps. More annoying is 176.gcc fails with the patch. It's very likely not a bug in your patch. But I haven't had the chance to track it down. Does it work for you? Evan > > >>> >>>> CodeGen/X86/2007-07-03-GR64ToVR64.ll >>> >>> OK. This one is not a real failure. Basically, the names of >>> registers >>> are swapped (see below), as far as I understand. Without my changes >>> %rdi should be loaded into %mm1 and %rsi into %mm0. >>> >>> .text >>> .align 16 >>> .globl foo >>> .type foo, at function >>> foo: >>> movd %rdi, %mm0 >>> movd %rsi, %mm1 >>> paddusw %mm1, %mm0 >>> movq %mm0, R >>> emms >>> ret >>> .size foo, .-foo >> >> >> Yes, that's silly. Please change the run lines to grep for movd and >> paddusw instead. > > Will do. > > - Roman > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Thu Mar 6 15:59:36 2008 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 06 Mar 2008 21:59:36 -0000 Subject: [llvm-commits] [llvm] r48001 - /llvm/tags/Apple/llvmCore-2021/ Message-ID: <200803062159.m26Lxam5010758@zion.cs.uiuc.edu> Author: void Date: Thu Mar 6 15:59:35 2008 New Revision: 48001 URL: http://llvm.org/viewvc/llvm-project?rev=48001&view=rev Log: Creating llvmCore-2021 branch Added: llvm/tags/Apple/llvmCore-2021/ - copied from r48000, llvm/trunk/ From isanbard at gmail.com Thu Mar 6 15:59:42 2008 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 06 Mar 2008 21:59:42 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r48002 - /llvm-gcc-4.2/tags/Apple/llvmgcc42-2021/ Message-ID: <200803062159.m26Lxghg010770@zion.cs.uiuc.edu> Author: void Date: Thu Mar 6 15:59:42 2008 New Revision: 48002 URL: http://llvm.org/viewvc/llvm-project?rev=48002&view=rev Log: Creating llvmgcc42-2021 branch Added: llvm-gcc-4.2/tags/Apple/llvmgcc42-2021/ - copied from r48001, llvm-gcc-4.2/trunk/ From isanbard at gmail.com Thu Mar 6 17:22:44 2008 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 06 Mar 2008 23:22:44 -0000 Subject: [llvm-commits] [llvm] r48003 - in /llvm/trunk: include/llvm/CodeGen/RegisterScavenging.h lib/CodeGen/RegisterScavenging.cpp Message-ID: <200803062322.m26NMi9Q013346@zion.cs.uiuc.edu> Author: void Date: Thu Mar 6 17:22:43 2008 New Revision: 48003 URL: http://llvm.org/viewvc/llvm-project?rev=48003&view=rev Log: When setting the "unused" info, take into account something like this: %r3 = OR %x3, %x3 We don't want to mark the %r3 as unused even though it's a sub-register of %x3. Modified: llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Modified: llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h?rev=48003&r1=48002&r2=48003&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h (original) +++ llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h Thu Mar 6 17:22:43 2008 @@ -98,7 +98,7 @@ /// void setUsed(unsigned Reg); void setUsed(BitVector Regs) { RegsAvailable &= ~Regs; } - void setUnused(unsigned Reg); + void setUnused(unsigned Reg, const MachineInstr *MI); void setUnused(BitVector Regs) { RegsAvailable |= Regs; } /// FindUnusedReg - Find a unused register of the specified register class Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=48003&r1=48002&r2=48003&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original) +++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Thu Mar 6 17:22:43 2008 @@ -8,9 +8,9 @@ //===----------------------------------------------------------------------===// // // This file implements the machine register scavenger. It can provide -// information such as unused register at any point in a machine basic block. -// It also provides a mechanism to make registers availbale by evicting them -// to spill slots. +// information, such as unused registers, at any point in a machine basic block. +// It also provides a mechanism to make registers available by evicting them to +// spill slots. // //===----------------------------------------------------------------------===// @@ -25,6 +25,28 @@ #include "llvm/ADT/STLExtras.h" using namespace llvm; +/// RedefinesSuperRegPart - Return true if the specified register is redefining +/// part of a super-register. +static bool RedefinesSuperRegPart(const MachineInstr *MI, unsigned SubReg, + const TargetRegisterInfo *TRI) { + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + const MachineOperand &MO = MI->getOperand(i); + if (!MO.isRegister() || !MO.isUse()) + continue; + if (TRI->isSuperRegister(SubReg, MO.getReg())) + return true; + } + + return false; +} + +static bool RedefinesSuperRegPart(const MachineInstr *MI, + const MachineOperand &MO, + const TargetRegisterInfo *TRI) { + assert(MO.isRegister() && MO.isDef() && "Not a register def!"); + return RedefinesSuperRegPart(MI, MO.getReg(), TRI); +} + /// setUsed - Set the register and its sub-registers as being used. void RegScavenger::setUsed(unsigned Reg) { RegsAvailable.reset(Reg); @@ -35,12 +57,13 @@ } /// setUnused - Set the register and its sub-registers as being unused. -void RegScavenger::setUnused(unsigned Reg) { +void RegScavenger::setUnused(unsigned Reg, const MachineInstr *MI) { RegsAvailable.set(Reg); for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) - RegsAvailable.set(SubReg); + if (!RedefinesSuperRegPart(MI, Reg, TRI)) + RegsAvailable.set(SubReg); } void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) { @@ -138,9 +161,12 @@ if (MO.isKill() && !isReserved(Reg)) { ChangedRegs.set(Reg); + // Mark sub-registers as changed if they aren't defined in the same + // instruction. for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) - ChangedRegs.set(SubReg); + if (!RedefinesSuperRegPart(MI, Reg, TRI)) + ChangedRegs.set(SubReg); } } @@ -159,7 +185,7 @@ // If it's dead upon def, then it is now free. if (MO.isDead()) { - setUnused(Reg); + setUnused(Reg, MI); continue; } @@ -169,6 +195,10 @@ continue; } + // Skip is this is merely redefining part of a super-register. + if (RedefinesSuperRegPart(MI, MO, TRI)) + continue; + assert((isUnused(Reg) || isReserved(Reg)) && "Re-defining a live register!"); setUsed(Reg); @@ -194,7 +224,7 @@ unsigned Reg = MO.getReg(); assert(isUsed(Reg)); if (!isReserved(Reg)) - setUnused(Reg); + setUnused(Reg, MI); } // Process uses. From gohman at apple.com Thu Mar 6 17:24:19 2008 From: gohman at apple.com (Dan Gohman) Date: Thu, 06 Mar 2008 23:24:19 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r48004 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Message-ID: <200803062324.m26NOJlx013392@zion.cs.uiuc.edu> Author: djg Date: Thu Mar 6 17:24:19 2008 New Revision: 48004 URL: http://llvm.org/viewvc/llvm-project?rev=48004&view=rev Log: Remove the code that restricted integer types to 1, 8, 16, 32, and 64, now that llvm codegen supports i128 well enough to get through the llvm-gcc build. Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-types.cpp?rev=48004&r1=48003&r2=48004&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-types.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Thu Mar 6 17:24:19 2008 @@ -743,24 +743,6 @@ type = orig_type; case INTEGER_TYPE: if (const Type *Ty = GET_TYPE_LLVM(type)) return Ty; - - // FIXME: eliminate this when 128-bit integer types in LLVM work. - switch (TREE_INT_CST_LOW(TYPE_SIZE(type))) { - case 1: - case 8: - case 16: - case 32: - case 64: - //case 128: Waiting for PR1462 etc. - break; - default: - static bool Warned = false; - if (!Warned) - fprintf(stderr, "WARNING: %d-bit integers not supported!\n", - (int)TREE_INT_CST_LOW(TYPE_SIZE(type))); - Warned = true; - return Type::Int64Ty; - } return SET_TYPE_LLVM(type, IntegerType::get(TREE_INT_CST_LOW(TYPE_SIZE(type)))); case REAL_TYPE: From isanbard at gmail.com Thu Mar 6 17:34:22 2008 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 06 Mar 2008 23:34:22 -0000 Subject: [llvm-commits] [llvm] r48005 - /llvm/trunk/test/CodeGen/PowerPC/2008-03-06-KillInfo.ll Message-ID: <200803062334.m26NYMuv013640@zion.cs.uiuc.edu> Author: void Date: Thu Mar 6 17:34:22 2008 New Revision: 48005 URL: http://llvm.org/viewvc/llvm-project?rev=48005&view=rev Log: Add testcase. Added: llvm/trunk/test/CodeGen/PowerPC/2008-03-06-KillInfo.ll Added: llvm/trunk/test/CodeGen/PowerPC/2008-03-06-KillInfo.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2008-03-06-KillInfo.ll?rev=48005&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/2008-03-06-KillInfo.ll (added) +++ llvm/trunk/test/CodeGen/PowerPC/2008-03-06-KillInfo.ll Thu Mar 6 17:34:22 2008 @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | llc -march=ppc64 -enable-ppc-regscavenger + at .str242 = external constant [3 x i8] ; <[3 x i8]*> [#uses=1] + +define fastcc void @ParseContent(i8* %buf, i32 %bufsize) { +entry: + %items = alloca [10000 x i8*], align 16 ; <[10000 x i8*]*> [#uses=0] + %tmp86 = add i32 0, -1 ; [#uses=1] + br i1 false, label %cond_true94, label %cond_next99 +cond_true94: ; preds = %entry + %tmp98 = call i32 (i8*, ...)* @printf( i8* getelementptr ([3 x i8]* @.str242, i32 0, i32 0), i8* null ) ; [#uses=0] + %tmp20971 = icmp sgt i32 %tmp86, 0 ; [#uses=1] + br i1 %tmp20971, label %bb101, label %bb212 +cond_next99: ; preds = %entry + ret void +bb101: ; preds = %cond_true94 + ret void +bb212: ; preds = %cond_true94 + ret void +} + +declare i32 @printf(i8*, ...) From clattner at apple.com Thu Mar 6 19:52:09 2008 From: clattner at apple.com (Chris Lattner) Date: Thu, 6 Mar 2008 17:52:09 -0800 Subject: [llvm-commits] Speeding up instruction selection In-Reply-To: References: <9B43CA3F-5C45-4D36-A80F-9A840E3DA5EB@apple.com> Message-ID: <8555B624-69BC-40A3-B417-DD904927D51C@apple.com> On Mar 6, 2008, at 11:39 AM, Roman Levenstein wrote: >>> One more observation: >>> For big MBBs (like the one in big4,bc), >>> llvm::SelectionDAG::ReplaceAllUsesOfValueWith can become a >>> bottleneck >>> if there are thousends of uses. SDNode.Uses is currently a >>> small-vector, so that the deletion by means of removeUser is VERY, >>> VERY slow. >> >> >> If you are interested in this, it would be much better to use a >> linked >> data structure like LLVM Value/Use does and MachineRegisterInfo/ >> MachineOperand does. This allows constant time for all def/use >> maintenance operations. > > OK. But how does it help with removal operations, which is done by > removeUser() function called from ReplaceAllUsesOfValueWith ? In case > of big MBBs, these lists would contain thousends of uses, The big4.bc > contains for example 8000 elements in such a list. So, linear search > would be a disaster here. A sorted list is probably a better > alternative, but may be still slow... So, sets or hash-tables are > better candidates. Or do I miss something? The problem with removeUser is that it is O(n) in the number of users of a value. Changing this operation to be O(1) [at with a very low constant factor] makes it size invariant and much faster in practice. >>> With all my recent changes to ScheduleDAG and instruction selector, >>> the compilation time for big4.bc went down from 45-50 seconds to 6-9 >>> seconds!!! This is almost a 10 times performance speed-up which >>> makes >>> the compiler much more scaleable. >> >> >> Nice! Does it also help more normal cases? That would be excellent. > How do I test on "normal" cases. For small MBBs everything is so fast, > that it consumes virtually no time. Can you point out some test-cases, > that are big enough to be measurable, but still can be considered > normal? MultiSource/Applications/kimwitu++ is a moderate size C++ app that is a good testcase, I often use it for compile time measurements. Thanks again Roman, -Chris From clattner at apple.com Thu Mar 6 23:23:54 2008 From: clattner at apple.com (Chris Lattner) Date: Thu, 6 Mar 2008 21:23:54 -0800 Subject: [llvm-commits] Fwd: Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <200803061417.04813.dag@cray.com> References: <200803051811.29524.dag@cray.com> <0E45612C-5CFA-4DE0-A685-09D648FBF204@apple.com> <200803061417.04813.dag@cray.com> Message-ID: <03F159AC-3267-4822-80F3-279DDE926A00@apple.com> On Mar 6, 2008, at 12:17 PM, David Greene wrote: > On Wednesday 05 March 2008 21:52, Chris Lattner wrote: > >>>> Right, it's very malloc intensive. That's the main issue. >>> >>> So why not define an allocator for it? >> >> See the previous response. > > Couldn't an allocator also handle fragmentation and layout? > > I agree that the standard containers aren't always optimal but I > think it's > a mistake to dismiss them out of hand. Most of the time we just don't > care because they're not in performance-critical parts of the code > (understanding that this case IS a performance-critical piece of > code). Common implementations of std::set have 3 words of overhead per pointer stored (300% overhead!) not counting overhead from the malloc implementation (probably another word, aka another 100%). std::set is not a good data structure for small elements. For large elements it can be very nice. This is discussed here: http://llvm.org/docs/ProgrammersManual.html#ds_set -Chris From clattner at apple.com Thu Mar 6 23:24:35 2008 From: clattner at apple.com (Chris Lattner) Date: Thu, 6 Mar 2008 21:24:35 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r48004 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp In-Reply-To: <200803062324.m26NOJlx013392@zion.cs.uiuc.edu> References: <200803062324.m26NOJlx013392@zion.cs.uiuc.edu> Message-ID: On Mar 6, 2008, at 3:24 PM, Dan Gohman wrote: > Author: djg > Date: Thu Mar 6 17:24:19 2008 > New Revision: 48004 > > URL: http://llvm.org/viewvc/llvm-project?rev=48004&view=rev > Log: > Remove the code that restricted integer types to 1, 8, 16, 32, and > 64, now > that llvm codegen supports i128 well enough to get through the llvm- > gcc build. Nice! -Chris From sabre at nondot.org Fri Mar 7 00:36:32 2008 From: sabre at nondot.org (Chris Lattner) Date: Fri, 07 Mar 2008 06:36:32 -0000 Subject: [llvm-commits] [llvm] r48006 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/2008-03-06-frem-fpstack.ll Message-ID: <200803070636.m276aXq2025532@zion.cs.uiuc.edu> Author: lattner Date: Fri Mar 7 00:36:32 2008 New Revision: 48006 URL: http://llvm.org/viewvc/llvm-project?rev=48006&view=rev Log: mark frem as expand for all legal fp types on x86, regardless of whether we're using SSE or not. This fixes PR2122. Added: llvm/trunk/test/CodeGen/X86/2008-03-06-frem-fpstack.ll Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=48006&r1=48005&r2=48006&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Mar 7 00:36:32 2008 @@ -215,7 +215,9 @@ setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Legal); setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand); setOperationAction(ISD::FP_ROUND_INREG , MVT::f32 , Expand); + setOperationAction(ISD::FREM , MVT::f32 , Expand); setOperationAction(ISD::FREM , MVT::f64 , Expand); + setOperationAction(ISD::FREM , MVT::f80 , Expand); setOperationAction(ISD::FLT_ROUNDS_ , MVT::i32 , Custom); setOperationAction(ISD::CTPOP , MVT::i8 , Expand); @@ -358,10 +360,8 @@ // We don't support sin/cos/fmod setOperationAction(ISD::FSIN , MVT::f64, Expand); setOperationAction(ISD::FCOS , MVT::f64, Expand); - setOperationAction(ISD::FREM , MVT::f64, Expand); setOperationAction(ISD::FSIN , MVT::f32, Expand); setOperationAction(ISD::FCOS , MVT::f32, Expand); - setOperationAction(ISD::FREM , MVT::f32, Expand); // Expand FP immediates into loads from the stack, except for the special // cases we handle. @@ -398,7 +398,6 @@ // We don't support sin/cos/fmod setOperationAction(ISD::FSIN , MVT::f32, Expand); setOperationAction(ISD::FCOS , MVT::f32, Expand); - setOperationAction(ISD::FREM , MVT::f32, Expand); // Special cases we handle for FP constants. addLegalFPImmediate(APFloat(+0.0f)); // xorps Added: llvm/trunk/test/CodeGen/X86/2008-03-06-frem-fpstack.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-03-06-frem-fpstack.ll?rev=48006&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2008-03-06-frem-fpstack.ll (added) +++ llvm/trunk/test/CodeGen/X86/2008-03-06-frem-fpstack.ll Fri Mar 7 00:36:32 2008 @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 +; PR2122 +define float @func(float %a, float %b) nounwind { +entry: + %tmp3 = frem float %a, %b ; [#uses=1] + ret float %tmp3 +} From romix.llvm at googlemail.com Fri Mar 7 01:10:54 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Fri, 7 Mar 2008 10:10:54 +0300 Subject: [llvm-commits] Speeding up instruction selection In-Reply-To: <8555B624-69BC-40A3-B417-DD904927D51C@apple.com> References: <9B43CA3F-5C45-4D36-A80F-9A840E3DA5EB@apple.com> <8555B624-69BC-40A3-B417-DD904927D51C@apple.com> Message-ID: Hi Chris, 2008/3/7, Chris Lattner : > On Mar 6, 2008, at 11:39 AM, Roman Levenstein wrote: > > > >>> One more observation: > >>> For big MBBs (like the one in big4,bc), > >>> llvm::SelectionDAG::ReplaceAllUsesOfValueWith can become a > >>> bottleneck > >>> if there are thousends of uses. SDNode.Uses is currently a > >>> small-vector, so that the deletion by means of removeUser is VERY, > >>> VERY slow. > >> > >> > >> If you are interested in this, it would be much better to use a > >> linked > >> data structure like LLVM Value/Use does and MachineRegisterInfo/ > >> MachineOperand does. This allows constant time for all def/use > >> maintenance operations. > > > > OK. But how does it help with removal operations, which is done by > > removeUser() function called from ReplaceAllUsesOfValueWith ? In case > > of big MBBs, these lists would contain thousends of uses, The big4.bc > > contains for example 8000 elements in such a list. So, linear search > > would be a disaster here. A sorted list is probably a better > > alternative, but may be still slow... So, sets or hash-tables are > > better candidates. Or do I miss something? > > > The problem with removeUser is that it is O(n) in the number of users > of a value. Changing this operation to be O(1) [at with a very low > constant factor] makes it size invariant and much faster in practice. I think, we still misunderstand each other. If you speak about removing the element from the middle, then it is true that lists do not do any moving of elements around and just update pointers, so they are very fast in that. But before you can start removing, you should first find the element to remove inside this list. removeUser is called in my case for 8000 different keys and each time it tries to find the element and then to remove it. So, as far as I can see, it is an O(n^2) time. Therefore, search time becomes a dominant factor, And this is why a data structure with a possibility of a very fast search is required. > > >>> With all my recent changes to ScheduleDAG and instruction selector, > >>> the compilation time for big4.bc went down from 45-50 seconds to 6-9 > >>> seconds!!! This is almost a 10 times performance speed-up which > >>> makes > >>> the compiler much more scaleable. > >> > >> > >> Nice! Does it also help more normal cases? That would be excellent. > > How do I test on "normal" cases. For small MBBs everything is so fast, > > that it consumes virtually no time. Can you point out some test-cases, > > that are big enough to be measurable, but still can be considered > > normal? > > > MultiSource/Applications/kimwitu++ is a moderate size C++ app that is > a good testcase, I often use it for compile time measurements. Thanks for the hint. I'll use this one for testing as well. -Roman From clattner at apple.com Fri Mar 7 01:23:43 2008 From: clattner at apple.com (Chris Lattner) Date: Thu, 6 Mar 2008 23:23:43 -0800 Subject: [llvm-commits] Speeding up instruction selection In-Reply-To: References: <9B43CA3F-5C45-4D36-A80F-9A840E3DA5EB@apple.com> <8555B624-69BC-40A3-B417-DD904927D51C@apple.com> Message-ID: <1F69CEC2-93D3-4EDA-89F3-BF48BB229183@apple.com> On Mar 6, 2008, at 11:10 PM, Roman Levenstein wrote: >>> OK. But how does it help with removal operations, which is done by >>> removeUser() function called from ReplaceAllUsesOfValueWith ? In >>> case >>> of big MBBs, these lists would contain thousends of uses, The >>> big4.bc >>> contains for example 8000 elements in such a list. So, linear search >>> would be a disaster here. A sorted list is probably a better >>> alternative, but may be still slow... So, sets or hash-tables are >>> better candidates. Or do I miss something? >> >> >> The problem with removeUser is that it is O(n) in the number of users >> of a value. Changing this operation to be O(1) [at with a very low >> constant factor] makes it size invariant and much faster in practice. > > I think, we still misunderstand each other. If you speak about > removing the element from the middle, then it is true that lists do > not do any moving of elements around and just update pointers, so they > are very fast in that. But before you can start removing, you should > first find the element to remove inside this list. removeUser is > called in my case for 8000 different keys and each time it tries to > find the element and then to remove it. So, as far as I can see, it is > an O(n^2) time. Therefore, search time becomes a dominant factor, And > this is why a data structure with a possibility of a very fast search > is required. Please look at the implementation of User::setOperand() or MachineOperand::setReg(). When these changes the value of an operand, it needs to remove the current 'instruction' from the use list of the old value and add it to the new value. I assure you that it is constant time, exactly because it doesn't have to scan the whole list. It just unlinks it form the middle of the list with no search. This makes it very fast and scalable. -Chris From romix.llvm at googlemail.com Fri Mar 7 09:26:50 2008 From: romix.llvm at googlemail.com (Roman Levenstein) Date: Fri, 7 Mar 2008 16:26:50 +0100 Subject: [llvm-commits] Speeding up instruction selection In-Reply-To: <1F69CEC2-93D3-4EDA-89F3-BF48BB229183@apple.com> References: <9B43CA3F-5C45-4D36-A80F-9A840E3DA5EB@apple.com> <8555B624-69BC-40A3-B417-DD904927D51C@apple.com> <1F69CEC2-93D3-4EDA-89F3-BF48BB229183@apple.com> Message-ID: Hi Chris, 2008/3/7, Chris Lattner : > On Mar 6, 2008, at 11:10 PM, Roman Levenstein wrote: > >>> OK. But how does it help with removal operations, which is done by > >>> removeUser() function called from ReplaceAllUsesOfValueWith ? In > >>> case > >>> of big MBBs, these lists would contain thousends of uses, The > >>> big4.bc > >>> contains for example 8000 elements in such a list. So, linear search > >>> would be a disaster here. A sorted list is probably a better > >>> alternative, but may be still slow... So, sets or hash-tables are > >>> better candidates. Or do I miss something? > >> > >> > >> The problem with removeUser is that it is O(n) in the number of users > >> of a value. Changing this operation to be O(1) [at with a very low > >> constant factor] makes it size invariant and much faster in practice. > > > > I think, we still misunderstand each other. If you speak about > > removing the element from the middle, then it is true that lists do > > not do any moving of elements around and just update pointers, so they > > are very fast in that. But before you can start removing, you should > > first find the element to remove inside this list. removeUser is > > called in my case for 8000 different keys and each time it tries to > > find the element and then to remove it. So, as far as I can see, it is > > an O(n^2) time. Therefore, search time becomes a dominant factor, And > > this is why a data structure with a possibility of a very fast search > > is required. > > > Please look at the implementation of User::setOperand() or > MachineOperand::setReg(). When these changes the value of an operand, > it needs to remove the current 'instruction' from the use list of the > old value and add it to the new value. I assure you that it is > constant time, exactly because it doesn't have to scan the whole > list. It just unlinks it form the middle of the list with no search. > This makes it very fast and scalable. OK. My fault. Now I really understood how it works! ;-) I tried to apply the same principle to SDNodes. This means: 1) Each SDNode maintains an std::list of uses, i.e. list of pointers to SDNodes using it. 2) Each SDNode has a field that links it into the Uses list of SDNode used by this node. This link is an iterator pointing to the position inside the SDNode::Uses list. Since one node can use multiple other nodes, each SDNode has once such link field per SDOperand. More precisely, I introduced the Used files, which is an array of iterators pointing into Uses lists of nodes used by current SDNode. This array is allocated dynamically and at the same places, where OperandList is allocated or set. 3) The rest of the code is unaffected for now. But probably, with this approach, replaceAllUses.. can be done faster by rewriting it in a more intelligent way,e.g. bulk removals or moving the whole Uses list at once or something like that? With these changes, Insertion become fast, removal is also very fast, both are constant time, as you said. Chris, would you say it is the approach that you had in mind? I tried to test on kimwitu, as you suggested, by compiling the big kw.llc.bc file. First of all, according to profiler, there are no real bottlenecks, consuming most of the time. The most interesting thing, though, is that this implementation has roughly the same performance on kimwitu (+1%), but is definitely worse on the huge big4.bc. In this one, it is about 10% worse for some reason (and profiler shows suddenly that SDOperand::operator == is the hottest function, when called from SDNode::hasNUsesOfValue. I have no idea why... I repeated tests multiple times, but it always produces the same result. With my set approach, the same function does not consume any time...). I guess it is somehow related to the memory access locality or something like that. Any good ideas explaining my findings? I attach the patch, just for the sake of completeness. It is really ugly and has a lot of conditional compilation, but gives you the idea. Also, having implemented both approaches, I can say that in my opinion the approach proposed by you is more intrusive in terms of source code modifications and it changes the SDNodes objects structure too much. I mean, to implement such an approach you put some "quick links" into your objects and you affect both Uses and Values. If your value object is used in many different contexts (e.g. in many different lists), you would introduce into the object more and more links to all those contexts. This increases the complexity and introduces a rather tight coupling between the data structures, which could make later code modifications more difficult. Any comments are welcome. -Roman -------------- next part -------------- A non-text attachment was scrubbed... Name: SelectionDAG.patch Type: text/x-patch Size: 16212 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080307/e4846f20/attachment.bin From dpatel at apple.com Fri Mar 7 10:37:24 2008 From: dpatel at apple.com (Devang Patel) Date: Fri, 7 Mar 2008 08:37:24 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r48004 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp In-Reply-To: <200803062324.m26NOJlx013392@zion.cs.uiuc.edu> References: <200803062324.m26NOJlx013392@zion.cs.uiuc.edu> Message-ID: <226A70FB-B30F-41F0-830D-CD066B11B53E@apple.com> On Mar 6, 2008, at 3:24 PM, Dan Gohman wrote: > Author: djg > Date: Thu Mar 6 17:24:19 2008 > New Revision: 48004 > > URL: http://llvm.org/viewvc/llvm-project?rev=48004&view=rev > Log: > Remove the code that restricted integer types to 1, 8, 16, 32, and > 64, now > that llvm codegen supports i128 well enough to get through the llvm- > gcc build. Does this mean now it is possible to have bit-field larger then 64 bits ? If so then we have hardcoded that limit in couple of places... llvm-types.cpp 1544 NewFieldTy = Type::Int32Ty; 1545 else { 1546 assert(Size <= 64 && "Bitfield too large!"); 1547 NewFieldTy = Type::Int64Ty; 1548 } 1871 if (NumBitsRequired > 64) { 1872 // Use bits from previous field. 1873 NumBitsRequired = FieldSizeInBits - AvailableBits; 1874 } else { - Devang -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080307/3081a97c/attachment.html From gordonhenriksen at mac.com Fri Mar 7 12:19:48 2008 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Fri, 07 Mar 2008 18:19:48 -0000 Subject: [llvm-commits] [llvm] r48007 - /llvm/trunk/autoconf/configure.ac Message-ID: <200803071819.m27IJmHZ021128@zion.cs.uiuc.edu> Author: gordon Date: Fri Mar 7 12:19:47 2008 New Revision: 48007 URL: http://llvm.org/viewvc/llvm-project?rev=48007&view=rev Log: Prefer to use ocamlc.opt to ocamlc and soforth. These natively compiled versions are faster. Patch by Erick Tryzelaar! Modified: llvm/trunk/autoconf/configure.ac Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=48007&r1=48006&r2=48007&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Fri Mar 7 12:19:47 2008 @@ -589,9 +589,9 @@ AC_PATH_PROG(RUNTEST, [runtest]) DJ_AC_PATH_TCLSH AC_PATH_PROG(ZIP, [zip]) -AC_PATH_PROG(OCAMLC, [ocamlc]) -AC_PATH_PROG(OCAMLOPT, [ocamlopt]) -AC_PATH_PROG(OCAMLDEP, [ocamldep]) +AC_PATH_PROGS(OCAMLC, [ocamlc.opt ocamlc]) +AC_PATH_PROGS(OCAMLOPT, [ocamlopt.opt ocamlopt]) +AC_PATH_PROGS(OCAMLDEP, [ocamldep.opt ocamldep]) dnl Determine if the linker supports the -R option. AC_LINK_USE_R From gordonhenriksen at mac.com Fri Mar 7 12:20:01 2008 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Fri, 07 Mar 2008 18:20:01 -0000 Subject: [llvm-commits] [llvm] r48008 - /llvm/trunk/configure Message-ID: <200803071820.m27IK1qP021155@zion.cs.uiuc.edu> Author: gordon Date: Fri Mar 7 12:20:01 2008 New Revision: 48008 URL: http://llvm.org/viewvc/llvm-project?rev=48008&view=rev Log: Regenerate. Modified: llvm/trunk/configure Modified: llvm/trunk/configure URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=48008&r1=48007&r2=48008&view=diff ============================================================================== --- llvm/trunk/configure (original) +++ llvm/trunk/configure Fri Mar 7 12:20:01 2008 @@ -7987,8 +7987,10 @@ fi -# Extract the first word of "ocamlc", so it can be a program name with args. -set dummy ocamlc; ac_word=$2 +for ac_prog in ocamlc.opt ocamlc +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 { echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } if test "${ac_cv_path_OCAMLC+set}" = set; then @@ -8027,8 +8029,13 @@ fi -# Extract the first word of "ocamlopt", so it can be a program name with args. -set dummy ocamlopt; ac_word=$2 + test -n "$OCAMLC" && break +done + +for ac_prog in ocamlopt.opt ocamlopt +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 { echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } if test "${ac_cv_path_OCAMLOPT+set}" = set; then @@ -8067,8 +8074,13 @@ fi -# Extract the first word of "ocamldep", so it can be a program name with args. -set dummy ocamldep; ac_word=$2 + test -n "$OCAMLOPT" && break +done + +for ac_prog in ocamldep.opt ocamldep +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 { echo "$as_me:$LINENO: checking for $ac_word" >&5 echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } if test "${ac_cv_path_OCAMLDEP+set}" = set; then @@ -8107,6 +8119,9 @@ fi + test -n "$OCAMLDEP" && break +done + { echo "$as_me:$LINENO: checking for compiler -Wl,-R option" >&5 echo $ECHO_N "checking for compiler -Wl,-R option... $ECHO_C" >&6; } @@ -10569,7 +10584,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext < conftest.$ac_ext + echo '#line 12731 "configure"' > conftest.$ac_ext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? @@ -14431,11 +14446,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14434: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14449: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:14438: \$? = $ac_status" >&5 + echo "$as_me:14453: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -14699,11 +14714,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14702: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14717: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:14706: \$? = $ac_status" >&5 + echo "$as_me:14721: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -14803,11 +14818,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:14806: $lt_compile\"" >&5) + (eval echo "\"\$as_me:14821: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:14810: \$? = $ac_status" >&5 + echo "$as_me:14825: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -17255,7 +17270,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext < conftest.$ac_ext <&5) + (eval echo "\"\$as_me:19741: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:19730: \$? = $ac_status" >&5 + echo "$as_me:19745: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -19827,11 +19842,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:19830: $lt_compile\"" >&5) + (eval echo "\"\$as_me:19845: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:19834: \$? = $ac_status" >&5 + echo "$as_me:19849: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -21397,11 +21412,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:21400: $lt_compile\"" >&5) + (eval echo "\"\$as_me:21415: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:21404: \$? = $ac_status" >&5 + echo "$as_me:21419: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -21501,11 +21516,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:21504: $lt_compile\"" >&5) + (eval echo "\"\$as_me:21519: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:21508: \$? = $ac_status" >&5 + echo "$as_me:21523: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -23736,11 +23751,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:23739: $lt_compile\"" >&5) + (eval echo "\"\$as_me:23754: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:23743: \$? = $ac_status" >&5 + echo "$as_me:23758: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -24004,11 +24019,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:24007: $lt_compile\"" >&5) + (eval echo "\"\$as_me:24022: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:24011: \$? = $ac_status" >&5 + echo "$as_me:24026: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -24108,11 +24123,11 @@ -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:24111: $lt_compile\"" >&5) + (eval echo "\"\$as_me:24126: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:24115: \$? = $ac_status" >&5 + echo "$as_me:24130: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized From gohman at apple.com Fri Mar 7 12:23:47 2008 From: gohman at apple.com (Dan Gohman) Date: Fri, 7 Mar 2008 10:23:47 -0800 (PST) Subject: [llvm-commits] Speeding up instruction selection In-Reply-To: References: <9B43CA3F-5C45-4D36-A80F-9A840E3DA5EB@apple.com> <8555B624-69BC-40A3-B417-DD904927D51C@apple.com> <1F69CEC2-93D3-4EDA-89F3-BF48BB229183@apple.com> Message-ID: <54728.76.126.219.198.1204914227.squirrel@webmail.apple.com> On Fri, March 7, 2008 7:26 am, Roman Levenstein wrote: > The most interesting thing, though, is that this implementation has > roughly the same performance on kimwitu (+1%), but is definitely worse > on the huge big4.bc. In this one, it is about 10% worse for some > reason (and profiler shows suddenly that SDOperand::operator == is the > hottest function, when called from SDNode::hasNUsesOfValue. I have no > idea why... I repeated tests multiple times, but it always produces > the same result. With my set approach, the same function does not > consume any time...). I guess it is somehow related to the memory > access locality or something like that. Any good ideas explaining my > findings? Hmm, SDNode's Uses list doesn't track result numbers, so SDNode::hasNUsesOfValue has to iterate through every operand of every user of a node, calling SDOperand::operator== on each one. It doesn't explain why this function doesn't show up in the profile with your set approach, but it does seem like something that could be causing trouble. It would be interesting to try extending Uses to hold result numbers along with the users, which would make the inner loop of hasNUsesOfValue unnecessary. It looks like there are several other places in codegen where this would apply as well. Dan From asl at math.spbu.ru Fri Mar 7 12:32:19 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Fri, 07 Mar 2008 18:32:19 -0000 Subject: [llvm-commits] [llvm] r48009 - /llvm/trunk/lib/Linker/LinkModules.cpp Message-ID: <200803071832.m27IWJmV021492@zion.cs.uiuc.edu> Author: asl Date: Fri Mar 7 12:32:18 2008 New Revision: 48009 URL: http://llvm.org/viewvc/llvm-project?rev=48009&view=rev Log: Small cleanup: propagate thread-localness via generic routine. No functionality change. Modified: llvm/trunk/lib/Linker/LinkModules.cpp Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=48009&r1=48008&r2=48009&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Fri Mar 7 12:32:18 2008 @@ -361,6 +361,9 @@ DestF->setParamAttrs(SrcF->getParamAttrs()); if (SrcF->hasCollector()) DestF->setCollector(SrcF->getCollector()); + } else if (const GlobalVariable *SrcVar = dyn_cast(SrcGV)) { + GlobalVariable *DestVar = cast(DestGV); + DestVar->setThreadLocal(SrcVar->isThreadLocal()); } } @@ -488,7 +491,7 @@ GlobalVariable *NewDGV = new GlobalVariable(SGV->getType()->getElementType(), SGV->isConstant(), SGV->getLinkage(), /*init*/0, - SGV->getName(), Dest, SGV->isThreadLocal()); + SGV->getName(), Dest); // Propagate alignment, visibility and section info. CopyGVAttributes(NewDGV, SGV); @@ -511,9 +514,9 @@ GlobalVariable *NewDGV = new GlobalVariable(SGV->getType()->getElementType(), SGV->isConstant(), SGV->getLinkage(), /*init*/0, - "", Dest, SGV->isThreadLocal()); + "", Dest); - // Propagate alignment, section and visibility info. + // Propagate alignment, section and visibility info. NewDGV->setAlignment(DGV->getAlignment()); CopyGVAttributes(NewDGV, SGV); @@ -523,17 +526,17 @@ // Keep track that this is an appending variable... AppendingVars.insert(std::make_pair(SGV->getName(), NewDGV)); } else { + // Otherwise, perform the mapping as instructed by GetLinkageResult. + // Propagate alignment, section, and visibility info. CopyGVAttributes(DGV, SGV); - // Otherwise, perform the mapping as instructed by GetLinkageResult. If - // the types don't match, and if we are to link from the source, nuke DGV - // and create a new one of the appropriate type. + // If the types don't match, and if we are to link from the source, nuke + // DGV and create a new one of the appropriate type. if (SGV->getType() != DGV->getType() && LinkFromSrc) { GlobalVariable *NewDGV = new GlobalVariable(SGV->getType()->getElementType(), DGV->isConstant(), DGV->getLinkage()); - NewDGV->setThreadLocal(DGV->isThreadLocal()); CopyGVAttributes(NewDGV, DGV); Dest->getGlobalList().insert(DGV, NewDGV); DGV->replaceAllUsesWith( From asl at math.spbu.ru Fri Mar 7 12:34:50 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Fri, 07 Mar 2008 18:34:50 -0000 Subject: [llvm-commits] [llvm] r48010 - /llvm/trunk/lib/Linker/LinkModules.cpp Message-ID: <200803071834.m27IYob9021570@zion.cs.uiuc.edu> Author: asl Date: Fri Mar 7 12:34:50 2008 New Revision: 48010 URL: http://llvm.org/viewvc/llvm-project?rev=48010&view=rev Log: Clarify some important bits Modified: llvm/trunk/lib/Linker/LinkModules.cpp Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=48010&r1=48009&r2=48010&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Fri Mar 7 12:34:50 2008 @@ -516,8 +516,9 @@ SGV->isConstant(), SGV->getLinkage(), /*init*/0, "", Dest); - // Propagate alignment, section and visibility info. + // Set alignment allowing CopyGVAttributes merge it with alignment of SGV. NewDGV->setAlignment(DGV->getAlignment()); + // Propagate alignment, section and visibility info. CopyGVAttributes(NewDGV, SGV); // Make sure to remember this mapping... From gordonhenriksen at mac.com Fri Mar 7 12:43:51 2008 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Fri, 07 Mar 2008 18:43:51 -0000 Subject: [llvm-commits] [llvm] r48012 - /llvm/trunk/bindings/ocaml/Makefile.ocaml Message-ID: <200803071843.m27Ihp6T021826@zion.cs.uiuc.edu> Author: gordon Date: Fri Mar 7 12:43:51 2008 New Revision: 48012 URL: http://llvm.org/viewvc/llvm-project?rev=48012&view=rev Log: Fix a typo. 'make clean' in bindings/ocaml would leave an output. Modified: llvm/trunk/bindings/ocaml/Makefile.ocaml Modified: llvm/trunk/bindings/ocaml/Makefile.ocaml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/Makefile.ocaml?rev=48012&r1=48011&r2=48012&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/Makefile.ocaml (original) +++ llvm/trunk/bindings/ocaml/Makefile.ocaml Fri Mar 7 12:43:51 2008 @@ -260,7 +260,7 @@ $(Verb) $(Compile.CMX) $@ $< clean-cmxa:: - $(Verb) $(RM) -f $(OutputCMXA) $(OutputCMXA:.cmxa=.o) $(OutputsCMX) + $(Verb) $(RM) -f $(OutputCMXA) $(OutputCMXA:.cmxa=.a) $(OutputsCMX) install-cmxa:: $(OutputCMXA) $(OutputsCMX) $(Verb) $(MKDIR) $(PROJ_libocamldir) From gordonhenriksen at mac.com Fri Mar 7 13:13:06 2008 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Fri, 07 Mar 2008 19:13:06 -0000 Subject: [llvm-commits] [llvm] r48014 - in /llvm/trunk: bindings/ocaml/llvm/llvm.ml bindings/ocaml/llvm/llvm.mli bindings/ocaml/llvm/llvm_ocaml.c include/llvm-c/Core.h Message-ID: <200803071913.m27JD6gF022711@zion.cs.uiuc.edu> Author: gordon Date: Fri Mar 7 13:13:06 2008 New Revision: 48014 URL: http://llvm.org/viewvc/llvm-project?rev=48014&view=rev Log: Cleanup some comments in the OCaml bindings. Patch by Erick Tryzelaar. Modified: llvm/trunk/bindings/ocaml/llvm/llvm.ml llvm/trunk/bindings/ocaml/llvm/llvm.mli llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c llvm/trunk/include/llvm-c/Core.h Modified: llvm/trunk/bindings/ocaml/llvm/llvm.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm.ml?rev=48014&r1=48013&r2=48014&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm.ml (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm.ml Fri Mar 7 13:13:06 2008 @@ -1,4 +1,4 @@ -(*===-- tools/ml/llvm.ml - LLVM Ocaml Interface ---------------------------===* +(*===-- llvm/llvm.ml - LLVM Ocaml Interface --------------------------------===* * * The LLVM Compiler Infrastructure * Modified: llvm/trunk/bindings/ocaml/llvm/llvm.mli URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm.mli?rev=48014&r1=48013&r2=48014&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm.mli (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm.mli Fri Mar 7 13:13:06 2008 @@ -1,4 +1,4 @@ -(*===-- tools/ml/llvm.ml - LLVM Ocaml Interface ---------------------------===* +(*===-- llvm/llvm.mli - LLVM Ocaml Interface -------------------------------===* * * The LLVM Compiler Infrastructure * Modified: llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c?rev=48014&r1=48013&r2=48014&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c Fri Mar 7 13:13:06 2008 @@ -1,4 +1,4 @@ -/*===-- llvm_ocaml.h - LLVM Ocaml Glue --------------------------*- C++ -*-===*\ +/*===-- llvm_ocaml.c - LLVM Ocaml Glue --------------------------*- C++ -*-===*\ |* *| |* The LLVM Compiler Infrastructure *| |* *| Modified: llvm/trunk/include/llvm-c/Core.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm-c/Core.h?rev=48014&r1=48013&r2=48014&view=diff ============================================================================== --- llvm/trunk/include/llvm-c/Core.h (original) +++ llvm/trunk/include/llvm-c/Core.h Fri Mar 7 13:13:06 2008 @@ -53,15 +53,15 @@ typedef struct LLVMOpaqueModule *LLVMModuleRef; /** - * Each value in the LLVM IR has a type, an instance of [lltype]. See the - * llvm::Type class. + * Each value in the LLVM IR has a type, an LLVMTypeRef. See the llvm::Type + * class. */ typedef struct LLVMOpaqueType *LLVMTypeRef; /** - * When building recursive types using [refine_type], [lltype] values may become - * invalid; use [lltypehandle] to resolve this problem. See the - * llvm::AbstractTypeHolder] class. + * When building recursive types using LLVMRefineType, LLVMTypeRef values may + * become invalid; use LLVMTypeHandleRef to resolve this problem. See the + * llvm::AbstractTypeHolder class. */ typedef struct LLVMOpaqueTypeHandle *LLVMTypeHandleRef; @@ -165,18 +165,21 @@ /*===-- Modules -----------------------------------------------------------===*/ /* Create and destroy modules. */ +/** See llvm::Module::Module. */ LLVMModuleRef LLVMModuleCreateWithName(const char *ModuleID); + +/** See llvm::Module::~Module. */ void LLVMDisposeModule(LLVMModuleRef M); -/* Data layout */ +/** Data layout. See Module::getDataLayout. */ const char *LLVMGetDataLayout(LLVMModuleRef M); void LLVMSetDataLayout(LLVMModuleRef M, const char *Triple); -/* Target triple */ +/** Target triple. See Module::getTargetTriple. */ const char *LLVMGetTarget(LLVMModuleRef M); void LLVMSetTarget(LLVMModuleRef M, const char *Triple); -/* Same as Module::addTypeName. */ +/** See Module::addTypeName. */ int LLVMAddTypeName(LLVMModuleRef M, const char *Name, LLVMTypeRef Ty); void LLVMDeleteTypeName(LLVMModuleRef M, const char *Name); @@ -198,7 +201,10 @@ * opaque type */ +/** See llvm::LLVMTypeKind::getTypeID. */ LLVMTypeKind LLVMGetTypeKind(LLVMTypeRef Ty); + +/** See llvm::DerivedType::refineAbstractTypeTo. */ void LLVMRefineAbstractType(LLVMTypeRef AbstractType, LLVMTypeRef ConcreteType); /* Operations on integer types */ From gabor at mac.com Fri Mar 7 13:41:19 2008 From: gabor at mac.com (Gabor Greif) Date: Fri, 7 Mar 2008 20:41:19 +0100 Subject: [llvm-commits] Speeding up instruction selection Message-ID: <2B4B22D9-D677-4068-9589-6E9A2B7FA39C@mac.com> Dan wrote: > Hmm, SDNode's Uses list doesn't track result numbers, so > SDNode::hasNUsesOfValue has to iterate through every operand of > every user of a node, calling SDOperand::operator== on each one. > It doesn't explain why this function doesn't show up in the profile > with your set approach, but it does seem like something that could Because std::set does not use operator== to find the node in question. Instead it uses operator< and assumes equality if !(a be causing trouble. It would be interesting to try extending Uses to > hold result numbers along with the users, which would make the inner > loop of hasNUsesOfValue unnecessary. It looks like there are several > other places in codegen where this would apply as well. > > Dan -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080307/f82d7f34/attachment.html From alenhar2 at cs.uiuc.edu Fri Mar 7 13:51:57 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Fri, 07 Mar 2008 19:51:57 -0000 Subject: [llvm-commits] [llvm] r48015 - in /llvm/trunk: include/llvm/Transforms/IPO.h lib/Transforms/IPO/ExtractGV.cpp tools/llvm-extract/llvm-extract.cpp Message-ID: <200803071951.m27JpvB5023912@zion.cs.uiuc.edu> Author: alenhar2 Date: Fri Mar 7 13:51:57 2008 New Revision: 48015 URL: http://llvm.org/viewvc/llvm-project?rev=48015&view=rev Log: add a pass that can extract all kinds of global values, not just functions. Update llvm-extract to use it and optionally extract a global variable if you want it too Added: llvm/trunk/lib/Transforms/IPO/ExtractGV.cpp Modified: llvm/trunk/include/llvm/Transforms/IPO.h llvm/trunk/tools/llvm-extract/llvm-extract.cpp Modified: llvm/trunk/include/llvm/Transforms/IPO.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/IPO.h?rev=48015&r1=48014&r2=48015&view=diff ============================================================================== --- llvm/trunk/include/llvm/Transforms/IPO.h (original) +++ llvm/trunk/include/llvm/Transforms/IPO.h Fri Mar 7 13:51:57 2008 @@ -24,6 +24,7 @@ class Pass; class Function; class BasicBlock; +class GlobalValue; //===----------------------------------------------------------------------===// // @@ -85,6 +86,14 @@ ModulePass *createFunctionExtractionPass(Function *F, bool deleteFn = false, bool relinkCallees = false); +//===----------------------------------------------------------------------===// +/// createGVExtractionPass - If deleteFn is true, this pass deletes as +/// the specified global values. Otherwise, it deletes as much of the module as +/// possible, except for the global values specified. +/// +ModulePass *createGVExtractionPass(std::vector& GVs, bool + deleteFn = false, + bool relinkCallees = false); //===----------------------------------------------------------------------===// /// createFunctionInliningPass - Return a new pass object that uses a heuristic Added: llvm/trunk/lib/Transforms/IPO/ExtractGV.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/ExtractGV.cpp?rev=48015&view=auto ============================================================================== --- llvm/trunk/lib/Transforms/IPO/ExtractGV.cpp (added) +++ llvm/trunk/lib/Transforms/IPO/ExtractGV.cpp Fri Mar 7 13:51:57 2008 @@ -0,0 +1,174 @@ +//===-- ExtractGV.cpp - Global Value extraction pass ----------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This pass extracts global values +// +//===----------------------------------------------------------------------===// + +#include "llvm/Instructions.h" +#include "llvm/Module.h" +#include "llvm/Pass.h" +#include "llvm/Constants.h" +#include "llvm/Transforms/IPO.h" +#include "llvm/Support/Compiler.h" +using namespace llvm; + +namespace { + /// @brief A pass to extract specific functions and their dependencies. + class VISIBILITY_HIDDEN GVExtractorPass : public ModulePass { + std::vector Named; + bool deleteStuff; + bool reLink; + public: + static char ID; // Pass identification, replacement for typeid + + /// FunctionExtractorPass - If deleteFn is true, this pass deletes as the + /// specified function. Otherwise, it deletes as much of the module as + /// possible, except for the function specified. + /// + explicit GVExtractorPass(std::vector& GVs, bool deleteS = true, + bool relinkCallees = false) + : ModulePass((intptr_t)&ID), Named(GVs), deleteStuff(deleteS), + reLink(relinkCallees) {} + + bool runOnModule(Module &M) { + if (Named.size() == 0) { + return false; // Nothing to extract + } + + if (deleteStuff) + return deleteGV(); + M.setModuleInlineAsm(""); + return isolateGV(M); + } + + bool deleteGV() { + for (std::vector::iterator GI = Named.begin(), + GE = Named.end(); GI != GE; ++GI) { + if (Function* NamedFunc = dyn_cast(&*GI)) { + // If we're in relinking mode, set linkage of all internal callees to + // external. This will allow us extract function, and then - link + // everything together + if (reLink) { + for (Function::iterator B = NamedFunc->begin(), BE = NamedFunc->end(); + B != BE; ++B) { + for (BasicBlock::iterator I = B->begin(), E = B->end(); + I != E; ++I) { + if (CallInst* callInst = dyn_cast(&*I)) { + Function* Callee = callInst->getCalledFunction(); + if (Callee && Callee->hasInternalLinkage()) + Callee->setLinkage(GlobalValue::ExternalLinkage); + } + } + } + } + + NamedFunc->setLinkage(GlobalValue::ExternalLinkage); + NamedFunc->deleteBody(); + assert(NamedFunc->isDeclaration() && "This didn't make the function external!"); + } else { + if (!(*GI)->isDeclaration()) { + cast(*GI)->setInitializer(0); //clear the initializer + (*GI)->setLinkage(GlobalValue::ExternalLinkage); + } + } + } + return true; + } + + bool isolateGV(Module &M) { + // Mark all globals internal + for (Module::global_iterator I = M.global_begin(), E = M.global_end(); I != E; ++I) + if (!I->isDeclaration()) { + I->setLinkage(GlobalValue::InternalLinkage); + } + for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) + if (!I->isDeclaration()) { + I->setLinkage(GlobalValue::InternalLinkage); + } + + // Make sure our result is globally accessible... + // by putting them in the used array + { + std::vector AUGs; + const Type *SBP= PointerType::getUnqual(Type::Int8Ty); + for (std::vector::iterator GI = Named.begin(), + GE = Named.end(); GI != GE; ++GI) { + (*GI)->setLinkage(GlobalValue::ExternalLinkage); + AUGs.push_back(ConstantExpr::getBitCast(*GI, SBP)); + } + ArrayType *AT = ArrayType::get(SBP, AUGs.size()); + Constant *Init = ConstantArray::get(AT, AUGs); + GlobalValue *gv = new GlobalVariable(AT, false, + GlobalValue::AppendingLinkage, + Init, "llvm.used", &M); + gv->setSection("llvm.metadata"); + } + + // All of the functions may be used by global variables or the named + // globals. Loop through them and create a new, external functions that + // can be "used", instead of ones with bodies. + std::vector NewFunctions; + + Function *Last = --M.end(); // Figure out where the last real fn is. + + for (Module::iterator I = M.begin(); ; ++I) { + if (std::find(Named.begin(), Named.end(), &*I) == Named.end()) { + Function *New = new Function(I->getFunctionType(), + GlobalValue::ExternalLinkage); + New->setCallingConv(I->getCallingConv()); + New->setParamAttrs(I->getParamAttrs()); + if (I->hasCollector()) + New->setCollector(I->getCollector()); + + // If it's not the named function, delete the body of the function + I->dropAllReferences(); + + M.getFunctionList().push_back(New); + NewFunctions.push_back(New); + New->takeName(I); + } + + if (&*I == Last) break; // Stop after processing the last function + } + + // Now that we have replacements all set up, loop through the module, + // deleting the old functions, replacing them with the newly created + // functions. + if (!NewFunctions.empty()) { + unsigned FuncNum = 0; + Module::iterator I = M.begin(); + do { + if (std::find(Named.begin(), Named.end(), &*I) == Named.end()) { + // Make everything that uses the old function use the new dummy fn + I->replaceAllUsesWith(NewFunctions[FuncNum++]); + + Function *Old = I; + ++I; // Move the iterator to the new function + + // Delete the old function! + M.getFunctionList().erase(Old); + + } else { + ++I; // Skip the function we are extracting + } + } while (&*I != NewFunctions[0]); + } + + return true; + } + }; + + char GVExtractorPass::ID = 0; +} + +ModulePass *llvm::createGVExtractionPass(std::vector& GVs, + bool deleteFn, bool relinkCallees) { + return new GVExtractorPass(GVs, deleteFn, relinkCallees); +} Modified: llvm/trunk/tools/llvm-extract/llvm-extract.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-extract/llvm-extract.cpp?rev=48015&r1=48014&r2=48015&view=diff ============================================================================== --- llvm/trunk/tools/llvm-extract/llvm-extract.cpp (original) +++ llvm/trunk/tools/llvm-extract/llvm-extract.cpp Fri Mar 7 13:51:57 2008 @@ -39,17 +39,22 @@ Force("f", cl::desc("Overwrite output files")); static cl::opt -DeleteFn("delete", cl::desc("Delete specified function from Module")); +DeleteFn("delete", cl::desc("Delete specified Globals from Module")); static cl::opt Relink("relink", cl::desc("Turn external linkage for callees of function to delete")); -// ExtractFunc - The function to extract from the module... defaults to main. +// ExtractFunc - The function to extract from the module... static cl::opt -ExtractFunc("func", cl::desc("Specify function to extract"), cl::init("main"), +ExtractFunc("func", cl::desc("Specify function to extract"), cl::init(""), cl::value_desc("function")); +// ExtractGlobal - The global to extract from the module... +static cl::opt +ExtractGlobal("glob", cl::desc("Specify global to extract"), cl::init(""), + cl::value_desc("global")); + int main(int argc, char **argv) { llvm_shutdown_obj X; // Call llvm_shutdown() on exit. cl::ParseCommandLineOptions(argc, argv, "llvm extractor\n"); @@ -72,10 +77,17 @@ } // Figure out which function we should extract - Function *F = M.get()->getFunction(ExtractFunc); - if (F == 0) { + GlobalVariable *G = ExtractGlobal.size() ? + M.get()->getNamedGlobal(ExtractGlobal) : 0; + + // Figure out which function we should extract + Function *F = ExtractFunc.size() ? + M.get()->getFunction(ExtractFunc) : + M.get()->getFunction("main"); + + if (F == 0 && G == 0) { cerr << argv[0] << ": program doesn't contain function named '" - << ExtractFunc << "'!\n"; + << ExtractFunc << "' or a global named '" << ExtractGlobal << "'!\n"; return 1; } @@ -84,7 +96,11 @@ PassManager Passes; Passes.add(new TargetData(M.get())); // Use correct TargetData // Either isolate the function or delete it from the Module - Passes.add(createFunctionExtractionPass(F, DeleteFn, Relink)); + std::vector GVs; + if (F) GVs.push_back(F); + if (G) GVs.push_back(G); + + Passes.add(createGVExtractionPass(GVs, DeleteFn, Relink)); if (!DeleteFn) Passes.add(createGlobalDCEPass()); // Delete unreachable globals Passes.add(createDeadTypeEliminationPass()); // Remove dead types... From dpatel at apple.com Fri Mar 7 14:00:15 2008 From: dpatel at apple.com (Devang Patel) Date: Fri, 07 Mar 2008 20:00:15 -0000 Subject: [llvm-commits] [llvm] r48016 - in /llvm/trunk/test/Transforms/SRETPromotion: ./ dg.exp Message-ID: <200803072000.m27K0FpP024243@zion.cs.uiuc.edu> Author: dpatel Date: Fri Mar 7 14:00:15 2008 New Revision: 48016 URL: http://llvm.org/viewvc/llvm-project?rev=48016&view=rev Log: Place for sret promotion tests. Added: llvm/trunk/test/Transforms/SRETPromotion/ llvm/trunk/test/Transforms/SRETPromotion/dg.exp Added: llvm/trunk/test/Transforms/SRETPromotion/dg.exp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SRETPromotion/dg.exp?rev=48016&view=auto ============================================================================== --- llvm/trunk/test/Transforms/SRETPromotion/dg.exp (added) +++ llvm/trunk/test/Transforms/SRETPromotion/dg.exp Fri Mar 7 14:00:15 2008 @@ -0,0 +1,3 @@ +load_lib llvm.exp + +RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,llx,c,cpp,tr}]] From sabre at nondot.org Fri Mar 7 14:05:43 2008 From: sabre at nondot.org (Chris Lattner) Date: Fri, 07 Mar 2008 20:05:43 -0000 Subject: [llvm-commits] [llvm] r48019 - in /llvm/trunk/lib/ExecutionEngine/JIT: JITEmitter.cpp JITMemoryManager.cpp Message-ID: <200803072005.m27K5h8D024464@zion.cs.uiuc.edu> Author: lattner Date: Fri Mar 7 14:05:43 2008 New Revision: 48019 URL: http://llvm.org/viewvc/llvm-project?rev=48019&view=rev Log: fix 80 col violations Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp llvm/trunk/lib/ExecutionEngine/JIT/JITMemoryManager.cpp Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp?rev=48019&r1=48018&r2=48019&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Fri Mar 7 14:05:43 2008 @@ -589,7 +589,8 @@ ActualSize); BufferEnd = BufferBegin+ActualSize; unsigned char* FrameRegister = DE->EmitDwarfTable(F, *this, FnStart, FnEnd); - MemMgr->endExceptionTable(F.getFunction(), BufferBegin, CurBufferPtr, FrameRegister); + MemMgr->endExceptionTable(F.getFunction(), BufferBegin, CurBufferPtr, + FrameRegister); BufferBegin = SavedBufferBegin; BufferEnd = SavedBufferEnd; CurBufferPtr = SavedCurBufferPtr; Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITMemoryManager.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITMemoryManager.cpp?rev=48019&r1=48018&r2=48019&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/JIT/JITMemoryManager.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/JIT/JITMemoryManager.cpp Fri Mar 7 14:05:43 2008 @@ -295,7 +295,8 @@ /// startExceptionTable - Use startFunctionBody to allocate memory for the /// function's exception table. - unsigned char* startExceptionTable(const Function* F, uintptr_t &ActualSize) { + unsigned char* startExceptionTable(const Function* F, + uintptr_t &ActualSize) { return startFunctionBody(F, ActualSize); } From dpatel at apple.com Fri Mar 7 14:06:16 2008 From: dpatel at apple.com (Devang Patel) Date: Fri, 07 Mar 2008 20:06:16 -0000 Subject: [llvm-commits] [llvm] r48020 - in /llvm/trunk: lib/Transforms/Utils/InlineFunction.cpp test/Transforms/SRETPromotion/2008-03-07-Inline-2.ll test/Transforms/SRETPromotion/2008-03-07-Inline.ll Message-ID: <200803072006.m27K6HTV024490@zion.cs.uiuc.edu> Author: dpatel Date: Fri Mar 7 14:06:16 2008 New Revision: 48020 URL: http://llvm.org/viewvc/llvm-project?rev=48020&view=rev Log: Update inliner to handle functions that return multiple values. Added: llvm/trunk/test/Transforms/SRETPromotion/2008-03-07-Inline-2.ll llvm/trunk/test/Transforms/SRETPromotion/2008-03-07-Inline.ll Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp?rev=48020&r1=48019&r2=48020&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Fri Mar 7 14:06:16 2008 @@ -503,65 +503,74 @@ // Now that the function is correct, make it a little bit nicer. In // particular, move the basic blocks inserted from the end of the function // into the space made by splitting the source basic block. - // Caller->getBasicBlockList().splice(AfterCallBB, Caller->getBasicBlockList(), FirstNewBlock, Caller->end()); // Handle all of the return instructions that we just cloned in, and eliminate // any users of the original call/invoke instruction. - if (Returns.size() > 1) { + if (!Returns.empty()) { // The PHI node should go at the front of the new basic block to merge all // possible incoming values. - // - PHINode *PHI = 0; + SmallVector PHIs; if (!TheCall->use_empty()) { - PHI = new PHINode(CalledFunc->getReturnType(), - TheCall->getName(), AfterCallBB->begin()); - - // Anything that used the result of the function call should now use the - // PHI node as their operand. - // - TheCall->replaceAllUsesWith(PHI); + const Type *RTy = CalledFunc->getReturnType(); + if (const StructType *STy = dyn_cast(RTy)) { + unsigned NumRetVals = STy->getNumElements(); + // Create new phi nodes such that phi node number in the PHIs vector + // match corresponding return value operand number. + for (unsigned i = 0; i < NumRetVals; ++i) { + PHINode *PHI = new PHINode(STy->getElementType(i), + TheCall->getName(), AfterCallBB->begin()); + PHIs.push_back(PHI); + } + // TheCall results are used by GetResult instructions. + while (!TheCall->use_empty()) { + GetResultInst *GR = cast(TheCall->use_back()); + GR->replaceAllUsesWith(PHIs[GR->getIndex()]); + GR->eraseFromParent(); + } + } else { + PHINode *PHI = new PHINode(RTy, TheCall->getName(), AfterCallBB->begin()); + PHIs.push_back(PHI); + // Anything that used the result of the function call should now use the + // PHI node as their operand. + TheCall->replaceAllUsesWith(PHI); + } } - // Loop over all of the return instructions, turning them into unconditional - // branches to the merge point now, and adding entries to the PHI node as + // Loop over all of the return instructions adding entries to the PHI node as // appropriate. - for (unsigned i = 0, e = Returns.size(); i != e; ++i) { - ReturnInst *RI = Returns[i]; - - if (PHI) { - assert(RI->getReturnValue() && "Ret should have value!"); - assert(RI->getReturnValue()->getType() == PHI->getType() && - "Ret value not consistent in function!"); - PHI->addIncoming(RI->getReturnValue(), RI->getParent()); + if (!PHIs.empty()) { + const Type *RTy = CalledFunc->getReturnType(); + if (const StructType *STy = dyn_cast(RTy)) { + unsigned NumRetVals = STy->getNumElements(); + for (unsigned j = 0; j < NumRetVals; ++j) { + PHINode *PHI = PHIs[j]; + // Each PHI node will receive one value from each return instruction. + for(unsigned i = 0, e = Returns.size(); i != e; ++i) { + ReturnInst *RI = Returns[i]; + PHI->addIncoming(RI->getReturnValue(j /*PHI number matches operand number*/), + RI->getParent()); + } + } + } else { + for (unsigned i = 0, e = Returns.size(); i != e; ++i) { + ReturnInst *RI = Returns[i]; + assert(PHIs.size() == 1 && "Invalid number of PHI nodes"); + assert(RI->getReturnValue() && "Ret should have value!"); + assert(RI->getReturnValue()->getType() == PHIs[0]->getType() && + "Ret value not consistent in function!"); + PHIs[0]->addIncoming(RI->getReturnValue(), RI->getParent()); + } } + } - // Add a branch to the merge point where the PHI node lives if it exists. + // Add a branch to the merge points and remove retrun instructions. + for (unsigned i = 0, e = Returns.size(); i != e; ++i) { + ReturnInst *RI = Returns[i]; new BranchInst(AfterCallBB, RI); - - // Delete the return instruction now RI->getParent()->getInstList().erase(RI); } - - } else if (!Returns.empty()) { - // Otherwise, if there is exactly one return value, just replace anything - // using the return value of the call with the computed value. - if (!TheCall->use_empty()) - TheCall->replaceAllUsesWith(Returns[0]->getReturnValue()); - - // Splice the code from the return block into the block that it will return - // to, which contains the code that was after the call. - BasicBlock *ReturnBB = Returns[0]->getParent(); - AfterCallBB->getInstList().splice(AfterCallBB->begin(), - ReturnBB->getInstList()); - - // Update PHI nodes that use the ReturnBB to use the AfterCallBB. - ReturnBB->replaceAllUsesWith(AfterCallBB); - - // Delete the return instruction now and empty ReturnBB now. - Returns[0]->eraseFromParent(); - ReturnBB->eraseFromParent(); } else if (!TheCall->use_empty()) { // No returns, but something is using the return value of the call. Just // nuke the result. Added: llvm/trunk/test/Transforms/SRETPromotion/2008-03-07-Inline-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SRETPromotion/2008-03-07-Inline-2.ll?rev=48020&view=auto ============================================================================== --- llvm/trunk/test/Transforms/SRETPromotion/2008-03-07-Inline-2.ll (added) +++ llvm/trunk/test/Transforms/SRETPromotion/2008-03-07-Inline-2.ll Fri Mar 7 14:06:16 2008 @@ -0,0 +1,46 @@ +; RUN: llvm-as < %s | opt -inline -sretpromotion -disable-output + %struct.Demand = type { double, double } + %struct.branch = type { %struct.Demand, double, double, double, double, %struct.branch*, [12 x %struct.leaf*] } + %struct.leaf = type { %struct.Demand, double, double } + at P = external global double ; [#uses=1] + +define %struct.leaf* @build_leaf() nounwind { +entry: + unreachable +} + +define void @Compute_Branch(%struct.Demand* sret %agg.result, %struct.branch* %br, double %theta_R, double %theta_I, double %pi_R, double %pi_I) nounwind { +entry: + %a2 = alloca %struct.Demand ; <%struct.Demand*> [#uses=2] + br i1 false, label %bb46, label %bb + +bb: ; preds = %entry + ret void + +bb46: ; preds = %entry + br label %bb72 + +bb49: ; preds = %bb72 + call void @Compute_Leaf( %struct.Demand* sret %a2, %struct.leaf* null, double 0.000000e+00, double 0.000000e+00 ) nounwind + %tmp66 = getelementptr %struct.Demand* %a2, i32 0, i32 1 ; [#uses=0] + br label %bb72 + +bb72: ; preds = %bb49, %bb46 + br i1 false, label %bb49, label %bb77 + +bb77: ; preds = %bb72 + ret void +} + +define void @Compute_Leaf(%struct.Demand* sret %agg.result, %struct.leaf* %l, double %pi_R, double %pi_I) nounwind { +entry: + %tmp10 = load double* @P, align 8 ; [#uses=1] + %tmp11 = fcmp olt double %tmp10, 0.000000e+00 ; [#uses=1] + br i1 %tmp11, label %bb, label %bb13 + +bb: ; preds = %entry + br label %bb13 + +bb13: ; preds = %bb, %entry + ret void +} Added: llvm/trunk/test/Transforms/SRETPromotion/2008-03-07-Inline.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SRETPromotion/2008-03-07-Inline.ll?rev=48020&view=auto ============================================================================== --- llvm/trunk/test/Transforms/SRETPromotion/2008-03-07-Inline.ll (added) +++ llvm/trunk/test/Transforms/SRETPromotion/2008-03-07-Inline.ll Fri Mar 7 14:06:16 2008 @@ -0,0 +1,46 @@ +; RUN: llvm-as < %s | opt -inline -sretpromotion -disable-output + %struct.Demand = type { double, double } + %struct.branch = type { %struct.Demand, double, double, double, double, %struct.branch*, [12 x %struct.leaf*] } + %struct.leaf = type { %struct.Demand, double, double } + at P = external global double ; [#uses=1] + +define %struct.leaf* @build_leaf() nounwind { +entry: + unreachable +} + +define void @Compute_Branch(%struct.Demand* sret %agg.result, %struct.branch* %br, double %theta_R, double %theta_I, double %pi_R, double %pi_I) nounwind { +entry: + %a2 = alloca %struct.Demand ; <%struct.Demand*> [#uses=2] + br i1 false, label %bb46, label %bb + +bb: ; preds = %entry + ret void + +bb46: ; preds = %entry + br label %bb72 + +bb49: ; preds = %bb72 + call void @Compute_Leaf( %struct.Demand* sret %a2, %struct.leaf* null, double 0.000000e+00, double 0.000000e+00 ) nounwind + %tmp66 = getelementptr %struct.Demand* %a2, i32 0, i32 1 ; [#uses=0] + br label %bb72 + +bb72: ; preds = %bb49, %bb46 + br i1 false, label %bb49, label %bb77 + +bb77: ; preds = %bb72 + ret void +} + +define void @Compute_Leaf(%struct.Demand* sret %agg.result, %struct.leaf* %l, double %pi_R, double %pi_I) nounwind { +entry: + %tmp10 = load double* @P, align 8 ; [#uses=1] + %tmp11 = fcmp olt double %tmp10, 0.000000e+00 ; [#uses=1] + br i1 %tmp11, label %bb, label %bb13 + +bb: ; preds = %entry + ret void + +bb13: ; preds = %entry + ret void +} From alenhar2 at cs.uiuc.edu Fri Mar 7 14:07:24 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Fri, 07 Mar 2008 20:07:24 -0000 Subject: [llvm-commits] [llvm] r48021 - /llvm/trunk/tools/llvm-extract/llvm-extract.cpp Message-ID: <200803072007.m27K7OSS024525@zion.cs.uiuc.edu> Author: alenhar2 Date: Fri Mar 7 14:07:24 2008 New Revision: 48021 URL: http://llvm.org/viewvc/llvm-project?rev=48021&view=rev Log: make error message reflect default search function name Modified: llvm/trunk/tools/llvm-extract/llvm-extract.cpp Modified: llvm/trunk/tools/llvm-extract/llvm-extract.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-extract/llvm-extract.cpp?rev=48021&r1=48020&r2=48021&view=diff ============================================================================== --- llvm/trunk/tools/llvm-extract/llvm-extract.cpp (original) +++ llvm/trunk/tools/llvm-extract/llvm-extract.cpp Fri Mar 7 14:07:24 2008 @@ -81,9 +81,8 @@ M.get()->getNamedGlobal(ExtractGlobal) : 0; // Figure out which function we should extract - Function *F = ExtractFunc.size() ? - M.get()->getFunction(ExtractFunc) : - M.get()->getFunction("main"); + if (!ExtractFunc.size()) ExtractFunc = "main"; + Function *F = M.get()->getFunction(ExtractFunc); if (F == 0 && G == 0) { cerr << argv[0] << ": program doesn't contain function named '" From dpatel at apple.com Fri Mar 7 14:08:07 2008 From: dpatel at apple.com (Devang Patel) Date: Fri, 07 Mar 2008 20:08:07 -0000 Subject: [llvm-commits] [llvm] r48022 - /llvm/trunk/include/llvm/Instructions.h Message-ID: <200803072008.m27K87w5024555@zion.cs.uiuc.edu> Author: dpatel Date: Fri Mar 7 14:08:07 2008 New Revision: 48022 URL: http://llvm.org/viewvc/llvm-project?rev=48022&view=rev Log: RetVal is not used when there are more then one return operands. Modified: llvm/trunk/include/llvm/Instructions.h Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=48022&r1=48021&r2=48022&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Fri Mar 7 14:08:07 2008 @@ -1421,9 +1421,10 @@ virtual ReturnInst *clone() const; Value *getReturnValue(unsigned n = 0) const { - if (n == 0) + if (getNumOperands() > 1) + return getOperand(n); + else return RetVal; - return getOperand(n); } unsigned getNumSuccessors() const { return 0; } From alenhar2 at cs.uiuc.edu Fri Mar 7 14:10:54 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Fri, 07 Mar 2008 20:10:54 -0000 Subject: [llvm-commits] [llvm] r48023 - /llvm/trunk/tools/llvm-extract/llvm-extract.cpp Message-ID: <200803072010.m27KAtNC024656@zion.cs.uiuc.edu> Author: alenhar2 Date: Fri Mar 7 14:10:54 2008 New Revision: 48023 URL: http://llvm.org/viewvc/llvm-project?rev=48023&view=rev Log: only extract main if the user didn't specify anything to extract Modified: llvm/trunk/tools/llvm-extract/llvm-extract.cpp Modified: llvm/trunk/tools/llvm-extract/llvm-extract.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-extract/llvm-extract.cpp?rev=48023&r1=48022&r2=48023&view=diff ============================================================================== --- llvm/trunk/tools/llvm-extract/llvm-extract.cpp (original) +++ llvm/trunk/tools/llvm-extract/llvm-extract.cpp Fri Mar 7 14:10:54 2008 @@ -81,7 +81,7 @@ M.get()->getNamedGlobal(ExtractGlobal) : 0; // Figure out which function we should extract - if (!ExtractFunc.size()) ExtractFunc = "main"; + if (!ExtractFunc.size() && !ExtractGlobal.size()) ExtractFunc = "main"; Function *F = M.get()->getFunction(ExtractFunc); if (F == 0 && G == 0) { From evan.cheng at apple.com Fri Mar 7 14:12:54 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 07 Mar 2008 20:12:54 -0000 Subject: [llvm-commits] [llvm] r48024 - in /llvm/trunk: lib/CodeGen/RegisterScavenging.cpp test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll Message-ID: <200803072012.m27KCsA0024715@zion.cs.uiuc.edu> Author: evancheng Date: Fri Mar 7 14:12:54 2008 New Revision: 48024 URL: http://llvm.org/viewvc/llvm-project?rev=48024&view=rev Log: Fixed a register scavenger bug. If a def is re-defining part of a super register, there must be an implicit def of the super-register on the MI. Added: llvm/trunk/test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=48024&r1=48023&r2=48024&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original) +++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Fri Mar 7 14:12:54 2008 @@ -29,15 +29,20 @@ /// part of a super-register. static bool RedefinesSuperRegPart(const MachineInstr *MI, unsigned SubReg, const TargetRegisterInfo *TRI) { + bool SeenSuperUse = false; + bool SeenSuperDef = false; for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); - if (!MO.isRegister() || !MO.isUse()) + if (!MO.isRegister()) continue; if (TRI->isSuperRegister(SubReg, MO.getReg())) - return true; + if (MO.isUse()) + SeenSuperUse = true; + else if (MO.isImplicit()) + SeenSuperDef = true; } - return false; + return SeenSuperDef && SeenSuperUse; } static bool RedefinesSuperRegPart(const MachineInstr *MI, Added: llvm/trunk/test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll?rev=48024&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll (added) +++ llvm/trunk/test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll Fri Mar 7 14:12:54 2008 @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2 + + at accum = external global { double, double } ; <{ double, double }*> [#uses=1] + at .str = external constant [4 x i8] ; <[4 x i8]*> [#uses=1] + +define i32 @main() { +entry: + br label %bb74.i +bb74.i: ; preds = %bb88.i, %bb74.i, %entry + br i1 false, label %bb88.i, label %bb74.i +bb88.i: ; preds = %bb74.i + br i1 false, label %mandel.exit, label %bb74.i +mandel.exit: ; preds = %bb88.i + %tmp2 = volatile load double* getelementptr ({ double, double }* @accum, i32 0, i32 0), align 8 ; [#uses=1] + %tmp23 = fptosi double %tmp2 to i32 ; [#uses=1] + %tmp5 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i32 %tmp23 ) ; [#uses=0] + ret i32 0 +} + +declare i32 @printf(i8*, ...) From sabre at nondot.org Fri Mar 7 14:13:51 2008 From: sabre at nondot.org (Chris Lattner) Date: Fri, 07 Mar 2008 20:13:51 -0000 Subject: [llvm-commits] [llvm] r48026 - /llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Message-ID: <200803072013.m27KDp27024779@zion.cs.uiuc.edu> Author: lattner Date: Fri Mar 7 14:13:51 2008 New Revision: 48026 URL: http://llvm.org/viewvc/llvm-project?rev=48026&view=rev Log: Replace SDT_PPCShiftOp in favor of SDTIntBinOps. This allows it to work with 32 or 64-bit operands/results. Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=48026&r1=48025&r2=48026&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Fri Mar 7 14:13:51 2008 @@ -20,9 +20,6 @@ def SDT_PPCstfiwx : SDTypeProfile<0, 2, [ // stfiwx SDTCisVT<0, f64>, SDTCisPtrTy<1> ]>; -def SDT_PPCShiftOp : SDTypeProfile<1, 2, [ // PPCshl, PPCsra, PPCsrl - SDTCisVT<0, i32>, SDTCisVT<1, i32>, SDTCisVT<2, i32> -]>; def SDT_PPCCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i32> ]>; def SDT_PPCCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i32>, SDTCisVT<1, i32> ]>; @@ -84,9 +81,9 @@ // These nodes represent the 32-bit PPC shifts that operate on 6-bit shift // amounts. These nodes are generated by the multi-precision shift code. -def PPCsrl : SDNode<"PPCISD::SRL" , SDT_PPCShiftOp>; -def PPCsra : SDNode<"PPCISD::SRA" , SDT_PPCShiftOp>; -def PPCshl : SDNode<"PPCISD::SHL" , SDT_PPCShiftOp>; +def PPCsrl : SDNode<"PPCISD::SRL" , SDTIntBinOp>; +def PPCsra : SDNode<"PPCISD::SRA" , SDTIntBinOp>; +def PPCshl : SDNode<"PPCISD::SHL" , SDTIntBinOp>; def PPCextsw_32 : SDNode<"PPCISD::EXTSW_32" , SDTIntUnaryOp>; def PPCstd_32 : SDNode<"PPCISD::STD_32" , SDTStore, From sabre at nondot.org Fri Mar 7 14:18:25 2008 From: sabre at nondot.org (Chris Lattner) Date: Fri, 07 Mar 2008 20:18:25 -0000 Subject: [llvm-commits] [llvm] r48027 - in /llvm/trunk/lib/Target/PowerPC: PPCInstr64Bit.td PPCInstrInfo.td Message-ID: <200803072018.m27KIPug024975@zion.cs.uiuc.edu> Author: lattner Date: Fri Mar 7 14:18:24 2008 New Revision: 48027 URL: http://llvm.org/viewvc/llvm-project?rev=48027&view=rev Log: Add support for ppc64 shifts with 7-bit (oversized) shift amount (e.g. PPCshl). Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=48027&r1=48026&r2=48027&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Fri Mar 7 14:18:24 2008 @@ -289,13 +289,13 @@ def SLD : XForm_6<31, 27, (outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB), "sld $rA, $rS, $rB", IntRotateD, - [(set G8RC:$rA, (shl G8RC:$rS, GPRC:$rB))]>, isPPC64; + [(set G8RC:$rA, (PPCshl G8RC:$rS, GPRC:$rB))]>, isPPC64; def SRD : XForm_6<31, 539, (outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB), "srd $rA, $rS, $rB", IntRotateD, - [(set G8RC:$rA, (srl G8RC:$rS, GPRC:$rB))]>, isPPC64; + [(set G8RC:$rA, (PPCsrl G8RC:$rS, GPRC:$rB))]>, isPPC64; def SRAD : XForm_6<31, 794, (outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB), "srad $rA, $rS, $rB", IntRotateD, - [(set G8RC:$rA, (sra G8RC:$rS, GPRC:$rB))]>, isPPC64; + [(set G8RC:$rA, (PPCsra G8RC:$rS, GPRC:$rB))]>, isPPC64; def EXTSB8 : XForm_11<31, 954, (outs G8RC:$rA), (ins G8RC:$rS), "extsb $rA, $rS", IntGeneral, @@ -579,6 +579,16 @@ def : Pat<(extloadi32 xaddr:$src), (LWZX8 xaddr:$src)>; +// Standard shifts. These are represented separately from the real shifts above +// so that we can distinguish between shifts that allow 6-bit and 7-bit shift +// amounts. +def : Pat<(sra G8RC:$rS, GPRC:$rB), + (SRAD G8RC:$rS, GPRC:$rB)>; +def : Pat<(srl G8RC:$rS, GPRC:$rB), + (SRD G8RC:$rS, GPRC:$rB)>; +def : Pat<(shl G8RC:$rS, GPRC:$rB), + (SLD G8RC:$rS, GPRC:$rB)>; + // SHL/SRL def : Pat<(shl G8RC:$in, (i32 imm:$imm)), (RLDICR G8RC:$in, imm:$imm, (SHL64 imm:$imm))>; Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=48027&r1=48026&r2=48027&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Fri Mar 7 14:18:24 2008 @@ -81,9 +81,9 @@ // These nodes represent the 32-bit PPC shifts that operate on 6-bit shift // amounts. These nodes are generated by the multi-precision shift code. -def PPCsrl : SDNode<"PPCISD::SRL" , SDTIntBinOp>; -def PPCsra : SDNode<"PPCISD::SRA" , SDTIntBinOp>; -def PPCshl : SDNode<"PPCISD::SHL" , SDTIntBinOp>; +def PPCsrl : SDNode<"PPCISD::SRL" , SDTIntShiftOp>; +def PPCsra : SDNode<"PPCISD::SRA" , SDTIntShiftOp>; +def PPCshl : SDNode<"PPCISD::SHL" , SDTIntShiftOp>; def PPCextsw_32 : SDNode<"PPCISD::EXTSW_32" , SDTIntUnaryOp>; def PPCstd_32 : SDNode<"PPCISD::STD_32" , SDTStore, From dalej at apple.com Fri Mar 7 14:27:40 2008 From: dalej at apple.com (Dale Johannesen) Date: Fri, 07 Mar 2008 20:27:40 -0000 Subject: [llvm-commits] [llvm] r48028 - /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200803072027.m27KReXB025246@zion.cs.uiuc.edu> Author: johannes Date: Fri Mar 7 14:27:40 2008 New Revision: 48028 URL: http://llvm.org/viewvc/llvm-project?rev=48028&view=rev Log: Next bits of PPC byval handling. Basically functional but there are bugs. Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=48028&r1=48027&r2=48028&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Fri Mar 7 14:27:40 2008 @@ -1347,6 +1347,8 @@ // represented with two words (long long or double) must be copied to an // even GPR_idx value or to an even ArgOffset value. + SmallVector MemOps; + for (unsigned ArgNo = 0, e = Op.Val->getNumValues()-1; ArgNo != e; ++ArgNo) { SDOperand ArgVal; bool needsLoad = false; @@ -1355,12 +1357,50 @@ unsigned ArgSize = ObjSize; unsigned Flags = cast(Op.getOperand(ArgNo+3))->getValue(); unsigned AlignFlag = 1 << ISD::ParamFlags::OrigAlignmentOffs; + unsigned isByVal = Flags & ISD::ParamFlags::ByVal; // See if next argument requires stack alignment in ELF bool Expand = (ObjectVT == MVT::f64) || ((ArgNo + 1 < e) && (cast(Op.getOperand(ArgNo+4))->getValue() & AlignFlag) && (!(Flags & AlignFlag))); unsigned CurArgOffset = ArgOffset; + + // FIXME alignment for ELF may not be right + // FIXME the codegen can be much improved in some cases. + // We do not have to keep everything in memory. + if (isByVal) { + // Double word align in ELF + if (Expand && isELF32_ABI) GPR_idx += (GPR_idx % 2); + // ObjSize is the true size, ArgSize rounded up to multiple of registers. + ObjSize = (Flags & ISD::ParamFlags::ByValSize) >> + ISD::ParamFlags::ByValSizeOffs; + ArgSize = ((ObjSize + PtrByteSize - 1)/PtrByteSize) * PtrByteSize; + // The value of the object is its address. + int FI = MFI->CreateFixedObject(ObjSize, CurArgOffset); + SDOperand FIN = DAG.getFrameIndex(FI, PtrVT); + ArgValues.push_back(FIN); + for (unsigned j = 0; j < ArgSize; j += PtrByteSize) { + // Store whatever pieces of the object are in registers + // to memory. ArgVal will be address of the beginning of + // the object. + if (GPR_idx != Num_GPR_Regs) { + unsigned VReg = RegInfo.createVirtualRegister(&PPC::GPRCRegClass); + RegInfo.addLiveIn(GPR[GPR_idx], VReg); + int FI = MFI->CreateFixedObject(PtrByteSize, ArgOffset); + SDOperand FIN = DAG.getFrameIndex(FI, PtrVT); + SDOperand Val = DAG.getCopyFromReg(Root, VReg, PtrVT); + SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN, NULL, 0); + MemOps.push_back(Store); + ++GPR_idx; + if (isMachoABI) ArgOffset += PtrByteSize; + } else { + ArgOffset += ArgSize - (ArgOffset-CurArgOffset); + break; + } + } + continue; + } + switch (ObjectVT) { default: assert(0 && "Unhandled argument type!"); case MVT::i32: @@ -1453,7 +1493,7 @@ ArgValues.push_back(ArgVal); } - + // If the function takes variable number of arguments, make a frame index for // the start of the first vararg value... for expansion of llvm.va_start. bool isVarArg = cast(Op.getOperand(2))->getValue() != 0; @@ -1481,8 +1521,6 @@ depth); SDOperand FIN = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT); - SmallVector MemOps; - // In ELF 32 ABI, the fixed integer arguments of a variadic function are // stored to the VarArgsFrameIndex on the stack. if (isELF32_ABI) { @@ -1542,11 +1580,11 @@ FIN = DAG.getNode(ISD::ADD, PtrOff.getValueType(), FIN, PtrOff); } } - - if (!MemOps.empty()) - Root = DAG.getNode(ISD::TokenFactor, MVT::Other,&MemOps[0],MemOps.size()); } + if (!MemOps.empty()) + Root = DAG.getNode(ISD::TokenFactor, MVT::Other,&MemOps[0],MemOps.size()); + ArgValues.push_back(Root); // Return the new list of results. @@ -1705,10 +1743,37 @@ } // FIXME Elf untested, what are alignment rules? + // FIXME memcpy is used way more than necessary. Correctness first. if (Flags & ISD::ParamFlags::ByVal) { unsigned Size = (Flags & ISD::ParamFlags::ByValSize) >> ISD::ParamFlags::ByValSizeOffs; if (isELF32_ABI && Expand) GPR_idx += (GPR_idx % 2); + if (Size==1 || Size==2) { + // Very small objects are passed right-justified. + // Everything else is passed left-justified. + MVT::ValueType VT = (Size==1) ? MVT::i8 : MVT::i16; + if (GPR_idx != NumGPRs) { + SDOperand Load = DAG.getExtLoad(ISD::EXTLOAD, PtrVT, Chain, Arg, + NULL, 0, VT); + MemOpChains.push_back(Load.getValue(1)); + RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load)); + if (isMachoABI) + ArgOffset += PtrByteSize; + } else { + SDOperand Const = DAG.getConstant(4 - Size, PtrOff.getValueType()); + SDOperand AddPtr = DAG.getNode(ISD::ADD, PtrVT, PtrOff, Const); + SDOperand MemcpyCall = CreateCopyOfByValArgument(Arg, AddPtr, + CallSeqStart.Val->getOperand(0), + Flags, DAG, Size); + // This must go outside the CALLSEQ_START..END. + SDOperand NewCallSeqStart = DAG.getCALLSEQ_START(MemcpyCall, + CallSeqStart.Val->getOperand(1)); + DAG.ReplaceAllUsesWith(CallSeqStart.Val, NewCallSeqStart.Val); + Chain = CallSeqStart = NewCallSeqStart; + ArgOffset += PtrByteSize; + } + continue; + } for (unsigned j=0; jgetOperand(1)); DAG.ReplaceAllUsesWith(CallSeqStart.Val, NewCallSeqStart.Val); - CallSeqStart = NewCallSeqStart; + Chain = CallSeqStart = NewCallSeqStart; ArgOffset += ((Size - j + 3)/4)*4; + break; } } continue; From gohman at apple.com Fri Mar 7 14:36:54 2008 From: gohman at apple.com (Dan Gohman) Date: Fri, 07 Mar 2008 20:36:54 -0000 Subject: [llvm-commits] [llvm] r48029 - in /llvm/trunk: lib/Target/PowerPC/PPCISelLowering.cpp test/CodeGen/PowerPC/shift128.ll Message-ID: <200803072036.m27KasRw025499@zion.cs.uiuc.edu> Author: djg Date: Fri Mar 7 14:36:53 2008 New Revision: 48029 URL: http://llvm.org/viewvc/llvm-project?rev=48029&view=rev Log: Add support for lowering 128-bit shifts on ppc64. Added: llvm/trunk/test/CodeGen/PowerPC/shift128.ll Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=48029&r1=48028&r2=48029&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Fri Mar 7 14:36:53 2008 @@ -233,6 +233,10 @@ addRegisterClass(MVT::i64, PPC::G8RCRegisterClass); // BUILD_PAIR can't be handled natively, and should be expanded to shl/or setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand); + // 64-bit PowerPC wants to expand i128 shifts itself. + setOperationAction(ISD::SHL_PARTS, MVT::i64, Custom); + setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom); + setOperationAction(ISD::SRL_PARTS, MVT::i64, Custom); } else { // 32-bit PowerPC wants to expand i64 shifts itself. setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom); @@ -2416,77 +2420,89 @@ } SDOperand PPCTargetLowering::LowerSHL_PARTS(SDOperand Op, SelectionDAG &DAG) { - assert(Op.getNumOperands() == 3 && Op.getValueType() == MVT::i32 && - Op.getOperand(1).getValueType() == MVT::i32 && "Unexpected SHL!"); + MVT::ValueType VT = Op.getValueType(); + unsigned BitWidth = MVT::getSizeInBits(VT); + assert(Op.getNumOperands() == 3 && + VT == Op.getOperand(1).getValueType() && + "Unexpected SHL!"); // Expand into a bunch of logical ops. Note that these ops // depend on the PPC behavior for oversized shift amounts. SDOperand Lo = Op.getOperand(0); SDOperand Hi = Op.getOperand(1); SDOperand Amt = Op.getOperand(2); + MVT::ValueType AmtVT = Amt.getValueType(); - SDOperand Tmp1 = DAG.getNode(ISD::SUB, MVT::i32, - DAG.getConstant(32, MVT::i32), Amt); - SDOperand Tmp2 = DAG.getNode(PPCISD::SHL, MVT::i32, Hi, Amt); - SDOperand Tmp3 = DAG.getNode(PPCISD::SRL, MVT::i32, Lo, Tmp1); - SDOperand Tmp4 = DAG.getNode(ISD::OR , MVT::i32, Tmp2, Tmp3); - SDOperand Tmp5 = DAG.getNode(ISD::ADD, MVT::i32, Amt, - DAG.getConstant(-32U, MVT::i32)); - SDOperand Tmp6 = DAG.getNode(PPCISD::SHL, MVT::i32, Lo, Tmp5); - SDOperand OutHi = DAG.getNode(ISD::OR, MVT::i32, Tmp4, Tmp6); - SDOperand OutLo = DAG.getNode(PPCISD::SHL, MVT::i32, Lo, Amt); + SDOperand Tmp1 = DAG.getNode(ISD::SUB, AmtVT, + DAG.getConstant(BitWidth, AmtVT), Amt); + SDOperand Tmp2 = DAG.getNode(PPCISD::SHL, VT, Hi, Amt); + SDOperand Tmp3 = DAG.getNode(PPCISD::SRL, VT, Lo, Tmp1); + SDOperand Tmp4 = DAG.getNode(ISD::OR , VT, Tmp2, Tmp3); + SDOperand Tmp5 = DAG.getNode(ISD::ADD, AmtVT, Amt, + DAG.getConstant(-BitWidth, AmtVT)); + SDOperand Tmp6 = DAG.getNode(PPCISD::SHL, VT, Lo, Tmp5); + SDOperand OutHi = DAG.getNode(ISD::OR, VT, Tmp4, Tmp6); + SDOperand OutLo = DAG.getNode(PPCISD::SHL, VT, Lo, Amt); SDOperand OutOps[] = { OutLo, OutHi }; - return DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(MVT::i32, MVT::i32), + return DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(VT, VT), OutOps, 2); } SDOperand PPCTargetLowering::LowerSRL_PARTS(SDOperand Op, SelectionDAG &DAG) { - assert(Op.getNumOperands() == 3 && Op.getValueType() == MVT::i32 && - Op.getOperand(1).getValueType() == MVT::i32 && "Unexpected SRL!"); + MVT::ValueType VT = Op.getValueType(); + unsigned BitWidth = MVT::getSizeInBits(VT); + assert(Op.getNumOperands() == 3 && + VT == Op.getOperand(1).getValueType() && + "Unexpected SRL!"); - // Otherwise, expand into a bunch of logical ops. Note that these ops + // Expand into a bunch of logical ops. Note that these ops // depend on the PPC behavior for oversized shift amounts. SDOperand Lo = Op.getOperand(0); SDOperand Hi = Op.getOperand(1); SDOperand Amt = Op.getOperand(2); + MVT::ValueType AmtVT = Amt.getValueType(); - SDOperand Tmp1 = DAG.getNode(ISD::SUB, MVT::i32, - DAG.getConstant(32, MVT::i32), Amt); - SDOperand Tmp2 = DAG.getNode(PPCISD::SRL, MVT::i32, Lo, Amt); - SDOperand Tmp3 = DAG.getNode(PPCISD::SHL, MVT::i32, Hi, Tmp1); - SDOperand Tmp4 = DAG.getNode(ISD::OR , MVT::i32, Tmp2, Tmp3); - SDOperand Tmp5 = DAG.getNode(ISD::ADD, MVT::i32, Amt, - DAG.getConstant(-32U, MVT::i32)); - SDOperand Tmp6 = DAG.getNode(PPCISD::SRL, MVT::i32, Hi, Tmp5); - SDOperand OutLo = DAG.getNode(ISD::OR, MVT::i32, Tmp4, Tmp6); - SDOperand OutHi = DAG.getNode(PPCISD::SRL, MVT::i32, Hi, Amt); + SDOperand Tmp1 = DAG.getNode(ISD::SUB, AmtVT, + DAG.getConstant(BitWidth, AmtVT), Amt); + SDOperand Tmp2 = DAG.getNode(PPCISD::SRL, VT, Lo, Amt); + SDOperand Tmp3 = DAG.getNode(PPCISD::SHL, VT, Hi, Tmp1); + SDOperand Tmp4 = DAG.getNode(ISD::OR , VT, Tmp2, Tmp3); + SDOperand Tmp5 = DAG.getNode(ISD::ADD, AmtVT, Amt, + DAG.getConstant(-BitWidth, AmtVT)); + SDOperand Tmp6 = DAG.getNode(PPCISD::SRL, VT, Hi, Tmp5); + SDOperand OutLo = DAG.getNode(ISD::OR, VT, Tmp4, Tmp6); + SDOperand OutHi = DAG.getNode(PPCISD::SRL, VT, Hi, Amt); SDOperand OutOps[] = { OutLo, OutHi }; - return DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(MVT::i32, MVT::i32), + return DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(VT, VT), OutOps, 2); } SDOperand PPCTargetLowering::LowerSRA_PARTS(SDOperand Op, SelectionDAG &DAG) { - assert(Op.getNumOperands() == 3 && Op.getValueType() == MVT::i32 && - Op.getOperand(1).getValueType() == MVT::i32 && "Unexpected SRA!"); + MVT::ValueType VT = Op.getValueType(); + unsigned BitWidth = MVT::getSizeInBits(VT); + assert(Op.getNumOperands() == 3 && + VT == Op.getOperand(1).getValueType() && + "Unexpected SRA!"); - // Otherwise, expand into a bunch of logical ops, followed by a select_cc. + // Expand into a bunch of logical ops, followed by a select_cc. SDOperand Lo = Op.getOperand(0); SDOperand Hi = Op.getOperand(1); SDOperand Amt = Op.getOperand(2); + MVT::ValueType AmtVT = Amt.getValueType(); - SDOperand Tmp1 = DAG.getNode(ISD::SUB, MVT::i32, - DAG.getConstant(32, MVT::i32), Amt); - SDOperand Tmp2 = DAG.getNode(PPCISD::SRL, MVT::i32, Lo, Amt); - SDOperand Tmp3 = DAG.getNode(PPCISD::SHL, MVT::i32, Hi, Tmp1); - SDOperand Tmp4 = DAG.getNode(ISD::OR , MVT::i32, Tmp2, Tmp3); - SDOperand Tmp5 = DAG.getNode(ISD::ADD, MVT::i32, Amt, - DAG.getConstant(-32U, MVT::i32)); - SDOperand Tmp6 = DAG.getNode(PPCISD::SRA, MVT::i32, Hi, Tmp5); - SDOperand OutHi = DAG.getNode(PPCISD::SRA, MVT::i32, Hi, Amt); - SDOperand OutLo = DAG.getSelectCC(Tmp5, DAG.getConstant(0, MVT::i32), + SDOperand Tmp1 = DAG.getNode(ISD::SUB, AmtVT, + DAG.getConstant(BitWidth, AmtVT), Amt); + SDOperand Tmp2 = DAG.getNode(PPCISD::SRL, VT, Lo, Amt); + SDOperand Tmp3 = DAG.getNode(PPCISD::SHL, VT, Hi, Tmp1); + SDOperand Tmp4 = DAG.getNode(ISD::OR , VT, Tmp2, Tmp3); + SDOperand Tmp5 = DAG.getNode(ISD::ADD, AmtVT, Amt, + DAG.getConstant(-BitWidth, AmtVT)); + SDOperand Tmp6 = DAG.getNode(PPCISD::SRA, VT, Hi, Tmp5); + SDOperand OutHi = DAG.getNode(PPCISD::SRA, VT, Hi, Amt); + SDOperand OutLo = DAG.getSelectCC(Tmp5, DAG.getConstant(0, AmtVT), Tmp4, Tmp6, ISD::SETLE); SDOperand OutOps[] = { OutLo, OutHi }; - return DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(MVT::i32, MVT::i32), + return DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(VT, VT), OutOps, 2); } Added: llvm/trunk/test/CodeGen/PowerPC/shift128.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/shift128.ll?rev=48029&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/shift128.ll (added) +++ llvm/trunk/test/CodeGen/PowerPC/shift128.ll Fri Mar 7 14:36:53 2008 @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -march=ppc64 | grep sld | count 5 + +define i128 @foo_lshr(i128 %x, i128 %y) { + %r = lshr i128 %x, %y + ret i128 %r +} +define i128 @foo_ashr(i128 %x, i128 %y) { + %r = ashr i128 %x, %y + ret i128 %r +} +define i128 @foo_shl(i128 %x, i128 %y) { + %r = shl i128 %x, %y + ret i128 %r +} From isanbard at gmail.com Fri Mar 7 14:49:03 2008 From: isanbard at gmail.com (Bill Wendling) Date: Fri, 07 Mar 2008 20:49:03 -0000 Subject: [llvm-commits] [llvm] r48030 - /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200803072049.m27Kn3Bf025859@zion.cs.uiuc.edu> Author: void Date: Fri Mar 7 14:49:02 2008 New Revision: 48030 URL: http://llvm.org/viewvc/llvm-project?rev=48030&view=rev Log: PPC64 passes arguments of integral type in i64 registers, not i32. Reflect this by promoting smaller integral values (i32 at this point) to i64, then truncating to get the wanted size. Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=48030&r1=48029&r2=48030&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Fri Mar 7 14:49:02 2008 @@ -1296,13 +1296,14 @@ return FPR; } -SDOperand PPCTargetLowering::LowerFORMAL_ARGUMENTS(SDOperand Op, - SelectionDAG &DAG, - int &VarArgsFrameIndex, - int &VarArgsStackOffset, - unsigned &VarArgsNumGPR, - unsigned &VarArgsNumFPR, - const PPCSubtarget &Subtarget) { +SDOperand +PPCTargetLowering::LowerFORMAL_ARGUMENTS(SDOperand Op, + SelectionDAG &DAG, + int &VarArgsFrameIndex, + int &VarArgsStackOffset, + unsigned &VarArgsNumGPR, + unsigned &VarArgsNumFPR, + const PPCSubtarget &Subtarget) { // TODO: add description of PPC stack frame format, or at least some docs. // MachineFunction &MF = DAG.getMachineFunction(); @@ -1408,29 +1409,46 @@ switch (ObjectVT) { default: assert(0 && "Unhandled argument type!"); case MVT::i32: - // Double word align in ELF - if (Expand && isELF32_ABI) GPR_idx += (GPR_idx % 2); - if (GPR_idx != Num_GPR_Regs) { - unsigned VReg = RegInfo.createVirtualRegister(&PPC::GPRCRegClass); - RegInfo.addLiveIn(GPR[GPR_idx], VReg); - ArgVal = DAG.getCopyFromReg(Root, VReg, MVT::i32); - ++GPR_idx; - } else { - needsLoad = true; - ArgSize = PtrByteSize; + if (!isPPC64) { + // Double word align in ELF + if (Expand && isELF32_ABI) GPR_idx += (GPR_idx % 2); + + if (GPR_idx != Num_GPR_Regs) { + unsigned VReg = RegInfo.createVirtualRegister(&PPC::GPRCRegClass); + RegInfo.addLiveIn(GPR[GPR_idx], VReg); + ArgVal = DAG.getCopyFromReg(Root, VReg, MVT::i32); + ++GPR_idx; + } else { + needsLoad = true; + ArgSize = PtrByteSize; + } + // Stack align in ELF + if (needsLoad && Expand && isELF32_ABI) + ArgOffset += ((ArgOffset/4) % 2) * PtrByteSize; + // All int arguments reserve stack space in Macho ABI. + if (isMachoABI || needsLoad) ArgOffset += PtrByteSize; + break; } - // Stack align in ELF - if (needsLoad && Expand && isELF32_ABI) - ArgOffset += ((ArgOffset/4) % 2) * PtrByteSize; - // All int arguments reserve stack space in Macho ABI. - if (isMachoABI || needsLoad) ArgOffset += PtrByteSize; - break; - + // FALLTHROUGH case MVT::i64: // PPC64 if (GPR_idx != Num_GPR_Regs) { unsigned VReg = RegInfo.createVirtualRegister(&PPC::G8RCRegClass); RegInfo.addLiveIn(GPR[GPR_idx], VReg); ArgVal = DAG.getCopyFromReg(Root, VReg, MVT::i64); + + if (ObjectVT == MVT::i32) { + // PPC64 passes i8, i16, and i32 values in i64 registers. Promote + // value to MVT::i64 and then truncate to the correct register size. + if (Flags & ISD::ParamFlags::SExt) + ArgVal = DAG.getNode(ISD::AssertSext, MVT::i64, ArgVal, + DAG.getValueType(ObjectVT)); + else if (Flags & ISD::ParamFlags::ZExt) + ArgVal = DAG.getNode(ISD::AssertZext, MVT::i64, ArgVal, + DAG.getValueType(ObjectVT)); + + ArgVal = DAG.getNode(ISD::TRUNCATE, MVT::i32, ArgVal); + } + ++GPR_idx; } else { needsLoad = true; @@ -1620,7 +1638,7 @@ /// does not fit in registers. static SDOperand CreateCopyOfByValArgument(SDOperand Src, SDOperand Dst, SDOperand Chain, - unsigned Flags, SelectionDAG &DAG, unsigned Size) { + unsigned Flags, SelectionDAG &DAG, unsigned Size) { unsigned Align = 1 << ((Flags & ISD::ParamFlags::ByValAlign) >> ISD::ParamFlags::ByValAlignOffs); SDOperand AlignNode = DAG.getConstant(Align, MVT::i32); @@ -1742,7 +1760,6 @@ // On PPC64, promote integers to 64-bit values. if (isPPC64 && Arg.getValueType() == MVT::i32) { unsigned ExtOp = (Flags & 1) ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; - Arg = DAG.getNode(ExtOp, MVT::i64, Arg); } From dpatel at apple.com Fri Mar 7 15:07:35 2008 From: dpatel at apple.com (Devang Patel) Date: Fri, 07 Mar 2008 21:07:35 -0000 Subject: [llvm-commits] [llvm] r48032 - /llvm/trunk/include/llvm/LinkAllPasses.h Message-ID: <200803072107.m27L7Z2Y026528@zion.cs.uiuc.edu> Author: dpatel Date: Fri Mar 7 15:07:34 2008 New Revision: 48032 URL: http://llvm.org/viewvc/llvm-project?rev=48032&view=rev Log: Add new sretpromotion pass. Modified: llvm/trunk/include/llvm/LinkAllPasses.h Modified: llvm/trunk/include/llvm/LinkAllPasses.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LinkAllPasses.h?rev=48032&r1=48031&r2=48032&view=diff ============================================================================== --- llvm/trunk/include/llvm/LinkAllPasses.h (original) +++ llvm/trunk/include/llvm/LinkAllPasses.h Fri Mar 7 15:07:34 2008 @@ -46,6 +46,7 @@ (void) llvm::createAliasDebugger(); (void) llvm::createAndersensPass(); (void) llvm::createArgumentPromotionPass(); + (void) llvm::createStructRetPromotionPass(); (void) llvm::createBasicAliasAnalysisPass(); (void) llvm::createBasicVNPass(); (void) llvm::createBlockPlacementPass(); From alenhar2 at cs.uiuc.edu Fri Mar 7 15:19:43 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Fri, 07 Mar 2008 21:19:43 -0000 Subject: [llvm-commits] [llvm] r48033 - in /llvm/trunk/test/Linker: 2008-03-07-DroppedSection_a.ll 2008-03-07-DroppedSection_b.ll Message-ID: <200803072119.m27LJhHE026848@zion.cs.uiuc.edu> Author: alenhar2 Date: Fri Mar 7 15:19:43 2008 New Revision: 48033 URL: http://llvm.org/viewvc/llvm-project?rev=48033&view=rev Log: add dropped section test case for PR2123 Added: llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll llvm/trunk/test/Linker/2008-03-07-DroppedSection_b.ll Added: llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll?rev=48033&view=auto ============================================================================== --- llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll (added) +++ llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll Fri Mar 7 15:19:43 2008 @@ -0,0 +1,333 @@ +; RUN: llvm-as < %s > %t.bc +; RUN: llvm-as < %p/2008-03-07-DroppedSection_b.ll > %t2.bc +; RUN: llvm-ld -r -disable-opt %t.bc %t2.bc -o %t3.bc +; RUN: llvm-dis < %t3.bc | grep ".data.init_task" + +; ModuleID = 't.bc' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" +target triple = "i686-pc-linux-gnu" + %struct.ViceFid = type { i32, i32, i32 } + %struct.__kernel_fsid_t = type { [2 x i32] } + %struct.address_space = type { %struct.list_head, %struct.list_head, %struct.list_head, i32, %struct.address_space_operations*, %struct.inode*, %struct.vm_area_struct*, %struct.vm_area_struct*, %struct.reiserfs_proc_info_data_t, i32 } + %struct.address_space_operations = type { i32 (%struct.page*)*, i32 (%struct.file*, %struct.page*)*, i32 (%struct.page*)*, i32 (%struct.file*, %struct.page*, i32, i32)*, i32 (%struct.file*, %struct.page*, i32, i32)*, i32 (%struct.address_space*, i32)*, i32 (%struct.page*, i32)*, i32 (%struct.page*, i32)*, i32 (i32, %struct.inode*, %struct.kiobuf*, i32, i32)*, i32 (i32, %struct.file*, %struct.kiobuf*, i32, i32)*, void (%struct.page*)* } + %struct.affs_bm_info = type { i32, i32 } + %struct.atomic_t = type { i32 } + %struct.block_device = type { %struct.list_head, %struct.atomic_t, %struct.inode*, i16, i32, %struct.block_device_operations*, %struct.semaphore, %struct.list_head } + %struct.block_device_operations = type { i32 (%struct.inode*, %struct.file*)*, i32 (%struct.inode*, %struct.file*)*, i32 (%struct.inode*, %struct.file*, i32, i32)*, i32 (i16)*, i32 (i16)*, %struct.module* } + %struct.buffer_head = type { %struct.buffer_head*, i32, i16, i16, i16, %struct.atomic_t, i16, i32, i32, %struct.buffer_head*, %struct.buffer_head*, %struct.buffer_head*, %struct.buffer_head*, %struct.buffer_head**, i8*, %struct.page*, void (%struct.buffer_head*, i32)*, i8*, i32, %struct.wait_queue_head_t, %struct.list_head } + %struct.char_device = type { %struct.list_head, %struct.atomic_t, i16, %struct.atomic_t, %struct.semaphore } + %struct.completion = type { i32, %struct.wait_queue_head_t } + %struct.dentry = type { %struct.atomic_t, i32, %struct.inode*, %struct.dentry*, %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, i32, %struct.qstr, i32, %struct.dentry_operations*, %struct.super_block*, i32, i8*, [16 x i8] } + %struct.dentry_operations = type { i32 (%struct.dentry*, i32)*, i32 (%struct.dentry*, %struct.qstr*)*, i32 (%struct.dentry*, %struct.qstr*, %struct.qstr*)*, i32 (%struct.dentry*)*, void (%struct.dentry*)*, void (%struct.dentry*, %struct.inode*)* } + %struct.dnotify_struct = type { %struct.dnotify_struct*, i32, i32, %struct.file*, %struct.files_struct* } + %struct.dquot = type { %struct.list_head, %struct.list_head, %struct.list_head, %struct.wait_queue_head_t, %struct.wait_queue_head_t, i32, i32, %struct.super_block*, i32, i16, i64, i16, i16, i32, %struct.mem_dqblk } + %struct.dquot_operations = type { void (%struct.inode*, i32)*, void (%struct.inode*)*, i32 (%struct.inode*, i64, i32)*, i32 (%struct.inode*, i32)*, void (%struct.inode*, i64)*, void (%struct.inode*, i32)*, i32 (%struct.inode*, %struct.iattr*)*, i32 (%struct.dquot*)* } + %struct.e820entry = type { i64, i64, i32 } + %struct.exec_domain = type { i8*, void (i32, %struct.pt_regs*)*, i8, i8, i32*, i32*, %struct.map_segment*, %struct.map_segment*, %struct.map_segment*, %struct.map_segment*, %struct.module*, %struct.exec_domain* } + %struct.fasync_struct = type { i32, i32, %struct.fasync_struct*, %struct.file* } + %struct.fd_set = type { [32 x i32] } + %struct.file = type { %struct.list_head, %struct.dentry*, %struct.vfsmount*, %struct.file_operations*, %struct.atomic_t, i32, i16, i64, i32, i32, i32, i32, i32, %struct.fown_struct, i32, i32, i32, i32, i8*, %struct.kiobuf*, i32 } + %struct.file_lock = type { %struct.file_lock*, %struct.list_head, %struct.list_head, %struct.files_struct*, i32, %struct.wait_queue_head_t, %struct.file*, i8, i8, i64, i64, void (%struct.file_lock*)*, void (%struct.file_lock*)*, void (%struct.file_lock*)*, %struct.fasync_struct*, i32, { %struct.nfs_lock_info } } + %struct.file_operations = type { %struct.module*, i64 (%struct.file*, i64, i32)*, i32 (%struct.file*, i8*, i32, i64*)*, i32 (%struct.file*, i8*, i32, i64*)*, i32 (%struct.file*, i8*, i32 (i8*, i8*, i32, i64, i32, i32)*)*, i32 (%struct.file*, %struct.poll_table_struct*)*, i32 (%struct.inode*, %struct.file*, i32, i32)*, i32 (%struct.file*, %struct.vm_area_struct*)*, i32 (%struct.inode*, %struct.file*)*, i32 (%struct.file*)*, i32 (%struct.inode*, %struct.file*)*, i32 (%struct.file*, %struct.dentry*, i32)*, i32 (i32, %struct.file*, i32)*, i32 (%struct.file*, i32, %struct.file_lock*)*, i32 (%struct.file*, %struct.iovec*, i32, i64*)*, i32 (%struct.file*, %struct.iovec*, i32, i64*)*, i32 (%struct.file*, %struct.page*, i32, i32, i64*, i32)*, i32 (%struct.file*, i32, i32, i32, i32)* } + %struct.file_system_type = type { i8*, i32, %struct.super_block* (%struct.super_block*, i8*, i32)*, %struct.module*, %struct.file_system_type*, %struct.list_head } + %struct.files_struct = type { %struct.atomic_t, %struct.reiserfs_proc_info_data_t, i32, i32, i32, %struct.file**, %struct.fd_set*, %struct.fd_set*, %struct.fd_set, %struct.fd_set, [32 x %struct.file*] } + %struct.fown_struct = type { i32, i32, i32, i32 } + %struct.fs_disk_quota = type { i8, i8, i16, i32, i64, i64, i64, i64, i64, i64, i32, i32, i16, i16, i32, i64, i64, i64, i32, i16, i16, [8 x i8] } + %struct.fs_quota_stat = type { i8, i16, i8, %struct.e820entry, %struct.e820entry, i32, i32, i32, i32, i16, i16 } + %struct.fs_struct = type { %struct.atomic_t, %struct.reiserfs_proc_info_data_t, i32, %struct.dentry*, %struct.dentry*, %struct.dentry*, %struct.vfsmount*, %struct.vfsmount*, %struct.vfsmount* } + %struct.i387_fsave_struct = type { i32, i32, i32, i32, i32, i32, i32, [20 x i32], i32 } + %struct.i387_fxsave_struct = type { i16, i16, i16, i16, i32, i32, i32, i32, i32, i32, [32 x i32], [32 x i32], [56 x i32] } + %struct.i387_union = type { %struct.i387_fxsave_struct } + %struct.iattr = type { i32, i16, i32, i32, i64, i32, i32, i32, i32 } + %struct.if_dqblk = type { i64, i64, i64, i64, i64, i64, i64, i64, i32 } + %struct.if_dqinfo = type { i64, i64, i32, i32 } + %struct.inode = type { %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, i32, %struct.atomic_t, i16, i16, i16, i32, i32, i16, i64, i32, i32, i32, i32, i32, i32, i32, i16, %struct.semaphore, %struct.rw_semaphore, %struct.semaphore, %struct.inode_operations*, %struct.file_operations*, %struct.super_block*, %struct.wait_queue_head_t, %struct.file_lock*, %struct.address_space*, %struct.address_space, [2 x %struct.dquot*], %struct.list_head, %struct.pipe_inode_info*, %struct.block_device*, %struct.char_device*, i32, %struct.dnotify_struct*, i32, i32, i8, %struct.atomic_t, i32, i32, { %struct.nfs_inode_info } } + %struct.inode_operations = type { i32 (%struct.inode*, %struct.dentry*, i32)*, %struct.dentry* (%struct.inode*, %struct.dentry*)*, i32 (%struct.dentry*, %struct.inode*, %struct.dentry*)*, i32 (%struct.inode*, %struct.dentry*)*, i32 (%struct.inode*, %struct.dentry*, i8*)*, i32 (%struct.inode*, %struct.dentry*, i32)*, i32 (%struct.inode*, %struct.dentry*)*, i32 (%struct.inode*, %struct.dentry*, i32, i32)*, i32 (%struct.inode*, %struct.dentry*, %struct.inode*, %struct.dentry*)*, i32 (%struct.dentry*, i8*, i32)*, i32 (%struct.dentry*, %struct.nameidata*)*, void (%struct.inode*)*, i32 (%struct.inode*, i32)*, i32 (%struct.dentry*)*, i32 (%struct.dentry*, %struct.iattr*)*, i32 (%struct.dentry*, %struct.iattr*)*, i32 (%struct.dentry*, i8*, i8*, i32, i32)*, i32 (%struct.dentry*, i8*, i8*, i32)*, i32 (%struct.dentry*, i8*, i32)*, i32 (%struct.dentry*, i8*)* } + %struct.iovec = type { i8*, i32 } + %struct.k_sigaction = type { %struct.sigaction } + %struct.kern_ipc_perm = type { i32, i32, i32, i32, i32, i16, i32 } + %struct.kiobuf = type opaque + %struct.linux_binfmt = type { %struct.linux_binfmt*, %struct.module*, i32 (%struct.linux_binprm*, %struct.pt_regs*)*, i32 (%struct.file*)*, i32 (i32, %struct.pt_regs*, %struct.file*)*, i32, i32 (%struct.linux_binprm*, i8*)* } + %struct.linux_binprm = type { [128 x i8], [32 x %struct.page*], i32, i32, %struct.file*, i32, i32, i32, i32, i32, i32, i32, i8*, i32, i32 } + %struct.list_head = type { %struct.list_head*, %struct.list_head* } + %struct.llva_fp_state_t = type { [7 x i32], [20 x i32] } + %struct.llva_icontext_t = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, i32 } + %struct.llva_sigcontext = type { %struct.llva_icontext_t, %struct.llva_fp_state_t, i32, i32, i32, i32, [1 x i32], i8* } + %struct.map_segment = type opaque + %struct.mem_dqblk = type { i32, i32, i64, i32, i32, i32, i32, i32 } + %struct.mem_dqinfo = type { %struct.quota_format_type*, i32, i32, i32, { %struct.ViceFid } } + %struct.mm_struct = type <{ %struct.vm_area_struct*, %struct.rb_root_t, %struct.vm_area_struct*, %struct.atomic_t*, %struct.atomic_t, %struct.atomic_t, i32, %struct.rw_semaphore, %struct.reiserfs_proc_info_data_t, %struct.list_head, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], %struct.iovec }> + %struct.module = type { i32, %struct.module*, i8*, i32, { %struct.atomic_t }, i32, i32, i32, %struct.module_symbol*, %struct.module_ref*, %struct.module_ref*, i32 ()*, void ()*, %struct.affs_bm_info*, %struct.affs_bm_info*, %struct.module_persist*, %struct.module_persist*, i32 ()*, i32, i8*, i8*, i8*, i8*, i8* } + %struct.module_persist = type opaque + %struct.module_ref = type { %struct.module*, %struct.module*, %struct.module_ref* } + %struct.module_symbol = type { i32, i8* } + %struct.nameidata = type { %struct.dentry*, %struct.vfsmount*, %struct.qstr, i32, i32 } + %struct.namespace = type opaque + %struct.ncp_mount_data_kernel = type { i32, i32, i32, i32, i32, i32, i32, [17 x i8], i32, i32, i16, i16 } + %struct.ncp_server = type { %struct.ncp_mount_data_kernel, [258 x i8], %struct.file*, i8, i8, i16, i8, i8, i32, i32, i32, i8*, i32, %struct.semaphore, i32, i32, i32, i32, i32, i32, [8 x i8], [16 x i8], { i32, i32, i8*, i32 }, %struct.module_symbol, %struct.nls_table*, %struct.nls_table*, i32, i32 } + %struct.nfs_fh = type { i16, [64 x i8] } + %struct.nfs_inode_info = type { i64, %struct.nfs_fh, i16, i32, i64, i64, i64, i32, i32, i32, [2 x i32], %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, i32, i32, i32, i32, %struct.rpc_cred* } + %struct.nfs_lock_info = type { i32, i32, %struct.nlm_host* } + %struct.nlm_host = type opaque + %struct.nls_table = type opaque + %struct.page = type { %struct.list_head, %struct.address_space*, i32, %struct.page*, %struct.atomic_t, i32, %struct.list_head, %struct.page**, %struct.buffer_head* } + %struct.pipe_inode_info = type { %struct.wait_queue_head_t, i8*, i32, i32, i32, i32, i32, i32, i32, i32 } + %struct.poll_table_struct = type opaque + %struct.proc_dir_entry = type { i16, i16, i8*, i16, i16, i32, i32, i32, %struct.inode_operations*, %struct.file_operations*, i32 (i8*, i8**, i32, i32)*, %struct.module*, %struct.proc_dir_entry*, %struct.proc_dir_entry*, %struct.proc_dir_entry*, i8*, i32 (i8*, i8**, i32, i32, i32*, i8*)*, i32 (%struct.file*, i8*, i32, i8*)*, %struct.atomic_t, i32, i16 } + %struct.pt_regs = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } + %struct.qstr = type { i8*, i32, i32 } + %struct.quota_format_ops = type { i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.dquot*)*, i32 (%struct.dquot*)* } + %struct.quota_format_type = type { i32, %struct.quota_format_ops*, %struct.module*, %struct.quota_format_type* } + %struct.quota_info = type { i32, %struct.semaphore, %struct.semaphore, [2 x %struct.file*], [2 x %struct.mem_dqinfo], [2 x %struct.quota_format_ops*] } + %struct.quotactl_ops = type { i32 (%struct.super_block*, i32, i32, i8*)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32, %struct.if_dqinfo*)*, i32 (%struct.super_block*, i32, %struct.if_dqinfo*)*, i32 (%struct.super_block*, i32, i32, %struct.if_dqblk*)*, i32 (%struct.super_block*, i32, i32, %struct.if_dqblk*)*, i32 (%struct.super_block*, %struct.fs_quota_stat*)*, i32 (%struct.super_block*, i32, i32)*, i32 (%struct.super_block*, i32, i32, %struct.fs_disk_quota*)*, i32 (%struct.super_block*, i32, i32, %struct.fs_disk_quota*)* } + %struct.rb_node_s = type { %struct.rb_node_s*, i32, %struct.rb_node_s*, %struct.rb_node_s* } + %struct.rb_root_t = type { %struct.rb_node_s* } + %struct.reiserfs_proc_info_data_t = type { } + %struct.revectored_struct = type { [8 x i32] } + %struct.rpc_cred = type opaque + %struct.rw_semaphore = type { i32, %struct.reiserfs_proc_info_data_t, %struct.list_head } + %struct.sem_array = type { %struct.kern_ipc_perm, i32, i32, %struct.affs_bm_info*, %struct.sem_queue*, %struct.sem_queue**, %struct.sem_undo*, i32 } + %struct.sem_queue = type { %struct.sem_queue*, %struct.sem_queue**, %struct.task_struct*, %struct.sem_undo*, i32, i32, %struct.sem_array*, i32, %struct.sembuf*, i32, i32 } + %struct.sem_undo = type { %struct.sem_undo*, %struct.sem_undo*, i32, i16* } + %struct.semaphore = type { %struct.atomic_t, i32, %struct.wait_queue_head_t } + %struct.sembuf = type { i16, i16, i16 } + %struct.seq_file = type { i8*, i32, i32, i32, i64, %struct.semaphore, %struct.seq_operations*, i8* } + %struct.seq_operations = type { i8* (%struct.seq_file*, i64*)*, void (%struct.seq_file*, i8*)*, i8* (%struct.seq_file*, i8*, i64*)*, i32 (%struct.seq_file*, i8*)* } + %struct.sigaction = type { void (i32)*, i32, void ()*, %struct.__kernel_fsid_t } + %struct.siginfo_t = type { i32, i32, i32, { [29 x i32] } } + %struct.signal_struct = type { %struct.atomic_t, [64 x %struct.k_sigaction], %struct.reiserfs_proc_info_data_t } + %struct.sigpending = type { %struct.sigqueue*, %struct.sigqueue**, %struct.__kernel_fsid_t } + %struct.sigqueue = type { %struct.sigqueue*, %struct.siginfo_t } + %struct.statfs = type { i32, i32, i32, i32, i32, i32, i32, %struct.__kernel_fsid_t, i32, [6 x i32] } + %struct.super_block = type { %struct.list_head, i16, i32, i8, i8, i64, %struct.file_system_type*, %struct.super_operations*, %struct.dquot_operations*, %struct.quotactl_ops*, i32, i32, %struct.dentry*, %struct.rw_semaphore, %struct.semaphore, i32, %struct.atomic_t, %struct.list_head, %struct.list_head, %struct.list_head, %struct.block_device*, %struct.list_head, %struct.quota_info, { %struct.ncp_server }, %struct.semaphore, %struct.semaphore } + %struct.super_operations = type { %struct.inode* (%struct.super_block*)*, void (%struct.inode*)*, void (%struct.inode*)*, void (%struct.inode*, i8*)*, void (%struct.inode*)*, void (%struct.inode*, i32)*, void (%struct.inode*)*, void (%struct.inode*)*, void (%struct.super_block*)*, void (%struct.super_block*)*, i32 (%struct.super_block*)*, void (%struct.super_block*)*, void (%struct.super_block*)*, i32 (%struct.super_block*, %struct.statfs*)*, i32 (%struct.super_block*, i32*, i8*)*, void (%struct.inode*)*, void (%struct.super_block*)*, %struct.dentry* (%struct.super_block*, i32*, i32, i32, i32)*, i32 (%struct.dentry*, i32*, i32*, i32)*, i32 (%struct.seq_file*, %struct.vfsmount*)* } + %struct.task_struct = type <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], %struct.thread_s! truct, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }> + %struct.task_union = type <{ %struct.task_struct, [1632 x i32] }> + %struct.termios = type { i32, i32, i32, i32, i8, [19 x i8] } + %struct.thread_struct = type <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, %struct.i387_union, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }> + %struct.timer_list = type { %struct.list_head, i32, i32, void (i32)* } + %struct.tq_struct = type { %struct.list_head, i32, void (i8*)*, i8* } + %struct.tty_driver = type { i32, i8*, i8*, i32, i16, i16, i16, i16, i16, %struct.termios, i32, i32*, %struct.proc_dir_entry*, %struct.tty_driver*, %struct.tty_struct**, %struct.termios**, %struct.termios**, i8*, i32 (%struct.tty_struct*, %struct.file*)*, void (%struct.tty_struct*, %struct.file*)*, i32 (%struct.tty_struct*, i32, i8*, i32)*, void (%struct.tty_struct*, i8)*, void (%struct.tty_struct*)*, i32 (%struct.tty_struct*)*, i32 (%struct.tty_struct*)*, i32 (%struct.tty_struct*, %struct.file*, i32, i32)*, void (%struct.tty_struct*, %struct.termios*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*, i32)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*, i32)*, void (%struct.tty_struct*, i8)*, i32 (i8*, i8**, i32, i32, i32*, i8*)*, i32 (%struct.file*, i8*, i32, i8*)*, %struct.tty_driver*, %struct.tty_driver* } + %struct.tty_flip_buffer = type { %struct.tq_struct, %struct.semaphore, i8*, i8*, i32, i32, [1024 x i8], [1024 x i8], [4 x i8] } + %struct.tty_ldisc = type { i32, i8*, i32, i32, i32 (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, i32 (%struct.tty_struct*)*, i32 (%struct.tty_struct*, %struct.file*, i8*, i32)*, i32 (%struct.tty_struct*, %struct.file*, i8*, i32)*, i32 (%struct.tty_struct*, %struct.file*, i32, i32)*, void (%struct.tty_struct*, %struct.termios*)*, i32 (%struct.tty_struct*, %struct.file*, %struct.poll_table_struct*)*, void (%struct.tty_struct*, i8*, i8*, i32)*, i32 (%struct.tty_struct*)*, void (%struct.tty_struct*)* } + %struct.tty_struct = type <{ i32, %struct.tty_driver, %struct.tty_ldisc, %struct.termios*, %struct.termios*, i32, i32, i16, [2 x i8], i32, i32, %struct.winsize, i8, i8, [2 x i8], %struct.tty_struct*, %struct.fasync_struct*, %struct.tty_flip_buffer, i32, i32, %struct.wait_queue_head_t, %struct.wait_queue_head_t, %struct.tq_struct, i8*, i8*, %struct.list_head, i32, i8, i8, i16, i32, i32, [8 x i32], i8*, i32, i32, i32, [128 x i32], i32, i32, i32, %struct.semaphore, %struct.semaphore, %struct.reiserfs_proc_info_data_t, %struct.tq_struct }> + %struct.user_struct = type { %struct.atomic_t, %struct.atomic_t, %struct.atomic_t, %struct.user_struct*, %struct.user_struct**, i32 } + %struct.vfsmount = type { %struct.list_head, %struct.vfsmount*, %struct.dentry*, %struct.dentry*, %struct.super_block*, %struct.list_head, %struct.list_head, %struct.atomic_t, i32, i8*, %struct.list_head } + %struct.vm86_regs = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32, i32, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16 } + %struct.vm86_struct = type { %struct.vm86_regs, i32, i32, i32, %struct.revectored_struct, %struct.revectored_struct } + %struct.vm_area_struct = type { %struct.mm_struct*, i32, i32, %struct.vm_area_struct*, %struct.atomic_t, i32, %struct.rb_node_s, %struct.vm_area_struct*, %struct.vm_area_struct**, %struct.vm_operations_struct*, i32, %struct.file*, i32, i8* } + %struct.vm_operations_struct = type { void (%struct.vm_area_struct*)*, void (%struct.vm_area_struct*)*, %struct.page* (%struct.vm_area_struct*, i32, i32)* } + %struct.wait_queue_head_t = type { %struct.reiserfs_proc_info_data_t, %struct.list_head } + %struct.winsize = type { i16, i16, i16, i16 } + at init_mm = internal global %struct.mm_struct <{ + %struct.vm_area_struct* null, + %struct.rb_root_t zeroinitializer, + %struct.vm_area_struct* null, + %struct.atomic_t* getelementptr ([1024 x %struct.atomic_t]* @swapper_pg_dir, i32 0, i32 0), + %struct.atomic_t { i32 2 }, + %struct.atomic_t { i32 1 }, + i32 0, + %struct.rw_semaphore { + i32 0, + %struct.reiserfs_proc_info_data_t zeroinitializer, + %struct.list_head { %struct.list_head* getelementptr (%struct.mm_struct* @init_mm, i32 0, i32 7, i32 2), %struct.list_head* getelementptr (%struct.mm_struct* @init_mm, i32 0, i32 7, i32 2) } }, + %struct.reiserfs_proc_info_data_t zeroinitializer, + %struct.list_head { %struct.list_head* getelementptr (%struct.mm_struct* @init_mm, i32 0, i32 9), %struct.list_head* getelementptr (%struct.mm_struct* @init_mm, i32 0, i32 9) }, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i8 0, + [3 x i8] zeroinitializer, + %struct.iovec zeroinitializer }>, align 32 ; <%struct.mm_struct*> [#uses=3] + at init_task_union = global <{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i3! 2, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }> <{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %s! truct.task_struct*, %struct.task_struct*, %struct.list_head, %! struct.t ask_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva! _icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }> <{ + i32 0, + i32 0, + i32 0, + %struct.atomic_t { i32 -1 }, + %struct.exec_domain* @default_exec_domain, + i32 0, + i32 0, + i32 -1, + i32 10, + i32 0, + i32 0, + %struct.mm_struct* null, + i32 0, + i32 -1, + i32 -1, + %struct.list_head { %struct.list_head* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %st! ruct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0, i32 15), %struct.list_head* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_str! uct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32,! i32, i3 2, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %st! ruct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0, i32 15) }, + i32 0, + %struct.task_struct* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %s! truct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0), + %struct.task_struct* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %s! truct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0), + %struct.mm_struct* @init_mm, + %struct.list_head zeroinitializer, + i32 0, + i32 0, + %struct.linux_binfmt* null, + i32 0, + i32 0, + i32 0, + i32 0, + i8 0, + [3 x i8] zeroinitializer, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + %struct.task_struct* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %s! truct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0), + %struct.task_struct* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %s! truct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0), + %struct.task_struct* null, + %struct.task_struct* null, + %struct.task_struct* null, + %struct.list_head { %struct.list_head* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %st! ruct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0, i32 41), %struct.list_head* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_str! uct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32,! i32, i3 2, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %st! ruct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0, i32 41) }, + %struct.task_struct* null, + %struct.task_struct** null, + %struct.wait_queue_head_t { %struct.reiserfs_proc_info_data_t zeroinitializer, %struct.list_head { %struct.list_head* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.a! ffs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0, i32 44, i32 1), %struct.list_head* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i! 32, %struct.list_head, i32, %struct.task_struct*, %struct.task! _struct* , %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %! struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0, i32 44, i32 1) } }, + %struct.completion* null, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + %struct.timer_list { + %struct.list_head zeroinitializer, + i32 0, + i32 0, + void (i32)* @it_real_fn }, + %struct.fown_struct zeroinitializer, + i32 0, + [1 x i32] zeroinitializer, + [1 x i32] zeroinitializer, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i8 0, + [3 x i8] zeroinitializer, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + [32 x i32] zeroinitializer, + i32 -257, + i32 0, + i32 -1, + i8 0, + [3 x i8] zeroinitializer, + %struct.user_struct* @root_user, + [11 x %struct.affs_bm_info] [ %struct.affs_bm_info { i32 -1, i32 -1 }, %struct.affs_bm_info { i32 -1, i32 -1 }, %struct.affs_bm_info { i32 -1, i32 -1 }, %struct.affs_bm_info { i32 8388608, i32 -1 }, %struct.affs_bm_info { i32 0, i32 -1 }, %struct.affs_bm_info { i32 -1, i32 -1 }, %struct.affs_bm_info zeroinitializer, %struct.affs_bm_info { i32 1024, i32 1024 }, %struct.affs_bm_info { i32 -1, i32 -1 }, %struct.affs_bm_info { i32 -1, i32 -1 }, %struct.affs_bm_info { i32 -1, i32 -1 } ], + i16 0, + [16 x i8] c"swapper\00\00\00\00\00\00\00\00\00", + [2 x i8] zeroinitializer, + i32 0, + i32 0, + %struct.tty_struct* null, + i32 0, + %struct.sem_undo* null, + %struct.sem_queue* null, + [8 x i8] zeroinitializer, + <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }> <{ + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + [8 x i32] zeroinitializer, + i32 0, + i32 0, + i32 0, + { %struct.i387_fsave_struct, [400 x i8] } zeroinitializer, + %struct.vm86_struct* null, + i32 0, + i32 0, + i32 0, + i32 0, + i32 0, + [33 x i32] [ i32 -1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ], + [1 x i32] zeroinitializer }>, + %struct.fs_struct* @init_fs, + %struct.files_struct* @init_files, + %struct.namespace* null, + %struct.reiserfs_proc_info_data_t zeroinitializer, + %struct.signal_struct* @init_signals, + %struct.__kernel_fsid_t zeroinitializer, + %struct.sigpending { + %struct.sigqueue* null, + %struct.sigqueue** getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, ! %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0, i32 100, i32 0), + %struct.__kernel_fsid_t zeroinitializer }, + i32 0, + i32 0, + i32 (i8*)* null, + i8* null, + %struct.__kernel_fsid_t* null, + i32 0, + i32 0, + %struct.reiserfs_proc_info_data_t zeroinitializer, + i8* null, + %struct.llva_sigcontext* null, + i32 0, + %struct.task_struct* null, + i32 0, + %struct.llva_icontext_t zeroinitializer, + %struct.llva_fp_state_t zeroinitializer, + i32* null, + i32 0, + i8* null, + [4 x i8*] zeroinitializer, + [2 x i32] zeroinitializer }>, [1632 x i32] zeroinitializer }>, section ".data.init_task", align 32 ; <<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.t! ty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>*> [#uses=2] + at init_fs = internal global %struct.fs_struct { + %struct.atomic_t { i32 1 }, + %struct.reiserfs_proc_info_data_t zeroinitializer, + i32 18, + %struct.dentry* null, + %struct.dentry* null, + %struct.dentry* null, + %struct.vfsmount* null, + %struct.vfsmount* null, + %struct.vfsmount* null }, align 32 ; <%struct.fs_struct*> [#uses=1] + at default_exec_domain = external global %struct.exec_domain ; <%struct.exec_domain*> [#uses=1] + at root_user = external global %struct.user_struct ; <%struct.user_struct*> [#uses=1] + at init_files = internal global %struct.files_struct { + %struct.atomic_t { i32 1 }, + %struct.reiserfs_proc_info_data_t zeroinitializer, + i32 32, + i32 1024, + i32 0, + %struct.file** getelementptr (%struct.files_struct* @init_files, i32 0, i32 10, i32 0), + %struct.fd_set* getelementptr (%struct.files_struct* @init_files, i32 0, i32 8), + %struct.fd_set* getelementptr (%struct.files_struct* @init_files, i32 0, i32 9), + %struct.fd_set zeroinitializer, + %struct.fd_set zeroinitializer, + [32 x %struct.file*] zeroinitializer }, align 32 ; <%struct.files_struct*> [#uses=4] + at init_signals = internal global %struct.signal_struct { + %struct.atomic_t { i32 1 }, + [64 x %struct.k_sigaction] zeroinitializer, + %struct.reiserfs_proc_info_data_t zeroinitializer }, align 32 ; <%struct.signal_struct*> [#uses=1] + at swapper_pg_dir = external global [1024 x %struct.atomic_t] ; <[1024 x %struct.atomic_t]*> [#uses=1] + +declare void @it_real_fn(i32) Added: llvm/trunk/test/Linker/2008-03-07-DroppedSection_b.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2008-03-07-DroppedSection_b.ll?rev=48033&view=auto ============================================================================== --- llvm/trunk/test/Linker/2008-03-07-DroppedSection_b.ll (added) +++ llvm/trunk/test/Linker/2008-03-07-DroppedSection_b.ll Fri Mar 7 15:19:43 2008 @@ -0,0 +1,127 @@ +; RUN: llvm-as < %s > %t.bc +; RUN: llvm-as < %p/2008-03-07-DroppedSection_a.ll > %t2.bc +; RUN: llvm-ld -r -disable-opt %t.bc %t2.bc -o %t3.bc +; RUN: llvm-dis < %t3.bc | grep ".data.init_task" + +; ModuleID = 'u.bc' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" +target triple = "i686-pc-linux-gnu" + %struct..0proc_fs_info = type { i32, i8* } + %struct.ViceFid = type { i32, i32, i32 } + %struct.__kernel_fsid_t = type { [2 x i32] } + %struct.address_space = type { %struct.list_head, %struct.list_head, %struct.list_head, i32, %struct.address_space_operations*, %struct.inode*, %struct.vm_area_struct*, %struct.vm_area_struct*, %struct.reiserfs_proc_info_data_t, i32 } + %struct.address_space_operations = type { i32 (%struct.page*)*, i32 (%struct.file*, %struct.page*)*, i32 (%struct.page*)*, i32 (%struct.file*, %struct.page*, i32, i32)*, i32 (%struct.file*, %struct.page*, i32, i32)*, i32 (%struct.address_space*, i32)*, i32 (%struct.page*, i32)*, i32 (%struct.page*, i32)*, i32 (i32, %struct.inode*, %struct.kiobuf*, i32, i32)*, i32 (i32, %struct.file*, %struct.kiobuf*, i32, i32)*, void (%struct.page*)* } + %struct.affs_bm_info = type { i32, i32 } + %struct.anon = type { %struct.ViceFid } + %struct.atomic_t = type { i32 } + %struct.block_device = type { %struct.list_head, %struct.atomic_t, %struct.inode*, i16, i32, %struct.block_device_operations*, %struct.semaphore, %struct.list_head } + %struct.block_device_operations = type { i32 (%struct.inode*, %struct.file*)*, i32 (%struct.inode*, %struct.file*)*, i32 (%struct.inode*, %struct.file*, i32, i32)*, i32 (i16)*, i32 (i16)*, %struct.module* } + %struct.buffer_head = type { %struct.buffer_head*, i32, i16, i16, i16, %struct.atomic_t, i16, i32, i32, %struct.buffer_head*, %struct.buffer_head*, %struct.buffer_head*, %struct.buffer_head*, %struct.buffer_head**, i8*, %struct.page*, void (%struct.buffer_head*, i32)*, i8*, i32, %struct.wait_queue_head_t, %struct.list_head } + %struct.char_device = type { %struct.list_head, %struct.atomic_t, i16, %struct.atomic_t, %struct.semaphore } + %struct.completion = type { i32, %struct.wait_queue_head_t } + %struct.dentry = type { %struct.atomic_t, i32, %struct.inode*, %struct.dentry*, %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, i32, %struct.qstr, i32, %struct.dentry_operations*, %struct.super_block*, i32, i8*, [16 x i8] } + %struct.dentry_operations = type { i32 (%struct.dentry*, i32)*, i32 (%struct.dentry*, %struct.qstr*)*, i32 (%struct.dentry*, %struct.qstr*, %struct.qstr*)*, i32 (%struct.dentry*)*, void (%struct.dentry*)*, void (%struct.dentry*, %struct.inode*)* } + %struct.dnotify_struct = type { %struct.dnotify_struct*, i32, i32, %struct.file*, %struct.files_struct* } + %struct.dquot = type { %struct.list_head, %struct.list_head, %struct.list_head, %struct.wait_queue_head_t, %struct.wait_queue_head_t, i32, i32, %struct.super_block*, i32, i16, i64, i16, i16, i32, %struct.mem_dqblk } + %struct.dquot_operations = type { void (%struct.inode*, i32)*, void (%struct.inode*)*, i32 (%struct.inode*, i64, i32)*, i32 (%struct.inode*, i32)*, void (%struct.inode*, i64)*, void (%struct.inode*, i32)*, i32 (%struct.inode*, %struct.iattr*)*, i32 (%struct.dquot*)* } + %struct.exec_domain = type { i8*, void (i32, %struct.pt_regs*)*, i8, i8, i32*, i32*, %struct.map_segment*, %struct.map_segment*, %struct.map_segment*, %struct.map_segment*, %struct.module*, %struct.exec_domain* } + %struct.fasync_struct = type { i32, i32, %struct.fasync_struct*, %struct.file* } + %struct.fd_set = type { [32 x i32] } + %struct.file = type { %struct.list_head, %struct.dentry*, %struct.vfsmount*, %struct.file_operations*, %struct.atomic_t, i32, i16, i64, i32, i32, i32, i32, i32, %struct.fown_struct, i32, i32, i32, i32, i8*, %struct.kiobuf*, i32 } + %struct.file_lock = type { %struct.file_lock*, %struct.list_head, %struct.list_head, %struct.files_struct*, i32, %struct.wait_queue_head_t, %struct.file*, i8, i8, i64, i64, void (%struct.file_lock*)*, void (%struct.file_lock*)*, void (%struct.file_lock*)*, %struct.fasync_struct*, i32, { %struct.nfs_lock_info } } + %struct.file_operations = type { %struct.module*, i64 (%struct.file*, i64, i32)*, i32 (%struct.file*, i8*, i32, i64*)*, i32 (%struct.file*, i8*, i32, i64*)*, i32 (%struct.file*, i8*, i32 (i8*, i8*, i32, i64, i32, i32)*)*, i32 (%struct.file*, %struct.poll_table*)*, i32 (%struct.inode*, %struct.file*, i32, i32)*, i32 (%struct.file*, %struct.vm_area_struct*)*, i32 (%struct.inode*, %struct.file*)*, i32 (%struct.file*)*, i32 (%struct.inode*, %struct.file*)*, i32 (%struct.file*, %struct.dentry*, i32)*, i32 (i32, %struct.file*, i32)*, i32 (%struct.file*, i32, %struct.file_lock*)*, i32 (%struct.file*, %struct.iovec*, i32, i64*)*, i32 (%struct.file*, %struct.iovec*, i32, i64*)*, i32 (%struct.file*, %struct.page*, i32, i32, i64*, i32)*, i32 (%struct.file*, i32, i32, i32, i32)* } + %struct.file_system_type = type { i8*, i32, %struct.super_block* (%struct.super_block*, i8*, i32)*, %struct.module*, %struct.file_system_type*, %struct.list_head } + %struct.files_struct = type { %struct.atomic_t, %struct.reiserfs_proc_info_data_t, i32, i32, i32, %struct.file**, %struct.fd_set*, %struct.fd_set*, %struct.fd_set, %struct.fd_set, [32 x %struct.file*] } + %struct.fown_struct = type { i32, i32, i32, i32 } + %struct.fs_disk_quota = type { i8, i8, i16, i32, i64, i64, i64, i64, i64, i64, i32, i32, i16, i16, i32, i64, i64, i64, i32, i16, i16, [8 x i8] } + %struct.fs_qfilestat_t = type { i64, i64, i32 } + %struct.fs_quota_stat = type { i8, i16, i8, %struct.fs_qfilestat_t, %struct.fs_qfilestat_t, i32, i32, i32, i32, i16, i16 } + %struct.fs_struct = type { %struct.atomic_t, %struct.reiserfs_proc_info_data_t, i32, %struct.dentry*, %struct.dentry*, %struct.dentry*, %struct.vfsmount*, %struct.vfsmount*, %struct.vfsmount* } + %struct.i387_fxsave_struct = type { i16, i16, i16, i16, i32, i32, i32, i32, i32, i32, [32 x i32], [32 x i32], [56 x i32] } + %struct.i387_union = type { %struct.i387_fxsave_struct } + %struct.iattr = type { i32, i16, i32, i32, i64, i32, i32, i32, i32 } + %struct.if_dqblk = type { i64, i64, i64, i64, i64, i64, i64, i64, i32 } + %struct.if_dqinfo = type { i64, i64, i32, i32 } + %struct.inode = type { %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, i32, %struct.atomic_t, i16, i16, i16, i32, i32, i16, i64, i32, i32, i32, i32, i32, i32, i32, i16, %struct.semaphore, %struct.rw_semaphore, %struct.semaphore, %struct.inode_operations*, %struct.file_operations*, %struct.super_block*, %struct.wait_queue_head_t, %struct.file_lock*, %struct.address_space*, %struct.address_space, [2 x %struct.dquot*], %struct.list_head, %struct.pipe_inode_info*, %struct.block_device*, %struct.char_device*, i32, %struct.dnotify_struct*, i32, i32, i8, %struct.atomic_t, i32, i32, { %struct.nfs_inode_info } } + %struct.inode_operations = type { i32 (%struct.inode*, %struct.dentry*, i32)*, %struct.dentry* (%struct.inode*, %struct.dentry*)*, i32 (%struct.dentry*, %struct.inode*, %struct.dentry*)*, i32 (%struct.inode*, %struct.dentry*)*, i32 (%struct.inode*, %struct.dentry*, i8*)*, i32 (%struct.inode*, %struct.dentry*, i32)*, i32 (%struct.inode*, %struct.dentry*)*, i32 (%struct.inode*, %struct.dentry*, i32, i32)*, i32 (%struct.inode*, %struct.dentry*, %struct.inode*, %struct.dentry*)*, i32 (%struct.dentry*, i8*, i32)*, i32 (%struct.dentry*, %struct.nameidata*)*, void (%struct.inode*)*, i32 (%struct.inode*, i32)*, i32 (%struct.dentry*)*, i32 (%struct.dentry*, %struct.iattr*)*, i32 (%struct.dentry*, %struct.iattr*)*, i32 (%struct.dentry*, i8*, i8*, i32, i32)*, i32 (%struct.dentry*, i8*, i8*, i32)*, i32 (%struct.dentry*, i8*, i32)*, i32 (%struct.dentry*, i8*)* } + %struct.iovec = type { i8*, i32 } + %struct.k_sigaction = type { %struct.sigaction } + %struct.kern_ipc_perm = type { i32, i32, i32, i32, i32, i16, i32 } + %struct.kiobuf = type <{ i32, i32, i32, i32, i8, [3 x i8], %struct.page**, %struct.buffer_head**, i32*, %struct.atomic_t, i32, void (%struct.kiobuf*)*, %struct.wait_queue_head_t }> + %struct.linux_binfmt = type { %struct.linux_binfmt*, %struct.module*, i32 (%struct.linux_binprm*, %struct.pt_regs*)*, i32 (%struct.file*)*, i32 (i32, %struct.pt_regs*, %struct.file*)*, i32, i32 (%struct.linux_binprm*, i8*)* } + %struct.linux_binprm = type { [128 x i8], [32 x %struct.page*], i32, i32, %struct.file*, i32, i32, i32, i32, i32, i32, i32, i8*, i32, i32 } + %struct.list_head = type { %struct.list_head*, %struct.list_head* } + %struct.llva_fp_state_t = type { [7 x i32], [20 x i32] } + %struct.llva_integer_state_t = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, i32 } + %struct.llva_sigcontext = type { %struct.llva_integer_state_t, %struct.llva_fp_state_t, i32, i32, i32, i32, [1 x i32], i8* } + %struct.map_segment = type opaque + %struct.mem_dqblk = type { i32, i32, i64, i32, i32, i32, i32, i32 } + %struct.mem_dqinfo = type { %struct.quota_format_type*, i32, i32, i32, %struct.anon } + %struct.mm_struct = type <{ %struct.vm_area_struct*, %struct.rb_root_t, %struct.vm_area_struct*, %struct.atomic_t*, %struct.atomic_t, %struct.atomic_t, i32, %struct.rw_semaphore, %struct.reiserfs_proc_info_data_t, %struct.list_head, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], %struct.iovec }> + %struct.module = type { i32, %struct.module*, i8*, i32, %struct.raw_opt, i32, i32, i32, %struct..0proc_fs_info*, %struct.module_ref*, %struct.module_ref*, i32 ()*, void ()*, %struct.affs_bm_info*, %struct.affs_bm_info*, %struct.module_persist*, %struct.module_persist*, i32 ()*, i32, i8*, i8*, i8*, i8*, i8* } + %struct.module_persist = type opaque + %struct.module_ref = type { %struct.module*, %struct.module*, %struct.module_ref* } + %struct.nameidata = type { %struct.dentry*, %struct.vfsmount*, %struct.qstr, i32, i32 } + %struct.namespace = type { %struct.atomic_t, %struct.vfsmount*, %struct.list_head, %struct.rw_semaphore } + %struct.ncp_mount_data_kernel = type { i32, i32, i32, i32, i32, i32, i32, [17 x i8], i32, i32, i16, i16 } + %struct.ncp_server = type { %struct.ncp_mount_data_kernel, [258 x i8], %struct.file*, i8, i8, i16, i8, i8, i32, i32, i32, i8*, i32, %struct.semaphore, i32, i32, i32, i32, i32, i32, [8 x i8], [16 x i8], { i32, i32, i8*, i32 }, %struct..0proc_fs_info, %struct.nls_table*, %struct.nls_table*, i32, i32 } + %struct.nfs_fh = type { i16, [64 x i8] } + %struct.nfs_inode_info = type { i64, %struct.nfs_fh, i16, i32, i64, i64, i64, i32, i32, i32, [2 x i32], %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, i32, i32, i32, i32, %struct.rpc_cred* } + %struct.nfs_lock_info = type { i32, i32, %struct.nlm_host* } + %struct.nlm_host = type opaque + %struct.nls_table = type { i8*, i32 (i16, i8*, i32)*, i32 (i8*, i32, i16*)*, i8*, i8*, %struct.module*, %struct.nls_table* } + %struct.page = type { %struct.list_head, %struct.address_space*, i32, %struct.page*, %struct.atomic_t, i32, %struct.list_head, %struct.page**, %struct.buffer_head* } + %struct.pipe_inode_info = type { %struct.wait_queue_head_t, i8*, i32, i32, i32, i32, i32, i32, i32, i32 } + %struct.poll_table = type { i32, %struct.poll_table_page* } + %struct.poll_table_entry = type { %struct.file*, %struct.wait_queue_t, %struct.wait_queue_head_t* } + %struct.poll_table_page = type { %struct.poll_table_page*, %struct.poll_table_entry*, [0 x %struct.poll_table_entry] } + %struct.proc_dir_entry = type { i16, i16, i8*, i16, i16, i32, i32, i32, %struct.inode_operations*, %struct.file_operations*, i32 (i8*, i8**, i32, i32)*, %struct.module*, %struct.proc_dir_entry*, %struct.proc_dir_entry*, %struct.proc_dir_entry*, i8*, i32 (i8*, i8**, i32, i32, i32*, i8*)*, i32 (%struct.file*, i8*, i32, i8*)*, %struct.atomic_t, i32, i16 } + %struct.pt_regs = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } + %struct.qstr = type { i8*, i32, i32 } + %struct.quota_format_ops = type { i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.dquot*)*, i32 (%struct.dquot*)* } + %struct.quota_format_type = type { i32, %struct.quota_format_ops*, %struct.module*, %struct.quota_format_type* } + %struct.quota_info = type { i32, %struct.semaphore, %struct.semaphore, [2 x %struct.file*], [2 x %struct.mem_dqinfo], [2 x %struct.quota_format_ops*] } + %struct.quotactl_ops = type { i32 (%struct.super_block*, i32, i32, i8*)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32, %struct.if_dqinfo*)*, i32 (%struct.super_block*, i32, %struct.if_dqinfo*)*, i32 (%struct.super_block*, i32, i32, %struct.if_dqblk*)*, i32 (%struct.super_block*, i32, i32, %struct.if_dqblk*)*, i32 (%struct.super_block*, %struct.fs_quota_stat*)*, i32 (%struct.super_block*, i32, i32)*, i32 (%struct.super_block*, i32, i32, %struct.fs_disk_quota*)*, i32 (%struct.super_block*, i32, i32, %struct.fs_disk_quota*)* } + %struct.raw_opt = type { %struct.atomic_t } + %struct.rb_node_s = type { %struct.rb_node_s*, i32, %struct.rb_node_s*, %struct.rb_node_s* } + %struct.rb_root_t = type { %struct.rb_node_s* } + %struct.reiserfs_proc_info_data_t = type { } + %struct.revectored_struct = type { [8 x i32] } + %struct.rpc_cred = type opaque + %struct.rw_semaphore = type { i32, %struct.reiserfs_proc_info_data_t, %struct.list_head } + %struct.sem_array = type { %struct.kern_ipc_perm, i32, i32, %struct.affs_bm_info*, %struct.sem_queue*, %struct.sem_queue**, %struct.sem_undo*, i32 } + %struct.sem_queue = type { %struct.sem_queue*, %struct.sem_queue**, %struct.task_struct*, %struct.sem_undo*, i32, i32, %struct.sem_array*, i32, %struct.sembuf*, i32, i32 } + %struct.sem_undo = type { %struct.sem_undo*, %struct.sem_undo*, i32, i16* } + %struct.semaphore = type { %struct.atomic_t, i32, %struct.wait_queue_head_t } + %struct.sembuf = type { i16, i16, i16 } + %struct.seq_file = type { i8*, i32, i32, i32, i64, %struct.semaphore, %struct.seq_operations*, i8* } + %struct.seq_operations = type { i8* (%struct.seq_file*, i64*)*, void (%struct.seq_file*, i8*)*, i8* (%struct.seq_file*, i8*, i64*)*, i32 (%struct.seq_file*, i8*)* } + %struct.sigaction = type { void (i32)*, i32, void ()*, %struct.__kernel_fsid_t } + %struct.siginfo_t = type { i32, i32, i32, { [29 x i32] } } + %struct.signal_struct = type { %struct.atomic_t, [64 x %struct.k_sigaction], %struct.reiserfs_proc_info_data_t } + %struct.sigpending = type { %struct.sigqueue*, %struct.sigqueue**, %struct.__kernel_fsid_t } + %struct.sigqueue = type { %struct.sigqueue*, %struct.siginfo_t } + %struct.statfs = type { i32, i32, i32, i32, i32, i32, i32, %struct.__kernel_fsid_t, i32, [6 x i32] } + %struct.super_block = type { %struct.list_head, i16, i32, i8, i8, i64, %struct.file_system_type*, %struct.super_operations*, %struct.dquot_operations*, %struct.quotactl_ops*, i32, i32, %struct.dentry*, %struct.rw_semaphore, %struct.semaphore, i32, %struct.atomic_t, %struct.list_head, %struct.list_head, %struct.list_head, %struct.block_device*, %struct.list_head, %struct.quota_info, { %struct.ncp_server }, %struct.semaphore, %struct.semaphore } + %struct.super_operations = type { %struct.inode* (%struct.super_block*)*, void (%struct.inode*)*, void (%struct.inode*)*, void (%struct.inode*, i8*)*, void (%struct.inode*)*, void (%struct.inode*, i32)*, void (%struct.inode*)*, void (%struct.inode*)*, void (%struct.super_block*)*, void (%struct.super_block*)*, i32 (%struct.super_block*)*, void (%struct.super_block*)*, void (%struct.super_block*)*, i32 (%struct.super_block*, %struct.statfs*)*, i32 (%struct.super_block*, i32*, i8*)*, void (%struct.inode*)*, void (%struct.super_block*)*, %struct.dentry* (%struct.super_block*, i32*, i32, i32, i32)*, i32 (%struct.dentry*, i32*, i32*, i32)*, i32 (%struct.seq_file*, %struct.vfsmount*)* } + %struct.task_struct = type <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], %struct.thread_s! truct, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_integer_state_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }> + %struct.task_union = type <{ %struct.task_struct, [1632 x i32] }> + %struct.termios = type { i32, i32, i32, i32, i8, [19 x i8] } + %struct.thread_struct = type <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, %struct.i387_union, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }> + %struct.timer_list = type { %struct.list_head, i32, i32, void (i32)* } + %struct.tq_struct = type { %struct.list_head, i32, void (i8*)*, i8* } + %struct.tty_driver = type { i32, i8*, i8*, i32, i16, i16, i16, i16, i16, %struct.termios, i32, i32*, %struct.proc_dir_entry*, %struct.tty_driver*, %struct.tty_struct**, %struct.termios**, %struct.termios**, i8*, i32 (%struct.tty_struct*, %struct.file*)*, void (%struct.tty_struct*, %struct.file*)*, i32 (%struct.tty_struct*, i32, i8*, i32)*, void (%struct.tty_struct*, i8)*, void (%struct.tty_struct*)*, i32 (%struct.tty_struct*)*, i32 (%struct.tty_struct*)*, i32 (%struct.tty_struct*, %struct.file*, i32, i32)*, void (%struct.tty_struct*, %struct.termios*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*, i32)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*, i32)*, void (%struct.tty_struct*, i8)*, i32 (i8*, i8**, i32, i32, i32*, i8*)*, i32 (%struct.file*, i8*, i32, i8*)*, %struct.tty_driver*, %struct.tty_driver* } + %struct.tty_flip_buffer = type { %struct.tq_struct, %struct.semaphore, i8*, i8*, i32, i32, [1024 x i8], [1024 x i8], [4 x i8] } + %struct.tty_ldisc = type { i32, i8*, i32, i32, i32 (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, i32 (%struct.tty_struct*)*, i32 (%struct.tty_struct*, %struct.file*, i8*, i32)*, i32 (%struct.tty_struct*, %struct.file*, i8*, i32)*, i32 (%struct.tty_struct*, %struct.file*, i32, i32)*, void (%struct.tty_struct*, %struct.termios*)*, i32 (%struct.tty_struct*, %struct.file*, %struct.poll_table*)*, void (%struct.tty_struct*, i8*, i8*, i32)*, i32 (%struct.tty_struct*)*, void (%struct.tty_struct*)* } + %struct.tty_struct = type <{ i32, %struct.tty_driver, %struct.tty_ldisc, %struct.termios*, %struct.termios*, i32, i32, i16, [2 x i8], i32, i32, %struct.winsize, i8, i8, [2 x i8], %struct.tty_struct*, %struct.fasync_struct*, %struct.tty_flip_buffer, i32, i32, %struct.wait_queue_head_t, %struct.wait_queue_head_t, %struct.tq_struct, i8*, i8*, %struct.list_head, i32, i8, i8, i16, i32, i32, [8 x i32], i8*, i32, i32, i32, [128 x i32], i32, i32, i32, %struct.semaphore, %struct.semaphore, %struct.reiserfs_proc_info_data_t, %struct.tq_struct }> + %struct.user_struct = type { %struct.atomic_t, %struct.atomic_t, %struct.atomic_t, %struct.user_struct*, %struct.user_struct**, i32 } + %struct.vfsmount = type { %struct.list_head, %struct.vfsmount*, %struct.dentry*, %struct.dentry*, %struct.super_block*, %struct.list_head, %struct.list_head, %struct.atomic_t, i32, i8*, %struct.list_head } + %struct.vm86_regs = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32, i32, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16 } + %struct.vm86_struct = type { %struct.vm86_regs, i32, i32, i32, %struct.revectored_struct, %struct.revectored_struct } + %struct.vm_area_struct = type { %struct.mm_struct*, i32, i32, %struct.vm_area_struct*, %struct.atomic_t, i32, %struct.rb_node_s, %struct.vm_area_struct*, %struct.vm_area_struct**, %struct.vm_operations_struct*, i32, %struct.file*, i32, i8* } + %struct.vm_operations_struct = type { void (%struct.vm_area_struct*)*, void (%struct.vm_area_struct*)*, %struct.page* (%struct.vm_area_struct*, i32, i32)* } + %struct.wait_queue_head_t = type { %struct.reiserfs_proc_info_data_t, %struct.list_head } + %struct.wait_queue_t = type { i32, %struct.task_struct*, %struct.list_head } + %struct.winsize = type { i16, i16, i16, i16 } + at init_task_union = external global %struct.task_union ; <%struct.task_union*> [#uses=1] + From gohman at apple.com Fri Mar 7 16:24:41 2008 From: gohman at apple.com (Dan Gohman) Date: Fri, 07 Mar 2008 22:24:41 -0000 Subject: [llvm-commits] [llvm] r48034 - /llvm/trunk/include/llvm/Value.h Message-ID: <200803072224.m27MOfDU028738@zion.cs.uiuc.edu> Author: djg Date: Fri Mar 7 16:24:41 2008 New Revision: 48034 URL: http://llvm.org/viewvc/llvm-project?rev=48034&view=rev Log: There is no killUse. Modified: llvm/trunk/include/llvm/Value.h Modified: llvm/trunk/include/llvm/Value.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Value.h?rev=48034&r1=48033&r2=48034&view=diff ============================================================================== --- llvm/trunk/include/llvm/Value.h (original) +++ llvm/trunk/include/llvm/Value.h Fri Mar 7 16:24:41 2008 @@ -163,7 +163,7 @@ /// to check for specific values. unsigned getNumUses() const; - /// addUse/killUse - These two methods should only be used by the Use class. + /// addUse - This method should only be used by the Use class. /// void addUse(Use &U) { U.addToList(&UseList); } From evan.cheng at apple.com Fri Mar 7 16:32:20 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 7 Mar 2008 14:32:20 -0800 Subject: [llvm-commits] [llvm] r48003 - in /llvm/trunk: include/llvm/CodeGen/RegisterScavenging.h lib/CodeGen/RegisterScavenging.cpp In-Reply-To: <200803062322.m26NMi9Q013346@zion.cs.uiuc.edu> References: <200803062322.m26NMi9Q013346@zion.cs.uiuc.edu> Message-ID: <3C4D47ED-5969-49B7-97E6-57DBF0A829AE@apple.com> On Mar 6, 2008, at 3:22 PM, Bill Wendling wrote: > Author: void > Date: Thu Mar 6 17:22:43 2008 > New Revision: 48003 > > URL: http://llvm.org/viewvc/llvm-project?rev=48003&view=rev > Log: > When setting the "unused" info, take into account something like this: > > %r3 = OR %x3, %x3 > > We don't want to mark the %r3 as unused even though it's a sub- > register of %x3. > > Modified: > llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h > llvm/trunk/lib/CodeGen/RegisterScavenging.cpp > > Modified: llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h?rev=48003&r1=48002&r2=48003&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h (original) > +++ llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h Thu Mar 6 > 17:22:43 2008 > @@ -98,7 +98,7 @@ > /// > void setUsed(unsigned Reg); > void setUsed(BitVector Regs) { RegsAvailable &= ~Regs; } > - void setUnused(unsigned Reg); > + void setUnused(unsigned Reg, const MachineInstr *MI); > void setUnused(BitVector Regs) { RegsAvailable |= Regs; } > > /// FindUnusedReg - Find a unused register of the specified > register class > > Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=48003&r1=48002&r2=48003&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original) > +++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Thu Mar 6 > 17:22:43 2008 > @@ -8,9 +8,9 @@ > // > = > = > = > ----------------------------------------------------------------------= > ==// > // > // This file implements the machine register scavenger. It can provide > -// information such as unused register at any point in a machine > basic block. > -// It also provides a mechanism to make registers availbale by > evicting them > -// to spill slots. > +// information, such as unused registers, at any point in a machine > basic block. > +// It also provides a mechanism to make registers available by > evicting them to > +// spill slots. > // > // > = > = > = > ----------------------------------------------------------------------= > ==// > > @@ -25,6 +25,28 @@ > #include "llvm/ADT/STLExtras.h" > using namespace llvm; > > +/// RedefinesSuperRegPart - Return true if the specified register > is redefining > +/// part of a super-register. > +static bool RedefinesSuperRegPart(const MachineInstr *MI, unsigned > SubReg, > + const TargetRegisterInfo *TRI) { > + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { > + const MachineOperand &MO = MI->getOperand(i); > + if (!MO.isRegister() || !MO.isUse()) > + continue; > + if (TRI->isSuperRegister(SubReg, MO.getReg())) > + return true; > + } > + > + return false; > +} > + > +static bool RedefinesSuperRegPart(const MachineInstr *MI, > + const MachineOperand &MO, > + const TargetRegisterInfo *TRI) { > + assert(MO.isRegister() && MO.isDef() && "Not a register def!"); > + return RedefinesSuperRegPart(MI, MO.getReg(), TRI); > +} > + > /// setUsed - Set the register and its sub-registers as being used. > void RegScavenger::setUsed(unsigned Reg) { > RegsAvailable.reset(Reg); > @@ -35,12 +57,13 @@ > } > > /// setUnused - Set the register and its sub-registers as being > unused. > -void RegScavenger::setUnused(unsigned Reg) { > +void RegScavenger::setUnused(unsigned Reg, const MachineInstr *MI) { > RegsAvailable.set(Reg); > > for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); > unsigned SubReg = *SubRegs; ++SubRegs) > - RegsAvailable.set(SubReg); > + if (!RedefinesSuperRegPart(MI, Reg, TRI)) > + RegsAvailable.set(SubReg); > } > > void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) { > @@ -138,9 +161,12 @@ > if (MO.isKill() && !isReserved(Reg)) { > ChangedRegs.set(Reg); > > + // Mark sub-registers as changed if they aren't defined in > the same > + // instruction. > for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); > unsigned SubReg = *SubRegs; ++SubRegs) > - ChangedRegs.set(SubReg); > + if (!RedefinesSuperRegPart(MI, Reg, TRI)) Why is this necessary? Something that kills a super-register also kills the sub-register. > > + ChangedRegs.set(SubReg); > } > } > > @@ -159,7 +185,7 @@ > > // If it's dead upon def, then it is now free. > if (MO.isDead()) { > - setUnused(Reg); > + setUnused(Reg, MI); > continue; > } > > @@ -169,6 +195,10 @@ > continue; > } > > + // Skip is this is merely redefining part of a super-register. > + if (RedefinesSuperRegPart(MI, MO, TRI)) > + continue; > + > assert((isUnused(Reg) || isReserved(Reg)) && > "Re-defining a live register!"); > setUsed(Reg); > @@ -194,7 +224,7 @@ > unsigned Reg = MO.getReg(); > assert(isUsed(Reg)); > if (!isReserved(Reg)) > - setUnused(Reg); > + setUnused(Reg, MI); What about the sub-registers? Evan > > } > > // Process uses. > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Fri Mar 7 16:39:49 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 07 Mar 2008 22:39:49 -0000 Subject: [llvm-commits] [llvm] r48035 - /llvm/trunk/lib/Support/APInt.cpp Message-ID: <200803072239.m27MdnpP029154@zion.cs.uiuc.edu> Author: evancheng Date: Fri Mar 7 16:39:49 2008 New Revision: 48035 URL: http://llvm.org/viewvc/llvm-project?rev=48035&view=rev Log: Fix a typo. It's causing consumer-typeset to miscompile. Perhaps more. Modified: llvm/trunk/lib/Support/APInt.cpp Modified: llvm/trunk/lib/Support/APInt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=48035&r1=48034&r2=48035&view=diff ============================================================================== --- llvm/trunk/lib/Support/APInt.cpp (original) +++ llvm/trunk/lib/Support/APInt.cpp Fri Mar 7 16:39:49 2008 @@ -1175,7 +1175,7 @@ /// Logical right-shift this APInt by shiftAmt. /// @brief Logical right-shift function. APInt APInt::lshr(const APInt &shiftAmt) const { - return ashr(shiftAmt.getLimitedValue(BitWidth)); + return lshr(shiftAmt.getLimitedValue(BitWidth)); } /// Logical right-shift this APInt by shiftAmt. From clattner at apple.com Fri Mar 7 17:29:18 2008 From: clattner at apple.com (Chris Lattner) Date: Fri, 7 Mar 2008 15:29:18 -0800 Subject: [llvm-commits] [llvm] r48033 - in /llvm/trunk/test/Linker: 2008-03-07-DroppedSection_a.ll 2008-03-07-DroppedSection_b.ll In-Reply-To: <200803072119.m27LJhHE026848@zion.cs.uiuc.edu> References: <200803072119.m27LJhHE026848@zion.cs.uiuc.edu> Message-ID: <6D6112C8-4D4C-4379-832E-E15B581B1BEC@apple.com> On Mar 7, 2008, at 1:19 PM, Andrew Lenharth wrote: > Author: alenhar2 > Date: Fri Mar 7 15:19:43 2008 > New Revision: 48033 > > URL: http://llvm.org/viewvc/llvm-project?rev=48033&view=rev > Log: > add dropped section test case for PR2123 can you prune out some of these types? Just change it to '@init_task_union = external global i32' or something plz. -Chris From isanbard at gmail.com Fri Mar 7 17:44:50 2008 From: isanbard at gmail.com (Bill Wendling) Date: Fri, 7 Mar 2008 15:44:50 -0800 Subject: [llvm-commits] [llvm] r48003 - in /llvm/trunk: include/llvm/CodeGen/RegisterScavenging.h lib/CodeGen/RegisterScavenging.cpp In-Reply-To: <3C4D47ED-5969-49B7-97E6-57DBF0A829AE@apple.com> References: <200803062322.m26NMi9Q013346@zion.cs.uiuc.edu> <3C4D47ED-5969-49B7-97E6-57DBF0A829AE@apple.com> Message-ID: <16e5fdf90803071544i60e168c3wd3f9a625ba666005@mail.gmail.com> On Fri, Mar 7, 2008 at 2:32 PM, Evan Cheng wrote: > > On Mar 6, 2008, at 3:22 PM, Bill Wendling wrote: > > > void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) { > > @@ -138,9 +161,12 @@ > > if (MO.isKill() && !isReserved(Reg)) { > > ChangedRegs.set(Reg); > > > > + // Mark sub-registers as changed if they aren't defined in > > the same > > + // instruction. > > for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); > > unsigned SubReg = *SubRegs; ++SubRegs) > > - ChangedRegs.set(SubReg); > > + if (!RedefinesSuperRegPart(MI, Reg, TRI)) > > Why is this necessary? Something that kills a super-register also > kills the sub-register. > Okay, sure. > > @@ -194,7 +224,7 @@ > > unsigned Reg = MO.getReg(); > > assert(isUsed(Reg)); > > if (!isReserved(Reg)) > > - setUnused(Reg); > > + setUnused(Reg, MI); > > What about the sub-registers? > The setUnused method sets that information, right? -bw From isanbard at gmail.com Fri Mar 7 17:45:15 2008 From: isanbard at gmail.com (Bill Wendling) Date: Fri, 07 Mar 2008 23:45:15 -0000 Subject: [llvm-commits] [llvm] r48038 - /llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Message-ID: <200803072345.m27NjFq7031040@zion.cs.uiuc.edu> Author: void Date: Fri Mar 7 17:45:15 2008 New Revision: 48038 URL: http://llvm.org/viewvc/llvm-project?rev=48038&view=rev Log: Something that kills a super-register also kills the sub-register. Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=48038&r1=48037&r2=48038&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original) +++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Fri Mar 7 17:45:15 2008 @@ -170,8 +170,7 @@ // instruction. for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) - if (!RedefinesSuperRegPart(MI, Reg, TRI)) - ChangedRegs.set(SubReg); + ChangedRegs.set(SubReg); } } From dpatel at apple.com Fri Mar 7 17:48:51 2008 From: dpatel at apple.com (Devang Patel) Date: Fri, 07 Mar 2008 23:48:51 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r48039 - in /llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc: ./ 2007-04-03-ObjcEH.m 2007-05-02-Strong.m 2007-09-25-EH.m 2007-10-17-SJLJExceptions.m 2007-10-18-ProDescriptor.m 2007-10-23-GC-WriteBarrier.m llvmobjc.exp Message-ID: <200803072348.m27NmpZR031187@zion.cs.uiuc.edu> Author: dpatel Date: Fri Mar 7 17:48:51 2008 New Revision: 48039 URL: http://llvm.org/viewvc/llvm-project?rev=48039&view=rev Log: Copy objective-c FE tests from llvm module. Added: llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/ llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-04-03-ObjcEH.m llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-05-02-Strong.m llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-09-25-EH.m llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-10-17-SJLJExceptions.m llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-10-18-ProDescriptor.m llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-10-23-GC-WriteBarrier.m llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/llvmobjc.exp Added: llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-04-03-ObjcEH.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-04-03-ObjcEH.m?rev=48039&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-04-03-ObjcEH.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-04-03-ObjcEH.m Fri Mar 7 17:48:51 2008 @@ -0,0 +1,29 @@ +/* { dg-do compile } */ + + at interface B +-(int)bar; + at end + + at interface A +-(void) Foo:(int) state; + at end + + at implementation A +- (void) Foo:(int) state { + + int wasResponded = 0; + @try { + if (state) { + B * b = 0; + @try { } + @finally { + wasResponded = ![b bar]; + } + } + } + @finally { + } +} + at end + + Added: llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-05-02-Strong.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-05-02-Strong.m?rev=48039&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-05-02-Strong.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-05-02-Strong.m Fri Mar 7 17:48:51 2008 @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-fobjc-gc" } */ +typedef int NSInteger; +typedef struct _NSRect { + int origin; + int size; +} NSRect; + +__attribute__((objc_gc(strong))) NSRect *_cachedRectArray; +extern const NSRect NSZeroRect; + at interface A{ +} +-(void)bar:(NSInteger *)rectCount; + at end + + at implementation A + +-(void)bar:(NSInteger *)rectCount { + NSRect appendRect = NSZeroRect; + + _cachedRectArray[*rectCount - 1] = NSZeroRect; +} + + at end Added: llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-09-25-EH.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-09-25-EH.m?rev=48039&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-09-25-EH.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-09-25-EH.m Fri Mar 7 17:48:51 2008 @@ -0,0 +1,26 @@ +/* { dg-do compile { target { *-*-darwin* } } } */ +/* { dg-options "-w -m64 -mmacosx-version-min=10.5" } */ + at class NSDictionary, DSoBuffer, DSoDirectory, NSMutableArray; + at interface NSException {} + at end + at interface DSoNode { + DSoDirectory *mDirectory; +} + at end + at implementation DSoNode +- (void) _findRecordsOfTypes { + DSoBuffer *dbData; + void *recInfo; + NSMutableArray *results; + @try { + dsGetRecordEntry([dbData dsDataBuffer], (void**)&recInfo); + @try { + [results addObject:37]; + } @finally { + dsDeallocRecordEntry([mDirectory dsDirRef], recInfo); + } + } @catch(NSException * exception) { + } +} + + Added: llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-10-17-SJLJExceptions.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-10-17-SJLJExceptions.m?rev=48039&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-10-17-SJLJExceptions.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-10-17-SJLJExceptions.m Fri Mar 7 17:48:51 2008 @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-std=gnu99 -O2 -fexceptions" } */ +#import + + at interface Foo { + char c; + short s; + int i; + long l; + float f; + double d; +} +-(Foo*)retain; + at end + +struct Foo *bork(Foo *FooArray) { + struct Foo *result = 0; + @try { + result = [FooArray retain]; + } @catch(id any) { + printf("hello world\n"); + } + + return result; +} + +/* { dg-final { scan-assembler-not "Unwind_Resume" } } */ Added: llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-10-18-ProDescriptor.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-10-18-ProDescriptor.m?rev=48039&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-10-18-ProDescriptor.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-10-18-ProDescriptor.m Fri Mar 7 17:48:51 2008 @@ -0,0 +1,19 @@ +/* { dg-do compile } */ + at protocol O + at end + at interface O < O > { +} + at end +struct A { +}; + at protocol AB +- (unsigned) ver; + at end + at interface AGy:O < AB > { +} + at end + at implementation AGy +- (unsigned) ver { +} + at end + Added: llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-10-23-GC-WriteBarrier.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-10-23-GC-WriteBarrier.m?rev=48039&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-10-23-GC-WriteBarrier.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/2007-10-23-GC-WriteBarrier.m Fri Mar 7 17:48:51 2008 @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-fobjc-gc" } */ +/* rdar:5541393 */ +typedef unsigned int NSUInteger; +__attribute__((objc_gc(strong))) float *_scores; + +void foo(int i, float f) { + _scores[i] = f; +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/llvmobjc.exp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/llvmobjc.exp?rev=48039&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/llvmobjc.exp (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/llvm.objc/llvmobjc.exp Fri Mar 7 17:48:51 2008 @@ -0,0 +1,36 @@ +# GCC Objective-C testsuite that uses the `dg.exp' driver. +# Copyright (C) 1997, 2001 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +# Load support procs. +load_lib objc-dg.exp + +# If a testcase doesn't have special options, use these. +global DEFAULT_CFLAGS +if ![info exists DEFAULT_CFLAGS] then { + set DEFAULT_CFLAGS "" +} + +# Initialize `dg'. +dg-init + +# Main loop. +# APPLE LOCAL -ObjC +dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[mc\]]] \ + "" $DEFAULT_CFLAGS + +# All done. +dg-finish From gohman at apple.com Fri Mar 7 17:52:14 2008 From: gohman at apple.com (Dan Gohman) Date: Fri, 7 Mar 2008 15:52:14 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <1B24D1D3-3C36-4365-B885-B3DF27D03844@apple.com> References: <200803031053.00270.dag@cray.com> <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> <5E772510-8B4F-488A-A7B5-BBECBAE88451@apple.com> <85087762-E617-46B4-BB1E-96582F05A58D@apple.com> <1B24D1D3-3C36-4365-B885-B3DF27D03844@apple.com> Message-ID: <13A82D68-6E84-4F1B-B33E-457595FE8C63@apple.com> On Mar 6, 2008, at 1:45 PM, Evan Cheng wrote: > > More annoying is 176.gcc fails with the patch. It's very likely not a > bug in your patch. But I haven't had the chance to track it down. Does > it work for you? I just tried bugpoint on this but bugpoint's reduced testcase didn't show the problem :-/. Dan From dpatel at apple.com Fri Mar 7 17:53:44 2008 From: dpatel at apple.com (Devang Patel) Date: Fri, 07 Mar 2008 23:53:44 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r48040 - in /llvm-gcc-4.2/trunk/gcc/testsuite/llvm.obj-c++: ./ 2007-10-03-MetadataPointers.mm llvmobj-c++.exp Message-ID: <200803072353.m27NriL9031340@zion.cs.uiuc.edu> Author: dpatel Date: Fri Mar 7 17:53:44 2008 New Revision: 48040 URL: http://llvm.org/viewvc/llvm-project?rev=48040&view=rev Log: Copy objective-c++ FE tests from llvm module. Added: llvm-gcc-4.2/trunk/gcc/testsuite/llvm.obj-c++/ llvm-gcc-4.2/trunk/gcc/testsuite/llvm.obj-c++/2007-10-03-MetadataPointers.mm llvm-gcc-4.2/trunk/gcc/testsuite/llvm.obj-c++/llvmobj-c++.exp Added: llvm-gcc-4.2/trunk/gcc/testsuite/llvm.obj-c++/2007-10-03-MetadataPointers.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/llvm.obj-c%2B%2B/2007-10-03-MetadataPointers.mm?rev=48040&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/llvm.obj-c++/2007-10-03-MetadataPointers.mm (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/llvm.obj-c++/2007-10-03-MetadataPointers.mm Fri Mar 7 17:53:44 2008 @@ -0,0 +1,7 @@ +/* { dg-do compile } */ + + at class NSImage; +void bork() { + NSImage *nsimage; + [nsimage release]; +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/llvm.obj-c++/llvmobj-c++.exp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/llvm.obj-c%2B%2B/llvmobj-c%2B%2B.exp?rev=48040&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/llvm.obj-c++/llvmobj-c++.exp (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/llvm.obj-c++/llvmobj-c++.exp Fri Mar 7 17:53:44 2008 @@ -0,0 +1,37 @@ +# GCC Objective-C++ testsuite that uses the `dg.exp' driver. +# Copyright (C) 2004 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +# Load support procs. +load_lib obj-c++-dg.exp + +# If a testcase doesn't have special options, use these. +global DEFAULT_OBJCXXFLAGS +if ![info exists DEFAULT_OBJCXXFLAGS] then { + set DEFAULT_OBJCXXFLAGS " -ansi -pedantic-errors -Wno-long-long" +} + +# Initialize `dg'. +dg-init + +# Gather a list of all tests. +set tests [lsort [find $srcdir/$subdir *.mm]] + +# Main loop. +dg-runtest $tests "" $DEFAULT_OBJCXXFLAGS + +# All done. +dg-finish From gohman at apple.com Fri Mar 7 18:19:13 2008 From: gohman at apple.com (Dan Gohman) Date: Sat, 08 Mar 2008 00:19:13 -0000 Subject: [llvm-commits] [llvm] r48041 - in /llvm/trunk: lib/Target/PowerPC/PPCISelLowering.cpp test/CodeGen/PowerPC/return-val-i128.ll Message-ID: <200803080019.m280JDY9032079@zion.cs.uiuc.edu> Author: djg Date: Fri Mar 7 18:19:12 2008 New Revision: 48041 URL: http://llvm.org/viewvc/llvm-project?rev=48041&view=rev Log: Add support for calls with i128 return values on ppc64. Added: llvm/trunk/test/CodeGen/PowerPC/return-val-i128.ll Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=48041&r1=48040&r2=48041&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Fri Mar 7 18:19:12 2008 @@ -2015,9 +2015,19 @@ NodeTys.push_back(MVT::i32); break; case MVT::i64: - Chain = DAG.getCopyFromReg(Chain, PPC::X3, MVT::i64, InFlag).getValue(1); - ResultVals[0] = Chain.getValue(0); - NumResults = 1; + if (Op.Val->getValueType(1) == MVT::i64) { + Chain = DAG.getCopyFromReg(Chain, PPC::X3, MVT::i64, InFlag).getValue(1); + ResultVals[0] = Chain.getValue(0); + Chain = DAG.getCopyFromReg(Chain, PPC::X4, MVT::i64, + Chain.getValue(2)).getValue(1); + ResultVals[1] = Chain.getValue(0); + NumResults = 2; + NodeTys.push_back(MVT::i64); + } else { + Chain = DAG.getCopyFromReg(Chain, PPC::X3, MVT::i64, InFlag).getValue(1); + ResultVals[0] = Chain.getValue(0); + NumResults = 1; + } NodeTys.push_back(MVT::i64); break; case MVT::f64: Added: llvm/trunk/test/CodeGen/PowerPC/return-val-i128.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/return-val-i128.ll?rev=48041&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/return-val-i128.ll (added) +++ llvm/trunk/test/CodeGen/PowerPC/return-val-i128.ll Fri Mar 7 18:19:12 2008 @@ -0,0 +1,36 @@ +; RUN: llvm-as < %s | llc -march=ppc64 + +define i128 @__fixsfdi(float %a) { +entry: + %a_addr = alloca float ; [#uses=4] + %retval = alloca i128, align 16 ; [#uses=2] + %tmp = alloca i128, align 16 ; [#uses=3] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + store float %a, float* %a_addr + %tmp1 = load float* %a_addr, align 4 ; [#uses=1] + %tmp2 = fcmp olt float %tmp1, 0.000000e+00 ; [#uses=1] + %tmp23 = zext i1 %tmp2 to i8 ; [#uses=1] + %toBool = icmp ne i8 %tmp23, 0 ; [#uses=1] + br i1 %toBool, label %bb, label %bb8 +bb: ; preds = %entry + %tmp4 = load float* %a_addr, align 4 ; [#uses=1] + %tmp5 = sub float -0.000000e+00, %tmp4 ; [#uses=1] + %tmp6 = call i128 @__fixunssfDI( float %tmp5 ) nounwind ; [#uses=1] + %tmp7 = sub i128 0, %tmp6 ; [#uses=1] + store i128 %tmp7, i128* %tmp, align 16 + br label %bb11 +bb8: ; preds = %entry + %tmp9 = load float* %a_addr, align 4 ; [#uses=1] + %tmp10 = call i128 @__fixunssfDI( float %tmp9 ) nounwind ; [#uses=1] + store i128 %tmp10, i128* %tmp, align 16 + br label %bb11 +bb11: ; preds = %bb8, %bb + %tmp12 = load i128* %tmp, align 16 ; [#uses=1] + store i128 %tmp12, i128* %retval, align 16 + br label %return +return: ; preds = %bb11 + %retval13 = load i128* %retval ; [#uses=1] + ret i128 %retval13 +} + +declare i128 @__fixunssfDI(float) From evan.cheng at apple.com Fri Mar 7 18:19:57 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 7 Mar 2008 16:19:57 -0800 Subject: [llvm-commits] [llvm] r48003 - in /llvm/trunk: include/llvm/CodeGen/RegisterScavenging.h lib/CodeGen/RegisterScavenging.cpp In-Reply-To: <16e5fdf90803071544i60e168c3wd3f9a625ba666005@mail.gmail.com> References: <200803062322.m26NMi9Q013346@zion.cs.uiuc.edu> <3C4D47ED-5969-49B7-97E6-57DBF0A829AE@apple.com> <16e5fdf90803071544i60e168c3wd3f9a625ba666005@mail.gmail.com> Message-ID: On Mar 7, 2008, at 3:44 PM, Bill Wendling wrote: > On Fri, Mar 7, 2008 at 2:32 PM, Evan Cheng > wrote: >> >> On Mar 6, 2008, at 3:22 PM, Bill Wendling wrote: >> >>> void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) { >>> @@ -138,9 +161,12 @@ >>> if (MO.isKill() && !isReserved(Reg)) { >>> ChangedRegs.set(Reg); >>> >>> + // Mark sub-registers as changed if they aren't defined in >>> the same >>> + // instruction. >>> for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); >>> unsigned SubReg = *SubRegs; ++SubRegs) >>> - ChangedRegs.set(SubReg); >>> + if (!RedefinesSuperRegPart(MI, Reg, TRI)) >> >> Why is this necessary? Something that kills a super-register also >> kills the sub-register. >> > Okay, sure. Please fix. Thanks. > > >>> @@ -194,7 +224,7 @@ >>> unsigned Reg = MO.getReg(); >>> assert(isUsed(Reg)); >>> if (!isReserved(Reg)) >>> - setUnused(Reg); >>> + setUnused(Reg, MI); >> >> What about the sub-registers? >> > The setUnused method sets that information, right? Ah ok. Evan > > > -bw > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Fri Mar 7 18:20:14 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 7 Mar 2008 16:20:14 -0800 Subject: [llvm-commits] [llvm] r48038 - /llvm/trunk/lib/CodeGen/RegisterScavenging.cpp In-Reply-To: <200803072345.m27NjFq7031040@zion.cs.uiuc.edu> References: <200803072345.m27NjFq7031040@zion.cs.uiuc.edu> Message-ID: <415D5941-68F2-4D7A-9E4D-EA2D8FA18580@apple.com> Thanks. Evan On Mar 7, 2008, at 3:45 PM, Bill Wendling wrote: > Author: void > Date: Fri Mar 7 17:45:15 2008 > New Revision: 48038 > > URL: http://llvm.org/viewvc/llvm-project?rev=48038&view=rev > Log: > Something that kills a super-register also > kills the sub-register. > > Modified: > llvm/trunk/lib/CodeGen/RegisterScavenging.cpp > > Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=48038&r1=48037&r2=48038&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original) > +++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Fri Mar 7 > 17:45:15 2008 > @@ -170,8 +170,7 @@ > // instruction. > for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); > unsigned SubReg = *SubRegs; ++SubRegs) > - if (!RedefinesSuperRegPart(MI, Reg, TRI)) > - ChangedRegs.set(SubReg); > + ChangedRegs.set(SubReg); > } > } > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Fri Mar 7 18:21:29 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 7 Mar 2008 16:21:29 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <13A82D68-6E84-4F1B-B33E-457595FE8C63@apple.com> References: <200803031053.00270.dag@cray.com> <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> <5E772510-8B4F-488A-A7B5-BBECBAE88451@apple.com> <85087762-E617-46B4-BB1E-96582F05A58D@apple.com> <1B24D1D3-3C36-4365-B885-B3DF27D03844@apple.com> <13A82D68-6E84-4F1B-B33E-457595FE8C63@apple.com> Message-ID: <9D07B6BF-4E50-485C-9726-8F9BDFE8ACF3@apple.com> Try running bugpoint without --output= option. Evan On Mar 7, 2008, at 3:52 PM, Dan Gohman wrote: > > On Mar 6, 2008, at 1:45 PM, Evan Cheng wrote: >> >> More annoying is 176.gcc fails with the patch. It's very likely not a >> bug in your patch. But I haven't had the chance to track it down. >> Does >> it work for you? > > I just tried bugpoint on this but bugpoint's reduced testcase didn't > show > the problem :-/. > > Dan > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From gohman at apple.com Fri Mar 7 18:26:02 2008 From: gohman at apple.com (Dan Gohman) Date: Fri, 7 Mar 2008 16:26:02 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <9D07B6BF-4E50-485C-9726-8F9BDFE8ACF3@apple.com> References: <200803031053.00270.dag@cray.com> <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> <5E772510-8B4F-488A-A7B5-BBECBAE88451@apple.com> <85087762-E617-46B4-BB1E-96582F05A58D@apple.com> <1B24D1D3-3C36-4365-B885-B3DF27D03844@apple.com> <13A82D68-6E84-4F1B-B33E-457595FE8C63@apple.com> <9D07B6BF-4E50-485C-9726-8F9BDFE8ACF3@apple.com> Message-ID: <779CEFDD-F778-4AE3-BE5D-729C734E0FD4@apple.com> I didn't use the --output= option.. Dan On Mar 7, 2008, at 4:21 PM, Evan Cheng wrote: > Try running bugpoint without --output= option. > > Evan > > On Mar 7, 2008, at 3:52 PM, Dan Gohman wrote: > >> >> On Mar 6, 2008, at 1:45 PM, Evan Cheng wrote: >>> >>> More annoying is 176.gcc fails with the patch. It's very likely >>> not a >>> bug in your patch. But I haven't had the chance to track it down. >>> Does >>> it work for you? >> >> I just tried bugpoint on this but bugpoint's reduced testcase didn't >> show >> the problem :-/. >> >> Dan >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Fri Mar 7 18:42:25 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Fri, 7 Mar 2008 16:42:25 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <779CEFDD-F778-4AE3-BE5D-729C734E0FD4@apple.com> References: <200803031053.00270.dag@cray.com> <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> <5E772510-8B4F-488A-A7B5-BBECBAE88451@apple.com> <85087762-E617-46B4-BB1E-96582F05A58D@apple.com> <1B24D1D3-3C36-4365-B885-B3DF27D03844@apple.com> <13A82D68-6E84-4F1B-B33E-457595FE8C63@apple.com> <9D07B6BF-4E50-485C-9726-8F9BDFE8ACF3@apple.com> <779CEFDD-F778-4AE3-BE5D-729C734E0FD4@apple.com> Message-ID: <4E26DFB8-329A-4AC0-B1F0-ADA66AA405A5@apple.com> Did you use make Output/176.gcc.diff-llc? I think the makefile rule uses -output. Evan On Mar 7, 2008, at 4:26 PM, Dan Gohman wrote: > I didn't use the --output= option.. > > Dan > > On Mar 7, 2008, at 4:21 PM, Evan Cheng wrote: > >> Try running bugpoint without --output= option. >> >> Evan >> >> On Mar 7, 2008, at 3:52 PM, Dan Gohman wrote: >> >>> >>> On Mar 6, 2008, at 1:45 PM, Evan Cheng wrote: >>>> >>>> More annoying is 176.gcc fails with the patch. It's very likely >>>> not a >>>> bug in your patch. But I haven't had the chance to track it down. >>>> Does >>>> it work for you? >>> >>> I just tried bugpoint on this but bugpoint's reduced testcase didn't >>> show >>> the problem :-/. >>> >>> Dan >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From gohman at apple.com Fri Mar 7 18:49:36 2008 From: gohman at apple.com (Dan Gohman) Date: Fri, 7 Mar 2008 16:49:36 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <4E26DFB8-329A-4AC0-B1F0-ADA66AA405A5@apple.com> References: <200803031053.00270.dag@cray.com> <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> <5E772510-8B4F-488A-A7B5-BBECBAE88451@apple.com> <85087762-E617-46B4-BB1E-96582F05A58D@apple.com> <1B24D1D3-3C36-4365-B885-B3DF27D03844@apple.com> <13A82D68-6E84-4F1B-B33E-457595FE8C63@apple.com> <9D07B6BF-4E50-485C-9726-8F9BDFE8ACF3@apple.com> <779CEFDD-F778-4AE3-BE5D-729C734E0FD4@apple.com> <4E26DFB8-329A-4AC0-B1F0-ADA66AA405A5@apple.com> Message-ID: No, I just ran bugpoint -run-llc manually. Dan On Mar 7, 2008, at 4:42 PM, Evan Cheng wrote: > Did you use make Output/176.gcc.diff-llc? I think the makefile rule > uses -output. > > Evan > > On Mar 7, 2008, at 4:26 PM, Dan Gohman wrote: > >> I didn't use the --output= option.. >> >> Dan >> >> On Mar 7, 2008, at 4:21 PM, Evan Cheng wrote: >> >>> Try running bugpoint without --output= option. >>> >>> Evan >>> >>> On Mar 7, 2008, at 3:52 PM, Dan Gohman wrote: >>> >>>> >>>> On Mar 6, 2008, at 1:45 PM, Evan Cheng wrote: >>>>> >>>>> More annoying is 176.gcc fails with the patch. It's very likely >>>>> not a >>>>> bug in your patch. But I haven't had the chance to track it down. >>>>> Does >>>>> it work for you? >>>> >>>> I just tried bugpoint on this but bugpoint's reduced testcase >>>> didn't >>>> show >>>> the problem :-/. >>>> >>>> Dan >>>> >>>> _______________________________________________ >>>> llvm-commits mailing list >>>> llvm-commits at cs.uiuc.edu >>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Fri Mar 7 18:49:56 2008 From: clattner at apple.com (Chris Lattner) Date: Fri, 7 Mar 2008 16:49:56 -0800 Subject: [llvm-commits] Patch for review: Speeding up ScheduleDAG computations In-Reply-To: <4E26DFB8-329A-4AC0-B1F0-ADA66AA405A5@apple.com> References: <200803031053.00270.dag@cray.com> <6050EB9C-5859-496E-A193-727D23CAF638@apple.com> <5E772510-8B4F-488A-A7B5-BBECBAE88451@apple.com> <85087762-E617-46B4-BB1E-96582F05A58D@apple.com> <1B24D1D3-3C36-4365-B885-B3DF27D03844@apple.com> <13A82D68-6E84-4F1B-B33E-457595FE8C63@apple.com> <9D07B6BF-4E50-485C-9726-8F9BDFE8ACF3@apple.com> <779CEFDD-F778-4AE3-BE5D-729C734E0FD4@apple.com> <4E26DFB8-329A-4AC0-B1F0-ADA66AA405A5@apple.com> Message-ID: On Mar 7, 2008, at 4:42 PM, Evan Cheng wrote: > Did you use make Output/176.gcc.diff-llc? I think the makefile rule > uses -output. More specifically: make bugpoint-llc Should work. When it gets confused, use "cd Output/bugpoint-llc; bugpoint " where the options copied come from whatever 'make bugpoint-llc' does, but without -output. -Chris > > > Evan > > On Mar 7, 2008, at 4:26 PM, Dan Gohman wrote: > >> I didn't use the --output= option.. >> >> Dan >> >> On Mar 7, 2008, at 4:21 PM, Evan Cheng wrote: >> >>> Try running bugpoint without --output= option. >>> >>> Evan >>> >>> On Mar 7, 2008, at 3:52 PM, Dan Gohman wrote: >>> >>>> >>>> On Mar 6, 2008, at 1:45 PM, Evan Cheng wrote: >>>>> >>>>> More annoying is 176.gcc fails with the patch. It's very likely >>>>> not a >>>>> bug in your patch. But I haven't had the chance to track it down. >>>>> Does >>>>> it work for you? >>>> >>>> I just tried bugpoint on this but bugpoint's reduced testcase >>>> didn't >>>> show >>>> the problem :-/. >>>> >>>> Dan >>>> >>>> _______________________________________________ >>>> llvm-commits mailing list >>>> llvm-commits at cs.uiuc.edu >>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Fri Mar 7 18:52:53 2008 From: clattner at apple.com (Chris Lattner) Date: Fri, 7 Mar 2008 16:52:53 -0800 Subject: [llvm-commits] [llvm] r48022 - /llvm/trunk/include/llvm/Instructions.h In-Reply-To: <200803072008.m27K87w5024555@zion.cs.uiuc.edu> References: <200803072008.m27K87w5024555@zion.cs.uiuc.edu> Message-ID: <38929B09-3EF2-47DD-9B28-96EDDA4BDBC6@apple.com> On Mar 7, 2008, at 12:08 PM, Devang Patel wrote: > Author: dpatel > Date: Fri Mar 7 14:08:07 2008 > New Revision: 48022 > > URL: http://llvm.org/viewvc/llvm-project?rev=48022&view=rev > Log: > RetVal is not used when there are more then one return operands. Why not just use 'return getOperand(n);' ? -Chris From evan.cheng at apple.com Fri Mar 7 18:58:38 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Sat, 08 Mar 2008 00:58:38 -0000 Subject: [llvm-commits] [llvm] r48042 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/ test/CodeGen/X86/ Message-ID: <200803080058.m280wdoN000645@zion.cs.uiuc.edu> Author: evancheng Date: Fri Mar 7 18:58:38 2008 New Revision: 48042 URL: http://llvm.org/viewvc/llvm-project?rev=48042&view=rev Log: Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions. Added: llvm/trunk/test/CodeGen/X86/prefetch.ll Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp llvm/trunk/lib/Target/TargetSelectionDAG.td llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86InstrSSE.td Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=48042&r1=48041&r2=48042&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Fri Mar 7 18:58:38 2008 @@ -591,6 +591,11 @@ // TRAP - Trapping instruction TRAP, + // PREFETCH - This corresponds to a prefetch intrinsic. It takes chains are + // their first operand. The other operands are the address to prefetch, + // read / write specifier, and locality specifier. + PREFETCH, + // OUTCHAIN = MEMBARRIER(INCHAIN, load-load, load-store, store-load, // store-store, device) // This corresponds to the memory.barrier intrinsic. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=48042&r1=48041&r2=48042&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Mar 7 18:58:38 2008 @@ -1142,6 +1142,24 @@ } break; + case ISD::PREFETCH: + assert(Node->getNumOperands() == 4 && "Invalid Prefetch node!"); + switch (TLI.getOperationAction(ISD::PREFETCH, MVT::Other)) { + default: assert(0 && "This action is not supported yet!"); + case TargetLowering::Legal: + Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. + Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the address. + Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the rw specifier. + Tmp4 = LegalizeOp(Node->getOperand(3)); // Legalize locality specifier. + Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3, Tmp4); + break; + case TargetLowering::Expand: + // It's a noop. + Result = LegalizeOp(Node->getOperand(0)); + break; + } + break; + case ISD::MEMBARRIER: { assert(Node->getNumOperands() == 6 && "Invalid MemBarrier node!"); switch (TLI.getOperationAction(ISD::MEMBARRIER, MVT::Other)) { Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=48042&r1=48041&r2=48042&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Fri Mar 7 18:58:38 2008 @@ -3788,6 +3788,7 @@ return "<>"; } + case ISD::PREFETCH: return "Prefetch"; case ISD::MEMBARRIER: return "MemBarrier"; case ISD::ATOMIC_LCS: return "AtomicLCS"; case ISD::ATOMIC_LAS: return "AtomicLAS"; Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=48042&r1=48041&r2=48042&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri Mar 7 18:58:38 2008 @@ -2996,10 +2996,6 @@ DAG.setRoot(DAG.getNode(ISD::STACKRESTORE, MVT::Other, getRoot(), Tmp)); return 0; } - case Intrinsic::prefetch: - // FIXME: Currently discarding prefetches. - return 0; - case Intrinsic::var_annotation: // Discard annotate attributes return 0; @@ -3050,6 +3046,16 @@ DAG.setRoot(DAG.getNode(ISD::TRAP, MVT::Other, getRoot())); return 0; } + case Intrinsic::prefetch: { + SDOperand Ops[4]; + Ops[0] = getRoot(); + Ops[1] = getValue(I.getOperand(1)); + Ops[2] = getValue(I.getOperand(2)); + Ops[3] = getValue(I.getOperand(3)); + DAG.setRoot(DAG.getNode(ISD::PREFETCH, MVT::Other, &Ops[0], 4)); + return 0; + } + case Intrinsic::memory_barrier: { SDOperand Ops[6]; Ops[0] = getRoot(); Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=48042&r1=48041&r2=48042&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Fri Mar 7 18:58:38 2008 @@ -211,6 +211,7 @@ setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Expand); setOperationAction(ISD::MEMBARRIER , MVT::Other, Expand); + setOperationAction(ISD::PREFETCH , MVT::Other, Expand); if (!Subtarget->hasV6Ops()) { setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand); Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp?rev=48042&r1=48041&r2=48042&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Fri Mar 7 18:58:38 2008 @@ -117,6 +117,7 @@ setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand); + setOperationAction(ISD::PREFETCH, MVT::Other, Expand); // We want to legalize GlobalAddress and ConstantPool and // ExternalSymbols nodes into the appropriate instructions to Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=48042&r1=48041&r2=48042&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Fri Mar 7 18:58:38 2008 @@ -321,6 +321,7 @@ setOperationAction(ISD::STACKRESTORE , MVT::Other, Expand); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Expand); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64 , Expand); + setOperationAction(ISD::PREFETCH , MVT::Other, Expand); // Cell SPU has instructions for converting between i64 and fp. setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); Modified: llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp?rev=48042&r1=48041&r2=48042&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp Fri Mar 7 18:58:38 2008 @@ -110,6 +110,7 @@ setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand); + setOperationAction(ISD::PREFETCH , MVT::Other, Expand); // Thread Local Storage setOperationAction(ISD::GlobalTLSAddress, MVT::i64, Custom); Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=48042&r1=48041&r2=48042&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Fri Mar 7 18:58:38 2008 @@ -85,6 +85,7 @@ setOperationAction(ISD::MEMSET, MVT::Other, Expand); setOperationAction(ISD::MEMCPY, MVT::Other, Expand); setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand); + setOperationAction(ISD::PREFETCH, MVT::Other, Expand); setOperationAction(ISD::CTPOP, MVT::i32, Expand); setOperationAction(ISD::CTTZ , MVT::i32, Expand); Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=48042&r1=48041&r2=48042&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Fri Mar 7 18:58:38 2008 @@ -82,6 +82,7 @@ setOperationAction(ISD::MEMSET, MVT::Other, Expand); setOperationAction(ISD::MEMCPY, MVT::Other, Expand); setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand); + setOperationAction(ISD::PREFETCH, MVT::Other, Expand); // PowerPC has no SREM/UREM instructions setOperationAction(ISD::SREM, MVT::i32, Expand); Modified: llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp?rev=48042&r1=48041&r2=48042&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp Fri Mar 7 18:58:38 2008 @@ -197,6 +197,7 @@ setOperationAction(ISD::MEMSET, MVT::Other, Expand); setOperationAction(ISD::MEMCPY, MVT::Other, Expand); setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand); + setOperationAction(ISD::PREFETCH, MVT::Other, Expand); setOperationAction(ISD::FSIN , MVT::f64, Expand); setOperationAction(ISD::FCOS , MVT::f64, Expand); Modified: llvm/trunk/lib/Target/TargetSelectionDAG.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetSelectionDAG.td?rev=48042&r1=48041&r2=48042&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetSelectionDAG.td (original) +++ llvm/trunk/lib/Target/TargetSelectionDAG.td Fri Mar 7 18:58:38 2008 @@ -185,7 +185,11 @@ SDTCisEltOfVec<2, 1>, SDTCisSameAs<0, 1>, SDTCisPtrTy<3> ]>; -def STDMemBarrier : SDTypeProfile<0, 5, [ +def STDPrefetch : SDTypeProfile<0, 3, [ // prefetch + SDTCisPtrTy<0>, SDTCisSameAs<1, 2>, SDTCisInt<1> +]>; + +def STDMemBarrier : SDTypeProfile<0, 5, [ // memory barier SDTCisSameAs<0,1>, SDTCisSameAs<0,2>, SDTCisSameAs<0,3>, SDTCisSameAs<0,4>, SDTCisInt<0> ]>; @@ -340,15 +344,20 @@ def ret : SDNode<"ISD::RET" , SDTNone, [SDNPHasChain]>; def trap : SDNode<"ISD::TRAP" , SDTNone, [SDNPHasChain, SDNPSideEffect]>; -def membarrier : SDNode<"ISD::MEMBARRIER" , STDMemBarrier, + +def prefetch : SDNode<"ISD::PREFETCH" , STDPrefetch, + [SDNPHasChain, SDNPMayLoad, SDNPMayStore]>; + +def membarrier : SDNode<"ISD::MEMBARRIER" , STDMemBarrier, [SDNPHasChain, SDNPSideEffect]>; + // Do not use atomic_* directly, use atomic_*_size (see below) -def atomic_lcs : SDNode<"ISD::ATOMIC_LCS", STDAtomic3, - [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; -def atomic_las : SDNode<"ISD::ATOMIC_LAS", STDAtomic2, - [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; +def atomic_lcs : SDNode<"ISD::ATOMIC_LCS" , STDAtomic3, + [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; +def atomic_las : SDNode<"ISD::ATOMIC_LAS" , STDAtomic2, + [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; def atomic_swap : SDNode<"ISD::ATOMIC_SWAP", STDAtomic2, - [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; + [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; // Do not use ld, st directly. Use load, extload, sextload, zextload, store, // and truncst (see below). Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=48042&r1=48041&r2=48042&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Mar 7 18:58:38 2008 @@ -287,6 +287,9 @@ setOperationAction(ISD::MEMSET , MVT::Other, Custom); setOperationAction(ISD::MEMCPY , MVT::Other, Custom); + if (!Subtarget->hasSSE1()) + setOperationAction(ISD::PREFETCH , MVT::Other, Expand); + if (!Subtarget->hasSSE2()) setOperationAction(ISD::MEMBARRIER , MVT::Other, Expand); Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=48042&r1=48041&r2=48042&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Fri Mar 7 18:58:38 2008 @@ -939,12 +939,15 @@ "movmskpd\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (int_x86_sse2_movmsk_pd VR128:$src))]>; -// Prefetching loads. -// TODO: no intrinsics for these? -def PREFETCHT0 : PSI<0x18, MRM1m, (outs), (ins i8mem:$src), "prefetcht0\t$src", []>; -def PREFETCHT1 : PSI<0x18, MRM2m, (outs), (ins i8mem:$src), "prefetcht1\t$src", []>; -def PREFETCHT2 : PSI<0x18, MRM3m, (outs), (ins i8mem:$src), "prefetcht2\t$src", []>; -def PREFETCHNTA : PSI<0x18, MRM0m, (outs), (ins i8mem:$src), "prefetchnta\t$src", []>; +// Prefetch intrinsic. +def PREFETCHT0 : PSI<0x18, MRM1m, (outs), (ins i8mem:$src), + "prefetcht0\t$src", [(prefetch addr:$src, imm, (i32 3))]>; +def PREFETCHT1 : PSI<0x18, MRM2m, (outs), (ins i8mem:$src), + "prefetcht1\t$src", [(prefetch addr:$src, imm, (i32 2))]>; +def PREFETCHT2 : PSI<0x18, MRM3m, (outs), (ins i8mem:$src), + "prefetcht2\t$src", [(prefetch addr:$src, imm, (i32 1))]>; +def PREFETCHNTA : PSI<0x18, MRM0m, (outs), (ins i8mem:$src), + "prefetchnta\t$src", [(prefetch addr:$src, imm, (i32 0))]>; // Non-temporal stores def MOVNTPSmr : PSI<0x2B, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src), Added: llvm/trunk/test/CodeGen/X86/prefetch.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/prefetch.ll?rev=48042&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/prefetch.ll (added) +++ llvm/trunk/test/CodeGen/X86/prefetch.ll Fri Mar 7 18:58:38 2008 @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse1 | grep prefetchnta +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse1 | grep prefetcht0 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse1 | grep prefetcht1 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse1 | grep prefetcht2 + +define void @t(i8* %ptr) nounwind { +entry: + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1 ) + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2 ) + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 ) + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 0 ) + ret void +} + +declare void @llvm.prefetch(i8*, i32, i32) nounwind From echristo at apple.com Fri Mar 7 19:02:40 2008 From: echristo at apple.com (Eric Christopher) Date: Fri, 7 Mar 2008 17:02:40 -0800 Subject: [llvm-commits] [llvm] r48042 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/ test/CodeGen/X86/ In-Reply-To: <200803080058.m280wdoN000645@zion.cs.uiuc.edu> References: <200803080058.m280wdoN000645@zion.cs.uiuc.edu> Message-ID: On Mar 7, 2008, at 4:58 PM, Evan Cheng wrote: > Implement x86 support for @llvm.prefetch. It corresponds to > prefetcht{0|1|2} and prefetchnta instructions. Nifty, this hooked into __builtin_prefetch ? -eric From dpatel at apple.com Fri Mar 7 19:08:42 2008 From: dpatel at apple.com (Devang Patel) Date: Fri, 7 Mar 2008 17:08:42 -0800 Subject: [llvm-commits] [llvm] r48022 - /llvm/trunk/include/llvm/Instructions.h In-Reply-To: <38929B09-3EF2-47DD-9B28-96EDDA4BDBC6@apple.com> References: <200803072008.m27K87w5024555@zion.cs.uiuc.edu> <38929B09-3EF2-47DD-9B28-96EDDA4BDBC6@apple.com> Message-ID: On Mar 7, 2008, at 4:52 PM, Chris Lattner wrote: > > On Mar 7, 2008, at 12:08 PM, Devang Patel wrote: > >> Author: dpatel >> Date: Fri Mar 7 14:08:07 2008 >> New Revision: 48022 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=48022&view=rev >> Log: >> RetVal is not used when there are more then one return operands. > > Why not just use 'return getOperand(n);' ? yeah, I should override getOperand() to check RetVal optimization for most common cases and use it directly here. - Devang From clattner at apple.com Fri Mar 7 19:09:32 2008 From: clattner at apple.com (Chris Lattner) Date: Fri, 7 Mar 2008 17:09:32 -0800 Subject: [llvm-commits] [llvm] r48042 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/ test/CodeGen/X86/ In-Reply-To: <200803080058.m280wdoN000645@zion.cs.uiuc.edu> References: <200803080058.m280wdoN000645@zion.cs.uiuc.edu> Message-ID: <224CDB92-7395-4607-BF95-9CDDEB08241E@apple.com> On Mar 7, 2008, at 4:58 PM, Evan Cheng wrote: > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Fri Mar 7 > 18:58:38 2008 > @@ -211,6 +211,7 @@ > setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); > setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Expand); > setOperationAction(ISD::MEMBARRIER , MVT::Other, Expand); > + setOperationAction(ISD::PREFETCH , MVT::Other, Expand); Instead of setting PREFETCH to expand for every target, how about setting it to expand in the TargetISelLowering base class, and having the X86 target set it to legal? For things that are illegal on most targets, I think it's a better way to go. -Chris From clattner at apple.com Fri Mar 7 19:19:49 2008 From: clattner at apple.com (Chris Lattner) Date: Fri, 7 Mar 2008 17:19:49 -0800 Subject: [llvm-commits] [llvm] r48020 - in /llvm/trunk: lib/Transforms/Utils/InlineFunction.cpp test/Transforms/SRETPromotion/2008-03-07-Inline-2.ll test/Transforms/SRETPromotion/2008-03-07-Inline.ll In-Reply-To: <200803072006.m27K6HTV024490@zion.cs.uiuc.edu> References: <200803072006.m27K6HTV024490@zion.cs.uiuc.edu> Message-ID: <9076283F-386F-4290-8503-DFF53FBC5F8B@apple.com> On Mar 7, 2008, at 12:06 PM, Devang Patel wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=48020&view=rev > Log: > Update inliner to handle functions that return multiple values. Nice. > @@ -0,0 +1,46 @@ > +; RUN: llvm-as < %s | opt -inline -sretpromotion -disable-output Again, your test should only be for the inliner, not both passes. > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original) > +++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Fri Mar 7 > 14:06:16 2008 > > // Handle all of the return instructions that we just cloned in, > and eliminate > // any users of the original call/invoke instruction. > - if (Returns.size() > 1) { > + if (!Returns.empty()) { You are (apparently, I may be mistaken) dropping an important optimization here. When a function only has a single return, we don't want the inliner to turn: ... call foo() ... into: ... somestuff br label x x: ... This increases the apparent inlining cost of the resultant code and is slow. Please don't lose this. The trick here is that you can't insert a phi node into the middle of the block, even if it's a single entry one. Not doing this optimization for multiple return calls would be fine. > // The PHI node should go at the front of the new basic block to > merge all > // possible incoming values. > + SmallVector PHIs; > if (!TheCall->use_empty()) { > + const Type *RTy = CalledFunc->getReturnType(); > + if (const StructType *STy = dyn_cast(RTy)) { > + unsigned NumRetVals = STy->getNumElements(); > + // Create new phi nodes such that phi node number in the > PHIs vector > + // match corresponding return value operand number. > + for (unsigned i = 0; i < NumRetVals; ++i) { > + PHINode *PHI = new PHINode(STy->getElementType(i), > + TheCall->getName(), > AfterCallBB->begin()); I'd suggest naming these things 'TheCall->getName()+"."+utostr(i)'. Also, you're inserting the phi nodes in backwards order (the block will have rv3,rv2,rv1,rv0 in that order) which is not a functionality issue but will make the ir be a bit strange looking. > > + PHIs.push_back(PHI); > + } > + // TheCall results are used by GetResult instructions. > + while (!TheCall->use_empty()) { > + GetResultInst *GR = cast(TheCall- > >use_back()); > + GR->replaceAllUsesWith(PHIs[GR->getIndex()]); > + GR->eraseFromParent(); Nice. > + // Loop over all of the return instructions adding entries to > the PHI node as > // appropriate. > + if (!PHIs.empty()) { > + const Type *RTy = CalledFunc->getReturnType(); > + if (const StructType *STy = dyn_cast(RTy)) { I don't think you need to distinguish between the multiple return and scalar return case here. Just loop over all the elements of Returns, and then loop over all their operands. > - // Add a branch to the merge point where the PHI node lives > if it exists. > + // Add a branch to the merge points and remove retrun > instructions. > + for (unsigned i = 0, e = Returns.size(); i != e; ++i) { > + ReturnInst *RI = Returns[i]; > new BranchInst(AfterCallBB, RI); > RI->getParent()->getInstList().erase(RI); > } How about RI->eraseFromParent(); -Chris From clattner at apple.com Fri Mar 7 19:27:13 2008 From: clattner at apple.com (Chris Lattner) Date: Fri, 7 Mar 2008 17:27:13 -0800 Subject: [llvm-commits] [llvm] r47965 - /llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp In-Reply-To: <200803052150.m25LoVNY025963@zion.cs.uiuc.edu> References: <200803052150.m25LoVNY025963@zion.cs.uiuc.edu> Message-ID: <212CF4AC-4D42-47C1-B99C-2B6D40B97AB1@apple.com> On Mar 5, 2008, at 1:50 PM, Devang Patel wrote: > Author: dpatel > Log: > Handle 'ret' with multiple values. > > > - PHINode *PN = 0; > - if (F.getReturnType() != Type::VoidTy) { > + SmallVector Phis; > + unsigned NumRetVals = ReturningBlocks[0]->getTerminator()- > >getNumOperands(); > + if (NumRetVals == 0) > + new ReturnInst(NULL, NewRetBlock); Ok. > + else if (const StructType *STy = > dyn_cast(F.getReturnType())) { > + for (unsigned i = 0; i < NumRetVals; ++i) { > + PHINode *PN = new PHINode(STy->getElementType(i), > "UnifiedRetVal"); > + NewRetBlock->getInstList().push_back(PN); > + Phis.push_back(PN); > + } > + new ReturnInst(&Phis[0], NumRetVals); This loop is not specific to multiple return case. It would work just as well for the single return case. Please remove the check for StructType. Also, you can specify the insertion point directly in the phi node, to avoid the getInstList().push_back. As with the inliner, you should use more specific names "UnifiedRetVal.42" if possible, and insert in forward order instead of backwards. -Chris From dpatel at apple.com Fri Mar 7 19:30:07 2008 From: dpatel at apple.com (Devang Patel) Date: Fri, 7 Mar 2008 17:30:07 -0800 Subject: [llvm-commits] [llvm] r48020 - in /llvm/trunk: lib/Transforms/Utils/InlineFunction.cpp test/Transforms/SRETPromotion/2008-03-07-Inline-2.ll test/Transforms/SRETPromotion/2008-03-07-Inline.ll In-Reply-To: <9076283F-386F-4290-8503-DFF53FBC5F8B@apple.com> References: <200803072006.m27K6HTV024490@zion.cs.uiuc.edu> <9076283F-386F-4290-8503-DFF53FBC5F8B@apple.com> Message-ID: On Mar 7, 2008, at 5:19 PM, Chris Lattner wrote: > On Mar 7, 2008, at 12:06 PM, Devang Patel wrote: >> URL: http://llvm.org/viewvc/llvm-project?rev=48020&view=rev >> Log: >> Update inliner to handle functions that return multiple values. > > Nice. > >> @@ -0,0 +1,46 @@ >> +; RUN: llvm-as < %s | opt -inline -sretpromotion -disable-output > > Again, your test should only be for the inliner, not both passes. ok >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original) >> +++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Fri Mar 7 >> 14:06:16 2008 >> >> // Handle all of the return instructions that we just cloned in, >> and eliminate >> // any users of the original call/invoke instruction. >> - if (Returns.size() > 1) { >> + if (!Returns.empty()) { > > You are (apparently, I may be mistaken) dropping an important > optimization here. You're not mistaken. I expect simplification pass to merge the block easily, but did not realize that extra br and one additional block can have significant impact on inlining cost. I'll restore this. > When a function only has a single return, we don't > want the inliner to turn: > > ... > call foo() > ... > > into: > > ... > somestuff > br label x > > x: > ... > > This increases the apparent inlining cost of the resultant code and is > slow. Please don't lose this. The trick here is that you can't > insert a phi node into the middle of the block, even if it's a single > entry one. Not doing this optimization for multiple return calls > would be fine. > >> // The PHI node should go at the front of the new basic block to >> merge all >> // possible incoming values. >> + SmallVector PHIs; >> if (!TheCall->use_empty()) { >> + const Type *RTy = CalledFunc->getReturnType(); >> + if (const StructType *STy = dyn_cast(RTy)) { >> + unsigned NumRetVals = STy->getNumElements(); >> + // Create new phi nodes such that phi node number in the >> PHIs vector >> + // match corresponding return value operand number. >> + for (unsigned i = 0; i < NumRetVals; ++i) { >> + PHINode *PHI = new PHINode(STy->getElementType(i), >> + TheCall->getName(), >> AfterCallBB->begin()); > > I'd suggest naming these things 'TheCall->getName()+"."+utostr(i)'. ok > Also, you're inserting the phi nodes in backwards order (the block > will have rv3,rv2,rv1,rv0 in that order) which is not a functionality > issue but will make the ir be a bit strange looking. I already noticed that :) I'll restore natural order. > > >> >> + PHIs.push_back(PHI); >> + } >> + // TheCall results are used by GetResult instructions. >> + while (!TheCall->use_empty()) { >> + GetResultInst *GR = cast(TheCall- >>> use_back()); >> + GR->replaceAllUsesWith(PHIs[GR->getIndex()]); >> + GR->eraseFromParent(); > > Nice. > >> + // Loop over all of the return instructions adding entries to >> the PHI node as >> // appropriate. >> + if (!PHIs.empty()) { >> + const Type *RTy = CalledFunc->getReturnType(); >> + if (const StructType *STy = dyn_cast(RTy)) { > > I don't think you need to distinguish between the multiple return and > scalar return case here. Just loop over all the elements of Returns, > and then loop over all their operands. ok >> - // Add a branch to the merge point where the PHI node lives >> if it exists. >> + // Add a branch to the merge points and remove retrun >> instructions. >> + for (unsigned i = 0, e = Returns.size(); i != e; ++i) { >> + ReturnInst *RI = Returns[i]; >> new BranchInst(AfterCallBB, RI); >> RI->getParent()->getInstList().erase(RI); >> } > > How about RI->eraseFromParent(); good idea! - Devang From dpatel at apple.com Fri Mar 7 19:30:59 2008 From: dpatel at apple.com (Devang Patel) Date: Fri, 7 Mar 2008 17:30:59 -0800 Subject: [llvm-commits] [llvm] r47965 - /llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp In-Reply-To: <212CF4AC-4D42-47C1-B99C-2B6D40B97AB1@apple.com> References: <200803052150.m25LoVNY025963@zion.cs.uiuc.edu> <212CF4AC-4D42-47C1-B99C-2B6D40B97AB1@apple.com> Message-ID: On Mar 7, 2008, at 5:27 PM, Chris Lattner wrote: >> + else if (const StructType *STy = >> dyn_cast(F.getReturnType())) { >> + for (unsigned i = 0; i < NumRetVals; ++i) { >> + PHINode *PN = new PHINode(STy->getElementType(i), >> "UnifiedRetVal"); >> + NewRetBlock->getInstList().push_back(PN); >> + Phis.push_back(PN); >> + } >> + new ReturnInst(&Phis[0], NumRetVals); > > This loop is not specific to multiple return case. It would work just > as well for the single return case. Please remove the check for > StructType. > > Also, you can specify the insertion point directly in the phi node, to > avoid the getInstList().push_back. As with the inliner, you should > use more specific names "UnifiedRetVal.42" if possible, and insert in > forward order instead of backwards. OK - Devang From dpatel at apple.com Fri Mar 7 19:37:56 2008 From: dpatel at apple.com (Devang Patel) Date: Fri, 7 Mar 2008 17:37:56 -0800 Subject: [llvm-commits] [llvm] r47965 - /llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp In-Reply-To: References: <200803052150.m25LoVNY025963@zion.cs.uiuc.edu> <212CF4AC-4D42-47C1-B99C-2B6D40B97AB1@apple.com> Message-ID: On Mar 7, 2008, at 5:30 PM, Devang Patel wrote: > On Mar 7, 2008, at 5:27 PM, Chris Lattner wrote: > >>> + else if (const StructType *STy = >>> dyn_cast(F.getReturnType())) { >>> + for (unsigned i = 0; i < NumRetVals; ++i) { >>> + PHINode *PN = new PHINode(STy->getElementType(i), >>> "UnifiedRetVal"); >>> + NewRetBlock->getInstList().push_back(PN); >>> + Phis.push_back(PN); >>> + } >>> + new ReturnInst(&Phis[0], NumRetVals); >> >> This loop is not specific to multiple return case. It would work >> just >> as well for the single return case. Please remove the check for >> StructType. hmm.. need StructType check to get individual struct element types. - Devang From dalej at apple.com Fri Mar 7 19:41:42 2008 From: dalej at apple.com (Dale Johannesen) Date: Sat, 08 Mar 2008 01:41:42 -0000 Subject: [llvm-commits] [llvm] r48043 - /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200803080141.m281fhdC001835@zion.cs.uiuc.edu> Author: johannes Date: Fri Mar 7 19:41:42 2008 New Revision: 48043 URL: http://llvm.org/viewvc/llvm-project?rev=48043&view=rev Log: More ppc32 byval handling (bug fixes). Things are looking pretty good now. Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=48043&r1=48042&r2=48043&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Fri Mar 7 19:41:42 2008 @@ -1375,16 +1375,36 @@ // FIXME the codegen can be much improved in some cases. // We do not have to keep everything in memory. if (isByVal) { - // Double word align in ELF - if (Expand && isELF32_ABI) GPR_idx += (GPR_idx % 2); // ObjSize is the true size, ArgSize rounded up to multiple of registers. ObjSize = (Flags & ISD::ParamFlags::ByValSize) >> ISD::ParamFlags::ByValSizeOffs; ArgSize = ((ObjSize + PtrByteSize - 1)/PtrByteSize) * PtrByteSize; + // Double word align in ELF + if (Expand && isELF32_ABI) GPR_idx += (GPR_idx % 2); + // Objects of size 1 and 2 are right justified, everything else is + // left justified. This means the memory address is adjusted forwards. + if (ObjSize==1 || ObjSize==2) { + CurArgOffset = CurArgOffset + (4 - ObjSize); + } // The value of the object is its address. int FI = MFI->CreateFixedObject(ObjSize, CurArgOffset); SDOperand FIN = DAG.getFrameIndex(FI, PtrVT); ArgValues.push_back(FIN); + if (ObjSize==1 || ObjSize==2) { + if (GPR_idx != Num_GPR_Regs) { + unsigned VReg = RegInfo.createVirtualRegister(&PPC::GPRCRegClass); + RegInfo.addLiveIn(GPR[GPR_idx], VReg); + SDOperand Val = DAG.getCopyFromReg(Root, VReg, PtrVT); + SDOperand Store = DAG.getTruncStore(Val.getValue(1), Val, FIN, + NULL, 0, ObjSize==1 ? MVT::i8 : MVT::i16 ); + MemOps.push_back(Store); + ++GPR_idx; + if (isMachoABI) ArgOffset += PtrByteSize; + } else { + ArgOffset += PtrByteSize; + } + continue; + } for (unsigned j = 0; j < ArgSize; j += PtrByteSize) { // Store whatever pieces of the object are in registers // to memory. ArgVal will be address of the beginning of @@ -1678,7 +1698,7 @@ if (Flags & ISD::ParamFlags::ByVal) ArgSize = (Flags & ISD::ParamFlags::ByValSize) >> ISD::ParamFlags::ByValSizeOffs; - ArgSize = std::max(ArgSize, PtrByteSize); + ArgSize = ((ArgSize + PtrByteSize - 1)/PtrByteSize) * PtrByteSize; NumBytes += ArgSize; } From gohman at apple.com Fri Mar 7 19:43:56 2008 From: gohman at apple.com (Dan Gohman) Date: Sat, 08 Mar 2008 01:43:56 -0000 Subject: [llvm-commits] [llvm] r48044 - in /llvm/trunk: include/llvm/Pass.h lib/VMCore/Pass.cpp Message-ID: <200803080143.m281huBL001909@zion.cs.uiuc.edu> Author: djg Date: Fri Mar 7 19:43:56 2008 New Revision: 48044 URL: http://llvm.org/viewvc/llvm-project?rev=48044&view=rev Log: Remove unused runPass methods. Modified: llvm/trunk/include/llvm/Pass.h llvm/trunk/lib/VMCore/Pass.cpp Modified: llvm/trunk/include/llvm/Pass.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Pass.h?rev=48044&r1=48043&r2=48044&view=diff ============================================================================== --- llvm/trunk/include/llvm/Pass.h (original) +++ llvm/trunk/include/llvm/Pass.h Fri Mar 7 19:43:56 2008 @@ -102,12 +102,6 @@ /// const PassInfo *getPassInfo() const; - /// runPass - Run this pass, returning true if a modification was made to the - /// module argument. This should be implemented by all concrete subclasses. - /// - virtual bool runPass(Module &M) { return false; } - virtual bool runPass(BasicBlock&) { return false; } - /// print - Print out the internal state of the pass. This is called by /// Analyze to print out the contents of an analysis. Otherwise it is not /// necessary to implement this method. Beware that the module pointer MAY be @@ -230,9 +224,6 @@ /// being operated on. virtual bool runOnModule(Module &M) = 0; - virtual bool runPass(Module &M) { return runOnModule(M); } - virtual bool runPass(BasicBlock&) { return false; } - virtual void assignPassManager(PMStack &PMS, PassManagerType T = PMT_ModulePassManager); @@ -371,12 +362,6 @@ // bool runOnFunction(Function &F); - /// To run directly on the basic block, we initialize, runOnBasicBlock, then - /// finalize. - /// - virtual bool runPass(Module &M) { return false; } - virtual bool runPass(BasicBlock &BB); - virtual void assignPassManager(PMStack &PMS, PassManagerType T = PMT_BasicBlockPassManager); Modified: llvm/trunk/lib/VMCore/Pass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Pass.cpp?rev=48044&r1=48043&r2=48044&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Pass.cpp (original) +++ llvm/trunk/lib/VMCore/Pass.cpp Fri Mar 7 19:43:56 2008 @@ -112,20 +112,6 @@ return Changed | doFinalization(F); } -// To run directly on the basic block, we initialize, runOnBasicBlock, then -// finalize. -// -bool BasicBlockPass::runPass(BasicBlock &BB) { - Function &F = *BB.getParent(); - Module &M = *F.getParent(); - bool Changed = doInitialization(M); - Changed |= doInitialization(F); - Changed |= runOnBasicBlock(BB); - Changed |= doFinalization(F); - Changed |= doFinalization(M); - return Changed; -} - //===----------------------------------------------------------------------===// // Pass Registration mechanism // From clattner at apple.com Fri Mar 7 19:49:29 2008 From: clattner at apple.com (Chris Lattner) Date: Fri, 7 Mar 2008 17:49:29 -0800 Subject: [llvm-commits] [llvm] r47965 - /llvm/trunk/lib/Transforms/Utils/UnifyFunctionExitNodes.cpp In-Reply-To: References: <200803052150.m25LoVNY025963@zion.cs.uiuc.edu> <212CF4AC-4D42-47C1-B99C-2B6D40B97AB1@apple.com> Message-ID: On Mar 7, 2008, at 5:37 PM, Devang Patel wrote: > > On Mar 7, 2008, at 5:30 PM, Devang Patel wrote: > >> On Mar 7, 2008, at 5:27 PM, Chris Lattner wrote: >> >>>> + else if (const StructType *STy = >>>> dyn_cast(F.getReturnType())) { >>>> + for (unsigned i = 0; i < NumRetVals; ++i) { >>>> + PHINode *PN = new PHINode(STy->getElementType(i), >>>> "UnifiedRetVal"); >>>> + NewRetBlock->getInstList().push_back(PN); >>>> + Phis.push_back(PN); >>>> + } >>>> + new ReturnInst(&Phis[0], NumRetVals); >>> >>> This loop is not specific to multiple return case. It would work >>> just >>> as well for the single return case. Please remove the check for >>> StructType. > > hmm.. need StructType check to get individual struct element types. Ah, you're right, disregard then! -Chris From alenhar2 at cs.uiuc.edu Fri Mar 7 20:05:23 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Sat, 08 Mar 2008 02:05:23 -0000 Subject: [llvm-commits] [llvm] r48045 - in /llvm/trunk/test/Linker: 2008-03-07-DroppedSection_a.ll 2008-03-07-DroppedSection_b.ll Message-ID: <200803080205.m2825Nc6002507@zion.cs.uiuc.edu> Author: alenhar2 Date: Fri Mar 7 20:05:22 2008 New Revision: 48045 URL: http://llvm.org/viewvc/llvm-project?rev=48045&view=rev Log: much simpler test case Modified: llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll llvm/trunk/test/Linker/2008-03-07-DroppedSection_b.ll Modified: llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll?rev=48045&r1=48044&r2=48045&view=diff ============================================================================== --- llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll (original) +++ llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll Fri Mar 7 20:05:22 2008 @@ -6,328 +6,6 @@ ; ModuleID = 't.bc' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i686-pc-linux-gnu" - %struct.ViceFid = type { i32, i32, i32 } - %struct.__kernel_fsid_t = type { [2 x i32] } - %struct.address_space = type { %struct.list_head, %struct.list_head, %struct.list_head, i32, %struct.address_space_operations*, %struct.inode*, %struct.vm_area_struct*, %struct.vm_area_struct*, %struct.reiserfs_proc_info_data_t, i32 } - %struct.address_space_operations = type { i32 (%struct.page*)*, i32 (%struct.file*, %struct.page*)*, i32 (%struct.page*)*, i32 (%struct.file*, %struct.page*, i32, i32)*, i32 (%struct.file*, %struct.page*, i32, i32)*, i32 (%struct.address_space*, i32)*, i32 (%struct.page*, i32)*, i32 (%struct.page*, i32)*, i32 (i32, %struct.inode*, %struct.kiobuf*, i32, i32)*, i32 (i32, %struct.file*, %struct.kiobuf*, i32, i32)*, void (%struct.page*)* } - %struct.affs_bm_info = type { i32, i32 } - %struct.atomic_t = type { i32 } - %struct.block_device = type { %struct.list_head, %struct.atomic_t, %struct.inode*, i16, i32, %struct.block_device_operations*, %struct.semaphore, %struct.list_head } - %struct.block_device_operations = type { i32 (%struct.inode*, %struct.file*)*, i32 (%struct.inode*, %struct.file*)*, i32 (%struct.inode*, %struct.file*, i32, i32)*, i32 (i16)*, i32 (i16)*, %struct.module* } - %struct.buffer_head = type { %struct.buffer_head*, i32, i16, i16, i16, %struct.atomic_t, i16, i32, i32, %struct.buffer_head*, %struct.buffer_head*, %struct.buffer_head*, %struct.buffer_head*, %struct.buffer_head**, i8*, %struct.page*, void (%struct.buffer_head*, i32)*, i8*, i32, %struct.wait_queue_head_t, %struct.list_head } - %struct.char_device = type { %struct.list_head, %struct.atomic_t, i16, %struct.atomic_t, %struct.semaphore } - %struct.completion = type { i32, %struct.wait_queue_head_t } - %struct.dentry = type { %struct.atomic_t, i32, %struct.inode*, %struct.dentry*, %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, i32, %struct.qstr, i32, %struct.dentry_operations*, %struct.super_block*, i32, i8*, [16 x i8] } - %struct.dentry_operations = type { i32 (%struct.dentry*, i32)*, i32 (%struct.dentry*, %struct.qstr*)*, i32 (%struct.dentry*, %struct.qstr*, %struct.qstr*)*, i32 (%struct.dentry*)*, void (%struct.dentry*)*, void (%struct.dentry*, %struct.inode*)* } - %struct.dnotify_struct = type { %struct.dnotify_struct*, i32, i32, %struct.file*, %struct.files_struct* } - %struct.dquot = type { %struct.list_head, %struct.list_head, %struct.list_head, %struct.wait_queue_head_t, %struct.wait_queue_head_t, i32, i32, %struct.super_block*, i32, i16, i64, i16, i16, i32, %struct.mem_dqblk } - %struct.dquot_operations = type { void (%struct.inode*, i32)*, void (%struct.inode*)*, i32 (%struct.inode*, i64, i32)*, i32 (%struct.inode*, i32)*, void (%struct.inode*, i64)*, void (%struct.inode*, i32)*, i32 (%struct.inode*, %struct.iattr*)*, i32 (%struct.dquot*)* } - %struct.e820entry = type { i64, i64, i32 } - %struct.exec_domain = type { i8*, void (i32, %struct.pt_regs*)*, i8, i8, i32*, i32*, %struct.map_segment*, %struct.map_segment*, %struct.map_segment*, %struct.map_segment*, %struct.module*, %struct.exec_domain* } - %struct.fasync_struct = type { i32, i32, %struct.fasync_struct*, %struct.file* } - %struct.fd_set = type { [32 x i32] } - %struct.file = type { %struct.list_head, %struct.dentry*, %struct.vfsmount*, %struct.file_operations*, %struct.atomic_t, i32, i16, i64, i32, i32, i32, i32, i32, %struct.fown_struct, i32, i32, i32, i32, i8*, %struct.kiobuf*, i32 } - %struct.file_lock = type { %struct.file_lock*, %struct.list_head, %struct.list_head, %struct.files_struct*, i32, %struct.wait_queue_head_t, %struct.file*, i8, i8, i64, i64, void (%struct.file_lock*)*, void (%struct.file_lock*)*, void (%struct.file_lock*)*, %struct.fasync_struct*, i32, { %struct.nfs_lock_info } } - %struct.file_operations = type { %struct.module*, i64 (%struct.file*, i64, i32)*, i32 (%struct.file*, i8*, i32, i64*)*, i32 (%struct.file*, i8*, i32, i64*)*, i32 (%struct.file*, i8*, i32 (i8*, i8*, i32, i64, i32, i32)*)*, i32 (%struct.file*, %struct.poll_table_struct*)*, i32 (%struct.inode*, %struct.file*, i32, i32)*, i32 (%struct.file*, %struct.vm_area_struct*)*, i32 (%struct.inode*, %struct.file*)*, i32 (%struct.file*)*, i32 (%struct.inode*, %struct.file*)*, i32 (%struct.file*, %struct.dentry*, i32)*, i32 (i32, %struct.file*, i32)*, i32 (%struct.file*, i32, %struct.file_lock*)*, i32 (%struct.file*, %struct.iovec*, i32, i64*)*, i32 (%struct.file*, %struct.iovec*, i32, i64*)*, i32 (%struct.file*, %struct.page*, i32, i32, i64*, i32)*, i32 (%struct.file*, i32, i32, i32, i32)* } - %struct.file_system_type = type { i8*, i32, %struct.super_block* (%struct.super_block*, i8*, i32)*, %struct.module*, %struct.file_system_type*, %struct.list_head } - %struct.files_struct = type { %struct.atomic_t, %struct.reiserfs_proc_info_data_t, i32, i32, i32, %struct.file**, %struct.fd_set*, %struct.fd_set*, %struct.fd_set, %struct.fd_set, [32 x %struct.file*] } - %struct.fown_struct = type { i32, i32, i32, i32 } - %struct.fs_disk_quota = type { i8, i8, i16, i32, i64, i64, i64, i64, i64, i64, i32, i32, i16, i16, i32, i64, i64, i64, i32, i16, i16, [8 x i8] } - %struct.fs_quota_stat = type { i8, i16, i8, %struct.e820entry, %struct.e820entry, i32, i32, i32, i32, i16, i16 } - %struct.fs_struct = type { %struct.atomic_t, %struct.reiserfs_proc_info_data_t, i32, %struct.dentry*, %struct.dentry*, %struct.dentry*, %struct.vfsmount*, %struct.vfsmount*, %struct.vfsmount* } - %struct.i387_fsave_struct = type { i32, i32, i32, i32, i32, i32, i32, [20 x i32], i32 } - %struct.i387_fxsave_struct = type { i16, i16, i16, i16, i32, i32, i32, i32, i32, i32, [32 x i32], [32 x i32], [56 x i32] } - %struct.i387_union = type { %struct.i387_fxsave_struct } - %struct.iattr = type { i32, i16, i32, i32, i64, i32, i32, i32, i32 } - %struct.if_dqblk = type { i64, i64, i64, i64, i64, i64, i64, i64, i32 } - %struct.if_dqinfo = type { i64, i64, i32, i32 } - %struct.inode = type { %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, i32, %struct.atomic_t, i16, i16, i16, i32, i32, i16, i64, i32, i32, i32, i32, i32, i32, i32, i16, %struct.semaphore, %struct.rw_semaphore, %struct.semaphore, %struct.inode_operations*, %struct.file_operations*, %struct.super_block*, %struct.wait_queue_head_t, %struct.file_lock*, %struct.address_space*, %struct.address_space, [2 x %struct.dquot*], %struct.list_head, %struct.pipe_inode_info*, %struct.block_device*, %struct.char_device*, i32, %struct.dnotify_struct*, i32, i32, i8, %struct.atomic_t, i32, i32, { %struct.nfs_inode_info } } - %struct.inode_operations = type { i32 (%struct.inode*, %struct.dentry*, i32)*, %struct.dentry* (%struct.inode*, %struct.dentry*)*, i32 (%struct.dentry*, %struct.inode*, %struct.dentry*)*, i32 (%struct.inode*, %struct.dentry*)*, i32 (%struct.inode*, %struct.dentry*, i8*)*, i32 (%struct.inode*, %struct.dentry*, i32)*, i32 (%struct.inode*, %struct.dentry*)*, i32 (%struct.inode*, %struct.dentry*, i32, i32)*, i32 (%struct.inode*, %struct.dentry*, %struct.inode*, %struct.dentry*)*, i32 (%struct.dentry*, i8*, i32)*, i32 (%struct.dentry*, %struct.nameidata*)*, void (%struct.inode*)*, i32 (%struct.inode*, i32)*, i32 (%struct.dentry*)*, i32 (%struct.dentry*, %struct.iattr*)*, i32 (%struct.dentry*, %struct.iattr*)*, i32 (%struct.dentry*, i8*, i8*, i32, i32)*, i32 (%struct.dentry*, i8*, i8*, i32)*, i32 (%struct.dentry*, i8*, i32)*, i32 (%struct.dentry*, i8*)* } - %struct.iovec = type { i8*, i32 } - %struct.k_sigaction = type { %struct.sigaction } - %struct.kern_ipc_perm = type { i32, i32, i32, i32, i32, i16, i32 } - %struct.kiobuf = type opaque - %struct.linux_binfmt = type { %struct.linux_binfmt*, %struct.module*, i32 (%struct.linux_binprm*, %struct.pt_regs*)*, i32 (%struct.file*)*, i32 (i32, %struct.pt_regs*, %struct.file*)*, i32, i32 (%struct.linux_binprm*, i8*)* } - %struct.linux_binprm = type { [128 x i8], [32 x %struct.page*], i32, i32, %struct.file*, i32, i32, i32, i32, i32, i32, i32, i8*, i32, i32 } - %struct.list_head = type { %struct.list_head*, %struct.list_head* } - %struct.llva_fp_state_t = type { [7 x i32], [20 x i32] } - %struct.llva_icontext_t = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, i32 } - %struct.llva_sigcontext = type { %struct.llva_icontext_t, %struct.llva_fp_state_t, i32, i32, i32, i32, [1 x i32], i8* } - %struct.map_segment = type opaque - %struct.mem_dqblk = type { i32, i32, i64, i32, i32, i32, i32, i32 } - %struct.mem_dqinfo = type { %struct.quota_format_type*, i32, i32, i32, { %struct.ViceFid } } - %struct.mm_struct = type <{ %struct.vm_area_struct*, %struct.rb_root_t, %struct.vm_area_struct*, %struct.atomic_t*, %struct.atomic_t, %struct.atomic_t, i32, %struct.rw_semaphore, %struct.reiserfs_proc_info_data_t, %struct.list_head, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], %struct.iovec }> - %struct.module = type { i32, %struct.module*, i8*, i32, { %struct.atomic_t }, i32, i32, i32, %struct.module_symbol*, %struct.module_ref*, %struct.module_ref*, i32 ()*, void ()*, %struct.affs_bm_info*, %struct.affs_bm_info*, %struct.module_persist*, %struct.module_persist*, i32 ()*, i32, i8*, i8*, i8*, i8*, i8* } - %struct.module_persist = type opaque - %struct.module_ref = type { %struct.module*, %struct.module*, %struct.module_ref* } - %struct.module_symbol = type { i32, i8* } - %struct.nameidata = type { %struct.dentry*, %struct.vfsmount*, %struct.qstr, i32, i32 } - %struct.namespace = type opaque - %struct.ncp_mount_data_kernel = type { i32, i32, i32, i32, i32, i32, i32, [17 x i8], i32, i32, i16, i16 } - %struct.ncp_server = type { %struct.ncp_mount_data_kernel, [258 x i8], %struct.file*, i8, i8, i16, i8, i8, i32, i32, i32, i8*, i32, %struct.semaphore, i32, i32, i32, i32, i32, i32, [8 x i8], [16 x i8], { i32, i32, i8*, i32 }, %struct.module_symbol, %struct.nls_table*, %struct.nls_table*, i32, i32 } - %struct.nfs_fh = type { i16, [64 x i8] } - %struct.nfs_inode_info = type { i64, %struct.nfs_fh, i16, i32, i64, i64, i64, i32, i32, i32, [2 x i32], %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, i32, i32, i32, i32, %struct.rpc_cred* } - %struct.nfs_lock_info = type { i32, i32, %struct.nlm_host* } - %struct.nlm_host = type opaque - %struct.nls_table = type opaque - %struct.page = type { %struct.list_head, %struct.address_space*, i32, %struct.page*, %struct.atomic_t, i32, %struct.list_head, %struct.page**, %struct.buffer_head* } - %struct.pipe_inode_info = type { %struct.wait_queue_head_t, i8*, i32, i32, i32, i32, i32, i32, i32, i32 } - %struct.poll_table_struct = type opaque - %struct.proc_dir_entry = type { i16, i16, i8*, i16, i16, i32, i32, i32, %struct.inode_operations*, %struct.file_operations*, i32 (i8*, i8**, i32, i32)*, %struct.module*, %struct.proc_dir_entry*, %struct.proc_dir_entry*, %struct.proc_dir_entry*, i8*, i32 (i8*, i8**, i32, i32, i32*, i8*)*, i32 (%struct.file*, i8*, i32, i8*)*, %struct.atomic_t, i32, i16 } - %struct.pt_regs = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } - %struct.qstr = type { i8*, i32, i32 } - %struct.quota_format_ops = type { i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.dquot*)*, i32 (%struct.dquot*)* } - %struct.quota_format_type = type { i32, %struct.quota_format_ops*, %struct.module*, %struct.quota_format_type* } - %struct.quota_info = type { i32, %struct.semaphore, %struct.semaphore, [2 x %struct.file*], [2 x %struct.mem_dqinfo], [2 x %struct.quota_format_ops*] } - %struct.quotactl_ops = type { i32 (%struct.super_block*, i32, i32, i8*)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32, %struct.if_dqinfo*)*, i32 (%struct.super_block*, i32, %struct.if_dqinfo*)*, i32 (%struct.super_block*, i32, i32, %struct.if_dqblk*)*, i32 (%struct.super_block*, i32, i32, %struct.if_dqblk*)*, i32 (%struct.super_block*, %struct.fs_quota_stat*)*, i32 (%struct.super_block*, i32, i32)*, i32 (%struct.super_block*, i32, i32, %struct.fs_disk_quota*)*, i32 (%struct.super_block*, i32, i32, %struct.fs_disk_quota*)* } - %struct.rb_node_s = type { %struct.rb_node_s*, i32, %struct.rb_node_s*, %struct.rb_node_s* } - %struct.rb_root_t = type { %struct.rb_node_s* } - %struct.reiserfs_proc_info_data_t = type { } - %struct.revectored_struct = type { [8 x i32] } - %struct.rpc_cred = type opaque - %struct.rw_semaphore = type { i32, %struct.reiserfs_proc_info_data_t, %struct.list_head } - %struct.sem_array = type { %struct.kern_ipc_perm, i32, i32, %struct.affs_bm_info*, %struct.sem_queue*, %struct.sem_queue**, %struct.sem_undo*, i32 } - %struct.sem_queue = type { %struct.sem_queue*, %struct.sem_queue**, %struct.task_struct*, %struct.sem_undo*, i32, i32, %struct.sem_array*, i32, %struct.sembuf*, i32, i32 } - %struct.sem_undo = type { %struct.sem_undo*, %struct.sem_undo*, i32, i16* } - %struct.semaphore = type { %struct.atomic_t, i32, %struct.wait_queue_head_t } - %struct.sembuf = type { i16, i16, i16 } - %struct.seq_file = type { i8*, i32, i32, i32, i64, %struct.semaphore, %struct.seq_operations*, i8* } - %struct.seq_operations = type { i8* (%struct.seq_file*, i64*)*, void (%struct.seq_file*, i8*)*, i8* (%struct.seq_file*, i8*, i64*)*, i32 (%struct.seq_file*, i8*)* } - %struct.sigaction = type { void (i32)*, i32, void ()*, %struct.__kernel_fsid_t } - %struct.siginfo_t = type { i32, i32, i32, { [29 x i32] } } - %struct.signal_struct = type { %struct.atomic_t, [64 x %struct.k_sigaction], %struct.reiserfs_proc_info_data_t } - %struct.sigpending = type { %struct.sigqueue*, %struct.sigqueue**, %struct.__kernel_fsid_t } - %struct.sigqueue = type { %struct.sigqueue*, %struct.siginfo_t } - %struct.statfs = type { i32, i32, i32, i32, i32, i32, i32, %struct.__kernel_fsid_t, i32, [6 x i32] } - %struct.super_block = type { %struct.list_head, i16, i32, i8, i8, i64, %struct.file_system_type*, %struct.super_operations*, %struct.dquot_operations*, %struct.quotactl_ops*, i32, i32, %struct.dentry*, %struct.rw_semaphore, %struct.semaphore, i32, %struct.atomic_t, %struct.list_head, %struct.list_head, %struct.list_head, %struct.block_device*, %struct.list_head, %struct.quota_info, { %struct.ncp_server }, %struct.semaphore, %struct.semaphore } - %struct.super_operations = type { %struct.inode* (%struct.super_block*)*, void (%struct.inode*)*, void (%struct.inode*)*, void (%struct.inode*, i8*)*, void (%struct.inode*)*, void (%struct.inode*, i32)*, void (%struct.inode*)*, void (%struct.inode*)*, void (%struct.super_block*)*, void (%struct.super_block*)*, i32 (%struct.super_block*)*, void (%struct.super_block*)*, void (%struct.super_block*)*, i32 (%struct.super_block*, %struct.statfs*)*, i32 (%struct.super_block*, i32*, i8*)*, void (%struct.inode*)*, void (%struct.super_block*)*, %struct.dentry* (%struct.super_block*, i32*, i32, i32, i32)*, i32 (%struct.dentry*, i32*, i32*, i32)*, i32 (%struct.seq_file*, %struct.vfsmount*)* } - %struct.task_struct = type <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], %struct.thread_s! truct, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }> - %struct.task_union = type <{ %struct.task_struct, [1632 x i32] }> - %struct.termios = type { i32, i32, i32, i32, i8, [19 x i8] } - %struct.thread_struct = type <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, %struct.i387_union, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }> - %struct.timer_list = type { %struct.list_head, i32, i32, void (i32)* } - %struct.tq_struct = type { %struct.list_head, i32, void (i8*)*, i8* } - %struct.tty_driver = type { i32, i8*, i8*, i32, i16, i16, i16, i16, i16, %struct.termios, i32, i32*, %struct.proc_dir_entry*, %struct.tty_driver*, %struct.tty_struct**, %struct.termios**, %struct.termios**, i8*, i32 (%struct.tty_struct*, %struct.file*)*, void (%struct.tty_struct*, %struct.file*)*, i32 (%struct.tty_struct*, i32, i8*, i32)*, void (%struct.tty_struct*, i8)*, void (%struct.tty_struct*)*, i32 (%struct.tty_struct*)*, i32 (%struct.tty_struct*)*, i32 (%struct.tty_struct*, %struct.file*, i32, i32)*, void (%struct.tty_struct*, %struct.termios*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*, i32)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*, i32)*, void (%struct.tty_struct*, i8)*, i32 (i8*, i8**, i32, i32, i32*, i8*)*, i32 (%struct.file*, i8*, i32, i8*)*, %struct.tty_driver*, %struct.tty_driver* } - %struct.tty_flip_buffer = type { %struct.tq_struct, %struct.semaphore, i8*, i8*, i32, i32, [1024 x i8], [1024 x i8], [4 x i8] } - %struct.tty_ldisc = type { i32, i8*, i32, i32, i32 (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, i32 (%struct.tty_struct*)*, i32 (%struct.tty_struct*, %struct.file*, i8*, i32)*, i32 (%struct.tty_struct*, %struct.file*, i8*, i32)*, i32 (%struct.tty_struct*, %struct.file*, i32, i32)*, void (%struct.tty_struct*, %struct.termios*)*, i32 (%struct.tty_struct*, %struct.file*, %struct.poll_table_struct*)*, void (%struct.tty_struct*, i8*, i8*, i32)*, i32 (%struct.tty_struct*)*, void (%struct.tty_struct*)* } - %struct.tty_struct = type <{ i32, %struct.tty_driver, %struct.tty_ldisc, %struct.termios*, %struct.termios*, i32, i32, i16, [2 x i8], i32, i32, %struct.winsize, i8, i8, [2 x i8], %struct.tty_struct*, %struct.fasync_struct*, %struct.tty_flip_buffer, i32, i32, %struct.wait_queue_head_t, %struct.wait_queue_head_t, %struct.tq_struct, i8*, i8*, %struct.list_head, i32, i8, i8, i16, i32, i32, [8 x i32], i8*, i32, i32, i32, [128 x i32], i32, i32, i32, %struct.semaphore, %struct.semaphore, %struct.reiserfs_proc_info_data_t, %struct.tq_struct }> - %struct.user_struct = type { %struct.atomic_t, %struct.atomic_t, %struct.atomic_t, %struct.user_struct*, %struct.user_struct**, i32 } - %struct.vfsmount = type { %struct.list_head, %struct.vfsmount*, %struct.dentry*, %struct.dentry*, %struct.super_block*, %struct.list_head, %struct.list_head, %struct.atomic_t, i32, i8*, %struct.list_head } - %struct.vm86_regs = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32, i32, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16 } - %struct.vm86_struct = type { %struct.vm86_regs, i32, i32, i32, %struct.revectored_struct, %struct.revectored_struct } - %struct.vm_area_struct = type { %struct.mm_struct*, i32, i32, %struct.vm_area_struct*, %struct.atomic_t, i32, %struct.rb_node_s, %struct.vm_area_struct*, %struct.vm_area_struct**, %struct.vm_operations_struct*, i32, %struct.file*, i32, i8* } - %struct.vm_operations_struct = type { void (%struct.vm_area_struct*)*, void (%struct.vm_area_struct*)*, %struct.page* (%struct.vm_area_struct*, i32, i32)* } - %struct.wait_queue_head_t = type { %struct.reiserfs_proc_info_data_t, %struct.list_head } - %struct.winsize = type { i16, i16, i16, i16 } - at init_mm = internal global %struct.mm_struct <{ - %struct.vm_area_struct* null, - %struct.rb_root_t zeroinitializer, - %struct.vm_area_struct* null, - %struct.atomic_t* getelementptr ([1024 x %struct.atomic_t]* @swapper_pg_dir, i32 0, i32 0), - %struct.atomic_t { i32 2 }, - %struct.atomic_t { i32 1 }, - i32 0, - %struct.rw_semaphore { - i32 0, - %struct.reiserfs_proc_info_data_t zeroinitializer, - %struct.list_head { %struct.list_head* getelementptr (%struct.mm_struct* @init_mm, i32 0, i32 7, i32 2), %struct.list_head* getelementptr (%struct.mm_struct* @init_mm, i32 0, i32 7, i32 2) } }, - %struct.reiserfs_proc_info_data_t zeroinitializer, - %struct.list_head { %struct.list_head* getelementptr (%struct.mm_struct* @init_mm, i32 0, i32 9), %struct.list_head* getelementptr (%struct.mm_struct* @init_mm, i32 0, i32 9) }, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i8 0, - [3 x i8] zeroinitializer, - %struct.iovec zeroinitializer }>, align 32 ; <%struct.mm_struct*> [#uses=3] - at init_task_union = global <{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i3! 2, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }> <{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %s! truct.task_struct*, %struct.task_struct*, %struct.list_head, %! struct.t ask_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva! _icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }> <{ - i32 0, - i32 0, - i32 0, - %struct.atomic_t { i32 -1 }, - %struct.exec_domain* @default_exec_domain, - i32 0, - i32 0, - i32 -1, - i32 10, - i32 0, - i32 0, - %struct.mm_struct* null, - i32 0, - i32 -1, - i32 -1, - %struct.list_head { %struct.list_head* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %st! ruct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0, i32 15), %struct.list_head* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_str! uct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32,! i32, i3 2, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %st! ruct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0, i32 15) }, - i32 0, - %struct.task_struct* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %s! truct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0), - %struct.task_struct* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %s! truct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0), - %struct.mm_struct* @init_mm, - %struct.list_head zeroinitializer, - i32 0, - i32 0, - %struct.linux_binfmt* null, - i32 0, - i32 0, - i32 0, - i32 0, - i8 0, - [3 x i8] zeroinitializer, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - %struct.task_struct* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %s! truct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0), - %struct.task_struct* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %s! truct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0), - %struct.task_struct* null, - %struct.task_struct* null, - %struct.task_struct* null, - %struct.list_head { %struct.list_head* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %st! ruct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0, i32 41), %struct.list_head* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_str! uct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32,! i32, i3 2, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %st! ruct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0, i32 41) }, - %struct.task_struct* null, - %struct.task_struct** null, - %struct.wait_queue_head_t { %struct.reiserfs_proc_info_data_t zeroinitializer, %struct.list_head { %struct.list_head* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.a! ffs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0, i32 44, i32 1), %struct.list_head* getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i! 32, %struct.list_head, i32, %struct.task_struct*, %struct.task! _struct* , %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %! struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0, i32 44, i32 1) } }, - %struct.completion* null, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - %struct.timer_list { - %struct.list_head zeroinitializer, - i32 0, - i32 0, - void (i32)* @it_real_fn }, - %struct.fown_struct zeroinitializer, - i32 0, - [1 x i32] zeroinitializer, - [1 x i32] zeroinitializer, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i8 0, - [3 x i8] zeroinitializer, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - [32 x i32] zeroinitializer, - i32 -257, - i32 0, - i32 -1, - i8 0, - [3 x i8] zeroinitializer, - %struct.user_struct* @root_user, - [11 x %struct.affs_bm_info] [ %struct.affs_bm_info { i32 -1, i32 -1 }, %struct.affs_bm_info { i32 -1, i32 -1 }, %struct.affs_bm_info { i32 -1, i32 -1 }, %struct.affs_bm_info { i32 8388608, i32 -1 }, %struct.affs_bm_info { i32 0, i32 -1 }, %struct.affs_bm_info { i32 -1, i32 -1 }, %struct.affs_bm_info zeroinitializer, %struct.affs_bm_info { i32 1024, i32 1024 }, %struct.affs_bm_info { i32 -1, i32 -1 }, %struct.affs_bm_info { i32 -1, i32 -1 }, %struct.affs_bm_info { i32 -1, i32 -1 } ], - i16 0, - [16 x i8] c"swapper\00\00\00\00\00\00\00\00\00", - [2 x i8] zeroinitializer, - i32 0, - i32 0, - %struct.tty_struct* null, - i32 0, - %struct.sem_undo* null, - %struct.sem_queue* null, - [8 x i8] zeroinitializer, - <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }> <{ - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - [8 x i32] zeroinitializer, - i32 0, - i32 0, - i32 0, - { %struct.i387_fsave_struct, [400 x i8] } zeroinitializer, - %struct.vm86_struct* null, - i32 0, - i32 0, - i32 0, - i32 0, - i32 0, - [33 x i32] [ i32 -1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 ], - [1 x i32] zeroinitializer }>, - %struct.fs_struct* @init_fs, - %struct.files_struct* @init_files, - %struct.namespace* null, - %struct.reiserfs_proc_info_data_t zeroinitializer, - %struct.signal_struct* @init_signals, - %struct.__kernel_fsid_t zeroinitializer, - %struct.sigpending { - %struct.sigqueue* null, - %struct.sigqueue** getelementptr (%struct.task_union* bitcast (<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, ! %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>* @init_task_union to %struct.task_union*), i32 0, i32 0, i32 100, i32 0), - %struct.__kernel_fsid_t zeroinitializer }, - i32 0, - i32 0, - i32 (i8*)* null, - i8* null, - %struct.__kernel_fsid_t* null, - i32 0, - i32 0, - %struct.reiserfs_proc_info_data_t zeroinitializer, - i8* null, - %struct.llva_sigcontext* null, - i32 0, - %struct.task_struct* null, - i32 0, - %struct.llva_icontext_t zeroinitializer, - %struct.llva_fp_state_t zeroinitializer, - i32* null, - i32 0, - i8* null, - [4 x i8*] zeroinitializer, - [2 x i32] zeroinitializer }>, [1632 x i32] zeroinitializer }>, section ".data.init_task", align 32 ; <<{ <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.t! ty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, { %struct.i387_fsave_struct, [400 x i8] }, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }>, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_icontext_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }>, [1632 x i32] }>*> [#uses=2] - at init_fs = internal global %struct.fs_struct { - %struct.atomic_t { i32 1 }, - %struct.reiserfs_proc_info_data_t zeroinitializer, - i32 18, - %struct.dentry* null, - %struct.dentry* null, - %struct.dentry* null, - %struct.vfsmount* null, - %struct.vfsmount* null, - %struct.vfsmount* null }, align 32 ; <%struct.fs_struct*> [#uses=1] - at default_exec_domain = external global %struct.exec_domain ; <%struct.exec_domain*> [#uses=1] - at root_user = external global %struct.user_struct ; <%struct.user_struct*> [#uses=1] - at init_files = internal global %struct.files_struct { - %struct.atomic_t { i32 1 }, - %struct.reiserfs_proc_info_data_t zeroinitializer, - i32 32, - i32 1024, - i32 0, - %struct.file** getelementptr (%struct.files_struct* @init_files, i32 0, i32 10, i32 0), - %struct.fd_set* getelementptr (%struct.files_struct* @init_files, i32 0, i32 8), - %struct.fd_set* getelementptr (%struct.files_struct* @init_files, i32 0, i32 9), - %struct.fd_set zeroinitializer, - %struct.fd_set zeroinitializer, - [32 x %struct.file*] zeroinitializer }, align 32 ; <%struct.files_struct*> [#uses=4] - at init_signals = internal global %struct.signal_struct { - %struct.atomic_t { i32 1 }, - [64 x %struct.k_sigaction] zeroinitializer, - %struct.reiserfs_proc_info_data_t zeroinitializer }, align 32 ; <%struct.signal_struct*> [#uses=1] - at swapper_pg_dir = external global [1024 x %struct.atomic_t] ; <[1024 x %struct.atomic_t]*> [#uses=1] -declare void @it_real_fn(i32) + at init_task_union = global i32 1, section ".data.init_task", align 32 + Modified: llvm/trunk/test/Linker/2008-03-07-DroppedSection_b.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2008-03-07-DroppedSection_b.ll?rev=48045&r1=48044&r2=48045&view=diff ============================================================================== --- llvm/trunk/test/Linker/2008-03-07-DroppedSection_b.ll (original) +++ llvm/trunk/test/Linker/2008-03-07-DroppedSection_b.ll Fri Mar 7 20:05:22 2008 @@ -6,122 +6,5 @@ ; ModuleID = 'u.bc' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i686-pc-linux-gnu" - %struct..0proc_fs_info = type { i32, i8* } - %struct.ViceFid = type { i32, i32, i32 } - %struct.__kernel_fsid_t = type { [2 x i32] } - %struct.address_space = type { %struct.list_head, %struct.list_head, %struct.list_head, i32, %struct.address_space_operations*, %struct.inode*, %struct.vm_area_struct*, %struct.vm_area_struct*, %struct.reiserfs_proc_info_data_t, i32 } - %struct.address_space_operations = type { i32 (%struct.page*)*, i32 (%struct.file*, %struct.page*)*, i32 (%struct.page*)*, i32 (%struct.file*, %struct.page*, i32, i32)*, i32 (%struct.file*, %struct.page*, i32, i32)*, i32 (%struct.address_space*, i32)*, i32 (%struct.page*, i32)*, i32 (%struct.page*, i32)*, i32 (i32, %struct.inode*, %struct.kiobuf*, i32, i32)*, i32 (i32, %struct.file*, %struct.kiobuf*, i32, i32)*, void (%struct.page*)* } - %struct.affs_bm_info = type { i32, i32 } - %struct.anon = type { %struct.ViceFid } - %struct.atomic_t = type { i32 } - %struct.block_device = type { %struct.list_head, %struct.atomic_t, %struct.inode*, i16, i32, %struct.block_device_operations*, %struct.semaphore, %struct.list_head } - %struct.block_device_operations = type { i32 (%struct.inode*, %struct.file*)*, i32 (%struct.inode*, %struct.file*)*, i32 (%struct.inode*, %struct.file*, i32, i32)*, i32 (i16)*, i32 (i16)*, %struct.module* } - %struct.buffer_head = type { %struct.buffer_head*, i32, i16, i16, i16, %struct.atomic_t, i16, i32, i32, %struct.buffer_head*, %struct.buffer_head*, %struct.buffer_head*, %struct.buffer_head*, %struct.buffer_head**, i8*, %struct.page*, void (%struct.buffer_head*, i32)*, i8*, i32, %struct.wait_queue_head_t, %struct.list_head } - %struct.char_device = type { %struct.list_head, %struct.atomic_t, i16, %struct.atomic_t, %struct.semaphore } - %struct.completion = type { i32, %struct.wait_queue_head_t } - %struct.dentry = type { %struct.atomic_t, i32, %struct.inode*, %struct.dentry*, %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, i32, %struct.qstr, i32, %struct.dentry_operations*, %struct.super_block*, i32, i8*, [16 x i8] } - %struct.dentry_operations = type { i32 (%struct.dentry*, i32)*, i32 (%struct.dentry*, %struct.qstr*)*, i32 (%struct.dentry*, %struct.qstr*, %struct.qstr*)*, i32 (%struct.dentry*)*, void (%struct.dentry*)*, void (%struct.dentry*, %struct.inode*)* } - %struct.dnotify_struct = type { %struct.dnotify_struct*, i32, i32, %struct.file*, %struct.files_struct* } - %struct.dquot = type { %struct.list_head, %struct.list_head, %struct.list_head, %struct.wait_queue_head_t, %struct.wait_queue_head_t, i32, i32, %struct.super_block*, i32, i16, i64, i16, i16, i32, %struct.mem_dqblk } - %struct.dquot_operations = type { void (%struct.inode*, i32)*, void (%struct.inode*)*, i32 (%struct.inode*, i64, i32)*, i32 (%struct.inode*, i32)*, void (%struct.inode*, i64)*, void (%struct.inode*, i32)*, i32 (%struct.inode*, %struct.iattr*)*, i32 (%struct.dquot*)* } - %struct.exec_domain = type { i8*, void (i32, %struct.pt_regs*)*, i8, i8, i32*, i32*, %struct.map_segment*, %struct.map_segment*, %struct.map_segment*, %struct.map_segment*, %struct.module*, %struct.exec_domain* } - %struct.fasync_struct = type { i32, i32, %struct.fasync_struct*, %struct.file* } - %struct.fd_set = type { [32 x i32] } - %struct.file = type { %struct.list_head, %struct.dentry*, %struct.vfsmount*, %struct.file_operations*, %struct.atomic_t, i32, i16, i64, i32, i32, i32, i32, i32, %struct.fown_struct, i32, i32, i32, i32, i8*, %struct.kiobuf*, i32 } - %struct.file_lock = type { %struct.file_lock*, %struct.list_head, %struct.list_head, %struct.files_struct*, i32, %struct.wait_queue_head_t, %struct.file*, i8, i8, i64, i64, void (%struct.file_lock*)*, void (%struct.file_lock*)*, void (%struct.file_lock*)*, %struct.fasync_struct*, i32, { %struct.nfs_lock_info } } - %struct.file_operations = type { %struct.module*, i64 (%struct.file*, i64, i32)*, i32 (%struct.file*, i8*, i32, i64*)*, i32 (%struct.file*, i8*, i32, i64*)*, i32 (%struct.file*, i8*, i32 (i8*, i8*, i32, i64, i32, i32)*)*, i32 (%struct.file*, %struct.poll_table*)*, i32 (%struct.inode*, %struct.file*, i32, i32)*, i32 (%struct.file*, %struct.vm_area_struct*)*, i32 (%struct.inode*, %struct.file*)*, i32 (%struct.file*)*, i32 (%struct.inode*, %struct.file*)*, i32 (%struct.file*, %struct.dentry*, i32)*, i32 (i32, %struct.file*, i32)*, i32 (%struct.file*, i32, %struct.file_lock*)*, i32 (%struct.file*, %struct.iovec*, i32, i64*)*, i32 (%struct.file*, %struct.iovec*, i32, i64*)*, i32 (%struct.file*, %struct.page*, i32, i32, i64*, i32)*, i32 (%struct.file*, i32, i32, i32, i32)* } - %struct.file_system_type = type { i8*, i32, %struct.super_block* (%struct.super_block*, i8*, i32)*, %struct.module*, %struct.file_system_type*, %struct.list_head } - %struct.files_struct = type { %struct.atomic_t, %struct.reiserfs_proc_info_data_t, i32, i32, i32, %struct.file**, %struct.fd_set*, %struct.fd_set*, %struct.fd_set, %struct.fd_set, [32 x %struct.file*] } - %struct.fown_struct = type { i32, i32, i32, i32 } - %struct.fs_disk_quota = type { i8, i8, i16, i32, i64, i64, i64, i64, i64, i64, i32, i32, i16, i16, i32, i64, i64, i64, i32, i16, i16, [8 x i8] } - %struct.fs_qfilestat_t = type { i64, i64, i32 } - %struct.fs_quota_stat = type { i8, i16, i8, %struct.fs_qfilestat_t, %struct.fs_qfilestat_t, i32, i32, i32, i32, i16, i16 } - %struct.fs_struct = type { %struct.atomic_t, %struct.reiserfs_proc_info_data_t, i32, %struct.dentry*, %struct.dentry*, %struct.dentry*, %struct.vfsmount*, %struct.vfsmount*, %struct.vfsmount* } - %struct.i387_fxsave_struct = type { i16, i16, i16, i16, i32, i32, i32, i32, i32, i32, [32 x i32], [32 x i32], [56 x i32] } - %struct.i387_union = type { %struct.i387_fxsave_struct } - %struct.iattr = type { i32, i16, i32, i32, i64, i32, i32, i32, i32 } - %struct.if_dqblk = type { i64, i64, i64, i64, i64, i64, i64, i64, i32 } - %struct.if_dqinfo = type { i64, i64, i32, i32 } - %struct.inode = type { %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, i32, %struct.atomic_t, i16, i16, i16, i32, i32, i16, i64, i32, i32, i32, i32, i32, i32, i32, i16, %struct.semaphore, %struct.rw_semaphore, %struct.semaphore, %struct.inode_operations*, %struct.file_operations*, %struct.super_block*, %struct.wait_queue_head_t, %struct.file_lock*, %struct.address_space*, %struct.address_space, [2 x %struct.dquot*], %struct.list_head, %struct.pipe_inode_info*, %struct.block_device*, %struct.char_device*, i32, %struct.dnotify_struct*, i32, i32, i8, %struct.atomic_t, i32, i32, { %struct.nfs_inode_info } } - %struct.inode_operations = type { i32 (%struct.inode*, %struct.dentry*, i32)*, %struct.dentry* (%struct.inode*, %struct.dentry*)*, i32 (%struct.dentry*, %struct.inode*, %struct.dentry*)*, i32 (%struct.inode*, %struct.dentry*)*, i32 (%struct.inode*, %struct.dentry*, i8*)*, i32 (%struct.inode*, %struct.dentry*, i32)*, i32 (%struct.inode*, %struct.dentry*)*, i32 (%struct.inode*, %struct.dentry*, i32, i32)*, i32 (%struct.inode*, %struct.dentry*, %struct.inode*, %struct.dentry*)*, i32 (%struct.dentry*, i8*, i32)*, i32 (%struct.dentry*, %struct.nameidata*)*, void (%struct.inode*)*, i32 (%struct.inode*, i32)*, i32 (%struct.dentry*)*, i32 (%struct.dentry*, %struct.iattr*)*, i32 (%struct.dentry*, %struct.iattr*)*, i32 (%struct.dentry*, i8*, i8*, i32, i32)*, i32 (%struct.dentry*, i8*, i8*, i32)*, i32 (%struct.dentry*, i8*, i32)*, i32 (%struct.dentry*, i8*)* } - %struct.iovec = type { i8*, i32 } - %struct.k_sigaction = type { %struct.sigaction } - %struct.kern_ipc_perm = type { i32, i32, i32, i32, i32, i16, i32 } - %struct.kiobuf = type <{ i32, i32, i32, i32, i8, [3 x i8], %struct.page**, %struct.buffer_head**, i32*, %struct.atomic_t, i32, void (%struct.kiobuf*)*, %struct.wait_queue_head_t }> - %struct.linux_binfmt = type { %struct.linux_binfmt*, %struct.module*, i32 (%struct.linux_binprm*, %struct.pt_regs*)*, i32 (%struct.file*)*, i32 (i32, %struct.pt_regs*, %struct.file*)*, i32, i32 (%struct.linux_binprm*, i8*)* } - %struct.linux_binprm = type { [128 x i8], [32 x %struct.page*], i32, i32, %struct.file*, i32, i32, i32, i32, i32, i32, i32, i8*, i32, i32 } - %struct.list_head = type { %struct.list_head*, %struct.list_head* } - %struct.llva_fp_state_t = type { [7 x i32], [20 x i32] } - %struct.llva_integer_state_t = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, i32 } - %struct.llva_sigcontext = type { %struct.llva_integer_state_t, %struct.llva_fp_state_t, i32, i32, i32, i32, [1 x i32], i8* } - %struct.map_segment = type opaque - %struct.mem_dqblk = type { i32, i32, i64, i32, i32, i32, i32, i32 } - %struct.mem_dqinfo = type { %struct.quota_format_type*, i32, i32, i32, %struct.anon } - %struct.mm_struct = type <{ %struct.vm_area_struct*, %struct.rb_root_t, %struct.vm_area_struct*, %struct.atomic_t*, %struct.atomic_t, %struct.atomic_t, i32, %struct.rw_semaphore, %struct.reiserfs_proc_info_data_t, %struct.list_head, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, [3 x i8], %struct.iovec }> - %struct.module = type { i32, %struct.module*, i8*, i32, %struct.raw_opt, i32, i32, i32, %struct..0proc_fs_info*, %struct.module_ref*, %struct.module_ref*, i32 ()*, void ()*, %struct.affs_bm_info*, %struct.affs_bm_info*, %struct.module_persist*, %struct.module_persist*, i32 ()*, i32, i8*, i8*, i8*, i8*, i8* } - %struct.module_persist = type opaque - %struct.module_ref = type { %struct.module*, %struct.module*, %struct.module_ref* } - %struct.nameidata = type { %struct.dentry*, %struct.vfsmount*, %struct.qstr, i32, i32 } - %struct.namespace = type { %struct.atomic_t, %struct.vfsmount*, %struct.list_head, %struct.rw_semaphore } - %struct.ncp_mount_data_kernel = type { i32, i32, i32, i32, i32, i32, i32, [17 x i8], i32, i32, i16, i16 } - %struct.ncp_server = type { %struct.ncp_mount_data_kernel, [258 x i8], %struct.file*, i8, i8, i16, i8, i8, i32, i32, i32, i8*, i32, %struct.semaphore, i32, i32, i32, i32, i32, i32, [8 x i8], [16 x i8], { i32, i32, i8*, i32 }, %struct..0proc_fs_info, %struct.nls_table*, %struct.nls_table*, i32, i32 } - %struct.nfs_fh = type { i16, [64 x i8] } - %struct.nfs_inode_info = type { i64, %struct.nfs_fh, i16, i32, i64, i64, i64, i32, i32, i32, [2 x i32], %struct.list_head, %struct.list_head, %struct.list_head, %struct.list_head, i32, i32, i32, i32, %struct.rpc_cred* } - %struct.nfs_lock_info = type { i32, i32, %struct.nlm_host* } - %struct.nlm_host = type opaque - %struct.nls_table = type { i8*, i32 (i16, i8*, i32)*, i32 (i8*, i32, i16*)*, i8*, i8*, %struct.module*, %struct.nls_table* } - %struct.page = type { %struct.list_head, %struct.address_space*, i32, %struct.page*, %struct.atomic_t, i32, %struct.list_head, %struct.page**, %struct.buffer_head* } - %struct.pipe_inode_info = type { %struct.wait_queue_head_t, i8*, i32, i32, i32, i32, i32, i32, i32, i32 } - %struct.poll_table = type { i32, %struct.poll_table_page* } - %struct.poll_table_entry = type { %struct.file*, %struct.wait_queue_t, %struct.wait_queue_head_t* } - %struct.poll_table_page = type { %struct.poll_table_page*, %struct.poll_table_entry*, [0 x %struct.poll_table_entry] } - %struct.proc_dir_entry = type { i16, i16, i8*, i16, i16, i32, i32, i32, %struct.inode_operations*, %struct.file_operations*, i32 (i8*, i8**, i32, i32)*, %struct.module*, %struct.proc_dir_entry*, %struct.proc_dir_entry*, %struct.proc_dir_entry*, i8*, i32 (i8*, i8**, i32, i32, i32*, i8*)*, i32 (%struct.file*, i8*, i32, i8*)*, %struct.atomic_t, i32, i16 } - %struct.pt_regs = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } - %struct.qstr = type { i8*, i32, i32 } - %struct.quota_format_ops = type { i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.dquot*)*, i32 (%struct.dquot*)* } - %struct.quota_format_type = type { i32, %struct.quota_format_ops*, %struct.module*, %struct.quota_format_type* } - %struct.quota_info = type { i32, %struct.semaphore, %struct.semaphore, [2 x %struct.file*], [2 x %struct.mem_dqinfo], [2 x %struct.quota_format_ops*] } - %struct.quotactl_ops = type { i32 (%struct.super_block*, i32, i32, i8*)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32)*, i32 (%struct.super_block*, i32, %struct.if_dqinfo*)*, i32 (%struct.super_block*, i32, %struct.if_dqinfo*)*, i32 (%struct.super_block*, i32, i32, %struct.if_dqblk*)*, i32 (%struct.super_block*, i32, i32, %struct.if_dqblk*)*, i32 (%struct.super_block*, %struct.fs_quota_stat*)*, i32 (%struct.super_block*, i32, i32)*, i32 (%struct.super_block*, i32, i32, %struct.fs_disk_quota*)*, i32 (%struct.super_block*, i32, i32, %struct.fs_disk_quota*)* } - %struct.raw_opt = type { %struct.atomic_t } - %struct.rb_node_s = type { %struct.rb_node_s*, i32, %struct.rb_node_s*, %struct.rb_node_s* } - %struct.rb_root_t = type { %struct.rb_node_s* } - %struct.reiserfs_proc_info_data_t = type { } - %struct.revectored_struct = type { [8 x i32] } - %struct.rpc_cred = type opaque - %struct.rw_semaphore = type { i32, %struct.reiserfs_proc_info_data_t, %struct.list_head } - %struct.sem_array = type { %struct.kern_ipc_perm, i32, i32, %struct.affs_bm_info*, %struct.sem_queue*, %struct.sem_queue**, %struct.sem_undo*, i32 } - %struct.sem_queue = type { %struct.sem_queue*, %struct.sem_queue**, %struct.task_struct*, %struct.sem_undo*, i32, i32, %struct.sem_array*, i32, %struct.sembuf*, i32, i32 } - %struct.sem_undo = type { %struct.sem_undo*, %struct.sem_undo*, i32, i16* } - %struct.semaphore = type { %struct.atomic_t, i32, %struct.wait_queue_head_t } - %struct.sembuf = type { i16, i16, i16 } - %struct.seq_file = type { i8*, i32, i32, i32, i64, %struct.semaphore, %struct.seq_operations*, i8* } - %struct.seq_operations = type { i8* (%struct.seq_file*, i64*)*, void (%struct.seq_file*, i8*)*, i8* (%struct.seq_file*, i8*, i64*)*, i32 (%struct.seq_file*, i8*)* } - %struct.sigaction = type { void (i32)*, i32, void ()*, %struct.__kernel_fsid_t } - %struct.siginfo_t = type { i32, i32, i32, { [29 x i32] } } - %struct.signal_struct = type { %struct.atomic_t, [64 x %struct.k_sigaction], %struct.reiserfs_proc_info_data_t } - %struct.sigpending = type { %struct.sigqueue*, %struct.sigqueue**, %struct.__kernel_fsid_t } - %struct.sigqueue = type { %struct.sigqueue*, %struct.siginfo_t } - %struct.statfs = type { i32, i32, i32, i32, i32, i32, i32, %struct.__kernel_fsid_t, i32, [6 x i32] } - %struct.super_block = type { %struct.list_head, i16, i32, i8, i8, i64, %struct.file_system_type*, %struct.super_operations*, %struct.dquot_operations*, %struct.quotactl_ops*, i32, i32, %struct.dentry*, %struct.rw_semaphore, %struct.semaphore, i32, %struct.atomic_t, %struct.list_head, %struct.list_head, %struct.list_head, %struct.block_device*, %struct.list_head, %struct.quota_info, { %struct.ncp_server }, %struct.semaphore, %struct.semaphore } - %struct.super_operations = type { %struct.inode* (%struct.super_block*)*, void (%struct.inode*)*, void (%struct.inode*)*, void (%struct.inode*, i8*)*, void (%struct.inode*)*, void (%struct.inode*, i32)*, void (%struct.inode*)*, void (%struct.inode*)*, void (%struct.super_block*)*, void (%struct.super_block*)*, i32 (%struct.super_block*)*, void (%struct.super_block*)*, void (%struct.super_block*)*, i32 (%struct.super_block*, %struct.statfs*)*, i32 (%struct.super_block*, i32*, i8*)*, void (%struct.inode*)*, void (%struct.super_block*)*, %struct.dentry* (%struct.super_block*, i32*, i32, i32, i32)*, i32 (%struct.dentry*, i32*, i32*, i32)*, i32 (%struct.seq_file*, %struct.vfsmount*)* } - %struct.task_struct = type <{ i32, i32, i32, %struct.atomic_t, %struct.exec_domain*, i32, i32, i32, i32, i32, i32, %struct.mm_struct*, i32, i32, i32, %struct.list_head, i32, %struct.task_struct*, %struct.task_struct*, %struct.mm_struct*, %struct.list_head, i32, i32, %struct.linux_binfmt*, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.task_struct*, %struct.list_head, %struct.task_struct*, %struct.task_struct**, %struct.wait_queue_head_t, %struct.completion*, i32, i32, i32, i32, i32, i32, i32, %struct.timer_list, %struct.fown_struct, i32, [1 x i32], [1 x i32], i32, i32, i32, i32, i32, i32, i8, [3 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, [32 x i32], i32, i32, i32, i8, [3 x i8], %struct.user_struct*, [11 x %struct.affs_bm_info], i16, [16 x i8], [2 x i8], i32, i32, %struct.tty_struct*, i32, %struct.sem_undo*, %struct.sem_queue*, [8 x i8], %struct.thread_s! truct, %struct.fs_struct*, %struct.files_struct*, %struct.namespace*, %struct.reiserfs_proc_info_data_t, %struct.signal_struct*, %struct.__kernel_fsid_t, %struct.sigpending, i32, i32, i32 (i8*)*, i8*, %struct.__kernel_fsid_t*, i32, i32, %struct.reiserfs_proc_info_data_t, i8*, %struct.llva_sigcontext*, i32, %struct.task_struct*, i32, %struct.llva_integer_state_t, %struct.llva_fp_state_t, i32*, i32, i8*, [4 x i8*], [2 x i32] }> - %struct.task_union = type <{ %struct.task_struct, [1632 x i32] }> - %struct.termios = type { i32, i32, i32, i32, i8, [19 x i8] } - %struct.thread_struct = type <{ i32, i32, i32, i32, i32, [8 x i32], i32, i32, i32, %struct.i387_union, %struct.vm86_struct*, i32, i32, i32, i32, i32, [33 x i32], [1 x i32] }> - %struct.timer_list = type { %struct.list_head, i32, i32, void (i32)* } - %struct.tq_struct = type { %struct.list_head, i32, void (i8*)*, i8* } - %struct.tty_driver = type { i32, i8*, i8*, i32, i16, i16, i16, i16, i16, %struct.termios, i32, i32*, %struct.proc_dir_entry*, %struct.tty_driver*, %struct.tty_struct**, %struct.termios**, %struct.termios**, i8*, i32 (%struct.tty_struct*, %struct.file*)*, void (%struct.tty_struct*, %struct.file*)*, i32 (%struct.tty_struct*, i32, i8*, i32)*, void (%struct.tty_struct*, i8)*, void (%struct.tty_struct*)*, i32 (%struct.tty_struct*)*, i32 (%struct.tty_struct*)*, i32 (%struct.tty_struct*, %struct.file*, i32, i32)*, void (%struct.tty_struct*, %struct.termios*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*, i32)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*, i32)*, void (%struct.tty_struct*, i8)*, i32 (i8*, i8**, i32, i32, i32*, i8*)*, i32 (%struct.file*, i8*, i32, i8*)*, %struct.tty_driver*, %struct.tty_driver* } - %struct.tty_flip_buffer = type { %struct.tq_struct, %struct.semaphore, i8*, i8*, i32, i32, [1024 x i8], [1024 x i8], [4 x i8] } - %struct.tty_ldisc = type { i32, i8*, i32, i32, i32 (%struct.tty_struct*)*, void (%struct.tty_struct*)*, void (%struct.tty_struct*)*, i32 (%struct.tty_struct*)*, i32 (%struct.tty_struct*, %struct.file*, i8*, i32)*, i32 (%struct.tty_struct*, %struct.file*, i8*, i32)*, i32 (%struct.tty_struct*, %struct.file*, i32, i32)*, void (%struct.tty_struct*, %struct.termios*)*, i32 (%struct.tty_struct*, %struct.file*, %struct.poll_table*)*, void (%struct.tty_struct*, i8*, i8*, i32)*, i32 (%struct.tty_struct*)*, void (%struct.tty_struct*)* } - %struct.tty_struct = type <{ i32, %struct.tty_driver, %struct.tty_ldisc, %struct.termios*, %struct.termios*, i32, i32, i16, [2 x i8], i32, i32, %struct.winsize, i8, i8, [2 x i8], %struct.tty_struct*, %struct.fasync_struct*, %struct.tty_flip_buffer, i32, i32, %struct.wait_queue_head_t, %struct.wait_queue_head_t, %struct.tq_struct, i8*, i8*, %struct.list_head, i32, i8, i8, i16, i32, i32, [8 x i32], i8*, i32, i32, i32, [128 x i32], i32, i32, i32, %struct.semaphore, %struct.semaphore, %struct.reiserfs_proc_info_data_t, %struct.tq_struct }> - %struct.user_struct = type { %struct.atomic_t, %struct.atomic_t, %struct.atomic_t, %struct.user_struct*, %struct.user_struct**, i32 } - %struct.vfsmount = type { %struct.list_head, %struct.vfsmount*, %struct.dentry*, %struct.dentry*, %struct.super_block*, %struct.list_head, %struct.list_head, %struct.atomic_t, i32, i8*, %struct.list_head } - %struct.vm86_regs = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32, i32, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16 } - %struct.vm86_struct = type { %struct.vm86_regs, i32, i32, i32, %struct.revectored_struct, %struct.revectored_struct } - %struct.vm_area_struct = type { %struct.mm_struct*, i32, i32, %struct.vm_area_struct*, %struct.atomic_t, i32, %struct.rb_node_s, %struct.vm_area_struct*, %struct.vm_area_struct**, %struct.vm_operations_struct*, i32, %struct.file*, i32, i8* } - %struct.vm_operations_struct = type { void (%struct.vm_area_struct*)*, void (%struct.vm_area_struct*)*, %struct.page* (%struct.vm_area_struct*, i32, i32)* } - %struct.wait_queue_head_t = type { %struct.reiserfs_proc_info_data_t, %struct.list_head } - %struct.wait_queue_t = type { i32, %struct.task_struct*, %struct.list_head } - %struct.winsize = type { i16, i16, i16, i16 } - at init_task_union = external global %struct.task_union ; <%struct.task_union*> [#uses=1] + at init_task_union = external global i32 From nicholas at mxc.ca Fri Mar 7 20:49:45 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Sat, 08 Mar 2008 02:49:45 -0000 Subject: [llvm-commits] [llvm] r48046 - /llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Message-ID: <200803080249.m282njC7003806@zion.cs.uiuc.edu> Author: nicholas Date: Fri Mar 7 20:49:45 2008 New Revision: 48046 URL: http://llvm.org/viewvc/llvm-project?rev=48046&view=rev Log: Load the symbols first so that the interpreter constructor can find them when it tries to initialize them. Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp?rev=48046&r1=48045&r2=48046&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Fri Mar 7 20:49:45 2008 @@ -317,6 +317,11 @@ std::string *ErrorStr) { ExecutionEngine *EE = 0; + // Make sure we can resolve symbols in the program as well. The zero arg + // to the function tells DynamicLibrary to load the program, not a library. + if (sys::DynamicLibrary::LoadLibraryPermanently(0, ErrorStr)) + return 0; + // Unless the interpreter was explicitly selected, try making a JIT. if (!ForceInterpreter && JITCtor) EE = JITCtor(MP, ErrorStr); @@ -325,15 +330,6 @@ if (EE == 0 && InterpCtor) EE = InterpCtor(MP, ErrorStr); - if (EE) { - // Make sure we can resolve symbols in the program as well. The zero arg - // to the function tells DynamicLibrary to load the program, not a library. - if (sys::DynamicLibrary::LoadLibraryPermanently(0, ErrorStr)) { - delete EE; - return 0; - } - } - return EE; } From clattner at apple.com Sat Mar 8 01:29:40 2008 From: clattner at apple.com (Chris Lattner) Date: Fri, 7 Mar 2008 23:29:40 -0800 Subject: [llvm-commits] Speeding up instruction selection In-Reply-To: <54728.76.126.219.198.1204914227.squirrel@webmail.apple.com> References: <9B43CA3F-5C45-4D36-A80F-9A840E3DA5EB@apple.com> <8555B624-69BC-40A3-B417-DD904927D51C@apple.com> <1F69CEC2-93D3-4EDA-89F3-BF48BB229183@apple.com> <54728.76.126.219.198.1204914227.squirrel@webmail.apple.com> Message-ID: On Mar 7, 2008, at 10:23 AM, Dan Gohman wrote: > On Fri, March 7, 2008 7:26 am, Roman Levenstein wrote: >> The most interesting thing, though, is that this implementation has >> roughly the same performance on kimwitu (+1%), but is definitely >> worse >> on the huge big4.bc. In this one, it is about 10% worse for some >> reason (and profiler shows suddenly that SDOperand::operator == is >> the >> hottest function, when called from SDNode::hasNUsesOfValue. I have no >> idea why... I repeated tests multiple times, but it always produces >> the same result. With my set approach, the same function does not >> consume any time...). I guess it is somehow related to the memory >> access locality or something like that. Any good ideas explaining my >> findings? > > Hmm, SDNode's Uses list doesn't track result numbers, so > SDNode::hasNUsesOfValue has to iterate through every operand of > every user of a node, calling SDOperand::operator== on each one. > It doesn't explain why this function doesn't show up in the profile > with your set approach, but it does seem like something that could > be causing trouble. It would be interesting to try extending Uses to > hold result numbers along with the users, which would make the inner > loop of hasNUsesOfValue unnecessary. It looks like there are several > other places in codegen where this would apply as well. The way the machine operand and llvm ir operand classes work is that walking the "use" list actually walks a linked list of the operands that point to the values (Use or MachineOperand). It is probably best for each node to have only a single use list... this means that walking the use list of a node would get operands of nodes that use any value of that node. One way to address this is to make use_iterator automatically filter out uses of results that are not interesting. For machine registers, the defusechain_iterator<> template is used to provide reg_iterator, def_iterator, and use_iterator. def/use_iterator just filter out uses that aren't interesting for a specific iteration. This sort of change is a major change to the way that operands and nodes work in the selection dag, but it should be possible to do this without touching all the code that uses it. It is also quite important for scalability to large basic blocks and is generally a really worthwhile project. If you have questions, please don't hesitate to ask. I'm excited that you're tackling this! -Chris From nicholas at mxc.ca Sat Mar 8 01:48:42 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Sat, 08 Mar 2008 07:48:42 -0000 Subject: [llvm-commits] [llvm] r48047 - in /llvm/trunk: include/llvm/BasicBlock.h lib/Transforms/Scalar/SCCP.cpp Message-ID: <200803080748.m287mggk011892@zion.cs.uiuc.edu> Author: nicholas Date: Sat Mar 8 01:48:41 2008 New Revision: 48047 URL: http://llvm.org/viewvc/llvm-project?rev=48047&view=rev Log: Not all users of a BB are Instructions any more. Modified: llvm/trunk/include/llvm/BasicBlock.h llvm/trunk/lib/Transforms/Scalar/SCCP.cpp Modified: llvm/trunk/include/llvm/BasicBlock.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/BasicBlock.h?rev=48047&r1=48046&r2=48047&view=diff ============================================================================== --- llvm/trunk/include/llvm/BasicBlock.h (original) +++ llvm/trunk/include/llvm/BasicBlock.h Sat Mar 8 01:48:41 2008 @@ -95,11 +95,6 @@ const Function *getParent() const { return Parent; } Function *getParent() { return Parent; } - /// use_back - Specialize the methods defined in Value, as we know that an - /// BasicBlock can only be used by Instructions (specifically PHI and terms). - Instruction *use_back() { return cast(*use_begin());} - const Instruction *use_back() const { return cast(*use_begin());} - /// getTerminator() - If this is a well formed basic block, then this returns /// a pointer to the terminator instruction. If it is not, then you get a /// null pointer back. @@ -187,6 +182,9 @@ /// update the PHI nodes that reside in the block. Note that this should be /// called while the predecessor still refers to this block. /// + /// DontDeleteUselessPHIs will keep PHIs that have one value or the same + /// value for all entries. + /// void removePredecessor(BasicBlock *Pred, bool DontDeleteUselessPHIs = false); /// splitBasicBlock - This splits a basic block into two at the specified Modified: llvm/trunk/lib/Transforms/Scalar/SCCP.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SCCP.cpp?rev=48047&r1=48046&r2=48047&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/SCCP.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/SCCP.cpp Sat Mar 8 01:48:41 2008 @@ -45,7 +45,7 @@ STATISTIC(NumInstRemoved, "Number of instructions removed"); STATISTIC(NumDeadBlocks , "Number of basic blocks unreachable"); -STATISTIC(IPNumInstRemoved, "Number ofinstructions removed by IPSCCP"); +STATISTIC(IPNumInstRemoved, "Number of instructions removed by IPSCCP"); STATISTIC(IPNumDeadBlocks , "Number of basic blocks unreachable by IPSCCP"); STATISTIC(IPNumArgsElimed ,"Number of arguments constant propagated by IPSCCP"); STATISTIC(IPNumGlobalConst, "Number of globals found to be constant by IPSCCP"); @@ -1637,6 +1637,11 @@ // If there are any PHI nodes in this successor, drop entries for BB now. BasicBlock *DeadBB = BlocksToErase[i]; while (!DeadBB->use_empty()) { + if (BasicBlock *PredBB = dyn_cast(DeadBB->use_back())) { + PredBB->setUnwindDest(NULL); + continue; + } + Instruction *I = cast(DeadBB->use_back()); bool Folded = ConstantFoldTerminator(I->getParent()); if (!Folded) { From clattner at apple.com Sat Mar 8 01:53:47 2008 From: clattner at apple.com (Chris Lattner) Date: Fri, 7 Mar 2008 23:53:47 -0800 Subject: [llvm-commits] Speeding up instruction selection In-Reply-To: References: <9B43CA3F-5C45-4D36-A80F-9A840E3DA5EB@apple.com> <8555B624-69BC-40A3-B417-DD904927D51C@apple.com> <1F69CEC2-93D3-4EDA-89F3-BF48BB229183@apple.com> Message-ID: <06B92AA2-1D4F-4D70-AF1B-337C7C8EBEC4@apple.com> On Mar 7, 2008, at 7:26 AM, Roman Levenstein wrote: >> Please look at the implementation of User::setOperand() or >> MachineOperand::setReg(). When these changes the value of an >> operand, >> it needs to remove the current 'instruction' from the use list of the >> old value and add it to the new value. I assure you that it is >> constant time, exactly because it doesn't have to scan the whole >> list. It just unlinks it form the middle of the list with no search. >> This makes it very fast and scalable. > > OK. My fault. Now I really understood how it works! ;-) Ok! > I tried to apply the same principle to SDNodes. > > This means: > 1) Each SDNode maintains an std::list of uses, i.e. list of pointers > to SDNodes using it. I don't recommend using std::list here. The subtlety is that the use list will end up winding its way through the operands that are embedded in an SDNode. This design allows ReplaceAllUsesWith (and related operations) to be extremely efficient. > 2) Each SDNode has a field that links it into the Uses list of SDNode > used by this node. This link is an iterator pointing to the position > inside the SDNode::Uses list. Right, this should be the same list as above. > Since one node can use multiple other > nodes, each SDNode has once such link field per SDOperand. More > precisely, I introduced the Used files, which is an array of > iterators pointing into Uses lists of nodes used by current SDNode. > This array is allocated dynamically and at the same places, where > OperandList is allocated or set. I think it might be best to introduce a new class, say SDUseOperand or something like that. Right now the operands of an SDNode are stored in the OperandList array, which is an array of SDOperands. I'd suggest changing this to be an array of SDUseOperand. SDOperand is currently a SDNode + result#. SDUseOperand would be an SDOperand (like Val in the Use class) plus a pointer to the containing node (like U in the Use class), and next/prev pointers (like Next/ Prev) in the use list. Before you worry about the size bloat of tracking all this, remember that the Uses SmallVector in SDNode will turn into a single pointer, so this will be only a small increase in memory if any at all. Selection dags have much more constrained situations for when the operands of a node are changed, so keeping the use lists up to date should be relatively easy (compared to llvm ir or machineoperands). > 3) The rest of the code is unaffected for now. But probably, with this > approach, replaceAllUses.. can be done faster by rewriting it in a > more intelligent way,e.g. bulk removals or moving the whole Uses list > at once or something like that? Yep, making that faster can be done as a second step. > With these changes, Insertion become fast, removal is also very fast, > both are constant time, as you said. > Chris, would you say it is the approach that you had in mind? Yep! > I tried to test on kimwitu, as you suggested, by compiling the big > kw.llc.bc file. > First of all, according to profiler, there are no real bottlenecks, > consuming most of the time. Right. > > The most interesting thing, though, is that this implementation has > roughly the same performance on kimwitu (+1%), but is definitely worse > on the huge big4.bc. In this one, it is about 10% worse for some > reason (and profiler shows suddenly that SDOperand::operator == is the > hottest function, when called from SDNode::hasNUsesOfValue. I have no > idea why... I repeated tests multiple times, but it always produces > the same result. With my set approach, the same function does not > consume any time...). I guess it is somehow related to the memory > access locality or something like that. Any good ideas explaining my > findings? Sounds like something strange is happening. > I attach the patch, just for the sake of completeness. It is really > ugly and has a lot of conditional compilation, but gives you the idea. The approach looks like the right step, but you really need to eliminate the separate std::list for it to be comparable. -Chris From christopher.lamb at gmail.com Sat Mar 8 14:44:08 2008 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Sat, 8 Mar 2008 12:44:08 -0800 Subject: [llvm-commits] [llvm] r47592 - in /llvm/trunk: lib/CodeGen/SimpleRegisterCoalescing.cpp test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll In-Reply-To: <200802260803.m1Q83hcf016233@zion.cs.uiuc.edu> References: <200802260803.m1Q83hcf016233@zion.cs.uiuc.edu> Message-ID: Hi Evan, > + // RAX: 0 -> AL, 1 -> AH, 2 -> AX, 3 -> EAX > + // EAX: 0 -> AL, 1 -> AH, 2 -> AX The assumption that a subregister index refers to the same physical register across super register classes is target specific to X86 and not enforced in any way. If the target independent codegen will depend on this kind of relationship we should at least document it, but ideally it would either be explicit or enforced. Having this be magic is trouble waiting to happen... -- Christopher Lamb On Feb 26, 2008, at 12:03 AM, Evan Cheng wrote: > Author: evancheng > Date: Tue Feb 26 02:03:41 2008 > New Revision: 47592 > > URL: http://llvm.org/viewvc/llvm-project?rev=47592&view=rev > Log: > This is possible: > vr1 = extract_subreg vr2, 3 > .. > vr3 = extract_subreg vr1, 2 > The end result is vr3 is equal to vr2 with subidx 2. > > Added: > llvm/trunk/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll > Modified: > llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp > > Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ > SimpleRegisterCoalescing.cpp?rev=47592&r1=47591&r2=47592&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) > +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Tue Feb 26 > 02:03:41 2008 > @@ -457,8 +457,14 @@ > O.setSubReg(0); > } else { > unsigned OldSubIdx = O.getSubReg(); > - assert((!SubIdx || !OldSubIdx) && "Conflicting sub-register > index!"); > - if (SubIdx) > + // Sub-register indexes goes from small to large. e.g. > + // RAX: 0 -> AL, 1 -> AH, 2 -> AX, 3 -> EAX > + // EAX: 0 -> AL, 1 -> AH, 2 -> AX > + // So RAX's sub-register 2 is AX, RAX's sub-regsiter 3 is > EAX, whose > + // sub-register 2 is also AX. > + if (SubIdx && OldSubIdx && SubIdx != OldSubIdx) > + assert(OldSubIdx < SubIdx && "Conflicting sub-register > index!"); > + else if (SubIdx) > O.setSubReg(SubIdx); > O.setReg(DstReg); > } > > Added: llvm/trunk/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ > X86/2008-02-25-X86-64-CoalescerBug.ll?rev=47592&view=auto > > ====================================================================== > ======== > --- llvm/trunk/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll > (added) > +++ llvm/trunk/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll > Tue Feb 26 02:03:41 2008 > @@ -0,0 +1,55 @@ > +; RUN: llvm-as < %s | llc -march=x86-64 > + > + %struct.XX = type <{ i8 }> > + %struct.YY = type { i64 } > + %struct.ZZ = type opaque > + > +define i8 @f(%struct.XX*** %fontMap, %struct.XX* %uen) signext { > +entry: > + %tmp45 = add i16 0, 1 ; [#uses=2] > + br i1 false, label %bb124, label %bb53 > + > +bb53: ; preds = %entry > + %tmp55 = call %struct.YY** @AA( i64 1, %struct.XX* %uen ) ; <% > struct.YY**> [#uses=3] > + %tmp2728128 = load %struct.XX** null ; <%struct.XX*> [#uses=1] > + %tmp61 = load %struct.YY** %tmp55, align 8 ; <%struct.YY*> > [#uses=1] > + %tmp62 = getelementptr %struct.YY* %tmp61, i32 0, i32 0 ; > [#uses=1] > + %tmp63 = load i64* %tmp62, align 8 ; [#uses=1] > + %tmp6566 = zext i16 %tmp45 to i64 ; [#uses=1] > + %tmp67 = shl i64 %tmp6566, 1 ; [#uses=1] > + call void @BB( %struct.YY** %tmp55, i64 %tmp67, i8 signext 0, % > struct.XX* %uen ) > + %tmp121131 = icmp eq i16 %tmp45, 1 ; [#uses=1] > + br i1 %tmp121131, label %bb124, label %bb70.preheader > + > +bb70.preheader: ; preds = %bb53 > + %tmp72 = bitcast %struct.XX* %tmp2728128 to %struct.ZZ*** ; <% > struct.ZZ***> [#uses=1] > + br label %bb70 > + > +bb70: ; preds = %bb119, %bb70.preheader > + %indvar133 = phi i32 [ %indvar.next134, %bb119 ], [ 0, % > bb70.preheader ] ; [#uses=2] > + %tmp.135 = trunc i64 %tmp63 to i32 ; [#uses=1] > + %tmp136 = shl i32 %indvar133, 1 ; [#uses=1] > + %DD = add i32 %tmp136, %tmp.135 ; [#uses=1] > + %tmp73 = load %struct.ZZ*** %tmp72, align 8 ; <%struct.ZZ**> > [#uses=0] > + br i1 false, label %bb119, label %bb77 > + > +bb77: ; preds = %bb70 > + %tmp8384 = trunc i32 %DD to i16 ; [#uses=1] > + %tmp85 = sub i16 0, %tmp8384 ; [#uses=1] > + store i16 %tmp85, i16* null, align 8 > + call void @CC( %struct.YY** %tmp55, i64 0, i64 2, i8* null, % > struct.XX* %uen ) > + ret i8 0 > + > +bb119: ; preds = %bb70 > + %indvar.next134 = add i32 %indvar133, 1 ; [#uses=1] > + br label %bb70 > + > +bb124: ; preds = %bb53, %entry > + ret i8 undef > +} > + > +declare %struct.YY** @AA(i64, %struct.XX*) > + > +declare void @BB(%struct.YY**, i64, i8 signext , %struct.XX*) > + > +declare void @CC(%struct.YY**, i64, i64, i8*, %struct.XX*) > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -- Christopher Lamb -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080308/4dc82f07/attachment.html From christopher.lamb at gmail.com Sat Mar 8 15:55:41 2008 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Sat, 8 Mar 2008 13:55:41 -0800 Subject: [llvm-commits] [llvm] r47658 - in /llvm/trunk: lib/Target/X86/README-X86-64.txt lib/Target/X86/X86Instr64bit.td test/CodeGen/X86/x86-64-and-mask.ll In-Reply-To: <200802270547.m1R5ls0N001359@zion.cs.uiuc.edu> References: <200802270547.m1R5ls0N001359@zion.cs.uiuc.edu> Message-ID: This was originally part of my changes to use sub/super registers on x86, but got nixed by Evan. See this thread: http://lists.cs.uiuc.edu/ pipermail/llvm-commits/Week-of-Mon-20070730/052377.html The point that Evan made is that implicit zeroing of the upper part of the superregister is target specific to x86-64, thus target independent subreg instructions don't properly capture this behavior. My argument was/is for having a single input form of insert_subreg which is explicitly there to capture target dependent semantics. The target independent machinery is then free to operate on that single input insert_subreg the same way across all platforms (it could be insert into undef, insert into zero, insert into all ones), but the legality of its usage is up to the specific code generator. Today this single input form of insert_subreg exists, but is unused. Would it be better if were a separate node, rather than being treated differently based on the number of operands? -- Chris On Feb 26, 2008, at 9:47 PM, Chris Lattner wrote: > Author: lattner > Date: Tue Feb 26 23:47:54 2008 > New Revision: 47658 > > URL: http://llvm.org/viewvc/llvm-project?rev=47658&view=rev > Log: > Compile x86-64-and-mask.ll into: > > _test: > movl %edi, %eax > ret > > instead of: > > _test: > movl $4294967295, %ecx > movq %rdi, %rax > andq %rcx, %rax > ret > > It would be great to write this as a Pat pattern that used subregs > instead of a 'pseudo' instruction, but I don't know how to do that > in td files. > > > Added: > llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll > Modified: > llvm/trunk/lib/Target/X86/README-X86-64.txt > llvm/trunk/lib/Target/X86/X86Instr64bit.td > > Modified: llvm/trunk/lib/Target/X86/README-X86-64.txt > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/ > README-X86-64.txt?rev=47658&r1=47657&r2=47658&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/Target/X86/README-X86-64.txt (original) > +++ llvm/trunk/lib/Target/X86/README-X86-64.txt Tue Feb 26 23:47:54 > 2008 > @@ -249,15 +249,6 @@ > addq $8, %rsp > ret > > -note the dead rsp adjustments. Also, there is surely a better/ > shorter way > -to clear the top 32-bits of a 64-bit register than movl+andq. > Testcase here: > - > -unsigned long long c(unsigned long long a) {return a&4294967295; } > - > -_c: > - movl $4294967295, %ecx > - movq %rdi, %rax > - andq %rcx, %rax > - ret > +note the dead rsp adjustments. > > // > ===------------------------------------------------------------------- > --===// > > Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/ > X86Instr64bit.td?rev=47658&r1=47657&r2=47658&view=diff > > ====================================================================== > ======== > --- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original) > +++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Tue Feb 26 23:47:54 > 2008 > @@ -61,6 +61,13 @@ > return (int64_t)N->getValue() == (int8_t)N->getValue(); > }]>; > > +def i64immFFFFFFFF : PatLeaf<(i64 imm), [{ > + // i64immFFFFFFFF - True if this is a specific constant we can't > write in > + // tblgen files. > + return N->getValue() == 0x00000000FFFFFFFFULL; > +}]>; > + > + > def sextloadi64i8 : PatFrag<(ops node:$ptr), (i64 (sextloadi8 > node:$ptr))>; > def sextloadi64i16 : PatFrag<(ops node:$ptr), (i64 (sextloadi16 > node:$ptr))>; > def sextloadi64i32 : PatFrag<(ops node:$ptr), (i64 (sextloadi32 > node:$ptr))>; > @@ -1091,6 +1098,12 @@ > "mov{l}\t{$src, ${dst:subreg32}|$ > {dst:subreg32}, $src}", > [(set GR64:$dst, (zextloadi64i32 addr:$src))]>; > > +/// PsAND64rrFFFFFFFF - r = r & (2^32-1) > +def PsAND64rrFFFFFFFF > + : I<0x89, MRMDestReg, (outs GR64:$dst), (ins GR64:$src), > + "mov{l}\t{${src:subreg32}, ${dst:subreg32}|${dst:subreg32}, $ > {src:subreg32}}", > + [(set GR64:$dst, (and GR64:$src, i64immFFFFFFFF))]>; > + > > // Alias instructions that map movr0 to xor. Use xorl instead of > xorq; it's > // equivalent due to implicit zero-extending, and it sometimes has > a smaller > > Added: llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ > X86/x86-64-and-mask.ll?rev=47658&view=auto > > ====================================================================== > ======== > --- llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll (added) > +++ llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll Tue Feb 26 > 23:47:54 2008 > @@ -0,0 +1,12 @@ > +; RUN: llvm-as < %s | llc | grep {movl.*%edi, %eax} > +; This should be a single mov, not a load of immediate + andq. > + > +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16- > i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128- > a0:0:64-s0:64:64-f80:128:128" > +target triple = "x86_64-apple-darwin8" > + > +define i64 @test(i64 %x) nounwind { > +entry: > + %tmp123 = and i64 %x, 4294967295 ; [#uses=1] > + ret i64 %tmp123 > +} > + > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -- Christopher Lamb -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080308/0685f055/attachment.html From clattner at apple.com Sat Mar 8 16:18:36 2008 From: clattner at apple.com (Chris Lattner) Date: Sat, 8 Mar 2008 14:18:36 -0800 Subject: [llvm-commits] [llvm] r47658 - in /llvm/trunk: lib/Target/X86/README-X86-64.txt lib/Target/X86/X86Instr64bit.td test/CodeGen/X86/x86-64-and-mask.ll In-Reply-To: References: <200802270547.m1R5ls0N001359@zion.cs.uiuc.edu> Message-ID: <76820C32-34B8-420A-997C-46CB591DA46E@apple.com> On Mar 8, 2008, at 1:55 PM, Christopher Lamb wrote: Hey Christopher! > This was originally part of my changes to use sub/super registers on > x86, but got nixed by Evan. See this thread: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070730/052377.html Ok, I didn't remember that. > The point that Evan made is that implicit zeroing of the upper part > of the superregister is target specific to x86-64, thus target > independent subreg instructions don't properly capture this behavior. I agree with that. Subregs (by themselves) really talk about reading/ writing to a sub/superset of another register. The strange thing here is that the operation actually changes all 64 bits, not just the 32 bits being targeted. > My argument was/is for having a single input form of insert_subreg > which is explicitly there to capture target dependent semantics. The > target independent machinery is then free to operate on that single > input insert_subreg the same way across all platforms (it could be > insert into undef, insert into zero, insert into all ones), but the > legality of its usage is up to the specific code generator. I'm not sure exactly what you mean, but generally it's good for nodes to have well defined semantics independent of the target. Of course, this could be done by saying that insert_subreg takes an immediate value to indicate which form it is, and only some forms are valid. I'm not sure how it simplifies this though. > Today this single input form of insert_subreg exists, but is unused. > Would it be better if were a separate node, rather than being > treated differently based on the number of operands? I'm really not a guru on this sort of stuff. I am somewhat dissatisfied with both ppc64 and x86-64, which have to duplicate a number of 32-bit register operation forms when operating on the "low part of a 64-bit register". However, I'm not sure I know a better way to model this. Can you give a concrete example of how this would play out, using 'mov' below as an example? Basically in svn today we now have 2 copies of 32-bit mov, which codegen to the same instruction, but are matched at isel time in two different ways. How would your solution change this? Right now we have: def MOV32rr : I<0x89, MRMDestReg, (outs GR32:$dst), (ins GR32:$src), "mov{l}\t{$src, $dst|$dst, $src}", []>; and: def PsAND64rrFFFFFFFF : I<0x89, MRMDestReg, (outs GR64:$dst), (ins GR64:$src), "mov{l}\t{${src:subreg32}, ${dst:subreg32}|${dst:subreg32}, $ {src:subreg32}}", [(set GR64:$dst, (and GR64:$src, i64immFFFFFFFF))]>; One very simple and nice thing we could do is replace the duplicated instruction with a Pat pattern. This would mean that there is only one instruction and the magic just happens in the isel. This would give us something like this: def : Pat<(and GR64:$src, i64immFFFFFFFF), (x86_64_bit_part_of_32_bit (MOV32rr (subreg GR64:$src, x86_32bit_part_of_64bit)))>; This puts more pressure on the coalescer to coalesce away the copies, but seems like an overall better solution. Is this the sort of thing you mean? -Chris -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080308/186a0a8e/attachment.html From sabre at nondot.org Sat Mar 8 16:28:46 2008 From: sabre at nondot.org (Chris Lattner) Date: Sat, 08 Mar 2008 22:28:46 -0000 Subject: [llvm-commits] [llvm] r48054 - in /llvm/trunk/lib/Target/X86: README-SSE.txt README.txt Message-ID: <200803082228.m28MSkPe012222@zion.cs.uiuc.edu> Author: lattner Date: Sat Mar 8 16:28:45 2008 New Revision: 48054 URL: http://llvm.org/viewvc/llvm-project?rev=48054&view=rev Log: move these to the appropriate file Modified: llvm/trunk/lib/Target/X86/README-SSE.txt llvm/trunk/lib/Target/X86/README.txt Modified: llvm/trunk/lib/Target/X86/README-SSE.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-SSE.txt?rev=48054&r1=48053&r2=48054&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-SSE.txt (original) +++ llvm/trunk/lib/Target/X86/README-SSE.txt Sat Mar 8 16:28:45 2008 @@ -56,17 +56,19 @@ time, not at spiller time). *Note* however that this can only be done if Y is dead. Here's a testcase: - at .str_3 = external global [15 x i8] ; <[15 x i8]*> [#uses=0] + at .str_3 = external global [15 x i8] declare void @printf(i32, ...) define void @main() { build_tree.exit: br label %no_exit.i7 no_exit.i7: ; preds = %no_exit.i7, %build_tree.exit - %tmp.0.1.0.i9 = phi double [ 0.000000e+00, %build_tree.exit ], [ %tmp.34.i18, %no_exit.i7 ] ; [#uses=1] - %tmp.0.0.0.i10 = phi double [ 0.000000e+00, %build_tree.exit ], [ %tmp.28.i16, %no_exit.i7 ] ; [#uses=1] - %tmp.28.i16 = add double %tmp.0.0.0.i10, 0.000000e+00 ; [#uses=1] - %tmp.34.i18 = add double %tmp.0.1.0.i9, 0.000000e+00 ; [#uses=2] + %tmp.0.1.0.i9 = phi double [ 0.000000e+00, %build_tree.exit ], + [ %tmp.34.i18, %no_exit.i7 ] + %tmp.0.0.0.i10 = phi double [ 0.000000e+00, %build_tree.exit ], + [ %tmp.28.i16, %no_exit.i7 ] + %tmp.28.i16 = add double %tmp.0.0.0.i10, 0.000000e+00 + %tmp.34.i18 = add double %tmp.0.1.0.i9, 0.000000e+00 br i1 false, label %Compute_Tree.exit23, label %no_exit.i7 Compute_Tree.exit23: ; preds = %no_exit.i7 @@ -658,9 +660,9 @@ define i64 @ccosf(float %z.0, float %z.1) nounwind readonly { entry: - %tmp6 = sub float -0.000000e+00, %z.1 ; [#uses=1] - %tmp20 = tail call i64 @ccoshf( float %tmp6, float %z.0 ) nounwind readonly ; [#uses=1] - ret i64 %tmp20 + %tmp6 = sub float -0.000000e+00, %z.1 ; [#uses=1] + %tmp20 = tail call i64 @ccoshf( float %tmp6, float %z.0 ) nounwind readonly + ret i64 %tmp20 } This currently compiles to: @@ -752,3 +754,50 @@ For unpredictable branches, the later is much more efficient. This should just be a matter of having scalar sse map to SELECT_CC and custom expanding or iseling it. + +//===---------------------------------------------------------------------===// + +Take the following code: + +#include +__m128i doload64(short x) {return _mm_set_epi16(x,x,x,x,x,x,x,x);} + +LLVM currently generates the following on x86: +doload64: + movzwl 4(%esp), %eax + movd %eax, %xmm0 + punpcklwd %xmm0, %xmm0 + pshufd $0, %xmm0, %xmm0 + ret + +gcc's generated code: +doload64: + movd 4(%esp), %xmm0 + punpcklwd %xmm0, %xmm0 + pshufd $0, %xmm0, %xmm0 + ret + +LLVM should be able to generate the same thing as gcc. + +//===---------------------------------------------------------------------===// + +Take the following code: +#include +__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);} + +On x86, LLVM generates the following: +doload64: + subl $28, %esp + movl $0, 4(%esp) + movl $1, (%esp) + movq (%esp), %xmm0 + addl $28, %esp + ret + +LLVM should instead generate something more like the following: +doload64: + movl $1, %eax + movd %eax, %xmm0 + ret + +//===---------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/X86/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=48054&r1=48053&r2=48054&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README.txt (original) +++ llvm/trunk/lib/Target/X86/README.txt Sat Mar 8 16:28:45 2008 @@ -1616,51 +1616,6 @@ //===---------------------------------------------------------------------===// -Take the following code: - -#include -__m128i doload64(short x) {return _mm_set_epi16(x,x,x,x,x,x,x,x);} - -LLVM currently generates the following on x86: -doload64: - movzwl 4(%esp), %eax - movd %eax, %xmm0 - punpcklwd %xmm0, %xmm0 - pshufd $0, %xmm0, %xmm0 - ret - -gcc's generated code: -doload64: - movd 4(%esp), %xmm0 - punpcklwd %xmm0, %xmm0 - pshufd $0, %xmm0, %xmm0 - ret - -LLVM should be able to generate the same thing as gcc. - -//===---------------------------------------------------------------------===// - -Take the following code: -#include -__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);} - -On x86, LLVM generates the following: -doload64: - subl $28, %esp - movl $0, 4(%esp) - movl $1, (%esp) - movq (%esp), %xmm0 - addl $28, %esp - ret - -LLVM should instead generate something more like the following: -doload64: - movl $1, %eax - movd %eax, %xmm0 - ret - -//===---------------------------------------------------------------------===// - We compile this function: define i32 @foo(i32 %a, i32 %b, i32 %c, i8 zeroext %d) nounwind { From sabre at nondot.org Sat Mar 8 16:32:39 2008 From: sabre at nondot.org (Chris Lattner) Date: Sat, 08 Mar 2008 22:32:39 -0000 Subject: [llvm-commits] [llvm] r48055 - /llvm/trunk/lib/Target/X86/README-SSE.txt Message-ID: <200803082232.m28MWdOY012333@zion.cs.uiuc.edu> Author: lattner Date: Sat Mar 8 16:32:39 2008 New Revision: 48055 URL: http://llvm.org/viewvc/llvm-project?rev=48055&view=rev Log: This one looks easy, add a note. Modified: llvm/trunk/lib/Target/X86/README-SSE.txt Modified: llvm/trunk/lib/Target/X86/README-SSE.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-SSE.txt?rev=48055&r1=48054&r2=48055&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-SSE.txt (original) +++ llvm/trunk/lib/Target/X86/README-SSE.txt Sat Mar 8 16:32:39 2008 @@ -777,7 +777,8 @@ pshufd $0, %xmm0, %xmm0 ret -LLVM should be able to generate the same thing as gcc. +LLVM should be able to generate the same thing as gcc. This looks like it is +just a matter of matching (scalar_to_vector (load x)) to movd. //===---------------------------------------------------------------------===// From sabre at nondot.org Sat Mar 8 16:48:30 2008 From: sabre at nondot.org (Chris Lattner) Date: Sat, 08 Mar 2008 22:48:30 -0000 Subject: [llvm-commits] [llvm] r48056 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200803082248.m28MmU7O012783@zion.cs.uiuc.edu> Author: lattner Date: Sat Mar 8 16:48:29 2008 New Revision: 48056 URL: http://llvm.org/viewvc/llvm-project?rev=48056&view=rev Log: minor simplifications to this code, don't create a dead SCALAR_TO_VECTOR on paths that end up not using it. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=48056&r1=48055&r2=48056&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Mar 8 16:48:29 2008 @@ -3024,7 +3024,7 @@ unsigned NumZero = 0; unsigned NumNonZero = 0; unsigned NonZeros = 0; - bool HasNonImms = false; + bool IsAllConstants = true; SmallSet Values; for (unsigned i = 0; i < NumElems; ++i) { SDOperand Elt = Op.getOperand(i); @@ -3033,7 +3033,7 @@ Values.insert(Elt); if (Elt.getOpcode() != ISD::Constant && Elt.getOpcode() != ISD::ConstantFP) - HasNonImms = true; + IsAllConstants = false; if (isZeroNode(Elt)) NumZero++; else { @@ -3055,15 +3055,19 @@ if (NumNonZero == 1 && NumElems <= 4) { unsigned Idx = CountTrailingZeros_32(NonZeros); SDOperand Item = Op.getOperand(Idx); - Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Item); - if (Idx == 0) + if (Idx == 0) { + Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Item); // Turn it into a MOVL (i.e. movss, movsd, or movd) to a zero vector. return getShuffleVectorZeroOrUndef(Item, VT, NumElems, Idx, NumZero > 0, DAG); - else if (!HasNonImms) // Otherwise, it's better to do a constpool load. + } + + if (IsAllConstants) // Otherwise, it's better to do a constpool load. return SDOperand(); if (EVTBits == 32) { + Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Item); + // Turn it into a shuffle of zero and zero-extended scalar to vector. Item = getShuffleVectorZeroOrUndef(Item, VT, NumElems, 0, NumZero > 0, DAG); @@ -3081,7 +3085,7 @@ // A vector full of immediates; various special cases are already // handled, so this is best done with a single constant-pool load. - if (!HasNonImms) + if (IsAllConstants) return SDOperand(); // Let legalizer expand 2-wide build_vectors. From sabre at nondot.org Sat Mar 8 16:59:52 2008 From: sabre at nondot.org (Chris Lattner) Date: Sat, 08 Mar 2008 22:59:52 -0000 Subject: [llvm-commits] [llvm] r48057 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200803082259.m28MxqQt013193@zion.cs.uiuc.edu> Author: lattner Date: Sat Mar 8 16:59:52 2008 New Revision: 48057 URL: http://llvm.org/viewvc/llvm-project?rev=48057&view=rev Log: 1) Improve comments. 2) Don't try to insert an i64 value into the low part of a vector with movq on an x86-32 target. This allows us to compile: __m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);} into: _doload64: movaps LCPI1_0, %xmm0 ret instead of: _doload64: subl $28, %esp movl $0, 4(%esp) movl $1, (%esp) movq (%esp), %xmm0 addl $28, %esp ret Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=48057&r1=48056&r2=48057&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Mar 8 16:59:52 2008 @@ -3055,7 +3055,15 @@ if (NumNonZero == 1 && NumElems <= 4) { unsigned Idx = CountTrailingZeros_32(NonZeros); SDOperand Item = Op.getOperand(Idx); - if (Idx == 0) { + + // If we have a constant or non-constant insertion into the low element of + // a vector, we can do this with SCALAR_TO_VECTOR + shuffle of zero into + // the rest of the elements. This will be matched as movd/movq/movss/movsd + // depending on what the source datatype is. Because we can only get here + // when NumElems <= 4, this only needs to handle i32/f32/i64/f64. + if (Idx == 0 && + // Don't do this for i64 values on x86-32. + (EVT != MVT::i64 || Subtarget->is64Bit())) { Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Item); // Turn it into a MOVL (i.e. movss, movsd, or movd) to a zero vector. return getShuffleVectorZeroOrUndef(Item, VT, NumElems, Idx, @@ -3065,6 +3073,11 @@ if (IsAllConstants) // Otherwise, it's better to do a constpool load. return SDOperand(); + // Otherwise, if this is a vector with i32 or f32 elements, and the element + // is a non-constant being inserted into an element other than the low one, + // we can't use a constant pool load. Instead, use SCALAR_TO_VECTOR (aka + // movd/movss) to move this into the low element, then shuffle it into + // place. if (EVTBits == 32) { Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Item); From christopher.lamb at gmail.com Sat Mar 8 17:13:32 2008 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Sat, 8 Mar 2008 15:13:32 -0800 Subject: [llvm-commits] [llvm] r47658 - in /llvm/trunk: lib/Target/X86/README-X86-64.txt lib/Target/X86/X86Instr64bit.td test/CodeGen/X86/x86-64-and-mask.ll In-Reply-To: <76820C32-34B8-420A-997C-46CB591DA46E@apple.com> References: <200802270547.m1R5ls0N001359@zion.cs.uiuc.edu> <76820C32-34B8-420A-997C-46CB591DA46E@apple.com> Message-ID: This is very close to what I propose, though the 'x86_32bit_part_of_64bit' part is only necessary on the insert. See below: (insert_subreg (MOV32rr (extract_subreg GR64:$src, x86_64_32bit_subreg_idx)), x86_64_implict_zext, x86_64_32bit_subreg_idx) This means there are two insert_subreg forms, the normal input form insert_subreg superregOutOutput, subregInOperand, superregInOperandToInsertInto, immediateSubregIndex and as second form for these target dependent inserts insert_subreg superregOutOutput, subregInOperand, immediateTargetKindFlag, immediateSubregIndex The trick about the second form is even though the semantics are target dependent, the coalescer need not know about these target dependent semantics to coalesce the it. -- Christopher Lamb On Mar 8, 2008, at 2:18 PM, Chris Lattner wrote: > Right now we have: > > def MOV32rr : I<0x89, MRMDestReg, (outs GR32:$dst), (ins GR32:$src), > "mov{l}\t{$src, $dst|$dst, $src}", []>; > and: > > def PsAND64rrFFFFFFFF > : I<0x89, MRMDestReg, (outs GR64:$dst), (ins GR64:$src), > "mov{l}\t{${src:subreg32}, ${dst:subreg32}|${dst:subreg32}, $ > {src:subreg32}}", > [(set GR64:$dst, (and GR64:$src, i64immFFFFFFFF))]>; > > One very simple and nice thing we could do is replace the > duplicated instruction with a Pat pattern. This would mean that > there is only one instruction and the magic just happens in the > isel. This would give us something like this: > > def : Pat<(and GR64:$src, i64immFFFFFFFF), > (x86_64_bit_part_of_32_bit > (MOV32rr (subreg GR64:$src, x86_32bit_part_of_64bit)))>; > > This puts more pressure on the coalescer to coalesce away the > copies, but seems like an overall better solution. Is this the > sort of thing you mean? > > -Chris From sabre at nondot.org Sat Mar 8 17:43:37 2008 From: sabre at nondot.org (Chris Lattner) Date: Sat, 08 Mar 2008 23:43:37 -0000 Subject: [llvm-commits] [llvm] r48058 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAG.cpp test/CodeGen/X86/vec_set-9.ll Message-ID: <200803082343.m28Nhb8N014536@zion.cs.uiuc.edu> Author: lattner Date: Sat Mar 8 17:43:36 2008 New Revision: 48058 URL: http://llvm.org/viewvc/llvm-project?rev=48058&view=rev Log: Teach SD some vector identities, allowing us to compile vec_set-9 into: _test3: movd %rdi, %xmm1 #IMPLICIT_DEF %xmm0 punpcklqdq %xmm1, %xmm0 ret instead of: _test3: #IMPLICIT_DEF %rax movd %rax, %xmm0 movd %rdi, %xmm1 punpcklqdq %xmm1, %xmm0 ret This is still not ideal. There is no reason to two xmm regs. Added: llvm/trunk/test/CodeGen/X86/vec_set-9.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=48058&r1=48057&r2=48058&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sat Mar 8 17:43:36 2008 @@ -1889,6 +1889,14 @@ assert(MVT::isVector(VT) && !MVT::isVector(Operand.getValueType()) && MVT::getVectorElementType(VT) == Operand.getValueType() && "Illegal SCALAR_TO_VECTOR node!"); + if (OpOpcode == ISD::UNDEF) + return getNode(ISD::UNDEF, VT); + // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. + if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && + isa(Operand.getOperand(1)) && + Operand.getConstantOperandVal(1) == 0 && + Operand.getOperand(0).getValueType() == VT) + return Operand.getOperand(0); break; case ISD::FNEG: if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) @@ -2039,6 +2047,10 @@ case ISD::EXTRACT_VECTOR_ELT: assert(N2C && "Bad EXTRACT_VECTOR_ELT!"); + // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. + if (N1.getOpcode() == ISD::UNDEF) + return getNode(ISD::UNDEF, VT); + // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is // expanding copies of large vectors from registers. if (N1.getOpcode() == ISD::CONCAT_VECTORS && @@ -2054,7 +2066,7 @@ // expanding large vector constants. if (N1.getOpcode() == ISD::BUILD_VECTOR) return N1.getOperand(N2C->getValue()); - + // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector // operations are lowered to scalars. if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) Added: llvm/trunk/test/CodeGen/X86/vec_set-9.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-9.ll?rev=48058&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_set-9.ll (added) +++ llvm/trunk/test/CodeGen/X86/vec_set-9.ll Sat Mar 8 17:43:36 2008 @@ -0,0 +1,8 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | count 1 + +define <2 x i64> @test3(i64 %A) { +entry: + %B = insertelement <2 x i64> undef, i64 %A, i32 1 + ret <2 x i64> %B +} + From dalej at apple.com Sat Mar 8 17:56:00 2008 From: dalej at apple.com (Dale Johannesen) Date: Sat, 08 Mar 2008 23:56:00 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r48059 - in /llvm-gcc-4.2/trunk/gcc/config/rs6000: llvm-rs6000.cpp rs6000.h Message-ID: <200803082356.m28Nu0Fu014988@zion.cs.uiuc.edu> Author: johannes Date: Sat Mar 8 17:55:59 2008 New Revision: 48059 URL: http://llvm.org/viewvc/llvm-project?rev=48059&view=rev Log: Enable byval parameter passing for ppc32. Modified: llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp llvm-gcc-4.2/trunk/gcc/config/rs6000/rs6000.h Modified: llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp?rev=48059&r1=48058&r2=48059&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp Sat Mar 8 17:55:59 2008 @@ -365,5 +365,46 @@ return false; } +/* Target hook for llvm-abi.h. It returns true if an aggregate of the + specified type should be passed using the byval mechanism. */ +bool llvm_rs6000_should_pass_aggregate_byval(tree TreeType, const Type *Ty) { + + /* FIXME byval not implemented for ppc64. */ + if (TARGET_64BIT) + return false; + + HOST_WIDE_INT Bytes = (TYPE_MODE(TreeType) == BLKmode) ? + int_size_in_bytes(TreeType) : + (int) GET_MODE_SIZE(TYPE_MODE(TreeType)); + + // Zero sized array, struct, or class, ignored. + if (Bytes == 0) + return false; + + // If this is a small fixed size type, investigate it. + if (Bytes <= 0 || Bytes > 16) + return true; + + // ppc32 passes aggregates by copying, either in int registers or on the + // stack. If this is an extremely simple aggregate whose elements would be + // passed the same if passed as scalars, pass them that way in order to + // promote SROA on the caller and callee side. + // Note that we can't support passing all structs this way. For example, + // {i16, i16} should be passed in on 32-bit unit, which is not how "i16, i16" + // would be passed as stand-alone arguments. And any floating point element + // would be passed in float regs, not int. + const StructType *STy = dyn_cast(Ty); + if (!STy || STy->isPacked()) return true; + + for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { + const Type *EltTy = STy->getElementType(i); + // 32 and 64-bit integers are fine, as are pointers. + // Shorter ints do not work, nor do floating point or vectors. + if (EltTy != Type::Int32Ty && EltTy != Type::Int64Ty && + !isa(EltTy)) + return true; + } + return false; +} /* LLVM LOCAL end (ENTIRE FILE!) */ Modified: llvm-gcc-4.2/trunk/gcc/config/rs6000/rs6000.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/rs6000/rs6000.h?rev=48059&r1=48058&r2=48059&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/rs6000/rs6000.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/rs6000/rs6000.h Sat Mar 8 17:55:59 2008 @@ -3473,6 +3473,13 @@ DESTTY, OPS) \ TargetIntrinsicLower(EXP, BUILTIN_CODE, DESTLOC, RESULT, DESTTY, OPS); +#ifdef LLVM_ABI_H +extern bool llvm_rs6000_should_pass_aggregate_byval(tree, const Type *); + +#define LLVM_SHOULD_PASS_AGGREGATE_USING_BYVAL_ATTR(X, TY) \ + llvm_rs6000_should_pass_aggregate_byval(X, TY) +#endif + /* LLVM LOCAL end */ enum rs6000_builtin_type_index From dalej at apple.com Sat Mar 8 17:58:00 2008 From: dalej at apple.com (Dale Johannesen) Date: Sat, 8 Mar 2008 15:58:00 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r48059 - in /llvm-gcc-4.2/trunk/gcc/config/rs6000: llvm-rs6000.cpp rs6000.h In-Reply-To: <200803082356.m28Nu0Fu014988@zion.cs.uiuc.edu> References: <200803082356.m28Nu0Fu014988@zion.cs.uiuc.edu> Message-ID: On Mar 8, 2008, at 3:56 PM, Dale Johannesen wrote: > > URL: http://llvm.org/viewvc/llvm-project?rev=48059&view=rev > Log: > Enable byval parameter passing for ppc32. There are still a few testsuite failures but it's much better than it was, and I think this is close enough to right to enable it. If anybody is using Elf ppc32, you might want to run some tests. I tried to take this into account but I can't test in that environment and it is unlikely I got everything right. From clattner at apple.com Sat Mar 8 17:59:37 2008 From: clattner at apple.com (Chris Lattner) Date: Sat, 8 Mar 2008 15:59:37 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r48059 - in /llvm-gcc-4.2/trunk/gcc/config/rs6000: llvm-rs6000.cpp rs6000.h In-Reply-To: References: <200803082356.m28Nu0Fu014988@zion.cs.uiuc.edu> Message-ID: <541F9667-F7DA-42A9-92DD-1BB8592DADEB@apple.com> On Mar 8, 2008, at 3:58 PM, Dale Johannesen wrote: > > On Mar 8, 2008, at 3:56 PM, Dale Johannesen wrote: >> >> URL: http://llvm.org/viewvc/llvm-project?rev=48059&view=rev >> Log: >> Enable byval parameter passing for ppc32. > > There are still a few testsuite failures but it's much better than it > was, and I think this is close enough to right to enable it. That's great Dale! -Chris From sabre at nondot.org Sat Mar 8 18:29:42 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 00:29:42 -0000 Subject: [llvm-commits] [llvm] r48060 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Message-ID: <200803090029.m290Tht7015895@zion.cs.uiuc.edu> Author: lattner Date: Sat Mar 8 18:29:42 2008 New Revision: 48060 URL: http://llvm.org/viewvc/llvm-project?rev=48060&view=rev Log: Fix two problems in SelectionDAGLegalize::ExpandBUILD_VECTOR's handling of BUILD_VECTORS that only have two unique elements: 1. The previous code was nondeterminstic, because it walked a map in SDOperand order, which isn't determinstic. 2. The previous code didn't handle the case when one element was undef very well. Now we ensure that the generated shuffle mask has the undef vector on the RHS (instead of potentially being on the LHS) and that any elements that refer to it are themselves undef. This allows us to compile CodeGen/X86/vec_set-9.ll into: _test3: movd %rdi, %xmm0 punpcklqdq %xmm0, %xmm0 ret instead of: _test3: movd %rdi, %xmm1 #IMPLICIT_DEF %xmm0 punpcklqdq %xmm1, %xmm0 ret .. saving a register. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=48060&r1=48059&r2=48060&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sat Mar 8 18:29:42 2008 @@ -4938,6 +4938,9 @@ unsigned NumElems = Node->getNumOperands(); bool isOnlyLowElement = true; SDOperand SplatValue = Node->getOperand(0); + + // FIXME: it would be far nicer to change this into map + // and use a bitmask instead of a list of elements. std::map > Values; Values[SplatValue].push_back(0); bool isConstant = true; @@ -5018,36 +5021,50 @@ // If there are only two unique elements, we may be able to turn this into a // vector shuffle. if (Values.size() == 2) { + // Get the two values in deterministic order. + SDOperand Val1 = Node->getOperand(1); + SDOperand Val2; + std::map >::iterator MI = Values.begin(); + if (MI->first != Val1) + Val2 = MI->first; + else + Val2 = (++MI)->first; + + // If Val1 is an undef, make sure end ends up as Val2, to ensure that our + // vector shuffle has the undef vector on the RHS. + if (Val1.getOpcode() == ISD::UNDEF) + std::swap(Val1, Val2); + // Build the shuffle constant vector: e.g. <0, 4, 0, 4> - MVT::ValueType MaskVT = - MVT::getIntVectorWithNumElements(NumElems); + MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); + MVT::ValueType MaskEltVT = MVT::getVectorElementType(MaskVT); std::vector MaskVec(NumElems); - unsigned i = 0; - for (std::map >::iterator I=Values.begin(), - E = Values.end(); I != E; ++I) { - for (std::vector::iterator II = I->second.begin(), - EE = I->second.end(); II != EE; ++II) - MaskVec[*II] = DAG.getConstant(i, MVT::getVectorElementType(MaskVT)); - i += NumElems; - } + + // Set elements of the shuffle mask for Val1. + std::vector &Val1Elts = Values[Val1]; + for (unsigned i = 0, e = Val1Elts.size(); i != e; ++i) + MaskVec[Val1Elts[i]] = DAG.getConstant(0, MaskEltVT); + + // Set elements of the shuffle mask for Val2. + std::vector &Val2Elts = Values[Val2]; + for (unsigned i = 0, e = Val2Elts.size(); i != e; ++i) + if (Val2.getOpcode() != ISD::UNDEF) + MaskVec[Val2Elts[i]] = DAG.getConstant(NumElems, MaskEltVT); + else + MaskVec[Val2Elts[i]] = DAG.getNode(ISD::UNDEF, MaskEltVT); + SDOperand ShuffleMask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0], MaskVec.size()); - // If the target supports VECTOR_SHUFFLE and this shuffle mask, use it. + // If the target supports SCALAR_TO_VECTOR and this shuffle mask, use it. if (TLI.isOperationLegal(ISD::SCALAR_TO_VECTOR, Node->getValueType(0)) && isShuffleLegal(Node->getValueType(0), ShuffleMask)) { - SmallVector Ops; - for(std::map >::iterator I=Values.begin(), - E = Values.end(); I != E; ++I) { - SDOperand Op = DAG.getNode(ISD::SCALAR_TO_VECTOR, Node->getValueType(0), - I->first); - Ops.push_back(Op); - } - Ops.push_back(ShuffleMask); + Val1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, Node->getValueType(0), Val1); + Val2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, Node->getValueType(0), Val2); + SDOperand Ops[] = { Val1, Val2, ShuffleMask }; // Return shuffle(LoValVec, HiValVec, <0,1,0,1>) - return DAG.getNode(ISD::VECTOR_SHUFFLE, Node->getValueType(0), - &Ops[0], Ops.size()); + return DAG.getNode(ISD::VECTOR_SHUFFLE, Node->getValueType(0), Ops, 3); } } From sabre at nondot.org Sat Mar 8 18:30:07 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 00:30:07 -0000 Subject: [llvm-commits] [llvm] r48061 - /llvm/trunk/test/CodeGen/X86/vec_set-9.ll Message-ID: <200803090030.m290U7Fe015921@zion.cs.uiuc.edu> Author: lattner Date: Sat Mar 8 18:30:06 2008 New Revision: 48061 URL: http://llvm.org/viewvc/llvm-project?rev=48061&view=rev Log: make this test harder Modified: llvm/trunk/test/CodeGen/X86/vec_set-9.ll Modified: llvm/trunk/test/CodeGen/X86/vec_set-9.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-9.ll?rev=48061&r1=48060&r2=48061&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_set-9.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_set-9.ll Sat Mar 8 18:30:06 2008 @@ -1,4 +1,5 @@ ; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | count 1 +; RUN: llvm-as < %s | llc -march=x86-64 | grep {punpcklqdq.*%xmm0, %xmm0} define <2 x i64> @test3(i64 %A) { entry: From sabre at nondot.org Sat Mar 8 18:32:10 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 00:32:10 -0000 Subject: [llvm-commits] [llvm] r48062 - /llvm/trunk/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll Message-ID: <200803090032.m290WA3A016001@zion.cs.uiuc.edu> Author: lattner Date: Sat Mar 8 18:32:10 2008 New Revision: 48062 URL: http://llvm.org/viewvc/llvm-project?rev=48062&view=rev Log: upgrade this test Modified: llvm/trunk/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll Modified: llvm/trunk/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll?rev=48062&r1=48061&r2=48062&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll (original) +++ llvm/trunk/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll Sat Mar 8 18:32:10 2008 @@ -1,6 +1,6 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 - -void %main() { - %tr1 = shr uint 1, ubyte 0 +; RUN: llvm-as < %s | llc -march=ppc32 +define void @test() { + %tr1 = lshr i32 1, 0 ; [#uses=0] ret void } + From sabre at nondot.org Sat Mar 8 19:05:04 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 01:05:04 -0000 Subject: [llvm-commits] [llvm] r48063 - in /llvm/trunk: lib/Target/X86/README-SSE.txt lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/vec_set-A.ll Message-ID: <200803090105.m29154xg017277@zion.cs.uiuc.edu> Author: lattner Date: Sat Mar 8 19:05:04 2008 New Revision: 48063 URL: http://llvm.org/viewvc/llvm-project?rev=48063&view=rev Log: Implement a readme entry, compiling #include __m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);} into: movl $1, %eax movd %eax, %xmm0 ret instead of a constant pool load. Added: llvm/trunk/test/CodeGen/X86/vec_set-A.ll Modified: llvm/trunk/lib/Target/X86/README-SSE.txt llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/README-SSE.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-SSE.txt?rev=48063&r1=48062&r2=48063&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-SSE.txt (original) +++ llvm/trunk/lib/Target/X86/README-SSE.txt Sat Mar 8 19:05:04 2008 @@ -782,23 +782,3 @@ //===---------------------------------------------------------------------===// -Take the following code: -#include -__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);} - -On x86, LLVM generates the following: -doload64: - subl $28, %esp - movl $0, 4(%esp) - movl $1, (%esp) - movq (%esp), %xmm0 - addl $28, %esp - ret - -LLVM should instead generate something more like the following: -doload64: - movl $1, %eax - movd %eax, %xmm0 - ret - -//===---------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=48063&r1=48062&r2=48063&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Mar 8 19:05:04 2008 @@ -2888,6 +2888,21 @@ return DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0], MaskVec.size()); } +/// getSwapEltZeroMask - Returns a vector_shuffle mask for a shuffle that swaps +/// element #0 of a vector with the specified index, leaving the rest of the +/// elements in place. +static SDOperand getSwapEltZeroMask(unsigned NumElems, unsigned DestElt, + SelectionDAG &DAG) { + MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); + MVT::ValueType BaseVT = MVT::getVectorElementType(MaskVT); + SmallVector MaskVec; + // Element #0 of the result gets the elt we are replacing. + MaskVec.push_back(DAG.getConstant(DestElt, BaseVT)); + for (unsigned i = 1; i != NumElems; ++i) + MaskVec.push_back(DAG.getConstant(i == DestElt ? 0 : i, BaseVT)); + return DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0], MaskVec.size()); +} + /// PromoteSplat - Promote a splat of v8i16 or v16i8 to v4i32. /// static SDOperand PromoteSplat(SDOperand Op, SelectionDAG &DAG) { @@ -2912,10 +2927,11 @@ /// vector of zero or undef vector. This produces a shuffle where the low /// element of V2 is swizzled into the zero/undef vector, landing at element /// Idx. This produces a shuffle mask like 4,1,2,3 (idx=0) or 0,1,2,4 (idx=3). -static SDOperand getShuffleVectorZeroOrUndef(SDOperand V2, MVT::ValueType VT, - unsigned NumElems, unsigned Idx, +static SDOperand getShuffleVectorZeroOrUndef(SDOperand V2, unsigned Idx, bool isZero, SelectionDAG &DAG) { + MVT::ValueType VT = V2.getValueType(); SDOperand V1 = isZero ? getZeroVector(VT, DAG) : DAG.getNode(ISD::UNDEF, VT); + unsigned NumElems = MVT::getVectorNumElements(V2.getValueType()); MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); MVT::ValueType EVT = MVT::getVectorElementType(MaskVT); SmallVector MaskVec; @@ -3056,6 +3072,37 @@ unsigned Idx = CountTrailingZeros_32(NonZeros); SDOperand Item = Op.getOperand(Idx); + // If this is an insertion of an i64 value on x86-32, and if the top bits of + // the value are obviously zero, truncate the value to i32 and do the + // insertion that way. Only do this if the value is non-constant or if the + // value is a constant being inserted into element 0. It is cheaper to do + // a constant pool load than it is to do a movd + shuffle. + if (EVT == MVT::i64 && !Subtarget->is64Bit() && + (!IsAllConstants || Idx == 0)) { + if (DAG.MaskedValueIsZero(Item, APInt::getBitsSet(64, 32, 64))) { + // Handle MMX and SSE both. + MVT::ValueType VecVT = VT == MVT::v2i64 ? MVT::v4i32 : MVT::v2i32; + MVT::ValueType VecElts = VT == MVT::v2i64 ? 4 : 2; + + // Truncate the value (which may itself be a constant) to i32, and + // convert it to a vector with movd (S2V+shuffle to zero extend). + Item = DAG.getNode(ISD::TRUNCATE, MVT::i32, Item); + Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, VecVT, Item); + Item = getShuffleVectorZeroOrUndef(Item, 0, true, DAG); + + // Now we have our 32-bit value zero extended in the low element of + // a vector. If Idx != 0, swizzle it into place. + if (Idx != 0) { + SDOperand Ops[] = { + Item, DAG.getNode(ISD::UNDEF, Item.getValueType()), + getSwapEltZeroMask(VecElts, Idx, DAG) + }; + Item = DAG.getNode(ISD::VECTOR_SHUFFLE, VecVT, Ops, 3); + } + return DAG.getNode(ISD::BIT_CONVERT, Op.getValueType(), Item); + } + } + // If we have a constant or non-constant insertion into the low element of // a vector, we can do this with SCALAR_TO_VECTOR + shuffle of zero into // the rest of the elements. This will be matched as movd/movq/movss/movsd @@ -3066,8 +3113,7 @@ (EVT != MVT::i64 || Subtarget->is64Bit())) { Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Item); // Turn it into a MOVL (i.e. movss, movsd, or movd) to a zero vector. - return getShuffleVectorZeroOrUndef(Item, VT, NumElems, Idx, - NumZero > 0, DAG); + return getShuffleVectorZeroOrUndef(Item, 0, NumZero > 0, DAG); } if (IsAllConstants) // Otherwise, it's better to do a constpool load. @@ -3082,8 +3128,7 @@ Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Item); // Turn it into a shuffle of zero and zero-extended scalar to vector. - Item = getShuffleVectorZeroOrUndef(Item, VT, NumElems, 0, NumZero > 0, - DAG); + Item = getShuffleVectorZeroOrUndef(Item, 0, NumZero > 0, DAG); MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); MVT::ValueType MaskEVT = MVT::getVectorElementType(MaskVT); SmallVector MaskVec; Added: llvm/trunk/test/CodeGen/X86/vec_set-A.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-A.ll?rev=48063&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_set-A.ll (added) +++ llvm/trunk/test/CodeGen/X86/vec_set-A.ll Sat Mar 8 19:05:04 2008 @@ -0,0 +1,6 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep {movl.*\$1, %} +define <2 x i64> @test1() { +entry: + ret <2 x i64> < i64 1, i64 0 > +} + From sabre at nondot.org Sat Mar 8 19:08:22 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 01:08:22 -0000 Subject: [llvm-commits] [llvm] r48064 - /llvm/trunk/lib/Target/X86/README-SSE.txt Message-ID: <200803090108.m2918NMD017365@zion.cs.uiuc.edu> Author: lattner Date: Sat Mar 8 19:08:22 2008 New Revision: 48064 URL: http://llvm.org/viewvc/llvm-project?rev=48064&view=rev Log: add a note Modified: llvm/trunk/lib/Target/X86/README-SSE.txt Modified: llvm/trunk/lib/Target/X86/README-SSE.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-SSE.txt?rev=48064&r1=48063&r2=48064&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-SSE.txt (original) +++ llvm/trunk/lib/Target/X86/README-SSE.txt Sat Mar 8 19:08:22 2008 @@ -782,3 +782,40 @@ //===---------------------------------------------------------------------===// +These two functions should compile to identical code on x86-32: + +define <2 x i64> @test2(i64 %arg) { +entry: + %A = and i64 %arg, 1234567 + %B = insertelement <2 x i64> undef, i64 %A, i32 0 + ret <2 x i64> %B +} + +define <2 x i64> @test2(i64 %arg) { +entry: + %A = and i64 %arg, 1234567 + %B = insertelement <2 x i64> zeroinitializer, i64 %A, i32 0 + ret <2 x i64> %B +} + +The later compiles to: + +_test2: + movl $1234567, %eax + andl 4(%esp), %eax + movd %eax, %xmm0 + ret + +the former compiles to: + +_test2: + subl $28, %esp + movl $1234567, %eax + andl 32(%esp), %eax + movl %eax, (%esp) + movl $0, 4(%esp) + movaps (%esp), %xmm0 + addl $28, %esp + ret + +//===---------------------------------------------------------------------===// From nicholas at mxc.ca Sat Mar 8 22:55:17 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 09 Mar 2008 04:55:17 -0000 Subject: [llvm-commits] [llvm] r48084 - in /llvm/trunk: lib/Transforms/IPO/PruneEH.cpp test/Transforms/PruneEH/unwindto.ll Message-ID: <200803090455.m294tHn2023871@zion.cs.uiuc.edu> Author: nicholas Date: Sat Mar 8 22:55:16 2008 New Revision: 48084 URL: http://llvm.org/viewvc/llvm-project?rev=48084&view=rev Log: Prune the unwind_to labels on BBs that don't need them. Another step in the removal of invoke, PR1269. Added: llvm/trunk/test/Transforms/PruneEH/unwindto.ll Modified: llvm/trunk/lib/Transforms/IPO/PruneEH.cpp Modified: llvm/trunk/lib/Transforms/IPO/PruneEH.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PruneEH.cpp?rev=48084&r1=48083&r2=48084&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/PruneEH.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/PruneEH.cpp Sat Mar 8 22:55:16 2008 @@ -32,6 +32,7 @@ STATISTIC(NumRemoved, "Number of invokes removed"); STATISTIC(NumUnreach, "Number of noreturn calls optimized"); +STATISTIC(NumBBUnwind, "Number of unwind_to removed from blocks"); namespace { struct VISIBILITY_HIDDEN PruneEH : public CallGraphSCCPass { @@ -153,6 +154,8 @@ bool PruneEH::SimplifyFunction(Function *F) { bool MadeChange = false; for (Function::iterator BB = F->begin(), E = F->end(); BB != E; ++BB) { + bool couldUnwind = false; + if (InvokeInst *II = dyn_cast(BB->getTerminator())) if (II->doesNotThrow()) { SmallVector Args(II->op_begin()+3, II->op_end()); @@ -182,10 +185,11 @@ ++NumRemoved; MadeChange = true; - } + } else + couldUnwind = true; for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ) - if (CallInst *CI = dyn_cast(I++)) + if (CallInst *CI = dyn_cast(I++)) { if (CI->doesNotReturn() && !isa(I)) { // This call calls a function that cannot return. Insert an // unreachable instruction after it and simplify the code. Do this @@ -201,8 +205,17 @@ MadeChange = true; ++NumUnreach; break; - } + } else if (!CI->doesNotThrow()) + couldUnwind = true; + } + // Strip 'unwindTo' off of BBs that have no calls/invokes without nounwind. + if (!couldUnwind && BB->getUnwindDest()) { + MadeChange = true; + ++NumBBUnwind; + BB->getUnwindDest()->removePredecessor(BB, false, true); + BB->setUnwindDest(NULL); + } } return MadeChange; } Added: llvm/trunk/test/Transforms/PruneEH/unwindto.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PruneEH/unwindto.ll?rev=48084&view=auto ============================================================================== --- llvm/trunk/test/Transforms/PruneEH/unwindto.ll (added) +++ llvm/trunk/test/Transforms/PruneEH/unwindto.ll Sat Mar 8 22:55:16 2008 @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | opt -prune-eh | llvm-dis | not grep unwind_to + +define i8 @test7(i1 %b) { +entry: unwind_to %cleanup + br i1 %b, label %cond_true, label %cond_false +cond_true: unwind_to %cleanup + br label %cleanup +cond_false: unwind_to %cleanup + br label %cleanup +cleanup: + %x = phi i8 [0, %entry], [1, %cond_true], [1, %cond_true], + [2, %cond_false], [2, %cond_false] + ret i8 %x +} + From nicholas at mxc.ca Sat Mar 8 23:04:48 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 09 Mar 2008 05:04:48 -0000 Subject: [llvm-commits] [llvm] r48085 - in /llvm/trunk: include/llvm/BasicBlock.h lib/Transforms/Utils/BasicBlockUtils.cpp lib/VMCore/BasicBlock.cpp Message-ID: <200803090504.m2954m6X024263@zion.cs.uiuc.edu> Author: nicholas Date: Sat Mar 8 23:04:48 2008 New Revision: 48085 URL: http://llvm.org/viewvc/llvm-project?rev=48085&view=rev Log: Two things. Preserve the unwind_to when splitting a BB. Add the ability to remove just one instance of a BB from a phi node. This fixes the compile error in the tree now. Modified: llvm/trunk/include/llvm/BasicBlock.h llvm/trunk/lib/Transforms/Utils/BasicBlockUtils.cpp llvm/trunk/lib/VMCore/BasicBlock.cpp Modified: llvm/trunk/include/llvm/BasicBlock.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/BasicBlock.h?rev=48085&r1=48084&r2=48085&view=diff ============================================================================== --- llvm/trunk/include/llvm/BasicBlock.h (original) +++ llvm/trunk/include/llvm/BasicBlock.h Sat Mar 8 23:04:48 2008 @@ -185,7 +185,11 @@ /// DontDeleteUselessPHIs will keep PHIs that have one value or the same /// value for all entries. /// - void removePredecessor(BasicBlock *Pred, bool DontDeleteUselessPHIs = false); + /// OnlyDeleteOne will only remove one entry from a PHI, in case there were + /// duplicate entries for the Pred. + /// + void removePredecessor(BasicBlock *Pred, bool DontDeleteUselessPHIs = false, + bool OnlyDeleteOne = false); /// splitBasicBlock - This splits a basic block into two at the specified /// instruction. Note that all instructions BEFORE the specified iterator Modified: llvm/trunk/lib/Transforms/Utils/BasicBlockUtils.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/BasicBlockUtils.cpp?rev=48085&r1=48084&r2=48085&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/BasicBlockUtils.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/BasicBlockUtils.cpp Sat Mar 8 23:04:48 2008 @@ -160,6 +160,7 @@ while (isa(SplitIt)) ++SplitIt; BasicBlock *New = Old->splitBasicBlock(SplitIt, Old->getName()+".split"); + New->setUnwindDest(Old->getUnwindDest()); // The new block lives in whichever loop the old one did. if (Loop *L = LI.getLoopFor(Old)) Modified: llvm/trunk/lib/VMCore/BasicBlock.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/BasicBlock.cpp?rev=48085&r1=48084&r2=48085&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/BasicBlock.cpp (original) +++ llvm/trunk/lib/VMCore/BasicBlock.cpp Sat Mar 8 23:04:48 2008 @@ -188,14 +188,12 @@ /// called while the predecessor still refers to this block. /// void BasicBlock::removePredecessor(BasicBlock *Pred, - bool DontDeleteUselessPHIs) { + bool DontDeleteUselessPHIs, + bool OnlyDeleteOne) { assert((hasNUsesOrMore(16)||// Reduce cost of this assertion for complex CFGs. find(pred_begin(this), pred_end(this), Pred) != pred_end(this)) && "removePredecessor: BB is not a predecessor!"); - if (Pred == getUnwindDest()) - setUnwindDest(NULL); - if (InstList.empty()) return; PHINode *APN = dyn_cast(&front()); if (!APN) return; // Quick exit. @@ -226,7 +224,11 @@ // Yup, loop through and nuke the PHI nodes while (PHINode *PN = dyn_cast(&front())) { // Remove the predecessor first. - PN->removeIncomingValue(Pred, !DontDeleteUselessPHIs); + if (OnlyDeleteOne) { + int idx = PN->getBasicBlockIndex(Pred); + PN->removeIncomingValue(idx, !DontDeleteUselessPHIs); + } else + PN->removeIncomingValue(Pred, !DontDeleteUselessPHIs); // If the PHI _HAD_ two uses, replace PHI node with its now *single* value if (max_idx == 2) { @@ -247,7 +249,12 @@ PHINode *PN; for (iterator II = begin(); (PN = dyn_cast(II)); ) { ++II; - PN->removeIncomingValue(Pred, false); + if (OnlyDeleteOne) { + int idx = PN->getBasicBlockIndex(Pred); + PN->removeIncomingValue(idx, false); + } else + PN->removeIncomingValue(Pred, false); + // If all incoming values to the Phi are the same, we can replace the Phi // with that value. Value* PNV = 0; From nicholas at mxc.ca Sat Mar 8 23:10:13 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 09 Mar 2008 05:10:13 -0000 Subject: [llvm-commits] [llvm] r48086 - in /llvm/trunk: lib/Transforms/Utils/InlineFunction.cpp lib/Transforms/Utils/SimplifyCFG.cpp test/Transforms/Inline/unwindto.ll test/Transforms/SimplifyCFG/unwindto.ll Message-ID: <200803090510.m295ADgR024413@zion.cs.uiuc.edu> Author: nicholas Date: Sat Mar 8 23:10:13 2008 New Revision: 48086 URL: http://llvm.org/viewvc/llvm-project?rev=48086&view=rev Log: Update the inliner and simplifycfg to handle unwind_to. Added: llvm/trunk/test/Transforms/Inline/unwindto.ll llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp?rev=48086&r1=48085&r2=48086&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Sat Mar 8 23:10:13 2008 @@ -202,6 +202,7 @@ BasicBlock *OrigBB = TheCall->getParent(); Function *Caller = OrigBB->getParent(); + BasicBlock *UnwindBB = OrigBB->getUnwindDest(); // GC poses two hazards to inlining, which only occur when the callee has GC: // 1. If the caller has no GC, then the callee's GC must be propagated to the @@ -419,6 +420,18 @@ } } + // If we are inlining a function that unwinds into a BB with an unwind dest, + // turn the inlined unwinds into branches to the unwind dest. + if (InlinedFunctionInfo.ContainsUnwinds && UnwindBB && isa(TheCall)) + for (Function::iterator BB = FirstNewBlock, E = Caller->end(); + BB != E; ++BB) { + TerminatorInst *Term = BB->getTerminator(); + if (isa(Term)) { + new BranchInst(UnwindBB, Term); + BB->getInstList().erase(Term); + } + } + // If we are inlining for an invoke instruction, we must make sure to rewrite // any inlined 'unwind' instructions into branches to the invoke exception // destination, and call instructions into invoke instructions. Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=48086&r1=48085&r2=48086&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Sat Mar 8 23:10:13 2008 @@ -1237,6 +1237,8 @@ SmallVector UncondBranchPreds; SmallVector CondBranchPreds; for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) { + if ((*PI)->getUnwindDest() == BB) continue; + TerminatorInst *PTI = (*PI)->getTerminator(); if (BranchInst *BI = dyn_cast(PTI)) { if (BI->isUnconditional()) @@ -1788,6 +1790,7 @@ BasicBlock *OnlySucc = 0; if (OnlyPred && OnlyPred != BB && // Don't break self loops + OnlyPred->getUnwindDest() != BB && OnlyPred->getTerminator()->getOpcode() != Instruction::Invoke) { // Check to see if there is only one distinct successor... succ_iterator SI(succ_begin(OnlyPred)), SE(succ_end(OnlyPred)); @@ -1799,7 +1802,8 @@ } } - if (OnlySucc) { + if (OnlySucc && (BB->getUnwindDest() == OnlyPred->getUnwindDest() || + !BB->getUnwindDest() || !OnlyPred->getUnwindDest())) { DOUT << "Merging: " << *BB << "into: " << *OnlyPred; // Resolve any PHI nodes at the start of the block. They are all @@ -1819,6 +1823,10 @@ // Move all definitions in the successor to the predecessor. OnlyPred->getInstList().splice(OnlyPred->end(), BB->getInstList()); + // Move the unwind_to block + if (!OnlyPred->getUnwindDest() && BB->getUnwindDest()) + OnlyPred->setUnwindDest(BB->getUnwindDest()); + // Make all PHI nodes that referred to BB now refer to Pred as their // source. BB->replaceAllUsesWith(OnlyPred); Added: llvm/trunk/test/Transforms/Inline/unwindto.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/unwindto.ll?rev=48086&view=auto ============================================================================== --- llvm/trunk/test/Transforms/Inline/unwindto.ll (added) +++ llvm/trunk/test/Transforms/Inline/unwindto.ll Sat Mar 8 23:10:13 2008 @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | opt -inline | llvm-dis | grep "br label %cleanup" + +define void @g() { + unwind +} + +define i32 @f1() { +entry: unwind_to %cleanup + call void @g() + ret i32 0 +cleanup: + ret i32 1 +} Added: llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll?rev=48086&view=auto ============================================================================== --- llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll (added) +++ llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll Sat Mar 8 23:10:13 2008 @@ -0,0 +1,35 @@ +; RUN: llvm-as < %s | opt -simplifycfg | llvm-dis | grep unwind_to | count 3 + +declare void @g(i32) + +define i32 @f1() { +entry: + br label %bb1 +bb1: unwind_to %cleanup1 + call void @g(i32 0) + br label %bb2 +bb2: unwind_to %cleanup2 + call void @g(i32 1) + br label %exit +exit: + ret i32 0 +cleanup1: + ret i32 1 +cleanup2: + ret i32 2 +} + +define i32 @f2() { +entry: unwind_to %cleanup + br label %bb1 +bb1: unwind_to %cleanup + br label %bb2 +bb2: unwind_to %cleanup + br label %bb3 +bb3: + br label %bb4 +bb4: unwind_to %cleanup + ret i32 0 +cleanup: + ret i32 1 +} From nicholas at mxc.ca Sat Mar 8 23:24:34 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 09 Mar 2008 05:24:34 -0000 Subject: [llvm-commits] [llvm] r48088 - in /llvm/trunk: include/llvm/Analysis/LoopInfo.h lib/Transforms/Scalar/LoopUnroll.cpp lib/Transforms/Scalar/LoopUnswitch.cpp lib/Transforms/Utils/CloneFunction.cpp lib/Transforms/Utils/CloneLoop.cpp lib/Transforms/Utils/CloneTrace.cpp lib/Transforms/Utils/LoopSimplify.cpp Message-ID: <200803090524.m295OZ0X024942@zion.cs.uiuc.edu> Author: nicholas Date: Sat Mar 8 23:24:34 2008 New Revision: 48088 URL: http://llvm.org/viewvc/llvm-project?rev=48088&view=rev Log: Update the block cloner which fixes bugpoint on code using unwind_to (phew!) and also update the cloning interface's major user, the loop optimizations. Modified: llvm/trunk/include/llvm/Analysis/LoopInfo.h llvm/trunk/lib/Transforms/Scalar/LoopUnroll.cpp llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp llvm/trunk/lib/Transforms/Utils/CloneLoop.cpp llvm/trunk/lib/Transforms/Utils/CloneTrace.cpp llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp Modified: llvm/trunk/include/llvm/Analysis/LoopInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LoopInfo.h?rev=48088&r1=48087&r2=48088&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/LoopInfo.h (original) +++ llvm/trunk/include/llvm/Analysis/LoopInfo.h Sat Mar 8 23:24:34 2008 @@ -118,8 +118,8 @@ block_iterator block_begin() const { return Blocks.begin(); } block_iterator block_end() const { return Blocks.end(); } - /// isLoopExit - True if terminator in the block can branch to another block - /// that is outside of the current loop. + /// isLoopExit - True if this block can branch to another block that is + /// outside of the current loop. /// bool isLoopExit(const BlockT *BB) const { typedef GraphTraits BlockTraits; Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnroll.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnroll.cpp?rev=48088&r1=48087&r2=48088&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopUnroll.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopUnroll.cpp Sat Mar 8 23:24:34 2008 @@ -396,10 +396,14 @@ } // Remap all instructions in the most recent iteration - for (unsigned i = 0; i < NewBlocks.size(); ++i) - for (BasicBlock::iterator I = NewBlocks[i]->begin(), - E = NewBlocks[i]->end(); I != E; ++I) + for (unsigned i = 0; i < NewBlocks.size(); ++i) { + BasicBlock *NB = NewBlocks[i]; + if (BasicBlock *UnwindDest = NB->getUnwindDest()) + NB->setUnwindDest(cast(LastValueMap[UnwindDest])); + + for (BasicBlock::iterator I = NB->begin(), E = NB->end(); I != E; ++I) RemapInstruction(I, LastValueMap); + } } // The latch block exits the loop. If there are any PHI nodes in the Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp?rev=48088&r1=48087&r2=48088&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Sat Mar 8 23:24:34 2008 @@ -819,10 +819,14 @@ } // Rewrite the code to refer to itself. - for (unsigned i = 0, e = NewBlocks.size(); i != e; ++i) - for (BasicBlock::iterator I = NewBlocks[i]->begin(), - E = NewBlocks[i]->end(); I != E; ++I) + for (unsigned i = 0, e = NewBlocks.size(); i != e; ++i) { + BasicBlock *NB = NewBlocks[i]; + if (BasicBlock *UnwindDest = NB->getUnwindDest()) + NB->setUnwindDest(cast(ValueMap[UnwindDest])); + + for (BasicBlock::iterator I = NB->begin(), E = NB->end(); I != E; ++I) RemapInstruction(I, ValueMap); + } // Rewrite the original preheader to select between versions of the loop. BranchInst *OldBR = cast(OrigPreheader->getTerminator()); Modified: llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp?rev=48088&r1=48087&r2=48088&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp Sat Mar 8 23:24:34 2008 @@ -33,6 +33,7 @@ ClonedCodeInfo *CodeInfo) { BasicBlock *NewBB = new BasicBlock("", F); if (BB->hasName()) NewBB->setName(BB->getName()+NameSuffix); + NewBB->setUnwindDest(const_cast(BB->getUnwindDest())); bool hasCalls = false, hasDynamicAllocas = false, hasStaticAllocas = false; @@ -103,10 +104,15 @@ // references as we go. This uses ValueMap to do all the hard work. // for (Function::iterator BB = cast(ValueMap[OldFunc->begin()]), - BE = NewFunc->end(); BB != BE; ++BB) + BE = NewFunc->end(); BB != BE; ++BB) { + // Fix up the unwind_to label. + if (BasicBlock *UnwindDest = BB->getUnwindDest()) + BB->setUnwindDest(cast(ValueMap[UnwindDest])); + // Loop over all instructions, fixing each one as we find it... for (BasicBlock::iterator II = BB->begin(); II != BB->end(); ++II) RemapInstruction(II, ValueMap); + } } /// CloneFunction - Return a copy of the specified function, but without Modified: llvm/trunk/lib/Transforms/Utils/CloneLoop.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CloneLoop.cpp?rev=48088&r1=48087&r2=48088&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CloneLoop.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CloneLoop.cpp Sat Mar 8 23:24:34 2008 @@ -130,6 +130,10 @@ for(SmallVector::iterator NBItr = NewBlocks.begin(), NBE = NewBlocks.end(); NBItr != NBE; ++NBItr) { BasicBlock *NB = *NBItr; + + if (BasicBlock *UnwindDest = NB->getUnwindDest()) + NB->setUnwindDest(cast(ValueMap[UnwindDest])); + for(BasicBlock::iterator BI = NB->begin(), BE = NB->end(); BI != BE; ++BI) { Instruction *Insn = BI; Modified: llvm/trunk/lib/Transforms/Utils/CloneTrace.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CloneTrace.cpp?rev=48088&r1=48087&r2=48088&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CloneTrace.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CloneTrace.cpp Sat Mar 8 23:24:34 2008 @@ -68,6 +68,11 @@ //Second loop to do the remapping for (std::vector::const_iterator BB = clonedTrace.begin(), BE = clonedTrace.end(); BB != BE; ++BB) { + + //Remap the unwind_to label + if (BasicBlock *UnwindDest = (*BB)->getUnwindDest()) + (*BB)->setUnwindDest(cast(ValueMap[UnwindDest])); + for (BasicBlock::iterator I = (*BB)->begin(); I != (*BB)->end(); ++I) { //Loop over all the operands of the instruction for (unsigned op=0, E = I->getNumOperands(); op != E; ++op) { Modified: llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp?rev=48088&r1=48087&r2=48088&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp Sat Mar 8 23:24:34 2008 @@ -126,18 +126,17 @@ if (LI->getLoopFor(BB)) continue; bool BlockUnreachable = false; - TerminatorInst *TI = BB->getTerminator(); // Check to see if any successors of this block are non-loop-header loops // that are not the header. - for (unsigned i = 0, e = TI->getNumSuccessors(); i != e; ++i) { + for (succ_iterator I = succ_begin(BB), E = succ_end(BB); I != E; ++I) { // If this successor is not in a loop, BB is clearly ok. - Loop *L = LI->getLoopFor(TI->getSuccessor(i)); + Loop *L = LI->getLoopFor(*I); if (!L) continue; // If the succ is the loop header, and if L is a top-level loop, then this // is an entrance into a loop through the header, which is also ok. - if (L->getHeader() == TI->getSuccessor(i) && L->getParentLoop() == 0) + if (L->getHeader() == *I && L->getParentLoop() == 0) continue; // Otherwise, this is an entrance into a loop from some place invalid. @@ -155,10 +154,11 @@ // loop by replacing the terminator. // Remove PHI entries from the successors. - for (unsigned i = 0, e = TI->getNumSuccessors(); i != e; ++i) - TI->getSuccessor(i)->removePredecessor(BB); + for (succ_iterator I = succ_begin(BB), E = succ_end(BB); I != E; ++I) + (*I)->removePredecessor(BB); // Add a new unreachable instruction before the old terminator. + TerminatorInst *TI = BB->getTerminator(); new UnreachableInst(TI); // Delete the dead terminator. @@ -342,6 +342,9 @@ for (unsigned s = 0, e = TI->getNumSuccessors(); s != e; ++s) if (TI->getSuccessor(s) == BB) TI->setSuccessor(s, NewBB); + + if (Preds[i]->getUnwindDest() == BB) + Preds[i]->setUnwindDest(NewBB); } } else { // Otherwise the loop is dead... @@ -681,12 +684,15 @@ } // Now that all of the PHI nodes have been inserted and adjusted, modify the - // backedge blocks to just to the BEBlock instead of the header. + // backedge blocks to branch to the BEBlock instead of the header. for (unsigned i = 0, e = BackedgeBlocks.size(); i != e; ++i) { TerminatorInst *TI = BackedgeBlocks[i]->getTerminator(); for (unsigned Op = 0, e = TI->getNumSuccessors(); Op != e; ++Op) if (TI->getSuccessor(Op) == Header) TI->setSuccessor(Op, BEBlock); + + if (BackedgeBlocks[i]->getUnwindDest() == Header) + BackedgeBlocks[i]->setUnwindDest(BEBlock); } //===--- Update all analyses which we must preserve now -----------------===// From sabre at nondot.org Sat Mar 8 23:42:06 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 05:42:06 -0000 Subject: [llvm-commits] [llvm] r48090 - in /llvm/trunk: lib/Target/X86/README-SSE.txt lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/vec_set-B.ll Message-ID: <200803090542.m295g6YZ025480@zion.cs.uiuc.edu> Author: lattner Date: Sat Mar 8 23:42:06 2008 New Revision: 48090 URL: http://llvm.org/viewvc/llvm-project?rev=48090&view=rev Log: Finish implementing a readme entry: when inserting an i64 variable into a vector of zeros or undef, and when the top part is obviously zero, we can just use movd + shuffle. This allows us to compile vec_set-B.ll into: _test3: movl $1234567, %eax andl 4(%esp), %eax movd %eax, %xmm0 ret instead of: _test3: subl $28, %esp movl $1234567, %eax andl 32(%esp), %eax movl %eax, (%esp) movl $0, 4(%esp) movq (%esp), %xmm0 addl $28, %esp ret Added: llvm/trunk/test/CodeGen/X86/vec_set-B.ll Modified: llvm/trunk/lib/Target/X86/README-SSE.txt llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/README-SSE.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-SSE.txt?rev=48090&r1=48089&r2=48090&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-SSE.txt (original) +++ llvm/trunk/lib/Target/X86/README-SSE.txt Sat Mar 8 23:42:06 2008 @@ -781,41 +781,3 @@ just a matter of matching (scalar_to_vector (load x)) to movd. //===---------------------------------------------------------------------===// - -These two functions should compile to identical code on x86-32: - -define <2 x i64> @test2(i64 %arg) { -entry: - %A = and i64 %arg, 1234567 - %B = insertelement <2 x i64> undef, i64 %A, i32 0 - ret <2 x i64> %B -} - -define <2 x i64> @test2(i64 %arg) { -entry: - %A = and i64 %arg, 1234567 - %B = insertelement <2 x i64> zeroinitializer, i64 %A, i32 0 - ret <2 x i64> %B -} - -The later compiles to: - -_test2: - movl $1234567, %eax - andl 4(%esp), %eax - movd %eax, %xmm0 - ret - -the former compiles to: - -_test2: - subl $28, %esp - movl $1234567, %eax - andl 32(%esp), %eax - movl %eax, (%esp) - movl $0, 4(%esp) - movaps (%esp), %xmm0 - addl $28, %esp - ret - -//===---------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=48090&r1=48089&r2=48090&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Mar 8 23:42:06 2008 @@ -3063,11 +3063,7 @@ return DAG.getNode(ISD::UNDEF, VT); } - // Splat is obviously ok. Let legalizer expand it to a shuffle. - if (Values.size() == 1) - return SDOperand(); - - // Special case for single non-zero element. + // Special case for single non-zero, non-undef, element. if (NumNonZero == 1 && NumElems <= 4) { unsigned Idx = CountTrailingZeros_32(NonZeros); SDOperand Item = Op.getOperand(Idx); @@ -3141,6 +3137,10 @@ } } + // Splat is obviously ok. Let legalizer expand it to a shuffle. + if (Values.size() == 1) + return SDOperand(); + // A vector full of immediates; various special cases are already // handled, so this is best done with a single constant-pool load. if (IsAllConstants) Added: llvm/trunk/test/CodeGen/X86/vec_set-B.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-B.ll?rev=48090&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_set-B.ll (added) +++ llvm/trunk/test/CodeGen/X86/vec_set-B.ll Sat Mar 8 23:42:06 2008 @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -march=x86 | not grep movaps +; RUN: llvm-as < %s | llc -march=x86 | grep esp | count 2 + +; These should both generate something like this: +;_test3: +; movl $1234567, %eax +; andl 4(%esp), %eax +; movd %eax, %xmm0 +; ret + +define <2 x i64> @test3(i64 %arg) { +entry: + %A = and i64 %arg, 1234567 + %B = insertelement <2 x i64> zeroinitializer, i64 %A, i32 0 + ret <2 x i64> %B +} + +define <2 x i64> @test2(i64 %arg) { +entry: + %A = and i64 %arg, 1234567 + %B = insertelement <2 x i64> undef, i64 %A, i32 0 + ret <2 x i64> %B +} + From sabre at nondot.org Sun Mar 9 00:57:22 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 06:57:22 -0000 Subject: [llvm-commits] [llvm] r48092 - /llvm/trunk/test/CodeGen/X86/pr1505b.ll Message-ID: <200803090657.m296vM6V027506@zion.cs.uiuc.edu> Author: lattner Date: Sun Mar 9 00:57:21 2008 New Revision: 48092 URL: http://llvm.org/viewvc/llvm-project?rev=48092&view=rev Log: reduce this testcase more Modified: llvm/trunk/test/CodeGen/X86/pr1505b.ll Modified: llvm/trunk/test/CodeGen/X86/pr1505b.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr1505b.ll?rev=48092&r1=48091&r2=48092&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/pr1505b.ll (original) +++ llvm/trunk/test/CodeGen/X86/pr1505b.ll Sun Mar 9 00:57:21 2008 @@ -23,20 +23,6 @@ @_ZSt4cout = external global %"struct.std::basic_ostream >" ; <%"struct.std::basic_ostream >"*> [#uses=2] @.str = internal constant [12 x i8] c"tan float: \00" ; <[12 x i8]*> [#uses=1] @.str1 = internal constant [13 x i8] c"tan double: \00" ; <[13 x i8]*> [#uses=1] - at llvm.global_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @_GLOBAL__I_a } ] ; <[1 x { i32, void ()* }]*> [#uses=0] - -define internal void @_GLOBAL__I_a() section "__TEXT,__StaticInit,regular,pure_instructions" { -entry: - tail call void @_ZNSt8ios_base4InitC1Ev( %"struct.std::ctype_base"* @_ZSt8__ioinit ) - %tmp10.i = tail call i32 @__cxa_atexit( void (i8*)* @__tcf_0, i8* null, i8* bitcast (i8** @__dso_handle to i8*) ) ; [#uses=0] - ret void -} - -define internal void @__tcf_0(i8* %unnamed_arg) { -entry: - tail call void @_ZNSt8ios_base4InitD1Ev( %"struct.std::ctype_base"* @_ZSt8__ioinit ) - ret void -} declare void @_ZNSt8ios_base4InitD1Ev(%"struct.std::ctype_base"*) From sabre at nondot.org Sun Mar 9 01:05:33 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 07:05:33 -0000 Subject: [llvm-commits] [llvm] r48093 - in /llvm/trunk/lib/Target/X86: X86FloatingPoint.cpp X86ISelDAGToDAG.cpp X86ISelLowering.cpp X86ISelLowering.h X86InstrFPStack.td Message-ID: <200803090705.m2975X7B027736@zion.cs.uiuc.edu> Author: lattner Date: Sun Mar 9 01:05:32 2008 New Revision: 48093 URL: http://llvm.org/viewvc/llvm-project?rev=48093&view=rev Log: rename FpGETRESULT32 -> FpGET_ST0_32 etc. Add support for isel'ing value preserving FP roundings from one fp stack reg to another into a noop, instead of stack traffic. Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h llvm/trunk/lib/Target/X86/X86InstrFPStack.td Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp?rev=48093&r1=48092&r2=48093&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp (original) +++ llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Sun Mar 9 01:05:32 2008 @@ -214,7 +214,7 @@ MachineInstr *PrevMI = 0; if (I != BB.begin()) - PrevMI = prior(I); + PrevMI = prior(I); ++NumFP; // Keep track of # of pseudo instrs DOUT << "\nFPInst:\t" << *MI; @@ -917,13 +917,13 @@ MachineInstr *MI = I; switch (MI->getOpcode()) { default: assert(0 && "Unknown SpecialFP instruction!"); - case X86::FpGETRESULT32: // Appears immediately after a call returning FP type! - case X86::FpGETRESULT64: // Appears immediately after a call returning FP type! - case X86::FpGETRESULT80: + case X86::FpGET_ST0_32:// Appears immediately after a call returning FP type! + case X86::FpGET_ST0_64:// Appears immediately after a call returning FP type! + case X86::FpGET_ST0_80:// Appears immediately after a call returning FP type! assert(StackTop == 0 && "Stack should be empty after a call!"); pushReg(getFPReg(MI->getOperand(0))); break; - case X86::FpGETRESULT80x2: + case X86::FpGET_ST0_ST1: assert(StackTop == 0 && "Stack should be empty after a call!"); pushReg(getFPReg(MI->getOperand(0))); pushReg(getFPReg(MI->getOperand(1))); Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=48093&r1=48092&r2=48093&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Sun Mar 9 01:05:32 2008 @@ -486,10 +486,15 @@ if (SrcIsSSE && DstIsSSE) continue; - // If this is an FPStack extension (but not a truncation), it is a noop. - if (!SrcIsSSE && !DstIsSSE && N->getOpcode() == ISD::FP_EXTEND) - continue; - + if (!SrcIsSSE && !DstIsSSE) { + // If this is an FPStack extension, it is a noop. + if (N->getOpcode() == ISD::FP_EXTEND) + continue; + // If this is a value-preserving FPStack truncation, it is a noop. + if (N->getConstantOperandVal(1)) + continue; + } + // Here we could have an FP stack truncation or an FPStack <-> SSE convert. // FPStack has extload and truncstore. SSE can fold direct loads into other // operations. Based on this, decide what we want to do. @@ -1150,7 +1155,7 @@ case X86ISD::GlobalBaseReg: return getGlobalBaseReg(); - case X86ISD::FP_GET_RESULT2: { + case X86ISD::FP_GET_ST0_ST1: { SDOperand Chain = N.getOperand(0); SDOperand InFlag = N.getOperand(1); AddToISelQueue(Chain); @@ -1161,7 +1166,7 @@ Tys.push_back(MVT::Other); Tys.push_back(MVT::Flag); SDOperand Ops[] = { Chain, InFlag }; - SDNode *ResNode = CurDAG->getTargetNode(X86::FpGETRESULT80x2, Tys, + SDNode *ResNode = CurDAG->getTargetNode(X86::FpGET_ST0_ST1, Tys, Ops, 2); Chain = SDOperand(ResNode, 2); InFlag = SDOperand(ResNode, 3); Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=48093&r1=48092&r2=48093&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Mar 9 01:05:32 2008 @@ -917,9 +917,8 @@ if (isScalarFPTypeInSSEReg(GetResultTy)) GetResultTy = MVT::f80; SDVTList Tys = DAG.getVTList(GetResultTy, MVT::Other, MVT::Flag); - SDOperand GROps[] = { Chain, InFlag }; - SDOperand RetVal = DAG.getNode(X86ISD::FP_GET_RESULT, Tys, GROps, 2); + SDOperand RetVal = DAG.getNode(X86ISD::FP_GET_ST0, Tys, GROps, 2); Chain = RetVal.getValue(1); InFlag = RetVal.getValue(2); @@ -969,7 +968,7 @@ const MVT::ValueType VTs[] = { MVT::f80, MVT::f80, MVT::Other, MVT::Flag }; SDVTList Tys = DAG.getVTList(VTs, 4); SDOperand Ops[] = { Chain, InFlag }; - SDOperand RetVal = DAG.getNode(X86ISD::FP_GET_RESULT2, Tys, Ops, 2); + SDOperand RetVal = DAG.getNode(X86ISD::FP_GET_ST0_ST1, Tys, Ops, 2); Chain = RetVal.getValue(2); SDOperand FIN = TheCall->getOperand(5); Chain = DAG.getStore(Chain, RetVal.getValue(1), FIN, NULL, 0); @@ -5564,8 +5563,8 @@ case X86ISD::FP_TO_INT64_IN_MEM: return "X86ISD::FP_TO_INT64_IN_MEM"; case X86ISD::FLD: return "X86ISD::FLD"; case X86ISD::FST: return "X86ISD::FST"; - case X86ISD::FP_GET_RESULT: return "X86ISD::FP_GET_RESULT"; - case X86ISD::FP_GET_RESULT2: return "X86ISD::FP_GET_RESULT2"; + case X86ISD::FP_GET_ST0: return "X86ISD::FP_GET_ST0"; + case X86ISD::FP_GET_ST0_ST1: return "X86ISD::FP_GET_ST0_ST1"; case X86ISD::FP_SET_RESULT: return "X86ISD::FP_SET_RESULT"; case X86ISD::CALL: return "X86ISD::CALL"; case X86ISD::TAILCALL: return "X86ISD::TAILCALL"; Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=48093&r1=48092&r2=48093&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Sun Mar 9 01:05:32 2008 @@ -84,14 +84,14 @@ /// as. FST, - /// FP_GET_RESULT - This corresponds to FpGETRESULT pseudo instruction + /// FP_GET_ST0 - This corresponds to FpGET_ST0 pseudo instruction /// which copies from ST(0) to the destination. It takes a chain and /// writes a RFP result and a chain. - FP_GET_RESULT, + FP_GET_ST0, - /// FP_GET_RESULT2 - Same as FP_GET_RESULT except it copies two values + /// FP_GET_ST0_ST1 - Same as FP_GET_RESULT except it copies two values /// ST(0) and ST(1). - FP_GET_RESULT2, + FP_GET_ST0_ST1, /// FP_SET_RESULT - This corresponds to FpSETRESULT pseudo instruction /// which copies the source operand to ST(0). It takes a chain+value and Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFPStack.td?rev=48093&r1=48092&r2=48093&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrFPStack.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrFPStack.td Sun Mar 9 01:05:32 2008 @@ -18,7 +18,8 @@ //===----------------------------------------------------------------------===// def SDTX86FpGet : SDTypeProfile<1, 0, [SDTCisFP<0>]>; -def SDTX86FpGet2 : SDTypeProfile<2, 0, [SDTCisFP<0>, SDTCisSameAs<0, 1>]>; +def SDTX86FpGet2 : SDTypeProfile<2, 0, [SDTCisVT<0, f80>, + SDTCisVT<1, f80>]>; def SDTX86FpSet : SDTypeProfile<0, 1, [SDTCisFP<0>]>; def SDTX86Fld : SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisPtrTy<1>, @@ -32,9 +33,7 @@ def SDTX86CwdStore : SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>; -def X86fpget : SDNode<"X86ISD::FP_GET_RESULT", SDTX86FpGet, - [SDNPHasChain, SDNPInFlag, SDNPOutFlag]>; -def X86fpget2 : SDNode<"X86ISD::FP_GET_RESULT2", SDTX86FpGet2, +def X86fpget_st0 : SDNode<"X86ISD::FP_GET_ST0", SDTX86FpGet, [SDNPHasChain, SDNPInFlag, SDNPOutFlag]>; def X86fpset : SDNode<"X86ISD::FP_SET_RESULT", SDTX86FpSet, [SDNPHasChain, SDNPOutFlag]>; @@ -139,17 +138,15 @@ // encoding and asm printing info). // Pseudo Instructions for FP stack return values. -def FpGETRESULT32 : FpI_<(outs RFP32:$dst), (ins), SpecialFP, - [(set RFP32:$dst, X86fpget)]>; // FPR = ST(0) - -def FpGETRESULT64 : FpI_<(outs RFP64:$dst), (ins), SpecialFP, - [(set RFP64:$dst, X86fpget)]>; // FPR = ST(0) - -def FpGETRESULT80 : FpI_<(outs RFP80:$dst), (ins), SpecialFP, - [(set RFP80:$dst, X86fpget)]>; // FPR = ST(0) +def FpGET_ST0_32 : FpI_<(outs RFP32:$dst), (ins), SpecialFP, + [(set RFP32:$dst, X86fpget_st0)]>; // FPR = ST(0) +def FpGET_ST0_64 : FpI_<(outs RFP64:$dst), (ins), SpecialFP, + [(set RFP64:$dst, X86fpget_st0)]>; // FPR = ST(0) +def FpGET_ST0_80 : FpI_<(outs RFP80:$dst), (ins), SpecialFP, + [(set RFP80:$dst, X86fpget_st0)]>; // FPR = ST(0) -def FpGETRESULT80x2 : FpI_<(outs RFP80:$dst1, RFP80:$dst2), (ins), SpecialFP, - []>; // FPR = ST(0), FPR = ST(1) +def FpGET_ST0_ST1 : FpI_<(outs RFP80:$dst1, RFP80:$dst2), (ins), SpecialFP, + []>; // FPR = ST(0), FPR = ST(1) let Defs = [ST0] in { @@ -174,15 +171,15 @@ // Register copies. Just copies, the shortening ones do not truncate. let neverHasSideEffects = 1 in { -def MOV_Fp3232 : FpIf32<(outs RFP32:$dst), (ins RFP32:$src), SpecialFP, []>; -def MOV_Fp3264 : FpIf32<(outs RFP64:$dst), (ins RFP32:$src), SpecialFP, []>; -def MOV_Fp6432 : FpIf32<(outs RFP32:$dst), (ins RFP64:$src), SpecialFP, []>; -def MOV_Fp6464 : FpIf64<(outs RFP64:$dst), (ins RFP64:$src), SpecialFP, []>; -def MOV_Fp8032 : FpIf32<(outs RFP32:$dst), (ins RFP80:$src), SpecialFP, []>; -def MOV_Fp3280 : FpIf32<(outs RFP80:$dst), (ins RFP32:$src), SpecialFP, []>; -def MOV_Fp8064 : FpIf64<(outs RFP64:$dst), (ins RFP80:$src), SpecialFP, []>; -def MOV_Fp6480 : FpIf64<(outs RFP80:$dst), (ins RFP64:$src), SpecialFP, []>; -def MOV_Fp8080 : FpI_<(outs RFP80:$dst), (ins RFP80:$src), SpecialFP, []>; + def MOV_Fp3232 : FpIf32<(outs RFP32:$dst), (ins RFP32:$src), SpecialFP, []>; + def MOV_Fp3264 : FpIf32<(outs RFP64:$dst), (ins RFP32:$src), SpecialFP, []>; + def MOV_Fp6432 : FpIf32<(outs RFP32:$dst), (ins RFP64:$src), SpecialFP, []>; + def MOV_Fp6464 : FpIf64<(outs RFP64:$dst), (ins RFP64:$src), SpecialFP, []>; + def MOV_Fp8032 : FpIf32<(outs RFP32:$dst), (ins RFP80:$src), SpecialFP, []>; + def MOV_Fp3280 : FpIf32<(outs RFP80:$dst), (ins RFP32:$src), SpecialFP, []>; + def MOV_Fp8064 : FpIf64<(outs RFP64:$dst), (ins RFP80:$src), SpecialFP, []>; + def MOV_Fp6480 : FpIf64<(outs RFP80:$dst), (ins RFP64:$src), SpecialFP, []>; + def MOV_Fp8080 : FpI_ <(outs RFP80:$dst), (ins RFP80:$src), SpecialFP, []>; } // Factoring for arithmetic. @@ -583,6 +580,21 @@ // Used to conv. i64 to f64 since there isn't a SSE version. def : Pat<(X86fildflag addr:$src, i64), (ILD_Fp64m64 addr:$src)>; -def : Pat<(f64 (fextend RFP32:$src)), (MOV_Fp3264 RFP32:$src)>, Requires<[FPStackf32]>; -def : Pat<(f80 (fextend RFP32:$src)), (MOV_Fp3280 RFP32:$src)>, Requires<[FPStackf32]>; -def : Pat<(f80 (fextend RFP64:$src)), (MOV_Fp6480 RFP64:$src)>, Requires<[FPStackf64]>; +// FP extensions map onto simple pseudo-value conversions if they are to/from +// the FP stack. +def : Pat<(f64 (fextend RFP32:$src)), (MOV_Fp3264 RFP32:$src)>, + Requires<[FPStackf32]>; +def : Pat<(f80 (fextend RFP32:$src)), (MOV_Fp3280 RFP32:$src)>, + Requires<[FPStackf32]>; +def : Pat<(f80 (fextend RFP64:$src)), (MOV_Fp6480 RFP64:$src)>, + Requires<[FPStackf64]>; + +// FP truncations map onto simple pseudo-value conversions if they are to/from +// the FP stack. We have validated that only value-preserving truncations make +// it through isel. +def : Pat<(f32 (fround RFP64:$src)), (MOV_Fp6432 RFP64:$src)>, + Requires<[FPStackf32]>; +def : Pat<(f32 (fround RFP80:$src)), (MOV_Fp8032 RFP80:$src)>, + Requires<[FPStackf32]>; +def : Pat<(f64 (fround RFP80:$src)), (MOV_Fp8064 RFP80:$src)>, + Requires<[FPStackf64]>; From sabre at nondot.org Sun Mar 9 01:08:44 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 07:08:44 -0000 Subject: [llvm-commits] [llvm] r48094 - in /llvm/trunk/lib/Target/X86: X86FloatingPoint.cpp X86ISelLowering.cpp X86ISelLowering.h X86InstrFPStack.td Message-ID: <200803090708.m2978id5027855@zion.cs.uiuc.edu> Author: lattner Date: Sun Mar 9 01:08:44 2008 New Revision: 48094 URL: http://llvm.org/viewvc/llvm-project?rev=48094&view=rev Log: rename FP_SETRESULT -> FP_SET_ST0 Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h llvm/trunk/lib/Target/X86/X86InstrFPStack.td Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp?rev=48094&r1=48093&r2=48094&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp (original) +++ llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Sun Mar 9 01:08:44 2008 @@ -928,9 +928,9 @@ pushReg(getFPReg(MI->getOperand(0))); pushReg(getFPReg(MI->getOperand(1))); break; - case X86::FpSETRESULT32: - case X86::FpSETRESULT64: - case X86::FpSETRESULT80: + case X86::FpSET_ST0_32: + case X86::FpSET_ST0_64: + case X86::FpSET_ST0_80: assert(StackTop == 1 && "Stack should have one element on it to return!"); --StackTop; // "Forget" we have something on the top of stack! break; Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=48094&r1=48093&r2=48094&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Mar 9 01:08:44 2008 @@ -869,7 +869,7 @@ SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag); SDOperand Ops[] = { Chain, Value }; - Chain = DAG.getNode(X86ISD::FP_SET_RESULT, Tys, Ops, 2); + Chain = DAG.getNode(X86ISD::FP_SET_ST0, Tys, Ops, 2); Flag = Chain.getValue(1); } @@ -5565,7 +5565,7 @@ case X86ISD::FST: return "X86ISD::FST"; case X86ISD::FP_GET_ST0: return "X86ISD::FP_GET_ST0"; case X86ISD::FP_GET_ST0_ST1: return "X86ISD::FP_GET_ST0_ST1"; - case X86ISD::FP_SET_RESULT: return "X86ISD::FP_SET_RESULT"; + case X86ISD::FP_SET_ST0: return "X86ISD::FP_SET_ST0"; case X86ISD::CALL: return "X86ISD::CALL"; case X86ISD::TAILCALL: return "X86ISD::TAILCALL"; case X86ISD::RDTSC_DAG: return "X86ISD::RDTSC_DAG"; Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=48094&r1=48093&r2=48094&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Sun Mar 9 01:08:44 2008 @@ -89,14 +89,14 @@ /// writes a RFP result and a chain. FP_GET_ST0, - /// FP_GET_ST0_ST1 - Same as FP_GET_RESULT except it copies two values + /// FP_GET_ST0_ST1 - Same as FP_GET_ST0 except it copies two values /// ST(0) and ST(1). FP_GET_ST0_ST1, - /// FP_SET_RESULT - This corresponds to FpSETRESULT pseudo instruction + /// FP_SET_ST0 - This corresponds to FpSET_ST0 pseudo instruction /// which copies the source operand to ST(0). It takes a chain+value and /// returns a chain and a flag. - FP_SET_RESULT, + FP_SET_ST0, /// CALL/TAILCALL - These operations represent an abstract X86 call /// instruction, which includes a bunch of information. In particular the Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFPStack.td?rev=48094&r1=48093&r2=48094&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrFPStack.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrFPStack.td Sun Mar 9 01:08:44 2008 @@ -35,7 +35,7 @@ def X86fpget_st0 : SDNode<"X86ISD::FP_GET_ST0", SDTX86FpGet, [SDNPHasChain, SDNPInFlag, SDNPOutFlag]>; -def X86fpset : SDNode<"X86ISD::FP_SET_RESULT", SDTX86FpSet, +def X86fpset : SDNode<"X86ISD::FP_SET_ST0", SDTX86FpSet, [SDNPHasChain, SDNPOutFlag]>; def X86fld : SDNode<"X86ISD::FLD", SDTX86Fld, [SDNPHasChain, SDNPMayLoad]>; @@ -150,14 +150,14 @@ let Defs = [ST0] in { -def FpSETRESULT32 : FpI_<(outs), (ins RFP32:$src), SpecialFP, - [(X86fpset RFP32:$src)]>;// ST(0) = FPR +def FpSET_ST0_32 : FpI_<(outs), (ins RFP32:$src), SpecialFP, + [(X86fpset RFP32:$src)]>;// ST(0) = FPR -def FpSETRESULT64 : FpI_<(outs), (ins RFP64:$src), SpecialFP, - [(X86fpset RFP64:$src)]>;// ST(0) = FPR +def FpSET_ST0_64 : FpI_<(outs), (ins RFP64:$src), SpecialFP, + [(X86fpset RFP64:$src)]>;// ST(0) = FPR -def FpSETRESULT80 : FpI_<(outs), (ins RFP80:$src), SpecialFP, - [(X86fpset RFP80:$src)]>;// ST(0) = FPR +def FpSET_ST0_80 : FpI_<(outs), (ins RFP80:$src), SpecialFP, + [(X86fpset RFP80:$src)]>;// ST(0) = FPR } // FpIf32, FpIf64 - Floating Point Psuedo Instruction template. From gordonhenriksen at mac.com Sun Mar 9 01:17:38 2008 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Sun, 09 Mar 2008 07:17:38 -0000 Subject: [llvm-commits] [llvm] r48095 - in /llvm/trunk/bindings/ocaml: analysis/llvm_analysis.mli bitreader/llvm_bitreader.mli bitwriter/llvm_bitwriter.mli executionengine/llvm_executionengine.mli llvm/llvm.ml llvm/llvm.mli Message-ID: <200803090717.m297HcNa028107@zion.cs.uiuc.edu> Author: gordon Date: Sun Mar 9 01:17:38 2008 New Revision: 48095 URL: http://llvm.org/viewvc/llvm-project?rev=48095&view=rev Log: This patch cleans up the OCaml bindings so that they format nicely with ocamldoc. It does not yet hook into the build system, though. Patch by Erick Tryzelaar! Modified: llvm/trunk/bindings/ocaml/analysis/llvm_analysis.mli llvm/trunk/bindings/ocaml/bitreader/llvm_bitreader.mli llvm/trunk/bindings/ocaml/bitwriter/llvm_bitwriter.mli llvm/trunk/bindings/ocaml/executionengine/llvm_executionengine.mli llvm/trunk/bindings/ocaml/llvm/llvm.ml llvm/trunk/bindings/ocaml/llvm/llvm.mli Modified: llvm/trunk/bindings/ocaml/analysis/llvm_analysis.mli URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/analysis/llvm_analysis.mli?rev=48095&r1=48094&r2=48095&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/analysis/llvm_analysis.mli (original) +++ llvm/trunk/bindings/ocaml/analysis/llvm_analysis.mli Sun Mar 9 01:17:38 2008 @@ -5,32 +5,31 @@ * This file is distributed under the University of Illinois Open Source * License. See LICENSE.TXT for details. * - *===----------------------------------------------------------------------=== - * - * This interface provides an ocaml API for LLVM IR analyses, the classes in - * the Analysis library. - * *===----------------------------------------------------------------------===*) +(** Intermediate representation analysis. + + This interface provides an ocaml API for LLVM IR analyses, the classes in + the Analysis library. *) (** [verify_module m] returns [None] if the module [m] is valid, and [Some reason] if it is invalid. [reason] is a string containing a - human-readable validation report. See [llvm::verifyModule]. **) + human-readable validation report. See [llvm::verifyModule]. *) external verify_module : Llvm.llmodule -> string option = "llvm_verify_module" (** [verify_function f] returns [None] if the function [f] is valid, and [Some reason] if it is invalid. [reason] is a string containing a - human-readable validation report. See [llvm::verifyFunction]. **) + human-readable validation report. See [llvm::verifyFunction]. *) external verify_function : Llvm.llvalue -> bool = "llvm_verify_function" (** [verify_module m] returns if the module [m] is valid, but prints a - validation report to [stderr] and aborts the program if it is invalid. See - [llvm::verifyModule]. **) + validation report to [stderr] and aborts the program if it is invalid. See + [llvm::verifyModule]. *) external assert_valid_module : Llvm.llmodule -> unit = "llvm_assert_valid_module" (** [verify_function f] returns if the function [f] is valid, but prints a - validation report to [stderr] and aborts the program if it is invalid. See - [llvm::verifyFunction]. **) + validation report to [stderr] and aborts the program if it is invalid. See + [llvm::verifyFunction]. *) external assert_valid_function : Llvm.llvalue -> unit = "llvm_assert_valid_function" Modified: llvm/trunk/bindings/ocaml/bitreader/llvm_bitreader.mli URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/bitreader/llvm_bitreader.mli?rev=48095&r1=48094&r2=48095&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/bitreader/llvm_bitreader.mli (original) +++ llvm/trunk/bindings/ocaml/bitreader/llvm_bitreader.mli Sun Mar 9 01:17:38 2008 @@ -5,26 +5,25 @@ * This file is distributed under the University of Illinois Open Source * License. See LICENSE.TXT for details. * - *===----------------------------------------------------------------------=== - * - * This interface provides an ocaml API for the LLVM bitcode reader, the - * classes in the Bitreader library. - * *===----------------------------------------------------------------------===*) +(** Bitcode reader. + + This interface provides an ocaml API for the LLVM bitcode reader, the + classes in the Bitreader library. *) exception Error of string (** [read_bitcode_file path] reads the bitcode for a new module [m] from the file at [path]. Returns [Success m] if successful, and [Failure msg] otherwise, where [msg] is a description of the error encountered. - See the function [llvm::getBitcodeModuleProvider]. **) + See the function [llvm::getBitcodeModuleProvider]. *) external get_module_provider : Llvm.llmemorybuffer -> Llvm.llmoduleprovider = "llvm_get_module_provider" (** [parse_bitcode mb] parses the bitcode for a new module [m] from the memory buffer [mb]. Returns [Success m] if successful, and [Failure msg] otherwise, where [msg] is a description of the error encountered. - See the function [llvm::ParseBitcodeFile]. **) + See the function [llvm::ParseBitcodeFile]. *) external parse_bitcode : Llvm.llmemorybuffer -> Llvm.llmodule = "llvm_parse_bitcode" Modified: llvm/trunk/bindings/ocaml/bitwriter/llvm_bitwriter.mli URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/bitwriter/llvm_bitwriter.mli?rev=48095&r1=48094&r2=48095&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/bitwriter/llvm_bitwriter.mli (original) +++ llvm/trunk/bindings/ocaml/bitwriter/llvm_bitwriter.mli Sun Mar 9 01:17:38 2008 @@ -5,15 +5,14 @@ * This file is distributed under the University of Illinois Open Source * License. See LICENSE.TXT for details. * - *===----------------------------------------------------------------------=== - * - * This interface provides an ocaml API for the LLVM bitcode writer, the - * classes in the Bitwriter library. - * *===----------------------------------------------------------------------===*) +(** Bitcode writer. + + This interface provides an ocaml API for the LLVM bitcode writer, the + classes in the Bitwriter library. *) (** [write_bitcode_file m path] writes the bitcode for module [m] to the file at - [path]. Returns [true] if successful, [false] otherwise. **) + [path]. Returns [true] if successful, [false] otherwise. *) external write_bitcode_file : Llvm.llmodule -> string -> bool = "llvm_write_bitcode_file" Modified: llvm/trunk/bindings/ocaml/executionengine/llvm_executionengine.mli URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/executionengine/llvm_executionengine.mli?rev=48095&r1=48094&r2=48095&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/executionengine/llvm_executionengine.mli (original) +++ llvm/trunk/bindings/ocaml/executionengine/llvm_executionengine.mli Sun Mar 9 01:17:38 2008 @@ -5,78 +5,76 @@ * This file is distributed under the University of Illinois Open Source * License. See LICENSE.TXT for details. * - *===----------------------------------------------------------------------=== - * - * This interface provides an ocaml API for LLVM execution engine (JIT/ - * interpreter), the classes in the ExecutionEngine library. - * *===----------------------------------------------------------------------===*) +(** JIT Interpreter. -exception Error of string + This interface provides an ocaml API for LLVM execution engine (JIT/ + interpreter), the classes in the ExecutionEngine library. *) +exception Error of string module GenericValue: sig (** [GenericValue.t] is a boxed union type used to portably pass arguments to and receive values from the execution engine. It supports only a limited selection of types; for more complex argument types, it is necessary to generate a stub function by hand or to pass parameters by reference. - See the struct [llvm::GenericValue]. **) + See the struct [llvm::GenericValue]. *) type t (** [of_float fpty n] boxes the float [n] in a float-valued generic value - according to the floating point type [fpty]. See the fields - [llvm::GenericValue::DoubleVal] and [llvm::GenericValue::FloatVal]. **) + according to the floating point type [fpty]. See the fields + [llvm::GenericValue::DoubleVal] and [llvm::GenericValue::FloatVal]. *) val of_float: Llvm.lltype -> float -> t (** [of_pointer v] boxes the pointer value [v] in a generic value. See the - field [llvm::GenericValue::PointerVal]. **) + field [llvm::GenericValue::PointerVal]. *) val of_pointer: 'a -> t (** [of_int32 n w] boxes the int32 [i] in a generic value with the bitwidth - [w]. See the field [llvm::GenericValue::IntVal]. **) + [w]. See the field [llvm::GenericValue::IntVal]. *) val of_int32: Llvm.lltype -> int32 -> t (** [of_int n w] boxes the int [i] in a generic value with the bitwidth - [w]. See the field [llvm::GenericValue::IntVal]. **) + [w]. See the field [llvm::GenericValue::IntVal]. *) val of_int: Llvm.lltype -> int -> t (** [of_natint n w] boxes the native int [i] in a generic value with the - bitwidth [w]. See the field [llvm::GenericValue::IntVal]. **) + bitwidth [w]. See the field [llvm::GenericValue::IntVal]. *) val of_nativeint: Llvm.lltype -> nativeint -> t (** [of_int64 n w] boxes the int64 [i] in a generic value with the bitwidth - [w]. See the field [llvm::GenericValue::IntVal]. **) + [w]. See the field [llvm::GenericValue::IntVal]. *) val of_int64: Llvm.lltype -> int64 -> t (** [as_float fpty gv] unboxes the floating point-valued generic value [gv] of floating point type [fpty]. See the fields [llvm::GenericValue::DoubleVal] - and [llvm::GenericValue::FloatVal]. **) + and [llvm::GenericValue::FloatVal]. *) val as_float: Llvm.lltype -> t -> float (** [as_pointer gv] unboxes the pointer-valued generic value [gv]. See the - field [llvm::GenericValue::PointerVal]. **) + field [llvm::GenericValue::PointerVal]. *) val as_pointer: t -> 'a (** [as_int32 gv] unboxes the integer-valued generic value [gv] as an [int32]. Is invalid if [gv] has a bitwidth greater than 32 bits. See the field - [llvm::GenericValue::IntVal]. **) + [llvm::GenericValue::IntVal]. *) val as_int32: t -> int32 (** [as_int gv] unboxes the integer-valued generic value [gv] as an [int]. Is invalid if [gv] has a bitwidth greater than the host bit width (but the most significant bit may be lost). See the field - [llvm::GenericValue::IntVal]. **) + [llvm::GenericValue::IntVal]. *) val as_int: t -> int (** [as_natint gv] unboxes the integer-valued generic value [gv] as a [nativeint]. Is invalid if [gv] has a bitwidth greater than - [nativeint]. See the field [llvm::GenericValue::IntVal]. **) + [nativeint]. See the field [llvm::GenericValue::IntVal]. *) val as_nativeint: t -> nativeint (** [as_int64 gv] returns the integer-valued generic value [gv] as an [int64]. Is invalid if [gv] has a bitwidth greater than [int64]. See the field - [llvm::GenericValue::IntVal]. **) + [llvm::GenericValue::IntVal]. *) val as_int64: t -> int64 end @@ -84,69 +82,69 @@ module ExecutionEngine: sig (** An execution engine is either a JIT compiler or an interpreter, capable of directly loading an LLVM module and executing its functions without first - invoking a static compiler and generating a native executable. **) + invoking a static compiler and generating a native executable. *) type t (** [create mp] creates a new execution engine, taking ownership of the module provider [mp] if successful. Creates a JIT if possible, else falls back to an interpreter. Raises [Error msg] if an error occurrs. The execution engine is not garbage collected and must be destroyed with - [dispose ee]. See the function [llvm::ExecutionEngine::create]. **) + [dispose ee]. See the function [llvm::ExecutionEngine::create]. *) val create: Llvm.llmoduleprovider -> t (** [create_interpreter mp] creates a new interpreter, taking ownership of the module provider [mp] if successful. Raises [Error msg] if an error occurrs. The execution engine is not garbage collected and must be destroyed with [dispose ee]. - See the function [llvm::ExecutionEngine::create]. **) + See the function [llvm::ExecutionEngine::create]. *) val create_interpreter: Llvm.llmoduleprovider -> t (** [create_jit mp] creates a new JIT (just-in-time compiler), taking ownership of the module provider [mp] if successful. Raises [Error msg] if an error occurrs. The execution engine is not garbage collected and must be destroyed with [dispose ee]. - See the function [llvm::ExecutionEngine::create]. **) + See the function [llvm::ExecutionEngine::create]. *) val create_jit: Llvm.llmoduleprovider -> t (** [dispose ee] releases the memory used by the execution engine and must be - invoked to avoid memory leaks. **) + invoked to avoid memory leaks. *) val dispose: t -> unit (** [add_module_provider mp ee] adds the module provider [mp] to the execution - engine [ee]. **) + engine [ee]. *) val add_module_provider: Llvm.llmoduleprovider -> t -> unit (** [remove_module_provider mp ee] removes the module provider [mp] from the execution engine [ee], disposing of [mp] and the module referenced by - [mp]. Raises [Error msg] if an error occurs. **) + [mp]. Raises [Error msg] if an error occurs. *) val remove_module_provider: Llvm.llmoduleprovider -> t -> Llvm.llmodule - (** [find_function n ee] finds the function named [n] defined in any of the + (** [find_function n ee] finds the function named [n] defined in any of the modules owned by the execution engine [ee]. Returns [None] if the function - is not found and [Some f] otherwise. **) + is not found and [Some f] otherwise. *) val find_function: string -> t -> Llvm.llvalue option (** [run_function f args ee] synchronously executes the function [f] with the - arguments [args], which must be compatible with the parameter types. **) + arguments [args], which must be compatible with the parameter types. *) val run_function: Llvm.llvalue -> GenericValue.t array -> t -> GenericValue.t (** [run_static_ctors ee] executes the static constructors of each module in - the execution engine [ee]. **) + the execution engine [ee]. *) val run_static_ctors: t -> unit (** [run_static_dtors ee] executes the static destructors of each module in - the execution engine [ee]. **) + the execution engine [ee]. *) val run_static_dtors: t -> unit - (** [run_function_as_main f args env ee] executes the function [f] as a main + (** [run_function_as_main f args env ee] executes the function [f] as a main function, passing it [argv] and [argc] according to the string array - [args], and [envp] as specified by the array [env]. Returns the integer - return value of the function. **) + [args], and [envp] as specified by the array [env]. Returns the integer + return value of the function. *) val run_function_as_main: Llvm.llvalue -> string array -> (string * string) array -> t -> int (** [free_machine_code f ee] releases the memory in the execution engine [ee] - used to store the machine code for the function [f]. **) + used to store the machine code for the function [f]. *) val free_machine_code: Llvm.llvalue -> t -> unit end Modified: llvm/trunk/bindings/ocaml/llvm/llvm.ml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm.ml?rev=48095&r1=48094&r2=48095&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm.ml (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm.ml Sun Mar 9 01:17:38 2008 @@ -120,7 +120,6 @@ external delete_type_name : string -> llmodule -> unit = "llvm_delete_type_name" - (*===-- Types -------------------------------------------------------------===*) external classify_type : lltype -> TypeKind.t = "llvm_classify_type" Modified: llvm/trunk/bindings/ocaml/llvm/llvm.mli URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm.mli?rev=48095&r1=48094&r2=48095&view=diff ============================================================================== --- llvm/trunk/bindings/ocaml/llvm/llvm.mli (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm.mli Sun Mar 9 01:17:38 2008 @@ -5,51 +5,53 @@ * This file is distributed under the University of Illinois Open Source * License. See LICENSE.TXT for details. * - *===----------------------------------------------------------------------=== - * - * This interface provides an ocaml API for the LLVM intermediate - * representation, the classes in the VMCore library. - * *===----------------------------------------------------------------------===*) +(** Core API. + + This interface provides an ocaml API for the LLVM intermediate + representation, the classes in the VMCore library. *) + + +(** {6 Abstract types} -(* These abstract types correlate directly to the LLVM VMCore classes. *) + These abstract types correlate directly to the LLVM VMCore classes. *) (** The top-level container for all other LLVM Intermediate Representation (IR) - objects. See the [llvm::Module] class. **) + objects. See the [llvm::Module] class. *) type llmodule (** Each value in the LLVM IR has a type, an instance of [lltype]. See the - [llvm::Type] class. **) -type lltype + [llvm::Type] class. *) +type lltype -(** When building recursive types using [refine_type], [lltype] values may +(** When building recursive types using {!refine_type}, [lltype] values may become invalid; use [lltypehandle] to resolve this problem. See the - [llvm::AbstractTypeHolder] class. **) + [llvm::AbstractTypeHolder] class. *) type lltypehandle (** Any value in the LLVM IR. Functions, instructions, global variables, constants, and much more are all [llvalues]. See the [llvm::Value] class. - This type covers a wide range of subclasses. **) + This type covers a wide range of subclasses. *) type llvalue -(** A basic block in LLVM IR. See the [llvm::BasicBlock] class. **) +(** A basic block in LLVM IR. See the [llvm::BasicBlock] class. *) type llbasicblock (** Used to generate instructions in the LLVM IR. See the [llvm::LLVMBuilder] - class. **) + class. *) type llbuilder (** Used to provide a module to JIT or interpreter. - See the [llvm::ModuleProvider] class. **) + See the [llvm::ModuleProvider] class. *) type llmoduleprovider (** Used to efficiently handle large buffers of read-only binary data. - See the [llvm::MemoryBuffer] class. **) + See the [llvm::MemoryBuffer] class. *) type llmemorybuffer -(** The kind of an [lltype], the result of [classify_type ty]. See the - [llvm::Type::TypeID] enumeration. **) +(** The kind of an [lltype], the result of [classify_type ty]. See the + [llvm::Type::TypeID] enumeration. *) module TypeKind : sig type t = Void @@ -68,8 +70,8 @@ | Vector end -(** The linkage of a global value, accessed with [linkage gv] and - [set_linkage l gv]. See [llvm::GlobalValue::LinkageTypes]. **) +(** The linkage of a global value, accessed with {!linkage} and + {!set_linkage}. See [llvm::GlobalValue::LinkageTypes]. *) module Linkage : sig type t = External @@ -83,8 +85,8 @@ | Ghost end -(** The linker visibility of a global value, accessed with [visibility gv] and - [set_visibility v gv]. See [llvm::GlobalValue::VisibilityTypes]. **) +(** The linker visibility of a global value, accessed with {!visibility} and + {!set_visibility}. See [llvm::GlobalValue::VisibilityTypes]. *) module Visibility : sig type t = Default @@ -92,24 +94,24 @@ | Protected end -(* The following calling convention values may be accessed with - [function_call_conv f] and [set_function_call_conv conv f]. Calling - conventions are open-ended. *) +(** The following calling convention values may be accessed with + {!function_call_conv} and {!set_function_call_conv}. Calling + conventions are open-ended. *) module CallConv : sig - val c : int (** [c] is the C calling convention. **) + val c : int (** [c] is the C calling convention. *) val fast : int (** [fast] is the calling convention to allow LLVM maximum optimization opportunities. Use only with - internal linkage. **) + internal linkage. *) val cold : int (** [cold] is the calling convention for - callee-save. **) + callee-save. *) val x86_stdcall : int (** [x86_stdcall] is the familiar stdcall calling - convention from C. **) + convention from C. *) val x86_fastcall : int (** [x86_fastcall] is the familiar fastcall calling - convention from C. **) + convention from C. *) end (** The predicate for an integer comparison ([icmp]) instruction. - See the [llvm::ICmpInst::Predicate] enumeration. **) + See the [llvm::ICmpInst::Predicate] enumeration. *) module Icmp : sig type t = | Eq @@ -125,7 +127,7 @@ end (** The predicate for a floating-point comparison ([fcmp]) instruction. - See the [llvm::FCmpInst::Predicate] enumeration. **) + See the [llvm::FCmpInst::Predicate] enumeration. *) module Fcmp : sig type t = | False @@ -146,47 +148,50 @@ | True end + +(** {6 Exceptions} *) + exception IoError of string -(*===-- Modules -----------------------------------------------------------===*) +(** {6 Modules} *) (** [create_module id] creates a module with the supplied module ID. Modules are - not garbage collected; it is mandatory to call [dispose_module m] to free + not garbage collected; it is mandatory to call {!dispose_module} to free memory. See the constructor [llvm::Module::Module]. *) external create_module : string -> llmodule = "llvm_create_module" (** [dispose_module m] destroys a module [m] and all of the IR objects it contained. All references to subordinate objects are invalidated; referencing them will invoke undefined behavior. See the destructor - [llvm::Module::~Module]. **) + [llvm::Module::~Module]. *) external dispose_module : llmodule -> unit = "llvm_dispose_module" (** [target_triple m] is the target specifier for the module [m], something like - [i686-apple-darwin8]. See the method [llvm::Module::getTargetTriple]. **) + [i686-apple-darwin8]. See the method [llvm::Module::getTargetTriple]. *) external target_triple: llmodule -> string = "llvm_target_triple" (** [target_triple triple m] changes the target specifier for the module [m] to - the string [triple]. See the method [llvm::Module::setTargetTriple]. **) + the string [triple]. See the method [llvm::Module::setTargetTriple]. *) external set_target_triple: string -> llmodule -> unit = "llvm_set_target_triple" (** [data_layout m] is the data layout specifier for the module [m], something like [e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-...-a0:0:64-f80:128:128]. See the - method [llvm::Module::getDataLayout]. **) + method [llvm::Module::getDataLayout]. *) external data_layout: llmodule -> string = "llvm_data_layout" (** [set_data_layout s m] changes the data layout specifier for the module [m] - to the string [s]. See the method [llvm::Module::setDataLayout]. **) + to the string [s]. See the method [llvm::Module::setDataLayout]. *) external set_data_layout: string -> llmodule -> unit = "llvm_set_data_layout" (** [define_type_name name ty m] adds a named type to the module's symbol table. Returns [true] if successful. If such a name already exists, then no entry is added and [false] is returned. See the [llvm::Module::addTypeName] - method. **) + method. *) external define_type_name : string -> lltype -> llmodule -> bool = "llvm_add_type_name" @@ -196,446 +201,455 @@ = "llvm_delete_type_name" -(*===-- Types -------------------------------------------------------------===*) +(** {6 Types} *) -(** [classify_type ty] returns the [type_kind] corresponding to the type [ty]. - See the method [llvm::Type::getTypeID]. **) +(** [classify_type ty] returns the {!TypeKind.t} corresponding to the type [ty]. + See the method [llvm::Type::getTypeID]. *) external classify_type : lltype -> TypeKind.t = "llvm_classify_type" -(** [string_of_lltype ty] returns a string describing the type [ty]. **) +(** [string_of_lltype ty] returns a string describing the type [ty]. *) val string_of_lltype : lltype -> string -(*--... Operations on integer types ........................................--*) +(** {7 Operations on integer types} *) -(** The 1-bit integer type. See [llvm::Type::Int1Ty]. **) -val i1_type : lltype +(** The 1-bit integer type. See [llvm::Type::Int1Ty]. *) +val i1_type : lltype -(** The 8-bit integer type. See [llvm::Type::Int8Ty]. **) -val i8_type : lltype +(** The 8-bit integer type. See [llvm::Type::Int8Ty]. *) +val i8_type : lltype -(** The 16-bit integer type. See [llvm::Type::Int16Ty]. **) +(** The 16-bit integer type. See [llvm::Type::Int16Ty]. *) val i16_type : lltype -(** The 32-bit integer type. See [llvm::Type::Int32Ty]. **) +(** The 32-bit integer type. See [llvm::Type::Int32Ty]. *) val i32_type : lltype -(** The 64-bit integer type. See [llvm::Type::Int64Ty]. **) +(** The 64-bit integer type. See [llvm::Type::Int64Ty]. *) val i64_type : lltype (** [integer_type n] returns an integer type of bitwidth [n]. - See the method [llvm::IntegerType::get]. **) + See the method [llvm::IntegerType::get]. *) external integer_type : int -> lltype = "llvm_integer_type" -(** [integer_bitwidth ty] returns the number of bits in the integer type [ty].. - See the method [llvm::IntegerType::getBitWidth]. **) +(** [integer_bitwidth ty] returns the number of bits in the integer type [ty]. + See the method [llvm::IntegerType::getBitWidth]. *) external integer_bitwidth : lltype -> int = "llvm_integer_bitwidth" -(*--... Operations on real types ...........................................--*) -(** The IEEE 32-bit floating point type. See [llvm::Type::FloatTy]. **) +(** {7 Operations on real types} *) + +(** The IEEE 32-bit floating point type. See [llvm::Type::FloatTy]. *) val float_type : lltype -(** The IEEE 64-bit floating point type. See [llvm::Type::DoubleTy]. **) +(** The IEEE 64-bit floating point type. See [llvm::Type::DoubleTy]. *) val double_type : lltype -(** The x87 80-bit floating point type. See [llvm::Type::X86_FP80Ty]. **) +(** The x87 80-bit floating point type. See [llvm::Type::X86_FP80Ty]. *) val x86fp80_type : lltype -(** The IEEE 128-bit floating point type. See [llvm::Type::FP128Ty]. **) +(** The IEEE 128-bit floating point type. See [llvm::Type::FP128Ty]. *) val fp128_type : lltype -(** The PowerPC 128-bit floating point type. See [llvm::Type::PPC_FP128Ty]. **) +(** The PowerPC 128-bit floating point type. See [llvm::Type::PPC_FP128Ty]. *) val ppc_fp128_type : lltype -(*--... Operations on function types .......................................--*) + +(** {7 Operations on function types} *) (** [function_type ret_ty param_tys] returns the function type returning [ret_ty] and taking [param_tys] as parameters. - See the method [llvm::FunctionType::get]. **) + See the method [llvm::FunctionType::get]. *) external function_type : lltype -> lltype array -> lltype = "llvm_function_type" (** [va_arg_function_type ret_ty param_tys] is just like [function_type ret_ty param_tys] except that it returns the function type which also takes a variable number of arguments. - See the method [llvm::FunctionType::get]. **) + See the method [llvm::FunctionType::get]. *) external var_arg_function_type : lltype -> lltype array -> lltype = "llvm_var_arg_function_type" (** [is_var_arg fty] returns [true] if [fty] is a varargs function type, [false] - otherwise. See the method [llvm::FunctionType::isVarArg]. **) + otherwise. See the method [llvm::FunctionType::isVarArg]. *) external is_var_arg : lltype -> bool = "llvm_is_var_arg" (** [return_type fty] gets the return type of the function type [fty]. - See the method [llvm::FunctionType::getReturnType]. **) + See the method [llvm::FunctionType::getReturnType]. *) external return_type : lltype -> lltype = "LLVMGetReturnType" (** [param_types fty] gets the parameter types of the function type [fty]. - See the method [llvm::FunctionType::getParamType]. **) + See the method [llvm::FunctionType::getParamType]. *) external param_types : lltype -> lltype array = "llvm_param_types" -(*--... Operations on struct types .........................................--*) + +(** {7 Operations on struct types} *) (** [struct_type tys] returns the structure type containing in the types in the - array [tys]. See the method [llvm::StructType::get]. **) + array [tys]. See the method [llvm::StructType::get]. *) external struct_type : lltype array -> lltype = "llvm_struct_type" (** [struct_type tys] returns the packed structure type containing in the types - in the array [tys]. See the method [llvm::StructType::get]. **) + in the array [tys]. See the method [llvm::StructType::get]. *) external packed_struct_type : lltype array -> lltype = "llvm_packed_struct_type" (** [element_types sty] returns the constituent types of the struct type [sty]. - See the method [llvm::StructType::getElementType]. **) + See the method [llvm::StructType::getElementType]. *) external element_types : lltype -> lltype array = "llvm_element_types" (** [is_packed sty] returns [true] if the structure type [sty] is packed, - [false] otherwise. See the method [llvm::StructType::isPacked]. **) + [false] otherwise. See the method [llvm::StructType::isPacked]. *) external is_packed : lltype -> bool = "llvm_is_packed" -(*--... Operations on pointer, vector, and array types .....................--*) + +(** {7 Operations on pointer, vector, and array types} *) (** [array_type ty n] returns the array type containing [n] elements of type - [ty]. See the method [llvm::ArrayType::get]. **) + [ty]. See the method [llvm::ArrayType::get]. *) external array_type : lltype -> int -> lltype = "llvm_array_type" (** [pointer_type ty] returns the pointer type referencing objects of type [ty] in the default address space (0). - See the method [llvm::PointerType::getUnqual]. **) + See the method [llvm::PointerType::getUnqual]. *) external pointer_type : lltype -> lltype = "llvm_pointer_type" (** [qualified_pointer_type ty as] returns the pointer type referencing objects of type [ty] in address space [as]. - See the method [llvm::PointerType::get]. **) + See the method [llvm::PointerType::get]. *) external qualified_pointer_type : lltype -> int -> lltype = "llvm_qualified_pointer_type" (** [vector_type ty n] returns the array type containing [n] elements of the - primitive type [ty]. See the method [llvm::ArrayType::get]. **) + primitive type [ty]. See the method [llvm::ArrayType::get]. *) external vector_type : lltype -> int -> lltype = "llvm_vector_type" (** [element_type ty] returns the element type of the pointer, vector, or array - type [ty]. See the method [llvm::SequentialType::get]. **) + type [ty]. See the method [llvm::SequentialType::get]. *) external element_type : lltype -> lltype = "LLVMGetElementType" (** [element_type aty] returns the element count of the array type [aty]. - See the method [llvm::ArrayType::getNumElements]. **) + See the method [llvm::ArrayType::getNumElements]. *) external array_length : lltype -> int = "llvm_array_length" (** [address_space pty] returns the address space qualifier of the pointer type - [pty]. See the method [llvm::PointerType::getAddressSpace]. **) + [pty]. See the method [llvm::PointerType::getAddressSpace]. *) external address_space : lltype -> int = "llvm_address_space" (** [element_type ty] returns the element count of the vector type [ty]. - See the method [llvm::VectorType::getNumElements]. **) + See the method [llvm::VectorType::getNumElements]. *) external vector_size : lltype -> int = "llvm_vector_size" -(*--... Operations on other types ..........................................--*) + +(** {7 Operations on other types} *) (** [opaque_type ()] creates a new opaque type distinct from any other. Opaque types are useful for building recursive types in combination with - [refine_type opaque_ty ty]. - See [llvm::OpaqueType::get]. **) + {!refine_type} [opaque_ty ty]. + See [llvm::OpaqueType::get]. *) external opaque_type : unit -> lltype = "llvm_opaque_type" (** [void_type] is the type of a function which does not return any value. - See [llvm::Type::VoidTy]. **) + See [llvm::Type::VoidTy]. *) val void_type : lltype -(** [label_type] is the type of a basic block. See [llvm::Type::LabelTy]. **) +(** [label_type] is the type of a basic block. See [llvm::Type::LabelTy]. *) val label_type : lltype -(*--... Operations on type handles .........................................--*) +(** {7 Operations on type handles} *) (** [handle_to_type ty] creates a handle to the type [ty]. If [ty] is later - refined as a result of a call to [refine_type], the handle will be updated; + refined as a result of a call to {!refine_type}, the handle will be updated; any bare [lltype] references will become invalid. - See the class [llvm::PATypeHolder]. **) + See the class [llvm::PATypeHolder]. *) external handle_to_type : lltype -> lltypehandle = "llvm_handle_to_type" (** [type_of_handle tyh] resolves the type handle [tyh]. - See the method [llvm::PATypeHolder::get()]. **) + See the method [llvm::PATypeHolder::get()]. *) external type_of_handle : lltypehandle -> lltype = "llvm_type_of_handle" (** [refine_type opaque_ty ty] replaces the abstract type [opaque_ty] with the - concrete type [ty] in all users. Warning: This may invalidate [lltype] - values! Use [lltypehandle] to manipulate potentially abstract types. See the - method [llvm::Type::refineAbstractType]. **) + concrete type [ty] in all users. Warning: This may invalidate {!lltype} + values! Use {!lltypehandle} to manipulate potentially abstract types. See + the method [llvm::Type::refineAbstractType]. *) external refine_type : lltype -> lltype -> unit = "llvm_refine_type" -(*===-- Values ------------------------------------------------------------===*) +(* {6 Values} *) (** [type_of v] returns the type of the value [v]. - See the method [llvm::Value::getType]. **) + See the method [llvm::Value::getType]. *) external type_of : llvalue -> lltype = "llvm_type_of" (** [value_name v] returns the name of the value [v]. For global values, this is the symbol name. For instructions and basic blocks, it is the SSA register name. It is meaningless for constants. - See the method [llvm::Value::getName]. **) + See the method [llvm::Value::getName]. *) external value_name : llvalue -> string = "llvm_value_name" -(** [set_value_name n v] sets the name of the value [v] to [n]. See the method - [llvm::Value::setName]. **) +(** [set_value_name n v] sets the name of the value [v] to [n]. See the method + [llvm::Value::setName]. *) external set_value_name : string -> llvalue -> unit = "llvm_set_value_name" (** [dump_value v] prints the .ll representation of the value [v] to standard - error. See the method [llvm::Value::dump]. **) + error. See the method [llvm::Value::dump]. *) external dump_value : llvalue -> unit = "llvm_dump_value" -(*--... Operations on constants of (mostly) any type .......................--*) + +(** {7 Operations on constants of (mostly) any type} *) (** [is_constant v] returns [true] if the value [v] is a constant, [false] - otherwise. Similar to [llvm::isa]. **) + otherwise. Similar to [llvm::isa]. *) external is_constant : llvalue -> bool = "llvm_is_constant" (** [const_null ty] returns the constant null (zero) of the type [ty]. - See the method [llvm::Constant::getNullValue]. **) + See the method [llvm::Constant::getNullValue]. *) external const_null : lltype -> llvalue = "LLVMConstNull" (** [const_all_ones ty] returns the constant '-1' of the integer or vector type - [ty]. See the method [llvm::Constant::getAllOnesValue]. **) + [ty]. See the method [llvm::Constant::getAllOnesValue]. *) external const_all_ones : (*int|vec*)lltype -> llvalue = "LLVMConstAllOnes" (** [undef ty] returns the undefined value of the type [ty]. - See the method [llvm::UndefValue::get]. **) + See the method [llvm::UndefValue::get]. *) external undef : lltype -> llvalue = "LLVMGetUndef" (** [is_null v] returns [true] if the value [v] is the null (zero) value. - See the method [llvm::Constant::isNullValue]. **) + See the method [llvm::Constant::isNullValue]. *) external is_null : llvalue -> bool = "llvm_is_null" (** [is_undef v] returns [true] if the value [v] is an undefined value, [false] - otherwise. Similar to [llvm::isa]. **) + otherwise. Similar to [llvm::isa]. *) external is_undef : llvalue -> bool = "llvm_is_undef" -(*--... Operations on scalar constants .....................................--*) + +(** {7 Operations on scalar constants} *) (** [const_int ty i] returns the integer constant of type [ty] and value [i]. - See the method [llvm::ConstantInt::get]. **) + See the method [llvm::ConstantInt::get]. *) external const_int : lltype -> int -> llvalue = "llvm_const_int" (** [const_of_int64 ty i] returns the integer constant of type [ty] and value - [i]. See the method [llvm::ConstantInt::get]. **) + [i]. See the method [llvm::ConstantInt::get]. *) external const_of_int64 : lltype -> Int64.t -> bool -> llvalue = "llvm_const_of_int64" (** [const_float ty n] returns the floating point constant of type [ty] and - value [n]. See the method [llvm::ConstantInt::get]. **) + value [n]. See the method [llvm::ConstantInt::get]. *) external const_float : lltype -> float -> llvalue = "llvm_const_float" -(*--... Operations on composite constants ..................................--*) + +(** {7 Operations on composite constants} *) (** [const_string s] returns the constant [i8] array with the values of the characters in the string [s]. The array is not null-terminated (but see - [const_stringz]). This value can in turn be used as the initializer for a - global variable. See the method [llvm::ConstantArray::get]. **) + {!const_stringz}). This value can in turn be used as the initializer for a + global variable. See the method [llvm::ConstantArray::get]. *) external const_string : string -> llvalue = "llvm_const_string" (** [const_stringz s] returns the constant [i8] array with the values of the characters in the string [s] and a null terminator. This value can in turn be used as the initializer for a global variable. - See the method [llvm::ConstantArray::get]. **) + See the method [llvm::ConstantArray::get]. *) external const_stringz : string -> llvalue = "llvm_const_stringz" (** [const_array ty elts] returns the constant array of type [array_type ty (Array.length elts)] and containing the values [elts]. This value can in turn be used as the initializer for a global variable. - See the method [llvm::ConstantArray::get]. **) + See the method [llvm::ConstantArray::get]. *) external const_array : lltype -> llvalue array -> llvalue = "llvm_const_array" (** [const_struct elts] returns the structured constant of type [struct_type (Array.map type_of elts)] and containing the values [elts]. This value can in turn be used as the initializer for a global variable. - See the method [llvm::ConstantStruct::get]. **) + See the method [llvm::ConstantStruct::get]. *) external const_struct : llvalue array -> llvalue = "llvm_const_struct" (** [const_packed_struct elts] returns the structured constant of type - [packed_struct_type (Array.map type_of elts)] and containing the values + {!packed_struct_type} [(Array.map type_of elts)] and containing the values [elts]. This value can in turn be used as the initializer for a global - variable. See the method [llvm::ConstantStruct::get]. **) + variable. See the method [llvm::ConstantStruct::get]. *) external const_packed_struct : llvalue array -> llvalue = "llvm_const_packed_struct" (** [const_vector elts] returns the vector constant of type [vector_type (type_of elts.(0)) (Array.length elts)] and containing the - values [elts]. See the method [llvm::ConstantVector::get]. **) + values [elts]. See the method [llvm::ConstantVector::get]. *) external const_vector : llvalue array -> llvalue = "llvm_const_vector" -(*--... Constant expressions ...............................................--*) + +(** {7 Constant expressions} *) (** [size_of ty] returns the sizeof constant for the type [ty]. This is equivalent to [const_ptrtoint (const_gep (const_null (pointer_type ty)) (const_int i64_type 1)) i64_type], but considerably more readable. - See the method [llvm::ConstantExpr::getSizeOf]. **) + See the method [llvm::ConstantExpr::getSizeOf]. *) external size_of : lltype -> llvalue = "LLVMSizeOf" (** [const_neg c] returns the arithmetic negation of the constant [c]. - See the method [llvm::ConstantExpr::getNeg]. **) + See the method [llvm::ConstantExpr::getNeg]. *) external const_neg : llvalue -> llvalue = "LLVMConstNeg" (** [const_not c] returns the bitwise inverse of the constant [c]. - See the method [llvm::ConstantExpr::getNot]. **) + See the method [llvm::ConstantExpr::getNot]. *) external const_not : llvalue -> llvalue = "LLVMConstNot" (** [const_add c1 c2] returns the constant sum of two constants. - See the method [llvm::ConstantExpr::getAdd]. **) + See the method [llvm::ConstantExpr::getAdd]. *) external const_add : llvalue -> llvalue -> llvalue = "LLVMConstAdd" (** [const_sub c1 c2] returns the constant difference, [c1 - c2], of two - constants. See the method [llvm::ConstantExpr::getSub]. **) + constants. See the method [llvm::ConstantExpr::getSub]. *) external const_sub : llvalue -> llvalue -> llvalue = "LLVMConstSub" (** [const_mul c1 c2] returns the constant product of two constants. - See the method [llvm::ConstantExpr::getMul]. **) + See the method [llvm::ConstantExpr::getMul]. *) external const_mul : llvalue -> llvalue -> llvalue = "LLVMConstMul" (** [const_udiv c1 c2] returns the constant quotient [c1 / c2] of two unsigned integer constants. - See the method [llvm::ConstantExpr::getUDiv]. **) + See the method [llvm::ConstantExpr::getUDiv]. *) external const_udiv : llvalue -> llvalue -> llvalue = "LLVMConstUDiv" (** [const_sdiv c1 c2] returns the constant quotient [c1 / c2] of two signed integer constants. - See the method [llvm::ConstantExpr::]. **) + See the method [llvm::ConstantExpr::]. *) external const_sdiv : llvalue -> llvalue -> llvalue = "LLVMConstSDiv" (** [const_fdiv c1 c2] returns the constant quotient [c1 / c2] of two floating point constants. - See the method [llvm::ConstantExpr::getFDiv]. **) + See the method [llvm::ConstantExpr::getFDiv]. *) external const_fdiv : llvalue -> llvalue -> llvalue = "LLVMConstFDiv" (** [const_udiv c1 c2] returns the constant remainder [c1 MOD c2] of two unsigned integer constants. - See the method [llvm::ConstantExpr::getURem]. **) + See the method [llvm::ConstantExpr::getURem]. *) external const_urem : llvalue -> llvalue -> llvalue = "LLVMConstURem" (** [const_sdiv c1 c2] returns the constant remainder [c1 MOD c2] of two signed integer constants. - See the method [llvm::ConstantExpr::getSRem]. **) + See the method [llvm::ConstantExpr::getSRem]. *) external const_srem : llvalue -> llvalue -> llvalue = "LLVMConstSRem" (** [const_frem c1 c2] returns the constant remainder [c1 MOD c2] of two signed floating point constants. - See the method [llvm::ConstantExpr::getFRem]. **) + See the method [llvm::ConstantExpr::getFRem]. *) external const_frem : llvalue -> llvalue -> llvalue = "LLVMConstFRem" (** [const_and c1 c2] returns the constant bitwise [AND] of two integer constants. - See the method [llvm::ConstantExpr::getAnd]. **) + See the method [llvm::ConstantExpr::getAnd]. *) external const_and : llvalue -> llvalue -> llvalue = "LLVMConstAnd" (** [const_or c1 c2] returns the constant bitwise [OR] of two integer constants. - See the method [llvm::ConstantExpr::getOr]. **) + See the method [llvm::ConstantExpr::getOr]. *) external const_or : llvalue -> llvalue -> llvalue = "LLVMConstOr" (** [const_xor c1 c2] returns the constant bitwise [XOR] of two integer constants. - See the method [llvm::ConstantExpr::getXor]. **) + See the method [llvm::ConstantExpr::getXor]. *) external const_xor : llvalue -> llvalue -> llvalue = "LLVMConstXor" (** [const_icmp pred c1 c2] returns the constant comparison of two integer constants, [c1 pred c2]. - See the method [llvm::ConstantExpr::getICmp]. **) + See the method [llvm::ConstantExpr::getICmp]. *) external const_icmp : Icmp.t -> llvalue -> llvalue -> llvalue = "llvm_const_icmp" (** [const_fcmp pred c1 c2] returns the constant comparison of two floating point constants, [c1 pred c2]. - See the method [llvm::ConstantExpr::getFCmp]. **) + See the method [llvm::ConstantExpr::getFCmp]. *) external const_fcmp : Fcmp.t -> llvalue -> llvalue -> llvalue = "llvm_const_fcmp" (** [const_shl c1 c2] returns the constant integer [c1] left-shifted by the constant integer [c2]. - See the method [llvm::ConstantExpr::getShl]. **) + See the method [llvm::ConstantExpr::getShl]. *) external const_shl : llvalue -> llvalue -> llvalue = "LLVMConstShl" (** [const_lshr c1 c2] returns the constant integer [c1] right-shifted by the constant integer [c2] with zero extension. - See the method [llvm::ConstantExpr::getLShr]. **) + See the method [llvm::ConstantExpr::getLShr]. *) external const_lshr : llvalue -> llvalue -> llvalue = "LLVMConstLShr" (** [const_ashr c1 c2] returns the constant integer [c1] right-shifted by the constant integer [c2] with sign extension. - See the method [llvm::ConstantExpr::getAShr]. **) + See the method [llvm::ConstantExpr::getAShr]. *) external const_ashr : llvalue -> llvalue -> llvalue = "LLVMConstAShr" (** [const_gep pc indices] returns the constant [getElementPtr] of [p1] with the constant integers indices from the array [indices]. - See the method [llvm::ConstantExpr::getGetElementPtr]. **) + See the method [llvm::ConstantExpr::getGetElementPtr]. *) external const_gep : llvalue -> llvalue array -> llvalue = "llvm_const_gep" (** [const_trunc c ty] returns the constant truncation of integer constant [c] to the smaller integer type [ty]. - See the method [llvm::ConstantExpr::getTrunc]. **) + See the method [llvm::ConstantExpr::getTrunc]. *) external const_trunc : llvalue -> lltype -> llvalue = "LLVMConstTrunc" (** [const_sext c ty] returns the constant sign extension of integer constant [c] to the larger integer type [ty]. - See the method [llvm::ConstantExpr::getSExt]. **) + See the method [llvm::ConstantExpr::getSExt]. *) external const_sext : llvalue -> lltype -> llvalue = "LLVMConstSExt" (** [const_zext c ty] returns the constant zero extension of integer constant [c] to the larger integer type [ty]. - See the method [llvm::ConstantExpr::getZExt]. **) + See the method [llvm::ConstantExpr::getZExt]. *) external const_zext : llvalue -> lltype -> llvalue = "LLVMConstZExt" (** [const_fptrunc c ty] returns the constant truncation of floating point constant [c] to the smaller floating point type [ty]. - See the method [llvm::ConstantExpr::getFPTrunc]. **) + See the method [llvm::ConstantExpr::getFPTrunc]. *) external const_fptrunc : llvalue -> lltype -> llvalue = "LLVMConstFPTrunc" (** [const_fpext c ty] returns the constant extension of floating point constant [c] to the larger floating point type [ty]. - See the method [llvm::ConstantExpr::getFPExt]. **) + See the method [llvm::ConstantExpr::getFPExt]. *) external const_fpext : llvalue -> lltype -> llvalue = "LLVMConstFPExt" (** [const_uitofp c ty] returns the constant floating point conversion of unsigned integer constant [c] to the floating point type [ty]. - See the method [llvm::ConstantExpr::getUIToFP]. **) + See the method [llvm::ConstantExpr::getUIToFP]. *) external const_uitofp : llvalue -> lltype -> llvalue = "LLVMConstUIToFP" (** [const_sitofp c ty] returns the constant floating point conversion of signed integer constant [c] to the floating point type [ty]. - See the method [llvm::ConstantExpr::getSIToFP]. **) + See the method [llvm::ConstantExpr::getSIToFP]. *) external const_sitofp : llvalue -> lltype -> llvalue = "LLVMConstSIToFP" (** [const_fptoui c ty] returns the constant unsigned integer conversion of floating point constant [c] to integer type [ty]. - See the method [llvm::ConstantExpr::getFPToUI]. **) + See the method [llvm::ConstantExpr::getFPToUI]. *) external const_fptoui : llvalue -> lltype -> llvalue = "LLVMConstFPToUI" (** [const_fptoui c ty] returns the constant unsigned integer conversion of floating point constant [c] to integer type [ty]. - See the method [llvm::ConstantExpr::getFPToSI]. **) + See the method [llvm::ConstantExpr::getFPToSI]. *) external const_fptosi : llvalue -> lltype -> llvalue = "LLVMConstFPToSI" (** [const_ptrtoint c ty] returns the constant integer conversion of pointer constant [c] to integer type [ty]. - See the method [llvm::ConstantExpr::getPtrToInt]. **) + See the method [llvm::ConstantExpr::getPtrToInt]. *) external const_ptrtoint : llvalue -> lltype -> llvalue = "LLVMConstPtrToInt" (** [const_inttoptr c ty] returns the constant pointer conversion of integer constant [c] to pointer type [ty]. - See the method [llvm::ConstantExpr::getIntToPtr]. **) + See the method [llvm::ConstantExpr::getIntToPtr]. *) external const_inttoptr : llvalue -> lltype -> llvalue = "LLVMConstIntToPtr" (** [const_bitcast c ty] returns the constant bitwise conversion of constant [c] to type [ty] of equal size. - See the method [llvm::ConstantExpr::getBitCast]. **) + See the method [llvm::ConstantExpr::getBitCast]. *) external const_bitcast : llvalue -> lltype -> llvalue = "LLVMConstBitCast" (** [const_select cond t f] returns the constant conditional which returns value [t] if the boolean constant [cond] is true and the value [f] otherwise. - See the method [llvm::ConstantExpr::getSelect]. **) + See the method [llvm::ConstantExpr::getSelect]. *) external const_select : llvalue -> llvalue -> llvalue -> llvalue = "LLVMConstSelect" (** [const_extractelement vec i] returns the constant [i]th element of constant vector [vec]. [i] must be a constant [i32] value unsigned less than the size of the vector. - See the method [llvm::ConstantExpr::getExtractElement]. **) + See the method [llvm::ConstantExpr::getExtractElement]. *) external const_extractelement : llvalue -> llvalue -> llvalue = "LLVMConstExtractElement" @@ -644,305 +658,315 @@ constant [v]. [v] must be a constant value with the type of the vector elements. [i] must be a constant [i32] value unsigned less than the size of the vector. - See the method [llvm::ConstantExpr::getInsertElement]. **) + See the method [llvm::ConstantExpr::getInsertElement]. *) external const_insertelement : llvalue -> llvalue -> llvalue -> llvalue = "LLVMConstInsertElement" (** [const_shufflevector a b mask] returns a constant [shufflevector]. See the LLVM Language Reference for details on the [sufflevector] instruction. - See the method [llvm::ConstantExpr::getShuffleVector]. **) + See the method [llvm::ConstantExpr::getShuffleVector]. *) external const_shufflevector : llvalue -> llvalue -> llvalue -> llvalue = "LLVMConstShuffleVector" -(*--... Operations on global variables, functions, and aliases (globals) ...--*) + +(** {7 Operations on global variables, functions, and aliases (globals)} *) (** [is_declaration g] returns [true] if the global value [g] is a declaration only. Returns [false] otherwise. - See the method [llvm::GlobalValue::isDeclaration]. **) + See the method [llvm::GlobalValue::isDeclaration]. *) external is_declaration : llvalue -> bool = "llvm_is_declaration" (** [linkage g] returns the linkage of the global value [g]. - See the method [llvm::GlobalValue::getLinkage]. **) + See the method [llvm::GlobalValue::getLinkage]. *) external linkage : llvalue -> Linkage.t = "llvm_linkage" (** [set_linkage l g] sets the linkage of the global value [g] to [l]. - See the method [llvm::GlobalValue::setLinkage]. **) + See the method [llvm::GlobalValue::setLinkage]. *) external set_linkage : Linkage.t -> llvalue -> unit = "llvm_set_linkage" (** [section g] returns the linker section of the global value [g]. - See the method [llvm::GlobalValue::getSection]. **) + See the method [llvm::GlobalValue::getSection]. *) external section : llvalue -> string = "llvm_section" (** [set_section s g] sets the linker section of the global value [g] to [s]. - See the method [llvm::GlobalValue::setSection]. **) + See the method [llvm::GlobalValue::setSection]. *) external set_section : string -> llvalue -> unit = "llvm_set_section" (** [visibility g] returns the linker visibility of the global value [g]. - See the method [llvm::GlobalValue::getVisibility]. **) + See the method [llvm::GlobalValue::getVisibility]. *) external visibility : llvalue -> Visibility.t = "llvm_visibility" (** [set_visibility v g] sets the linker visibility of the global value [g] to - [v]. See the method [llvm::GlobalValue::setVisibility]. **) + [v]. See the method [llvm::GlobalValue::setVisibility]. *) external set_visibility : Visibility.t -> llvalue -> unit = "llvm_set_visibility" (** [alignment g] returns the required alignment of the global value [g]. - See the method [llvm::GlobalValue::getAlignment]. **) + See the method [llvm::GlobalValue::getAlignment]. *) external alignment : llvalue -> int = "llvm_alignment" (** [set_alignment n g] sets the required alignment of the global value [g] to - [n] bytes. See the method [llvm::GlobalValue::setAlignment]. **) + [n] bytes. See the method [llvm::GlobalValue::setAlignment]. *) external set_alignment : int -> llvalue -> unit = "llvm_set_alignment" -(*--... Operations on global variables .....................................--*) + +(** {7 Operations on global variables} *) (** [declare_global ty name m] returns a new global variable of type [ty] and with name [name] in module [m]. If such a global variable already exists, it is returned. If the type of the existing global differs, then a bitcast - to [ty] is returned. **) + to [ty] is returned. *) external declare_global : lltype -> string -> llmodule -> llvalue = "llvm_declare_global" (** [define_global name init m] returns a new global with name [name] and initializer [init] in module [m]. If the named global already exists, it is renamed. - See the constructor of [llvm::GlobalVariable]. **) + See the constructor of [llvm::GlobalVariable]. *) external define_global : string -> llvalue -> llmodule -> llvalue = "llvm_define_global" (** [lookup_global name m] returns [Some g] if a global variable with name [name] exists in module [m]. If no such global exists, returns [None]. - See the [llvm::GlobalVariable] constructor. **) + See the [llvm::GlobalVariable] constructor. *) external lookup_global : string -> llmodule -> llvalue option = "llvm_lookup_global" (** [delete_global gv] destroys the global variable [gv]. - See the method [llvm::GlobalVariable::eraseFromParent]. **) + See the method [llvm::GlobalVariable::eraseFromParent]. *) external delete_global : llvalue -> unit = "llvm_delete_global" (** [is_global_constant gv] returns [true] if the global variabile [gv] is a constant. Returns [false] otherwise. - See the method [llvm::GlobalVariable::isConstant]. **) + See the method [llvm::GlobalVariable::isConstant]. *) external is_global_constant : llvalue -> bool = "llvm_is_global_constant" (** [set_global_constant c gv] sets the global variable [gv] to be a constant if [c] is [true] and not if [c] is [false]. - See the method [llvm::GlobalVariable::setConstant]. **) + See the method [llvm::GlobalVariable::setConstant]. *) external set_global_constant : bool -> llvalue -> unit = "llvm_set_global_constant" (** [has_initializer gv] returns [true] if the global variable [gv] has an initializer and [false] otherwise. - See the method [llvm::GlobalVariable::hasInitializer]. **) + See the method [llvm::GlobalVariable::hasInitializer]. *) external has_initializer : llvalue -> bool = "llvm_has_initializer" (** [global_initializer gv] returns the initializer for the global variable - [gv]. See the method [llvm::GlobalVariable::getInitializer]. **) + [gv]. See the method [llvm::GlobalVariable::getInitializer]. *) external global_initializer : llvalue -> llvalue = "LLVMGetInitializer" (** [set_initializer c gv] sets the initializer for the global variable [gv] to the constant [c]. - See the method [llvm::GlobalVariable::setInitializer]. **) + See the method [llvm::GlobalVariable::setInitializer]. *) external set_initializer : llvalue -> llvalue -> unit = "llvm_set_initializer" (** [remove_initializer gv] unsets the initializer for the global variable [gv]. - See the method [llvm::GlobalVariable::setInitializer]. **) + See the method [llvm::GlobalVariable::setInitializer]. *) external remove_initializer : llvalue -> unit = "llvm_remove_initializer" (** [is_thread_local gv] returns [true] if the global variable [gv] is thread-local and [false] otherwise. - See the method [llvm::GlobalVariable::isThreadLocal]. **) + See the method [llvm::GlobalVariable::isThreadLocal]. *) external is_thread_local : llvalue -> bool = "llvm_is_thread_local" (** [set_thread_local c gv] sets the global variable [gv] to be thread local if [c] is [true] and not otherwise. - See the method [llvm::GlobalVariable::setThreadLocal]. **) + See the method [llvm::GlobalVariable::setThreadLocal]. *) external set_thread_local : bool -> llvalue -> unit = "llvm_set_thread_local" -(*--... Operations on functions ............................................--*) + +(** {7 Operations on functions} *) (** [declare_function name ty m] returns a new function of type [ty] and with name [name] in module [m]. If such a function already exists, it is returned. If the type of the existing function differs, then a bitcast - to [ty] is returned. **) + to [ty] is returned. *) external declare_function : string -> lltype -> llmodule -> llvalue = "llvm_declare_function" (** [define_function name ty m] creates a new function with name [name] and type [ty] in module [m]. If the named function already exists, it is renamed. An entry basic block is created in the function. - See the constructor of [llvm::GlobalVariable]. **) + See the constructor of [llvm::GlobalVariable]. *) external define_function : string -> lltype -> llmodule -> llvalue = "llvm_define_function" (** [lookup_function name m] returns [Some f] if a function with name [name] exists in module [m]. If no such function exists, returns [None]. - See the method [llvm::Module] constructor. **) + See the method [llvm::Module] constructor. *) external lookup_function : string -> llmodule -> llvalue option = "llvm_lookup_function" (** [delete_function f] destroys the function [f]. - See the method [llvm::Function::eraseFromParent]. **) + See the method [llvm::Function::eraseFromParent]. *) external delete_function : llvalue -> unit = "llvm_delete_function" (** [params f] returns the parameters of function [f]. - See the method [llvm::Function::getArgumentList]. **) + See the method [llvm::Function::getArgumentList]. *) external params : llvalue -> llvalue array = "llvm_params" (** [param f n] returns the [n]th parameter of function [f]. - See the method [llvm::Function::getArgumentList]. **) + See the method [llvm::Function::getArgumentList]. *) external param : llvalue -> int -> llvalue = "llvm_param" (** [is_intrinsic f] returns true if the function [f] is an intrinsic. - See the method [llvm::Function::isIntrinsic]. **) + See the method [llvm::Function::isIntrinsic]. *) external is_intrinsic : llvalue -> bool = "llvm_is_intrinsic" (** [function_call_conv f] returns the calling convention of the function [f]. - See the method [llvm::Function::getCallingConv]. **) + See the method [llvm::Function::getCallingConv]. *) external function_call_conv : llvalue -> int = "llvm_function_call_conv" (** [set_function_call_conv cc f] sets the calling convention of the function [f] to the calling convention numbered [cc]. - See the method [llvm::Function::setCallingConv]. **) + See the method [llvm::Function::setCallingConv]. *) external set_function_call_conv : int -> llvalue -> unit = "llvm_set_function_call_conv" (** [collector f] returns [Some name] if the function [f] has a garbage collection algorithm specified and [None] otherwise. - See the method [llvm::Function::getCollector]. **) + See the method [llvm::Function::getCollector]. *) external collector : llvalue -> string option = "llvm_collector" (** [set_collector gc f] sets the collection algorithm for the function [f] to - [gc]. See the method [llvm::Function::setCollector]. **) + [gc]. See the method [llvm::Function::setCollector]. *) external set_collector : string option -> llvalue -> unit = "llvm_set_collector" -(*--... Operations on basic blocks .........................................--*) + +(** {7 Operations on basic blocks} *) (** [basic_blocks fn] returns the basic blocks of the function [f]. - See the method [llvm::Function::getBasicBlockList]. **) + See the method [llvm::Function::getBasicBlockList]. *) external basic_blocks : llvalue -> llbasicblock array = "llvm_basic_blocks" (** [entry_block fn] returns the entry basic block of the function [f]. - See the method [llvm::Function::getEntryBlock]. **) + See the method [llvm::Function::getEntryBlock]. *) external entry_block : llvalue -> llbasicblock = "LLVMGetEntryBasicBlock" (** [delete_block bb] deletes the basic block [bb]. - See the method [llvm::BasicBlock::eraseFromParent]. **) + See the method [llvm::BasicBlock::eraseFromParent]. *) external delete_block : llbasicblock -> unit = "llvm_delete_block" (** [append_block name f] creates a new basic block named [name] at the end of function [f]. - See the constructor of [llvm::BasicBlock]. **) + See the constructor of [llvm::BasicBlock]. *) external append_block : string -> llvalue -> llbasicblock = "llvm_append_block" (** [insert_block name bb] creates a new basic block named [name] before the basic block [bb]. - See the constructor of [llvm::BasicBlock]. **) + See the constructor of [llvm::BasicBlock]. *) external insert_block : string -> llbasicblock -> llbasicblock = "llvm_insert_block" -(** [value_of_block bb] losslessly casts [bb] to an [llvalue]. **) +(** [value_of_block bb] losslessly casts [bb] to an [llvalue]. *) external value_of_block : llbasicblock -> llvalue = "LLVMBasicBlockAsValue" (** [value_is_block v] returns [true] if the value [v] is a basic block and [false] otherwise. - Similar to [llvm::isa]. **) + Similar to [llvm::isa]. *) external value_is_block : llvalue -> bool = "llvm_value_is_block" -(** [block_of_value v] losslessly casts [v] to an [llbasicblock]. **) +(** [block_of_value v] losslessly casts [v] to an [llbasicblock]. *) external block_of_value : llvalue -> llbasicblock = "LLVMValueAsBasicBlock" -(*--... Operations on call sites ...........................................--*) -(** [inst_call_conv ci] is the calling convention for the call or invoke - instruction [ci], which may be one of the values from the module [CallConv]. - See the method [CallSite:: **) +(** {7 Operations on call sites} *) + +(** [instruction_call_conv ci] is the calling convention for the call or invoke + instruction [ci], which may be one of the values from the module + {!CallConv}. See the method [llvm::CallInst::getCallingConv] and + [llvm::InvokeInst::getCallingConv]. *) external instruction_call_conv: llvalue -> int = "llvm_instruction_call_conv" (** [set_inst_call_conv cc ci] sets the calling convention for the call or invoke instruction [ci] to the integer [cc], which can be one of the values - from the module [CallConv]. See the method [CallSite::]. **) + from the module {!CallConv}. See the method [llvm::CallInst::setCallingConv] + and [llvm::InvokeInst::setCallingConv]. *) external set_instruction_call_conv: int -> llvalue -> unit = "llvm_set_instruction_call_conv" -(*--... Operations on phi nodes ............................................--*) + +(** {7 Operations on phi nodes} *) (** [add_incoming (v, bb) pn] adds the value [v] to the phi node [pn] for use - with branches from [bb]. See the method [llvm::PHINode::addIncoming]. **) + with branches from [bb]. See the method [llvm::PHINode::addIncoming]. *) external add_incoming : (llvalue * llbasicblock) -> llvalue -> unit = "llvm_add_incoming" (** [incoming pn] returns the list of value-block pairs for phi node [pn]. - See the method [llvm::PHINode::getIncomingValue]. **) + See the method [llvm::PHINode::getIncomingValue]. *) external incoming : llvalue -> (llvalue * llbasicblock) list = "llvm_incoming" -(*===-- Instruction builders ----------------------------------------------===*) + +(** {6 Instruction builders} *) (** [builder] creates an instruction builder with no position. It is invalid to - use this builder until its position is set with [position_before] or - [position_at_end]. See the constructor for [llvm::LLVMBuilder]. **) + use this builder until its position is set with {!position_before} or + {!position_at_end}. See the constructor for [llvm::LLVMBuilder]. *) external builder: unit-> llbuilder = "llvm_builder" (** [builder_before ins] creates an instruction builder positioned before the - instruction [isn]. See the constructor for [llvm::LLVMBuilder]. **) + instruction [isn]. See the constructor for [llvm::LLVMBuilder]. *) external builder_before : llvalue -> llbuilder = "llvm_builder_before" (** [builder_at_end bb] creates an instruction builder positioned at the end of - the basic block [bb]. See the constructor for [llvm::LLVMBuilder]. **) + the basic block [bb]. See the constructor for [llvm::LLVMBuilder]. *) external builder_at_end : llbasicblock -> llbuilder = "llvm_builder_at_end" (** [position_before ins b] moves the instruction builder [b] to before the - instruction [isn]. See the method [llvm::LLVMBuilder::SetInsertPoint]. **) + instruction [isn]. See the method [llvm::LLVMBuilder::SetInsertPoint]. *) external position_before : llvalue -> llbuilder -> unit = "llvm_position_before" (** [position_at_end bb b] moves the instruction builder [b] to the end of the - basic block [bb]. See the method [llvm::LLVMBuilder::SetInsertPoint]. **) + basic block [bb]. See the method [llvm::LLVMBuilder::SetInsertPoint]. *) external position_at_end : llbasicblock -> llbuilder -> unit = "llvm_position_at_end" -(*--... Terminators ........................................................--*) + +(** {7 Terminators} *) (** [build_ret_void b] creates a [ret void] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateRetVoid]. **) + See the method [llvm::LLVMBuilder::CreateRetVoid]. *) external build_ret_void : llbuilder -> llvalue = "llvm_build_ret_void" (** [build_ret v b] creates a [ret %v] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateRet]. **) + See the method [llvm::LLVMBuilder::CreateRet]. *) external build_ret : llvalue -> llbuilder -> llvalue = "llvm_build_ret" (** [build_br bb b] creates a [b %bb] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateBr]. **) + See the method [llvm::LLVMBuilder::CreateBr]. *) external build_br : llbasicblock -> llbuilder -> llvalue = "llvm_build_br" (** [build_cond_br cond tbb fbb b] creates a [b %cond, %tbb, %fbb] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateCondBr]. **) + See the method [llvm::LLVMBuilder::CreateCondBr]. *) external build_cond_br : llvalue -> llbasicblock -> llbasicblock -> llbuilder -> llvalue = "llvm_build_cond_br" (** [build_switch case elsebb b] creates an empty [switch %case, %elsebb] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateSwitch]. **) + See the method [llvm::LLVMBuilder::CreateSwitch]. *) external build_switch : llvalue -> llbasicblock -> int -> llbuilder -> llvalue = "llvm_build_switch" (** [build_invoke fn args tobb unwindbb name b] creates an [%name = invoke %fn(args) to %tobb unwind %unwindbb] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateInvoke]. **) + See the method [llvm::LLVMBuilder::CreateInvoke]. *) external build_invoke : llvalue -> llvalue array -> llbasicblock -> llbasicblock -> string -> llbuilder -> llvalue = "llvm_build_invoke_bc" "llvm_build_invoke_nat" @@ -950,119 +974,120 @@ (** [build_unwind b] creates an [unwind] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateUnwind]. **) + See the method [llvm::LLVMBuilder::CreateUnwind]. *) external build_unwind : llbuilder -> llvalue = "llvm_build_unwind" (** [build_unreachable b] creates an [unreachable] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateUnwind]. **) + See the method [llvm::LLVMBuilder::CreateUnwind]. *) external build_unreachable : llbuilder -> llvalue = "llvm_build_unreachable" -(*--... Arithmetic .........................................................--*) + +(** {7 Arithmetic} *) (** [build_add x y name b] creates a [%name = add %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateAdd]. **) + See the method [llvm::LLVMBuilder::CreateAdd]. *) external build_add : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_add" (** [build_sub x y name b] creates a [%name = sub %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateSub]. **) + See the method [llvm::LLVMBuilder::CreateSub]. *) external build_sub : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_sub" (** [build_mul x y name b] creates a [%name = mul %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateMul]. **) + See the method [llvm::LLVMBuilder::CreateMul]. *) external build_mul : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_mul" (** [build_udiv x y name b] creates a [%name = udiv %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateUDiv]. **) + See the method [llvm::LLVMBuilder::CreateUDiv]. *) external build_udiv : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_udiv" (** [build_sdiv x y name b] creates a [%name = sdiv %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateSDiv]. **) + See the method [llvm::LLVMBuilder::CreateSDiv]. *) external build_sdiv : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_sdiv" (** [build_fdiv x y name b] creates a [%name = fdiv %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateFDiv]. **) + See the method [llvm::LLVMBuilder::CreateFDiv]. *) external build_fdiv : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_fdiv" (** [build_urem x y name b] creates a [%name = urem %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateURem]. **) + See the method [llvm::LLVMBuilder::CreateURem]. *) external build_urem : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_urem" (** [build_SRem x y name b] creates a [%name = srem %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateSRem]. **) + See the method [llvm::LLVMBuilder::CreateSRem]. *) external build_srem : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_srem" (** [build_frem x y name b] creates a [%name = frem %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateFRem]. **) + See the method [llvm::LLVMBuilder::CreateFRem]. *) external build_frem : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_frem" (** [build_shl x y name b] creates a [%name = shl %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateShl]. **) + See the method [llvm::LLVMBuilder::CreateShl]. *) external build_shl : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_shl" (** [build_lshr x y name b] creates a [%name = lshr %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateLShr]. **) + See the method [llvm::LLVMBuilder::CreateLShr]. *) external build_lshr : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_lshr" (** [build_ashr x y name b] creates a [%name = ashr %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateAShr]. **) + See the method [llvm::LLVMBuilder::CreateAShr]. *) external build_ashr : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_ashr" (** [build_and x y name b] creates a [%name = and %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateAnd]. **) + See the method [llvm::LLVMBuilder::CreateAnd]. *) external build_and : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_and" (** [build_or x y name b] creates a [%name = or %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateOr]. **) + See the method [llvm::LLVMBuilder::CreateOr]. *) external build_or : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_or" (** [build_xor x y name b] creates a [%name = xor %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateXor]. **) + See the method [llvm::LLVMBuilder::CreateXor]. *) external build_xor : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_xor" @@ -1070,7 +1095,7 @@ [%name = sub 0, %x] instruction at the position specified by the instruction builder [b]. [-0.0] is used for floating point types to compute the correct sign. - See the method [llvm::LLVMBuilder::CreateNeg]. **) + See the method [llvm::LLVMBuilder::CreateNeg]. *) external build_neg : llvalue -> string -> llbuilder -> llvalue = "llvm_build_neg" @@ -1078,248 +1103,253 @@ [%name = xor %x, -1] instruction at the position specified by the instruction builder [b]. [-1] is the correct "all ones" value for the type of [x]. - See the method [llvm::LLVMBuilder::CreateXor]. **) + See the method [llvm::LLVMBuilder::CreateXor]. *) external build_not : llvalue -> string -> llbuilder -> llvalue = "llvm_build_not" -(*--... Memory .............................................................--*) + +(** {7 Memory} *) (** [build_malloc ty name b] creates a [%name = malloc %ty] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateAlloca]. **) + See the method [llvm::LLVMBuilder::CreateAlloca]. *) external build_malloc : lltype -> string -> llbuilder -> llvalue = "llvm_build_malloc" (** [build_array_malloc ty n name b] creates a [%name = malloc %ty, %n] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateMalloc]. **) + See the method [llvm::LLVMBuilder::CreateMalloc]. *) external build_array_malloc : lltype -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_array_malloc" (** [build_alloca ty name b] creates a [%name = alloca %ty] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateAlloca]. **) + See the method [llvm::LLVMBuilder::CreateAlloca]. *) external build_alloca : lltype -> string -> llbuilder -> llvalue = "llvm_build_alloca" (** [build_array_alloca ty n name b] creates a [%name = alloca %ty, %n] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateAlloca]. **) + See the method [llvm::LLVMBuilder::CreateAlloca]. *) external build_array_alloca : lltype -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_array_alloca" (** [build_free v b] creates a [free %v] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateFree]. **) + See the method [llvm::LLVMBuilder::CreateFree]. *) external build_free : llvalue -> llbuilder -> llvalue = "llvm_build_free" (** [build_load v name b] creates a [%name = load %v] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateLoad]. **) + See the method [llvm::LLVMBuilder::CreateLoad]. *) external build_load : llvalue -> string -> llbuilder -> llvalue = "llvm_build_load" (** [build_store v p b] creates a [store %v, %p] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateStore]. **) + See the method [llvm::LLVMBuilder::CreateStore]. *) external build_store : llvalue -> llvalue -> llbuilder -> llvalue = "llvm_build_store" (** [build_gep p indices name b] creates a [%name = gep %p, indices...] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateGetElementPtr]. **) + See the method [llvm::LLVMBuilder::CreateGetElementPtr]. *) external build_gep : llvalue -> llvalue array -> string -> llbuilder -> llvalue = "llvm_build_gep" -(*--... Casts ..............................................................--*) + +(** {7 Casts} *) (** [build_trunc v ty name b] creates a [%name = trunc %p to %ty] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateTrunc]. **) + See the method [llvm::LLVMBuilder::CreateTrunc]. *) external build_trunc : llvalue -> lltype -> string -> llbuilder -> llvalue = "llvm_build_trunc" (** [build_zext v ty name b] creates a [%name = zext %p to %ty] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateZExt]. **) + See the method [llvm::LLVMBuilder::CreateZExt]. *) external build_zext : llvalue -> lltype -> string -> llbuilder -> llvalue = "llvm_build_zext" (** [build_sext v ty name b] creates a [%name = sext %p to %ty] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateSExt]. **) + See the method [llvm::LLVMBuilder::CreateSExt]. *) external build_sext : llvalue -> lltype -> string -> llbuilder -> llvalue = "llvm_build_sext" (** [build_fptoui v ty name b] creates a [%name = fptoui %p to %ty] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateFPToUI]. **) + See the method [llvm::LLVMBuilder::CreateFPToUI]. *) external build_fptoui : llvalue -> lltype -> string -> llbuilder -> llvalue = "llvm_build_fptoui" (** [build_fptosi v ty name b] creates a [%name = fptosi %p to %ty] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateFPToSI]. **) + See the method [llvm::LLVMBuilder::CreateFPToSI]. *) external build_fptosi : llvalue -> lltype -> string -> llbuilder -> llvalue = "llvm_build_fptosi" (** [build_uitofp v ty name b] creates a [%name = uitofp %p to %ty] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateUIToFP]. **) + See the method [llvm::LLVMBuilder::CreateUIToFP]. *) external build_uitofp : llvalue -> lltype -> string -> llbuilder -> llvalue = "llvm_build_uitofp" (** [build_sitofp v ty name b] creates a [%name = sitofp %p to %ty] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateSIToFP]. **) + See the method [llvm::LLVMBuilder::CreateSIToFP]. *) external build_sitofp : llvalue -> lltype -> string -> llbuilder -> llvalue = "llvm_build_sitofp" (** [build_fptrunc v ty name b] creates a [%name = fptrunc %p to %ty] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateFPTrunc]. **) + See the method [llvm::LLVMBuilder::CreateFPTrunc]. *) external build_fptrunc : llvalue -> lltype -> string -> llbuilder -> llvalue = "llvm_build_fptrunc" (** [build_fpext v ty name b] creates a [%name = fpext %p to %ty] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateFPExt]. **) + See the method [llvm::LLVMBuilder::CreateFPExt]. *) external build_fpext : llvalue -> lltype -> string -> llbuilder -> llvalue = "llvm_build_fpext" (** [build_ptrtoint v ty name b] creates a [%name = prtotint %p to %ty] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreatePtrToInt]. **) + See the method [llvm::LLVMBuilder::CreatePtrToInt]. *) external build_ptrtoint : llvalue -> lltype -> string -> llbuilder -> llvalue = "llvm_build_prttoint" (** [build_inttoptr v ty name b] creates a [%name = inttoptr %p to %ty] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateIntToPtr]. **) + See the method [llvm::LLVMBuilder::CreateIntToPtr]. *) external build_inttoptr : llvalue -> lltype -> string -> llbuilder -> llvalue = "llvm_build_inttoptr" (** [build_bitcast v ty name b] creates a [%name = bitcast %p to %ty] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateBitcast]. **) + See the method [llvm::LLVMBuilder::CreateBitcast]. *) external build_bitcast : llvalue -> lltype -> string -> llbuilder -> llvalue = "llvm_build_bitcast" -(*--... Comparisons ........................................................--*) + +(** {7 Comparisons} *) (** [build_icmp pred x y name b] creates a [%name = icmp %pred %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateICmp]. **) + See the method [llvm::LLVMBuilder::CreateICmp]. *) external build_icmp : Icmp.t -> llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_icmp" (** [build_fcmp pred x y name b] creates a [%name = fcmp %pred %x, %y] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateFCmp]. **) + See the method [llvm::LLVMBuilder::CreateFCmp]. *) external build_fcmp : Fcmp.t -> llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_fcmp" -(*--... Miscellaneous instructions .........................................--*) + +(** {7 Miscellaneous instructions} *) (** [build_phi incoming name b] creates a [%name = phi %incoming] instruction at the position specified by the instruction builder [b]. - [incoming] is a list of [(llvalue, llbasicblock)] tuples. - See the method [llvm::LLVMBuilder::CreatePHI]. **) + [incoming] is a list of [({!llvalue}, {!llbasicblock})] tuples. + See the method [llvm::LLVMBuilder::CreatePHI]. *) external build_phi : (llvalue * llbasicblock) list -> string -> llbuilder -> llvalue = "llvm_build_phi" (** [build_call fn args name b] creates a [%name = call %fn(args...)] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateCall]. **) + See the method [llvm::LLVMBuilder::CreateCall]. *) external build_call : llvalue -> llvalue array -> string -> llbuilder -> llvalue = "llvm_build_call" (** [build_select cond thenv elsev name b] creates a [%name = select %cond, %thenv, %elsev] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateSelect]. **) + See the method [llvm::LLVMBuilder::CreateSelect]. *) external build_select : llvalue -> llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_select" (** [build_va_arg valist argty name b] creates a [%name = va_arg %valist, %argty] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateVAArg]. **) + See the method [llvm::LLVMBuilder::CreateVAArg]. *) external build_va_arg : llvalue -> lltype -> string -> llbuilder -> llvalue = "llvm_build_va_arg" (** [build_extractelement vec i name b] creates a [%name = extractelement %vec, %i] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateExtractElement]. **) + See the method [llvm::LLVMBuilder::CreateExtractElement]. *) external build_extractelement : llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_extractelement" (** [build_insertelement vec elt i name b] creates a [%name = insertelement %vec, %elt, %i] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateInsertElement]. **) + See the method [llvm::LLVMBuilder::CreateInsertElement]. *) external build_insertelement : llvalue -> llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_insertelement" (** [build_shufflevector veca vecb mask name b] creates a [%name = shufflevector %veca, %vecb, %mask] instruction at the position specified by the instruction builder [b]. - See the method [llvm::LLVMBuilder::CreateShuffleVector]. **) + See the method [llvm::LLVMBuilder::CreateShuffleVector]. *) external build_shufflevector : llvalue -> llvalue -> llvalue -> string -> llbuilder -> llvalue = "llvm_build_shufflevector" -(*===-- Module providers --------------------------------------------------===*) +(** {6 Module providers} *) module ModuleProvider : sig (** [create_module_provider m] encapsulates [m] in a module provider and takes - ownership of the module. See the constructor - [llvm::ExistingModuleProvider::ExistingModuleProvider]. **) + ownership of the module. See the constructor + [llvm::ExistingModuleProvider::ExistingModuleProvider]. *) external create : llmodule -> llmoduleprovider = "LLVMCreateModuleProviderForExistingModule" - + (** [dispose_module_provider mp] destroys the module provider [mp] as well as - the contained module. **) + the contained module. *) external dispose : llmoduleprovider -> unit = "llvm_dispose_module_provider" end - -(*===-- Memory buffers ----------------------------------------------------===*) + +(** {6 Memory buffers} *) module MemoryBuffer : sig - (** [of_file p] is the memory buffer containing the contents of the file at - path [p]. If the file could not be read, then [IoError msg] is raised. **) + (** [of_file p] is the memory buffer containing the contents of the file at + path [p]. If the file could not be read, then [IoError msg] is + raised. *) external of_file : string -> llmemorybuffer = "llvm_memorybuffer_of_file" (** [stdin ()] is the memory buffer containing the contents of standard input. - If standard input is empty, then [IoError msg] is raised. **) + If standard input is empty, then [IoError msg] is raised. *) external of_stdin : unit -> llmemorybuffer = "llvm_memorybuffer_of_stdin" - (** Disposes of a memory buffer. **) + (** Disposes of a memory buffer. *) external dispose : llmemorybuffer -> unit = "llvm_memorybuffer_dispose" end From nicholas at mxc.ca Sun Mar 9 01:36:38 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 09 Mar 2008 07:36:38 -0000 Subject: [llvm-commits] [llvm] r48096 - in /llvm/trunk: lib/Transforms/Utils/SimplifyCFG.cpp test/Transforms/SimplifyCFG/unwindto.ll Message-ID: <200803090736.m297acXI028572@zion.cs.uiuc.edu> Author: nicholas Date: Sun Mar 9 01:36:38 2008 New Revision: 48096 URL: http://llvm.org/viewvc/llvm-project?rev=48096&view=rev Log: A BB that unwind_to an "unwind" inst is that same as one that doesn't unwind_to at all. Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=48096&r1=48095&r2=48096&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Sun Mar 9 01:36:38 2008 @@ -1370,7 +1370,7 @@ new UnwindInst(Pred); // Use unwind. Changed = true; } - } else if (InvokeInst *II = dyn_cast(Pred->getTerminator())) + } else if (InvokeInst *II = dyn_cast(Pred->getTerminator())) { if (II->getUnwindDest() == BB) { // Insert a new branch instruction before the invoke, because this // is now a fall through... @@ -1388,6 +1388,9 @@ delete II; Changed = true; } + } else if (Pred->getUnwindDest() == BB) { + Pred->setUnwindDest(NULL); + } Preds.pop_back(); } Modified: llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll?rev=48096&r1=48095&r2=48096&view=diff ============================================================================== --- llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll (original) +++ llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll Sun Mar 9 01:36:38 2008 @@ -33,3 +33,11 @@ cleanup: ret i32 1 } + +define i32 @f3() { +entry: unwind_to %cleanup + call void @g(i32 0) + ret i32 0 +cleanup: + unwind +} From sabre at nondot.org Sun Mar 9 01:47:22 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 07:47:22 -0000 Subject: [llvm-commits] [llvm] r48097 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Message-ID: <200803090747.m297lM43028961@zion.cs.uiuc.edu> Author: lattner Date: Sun Mar 9 01:47:22 2008 New Revision: 48097 URL: http://llvm.org/viewvc/llvm-project?rev=48097&view=rev Log: extend fp values with FP_EXTEND not FP_ROUND. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=48097&r1=48096&r2=48097&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sun Mar 9 01:47:22 2008 @@ -759,9 +759,12 @@ } } - if (MVT::isFloatingPoint(PartVT) && MVT::isFloatingPoint(ValueVT)) - return DAG.getNode(ISD::FP_ROUND, ValueVT, Val, - DAG.getIntPtrConstant(TruncExact)); + if (MVT::isFloatingPoint(PartVT) && MVT::isFloatingPoint(ValueVT)) { + if (ValueVT < Val.getValueType()) + return DAG.getNode(ISD::FP_ROUND, ValueVT, Val, + DAG.getIntPtrConstant(TruncExact)); + return DAG.getNode(ISD::FP_EXTEND, ValueVT, Val); + } if (MVT::getSizeInBits(PartVT) == MVT::getSizeInBits(ValueVT)) return DAG.getNode(ISD::BIT_CONVERT, ValueVT, Val); From sabre at nondot.org Sun Mar 9 01:49:01 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 07:49:01 -0000 Subject: [llvm-commits] [llvm] r48098 - /llvm/trunk/lib/Target/X86/X86RegisterInfo.td Message-ID: <200803090749.m297n1xI029020@zion.cs.uiuc.edu> Author: lattner Date: Sun Mar 9 01:49:01 2008 New Revision: 48098 URL: http://llvm.org/viewvc/llvm-project?rev=48098&view=rev Log: claim ST(x) registers are 80 bits, which is true. This doesn't affect codegen yet because these can't be spilled (they don't exist until after RA). Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.td Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.td?rev=48098&r1=48097&r2=48098&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.td Sun Mar 9 01:49:01 2008 @@ -488,7 +488,7 @@ // Floating point stack registers (these are not allocatable by the // register allocator - the floating point stackifier is responsible // for transforming FPn allocations to STn registers) -def RST : RegisterClass<"X86", [f64], 32, +def RST : RegisterClass<"X86", [f80], 32, [ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7]> { let MethodProtos = [{ iterator allocation_order_end(const MachineFunction &MF) const; From nicholas at mxc.ca Sun Mar 9 01:50:37 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 09 Mar 2008 07:50:37 -0000 Subject: [llvm-commits] [llvm] r48099 - in /llvm/trunk: lib/Transforms/Utils/SimplifyCFG.cpp test/Transforms/SimplifyCFG/unwindto.ll Message-ID: <200803090750.m297obTM029074@zion.cs.uiuc.edu> Author: nicholas Date: Sun Mar 9 01:50:37 2008 New Revision: 48099 URL: http://llvm.org/viewvc/llvm-project?rev=48099&view=rev Log: Firstly, having a BranchInst isn't exclusive with having an unwind_to. Secondly, we have to check whether the branch is actually pointing to the block with the unwind in it. We could have gotten here because of the unwind_to alone. Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=48099&r1=48098&r2=48099&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Sun Mar 9 01:50:37 2008 @@ -1364,13 +1364,19 @@ SmallVector Preds(pred_begin(BB), pred_end(BB)); while (!Preds.empty()) { BasicBlock *Pred = Preds.back(); + + if (Pred->getUnwindDest() == BB) { + Pred->setUnwindDest(NULL); + Changed = true; + } + if (BranchInst *BI = dyn_cast(Pred->getTerminator())) { - if (BI->isUnconditional()) { + if (BI->isUnconditional() && BI->getSuccessor(0) == BB) { Pred->getInstList().pop_back(); // nuke uncond branch new UnwindInst(Pred); // Use unwind. Changed = true; } - } else if (InvokeInst *II = dyn_cast(Pred->getTerminator())) { + } else if (InvokeInst *II = dyn_cast(Pred->getTerminator())) if (II->getUnwindDest() == BB) { // Insert a new branch instruction before the invoke, because this // is now a fall through... @@ -1388,9 +1394,6 @@ delete II; Changed = true; } - } else if (Pred->getUnwindDest() == BB) { - Pred->setUnwindDest(NULL); - } Preds.pop_back(); } Modified: llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll?rev=48099&r1=48098&r2=48099&view=diff ============================================================================== --- llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll (original) +++ llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll Sun Mar 9 01:50:37 2008 @@ -41,3 +41,21 @@ cleanup: unwind } + +define i32 @f4() { +entry: unwind_to %cleanup + call void @g(i32 0) + br label %cleanup +cleanup: + unwind +} + +define i32 @f5() { +entry: unwind_to %cleanup + call void @g(i32 0) + br label %other +other: + ret i32 0 +cleanup: + unwind +} From sabre at nondot.org Sun Mar 9 01:51:02 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 07:51:02 -0000 Subject: [llvm-commits] [llvm] r48100 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Message-ID: <200803090751.m297p2G4029096@zion.cs.uiuc.edu> Author: lattner Date: Sun Mar 9 01:51:01 2008 New Revision: 48100 URL: http://llvm.org/viewvc/llvm-project?rev=48100&view=rev Log: fix 80 col violation Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=48100&r1=48099&r2=48100&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Sun Mar 9 01:51:01 2008 @@ -935,7 +935,8 @@ TII->insertNoop(*BB, BB->end()); } -void ScheduleDAG::EmitCrossRCCopy(SUnit *SU, DenseMap &VRBaseMap) { +void ScheduleDAG::EmitCrossRCCopy(SUnit *SU, + DenseMap &VRBaseMap) { for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); I != E; ++I) { if (I->isCtrl) continue; // ignore chain preds From sabre at nondot.org Sun Mar 9 01:58:05 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 07:58:05 -0000 Subject: [llvm-commits] [llvm] r48101 - /llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Message-ID: <200803090758.m297w57k029261@zion.cs.uiuc.edu> Author: lattner Date: Sun Mar 9 01:58:04 2008 New Revision: 48101 URL: http://llvm.org/viewvc/llvm-project?rev=48101&view=rev Log: rearrange some code, no functionality change. Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=48101&r1=48100&r2=48101&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Sun Mar 9 01:58:04 2008 @@ -1404,67 +1404,68 @@ unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *DestRC, const TargetRegisterClass *SrcRC) const { - if (DestRC != SrcRC) { - // Moving EFLAGS to / from another register requires a push and a pop. - if (SrcRC == &X86::CCRRegClass) { - assert(SrcReg == X86::EFLAGS); - if (DestRC == &X86::GR64RegClass) { - BuildMI(MBB, MI, get(X86::PUSHFQ)); - BuildMI(MBB, MI, get(X86::POP64r), DestReg); - return; - } else if (DestRC == &X86::GR32RegClass) { - BuildMI(MBB, MI, get(X86::PUSHFD)); - BuildMI(MBB, MI, get(X86::POP32r), DestReg); - return; - } - } else if (DestRC == &X86::CCRRegClass) { - assert(DestReg == X86::EFLAGS); - if (SrcRC == &X86::GR64RegClass) { - BuildMI(MBB, MI, get(X86::PUSH64r)).addReg(SrcReg); - BuildMI(MBB, MI, get(X86::POPFQ)); - return; - } else if (SrcRC == &X86::GR32RegClass) { - BuildMI(MBB, MI, get(X86::PUSH32r)).addReg(SrcReg); - BuildMI(MBB, MI, get(X86::POPFD)); - return; - } + if (DestRC == SrcRC) { + unsigned Opc; + if (DestRC == &X86::GR64RegClass) { + Opc = X86::MOV64rr; + } else if (DestRC == &X86::GR32RegClass) { + Opc = X86::MOV32rr; + } else if (DestRC == &X86::GR16RegClass) { + Opc = X86::MOV16rr; + } else if (DestRC == &X86::GR8RegClass) { + Opc = X86::MOV8rr; + } else if (DestRC == &X86::GR32_RegClass) { + Opc = X86::MOV32_rr; + } else if (DestRC == &X86::GR16_RegClass) { + Opc = X86::MOV16_rr; + } else if (DestRC == &X86::RFP32RegClass) { + Opc = X86::MOV_Fp3232; + } else if (DestRC == &X86::RFP64RegClass || DestRC == &X86::RSTRegClass) { + Opc = X86::MOV_Fp6464; + } else if (DestRC == &X86::RFP80RegClass) { + Opc = X86::MOV_Fp8080; + } else if (DestRC == &X86::FR32RegClass) { + Opc = X86::FsMOVAPSrr; + } else if (DestRC == &X86::FR64RegClass) { + Opc = X86::FsMOVAPDrr; + } else if (DestRC == &X86::VR128RegClass) { + Opc = X86::MOVAPSrr; + } else if (DestRC == &X86::VR64RegClass) { + Opc = X86::MMX_MOVQ64rr; + } else { + assert(0 && "Unknown regclass"); + abort(); } - cerr << "Not yet supported!"; - abort(); + BuildMI(MBB, MI, get(Opc), DestReg).addReg(SrcReg); + return; } - - unsigned Opc; - if (DestRC == &X86::GR64RegClass) { - Opc = X86::MOV64rr; - } else if (DestRC == &X86::GR32RegClass) { - Opc = X86::MOV32rr; - } else if (DestRC == &X86::GR16RegClass) { - Opc = X86::MOV16rr; - } else if (DestRC == &X86::GR8RegClass) { - Opc = X86::MOV8rr; - } else if (DestRC == &X86::GR32_RegClass) { - Opc = X86::MOV32_rr; - } else if (DestRC == &X86::GR16_RegClass) { - Opc = X86::MOV16_rr; - } else if (DestRC == &X86::RFP32RegClass) { - Opc = X86::MOV_Fp3232; - } else if (DestRC == &X86::RFP64RegClass || DestRC == &X86::RSTRegClass) { - Opc = X86::MOV_Fp6464; - } else if (DestRC == &X86::RFP80RegClass) { - Opc = X86::MOV_Fp8080; - } else if (DestRC == &X86::FR32RegClass) { - Opc = X86::FsMOVAPSrr; - } else if (DestRC == &X86::FR64RegClass) { - Opc = X86::FsMOVAPDrr; - } else if (DestRC == &X86::VR128RegClass) { - Opc = X86::MOVAPSrr; - } else if (DestRC == &X86::VR64RegClass) { - Opc = X86::MMX_MOVQ64rr; - } else { - assert(0 && "Unknown regclass"); - abort(); + + // Moving EFLAGS to / from another register requires a push and a pop. + if (SrcRC == &X86::CCRRegClass) { + assert(SrcReg == X86::EFLAGS); + if (DestRC == &X86::GR64RegClass) { + BuildMI(MBB, MI, get(X86::PUSHFQ)); + BuildMI(MBB, MI, get(X86::POP64r), DestReg); + return; + } else if (DestRC == &X86::GR32RegClass) { + BuildMI(MBB, MI, get(X86::PUSHFD)); + BuildMI(MBB, MI, get(X86::POP32r), DestReg); + return; + } + } else if (DestRC == &X86::CCRRegClass) { + assert(DestReg == X86::EFLAGS); + if (SrcRC == &X86::GR64RegClass) { + BuildMI(MBB, MI, get(X86::PUSH64r)).addReg(SrcReg); + BuildMI(MBB, MI, get(X86::POPFQ)); + return; + } else if (SrcRC == &X86::GR32RegClass) { + BuildMI(MBB, MI, get(X86::PUSH32r)).addReg(SrcReg); + BuildMI(MBB, MI, get(X86::POPFD)); + return; + } } - BuildMI(MBB, MI, get(Opc), DestReg).addReg(SrcReg); + cerr << "Not yet supported!"; + abort(); } static unsigned getStoreRegOpcode(const TargetRegisterClass *RC, From tonic at nondot.org Sun Mar 9 03:16:40 2008 From: tonic at nondot.org (Tanya Lattner) Date: Sun, 09 Mar 2008 08:16:40 -0000 Subject: [llvm-commits] [llvm] r48103 - in /llvm/trunk/test: CodeGen/Alpha/ Linker/ Transforms/IndVarsSimplify/ Transforms/InstCombine/ Message-ID: <200803090816.m298Ggdv005220@zion.cs.uiuc.edu> Author: tbrethou Date: Sun Mar 9 03:16:40 2008 New Revision: 48103 URL: http://llvm.org/viewvc/llvm-project?rev=48103&view=rev Log: Remove llvm-upgrade and update tests. Modified: llvm/trunk/test/CodeGen/Alpha/jmp_table.ll llvm/trunk/test/Linker/2002-07-17-GlobalFail.ll llvm/trunk/test/Linker/2002-07-17-LinkTest2.ll llvm/trunk/test/Linker/2002-08-20-ConstantExpr.ll llvm/trunk/test/Linker/2003-04-26-NullPtrLinkProblem.ll llvm/trunk/test/Linker/2003-05-15-TypeProblem.ll llvm/trunk/test/Linker/2003-06-02-TypeResolveProblem.ll llvm/trunk/test/Linker/2003-06-02-TypeResolveProblem2.ll llvm/trunk/test/Linker/2003-08-20-OpaqueTypeResolve.ll llvm/trunk/test/Linker/2003-08-23-GlobalVarLinking.ll llvm/trunk/test/Linker/2003-08-23-RecursiveOpaqueTypeResolve.ll llvm/trunk/test/Linker/2003-08-28-TypeResolvesGlobal.ll llvm/trunk/test/Linker/2003-08-28-TypeResolvesGlobal2.ll llvm/trunk/test/Linker/2003-08-28-TypeResolvesGlobal3.ll llvm/trunk/test/Linker/2003-10-21-ConflictingTypesTolerance.ll llvm/trunk/test/Linker/2003-10-27-LinkOncePromote.ll llvm/trunk/test/Transforms/IndVarsSimplify/variable-stride-ivs.ll llvm/trunk/test/Transforms/InstCombine/2002-05-14-TouchDeletedInst.ll llvm/trunk/test/Transforms/InstCombine/2003-07-21-ExternalConstant.ll llvm/trunk/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll llvm/trunk/test/Transforms/InstCombine/2006-04-01-InfLoop.ll llvm/trunk/test/Transforms/InstCombine/2006-05-04-DemandedBitCrash.ll llvm/trunk/test/Transforms/InstCombine/2006-05-06-Infloop.ll llvm/trunk/test/Transforms/InstCombine/2006-09-11-EmptyStructCrash.ll llvm/trunk/test/Transforms/InstCombine/2006-12-08-Phi-ICmp-Op-Fold.ll llvm/trunk/test/Transforms/InstCombine/2006-12-08-Select-ICmp.ll llvm/trunk/test/Transforms/InstCombine/2006-12-10-ICmp-GEP-GEP.ll llvm/trunk/test/Transforms/InstCombine/2006-12-15-Range-Test.ll llvm/trunk/test/Transforms/InstCombine/2006-12-23-Select-Cmp-Cmp.ll llvm/trunk/test/Transforms/InstCombine/CPP_min_max.llx llvm/trunk/test/Transforms/InstCombine/GEPIdxCanon.ll llvm/trunk/test/Transforms/InstCombine/IntPtrCast.ll llvm/trunk/test/Transforms/InstCombine/JavaCompare.ll llvm/trunk/test/Transforms/InstCombine/add.ll llvm/trunk/test/Transforms/InstCombine/alloca.ll llvm/trunk/test/Transforms/InstCombine/and-compare.ll llvm/trunk/test/Transforms/InstCombine/and-or-and.ll llvm/trunk/test/Transforms/InstCombine/and.ll llvm/trunk/test/Transforms/InstCombine/bit-tracking.ll llvm/trunk/test/Transforms/InstCombine/bittest.ll llvm/trunk/test/Transforms/InstCombine/bswap-fold.ll llvm/trunk/test/Transforms/InstCombine/bswap.ll llvm/trunk/test/Transforms/InstCombine/call-cast-target.ll llvm/trunk/test/Transforms/InstCombine/call-intrinsics.ll llvm/trunk/test/Transforms/InstCombine/canonicalize_branch.ll llvm/trunk/test/Transforms/InstCombine/cast-and-cast.ll llvm/trunk/test/Transforms/InstCombine/cast-cast-to-and.ll llvm/trunk/test/Transforms/InstCombine/cast-load-gep.ll llvm/trunk/test/Transforms/InstCombine/cast-malloc.ll llvm/trunk/test/Transforms/InstCombine/cast-propagate.ll llvm/trunk/test/Transforms/InstCombine/cast-set.ll llvm/trunk/test/Transforms/InstCombine/cast_ptr.ll llvm/trunk/test/Transforms/InstCombine/fpcast.ll llvm/trunk/test/Transforms/InstCombine/getelementptr-setcc.ll llvm/trunk/test/Transforms/InstCombine/getelementptr_cast.ll llvm/trunk/test/Transforms/InstCombine/getelementptr_const.ll llvm/trunk/test/Transforms/InstCombine/getelementptr_index.ll llvm/trunk/test/Transforms/InstCombine/hoist_instr.ll llvm/trunk/test/Transforms/InstCombine/set.ll llvm/trunk/test/Transforms/InstCombine/setcc-cast-cast.ll llvm/trunk/test/Transforms/InstCombine/setcc-strength-reduce.ll llvm/trunk/test/Transforms/InstCombine/shift.ll llvm/trunk/test/Transforms/InstCombine/signext.ll llvm/trunk/test/Transforms/InstCombine/vec_insert_to_shuffle.ll llvm/trunk/test/Transforms/InstCombine/xor.ll Modified: llvm/trunk/test/CodeGen/Alpha/jmp_table.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Alpha/jmp_table.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Alpha/jmp_table.ll (original) +++ llvm/trunk/test/CodeGen/Alpha/jmp_table.ll Sun Mar 9 03:16:40 2008 @@ -4,6 +4,7 @@ ; RUN: llvm-as < %s | llc -march=alpha | grep gprel32 ; RUN: llvm-as < %s | llc -march=alpha | grep ldl ; RUN: llvm-as < %s | llc -march=alpha | grep rodata +; END. target datalayout = "e-p:64:64" target triple = "alphaev67-unknown-linux-gnu" Modified: llvm/trunk/test/Linker/2002-07-17-GlobalFail.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2002-07-17-GlobalFail.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Linker/2002-07-17-GlobalFail.ll (original) +++ llvm/trunk/test/Linker/2002-07-17-GlobalFail.ll Sun Mar 9 03:16:40 2008 @@ -1,8 +1,8 @@ -; RUN: llvm-upgrade < %s | llvm-as > %t.bc +; RUN: llvm-as < %s > %t.bc ; RUN: echo | llvm-as > %t.tmp.bc ; RUN: llvm-link %t.tmp.bc %t.bc -%X = constant int 5 -%Y = internal global [2 x int*] [ int* %X, int * %X] + at X = constant i32 5 ; [#uses=2] + at Y = internal global [2 x i32*] [ i32* @X, i32* @X ] ; <[2 x i32*]*> [#uses=0] Modified: llvm/trunk/test/Linker/2002-07-17-LinkTest2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2002-07-17-LinkTest2.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Linker/2002-07-17-LinkTest2.ll (original) +++ llvm/trunk/test/Linker/2002-07-17-LinkTest2.ll Sun Mar 9 03:16:40 2008 @@ -1,9 +1,10 @@ ; This fails linking when it is linked with an empty file as the first object file ; RUN: llvm-as > %t1.bc < /dev/null -; RUN: llvm-upgrade < %s | llvm-as > %t2.bc +; RUN: llvm-as < %s > %t2.bc ; RUN: llvm-link %t1.bc %t2.bc -%work = global int (int, int)* %zip + at work = global i32 (i32, i32)* @zip ; [#uses=0] + +declare i32 @zip(i32, i32) -declare int %zip(int, int) Modified: llvm/trunk/test/Linker/2002-08-20-ConstantExpr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2002-08-20-ConstantExpr.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Linker/2002-08-20-ConstantExpr.ll (original) +++ llvm/trunk/test/Linker/2002-08-20-ConstantExpr.ll Sun Mar 9 03:16:40 2008 @@ -1,9 +1,9 @@ ; This fails linking when it is linked with an empty file as the first object file ; RUN: llvm-as > %t.LinkTest.bc < /dev/null -; RUN: llvm-upgrade < %s | llvm-as > %t.bc +; RUN: llvm-as < %s > %t.bc ; RUN: llvm-link %t.LinkTest.bc %t.bc -%work = global int 4 -%test = global int* getelementptr( int* %work, long 1) + at work = global i32 4 ; [#uses=1] + at test = global i32* getelementptr (i32* @work, i64 1) ; [#uses=0] Modified: llvm/trunk/test/Linker/2003-04-26-NullPtrLinkProblem.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2003-04-26-NullPtrLinkProblem.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Linker/2003-04-26-NullPtrLinkProblem.ll (original) +++ llvm/trunk/test/Linker/2003-04-26-NullPtrLinkProblem.ll Sun Mar 9 03:16:40 2008 @@ -1,19 +1,17 @@ ; This one fails because the LLVM runtime is allowing two null pointers of ; the same type to be created! -; RUN: echo {%T = type int} | llvm-upgrade | llvm-as > %t.2.bc -; RUN: llvm-upgrade < %s | llvm-as -f > %t.1.bc +; RUN: echo {%T = type i32} | llvm-as > %t.2.bc +; RUN: llvm-as < %s -f > %t.1.bc ; RUN: llvm-link %t.1.bc %t.2.bc %T = type opaque -declare %T* %create() +declare %T* @create() -implementation - -void %test() { - %X = call %T* %create() - %v = seteq %T* %X, null +define void @test() { + %X = call %T* @create( ) ; <%T*> [#uses=1] + %v = icmp eq %T* %X, null ; [#uses=0] ret void } Modified: llvm/trunk/test/Linker/2003-05-15-TypeProblem.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2003-05-15-TypeProblem.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Linker/2003-05-15-TypeProblem.ll (original) +++ llvm/trunk/test/Linker/2003-05-15-TypeProblem.ll Sun Mar 9 03:16:40 2008 @@ -2,9 +2,9 @@ ; the same type to be created! ; RUN: echo {%S = type \{ %T*\} %T = type opaque} | llvm-as > %t.2.bc -; RUN: llvm-upgrade < %s | llvm-as > %t.1.bc +; RUN: llvm-as < %s > %t.1.bc ; RUN: llvm-link %t.1.bc %t.2.bc -%S = type { %T* } -%T = type int +%S = type { i32* } +%T = type i32 Modified: llvm/trunk/test/Linker/2003-06-02-TypeResolveProblem.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2003-06-02-TypeResolveProblem.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Linker/2003-06-02-TypeResolveProblem.ll (original) +++ llvm/trunk/test/Linker/2003-06-02-TypeResolveProblem.ll Sun Mar 9 03:16:40 2008 @@ -1,7 +1,7 @@ -; RUN: echo {%T = type opaque} | llvm-upgrade | llvm-as > %t.2.bc -; RUN: llvm-upgrade < %s | llvm-as > %t.1.bc +; RUN: echo {%T = type opaque} | llvm-as > %t.2.bc +; RUN: llvm-as < %s > %t.1.bc ; RUN: llvm-link %t.1.bc %t.2.bc %T = type opaque -%a = constant { %T* } { %T* null } + at a = constant { %T* } zeroinitializer ; <{ %T* }*> [#uses=0] Modified: llvm/trunk/test/Linker/2003-06-02-TypeResolveProblem2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2003-06-02-TypeResolveProblem2.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Linker/2003-06-02-TypeResolveProblem2.ll (original) +++ llvm/trunk/test/Linker/2003-06-02-TypeResolveProblem2.ll Sun Mar 9 03:16:40 2008 @@ -1,8 +1,7 @@ -; RUN: echo {%T = type int} | llvm-upgrade | llvm-as > %t.1.bc -; RUN: llvm-upgrade < %s | llvm-as > %t.2.bc +; RUN: echo {%T = type i32} | llvm-as > %t.1.bc +; RUN: llvm-as < %s > %t.2.bc ; RUN: llvm-link %t.1.bc %t.2.bc %T = type opaque - -%X = constant {%T*} {%T* null } + at X = constant { %T* } zeroinitializer ; <{ %T* }*> [#uses=0] Modified: llvm/trunk/test/Linker/2003-08-20-OpaqueTypeResolve.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2003-08-20-OpaqueTypeResolve.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Linker/2003-08-20-OpaqueTypeResolve.ll (original) +++ llvm/trunk/test/Linker/2003-08-20-OpaqueTypeResolve.ll Sun Mar 9 03:16:40 2008 @@ -1,7 +1,8 @@ -; RUN: llvm-upgrade < %s | llvm-as > %t.out1.bc -; RUN: echo {%S = type \{ int, int* \} } | llvm-upgrade | llvm-as > %t.out2.bc +; RUN: llvm-as < %s > %t.out1.bc +; RUN: echo {%S = type \{ i32, i32* \} } | llvm-as > %t.out2.bc ; RUN: llvm-link %t.out1.bc %t.out2.bc +%S = type { i32, %T* } %T = type opaque -%S = type { int, %T* } + ;%X = global { int, %T* } { int 5, %T* null } Modified: llvm/trunk/test/Linker/2003-08-23-GlobalVarLinking.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2003-08-23-GlobalVarLinking.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Linker/2003-08-23-GlobalVarLinking.ll (original) +++ llvm/trunk/test/Linker/2003-08-23-GlobalVarLinking.ll Sun Mar 9 03:16:40 2008 @@ -1,10 +1,10 @@ -; RUN: llvm-upgrade < %s | llvm-as > %t.out1.bc -; RUN: echo {%S = external global \{ int, opaque* \} declare void %F(opaque*)}\ -; RUN: | llvm-upgrade | llvm-as > %t.out2.bc +; RUN: llvm-as < %s > %t.out1.bc +; RUN: echo {@S = external global \{ i32, opaque* \} declare void @F(opaque*)}\ +; RUN: | llvm-as > %t.out2.bc ; RUN: llvm-link %t.out1.bc %t.out2.bc | llvm-dis | not grep opaque ; After linking this testcase, there should be no opaque types left. The two ; S's should cause the opaque type to be resolved to 'int'. -%S = global { int, int* } { int 5, int* null } + at S = global { i32, i32* } { i32 5, i32* null } ; <{ i32, i32* }*> [#uses=0] -declare void %F(int*) +declare void @F(i32*) Modified: llvm/trunk/test/Linker/2003-08-23-RecursiveOpaqueTypeResolve.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2003-08-23-RecursiveOpaqueTypeResolve.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Linker/2003-08-23-RecursiveOpaqueTypeResolve.ll (original) +++ llvm/trunk/test/Linker/2003-08-23-RecursiveOpaqueTypeResolve.ll Sun Mar 9 03:16:40 2008 @@ -1,8 +1,9 @@ ; It's a bad idea to go recursively traipsing through types without a safety ; net. -; RUN: llvm-upgrade < %s | llvm-as > %t.out1.bc -; RUN: echo "%S = type { %S*, int* }" | llvm-upgrade | llvm-as > %t.out2.bc +; RUN: llvm-as < %s > %t.out1.bc +; RUN: echo "%S = type { %S*, i32* }" | llvm-as > %t.out2.bc ; RUN: llvm-link %t.out1.bc %t.out2.bc %S = type { %S*, opaque* } + Modified: llvm/trunk/test/Linker/2003-08-28-TypeResolvesGlobal.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2003-08-28-TypeResolvesGlobal.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Linker/2003-08-28-TypeResolvesGlobal.ll (original) +++ llvm/trunk/test/Linker/2003-08-28-TypeResolvesGlobal.ll Sun Mar 9 03:16:40 2008 @@ -1,12 +1,12 @@ -; RUN: llvm-upgrade < %s | llvm-as > %t.out1.bc -; RUN: echo "%S = type int" | llvm-upgrade | llvm-as > %t.out2.bc +; RUN: llvm-as < %s > %t.out1.bc +; RUN: echo "%S = type i32" | llvm-as > %t.out2.bc ; RUN: llvm-link %t.out2.bc %t.out1.bc %S = type opaque -void %foo(int* %V) { - ret void +define void @foo(i32* %V) { + ret void } -declare void %foo(%S*) +declare void @foo.upgrd.1(%S*) Modified: llvm/trunk/test/Linker/2003-08-28-TypeResolvesGlobal2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2003-08-28-TypeResolvesGlobal2.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Linker/2003-08-28-TypeResolvesGlobal2.ll (original) +++ llvm/trunk/test/Linker/2003-08-28-TypeResolvesGlobal2.ll Sun Mar 9 03:16:40 2008 @@ -1,17 +1,18 @@ -; RUN: llvm-upgrade < %s | llvm-as > %t.out1.bc -; RUN: echo "%S = type int" | llvm-upgrade | llvm-as > %t.out2.bc +; RUN: llvm-as < %s > %t.out1.bc +; RUN: echo "%S = type i32" | llvm-as > %t.out2.bc ; RUN: llvm-link %t.out2.bc %t.out1.bc %S = type opaque -void %foo(int* %V) { - ret void +define void @foo(i32* %V) { + ret void } -declare void %foo(%S*) +declare void @foo.upgrd.1(%S*) -void %other() { - call void %foo(%S* null) ; Add a use of the unresolved proto - call void %foo(int* null) ; Add a use of the resolved function +define void @other() { + call void @foo.upgrd.1( %S* null ) + call void @foo( i32* null ) ret void } + Modified: llvm/trunk/test/Linker/2003-08-28-TypeResolvesGlobal3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2003-08-28-TypeResolvesGlobal3.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Linker/2003-08-28-TypeResolvesGlobal3.ll (original) +++ llvm/trunk/test/Linker/2003-08-28-TypeResolvesGlobal3.ll Sun Mar 9 03:16:40 2008 @@ -1,15 +1,15 @@ -; RUN: llvm-upgrade < %s | llvm-as > %t.out1.bc -; RUN: echo "%S = type int" | llvm-upgrade | llvm-as > %t.out2.bc +; RUN: llvm-as < %s > %t.out1.bc +; RUN: echo "%S = type i32" | llvm-as > %t.out2.bc ; RUN: llvm-link %t.out2.bc %t.out1.bc %S = type opaque ; GLobal using the resolved function prototype -global void(%S*)* %foo +global void (%S*)* @foo ; :0 [#uses=0] -void %foo(int* %V) { - ret void +define void @foo.upgrd.1(i32* %V) { + ret void } -declare void %foo(%S*) +declare void @foo(%S*) Modified: llvm/trunk/test/Linker/2003-10-21-ConflictingTypesTolerance.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2003-10-21-ConflictingTypesTolerance.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Linker/2003-10-21-ConflictingTypesTolerance.ll (original) +++ llvm/trunk/test/Linker/2003-10-21-ConflictingTypesTolerance.ll Sun Mar 9 03:16:40 2008 @@ -1,7 +1,7 @@ -; RUN: llvm-upgrade < %s | llvm-as > %t.out1.bc +; RUN: llvm-as < %s > %t.out1.bc ; RUN: echo { %S = type \[8 x i32\] external global %S } | llvm-as > %t.out2.bc ; RUN: llvm-link %t.out1.bc %t.out2.bc | llvm-dis | grep %S | grep \{ -%S = type { int } +%S = type { i32 } Modified: llvm/trunk/test/Linker/2003-10-27-LinkOncePromote.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2003-10-27-LinkOncePromote.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Linker/2003-10-27-LinkOncePromote.ll (original) +++ llvm/trunk/test/Linker/2003-10-27-LinkOncePromote.ll Sun Mar 9 03:16:40 2008 @@ -1,8 +1,8 @@ ; The linker should merge link-once globals into strong external globals, ; just like it does for weak symbols! -; RUN: echo "%X = global int 7" | llvm-upgrade | llvm-as > %t.2.bc -; RUN: llvm-upgrade < %s | llvm-as > %t.1.bc +; RUN: echo "@X = global i32 7" | llvm-as > %t.2.bc +; RUN: llvm-as < %s > %t.1.bc ; RUN: llvm-link %t.1.bc %t.2.bc -%X = linkonce global int 7 + at X = linkonce global i32 7 Modified: llvm/trunk/test/Transforms/IndVarsSimplify/variable-stride-ivs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarsSimplify/variable-stride-ivs.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/IndVarsSimplify/variable-stride-ivs.ll (original) +++ llvm/trunk/test/Transforms/IndVarsSimplify/variable-stride-ivs.ll Sun Mar 9 03:16:40 2008 @@ -3,6 +3,7 @@ ; Test that -indvars can reduce variable stride IVs. If it can reduce variable ; stride iv's, it will make %iv. and %m.0.0 isomorphic to each other without ; cycles, allowing the tmp.21 subtraction to be eliminated. +; END. define void @vnum_test8(i32* %data) { entry: Modified: llvm/trunk/test/Transforms/InstCombine/2002-05-14-TouchDeletedInst.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2002-05-14-TouchDeletedInst.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2002-05-14-TouchDeletedInst.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2002-05-14-TouchDeletedInst.ll Sun Mar 9 03:16:40 2008 @@ -6,6 +6,8 @@ ; ; RUN: llvm-as < %s | opt -instcombine ; +; END. + @.LC0 = internal global [21 x i8] c"hbMakeCodeLengths(1)\00" ; <[21 x i8]*> [#uses=1] @.LC1 = internal global [21 x i8] c"hbMakeCodeLengths(2)\00" ; <[21 x i8]*> [#uses=1] Modified: llvm/trunk/test/Transforms/InstCombine/2003-07-21-ExternalConstant.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2003-07-21-ExternalConstant.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2003-07-21-ExternalConstant.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2003-07-21-ExternalConstant.ll Sun Mar 9 03:16:40 2008 @@ -11,7 +11,7 @@ ; ; Extra code: ; RUN: llvm-as < %s | opt -instcombine -; +; END. target datalayout = "e-p:32:32" @silly = external constant i32 ; [#uses=1] Modified: llvm/trunk/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll Sun Mar 9 03:16:40 2008 @@ -11,7 +11,7 @@ ; ; RUN: llvm-as < %s -o - | opt -instcombine | llvm-dis | \ ; RUN: notcast .*int - +; END. define i1 @lt_signed_to_large_unsigned(i8 %SB) { %Y = sext i8 %SB to i32 ; [#uses=1] %C = icmp ult i32 %Y, 1024 ; [#uses=1] Modified: llvm/trunk/test/Transforms/InstCombine/2006-04-01-InfLoop.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2006-04-01-InfLoop.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2006-04-01-InfLoop.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2006-04-01-InfLoop.ll Sun Mar 9 03:16:40 2008 @@ -1,4 +1,5 @@ ; RUN: llvm-as < %s | opt -instcombine -disable-output +; END. %struct.DecRefPicMarking_s = type { i32, i32, i32, i32, i32, %struct.DecRefPicMarking_s* } %struct.datapartition = type { %typedef.Bitstream*, %typedef.DecodingEnvironment, i32 (%struct.syntaxelement*, %struct.img_par*, %struct.inp_par*, %struct.datapartition*)* } %struct.img_par = type { i32, i32, i32, i32, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [16 x [16 x i16]], [6 x [32 x i32]], [16 x [16 x i32]], [4 x [12 x [4 x [4 x i32]]]], [16 x i32], i32**, i32*, i32***, i32**, i32, i32, i32, i32, %typedef.Slice*, %struct.macroblock*, i32, i32, i32, i32, i32, i32, i32**, %struct.DecRefPicMarking_s*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32***, i32***, i32****, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.timeb, %struct.timeb, i32, i32, i32, i32, i32, i32, i32, i32 } Modified: llvm/trunk/test/Transforms/InstCombine/2006-05-04-DemandedBitCrash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2006-05-04-DemandedBitCrash.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2006-05-04-DemandedBitCrash.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2006-05-04-DemandedBitCrash.ll Sun Mar 9 03:16:40 2008 @@ -1,4 +1,5 @@ ; RUN: llvm-as < %s | opt -instcombine -disable-output +; END. define void @test() { bb38.i: Modified: llvm/trunk/test/Transforms/InstCombine/2006-05-06-Infloop.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2006-05-06-Infloop.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2006-05-06-Infloop.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2006-05-06-Infloop.ll Sun Mar 9 03:16:40 2008 @@ -1,4 +1,5 @@ ; RUN: llvm-as < %s | opt -instcombine -disable-output +; END. %struct.gs_matrix = type { float, i32, float, i32, float, i32, float, i32, float, i32, float, i32 } %struct.gx_bitmap = type { i8*, i32, i32, i32 } %struct.gx_device = type { i32, %struct.gx_device_procs*, i8*, i32, i32, float, float, i32, i16, i32, i32 } Modified: llvm/trunk/test/Transforms/InstCombine/2006-09-11-EmptyStructCrash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2006-09-11-EmptyStructCrash.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2006-09-11-EmptyStructCrash.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2006-09-11-EmptyStructCrash.ll Sun Mar 9 03:16:40 2008 @@ -1,5 +1,6 @@ ; PR905 ; RUN: llvm-as < %s | opt -instcombine -disable-output +; END. %RPYTHON_EXCEPTION = type { %RPYTHON_EXCEPTION_VTABLE* } %RPYTHON_EXCEPTION_VTABLE = type { %RPYTHON_EXCEPTION_VTABLE*, i32, i32, %RPyOpaque_RuntimeTypeInfo*, %arraytype_Char*, %functiontype_12* } Modified: llvm/trunk/test/Transforms/InstCombine/2006-12-08-Phi-ICmp-Op-Fold.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2006-12-08-Phi-ICmp-Op-Fold.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2006-12-08-Phi-ICmp-Op-Fold.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2006-12-08-Phi-ICmp-Op-Fold.ll Sun Mar 9 03:16:40 2008 @@ -1,5 +1,6 @@ ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: grep {icmp sgt} +; END. target datalayout = "e-p:32:32" target triple = "i686-pc-linux-gnu" %struct.point = type { i32, i32 } Modified: llvm/trunk/test/Transforms/InstCombine/2006-12-08-Select-ICmp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2006-12-08-Select-ICmp.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2006-12-08-Select-ICmp.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2006-12-08-Select-ICmp.ll Sun Mar 9 03:16:40 2008 @@ -1,4 +1,5 @@ ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep select +; END. target datalayout = "e-p:32:32" target triple = "i686-pc-linux-gnu" Modified: llvm/trunk/test/Transforms/InstCombine/2006-12-10-ICmp-GEP-GEP.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2006-12-10-ICmp-GEP-GEP.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2006-12-10-ICmp-GEP-GEP.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2006-12-10-ICmp-GEP-GEP.ll Sun Mar 9 03:16:40 2008 @@ -1,5 +1,6 @@ ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: grep -v {icmp ult i32} +; END. target datalayout = "e-p:32:32" target triple = "i686-pc-linux-gnu" Modified: llvm/trunk/test/Transforms/InstCombine/2006-12-15-Range-Test.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2006-12-15-Range-Test.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2006-12-15-Range-Test.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2006-12-15-Range-Test.ll Sun Mar 9 03:16:40 2008 @@ -2,6 +2,7 @@ ; RUN: grep icmp | count 1 ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: grep {icmp ugt} | count 1 +; END. target datalayout = "e-p:32:32" target triple = "i686-pc-linux-gnu" Modified: llvm/trunk/test/Transforms/InstCombine/2006-12-23-Select-Cmp-Cmp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2006-12-23-Select-Cmp-Cmp.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2006-12-23-Select-Cmp-Cmp.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/2006-12-23-Select-Cmp-Cmp.ll Sun Mar 9 03:16:40 2008 @@ -1,6 +1,7 @@ ; For PR1065. This causes an assertion in instcombine if a select with two cmp ; operands is encountered. ; RUN: llvm-as < %s | opt -instcombine -disable-output +; END. target datalayout = "e-p:32:32" target triple = "i686-pc-linux-gnu" Modified: llvm/trunk/test/Transforms/InstCombine/CPP_min_max.llx URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/CPP_min_max.llx?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/CPP_min_max.llx (original) +++ llvm/trunk/test/Transforms/InstCombine/CPP_min_max.llx Sun Mar 9 03:16:40 2008 @@ -1,6 +1,5 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: grep select | not grep {i32\\*} -; END. ; This testcase corresponds to PR362, which notices that this horrible code ; is generated by the C++ front-end and LLVM optimizers, which has lots of @@ -9,28 +8,27 @@ ; Instcombine should propagate the load through the select instructions to ; allow elimination of the extra stuff by the mem2reg pass. -implementation ; Functions: - -void %_Z5test1RiS_(int* %x, int* %y) { +define void @_Z5test1RiS_(i32* %x, i32* %y) { entry: - %tmp.1.i = load int* %y ; [#uses=1] - %tmp.3.i = load int* %x ; [#uses=1] - %tmp.4.i = setlt int %tmp.1.i, %tmp.3.i ; [#uses=1] - %retval.i = select bool %tmp.4.i, int* %y, int* %x ; [#uses=1] - %tmp.4 = load int* %retval.i ; [#uses=1] - store int %tmp.4, int* %x - ret void + %tmp.1.i = load i32* %y ; [#uses=1] + %tmp.3.i = load i32* %x ; [#uses=1] + %tmp.4.i = icmp slt i32 %tmp.1.i, %tmp.3.i ; [#uses=1] + %retval.i = select i1 %tmp.4.i, i32* %y, i32* %x ; [#uses=1] + %tmp.4 = load i32* %retval.i ; [#uses=1] + store i32 %tmp.4, i32* %x + ret void } -void %_Z5test2RiS_(int* %x, int* %y) { +define void @_Z5test2RiS_(i32* %x, i32* %y) { entry: - %tmp.0 = alloca int ; [#uses=2] - %tmp.2 = load int* %x ; [#uses=2] - store int %tmp.2, int* %tmp.0 - %tmp.3.i = load int* %y ; [#uses=1] - %tmp.4.i = setlt int %tmp.2, %tmp.3.i ; [#uses=1] - %retval.i = select bool %tmp.4.i, int* %y, int* %tmp.0 ; [#uses=1] - %tmp.6 = load int* %retval.i ; [#uses=1] - store int %tmp.6, int* %y - ret void + %tmp.0 = alloca i32 ; [#uses=2] + %tmp.2 = load i32* %x ; [#uses=2] + store i32 %tmp.2, i32* %tmp.0 + %tmp.3.i = load i32* %y ; [#uses=1] + %tmp.4.i = icmp slt i32 %tmp.2, %tmp.3.i ; [#uses=1] + %retval.i = select i1 %tmp.4.i, i32* %y, i32* %tmp.0 ; [#uses=1] + %tmp.6 = load i32* %retval.i ; [#uses=1] + store i32 %tmp.6, i32* %y + ret void } + Modified: llvm/trunk/test/Transforms/InstCombine/GEPIdxCanon.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/GEPIdxCanon.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/GEPIdxCanon.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/GEPIdxCanon.ll Sun Mar 9 03:16:40 2008 @@ -1,9 +1,10 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine -gcse -instcombine | \ +; RUN: llvm-as < %s | opt -instcombine -gcse -instcombine | \ ; RUN: llvm-dis | not grep getelementptr -bool %test(int* %A) { - %B = getelementptr int* %A, int 1 - %C = getelementptr int* %A, uint 1 - %V = seteq int* %B, %C - ret bool %V +define i1 @test(i32* %A) { + %B = getelementptr i32* %A, i32 1 ; [#uses=1] + %C = getelementptr i32* %A, i64 1 ; [#uses=1] + %V = icmp eq i32* %B, %C ; [#uses=1] + ret i1 %V } + Modified: llvm/trunk/test/Transforms/InstCombine/IntPtrCast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/IntPtrCast.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/IntPtrCast.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/IntPtrCast.ll Sun Mar 9 03:16:40 2008 @@ -1,9 +1,9 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | notcast -target endian = little -target pointersize = 32 +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | notcast +target datalayout = "e-p:32:32" -int *%test(int *%P) { - %V = cast int* %P to int - %P2 = cast int %V to int* - ret int* %P2 +define i32* @test(i32* %P) { + %V = ptrtoint i32* %P to i32 ; [#uses=1] + %P2 = inttoptr i32 %V to i32* ; [#uses=1] + ret i32* %P2 } + Modified: llvm/trunk/test/Transforms/InstCombine/JavaCompare.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/JavaCompare.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/JavaCompare.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/JavaCompare.ll Sun Mar 9 03:16:40 2008 @@ -1,15 +1,15 @@ ; This is the sequence of stuff that the Java front-end expands for a single ; <= comparison. Check to make sure we turn it into a <= (only) -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: grep -v {icmp sle} | not grep #uses -bool %le(int %A, int %B) { - %c1 = setgt int %A, %B; - %tmp = select bool %c1, int 1, int 0; - %c2 = setlt int %A, %B; - %result = select bool %c2, int -1, int %tmp; - %c3 = setle int %result, 0; - ret bool %c3; +define i1 @le(i32 %A, i32 %B) { + %c1 = icmp sgt i32 %A, %B ; [#uses=1] + %tmp = select i1 %c1, i32 1, i32 0 ; [#uses=1] + %c2 = icmp slt i32 %A, %B ; [#uses=1] + %result = select i1 %c2, i32 -1, i32 %tmp ; [#uses=1] + %c3 = icmp sle i32 %result, 0 ; [#uses=1] + ret i1 %c3 } Modified: llvm/trunk/test/Transforms/InstCombine/add.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/add.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/add.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/add.ll Sun Mar 9 03:16:40 2008 @@ -1,251 +1,270 @@ ; This test makes sure that add instructions are properly eliminated. -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: grep -v OK | not grep add -; END. -implementation - -int %test1(int %A) { - %B = add int %A, 0 - ret int %B +define i32 @test1(i32 %A) { + %B = add i32 %A, 0 ; [#uses=1] + ret i32 %B } -int %test2(int %A) { - %B = add int %A, 5 - %C = add int %B, -5 - ret int %C +define i32 @test2(i32 %A) { + %B = add i32 %A, 5 ; [#uses=1] + %C = add i32 %B, -5 ; [#uses=1] + ret i32 %C } -int %test3(int %A) { - %B = add int %A, 5 - %C = sub int %B, 5 ;; This should get converted to an add - ret int %C +define i32 @test3(i32 %A) { + %B = add i32 %A, 5 ; [#uses=1] + ;; This should get converted to an add + %C = sub i32 %B, 5 ; [#uses=1] + ret i32 %C } -int %test4(int %A, int %B) { - %C = sub int 0, %A - %D = add int %B, %C ; D = B + -A = B - A - ret int %D +define i32 @test4(i32 %A, i32 %B) { + %C = sub i32 0, %A ; [#uses=1] + ; D = B + -A = B - A + %D = add i32 %B, %C ; [#uses=1] + ret i32 %D } -int %test5(int %A, int %B) { - %C = sub int 0, %A - %D = add int %C, %B ; D = -A + B = B - A - ret int %D +define i32 @test5(i32 %A, i32 %B) { + %C = sub i32 0, %A ; [#uses=1] + ; D = -A + B = B - A + %D = add i32 %C, %B ; [#uses=1] + ret i32 %D } -int %test6(int %A) { - %B = mul int 7, %A - %C = add int %B, %A ; C = 7*A+A == 8*A == A << 3 - ret int %C +define i32 @test6(i32 %A) { + %B = mul i32 7, %A ; [#uses=1] + ; C = 7*A+A == 8*A == A << 3 + %C = add i32 %B, %A ; [#uses=1] + ret i32 %C } -int %test7(int %A) { - %B = mul int 7, %A - %C = add int %A, %B ; C = A+7*A == 8*A == A << 3 - ret int %C +define i32 @test7(i32 %A) { + %B = mul i32 7, %A ; [#uses=1] + ; C = A+7*A == 8*A == A << 3 + %C = add i32 %A, %B ; [#uses=1] + ret i32 %C } ; (A & C1)+(B & C2) -> (A & C1)|(B & C2) iff C1&C2 == 0 -int %test8(int %A, int %B) { - %A1 = and int %A, 7 - %B1 = and int %B, 128 - %C = add int %A1, %B1 - ret int %C +define i32 @test8(i32 %A, i32 %B) { + %A1 = and i32 %A, 7 ; [#uses=1] + %B1 = and i32 %B, 128 ; [#uses=1] + %C = add i32 %A1, %B1 ; [#uses=1] + ret i32 %C } -int %test9(int %A) { - %B = shl int %A, ubyte 4 - %C = add int %B, %B ; === shl int %A, 5 - ret int %C +define i32 @test9(i32 %A) { + %B = shl i32 %A, 4 ; [#uses=2] + ; === shl int %A, 5 + %C = add i32 %B, %B ; [#uses=1] + ret i32 %C } -bool %test10(ubyte %A, ubyte %b) { - %B = add ubyte %A, %b - %c = setne ubyte %B, 0 ; === A != -b - ret bool %c +define i1 @test10(i8 %A, i8 %b) { + %B = add i8 %A, %b ; [#uses=1] + ; === A != -b + %c = icmp ne i8 %B, 0 ; [#uses=1] + ret i1 %c } -bool %test11(ubyte %A) { - %B = add ubyte %A, 255 - %c = setne ubyte %B, 0 ; === A != 1 - ret bool %c +define i1 @test11(i8 %A) { + %B = add i8 %A, -1 ; [#uses=1] + ; === A != 1 + %c = icmp ne i8 %B, 0 ; [#uses=1] + ret i1 %c } -int %test12(int %A, int %B) { - %C_OK = add int %B, %A ; Should be transformed into shl A, 1 - br label %X -X: - %D = add int %C_OK, %A - ret int %D +define i32 @test12(i32 %A, i32 %B) { + ; Should be transformed into shl A, 1 + %C_OK = add i32 %B, %A ; [#uses=1] + br label %X + +X: ; preds = %0 + %D = add i32 %C_OK, %A ; [#uses=1] + ret i32 %D } -int %test13(int %A, int %B, int %C) { - %D_OK = add int %A, %B - %E_OK = add int %D_OK, %C - %F = add int %E_OK, %A ;; shl A, 1 - ret int %F +define i32 @test13(i32 %A, i32 %B, i32 %C) { + %D_OK = add i32 %A, %B ; [#uses=1] + %E_OK = add i32 %D_OK, %C ; [#uses=1] + ;; shl A, 1 + %F = add i32 %E_OK, %A ; [#uses=1] + ret i32 %F } -uint %test14(uint %offset, uint %difference) { - %tmp.2 = and uint %difference, 3 - %tmp.3_OK = add uint %tmp.2, %offset - %tmp.5.mask = and uint %difference, 4294967292 - %tmp.8 = add uint %tmp.3_OK, %tmp.5.mask ; == add %offset, %difference - ret uint %tmp.8 +define i32 @test14(i32 %offset, i32 %difference) { + %tmp.2 = and i32 %difference, 3 ; [#uses=1] + %tmp.3_OK = add i32 %tmp.2, %offset ; [#uses=1] + %tmp.5.mask = and i32 %difference, -4 ; [#uses=1] + ; == add %offset, %difference + %tmp.8 = add i32 %tmp.3_OK, %tmp.5.mask ; [#uses=1] + ret i32 %tmp.8 } -ubyte %test15(ubyte %A) { - %B = add ubyte %A, 192 ; Does not effect result - %C = and ubyte %B, 16 ; Only one bit set - ret ubyte %C +define i8 @test15(i8 %A) { + ; Does not effect result + %B = add i8 %A, -64 ; [#uses=1] + ; Only one bit set + %C = and i8 %B, 16 ; [#uses=1] + ret i8 %C } -ubyte %test16(ubyte %A) { - %B = add ubyte %A, 16 ; Turn this into a XOR - %C = and ubyte %B, 16 ; Only one bit set - ret ubyte %C +define i8 @test16(i8 %A) { + ; Turn this into a XOR + %B = add i8 %A, 16 ; [#uses=1] + ; Only one bit set + %C = and i8 %B, 16 ; [#uses=1] + ret i8 %C } -int %test17(int %A) { - %B = xor int %A, -1 - %C = add int %B, 1 ; == sub int 0, %A - ret int %C +define i32 @test17(i32 %A) { + %B = xor i32 %A, -1 ; [#uses=1] + ; == sub int 0, %A + %C = add i32 %B, 1 ; [#uses=1] + ret i32 %C } -ubyte %test18(ubyte %A) { - %B = xor ubyte %A, 255 - %C = add ubyte %B, 17 ; == sub ubyte 16, %A - ret ubyte %C +define i8 @test18(i8 %A) { + %B = xor i8 %A, -1 ; [#uses=1] + ; == sub ubyte 16, %A + %C = add i8 %B, 17 ; [#uses=1] + ret i8 %C } -int %test19(bool %C) { - %A = select bool %C, int 1000, int 10 - %V = add int %A, 123 - ret int %V +define i32 @test19(i1 %C) { + %A = select i1 %C, i32 1000, i32 10 ; [#uses=1] + %V = add i32 %A, 123 ; [#uses=1] + ret i32 %V } -int %test20(int %x) { - %tmp.2 = xor int %x, -2147483648 +define i32 @test20(i32 %x) { + %tmp.2 = xor i32 %x, -2147483648 ; [#uses=1] ;; Add of sign bit -> xor of sign bit. - %tmp.4 = add int %tmp.2, -2147483648 - ret int %tmp.4 + %tmp.4 = add i32 %tmp.2, -2147483648 ; [#uses=1] + ret i32 %tmp.4 +} + +define i1 @test21(i32 %x) { + %t = add i32 %x, 4 ; [#uses=1] + %y = icmp eq i32 %t, 123 ; [#uses=1] + ret i1 %y } -bool %test21(uint %x) { - %t = add uint %x, 4 - %y = seteq uint %t, 123 - ret bool %y -} - -int %test22(uint %V) { - %V2 = add uint %V, 10 - switch uint %V2, label %Default [ - uint 20, label %Lab1 - uint 30, label %Lab2 - ] -Default: - ret int 123 -Lab1: - ret int 12312 -Lab2: - ret int 1231231 +define i32 @test22(i32 %V) { + %V2 = add i32 %V, 10 ; [#uses=1] + switch i32 %V2, label %Default [ + i32 20, label %Lab1 + i32 30, label %Lab2 + ] + +Default: ; preds = %0 + ret i32 123 + +Lab1: ; preds = %0 + ret i32 12312 + +Lab2: ; preds = %0 + ret i32 1231231 } -int %test23(bool %C, int %a) { +define i32 @test23(i1 %C, i32 %a) { entry: - br bool %C, label %endif, label %else + br i1 %C, label %endif, label %else -else: +else: ; preds = %entry br label %endif -endif: - %b.0 = phi int [ 0, %entry ], [ 1, %else ] - %tmp.4 = add int %b.0, 1 - ret int %tmp.4 +endif: ; preds = %else, %entry + %b.0 = phi i32 [ 0, %entry ], [ 1, %else ] ; [#uses=1] + %tmp.4 = add i32 %b.0, 1 ; [#uses=1] + ret i32 %tmp.4 } -int %test24(int %A) { - %B = add int %A, 1 - %C = shl int %B, ubyte 1 - %D = sub int %C, 2 - ret int %D ;; A << 1 +define i32 @test24(i32 %A) { + %B = add i32 %A, 1 ; [#uses=1] + %C = shl i32 %B, 1 ; [#uses=1] + %D = sub i32 %C, 2 ; [#uses=1] + ret i32 %D } -long %test25(long %Y) { - %tmp.4 = shl long %Y, ubyte 2 - %tmp.12 = shl long %Y, ubyte 2 - %tmp.8 = add long %tmp.4, %tmp.12 ;; Y << 3 - ret long %tmp.8 +define i64 @test25(i64 %Y) { + %tmp.4 = shl i64 %Y, 2 ; [#uses=1] + %tmp.12 = shl i64 %Y, 2 ; [#uses=1] + %tmp.8 = add i64 %tmp.4, %tmp.12 ; [#uses=1] + ret i64 %tmp.8 } -int %test26(int %A, int %B) { - %C = add int %A, %B - %D = sub int %C, %B - ret int %D +define i32 @test26(i32 %A, i32 %B) { + %C = add i32 %A, %B ; [#uses=1] + %D = sub i32 %C, %B ; [#uses=1] + ret i32 %D } -int %test27(bool %C, int %X, int %Y) { - %A = add int %X, %Y - %B = add int %Y, 123 - %C = select bool %C, int %A, int %B ;; Fold add through select. - %D = sub int %C, %Y - ret int %D +define i32 @test27(i1 %C, i32 %X, i32 %Y) { + %A = add i32 %X, %Y ; [#uses=1] + %B = add i32 %Y, 123 ; [#uses=1] + ;; Fold add through select. + %C.upgrd.1 = select i1 %C, i32 %A, i32 %B ; [#uses=1] + %D = sub i32 %C.upgrd.1, %Y ; [#uses=1] + ret i32 %D } -int %test28(int %X) { - %Y = add int %X, 1234 - %Z = sub int 42, %Y - ret int %Z +define i32 @test28(i32 %X) { + %Y = add i32 %X, 1234 ; [#uses=1] + %Z = sub i32 42, %Y ; [#uses=1] + ret i32 %Z } -uint %test29(uint %X, uint %x) { - %tmp.2 = sub uint %X, %x - %tmp.2.mask = and uint %tmp.2, 63 ; [#uses=1] - %tmp.6 = add uint %tmp.2.mask, %x ; [#uses=1] - %tmp.7 = and uint %tmp.6, 63 ; [#uses=1] - %tmp.9 = and uint %tmp.2, 4294967232 ; [#uses=1] - %tmp.10 = or uint %tmp.7, %tmp.9 ; [#uses=1] - ret uint %tmp.10 +define i32 @test29(i32 %X, i32 %x) { + %tmp.2 = sub i32 %X, %x ; [#uses=2] + %tmp.2.mask = and i32 %tmp.2, 63 ; [#uses=1] + %tmp.6 = add i32 %tmp.2.mask, %x ; [#uses=1] + %tmp.7 = and i32 %tmp.6, 63 ; [#uses=1] + %tmp.9 = and i32 %tmp.2, -64 ; [#uses=1] + %tmp.10 = or i32 %tmp.7, %tmp.9 ; [#uses=1] + ret i32 %tmp.10 } -long %test30(long %x) { - %tmp.2 = xor long %x, -9223372036854775808 +define i64 @test30(i64 %x) { + %tmp.2 = xor i64 %x, -9223372036854775808 ; [#uses=1] ;; Add of sign bit -> xor of sign bit. - %tmp.4 = add long %tmp.2, -9223372036854775808 - ret long %tmp.4 + %tmp.4 = add i64 %tmp.2, -9223372036854775808 ; [#uses=1] + ret i64 %tmp.4 } -int %test31(int %A) { - %B = add int %A, 4 - %C = mul int %B, 5 - %D = sub int %C, 20 - ret int %D +define i32 @test31(i32 %A) { + %B = add i32 %A, 4 ; [#uses=1] + %C = mul i32 %B, 5 ; [#uses=1] + %D = sub i32 %C, 20 ; [#uses=1] + ret i32 %D } -int %test32(int %A) { - %B = add int %A, 4 - %C = shl int %B, ubyte 2 - %D = sub int %C, 16 - ret int %D +define i32 @test32(i32 %A) { + %B = add i32 %A, 4 ; [#uses=1] + %C = shl i32 %B, 2 ; [#uses=1] + %D = sub i32 %C, 16 ; [#uses=1] + ret i32 %D } -ubyte %test33(ubyte %A) { ;; OR A, 1 - %B = and ubyte %A, 254 - %C = add ubyte %B, 1 - ret ubyte %C +define i8 @test33(i8 %A) { + %B = and i8 %A, -2 ; [#uses=1] + %C = add i8 %B, 1 ; [#uses=1] + ret i8 %C } -ubyte %test34(ubyte %A) { - %B = add ubyte %A, 64 ;; dead - %C = and ubyte %B, 12 - ret ubyte %C +define i8 @test34(i8 %A) { + %B = add i8 %A, 64 ; [#uses=1] + %C = and i8 %B, 12 ; [#uses=1] + ret i8 %C } -int %test35(int %a) { ;; -> -1 - %tmpnot = xor int %a, -1 - %tmp2 = add int %tmpnot, %a - ret int %tmp2 +define i32 @test35(i32 %a) { + %tmpnot = xor i32 %a, -1 ; [#uses=1] + %tmp2 = add i32 %tmpnot, %a ; [#uses=1] + ret i32 %tmp2 } Modified: llvm/trunk/test/Transforms/InstCombine/alloca.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/alloca.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/alloca.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/alloca.ll Sun Mar 9 03:16:40 2008 @@ -1,29 +1,31 @@ ; Zero byte allocas should be deleted. -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: not grep alloca ; END. -declare void %use(...) -void %test() { - %X = alloca [0 x int] - call void(...)* %use([0 x int] *%X) - %Y = alloca int, uint 0 - call void(...)* %use(int* %Y) - %Z = alloca {} - call void(...)* %use({}* %Z) - ret void +declare void @use(...) + +define void @test() { + %X = alloca [0 x i32] ; <[0 x i32]*> [#uses=1] + call void (...)* @use( [0 x i32]* %X ) + %Y = alloca i32, i32 0 ; [#uses=1] + call void (...)* @use( i32* %Y ) + %Z = alloca { } ; <{ }*> [#uses=1] + call void (...)* @use( { }* %Z ) + ret void } -void %test2() { - %A = alloca int ;; dead. - store int 123, int* %A - ret void +define void @test2() { + %A = alloca i32 ; [#uses=1] + store i32 123, i32* %A + ret void } -void %test3() { - %A = alloca {int} ;; dead. - %B = getelementptr {int}* %A, int 0, uint 0 - store int 123, int* %B - ret void +define void @test3() { + %A = alloca { i32 } ; <{ i32 }*> [#uses=1] + %B = getelementptr { i32 }* %A, i32 0, i32 0 ; [#uses=1] + store i32 123, i32* %B + ret void } + Modified: llvm/trunk/test/Transforms/InstCombine/and-compare.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/and-compare.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/and-compare.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/and-compare.ll Sun Mar 9 03:16:40 2008 @@ -1,11 +1,11 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: grep and | count 1 ; Should be optimized to one and. -bool %test1(uint %a, uint %b) { - %tmp1 = and uint %a, 65280 - %tmp3 = and uint %b, 65280 - %tmp = setne uint %tmp1, %tmp3 - ret bool %tmp +define i1 @test1(i32 %a, i32 %b) { + %tmp1 = and i32 %a, 65280 ; [#uses=1] + %tmp3 = and i32 %b, 65280 ; [#uses=1] + %tmp = icmp ne i32 %tmp1, %tmp3 ; [#uses=1] + ret i1 %tmp } Modified: llvm/trunk/test/Transforms/InstCombine/and-or-and.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/and-or-and.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/and-or-and.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/and-or-and.ll Sun Mar 9 03:16:40 2008 @@ -9,48 +9,53 @@ ; ; Which corresponds to test1. -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: not grep {or } -; END. -int %test1(int %X, int %Y) { - %A = and int %X, 7 - %B = and int %Y, 8 - %C = or int %A, %B - %D = and int %C, 7 ;; This cannot include any bits from %Y! - ret int %D -} - -int %test2(int %X, ubyte %Y) { - %B = cast ubyte %Y to int - %C = or int %X, %B - %D = and int %C, 65536 ;; This cannot include any bits from %Y! - ret int %D -} - -int %test3(int %X, int %Y) { - %B = shl int %Y, ubyte 1 - %C = or int %X, %B - %D = and int %C, 1 ;; This cannot include any bits from %Y! - ret int %D -} - -uint %test4(uint %X, uint %Y) { - %B = shr uint %Y, ubyte 31 - %C = or uint %X, %B - %D = and uint %C, 2 ;; This cannot include any bits from %Y! - ret uint %D -} - -int %or_test1(int %X, int %Y) { - %A = and int %X, 1 - %B = or int %A, 1 ;; This cannot include any bits from X! - ret int %B -} - -ubyte %or_test2(ubyte %X, ubyte %Y) { - %A = shl ubyte %X, ubyte 7 - %B = or ubyte %A, 128 ;; This cannot include any bits from X! - ret ubyte %B +define i32 @test1(i32 %X, i32 %Y) { + %A = and i32 %X, 7 ; [#uses=1] + %B = and i32 %Y, 8 ; [#uses=1] + %C = or i32 %A, %B ; [#uses=1] + ;; This cannot include any bits from %Y! + %D = and i32 %C, 7 ; [#uses=1] + ret i32 %D +} + +define i32 @test2(i32 %X, i8 %Y) { + %B = zext i8 %Y to i32 ; [#uses=1] + %C = or i32 %X, %B ; [#uses=1] + ;; This cannot include any bits from %Y! + %D = and i32 %C, 65536 ; [#uses=1] + ret i32 %D +} + +define i32 @test3(i32 %X, i32 %Y) { + %B = shl i32 %Y, 1 ; [#uses=1] + %C = or i32 %X, %B ; [#uses=1] + ;; This cannot include any bits from %Y! + %D = and i32 %C, 1 ; [#uses=1] + ret i32 %D +} + +define i32 @test4(i32 %X, i32 %Y) { + %B = lshr i32 %Y, 31 ; [#uses=1] + %C = or i32 %X, %B ; [#uses=1] + ;; This cannot include any bits from %Y! + %D = and i32 %C, 2 ; [#uses=1] + ret i32 %D +} + +define i32 @or_test1(i32 %X, i32 %Y) { + %A = and i32 %X, 1 ; [#uses=1] + ;; This cannot include any bits from X! + %B = or i32 %A, 1 ; [#uses=1] + ret i32 %B +} + +define i8 @or_test2(i8 %X, i8 %Y) { + %A = shl i8 %X, 7 ; [#uses=1] + ;; This cannot include any bits from X! + %B = or i8 %A, -128 ; [#uses=1] + ret i8 %B } Modified: llvm/trunk/test/Transforms/InstCombine/and.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/and.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/and.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/and.ll Sun Mar 9 03:16:40 2008 @@ -1,229 +1,255 @@ ; This test makes sure that these instructions are properly eliminated. ; -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | not grep and -; END. +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep and -implementation - -int %test1(int %A) { - %B = and int %A, 0 ; zero result - ret int %B +define i32 @test1(i32 %A) { + ; zero result + %B = and i32 %A, 0 ; [#uses=1] + ret i32 %B } -int %test2(int %A) { - %B = and int %A, -1 ; noop - ret int %B +define i32 @test2(i32 %A) { + ; noop + %B = and i32 %A, -1 ; [#uses=1] + ret i32 %B } -bool %test3(bool %A) { - %B = and bool %A, false ; always = false - ret bool %B +define i1 @test3(i1 %A) { + ; always = false + %B = and i1 %A, false ; [#uses=1] + ret i1 %B } -bool %test4(bool %A) { - %B = and bool %A, true ; noop - ret bool %B +define i1 @test4(i1 %A) { + ; noop + %B = and i1 %A, true ; [#uses=1] + ret i1 %B } -int %test5(int %A) { - %B = and int %A, %A - ret int %B +define i32 @test5(i32 %A) { + %B = and i32 %A, %A ; [#uses=1] + ret i32 %B } -bool %test6(bool %A) { - %B = and bool %A, %A - ret bool %B +define i1 @test6(i1 %A) { + %B = and i1 %A, %A ; [#uses=1] + ret i1 %B } -int %test7(int %A) { ; A & ~A == 0 - %NotA = xor int %A, -1 - %B = and int %A, %NotA - ret int %B +; A & ~A == 0 +define i32 @test7(i32 %A) { + %NotA = xor i32 %A, -1 ; [#uses=1] + %B = and i32 %A, %NotA ; [#uses=1] + ret i32 %B } -ubyte %test8(ubyte %A) { ; AND associates - %B = and ubyte %A, 3 - %C = and ubyte %B, 4 - ret ubyte %C +; AND associates +define i8 @test8(i8 %A) { + %B = and i8 %A, 3 ; [#uses=1] + %C = and i8 %B, 4 ; [#uses=1] + ret i8 %C } -bool %test9(int %A) { - %B = and int %A, -2147483648 ; Test of sign bit, convert to setle %A, 0 - %C = setne int %B, 0 - ret bool %C +define i1 @test9(i32 %A) { + ; Test of sign bit, convert to setle %A, 0 + %B = and i32 %A, -2147483648 ; [#uses=1] + %C = icmp ne i32 %B, 0 ; [#uses=1] + ret i1 %C } -bool %test9(uint %A) { - %B = and uint %A, 2147483648 ; Test of sign bit, convert to setle %A, 0 - %C = setne uint %B, 0 - ret bool %C +define i1 @test9a(i32 %A) { + ; Test of sign bit, convert to setle %A, 0 + %B = and i32 %A, -2147483648 ; [#uses=1] + %C = icmp ne i32 %B, 0 ; [#uses=1] + ret i1 %C } -uint %test10(uint %A) { - %B = and uint %A, 12 - %C = xor uint %B, 15 - %D = and uint %C, 1 ; (X ^ C1) & C2 --> (X & C2) ^ (C1&C2) - ret uint %D +define i32 @test10(i32 %A) { + %B = and i32 %A, 12 ; [#uses=1] + %C = xor i32 %B, 15 ; [#uses=1] + ; (X ^ C1) & C2 --> (X & C2) ^ (C1&C2) + %D = and i32 %C, 1 ; [#uses=1] + ret i32 %D } -uint %test11(uint %A, uint* %P) { - %B = or uint %A, 3 - %C = xor uint %B, 12 - store uint %C, uint* %P ; additional use of C - %D = and uint %C, 3 ; %C = and uint %B, 3 --> 3 - ret uint %D +define i32 @test11(i32 %A, i32* %P) { + %B = or i32 %A, 3 ; [#uses=1] + %C = xor i32 %B, 12 ; [#uses=2] + ; additional use of C + store i32 %C, i32* %P + ; %C = and uint %B, 3 --> 3 + %D = and i32 %C, 3 ; [#uses=1] + ret i32 %D } -bool %test12(uint %A, uint %B) { - %C1 = setlt uint %A, %B - %C2 = setle uint %A, %B - %D = and bool %C1, %C2 ; (A < B) & (A <= B) === (A < B) - ret bool %D +define i1 @test12(i32 %A, i32 %B) { + %C1 = icmp ult i32 %A, %B ; [#uses=1] + %C2 = icmp ule i32 %A, %B ; [#uses=1] + ; (A < B) & (A <= B) === (A < B) + %D = and i1 %C1, %C2 ; [#uses=1] + ret i1 %D } -bool %test13(uint %A, uint %B) { - %C1 = setlt uint %A, %B - %C2 = setgt uint %A, %B - %D = and bool %C1, %C2 ; (A < B) & (A > B) === false - ret bool %D +define i1 @test13(i32 %A, i32 %B) { + %C1 = icmp ult i32 %A, %B ; [#uses=1] + %C2 = icmp ugt i32 %A, %B ; [#uses=1] + ; (A < B) & (A > B) === false + %D = and i1 %C1, %C2 ; [#uses=1] + ret i1 %D } -bool %test14(ubyte %A) { - %B = and ubyte %A, 128 - %C = setne ubyte %B, 0 - ret bool %C +define i1 @test14(i8 %A) { + %B = and i8 %A, -128 ; [#uses=1] + %C = icmp ne i8 %B, 0 ; [#uses=1] + ret i1 %C } -ubyte %test15(ubyte %A) { - %B = shr ubyte %A, ubyte 7 - %C = and ubyte %B, 2 ; Always equals zero - ret ubyte %C +define i8 @test15(i8 %A) { + %B = lshr i8 %A, 7 ; [#uses=1] + ; Always equals zero + %C = and i8 %B, 2 ; [#uses=1] + ret i8 %C } -ubyte %test16(ubyte %A) { - %B = shl ubyte %A, ubyte 2 - %C = and ubyte %B, 3 - ret ubyte %C +define i8 @test16(i8 %A) { + %B = shl i8 %A, 2 ; [#uses=1] + %C = and i8 %B, 3 ; [#uses=1] + ret i8 %C } -sbyte %test17(sbyte %X, sbyte %Y) { ;; ~(~X & Y) --> (X | ~Y) - %B = xor sbyte %X, -1 - %C = and sbyte %B, %Y - %D = xor sbyte %C, -1 - ret sbyte %D +;; ~(~X & Y) --> (X | ~Y) +define i8 @test17(i8 %X, i8 %Y) { + %B = xor i8 %X, -1 ; [#uses=1] + %C = and i8 %B, %Y ; [#uses=1] + %D = xor i8 %C, -1 ; [#uses=1] + ret i8 %D } -bool %test18(int %A) { - %B = and int %A, -128 - %C = setne int %B, 0 ;; C >= 128 - ret bool %C +define i1 @test18(i32 %A) { + %B = and i32 %A, -128 ; [#uses=1] + ;; C >= 128 + %C = icmp ne i32 %B, 0 ; [#uses=1] + ret i1 %C } -bool %test18a(ubyte %A) { - %B = and ubyte %A, 254 - %C = seteq ubyte %B, 0 - ret bool %C +define i1 @test18a(i8 %A) { + %B = and i8 %A, -2 ; [#uses=1] + %C = icmp eq i8 %B, 0 ; [#uses=1] + ret i1 %C } -int %test19(int %A) { - %B = shl int %A, ubyte 3 - %C = and int %B, -2 ;; Clearing a zero bit - ret int %C +define i32 @test19(i32 %A) { + %B = shl i32 %A, 3 ; [#uses=1] + ;; Clearing a zero bit + %C = and i32 %B, -2 ; [#uses=1] + ret i32 %C } -ubyte %test20(ubyte %A) { - %C = shr ubyte %A, ubyte 7 - %D = and ubyte %C, 1 ;; Unneeded - ret ubyte %D +define i8 @test20(i8 %A) { + %C = lshr i8 %A, 7 ; [#uses=1] + ;; Unneeded + %D = and i8 %C, 1 ; [#uses=1] + ret i8 %D } -bool %test22(int %A) { - %B = seteq int %A, 1 - %C = setge int %A, 3 - %D = and bool %B, %C ;; False - ret bool %D +define i1 @test22(i32 %A) { + %B = icmp eq i32 %A, 1 ; [#uses=1] + %C = icmp sge i32 %A, 3 ; [#uses=1] + ;; false + %D = and i1 %B, %C ; [#uses=1] + ret i1 %D } -bool %test23(int %A) { - %B = setgt int %A, 1 - %C = setle int %A, 2 - %D = and bool %B, %C ;; A == 2 - ret bool %D +define i1 @test23(i32 %A) { + %B = icmp sgt i32 %A, 1 ; [#uses=1] + %C = icmp sle i32 %A, 2 ; [#uses=1] + ;; A == 2 + %D = and i1 %B, %C ; [#uses=1] + ret i1 %D } -bool %test24(int %A) { - %B = setgt int %A, 1 - %C = setne int %A, 2 - %D = and bool %B, %C ;; A > 2 - ret bool %D +define i1 @test24(i32 %A) { + %B = icmp sgt i32 %A, 1 ; [#uses=1] + %C = icmp ne i32 %A, 2 ; [#uses=1] + ;; A > 2 + %D = and i1 %B, %C ; [#uses=1] + ret i1 %D } -bool %test25(int %A) { - %B = setge int %A, 50 - %C = setlt int %A, 100 - %D = and bool %B, %C ;; (A-50) [#uses=1] + %C = icmp slt i32 %A, 100 ; [#uses=1] + ;; (A-50) [#uses=1] + ret i1 %D } -bool %test26(int %A) { - %B = setne int %A, 50 - %C = setne int %A, 51 - %D = and bool %B, %C ;; (A-50) > 1 - ret bool %D +define i1 @test26(i32 %A) { + %B = icmp ne i32 %A, 50 ; [#uses=1] + %C = icmp ne i32 %A, 51 ; [#uses=1] + ;; (A-50) > 1 + %D = and i1 %B, %C ; [#uses=1] + ret i1 %D } -ubyte %test27(ubyte %A) { - %B = and ubyte %A, 4 - %C = sub ubyte %B, 16 - %D = and ubyte %C, 240 ;; 0xF0 - %E = add ubyte %D, 16 - ret ubyte %E +define i8 @test27(i8 %A) { + %B = and i8 %A, 4 ; [#uses=1] + %C = sub i8 %B, 16 ; [#uses=1] + ;; 0xF0 + %D = and i8 %C, -16 ; [#uses=1] + %E = add i8 %D, 16 ; [#uses=1] + ret i8 %E } -int %test28(int %X) { ;; This is juse a zero extending shr. - %Y = shr int %X, ubyte 24 ;; Sign extend - %Z = and int %Y, 255 ;; Mask out sign bits - ret int %Z +;; This is juse a zero extending shr. +define i32 @test28(i32 %X) { + ;; Sign extend + %Y = ashr i32 %X, 24 ; [#uses=1] + ;; Mask out sign bits + %Z = and i32 %Y, 255 ; [#uses=1] + ret i32 %Z } -int %test29(ubyte %X) { - %Y = cast ubyte %X to int - %Z = and int %Y, 255 ;; Zero extend makes this unneeded. - ret int %Z +define i32 @test29(i8 %X) { + %Y = zext i8 %X to i32 ; [#uses=1] + ;; Zero extend makes this unneeded. + %Z = and i32 %Y, 255 ; [#uses=1] + ret i32 %Z } -int %test30(bool %X) { - %Y = cast bool %X to int - %Z = and int %Y, 1 - ret int %Z +define i32 @test30(i1 %X) { + %Y = zext i1 %X to i32 ; [#uses=1] + %Z = and i32 %Y, 1 ; [#uses=1] + ret i32 %Z } -uint %test31(bool %X) { - %Y = cast bool %X to uint - %Z = shl uint %Y, ubyte 4 - %A = and uint %Z, 16 - ret uint %A +define i32 @test31(i1 %X) { + %Y = zext i1 %X to i32 ; [#uses=1] + %Z = shl i32 %Y, 4 ; [#uses=1] + %A = and i32 %Z, 16 ; [#uses=1] + ret i32 %A } -uint %test32(uint %In) { - %Y = and uint %In, 16 - %Z = shr uint %Y, ubyte 2 - %A = and uint %Z, 1 - ret uint %A +define i32 @test32(i32 %In) { + %Y = and i32 %In, 16 ; [#uses=1] + %Z = lshr i32 %Y, 2 ; [#uses=1] + %A = and i32 %Z, 1 ; [#uses=1] + ret i32 %A } -uint %test33(uint %b) { ;; Code corresponding to one-bit bitfield ^1. - %tmp.4.mask = and uint %b, 1 - %tmp.10 = xor uint %tmp.4.mask, 1 - %tmp.12 = and uint %b, 4294967294 - %tmp.13 = or uint %tmp.12, %tmp.10 - ret uint %tmp.13 +;; Code corresponding to one-bit bitfield ^1. +define i32 @test33(i32 %b) { + %tmp.4.mask = and i32 %b, 1 ; [#uses=1] + %tmp.10 = xor i32 %tmp.4.mask, 1 ; [#uses=1] + %tmp.12 = and i32 %b, -2 ; [#uses=1] + %tmp.13 = or i32 %tmp.12, %tmp.10 ; [#uses=1] + ret i32 %tmp.13 } -int %test34(int %A, int %B) { - %tmp.2 = or int %B, %A - %tmp.4 = and int %tmp.2, %B - ret int %tmp.4 +define i32 @test34(i32 %A, i32 %B) { + %tmp.2 = or i32 %B, %A ; [#uses=1] + %tmp.4 = and i32 %tmp.2, %B ; [#uses=1] + ret i32 %tmp.4 } Modified: llvm/trunk/test/Transforms/InstCombine/bit-tracking.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bit-tracking.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/bit-tracking.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/bit-tracking.ll Sun Mar 9 03:16:40 2008 @@ -1,26 +1,26 @@ ; This file contains various testcases that require tracking whether bits are ; set or cleared by various instructions. -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine -instcombine | llvm-dis |\ +; RUN: llvm-as < %s | opt -instcombine -instcombine | llvm-dis |\ ; RUN: not grep %ELIM ; Reduce down to a single XOR -int %test3(int %B) { - %ELIMinc = and int %B, 1 - %tmp.5 = xor int %ELIMinc, 1 - %ELIM7 = and int %B, -2 - %tmp.8 = or int %tmp.5, %ELIM7 - ret int %tmp.8 +define i32 @test3(i32 %B) { + %ELIMinc = and i32 %B, 1 ; [#uses=1] + %tmp.5 = xor i32 %ELIMinc, 1 ; [#uses=1] + %ELIM7 = and i32 %B, -2 ; [#uses=1] + %tmp.8 = or i32 %tmp.5, %ELIM7 ; [#uses=1] + ret i32 %tmp.8 } ; Finally, a bigger case where we chain things together. This corresponds to ; incrementing a single-bit bitfield, which should become just an xor. -int %test4(int %B) { - %ELIM3 = shl int %B, ubyte 31 - %ELIM4 = shr int %ELIM3, ubyte 31 - %inc = add int %ELIM4, 1 - %ELIM5 = and int %inc, 1 - %ELIM7 = and int %B, -2 - %tmp.8 = or int %ELIM5, %ELIM7 - ret int %tmp.8 +define i32 @test4(i32 %B) { + %ELIM3 = shl i32 %B, 31 ; [#uses=1] + %ELIM4 = ashr i32 %ELIM3, 31 ; [#uses=1] + %inc = add i32 %ELIM4, 1 ; [#uses=1] + %ELIM5 = and i32 %inc, 1 ; [#uses=1] + %ELIM7 = and i32 %B, -2 ; [#uses=1] + %tmp.8 = or i32 %ELIM5, %ELIM7 ; [#uses=1] + ret i32 %tmp.8 } Modified: llvm/trunk/test/Transforms/InstCombine/bittest.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bittest.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/bittest.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/bittest.ll Sun Mar 9 03:16:40 2008 @@ -1,29 +1,30 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine -simplifycfg | llvm-dis |\ +; RUN: llvm-as < %s | opt -instcombine -simplifycfg | llvm-dis |\ ; RUN: not grep {call void %abort} -%b_rec.0 = external global int + at b_rec.0 = external global i32 ; [#uses=2] -void %_Z12h000007_testv(uint *%P) { +define void @_Z12h000007_testv(i32* %P) { entry: - %tmp.2 = load int* %b_rec.0 ; [#uses=1] - %tmp.9 = or int %tmp.2, -989855744 ; [#uses=2] - %tmp.16 = and int %tmp.9, -805306369 ; [#uses=2] - %tmp.17 = and int %tmp.9, -973078529 ; [#uses=1] - store int %tmp.17, int* %b_rec.0 - %tmp.17.shrunk = cast int %tmp.16 to uint ; [#uses=1] - %tmp.22 = and uint %tmp.17.shrunk, 3221225472 ; [#uses=1] - %tmp.23 = seteq uint %tmp.22, 3221225472 ; [#uses=1] - br bool %tmp.23, label %endif.0, label %then.0 + %tmp.2 = load i32* @b_rec.0 ; [#uses=1] + %tmp.9 = or i32 %tmp.2, -989855744 ; [#uses=2] + %tmp.16 = and i32 %tmp.9, -805306369 ; [#uses=2] + %tmp.17 = and i32 %tmp.9, -973078529 ; [#uses=1] + store i32 %tmp.17, i32* @b_rec.0 + %tmp.17.shrunk = bitcast i32 %tmp.16 to i32 ; [#uses=1] + %tmp.22 = and i32 %tmp.17.shrunk, -1073741824 ; [#uses=1] + %tmp.23 = icmp eq i32 %tmp.22, -1073741824 ; [#uses=1] + br i1 %tmp.23, label %endif.0, label %then.0 then.0: ; preds = %entry - tail call void %abort( ) + tail call void @abort( ) unreachable endif.0: ; preds = %entry - %tmp.17.shrunk2 = cast int %tmp.16 to uint ; [#uses=1] - %tmp.27.mask = and uint %tmp.17.shrunk2, 100663295 ; [#uses=1] - store uint %tmp.27.mask, uint* %P + %tmp.17.shrunk2 = bitcast i32 %tmp.16 to i32 ; [#uses=1] + %tmp.27.mask = and i32 %tmp.17.shrunk2, 100663295 ; [#uses=1] + store i32 %tmp.27.mask, i32* %P ret void } -declare void %abort() +declare void @abort() + Modified: llvm/trunk/test/Transforms/InstCombine/bswap-fold.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bswap-fold.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/bswap-fold.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/bswap-fold.ll Sun Mar 9 03:16:40 2008 @@ -1,28 +1,29 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: grep ret | count 3 -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: not grep call.*bswap -bool %test1(ushort %tmp2) { - %tmp10 = call ushort %llvm.bswap.i16( ushort %tmp2 ) - %tmp = seteq ushort %tmp10, 1 - ret bool %tmp +define i1 @test1(i16 %tmp2) { + %tmp10 = call i16 @llvm.bswap.i16( i16 %tmp2 ) ; [#uses=1] + %tmp = icmp eq i16 %tmp10, 1 ; [#uses=1] + ret i1 %tmp } -bool %test2(uint %tmp) { - %tmp34 = tail call uint %llvm.bswap.i32( uint %tmp ) - %tmp = seteq uint %tmp34, 1 - ret bool %tmp +define i1 @test2(i32 %tmp) { + %tmp34 = tail call i32 @llvm.bswap.i32( i32 %tmp ) ; [#uses=1] + %tmp.upgrd.1 = icmp eq i32 %tmp34, 1 ; [#uses=1] + ret i1 %tmp.upgrd.1 } -declare uint %llvm.bswap.i32(uint) +declare i32 @llvm.bswap.i32(i32) -bool %test3(ulong %tmp) { - %tmp34 = tail call ulong %llvm.bswap.i64( ulong %tmp ) - %tmp = seteq ulong %tmp34, 1 - ret bool %tmp +define i1 @test3(i64 %tmp) { + %tmp34 = tail call i64 @llvm.bswap.i64( i64 %tmp ) ; [#uses=1] + %tmp.upgrd.2 = icmp eq i64 %tmp34, 1 ; [#uses=1] + ret i1 %tmp.upgrd.2 } -declare ulong %llvm.bswap.i64(ulong) +declare i64 @llvm.bswap.i64(i64) + +declare i16 @llvm.bswap.i16(i16) -declare ushort %llvm.bswap.i16(ushort) Modified: llvm/trunk/test/Transforms/InstCombine/bswap.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bswap.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/bswap.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/bswap.ll Sun Mar 9 03:16:40 2008 @@ -1,62 +1,57 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: grep {call.*llvm.bswap} | count 5 -; END. -uint %test1(uint %i) { - %tmp1 = shr uint %i, ubyte 24 ; [#uses=1] - %tmp3 = shr uint %i, ubyte 8 ; [#uses=1] - %tmp4 = and uint %tmp3, 65280 ; [#uses=1] - %tmp5 = or uint %tmp1, %tmp4 ; [#uses=1] - %tmp7 = shl uint %i, ubyte 8 ; [#uses=1] - %tmp8 = and uint %tmp7, 16711680 ; [#uses=1] - %tmp9 = or uint %tmp5, %tmp8 ; [#uses=1] - %tmp11 = shl uint %i, ubyte 24 ; [#uses=1] - %tmp12 = or uint %tmp9, %tmp11 ; [#uses=1] - ret uint %tmp12 +define i32 @test1(i32 %i) { + %tmp1 = lshr i32 %i, 24 ; [#uses=1] + %tmp3 = lshr i32 %i, 8 ; [#uses=1] + %tmp4 = and i32 %tmp3, 65280 ; [#uses=1] + %tmp5 = or i32 %tmp1, %tmp4 ; [#uses=1] + %tmp7 = shl i32 %i, 8 ; [#uses=1] + %tmp8 = and i32 %tmp7, 16711680 ; [#uses=1] + %tmp9 = or i32 %tmp5, %tmp8 ; [#uses=1] + %tmp11 = shl i32 %i, 24 ; [#uses=1] + %tmp12 = or i32 %tmp9, %tmp11 ; [#uses=1] + ret i32 %tmp12 } -uint %test2(uint %arg) { - %tmp2 = shl uint %arg, ubyte 24 ; [#uses=1] - %tmp4 = shl uint %arg, ubyte 8 ; [#uses=1] - %tmp5 = and uint %tmp4, 16711680 ; [#uses=1] - %tmp6 = or uint %tmp2, %tmp5 ; [#uses=1] - %tmp8 = shr uint %arg, ubyte 8 ; [#uses=1] - %tmp9 = and uint %tmp8, 65280 ; [#uses=1] - %tmp10 = or uint %tmp6, %tmp9 ; [#uses=1] - %tmp12 = shr uint %arg, ubyte 24 ; [#uses=1] - %tmp14 = or uint %tmp10, %tmp12 ; [#uses=1] - ret uint %tmp14 +define i32 @test2(i32 %arg) { + %tmp2 = shl i32 %arg, 24 ; [#uses=1] + %tmp4 = shl i32 %arg, 8 ; [#uses=1] + %tmp5 = and i32 %tmp4, 16711680 ; [#uses=1] + %tmp6 = or i32 %tmp2, %tmp5 ; [#uses=1] + %tmp8 = lshr i32 %arg, 8 ; [#uses=1] + %tmp9 = and i32 %tmp8, 65280 ; [#uses=1] + %tmp10 = or i32 %tmp6, %tmp9 ; [#uses=1] + %tmp12 = lshr i32 %arg, 24 ; [#uses=1] + %tmp14 = or i32 %tmp10, %tmp12 ; [#uses=1] + ret i32 %tmp14 } -ushort %test3(ushort %s) { - %tmp2 = shr ushort %s, ubyte 8 - %tmp4 = shl ushort %s, ubyte 8 - %tmp5 = or ushort %tmp2, %tmp4 - ret ushort %tmp5 +define i16 @test3(i16 %s) { + %tmp2 = lshr i16 %s, 8 ; [#uses=1] + %tmp4 = shl i16 %s, 8 ; [#uses=1] + %tmp5 = or i16 %tmp2, %tmp4 ; [#uses=1] + ret i16 %tmp5 } -ushort %test4(ushort %s) { - %tmp2 = shr ushort %s, ubyte 8 - %tmp4 = shl ushort %s, ubyte 8 - %tmp5 = or ushort %tmp4, %tmp2 - ret ushort %tmp5 +define i16 @test4(i16 %s) { + %tmp2 = lshr i16 %s, 8 ; [#uses=1] + %tmp4 = shl i16 %s, 8 ; [#uses=1] + %tmp5 = or i16 %tmp4, %tmp2 ; [#uses=1] + ret i16 %tmp5 } -; unsigned short test5(unsigned short a) { -; return ((a & 0xff00) >> 8 | (a & 0x00ff) << 8); -;} -ushort %test5(ushort %a) { - %tmp = zext ushort %a to int - %tmp1 = and int %tmp, 65280 - %tmp2 = ashr int %tmp1, ubyte 8 - %tmp2 = trunc int %tmp2 to short - %tmp4 = and int %tmp, 255 - %tmp5 = shl int %tmp4, ubyte 8 - %tmp5 = trunc int %tmp5 to short - %tmp = or short %tmp2, %tmp5 - %tmp6 = bitcast short %tmp to ushort - %tmp6 = zext ushort %tmp6 to int - %retval = trunc int %tmp6 to ushort - ret ushort %retval +define i16 @test5(i16 %a) { + %tmp = zext i16 %a to i32 ; [#uses=2] + %tmp1 = and i32 %tmp, 65280 ; [#uses=1] + %tmp2 = ashr i32 %tmp1, 8 ; [#uses=1] + %tmp2.upgrd.1 = trunc i32 %tmp2 to i16 ; [#uses=1] + %tmp4 = and i32 %tmp, 255 ; [#uses=1] + %tmp5 = shl i32 %tmp4, 8 ; [#uses=1] + %tmp5.upgrd.2 = trunc i32 %tmp5 to i16 ; [#uses=1] + %tmp.upgrd.3 = or i16 %tmp2.upgrd.1, %tmp5.upgrd.2 ; [#uses=1] + %tmp6 = bitcast i16 %tmp.upgrd.3 to i16 ; [#uses=1] + %tmp6.upgrd.4 = zext i16 %tmp6 to i32 ; [#uses=1] + %retval = trunc i32 %tmp6.upgrd.4 to i16 ; [#uses=1] + ret i16 %retval } - Modified: llvm/trunk/test/Transforms/InstCombine/call-cast-target.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/call-cast-target.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/call-cast-target.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/call-cast-target.ll Sun Mar 9 03:16:40 2008 @@ -1,16 +1,14 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: grep call | not grep bitcast -target endian = little -target pointersize = 32 +target datalayout = "e-p:32:32" target triple = "i686-pc-linux-gnu" -implementation ; Functions: - -int %main() { +define i32 @main() { entry: - %tmp = call int cast (sbyte* (int*)* %ctime to int (int*)*)( int* null ) - ret int %tmp + %tmp = call i32 bitcast (i8* (i32*)* @ctime to i32 (i32*)*)( i32* null ) ; [#uses=1] + ret i32 %tmp } -declare sbyte* %ctime(int*) +declare i8* @ctime(i32*) + Modified: llvm/trunk/test/Transforms/InstCombine/call-intrinsics.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/call-intrinsics.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/call-intrinsics.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/call-intrinsics.ll Sun Mar 9 03:16:40 2008 @@ -1,17 +1,19 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis +; RUN: llvm-as < %s | opt -instcombine | llvm-dis -declare void %llvm.memmove.i32(sbyte*, sbyte*, uint, uint) -declare void %llvm.memcpy.i32(sbyte*, sbyte*, uint, uint) -declare void %llvm.memset.i32(sbyte*, ubyte, uint, uint) - -%X = global sbyte 0 -%Y = global sbyte 12 - -void %zero_byte_test() { - ; These process zero bytes, so they are a noop. - call void %llvm.memmove.i32(sbyte* %X, sbyte* %Y, uint 0, uint 100) - call void %llvm.memcpy.i32(sbyte* %X, sbyte* %Y, uint 0, uint 100) - call void %llvm.memset.i32(sbyte* %X, ubyte 123, uint 0, uint 100) - ret void + at X = global i8 0 ; [#uses=3] + at Y = global i8 12 ; [#uses=2] + +declare void @llvm.memmove.i32(i8*, i8*, i32, i32) + +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) + +declare void @llvm.memset.i32(i8*, i8, i32, i32) + +define void @zero_byte_test() { + ; These process zero bytes, so they are a noop. + call void @llvm.memmove.i32( i8* @X, i8* @Y, i32 0, i32 100 ) + call void @llvm.memcpy.i32( i8* @X, i8* @Y, i32 0, i32 100 ) + call void @llvm.memset.i32( i8* @X, i8 123, i32 0, i32 100 ) + ret void } Modified: llvm/trunk/test/Transforms/InstCombine/canonicalize_branch.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/canonicalize_branch.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/canonicalize_branch.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/canonicalize_branch.ll Sun Mar 9 03:16:40 2008 @@ -1,28 +1,36 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ -; RUN: not grep {setne\|setle\|setge} +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ +; RUN: not grep {icmp ne\|icmp ule\|icmp uge} -int %test1(uint %X, uint %Y) { - %C = setne uint %X, %Y - br bool %C, label %T, label %F -T: - ret int 12 -F: - ret int 123 +define i32 @test1(i32 %X, i32 %Y) { + %C = icmp ne i32 %X, %Y ; [#uses=1] + br i1 %C, label %T, label %F + +T: ; preds = %0 + ret i32 12 + +F: ; preds = %0 + ret i32 123 } -int %test2(uint %X, uint %Y) { - %C = setle uint %X, %Y - br bool %C, label %T, label %F -T: - ret int 12 -F: - ret int 123 +define i32 @test2(i32 %X, i32 %Y) { + %C = icmp ule i32 %X, %Y ; [#uses=1] + br i1 %C, label %T, label %F + +T: ; preds = %0 + ret i32 12 + +F: ; preds = %0 + ret i32 123 } -int %test3(uint %X, uint %Y) { - %C = setge uint %X, %Y - br bool %C, label %T, label %F -T: - ret int 12 -F: - ret int 123 + +define i32 @test3(i32 %X, i32 %Y) { + %C = icmp uge i32 %X, %Y ; [#uses=1] + br i1 %C, label %T, label %F + +T: ; preds = %0 + ret i32 12 + +F: ; preds = %0 + ret i32 123 } + Modified: llvm/trunk/test/Transforms/InstCombine/cast-and-cast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/cast-and-cast.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/cast-and-cast.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/cast-and-cast.ll Sun Mar 9 03:16:40 2008 @@ -1,16 +1,17 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: not grep bitcast -bool %test1(uint %val) { - %t1 = bitcast uint %val to int - %t2 = and int %t1, 1 - %t3 = trunc int %t2 to bool - ret bool %t3 +define i1 @test1(i32 %val) { + %t1 = bitcast i32 %val to i32 ; [#uses=1] + %t2 = and i32 %t1, 1 ; [#uses=1] + %t3 = trunc i32 %t2 to i1 ; [#uses=1] + ret i1 %t3 } -short %test1(uint %val) { - %t1 = bitcast uint %val to int - %t2 = and int %t1, 1 - %t3 = trunc int %t2 to short - ret short %t3 +define i16 @test1.upgrd.1(i32 %val) { + %t1 = bitcast i32 %val to i32 ; [#uses=1] + %t2 = and i32 %t1, 1 ; [#uses=1] + %t3 = trunc i32 %t2 to i16 ; [#uses=1] + ret i16 %t3 } + Modified: llvm/trunk/test/Transforms/InstCombine/cast-cast-to-and.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/cast-cast-to-and.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/cast-cast-to-and.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/cast-cast-to-and.ll Sun Mar 9 03:16:40 2008 @@ -1,9 +1,9 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ -; RUN: not grep ubyte +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ +; RUN: not grep i8 -int %test1(uint %X) { - %Y = cast uint %X to ubyte ;; Turn into an AND - %Z = cast ubyte %Y to int - ret int %Z +define i32 @test1(i32 %X) { + %Y = trunc i32 %X to i8 ; [#uses=1] + %Z = zext i8 %Y to i32 ; [#uses=1] + ret i32 %Z } Modified: llvm/trunk/test/Transforms/InstCombine/cast-load-gep.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/cast-load-gep.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/cast-load-gep.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/cast-load-gep.ll Sun Mar 9 03:16:40 2008 @@ -1,23 +1,20 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine -globaldce | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine -globaldce | llvm-dis | \ ; RUN: not grep Array ; Pulling the cast out of the load allows us to eliminate the load, and then ; the whole array. -%unop = type {int } -%op = type {float} + %op = type { float } + %unop = type { i32 } + at Array = internal constant [1 x %op* (%op*)*] [ %op* (%op*)* @foo ] ; <[1 x %op* (%op*)*]*> [#uses=1] -%Array = internal constant [1 x %op* (%op*)*] [ %op* (%op*)* %foo ] - -implementation - -%op* %foo(%op* %X) { - ret %op* %X +define %op* @foo(%op* %X) { + ret %op* %X } -%unop* %caller(%op* %O) { - %tmp = load %unop* (%op*)** cast ([1 x %op* (%op*)*]* %Array to %unop* (%op*)**) - %tmp.2 = call %unop* (%op*)* %tmp(%op* %O) - ret %unop* %tmp.2 +define %unop* @caller(%op* %O) { + %tmp = load %unop* (%op*)** bitcast ([1 x %op* (%op*)*]* @Array to %unop* (%op*)**); <%unop* (%op*)*> [#uses=1] + %tmp.2 = call %unop* %tmp( %op* %O ) ; <%unop*> [#uses=1] + ret %unop* %tmp.2 } Modified: llvm/trunk/test/Transforms/InstCombine/cast-malloc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/cast-malloc.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/cast-malloc.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/cast-malloc.ll Sun Mar 9 03:16:40 2008 @@ -1,13 +1,15 @@ ; test that casted mallocs get converted to malloc of the right type -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: not grep bitcast ; The target datalayout is important for this test case. We have to tell ; instcombine that the ABI alignment for a long is 4-bytes, not 8, otherwise ; it won't do the transform. target datalayout = "e-i64:32:64" -int* %test(uint %size) { - %X = malloc long, uint %size - %ret = bitcast long* %X to int* - ret int* %ret + +define i32* @test(i32 %size) { + %X = malloc i64, i32 %size ; [#uses=1] + %ret = bitcast i64* %X to i32* ; [#uses=1] + ret i32* %ret } + Modified: llvm/trunk/test/Transforms/InstCombine/cast-propagate.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/cast-propagate.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/cast-propagate.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/cast-propagate.ll Sun Mar 9 03:16:40 2008 @@ -1,10 +1,11 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine -mem2reg | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine -mem2reg | llvm-dis | \ ; RUN: not grep load -int %test1(uint* %P) { - %A = alloca uint - store uint 123, uint* %A - %Q = cast uint* %A to int* ; Cast the result of the load not the source - %V = load int* %Q - ret int %V +define i32 @test1(i32* %P) { + %A = alloca i32 ; [#uses=2] + store i32 123, i32* %A + ; Cast the result of the load not the source + %Q = bitcast i32* %A to i32* ; [#uses=1] + %V = load i32* %Q ; [#uses=1] + ret i32 %V } Modified: llvm/trunk/test/Transforms/InstCombine/cast-set.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/cast-set.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/cast-set.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/cast-set.ll Sun Mar 9 03:16:40 2008 @@ -1,49 +1,51 @@ ; This tests for various complex cast elimination cases instcombine should ; handle. -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | notcast +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | notcast -bool %test1(int %X) { - %A = cast int %X to uint - %c = setne uint %A, 12 ; Convert to setne int %X, 12 - ret bool %c +define i1 @test1(i32 %X) { + %A = bitcast i32 %X to i32 ; [#uses=1] + ; Convert to setne int %X, 12 + %c = icmp ne i32 %A, 12 ; [#uses=1] + ret i1 %c } -bool %test2(int %X, int %Y) { - %A = cast int %X to uint - %B = cast int %Y to uint - %c = setne uint %A, %B ; Convert to setne int %X, %Y - ret bool %c +define i1 @test2(i32 %X, i32 %Y) { + %A = bitcast i32 %X to i32 ; [#uses=1] + %B = bitcast i32 %Y to i32 ; [#uses=1] + ; Convert to setne int %X, %Y + %c = icmp ne i32 %A, %B ; [#uses=1] + ret i1 %c } -int %test4(int %A) { - %B = cast int %A to uint - %C = shl uint %B, ubyte 2 - %D = cast uint %C to int - ret int %D +define i32 @test4(i32 %A) { + %B = bitcast i32 %A to i32 ; [#uses=1] + %C = shl i32 %B, 2 ; [#uses=1] + %D = bitcast i32 %C to i32 ; [#uses=1] + ret i32 %D } -short %test5(short %A) { - %B = cast short %A to uint - %C = and uint %B, 15 - %D = cast uint %C to short - ret short %D +define i16 @test5(i16 %A) { + %B = sext i16 %A to i32 ; [#uses=1] + %C = and i32 %B, 15 ; [#uses=1] + %D = trunc i32 %C to i16 ; [#uses=1] + ret i16 %D } -bool %test6(bool %A) { - %B = cast bool %A to int - %C = setne int %B, 0 - ret bool %C +define i1 @test6(i1 %A) { + %B = zext i1 %A to i32 ; [#uses=1] + %C = icmp ne i32 %B, 0 ; [#uses=1] + ret i1 %C } -bool %test6a(bool %A) { - %B = cast bool %A to int - %C = setne int %B, -1 ; Always true! - ret bool %C +define i1 @test6a(i1 %A) { + %B = zext i1 %A to i32 ; [#uses=1] + %C = icmp ne i32 %B, -1 ; [#uses=1] + ret i1 %C } -bool %test7(sbyte* %A) { - %B = cast sbyte* %A to int* - %C = seteq int* %B, null - ret bool %C +define i1 @test7(i8* %A) { + %B = bitcast i8* %A to i32* ; [#uses=1] + %C = icmp eq i32* %B, null ; [#uses=1] + ret i1 %C } Modified: llvm/trunk/test/Transforms/InstCombine/cast_ptr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/cast_ptr.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/cast_ptr.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/cast_ptr.ll Sun Mar 9 03:16:40 2008 @@ -1,20 +1,19 @@ ; Tests to make sure elimination of casts is working correctly -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | notcast +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | notcast -target pointersize = 32 +target datalayout = "p:32:32" -implementation - -sbyte* %test1(sbyte* %t) { - %tmpc = cast sbyte* %t to uint - %tmpa = add uint %tmpc, 32 - %tv = cast uint %tmpa to sbyte* - ret sbyte* %tv +define i8* @test1(i8* %t) { + %tmpc = ptrtoint i8* %t to i32 ; [#uses=1] + %tmpa = add i32 %tmpc, 32 ; [#uses=1] + %tv = inttoptr i32 %tmpa to i8* ; [#uses=1] + ret i8* %tv } -bool %test2(sbyte* %a, sbyte* %b) { -%tmpa = cast sbyte* %a to uint -%tmpb = cast sbyte* %b to uint -%r = seteq uint %tmpa, %tmpb -ret bool %r +define i1 @test2(i8* %a, i8* %b) { + %tmpa = ptrtoint i8* %a to i32 ; [#uses=1] + %tmpb = ptrtoint i8* %b to i32 ; [#uses=1] + %r = icmp eq i32 %tmpa, %tmpb ; [#uses=1] + ret i1 %r } + Modified: llvm/trunk/test/Transforms/InstCombine/fpcast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/fpcast.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/fpcast.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/fpcast.ll Sun Mar 9 03:16:40 2008 @@ -1,14 +1,15 @@ ; Test some floating point casting cases -; RUN: llvm-upgrade %s -o - | llvm-as | opt -instcombine | llvm-dis | notcast -; RUN: llvm-upgrade %s -o - | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as %s -o - | opt -instcombine | llvm-dis | notcast +; RUN: llvm-as %s -o - | opt -instcombine | llvm-dis | \ ; RUN: egrep {ret i8 \(-1\)\|\(255\)} -sbyte %test1() { - %x = fptoui float 255.0 to sbyte - ret sbyte %x +define i8 @test1() { + %x = fptoui float 2.550000e+02 to i8 ; [#uses=1] + ret i8 %x } -ubyte %test2() { - %x = fptosi float -1.0 to ubyte - ret ubyte %x +define i8 @test2() { + %x = fptosi float -1.000000e+00 to i8 ; [#uses=1] + ret i8 %x } + Modified: llvm/trunk/test/Transforms/InstCombine/getelementptr-setcc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/getelementptr-setcc.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/getelementptr-setcc.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/getelementptr-setcc.ll Sun Mar 9 03:16:40 2008 @@ -1,34 +1,31 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: not grep getelementptr -; END. -bool %test1(short* %P, int %I, int %J) { - %X = getelementptr short* %P, int %I - %Y = getelementptr short* %P, int %J - - %C = setlt short* %X, %Y - ret bool %C +define i1 @test1(i16* %P, i32 %I, i32 %J) { + %X = getelementptr i16* %P, i32 %I ; [#uses=1] + %Y = getelementptr i16* %P, i32 %J ; [#uses=1] + %C = icmp ult i16* %X, %Y ; [#uses=1] + ret i1 %C } -bool %test2(short* %P, int %I) { - %X = getelementptr short* %P, int %I - - %C = setlt short* %X, %P - ret bool %C +define i1 @test2(i16* %P, i32 %I) { + %X = getelementptr i16* %P, i32 %I ; [#uses=1] + %C = icmp ult i16* %X, %P ; [#uses=1] + ret i1 %C } -int %test3(int* %P, int %A, int %B) { - %tmp.4 = getelementptr int* %P, int %A ; [#uses=1] - %tmp.9 = getelementptr int* %P, int %B ; [#uses=1] - %tmp.10 = seteq int* %tmp.4, %tmp.9 ; [#uses=1] - %tmp.11 = cast bool %tmp.10 to int ; [#uses=1] - ret int %tmp.11 +define i32 @test3(i32* %P, i32 %A, i32 %B) { + %tmp.4 = getelementptr i32* %P, i32 %A ; [#uses=1] + %tmp.9 = getelementptr i32* %P, i32 %B ; [#uses=1] + %tmp.10 = icmp eq i32* %tmp.4, %tmp.9 ; [#uses=1] + %tmp.11 = zext i1 %tmp.10 to i32 ; [#uses=1] + ret i32 %tmp.11 } -int %test4(int* %P, int %A, int %B) { - %tmp.4 = getelementptr int* %P, int %A ; [#uses=1] - %tmp.6 = seteq int* %tmp.4, %P ; [#uses=1] - %tmp.7 = cast bool %tmp.6 to int ; [#uses=1] - ret int %tmp.7 +define i32 @test4(i32* %P, i32 %A, i32 %B) { + %tmp.4 = getelementptr i32* %P, i32 %A ; [#uses=1] + %tmp.6 = icmp eq i32* %tmp.4, %P ; [#uses=1] + %tmp.7 = zext i1 %tmp.6 to i32 ; [#uses=1] + ret i32 %tmp.7 } Modified: llvm/trunk/test/Transforms/InstCombine/getelementptr_cast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/getelementptr_cast.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/getelementptr_cast.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/getelementptr_cast.ll Sun Mar 9 03:16:40 2008 @@ -1,11 +1,11 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: notcast {} {getelementptr.*} -%G = external global [3 x sbyte] + at G = external global [3 x i8] ; <[3 x i8]*> [#uses=1] -implementation - -ubyte *%foo(uint %Idx) { - %tmp = getelementptr ubyte* cast ([3 x sbyte]* %G to ubyte*), uint %Idx - ret ubyte* %tmp +define i8* @foo(i32 %Idx) { + %gep.upgrd.1 = zext i32 %Idx to i64 ; [#uses=1] + %tmp = getelementptr i8* getelementptr ([3 x i8]* @G, i32 0, i32 0), i64 %gep.upgrd.1 ; [#uses=1] + ret i8* %tmp } + Modified: llvm/trunk/test/Transforms/InstCombine/getelementptr_const.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/getelementptr_const.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/getelementptr_const.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/getelementptr_const.ll Sun Mar 9 03:16:40 2008 @@ -1,14 +1,15 @@ ; Test folding of constantexpr geps into normal geps. -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine -gcse -instcombine | \ +; RUN: llvm-as < %s | opt -instcombine -gcse -instcombine | \ ; RUN: llvm-dis | not grep getelementptr -%Array = external global [40 x int] + at Array = external global [40 x i32] ; <[40 x i32]*> [#uses=2] -int %test(long %X) { - %A = getelementptr int* getelementptr ([40 x int]* %Array, long 0, long 0), long %X - %B = getelementptr [40 x int]* %Array, long 0, long %X - %a = cast int* %A to int - %b = cast int* %B to int - %c = sub int %a, %b - ret int %c +define i32 @test(i64 %X) { + %A = getelementptr i32* getelementptr ([40 x i32]* @Array, i64 0, i64 0), i64 %X ; [#uses=1] + %B = getelementptr [40 x i32]* @Array, i64 0, i64 %X ; [#uses=1] + %a = ptrtoint i32* %A to i32 ; [#uses=1] + %b = ptrtoint i32* %B to i32 ; [#uses=1] + %c = sub i32 %a, %b ; [#uses=1] + ret i32 %c } + Modified: llvm/trunk/test/Transforms/InstCombine/getelementptr_index.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/getelementptr_index.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/getelementptr_index.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/getelementptr_index.ll Sun Mar 9 03:16:40 2008 @@ -1,10 +1,9 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | grep trunc +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep trunc -target endian = little -target pointersize = 32 +target datalayout = "e-p:32:32" -int* %test(int* %X, long %Idx) { - ; Should insert a cast to int on this target - %R = getelementptr int* %X, long %Idx - ret int* %R +define i32* @test(i32* %X, i64 %Idx) { + %R = getelementptr i32* %X, i64 %Idx ; [#uses=1] + ret i32* %R } + Modified: llvm/trunk/test/Transforms/InstCombine/hoist_instr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/hoist_instr.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/hoist_instr.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/hoist_instr.ll Sun Mar 9 03:16:40 2008 @@ -1,17 +1,17 @@ -; RUN: llvm-upgrade < %s | llvm-as | opt -instcombine | llvm-dis | \ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: %prcontext div 1 | grep then: ;; This tests that the div is hoisted into the then block. - -int %foo(bool %C, int %A, int %B) { +define i32 @foo(i1 %C, i32 %A, i32 %B) { entry: - br bool %C, label %then, label %endif + br i1 %C, label %then, label %endif -then: - br label %endif +then: ; preds = %entry + br label %endif -endif: - %X = phi int [%A, %then], [15, %entry] - %Y = div int %X, 42 - ret int %Y +endif: ; preds = %then, %entry + %X = phi i32 [ %A, %then ], [ 15, %entry ] ; [#uses=1] + %Y = sdiv i32 %X, 42 ; [#uses=1] + ret i32 %Y } + Modified: llvm/trunk/test/Transforms/InstCombine/set.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/set.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/set.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/set.ll Sun Mar 9 03:16:40 2008 @@ -1,6 +1,7 @@ ; This test makes sure that these instructions are properly eliminated. ; ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep icmp +; END. @X = external global i32 ; [#uses=2] Modified: llvm/trunk/test/Transforms/InstCombine/setcc-cast-cast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/setcc-cast-cast.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/setcc-cast-cast.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/setcc-cast-cast.ll Sun Mar 9 03:16:40 2008 @@ -3,6 +3,7 @@ ; been when a setcc is used with two casts. ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: not grep {br bool false} +; END. define i32 @bug(i8 %inbuff) { entry: Modified: llvm/trunk/test/Transforms/InstCombine/setcc-strength-reduce.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/setcc-strength-reduce.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/setcc-strength-reduce.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/setcc-strength-reduce.ll Sun Mar 9 03:16:40 2008 @@ -4,7 +4,7 @@ ; ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: grep -v {icmp eq} | grep -v {icmp ne} | not grep icmp - +; END. define i1 @test1(i32 %A) { ; setne %A, 0 Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/shift.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/shift.ll Sun Mar 9 03:16:40 2008 @@ -1,6 +1,7 @@ ; This test makes sure that these instructions are properly eliminated. ; ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep sh +; END. define i32 @test1(i32 %A) { %B = shl i32 %A, 0 ; [#uses=1] Modified: llvm/trunk/test/Transforms/InstCombine/signext.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/signext.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/signext.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/signext.ll Sun Mar 9 03:16:40 2008 @@ -1,5 +1,6 @@ ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: not grep {(and\|xor\|add\|shl\|shr)} +; END. define i32 @test1(i32 %x) { %tmp.1 = and i32 %x, 65535 ; [#uses=1] Modified: llvm/trunk/test/Transforms/InstCombine/vec_insert_to_shuffle.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/vec_insert_to_shuffle.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/vec_insert_to_shuffle.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/vec_insert_to_shuffle.ll Sun Mar 9 03:16:40 2008 @@ -4,6 +4,7 @@ ; RUN: not grep insertelement ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: not grep extractelement +; END. define <4 x float> @test(<4 x float> %tmp, <4 x float> %tmp1) { %tmp4 = extractelement <4 x float> %tmp, i32 1 ; [#uses=1] Modified: llvm/trunk/test/Transforms/InstCombine/xor.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/xor.ll?rev=48103&r1=48102&r2=48103&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/xor.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/xor.ll Sun Mar 9 03:16:40 2008 @@ -2,6 +2,7 @@ ; ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \ ; RUN: not grep {xor } +; END. @G1 = global i32 0 ; [#uses=1] @G2 = global i32 0 ; [#uses=1] From baldrick at free.fr Sun Mar 9 03:45:11 2008 From: baldrick at free.fr (Duncan Sands) Date: Sun, 9 Mar 2008 09:45:11 +0100 Subject: [llvm-commits] [llvm] r47782 - in /llvm/trunk: include/llvm/CodeGen/ValueTypes.h lib/CodeGen/SelectionDAG/LegalizeDAG.cpp In-Reply-To: <200803010340.m213ewlD009365@zion.cs.uiuc.edu> References: <200803010340.m213ewlD009365@zion.cs.uiuc.edu> Message-ID: <200803090945.12527.baldrick@free.fr> Hi Dale, > + if (MVT::is128BitVector(VT) || VT == MVT::ppcf128 || VT == MVT::f128) > intVT = MVT::i128; I still don't understand why you don't just do: intVT = MVT::getIntegerType(MVT::getSizeInBits(VT)); if (isTypeLegal(intVT)) { ... use it ... or, if you are happy to use illegal integers (but not apints): ... if (!MVT::isExtendedVT(IntVT)) { ... use it ... You tried to explain before but I didn't get it. Ciao, Duncan. From sabre at nondot.org Sun Mar 9 03:46:19 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 08:46:19 -0000 Subject: [llvm-commits] [llvm] r48104 - /llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Message-ID: <200803090846.m298kJ9m006115@zion.cs.uiuc.edu> Author: lattner Date: Sun Mar 9 03:46:19 2008 New Revision: 48104 URL: http://llvm.org/viewvc/llvm-project?rev=48104&view=rev Log: add some code to support cross-register class copying from RST -> RFP{32/64/80}. We only handle ST(0) for now. Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=48104&r1=48103&r2=48104&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Sun Mar 9 03:46:19 2008 @@ -1400,10 +1400,10 @@ } void X86InstrInfo::copyRegToReg(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - unsigned DestReg, unsigned SrcReg, - const TargetRegisterClass *DestRC, - const TargetRegisterClass *SrcRC) const { + MachineBasicBlock::iterator MI, + unsigned DestReg, unsigned SrcReg, + const TargetRegisterClass *DestRC, + const TargetRegisterClass *SrcRC) const { if (DestRC == SrcRC) { unsigned Opc; if (DestRC == &X86::GR64RegClass) { @@ -1464,6 +1464,24 @@ return; } } + + // Moving ST(0) to/from a register turns into FpGET_ST0_32 etc. + if (SrcRC == &X86::RSTRegClass) { + // Copying from ST(0). FIXME: handle ST(1) also + assert(SrcReg == X86::ST0 && "Can only copy from TOS right now"); + unsigned Opc; + if (DestRC == &X86::RFP32RegClass) + Opc = X86::FpGET_ST0_32; + else if (DestRC == &X86::RFP64RegClass) + Opc = X86::FpGET_ST0_64; + else { + assert(DestRC == &X86::RFP80RegClass); + Opc = X86::FpGET_ST0_80; + } + BuildMI(MBB, MI, get(Opc), DestReg); + return; + } + cerr << "Not yet supported!"; abort(); } From sabre at nondot.org Sun Mar 9 03:49:15 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 08:49:15 -0000 Subject: [llvm-commits] [llvm] r48105 - in /llvm/trunk: lib/CodeGen/SelectionDAG/ScheduleDAG.cpp test/CodeGen/X86/inline-asm-fpstack.ll Message-ID: <200803090849.m298nFqh006211@zion.cs.uiuc.edu> Author: lattner Date: Sun Mar 9 03:49:15 2008 New Revision: 48105 URL: http://llvm.org/viewvc/llvm-project?rev=48105&view=rev Log: Add ScheduleDAG support for copytoreg where the src/dst register are in different register classes, e.g. copy of ST(0) to RFP*. This gets some really trivial inline asm working that plops things on the top of stack (PR879) Added: llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=48105&r1=48104&r2=48105&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Sun Mar 9 03:49:15 2008 @@ -433,21 +433,25 @@ break; } - const TargetRegisterClass *TRC = 0; + const TargetRegisterClass *SrcRC = 0, *DstRC = 0; + SrcRC = TRI->getPhysicalRegisterRegClass(Node->getValueType(ResNo), SrcReg); + // Figure out the register class to create for the destreg. - if (VRBase) - TRC = RegInfo.getRegClass(VRBase); - else - TRC = TRI->getPhysicalRegisterRegClass(Node->getValueType(ResNo), SrcReg); + if (VRBase) { + DstRC = RegInfo.getRegClass(VRBase); + } else { + DstRC = DAG.getTargetLoweringInfo() + .getRegClassFor(Node->getValueType(ResNo)); + } // If all uses are reading from the src physical register and copying the // register is either impossible or very expensive, then don't create a copy. - if (MatchReg && TRC->getCopyCost() < 0) { + if (MatchReg && SrcRC->getCopyCost() < 0) { VRBase = SrcReg; } else { // Create the reg, emit the copy. - VRBase = RegInfo.createVirtualRegister(TRC); - TII->copyRegToReg(*BB, BB->end(), VRBase, SrcReg, TRC, TRC); + VRBase = RegInfo.createVirtualRegister(DstRC); + TII->copyRegToReg(*BB, BB->end(), VRBase, SrcReg, DstRC, SrcRC); } if (InstanceNo > 0) @@ -594,14 +598,14 @@ unsigned VReg = getVR(Op, VRBaseMap); MI->addOperand(MachineOperand::CreateReg(VReg, false)); - // Verify that it is right. + // Verify that it is right. Note that the reg class of the physreg and the + // vreg don't necessarily need to match, but the target copy insertion has + // to be able to handle it. This handles things like copies from ST(0) to + // an FP vreg on x86. assert(TargetRegisterInfo::isVirtualRegister(VReg) && "Not a vreg?"); if (II) { - const TargetRegisterClass *RC = - getInstrOperandRegClass(TRI, TII, *II, IIOpNum); - assert(RC && "Don't have operand info for this instruction!"); - assert(RegInfo.getRegClass(VReg) == RC && - "Register class of operand and regclass of use don't agree!"); + assert(getInstrOperandRegClass(TRI, TII, *II, IIOpNum) && + "Don't have operand info for this instruction!"); } } @@ -674,8 +678,7 @@ if (VRBase) { // Grab the destination register - const TargetRegisterClass *DRC = 0; - DRC = RegInfo.getRegClass(VRBase); + const TargetRegisterClass *DRC = RegInfo.getRegClass(VRBase); assert(SRC && DRC && SRC == DRC && "Source subregister and destination must have the same class"); } else { Added: llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll?rev=48105&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll (added) +++ llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll Sun Mar 9 03:49:15 2008 @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | llc -march=x86 + +define x86_fp80 @test1() { + %tmp85 = call x86_fp80 asm sideeffect "fld0", "={st(0)}"() + ret x86_fp80 %tmp85 +} + +define double @test2() { + %tmp85 = call double asm sideeffect "fld0", "={st(0)}"() + ret double %tmp85 +} + + From nicholas at mxc.ca Sun Mar 9 03:50:23 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 09 Mar 2008 08:50:23 -0000 Subject: [llvm-commits] [llvm] r48106 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200803090850.m298oNcO006261@zion.cs.uiuc.edu> Author: nicholas Date: Sun Mar 9 03:50:23 2008 New Revision: 48106 URL: http://llvm.org/viewvc/llvm-project?rev=48106&view=rev Log: Don't eliminate blocks that are only reachable by unwind_to. Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=48106&r1=48105&r2=48106&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Sun Mar 9 03:50:23 2008 @@ -10796,11 +10796,15 @@ // Recursively visit successors. If this is a branch or switch on a // constant, only visit the reachable successor. + if (BB->getUnwindDest()) + Worklist.push_back(BB->getUnwindDest()); TerminatorInst *TI = BB->getTerminator(); if (BranchInst *BI = dyn_cast(TI)) { if (BI->isConditional() && isa(BI->getCondition())) { bool CondVal = cast(BI->getCondition())->getZExtValue(); - Worklist.push_back(BI->getSuccessor(!CondVal)); + BasicBlock *ReachableBB = BI->getSuccessor(!CondVal); + if (ReachableBB != BB->getUnwindDest()) + Worklist.push_back(ReachableBB); continue; } } else if (SwitchInst *SI = dyn_cast(TI)) { @@ -10808,7 +10812,9 @@ // See if this is an explicit destination. for (unsigned i = 1, e = SI->getNumSuccessors(); i != e; ++i) if (SI->getCaseValue(i) == Cond) { - Worklist.push_back(SI->getSuccessor(i)); + BasicBlock *ReachableBB = SI->getSuccessor(i); + if (ReachableBB != BB->getUnwindDest()) + Worklist.push_back(ReachableBB); continue; } From baldrick at free.fr Sun Mar 9 03:51:06 2008 From: baldrick at free.fr (Duncan Sands) Date: Sun, 9 Mar 2008 09:51:06 +0100 Subject: [llvm-commits] [llvm] r47802 - in /llvm/trunk: include/llvm/BasicBlock.h include/llvm/Bitcode/LLVMBitCodes.h lib/AsmParser/LLLexer.cpp lib/AsmParser/llvmAsmParser.y lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Writer/BitcodeWriter.cpp lib/VMCore/AsmWriter.cpp lib/VMCore/BasicBlock.cpp test/Feature/unwindto.ll tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp In-Reply-To: <200803020248.m222mBXH025353@zion.cs.uiuc.edu> References: <200803020248.m222mBXH025353@zion.cs.uiuc.edu> Message-ID: <200803090951.07153.baldrick@free.fr> Hi Nick, thanks for doing this! > +entry: unwind_to %target how about entry: unwind %target or entry: unwinds %target I don't much like the underscore... Ciao, Duncan. From idadesub at users.sourceforge.net Sun Mar 9 04:16:43 2008 From: idadesub at users.sourceforge.net (Erick Tryzelaar) Date: Sun, 9 Mar 2008 01:16:43 -0800 Subject: [llvm-commits] [PATCH] Add support for generating ocaml documentation. In-Reply-To: <> References: <> Message-ID: <1205054203-480-1-git-send-email-idadesub@users.sourceforge.net> This patch integrates automatic generation of ocaml documation with the build system. It copies the doxygen install and directory hierarchy. Gordon, I'll leave the re-configuration to you. --- Makefile.config.in | 4 ++++ autoconf/configure.ac | 13 +++++++++++++ bindings/ocaml/Makefile | 6 ++++++ bindings/ocaml/Makefile.ocaml | 6 ++++++ docs/Makefile | 41 +++++++++++++++++++++++++++++++++++------ 5 files changed, 64 insertions(+), 6 deletions(-) -------------- next part -------------- A non-text attachment was scrubbed... Name: 18723f18d9c7d97313f65b9eeae0e2219e699543.diff Type: text/x-patch Size: 5325 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080309/756fbfd6/attachment.bin From sabre at nondot.org Sun Mar 9 04:15:33 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 09:15:33 -0000 Subject: [llvm-commits] [llvm] r48107 - in /llvm/trunk: lib/CodeGen/SelectionDAG/ScheduleDAG.cpp lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/inline-asm-fpstack.ll Message-ID: <200803090915.m299FXSt007571@zion.cs.uiuc.edu> Author: lattner Date: Sun Mar 9 04:15:31 2008 New Revision: 48107 URL: http://llvm.org/viewvc/llvm-project?rev=48107&view=rev Log: teach X86InstrInfo::copyRegToReg how to copy into ST(0) from an RFP register class. Teach ScheduleDAG how to handle CopyToReg with different src/dst reg classes. This allows us to compile trivial inline asms that expect stuff on the top of x87-fp stack. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp llvm/trunk/lib/Target/X86/X86InstrInfo.cpp llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=48107&r1=48106&r2=48107&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Sun Mar 9 04:15:31 2008 @@ -844,23 +844,31 @@ case ISD::SRCVALUE: break; case ISD::CopyToReg: { - unsigned InReg; - if (RegisterSDNode *R = dyn_cast(Node->getOperand(2))) - InReg = R->getReg(); + unsigned SrcReg; + SDOperand SrcVal = Node->getOperand(2); + if (RegisterSDNode *R = dyn_cast(SrcVal)) + SrcReg = R->getReg(); else - InReg = getVR(Node->getOperand(2), VRBaseMap); + SrcReg = getVR(SrcVal, VRBaseMap); + unsigned DestReg = cast(Node->getOperand(1))->getReg(); - if (InReg != DestReg) {// Coalesced away the copy? - const TargetRegisterClass *TRC = 0; - // Get the target register class - if (TargetRegisterInfo::isVirtualRegister(InReg)) - TRC = RegInfo.getRegClass(InReg); - else - TRC = - TRI->getPhysicalRegisterRegClass(Node->getOperand(2).getValueType(), - InReg); - TII->copyRegToReg(*BB, BB->end(), DestReg, InReg, TRC, TRC); - } + if (SrcReg == DestReg) // Coalesced away the copy? Ignore. + break; + + const TargetRegisterClass *SrcTRC = 0, *DstTRC = 0; + // Get the register classes of the src/dst. + if (TargetRegisterInfo::isVirtualRegister(SrcReg)) + SrcTRC = RegInfo.getRegClass(SrcReg); + else + SrcTRC = TRI->getPhysicalRegisterRegClass(SrcVal.getValueType(),SrcReg); + + if (TargetRegisterInfo::isVirtualRegister(DestReg)) + DstTRC = RegInfo.getRegClass(DestReg); + else + DstTRC = TRI->getPhysicalRegisterRegClass( + Node->getOperand(1).getValueType(), + DestReg); + TII->copyRegToReg(*BB, BB->end(), DestReg, SrcReg, DstTRC, SrcTRC); break; } case ISD::CopyFromReg: { Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=48107&r1=48106&r2=48107&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Sun Mar 9 04:15:31 2008 @@ -1465,7 +1465,7 @@ } } - // Moving ST(0) to/from a register turns into FpGET_ST0_32 etc. + // Moving from ST(0) turns into FpGET_ST0_32 etc. if (SrcRC == &X86::RSTRegClass) { // Copying from ST(0). FIXME: handle ST(1) also assert(SrcReg == X86::ST0 && "Can only copy from TOS right now"); @@ -1481,6 +1481,23 @@ BuildMI(MBB, MI, get(Opc), DestReg); return; } + + // Moving to ST(0) turns into FpSET_ST0_32 etc. + if (DestRC == &X86::RSTRegClass) { + // Copying to ST(0). FIXME: handle ST(1) also + assert(DestReg == X86::ST0 && "Can only copy to TOS right now"); + unsigned Opc; + if (SrcRC == &X86::RFP32RegClass) + Opc = X86::FpSET_ST0_32; + else if (SrcRC == &X86::RFP64RegClass) + Opc = X86::FpSET_ST0_64; + else { + assert(SrcRC == &X86::RFP80RegClass); + Opc = X86::FpSET_ST0_80; + } + BuildMI(MBB, MI, get(Opc)).addReg(SrcReg); + return; + } cerr << "Not yet supported!"; abort(); Modified: llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll?rev=48107&r1=48106&r2=48107&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll (original) +++ llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll Sun Mar 9 04:15:31 2008 @@ -10,4 +10,20 @@ ret double %tmp85 } +define void @test3(x86_fp80 %X) { + call void asm sideeffect "frob ", "{st(0)},~{dirflag},~{fpsr},~{flags}"( x86_fp80 %X) + ret void +} + +define void @test4(double %X) { + call void asm sideeffect "frob ", "{st(0)},~{dirflag},~{fpsr},~{flags}"( double %X) + ret void +} + +define void @test5(double %X) { + %Y = add double %X, 123.0 + call void asm sideeffect "frob ", "{st(0)},~{dirflag},~{fpsr},~{flags}"( double %Y) + ret void +} + From clattner at apple.com Sun Mar 9 04:16:32 2008 From: clattner at apple.com (Chris Lattner) Date: Sun, 9 Mar 2008 01:16:32 -0800 Subject: [llvm-commits] [llvm] r47802 - in /llvm/trunk: include/llvm/BasicBlock.h include/llvm/Bitcode/LLVMBitCodes.h lib/AsmParser/LLLexer.cpp lib/AsmParser/llvmAsmParser.y lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Writer/BitcodeWriter.cpp lib/VMCore/AsmWriter.cpp lib/VMCore/BasicBlock.cpp test/Feature/unwindto.ll tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp In-Reply-To: <200803090951.07153.baldrick@free.fr> References: <200803020248.m222mBXH025353@zion.cs.uiuc.edu> <200803090951.07153.baldrick@free.fr> Message-ID: On Mar 9, 2008, at 12:51 AM, Duncan Sands wrote: > Hi Nick, thanks for doing this! > >> +entry: unwind_to %target > > how about > > entry: unwind %target > > or > > entry: unwinds %target > > I don't much like the underscore... 'unwinds' is nice. 'unwind' is ambiguous with the unwind instruction. -Chris From sabre at nondot.org Sun Mar 9 04:38:47 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 09:38:47 -0000 Subject: [llvm-commits] [llvm] r48108 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Message-ID: <200803090938.m299clCc032476@zion.cs.uiuc.edu> Author: lattner Date: Sun Mar 9 04:38:46 2008 New Revision: 48108 URL: http://llvm.org/viewvc/llvm-project?rev=48108&view=rev Log: fp_round's produced by getCopyFromParts should always be exact, because they are produced by calls (which are known exact) and by cross block copies which are known to be produced by extends. This improves: define double @test2() { %tmp85 = call double asm sideeffect "fld0", "={st(0)}"() ret double %tmp85 } from: _test2: subl $20, %esp # InlineAsm Start fld0 # InlineAsm End fstpl 8(%esp) movsd 8(%esp), %xmm0 movsd %xmm0, (%esp) fldl (%esp) addl $20, %esp #FP_REG_KILL ret to: _test2: # InlineAsm Start fld0 # InlineAsm End #FP_REG_KILL ret by avoiding a f64 <-> f80 trip Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=48108&r1=48107&r2=48108&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sun Mar 9 04:38:46 2008 @@ -628,15 +628,13 @@ /// combined into the value they represent. If the parts combine to a type /// larger then ValueVT then AssertOp can be used to specify whether the extra /// bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT -/// (ISD::AssertSext). Likewise TruncExact is used for floating point types to -/// indicate that the extra bits can be discarded without losing precision. +/// (ISD::AssertSext). static SDOperand getCopyFromParts(SelectionDAG &DAG, const SDOperand *Parts, unsigned NumParts, MVT::ValueType PartVT, MVT::ValueType ValueVT, - ISD::NodeType AssertOp = ISD::DELETED_NODE, - bool TruncExact = false) { + ISD::NodeType AssertOp = ISD::DELETED_NODE) { assert(NumParts > 0 && "No parts to assemble!"); TargetLowering &TLI = DAG.getTargetLoweringInfo(); SDOperand Val = Parts[0]; @@ -761,8 +759,9 @@ if (MVT::isFloatingPoint(PartVT) && MVT::isFloatingPoint(ValueVT)) { if (ValueVT < Val.getValueType()) + // FP_ROUND's are always exact here. return DAG.getNode(ISD::FP_ROUND, ValueVT, Val, - DAG.getIntPtrConstant(TruncExact)); + DAG.getIntPtrConstant(1)); return DAG.getNode(ISD::FP_EXTEND, ValueVT, Val); } @@ -3267,7 +3266,8 @@ } // Assemble the legal parts into the final value. - return getCopyFromParts(DAG, &Parts[0], NumParts, RegVT, ValueVT); + return getCopyFromParts(DAG, &Parts[0], NumParts, RegVT, ValueVT, + ISD::DELETED_NODE); } /// getCopyToRegs - Emit a series of CopyToReg nodes that copies the @@ -4147,7 +4147,7 @@ AssertOp = ISD::AssertZext; Ops.push_back(getCopyFromParts(DAG, &Parts[0], NumParts, PartVT, VT, - AssertOp, true)); + AssertOp)); } assert(i == NumArgRegs && "Argument register count mismatch!"); return Ops; @@ -4257,7 +4257,7 @@ for (unsigned i = 0; i != NumRegs; ++i) Results[i] = Res.getValue(i); Res = getCopyFromParts(DAG, &Results[0], NumRegs, RegisterVT, VT, - AssertOp, true); + AssertOp); } return std::make_pair(Res, Chain); From nicholas at mxc.ca Sun Mar 9 04:08:23 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 09 Mar 2008 01:08:23 -0800 Subject: [llvm-commits] fix mem2reg to support unwind_to labels Message-ID: <47D3A907.2090800@mxc.ca> PromoteMemoryToRegister tries to iterate across the successors of the block's TerminatorInst instead of using the CFG iterators like it ought. This patch fixes that oversight. Please review this change. Nick -------------- next part -------------- A non-text attachment was scrubbed... Name: mem2reg-unwind.patch Type: text/x-diff Size: 1642 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080309/6d1b40cd/attachment.bin From nicholas at mxc.ca Sun Mar 9 04:44:38 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 09 Mar 2008 09:44:38 -0000 Subject: [llvm-commits] [llvm] r48109 - /llvm/trunk/lib/Transforms/Scalar/SCCP.cpp Message-ID: <200803090944.m299icVG032661@zion.cs.uiuc.edu> Author: nicholas Date: Sun Mar 9 04:44:38 2008 New Revision: 48109 URL: http://llvm.org/viewvc/llvm-project?rev=48109&view=rev Log: SCCP also needs to be taught to follow unwind_to Modified: llvm/trunk/lib/Transforms/Scalar/SCCP.cpp Modified: llvm/trunk/lib/Transforms/Scalar/SCCP.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SCCP.cpp?rev=48109&r1=48108&r2=48109&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/SCCP.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/SCCP.cpp Sun Mar 9 04:44:38 2008 @@ -1082,6 +1082,10 @@ } } Instruction *I = CS.getInstruction(); + + if (!CS.doesNotThrow() && I->getParent()->getUnwindDest()) + markEdgeExecutable(I->getParent(), I->getParent()->getUnwindDest()); + if (I->getType() == Type::VoidTy) return; LatticeVal &IV = ValueState[I]; From baldrick at free.fr Sun Mar 9 04:44:57 2008 From: baldrick at free.fr (Duncan Sands) Date: Sun, 9 Mar 2008 10:44:57 +0100 Subject: [llvm-commits] [llvm] r47944 - /llvm/trunk/lib/Linker/LinkModules.cpp In-Reply-To: <200803051511.m25FB1wT014017@zion.cs.uiuc.edu> References: <200803051511.m25FB1wT014017@zion.cs.uiuc.edu> Message-ID: <200803091044.57758.baldrick@free.fr> > + // FIXME: Desptie of the name, this function currently does not 'link' stuff, Desptie -> Despite Ciao, D. From baldrick at free.fr Sun Mar 9 05:02:49 2008 From: baldrick at free.fr (Duncan Sands) Date: Sun, 9 Mar 2008 11:02:49 +0100 Subject: [llvm-commits] [llvm] r48084 - in /llvm/trunk: lib/Transforms/IPO/PruneEH.cpp test/Transforms/PruneEH/unwindto.ll In-Reply-To: <200803090455.m294tHn2023871@zion.cs.uiuc.edu> References: <200803090455.m294tHn2023871@zion.cs.uiuc.edu> Message-ID: <200803091102.49932.baldrick@free.fr> Hi Nick, > + } else > + couldUnwind = true; a stylistic point: please use } else { couldUnwind = true; } when the previous if block is in {}. > + } else if (!CI->doesNotThrow()) > + couldUnwind = true; Likewise. Thanks, D. From baldrick at free.fr Sun Mar 9 05:07:26 2008 From: baldrick at free.fr (Duncan Sands) Date: Sun, 9 Mar 2008 11:07:26 +0100 Subject: [llvm-commits] [llvm] r48108 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp In-Reply-To: <200803090938.m299clCc032476@zion.cs.uiuc.edu> References: <200803090938.m299clCc032476@zion.cs.uiuc.edu> Message-ID: <200803091107.27931.baldrick@free.fr> Hi Chris, > + return getCopyFromParts(DAG, &Parts[0], NumParts, RegVT, ValueVT, > + ISD::DELETED_NODE); there's no point in passing ISD::DELETED_NODE here since it is the default. Ciao, D. From asl at math.spbu.ru Sun Mar 9 05:53:18 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Sun, 9 Mar 2008 13:53:18 +0300 Subject: [llvm-commits] [llvm] r47944 - /llvm/trunk/lib/Linker/LinkModules.cpp In-Reply-To: <200803091044.57758.baldrick@free.fr> References: <200803051511.m25FB1wT014017@zion.cs.uiuc.edu> <200803091044.57758.baldrick@free.fr> Message-ID: Hello, Duncan On 3/9/08, Duncan Sands wrote: > > + // FIXME: Desptie of the name, this function currently does not 'link' stuff, Thanks, however, this comment doesn't exist anymore :) -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From asl at math.spbu.ru Sun Mar 9 11:24:04 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Sun, 09 Mar 2008 16:24:04 -0000 Subject: [llvm-commits] [llvm] r48110 - /llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll Message-ID: <200803091624.m29GO4bZ010947@zion.cs.uiuc.edu> Author: asl Date: Sun Mar 9 11:24:04 2008 New Revision: 48110 URL: http://llvm.org/viewvc/llvm-project?rev=48110&view=rev Log: Temporary XFAIL the test, until I'll commit a fix Modified: llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll Modified: llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll?rev=48110&r1=48109&r2=48110&view=diff ============================================================================== --- llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll (original) +++ llvm/trunk/test/Linker/2008-03-07-DroppedSection_a.ll Sun Mar 9 11:24:04 2008 @@ -2,6 +2,7 @@ ; RUN: llvm-as < %p/2008-03-07-DroppedSection_b.ll > %t2.bc ; RUN: llvm-ld -r -disable-opt %t.bc %t2.bc -o %t3.bc ; RUN: llvm-dis < %t3.bc | grep ".data.init_task" +; XFAIL: * ; ModuleID = 't.bc' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" From gordonhenriksen at mac.com Sun Mar 9 11:36:59 2008 From: gordonhenriksen at mac.com (Gordon Henriksen) Date: Sun, 9 Mar 2008 12:36:59 -0400 Subject: [llvm-commits] [PATCH] Add support for generating ocaml documentation. In-Reply-To: <1205054203-480-1-git-send-email-idadesub@users.sourceforge.net> References: <> <1205054203-480-1-git-send-email-idadesub@users.sourceforge.net> Message-ID: On Mar 9, 2008, at 05:16, Erick Tryzelaar wrote: > This patch integrates automatic generation of ocaml documation with > the build system. It copies the doxygen install and directory > hierarchy. Gordon, I'll leave the re-configuration to you. Erick, This is great! I have a couple of comments, though. ? Although you're clearly following precedent with --enable-ocamldoc, let's tread lightly adding new configure knobs. doxygen is off by default because it takes an alarming amount of time to run. ocamldoc takes maybe 3s. Let's simply turn ocamldoc on if the bindings are being built, something like ifneq (,$(filter ocaml,$ (BINDINGS_TO_BUILD))). Or, if you prefer, we could also require -- enable-doxygen, making that switch control both documentation generators. ? How about a patch for the web site to link to these? http://llvm.org/svn/llvm-project/website/trunk/ Thanks, Gordon -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080309/44140ee1/attachment.html From nicholas at mxc.ca Sun Mar 9 12:11:18 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 09 Mar 2008 17:11:18 -0000 Subject: [llvm-commits] [llvm] r48111 - /llvm/trunk/lib/Transforms/IPO/PruneEH.cpp Message-ID: <200803091711.m29HBJAe012246@zion.cs.uiuc.edu> Author: nicholas Date: Sun Mar 9 12:11:18 2008 New Revision: 48111 URL: http://llvm.org/viewvc/llvm-project?rev=48111&view=rev Log: Braces belong here. No functionality change. Modified: llvm/trunk/lib/Transforms/IPO/PruneEH.cpp Modified: llvm/trunk/lib/Transforms/IPO/PruneEH.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PruneEH.cpp?rev=48111&r1=48110&r2=48111&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/PruneEH.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/PruneEH.cpp Sun Mar 9 12:11:18 2008 @@ -185,8 +185,9 @@ ++NumRemoved; MadeChange = true; - } else + } else { couldUnwind = true; + } for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ) if (CallInst *CI = dyn_cast(I++)) { From nicholas at mxc.ca Sun Mar 9 12:13:05 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 09 Mar 2008 17:13:05 -0000 Subject: [llvm-commits] [llvm] r48112 - /llvm/trunk/lib/Transforms/IPO/PruneEH.cpp Message-ID: <200803091713.m29HD5Fj012337@zion.cs.uiuc.edu> Author: nicholas Date: Sun Mar 9 12:13:05 2008 New Revision: 48112 URL: http://llvm.org/viewvc/llvm-project?rev=48112&view=rev Log: And again. Modified: llvm/trunk/lib/Transforms/IPO/PruneEH.cpp Modified: llvm/trunk/lib/Transforms/IPO/PruneEH.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PruneEH.cpp?rev=48112&r1=48111&r2=48112&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/PruneEH.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/PruneEH.cpp Sun Mar 9 12:13:05 2008 @@ -206,8 +206,9 @@ MadeChange = true; ++NumUnreach; break; - } else if (!CI->doesNotThrow()) + } else if (!CI->doesNotThrow()) { couldUnwind = true; + } } // Strip 'unwindTo' off of BBs that have no calls/invokes without nounwind. From nicholas at mxc.ca Sun Mar 9 12:13:11 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 09 Mar 2008 10:13:11 -0700 Subject: [llvm-commits] [llvm] r48084 - in /llvm/trunk: lib/Transforms/IPO/PruneEH.cpp test/Transforms/PruneEH/unwindto.ll In-Reply-To: <200803091102.49932.baldrick@free.fr> References: <200803090455.m294tHn2023871@zion.cs.uiuc.edu> <200803091102.49932.baldrick@free.fr> Message-ID: <47D41AA7.5000103@mxc.ca> Duncan Sands wrote: > Hi Nick, > >> + } else >> + couldUnwind = true; > > a stylistic point: please use > } else { > couldUnwind = true; > } > when the previous if block is in {}. > >> + } else if (!CI->doesNotThrow()) >> + couldUnwind = true; > > Likewise. Done. Thanks for reviewing it! Nick From kremenek at apple.com Sun Mar 9 13:32:50 2008 From: kremenek at apple.com (Ted Kremenek) Date: Sun, 09 Mar 2008 18:32:50 -0000 Subject: [llvm-commits] [llvm] r48115 - in /llvm/trunk/lib: Linker/LinkModules.cpp Transforms/IPO/ExtractGV.cpp Message-ID: <200803091832.m29IWo5X014563@zion.cs.uiuc.edu> Author: kremenek Date: Sun Mar 9 13:32:50 2008 New Revision: 48115 URL: http://llvm.org/viewvc/llvm-project?rev=48115&view=rev Log: Fix some compilation errors on msvc: - "Redefinition of I" (iterator masks previous definition) - include missing header file Patch by Argiris Kirtzidis! Modified: llvm/trunk/lib/Linker/LinkModules.cpp llvm/trunk/lib/Transforms/IPO/ExtractGV.cpp Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=48115&r1=48114&r2=48115&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Sun Mar 9 13:32:50 2008 @@ -597,9 +597,9 @@ // Globals were already linked, thus we can just query ValueMap for variant // of SAliasee in Dest - std::map::const_iterator I = ValueMap.find(SAliasee); - assert(I != ValueMap.end() && "Aliasee not linked"); - GlobalValue* DAliasee = cast(I->second); + std::map::const_iterator VMI = ValueMap.find(SAliasee); + assert(VMI != ValueMap.end() && "Aliasee not linked"); + GlobalValue* DAliasee = cast(VMI->second); // Try to find something 'similar' to SGA in destination module. if (GlobalAlias *DGA = Dest->getNamedAlias(SGA->getName())) { Modified: llvm/trunk/lib/Transforms/IPO/ExtractGV.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/ExtractGV.cpp?rev=48115&r1=48114&r2=48115&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/ExtractGV.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/ExtractGV.cpp Sun Mar 9 13:32:50 2008 @@ -17,6 +17,7 @@ #include "llvm/Constants.h" #include "llvm/Transforms/IPO.h" #include "llvm/Support/Compiler.h" +#include using namespace llvm; namespace { From evan.cheng at apple.com Sun Mar 9 14:26:28 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Sun, 9 Mar 2008 12:26:28 -0700 Subject: [llvm-commits] [llvm] r48042 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/ test/CodeGen/X86/ In-Reply-To: References: <200803080058.m280wdoN000645@zion.cs.uiuc.edu> Message-ID: Yes. Evan On Mar 7, 2008, at 5:02 PM, Eric Christopher wrote: > > On Mar 7, 2008, at 4:58 PM, Evan Cheng wrote: > >> Implement x86 support for @llvm.prefetch. It corresponds to >> prefetcht{0|1|2} and prefetchnta instructions. > > Nifty, this hooked into __builtin_prefetch ? > > -eric > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From lattner at apple.com Sun Mar 9 14:40:44 2008 From: lattner at apple.com (Tanya Lattner) Date: Sun, 9 Mar 2008 12:40:44 -0700 Subject: [llvm-commits] [llvm] r48107 - in /llvm/trunk: lib/CodeGen/SelectionDAG/ScheduleDAG.cpp lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/inline-asm-fpstack.ll In-Reply-To: <200803090915.m299FXSt007571@zion.cs.uiuc.edu> References: <200803090915.m299FXSt007571@zion.cs.uiuc.edu> Message-ID: Chris, I think this patch is the one causing the test failures from last night: test/CodeGen/CellSPU/immed64.ll [DEJAGNU] test/CodeGen/IA64/2005-08-22-LegalizerCrash.ll [DEJAGNU] test/CodeGen/IA64/2005-10-29-shladd.ll [DEJAGNU] test/CodeGen/IA64/ret-0.ll [DEJAGNU] test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll [DEJAGNU] test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll [DEJAGNU] -Tanya On Mar 9, 2008, at 1:15 AM, Chris Lattner wrote: > Author: lattner > Date: Sun Mar 9 04:15:31 2008 > New Revision: 48107 > > URL: http://llvm.org/viewvc/llvm-project?rev=48107&view=rev > Log: > teach X86InstrInfo::copyRegToReg how to copy into ST(0) from > an RFP register class. > > Teach ScheduleDAG how to handle CopyToReg with different src/dst > reg classes. > > This allows us to compile trivial inline asms that expect stuff > on the top of x87-fp stack. > > Modified: > llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp > llvm/trunk/lib/Target/X86/X86InstrInfo.cpp > llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=48107&r1=48106&r2=48107&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Sun Mar 9 > 04:15:31 2008 > @@ -844,23 +844,31 @@ > case ISD::SRCVALUE: > break; > case ISD::CopyToReg: { > - unsigned InReg; > - if (RegisterSDNode *R = dyn_cast(Node- > >getOperand(2))) > - InReg = R->getReg(); > + unsigned SrcReg; > + SDOperand SrcVal = Node->getOperand(2); > + if (RegisterSDNode *R = dyn_cast(SrcVal)) > + SrcReg = R->getReg(); > else > - InReg = getVR(Node->getOperand(2), VRBaseMap); > + SrcReg = getVR(SrcVal, VRBaseMap); > + > unsigned DestReg = cast(Node->getOperand(1))- > >getReg(); > - if (InReg != DestReg) {// Coalesced away the copy? > - const TargetRegisterClass *TRC = 0; > - // Get the target register class > - if (TargetRegisterInfo::isVirtualRegister(InReg)) > - TRC = RegInfo.getRegClass(InReg); > - else > - TRC = > - TRI->getPhysicalRegisterRegClass(Node- > >getOperand(2).getValueType(), > - InReg); > - TII->copyRegToReg(*BB, BB->end(), DestReg, InReg, TRC, TRC); > - } > + if (SrcReg == DestReg) // Coalesced away the copy? Ignore. > + break; > + > + const TargetRegisterClass *SrcTRC = 0, *DstTRC = 0; > + // Get the register classes of the src/dst. > + if (TargetRegisterInfo::isVirtualRegister(SrcReg)) > + SrcTRC = RegInfo.getRegClass(SrcReg); > + else > + SrcTRC = TRI- > >getPhysicalRegisterRegClass(SrcVal.getValueType(),SrcReg); > + > + if (TargetRegisterInfo::isVirtualRegister(DestReg)) > + DstTRC = RegInfo.getRegClass(DestReg); > + else > + DstTRC = TRI->getPhysicalRegisterRegClass( > + Node- > >getOperand(1).getValueType(), > + DestReg); > + TII->copyRegToReg(*BB, BB->end(), DestReg, SrcReg, DstTRC, > SrcTRC); > break; > } > case ISD::CopyFromReg: { > > Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=48107&r1=48106&r2=48107&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Sun Mar 9 04:15:31 > 2008 > @@ -1465,7 +1465,7 @@ > } > } > > - // Moving ST(0) to/from a register turns into FpGET_ST0_32 etc. > + // Moving from ST(0) turns into FpGET_ST0_32 etc. > if (SrcRC == &X86::RSTRegClass) { > // Copying from ST(0). FIXME: handle ST(1) also > assert(SrcReg == X86::ST0 && "Can only copy from TOS right now"); > @@ -1481,6 +1481,23 @@ > BuildMI(MBB, MI, get(Opc), DestReg); > return; > } > + > + // Moving to ST(0) turns into FpSET_ST0_32 etc. > + if (DestRC == &X86::RSTRegClass) { > + // Copying to ST(0). FIXME: handle ST(1) also > + assert(DestReg == X86::ST0 && "Can only copy to TOS right now"); > + unsigned Opc; > + if (SrcRC == &X86::RFP32RegClass) > + Opc = X86::FpSET_ST0_32; > + else if (SrcRC == &X86::RFP64RegClass) > + Opc = X86::FpSET_ST0_64; > + else { > + assert(SrcRC == &X86::RFP80RegClass); > + Opc = X86::FpSET_ST0_80; > + } > + BuildMI(MBB, MI, get(Opc)).addReg(SrcReg); > + return; > + } > > cerr << "Not yet supported!"; > abort(); > > Modified: llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll?rev=48107&r1=48106&r2=48107&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll (original) > +++ llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll Sun Mar 9 > 04:15:31 2008 > @@ -10,4 +10,20 @@ > ret double %tmp85 > } > > +define void @test3(x86_fp80 %X) { > + call void asm sideeffect "frob ", > "{st(0)},~{dirflag},~{fpsr},~{flags}"( x86_fp80 %X) > + ret void > +} > + > +define void @test4(double %X) { > + call void asm sideeffect "frob ", > "{st(0)},~{dirflag},~{fpsr},~{flags}"( double %X) > + ret void > +} > + > +define void @test5(double %X) { > + %Y = add double %X, 123.0 > + call void asm sideeffect "frob ", > "{st(0)},~{dirflag},~{fpsr},~{flags}"( double %Y) > + ret void > +} > + > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From nicholas at mxc.ca Sun Mar 9 14:49:45 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 09 Mar 2008 12:49:45 -0700 Subject: [llvm-commits] [llvm] r47802 - in /llvm/trunk: include/llvm/BasicBlock.h include/llvm/Bitcode/LLVMBitCodes.h lib/AsmParser/LLLexer.cpp lib/AsmParser/llvmAsmParser.y lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Writer/BitcodeWriter.cpp lib/VMCore/AsmWriter.cpp lib/VMCore/BasicBlock.cpp test/Feature/unwindto.ll tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp In-Reply-To: <200803091352.48839.baldrick@free.fr> References: <200803020248.m222mBXH025353@zion.cs.uiuc.edu> <200803090951.07153.baldrick@free.fr> <47D3A64B.2070200@mxc.ca> <200803091352.48839.baldrick@free.fr> Message-ID: <47D43F59.30702@mxc.ca> Duncan Sands wrote: >>> entry: unwinds %target >>> >>> I don't much like the underscore... >> We've gone over a few options. If anyone feels strongly over it I'll be >> happy to make the change, but "unwinds" in particular is a mere typo >> away from the 'unwind' instruction. > > yes, it is one letter away, but does it matter? If you make the typo in > either direction (unwind -> unwinds, or unwinds -> unwind) then it looks > to me like it won't assemble, which is good: mistakes are caught. It would > be a problem if the result of the typo was silently accepted. It's more of a "learning LLVM syntax" problem than a compiler problem. How about: entry: unwinds to %target if we're up for adding 'unwinds' as a keyword? It won't be ambiguous with anything so we can drop the underscore. Sound reasonable? Nick From evan.cheng at apple.com Sun Mar 9 14:55:22 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Sun, 09 Mar 2008 19:55:22 -0000 Subject: [llvm-commits] [llvm] r48116 - /llvm/trunk/test/CodeGen/Alpha/mul5.ll Message-ID: <200803091955.m29JtNbP016796@zion.cs.uiuc.edu> Author: evancheng Date: Sun Mar 9 14:55:22 2008 New Revision: 48116 URL: http://llvm.org/viewvc/llvm-project?rev=48116&view=rev Log: Fix RUN line. Modified: llvm/trunk/test/CodeGen/Alpha/mul5.ll Modified: llvm/trunk/test/CodeGen/Alpha/mul5.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Alpha/mul5.ll?rev=48116&r1=48115&r2=48116&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Alpha/mul5.ll (original) +++ llvm/trunk/test/CodeGen/Alpha/mul5.ll Sun Mar 9 14:55:22 2008 @@ -1,5 +1,5 @@ ; Make sure this testcase does not use mulq -; RUN: llvm-as < %s | llvm-as | llc -march=alpha | \ +; RUN: llvm-as < %s | llc -march=alpha | \ ; RUN: not grep -i mul ; XFAIL: * From clattner at apple.com Sun Mar 9 15:02:18 2008 From: clattner at apple.com (Chris Lattner) Date: Sun, 9 Mar 2008 13:02:18 -0700 Subject: [llvm-commits] [llvm] r47802 - in /llvm/trunk: include/llvm/BasicBlock.h include/llvm/Bitcode/LLVMBitCodes.h lib/AsmParser/LLLexer.cpp lib/AsmParser/llvmAsmParser.y lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Writer/BitcodeWriter.cpp lib/VMCore/AsmWriter.cpp lib/VMCore/BasicBlock.cpp test/Feature/unwindto.ll tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp In-Reply-To: <47D43F59.30702@mxc.ca> References: <200803020248.m222mBXH025353@zion.cs.uiuc.edu> <200803090951.07153.baldrick@free.fr> <47D3A64B.2070200@mxc.ca> <200803091352.48839.baldrick@free.fr> <47D43F59.30702@mxc.ca> Message-ID: On Mar 9, 2008, at 12:49 PM, Nick Lewycky wrote: > Duncan Sands wrote: >>>> entry: unwinds %target >>>> >>>> I don't much like the underscore... >>> We've gone over a few options. If anyone feels strongly over it >>> I'll be >>> happy to make the change, but "unwinds" in particular is a mere typo >>> away from the 'unwind' instruction. >> >> yes, it is one letter away, but does it matter? If you make the >> typo in >> either direction (unwind -> unwinds, or unwinds -> unwind) then it >> looks >> to me like it won't assemble, which is good: mistakes are caught. >> It would >> be a problem if the result of the typo was silently accepted. > > It's more of a "learning LLVM syntax" problem than a compiler problem. > > How about: > > entry: unwinds to %target > > if we're up for adding 'unwinds' as a keyword? It won't be ambiguous > with anything so we can drop the underscore. Sound reasonable? I like this best! Great idea, -Chris From sabre at nondot.org Sun Mar 9 15:04:36 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 20:04:36 -0000 Subject: [llvm-commits] [llvm] r48117 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Message-ID: <200803092004.m29K4a1v017128@zion.cs.uiuc.edu> Author: lattner Date: Sun Mar 9 15:04:36 2008 New Revision: 48117 URL: http://llvm.org/viewvc/llvm-project?rev=48117&view=rev Log: remove an extraneous (and ugly) default argument, thanks Duncan. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=48117&r1=48116&r2=48117&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sun Mar 9 15:04:36 2008 @@ -3266,8 +3266,7 @@ } // Assemble the legal parts into the final value. - return getCopyFromParts(DAG, &Parts[0], NumParts, RegVT, ValueVT, - ISD::DELETED_NODE); + return getCopyFromParts(DAG, &Parts[0], NumParts, RegVT, ValueVT); } /// getCopyToRegs - Emit a series of CopyToReg nodes that copies the From sabre at nondot.org Sun Mar 9 15:12:45 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 20:12:45 -0000 Subject: [llvm-commits] [llvm] r48118 - /llvm/trunk/lib/Target/IA64/IA64RegisterInfo.td Message-ID: <200803092012.m29KCjVC017334@zion.cs.uiuc.edu> Author: lattner Date: Sun Mar 9 15:12:44 2008 New Revision: 48118 URL: http://llvm.org/viewvc/llvm-project?rev=48118&view=rev Log: make sure ar.pfs is in a register class, this fixes test/CodeGen/IA64/ret-0.ll Modified: llvm/trunk/lib/Target/IA64/IA64RegisterInfo.td Modified: llvm/trunk/lib/Target/IA64/IA64RegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64RegisterInfo.td?rev=48118&r1=48117&r2=48118&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64RegisterInfo.td (original) +++ llvm/trunk/lib/Target/IA64/IA64RegisterInfo.td Sun Mar 9 15:12:44 2008 @@ -418,8 +418,9 @@ r96, r97, r98, r99, r100, r101, r102, r103, r104, r105, r106, r107, r108, r109, r110, r111, r112, r113, r114, r115, r116, r117, r118, r119, + // last 17 are special (look down) r120, r121, r122, r123, r124, r125, r126, r127, - r0, r1, r2, r5, r12, r13, r22, rp]> // last 16 are special (look down) + r0, r1, r2, r5, r12, r13, r22, rp, AR_PFS]> { let MethodProtos = [{ iterator allocation_order_begin(const MachineFunction &MF) const; @@ -434,8 +435,9 @@ GRClass::iterator GRClass::allocation_order_end(const MachineFunction &MF) const { - int numReservedRegs=8;// the 8 special registers r0,r1,r2,r5,r12,r13 etc - + // the 9 special registers r0,r1,r2,r5,r12,r13 etc + int numReservedRegs=9; + // we also can't allocate registers for use as locals if they're already // required as 'out' registers numReservedRegs+=MF.getInfo()->outRegsUsed; From sabre at nondot.org Sun Mar 9 15:31:11 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 20:31:11 -0000 Subject: [llvm-commits] [llvm] r48119 - /llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp Message-ID: <200803092031.m29KVBlf017821@zion.cs.uiuc.edu> Author: lattner Date: Sun Mar 9 15:31:11 2008 New Revision: 48119 URL: http://llvm.org/viewvc/llvm-project?rev=48119&view=rev Log: cell really does support cross-regclass moves, because R3 is in lots of different regclasses, and the code is not consistent when it comes to value tracking. Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp?rev=48119&r1=48118&r2=48119&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp Sun Mar 9 15:31:11 2008 @@ -186,10 +186,15 @@ const TargetRegisterClass *DestRC, const TargetRegisterClass *SrcRC) const { - if (DestRC != SrcRC) { - cerr << "SPUInstrInfo::copyRegToReg(): DestRC != SrcRC not supported!\n"; - abort(); - } + // We support cross register class moves for our aliases, such as R3 in any + // reg class to any other reg class containing R3. This is required because + // we instruction select bitconvert i64 -> f64 as a noop for example, so our + // types have no specific meaning. + + //if (DestRC != SrcRC) { + // cerr << "SPUInstrInfo::copyRegToReg(): DestRC != SrcRC not supported!\n"; + // abort(); + //} if (DestRC == SPU::R8CRegisterClass) { BuildMI(MBB, MI, get(SPU::ORBIr8), DestReg).addReg(SrcReg).addImm(0); From idadesub at users.sourceforge.net Sun Mar 9 15:37:01 2008 From: idadesub at users.sourceforge.net (Erick Tryzelaar) Date: Sun, 9 Mar 2008 13:37:01 -0700 Subject: [llvm-commits] [PATCH] Add support for generating ocaml documentation. In-Reply-To: References: Message-ID: <1205095021-6143-1-git-send-email-idadesub@users.sourceforge.net> This replaces my previous patch by removing --enable-ocamldoc, since ocamldoc runs in just a couple seconds. It also adds a link on the main index.html. Anton on #llvm mentioned that updating the main website needs to go through cvs, but I can't figure out how to do that. Anyone have any tips? --- Makefile.config.in | 1 + autoconf/configure.ac | 1 + bindings/ocaml/Makefile | 5 +++++ bindings/ocaml/Makefile.ocaml | 7 +++++++ docs/Makefile | 41 +++++++++++++++++++++++++++++++++++------ docs/index.html | 5 +++++ 6 files changed, 54 insertions(+), 6 deletions(-) -------------- next part -------------- A non-text attachment was scrubbed... Name: 3e53824eeed038c18c7c55f9cb16fd2f2f8d6891.diff Type: text/x-patch Size: 4784 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080309/4f9c9579/attachment.bin From sabre at nondot.org Sun Mar 9 15:49:33 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 09 Mar 2008 20:49:33 -0000 Subject: [llvm-commits] [llvm] r48120 - /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Message-ID: <200803092049.m29KnXBR018330@zion.cs.uiuc.edu> Author: lattner Date: Sun Mar 9 15:49:33 2008 New Revision: 48120 URL: http://llvm.org/viewvc/llvm-project?rev=48120&view=rev Log: Darwin PPC64 indirect call target goes in X12, not R12. This fixes these two regression tests: test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=48120&r1=48119&r2=48120&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Sun Mar 9 15:49:33 2008 @@ -1973,9 +1973,10 @@ Chain = DAG.getNode(PPCISD::MTCTR, NodeTys, MTCTROps, 2+(InFlag.Val!=0)); InFlag = Chain.getValue(1); - // Copy the callee address into R12 on darwin. + // Copy the callee address into R12/X12 on darwin. if (isMachoABI) { - Chain = DAG.getCopyToReg(Chain, PPC::R12, Callee, InFlag); + unsigned Reg = Callee.getValueType() == MVT::i32 ? PPC::R12 : PPC::X12; + Chain = DAG.getCopyToReg(Chain, Reg, Callee, InFlag); InFlag = Chain.getValue(1); } From sabre at nondot.org Sun Mar 9 15:50:15 2008 From: sabre at nondot.org (Chris Lattner) Date: Sun, 9 Mar 2008 13:50:15 -0700 Subject: [llvm-commits] [llvm] r48107 - in /llvm/trunk: lib/CodeGen/SelectionDAG/ScheduleDAG.cpp lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/inline-asm-fpstack.ll In-Reply-To: References: <200803090915.m299FXSt007571@zion.cs.uiuc.edu> Message-ID: <42116F83-5348-4BAD-95B9-88E8D5C70C5C@nondot.org> On Mar 9, 2008, at 12:40 PM, Tanya Lattner wrote: > Chris, > > I think this patch is the one causing the test failures from last > night: > test/CodeGen/CellSPU/immed64.ll [DEJAGNU] > test/CodeGen/IA64/2005-08-22-LegalizerCrash.ll [DEJAGNU] > test/CodeGen/IA64/2005-10-29-shladd.ll [DEJAGNU] > test/CodeGen/IA64/ret-0.ll [DEJAGNU] > test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll [DEJAGNU] > test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll [DEJAGNU] Fixed, thanks for tracking this down. It turns out that this patch exposed a bunch of target specific bugs, which are good to be fixed. I apologize for the breakage! -Chris From asl at math.spbu.ru Sun Mar 9 17:24:04 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Sun, 09 Mar 2008 22:24:04 -0000 Subject: [llvm-commits] [llvm] r48121 - /llvm/trunk/test/C++Frontend/2006-11-06-StackTrace.cpp Message-ID: <200803092224.m29MO4dj021095@zion.cs.uiuc.edu> Author: asl Date: Sun Mar 9 17:24:03 2008 New Revision: 48121 URL: http://llvm.org/viewvc/llvm-project?rev=48121&view=rev Log: This works on x86_64 Modified: llvm/trunk/test/C++Frontend/2006-11-06-StackTrace.cpp Modified: llvm/trunk/test/C++Frontend/2006-11-06-StackTrace.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/C%2B%2BFrontend/2006-11-06-StackTrace.cpp?rev=48121&r1=48120&r2=48121&view=diff ============================================================================== --- llvm/trunk/test/C++Frontend/2006-11-06-StackTrace.cpp (original) +++ llvm/trunk/test/C++Frontend/2006-11-06-StackTrace.cpp Sun Mar 9 17:24:03 2008 @@ -9,8 +9,8 @@ // RUN: gdb -q -batch -n -x %t.in %t.exe | \ // RUN: grep {#7 0x.* in main.*(argc=\[12\],.*argv=.*)} -// Only works on ppc and x86. Should generalize? -// XFAIL: alpha|ia64|arm|x86_64|amd64 +// Only works on ppc, x86 and x86_64. Should generalize? +// XFAIL: alpha|ia64|arm #include From idadesub at users.sourceforge.net Sun Mar 9 18:08:14 2008 From: idadesub at users.sourceforge.net (Erick Tryzelaar) Date: Sun, 9 Mar 2008 16:08:14 -0700 Subject: [llvm-commits] [PATCH] Add bindings to Builder::getInsertBlock and BasicBlock::getParent. In-Reply-To: <> References: <> Message-ID: <1205104094-16818-1-git-send-email-idadesub@users.sourceforge.net> This exposes getInsertBlock and getParent to both the llvm-c and ocaml bindings. --- bindings/ocaml/llvm/llvm.ml | 6 ++++-- bindings/ocaml/llvm/llvm.mli | 9 +++++++++ bindings/ocaml/llvm/llvm_ocaml.c | 24 ++++++++++++++++++++++++ include/llvm-c/Core.h | 2 ++ lib/VMCore/Core.cpp | 8 ++++++++ test/Bindings/Ocaml/vmcore.ml | 14 ++++++++++++-- 6 files changed, 59 insertions(+), 4 deletions(-) -------------- next part -------------- A non-text attachment was scrubbed... Name: ad2272c666252be6a9cb9c7c6ec132ccd6b88e9a.diff Type: text/x-patch Size: 7326 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080309/1ae26e6e/attachment.bin From dalej at apple.com Sun Mar 9 21:17:23 2008 From: dalej at apple.com (Dale Johannesen) Date: Mon, 10 Mar 2008 02:17:23 -0000 Subject: [llvm-commits] [llvm] r48122 - in /llvm/trunk: include/llvm/CodeGen/CallingConvLower.h include/llvm/CodeGen/SelectionDAGNodes.h lib/CodeGen/SelectionDAG/CallingConvLower.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/PowerPC/PPCISelLowering.cpp lib/Target/X86/X86ISelLowering.cpp utils/TableGen/CallingConvEmitter.cpp Message-ID: <200803100217.m2A2HNZO027106@zion.cs.uiuc.edu> Author: johannes Date: Sun Mar 9 21:17:22 2008 New Revision: 48122 URL: http://llvm.org/viewvc/llvm-project?rev=48122&view=rev Log: Increase ISD::ParamFlags to 64 bits. Increase the ByValSize field to 32 bits, thus enabling correct handling of ByVal structs bigger than 0x1ffff. Abstract interface a bit. Fixes gcc.c-torture/execute/pr23135.c and gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing on ppc32, quietly producing wrong code on x86-32.) Modified: llvm/trunk/include/llvm/CodeGen/CallingConvLower.h llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/utils/TableGen/CallingConvEmitter.cpp Modified: llvm/trunk/include/llvm/CodeGen/CallingConvLower.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/CallingConvLower.h?rev=48122&r1=48121&r2=48122&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/CallingConvLower.h (original) +++ llvm/trunk/include/llvm/CodeGen/CallingConvLower.h Sun Mar 9 21:17:22 2008 @@ -17,6 +17,7 @@ #include "llvm/ADT/SmallVector.h" #include "llvm/CodeGen/ValueTypes.h" +#include "llvm/CodeGen/SelectionDAGNodes.h" namespace llvm { class TargetRegisterInfo; @@ -97,7 +98,7 @@ /// reflect the change. typedef bool CCAssignFn(unsigned ValNo, MVT::ValueType ValVT, MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo, - unsigned ArgFlags, CCState &State); + ISD::ParamFlags::ParamFlagsTy ArgFlags, CCState &State); /// CCState - This class holds information needed while lowering arguments and @@ -196,7 +197,8 @@ // parameter attribute. void HandleByVal(unsigned ValNo, MVT::ValueType ValVT, MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo, - int MinSize, int MinAlign, unsigned ArgFlags); + int MinSize, int MinAlign, + ISD::ParamFlags::ParamFlagsTy ArgFlags); private: /// MarkAllocated - Mark a register and all of its aliases as allocated. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=48122&r1=48121&r2=48122&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Sun Mar 9 21:17:22 2008 @@ -57,27 +57,29 @@ /// namespace ISD { namespace ParamFlags { - enum Flags { - NoFlagSet = 0, - ZExt = 1<<0, ///< Parameter should be zero extended - ZExtOffs = 0, - SExt = 1<<1, ///< Parameter should be sign extended - SExtOffs = 1, - InReg = 1<<2, ///< Parameter should be passed in register - InRegOffs = 2, - StructReturn = 1<<3, ///< Hidden struct-return pointer - StructReturnOffs = 3, - ByVal = 1<<4, ///< Struct passed by value - ByValOffs = 4, - Nest = 1<<5, ///< Parameter is nested function static chain - NestOffs = 5, - ByValAlign = 0xF << 6, //< The alignment of the struct - ByValAlignOffs = 6, - ByValSize = 0x1ffff << 10, //< The size of the struct - ByValSizeOffs = 10, - OrigAlignment = 0x1F<<27, - OrigAlignmentOffs = 27 - }; + typedef unsigned long long ParamFlagsTy; + + const ParamFlagsTy NoFlagSet = 0ULL; + const ParamFlagsTy ZExt = 1ULL<<0; ///< Zero extended + const ParamFlagsTy ZExtOffs = 0; + const ParamFlagsTy SExt = 1ULL<<1; ///< Sign extended + const ParamFlagsTy SExtOffs = 1; + const ParamFlagsTy InReg = 1ULL<<2; ///< Passed in register + const ParamFlagsTy InRegOffs = 2; + const ParamFlagsTy StructReturn = 1ULL<<3; ///< Hidden struct-ret ptr + const ParamFlagsTy StructReturnOffs = 3; + const ParamFlagsTy ByVal = 1ULL<<4; ///< Struct passed by value + const ParamFlagsTy ByValOffs = 4; + const ParamFlagsTy Nest = 1ULL<<5; ///< Nested fn static chain + const ParamFlagsTy NestOffs = 5; + const ParamFlagsTy ByValAlign = 0xFULL << 6; //< Struct alignment + const ParamFlagsTy ByValAlignOffs = 6; + const ParamFlagsTy OrigAlignment = 0x1FULL<<27; + const ParamFlagsTy OrigAlignmentOffs = 27; + const ParamFlagsTy ByValSize = 0xffffffffULL << 32; //< Struct size + const ParamFlagsTy ByValSizeOffs = 32; + + const ParamFlagsTy One = 1LL; //< 1 of this type, for shifts } //===--------------------------------------------------------------------===// Modified: llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp?rev=48122&r1=48121&r2=48122&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp Sun Mar 9 21:17:22 2008 @@ -35,7 +35,7 @@ void CCState::HandleByVal(unsigned ValNo, MVT::ValueType ValVT, MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo, int MinSize, int MinAlign, - unsigned ArgFlags) { + ISD::ParamFlags::ParamFlagsTy ArgFlags) { unsigned Align = 1 << ((ArgFlags & ISD::ParamFlags::ByValAlign) >> ISD::ParamFlags::ByValAlignOffs); unsigned Size = (ArgFlags & ISD::ParamFlags::ByValSize) >> @@ -66,7 +66,8 @@ for (unsigned i = 0; i != NumArgs; ++i) { MVT::ValueType ArgVT = TheArgs->getValueType(i); SDOperand FlagOp = TheArgs->getOperand(3+i); - unsigned ArgFlags = cast(FlagOp)->getValue(); + ISD::ParamFlags::ParamFlagsTy ArgFlags = + cast(FlagOp)->getValue(); if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { cerr << "Formal argument #" << i << " has unhandled type " << MVT::getValueTypeString(ArgVT) << "\n"; @@ -98,7 +99,8 @@ for (unsigned i = 0; i != NumOps; ++i) { MVT::ValueType ArgVT = TheCall->getOperand(5+2*i).getValueType(); SDOperand FlagOp = TheCall->getOperand(5+2*i+1); - unsigned ArgFlags =cast(FlagOp)->getValue(); + ISD::ParamFlags::ParamFlagsTy ArgFlags = + cast(FlagOp)->getValue(); if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { cerr << "Call operand #" << i << " has unhandled type " << MVT::getValueTypeString(ArgVT) << "\n"; Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=48122&r1=48121&r2=48122&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sun Mar 9 21:17:22 2008 @@ -4059,7 +4059,7 @@ for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; ++I, ++j) { MVT::ValueType VT = getValueType(I->getType()); - unsigned Flags = ISD::ParamFlags::NoFlagSet; + ISD::ParamFlags::ParamFlagsTy Flags = ISD::ParamFlags::NoFlagSet; unsigned OriginalAlignment = getTargetData()->getABITypeAlignment(I->getType()); @@ -4083,12 +4083,15 @@ // this info is not there but there are cases it cannot get right. if (F.getParamAlignment(j)) FrameAlign = Log2_32(F.getParamAlignment(j)); - Flags |= (FrameAlign << ISD::ParamFlags::ByValAlignOffs); - Flags |= (FrameSize << ISD::ParamFlags::ByValSizeOffs); + Flags |= ((ISD::ParamFlags::ParamFlagsTy)FrameAlign + << ISD::ParamFlags::ByValAlignOffs); + Flags |= ((ISD::ParamFlags::ParamFlagsTy)FrameSize + << ISD::ParamFlags::ByValSizeOffs); } if (F.paramHasAttr(j, ParamAttr::Nest)) Flags |= ISD::ParamFlags::Nest; - Flags |= (OriginalAlignment << ISD::ParamFlags::OrigAlignmentOffs); + Flags |= ((ISD::ParamFlags::ParamFlagsTy)OriginalAlignment + << ISD::ParamFlags::OrigAlignmentOffs); MVT::ValueType RegisterVT = getRegisterType(VT); unsigned NumRegs = getNumRegisters(VT); @@ -4097,8 +4100,8 @@ // if it isn't first piece, alignment must be 1 if (i > 0) Flags = (Flags & (~ISD::ParamFlags::OrigAlignment)) | - (1 << ISD::ParamFlags::OrigAlignmentOffs); - Ops.push_back(DAG.getConstant(Flags, MVT::i32)); + (ISD::ParamFlags::One << ISD::ParamFlags::OrigAlignmentOffs); + Ops.push_back(DAG.getConstant(Flags, MVT::i64)); } } @@ -4174,7 +4177,7 @@ for (unsigned i = 0, e = Args.size(); i != e; ++i) { MVT::ValueType VT = getValueType(Args[i].Ty); SDOperand Op = Args[i].Node; - unsigned Flags = ISD::ParamFlags::NoFlagSet; + ISD::ParamFlags::ParamFlagsTy Flags = ISD::ParamFlags::NoFlagSet; unsigned OriginalAlignment = getTargetData()->getABITypeAlignment(Args[i].Ty); @@ -4196,12 +4199,15 @@ // info is not there but there are cases it cannot get right. if (Args[i].Alignment) FrameAlign = Log2_32(Args[i].Alignment); - Flags |= (FrameAlign << ISD::ParamFlags::ByValAlignOffs); - Flags |= (FrameSize << ISD::ParamFlags::ByValSizeOffs); + Flags |= ((ISD::ParamFlags::ParamFlagsTy)FrameAlign + << ISD::ParamFlags::ByValAlignOffs); + Flags |= ((ISD::ParamFlags::ParamFlagsTy)FrameSize + << ISD::ParamFlags::ByValSizeOffs); } if (Args[i].isNest) Flags |= ISD::ParamFlags::Nest; - Flags |= OriginalAlignment << ISD::ParamFlags::OrigAlignmentOffs; + Flags |= ((ISD::ParamFlags::ParamFlagsTy)OriginalAlignment) + << ISD::ParamFlags::OrigAlignmentOffs; MVT::ValueType PartVT = getRegisterType(VT); unsigned NumParts = getNumRegisters(VT); @@ -4217,13 +4223,13 @@ for (unsigned i = 0; i != NumParts; ++i) { // if it isn't first piece, alignment must be 1 - unsigned MyFlags = Flags; + ISD::ParamFlags::ParamFlagsTy MyFlags = Flags; if (i != 0) MyFlags = (MyFlags & (~ISD::ParamFlags::OrigAlignment)) | - (1 << ISD::ParamFlags::OrigAlignmentOffs); + (ISD::ParamFlags::One << ISD::ParamFlags::OrigAlignmentOffs); Ops.push_back(Parts[i]); - Ops.push_back(DAG.getConstant(MyFlags, MVT::i32)); + Ops.push_back(DAG.getConstant(MyFlags, MVT::i64)); } } Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=48122&r1=48121&r2=48122&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Sun Mar 9 21:17:22 2008 @@ -368,12 +368,13 @@ HowToPassArgument(MVT::ValueType ObjectVT, unsigned NumGPRs, unsigned StackOffset, unsigned &NeededGPRs, unsigned &NeededStackSize, unsigned &GPRPad, - unsigned &StackPad, unsigned Flags) { + unsigned &StackPad, ISD::ParamFlags::ParamFlagsTy Flags) { NeededStackSize = 0; NeededGPRs = 0; StackPad = 0; GPRPad = 0; - unsigned align = (Flags >> ISD::ParamFlags::OrigAlignmentOffs); + unsigned align = ((Flags & ISD::ParamFlags::OrigAlignment) + >> ISD::ParamFlags::OrigAlignmentOffs); GPRPad = NumGPRs % ((align + 3)/4); StackPad = StackOffset % align; unsigned firstGPR = NumGPRs + GPRPad; @@ -422,7 +423,7 @@ unsigned StackPad; unsigned GPRPad; MVT::ValueType ObjectVT = Op.getOperand(5+2*i).getValueType(); - unsigned Flags = Op.getConstantOperandVal(5+2*i+1); + ISD::ParamFlags::ParamFlagsTy Flags = Op.getConstantOperandVal(5+2*i+1); HowToPassArgument(ObjectVT, NumGPRs, NumBytes, ObjGPRs, ObjSize, GPRPad, StackPad, Flags); NumBytes += ObjSize + StackPad; @@ -445,7 +446,7 @@ std::vector MemOpChains; for (unsigned i = 0; i != NumOps; ++i) { SDOperand Arg = Op.getOperand(5+2*i); - unsigned Flags = Op.getConstantOperandVal(5+2*i+1); + ISD::ParamFlags::ParamFlagsTy Flags = Op.getConstantOperandVal(5+2*i+1); MVT::ValueType ArgVT = Arg.getValueType(); unsigned ObjSize; @@ -924,7 +925,7 @@ unsigned ObjGPRs; unsigned GPRPad; unsigned StackPad; - unsigned Flags = Op.getConstantOperandVal(ArgNo + 3); + ISD::ParamFlags::ParamFlagsTy Flags = Op.getConstantOperandVal(ArgNo + 3); HowToPassArgument(ObjectVT, NumGPRs, ArgOffset, ObjGPRs, ObjSize, GPRPad, StackPad, Flags); NumGPRs += GPRPad; Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=48122&r1=48121&r2=48122&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Sun Mar 9 21:17:22 2008 @@ -1361,8 +1361,10 @@ MVT::ValueType ObjectVT = Op.getValue(ArgNo).getValueType(); unsigned ObjSize = MVT::getSizeInBits(ObjectVT)/8; unsigned ArgSize = ObjSize; - unsigned Flags = cast(Op.getOperand(ArgNo+3))->getValue(); - unsigned AlignFlag = 1 << ISD::ParamFlags::OrigAlignmentOffs; + ISD::ParamFlags::ParamFlagsTy Flags = + cast(Op.getOperand(ArgNo+3))->getValue(); + unsigned AlignFlag = ISD::ParamFlags::One + << ISD::ParamFlags::OrigAlignmentOffs; unsigned isByVal = Flags & ISD::ParamFlags::ByVal; // See if next argument requires stack alignment in ELF bool Expand = (ObjectVT == MVT::f64) || ((ArgNo + 1 < e) && @@ -1659,8 +1661,9 @@ /// does not fit in registers. static SDOperand CreateCopyOfByValArgument(SDOperand Src, SDOperand Dst, SDOperand Chain, - unsigned Flags, SelectionDAG &DAG, unsigned Size) { - unsigned Align = 1 << + ISD::ParamFlags::ParamFlagsTy Flags, + SelectionDAG &DAG, unsigned Size) { + unsigned Align = ISD::ParamFlags::One << ((Flags & ISD::ParamFlags::ByValAlign) >> ISD::ParamFlags::ByValAlignOffs); SDOperand AlignNode = DAG.getConstant(Align, MVT::i32); SDOperand SizeNode = DAG.getConstant(Size, MVT::i32); @@ -1693,7 +1696,8 @@ // Add up all the space actually used. for (unsigned i = 0; i != NumOps; ++i) { - unsigned Flags = cast(Op.getOperand(5+2*i+1))->getValue(); + ISD::ParamFlags::ParamFlagsTy Flags = + cast(Op.getOperand(5+2*i+1))->getValue(); unsigned ArgSize =MVT::getSizeInBits(Op.getOperand(5+2*i).getValueType())/8; if (Flags & ISD::ParamFlags::ByVal) ArgSize = (Flags & ISD::ParamFlags::ByValSize) >> @@ -1757,8 +1761,10 @@ for (unsigned i = 0; i != NumOps; ++i) { bool inMem = false; SDOperand Arg = Op.getOperand(5+2*i); - unsigned Flags = cast(Op.getOperand(5+2*i+1))->getValue(); - unsigned AlignFlag = 1 << ISD::ParamFlags::OrigAlignmentOffs; + ISD::ParamFlags::ParamFlagsTy Flags = + cast(Op.getOperand(5+2*i+1))->getValue(); + unsigned AlignFlag = ISD::ParamFlags::One << + ISD::ParamFlags::OrigAlignmentOffs; // See if next argument requires stack alignment in ELF unsigned next = 5+2*(i+1)+1; bool Expand = (Arg.getValueType() == MVT::f64) || ((i + 1 < NumOps) && Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=48122&r1=48121&r2=48122&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Mar 9 21:17:22 2008 @@ -1145,8 +1145,9 @@ /// parameter. static SDOperand CreateCopyOfByValArgument(SDOperand Src, SDOperand Dst, SDOperand Chain, - unsigned Flags, SelectionDAG &DAG) { - unsigned Align = 1 << + ISD::ParamFlags::ParamFlagsTy Flags, + SelectionDAG &DAG) { + unsigned Align = ISD::ParamFlags::One << ((Flags & ISD::ParamFlags::ByValAlign) >> ISD::ParamFlags::ByValAlignOffs); unsigned Size = (Flags & ISD::ParamFlags::ByValSize) >> ISD::ParamFlags::ByValSizeOffs; @@ -1162,7 +1163,8 @@ unsigned CC, SDOperand Root, unsigned i) { // Create the nodes corresponding to a load from this parameter slot. - unsigned Flags = cast(Op.getOperand(3 + i))->getValue(); + ISD::ParamFlags::ParamFlagsTy Flags = + cast(Op.getOperand(3 + i))->getValue(); bool AlwaysUseMutable = (CC==CallingConv::Fast) && PerformTailCallOpt; bool isByVal = Flags & ISD::ParamFlags::ByVal; bool isImmutable = !AlwaysUseMutable && !isByVal; @@ -1380,7 +1382,8 @@ SDOperand PtrOff = DAG.getIntPtrConstant(LocMemOffset); PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); SDOperand FlagsOp = Op.getOperand(6+2*VA.getValNo()); - unsigned Flags = cast(FlagsOp)->getValue(); + ISD::ParamFlags::ParamFlagsTy Flags = + cast(FlagsOp)->getValue(); if (Flags & ISD::ParamFlags::ByVal) { return CreateCopyOfByValArgument(Arg, PtrOff, Chain, Flags, DAG); } @@ -1642,7 +1645,8 @@ assert(VA.isMemLoc()); SDOperand Arg = Op.getOperand(5+2*VA.getValNo()); SDOperand FlagsOp = Op.getOperand(6+2*VA.getValNo()); - unsigned Flags = cast(FlagsOp)->getValue(); + ISD::ParamFlags::ParamFlagsTy Flags = + cast(FlagsOp)->getValue(); // Create frame index. int32_t Offset = VA.getLocMemOffset()+FPDiff; uint32_t OpSize = (MVT::getSizeInBits(VA.getLocVT())+7)/8; Modified: llvm/trunk/utils/TableGen/CallingConvEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CallingConvEmitter.cpp?rev=48122&r1=48121&r2=48122&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CallingConvEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/CallingConvEmitter.cpp Sun Mar 9 21:17:22 2008 @@ -30,7 +30,7 @@ << std::string(CCs[i]->getName().size()+13, ' ') << "MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo,\n" << std::string(CCs[i]->getName().size()+13, ' ') - << "unsigned ArgFlags, CCState &State);\n"; + << "ISD::ParamFlags::ParamFlagsTy ArgFlags, CCState &State);\n"; } // Emit each calling convention description in full. @@ -48,7 +48,7 @@ << std::string(CC->getName().size()+13, ' ') << "MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo,\n" << std::string(CC->getName().size()+13, ' ') - << "unsigned ArgFlags, CCState &State) {\n"; + << "ISD::ParamFlags::ParamFlagsTy ArgFlags, CCState &State) {\n"; // Emit all of the actions, in order. for (unsigned i = 0, e = CCActions->getSize(); i != e; ++i) { O << "\n"; From nicholas at mxc.ca Sun Mar 9 21:20:00 2008 From: nicholas at mxc.ca (Nick Lewycky) Date: Mon, 10 Mar 2008 02:20:00 -0000 Subject: [llvm-commits] [llvm] r48123 - in /llvm/trunk: lib/AsmParser/LLLexer.cpp lib/AsmParser/llvmAsmParser.y lib/Transforms/IPO/PruneEH.cpp lib/Transforms/Utils/CloneFunction.cpp lib/Transforms/Utils/CloneTrace.cpp lib/Transforms/Utils/SimplifyCFG.cpp lib/VMCore/AsmWriter.cpp test/Feature/unwindto.ll test/Transforms/Inline/unwindto.ll test/Transforms/PruneEH/unwindto.ll test/Transforms/SimplifyCFG/unwindto.ll Message-ID: <200803100220.m2A2K1Ob027210@zion.cs.uiuc.edu> Author: nicholas Date: Sun Mar 9 21:20:00 2008 New Revision: 48123 URL: http://llvm.org/viewvc/llvm-project?rev=48123&view=rev Log: Turn unwind_to into "unwinds to". Modified: llvm/trunk/lib/AsmParser/LLLexer.cpp llvm/trunk/lib/AsmParser/llvmAsmParser.y llvm/trunk/lib/Transforms/IPO/PruneEH.cpp llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp llvm/trunk/lib/Transforms/Utils/CloneTrace.cpp llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp llvm/trunk/lib/VMCore/AsmWriter.cpp llvm/trunk/test/Feature/unwindto.ll llvm/trunk/test/Transforms/Inline/unwindto.ll llvm/trunk/test/Transforms/PruneEH/unwindto.ll llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll Modified: llvm/trunk/lib/AsmParser/LLLexer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLLexer.cpp?rev=48123&r1=48122&r2=48123&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/LLLexer.cpp (original) +++ llvm/trunk/lib/AsmParser/LLLexer.cpp Sun Mar 9 21:20:00 2008 @@ -474,7 +474,7 @@ KEYWORD("asm", ASM_TOK); KEYWORD("sideeffect", SIDEEFFECT); KEYWORD("gc", GC); - KEYWORD("unwind_to", UNWIND_TO); + KEYWORD("unwinds", UNWINDS); KEYWORD("cc", CC_TOK); KEYWORD("ccc", CCC_TOK); Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y?rev=48123&r1=48122&r2=48123&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/llvmAsmParser.y (original) +++ llvm/trunk/lib/AsmParser/llvmAsmParser.y Sun Mar 9 21:20:00 2008 @@ -1064,7 +1064,7 @@ %token OPAQUE EXTERNAL TARGET TRIPLE ALIGN ADDRSPACE %token DEPLIBS CALL TAIL ASM_TOK MODULE SIDEEFFECT %token CC_TOK CCC_TOK FASTCC_TOK COLDCC_TOK X86_STDCALLCC_TOK X86_FASTCALLCC_TOK -%token DATALAYOUT UNWIND_TO +%token DATALAYOUT UNWINDS %type OptCallingConv %type OptParamAttrs ParamAttr %type OptFuncAttrs FuncAttr @@ -2569,8 +2569,8 @@ $$ = defineBBVal(ValID::createLocalID(CurFun.NextValNum), 0); CHECK_FOR_ERROR } - | UNWIND_TO ValueRef { // Only the unwind to block - $$ = defineBBVal(ValID::createLocalID(CurFun.NextValNum), getBBVal($2)); + | UNWINDS TO ValueRef { // Only the unwind to block + $$ = defineBBVal(ValID::createLocalID(CurFun.NextValNum), getBBVal($3)); CHECK_FOR_ERROR } | LABELSTR { // Labelled (named) basic block @@ -2578,8 +2578,8 @@ delete $1; CHECK_FOR_ERROR } - | LABELSTR UNWIND_TO ValueRef { - $$ = defineBBVal(ValID::createLocalName(*$1), getBBVal($3)); + | LABELSTR UNWINDS TO ValueRef { + $$ = defineBBVal(ValID::createLocalName(*$1), getBBVal($4)); delete $1; CHECK_FOR_ERROR }; Modified: llvm/trunk/lib/Transforms/IPO/PruneEH.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PruneEH.cpp?rev=48123&r1=48122&r2=48123&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/PruneEH.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/PruneEH.cpp Sun Mar 9 21:20:00 2008 @@ -32,7 +32,7 @@ STATISTIC(NumRemoved, "Number of invokes removed"); STATISTIC(NumUnreach, "Number of noreturn calls optimized"); -STATISTIC(NumBBUnwind, "Number of unwind_to removed from blocks"); +STATISTIC(NumBBUnwind, "Number of unwind dest removed from blocks"); namespace { struct VISIBILITY_HIDDEN PruneEH : public CallGraphSCCPass { Modified: llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp?rev=48123&r1=48122&r2=48123&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp Sun Mar 9 21:20:00 2008 @@ -105,7 +105,7 @@ // for (Function::iterator BB = cast(ValueMap[OldFunc->begin()]), BE = NewFunc->end(); BB != BE; ++BB) { - // Fix up the unwind_to label. + // Fix up the unwind destination. if (BasicBlock *UnwindDest = BB->getUnwindDest()) BB->setUnwindDest(cast(ValueMap[UnwindDest])); Modified: llvm/trunk/lib/Transforms/Utils/CloneTrace.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CloneTrace.cpp?rev=48123&r1=48122&r2=48123&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CloneTrace.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CloneTrace.cpp Sun Mar 9 21:20:00 2008 @@ -69,7 +69,7 @@ for (std::vector::const_iterator BB = clonedTrace.begin(), BE = clonedTrace.end(); BB != BE; ++BB) { - //Remap the unwind_to label + //Remap the unwind destination if (BasicBlock *UnwindDest = (*BB)->getUnwindDest()) (*BB)->setUnwindDest(cast(ValueMap[UnwindDest])); Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=48123&r1=48122&r2=48123&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Sun Mar 9 21:20:00 2008 @@ -1829,7 +1829,7 @@ // Move all definitions in the successor to the predecessor. OnlyPred->getInstList().splice(OnlyPred->end(), BB->getInstList()); - // Move the unwind_to block + // Move the unwind destination block if (!OnlyPred->getUnwindDest() && BB->getUnwindDest()) OnlyPred->setUnwindDest(BB->getUnwindDest()); Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AsmWriter.cpp?rev=48123&r1=48122&r2=48123&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/AsmWriter.cpp (original) +++ llvm/trunk/lib/VMCore/AsmWriter.cpp Sun Mar 9 21:20:00 2008 @@ -1169,7 +1169,7 @@ if (BB->hasName()) Out << ' '; - Out << "unwind_to"; + Out << "unwinds to"; writeOperand(unwindDest, false); } Modified: llvm/trunk/test/Feature/unwindto.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Feature/unwindto.ll?rev=48123&r1=48122&r2=48123&view=diff ============================================================================== --- llvm/trunk/test/Feature/unwindto.ll (original) +++ llvm/trunk/test/Feature/unwindto.ll Sun Mar 9 21:20:00 2008 @@ -4,7 +4,7 @@ ; http://nondot.org/sabre/LLVMNotes/ExceptionHandlingChanges.txt define i1 @test1(i8 %i, i8 %j) { -entry: unwind_to %target +entry: unwinds to %target %tmp = sub i8 %i, %j ; [#uses=1] %b = icmp eq i8 %tmp, 0 ; [#uses=1] ret i1 %b @@ -15,7 +15,7 @@ define i1 @test2(i8 %i, i8 %j) { entry: br label %0 -unwind_to %1 +unwinds to %1 %tmp = sub i8 %i, %j ; [#uses=1] %b = icmp eq i8 %tmp, 0 ; [#uses=1] ret i1 %b @@ -26,11 +26,11 @@ define i1 @test3(i8 %i, i8 %j) { entry: br label %0 -unwind_to %1 +unwinds to %1 %tmp = sub i8 %i, %j ; [#uses=1] %b = icmp eq i8 %tmp, 0 ; [#uses=1] ret i1 %b -unwind_to %0 +unwinds to %0 ret i1 false } @@ -38,7 +38,7 @@ %tmp = sub i8 %i, %j ; [#uses=1] %b = icmp eq i8 %tmp, 0 ; [#uses=1] br label %1 -unwind_to %1 +unwinds to %1 ret i1 false } @@ -49,16 +49,16 @@ define void @test6() { entry: br label %unwind -unwind: unwind_to %unwind +unwind: unwinds to %unwind unwind } define i8 @test7(i1 %b) { -entry: unwind_to %cleanup +entry: unwinds to %cleanup br i1 %b, label %cond_true, label %cond_false -cond_true: unwind_to %cleanup +cond_true: unwinds to %cleanup br label %cleanup -cond_false: unwind_to %cleanup +cond_false: unwinds to %cleanup br label %cleanup cleanup: %x = phi i8 [0, %entry], [1, %cond_true], [1, %cond_true], Modified: llvm/trunk/test/Transforms/Inline/unwindto.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/unwindto.ll?rev=48123&r1=48122&r2=48123&view=diff ============================================================================== --- llvm/trunk/test/Transforms/Inline/unwindto.ll (original) +++ llvm/trunk/test/Transforms/Inline/unwindto.ll Sun Mar 9 21:20:00 2008 @@ -5,7 +5,7 @@ } define i32 @f1() { -entry: unwind_to %cleanup +entry: unwinds to %cleanup call void @g() ret i32 0 cleanup: Modified: llvm/trunk/test/Transforms/PruneEH/unwindto.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/PruneEH/unwindto.ll?rev=48123&r1=48122&r2=48123&view=diff ============================================================================== --- llvm/trunk/test/Transforms/PruneEH/unwindto.ll (original) +++ llvm/trunk/test/Transforms/PruneEH/unwindto.ll Sun Mar 9 21:20:00 2008 @@ -1,11 +1,11 @@ -; RUN: llvm-as < %s | opt -prune-eh | llvm-dis | not grep unwind_to +; RUN: llvm-as < %s | opt -prune-eh | llvm-dis | not grep {unwinds to} define i8 @test7(i1 %b) { -entry: unwind_to %cleanup +entry: unwinds to %cleanup br i1 %b, label %cond_true, label %cond_false -cond_true: unwind_to %cleanup +cond_true: unwinds to %cleanup br label %cleanup -cond_false: unwind_to %cleanup +cond_false: unwinds to %cleanup br label %cleanup cleanup: %x = phi i8 [0, %entry], [1, %cond_true], [1, %cond_true], Modified: llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll?rev=48123&r1=48122&r2=48123&view=diff ============================================================================== --- llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll (original) +++ llvm/trunk/test/Transforms/SimplifyCFG/unwindto.ll Sun Mar 9 21:20:00 2008 @@ -1,14 +1,14 @@ -; RUN: llvm-as < %s | opt -simplifycfg | llvm-dis | grep unwind_to | count 3 +; RUN: llvm-as < %s | opt -simplifycfg | llvm-dis | grep {unwinds to} | count 3 declare void @g(i32) define i32 @f1() { entry: br label %bb1 -bb1: unwind_to %cleanup1 +bb1: unwinds to %cleanup1 call void @g(i32 0) br label %bb2 -bb2: unwind_to %cleanup2 +bb2: unwinds to %cleanup2 call void @g(i32 1) br label %exit exit: @@ -20,22 +20,22 @@ } define i32 @f2() { -entry: unwind_to %cleanup +entry: unwinds to %cleanup br label %bb1 -bb1: unwind_to %cleanup +bb1: unwinds to %cleanup br label %bb2 -bb2: unwind_to %cleanup +bb2: unwinds to %cleanup br label %bb3 bb3: br label %bb4 -bb4: unwind_to %cleanup +bb4: unwinds to %cleanup ret i32 0 cleanup: ret i32 1 } define i32 @f3() { -entry: unwind_to %cleanup +entry: unwinds to %cleanup call void @g(i32 0) ret i32 0 cleanup: @@ -43,7 +43,7 @@ } define i32 @f4() { -entry: unwind_to %cleanup +entry: unwinds to %cleanup call void @g(i32 0) br label %cleanup cleanup: @@ -51,7 +51,7 @@ } define i32 @f5() { -entry: unwind_to %cleanup +entry: unwinds to %cleanup call void @g(i32 0) br label %other other: From evan.cheng at apple.com Sun Mar 9 21:50:04 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Sun, 9 Mar 2008 19:50:04 -0700 Subject: [llvm-commits] [llvm] r48121 - /llvm/trunk/test/C++Frontend/2006-11-06-StackTrace.cpp In-Reply-To: <200803092224.m29MO4dj021095@zion.cs.uiuc.edu> References: <200803092224.m29MO4dj021095@zion.cs.uiuc.edu> Message-ID: <52B16B58-FB9F-46F2-8211-10E681A5606B@apple.com> Hrm. Last time I (and Dan) checked this doesn't work on x86-64 Mac OS X. Has something changed? If so, good! :-) Evan On Mar 9, 2008, at 3:24 PM, Anton Korobeynikov wrote: > Author: asl > Date: Sun Mar 9 17:24:03 2008 > New Revision: 48121 > > URL: http://llvm.org/viewvc/llvm-project?rev=48121&view=rev > Log: > This works on x86_64 > > Modified: > llvm/trunk/test/C++Frontend/2006-11-06-StackTrace.cpp > > Modified: llvm/trunk/test/C++Frontend/2006-11-06-StackTrace.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/C%2B%2BFrontend/2006-11-06-StackTrace.cpp?rev=48121&r1=48120&r2=48121&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/test/C++Frontend/2006-11-06-StackTrace.cpp (original) > +++ llvm/trunk/test/C++Frontend/2006-11-06-StackTrace.cpp Sun Mar 9 > 17:24:03 2008 > @@ -9,8 +9,8 @@ > // RUN: gdb -q -batch -n -x %t.in %t.exe | \ > // RUN: grep {#7 0x.* in main.*(argc=\[12\],.*argv=.*)} > > -// Only works on ppc and x86. Should generalize? > -// XFAIL: alpha|ia64|arm|x86_64|amd64 > +// Only works on ppc, x86 and x86_64. Should generalize? > +// XFAIL: alpha|ia64|arm > > #include > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From echristo at apple.com Sun Mar 9 23:06:14 2008 From: echristo at apple.com (Eric Christopher) Date: Sun, 09 Mar 2008 21:06:14 -0700 Subject: [llvm-commits] [llvm] r48042 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/ test/CodeGen/X86/ In-Reply-To: References: <200803080058.m280wdoN000645@zion.cs.uiuc.edu> Message-ID: <7876FD8D-CABB-49D2-B01F-843C92F539B5@apple.com> Awesome. -eric On Mar 9, 2008, at 12:26 PM, Evan Cheng wrote: > Yes. > > Evan > > On Mar 7, 2008, at 5:02 PM, Eric Christopher wrote: > >> >> On Mar 7, 2008, at 4:58 PM, Evan Cheng wrote: >> >>> Implement x86 support for @llvm.prefetch. It corresponds to >>> prefetcht{0|1|2} and prefetchnta instructions. >> >> Nifty, this hooked into __builtin_prefetch ? >> >> -eric >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From christopher.lamb at gmail.com Sun Mar 9 23:13:41 2008 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Mon, 10 Mar 2008 04:13:41 -0000 Subject: [llvm-commits] [llvm] r48125 - in /llvm/trunk/utils/TableGen: CodeGenDAGPatterns.cpp CodeGenInstruction.cpp Message-ID: <200803100413.m2A4Df2E030100@zion.cs.uiuc.edu> Author: clamb Date: Sun Mar 9 23:13:41 2008 New Revision: 48125 URL: http://llvm.org/viewvc/llvm-project?rev=48125&view=rev Log: Add support in TableGen for unknown operands that infer their type from the pattern their used in. This will be used to allow insert/extract subreg patterns in .td files! Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp?rev=48125&r1=48124&r2=48125&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp (original) +++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp Sun Mar 9 23:13:41 2008 @@ -864,7 +864,7 @@ CDP.getTargetInfo().getInstruction(getOperator()->getName()); // Apply the result type to the node if (NumResults == 0 || InstInfo.NumDefs == 0) { - MadeChange = UpdateNodeType(MVT::isVoid, TP); + MadeChange = UpdateNodeType(MVT::isVoid, TP); } else { Record *ResultNode = Inst.getResult(0); @@ -872,6 +872,10 @@ std::vector VT; VT.push_back(MVT::iPTR); MadeChange = UpdateNodeType(VT, TP); + } else if (ResultNode->getName() == "unknown") { + std::vector VT; + VT.push_back(MVT::isUnknown); + MadeChange = UpdateNodeType(VT, TP); } else { assert(ResultNode->isSubClassOf("RegisterClass") && "Operands should be register classes!"); @@ -910,14 +914,16 @@ MadeChange |= Child->UpdateNodeType(VT, TP); } else if (OperandNode->getName() == "ptr_rc") { MadeChange |= Child->UpdateNodeType(MVT::iPTR, TP); + } else if (OperandNode->getName() == "unknown") { + MadeChange |= Child->UpdateNodeType(MVT::isUnknown, TP); } else { assert(0 && "Unknown operand type!"); abort(); } MadeChange |= Child->ApplyTypeConstraints(TP, NotRegisters); } - - if (ChildNo != getNumChildren()) + + if (ChildNo != getNumChildren() && !InstInfo.isVariadic) TP.error("Instruction '" + getOperator()->getName() + "' was provided too many operands!"); Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=48125&r1=48124&r2=48125&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original) +++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Sun Mar 9 23:13:41 2008 @@ -163,7 +163,7 @@ isVariadic = true; continue; } else if (!Rec->isSubClassOf("RegisterClass") && - Rec->getName() != "ptr_rc") + Rec->getName() != "ptr_rc" && Rec->getName() != "unknown") throw "Unknown operand class '" + Rec->getName() + "' in instruction '" + R->getName() + "' instruction!"; From christopher.lamb at gmail.com Sun Mar 9 23:16:09 2008 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Mon, 10 Mar 2008 04:16:09 -0000 Subject: [llvm-commits] [llvm] r48126 - /llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp Message-ID: <200803100416.m2A4GAY0030206@zion.cs.uiuc.edu> Author: clamb Date: Sun Mar 9 23:16:09 2008 New Revision: 48126 URL: http://llvm.org/viewvc/llvm-project?rev=48126&view=rev Log: Revert accidentally committed local changes. Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp?rev=48126&r1=48125&r2=48126&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp (original) +++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp Sun Mar 9 23:16:09 2008 @@ -864,7 +864,7 @@ CDP.getTargetInfo().getInstruction(getOperator()->getName()); // Apply the result type to the node if (NumResults == 0 || InstInfo.NumDefs == 0) { - MadeChange = UpdateNodeType(MVT::isVoid, TP); + MadeChange = UpdateNodeType(MVT::isVoid, TP); } else { Record *ResultNode = Inst.getResult(0); @@ -923,7 +923,7 @@ MadeChange |= Child->ApplyTypeConstraints(TP, NotRegisters); } - if (ChildNo != getNumChildren() && !InstInfo.isVariadic) + if (ChildNo != getNumChildren()) TP.error("Instruction '" + getOperator()->getName() + "' was provided too many operands!"); From christopher.lamb at gmail.com Sun Mar 9 23:28:03 2008 From: christopher.lamb at gmail.com (Christopher Lamb) Date: Sun, 9 Mar 2008 21:28:03 -0700 Subject: [llvm-commits] [llvm] r47658 - in /llvm/trunk: lib/Target/X86/README-X86-64.txt lib/Target/X86/X86Instr64bit.td test/CodeGen/X86/x86-64-and-mask.ll In-Reply-To: <76820C32-34B8-420A-997C-46CB591DA46E@apple.com> References: <200802270547.m1R5ls0N001359@zion.cs.uiuc.edu> <76820C32-34B8-420A-997C-46CB591DA46E@apple.com> Message-ID: <4450BAA6-789F-4688-A998-39F41ACC16DB@gmail.com> I've prepared a change locally that allows you to write the following: // r & (2^32-1) def : Pat<(and GR64:$src, i64immFFFFFFFF), (INSERT_SUBREG x86_impl_val_zero, (MOV32rr (EXTRACT_SUBREG GR64:$src, x86_subreg_32bit)), x86_subreg_32bit)>; On Mar 8, 2008, at 2:18 PM, Chris Lattner wrote: > One very simple and nice thing we could do is replace the > duplicated instruction with a Pat pattern. This would mean that > there is only one instruction and the magic just happens in the > isel. This would give us something like this: > > def : Pat<(and GR64:$src, i64immFFFFFFFF), > (x86_64_bit_part_of_32_bit > (MOV32rr (subreg GR64:$src, x86_32bit_part_of_64bit)))>; > > This puts more pressure on the coalescer to coalesce away the > copies, but seems like an overall better solution. Is this the > sort of thing you mean? -- Christopher Lamb -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20080309/1834988e/attachment.html