From isanbard at gmail.com  Mon Jul  7 00:42:27 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 07 Jul 2008 05:42:27 -0000
Subject: [llvm-commits] [llvm] r53166 -
	/llvm/trunk/lib/CodeGen/MachineLICM.cpp
Message-ID: <200807070542.m675gRKc002356@zion.cs.uiuc.edu>

Author: void
Date: Mon Jul  7 00:42:27 2008
New Revision: 53166

URL: http://llvm.org/viewvc/llvm-project?rev=53166&view=rev
Log:
Prevent option name conflict.

Modified:
    llvm/trunk/lib/CodeGen/MachineLICM.cpp

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=53166&r1=53165&r2=53166&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Mon Jul  7 00:42:27 2008
@@ -154,7 +154,7 @@
 
 char MachineLICM::ID = 0;
 static RegisterPass<MachineLICM>
-X("machine-licm", "Machine Loop Invariant Code Motion");
+X("machinelicm", "Machine Loop Invariant Code Motion");
 
 FunctionPass *llvm::createMachineLICMPass() { return new MachineLICM(); }
 




From nicholas at mxc.ca  Mon Jul  7 01:15:50 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Mon, 07 Jul 2008 06:15:50 -0000
Subject: [llvm-commits] [llvm] r53167 -
	/llvm/trunk/lib/Analysis/ScalarEvolution.cpp
Message-ID: <200807070615.m676FoKg003319@zion.cs.uiuc.edu>

Author: nicholas
Date: Mon Jul  7 01:15:49 2008
New Revision: 53167

URL: http://llvm.org/viewvc/llvm-project?rev=53167&view=rev
Log:
Handle 'lshr' instruction with SCEVUDiv object.
Comment the xor %x, -1 case.

Modified:
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=53167&r1=53166&r2=53167&view=diff

==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Mon Jul  7 01:15:49 2008
@@ -1742,12 +1742,14 @@
     }
     break;
   case Instruction::Xor:
-    // If the RHS of the xor is a signbit, then this is just an add.
-    // Instcombine turns add of signbit into xor as a strength reduction step.
     if (ConstantInt *CI = dyn_cast<ConstantInt>(U->getOperand(1))) {
+      // If the RHS of the xor is a signbit, then this is just an add.
+      // Instcombine turns add of signbit into xor as a strength reduction step.
       if (CI->getValue().isSignBit())
         return SE.getAddExpr(getSCEV(U->getOperand(0)),
                              getSCEV(U->getOperand(1)));
+
+      // If the RHS of xor is -1, then this is a not operation.
       else if (CI->isAllOnesValue())
         return SE.getNotSCEV(getSCEV(U->getOperand(0)));
     }
@@ -1763,6 +1765,16 @@
     }
     break;
 
+  case Instruction::LShr:
+    // Turn logical shift right of a constant into a unsigned divide.
+    if (ConstantInt *SA = dyn_cast<ConstantInt>(U->getOperand(1))) {
+      uint32_t BitWidth = cast<IntegerType>(V->getType())->getBitWidth();
+      Constant *X = ConstantInt::get(
+        APInt(BitWidth, 1).shl(SA->getLimitedValue(BitWidth)));
+      return SE.getUDivExpr(getSCEV(U->getOperand(0)), getSCEV(X));
+    }
+    break;
+
   case Instruction::Trunc:
     return SE.getTruncateExpr(getSCEV(U->getOperand(0)), U->getType());
 




From evan.cheng at apple.com  Mon Jul  7 02:18:09 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 07 Jul 2008 07:18:09 -0000
Subject: [llvm-commits] [llvm] r53169 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Message-ID: <200807070718.m677I9iq005572@zion.cs.uiuc.edu>

Author: evancheng
Date: Mon Jul  7 02:18:09 2008
New Revision: 53169

URL: http://llvm.org/viewvc/llvm-project?rev=53169&view=rev
Log:
LegalizeSetCCOperands should legalize the result of ExpandLibCall. Patch by Richard Osborne.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=53169&r1=53168&r2=53169&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Jul  7 02:18:09 2008
@@ -4743,7 +4743,7 @@
         Tmp1 = DAG.getNode(ISD::OR, Tmp1.getValueType(), Tmp1, Tmp2);
         Tmp2 = SDOperand();
       }
-      LHS = Tmp1;
+      LHS = LegalizeOp(Tmp1);
       RHS = Tmp2;
       return;
     }




From baldrick at free.fr  Mon Jul  7 02:44:29 2008
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 7 Jul 2008 09:44:29 +0200
Subject: [llvm-commits] [llvm] r53166 -
	/llvm/trunk/lib/CodeGen/MachineLICM.cpp
In-Reply-To: <200807070542.m675gRKc002356@zion.cs.uiuc.edu>
References: <200807070542.m675gRKc002356@zion.cs.uiuc.edu>
Message-ID: <200807070944.30374.baldrick@free.fr>

Hi Bill,

> Prevent option name conflict.

is it possible to have the options machinery catch
this kind of thing automatically?

Ciao,

Duncan.


From isanbard at gmail.com  Mon Jul  7 03:29:31 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 7 Jul 2008 01:29:31 -0700
Subject: [llvm-commits] [llvm] r53166 -
	/llvm/trunk/lib/CodeGen/MachineLICM.cpp
In-Reply-To: <200807070944.30374.baldrick@free.fr>
References: <200807070542.m675gRKc002356@zion.cs.uiuc.edu>
	<200807070944.30374.baldrick@free.fr>
Message-ID: <C1994166-95A5-48A8-8235-0C0544C096A8@gmail.com>

On Jul 7, 2008, at 12:44 AM, Duncan Sands wrote:

> Hi Bill,
>
>> Prevent option name conflict.
>
> is it possible to have the options machinery catch
> this kind of thing automatically?
>
I've never looked at it, so can't say. I'd suspect that there would be  
a way, though.

-bw



From duncan.sands at math.u-psud.fr  Mon Jul  7 05:05:36 2008
From: duncan.sands at math.u-psud.fr (Duncan Sands)
Date: Mon, 7 Jul 2008 12:05:36 +0200
Subject: [llvm-commits]
 =?iso-8859-1?q?=5Bllvm=5D_r53035_-_in_/llvm/trunk?=
 =?iso-8859-1?q?=3A_include/llvm/CodeGen/SelectionDAG=2Eh=09lib/CodeGen/Se?=
 =?iso-8859-1?q?lectionDAG/LegalizeDAG=2Ecpp_lib/CodeGen/SelectionDAG/Sele?=
 =?iso-8859-1?q?ctionDAG=2Ecpp_lib/CodeGen/SelectionDAG/SelectionDAGISel?=
 =?iso-8859-1?q?=2Ecpp_lib/Target/ARM/ARMISelLowering=2Ecpp=09lib/Target/C?=
 =?iso-8859-1?q?ellSPU/SPUISelLowering=2Ecpp_lib/Target/PowerPC/PPCISelLow?=
 =?iso-8859-1?q?ering=2Ecpp=09lib/Target/Sparc/SparcISelLowering=2Ecpp_lib?=
 =?iso-8859-1?q?/Target/X86/X86ISelLowering=2Ecpp?=
In-Reply-To: <12DE7596-F9DA-4A63-9825-F6778882F33E@apple.com>
References: <200807021741.m62Hf7YB019514@zion.cs.uiuc.edu>
	<200807042041.02925.duncan.sands@math.u-psud.fr>
	<12DE7596-F9DA-4A63-9825-F6778882F33E@apple.com>
Message-ID: <200807071205.36771.duncan.sands@math.u-psud.fr>

Hi Mon Ping,

> I ran into the problem when I was playing with "widening*" vector  
> types.  It is something I haven't submitted a patch for so my test  
> case will not work for you at this point.   What problem do you think  
> will occur in LegalizeTypes? If you can let me know, I can do a quick  
> look into it.

in LegalizeTypes.cpp you can find DAGTypeLegalizer::CreateStackStoreLoad.
It seems to me that the created stack object should have the best alignment
of the two types, in order to avoid unaligned loads/stores.  I think the
right thing to do is to audit every use of CreateStackTemporary looking for
similar problems.

Ciao,

Duncan.


From kremenek at apple.com  Mon Jul  7 11:20:55 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Mon, 07 Jul 2008 16:20:55 -0000
Subject: [llvm-commits] [llvm] r53171 -
	/llvm/trunk/include/llvm/ADT/ImmutableMap.h
Message-ID: <200807071620.m67GKu1o001033@zion.cs.uiuc.edu>

Author: kremenek
Date: Mon Jul  7 11:20:55 2008
New Revision: 53171

URL: http://llvm.org/viewvc/llvm-project?rev=53171&view=rev
Log:
Removed ImmutableMap::SlimFind and replaced it with ImmutableMap::lookup.  The new method does the same thing, except that it returns a pointer to the mapped data type, and not to an internal tree node.

Modified:
    llvm/trunk/include/llvm/ADT/ImmutableMap.h

Modified: llvm/trunk/include/llvm/ADT/ImmutableMap.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ImmutableMap.h?rev=53171&r1=53170&r2=53171&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/ImmutableMap.h (original)
+++ llvm/trunk/include/llvm/ADT/ImmutableMap.h Mon Jul  7 11:20:55 2008
@@ -194,17 +194,15 @@
   iterator begin() const { return iterator(Root); }
   iterator end() const { return iterator(); }  
   
-  TreeTy* SlimFind(key_type_ref K) const {
+  data_type* lookup(key_type_ref K) const {
     if (Root) {
       TreeTy* T = Root->find(K);
-      if (T) return T;
+      if (T) return &T->getValue().second;
     }
     
-    return NULL;
+    return 0;
   }
   
-  // FIXME: Add 'find' that returns an iterator instead of a TreeTy*.
-  
   //===--------------------------------------------------===//    
   // Utility methods.
   //===--------------------------------------------------===//  




From evan.cheng at apple.com  Mon Jul  7 12:19:41 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 7 Jul 2008 10:19:41 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53113 -
	/llvm-gcc-4.2/trunk/gcc/config/darwin.h
In-Reply-To: <FEB3885B-4F4E-420C-9E83-4B9FDF41DC89@apple.com>
References: <200807032209.m63M9OE7026032@zion.cs.uiuc.edu>
	<FEF76249-0703-46A4-A868-31AE63791019@apple.com>
	<FEB3885B-4F4E-420C-9E83-4B9FDF41DC89@apple.com>
Message-ID: <549A4A0A-7767-4A93-988F-FDF2CE0FEF85@apple.com>

It would be nice if someone with configure foo can help with this.  
Perhaps Eric?

Thanks,

Evan

On Jul 4, 2008, at 7:12 PM, Devang Patel wrote:

>
> On Jul 4, 2008, at 12:01 AM, Evan Cheng wrote:
>
>> Hi Devang,
>>
>> Does this work for older Mac OS X ld? That is, would older ld  
>> silently
>> ignore the options?
>
>
> GCC drive does not know about ld versions. The older linker will
> complain and fail. This is a debugging aid for compiler folks. Feel
> free to add configure test to check whether linker supports this flag
> or not. I think, that is unnecessary but I'll not stop anyone :)
> -
> Devang
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From gohman at apple.com  Mon Jul  7 12:46:23 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 17:46:23 -0000
Subject: [llvm-commits] [llvm] r53177 - in /llvm/trunk:
 include/llvm/ADT/DenseMap.h include/llvm/ADT/DenseSet.h
 lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 lib/CodeGen/SelectionDAG/ScheduleDAG.cpp lib/Linker/LinkModules.cpp
 lib/Target/X86/X86InstrInfo.cpp
 lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200807071746.m67HkOWv003793@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 12:46:23 2008
New Revision: 53177

URL: http://llvm.org/viewvc/llvm-project?rev=53177&view=rev
Log:
Make DenseMap's insert return a pair, to more closely resemble std::map.

Modified:
    llvm/trunk/include/llvm/ADT/DenseMap.h
    llvm/trunk/include/llvm/ADT/DenseSet.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
    llvm/trunk/lib/Linker/LinkModules.cpp
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/include/llvm/ADT/DenseMap.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/DenseMap.h?rev=53177&r1=53176&r2=53177&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/DenseMap.h (original)
+++ llvm/trunk/include/llvm/ADT/DenseMap.h Mon Jul  7 12:46:23 2008
@@ -147,14 +147,16 @@
     return end();
   }
   
-  bool insert(const std::pair<KeyT, ValueT> &KV) {
+  std::pair<iterator, bool> insert(const std::pair<KeyT, ValueT> &KV) {
     BucketT *TheBucket;
     if (LookupBucketFor(KV.first, TheBucket))
-      return false; // Already in map.
+      return std::make_pair(iterator(TheBucket, Buckets+NumBuckets),
+                            false); // Already in map.
     
     // Otherwise, insert the new element.
-    InsertIntoBucket(KV.first, KV.second, TheBucket);
-    return true;
+    TheBucket = InsertIntoBucket(KV.first, KV.second, TheBucket);
+    return std::make_pair(iterator(TheBucket, Buckets+NumBuckets),
+                          true);
   }
   
   bool erase(const KeyT &Val) {

Modified: llvm/trunk/include/llvm/ADT/DenseSet.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/DenseSet.h?rev=53177&r1=53176&r2=53177&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/DenseSet.h (original)
+++ llvm/trunk/include/llvm/ADT/DenseSet.h Mon Jul  7 12:46:23 2008
@@ -41,10 +41,6 @@
     return TheMap.count(V);
   }
   
-  bool insert(const ValueT &V) {
-    return TheMap.insert(std::make_pair(V, 0));
-  }
-  
   void erase(const ValueT &V) {
     TheMap.erase(V);
   }
@@ -90,6 +86,10 @@
   
   const_iterator begin() const { return ConstIterator(TheMap.begin()); }
   const_iterator end() const { return ConstIterator(TheMap.end()); }
+
+  std::pair<iterator, bool> insert(const ValueT &V) {
+    return TheMap.insert(std::make_pair(V, 0));
+  }
 };
 
 } // end namespace llvm

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=53177&r1=53176&r2=53177&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Jul  7 12:46:23 2008
@@ -115,7 +115,7 @@
       LegalizedNodes.insert(std::make_pair(To, To));
   }
   void AddPromotedOperand(SDOperand From, SDOperand To) {
-    bool isNew = PromotedNodes.insert(std::make_pair(From, To));
+    bool isNew = PromotedNodes.insert(std::make_pair(From, To)).second;
     assert(isNew && "Got into the map somehow?");
     // If someone requests legalization of the new node, return itself.
     LegalizedNodes.insert(std::make_pair(To, To));
@@ -6734,7 +6734,8 @@
   }
 
   // Remember in a map if the values will be reused later.
-  bool isNew = ExpandedNodes.insert(std::make_pair(Op, std::make_pair(Lo, Hi)));
+  bool isNew =
+    ExpandedNodes.insert(std::make_pair(Op, std::make_pair(Lo, Hi))).second;
   assert(isNew && "Value already expanded?!?");
 }
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=53177&r1=53176&r2=53177&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Mon Jul  7 12:46:23 2008
@@ -413,9 +413,10 @@
   unsigned VRBase = 0;
   if (TargetRegisterInfo::isVirtualRegister(SrcReg)) {
     // Just use the input register directly!
+    SDOperand Op(Node, ResNo);
     if (IsClone)
-      VRBaseMap.erase(SDOperand(Node, ResNo));
-    bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo),SrcReg));
+      VRBaseMap.erase(Op);
+    bool isNew = VRBaseMap.insert(std::make_pair(Op, SrcReg)).second;
     isNew = isNew; // Silence compiler warning.
     assert(isNew && "Node emitted out of order - early");
     return;
@@ -472,9 +473,10 @@
     TII->copyRegToReg(*BB, BB->end(), VRBase, SrcReg, DstRC, SrcRC);
   }
 
+  SDOperand Op(Node, ResNo);
   if (IsClone)
-    VRBaseMap.erase(SDOperand(Node, ResNo));
-  bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo), VRBase));
+    VRBaseMap.erase(Op);
+  bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second;
   isNew = isNew; // Silence compiler warning.
   assert(isNew && "Node emitted out of order - early");
 }
@@ -532,7 +534,8 @@
       MI->addOperand(MachineOperand::CreateReg(VRBase, true));
     }
 
-    bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,i), VRBase));
+    SDOperand Op(Node, i);
+    bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second;
     isNew = isNew; // Silence compiler warning.
     assert(isNew && "Node emitted out of order - early");
   }
@@ -786,7 +789,8 @@
   } else
     assert(0 && "Node is not insert_subreg, extract_subreg, or subreg_to_reg");
      
-  bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,0), VRBase));
+  SDOperand Op(Node, 0);
+  bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second;
   isNew = isNew; // Silence compiler warning.
   assert(isNew && "Node emitted out of order - early");
 }
@@ -992,7 +996,7 @@
       // Copy from physical register.
       assert(I->Reg && "Unknown physical register!");
       unsigned VRBase = MRI.createVirtualRegister(SU->CopyDstRC);
-      bool isNew = VRBaseMap.insert(std::make_pair(SU, VRBase));
+      bool isNew = VRBaseMap.insert(std::make_pair(SU, VRBase)).second;
       isNew = isNew; // Silence compiler warning.
       assert(isNew && "Node emitted out of order - early");
       TII->copyRegToReg(*BB, BB->end(), VRBase, I->Reg,

Modified: llvm/trunk/lib/Linker/LinkModules.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=53177&r1=53176&r2=53177&view=diff

==============================================================================
--- llvm/trunk/lib/Linker/LinkModules.cpp (original)
+++ llvm/trunk/lib/Linker/LinkModules.cpp Mon Jul  7 12:46:23 2008
@@ -114,7 +114,7 @@
   /// insert - This returns true if the pointer was new to the set, false if it
   /// was already in the set.
   bool insert(const Type *Src, const Type *Dst) {
-    if (!TheMap.insert(std::make_pair(Src, PATypeHolder(Dst))))
+    if (!TheMap.insert(std::make_pair(Src, PATypeHolder(Dst))).second)
       return false;  // Already in map.
     if (Src->isAbstract())
       Src->addAbstractTypeUser(this);

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=53177&r1=53176&r2=53177&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Jul  7 12:46:23 2008
@@ -209,11 +209,13 @@
   for (unsigned i = 0, e = array_lengthof(OpTbl2Addr); i != e; ++i) {
     unsigned RegOp = OpTbl2Addr[i][0];
     unsigned MemOp = OpTbl2Addr[i][1];
-    if (!RegOp2MemOpTable2Addr.insert(std::make_pair((unsigned*)RegOp, MemOp)))
+    if (!RegOp2MemOpTable2Addr.insert(std::make_pair((unsigned*)RegOp,
+                                                     MemOp)).second)
       assert(false && "Duplicated entries?");
     unsigned AuxInfo = 0 | (1 << 4) | (1 << 5); // Index 0,folded load and store
     if (!MemOp2RegOpTable.insert(std::make_pair((unsigned*)MemOp,
-                                                std::make_pair(RegOp, AuxInfo))))
+                                                std::make_pair(RegOp,
+                                                              AuxInfo))).second)
       AmbEntries.push_back(MemOp);
   }
 
@@ -297,14 +299,15 @@
   for (unsigned i = 0, e = array_lengthof(OpTbl0); i != e; ++i) {
     unsigned RegOp = OpTbl0[i][0];
     unsigned MemOp = OpTbl0[i][1];
-    if (!RegOp2MemOpTable0.insert(std::make_pair((unsigned*)RegOp, MemOp)))
+    if (!RegOp2MemOpTable0.insert(std::make_pair((unsigned*)RegOp,
+                                                 MemOp)).second)
       assert(false && "Duplicated entries?");
     unsigned FoldedLoad = OpTbl0[i][2];
     // Index 0, folded load or store.
     unsigned AuxInfo = 0 | (FoldedLoad << 4) | ((FoldedLoad^1) << 5);
     if (RegOp != X86::FsMOVAPDrr && RegOp != X86::FsMOVAPSrr)
       if (!MemOp2RegOpTable.insert(std::make_pair((unsigned*)MemOp,
-                                               std::make_pair(RegOp, AuxInfo))))
+                                     std::make_pair(RegOp, AuxInfo))).second)
         AmbEntries.push_back(MemOp);
   }
 
@@ -423,12 +426,13 @@
   for (unsigned i = 0, e = array_lengthof(OpTbl1); i != e; ++i) {
     unsigned RegOp = OpTbl1[i][0];
     unsigned MemOp = OpTbl1[i][1];
-    if (!RegOp2MemOpTable1.insert(std::make_pair((unsigned*)RegOp, MemOp)))
+    if (!RegOp2MemOpTable1.insert(std::make_pair((unsigned*)RegOp,
+                                                 MemOp)).second)
       assert(false && "Duplicated entries?");
     unsigned AuxInfo = 1 | (1 << 4); // Index 1, folded load
     if (RegOp != X86::FsMOVAPDrr && RegOp != X86::FsMOVAPSrr)
       if (!MemOp2RegOpTable.insert(std::make_pair((unsigned*)MemOp,
-                                               std::make_pair(RegOp, AuxInfo))))
+                                     std::make_pair(RegOp, AuxInfo))).second)
         AmbEntries.push_back(MemOp);
   }
 
@@ -629,11 +633,12 @@
   for (unsigned i = 0, e = array_lengthof(OpTbl2); i != e; ++i) {
     unsigned RegOp = OpTbl2[i][0];
     unsigned MemOp = OpTbl2[i][1];
-    if (!RegOp2MemOpTable2.insert(std::make_pair((unsigned*)RegOp, MemOp)))
+    if (!RegOp2MemOpTable2.insert(std::make_pair((unsigned*)RegOp,
+                                                 MemOp)).second)
       assert(false && "Duplicated entries?");
     unsigned AuxInfo = 2 | (1 << 4); // Index 1, folded load
     if (!MemOp2RegOpTable.insert(std::make_pair((unsigned*)MemOp,
-                                               std::make_pair(RegOp, AuxInfo))))
+                                   std::make_pair(RegOp, AuxInfo))).second)
       AmbEntries.push_back(MemOp);
   }
 

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53177&r1=53176&r2=53177&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Mon Jul  7 12:46:23 2008
@@ -85,7 +85,7 @@
     /// AddToWorkList - Add the specified instruction to the worklist if it
     /// isn't already in it.
     void AddToWorkList(Instruction *I) {
-      if (WorklistMap.insert(std::make_pair(I, Worklist.size())))
+      if (WorklistMap.insert(std::make_pair(I, Worklist.size())).second)
         Worklist.push_back(I);
     }
     




From echristo at apple.com  Mon Jul  7 12:48:02 2008
From: echristo at apple.com (Eric Christopher)
Date: Mon, 7 Jul 2008 10:48:02 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53113 -
	/llvm-gcc-4.2/trunk/gcc/config/darwin.h
In-Reply-To: <549A4A0A-7767-4A93-988F-FDF2CE0FEF85@apple.com>
References: <200807032209.m63M9OE7026032@zion.cs.uiuc.edu>
	<FEF76249-0703-46A4-A868-31AE63791019@apple.com>
	<FEB3885B-4F4E-420C-9E83-4B9FDF41DC89@apple.com>
	<549A4A0A-7767-4A93-988F-FDF2CE0FEF85@apple.com>
Message-ID: <8C608FC2-A280-4141-A0BB-0C9D163E89B4@apple.com>


On Jul 7, 2008, at 10:19 AM, Evan Cheng wrote:

> It would be nice if someone with configure foo can help with this.  
> Perhaps Eric?

Sure. There are a few ways you can go about this:

a) add a configure specific flag --enable-llvm-lto or something that  
will be off
by default or something of that sort.

or (icky)

b) basically check for a version number of ld that will support the  
flag. there are some examples in gcc/configure.ac that show how to do  
this for gnu ld

or (preferred)

c) add support to ld to print out the command line options it  
recognizes (--help maybe? -h?) and then use something simple like:

         # Check if linker supports -mllvm
         if $gcc_cv_ld --help 2>/dev/null | grep mllvm > /dev/null; then
                 gcc_cv_ld_llvm=yes
         fi


You'll need a little more wrapper around that, but this last is the  
easiest way to go if someone bugs Nick to put option listing support in.

-eric


From gohman at apple.com  Mon Jul  7 12:52:43 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 17:52:43 -0000
Subject: [llvm-commits] [llvm] r53178 -
	/llvm/trunk/lib/ExecutionEngine/JIT/TargetSelect.cpp
Message-ID: <200807071752.m67Hqhqv004018@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 12:52:43 2008
New Revision: 53178

URL: http://llvm.org/viewvc/llvm-project?rev=53178&view=rev
Log:
Use empty() instead of size().

Modified:
    llvm/trunk/lib/ExecutionEngine/JIT/TargetSelect.cpp

Modified: llvm/trunk/lib/ExecutionEngine/JIT/TargetSelect.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/TargetSelect.cpp?rev=53178&r1=53177&r2=53178&view=diff

==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/TargetSelect.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/TargetSelect.cpp Mon Jul  7 12:52:43 2008
@@ -59,7 +59,7 @@
 
   // Package up features to be passed to target/subtarget
   std::string FeaturesStr;
-  if (MCPU.size() || MAttrs.size()) {
+  if (!MCPU.empty() || !MAttrs.empty()) {
     SubtargetFeatures Features;
     Features.setCPU(MCPU);
     for (unsigned i = 0; i != MAttrs.size(); ++i)




From gohman at apple.com  Mon Jul  7 13:00:38 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 18:00:38 -0000
Subject: [llvm-commits] [llvm] r53179 - in /llvm/trunk: include/llvm/ADT/
 include/llvm/Analysis/ include/llvm/Support/ include/llvm/Transforms/Utils/
 lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/CellSPU/
 lib/Target/IA64/ lib/Target/Mips/ lib/Target/PIC16/ lib/Target/PowerPC/
 lib/Target/Sparc/ lib/VMCore/ utils/TableGen/
Message-ID: <200807071800.m67I0c2M004282@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 13:00:37 2008
New Revision: 53179

URL: http://llvm.org/viewvc/llvm-project?rev=53179&view=rev
Log:
Add explicit keywords.

Modified:
    llvm/trunk/include/llvm/ADT/FoldingSet.h
    llvm/trunk/include/llvm/Analysis/LoopInfo.h
    llvm/trunk/include/llvm/Support/Timer.h
    llvm/trunk/include/llvm/Transforms/Utils/BasicInliner.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
    llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
    llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
    llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp
    llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp
    llvm/trunk/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp
    llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
    llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp
    llvm/trunk/lib/VMCore/LeakDetector.cpp
    llvm/trunk/lib/VMCore/Type.cpp
    llvm/trunk/utils/TableGen/Record.h

Modified: llvm/trunk/include/llvm/ADT/FoldingSet.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/FoldingSet.h?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/FoldingSet.h (original)
+++ llvm/trunk/include/llvm/ADT/FoldingSet.h Mon Jul  7 13:00:37 2008
@@ -317,7 +317,7 @@
 template<class T>
 class FoldingSetIterator : public FoldingSetIteratorImpl {
 public:
-  FoldingSetIterator(void **Bucket) : FoldingSetIteratorImpl(Bucket) {}
+  explicit FoldingSetIterator(void **Bucket) : FoldingSetIteratorImpl(Bucket) {}
   
   T &operator*() const {
     return *static_cast<T*>(NodePtr);
@@ -345,7 +345,7 @@
 protected:
   void *Ptr;
 
-  FoldingSetBucketIteratorImpl(void **Bucket);
+  explicit FoldingSetBucketIteratorImpl(void **Bucket);
   
   FoldingSetBucketIteratorImpl(void **Bucket, bool)
     : Ptr(reinterpret_cast<void*>(Bucket)) {}
@@ -369,7 +369,7 @@
 template<class T>
 class FoldingSetBucketIterator : public FoldingSetBucketIteratorImpl {
 public:
-  FoldingSetBucketIterator(void **Bucket) : 
+  explicit FoldingSetBucketIterator(void **Bucket) : 
     FoldingSetBucketIteratorImpl(Bucket) {}
   
   FoldingSetBucketIterator(void **Bucket, bool) : 
@@ -394,7 +394,7 @@
 class FoldingSetNodeWrapper : public FoldingSetNode {
   T data;
 public:
-  FoldingSetNodeWrapper(const T& x) : data(x) {}
+  explicit FoldingSetNodeWrapper(const T& x) : data(x) {}
   virtual ~FoldingSetNodeWrapper() {}
   
   template<typename A1>

Modified: llvm/trunk/include/llvm/Analysis/LoopInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LoopInfo.h?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Analysis/LoopInfo.h (original)
+++ llvm/trunk/include/llvm/Analysis/LoopInfo.h Mon Jul  7 13:00:37 2008
@@ -611,7 +611,7 @@
   
 private:
   friend class LoopInfoBase<BlockT>;
-  LoopBase(BlockT *BB) : ParentLoop(0) {
+  explicit LoopBase(BlockT *BB) : ParentLoop(0) {
     Blocks.push_back(BB);
   }
 };

Modified: llvm/trunk/include/llvm/Support/Timer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/Timer.h?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/Timer.h (original)
+++ llvm/trunk/include/llvm/Support/Timer.h Mon Jul  7 13:00:37 2008
@@ -44,7 +44,7 @@
   bool Started;          // Has this time variable ever been started?
   TimerGroup *TG;        // The TimerGroup this Timer is in.
 public:
-  Timer(const std::string &N);
+  explicit Timer(const std::string &N);
   Timer(const std::string &N, TimerGroup &tg);
   Timer(const Timer &T);
   ~Timer();
@@ -116,7 +116,7 @@
   Timer &T;
   TimeRegion(const TimeRegion &); // DO NOT IMPLEMENT
 public:
-  TimeRegion(Timer &t) : T(t) {
+  explicit TimeRegion(Timer &t) : T(t) {
     T.startTimer();
   }
   ~TimeRegion() {
@@ -131,7 +131,7 @@
 /// is primarily used for debugging and for hunting performance problems.
 ///
 struct NamedRegionTimer : public TimeRegion {
-  NamedRegionTimer(const std::string &Name);
+  explicit NamedRegionTimer(const std::string &Name);
 };
 
 
@@ -145,7 +145,7 @@
   unsigned NumTimers;
   std::vector<Timer> TimersToPrint;
 public:
-  TimerGroup(const std::string &name) : Name(name), NumTimers(0) {}
+  explicit TimerGroup(const std::string &name) : Name(name), NumTimers(0) {}
   ~TimerGroup() {
     assert(NumTimers == 0 &&
            "TimerGroup destroyed before all contained timers!");

Modified: llvm/trunk/include/llvm/Transforms/Utils/BasicInliner.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Utils/BasicInliner.h?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Transforms/Utils/BasicInliner.h (original)
+++ llvm/trunk/include/llvm/Transforms/Utils/BasicInliner.h Mon Jul  7 13:00:37 2008
@@ -30,7 +30,7 @@
   class BasicInliner {
   public:
     
-    BasicInliner(TargetData *T = NULL);
+    explicit BasicInliner(TargetData *T = NULL);
     ~BasicInliner();
 
     /// addFunction - Add function into the list of functions to process.

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Jul  7 13:00:37 2008
@@ -122,8 +122,7 @@
   }
 
 public:
-
-  SelectionDAGLegalize(SelectionDAG &DAG);
+  explicit SelectionDAGLegalize(SelectionDAG &DAG);
 
   /// getTypeAction - Return how we should legalize values of this type, either
   /// it is already legal or we need to expand it into multiple registers of

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Mon Jul  7 13:00:37 2008
@@ -284,7 +284,7 @@
     public SelectionDAG::DAGUpdateListener {
     DAGTypeLegalizer &DTL;
   public:
-    NodeUpdateListener(DAGTypeLegalizer &dtl) : DTL(dtl) {}
+    explicit NodeUpdateListener(DAGTypeLegalizer &dtl) : DTL(dtl) {}
 
     virtual void NodeDeleted(SDNode *N, SDNode *E) {
       assert(N->getNodeId() != DAGTypeLegalizer::Processed &&

Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Mon Jul  7 13:00:37 2008
@@ -44,7 +44,7 @@
   const ARMSubtarget *Subtarget;
 
 public:
-  ARMDAGToDAGISel(ARMTargetMachine &TM)
+  explicit ARMDAGToDAGISel(ARMTargetMachine &TM)
     : SelectionDAGISel(Lowering), Lowering(TM),
     Subtarget(&TM.getSubtarget<ARMSubtarget>()) {
   }

Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Mon Jul  7 13:00:37 2008
@@ -227,7 +227,7 @@
   unsigned GlobalBaseReg;
 
 public:
-  SPUDAGToDAGISel(SPUTargetMachine &tm) :
+  explicit SPUDAGToDAGISel(SPUTargetMachine &tm) :
     SelectionDAGISel(*tm.getTargetLowering()),
     TM(tm),
     SPUtli(*tm.getTargetLowering())

Modified: llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp Mon Jul  7 13:00:37 2008
@@ -40,7 +40,7 @@
     IA64TargetLowering IA64Lowering;
     unsigned GlobalBaseReg;
   public:
-    IA64DAGToDAGISel(IA64TargetMachine &TM)
+    explicit IA64DAGToDAGISel(IA64TargetMachine &TM)
       : SelectionDAGISel(IA64Lowering), IA64Lowering(*TM.getTargetLowering()) {}
     
     virtual bool runOnFunction(Function &Fn) {

Modified: llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp Mon Jul  7 13:00:37 2008
@@ -61,7 +61,8 @@
   const MipsSubtarget &Subtarget;
  
 public:
-  MipsDAGToDAGISel(MipsTargetMachine &tm) : SelectionDAGISel(MipsLowering),
+  explicit MipsDAGToDAGISel(MipsTargetMachine &tm) :
+  SelectionDAGISel(MipsLowering),
   TM(tm), MipsLowering(*TM.getTargetLowering()), 
   Subtarget(tm.getSubtarget<MipsSubtarget>()) {}
   

Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp Mon Jul  7 13:00:37 2008
@@ -57,7 +57,7 @@
   PIC16TargetLowering PIC16Lowering;
 
 public:
-  PIC16DAGToDAGISel(PIC16TargetMachine &tm) : 
+  explicit PIC16DAGToDAGISel(PIC16TargetMachine &tm) : 
         SelectionDAGISel(PIC16Lowering),
         TM(tm), PIC16Lowering(*TM.getTargetLowering()) {}
   

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Mon Jul  7 13:00:37 2008
@@ -45,7 +45,7 @@
     const PPCSubtarget &PPCSubTarget;
     unsigned GlobalBaseReg;
   public:
-    PPCDAGToDAGISel(PPCTargetMachine &tm)
+    explicit PPCDAGToDAGISel(PPCTargetMachine &tm)
       : SelectionDAGISel(PPCLowering), TM(tm),
         PPCLowering(*TM.getTargetLowering()),
         PPCSubTarget(*TM.getSubtargetImpl()) {}

Modified: llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp Mon Jul  7 13:00:37 2008
@@ -35,7 +35,7 @@
   /// make the right decision when generating code for different targets.
   const SparcSubtarget &Subtarget;
 public:
-  SparcDAGToDAGISel(TargetMachine &TM)
+  explicit SparcDAGToDAGISel(TargetMachine &TM)
     : SelectionDAGISel(Lowering), Lowering(TM),
       Subtarget(TM.getSubtarget<SparcSubtarget>()) {
   }

Modified: llvm/trunk/lib/VMCore/LeakDetector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LeakDetector.cpp?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/LeakDetector.cpp (original)
+++ llvm/trunk/lib/VMCore/LeakDetector.cpp Mon Jul  7 13:00:37 2008
@@ -31,7 +31,7 @@
 
   template <typename T>
   struct VISIBILITY_HIDDEN LeakDetectorImpl {
-    LeakDetectorImpl(const char* const name) : Cache(0), Name(name) { }
+    explicit LeakDetectorImpl(const char* const name) : Cache(0), Name(name) { }
 
     // Because the most common usage pattern, by far, is to add a
     // garbage object, then remove it immediately, we optimize this

Modified: llvm/trunk/lib/VMCore/Type.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Type.cpp?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/Type.cpp (original)
+++ llvm/trunk/lib/VMCore/Type.cpp Mon Jul  7 13:00:37 2008
@@ -431,7 +431,7 @@
 
 namespace {
   struct BuiltinIntegerType : public IntegerType {
-    BuiltinIntegerType(unsigned W) : IntegerType(W) {}
+    explicit BuiltinIntegerType(unsigned W) : IntegerType(W) {}
   };
 }
 const IntegerType *Type::Int1Ty  = new BuiltinIntegerType(1);

Modified: llvm/trunk/utils/TableGen/Record.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/Record.h?rev=53179&r1=53178&r2=53179&view=diff

==============================================================================
--- llvm/trunk/utils/TableGen/Record.h (original)
+++ llvm/trunk/utils/TableGen/Record.h Mon Jul  7 13:00:37 2008
@@ -151,7 +151,7 @@
 class BitsRecTy : public RecTy {
   unsigned Size;
 public:
-  BitsRecTy(unsigned Sz) : Size(Sz) {}
+  explicit BitsRecTy(unsigned Sz) : Size(Sz) {}
 
   unsigned getNumBits() const { return Size; }
 
@@ -268,7 +268,7 @@
 class ListRecTy : public RecTy {
   RecTy *Ty;
 public:
-  ListRecTy(RecTy *T) : Ty(T) {}
+  explicit ListRecTy(RecTy *T) : Ty(T) {}
 
   RecTy *getElementType() const { return Ty; }
 
@@ -381,7 +381,7 @@
 class RecordRecTy : public RecTy {
   Record *Rec;
 public:
-  RecordRecTy(Record *R) : Rec(R) {}
+  explicit RecordRecTy(Record *R) : Rec(R) {}
 
   Record *getRecord() const { return Rec; }
 
@@ -966,7 +966,7 @@
   std::vector<Record*> SuperClasses;
 public:
 
-  Record(const std::string &N) : Name(N) {}
+  explicit Record(const std::string &N) : Name(N) {}
   ~Record() {}
 
   const std::string &getName() const { return Name; }




From echristo at apple.com  Mon Jul  7 13:04:58 2008
From: echristo at apple.com (Eric Christopher)
Date: Mon, 7 Jul 2008 11:04:58 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53147 - in /llvm-gcc-4.2/trunk:
	config.sub gcc/Makefile.in gcc/config.gcc
	gcc/config/mips/mips.c gcc/config/mips/mips.h
	gcc/config/mips/psp.h gcc/config/mips/t-allegrex
In-Reply-To: <200807051908.m65J8V42001510@zion.cs.uiuc.edu>
References: <200807051908.m65J8V42001510@zion.cs.uiuc.edu>
Message-ID: <5384A761-7705-4D56-8260-033365FAFBEA@apple.com>


On Jul 5, 2008, at 12:08 PM, Bruno Cardoso Lopes wrote:

> Added:
>    llvm-gcc-4.2/trunk/gcc/config/mips/psp.h
>    llvm-gcc-4.2/trunk/gcc/config/mips/t-allegrex
> Modified:
>    llvm-gcc-4.2/trunk/config.sub
>    llvm-gcc-4.2/trunk/gcc/Makefile.in
>    llvm-gcc-4.2/trunk/gcc/config.gcc
>    llvm-gcc-4.2/trunk/gcc/config/mips/mips.c
>    llvm-gcc-4.2/trunk/gcc/config/mips/mips.h

This looks good Bruno. Thanks!

-eric


From gohman at apple.com  Mon Jul  7 13:07:36 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 18:07:36 -0000
Subject: [llvm-commits] [llvm] r53180 -
	/llvm/trunk/include/llvm/ADT/FoldingSet.h
Message-ID: <200807071807.m67I7aCS004538@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 13:07:36 2008
New Revision: 53180

URL: http://llvm.org/viewvc/llvm-project?rev=53180&view=rev
Log:
Remove an unnecessary reinterpret_cast.

Modified:
    llvm/trunk/include/llvm/ADT/FoldingSet.h

Modified: llvm/trunk/include/llvm/ADT/FoldingSet.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/FoldingSet.h?rev=53180&r1=53179&r2=53180&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/FoldingSet.h (original)
+++ llvm/trunk/include/llvm/ADT/FoldingSet.h Mon Jul  7 13:07:36 2008
@@ -348,7 +348,7 @@
   explicit FoldingSetBucketIteratorImpl(void **Bucket);
   
   FoldingSetBucketIteratorImpl(void **Bucket, bool)
-    : Ptr(reinterpret_cast<void*>(Bucket)) {}
+    : Ptr(Bucket) {}
 
   void advance() {
     void *Probe = static_cast<FoldingSetNode*>(Ptr)->getNextInBucket();




From gohman at apple.com  Mon Jul  7 13:08:20 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 18:08:20 -0000
Subject: [llvm-commits] [llvm] r53181 -
	/llvm/trunk/include/llvm/ADT/SmallVector.h
Message-ID: <200807071808.m67I8KMK004572@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 13:08:20 2008
New Revision: 53181

URL: http://llvm.org/viewvc/llvm-project?rev=53181&view=rev
Log:
Remove unnecessary static_casts.

Modified:
    llvm/trunk/include/llvm/ADT/SmallVector.h

Modified: llvm/trunk/include/llvm/ADT/SmallVector.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/SmallVector.h?rev=53181&r1=53180&r2=53181&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/SmallVector.h (original)
+++ llvm/trunk/include/llvm/ADT/SmallVector.h Mon Jul  7 13:08:20 2008
@@ -86,7 +86,7 @@
 
     // If this wasn't grown from the inline copy, deallocate the old space.
     if (!isSmall())
-      operator delete(static_cast<void*>(Begin));
+      operator delete(Begin);
   }
   
   typedef size_t size_type;
@@ -362,7 +362,7 @@
   
   // If this wasn't grown from the inline copy, deallocate the old space.
   if (!isSmall())
-    operator delete(static_cast<void*>(Begin));
+    operator delete(Begin);
   
   Begin = NewElts;
   End = NewElts+CurSize;




From gohman at apple.com  Mon Jul  7 13:14:29 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 18:14:29 -0000
Subject: [llvm-commits] [llvm] r53182 - in /llvm/trunk/include/llvm:
 CodeGen/RegisterCoalescer.h Support/Casting.h Support/GraphWriter.h
Message-ID: <200807071814.m67IETZI004789@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 13:14:29 2008
New Revision: 53182

URL: http://llvm.org/viewvc/llvm-project?rev=53182&view=rev
Log:
Remove uses of "llvm/Support/Debug.h" from LLVM include files, which
all happened be unnecessary.

Modified:
    llvm/trunk/include/llvm/CodeGen/RegisterCoalescer.h
    llvm/trunk/include/llvm/Support/Casting.h
    llvm/trunk/include/llvm/Support/GraphWriter.h

Modified: llvm/trunk/include/llvm/CodeGen/RegisterCoalescer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RegisterCoalescer.h?rev=53182&r1=53181&r2=53182&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/RegisterCoalescer.h (original)
+++ llvm/trunk/include/llvm/CodeGen/RegisterCoalescer.h Mon Jul  7 13:14:29 2008
@@ -17,7 +17,6 @@
 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
 #include "llvm/CodeGen/LiveVariables.h"
 #include "llvm/Target/TargetRegisterInfo.h"
-#include "llvm/Support/Debug.h"
 
 #ifndef LLVM_CODEGEN_REGISTER_COALESCER_H
 #define LLVM_CODEGEN_REGISTER_COALESCER_H

Modified: llvm/trunk/include/llvm/Support/Casting.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/Casting.h?rev=53182&r1=53181&r2=53182&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/Casting.h (original)
+++ llvm/trunk/include/llvm/Support/Casting.h Mon Jul  7 13:14:29 2008
@@ -235,7 +235,7 @@
 
 
 #ifdef DEBUG_CAST_OPERATORS
-#include "llvm/Support/Debug.h"
+#include "llvm/Support/Streams.h"
 
 struct bar {
   bar() {}

Modified: llvm/trunk/include/llvm/Support/GraphWriter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/GraphWriter.h?rev=53182&r1=53181&r2=53182&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/GraphWriter.h (original)
+++ llvm/trunk/include/llvm/Support/GraphWriter.h Mon Jul  7 13:14:29 2008
@@ -23,8 +23,8 @@
 #ifndef LLVM_SUPPORT_GRAPHWRITER_H
 #define LLVM_SUPPORT_GRAPHWRITER_H
 
-#include "llvm/Support/Debug.h"
 #include "llvm/Support/DOTGraphTraits.h"
+#include "llvm/Support/Streams.h"
 #include "llvm/ADT/GraphTraits.h"
 #include "llvm/System/Path.h"
 #include <fstream>




From gohman at apple.com  Mon Jul  7 13:26:30 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 18:26:30 -0000
Subject: [llvm-commits] [llvm] r53183 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAG.h
 include/llvm/CodeGen/SelectionDAGNodes.h
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Message-ID: <200807071826.m67IQUBF005163@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 13:26:29 2008
New Revision: 53183

URL: http://llvm.org/viewvc/llvm-project?rev=53183&view=rev
Log:
Remove most of the uses of SDOperandPtr, usually replacing it with a
simple const SDOperand*, which is what's usually needed.

For AddNodeIDOperands, which is small, just duplicate the function to
accept an SDUse*.

For SelectionDAG::getNode - Add an overload that accepts SDUse* that
copies the operands into a temporary SDOperand array, but also has
special-case checks for 0 through 3 operands to avoid the copy in
the common cases.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=53183&r1=53182&r2=53183&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Mon Jul  7 13:26:29 2008
@@ -306,11 +306,14 @@
   SDOperand getNode(unsigned Opcode, MVT VT,
                     SDOperand N1, SDOperand N2, SDOperand N3, SDOperand N4,
                     SDOperand N5);
-  SDOperand getNode(unsigned Opcode, MVT VT, SDOperandPtr Ops, unsigned NumOps);
+  SDOperand getNode(unsigned Opcode, MVT VT,
+                    const SDOperand *Ops, unsigned NumOps);
+  SDOperand getNode(unsigned Opcode, MVT VT,
+                    const SDUse *Ops, unsigned NumOps);
   SDOperand getNode(unsigned Opcode, std::vector<MVT> &ResultTys,
-                    SDOperandPtr Ops, unsigned NumOps);
+                    const SDOperand *Ops, unsigned NumOps);
   SDOperand getNode(unsigned Opcode, const MVT *VTs, unsigned NumVTs,
-                    SDOperandPtr Ops, unsigned NumOps);
+                    const SDOperand *Ops, unsigned NumOps);
   SDOperand getNode(unsigned Opcode, SDVTList VTs);
   SDOperand getNode(unsigned Opcode, SDVTList VTs, SDOperand N);
   SDOperand getNode(unsigned Opcode, SDVTList VTs, SDOperand N1, SDOperand N2);
@@ -322,7 +325,7 @@
                     SDOperand N1, SDOperand N2, SDOperand N3, SDOperand N4,
                     SDOperand N5);
   SDOperand getNode(unsigned Opcode, SDVTList VTs,
-                    SDOperandPtr Ops, unsigned NumOps);
+                    const SDOperand *Ops, unsigned NumOps);
 
   SDOperand getMemcpy(SDOperand Chain, SDOperand Dst, SDOperand Src,
                       SDOperand Size, unsigned Align,
@@ -383,13 +386,13 @@
 
   /// getMergeValues - Create a MERGE_VALUES node from the given operands.
   /// Allowed to return something different (and simpler) if Simplify is true.
-  SDOperand getMergeValues(SDOperandPtr Ops, unsigned NumOps,
+  SDOperand getMergeValues(const SDOperand *Ops, unsigned NumOps,
                            bool Simplify = true);
 
   /// getMergeValues - Create a MERGE_VALUES node from the given types and ops.
   /// Allowed to return something different (and simpler) if Simplify is true.
   /// May be faster than the above version if VTs is known and NumOps is large.
-  SDOperand getMergeValues(SDVTList VTs, SDOperandPtr Ops, unsigned NumOps,
+  SDOperand getMergeValues(SDVTList VTs, const SDOperand *Ops, unsigned NumOps,
                            bool Simplify = true) {
     if (Simplify && NumOps == 1)
       return Ops[0];
@@ -446,7 +449,8 @@
                                SDOperand Op3, SDOperand Op4);
   SDOperand UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2,
                                SDOperand Op3, SDOperand Op4, SDOperand Op5);
-  SDOperand UpdateNodeOperands(SDOperand N, SDOperandPtr Ops, unsigned NumOps);
+  SDOperand UpdateNodeOperands(SDOperand N,
+                               const SDOperand *Ops, unsigned NumOps);
   
   /// SelectNodeTo - These are used for target selectors to *mutate* the
   /// specified node to have the specified return type, Target opcode, and
@@ -460,12 +464,12 @@
   SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT,
                        SDOperand Op1, SDOperand Op2, SDOperand Op3);
   SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT,
-                       SDOperandPtr Ops, unsigned NumOps);
+                       const SDOperand *Ops, unsigned NumOps);
   SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1, MVT VT2);
   SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1,
-                       MVT VT2, SDOperandPtr Ops, unsigned NumOps);
+                       MVT VT2, const SDOperand *Ops, unsigned NumOps);
   SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1,
-                       MVT VT2, MVT VT3, SDOperandPtr Ops, unsigned NumOps);
+                       MVT VT2, MVT VT3, const SDOperand *Ops, unsigned NumOps);
   SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1,
                        MVT VT2, SDOperand Op1);
   SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1,
@@ -473,7 +477,7 @@
   SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1,
                        MVT VT2, SDOperand Op1, SDOperand Op2, SDOperand Op3);
   SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, SDVTList VTs,
-                       SDOperandPtr Ops, unsigned NumOps);
+                       const SDOperand *Ops, unsigned NumOps);
 
 
   /// getTargetNode - These are used for target selectors to create a new node
@@ -488,7 +492,7 @@
   SDNode *getTargetNode(unsigned Opcode, MVT VT,
                         SDOperand Op1, SDOperand Op2, SDOperand Op3);
   SDNode *getTargetNode(unsigned Opcode, MVT VT,
-                        SDOperandPtr Ops, unsigned NumOps);
+                        const SDOperand *Ops, unsigned NumOps);
   SDNode *getTargetNode(unsigned Opcode, MVT VT1, MVT VT2);
   SDNode *getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, SDOperand Op1);
   SDNode *getTargetNode(unsigned Opcode, MVT VT1,
@@ -496,22 +500,22 @@
   SDNode *getTargetNode(unsigned Opcode, MVT VT1,
                         MVT VT2, SDOperand Op1, SDOperand Op2, SDOperand Op3);
   SDNode *getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
-                        SDOperandPtr Ops, unsigned NumOps);
+                        const SDOperand *Ops, unsigned NumOps);
   SDNode *getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
                         SDOperand Op1, SDOperand Op2);
   SDNode *getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
                         SDOperand Op1, SDOperand Op2, SDOperand Op3);
   SDNode *getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
-                        SDOperandPtr Ops, unsigned NumOps);
+                        const SDOperand *Ops, unsigned NumOps);
   SDNode *getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, MVT VT4,
-                        SDOperandPtr Ops, unsigned NumOps);
+                        const SDOperand *Ops, unsigned NumOps);
   SDNode *getTargetNode(unsigned Opcode, std::vector<MVT> &ResultTys,
-                        SDOperandPtr Ops, unsigned NumOps);
+                        const SDOperand *Ops, unsigned NumOps);
 
   /// getNodeIfExists - Get the specified node if it's already available, or
   /// else return NULL.
   SDNode *getNodeIfExists(unsigned Opcode, SDVTList VTs,
-                          SDOperandPtr Ops, unsigned NumOps);
+                          const SDOperand *Ops, unsigned NumOps);
   
   /// DAGUpdateListener - Clients of various APIs that cause global effects on
   /// the DAG can optionally implement this interface.  This allows the clients
@@ -546,7 +550,7 @@
                           DAGUpdateListener *UpdateListener = 0);
   void ReplaceAllUsesWith(SDNode *From, SDNode *To,
                           DAGUpdateListener *UpdateListener = 0);
-  void ReplaceAllUsesWith(SDNode *From, SDOperandPtr To,
+  void ReplaceAllUsesWith(SDNode *From, const SDOperand *To,
                           DAGUpdateListener *UpdateListener = 0);
 
   /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
@@ -638,7 +642,7 @@
   SDNode *FindModifiedNodeSlot(SDNode *N, SDOperand Op, void *&InsertPos);
   SDNode *FindModifiedNodeSlot(SDNode *N, SDOperand Op1, SDOperand Op2,
                                void *&InsertPos);
-  SDNode *FindModifiedNodeSlot(SDNode *N, SDOperandPtr Ops, unsigned NumOps,
+  SDNode *FindModifiedNodeSlot(SDNode *N, const SDOperand *Ops, unsigned NumOps,
                                void *&InsertPos);
 
   void DeleteNodeNotInCSEMaps(SDNode *N);

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=53183&r1=53182&r2=53183&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Mon Jul  7 13:26:29 2008
@@ -1271,7 +1271,7 @@
     Prev = 0; Next = 0;
   }
 
-  SDNode(unsigned Opc, SDVTList VTs, SDOperandPtr Ops, unsigned NumOps)
+  SDNode(unsigned Opc, SDVTList VTs, const SDUse *Ops, unsigned NumOps)
     : NodeType(Opc), NodeId(-1), UsesSize(0), Uses(NULL) {
     OperandsNeedDelete = true;
     NumOperands = NumOps;
@@ -1280,8 +1280,8 @@
     for (unsigned i = 0; i != NumOps; ++i) {
       OperandList[i] = Ops[i];
       OperandList[i].setUser(this);
-      Ops[i].Val->addUse(OperandList[i]);
-      ++Ops[i].Val->UsesSize;
+      Ops[i].getSDOperand().Val->addUse(OperandList[i]);
+      ++Ops[i].getSDOperand().Val->UsesSize;
     }
     
     ValueList = VTs.VTs;
@@ -1320,7 +1320,7 @@
   /// opcode, types, and operands to the specified value.  This should only be
   /// used by the SelectionDAG class.
   void MorphNodeTo(unsigned Opc, SDVTList L,
-                   SDOperandPtr Ops, unsigned NumOps);
+                   const SDOperand *Ops, unsigned NumOps);
   
   void addUser(unsigned i, SDNode *User) {
     assert(User->OperandList[i].getUser() && "Node without parent");

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53183&r1=53182&r2=53183&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Jul  7 13:26:29 2008
@@ -323,16 +323,26 @@
 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
 ///
 static void AddNodeIDOperands(FoldingSetNodeID &ID,
-                              SDOperandPtr Ops, unsigned NumOps) {
+                              const SDOperand *Ops, unsigned NumOps) {
   for (; NumOps; --NumOps, ++Ops) {
     ID.AddPointer(Ops->Val);
     ID.AddInteger(Ops->ResNo);
   }
 }
 
+/// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
+///
+static void AddNodeIDOperands(FoldingSetNodeID &ID,
+                              const SDUse *Ops, unsigned NumOps) {
+  for (; NumOps; --NumOps, ++Ops) {
+    ID.AddPointer(Ops->getSDOperand().Val);
+    ID.AddInteger(Ops->getSDOperand().ResNo);
+  }
+}
+
 static void AddNodeIDNode(FoldingSetNodeID &ID,
                           unsigned short OpC, SDVTList VTList, 
-                          SDOperandPtr OpList, unsigned N) {
+                          const SDOperand *OpList, unsigned N) {
   AddNodeIDOpcode(ID, OpC);
   AddNodeIDValueTypes(ID, VTList);
   AddNodeIDOperands(ID, OpList, N);
@@ -693,7 +703,7 @@
 /// return null, otherwise return a pointer to the slot it would take.  If a
 /// node already exists with these operands, the slot will be non-null.
 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 
-                                           SDOperandPtr Ops,unsigned NumOps,
+                                           const SDOperand *Ops,unsigned NumOps,
                                            void *&InsertPos) {
   if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
     return 0;    // Never add these nodes.
@@ -759,7 +769,7 @@
 
   unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
   FoldingSetNodeID ID;
-  AddNodeIDNode(ID, Opc, getVTList(EltVT), (SDOperand*)0, 0);
+  AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
   ID.Add(Val);
   void *IP = 0;
   SDNode *N = NULL;
@@ -797,7 +807,7 @@
   // we don't have issues with SNANs.
   unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
   FoldingSetNodeID ID;
-  AddNodeIDNode(ID, Opc, getVTList(EltVT), (SDOperand*)0, 0);
+  AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
   ID.Add(V);
   void *IP = 0;
   SDNode *N = NULL;
@@ -846,7 +856,7 @@
     Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
 
   FoldingSetNodeID ID;
-  AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
+  AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
   ID.AddPointer(GV);
   ID.AddInteger(Offset);
   void *IP = 0;
@@ -861,7 +871,7 @@
 SDOperand SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
   unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
   FoldingSetNodeID ID;
-  AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
+  AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
   ID.AddInteger(FI);
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
@@ -875,7 +885,7 @@
 SDOperand SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
   unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
   FoldingSetNodeID ID;
-  AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
+  AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
   ID.AddInteger(JTI);
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
@@ -891,7 +901,7 @@
                                         bool isTarget) {
   unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
   FoldingSetNodeID ID;
-  AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
+  AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
   ID.AddInteger(Alignment);
   ID.AddInteger(Offset);
   ID.AddPointer(C);
@@ -910,7 +920,7 @@
                                         bool isTarget) {
   unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
   FoldingSetNodeID ID;
-  AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
+  AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
   ID.AddInteger(Alignment);
   ID.AddInteger(Offset);
   C->AddSelectionDAGCSEId(ID);
@@ -926,7 +936,7 @@
 
 SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
   FoldingSetNodeID ID;
-  AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), (SDOperand*)0, 0);
+  AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
   ID.AddPointer(MBB);
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
@@ -939,7 +949,7 @@
 
 SDOperand SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
   FoldingSetNodeID ID;
-  AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), (SDOperand*)0, 0);
+  AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
   ID.AddInteger(Flags.getRawBits());
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
@@ -992,7 +1002,7 @@
 
 SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
   FoldingSetNodeID ID;
-  AddNodeIDNode(ID, ISD::Register, getVTList(VT), (SDOperand*)0, 0);
+  AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
   ID.AddInteger(RegNo);
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
@@ -1042,7 +1052,7 @@
          "SrcValue is not a pointer?");
 
   FoldingSetNodeID ID;
-  AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), (SDOperand*)0, 0);
+  AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
   ID.AddPointer(V);
 
   void *IP = 0;
@@ -1061,7 +1071,7 @@
          "SrcValue is not a pointer?");
 
   FoldingSetNodeID ID;
-  AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), (SDOperand*)0, 0);
+  AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
   ID.AddPointer(v);
   ID.AddInteger(MO.getFlags());
   ID.AddInteger(MO.getOffset());
@@ -1920,7 +1930,7 @@
 ///
 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT) {
   FoldingSetNodeID ID;
-  AddNodeIDNode(ID, Opcode, getVTList(VT), (SDOperand*)0, 0);
+  AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
@@ -3076,7 +3086,7 @@
 
 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
 /// Allowed to return something different (and simpler) if Simplify is true.
-SDOperand SelectionDAG::getMergeValues(SDOperandPtr Ops, unsigned NumOps,
+SDOperand SelectionDAG::getMergeValues(const SDOperand *Ops, unsigned NumOps,
                                        bool Simplify) {
   if (Simplify && NumOps == 1)
     return Ops[0];
@@ -3296,7 +3306,28 @@
 }
 
 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
-                                SDOperandPtr Ops, unsigned NumOps) {
+                                const SDUse *Ops, unsigned NumOps) {
+  switch (NumOps) {
+  case 0: return getNode(Opcode, VT);
+  case 1: return getNode(Opcode, VT, Ops[0].getSDOperand());
+  case 2: return getNode(Opcode, VT, Ops[0].getSDOperand(),
+                         Ops[1].getSDOperand());
+  case 3: return getNode(Opcode, VT, Ops[0].getSDOperand(),
+                         Ops[1].getSDOperand(), Ops[2].getSDOperand());
+  default: break;
+  }
+
+  // Copy from an SDUse array into an SDOperand array for use with
+  // the regular getNode logic.
+  SmallVector<SDOperand, 8> NewOps;
+  NewOps.reserve(NumOps);
+  for (unsigned i = 0; i != NumOps; ++i)
+    NewOps.push_back(Ops[i].getSDOperand());
+  return getNode(Opcode, VT, Ops, NumOps);
+}
+
+SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
+                                const SDOperand *Ops, unsigned NumOps) {
   switch (NumOps) {
   case 0: return getNode(Opcode, VT);
   case 1: return getNode(Opcode, VT, Ops[0]);
@@ -3345,21 +3376,21 @@
 
 SDOperand SelectionDAG::getNode(unsigned Opcode,
                                 std::vector<MVT> &ResultTys,
-                                SDOperandPtr Ops, unsigned NumOps) {
+                                const SDOperand *Ops, unsigned NumOps) {
   return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(),
                  Ops, NumOps);
 }
 
 SDOperand SelectionDAG::getNode(unsigned Opcode,
                                 const MVT *VTs, unsigned NumVTs,
-                                SDOperandPtr Ops, unsigned NumOps) {
+                                const SDOperand *Ops, unsigned NumOps) {
   if (NumVTs == 1)
     return getNode(Opcode, VTs[0], Ops, NumOps);
   return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps);
 }  
   
 SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
-                                SDOperandPtr Ops, unsigned NumOps) {
+                                const SDOperand *Ops, unsigned NumOps) {
   if (VTList.NumVTs == 1)
     return getNode(Opcode, VTList.VTs[0], Ops, NumOps);
 
@@ -3418,7 +3449,7 @@
 }
 
 SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
-  return getNode(Opcode, VTList, (SDOperand*)0, 0);
+  return getNode(Opcode, VTList, 0, 0);
 }
 
 SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
@@ -3605,7 +3636,7 @@
 }
 
 SDOperand SelectionDAG::
-UpdateNodeOperands(SDOperand InN, SDOperandPtr Ops, unsigned NumOps) {
+UpdateNodeOperands(SDOperand InN, const SDOperand *Ops, unsigned NumOps) {
   SDNode *N = InN.Val;
   assert(N->getNumOperands() == NumOps &&
          "Update with wrong number of operands");
@@ -3650,7 +3681,7 @@
 /// opcode, types, and operands to the specified value.  This should only be
 /// used by the SelectionDAG class.
 void SDNode::MorphNodeTo(unsigned Opc, SDVTList L,
-                         SDOperandPtr Ops, unsigned NumOps) {
+                         const SDOperand *Ops, unsigned NumOps) {
   NodeType = Opc;
   ValueList = L.VTs;
   NumValues = L.NumVTs;
@@ -3693,7 +3724,7 @@
 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
                                    MVT VT) {
   SDVTList VTs = getVTList(VT);
-  return SelectNodeTo(N, TargetOpc, VTs, (SDOperand*)0, 0);
+  return SelectNodeTo(N, TargetOpc, VTs, 0, 0);
 }
 
 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
@@ -3720,14 +3751,14 @@
 }
 
 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
-                                   MVT VT, SDOperandPtr Ops,
+                                   MVT VT, const SDOperand *Ops,
                                    unsigned NumOps) {
   SDVTList VTs = getVTList(VT);
   return SelectNodeTo(N, TargetOpc, VTs, Ops, NumOps);
 }
 
 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
-                                   MVT VT1, MVT VT2, SDOperandPtr Ops,
+                                   MVT VT1, MVT VT2, const SDOperand *Ops,
                                    unsigned NumOps) {
   SDVTList VTs = getVTList(VT1, VT2);
   return SelectNodeTo(N, TargetOpc, VTs, Ops, NumOps);
@@ -3740,8 +3771,8 @@
 }
 
 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
-                                   MVT VT1, MVT VT2, MVT VT3, SDOperandPtr Ops,
-                                   unsigned NumOps) {
+                                   MVT VT1, MVT VT2, MVT VT3,
+                                   const SDOperand *Ops, unsigned NumOps) {
   SDVTList VTs = getVTList(VT1, VT2, VT3);
   return SelectNodeTo(N, TargetOpc, VTs, Ops, NumOps);
 }
@@ -3772,7 +3803,7 @@
 }
 
 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
-                                   SDVTList VTs, SDOperandPtr Ops,
+                                   SDVTList VTs, const SDOperand *Ops,
                                    unsigned NumOps) {
   // If an identical node already exists, use it.
   FoldingSetNodeID ID;
@@ -3811,7 +3842,7 @@
   return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2, Op3).Val;
 }
 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
-                                    SDOperandPtr Ops, unsigned NumOps) {
+                                    const SDOperand *Ops, unsigned NumOps) {
   return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops, NumOps).Val;
 }
 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
@@ -3839,7 +3870,7 @@
   return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, 3).Val;
 }
 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
-                                    SDOperandPtr Ops, unsigned NumOps) {
+                                    const SDOperand *Ops, unsigned NumOps) {
   const MVT *VTs = getNodeValueTypes(VT1, VT2);
   return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, NumOps).Val;
 }
@@ -3857,13 +3888,13 @@
   return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, 3).Val;
 }
 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
-                                    SDOperandPtr Ops, unsigned NumOps) {
+                                    const SDOperand *Ops, unsigned NumOps) {
   const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
   return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, NumOps).Val;
 }
 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
                                     MVT VT2, MVT VT3, MVT VT4,
-                                    SDOperandPtr Ops, unsigned NumOps) {
+                                    const SDOperand *Ops, unsigned NumOps) {
   std::vector<MVT> VTList;
   VTList.push_back(VT1);
   VTList.push_back(VT2);
@@ -3874,7 +3905,7 @@
 }
 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
                                     std::vector<MVT> &ResultTys,
-                                    SDOperandPtr Ops, unsigned NumOps) {
+                                    const SDOperand *Ops, unsigned NumOps) {
   const MVT *VTs = getNodeValueTypes(ResultTys);
   return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, ResultTys.size(),
                  Ops, NumOps).Val;
@@ -3883,7 +3914,7 @@
 /// getNodeIfExists - Get the specified node if it's already available, or
 /// else return NULL.
 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
-                                      SDOperandPtr Ops, unsigned NumOps) {
+                                      const SDOperand *Ops, unsigned NumOps) {
   if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
     FoldingSetNodeID ID;
     AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
@@ -3993,7 +4024,7 @@
 /// This version can replace From with any result values.  To must match the
 /// number and types of values returned by From.
 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
-                                      SDOperandPtr To,
+                                      const SDOperand *To,
                                       DAGUpdateListener *UpdateListener) {
   if (From->getNumValues() == 1)  // Handle the simple case efficiently.
     return ReplaceAllUsesWith(SDOperand(From, 0), To[0], UpdateListener);
@@ -4220,7 +4251,7 @@
 
 HandleSDNode::~HandleSDNode() {
   SDVTList VTs = { 0, 0 };
-  MorphNodeTo(ISD::HANDLENODE, VTs, SDOperandPtr(), 0);  // Drops operand uses.
+  MorphNodeTo(ISD::HANDLENODE, VTs, 0, 0);  // Drops operand uses.
 }
 
 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,




From kremenek at apple.com  Mon Jul  7 13:32:18 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Mon, 07 Jul 2008 18:32:18 -0000
Subject: [llvm-commits] [llvm] r53185 - /llvm/tags/checker/checker-58/
Message-ID: <200807071832.m67IWIAD005354@zion.cs.uiuc.edu>

Author: kremenek
Date: Mon Jul  7 13:32:18 2008
New Revision: 53185

URL: http://llvm.org/viewvc/llvm-project?rev=53185&view=rev
Log:
Tagging checker-58.

Added:
    llvm/tags/checker/checker-58/
      - copied from r53184, llvm/trunk/



From gohman at apple.com  Mon Jul  7 13:34:27 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 18:34:27 -0000
Subject: [llvm-commits] [llvm] r53187 -
	/llvm/trunk/include/llvm/Support/Allocator.h
Message-ID: <200807071834.m67IYREK005433@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 13:34:27 2008
New Revision: 53187

URL: http://llvm.org/viewvc/llvm-project?rev=53187&view=rev
Log:
Add a space between * and /* to help simple-minded lexers.

Modified:
    llvm/trunk/include/llvm/Support/Allocator.h

Modified: llvm/trunk/include/llvm/Support/Allocator.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/Allocator.h?rev=53187&r1=53186&r2=53187&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/Allocator.h (original)
+++ llvm/trunk/include/llvm/Support/Allocator.h Mon Jul  7 13:34:27 2008
@@ -55,7 +55,7 @@
     return static_cast<T*>(Allocate(sizeof(T),AlignOf<T>::Alignment));
   }
   
-  void Deallocate(void */*Ptr*/) {}
+  void Deallocate(void * /*Ptr*/) {}
 
   void PrintStats() const;
 };




From gohman at apple.com  Mon Jul  7 13:38:14 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 18:38:14 -0000
Subject: [llvm-commits] [llvm] r53188 -
	/llvm/trunk/include/llvm/Support/Allocator.h
Message-ID: <200807071838.m67IcEDh005544@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 13:38:14 2008
New Revision: 53188

URL: http://llvm.org/viewvc/llvm-project?rev=53188&view=rev
Log:
Make BumpPtrAllocator noncopyable.

Modified:
    llvm/trunk/include/llvm/Support/Allocator.h

Modified: llvm/trunk/include/llvm/Support/Allocator.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/Allocator.h?rev=53188&r1=53187&r2=53188&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/Allocator.h (original)
+++ llvm/trunk/include/llvm/Support/Allocator.h Mon Jul  7 13:38:14 2008
@@ -41,6 +41,9 @@
 /// allocating memory, and never deletes it until the entire block is dead. This
 /// makes allocation speedy, but must only be used when the trade-off is ok.
 class BumpPtrAllocator {
+  BumpPtrAllocator(const BumpPtrAllocator &); // do not implement
+  void operator=(const BumpPtrAllocator &);   // do not implement
+
   void *TheMemory;
 public:
   BumpPtrAllocator();




From gohman at apple.com  Mon Jul  7 13:39:33 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 18:39:33 -0000
Subject: [llvm-commits] [llvm] r53189 -
	/llvm/trunk/include/llvm/ADT/STLExtras.h
Message-ID: <200807071839.m67IdXpB005598@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 13:39:33 2008
New Revision: 53189

URL: http://llvm.org/viewvc/llvm-project?rev=53189&view=rev
Log:
Don't use std::advance just to increment or decrement by one.

Modified:
    llvm/trunk/include/llvm/ADT/STLExtras.h

Modified: llvm/trunk/include/llvm/ADT/STLExtras.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/STLExtras.h?rev=53189&r1=53188&r2=53189&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/STLExtras.h (original)
+++ llvm/trunk/include/llvm/ADT/STLExtras.h Mon Jul  7 13:39:33 2008
@@ -137,8 +137,7 @@
 template <typename ItTy>
 inline ItTy next(ItTy it)
 {
-  std::advance(it, 1);
-  return it;
+  return ++it;
 }
 
 template <typename ItTy, typename Dist>
@@ -151,8 +150,7 @@
 template <typename ItTy>
 inline ItTy prior(ItTy it)
 {
-  std::advance(it, -1);
-  return it;
+  return --it;
 }
 
 //===----------------------------------------------------------------------===//




From gohman at apple.com  Mon Jul  7 13:43:32 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 18:43:32 -0000
Subject: [llvm-commits] [llvm] r53190 - /llvm/trunk/include/llvm/ADT/ilist.h
Message-ID: <200807071843.m67IhW1d005713@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 13:43:32 2008
New Revision: 53190

URL: http://llvm.org/viewvc/llvm-project?rev=53190&view=rev
Log:
Make ilist noncopyable too.

Modified:
    llvm/trunk/include/llvm/ADT/ilist.h

Modified: llvm/trunk/include/llvm/ADT/ilist.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ilist.h?rev=53190&r1=53189&r2=53190&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/ilist.h (original)
+++ llvm/trunk/include/llvm/ADT/ilist.h Mon Jul  7 13:43:32 2008
@@ -256,6 +256,12 @@
 
   static bool op_less(NodeTy &L, NodeTy &R) { return L < R; }
   static bool op_equal(NodeTy &L, NodeTy &R) { return L == R; }
+
+  // No fundamental reason why iplist can't by copyable, but the default
+  // copy/copy-assign won't do.
+  iplist(const iplist &);         // do not implement
+  void operator=(const iplist &); // do not implement
+
 public:
   typedef NodeTy *pointer;
   typedef const NodeTy *const_pointer;




From bruno.cardoso at gmail.com  Mon Jul  7 14:11:25 2008
From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes)
Date: Mon, 07 Jul 2008 19:11:25 -0000
Subject: [llvm-commits] [llvm] r53192 - in /llvm/trunk/lib/Target/Mips:
 MipsISelLowering.cpp MipsInstrFPU.td
Message-ID: <200807071911.m67JBQDO006732@zion.cs.uiuc.edu>

Author: bruno
Date: Mon Jul  7 14:11:24 2008
New Revision: 53192

URL: http://llvm.org/viewvc/llvm-project?rev=53192&view=rev
Log:
fixed 32-bit fp_to_sint pattern

Modified:
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
    llvm/trunk/lib/Target/Mips/MipsInstrFPU.td

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=53192&r1=53191&r2=53192&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Mon Jul  7 14:11:24 2008
@@ -82,20 +82,24 @@
   setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
   setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
 
-  if (Subtarget->isSingleFloat()) 
-    setOperationAction(ISD::SELECT_CC, MVT::f64, Expand);
-
   // Load extented operations for i1 types must be promoted 
   setLoadXAction(ISD::EXTLOAD,  MVT::i1,  Promote);
   setLoadXAction(ISD::ZEXTLOAD, MVT::i1,  Promote);
   setLoadXAction(ISD::SEXTLOAD, MVT::i1,  Promote);
 
   // Mips does not have these NodeTypes below.
-  setOperationAction(ISD::BR_JT,     MVT::Other, Expand);
-  setOperationAction(ISD::BR_CC,     MVT::Other, Expand);
-  setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
-  setOperationAction(ISD::SELECT,    MVT::i32,   Expand);
-  setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand);
+  setConvertAction(MVT::f64, MVT::f32, Expand);
+
+  setOperationAction(ISD::BR_JT,             MVT::Other, Expand);
+  setOperationAction(ISD::BR_CC,             MVT::Other, Expand);
+  setOperationAction(ISD::SELECT_CC,         MVT::Other, Expand);
+  setOperationAction(ISD::SELECT,            MVT::i32,   Expand);
+  setOperationAction(ISD::UINT_TO_FP,        MVT::i32,   Expand);
+  setOperationAction(ISD::FP_TO_UINT,        MVT::i32,   Expand);
+  setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1,    Expand);
+
+  if (Subtarget->isSingleFloat()) 
+    setOperationAction(ISD::SELECT_CC, MVT::f64, Expand);
 
   if (!Subtarget->isAllegrex()) {
     setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8, Expand);

Modified: llvm/trunk/lib/Target/Mips/MipsInstrFPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrFPU.td?rev=53192&r1=53191&r2=53192&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrFPU.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrFPU.td Mon Jul  7 14:11:24 2008
@@ -291,6 +291,6 @@
 //===----------------------------------------------------------------------===//
 def : Pat<(f32 (sint_to_fp CPURegs:$src)), (CVTS_W32 (MTC1 CPURegs:$src))>;
 def : Pat<(f64 (sint_to_fp CPURegs:$src)), (CVTD_W32 (MTC1 CPURegs:$src))>;
-def : Pat<(i32 (fp_to_sint FGR32:$src)), (MFC1 (CVTW_SO32 FGR32:$src))>;
-def : Pat<(i32 (fp_to_sint AFGR32:$src)), (MFC1 (CVTW_AS32 AFGR32:$src))>;
+def : Pat<(i32 (fp_to_sint FGR32:$src)), (MFC1 (TRUNC_W_SO32 FGR32:$src))>;
+def : Pat<(i32 (fp_to_sint AFGR32:$src)), (MFC1 (TRUNC_W_AS32 AFGR32:$src))>;
 




From evan.cheng at apple.com  Mon Jul  7 14:51:48 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 07 Jul 2008 19:51:48 -0000
Subject: [llvm-commits] [llvm] r53193 - in /llvm/trunk:
 lib/Transforms/Scalar/LoopStrengthReduce.cpp
 test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll
Message-ID: <200807071951.m67JprCS008169@zion.cs.uiuc.edu>

Author: evancheng
Date: Mon Jul  7 14:51:32 2008
New Revision: 53193

URL: http://llvm.org/viewvc/llvm-project?rev=53193&view=rev
Log:
Fix two serious LSR bugs.
1. LSR runOnLoop is always returning false regardless if any transformation is made.
2. AddUsersIfInteresting can create new instructions that are added to DeadInsts. But there is a later early exit which prevents them from being freed.

Added:
    llvm/trunk/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll
Modified:
    llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=53193&r1=53192&r2=53193&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Mon Jul  7 14:51:32 2008
@@ -1737,6 +1737,7 @@
   // live ranges for the IV correctly.
   CondUse->Offset = SE->getMinusSCEV(CondUse->Offset, *CondStride);
   CondUse->isUseOfPostIncrementedValue = true;
+  Changed = true;
 }
 
 bool LoopStrengthReduce::runOnLoop(Loop *L, LPPassManager &LPM) {
@@ -1754,49 +1755,48 @@
   for (BasicBlock::iterator I = L->getHeader()->begin(); isa<PHINode>(I); ++I)
     AddUsersIfInteresting(I, L, Processed);
 
-  // If we have nothing to do, return.
-  if (IVUsesByStride.empty()) return false;
-
-  // Optimize induction variables.  Some indvar uses can be transformed to use
-  // strides that will be needed for other purposes.  A common example of this
-  // is the exit test for the loop, which can often be rewritten to use the
-  // computation of some other indvar to decide when to terminate the loop.
-  OptimizeIndvars(L);
-
-
-  // FIXME: We can widen subreg IV's here for RISC targets.  e.g. instead of
-  // doing computation in byte values, promote to 32-bit values if safe.
-
-  // FIXME: Attempt to reuse values across multiple IV's.  In particular, we
-  // could have something like "for(i) { foo(i*8); bar(i*16) }", which should be
-  // codegened as "for (j = 0;; j+=8) { foo(j); bar(j+j); }" on X86/PPC.  Need
-  // to be careful that IV's are all the same type.  Only works for intptr_t
-  // indvars.
-
-  // If we only have one stride, we can more aggressively eliminate some things.
-  bool HasOneStride = IVUsesByStride.size() == 1;
+  if (!IVUsesByStride.empty()) {
+    // Optimize induction variables.  Some indvar uses can be transformed to use
+    // strides that will be needed for other purposes.  A common example of this
+    // is the exit test for the loop, which can often be rewritten to use the
+    // computation of some other indvar to decide when to terminate the loop.
+    OptimizeIndvars(L);
+
+    // FIXME: We can widen subreg IV's here for RISC targets.  e.g. instead of
+    // doing computation in byte values, promote to 32-bit values if safe.
+
+    // FIXME: Attempt to reuse values across multiple IV's.  In particular, we
+    // could have something like "for(i) { foo(i*8); bar(i*16) }", which should
+    // be codegened as "for (j = 0;; j+=8) { foo(j); bar(j+j); }" on X86/PPC.
+    // Need to be careful that IV's are all the same type.  Only works for
+    // intptr_t indvars.
+
+    // If we only have one stride, we can more aggressively eliminate some
+    // things.
+    bool HasOneStride = IVUsesByStride.size() == 1;
 
 #ifndef NDEBUG
-  DOUT << "\nLSR on ";
-  DEBUG(L->dump());
+    DOUT << "\nLSR on ";
+    DEBUG(L->dump());
 #endif
 
-  // IVsByStride keeps IVs for one particular loop.
-  assert(IVsByStride.empty() && "Stale entries in IVsByStride?");
+    // IVsByStride keeps IVs for one particular loop.
+    assert(IVsByStride.empty() && "Stale entries in IVsByStride?");
 
-  // Sort the StrideOrder so we process larger strides first.
-  std::stable_sort(StrideOrder.begin(), StrideOrder.end(), StrideCompare());
+    // Sort the StrideOrder so we process larger strides first.
+    std::stable_sort(StrideOrder.begin(), StrideOrder.end(), StrideCompare());
 
-  // Note: this processes each stride/type pair individually.  All users passed
-  // into StrengthReduceStridedIVUsers have the same type AND stride.  Also,
-  // note that we iterate over IVUsesByStride indirectly by using StrideOrder.
-  // This extra layer of indirection makes the ordering of strides deterministic
-  // - not dependent on map order.
-  for (unsigned Stride = 0, e = StrideOrder.size(); Stride != e; ++Stride) {
-    std::map<SCEVHandle, IVUsersOfOneStride>::iterator SI = 
-      IVUsesByStride.find(StrideOrder[Stride]);
-    assert(SI != IVUsesByStride.end() && "Stride doesn't exist!");
-    StrengthReduceStridedIVUsers(SI->first, SI->second, L, HasOneStride);
+    // Note: this processes each stride/type pair individually.  All users
+    // passed into StrengthReduceStridedIVUsers have the same type AND stride.
+    // Also, note that we iterate over IVUsesByStride indirectly by using
+    // StrideOrder. This extra layer of indirection makes the ordering of
+    // strides deterministic - not dependent on map order.
+    for (unsigned Stride = 0, e = StrideOrder.size(); Stride != e; ++Stride) {
+      std::map<SCEVHandle, IVUsersOfOneStride>::iterator SI = 
+        IVUsesByStride.find(StrideOrder[Stride]);
+      assert(SI != IVUsesByStride.end() && "Stride doesn't exist!");
+      StrengthReduceStridedIVUsers(SI->first, SI->second, L, HasOneStride);
+    }
   }
 
   // We're done analyzing this loop; release all the state we built up for it.
@@ -1839,5 +1839,5 @@
     DeleteTriviallyDeadInstructions(DeadInsts);
   }
 
-  return false;
+  return Changed;
 }

Added: llvm/trunk/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll?rev=53193&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll Mon Jul  7 14:51:32 2008
@@ -0,0 +1,99 @@
+; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9
+
+	%struct.ogg_stream_state = type { i8*, i32, i32, i32, i32*, i64*, i32, i32, i32, i32, [282 x i8], i32, i32, i32, i32, i32, i64, i64 }
+	%struct.res_state = type { i32, i32, i32, i32, float*, float*, i32, i32 }
+	%struct.vorbis_comment = type { i8**, i32*, i32, i8* }
+
+declare i32 @strlen(i8*) nounwind readonly 
+
+define i32 @res_init(%struct.res_state* %state, i32 %channels, i32 %outfreq, i32 %infreq, i32 %op1, ...) nounwind  {
+entry:
+	br i1 false, label %bb95, label %bb
+
+bb:		; preds = %entry
+	br i1 false, label %bb95, label %bb24
+
+bb24:		; preds = %bb
+	br i1 false, label %bb40.preheader, label %bb26
+
+bb26:		; preds = %bb24
+	ret i32 -1
+
+bb40.preheader:		; preds = %bb24
+	br i1 false, label %bb39, label %bb49.outer
+
+bb39:		; preds = %bb39, %bb40.preheader
+	shl i32 0, 1		; <i32>:0 [#uses=0]
+	br i1 false, label %bb39, label %bb49.outer
+
+bb49.outer:		; preds = %bb39, %bb40.preheader
+	getelementptr %struct.res_state* %state, i32 0, i32 3		; <i32*>:1 [#uses=0]
+	getelementptr %struct.res_state* %state, i32 0, i32 7		; <i32*>:2 [#uses=0]
+	%base10.1 = select i1 false, float* null, float* null		; <float*> [#uses=1]
+	br label %bb74
+
+bb69:		; preds = %bb74
+	br label %bb71
+
+bb71:		; preds = %bb74, %bb69
+	store float 0.000000e+00, float* null, align 4
+	add i32 0, 1		; <i32>:3 [#uses=1]
+	%indvar.next137 = add i32 %indvar136, 1		; <i32> [#uses=1]
+	br i1 false, label %bb74, label %bb73
+
+bb73:		; preds = %bb71
+	%.rec = add i32 %base10.2.ph.rec, 1		; <i32> [#uses=2]
+	getelementptr float* %base10.1, i32 %.rec		; <float*>:4 [#uses=1]
+	br label %bb74
+
+bb74:		; preds = %bb73, %bb71, %bb49.outer
+	%N13.1.ph = phi i32 [ 0, %bb49.outer ], [ 0, %bb73 ], [ %N13.1.ph, %bb71 ]		; <i32> [#uses=1]
+	%dest12.2.ph = phi float* [ null, %bb49.outer ], [ %4, %bb73 ], [ %dest12.2.ph, %bb71 ]		; <float*> [#uses=1]
+	%x8.0.ph = phi i32 [ 0, %bb49.outer ], [ %3, %bb73 ], [ %x8.0.ph, %bb71 ]		; <i32> [#uses=1]
+	%base10.2.ph.rec = phi i32 [ 0, %bb49.outer ], [ %.rec, %bb73 ], [ %base10.2.ph.rec, %bb71 ]		; <i32> [#uses=2]
+	%indvar136 = phi i32 [ %indvar.next137, %bb71 ], [ 0, %bb73 ], [ 0, %bb49.outer ]		; <i32> [#uses=1]
+	br i1 false, label %bb71, label %bb69
+
+bb95:		; preds = %bb, %entry
+	ret i32 -1
+}
+
+define i32 @read_resampled(i8* %d, float** %buffer, i32 %samples) nounwind  {
+entry:
+	br i1 false, label %bb17.preheader, label %bb30
+
+bb17.preheader:		; preds = %entry
+	load i32* null, align 4		; <i32>:0 [#uses=0]
+	br label %bb16
+
+bb16:		; preds = %bb16, %bb17.preheader
+	%i1.036 = phi i32 [ 0, %bb17.preheader ], [ %1, %bb16 ]		; <i32> [#uses=1]
+	add i32 %i1.036, 1		; <i32>:1 [#uses=2]
+	icmp ult i32 %1, 0		; <i1>:2 [#uses=0]
+	br label %bb16
+
+bb30:		; preds = %entry
+	ret i32 0
+}
+
+define i32 @ogg_stream_reset_serialno(%struct.ogg_stream_state* %os, i32 %serialno) nounwind  {
+entry:
+	unreachable
+}
+
+define void @vorbis_lsp_to_curve(float* %curve, i32* %map, i32 %n, i32 %ln, float* %lsp, i32 %m, float %amp, float %ampoffset) nounwind  {
+entry:
+	unreachable
+}
+
+define i32 @vorbis_comment_query_count(%struct.vorbis_comment* %vc, i8* %tag) nounwind  {
+entry:
+	%strlen = call i32 @strlen( i8* null )		; <i32> [#uses=1]
+	%endptr = getelementptr i8* null, i32 %strlen		; <i8*> [#uses=0]
+	unreachable
+}
+
+define fastcc i32 @push(%struct.res_state* %state, float* %pool, i32* %poolfill, i32* %offset, float* %dest, i32 %dststep, float* %source, i32 %srcstep, i32 %srclen) nounwind  {
+entry:
+	unreachable
+}




From gohman at apple.com  Mon Jul  7 14:55:48 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 19:55:48 -0000
Subject: [llvm-commits] [llvm] r53194 -
	/llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp
Message-ID: <200807071955.m67JtoY3008342@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 14:55:35 2008
New Revision: 53194

URL: http://llvm.org/viewvc/llvm-project?rev=53194&view=rev
Log:
Assert that all MachineInstrs update PhysRegUseDefLists in
their cleanup code. 

Modified:
    llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp

Modified: llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp?rev=53194&r1=53193&r2=53194&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp Mon Jul  7 14:55:35 2008
@@ -27,6 +27,9 @@
 #ifndef NDEBUG
   for (unsigned i = 0, e = VRegInfo.size(); i != e; ++i)
     assert(VRegInfo[i].second == 0 && "Vreg use list non-empty still?");
+  for (unsigned i = 0, e = UsedPhysRegs.size(); i != e; ++i)
+    assert(!PhysRegUseDefLists[i] &&
+           "PhysRegUseDefLists has entries after all instructions are deleted");
 #endif
   delete [] PhysRegUseDefLists;
 }




From gohman at apple.com  Mon Jul  7 15:05:19 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 20:05:19 -0000
Subject: [llvm-commits] [llvm] r53195 -
	/llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h
Message-ID: <200807072005.m67K5JO9008649@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 15:05:04 2008
New Revision: 53195

URL: http://llvm.org/viewvc/llvm-project?rev=53195&view=rev
Log:
Shrink MachineMemOperand by storing the alignment in log form
and rearranging the fields.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h

Modified: llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h?rev=53195&r1=53194&r2=53195&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h Mon Jul  7 15:05:04 2008
@@ -16,6 +16,8 @@
 #ifndef LLVM_CODEGEN_MEMOPERAND_H
 #define LLVM_CODEGEN_MEMOPERAND_H
 
+#include "llvm/Support/MathExtras.h"
+
 namespace llvm {
 
 class Value;
@@ -29,11 +31,10 @@
 /// that aren't explicit in the regular LLVM IR.
 ///
 class MachineMemOperand {
-  const Value *V;
-  unsigned int Flags;
   int64_t Offset;
   uint64_t Size;
-  unsigned int Alignment;
+  const Value *V;
+  unsigned int Flags;
 
 public:
   /// Flags values. These may be or'd together.
@@ -50,7 +51,7 @@
   /// specified address Value, flags, offset, size, and alignment.
   MachineMemOperand(const Value *v, unsigned int f, int64_t o, uint64_t s,
                     unsigned int a)
-    : V(v), Flags(f), Offset(o), Size(s), Alignment(a) {}
+    : Offset(o), Size(s), V(v), Flags((f & 7) | ((Log2_32(a) + 1) << 3)) {}
 
   /// getValue - Return the base address of the memory access.
   /// Special values are PseudoSourceValue::FPRel, PseudoSourceValue::SPRel,
@@ -59,7 +60,7 @@
   const Value *getValue() const { return V; }
 
   /// getFlags - Return the raw flags of the source value, \see MemOperandFlags.
-  unsigned int getFlags() const { return Flags; }
+  unsigned int getFlags() const { return Flags & 7; }
 
   /// getOffset - For normal values, this is a byte offset added to the base
   /// address. For PseudoSourceValue::FPRel values, this is the FrameIndex
@@ -71,7 +72,7 @@
 
   /// getAlignment - Return the minimum known alignment in bytes of the
   /// memory reference.
-  unsigned int getAlignment() const { return Alignment; }
+  unsigned int getAlignment() const { return (1u << (Flags >> 3)) >> 1; }
 
   bool isLoad() const { return Flags & MOLoad; }
   bool isStore() const { return Flags & MOStore; }




From gohman at apple.com  Mon Jul  7 15:06:07 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 20:06:07 -0000
Subject: [llvm-commits] [llvm] r53196 - in /llvm/trunk/lib:
 CodeGen/RegisterScavenging.cpp Target/ARM/ARMAsmPrinter.cpp
Message-ID: <200807072006.m67K67Fb008684@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 15:06:06 2008
New Revision: 53196

URL: http://llvm.org/viewvc/llvm-project?rev=53196&view=rev
Log:
Minor const-correctness fixes.

Modified:
    llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
    llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp

Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=53196&r1=53195&r2=53196&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Mon Jul  7 15:06:06 2008
@@ -81,7 +81,7 @@
 }
 
 void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
-  const MachineFunction &MF = *mbb->getParent();
+  MachineFunction &MF = *mbb->getParent();
   const TargetMachine &TM = MF.getTarget();
   TII = TM.getInstrInfo();
   TRI = TM.getRegisterInfo();

Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=53196&r1=53195&r2=53196&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Mon Jul  7 15:06:06 2008
@@ -694,7 +694,7 @@
     JTEntryDirective = TAI->getData32bitsDirective();
 
   const MachineFunction *MF = MI->getParent()->getParent();
-  MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
+  const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
   const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
   const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
   bool UseSet= TAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;




From gohman at apple.com  Mon Jul  7 15:08:07 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 20:08:07 -0000
Subject: [llvm-commits] [llvm] r53197 - /llvm/trunk/lib/CodeGen/Collector.cpp
Message-ID: <200807072008.m67K8A7B008756@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 15:08:05 2008
New Revision: 53197

URL: http://llvm.org/viewvc/llvm-project?rev=53197&view=rev
Log:
Use of operator* is redundant and confusing here.

Modified:
    llvm/trunk/lib/CodeGen/Collector.cpp

Modified: llvm/trunk/lib/CodeGen/Collector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/Collector.cpp?rev=53197&r1=53196&r2=53197&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/Collector.cpp (original)
+++ llvm/trunk/lib/CodeGen/Collector.cpp Mon Jul  7 15:08:05 2008
@@ -360,7 +360,7 @@
     for (MachineBasicBlock::iterator MI = BBI->begin(),
                                      ME = BBI->end(); MI != ME; ++MI)
       if (MI->getDesc().isCall())
-        VisitCallPoint(*MI);
+        VisitCallPoint(MI);
 }
 
 void MachineCodeAnalysis::FindStackOffsets(MachineFunction &MF) {




From gohman at apple.com  Mon Jul  7 15:09:12 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 20:09:12 -0000
Subject: [llvm-commits] [llvm] r53198 -
	/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
Message-ID: <200807072009.m67K9Dr0008822@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 15:09:12 2008
New Revision: 53198

URL: http://llvm.org/viewvc/llvm-project?rev=53198&view=rev
Log:
Simplify this use of BuildMI. This is also in preparation for
pool-allocating MachineInstrs.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=53198&r1=53197&r2=53198&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Mon Jul  7 15:09:12 2008
@@ -409,7 +409,6 @@
   if (PerformTailCallOpt && I->getOpcode() == PPC::ADJCALLSTACKUP) {
     // Add (actually substract) back the amount the callee popped on return.
     if (int CalleeAmt =  I->getOperand(1).getImm()) {
-      MachineInstr * New = NULL;
       bool is64Bit = Subtarget.isPPC64();
       CalleeAmt *= -1;
       unsigned StackReg = is64Bit ? PPC::X1 : PPC::R1;
@@ -420,9 +419,8 @@
       unsigned ORIInstr = is64Bit ? PPC::ORI8 : PPC::ORI;
 
       if (isInt16(CalleeAmt)) {
-        New = BuildMI(TII.get(ADDIInstr), StackReg).addReg(StackReg).
+        BuildMI(MBB, I, TII.get(ADDIInstr), StackReg).addReg(StackReg).
           addImm(CalleeAmt);
-        MBB.insert(I, New);
       } else {
         MachineBasicBlock::iterator MBBI = I;
         BuildMI(MBB, MBBI, TII.get(LISInstr), TmpReg)




From clattner at apple.com  Mon Jul  7 15:10:25 2008
From: clattner at apple.com (Chris Lattner)
Date: Mon, 7 Jul 2008 13:10:25 -0700
Subject: [llvm-commits] [llvm] r53195 -
	/llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h
In-Reply-To: <200807072005.m67K5JO9008649@zion.cs.uiuc.edu>
References: <200807072005.m67K5JO9008649@zion.cs.uiuc.edu>
Message-ID: <1ED3DCDE-E0C0-40CD-B3E5-3763191E6BC2@apple.com>

On Jul 7, 2008, at 1:05 PM, Dan Gohman wrote:
> URL: http://llvm.org/viewvc/llvm-project?rev=53195&view=rev
> Log:
> Shrink MachineMemOperand by storing the alignment in log form
> and rearranging the fields.

>
> +#include "llvm/Support/MathExtras.h"

Hey Dan,

Would it be reasonable to move the ctor out of line to avoid the  
#include?

-Chris



From clattner at apple.com  Mon Jul  7 15:12:27 2008
From: clattner at apple.com (Chris Lattner)
Date: Mon, 7 Jul 2008 13:12:27 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53113 -
	/llvm-gcc-4.2/trunk/gcc/config/darwin.h
In-Reply-To: <8C608FC2-A280-4141-A0BB-0C9D163E89B4@apple.com>
References: <200807032209.m63M9OE7026032@zion.cs.uiuc.edu>
	<FEF76249-0703-46A4-A868-31AE63791019@apple.com>
	<FEB3885B-4F4E-420C-9E83-4B9FDF41DC89@apple.com>
	<549A4A0A-7767-4A93-988F-FDF2CE0FEF85@apple.com>
	<8C608FC2-A280-4141-A0BB-0C9D163E89B4@apple.com>
Message-ID: <5A3E16AB-09EC-48A5-A238-AA34835C4897@apple.com>


On Jul 7, 2008, at 10:48 AM, Eric Christopher wrote:

>
> On Jul 7, 2008, at 10:19 AM, Evan Cheng wrote:
>
>> It would be nice if someone with configure foo can help with this.
>> Perhaps Eric?
>
> Sure. There are a few ways you can go about this:

What fix is required here?  I don't understand the problem.

If a user invokes 'llvm-gcc -mllvm -foo x.o' and the linker doesn't  
support llvm LTO options, why does it matter if llvm-gcc or ld rejects  
them?

-Chris



From clattner at apple.com  Mon Jul  7 15:13:31 2008
From: clattner at apple.com (Chris Lattner)
Date: Mon, 7 Jul 2008 13:13:31 -0700
Subject: [llvm-commits] [llvm] r53177 - in /llvm/trunk:
	include/llvm/ADT/DenseMap.h include/llvm/ADT/DenseSet.h
	lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
	lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
	lib/Linker/LinkModules.cpp lib/Target/X86/X86InstrInfo.cpp
	lib/Transforms/Scalar/InstructionCombining.cpp
In-Reply-To: <200807071746.m67HkOWv003793@zion.cs.uiuc.edu>
References: <200807071746.m67HkOWv003793@zion.cs.uiuc.edu>
Message-ID: <FADABFC9-3C02-4486-BF72-7B19973193B6@apple.com>


On Jul 7, 2008, at 10:46 AM, Dan Gohman wrote:

> Author: djg
> Date: Mon Jul  7 12:46:23 2008
> New Revision: 53177
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53177&view=rev
> Log:
> Make DenseMap's insert return a pair, to more closely resemble  
> std::map.

This is fine, but be careful: it is far easier to invalidate a  
densemap iterator than an std::map iterator.

-Chris



From echristo at apple.com  Mon Jul  7 15:14:22 2008
From: echristo at apple.com (Eric Christopher)
Date: Mon, 7 Jul 2008 13:14:22 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53113 -
	/llvm-gcc-4.2/trunk/gcc/config/darwin.h
In-Reply-To: <5A3E16AB-09EC-48A5-A238-AA34835C4897@apple.com>
References: <200807032209.m63M9OE7026032@zion.cs.uiuc.edu>
	<FEF76249-0703-46A4-A868-31AE63791019@apple.com>
	<FEB3885B-4F4E-420C-9E83-4B9FDF41DC89@apple.com>
	<549A4A0A-7767-4A93-988F-FDF2CE0FEF85@apple.com>
	<8C608FC2-A280-4141-A0BB-0C9D163E89B4@apple.com>
	<5A3E16AB-09EC-48A5-A238-AA34835C4897@apple.com>
Message-ID: <CF3A59FE-F567-4437-9BB1-848C414E600A@apple.com>


On Jul 7, 2008, at 1:12 PM, Chris Lattner wrote:

>
> On Jul 7, 2008, at 10:48 AM, Eric Christopher wrote:
>
>>
>> On Jul 7, 2008, at 10:19 AM, Evan Cheng wrote:
>>
>>> It would be nice if someone with configure foo can help with this.
>>> Perhaps Eric?
>>
>> Sure. There are a few ways you can go about this:
>
> What fix is required here?  I don't understand the problem.
>
> If a user invokes 'llvm-gcc -mllvm -foo x.o' and the linker doesn't
> support llvm LTO options, why does it matter if llvm-gcc or ld rejects
> them?

I was under the impression that llvm-gcc was automatically inserting
the option whether or not it was passed on the command line?

If it's going to be a command line option to llvm-gcc it should probably
be documented - otherwise it should go under -Wl,<option> for linker
options.

-eric


From clattner at apple.com  Mon Jul  7 15:14:23 2008
From: clattner at apple.com (Chris Lattner)
Date: Mon, 7 Jul 2008 13:14:23 -0700
Subject: [llvm-commits] [llvm] r53167 -
	/llvm/trunk/lib/Analysis/ScalarEvolution.cpp
In-Reply-To: <200807070615.m676FoKg003319@zion.cs.uiuc.edu>
References: <200807070615.m676FoKg003319@zion.cs.uiuc.edu>
Message-ID: <2B8439CC-5CE8-4E78-98A6-45760710B0B0@apple.com>


On Jul 6, 2008, at 11:15 PM, Nick Lewycky wrote:

> Author: nicholas
> Date: Mon Jul  7 01:15:49 2008
> New Revision: 53167
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53167&view=rev
> Log:
> Handle 'lshr' instruction with SCEVUDiv object.
> Comment the xor %x, -1 case.

Does the scev expander currently handle these cases?

-Chris

>
>
> Modified:
>    llvm/trunk/lib/Analysis/ScalarEvolution.cpp
>
> Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=53167&r1=53166&r2=53167&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
> +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Mon Jul  7 01:15:49  
> 2008
> @@ -1742,12 +1742,14 @@
>     }
>     break;
>   case Instruction::Xor:
> -    // If the RHS of the xor is a signbit, then this is just an add.
> -    // Instcombine turns add of signbit into xor as a strength  
> reduction step.
>     if (ConstantInt *CI = dyn_cast<ConstantInt>(U->getOperand(1))) {
> +      // If the RHS of the xor is a signbit, then this is just an  
> add.
> +      // Instcombine turns add of signbit into xor as a strength  
> reduction step.
>       if (CI->getValue().isSignBit())
>         return SE.getAddExpr(getSCEV(U->getOperand(0)),
>                              getSCEV(U->getOperand(1)));
> +
> +      // If the RHS of xor is -1, then this is a not operation.
>       else if (CI->isAllOnesValue())
>         return SE.getNotSCEV(getSCEV(U->getOperand(0)));
>     }
> @@ -1763,6 +1765,16 @@
>     }
>     break;
>
> +  case Instruction::LShr:
> +    // Turn logical shift right of a constant into a unsigned divide.
> +    if (ConstantInt *SA = dyn_cast<ConstantInt>(U->getOperand(1))) {
> +      uint32_t BitWidth = cast<IntegerType>(V->getType())- 
> >getBitWidth();
> +      Constant *X = ConstantInt::get(
> +        APInt(BitWidth, 1).shl(SA->getLimitedValue(BitWidth)));
> +      return SE.getUDivExpr(getSCEV(U->getOperand(0)), getSCEV(X));
> +    }
> +    break;
> +
>   case Instruction::Trunc:
>     return SE.getTruncateExpr(getSCEV(U->getOperand(0)), U- 
> >getType());
>
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From dpatel at apple.com  Mon Jul  7 15:30:06 2008
From: dpatel at apple.com (Devang Patel)
Date: Mon, 07 Jul 2008 20:30:06 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53199 -
	/llvm-gcc-4.2/trunk/gcc/doc/invoke.texi
Message-ID: <200807072030.m67KUBxk009875@zion.cs.uiuc.edu>

Author: dpatel
Date: Mon Jul  7 15:29:47 2008
New Revision: 53199

URL: http://llvm.org/viewvc/llvm-project?rev=53199&view=rev
Log:

Document -mllvm.

Modified:
    llvm-gcc-4.2/trunk/gcc/doc/invoke.texi

Modified: llvm-gcc-4.2/trunk/gcc/doc/invoke.texi
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/doc/invoke.texi?rev=53199&r1=53198&r2=53199&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/doc/invoke.texi (original)
+++ llvm-gcc-4.2/trunk/gcc/doc/invoke.texi Mon Jul  7 15:29:47 2008
@@ -355,6 +355,8 @@
 -p  -pg  -print-file-name=@var{library}  -print-libgcc-file-name @gol
 -print-multi-directory  -print-multi-lib @gol
 -print-prog-name=@var{program}  -print-search-dirs  -Q @gol
+ at c LLVM LOCAL
+-mllvm @var{string}
 -save-temps  -time}
 
 @item Optimization Options
@@ -4843,6 +4845,13 @@
 The corresponding intermediate file may be obtained by renaming the
 source file before using @option{-save-temps}.
 
+ at c LLVM LOCAL begin
+ at -mllvm @var{string}
+ at optindex mllvm
+This options provides a way to supply llvm optimization and code
+generation debugging options to LLVM component directly. 
+ at c LLVM LOCAL end
+
 @item -time
 @opindex time
 Report the CPU time taken by each subprocess in the compilation




From evan.cheng at apple.com  Mon Jul  7 15:30:59 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 7 Jul 2008 13:30:59 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53113 -
	/llvm-gcc-4.2/trunk/gcc/config/darwin.h
In-Reply-To: <5A3E16AB-09EC-48A5-A238-AA34835C4897@apple.com>
References: <200807032209.m63M9OE7026032@zion.cs.uiuc.edu>
	<FEF76249-0703-46A4-A868-31AE63791019@apple.com>
	<FEB3885B-4F4E-420C-9E83-4B9FDF41DC89@apple.com>
	<549A4A0A-7767-4A93-988F-FDF2CE0FEF85@apple.com>
	<8C608FC2-A280-4141-A0BB-0C9D163E89B4@apple.com>
	<5A3E16AB-09EC-48A5-A238-AA34835C4897@apple.com>
Message-ID: <930CF270-0730-47D5-B257-A46DD7A7B61D@apple.com>


On Jul 7, 2008, at 1:12 PM, Chris Lattner wrote:

>
> On Jul 7, 2008, at 10:48 AM, Eric Christopher wrote:
>
>>
>> On Jul 7, 2008, at 10:19 AM, Evan Cheng wrote:
>>
>>> It would be nice if someone with configure foo can help with this.
>>> Perhaps Eric?
>>
>> Sure. There are a few ways you can go about this:
>
> What fix is required here?  I don't understand the problem.
>
> If a user invokes 'llvm-gcc -mllvm -foo x.o' and the linker doesn't  
> support llvm LTO options, why does it matter if llvm-gcc or ld  
> rejects them?

Users with old linker may expect the -mllvm options are passed to cc1  
only. It could be non-user-friendly if the linker than outputs an  
error message.  Like Eric said, perhaps it's better to make it  
explicit the options are meant for the linker (e.g. -mllvm-lto -foo)?

Evan

>
>
> -Chris
>



From gohman at apple.com  Mon Jul  7 15:32:05 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 20:32:05 -0000
Subject: [llvm-commits] [llvm] r53200 - in /llvm/trunk:
 include/llvm/CodeGen/MachineMemOperand.h lib/CodeGen/MachineInstr.cpp
Message-ID: <200807072032.m67KW66b009966@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 15:32:02 2008
New Revision: 53200

URL: http://llvm.org/viewvc/llvm-project?rev=53200&view=rev
Log:
Move MachineMemOperand's constructor out of line, to avoid a
#include dependency on Support/MathExtras.h in the header file.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h
    llvm/trunk/lib/CodeGen/MachineInstr.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h?rev=53200&r1=53199&r2=53200&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h Mon Jul  7 15:32:02 2008
@@ -16,8 +16,6 @@
 #ifndef LLVM_CODEGEN_MEMOPERAND_H
 #define LLVM_CODEGEN_MEMOPERAND_H
 
-#include "llvm/Support/MathExtras.h"
-
 namespace llvm {
 
 class Value;
@@ -50,8 +48,7 @@
   /// MachineMemOperand - Construct an MachineMemOperand object with the
   /// specified address Value, flags, offset, size, and alignment.
   MachineMemOperand(const Value *v, unsigned int f, int64_t o, uint64_t s,
-                    unsigned int a)
-    : Offset(o), Size(s), V(v), Flags((f & 7) | ((Log2_32(a) + 1) << 3)) {}
+                    unsigned int a);
 
   /// getValue - Return the base address of the memory access.
   /// Special values are PseudoSourceValue::FPRel, PseudoSourceValue::SPRel,

Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=53200&r1=53199&r2=53200&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Mon Jul  7 15:32:02 2008
@@ -23,6 +23,7 @@
 #include "llvm/Target/TargetInstrDesc.h"
 #include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Support/LeakDetector.h"
+#include "llvm/Support/MathExtras.h"
 #include "llvm/Support/Streams.h"
 #include <ostream>
 using namespace llvm;
@@ -239,6 +240,16 @@
 }
 
 //===----------------------------------------------------------------------===//
+// MachineMemOperand Implementation
+//===----------------------------------------------------------------------===//
+
+MachineMemOperand::MachineMemOperand(const Value *v, unsigned int f,
+                                     int64_t o, uint64_t s, unsigned int a)
+  : Offset(o), Size(s), V(v),
+    Flags((f & 7) | ((Log2_32(a) + 1) << 3)) {
+}
+
+//===----------------------------------------------------------------------===//
 // MachineInstr Implementation
 //===----------------------------------------------------------------------===//
 




From gohman at apple.com  Mon Jul  7 15:32:43 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 7 Jul 2008 13:32:43 -0700
Subject: [llvm-commits] [llvm] r53195 -
	/llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h
In-Reply-To: <1ED3DCDE-E0C0-40CD-B3E5-3763191E6BC2@apple.com>
References: <200807072005.m67K5JO9008649@zion.cs.uiuc.edu>
	<1ED3DCDE-E0C0-40CD-B3E5-3763191E6BC2@apple.com>
Message-ID: <E9E1DA0D-CE8E-4E30-828D-9DCD578B7339@apple.com>


On Jul 7, 2008, at 1:10 PM, Chris Lattner wrote:

> On Jul 7, 2008, at 1:05 PM, Dan Gohman wrote:
>> URL: http://llvm.org/viewvc/llvm-project?rev=53195&view=rev
>> Log:
>> Shrink MachineMemOperand by storing the alignment in log form
>> and rearranging the fields.
>
>>
>> +#include "llvm/Support/MathExtras.h"
>
> Hey Dan,
>
> Would it be reasonable to move the ctor out of line to avoid the
> #include?


Sure, done.

Dan



From echristo at apple.com  Mon Jul  7 15:34:50 2008
From: echristo at apple.com (Eric Christopher)
Date: Mon, 7 Jul 2008 13:34:50 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53113 -
	/llvm-gcc-4.2/trunk/gcc/config/darwin.h
In-Reply-To: <930CF270-0730-47D5-B257-A46DD7A7B61D@apple.com>
References: <200807032209.m63M9OE7026032@zion.cs.uiuc.edu>
	<FEF76249-0703-46A4-A868-31AE63791019@apple.com>
	<FEB3885B-4F4E-420C-9E83-4B9FDF41DC89@apple.com>
	<549A4A0A-7767-4A93-988F-FDF2CE0FEF85@apple.com>
	<8C608FC2-A280-4141-A0BB-0C9D163E89B4@apple.com>
	<5A3E16AB-09EC-48A5-A238-AA34835C4897@apple.com>
	<930CF270-0730-47D5-B257-A46DD7A7B61D@apple.com>
Message-ID: <D4984125-F872-40DB-9EB0-13CA7AEE45C6@apple.com>


On Jul 7, 2008, at 1:30 PM, Evan Cheng wrote:

>
> On Jul 7, 2008, at 1:12 PM, Chris Lattner wrote:
>
>>
>> On Jul 7, 2008, at 10:48 AM, Eric Christopher wrote:
>>
>>>
>>> On Jul 7, 2008, at 10:19 AM, Evan Cheng wrote:
>>>
>>>> It would be nice if someone with configure foo can help with this.
>>>> Perhaps Eric?
>>>
>>> Sure. There are a few ways you can go about this:
>>
>> What fix is required here?  I don't understand the problem.
>>
>> If a user invokes 'llvm-gcc -mllvm -foo x.o' and the linker doesn't
>> support llvm LTO options, why does it matter if llvm-gcc or ld
>> rejects them?
>
> Users with old linker may expect the -mllvm options are passed to cc1
> only. It could be non-user-friendly if the linker than outputs an
> error message.  Like Eric said, perhaps it's better to make it
> explicit the options are meant for the linker (e.g. -mllvm-lto -foo)?

Yeah, the standard way of doing this via gcc is to do this:

-Wl,-option -Wl,-suboption -Wl,-suboption2

-eric


From clattner at apple.com  Mon Jul  7 15:46:32 2008
From: clattner at apple.com (Chris Lattner)
Date: Mon, 7 Jul 2008 13:46:32 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53113 -
	/llvm-gcc-4.2/trunk/gcc/config/darwin.h
In-Reply-To: <930CF270-0730-47D5-B257-A46DD7A7B61D@apple.com>
References: <200807032209.m63M9OE7026032@zion.cs.uiuc.edu>
	<FEF76249-0703-46A4-A868-31AE63791019@apple.com>
	<FEB3885B-4F4E-420C-9E83-4B9FDF41DC89@apple.com>
	<549A4A0A-7767-4A93-988F-FDF2CE0FEF85@apple.com>
	<8C608FC2-A280-4141-A0BB-0C9D163E89B4@apple.com>
	<5A3E16AB-09EC-48A5-A238-AA34835C4897@apple.com>
	<930CF270-0730-47D5-B257-A46DD7A7B61D@apple.com>
Message-ID: <0B00D75C-5BBB-48BD-B5C7-2258A719C8D1@apple.com>


On Jul 7, 2008, at 1:30 PM, Evan Cheng wrote:

>
> On Jul 7, 2008, at 1:12 PM, Chris Lattner wrote:
>
>>
>> On Jul 7, 2008, at 10:48 AM, Eric Christopher wrote:
>>
>>>
>>> On Jul 7, 2008, at 10:19 AM, Evan Cheng wrote:
>>>
>>>> It would be nice if someone with configure foo can help with this.
>>>> Perhaps Eric?
>>>
>>> Sure. There are a few ways you can go about this:
>>
>> What fix is required here?  I don't understand the problem.
>>
>> If a user invokes 'llvm-gcc -mllvm -foo x.o' and the linker doesn't  
>> support llvm LTO options, why does it matter if llvm-gcc or ld  
>> rejects them?
>
> Users with old linker may expect the -mllvm options are passed to  
> cc1 only. It could be non-user-friendly if the linker than outputs  
> an error message.  Like Eric said, perhaps it's better to make it  
> explicit the options are meant for the linker (e.g. -mllvm-lto -foo)?

Ok, I can see that.  I'm fine with -mllvm-lto, but I don't think we  
should get more complex than that.  This is really just a "compiler  
hacker feature".

-Chris


From echristo at apple.com  Mon Jul  7 15:55:54 2008
From: echristo at apple.com (Eric Christopher)
Date: Mon, 7 Jul 2008 13:55:54 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53113 -
	/llvm-gcc-4.2/trunk/gcc/config/darwin.h
In-Reply-To: <0B00D75C-5BBB-48BD-B5C7-2258A719C8D1@apple.com>
References: <200807032209.m63M9OE7026032@zion.cs.uiuc.edu>
	<FEF76249-0703-46A4-A868-31AE63791019@apple.com>
	<FEB3885B-4F4E-420C-9E83-4B9FDF41DC89@apple.com>
	<549A4A0A-7767-4A93-988F-FDF2CE0FEF85@apple.com>
	<8C608FC2-A280-4141-A0BB-0C9D163E89B4@apple.com>
	<5A3E16AB-09EC-48A5-A238-AA34835C4897@apple.com>
	<930CF270-0730-47D5-B257-A46DD7A7B61D@apple.com>
	<0B00D75C-5BBB-48BD-B5C7-2258A719C8D1@apple.com>
Message-ID: <279E4DEF-E6E2-4389-B18C-3EAE46065B82@apple.com>

>
> Ok, I can see that.  I'm fine with -mllvm-lto, but I don't think we
> should get more complex than that.  This is really just a "compiler
> hacker feature".

Can't just use -Wl, then?

-eric


From gohman at apple.com  Mon Jul  7 15:57:50 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 20:57:50 -0000
Subject: [llvm-commits] [llvm] r53201 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAG.h
 include/llvm/CodeGen/SelectionDAGNodes.h
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Message-ID: <200807072057.m67KvomM010897@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 15:57:48 2008
New Revision: 53201

URL: http://llvm.org/viewvc/llvm-project?rev=53201&view=rev
Log:
Fix SDNode::MorphNodeTo (a function used by by SelectNodeTo) to
properly track dead nodes that are on the original SDNode's operand
list but not the new one, and have no other uses.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=53201&r1=53200&r2=53201&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Mon Jul  7 15:57:48 2008
@@ -537,6 +537,11 @@
   /// for each node deleted.
   void RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener = 0);
   
+  /// RemoveDeadNodes - This method deletes the unreachable nodes in the
+  /// given list, and any nodes that become unreachable as a result.
+  void RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
+                       DAGUpdateListener *UpdateListener = 0);
+
   /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
   /// This can cause recursive merging of nodes in the DAG.  Use the first
   /// version if 'From' is known to have a single result, use the second

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=53201&r1=53200&r2=53201&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Mon Jul  7 15:57:48 2008
@@ -1315,12 +1315,18 @@
       ++Ops[i].getVal()->UsesSize;
     }
   }
+
+  /// DropOperands - Release the operands and set this node to have
+  /// zero operands.  This should only be used by HandleSDNode to clear
+  /// its operand list.
+  void DropOperands();
   
   /// MorphNodeTo - This frees the operands of the current node, resets the
   /// opcode, types, and operands to the specified value.  This should only be
   /// used by the SelectionDAG class.
   void MorphNodeTo(unsigned Opc, SDVTList L,
-                   const SDOperand *Ops, unsigned NumOps);
+                   const SDOperand *Ops, unsigned NumOps,
+                   SmallVectorImpl<SDNode *> &DeadNodes);
   
   void addUser(unsigned i, SDNode *User) {
     assert(User->OperandList[i].getUser() && "Node without parent");

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53201&r1=53200&r2=53201&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Jul  7 15:57:48 2008
@@ -486,42 +486,16 @@
     if (I->use_empty())
       DeadNodes.push_back(I);
 
-  // Process the worklist, deleting the nodes and adding their uses to the
-  // worklist.
-  while (!DeadNodes.empty()) {
-    SDNode *N = DeadNodes.back();
-    DeadNodes.pop_back();
-    
-    // Take the node out of the appropriate CSE map.
-    RemoveNodeFromCSEMaps(N);
-
-    // Next, brutally remove the operand list.  This is safe to do, as there are
-    // no cycles in the graph.
-    for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
-      SDNode *Operand = I->getVal();
-      Operand->removeUser(std::distance(N->op_begin(), I), N);
-      
-      // Now that we removed this operand, see if there are no uses of it left.
-      if (Operand->use_empty())
-        DeadNodes.push_back(Operand);
-    }
-    if (N->OperandsNeedDelete) {
-      delete[] N->OperandList;
-    }
-    N->OperandList = 0;
-    N->NumOperands = 0;
-    
-    // Finally, remove N itself.
-    AllNodes.erase(N);
-  }
+  RemoveDeadNodes(DeadNodes);
   
   // If the root changed (e.g. it was a dead load, update the root).
   setRoot(Dummy.getValue());
 }
 
-void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
-  SmallVector<SDNode*, 16> DeadNodes;
-  DeadNodes.push_back(N);
+/// RemoveDeadNodes - This method deletes the unreachable nodes in the
+/// given list, and any nodes that become unreachable as a result.
+void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
+                                   DAGUpdateListener *UpdateListener) {
 
   // Process the worklist, deleting the nodes and adding their uses to the
   // worklist.
@@ -537,16 +511,13 @@
 
     // Next, brutally remove the operand list.  This is safe to do, as there are
     // no cycles in the graph.
-    unsigned op_num = 0;
     for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
       SDNode *Operand = I->getVal();
-      Operand->removeUser(op_num, N);
+      Operand->removeUser(std::distance(N->op_begin(), I), N);
       
       // Now that we removed this operand, see if there are no uses of it left.
       if (Operand->use_empty())
         DeadNodes.push_back(Operand);
-      
-      op_num++;
     }
     if (N->OperandsNeedDelete) {
       delete[] N->OperandList;
@@ -559,6 +530,12 @@
   }
 }
 
+void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
+  SmallVector<SDNode*, 16> DeadNodes;
+  DeadNodes.push_back(N);
+  RemoveDeadNodes(DeadNodes, UpdateListener);
+}
+
 void SelectionDAG::DeleteNode(SDNode *N) {
   assert(N->use_empty() && "Cannot delete a node that is not dead!");
 
@@ -3681,16 +3658,22 @@
 /// opcode, types, and operands to the specified value.  This should only be
 /// used by the SelectionDAG class.
 void SDNode::MorphNodeTo(unsigned Opc, SDVTList L,
-                         const SDOperand *Ops, unsigned NumOps) {
+                         const SDOperand *Ops, unsigned NumOps,
+                         SmallVectorImpl<SDNode *> &DeadNodes) {
   NodeType = Opc;
   ValueList = L.VTs;
   NumValues = L.NumVTs;
   
   // Clear the operands list, updating used nodes to remove this from their
-  // use list.
-  for (op_iterator I = op_begin(), E = op_end(); I != E; ++I)
-    I->getVal()->removeUser(std::distance(op_begin(), I), this);
-  
+  // use list.  Keep track of any operands that become dead as a result.
+  SmallPtrSet<SDNode*, 16> DeadNodeSet;
+  for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) {
+    SDNode *N = I->getVal();
+    N->removeUser(std::distance(op_begin(), I), this);
+    if (N->use_empty())
+      DeadNodeSet.insert(N);
+  }
+
   // If NumOps is larger than the # of operands we currently have, reallocate
   // the operand list.
   if (NumOps > NumOperands) {
@@ -3710,7 +3693,29 @@
     SDNode *N = OperandList[i].getVal();
     N->addUser(i, this);
     ++N->UsesSize;
+    DeadNodeSet.erase(N);
   }
+
+  // Clean up any nodes that are still dead after adding the uses for the
+  // new operands.
+  for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
+       E = DeadNodeSet.end(); I != E; ++I)
+    DeadNodes.push_back(*I);
+}
+
+/// DropOperands - Release the operands and set this node to have
+/// zero operands.  This should only be used by HandleSDNode to clear
+/// its operand list.
+void SDNode::DropOperands() {
+  assert(NodeType == ISD::HANDLENODE &&
+         "DropOperands is for HANDLENODE only!");
+
+  // Unlike the code in MorphNodeTo that does this, we don't need to
+  // watch for dead nodes here.
+  for (op_iterator I = op_begin(), E = op_end(); I != E; ++I)
+    I->getVal()->removeUser(std::distance(op_begin(), I), this);
+
+  NumOperands = 0;
 }
 
 /// SelectNodeTo - These are used for target selectors to *mutate* the
@@ -3814,7 +3819,10 @@
 
   RemoveNodeFromCSEMaps(N);
 
-  N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, NumOps);
+  SmallVector<SDNode *, 16> DeadNodes;
+  N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, NumOps, DeadNodes);
+  RemoveDeadNodes(DeadNodes);
+
   CSEMap.InsertNode(N, IP);   // Memoize the new node.
   return N;
 }
@@ -4250,8 +4258,7 @@
 void AtomicSDNode::ANCHOR() {}
 
 HandleSDNode::~HandleSDNode() {
-  SDVTList VTs = { 0, 0 };
-  MorphNodeTo(ISD::HANDLENODE, VTs, 0, 0);  // Drops operand uses.
+  DropOperands();
 }
 
 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,




From isanbard at gmail.com  Mon Jul  7 15:59:32 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 07 Jul 2008 20:59:32 -0000
Subject: [llvm-commits] [llvm] r53202 - in /llvm/trunk:
 include/llvm/CodeGen/MachineModuleInfo.h lib/CodeGen/MachineModuleInfo.cpp
Message-ID: <200807072059.m67KxWcn010957@zion.cs.uiuc.edu>

Author: void
Date: Mon Jul  7 15:59:31 2008
New Revision: 53202

URL: http://llvm.org/viewvc/llvm-project?rev=53202&view=rev
Log:
Use StringMap for greater justice!

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h
    llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h?rev=53202&r1=53201&r2=53202&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h Mon Jul  7 15:59:31 2008
@@ -37,6 +37,7 @@
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/UniqueVector.h"
 #include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/ADT/StringMap.h"
 #include "llvm/GlobalValue.h"
 #include "llvm/Pass.h"
 
@@ -777,7 +778,7 @@
   DenseMap<DebugInfoDesc *, GlobalVariable *> DescGlobals;
 
   // Previously defined strings.
-  DenseMap<const char *, Constant*> StringCache;
+  StringMap<Constant*> StringCache;
 public:
   DISerializer()
     : M(NULL), StrPtrTy(NULL), EmptyStructPtrTy(NULL), TagTypes(),

Modified: llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp?rev=53202&r1=53201&r2=53202&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp Mon Jul  7 15:59:31 2008
@@ -1321,7 +1321,7 @@
 ///
 Constant *DISerializer::getString(const std::string &String) {
   // Check string cache for previous edition.
-  Constant *&Slot = StringCache[String.c_str()];
+  Constant *&Slot = StringCache[String];
 
   // Return Constant if previously defined.
   if (Slot) return Slot;




From clattner at apple.com  Mon Jul  7 15:59:53 2008
From: clattner at apple.com (Chris Lattner)
Date: Mon, 7 Jul 2008 13:59:53 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53113 -
	/llvm-gcc-4.2/trunk/gcc/config/darwin.h
In-Reply-To: <279E4DEF-E6E2-4389-B18C-3EAE46065B82@apple.com>
References: <200807032209.m63M9OE7026032@zion.cs.uiuc.edu>
	<FEF76249-0703-46A4-A868-31AE63791019@apple.com>
	<FEB3885B-4F4E-420C-9E83-4B9FDF41DC89@apple.com>
	<549A4A0A-7767-4A93-988F-FDF2CE0FEF85@apple.com>
	<8C608FC2-A280-4141-A0BB-0C9D163E89B4@apple.com>
	<5A3E16AB-09EC-48A5-A238-AA34835C4897@apple.com>
	<930CF270-0730-47D5-B257-A46DD7A7B61D@apple.com>
	<0B00D75C-5BBB-48BD-B5C7-2258A719C8D1@apple.com>
	<279E4DEF-E6E2-4389-B18C-3EAE46065B82@apple.com>
Message-ID: <B9B4615A-EA02-44A9-B9EA-CFAC23864146@apple.com>


On Jul 7, 2008, at 1:55 PM, Eric Christopher wrote:

>>
>> Ok, I can see that.  I'm fine with -mllvm-lto, but I don't think we
>> should get more complex than that.  This is really just a "compiler
>> hacker feature".
>
> Can't just use -Wl, then?

Yes, that is fine with me!  What do you think Devang/Evan?

-Chris


From gohman at apple.com  Mon Jul  7 16:00:17 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 21:00:17 -0000
Subject: [llvm-commits] [llvm] r53203 - in /llvm/trunk:
 test/CodeGen/PowerPC/LargeAbsoluteAddr.ll utils/TableGen/DAGISelEmitter.cpp
Message-ID: <200807072100.m67L0H07011046@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 16:00:17 2008
New Revision: 53203

URL: http://llvm.org/viewvc/llvm-project?rev=53203&view=rev
Log:
Refactor the tablegen DAGISelEmitter code for outputing calls to
getTargetNode and SelectNodeTo to reduce duplication, and to
make some of the getTargetNode code available to SelectNodeTo.
Use SelectNodeTo instead of getTargetNode in several new
interesting cases, as it mutates nodes in place instead of
creating new ones.

This triggers some scheduling behavior differences due to nodes
being presented to the scheduler in a different order. Some of the
arbitrary scheduling decisions it makes are now arbitrarily made
differently. This is visible in CodeGen/PowerPC/LargeAbsoluteAddr.ll,
where a trivial scheduling difference led to a trivial register
allocation difference.

Modified:
    llvm/trunk/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll
    llvm/trunk/utils/TableGen/DAGISelEmitter.cpp

Modified: llvm/trunk/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll?rev=53203&r1=53202&r2=53203&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll Mon Jul  7 16:00:17 2008
@@ -1,7 +1,7 @@
 ; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin | \
-; RUN:   grep {stw r3, 32751}
+; RUN:   grep {stw r2, 32751}
 ; RUN: llvm-as < %s | llc -march=ppc64 -mtriple=powerpc-apple-darwin | \
-; RUN:   grep {stw r3, 32751}
+; RUN:   grep {stw r2, 32751}
 ; RUN: llvm-as < %s | llc -march=ppc64 -mtriple=powerpc-apple-darwin | \
 ; RUN:   grep {std r2, 9024}
 

Modified: llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelEmitter.cpp?rev=53203&r1=53202&r2=53203&view=diff

==============================================================================
--- llvm/trunk/utils/TableGen/DAGISelEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/DAGISelEmitter.cpp Mon Jul  7 16:00:17 2008
@@ -18,6 +18,7 @@
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/Streams.h"
 #include <algorithm>
+#include <deque>
 using namespace llvm;
 
 //===----------------------------------------------------------------------===//
@@ -1033,229 +1034,235 @@
       }
 
       unsigned ResNo = TmpNo++;
-      if (!isRoot || InputHasChain || NodeHasChain || NodeHasOutFlag ||
-          NodeHasOptInFlag || HasImpResults) {
-        std::string Code;
-        std::string Code2;
-        std::string NodeName;
-        if (!isRoot) {
-          NodeName = "Tmp" + utostr(ResNo);
-          Code2 = "SDOperand " + NodeName + "(";
-        } else {
-          NodeName = "ResNode";
-          if (!ResNodeDecled) {
-            Code2 = "SDNode *" + NodeName + " = ";
-            ResNodeDecled = true;
-          } else
-            Code2 = NodeName + " = ";
-        }
-
-        Code += "CurDAG->getTargetNode(Opc" + utostr(OpcNo);
-        unsigned OpsNo = OpcNo;
-        emitOpcode(II.Namespace + "::" + II.TheDef->getName());
-
-        // Output order: results, chain, flags
-        // Result types.
-        if (NumResults > 0 && N->getTypeNum(0) != MVT::isVoid) {
-          Code += ", VT" + utostr(VTNo);
-          emitVT(getEnumName(N->getTypeNum(0)));
-        }
-        // Add types for implicit results in physical registers, scheduler will
-        // care of adding copyfromreg nodes.
-        for (unsigned i = 0; i < NumDstRegs; i++) {
-          Record *RR = DstRegs[i];
-          if (RR->isSubClassOf("Register")) {
-            MVT::SimpleValueType RVT = getRegisterValueType(RR, CGT);
-            Code += ", " + getEnumName(RVT);
-          }
-        }
-        if (NodeHasChain)
-          Code += ", MVT::Other";
-        if (NodeHasOutFlag)
-          Code += ", MVT::Flag";
 
-        // Inputs.
-        if (IsVariadic) {
-          for (unsigned i = 0, e = AllOps.size(); i != e; ++i)
-            emitCode("Ops" + utostr(OpsNo) + ".push_back(" + AllOps[i] + ");");
-          AllOps.clear();
-
-          // Figure out whether any operands at the end of the op list are not
-          // part of the variable section.
-          std::string EndAdjust;
-          if (NodeHasInFlag || HasImpInputs)
-            EndAdjust = "-1";  // Always has one flag.
-          else if (NodeHasOptInFlag)
-            EndAdjust = "-(HasInFlag?1:0)"; // May have a flag.
+      unsigned OpsNo = OpcNo;
+      std::string CodePrefix;
+      bool ChainAssignmentNeeded = NodeHasChain && !isRoot;
+      std::deque<std::string> After;
+      std::string NodeName;
+      if (!isRoot) {
+        NodeName = "Tmp" + utostr(ResNo);
+        CodePrefix = "SDOperand " + NodeName + "(";
+      } else {
+        NodeName = "ResNode";
+        if (!ResNodeDecled) {
+          CodePrefix = "SDNode *" + NodeName + " = ";
+          ResNodeDecled = true;
+        } else
+          CodePrefix = NodeName + " = ";
+      }
 
-          emitCode("for (unsigned i = NumInputRootOps + " + utostr(NodeHasChain) +
-                   ", e = N.getNumOperands()" + EndAdjust + "; i != e; ++i) {");
+      std::string Code = "Opc" + utostr(OpcNo);
 
-          emitCode("  AddToISelQueue(N.getOperand(i));");
-          emitCode("  Ops" + utostr(OpsNo) + ".push_back(N.getOperand(i));");
-          emitCode("}");
-        }
+      emitOpcode(II.Namespace + "::" + II.TheDef->getName());
 
-        // Generate MemOperandSDNodes nodes for each memory accesses covered by 
-        // this pattern.
-        if (II.isSimpleLoad | II.mayLoad | II.mayStore) {
-          std::vector<std::string>::const_iterator mi, mie;
-          for (mi = LSI.begin(), mie = LSI.end(); mi != mie; ++mi) {
-            emitCode("SDOperand LSI_" + *mi + " = "
-                     "CurDAG->getMemOperand(cast<MemSDNode>(" +
-                     *mi + ")->getMemOperand());");
-            if (IsVariadic)
-              emitCode("Ops" + utostr(OpsNo) + ".push_back(LSI_" + *mi + ");");
-            else
-              AllOps.push_back("LSI_" + *mi);
-          }
+      // Output order: results, chain, flags
+      // Result types.
+      if (NumResults > 0 && N->getTypeNum(0) != MVT::isVoid) {
+        Code += ", VT" + utostr(VTNo);
+        emitVT(getEnumName(N->getTypeNum(0)));
+      }
+      // Add types for implicit results in physical registers, scheduler will
+      // care of adding copyfromreg nodes.
+      for (unsigned i = 0; i < NumDstRegs; i++) {
+        Record *RR = DstRegs[i];
+        if (RR->isSubClassOf("Register")) {
+          MVT::SimpleValueType RVT = getRegisterValueType(RR, CGT);
+          Code += ", " + getEnumName(RVT);
         }
-
-        if (NodeHasChain) {
+      }
+      if (NodeHasChain)
+        Code += ", MVT::Other";
+      if (NodeHasOutFlag)
+        Code += ", MVT::Flag";
+
+      // Inputs.
+      if (IsVariadic) {
+        for (unsigned i = 0, e = AllOps.size(); i != e; ++i)
+          emitCode("Ops" + utostr(OpsNo) + ".push_back(" + AllOps[i] + ");");
+        AllOps.clear();
+
+        // Figure out whether any operands at the end of the op list are not
+        // part of the variable section.
+        std::string EndAdjust;
+        if (NodeHasInFlag || HasImpInputs)
+          EndAdjust = "-1";  // Always has one flag.
+        else if (NodeHasOptInFlag)
+          EndAdjust = "-(HasInFlag?1:0)"; // May have a flag.
+
+        emitCode("for (unsigned i = NumInputRootOps + " + utostr(NodeHasChain) +
+                 ", e = N.getNumOperands()" + EndAdjust + "; i != e; ++i) {");
+
+        emitCode("  AddToISelQueue(N.getOperand(i));");
+        emitCode("  Ops" + utostr(OpsNo) + ".push_back(N.getOperand(i));");
+        emitCode("}");
+      }
+
+      // Generate MemOperandSDNodes nodes for each memory accesses covered by 
+      // this pattern.
+      if (II.isSimpleLoad | II.mayLoad | II.mayStore) {
+        std::vector<std::string>::const_iterator mi, mie;
+        for (mi = LSI.begin(), mie = LSI.end(); mi != mie; ++mi) {
+          emitCode("SDOperand LSI_" + *mi + " = "
+                   "CurDAG->getMemOperand(cast<MemSDNode>(" +
+                   *mi + ")->getMemOperand());");
           if (IsVariadic)
-            emitCode("Ops" + utostr(OpsNo) + ".push_back(" + ChainName + ");");
+            emitCode("Ops" + utostr(OpsNo) + ".push_back(LSI_" + *mi + ");");
           else
-            AllOps.push_back(ChainName);
+            AllOps.push_back("LSI_" + *mi);
         }
+      }
 
-        if (IsVariadic) {
-          if (NodeHasInFlag || HasImpInputs)
-            emitCode("Ops" + utostr(OpsNo) + ".push_back(InFlag);");
-          else if (NodeHasOptInFlag) {
-            emitCode("if (HasInFlag)");
-            emitCode("  Ops" + utostr(OpsNo) + ".push_back(InFlag);");
-          }
-          Code += ", &Ops" + utostr(OpsNo) + "[0], Ops" + utostr(OpsNo) +
-            ".size()";
-        } else if (NodeHasInFlag || NodeHasOptInFlag || HasImpInputs)
-          AllOps.push_back("InFlag");
-
-        unsigned NumOps = AllOps.size();
-        if (NumOps) {
-          if (!NodeHasOptInFlag && NumOps < 4) {
-            for (unsigned i = 0; i != NumOps; ++i)
-              Code += ", " + AllOps[i];
-          } else {
-            std::string OpsCode = "SDOperand Ops" + utostr(OpsNo) + "[] = { ";
-            for (unsigned i = 0; i != NumOps; ++i) {
-              OpsCode += AllOps[i];
-              if (i != NumOps-1)
-                OpsCode += ", ";
-            }
-            emitCode(OpsCode + " };");
-            Code += ", Ops" + utostr(OpsNo) + ", ";
-            if (NodeHasOptInFlag) {
-              Code += "HasInFlag ? ";
-              Code += utostr(NumOps) + " : " + utostr(NumOps-1);
-            } else
-              Code += utostr(NumOps);
+      if (NodeHasChain) {
+        if (IsVariadic)
+          emitCode("Ops" + utostr(OpsNo) + ".push_back(" + ChainName + ");");
+        else
+          AllOps.push_back(ChainName);
+      }
+
+      if (IsVariadic) {
+        if (NodeHasInFlag || HasImpInputs)
+          emitCode("Ops" + utostr(OpsNo) + ".push_back(InFlag);");
+        else if (NodeHasOptInFlag) {
+          emitCode("if (HasInFlag)");
+          emitCode("  Ops" + utostr(OpsNo) + ".push_back(InFlag);");
+        }
+        Code += ", &Ops" + utostr(OpsNo) + "[0], Ops" + utostr(OpsNo) +
+          ".size()";
+      } else if (NodeHasInFlag || NodeHasOptInFlag || HasImpInputs)
+        AllOps.push_back("InFlag");
+
+      unsigned NumOps = AllOps.size();
+      if (NumOps) {
+        if (!NodeHasOptInFlag && NumOps < 4) {
+          for (unsigned i = 0; i != NumOps; ++i)
+            Code += ", " + AllOps[i];
+        } else {
+          std::string OpsCode = "SDOperand Ops" + utostr(OpsNo) + "[] = { ";
+          for (unsigned i = 0; i != NumOps; ++i) {
+            OpsCode += AllOps[i];
+            if (i != NumOps-1)
+              OpsCode += ", ";
           }
-        }
-            
-        if (!isRoot)
-          Code += "), 0";
-        emitCode(Code2 + Code + ");");
-
-        if (NodeHasChain) {
-          // Remember which op produces the chain.
-          if (!isRoot)
-            emitCode(ChainName + " = SDOperand(" + NodeName +
-                     ".Val, " + utostr(NumResults+NumDstRegs) + ");");
-          else
-            emitCode(ChainName + " = SDOperand(" + NodeName +
-                     ", " + utostr(NumResults+NumDstRegs) + ");");
-        }
-
-        if (!isRoot) {
-          NodeOps.push_back("Tmp" + utostr(ResNo));
-          return NodeOps;
-        }
-
-        bool NeedReplace = false;
-        if (NodeHasOutFlag) {
-          if (!InFlagDecled) {
-            emitCode("SDOperand InFlag(ResNode, " + 
-                   utostr(NumResults+NumDstRegs+(unsigned)NodeHasChain) + ");");
-            InFlagDecled = true;
+          emitCode(OpsCode + " };");
+          Code += ", Ops" + utostr(OpsNo) + ", ";
+          if (NodeHasOptInFlag) {
+            Code += "HasInFlag ? ";
+            Code += utostr(NumOps) + " : " + utostr(NumOps-1);
           } else
-            emitCode("InFlag = SDOperand(ResNode, " + 
-                   utostr(NumResults+NumDstRegs+(unsigned)NodeHasChain) + ");");
+            Code += utostr(NumOps);
         }
+      }
+          
+      if (!isRoot)
+        Code += "), 0";
 
-        if (FoldedChains.size() > 0) {
-          std::string Code;
-          for (unsigned j = 0, e = FoldedChains.size(); j < e; j++)
-            emitCode("ReplaceUses(SDOperand(" +
-                     FoldedChains[j].first + ".Val, " + 
-                     utostr(FoldedChains[j].second) + "), SDOperand(ResNode, " +
-                     utostr(NumResults+NumDstRegs) + "));");
-          NeedReplace = true;
-        }
-
-        if (NodeHasOutFlag) {
-          if (FoldedFlag.first != "") {
-            emitCode("ReplaceUses(SDOperand(" + FoldedFlag.first + ".Val, " +
-                     utostr(FoldedFlag.second) + "), InFlag);");
-          } else {
-            assert(NodeHasProperty(Pattern, SDNPOutFlag, CGP));
-            emitCode("ReplaceUses(SDOperand(N.Val, " +
-                     utostr(NumPatResults + (unsigned)InputHasChain)
-                     +"), InFlag);");
-          }
-          NeedReplace = true;
-        }
+      bool NeedReplace = false;
+      if (!isRoot) {
+        NodeOps.push_back("Tmp" + utostr(ResNo));
+      } else {
 
-        if (NeedReplace && InputHasChain)
-          emitCode("ReplaceUses(SDOperand(N.Val, " + 
-                   utostr(NumPatResults) + "), SDOperand(" + ChainName
-                   + ".Val, " + ChainName + ".ResNo" + "));");
-
-        // User does not expect the instruction would produce a chain!
-        if ((!InputHasChain && NodeHasChain) && NodeHasOutFlag) {
-          ;
-        } else if (InputHasChain && !NodeHasChain) {
-          // One of the inner node produces a chain.
-          if (NodeHasOutFlag)
-            emitCode("ReplaceUses(SDOperand(N.Val, " + utostr(NumPatResults+1) +
-                     "), SDOperand(ResNode, N.ResNo-1));");
-          emitCode("ReplaceUses(SDOperand(N.Val, " + utostr(NumPatResults) +
-                   "), " + ChainName + ");");
-        }
+      if (NodeHasOutFlag) {
+        if (!InFlagDecled) {
+          After.push_back("SDOperand InFlag(ResNode, " + 
+                          utostr(NumResults+NumDstRegs+(unsigned)NodeHasChain) +
+                          ");");
+          InFlagDecled = true;
+        } else
+          After.push_back("InFlag = SDOperand(ResNode, " + 
+                          utostr(NumResults+NumDstRegs+(unsigned)NodeHasChain) +
+                          ");");
+      }
 
-        emitCode("return ResNode;");
-      } else {
-        std::string Code = "return CurDAG->SelectNodeTo(N.Val, Opc" +
-          utostr(OpcNo);
-        if (N->getTypeNum(0) != MVT::isVoid)
-          Code += ", VT" + utostr(VTNo);
-        if (NodeHasOutFlag)
-          Code += ", MVT::Flag";
+      if (FoldedChains.size() > 0) {
+        std::string Code;
+        for (unsigned j = 0, e = FoldedChains.size(); j < e; j++)
+          After.push_back("ReplaceUses(SDOperand(" +
+                          FoldedChains[j].first + ".Val, " + 
+                          utostr(FoldedChains[j].second) +
+                          "), SDOperand(ResNode, " +
+                          utostr(NumResults+NumDstRegs) + "));");
+        NeedReplace = true;
+      }
 
-        if (NodeHasInFlag || NodeHasOptInFlag || HasImpInputs)
-          AllOps.push_back("InFlag");
+      if (NodeHasOutFlag) {
+        if (FoldedFlag.first != "") {
+          After.push_back("ReplaceUses(SDOperand(" + FoldedFlag.first +
+                          ".Val, " +
+                          utostr(FoldedFlag.second) + "), InFlag);");
+        } else {
+          assert(NodeHasProperty(Pattern, SDNPOutFlag, CGP));
+          After.push_back("ReplaceUses(SDOperand(N.Val, " +
+                          utostr(NumPatResults + (unsigned)InputHasChain)
+                          +"), InFlag);");
+        }
+        NeedReplace = true;
+      }
+
+      if (NeedReplace && InputHasChain) {
+        After.push_back("ReplaceUses(SDOperand(N.Val, " + 
+                        utostr(NumPatResults) + "), SDOperand(" + ChainName
+                        + ".Val, " + ChainName + ".ResNo" + "));");
+        ChainAssignmentNeeded |= NodeHasChain;
+      }
+
+      // User does not expect the instruction would produce a chain!
+      if ((!InputHasChain && NodeHasChain) && NodeHasOutFlag) {
+        ;
+      } else if (InputHasChain && !NodeHasChain) {
+        // One of the inner node produces a chain.
+        if (NodeHasOutFlag)
+          After.push_back("ReplaceUses(SDOperand(N.Val, " +
+                          utostr(NumPatResults+1) +
+                          "), SDOperand(ResNode, N.ResNo-1));");
+        After.push_back("ReplaceUses(SDOperand(N.Val, " +
+                        utostr(NumPatResults) + "), " + ChainName + ");");
+        NeedReplace = true;
+      }
+      }
 
-        unsigned NumOps = AllOps.size();
-        if (NumOps) {
-          if (!NodeHasOptInFlag && NumOps < 4) {
-            for (unsigned i = 0; i != NumOps; ++i)
-              Code += ", " + AllOps[i];
-          } else {
-            std::string OpsCode = "SDOperand Ops" + utostr(OpcNo) + "[] = { ";
-            for (unsigned i = 0; i != NumOps; ++i) {
-              OpsCode += AllOps[i];
-              if (i != NumOps-1)
-                OpsCode += ", ";
-            }
-            emitCode(OpsCode + " };");
-            Code += ", Ops" + utostr(OpcNo) + ", ";
-            Code += utostr(NumOps);
-          }
-        }
-        emitCode(Code + ");");
-        emitOpcode(II.Namespace + "::" + II.TheDef->getName());
-        if (N->getTypeNum(0) != MVT::isVoid)
-          emitVT(getEnumName(N->getTypeNum(0)));
+      if (ChainAssignmentNeeded) {
+        // Remember which op produces the chain.
+        std::string ChainAssign;
+        if (!isRoot)
+          ChainAssign = ChainName + " = SDOperand(" + NodeName +
+                        ".Val, " + utostr(NumResults+NumDstRegs) + ");";
+        else
+          ChainAssign = ChainName + " = SDOperand(" + NodeName +
+                        ", " + utostr(NumResults+NumDstRegs) + ");";
+
+        After.push_front(ChainAssign);
+      }
+
+      // Use getTargetNode or SelectNodeTo? The safe choice is getTargetNode,
+      // but SelectNodeTo can be faster.
+      //
+      // SelectNodeTo is not safe in a non-root context, or if there is any
+      // replacement of results needed.
+      //
+      // SelectNodeTo is not profitable if it would require a dynamically
+      // allocated operand list in a situation where getTargetNode would be
+      // able to reuse a co-allocated operand list (as in a unary, binary or
+      // ternary SDNode, for example).
+      //
+      if (!isRoot || NeedReplace ||
+          (!IsVariadic && AllOps.size() < 4 &&
+           Pattern->getNumChildren() + InputHasChain + NodeHasInFlag <
+             AllOps.size())) {
+        Code = "CurDAG->getTargetNode(" + Code;
+      } else {
+        Code = "CurDAG->SelectNodeTo(N.Val, " + Code;
       }
+      if (isRoot) {
+        if (After.empty())
+          CodePrefix = "return ";
+        else
+          After.push_back("return ResNode;");
+      }
+
+      emitCode(CodePrefix + Code + ");");
+      for (unsigned i = 0, e = After.size(); i != e; ++i)
+        emitCode(After[i]);
 
       return NodeOps;
     } else if (Op->isSubClassOf("SDNodeXForm")) {




From clattner at apple.com  Mon Jul  7 16:02:18 2008
From: clattner at apple.com (Chris Lattner)
Date: Mon, 7 Jul 2008 14:02:18 -0700
Subject: [llvm-commits] [llvm-gcc] [PATCH] mips eabi byval support
In-Reply-To: <275e64e40807051323x64cfa812p9091290945c52c58@mail.gmail.com>
References: <275e64e40807051323x64cfa812p9091290945c52c58@mail.gmail.com>
Message-ID: <4FCBA94A-AD36-4CC8-B6BD-DA5895DB26B7@apple.com>


On Jul 5, 2008, at 1:23 PM, Bruno Cardoso Lopes wrote:

> Added support for passing aggregates with byval if size greater
> than a register, as defined by mips eabi.

This looks fine to me, please commit if you haven't already.  Thanks  
Bruno!

-Chris


From clattner at apple.com  Mon Jul  7 16:02:41 2008
From: clattner at apple.com (Chris Lattner)
Date: Mon, 7 Jul 2008 14:02:41 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53142 -
	/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
In-Reply-To: <200807050218.m652Iv6A026796@zion.cs.uiuc.edu>
References: <200807050218.m652Iv6A026796@zion.cs.uiuc.edu>
Message-ID: <9FB3F56D-390D-43AB-825F-673FAA906DD2@apple.com>


On Jul 4, 2008, at 7:18 PM, Devang Patel wrote:

> Author: dpatel
> Date: Fri Jul  4 21:18:56 2008
> New Revision: 53142
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53142&view=rev
> Log:
> Oops.

Please use meaningful commit messages.

-Chris



From dpatel at apple.com  Mon Jul  7 16:16:48 2008
From: dpatel at apple.com (Devang Patel)
Date: Mon, 07 Jul 2008 21:16:48 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53204 -
	/llvm-gcc-4.2/trunk/gcc/doc/invoke.texi
Message-ID: <200807072116.m67LGnVu011861@zion.cs.uiuc.edu>

Author: dpatel
Date: Mon Jul  7 16:16:41 2008
New Revision: 53204

URL: http://llvm.org/viewvc/llvm-project?rev=53204&view=rev
Log:
Fix mllvm documentation anchors.

Modified:
    llvm-gcc-4.2/trunk/gcc/doc/invoke.texi

Modified: llvm-gcc-4.2/trunk/gcc/doc/invoke.texi
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/doc/invoke.texi?rev=53204&r1=53203&r2=53204&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/doc/invoke.texi (original)
+++ llvm-gcc-4.2/trunk/gcc/doc/invoke.texi Mon Jul  7 16:16:41 2008
@@ -4846,8 +4846,8 @@
 source file before using @option{-save-temps}.
 
 @c LLVM LOCAL begin
- at -mllvm @var{string}
- at optindex mllvm
+ at item -mllvm @var{string}
+ at opindex mllvm
 This options provides a way to supply llvm optimization and code
 generation debugging options to LLVM component directly. 
 @c LLVM LOCAL end




From bruno.cardoso at gmail.com  Mon Jul  7 16:22:53 2008
From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes)
Date: Mon, 07 Jul 2008 21:22:53 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53205 - in /llvm-gcc-4.2/trunk/gcc:
 config.gcc config/mips/llvm-mips-target.h config/mips/llvm-mips.cpp
 config/mips/mips.h
Message-ID: <200807072122.m67LMsCC012087@zion.cs.uiuc.edu>

Author: bruno
Date: Mon Jul  7 16:22:48 2008
New Revision: 53205

URL: http://llvm.org/viewvc/llvm-project?rev=53205&view=rev
Log:
Added support for passing aggregates with byval if size greater than a register, as defined by mips eabi.

Added:
    llvm-gcc-4.2/trunk/gcc/config/mips/llvm-mips-target.h
    llvm-gcc-4.2/trunk/gcc/config/mips/llvm-mips.cpp
Modified:
    llvm-gcc-4.2/trunk/gcc/config.gcc
    llvm-gcc-4.2/trunk/gcc/config/mips/mips.h

Modified: llvm-gcc-4.2/trunk/gcc/config.gcc
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config.gcc?rev=53205&r1=53204&r2=53205&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/config.gcc (original)
+++ llvm-gcc-4.2/trunk/gcc/config.gcc Mon Jul  7 16:22:48 2008
@@ -315,6 +315,9 @@
 	;;
 mips*-*-*)
 	cpu_type=mips
+# LLVM LOCAL begin
+	out_cxx_file=mips/llvm-mips.cpp
+# LLVM LOCAL end                               
 	need_64bit_hwint=yes
 	;;
 powerpc*-*-*)

Added: llvm-gcc-4.2/trunk/gcc/config/mips/llvm-mips-target.h
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/mips/llvm-mips-target.h?rev=53205&view=auto

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/config/mips/llvm-mips-target.h (added)
+++ llvm-gcc-4.2/trunk/gcc/config/mips/llvm-mips-target.h Mon Jul  7 16:22:48 2008
@@ -0,0 +1,32 @@
+/* LLVM LOCAL begin (ENTIRE FILE!)  */
+/* Some target-specific hooks for gcc->llvm conversion
+Copyright (C) 2008 Free Software Foundation, Inc.
+Contributed by Bruno Cardoso Lopes (bruno.cardoso at gmail.com)
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 2, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING.  If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+02111-1307, USA.  */
+
+#ifdef LLVM_ABI_H
+
+extern bool llvm_mips_should_pass_aggregate_in_memory(tree, const Type *);
+
+#define LLVM_SHOULD_PASS_AGGREGATE_USING_BYVAL_ATTR(X, TY)      \
+  llvm_mips_should_pass_aggregate_in_memory(X, TY)
+
+#endif /* LLVM_ABI_H */
+
+/* LLVM LOCAL end (ENTIRE FILE!)  */

Added: llvm-gcc-4.2/trunk/gcc/config/mips/llvm-mips.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/mips/llvm-mips.cpp?rev=53205&view=auto

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/config/mips/llvm-mips.cpp (added)
+++ llvm-gcc-4.2/trunk/gcc/config/mips/llvm-mips.cpp Mon Jul  7 16:22:48 2008
@@ -0,0 +1,48 @@
+/* LLVM LOCAL begin (ENTIRE FILE!)  */
+/* High-level LLVM backend interface 
+Copyright (C) 2008 Free Software Foundation, Inc.
+Contributed by Bruno Cardoso Lopes (bruno.cardoso at gmail.com)
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 2, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING.  If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+02111-1307, USA.  */
+
+//===----------------------------------------------------------------------===//
+// This is a C++ source file that implements specific llvm mips ABI.
+//===----------------------------------------------------------------------===//
+
+#include "llvm-abi.h"
+#include "llvm-mips-target.h"
+
+/* Target hook for llvm-abi.h. It returns true if an aggregate of the
+   specified type should be passed in memory. In mips EABI this is 
+   true for aggregates with size > 32-bits. */
+bool llvm_mips_should_pass_aggregate_in_memory(tree TreeType, const Type *Ty) {
+  if (mips_abi == ABI_EABI)
+  {
+    enum machine_mode mode = TYPE_MODE(TreeType);
+    int size;
+
+    if (mode == DImode || mode == DFmode)
+      return false;
+
+    size = TreeType ? int_size_in_bytes (TreeType) : GET_MODE_SIZE (mode);
+    return size == -1 || size > UNITS_PER_WORD;
+  }
+  return false; // TODO: support o32 ABI
+}
+
+/* LLVM LOCAL end (ENTIRE FILE!)  */

Modified: llvm-gcc-4.2/trunk/gcc/config/mips/mips.h
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/mips/mips.h?rev=53205&r1=53204&r2=53205&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/config/mips/mips.h (original)
+++ llvm-gcc-4.2/trunk/gcc/config/mips/mips.h Mon Jul  7 16:22:48 2008
@@ -23,6 +23,16 @@
 the Free Software Foundation, 51 Franklin Street, Fifth Floor,
 Boston, MA 02110-1301, USA.  */
 
+/* LLVM LOCAL begin */
+
+#ifdef ENABLE_LLVM
+
+/* Add general target specific stuff */
+#include "llvm-mips-target.h"
+
+#endif /* ENABLE_LLVM */
+
+/* LLVM LOCAL end */
 
 /* MIPS external variables defined in mips.c.  */
 




From isanbard at gmail.com  Mon Jul  7 16:42:08 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 07 Jul 2008 21:42:08 -0000
Subject: [llvm-commits] [llvm] r53206 -
	/llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
Message-ID: <200807072142.m67Lg90Y012826@zion.cs.uiuc.edu>

Author: void
Date: Mon Jul  7 16:41:57 2008
New Revision: 53206

URL: http://llvm.org/viewvc/llvm-project?rev=53206&view=rev
Log:
Use the canonical way to get an empty structure.

Modified:
    llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp

Modified: llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp?rev=53206&r1=53205&r2=53206&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp Mon Jul  7 16:41:57 2008
@@ -1285,8 +1285,7 @@
   if (EmptyStructPtrTy) return EmptyStructPtrTy;
 
   // Construct the pointer to empty structure type.
-  const StructType *EmptyStructTy =
-    StructType::get(std::vector<const Type*>());
+  const StructType *EmptyStructTy = StructType::get(NULL, NULL);
 
   // Construct the pointer to empty structure type.
   EmptyStructPtrTy = PointerType::getUnqual(EmptyStructTy);
@@ -1754,7 +1753,7 @@
 void MachineModuleInfo::addFilterTypeInfo(MachineBasicBlock *LandingPad,
                                         std::vector<GlobalVariable *> &TyInfo) {
   LandingPadInfo &LP = getOrCreateLandingPadInfo(LandingPad);
-  std::vector<unsigned> IdsInFilter (TyInfo.size());
+  std::vector<unsigned> IdsInFilter(TyInfo.size());
   for (unsigned I = 0, E = TyInfo.size(); I != E; ++I)
     IdsInFilter[I] = getTypeIDFor(TyInfo[I]);
   LP.TypeIds.push_back(getFilterIDFor(IdsInFilter));




From dpatel at apple.com  Mon Jul  7 16:55:15 2008
From: dpatel at apple.com (Devang Patel)
Date: Mon, 7 Jul 2008 14:55:15 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53113 -
	/llvm-gcc-4.2/trunk/gcc/config/darwin.h
In-Reply-To: <B9B4615A-EA02-44A9-B9EA-CFAC23864146@apple.com>
References: <200807032209.m63M9OE7026032@zion.cs.uiuc.edu>
	<FEF76249-0703-46A4-A868-31AE63791019@apple.com>
	<FEB3885B-4F4E-420C-9E83-4B9FDF41DC89@apple.com>
	<549A4A0A-7767-4A93-988F-FDF2CE0FEF85@apple.com>
	<8C608FC2-A280-4141-A0BB-0C9D163E89B4@apple.com>
	<5A3E16AB-09EC-48A5-A238-AA34835C4897@apple.com>
	<930CF270-0730-47D5-B257-A46DD7A7B61D@apple.com>
	<0B00D75C-5BBB-48BD-B5C7-2258A719C8D1@apple.com>
	<279E4DEF-E6E2-4389-B18C-3EAE46065B82@apple.com>
	<B9B4615A-EA02-44A9-B9EA-CFAC23864146@apple.com>
Message-ID: <BBA53400-4214-4ED4-9595-96961F88C0E1@apple.com>


On Jul 7, 2008, at 1:59 PM, Chris Lattner wrote:

>
> On Jul 7, 2008, at 1:55 PM, Eric Christopher wrote:
>
>>>
>>> Ok, I can see that.  I'm fine with -mllvm-lto, but I don't think we
>>> should get more complex than that.  This is really just a "compiler
>>> hacker feature".
>>
>> Can't just use -Wl, then?
(BTW, this should work without the patch that started this thread)

Again, if the linker does not support -mllvm then -Wl,-mllvm will fail  
anyway ;).

> Yes, that is fine with me!  What do you think Devang/Evan?

I'm fine with current state :)

I do not prefer separate new -mllvm option for the linker.

This is a debugging aid for llvm hacker that helps him investigate  
code generation/optimization bugs. If the user does not know what he  
is debugging (lto or no-lto) then all bets are off!

If the user wants llvm code generator to print useful info to find out  
what went wrong, when LTO is ON, then you really want the linker to  
accept this command or reject. You do not want to let compiler driver  
eat this silently and not ask LTO to produce any output, which may  
mislead the user.

-
Devang





From echristo at apple.com  Mon Jul  7 16:59:51 2008
From: echristo at apple.com (Eric Christopher)
Date: Mon, 7 Jul 2008 14:59:51 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53113 -
	/llvm-gcc-4.2/trunk/gcc/config/darwin.h
In-Reply-To: <BBA53400-4214-4ED4-9595-96961F88C0E1@apple.com>
References: <200807032209.m63M9OE7026032@zion.cs.uiuc.edu>
	<FEF76249-0703-46A4-A868-31AE63791019@apple.com>
	<FEB3885B-4F4E-420C-9E83-4B9FDF41DC89@apple.com>
	<549A4A0A-7767-4A93-988F-FDF2CE0FEF85@apple.com>
	<8C608FC2-A280-4141-A0BB-0C9D163E89B4@apple.com>
	<5A3E16AB-09EC-48A5-A238-AA34835C4897@apple.com>
	<930CF270-0730-47D5-B257-A46DD7A7B61D@apple.com>
	<0B00D75C-5BBB-48BD-B5C7-2258A719C8D1@apple.com>
	<279E4DEF-E6E2-4389-B18C-3EAE46065B82@apple.com>
	<B9B4615A-EA02-44A9-B9EA-CFAC23864146@apple.com>
	<BBA53400-4214-4ED4-9595-96961F88C0E1@apple.com>
Message-ID: <98F614AF-15FB-4005-A051-265C2AC2D1C5@apple.com>


On Jul 7, 2008, at 2:55 PM, Devang Patel wrote:

>
> On Jul 7, 2008, at 1:59 PM, Chris Lattner wrote:
>
>>
>> On Jul 7, 2008, at 1:55 PM, Eric Christopher wrote:
>>
>>>>
>>>> Ok, I can see that.  I'm fine with -mllvm-lto, but I don't think we
>>>> should get more complex than that.  This is really just a "compiler
>>>> hacker feature".
>>>
>>> Can't just use -Wl, then?
> (BTW, this should work without the patch that started this thread)
>
> Again, if the linker does not support -mllvm then -Wl,-mllvm will  
> fail anyway ;).

Well yeah, but there was no motivation for why you wanted to do this.

>
>
>> Yes, that is fine with me!  What do you think Devang/Evan?
>
> I'm fine with current state :)
>
> I do not prefer separate new -mllvm option for the linker.
>

Well, if it's not an option then don't pass it :)

> This is a debugging aid for llvm hacker that helps him investigate  
> code generation/optimization bugs. If the user does not know what he  
> is debugging (lto or no-lto) then all bets are off!
>

Of course, but there's no problem in using -Wl,.... instead of passing  
-mllvm ... there's no difference.

-eric


From evan.cheng at apple.com  Mon Jul  7 17:01:07 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 7 Jul 2008 15:01:07 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53113 -
	/llvm-gcc-4.2/trunk/gcc/config/darwin.h
In-Reply-To: <BBA53400-4214-4ED4-9595-96961F88C0E1@apple.com>
References: <200807032209.m63M9OE7026032@zion.cs.uiuc.edu>
	<FEF76249-0703-46A4-A868-31AE63791019@apple.com>
	<FEB3885B-4F4E-420C-9E83-4B9FDF41DC89@apple.com>
	<549A4A0A-7767-4A93-988F-FDF2CE0FEF85@apple.com>
	<8C608FC2-A280-4141-A0BB-0C9D163E89B4@apple.com>
	<5A3E16AB-09EC-48A5-A238-AA34835C4897@apple.com>
	<930CF270-0730-47D5-B257-A46DD7A7B61D@apple.com>
	<0B00D75C-5BBB-48BD-B5C7-2258A719C8D1@apple.com>
	<279E4DEF-E6E2-4389-B18C-3EAE46065B82@apple.com>
	<B9B4615A-EA02-44A9-B9EA-CFAC23864146@apple.com>
	<BBA53400-4214-4ED4-9595-96961F88C0E1@apple.com>
Message-ID: <4CAAFE39-3D9F-456E-853B-25DC103E2BC6@apple.com>


On Jul 7, 2008, at 2:55 PM, Devang Patel wrote:

>
> On Jul 7, 2008, at 1:59 PM, Chris Lattner wrote:
>
>>
>> On Jul 7, 2008, at 1:55 PM, Eric Christopher wrote:
>>
>>>>
>>>> Ok, I can see that.  I'm fine with -mllvm-lto, but I don't think we
>>>> should get more complex than that.  This is really just a "compiler
>>>> hacker feature".
>>>
>>> Can't just use -Wl, then?
> (BTW, this should work without the patch that started this thread)
>
> Again, if the linker does not support -mllvm then -Wl,-mllvm will fail
> anyway ;).
>
>> Yes, that is fine with me!  What do you think Devang/Evan?
>
> I'm fine with current state :)
>
> I do not prefer separate new -mllvm option for the linker.

The issue is when user call llvm-gcc -mllvm -foo x.c which would pass  
the option to both the compiler proper and the linker. It seems like  
an undesirable behavior.

Evan

>
>
> This is a debugging aid for llvm hacker that helps him investigate
> code generation/optimization bugs. If the user does not know what he
> is debugging (lto or no-lto) then all bets are off!
>
> If the user wants llvm code generator to print useful info to find out
> what went wrong, when LTO is ON, then you really want the linker to
> accept this command or reject. You do not want to let compiler driver
> eat this silently and not ask LTO to produce any output, which may
> mislead the user.
>
> -
> Devang
>
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From dpatel at apple.com  Mon Jul  7 17:08:24 2008
From: dpatel at apple.com (Devang Patel)
Date: Mon, 7 Jul 2008 15:08:24 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53113 -
	/llvm-gcc-4.2/trunk/gcc/config/darwin.h
In-Reply-To: <98F614AF-15FB-4005-A051-265C2AC2D1C5@apple.com>
References: <200807032209.m63M9OE7026032@zion.cs.uiuc.edu>
	<FEF76249-0703-46A4-A868-31AE63791019@apple.com>
	<FEB3885B-4F4E-420C-9E83-4B9FDF41DC89@apple.com>
	<549A4A0A-7767-4A93-988F-FDF2CE0FEF85@apple.com>
	<8C608FC2-A280-4141-A0BB-0C9D163E89B4@apple.com>
	<5A3E16AB-09EC-48A5-A238-AA34835C4897@apple.com>
	<930CF270-0730-47D5-B257-A46DD7A7B61D@apple.com>
	<0B00D75C-5BBB-48BD-B5C7-2258A719C8D1@apple.com>
	<279E4DEF-E6E2-4389-B18C-3EAE46065B82@apple.com>
	<B9B4615A-EA02-44A9-B9EA-CFAC23864146@apple.com>
	<BBA53400-4214-4ED4-9595-96961F88C0E1@apple.com>
	<98F614AF-15FB-4005-A051-265C2AC2D1C5@apple.com>
Message-ID: <A1953FC5-1A2D-4B5C-9646-16C69ADB4CE3@apple.com>


On Jul 7, 2008, at 2:59 PM, Eric Christopher wrote:

>> I do not prefer separate new -mllvm option for the linker.
>>
>
> Well, if it's not an option then don't pass it :)


I meant separate option, say -mllvm-lto, for this feature.

$ llvm-gcc -mllvm "-print-isel-input -print-emitted-asm" /tmp/a.c -c

prints info useful to llvm codegen folks.

$ llvm-gcc -mllvm "-print-isel-input -print-emitted-asm" /tmp/a.c -O4

prints info useful to  llvm codegen folks when LTO is used. If the  
linker does not support -mllvm then the user wants to know that,  
instead of no output.

I do not prefer

$ llvm-gcc -mllvm-lto "-print-isel-input -print-emitted-asm" /tmp/a.c - 
O4

because, if I want to print isel-input and set loop-unroll threshold  
then I should be able to say

$ llvm-gcc -mllvm "-print-isel-input -unroll-threshold=1000" /tmp/a.c - 
O4

instead of

$ llvm-gcc -mllvm " -unroll-threshold=1000" -mllvm-lto "-print-isel- 
input" /tmp/a.c -O4

This is unnecessary and it may get confusing when LTO does loop  
unrolling also at linker level. This is why I prefer -mllvm "blah  
blah" for compiler as well as the linker.

However, if someone feels strongly, feel free to apply appropriate  
patch to do the right thing!
-
Devang






From evan.cheng at apple.com  Mon Jul  7 17:19:46 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 07 Jul 2008 22:19:46 -0000
Subject: [llvm-commits] [llvm] r53207 - in /llvm/trunk: lib/Target/Target.td
 utils/TableGen/RegisterInfoEmitter.cpp
Message-ID: <200807072219.m67MJlMK014487@zion.cs.uiuc.edu>

Author: evancheng
Date: Mon Jul  7 17:19:41 2008
New Revision: 53207

URL: http://llvm.org/viewvc/llvm-project?rev=53207&view=rev
Log:
TargetRegisterDesc::Name field is the same as the abstract register name. There is no need for targets to specify register names in addition to their AsmName's.

Modified:
    llvm/trunk/lib/Target/Target.td
    llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp

Modified: llvm/trunk/lib/Target/Target.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Target.td?rev=53207&r1=53206&r2=53207&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Target.td (original)
+++ llvm/trunk/lib/Target/Target.td Mon Jul  7 17:19:41 2008
@@ -26,7 +26,6 @@
 class Register<string n> {
   string Namespace = "";
   string AsmName = n;
-  string Name = n;
 
   // SpillSize - If this value is set to a non-zero value, it is the size in
   // bits of the spill slot required to hold this register.  If this value is

Modified: llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp?rev=53207&r1=53206&r2=53207&view=diff

==============================================================================
--- llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp Mon Jul  7 17:19:41 2008
@@ -606,16 +606,7 @@
     else
       OS << Reg.getName();
     OS << "\",\t\"";
-    if (!Reg.TheDef->getValueAsString("Name").empty()) {
-      OS << Reg.TheDef->getValueAsString("Name");
-    } else {
-      // Default to "name".
-      if (!Reg.TheDef->getValueAsString("AsmName").empty())
-        OS << Reg.TheDef->getValueAsString("AsmName");
-      else
-        OS << Reg.getName();
-    }
-    OS << "\",\t";
+    OS << Reg.getName() << "\",\t";
     if (RegisterAliases.count(Reg.TheDef))
       OS << Reg.getName() << "_AliasSet,\t";
     else




From evan.cheng at apple.com  Mon Jul  7 17:21:06 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 07 Jul 2008 22:21:06 -0000
Subject: [llvm-commits] [llvm] r53208 - in /llvm/trunk/lib/Target/X86:
 X86ATTAsmPrinter.cpp X86IntelAsmPrinter.cpp X86IntelAsmPrinter.h
 X86RegisterInfo.td
Message-ID: <200807072221.m67ML7IN014552@zion.cs.uiuc.edu>

Author: evancheng
Date: Mon Jul  7 17:21:06 2008
New Revision: 53208

URL: http://llvm.org/viewvc/llvm-project?rev=53208&view=rev
Log:
ATT asm printer just print register AsmName's instead of calling tolower on each charater of Name. This speeds it up by 10%.

Modified:
    llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
    llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp
    llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.h
    llvm/trunk/lib/Target/X86/X86RegisterInfo.td

Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=53208&r1=53207&r2=53208&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Mon Jul  7 17:21:06 2008
@@ -328,8 +328,7 @@
                     ((strcmp(Modifier+6,"16") == 0) ? MVT::i16 : MVT::i8));
       Reg = getX86SubSuperRegister(Reg, VT);
     }
-    for (const char *Name = TRI->getAsmName(Reg); *Name; ++Name)
-      O << (char)tolower(*Name);
+    O << TRI->getAsmName(Reg);
     return;
   }
 
@@ -680,9 +679,7 @@
     break;
   }
 
-  O << '%';
-  for (const char *Name = TRI->getAsmName(Reg); *Name; ++Name)
-    O << (char)tolower(*Name);
+  O << '%'<< TRI->getAsmName(Reg);
   return false;
 }
 

Modified: llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp?rev=53208&r1=53207&r2=53208&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.cpp Mon Jul  7 17:21:06 2008
@@ -214,7 +214,7 @@
                       ((strcmp(Modifier,"subreg16") == 0) ? MVT::i16 :MVT::i8));
         Reg = getX86SubSuperRegister(Reg, VT);
       }
-      O << TRI->getAsmName(Reg);
+      O << TRI->getName(Reg);
     } else
       O << "reg" << MO.getReg();
     return;
@@ -359,7 +359,7 @@
     break;
   }
 
-  O << '%' << TRI->getAsmName(Reg);
+  O << '%' << TRI->getName(Reg);
   return false;
 }
 

Modified: llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.h?rev=53208&r1=53207&r2=53208&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.h (original)
+++ llvm/trunk/lib/Target/X86/X86IntelAsmPrinter.h Mon Jul  7 17:21:06 2008
@@ -46,7 +46,7 @@
     if (MO.isRegister()) {
       assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
              "Not physreg??");
-      O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
+      O << TM.getRegisterInfo()->get(MO.getReg()).Name;  // Capitalized names
     } else {
       printOp(MO, Modifier);
     }

Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.td?rev=53208&r1=53207&r2=53208&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.td Mon Jul  7 17:21:06 2008
@@ -30,144 +30,144 @@
 
   // 8-bit registers
   // Low registers
-  def AL : Register<"AL">, DwarfRegNum<[0, 0, 0]>;
-  def DL : Register<"DL">, DwarfRegNum<[1, 2, 2]>;
-  def CL : Register<"CL">, DwarfRegNum<[2, 1, 1]>;
-  def BL : Register<"BL">, DwarfRegNum<[3, 3, 3]>;
+  def AL : Register<"al">, DwarfRegNum<[0, 0, 0]>;
+  def DL : Register<"dl">, DwarfRegNum<[1, 2, 2]>;
+  def CL : Register<"cl">, DwarfRegNum<[2, 1, 1]>;
+  def BL : Register<"bl">, DwarfRegNum<[3, 3, 3]>;
 
   // X86-64 only
-  def SIL : Register<"SIL">, DwarfRegNum<[4, 6, 6]>;
-  def DIL : Register<"DIL">, DwarfRegNum<[5, 7, 7]>;
-  def BPL : Register<"BPL">, DwarfRegNum<[6, 4, 5]>;
-  def SPL : Register<"SPL">, DwarfRegNum<[7, 5, 4]>;
-  def R8B  : Register<"R8B">,  DwarfRegNum<[8, -2, -2]>;
-  def R9B  : Register<"R9B">,  DwarfRegNum<[9, -2, -2]>;
-  def R10B : Register<"R10B">, DwarfRegNum<[10, -2, -2]>;
-  def R11B : Register<"R11B">, DwarfRegNum<[11, -2, -2]>;
-  def R12B : Register<"R12B">, DwarfRegNum<[12, -2, -2]>;
-  def R13B : Register<"R13B">, DwarfRegNum<[13, -2, -2]>;
-  def R14B : Register<"R14B">, DwarfRegNum<[14, -2, -2]>;
-  def R15B : Register<"R15B">, DwarfRegNum<[15, -2, -2]>;
+  def SIL : Register<"sil">, DwarfRegNum<[4, 6, 6]>;
+  def DIL : Register<"dil">, DwarfRegNum<[5, 7, 7]>;
+  def BPL : Register<"bpl">, DwarfRegNum<[6, 4, 5]>;
+  def SPL : Register<"spl">, DwarfRegNum<[7, 5, 4]>;
+  def R8B  : Register<"r8b">,  DwarfRegNum<[8, -2, -2]>;
+  def R9B  : Register<"r9b">,  DwarfRegNum<[9, -2, -2]>;
+  def R10B : Register<"r10b">, DwarfRegNum<[10, -2, -2]>;
+  def R11B : Register<"r11b">, DwarfRegNum<[11, -2, -2]>;
+  def R12B : Register<"r12b">, DwarfRegNum<[12, -2, -2]>;
+  def R13B : Register<"r13b">, DwarfRegNum<[13, -2, -2]>;
+  def R14B : Register<"r14b">, DwarfRegNum<[14, -2, -2]>;
+  def R15B : Register<"r15b">, DwarfRegNum<[15, -2, -2]>;
 
   // High registers X86-32 only
-  def AH : Register<"AH">, DwarfRegNum<[0, 0, 0]>;
-  def DH : Register<"DH">, DwarfRegNum<[1, 2, 2]>;
-  def CH : Register<"CH">, DwarfRegNum<[2, 1, 1]>;
-  def BH : Register<"BH">, DwarfRegNum<[3, 3, 3]>;
+  def AH : Register<"ah">, DwarfRegNum<[0, 0, 0]>;
+  def DH : Register<"dh">, DwarfRegNum<[1, 2, 2]>;
+  def CH : Register<"ch">, DwarfRegNum<[2, 1, 1]>;
+  def BH : Register<"bh">, DwarfRegNum<[3, 3, 3]>;
 
   // 16-bit registers
-  def AX : RegisterWithSubRegs<"AX", [AH,AL]>, DwarfRegNum<[0, 0, 0]>;
-  def DX : RegisterWithSubRegs<"DX", [DH,DL]>, DwarfRegNum<[1, 2, 2]>;
-  def CX : RegisterWithSubRegs<"CX", [CH,CL]>, DwarfRegNum<[2, 1, 1]>;
-  def BX : RegisterWithSubRegs<"BX", [BH,BL]>, DwarfRegNum<[3, 3, 3]>;
-  def SI : RegisterWithSubRegs<"SI", [SIL]>, DwarfRegNum<[4, 6, 6]>;
-  def DI : RegisterWithSubRegs<"DI", [DIL]>, DwarfRegNum<[5, 7, 7]>;
-  def BP : RegisterWithSubRegs<"BP", [BPL]>, DwarfRegNum<[6, 4, 5]>;
-  def SP : RegisterWithSubRegs<"SP", [SPL]>, DwarfRegNum<[7, 5, 4]>;
-  def IP : Register<"IP">, DwarfRegNum<[16]>;
+  def AX : RegisterWithSubRegs<"ax", [AH,AL]>, DwarfRegNum<[0, 0, 0]>;
+  def DX : RegisterWithSubRegs<"dx", [DH,DL]>, DwarfRegNum<[1, 2, 2]>;
+  def CX : RegisterWithSubRegs<"cx", [CH,CL]>, DwarfRegNum<[2, 1, 1]>;
+  def BX : RegisterWithSubRegs<"bx", [BH,BL]>, DwarfRegNum<[3, 3, 3]>;
+  def SI : RegisterWithSubRegs<"si", [SIL]>, DwarfRegNum<[4, 6, 6]>;
+  def DI : RegisterWithSubRegs<"di", [DIL]>, DwarfRegNum<[5, 7, 7]>;
+  def BP : RegisterWithSubRegs<"bp", [BPL]>, DwarfRegNum<[6, 4, 5]>;
+  def SP : RegisterWithSubRegs<"sp", [SPL]>, DwarfRegNum<[7, 5, 4]>;
+  def IP : Register<"ip">, DwarfRegNum<[16]>;
   
   // X86-64 only
-  def R8W  : RegisterWithSubRegs<"R8W", [R8B]>, DwarfRegNum<[8, -2, -2]>;
-  def R9W  : RegisterWithSubRegs<"R9W", [R9B]>, DwarfRegNum<[9, -2, -2]>;
-  def R10W : RegisterWithSubRegs<"R10W", [R10B]>, DwarfRegNum<[10, -2, -2]>;
-  def R11W : RegisterWithSubRegs<"R11W", [R11B]>, DwarfRegNum<[11, -2, -2]>;
-  def R12W : RegisterWithSubRegs<"R12W", [R12B]>, DwarfRegNum<[12, -2, -2]>;
-  def R13W : RegisterWithSubRegs<"R13W", [R13B]>, DwarfRegNum<[13, -2, -2]>;
-  def R14W : RegisterWithSubRegs<"R14W", [R14B]>, DwarfRegNum<[14, -2, -2]>;
-  def R15W : RegisterWithSubRegs<"R15W", [R15B]>, DwarfRegNum<[15, -2, -2]>;
+  def R8W  : RegisterWithSubRegs<"r8w", [R8B]>, DwarfRegNum<[8, -2, -2]>;
+  def R9W  : RegisterWithSubRegs<"r9w", [R9B]>, DwarfRegNum<[9, -2, -2]>;
+  def R10W : RegisterWithSubRegs<"r10w", [R10B]>, DwarfRegNum<[10, -2, -2]>;
+  def R11W : RegisterWithSubRegs<"r11w", [R11B]>, DwarfRegNum<[11, -2, -2]>;
+  def R12W : RegisterWithSubRegs<"r12w", [R12B]>, DwarfRegNum<[12, -2, -2]>;
+  def R13W : RegisterWithSubRegs<"r13w", [R13B]>, DwarfRegNum<[13, -2, -2]>;
+  def R14W : RegisterWithSubRegs<"r14w", [R14B]>, DwarfRegNum<[14, -2, -2]>;
+  def R15W : RegisterWithSubRegs<"r15w", [R15B]>, DwarfRegNum<[15, -2, -2]>;
 
   // 32-bit registers
-  def EAX : RegisterWithSubRegs<"EAX", [AX]>, DwarfRegNum<[0, 0, 0]>;
-  def EDX : RegisterWithSubRegs<"EDX", [DX]>, DwarfRegNum<[1, 2, 2]>;
-  def ECX : RegisterWithSubRegs<"ECX", [CX]>, DwarfRegNum<[2, 1, 1]>;
-  def EBX : RegisterWithSubRegs<"EBX", [BX]>, DwarfRegNum<[3, 3, 3]>;
-  def ESI : RegisterWithSubRegs<"ESI", [SI]>, DwarfRegNum<[4, 6, 6]>;
-  def EDI : RegisterWithSubRegs<"EDI", [DI]>, DwarfRegNum<[5, 7, 7]>;
-  def EBP : RegisterWithSubRegs<"EBP", [BP]>, DwarfRegNum<[6, 4, 5]>;
-  def ESP : RegisterWithSubRegs<"ESP", [SP]>, DwarfRegNum<[7, 5, 4]>;
-  def EIP : RegisterWithSubRegs<"EIP", [IP]>, DwarfRegNum<[16, 8, 8]>;  
+  def EAX : RegisterWithSubRegs<"eax", [AX]>, DwarfRegNum<[0, 0, 0]>;
+  def EDX : RegisterWithSubRegs<"edx", [DX]>, DwarfRegNum<[1, 2, 2]>;
+  def ECX : RegisterWithSubRegs<"ecx", [CX]>, DwarfRegNum<[2, 1, 1]>;
+  def EBX : RegisterWithSubRegs<"ebx", [BX]>, DwarfRegNum<[3, 3, 3]>;
+  def ESI : RegisterWithSubRegs<"esi", [SI]>, DwarfRegNum<[4, 6, 6]>;
+  def EDI : RegisterWithSubRegs<"edi", [DI]>, DwarfRegNum<[5, 7, 7]>;
+  def EBP : RegisterWithSubRegs<"ebp", [BP]>, DwarfRegNum<[6, 4, 5]>;
+  def ESP : RegisterWithSubRegs<"esp", [SP]>, DwarfRegNum<[7, 5, 4]>;
+  def EIP : RegisterWithSubRegs<"eip", [IP]>, DwarfRegNum<[16, 8, 8]>;  
   
   // X86-64 only
-  def R8D  : RegisterWithSubRegs<"R8D", [R8W]>, DwarfRegNum<[8, -2, -2]>;
-  def R9D  : RegisterWithSubRegs<"R9D", [R9W]>, DwarfRegNum<[9, -2, -2]>;
-  def R10D : RegisterWithSubRegs<"R10D", [R10W]>, DwarfRegNum<[10, -2, -2]>;
-  def R11D : RegisterWithSubRegs<"R11D", [R11W]>, DwarfRegNum<[11, -2, -2]>;
-  def R12D : RegisterWithSubRegs<"R12D", [R12W]>, DwarfRegNum<[12, -2, -2]>;
-  def R13D : RegisterWithSubRegs<"R13D", [R13W]>, DwarfRegNum<[13, -2, -2]>;
-  def R14D : RegisterWithSubRegs<"R14D", [R14W]>, DwarfRegNum<[14, -2, -2]>;
-  def R15D : RegisterWithSubRegs<"R15D", [R15W]>, DwarfRegNum<[15, -2, -2]>;
+  def R8D  : RegisterWithSubRegs<"r8d", [R8W]>, DwarfRegNum<[8, -2, -2]>;
+  def R9D  : RegisterWithSubRegs<"r9d", [R9W]>, DwarfRegNum<[9, -2, -2]>;
+  def R10D : RegisterWithSubRegs<"r10d", [R10W]>, DwarfRegNum<[10, -2, -2]>;
+  def R11D : RegisterWithSubRegs<"r11d", [R11W]>, DwarfRegNum<[11, -2, -2]>;
+  def R12D : RegisterWithSubRegs<"r12d", [R12W]>, DwarfRegNum<[12, -2, -2]>;
+  def R13D : RegisterWithSubRegs<"r13d", [R13W]>, DwarfRegNum<[13, -2, -2]>;
+  def R14D : RegisterWithSubRegs<"r14d", [R14W]>, DwarfRegNum<[14, -2, -2]>;
+  def R15D : RegisterWithSubRegs<"r15d", [R15W]>, DwarfRegNum<[15, -2, -2]>;
 
   // 64-bit registers, X86-64 only
-  def RAX : RegisterWithSubRegs<"RAX", [EAX]>, DwarfRegNum<[0, -2, -2]>;
-  def RDX : RegisterWithSubRegs<"RDX", [EDX]>, DwarfRegNum<[1, -2, -2]>;
-  def RCX : RegisterWithSubRegs<"RCX", [ECX]>, DwarfRegNum<[2, -2, -2]>;
-  def RBX : RegisterWithSubRegs<"RBX", [EBX]>, DwarfRegNum<[3, -2, -2]>;
-  def RSI : RegisterWithSubRegs<"RSI", [ESI]>, DwarfRegNum<[4, -2, -2]>;
-  def RDI : RegisterWithSubRegs<"RDI", [EDI]>, DwarfRegNum<[5, -2, -2]>;
-  def RBP : RegisterWithSubRegs<"RBP", [EBP]>, DwarfRegNum<[6, -2, -2]>;
-  def RSP : RegisterWithSubRegs<"RSP", [ESP]>, DwarfRegNum<[7, -2, -2]>;
-
-  def R8  : RegisterWithSubRegs<"R8", [R8D]>, DwarfRegNum<[8, -2, -2]>;
-  def R9  : RegisterWithSubRegs<"R9", [R9D]>, DwarfRegNum<[9, -2, -2]>;
-  def R10 : RegisterWithSubRegs<"R10", [R10D]>, DwarfRegNum<[10, -2, -2]>;
-  def R11 : RegisterWithSubRegs<"R11", [R11D]>, DwarfRegNum<[11, -2, -2]>;
-  def R12 : RegisterWithSubRegs<"R12", [R12D]>, DwarfRegNum<[12, -2, -2]>;
-  def R13 : RegisterWithSubRegs<"R13", [R13D]>, DwarfRegNum<[13, -2, -2]>;
-  def R14 : RegisterWithSubRegs<"R14", [R14D]>, DwarfRegNum<[14, -2, -2]>;
-  def R15 : RegisterWithSubRegs<"R15", [R15D]>, DwarfRegNum<[15, -2, -2]>;
-  def RIP : RegisterWithSubRegs<"RIP", [EIP]>,  DwarfRegNum<[16, -2, -2]>;
+  def RAX : RegisterWithSubRegs<"rax", [EAX]>, DwarfRegNum<[0, -2, -2]>;
+  def RDX : RegisterWithSubRegs<"rdx", [EDX]>, DwarfRegNum<[1, -2, -2]>;
+  def RCX : RegisterWithSubRegs<"rcx", [ECX]>, DwarfRegNum<[2, -2, -2]>;
+  def RBX : RegisterWithSubRegs<"rbx", [EBX]>, DwarfRegNum<[3, -2, -2]>;
+  def RSI : RegisterWithSubRegs<"rsi", [ESI]>, DwarfRegNum<[4, -2, -2]>;
+  def RDI : RegisterWithSubRegs<"rdi", [EDI]>, DwarfRegNum<[5, -2, -2]>;
+  def RBP : RegisterWithSubRegs<"rbp", [EBP]>, DwarfRegNum<[6, -2, -2]>;
+  def RSP : RegisterWithSubRegs<"rsp", [ESP]>, DwarfRegNum<[7, -2, -2]>;
+
+  def R8  : RegisterWithSubRegs<"r8", [R8D]>, DwarfRegNum<[8, -2, -2]>;
+  def R9  : RegisterWithSubRegs<"r9", [R9D]>, DwarfRegNum<[9, -2, -2]>;
+  def R10 : RegisterWithSubRegs<"r10", [R10D]>, DwarfRegNum<[10, -2, -2]>;
+  def R11 : RegisterWithSubRegs<"r11", [R11D]>, DwarfRegNum<[11, -2, -2]>;
+  def R12 : RegisterWithSubRegs<"r12", [R12D]>, DwarfRegNum<[12, -2, -2]>;
+  def R13 : RegisterWithSubRegs<"r13", [R13D]>, DwarfRegNum<[13, -2, -2]>;
+  def R14 : RegisterWithSubRegs<"r14", [R14D]>, DwarfRegNum<[14, -2, -2]>;
+  def R15 : RegisterWithSubRegs<"r15", [R15D]>, DwarfRegNum<[15, -2, -2]>;
+  def RIP : RegisterWithSubRegs<"rip", [EIP]>,  DwarfRegNum<[16, -2, -2]>;
 
   // MMX Registers. These are actually aliased to ST0 .. ST7
-  def MM0 : Register<"MM0">, DwarfRegNum<[41, 29, 29]>;
-  def MM1 : Register<"MM1">, DwarfRegNum<[42, 30, 30]>;
-  def MM2 : Register<"MM2">, DwarfRegNum<[43, 31, 31]>;
-  def MM3 : Register<"MM3">, DwarfRegNum<[44, 32, 32]>;
-  def MM4 : Register<"MM4">, DwarfRegNum<[45, 33, 33]>;
-  def MM5 : Register<"MM5">, DwarfRegNum<[46, 34, 34]>;
-  def MM6 : Register<"MM6">, DwarfRegNum<[47, 35, 35]>;
-  def MM7 : Register<"MM7">, DwarfRegNum<[48, 36, 36]>;
+  def MM0 : Register<"mm0">, DwarfRegNum<[41, 29, 29]>;
+  def MM1 : Register<"mm1">, DwarfRegNum<[42, 30, 30]>;
+  def MM2 : Register<"mm2">, DwarfRegNum<[43, 31, 31]>;
+  def MM3 : Register<"mm3">, DwarfRegNum<[44, 32, 32]>;
+  def MM4 : Register<"mm4">, DwarfRegNum<[45, 33, 33]>;
+  def MM5 : Register<"mm5">, DwarfRegNum<[46, 34, 34]>;
+  def MM6 : Register<"mm6">, DwarfRegNum<[47, 35, 35]>;
+  def MM7 : Register<"mm7">, DwarfRegNum<[48, 36, 36]>;
   
   // Pseudo Floating Point registers
-  def FP0 : Register<"FP0">;
-  def FP1 : Register<"FP1">;
-  def FP2 : Register<"FP2">;
-  def FP3 : Register<"FP3">;
-  def FP4 : Register<"FP4">;
-  def FP5 : Register<"FP5">;
-  def FP6 : Register<"FP6">; 
+  def FP0 : Register<"fp0">;
+  def FP1 : Register<"fp1">;
+  def FP2 : Register<"fp2">;
+  def FP3 : Register<"fp3">;
+  def FP4 : Register<"fp4">;
+  def FP5 : Register<"fp5">;
+  def FP6 : Register<"fp6">; 
 
   // XMM Registers, used by the various SSE instruction set extensions
-  def XMM0: Register<"XMM0">, DwarfRegNum<[17, 21, 21]>;
-  def XMM1: Register<"XMM1">, DwarfRegNum<[18, 22, 22]>;
-  def XMM2: Register<"XMM2">, DwarfRegNum<[19, 23, 23]>;
-  def XMM3: Register<"XMM3">, DwarfRegNum<[20, 24, 24]>;
-  def XMM4: Register<"XMM4">, DwarfRegNum<[21, 25, 25]>;
-  def XMM5: Register<"XMM5">, DwarfRegNum<[22, 26, 26]>;
-  def XMM6: Register<"XMM6">, DwarfRegNum<[23, 27, 27]>;
-  def XMM7: Register<"XMM7">, DwarfRegNum<[24, 28, 28]>;
+  def XMM0: Register<"xmm0">, DwarfRegNum<[17, 21, 21]>;
+  def XMM1: Register<"xmm1">, DwarfRegNum<[18, 22, 22]>;
+  def XMM2: Register<"xmm2">, DwarfRegNum<[19, 23, 23]>;
+  def XMM3: Register<"xmm3">, DwarfRegNum<[20, 24, 24]>;
+  def XMM4: Register<"xmm4">, DwarfRegNum<[21, 25, 25]>;
+  def XMM5: Register<"xmm5">, DwarfRegNum<[22, 26, 26]>;
+  def XMM6: Register<"xmm6">, DwarfRegNum<[23, 27, 27]>;
+  def XMM7: Register<"xmm7">, DwarfRegNum<[24, 28, 28]>;
 
   // X86-64 only
-  def XMM8:  Register<"XMM8">,  DwarfRegNum<[25, -2, -2]>;
-  def XMM9:  Register<"XMM9">,  DwarfRegNum<[26, -2, -2]>;
-  def XMM10: Register<"XMM10">, DwarfRegNum<[27, -2, -2]>;
-  def XMM11: Register<"XMM11">, DwarfRegNum<[28, -2, -2]>;
-  def XMM12: Register<"XMM12">, DwarfRegNum<[29, -2, -2]>;
-  def XMM13: Register<"XMM13">, DwarfRegNum<[30, -2, -2]>;
-  def XMM14: Register<"XMM14">, DwarfRegNum<[31, -2, -2]>;
-  def XMM15: Register<"XMM15">, DwarfRegNum<[32, -2, -2]>;
+  def XMM8:  Register<"xmm8">,  DwarfRegNum<[25, -2, -2]>;
+  def XMM9:  Register<"xmm9">,  DwarfRegNum<[26, -2, -2]>;
+  def XMM10: Register<"xmm10">, DwarfRegNum<[27, -2, -2]>;
+  def XMM11: Register<"xmm11">, DwarfRegNum<[28, -2, -2]>;
+  def XMM12: Register<"xmm12">, DwarfRegNum<[29, -2, -2]>;
+  def XMM13: Register<"xmm13">, DwarfRegNum<[30, -2, -2]>;
+  def XMM14: Register<"xmm14">, DwarfRegNum<[31, -2, -2]>;
+  def XMM15: Register<"xmm15">, DwarfRegNum<[32, -2, -2]>;
 
   // Floating point stack registers
-  def ST0 : Register<"ST(0)">, DwarfRegNum<[33, 12, 11]>;
-  def ST1 : Register<"ST(1)">, DwarfRegNum<[34, 13, 12]>;
-  def ST2 : Register<"ST(2)">, DwarfRegNum<[35, 14, 13]>;
-  def ST3 : Register<"ST(3)">, DwarfRegNum<[36, 15, 14]>;
-  def ST4 : Register<"ST(4)">, DwarfRegNum<[37, 16, 15]>;
-  def ST5 : Register<"ST(5)">, DwarfRegNum<[38, 17, 16]>;
-  def ST6 : Register<"ST(6)">, DwarfRegNum<[39, 18, 17]>;
-  def ST7 : Register<"ST(7)">, DwarfRegNum<[40, 19, 18]>; 
+  def ST0 : Register<"st(0)">, DwarfRegNum<[33, 12, 11]>;
+  def ST1 : Register<"st(1)">, DwarfRegNum<[34, 13, 12]>;
+  def ST2 : Register<"st(2)">, DwarfRegNum<[35, 14, 13]>;
+  def ST3 : Register<"st(3)">, DwarfRegNum<[36, 15, 14]>;
+  def ST4 : Register<"st(4)">, DwarfRegNum<[37, 16, 15]>;
+  def ST5 : Register<"st(5)">, DwarfRegNum<[38, 17, 16]>;
+  def ST6 : Register<"st(6)">, DwarfRegNum<[39, 18, 17]>;
+  def ST7 : Register<"st(7)">, DwarfRegNum<[40, 19, 18]>; 
 
   // Status flags register
-  def EFLAGS : Register<"EFLAGS">;
+  def EFLAGS : Register<"eflags">;
 }
 
 




From echristo at apple.com  Mon Jul  7 17:21:16 2008
From: echristo at apple.com (Eric Christopher)
Date: Mon, 7 Jul 2008 15:21:16 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53113 -
	/llvm-gcc-4.2/trunk/gcc/config/darwin.h
In-Reply-To: <A1953FC5-1A2D-4B5C-9646-16C69ADB4CE3@apple.com>
References: <200807032209.m63M9OE7026032@zion.cs.uiuc.edu>
	<FEF76249-0703-46A4-A868-31AE63791019@apple.com>
	<FEB3885B-4F4E-420C-9E83-4B9FDF41DC89@apple.com>
	<549A4A0A-7767-4A93-988F-FDF2CE0FEF85@apple.com>
	<8C608FC2-A280-4141-A0BB-0C9D163E89B4@apple.com>
	<5A3E16AB-09EC-48A5-A238-AA34835C4897@apple.com>
	<930CF270-0730-47D5-B257-A46DD7A7B61D@apple.com>
	<0B00D75C-5BBB-48BD-B5C7-2258A719C8D1@apple.com>
	<279E4DEF-E6E2-4389-B18C-3EAE46065B82@apple.com>
	<B9B4615A-EA02-44A9-B9EA-CFAC23864146@apple.com>
	<BBA53400-4214-4ED4-9595-96961F88C0E1@apple.com>
	<98F614AF-15FB-4005-A051-265C2AC2D1C5@apple.com>
	<A1953FC5-1A2D-4B5C-9646-16C69ADB4CE3@apple.com>
Message-ID: <152D9A4C-404A-4852-9022-52C4B19FCB43@apple.com>


On Jul 7, 2008, at 3:08 PM, Devang Patel wrote:

> However, if someone feels strongly, feel free to apply appropriate  
> patch to do the right thing!

I do. I think the correct way is:

llvm-gcc -Wl,<linker option> -Wl,<sub option>

Which means that the appropriate patch is reverting yours so I figure  
we can argue about it for a while :)

-eric


From evan.cheng at apple.com  Mon Jul  7 17:22:07 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 07 Jul 2008 22:22:07 -0000
Subject: [llvm-commits] [llvm] r53209 -
	/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td
Message-ID: <200807072222.m67MM8pj014593@zion.cs.uiuc.edu>

Author: evancheng
Date: Mon Jul  7 17:22:07 2008
New Revision: 53209

URL: http://llvm.org/viewvc/llvm-project?rev=53209&view=rev
Log:
Clean up PPC register specification.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td

Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td?rev=53209&r1=53208&r2=53209&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.td Mon Jul  7 17:22:07 2008
@@ -22,10 +22,9 @@
 }
 
 // GP8 - One of the 32 64-bit general-purpose registers
-class GP8<GPR SubReg, string n> : PPCReg<SubReg.AsmName> {
+class GP8<GPR SubReg, string n> : PPCReg<n> {
   field bits<5> Num = SubReg.Num;
   let SubRegs = [SubReg];
-  let Name = n;
 }
 
 // SPR - One of the 32-bit special-purpose registers
@@ -89,38 +88,38 @@
 def R31 : GPR<31, "r31">, DwarfRegNum<[31]>;
 
 // 64-bit General-purpose registers
-def X0  : GP8< R0,  "x0">, DwarfRegNum<[0]>;
-def X1  : GP8< R1,  "x1">, DwarfRegNum<[1]>;
-def X2  : GP8< R2,  "x2">, DwarfRegNum<[2]>;
-def X3  : GP8< R3,  "x3">, DwarfRegNum<[3]>;
-def X4  : GP8< R4,  "x4">, DwarfRegNum<[4]>;
-def X5  : GP8< R5,  "x5">, DwarfRegNum<[5]>;
-def X6  : GP8< R6,  "x6">, DwarfRegNum<[6]>;
-def X7  : GP8< R7,  "x7">, DwarfRegNum<[7]>;
-def X8  : GP8< R8,  "x8">, DwarfRegNum<[8]>;
-def X9  : GP8< R9,  "x9">, DwarfRegNum<[9]>;
-def X10 : GP8<R10, "x10">, DwarfRegNum<[10]>;
-def X11 : GP8<R11, "x11">, DwarfRegNum<[11]>;
-def X12 : GP8<R12, "x12">, DwarfRegNum<[12]>;
-def X13 : GP8<R13, "x13">, DwarfRegNum<[13]>;
-def X14 : GP8<R14, "x14">, DwarfRegNum<[14]>;
-def X15 : GP8<R15, "x15">, DwarfRegNum<[15]>;
-def X16 : GP8<R16, "x16">, DwarfRegNum<[16]>;
-def X17 : GP8<R17, "x17">, DwarfRegNum<[17]>;
-def X18 : GP8<R18, "x18">, DwarfRegNum<[18]>;
-def X19 : GP8<R19, "x19">, DwarfRegNum<[19]>;
-def X20 : GP8<R20, "x20">, DwarfRegNum<[20]>;
-def X21 : GP8<R21, "x21">, DwarfRegNum<[21]>;
-def X22 : GP8<R22, "x22">, DwarfRegNum<[22]>;
-def X23 : GP8<R23, "x23">, DwarfRegNum<[23]>;
-def X24 : GP8<R24, "x24">, DwarfRegNum<[24]>;
-def X25 : GP8<R25, "x25">, DwarfRegNum<[25]>;
-def X26 : GP8<R26, "x26">, DwarfRegNum<[26]>;
-def X27 : GP8<R27, "x27">, DwarfRegNum<[27]>;
-def X28 : GP8<R28, "x28">, DwarfRegNum<[28]>;
-def X29 : GP8<R29, "x29">, DwarfRegNum<[29]>;
-def X30 : GP8<R30, "x30">, DwarfRegNum<[30]>;
-def X31 : GP8<R31, "x31">, DwarfRegNum<[31]>;
+def X0  : GP8< R0,  "r0">, DwarfRegNum<[0]>;
+def X1  : GP8< R1,  "r1">, DwarfRegNum<[1]>;
+def X2  : GP8< R2,  "r2">, DwarfRegNum<[2]>;
+def X3  : GP8< R3,  "r3">, DwarfRegNum<[3]>;
+def X4  : GP8< R4,  "r4">, DwarfRegNum<[4]>;
+def X5  : GP8< R5,  "r5">, DwarfRegNum<[5]>;
+def X6  : GP8< R6,  "r6">, DwarfRegNum<[6]>;
+def X7  : GP8< R7,  "r7">, DwarfRegNum<[7]>;
+def X8  : GP8< R8,  "r8">, DwarfRegNum<[8]>;
+def X9  : GP8< R9,  "r9">, DwarfRegNum<[9]>;
+def X10 : GP8<R10, "r10">, DwarfRegNum<[10]>;
+def X11 : GP8<R11, "r11">, DwarfRegNum<[11]>;
+def X12 : GP8<R12, "r12">, DwarfRegNum<[12]>;
+def X13 : GP8<R13, "r13">, DwarfRegNum<[13]>;
+def X14 : GP8<R14, "r14">, DwarfRegNum<[14]>;
+def X15 : GP8<R15, "r15">, DwarfRegNum<[15]>;
+def X16 : GP8<R16, "r16">, DwarfRegNum<[16]>;
+def X17 : GP8<R17, "r17">, DwarfRegNum<[17]>;
+def X18 : GP8<R18, "r18">, DwarfRegNum<[18]>;
+def X19 : GP8<R19, "r19">, DwarfRegNum<[19]>;
+def X20 : GP8<R20, "r20">, DwarfRegNum<[20]>;
+def X21 : GP8<R21, "r21">, DwarfRegNum<[21]>;
+def X22 : GP8<R22, "r22">, DwarfRegNum<[22]>;
+def X23 : GP8<R23, "r23">, DwarfRegNum<[23]>;
+def X24 : GP8<R24, "r24">, DwarfRegNum<[24]>;
+def X25 : GP8<R25, "r25">, DwarfRegNum<[25]>;
+def X26 : GP8<R26, "r26">, DwarfRegNum<[26]>;
+def X27 : GP8<R27, "r27">, DwarfRegNum<[27]>;
+def X28 : GP8<R28, "r28">, DwarfRegNum<[28]>;
+def X29 : GP8<R29, "r29">, DwarfRegNum<[29]>;
+def X30 : GP8<R30, "r30">, DwarfRegNum<[30]>;
+def X31 : GP8<R31, "r31">, DwarfRegNum<[31]>;
 
 // Floating-point registers
 def F0  : FPR< 0,  "f0">, DwarfRegNum<[32]>;




From isanbard at gmail.com  Mon Jul  7 17:51:41 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 7 Jul 2008 15:51:41 -0700
Subject: [llvm-commits] [llvm] r53207 - in /llvm/trunk:
	lib/Target/Target.td utils/TableGen/RegisterInfoEmitter.cpp
In-Reply-To: <200807072219.m67MJlMK014487@zion.cs.uiuc.edu>
References: <200807072219.m67MJlMK014487@zion.cs.uiuc.edu>
Message-ID: <16e5fdf90807071551w2df9324ew53ce789d7e1ca3cb@mail.gmail.com>

I put this in because PPC uses the same names for 64-bit and 32-bit
registers. It's hard to determine which is which when it's printed
out...

-bw

On Mon, Jul 7, 2008 at 3:19 PM, Evan Cheng <evan.cheng at apple.com> wrote:
> Author: evancheng
> Date: Mon Jul  7 17:19:41 2008
> New Revision: 53207
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53207&view=rev
> Log:
> TargetRegisterDesc::Name field is the same as the abstract register name. There is no need for targets to specify register names in addition to their AsmName's.
>
> Modified:
>    llvm/trunk/lib/Target/Target.td
>    llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp
>
> Modified: llvm/trunk/lib/Target/Target.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Target.td?rev=53207&r1=53206&r2=53207&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Target.td (original)
> +++ llvm/trunk/lib/Target/Target.td Mon Jul  7 17:19:41 2008
> @@ -26,7 +26,6 @@
>  class Register<string n> {
>   string Namespace = "";
>   string AsmName = n;
> -  string Name = n;
>
>   // SpillSize - If this value is set to a non-zero value, it is the size in
>   // bits of the spill slot required to hold this register.  If this value is
>
> Modified: llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp?rev=53207&r1=53206&r2=53207&view=diff
>
> ==============================================================================
> --- llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp (original)
> +++ llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp Mon Jul  7 17:19:41 2008
> @@ -606,16 +606,7 @@
>     else
>       OS << Reg.getName();
>     OS << "\",\t\"";
> -    if (!Reg.TheDef->getValueAsString("Name").empty()) {
> -      OS << Reg.TheDef->getValueAsString("Name");
> -    } else {
> -      // Default to "name".
> -      if (!Reg.TheDef->getValueAsString("AsmName").empty())
> -        OS << Reg.TheDef->getValueAsString("AsmName");
> -      else
> -        OS << Reg.getName();
> -    }
> -    OS << "\",\t";
> +    OS << Reg.getName() << "\",\t";
>     if (RegisterAliases.count(Reg.TheDef))
>       OS << Reg.getName() << "_AliasSet,\t";
>     else
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>


From gohman at apple.com  Mon Jul  7 17:58:13 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 22:58:13 -0000
Subject: [llvm-commits] [llvm] r53210 - in /llvm/trunk:
 include/llvm/ADT/alist.h include/llvm/ADT/alist_node.h
 include/llvm/ADT/ilist.h include/llvm/Support/Recycler.h
 include/llvm/Support/RecyclingAllocator.h
 include/llvm/SymbolTableListTraits.h lib/Support/Allocator.cpp
Message-ID: <200807072258.m67MwFQk016076@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 17:58:06 2008
New Revision: 53210

URL: http://llvm.org/viewvc/llvm-project?rev=53210&view=rev
Log:
Add some basic Pool-allocation infrastructure. This adds a Recycler class,
for handling bookkeeping for deleted objects, as well as the alist class
template, for keeping lists of objects allocated from Recyclers, and some
related utilities.

Added:
    llvm/trunk/include/llvm/ADT/alist.h
    llvm/trunk/include/llvm/ADT/alist_node.h
    llvm/trunk/include/llvm/Support/Recycler.h
    llvm/trunk/include/llvm/Support/RecyclingAllocator.h
Modified:
    llvm/trunk/include/llvm/ADT/ilist.h
    llvm/trunk/include/llvm/SymbolTableListTraits.h
    llvm/trunk/lib/Support/Allocator.cpp

Added: llvm/trunk/include/llvm/ADT/alist.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/alist.h?rev=53210&view=auto

==============================================================================
--- llvm/trunk/include/llvm/ADT/alist.h (added)
+++ llvm/trunk/include/llvm/ADT/alist.h Mon Jul  7 17:58:06 2008
@@ -0,0 +1,292 @@
+//==- llvm/ADT/alist.h - Linked lists with hooks -----------------*- C++ -*-==//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the alist class template, and related infrastructure.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_ADT_ALIST_H
+#define LLVM_ADT_ALIST_H
+
+#include <cassert>
+#include "llvm/ADT/alist_node.h"
+#include "llvm/ADT/STLExtras.h"
+
+namespace llvm {
+
+/// alist_iterator - An iterator class for alist.
+///
+template<class T, class LargestT = T, class ValueT = T,
+         class NodeIterT = ilist_iterator<alist_node<T, LargestT> > >
+class alist_iterator : public bidirectional_iterator<ValueT, ptrdiff_t> {
+  typedef bidirectional_iterator<ValueT, ptrdiff_t> super;
+  typedef alist_node<T, LargestT> NodeTy;
+
+  /// NodeIter - The underlying iplist iterator that is being wrapped.
+  NodeIterT NodeIter;
+
+public:
+  typedef size_t size_type;
+  typedef typename super::pointer pointer;
+  typedef typename super::reference reference;
+
+  alist_iterator(NodeIterT NI) : NodeIter(NI) {}
+  alist_iterator(pointer EP) : NodeIter(NodeTy::getNode(EP)) {}
+  alist_iterator() : NodeIter() {}
+
+  // This is templated so that we can allow constructing a const iterator from
+  // a nonconst iterator...
+  template<class V, class W, class X, class Y>
+  alist_iterator(const alist_iterator<V, W, X, Y> &RHS)
+    : NodeIter(RHS.getNodeIterUnchecked()) {}
+
+  // This is templated so that we can allow assigning to a const iterator from
+  // a nonconst iterator...
+  template<class V, class W, class X, class Y>
+  const alist_iterator &operator=(const alist_iterator<V, W, X, Y> &RHS) {
+    NodeIter = RHS.getNodeIterUnchecked();
+    return *this;
+  }
+
+  operator pointer() const { return NodeIter->getElement((T*)0); }
+
+  reference operator*() const { return *NodeIter->getElement((T*)0); }
+  pointer   operator->() const { return &operator*(); }
+
+  bool operator==(const alist_iterator &RHS) const {
+    return NodeIter == RHS.NodeIter;
+  }
+  bool operator!=(const alist_iterator &RHS) const {
+    return NodeIter != RHS.NodeIter;
+  }
+
+  alist_iterator &operator--() {
+    --NodeIter;
+    return *this;
+  }
+  alist_iterator &operator++() {
+    ++NodeIter;
+    return *this;
+  }
+  alist_iterator operator--(int) {
+    alist_iterator tmp = *this;
+    --*this;
+    return tmp;
+  }
+  alist_iterator operator++(int) {
+    alist_iterator tmp = *this;
+    ++*this;
+    return tmp;
+  }
+
+  NodeIterT getNodeIterUnchecked() const { return NodeIter; }
+};
+
+// do not implement. this is to catch errors when people try to use
+// them as random access iterators
+template<class T, class LargestT, class ValueT, class NodeIterT>
+void operator-(int, alist_iterator<T, LargestT, ValueT, NodeIterT>);
+template<class T, class LargestT, class ValueT, class NodeIterT>
+void operator-(alist_iterator<T, LargestT, ValueT, NodeIterT>,int);
+
+template<class T, class LargestT, class ValueT, class NodeIterT>
+void operator+(int, alist_iterator<T, LargestT, ValueT, NodeIterT>);
+template<class T, class LargestT, class ValueT, class NodeIterT>
+void operator+(alist_iterator<T, LargestT, ValueT, NodeIterT>,int);
+
+// operator!=/operator== - Allow mixed comparisons without dereferencing
+// the iterator, which could very likely be pointing to end().
+template<class T, class V, class W, class X, class Y>
+bool operator!=(T* LHS, const alist_iterator<V, W, X, Y> &RHS) {
+  return LHS != RHS.getNodeIterUnchecked().getNodePtrUnchecked()
+                                                            ->getElement((T*)0);
+}
+template<class T, class V, class W, class X, class Y>
+bool operator==(T* LHS, const alist_iterator<V, W, X, Y> &RHS) {
+  return LHS == RHS.getNodeIterUnchecked().getNodePtrUnchecked()
+                                                            ->getElement((T*)0);
+}
+
+// Allow alist_iterators to convert into pointers to a node automatically when
+// used by the dyn_cast, cast, isa mechanisms...
+
+template<class From> struct simplify_type;
+
+template<class V, class W, class X, class Y>
+struct simplify_type<alist_iterator<V, W, X, Y> > {
+  typedef alist_node<V, W> NodeTy;
+  typedef NodeTy* SimpleType;
+
+  static SimpleType
+  getSimplifiedValue(const alist_iterator<V, W, X, Y> &Node) {
+    return &*Node;
+  }
+};
+template<class V, class W, class X, class Y>
+struct simplify_type<const alist_iterator<V, W, X, Y> > {
+  typedef alist_node<V, W> NodeTy;
+  typedef NodeTy* SimpleType;
+
+  static SimpleType
+  getSimplifiedValue(const alist_iterator<V, W, X, Y> &Node) {
+    return &*Node;
+  }
+};
+
+/// Template traits for alist.  By specializing this template class, you
+/// can register custom actions to be run when a node is added to or removed
+/// from an alist. A common use of this is to update parent pointers.
+///
+template<class T, class LargestT = T>
+class alist_traits {
+  typedef alist_iterator<T, LargestT> iterator;
+
+public:
+  void addNodeToList(T *) {}
+  void removeNodeFromList(T *) {}
+  void transferNodesFromList(alist_traits &, iterator, iterator) {}
+  void deleteNode(T *E) { delete alist_node<T, LargestT>::getNode(E); }
+};
+
+/// alist - This class is an ilist-style container that automatically
+/// adds the next/prev pointers. It is designed to work in cooperation
+/// with <llvm/Support/Recycler.h>.
+///
+template<class T, class LargestT = T>
+class alist {
+  typedef alist_node<T, LargestT> NodeTy;
+
+public:
+  typedef typename ilist<NodeTy>::size_type size_type;
+
+private:
+  /// NodeListTraits - ilist traits for NodeList.
+  ///
+  struct NodeListTraits : ilist_traits<alist_node<T, LargestT> > {
+    alist_traits<T, LargestT> UserTraits;
+
+    void addNodeToList(NodeTy *N) {
+      UserTraits.addNodeToList(N->getElement((T*)0));
+    }
+    void removeNodeFromList(NodeTy *N) {
+      UserTraits.removeNodeFromList(N->getElement((T*)0));
+    }
+    void transferNodesFromList(iplist<NodeTy, NodeListTraits> &L2,
+                               ilist_iterator<NodeTy> first,
+                               ilist_iterator<NodeTy> last) {
+      UserTraits.transferNodesFromList(L2.UserTraits,
+                                       iterator(first),
+                                       iterator(last));
+    }
+  };
+
+  /// NodeList - Doubly-linked list of nodes that have constructed
+  /// contents and may be in active use.
+  ///
+  iplist<NodeTy, NodeListTraits> NodeList;
+
+public:
+  ~alist() { clear(); }
+
+  typedef alist_iterator<T, LargestT, T, ilist_iterator<NodeTy> >
+    iterator;
+  typedef alist_iterator<T, LargestT, const T, ilist_iterator<const NodeTy> >
+    const_iterator;
+  typedef std::reverse_iterator<iterator> reverse_iterator;
+  typedef std::reverse_iterator<const_iterator> const_reverse_iterator;
+
+  iterator begin() { return iterator(NodeList.begin()); }
+  iterator end() { return iterator(NodeList.end()); }
+  const_iterator begin() const { return const_iterator(NodeList.begin()); }
+  const_iterator end() const { return const_iterator(NodeList.end()); }
+  reverse_iterator rbegin() { return reverse_iterator(NodeList.rbegin()); }
+  reverse_iterator rend() { return reverse_iterator(NodeList.rend()); }
+  const_reverse_iterator rbegin() const {
+    return const_reverse_iterator(NodeList.rbegin());
+  }
+  const_reverse_iterator rend() const {
+    return const_reverse_iterator(NodeList.rend());
+  }
+
+  typedef T& reference;
+  typedef const T& const_reference;
+  reference front() { return *NodeList.front().getElement((T*)0); }
+  reference back()  { return *NodeList.back().getElement((T*)0); }
+  const_reference front() const { return *NodeList.front().getElement((T*)0); }
+  const_reference back()  const { return *NodeList.back().getElement((T*)0); }
+
+  bool empty() const { return NodeList.empty(); }
+  size_type size() const { return NodeList.size(); }
+
+  void push_front(T *E) {
+    NodeTy *N = alist_node<T, LargestT>::getNode(E);
+    assert(N->getPrev() == 0);
+    assert(N->getNext() == 0);
+    NodeList.push_front(N);
+  }
+  void push_back(T *E) {
+    NodeTy *N = alist_node<T, LargestT>::getNode(E);
+    assert(N->getPrev() == 0);
+    assert(N->getNext() == 0);
+    NodeList.push_back(N);
+  }
+  iterator insert(iterator I, T *E) {
+    NodeTy *N = alist_node<T, LargestT>::getNode(E);
+    assert(N->getPrev() == 0);
+    assert(N->getNext() == 0);
+    return iterator(NodeList.insert(I.getNodeIterUnchecked(), N));
+  }
+  void splice(iterator where, alist &Other) {
+    NodeList.splice(where.getNodeIterUnchecked(), Other.NodeList);
+  }
+  void splice(iterator where, alist &Other, iterator From) {
+    NodeList.splice(where.getNodeIterUnchecked(), Other.NodeList,
+                    From.getNodeIterUnchecked());
+  }
+  void splice(iterator where, alist &Other, iterator From,
+              iterator To) {
+    NodeList.splice(where.getNodeIterUnchecked(), Other.NodeList,
+                    From.getNodeIterUnchecked(), To.getNodeIterUnchecked());
+  }
+
+  void pop_front() {
+    erase(NodeList.begin());
+  }
+  void pop_back() {
+    erase(prior(NodeList.end()));
+  }
+  iterator erase(iterator I) {
+    iterator Next = next(I);
+    NodeTy *N = NodeList.remove(I.getNodeIterUnchecked());
+    NodeList.UserTraits.deleteNode(N->getElement((T*)0));
+    return Next;
+  }
+  iterator erase(iterator first, iterator last) {
+    while (first != last)
+      first = erase(first);
+    return last;
+  }
+
+  T *remove(T *E) {
+    NodeTy *N = alist_node<T, LargestT>::getNode(E);
+    return NodeList.remove(N)->getElement((T*)0);
+  }
+
+  void clear() {
+    while (!empty()) pop_front();
+  }
+
+  alist_traits<T, LargestT> &getTraits() {
+    return NodeList.UserTraits;
+  }
+};
+
+}
+
+#endif

Added: llvm/trunk/include/llvm/ADT/alist_node.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/alist_node.h?rev=53210&view=auto

==============================================================================
--- llvm/trunk/include/llvm/ADT/alist_node.h (added)
+++ llvm/trunk/include/llvm/ADT/alist_node.h Mon Jul  7 17:58:06 2008
@@ -0,0 +1,126 @@
+//==- llvm/ADT/alist_node.h - Next/Prev helper class for alist ---*- C++ -*-==//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the alist_node class template, which is used by the alist
+// class template to provide next/prev pointers for arbitrary objects.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_ADT_ALIST_NODE_H
+#define LLVM_ADT_ALIST_NODE_H
+
+#include <cassert>
+#include "llvm/ADT/ilist.h"
+#include "llvm/Support/AlignOf.h"
+#include "llvm/Support/DataTypes.h"
+
+namespace llvm {
+
+/// alist_node - This is a utility class used by alist. It holds prev and next
+/// pointers for use with ilists, as well as storage for objects as large as
+/// LargestT, that are in T's inheritance tree.
+///
+template<class T, class LargestT = T>
+class alist_node {
+  alist_node *Prev, *Next;
+
+public:
+  alist_node() : Prev(0), Next(0) {}
+
+  alist_node *getPrev() const { return Prev; }
+  alist_node *getNext() const { return Next; }
+  void setPrev(alist_node *N) { Prev = N; }
+  void setNext(alist_node *N) { Next = N; }
+
+  union {
+    char Bytes[sizeof(LargestT)];
+    long long L;
+    void *P;
+  } Storage;
+
+  template<class SubClass>
+  SubClass *getElement(SubClass *) {
+    assert(sizeof(SubClass) <= sizeof(LargestT));
+    assert(unsigned(AlignOf<SubClass>::Alignment) <=
+           unsigned(AlignOf<LargestT>::Alignment));
+    return reinterpret_cast<SubClass*>(&Storage.Bytes);
+  }
+
+  template<class SubClass>
+  const SubClass *getElement(SubClass *) const {
+    assert(sizeof(SubClass) <= sizeof(LargestT));
+    assert(unsigned(AlignOf<SubClass>::Alignment) <=
+           unsigned(AlignOf<LargestT>::Alignment));
+    return reinterpret_cast<const SubClass*>(&Storage.Bytes);
+  }
+
+  // This code essentially does offsetof, but actual offsetof hits an ICE in
+  // GCC 4.0 relating to offsetof being used inside a template.
+  static alist_node* getNode(T *D) {
+    return reinterpret_cast<alist_node*>(reinterpret_cast<char*>(D) -
+                                                (uintptr_t)&getNull()->Storage);
+  }
+  static const alist_node* getNode(const T *D) {
+    return reinterpret_cast<alist_node*>(reinterpret_cast<char*>(D) -
+                                                (uintptr_t)&getNull()->Storage);
+  }
+private:
+  static alist_node* getNull() { return 0; }
+};
+
+// A specialization of ilist_traits for alist_nodes.
+template<class T, class LargestT>
+class ilist_traits<alist_node<T, LargestT> > {
+  typedef alist_node<T, LargestT> NodeTy;
+
+protected:
+  // Allocate a sentinel inside the traits class. This works
+  // because iplist carries an instance of the traits class.
+  NodeTy Sentinel;
+
+public:
+  static NodeTy *getPrev(NodeTy *N) { return N->getPrev(); }
+  static NodeTy *getNext(NodeTy *N) { return N->getNext(); }
+  static const NodeTy *getPrev(const NodeTy *N) { return N->getPrev(); }
+  static const NodeTy *getNext(const NodeTy *N) { return N->getNext(); }
+
+  static void setPrev(NodeTy *N, NodeTy *Prev) { N->setPrev(Prev); }
+  static void setNext(NodeTy *N, NodeTy *Next) { N->setNext(Next); }
+
+  NodeTy *createSentinel() const {
+    assert(Sentinel.getPrev() == 0);
+    assert(Sentinel.getNext() == 0);
+    return const_cast<NodeTy*>(&Sentinel);
+  }
+
+  void destroySentinel(NodeTy *N) {
+    assert(N == &Sentinel);
+    Sentinel.setPrev(0);
+    Sentinel.setNext(0);
+  }
+
+  void addNodeToList(NodeTy *N) {}
+  void removeNodeFromList(NodeTy *N) {}
+  void transferNodesFromList(iplist<NodeTy, ilist_traits> &L2,
+                             ilist_iterator<NodeTy> first,
+                             ilist_iterator<NodeTy> last) {}
+
+  // Ideally we wouldn't implement this, but ilist's clear calls it,
+  // which is called from ilist's destructor. We won't ever call
+  // either of those with a non-empty list, but statically this
+  // method needs to exist.
+  void deleteNode(NodeTy *N) { assert(0); }
+
+private:
+  static NodeTy *createNode(const NodeTy &V); // do not implement
+};
+
+}
+
+#endif

Modified: llvm/trunk/include/llvm/ADT/ilist.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ilist.h?rev=53210&r1=53209&r2=53210&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/ilist.h (original)
+++ llvm/trunk/include/llvm/ADT/ilist.h Mon Jul  7 17:58:06 2008
@@ -60,6 +60,7 @@
   static void setNext(NodeTy *N, NodeTy *Next) { N->setNext(Next); }
 
   static NodeTy *createNode(const NodeTy &V) { return new NodeTy(V); }
+  static void deleteNode(NodeTy *V) { delete V; }
 
   static NodeTy *createSentinel() { return new NodeTy(); }
   static void destroySentinel(NodeTy *N) { delete N; }
@@ -121,8 +122,7 @@
     assert(Traits::getNext(NodePtr) != 0 && "Dereferencing end()!");
     return *NodePtr;
   }
-  pointer operator->() { return &operator*(); }
-  const pointer operator->() const { return &operator*(); }
+  pointer operator->() const { return &operator*(); }
 
   // Comparison operators
   bool operator==(const ilist_iterator &RHS) const {
@@ -380,7 +380,7 @@
 
   // erase - remove a node from the controlled sequence... and delete it.
   iterator erase(iterator where) {
-    delete remove(where);
+    deleteNode(remove(where));
     return where;
   }
 

Added: llvm/trunk/include/llvm/Support/Recycler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/Recycler.h?rev=53210&view=auto

==============================================================================
--- llvm/trunk/include/llvm/Support/Recycler.h (added)
+++ llvm/trunk/include/llvm/Support/Recycler.h Mon Jul  7 17:58:06 2008
@@ -0,0 +1,97 @@
+//==- llvm/Support/Recycler.h - Recycling Allocator --------------*- C++ -*-==//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the Recycler class template.  See the doxygen comment for
+// Recycler for more details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_SUPPORT_RECYCLER_H
+#define LLVM_SUPPORT_RECYCLER_H
+
+#include <cassert>
+#include "llvm/ADT/alist_node.h"
+
+namespace llvm {
+
+/// PrintRecyclingAllocatorStats - Helper for RecyclingAllocator for
+/// printing statistics.
+///
+void PrintRecyclerStats(size_t LargestTypeSize, size_t FreeListSize);
+
+/// Recycler - This class manages a linked-list of deallocated nodes
+/// and facilitates reusing deallocated memory in place of allocating
+/// new memory. The objects it allocates are stored in alist_node
+/// containers, so they may be used in alists.
+///
+template<class T, class LargestT = T>
+class Recycler {
+  typedef alist_node<T, LargestT> NodeTy;
+
+  /// FreeListTraits - ilist traits for FreeList.
+  ///
+  struct FreeListTraits : ilist_traits<alist_node<T, LargestT> > {
+    NodeTy &getSentinel() { return this->Sentinel; }
+  };
+
+  /// FreeList - Doubly-linked list of nodes that have deleted contents and
+  /// are not in active use.
+  ///
+  iplist<NodeTy, FreeListTraits> FreeList;
+
+  /// CreateNewNode - Allocate a new node object and initialize its
+  /// prev and next pointers to 0.
+  ///
+  template<class AllocatorType>
+  NodeTy *CreateNewNode(AllocatorType &Allocator) {
+    // Note that we're calling new on the *node*, to initialize its
+    // Next/Prev pointers, not new on the end-user object.
+    return new (Allocator.Allocate<NodeTy>()) NodeTy();
+  }
+
+public:
+  ~Recycler() { assert(FreeList.empty()); }
+
+  template<class AllocatorType>
+  void clear(AllocatorType &Allocator) {
+    while (!FreeList.empty())
+      Allocator.Deallocate(FreeList.remove(FreeList.begin()));
+  }
+
+  template<class SubClass, class AllocatorType>
+  SubClass *Allocate(AllocatorType &Allocator) {
+    NodeTy *N = !FreeList.empty() ?
+                FreeList.remove(FreeList.front()) :
+                CreateNewNode(Allocator);
+    assert(N->getPrev() == 0);
+    assert(N->getNext() == 0);
+    return N->getElement((SubClass*)0);
+  }
+
+  template<class AllocatorType>
+  T *Allocate(AllocatorType &Allocator) {
+    return Allocate<T>(Allocator);
+  }
+
+  template<class SubClass, class AllocatorType>
+  void Deallocate(AllocatorType &Allocator, SubClass* Element) {
+    NodeTy *N = NodeTy::getNode(Element);
+    assert(N->getPrev() == 0);
+    assert(N->getNext() == 0);
+    FreeList.push_front(N);
+  }
+
+  void PrintStats() {
+    PrintRecyclerStats(sizeof(LargestT), FreeList.size());
+  }
+};
+
+}
+
+#endif

Added: llvm/trunk/include/llvm/Support/RecyclingAllocator.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/RecyclingAllocator.h?rev=53210&view=auto

==============================================================================
--- llvm/trunk/include/llvm/Support/RecyclingAllocator.h (added)
+++ llvm/trunk/include/llvm/Support/RecyclingAllocator.h Mon Jul  7 17:58:06 2008
@@ -0,0 +1,60 @@
+//==- llvm/Support/RecyclingAllocator.h - Recycling Allocator ----*- C++ -*-==//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the RecyclingAllocator class.  See the doxygen comment for
+// RecyclingAllocator for more details on the implementation.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_SUPPORT_RECYCLINGALLOCATOR_H
+#define LLVM_SUPPORT_RECYCLINGALLOCATOR_H
+
+#include <cassert>
+#include "llvm/Support/Recycler.h"
+#include "llvm/ADT/STLExtras.h"
+
+namespace llvm {
+
+/// RecyclingAllocator - This class wraps an Allocator, adding the
+/// functionality of recycling deleted objects.
+///
+template<class AllocatorType, class T, class LargestT = T>
+class RecyclingAllocator {
+private:
+  /// Base - Implementation details.
+  ///
+  Recycler<T, LargestT> Base;
+
+  /// Allocator - The wrapped allocator.
+  ///
+  AllocatorType Allocator;
+
+public:
+  ~RecyclingAllocator() { Base.clear(Allocator); }
+
+  /// Allocate - Return a pointer to storage for an object of type
+  /// SubClass. The storage may be either newly allocated or recycled.
+  ///
+  template<class SubClass>
+  SubClass *Allocate() { return Base.Allocate<SubClass>(Allocator); }
+
+  T *Allocate() { return Base.Allocate(Allocator); }
+
+  /// Deallocate - Release storage for the pointed-to object. The
+  /// storage will be kept track of and may be recycled.
+  ///
+  template<class SubClass>
+  void Deallocate(SubClass* E) { return Base.Deallocate(Allocator, E); }
+
+  void PrintStats() { Base.PrintStats(); }
+};
+
+}
+
+#endif

Modified: llvm/trunk/include/llvm/SymbolTableListTraits.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/SymbolTableListTraits.h?rev=53210&r1=53209&r2=53210&view=diff

==============================================================================
--- llvm/trunk/include/llvm/SymbolTableListTraits.h (original)
+++ llvm/trunk/include/llvm/SymbolTableListTraits.h Mon Jul  7 17:58:06 2008
@@ -57,6 +57,10 @@
     return V->getNext();
   }
 
+  void deleteNode(ValueSubClass *V) {
+    delete V;
+  }
+
   static void setPrev(ValueSubClass *V, ValueSubClass *P) { V->setPrev(P); }
   static void setNext(ValueSubClass *V, ValueSubClass *N) { V->setNext(N); }
 

Modified: llvm/trunk/lib/Support/Allocator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Allocator.cpp?rev=53210&r1=53209&r2=53210&view=diff

==============================================================================
--- llvm/trunk/lib/Support/Allocator.cpp (original)
+++ llvm/trunk/lib/Support/Allocator.cpp Mon Jul  7 17:58:06 2008
@@ -12,6 +12,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Support/Allocator.h"
+#include "llvm/Support/Recycler.h"
 #include "llvm/Support/DataTypes.h"
 #include "llvm/Support/Streams.h"
 #include <ostream>
@@ -130,3 +131,9 @@
   cerr << "\nNumber of memory regions: " << NumRegions << "\n";
   cerr << "Bytes allocated: " << BytesUsed << "\n";
 }
+
+void llvm::PrintRecyclerStats(size_t LargestTypeSize,
+                              size_t FreeListSize) {
+  cerr << "Recycler element size: " << LargestTypeSize << '\n';
+  cerr << "Number of elements free for recycling: " << FreeListSize << '\n';
+}




From gohman at apple.com  Mon Jul  7 18:02:42 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 23:02:42 -0000
Subject: [llvm-commits] [llvm] r53211 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAG.h include/llvm/CodeGen/SelectionDAGISel.h
 include/llvm/CodeGen/SelectionDAGNodes.h
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <200807072302.m67N2hhL016253@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 18:02:41 2008
New Revision: 53211

URL: http://llvm.org/viewvc/llvm-project?rev=53211&view=rev
Log:
Pool-allocation for SDNodes. The pool is allocated once for each function,
and reused across SelectionDAGs.

This drastically reduces the number of calls to malloc/free made during
instruction selection, and improves memory locality.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
    llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=53211&r1=53210&r2=53211&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Mon Jul  7 18:02:41 2008
@@ -17,7 +17,6 @@
 
 #include "llvm/ADT/FoldingSet.h"
 #include "llvm/ADT/StringMap.h"
-#include "llvm/ADT/ilist.h"
 #include "llvm/CodeGen/SelectionDAGNodes.h"
 
 #include <list>
@@ -55,7 +54,7 @@
   SDOperand Root, EntryNode;
 
   /// AllNodes - A linked list of nodes in the current DAG.
-  ilist<SDNode> AllNodes;
+  alist<SDNode, LargestSDNode> &AllNodes;
 
   /// CSEMap - This structure is used to memoize nodes, automatically performing
   /// CSE with existing nodes with a duplicate is requested.
@@ -63,8 +62,9 @@
 
 public:
   SelectionDAG(TargetLowering &tli, MachineFunction &mf, 
-               FunctionLoweringInfo &fli, MachineModuleInfo *mmi)
-  : TLI(tli), MF(mf), FLI(fli), MMI(mmi) {
+               FunctionLoweringInfo &fli, MachineModuleInfo *mmi,
+               alist<SDNode, LargestSDNode> &NodePool)
+  : TLI(tli), MF(mf), FLI(fli), MMI(mmi), AllNodes(NodePool) {
     EntryNode = Root = getNode(ISD::EntryToken, MVT::Other);
   }
   ~SelectionDAG();
@@ -99,13 +99,15 @@
   ///
   void setGraphColor(const SDNode *N, const char *Color);
 
-  typedef ilist<SDNode>::const_iterator allnodes_const_iterator;
+  typedef alist<SDNode, LargestSDNode>::const_iterator allnodes_const_iterator;
   allnodes_const_iterator allnodes_begin() const { return AllNodes.begin(); }
   allnodes_const_iterator allnodes_end() const { return AllNodes.end(); }
-  typedef ilist<SDNode>::iterator allnodes_iterator;
+  typedef alist<SDNode, LargestSDNode>::iterator allnodes_iterator;
   allnodes_iterator allnodes_begin() { return AllNodes.begin(); }
   allnodes_iterator allnodes_end() { return AllNodes.end(); }
-  ilist<SDNode>::size_type allnodes_size() const { return AllNodes.size(); }
+  alist<SDNode, LargestSDNode>::size_type allnodes_size() const {
+    return AllNodes.size();
+  }
   
   /// getRoot - Return the root tag of the SelectionDAG.
   ///
@@ -642,6 +644,7 @@
   SDOperand getShuffleScalarElt(const SDNode *N, unsigned Idx);
   
 private:
+  inline alist_traits<SDNode, LargestSDNode>::AllocatorType &getAllocator();
   void RemoveNodeFromCSEMaps(SDNode *N);
   SDNode *AddNonLeafNodeToCSEMaps(SDNode *N);
   SDNode *FindModifiedNodeSlot(SDNode *N, SDOperand Op, void *&InsertPos);

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=53211&r1=53210&r2=53211&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Mon Jul  7 18:02:41 2008
@@ -178,8 +178,11 @@
                     int64_t DesiredMaskS) const;
   
 private:
+  void SelectAllBasicBlocks(Function &Fn, MachineFunction &MF,
+                            FunctionLoweringInfo &FuncInfo);
   void SelectBasicBlock(BasicBlock *BB, MachineFunction &MF,
-                        FunctionLoweringInfo &FuncInfo);
+                        FunctionLoweringInfo &FuncInfo,
+                        alist<SDNode, LargestSDNode> &AllNodes);
 
   void BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB,
            std::vector<std::pair<MachineInstr*, unsigned> > &PHINodesToUpdate,

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=53211&r1=53210&r2=53211&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Mon Jul  7 18:02:41 2008
@@ -25,8 +25,11 @@
 #include "llvm/ADT/iterator.h"
 #include "llvm/ADT/APFloat.h"
 #include "llvm/ADT/APInt.h"
+#include "llvm/ADT/alist.h"
 #include "llvm/CodeGen/ValueTypes.h"
 #include "llvm/CodeGen/MachineMemOperand.h"
+#include "llvm/Support/Allocator.h"
+#include "llvm/Support/RecyclingAllocator.h"
 #include "llvm/Support/DataTypes.h"
 #include <cassert>
 
@@ -40,9 +43,6 @@
 class CompileUnitDesc;
 template <typename T> struct DenseMapInfo;
 template <typename T> struct simplify_type;
-template <typename T> struct ilist_traits;
-template<typename NodeTy, typename Traits> class iplist;
-template<typename NodeTy> class ilist_iterator;
 
 /// SDVTList - This represents a list of ValueType's that has been intern'd by
 /// a SelectionDAG.  Instances of this simple value class are returned by
@@ -1054,11 +1054,6 @@
   /// Uses - List of uses for this SDNode.
   SDUse *Uses;
 
-  /// Prev/Next pointers - These pointers form the linked list of of the
-  /// AllNodes list in the current DAG.
-  SDNode *Prev, *Next;
-  friend struct ilist_traits<SDNode>;
-
   /// addUse - add SDUse to the list of uses.
   void addUse(SDUse &U) { U.addToList(&Uses); }
 
@@ -1268,7 +1263,6 @@
     
     ValueList = VTs.VTs;
     NumValues = VTs.NumVTs;
-    Prev = 0; Next = 0;
   }
 
   SDNode(unsigned Opc, SDVTList VTs, const SDUse *Ops, unsigned NumOps)
@@ -1286,7 +1280,6 @@
     
     ValueList = VTs.VTs;
     NumValues = VTs.NumVTs;
-    Prev = 0; Next = 0;
   }
 
   SDNode(unsigned Opc, SDVTList VTs)
@@ -1296,7 +1289,6 @@
     OperandList = 0;
     ValueList = VTs.VTs;
     NumValues = VTs.NumVTs;
-    Prev = 0; Next = 0;
   }
   
   /// InitOperands - Initialize the operands list of this node with the
@@ -2234,26 +2226,30 @@
   }
 };
 
-template<>
-struct ilist_traits<SDNode> {
-  static SDNode *getPrev(const SDNode *N) { return N->Prev; }
-  static SDNode *getNext(const SDNode *N) { return N->Next; }
-  
-  static void setPrev(SDNode *N, SDNode *Prev) { N->Prev = Prev; }
-  static void setNext(SDNode *N, SDNode *Next) { N->Next = Next; }
-  
-  static SDNode *createSentinel() {
-    return new SDNode(ISD::EntryToken, SDNode::getSDVTList(MVT::Other));
-  }
-  static void destroySentinel(SDNode *N) { delete N; }
-  //static SDNode *createNode(const SDNode &V) { return new SDNode(V); }
-  
-  
-  void addNodeToList(SDNode *) {}
-  void removeNodeFromList(SDNode *) {}
-  void transferNodesFromList(iplist<SDNode, ilist_traits> &,
-                             const ilist_iterator<SDNode> &,
-                             const ilist_iterator<SDNode> &) {}
+/// LargestSDNode - The largest SDNode class.
+///
+typedef LoadSDNode LargestSDNode;
+
+// alist_traits specialization for pool-allocating SDNodes.
+template <>
+class alist_traits<SDNode, LargestSDNode> {
+  typedef alist_iterator<SDNode, LargestSDNode> iterator;
+
+public:
+  // Pool-allocate and recycle SDNodes.
+  typedef RecyclingAllocator<BumpPtrAllocator, SDNode, LargestSDNode>
+    AllocatorType;
+
+  // Allocate the allocator immediately inside the traits class.
+  AllocatorType Allocator;
+
+  void addNodeToList(SDNode* N) {}
+  void removeNodeFromList(SDNode* N) {}
+  void transferNodesFromList(alist_traits &, iterator, iterator) {}
+  void deleteNode(SDNode *N) {
+    N->~SDNode();
+    Allocator.Deallocate(N);
+  }
 };
 
 namespace ISD {

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53211&r1=53210&r2=53211&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Jul  7 18:02:41 2008
@@ -472,6 +472,11 @@
 //                              SelectionDAG Class
 //===----------------------------------------------------------------------===//
 
+inline alist_traits<SDNode, LargestSDNode>::AllocatorType &
+SelectionDAG::getAllocator() {
+  return AllNodes.getTraits().Allocator;
+}
+
 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
 /// SelectionDAG.
 void SelectionDAG::RemoveDeadNodes() {
@@ -549,9 +554,6 @@
 
 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
 
-  // Remove it from the AllNodes list.
-  AllNodes.remove(N);
-    
   // Drop all of the operands and decrement used nodes use counts.
   for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
     I->getVal()->removeUser(std::distance(N->op_begin(), I), N);
@@ -561,7 +563,7 @@
   N->OperandList = 0;
   N->NumOperands = 0;
   
-  delete N;
+  AllNodes.erase(N);
 }
 
 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
@@ -754,7 +756,8 @@
     if (!VT.isVector())
       return SDOperand(N, 0);
   if (!N) {
-    N = new ConstantSDNode(isT, Val, EltVT);
+    N = getAllocator().Allocate<ConstantSDNode>();
+    new (N) ConstantSDNode(isT, Val, EltVT);
     CSEMap.InsertNode(N, IP);
     AllNodes.push_back(N);
   }
@@ -792,7 +795,8 @@
     if (!VT.isVector())
       return SDOperand(N, 0);
   if (!N) {
-    N = new ConstantFPSDNode(isTarget, V, EltVT);
+    N = getAllocator().Allocate<ConstantFPSDNode>();
+    new (N) ConstantFPSDNode(isTarget, V, EltVT);
     CSEMap.InsertNode(N, IP);
     AllNodes.push_back(N);
   }
@@ -839,7 +843,8 @@
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
    return SDOperand(E, 0);
-  SDNode *N = new GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
+  SDNode *N = getAllocator().Allocate<GlobalAddressSDNode>();
+  new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -853,7 +858,8 @@
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode *N = new FrameIndexSDNode(FI, VT, isTarget);
+  SDNode *N = getAllocator().Allocate<FrameIndexSDNode>();
+  new (N) FrameIndexSDNode(FI, VT, isTarget);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -867,7 +873,8 @@
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode *N = new JumpTableSDNode(JTI, VT, isTarget);
+  SDNode *N = getAllocator().Allocate<JumpTableSDNode>();
+  new (N) JumpTableSDNode(JTI, VT, isTarget);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -885,7 +892,8 @@
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode *N = new ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
+  SDNode *N = getAllocator().Allocate<ConstantPoolSDNode>();
+  new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -904,7 +912,8 @@
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode *N = new ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
+  SDNode *N = getAllocator().Allocate<ConstantPoolSDNode>();
+  new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -918,7 +927,8 @@
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode *N = new BasicBlockSDNode(MBB);
+  SDNode *N = getAllocator().Allocate<BasicBlockSDNode>();
+  new (N) BasicBlockSDNode(MBB);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -931,7 +941,8 @@
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode *N = new ARG_FLAGSSDNode(Flags);
+  SDNode *N = getAllocator().Allocate<ARG_FLAGSSDNode>();
+  new (N) ARG_FLAGSSDNode(Flags);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -945,7 +956,8 @@
     ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
 
   if (N) return SDOperand(N, 0);
-  N = new VTSDNode(VT);
+  N = getAllocator().Allocate<VTSDNode>();
+  new (N) VTSDNode(VT);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
 }
@@ -953,7 +965,8 @@
 SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
   SDNode *&N = ExternalSymbols[Sym];
   if (N) return SDOperand(N, 0);
-  N = new ExternalSymbolSDNode(false, Sym, VT);
+  N = getAllocator().Allocate<ExternalSymbolSDNode>();
+  new (N) ExternalSymbolSDNode(false, Sym, VT);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
 }
@@ -961,7 +974,8 @@
 SDOperand SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
   SDNode *&N = TargetExternalSymbols[Sym];
   if (N) return SDOperand(N, 0);
-  N = new ExternalSymbolSDNode(true, Sym, VT);
+  N = getAllocator().Allocate<ExternalSymbolSDNode>();
+  new (N) ExternalSymbolSDNode(true, Sym, VT);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
 }
@@ -971,8 +985,10 @@
     CondCodeNodes.resize(Cond+1);
 
   if (CondCodeNodes[Cond] == 0) {
-    CondCodeNodes[Cond] = new CondCodeSDNode(Cond);
-    AllNodes.push_back(CondCodeNodes[Cond]);
+    CondCodeSDNode *N = getAllocator().Allocate<CondCodeSDNode>();
+    new (N) CondCodeSDNode(Cond);
+    CondCodeNodes[Cond] = N;
+    AllNodes.push_back(N);
   }
   return SDOperand(CondCodeNodes[Cond], 0);
 }
@@ -984,7 +1000,8 @@
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode *N = new RegisterSDNode(RegNo, VT);
+  SDNode *N = getAllocator().Allocate<RegisterSDNode>();
+  new (N) RegisterSDNode(RegNo, VT);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -1002,7 +1019,8 @@
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode *N = new DbgStopPointSDNode(Root, Line, Col, CU);
+  SDNode *N = getAllocator().Allocate<DbgStopPointSDNode>();
+  new (N) DbgStopPointSDNode(Root, Line, Col, CU);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -1018,7 +1036,8 @@
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode *N = new LabelSDNode(Opcode, Root, LabelID);
+  SDNode *N = getAllocator().Allocate<LabelSDNode>();
+  new (N) LabelSDNode(Opcode, Root, LabelID);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -1036,7 +1055,8 @@
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
 
-  SDNode *N = new SrcValueSDNode(V);
+  SDNode *N = getAllocator().Allocate<SrcValueSDNode>();
+  new (N) SrcValueSDNode(V);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -1059,7 +1079,8 @@
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
 
-  SDNode *N = new MemOperandSDNode(MO);
+  SDNode *N = getAllocator().Allocate<MemOperandSDNode>();
+  new (N) MemOperandSDNode(MO);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -1911,7 +1932,8 @@
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode *N = new SDNode(Opcode, SDNode::getSDVTList(VT));
+  SDNode *N = getAllocator().Allocate<SDNode>();
+  new (N) SDNode(Opcode, SDNode::getSDVTList(VT));
   CSEMap.InsertNode(N, IP);
   
   AllNodes.push_back(N);
@@ -2104,10 +2126,12 @@
     void *IP = 0;
     if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
       return SDOperand(E, 0);
-    N = new UnarySDNode(Opcode, VTs, Operand);
+    N = getAllocator().Allocate<UnarySDNode>();
+    new (N) UnarySDNode(Opcode, VTs, Operand);
     CSEMap.InsertNode(N, IP);
   } else {
-    N = new UnarySDNode(Opcode, VTs, Operand);
+    N = getAllocator().Allocate<UnarySDNode>();
+    new (N) UnarySDNode(Opcode, VTs, Operand);
   }
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -2454,10 +2478,12 @@
     void *IP = 0;
     if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
       return SDOperand(E, 0);
-    N = new BinarySDNode(Opcode, VTs, N1, N2);
+    N = getAllocator().Allocate<BinarySDNode>();
+    new (N) BinarySDNode(Opcode, VTs, N1, N2);
     CSEMap.InsertNode(N, IP);
   } else {
-    N = new BinarySDNode(Opcode, VTs, N1, N2);
+    N = getAllocator().Allocate<BinarySDNode>();
+    new (N) BinarySDNode(Opcode, VTs, N1, N2);
   }
 
   AllNodes.push_back(N);
@@ -2518,10 +2544,12 @@
     void *IP = 0;
     if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
       return SDOperand(E, 0);
-    N = new TernarySDNode(Opcode, VTs, N1, N2, N3);
+    N = getAllocator().Allocate<TernarySDNode>();
+    new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
     CSEMap.InsertNode(N, IP);
   } else {
-    N = new TernarySDNode(Opcode, VTs, N1, N2, N3);
+    N = getAllocator().Allocate<TernarySDNode>();
+    new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
   }
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -3029,8 +3057,8 @@
   void* IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp,
-                               PtrVal, Alignment);
+  SDNode* N = getAllocator().Allocate<AtomicSDNode>();
+  new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -3054,8 +3082,8 @@
   void* IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Val,
-                               PtrVal, Alignment);
+  SDNode* N = getAllocator().Allocate<AtomicSDNode>();
+  new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, PtrVal, Alignment);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -3128,8 +3156,9 @@
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode *N = new LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
-                             Alignment, isVolatile);
+  SDNode *N = getAllocator().Allocate<LoadSDNode>();
+  new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
+                     Alignment, isVolatile);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -3196,8 +3225,9 @@
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode *N = new StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
-                              VT, SV, SVOffset, Alignment, isVolatile);
+  SDNode *N = getAllocator().Allocate<StoreSDNode>();
+  new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
+                      VT, SV, SVOffset, Alignment, isVolatile);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -3241,8 +3271,9 @@
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode *N = new StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
-                              SVT, SV, SVOffset, Alignment, isVolatile);
+  SDNode *N = getAllocator().Allocate<StoreSDNode>();
+  new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
+                      SVT, SV, SVOffset, Alignment, isVolatile);
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -3266,10 +3297,11 @@
   void *IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
     return SDOperand(E, 0);
-  SDNode *N = new StoreSDNode(Ops, VTs, AM,
-                              ST->isTruncatingStore(), ST->getMemoryVT(),
-                              ST->getSrcValue(), ST->getSrcValueOffset(),
-                              ST->getAlignment(), ST->isVolatile());
+  SDNode *N = getAllocator().Allocate<StoreSDNode>();
+  new (N) StoreSDNode(Ops, VTs, AM,
+                      ST->isTruncatingStore(), ST->getMemoryVT(),
+                      ST->getSrcValue(), ST->getSrcValueOffset(),
+                      ST->getAlignment(), ST->isVolatile());
   CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -3342,10 +3374,12 @@
     void *IP = 0;
     if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
       return SDOperand(E, 0);
-    N = new SDNode(Opcode, VTs, Ops, NumOps);
+    N = getAllocator().Allocate<SDNode>();
+    new (N) SDNode(Opcode, VTs, Ops, NumOps);
     CSEMap.InsertNode(N, IP);
   } else {
-    N = new SDNode(Opcode, VTs, Ops, NumOps);
+    N = getAllocator().Allocate<SDNode>();
+    new (N) SDNode(Opcode, VTs, Ops, NumOps);
   }
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -3402,24 +3436,34 @@
     void *IP = 0;
     if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
       return SDOperand(E, 0);
-    if (NumOps == 1)
-      N = new UnarySDNode(Opcode, VTList, Ops[0]);
-    else if (NumOps == 2)
-      N = new BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
-    else if (NumOps == 3)
-      N = new TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
-    else
-      N = new SDNode(Opcode, VTList, Ops, NumOps);
+    if (NumOps == 1) {
+      N = getAllocator().Allocate<UnarySDNode>();
+      new (N) UnarySDNode(Opcode, VTList, Ops[0]);
+    } else if (NumOps == 2) {
+      N = getAllocator().Allocate<BinarySDNode>();
+      new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
+    } else if (NumOps == 3) {
+      N = getAllocator().Allocate<TernarySDNode>();
+      new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
+    } else {
+      N = getAllocator().Allocate<SDNode>();
+      new (N) SDNode(Opcode, VTList, Ops, NumOps);
+    }
     CSEMap.InsertNode(N, IP);
   } else {
-    if (NumOps == 1)
-      N = new UnarySDNode(Opcode, VTList, Ops[0]);
-    else if (NumOps == 2)
-      N = new BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
-    else if (NumOps == 3)
-      N = new TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
-    else
-      N = new SDNode(Opcode, VTList, Ops, NumOps);
+    if (NumOps == 1) {
+      N = getAllocator().Allocate<UnarySDNode>();
+      new (N) UnarySDNode(Opcode, VTList, Ops[0]);
+    } else if (NumOps == 2) {
+      N = getAllocator().Allocate<BinarySDNode>();
+      new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
+    } else if (NumOps == 3) {
+      N = getAllocator().Allocate<TernarySDNode>();
+      new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
+    } else {
+      N = getAllocator().Allocate<SDNode>();
+      new (N) SDNode(Opcode, VTList, Ops, NumOps);
+    }
   }
   AllNodes.push_back(N);
   return SDOperand(N, 0);
@@ -4203,6 +4247,7 @@
   }
 
   TopOrder.clear();
+  TopOrder.reserve(DAGSize);
   while (!Sources.empty()) {
     SDNode *N = Sources.back();
     Sources.pop_back();

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=53211&r1=53210&r2=53211&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Jul  7 18:02:41 2008
@@ -414,9 +414,9 @@
   // also creates the initial PHI MachineInstrs, though none of the input
   // operands are populated.
   for (BB = Fn.begin(), EB = Fn.end(); BB != EB; ++BB) {
-    MachineBasicBlock *MBB = new MachineBasicBlock(BB);
+    MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(BB);
     MBBMap[BB] = MBB;
-    MF.getBasicBlockList().push_back(MBB);
+    MF.push_back(MBB);
 
     // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
     // appropriate.
@@ -1432,8 +1432,9 @@
   
   //  Create TmpBB after CurBB.
   MachineFunction::iterator BBI = CurBB;
-  MachineBasicBlock *TmpBB = new MachineBasicBlock(CurBB->getBasicBlock());
-  CurBB->getParent()->getBasicBlockList().insert(++BBI, TmpBB);
+  MachineFunction &MF = DAG.getMachineFunction();
+  MachineBasicBlock *TmpBB = MF.CreateMachineBasicBlock(CurBB->getBasicBlock());
+  CurBB->getParent()->insert(++BBI, TmpBB);
   
   if (Opc == Instruction::Or) {
     // Codegen X | Y as:
@@ -1554,7 +1555,7 @@
       // Okay, we decided not to do this, remove any inserted MBB's and clear
       // SwitchCases.
       for (unsigned i = 1, e = SwitchCases.size(); i != e; ++i)
-        CurMBB->getParent()->getBasicBlockList().erase(SwitchCases[i].ThisBB);
+        CurMBB->getParent()->erase(SwitchCases[i].ThisBB);
       
       SwitchCases.clear();
     }
@@ -1861,8 +1862,8 @@
   for (CaseItr I = CR.Range.first, E = CR.Range.second; I != E; ++I) {
     MachineBasicBlock *FallThrough;
     if (I != E-1) {
-      FallThrough = new MachineBasicBlock(CurBlock->getBasicBlock());
-      CurMF->getBasicBlockList().insert(BBI, FallThrough);
+      FallThrough = CurMF->CreateMachineBasicBlock(CurBlock->getBasicBlock());
+      CurMF->insert(BBI, FallThrough);
     } else {
       // If the last case doesn't match, go to the default block.
       FallThrough = Default;
@@ -1945,8 +1946,8 @@
   // of the jump table, and jumping to it.  Update successor information;
   // we will either branch to the default case for the switch, or the jump
   // table.
-  MachineBasicBlock *JumpTableBB = new MachineBasicBlock(LLVMBB);
-  CurMF->getBasicBlockList().insert(BBI, JumpTableBB);
+  MachineBasicBlock *JumpTableBB = CurMF->CreateMachineBasicBlock(LLVMBB);
+  CurMF->insert(BBI, JumpTableBB);
   CR.CaseBB->addSuccessor(Default);
   CR.CaseBB->addSuccessor(JumpTableBB);
                 
@@ -2083,8 +2084,8 @@
       (cast<ConstantInt>(CR.GE)->getSExtValue() + 1LL)) {
     TrueBB = LHSR.first->BB;
   } else {
-    TrueBB = new MachineBasicBlock(LLVMBB);
-    CurMF->getBasicBlockList().insert(BBI, TrueBB);
+    TrueBB = CurMF->CreateMachineBasicBlock(LLVMBB);
+    CurMF->insert(BBI, TrueBB);
     WorkList.push_back(CaseRec(TrueBB, C, CR.GE, LHSR));
   }
   
@@ -2097,8 +2098,8 @@
       (cast<ConstantInt>(CR.LT)->getSExtValue() - 1LL)) {
     FalseBB = RHSR.first->BB;
   } else {
-    FalseBB = new MachineBasicBlock(LLVMBB);
-    CurMF->getBasicBlockList().insert(BBI, FalseBB);
+    FalseBB = CurMF->CreateMachineBasicBlock(LLVMBB);
+    CurMF->insert(BBI, FalseBB);
     WorkList.push_back(CaseRec(FalseBB,CR.LT,C,RHSR));
   }
 
@@ -2220,8 +2221,8 @@
     DOUT << "Mask: " << CasesBits[i].Mask << ", Bits: " << CasesBits[i].Bits
          << ", BB: " << CasesBits[i].BB << "\n";
 
-    MachineBasicBlock *CaseBB = new MachineBasicBlock(LLVMBB);
-    CurMF->getBasicBlockList().insert(BBI, CaseBB);
+    MachineBasicBlock *CaseBB = CurMF->CreateMachineBasicBlock(LLVMBB);
+    CurMF->insert(BBI, CaseBB);
     BTC.push_back(SelectionDAGISel::BitTestCase(CasesBits[i].Mask,
                                                 CaseBB,
                                                 CasesBits[i].BB));
@@ -4877,8 +4878,7 @@
       // Mark landing pad.
       FuncInfo.MBBMap[Invoke->getSuccessor(1)]->setIsLandingPad();
 
-  for (Function::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
-    SelectBasicBlock(I, MF, FuncInfo);
+  SelectAllBasicBlocks(Fn, MF, FuncInfo);
 
   // Add function live-ins to entry block live-in set.
   BasicBlock *EntryBB = &Fn.getEntryBlock();
@@ -5002,10 +5002,11 @@
  
   // Fix tail call attribute of CALL nodes.
   for (SelectionDAG::allnodes_iterator BE = DAG.allnodes_begin(),
-         BI = prior(DAG.allnodes_end()); BI != BE; --BI) {
+         BI = DAG.allnodes_end(); BI != BE; ) {
+    --BI;
     if (BI->getOpcode() == ISD::CALL) {
       SDOperand OpRet(Ret, 0);
-      SDOperand OpCall(static_cast<SDNode*>(BI), 0);
+      SDOperand OpCall(BI, 0);
       bool isMarkedTailCall = 
         cast<ConstantSDNode>(OpCall.getOperand(3))->getValue() != 0;
       // If CALL node has tail call attribute set to true and the call is not
@@ -5355,12 +5356,26 @@
   DEBUG(BB->dump());
 }  
 
+void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn, MachineFunction &MF,
+                                            FunctionLoweringInfo &FuncInfo) {
+  // Define AllNodes here so that memory allocation is reused for
+  // each basic block.
+  alist<SDNode, LargestSDNode> AllNodes;
+
+  for (Function::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
+    SelectBasicBlock(I, MF, FuncInfo, AllNodes);
+    AllNodes.clear();
+  }
+}
+
 void SelectionDAGISel::SelectBasicBlock(BasicBlock *LLVMBB, MachineFunction &MF,
-                                        FunctionLoweringInfo &FuncInfo) {
+                                        FunctionLoweringInfo &FuncInfo,
+                                        alist<SDNode, LargestSDNode> &AllNodes) {
   std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
   {
     SelectionDAG DAG(TLI, MF, FuncInfo, 
-                     getAnalysisToUpdate<MachineModuleInfo>());
+                     getAnalysisToUpdate<MachineModuleInfo>(),
+                     AllNodes);
     CurDAG = &DAG;
   
     // First step, lower LLVM code to some DAG.  This DAG may use operations and
@@ -5395,7 +5410,8 @@
     // Lower header first, if it wasn't already lowered
     if (!BitTestCases[i].Emitted) {
       SelectionDAG HSDAG(TLI, MF, FuncInfo, 
-                         getAnalysisToUpdate<MachineModuleInfo>());
+                         getAnalysisToUpdate<MachineModuleInfo>(),
+                         AllNodes);
       CurDAG = &HSDAG;
       SelectionDAGLowering HSDL(HSDAG, TLI, *AA, FuncInfo, GCI);
       // Set the current basic block to the mbb we wish to insert the code into
@@ -5409,7 +5425,8 @@
 
     for (unsigned j = 0, ej = BitTestCases[i].Cases.size(); j != ej; ++j) {
       SelectionDAG BSDAG(TLI, MF, FuncInfo, 
-                         getAnalysisToUpdate<MachineModuleInfo>());
+                         getAnalysisToUpdate<MachineModuleInfo>(),
+                         AllNodes);
       CurDAG = &BSDAG;
       SelectionDAGLowering BSDL(BSDAG, TLI, *AA, FuncInfo, GCI);
       // Set the current basic block to the mbb we wish to insert the code into
@@ -5467,7 +5484,8 @@
     // Lower header first, if it wasn't already lowered
     if (!JTCases[i].first.Emitted) {
       SelectionDAG HSDAG(TLI, MF, FuncInfo, 
-                         getAnalysisToUpdate<MachineModuleInfo>());
+                         getAnalysisToUpdate<MachineModuleInfo>(),
+                         AllNodes);
       CurDAG = &HSDAG;
       SelectionDAGLowering HSDL(HSDAG, TLI, *AA, FuncInfo, GCI);
       // Set the current basic block to the mbb we wish to insert the code into
@@ -5480,7 +5498,8 @@
     }
     
     SelectionDAG JSDAG(TLI, MF, FuncInfo, 
-                       getAnalysisToUpdate<MachineModuleInfo>());
+                       getAnalysisToUpdate<MachineModuleInfo>(),
+                       AllNodes);
     CurDAG = &JSDAG;
     SelectionDAGLowering JSDL(JSDAG, TLI, *AA, FuncInfo, GCI);
     // Set the current basic block to the mbb we wish to insert the code into
@@ -5529,7 +5548,8 @@
   // additional DAGs necessary.
   for (unsigned i = 0, e = SwitchCases.size(); i != e; ++i) {
     SelectionDAG SDAG(TLI, MF, FuncInfo, 
-                      getAnalysisToUpdate<MachineModuleInfo>());
+                      getAnalysisToUpdate<MachineModuleInfo>(),
+                      AllNodes);
     CurDAG = &SDAG;
     SelectionDAGLowering SDL(SDAG, TLI, *AA, FuncInfo, GCI);
     




From gohman at apple.com  Mon Jul  7 18:14:25 2008
From: gohman at apple.com (Dan Gohman)
Date: Mon, 07 Jul 2008 23:14:25 -0000
Subject: [llvm-commits] [llvm] r53212 - in /llvm/trunk:
 include/llvm/CodeGen/ lib/CodeGen/ lib/CodeGen/SelectionDAG/
 lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/
 lib/Target/Mips/ lib/Target/PIC16/ lib/Target/PowerPC/ lib/Target/Sparc/
 lib/Target/X86/
Message-ID: <200807072314.m67NER4K016634@zion.cs.uiuc.edu>

Author: djg
Date: Mon Jul  7 18:14:23 2008
New Revision: 53212

URL: http://llvm.org/viewvc/llvm-project?rev=53212&view=rev
Log:
Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

Modified:
    llvm/trunk/include/llvm/CodeGen/BreakCriticalMachineEdge.h
    llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h
    llvm/trunk/include/llvm/CodeGen/MachineFunction.h
    llvm/trunk/include/llvm/CodeGen/MachineInstr.h
    llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h
    llvm/trunk/lib/CodeGen/BranchFolding.cpp
    llvm/trunk/lib/CodeGen/IfConversion.cpp
    llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
    llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp
    llvm/trunk/lib/CodeGen/MachineFunction.cpp
    llvm/trunk/lib/CodeGen/MachineInstr.cpp
    llvm/trunk/lib/CodeGen/PHIElimination.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
    llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp
    llvm/trunk/lib/CodeGen/VirtRegMap.cpp
    llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp
    llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp
    llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp
    llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp
    llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp
    llvm/trunk/lib/Target/IA64/IA64InstrInfo.cpp
    llvm/trunk/lib/Target/IA64/IA64RegisterInfo.cpp
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
    llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
    llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.cpp
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
    llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
    llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h
    llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
    llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp
    llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
    llvm/trunk/lib/Target/X86/X86InstrInfo.h
    llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp

Modified: llvm/trunk/include/llvm/CodeGen/BreakCriticalMachineEdge.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/BreakCriticalMachineEdge.h?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/BreakCriticalMachineEdge.h (original)
+++ llvm/trunk/include/llvm/CodeGen/BreakCriticalMachineEdge.h Mon Jul  7 18:14:23 2008
@@ -22,9 +22,10 @@
 
 MachineBasicBlock* SplitCriticalMachineEdge(MachineBasicBlock* src,
                                             MachineBasicBlock* dst) {
+  MachineFunction &MF = *src->getParent();
   const BasicBlock* srcBB = src->getBasicBlock();
 
-  MachineBasicBlock* crit_mbb = new MachineBasicBlock(srcBB);
+  MachineBasicBlock* crit_mbb = MF.CreateMachineBasicBlock(srcBB);
 
   // modify the llvm control flow graph
   src->removeSuccessor(dst);
@@ -32,11 +33,10 @@
   crit_mbb->addSuccessor(dst);
 
   // insert the new block into the machine function.
-  src->getParent()->getBasicBlockList().insert(src->getParent()->end(),
-                                                 crit_mbb);
+  MF.push_back(crit_mbb);
 
   // insert a unconditional branch linking the new block to dst
-  const TargetMachine& TM = src->getParent()->getTarget();
+  const TargetMachine& TM = MF.getTarget();
   const TargetInstrInfo* TII = TM.getInstrInfo();
   std::vector<MachineOperand> emptyConditions;
   TII->InsertBranch(*crit_mbb, dst, (MachineBasicBlock*)0, 

Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Mon Jul  7 18:14:23 2008
@@ -16,57 +16,38 @@
 
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/ADT/GraphTraits.h"
-#include "llvm/ADT/ilist.h"
 #include "llvm/Support/Streams.h"
 
 namespace llvm {
   class MachineFunction;
 
-// ilist_traits
 template <>
-struct ilist_traits<MachineInstr> {
+struct alist_traits<MachineInstr, MachineInstr> {
 protected:
-  // this is only set by the MachineBasicBlock owning the ilist
+  // this is only set by the MachineBasicBlock owning the LiveList
   friend class MachineBasicBlock;
-  MachineBasicBlock* parent;
+  MachineBasicBlock* Parent;
 
-public:
-  ilist_traits<MachineInstr>() : parent(0) { }
-
-  static MachineInstr* getPrev(MachineInstr* N) { return N->Prev; }
-  static MachineInstr* getNext(MachineInstr* N) { return N->Next; }
-
-  static const MachineInstr*
-  getPrev(const MachineInstr* N) { return N->Prev; }
-
-  static const MachineInstr*
-  getNext(const MachineInstr* N) { return N->Next; }
+  typedef alist_iterator<MachineInstr> iterator;
 
-  static void setPrev(MachineInstr* N, MachineInstr* prev) { N->Prev = prev; }
-  static void setNext(MachineInstr* N, MachineInstr* next) { N->Next = next; }
+public:
+  alist_traits<MachineInstr, MachineInstr>() : Parent(0) { }
 
-  static MachineInstr* createSentinel();
-  static void destroySentinel(MachineInstr *MI) { delete MI; }
   void addNodeToList(MachineInstr* N);
   void removeNodeFromList(MachineInstr* N);
-  void transferNodesFromList(
-      iplist<MachineInstr, ilist_traits<MachineInstr> >& toList,
-      ilist_iterator<MachineInstr> first,
-      ilist_iterator<MachineInstr> last);
+  void transferNodesFromList(alist_traits &, iterator, iterator);
+  void deleteNode(MachineInstr *N);
 };
 
 class BasicBlock;
 
 class MachineBasicBlock {
-  typedef ilist<MachineInstr> Instructions;
+  typedef alist<MachineInstr> Instructions;
   Instructions Insts;
-  MachineBasicBlock *Prev, *Next;
   const BasicBlock *BB;
   int Number;
   MachineFunction *xParent;
   
-  void setParent(MachineFunction *P) { xParent = P; }
-
   /// Predecessors/Successors - Keep track of the predecessor / successor
   /// basicblocks.
   std::vector<MachineBasicBlock *> Predecessors;
@@ -84,15 +65,14 @@
   /// exception handler.
   bool IsLandingPad;
 
-public:
-  explicit MachineBasicBlock(const BasicBlock *bb = 0)
-    : Prev(0), Next(0), BB(bb), Number(-1), xParent(0),
-      Alignment(0), IsLandingPad(false) {
-    Insts.parent = this;
-  }
+  explicit MachineBasicBlock(MachineFunction &mf, const BasicBlock *bb);
+
+  ~MachineBasicBlock() {}
 
-  ~MachineBasicBlock();
+  // MachineBasicBlocks are allocated and owned by MachineFunction.
+  friend class MachineFunction;
 
+public:
   /// getBasicBlock - Return the LLVM basic block that this instance
   /// corresponded to originally.
   ///
@@ -103,8 +83,8 @@
   const MachineFunction *getParent() const { return xParent; }
   MachineFunction *getParent() { return xParent; }
 
-  typedef ilist<MachineInstr>::iterator                       iterator;
-  typedef ilist<MachineInstr>::const_iterator           const_iterator;
+  typedef Instructions::iterator                              iterator;
+  typedef Instructions::const_iterator                  const_iterator;
   typedef std::reverse_iterator<const_iterator> const_reverse_iterator;
   typedef std::reverse_iterator<iterator>             reverse_iterator;
 
@@ -272,6 +252,14 @@
     Insts.splice(where, Other->Insts, From, To);
   }
 
+  /// removeFromParent - This method unlinks 'this' from the containing
+  /// function, and returns it, but does not delete it.
+  MachineBasicBlock *removeFromParent();
+  
+  /// eraseFromParent - This method unlinks 'this' from the containing
+  /// function and deletes it.
+  void eraseFromParent();
+
   /// ReplaceUsesOfBlockWith - Given a machine basic block that branched to
   /// 'Old', change the code and CFG so that it branches to 'New' instead.
   void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New);
@@ -299,12 +287,7 @@
   void setNumber(int N) { Number = N; }
 
 private:   // Methods used to maintain doubly linked list of blocks...
-  friend struct ilist_traits<MachineBasicBlock>;
-
-  MachineBasicBlock *getPrev() const { return Prev; }
-  MachineBasicBlock *getNext() const { return Next; }
-  void setPrev(MachineBasicBlock *P) { Prev = P; }
-  void setNext(MachineBasicBlock *N) { Next = N; }
+  friend struct alist_traits<MachineBasicBlock>;
 
   // Machine-CFG mutators
 

Modified: llvm/trunk/include/llvm/CodeGen/MachineFunction.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFunction.h?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineFunction.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineFunction.h Mon Jul  7 18:14:23 2008
@@ -18,8 +18,11 @@
 #ifndef LLVM_CODEGEN_MACHINEFUNCTION_H
 #define LLVM_CODEGEN_MACHINEFUNCTION_H
 
+#include "llvm/ADT/alist.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/Support/Annotation.h"
+#include "llvm/Support/Allocator.h"
+#include "llvm/Support/Recycler.h"
 
 namespace llvm {
 
@@ -30,40 +33,16 @@
 class MachineConstantPool;
 class MachineJumpTableInfo;
 
-// ilist_traits
 template <>
-class ilist_traits<MachineBasicBlock> {
-  // this is only set by the MachineFunction owning the ilist
-  friend class MachineFunction;
-  MachineFunction* Parent;
-
+class alist_traits<MachineBasicBlock, MachineBasicBlock> {
+  typedef alist_iterator<MachineBasicBlock> iterator;
 public:
-  ilist_traits<MachineBasicBlock>() : Parent(0) { }
-
-  static MachineBasicBlock* getPrev(MachineBasicBlock* N) { return N->Prev; }
-  static MachineBasicBlock* getNext(MachineBasicBlock* N) { return N->Next; }
-
-  static const MachineBasicBlock*
-  getPrev(const MachineBasicBlock* N) { return N->Prev; }
-
-  static const MachineBasicBlock*
-  getNext(const MachineBasicBlock* N) { return N->Next; }
-
-  static void setPrev(MachineBasicBlock* N, MachineBasicBlock* prev) {
-    N->Prev = prev;
-  }
-  static void setNext(MachineBasicBlock* N, MachineBasicBlock* next) {
-    N->Next = next;
-  }
-
-  static MachineBasicBlock* createSentinel();
-  static void destroySentinel(MachineBasicBlock *MBB) { delete MBB; }
-  void addNodeToList(MachineBasicBlock* N);
-  void removeNodeFromList(MachineBasicBlock* N);
-  void transferNodesFromList(iplist<MachineBasicBlock,
-                                    ilist_traits<MachineBasicBlock> > &toList,
-                             ilist_iterator<MachineBasicBlock> first,
-                             ilist_iterator<MachineBasicBlock> last);
+  void addNodeToList(MachineBasicBlock* MBB);
+  void removeNodeFromList(MachineBasicBlock* MBB);
+  void transferNodesFromList(alist_traits<MachineBasicBlock> &,
+                             iterator,
+                             iterator) {}
+  void deleteNode(MachineBasicBlock *MBB);
 };
 
 /// MachineFunctionInfo - This class can be derived from and used by targets to
@@ -78,9 +57,6 @@
   const Function *Fn;
   const TargetMachine &Target;
 
-  // List of machine basic blocks in function
-  ilist<MachineBasicBlock> BasicBlocks;
-
   // RegInfo - Information about each register in use in the function.
   MachineRegisterInfo *RegInfo;
 
@@ -102,6 +78,22 @@
   // numbered and this vector keeps track of the mapping from ID's to MBB's.
   std::vector<MachineBasicBlock*> MBBNumbering;
 
+  // Pool-allocate MachineFunction-lifetime and IR objects.
+  BumpPtrAllocator Allocator;
+
+  // Allocation management for instructions in function.
+  Recycler<MachineInstr> InstructionRecycler;
+
+  // Allocation management for basic blocks in function.
+  Recycler<MachineBasicBlock> BasicBlockRecycler;
+
+  // Allocation management for memoperands in function.
+  Recycler<MachineMemOperand> MemOperandRecycler;
+
+  // List of machine basic blocks in function
+  typedef alist<MachineBasicBlock> BasicBlockListType;
+  BasicBlockListType BasicBlocks;
+
 public:
   MachineFunction(const Function *Fn, const TargetMachine &TM);
   ~MachineFunction();
@@ -116,31 +108,35 @@
 
   /// getRegInfo - Return information about the registers currently in use.
   ///
-  MachineRegisterInfo &getRegInfo() const { return *RegInfo; }
+  MachineRegisterInfo &getRegInfo() { return *RegInfo; }
+  const MachineRegisterInfo &getRegInfo() const { return *RegInfo; }
 
   /// getFrameInfo - Return the frame info object for the current function.
   /// This object contains information about objects allocated on the stack
   /// frame of the current function in an abstract way.
   ///
-  MachineFrameInfo *getFrameInfo() const { return FrameInfo; }
+  MachineFrameInfo *getFrameInfo() { return FrameInfo; }
+  const MachineFrameInfo *getFrameInfo() const { return FrameInfo; }
 
   /// getJumpTableInfo - Return the jump table info object for the current 
   /// function.  This object contains information about jump tables for switch
   /// instructions in the current function.
   ///
-  MachineJumpTableInfo *getJumpTableInfo() const { return JumpTableInfo; }
+  MachineJumpTableInfo *getJumpTableInfo() { return JumpTableInfo; }
+  const MachineJumpTableInfo *getJumpTableInfo() const { return JumpTableInfo; }
   
   /// getConstantPool - Return the constant pool object for the current
   /// function.
   ///
-  MachineConstantPool *getConstantPool() const { return ConstantPool; }
+  MachineConstantPool *getConstantPool() { return ConstantPool; }
+  const MachineConstantPool *getConstantPool() const { return ConstantPool; }
 
   /// MachineFunctionInfo - Keep track of various per-function pieces of
   /// information for backends that would like to do so.
   ///
   template<typename Ty>
   Ty *getInfo() {
-    if (!MFInfo) MFInfo = new Ty(*this);
+    if (!MFInfo) MFInfo = new (Allocator.Allocate<Ty>()) Ty(*this);
 
     assert((void*)dynamic_cast<Ty*>(MFInfo) == (void*)MFInfo &&
            "Invalid concrete type or multiple inheritence for getInfo");
@@ -215,18 +211,13 @@
   static MachineFunction& get(const Function *F);
 
   // Provide accessors for the MachineBasicBlock list...
-  typedef ilist<MachineBasicBlock> BasicBlockListType;
   typedef BasicBlockListType::iterator iterator;
   typedef BasicBlockListType::const_iterator const_iterator;
   typedef std::reverse_iterator<const_iterator> const_reverse_iterator;
   typedef std::reverse_iterator<iterator>             reverse_iterator;
 
-  // Provide accessors for basic blocks...
-  const BasicBlockListType &getBasicBlockList() const { return BasicBlocks; }
-        BasicBlockListType &getBasicBlockList()       { return BasicBlocks; }
-
   //===--------------------------------------------------------------------===//
-  // BasicBlock iterator forwarding functions
+  // BasicBlock accessor functions.
   //
   iterator                 begin()       { return BasicBlocks.begin(); }
   const_iterator           begin() const { return BasicBlocks.begin(); }
@@ -245,6 +236,22 @@
   const MachineBasicBlock & back() const { return BasicBlocks.back(); }
         MachineBasicBlock & back()       { return BasicBlocks.back(); }
 
+  void push_back (MachineBasicBlock *MBB) { BasicBlocks.push_back (MBB); }
+  void push_front(MachineBasicBlock *MBB) { BasicBlocks.push_front(MBB); }
+  void insert(iterator MBBI, MachineBasicBlock *MBB) {
+    BasicBlocks.insert(MBBI, MBB);
+  }
+  void splice(iterator InsertPt, iterator MBBI) {
+    BasicBlocks.splice(InsertPt, BasicBlocks, MBBI);
+  }
+
+  void remove(iterator MBBI) {
+    BasicBlocks.remove(MBBI);
+  }
+  void erase(iterator MBBI) {
+    BasicBlocks.erase(MBBI);
+  }
+
   //===--------------------------------------------------------------------===//
   // Internal functions used to automatically number MachineBasicBlocks
   //
@@ -264,6 +271,40 @@
     assert(N < MBBNumbering.size() && "Illegal basic block #");
     MBBNumbering[N] = 0;
   }
+
+  /// CreateMachineInstr - Allocate a new MachineInstr. Use this instead
+  /// of `new MachineInstr'.
+  ///
+  MachineInstr *CreateMachineInstr(const TargetInstrDesc &TID,
+                                   bool NoImp = false);
+
+  /// CloneMachineInstr - Create a new MachineInstr which is a copy of the
+  /// 'Orig' instruction, identical in all ways except the the instruction
+  /// has no parent, prev, or next.
+  ///
+  MachineInstr *CloneMachineInstr(const MachineInstr *Orig);
+
+  /// DeleteMachineInstr - Delete the given MachineInstr.
+  ///
+  void DeleteMachineInstr(MachineInstr *MI);
+
+  /// CreateMachineBasicBlock - Allocate a new MachineBasicBlock. Use this
+  /// instead of `new MachineBasicBlock'.
+  ///
+  MachineBasicBlock *CreateMachineBasicBlock(const BasicBlock *bb = 0);
+
+  /// DeleteMachineBasicBlock - Delete the given MachineBasicBlock.
+  ///
+  void DeleteMachineBasicBlock(MachineBasicBlock *MBB);
+
+  /// CreateMachineMemOperand - Allocate a new MachineMemOperand. Use this
+  /// instead of `new MachineMemOperand'.
+  ///
+  MachineMemOperand *CreateMachineMemOperand(const MachineMemOperand &MMO);
+
+  /// DeleteMachineMemOperand - Delete the given MachineMemOperand.
+  ///
+  void DeleteMachineMemOperand(MachineMemOperand *MMO);
 };
 
 //===--------------------------------------------------------------------===//

Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineInstr.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h Mon Jul  7 18:14:23 2008
@@ -16,6 +16,7 @@
 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
 #define LLVM_CODEGEN_MACHINEINSTR_H
 
+#include "llvm/ADT/alist.h"
 #include "llvm/CodeGen/MachineOperand.h"
 #include "llvm/CodeGen/MachineMemOperand.h"
 #include <vector>
@@ -25,9 +26,7 @@
 class TargetInstrDesc;
 class TargetInstrInfo;
 class TargetRegisterInfo;
-
-template <typename T> struct ilist_traits;
-template <typename T> struct ilist;
+class MachineFunction;
 
 //===----------------------------------------------------------------------===//
 /// MachineInstr - Representation of each machine instruction.
@@ -38,21 +37,24 @@
                                         // are determined at construction time).
 
   std::vector<MachineOperand> Operands; // the operands
-  std::vector<MachineMemOperand> MemOperands;// information on memory references
-  MachineInstr *Prev, *Next;            // Links for MBB's intrusive list.
+  alist<MachineMemOperand> MemOperands; // information on memory references
   MachineBasicBlock *Parent;            // Pointer to the owning basic block.
 
   // OperandComplete - Return true if it's illegal to add a new operand
   bool OperandsComplete() const;
 
-  MachineInstr(const MachineInstr&);
+  MachineInstr(const MachineInstr&);   // DO NOT IMPLEMENT
   void operator=(const MachineInstr&); // DO NOT IMPLEMENT
 
   // Intrusive list support
-  friend struct ilist_traits<MachineInstr>;
-  friend struct ilist_traits<MachineBasicBlock>;
+  friend struct alist_traits<MachineInstr>;
+  friend struct alist_traits<MachineBasicBlock>;
   void setParent(MachineBasicBlock *P) { Parent = P; }
-public:
+
+  /// MachineInstr ctor - This constructor creates a copy of the given
+  /// MachineInstr in the given MachineFunction.
+  MachineInstr(MachineFunction &, const MachineInstr &);
+
   /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
   /// TID NULL and no operands.
   MachineInstr();
@@ -70,6 +72,10 @@
 
   ~MachineInstr();
 
+  // MachineInstrs are pool-allocated and owned by MachineFunction.
+  friend class MachineFunction;
+
+public:
   const MachineBasicBlock* getParent() const { return Parent; }
   MachineBasicBlock* getParent() { return Parent; }
   
@@ -99,16 +105,15 @@
   unsigned getNumExplicitOperands() const;
   
   /// Access to memory operands of the instruction
-  unsigned getNumMemOperands() const { return (unsigned)MemOperands.size(); }
-
-  const MachineMemOperand& getMemOperand(unsigned i) const {
-    assert(i < getNumMemOperands() && "getMemOperand() out of range!");
-    return MemOperands[i];
-  }
-  MachineMemOperand& getMemOperand(unsigned i) {
-    assert(i < getNumMemOperands() && "getMemOperand() out of range!");
-    return MemOperands[i];
-  }
+  alist<MachineMemOperand>::iterator memoperands_begin()
+  { return MemOperands.begin(); }
+  alist<MachineMemOperand>::iterator memoperands_end()
+  { return MemOperands.end(); }
+  alist<MachineMemOperand>::const_iterator memoperands_begin() const
+  { return MemOperands.begin(); }
+  alist<MachineMemOperand>::const_iterator memoperands_end() const
+  { return MemOperands.end(); }
+  bool memoperands_empty() const { return MemOperands.empty(); }
 
   /// isIdenticalTo - Return true if this instruction is identical to (same
   /// opcode and same operands as) the specified instruction.
@@ -122,19 +127,13 @@
     return true;
   }
 
-  /// clone - Create a copy of 'this' instruction that is identical in
-  /// all ways except the the instruction has no parent, prev, or next.
-  MachineInstr* clone() const { return new MachineInstr(*this); }
-  
   /// removeFromParent - This method unlinks 'this' from the containing basic
   /// block, and returns it, but does not delete it.
   MachineInstr *removeFromParent();
   
   /// eraseFromParent - This method unlinks 'this' from the containing basic
   /// block and deletes it.
-  void eraseFromParent() {
-    delete removeFromParent();
-  }
+  void eraseFromParent();
 
   /// isLabel - Returns true if the MachineInstr represents a label.
   ///
@@ -270,9 +269,11 @@
 
   /// addMemOperand - Add a MachineMemOperand to the machine instruction,
   /// referencing arbitrary storage.
-  void addMemOperand(const MachineMemOperand &MO) {
-    MemOperands.push_back(MO);
-  }
+  void addMemOperand(MachineFunction &MF,
+                     const MachineMemOperand &MO);
+
+  /// clearMemOperands - Erase all of this MachineInstr's MachineMemOperands.
+  void clearMemOperands(MachineFunction &MF);
 
 private:
   /// getRegInfo - If this instruction is embedded into a MachineFunction,

Modified: llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h Mon Jul  7 18:14:23 2008
@@ -83,27 +83,23 @@
     MI->addOperand(MachineOperand::CreateES(FnName, 0));
     return *this;
   }
-
-  /// addMemOperand - Add a memory operand to the machine instruction.
-  const MachineInstrBuilder &addMemOperand(const MachineMemOperand &MO) const {
-    MI->addMemOperand(MO);
-    return *this;
-  }
 };
 
 /// BuildMI - Builder interface.  Specify how to create the initial instruction
 /// itself.
 ///
-inline MachineInstrBuilder BuildMI(const TargetInstrDesc &TID) {
-  return MachineInstrBuilder(new MachineInstr(TID));
+inline MachineInstrBuilder BuildMI(MachineFunction &MF,
+                                   const TargetInstrDesc &TID) {
+  return MachineInstrBuilder(MF.CreateMachineInstr(TID));
 }
 
 /// BuildMI - This version of the builder sets up the first operand as a
 /// destination virtual register.
 ///
-inline MachineInstrBuilder  BuildMI(const TargetInstrDesc &TID,
+inline MachineInstrBuilder  BuildMI(MachineFunction &MF,
+                                    const TargetInstrDesc &TID,
                                     unsigned DestReg) {
-  return MachineInstrBuilder(new MachineInstr(TID)).addReg(DestReg, true);
+  return MachineInstrBuilder(MF.CreateMachineInstr(TID)).addReg(DestReg, true);
 }
 
 /// BuildMI - This version of the builder inserts the newly-built
@@ -114,7 +110,7 @@
                                    MachineBasicBlock::iterator I,
                                    const TargetInstrDesc &TID,
                                    unsigned DestReg) {
-  MachineInstr *MI = new MachineInstr(TID);
+  MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID);
   BB.insert(I, MI);
   return MachineInstrBuilder(MI).addReg(DestReg, true);
 }
@@ -126,7 +122,7 @@
 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
                                    MachineBasicBlock::iterator I,
                                    const TargetInstrDesc &TID) {
-  MachineInstr *MI = new MachineInstr(TID);
+  MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID);
   BB.insert(I, MI);
   return MachineInstrBuilder(MI);
 }

Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original)
+++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Mon Jul  7 18:14:23 2008
@@ -127,7 +127,7 @@
   }
   
   // Remove the block.
-  MF->getBasicBlockList().erase(MBB);
+  MF->erase(MBB);
 }
 
 /// OptimizeImpDefsBlock - If a basic block is just a bunch of implicit_def
@@ -375,10 +375,12 @@
 /// iterator.  This returns the new MBB.
 MachineBasicBlock *BranchFolder::SplitMBBAt(MachineBasicBlock &CurMBB,
                                             MachineBasicBlock::iterator BBI1) {
+  MachineFunction &MF = *CurMBB.getParent();
+
   // Create the fall-through block.
   MachineFunction::iterator MBBI = &CurMBB;
-  MachineBasicBlock *NewMBB = new MachineBasicBlock(CurMBB.getBasicBlock());
-  CurMBB.getParent()->getBasicBlockList().insert(++MBBI, NewMBB);
+  MachineBasicBlock *NewMBB =MF.CreateMachineBasicBlock(CurMBB.getBasicBlock());
+  CurMBB.getParent()->insert(++MBBI, NewMBB);
 
   // Move all the successors of this block to the specified block.
   NewMBB->transferSuccessors(&CurMBB);

Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/IfConversion.cpp (original)
+++ llvm/trunk/lib/CodeGen/IfConversion.cpp Mon Jul  7 18:14:23 2008
@@ -1134,6 +1134,8 @@
 void IfConverter::CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
                                         std::vector<MachineOperand> &Cond,
                                         bool IgnoreBr) {
+  MachineFunction &MF = *ToBBI.BB->getParent();
+
   for (MachineBasicBlock::iterator I = FromBBI.BB->begin(),
          E = FromBBI.BB->end(); I != E; ++I) {
     const TargetInstrDesc &TID = I->getDesc();
@@ -1142,7 +1144,7 @@
     if (IgnoreBr && !isPredicated && TID.isBranch())
       break;
 
-    MachineInstr *MI = I->clone();
+    MachineInstr *MI = MF.CloneMachineInstr(I);
     ToBBI.BB->insert(ToBBI.BB->end(), MI);
     ToBBI.NonPredSize++;
 

Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Jul  7 18:14:23 2008
@@ -73,7 +73,7 @@
   // Release VNInfo memroy regions after all VNInfo objects are dtor'd.
   VNInfoAllocator.Reset();
   for (unsigned i = 0, e = ClonedMIs.size(); i != e; ++i)
-    delete ClonedMIs[i];
+    mf_->DeleteMachineInstr(ClonedMIs[i]);
 }
 
 void LiveIntervals::computeNumbering() {
@@ -1562,7 +1562,7 @@
       ReMatOrigDefs[VN] = ReMatDefMI;
       // Original def may be modified so we have to make a copy here. vrm must
       // delete these!
-      ReMatDefs[VN] = ReMatDefMI = ReMatDefMI->clone();
+      ReMatDefs[VN] = ReMatDefMI = mf_->CloneMachineInstr(ReMatDefMI);
 
       bool CanDelete = true;
       if (VNI->hasPHIKill) {

Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Mon Jul  7 18:14:23 2008
@@ -18,12 +18,12 @@
 #include "llvm/Target/TargetData.h"
 #include "llvm/Target/TargetInstrDesc.h"
 #include "llvm/Target/TargetMachine.h"
-#include "llvm/Support/LeakDetector.h"
 #include <algorithm>
 using namespace llvm;
 
-MachineBasicBlock::~MachineBasicBlock() {
-  LeakDetector::removeGarbageObject(this);
+MachineBasicBlock::MachineBasicBlock(MachineFunction &mf, const BasicBlock *bb)
+  : BB(bb), Number(-1), xParent(&mf), Alignment(0), IsLandingPad(false) {
+  Insts.getTraits().Parent = this;
 }
 
 std::ostream& llvm::operator<<(std::ostream &OS, const MachineBasicBlock &MBB) {
@@ -38,98 +38,83 @@
 /// MBBs start out as #-1. When a MBB is added to a MachineFunction, it
 /// gets the next available unique MBB number. If it is removed from a
 /// MachineFunction, it goes back to being #-1.
-void ilist_traits<MachineBasicBlock>::addNodeToList(MachineBasicBlock* N) {
-  assert(N->getParent() == 0 && "machine instruction already in a basic block");
-  N->setParent(Parent);
-  N->Number = Parent->addToMBBNumbering(N);
+void alist_traits<MachineBasicBlock>::addNodeToList(MachineBasicBlock* N) {
+  MachineFunction &MF = *N->getParent();
+  N->Number = MF.addToMBBNumbering(N);
 
   // Make sure the instructions have their operands in the reginfo lists.
-  MachineRegisterInfo &RegInfo = Parent->getRegInfo();
+  MachineRegisterInfo &RegInfo = MF.getRegInfo();
   for (MachineBasicBlock::iterator I = N->begin(), E = N->end(); I != E; ++I)
     I->AddRegOperandsToUseLists(RegInfo);
-    
-  LeakDetector::removeGarbageObject(N);
 }
 
-void ilist_traits<MachineBasicBlock>::removeNodeFromList(MachineBasicBlock* N) {
-  assert(N->getParent() != 0 && "machine instruction not in a basic block");
+void alist_traits<MachineBasicBlock>::removeNodeFromList(MachineBasicBlock* N) {
   N->getParent()->removeFromMBBNumbering(N->Number);
   N->Number = -1;
-  N->setParent(0);
-  
-  // Make sure the instructions have their operands removed from the reginfo
-  // lists.
-  for (MachineBasicBlock::iterator I = N->begin(), E = N->end(); I != E; ++I)
-    I->RemoveRegOperandsFromUseLists();
-  
-  LeakDetector::addGarbageObject(N);
 }
 
 
-MachineInstr* ilist_traits<MachineInstr>::createSentinel() {
-  MachineInstr* dummy = new MachineInstr();
-  LeakDetector::removeGarbageObject(dummy);
-  return dummy;
-}
-
 /// addNodeToList (MI) - When we add an instruction to a basic block
 /// list, we update its parent pointer and add its operands from reg use/def
 /// lists if appropriate.
-void ilist_traits<MachineInstr>::addNodeToList(MachineInstr* N) {
+void alist_traits<MachineInstr>::addNodeToList(MachineInstr* N) {
   assert(N->getParent() == 0 && "machine instruction already in a basic block");
-  N->setParent(parent);
-  LeakDetector::removeGarbageObject(N);
+  N->setParent(Parent);
   
-  // If the block is in a function, add the instruction's register operands to
-  // their corresponding use/def lists.
-  if (MachineFunction *MF = parent->getParent())
-    N->AddRegOperandsToUseLists(MF->getRegInfo());
+  // Add the instruction's register operands to their corresponding
+  // use/def lists.
+  MachineFunction *MF = Parent->getParent();
+  N->AddRegOperandsToUseLists(MF->getRegInfo());
 }
 
 /// removeNodeFromList (MI) - When we remove an instruction from a basic block
 /// list, we update its parent pointer and remove its operands from reg use/def
 /// lists if appropriate.
-void ilist_traits<MachineInstr>::removeNodeFromList(MachineInstr* N) {
+void alist_traits<MachineInstr>::removeNodeFromList(MachineInstr* N) {
   assert(N->getParent() != 0 && "machine instruction not in a basic block");
-  // If this block is in a function, remove from the use/def lists.
-  if (parent->getParent() != 0)
-    N->RemoveRegOperandsFromUseLists();
+
+  // Remove from the use/def lists.
+  N->RemoveRegOperandsFromUseLists();
   
   N->setParent(0);
-  LeakDetector::addGarbageObject(N);
 }
 
 /// transferNodesFromList (MI) - When moving a range of instructions from one
 /// MBB list to another, we need to update the parent pointers and the use/def
 /// lists.
-void ilist_traits<MachineInstr>::transferNodesFromList(
-      iplist<MachineInstr, ilist_traits<MachineInstr> >& fromList,
-      ilist_iterator<MachineInstr> first,
-      ilist_iterator<MachineInstr> last) {
+void alist_traits<MachineInstr>::transferNodesFromList(
+      alist_traits<MachineInstr>& fromList,
+      MachineBasicBlock::iterator first,
+      MachineBasicBlock::iterator last) {
   // Splice within the same MBB -> no change.
-  if (parent == fromList.parent) return;
+  if (Parent == fromList.Parent) return;
 
   // If splicing between two blocks within the same function, just update the
   // parent pointers.
-  if (parent->getParent() == fromList.parent->getParent()) {
+  if (Parent->getParent() == fromList.Parent->getParent()) {
     for (; first != last; ++first)
-      first->setParent(parent);
+      first->setParent(Parent);
     return;
   }
   
   // Otherwise, we have to update the parent and the use/def lists.  The common
   // case when this occurs is if we're splicing from a block in a MF to a block
   // that is not in an MF.
-  bool HasOldMF = fromList.parent->getParent() != 0;
-  MachineFunction *NewMF = parent->getParent();
+  bool HasOldMF = fromList.Parent->getParent() != 0;
+  MachineFunction *NewMF = Parent->getParent();
   
   for (; first != last; ++first) {
     if (HasOldMF) first->RemoveRegOperandsFromUseLists();
-    first->setParent(parent);
+    first->setParent(Parent);
     if (NewMF) first->AddRegOperandsToUseLists(NewMF->getRegInfo());
   }
 }
 
+void alist_traits<MachineInstr>::deleteNode(MachineInstr* MI) {
+  assert(!MI->getParent() && "MI is still in a block!");
+  Parent->getParent()->DeleteMachineInstr(MI);
+}
+
 MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() {
   iterator I = end();
   while (I != begin() && (--I)->getDesc().isTerminator())
@@ -211,14 +196,12 @@
 }
 
 void MachineBasicBlock::moveBefore(MachineBasicBlock *NewAfter) {
-  MachineFunction::BasicBlockListType &BBList =getParent()->getBasicBlockList();
-  getParent()->getBasicBlockList().splice(NewAfter, BBList, this);
+  getParent()->splice(NewAfter, this);
 }
 
 void MachineBasicBlock::moveAfter(MachineBasicBlock *NewBefore) {
-  MachineFunction::BasicBlockListType &BBList =getParent()->getBasicBlockList();
   MachineFunction::iterator BBI = NewBefore;
-  getParent()->getBasicBlockList().splice(++BBI, BBList, this);
+  getParent()->splice(++BBI, this);
 }
 
 
@@ -271,6 +254,23 @@
   return I != Successors.end();
 }
 
+/// removeFromParent - This method unlinks 'this' from the containing function,
+/// and returns it, but does not delete it.
+MachineBasicBlock *MachineBasicBlock::removeFromParent() {
+  assert(getParent() && "Not embedded in a function!");
+  getParent()->remove(this);
+  return this;
+}
+
+
+/// eraseFromParent - This method unlinks 'this' from the containing function,
+/// and deletes it.
+void MachineBasicBlock::eraseFromParent() {
+  assert(getParent() && "Not embedded in a function!");
+  getParent()->erase(this);
+}
+
+
 /// ReplaceUsesOfBlockWith - Given a machine basic block that branched to
 /// 'Old', change the code and CFG so that it branches to 'New' instead.
 void MachineBasicBlock::ReplaceUsesOfBlockWith(MachineBasicBlock *Old,
@@ -309,7 +309,7 @@
   bool MadeChange = false;
   bool AddedFallThrough = false;
 
-  MachineBasicBlock *FallThru = getNext();
+  MachineFunction::iterator FallThru = next(MachineFunction::iterator(this));
   
   // If this block ends with a conditional branch that falls through to its
   // successor, set DestB as the successor.

Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Mon Jul  7 18:14:23 2008
@@ -29,7 +29,6 @@
 #include "llvm/Instructions.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/GraphWriter.h"
-#include "llvm/Support/LeakDetector.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/Config/config.h"
 #include <fstream>
@@ -104,30 +103,20 @@
 // MachineFunction implementation
 //===---------------------------------------------------------------------===//
 
-MachineBasicBlock* ilist_traits<MachineBasicBlock>::createSentinel() {
-  MachineBasicBlock* dummy = new MachineBasicBlock();
-  LeakDetector::removeGarbageObject(dummy);
-  return dummy;
-}
-
-void ilist_traits<MachineBasicBlock>::transferNodesFromList(
-            iplist<MachineBasicBlock, ilist_traits<MachineBasicBlock> >& toList,
-            ilist_iterator<MachineBasicBlock> first,
-            ilist_iterator<MachineBasicBlock> last) {
-  // If splicing withing the same function, no change.
-  if (Parent == toList.Parent) return;
-  
-  for (; first != last; ++first)
-    first->setParent(toList.Parent);
+void alist_traits<MachineBasicBlock>::deleteNode(MachineBasicBlock *MBB) {
+  MBB->getParent()->DeleteMachineBasicBlock(MBB);
 }
 
 MachineFunction::MachineFunction(const Function *F,
                                  const TargetMachine &TM)
   : Annotation(MF_AID), Fn(F), Target(TM) {
-  RegInfo = new MachineRegisterInfo(*TM.getRegisterInfo());
+  RegInfo = new (Allocator.Allocate<MachineRegisterInfo>())
+                MachineRegisterInfo(*TM.getRegisterInfo());
   MFInfo = 0;
-  FrameInfo = new MachineFrameInfo(*TM.getFrameInfo());
-  ConstantPool = new MachineConstantPool(TM.getTargetData());
+  FrameInfo = new (Allocator.Allocate<MachineFrameInfo>())
+                  MachineFrameInfo(*TM.getFrameInfo());
+  ConstantPool = new (Allocator.Allocate<MachineConstantPool>())
+                     MachineConstantPool(TM.getTargetData());
   
   // Set up jump table.
   const TargetData &TD = *TM.getTargetData();
@@ -135,18 +124,22 @@
   unsigned EntrySize = IsPic ? 4 : TD.getPointerSize();
   unsigned Alignment = IsPic ? TD.getABITypeAlignment(Type::Int32Ty)
                              : TD.getPointerABIAlignment();
-  JumpTableInfo = new MachineJumpTableInfo(EntrySize, Alignment);
-  
-  BasicBlocks.Parent = this;
+  JumpTableInfo = new (Allocator.Allocate<MachineJumpTableInfo>())
+                      MachineJumpTableInfo(EntrySize, Alignment);
 }
 
 MachineFunction::~MachineFunction() {
   BasicBlocks.clear();
-  delete RegInfo;
-  delete MFInfo;
-  delete FrameInfo;
-  delete ConstantPool;
-  delete JumpTableInfo;
+  InstructionRecycler.clear(Allocator);
+  BasicBlockRecycler.clear(Allocator);
+  MemOperandRecycler.clear(Allocator);
+  RegInfo->~MachineRegisterInfo();        Allocator.Deallocate(RegInfo);
+  if (MFInfo) {
+    MFInfo->~MachineFunctionInfo();       Allocator.Deallocate(MFInfo);
+  }
+  FrameInfo->~MachineFrameInfo();         Allocator.Deallocate(FrameInfo);
+  ConstantPool->~MachineConstantPool();   Allocator.Deallocate(ConstantPool);
+  JumpTableInfo->~MachineJumpTableInfo(); Allocator.Deallocate(JumpTableInfo);
 }
 
 
@@ -192,20 +185,88 @@
   MBBNumbering.resize(BlockNo);
 }
 
+/// CreateMachineInstr - Allocate a new MachineInstr. Use this instead
+/// of `new MachineInstr'.
+///
+MachineInstr *
+MachineFunction::CreateMachineInstr(const TargetInstrDesc &TID, bool NoImp) {
+  return new (InstructionRecycler.Allocate<MachineInstr>(Allocator))
+             MachineInstr(TID, NoImp);
+}
+
+/// CloneMachineInstr - Create a new MachineInstr which is a copy of the
+/// 'Orig' instruction, identical in all ways except the the instruction
+/// has no parent, prev, or next.
+///
+MachineInstr *
+MachineFunction::CloneMachineInstr(const MachineInstr *Orig) {
+  return new (InstructionRecycler.Allocate<MachineInstr>(Allocator))
+             MachineInstr(*this, *Orig);
+}
+
+/// DeleteMachineInstr - Delete the given MachineInstr.
+///
+void
+MachineFunction::DeleteMachineInstr(MachineInstr *MI) {
+  // Clear the instructions memoperands. This must be done manually because
+  // the instruction's parent pointer is now null, so it can't properly
+  // deallocate them on its own.
+  MI->clearMemOperands(*this);
+
+  MI->~MachineInstr();
+  InstructionRecycler.Deallocate(Allocator, MI);
+}
 
-void MachineFunction::dump() const { print(*cerr.stream()); }
+/// CreateMachineBasicBlock - Allocate a new MachineBasicBlock. Use this
+/// instead of `new MachineBasicBlock'.
+///
+MachineBasicBlock *
+MachineFunction::CreateMachineBasicBlock(const BasicBlock *bb) {
+  return new (BasicBlockRecycler.Allocate<MachineBasicBlock>(Allocator))
+             MachineBasicBlock(*this, bb);
+}
+
+/// DeleteMachineBasicBlock - Delete the given MachineBasicBlock.
+///
+void
+MachineFunction::DeleteMachineBasicBlock(MachineBasicBlock *MBB) {
+  assert(MBB->getParent() == this && "MBB parent mismatch!");
+  MBB->~MachineBasicBlock();
+  BasicBlockRecycler.Deallocate(Allocator, MBB);
+}
+
+/// CreateMachineMemOperand - Allocate a new MachineMemOperand. Use this
+/// instead of `new MachineMemOperand'.
+///
+MachineMemOperand *
+MachineFunction::CreateMachineMemOperand(const MachineMemOperand &MMO) {
+  return new (MemOperandRecycler.Allocate<MachineMemOperand>(Allocator))
+             MachineMemOperand(MMO);
+}
+
+/// DeleteMachineMemOperand - Delete the given MachineMemOperand.
+///
+void
+MachineFunction::DeleteMachineMemOperand(MachineMemOperand *MO) {
+  MO->~MachineMemOperand();
+  MemOperandRecycler.Deallocate(Allocator, MO);
+}
+
+void MachineFunction::dump() const {
+  print(*cerr.stream());
+}
 
 void MachineFunction::print(std::ostream &OS) const {
   OS << "# Machine code for " << Fn->getName () << "():\n";
 
   // Print Frame Information
-  getFrameInfo()->print(*this, OS);
+  FrameInfo->print(*this, OS);
   
   // Print JumpTable Information
-  getJumpTableInfo()->print(OS);
+  JumpTableInfo->print(OS);
 
   // Print Constant Pool
-  getConstantPool()->print(OS);
+  ConstantPool->print(OS);
   
   const TargetRegisterInfo *TRI = getTarget().getRegisterInfo();
   

Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Mon Jul  7 18:14:23 2008
@@ -22,7 +22,6 @@
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetInstrDesc.h"
 #include "llvm/Target/TargetRegisterInfo.h"
-#include "llvm/Support/LeakDetector.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/Streams.h"
 #include <ostream>
@@ -257,8 +256,6 @@
 /// TID NULL and no operands.
 MachineInstr::MachineInstr()
   : TID(0), NumImplicitOps(0), Parent(0) {
-  // Make sure that we get added to a machine basicblock
-  LeakDetector::addGarbageObject(this);
 }
 
 void MachineInstr::addImplicitDefUseOperands() {
@@ -285,8 +282,6 @@
   Operands.reserve(NumImplicitOps + TID->getNumOperands());
   if (!NoImp)
     addImplicitDefUseOperands();
-  // Make sure that we get added to a machine basicblock
-  LeakDetector::addGarbageObject(this);
 }
 
 /// MachineInstr ctor - Work exactly the same as the ctor above, except that the
@@ -304,18 +299,15 @@
       NumImplicitOps++;
   Operands.reserve(NumImplicitOps + TID->getNumOperands());
   addImplicitDefUseOperands();
-  // Make sure that we get added to a machine basicblock
-  LeakDetector::addGarbageObject(this);
   MBB->push_back(this);  // Add instruction to end of basic block!
 }
 
 /// MachineInstr ctor - Copies MachineInstr arg exactly
 ///
-MachineInstr::MachineInstr(const MachineInstr &MI) {
+MachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI) {
   TID = &MI.getDesc();
   NumImplicitOps = MI.NumImplicitOps;
   Operands.reserve(MI.getNumOperands());
-  MemOperands = MI.MemOperands;
 
   // Add operands
   for (unsigned i = 0; i != MI.getNumOperands(); ++i) {
@@ -323,15 +315,18 @@
     Operands.back().ParentMI = this;
   }
 
-  // Set parent, next, and prev to null
+  // Add memory operands.
+  for (alist<MachineMemOperand>::const_iterator i = MI.memoperands_begin(),
+       j = MI.memoperands_end(); i != j; ++i)
+    addMemOperand(MF, *i);
+
+  // Set parent to null.
   Parent = 0;
-  Prev = 0;
-  Next = 0;
 }
 
-
 MachineInstr::~MachineInstr() {
-  LeakDetector::removeGarbageObject(this);
+  assert(MemOperands.empty() &&
+         "MachineInstr being deleted with live memoperands!");
 #ifndef NDEBUG
   for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
     assert(Operands[i].ParentMI == this && "ParentMI mismatch!");
@@ -499,6 +494,19 @@
   }
 }
 
+/// addMemOperand - Add a MachineMemOperand to the machine instruction,
+/// referencing arbitrary storage.
+void MachineInstr::addMemOperand(MachineFunction &MF,
+                                 const MachineMemOperand &MO) {
+  MemOperands.push_back(MF.CreateMachineMemOperand(MO));
+}
+
+/// clearMemOperands - Erase all of this MachineInstr's MachineMemOperands.
+void MachineInstr::clearMemOperands(MachineFunction &MF) {
+  while (!MemOperands.empty())
+    MF.DeleteMachineMemOperand(MemOperands.remove(MemOperands.begin()));
+}
+
 
 /// removeFromParent - This method unlinks 'this' from the containing basic
 /// block, and returns it, but does not delete it.
@@ -509,6 +517,14 @@
 }
 
 
+/// eraseFromParent - This method unlinks 'this' from the containing basic
+/// block, and deletes it.
+void MachineInstr::eraseFromParent() {
+  assert(getParent() && "Not embedded in a basic block!");
+  getParent()->erase(this);
+}
+
+
 /// OperandComplete - Return true if it's illegal to add a new operand
 ///
 bool MachineInstr::OperandsComplete() const {
@@ -710,10 +726,11 @@
     getOperand(i).print(OS, TM);
   }
 
-  if (getNumMemOperands() > 0) {
+  if (!memoperands_empty()) {
     OS << ", Mem:";
-    for (unsigned i = 0; i < getNumMemOperands(); i++) {
-      const MachineMemOperand &MRO = getMemOperand(i);
+    for (alist<MachineMemOperand>::const_iterator i = memoperands_begin(),
+         e = memoperands_end(); i != e; ++i) {
+      const MachineMemOperand &MRO = *i;
       const Value *V = MRO.getValue();
 
       assert((MRO.isLoad() || MRO.isStore()) &&

Modified: llvm/trunk/lib/CodeGen/PHIElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PHIElimination.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/PHIElimination.cpp (original)
+++ llvm/trunk/lib/CodeGen/PHIElimination.cpp Mon Jul  7 18:14:23 2008
@@ -354,7 +354,7 @@
   }
     
   // Really delete the PHI instruction now!
-  delete MPhi;
+  MF.DeleteMachineInstr(MPhi);
   ++NumAtomic;
 }
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Mon Jul  7 18:14:23 2008
@@ -670,7 +670,7 @@
 }
 
 void ScheduleDAG::AddMemOperand(MachineInstr *MI, const MachineMemOperand &MO) {
-  MI->addMemOperand(MO);
+  MI->addMemOperand(*MF, MO);
 }
 
 /// getSubRegisterRegClass - Returns the register class of specified register
@@ -726,7 +726,7 @@
     unsigned SubIdx = cast<ConstantSDNode>(Node->getOperand(1))->getValue();
 
     // Create the extract_subreg machine instruction.
-    MachineInstr *MI = BuildMI(TII->get(TargetInstrInfo::EXTRACT_SUBREG));
+    MachineInstr *MI = BuildMI(*MF, TII->get(TargetInstrInfo::EXTRACT_SUBREG));
 
     // Figure out the register class to create for the destreg.
     unsigned VReg = getVR(Node->getOperand(0), VRBaseMap);
@@ -772,7 +772,7 @@
     }
     
     // Create the insert_subreg or subreg_to_reg machine instruction.
-    MachineInstr *MI = BuildMI(TII->get(Opc));
+    MachineInstr *MI = BuildMI(*MF, TII->get(Opc));
     MI->addOperand(MachineOperand::CreateReg(VRBase, true));
     
     // If creating a subreg_to_reg, then the first input operand
@@ -829,7 +829,7 @@
 #endif
 
     // Create the new machine instruction.
-    MachineInstr *MI = BuildMI(II);
+    MachineInstr *MI = BuildMI(*MF, II);
     
     // Add result register values for things that are defined by this
     // instruction.
@@ -853,7 +853,7 @@
       else {
         DOUT << "Sched: COMMUTED TO: " << *NewMI;
         if (MI != NewMI) {
-          delete MI;
+          MF->DeleteMachineInstr(MI);
           MI = NewMI;
         }
         ++NumCommutes;
@@ -928,7 +928,7 @@
       --NumOps;  // Ignore the flag operand.
       
     // Create the inline asm machine instruction.
-    MachineInstr *MI = BuildMI(TII->get(TargetInstrInfo::INLINEASM));
+    MachineInstr *MI = BuildMI(*MF, TII->get(TargetInstrInfo::INLINEASM));
 
     // Add the asm string as an external symbol operand.
     const char *AsmStr =

Modified: llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp (original)
+++ llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp Mon Jul  7 18:14:23 2008
@@ -40,7 +40,9 @@
     // Create a new instruction.
     unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg();
     bool Reg0IsDead = MI->getOperand(0).isDead();
-    return BuildMI(MI->getDesc()).addReg(Reg0, true, false, false, Reg0IsDead)
+    MachineFunction &MF = *MI->getParent()->getParent();
+    return BuildMI(MF, MI->getDesc())
+      .addReg(Reg0, true, false, false, Reg0IsDead)
       .addReg(Reg2, false, false, Reg2IsKill)
       .addReg(Reg1, false, false, Reg1IsKill);
   }
@@ -104,7 +106,7 @@
                                         MachineBasicBlock::iterator I,
                                         unsigned DestReg,
                                         const MachineInstr *Orig) const {
-  MachineInstr *MI = Orig->clone();
+  MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
   MI->getOperand(0).setReg(DestReg);
   MBB.insert(I, MI);
 }

Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original)
+++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Mon Jul  7 18:14:23 2008
@@ -604,7 +604,7 @@
     return false;
 
   bool FoundUse = false, Done = false;
-  MachineBasicBlock::iterator E = NewDef;
+  MachineBasicBlock::iterator E = &NewDef;
   ++I; ++E;
   for (; !Done && I != E; ++I) {
     MachineInstr *NMI = I;
@@ -973,7 +973,7 @@
         MBB.erase(&MI);
         return true;
       }
-      delete NewMI;
+      MF.DeleteMachineInstr(NewMI);
     }
   }
   return false;
@@ -1032,7 +1032,8 @@
     SmallVector<unsigned, 2> Ops;
     Ops.push_back(NewDstIdx);
     MachineInstr *FoldedMI = TII->foldMemoryOperand(MF, CommutedMI, Ops, SS);
-    delete CommutedMI;  // Not needed since foldMemoryOperand returns new MI.
+    // Not needed since foldMemoryOperand returns new MI.
+    MF.DeleteMachineInstr(CommutedMI);
     if (!FoldedMI)
       return false;
 
@@ -1040,7 +1041,7 @@
     VRM.virtFolded(VirtReg, FoldedMI, VirtRegMap::isRef);
     // Insert new def MI and spill MI.
     const TargetRegisterClass* RC = MF.getRegInfo().getRegClass(VirtReg);
-    TII->storeRegToStackSlot(MBB, MI, NewReg, true, SS, RC);
+    TII->storeRegToStackSlot(MBB, &MI, NewReg, true, SS, RC);
     MII = prior(MII);
     MachineInstr *StoreMI = MII;
     VRM.addSpillSlotUse(SS, StoreMI);
@@ -1341,7 +1342,7 @@
         unsigned RReg = SubIdx ? TRI->getSubReg(Phys, SubIdx) : Phys;
         MI.getOperand(i).setReg(RReg);
         if (VRM.isImplicitlyDefined(VirtReg))
-          BuildMI(MBB, MI, TII->get(TargetInstrInfo::IMPLICIT_DEF), RReg);
+          BuildMI(MBB, &MI, TII->get(TargetInstrInfo::IMPLICIT_DEF), RReg);
         continue;
       }
       
@@ -1814,7 +1815,7 @@
   ProcessNextInst:
     DistanceMap.insert(std::make_pair(&MI, Dist++));
     if (!Erased && !BackTracked) {
-      for (MachineBasicBlock::iterator II = MI; II != NextMII; ++II)
+      for (MachineBasicBlock::iterator II = &MI; II != NextMII; ++II)
         UpdateKills(*II, RegKills, KillOps);
     }
     MII = NextMII;

Modified: llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp Mon Jul  7 18:14:23 2008
@@ -288,8 +288,8 @@
 void ARMConstantIslands::DoInitialPlacement(MachineFunction &Fn,
                                         std::vector<MachineInstr*> &CPEMIs){
   // Create the basic block to hold the CPE's.
-  MachineBasicBlock *BB = new MachineBasicBlock();
-  Fn.getBasicBlockList().push_back(BB);
+  MachineBasicBlock *BB = Fn.CreateMachineBasicBlock();
+  Fn.push_back(BB);
   
   // Add all of the constants from the constant pool to the end block, use an
   // identity mapping of CPI's to CPE's.
@@ -558,11 +558,12 @@
 /// account for this change and returns the newly created block.
 MachineBasicBlock *ARMConstantIslands::SplitBlockBeforeInstr(MachineInstr *MI) {
   MachineBasicBlock *OrigBB = MI->getParent();
+  MachineFunction &MF = *OrigBB->getParent();
 
   // Create a new MBB for the code after the OrigBB.
-  MachineBasicBlock *NewBB = new MachineBasicBlock(OrigBB->getBasicBlock());
+  MachineBasicBlock *NewBB = MF.CreateMachineBasicBlock(OrigBB->getBasicBlock());
   MachineFunction::iterator MBBI = OrigBB; ++MBBI;
-  OrigBB->getParent()->getBasicBlockList().insert(MBBI, NewBB);
+  MF.insert(MBBI, NewBB);
   
   // Splice the instructions starting with MI over to NewBB.
   NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end());
@@ -590,7 +591,7 @@
   // Update internal data structures to account for the newly inserted MBB.
   // This is almost the same as UpdateForInsertedWaterBlock, except that
   // the Water goes after OrigBB, not NewBB.
-  NewBB->getParent()->RenumberBlocks(NewBB);
+  MF.RenumberBlocks(NewBB);
   
   // Insert a size into BBSizes to align it properly with the (newly
   // renumbered) block numbers.
@@ -1031,8 +1032,8 @@
   }
 
   // Okay, we know we can put an island before NewMBB now, do it!
-  MachineBasicBlock *NewIsland = new MachineBasicBlock();
-  Fn.getBasicBlockList().insert(NewMBB, NewIsland);
+  MachineBasicBlock *NewIsland = Fn.CreateMachineBasicBlock();
+  Fn.insert(NewMBB, NewIsland);
 
   // Update internal data structures to account for the newly inserted MBB.
   UpdateForInsertedWaterBlock(NewIsland);
@@ -1201,7 +1202,7 @@
 
   NumCBrFixed++;
   if (BMI != MI) {
-    if (next(MachineBasicBlock::iterator(MI)) == MBB->back() &&
+    if (next(MachineBasicBlock::iterator(MI)) == prior(MBB->end()) &&
         BMI->getOpcode() == Br.UncondBr) {
       // Last MI in the BB is a unconditional branch. Can we simply invert the
       // condition and swap destinations:

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Jul  7 18:14:23 2008
@@ -1446,7 +1446,7 @@
     // destination vreg to set, the condition code register to branch on, the
     // true/false values to select between, and a branch opcode to use.
     const BasicBlock *LLVM_BB = BB->getBasicBlock();
-    ilist<MachineBasicBlock>::iterator It = BB;
+    MachineFunction::iterator It = BB;
     ++It;
 
     //  thisMBB:
@@ -1456,13 +1456,13 @@
     //   bCC copy1MBB
     //   fallthrough --> copy0MBB
     MachineBasicBlock *thisMBB  = BB;
-    MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB);
-    MachineBasicBlock *sinkMBB  = new MachineBasicBlock(LLVM_BB);
+    MachineFunction *F = BB->getParent();
+    MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB);
+    MachineBasicBlock *sinkMBB  = F->CreateMachineBasicBlock(LLVM_BB);
     BuildMI(BB, TII->get(ARM::tBcc)).addMBB(sinkMBB)
       .addImm(MI->getOperand(3).getImm()).addReg(MI->getOperand(4).getReg());
-    MachineFunction *F = BB->getParent();
-    F->getBasicBlockList().insert(It, copy0MBB);
-    F->getBasicBlockList().insert(It, sinkMBB);
+    F->insert(It, copy0MBB);
+    F->insert(It, sinkMBB);
     // Update machine-CFG edges by first adding all successors of the current
     // block to the new block which will contain the Phi node for the select.
     for(MachineBasicBlock::succ_iterator i = BB->succ_begin(),
@@ -1491,7 +1491,7 @@
       .addReg(MI->getOperand(1).getReg()).addMBB(copy0MBB)
       .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB);
 
-    delete MI;   // The pseudo instruction is gone now.
+    F->DeleteMachineInstr(MI);   // The pseudo instruction is gone now.
     return BB;
   }
   }

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Mon Jul  7 18:14:23 2008
@@ -152,7 +152,7 @@
     return;
   }
 
-  MachineInstr *MI = Orig->clone();
+  MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
   MI->getOperand(0).setReg(DestReg);
   MBB.insert(I, MI);
 }
@@ -196,6 +196,7 @@
     return NULL;
 
   MachineInstr *MI = MBBI;
+  MachineFunction &MF = *MI->getParent()->getParent();
   unsigned TSFlags = MI->getDesc().TSFlags;
   bool isPre = false;
   switch ((TSFlags & ARMII::IndexModeMask) >> ARMII::IndexModeShift) {
@@ -240,17 +241,17 @@
         // Can't encode it in a so_imm operand. This transformation will
         // add more than 1 instruction. Abandon!
         return NULL;
-      UpdateMI = BuildMI(get(isSub ? ARM::SUBri : ARM::ADDri), WBReg)
+      UpdateMI = BuildMI(MF, get(isSub ? ARM::SUBri : ARM::ADDri), WBReg)
         .addReg(BaseReg).addImm(SOImmVal)
         .addImm(Pred).addReg(0).addReg(0);
     } else if (Amt != 0) {
       ARM_AM::ShiftOpc ShOpc = ARM_AM::getAM2ShiftOpc(OffImm);
       unsigned SOOpc = ARM_AM::getSORegOpc(ShOpc, Amt);
-      UpdateMI = BuildMI(get(isSub ? ARM::SUBrs : ARM::ADDrs), WBReg)
+      UpdateMI = BuildMI(MF, get(isSub ? ARM::SUBrs : ARM::ADDrs), WBReg)
         .addReg(BaseReg).addReg(OffReg).addReg(0).addImm(SOOpc)
         .addImm(Pred).addReg(0).addReg(0);
     } else 
-      UpdateMI = BuildMI(get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg)
+      UpdateMI = BuildMI(MF, get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg)
         .addReg(BaseReg).addReg(OffReg)
         .addImm(Pred).addReg(0).addReg(0);
     break;
@@ -260,11 +261,11 @@
     unsigned Amt = ARM_AM::getAM3Offset(OffImm);
     if (OffReg == 0)
       // Immediate is 8-bits. It's guaranteed to fit in a so_imm operand.
-      UpdateMI = BuildMI(get(isSub ? ARM::SUBri : ARM::ADDri), WBReg)
+      UpdateMI = BuildMI(MF, get(isSub ? ARM::SUBri : ARM::ADDri), WBReg)
         .addReg(BaseReg).addImm(Amt)
         .addImm(Pred).addReg(0).addReg(0);
     else
-      UpdateMI = BuildMI(get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg)
+      UpdateMI = BuildMI(MF, get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg)
         .addReg(BaseReg).addReg(OffReg)
         .addImm(Pred).addReg(0).addReg(0);
     break;
@@ -274,19 +275,19 @@
   std::vector<MachineInstr*> NewMIs;
   if (isPre) {
     if (isLoad)
-      MemMI = BuildMI(get(MemOpc), MI->getOperand(0).getReg())
+      MemMI = BuildMI(MF, get(MemOpc), MI->getOperand(0).getReg())
         .addReg(WBReg).addReg(0).addImm(0).addImm(Pred);
     else
-      MemMI = BuildMI(get(MemOpc)).addReg(MI->getOperand(1).getReg())
+      MemMI = BuildMI(MF, get(MemOpc)).addReg(MI->getOperand(1).getReg())
         .addReg(WBReg).addReg(0).addImm(0).addImm(Pred);
     NewMIs.push_back(MemMI);
     NewMIs.push_back(UpdateMI);
   } else {
     if (isLoad)
-      MemMI = BuildMI(get(MemOpc), MI->getOperand(0).getReg())
+      MemMI = BuildMI(MF, get(MemOpc), MI->getOperand(0).getReg())
         .addReg(BaseReg).addReg(0).addImm(0).addImm(Pred);
     else
-      MemMI = BuildMI(get(MemOpc)).addReg(MI->getOperand(1).getReg())
+      MemMI = BuildMI(MF, get(MemOpc)).addReg(MI->getOperand(1).getReg())
         .addReg(BaseReg).addReg(0).addImm(0).addImm(Pred);
     if (WB.isDead())
       UpdateMI->getOperand(0).setIsDead();
@@ -537,7 +538,7 @@
     if (AFI->isThumbFunction()) {
       Opc = Addr[0].isFrameIndex() ? ARM::tSpill : ARM::tSTR;
       MachineInstrBuilder MIB = 
-        BuildMI(get(Opc)).addReg(SrcReg, false, false, isKill);
+        BuildMI(MF, get(Opc)).addReg(SrcReg, false, false, isKill);
       for (unsigned i = 0, e = Addr.size(); i != e; ++i)
         MIB = ARMInstrAddOperand(MIB, Addr[i]);
       NewMIs.push_back(MIB);
@@ -552,7 +553,7 @@
   }
 
   MachineInstrBuilder MIB = 
-    BuildMI(get(Opc)).addReg(SrcReg, false, false, isKill);
+    BuildMI(MF, get(Opc)).addReg(SrcReg, false, false, isKill);
   for (unsigned i = 0, e = Addr.size(); i != e; ++i)
     MIB = ARMInstrAddOperand(MIB, Addr[i]);
   AddDefaultPred(MIB);
@@ -592,7 +593,7 @@
     ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
     if (AFI->isThumbFunction()) {
       Opc = Addr[0].isFrameIndex() ? ARM::tRestore : ARM::tLDR;
-      MachineInstrBuilder MIB = BuildMI(get(Opc), DestReg);
+      MachineInstrBuilder MIB = BuildMI(MF, get(Opc), DestReg);
       for (unsigned i = 0, e = Addr.size(); i != e; ++i)
         MIB = ARMInstrAddOperand(MIB, Addr[i]);
       NewMIs.push_back(MIB);
@@ -606,7 +607,7 @@
     Opc = ARM::FLDS;
   }
 
-  MachineInstrBuilder MIB =  BuildMI(get(Opc), DestReg);
+  MachineInstrBuilder MIB =  BuildMI(MF, get(Opc), DestReg);
   for (unsigned i = 0, e = Addr.size(); i != e; ++i)
     MIB = ARMInstrAddOperand(MIB, Addr[i]);
   AddDefaultPred(MIB);
@@ -641,7 +642,7 @@
     return false;
 
   bool isVarArg = AFI->getVarArgsRegSaveSize() > 0;
-  MachineInstr *PopMI = new MachineInstr(get(ARM::tPOP));
+  MachineInstr *PopMI = MF.CreateMachineInstr(get(ARM::tPOP));
   MBB.insert(MI, PopMI);
   for (unsigned i = CSI.size(); i != 0; --i) {
     unsigned Reg = CSI[i-1].getReg();
@@ -678,12 +679,12 @@
     if (OpNum == 0) { // move -> store
       unsigned SrcReg = MI->getOperand(1).getReg();
       bool isKill = MI->getOperand(1).isKill();
-      NewMI = BuildMI(get(ARM::STR)).addReg(SrcReg, false, false, isKill)
+      NewMI = BuildMI(MF, get(ARM::STR)).addReg(SrcReg, false, false, isKill)
         .addFrameIndex(FI).addReg(0).addImm(0).addImm(Pred).addReg(PredReg);
     } else {          // move -> load
       unsigned DstReg = MI->getOperand(0).getReg();
       bool isDead = MI->getOperand(0).isDead();
-      NewMI = BuildMI(get(ARM::LDR)).addReg(DstReg, true, false, false, isDead)
+      NewMI = BuildMI(MF, get(ARM::LDR)).addReg(DstReg, true, false, false, isDead)
         .addFrameIndex(FI).addReg(0).addImm(0).addImm(Pred).addReg(PredReg);
     }
     break;
@@ -695,7 +696,7 @@
       if (RI.isPhysicalRegister(SrcReg) && !RI.isLowRegister(SrcReg))
         // tSpill cannot take a high register operand.
         break;
-      NewMI = BuildMI(get(ARM::tSpill)).addReg(SrcReg, false, false, isKill)
+      NewMI = BuildMI(MF, get(ARM::tSpill)).addReg(SrcReg, false, false, isKill)
         .addFrameIndex(FI).addImm(0);
     } else {          // move -> load
       unsigned DstReg = MI->getOperand(0).getReg();
@@ -703,7 +704,7 @@
         // tRestore cannot target a high register operand.
         break;
       bool isDead = MI->getOperand(0).isDead();
-      NewMI = BuildMI(get(ARM::tRestore))
+      NewMI = BuildMI(MF, get(ARM::tRestore))
         .addReg(DstReg, true, false, false, isDead)
         .addFrameIndex(FI).addImm(0);
     }
@@ -714,11 +715,11 @@
     unsigned PredReg = MI->getOperand(3).getReg();
     if (OpNum == 0) { // move -> store
       unsigned SrcReg = MI->getOperand(1).getReg();
-      NewMI = BuildMI(get(ARM::FSTS)).addReg(SrcReg).addFrameIndex(FI)
+      NewMI = BuildMI(MF, get(ARM::FSTS)).addReg(SrcReg).addFrameIndex(FI)
         .addImm(0).addImm(Pred).addReg(PredReg);
     } else {          // move -> load
       unsigned DstReg = MI->getOperand(0).getReg();
-      NewMI = BuildMI(get(ARM::FLDS), DstReg).addFrameIndex(FI)
+      NewMI = BuildMI(MF, get(ARM::FLDS), DstReg).addFrameIndex(FI)
         .addImm(0).addImm(Pred).addReg(PredReg);
     }
     break;
@@ -729,12 +730,12 @@
     if (OpNum == 0) { // move -> store
       unsigned SrcReg = MI->getOperand(1).getReg();
       bool isKill = MI->getOperand(1).isKill();
-      NewMI = BuildMI(get(ARM::FSTD)).addReg(SrcReg, false, false, isKill)
+      NewMI = BuildMI(MF, get(ARM::FSTD)).addReg(SrcReg, false, false, isKill)
         .addFrameIndex(FI).addImm(0).addImm(Pred).addReg(PredReg);
     } else {          // move -> load
       unsigned DstReg = MI->getOperand(0).getReg();
       bool isDead = MI->getOperand(0).isDead();
-      NewMI = BuildMI(get(ARM::FLDD)).addReg(DstReg, true, false, false, isDead)
+      NewMI = BuildMI(MF, get(ARM::FLDD)).addReg(DstReg, true, false, false, isDead)
         .addFrameIndex(FI).addImm(0).addImm(Pred).addReg(PredReg);
     }
     break;
@@ -924,7 +925,7 @@
       MachineOperand JTOP =
         MI->getOperand(NumOps - (TID.isPredicable() ? 3 : 2));
       unsigned JTI = JTOP.getIndex();
-      MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
+      const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
       const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
       assert(JTI < JT.size());
       // Thumb instructions are 2 byte aligned, but JT entries are 4 byte

Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Mon Jul  7 18:14:23 2008
@@ -662,18 +662,18 @@
   //test sc and maybe branck to start
   //exit:
   const BasicBlock *LLVM_BB = BB->getBasicBlock();
-  ilist<MachineBasicBlock>::iterator It = BB;
+  MachineFunction::iterator It = BB;
   ++It;
   
   MachineBasicBlock *thisMBB = BB;
-  MachineBasicBlock *llscMBB = new MachineBasicBlock(LLVM_BB);
-  MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB);
+  MachineFunction *F = BB->getParent();
+  MachineBasicBlock *llscMBB = F->CreateMachineBasicBlock(LLVM_BB);
+  MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);
 
   sinkMBB->transferSuccessors(thisMBB);
 
-  MachineFunction *F = BB->getParent();
-  F->getBasicBlockList().insert(It, llscMBB);
-  F->getBasicBlockList().insert(It, sinkMBB);
+  F->insert(It, llscMBB);
+  F->insert(It, sinkMBB);
 
   BuildMI(thisMBB, TII->get(Alpha::BR)).addMBB(llscMBB);
   
@@ -719,7 +719,7 @@
   thisMBB->addSuccessor(llscMBB);
   llscMBB->addSuccessor(llscMBB);
   llscMBB->addSuccessor(sinkMBB);
-  delete MI;   // The pseudo instruction is gone now.
+  F->DeleteMachineInstr(MI);   // The pseudo instruction is gone now.
 
   return sinkMBB;
 }

Modified: llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp Mon Jul  7 18:14:23 2008
@@ -194,7 +194,7 @@
   else
     abort();
   MachineInstrBuilder MIB = 
-    BuildMI(get(Opc)).addReg(SrcReg, false, false, isKill);
+    BuildMI(MF, get(Opc)).addReg(SrcReg, false, false, isKill);
   for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
     MachineOperand &MO = Addr[i];
     if (MO.isRegister())
@@ -239,7 +239,7 @@
   else
     abort();
   MachineInstrBuilder MIB = 
-    BuildMI(get(Opc), DestReg);
+    BuildMI(MF, get(Opc), DestReg);
   for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
     MachineOperand &MO = Addr[i];
     if (MO.isRegister())
@@ -272,7 +272,7 @@
          bool isKill = MI->getOperand(1).isKill();
          Opc = (Opc == Alpha::BISr) ? Alpha::STQ : 
            ((Opc == Alpha::CPYSS) ? Alpha::STS : Alpha::STT);
-         NewMI = BuildMI(get(Opc)).addReg(InReg, false, false, isKill)
+         NewMI = BuildMI(MF, get(Opc)).addReg(InReg, false, false, isKill)
            .addFrameIndex(FrameIndex)
            .addReg(Alpha::F31);
        } else {           // load -> move
@@ -280,7 +280,7 @@
          bool isDead = MI->getOperand(0).isDead();
          Opc = (Opc == Alpha::BISr) ? Alpha::LDQ : 
            ((Opc == Alpha::CPYSS) ? Alpha::LDS : Alpha::LDT);
-         NewMI = BuildMI(get(Opc)).addReg(OutReg, true, false, false, isDead)
+         NewMI = BuildMI(MF, get(Opc)).addReg(OutReg, true, false, false, isDead)
            .addFrameIndex(FrameIndex)
            .addReg(Alpha::F31);
        }

Modified: llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp Mon Jul  7 18:14:23 2008
@@ -103,7 +103,7 @@
 // if frame pointer elimination is disabled.
 //
 bool AlphaRegisterInfo::hasFP(const MachineFunction &MF) const {
-  MachineFrameInfo *MFI = MF.getFrameInfo();
+  const MachineFrameInfo *MFI = MF.getFrameInfo();
   return MFI->hasVarSizedObjects();
 }
 
@@ -125,11 +125,11 @@
 
       MachineInstr *New;
       if (Old->getOpcode() == Alpha::ADJUSTSTACKDOWN) {
-        New=BuildMI(TII.get(Alpha::LDA), Alpha::R30)
+        New=BuildMI(MF, TII.get(Alpha::LDA), Alpha::R30)
           .addImm(-Amount).addReg(Alpha::R30);
       } else {
          assert(Old->getOpcode() == Alpha::ADJUSTSTACKUP);
-         New=BuildMI(TII.get(Alpha::LDA), Alpha::R30)
+         New=BuildMI(MF, TII.get(Alpha::LDA), Alpha::R30)
           .addImm(Amount).addReg(Alpha::R30);
       }
 
@@ -188,7 +188,7 @@
     MI.getOperand(i + 1).ChangeToRegister(Alpha::R28, false);
     MI.getOperand(i).ChangeToImmediate(getLower16(Offset));
     //insert the new
-    MachineInstr* nMI=BuildMI(TII.get(Alpha::LDAH), Alpha::R28)
+    MachineInstr* nMI=BuildMI(MF, TII.get(Alpha::LDAH), Alpha::R28)
       .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
     MBB.insert(II, nMI);
   } else {

Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp Mon Jul  7 18:14:23 2008
@@ -291,7 +291,7 @@
       assert(0 && "Unknown regclass!");
       abort();
     }
-    MachineInstrBuilder MIB = BuildMI(get(Opc))
+    MachineInstrBuilder MIB = BuildMI(MF, get(Opc))
       .addReg(SrcReg, false, false, isKill);
     for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
       MachineOperand &MO = Addr[i];
@@ -378,7 +378,7 @@
       assert(0 && "Unknown regclass!");
       abort();
     }
-    MachineInstrBuilder MIB = BuildMI(get(Opc), DestReg);
+    MachineInstrBuilder MIB = BuildMI(MF, get(Opc), DestReg);
     for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
       MachineOperand &MO = Addr[i];
       if (MO.isRegister())
@@ -414,7 +414,7 @@
       unsigned InReg = MI->getOperand(1).getReg();
       bool isKill = MI->getOperand(1).isKill();
       if (FrameIndex < SPUFrameInfo::maxFrameOffset()) {
-        NewMI = addFrameReference(BuildMI(TII.get(SPU::STQDr32))
+        NewMI = addFrameReference(BuildMI(MF, TII.get(SPU::STQDr32))
                                   .addReg(InReg, false, false, isKill),
                                   FrameIndex);
       }
@@ -423,7 +423,7 @@
       bool isDead = MI->getOperand(0).isDead();
       Opc = (FrameIndex < SPUFrameInfo::maxFrameOffset())
         ? SPU::STQDr32 : SPU::STQXr32;
-      NewMI = addFrameReference(BuildMI(TII.get(Opc))
+      NewMI = addFrameReference(BuildMI(MF, TII.get(Opc))
                        .addReg(OutReg, true, false, false, isDead), FrameIndex);
     }
   }

Modified: llvm/trunk/lib/Target/IA64/IA64InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64InstrInfo.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64InstrInfo.cpp Mon Jul  7 18:14:23 2008
@@ -117,7 +117,7 @@
       "sorry, I don't know how to store this sort of reg\n");
   }
 
-  MachineInstrBuilder MIB = BuildMI(get(Opc));
+  MachineInstrBuilder MIB = BuildMI(MF, get(Opc));
   for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
     MachineOperand &MO = Addr[i];
     if (MO.isRegister())
@@ -169,7 +169,7 @@
       "sorry, I don't know how to store this sort of reg\n");
   }
 
-  MachineInstrBuilder MIB = BuildMI(get(Opc), DestReg);
+  MachineInstrBuilder MIB = BuildMI(MF, get(Opc), DestReg);
   for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
     MachineOperand &MO = Addr[i];
     if (MO.isRegister())

Modified: llvm/trunk/lib/Target/IA64/IA64RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64RegisterInfo.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64RegisterInfo.cpp Mon Jul  7 18:14:23 2008
@@ -94,18 +94,15 @@
       unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
       Amount = (Amount+Align-1)/Align*Align;
 
-      MachineInstr *New;
+      // Replace the pseudo instruction with a new instruction...
       if (Old->getOpcode() == IA64::ADJUSTCALLSTACKDOWN) {
-        New=BuildMI(TII.get(IA64::ADDIMM22), IA64::r12).addReg(IA64::r12)
+        BuildMI(MBB, I, TII.get(IA64::ADDIMM22), IA64::r12).addReg(IA64::r12)
           .addImm(-Amount);
       } else {
         assert(Old->getOpcode() == IA64::ADJUSTCALLSTACKUP);
-        New=BuildMI(TII.get(IA64::ADDIMM22), IA64::r12).addReg(IA64::r12)
+        BuildMI(MBB, I, TII.get(IA64::ADDIMM22), IA64::r12).addReg(IA64::r12)
           .addImm(Amount);
       }
-
-      // Replace the pseudo instruction with a new instruction...
-      MBB.insert(I, New);
     }
   }
 
@@ -148,18 +145,14 @@
     // Fix up the old:
     MI.getOperand(i).ChangeToRegister(IA64::r22, false);
     //insert the new
-    MachineInstr* nMI=BuildMI(TII.get(IA64::ADDIMM22), IA64::r22)
+    BuildMI(MBB, II, TII.get(IA64::ADDIMM22), IA64::r22)
       .addReg(BaseRegister).addImm(Offset);
-    MBB.insert(II, nMI);
   } else { // it's big
     //fix up the old:
     MI.getOperand(i).ChangeToRegister(IA64::r22, false);
-    MachineInstr* nMI;
-    nMI=BuildMI(TII.get(IA64::MOVLIMM64), IA64::r22).addImm(Offset);
-    MBB.insert(II, nMI);
-    nMI=BuildMI(TII.get(IA64::ADD), IA64::r22).addReg(BaseRegister)
+    BuildMI(MBB, II, TII.get(IA64::MOVLIMM64), IA64::r22).addImm(Offset);
+    BuildMI(MBB, II, TII.get(IA64::ADD), IA64::r22).addReg(BaseRegister)
       .addReg(IA64::r22);
-    MBB.insert(II, nMI);
   }
 
 }
@@ -168,7 +161,6 @@
   MachineBasicBlock &MBB = MF.front();   // Prolog goes in entry BB
   MachineBasicBlock::iterator MBBI = MBB.begin();
   MachineFrameInfo *MFI = MF.getFrameInfo();
-  MachineInstr *MI;
   bool FP = hasFP(MF);
 
   // first, we handle the 'alloc' instruction, that should be right up the
@@ -212,9 +204,9 @@
     }
   }
 
-  MI=BuildMI(TII.get(IA64::ALLOC)).addReg(dstRegOfPseudoAlloc).addImm(0).  \
+  BuildMI(MBB, MBBI, TII.get(IA64::ALLOC)).
+     addReg(dstRegOfPseudoAlloc).addImm(0).
      addImm(numStackedGPRsUsed).addImm(numOutRegsUsed).addImm(0);
-  MBB.insert(MBBI, MI);
 
   // Get the number of bytes to allocate from the FrameInfo
   unsigned NumBytes = MFI->getStackSize();
@@ -237,24 +229,23 @@
 
   // adjust stack pointer: r12 -= numbytes
   if (NumBytes <= 8191) {
-    MI=BuildMI(TII.get(IA64::ADDIMM22),IA64::r12).addReg(IA64::r12).
+    BuildMI(MBB, MBBI, TII.get(IA64::ADDIMM22),IA64::r12).addReg(IA64::r12).
       addImm(-NumBytes);
-    MBB.insert(MBBI, MI);
   } else { // we use r22 as a scratch register here
-    MI=BuildMI(TII.get(IA64::MOVLIMM64), IA64::r22).addImm(-NumBytes);
+    // first load the decrement into r22
+    BuildMI(MBB, MBBI, TII.get(IA64::MOVLIMM64), IA64::r22).addImm(-NumBytes);
     // FIXME: MOVLSI32 expects a _u_32imm
-    MBB.insert(MBBI, MI);  // first load the decrement into r22
-    MI=BuildMI(TII.get(IA64::ADD), IA64::r12).addReg(IA64::r12).addReg(IA64::r22);
-    MBB.insert(MBBI, MI);  // then add (subtract) it to r12 (stack ptr)
+    // then add (subtract) it to r12 (stack ptr)
+    BuildMI(MBB, MBBI, TII.get(IA64::ADD), IA64::r12)
+      .addReg(IA64::r12).addReg(IA64::r22);
+    
   }
 
   // now if we need to, save the old FP and set the new
   if (FP) {
-    MI = BuildMI(TII.get(IA64::ST8)).addReg(IA64::r12).addReg(IA64::r5);
-    MBB.insert(MBBI, MI);
+    BuildMI(MBB, MBBI, TII.get(IA64::ST8)).addReg(IA64::r12).addReg(IA64::r5);
     // this must be the last instr in the prolog ?  (XXX: why??)
-    MI = BuildMI(TII.get(IA64::MOV), IA64::r5).addReg(IA64::r12);
-    MBB.insert(MBBI, MI);
+    BuildMI(MBB, MBBI, TII.get(IA64::MOV), IA64::r5).addReg(IA64::r12);
   }
 
 }
@@ -263,7 +254,6 @@
                                    MachineBasicBlock &MBB) const {
   const MachineFrameInfo *MFI = MF.getFrameInfo();
   MachineBasicBlock::iterator MBBI = prior(MBB.end());
-  MachineInstr *MI;
   assert(MBBI->getOpcode() == IA64::RET &&
          "Can only insert epilog into returning blocks");
 
@@ -276,25 +266,21 @@
   if (FP)
   {
     //copy the FP into the SP (discards allocas)
-    MI=BuildMI(TII.get(IA64::MOV), IA64::r12).addReg(IA64::r5);
-    MBB.insert(MBBI, MI);
+    BuildMI(MBB, MBBI, TII.get(IA64::MOV), IA64::r12).addReg(IA64::r5);
     //restore the FP
-    MI=BuildMI(TII.get(IA64::LD8), IA64::r5).addReg(IA64::r5);
-    MBB.insert(MBBI, MI);
+    BuildMI(MBB, MBBI, TII.get(IA64::LD8), IA64::r5).addReg(IA64::r5);
   }
 
   if (NumBytes != 0)
   {
     if (NumBytes <= 8191) {
-      MI=BuildMI(TII.get(IA64::ADDIMM22),IA64::r12).addReg(IA64::r12).
+      BuildMI(MBB, MBBI, TII.get(IA64::ADDIMM22),IA64::r12).addReg(IA64::r12).
         addImm(NumBytes);
-      MBB.insert(MBBI, MI);
     } else {
-      MI=BuildMI(TII.get(IA64::MOVLIMM64), IA64::r22).addImm(NumBytes);
-      MBB.insert(MBBI, MI);
-      MI=BuildMI(TII.get(IA64::ADD), IA64::r12).addReg(IA64::r12).
+      BuildMI(MBB, MBBI, TII.get(IA64::MOVLIMM64), IA64::r22).
+        addImm(NumBytes);
+      BuildMI(MBB, MBBI, TII.get(IA64::ADD), IA64::r12).addReg(IA64::r12).
         addReg(IA64::r22);
-      MBB.insert(MBBI, MI);
     }
   }
 

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Mon Jul  7 18:14:23 2008
@@ -169,7 +169,7 @@
     // destination vreg to set, the condition code register to branch on, the
     // true/false values to select between, and a branch opcode to use.
     const BasicBlock *LLVM_BB = BB->getBasicBlock();
-    ilist<MachineBasicBlock>::iterator It = BB;
+    MachineFunction::iterator It = BB;
     ++It;
 
     //  thisMBB:
@@ -179,13 +179,13 @@
     //   bNE   r1, r0, copy1MBB
     //   fallthrough --> copy0MBB
     MachineBasicBlock *thisMBB  = BB;
-    MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB);
-    MachineBasicBlock *sinkMBB  = new MachineBasicBlock(LLVM_BB);
+    MachineFunction *F = BB->getParent();
+    MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB);
+    MachineBasicBlock *sinkMBB  = F->CreateMachineBasicBlock(LLVM_BB);
     BuildMI(BB, TII->get(Mips::BNE)).addReg(MI->getOperand(1).getReg())
       .addReg(Mips::ZERO).addMBB(sinkMBB);
-    MachineFunction *F = BB->getParent();
-    F->getBasicBlockList().insert(It, copy0MBB);
-    F->getBasicBlockList().insert(It, sinkMBB);
+    F->insert(It, copy0MBB);
+    F->insert(It, sinkMBB);
     // Update machine-CFG edges by first adding all successors of the current
     // block to the new block which will contain the Phi node for the select.
     for(MachineBasicBlock::succ_iterator i = BB->succ_begin(),
@@ -214,7 +214,7 @@
       .addReg(MI->getOperand(2).getReg()).addMBB(copy0MBB)
       .addReg(MI->getOperand(3).getReg()).addMBB(thisMBB);
 
-    delete MI;   // The pseudo instruction is gone now.
+    F->DeleteMachineInstr(MI);   // The pseudo instruction is gone now.
     return BB;
   }
   }

Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp Mon Jul  7 18:14:23 2008
@@ -190,7 +190,7 @@
   else 
     assert(0 && "Can't store this register");
 
-  MachineInstrBuilder MIB = BuildMI(get(Opc))
+  MachineInstrBuilder MIB = BuildMI(MF, get(Opc))
     .addReg(SrcReg, false, false, isKill);
   for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
     MachineOperand &MO = Addr[i];
@@ -241,7 +241,7 @@
   else 
     assert(0 && "Can't load this register");
 
-  MachineInstrBuilder MIB = BuildMI(get(Opc), DestReg);
+  MachineInstrBuilder MIB = BuildMI(MF, get(Opc), DestReg);
   for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
     MachineOperand &MO = Addr[i];
     if (MO.isRegister())
@@ -273,12 +273,12 @@
       if (Ops[0] == 0) {    // COPY -> STORE
         unsigned SrcReg = MI->getOperand(2).getReg();
         bool isKill = MI->getOperand(2).isKill();
-        NewMI = BuildMI(get(Mips::SW)).addFrameIndex(FI)
+        NewMI = BuildMI(MF, get(Mips::SW)).addFrameIndex(FI)
           .addImm(0).addReg(SrcReg, false, false, isKill);
       } else {              // COPY -> LOAD
         unsigned DstReg = MI->getOperand(0).getReg();
         bool isDead = MI->getOperand(0).isDead();
-        NewMI = BuildMI(get(Mips::LW))
+        NewMI = BuildMI(MF, get(Mips::LW))
           .addReg(DstReg, true, false, false, isDead)
           .addImm(0).addFrameIndex(FI);
       }
@@ -304,12 +304,12 @@
       if (Ops[0] == 0) {    // COPY -> STORE
         unsigned SrcReg = MI->getOperand(1).getReg();
         bool isKill = MI->getOperand(1).isKill();
-        NewMI = BuildMI(get(StoreOpc)).addFrameIndex(FI)
+        NewMI = BuildMI(MF, get(StoreOpc)).addFrameIndex(FI)
           .addImm(0).addReg(SrcReg, false, false, isKill);
       } else {              // COPY -> LOAD
         unsigned DstReg = MI->getOperand(0).getReg();
         bool isDead = MI->getOperand(0).isDead();
-        NewMI = BuildMI(get(LoadOpc))
+        NewMI = BuildMI(MF, get(LoadOpc))
           .addReg(DstReg, true, false, false, isDead)
           .addImm(0).addFrameIndex(FI);
       }

Modified: llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.cpp Mon Jul  7 18:14:23 2008
@@ -61,7 +61,7 @@
                                       unsigned DestReg, 
                                       const MachineInstr *Orig) const 
 {
-  MachineInstr *MI = Orig->clone();
+  MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
   MI->getOperand(0).setReg(DestReg);
   MBB.insert(I, MI);
 }

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Mon Jul  7 18:14:23 2008
@@ -3992,7 +3992,7 @@
   // to set, the condition code register to branch on, the true/false values to
   // select between, and a branch opcode to use.
   const BasicBlock *LLVM_BB = BB->getBasicBlock();
-  ilist<MachineBasicBlock>::iterator It = BB;
+  MachineFunction::iterator It = BB;
   ++It;
   
   //  thisMBB:
@@ -4002,14 +4002,14 @@
   //   bCC copy1MBB
   //   fallthrough --> copy0MBB
   MachineBasicBlock *thisMBB = BB;
-  MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB);
-  MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB);
+  MachineFunction *F = BB->getParent();
+  MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB);
+  MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);
   unsigned SelectPred = MI->getOperand(4).getImm();
   BuildMI(BB, TII->get(PPC::BCC))
     .addImm(SelectPred).addReg(MI->getOperand(1).getReg()).addMBB(sinkMBB);
-  MachineFunction *F = BB->getParent();
-  F->getBasicBlockList().insert(It, copy0MBB);
-  F->getBasicBlockList().insert(It, sinkMBB);
+  F->insert(It, copy0MBB);
+  F->insert(It, sinkMBB);
   // Update machine-CFG edges by transferring all successors of the current
   // block to the new block which will contain the Phi node for the select.
   sinkMBB->transferSuccessors(BB);
@@ -4033,7 +4033,7 @@
     .addReg(MI->getOperand(3).getReg()).addMBB(copy0MBB)
     .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB);
 
-  delete MI;   // The pseudo instruction is gone now.
+  F->DeleteMachineInstr(MI);   // The pseudo instruction is gone now.
   return BB;
 }
 

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp Mon Jul  7 18:14:23 2008
@@ -138,6 +138,8 @@
 // rotate amt is zero.  We also have to munge the immediates a bit.
 MachineInstr *
 PPCInstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const {
+  MachineFunction &MF = *MI->getParent()->getParent();
+
   // Normal instructions can be commuted the obvious way.
   if (MI->getOpcode() != PPC::RLWIMI)
     return TargetInstrInfoImpl::commuteInstruction(MI, NewMI);
@@ -178,7 +180,8 @@
     // Create a new instruction.
     unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg();
     bool Reg0IsDead = MI->getOperand(0).isDead();
-    return BuildMI(MI->getDesc()).addReg(Reg0, true, false, false, Reg0IsDead)
+    return BuildMI(MF, MI->getDesc())
+      .addReg(Reg0, true, false, false, Reg0IsDead)
       .addReg(Reg2, false, false, Reg2IsKill)
       .addReg(Reg1, false, false, Reg1IsKill)
       .addImm((ME+1) & 31)
@@ -343,47 +346,48 @@
 }
 
 bool
-PPCInstrInfo::StoreRegToStackSlot(unsigned SrcReg, bool isKill,
+PPCInstrInfo::StoreRegToStackSlot(MachineFunction &MF,
+                                  unsigned SrcReg, bool isKill,
                                   int FrameIdx,
                                   const TargetRegisterClass *RC,
                                   SmallVectorImpl<MachineInstr*> &NewMIs) const{
   if (RC == PPC::GPRCRegisterClass) {
     if (SrcReg != PPC::LR) {
-      NewMIs.push_back(addFrameReference(BuildMI(get(PPC::STW))
+      NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::STW))
                                          .addReg(SrcReg, false, false, isKill),
                                          FrameIdx));
     } else {
       // FIXME: this spills LR immediately to memory in one step.  To do this,
       // we use R11, which we know cannot be used in the prolog/epilog.  This is
       // a hack.
-      NewMIs.push_back(BuildMI(get(PPC::MFLR), PPC::R11));
-      NewMIs.push_back(addFrameReference(BuildMI(get(PPC::STW))
+      NewMIs.push_back(BuildMI(MF, get(PPC::MFLR), PPC::R11));
+      NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::STW))
                                          .addReg(PPC::R11, false, false, isKill),
                                          FrameIdx));
     }
   } else if (RC == PPC::G8RCRegisterClass) {
     if (SrcReg != PPC::LR8) {
-      NewMIs.push_back(addFrameReference(BuildMI(get(PPC::STD))
+      NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::STD))
                               .addReg(SrcReg, false, false, isKill), FrameIdx));
     } else {
       // FIXME: this spills LR immediately to memory in one step.  To do this,
       // we use R11, which we know cannot be used in the prolog/epilog.  This is
       // a hack.
-      NewMIs.push_back(BuildMI(get(PPC::MFLR8), PPC::X11));
-      NewMIs.push_back(addFrameReference(BuildMI(get(PPC::STD))
+      NewMIs.push_back(BuildMI(MF, get(PPC::MFLR8), PPC::X11));
+      NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::STD))
                             .addReg(PPC::X11, false, false, isKill), FrameIdx));
     }
   } else if (RC == PPC::F8RCRegisterClass) {
-    NewMIs.push_back(addFrameReference(BuildMI(get(PPC::STFD))
+    NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::STFD))
                               .addReg(SrcReg, false, false, isKill), FrameIdx));
   } else if (RC == PPC::F4RCRegisterClass) {
-    NewMIs.push_back(addFrameReference(BuildMI(get(PPC::STFS))
+    NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::STFS))
                               .addReg(SrcReg, false, false, isKill), FrameIdx));
   } else if (RC == PPC::CRRCRegisterClass) {
     if ((EnablePPC32RS && !TM.getSubtargetImpl()->isPPC64()) ||
         (EnablePPC64RS && TM.getSubtargetImpl()->isPPC64())) {
       // FIXME (64-bit): Enable
-      NewMIs.push_back(addFrameReference(BuildMI(get(PPC::SPILL_CR))
+      NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::SPILL_CR))
                                          .addReg(SrcReg, false, false, isKill),
                                          FrameIdx));
       return true;
@@ -391,18 +395,18 @@
       // FIXME: We use R0 here, because it isn't available for RA.  We need to
       // store the CR in the low 4-bits of the saved value.  First, issue a MFCR
       // to save all of the CRBits.
-      NewMIs.push_back(BuildMI(get(PPC::MFCR), PPC::R0));
+      NewMIs.push_back(BuildMI(MF, get(PPC::MFCR), PPC::R0));
     
       // If the saved register wasn't CR0, shift the bits left so that they are
       // in CR0's slot.
       if (SrcReg != PPC::CR0) {
         unsigned ShiftBits = PPCRegisterInfo::getRegisterNumbering(SrcReg)*4;
         // rlwinm r0, r0, ShiftBits, 0, 31.
-        NewMIs.push_back(BuildMI(get(PPC::RLWINM), PPC::R0)
+        NewMIs.push_back(BuildMI(MF, get(PPC::RLWINM), PPC::R0)
                        .addReg(PPC::R0).addImm(ShiftBits).addImm(0).addImm(31));
       }
     
-      NewMIs.push_back(addFrameReference(BuildMI(get(PPC::STW))
+      NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::STW))
                                          .addReg(PPC::R0, false, false, isKill),
                                          FrameIdx));
     }
@@ -429,7 +433,7 @@
     else if (SrcReg >= PPC::CR7LT || SrcReg <= PPC::CR7UN) 
       Reg = PPC::CR7;
 
-    return StoreRegToStackSlot(Reg, isKill, FrameIdx, 
+    return StoreRegToStackSlot(MF, Reg, isKill, FrameIdx, 
                                PPC::CRRCRegisterClass, NewMIs);
 
   } else if (RC == PPC::VRRCRegisterClass) {
@@ -438,9 +442,9 @@
     // STVX VAL, 0, R0
     // 
     // FIXME: We use R0 here, because it isn't available for RA.
-    NewMIs.push_back(addFrameReference(BuildMI(get(PPC::ADDI), PPC::R0),
+    NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::ADDI), PPC::R0),
                                        FrameIdx, 0, 0));
-    NewMIs.push_back(BuildMI(get(PPC::STVX))
+    NewMIs.push_back(BuildMI(MF, get(PPC::STVX))
          .addReg(SrcReg, false, false, isKill).addReg(PPC::R0).addReg(PPC::R0));
   } else {
     assert(0 && "Unknown regclass!");
@@ -455,10 +459,11 @@
                                   MachineBasicBlock::iterator MI,
                                   unsigned SrcReg, bool isKill, int FrameIdx,
                                   const TargetRegisterClass *RC) const {
+  MachineFunction &MF = *MBB.getParent();
   SmallVector<MachineInstr*, 4> NewMIs;
 
-  if (StoreRegToStackSlot(SrcReg, isKill, FrameIdx, RC, NewMIs)) {
-    PPCFunctionInfo *FuncInfo = MBB.getParent()->getInfo<PPCFunctionInfo>();
+  if (StoreRegToStackSlot(MF, SrcReg, isKill, FrameIdx, RC, NewMIs)) {
+    PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>();
     FuncInfo->setSpillsCR();
   }
 
@@ -472,7 +477,8 @@
                                   const TargetRegisterClass *RC,
                                   SmallVectorImpl<MachineInstr*> &NewMIs) const{
   if (Addr[0].isFrameIndex()) {
-    if (StoreRegToStackSlot(SrcReg, isKill, Addr[0].getIndex(), RC, NewMIs)) {
+    if (StoreRegToStackSlot(MF, SrcReg, isKill,
+                            Addr[0].getIndex(), RC, NewMIs)) {
       PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>();
       FuncInfo->setSpillsCR();
     }
@@ -495,7 +501,7 @@
     assert(0 && "Unknown regclass!");
     abort();
   }
-  MachineInstrBuilder MIB = BuildMI(get(Opc))
+  MachineInstrBuilder MIB = BuildMI(MF, get(Opc))
     .addReg(SrcReg, false, false, isKill);
   for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
     MachineOperand &MO = Addr[i];
@@ -511,36 +517,37 @@
 }
 
 void
-PPCInstrInfo::LoadRegFromStackSlot(unsigned DestReg, int FrameIdx,
+PPCInstrInfo::LoadRegFromStackSlot(MachineFunction &MF,
+                                   unsigned DestReg, int FrameIdx,
                                    const TargetRegisterClass *RC,
                                    SmallVectorImpl<MachineInstr*> &NewMIs)const{
   if (RC == PPC::GPRCRegisterClass) {
     if (DestReg != PPC::LR) {
-      NewMIs.push_back(addFrameReference(BuildMI(get(PPC::LWZ), DestReg),
+      NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::LWZ), DestReg),
                                          FrameIdx));
     } else {
-      NewMIs.push_back(addFrameReference(BuildMI(get(PPC::LWZ), PPC::R11),
+      NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::LWZ), PPC::R11),
                                          FrameIdx));
-      NewMIs.push_back(BuildMI(get(PPC::MTLR)).addReg(PPC::R11));
+      NewMIs.push_back(BuildMI(MF, get(PPC::MTLR)).addReg(PPC::R11));
     }
   } else if (RC == PPC::G8RCRegisterClass) {
     if (DestReg != PPC::LR8) {
-      NewMIs.push_back(addFrameReference(BuildMI(get(PPC::LD), DestReg),
+      NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::LD), DestReg),
                                          FrameIdx));
     } else {
-      NewMIs.push_back(addFrameReference(BuildMI(get(PPC::LD), PPC::R11),
+      NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::LD), PPC::R11),
                                          FrameIdx));
-      NewMIs.push_back(BuildMI(get(PPC::MTLR8)).addReg(PPC::R11));
+      NewMIs.push_back(BuildMI(MF, get(PPC::MTLR8)).addReg(PPC::R11));
     }
   } else if (RC == PPC::F8RCRegisterClass) {
-    NewMIs.push_back(addFrameReference(BuildMI(get(PPC::LFD), DestReg),
+    NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::LFD), DestReg),
                                        FrameIdx));
   } else if (RC == PPC::F4RCRegisterClass) {
-    NewMIs.push_back(addFrameReference(BuildMI(get(PPC::LFS), DestReg),
+    NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::LFS), DestReg),
                                        FrameIdx));
   } else if (RC == PPC::CRRCRegisterClass) {
     // FIXME: We use R0 here, because it isn't available for RA.
-    NewMIs.push_back(addFrameReference(BuildMI(get(PPC::LWZ), PPC::R0),
+    NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::LWZ), PPC::R0),
                                        FrameIdx));
     
     // If the reloaded register isn't CR0, shift the bits right so that they are
@@ -548,11 +555,11 @@
     if (DestReg != PPC::CR0) {
       unsigned ShiftBits = PPCRegisterInfo::getRegisterNumbering(DestReg)*4;
       // rlwinm r11, r11, 32-ShiftBits, 0, 31.
-      NewMIs.push_back(BuildMI(get(PPC::RLWINM), PPC::R0)
+      NewMIs.push_back(BuildMI(MF, get(PPC::RLWINM), PPC::R0)
                     .addReg(PPC::R0).addImm(32-ShiftBits).addImm(0).addImm(31));
     }
     
-    NewMIs.push_back(BuildMI(get(PPC::MTCRF), DestReg).addReg(PPC::R0));
+    NewMIs.push_back(BuildMI(MF, get(PPC::MTCRF), DestReg).addReg(PPC::R0));
   } else if (RC == PPC::CRBITRCRegisterClass) {
    
     unsigned Reg = 0;
@@ -573,7 +580,7 @@
     else if (DestReg >= PPC::CR7LT || DestReg <= PPC::CR7UN) 
       Reg = PPC::CR7;
 
-    return LoadRegFromStackSlot(Reg, FrameIdx, 
+    return LoadRegFromStackSlot(MF, Reg, FrameIdx, 
                                 PPC::CRRCRegisterClass, NewMIs);
 
   } else if (RC == PPC::VRRCRegisterClass) {
@@ -582,9 +589,9 @@
     // Dest = LVX 0, R0
     // 
     // FIXME: We use R0 here, because it isn't available for RA.
-    NewMIs.push_back(addFrameReference(BuildMI(get(PPC::ADDI), PPC::R0),
+    NewMIs.push_back(addFrameReference(BuildMI(MF, get(PPC::ADDI), PPC::R0),
                                        FrameIdx, 0, 0));
-    NewMIs.push_back(BuildMI(get(PPC::LVX),DestReg).addReg(PPC::R0)
+    NewMIs.push_back(BuildMI(MF, get(PPC::LVX),DestReg).addReg(PPC::R0)
                      .addReg(PPC::R0));
   } else {
     assert(0 && "Unknown regclass!");
@@ -597,8 +604,9 @@
                                    MachineBasicBlock::iterator MI,
                                    unsigned DestReg, int FrameIdx,
                                    const TargetRegisterClass *RC) const {
+  MachineFunction &MF = *MBB.getParent();
   SmallVector<MachineInstr*, 4> NewMIs;
-  LoadRegFromStackSlot(DestReg, FrameIdx, RC, NewMIs);
+  LoadRegFromStackSlot(MF, DestReg, FrameIdx, RC, NewMIs);
   for (unsigned i = 0, e = NewMIs.size(); i != e; ++i)
     MBB.insert(MI, NewMIs[i]);
 }
@@ -608,7 +616,7 @@
                                    const TargetRegisterClass *RC,
                                    SmallVectorImpl<MachineInstr*> &NewMIs)const{
   if (Addr[0].isFrameIndex()) {
-    LoadRegFromStackSlot(DestReg, Addr[0].getIndex(), RC, NewMIs);
+    LoadRegFromStackSlot(MF, DestReg, Addr[0].getIndex(), RC, NewMIs);
     return;
   }
 
@@ -629,7 +637,7 @@
     assert(0 && "Unknown regclass!");
     abort();
   }
-  MachineInstrBuilder MIB = BuildMI(get(Opc), DestReg);
+  MachineInstrBuilder MIB = BuildMI(MF, get(Opc), DestReg);
   for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
     MachineOperand &MO = Addr[i];
     if (MO.isRegister())
@@ -662,13 +670,13 @@
     if (OpNum == 0) {  // move -> store
       unsigned InReg = MI->getOperand(1).getReg();
       bool isKill = MI->getOperand(1).isKill();
-      NewMI = addFrameReference(BuildMI(get(PPC::STW))
+      NewMI = addFrameReference(BuildMI(MF, get(PPC::STW))
                                 .addReg(InReg, false, false, isKill),
                                 FrameIndex);
     } else {           // move -> load
       unsigned OutReg = MI->getOperand(0).getReg();
       bool isDead = MI->getOperand(0).isDead();
-      NewMI = addFrameReference(BuildMI(get(PPC::LWZ))
+      NewMI = addFrameReference(BuildMI(MF, get(PPC::LWZ))
                                 .addReg(OutReg, true, false, false, isDead),
                                 FrameIndex);
     }
@@ -677,13 +685,13 @@
     if (OpNum == 0) {  // move -> store
       unsigned InReg = MI->getOperand(1).getReg();
       bool isKill = MI->getOperand(1).isKill();
-      NewMI = addFrameReference(BuildMI(get(PPC::STD))
+      NewMI = addFrameReference(BuildMI(MF, get(PPC::STD))
                                 .addReg(InReg, false, false, isKill),
                                 FrameIndex);
     } else {           // move -> load
       unsigned OutReg = MI->getOperand(0).getReg();
       bool isDead = MI->getOperand(0).isDead();
-      NewMI = addFrameReference(BuildMI(get(PPC::LD))
+      NewMI = addFrameReference(BuildMI(MF, get(PPC::LD))
                                 .addReg(OutReg, true, false, false, isDead),
                                 FrameIndex);
     }
@@ -691,13 +699,13 @@
     if (OpNum == 0) {  // move -> store
       unsigned InReg = MI->getOperand(1).getReg();
       bool isKill = MI->getOperand(1).isKill();
-      NewMI = addFrameReference(BuildMI(get(PPC::STFD))
+      NewMI = addFrameReference(BuildMI(MF, get(PPC::STFD))
                                 .addReg(InReg, false, false, isKill),
                                 FrameIndex);
     } else {           // move -> load
       unsigned OutReg = MI->getOperand(0).getReg();
       bool isDead = MI->getOperand(0).isDead();
-      NewMI = addFrameReference(BuildMI(get(PPC::LFD))
+      NewMI = addFrameReference(BuildMI(MF, get(PPC::LFD))
                                 .addReg(OutReg, true, false, false, isDead),
                                 FrameIndex);
     }
@@ -705,13 +713,13 @@
     if (OpNum == 0) {  // move -> store
       unsigned InReg = MI->getOperand(1).getReg();
       bool isKill = MI->getOperand(1).isKill();
-      NewMI = addFrameReference(BuildMI(get(PPC::STFS))
+      NewMI = addFrameReference(BuildMI(MF, get(PPC::STFS))
                                 .addReg(InReg, false, false, isKill),
                                 FrameIndex);
     } else {           // move -> load
       unsigned OutReg = MI->getOperand(0).getReg();
       bool isDead = MI->getOperand(0).isDead();
-      NewMI = addFrameReference(BuildMI(get(PPC::LFS))
+      NewMI = addFrameReference(BuildMI(MF, get(PPC::LFS))
                                 .addReg(OutReg, true, false, false, isDead),
                                 FrameIndex);
     }

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h Mon Jul  7 18:14:23 2008
@@ -65,10 +65,12 @@
   PPCTargetMachine &TM;
   const PPCRegisterInfo RI;
 
-  bool StoreRegToStackSlot(unsigned SrcReg, bool isKill, int FrameIdx,
+  bool StoreRegToStackSlot(MachineFunction &MF,
+                           unsigned SrcReg, bool isKill, int FrameIdx,
                            const TargetRegisterClass *RC,
                            SmallVectorImpl<MachineInstr*> &NewMIs) const;
-  void LoadRegFromStackSlot(unsigned DestReg, int FrameIdx,
+  void LoadRegFromStackSlot(MachineFunction &MF,
+                            unsigned DestReg, int FrameIdx,
                             const TargetRegisterClass *RC,
                             SmallVectorImpl<MachineInstr*> &NewMIs) const;
 public:

Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Mon Jul  7 18:14:23 2008
@@ -901,7 +901,7 @@
   // to set, the condition code register to branch on, the true/false values to
   // select between, and a branch opcode to use.
   const BasicBlock *LLVM_BB = BB->getBasicBlock();
-  ilist<MachineBasicBlock>::iterator It = BB;
+  MachineFunction::iterator It = BB;
   ++It;
   
   //  thisMBB:
@@ -910,12 +910,12 @@
   //   [f]bCC copy1MBB
   //   fallthrough --> copy0MBB
   MachineBasicBlock *thisMBB = BB;
-  MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB);
-  MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB);
-  BuildMI(BB, TII.get(BROpcode)).addMBB(sinkMBB).addImm(CC);
   MachineFunction *F = BB->getParent();
-  F->getBasicBlockList().insert(It, copy0MBB);
-  F->getBasicBlockList().insert(It, sinkMBB);
+  MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB);
+  MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);
+  BuildMI(BB, TII.get(BROpcode)).addMBB(sinkMBB).addImm(CC);
+  F->insert(It, copy0MBB);
+  F->insert(It, sinkMBB);
   // Update machine-CFG edges by transferring all successors of the current
   // block to the new block which will contain the Phi node for the select.
   sinkMBB->transferSuccessors(BB);
@@ -939,7 +939,7 @@
     .addReg(MI->getOperand(2).getReg()).addMBB(copy0MBB)
     .addReg(MI->getOperand(1).getReg()).addMBB(thisMBB);
   
-  delete MI;   // The pseudo instruction is gone now.
+  F->DeleteMachineInstr(MI);   // The pseudo instruction is gone now.
   return BB;
 }
 

Modified: llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp Mon Jul  7 18:14:23 2008
@@ -162,7 +162,7 @@
     Opc = SP::STDFri;
   else
     assert(0 && "Can't load this register");
-  MachineInstrBuilder MIB = BuildMI(get(Opc));
+  MachineInstrBuilder MIB = BuildMI(MF, get(Opc));
   for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
     MachineOperand &MO = Addr[i];
     if (MO.isRegister())
@@ -206,7 +206,7 @@
     Opc = SP::LDDFri;
   else
     assert(0 && "Can't load this register");
-  MachineInstrBuilder MIB = BuildMI(get(Opc), DestReg);
+  MachineInstrBuilder MIB = BuildMI(MF, get(Opc), DestReg);
   for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
     MachineOperand &MO = Addr[i];
     if (MO.isReg())
@@ -236,10 +236,10 @@
     if (MI->getOperand(1).isRegister() && MI->getOperand(1).getReg() == SP::G0&&
         MI->getOperand(0).isRegister() && MI->getOperand(2).isRegister()) {
       if (OpNum == 0)    // COPY -> STORE
-        NewMI = BuildMI(get(SP::STri)).addFrameIndex(FI).addImm(0)
+        NewMI = BuildMI(MF, get(SP::STri)).addFrameIndex(FI).addImm(0)
                                    .addReg(MI->getOperand(2).getReg());
       else               // COPY -> LOAD
-        NewMI = BuildMI(get(SP::LDri), MI->getOperand(0).getReg())
+        NewMI = BuildMI(MF, get(SP::LDri), MI->getOperand(0).getReg())
                       .addFrameIndex(FI).addImm(0);
     }
     break;
@@ -250,12 +250,12 @@
     if (OpNum == 0) { // COPY -> STORE
       unsigned SrcReg = MI->getOperand(1).getReg();
       bool isKill = MI->getOperand(1).isKill();
-      NewMI = BuildMI(get(isFloat ? SP::STFri : SP::STDFri))
+      NewMI = BuildMI(MF, get(isFloat ? SP::STFri : SP::STDFri))
         .addFrameIndex(FI).addImm(0).addReg(SrcReg, false, false, isKill);
     } else {             // COPY -> LOAD
       unsigned DstReg = MI->getOperand(0).getReg();
       bool isDead = MI->getOperand(0).isDead();
-      NewMI = BuildMI(get(isFloat ? SP::LDFri : SP::LDDFri))
+      NewMI = BuildMI(MF, get(isFloat ? SP::LDFri : SP::LDDFri))
         .addReg(DstReg, true, false, false, isDead).addFrameIndex(FI).addImm(0);
     }
     break;

Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Mon Jul  7 18:14:23 2008
@@ -858,7 +858,7 @@
   assert(UpdatedSlot < StackTop && Dest < 7);
   Stack[UpdatedSlot]   = Dest;
   RegMap[Dest]         = UpdatedSlot;
-  delete MI;   // Remove the old instruction
+  MBB->getParent()->DeleteMachineInstr(MI); // Remove the old instruction
 }
 
 /// handleCompareFP - Handle FUCOM and FUCOMI instructions, which have two FP

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Jul  7 18:14:23 2008
@@ -5955,16 +5955,16 @@
   //     fallthrough -->nextMBB
   const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
   const BasicBlock *LLVM_BB = MBB->getBasicBlock();
-  ilist<MachineBasicBlock>::iterator MBBIter = MBB;
+  MachineFunction::iterator MBBIter = MBB;
   ++MBBIter;
   
   /// First build the CFG
   MachineFunction *F = MBB->getParent();
   MachineBasicBlock *thisMBB = MBB;
-  MachineBasicBlock *newMBB = new MachineBasicBlock(LLVM_BB);
-  MachineBasicBlock *nextMBB = new MachineBasicBlock(LLVM_BB);
-  F->getBasicBlockList().insert(MBBIter, newMBB);
-  F->getBasicBlockList().insert(MBBIter, nextMBB);
+  MachineBasicBlock *newMBB = F->CreateMachineBasicBlock(LLVM_BB);
+  MachineBasicBlock *nextMBB = F->CreateMachineBasicBlock(LLVM_BB);
+  F->insert(MBBIter, newMBB);
+  F->insert(MBBIter, nextMBB);
   
   // Move all successors to thisMBB to nextMBB
   nextMBB->transferSuccessors(thisMBB);
@@ -6024,7 +6024,7 @@
   // insert branch
   BuildMI(newMBB, TII->get(X86::JNE)).addMBB(newMBB);
 
-  delete bInstr;   // The pseudo instruction is gone now.
+  F->DeleteMachineInstr(bInstr);   // The pseudo instruction is gone now.
   return nextMBB;
 }
 
@@ -6047,16 +6047,16 @@
   //
   const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
   const BasicBlock *LLVM_BB = MBB->getBasicBlock();
-  ilist<MachineBasicBlock>::iterator MBBIter = MBB;
+  MachineFunction::iterator MBBIter = MBB;
   ++MBBIter;
   
   /// First build the CFG
   MachineFunction *F = MBB->getParent();
   MachineBasicBlock *thisMBB = MBB;
-  MachineBasicBlock *newMBB = new MachineBasicBlock(LLVM_BB);
-  MachineBasicBlock *nextMBB = new MachineBasicBlock(LLVM_BB);
-  F->getBasicBlockList().insert(MBBIter, newMBB);
-  F->getBasicBlockList().insert(MBBIter, nextMBB);
+  MachineBasicBlock *newMBB = F->CreateMachineBasicBlock(LLVM_BB);
+  MachineBasicBlock *nextMBB = F->CreateMachineBasicBlock(LLVM_BB);
+  F->insert(MBBIter, newMBB);
+  F->insert(MBBIter, nextMBB);
   
   // Move all successors to thisMBB to nextMBB
   nextMBB->transferSuccessors(thisMBB);
@@ -6121,7 +6121,7 @@
   // insert branch
   BuildMI(newMBB, TII->get(X86::JNE)).addMBB(newMBB);
 
-  delete mInstr;   // The pseudo instruction is gone now.
+  F->DeleteMachineInstr(mInstr);   // The pseudo instruction is gone now.
   return nextMBB;
 }
 
@@ -6142,7 +6142,7 @@
     // destination vreg to set, the condition code register to branch on, the
     // true/false values to select between, and a branch opcode to use.
     const BasicBlock *LLVM_BB = BB->getBasicBlock();
-    ilist<MachineBasicBlock>::iterator It = BB;
+    MachineFunction::iterator It = BB;
     ++It;
 
     //  thisMBB:
@@ -6152,14 +6152,14 @@
     //   bCC copy1MBB
     //   fallthrough --> copy0MBB
     MachineBasicBlock *thisMBB = BB;
-    MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB);
-    MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB);
+    MachineFunction *F = BB->getParent();
+    MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB);
+    MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);
     unsigned Opc =
       X86::GetCondBranchFromCond((X86::CondCode)MI->getOperand(3).getImm());
     BuildMI(BB, TII->get(Opc)).addMBB(sinkMBB);
-    MachineFunction *F = BB->getParent();
-    F->getBasicBlockList().insert(It, copy0MBB);
-    F->getBasicBlockList().insert(It, sinkMBB);
+    F->insert(It, copy0MBB);
+    F->insert(It, sinkMBB);
     // Update machine-CFG edges by transferring all successors of the current
     // block to the new block which will contain the Phi node for the select.
     sinkMBB->transferSuccessors(BB);
@@ -6184,7 +6184,7 @@
       .addReg(MI->getOperand(1).getReg()).addMBB(copy0MBB)
       .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB);
 
-    delete MI;   // The pseudo instruction is gone now.
+    F->DeleteMachineInstr(MI);   // The pseudo instruction is gone now.
     return BB;
   }
 
@@ -6261,7 +6261,7 @@
     // Reload the original control word now.
     addFrameReference(BuildMI(BB, TII->get(X86::FLDCW16m)), CWFrameIdx);
 
-    delete MI;   // The pseudo instruction is gone now.
+    F->DeleteMachineInstr(MI);   // The pseudo instruction is gone now.
     return BB;
   }
   case X86::ATOMAND32:

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Jul  7 18:14:23 2008
@@ -750,7 +750,7 @@
 
 /// regIsPICBase - Return true if register is PIC base (i.e.g defined by
 /// X86::MOVPC32r.
-static bool regIsPICBase(unsigned BaseReg, MachineRegisterInfo &MRI) {
+static bool regIsPICBase(unsigned BaseReg, const MachineRegisterInfo &MRI) {
   bool isPICBase = false;
   for (MachineRegisterInfo::def_iterator I = MRI.def_begin(BaseReg),
          E = MRI.def_end(); I != E; ++I) {
@@ -799,7 +799,8 @@
         // Allow re-materialization of PIC load.
         if (!ReMatPICStubLoad && MI->getOperand(4).isGlobal())
           return false;
-        MachineRegisterInfo &MRI = MI->getParent()->getParent()->getRegInfo();
+        const MachineFunction &MF = *MI->getParent()->getParent();
+        const MachineRegisterInfo &MRI = MF.getRegInfo();
         bool isPICBase = false;
         for (MachineRegisterInfo::def_iterator I = MRI.def_begin(BaseReg),
                E = MRI.def_end(); I != E; ++I) {
@@ -825,7 +826,8 @@
          if (BaseReg == 0)
            return true;
          // Allow re-materialization of lea PICBase + x.
-         MachineRegisterInfo &MRI = MI->getParent()->getParent()->getRegInfo();
+         const MachineFunction &MF = *MI->getParent()->getParent();
+         const MachineRegisterInfo &MRI = MF.getRegInfo();
          return regIsPICBase(BaseReg, MRI);
        }
        return false;
@@ -909,7 +911,7 @@
   }
 
   if (!Emitted) {
-    MachineInstr *MI = Orig->clone();
+    MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
     MI->getOperand(0).setReg(DestReg);
     MBB.insert(I, MI);
   }
@@ -985,6 +987,7 @@
                                     MachineBasicBlock::iterator &MBBI,
                                     LiveVariables *LV) const {
   MachineInstr *MI = MBBI;
+  MachineFunction &MF = *MI->getParent()->getParent();
   // All instructions input are two-addr instructions.  Get the known operands.
   unsigned Dest = MI->getOperand(0).getReg();
   unsigned Src = MI->getOperand(1).getReg();
@@ -1007,7 +1010,7 @@
     if (B != C) return 0;
     unsigned A = MI->getOperand(0).getReg();
     unsigned M = MI->getOperand(3).getImm();
-    NewMI = BuildMI(get(X86::PSHUFDri)).addReg(A, true, false, false, isDead)
+    NewMI = BuildMI(MF, get(X86::PSHUFDri)).addReg(A, true, false, false, isDead)
       .addReg(B, false, false, isKill).addImm(M);
     break;
   }
@@ -1018,7 +1021,7 @@
     unsigned ShAmt = MI->getOperand(2).getImm();
     if (ShAmt == 0 || ShAmt >= 4) return 0;
 
-    NewMI = BuildMI(get(X86::LEA64r)).addReg(Dest, true, false, false, isDead)
+    NewMI = BuildMI(MF, get(X86::LEA64r)).addReg(Dest, true, false, false, isDead)
       .addReg(0).addImm(1 << ShAmt).addReg(Src, false, false, isKill).addImm(0);
     break;
   }
@@ -1031,7 +1034,7 @@
 
     unsigned Opc = TM.getSubtarget<X86Subtarget>().is64Bit() ?
       X86::LEA64_32r : X86::LEA32r;
-    NewMI = BuildMI(get(Opc)).addReg(Dest, true, false, false, isDead)
+    NewMI = BuildMI(MF, get(Opc)).addReg(Dest, true, false, false, isDead)
       .addReg(0).addImm(1 << ShAmt)
       .addReg(Src, false, false, isKill).addImm(0);
     break;
@@ -1053,22 +1056,17 @@
             
       // Build and insert into an implicit UNDEF value. This is OK because
       // well be shifting and then extracting the lower 16-bits. 
-      MachineInstr *Undef = BuildMI(get(X86::IMPLICIT_DEF), leaInReg);      
-      MachineInstr *InsMI =  BuildMI(get(X86::INSERT_SUBREG),leaInReg)
+      BuildMI(*MFI, MBBI, get(X86::IMPLICIT_DEF), leaInReg);      
+      MachineInstr *InsMI =  BuildMI(*MFI, MBBI, get(X86::INSERT_SUBREG),leaInReg)
         .addReg(leaInReg).addReg(Src, false, false, isKill)
         .addImm(X86::SUBREG_16BIT);
       
-      NewMI = BuildMI(get(Opc), leaOutReg).addReg(0).addImm(1 << ShAmt)
+      NewMI = BuildMI(*MFI, MBBI, get(Opc), leaOutReg).addReg(0).addImm(1 << ShAmt)
         .addReg(leaInReg, false, false, true).addImm(0);
       
-      MachineInstr *ExtMI = BuildMI(get(X86::EXTRACT_SUBREG))
+      MachineInstr *ExtMI = BuildMI(*MFI, MBBI, get(X86::EXTRACT_SUBREG))
         .addReg(Dest, true, false, false, isDead)
         .addReg(leaOutReg, false, false, true).addImm(X86::SUBREG_16BIT);
-      
-      MFI->insert(MBBI, Undef);
-      MFI->insert(MBBI, InsMI);            // Insert the insert_subreg
-      MFI->insert(MBBI, NewMI);            // Insert the lea inst
-      MFI->insert(MBBI, ExtMI);            // Insert the extract_subreg      
       if (LV) {
         // Update live variables
         LV->getVarInfo(leaInReg).Kills.push_back(NewMI);
@@ -1080,7 +1078,7 @@
       }
       return ExtMI;
     } else {
-      NewMI = BuildMI(get(X86::LEA16r)).addReg(Dest, true, false, false, isDead)
+      NewMI = BuildMI(MF, get(X86::LEA16r)).addReg(Dest, true, false, false, isDead)
         .addReg(0).addImm(1 << ShAmt)
         .addReg(Src, false, false, isKill).addImm(0);
     }
@@ -1101,7 +1099,7 @@
       assert(MI->getNumOperands() >= 2 && "Unknown inc instruction!");
       unsigned Opc = MIOpc == X86::INC64r ? X86::LEA64r
         : (is64Bit ? X86::LEA64_32r : X86::LEA32r);
-      NewMI = addRegOffset(BuildMI(get(Opc))
+      NewMI = addRegOffset(BuildMI(MF, get(Opc))
                            .addReg(Dest, true, false, false, isDead),
                            Src, isKill, 1);
       break;
@@ -1110,7 +1108,7 @@
     case X86::INC64_16r:
       if (DisableLEA16) return 0;
       assert(MI->getNumOperands() >= 2 && "Unknown inc instruction!");
-      NewMI = addRegOffset(BuildMI(get(X86::LEA16r))
+      NewMI = addRegOffset(BuildMI(MF, get(X86::LEA16r))
                            .addReg(Dest, true, false, false, isDead),
                            Src, isKill, 1);
       break;
@@ -1119,7 +1117,7 @@
       assert(MI->getNumOperands() >= 2 && "Unknown dec instruction!");
       unsigned Opc = MIOpc == X86::DEC64r ? X86::LEA64r
         : (is64Bit ? X86::LEA64_32r : X86::LEA32r);
-      NewMI = addRegOffset(BuildMI(get(Opc))
+      NewMI = addRegOffset(BuildMI(MF, get(Opc))
                            .addReg(Dest, true, false, false, isDead),
                            Src, isKill, -1);
       break;
@@ -1128,7 +1126,7 @@
     case X86::DEC64_16r:
       if (DisableLEA16) return 0;
       assert(MI->getNumOperands() >= 2 && "Unknown dec instruction!");
-      NewMI = addRegOffset(BuildMI(get(X86::LEA16r))
+      NewMI = addRegOffset(BuildMI(MF, get(X86::LEA16r))
                            .addReg(Dest, true, false, false, isDead),
                            Src, isKill, -1);
       break;
@@ -1139,7 +1137,7 @@
         : (is64Bit ? X86::LEA64_32r : X86::LEA32r);
       unsigned Src2 = MI->getOperand(2).getReg();
       bool isKill2 = MI->getOperand(2).isKill();
-      NewMI = addRegReg(BuildMI(get(Opc))
+      NewMI = addRegReg(BuildMI(MF, get(Opc))
                         .addReg(Dest, true, false, false, isDead),
                         Src, isKill, Src2, isKill2);
       if (LV && isKill2)
@@ -1151,7 +1149,7 @@
       assert(MI->getNumOperands() >= 3 && "Unknown add instruction!");
       unsigned Src2 = MI->getOperand(2).getReg();
       bool isKill2 = MI->getOperand(2).isKill();
-      NewMI = addRegReg(BuildMI(get(X86::LEA16r))
+      NewMI = addRegReg(BuildMI(MF, get(X86::LEA16r))
                         .addReg(Dest, true, false, false, isDead),
                         Src, isKill, Src2, isKill2);
       if (LV && isKill2)
@@ -1162,7 +1160,7 @@
     case X86::ADD64ri8:
       assert(MI->getNumOperands() >= 3 && "Unknown add instruction!");
       if (MI->getOperand(2).isImmediate())
-        NewMI = addRegOffset(BuildMI(get(X86::LEA64r))
+        NewMI = addRegOffset(BuildMI(MF, get(X86::LEA64r))
                              .addReg(Dest, true, false, false, isDead),
                              Src, isKill, MI->getOperand(2).getImm());
       break;
@@ -1171,7 +1169,7 @@
       assert(MI->getNumOperands() >= 3 && "Unknown add instruction!");
       if (MI->getOperand(2).isImmediate()) {
         unsigned Opc = is64Bit ? X86::LEA64_32r : X86::LEA32r;
-        NewMI = addRegOffset(BuildMI(get(Opc))
+        NewMI = addRegOffset(BuildMI(MF, get(Opc))
                              .addReg(Dest, true, false, false, isDead),
                              Src, isKill, MI->getOperand(2).getImm());
       }
@@ -1181,7 +1179,7 @@
       if (DisableLEA16) return 0;
       assert(MI->getNumOperands() >= 3 && "Unknown add instruction!");
       if (MI->getOperand(2).isImmediate())
-        NewMI = addRegOffset(BuildMI(get(X86::LEA16r))
+        NewMI = addRegOffset(BuildMI(MF, get(X86::LEA16r))
                              .addReg(Dest, true, false, false, isDead),
                              Src, isKill, MI->getOperand(2).getImm());
       break;
@@ -1199,7 +1197,7 @@
         unsigned Opc = MIOpc == X86::SHL64ri ? X86::LEA64r
           : (MIOpc == X86::SHL32ri
              ? (is64Bit ? X86::LEA64_32r : X86::LEA32r) : X86::LEA16r);
-        NewMI = addFullAddress(BuildMI(get(Opc))
+        NewMI = addFullAddress(BuildMI(MF, get(Opc))
                                .addReg(Dest, true, false, false, isDead), AM);
         if (isKill)
           NewMI->getOperand(3).setIsKill(true);
@@ -1262,7 +1260,9 @@
       A = C;
       CisKill = false;
     }
-    return BuildMI(get(Opc)).addReg(A, true, false, false, AisDead)
+    MachineFunction &MF = *MI->getParent()->getParent();
+    return BuildMI(MF, get(Opc))
+      .addReg(A, true, false, false, AisDead)
       .addReg(C, false, false, CisKill)
       .addReg(B, false, false, BisKill).addImm(Size-Amt);
   }
@@ -1750,7 +1750,7 @@
                                   const TargetRegisterClass *RC,
                                   SmallVectorImpl<MachineInstr*> &NewMIs) const {
   unsigned Opc = getStoreRegOpcode(RC, RI.getStackAlignment());
-  MachineInstrBuilder MIB = BuildMI(get(Opc));
+  MachineInstrBuilder MIB = BuildMI(MF, get(Opc));
   for (unsigned i = 0, e = Addr.size(); i != e; ++i)
     MIB = X86InstrAddOperand(MIB, Addr[i]);
   MIB.addReg(SrcReg, false, false, isKill);
@@ -1809,7 +1809,7 @@
                                  const TargetRegisterClass *RC,
                                  SmallVectorImpl<MachineInstr*> &NewMIs) const {
   unsigned Opc = getLoadRegOpcode(RC, RI.getStackAlignment());
-  MachineInstrBuilder MIB = BuildMI(get(Opc), DestReg);
+  MachineInstrBuilder MIB = BuildMI(MF, get(Opc), DestReg);
   for (unsigned i = 0, e = Addr.size(); i != e; ++i)
     MIB = X86InstrAddOperand(MIB, Addr[i]);
   NewMIs.push_back(MIB);
@@ -1854,11 +1854,11 @@
   return true;
 }
 
-static MachineInstr *FuseTwoAddrInst(unsigned Opcode,
+static MachineInstr *FuseTwoAddrInst(MachineFunction &MF, unsigned Opcode,
                                      SmallVector<MachineOperand,4> &MOs,
                                  MachineInstr *MI, const TargetInstrInfo &TII) {
   // Create the base instruction with the memory operand as the first part.
-  MachineInstr *NewMI = new MachineInstr(TII.get(Opcode), true);
+  MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), true);
   MachineInstrBuilder MIB(NewMI);
   unsigned NumAddrOps = MOs.size();
   for (unsigned i = 0; i != NumAddrOps; ++i)
@@ -1879,10 +1879,11 @@
   return MIB;
 }
 
-static MachineInstr *FuseInst(unsigned Opcode, unsigned OpNo,
+static MachineInstr *FuseInst(MachineFunction &MF,
+                              unsigned Opcode, unsigned OpNo,
                               SmallVector<MachineOperand,4> &MOs,
                               MachineInstr *MI, const TargetInstrInfo &TII) {
-  MachineInstr *NewMI = new MachineInstr(TII.get(Opcode), true);
+  MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), true);
   MachineInstrBuilder MIB(NewMI);
   
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
@@ -1904,7 +1905,8 @@
 static MachineInstr *MakeM0Inst(const TargetInstrInfo &TII, unsigned Opcode,
                                 SmallVector<MachineOperand,4> &MOs,
                                 MachineInstr *MI) {
-  MachineInstrBuilder MIB = BuildMI(TII.get(Opcode));
+  MachineFunction &MF = *MI->getParent()->getParent();
+  MachineInstrBuilder MIB = BuildMI(MF, TII.get(Opcode));
 
   unsigned NumAddrOps = MOs.size();
   for (unsigned i = 0; i != NumAddrOps; ++i)
@@ -1915,7 +1917,8 @@
 }
 
 MachineInstr*
-X86InstrInfo::foldMemoryOperand(MachineInstr *MI, unsigned i,
+X86InstrInfo::foldMemoryOperand(MachineFunction &MF,
+                                MachineInstr *MI, unsigned i,
                                 SmallVector<MachineOperand,4> &MOs) const {
   const DenseMap<unsigned*, unsigned> *OpcodeTablePtr = NULL;
   bool isTwoAddrFold = false;
@@ -1959,9 +1962,9 @@
       OpcodeTablePtr->find((unsigned*)MI->getOpcode());
     if (I != OpcodeTablePtr->end()) {
       if (isTwoAddrFold)
-        NewMI = FuseTwoAddrInst(I->second, MOs, MI, *this);
+        NewMI = FuseTwoAddrInst(MF, I->second, MOs, MI, *this);
       else
-        NewMI = FuseInst(I->second, i, MOs, MI, *this);
+        NewMI = FuseInst(MF, I->second, i, MOs, MI, *this);
       return NewMI;
     }
   }
@@ -2017,7 +2020,7 @@
 
   SmallVector<MachineOperand,4> MOs;
   MOs.push_back(MachineOperand::CreateFI(FrameIndex));
-  return foldMemoryOperand(MI, Ops[0], MOs);
+  return foldMemoryOperand(MF, MI, Ops[0], MOs);
 }
 
 MachineInstr* X86InstrInfo::foldMemoryOperand(MachineFunction &MF,
@@ -2028,8 +2031,9 @@
   if (NoFusing) return NULL;
 
   unsigned Alignment = 0;
-  for (unsigned i = 0, e = LoadMI->getNumMemOperands(); i != e; ++i) {
-    const MachineMemOperand &MRO = LoadMI->getMemOperand(i);
+  for (alist<MachineMemOperand>::iterator i = LoadMI->memoperands_begin(),
+       e = LoadMI->memoperands_end(); i != e; ++i) {
+    const MachineMemOperand &MRO = *i;
     unsigned Align = MRO.getAlignment();
     if (Align > Alignment)
       Alignment = Align;
@@ -2072,7 +2076,7 @@
   unsigned NumOps = LoadMI->getDesc().getNumOperands();
   for (unsigned i = NumOps - 4; i != NumOps; ++i)
     MOs.push_back(LoadMI->getOperand(i));
-  return foldMemoryOperand(MI, Ops[0], MOs);
+  return foldMemoryOperand(MF, MI, Ops[0], MOs);
 }
 
 
@@ -2185,7 +2189,7 @@
   }
 
   // Emit the data processing instruction.
-  MachineInstr *DataMI = new MachineInstr(TID, true);
+  MachineInstr *DataMI = MF.CreateMachineInstr(TID, true);
   MachineInstrBuilder MIB(DataMI);
   
   if (FoldedStore)

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Mon Jul  7 18:14:23 2008
@@ -414,9 +414,10 @@
   virtual unsigned GetInstSizeInBytes(const MachineInstr *MI) const;
 
 private:
-  MachineInstr* foldMemoryOperand(MachineInstr* MI,
-                                    unsigned OpNum,
-                                    SmallVector<MachineOperand,4> &MOs) const;
+  MachineInstr* foldMemoryOperand(MachineFunction &MF,
+                                  MachineInstr* MI,
+                                  unsigned OpNum,
+                                  SmallVector<MachineOperand,4> &MOs) const;
 };
 
 } // End llvm namespace

Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=53212&r1=53211&r2=53212&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Mon Jul  7 18:14:23 2008
@@ -183,8 +183,8 @@
       return CalleeSavedRegs64Bit;
   } else {
     if (MF) {
-        MachineFrameInfo *MFI = MF->getFrameInfo();
-        MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
+        const MachineFrameInfo *MFI = MF->getFrameInfo();
+        const MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
         if (MMI && MMI->callsEHReturn())
           return CalleeSavedRegs32EHRet;
     }
@@ -222,8 +222,8 @@
       return CalleeSavedRegClasses64Bit;
   } else {
     if (MF) {
-        MachineFrameInfo *MFI = MF->getFrameInfo();
-        MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
+        const MachineFrameInfo *MFI = MF->getFrameInfo();
+        const MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
         if (MMI && MMI->callsEHReturn())
           return CalleeSavedRegClasses32EHRet;
     }
@@ -269,8 +269,8 @@
 // if frame pointer elimination is disabled.
 //
 bool X86RegisterInfo::hasFP(const MachineFunction &MF) const {
-  MachineFrameInfo *MFI = MF.getFrameInfo();
-  MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
+  const MachineFrameInfo *MFI = MF.getFrameInfo();
+  const MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
 
   return (NoFramePointerElim ||
           needsStackRealignment(MF) ||
@@ -280,7 +280,7 @@
 }
 
 bool X86RegisterInfo::needsStackRealignment(const MachineFunction &MF) const {
-  MachineFrameInfo *MFI = MF.getFrameInfo();;
+  const MachineFrameInfo *MFI = MF.getFrameInfo();;
 
   // FIXME: Currently we don't support stack realignment for functions with
   // variable-sized allocas
@@ -343,7 +343,7 @@
 
       MachineInstr *New = 0;
       if (Old->getOpcode() == X86::ADJCALLSTACKDOWN) {
-        New=BuildMI(TII.get(Is64Bit ? X86::SUB64ri32 : X86::SUB32ri), StackPtr)
+        New=BuildMI(MF, TII.get(Is64Bit ? X86::SUB64ri32 : X86::SUB32ri), StackPtr)
           .addReg(StackPtr).addImm(Amount);
       } else {
         assert(Old->getOpcode() == X86::ADJCALLSTACKUP);
@@ -354,7 +354,7 @@
           unsigned Opc = (Amount < 128) ?
             (Is64Bit ? X86::ADD64ri8 : X86::ADD32ri8) :
             (Is64Bit ? X86::ADD64ri32 : X86::ADD32ri);
-          New = BuildMI(TII.get(Opc), StackPtr).addReg(StackPtr).addImm(Amount);
+          New = BuildMI(MF, TII.get(Opc), StackPtr).addReg(StackPtr).addImm(Amount);
         }
       }
 
@@ -370,7 +370,7 @@
         (Is64Bit ? X86::SUB64ri8 : X86::SUB32ri8) :
         (Is64Bit ? X86::SUB64ri32 : X86::SUB32ri);
       MachineInstr *New =
-        BuildMI(TII.get(Opc), StackPtr).addReg(StackPtr).addImm(CalleeAmt);
+        BuildMI(MF, TII.get(Opc), StackPtr).addReg(StackPtr).addImm(CalleeAmt);
       MBB.insert(I, New);
     }
   }
@@ -749,7 +749,7 @@
         BuildMI(MBB, MBBI, TII.get(X86::CALLpcrel32))
           .addExternalSymbol("_alloca");
         // Restore EAX
-        MachineInstr *MI = addRegOffset(BuildMI(TII.get(X86::MOV32rm),X86::EAX),
+        MachineInstr *MI = addRegOffset(BuildMI(MF, TII.get(X86::MOV32rm),X86::EAX),
                                         StackPtr, false, NumBytes-4);
         MBB.insert(MBBI, MI);
       }
@@ -845,7 +845,7 @@
   } else if (MFI->hasVarSizedObjects()) {
     if (CSSize) {
       unsigned Opc = Is64Bit ? X86::LEA64r : X86::LEA32r;
-      MachineInstr *MI = addRegOffset(BuildMI(TII.get(Opc), StackPtr),
+      MachineInstr *MI = addRegOffset(BuildMI(MF, TII.get(Opc), StackPtr),
                                       FramePtr, false, -CSSize);
       MBB.insert(MBBI, MI);
     } else




From kledzik at apple.com  Mon Jul  7 18:24:08 2008
From: kledzik at apple.com (Nick Kledzik)
Date: Mon, 07 Jul 2008 23:24:08 -0000
Subject: [llvm-commits] [llvm] r53213 - /llvm/trunk/tools/lto/lto.exports
Message-ID: <200807072324.m67NO8TN016912@zion.cs.uiuc.edu>

Author: kledzik
Date: Mon Jul  7 18:24:06 2008
New Revision: 53213

URL: http://llvm.org/viewvc/llvm-project?rev=53213&view=rev
Log:
add _lto_codegen_debug_options so that linker can use it

Modified:
    llvm/trunk/tools/lto/lto.exports

Modified: llvm/trunk/tools/lto/lto.exports
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/lto.exports?rev=53213&r1=53212&r2=53213&view=diff

==============================================================================
--- llvm/trunk/tools/lto/lto.exports (original)
+++ llvm/trunk/tools/lto/lto.exports Mon Jul  7 18:24:06 2008
@@ -19,4 +19,5 @@
 _lto_codegen_set_debug_model
 _lto_codegen_set_pic_model
 _lto_codegen_write_merged_modules
+_lto_codegen_debug_options
 




From evan.cheng at apple.com  Mon Jul  7 18:44:20 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 7 Jul 2008 16:44:20 -0700
Subject: [llvm-commits] [llvm] r53207 - in /llvm/trunk:
	lib/Target/Target.td utils/TableGen/RegisterInfoEmitter.cpp
In-Reply-To: <16e5fdf90807071551w2df9324ew53ce789d7e1ca3cb@mail.gmail.com>
References: <200807072219.m67MJlMK014487@zion.cs.uiuc.edu>
	<16e5fdf90807071551w2df9324ew53ce789d7e1ca3cb@mail.gmail.com>
Message-ID: <AB41F5B2-8F44-4521-99F4-77318B6F4459@apple.com>

This doesn't change that. There is a Name and a AsmName field. They  
can be different. e.g.
PPC::X9's Name field is now "X9" (the only difference being the  
previous name is lower cased "x9"), its AsmName is "r9".

Evan


On Jul 7, 2008, at 3:51 PM, Bill Wendling wrote:

> I put this in because PPC uses the same names for 64-bit and 32-bit
> registers. It's hard to determine which is which when it's printed
> out...
>
> -bw
>
> On Mon, Jul 7, 2008 at 3:19 PM, Evan Cheng <evan.cheng at apple.com>  
> wrote:
>> Author: evancheng
>> Date: Mon Jul  7 17:19:41 2008
>> New Revision: 53207
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=53207&view=rev
>> Log:
>> TargetRegisterDesc::Name field is the same as the abstract register  
>> name. There is no need for targets to specify register names in  
>> addition to their AsmName's.
>>
>> Modified:
>>   llvm/trunk/lib/Target/Target.td
>>   llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp
>>
>> Modified: llvm/trunk/lib/Target/Target.td
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Target.td?rev=53207&r1=53206&r2=53207&view=diff
>>
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> =====================================================================
>> --- llvm/trunk/lib/Target/Target.td (original)
>> +++ llvm/trunk/lib/Target/Target.td Mon Jul  7 17:19:41 2008
>> @@ -26,7 +26,6 @@
>> class Register<string n> {
>>  string Namespace = "";
>>  string AsmName = n;
>> -  string Name = n;
>>
>>  // SpillSize - If this value is set to a non-zero value, it is the  
>> size in
>>  // bits of the spill slot required to hold this register.  If this  
>> value is
>>
>> Modified: llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp?rev=53207&r1=53206&r2=53207&view=diff
>>
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> =====================================================================
>> --- llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp (original)
>> +++ llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp Mon Jul  7  
>> 17:19:41 2008
>> @@ -606,16 +606,7 @@
>>    else
>>      OS << Reg.getName();
>>    OS << "\",\t\"";
>> -    if (!Reg.TheDef->getValueAsString("Name").empty()) {
>> -      OS << Reg.TheDef->getValueAsString("Name");
>> -    } else {
>> -      // Default to "name".
>> -      if (!Reg.TheDef->getValueAsString("AsmName").empty())
>> -        OS << Reg.TheDef->getValueAsString("AsmName");
>> -      else
>> -        OS << Reg.getName();
>> -    }
>> -    OS << "\",\t";
>> +    OS << Reg.getName() << "\",\t";
>>    if (RegisterAliases.count(Reg.TheDef))
>>      OS << Reg.getName() << "_AliasSet,\t";
>>    else
>>
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From bruno.cardoso at gmail.com  Mon Jul  7 19:08:36 2008
From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes)
Date: Mon, 7 Jul 2008 21:08:36 -0300
Subject: [llvm-commits] [llvm] [PATCH] fpround libcall
Message-ID: <275e64e40807071708x787b6dc8oaf04a71e3c582f2f@mail.gmail.com>

Hi,

This patch address the problem I have with fpround on Mips as
discussed at llvmdev. I think this should have been implemented in
SoftenFloatOps
like suggested by Duncan. The problem is that this methods are only called by
"DAG.LegalizeTypes()", which is currently commented in
SelectionDAGISel::CodeGenAndEmitDAG. I'll implement there too and see what
happens, but what do you think about this for now?
Btw, the only target that does setConvertAction from f64 -> f32 to
Expand is X86, but
in the same code block it declares a f64 Register Class, so i think
the patch won't
break x86 behavior.

Thanks,

-- 
Bruno Cardoso Lopes
http://www.brunocardoso.cc
"When faced with untenable alternatives, you
 should consider your imperative."
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From dpatel at apple.com  Mon Jul  7 19:10:19 2008
From: dpatel at apple.com (Devang Patel)
Date: Mon, 7 Jul 2008 17:10:19 -0700
Subject: [llvm-commits] getting -with-sysroot to work
In-Reply-To: <38a0d8450807041108q249ee5ces68f1af5ee1566e14@mail.gmail.com>
References: <38a0d8450807041108q249ee5ces68f1af5ee1566e14@mail.gmail.com>
Message-ID: <80FE7B3E-2C20-42A4-A31C-63551CFFCFCC@apple.com>


On Jul 4, 2008, at 11:08 AM, Rafael Espindola wrote:

> Compiling llvm-gcc with --with-sysroot causes the resulting compiler
> to fail to find its own headers (like stddef.h).
>
> I was able to make it work by removing an Apple local change. I am
> sure Apple needs this for some reason. Maybe we can try to make it
> generic (a configure flag at least) and include it on mainline GCC?

The change reflects the way compiler SDKs are installed and searched  
by Apple gcc is used. Feel free to add a configure flag to make  
appropriate changes for your platform, but pl. don't change compiler  
behavior on darwin :)

-
Devang





From isanbard at gmail.com  Mon Jul  7 19:53:45 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 08 Jul 2008 00:53:45 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53214 -
	/llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp
Message-ID: <200807080053.m680rj5i019958@zion.cs.uiuc.edu>

Author: void
Date: Mon Jul  7 19:53:44 2008
New Revision: 53214

URL: http://llvm.org/viewvc/llvm-project?rev=53214&view=rev
Log:
Use a canonical form to specify arguments for a call function.

Modified:
    llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp

Modified: llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp?rev=53214&r1=53213&r2=53214&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp Mon Jul  7 19:53:44 2008
@@ -342,10 +342,11 @@
   Value *AllocACast = new BitCastInst(AI, EmpPtr, Name, CurBB);
 
   // Call llvm.dbg.declare.
-  SmallVector<Value *, 2> Args;
-  Args.push_back(AllocACast);
-  Args.push_back(getCastValueFor(Variable));
-  CallInst::Create(DeclareFn, Args.begin(), Args.end(), "", CurBB);
+  Value *Args[2] = {
+    AllocACast,
+    getCastValueFor(Variable)
+  };
+  CallInst::Create(DeclareFn, Args, Args + 2, "", CurBB);
 }
 
 /// EmitStopPoint - Emit a call to llvm.dbg.stoppoint to indicate a change of 




From evan.cheng at apple.com  Mon Jul  7 19:55:59 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 08 Jul 2008 00:55:59 -0000
Subject: [llvm-commits] [llvm] r53215 - in /llvm/trunk:
 include/llvm/CodeGen/AsmPrinter.h lib/CodeGen/AsmPrinter.cpp
 lib/Target/X86/X86ATTAsmPrinter.cpp lib/Target/X86/X86ATTAsmPrinter.h
Message-ID: <200807080056.m680u0Qb020038@zion.cs.uiuc.edu>

Author: evancheng
Date: Mon Jul  7 19:55:58 2008
New Revision: 53215

URL: http://llvm.org/viewvc/llvm-project?rev=53215&view=rev
Log:
Avoid unnecessary string construction during asm printing.

Modified:
    llvm/trunk/include/llvm/CodeGen/AsmPrinter.h
    llvm/trunk/lib/CodeGen/AsmPrinter.cpp
    llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
    llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.h

Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=53215&r1=53214&r2=53215&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original)
+++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Mon Jul  7 19:55:58 2008
@@ -351,6 +351,7 @@
     /// printSuffixedName - This prints a name with preceding 
     /// getPrivateGlobalPrefix and the specified suffix, handling quoted names
     /// correctly.
+    void printSuffixedName(const char *Name, const char* Suffix);
     void printSuffixedName(std::string &Name, const char* Suffix);
 
   private:

Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter.cpp?rev=53215&r1=53214&r2=53215&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter.cpp Mon Jul  7 19:55:58 2008
@@ -1377,7 +1377,7 @@
     O << ':';
   if (printComment && MBB->getBasicBlock())
     O << '\t' << TAI->getCommentString() << ' '
-      << MBB->getBasicBlock()->getName();
+      << MBB->getBasicBlock()->getNameStart();
 }
 
 /// printPICJumpTableSetLabel - This method prints a set label for the
@@ -1445,10 +1445,14 @@
   }
 }
 
-void AsmPrinter::printSuffixedName(std::string &Name, const char* Suffix) {
+void AsmPrinter::printSuffixedName(const char *Name, const char* Suffix) {
   if (Name[0]=='\"')
     O << '\"' << TAI->getPrivateGlobalPrefix() << 
-         Name.substr(1, Name.length()-2) << Suffix << '\"';
+         Name[1] << Suffix << '\"';
   else
     O << TAI->getPrivateGlobalPrefix() << Name << Suffix;
 }
+
+void AsmPrinter::printSuffixedName(std::string &Name, const char* Suffix) {
+  printSuffixedName(Name.c_str(), Suffix);
+}

Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=53215&r1=53214&r2=53215&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Mon Jul  7 19:55:58 2008
@@ -974,6 +974,16 @@
   EmitGlobalConstant(C);
 }
 
+/// printGVStub - Print stub for a global value.
+///
+void X86ATTAsmPrinter::printGVStub(const char *GV, const char *Prefix) {
+  if (Prefix) O << Prefix;
+  printSuffixedName(GV, "$non_lazy_ptr");
+  O << ":\n\t.indirect_symbol ";
+  if (Prefix) O << Prefix;
+  O << GV << "\n\t.long\t0\n";
+}
+
 
 bool X86ATTAsmPrinter::doFinalization(Module &M) {
   // Print out module-level global variables here.
@@ -1012,7 +1022,7 @@
          i != e; ++i, ++j) {
       SwitchToDataSection("\t.section __IMPORT,__jump_table,symbol_stubs,"
                           "self_modifying_code+pure_instructions,5", 0);
-      std::string p = i->getKeyData();
+      const char *p = i->getKeyData();
       printSuffixedName(p, "$stub");
       O << ":\n"
            "\t.indirect_symbol " << p << "\n"
@@ -1021,28 +1031,32 @@
 
     O << '\n';
 
+    // Print global value stubs.
+    bool InStubSection = false;
     if (TAI->doesSupportExceptionHandling() && MMI && !Subtarget->is64Bit()) {
       // Add the (possibly multiple) personalities to the set of global values.
       // Only referenced functions get into the Personalities list.
       const std::vector<Function *>& Personalities = MMI->getPersonalities();
-
       for (std::vector<Function *>::const_iterator I = Personalities.begin(),
-             E = Personalities.end(); I != E; ++I)
-        if (*I) GVStubs.insert('_' + (*I)->getName());
+             E = Personalities.end(); I != E; ++I) {
+        if (!*I)
+          continue;
+        if (!InStubSection) {
+          SwitchToDataSection(
+                     "\t.section __IMPORT,__pointers,non_lazy_symbol_pointers");
+          InStubSection = true;
+        }
+        printGVStub((*I)->getNameStart(), "_");
+      }
     }
 
     // Output stubs for external and common global variables.
-    if (!GVStubs.empty())
+    if (!InStubSection && !GVStubs.empty())
       SwitchToDataSection(
                     "\t.section __IMPORT,__pointers,non_lazy_symbol_pointers");
     for (StringSet<>::iterator i = GVStubs.begin(), e = GVStubs.end();
-         i != e; ++i) {
-      std::string p = i->getKeyData();
-      printSuffixedName(p, "$non_lazy_ptr");
-      O << ":\n"
-           "\t.indirect_symbol " << p << "\n"
-           "\t.long\t0\n";
-    }
+         i != e; ++i)
+      printGVStub(i->getKeyData());
 
     // Emit final debug information.
     DW.EndModule();

Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.h?rev=53215&r1=53214&r2=53215&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.h (original)
+++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.h Mon Jul  7 19:55:58 2008
@@ -120,6 +120,8 @@
   void printPICLabel(const MachineInstr *MI, unsigned Op);
   void printModuleLevelGV(const GlobalVariable* GVar);
 
+  void printGVStub(const char *GV, const char *Prefix = NULL);
+
   bool runOnMachineFunction(MachineFunction &F);
 
   /// getSectionForFunction - Return the section that we should emit the




From evan.cheng at apple.com  Mon Jul  7 20:16:55 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 7 Jul 2008 18:16:55 -0700
Subject: [llvm-commits] [llvm] [PATCH] fpround libcall
In-Reply-To: <275e64e40807071708x787b6dc8oaf04a71e3c582f2f@mail.gmail.com>
References: <275e64e40807071708x787b6dc8oaf04a71e3c582f2f@mail.gmail.com>
Message-ID: <D505F0E4-C5C6-4058-B21D-6D5E1D8E5EE5@apple.com>

+      } else if (SrcVT == MVT::f64 && DstVT == MVT::f32 &&

The check for DstVT == MVT::f32 is unnecessary. I would turn it into  
an assertion instead.

+                 getTypeAction(SrcVT) == Expand) {
+        SDOperand Lo;
+        Result = ExpandLibCall(RTLIB::FPROUND_F64_F32, Node, false,  
Lo);
+        break;

I think the patch is alright. But I am not completely comfortable to  
just say yes. Can you do a complete round of testing on x86?

Thanks,

Evan

On Jul 7, 2008, at 5:08 PM, Bruno Cardoso Lopes wrote:

> Hi,
>
> This patch address the problem I have with fpround on Mips as
> discussed at llvmdev. I think this should have been implemented in
> SoftenFloatOps
> like suggested by Duncan. The problem is that this methods are only  
> called by
> "DAG.LegalizeTypes()", which is currently commented in
> SelectionDAGISel::CodeGenAndEmitDAG. I'll implement there too and  
> see what
> happens, but what do you think about this for now?
> Btw, the only target that does setConvertAction from f64 -> f32 to
> Expand is X86, but
> in the same code block it declares a f64 Register Class, so i think
> the patch won't
> break x86 behavior.
>
> Thanks,
>
> -- 
> Bruno Cardoso Lopes
> http://www.brunocardoso.cc
> "When faced with untenable alternatives, you
> should consider your imperative."
> <LegalizeDAG.cpp.patch>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From evan.cheng at apple.com  Mon Jul  7 20:22:10 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 7 Jul 2008 18:22:10 -0700
Subject: [llvm-commits] [llvm] [PATCH] fpround libcall
In-Reply-To: <D505F0E4-C5C6-4058-B21D-6D5E1D8E5EE5@apple.com>
References: <275e64e40807071708x787b6dc8oaf04a71e3c582f2f@mail.gmail.com>
	<D505F0E4-C5C6-4058-B21D-6D5E1D8E5EE5@apple.com>
Message-ID: <6AD89224-A6DA-439A-A6A6-0771952055F4@apple.com>

Also, it might be cleaner to just call ExpandOp. I'd hate to have 2  
places that generate the same libcall.

Evan

On Jul 7, 2008, at 6:16 PM, Evan Cheng wrote:

> +      } else if (SrcVT == MVT::f64 && DstVT == MVT::f32 &&
>
> The check for DstVT == MVT::f32 is unnecessary. I would turn it into
> an assertion instead.
>
> +                 getTypeAction(SrcVT) == Expand) {
> +        SDOperand Lo;
> +        Result = ExpandLibCall(RTLIB::FPROUND_F64_F32, Node, false,
> Lo);
> +        break;
>
> I think the patch is alright. But I am not completely comfortable to
> just say yes. Can you do a complete round of testing on x86?
>
> Thanks,
>
> Evan
>
> On Jul 7, 2008, at 5:08 PM, Bruno Cardoso Lopes wrote:
>
>> Hi,
>>
>> This patch address the problem I have with fpround on Mips as
>> discussed at llvmdev. I think this should have been implemented in
>> SoftenFloatOps
>> like suggested by Duncan. The problem is that this methods are only
>> called by
>> "DAG.LegalizeTypes()", which is currently commented in
>> SelectionDAGISel::CodeGenAndEmitDAG. I'll implement there too and
>> see what
>> happens, but what do you think about this for now?
>> Btw, the only target that does setConvertAction from f64 -> f32 to
>> Expand is X86, but
>> in the same code block it declares a f64 Register Class, so i think
>> the patch won't
>> break x86 behavior.
>>
>> Thanks,
>>
>> -- 
>> Bruno Cardoso Lopes
>> http://www.brunocardoso.cc
>> "When faced with untenable alternatives, you
>> should consider your imperative."
>> < 
>> LegalizeDAG.cpp.patch>_______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From bruno.cardoso at gmail.com  Mon Jul  7 20:39:00 2008
From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes)
Date: Mon, 7 Jul 2008 22:39:00 -0300
Subject: [llvm-commits] [llvm] [PATCH] fpround libcall
In-Reply-To: <6AD89224-A6DA-439A-A6A6-0771952055F4@apple.com>
References: <275e64e40807071708x787b6dc8oaf04a71e3c582f2f@mail.gmail.com>
	<D505F0E4-C5C6-4058-B21D-6D5E1D8E5EE5@apple.com>
	<6AD89224-A6DA-439A-A6A6-0771952055F4@apple.com>
Message-ID: <275e64e40807071839r7b9b54cfjcc9ce4be3c16c3b5@mail.gmail.com>

Hi Evan,
I'm not used to run x86 tests, what would be a good "complete round" test?

On Mon, Jul 7, 2008 at 10:22 PM, Evan Cheng <evan.cheng at apple.com> wrote:
> Also, it might be cleaner to just call ExpandOp. I'd hate to have 2
> places that generate the same libcall.
>
> Evan
>
> On Jul 7, 2008, at 6:16 PM, Evan Cheng wrote:
>
>> +      } else if (SrcVT == MVT::f64 && DstVT == MVT::f32 &&
>>
>> The check for DstVT == MVT::f32 is unnecessary. I would turn it into
>> an assertion instead.
>>
>> +                 getTypeAction(SrcVT) == Expand) {
>> +        SDOperand Lo;
>> +        Result = ExpandLibCall(RTLIB::FPROUND_F64_F32, Node, false,
>> Lo);
>> +        break;
>>
>> I think the patch is alright. But I am not completely comfortable to
>> just say yes. Can you do a complete round of testing on x86?
>>
>> Thanks,
>>
>> Evan
>>
>> On Jul 7, 2008, at 5:08 PM, Bruno Cardoso Lopes wrote:
>>
>>> Hi,
>>>
>>> This patch address the problem I have with fpround on Mips as
>>> discussed at llvmdev. I think this should have been implemented in
>>> SoftenFloatOps
>>> like suggested by Duncan. The problem is that this methods are only
>>> called by
>>> "DAG.LegalizeTypes()", which is currently commented in
>>> SelectionDAGISel::CodeGenAndEmitDAG. I'll implement there too and
>>> see what
>>> happens, but what do you think about this for now?
>>> Btw, the only target that does setConvertAction from f64 -> f32 to
>>> Expand is X86, but
>>> in the same code block it declares a f64 Register Class, so i think
>>> the patch won't
>>> break x86 behavior.
>>>
>>> Thanks,
>>>
>>> --
>>> Bruno Cardoso Lopes
>>> http://www.brunocardoso.cc
>>> "When faced with untenable alternatives, you
>>> should consider your imperative."
>>> <
>>> LegalizeDAG.cpp.patch>_______________________________________________
>>> llvm-commits mailing list
>>> llvm-commits at cs.uiuc.edu
>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>



-- 
Bruno Cardoso Lopes
http://www.brunocardoso.cc
"When faced with untenable alternatives, you
 should consider your imperative."


From bruno.cardoso at gmail.com  Mon Jul  7 21:16:40 2008
From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes)
Date: Mon, 7 Jul 2008 23:16:40 -0300
Subject: [llvm-commits] [llvm] [PATCH] fpround libcall
In-Reply-To: <6AD89224-A6DA-439A-A6A6-0771952055F4@apple.com>
References: <275e64e40807071708x787b6dc8oaf04a71e3c582f2f@mail.gmail.com>
	<D505F0E4-C5C6-4058-B21D-6D5E1D8E5EE5@apple.com>
	<6AD89224-A6DA-439A-A6A6-0771952055F4@apple.com>
Message-ID: <275e64e40807071916p68e3e977w582d430960a6aecd@mail.gmail.com>

On Mon, Jul 7, 2008 at 10:22 PM, Evan Cheng <evan.cheng at apple.com> wrote:
> Also, it might be cleaner to just call ExpandOp. I'd hate to have 2
> places that generate the same libcall.

calling ExpandOp directly gives me an assert
getTypeAction(VT) == Expand && "Not an expanded type!"
since f32 is supported on the target!
That's why I issued directly!

-- 
Bruno Cardoso Lopes
http://www.brunocardoso.cc
"When faced with untenable alternatives, you
 should consider your imperative."


From echristo at apple.com  Mon Jul  7 22:10:29 2008
From: echristo at apple.com (Eric Christopher)
Date: Mon, 7 Jul 2008 20:10:29 -0700
Subject: [llvm-commits] [llvm] r53146 - in /llvm/trunk/lib/Target/Mips:
	Mips.td MipsAsmPrinter.cpp MipsCallingConv.td
	MipsISelDAGToDAG.cpp MipsISelLowering.cpp MipsISelLowering.h
	MipsInstrFPU.td MipsInstrFormats.td MipsInstrInfo.cpp
	MipsInstrInfo.h MipsInstrInfo.td MipsMachineFunction.h
	MipsRegisterInfo.cpp MipsRegisterInfo.td MipsSubtarget.cpp
	MipsSubtarget.h MipsTargetMachine.cpp
In-Reply-To: <200807051905.m65J5N9K001409@zion.cs.uiuc.edu>
References: <200807051905.m65J5N9K001409@zion.cs.uiuc.edu>
Message-ID: <F02FB462-FB0A-4694-AF2A-E9D429588606@apple.com>

Couple of questions:

+  if (!Subtarget->isAllegrex()) {
+    setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8, Expand);
+    setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand);
+  }

What's Allegrex specific here... Aaah. From looking later it looks  
like SEH and SEB. A suggestion would be to have Subtarget- 
 >hasSEBandSEH or something. Other targets have these as well.

+// Float Point Instructions

"Floating"

+    Mips1, Mips2, Mips3, Mips4, Mips32, Mips32r2

and Mips64, Mips64r2 :)

+  bool hasAllegrexVFPU() const { return HasAllegrexVFPU; };
+  bool isAllegrex() const { return IsAllegrex; };

For these it's probably best to return depending on CPU feature not  
necessarily cpu type. There's a lot of commonality between mips chips.

Otherwise it looked good from what I can tell. Great job!

-eric


From nicholas at mxc.ca  Tue Jul  8 00:05:55 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Tue, 08 Jul 2008 05:05:55 -0000
Subject: [llvm-commits] [llvm] r53217 - in /llvm/trunk:
 include/llvm/Analysis/ScalarEvolutionExpander.h
 lib/Analysis/ScalarEvolutionExpander.cpp
Message-ID: <200807080505.m6855vUe027785@zion.cs.uiuc.edu>

Author: nicholas
Date: Tue Jul  8 00:05:37 2008
New Revision: 53217

URL: http://llvm.org/viewvc/llvm-project?rev=53217&view=rev
Log:
Expand SCEVUDiv of power of 2 to a lshr instruction.

Modified:
    llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h
    llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp

Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h?rev=53217&r1=53216&r2=53217&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h (original)
+++ llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h Tue Jul  8 00:05:37 2008
@@ -102,11 +102,7 @@
 
     Value *visitMulExpr(SCEVMulExpr *S);
 
-    Value *visitUDivExpr(SCEVUDivExpr *S) {
-      Value *LHS = expand(S->getLHS());
-      Value *RHS = expand(S->getRHS());
-      return InsertBinop(Instruction::UDiv, LHS, RHS, InsertPt);
-    }
+    Value *visitUDivExpr(SCEVUDivExpr *S);
 
     Value *visitAddRecExpr(SCEVAddRecExpr *S);
 

Modified: llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp?rev=53217&r1=53216&r2=53217&view=diff

==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp Tue Jul  8 00:05:37 2008
@@ -129,6 +129,20 @@
   return V;
 }
 
+Value *SCEVExpander::visitUDivExpr(SCEVUDivExpr *S) {
+  Value *LHS = expand(S->getLHS());
+  if (SCEVConstant *SC = dyn_cast<SCEVConstant>(S->getRHS())) {
+    const APInt &RHS = SC->getValue()->getValue();
+    if (RHS.isPowerOf2())
+      return InsertBinop(Instruction::LShr, LHS,
+                         ConstantInt::get(S->getType(), RHS.logBase2()),
+                         InsertPt);
+  }
+
+  Value *RHS = expand(S->getRHS());
+  return InsertBinop(Instruction::UDiv, LHS, RHS, InsertPt);
+}
+
 Value *SCEVExpander::visitAddRecExpr(SCEVAddRecExpr *S) {
   const Type *Ty = S->getType();
   const Loop *L = S->getLoop();




From sabre at nondot.org  Tue Jul  8 00:12:49 2008
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 08 Jul 2008 05:12:49 -0000
Subject: [llvm-commits] [llvm] r53218 - /llvm/trunk/docs/CodingStandards.html
Message-ID: <200807080512.m685Cq8F027989@zion.cs.uiuc.edu>

Author: lattner
Date: Tue Jul  8 00:12:37 2008
New Revision: 53218

URL: http://llvm.org/viewvc/llvm-project?rev=53218&view=rev
Log:
clarify :)

Modified:
    llvm/trunk/docs/CodingStandards.html

Modified: llvm/trunk/docs/CodingStandards.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodingStandards.html?rev=53218&r1=53217&r2=53218&view=diff

==============================================================================
--- llvm/trunk/docs/CodingStandards.html (original)
+++ llvm/trunk/docs/CodingStandards.html Tue Jul  8 00:12:37 2008
@@ -262,6 +262,18 @@
 like to print out code and look at your code in an xterm without resizing
 it.</p>
 
+<p>The longer answer is that there must be some limit to the width of the code
+in order to reasonably allow developers to have multiple files side-by-side in
+windows on a modest display.  If you are going to pick a width limit, it is
+somewhat arbitrary but you might as well pick something standard.  Going with
+90 columns (for example) instead of 80 columns wouldn't add any significant 
+value and would be detrimental to printing out code.  Also many other projects
+have standardized on 80 columns, so some people have already configured their
+editors for it (vs something else, like 90 columns).</p>
+
+<p>This is one of many contentious issues in coding standards, but is not up
+for debate.</p>
+
 </div>
 
 <!-- _______________________________________________________________________ -->




From sabre at nondot.org  Tue Jul  8 00:46:40 2008
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 08 Jul 2008 05:46:40 -0000
Subject: [llvm-commits] [llvm] r53220 - in /llvm/trunk:
 lib/VMCore/ConstantFold.cpp
 test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
Message-ID: <200807080546.m685kfGI028937@zion.cs.uiuc.edu>

Author: lattner
Date: Tue Jul  8 00:46:34 2008
New Revision: 53220

URL: http://llvm.org/viewvc/llvm-project?rev=53220&view=rev
Log:
Fix three bugs:

1) evaluate [v]fcmp true/false with undefs to true or false instead
   of undef.
2) fix vector comparisons with undef to return a vector result instead 
   of i1
3) fix vector comparisons with evaluatable results to return vector
   true/false instead of i1 true/false (PR2529)

Added:
    llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
Modified:
    llvm/trunk/lib/VMCore/ConstantFold.cpp

Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantFold.cpp?rev=53220&r1=53219&r2=53220&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/ConstantFold.cpp (original)
+++ llvm/trunk/lib/VMCore/ConstantFold.cpp Tue Jul  8 00:46:34 2008
@@ -1238,10 +1238,30 @@
 Constant *llvm::ConstantFoldCompareInstruction(unsigned short pred, 
                                                const Constant *C1, 
                                                const Constant *C2) {
-
+  // Fold FCMP_FALSE/FCMP_TRUE unconditionally.
+  if (pred == FCmpInst::FCMP_FALSE) {
+    if (const VectorType *VT = dyn_cast<VectorType>(C1->getType()))
+      return Constant::getNullValue(VectorType::getInteger(VT));
+    else
+      return ConstantInt::getFalse();
+  }
+  
+  if (pred == FCmpInst::FCMP_TRUE) {
+    if (const VectorType *VT = dyn_cast<VectorType>(C1->getType()))
+      return Constant::getAllOnesValue(VectorType::getInteger(VT));
+    else
+      return ConstantInt::getTrue();
+  }
+      
   // Handle some degenerate cases first
-  if (isa<UndefValue>(C1) || isa<UndefValue>(C2))
+  if (isa<UndefValue>(C1) || isa<UndefValue>(C2)) {
+    // vicmp/vfcmp -> [vector] undef
+    if (const VectorType *VTy = dyn_cast<VectorType>(C1->getType()))
+      return UndefValue::get(VectorType::getInteger(VTy));
+    
+    // icmp/fcmp -> i1 undef
     return UndefValue::get(Type::Int1Ty);
+  }
 
   // No compile-time operations on this type yet.
   if (C1->getType() == Type::PPC_FP128Ty)
@@ -1355,6 +1375,7 @@
   }
 
   if (C1->getType()->isFloatingPoint()) {
+    int Result = -1;
     switch (evaluateFCmpRelation(C1, C2)) {
     default: assert(0 && "Unknown relation!");
     case FCmpInst::FCMP_UNO:
@@ -1370,44 +1391,57 @@
     case FCmpInst::BAD_FCMP_PREDICATE:
       break; // Couldn't determine anything about these constants.
     case FCmpInst::FCMP_OEQ: // We know that C1 == C2
-      return ConstantInt::get(Type::Int1Ty,
-          pred == FCmpInst::FCMP_UEQ || pred == FCmpInst::FCMP_OEQ ||
-          pred == FCmpInst::FCMP_ULE || pred == FCmpInst::FCMP_OLE ||
-          pred == FCmpInst::FCMP_UGE || pred == FCmpInst::FCMP_OGE);
+      Result = (pred == FCmpInst::FCMP_UEQ || pred == FCmpInst::FCMP_OEQ ||
+                pred == FCmpInst::FCMP_ULE || pred == FCmpInst::FCMP_OLE ||
+                pred == FCmpInst::FCMP_UGE || pred == FCmpInst::FCMP_OGE);
+      break;
     case FCmpInst::FCMP_OLT: // We know that C1 < C2
-      return ConstantInt::get(Type::Int1Ty,
-          pred == FCmpInst::FCMP_UNE || pred == FCmpInst::FCMP_ONE ||
-          pred == FCmpInst::FCMP_ULT || pred == FCmpInst::FCMP_OLT ||
-          pred == FCmpInst::FCMP_ULE || pred == FCmpInst::FCMP_OLE);
+      Result = (pred == FCmpInst::FCMP_UNE || pred == FCmpInst::FCMP_ONE ||
+                pred == FCmpInst::FCMP_ULT || pred == FCmpInst::FCMP_OLT ||
+                pred == FCmpInst::FCMP_ULE || pred == FCmpInst::FCMP_OLE);
+      break;
     case FCmpInst::FCMP_OGT: // We know that C1 > C2
-      return ConstantInt::get(Type::Int1Ty,
-          pred == FCmpInst::FCMP_UNE || pred == FCmpInst::FCMP_ONE ||
-          pred == FCmpInst::FCMP_UGT || pred == FCmpInst::FCMP_OGT ||
-          pred == FCmpInst::FCMP_UGE || pred == FCmpInst::FCMP_OGE);
+      Result = (pred == FCmpInst::FCMP_UNE || pred == FCmpInst::FCMP_ONE ||
+                pred == FCmpInst::FCMP_UGT || pred == FCmpInst::FCMP_OGT ||
+                pred == FCmpInst::FCMP_UGE || pred == FCmpInst::FCMP_OGE);
+      break;
     case FCmpInst::FCMP_OLE: // We know that C1 <= C2
       // We can only partially decide this relation.
       if (pred == FCmpInst::FCMP_UGT || pred == FCmpInst::FCMP_OGT) 
-        return ConstantInt::getFalse();
-      if (pred == FCmpInst::FCMP_ULT || pred == FCmpInst::FCMP_OLT) 
-        return ConstantInt::getTrue();
+        Result = 0;
+      else if (pred == FCmpInst::FCMP_ULT || pred == FCmpInst::FCMP_OLT) 
+        Result = 1;
       break;
     case FCmpInst::FCMP_OGE: // We known that C1 >= C2
       // We can only partially decide this relation.
       if (pred == FCmpInst::FCMP_ULT || pred == FCmpInst::FCMP_OLT) 
-        return ConstantInt::getFalse();
-      if (pred == FCmpInst::FCMP_UGT || pred == FCmpInst::FCMP_OGT) 
-        return ConstantInt::getTrue();
+        Result = 0;
+      else if (pred == FCmpInst::FCMP_UGT || pred == FCmpInst::FCMP_OGT) 
+        Result = 1;
       break;
     case ICmpInst::ICMP_NE: // We know that C1 != C2
       // We can only partially decide this relation.
       if (pred == FCmpInst::FCMP_OEQ || pred == FCmpInst::FCMP_UEQ) 
-        return ConstantInt::getFalse();
-      if (pred == FCmpInst::FCMP_ONE || pred == FCmpInst::FCMP_UNE) 
-        return ConstantInt::getTrue();
+        Result = 0;
+      else if (pred == FCmpInst::FCMP_ONE || pred == FCmpInst::FCMP_UNE) 
+        Result = 1;
       break;
     }
+    
+    // If we evaluated the result, return it now.
+    if (Result != -1) {
+      if (const VectorType *VT = dyn_cast<VectorType>(C1->getType())) {
+        if (Result == 0)
+          return Constant::getNullValue(VectorType::getInteger(VT));
+        else
+          return Constant::getAllOnesValue(VectorType::getInteger(VT));
+      }
+      return ConstantInt::get(Type::Int1Ty, Result);
+    }
+    
   } else {
     // Evaluate the relation between the two constants, per the predicate.
+    int Result = -1;  // -1 = unknown, 0 = known false, 1 = known true.
     switch (evaluateICmpRelation(C1, C2, CmpInst::isSigned(pred))) {
     default: assert(0 && "Unknown relational!");
     case ICmpInst::BAD_ICMP_PREDICATE:
@@ -1415,69 +1449,80 @@
     case ICmpInst::ICMP_EQ:   // We know the constants are equal!
       // If we know the constants are equal, we can decide the result of this
       // computation precisely.
-      return ConstantInt::get(Type::Int1Ty, 
-                              pred == ICmpInst::ICMP_EQ  ||
-                              pred == ICmpInst::ICMP_ULE ||
-                              pred == ICmpInst::ICMP_SLE ||
-                              pred == ICmpInst::ICMP_UGE ||
-                              pred == ICmpInst::ICMP_SGE);
+      Result = (pred == ICmpInst::ICMP_EQ  ||
+                pred == ICmpInst::ICMP_ULE ||
+                pred == ICmpInst::ICMP_SLE ||
+                pred == ICmpInst::ICMP_UGE ||
+                pred == ICmpInst::ICMP_SGE);
+      break;
     case ICmpInst::ICMP_ULT:
       // If we know that C1 < C2, we can decide the result of this computation
       // precisely.
-      return ConstantInt::get(Type::Int1Ty, 
-                              pred == ICmpInst::ICMP_ULT ||
-                              pred == ICmpInst::ICMP_NE  ||
-                              pred == ICmpInst::ICMP_ULE);
+      Result = (pred == ICmpInst::ICMP_ULT ||
+                pred == ICmpInst::ICMP_NE  ||
+                pred == ICmpInst::ICMP_ULE);
+      break;
     case ICmpInst::ICMP_SLT:
       // If we know that C1 < C2, we can decide the result of this computation
       // precisely.
-      return ConstantInt::get(Type::Int1Ty,
-                              pred == ICmpInst::ICMP_SLT ||
-                              pred == ICmpInst::ICMP_NE  ||
-                              pred == ICmpInst::ICMP_SLE);
+      Result = (pred == ICmpInst::ICMP_SLT ||
+                pred == ICmpInst::ICMP_NE  ||
+                pred == ICmpInst::ICMP_SLE);
+      break;
     case ICmpInst::ICMP_UGT:
       // If we know that C1 > C2, we can decide the result of this computation
       // precisely.
-      return ConstantInt::get(Type::Int1Ty, 
-                              pred == ICmpInst::ICMP_UGT ||
-                              pred == ICmpInst::ICMP_NE  ||
-                              pred == ICmpInst::ICMP_UGE);
+      Result = (pred == ICmpInst::ICMP_UGT ||
+                pred == ICmpInst::ICMP_NE  ||
+                pred == ICmpInst::ICMP_UGE);
+      break;
     case ICmpInst::ICMP_SGT:
       // If we know that C1 > C2, we can decide the result of this computation
       // precisely.
-      return ConstantInt::get(Type::Int1Ty, 
-                              pred == ICmpInst::ICMP_SGT ||
-                              pred == ICmpInst::ICMP_NE  ||
-                              pred == ICmpInst::ICMP_SGE);
+      Result = (pred == ICmpInst::ICMP_SGT ||
+                pred == ICmpInst::ICMP_NE  ||
+                pred == ICmpInst::ICMP_SGE);
+      break;
     case ICmpInst::ICMP_ULE:
       // If we know that C1 <= C2, we can only partially decide this relation.
-      if (pred == ICmpInst::ICMP_UGT) return ConstantInt::getFalse();
-      if (pred == ICmpInst::ICMP_ULT) return ConstantInt::getTrue();
+      if (pred == ICmpInst::ICMP_UGT) Result = 0;
+      if (pred == ICmpInst::ICMP_ULT) Result = 1;
       break;
     case ICmpInst::ICMP_SLE:
       // If we know that C1 <= C2, we can only partially decide this relation.
-      if (pred == ICmpInst::ICMP_SGT) return ConstantInt::getFalse();
-      if (pred == ICmpInst::ICMP_SLT) return ConstantInt::getTrue();
+      if (pred == ICmpInst::ICMP_SGT) Result = 0;
+      if (pred == ICmpInst::ICMP_SLT) Result = 1;
       break;
 
     case ICmpInst::ICMP_UGE:
       // If we know that C1 >= C2, we can only partially decide this relation.
-      if (pred == ICmpInst::ICMP_ULT) return ConstantInt::getFalse();
-      if (pred == ICmpInst::ICMP_UGT) return ConstantInt::getTrue();
+      if (pred == ICmpInst::ICMP_ULT) Result = 0;
+      if (pred == ICmpInst::ICMP_UGT) Result = 1;
       break;
     case ICmpInst::ICMP_SGE:
       // If we know that C1 >= C2, we can only partially decide this relation.
-      if (pred == ICmpInst::ICMP_SLT) return ConstantInt::getFalse();
-      if (pred == ICmpInst::ICMP_SGT) return ConstantInt::getTrue();
+      if (pred == ICmpInst::ICMP_SLT) Result = 0;
+      if (pred == ICmpInst::ICMP_SGT) Result = 1;
       break;
 
     case ICmpInst::ICMP_NE:
       // If we know that C1 != C2, we can only partially decide this relation.
-      if (pred == ICmpInst::ICMP_EQ) return ConstantInt::getFalse();
-      if (pred == ICmpInst::ICMP_NE) return ConstantInt::getTrue();
+      if (pred == ICmpInst::ICMP_EQ) Result = 0;
+      if (pred == ICmpInst::ICMP_NE) Result = 1;
       break;
     }
-
+    
+    // If we evaluated the result, return it now.
+    if (Result != -1) {
+      if (const VectorType *VT = dyn_cast<VectorType>(C1->getType())) {
+        if (Result == 0)
+          return Constant::getNullValue(VT);
+        else
+          return Constant::getAllOnesValue(VT);
+      }
+      return ConstantInt::get(Type::Int1Ty, Result);
+    }
+    
     if (!isa<ConstantExpr>(C1) && isa<ConstantExpr>(C2)) {
       // If C2 is a constant expr and C1 isn't, flop them around and fold the
       // other way if possible.

Added: llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll?rev=53220&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll (added)
+++ llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll Tue Jul  8 00:46:34 2008
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | opt -constprop | llvm-dis
+; PR2529
+define <4 x i32> @test1(i32 %argc, i8** %argv) {
+entry:  
+        %foo = vicmp slt <4 x i32> undef, <i32 14, i32 undef, i32 undef, i32 undef>
+        ret <4 x i32> %foo
+}
+
+define <4 x i32> @main(i32 %argc, i8** %argv) {
+entry:  
+        %foo = vicmp slt <4 x i32> <i32 undef, i32 undef, i32 undef, i32
+undef>, <i32 undef, i32 undef, i32 undef, i32 undef>
+        ret <4 x i32> %foo
+}




From evan.cheng at apple.com  Tue Jul  8 00:49:14 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 7 Jul 2008 22:49:14 -0700
Subject: [llvm-commits] [llvm] [PATCH] fpround libcall
In-Reply-To: <275e64e40807071839r7b9b54cfjcc9ce4be3c16c3b5@mail.gmail.com>
References: <275e64e40807071708x787b6dc8oaf04a71e3c582f2f@mail.gmail.com>
	<D505F0E4-C5C6-4058-B21D-6D5E1D8E5EE5@apple.com>
	<6AD89224-A6DA-439A-A6A6-0771952055F4@apple.com>
	<275e64e40807071839r7b9b54cfjcc9ce4be3c16c3b5@mail.gmail.com>
Message-ID: <3CD8CEAE-456D-4055-B931-EF71C85596AA@apple.com>


On Jul 7, 2008, at 6:39 PM, Bruno Cardoso Lopes wrote:

> Hi Evan,
> I'm not used to run x86 tests, what would be a good "complete round"  
> test?

Please run at least all of MultiSource. All of the Application and  
Benchmark tests should pass. If you have license of SPEC, then please  
also run SPEC 2000.

Evan

>
>
> On Mon, Jul 7, 2008 at 10:22 PM, Evan Cheng <evan.cheng at apple.com>  
> wrote:
>> Also, it might be cleaner to just call ExpandOp. I'd hate to have 2
>> places that generate the same libcall.
>>
>> Evan
>>
>> On Jul 7, 2008, at 6:16 PM, Evan Cheng wrote:
>>
>>> +      } else if (SrcVT == MVT::f64 && DstVT == MVT::f32 &&
>>>
>>> The check for DstVT == MVT::f32 is unnecessary. I would turn it into
>>> an assertion instead.
>>>
>>> +                 getTypeAction(SrcVT) == Expand) {
>>> +        SDOperand Lo;
>>> +        Result = ExpandLibCall(RTLIB::FPROUND_F64_F32, Node, false,
>>> Lo);
>>> +        break;
>>>
>>> I think the patch is alright. But I am not completely comfortable to
>>> just say yes. Can you do a complete round of testing on x86?
>>>
>>> Thanks,
>>>
>>> Evan
>>>
>>> On Jul 7, 2008, at 5:08 PM, Bruno Cardoso Lopes wrote:
>>>
>>>> Hi,
>>>>
>>>> This patch address the problem I have with fpround on Mips as
>>>> discussed at llvmdev. I think this should have been implemented in
>>>> SoftenFloatOps
>>>> like suggested by Duncan. The problem is that this methods are only
>>>> called by
>>>> "DAG.LegalizeTypes()", which is currently commented in
>>>> SelectionDAGISel::CodeGenAndEmitDAG. I'll implement there too and
>>>> see what
>>>> happens, but what do you think about this for now?
>>>> Btw, the only target that does setConvertAction from f64 -> f32 to
>>>> Expand is X86, but
>>>> in the same code block it declares a f64 Register Class, so i think
>>>> the patch won't
>>>> break x86 behavior.
>>>>
>>>> Thanks,
>>>>
>>>> --
>>>> Bruno Cardoso Lopes
>>>> http://www.brunocardoso.cc
>>>> "When faced with untenable alternatives, you
>>>> should consider your imperative."
>>>> <
>>>> LegalizeDAG 
>>>> .cpp.patch>_______________________________________________
>>>> llvm-commits mailing list
>>>> llvm-commits at cs.uiuc.edu
>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>
>>> _______________________________________________
>>> llvm-commits mailing list
>>> llvm-commits at cs.uiuc.edu
>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>
>
>
> -- 
> Bruno Cardoso Lopes
> http://www.brunocardoso.cc
> "When faced with untenable alternatives, you
> should consider your imperative."
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From evan.cheng at apple.com  Tue Jul  8 00:49:32 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 7 Jul 2008 22:49:32 -0700
Subject: [llvm-commits] [llvm] [PATCH] fpround libcall
In-Reply-To: <275e64e40807071916p68e3e977w582d430960a6aecd@mail.gmail.com>
References: <275e64e40807071708x787b6dc8oaf04a71e3c582f2f@mail.gmail.com>
	<D505F0E4-C5C6-4058-B21D-6D5E1D8E5EE5@apple.com>
	<6AD89224-A6DA-439A-A6A6-0771952055F4@apple.com>
	<275e64e40807071916p68e3e977w582d430960a6aecd@mail.gmail.com>
Message-ID: <69E6660A-8ABF-4EFB-9448-806AF6C6D2B6@apple.com>

Ok, I see.

Evan

On Jul 7, 2008, at 7:16 PM, Bruno Cardoso Lopes wrote:

> On Mon, Jul 7, 2008 at 10:22 PM, Evan Cheng <evan.cheng at apple.com>  
> wrote:
>> Also, it might be cleaner to just call ExpandOp. I'd hate to have 2
>> places that generate the same libcall.
>
> calling ExpandOp directly gives me an assert
> getTypeAction(VT) == Expand && "Not an expanded type!"
> since f32 is supported on the target!
> That's why I issued directly!
>
> -- 
> Bruno Cardoso Lopes
> http://www.brunocardoso.cc
> "When faced with untenable alternatives, you
> should consider your imperative."
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From isanbard at gmail.com  Tue Jul  8 00:58:56 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 7 Jul 2008 22:58:56 -0700
Subject: [llvm-commits] [llvm] r53220 - in /llvm/trunk:
	lib/VMCore/ConstantFold.cpp
	test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
In-Reply-To: <200807080546.m685kfGI028937@zion.cs.uiuc.edu>
References: <200807080546.m685kfGI028937@zion.cs.uiuc.edu>
Message-ID: <C3AD34CC-5D5F-4FBD-86B4-7DCF27B7897D@gmail.com>

On Jul 7, 2008, at 10:46 PM, Chris Lattner wrote:

> Author: lattner
> Date: Tue Jul  8 00:46:34 2008
> New Revision: 53220
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53220&view=rev
> Log:
> Fix three bugs:
>
> 1) evaluate [v]fcmp true/false with undefs to true or false instead
>   of undef.
> 2) fix vector comparisons with undef to return a vector result instead
>   of i1
> 3) fix vector comparisons with evaluatable results to return vector
>   true/false instead of i1 true/false (PR2529)
>
[snip]
> Added: llvm/trunk/test/Transforms/ConstProp/2008-07-07- 
> VectorCompare.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll?rev=53220&view=auto
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll  
> (added)
> +++ llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll  
> Tue Jul  8 00:46:34 2008
> @@ -0,0 +1,14 @@
> +; RUN: llvm-as < %s | opt -constprop | llvm-dis

Should you be grepping for something here? :-)

-bw

>
> +; PR2529
> +define <4 x i32> @test1(i32 %argc, i8** %argv) {
> +entry:
> +        %foo = vicmp slt <4 x i32> undef, <i32 14, i32 undef, i32  
> undef, i32 undef>
> +        ret <4 x i32> %foo
> +}
> +
> +define <4 x i32> @main(i32 %argc, i8** %argv) {
> +entry:
> +        %foo = vicmp slt <4 x i32> <i32 undef, i32 undef, i32  
> undef, i32
> +undef>, <i32 undef, i32 undef, i32 undef, i32 undef>
> +        ret <4 x i32> %foo
> +}
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From clattner at apple.com  Tue Jul  8 01:15:01 2008
From: clattner at apple.com (Chris Lattner)
Date: Mon, 7 Jul 2008 23:15:01 -0700
Subject: [llvm-commits] [llvm] r53215 - in /llvm/trunk:
	include/llvm/CodeGen/AsmPrinter.h lib/CodeGen/AsmPrinter.cpp
	lib/Target/X86/X86ATTAsmPrinter.cpp
	lib/Target/X86/X86ATTAsmPrinter.h
In-Reply-To: <200807080056.m680u0Qb020038@zion.cs.uiuc.edu>
References: <200807080056.m680u0Qb020038@zion.cs.uiuc.edu>
Message-ID: <F8CEEA54-5A35-43CB-83D7-A3A004D26802@apple.com>

On Jul 7, 2008, at 5:55 PM, Evan Cheng wrote:
> URL: http://llvm.org/viewvc/llvm-project?rev=53215&view=rev
> Log:
> Avoid unnecessary string construction during asm printing.

nice

> @@ -351,6 +351,7 @@
>     /// printSuffixedName - This prints a name with preceding
>     /// getPrivateGlobalPrefix and the specified suffix, handling  
> quoted names
>     /// correctly.
> +    void printSuffixedName(const char *Name, const char* Suffix);
>     void printSuffixedName(std::string &Name, const char* Suffix);

Can 'name' in the second one be a const string?

-Chris



From clattner at apple.com  Tue Jul  8 01:16:59 2008
From: clattner at apple.com (Chris Lattner)
Date: Mon, 7 Jul 2008 23:16:59 -0700
Subject: [llvm-commits] [llvm] r53146 - in /llvm/trunk/lib/Target/Mips:
	Mips.td MipsAsmPrinter.cpp
	MipsCallingConv.td	MipsISelDAGToDAG.cpp MipsISelLowering.cpp
	MipsISelLowering.h	MipsInstrFPU.td MipsInstrFormats.td
	MipsInstrInfo.cpp	MipsInstrInfo.h MipsInstrInfo.td
	MipsMachineFunction.h MipsRegisterInfo.cpp
	MipsRegisterInfo.td MipsSubtarget.cpp	MipsSubtarget.h
	MipsTargetMachine.cpp
In-Reply-To: <F02FB462-FB0A-4694-AF2A-E9D429588606@apple.com>
References: <200807051905.m65J5N9K001409@zion.cs.uiuc.edu>
	<F02FB462-FB0A-4694-AF2A-E9D429588606@apple.com>
Message-ID: <E187A016-F7BC-4E80-80E2-4C43A13515F9@apple.com>


On Jul 7, 2008, at 8:10 PM, Eric Christopher wrote:

> Couple of questions:
>
> +  if (!Subtarget->isAllegrex()) {
> +    setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8, Expand);
> +    setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand);
> +  }
>
> +  bool hasAllegrexVFPU() const { return HasAllegrexVFPU; };
> +  bool isAllegrex() const { return IsAllegrex; };
>
> For these it's probably best to return depending on CPU feature not
> necessarily cpu type. There's a lot of commonality between mips chips.

Great point, it would be best to define these as a subtarget feature  
and then have the cpu table indicate which ones support the feature  
directly.  For an example, please grep for 'FeatureFSqrt' in PPC.td  
for example.

-Chris


From clattner at apple.com  Tue Jul  8 01:17:34 2008
From: clattner at apple.com (Chris Lattner)
Date: Mon, 7 Jul 2008 23:17:34 -0700
Subject: [llvm-commits] [llvm] r53220 - in /llvm/trunk:
	lib/VMCore/ConstantFold.cpp
	test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
In-Reply-To: <C3AD34CC-5D5F-4FBD-86B4-7DCF27B7897D@gmail.com>
References: <200807080546.m685kfGI028937@zion.cs.uiuc.edu>
	<C3AD34CC-5D5F-4FBD-86B4-7DCF27B7897D@gmail.com>
Message-ID: <F4FC1309-4395-4498-B812-DFA6F70A2B7E@apple.com>

On Jul 7, 2008, at 10:58 PM, Bill Wendling wrote:
>> +++ llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
>> Tue Jul  8 00:46:34 2008
>> @@ -0,0 +1,14 @@
>> +; RUN: llvm-as < %s | opt -constprop | llvm-dis
>
> Should you be grepping for something here? :-)

it is just verifying that opt doesn't crash.

-Chris


From baldrick at free.fr  Tue Jul  8 02:25:33 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 8 Jul 2008 09:25:33 +0200
Subject: [llvm-commits] [llvm] r53200 - in /llvm/trunk:
	include/llvm/CodeGen/MachineMemOperand.h
	lib/CodeGen/MachineInstr.cpp
In-Reply-To: <200807072032.m67KW66b009966@zion.cs.uiuc.edu>
References: <200807072032.m67KW66b009966@zion.cs.uiuc.edu>
Message-ID: <200807080925.34321.baldrick@free.fr>

Hi Dan,

> +MachineMemOperand::MachineMemOperand(const Value *v, unsigned int f,
> +                                     int64_t o, uint64_t s, unsigned int a)
> +  : Offset(o), Size(s), V(v),
> +    Flags((f & 7) | ((Log2_32(a) + 1) << 3)) {
> +}

if someone (wrongly) passes an alignment of 0, what will happen?
How about adding an assertion here to catch this case.

Ciao,

Duncan.


From baldrick at free.fr  Tue Jul  8 02:28:52 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 8 Jul 2008 09:28:52 +0200
Subject: [llvm-commits] [llvm] r53212 - in /llvm/trunk:
	include/llvm/CodeGen/ lib/CodeGen/ lib/CodeGen/SelectionDAG/
	lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/
	lib/Target/IA64/ lib/Target/Mips/ lib/Target/PIC16/
	lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/
In-Reply-To: <200807072314.m67NER4K016634@zion.cs.uiuc.edu>
References: <200807072314.m67NER4K016634@zion.cs.uiuc.edu>
Message-ID: <200807080928.53021.baldrick@free.fr>

Hi Dan,

> This drastically reduces the number of calls to malloc/free made
> during the "Emit" phase of scheduling, as well as later phases
> in CodeGen. Combined with other changes, this speeds up the
> "instruction selection" phase of CodeGen by 10% in some cases.

which platform are you measuring this speedup on?  Darwin?

Thanks,

Duncan.


From isanbard at gmail.com  Tue Jul  8 02:30:24 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 8 Jul 2008 00:30:24 -0700
Subject: [llvm-commits] [llvm] r53220 - in /llvm/trunk:
	lib/VMCore/ConstantFold.cpp
	test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
In-Reply-To: <F4FC1309-4395-4498-B812-DFA6F70A2B7E@apple.com>
References: <200807080546.m685kfGI028937@zion.cs.uiuc.edu>
	<C3AD34CC-5D5F-4FBD-86B4-7DCF27B7897D@gmail.com>
	<F4FC1309-4395-4498-B812-DFA6F70A2B7E@apple.com>
Message-ID: <3519E66A-552A-4038-85C6-5FB52E806C8A@gmail.com>

On Jul 7, 2008, at 11:17 PM, Chris Lattner wrote:

> On Jul 7, 2008, at 10:58 PM, Bill Wendling wrote:
>>> +++ llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
>>> Tue Jul  8 00:46:34 2008
>>> @@ -0,0 +1,14 @@
>>> +; RUN: llvm-as < %s | opt -constprop | llvm-dis
>>
>> Should you be grepping for something here? :-)
>
> it is just verifying that opt doesn't crash.
>
Ah! Gotcha.

-bw



From baldrick at free.fr  Tue Jul  8 02:35:45 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 8 Jul 2008 09:35:45 +0200
Subject: [llvm-commits] [llvm] r53220 - in /llvm/trunk:
	lib/VMCore/ConstantFold.cpp
	test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
In-Reply-To: <200807080546.m685kfGI028937@zion.cs.uiuc.edu>
References: <200807080546.m685kfGI028937@zion.cs.uiuc.edu>
Message-ID: <200807080935.45601.baldrick@free.fr>

Hi Chris,

> +    int Result = -1;

how about documenting the meaning of Result, as you
do later on:

> +    int Result = -1;  // -1 = unknown, 0 = known false, 1 = known true.

Ciao,

Duncan.


From nicholas at mxc.ca  Tue Jul  8 02:35:46 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Tue, 08 Jul 2008 00:35:46 -0700
Subject: [llvm-commits] [llvm] r53220 - in
 /llvm/trunk:	lib/VMCore/ConstantFold.cpp
 test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
In-Reply-To: <F4FC1309-4395-4498-B812-DFA6F70A2B7E@apple.com>
References: <200807080546.m685kfGI028937@zion.cs.uiuc.edu>	<C3AD34CC-5D5F-4FBD-86B4-7DCF27B7897D@gmail.com>
	<F4FC1309-4395-4498-B812-DFA6F70A2B7E@apple.com>
Message-ID: <487318D2.4090208@mxc.ca>

Chris Lattner wrote:
> On Jul 7, 2008, at 10:58 PM, Bill Wendling wrote:
>>> +++ llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
>>> Tue Jul  8 00:46:34 2008
>>> @@ -0,0 +1,14 @@
>>> +; RUN: llvm-as < %s | opt -constprop | llvm-dis
>> Should you be grepping for something here? :-)
> 
> it is just verifying that opt doesn't crash.

Then how about opt -constprop -disable-output and removing a run of 
llvm-dis?

Nick


From baldrick at free.fr  Tue Jul  8 03:38:46 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 08 Jul 2008 08:38:46 -0000
Subject: [llvm-commits] [llvm] r53223 - in /llvm/trunk:
 include/llvm/Instructions.h include/llvm/Support/CallSite.h
 lib/VMCore/Instructions.cpp
Message-ID: <200807080838.m688ckAM012713@zion.cs.uiuc.edu>

Author: baldrick
Date: Tue Jul  8 03:38:44 2008
New Revision: 53223

URL: http://llvm.org/viewvc/llvm-project?rev=53223&view=rev
Log:
Add some convenience methods for manipulating
call attributes.

Modified:
    llvm/trunk/include/llvm/Instructions.h
    llvm/trunk/include/llvm/Support/CallSite.h
    llvm/trunk/lib/VMCore/Instructions.cpp

Modified: llvm/trunk/include/llvm/Instructions.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=53223&r1=53222&r2=53223&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Instructions.h (original)
+++ llvm/trunk/include/llvm/Instructions.h Tue Jul  8 03:38:44 2008
@@ -1065,6 +1065,9 @@
   /// addParamAttr - adds the attribute to the list of attributes.
   void addParamAttr(unsigned i, ParameterAttributes attr);
 
+  /// removeParamAttr - removes the attribute from the list of attributes.
+  void removeParamAttr(unsigned i, ParameterAttributes attr);
+
   /// @brief Determine whether the call or the callee has the given attribute.
   bool paramHasAttr(unsigned i, unsigned attr) const;
 
@@ -1077,22 +1080,37 @@
   bool doesNotAccessMemory() const {
     return paramHasAttr(0, ParamAttr::ReadNone);
   }
-  
+  void setDoesNotAccessMemory(bool doesNotAccessMemory = true) {
+    if (doesNotAccessMemory) addParamAttr(0, ParamAttr::ReadNone);
+    else removeParamAttr(0, ParamAttr::ReadNone);
+  }
+
   /// @brief Determine if the call does not access or only reads memory.
   bool onlyReadsMemory() const {
     return doesNotAccessMemory() || paramHasAttr(0, ParamAttr::ReadOnly);
   }
-  
+  void setOnlyReadsMemory(bool onlyReadsMemory = true) {
+    if (onlyReadsMemory) addParamAttr(0, ParamAttr::ReadOnly);
+    else removeParamAttr(0, ParamAttr::ReadOnly | ParamAttr::ReadNone);
+  }
+
   /// @brief Determine if the call cannot return.
   bool doesNotReturn() const {
     return paramHasAttr(0, ParamAttr::NoReturn);
   }
+  void setDoesNotReturn(bool doesNotReturn = true) {
+    if (doesNotReturn) addParamAttr(0, ParamAttr::NoReturn);
+    else removeParamAttr(0, ParamAttr::NoReturn);
+  }
 
   /// @brief Determine if the call cannot unwind.
   bool doesNotThrow() const {
     return paramHasAttr(0, ParamAttr::NoUnwind);
   }
-  void setDoesNotThrow(bool doesNotThrow = true);
+  void setDoesNotThrow(bool doesNotThrow = true) {
+    if (doesNotThrow) addParamAttr(0, ParamAttr::NoUnwind);
+    else removeParamAttr(0, ParamAttr::NoUnwind);
+  }
 
   /// @brief Determine if the call returns a structure through first 
   /// pointer argument.
@@ -2427,6 +2445,9 @@
   /// addParamAttr - adds the attribute to the list of attributes.
   void addParamAttr(unsigned i, ParameterAttributes attr);
 
+  /// removeParamAttr - removes the attribute from the list of attributes.
+  void removeParamAttr(unsigned i, ParameterAttributes attr);
+
   /// @brief Extract the alignment for a call or parameter (0=unknown).
   unsigned getParamAlignment(unsigned i) const {
     return ParamAttrs.getParamAlignment(i);
@@ -2436,22 +2457,37 @@
   bool doesNotAccessMemory() const {
     return paramHasAttr(0, ParamAttr::ReadNone);
   }
+  void setDoesNotAccessMemory(bool doesNotAccessMemory = true) {
+    if (doesNotAccessMemory) addParamAttr(0, ParamAttr::ReadNone);
+    else removeParamAttr(0, ParamAttr::ReadNone);
+  }
 
   /// @brief Determine if the call does not access or only reads memory.
   bool onlyReadsMemory() const {
     return doesNotAccessMemory() || paramHasAttr(0, ParamAttr::ReadOnly);
   }
+  void setOnlyReadsMemory(bool onlyReadsMemory = true) {
+    if (onlyReadsMemory) addParamAttr(0, ParamAttr::ReadOnly);
+    else removeParamAttr(0, ParamAttr::ReadOnly | ParamAttr::ReadNone);
+  }
 
   /// @brief Determine if the call cannot return.
   bool doesNotReturn() const {
     return paramHasAttr(0, ParamAttr::NoReturn);
   }
+  void setDoesNotReturn(bool doesNotReturn = true) {
+    if (doesNotReturn) addParamAttr(0, ParamAttr::NoReturn);
+    else removeParamAttr(0, ParamAttr::NoReturn);
+  }
 
   /// @brief Determine if the call cannot unwind.
   bool doesNotThrow() const {
     return paramHasAttr(0, ParamAttr::NoUnwind);
   }
-  void setDoesNotThrow(bool doesNotThrow = true);
+  void setDoesNotThrow(bool doesNotThrow = true) {
+    if (doesNotThrow) addParamAttr(0, ParamAttr::NoUnwind);
+    else removeParamAttr(0, ParamAttr::NoUnwind);
+  }
 
   /// @brief Determine if the call returns a structure through first 
   /// pointer argument.

Modified: llvm/trunk/include/llvm/Support/CallSite.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CallSite.h?rev=53223&r1=53222&r2=53223&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/CallSite.h (original)
+++ llvm/trunk/include/llvm/Support/CallSite.h Tue Jul  8 03:38:44 2008
@@ -75,9 +75,15 @@
 
   /// @brief Determine if the call does not access memory.
   bool doesNotAccessMemory() const;
+  void setDoesNotAccessMemory(bool doesNotAccessMemory = true);
 
   /// @brief Determine if the call does not access or only reads memory.
   bool onlyReadsMemory() const;
+  void setOnlyReadsMemory(bool onlyReadsMemory = true);
+
+  /// @brief Determine if the call cannot return.
+  bool doesNotReturn() const;
+  void setDoesNotReturn(bool doesNotReturn = true);
 
   /// @brief Determine if the call cannot unwind.
   bool doesNotThrow() const;

Modified: llvm/trunk/lib/VMCore/Instructions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=53223&r1=53222&r2=53223&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/Instructions.cpp (original)
+++ llvm/trunk/lib/VMCore/Instructions.cpp Tue Jul  8 03:38:44 2008
@@ -72,12 +72,36 @@
   else
     return cast<InvokeInst>(I)->doesNotAccessMemory();
 }
+void CallSite::setDoesNotAccessMemory(bool doesNotAccessMemory) {
+  if (CallInst *CI = dyn_cast<CallInst>(I))
+    CI->setDoesNotAccessMemory(doesNotAccessMemory);
+  else
+    cast<InvokeInst>(I)->setDoesNotAccessMemory(doesNotAccessMemory);
+}
 bool CallSite::onlyReadsMemory() const {
   if (CallInst *CI = dyn_cast<CallInst>(I))
     return CI->onlyReadsMemory();
   else
     return cast<InvokeInst>(I)->onlyReadsMemory();
 }
+void CallSite::setOnlyReadsMemory(bool onlyReadsMemory) {
+  if (CallInst *CI = dyn_cast<CallInst>(I))
+    CI->setOnlyReadsMemory(onlyReadsMemory);
+  else
+    cast<InvokeInst>(I)->setOnlyReadsMemory(onlyReadsMemory);
+}
+bool CallSite::doesNotReturn() const {
+  if (CallInst *CI = dyn_cast<CallInst>(I))
+    return CI->doesNotReturn();
+  else
+    return cast<InvokeInst>(I)->doesNotReturn();
+}
+void CallSite::setDoesNotReturn(bool doesNotReturn) {
+  if (CallInst *CI = dyn_cast<CallInst>(I))
+    CI->setDoesNotReturn(doesNotReturn);
+  else
+    cast<InvokeInst>(I)->setDoesNotReturn(doesNotReturn);
+}
 bool CallSite::doesNotThrow() const {
   if (CallInst *CI = dyn_cast<CallInst>(I))
     return CI->doesNotThrow();
@@ -384,6 +408,12 @@
   setParamAttrs(PAL);
 }
 
+void CallInst::removeParamAttr(unsigned i, ParameterAttributes attr) {
+  PAListPtr PAL = getParamAttrs();
+  PAL = PAL.removeAttr(i, attr);
+  setParamAttrs(PAL);
+}
+
 bool CallInst::paramHasAttr(unsigned i, ParameterAttributes attr) const {
   if (ParamAttrs.paramHasAttr(i, attr))
     return true;
@@ -392,15 +422,6 @@
   return false;
 }
 
-void CallInst::setDoesNotThrow(bool doesNotThrow) {
-  PAListPtr PAL = getParamAttrs();
-  if (doesNotThrow)
-    PAL = PAL.addAttr(0, ParamAttr::NoUnwind);
-  else
-    PAL = PAL.removeAttr(0, ParamAttr::NoUnwind);
-  setParamAttrs(PAL);
-}
-
 
 //===----------------------------------------------------------------------===//
 //                        InvokeInst Implementation
@@ -466,12 +487,9 @@
   setParamAttrs(PAL);
 }
 
-void InvokeInst::setDoesNotThrow(bool doesNotThrow) {
+void InvokeInst::removeParamAttr(unsigned i, ParameterAttributes attr) {
   PAListPtr PAL = getParamAttrs();
-  if (doesNotThrow)
-    PAL = PAL.addAttr(0, ParamAttr::NoUnwind);
-  else
-    PAL = PAL.removeAttr(0, ParamAttr::NoUnwind);
+  PAL = PAL.removeAttr(i, attr);
   setParamAttrs(PAL);
 }
 




From matthijs at stdin.nl  Tue Jul  8 03:50:35 2008
From: matthijs at stdin.nl (Matthijs Kooijman)
Date: Tue, 08 Jul 2008 08:50:35 -0000
Subject: [llvm-commits] [llvm] r53224 -
	/llvm/trunk/include/llvm/Support/CallSite.h
Message-ID: <200807080850.m688oarh013042@zion.cs.uiuc.edu>

Author: matthijs
Date: Tue Jul  8 03:50:32 2008
New Revision: 53224

URL: http://llvm.org/viewvc/llvm-project?rev=53224&view=rev
Log:
Add CallSite::getArgumentOffset() to hide the differences in operands betwen
Call and Invoke in a single method instead of having it hardcoded in multiple
places.

Modified:
    llvm/trunk/include/llvm/Support/CallSite.h

Modified: llvm/trunk/include/llvm/Support/CallSite.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CallSite.h?rev=53224&r1=53223&r2=53224&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/CallSite.h (original)
+++ llvm/trunk/include/llvm/Support/CallSite.h Tue Jul  8 03:50:32 2008
@@ -130,12 +130,9 @@
   void setArgument(unsigned ArgNo, Value* newVal) {
     assert(I && "Not a call or invoke instruction!");
     assert(arg_begin() + ArgNo < arg_end() && "Argument # out of range!");
-    if (I->getOpcode() == Instruction::Call)
-      I->setOperand(ArgNo+1, newVal); // Skip Function
-    else
-      I->setOperand(ArgNo+3, newVal); // Skip Function, BB, BB
+    I->setOperand(getArgumentOffset() + ArgNo, newVal);
   }
-  
+
   /// hasArgument - Returns true if this CallSite passes the given Value* as an
   /// argument to the called function.
   bool hasArgument(const Value *Arg) const;
@@ -146,14 +143,11 @@
 
   /// arg_begin/arg_end - Return iterators corresponding to the actual argument
   /// list for a call site.
-  ///
   arg_iterator arg_begin() const {
     assert(I && "Not a call or invoke instruction!");
-    if (I->getOpcode() == Instruction::Call)
-      return I->op_begin()+1; // Skip Function
-    else
-      return I->op_begin()+3; // Skip Function, BB, BB
+    return I->op_begin() + getArgumentOffset(); // Skip non-arguments
   }
+
   arg_iterator arg_end() const { return I->op_end(); }
   bool arg_empty() const { return arg_end() == arg_begin(); }
   unsigned arg_size() const { return unsigned(arg_end() - arg_begin()); }
@@ -161,6 +155,15 @@
   bool operator<(const CallSite &CS) const {
     return getInstruction() < CS.getInstruction();
   }
+
+private:
+  /// Returns the operand number of the first argument
+  unsigned getArgumentOffset() const {
+    if (I->getOpcode() == Instruction::Call)
+      return 1; // Skip Function
+    else
+      return 3; // Skip Function, BB, BB
+  }
 };
 
 } // End llvm namespace




From matthijs at stdin.nl  Tue Jul  8 03:51:47 2008
From: matthijs at stdin.nl (Matthijs Kooijman)
Date: Tue, 08 Jul 2008 08:51:47 -0000
Subject: [llvm-commits] [llvm] r53225 -
	/llvm/trunk/include/llvm/Support/CallSite.h
Message-ID: <200807080851.m688pl3Z013100@zion.cs.uiuc.edu>

Author: matthijs
Date: Tue Jul  8 03:51:47 2008
New Revision: 53225

URL: http://llvm.org/viewvc/llvm-project?rev=53225&view=rev
Log:
Add CallSite::getArgumentNo() to be able to translate an operand number into a
argument number.

Modified:
    llvm/trunk/include/llvm/Support/CallSite.h

Modified: llvm/trunk/include/llvm/Support/CallSite.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CallSite.h?rev=53225&r1=53224&r2=53225&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/CallSite.h (original)
+++ llvm/trunk/include/llvm/Support/CallSite.h Tue Jul  8 03:51:47 2008
@@ -133,6 +133,15 @@
     I->setOperand(getArgumentOffset() + ArgNo, newVal);
   }
 
+  /// Given an operand number, returns the argument that corresponds to it.
+  /// OperandNo must be a valid operand number that actually corresponds to an
+  /// argument.
+  unsigned getArgumentNo(unsigned OperandNo) const {
+    assert(OperandNo >= getArgumentOffset() && "Operand number passed was not "
+                                               "a valid argument");
+    return OperandNo - getArgumentOffset();
+  }
+
   /// hasArgument - Returns true if this CallSite passes the given Value* as an
   /// argument to the called function.
   bool hasArgument(const Value *Arg) const;




From baldrick at free.fr  Tue Jul  8 04:27:28 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 08 Jul 2008 09:27:28 -0000
Subject: [llvm-commits] [llvm] r53226 - /llvm/trunk/docs/LangRef.html
Message-ID: <200807080927.m689RSP4014787@zion.cs.uiuc.edu>

Author: baldrick
Date: Tue Jul  8 04:27:25 2008
New Revision: 53226

URL: http://llvm.org/viewvc/llvm-project?rev=53226&view=rev
Log:
Note that 'nest' only applies to pointers.

Modified:
    llvm/trunk/docs/LangRef.html

Modified: llvm/trunk/docs/LangRef.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=53226&r1=53225&r2=53226&view=diff

==============================================================================
--- llvm/trunk/docs/LangRef.html (original)
+++ llvm/trunk/docs/LangRef.html Tue Jul  8 04:27:25 2008
@@ -876,7 +876,7 @@
     executing it.</dd>
 
     <dt><tt>nest</tt></dt>
-    <dd>This indicates that the parameter can be excised using the
+    <dd>This indicates that the pointer parameter can be excised using the
     <a href="#int_trampoline">trampoline intrinsics</a>.</dd>
     <dt><tt>readonly</tt></dt>
     <dd>This function attribute indicates that the function has no side-effects




From baldrick at free.fr  Tue Jul  8 04:33:14 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 08 Jul 2008 09:33:14 -0000
Subject: [llvm-commits] [llvm] r53227 -
	/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
Message-ID: <200807080933.m689XECA015042@zion.cs.uiuc.edu>

Author: baldrick
Date: Tue Jul  8 04:33:14 2008
New Revision: 53227

URL: http://llvm.org/viewvc/llvm-project?rev=53227&view=rev
Log:
Pacify gcc-4.3.

Modified:
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=53227&r1=53226&r2=53227&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Tue Jul  8 04:33:14 2008
@@ -824,11 +824,12 @@
     case 'r':
       return std::make_pair(0U, Mips::CPURegsRegisterClass);
     case 'f':
-      if (VT == MVT::f32)
+      if (VT == MVT::f32) {
         if (Subtarget->isSingleFloat())
           return std::make_pair(0U, Mips::FGR32RegisterClass);
         else
           return std::make_pair(0U, Mips::AFGR32RegisterClass);
+      }
       if (VT == MVT::f64)    
         if ((!Subtarget->isSingleFloat()) && (!Subtarget->isFP64bit()))
           return std::make_pair(0U, Mips::AFGR64RegisterClass);
@@ -859,7 +860,7 @@
              Mips::T8, 0);
 
     case 'f':
-      if (VT == MVT::f32)
+      if (VT == MVT::f32) {
         if (Subtarget->isSingleFloat())
           return make_vector<unsigned>(Mips::F2, Mips::F3, Mips::F4, Mips::F5,
                  Mips::F6, Mips::F7, Mips::F8, Mips::F9, Mips::F10, Mips::F11,
@@ -870,6 +871,7 @@
           return make_vector<unsigned>(Mips::F2, Mips::F4, Mips::F6, Mips::F8, 
                  Mips::F10, Mips::F20, Mips::F22, Mips::F24, Mips::F26, 
                  Mips::F28, Mips::F30, 0);
+      }
 
       if (VT == MVT::f64)    
         if ((!Subtarget->isSingleFloat()) && (!Subtarget->isFP64bit()))




From baldrick at free.fr  Tue Jul  8 04:41:30 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 08 Jul 2008 09:41:30 -0000
Subject: [llvm-commits] [llvm] r53228 - in /llvm/trunk:
 include/llvm/Function.h lib/VMCore/Function.cpp
Message-ID: <200807080941.m689fVJh015296@zion.cs.uiuc.edu>

Author: baldrick
Date: Tue Jul  8 04:41:30 2008
New Revision: 53228

URL: http://llvm.org/viewvc/llvm-project?rev=53228&view=rev
Log:
Add some helpers for manipulating function
parameter attributes.

Modified:
    llvm/trunk/include/llvm/Function.h
    llvm/trunk/lib/VMCore/Function.cpp

Modified: llvm/trunk/include/llvm/Function.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Function.h?rev=53228&r1=53227&r2=53228&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Function.h (original)
+++ llvm/trunk/include/llvm/Function.h Tue Jul  8 04:41:30 2008
@@ -174,29 +174,49 @@
   /// addParamAttr - adds the attribute to the list of attributes.
   void addParamAttr(unsigned i, ParameterAttributes attr);
   
+  /// removeParamAttr - removes the attribute from the list of attributes.
+  void removeParamAttr(unsigned i, ParameterAttributes attr);
+
   /// @brief Extract the alignment for a call or parameter (0=unknown).
   unsigned getParamAlignment(unsigned i) const {
     return ParamAttrs.getParamAlignment(i);
   }
 
-  /// @brief Determine if the function cannot return.
-  bool doesNotReturn() const { return paramHasAttr(0, ParamAttr::NoReturn); }
-  void setDoesNotThrow(bool doesNotThrow = true);
-
-  /// @brief Determine if the function cannot unwind.
-  bool doesNotThrow() const {
-    return paramHasAttr(0, ParamAttr::NoUnwind);
-  }
-
   /// @brief Determine if the function does not access memory.
   bool doesNotAccessMemory() const {
     return paramHasAttr(0, ParamAttr::ReadNone);
   }
+  void setDoesNotAccessMemory(bool doesNotAccessMemory = true) {
+    if (doesNotAccessMemory) addParamAttr(0, ParamAttr::ReadNone);
+    else removeParamAttr(0, ParamAttr::ReadNone);
+  }
 
   /// @brief Determine if the function does not access or only reads memory.
   bool onlyReadsMemory() const {
     return doesNotAccessMemory() || paramHasAttr(0, ParamAttr::ReadOnly);
   }
+  void setOnlyReadsMemory(bool onlyReadsMemory = true) {
+    if (onlyReadsMemory) addParamAttr(0, ParamAttr::ReadOnly);
+    else removeParamAttr(0, ParamAttr::ReadOnly | ParamAttr::ReadNone);
+  }
+
+  /// @brief Determine if the function cannot return.
+  bool doesNotReturn() const {
+    return paramHasAttr(0, ParamAttr::NoReturn);
+  }
+  void setDoesNotReturn(bool doesNotReturn = true) {
+    if (doesNotReturn) addParamAttr(0, ParamAttr::NoReturn);
+    else removeParamAttr(0, ParamAttr::NoReturn);
+  }
+
+  /// @brief Determine if the function cannot unwind.
+  bool doesNotThrow() const {
+    return paramHasAttr(0, ParamAttr::NoUnwind);
+  }
+  void setDoesNotThrow(bool doesNotThrow = true) {
+    if (doesNotThrow) addParamAttr(0, ParamAttr::NoUnwind);
+    else removeParamAttr(0, ParamAttr::NoUnwind);
+  }
 
   /// @brief Determine if the function returns a structure through first 
   /// pointer argument.

Modified: llvm/trunk/lib/VMCore/Function.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Function.cpp?rev=53228&r1=53227&r2=53228&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/Function.cpp (original)
+++ llvm/trunk/lib/VMCore/Function.cpp Tue Jul  8 04:41:30 2008
@@ -113,18 +113,15 @@
 
 /// addAttr - Add a ParamAttr to an argument
 void Argument::addAttr(ParameterAttributes attr) {
-  getParent()->setParamAttrs(
-    getParent()->getParamAttrs().addAttr(getArgNo() + 1, attr));
+  getParent()->addParamAttr(getArgNo() + 1, attr);
 }
-  
+
 /// removeAttr - Remove a ParamAttr from an argument
 void Argument::removeAttr(ParameterAttributes attr) {
-  getParent()->setParamAttrs(
-    getParent()->getParamAttrs().removeAttr(getArgNo() + 1, attr));
+  getParent()->removeParamAttr(getArgNo() + 1, attr);
 }
 
 
-
 //===----------------------------------------------------------------------===//
 // Helper Methods in Function
 //===----------------------------------------------------------------------===//
@@ -231,18 +228,15 @@
   BasicBlocks.clear();    // Delete all basic blocks...
 }
 
-void Function::setDoesNotThrow(bool doesNotThrow) {
+void Function::addParamAttr(unsigned i, ParameterAttributes attr) {
   PAListPtr PAL = getParamAttrs();
-  if (doesNotThrow)
-    PAL = PAL.addAttr(0, ParamAttr::NoUnwind);
-  else
-    PAL = PAL.removeAttr(0, ParamAttr::NoUnwind);
+  PAL = PAL.addAttr(i, attr);
   setParamAttrs(PAL);
 }
 
-void Function::addParamAttr(unsigned i, ParameterAttributes attr) {
+void Function::removeParamAttr(unsigned i, ParameterAttributes attr) {
   PAListPtr PAL = getParamAttrs();
-  PAL = PAL.addAttr(i, attr);
+  PAL = PAL.removeAttr(i, attr);
   setParamAttrs(PAL);
 }
 




From baldrick at free.fr  Tue Jul  8 05:04:29 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 08 Jul 2008 10:04:29 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53229 - in /llvm-gcc-4.2/trunk/gcc:
 llvm-convert.cpp llvm-internal.h
Message-ID: <200807081004.m68A4Te3016115@zion.cs.uiuc.edu>

Author: baldrick
Date: Tue Jul  8 05:04:26 2008
New Revision: 53229

URL: http://llvm.org/viewvc/llvm-project?rev=53229&view=rev
Log:
Fix PR2520: fabs should be marked readnone and
nounwind.  The problem here is that the call was
not being generated from the gcc fabs builtin
(in which case it would have automagically had
the right attributes), but from an ABS_EXPR.

Modified:
    llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
    llvm-gcc-4.2/trunk/gcc/llvm-internal.h

Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=53229&r1=53228&r2=53229&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Jul  8 05:04:26 2008
@@ -3148,10 +3148,30 @@
       ICmpInst::ICMP_UGE : ICmpInst::ICMP_SGE;
     Value *Cmp = Builder.CreateICmp(pred, Op, OpN->getOperand(0), "abscond");
     return Builder.CreateSelect(Cmp, Op, OpN, "abs");
-  } else {
-    // Turn FP abs into fabs/fabsf.
-    return EmitBuiltinUnaryFPOp(Op, "fabsf", "fabs", "fabsl");
   }
+
+  // Turn FP abs into fabs/fabsf.
+  const char *Name = 0;
+
+  switch (Op->getType()->getTypeID()) {
+  default: assert(0 && "Unknown FP type!");
+  case Type::FloatTyID:  Name = "fabsf"; break;
+  case Type::DoubleTyID: Name = "fabs"; break;
+  case Type::X86_FP80TyID:
+  case Type::PPC_FP128TyID:
+  case Type::FP128TyID: Name = "fabsl"; break;
+  }
+
+  Function *F = cast<Function>(TheModule->getOrInsertFunction(Name,
+                                                              Op->getType(),
+                                                              Op->getType(),
+                                                              NULL));
+  CallInst *Call = Builder.CreateCall(F, Op);
+  F->setDoesNotThrow();
+  Call->setDoesNotThrow();
+  F->setDoesNotAccessMemory();
+  Call->setDoesNotAccessMemory();
+  return Call;
 }
 
 Value *TreeToLLVM::EmitBIT_NOT_EXPR(tree exp) {
@@ -4870,25 +4890,6 @@
   return true;
 }
 
-Value *TreeToLLVM::EmitBuiltinUnaryFPOp(Value *Amt, const char *F32Name,
-                                        const char *F64Name, 
-                                        const char *LongDoubleName) {
-  const char *Name = 0;
-  
-  switch (Amt->getType()->getTypeID()) {
-  default: assert(0 && "Unknown FP type!");
-  case Type::FloatTyID:  Name = F32Name; break;
-  case Type::DoubleTyID: Name = F64Name; break;
-  case Type::X86_FP80TyID:
-  case Type::PPC_FP128TyID:
-  case Type::FP128TyID: Name = LongDoubleName; break;
-  }
-  
-  return Builder.CreateCall(cast<Function>(
-    TheModule->getOrInsertFunction(Name, Amt->getType(), Amt->getType(), NULL)),
-                            Amt);
-}
-
 Value *TreeToLLVM::EmitBuiltinSQRT(tree exp) {
   Value *Amt = Emit(TREE_VALUE(TREE_OPERAND(exp, 1)), 0);
   Intrinsic::ID Id = Intrinsic::not_intrinsic;

Modified: llvm-gcc-4.2/trunk/gcc/llvm-internal.h
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-internal.h?rev=53229&r1=53228&r2=53229&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-internal.h (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-internal.h Tue Jul  8 05:04:26 2008
@@ -525,8 +525,6 @@
   bool EmitFrontendExpandedBuiltinCall(tree_node *exp, tree_node *fndecl,
                                        const MemRef *DestLoc, Value *&Result);
   bool EmitBuiltinUnaryIntOp(Value *InVal, Value *&Result, Intrinsic::ID Id);
-  Value *EmitBuiltinUnaryFPOp(Value *InVal, const char *F32Name,
-                              const char *F64Name, const char *LongDoubleName);
   Value *EmitBuiltinSQRT(tree_node *exp);
   Value *EmitBuiltinPOWI(tree_node *exp);
 




From baldrick at free.fr  Tue Jul  8 05:11:41 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 08 Jul 2008 10:11:41 -0000
Subject: [llvm-commits] [llvm] r53230 -
	/llvm/trunk/test/FrontendC/2008-07-08-FAbsAttributes.c
Message-ID: <200807081011.m68ABg9k016425@zion.cs.uiuc.edu>

Author: baldrick
Date: Tue Jul  8 05:11:36 2008
New Revision: 53230

URL: http://llvm.org/viewvc/llvm-project?rev=53230&view=rev
Log:
Testcase for PR2520.

Added:
    llvm/trunk/test/FrontendC/2008-07-08-FAbsAttributes.c

Added: llvm/trunk/test/FrontendC/2008-07-08-FAbsAttributes.c
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2008-07-08-FAbsAttributes.c?rev=53230&view=auto

==============================================================================
--- llvm/trunk/test/FrontendC/2008-07-08-FAbsAttributes.c (added)
+++ llvm/trunk/test/FrontendC/2008-07-08-FAbsAttributes.c Tue Jul  8 05:11:36 2008
@@ -0,0 +1,4 @@
+// RUN: %llvmgcc -S %s -o - | grep readnone
+// PR2520
+#include <math.h>
+double f(double *x, double *y) { return fabs(*x + *y); }




From baldrick at free.fr  Tue Jul  8 05:51:02 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 08 Jul 2008 10:51:02 -0000
Subject: [llvm-commits] [llvm] r53231 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeFloatTypes.cpp
 LegalizeTypes.h
Message-ID: <200807081051.m68Ap3lP017933@zion.cs.uiuc.edu>

Author: baldrick
Date: Tue Jul  8 05:50:55 2008
New Revision: 53231

URL: http://llvm.org/viewvc/llvm-project?rev=53231&view=rev
Log:
LegalizeTypes support for FP_ROUND and FP_EXTEND
soft float.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=53231&r1=53230&r2=53231&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Tue Jul  8 05:50:55 2008
@@ -66,7 +66,7 @@
     cerr << "SoftenFloatResult #" << ResNo << ": ";
     N->dump(&DAG); cerr << "\n";
 #endif
-    assert(0 && "Do not know how to convert the result of this operator!");
+    assert(0 && "Do not know how to soften the result of this operator!");
     abort();
 
     case ISD::BIT_CONVERT: R = SoftenFloatRes_BIT_CONVERT(N); break;
@@ -75,6 +75,8 @@
       R = SoftenFloatRes_ConstantFP(cast<ConstantFPSDNode>(N));
       break;
     case ISD::FCOPYSIGN:   R = SoftenFloatRes_FCOPYSIGN(N); break;
+    case ISD::FP_EXTEND:   R = SoftenFloatRes_FP_EXTEND(N); break;
+    case ISD::FP_ROUND:    R = SoftenFloatRes_FP_ROUND(N); break;
     case ISD::LOAD:        R = SoftenFloatRes_LOAD(N); break;
     case ISD::SINT_TO_FP:
     case ISD::UINT_TO_FP:  R = SoftenFloatRes_XINT_TO_FP(N); break;
@@ -169,6 +171,46 @@
                      NVT, Ops, 2, false);
 }
 
+SDOperand DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) {
+  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
+  SDOperand Op = N->getOperand(0);
+
+  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
+  switch (Op.getValueType().getSimpleVT()) {
+  default:
+    assert(false && "Unsupported FP_EXTEND!");
+  case MVT::f32:
+    switch (N->getValueType(0).getSimpleVT()) {
+    default:
+      assert(false && "Unsupported FP_EXTEND!");
+    case MVT::f64:
+      LC = RTLIB::FPEXT_F32_F64;
+    }
+  }
+
+  return MakeLibCall(LC, NVT, &Op, 1, false);
+}
+
+SDOperand DAGTypeLegalizer::SoftenFloatRes_FP_ROUND(SDNode *N) {
+  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
+  SDOperand Op = N->getOperand(0);
+
+  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
+  switch (Op.getValueType().getSimpleVT()) {
+  default:
+    assert(false && "Unsupported FP_ROUND!");
+  case MVT::f64:
+    switch (N->getValueType(0).getSimpleVT()) {
+    default:
+      assert(false && "Unsupported FP_ROUND!");
+    case MVT::f32:
+      LC = RTLIB::FPROUND_F64_F32;
+    }
+  }
+
+  return MakeLibCall(LC, NVT, &Op, 1, false);
+}
+
 SDOperand DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
   MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
   SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
@@ -323,7 +365,7 @@
       cerr << "SoftenFloatOperand Op #" << OpNo << ": ";
       N->dump(&DAG); cerr << "\n";
 #endif
-      assert(0 && "Do not know how to convert this operator's operand!");
+      assert(0 && "Do not know how to soften this operator's operand!");
       abort();
 
     case ISD::BIT_CONVERT: Res = SoftenFloatOp_BIT_CONVERT(N); break;

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=53231&r1=53230&r2=53231&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Tue Jul  8 05:50:55 2008
@@ -334,6 +334,8 @@
   SDOperand SoftenFloatRes_FADD(SDNode *N);
   SDOperand SoftenFloatRes_FCOPYSIGN(SDNode *N);
   SDOperand SoftenFloatRes_FMUL(SDNode *N);
+  SDOperand SoftenFloatRes_FP_EXTEND(SDNode *N);
+  SDOperand SoftenFloatRes_FP_ROUND(SDNode *N);
   SDOperand SoftenFloatRes_FSUB(SDNode *N);
   SDOperand SoftenFloatRes_LOAD(SDNode *N);
   SDOperand SoftenFloatRes_XINT_TO_FP(SDNode *N);




From resistor at mac.com  Tue Jul  8 11:39:16 2008
From: resistor at mac.com (Owen Anderson)
Date: Tue, 08 Jul 2008 16:39:16 -0000
Subject: [llvm-commits] [llvm] r53236 -
	/llvm/trunk/tools/bugpoint/ExtractFunction.cpp
Message-ID: <200807081639.m68GdcGR030615@zion.cs.uiuc.edu>

Author: resistor
Date: Tue Jul  8 11:38:42 2008
New Revision: 53236

URL: http://llvm.org/viewvc/llvm-project?rev=53236&view=rev
Log:
Global variables beginning with \01 have special meaning on Darwin, so we need to remove
the name prefix when we change them from internal to external.  This allows bugpointing
of codegen miscompilations to work more reliably on Darwin.

Modified:
    llvm/trunk/tools/bugpoint/ExtractFunction.cpp

Modified: llvm/trunk/tools/bugpoint/ExtractFunction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ExtractFunction.cpp?rev=53236&r1=53235&r2=53236&view=diff

==============================================================================
--- llvm/trunk/tools/bugpoint/ExtractFunction.cpp (original)
+++ llvm/trunk/tools/bugpoint/ExtractFunction.cpp Tue Jul  8 11:38:42 2008
@@ -262,8 +262,11 @@
   for (Module::iterator I = M->begin(), E = M->end(); I != E; ++I)
     I->setLinkage(GlobalValue::ExternalLinkage);
   for (Module::global_iterator I = M->global_begin(), E = M->global_end();
-       I != E; ++I)
+       I != E; ++I) {
+    if (I->hasName() && *I->getNameStart() == '\01')
+      I->setName(I->getNameStart()+1, I->getNameLen()-1);
     I->setLinkage(GlobalValue::ExternalLinkage);
+  }
 
   Module *New = CloneModule(M);
 




From evan.cheng at apple.com  Tue Jul  8 11:41:12 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 08 Jul 2008 16:41:12 -0000
Subject: [llvm-commits] [llvm] r53237 - in /llvm/trunk:
 include/llvm/CodeGen/AsmPrinter.h lib/CodeGen/AsmPrinter.cpp
 lib/Target/X86/X86ATTAsmPrinter.cpp
Message-ID: <200807081641.m68GfRfG030691@zion.cs.uiuc.edu>

Author: evancheng
Date: Tue Jul  8 11:40:43 2008
New Revision: 53237

URL: http://llvm.org/viewvc/llvm-project?rev=53237&view=rev
Log:
Unbreak C++ tests on x86 Darwin.

Modified:
    llvm/trunk/include/llvm/CodeGen/AsmPrinter.h
    llvm/trunk/lib/CodeGen/AsmPrinter.cpp
    llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp

Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=53237&r1=53236&r2=53237&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original)
+++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Tue Jul  8 11:40:43 2008
@@ -351,8 +351,9 @@
     /// printSuffixedName - This prints a name with preceding 
     /// getPrivateGlobalPrefix and the specified suffix, handling quoted names
     /// correctly.
-    void printSuffixedName(const char *Name, const char* Suffix);
-    void printSuffixedName(std::string &Name, const char* Suffix);
+    void printSuffixedName(const char *Name, const char *Suffix,
+                           const char *Prefix = 0);
+    void printSuffixedName(const std::string &Name, const char* Suffix);
 
   private:
     void EmitLLVMUsedList(Constant *List);

Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter.cpp?rev=53237&r1=53236&r2=53237&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter.cpp Tue Jul  8 11:40:43 2008
@@ -1445,14 +1445,23 @@
   }
 }
 
-void AsmPrinter::printSuffixedName(const char *Name, const char* Suffix) {
+void AsmPrinter::printSuffixedName(const char *Name, const char *Suffix,
+                                   const char *Prefix) {
   if (Name[0]=='\"')
-    O << '\"' << TAI->getPrivateGlobalPrefix() << 
-         Name[1] << Suffix << '\"';
+    O << '\"';
+  O << TAI->getPrivateGlobalPrefix();
+  if (Prefix) O << Prefix;
+  if (Name[0]=='\"')
+    O << '\"';
+  if (Name[0]=='\"')
+    O << Name[1];
   else
-    O << TAI->getPrivateGlobalPrefix() << Name << Suffix;
+    O << Name;
+  O << Suffix;
+  if (Name[0]=='\"')
+    O << '\"';
 }
 
-void AsmPrinter::printSuffixedName(std::string &Name, const char* Suffix) {
+void AsmPrinter::printSuffixedName(const std::string &Name, const char* Suffix) {
   printSuffixedName(Name.c_str(), Suffix);
 }

Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=53237&r1=53236&r2=53237&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Tue Jul  8 11:40:43 2008
@@ -977,8 +977,7 @@
 /// printGVStub - Print stub for a global value.
 ///
 void X86ATTAsmPrinter::printGVStub(const char *GV, const char *Prefix) {
-  if (Prefix) O << Prefix;
-  printSuffixedName(GV, "$non_lazy_ptr");
+  printSuffixedName(GV, "$non_lazy_ptr", Prefix);
   O << ":\n\t.indirect_symbol ";
   if (Prefix) O << Prefix;
   O << GV << "\n\t.long\t0\n";




From sabre at nondot.org  Tue Jul  8 12:18:26 2008
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 08 Jul 2008 17:18:26 -0000
Subject: [llvm-commits] [llvm] r53239 -
 /llvm/trunk/test/Transforms/InstCombine/2008-07-08-VolatileLoadMerge.ll
Message-ID: <200807081718.m68HIVF7032033@zion.cs.uiuc.edu>

Author: lattner
Date: Tue Jul  8 12:18:05 2008
New Revision: 53239

URL: http://llvm.org/viewvc/llvm-project?rev=53239&view=rev
Log:
new testcase for PR2496

Added:
    llvm/trunk/test/Transforms/InstCombine/2008-07-08-VolatileLoadMerge.ll

Added: llvm/trunk/test/Transforms/InstCombine/2008-07-08-VolatileLoadMerge.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-07-08-VolatileLoadMerge.ll?rev=53239&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2008-07-08-VolatileLoadMerge.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/2008-07-08-VolatileLoadMerge.ll Tue Jul  8 12:18:05 2008
@@ -0,0 +1,26 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {volatile load} | count 2
+; PR2496
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+ at g_1 = internal global i32 0		; <i32*> [#uses=3]
+
+define i32 @main() nounwind  {
+entry:
+	%tmp93 = icmp slt i32 0, 10		; <i1> [#uses=0]
+	%tmp34 = volatile load i32* @g_1, align 4		; <i32> [#uses=1]
+	br label %bb
+
+bb:		; preds = %bb, %entry
+	%b.0.reg2mem.0 = phi i32 [ 0, %entry ], [ %tmp6, %bb ]		; <i32> [#uses=1]
+	%tmp3.reg2mem.0 = phi i32 [ %tmp3, %bb ], [ %tmp34, %entry ]
+	%tmp4 = add i32 %tmp3.reg2mem.0, 5		; <i32> [#uses=1]
+	volatile store i32 %tmp4, i32* @g_1, align 4
+	%tmp6 = add i32 %b.0.reg2mem.0, 1		; <i32> [#uses=2]
+	%tmp9 = icmp slt i32 %tmp6, 10		; <i1> [#uses=1]
+	%tmp3 = volatile load i32* @g_1, align 4		; <i32> [#uses=1]
+	br i1 %tmp9, label %bb, label %bb11
+
+bb11:		; preds = %bb
+	ret i32 0
+}
+




From sabre at nondot.org  Tue Jul  8 12:18:33 2008
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 08 Jul 2008 17:18:33 -0000
Subject: [llvm-commits] [llvm] r53240 -
	/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200807081718.m68HIYtV032050@zion.cs.uiuc.edu>

Author: lattner
Date: Tue Jul  8 12:18:32 2008
New Revision: 53240

URL: http://llvm.org/viewvc/llvm-project?rev=53240&view=rev
Log:
Fix PR2496, a really nasty bug which involved sinking volatile loads 
into phis.  This is actually the same bug as PR2262 /
2008-04-29-VolatileLoadDontMerge.ll, but I missed checking the first 
predecessor for multiple successors.  Testcase here:
InstCombine/2008-07-08-VolatileLoadMerge.ll


Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53240&r1=53239&r2=53240&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Jul  8 12:18:32 2008
@@ -9354,6 +9354,14 @@
     if (LI->getParent() != PN.getIncomingBlock(0) ||
         !isSafeToSinkLoad(LI))
       return 0;
+    
+    // If the PHI is of volatile loads and the load block has multiple
+    // successors, sinking it would remove a load of the volatile value from
+    // the path through the other successor.
+    if (isVolatile &&
+        LI->getParent()->getTerminator()->getNumSuccessors() != 1)
+      return 0;
+    
   } else if (isa<GetElementPtrInst>(FirstInst)) {
     if (FirstInst->getNumOperands() == 2)
       return FoldPHIArgBinOpIntoPHI(PN);
@@ -9380,9 +9388,9 @@
           !isSafeToSinkLoad(LI))
         return 0;
       
-      // If the PHI is volatile and its block has multiple successors, sinking
-      // it would remove a load of the volatile value from the path through the
-      // other successor.
+      // If the PHI is of volatile loads and the load block has multiple
+      // successors, sinking it would remove a load of the volatile value from
+      // the path through the other successor.
       if (isVolatile &&
           LI->getParent()->getTerminator()->getNumSuccessors() != 1)
         return 0;




From sabre at nondot.org  Tue Jul  8 12:26:13 2008
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 08 Jul 2008 17:26:13 -0000
Subject: [llvm-commits] [llvm] r53241 -
	/llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp
Message-ID: <200807081726.m68HQGIZ032314@zion.cs.uiuc.edu>

Author: lattner
Date: Tue Jul  8 12:25:49 2008
New Revision: 53241

URL: http://llvm.org/viewvc/llvm-project?rev=53241&view=rev
Log:
Add a new hidden option to the interpreter to cause it to print
out every volatile load and store.  This is useful for tracking 
down insane volatile memory bugs.

Modified:
    llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp

Modified: llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp?rev=53241&r1=53240&r2=53241&view=diff

==============================================================================
--- llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp Tue Jul  8 12:25:49 2008
@@ -21,6 +21,7 @@
 #include "llvm/Support/GetElementPtrTypeIterator.h"
 #include "llvm/ADT/APInt.h"
 #include "llvm/ADT/Statistic.h"
+#include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/MathExtras.h"
 #include <algorithm>
@@ -31,6 +32,9 @@
 STATISTIC(NumDynamicInsts, "Number of dynamic instructions executed");
 static Interpreter *TheEE = 0;
 
+static cl::opt<bool> PrintVolatile("interpreter-print-volatile", cl::Hidden,
+          cl::desc("make the interpreter print every volatile load and store"));
+
 //===----------------------------------------------------------------------===//
 //                     Various Helper Functions
 //===----------------------------------------------------------------------===//
@@ -830,6 +834,8 @@
   GenericValue Result;
   LoadValueFromMemory(Result, Ptr, I.getType());
   SetValue(&I, Result, SF);
+  if (I.isVolatile() && PrintVolatile)
+    cerr << "Volatile load " << I;
 }
 
 void Interpreter::visitStoreInst(StoreInst &I) {
@@ -838,6 +844,8 @@
   GenericValue SRC = getOperandValue(I.getPointerOperand(), SF);
   StoreValueToMemory(Val, (GenericValue *)GVTOP(SRC),
                      I.getOperand(0)->getType());
+  if (I.isVolatile() && PrintVolatile)
+    cerr << "Volatile store: " << I;
 }
 
 //===----------------------------------------------------------------------===//




From dalej at apple.com  Tue Jul  8 12:40:15 2008
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 8 Jul 2008 10:40:15 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53130 -
	/llvm-gcc-4.2/trunk/gcc/cgraphunit.c
In-Reply-To: <200807041838.38772.duncan.sands@math.u-psud.fr>
References: <200807041838.38772.duncan.sands@math.u-psud.fr>
Message-ID: <04D36535-BBF8-489B-AD84-6E79DA248DF9@apple.com>


On Jul 4, 2008, at 9:38 AMPDT, Duncan Sands wrote:

> Sorry, problems with my email client :)  Here it is
> again, hopefully readable...
>
> Hi Dale,
>
>> Do not emit unreferenced static functions at -O0.
>> This is the gcc-4.0 behavior, changed deliberately
>> in gcc-4.2, see PR 24561.  After discussion Chris,
>> Evan and I agreed the 4.0 behavior is better so
>> we're going back to that.
>
> is there a similar issue with dead static globals?

The behavior is that dead static globals are removed in C++ at all  
optimization levels; this is the same across gcc-4.0, gcc-4.2, and  
llvm-gcc.
In C they are not removed at -O0; gcc-4.2 and llvm-gcc remove them at  
higher optimization levels, and gcc-4.0 does not.

My guess is that, since the processing involved for data objects is  
considerably less than that for functions, whatever you do here is not  
going to matter much to compile time.  That might not be true for big  
initialized static objects, especially given llvm IR's bulky notation  
for them, but how common can that be (unreferenced)?  I have no data  
to support my opinion, however.

> Also, how much of a win is this?

I don't know.  It showed up on a profile as a place where time was  
being spent, maybe the guys who made the profile have some idea.



From evan.cheng at apple.com  Tue Jul  8 13:06:32 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 8 Jul 2008 11:06:32 -0700
Subject: [llvm-commits] [llvm] r53212 - in /llvm/trunk:
	include/llvm/CodeGen/ lib/CodeGen/
	lib/CodeGen/SelectionDAG/	lib/Target/ARM/ lib/Target/Alpha/
	lib/Target/CellSPU/	lib/Target/IA64/ lib/Target/Mips/
	lib/Target/PIC16/	lib/Target/PowerPC/ lib/Target/Sparc/
	lib/Target/X86/
In-Reply-To: <200807080928.53021.baldrick@free.fr>
References: <200807072314.m67NER4K016634@zion.cs.uiuc.edu>
	<200807080928.53021.baldrick@free.fr>
Message-ID: <5D431127-0BFC-41EF-8523-58B0B749AE2D@apple.com>

Yeah, take a look at Grue-O0 i386:

LLC compile:
multisource/Applications/ClamAV/clamscan: 6.94% (4.4268 => 4.1196)
multisource/Applications/JM/lencod/lencod: 8.37% (5.3160 => 4.8711)
multisource/Applications/SPASS/SPASS: 6.11% (6.0424 => 5.6731)
multisource/Applications/sqlite3/sqlite3: 7.14% (3.3431 => 3.1043)
multisource/Benchmarks/MiBench/consumer-typeset/consumer-typeset:  
7.29% (5.2923 => 4.9067)
multisource/Benchmarks/tramp3d-v4/tramp3d-v4: 5.36% (9.2806 => 8.7834)
external/Povray/povray: 7.55% (5.1237 => 4.7371)
external/SPEC/CFP2000/177.mesa/177.mesa: 7.65% (3.9692 => 3.6656)
external/SPEC/CINT2000/176.gcc/176.gcc: 7.18% (13.7394 => 12.7527)
external/SPEC/CINT2000/252.eon/252.eon: 6.20% (3.7286 => 3.4973)
external/SPEC/CINT2000/253.perlbmk/253.perlbmk: 6.74% (5.2106 => 4.8592)
external/SPEC/CINT2000/254.gap/254.gap: 7.38% (4.8105 => 4.4556)
external/SPEC/CINT2000/255.vortex/255.vortex: 7.29% (4.2463 => 3.9369)
external/SPEC/CINT2006/400.perlbench/400.perlbench: 6.96% (10.3442 =>  
9.6239)
external/SPEC/CINT2006/403.gcc/403.gcc: 6.88% (32.7735 => 30.5199)
external/SPEC/CINT2006/445.gobmk/445.gobmk: 7.32% (6.7599 => 6.2651)
external/SPEC/CINT2006/464.h264ref/464.h264ref: 8.21% (3.8471 => 3.5311)

Very nice!

Evan

On Jul 8, 2008, at 12:28 AM, Duncan Sands wrote:

> Hi Dan,
>
>> This drastically reduces the number of calls to malloc/free made
>> during the "Emit" phase of scheduling, as well as later phases
>> in CodeGen. Combined with other changes, this speeds up the
>> "instruction selection" phase of CodeGen by 10% in some cases.
>
> which platform are you measuring this speedup on?  Darwin?
>
> Thanks,
>
> Duncan.
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

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From gohman at apple.com  Tue Jul  8 13:18:17 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 8 Jul 2008 11:18:17 -0700
Subject: [llvm-commits] [llvm] r53212 - in /llvm/trunk:
	include/llvm/CodeGen/ lib/CodeGen/ lib/CodeGen/SelectionDAG/
	lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/
	lib/Target/IA64/ lib/Target/Mips/ lib/Target/PIC16/
	lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/
In-Reply-To: <200807080928.53021.baldrick@free.fr>
References: <200807072314.m67NER4K016634@zion.cs.uiuc.edu>
	<200807080928.53021.baldrick@free.fr>
Message-ID: <7948AB9A-D1F3-412B-A937-6DA79A4CC540@apple.com>


On Jul 8, 2008, at 12:28 AM, Duncan Sands wrote:

> Hi Dan,
>
>> This drastically reduces the number of calls to malloc/free made
>> during the "Emit" phase of scheduling, as well as later phases
>> in CodeGen. Combined with other changes, this speeds up the
>> "instruction selection" phase of CodeGen by 10% in some cases.
>
> which platform are you measuring this speedup on?  Darwin?

I'm seeing similar results on Darwin x86-32 and Ubuntu x86-32.

Dan



From sabre at nondot.org  Tue Jul  8 13:33:38 2008
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 08 Jul 2008 18:33:38 -0000
Subject: [llvm-commits] [llvm] r53242 -
 /llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
Message-ID: <200807081833.m68IXddp002798@zion.cs.uiuc.edu>

Author: lattner
Date: Tue Jul  8 13:33:33 2008
New Revision: 53242

URL: http://llvm.org/viewvc/llvm-project?rev=53242&view=rev
Log:
'Optimize' test

Modified:
    llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll

Modified: llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll?rev=53242&r1=53241&r2=53242&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll (original)
+++ llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll Tue Jul  8 13:33:33 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -constprop | llvm-dis
+; RUN: llvm-as < %s | opt -constprop -disable-output
 ; PR2529
 define <4 x i32> @test1(i32 %argc, i8** %argv) {
 entry:  




From sabre at nondot.org  Tue Jul  8 13:47:57 2008
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 08 Jul 2008 18:47:57 -0000
Subject: [llvm-commits] [llvm] r53243 -
	/llvm/trunk/lib/VMCore/ConstantFold.cpp
Message-ID: <200807081847.m68IlxbY003628@zion.cs.uiuc.edu>

Author: lattner
Date: Tue Jul  8 13:47:38 2008
New Revision: 53243

URL: http://llvm.org/viewvc/llvm-project?rev=53243&view=rev
Log:
improve comment

Modified:
    llvm/trunk/lib/VMCore/ConstantFold.cpp

Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantFold.cpp?rev=53243&r1=53242&r2=53243&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/ConstantFold.cpp (original)
+++ llvm/trunk/lib/VMCore/ConstantFold.cpp Tue Jul  8 13:47:38 2008
@@ -1375,7 +1375,7 @@
   }
 
   if (C1->getType()->isFloatingPoint()) {
-    int Result = -1;
+    int Result = -1;  // -1 = unknown, 0 = known false, 1 = known true.
     switch (evaluateFCmpRelation(C1, C2)) {
     default: assert(0 && "Unknown relation!");
     case FCmpInst::FCMP_UNO:




From clattner at apple.com  Tue Jul  8 13:49:06 2008
From: clattner at apple.com (Chris Lattner)
Date: Tue, 8 Jul 2008 11:49:06 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53130 -
	/llvm-gcc-4.2/trunk/gcc/cgraphunit.c
In-Reply-To: <04D36535-BBF8-489B-AD84-6E79DA248DF9@apple.com>
References: <200807041838.38772.duncan.sands@math.u-psud.fr>
	<04D36535-BBF8-489B-AD84-6E79DA248DF9@apple.com>
Message-ID: <0AB0A3AA-749D-4BA9-B3BE-9AB4464665D7@apple.com>


On Jul 8, 2008, at 10:40 AM, Dale Johannesen wrote:

>>
>> Also, how much of a win is this?
>
> I don't know.  It showed up on a profile as a place where time was
> being spent, maybe the guys who made the profile have some idea.

This was a big win.  Again, libstdc++ headers have dead static  
functions.  These dead static functions take some compile time, but  
take more time doing debug info generation and emission.

-Chris


From baldrick at free.fr  Tue Jul  8 15:00:16 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 08 Jul 2008 20:00:16 -0000
Subject: [llvm-commits] [llvm] r53244 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
Message-ID: <200807082000.m68K0I1O006297@zion.cs.uiuc.edu>

Author: baldrick
Date: Tue Jul  8 15:00:05 2008
New Revision: 53244

URL: http://llvm.org/viewvc/llvm-project?rev=53244&view=rev
Log:
Add missing select_cc libcall line, somehow omitted
in LegalizeTypes.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=53244&r1=53243&r2=53244&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Tue Jul  8 15:00:05 2008
@@ -439,6 +439,7 @@
     LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64;
     break;
   case ISD::SETO:
+    LC1 = (VT == MVT::f32) ? RTLIB::O_F32 : RTLIB::O_F64;
     break;
   default:
     LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64;




From baldrick at free.fr  Tue Jul  8 15:03:30 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 08 Jul 2008 20:03:30 -0000
Subject: [llvm-commits] [llvm] r53245 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeFloatTypes.cpp
 LegalizeIntegerTypes.cpp LegalizeTypes.h LegalizeVectorTypes.cpp
Message-ID: <200807082003.m68K3VDF006406@zion.cs.uiuc.edu>

Author: baldrick
Date: Tue Jul  8 15:03:24 2008
New Revision: 53245

URL: http://llvm.org/viewvc/llvm-project?rev=53245&view=rev
Log:
Remove custom expansion from LegalizeTypes when doing
soft float: experiments show that targets aren't
expecting this for results or for operands.  Add
support select/select_cc result soft float and
correct operand soft float for these.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=53245&r1=53244&r2=53245&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Tue Jul  8 15:03:24 2008
@@ -48,18 +48,6 @@
         cerr << "\n");
   SDOperand R = SDOperand();
 
-  // See if the target wants to custom expand this node.
-  if (TLI.getOperationAction(N->getOpcode(), N->getValueType(ResNo)) ==
-      TargetLowering::Custom) {
-    // If the target wants to, allow it to lower this itself.
-    if (SDNode *P = TLI.ReplaceNodeResults(N, DAG)) {
-      // Everything that once used N now uses P.  We are guaranteed that the
-      // result value types of N and the result value types of P match.
-      ReplaceNodeWith(N, P);
-      return;
-    }
-  }
-
   switch (N->getOpcode()) {
   default:
 #ifndef NDEBUG
@@ -78,6 +66,8 @@
     case ISD::FP_EXTEND:   R = SoftenFloatRes_FP_EXTEND(N); break;
     case ISD::FP_ROUND:    R = SoftenFloatRes_FP_ROUND(N); break;
     case ISD::LOAD:        R = SoftenFloatRes_LOAD(N); break;
+    case ISD::SELECT:      R = SoftenFloatRes_SELECT(N); break;
+    case ISD::SELECT_CC:   R = SoftenFloatRes_SELECT_CC(N); break;
     case ISD::SINT_TO_FP:
     case ISD::UINT_TO_FP:  R = SoftenFloatRes_XINT_TO_FP(N); break;
 
@@ -244,6 +234,19 @@
   return BitConvertToInteger(DAG.getNode(ISD::FP_EXTEND, VT, NL));
 }
 
+SDOperand DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N) {
+  SDOperand LHS = GetSoftenedFloat(N->getOperand(1));
+  SDOperand RHS = GetSoftenedFloat(N->getOperand(2));
+  return DAG.getNode(ISD::SELECT, LHS.getValueType(), N->getOperand(0),LHS,RHS);
+}
+
+SDOperand DAGTypeLegalizer::SoftenFloatRes_SELECT_CC(SDNode *N) {
+  SDOperand LHS = GetSoftenedFloat(N->getOperand(2));
+  SDOperand RHS = GetSoftenedFloat(N->getOperand(3));
+  return DAG.getNode(ISD::SELECT_CC, LHS.getValueType(), N->getOperand(0),
+                     N->getOperand(1), LHS, RHS, N->getOperand(4));
+}
+
 SDOperand DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) {
   bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
   MVT DestVT = N->getValueType(0);
@@ -352,29 +355,23 @@
 bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
   DEBUG(cerr << "Soften float operand " << OpNo << ": "; N->dump(&DAG);
         cerr << "\n");
-  SDOperand Res(0, 0);
+  SDOperand Res = SDOperand();
 
-  if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
-      == TargetLowering::Custom)
-    Res = TLI.LowerOperation(SDOperand(N, OpNo), DAG);
-
-  if (Res.Val == 0) {
-    switch (N->getOpcode()) {
-    default:
+  switch (N->getOpcode()) {
+  default:
 #ifndef NDEBUG
-      cerr << "SoftenFloatOperand Op #" << OpNo << ": ";
-      N->dump(&DAG); cerr << "\n";
+    cerr << "SoftenFloatOperand Op #" << OpNo << ": ";
+    N->dump(&DAG); cerr << "\n";
 #endif
-      assert(0 && "Do not know how to soften this operator's operand!");
-      abort();
+    assert(0 && "Do not know how to soften this operator's operand!");
+    abort();
 
-    case ISD::BIT_CONVERT: Res = SoftenFloatOp_BIT_CONVERT(N); break;
+  case ISD::BIT_CONVERT: Res = SoftenFloatOp_BIT_CONVERT(N); break;
 
-    case ISD::BR_CC:     Res = SoftenFloatOp_BR_CC(N); break;
-    case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
-    case ISD::SETCC:     Res = SoftenFloatOp_SETCC(N); break;
-    case ISD::STORE:     Res = SoftenFloatOp_STORE(N, OpNo); break;
-    }
+  case ISD::BR_CC:     Res = SoftenFloatOp_BR_CC(N); break;
+  case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
+  case ISD::SETCC:     Res = SoftenFloatOp_SETCC(N); break;
+  case ISD::STORE:     Res = SoftenFloatOp_STORE(N, OpNo); break;
   }
 
   // If the result is null, the sub-method took care of registering results etc.
@@ -403,8 +400,7 @@
                                            ISD::CondCode &CCCode) {
   SDOperand LHSInt = GetSoftenedFloat(NewLHS);
   SDOperand RHSInt = GetSoftenedFloat(NewRHS);
-  MVT VT  = NewLHS.getValueType();
-  MVT NVT = LHSInt.getValueType();
+  MVT VT = NewLHS.getValueType();
 
   assert((VT == MVT::f32 || VT == MVT::f64) && "Unsupported setcc type!");
 
@@ -468,13 +464,13 @@
   }
 
   SDOperand Ops[2] = { LHSInt, RHSInt };
-  NewLHS = MakeLibCall(LC1, NVT, Ops, 2, false/*sign irrelevant*/);
-  NewRHS = DAG.getConstant(0, NVT);
+  NewLHS = MakeLibCall(LC1, MVT::i32, Ops, 2, false/*sign irrelevant*/);
+  NewRHS = DAG.getConstant(0, MVT::i32);
+  CCCode = TLI.getCmpLibcallCC(LC1);
   if (LC2 != RTLIB::UNKNOWN_LIBCALL) {
     SDOperand Tmp = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS),
-                                NewLHS, NewRHS,
-                                DAG.getCondCode(TLI.getCmpLibcallCC(LC1)));
-    NewLHS = MakeLibCall(LC2, NVT, Ops, 2, false/*sign irrelevant*/);
+                                NewLHS, NewRHS, DAG.getCondCode(CCCode));
+    NewLHS = MakeLibCall(LC2, MVT::i32, Ops, 2, false/*sign irrelevant*/);
     NewLHS = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS), NewLHS,
                          NewRHS, DAG.getCondCode(TLI.getCmpLibcallCC(LC2)));
     NewLHS = DAG.getNode(ISD::OR, Tmp.getValueType(), Tmp, NewLHS);
@@ -794,7 +790,7 @@
 /// need promotion or expansion as well as the specified one.
 bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
   DEBUG(cerr << "Expand float operand: "; N->dump(&DAG); cerr << "\n");
-  SDOperand Res(0, 0);
+  SDOperand Res = SDOperand();
 
   if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
       == TargetLowering::Custom)

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=53245&r1=53244&r2=53245&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Tue Jul  8 15:03:24 2008
@@ -465,7 +465,7 @@
 /// node may need promotion or expansion as well as the specified one.
 bool DAGTypeLegalizer::PromoteIntegerOperand(SDNode *N, unsigned OpNo) {
   DEBUG(cerr << "Promote integer operand: "; N->dump(&DAG); cerr << "\n");
-  SDOperand Res(0, 0);
+  SDOperand Res = SDOperand();
 
   if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
       == TargetLowering::Custom)
@@ -1641,7 +1641,7 @@
 /// node may need promotion or expansion as well as the specified one.
 bool DAGTypeLegalizer::ExpandIntegerOperand(SDNode *N, unsigned OpNo) {
   DEBUG(cerr << "Expand integer operand: "; N->dump(&DAG); cerr << "\n");
-  SDOperand Res(0, 0);
+  SDOperand Res = SDOperand();
 
   if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
       == TargetLowering::Custom)

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=53245&r1=53244&r2=53245&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Tue Jul  8 15:03:24 2008
@@ -338,6 +338,8 @@
   SDOperand SoftenFloatRes_FP_ROUND(SDNode *N);
   SDOperand SoftenFloatRes_FSUB(SDNode *N);
   SDOperand SoftenFloatRes_LOAD(SDNode *N);
+  SDOperand SoftenFloatRes_SELECT(SDNode *N);
+  SDOperand SoftenFloatRes_SELECT_CC(SDNode *N);
   SDOperand SoftenFloatRes_XINT_TO_FP(SDNode *N);
 
   // Operand Float to Integer Conversion.

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=53245&r1=53244&r2=53245&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Tue Jul  8 15:03:24 2008
@@ -150,7 +150,7 @@
 bool DAGTypeLegalizer::ScalarizeOperand(SDNode *N, unsigned OpNo) {
   DEBUG(cerr << "Scalarize node operand " << OpNo << ": "; N->dump(&DAG);
         cerr << "\n");
-  SDOperand Res(0, 0);
+  SDOperand Res = SDOperand();
 
   if (Res.Val == 0) {
     switch (N->getOpcode()) {
@@ -535,7 +535,7 @@
 /// node may need legalization as well as the specified one.
 bool DAGTypeLegalizer::SplitOperand(SDNode *N, unsigned OpNo) {
   DEBUG(cerr << "Split node operand: "; N->dump(&DAG); cerr << "\n");
-  SDOperand Res(0, 0);
+  SDOperand Res = SDOperand();
 
   if (Res.Val == 0) {
     switch (N->getOpcode()) {




From evan.cheng at apple.com  Tue Jul  8 15:06:44 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 08 Jul 2008 20:06:44 -0000
Subject: [llvm-commits] [llvm] r53246 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp SelectionDAG.cpp
Message-ID: <200807082006.m68K6jSB006563@zion.cs.uiuc.edu>

Author: evancheng
Date: Tue Jul  8 15:06:39 2008
New Revision: 53246

URL: http://llvm.org/viewvc/llvm-project?rev=53246&view=rev
Log:
Do not CSE DEBUG_LOC, DBG_LABEL, DBG_STOPPOINT, DECLARE, and EH_LABEL SDNode's. This improves compile time slightly at -O0 -g.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=53246&r1=53245&r2=53246&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Jul  8 15:06:39 2008
@@ -1094,12 +1094,10 @@
         unsigned Col = DSP->getColumn();
         
         if (useDEBUG_LOC) {
-          SmallVector<SDOperand, 8> Ops;
-          Ops.push_back(Tmp1);  // chain
-          Ops.push_back(DAG.getConstant(Line, MVT::i32));  // line #
-          Ops.push_back(DAG.getConstant(Col, MVT::i32));   // col #
-          Ops.push_back(DAG.getConstant(SrcFile, MVT::i32));  // source file id
-          Result = DAG.getNode(ISD::DEBUG_LOC, MVT::Other, &Ops[0], Ops.size());
+          SDOperand Ops[] = { Tmp1, DAG.getConstant(Line, MVT::i32),
+                              DAG.getConstant(Col, MVT::i32),
+                              DAG.getConstant(SrcFile, MVT::i32) };
+          Result = DAG.getNode(ISD::DEBUG_LOC, MVT::Other, Ops, 4);
         } else {
           unsigned ID = MMI->RecordSourceLine(Line, Col, SrcFile);
           Result = DAG.getLabel(ISD::DBG_LABEL, Tmp1, ID);
@@ -1109,25 +1107,27 @@
       }
       break;
     }
-    case TargetLowering::Legal:
-      if (Tmp1 != Node->getOperand(0) ||
-          getTypeAction(Node->getOperand(1).getValueType()) == Promote) {
-        SmallVector<SDOperand, 8> Ops;
-        Ops.push_back(Tmp1);
-        if (getTypeAction(Node->getOperand(1).getValueType()) == Legal) {
-          Ops.push_back(Node->getOperand(1));  // line # must be legal.
-          Ops.push_back(Node->getOperand(2));  // col # must be legal.
-        } else {
-          // Otherwise promote them.
-          Ops.push_back(PromoteOp(Node->getOperand(1)));
-          Ops.push_back(PromoteOp(Node->getOperand(2)));
-        }
-        Ops.push_back(Node->getOperand(3));  // filename must be legal.
-        Ops.push_back(Node->getOperand(4));  // working dir # must be legal.
-        Result = DAG.UpdateNodeOperands(Result, &Ops[0], Ops.size());
+    case TargetLowering::Legal: {
+      LegalizeAction Action = getTypeAction(Node->getOperand(1).getValueType());
+      if (Action == Legal && Tmp1 == Node->getOperand(0))
+        break;
+
+      SmallVector<SDOperand, 8> Ops;
+      Ops.push_back(Tmp1);
+      if (Action == Legal) {
+        Ops.push_back(Node->getOperand(1));  // line # must be legal.
+        Ops.push_back(Node->getOperand(2));  // col # must be legal.
+      } else {
+        // Otherwise promote them.
+        Ops.push_back(PromoteOp(Node->getOperand(1)));
+        Ops.push_back(PromoteOp(Node->getOperand(2)));
       }
+      Ops.push_back(Node->getOperand(3));  // filename must be legal.
+      Ops.push_back(Node->getOperand(4));  // working dir # must be legal.
+      Result = DAG.UpdateNodeOperands(Result, &Ops[0], Ops.size());
       break;
     }
+    }
     break;
 
   case ISD::DECLARE:
@@ -1150,14 +1150,24 @@
     assert(Node->getNumOperands() == 4 && "Invalid DEBUG_LOC node!");
     switch (TLI.getOperationAction(ISD::DEBUG_LOC, MVT::Other)) {
     default: assert(0 && "This action is not supported yet!");
-    case TargetLowering::Legal:
+    case TargetLowering::Legal: {
+      LegalizeAction Action = getTypeAction(Node->getOperand(1).getValueType());
       Tmp1 = LegalizeOp(Node->getOperand(0));  // Legalize the chain.
-      Tmp2 = LegalizeOp(Node->getOperand(1));  // Legalize the line #.
-      Tmp3 = LegalizeOp(Node->getOperand(2));  // Legalize the col #.
-      Tmp4 = LegalizeOp(Node->getOperand(3));  // Legalize the source file id.
+      if (Action == Legal && Tmp1 == Node->getOperand(0))
+        break;
+      if (Action == Legal) {
+        Tmp2 = Node->getOperand(1);
+        Tmp3 = Node->getOperand(2);
+        Tmp4 = Node->getOperand(3);
+      } else {
+        Tmp2 = LegalizeOp(Node->getOperand(1));  // Legalize the line #.
+        Tmp3 = LegalizeOp(Node->getOperand(2));  // Legalize the col #.
+        Tmp4 = LegalizeOp(Node->getOperand(3));  // Legalize the source file id.
+      }
       Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3, Tmp4);
       break;
     }
+    }
     break;    
 
   case ISD::DBG_LABEL:

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53246&r1=53245&r2=53246&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Jul  8 15:06:39 2008
@@ -395,10 +395,6 @@
     ID.AddPointer(DSP->getCompileUnit());
     break;
   }
-  case ISD::DBG_LABEL:
-  case ISD::EH_LABEL:
-    ID.AddInteger(cast<LabelSDNode>(N)->getLabelID());
-    break;
   case ISD::SRCVALUE:
     ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
     break;
@@ -607,7 +603,11 @@
   // flag result (which cannot be CSE'd) or is one of the special cases that are
   // not subject to CSE.
   if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
-      !N->isTargetOpcode()) {
+      !N->isTargetOpcode() &&
+      N->getOpcode() != ISD::DBG_LABEL &&
+      N->getOpcode() != ISD::DBG_STOPPOINT &&
+      N->getOpcode() != ISD::EH_LABEL &&
+      N->getOpcode() != ISD::DECLARE) {
     N->dump(this);
     cerr << "\n";
     assert(0 && "Node is not in map!");
@@ -622,8 +622,19 @@
 ///
 SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) {
   assert(N->getNumOperands() && "This is a leaf node!");
-  if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
+
+  if (N->getValueType(0) == MVT::Flag)
+    return 0;   // Never CSE anything that produces a flag.
+
+  switch (N->getOpcode()) {
+  default: break;
+  case ISD::HANDLENODE:
+  case ISD::DBG_LABEL:
+  case ISD::DBG_STOPPOINT:
+  case ISD::EH_LABEL:
+  case ISD::DECLARE:
     return 0;    // Never add these nodes.
+  }
   
   // Check that remaining values produced are not flags.
   for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
@@ -641,8 +652,17 @@
 /// node already exists with these operands, the slot will be non-null.
 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDOperand Op,
                                            void *&InsertPos) {
-  if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
+  if (N->getValueType(0) == MVT::Flag)
+    return 0;   // Never CSE anything that produces a flag.
+
+  switch (N->getOpcode()) {
+  default: break;
+  case ISD::HANDLENODE:
+  case ISD::DBG_LABEL:
+  case ISD::DBG_STOPPOINT:
+  case ISD::EH_LABEL:
     return 0;    // Never add these nodes.
+  }
   
   // Check that remaining values produced are not flags.
   for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
@@ -663,7 +683,6 @@
                                            SDOperand Op1, SDOperand Op2,
                                            void *&InsertPos) {
   if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
-    return 0;    // Never add these nodes.
   
   // Check that remaining values produced are not flags.
   for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
@@ -684,8 +703,18 @@
 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 
                                            const SDOperand *Ops,unsigned NumOps,
                                            void *&InsertPos) {
-  if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
+  if (N->getValueType(0) == MVT::Flag)
+    return 0;   // Never CSE anything that produces a flag.
+
+  switch (N->getOpcode()) {
+  default: break;
+  case ISD::HANDLENODE:
+  case ISD::DBG_LABEL:
+  case ISD::DBG_STOPPOINT:
+  case ISD::EH_LABEL:
+  case ISD::DECLARE:
     return 0;    // Never add these nodes.
+  }
   
   // Check that remaining values produced are not flags.
   for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
@@ -1010,18 +1039,8 @@
 SDOperand SelectionDAG::getDbgStopPoint(SDOperand Root,
                                         unsigned Line, unsigned Col,
                                         const CompileUnitDesc *CU) {
-  FoldingSetNodeID ID;
-  SDOperand Ops[] = { Root };
-  AddNodeIDNode(ID, ISD::DBG_STOPPOINT, getVTList(MVT::Other), &Ops[0], 1);
-  ID.AddInteger(Line);
-  ID.AddInteger(Col);
-  ID.AddPointer(CU);
-  void *IP = 0;
-  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
-    return SDOperand(E, 0);
   SDNode *N = getAllocator().Allocate<DbgStopPointSDNode>();
   new (N) DbgStopPointSDNode(Root, Line, Col, CU);
-  CSEMap.InsertNode(N, IP);
   AllNodes.push_back(N);
   return SDOperand(N, 0);
 }




From dpatel at apple.com  Tue Jul  8 15:48:05 2008
From: dpatel at apple.com (Devang Patel)
Date: Tue, 08 Jul 2008 20:48:05 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53247 -
	/llvm-gcc-4.2/trunk/gcc/doc/invoke.texi
Message-ID: <200807082048.m68Km5mY005007@zion.cs.uiuc.edu>

Author: dpatel
Date: Tue Jul  8 15:47:55 2008
New Revision: 53247

URL: http://llvm.org/viewvc/llvm-project?rev=53247&view=rev
Log:
Clarify -mllvm info.

Modified:
    llvm-gcc-4.2/trunk/gcc/doc/invoke.texi

Modified: llvm-gcc-4.2/trunk/gcc/doc/invoke.texi
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/doc/invoke.texi?rev=53247&r1=53246&r2=53247&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/doc/invoke.texi (original)
+++ llvm-gcc-4.2/trunk/gcc/doc/invoke.texi Tue Jul  8 15:47:55 2008
@@ -4848,8 +4848,10 @@
 @c LLVM LOCAL begin
 @item -mllvm @var{string}
 @opindex mllvm
-This options provides a way to supply llvm optimization and code
-generation debugging options to LLVM component directly. 
+This option provides a way to supply llvm optimization and code
+generation debugging options to LLVM component directly. This option
+is intended for compiler developers, who are investigationg LLVM 
+component bug, only.
 @c LLVM LOCAL end
 
 @item -time




From kledzik at apple.com  Tue Jul  8 16:14:10 2008
From: kledzik at apple.com (Nick Kledzik)
Date: Tue, 08 Jul 2008 21:14:10 -0000
Subject: [llvm-commits] [llvm] r53249 - in /llvm/trunk/tools/lto:
 LTOCodeGenerator.cpp LTOCodeGenerator.h lto.cpp
Message-ID: <200807082114.m68LEAP2006918@zion.cs.uiuc.edu>

Author: kledzik
Date: Tue Jul  8 16:14:10 2008
New Revision: 53249

URL: http://llvm.org/viewvc/llvm-project?rev=53249&view=rev
Log:
fix dangling pointer and argv off by one errors.  Add support for --disable-inlining

Modified:
    llvm/trunk/tools/lto/LTOCodeGenerator.cpp
    llvm/trunk/tools/lto/LTOCodeGenerator.h
    llvm/trunk/tools/lto/lto.cpp

Modified: llvm/trunk/tools/lto/LTOCodeGenerator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOCodeGenerator.cpp?rev=53249&r1=53248&r2=53249&view=diff

==============================================================================
--- llvm/trunk/tools/lto/LTOCodeGenerator.cpp (original)
+++ llvm/trunk/tools/lto/LTOCodeGenerator.cpp Tue Jul  8 16:14:10 2008
@@ -23,6 +23,7 @@
 #include "llvm/DerivedTypes.h"
 #include "llvm/ModuleProvider.h"
 #include "llvm/Bitcode/ReaderWriter.h"
+#include "llvm/Support/CommandLine.h"
 #include "llvm/Support/SystemUtils.h"
 #include "llvm/Support/Mangler.h"
 #include "llvm/Support/MemoryBuffer.h"
@@ -52,6 +53,8 @@
 
 using namespace llvm;
 
+static cl::opt<bool> DisableInline("disable-inlining",
+  cl::desc("Do not run the inliner pass"));
 
 
 const char* LTOCodeGenerator::getVersionString()
@@ -334,17 +337,10 @@
             break;
     }
 
-    for (unsigned opt_index = 0, opt_size = _codegenOptions.size();
-         opt_index < opt_size; ++opt_index) {
-      std::vector<const char *> cgOpts;
-      std::string &optString = _codegenOptions[opt_index];
-      for (std::string Opt = getToken(optString);
-           !Opt.empty(); Opt = getToken(optString))
-        cgOpts.push_back(Opt.c_str());
-     
-      int pseudo_argc = cgOpts.size()-1;
-      cl::ParseCommandLineOptions(pseudo_argc, (char**)&cgOpts[0]);
-     }
+    // if options were requested, set them
+    if ( !_codegenOptions.empty() )
+        cl::ParseCommandLineOptions(_codegenOptions.size(), 
+                                                (char**)&_codegenOptions[0]);
 
     // Instantiate the pass manager to organize the passes.
     PassManager passes;
@@ -375,7 +371,8 @@
     // function pointers.  When this happens, we often have to resolve varargs
     // calls, etc, so let instcombine do this.
     passes.add(createInstructionCombiningPass());
-    passes.add(createFunctionInliningPass());     // Inline small functions
+    if (!DisableInline)
+        passes.add(createFunctionInliningPass()); // Inline small functions
     passes.add(createPruneEHPass());              // Remove dead EH info
     passes.add(createGlobalDCEPass());            // Remove dead functions
 
@@ -454,4 +451,15 @@
 }
 
 
-
+/// Optimize merged modules using various IPO passes
+void LTOCodeGenerator::setCodeGenDebugOptions(const char* options)
+{
+    std::string ops(options);
+    for (std::string o = getToken(ops); !o.empty(); o = getToken(ops)) {
+        // ParseCommandLineOptions() expects argv[0] to be program name.
+        // Lazily add that.
+        if ( _codegenOptions.empty() ) 
+            _codegenOptions.push_back("libLTO");
+        _codegenOptions.push_back(strdup(o.c_str()));
+    }
+}

Modified: llvm/trunk/tools/lto/LTOCodeGenerator.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOCodeGenerator.h?rev=53249&r1=53248&r2=53249&view=diff

==============================================================================
--- llvm/trunk/tools/lto/LTOCodeGenerator.h (original)
+++ llvm/trunk/tools/lto/LTOCodeGenerator.h Tue Jul  8 16:14:10 2008
@@ -39,9 +39,7 @@
     bool                writeMergedModules(const char* path, 
                                                            std::string& errMsg);
     const void*         compile(size_t* length, std::string& errMsg);
-    void                setCodeGenDebugOptions(const char *opts) {
-                          _codegenOptions.push_back(std::string(opts)); 
-                        }
+    void                setCodeGenDebugOptions(const char *opts); 
 private:
     bool                generateAssemblyCode(std::ostream& out, 
                                                         std::string& errMsg);
@@ -59,7 +57,7 @@
     lto_codegen_model           _codeModel;
     StringSet                   _mustPreserveSymbols;
     llvm::MemoryBuffer*         _nativeObjectFile;
-    llvm::SmallVector<std::string, 4> _codegenOptions;
+    std::vector<const char*>    _codegenOptions;
 };
 
 #endif // LTO_CODE_GENERATOR_H

Modified: llvm/trunk/tools/lto/lto.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/lto.cpp?rev=53249&r1=53248&r2=53249&view=diff

==============================================================================
--- llvm/trunk/tools/lto/lto.cpp (original)
+++ llvm/trunk/tools/lto/lto.cpp Tue Jul  8 16:14:10 2008
@@ -237,6 +237,10 @@
     return cg->compile(length, sLastErrorString);
 }
 
+
+//
+// Used to pass extra options to the code generator
+//
 extern void
 lto_codegen_debug_options(lto_code_gen_t cg, const char * opt)
 {




From isanbard at gmail.com  Tue Jul  8 16:32:00 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 08 Jul 2008 21:32:00 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53251 - in /llvm-gcc-4.2/trunk:
 build_gcc libcpp/include/cpplib.h
Message-ID: <200807082132.m68LW0jl007963@zion.cs.uiuc.edu>

Author: void
Date: Tue Jul  8 16:32:00 2008
New Revision: 53251

URL: http://llvm.org/viewvc/llvm-project?rev=53251&view=rev
Log:
Support for building 64-bit on x86.

Modified:
    llvm-gcc-4.2/trunk/build_gcc
    llvm-gcc-4.2/trunk/libcpp/include/cpplib.h

Modified: llvm-gcc-4.2/trunk/build_gcc
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/build_gcc?rev=53251&r1=53250&r2=53251&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/build_gcc (original)
+++ llvm-gcc-4.2/trunk/build_gcc Tue Jul  8 16:32:00 2008
@@ -9,6 +9,7 @@
 TRANSLATE_ARCH="sed -e s/ppc/powerpc/ -e s/i386/i686/ -e s/ppc64/powerpc64/"
 TRANSLATE_TARGETS="sed -e s/ppc/powerpc/ -e s/i386/i686/ -e s/x86_64// \
   -e s/powerpc64// -e s/ppc64//"
+OMIT_X86_64="sed -e s/x86_64//"
 
 # Build GCC the "Apple way".
 # Parameters:
@@ -22,7 +23,7 @@
 # compilers will generate code for.  If the current machine isn't in
 # the list, a compiler for it will get built anyway, but won't be
 # installed.
-TARGETS=`echo $2 | $TRANSLATE_TARGETS`
+TARGETS=`echo $2 | $TRANSLATE_TARGETS | $OMIT_X86_64`
 
 # The GNU makefile target ('bootstrap' by default).
 BOOTSTRAP=${BOOTSTRAP-bootstrap}

Modified: llvm-gcc-4.2/trunk/libcpp/include/cpplib.h
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/libcpp/include/cpplib.h?rev=53251&r1=53250&r2=53251&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/libcpp/include/cpplib.h (original)
+++ llvm-gcc-4.2/trunk/libcpp/include/cpplib.h Tue Jul  8 16:32:00 2008
@@ -908,34 +908,31 @@
 				 const char *msgid, ...) ATTRIBUTE_PRINTF_5;
 
 /* APPLE LOCAL begin headermaps 3871393 */
+#include <stdint.h>
+
 #define HMAP_SAME_ENDIANNESS_MAGIC      (((((('h' << 8) | 'm') << 8) | 'a') << 8) | 'p')
 #define HMAP_OPPOSITE_ENDIANNESS_MAGIC  (((((('p' << 8) | 'a') << 8) | 'm') << 8) | 'h')
 
 #define HMAP_NOT_A_KEY   0x00000000
 
-#if !defined(uint32)
-typedef unsigned short  uint16;
-typedef unsigned long   uint32;
-#endif
-
 struct hmap_bucket
 {
-  uint32 key;          /* Offset (into strings) of key                */
+  uint32_t key;        /* Offset (into strings) of key                */
   struct {
-    uint32 prefix;     /* Offset (into strings) of value prefix   */
-    uint32 suffix;     /* Offset (into strings) of value suffix   */
+    uint32_t prefix;   /* Offset (into strings) of value prefix   */
+    uint32_t suffix;   /* Offset (into strings) of value suffix   */
   } value;             /* Value (prefix- and suffix-strings)          */
 };
 
 struct hmap_header_map
 {
-  uint32 magic;             /* Magic word, also indicates byte order       */
-  uint16 version;           /* Version number -- currently 1               */
-  uint16 _reserved;         /* Reserved for future use -- zero for now     */
-  uint32 strings_offset;    /* Offset to start of string pool              */
-  uint32 count;             /* Number of entries in the string table       */
-  uint32 capacity;          /* Number of buckets (always a power of 2)     */
-  uint32 max_value_length;  /* Length of longest result path (excl. '\0')  */
+  uint32_t magic;             /* Magic word, also indicates byte order       */
+  uint16_t version;           /* Version number -- currently 1               */
+  uint16_t _reserved;         /* Reserved for future use -- zero for now     */
+  uint32_t strings_offset;    /* Offset to start of string pool              */
+  uint32_t count;             /* Number of entries in the string table       */
+  uint32_t capacity;          /* Number of buckets (always a power of 2)     */
+  uint32_t max_value_length;  /* Length of longest result path (excl. '\0')  */
   struct hmap_bucket buckets[1]; /* Inline array of 'capacity' maptable buckets */
   /* Strings follow the buckets, at strings_offset.  */
 };




From dalej at apple.com  Tue Jul  8 16:53:43 2008
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 08 Jul 2008 21:53:43 -0000
Subject: [llvm-commits] [llvm] r53253 -
	/llvm/trunk/lib/CodeGen/DwarfWriter.cpp
Message-ID: <200807082153.m68LrhaW009266@zion.cs.uiuc.edu>

Author: johannes
Date: Tue Jul  8 16:53:43 2008
New Revision: 53253

URL: http://llvm.org/viewvc/llvm-project?rev=53253&view=rev
Log:
Remove some dead code.


Modified:
    llvm/trunk/lib/CodeGen/DwarfWriter.cpp

Modified: llvm/trunk/lib/CodeGen/DwarfWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DwarfWriter.cpp?rev=53253&r1=53252&r2=53253&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/DwarfWriter.cpp (original)
+++ llvm/trunk/lib/CodeGen/DwarfWriter.cpp Tue Jul  8 16:53:43 2008
@@ -2720,8 +2720,6 @@
   /// content.
   void BeginModule(Module *M) {
     this->M = M;
-    
-    if (!ShouldEmitDwarf()) return;
   }
 
   /// EndModule - Emit all Dwarf sections that should come after the content.




From dalej at apple.com  Tue Jul  8 16:56:22 2008
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 08 Jul 2008 21:56:22 -0000
Subject: [llvm-commits] [llvm] r53254 - in /llvm/trunk/lib/Target:
 ARM/ARMAsmPrinter.cpp PowerPC/PPCAsmPrinter.cpp X86/X86ATTAsmPrinter.cpp
Message-ID: <200807082156.m68LuNJb009391@zion.cs.uiuc.edu>

Author: johannes
Date: Tue Jul  8 16:56:22 2008
New Revision: 53254

URL: http://llvm.org/viewvc/llvm-project?rev=53254&view=rev
Log:
Make debug info come out in data-only files.

This is a question of the debugging setup code not
being called at the right time, and it's called from
target-dependent code for some reason.  I have only
attempted to fix Darwin, but I'm pretty sure it's
broken elsewhere; I'll leave that to people who can
test it.


Modified:
    llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
    llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
    llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=53254&r1=53253&r2=53254&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Tue Jul  8 16:56:22 2008
@@ -42,11 +42,13 @@
 namespace {
   struct VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
     ARMAsmPrinter(std::ostream &O, TargetMachine &TM, const TargetAsmInfo *T)
-      : AsmPrinter(O, TM, T), DW(O, this, T), AFI(NULL), InCPMode(false) {
+      : AsmPrinter(O, TM, T), DW(O, this, T), MMI(0), AFI(NULL), 
+        InCPMode(false) {
       Subtarget = &TM.getSubtarget<ARMSubtarget>();
     }
 
     DwarfWriter DW;
+    MachineModuleInfo *MMI;
 
     /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
     /// make the right decision when printing asm code for different targets.
@@ -176,8 +178,6 @@
 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
   AFI = MF.getInfo<ARMFunctionInfo>();
 
-  DW.SetModuleInfo(&getAnalysis<MachineModuleInfo>());
-
   SetupMachineFunction(MF);
   O << "\n";
 
@@ -800,6 +800,11 @@
   
   bool Result = AsmPrinter::doInitialization(M);
 
+  // AsmPrinter::doInitialization should have done this analysis.
+  MMI = getAnalysisToUpdate<MachineModuleInfo>();
+  assert(MMI);
+  DW.SetModuleInfo(MMI);
+
   // Darwin wants symbols to be quoted if they have complex names.
   if (Subtarget->isTargetDarwin())
     Mang->setUseQuotes(true);

Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=53254&r1=53253&r2=53254&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Tue Jul  8 16:56:22 2008
@@ -790,9 +790,6 @@
 /// method to print assembly for each instruction.
 ///
 bool DarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
-  // We need this for Personality functions.
-  MMI = &getAnalysis<MachineModuleInfo>();
-  DW.SetModuleInfo(MMI);
 
   SetupMachineFunction(MF);
   O << "\n\n";
@@ -887,6 +884,12 @@
      
   bool Result = AsmPrinter::doInitialization(M);
   
+  // We need this for Personality functions.
+  // AsmPrinter::doInitialization should have done this analysis.
+  MMI = getAnalysisToUpdate<MachineModuleInfo>();
+  assert(MMI);
+  DW.SetModuleInfo(MMI);
+
   // Darwin wants symbols to be quoted if they have complex names.
   Mang->setUseQuotes(true);
   

Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=53254&r1=53253&r2=53254&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Tue Jul  8 16:56:22 2008
@@ -232,13 +232,6 @@
   const Function *F = MF.getFunction();
   unsigned CC = F->getCallingConv();
 
-  if (TAI->doesSupportDebugInformation()) {
-    // Let PassManager know we need debug information and relay
-    // the MachineModuleInfo address on to DwarfWriter.
-    MMI = &getAnalysis<MachineModuleInfo>();
-    DW.SetModuleInfo(MMI);
-  }
-
   SetupMachineFunction(MF);
   O << "\n\n";
 
@@ -751,13 +744,20 @@
 
 /// doInitialization
 bool X86ATTAsmPrinter::doInitialization(Module &M) {
+
+  bool Result = AsmPrinter::doInitialization(M);
+
   if (TAI->doesSupportDebugInformation()) {
     // Emit initial debug information.
     DW.BeginModule(&M);
+    // Let PassManager know we need debug information and relay
+    // the MachineModuleInfo address on to DwarfWriter.
+    // AsmPrinter::doInitialization should have done this analysis.
+    MMI = getAnalysisToUpdate<MachineModuleInfo>();
+    assert(MMI);
+    DW.SetModuleInfo(MMI);
   }
 
-  bool Result = AsmPrinter::doInitialization(M);
-
   // Darwin wants symbols to be quoted if they have complex names.
   if (Subtarget->isTargetDarwin())
     Mang->setUseQuotes(true);




From dalej at apple.com  Tue Jul  8 16:57:56 2008
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 08 Jul 2008 21:57:56 -0000
Subject: [llvm-commits] [llvm] r53255 -
	/llvm/trunk/test/DebugInfo/dataOnly.ll
Message-ID: <200807082157.m68Lvudd009542@zion.cs.uiuc.edu>

Author: johannes
Date: Tue Jul  8 16:57:56 2008
New Revision: 53255

URL: http://llvm.org/viewvc/llvm-project?rev=53255&view=rev
Log:
Testcase for debug info from data-only files.
This one is x86-32-Darwin specific.


Added:
    llvm/trunk/test/DebugInfo/dataOnly.ll

Added: llvm/trunk/test/DebugInfo/dataOnly.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/dataOnly.ll?rev=53255&view=auto

==============================================================================
--- llvm/trunk/test/DebugInfo/dataOnly.ll (added)
+++ llvm/trunk/test/DebugInfo/dataOnly.ll Tue Jul  8 16:57:56 2008
@@ -0,0 +1,47 @@
+; RUN: llvm-as < %s | llc | grep DWARF
+; ModuleID = 'foo.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+	%llvm.dbg.anchor.type = type { i32, i32 }
+	%llvm.dbg.basictype.type = type { i32, {  }*, i8*, {  }*, i32, i64, i64, i64, i32, i32 }
+	%llvm.dbg.compile_unit.type = type { i32, {  }*, i32, i8*, i8*, i8* }
+	%llvm.dbg.global_variable.type = type { i32, {  }*, {  }*, i8*, i8*, i8*, {  }*, i32, {  }*, i1, i1, {  }* }
+ at x = common global i32 0		; <i32*> [#uses=1]
+ at llvm.dbg.global_variable = internal constant %llvm.dbg.global_variable.type {
+    i32 393268, 
+    {  }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.global_variables to {  }*), 
+    {  }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to {  }*), 
+    i8* getelementptr ([2 x i8]* @.str3, i32 0, i32 0), 
+    i8* getelementptr ([2 x i8]* @.str3, i32 0, i32 0), 
+    i8* null, 
+    {  }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to {  }*), 
+    i32 1, 
+    {  }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to {  }*), 
+    i1 false, 
+    i1 true, 
+    {  }* bitcast (i32* @x to {  }*) }, section "llvm.metadata"		; <%llvm.dbg.global_variable.type*> [#uses=0]
+ at llvm.dbg.global_variables = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 52 }, section "llvm.metadata"		; <%llvm.dbg.anchor.type*> [#uses=1]
+ at llvm.dbg.compile_unit = internal constant %llvm.dbg.compile_unit.type {
+    i32 393233, 
+    {  }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to {  }*), 
+    i32 1, 
+    i8* getelementptr ([6 x i8]* @.str, i32 0, i32 0), 
+    i8* getelementptr ([23 x i8]* @.str1, i32 0, i32 0), 
+    i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0) }, section "llvm.metadata"		; <%llvm.dbg.compile_unit.type*> [#uses=1]
+ at llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 17 }, section "llvm.metadata"		; <%llvm.dbg.anchor.type*> [#uses=1]
+ at .str = internal constant [6 x i8] c"foo.c\00", section "llvm.metadata"		; <[6 x i8]*> [#uses=1]
+ at .str1 = internal constant [23 x i8] c"/Volumes/MacOS9/tests/\00", section "llvm.metadata"		; <[23 x i8]*> [#uses=1]
+ at .str2 = internal constant [52 x i8] c"4.2.1 (Based on Apple Inc. build 5555) (LLVM build)\00", section "llvm.metadata"		; <[52 x i8]*> [#uses=1]
+ at .str3 = internal constant [2 x i8] c"x\00", section "llvm.metadata"		; <[2 x i8]*> [#uses=1]
+ at llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type {
+    i32 393252, 
+    {  }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to {  }*), 
+    i8* getelementptr ([4 x i8]* @.str4, i32 0, i32 0), 
+    {  }* null, 
+    i32 0, 
+    i64 32, 
+    i64 32, 
+    i64 0, 
+    i32 0, 
+    i32 5 }, section "llvm.metadata"		; <%llvm.dbg.basictype.type*> [#uses=1]
+ at .str4 = internal constant [4 x i8] c"int\00", section "llvm.metadata"		; <[4 x i8]*> [#uses=1]




From resistor at mac.com  Tue Jul  8 17:24:50 2008
From: resistor at mac.com (Owen Anderson)
Date: Tue, 08 Jul 2008 22:24:50 -0000
Subject: [llvm-commits] [llvm] r53256 -
	/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
Message-ID: <200807082224.m68MOoWq010573@zion.cs.uiuc.edu>

Author: resistor
Date: Tue Jul  8 17:24:50 2008
New Revision: 53256

URL: http://llvm.org/viewvc/llvm-project?rev=53256&view=rev
Log:
Make the local register allocator compute (purely local) liveness information for itself
rather than depending on LiveVariables.  This decreases compile time from:
0.5909s (LV + Regalloc) to 0.421s (just regalloc).

Modified:
    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53256&r1=53255&r2=53256&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Tue Jul  8 17:24:50 2008
@@ -14,7 +14,6 @@
 
 #define DEBUG_TYPE "regalloc"
 #include "llvm/BasicBlock.h"
-#include "llvm/CodeGen/LiveVariables.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
@@ -101,6 +100,10 @@
     // is no reason to spill it to memory when we need the register back.
     //
     BitVector VirtRegModified;
+    
+    // UsedInMultipleBlocks - Tracks whether a particular register is used in
+    // more than one block.
+    BitVector UsedInMultipleBlocks;
 
     void markVirtRegModified(unsigned Reg, bool Val = true) {
       assert(TargetRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
@@ -147,7 +150,6 @@
     }
 
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
-      AU.addRequired<LiveVariables>();
       AU.addRequiredID(PHIEliminationID);
       AU.addRequiredID(TwoAddressInstructionPassID);
       MachineFunctionPass::getAnalysisUsage(AU);
@@ -539,6 +541,26 @@
   return false;
 }
 
+// precedes - Helper function to determine with MachineInstr A
+// precedes MachineInstr B within the same MBB.
+static bool precedes(MachineBasicBlock::iterator A,
+                     MachineBasicBlock::iterator B) {
+  if (A == B)
+    return false;
+  
+  MachineBasicBlock::iterator I = A->getParent()->begin();
+  while (I != A->getParent()->end()) {
+    if (I == A)
+      return true;
+    else if (I == B)
+      return false;
+    
+    ++I;
+  }
+  
+  return false;
+}
+
 void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
   // loop over each instruction
   MachineBasicBlock::iterator MII = MBB.begin();
@@ -567,6 +589,97 @@
     }    
   }
   
+  
+  MachineRegisterInfo& MRI = MBB.getParent()->getRegInfo();
+  // Keep track of the most recently seen previous use or def of each reg, 
+  // so that we can update them with dead/kill markers.
+  std::map<unsigned, std::pair<MachineInstr*, unsigned> > LastUseDef;
+  for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
+       I != E; ++I) {
+    for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
+      MachineOperand& MO = I->getOperand(i);
+      // Uses don't trigger any flags, but we need to save
+      // them for later.  Also, we have to process these
+      // _before_ processing the defs, since an instr
+      // uses regs before it defs them.
+      if (MO.isReg() && MO.getReg() && MO.isUse())
+        LastUseDef[MO.getReg()] = std::make_pair(I, i);
+    }
+    
+    for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
+      MachineOperand& MO = I->getOperand(i);
+      // Defs others than 2-addr redefs _do_ trigger flag changes:
+      //   - A def followed by a def is dead
+      //   - A use followed by a def is a kill
+      if (MO.isReg() && MO.getReg() && MO.isDef() && 
+         !I->isRegReDefinedByTwoAddr(MO.getReg())) {
+        std::map<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
+          last = LastUseDef.find(MO.getReg());
+        if (last != LastUseDef.end()) {
+          MachineOperand& lastUD =
+                      last->second.first->getOperand(last->second.second);
+          if (lastUD.isDef())
+            lastUD.setIsDead(true);
+          else if (lastUD.isUse())
+            lastUD.setIsKill(true);
+        }
+        
+        LastUseDef[MO.getReg()] = std::make_pair(I, i);
+      }
+    }
+  }
+  
+  // Live-out (of the function) registers contain return values of the function,
+  // so we need to make sure they are alive at return time.
+  if (!MBB.empty() && MBB.back().getDesc().isReturn()) {
+    MachineInstr* Ret = &MBB.back();
+    for (MachineRegisterInfo::liveout_iterator
+         I = MF->getRegInfo().liveout_begin(),
+         E = MF->getRegInfo().liveout_end(); I != E; ++I)
+      if (!Ret->readsRegister(*I)) {
+        Ret->addOperand(MachineOperand::CreateReg(*I, false, true));
+        LastUseDef[*I] = std::make_pair(Ret, Ret->getNumOperands()-1);
+      }
+  }
+  
+  // Finally, loop over the final use/def of each reg 
+  // in the block and determine if it is dead.
+  for (std::map<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
+       I = LastUseDef.begin(), E = LastUseDef.end(); I != E; ++I) {
+    MachineInstr* MI = I->second.first;
+    unsigned idx = I->second.second;
+    MachineOperand& MO = MI->getOperand(idx);
+    
+    bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(MO.getReg());
+    
+    // A crude approximation of "live-out" calculation
+    bool usedOutsideBlock = isPhysReg ? false :   
+          UsedInMultipleBlocks.test(MO.getReg() -  
+                                    TargetRegisterInfo::FirstVirtualRegister);
+    if (!isPhysReg && !usedOutsideBlock)
+      for (MachineRegisterInfo::reg_iterator UI = MRI.reg_begin(MO.getReg()),
+           UE = MRI.reg_end(); UI != UE; ++UI)
+        // Two cases:
+        // - used in another block
+        // - used in the same block before it is defined (loop)
+        if (UI->getParent() != &MBB ||
+            (MO.isDef() && UI.getOperand().isUse() && precedes(*UI, MI))) {
+          UsedInMultipleBlocks.set(MO.getReg() - 
+                                   TargetRegisterInfo::FirstVirtualRegister);
+          usedOutsideBlock = true;
+          break;
+        }
+    
+    // Physical registers and those that are not live-out of the block
+    // are killed/dead at their last use/def within this block.
+    if (isPhysReg || !usedOutsideBlock) {
+      if (MO.isUse())
+        MO.setIsKill(true);
+      else if (MI->getOperand(idx).isDef())
+        MO.setIsDead(true);
+    }
+  }
+  
   // Otherwise, sequentially allocate each instruction in the MBB.
   while (MII != MBB.end()) {
     MachineInstr *MI = MII++;
@@ -802,7 +915,6 @@
   PhysRegsUseOrder.clear();
 }
 
-
 /// runOnMachineFunction - Register allocate the whole function
 ///
 bool RALocal::runOnMachineFunction(MachineFunction &Fn) {
@@ -830,7 +942,8 @@
   Virt2PhysRegMap.grow(LastVirtReg);
   Virt2LastUseMap.grow(LastVirtReg);
   VirtRegModified.resize(LastVirtReg+1-TargetRegisterInfo::FirstVirtualRegister);
-
+  UsedInMultipleBlocks.resize(LastVirtReg+1-TargetRegisterInfo::FirstVirtualRegister);
+ 
   // Loop over all of the basic blocks, eliminating virtual register references
   for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
        MBB != MBBe; ++MBB)
@@ -839,6 +952,7 @@
   StackSlotForVirtReg.clear();
   PhysRegsUsed.clear();
   VirtRegModified.clear();
+  UsedInMultipleBlocks.clear();
   Virt2PhysRegMap.clear();
   Virt2LastUseMap.clear();
   return true;




From dberlin at dberlin.org  Tue Jul  8 17:40:17 2008
From: dberlin at dberlin.org (Daniel Berlin)
Date: Tue, 8 Jul 2008 18:40:17 -0400
Subject: [llvm-commits] [llvm-gcc-4.2] r53130 -
	/llvm-gcc-4.2/trunk/gcc/cgraphunit.c
In-Reply-To: <0AB0A3AA-749D-4BA9-B3BE-9AB4464665D7@apple.com>
References: <200807041838.38772.duncan.sands@math.u-psud.fr>
	<04D36535-BBF8-489B-AD84-6E79DA248DF9@apple.com>
	<0AB0A3AA-749D-4BA9-B3BE-9AB4464665D7@apple.com>
Message-ID: <4aca3dc20807081540n6638ca8bpc43cc4ebfda597b9@mail.gmail.com>

On Tue, Jul 8, 2008 at 2:49 PM, Chris Lattner <clattner at apple.com> wrote:
>
> On Jul 8, 2008, at 10:40 AM, Dale Johannesen wrote:
>
>>>
>>> Also, how much of a win is this?
>>
>> I don't know.  It showed up on a profile as a place where time was
>> being spent, maybe the guys who made the profile have some idea.
>
> This was a big win.  Again, libstdc++ headers have dead static
> functions.  These dead static functions take some compile time, but
> take more time doing debug info generation and emission.
>
So, i took a look, and i don't see any dead static functions in
libstdc++ with gcc 4.3.
Which functions in particular are you thinking of?


From dpatel at apple.com  Tue Jul  8 18:15:19 2008
From: dpatel at apple.com (Devang Patel)
Date: Tue, 8 Jul 2008 16:15:19 -0700
Subject: [llvm-commits] [llvm] r53256 -
	/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
In-Reply-To: <200807082224.m68MOoWq010573@zion.cs.uiuc.edu>
References: <200807082224.m68MOoWq010573@zion.cs.uiuc.edu>
Message-ID: <1E89340B-8771-469E-8F06-3A578DB53542@apple.com>

This breaks build.

RegAllocLocal.cpp:666: error: conversion from ?llvm::MachineInstr? to  
non-scalar type ?llvm::alist_iterator<llvm::MachineInstr,  
llvm::MachineInstr, llvm::MachineInstr,  
llvm::ilist_iterator<llvm::alist_node<llvm::MachineInstr,  
llvm::MachineInstr> > >? requested

On Jul 8, 2008, at 3:24 PM, Owen Anderson wrote:

> Author: resistor
> Date: Tue Jul  8 17:24:50 2008
> New Revision: 53256
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53256&view=rev
> Log:
> Make the local register allocator compute (purely local) liveness  
> information for itself
> rather than depending on LiveVariables.  This decreases compile time  
> from:
> 0.5909s (LV + Regalloc) to 0.421s (just regalloc).
>
> Modified:
>    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
>
> Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53256&r1=53255&r2=53256&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
> +++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Tue Jul  8 17:24:50 2008
> @@ -14,7 +14,6 @@
>
> #define DEBUG_TYPE "regalloc"
> #include "llvm/BasicBlock.h"
> -#include "llvm/CodeGen/LiveVariables.h"
> #include "llvm/CodeGen/MachineFunctionPass.h"
> #include "llvm/CodeGen/MachineInstr.h"
> #include "llvm/CodeGen/MachineFrameInfo.h"
> @@ -101,6 +100,10 @@
>     // is no reason to spill it to memory when we need the register  
> back.
>     //
>     BitVector VirtRegModified;
> +
> +    // UsedInMultipleBlocks - Tracks whether a particular register  
> is used in
> +    // more than one block.
> +    BitVector UsedInMultipleBlocks;
>
>     void markVirtRegModified(unsigned Reg, bool Val = true) {
>       assert(TargetRegisterInfo::isVirtualRegister(Reg) && "Illegal  
> VirtReg!");
> @@ -147,7 +150,6 @@
>     }
>
>     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
> -      AU.addRequired<LiveVariables>();
>       AU.addRequiredID(PHIEliminationID);
>       AU.addRequiredID(TwoAddressInstructionPassID);
>       MachineFunctionPass::getAnalysisUsage(AU);
> @@ -539,6 +541,26 @@
>   return false;
> }
>
> +// precedes - Helper function to determine with MachineInstr A
> +// precedes MachineInstr B within the same MBB.
> +static bool precedes(MachineBasicBlock::iterator A,
> +                     MachineBasicBlock::iterator B) {
> +  if (A == B)
> +    return false;
> +
> +  MachineBasicBlock::iterator I = A->getParent()->begin();
> +  while (I != A->getParent()->end()) {
> +    if (I == A)
> +      return true;
> +    else if (I == B)
> +      return false;
> +
> +    ++I;
> +  }
> +
> +  return false;
> +}
> +
> void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
>   // loop over each instruction
>   MachineBasicBlock::iterator MII = MBB.begin();
> @@ -567,6 +589,97 @@
>     }
>   }
>
> +
> +  MachineRegisterInfo& MRI = MBB.getParent()->getRegInfo();
> +  // Keep track of the most recently seen previous use or def of  
> each reg,
> +  // so that we can update them with dead/kill markers.
> +  std::map<unsigned, std::pair<MachineInstr*, unsigned> > LastUseDef;
> +  for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
> +       I != E; ++I) {
> +    for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
> +      MachineOperand& MO = I->getOperand(i);
> +      // Uses don't trigger any flags, but we need to save
> +      // them for later.  Also, we have to process these
> +      // _before_ processing the defs, since an instr
> +      // uses regs before it defs them.
> +      if (MO.isReg() && MO.getReg() && MO.isUse())
> +        LastUseDef[MO.getReg()] = std::make_pair(I, i);
> +    }
> +
> +    for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
> +      MachineOperand& MO = I->getOperand(i);
> +      // Defs others than 2-addr redefs _do_ trigger flag changes:
> +      //   - A def followed by a def is dead
> +      //   - A use followed by a def is a kill
> +      if (MO.isReg() && MO.getReg() && MO.isDef() &&
> +         !I->isRegReDefinedByTwoAddr(MO.getReg())) {
> +        std::map<unsigned, std::pair<MachineInstr*, unsigned>  
> >::iterator
> +          last = LastUseDef.find(MO.getReg());
> +        if (last != LastUseDef.end()) {
> +          MachineOperand& lastUD =
> +                      last->second.first->getOperand(last- 
> >second.second);
> +          if (lastUD.isDef())
> +            lastUD.setIsDead(true);
> +          else if (lastUD.isUse())
> +            lastUD.setIsKill(true);
> +        }
> +
> +        LastUseDef[MO.getReg()] = std::make_pair(I, i);
> +      }
> +    }
> +  }
> +
> +  // Live-out (of the function) registers contain return values of  
> the function,
> +  // so we need to make sure they are alive at return time.
> +  if (!MBB.empty() && MBB.back().getDesc().isReturn()) {
> +    MachineInstr* Ret = &MBB.back();
> +    for (MachineRegisterInfo::liveout_iterator
> +         I = MF->getRegInfo().liveout_begin(),
> +         E = MF->getRegInfo().liveout_end(); I != E; ++I)
> +      if (!Ret->readsRegister(*I)) {
> +        Ret->addOperand(MachineOperand::CreateReg(*I, false, true));
> +        LastUseDef[*I] = std::make_pair(Ret, Ret- 
> >getNumOperands()-1);
> +      }
> +  }
> +
> +  // Finally, loop over the final use/def of each reg
> +  // in the block and determine if it is dead.
> +  for (std::map<unsigned, std::pair<MachineInstr*, unsigned>  
> >::iterator
> +       I = LastUseDef.begin(), E = LastUseDef.end(); I != E; ++I) {
> +    MachineInstr* MI = I->second.first;
> +    unsigned idx = I->second.second;
> +    MachineOperand& MO = MI->getOperand(idx);
> +
> +    bool isPhysReg =  
> TargetRegisterInfo::isPhysicalRegister(MO.getReg());
> +
> +    // A crude approximation of "live-out" calculation
> +    bool usedOutsideBlock = isPhysReg ? false :
> +          UsedInMultipleBlocks.test(MO.getReg() -
> +                                     
> TargetRegisterInfo::FirstVirtualRegister);
> +    if (!isPhysReg && !usedOutsideBlock)
> +      for (MachineRegisterInfo::reg_iterator UI =  
> MRI.reg_begin(MO.getReg()),
> +           UE = MRI.reg_end(); UI != UE; ++UI)
> +        // Two cases:
> +        // - used in another block
> +        // - used in the same block before it is defined (loop)
> +        if (UI->getParent() != &MBB ||
> +            (MO.isDef() && UI.getOperand().isUse() && precedes(*UI,  
> MI))) {
> +          UsedInMultipleBlocks.set(MO.getReg() -
> +                                    
> TargetRegisterInfo::FirstVirtualRegister);
> +          usedOutsideBlock = true;
> +          break;
> +        }
> +
> +    // Physical registers and those that are not live-out of the  
> block
> +    // are killed/dead at their last use/def within this block.
> +    if (isPhysReg || !usedOutsideBlock) {
> +      if (MO.isUse())
> +        MO.setIsKill(true);
> +      else if (MI->getOperand(idx).isDef())
> +        MO.setIsDead(true);
> +    }
> +  }
> +
>   // Otherwise, sequentially allocate each instruction in the MBB.
>   while (MII != MBB.end()) {
>     MachineInstr *MI = MII++;
> @@ -802,7 +915,6 @@
>   PhysRegsUseOrder.clear();
> }
>
> -
> /// runOnMachineFunction - Register allocate the whole function
> ///
> bool RALocal::runOnMachineFunction(MachineFunction &Fn) {
> @@ -830,7 +942,8 @@
>   Virt2PhysRegMap.grow(LastVirtReg);
>   Virt2LastUseMap.grow(LastVirtReg);
>   VirtRegModified.resize(LastVirtReg+1- 
> TargetRegisterInfo::FirstVirtualRegister);
> -
> +  UsedInMultipleBlocks.resize(LastVirtReg+1- 
> TargetRegisterInfo::FirstVirtualRegister);
> +
>   // Loop over all of the basic blocks, eliminating virtual register  
> references
>   for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
>        MBB != MBBe; ++MBB)
> @@ -839,6 +952,7 @@
>   StackSlotForVirtReg.clear();
>   PhysRegsUsed.clear();
>   VirtRegModified.clear();
> +  UsedInMultipleBlocks.clear();
>   Virt2PhysRegMap.clear();
>   Virt2LastUseMap.clear();
>   return true;
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

-
Devang






From gohman at apple.com  Tue Jul  8 18:33:46 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 08 Jul 2008 23:33:46 -0000
Subject: [llvm-commits] [llvm] r53259 -
	/llvm/trunk/include/llvm/Support/GraphWriter.h
Message-ID: <200807082333.m68NXkL1013444@zion.cs.uiuc.edu>

Author: djg
Date: Tue Jul  8 18:33:46 2008
New Revision: 53259

URL: http://llvm.org/viewvc/llvm-project?rev=53259&view=rev
Log:
The graph name really does matter for configurations that use gv.

Modified:
    llvm/trunk/include/llvm/Support/GraphWriter.h

Modified: llvm/trunk/include/llvm/Support/GraphWriter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/GraphWriter.h?rev=53259&r1=53258&r2=53259&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/GraphWriter.h (original)
+++ llvm/trunk/include/llvm/Support/GraphWriter.h Tue Jul  8 18:33:46 2008
@@ -82,15 +82,18 @@
   GraphWriter(std::ostream &o, const GraphType &g) : O(o), G(g) {}
 
   void writeHeader(const std::string &Name) {
-    if (Name.empty())
-      O << "digraph foo {\n";        // Graph name doesn't matter
-    else
+    std::string GraphName = DOTTraits::getGraphName(G);
+
+    if (!Name.empty())
       O << "digraph " << Name << " {\n";
+    else if (!GraphName.empty())
+      O << "digraph " << GraphName << " {\n";
+    else
+      O << "digraph unnamed {\n";
 
     if (DOTTraits::renderGraphFromBottomUp())
       O << "\trankdir=\"BT\";\n";
 
-    std::string GraphName = DOTTraits::getGraphName(G);
     if (!GraphName.empty())
       O << "\tlabel=\"" << DOT::EscapeString(GraphName) << "\";\n";
     O << DOTTraits::getGraphProperties(G);




From evan.cheng at apple.com  Tue Jul  8 18:34:21 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 8 Jul 2008 16:34:21 -0700
Subject: [llvm-commits] [llvm] r53256 -
	/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
In-Reply-To: <200807082224.m68MOoWq010573@zion.cs.uiuc.edu>
References: <200807082224.m68MOoWq010573@zion.cs.uiuc.edu>
Message-ID: <1A7B8C1E-F900-482E-87E1-C53BCA9A0E54@apple.com>


On Jul 8, 2008, at 3:24 PM, Owen Anderson wrote:

> Author: resistor
> Date: Tue Jul  8 17:24:50 2008
> New Revision: 53256
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53256&view=rev
> Log:
> Make the local register allocator compute (purely local) liveness  
> information for itself
> rather than depending on LiveVariables.  This decreases compile time  
> from:
> 0.5909s (LV + Regalloc) to 0.421s (just regalloc).


Awesome!

>
>
> Modified:
>    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
>
> Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53256&r1=53255&r2=53256&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
> +++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Tue Jul  8 17:24:50 2008
> @@ -14,7 +14,6 @@
>
> #define DEBUG_TYPE "regalloc"
> #include "llvm/BasicBlock.h"
> -#include "llvm/CodeGen/LiveVariables.h"
> #include "llvm/CodeGen/MachineFunctionPass.h"
> #include "llvm/CodeGen/MachineInstr.h"
> #include "llvm/CodeGen/MachineFrameInfo.h"
> @@ -101,6 +100,10 @@
>     // is no reason to spill it to memory when we need the register  
> back.
>     //
>     BitVector VirtRegModified;
> +
> +    // UsedInMultipleBlocks - Tracks whether a particular register  
> is used in
> +    // more than one block.
> +    BitVector UsedInMultipleBlocks;
>
>     void markVirtRegModified(unsigned Reg, bool Val = true) {
>       assert(TargetRegisterInfo::isVirtualRegister(Reg) && "Illegal  
> VirtReg!");
> @@ -147,7 +150,6 @@
>     }
>
>     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
> -      AU.addRequired<LiveVariables>();
>       AU.addRequiredID(PHIEliminationID);
>       AU.addRequiredID(TwoAddressInstructionPassID);
>       MachineFunctionPass::getAnalysisUsage(AU);
> @@ -539,6 +541,26 @@
>   return false;
> }
>
> +// precedes - Helper function to determine with MachineInstr A
> +// precedes MachineInstr B within the same MBB.
> +static bool precedes(MachineBasicBlock::iterator A,
> +                     MachineBasicBlock::iterator B) {
> +  if (A == B)
> +    return false;
> +
> +  MachineBasicBlock::iterator I = A->getParent()->begin();
> +  while (I != A->getParent()->end()) {
> +    if (I == A)
> +      return true;
> +    else if (I == B)
> +      return false;
> +
> +    ++I;
> +  }
> +
> +  return false;
> +}
> +
> void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
>   // loop over each instruction
>   MachineBasicBlock::iterator MII = MBB.begin();
> @@ -567,6 +589,97 @@
>     }
>   }
>

Please move the local liveness analysis part into a separate function.

> +
> +  MachineRegisterInfo& MRI = MBB.getParent()->getRegInfo();
> +  // Keep track of the most recently seen previous use or def of  
> each reg,
> +  // so that we can update them with dead/kill markers.
> +  std::map<unsigned, std::pair<MachineInstr*, unsigned> > LastUseDef;

You should use IndexedMap instead of std::map (see VirtRegMap.h).  
Also, instead of caching a std::pair, you can just save MachineOperand*.

>
> +  for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
> +       I != E; ++I) {
> +    for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
> +      MachineOperand& MO = I->getOperand(i);
> +      // Uses don't trigger any flags, but we need to save
> +      // them for later.  Also, we have to process these
> +      // _before_ processing the defs, since an instr
> +      // uses regs before it defs them.
> +      if (MO.isReg() && MO.getReg() && MO.isUse())
> +        LastUseDef[MO.getReg()] = std::make_pair(I, i);
> +    }
> +
> +    for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
> +      MachineOperand& MO = I->getOperand(i);
> +      // Defs others than 2-addr redefs _do_ trigger flag changes:
> +      //   - A def followed by a def is dead
> +      //   - A use followed by a def is a kill
> +      if (MO.isReg() && MO.getReg() && MO.isDef() &&
> +         !I->isRegReDefinedByTwoAddr(MO.getReg())) {

isRegReDefinedByTwoAddr is fairly expensive. You should consider  
iterating through the operands twice. The first time it can process  
the uses (you can cache the defs if you want). The second iteration  
would process the defs which can look at the last use to determine if  
it's two-address code (by checking if the parent is equal to I).

>
> +        std::map<unsigned, std::pair<MachineInstr*, unsigned>  
> >::iterator
> +          last = LastUseDef.find(MO.getReg());
> +        if (last != LastUseDef.end()) {
> +          MachineOperand& lastUD =
> +                      last->second.first->getOperand(last- 
> >second.second);
> +          if (lastUD.isDef())
> +            lastUD.setIsDead(true);
> +          else if (lastUD.isUse())

This check is unnecessary.

>
> +            lastUD.setIsKill(true);
> +        }
> +
> +        LastUseDef[MO.getReg()] = std::make_pair(I, i);
> +      }
> +    }
> +  }
> +
> +  // Live-out (of the function) registers contain return values of  
> the function,
> +  // so we need to make sure they are alive at return time.
> +  if (!MBB.empty() && MBB.back().getDesc().isReturn()) {

No need to get MBB.back() if you simply keep the last MachineInstr  
that was processed earlier.

>
> +    MachineInstr* Ret = &MBB.back();
> +    for (MachineRegisterInfo::liveout_iterator
> +         I = MF->getRegInfo().liveout_begin(),
> +         E = MF->getRegInfo().liveout_end(); I != E; ++I)
> +      if (!Ret->readsRegister(*I)) {

This scans the whole operand list for each liveout register, consider  
caching the info.

>
> +        Ret->addOperand(MachineOperand::CreateReg(*I, false, true));
> +        LastUseDef[*I] = std::make_pair(Ret, Ret- 
> >getNumOperands()-1);
> +      }
> +  }
> +
> +  // Finally, loop over the final use/def of each reg
> +  // in the block and determine if it is dead.
> +  for (std::map<unsigned, std::pair<MachineInstr*, unsigned>  
> >::iterator
> +       I = LastUseDef.begin(), E = LastUseDef.end(); I != E; ++I) {

If you replace the std::map with an IndexedMap, you may need to  
augment the data structure. Perhaps a BitVector that represents what's  
live?

>
> +    MachineInstr* MI = I->second.first;
> +    unsigned idx = I->second.second;
> +    MachineOperand& MO = MI->getOperand(idx);
> +
> +    bool isPhysReg =  
> TargetRegisterInfo::isPhysicalRegister(MO.getReg());

How about processing the isPhysReg case here and do a continue to  
clean up the code?

>
> +
> +    // A crude approximation of "live-out" calculation
> +    bool usedOutsideBlock = isPhysReg ? false :
> +          UsedInMultipleBlocks.test(MO.getReg() -
> +                                     
> TargetRegisterInfo::FirstVirtualRegister);
> +    if (!isPhysReg && !usedOutsideBlock)
> +      for (MachineRegisterInfo::reg_iterator UI =  
> MRI.reg_begin(MO.getReg()),
> +           UE = MRI.reg_end(); UI != UE; ++UI)

>
> +        // Two cases:
> +        // - used in another block
> +        // - used in the same block before it is defined (loop)
>
> +        if (UI->getParent() != &MBB ||
> +            (MO.isDef() && UI.getOperand().isUse() && precedes(*UI,  
> MI))) {

precedes is poorly named. It's also very expensive. The information  
can be cached while we process the block earlier anyway.

>
> +          UsedInMultipleBlocks.set(MO.getReg() -
> +                                    
> TargetRegisterInfo::FirstVirtualRegister);
> +          usedOutsideBlock = true;
> +          break;
> +        }
> +
> +    // Physical registers and those that are not live-out of the  
> block
> +    // are killed/dead at their last use/def within this block.
> +    if (isPhysReg || !usedOutsideBlock) {
> +      if (MO.isUse())
> +        MO.setIsKill(true);
> +      else if (MI->getOperand(idx).isDef())
> +        MO.setIsDead(true);
> +    }
> +  }
> +

Here is a thought. What if we simply assume everything is not killed  
(unless the block has no successors)? We may spill more than  
necessary, but does it speed up computation?

>
>   // Otherwise, sequentially allocate each instruction in the MBB.
>   while (MII != MBB.end()) {
>     MachineInstr *MI = MII++;
> @@ -802,7 +915,6 @@
>   PhysRegsUseOrder.clear();
> }
>
> -
> /// runOnMachineFunction - Register allocate the whole function
> ///
> bool RALocal::runOnMachineFunction(MachineFunction &Fn) {
> @@ -830,7 +942,8 @@
>   Virt2PhysRegMap.grow(LastVirtReg);
>   Virt2LastUseMap.grow(LastVirtReg);
>   VirtRegModified.resize(LastVirtReg+1- 
> TargetRegisterInfo::FirstVirtualRegister);
> -
> +  UsedInMultipleBlocks.resize(LastVirtReg+1- 
> TargetRegisterInfo::FirstVirtualRegister);

80 col violation.

Nice work. Thanks Owen.

Evan

>
> +
>   // Loop over all of the basic blocks, eliminating virtual register  
> references
>   for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
>        MBB != MBBe; ++MBB)
> @@ -839,6 +952,7 @@
>   StackSlotForVirtReg.clear();
>   PhysRegsUsed.clear();
>   VirtRegModified.clear();
> +  UsedInMultipleBlocks.clear();
>   Virt2PhysRegMap.clear();
>   Virt2LastUseMap.clear();
>   return true;
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From resistor at mac.com  Tue Jul  8 18:36:37 2008
From: resistor at mac.com (Owen Anderson)
Date: Tue, 08 Jul 2008 23:36:37 -0000
Subject: [llvm-commits] [llvm] r53260 -
	/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
Message-ID: <200807082336.m68Nabko013546@zion.cs.uiuc.edu>

Author: resistor
Date: Tue Jul  8 18:36:37 2008
New Revision: 53260

URL: http://llvm.org/viewvc/llvm-project?rev=53260&view=rev
Log:
Fix the build.  Apparently MachineInstr& is no longer implicitly convertable to MachineBasicBlock::iterator.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53260&r1=53259&r2=53260&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Tue Jul  8 18:36:37 2008
@@ -663,7 +663,7 @@
         // - used in another block
         // - used in the same block before it is defined (loop)
         if (UI->getParent() != &MBB ||
-            (MO.isDef() && UI.getOperand().isUse() && precedes(*UI, MI))) {
+            (MO.isDef() && UI.getOperand().isUse() && precedes(&*UI, MI))) {
           UsedInMultipleBlocks.set(MO.getReg() - 
                                    TargetRegisterInfo::FirstVirtualRegister);
           usedOutsideBlock = true;




From dpatel at apple.com  Tue Jul  8 18:42:51 2008
From: dpatel at apple.com (Devang Patel)
Date: Tue, 8 Jul 2008 16:42:51 -0700
Subject: [llvm-commits] [llvm] r53260 -
	/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
In-Reply-To: <200807082336.m68Nabko013546@zion.cs.uiuc.edu>
References: <200807082336.m68Nabko013546@zion.cs.uiuc.edu>
Message-ID: <E91E4F74-0905-4395-87C6-4CE2ED32C79C@apple.com>


On Jul 8, 2008, at 4:36 PM, Owen Anderson wrote:

> Author: resistor
> Date: Tue Jul  8 18:36:37 2008
> New Revision: 53260
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53260&view=rev
> Log:
> Fix the build.

Thanks!


> Apparently MachineInstr& is no longer implicitly convertable to  
> MachineBasicBlock::iterator.
>
> Modified:
>    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
>
> Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53260&r1=53259&r2=53260&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
> +++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Tue Jul  8 18:36:37 2008
> @@ -663,7 +663,7 @@
>         // - used in another block
>         // - used in the same block before it is defined (loop)
>         if (UI->getParent() != &MBB ||
> -            (MO.isDef() && UI.getOperand().isUse() && precedes(*UI,  
> MI))) {
> +            (MO.isDef() && UI.getOperand().isUse() &&  
> precedes(&*UI, MI))) {
>           UsedInMultipleBlocks.set(MO.getReg() -
>                                     
> TargetRegisterInfo::FirstVirtualRegister);
>           usedOutsideBlock = true;
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

-
Devang





From gohman at apple.com  Tue Jul  8 18:46:33 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 08 Jul 2008 23:46:33 -0000
Subject: [llvm-commits] [llvm] r53261 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAG.h
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Message-ID: <200807082346.m68NkXDk013924@zion.cs.uiuc.edu>

Author: djg
Date: Tue Jul  8 18:46:32 2008
New Revision: 53261

URL: http://llvm.org/viewvc/llvm-project?rev=53261&view=rev
Log:
Factor out the code for computing an alignment value, and make it
available to getAtomic in addition to just getLoad and getStore,
to prevent MachineMemOperands with 0 alignment.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=53261&r1=53260&r2=53261&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Tue Jul  8 18:46:32 2008
@@ -654,6 +654,8 @@
                                void *&InsertPos);
 
   void DeleteNodeNotInCSEMaps(SDNode *N);
+
+  unsigned getMVTAlignment(MVT MemoryVT) const;
   
   // List of non-single value types.
   std::list<std::vector<MVT> > VTList;

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53261&r1=53260&r2=53261&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Jul  8 18:46:32 2008
@@ -741,6 +741,16 @@
   return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
 }
 
+/// getMVTAlignment - Compute the default alignment value for the
+/// given type.
+///
+unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
+  const Type *Ty = VT == MVT::iPTR ?
+                   PointerType::get(Type::Int8Ty, 0) :
+                   VT.getTypeForMVT();
+
+  return TLI.getTargetData()->getABITypeAlignment(Ty);
+}
 
 SelectionDAG::~SelectionDAG() {
   while (!AllNodes.empty()) {
@@ -3069,7 +3079,13 @@
                                   unsigned Alignment) {
   assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
   assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
-  SDVTList VTs = getVTList(Cmp.getValueType(), MVT::Other);
+
+  MVT VT = Cmp.getValueType();
+
+  if (Alignment == 0)  // Ensure that codegen never sees alignment 0
+    Alignment = getMVTAlignment(VT);
+
+  SDVTList VTs = getVTList(VT, MVT::Other);
   FoldingSetNodeID ID;
   SDOperand Ops[] = {Chain, Ptr, Cmp, Swp};
   AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
@@ -3094,7 +3110,13 @@
           || Opcode == ISD::ATOMIC_LOAD_MIN || Opcode == ISD::ATOMIC_LOAD_MAX
           || Opcode == ISD::ATOMIC_LOAD_UMIN || Opcode == ISD::ATOMIC_LOAD_UMAX) 
          && "Invalid Atomic Op");
-  SDVTList VTs = getVTList(Val.getValueType(), MVT::Other);
+
+  MVT VT = Val.getValueType();
+
+  if (Alignment == 0)  // Ensure that codegen never sees alignment 0
+    Alignment = getMVTAlignment(VT);
+
+  SDVTList VTs = getVTList(VT, MVT::Other);
   FoldingSetNodeID ID;
   SDOperand Ops[] = {Chain, Ptr, Val};
   AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
@@ -3128,18 +3150,8 @@
                       SDOperand Ptr, SDOperand Offset,
                       const Value *SV, int SVOffset, MVT EVT,
                       bool isVolatile, unsigned Alignment) {
-  if (Alignment == 0) { // Ensure that codegen never sees alignment 0
-    const Type *Ty = 0;
-    if (VT != MVT::iPTR) {
-      Ty = VT.getTypeForMVT();
-    } else if (SV) {
-      const PointerType *PT = dyn_cast<PointerType>(SV->getType());
-      assert(PT && "Value for load must be a pointer");
-      Ty = PT->getElementType();
-    }
-    assert(Ty && "Could not get type information for load");
-    Alignment = TLI.getTargetData()->getABITypeAlignment(Ty);
-  }
+  if (Alignment == 0)  // Ensure that codegen never sees alignment 0
+    Alignment = getMVTAlignment(VT);
 
   if (VT == EVT) {
     ExtType = ISD::NON_EXTLOAD;
@@ -3219,18 +3231,9 @@
                                  bool isVolatile, unsigned Alignment) {
   MVT VT = Val.getValueType();
 
-  if (Alignment == 0) { // Ensure that codegen never sees alignment 0
-    const Type *Ty = 0;
-    if (VT != MVT::iPTR) {
-      Ty = VT.getTypeForMVT();
-    } else if (SV) {
-      const PointerType *PT = dyn_cast<PointerType>(SV->getType());
-      assert(PT && "Value for store must be a pointer");
-      Ty = PT->getElementType();
-    }
-    assert(Ty && "Could not get type information for store");
-    Alignment = TLI.getTargetData()->getABITypeAlignment(Ty);
-  }
+  if (Alignment == 0)  // Ensure that codegen never sees alignment 0
+    Alignment = getMVTAlignment(VT);
+
   SDVTList VTs = getVTList(MVT::Other);
   SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType());
   SDOperand Ops[] = { Chain, Val, Ptr, Undef };
@@ -3265,18 +3268,9 @@
   assert(VT.isInteger() == SVT.isInteger() &&
          "Can't do FP-INT conversion!");
 
-  if (Alignment == 0) { // Ensure that codegen never sees alignment 0
-    const Type *Ty = 0;
-    if (VT != MVT::iPTR) {
-      Ty = VT.getTypeForMVT();
-    } else if (SV) {
-      const PointerType *PT = dyn_cast<PointerType>(SV->getType());
-      assert(PT && "Value for store must be a pointer");
-      Ty = PT->getElementType();
-    }
-    assert(Ty && "Could not get type information for store");
-    Alignment = TLI.getTargetData()->getABITypeAlignment(Ty);
-  }
+  if (Alignment == 0)  // Ensure that codegen never sees alignment 0
+    Alignment = getMVTAlignment(VT);
+
   SDVTList VTs = getVTList(MVT::Other);
   SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType());
   SDOperand Ops[] = { Chain, Val, Ptr, Undef };




From gohman at apple.com  Tue Jul  8 18:47:04 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 08 Jul 2008 23:47:04 -0000
Subject: [llvm-commits] [llvm] r53262 -
	/llvm/trunk/lib/CodeGen/MachineInstr.cpp
Message-ID: <200807082347.m68Nl4xO013950@zion.cs.uiuc.edu>

Author: djg
Date: Tue Jul  8 18:47:04 2008
New Revision: 53262

URL: http://llvm.org/viewvc/llvm-project?rev=53262&view=rev
Log:
Verify that MachineMemOperand alignment is a non-zero power of 2.

Modified:
    llvm/trunk/lib/CodeGen/MachineInstr.cpp

Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=53262&r1=53261&r2=53262&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Tue Jul  8 18:47:04 2008
@@ -246,6 +246,7 @@
                                      int64_t o, uint64_t s, unsigned int a)
   : Offset(o), Size(s), V(v),
     Flags((f & 7) | ((Log2_32(a) + 1) << 3)) {
+  assert(isPowerOf2_32(a) && "Alignment is not a power of 2!");
 }
 
 //===----------------------------------------------------------------------===//




From gohman at apple.com  Tue Jul  8 18:47:55 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 8 Jul 2008 16:47:55 -0700
Subject: [llvm-commits] [llvm] r53200 - in /llvm/trunk:
	include/llvm/CodeGen/MachineMemOperand.h
	lib/CodeGen/MachineInstr.cpp
In-Reply-To: <200807080925.34321.baldrick@free.fr>
References: <200807072032.m67KW66b009966@zion.cs.uiuc.edu>
	<200807080925.34321.baldrick@free.fr>
Message-ID: <65A3DC43-B182-4978-89D3-496EC2162F80@apple.com>


On Jul 8, 2008, at 12:25 AM, Duncan Sands wrote:

> Hi Dan,
>
>> +MachineMemOperand::MachineMemOperand(const Value *v, unsigned int f,
>> +                                     int64_t o, uint64_t s,  
>> unsigned int a)
>> +  : Offset(o), Size(s), V(v),
>> +    Flags((f & 7) | ((Log2_32(a) + 1) << 3)) {
>> +}
>
> if someone (wrongly) passes an alignment of 0, what will happen?
> How about adding an assertion here to catch this case.

Done. It even caught a bug :-).

Thanks,

Dan



From gohman at apple.com  Tue Jul  8 18:59:09 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 08 Jul 2008 23:59:09 -0000
Subject: [llvm-commits] [llvm] r53263 -
	/llvm/trunk/lib/CodeGen/MachineInstr.cpp
Message-ID: <200807082359.m68Nx90w014317@zion.cs.uiuc.edu>

Author: djg
Date: Tue Jul  8 18:59:09 2008
New Revision: 53263

URL: http://llvm.org/viewvc/llvm-project?rev=53263&view=rev
Log:
It's no longer necessary to test if a MachineBasicBlock's
parent is non-null. It now always is.

Modified:
    llvm/trunk/lib/CodeGen/MachineInstr.cpp

Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=53263&r1=53262&r2=53263&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Tue Jul  8 18:59:09 2008
@@ -348,8 +348,7 @@
 /// return null.
 MachineRegisterInfo *MachineInstr::getRegInfo() {
   if (MachineBasicBlock *MBB = getParent())
-    if (MachineFunction *MF = MBB->getParent())
-      return &MF->getRegInfo();
+    return &MBB->getParent()->getRegInfo();
   return 0;
 }
 




From gohman at apple.com  Tue Jul  8 19:00:42 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 09 Jul 2008 00:00:42 -0000
Subject: [llvm-commits] [llvm] r53264 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAG.h
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Message-ID: <200807090000.m6900g70014385@zion.cs.uiuc.edu>

Author: djg
Date: Tue Jul  8 19:00:42 2008
New Revision: 53264

URL: http://llvm.org/viewvc/llvm-project?rev=53264&view=rev
Log:
const-ify SelectionDAG::getNodeValueTypes.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=53264&r1=53263&r2=53264&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Tue Jul  8 19:00:42 2008
@@ -167,7 +167,7 @@
   const MVT *getNodeValueTypes(MVT VT1, MVT VT2, MVT VT3) {
     return getVTList(VT1, VT2, VT3).VTs;
   }
-  const MVT *getNodeValueTypes(std::vector<MVT> &vtList) {
+  const MVT *getNodeValueTypes(const std::vector<MVT> &vtList) {
     return getVTList(&vtList[0], (unsigned)vtList.size()).VTs;
   }
   
@@ -312,7 +312,7 @@
                     const SDOperand *Ops, unsigned NumOps);
   SDOperand getNode(unsigned Opcode, MVT VT,
                     const SDUse *Ops, unsigned NumOps);
-  SDOperand getNode(unsigned Opcode, std::vector<MVT> &ResultTys,
+  SDOperand getNode(unsigned Opcode, const std::vector<MVT> &ResultTys,
                     const SDOperand *Ops, unsigned NumOps);
   SDOperand getNode(unsigned Opcode, const MVT *VTs, unsigned NumVTs,
                     const SDOperand *Ops, unsigned NumOps);
@@ -511,7 +511,7 @@
                         const SDOperand *Ops, unsigned NumOps);
   SDNode *getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, MVT VT4,
                         const SDOperand *Ops, unsigned NumOps);
-  SDNode *getTargetNode(unsigned Opcode, std::vector<MVT> &ResultTys,
+  SDNode *getTargetNode(unsigned Opcode, const std::vector<MVT> &ResultTys,
                         const SDOperand *Ops, unsigned NumOps);
 
   /// getNodeIfExists - Get the specified node if it's already available, or

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53264&r1=53263&r2=53264&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Jul  8 19:00:42 2008
@@ -3399,7 +3399,7 @@
 }
 
 SDOperand SelectionDAG::getNode(unsigned Opcode,
-                                std::vector<MVT> &ResultTys,
+                                const std::vector<MVT> &ResultTys,
                                 const SDOperand *Ops, unsigned NumOps) {
   return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(),
                  Ops, NumOps);
@@ -3969,7 +3969,7 @@
   return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 4, Ops, NumOps).Val;
 }
 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
-                                    std::vector<MVT> &ResultTys,
+                                    const std::vector<MVT> &ResultTys,
                                     const SDOperand *Ops, unsigned NumOps) {
   const MVT *VTs = getNodeValueTypes(ResultTys);
   return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, ResultTys.size(),




From dpatel at apple.com  Tue Jul  8 19:12:01 2008
From: dpatel at apple.com (Devang Patel)
Date: Wed, 09 Jul 2008 00:12:01 -0000
Subject: [llvm-commits] [llvm] r53265 - in /llvm/trunk:
 lib/Transforms/Scalar/LoopIndexSplit.cpp
 test/Transforms/LoopIndexSplit/2008-05-19-IndVar.ll
 test/Transforms/LoopIndexSplit/2008-07-08-MisCompilation.ll
Message-ID: <200807090012.m690C13Q014896@zion.cs.uiuc.edu>

Author: dpatel
Date: Tue Jul  8 19:12:01 2008
New Revision: 53265

URL: http://llvm.org/viewvc/llvm-project?rev=53265&view=rev
Log:
If loop induction variable's start value is less then its exit value then do not split the loop.

Added:
    llvm/trunk/test/Transforms/LoopIndexSplit/2008-07-08-MisCompilation.ll
Modified:
    llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp
    llvm/trunk/test/Transforms/LoopIndexSplit/2008-05-19-IndVar.ll

Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=53265&r1=53264&r2=53265&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Tue Jul  8 19:12:01 2008
@@ -384,6 +384,19 @@
     BasicBlock *Preheader = L->getLoopPreheader();
     StartValue = IndVar->getIncomingValueForBlock(Preheader);
   }
+
+  // If start value is more then exit value where induction variable
+  // increments by 1 then we are potentially dealing with an infinite loop.
+  // Do not index split this loop.
+  if (ExitCondition) {
+    ConstantInt *SV = dyn_cast<ConstantInt>(StartValue);
+    ConstantInt *EV = 
+      dyn_cast<ConstantInt>(ExitCondition->getOperand(ExitValueNum));
+    if (SV && EV && SV->getSExtValue() > EV->getSExtValue())
+      ExitCondition = NULL;
+    else if (EV && EV->isZero())
+      ExitCondition = NULL;
+  }
 }
 
 /// Find condition inside a loop that is suitable candidate for index split.

Modified: llvm/trunk/test/Transforms/LoopIndexSplit/2008-05-19-IndVar.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIndexSplit/2008-05-19-IndVar.ll?rev=53265&r1=53264&r2=53265&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/LoopIndexSplit/2008-05-19-IndVar.ll (original)
+++ llvm/trunk/test/Transforms/LoopIndexSplit/2008-05-19-IndVar.ll Tue Jul  8 19:12:01 2008
@@ -24,7 +24,7 @@
 	br label %bb6.i
 bb6.i:		; preds = %bb4.i, %bb.i
 	%tmp8.i = add i16 %g_2.tmp.0.i, 1		; <i16> [#uses=3]
-	%tmp11.i = icmp sgt i16 %tmp8.i, 0		; <i1> [#uses=1]
+	%tmp11.i = icmp sgt i16 %tmp8.i, 42		; <i1> [#uses=1]
 	br i1 %tmp11.i, label %bb.i, label %return.loopexit.i
 return.loopexit.i:		; preds = %bb6.i
 	%tmp8.i.lcssa = phi i16 [ %tmp8.i, %bb6.i ]		; <i16> [#uses=1]

Added: llvm/trunk/test/Transforms/LoopIndexSplit/2008-07-08-MisCompilation.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIndexSplit/2008-07-08-MisCompilation.ll?rev=53265&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/LoopIndexSplit/2008-07-08-MisCompilation.ll (added)
+++ llvm/trunk/test/Transforms/LoopIndexSplit/2008-07-08-MisCompilation.ll Tue Jul  8 19:12:01 2008
@@ -0,0 +1,25 @@
+; RUN: llvm-as < %s | opt -loop-index-split -stats -disable-output | not grep "1 loop-index-split"
+; PR 2487
+ at g_6 = external global i32		; <i32*> [#uses=1]
+
+define void @func_1() nounwind  {
+entry:
+	br label %bb
+
+bb:		; preds = %bb4, %entry
+	%l_3.0 = phi i8 [ 0, %entry ], [ %tmp6, %bb4 ]		; <i8> [#uses=2]
+	%tmp1 = icmp eq i8 %l_3.0, 0		; <i1> [#uses=1]
+	br i1 %tmp1, label %bb3, label %bb4
+
+bb3:		; preds = %bb
+	store i32 1, i32* @g_6, align 4
+	br label %bb4
+
+bb4:		; preds = %bb3, %bb
+	%tmp6 = add i8 %l_3.0, 1		; <i8> [#uses=2]
+	%tmp9 = icmp sgt i8 %tmp6, -1		; <i1> [#uses=1]
+	br i1 %tmp9, label %bb, label %return
+
+return:		; preds = %bb4
+	ret void
+}




From clattner at apple.com  Tue Jul  8 19:17:02 2008
From: clattner at apple.com (Chris Lattner)
Date: Tue, 8 Jul 2008 17:17:02 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53130 -
	/llvm-gcc-4.2/trunk/gcc/cgraphunit.c
In-Reply-To: <4aca3dc20807081540n6638ca8bpc43cc4ebfda597b9@mail.gmail.com>
References: <200807041838.38772.duncan.sands@math.u-psud.fr>
	<04D36535-BBF8-489B-AD84-6E79DA248DF9@apple.com>
	<0AB0A3AA-749D-4BA9-B3BE-9AB4464665D7@apple.com>
	<4aca3dc20807081540n6638ca8bpc43cc4ebfda597b9@mail.gmail.com>
Message-ID: <3068BF01-1AC5-4435-8B33-1C7E462C5E0B@apple.com>


On Jul 8, 2008, at 3:40 PM, Daniel Berlin wrote:

> On Tue, Jul 8, 2008 at 2:49 PM, Chris Lattner <clattner at apple.com>  
> wrote:
>>
>> On Jul 8, 2008, at 10:40 AM, Dale Johannesen wrote:
>>
>>>>
>>>> Also, how much of a win is this?
>>>
>>> I don't know.  It showed up on a profile as a place where time was
>>> being spent, maybe the guys who made the profile have some idea.
>>
>> This was a big win.  Again, libstdc++ headers have dead static
>> functions.  These dead static functions take some compile time, but
>> take more time doing debug info generation and emission.
>>
> So, i took a look, and i don't see any dead static functions in
> libstdc++ with gcc 4.3.
> Which functions in particular are you thinking of?

It is entirely possible it is fixed in 4.3.  I see  
"_ZStL17__verify_groupingPKcmRKSs" coming from something transitively  
coming in from <iostream> as an example.  It takes an std::string, so  
it gets debug info for all of strings, locales, ....

-Chris


From clattner at apple.com  Tue Jul  8 19:21:17 2008
From: clattner at apple.com (Chris Lattner)
Date: Tue, 8 Jul 2008 17:21:17 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53247 -
	/llvm-gcc-4.2/trunk/gcc/doc/invoke.texi
In-Reply-To: <200807082048.m68Km5mY005007@zion.cs.uiuc.edu>
References: <200807082048.m68Km5mY005007@zion.cs.uiuc.edu>
Message-ID: <A465B8A4-77D4-4E5E-BAE3-A9EED1F8474B@apple.com>


On Jul 8, 2008, at 1:48 PM, Devang Patel wrote:

> Author: dpatel
> Date: Tue Jul  8 15:47:55 2008
> New Revision: 53247
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53247&view=rev
> Log:
> Clarify -mllvm info.

Thanks.

> Modified: llvm-gcc-4.2/trunk/gcc/doc/invoke.texi
> URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/doc/invoke.texi?rev=53247&r1=53246&r2=53247&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm-gcc-4.2/trunk/gcc/doc/invoke.texi (original)
> +++ llvm-gcc-4.2/trunk/gcc/doc/invoke.texi Tue Jul  8 15:47:55 2008
> @@ -4848,8 +4848,10 @@
> @c LLVM LOCAL begin
> @item -mllvm @var{string}
> @opindex mllvm
> -This options provides a way to supply llvm optimization and code
> -generation debugging options to LLVM component directly.
> +This option provides a way to supply llvm optimization and code
> +generation debugging options to LLVM component directly. This option
> +is intended for compiler developers, who are investigationg LLVM
> +component bug, only.

investigationg LLVM component bug, only. -> investigating LLVM bugs,  
not end users.

-Chris



From dalej at apple.com  Tue Jul  8 19:31:44 2008
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 09 Jul 2008 00:31:44 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53266 -
	/llvm-gcc-4.2/trunk/gcc/tree.c
Message-ID: <200807090031.m690Vjlm015549@zion.cs.uiuc.edu>

Author: johannes
Date: Tue Jul  8 19:31:44 2008
New Revision: 53266

URL: http://llvm.org/viewvc/llvm-project?rev=53266&view=rev
Log:
This reverts the tree.c part of 
http://llvm.org/viewvc/llvm-project?view=rev&revision=40686
which is not correct, because a field of a struct is not
necessarily as aligned as the base of the struct.  Fixes
gcc.c-torture/execute/struct-cpy-1.c
on Darwin x86-32, and probably other x86.

I do not understand what that patch was trying to do, so it's
possible something else will break.  The test Lauro checked
in along with this patch works, though.


Modified:
    llvm-gcc-4.2/trunk/gcc/tree.c

Modified: llvm-gcc-4.2/trunk/gcc/tree.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/tree.c?rev=53266&r1=53265&r2=53266&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/tree.c (original)
+++ llvm-gcc-4.2/trunk/gcc/tree.c Tue Jul  8 19:31:44 2008
@@ -1911,11 +1911,7 @@
     case SAVE_EXPR:         case COMPOUND_EXPR:       case MODIFY_EXPR:
     case INIT_EXPR:         case TARGET_EXPR:         case WITH_CLEANUP_EXPR:
     case CLEANUP_POINT_EXPR:
-    /* LLVM local begin */
-    /* return correctly the alignment of packed structs */
-    case COMPONENT_REF:
-    /* LLVM local end */
-      /* These don't change the alignment of an object.  */
+      /* These don't change the alignment of an object. */
       return expr_align (TREE_OPERAND (t, 0));
 
     case COND_EXPR:




From dpatel at apple.com  Tue Jul  8 19:33:52 2008
From: dpatel at apple.com (Devang Patel)
Date: Wed, 09 Jul 2008 00:33:52 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53267 -
	/llvm-gcc-4.2/trunk/gcc/doc/invoke.texi
Message-ID: <200807090033.m690XqJ2015673@zion.cs.uiuc.edu>

Author: dpatel
Date: Tue Jul  8 19:33:52 2008
New Revision: 53267

URL: http://llvm.org/viewvc/llvm-project?rev=53267&view=rev
Log:
spell check. clarify that -mllvm is not for end users.

Modified:
    llvm-gcc-4.2/trunk/gcc/doc/invoke.texi

Modified: llvm-gcc-4.2/trunk/gcc/doc/invoke.texi
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/doc/invoke.texi?rev=53267&r1=53266&r2=53267&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/doc/invoke.texi (original)
+++ llvm-gcc-4.2/trunk/gcc/doc/invoke.texi Tue Jul  8 19:33:52 2008
@@ -4850,8 +4850,8 @@
 @opindex mllvm
 This option provides a way to supply llvm optimization and code
 generation debugging options to LLVM component directly. This option
-is intended for compiler developers, who are investigationg LLVM 
-component bug, only.
+is intended for compiler developers, who are investigating LLVM 
+bugs, not end users.
 @c LLVM LOCAL end
 
 @item -time




From gohman at apple.com  Tue Jul  8 19:50:40 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 09 Jul 2008 00:50:40 -0000
Subject: [llvm-commits] [llvm] r53268 -
	/llvm/trunk/lib/VMCore/PassManager.cpp
Message-ID: <200807090050.m690oe21016293@zion.cs.uiuc.edu>

Author: djg
Date: Tue Jul  8 19:50:40 2008
New Revision: 53268

URL: http://llvm.org/viewvc/llvm-project?rev=53268&view=rev
Log:
Consistently put quotes around pass names in debugging output.

Modified:
    llvm/trunk/lib/VMCore/PassManager.cpp

Modified: llvm/trunk/lib/VMCore/PassManager.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/PassManager.cpp?rev=53268&r1=53267&r2=53268&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/PassManager.cpp (original)
+++ llvm/trunk/lib/VMCore/PassManager.cpp Tue Jul  8 19:50:40 2008
@@ -628,7 +628,7 @@
   OtherDT.getBase().recalculate(F);
   if (DT->compare(OtherDT)) {
     cerr << "Dominator Information for " << F.getNameStart() << "\n";
-    cerr << "Pass " << P.getPassName() << "\n";
+    cerr << "Pass '" << P.getPassName() << "'\n";
     cerr << "----- Valid -----\n";
     OtherDT.dump();
     cerr << "----- Invalid -----\n";
@@ -645,7 +645,7 @@
   OtherDF.calculate(*DT, DT->getNode(DTRoots[0]));
   if (DF->compare(OtherDF)) {
     cerr << "Dominator Information for " << F.getNameStart() << "\n";
-    cerr << "Pass " << P.getPassName() << "\n";
+    cerr << "Pass '" << P.getPassName() << "'\n";
     cerr << "----- Valid -----\n";
     OtherDF.dump();
     cerr << "----- Invalid -----\n";
@@ -672,8 +672,8 @@
       AvailableAnalysis.erase(Info);
       if (PassDebugging >= Details) {
         Pass *S = Info->second;
-        cerr << " -- " <<  P->getPassName() << " is not preserving ";
-        cerr << S->getPassName() << "\n";
+        cerr << " -- '" <<  P->getPassName() << "' is not preserving '";
+        cerr << S->getPassName() << "'\n";
       }
     }
   }
@@ -711,8 +711,8 @@
   TPM->collectLastUses(DeadPasses, P);
 
   if (PassDebugging >= Details && !DeadPasses.empty()) {
-    cerr << " -*- " <<  P->getPassName();
-    cerr << " is the last user of following pass instances.";
+    cerr << " -*- '" <<  P->getPassName();
+    cerr << "' is the last user of following pass instances.";
     cerr << " Free these instances\n";
   }
 
@@ -984,8 +984,8 @@
   // checks whether any lower level manager will be able to provide this 
   // analysis info on demand or not.
 #ifndef NDEBUG
-  cerr << "Unable to schedule " << RequiredPass->getPassName();
-  cerr << " required by " << P->getPassName() << "\n";
+  cerr << "Unable to schedule '" << RequiredPass->getPassName();
+  cerr << "' required by '" << P->getPassName() << "'\n";
 #endif
   assert (0 && "Unable to schedule pass");
 }




From nicholas at mxc.ca  Tue Jul  8 22:21:57 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 09 Jul 2008 03:21:57 -0000
Subject: [llvm-commits] [llvm] r53269 - in /llvm/trunk:
 include/llvm/Analysis/ScalarEvolution.h
 include/llvm/Analysis/ScalarEvolutionExpressions.h
 lib/Analysis/ScalarEvolution.cpp
Message-ID: <200807090321.m693LwQM021096@zion.cs.uiuc.edu>

Author: nicholas
Date: Tue Jul  8 22:21:51 2008
New Revision: 53269

URL: http://llvm.org/viewvc/llvm-project?rev=53269&view=rev
Log:
Remove getValueRange from SCEV. It wasn't doing anything there anyways, and a
more complete version is now available from the LoopVR pass.

Modified:
    llvm/trunk/include/llvm/Analysis/ScalarEvolution.h
    llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp

Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolution.h?rev=53269&r1=53268&r2=53269&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Analysis/ScalarEvolution.h (original)
+++ llvm/trunk/include/llvm/Analysis/ScalarEvolution.h Tue Jul  8 22:21:51 2008
@@ -59,10 +59,6 @@
 
     unsigned getSCEVType() const { return SCEVType; }
 
-    /// getValueRange - Return the tightest constant bounds that this value is
-    /// known to have.  This method is only valid on integer SCEV objects.
-    virtual ConstantRange getValueRange() const;
-
     /// isLoopInvariant - Return true if the value of this SCEV is unchanging in
     /// the specified loop.
     virtual bool isLoopInvariant(const Loop *L) const = 0;

Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h?rev=53269&r1=53268&r2=53269&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h (original)
+++ llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h Tue Jul  8 22:21:51 2008
@@ -42,10 +42,6 @@
   public:
     ConstantInt *getValue() const { return V; }
 
-    /// getValueRange - Return the tightest constant bounds that this value is
-    /// known to have.  This method is only valid on integer SCEV objects.
-    virtual ConstantRange getValueRange() const;
-
     virtual bool isLoopInvariant(const Loop *L) const {
       return true;
     }
@@ -104,10 +100,6 @@
       return SE.getTruncateExpr(H, Ty);
     }
 
-    /// getValueRange - Return the tightest constant bounds that this value is
-    /// known to have.  This method is only valid on integer SCEV objects.
-    virtual ConstantRange getValueRange() const;
-
     virtual void print(std::ostream &OS) const;
     void print(std::ostream *OS) const { if (OS) print(*OS); }
 
@@ -141,10 +133,6 @@
       return Op->hasComputableLoopEvolution(L);
     }
 
-    /// getValueRange - Return the tightest constant bounds that this value is
-    /// known to have.  This method is only valid on integer SCEV objects.
-    virtual ConstantRange getValueRange() const;
-
     SCEVHandle replaceSymbolicValuesWithConcrete(const SCEVHandle &Sym,
                                                  const SCEVHandle &Conc,
                                                  ScalarEvolution &SE) const {
@@ -187,10 +175,6 @@
       return Op->hasComputableLoopEvolution(L);
     }
 
-    /// getValueRange - Return the tightest constant bounds that this value is
-    /// known to have.  This method is only valid on integer SCEV objects.
-    virtual ConstantRange getValueRange() const;
-
     SCEVHandle replaceSymbolicValuesWithConcrete(const SCEVHandle &Sym,
                                                  const SCEVHandle &Conc,
                                                  ScalarEvolution &SE) const {

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=53269&r1=53268&r2=53269&view=diff

==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Tue Jul  8 22:21:51 2008
@@ -117,15 +117,6 @@
   print(cerr);
 }
 
-/// getValueRange - Return the tightest constant bounds that this value is
-/// known to have.  This method is only valid on integer SCEV objects.
-ConstantRange SCEV::getValueRange() const {
-  const Type *Ty = getType();
-  assert(Ty->isInteger() && "Can't get range for a non-integer SCEV!");
-  // Default to a full range if no better information is available.
-  return ConstantRange(getBitWidth());
-}
-
 uint32_t SCEV::getBitWidth() const {
   if (const IntegerType* ITy = dyn_cast<IntegerType>(getType()))
     return ITy->getBitWidth();
@@ -192,10 +183,6 @@
   return getConstant(ConstantInt::get(Val));
 }
 
-ConstantRange SCEVConstant::getValueRange() const {
-  return ConstantRange(V->getValue());
-}
-
 const Type *SCEVConstant::getType() const { return V->getType(); }
 
 void SCEVConstant::print(std::ostream &OS) const {
@@ -220,10 +207,6 @@
   SCEVTruncates->erase(std::make_pair(Op, Ty));
 }
 
-ConstantRange SCEVTruncateExpr::getValueRange() const {
-  return getOperand()->getValueRange().truncate(getBitWidth());
-}
-
 void SCEVTruncateExpr::print(std::ostream &OS) const {
   OS << "(truncate " << *Op << " to " << *Ty << ")";
 }
@@ -246,10 +229,6 @@
   SCEVZeroExtends->erase(std::make_pair(Op, Ty));
 }
 
-ConstantRange SCEVZeroExtendExpr::getValueRange() const {
-  return getOperand()->getValueRange().zeroExtend(getBitWidth());
-}
-
 void SCEVZeroExtendExpr::print(std::ostream &OS) const {
   OS << "(zeroextend " << *Op << " to " << *Ty << ")";
 }
@@ -272,10 +251,6 @@
   SCEVSignExtends->erase(std::make_pair(Op, Ty));
 }
 
-ConstantRange SCEVSignExtendExpr::getValueRange() const {
-  return getOperand()->getValueRange().signExtend(getBitWidth());
-}
-
 void SCEVSignExtendExpr::print(std::ostream &OS) const {
   OS << "(signextend " << *Op << " to " << *Ty << ")";
 }
@@ -2906,12 +2881,6 @@
       SV->print(OS);
       OS << "\t\t";
 
-      if ((*I).getType()->isInteger()) {
-        ConstantRange Bounds = SV->getValueRange();
-        if (!Bounds.isFullSet())
-          OS << "Bounds: " << Bounds << " ";
-      }
-
       if (const Loop *L = LI.getLoopFor((*I).getParent())) {
         OS << "Exits: ";
         SCEVHandle ExitValue = getSCEVAtScope(&*I, L->getParentLoop());




From bruno.cardoso at gmail.com  Tue Jul  8 23:15:08 2008
From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes)
Date: Wed, 09 Jul 2008 04:15:08 -0000
Subject: [llvm-commits] [llvm] r53270 - in /llvm/trunk/lib/Target/Mips:
 MipsISelLowering.cpp MipsISelLowering.h
Message-ID: <200807090415.m694F9T1022652@zion.cs.uiuc.edu>

Author: bruno
Date: Tue Jul  8 23:15:08 2008
New Revision: 53270

URL: http://llvm.org/viewvc/llvm-project?rev=53270&view=rev
Log:
MipsTargetLowering cleanup

Modified:
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
    llvm/trunk/lib/Target/Mips/MipsISelLowering.h

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=53270&r1=53269&r2=53270&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Tue Jul  8 23:15:08 2008
@@ -74,20 +74,21 @@
   } else 
     addRegisterClass(MVT::f32, Mips::FGR32RegisterClass);
 
-  // Custom
-  setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
-  setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom);
-  setOperationAction(ISD::RET, MVT::Other, Custom);
-  setOperationAction(ISD::JumpTable, MVT::i32, Custom);
-  setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
-  setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
-
   // Load extented operations for i1 types must be promoted 
   setLoadXAction(ISD::EXTLOAD,  MVT::i1,  Promote);
   setLoadXAction(ISD::ZEXTLOAD, MVT::i1,  Promote);
   setLoadXAction(ISD::SEXTLOAD, MVT::i1,  Promote);
 
-  // Mips does not have these NodeTypes below.
+  // Mips Custom Operations
+  setOperationAction(ISD::GlobalAddress,    MVT::i32,   Custom);
+  setOperationAction(ISD::GlobalTLSAddress, MVT::i32,   Custom);
+  setOperationAction(ISD::RET,              MVT::Other, Custom);
+  setOperationAction(ISD::JumpTable,        MVT::i32,   Custom);
+  setOperationAction(ISD::ConstantPool,     MVT::f32,   Custom);
+  setOperationAction(ISD::SELECT_CC,        MVT::i32,   Custom);
+  setOperationAction(ISD::SELECT_CC,        MVT::f32,   Custom);
+
+  // Operations not directly supported by Mips.
   setConvertAction(MVT::f64, MVT::f32, Expand);
 
   setOperationAction(ISD::BR_JT,             MVT::Other, Expand);
@@ -97,39 +98,35 @@
   setOperationAction(ISD::UINT_TO_FP,        MVT::i32,   Expand);
   setOperationAction(ISD::FP_TO_UINT,        MVT::i32,   Expand);
   setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1,    Expand);
+  setOperationAction(ISD::CTPOP,             MVT::i32,   Expand);
+  setOperationAction(ISD::CTTZ,              MVT::i32,   Expand);
+  setOperationAction(ISD::CTLZ,              MVT::i32,   Expand);
+  setOperationAction(ISD::ROTL,              MVT::i32,   Expand);
+  setOperationAction(ISD::ROTR,              MVT::i32,   Expand);
+  setOperationAction(ISD::BSWAP,             MVT::i32,   Expand);
+  setOperationAction(ISD::SHL_PARTS,         MVT::i32,   Expand);
+  setOperationAction(ISD::SRA_PARTS,         MVT::i32,   Expand);
+  setOperationAction(ISD::SRL_PARTS,         MVT::i32,   Expand);
+
+  // We don't have line number support yet.
+  setOperationAction(ISD::DBG_STOPPOINT,     MVT::Other, Expand);
+  setOperationAction(ISD::DEBUG_LOC,         MVT::Other, Expand);
+  setOperationAction(ISD::DBG_LABEL,         MVT::Other, Expand);
+  setOperationAction(ISD::EH_LABEL,          MVT::Other, Expand);
+
+  // Use the default for now
+  setOperationAction(ISD::STACKSAVE,         MVT::Other, Expand);
+  setOperationAction(ISD::STACKRESTORE,      MVT::Other, Expand);
+  setOperationAction(ISD::MEMBARRIER,        MVT::Other, Expand);
 
   if (Subtarget->isSingleFloat()) 
     setOperationAction(ISD::SELECT_CC, MVT::f64, Expand);
 
   if (!Subtarget->isAllegrex()) {
-    setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8, Expand);
+    setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8,  Expand);
     setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand);
   }
 
-  // Mips not supported intrinsics.
-  setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand);
-
-  setOperationAction(ISD::CTPOP, MVT::i32, Expand);
-  setOperationAction(ISD::CTTZ , MVT::i32, Expand);
-  setOperationAction(ISD::CTLZ , MVT::i32, Expand);
-  setOperationAction(ISD::ROTL , MVT::i32, Expand);
-  setOperationAction(ISD::ROTR , MVT::i32, Expand);
-  setOperationAction(ISD::BSWAP, MVT::i32, Expand);
-
-  setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
-  setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
-  setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand);
-
-  // We don't have line number support yet.
-  setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
-  setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
-  setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand);
-  setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
-
-  // Use the default for now
-  setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
-  setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
-
   setStackPointerRegisterToSaveRestore(Mips::SP);
   computeRegisterProperties();
 }
@@ -151,6 +148,7 @@
     case ISD::GlobalAddress:    return LowerGlobalAddress(Op, DAG);
     case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
     case ISD::JumpTable:        return LowerJumpTable(Op, DAG);
+    case ISD::ConstantPool:     return LowerConstantPool(Op, DAG);
     case ISD::SELECT_CC:        return LowerSELECT_CC(Op, DAG);
   }
   return SDOperand();
@@ -313,6 +311,13 @@
   return ResNode;
 }
 
+SDOperand MipsTargetLowering::
+LowerConstantPool(SDOperand Op, SelectionDAG &DAG) 
+{
+  assert(0 && "ConstantPool not implemented for MIPS.");
+  return SDOperand(); // Not reached
+}
+
 //===----------------------------------------------------------------------===//
 //                      Calling Convention Implementation
 //

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.h?rev=53270&r1=53269&r2=53270&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.h Tue Jul  8 23:15:08 2008
@@ -92,6 +92,7 @@
     SDOperand LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerGlobalTLSAddress(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerJumpTable(SDOperand Op, SelectionDAG &DAG);
+    SDOperand LowerConstantPool(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerSELECT_CC(SDOperand Op, SelectionDAG &DAG);
 
     virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,




From nicholas at mxc.ca  Tue Jul  8 23:32:37 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 09 Jul 2008 04:32:37 -0000
Subject: [llvm-commits] [llvm] r53271 - in /llvm/trunk:
 lib/Transforms/Scalar/InstructionCombining.cpp
 test/Transforms/InstCombine/2008-07-08-SubAnd.ll
Message-ID: <200807090432.m694WclY023187@zion.cs.uiuc.edu>

Author: nicholas
Date: Tue Jul  8 23:32:37 2008
New Revision: 53271

URL: http://llvm.org/viewvc/llvm-project?rev=53271&view=rev
Log:
Reduce x - y to -y when we know the 'x' part will get masked off anyways.

Added:
    llvm/trunk/test/Transforms/InstCombine/2008-07-08-SubAnd.ll
Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53271&r1=53270&r2=53271&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Jul  8 23:32:37 2008
@@ -3461,6 +3461,17 @@
         // ((A ^ N) - B) & AndRHS -> (A - B) & AndRHS iff N&AndRHS == 0
         if (Value *V = FoldLogicalPlusAnd(Op0LHS, Op0RHS, AndRHS, true, I))
           return BinaryOperator::CreateAnd(V, AndRHS);
+
+        // (A - N) & AndRHS -> -N & AndRHS where A & AndRHS == 0
+        if (Op0I->hasOneUse() && MaskedValueIsZero(Op0LHS, AndRHSMask)) {
+          ConstantInt *A = dyn_cast<ConstantInt>(Op0LHS);
+          if (!A || !A->isZero()) {
+            Instruction *NewNeg = BinaryOperator::CreateNeg(Op0RHS);
+            InsertNewInstBefore(NewNeg, I);
+            return BinaryOperator::CreateAnd(NewNeg, AndRHS);
+          }
+        }
+
         break;
       }
 
@@ -3780,7 +3791,7 @@
           }
     }
   }
-      
+
   return Changed ? &I : 0;
 }
 

Added: llvm/trunk/test/Transforms/InstCombine/2008-07-08-SubAnd.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-07-08-SubAnd.ll?rev=53271&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2008-07-08-SubAnd.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/2008-07-08-SubAnd.ll Tue Jul  8 23:32:37 2008
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep -v {i32 8}
+; PR2330
+
+define i32 @a(i32 %a) nounwind  {
+entry:
+	%tmp2 = sub i32 8, %a		; <i32> [#uses=1]
+	%tmp3 = and i32 %tmp2, 7		; <i32> [#uses=1]
+	ret i32 %tmp3
+}




From bruno.cardoso at gmail.com  Tue Jul  8 23:45:37 2008
From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes)
Date: Wed, 09 Jul 2008 04:45:37 -0000
Subject: [llvm-commits] [llvm] r53272 - in /llvm/trunk/lib/Target/Mips:
 MipsAsmPrinter.cpp MipsISelDAGToDAG.cpp MipsISelLowering.cpp
 MipsISelLowering.h MipsInstrFPU.td MipsInstrFormats.td MipsInstrInfo.cpp
 MipsInstrInfo.h MipsSubtarget.h
Message-ID: <200807090445.m694jbNl023628@zion.cs.uiuc.edu>

Author: bruno
Date: Tue Jul  8 23:45:36 2008
New Revision: 53272

URL: http://llvm.org/viewvc/llvm-project?rev=53272&view=rev
Log:
Fixe typos and 80 column size problems

Modified:
    llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp
    llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
    llvm/trunk/lib/Target/Mips/MipsISelLowering.h
    llvm/trunk/lib/Target/Mips/MipsInstrFPU.td
    llvm/trunk/lib/Target/Mips/MipsInstrFormats.td
    llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
    llvm/trunk/lib/Target/Mips/MipsInstrInfo.h
    llvm/trunk/lib/Target/Mips/MipsSubtarget.h

Modified: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=53272&r1=53271&r2=53272&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Tue Jul  8 23:45:36 2008
@@ -148,7 +148,7 @@
   O << "," << Offset << "\n";
 }
 
-/// TODO: Mask Directive for Float Point
+/// TODO: Mask Directive for Floating Point
 void MipsAsmPrinter::
 emitFMaskDirective(MachineFunction &MF)
 {
@@ -191,14 +191,14 @@
 }  
 
 // Create a bitmask with all callee saved registers for CPU
-// or Float Point registers. For CPU registers consider RA,
+// or Floating Point registers. For CPU registers consider RA,
 // GP and FP for saving if necessary.
 unsigned int MipsAsmPrinter::
 getSavedRegsBitmask(bool isFloat, MachineFunction &MF)
 {
   const TargetRegisterInfo &RI = *TM.getRegisterInfo();
              
-  // Float Point Registers, TODO
+  // Floating Point Registers, TODO
   if (isFloat)
     return 0;
 

Modified: llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp?rev=53272&r1=53271&r2=53272&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp Tue Jul  8 23:45:36 2008
@@ -275,8 +275,8 @@
       SDNode *Node = CurDAG->getTargetNode(Op, MVT::Flag, Op1, Op2);
 
       SDOperand InFlag = SDOperand(Node, 0);
-      SDNode *Lo = CurDAG->getTargetNode(Mips::MFLO, MVT::i32, MVT::Flag, InFlag);
-
+      SDNode *Lo = CurDAG->getTargetNode(Mips::MFLO, MVT::i32, 
+                                         MVT::Flag, InFlag);
       InFlag = SDOperand(Lo,1);
       SDNode *Hi = CurDAG->getTargetNode(Mips::MFHI, MVT::i32, InFlag);
 

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=53272&r1=53271&r2=53272&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Tue Jul  8 23:45:36 2008
@@ -804,7 +804,7 @@
   //       unless generating MIPS16 code. 
   // 'y' : Equivalent to r; retained for 
   //       backwards compatibility. 
-  // 'f' : Float Point registers.      
+  // 'f' : Floating Point registers.      
   if (Constraint.size() == 1) {
     switch (Constraint[0]) {
       default : break;

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.h?rev=53272&r1=53271&r2=53272&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.h Tue Jul  8 23:45:36 2008
@@ -40,10 +40,10 @@
       // Select CC Pseudo Instruction
       SelectCC,
 
-      // Float Point Branch Conditional
+      // Floating Point Branch Conditional
       FPBrcond,
 
-      // Float Point Compare
+      // Floating Point Compare
       FPCmp,
 
       // Return 

Modified: llvm/trunk/lib/Target/Mips/MipsInstrFPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrFPU.td?rev=53272&r1=53271&r2=53272&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrFPU.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrFPU.td Tue Jul  8 23:45:36 2008
@@ -12,7 +12,7 @@
 //===----------------------------------------------------------------------===//
 
 //===----------------------------------------------------------------------===//
-// Float Point Instructions
+// Floating Point Instructions
 // ------------------------
 // * 64bit fp:
 //    - 32 64-bit registers (default mode)
@@ -23,7 +23,7 @@
 //    - 32 32-bit registers (within single-only mode)
 //===----------------------------------------------------------------------===//
 
-// Float Point Compare and Branch
+// Floating Point Compare and Branch
 def SDT_MipsFPBrcond : SDTypeProfile<0, 3, [SDTCisSameAs<0, 2>, SDTCisInt<0>,
                                      SDTCisVT<1, OtherVT>]>;
 def SDT_MipsFPCmp : SDTypeProfile<0, 3, [SDTCisSameAs<0, 1>, SDTCisFP<0>, 
@@ -98,7 +98,8 @@
 
 
 multiclass FFR1_4<bits<6> funct, string asmstr, SDNode FOp> {
-  def _SO32 : FFR<0x11, funct, 0x0, (outs FGR32:$fd), (ins FGR32:$fs, FGR32:$ft), 
+  def _SO32 : FFR<0x11, funct, 0x0, (outs FGR32:$fd), 
+                 (ins FGR32:$fs, FGR32:$ft), 
                  !strconcat(asmstr, ".s $fd, $fs, $ft"),
                  [(set FGR32:$fd, (FOp FGR32:$fs, FGR32:$ft))]>,
                  Requires<[IsSingleFloat]>;
@@ -117,7 +118,7 @@
 }
 
 //===----------------------------------------------------------------------===//
-// Float Point Instructions
+// Floating Point Instructions
 //===----------------------------------------------------------------------===//
 
 let ft = 0 in {
@@ -199,7 +200,7 @@
                   "mtc1 $fs, $rt", []>;
 }
 
-/// Float Point Memory Instructions
+/// Floating Point Memory Instructions
 let Predicates = [IsNotSingleFloat] in {
   def LDC1 : FFI<0b110101, (outs AFGR64:$ft), (ins mem:$addr), 
                  "ldc1 $ft, $addr", [(set AFGR64:$ft, (load addr:$addr))]>;
@@ -216,8 +217,8 @@
 
 def LWC1A : FFI<0b110001, (outs AFGR32:$ft), (ins mem:$addr), "lwc1 $ft, $addr",
                [(set AFGR32:$ft, (load addr:$addr))]>; 
-def SWC1A : FFI<0b111001, (outs), (ins AFGR32:$ft, mem:$addr), "swc1 $ft, $addr",
-               [(store AFGR32:$ft, addr:$addr)]>; 
+def SWC1A : FFI<0b111001, (outs), (ins AFGR32:$ft, mem:$addr), 
+                "swc1 $ft, $addr", [(store AFGR32:$ft, addr:$addr)]>; 
 
 /// Floating-point Aritmetic
 defm FADD : FFR1_4<0x10, "add", fadd>;
@@ -226,7 +227,7 @@
 defm FSUB : FFR1_4<0x01, "sub", fsub>;
 
 //===----------------------------------------------------------------------===//
-// Float Point Branch Codes
+// Floating Point Branch Codes
 //===----------------------------------------------------------------------===//
 // Mips branch codes. These correspond to condcode in MipsInstrInfo.h. 
 // They must be kept in synch.
@@ -235,7 +236,7 @@
 def MIPS_BRANCH_FL : PatLeaf<(i32 2)>;
 def MIPS_BRANCH_TL : PatLeaf<(i32 3)>;
 
-/// Float Point Branch of False/True (Likely)
+/// Floating Point Branch of False/True (Likely)
 let isBranch=1, isTerminator=1, hasDelaySlot=1, base=0x8, Uses=[FCR31] in {
   class FBRANCH<PatLeaf op, string asmstr> : FFI<0x11, (ops), 
         (ins brtarget:$dst), !strconcat(asmstr, " $dst"),
@@ -247,7 +248,7 @@
 def BC1TL : FBRANCH<MIPS_BRANCH_TL, "bc1tl">;
 
 //===----------------------------------------------------------------------===//
-// Float Point Flag Conditions
+// Floating Point Flag Conditions
 //===----------------------------------------------------------------------===//
 // Mips condition codes. They must correspond to condcode in MipsInstrInfo.h. 
 // They must be kept in synch.
@@ -287,7 +288,7 @@
 }
 
 //===----------------------------------------------------------------------===//
-// Float Point Patterns
+// Floating Point Patterns
 //===----------------------------------------------------------------------===//
 def : Pat<(f32 (sint_to_fp CPURegs:$src)), (CVTS_W32 (MTC1 CPURegs:$src))>;
 def : Pat<(f64 (sint_to_fp CPURegs:$src)), (CVTD_W32 (MTC1 CPURegs:$src))>;

Modified: llvm/trunk/lib/Target/Mips/MipsInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrFormats.td?rev=53272&r1=53271&r2=53272&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrFormats.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrFormats.td Tue Jul  8 23:45:36 2008
@@ -104,7 +104,7 @@
 
 //===----------------------------------------------------------------------===//
 //
-//  FLOAT POINT INSTRUCTION FORMATS
+//  FLOATING POINT INSTRUCTION FORMATS
 //
 //  opcode  - operation code.
 //  fs      - src reg.

Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp?rev=53272&r1=53271&r2=53272&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp Tue Jul  8 23:45:36 2008
@@ -289,7 +289,8 @@
   case Mips::FMOV_D32:
     if ((MI->getOperand(0).isRegister()) &&
         (MI->getOperand(1).isRegister())) {
-      const TargetRegisterClass *RC = RI.getRegClass(MI->getOperand(0).getReg());
+      const TargetRegisterClass 
+        *RC = RI.getRegClass(MI->getOperand(0).getReg());
       unsigned StoreOpc, LoadOpc;
 
       if (RC == Mips::FGR32RegisterClass) {

Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.h?rev=53272&r1=53271&r2=53272&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.h Tue Jul  8 23:45:36 2008
@@ -160,7 +160,8 @@
   virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
                                 MachineBasicBlock *FBB,
                                 const std::vector<MachineOperand> &Cond) const;
-  virtual void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
+  virtual void copyRegToReg(MachineBasicBlock &MBB, 
+                            MachineBasicBlock::iterator I,
                             unsigned DestReg, unsigned SrcReg,
                             const TargetRegisterClass *DestRC,
                             const TargetRegisterClass *SrcRC) const;

Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.h?rev=53272&r1=53271&r2=53272&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSubtarget.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsSubtarget.h Tue Jul  8 23:45:36 2008
@@ -45,16 +45,16 @@
 
   // IsSingleFloat - The target only supports single precision float
   // point operations. This enable the target to use all 32 32-bit
-  // float point registers instead of only using even ones.
+  // floating point registers instead of only using even ones.
   bool IsSingleFloat;
 
-  // IsFP64bit - The target processor has 64-bit float point registers.
+  // IsFP64bit - The target processor has 64-bit floating point registers.
   bool IsFP64bit;
 
   // IsFP64bit - General-purpose registers are 64 bits wide
   bool IsGP64bit;
 
-  // HasAllegrexVFPU - Allegrex processor has a vector float point unit.
+  // HasAllegrexVFPU - Allegrex processor has a vector floating point unit.
   bool HasAllegrexVFPU;
 
   // IsAllegrex - The target processor is a Allegrex core.




From sabre at nondot.org  Wed Jul  9 00:01:03 2008
From: sabre at nondot.org (Chris Lattner)
Date: Wed, 09 Jul 2008 05:01:03 -0000
Subject: [llvm-commits] [llvm] r53273 -
 /llvm/trunk/test/Transforms/InstCombine/2008-04-29-VolatileLoadMerge.ll
Message-ID: <200807090501.m69513Zb024156@zion.cs.uiuc.edu>

Author: lattner
Date: Wed Jul  9 00:01:02 2008
New Revision: 53273

URL: http://llvm.org/viewvc/llvm-project?rev=53273&view=rev
Log:
Fix a broken test.  Neither load is eliminable without changing the CFG.

Modified:
    llvm/trunk/test/Transforms/InstCombine/2008-04-29-VolatileLoadMerge.ll

Modified: llvm/trunk/test/Transforms/InstCombine/2008-04-29-VolatileLoadMerge.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-04-29-VolatileLoadMerge.ll?rev=53273&r1=53272&r2=53273&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2008-04-29-VolatileLoadMerge.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/2008-04-29-VolatileLoadMerge.ll Wed Jul  9 00:01:02 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {volatile load} | count 1
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {volatile load} | count 2
 ; PR2262
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i386-apple-darwin8"




From sabre at nondot.org  Wed Jul  9 00:12:08 2008
From: sabre at nondot.org (Chris Lattner)
Date: Wed, 09 Jul 2008 05:12:08 -0000
Subject: [llvm-commits] [llvm] r53274 -
	/llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp
Message-ID: <200807090512.m695C8jI024525@zion.cs.uiuc.edu>

Author: lattner
Date: Wed Jul  9 00:12:07 2008
New Revision: 53274

URL: http://llvm.org/viewvc/llvm-project?rev=53274&view=rev
Log:
random bugfix sitting in my tree.

Modified:
    llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp?rev=53274&r1=53273&r2=53274&view=diff

==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp Wed Jul  9 00:12:07 2008
@@ -443,7 +443,8 @@
       SDOperand(CurDAG->getTargetNode(IA64::ADDL_GA, MVT::i64, 
                                       CurDAG->getRegister(IA64::r1,
                                                           MVT::i64), GA), 0);
-    return CurDAG->getTargetNode(IA64::LD8, MVT::i64, MVT::Other, Tmp);
+    return CurDAG->getTargetNode(IA64::LD8, MVT::i64, MVT::Other, Tmp,
+                                 CurDAG->getEntryNode());
   }
   
 /* XXX




From sabre at nondot.org  Wed Jul  9 00:14:23 2008
From: sabre at nondot.org (Chris Lattner)
Date: Wed, 09 Jul 2008 05:14:23 -0000
Subject: [llvm-commits] [llvm] r53275 - in /llvm/trunk:
 docs/BitCodeFormat.html include/llvm/Bitcode/BitstreamWriter.h
 lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Writer/BitcodeWriter.cpp
 lib/System/Path.cpp
Message-ID: <200807090514.m695ENtO024636@zion.cs.uiuc.edu>

Author: lattner
Date: Wed Jul  9 00:14:23 2008
New Revision: 53275

URL: http://llvm.org/viewvc/llvm-project?rev=53275&view=rev
Log:
Add a little wrapper header that is put around bc files when emitting
bc files for modules with a target triple that indicates they are for
darwin.  The reader unconditionally handles this, and the writer could
turn this on for more targets if we care.

This change has two benefits for darwin:

1) it allows us to encode the cpu type of the file in an easy to read
   place that doesn't require decoding the bc file.
2) it works around a bug (IMO) in darwin's AR where it is incapable of
   handling files that are not a multiple of 8 bytes long.  BC files
   are only guaranteed to be multiples of 4 bytes long.

Modified:
    llvm/trunk/docs/BitCodeFormat.html
    llvm/trunk/include/llvm/Bitcode/BitstreamWriter.h
    llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp
    llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
    llvm/trunk/lib/System/Path.cpp

Modified: llvm/trunk/docs/BitCodeFormat.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/BitCodeFormat.html?rev=53275&r1=53274&r2=53275&view=diff

==============================================================================
--- llvm/trunk/docs/BitCodeFormat.html (original)
+++ llvm/trunk/docs/BitCodeFormat.html Wed Jul  9 00:14:23 2008
@@ -22,6 +22,8 @@
     <li><a href="#stdblocks">Standard Blocks</a></li>
     </ol>
   </li>
+  <li><a href="#wrapper">Bitcode Wrapper Format</a>
+  </li>
   <li><a href="#llvmir">LLVM IR Encoding</a>
     <ol>
     <li><a href="#basics">Basics</a></li>
@@ -65,8 +67,12 @@
 provides a mechanism for the file to self-describe "abbreviations", which are
 effectively size optimizations for the content.</p>
 
-<p>This document first describes the LLVM bitstream format, then describes the
-record structure used by LLVM IR files.
+<p>LLVM IR files may be optionally embedded into a <a 
+href="#wrapper">wrapper</a> structure that makes it easy to embed extra data
+along with LLVM IR files.</p>
+
+<p>This document first describes the LLVM bitstream format, describes the
+wrapper format, then describes the record structure used by LLVM IR files.
 </p>
 
 </div>
@@ -545,6 +551,36 @@
 </div>
 
 <!-- *********************************************************************** -->
+<div class="doc_section"> <a name="wrapper">Bitcode Wrapper Format</a></div>
+<!-- *********************************************************************** -->
+
+<div class="doc_text">
+
+<p>Bitcode files for LLVM IR may optionally be wrapped in a simple wrapper
+structure.  This structure contains a simple header that indicates the offset
+and size of the embedded BC file.  This allows additional information to be
+stored alongside the BC file.  The structure of this file header is:
+</p>
+
+<p>
+<pre>
+[Magic<sub>32</sub>,
+ Version<sub>32</sub>,
+ Offset<sub>32</sub>,
+ Size<sub>32</sub>,
+ CPUType<sub>32</sub>]
+</pre></p>
+
+<p>Each of the fields are 32-bit fields stored in little endian form (as with
+the rest of the bitcode file fields).  The Magic number is always
+<tt>0x0B17C0DE</tt> and the version is currently always <tt>0</tt>.  The Offset
+field is the offset in bytes to the start of the bitcode stream in the file, and
+the Size field is a size in bytes of the stream. CPUType is a target-specific
+value that can be used to encode the CPU of the target.
+</div>
+
+
+<!-- *********************************************************************** -->
 <div class="doc_section"> <a name="llvmir">LLVM IR Encoding</a></div>
 <!-- *********************************************************************** -->
 

Modified: llvm/trunk/include/llvm/Bitcode/BitstreamWriter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Bitcode/BitstreamWriter.h?rev=53275&r1=53274&r2=53275&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Bitcode/BitstreamWriter.h (original)
+++ llvm/trunk/include/llvm/Bitcode/BitstreamWriter.h Wed Jul  9 00:14:23 2008
@@ -157,6 +157,15 @@
     Emit(Val, CurCodeSize);
   }
   
+  // BackpatchWord - Backpatch a 32-bit word in the output with the specified
+  // value.
+  void BackpatchWord(unsigned ByteNo, unsigned NewWord) {
+    Out[ByteNo++] = (unsigned char)(NewWord >>  0);
+    Out[ByteNo++] = (unsigned char)(NewWord >>  8);
+    Out[ByteNo++] = (unsigned char)(NewWord >> 16);
+    Out[ByteNo  ] = (unsigned char)(NewWord >> 24);
+  }
+  
   //===--------------------------------------------------------------------===//
   // Block Manipulation
   //===--------------------------------------------------------------------===//
@@ -227,10 +236,7 @@
     unsigned ByteNo = B.StartSizeWord*4;
     
     // Update the block size field in the header of this sub-block.
-    Out[ByteNo++] = (unsigned char)(SizeInWords >>  0);
-    Out[ByteNo++] = (unsigned char)(SizeInWords >>  8);
-    Out[ByteNo++] = (unsigned char)(SizeInWords >> 16);
-    Out[ByteNo++] = (unsigned char)(SizeInWords >> 24);
+    BackpatchWord(ByteNo, SizeInWords);
     
     // Restore the inner block's code size and abbrev table.
     CurCodeSize = B.PrevCodeSize;

Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=53275&r1=53274&r2=53275&view=diff

==============================================================================
--- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original)
+++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Wed Jul  9 00:14:23 2008
@@ -1184,6 +1184,47 @@
   return Error("Premature end of bitstream");
 }
 
+/// SkipWrapperHeader - Some systems wrap bc files with a special header for
+/// padding or other reasons.  The format of this header is:
+///
+/// struct bc_header {
+///   uint32_t Magic;         // 0x0B17C0DE
+///   uint32_t Version;       // Version, currently always 0.
+///   uint32_t BitcodeOffset; // Offset to traditional bitcode file.
+///   uint32_t BitcodeSize;   // Size of traditional bitcode file.
+///   ... potentially other gunk ...
+/// };
+/// 
+/// This function is called when we find a file with a matching magic number.
+/// In this case, skip down to the subsection of the file that is actually a BC
+/// file.
+static bool SkipWrapperHeader(unsigned char *&BufPtr, unsigned char *&BufEnd) {
+  enum {
+    KnownHeaderSize = 4*4,  // Size of header we read.
+    OffsetField = 2*4,      // Offset in bytes to Offset field.
+    SizeField = 3*4         // Offset in bytes to Size field.
+  };
+  
+  
+  // Must contain the header!
+  if (BufEnd-BufPtr < KnownHeaderSize) return true;
+  
+  unsigned Offset = ( BufPtr[OffsetField  ]        |
+                     (BufPtr[OffsetField+1] << 8)  |
+                     (BufPtr[OffsetField+2] << 16) |
+                     (BufPtr[OffsetField+3] << 24));
+  unsigned Size   = ( BufPtr[SizeField    ]        |
+                     (BufPtr[SizeField  +1] << 8)  |
+                     (BufPtr[SizeField  +2] << 16) |
+                     (BufPtr[SizeField  +3] << 24));
+  
+  // Verify that Offset+Size fits in the file.
+  if (Offset+Size > unsigned(BufEnd-BufPtr))
+    return true;
+  BufPtr += Offset;
+  BufEnd = BufPtr+Size;
+  return false;
+}
 
 bool BitcodeReader::ParseBitcode() {
   TheModule = 0;
@@ -1192,7 +1233,16 @@
     return Error("Bitcode stream should be a multiple of 4 bytes in length");
   
   unsigned char *BufPtr = (unsigned char *)Buffer->getBufferStart();
-  Stream.init(BufPtr, BufPtr+Buffer->getBufferSize());
+  unsigned char *BufEnd = BufPtr+Buffer->getBufferSize();
+  
+  // If we have a wrapper header, parse it and ignore the non-bc file contents.
+  // The magic number is 0x0B17C0DE stored in little endian.
+  if (BufPtr != BufEnd && BufPtr[0] == 0xDE && BufPtr[1] == 0xC0 && 
+      BufPtr[2] == 0x17 && BufPtr[3] == 0x0B)
+    if (SkipWrapperHeader(BufPtr, BufEnd))
+      return Error("Invalid bitcode wrapper header");
+  
+  Stream.init(BufPtr, BufEnd);
   
   // Sniff for the signature.
   if (Stream.Read(8) != 'B' ||

Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=53275&r1=53274&r2=53275&view=diff

==============================================================================
--- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original)
+++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Wed Jul  9 00:14:23 2008
@@ -1273,6 +1273,70 @@
   Stream.ExitBlock();
 }
 
+/// EmitDarwinBCHeader - If generating a bc file on darwin, we have to emit a
+/// header and trailer to make it compatible with the system archiver.  To do
+/// this we emit the following header, and then emit a trailer that pads the
+/// file out to be a multiple of 16 bytes.
+/// 
+/// struct bc_header {
+///   uint32_t Magic;         // 0x0B17C0DE
+///   uint32_t Version;       // Version, currently always 0.
+///   uint32_t BitcodeOffset; // Offset to traditional bitcode file.
+///   uint32_t BitcodeSize;   // Size of traditional bitcode file.
+///   uint32_t CPUType;       // CPU specifier.
+///   ... potentially more later ...
+/// };
+enum {
+  DarwinBCSizeFieldOffset = 3*4, // Offset to bitcode_size.
+  DarwinBCHeaderSize = 5*4
+};
+
+static void EmitDarwinBCHeader(BitstreamWriter &Stream,
+                               const std::string &TT) {
+  unsigned CPUType = ~0U;
+  
+  // Match x86_64-*, i[3-9]86-*, powerpc-*, powerpc64-*.  The CPUType is a
+  // magic number from /usr/include/mach/machine.h.  It is ok to reproduce the
+  // specific constants here because they are implicitly part of the Darwin ABI.
+  enum {
+    DARWIN_CPU_ARCH_ABI64      = 0x01000000,
+    DARWIN_CPU_TYPE_X86        = 7,
+    DARWIN_CPU_TYPE_POWERPC    = 18
+  };
+  
+  if (TT.find("x86_64-") == 0)
+    CPUType = DARWIN_CPU_TYPE_X86 | DARWIN_CPU_ARCH_ABI64;
+  else if (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' &&
+           TT[4] == '-' && TT[1] - '3' < 6)
+    CPUType = DARWIN_CPU_TYPE_X86;
+  else if (TT.find("powerpc-") == 0)
+    CPUType = DARWIN_CPU_TYPE_POWERPC;
+  else if (TT.find("powerpc64-") == 0)
+    CPUType = DARWIN_CPU_TYPE_POWERPC | DARWIN_CPU_ARCH_ABI64;
+  
+  // Traditional Bitcode starts after header.
+  unsigned BCOffset = DarwinBCHeaderSize;
+  
+  Stream.Emit(0x0B17C0DE, 32);
+  Stream.Emit(0         , 32);  // Version.
+  Stream.Emit(BCOffset  , 32);
+  Stream.Emit(0         , 32);  // Filled in later.
+  Stream.Emit(CPUType   , 32);
+}
+
+/// EmitDarwinBCTrailer - Emit the darwin epilog after the bitcode file and
+/// finalize the header.
+static void EmitDarwinBCTrailer(BitstreamWriter &Stream, unsigned BufferSize) {
+  // Update the size field in the header.
+  Stream.BackpatchWord(DarwinBCSizeFieldOffset, BufferSize-DarwinBCHeaderSize);
+  
+  // If the file is not a multiple of 16 bytes, insert dummy padding.
+  while (BufferSize & 15) {
+    Stream.Emit(0, 8);
+    ++BufferSize;
+  }
+}
+
 
 /// WriteBitcodeToFile - Write the specified module to the specified output
 /// stream.
@@ -1282,6 +1346,11 @@
   
   Buffer.reserve(256*1024);
   
+  // If this is darwin, emit a file header and trailer if needed.
+  bool isDarwin = M->getTargetTriple().find("-darwin") != std::string::npos;
+  if (isDarwin)
+    EmitDarwinBCHeader(Stream, M->getTargetTriple());
+  
   // Emit the file header.
   Stream.Emit((unsigned)'B', 8);
   Stream.Emit((unsigned)'C', 8);
@@ -1292,10 +1361,14 @@
 
   // Emit the module.
   WriteModule(M, Stream);
+
+  if (isDarwin)
+    EmitDarwinBCTrailer(Stream, Buffer.size());
+
   
   // If writing to stdout, set binary mode.
   if (llvm::cout == Out)
-      sys::Program::ChangeStdoutToBinary();
+    sys::Program::ChangeStdoutToBinary();
 
   // Write the generated bitstream to "Out".
   Out.write((char*)&Buffer.front(), Buffer.size());

Modified: llvm/trunk/lib/System/Path.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Path.cpp?rev=53275&r1=53274&r2=53275&view=diff

==============================================================================
--- llvm/trunk/lib/System/Path.cpp (original)
+++ llvm/trunk/lib/System/Path.cpp Wed Jul  9 00:14:23 2008
@@ -52,10 +52,15 @@
 }
 
 LLVMFileType
-sys::IdentifyFileType(const char*magic, unsigned length) {
+sys::IdentifyFileType(const char *magic, unsigned length) {
   assert(magic && "Invalid magic number string");
   assert(length >=4 && "Invalid magic number length");
   switch (magic[0]) {
+    case 0xDE:  // 0x0B17C0DE = BC wraper
+      if (magic[1] == (char)0xC0 && magic[2] == (char)0x17 &&
+          magic[3] == (char)0x0B)
+        return Bitcode_FileType;
+      break;
     case 'B':
       if (magic[1] == 'C' && magic[2] == (char)0xC0 && magic[3] == (char)0xDE)
         return Bitcode_FileType;




From nicholas at mxc.ca  Wed Jul  9 00:20:14 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 09 Jul 2008 05:20:14 -0000
Subject: [llvm-commits] [llvm] r53276 - in /llvm/trunk:
 lib/Transforms/Scalar/InstructionCombining.cpp
 test/Transforms/InstCombine/2008-07-08-ShiftOneAndOne.ll
Message-ID: <200807090520.m695KE42024843@zion.cs.uiuc.edu>

Author: nicholas
Date: Wed Jul  9 00:20:13 2008
New Revision: 53276

URL: http://llvm.org/viewvc/llvm-project?rev=53276&view=rev
Log:
Fold ((1 << a) & 1) to (a == 0).

Added:
    llvm/trunk/test/Transforms/InstCombine/2008-07-08-ShiftOneAndOne.ll
Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53276&r1=53275&r2=53276&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Wed Jul  9 00:20:13 2008
@@ -3473,6 +3473,18 @@
         }
 
         break;
+
+      case Instruction::Shl:
+      case Instruction::LShr:
+        // (1 << x) & 1 --> zext(x == 0)
+        // (1 >> x) & 1 --> zext(x == 0)
+        if (AndRHSMask.getLimitedValue() == 1 && Op0LHS == AndRHS) {
+          Instruction *NewICmp = new ICmpInst(ICmpInst::ICMP_EQ, Op0RHS,
+                                           Constant::getNullValue(I.getType()));
+          InsertNewInstBefore(NewICmp, I);
+          return new ZExtInst(NewICmp, I.getType());
+        }
+        break;
       }
 
       if (ConstantInt *Op0CI = dyn_cast<ConstantInt>(Op0I->getOperand(1)))

Added: llvm/trunk/test/Transforms/InstCombine/2008-07-08-ShiftOneAndOne.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-07-08-ShiftOneAndOne.ll?rev=53276&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2008-07-08-ShiftOneAndOne.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/2008-07-08-ShiftOneAndOne.ll Wed Jul  9 00:20:13 2008
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {icmp ne i32 \%a}
+; PR2330
+
+define i1 @foo(i32 %a) nounwind  {
+entry:
+	%tmp15 = shl i32 1, %a		; <i32> [#uses=1]
+	%tmp237 = and i32 %tmp15, 1		; <i32> [#uses=1]
+	%toBool = icmp eq i32 %tmp237, 0		; <i1> [#uses=1]
+	ret i1 %toBool
+}




From bruno.cardoso at gmail.com  Wed Jul  9 00:32:23 2008
From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes)
Date: Wed, 09 Jul 2008 05:32:23 -0000
Subject: [llvm-commits] [llvm] r53277 - in /llvm/trunk/lib/Target/Mips:
 Mips.td MipsISelLowering.cpp MipsInstrInfo.td MipsSubtarget.cpp
 MipsSubtarget.h
Message-ID: <200807090532.m695WN9G025215@zion.cs.uiuc.edu>

Author: bruno
Date: Wed Jul  9 00:32:22 2008
New Revision: 53277

URL: http://llvm.org/viewvc/llvm-project?rev=53277&view=rev
Log:
Fixed features usage.

Modified:
    llvm/trunk/lib/Target/Mips/Mips.td
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
    llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
    llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
    llvm/trunk/lib/Target/Mips/MipsSubtarget.h

Modified: llvm/trunk/lib/Target/Mips/Mips.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips.td?rev=53277&r1=53276&r2=53277&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips.td Wed Jul  9 00:32:22 2008
@@ -33,20 +33,22 @@
 // Mips Subtarget features                                                    //
 //===----------------------------------------------------------------------===//
 
-def FeatureGP64Bit      : SubtargetFeature<"gp64", "IsGP64bit", "true",
+def FeatureGP64Bit     : SubtargetFeature<"gp64", "IsGP64bit", "true",
                                 "General Purpose Registers are 64-bit wide.">;
-def FeatureFP64Bit      : SubtargetFeature<"fp64", "IsFP64bit", "true",
+def FeatureFP64Bit     : SubtargetFeature<"fp64", "IsFP64bit", "true",
                                 "Support 64-bit FP registers.">;
-def FeatureSingleFloat  : SubtargetFeature<"single-float", "IsSingleFloat",
+def FeatureSingleFloat : SubtargetFeature<"single-float", "IsSingleFloat",
                                 "true", "Only supports single precision float">;
-def FeatureAllegrexVFPU : SubtargetFeature<"allegrex-vfpu", "HasAllegrexVFPU", 
-                                "true", "Enable Allegrex VFPU instructions.">;
-def FeatureMips2        : SubtargetFeature<"mips2", "MipsArchVersion", "Mips2",
+def FeatureMips2       : SubtargetFeature<"mips2", "MipsArchVersion", "Mips2",
                                 "Mips2 ISA Support">;
-def FeatureO32          : SubtargetFeature<"o32", "MipsABI", "O32",
+def FeatureO32         : SubtargetFeature<"o32", "MipsABI", "O32",
                                 "Enable o32 ABI">;
-def FeatureEABI         : SubtargetFeature<"eabi", "MipsABI", "EABI",
+def FeatureEABI        : SubtargetFeature<"eabi", "MipsABI", "EABI",
                                 "Enable eabi ABI">;
+def FeatureVFPU        : SubtargetFeature<"vfpu", "HasVFPU", 
+                                "true", "Enable vector FPU instructions.">;
+def FeatureSEInReg     : SubtargetFeature<"seinreg", "HasSEInReg", "true", 
+                                "Enable 'signext in register' instructions.">;
 
 //===----------------------------------------------------------------------===//
 // Mips processors supported.
@@ -64,8 +66,8 @@
 
 // Allegrex is a 32bit subset of r4000, both for interger and fp registers, 
 // but much more similar to Mips2 than Mips3. 
-def : Proc<"allegrex", [FeatureMips2, FeatureSingleFloat, FeatureAllegrexVFPU,
-                        FeatureEABI]>;
+def : Proc<"allegrex", [FeatureMips2, FeatureSingleFloat, FeatureEABI, 
+                        FeatureSEInReg, FeatureVFPU]>;
 
 def Mips : Target {
   let InstructionSet = MipsInstrInfo;

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=53277&r1=53276&r2=53277&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Wed Jul  9 00:32:22 2008
@@ -122,7 +122,7 @@
   if (Subtarget->isSingleFloat()) 
     setOperationAction(ISD::SELECT_CC, MVT::f64, Expand);
 
-  if (!Subtarget->isAllegrex()) {
+  if (!Subtarget->hasSEInReg()) {
     setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8,  Expand);
     setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand);
   }

Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.td?rev=53277&r1=53276&r2=53277&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Wed Jul  9 00:32:22 2008
@@ -50,7 +50,7 @@
 //===----------------------------------------------------------------------===//
 // Mips Instruction Predicate Definitions.
 //===----------------------------------------------------------------------===//
-def IsAllegrex : Predicate<"Subtarget.isAllegrex()">;
+def HasSEInReg : Predicate<"Subtarget.hasSEInReg()">;
 
 //===----------------------------------------------------------------------===//
 // Mips Operand, Complex Patterns and Transformations Definitions.
@@ -510,7 +510,7 @@
 //def MSUB    : MArithR<0x04, "msub">;
 //def MSUBU   : MArithR<0x05, "msubu">;
 
-let Predicates = [IsAllegrex] in {
+let Predicates = [HasSEInReg] in {
   let shamt = 0x10, rs = 0 in 
     def SEB : SignExtInReg<0x21, "seb", i8>;
 

Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp?rev=53277&r1=53276&r2=53277&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Wed Jul  9 00:32:22 2008
@@ -20,7 +20,7 @@
 MipsSubtarget::MipsSubtarget(const TargetMachine &TM, const Module &M, 
                              const std::string &FS, bool little) : 
   MipsArchVersion(Mips1), MipsABI(O32), IsLittle(little), IsSingleFloat(false),
-  IsFP64bit(false), IsGP64bit(false), HasAllegrexVFPU(false), IsAllegrex(false)
+  IsFP64bit(false), IsGP64bit(false), HasVFPU(false), HasSEInReg(false)
 {
   std::string CPU = "mips1";
 
@@ -36,7 +36,7 @@
     MipsABI = EABI;
     IsSingleFloat = true;
     MipsArchVersion = Mips2;
-    HasAllegrexVFPU = true; // Enables Allegrex Vector FPU (not supported yet)
-    IsAllegrex = true;
+    HasVFPU = true; // Enables Allegrex Vector FPU (not supported yet)
+    HasSEInReg = true;
   }
 }

Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.h?rev=53277&r1=53276&r2=53277&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSubtarget.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsSubtarget.h Wed Jul  9 00:32:22 2008
@@ -27,7 +27,7 @@
 protected:
 
   enum MipsArchEnum {
-    Mips1, Mips2, Mips3, Mips4, Mips32, Mips32r2
+    Mips1, Mips2, Mips3, Mips4, Mips32, Mips32r2, Mips64, Mips64r2
   };
 
   enum MipsABIEnum {
@@ -54,11 +54,11 @@
   // IsFP64bit - General-purpose registers are 64 bits wide
   bool IsGP64bit;
 
-  // HasAllegrexVFPU - Allegrex processor has a vector floating point unit.
-  bool HasAllegrexVFPU;
+  // HasVFPU - Processor has a vector floating point unit.
+  bool HasVFPU;
 
-  // IsAllegrex - The target processor is a Allegrex core.
-  bool IsAllegrex;
+  // HasSEInReg - Target has SEB and SEH (signext in register) instructions.
+  bool HasSEInReg;
 
   InstrItineraryData InstrItins;
 
@@ -85,8 +85,8 @@
   bool isGP32bit() const { return !IsGP64bit; };
   bool isSingleFloat() const { return IsSingleFloat; };
   bool isNotSingleFloat() const { return !IsSingleFloat; };
-  bool hasAllegrexVFPU() const { return HasAllegrexVFPU; };
-  bool isAllegrex() const { return IsAllegrex; };
+  bool hasVFPU() const { return HasVFPU; };
+  bool hasSEInReg() const { return HasSEInReg; };
 
 };
 } // End llvm namespace




From bruno.cardoso at gmail.com  Wed Jul  9 00:34:08 2008
From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes)
Date: Wed, 9 Jul 2008 02:34:08 -0300
Subject: [llvm-commits] [llvm] r53146 - in /llvm/trunk/lib/Target/Mips:
	Mips.td MipsAsmPrinter.cpp MipsCallingConv.td
	MipsISelDAGToDAG.cpp MipsISelLowering.cpp MipsISelLowering.h
	MipsInstrFPU.td MipsInstrFormats.td MipsInstrInfo.cpp
	MipsInstrInfo.h MipsIn
Message-ID: <275e64e40807082234u72ccfdbcid3818b52079d6891@mail.gmail.com>

Thanks you both! Just commited a properly (i think) version. :)

On Tue, Jul 8, 2008 at 3:16 AM, Chris Lattner <clattner at apple.com> wrote:
>
> On Jul 7, 2008, at 8:10 PM, Eric Christopher wrote:
>
>> Couple of questions:
>>
>> +  if (!Subtarget->isAllegrex()) {
>> +    setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8, Expand);
>> +    setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand);
>> +  }
>>
>> +  bool hasAllegrexVFPU() const { return HasAllegrexVFPU; };
>> +  bool isAllegrex() const { return IsAllegrex; };
>>
>> For these it's probably best to return depending on CPU feature not
>> necessarily cpu type. There's a lot of commonality between mips chips.
>
> Great point, it would be best to define these as a subtarget feature
> and then have the cpu table indicate which ones support the feature
> directly.  For an example, please grep for 'FeatureFSqrt' in PPC.td
> for example.
>
> -Chris
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>



-- 
Bruno Cardoso Lopes
http://www.brunocardoso.cc
"When faced with untenable alternatives, you
 should consider your imperative."


From echristo at apple.com  Wed Jul  9 00:35:54 2008
From: echristo at apple.com (Eric Christopher)
Date: Tue, 8 Jul 2008 22:35:54 -0700
Subject: [llvm-commits] [llvm] r53277 - in /llvm/trunk/lib/Target/Mips:
	Mips.td MipsISelLowering.cpp MipsInstrInfo.td
	MipsSubtarget.cpp MipsSubtarget.h
In-Reply-To: <200807090532.m695WN9G025215@zion.cs.uiuc.edu>
References: <200807090532.m695WN9G025215@zion.cs.uiuc.edu>
Message-ID: <AF9C4A21-FF75-49FA-B7AE-8ECE861F4C41@apple.com>


On Jul 8, 2008, at 10:32 PM, Bruno Cardoso Lopes wrote:

> Fixed features usage.

Looks good. :)

-eric


From isanbard at gmail.com  Wed Jul  9 00:55:53 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 09 Jul 2008 05:55:53 -0000
Subject: [llvm-commits] [llvm] r53278 -
	/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
Message-ID: <200807090555.m695tr0U026067@zion.cs.uiuc.edu>

Author: void
Date: Wed Jul  9 00:55:53 2008
New Revision: 53278

URL: http://llvm.org/viewvc/llvm-project?rev=53278&view=rev
Log:
Silence warning by initializing variable.

Modified:
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=53278&r1=53277&r2=53278&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Wed Jul  9 00:55:53 2008
@@ -615,7 +615,7 @@
     // Arguments stored on registers
     if (VA.isRegLoc()) {
       MVT RegVT = VA.getLocVT();
-      TargetRegisterClass *RC;
+      TargetRegisterClass *RC = 0;
             
       if (RegVT == MVT::i32)
         RC = Mips::CPURegsRegisterClass; 




From isanbard at gmail.com  Wed Jul  9 01:02:33 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 09 Jul 2008 06:02:33 -0000
Subject: [llvm-commits] [llvm] r53279 -
	/llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
Message-ID: <200807090602.m6962Y1R026297@zion.cs.uiuc.edu>

Author: void
Date: Wed Jul  9 01:02:33 2008
New Revision: 53279

URL: http://llvm.org/viewvc/llvm-project?rev=53279&view=rev
Log:
Make the DICountVisitor not a visitor. This keeps us from calling virtual
functions and junk.

Modified:
    llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp

Modified: llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp?rev=53279&r1=53278&r2=53279&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp Wed Jul  9 01:02:33 2008
@@ -150,6 +150,157 @@
 
 //===----------------------------------------------------------------------===//
 
+static unsigned CountFields(DebugInfoDesc *DD) {
+  unsigned Count = 0;
+
+  switch (DD->getTag()) {
+  case DW_TAG_anchor:           // AnchorDesc
+    // Tag
+    // AnchorTag
+    Count = 2;
+    break;
+  case DW_TAG_compile_unit:     // CompileUnitDesc
+    // [DW_TAG_anchor]
+    // if (Version == 0) DebugVersion
+    // Language
+    // FileName
+    // Directory
+    // Producer
+    Count = 6;
+  
+    // Handle cases out of sync with compiler.
+    if (DD->getVersion() == 0)
+      ++Count;
+
+    break;
+  case DW_TAG_variable:         // GlobalVariableDesc
+    // [DW_TAG_anchor]
+    // Context
+    // Name
+    // FullName
+    // LinkageName
+    // File
+    // Line
+    // TyDesc
+    // IsStatic
+    // IsDefinition
+    // Global
+    Count = 12;
+    break;
+  case DW_TAG_subprogram:       // SubprogramDesc
+    // [DW_TAG_anchor]
+    // Context
+    // Name
+    // FullName
+    // LinkageName
+    // File
+    // Line
+    // TyDesc
+    // IsStatic
+    // IsDefinition
+    Count = 11;
+    break;
+  case DW_TAG_lexical_block:    // BlockDesc
+    // Tag
+    // Context
+    Count = 2;
+    break;
+  case DW_TAG_base_type:        // BasicTypeDesc
+    // Tag
+    // Context
+    // Name
+    // File
+    // Line
+    // Size
+    // Align
+    // Offset
+    // if (Version > LLVMDebugVersion4) Flags
+    // Encoding
+    Count = 9;
+
+    if (DD->getVersion() > LLVMDebugVersion4)
+      ++Count;
+
+    break;
+  case DW_TAG_typedef:
+  case DW_TAG_pointer_type:        
+  case DW_TAG_reference_type:
+  case DW_TAG_const_type:
+  case DW_TAG_volatile_type:        
+  case DW_TAG_restrict_type:
+  case DW_TAG_member:
+  case DW_TAG_inheritance:      // DerivedTypeDesc
+    // Tag
+    // Context
+    // Name
+    // File
+    // Line
+    // Size
+    // Align
+    // Offset
+    // if (Version > LLVMDebugVersion4) Flags
+    // FromType
+    Count = 9;
+
+    if (DD->getVersion() > LLVMDebugVersion4)
+      ++Count;
+
+    break;
+  case DW_TAG_array_type:
+  case DW_TAG_structure_type:
+  case DW_TAG_union_type:
+  case DW_TAG_enumeration_type:
+  case DW_TAG_vector_type:
+  case DW_TAG_subroutine_type:  // CompositeTypeDesc
+    // Tag
+    // Context
+    // Name
+    // File
+    // Line
+    // Size
+    // Align
+    // Offset
+    // if (Version > LLVMDebugVersion4) Flags
+    // FromType
+    // Elements
+    Count = 10;
+
+    if (DD->getVersion() > LLVMDebugVersion4)
+      ++Count;
+
+    break;
+  case DW_TAG_subrange_type:    // SubrangeDesc
+    // Tag
+    // Lo
+    // Hi
+    Count = 3;
+    break;
+  case DW_TAG_enumerator:       // EnumeratorDesc
+    // Tag
+    // Name
+    // Value
+    Count = 3;
+    break;
+  case DW_TAG_return_variable:
+  case DW_TAG_arg_variable:
+  case DW_TAG_auto_variable:    // VariableDesc
+    // Tag
+    // Context
+    // Name
+    // File
+    // Line
+    // TyDesc
+    Count = 6;
+    break;
+  default:
+    break;
+  }
+
+  return Count;
+}
+
+//===----------------------------------------------------------------------===//
+
 /// ApplyToFields - Target the visitor to each field of the debug information
 /// descriptor.
 void DIVisitor::ApplyToFields(DebugInfoDesc *DD) {
@@ -159,34 +310,6 @@
 namespace {
 
 //===----------------------------------------------------------------------===//
-/// DICountVisitor - This DIVisitor counts all the fields in the supplied debug
-/// the supplied DebugInfoDesc.
-class DICountVisitor : public DIVisitor {
-private:
-  unsigned Count;                       // Running count of fields.
-  
-public:
-  DICountVisitor() : DIVisitor(), Count(0) {}
-  
-  // Accessors.
-  unsigned getCount() const { return Count; }
-  
-  /// Apply - Count each of the fields.
-  ///
-  virtual void Apply(int &Field)             { ++Count; }
-  virtual void Apply(unsigned &Field)        { ++Count; }
-  virtual void Apply(int64_t &Field)         { ++Count; }
-  virtual void Apply(uint64_t &Field)        { ++Count; }
-  virtual void Apply(bool &Field)            { ++Count; }
-  virtual void Apply(std::string &Field)     { ++Count; }
-  virtual void Apply(DebugInfoDesc *&Field)  { ++Count; }
-  virtual void Apply(GlobalVariable *&Field) { ++Count; }
-  virtual void Apply(std::vector<DebugInfoDesc *> &Field) {
-    ++Count;
-  }
-};
-
-//===----------------------------------------------------------------------===//
 /// DIDeserializeVisitor - This DIVisitor deserializes all the fields in the
 /// supplied DebugInfoDesc.
 class DIDeserializeVisitor : public DIVisitor {
@@ -1443,12 +1566,10 @@
   
   // Get the field count.
   unsigned &CountSlot = Counts[Tag];
-  if (!CountSlot) {
+
+  if (!CountSlot)
     // Check the operand count to the field count
-    DICountVisitor CTAM;
-    CTAM.ApplyToFields(DD);
-    CountSlot = CTAM.getCount();
-  }
+    CountSlot = CountFields(DD);
   
   // Field count must be at most equal operand count.
   if (CountSlot >  N) {




From clattner at apple.com  Wed Jul  9 01:34:10 2008
From: clattner at apple.com (Chris Lattner)
Date: Tue, 8 Jul 2008 23:34:10 -0700
Subject: [llvm-commits] [llvm] r53276 - in /llvm/trunk:
	lib/Transforms/Scalar/InstructionCombining.cpp
	test/Transforms/InstCombine/2008-07-08-ShiftOneAndOne.ll
In-Reply-To: <200807090520.m695KE42024843@zion.cs.uiuc.edu>
References: <200807090520.m695KE42024843@zion.cs.uiuc.edu>
Message-ID: <6DAA8BF2-0DAF-44C6-AC62-01BAE984BD41@apple.com>

On Jul 8, 2008, at 10:20 PM, Nick Lewycky wrote:
> URL: http://llvm.org/viewvc/llvm-project?rev=53276&view=rev
> Log:
> Fold ((1 << a) & 1) to (a == 0).

Nice.

> +
> +      case Instruction::Shl:
> +      case Instruction::LShr:
> +        // (1 << x) & 1 --> zext(x == 0)
> +        // (1 >> x) & 1 --> zext(x == 0)
> +        if (AndRHSMask.getLimitedValue() == 1 &&

I'd suggest "if (AndRHSMask == 1 && ..."

which should do the right thing.

Nice catch,

-Chris


From evan.cheng at apple.com  Wed Jul  9 01:35:35 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 8 Jul 2008 23:35:35 -0700
Subject: [llvm-commits] [llvm] r53254 - in /llvm/trunk/lib/Target:
	ARM/ARMAsmPrinter.cpp PowerPC/PPCAsmPrinter.cpp
	X86/X86ATTAsmPrinter.cpp
In-Reply-To: <200807082156.m68LuNJb009391@zion.cs.uiuc.edu>
References: <200807082156.m68LuNJb009391@zion.cs.uiuc.edu>
Message-ID: <A80E41BD-DC40-4BEF-803D-7FDC27FA8058@apple.com>

Hi Dale,

This breaks ppc backend. Just try to llc anything with debug  
information. Can you take a look? I'll back it out for now.

Evan

On Jul 8, 2008, at 2:56 PM, Dale Johannesen wrote:

> Author: johannes
> Date: Tue Jul  8 16:56:22 2008
> New Revision: 53254
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53254&view=rev
> Log:
> Make debug info come out in data-only files.
>
> This is a question of the debugging setup code not
> being called at the right time, and it's called from
> target-dependent code for some reason.  I have only
> attempted to fix Darwin, but I'm pretty sure it's
> broken elsewhere; I'll leave that to people who can
> test it.
>
>
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
>    llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
>    llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
>
> Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=53254&r1=53253&r2=53254&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Tue Jul  8 16:56:22  
> 2008
> @@ -42,11 +42,13 @@
> namespace {
>   struct VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
>     ARMAsmPrinter(std::ostream &O, TargetMachine &TM, const  
> TargetAsmInfo *T)
> -      : AsmPrinter(O, TM, T), DW(O, this, T), AFI(NULL),  
> InCPMode(false) {
> +      : AsmPrinter(O, TM, T), DW(O, this, T), MMI(0), AFI(NULL),
> +        InCPMode(false) {
>       Subtarget = &TM.getSubtarget<ARMSubtarget>();
>     }
>
>     DwarfWriter DW;
> +    MachineModuleInfo *MMI;
>
>     /// Subtarget - Keep a pointer to the ARMSubtarget around so  
> that we can
>     /// make the right decision when printing asm code for different  
> targets.
> @@ -176,8 +178,6 @@
> bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
>   AFI = MF.getInfo<ARMFunctionInfo>();
>
> -  DW.SetModuleInfo(&getAnalysis<MachineModuleInfo>());
> -
>   SetupMachineFunction(MF);
>   O << "\n";
>
> @@ -800,6 +800,11 @@
>
>   bool Result = AsmPrinter::doInitialization(M);
>
> +  // AsmPrinter::doInitialization should have done this analysis.
> +  MMI = getAnalysisToUpdate<MachineModuleInfo>();
> +  assert(MMI);
> +  DW.SetModuleInfo(MMI);
> +
>   // Darwin wants symbols to be quoted if they have complex names.
>   if (Subtarget->isTargetDarwin())
>     Mang->setUseQuotes(true);
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=53254&r1=53253&r2=53254&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Tue Jul  8  
> 16:56:22 2008
> @@ -790,9 +790,6 @@
> /// method to print assembly for each instruction.
> ///
> bool DarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
> -  // We need this for Personality functions.
> -  MMI = &getAnalysis<MachineModuleInfo>();
> -  DW.SetModuleInfo(MMI);
>
>   SetupMachineFunction(MF);
>   O << "\n\n";
> @@ -887,6 +884,12 @@
>
>   bool Result = AsmPrinter::doInitialization(M);
>
> +  // We need this for Personality functions.
> +  // AsmPrinter::doInitialization should have done this analysis.
> +  MMI = getAnalysisToUpdate<MachineModuleInfo>();
> +  assert(MMI);
> +  DW.SetModuleInfo(MMI);
> +
>   // Darwin wants symbols to be quoted if they have complex names.
>   Mang->setUseQuotes(true);
>
>
> Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=53254&r1=53253&r2=53254&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Tue Jul  8  
> 16:56:22 2008
> @@ -232,13 +232,6 @@
>   const Function *F = MF.getFunction();
>   unsigned CC = F->getCallingConv();
>
> -  if (TAI->doesSupportDebugInformation()) {
> -    // Let PassManager know we need debug information and relay
> -    // the MachineModuleInfo address on to DwarfWriter.
> -    MMI = &getAnalysis<MachineModuleInfo>();
> -    DW.SetModuleInfo(MMI);
> -  }
> -
>   SetupMachineFunction(MF);
>   O << "\n\n";
>
> @@ -751,13 +744,20 @@
>
> /// doInitialization
> bool X86ATTAsmPrinter::doInitialization(Module &M) {
> +
> +  bool Result = AsmPrinter::doInitialization(M);
> +
>   if (TAI->doesSupportDebugInformation()) {
>     // Emit initial debug information.
>     DW.BeginModule(&M);
> +    // Let PassManager know we need debug information and relay
> +    // the MachineModuleInfo address on to DwarfWriter.
> +    // AsmPrinter::doInitialization should have done this analysis.
> +    MMI = getAnalysisToUpdate<MachineModuleInfo>();
> +    assert(MMI);
> +    DW.SetModuleInfo(MMI);
>   }
>
> -  bool Result = AsmPrinter::doInitialization(M);
> -
>   // Darwin wants symbols to be quoted if they have complex names.
>   if (Subtarget->isTargetDarwin())
>     Mang->setUseQuotes(true);
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From evan.cheng at apple.com  Wed Jul  9 01:36:53 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 09 Jul 2008 06:36:53 -0000
Subject: [llvm-commits] [llvm] r53280 - in /llvm/trunk/lib/Target:
 ARM/ARMAsmPrinter.cpp PowerPC/PPCAsmPrinter.cpp X86/X86ATTAsmPrinter.cpp
Message-ID: <200807090636.m696armk027396@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Jul  9 01:36:53 2008
New Revision: 53280

URL: http://llvm.org/viewvc/llvm-project?rev=53280&view=rev
Log:
Back out 53254. It broke ppc debug info codegen.

Modified:
    llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
    llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
    llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=53280&r1=53279&r2=53280&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Wed Jul  9 01:36:53 2008
@@ -42,13 +42,11 @@
 namespace {
   struct VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
     ARMAsmPrinter(std::ostream &O, TargetMachine &TM, const TargetAsmInfo *T)
-      : AsmPrinter(O, TM, T), DW(O, this, T), MMI(0), AFI(NULL), 
-        InCPMode(false) {
+      : AsmPrinter(O, TM, T), DW(O, this, T), AFI(NULL), InCPMode(false) {
       Subtarget = &TM.getSubtarget<ARMSubtarget>();
     }
 
     DwarfWriter DW;
-    MachineModuleInfo *MMI;
 
     /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
     /// make the right decision when printing asm code for different targets.
@@ -178,6 +176,8 @@
 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
   AFI = MF.getInfo<ARMFunctionInfo>();
 
+  DW.SetModuleInfo(&getAnalysis<MachineModuleInfo>());
+
   SetupMachineFunction(MF);
   O << "\n";
 
@@ -800,11 +800,6 @@
   
   bool Result = AsmPrinter::doInitialization(M);
 
-  // AsmPrinter::doInitialization should have done this analysis.
-  MMI = getAnalysisToUpdate<MachineModuleInfo>();
-  assert(MMI);
-  DW.SetModuleInfo(MMI);
-
   // Darwin wants symbols to be quoted if they have complex names.
   if (Subtarget->isTargetDarwin())
     Mang->setUseQuotes(true);

Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=53280&r1=53279&r2=53280&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed Jul  9 01:36:53 2008
@@ -790,6 +790,9 @@
 /// method to print assembly for each instruction.
 ///
 bool DarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
+  // We need this for Personality functions.
+  MMI = &getAnalysis<MachineModuleInfo>();
+  DW.SetModuleInfo(MMI);
 
   SetupMachineFunction(MF);
   O << "\n\n";
@@ -884,12 +887,6 @@
      
   bool Result = AsmPrinter::doInitialization(M);
   
-  // We need this for Personality functions.
-  // AsmPrinter::doInitialization should have done this analysis.
-  MMI = getAnalysisToUpdate<MachineModuleInfo>();
-  assert(MMI);
-  DW.SetModuleInfo(MMI);
-
   // Darwin wants symbols to be quoted if they have complex names.
   Mang->setUseQuotes(true);
   

Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=53280&r1=53279&r2=53280&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Jul  9 01:36:53 2008
@@ -232,6 +232,13 @@
   const Function *F = MF.getFunction();
   unsigned CC = F->getCallingConv();
 
+  if (TAI->doesSupportDebugInformation()) {
+    // Let PassManager know we need debug information and relay
+    // the MachineModuleInfo address on to DwarfWriter.
+    MMI = &getAnalysis<MachineModuleInfo>();
+    DW.SetModuleInfo(MMI);
+  }
+
   SetupMachineFunction(MF);
   O << "\n\n";
 
@@ -744,20 +751,13 @@
 
 /// doInitialization
 bool X86ATTAsmPrinter::doInitialization(Module &M) {
-
-  bool Result = AsmPrinter::doInitialization(M);
-
   if (TAI->doesSupportDebugInformation()) {
     // Emit initial debug information.
     DW.BeginModule(&M);
-    // Let PassManager know we need debug information and relay
-    // the MachineModuleInfo address on to DwarfWriter.
-    // AsmPrinter::doInitialization should have done this analysis.
-    MMI = getAnalysisToUpdate<MachineModuleInfo>();
-    assert(MMI);
-    DW.SetModuleInfo(MMI);
   }
 
+  bool Result = AsmPrinter::doInitialization(M);
+
   // Darwin wants symbols to be quoted if they have complex names.
   if (Subtarget->isTargetDarwin())
     Mang->setUseQuotes(true);




From evan.cheng at apple.com  Wed Jul  9 01:38:07 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 09 Jul 2008 06:38:07 -0000
Subject: [llvm-commits] [llvm] r53281 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Message-ID: <200807090638.m696c7g9027443@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Jul  9 01:38:06 2008
New Revision: 53281

URL: http://llvm.org/viewvc/llvm-project?rev=53281&view=rev
Log:
Missed alignment argument on stores lowered from memcpy.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53281&r1=53280&r2=53281&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Jul  9 01:38:06 2008
@@ -2813,7 +2813,7 @@
       Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
       Store = DAG.getStore(Chain, Value,
                            getMemBasePlusOffset(Dst, DstOff, DAG),
-                           DstSV, DstSVOff + DstOff);
+                           DstSV, DstSVOff + DstOff, false, DstAlign);
     } else {
       Value = DAG.getLoad(VT, Chain,
                           getMemBasePlusOffset(Src, SrcOff, DAG),




From nicholas at mxc.ca  Wed Jul  9 02:29:12 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 09 Jul 2008 07:29:12 -0000
Subject: [llvm-commits] [llvm] r53282 - in /llvm/trunk:
 lib/Transforms/Scalar/InstructionCombining.cpp
 test/Transforms/InstCombine/2008-07-08-AndICmp.ll
Message-ID: <200807090729.m697TCCj029248@zion.cs.uiuc.edu>

Author: nicholas
Date: Wed Jul  9 02:29:11 2008
New Revision: 53282

URL: http://llvm.org/viewvc/llvm-project?rev=53282&view=rev
Log:
Fold (a < 8) && (b < 8) into (a|b) < 8 for unsigned less or greater than.

Added:
    llvm/trunk/test/Transforms/InstCombine/2008-07-08-AndICmp.ll
Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53282&r1=53281&r2=53282&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Wed Jul  9 02:29:11 2008
@@ -3594,6 +3594,22 @@
     }
   }
   
+  
+  { // (icmp ugt/ult A, C) & (icmp B, C) --> (icmp (A|B), C)
+    // where C is a power of 2
+    Value *A, *B;
+    ConstantInt *C1, *C2;
+    ICmpInst::Predicate LHSCC, RHSCC;
+    if (match(&I, m_And(m_ICmp(LHSCC, m_Value(A), m_ConstantInt(C1)),
+                        m_ICmp(RHSCC, m_Value(B), m_ConstantInt(C2)))))
+      if (C1 == C2 && LHSCC == RHSCC && C1->getValue().isPowerOf2() &&
+          (LHSCC == ICmpInst::ICMP_ULT || LHSCC == ICmpInst::ICMP_UGT)) {
+        Instruction *NewOr = BinaryOperator::CreateOr(A, B);
+        InsertNewInstBefore(NewOr, I);
+        return new ICmpInst(LHSCC, NewOr, C1);
+      }
+  }
+
   if (ICmpInst *RHS = dyn_cast<ICmpInst>(Op1)) {
     // (icmp1 A, B) & (icmp2 A, B) --> (icmp3 A, B)
     if (Instruction *R = AssociativeOpt(I, FoldICmpLogical(*this, RHS)))

Added: llvm/trunk/test/Transforms/InstCombine/2008-07-08-AndICmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-07-08-AndICmp.ll?rev=53282&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2008-07-08-AndICmp.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/2008-07-08-AndICmp.ll Wed Jul  9 02:29:11 2008
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep icmp | count 1
+; PR2330
+
+define i1 @foo(i32 %a, i32 %b) nounwind {
+entry:
+	icmp ult i32 %a, 8		; <i1>:0 [#uses=1]
+	icmp ult i32 %b, 8		; <i1>:1 [#uses=1]
+	and i1 %1, %0		; <i1>:2 [#uses=1]
+	ret i1 %2
+}




From baldrick at free.fr  Wed Jul  9 02:31:11 2008
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 9 Jul 2008 09:31:11 +0200
Subject: [llvm-commits] [llvm] r53246 - in
	/llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp
	SelectionDAG.cpp
In-Reply-To: <200807082006.m68K6jSB006563@zion.cs.uiuc.edu>
References: <200807082006.m68K6jSB006563@zion.cs.uiuc.edu>
Message-ID: <200807090931.11730.baldrick@free.fr>

Hi Evan,

> Do not CSE DEBUG_LOC, DBG_LABEL, DBG_STOPPOINT, DECLARE, and EH_LABEL SDNode's. This improves compile time slightly at -O0 -g.

isn't this going to produce fatter debug info?

Ciao,

Duncan.


From nicholas at mxc.ca  Wed Jul  9 02:35:27 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 09 Jul 2008 07:35:27 -0000
Subject: [llvm-commits] [llvm] r53283 -
	/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200807090735.m697ZR1D030357@zion.cs.uiuc.edu>

Author: nicholas
Date: Wed Jul  9 02:35:26 2008
New Revision: 53283

URL: http://llvm.org/viewvc/llvm-project?rev=53283&view=rev
Log:
Simplify, suggested by Chris Lattner.

Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53283&r1=53282&r2=53283&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Wed Jul  9 02:35:26 2008
@@ -3478,7 +3478,7 @@
       case Instruction::LShr:
         // (1 << x) & 1 --> zext(x == 0)
         // (1 >> x) & 1 --> zext(x == 0)
-        if (AndRHSMask.getLimitedValue() == 1 && Op0LHS == AndRHS) {
+        if (AndRHSMask == 1 && Op0LHS == AndRHS) {
           Instruction *NewICmp = new ICmpInst(ICmpInst::ICMP_EQ, Op0RHS,
                                            Constant::getNullValue(I.getType()));
           InsertNewInstBefore(NewICmp, I);




From baldrick at free.fr  Wed Jul  9 02:56:31 2008
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 9 Jul 2008 09:56:31 +0200
Subject: [llvm-commits] [llvm] r53271 - in /llvm/trunk:
	lib/Transforms/Scalar/InstructionCombining.cpp
	test/Transforms/InstCombine/2008-07-08-SubAnd.ll
In-Reply-To: <200807090432.m694WclY023187@zion.cs.uiuc.edu>
References: <200807090432.m694WclY023187@zion.cs.uiuc.edu>
Message-ID: <200807090956.32312.baldrick@free.fr>

Hi Nick,

> +        // (A - N) & AndRHS -> -N & AndRHS where A & AndRHS == 0

this seems to be wrong for A = 5, N = 1, AndRHS = 2.

Ciao,

Duncan.


From baldrick at free.fr  Wed Jul  9 03:07:42 2008
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 09 Jul 2008 08:07:42 -0000
Subject: [llvm-commits] [llvm] r53284 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
Message-ID: <200807090807.m6987gqA008616@zion.cs.uiuc.edu>

Author: baldrick
Date: Wed Jul  9 03:07:41 2008
New Revision: 53284

URL: http://llvm.org/viewvc/llvm-project?rev=53284&view=rev
Log:
Make the role of MVT::i32 clearer here, and add a
note since it is not clear whether it is correct.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=53284&r1=53283&r2=53284&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Wed Jul  9 03:07:41 2008
@@ -463,14 +463,15 @@
     }
   }
 
+  MVT RetVT = MVT::i32; // FIXME: is this the correct return type?
   SDOperand Ops[2] = { LHSInt, RHSInt };
-  NewLHS = MakeLibCall(LC1, MVT::i32, Ops, 2, false/*sign irrelevant*/);
-  NewRHS = DAG.getConstant(0, MVT::i32);
+  NewLHS = MakeLibCall(LC1, RetVT, Ops, 2, false/*sign irrelevant*/);
+  NewRHS = DAG.getConstant(0, RetVT);
   CCCode = TLI.getCmpLibcallCC(LC1);
   if (LC2 != RTLIB::UNKNOWN_LIBCALL) {
     SDOperand Tmp = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS),
                                 NewLHS, NewRHS, DAG.getCondCode(CCCode));
-    NewLHS = MakeLibCall(LC2, MVT::i32, Ops, 2, false/*sign irrelevant*/);
+    NewLHS = MakeLibCall(LC2, RetVT, Ops, 2, false/*sign irrelevant*/);
     NewLHS = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS), NewLHS,
                          NewRHS, DAG.getCondCode(TLI.getCmpLibcallCC(LC2)));
     NewLHS = DAG.getNode(ISD::OR, Tmp.getValueType(), Tmp, NewLHS);




From evan.cheng at apple.com  Wed Jul  9 03:19:05 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 9 Jul 2008 01:19:05 -0700
Subject: [llvm-commits] [llvm] r53246 - in
	/llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp
	SelectionDAG.cpp
In-Reply-To: <200807090931.11730.baldrick@free.fr>
References: <200807082006.m68K6jSB006563@zion.cs.uiuc.edu>
	<200807090931.11730.baldrick@free.fr>
Message-ID: <97985940-CD95-4E73-B5AF-841BE6C76962@apple.com>


On Jul 9, 2008, at 12:31 AM, Duncan Sands wrote:

> Hi Evan,
>
>> Do not CSE DEBUG_LOC, DBG_LABEL, DBG_STOPPOINT, DECLARE, and  
>> EH_LABEL SDNode's. This improves compile time slightly at -O0 -g.
>
> isn't this going to produce fatter debug info?

Only if sdisel produce multiple nodes of same opcode and same operands  
during llvm ir to sdnodes translation phase. That would mean the  
frontend is broken.

Evan

>
>
> Ciao,
>
> Duncan.



From baldrick at free.fr  Wed Jul  9 06:11:49 2008
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 09 Jul 2008 11:11:49 -0000
Subject: [llvm-commits] [llvm] r53285 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeFloatTypes.cpp
 LegalizeTypes.h
Message-ID: <200807091111.m69BBnK9015066@zion.cs.uiuc.edu>

Author: baldrick
Date: Wed Jul  9 06:11:47 2008
New Revision: 53285

URL: http://llvm.org/viewvc/llvm-project?rev=53285&view=rev
Log:
LegalizeTypes support for powi soft float.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=53285&r1=53284&r2=53285&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Wed Jul  9 06:11:47 2008
@@ -71,9 +71,10 @@
     case ISD::SINT_TO_FP:
     case ISD::UINT_TO_FP:  R = SoftenFloatRes_XINT_TO_FP(N); break;
 
-    case ISD::FADD: R = SoftenFloatRes_FADD(N); break;
-    case ISD::FMUL: R = SoftenFloatRes_FMUL(N); break;
-    case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break;
+    case ISD::FADD:  R = SoftenFloatRes_FADD(N); break;
+    case ISD::FMUL:  R = SoftenFloatRes_FMUL(N); break;
+    case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break;
+    case ISD::FSUB:  R = SoftenFloatRes_FSUB(N); break;
   }
 
   // If R is null, the sub-method took care of registering the result.
@@ -201,6 +202,17 @@
   return MakeLibCall(LC, NVT, &Op, 1, false);
 }
 
+SDOperand DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
+  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
+  SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) };
+  return MakeLibCall(GetFPLibCall(N->getValueType(0),
+                                  RTLIB::POWI_F32,
+                                  RTLIB::POWI_F64,
+                                  RTLIB::POWI_F80,
+                                  RTLIB::POWI_PPCF128),
+                     NVT, Ops, 2, false);
+}
+
 SDOperand DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
   MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
   SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=53285&r1=53284&r2=53285&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Wed Jul  9 06:11:47 2008
@@ -336,6 +336,7 @@
   SDOperand SoftenFloatRes_FMUL(SDNode *N);
   SDOperand SoftenFloatRes_FP_EXTEND(SDNode *N);
   SDOperand SoftenFloatRes_FP_ROUND(SDNode *N);
+  SDOperand SoftenFloatRes_FPOWI(SDNode *N);
   SDOperand SoftenFloatRes_FSUB(SDNode *N);
   SDOperand SoftenFloatRes_LOAD(SDNode *N);
   SDOperand SoftenFloatRes_SELECT(SDNode *N);




From baldrick at free.fr  Wed Jul  9 06:13:46 2008
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 09 Jul 2008 11:13:46 -0000
Subject: [llvm-commits] [llvm] r53286 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeFloatTypes.cpp
 LegalizeTypes.h
Message-ID: <200807091113.m69BDk3D015139@zion.cs.uiuc.edu>

Author: baldrick
Date: Wed Jul  9 06:13:46 2008
New Revision: 53286

URL: http://llvm.org/viewvc/llvm-project?rev=53286&view=rev
Log:
LegalizeTypes soft float support for FP_TO_SINT and
FP_TO_UINT.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=53286&r1=53285&r2=53286&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Wed Jul  9 06:13:46 2008
@@ -380,10 +380,12 @@
 
   case ISD::BIT_CONVERT: Res = SoftenFloatOp_BIT_CONVERT(N); break;
 
-  case ISD::BR_CC:     Res = SoftenFloatOp_BR_CC(N); break;
-  case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
-  case ISD::SETCC:     Res = SoftenFloatOp_SETCC(N); break;
-  case ISD::STORE:     Res = SoftenFloatOp_STORE(N, OpNo); break;
+  case ISD::BR_CC:      Res = SoftenFloatOp_BR_CC(N); break;
+  case ISD::FP_TO_SINT: Res = SoftenFloatOp_FP_TO_SINT(N); break;
+  case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_UINT(N); break;
+  case ISD::SELECT_CC:  Res = SoftenFloatOp_SELECT_CC(N); break;
+  case ISD::SETCC:      Res = SoftenFloatOp_SETCC(N); break;
+  case ISD::STORE:      Res = SoftenFloatOp_STORE(N, OpNo); break;
   }
 
   // If the result is null, the sub-method took care of registering results etc.
@@ -514,6 +516,132 @@
                                 N->getOperand(4));
 }
 
+SDOperand DAGTypeLegalizer::SoftenFloatOp_FP_TO_SINT(SDNode *N) {
+  MVT SVT = N->getOperand(0).getValueType();
+  MVT RVT = N->getValueType(0);
+
+  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
+  switch (RVT.getSimpleVT()) {
+  case MVT::i32:
+    switch (SVT.getSimpleVT()) {
+    case MVT::f32:
+      LC = RTLIB::FPTOSINT_F32_I32;
+      break;
+    case MVT::f64:
+      LC = RTLIB::FPTOSINT_F64_I32;
+      break;
+    default:
+      break;
+    }
+    break;
+  case MVT::i64:
+    switch (SVT.getSimpleVT()) {
+    case MVT::f32:
+      LC = RTLIB::FPTOSINT_F32_I64;
+      break;
+    case MVT::f64:
+      LC = RTLIB::FPTOSINT_F64_I64;
+      break;
+    case MVT::f80:
+      LC = RTLIB::FPTOSINT_F80_I64;
+      break;
+    case MVT::ppcf128:
+      LC = RTLIB::FPTOSINT_PPCF128_I64;
+      break;
+    default:
+      break;
+    }
+    break;
+  case MVT::i128:
+    switch (SVT.getSimpleVT()) {
+    case MVT::f32:
+      LC = RTLIB::FPTOSINT_F32_I128;
+      break;
+    case MVT::f64:
+      LC = RTLIB::FPTOSINT_F64_I128;
+      break;
+    case MVT::f80:
+      LC = RTLIB::FPTOSINT_F80_I128;
+      break;
+    case MVT::ppcf128:
+      LC = RTLIB::FPTOSINT_PPCF128_I128;
+      break;
+    default:
+      break;
+    }
+    break;
+  default:
+    break;
+  }
+  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_SINT!");
+
+  SDOperand Op = GetSoftenedFloat(N->getOperand(0));
+  return MakeLibCall(LC, RVT, &Op, 1, false);
+}
+
+SDOperand DAGTypeLegalizer::SoftenFloatOp_FP_TO_UINT(SDNode *N) {
+  MVT SVT = N->getOperand(0).getValueType();
+  MVT RVT = N->getValueType(0);
+
+  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
+  switch (RVT.getSimpleVT()) {
+  case MVT::i32:
+    switch (SVT.getSimpleVT()) {
+    case MVT::f32:
+      LC = RTLIB::FPTOUINT_F32_I32;
+      break;
+    case MVT::f64:
+      LC = RTLIB::FPTOUINT_F64_I32;
+      break;
+    default:
+      break;
+    }
+    break;
+  case MVT::i64:
+    switch (SVT.getSimpleVT()) {
+    case MVT::f32:
+      LC = RTLIB::FPTOUINT_F32_I64;
+      break;
+    case MVT::f64:
+      LC = RTLIB::FPTOUINT_F64_I64;
+      break;
+    case MVT::f80:
+      LC = RTLIB::FPTOUINT_F80_I64;
+      break;
+    case MVT::ppcf128:
+      LC = RTLIB::FPTOUINT_PPCF128_I64;
+      break;
+    default:
+      break;
+    }
+    break;
+  case MVT::i128:
+    switch (SVT.getSimpleVT()) {
+    case MVT::f32:
+      LC = RTLIB::FPTOUINT_F32_I128;
+      break;
+    case MVT::f64:
+      LC = RTLIB::FPTOUINT_F64_I128;
+      break;
+    case MVT::f80:
+      LC = RTLIB::FPTOUINT_F80_I128;
+      break;
+    case MVT::ppcf128:
+      LC = RTLIB::FPTOUINT_PPCF128_I128;
+      break;
+    default:
+      break;
+    }
+    break;
+  default:
+    break;
+  }
+  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_UINT!");
+
+  SDOperand Op = GetSoftenedFloat(N->getOperand(0));
+  return MakeLibCall(LC, RVT, &Op, 1, false);
+}
+
 SDOperand DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) {
   SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
   ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=53286&r1=53285&r2=53286&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Wed Jul  9 06:13:46 2008
@@ -347,6 +347,8 @@
   bool SoftenFloatOperand(SDNode *N, unsigned OpNo);
   SDOperand SoftenFloatOp_BIT_CONVERT(SDNode *N);
   SDOperand SoftenFloatOp_BR_CC(SDNode *N);
+  SDOperand SoftenFloatOp_FP_TO_SINT(SDNode *N);
+  SDOperand SoftenFloatOp_FP_TO_UINT(SDNode *N);
   SDOperand SoftenFloatOp_SELECT_CC(SDNode *N);
   SDOperand SoftenFloatOp_SETCC(SDNode *N);
   SDOperand SoftenFloatOp_STORE(SDNode *N, unsigned OpNo);




From baldrick at free.fr  Wed Jul  9 06:15:31 2008
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 09 Jul 2008 11:15:31 -0000
Subject: [llvm-commits] [llvm] r53287 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
Message-ID: <200807091115.m69BFV27015202@zion.cs.uiuc.edu>

Author: baldrick
Date: Wed Jul  9 06:15:31 2008
New Revision: 53287

URL: http://llvm.org/viewvc/llvm-project?rev=53287&view=rev
Log:
Forgot to update the chain result when softening
loads.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=53287&r1=53286&r2=53287&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Wed Jul  9 06:15:31 2008
@@ -230,20 +230,29 @@
   MVT VT = N->getValueType(0);
   MVT NVT = TLI.getTypeToTransformTo(VT);
 
-  if (L->getExtensionType() == ISD::NON_EXTLOAD)
-     return DAG.getLoad(L->getAddressingMode(), L->getExtensionType(),
-                        NVT, L->getChain(), L->getBasePtr(), L->getOffset(),
-                        L->getSrcValue(), L->getSrcValueOffset(), NVT,
-                        L->isVolatile(), L->getAlignment());
+  SDOperand NewL;
+  if (L->getExtensionType() == ISD::NON_EXTLOAD) {
+    NewL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(),
+                       NVT, L->getChain(), L->getBasePtr(), L->getOffset(),
+                       L->getSrcValue(), L->getSrcValueOffset(), NVT,
+                       L->isVolatile(), L->getAlignment());
+    // Legalized the chain result - switch anything that used the old chain to
+    // use the new one.
+    ReplaceValueWith(SDOperand(N, 1), NewL.getValue(1));
+    return NewL;
+  }
 
   // Do a non-extending load followed by FP_EXTEND.
-  SDOperand NL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD,
-                             L->getMemoryVT(), L->getChain(),
-                             L->getBasePtr(), L->getOffset(),
-                             L->getSrcValue(), L->getSrcValueOffset(),
-                             L->getMemoryVT(),
-                             L->isVolatile(), L->getAlignment());
-  return BitConvertToInteger(DAG.getNode(ISD::FP_EXTEND, VT, NL));
+  NewL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD,
+                     L->getMemoryVT(), L->getChain(),
+                     L->getBasePtr(), L->getOffset(),
+                     L->getSrcValue(), L->getSrcValueOffset(),
+                     L->getMemoryVT(),
+                     L->isVolatile(), L->getAlignment());
+  // Legalized the chain result - switch anything that used the old chain to
+  // use the new one.
+  ReplaceValueWith(SDOperand(N, 1), NewL.getValue(1));
+  return BitConvertToInteger(DAG.getNode(ISD::FP_EXTEND, VT, NewL));
 }
 
 SDOperand DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N) {




From baldrick at free.fr  Wed Jul  9 07:07:25 2008
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 09 Jul 2008 12:07:25 -0000
Subject: [llvm-commits] [llvm] r53288 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeFloatTypes.cpp
 LegalizeTypes.h
Message-ID: <200807091207.m69C7QaF016828@zion.cs.uiuc.edu>

Author: baldrick
Date: Wed Jul  9 07:07:22 2008
New Revision: 53288

URL: http://llvm.org/viewvc/llvm-project?rev=53288&view=rev
Log:
Redo LegalizeTypes soft float support for
SINT_TO_FP and UINT_TO_FP.  This now produces
the same code as LegalizeDAG (the previous
code was based on a mistaken idea of what
LegalizeDAG did in this case).

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=53288&r1=53287&r2=53288&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Wed Jul  9 07:07:22 2008
@@ -20,9 +20,6 @@
 //===----------------------------------------------------------------------===//
 
 #include "LegalizeTypes.h"
-#include "llvm/CodeGen/PseudoSourceValue.h"
-#include "llvm/Constants.h"
-#include "llvm/DerivedTypes.h"
 using namespace llvm;
 
 /// GetFPLibCall - Return the right libcall for the given floating point type.
@@ -68,8 +65,8 @@
     case ISD::LOAD:        R = SoftenFloatRes_LOAD(N); break;
     case ISD::SELECT:      R = SoftenFloatRes_SELECT(N); break;
     case ISD::SELECT_CC:   R = SoftenFloatRes_SELECT_CC(N); break;
-    case ISD::SINT_TO_FP:
-    case ISD::UINT_TO_FP:  R = SoftenFloatRes_XINT_TO_FP(N); break;
+    case ISD::SINT_TO_FP:  R = SoftenFloatRes_SINT_TO_FP(N); break;
+    case ISD::UINT_TO_FP:  R = SoftenFloatRes_UINT_TO_FP(N); break;
 
     case ISD::FADD:  R = SoftenFloatRes_FADD(N); break;
     case ISD::FMUL:  R = SoftenFloatRes_FMUL(N); break;
@@ -268,104 +265,104 @@
                      N->getOperand(1), LHS, RHS, N->getOperand(4));
 }
 
-SDOperand DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) {
-  bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
-  MVT DestVT = N->getValueType(0);
+SDOperand DAGTypeLegalizer::SoftenFloatRes_SINT_TO_FP(SDNode *N) {
   SDOperand Op = N->getOperand(0);
+  MVT RVT = N->getValueType(0);
 
-  if (Op.getValueType() == MVT::i32) {
-    // simple 32-bit [signed|unsigned] integer to float/double expansion
-
-    // Get the stack frame index of a 8 byte buffer.
-    SDOperand StackSlot = DAG.CreateStackTemporary(MVT::f64);
-
-    // word offset constant for Hi/Lo address computation
-    SDOperand Offset =
-      DAG.getConstant(MVT(MVT::i32).getSizeInBits() / 8,
-                      TLI.getPointerTy());
-    // set up Hi and Lo (into buffer) address based on endian
-    SDOperand Hi = StackSlot;
-    SDOperand Lo = DAG.getNode(ISD::ADD, TLI.getPointerTy(), StackSlot, Offset);
-    if (TLI.isLittleEndian())
-      std::swap(Hi, Lo);
-
-    // if signed map to unsigned space
-    SDOperand OpMapped;
-    if (isSigned) {
-      // constant used to invert sign bit (signed to unsigned mapping)
-      SDOperand SignBit = DAG.getConstant(0x80000000u, MVT::i32);
-      OpMapped = DAG.getNode(ISD::XOR, MVT::i32, Op, SignBit);
-    } else {
-      OpMapped = Op;
+  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
+  switch (Op.getValueType().getSimpleVT()) {
+  case MVT::i32:
+    switch (RVT.getSimpleVT()) {
+    case MVT::f32:
+      LC = RTLIB::SINTTOFP_I32_F32;
+      break;
+    case MVT::f64:
+      LC = RTLIB::SINTTOFP_I32_F64;
+      break;
+    default:
+      break;
     }
-    // store the lo of the constructed double - based on integer input
-    SDOperand Store1 = DAG.getStore(DAG.getEntryNode(),
-                                    OpMapped, Lo, NULL, 0);
-    // initial hi portion of constructed double
-    SDOperand InitialHi = DAG.getConstant(0x43300000u, MVT::i32);
-    // store the hi of the constructed double - biased exponent
-    SDOperand Store2=DAG.getStore(Store1, InitialHi, Hi, NULL, 0);
-    // load the constructed double
-    SDOperand Load = DAG.getLoad(MVT::f64, Store2, StackSlot, NULL, 0);
-    // FP constant to bias correct the final result
-    SDOperand Bias = DAG.getConstantFP(isSigned ?
-                                            BitsToDouble(0x4330000080000000ULL)
-                                          : BitsToDouble(0x4330000000000000ULL),
-                                     MVT::f64);
-    // subtract the bias
-    SDOperand Sub = DAG.getNode(ISD::FSUB, MVT::f64, Load, Bias);
-    // final result
-    SDOperand Result;
-    // handle final rounding
-    if (DestVT == MVT::f64) {
-      // do nothing
-      Result = Sub;
-    } else if (DestVT.bitsLT(MVT::f64)) {
-      Result = DAG.getNode(ISD::FP_ROUND, DestVT, Sub,
-                           DAG.getIntPtrConstant(0));
-    } else if (DestVT.bitsGT(MVT::f64)) {
-      Result = DAG.getNode(ISD::FP_EXTEND, DestVT, Sub);
+    break;
+  case MVT::i64:
+    switch (RVT.getSimpleVT()) {
+    case MVT::f32:
+      LC = RTLIB::SINTTOFP_I64_F32;
+      break;
+    case MVT::f64:
+      LC = RTLIB::SINTTOFP_I64_F64;
+      break;
+    case MVT::f80:
+      LC = RTLIB::SINTTOFP_I64_F80;
+      break;
+    case MVT::ppcf128:
+      LC = RTLIB::SINTTOFP_I64_PPCF128;
+      break;
+    default:
+      break;
+    }
+    break;
+  case MVT::i128:
+    switch (RVT.getSimpleVT()) {
+    case MVT::f32:
+      LC = RTLIB::SINTTOFP_I128_F32;
+      break;
+    case MVT::f64:
+      LC = RTLIB::SINTTOFP_I128_F64;
+      break;
+    case MVT::f80:
+      LC = RTLIB::SINTTOFP_I128_F80;
+      break;
+    case MVT::ppcf128:
+      LC = RTLIB::SINTTOFP_I128_PPCF128;
+      break;
+    default:
+      break;
     }
-    return BitConvertToInteger(Result);
+    break;
+  default:
+    break;
   }
-  assert(!isSigned && "Legalize cannot Expand SINT_TO_FP for i64 yet");
-  SDOperand Tmp1 = DAG.getNode(ISD::SINT_TO_FP, DestVT, Op);
+  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported SINT_TO_FP!");
+
+  return MakeLibCall(LC, TLI.getTypeToTransformTo(RVT), &Op, 1, false);
+}
+
+SDOperand DAGTypeLegalizer::SoftenFloatRes_UINT_TO_FP(SDNode *N) {
+  SDOperand Op = N->getOperand(0);
+  MVT RVT = N->getValueType(0);
 
-  SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultType(Op), Op,
-                                   DAG.getConstant(0, Op.getValueType()),
-                                   ISD::SETLT);
-  SDOperand Zero = DAG.getIntPtrConstant(0), Four = DAG.getIntPtrConstant(4);
-  SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(),
-                                    SignSet, Four, Zero);
-
-  // If the sign bit of the integer is set, the large number will be treated
-  // as a negative number.  To counteract this, the dynamic code adds an
-  // offset depending on the data type.
-  uint64_t FF;
+  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
   switch (Op.getValueType().getSimpleVT()) {
-  default: assert(0 && "Unsupported integer type!");
-  case MVT::i8 : FF = 0x43800000ULL; break;  // 2^8  (as a float)
-  case MVT::i16: FF = 0x47800000ULL; break;  // 2^16 (as a float)
-  case MVT::i32: FF = 0x4F800000ULL; break;  // 2^32 (as a float)
-  case MVT::i64: FF = 0x5F800000ULL; break;  // 2^64 (as a float)
-  }
-  if (TLI.isLittleEndian()) FF <<= 32;
-  static Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF);
-
-  SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy());
-  CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
-  SDOperand FudgeInReg;
-  if (DestVT == MVT::f32)
-    FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx,
-                             PseudoSourceValue::getConstantPool(), 0);
-  else {
-    FudgeInReg = DAG.getExtLoad(ISD::EXTLOAD, DestVT,
-                                DAG.getEntryNode(), CPIdx,
-                                PseudoSourceValue::getConstantPool(), 0,
-                                MVT::f32);
+  case MVT::i32:
+    switch (RVT.getSimpleVT()) {
+    case MVT::f32:
+      LC = RTLIB::UINTTOFP_I32_F32;
+      break;
+    case MVT::f64:
+      LC = RTLIB::UINTTOFP_I32_F64;
+      break;
+    default:
+      break;
+    }
+    break;
+  case MVT::i64:
+    switch (RVT.getSimpleVT()) {
+    case MVT::f32:
+      LC = RTLIB::UINTTOFP_I64_F32;
+      break;
+    case MVT::f64:
+      LC = RTLIB::UINTTOFP_I64_F64;
+      break;
+    default:
+      break;
+    }
+    break;
+  default:
+    break;
   }
+  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported UINT_TO_FP!");
 
-  return BitConvertToInteger(DAG.getNode(ISD::FADD, DestVT, Tmp1, FudgeInReg));
+  return MakeLibCall(LC, TLI.getTypeToTransformTo(RVT), &Op, 1, false);
 }
 
 
@@ -539,6 +536,9 @@
     case MVT::f64:
       LC = RTLIB::FPTOSINT_F64_I32;
       break;
+    case MVT::ppcf128:
+      LC = RTLIB::FPTOSINT_PPCF128_I32;
+      break;
     default:
       break;
     }
@@ -602,6 +602,12 @@
     case MVT::f64:
       LC = RTLIB::FPTOUINT_F64_I32;
       break;
+    case MVT::f80:
+      LC = RTLIB::FPTOUINT_F80_I32;
+      break;
+    case MVT::ppcf128:
+      LC = RTLIB::FPTOUINT_PPCF128_I32;
+      break;
     default:
       break;
     }

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=53288&r1=53287&r2=53288&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Wed Jul  9 07:07:22 2008
@@ -341,7 +341,8 @@
   SDOperand SoftenFloatRes_LOAD(SDNode *N);
   SDOperand SoftenFloatRes_SELECT(SDNode *N);
   SDOperand SoftenFloatRes_SELECT_CC(SDNode *N);
-  SDOperand SoftenFloatRes_XINT_TO_FP(SDNode *N);
+  SDOperand SoftenFloatRes_SINT_TO_FP(SDNode *N);
+  SDOperand SoftenFloatRes_UINT_TO_FP(SDNode *N);
 
   // Operand Float to Integer Conversion.
   bool SoftenFloatOperand(SDNode *N, unsigned OpNo);




From baldrick at free.fr  Wed Jul  9 07:08:25 2008
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 09 Jul 2008 12:08:25 -0000
Subject: [llvm-commits] [llvm] r53289 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeIntegerTypes.cpp
 LegalizeTypes.cpp
Message-ID: <200807091208.m69C8PQS016880@zion.cs.uiuc.edu>

Author: baldrick
Date: Wed Jul  9 07:08:25 2008
New Revision: 53289

URL: http://llvm.org/viewvc/llvm-project?rev=53289&view=rev
Log:
Remove some unneeded includes.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=53289&r1=53288&r2=53289&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Wed Jul  9 07:08:25 2008
@@ -19,7 +19,6 @@
 //===----------------------------------------------------------------------===//
 
 #include "LegalizeTypes.h"
-#include "llvm/Constants.h"
 using namespace llvm;
 
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=53289&r1=53288&r2=53289&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Wed Jul  9 07:08:25 2008
@@ -15,10 +15,7 @@
 
 #include "LegalizeTypes.h"
 #include "llvm/CallingConv.h"
-#include "llvm/Constants.h"
-#include "llvm/DerivedTypes.h"
 #include "llvm/Support/CommandLine.h"
-#include "llvm/Support/MathExtras.h"
 using namespace llvm;
 
 #ifndef NDEBUG




From asl at math.spbu.ru  Wed Jul  9 08:17:06 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:17:06 -0000
Subject: [llvm-commits] [llvm] r53290 - in /llvm/trunk:
 include/llvm/Target/TargetAsmInfo.h lib/Target/TargetAsmInfo.cpp
Message-ID: <200807091317.m69DH8A9019044@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:16:59 2008
New Revision: 53290

URL: http://llvm.org/viewvc/llvm-project?rev=53290&view=rev
Log:
Add code for default section falgs computation

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h
    llvm/trunk/lib/Target/TargetAsmInfo.cpp

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53290&r1=53289&r2=53290&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:16:59 2008
@@ -30,6 +30,7 @@
 
   namespace SectionKind {
     enum Kind {
+      Unknown = 0,      ///< Custom section
       Text,             ///< Text section
       Data,             ///< Data section
       BSS,              ///< BSS section
@@ -41,6 +42,25 @@
     };
   }
 
+  namespace SectionFlags {
+    enum Flags {
+      None       = 0,
+      Code       = 1 << 0, ///< Section contains code
+      Writeable  = 1 << 1, ///< Section is writeable
+      BSS        = 1 << 2, ///< Section contains only zeroes
+      Mergeable  = 1 << 3, ///< Section contains mergeable data
+      Strings    = 1 << 4, ///< Section contains null-terminated strings
+      TLS        = 1 << 5, ///< Section contains thread-local data
+      Debug      = 1 << 6, ///< Section contains debug data
+      Linkonce   = 1 << 7  ///< Section is linkonce
+    };
+  }
+
+  struct SectionInfo {
+    SectionKind::Kind   kind;
+    SectionFlags::Flags flags;
+  };
+
   class TargetMachine;
   class CallInst;
   class GlobalValue;
@@ -444,6 +464,13 @@
     /// section kind used for global emission.
     SectionKind::Kind SectionKindForGlobal(const GlobalValue *GV) const;
 
+
+    /// SectionFlagsForGlobal - This hook allows the target to select proper
+    /// section flags either for given global or for section.
+    unsigned
+    SectionFlagsForGlobal(const GlobalValue *GV = NULL,
+                          const char* name = NULL);
+
     // Accessors.
     //
     const char *getTextSection() const {

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=53290&r1=53289&r2=53290&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Jul  9 08:16:59 2008
@@ -191,3 +191,66 @@
   // Variable is not constant or thread-local - emit to generic data section.
   return (isThreadLocal ? SectionKind::ThreadData : SectionKind::Data);
 }
+
+unsigned
+TargetAsmInfo::SectionFlagsForGlobal(const GlobalValue *GV,
+                                     const char* name) {
+  unsigned flags = SectionFlags::None;
+
+  // Decode flags from global itself.
+  if (GV) {
+    SectionKind::Kind kind = SectionKindForGlobal(GV);
+    switch (kind) {
+     case SectionKind::Text:
+      flags |= SectionFlags::Code;
+      break;
+     case SectionKind::ThreadData:
+      flags |= SectionFlags::TLS;
+      // FALLS THROUGH
+     case SectionKind::Data:
+      flags |= SectionFlags::Writeable;
+      break;
+     case SectionKind::ThreadBSS:
+      flags |= SectionFlags::TLS;
+      // FALLS THROUGH
+     case SectionKind::BSS:
+      flags |= SectionFlags::BSS;
+      break;
+     case SectionKind::ROData:
+      // No additional flags here
+      break;
+     case SectionKind::RODataMergeStr:
+      flags |= SectionFlags::Strings;
+      // FALLS THROUGH
+     case SectionKind::RODataMergeConst:
+      flags |= SectionFlags::Mergeable;
+      break;
+     default:
+      assert(0 && "Unexpected section kind!");
+    }
+
+    if (GV->hasLinkOnceLinkage() ||
+        GV->hasWeakLinkage() ||
+        GV->hasCommonLinkage())
+      flags |= SectionFlags::Linkonce;
+  }
+
+  // Add flags from sections, if any.
+  if (name) {
+    // Some lame default implementation
+    if (strcmp(name, ".bss") == 0 ||
+        strncmp(name, ".bss.", 5) == 0 ||
+        strncmp(name, ".gnu.linkonce.b.", 16) == 0)
+      flags |= SectionFlags::BSS;
+    else if (strcmp(name, ".tdata") == 0 ||
+             strncmp(name, ".tdata.", 7) == 0 ||
+             strncmp(name, ".gnu.linkonce.td.", 17) == 0)
+      flags |= SectionFlags::TLS;
+    else if (strcmp(name, ".tbss") == 0 ||
+             strncmp(name, ".tbss.", 6) == 0 ||
+             strncmp(name, ".gnu.linkonce.tb.", 17) == 0)
+      flags |= SectionFlags::BSS | SectionFlags::TLS;
+  }
+
+  return flags;
+}




From asl at math.spbu.ru  Wed Jul  9 08:17:36 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:17:36 -0000
Subject: [llvm-commits] [llvm] r53291 - in /llvm/trunk:
 include/llvm/Target/TargetAsmInfo.h lib/Target/TargetAsmInfo.cpp
Message-ID: <200807091317.m69DHavf019073@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:17:36 2008
New Revision: 53291

URL: http://llvm.org/viewvc/llvm-project?rev=53291&view=rev
Log:
Constify

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h
    llvm/trunk/lib/Target/TargetAsmInfo.cpp

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53291&r1=53290&r2=53291&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:17:36 2008
@@ -469,7 +469,7 @@
     /// section flags either for given global or for section.
     unsigned
     SectionFlagsForGlobal(const GlobalValue *GV = NULL,
-                          const char* name = NULL);
+                          const char* name = NULL) const;
 
     // Accessors.
     //

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=53291&r1=53290&r2=53291&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Jul  9 08:17:36 2008
@@ -194,7 +194,7 @@
 
 unsigned
 TargetAsmInfo::SectionFlagsForGlobal(const GlobalValue *GV,
-                                     const char* name) {
+                                     const char* name) const {
   unsigned flags = SectionFlags::None;
 
   // Decode flags from global itself.




From asl at math.spbu.ru  Wed Jul  9 08:18:02 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:18:02 -0000
Subject: [llvm-commits] [llvm] r53292 - in /llvm/trunk:
 include/llvm/Target/TargetAsmInfo.h lib/Target/TargetAsmInfo.cpp
Message-ID: <200807091318.m69DI2EI019101@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:18:02 2008
New Revision: 53292

URL: http://llvm.org/viewvc/llvm-project?rev=53292&view=rev
Log:
Add default section name resolution routine

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h
    llvm/trunk/lib/Target/TargetAsmInfo.cpp

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53292&r1=53291&r2=53292&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:18:02 2008
@@ -471,6 +471,10 @@
     SectionFlagsForGlobal(const GlobalValue *GV = NULL,
                           const char* name = NULL) const;
 
+    /// SectionForGlobal - This hooks returns proper section name for given
+    /// global with all necessary flags and marks.
+    const char* SectionForGlobal(const GlobalValue *GV) const;
+
     // Accessors.
     //
     const char *getTextSection() const {

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=53292&r1=53291&r2=53292&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Jul  9 08:18:02 2008
@@ -254,3 +254,15 @@
 
   return flags;
 }
+
+const char*
+TargetAsmInfo::SectionForGlobal(const GlobalValue *GV) const {
+  SectionKind::Kind kind = SectionKindForGlobal(GV);
+
+  if (kind == SectionKind::Text)
+    return getTextSection();
+  else if (kind == SectionKind::BSS && getBSSSection())
+    return getBSSSection();
+
+  return getDataSection();
+}




From asl at math.spbu.ru  Wed Jul  9 08:18:21 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:18:21 -0000
Subject: [llvm-commits] [llvm] r53293 -
	/llvm/trunk/include/llvm/Target/TargetAsmInfo.h
Message-ID: <200807091318.m69DILmq019123@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:18:21 2008
New Revision: 53293

URL: http://llvm.org/viewvc/llvm-project?rev=53293&view=rev
Log:
Make hooks virtual

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53293&r1=53292&r2=53293&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:18:21 2008
@@ -462,18 +462,19 @@
 
     /// SectionKindForGlobal - This hook allows the target to select proper
     /// section kind used for global emission.
-    SectionKind::Kind SectionKindForGlobal(const GlobalValue *GV) const;
+    virtual SectionKind::Kind
+    SectionKindForGlobal(const GlobalValue *GV) const;
 
 
     /// SectionFlagsForGlobal - This hook allows the target to select proper
     /// section flags either for given global or for section.
-    unsigned
+    virtual unsigned
     SectionFlagsForGlobal(const GlobalValue *GV = NULL,
                           const char* name = NULL) const;
 
     /// SectionForGlobal - This hooks returns proper section name for given
     /// global with all necessary flags and marks.
-    const char* SectionForGlobal(const GlobalValue *GV) const;
+    virtual const char* SectionForGlobal(const GlobalValue *GV) const;
 
     // Accessors.
     //




From asl at math.spbu.ru  Wed Jul  9 08:18:38 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:18:38 -0000
Subject: [llvm-commits] [llvm] r53294 -
	/llvm/trunk/lib/Target/TargetAsmInfo.cpp
Message-ID: <200807091318.m69DIcjv019141@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:18:38 2008
New Revision: 53294

URL: http://llvm.org/viewvc/llvm-project?rev=53294&view=rev
Log:
Use 'llvm-linkonce' consistently

Modified:
    llvm/trunk/lib/Target/TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=53294&r1=53293&r2=53294&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Jul  9 08:18:38 2008
@@ -240,15 +240,15 @@
     // Some lame default implementation
     if (strcmp(name, ".bss") == 0 ||
         strncmp(name, ".bss.", 5) == 0 ||
-        strncmp(name, ".gnu.linkonce.b.", 16) == 0)
+        strncmp(name, ".llvm.linkonce.b.", 17) == 0)
       flags |= SectionFlags::BSS;
     else if (strcmp(name, ".tdata") == 0 ||
              strncmp(name, ".tdata.", 7) == 0 ||
-             strncmp(name, ".gnu.linkonce.td.", 17) == 0)
+             strncmp(name, ".llvm.linkonce.td.", 18) == 0)
       flags |= SectionFlags::TLS;
     else if (strcmp(name, ".tbss") == 0 ||
              strncmp(name, ".tbss.", 6) == 0 ||
-             strncmp(name, ".gnu.linkonce.tb.", 17) == 0)
+             strncmp(name, ".llvm.linkonce.tb.", 18) == 0)
       flags |= SectionFlags::BSS | SectionFlags::TLS;
   }
 




From asl at math.spbu.ru  Wed Jul  9 08:19:08 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:19:08 -0000
Subject: [llvm-commits] [llvm] r53295 - in /llvm/trunk:
 include/llvm/Target/TargetAsmInfo.h lib/Target/TargetAsmInfo.cpp
 lib/Target/X86/X86TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.h
Message-ID: <200807091319.m69DJ8ND019180@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:19:08 2008
New Revision: 53295

URL: http://llvm.org/viewvc/llvm-project?rev=53295&view=rev
Log:
Provide skeletone code for calculation of section, where global should be emitted into

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h
    llvm/trunk/lib/Target/TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53295&r1=53294&r2=53295&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:19:08 2008
@@ -474,7 +474,7 @@
 
     /// SectionForGlobal - This hooks returns proper section name for given
     /// global with all necessary flags and marks.
-    virtual const char* SectionForGlobal(const GlobalValue *GV) const;
+    virtual std::string SectionForGlobal(const GlobalValue *GV) const;
 
     // Accessors.
     //

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=53295&r1=53294&r2=53295&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Jul  9 08:19:08 2008
@@ -255,7 +255,7 @@
   return flags;
 }
 
-const char*
+std::string
 TargetAsmInfo::SectionForGlobal(const GlobalValue *GV) const {
   SectionKind::Kind kind = SectionKindForGlobal(GV);
 

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53295&r1=53294&r2=53295&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:19:08 2008
@@ -346,8 +346,8 @@
       else {
         // 64 bit targets encode pointers in 4 bytes iff:
         // - code model is small OR
-        // - code model is medium and we're emitting externally visible symbols or
-        //   any code symbols
+        // - code model is medium and we're emitting externally visible symbols
+        //   or any code symbols
         if (CM == CodeModel::Small ||
             (CM == CodeModel::Medium && (Global ||
                                          Reason != DwarfEncoding::Data)))
@@ -375,3 +375,96 @@
   }
 }
 
+std::string X86TargetAsmInfo::SectionForGlobal(const GlobalValue *GV) const {
+  const X86Subtarget *Subtarget = &X86TM->getSubtarget<X86Subtarget>();
+  SectionKind::Kind kind = SectionKindForGlobal(GV);
+  unsigned flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
+  std::string Name;
+
+  // FIXME: Should we use some hashing based on section name and just check
+  // flags?
+
+  // Select section name
+  if (const Function *F = dyn_cast<Function>(GV)) {
+    // Implement here
+  } else if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
+    if (GVar->hasSection()) {
+      // Honour section already set, if any
+      Name = GVar->getSection();
+    } else {
+      // Use default section depending on the 'type' of global
+      // FIXME: Handle linkonce stuff
+      switch (kind) {
+       case SectionKind::Data:
+        Name = DataSection;
+        break;
+       case SectionKind::BSS:
+        Name = (BSSSection ? BSSSection : DataSection);
+        break;
+       case SectionKind::ROData:
+       case SectionKind::RODataMergeStr:
+       case SectionKind::RODataMergeConst:
+        // FIXME: Temporary
+        Name = DataSection;
+        break;
+       case SectionKind::ThreadData:
+        Name = (TLSDataSection ? TLSDataSection : DataSection);
+        break;
+       case SectionKind::ThreadBSS:
+        Name = (TLSBSSSection ? TLSBSSSection : DataSection);
+       default:
+        assert(0 && "Unsuported section kind for global");
+      }
+    }
+  } else
+    assert(0 && "Unsupported global");
+
+  // Add all special flags, etc
+  switch (Subtarget->TargetType) {
+   case X86Subtarget::isELF:
+    Name += ",\"";
+
+    if (!(flags & SectionFlags::Debug))
+      Name += 'a';
+    if (flags & SectionFlags::Code)
+      Name += 'x';
+    if (flags & SectionFlags::Writeable)
+      Name += 'w';
+    if (flags & SectionFlags::Mergeable)
+      Name += 'M';
+    if (flags & SectionFlags::Strings)
+      Name += 'S';
+    if (flags & SectionFlags::TLS)
+      Name += 'T';
+
+    Name += "\"";
+
+    // FIXME: There can be exceptions here
+    if (flags & SectionFlags::BSS)
+      Name += ", at nobits";
+    else
+      Name += ", at progbits";
+
+    // FIXME: entity size for mergeable sections
+    break;
+   case X86Subtarget::isCygwin:
+   case X86Subtarget::isMingw:
+    Name += ",\"";
+
+    if (flags & SectionFlags::Code)
+      Name += 'x';
+    if (flags & SectionFlags::Writeable)
+      Name += 'w';
+
+    Name += "\"";
+
+    break;
+   case X86Subtarget::isDarwin:
+    // Darwin does not use any special flags
+   default:
+    break;
+  }
+
+  return Name;
+}
+

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=53295&r1=53294&r2=53295&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Wed Jul  9 08:19:08 2008
@@ -23,10 +23,11 @@
 
   struct X86TargetAsmInfo : public TargetAsmInfo {
     explicit X86TargetAsmInfo(const X86TargetMachine &TM);
-    
+
     virtual bool ExpandInlineAsm(CallInst *CI) const;
     virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
                                            bool Global) const;
+    virtual std::string SectionForGlobal(const GlobalValue *GV) const;
 
   private:
     const X86TargetMachine* X86TM;




From asl at math.spbu.ru  Wed Jul  9 08:19:38 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:19:38 -0000
Subject: [llvm-commits] [llvm] r53296 - in /llvm/trunk:
 include/llvm/Target/TargetAsmInfo.h lib/Target/TargetAsmInfo.cpp
 lib/Target/X86/X86TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.h
Message-ID: <200807091319.m69DJdlk019207@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:19:38 2008
New Revision: 53296

URL: http://llvm.org/viewvc/llvm-project?rev=53296&view=rev
Log:
Properly handle linkonce stuff

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h
    llvm/trunk/lib/Target/TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53296&r1=53295&r2=53296&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:19:38 2008
@@ -56,11 +56,6 @@
     };
   }
 
-  struct SectionInfo {
-    SectionKind::Kind   kind;
-    SectionFlags::Flags flags;
-  };
-
   class TargetMachine;
   class CallInst;
   class GlobalValue;
@@ -476,6 +471,9 @@
     /// global with all necessary flags and marks.
     virtual std::string SectionForGlobal(const GlobalValue *GV) const;
 
+    virtual std::string UniqueSectionForGlobal(const GlobalValue* GV,
+                                               SectionKind::Kind kind) const;
+
     // Accessors.
     //
     const char *getTextSection() const {

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=53296&r1=53295&r2=53296&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Jul  9 08:19:38 2008
@@ -266,3 +266,26 @@
 
   return getDataSection();
 }
+
+std::string
+TargetAsmInfo::UniqueSectionForGlobal(const GlobalValue* GV,
+                                      SectionKind::Kind kind) const {
+  switch (kind) {
+   case SectionKind::Text:
+    return ".llvm.linkonce.t." + GV->getName();
+   case SectionKind::Data:
+    return ".llvm.linkonce.d." + GV->getName();
+   case SectionKind::BSS:
+    return ".llvm.linkonce.b." + GV->getName();
+   case SectionKind::ROData:
+   case SectionKind::RODataMergeConst:
+   case SectionKind::RODataMergeStr:
+    return ".llvm.linkonce.r." + GV->getName();
+   case SectionKind::ThreadData:
+    return ".llvm.linkonce.td." + GV->getName();
+   case SectionKind::ThreadBSS:
+    return ".llvm.linkonce.tb." + GV->getName();
+   default:
+    assert(0 && "Unknown section kind");
+  }
+}

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53296&r1=53295&r2=53296&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:19:38 2008
@@ -375,6 +375,41 @@
   }
 }
 
+std::string X86TargetAsmInfo::UniqueSectionForGlobal(const GlobalValue* GV,
+                                                SectionKind::Kind kind) const {
+  const X86Subtarget *Subtarget = &X86TM->getSubtarget<X86Subtarget>();
+
+  switch (Subtarget->TargetType) {
+   case X86Subtarget::isDarwin:
+    if (kind == SectionKind::Text)
+      return "__TEXT,__textcoal_nt,coalesced,pure_instructions";
+    else
+      return "__DATA,__datacoal_nt,coalesced";
+   case X86Subtarget::isCygwin:
+   case X86Subtarget::isMingw:
+    switch (kind) {
+     case SectionKind::Text:
+      return ".text$linkonce" + GV->getName();
+     case SectionKind::Data:
+     case SectionKind::BSS:
+     case SectionKind::ThreadData:
+     case SectionKind::ThreadBSS:
+      return ".data$linkonce" + GV->getName();
+     case SectionKind::ROData:
+     case SectionKind::RODataMergeConst:
+     case SectionKind::RODataMergeStr:
+      return ".rdata$linkonce" + GV->getName();
+     default:
+      assert(0 && "Unknown section kind");
+    }
+   case X86Subtarget::isELF:
+    return TargetAsmInfo::UniqueSectionForGlobal(GV, kind);
+   default:
+    return "";
+  }
+}
+
+
 std::string X86TargetAsmInfo::SectionForGlobal(const GlobalValue *GV) const {
   const X86Subtarget *Subtarget = &X86TM->getSubtarget<X86Subtarget>();
   SectionKind::Kind kind = SectionKindForGlobal(GV);
@@ -383,41 +418,58 @@
 
   // FIXME: Should we use some hashing based on section name and just check
   // flags?
+  // FIXME: It seems, that Darwin uses much more sections.
 
   // Select section name
-  if (const Function *F = dyn_cast<Function>(GV)) {
-    // Implement here
-  } else if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
-    if (GVar->hasSection()) {
-      // Honour section already set, if any
-      Name = GVar->getSection();
-    } else {
-      // Use default section depending on the 'type' of global
-      // FIXME: Handle linkonce stuff
-      switch (kind) {
-       case SectionKind::Data:
-        Name = DataSection;
-        break;
-       case SectionKind::BSS:
-        Name = (BSSSection ? BSSSection : DataSection);
+  if (GV->hasSection()) {
+    // Honour section already set, if any
+    Name = GV->getSection();
+  } else {
+    // Use default section depending on the 'type' of global
+    if (const Function *F = dyn_cast<Function>(GV)) {
+      switch (F->getLinkage()) {
+       default: assert(0 && "Unknown linkage type!");
+       case Function::InternalLinkage:
+       case Function::DLLExportLinkage:
+       case Function::ExternalLinkage:
+        Name = TextSection;
         break;
-       case SectionKind::ROData:
-       case SectionKind::RODataMergeStr:
-       case SectionKind::RODataMergeConst:
-        // FIXME: Temporary
-        Name = DataSection;
+       case Function::WeakLinkage:
+       case Function::LinkOnceLinkage:
+        Name = UniqueSectionForGlobal(F, kind);
         break;
-       case SectionKind::ThreadData:
-        Name = (TLSDataSection ? TLSDataSection : DataSection);
-        break;
-       case SectionKind::ThreadBSS:
-        Name = (TLSBSSSection ? TLSBSSSection : DataSection);
-       default:
-        assert(0 && "Unsuported section kind for global");
       }
-    }
-  } else
-    assert(0 && "Unsupported global");
+    } else if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
+      if (GVar->hasCommonLinkage() ||
+          GVar->hasLinkOnceLinkage() ||
+          GVar->hasWeakLinkage())
+        Name = UniqueSectionForGlobal(GVar, kind);
+      else {
+        switch (kind) {
+         case SectionKind::Data:
+          Name = DataSection;
+          break;
+         case SectionKind::BSS:
+          Name = (BSSSection ? BSSSection : DataSection);
+          break;
+         case SectionKind::ROData:
+         case SectionKind::RODataMergeStr:
+         case SectionKind::RODataMergeConst:
+          // FIXME: Temporary
+          Name = DataSection;
+          break;
+         case SectionKind::ThreadData:
+          Name = (TLSDataSection ? TLSDataSection : DataSection);
+          break;
+         case SectionKind::ThreadBSS:
+          Name = (TLSBSSSection ? TLSBSSSection : DataSection);
+         default:
+          assert(0 && "Unsuported section kind for global");
+        }
+      }
+    } else
+      assert(0 && "Unsupported global");
+  }
 
   // Add all special flags, etc
   switch (Subtarget->TargetType) {

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=53296&r1=53295&r2=53296&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Wed Jul  9 08:19:38 2008
@@ -28,6 +28,8 @@
     virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
                                            bool Global) const;
     virtual std::string SectionForGlobal(const GlobalValue *GV) const;
+    virtual std::string UniqueSectionForGlobal(const GlobalValue* GV,
+                                               SectionKind::Kind kind) const;
 
   private:
     const X86TargetMachine* X86TM;




From asl at math.spbu.ru  Wed Jul  9 08:20:08 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:20:08 -0000
Subject: [llvm-commits] [llvm] r53297 - in /llvm/trunk:
 include/llvm/Target/TargetAsmInfo.h lib/Target/X86/X86TargetAsmInfo.cpp
 lib/Target/X86/X86TargetAsmInfo.h
Message-ID: <200807091320.m69DK8QQ019244@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:20:07 2008
New Revision: 53297

URL: http://llvm.org/viewvc/llvm-project?rev=53297&view=rev
Log:
Move flag decoding stuff into special hook

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53297&r1=53296&r2=53297&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:20:07 2008
@@ -474,6 +474,8 @@
     virtual std::string UniqueSectionForGlobal(const GlobalValue* GV,
                                                SectionKind::Kind kind) const;
 
+    virtual std::string PrintSectionFlags(unsigned flags) const { return ""; }
+
     // Accessors.
     //
     const char *getTextSection() const {

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53297&r1=53296&r2=53297&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:20:07 2008
@@ -411,7 +411,6 @@
 
 
 std::string X86TargetAsmInfo::SectionForGlobal(const GlobalValue *GV) const {
-  const X86Subtarget *Subtarget = &X86TM->getSubtarget<X86Subtarget>();
   SectionKind::Kind kind = SectionKindForGlobal(GV);
   unsigned flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
   std::string Name;
@@ -471,44 +470,53 @@
       assert(0 && "Unsupported global");
   }
 
+  Name += PrintSectionFlags(flags);
+  return Name;
+}
+
+std::string X86TargetAsmInfo::PrintSectionFlags(unsigned flags) const {
+  const X86Subtarget *Subtarget = &X86TM->getSubtarget<X86Subtarget>();
+
+  std::string Flags = "";
+
   // Add all special flags, etc
   switch (Subtarget->TargetType) {
    case X86Subtarget::isELF:
-    Name += ",\"";
+    Flags += ",\"";
 
     if (!(flags & SectionFlags::Debug))
-      Name += 'a';
+      Flags += 'a';
     if (flags & SectionFlags::Code)
-      Name += 'x';
+      Flags += 'x';
     if (flags & SectionFlags::Writeable)
-      Name += 'w';
+      Flags += 'w';
     if (flags & SectionFlags::Mergeable)
-      Name += 'M';
+      Flags += 'M';
     if (flags & SectionFlags::Strings)
-      Name += 'S';
+      Flags += 'S';
     if (flags & SectionFlags::TLS)
-      Name += 'T';
+      Flags += 'T';
 
-    Name += "\"";
+    Flags += "\"";
 
     // FIXME: There can be exceptions here
     if (flags & SectionFlags::BSS)
-      Name += ", at nobits";
+      Flags += ", at nobits";
     else
-      Name += ", at progbits";
+      Flags += ", at progbits";
 
     // FIXME: entity size for mergeable sections
     break;
    case X86Subtarget::isCygwin:
    case X86Subtarget::isMingw:
-    Name += ",\"";
+    Flags += ",\"";
 
     if (flags & SectionFlags::Code)
-      Name += 'x';
+      Flags += 'x';
     if (flags & SectionFlags::Writeable)
-      Name += 'w';
+      Flags += 'w';
 
-    Name += "\"";
+    Flags += "\"";
 
     break;
    case X86Subtarget::isDarwin:
@@ -517,6 +525,5 @@
     break;
   }
 
-  return Name;
+  return Flags;
 }
-

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=53297&r1=53296&r2=53297&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Wed Jul  9 08:20:07 2008
@@ -30,6 +30,7 @@
     virtual std::string SectionForGlobal(const GlobalValue *GV) const;
     virtual std::string UniqueSectionForGlobal(const GlobalValue* GV,
                                                SectionKind::Kind kind) const;
+    virtual std::string PrintSectionFlags(unsigned flags) const;
 
   private:
     const X86TargetMachine* X86TM;




From asl at math.spbu.ru  Wed Jul  9 08:20:27 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:20:27 -0000
Subject: [llvm-commits] [llvm] r53298 -
	/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
Message-ID: <200807091320.m69DKShY019269@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:20:27 2008
New Revision: 53298

URL: http://llvm.org/viewvc/llvm-project?rev=53298&view=rev
Log:
Whitespace cleanup

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53298&r1=53297&r2=53298&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:20:27 2008
@@ -44,7 +44,7 @@
   // FIXME - Should be simplified.
 
   AsmTransCBE = x86_asm_table;
-  
+
   switch (Subtarget->TargetType) {
   case X86Subtarget::isDarwin:
     AlignmentIsInBytes = false;
@@ -94,7 +94,7 @@
     WeakRefDirective = "\t.weak_reference ";
     HiddenDirective = "\t.private_extern ";
     ProtectedDirective = "\t.globl\t";
-    
+
     // In non-PIC modes, emit a special label before jump tables so that the
     // linker can perform more accurate dead code stripping.
     if (TM.getRelocationModel() != Reloc::PIC_) {
@@ -202,11 +202,11 @@
 
   default: break;
   }
-  
+
   if (Subtarget->isFlavorIntel()) {
     GlobalPrefix = "_";
     CommentString = ";";
-  
+
     PrivateGlobalPrefix = "$";
     AlignDirective = "\talign\t";
     ZeroDirective = "\tdb\t";
@@ -218,7 +218,7 @@
     Data32bitsDirective = "\tdd\t";
     Data64bitsDirective = "\tdq\t";
     HasDotTypeDotSizeDirective = false;
-    
+
     TextSection = "_text";
     DataSection = "_data";
     JumpTableDataSection = NULL;
@@ -240,25 +240,25 @@
   // we will turn this bswap into something that will be lowered to logical ops
   // instead of emitting the bswap asm.  For now, we don't support 486 or lower
   // so don't worry about this.
-  
+
   // Verify this is a simple bswap.
   if (CI->getNumOperands() != 2 ||
       CI->getType() != CI->getOperand(1)->getType() ||
       !CI->getType()->isInteger())
     return false;
-  
+
   const IntegerType *Ty = dyn_cast<IntegerType>(CI->getType());
   if (!Ty || Ty->getBitWidth() % 16 != 0)
     return false;
-  
+
   // Okay, we can do this xform, do so now.
   const Type *Tys[] = { Ty };
   Module *M = CI->getParent()->getParent()->getParent();
   Constant *Int = Intrinsic::getDeclaration(M, Intrinsic::bswap, Tys, 1);
-  
+
   Value *Op = CI->getOperand(1);
   Op = CallInst::Create(Int, Op, CI->getName(), CI);
-  
+
   CI->replaceAllUsesWith(Op);
   CI->eraseFromParent();
   return true;
@@ -268,22 +268,22 @@
 bool X86TargetAsmInfo::ExpandInlineAsm(CallInst *CI) const {
   InlineAsm *IA = cast<InlineAsm>(CI->getCalledValue());
   std::vector<InlineAsm::ConstraintInfo> Constraints = IA->ParseConstraints();
-  
+
   std::string AsmStr = IA->getAsmString();
-  
+
   // TODO: should remove alternatives from the asmstring: "foo {a|b}" -> "foo a"
   std::vector<std::string> AsmPieces;
   SplitString(AsmStr, AsmPieces, "\n");  // ; as separator?
-  
+
   switch (AsmPieces.size()) {
-  default: return false;    
+  default: return false;
   case 1:
     AsmStr = AsmPieces[0];
     AsmPieces.clear();
     SplitString(AsmStr, AsmPieces, " \t");  // Split with whitespace.
-    
+
     // bswap $0
-    if (AsmPieces.size() == 2 && 
+    if (AsmPieces.size() == 2 &&
         AsmPieces[0] == "bswap" && AsmPieces[1] == "$0") {
       // No need to check constraints, nothing other than the equivalent of
       // "=r,0" would be valid here.




From asl at math.spbu.ru  Wed Jul  9 08:20:49 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:20:49 -0000
Subject: [llvm-commits] [llvm] r53299 - in /llvm/trunk/lib/Target/X86:
 X86TargetAsmInfo.cpp X86TargetAsmInfo.h X86TargetMachine.cpp
Message-ID: <200807091320.m69DKnue019290@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:20:48 2008
New Revision: 53299

URL: http://llvm.org/viewvc/llvm-project?rev=53299&view=rev
Log:
Split X86TargetAsmInfo into 4 subtarget-specific classes

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h
    llvm/trunk/lib/Target/X86/X86TargetMachine.cpp

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53299&r1=53298&r2=53299&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:20:48 2008
@@ -41,197 +41,8 @@
   const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>();
   X86TM = &TM;
 
-  // FIXME - Should be simplified.
-
   AsmTransCBE = x86_asm_table;
 
-  switch (Subtarget->TargetType) {
-  case X86Subtarget::isDarwin:
-    AlignmentIsInBytes = false;
-    TextAlignFillValue = 0x90;
-    GlobalPrefix = "_";
-    if (!Subtarget->is64Bit())
-      Data64bitsDirective = 0;       // we can't emit a 64-bit unit
-    ZeroDirective = "\t.space\t";  // ".space N" emits N zeros.
-    PrivateGlobalPrefix = "L";     // Marker for constant pool idxs
-    BSSSection = 0;                       // no BSS section.
-    ZeroFillDirective = "\t.zerofill\t";  // Uses .zerofill
-    ConstantPoolSection = "\t.const\n";
-    JumpTableDataSection = "\t.const\n";
-    CStringSection = "\t.cstring";
-    FourByteConstantSection = "\t.literal4\n";
-    EightByteConstantSection = "\t.literal8\n";
-    if (Subtarget->is64Bit())
-      SixteenByteConstantSection = "\t.literal16\n";
-    ReadOnlySection = "\t.const\n";
-    LCOMMDirective = "\t.lcomm\t";
-    SwitchToSectionDirective = "\t.section ";
-    StringConstantPrefix = "\1LC";
-    COMMDirectiveTakesAlignment = false;
-    HasDotTypeDotSizeDirective = false;
-    if (TM.getRelocationModel() == Reloc::Static) {
-      StaticCtorsSection = ".constructor";
-      StaticDtorsSection = ".destructor";
-    } else {
-      StaticCtorsSection = ".mod_init_func";
-      StaticDtorsSection = ".mod_term_func";
-    }
-    if (Subtarget->is64Bit()) {
-      PersonalityPrefix = "";
-      PersonalitySuffix = "+4 at GOTPCREL";
-    } else {
-      PersonalityPrefix = "L";
-      PersonalitySuffix = "$non_lazy_ptr";
-    }
-    NeedsIndirectEncoding = true;
-    InlineAsmStart = "## InlineAsm Start";
-    InlineAsmEnd = "## InlineAsm End";
-    CommentString = "##";
-    SetDirective = "\t.set";
-    PCSymbol = ".";
-    UsedDirective = "\t.no_dead_strip\t";
-    WeakDefDirective = "\t.weak_definition ";
-    WeakRefDirective = "\t.weak_reference ";
-    HiddenDirective = "\t.private_extern ";
-    ProtectedDirective = "\t.globl\t";
-
-    // In non-PIC modes, emit a special label before jump tables so that the
-    // linker can perform more accurate dead code stripping.
-    if (TM.getRelocationModel() != Reloc::PIC_) {
-      // Emit a local label that is preserved until the linker runs.
-      JumpTableSpecialLabelPrefix = "l";
-    }
-
-    SupportsDebugInformation = true;
-    NeedsSet = true;
-    DwarfAbbrevSection = ".section __DWARF,__debug_abbrev,regular,debug";
-    DwarfInfoSection = ".section __DWARF,__debug_info,regular,debug";
-    DwarfLineSection = ".section __DWARF,__debug_line,regular,debug";
-    DwarfFrameSection = ".section __DWARF,__debug_frame,regular,debug";
-    DwarfPubNamesSection = ".section __DWARF,__debug_pubnames,regular,debug";
-    DwarfPubTypesSection = ".section __DWARF,__debug_pubtypes,regular,debug";
-    DwarfStrSection = ".section __DWARF,__debug_str,regular,debug";
-    DwarfLocSection = ".section __DWARF,__debug_loc,regular,debug";
-    DwarfARangesSection = ".section __DWARF,__debug_aranges,regular,debug";
-    DwarfRangesSection = ".section __DWARF,__debug_ranges,regular,debug";
-    DwarfMacInfoSection = ".section __DWARF,__debug_macinfo,regular,debug";
-
-    // Exceptions handling
-    SupportsExceptionHandling = true;
-    GlobalEHDirective = "\t.globl\t";
-    SupportsWeakOmittedEHFrame = false;
-    AbsoluteEHSectionOffsets = false;
-    DwarfEHFrameSection =
-    ".section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support";
-    DwarfExceptionSection = ".section __DATA,__gcc_except_tab";
-    break;
-
-  case X86Subtarget::isELF:
-    ReadOnlySection = "\t.section\t.rodata";
-    FourByteConstantSection = "\t.section\t.rodata.cst4,\"aM\", at progbits,4";
-    EightByteConstantSection = "\t.section\t.rodata.cst8,\"aM\", at progbits,8";
-    SixteenByteConstantSection = "\t.section\t.rodata.cst16,\"aM\", at progbits,16";
-    CStringSection = "\t.section\t.rodata.str1.1,\"aMS\", at progbits,1";
-    PrivateGlobalPrefix = ".L";
-    WeakRefDirective = "\t.weak\t";
-    SetDirective = "\t.set\t";
-    PCSymbol = ".";
-
-    // Set up DWARF directives
-    HasLEB128 = true;  // Target asm supports leb128 directives (little-endian)
-
-    // Debug Information
-    AbsoluteDebugSectionOffsets = true;
-    SupportsDebugInformation = true;
-    DwarfAbbrevSection =  "\t.section\t.debug_abbrev,\"\", at progbits";
-    DwarfInfoSection =    "\t.section\t.debug_info,\"\", at progbits";
-    DwarfLineSection =    "\t.section\t.debug_line,\"\", at progbits";
-    DwarfFrameSection =   "\t.section\t.debug_frame,\"\", at progbits";
-    DwarfPubNamesSection ="\t.section\t.debug_pubnames,\"\", at progbits";
-    DwarfPubTypesSection ="\t.section\t.debug_pubtypes,\"\", at progbits";
-    DwarfStrSection =     "\t.section\t.debug_str,\"\", at progbits";
-    DwarfLocSection =     "\t.section\t.debug_loc,\"\", at progbits";
-    DwarfARangesSection = "\t.section\t.debug_aranges,\"\", at progbits";
-    DwarfRangesSection =  "\t.section\t.debug_ranges,\"\", at progbits";
-    DwarfMacInfoSection = "\t.section\t.debug_macinfo,\"\", at progbits";
-
-    // Exceptions handling
-    if (!Subtarget->is64Bit())
-      SupportsExceptionHandling = true;
-    AbsoluteEHSectionOffsets = false;
-    DwarfEHFrameSection = "\t.section\t.eh_frame,\"aw\", at progbits";
-    DwarfExceptionSection = "\t.section\t.gcc_except_table,\"a\", at progbits";
-    break;
-
-  case X86Subtarget::isCygwin:
-  case X86Subtarget::isMingw:
-    GlobalPrefix = "_";
-    LCOMMDirective = "\t.lcomm\t";
-    COMMDirectiveTakesAlignment = false;
-    HasDotTypeDotSizeDirective = false;
-    StaticCtorsSection = "\t.section .ctors,\"aw\"";
-    StaticDtorsSection = "\t.section .dtors,\"aw\"";
-    HiddenDirective = NULL;
-    PrivateGlobalPrefix = "L";  // Prefix for private global symbols
-    WeakRefDirective = "\t.weak\t";
-    SetDirective = "\t.set\t";
-
-    // Set up DWARF directives
-    HasLEB128 = true;  // Target asm supports leb128 directives (little-endian)
-    AbsoluteDebugSectionOffsets = true;
-    AbsoluteEHSectionOffsets = false;
-    SupportsDebugInformation = true;
-    DwarfSectionOffsetDirective = "\t.secrel32\t";
-    DwarfAbbrevSection =  "\t.section\t.debug_abbrev,\"dr\"";
-    DwarfInfoSection =    "\t.section\t.debug_info,\"dr\"";
-    DwarfLineSection =    "\t.section\t.debug_line,\"dr\"";
-    DwarfFrameSection =   "\t.section\t.debug_frame,\"dr\"";
-    DwarfPubNamesSection ="\t.section\t.debug_pubnames,\"dr\"";
-    DwarfPubTypesSection ="\t.section\t.debug_pubtypes,\"dr\"";
-    DwarfStrSection =     "\t.section\t.debug_str,\"dr\"";
-    DwarfLocSection =     "\t.section\t.debug_loc,\"dr\"";
-    DwarfARangesSection = "\t.section\t.debug_aranges,\"dr\"";
-    DwarfRangesSection =  "\t.section\t.debug_ranges,\"dr\"";
-    DwarfMacInfoSection = "\t.section\t.debug_macinfo,\"dr\"";
-    break;
-
-  case X86Subtarget::isWindows:
-    GlobalPrefix = "_";
-    HasDotTypeDotSizeDirective = false;
-    break;
-
-  default: break;
-  }
-
-  if (Subtarget->isFlavorIntel()) {
-    GlobalPrefix = "_";
-    CommentString = ";";
-
-    PrivateGlobalPrefix = "$";
-    AlignDirective = "\talign\t";
-    ZeroDirective = "\tdb\t";
-    ZeroDirectiveSuffix = " dup(0)";
-    AsciiDirective = "\tdb\t";
-    AscizDirective = 0;
-    Data8bitsDirective = "\tdb\t";
-    Data16bitsDirective = "\tdw\t";
-    Data32bitsDirective = "\tdd\t";
-    Data64bitsDirective = "\tdq\t";
-    HasDotTypeDotSizeDirective = false;
-
-    TextSection = "_text";
-    DataSection = "_data";
-    JumpTableDataSection = NULL;
-    SwitchToSectionDirective = "";
-    TextSectionStartSuffix = "\tsegment 'CODE'";
-    DataSectionStartSuffix = "\tsegment 'DATA'";
-    SectionEndDirectiveSuffix = "\tends\n";
-  }
-
-  // On Linux we must declare when we can use a non-executable stack.
-  if (Subtarget->isLinux())
-    NonexecutableStackDirective = "\t.section\t.note.GNU-stack,\"\", at progbits";
-
   AssemblerDialect = Subtarget->getAsmFlavor();
 }
 
@@ -315,6 +126,192 @@
   return false;
 }
 
+X86DarwinTargetAsmInfo::X86DarwinTargetAsmInfo(const X86TargetMachine &TM):
+  X86TargetAsmInfo(TM) {
+  bool is64Bit = X86TM->getSubtarget<X86Subtarget>().is64Bit();
+
+  AlignmentIsInBytes = false;
+  TextAlignFillValue = 0x90;
+  GlobalPrefix = "_";
+  if (!is64Bit)
+    Data64bitsDirective = 0;       // we can't emit a 64-bit unit
+  ZeroDirective = "\t.space\t";  // ".space N" emits N zeros.
+  PrivateGlobalPrefix = "L";     // Marker for constant pool idxs
+  BSSSection = 0;                       // no BSS section.
+  ZeroFillDirective = "\t.zerofill\t";  // Uses .zerofill
+  ConstantPoolSection = "\t.const\n";
+  JumpTableDataSection = "\t.const\n";
+  CStringSection = "\t.cstring";
+  FourByteConstantSection = "\t.literal4\n";
+  EightByteConstantSection = "\t.literal8\n";
+  // FIXME: Why don't always use this section?
+  if (is64Bit)
+    SixteenByteConstantSection = "\t.literal16\n";
+  ReadOnlySection = "\t.const\n";
+  LCOMMDirective = "\t.lcomm\t";
+  SwitchToSectionDirective = "\t.section ";
+  StringConstantPrefix = "\1LC";
+  COMMDirectiveTakesAlignment = false;
+  HasDotTypeDotSizeDirective = false;
+  if (TM.getRelocationModel() == Reloc::Static) {
+    StaticCtorsSection = ".constructor";
+    StaticDtorsSection = ".destructor";
+  } else {
+    StaticCtorsSection = ".mod_init_func";
+    StaticDtorsSection = ".mod_term_func";
+  }
+  if (is64Bit) {
+    PersonalityPrefix = "";
+    PersonalitySuffix = "+4 at GOTPCREL";
+  } else {
+    PersonalityPrefix = "L";
+    PersonalitySuffix = "$non_lazy_ptr";
+  }
+  NeedsIndirectEncoding = true;
+  InlineAsmStart = "## InlineAsm Start";
+  InlineAsmEnd = "## InlineAsm End";
+  CommentString = "##";
+  SetDirective = "\t.set";
+  PCSymbol = ".";
+  UsedDirective = "\t.no_dead_strip\t";
+  WeakDefDirective = "\t.weak_definition ";
+  WeakRefDirective = "\t.weak_reference ";
+  HiddenDirective = "\t.private_extern ";
+  ProtectedDirective = "\t.globl\t";
+
+  // In non-PIC modes, emit a special label before jump tables so that the
+  // linker can perform more accurate dead code stripping.
+  if (TM.getRelocationModel() != Reloc::PIC_) {
+    // Emit a local label that is preserved until the linker runs.
+    JumpTableSpecialLabelPrefix = "l";
+  }
+
+  SupportsDebugInformation = true;
+  NeedsSet = true;
+  DwarfAbbrevSection = ".section __DWARF,__debug_abbrev,regular,debug";
+  DwarfInfoSection = ".section __DWARF,__debug_info,regular,debug";
+  DwarfLineSection = ".section __DWARF,__debug_line,regular,debug";
+  DwarfFrameSection = ".section __DWARF,__debug_frame,regular,debug";
+  DwarfPubNamesSection = ".section __DWARF,__debug_pubnames,regular,debug";
+  DwarfPubTypesSection = ".section __DWARF,__debug_pubtypes,regular,debug";
+  DwarfStrSection = ".section __DWARF,__debug_str,regular,debug";
+  DwarfLocSection = ".section __DWARF,__debug_loc,regular,debug";
+  DwarfARangesSection = ".section __DWARF,__debug_aranges,regular,debug";
+  DwarfRangesSection = ".section __DWARF,__debug_ranges,regular,debug";
+  DwarfMacInfoSection = ".section __DWARF,__debug_macinfo,regular,debug";
+
+  // Exceptions handling
+  SupportsExceptionHandling = true;
+  GlobalEHDirective = "\t.globl\t";
+  SupportsWeakOmittedEHFrame = false;
+  AbsoluteEHSectionOffsets = false;
+  DwarfEHFrameSection =
+  ".section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support";
+  DwarfExceptionSection = ".section __DATA,__gcc_except_tab";
+}
+
+X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const X86TargetMachine &TM):
+  X86TargetAsmInfo(TM) {
+  bool is64Bit = X86TM->getSubtarget<X86Subtarget>().is64Bit();
+
+  ReadOnlySection = "\t.section\t.rodata";
+  FourByteConstantSection = "\t.section\t.rodata.cst4,\"aM\", at progbits,4";
+  EightByteConstantSection = "\t.section\t.rodata.cst8,\"aM\", at progbits,8";
+  SixteenByteConstantSection = "\t.section\t.rodata.cst16,\"aM\", at progbits,16";
+  CStringSection = "\t.section\t.rodata.str1.1,\"aMS\", at progbits,1";
+  PrivateGlobalPrefix = ".L";
+  WeakRefDirective = "\t.weak\t";
+  SetDirective = "\t.set\t";
+  PCSymbol = ".";
+
+  // Set up DWARF directives
+  HasLEB128 = true;  // Target asm supports leb128 directives (little-endian)
+
+  // Debug Information
+  AbsoluteDebugSectionOffsets = true;
+  SupportsDebugInformation = true;
+  DwarfAbbrevSection =  "\t.section\t.debug_abbrev,\"\", at progbits";
+  DwarfInfoSection =    "\t.section\t.debug_info,\"\", at progbits";
+  DwarfLineSection =    "\t.section\t.debug_line,\"\", at progbits";
+  DwarfFrameSection =   "\t.section\t.debug_frame,\"\", at progbits";
+  DwarfPubNamesSection ="\t.section\t.debug_pubnames,\"\", at progbits";
+  DwarfPubTypesSection ="\t.section\t.debug_pubtypes,\"\", at progbits";
+  DwarfStrSection =     "\t.section\t.debug_str,\"\", at progbits";
+  DwarfLocSection =     "\t.section\t.debug_loc,\"\", at progbits";
+  DwarfARangesSection = "\t.section\t.debug_aranges,\"\", at progbits";
+  DwarfRangesSection =  "\t.section\t.debug_ranges,\"\", at progbits";
+  DwarfMacInfoSection = "\t.section\t.debug_macinfo,\"\", at progbits";
+
+  // Exceptions handling
+  if (!is64Bit)
+    SupportsExceptionHandling = true;
+  AbsoluteEHSectionOffsets = false;
+  DwarfEHFrameSection = "\t.section\t.eh_frame,\"aw\", at progbits";
+  DwarfExceptionSection = "\t.section\t.gcc_except_table,\"a\", at progbits";
+
+  // On Linux we must declare when we can use a non-executable stack.
+  if (X86TM->getSubtarget<X86Subtarget>().isLinux())
+    NonexecutableStackDirective = "\t.section\t.note.GNU-stack,\"\", at progbits";
+}
+
+X86COFFTargetAsmInfo::X86COFFTargetAsmInfo(const X86TargetMachine &TM):
+  X86TargetAsmInfo(TM) {
+  GlobalPrefix = "_";
+  LCOMMDirective = "\t.lcomm\t";
+  COMMDirectiveTakesAlignment = false;
+  HasDotTypeDotSizeDirective = false;
+  StaticCtorsSection = "\t.section .ctors,\"aw\"";
+  StaticDtorsSection = "\t.section .dtors,\"aw\"";
+  HiddenDirective = NULL;
+  PrivateGlobalPrefix = "L";  // Prefix for private global symbols
+  WeakRefDirective = "\t.weak\t";
+  SetDirective = "\t.set\t";
+
+  // Set up DWARF directives
+  HasLEB128 = true;  // Target asm supports leb128 directives (little-endian)
+  AbsoluteDebugSectionOffsets = true;
+  AbsoluteEHSectionOffsets = false;
+  SupportsDebugInformation = true;
+  DwarfSectionOffsetDirective = "\t.secrel32\t";
+  DwarfAbbrevSection =  "\t.section\t.debug_abbrev,\"dr\"";
+  DwarfInfoSection =    "\t.section\t.debug_info,\"dr\"";
+  DwarfLineSection =    "\t.section\t.debug_line,\"dr\"";
+  DwarfFrameSection =   "\t.section\t.debug_frame,\"dr\"";
+  DwarfPubNamesSection ="\t.section\t.debug_pubnames,\"dr\"";
+  DwarfPubTypesSection ="\t.section\t.debug_pubtypes,\"dr\"";
+  DwarfStrSection =     "\t.section\t.debug_str,\"dr\"";
+  DwarfLocSection =     "\t.section\t.debug_loc,\"dr\"";
+  DwarfARangesSection = "\t.section\t.debug_aranges,\"dr\"";
+  DwarfRangesSection =  "\t.section\t.debug_ranges,\"dr\"";
+  DwarfMacInfoSection = "\t.section\t.debug_macinfo,\"dr\"";
+}
+
+X86WinTargetAsmInfo::X86WinTargetAsmInfo(const X86TargetMachine &TM):
+  X86TargetAsmInfo(TM) {
+  GlobalPrefix = "_";
+  CommentString = ";";
+
+  PrivateGlobalPrefix = "$";
+  AlignDirective = "\talign\t";
+  ZeroDirective = "\tdb\t";
+  ZeroDirectiveSuffix = " dup(0)";
+  AsciiDirective = "\tdb\t";
+  AscizDirective = 0;
+  Data8bitsDirective = "\tdb\t";
+  Data16bitsDirective = "\tdw\t";
+  Data32bitsDirective = "\tdd\t";
+  Data64bitsDirective = "\tdq\t";
+  HasDotTypeDotSizeDirective = false;
+
+  TextSection = "_text";
+  DataSection = "_data";
+  JumpTableDataSection = NULL;
+  SwitchToSectionDirective = "";
+  TextSectionStartSuffix = "\tsegment 'CODE'";
+  DataSectionStartSuffix = "\tsegment 'DATA'";
+  SectionEndDirectiveSuffix = "\tends\n";
+}
+
 /// PreferredEHDataFormat - This hook allows the target to select data
 /// format used for encoding pointers in exception handling data. Reason is
 /// 0 for data, 1 for code labels, 2 for function pointers. Global is true

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=53299&r1=53298&r2=53299&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Wed Jul  9 08:20:48 2008
@@ -33,8 +33,25 @@
     virtual std::string PrintSectionFlags(unsigned flags) const;
 
   private:
-    const X86TargetMachine* X86TM;
     bool LowerToBSwap(CallInst *CI) const;
+  protected:
+    const X86TargetMachine* X86TM;
+  };
+
+  struct X86DarwinTargetAsmInfo : public X86TargetAsmInfo {
+    explicit X86DarwinTargetAsmInfo(const X86TargetMachine &TM);
+  };
+
+  struct X86ELFTargetAsmInfo : public X86TargetAsmInfo {
+    explicit X86ELFTargetAsmInfo(const X86TargetMachine &TM);
+  };
+
+  struct X86COFFTargetAsmInfo : public X86TargetAsmInfo {
+    explicit X86COFFTargetAsmInfo(const X86TargetMachine &TM);
+  };
+
+  struct X86WinTargetAsmInfo : public X86TargetAsmInfo {
+    explicit X86WinTargetAsmInfo(const X86TargetMachine &TM);
   };
 } // namespace llvm
 

Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=53299&r1=53298&r2=53299&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Wed Jul  9 08:20:48 2008
@@ -36,7 +36,22 @@
 Y("x86-64", "  64-bit X86: EM64T and AMD64");
 
 const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
-  return new X86TargetAsmInfo(*this);
+  if (Subtarget.isFlavorIntel())
+    return new X86WinTargetAsmInfo(*this);
+  else
+    switch (Subtarget.TargetType) {
+     case X86Subtarget::isDarwin:
+      return new X86DarwinTargetAsmInfo(*this);
+     case X86Subtarget::isELF:
+      return new X86ELFTargetAsmInfo(*this);
+     case X86Subtarget::isMingw:
+     case X86Subtarget::isCygwin:
+      return new X86COFFTargetAsmInfo(*this);
+     case X86Subtarget::isWindows:
+      return new X86WinTargetAsmInfo(*this);
+     default:
+      return new X86TargetAsmInfo(*this);
+    }
 }
 
 unsigned X86_32TargetMachine::getJITMatchQuality() {




From asl at math.spbu.ru  Wed Jul  9 08:21:09 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:21:09 -0000
Subject: [llvm-commits] [llvm] r53300 - in /llvm/trunk/lib/Target/X86:
 X86TargetAsmInfo.cpp X86TargetAsmInfo.h
Message-ID: <200807091321.m69DL9wF019311@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:21:08 2008
New Revision: 53300

URL: http://llvm.org/viewvc/llvm-project?rev=53300&view=rev
Log:
Split PreferredEHDataFormat hook

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53300&r1=53299&r2=53300&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:21:08 2008
@@ -210,6 +210,17 @@
   DwarfExceptionSection = ".section __DATA,__gcc_except_tab";
 }
 
+unsigned
+X86DarwinTargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason,
+                                              bool Global) const {
+  if (Reason == DwarfEncoding::Functions && Global)
+    return (DW_EH_PE_pcrel | DW_EH_PE_indirect | DW_EH_PE_sdata4);
+  else if (Reason == DwarfEncoding::CodeLabels || !Global)
+    return DW_EH_PE_pcrel;
+  else
+    return DW_EH_PE_absptr;
+}
+
 X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const X86TargetMachine &TM):
   X86TargetAsmInfo(TM) {
   bool is64Bit = X86TM->getSubtarget<X86Subtarget>().is64Bit();
@@ -254,6 +265,45 @@
     NonexecutableStackDirective = "\t.section\t.note.GNU-stack,\"\", at progbits";
 }
 
+unsigned
+X86ELFTargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason,
+                                           bool Global) const {
+  CodeModel::Model CM = X86TM->getCodeModel();
+  bool is64Bit = X86TM->getSubtarget<X86Subtarget>().is64Bit();
+
+  if (X86TM->getRelocationModel() == Reloc::PIC_) {
+    unsigned Format = 0;
+
+    if (!is64Bit)
+      // 32 bit targets always encode pointers as 4 bytes
+      Format = DW_EH_PE_sdata4;
+    else {
+      // 64 bit targets encode pointers in 4 bytes iff:
+      // - code model is small OR
+      // - code model is medium and we're emitting externally visible symbols
+      //   or any code symbols
+      if (CM == CodeModel::Small ||
+          (CM == CodeModel::Medium && (Global ||
+                                       Reason != DwarfEncoding::Data)))
+        Format = DW_EH_PE_sdata4;
+      else
+        Format = DW_EH_PE_sdata8;
+    }
+
+    if (Global)
+      Format |= DW_EH_PE_indirect;
+
+    return (Format | DW_EH_PE_pcrel);
+  } else {
+    if (is64Bit &&
+        (CM == CodeModel::Small ||
+         (CM == CodeModel::Medium && Reason != DwarfEncoding::Data)))
+      return DW_EH_PE_udata4;
+    else
+      return DW_EH_PE_absptr;
+  }
+}
+
 X86COFFTargetAsmInfo::X86COFFTargetAsmInfo(const X86TargetMachine &TM):
   X86TargetAsmInfo(TM) {
   GlobalPrefix = "_";
@@ -312,63 +362,42 @@
   SectionEndDirectiveSuffix = "\tends\n";
 }
 
-/// PreferredEHDataFormat - This hook allows the target to select data
-/// format used for encoding pointers in exception handling data. Reason is
-/// 0 for data, 1 for code labels, 2 for function pointers. Global is true
-/// if the symbol can be relocated.
-unsigned X86TargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason,
-                                                 bool Global) const {
-  const X86Subtarget *Subtarget = &X86TM->getSubtarget<X86Subtarget>();
-
-  switch (Subtarget->TargetType) {
-  case X86Subtarget::isDarwin:
-   if (Reason == DwarfEncoding::Functions && Global)
-     return (DW_EH_PE_pcrel | DW_EH_PE_indirect | DW_EH_PE_sdata4);
-   else if (Reason == DwarfEncoding::CodeLabels || !Global)
-     return DW_EH_PE_pcrel;
-   else
-     return DW_EH_PE_absptr;
-
-  case X86Subtarget::isELF:
-  case X86Subtarget::isCygwin:
-  case X86Subtarget::isMingw: {
-    CodeModel::Model CM = X86TM->getCodeModel();
+unsigned
+X86COFFTargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason,
+                                            bool Global) const {
+  CodeModel::Model CM = X86TM->getCodeModel();
+  bool is64Bit = X86TM->getSubtarget<X86Subtarget>().is64Bit();
 
-    if (X86TM->getRelocationModel() == Reloc::PIC_) {
-      unsigned Format = 0;
+  if (X86TM->getRelocationModel() == Reloc::PIC_) {
+    unsigned Format = 0;
 
-      if (!Subtarget->is64Bit())
-        // 32 bit targets always encode pointers as 4 bytes
+    if (!is64Bit)
+      // 32 bit targets always encode pointers as 4 bytes
+      Format = DW_EH_PE_sdata4;
+    else {
+      // 64 bit targets encode pointers in 4 bytes iff:
+      // - code model is small OR
+      // - code model is medium and we're emitting externally visible symbols
+      //   or any code symbols
+      if (CM == CodeModel::Small ||
+          (CM == CodeModel::Medium && (Global ||
+                                       Reason != DwarfEncoding::Data)))
         Format = DW_EH_PE_sdata4;
-      else {
-        // 64 bit targets encode pointers in 4 bytes iff:
-        // - code model is small OR
-        // - code model is medium and we're emitting externally visible symbols
-        //   or any code symbols
-        if (CM == CodeModel::Small ||
-            (CM == CodeModel::Medium && (Global ||
-                                         Reason != DwarfEncoding::Data)))
-          Format = DW_EH_PE_sdata4;
-        else
-          Format = DW_EH_PE_sdata8;
-      }
-
-      if (Global)
-        Format |= DW_EH_PE_indirect;
-
-      return (Format | DW_EH_PE_pcrel);
-    } else {
-      if (Subtarget->is64Bit() &&
-          (CM == CodeModel::Small ||
-           (CM == CodeModel::Medium && Reason != DwarfEncoding::Data)))
-        return DW_EH_PE_udata4;
       else
-        return DW_EH_PE_absptr;
+        Format = DW_EH_PE_sdata8;
     }
-  }
 
-  default:
-   return TargetAsmInfo::PreferredEHDataFormat(Reason, Global);
+    if (Global)
+      Format |= DW_EH_PE_indirect;
+
+    return (Format | DW_EH_PE_pcrel);
+  } else {
+    if (is64Bit &&
+        (CM == CodeModel::Small ||
+         (CM == CodeModel::Medium && Reason != DwarfEncoding::Data)))
+      return DW_EH_PE_udata4;
+    else
+      return DW_EH_PE_absptr;
   }
 }
 

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=53300&r1=53299&r2=53300&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Wed Jul  9 08:21:08 2008
@@ -25,8 +25,6 @@
     explicit X86TargetAsmInfo(const X86TargetMachine &TM);
 
     virtual bool ExpandInlineAsm(CallInst *CI) const;
-    virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
-                                           bool Global) const;
     virtual std::string SectionForGlobal(const GlobalValue *GV) const;
     virtual std::string UniqueSectionForGlobal(const GlobalValue* GV,
                                                SectionKind::Kind kind) const;
@@ -40,14 +38,20 @@
 
   struct X86DarwinTargetAsmInfo : public X86TargetAsmInfo {
     explicit X86DarwinTargetAsmInfo(const X86TargetMachine &TM);
+    virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
+                                           bool Global) const;
   };
 
   struct X86ELFTargetAsmInfo : public X86TargetAsmInfo {
     explicit X86ELFTargetAsmInfo(const X86TargetMachine &TM);
+    virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
+                                           bool Global) const;
   };
 
   struct X86COFFTargetAsmInfo : public X86TargetAsmInfo {
     explicit X86COFFTargetAsmInfo(const X86TargetMachine &TM);
+    virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
+                                           bool Global) const;
   };
 
   struct X86WinTargetAsmInfo : public X86TargetAsmInfo {




From asl at math.spbu.ru  Wed Jul  9 08:21:29 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:21:29 -0000
Subject: [llvm-commits] [llvm] r53301 - in /llvm/trunk/lib/Target/X86:
 X86TargetAsmInfo.cpp X86TargetAsmInfo.h
Message-ID: <200807091321.m69DLTlN019333@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:21:29 2008
New Revision: 53301

URL: http://llvm.org/viewvc/llvm-project?rev=53301&view=rev
Log:
Split UniqueSectionForGlobal()

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53301&r1=53300&r2=53301&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:21:29 2008
@@ -221,6 +221,15 @@
     return DW_EH_PE_absptr;
 }
 
+std::string
+X86DarwinTargetAsmInfo::UniqueSectionForGlobal(const GlobalValue* GV,
+                                               SectionKind::Kind kind) const {
+  if (kind == SectionKind::Text)
+    return "__TEXT,__textcoal_nt,coalesced,pure_instructions";
+  else
+    return "__DATA,__datacoal_nt,coalesced";
+}
+
 X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const X86TargetMachine &TM):
   X86TargetAsmInfo(TM) {
   bool is64Bit = X86TM->getSubtarget<X86Subtarget>().is64Bit();
@@ -401,41 +410,26 @@
   }
 }
 
-std::string X86TargetAsmInfo::UniqueSectionForGlobal(const GlobalValue* GV,
-                                                SectionKind::Kind kind) const {
-  const X86Subtarget *Subtarget = &X86TM->getSubtarget<X86Subtarget>();
-
-  switch (Subtarget->TargetType) {
-   case X86Subtarget::isDarwin:
-    if (kind == SectionKind::Text)
-      return "__TEXT,__textcoal_nt,coalesced,pure_instructions";
-    else
-      return "__DATA,__datacoal_nt,coalesced";
-   case X86Subtarget::isCygwin:
-   case X86Subtarget::isMingw:
-    switch (kind) {
-     case SectionKind::Text:
-      return ".text$linkonce" + GV->getName();
-     case SectionKind::Data:
-     case SectionKind::BSS:
-     case SectionKind::ThreadData:
-     case SectionKind::ThreadBSS:
-      return ".data$linkonce" + GV->getName();
-     case SectionKind::ROData:
-     case SectionKind::RODataMergeConst:
-     case SectionKind::RODataMergeStr:
-      return ".rdata$linkonce" + GV->getName();
-     default:
-      assert(0 && "Unknown section kind");
-    }
-   case X86Subtarget::isELF:
-    return TargetAsmInfo::UniqueSectionForGlobal(GV, kind);
+std::string
+X86COFFTargetAsmInfo::UniqueSectionForGlobal(const GlobalValue* GV,
+                                             SectionKind::Kind kind) const {
+  switch (kind) {
+   case SectionKind::Text:
+    return ".text$linkonce" + GV->getName();
+   case SectionKind::Data:
+   case SectionKind::BSS:
+   case SectionKind::ThreadData:
+   case SectionKind::ThreadBSS:
+    return ".data$linkonce" + GV->getName();
+   case SectionKind::ROData:
+   case SectionKind::RODataMergeConst:
+   case SectionKind::RODataMergeStr:
+    return ".rdata$linkonce" + GV->getName();
    default:
-    return "";
+    assert(0 && "Unknown section kind");
   }
 }
 
-
 std::string X86TargetAsmInfo::SectionForGlobal(const GlobalValue *GV) const {
   SectionKind::Kind kind = SectionKindForGlobal(GV);
   unsigned flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=53301&r1=53300&r2=53301&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Wed Jul  9 08:21:29 2008
@@ -26,8 +26,6 @@
 
     virtual bool ExpandInlineAsm(CallInst *CI) const;
     virtual std::string SectionForGlobal(const GlobalValue *GV) const;
-    virtual std::string UniqueSectionForGlobal(const GlobalValue* GV,
-                                               SectionKind::Kind kind) const;
     virtual std::string PrintSectionFlags(unsigned flags) const;
 
   private:
@@ -40,6 +38,8 @@
     explicit X86DarwinTargetAsmInfo(const X86TargetMachine &TM);
     virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
                                            bool Global) const;
+    virtual std::string UniqueSectionForGlobal(const GlobalValue* GV,
+                                               SectionKind::Kind kind) const;
   };
 
   struct X86ELFTargetAsmInfo : public X86TargetAsmInfo {
@@ -52,6 +52,8 @@
     explicit X86COFFTargetAsmInfo(const X86TargetMachine &TM);
     virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
                                            bool Global) const;
+    virtual std::string UniqueSectionForGlobal(const GlobalValue* GV,
+                                               SectionKind::Kind kind) const;
   };
 
   struct X86WinTargetAsmInfo : public X86TargetAsmInfo {




From asl at math.spbu.ru  Wed Jul  9 08:21:49 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:21:49 -0000
Subject: [llvm-commits] [llvm] r53302 - in /llvm/trunk/lib/Target/X86:
 X86TargetAsmInfo.cpp X86TargetAsmInfo.h
Message-ID: <200807091321.m69DLnRn019357@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:21:49 2008
New Revision: 53302

URL: http://llvm.org/viewvc/llvm-project?rev=53302&view=rev
Log:
Split PrintSectionFlags

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53302&r1=53301&r2=53302&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:21:49 2008
@@ -313,6 +313,35 @@
   }
 }
 
+std::string X86ELFTargetAsmInfo::PrintSectionFlags(unsigned flags) const {
+  std::string Flags = ",\"";
+
+  if (!(flags & SectionFlags::Debug))
+    Flags += 'a';
+  if (flags & SectionFlags::Code)
+    Flags += 'x';
+  if (flags & SectionFlags::Writeable)
+    Flags += 'w';
+  if (flags & SectionFlags::Mergeable)
+    Flags += 'M';
+  if (flags & SectionFlags::Strings)
+    Flags += 'S';
+  if (flags & SectionFlags::TLS)
+    Flags += 'T';
+
+  Flags += "\"";
+
+  // FIXME: There can be exceptions here
+  if (flags & SectionFlags::BSS)
+    Flags += ", at nobits";
+  else
+    Flags += ", at progbits";
+
+  // FIXME: entity size for mergeable sections
+
+  return Flags;
+}
+
 X86COFFTargetAsmInfo::X86COFFTargetAsmInfo(const X86TargetMachine &TM):
   X86TargetAsmInfo(TM) {
   GlobalPrefix = "_";
@@ -345,32 +374,6 @@
   DwarfMacInfoSection = "\t.section\t.debug_macinfo,\"dr\"";
 }
 
-X86WinTargetAsmInfo::X86WinTargetAsmInfo(const X86TargetMachine &TM):
-  X86TargetAsmInfo(TM) {
-  GlobalPrefix = "_";
-  CommentString = ";";
-
-  PrivateGlobalPrefix = "$";
-  AlignDirective = "\talign\t";
-  ZeroDirective = "\tdb\t";
-  ZeroDirectiveSuffix = " dup(0)";
-  AsciiDirective = "\tdb\t";
-  AscizDirective = 0;
-  Data8bitsDirective = "\tdb\t";
-  Data16bitsDirective = "\tdw\t";
-  Data32bitsDirective = "\tdd\t";
-  Data64bitsDirective = "\tdq\t";
-  HasDotTypeDotSizeDirective = false;
-
-  TextSection = "_text";
-  DataSection = "_data";
-  JumpTableDataSection = NULL;
-  SwitchToSectionDirective = "";
-  TextSectionStartSuffix = "\tsegment 'CODE'";
-  DataSectionStartSuffix = "\tsegment 'DATA'";
-  SectionEndDirectiveSuffix = "\tends\n";
-}
-
 unsigned
 X86COFFTargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason,
                                             bool Global) const {
@@ -430,6 +433,45 @@
   }
 }
 
+std::string X86COFFTargetAsmInfo::PrintSectionFlags(unsigned flags) const {
+  std::string Flags = ",\"";
+
+  if (flags & SectionFlags::Code)
+    Flags += 'x';
+  if (flags & SectionFlags::Writeable)
+    Flags += 'w';
+
+  Flags += "\"";
+
+  return Flags;
+}
+
+X86WinTargetAsmInfo::X86WinTargetAsmInfo(const X86TargetMachine &TM):
+  X86TargetAsmInfo(TM) {
+  GlobalPrefix = "_";
+  CommentString = ";";
+
+  PrivateGlobalPrefix = "$";
+  AlignDirective = "\talign\t";
+  ZeroDirective = "\tdb\t";
+  ZeroDirectiveSuffix = " dup(0)";
+  AsciiDirective = "\tdb\t";
+  AscizDirective = 0;
+  Data8bitsDirective = "\tdb\t";
+  Data16bitsDirective = "\tdw\t";
+  Data32bitsDirective = "\tdd\t";
+  Data64bitsDirective = "\tdq\t";
+  HasDotTypeDotSizeDirective = false;
+
+  TextSection = "_text";
+  DataSection = "_data";
+  JumpTableDataSection = NULL;
+  SwitchToSectionDirective = "";
+  TextSectionStartSuffix = "\tsegment 'CODE'";
+  DataSectionStartSuffix = "\tsegment 'DATA'";
+  SectionEndDirectiveSuffix = "\tends\n";
+}
+
 std::string X86TargetAsmInfo::SectionForGlobal(const GlobalValue *GV) const {
   SectionKind::Kind kind = SectionKindForGlobal(GV);
   unsigned flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
@@ -493,57 +535,3 @@
   Name += PrintSectionFlags(flags);
   return Name;
 }
-
-std::string X86TargetAsmInfo::PrintSectionFlags(unsigned flags) const {
-  const X86Subtarget *Subtarget = &X86TM->getSubtarget<X86Subtarget>();
-
-  std::string Flags = "";
-
-  // Add all special flags, etc
-  switch (Subtarget->TargetType) {
-   case X86Subtarget::isELF:
-    Flags += ",\"";
-
-    if (!(flags & SectionFlags::Debug))
-      Flags += 'a';
-    if (flags & SectionFlags::Code)
-      Flags += 'x';
-    if (flags & SectionFlags::Writeable)
-      Flags += 'w';
-    if (flags & SectionFlags::Mergeable)
-      Flags += 'M';
-    if (flags & SectionFlags::Strings)
-      Flags += 'S';
-    if (flags & SectionFlags::TLS)
-      Flags += 'T';
-
-    Flags += "\"";
-
-    // FIXME: There can be exceptions here
-    if (flags & SectionFlags::BSS)
-      Flags += ", at nobits";
-    else
-      Flags += ", at progbits";
-
-    // FIXME: entity size for mergeable sections
-    break;
-   case X86Subtarget::isCygwin:
-   case X86Subtarget::isMingw:
-    Flags += ",\"";
-
-    if (flags & SectionFlags::Code)
-      Flags += 'x';
-    if (flags & SectionFlags::Writeable)
-      Flags += 'w';
-
-    Flags += "\"";
-
-    break;
-   case X86Subtarget::isDarwin:
-    // Darwin does not use any special flags
-   default:
-    break;
-  }
-
-  return Flags;
-}

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=53302&r1=53301&r2=53302&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Wed Jul  9 08:21:49 2008
@@ -26,7 +26,6 @@
 
     virtual bool ExpandInlineAsm(CallInst *CI) const;
     virtual std::string SectionForGlobal(const GlobalValue *GV) const;
-    virtual std::string PrintSectionFlags(unsigned flags) const;
 
   private:
     bool LowerToBSwap(CallInst *CI) const;
@@ -46,6 +45,7 @@
     explicit X86ELFTargetAsmInfo(const X86TargetMachine &TM);
     virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
                                            bool Global) const;
+    virtual std::string PrintSectionFlags(unsigned flags) const;
   };
 
   struct X86COFFTargetAsmInfo : public X86TargetAsmInfo {
@@ -54,6 +54,7 @@
                                            bool Global) const;
     virtual std::string UniqueSectionForGlobal(const GlobalValue* GV,
                                                SectionKind::Kind kind) const;
+    virtual std::string PrintSectionFlags(unsigned flags) const;
   };
 
   struct X86WinTargetAsmInfo : public X86TargetAsmInfo {




From asl at math.spbu.ru  Wed Jul  9 08:22:17 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:22:17 -0000
Subject: [llvm-commits] [llvm] r53303 - in /llvm/trunk:
 include/llvm/Target/TargetAsmInfo.h lib/Target/X86/X86TargetAsmInfo.cpp
Message-ID: <200807091322.m69DMH6B019382@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:22:17 2008
New Revision: 53303

URL: http://llvm.org/viewvc/llvm-project?rev=53303&view=rev
Log:
Print entity size for mergeable sections

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53303&r1=53302&r2=53303&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:22:17 2008
@@ -45,15 +45,25 @@
   namespace SectionFlags {
     enum Flags {
       None       = 0,
-      Code       = 1 << 0, ///< Section contains code
-      Writeable  = 1 << 1, ///< Section is writeable
-      BSS        = 1 << 2, ///< Section contains only zeroes
-      Mergeable  = 1 << 3, ///< Section contains mergeable data
-      Strings    = 1 << 4, ///< Section contains null-terminated strings
-      TLS        = 1 << 5, ///< Section contains thread-local data
-      Debug      = 1 << 6, ///< Section contains debug data
-      Linkonce   = 1 << 7  ///< Section is linkonce
+      Code       = 1 << 0,    ///< Section contains code
+      Writeable  = 1 << 1,    ///< Section is writeable
+      BSS        = 1 << 2,    ///< Section contains only zeroes
+      Mergeable  = 1 << 3,    ///< Section contains mergeable data
+      Strings    = 1 << 4,    ///< Section contains null-terminated strings
+      TLS        = 1 << 5,    ///< Section contains thread-local data
+      Debug      = 1 << 6,    ///< Section contains debug data
+      Linkonce   = 1 << 7,    ///< Section is linkonce
+      // Some gap for future flags
+      EntitySize = 0xFF << 24 ///< Entity size for mergeable sections
     };
+
+    static inline unsigned getEntitySize(unsigned flags) {
+      return (flags >> 24) & 0xFF;
+    }
+
+    static inline unsigned setEntitySize(unsigned flags, unsigned size) {
+      return ((flags & ~EntitySize) | ((size & 0xFF) << 24));
+    }
   }
 
   class TargetMachine;

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53303&r1=53302&r2=53303&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:22:17 2008
@@ -337,7 +337,8 @@
   else
     Flags += ", at progbits";
 
-  // FIXME: entity size for mergeable sections
+  if (unsigned entitySize = SectionFlags::getEntitySize(flags))
+    Flags += "," + utostr(entitySize);
 
   return Flags;
 }




From asl at math.spbu.ru  Wed Jul  9 08:22:46 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:22:46 -0000
Subject: [llvm-commits] [llvm] r53304 - in /llvm/trunk:
 include/llvm/Target/TargetAsmInfo.h lib/Target/TargetAsmInfo.cpp
 lib/Target/X86/X86TargetAsmInfo.cpp
Message-ID: <200807091322.m69DMkHn019409@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:22:46 2008
New Revision: 53304

URL: http://llvm.org/viewvc/llvm-project?rev=53304&view=rev
Log:
Provide general hook for section name calculation

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h
    llvm/trunk/lib/Target/TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53304&r1=53303&r2=53304&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:22:46 2008
@@ -481,11 +481,14 @@
     /// global with all necessary flags and marks.
     virtual std::string SectionForGlobal(const GlobalValue *GV) const;
 
+    // Helper methods for SectionForGlobal
     virtual std::string UniqueSectionForGlobal(const GlobalValue* GV,
                                                SectionKind::Kind kind) const;
 
     virtual std::string PrintSectionFlags(unsigned flags) const { return ""; }
 
+    virtual std::string SelectSectionForGlobal(const GlobalValue *GV) const;
+
     // Accessors.
     //
     const char *getTextSection() const {

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=53304&r1=53303&r2=53304&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Jul  9 08:22:46 2008
@@ -257,12 +257,43 @@
 
 std::string
 TargetAsmInfo::SectionForGlobal(const GlobalValue *GV) const {
+  unsigned flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
+
+  std::string Name;
+
+  // Select section name
+  if (GV->hasSection()) {
+    // Honour section already set, if any
+    Name = GV->getSection();
+  } else {
+    // Use default section depending on the 'type' of global
+    Name = SelectSectionForGlobal(GV);
+  }
+
+  Name += PrintSectionFlags(flags);
+  return Name;
+}
+
+// Lame default implementation. Calculate the section name for global.
+std::string
+TargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const {
   SectionKind::Kind kind = SectionKindForGlobal(GV);
 
-  if (kind == SectionKind::Text)
-    return getTextSection();
-  else if (kind == SectionKind::BSS && getBSSSection())
-    return getBSSSection();
+  if (GV->hasLinkOnceLinkage() ||
+      GV->hasWeakLinkage() ||
+      GV->hasCommonLinkage())
+    return UniqueSectionForGlobal(GV, kind);
+  else {
+    if (kind == SectionKind::Text)
+      return getTextSection();
+    else if (kind == SectionKind::BSS && getBSSSection())
+      return getBSSSection();
+    else if (getReadOnlySection() &&
+             (kind == SectionKind::ROData ||
+              kind == SectionKind::RODataMergeConst ||
+              kind == SectionKind::RODataMergeStr))
+      return getReadOnlySection();
+  }
 
   return getDataSection();
 }

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53304&r1=53303&r2=53304&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:22:46 2008
@@ -494,7 +494,7 @@
        case Function::InternalLinkage:
        case Function::DLLExportLinkage:
        case Function::ExternalLinkage:
-        Name = TextSection;
+        Name = getTextSection();
         break;
        case Function::WeakLinkage:
        case Function::LinkOnceLinkage:
@@ -509,22 +509,22 @@
       else {
         switch (kind) {
          case SectionKind::Data:
-          Name = DataSection;
+          Name = getDataSection();
           break;
          case SectionKind::BSS:
-          Name = (BSSSection ? BSSSection : DataSection);
+          Name = (getBSSSection() ? getBSSSection() : getDataSection());
           break;
          case SectionKind::ROData:
          case SectionKind::RODataMergeStr:
          case SectionKind::RODataMergeConst:
           // FIXME: Temporary
-          Name = DataSection;
+          Name = getDataSection();
           break;
          case SectionKind::ThreadData:
-          Name = (TLSDataSection ? TLSDataSection : DataSection);
+          Name = (getTLSDataSection() ? getTLSDataSection() : getDataSection());
           break;
          case SectionKind::ThreadBSS:
-          Name = (TLSBSSSection ? TLSBSSSection : DataSection);
+          Name = (getTLSBSSSection() ? getTLSBSSSection() : getDataSection());
          default:
           assert(0 && "Unsuported section kind for global");
         }




From asl at math.spbu.ru  Wed Jul  9 08:23:08 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:23:08 -0000
Subject: [llvm-commits] [llvm] r53305 - in /llvm/trunk/lib/Target:
 TargetAsmInfo.cpp X86/X86TargetAsmInfo.cpp X86/X86TargetAsmInfo.h
Message-ID: <200807091323.m69DN888019434@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:23:08 2008
New Revision: 53305

URL: http://llvm.org/viewvc/llvm-project?rev=53305&view=rev
Log:
Provide section selection for X86 ELF targets

Modified:
    llvm/trunk/lib/Target/TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=53305&r1=53304&r2=53305&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Jul  9 08:23:08 2008
@@ -261,6 +261,9 @@
 
   std::string Name;
 
+  // FIXME: Should we use some hashing based on section name and just check
+  // flags?
+
   // Select section name
   if (GV->hasSection()) {
     // Honour section already set, if any

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53305&r1=53304&r2=53305&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:23:08 2008
@@ -313,6 +313,51 @@
   }
 }
 
+std::string
+X86ELFTargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const {
+  SectionKind::Kind kind = SectionKindForGlobal(GV);
+
+  if (const Function *F = dyn_cast<Function>(GV)) {
+    switch (F->getLinkage()) {
+     default: assert(0 && "Unknown linkage type!");
+     case Function::InternalLinkage:
+     case Function::DLLExportLinkage:
+     case Function::ExternalLinkage:
+      return getTextSection();
+     case Function::WeakLinkage:
+     case Function::LinkOnceLinkage:
+      return UniqueSectionForGlobal(F, kind);
+    }
+  } else if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
+    if (GVar->hasCommonLinkage() ||
+        GVar->hasLinkOnceLinkage() ||
+        GVar->hasWeakLinkage())
+      return UniqueSectionForGlobal(GVar, kind);
+    else {
+      switch (kind) {
+       case SectionKind::Data:
+        return getDataSection();
+       case SectionKind::BSS:
+        // ELF targets usually have BSS sections
+        return getBSSSection();
+       case SectionKind::ROData:
+       case SectionKind::RODataMergeStr:
+       case SectionKind::RODataMergeConst:
+        // FIXME: Temporary
+        return getReadOnlySection();
+       case SectionKind::ThreadData:
+        // ELF targets usually support TLS stuff
+        return getTLSDataSection();
+       case SectionKind::ThreadBSS:
+        return getTLSBSSSection();
+       default:
+        assert(0 && "Unsuported section kind for global");
+      }
+    }
+  } else
+    assert(0 && "Unsupported global");
+}
+
 std::string X86ELFTargetAsmInfo::PrintSectionFlags(unsigned flags) const {
   std::string Flags = ",\"";
 
@@ -472,67 +517,3 @@
   DataSectionStartSuffix = "\tsegment 'DATA'";
   SectionEndDirectiveSuffix = "\tends\n";
 }
-
-std::string X86TargetAsmInfo::SectionForGlobal(const GlobalValue *GV) const {
-  SectionKind::Kind kind = SectionKindForGlobal(GV);
-  unsigned flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
-  std::string Name;
-
-  // FIXME: Should we use some hashing based on section name and just check
-  // flags?
-  // FIXME: It seems, that Darwin uses much more sections.
-
-  // Select section name
-  if (GV->hasSection()) {
-    // Honour section already set, if any
-    Name = GV->getSection();
-  } else {
-    // Use default section depending on the 'type' of global
-    if (const Function *F = dyn_cast<Function>(GV)) {
-      switch (F->getLinkage()) {
-       default: assert(0 && "Unknown linkage type!");
-       case Function::InternalLinkage:
-       case Function::DLLExportLinkage:
-       case Function::ExternalLinkage:
-        Name = getTextSection();
-        break;
-       case Function::WeakLinkage:
-       case Function::LinkOnceLinkage:
-        Name = UniqueSectionForGlobal(F, kind);
-        break;
-      }
-    } else if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
-      if (GVar->hasCommonLinkage() ||
-          GVar->hasLinkOnceLinkage() ||
-          GVar->hasWeakLinkage())
-        Name = UniqueSectionForGlobal(GVar, kind);
-      else {
-        switch (kind) {
-         case SectionKind::Data:
-          Name = getDataSection();
-          break;
-         case SectionKind::BSS:
-          Name = (getBSSSection() ? getBSSSection() : getDataSection());
-          break;
-         case SectionKind::ROData:
-         case SectionKind::RODataMergeStr:
-         case SectionKind::RODataMergeConst:
-          // FIXME: Temporary
-          Name = getDataSection();
-          break;
-         case SectionKind::ThreadData:
-          Name = (getTLSDataSection() ? getTLSDataSection() : getDataSection());
-          break;
-         case SectionKind::ThreadBSS:
-          Name = (getTLSBSSSection() ? getTLSBSSSection() : getDataSection());
-         default:
-          assert(0 && "Unsuported section kind for global");
-        }
-      }
-    } else
-      assert(0 && "Unsupported global");
-  }
-
-  Name += PrintSectionFlags(flags);
-  return Name;
-}

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=53305&r1=53304&r2=53305&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Wed Jul  9 08:23:08 2008
@@ -45,6 +45,8 @@
     explicit X86ELFTargetAsmInfo(const X86TargetMachine &TM);
     virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
                                            bool Global) const;
+
+    virtual std::string SelectSectionForGlobal(const GlobalValue *GV) const;
     virtual std::string PrintSectionFlags(unsigned flags) const;
   };
 




From asl at math.spbu.ru  Wed Jul  9 08:23:37 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:23:37 -0000
Subject: [llvm-commits] [llvm] r53306 - in /llvm/trunk:
 include/llvm/Target/TargetAsmInfo.h lib/Target/X86/X86TargetAsmInfo.cpp
 lib/Target/X86/X86TargetAsmInfo.h
Message-ID: <200807091323.m69DNbgP019459@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:23:37 2008
New Revision: 53306

URL: http://llvm.org/viewvc/llvm-project?rev=53306&view=rev
Log:
Handle ELF mergeable sections

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53306&r1=53305&r2=53306&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:23:37 2008
@@ -57,12 +57,12 @@
       EntitySize = 0xFF << 24 ///< Entity size for mergeable sections
     };
 
-    static inline unsigned getEntitySize(unsigned flags) {
-      return (flags >> 24) & 0xFF;
+    static inline unsigned getEntitySize(unsigned Flags) {
+      return (Flags >> 24) & 0xFF;
     }
 
-    static inline unsigned setEntitySize(unsigned flags, unsigned size) {
-      return ((flags & ~EntitySize) | ((size & 0xFF) << 24));
+    static inline unsigned setEntitySize(unsigned Flags, unsigned Size) {
+      return ((Flags & ~EntitySize) | ((Size & 0xFF) << 24));
     }
   }
 

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53306&r1=53305&r2=53306&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:23:37 2008
@@ -341,10 +341,11 @@
         // ELF targets usually have BSS sections
         return getBSSSection();
        case SectionKind::ROData:
+        return getReadOnlySection();
        case SectionKind::RODataMergeStr:
+        return MergeableStringSection(GVar);
        case SectionKind::RODataMergeConst:
-        // FIXME: Temporary
-        return getReadOnlySection();
+        return MergeableConstSection(GVar);
        case SectionKind::ThreadData:
         // ELF targets usually support TLS stuff
         return getTLSDataSection();
@@ -358,6 +359,66 @@
     assert(0 && "Unsupported global");
 }
 
+std::string
+X86ELFTargetAsmInfo::MergeableConstSection(const GlobalVariable *GV) const {
+  unsigned Flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
+  unsigned Size = SectionFlags::getEntitySize(Flags);
+
+  // FIXME: string here is temporary, until stuff will fully land in.
+  if (Size)
+    return ".rodata.cst" + utostr(Size);
+  else
+    return getReadOnlySection();
+}
+
+std::string
+X86ELFTargetAsmInfo::MergeableStringSection(const GlobalVariable *GV) const {
+  unsigned Flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
+  unsigned Size = SectionFlags::getEntitySize(Flags);
+
+  if (Size) {
+    // We also need alignment here
+    const TargetData *TD = X86TM->getTargetData();
+    unsigned Align = TD->getPreferredAlignment(GV);
+    if (Align < Size)
+      Align = Size;
+
+    // FIXME: string here is temporary, until stuff will fully land in.
+    return ".rodata.str" + utostr(Size) + ',' + utostr(Align);
+  } else
+    return getReadOnlySection();
+}
+
+unsigned
+X86ELFTargetAsmInfo::SectionFlagsForGlobal(const GlobalValue *GV,
+                                           const char* name) const {
+  unsigned Flags =
+    TargetAsmInfo::SectionFlagsForGlobal(GV,
+                                         GV->getSection().c_str());
+
+  // If there was decision to put stuff into mergeable section - calculate
+  // entity size
+  if (Flags & SectionFlags::Mergeable) {
+    const TargetData *TD = X86TM->getTargetData();
+    Constant *C = cast<GlobalVariable>(GV)->getInitializer();
+    const Type *Type;
+
+    if (Flags & SectionFlags::Strings) {
+      const ConstantArray *CVA = cast<ConstantArray>(C);
+      Type = CVA->getType()->getElementType();
+    } else
+      Type = C->getType();
+
+    unsigned Size = TD->getABITypeSize(Type);
+    if (Size > 32)
+      Size = 0;
+    Flags = SectionFlags::setEntitySize(Flags, Size);
+  }
+
+  return Flags;
+}
+
+
 std::string X86ELFTargetAsmInfo::PrintSectionFlags(unsigned flags) const {
   std::string Flags = ",\"";
 

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=53306&r1=53305&r2=53306&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Wed Jul  9 08:23:37 2008
@@ -20,6 +20,7 @@
 
   // Forward declaration.
   class X86TargetMachine;
+  class GlobalVariable;
 
   struct X86TargetAsmInfo : public TargetAsmInfo {
     explicit X86TargetAsmInfo(const X86TargetMachine &TM);
@@ -47,7 +48,11 @@
                                            bool Global) const;
 
     virtual std::string SelectSectionForGlobal(const GlobalValue *GV) const;
+    virtual unsigned SectionFlagsForGlobal(const GlobalValue *GV,
+                                           const char* name) const;
     virtual std::string PrintSectionFlags(unsigned flags) const;
+    std::string MergeableConstSection(const GlobalVariable *GV) const;
+    std::string MergeableStringSection(const GlobalVariable *GV) const;
   };
 
   struct X86COFFTargetAsmInfo : public X86TargetAsmInfo {




From asl at math.spbu.ru  Wed Jul  9 08:23:57 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:23:57 -0000
Subject: [llvm-commits] [llvm] r53307 - in /llvm/trunk/lib/Target/X86:
 X86TargetAsmInfo.cpp X86TargetAsmInfo.h
Message-ID: <200807091323.m69DNvCR019484@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:23:57 2008
New Revision: 53307

URL: http://llvm.org/viewvc/llvm-project?rev=53307&view=rev
Log:
Add funny darwin section selection logic

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53307&r1=53306&r2=53307&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:23:57 2008
@@ -222,12 +222,113 @@
 }
 
 std::string
+X86DarwinTargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const {
+  SectionKind::Kind Kind = SectionKindForGlobal(GV);
+  bool isWeak = GV->hasWeakLinkage() ||
+                GV->hasCommonLinkage() ||
+                GV->hasLinkOnceLinkage();
+
+  switch (Kind) {
+   case SectionKind::Text:
+    if (isWeak)
+      return ".section __TEXT,__textcoal_nt,coalesced,pure_instructions";
+    else
+      return getTextSection();
+   case SectionKind::Data:
+   case SectionKind::ThreadData:
+   case SectionKind::BSS:
+   case SectionKind::ThreadBSS:
+    if (cast<GlobalVariable>(GV)->isConstant()) {
+      if (isWeak)
+        return ".section __DATA,__const_coal,coalesced";
+      else
+        return ".const_data";
+    } else {
+      if (isWeak)
+        return ".section __DATA,__datacoal_nt,coalesced";
+      else
+        return getDataSection();
+    }
+   case SectionKind::ROData:
+    if (isWeak)
+      return ".section __DATA,__const_coal,coalesced";
+    else
+      return getReadOnlySection();
+   case SectionKind::RODataMergeStr:
+    return MergeableStringSection(cast<GlobalVariable>(GV));
+   case SectionKind::RODataMergeConst:
+    return MergeableConstSection(cast<GlobalVariable>(GV));
+   default:
+    assert(0 && "Unsuported section kind for global");
+  }
+
+  // FIXME: Do we have any extra special weird cases?
+}
+
+std::string
+X86DarwinTargetAsmInfo::MergeableStringSection(const GlobalVariable *GV) const {
+  unsigned Flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
+  unsigned Size = SectionFlags::getEntitySize(Flags);
+
+  if (Size) {
+    const TargetData *TD = X86TM->getTargetData();
+    unsigned Align = TD->getPreferredAlignment(GV);
+    if (Align <= 32)
+      return getCStringSection();
+  }
+
+  return getReadOnlySection();
+}
+
+std::string
+X86DarwinTargetAsmInfo::MergeableConstSection(const GlobalVariable *GV) const {
+  unsigned Flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
+  unsigned Size = SectionFlags::getEntitySize(Flags);
+
+  if (Size == 4)
+    return FourByteConstantSection;
+  else if (Size == 8)
+    return EightByteConstantSection;
+  else if (Size == 16 && X86TM->getSubtarget<X86Subtarget>().is64Bit())
+    return SixteenByteConstantSection;
+
+  return getReadOnlySection();
+}
+
+std::string
 X86DarwinTargetAsmInfo::UniqueSectionForGlobal(const GlobalValue* GV,
                                                SectionKind::Kind kind) const {
-  if (kind == SectionKind::Text)
-    return "__TEXT,__textcoal_nt,coalesced,pure_instructions";
-  else
-    return "__DATA,__datacoal_nt,coalesced";
+  assert(0 && "Darwin does not use unique sections");
+  return "";
+}
+
+unsigned
+X86DarwinTargetAsmInfo::SectionFlagsForGlobal(const GlobalValue *GV,
+                                              const char* name) const {
+  unsigned Flags =
+    TargetAsmInfo::SectionFlagsForGlobal(GV,
+                                         GV->getSection().c_str());
+
+  // If there was decision to put stuff into mergeable section - calculate
+  // entity size
+  if (Flags & SectionFlags::Mergeable) {
+    const TargetData *TD = X86TM->getTargetData();
+    Constant *C = cast<GlobalVariable>(GV)->getInitializer();
+    const Type *Type;
+
+    if (Flags & SectionFlags::Strings) {
+      const ConstantArray *CVA = cast<ConstantArray>(C);
+      Type = CVA->getType()->getElementType();
+    } else
+      Type = C->getType();
+
+    unsigned Size = TD->getABITypeSize(Type);
+    if (Size > 16)
+      Size = 0;
+    Flags = SectionFlags::setEntitySize(Flags, Size);
+  }
+
+  return Flags;
 }
 
 X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const X86TargetMachine &TM):
@@ -365,10 +466,14 @@
   unsigned Size = SectionFlags::getEntitySize(Flags);
 
   // FIXME: string here is temporary, until stuff will fully land in.
-  if (Size)
-    return ".rodata.cst" + utostr(Size);
-  else
-    return getReadOnlySection();
+  if (Size == 4)
+    return FourByteConstantSection;
+  else if (Size == 8)
+    return EightByteConstantSection;
+  else if (Size == 16)
+    return SixteenByteConstantSection;
+
+  return getReadOnlySection();
 }
 
 std::string
@@ -383,10 +488,10 @@
     if (Align < Size)
       Align = Size;
 
-    // FIXME: string here is temporary, until stuff will fully land in.
-    return ".rodata.str" + utostr(Size) + ',' + utostr(Align);
-  } else
-    return getReadOnlySection();
+    return getCStringSection() + utostr(Size) + ',' + utostr(Align);
+  }
+
+  return getReadOnlySection();
 }
 
 unsigned
@@ -410,7 +515,7 @@
       Type = C->getType();
 
     unsigned Size = TD->getABITypeSize(Type);
-    if (Size > 32)
+    if (Size > 16)
       Size = 0;
     Flags = SectionFlags::setEntitySize(Flags, Size);
   }

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=53307&r1=53306&r2=53307&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Wed Jul  9 08:23:57 2008
@@ -38,8 +38,13 @@
     explicit X86DarwinTargetAsmInfo(const X86TargetMachine &TM);
     virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
                                            bool Global) const;
+    virtual std::string SelectSectionForGlobal(const GlobalValue *GV) const;
+    virtual unsigned SectionFlagsForGlobal(const GlobalValue *GV,
+                                           const char* name) const;
     virtual std::string UniqueSectionForGlobal(const GlobalValue* GV,
                                                SectionKind::Kind kind) const;
+    std::string MergeableConstSection(const GlobalVariable *GV) const;
+    std::string MergeableStringSection(const GlobalVariable *GV) const;
   };
 
   struct X86ELFTargetAsmInfo : public X86TargetAsmInfo {




From asl at math.spbu.ru  Wed Jul  9 08:24:19 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:24:19 -0000
Subject: [llvm-commits] [llvm] r53308 -
	/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h
Message-ID: <200807091324.m69DOJac019507@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:24:18 2008
New Revision: 53308

URL: http://llvm.org/viewvc/llvm-project?rev=53308&view=rev
Log:
Drop dead member reference

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=53308&r1=53307&r2=53308&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Wed Jul  9 08:24:18 2008
@@ -26,7 +26,6 @@
     explicit X86TargetAsmInfo(const X86TargetMachine &TM);
 
     virtual bool ExpandInlineAsm(CallInst *CI) const;
-    virtual std::string SectionForGlobal(const GlobalValue *GV) const;
 
   private:
     bool LowerToBSwap(CallInst *CI) const;




From asl at math.spbu.ru  Wed Jul  9 08:24:39 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:24:39 -0000
Subject: [llvm-commits] [llvm] r53309 - in /llvm/trunk/lib/Target:
 TargetAsmInfo.cpp X86/X86ATTAsmPrinter.cpp
Message-ID: <200807091324.m69DOdAb019528@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:24:38 2008
New Revision: 53309

URL: http://llvm.org/viewvc/llvm-project?rev=53309&view=rev
Log:
Fix thinko

Modified:
    llvm/trunk/lib/Target/TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=53309&r1=53308&r2=53309&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Jul  9 08:24:38 2008
@@ -167,7 +167,6 @@
   bool isThreadLocal = GVar->isThreadLocal();
   assert(GVar && "Invalid global value for section selection");
 
-  SectionKind::Kind kind;
   if (isSuitableForBSS(GVar)) {
     // Variable can be easily put to BSS section.
     return (isThreadLocal ? SectionKind::ThreadBSS : SectionKind::BSS);
@@ -177,14 +176,14 @@
     // note, there is no thread-local r/o section.
     Constant *C = GVar->getInitializer();
     if (C->ContainsRelocations())
-      kind = SectionKind::ROData;
+      return SectionKind::ROData;
     else {
       const ConstantArray *CVA = dyn_cast<ConstantArray>(C);
       // Check, if initializer is a null-terminated string
       if (CVA && CVA->isCString())
-        kind = SectionKind::RODataMergeStr;
+        return SectionKind::RODataMergeStr;
       else
-        kind = SectionKind::RODataMergeConst;
+        return SectionKind::RODataMergeConst;
     }
   }
 

Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=53309&r1=53308&r2=53309&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Jul  9 08:24:38 2008
@@ -32,6 +32,8 @@
 #include "llvm/Target/TargetOptions.h"
 using namespace llvm;
 
+#include <iostream>
+
 STATISTIC(EmittedInsts, "Number of machine instrs printed");
 
 static std::string getPICLabelString(unsigned FnNum,
@@ -772,6 +774,9 @@
   if (!GVar->hasInitializer())
     return;   // External global require no code
 
+  GVar->dump();
+  std::cout << TAI->SectionForGlobal(GVar) << std::endl;
+
   // Check to see if this is a special global used by LLVM, if so, emit it.
   if (EmitSpecialLLVMGlobal(GVar)) {
     if (Subtarget->isTargetDarwin() &&




From asl at math.spbu.ru  Wed Jul  9 08:24:56 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:24:56 -0000
Subject: [llvm-commits] [llvm] r53310 -
	/llvm/trunk/lib/Target/TargetAsmInfo.cpp
Message-ID: <200807091324.m69DOu96019548@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:24:55 2008
New Revision: 53310

URL: http://llvm.org/viewvc/llvm-project?rev=53310&view=rev
Log:
Use 'gnu.linkonce', where needed

Modified:
    llvm/trunk/lib/Target/TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=53310&r1=53309&r2=53310&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Jul  9 08:24:55 2008
@@ -239,14 +239,17 @@
     // Some lame default implementation
     if (strcmp(name, ".bss") == 0 ||
         strncmp(name, ".bss.", 5) == 0 ||
+        strncmp(name, ".gnu.linkonce.b.", 16) == 0 ||
         strncmp(name, ".llvm.linkonce.b.", 17) == 0)
       flags |= SectionFlags::BSS;
     else if (strcmp(name, ".tdata") == 0 ||
              strncmp(name, ".tdata.", 7) == 0 ||
+             strncmp(name, ".gnu.linkonce.td.", 17) == 0 ||
              strncmp(name, ".llvm.linkonce.td.", 18) == 0)
       flags |= SectionFlags::TLS;
     else if (strcmp(name, ".tbss") == 0 ||
              strncmp(name, ".tbss.", 6) == 0 ||
+             strncmp(name, ".gnu.linkonce.tb.", 17) == 0 ||
              strncmp(name, ".llvm.linkonce.tb.", 18) == 0)
       flags |= SectionFlags::BSS | SectionFlags::TLS;
   }
@@ -305,19 +308,19 @@
                                       SectionKind::Kind kind) const {
   switch (kind) {
    case SectionKind::Text:
-    return ".llvm.linkonce.t." + GV->getName();
+    return ".gnu.linkonce.t." + GV->getName();
    case SectionKind::Data:
-    return ".llvm.linkonce.d." + GV->getName();
+    return ".gnu.linkonce.d." + GV->getName();
    case SectionKind::BSS:
-    return ".llvm.linkonce.b." + GV->getName();
+    return ".gnu.linkonce.b." + GV->getName();
    case SectionKind::ROData:
    case SectionKind::RODataMergeConst:
    case SectionKind::RODataMergeStr:
-    return ".llvm.linkonce.r." + GV->getName();
+    return ".gnu.linkonce.r." + GV->getName();
    case SectionKind::ThreadData:
-    return ".llvm.linkonce.td." + GV->getName();
+    return ".gnu.linkonce.td." + GV->getName();
    case SectionKind::ThreadBSS:
-    return ".llvm.linkonce.tb." + GV->getName();
+    return ".gnu.linkonce.tb." + GV->getName();
    default:
     assert(0 && "Unknown section kind");
   }




From asl at math.spbu.ru  Wed Jul  9 08:25:26 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:25:26 -0000
Subject: [llvm-commits] [llvm] r53311 - in /llvm/trunk:
 include/llvm/Target/TargetAsmInfo.h lib/Target/TargetAsmInfo.cpp
 lib/Target/X86/X86TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.h
Message-ID: <200807091325.m69DPQ8T019581@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:25:26 2008
New Revision: 53311

URL: http://llvm.org/viewvc/llvm-project?rev=53311&view=rev
Log:
Add hacky way to distinguish named and named sections. This will be generalized in the future.

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h
    llvm/trunk/lib/Target/TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53311&r1=53310&r2=53311&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:25:26 2008
@@ -53,6 +53,7 @@
       TLS        = 1 << 5,    ///< Section contains thread-local data
       Debug      = 1 << 6,    ///< Section contains debug data
       Linkonce   = 1 << 7,    ///< Section is linkonce
+      Named      = 1 << 8,    ///< Section is named
       // Some gap for future flags
       EntitySize = 0xFF << 24 ///< Entity size for mergeable sections
     };

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=53311&r1=53310&r2=53311&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Jul  9 08:25:26 2008
@@ -193,36 +193,36 @@
 
 unsigned
 TargetAsmInfo::SectionFlagsForGlobal(const GlobalValue *GV,
-                                     const char* name) const {
-  unsigned flags = SectionFlags::None;
+                                     const char* Name) const {
+  unsigned Flags = SectionFlags::None;
 
   // Decode flags from global itself.
   if (GV) {
-    SectionKind::Kind kind = SectionKindForGlobal(GV);
-    switch (kind) {
+    SectionKind::Kind Kind = SectionKindForGlobal(GV);
+    switch (Kind) {
      case SectionKind::Text:
-      flags |= SectionFlags::Code;
+      Flags |= SectionFlags::Code;
       break;
      case SectionKind::ThreadData:
-      flags |= SectionFlags::TLS;
+      Flags |= SectionFlags::TLS;
       // FALLS THROUGH
      case SectionKind::Data:
-      flags |= SectionFlags::Writeable;
+      Flags |= SectionFlags::Writeable;
       break;
      case SectionKind::ThreadBSS:
-      flags |= SectionFlags::TLS;
+      Flags |= SectionFlags::TLS;
       // FALLS THROUGH
      case SectionKind::BSS:
-      flags |= SectionFlags::BSS;
+      Flags |= SectionFlags::BSS;
       break;
      case SectionKind::ROData:
       // No additional flags here
       break;
      case SectionKind::RODataMergeStr:
-      flags |= SectionFlags::Strings;
+      Flags |= SectionFlags::Strings;
       // FALLS THROUGH
      case SectionKind::RODataMergeConst:
-      flags |= SectionFlags::Mergeable;
+      Flags |= SectionFlags::Mergeable;
       break;
      default:
       assert(0 && "Unexpected section kind!");
@@ -231,35 +231,35 @@
     if (GV->hasLinkOnceLinkage() ||
         GV->hasWeakLinkage() ||
         GV->hasCommonLinkage())
-      flags |= SectionFlags::Linkonce;
+      Flags |= SectionFlags::Linkonce;
   }
 
   // Add flags from sections, if any.
-  if (name) {
-    // Some lame default implementation
-    if (strcmp(name, ".bss") == 0 ||
-        strncmp(name, ".bss.", 5) == 0 ||
-        strncmp(name, ".gnu.linkonce.b.", 16) == 0 ||
-        strncmp(name, ".llvm.linkonce.b.", 17) == 0)
-      flags |= SectionFlags::BSS;
-    else if (strcmp(name, ".tdata") == 0 ||
-             strncmp(name, ".tdata.", 7) == 0 ||
-             strncmp(name, ".gnu.linkonce.td.", 17) == 0 ||
-             strncmp(name, ".llvm.linkonce.td.", 18) == 0)
-      flags |= SectionFlags::TLS;
-    else if (strcmp(name, ".tbss") == 0 ||
-             strncmp(name, ".tbss.", 6) == 0 ||
-             strncmp(name, ".gnu.linkonce.tb.", 17) == 0 ||
-             strncmp(name, ".llvm.linkonce.tb.", 18) == 0)
-      flags |= SectionFlags::BSS | SectionFlags::TLS;
+  if (Name) {
+    Flags |= SectionFlags::Named;
+
+    // Some lame default implementation based on some magic section names.
+    if (strncmp(Name, ".gnu.linkonce.b.", 16) == 0 ||
+        strncmp(Name, ".llvm.linkonce.b.", 17) == 0)
+      Flags |= SectionFlags::BSS;
+    else if (strcmp(Name, ".tdata") == 0 ||
+             strncmp(Name, ".tdata.", 7) == 0 ||
+             strncmp(Name, ".gnu.linkonce.td.", 17) == 0 ||
+             strncmp(Name, ".llvm.linkonce.td.", 18) == 0)
+      Flags |= SectionFlags::TLS;
+    else if (strcmp(Name, ".tbss") == 0 ||
+             strncmp(Name, ".tbss.", 6) == 0 ||
+             strncmp(Name, ".gnu.linkonce.tb.", 17) == 0 ||
+             strncmp(Name, ".llvm.linkonce.tb.", 18) == 0)
+      Flags |= SectionFlags::BSS | SectionFlags::TLS;
   }
 
-  return flags;
+  return Flags;
 }
 
 std::string
 TargetAsmInfo::SectionForGlobal(const GlobalValue *GV) const {
-  unsigned flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
+  unsigned Flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
 
   std::string Name;
 
@@ -275,28 +275,33 @@
     Name = SelectSectionForGlobal(GV);
   }
 
-  Name += PrintSectionFlags(flags);
+  // If section is named we need to switch into it via special '.section'
+  // directive and also append funky flags. Otherwise - section name is just
+  // some magic assembler directive.
+  if (Flags & SectionFlags::Named)
+    Name = SwitchToSectionDirective + Name + PrintSectionFlags(Flags);
+
   return Name;
 }
 
 // Lame default implementation. Calculate the section name for global.
 std::string
 TargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const {
-  SectionKind::Kind kind = SectionKindForGlobal(GV);
+  SectionKind::Kind Kind = SectionKindForGlobal(GV);
 
   if (GV->hasLinkOnceLinkage() ||
       GV->hasWeakLinkage() ||
       GV->hasCommonLinkage())
-    return UniqueSectionForGlobal(GV, kind);
+    return UniqueSectionForGlobal(GV, Kind);
   else {
-    if (kind == SectionKind::Text)
+    if (Kind == SectionKind::Text)
       return getTextSection();
-    else if (kind == SectionKind::BSS && getBSSSection())
+    else if (Kind == SectionKind::BSS && getBSSSection())
       return getBSSSection();
     else if (getReadOnlySection() &&
-             (kind == SectionKind::ROData ||
-              kind == SectionKind::RODataMergeConst ||
-              kind == SectionKind::RODataMergeStr))
+             (Kind == SectionKind::ROData ||
+              Kind == SectionKind::RODataMergeConst ||
+              Kind == SectionKind::RODataMergeStr))
       return getReadOnlySection();
   }
 
@@ -305,8 +310,8 @@
 
 std::string
 TargetAsmInfo::UniqueSectionForGlobal(const GlobalValue* GV,
-                                      SectionKind::Kind kind) const {
-  switch (kind) {
+                                      SectionKind::Kind Kind) const {
+  switch (Kind) {
    case SectionKind::Text:
     return ".gnu.linkonce.t." + GV->getName();
    case SectionKind::Data:

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53311&r1=53310&r2=53311&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:25:26 2008
@@ -335,11 +335,11 @@
   X86TargetAsmInfo(TM) {
   bool is64Bit = X86TM->getSubtarget<X86Subtarget>().is64Bit();
 
-  ReadOnlySection = "\t.section\t.rodata";
-  FourByteConstantSection = "\t.section\t.rodata.cst4,\"aM\", at progbits,4";
-  EightByteConstantSection = "\t.section\t.rodata.cst8,\"aM\", at progbits,8";
-  SixteenByteConstantSection = "\t.section\t.rodata.cst16,\"aM\", at progbits,16";
-  CStringSection = "\t.section\t.rodata.str1.1,\"aMS\", at progbits,1";
+  ReadOnlySection = ".rodata";
+  FourByteConstantSection = ".rodata.cst";
+  EightByteConstantSection = ".rodata.cst";
+  SixteenByteConstantSection = ".rodata.cst";
+  CStringSection = ".rodata.str";
   PrivateGlobalPrefix = ".L";
   WeakRefDirective = "\t.weak\t";
   SetDirective = "\t.set\t";
@@ -520,6 +520,16 @@
     Flags = SectionFlags::setEntitySize(Flags, Size);
   }
 
+  // FIXME: This is hacky and will be removed when switching from std::string
+  // sections into 'general' ones
+
+  // Mark section as named, when needed (so, we we will need .section directive
+  // to switch into it).
+  if (Flags & (SectionFlags::Mergeable ||
+               SectionFlags::TLS ||
+               SectionFlags::Linkonce))
+    Flags |= SectionFlags::Named;
+
   return Flags;
 }
 
@@ -645,6 +655,23 @@
   }
 }
 
+unsigned
+X86COFFTargetAsmInfo::SectionFlagsForGlobal(const GlobalValue *GV,
+                                            const char* name) const {
+  unsigned Flags =
+    TargetAsmInfo::SectionFlagsForGlobal(GV,
+                                         GV->getSection().c_str());
+
+  // Mark section as named, when needed (so, we we will need .section directive
+  // to switch into it).
+  if (Flags & (SectionFlags::Mergeable ||
+               SectionFlags::TLS ||
+               SectionFlags::Linkonce))
+    Flags |= SectionFlags::Named;
+
+  return Flags;
+}
+
 std::string X86COFFTargetAsmInfo::PrintSectionFlags(unsigned flags) const {
   std::string Flags = ",\"";
 

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=53311&r1=53310&r2=53311&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Wed Jul  9 08:25:26 2008
@@ -63,6 +63,8 @@
     explicit X86COFFTargetAsmInfo(const X86TargetMachine &TM);
     virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
                                            bool Global) const;
+    virtual unsigned SectionFlagsForGlobal(const GlobalValue *GV,
+                                           const char* name) const;
     virtual std::string UniqueSectionForGlobal(const GlobalValue* GV,
                                                SectionKind::Kind kind) const;
     virtual std::string PrintSectionFlags(unsigned flags) const;




From asl at math.spbu.ru  Wed Jul  9 08:25:46 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:25:46 -0000
Subject: [llvm-commits] [llvm] r53312 - in /llvm/trunk/lib/Target:
 TargetAsmInfo.cpp X86/X86TargetAsmInfo.cpp
Message-ID: <200807091325.m69DPkwL019603@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:25:46 2008
New Revision: 53312

URL: http://llvm.org/viewvc/llvm-project?rev=53312&view=rev
Log:
Fix several bugs in named sections handling

Modified:
    llvm/trunk/lib/Target/TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=53312&r1=53311&r2=53312&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Jul  9 08:25:46 2008
@@ -235,7 +235,7 @@
   }
 
   // Add flags from sections, if any.
-  if (Name) {
+  if (Name && *Name) {
     Flags |= SectionFlags::Named;
 
     // Some lame default implementation based on some magic section names.
@@ -279,7 +279,7 @@
   // directive and also append funky flags. Otherwise - section name is just
   // some magic assembler directive.
   if (Flags & SectionFlags::Named)
-    Name = SwitchToSectionDirective + Name + PrintSectionFlags(Flags);
+    Name = getSwitchToSectionDirective() + Name + PrintSectionFlags(Flags);
 
   return Name;
 }

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53312&r1=53311&r2=53312&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:25:46 2008
@@ -336,9 +336,9 @@
   bool is64Bit = X86TM->getSubtarget<X86Subtarget>().is64Bit();
 
   ReadOnlySection = ".rodata";
-  FourByteConstantSection = ".rodata.cst";
-  EightByteConstantSection = ".rodata.cst";
-  SixteenByteConstantSection = ".rodata.cst";
+  FourByteConstantSection = "\t.section\t.rodata.cst4,\"aM\", at progbits,4";
+  EightByteConstantSection = "\t.section\t.rodata.cst8,\"aM\", at progbits,8";
+  SixteenByteConstantSection = "\t.section\t.rodata.cst16,\"aM\", at progbits,16";
   CStringSection = ".rodata.str";
   PrivateGlobalPrefix = ".L";
   WeakRefDirective = "\t.weak\t";
@@ -466,12 +466,10 @@
   unsigned Size = SectionFlags::getEntitySize(Flags);
 
   // FIXME: string here is temporary, until stuff will fully land in.
-  if (Size == 4)
-    return FourByteConstantSection;
-  else if (Size == 8)
-    return EightByteConstantSection;
-  else if (Size == 16)
-    return SixteenByteConstantSection;
+  // We cannot use {Four,Eight,Sixteen}ByteConstantSection here, since it's
+  // currently directly used by asmprinter.
+  if (Size == 4 || Size == 8 || Size == 16)
+    return ".rodata.cst" + utostr(Size);
 
   return getReadOnlySection();
 }
@@ -525,8 +523,8 @@
 
   // Mark section as named, when needed (so, we we will need .section directive
   // to switch into it).
-  if (Flags & (SectionFlags::Mergeable ||
-               SectionFlags::TLS ||
+  if (Flags & (SectionFlags::Mergeable |
+               SectionFlags::TLS |
                SectionFlags::Linkonce))
     Flags |= SectionFlags::Named;
 




From asl at math.spbu.ru  Wed Jul  9 08:26:05 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:26:05 -0000
Subject: [llvm-commits] [llvm] r53313 -
	/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
Message-ID: <200807091326.m69DQ5Cs019629@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:26:05 2008
New Revision: 53313

URL: http://llvm.org/viewvc/llvm-project?rev=53313&view=rev
Log:
Drop mergeable flag, if size is no suitable

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53313&r1=53312&r2=53313&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:26:05 2008
@@ -323,8 +323,11 @@
       Type = C->getType();
 
     unsigned Size = TD->getABITypeSize(Type);
-    if (Size > 16)
+    if (Size > 16) {
+      // Too big for mergeable
       Size = 0;
+      Flags &= ~SectionFlags::Mergeable;
+    }
     Flags = SectionFlags::setEntitySize(Flags, Size);
   }
 
@@ -513,8 +516,11 @@
       Type = C->getType();
 
     unsigned Size = TD->getABITypeSize(Type);
-    if (Size > 16)
+    if (Size > 16) {
+      // Too big for mergeable
       Size = 0;
+      Flags &= ~SectionFlags::Mergeable;
+    }
     Flags = SectionFlags::setEntitySize(Flags, Size);
   }
 




From asl at math.spbu.ru  Wed Jul  9 08:26:24 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:26:24 -0000
Subject: [llvm-commits] [llvm] r53314 -
	/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
Message-ID: <200807091326.m69DQOAt019649@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:26:24 2008
New Revision: 53314

URL: http://llvm.org/viewvc/llvm-project?rev=53314&view=rev
Log:
Typo

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53314&r1=53313&r2=53314&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:26:24 2008
@@ -489,7 +489,7 @@
     if (Align < Size)
       Align = Size;
 
-    return getCStringSection() + utostr(Size) + ',' + utostr(Align);
+    return getCStringSection() + utostr(Size) + '.' + utostr(Align);
   }
 
   return getReadOnlySection();




From asl at math.spbu.ru  Wed Jul  9 08:26:52 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:26:52 -0000
Subject: [llvm-commits] [llvm] r53315 - in /llvm/trunk:
 include/llvm/Target/TargetAsmInfo.h lib/Target/X86/X86TargetAsmInfo.cpp
Message-ID: <200807091326.m69DQqZ1019677@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:26:52 2008
New Revision: 53315

URL: http://llvm.org/viewvc/llvm-project?rev=53315&view=rev
Log:
Another bunch of hacks for named sections support

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53315&r1=53314&r2=53315&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:26:52 2008
@@ -53,8 +53,9 @@
       TLS        = 1 << 5,    ///< Section contains thread-local data
       Debug      = 1 << 6,    ///< Section contains debug data
       Linkonce   = 1 << 7,    ///< Section is linkonce
-      Named      = 1 << 8,    ///< Section is named
+      TypeFlags  = 0xFF,
       // Some gap for future flags
+      Named      = 1 << 23,    ///< Section is named
       EntitySize = 0xFF << 24 ///< Entity size for mergeable sections
     };
 

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53315&r1=53314&r2=53315&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:26:52 2008
@@ -323,8 +323,10 @@
       Type = C->getType();
 
     unsigned Size = TD->getABITypeSize(Type);
-    if (Size > 16) {
-      // Too big for mergeable
+    if (Size > 16 ||
+        !(Flags & SectionFlags::Strings ||
+          (Size == 4 || Size == 8 || Size == 16))) {
+      // Not suitable for mergeable
       Size = 0;
       Flags &= ~SectionFlags::Mergeable;
     }
@@ -516,8 +518,12 @@
       Type = C->getType();
 
     unsigned Size = TD->getABITypeSize(Type);
-    if (Size > 16) {
-      // Too big for mergeable
+    // FIXME: size check here ugly, and will hopefully have gone, when we will
+    // have sane interface for attaching flags to sections.
+    if (Size > 16 ||
+        !(Flags & SectionFlags::Strings ||
+          (Size == 4 || Size == 8 || Size == 16))) {
+      // Not suitable for mergeable
       Size = 0;
       Flags &= ~SectionFlags::Mergeable;
     }
@@ -529,9 +535,11 @@
 
   // Mark section as named, when needed (so, we we will need .section directive
   // to switch into it).
-  if (Flags & (SectionFlags::Mergeable |
-               SectionFlags::TLS |
-               SectionFlags::Linkonce))
+  unsigned TypeFlags = Flags & SectionFlags::TypeFlags;
+  if (!TypeFlags /* Read-only section */ ||
+      (TypeFlags & (SectionFlags::Mergeable |
+                    SectionFlags::TLS |
+                    SectionFlags::Linkonce)))
     Flags |= SectionFlags::Named;
 
   return Flags;
@@ -668,9 +676,11 @@
 
   // Mark section as named, when needed (so, we we will need .section directive
   // to switch into it).
-  if (Flags & (SectionFlags::Mergeable ||
-               SectionFlags::TLS ||
-               SectionFlags::Linkonce))
+  unsigned TypeFlags = Flags & SectionFlags::TypeFlags;
+  if (!TypeFlags /* Read-only section */ ||
+      (TypeFlags & (SectionFlags::Mergeable |
+                    SectionFlags::TLS |
+                    SectionFlags::Linkonce)))
     Flags |= SectionFlags::Named;
 
   return Flags;




From asl at math.spbu.ru  Wed Jul  9 08:27:17 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:27:17 -0000
Subject: [llvm-commits] [llvm] r53316 - in /llvm/trunk/lib:
 CodeGen/AsmPrinter.cpp Target/X86/X86ATTAsmPrinter.cpp
 Target/X86/X86Subtarget.cpp
Message-ID: <200807091327.m69DRHcg019704@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:27:16 2008
New Revision: 53316

URL: http://llvm.org/viewvc/llvm-project?rev=53316&view=rev
Log:
Switch to new section name handling facility

Modified:
    llvm/trunk/lib/CodeGen/AsmPrinter.cpp
    llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
    llvm/trunk/lib/Target/X86/X86Subtarget.cpp

Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter.cpp?rev=53316&r1=53315&r2=53316&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter.cpp Wed Jul  9 08:27:16 2008
@@ -293,13 +293,16 @@
   // the appropriate section.
   TargetLowering *LoweringInfo = TM.getTargetLowering();
 
-  const char* JumpTableDataSection = TAI->getJumpTableDataSection();  
+  const char* JumpTableDataSection = TAI->getJumpTableDataSection();
+  const Function *F = MF.getFunction();
+  unsigned SectionFlags = TAI->SectionFlagsForGlobal(F);
   if ((IsPic && !(LoweringInfo && LoweringInfo->usesGlobalOffsetTable())) ||
-     !JumpTableDataSection) {
+     !JumpTableDataSection ||
+      SectionFlags & SectionFlags::Linkonce) {
     // In PIC mode, we need to emit the jump table to the same section as the
     // function body itself, otherwise the label differences won't make sense.
-    // We should also do if the section name is NULL.
-    const Function *F = MF.getFunction();
+    // We should also do if the section name is NULL or function is declared in
+    // discardable section.
     SwitchToTextSection(getSectionForFunction(*F).c_str(), F);
   } else {
     SwitchToDataSection(JumpTableDataSection);

Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=53316&r1=53315&r2=53316&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Jul  9 08:27:16 2008
@@ -147,26 +147,9 @@
   }
 }
 
-/// getSectionForFunction - Return the section that we should emit the
-/// specified function body into.
+// Substitute old hook with new one temporary
 std::string X86ATTAsmPrinter::getSectionForFunction(const Function &F) const {
-  switch (F.getLinkage()) {
-  default: assert(0 && "Unknown linkage type!");
-  case Function::InternalLinkage:
-  case Function::DLLExportLinkage:
-  case Function::ExternalLinkage:
-    return TAI->getTextSection();
-  case Function::WeakLinkage:
-  case Function::LinkOnceLinkage:
-    if (Subtarget->isTargetDarwin()) {
-      return ".section __TEXT,__textcoal_nt,coalesced,pure_instructions";
-    } else if (Subtarget->isTargetCygMing()) {
-      return "\t.section\t.text$linkonce." + CurrentFnName + ",\"ax\"";
-    } else {
-      return "\t.section\t.llvm.linkonce.t." + CurrentFnName +
-             ",\"ax\", at progbits";
-    }
-  }
+  return TAI->SectionForGlobal(&F);
 }
 
 void X86ATTAsmPrinter::emitFunctionHeader(const MachineFunction &MF) {
@@ -174,7 +157,7 @@
 
   decorateName(CurrentFnName, F);
 
-  SwitchToTextSection(getSectionForFunction(*F).c_str(), F);
+  SwitchToTextSection(TAI->SectionForGlobal(F).c_str(), F);
 
   unsigned FnAlign = OptimizeForSize ? 1 : 4;
   switch (F->getLinkage()) {
@@ -774,8 +757,7 @@
   if (!GVar->hasInitializer())
     return;   // External global require no code
 
-  GVar->dump();
-  std::cout << TAI->SectionForGlobal(GVar) << std::endl;
+  std::string SectionName = TAI->SectionForGlobal(GVar);
 
   // Check to see if this is a special global used by LLVM, if so, emit it.
   if (EmitSpecialLLVMGlobal(GVar)) {
@@ -806,7 +788,10 @@
   if (Subtarget->isTargetELF())
     O << "\t.type\t" << name << ", at object\n";
 
+  SwitchToDataSection(SectionName.c_str());
+
   if (C->isNullValue() && !GVar->hasSection()) {
+    // FIXME: This seems to be pretty darwin-specific
     if (GVar->hasExternalLinkage()) {
       if (const char *Directive = TAI->getZeroFillDirective()) {
         O << "\t.globl " << name << '\n';
@@ -820,10 +805,7 @@
         (GVar->hasInternalLinkage() || GVar->hasWeakLinkage() ||
          GVar->hasLinkOnceLinkage() || GVar->hasCommonLinkage())) {
       if (Size == 0) Size = 1;   // .comm Foo, 0 is undefined, avoid it.
-      if (!NoZerosInBSS && TAI->getBSSSection())
-        SwitchToDataSection(TAI->getBSSSection(), GVar);
-      else
-        SwitchToDataSection(TAI->getDataSection(), GVar);
+
       if (TAI->getLCOMMDirective() != NULL) {
         if (GVar->hasInternalLinkage()) {
           O << TAI->getLCOMMDirective() << name << ',' << Size;
@@ -832,7 +814,6 @@
         } else if (Subtarget->isTargetDarwin() && !GVar->hasCommonLinkage()) {
           O << "\t.globl " << name << '\n'
             << TAI->getWeakDefDirective() << name << '\n';
-          SwitchToDataSection("\t.section __DATA,__datacoal_nt,coalesced", GVar);
           EmitAlignment(Align, GVar);
           O << name << ":\t\t\t\t" << TAI->getCommentString() << ' ';
           PrintUnmangledNameSafely(GVar, O);
@@ -869,27 +850,10 @@
     if (Subtarget->isTargetDarwin()) {
       O << "\t.globl " << name << '\n'
         << TAI->getWeakDefDirective() << name << '\n';
-      if (!GVar->isConstant())
-        SwitchToDataSection("\t.section __DATA,__datacoal_nt,coalesced", GVar);
-      else {
-        const ArrayType *AT = dyn_cast<ArrayType>(Type);
-        if (AT && AT->getElementType()==Type::Int8Ty)
-          SwitchToDataSection("\t.section __TEXT,__const_coal,coalesced", GVar);
-        else
-          SwitchToDataSection("\t.section __DATA,__const_coal,coalesced", GVar);
-      }
     } else if (Subtarget->isTargetCygMing()) {
-      std::string SectionName(".section\t.data$linkonce." +
-                              name +
-                              ",\"aw\"");
-      SwitchToDataSection(SectionName.c_str(), GVar);
       O << "\t.globl\t" << name << "\n"
            "\t.linkonce same_size\n";
     } else {
-      std::string SectionName("\t.section\t.llvm.linkonce.d." +
-                              name +
-                              ",\"aw\", at progbits");
-      SwitchToDataSection(SectionName.c_str(), GVar);
       O << "\t.weak\t" << name << '\n';
     }
     break;
@@ -901,64 +865,8 @@
     // If external or appending, declare as a global symbol
     O << "\t.globl " << name << '\n';
     // FALL THROUGH
-   case GlobalValue::InternalLinkage: {
-     if (GVar->isConstant()) {
-       const ConstantArray *CVA = dyn_cast<ConstantArray>(C);
-       if (TAI->getCStringSection() && CVA && CVA->isCString()) {
-         SwitchToDataSection(TAI->getCStringSection(), GVar);
-         break;
-       }
-     }
-     // FIXME: special handling for ".ctors" & ".dtors" sections
-     if (GVar->hasSection() &&
-         (GVar->getSection() == ".ctors" || GVar->getSection() == ".dtors")) {
-       std::string SectionName = ".section " + GVar->getSection();
-
-       if (Subtarget->isTargetCygMing()) {
-         SectionName += ",\"aw\"";
-       } else {
-         assert(!Subtarget->isTargetDarwin());
-         SectionName += ",\"aw\", at progbits";
-       }
-       SwitchToDataSection(SectionName.c_str());
-     } else if (GVar->hasSection() && Subtarget->isTargetDarwin()) {
-       // Honor all section names on Darwin; ObjC uses this
-       std::string SectionName = ".section " + GVar->getSection();
-       SwitchToDataSection(SectionName.c_str());
-     } else {
-       if (C->isNullValue() && !NoZerosInBSS && TAI->getBSSSection())
-         SwitchToDataSection(GVar->isThreadLocal() ? TAI->getTLSBSSSection() :
-                             TAI->getBSSSection(), GVar);
-       else if (!GVar->isConstant())
-         SwitchToDataSection(GVar->isThreadLocal() ? TAI->getTLSDataSection() :
-                             TAI->getDataSection(), GVar);
-       else if (GVar->isThreadLocal())
-         SwitchToDataSection(TAI->getTLSDataSection());
-       else {
-         // Read-only data.
-         bool HasReloc = C->ContainsRelocations();
-         if (HasReloc &&
-             Subtarget->isTargetDarwin() &&
-             TM.getRelocationModel() != Reloc::Static)
-           SwitchToDataSection("\t.const_data\n");
-         else if (!HasReloc && Size == 4 &&
-                  TAI->getFourByteConstantSection())
-           SwitchToDataSection(TAI->getFourByteConstantSection(), GVar);
-         else if (!HasReloc && Size == 8 &&
-                  TAI->getEightByteConstantSection())
-           SwitchToDataSection(TAI->getEightByteConstantSection(), GVar);
-         else if (!HasReloc && Size == 16 &&
-                  TAI->getSixteenByteConstantSection())
-           SwitchToDataSection(TAI->getSixteenByteConstantSection(), GVar);
-         else if (TAI->getReadOnlySection())
-           SwitchToDataSection(TAI->getReadOnlySection(), GVar);
-         else
-           SwitchToDataSection(TAI->getDataSection(), GVar);
-       }
-     }
-
+   case GlobalValue::InternalLinkage:
      break;
-   }
    default:
     assert(0 && "Unknown linkage type!");
   }

Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=53316&r1=53315&r2=53316&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Wed Jul  9 08:27:16 2008
@@ -47,7 +47,8 @@
       // Extra load is needed for all externally visible.
       if (isDirectCall)
         return false;
-      if (GV->hasInternalLinkage() || GV->hasHiddenVisibility())
+      if (GV->hasInternalLinkage() ||
+          (GV->hasHiddenVisibility() && !GV->isDeclaration()))
         return false;
       return true;
     } else if (isTargetCygMing() || isTargetWindows()) {




From asl at math.spbu.ru  Wed Jul  9 08:27:37 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:27:37 -0000
Subject: [llvm-commits] [llvm] r53317 -
	/llvm/trunk/include/llvm/Target/TargetAsmInfo.h
Message-ID: <200807091327.m69DRbmq019725@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:27:37 2008
New Revision: 53317

URL: http://llvm.org/viewvc/llvm-project?rev=53317&view=rev
Log:
Unbreak

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53317&r1=53316&r2=53317&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:27:37 2008
@@ -17,6 +17,7 @@
 #define LLVM_TARGET_ASM_INFO_H
 
 #include "llvm/Support/DataTypes.h"
+#include <string>
 
 namespace llvm {
   // DWARF encoding query type




From asl at math.spbu.ru  Wed Jul  9 08:27:59 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:27:59 -0000
Subject: [llvm-commits] [llvm] r53318 - in /llvm/trunk/lib/Target:
 TargetAsmInfo.cpp X86/X86ATTAsmPrinter.cpp X86/X86TargetAsmInfo.cpp
Message-ID: <200807091327.m69DRxbq019751@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:27:59 2008
New Revision: 53318

URL: http://llvm.org/viewvc/llvm-project?rev=53318&view=rev
Log:
Use isWeakForLinker() hook

Modified:
    llvm/trunk/lib/Target/TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=53318&r1=53317&r2=53318&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Jul  9 08:27:59 2008
@@ -228,9 +228,7 @@
       assert(0 && "Unexpected section kind!");
     }
 
-    if (GV->hasLinkOnceLinkage() ||
-        GV->hasWeakLinkage() ||
-        GV->hasCommonLinkage())
+    if (GV->isWeakForLinker())
       Flags |= SectionFlags::Linkonce;
   }
 
@@ -289,9 +287,7 @@
 TargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const {
   SectionKind::Kind Kind = SectionKindForGlobal(GV);
 
-  if (GV->hasLinkOnceLinkage() ||
-      GV->hasWeakLinkage() ||
-      GV->hasCommonLinkage())
+  if (GV->isWeakForLinker())
     return UniqueSectionForGlobal(GV, Kind);
   else {
     if (Kind == SectionKind::Text)

Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=53318&r1=53317&r2=53318&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Jul  9 08:27:59 2008
@@ -399,10 +399,7 @@
     if (shouldPrintStub(TM, Subtarget)) {
       // Link-once, declaration, or Weakly-linked global variables need
       // non-lazily-resolved stubs
-      if (GV->isDeclaration() ||
-          GV->hasWeakLinkage() ||
-          GV->hasLinkOnceLinkage() ||
-          GV->hasCommonLinkage()) {
+      if (GV->isDeclaration() || GV->isWeakForLinker()) {
         // Dynamically-resolved functions need a stub for the function.
         if (isCallOp && isa<Function>(GV)) {
           FnStubs.insert(Name);
@@ -802,8 +799,7 @@
     }
 
     if (!GVar->isThreadLocal() &&
-        (GVar->hasInternalLinkage() || GVar->hasWeakLinkage() ||
-         GVar->hasLinkOnceLinkage() || GVar->hasCommonLinkage())) {
+        (GVar->hasInternalLinkage() || GVar->isWeakForLinker())) {
       if (Size == 0) Size = 1;   // .comm Foo, 0 is undefined, avoid it.
 
       if (TAI->getLCOMMDirective() != NULL) {

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53318&r1=53317&r2=53318&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:27:59 2008
@@ -224,9 +224,7 @@
 std::string
 X86DarwinTargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const {
   SectionKind::Kind Kind = SectionKindForGlobal(GV);
-  bool isWeak = GV->hasWeakLinkage() ||
-                GV->hasCommonLinkage() ||
-                GV->hasLinkOnceLinkage();
+  bool isWeak = GV->isWeakForLinker();
 
   switch (Kind) {
    case SectionKind::Text:
@@ -435,9 +433,7 @@
       return UniqueSectionForGlobal(F, kind);
     }
   } else if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
-    if (GVar->hasCommonLinkage() ||
-        GVar->hasLinkOnceLinkage() ||
-        GVar->hasWeakLinkage())
+    if (GVar->isWeakForLinker()
       return UniqueSectionForGlobal(GVar, kind);
     else {
       switch (kind) {




From asl at math.spbu.ru  Wed Jul  9 08:28:19 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:28:19 -0000
Subject: [llvm-commits] [llvm] r53319 - in /llvm/trunk/lib/Target/X86:
 X86ATTAsmPrinter.cpp X86TargetAsmInfo.cpp
Message-ID: <200807091328.m69DSJtT019773@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:28:19 2008
New Revision: 53319

URL: http://llvm.org/viewvc/llvm-project?rev=53319&view=rev
Log:
Honour text sections

Modified:
    llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=53319&r1=53318&r2=53319&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Jul  9 08:28:19 2008
@@ -154,10 +154,11 @@
 
 void X86ATTAsmPrinter::emitFunctionHeader(const MachineFunction &MF) {
   const Function *F = MF.getFunction();
+  std::string SectionName = TAI->SectionForGlobal(F);
 
   decorateName(CurrentFnName, F);
 
-  SwitchToTextSection(TAI->SectionForGlobal(F).c_str(), F);
+  SwitchToTextSection(SectionName.c_str());
 
   unsigned FnAlign = OptimizeForSize ? 1 : 4;
   switch (F->getLinkage()) {

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53319&r1=53318&r2=53319&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:28:19 2008
@@ -433,7 +433,7 @@
       return UniqueSectionForGlobal(F, kind);
     }
   } else if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
-    if (GVar->isWeakForLinker()
+    if (GVar->isWeakForLinker())
       return UniqueSectionForGlobal(GVar, kind);
     else {
       switch (kind) {




From asl at math.spbu.ru  Wed Jul  9 08:28:50 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:28:50 -0000
Subject: [llvm-commits] [llvm] r53320 - in /llvm/trunk:
 include/llvm/Target/TargetAsmInfo.h lib/Target/TargetAsmInfo.cpp
 lib/Target/X86/X86TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.h
Message-ID: <200807091328.m69DSoJa019804@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:28:49 2008
New Revision: 53320

URL: http://llvm.org/viewvc/llvm-project?rev=53320&view=rev
Log:
First sketch of special section objects

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h
    llvm/trunk/lib/Target/TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53320&r1=53319&r2=53320&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:28:49 2008
@@ -16,6 +16,7 @@
 #ifndef LLVM_TARGET_ASM_INFO_H
 #define LLVM_TARGET_ASM_INFO_H
 
+#include "llvm/ADT/StringMap.h"
 #include "llvm/Support/DataTypes.h"
 #include <string>
 
@@ -45,6 +46,7 @@
 
   namespace SectionFlags {
     enum Flags {
+      Invalid    = -1UL,
       None       = 0,
       Code       = 1 << 0,    ///< Section contains code
       Writeable  = 1 << 1,    ///< Section is writeable
@@ -73,40 +75,67 @@
   class CallInst;
   class GlobalValue;
 
+  class Section {
+    friend class TargetAsmInfo;
+    friend class StringMapEntry<Section>;
+
+    std::string Name;
+    unsigned Flags;
+
+    explicit Section(unsigned F = SectionFlags::Invalid):Flags(F) { }
+  public:
+    bool isNamed() const { return Flags & SectionFlags::Named; }
+    unsigned getEntitySize() const { return (Flags >> 24) & 0xFF; }
+    const std::string& getName() const { return Name; }
+  };
+
   /// TargetAsmInfo - This class is intended to be used as a base class for asm
   /// properties and features specific to the target.
   class TargetAsmInfo {
+  private:
+    mutable StringMap<Section> Sections;
   protected:
     //===------------------------------------------------------------------===//
     // Properties to be set by the target writer, used to configure asm printer.
     //
-    
+
     /// TextSection - Section directive for standard text.
     ///
     const char *TextSection;              // Defaults to ".text".
-    
+    const Section *TextSection_;
+
     /// DataSection - Section directive for standard data.
     ///
     const char *DataSection;              // Defaults to ".data".
+    const Section *DataSection_;
 
     /// BSSSection - Section directive for uninitialized data.  Null if this
     /// target doesn't support a BSS section.
     ///
     const char *BSSSection;               // Default to ".bss".
+    const Section *BSSSection_;
+
+    /// ReadOnlySection - This is the directive that is emitted to switch to a
+    /// read-only section for constant data (e.g. data declared const,
+    /// jump tables).
+    const char *ReadOnlySection;          // Defaults to NULL
+    const Section *ReadOnlySection_;
 
     /// TLSDataSection - Section directive for Thread Local data.
     ///
     const char *TLSDataSection;// Defaults to ".section .tdata,"awT", at progbits".
+    const Section *TLSDataSection_;
 
     /// TLSBSSSection - Section directive for Thread Local uninitialized data.
     /// Null if this target doesn't support a BSS section.
     ///
     const char *TLSBSSSection;// Default to ".section .tbss,"awT", at nobits".
+    const Section *TLSBSSSection_;
 
     /// ZeroFillDirective - Directive for emitting a global to the ZeroFill
     /// section on this target.  Null if this target doesn't support zerofill.
     const char *ZeroFillDirective;        // Default is null.
-    
+
     /// NonexecutableStackDirective - Directive for declaring to the
     /// linker and beyond that the emitted code does not require stack
     /// memory to be executable.
@@ -274,6 +303,7 @@
     /// other null bytes) on this target. This is commonly supported as
     /// ".cstring".
     const char *CStringSection;           // Defaults to NULL
+    const Section *CStringSection_;
 
     /// StaticCtorsSection - This is the directive that is emitted to switch to
     /// a section to emit the static constructor list.
@@ -289,13 +319,11 @@
     /// SixteenByteConstantSection - These are special sections where we place
     /// 4-, 8-, and 16- byte constant literals.
     const char *FourByteConstantSection;
+    const Section *FourByteConstantSection_;
     const char *EightByteConstantSection;
+    const Section *EightByteConstantSection_;
     const char *SixteenByteConstantSection;
-
-    /// ReadOnlySection - This is the directive that is emitted to switch to a
-    /// read-only section for constant data (e.g. data declared const,
-    /// jump tables).
-    const char *ReadOnlySection;          // Defaults to NULL
+    const Section *SixteenByteConstantSection_;
 
     //===--- Global Variable Emission Directives --------------------------===//
     
@@ -449,6 +477,11 @@
     TargetAsmInfo();
     virtual ~TargetAsmInfo();
 
+    const Section* getNamedSection(const char *Name,
+                                   unsigned Flags = SectionFlags::None) const;
+    const Section* getUnnamedSection(const char *Directive,
+                                     unsigned Flags = SectionFlags::None) const;
+
     /// Measure the specified inline asm to determine an approximation of its
     /// length.
     virtual unsigned getInlineAsmLength(const char *Str) const;
@@ -490,25 +523,46 @@
 
     virtual std::string PrintSectionFlags(unsigned flags) const { return ""; }
 
-    virtual std::string SelectSectionForGlobal(const GlobalValue *GV) const;
+    virtual const Section* SelectSectionForGlobal(const GlobalValue *GV) const;
 
     // Accessors.
     //
     const char *getTextSection() const {
       return TextSection;
     }
+    const Section *getTextSection_() const {
+      return TextSection_;
+    }
     const char *getDataSection() const {
       return DataSection;
     }
+    const Section *getDataSection_() const {
+      return DataSection_;
+    }
     const char *getBSSSection() const {
       return BSSSection;
     }
+    const Section *getBSSSection_() const {
+      return BSSSection_;
+    }
+    const char *getReadOnlySection() const {
+      return ReadOnlySection;
+    }
+    const Section *getReadOnlySection_() const {
+      return ReadOnlySection_;
+    }
     const char *getTLSDataSection() const {
       return TLSDataSection;
     }
+    const Section *getTLSDataSection_() const {
+      return TLSDataSection_;
+    }
     const char *getTLSBSSSection() const {
       return TLSBSSSection;
     }
+    const Section *getTLSBSSSection_() const {
+      return TLSBSSSection_;
+    }
     const char *getZeroFillDirective() const {
       return ZeroFillDirective;
     }
@@ -626,6 +680,9 @@
     const char *getCStringSection() const {
       return CStringSection;
     }
+    const Section *getCStringSection_() const {
+      return CStringSection_;
+    }
     const char *getStaticCtorsSection() const {
       return StaticCtorsSection;
     }
@@ -635,14 +692,20 @@
     const char *getFourByteConstantSection() const {
       return FourByteConstantSection;
     }
+    const Section *getFourByteConstantSection_() const {
+      return FourByteConstantSection_;
+    }
     const char *getEightByteConstantSection() const {
       return EightByteConstantSection;
     }
+    const Section *getEightByteConstantSection_() const {
+      return EightByteConstantSection_;
+    }
     const char *getSixteenByteConstantSection() const {
       return SixteenByteConstantSection;
     }
-    const char *getReadOnlySection() const {
-      return ReadOnlySection;
+    const Section *getSixteenByteConstantSection_() const {
+      return SixteenByteConstantSection_;
     }
     const char *getGlobalDirective() const {
       return GlobalDirective;

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=53320&r1=53319&r2=53320&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Jul  9 08:28:49 2008
@@ -27,10 +27,17 @@
 
 TargetAsmInfo::TargetAsmInfo() :
   TextSection("\t.text"),
+  TextSection_(0),
   DataSection("\t.data"),
+  DataSection_(0),
   BSSSection("\t.bss"),
+  BSSSection_(0),
+  ReadOnlySection(0),
+  ReadOnlySection_(0),
   TLSDataSection("\t.section .tdata,\"awT\", at progbits"),
+  TLSDataSection_(0),
   TLSBSSSection("\t.section .tbss,\"awT\", at nobits"),
+  TLSBSSSection_(0),
   ZeroFillDirective(0),
   NonexecutableStackDirective(0),
   NeedsSet(false),
@@ -71,12 +78,15 @@
   JumpTableDataSection("\t.section .rodata"),
   JumpTableDirective(0),
   CStringSection(0),
+  CStringSection_(0),
   StaticCtorsSection("\t.section .ctors,\"aw\", at progbits"),
   StaticDtorsSection("\t.section .dtors,\"aw\", at progbits"),
   FourByteConstantSection(0),
+  FourByteConstantSection_(0),
   EightByteConstantSection(0),
+  EightByteConstantSection_(0),
   SixteenByteConstantSection(0),
-  ReadOnlySection(0),
+  SixteenByteConstantSection_(0),
   GlobalDirective("\t.globl\t"),
   SetDirective(0),
   LCOMMDirective(0),
@@ -112,6 +122,8 @@
   DwarfEHFrameSection(".eh_frame"),
   DwarfExceptionSection(".gcc_except_table"),
   AsmTransCBE(0) {
+  TextSection_ = getUnnamedSection(TextSection);
+  DataSection_ = getUnnamedSection(DataSection);
 }
 
 TargetAsmInfo::~TargetAsmInfo() {
@@ -257,51 +269,51 @@
 
 std::string
 TargetAsmInfo::SectionForGlobal(const GlobalValue *GV) const {
-  unsigned Flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
-
-  std::string Name;
-
-  // FIXME: Should we use some hashing based on section name and just check
-  // flags?
-
+  const Section* S;
   // Select section name
   if (GV->hasSection()) {
     // Honour section already set, if any
-    Name = GV->getSection();
+    unsigned Flags = SectionFlagsForGlobal(GV,
+                                           GV->getSection().c_str());
+    S = getNamedSection(GV->getSection().c_str(), Flags);
   } else {
     // Use default section depending on the 'type' of global
-    Name = SelectSectionForGlobal(GV);
+    S = SelectSectionForGlobal(GV);
   }
 
+  std::string Name = S->Name;
+
   // If section is named we need to switch into it via special '.section'
   // directive and also append funky flags. Otherwise - section name is just
   // some magic assembler directive.
-  if (Flags & SectionFlags::Named)
-    Name = getSwitchToSectionDirective() + Name + PrintSectionFlags(Flags);
+  if (S->isNamed())
+    Name = getSwitchToSectionDirective() + Name + PrintSectionFlags(S->Flags);
 
   return Name;
 }
 
 // Lame default implementation. Calculate the section name for global.
-std::string
+const Section*
 TargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const {
   SectionKind::Kind Kind = SectionKindForGlobal(GV);
 
-  if (GV->isWeakForLinker())
-    return UniqueSectionForGlobal(GV, Kind);
-  else {
+  if (GV->isWeakForLinker()) {
+    std::string Name = UniqueSectionForGlobal(GV, Kind);
+    unsigned Flags = SectionFlagsForGlobal(GV, Name.c_str());
+    return getNamedSection(Name.c_str(), Flags);
+  } else {
     if (Kind == SectionKind::Text)
-      return getTextSection();
-    else if (Kind == SectionKind::BSS && getBSSSection())
-      return getBSSSection();
-    else if (getReadOnlySection() &&
+      return getTextSection_();
+    else if (Kind == SectionKind::BSS && getBSSSection_())
+      return getBSSSection_();
+    else if (getReadOnlySection_() &&
              (Kind == SectionKind::ROData ||
               Kind == SectionKind::RODataMergeConst ||
               Kind == SectionKind::RODataMergeStr))
-      return getReadOnlySection();
+      return getReadOnlySection_();
   }
 
-  return getDataSection();
+  return getDataSection_();
 }
 
 std::string
@@ -326,3 +338,29 @@
     assert(0 && "Unknown section kind");
   }
 }
+
+const Section*
+TargetAsmInfo::getNamedSection(const char *Name, unsigned Flags) const {
+  Section& S = Sections[Name];
+
+  // This is newly-created section, set it up properly.
+  if (S.Flags == SectionFlags::Invalid) {
+    S.Flags = Flags | SectionFlags::Named;
+    S.Name = Name;
+  }
+
+  return &S;
+}
+
+const Section*
+TargetAsmInfo::getUnnamedSection(const char *Directive, unsigned Flags) const {
+  Section& S = Sections[Directive];
+
+  // This is newly-created section, set it up properly.
+  if (S.Flags == SectionFlags::Invalid) {
+    S.Flags = Flags & ~SectionFlags::Named;
+    S.Name = Directive;
+  }
+
+  return &S;
+}

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53320&r1=53319&r2=53320&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:28:49 2008
@@ -142,12 +142,31 @@
   ConstantPoolSection = "\t.const\n";
   JumpTableDataSection = "\t.const\n";
   CStringSection = "\t.cstring";
+  CStringSection_ = getUnnamedSection("\t.cstring",
+                               SectionFlags::Mergeable | SectionFlags::Strings);
   FourByteConstantSection = "\t.literal4\n";
-  EightByteConstantSection = "\t.literal8\n";
+  FourByteConstantSection_ = getUnnamedSection("\t.literal4\n",
+                                               SectionFlags::Mergeable);
+  EightByteConstantSection_ = getUnnamedSection("\t.literal8\n",
+                                                SectionFlags::Mergeable);
   // FIXME: Why don't always use this section?
-  if (is64Bit)
+  if (is64Bit) {
     SixteenByteConstantSection = "\t.literal16\n";
+    SixteenByteConstantSection_ = getUnnamedSection("\t.literal16\n",
+                                                    SectionFlags::Mergeable);
+  }
   ReadOnlySection = "\t.const\n";
+  ReadOnlySection_ = getUnnamedSection("\t.const\n", SectionFlags::None);
+  TextCoalSection =
+  getUnnamedSection(".section __TEXT,__textcoal_nt,coalesced,pure_instructions",
+                    SectionFlags::Code);
+  ConstDataCoalSection =
+    getUnnamedSection(".section __DATA,__const_coal,coalesced",
+                      SectionFlags::None);
+  ConstDataSection = getUnnamedSection(".const_data", SectionFlags::None);
+  DataCoalSection = getUnnamedSection(".section __DATA,__datacoal_nt,coalesced",
+                                      SectionFlags::Writeable);
+
   LCOMMDirective = "\t.lcomm\t";
   SwitchToSectionDirective = "\t.section ";
   StringConstantPrefix = "\1LC";
@@ -221,7 +240,7 @@
     return DW_EH_PE_absptr;
 }
 
-std::string
+const Section*
 X86DarwinTargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const {
   SectionKind::Kind Kind = SectionKindForGlobal(GV);
   bool isWeak = GV->isWeakForLinker();
@@ -229,29 +248,19 @@
   switch (Kind) {
    case SectionKind::Text:
     if (isWeak)
-      return ".section __TEXT,__textcoal_nt,coalesced,pure_instructions";
+      return TextCoalSection;
     else
-      return getTextSection();
+      return getTextSection_();
    case SectionKind::Data:
    case SectionKind::ThreadData:
    case SectionKind::BSS:
    case SectionKind::ThreadBSS:
-    if (cast<GlobalVariable>(GV)->isConstant()) {
-      if (isWeak)
-        return ".section __DATA,__const_coal,coalesced";
-      else
-        return ".const_data";
-    } else {
-      if (isWeak)
-        return ".section __DATA,__datacoal_nt,coalesced";
-      else
-        return getDataSection();
-    }
-   case SectionKind::ROData:
-    if (isWeak)
-      return ".section __DATA,__const_coal,coalesced";
+    if (cast<GlobalVariable>(GV)->isConstant())
+      return (isWeak ? ConstDataCoalSection : ConstDataSection);
     else
-      return getReadOnlySection();
+      return (isWeak ? DataCoalSection : getDataSection_());
+   case SectionKind::ROData:
+    return (isWeak ? ConstDataCoalSection : getReadOnlySection_());
    case SectionKind::RODataMergeStr:
     return MergeableStringSection(cast<GlobalVariable>(GV));
    case SectionKind::RODataMergeConst:
@@ -263,34 +272,37 @@
   // FIXME: Do we have any extra special weird cases?
 }
 
-std::string
+const Section*
 X86DarwinTargetAsmInfo::MergeableStringSection(const GlobalVariable *GV) const {
-  unsigned Flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
-  unsigned Size = SectionFlags::getEntitySize(Flags);
+  const TargetData *TD = X86TM->getTargetData();
+  Constant *C = cast<GlobalVariable>(GV)->getInitializer();
+  const Type *Type = cast<ConstantArray>(C)->getType()->getElementType();
 
+  unsigned Size = TD->getABITypeSize(Type);
   if (Size) {
     const TargetData *TD = X86TM->getTargetData();
     unsigned Align = TD->getPreferredAlignment(GV);
     if (Align <= 32)
-      return getCStringSection();
+      return getCStringSection_();
   }
 
-  return getReadOnlySection();
+  return getReadOnlySection_();
 }
 
-std::string
+const Section*
 X86DarwinTargetAsmInfo::MergeableConstSection(const GlobalVariable *GV) const {
-  unsigned Flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
-  unsigned Size = SectionFlags::getEntitySize(Flags);
+  const TargetData *TD = X86TM->getTargetData();
+  Constant *C = cast<GlobalVariable>(GV)->getInitializer();
 
+  unsigned Size = TD->getABITypeSize(C->getType());
   if (Size == 4)
-    return FourByteConstantSection;
+    return FourByteConstantSection_;
   else if (Size == 8)
-    return EightByteConstantSection;
+    return EightByteConstantSection_;
   else if (Size == 16 && X86TM->getSubtarget<X86Subtarget>().is64Bit())
-    return SixteenByteConstantSection;
+    return SixteenByteConstantSection_;
 
-  return getReadOnlySection();
+  return getReadOnlySection_();
 }
 
 std::string
@@ -300,44 +312,20 @@
   return "";
 }
 
-unsigned
-X86DarwinTargetAsmInfo::SectionFlagsForGlobal(const GlobalValue *GV,
-                                              const char* name) const {
-  unsigned Flags =
-    TargetAsmInfo::SectionFlagsForGlobal(GV,
-                                         GV->getSection().c_str());
-
-  // If there was decision to put stuff into mergeable section - calculate
-  // entity size
-  if (Flags & SectionFlags::Mergeable) {
-    const TargetData *TD = X86TM->getTargetData();
-    Constant *C = cast<GlobalVariable>(GV)->getInitializer();
-    const Type *Type;
-
-    if (Flags & SectionFlags::Strings) {
-      const ConstantArray *CVA = cast<ConstantArray>(C);
-      Type = CVA->getType()->getElementType();
-    } else
-      Type = C->getType();
-
-    unsigned Size = TD->getABITypeSize(Type);
-    if (Size > 16 ||
-        !(Flags & SectionFlags::Strings ||
-          (Size == 4 || Size == 8 || Size == 16))) {
-      // Not suitable for mergeable
-      Size = 0;
-      Flags &= ~SectionFlags::Mergeable;
-    }
-    Flags = SectionFlags::setEntitySize(Flags, Size);
-  }
-
-  return Flags;
-}
-
 X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const X86TargetMachine &TM):
   X86TargetAsmInfo(TM) {
   bool is64Bit = X86TM->getSubtarget<X86Subtarget>().is64Bit();
 
+  TextSection_ = getUnnamedSection("\t.text", SectionFlags::Code);
+  DataSection_ = getUnnamedSection("\t.data", SectionFlags::Writeable);
+  BSSSection_  = getUnnamedSection("\t.bss",
+                                   SectionFlags::Writeable | SectionFlags::BSS);
+  ReadOnlySection_ = getUnnamedSection("\t.rodata", SectionFlags::None);
+  TLSDataSection_ = getNamedSection("\t.tdata",
+                                    SectionFlags::Writeable | SectionFlags::TLS);
+  TLSBSSSection_ = getNamedSection("\t.tbss",
+                SectionFlags::Writeable | SectionFlags::TLS | SectionFlags::BSS);
+
   ReadOnlySection = ".rodata";
   FourByteConstantSection = "\t.section\t.rodata.cst4,\"aM\", at progbits,4";
   EightByteConstantSection = "\t.section\t.rodata.cst8,\"aM\", at progbits,8";
@@ -417,9 +405,9 @@
   }
 }
 
-std::string
+const Section*
 X86ELFTargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const {
-  SectionKind::Kind kind = SectionKindForGlobal(GV);
+  SectionKind::Kind Kind = SectionKindForGlobal(GV);
 
   if (const Function *F = dyn_cast<Function>(GV)) {
     switch (F->getLinkage()) {
@@ -427,32 +415,36 @@
      case Function::InternalLinkage:
      case Function::DLLExportLinkage:
      case Function::ExternalLinkage:
-      return getTextSection();
+      return getTextSection_();
      case Function::WeakLinkage:
      case Function::LinkOnceLinkage:
-      return UniqueSectionForGlobal(F, kind);
+      std::string Name = UniqueSectionForGlobal(GV, Kind);
+      unsigned Flags = SectionFlagsForGlobal(GV, Name.c_str());
+      return getNamedSection(Name.c_str(), Flags);
     }
   } else if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
-    if (GVar->isWeakForLinker())
-      return UniqueSectionForGlobal(GVar, kind);
-    else {
-      switch (kind) {
+    if (GVar->isWeakForLinker()) {
+      std::string Name = UniqueSectionForGlobal(GVar, Kind);
+      unsigned Flags = SectionFlagsForGlobal(GVar, Name.c_str());
+      return getNamedSection(Name.c_str(), Flags);
+    } else {
+      switch (Kind) {
        case SectionKind::Data:
-        return getDataSection();
+        return getDataSection_();
        case SectionKind::BSS:
         // ELF targets usually have BSS sections
-        return getBSSSection();
+        return getBSSSection_();
        case SectionKind::ROData:
-        return getReadOnlySection();
+        return getReadOnlySection_();
        case SectionKind::RODataMergeStr:
         return MergeableStringSection(GVar);
        case SectionKind::RODataMergeConst:
         return MergeableConstSection(GVar);
        case SectionKind::ThreadData:
         // ELF targets usually support TLS stuff
-        return getTLSDataSection();
+        return getTLSDataSection_();
        case SectionKind::ThreadBSS:
-        return getTLSBSSSection();
+        return getTLSBSSSection_();
        default:
         assert(0 && "Unsuported section kind for global");
       }
@@ -461,87 +453,52 @@
     assert(0 && "Unsupported global");
 }
 
-std::string
+const Section*
 X86ELFTargetAsmInfo::MergeableConstSection(const GlobalVariable *GV) const {
-  unsigned Flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
-  unsigned Size = SectionFlags::getEntitySize(Flags);
+  const TargetData *TD = X86TM->getTargetData();
+  Constant *C = cast<GlobalVariable>(GV)->getInitializer();
+  const Type *Type = C->getType();
 
   // FIXME: string here is temporary, until stuff will fully land in.
   // We cannot use {Four,Eight,Sixteen}ByteConstantSection here, since it's
   // currently directly used by asmprinter.
-  if (Size == 4 || Size == 8 || Size == 16)
-    return ".rodata.cst" + utostr(Size);
+  unsigned Size = TD->getABITypeSize(Type);
+  if (Size == 4 || Size == 8 || Size == 16) {
+    std::string Name =  ".rodata.cst" + utostr(Size);
 
-  return getReadOnlySection();
+    return getNamedSection(Name.c_str(),
+                           SectionFlags::setEntitySize(SectionFlags::Mergeable,
+                                                       Size));
+  }
+
+  return getReadOnlySection_();
 }
 
-std::string
+const Section*
 X86ELFTargetAsmInfo::MergeableStringSection(const GlobalVariable *GV) const {
-  unsigned Flags = SectionFlagsForGlobal(GV, GV->getSection().c_str());
-  unsigned Size = SectionFlags::getEntitySize(Flags);
+  const TargetData *TD = X86TM->getTargetData();
+  Constant *C = cast<GlobalVariable>(GV)->getInitializer();
+  const ConstantArray *CVA = cast<ConstantArray>(C);
+  const Type *Type = CVA->getType()->getElementType();
 
-  if (Size) {
+  unsigned Size = TD->getABITypeSize(Type);
+  if (Size <= 16) {
     // We also need alignment here
     const TargetData *TD = X86TM->getTargetData();
     unsigned Align = TD->getPreferredAlignment(GV);
     if (Align < Size)
       Align = Size;
 
-    return getCStringSection() + utostr(Size) + '.' + utostr(Align);
-  }
-
-  return getReadOnlySection();
-}
-
-unsigned
-X86ELFTargetAsmInfo::SectionFlagsForGlobal(const GlobalValue *GV,
-                                           const char* name) const {
-  unsigned Flags =
-    TargetAsmInfo::SectionFlagsForGlobal(GV,
-                                         GV->getSection().c_str());
-
-  // If there was decision to put stuff into mergeable section - calculate
-  // entity size
-  if (Flags & SectionFlags::Mergeable) {
-    const TargetData *TD = X86TM->getTargetData();
-    Constant *C = cast<GlobalVariable>(GV)->getInitializer();
-    const Type *Type;
-
-    if (Flags & SectionFlags::Strings) {
-      const ConstantArray *CVA = cast<ConstantArray>(C);
-      Type = CVA->getType()->getElementType();
-    } else
-      Type = C->getType();
-
-    unsigned Size = TD->getABITypeSize(Type);
-    // FIXME: size check here ugly, and will hopefully have gone, when we will
-    // have sane interface for attaching flags to sections.
-    if (Size > 16 ||
-        !(Flags & SectionFlags::Strings ||
-          (Size == 4 || Size == 8 || Size == 16))) {
-      // Not suitable for mergeable
-      Size = 0;
-      Flags &= ~SectionFlags::Mergeable;
-    }
-    Flags = SectionFlags::setEntitySize(Flags, Size);
+    std::string Name = getCStringSection() + utostr(Size) + '.' + utostr(Align);
+    unsigned Flags = SectionFlags::setEntitySize(SectionFlags::Mergeable |
+                                                 SectionFlags::Strings,
+                                                 Size);
+    return getNamedSection(Name.c_str(), Flags);
   }
 
-  // FIXME: This is hacky and will be removed when switching from std::string
-  // sections into 'general' ones
-
-  // Mark section as named, when needed (so, we we will need .section directive
-  // to switch into it).
-  unsigned TypeFlags = Flags & SectionFlags::TypeFlags;
-  if (!TypeFlags /* Read-only section */ ||
-      (TypeFlags & (SectionFlags::Mergeable |
-                    SectionFlags::TLS |
-                    SectionFlags::Linkonce)))
-    Flags |= SectionFlags::Named;
-
-  return Flags;
+  return getReadOnlySection_();
 }
 
-
 std::string X86ELFTargetAsmInfo::PrintSectionFlags(unsigned flags) const {
   std::string Flags = ",\"";
 
@@ -663,25 +620,6 @@
   }
 }
 
-unsigned
-X86COFFTargetAsmInfo::SectionFlagsForGlobal(const GlobalValue *GV,
-                                            const char* name) const {
-  unsigned Flags =
-    TargetAsmInfo::SectionFlagsForGlobal(GV,
-                                         GV->getSection().c_str());
-
-  // Mark section as named, when needed (so, we we will need .section directive
-  // to switch into it).
-  unsigned TypeFlags = Flags & SectionFlags::TypeFlags;
-  if (!TypeFlags /* Read-only section */ ||
-      (TypeFlags & (SectionFlags::Mergeable |
-                    SectionFlags::TLS |
-                    SectionFlags::Linkonce)))
-    Flags |= SectionFlags::Named;
-
-  return Flags;
-}
-
 std::string X86COFFTargetAsmInfo::PrintSectionFlags(unsigned flags) const {
   std::string Flags = ",\"";
 

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=53320&r1=53319&r2=53320&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Wed Jul  9 08:28:49 2008
@@ -34,16 +34,19 @@
   };
 
   struct X86DarwinTargetAsmInfo : public X86TargetAsmInfo {
+    const Section* TextCoalSection;
+    const Section* ConstDataCoalSection;
+    const Section* ConstDataSection;
+    const Section* DataCoalSection;
+
     explicit X86DarwinTargetAsmInfo(const X86TargetMachine &TM);
     virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
                                            bool Global) const;
-    virtual std::string SelectSectionForGlobal(const GlobalValue *GV) const;
-    virtual unsigned SectionFlagsForGlobal(const GlobalValue *GV,
-                                           const char* name) const;
+    virtual const Section* SelectSectionForGlobal(const GlobalValue *GV) const;
     virtual std::string UniqueSectionForGlobal(const GlobalValue* GV,
                                                SectionKind::Kind kind) const;
-    std::string MergeableConstSection(const GlobalVariable *GV) const;
-    std::string MergeableStringSection(const GlobalVariable *GV) const;
+    const Section* MergeableConstSection(const GlobalVariable *GV) const;
+    const Section* MergeableStringSection(const GlobalVariable *GV) const;
   };
 
   struct X86ELFTargetAsmInfo : public X86TargetAsmInfo {
@@ -51,20 +54,16 @@
     virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
                                            bool Global) const;
 
-    virtual std::string SelectSectionForGlobal(const GlobalValue *GV) const;
-    virtual unsigned SectionFlagsForGlobal(const GlobalValue *GV,
-                                           const char* name) const;
+    virtual const Section* SelectSectionForGlobal(const GlobalValue *GV) const;
     virtual std::string PrintSectionFlags(unsigned flags) const;
-    std::string MergeableConstSection(const GlobalVariable *GV) const;
-    std::string MergeableStringSection(const GlobalVariable *GV) const;
+    const Section* MergeableConstSection(const GlobalVariable *GV) const;
+    const Section* MergeableStringSection(const GlobalVariable *GV) const ;
   };
 
   struct X86COFFTargetAsmInfo : public X86TargetAsmInfo {
     explicit X86COFFTargetAsmInfo(const X86TargetMachine &TM);
     virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
                                            bool Global) const;
-    virtual unsigned SectionFlagsForGlobal(const GlobalValue *GV,
-                                           const char* name) const;
     virtual std::string UniqueSectionForGlobal(const GlobalValue* GV,
                                                SectionKind::Kind kind) const;
     virtual std::string PrintSectionFlags(unsigned flags) const;




From asl at math.spbu.ru  Wed Jul  9 08:29:09 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:29:09 -0000
Subject: [llvm-commits] [llvm] r53321 -
	/llvm/trunk/lib/Target/X86/X86Subtarget.cpp
Message-ID: <200807091329.m69DT98I019822@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:29:08 2008
New Revision: 53321

URL: http://llvm.org/viewvc/llvm-project?rev=53321&view=rev
Log:
Revert accidentially added stuff

Modified:
    llvm/trunk/lib/Target/X86/X86Subtarget.cpp

Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=53321&r1=53320&r2=53321&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Wed Jul  9 08:29:08 2008
@@ -47,8 +47,7 @@
       // Extra load is needed for all externally visible.
       if (isDirectCall)
         return false;
-      if (GV->hasInternalLinkage() ||
-          (GV->hasHiddenVisibility() && !GV->isDeclaration()))
+      if (GV->hasInternalLinkage() || GV->hasHiddenVisibility())
         return false;
       return true;
     } else if (isTargetCygMing() || isTargetWindows()) {




From asl at math.spbu.ru  Wed Jul  9 08:29:27 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:29:27 -0000
Subject: [llvm-commits] [llvm] r53322 -
	/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
Message-ID: <200807091329.m69DTRuC019846@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:29:27 2008
New Revision: 53322

URL: http://llvm.org/viewvc/llvm-project?rev=53322&view=rev
Log:
Typo

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53322&r1=53321&r2=53322&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:29:27 2008
@@ -320,7 +320,7 @@
   DataSection_ = getUnnamedSection("\t.data", SectionFlags::Writeable);
   BSSSection_  = getUnnamedSection("\t.bss",
                                    SectionFlags::Writeable | SectionFlags::BSS);
-  ReadOnlySection_ = getUnnamedSection("\t.rodata", SectionFlags::None);
+  ReadOnlySection_ = getNamedSection("\t.rodata", SectionFlags::None);
   TLSDataSection_ = getNamedSection("\t.tdata",
                                     SectionFlags::Writeable | SectionFlags::TLS);
   TLSBSSSection_ = getNamedSection("\t.tbss",




From asl at math.spbu.ru  Wed Jul  9 08:29:44 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:29:44 -0000
Subject: [llvm-commits] [llvm] r53323 -
	/llvm/trunk/lib/Target/TargetAsmInfo.cpp
Message-ID: <200807091329.m69DTi1t019863@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:29:44 2008
New Revision: 53323

URL: http://llvm.org/viewvc/llvm-project?rev=53323&view=rev
Log:
Use only 'subset' of flags

Modified:
    llvm/trunk/lib/Target/TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=53323&r1=53322&r2=53323&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Jul  9 08:29:44 2008
@@ -216,25 +216,17 @@
       Flags |= SectionFlags::Code;
       break;
      case SectionKind::ThreadData:
-      Flags |= SectionFlags::TLS;
-      // FALLS THROUGH
-     case SectionKind::Data:
-      Flags |= SectionFlags::Writeable;
-      break;
      case SectionKind::ThreadBSS:
       Flags |= SectionFlags::TLS;
       // FALLS THROUGH
+     case SectionKind::Data:
      case SectionKind::BSS:
-      Flags |= SectionFlags::BSS;
+      Flags |= SectionFlags::Writeable;
       break;
      case SectionKind::ROData:
-      // No additional flags here
-      break;
      case SectionKind::RODataMergeStr:
-      Flags |= SectionFlags::Strings;
-      // FALLS THROUGH
      case SectionKind::RODataMergeConst:
-      Flags |= SectionFlags::Mergeable;
+      // No additional flags here
       break;
      default:
       assert(0 && "Unexpected section kind!");




From asl at math.spbu.ru  Wed Jul  9 08:30:03 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:30:03 -0000
Subject: [llvm-commits] [llvm] r53324 -
	/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
Message-ID: <200807091330.m69DU3s6019890@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:30:02 2008
New Revision: 53324

URL: http://llvm.org/viewvc/llvm-project?rev=53324&view=rev
Log:
Add FIXME needed to be resolved later

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53324&r1=53323&r2=53324&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 08:30:02 2008
@@ -157,6 +157,7 @@
   }
   ReadOnlySection = "\t.const\n";
   ReadOnlySection_ = getUnnamedSection("\t.const\n", SectionFlags::None);
+  // FIXME: These should be named sections, really.
   TextCoalSection =
   getUnnamedSection(".section __TEXT,__textcoal_nt,coalesced,pure_instructions",
                     SectionFlags::Code);




From asl at math.spbu.ru  Wed Jul  9 08:41:07 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:41:07 -0000
Subject: [llvm-commits] [llvm] r53325 -
	/llvm/trunk/include/llvm/Target/TargetAsmInfo.h
Message-ID: <200807091341.m69Df80F020415@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:41:07 2008
New Revision: 53325

URL: http://llvm.org/viewvc/llvm-project?rev=53325&view=rev
Log:
Drop enum and use constants for SectionFlags

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53325&r1=53324&r2=53325&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:41:07 2008
@@ -45,22 +45,20 @@
   }
 
   namespace SectionFlags {
-    enum Flags {
-      Invalid    = -1UL,
-      None       = 0,
-      Code       = 1 << 0,    ///< Section contains code
-      Writeable  = 1 << 1,    ///< Section is writeable
-      BSS        = 1 << 2,    ///< Section contains only zeroes
-      Mergeable  = 1 << 3,    ///< Section contains mergeable data
-      Strings    = 1 << 4,    ///< Section contains null-terminated strings
-      TLS        = 1 << 5,    ///< Section contains thread-local data
-      Debug      = 1 << 6,    ///< Section contains debug data
-      Linkonce   = 1 << 7,    ///< Section is linkonce
-      TypeFlags  = 0xFF,
-      // Some gap for future flags
-      Named      = 1 << 23,    ///< Section is named
-      EntitySize = 0xFF << 24 ///< Entity size for mergeable sections
-    };
+    const unsigned Invalid    = -1UL;
+    const unsigned None       = 0;
+    const unsigned Code       = 1 << 0;  ///< Section contains code
+    const unsigned Writeable  = 1 << 1;  ///< Section is writeable
+    const unsigned BSS        = 1 << 2;  ///< Section contains only zeroes
+    const unsigned Mergeable  = 1 << 3;  ///< Section contains mergeable data
+    const unsigned Strings    = 1 << 4;  ///< Section contains C-type strings
+    const unsigned TLS        = 1 << 5;  ///< Section contains thread-local data
+    const unsigned Debug      = 1 << 6;  ///< Section contains debug data
+    const unsigned Linkonce   = 1 << 7;  ///< Section is linkonce
+    const unsigned TypeFlags  = 0xFF;
+    // Some gap for future flags
+    const unsigned Named      = 1 << 23; ///< Section is named
+    const unsigned EntitySize = 0xFF << 24; ///< Entity size for mergeable stuff
 
     static inline unsigned getEntitySize(unsigned Flags) {
       return (Flags >> 24) & 0xFF;




From asl at math.spbu.ru  Wed Jul  9 08:56:45 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 13:56:45 -0000
Subject: [llvm-commits] [llvm] r53326 -
	/llvm/trunk/include/llvm/Target/TargetAsmInfo.h
Message-ID: <200807091356.m69Dukxo020936@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 08:56:43 2008
New Revision: 53326

URL: http://llvm.org/viewvc/llvm-project?rev=53326&view=rev
Log:
Silence a warning

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmInfo.h

Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=53326&r1=53325&r2=53326&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Jul  9 08:56:43 2008
@@ -45,7 +45,7 @@
   }
 
   namespace SectionFlags {
-    const unsigned Invalid    = -1UL;
+    const unsigned Invalid    = -1U;
     const unsigned None       = 0;
     const unsigned Code       = 1 << 0;  ///< Section contains code
     const unsigned Writeable  = 1 << 1;  ///< Section is writeable




From asl at math.spbu.ru  Wed Jul  9 09:09:42 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 14:09:42 -0000
Subject: [llvm-commits] [llvm] r53327 -
 /llvm/trunk/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll
Message-ID: <200807091409.m69E9gNu021492@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 09:09:41 2008
New Revision: 53327

URL: http://llvm.org/viewvc/llvm-project?rev=53327&view=rev
Log:
Testcase for PR2024

Added:
    llvm/trunk/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll

Added: llvm/trunk/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll?rev=53327&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll Wed Jul  9 09:09:41 2008
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc | grep ax
+; PR2024
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+
+define i32 @foo(i32 %A, i32 %B) nounwind  section ".init.text" {
+entry:
+	tail call i32 @bar( i32 %A, i32 %B ) nounwind 		; <i32>:0 [#uses=1]
+	ret i32 %0
+}
+
+declare i32 @bar(i32, i32)




From criswell at cs.uiuc.edu  Wed Jul  9 11:06:41 2008
From: criswell at cs.uiuc.edu (John Criswell)
Date: Wed, 09 Jul 2008 11:06:41 -0500
Subject: [llvm-commits] [llvm] r53210 - in /llvm/trunk:
 include/llvm/ADT/alist.h include/llvm/ADT/alist_node.h
 include/llvm/ADT/ilist.h include/llvm/Support/Recycler.h
 include/llvm/Support/RecyclingAllocator.h
 include/llvm/SymbolTableListTraits.h lib/Support/Al...
In-Reply-To: <200807072258.m67MwFQk016076@zion.cs.uiuc.edu>
References: <200807072258.m67MwFQk016076@zion.cs.uiuc.edu>
Message-ID: <4874E211.3060602@cs.uiuc.edu>

Dear Dan,

I believe this patch broke the erase() method of class iplist.  I get 
the following error when I compile DSA:

/home/vadve/criswell/src/llvm22/include/llvm/ADT/ilist.h: In member 
function ?llvm::ilist_iterator<ValueSubClass> llvm::iplist<NodeTy, 
Traits>::erase(llvm::ilist_iterator<ValueSubClass>) [with NodeTy = 
llvm::DSNode, Traits = llvm::ilist_traits<llvm::DSNode>]?:
/home/vadve/criswell/src/llvm22/include/llvm/ADT/ilist.h:455:   
instantiated from ?llvm::ilist_iterator<ValueSubClass> 
llvm::iplist<NodeTy, Traits>::erase(llvm::ilist_iterator<ValueSubClass>, 
llvm::ilist_iterator<ValueSubClass>) [with NodeTy = llvm::DSNode, Traits 
= llvm::ilist_traits<llvm::DSNode>]?
/home/vadve/criswell/src/llvm22/include/llvm/ADT/ilist.h:459:   
instantiated from ?void llvm::iplist<NodeTy, Traits>::clear() [with 
NodeTy = llvm::DSNode, Traits = llvm::ilist_traits<llvm::DSNode>]?
/home/vadve/criswell/src/llvm22/include/llvm/ADT/ilist.h:281:   
instantiated from ?llvm::iplist<NodeTy, Traits>::~iplist() [with NodeTy 
= llvm::DSNode, Traits = llvm::ilist_traits<llvm::DSNode>]?
/home/vadve/criswell/src/llvm22/include/llvm/ADT/ilist.h:550:   
instantiated from here
/home/vadve/criswell/src/llvm22/include/llvm/ADT/ilist.h:383: error: 
?deleteNode? is not a member of ?llvm::ilist_traits<llvm::DSNode>?

Is this something you can fix?

-- John T.

Dan Gohman wrote:
> Author: djg
> Date: Mon Jul  7 17:58:06 2008
> New Revision: 53210
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53210&view=rev
> Log:
> Add some basic Pool-allocation infrastructure. This adds a Recycler class,
> for handling bookkeeping for deleted objects, as well as the alist class
> template, for keeping lists of objects allocated from Recyclers, and some
> related utilities.
>
> Added:
>     llvm/trunk/include/llvm/ADT/alist.h
>     llvm/trunk/include/llvm/ADT/alist_node.h
>     llvm/trunk/include/llvm/Support/Recycler.h
>     llvm/trunk/include/llvm/Support/RecyclingAllocator.h
> Modified:
>     llvm/trunk/include/llvm/ADT/ilist.h
>     llvm/trunk/include/llvm/SymbolTableListTraits.h
>     llvm/trunk/lib/Support/Allocator.cpp
>
> Added: llvm/trunk/include/llvm/ADT/alist.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/alist.h?rev=53210&view=auto
>
>   



From gohman at apple.com  Wed Jul  9 12:30:43 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 9 Jul 2008 10:30:43 -0700
Subject: [llvm-commits] [llvm] r53210 - in /llvm/trunk:
	include/llvm/ADT/alist.h include/llvm/ADT/alist_node.h
	include/llvm/ADT/ilist.h include/llvm/Support/Recycler.h
	include/llvm/Support/RecyclingAllocator.h
	include/llvm/SymbolTableListTraits.h lib/Support/Al...
In-Reply-To: <4874E211.3060602@cs.uiuc.edu>
References: <200807072258.m67MwFQk016076@zion.cs.uiuc.edu>
	<4874E211.3060602@cs.uiuc.edu>
Message-ID: <65AF67F2-1839-4915-8C16-F71F00FA4225@apple.com>

Hi John,

I added a new member function, deleteNode, to the ilist_traits concept,
to allow traits classes to use custom deallocation strategies.

Your ilist_traits<llvm::DSNode> presumably doesn't need special delete
behavior, so adding this:

     static void deleteNode(llvm::DSNode *V) { delete V; }

to the definition of ilist_traits<llvm::DSNode> should be sufficient.

Dan

On Jul 9, 2008, at 9:06 AM, John Criswell wrote:

> Dear Dan,
>
> I believe this patch broke the erase() method of class iplist.  I get
> the following error when I compile DSA:
>
> /home/vadve/criswell/src/llvm22/include/llvm/ADT/ilist.h: In member
> function ?llvm::ilist_iterator<ValueSubClass> llvm::iplist<NodeTy,
> Traits>::erase(llvm::ilist_iterator<ValueSubClass>) [with NodeTy =
> llvm::DSNode, Traits = llvm::ilist_traits<llvm::DSNode>]?:
> /home/vadve/criswell/src/llvm22/include/llvm/ADT/ilist.h:455:
> instantiated from ?llvm::ilist_iterator<ValueSubClass>
> llvm::iplist<NodeTy,  
> Traits>::erase(llvm::ilist_iterator<ValueSubClass>,
> llvm::ilist_iterator<ValueSubClass>) [with NodeTy = llvm::DSNode,  
> Traits
> = llvm::ilist_traits<llvm::DSNode>]?
> /home/vadve/criswell/src/llvm22/include/llvm/ADT/ilist.h:459:
> instantiated from ?void llvm::iplist<NodeTy, Traits>::clear() [with
> NodeTy = llvm::DSNode, Traits = llvm::ilist_traits<llvm::DSNode>]?
> /home/vadve/criswell/src/llvm22/include/llvm/ADT/ilist.h:281:
> instantiated from ?llvm::iplist<NodeTy, Traits>::~iplist() [with  
> NodeTy
> = llvm::DSNode, Traits = llvm::ilist_traits<llvm::DSNode>]?
> /home/vadve/criswell/src/llvm22/include/llvm/ADT/ilist.h:550:
> instantiated from here
> /home/vadve/criswell/src/llvm22/include/llvm/ADT/ilist.h:383: error:
> ?deleteNode? is not a member of ?llvm::ilist_traits<llvm::DSNode>?
>
> Is this something you can fix?
>
> -- John T.
>
> Dan Gohman wrote:
>> Author: djg
>> Date: Mon Jul  7 17:58:06 2008
>> New Revision: 53210
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=53210&view=rev
>> Log:
>> Add some basic Pool-allocation infrastructure. This adds a Recycler  
>> class,
>> for handling bookkeeping for deleted objects, as well as the alist  
>> class
>> template, for keeping lists of objects allocated from Recyclers,  
>> and some
>> related utilities.
>>
>> Added:
>>    llvm/trunk/include/llvm/ADT/alist.h
>>    llvm/trunk/include/llvm/ADT/alist_node.h
>>    llvm/trunk/include/llvm/Support/Recycler.h
>>    llvm/trunk/include/llvm/Support/RecyclingAllocator.h
>> Modified:
>>    llvm/trunk/include/llvm/ADT/ilist.h
>>    llvm/trunk/include/llvm/SymbolTableListTraits.h
>>    llvm/trunk/lib/Support/Allocator.cpp
>>
>> Added: llvm/trunk/include/llvm/ADT/alist.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/alist.h?rev=53210&view=auto
>>
>>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits




From criswell at uiuc.edu  Wed Jul  9 12:50:54 2008
From: criswell at uiuc.edu (John Criswell)
Date: Wed, 09 Jul 2008 17:50:54 -0000
Subject: [llvm-commits] [poolalloc] r53330 -
	/poolalloc/trunk/lib/DSA/Printer.cpp
Message-ID: <200807091750.m69HotI5030077@zion.cs.uiuc.edu>

Author: criswell
Date: Wed Jul  9 12:50:53 2008
New Revision: 53330

URL: http://llvm.org/viewvc/llvm-project?rev=53330&view=rev
Log:
Added DEBUG_TYPE() macro so that we can use STATISTIC.

Modified:
    poolalloc/trunk/lib/DSA/Printer.cpp

Modified: poolalloc/trunk/lib/DSA/Printer.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Printer.cpp?rev=53330&r1=53329&r2=53330&view=diff

==============================================================================
--- poolalloc/trunk/lib/DSA/Printer.cpp (original)
+++ poolalloc/trunk/lib/DSA/Printer.cpp Wed Jul  9 12:50:53 2008
@@ -11,6 +11,8 @@
 //
 //===----------------------------------------------------------------------===//
 
+#define DEBUG_TYPE "dsgraph-printer"
+
 #include "dsa/DataStructure.h"
 #include "dsa/DSGraph.h"
 #include "dsa/DSGraphTraits.h"




From criswell at cs.uiuc.edu  Wed Jul  9 12:51:28 2008
From: criswell at cs.uiuc.edu (John Criswell)
Date: Wed, 09 Jul 2008 12:51:28 -0500
Subject: [llvm-commits] [llvm] r53210 - in
 /llvm/trunk:	include/llvm/ADT/alist.h
 include/llvm/ADT/alist_node.h	include/llvm/ADT/ilist.h
 include/llvm/Support/Recycler.h
 include/llvm/Support/RecyclingAllocator.h	include/llvm/SymbolTableListTraits.h
 lib/Suppor...
In-Reply-To: <65AF67F2-1839-4915-8C16-F71F00FA4225@apple.com>
References: <200807072258.m67MwFQk016076@zion.cs.uiuc.edu>	<4874E211.3060602@cs.uiuc.edu>
	<65AF67F2-1839-4915-8C16-F71F00FA4225@apple.com>
Message-ID: <4874FAA0.2050802@cs.uiuc.edu>

Dan Gohman wrote:
> Hi John,
>
> I added a new member function, deleteNode, to the ilist_traits concept,
> to allow traits classes to use custom deallocation strategies.
>
> Your ilist_traits<llvm::DSNode> presumably doesn't need special delete
> behavior, so adding this:
>
>      static void deleteNode(llvm::DSNode *V) { delete V; }
>
> to the definition of ilist_traits<llvm::DSNode> should be sufficient.
>   
That did it.

Thanks!

-- John T.



From criswell at uiuc.edu  Wed Jul  9 12:52:19 2008
From: criswell at uiuc.edu (John Criswell)
Date: Wed, 09 Jul 2008 17:52:19 -0000
Subject: [llvm-commits] [poolalloc] r53331 -
	/poolalloc/trunk/include/dsa/DSNode.h
Message-ID: <200807091752.m69HqJ8O030124@zion.cs.uiuc.edu>

Author: criswell
Date: Wed Jul  9 12:52:19 2008
New Revision: 53331

URL: http://llvm.org/viewvc/llvm-project?rev=53331&view=rev
Log:
Added a deleteNode() method to ilist_traits<llvm::DSNode> to fix compilation.

Modified:
    poolalloc/trunk/include/dsa/DSNode.h

Modified: poolalloc/trunk/include/dsa/DSNode.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DSNode.h?rev=53331&r1=53330&r2=53331&view=diff

==============================================================================
--- poolalloc/trunk/include/dsa/DSNode.h (original)
+++ poolalloc/trunk/include/dsa/DSNode.h Wed Jul  9 12:52:19 2008
@@ -419,6 +419,7 @@
   static DSNode *getPrev(const DSNode *N) { return N->Prev; }
   static DSNode *getNext(const DSNode *N) { return N->Next; }
 
+  static void deleteNode(llvm::DSNode *V) { delete V; }
   static void setPrev(DSNode *N, DSNode *Prev) { N->Prev = Prev; }
   static void setNext(DSNode *N, DSNode *Next) { N->Next = Next; }
 




From gohman at apple.com  Wed Jul  9 13:08:51 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 09 Jul 2008 18:08:51 -0000
Subject: [llvm-commits] [llvm] r53333 -
	/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
Message-ID: <200807091808.m69I8pHI030783@zion.cs.uiuc.edu>

Author: djg
Date: Wed Jul  9 13:08:48 2008
New Revision: 53333

URL: http://llvm.org/viewvc/llvm-project?rev=53333&view=rev
Log:
Remove #include <iostream>.

Modified:
    llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=53333&r1=53332&r2=53333&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Jul  9 13:08:48 2008
@@ -32,8 +32,6 @@
 #include "llvm/Target/TargetOptions.h"
 using namespace llvm;
 
-#include <iostream>
-
 STATISTIC(EmittedInsts, "Number of machine instrs printed");
 
 static std::string getPICLabelString(unsigned FnNum,




From kremenek at apple.com  Wed Jul  9 13:12:49 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Wed, 09 Jul 2008 18:12:49 -0000
Subject: [llvm-commits] [llvm] r53336 - /llvm/tags/checker/checker-59/
Message-ID: <200807091812.m69ICnxe031074@zion.cs.uiuc.edu>

Author: kremenek
Date: Wed Jul  9 13:12:48 2008
New Revision: 53336

URL: http://llvm.org/viewvc/llvm-project?rev=53336&view=rev
Log:
Tagging checker-59.

Added:
    llvm/tags/checker/checker-59/
      - copied from r53335, llvm/trunk/



From dalej at apple.com  Wed Jul  9 13:24:48 2008
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 09 Jul 2008 18:24:48 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53338 -
	/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Message-ID: <200807091824.m69IOnwb031835@zion.cs.uiuc.edu>

Author: johannes
Date: Wed Jul  9 13:24:45 2008
New Revision: 53338

URL: http://llvm.org/viewvc/llvm-project?rev=53338&view=rev
Log:
Revert 50317, which fixes PR 2533.  This does not
cause any regressions in the compat or struct-layout-1
parts of the gcc testsuite on darwin x86-(32|64).


Modified:
    llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp

Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=53338&r1=53337&r2=53338&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Wed Jul  9 13:24:45 2008
@@ -6619,7 +6619,6 @@
 
 Constant *TreeConstantToLLVM::ConvertRecordCONSTRUCTOR(tree exp) {
   const StructType *STy = cast<StructType>(ConvertType(TREE_TYPE(exp)));
-  bool OneEltIsUnion = false;
   std::vector<Constant*> ResultElts;
   ResultElts.resize(STy->getNumElements());
 
@@ -6639,9 +6638,6 @@
       }
     }
 
-   if (TREE_CODE(TREE_TYPE(elt_value)) == UNION_TYPE)
-     OneEltIsUnion = true;
-   
     // Decode the field's value.
     Constant *Val = Convert(elt_value);
    
@@ -6682,29 +6678,9 @@
   }
   
   // Fill in null elements with zeros.
-  unsigned InitSize = 0;
   for (unsigned i = 0, e = ResultElts.size(); i != e; ++i) {
     if (ResultElts[i] == 0)
       ResultElts[i] = Constant::getNullValue(STy->getElementType(i));
-    InitSize += getTargetData().getABITypeSize(ResultElts[i]->getType());
-  }
-
-  // If the struct has a fixed size, and if one the union value we converted isn't 
-  // large enough to fill all the bits, add a zero initialized array at the end to pad
-  // it out.
-  tree StructType = TREE_TYPE(exp);
-  if (OneEltIsUnion && 
-      TYPE_SIZE(StructType) && TREE_CODE(TYPE_SIZE(StructType)) == INTEGER_CST) {
-    unsigned StructSize = ((unsigned)TREE_INT_CST_LOW(TYPE_SIZE(TREE_TYPE(exp)))+7)/8;
-    if (StructSize != InitSize) {
-      const Type *FillTy;
-      assert(StructSize > InitSize && "Init shouldn't be larger than struct!");
-      if (StructSize - InitSize == 1)
-        FillTy = Type::Int8Ty;
-      else
-        FillTy = ArrayType::get(Type::Int8Ty, StructSize - InitSize);
-      ResultElts.push_back(Constant::getNullValue(FillTy));
-    }
   }
 
   return ConstantStruct::get(ResultElts, STy->isPacked());




From asl at math.spbu.ru  Wed Jul  9 14:06:10 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 19:06:10 -0000
Subject: [llvm-commits] [llvm] r53340 -
	/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
Message-ID: <200807091906.m69J6CeY000927@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 14:06:02 2008
New Revision: 53340

URL: http://llvm.org/viewvc/llvm-project?rev=53340&view=rev
Log:
Weak stuff always goes to coalesced sections on Darwin

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53340&r1=53339&r2=53340&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 14:06:02 2008
@@ -263,9 +263,13 @@
    case SectionKind::ROData:
     return (isWeak ? ConstDataCoalSection : getReadOnlySection_());
    case SectionKind::RODataMergeStr:
-    return MergeableStringSection(cast<GlobalVariable>(GV));
+    return (isWeak ?
+            ConstDataCoalSection :
+            MergeableStringSection(cast<GlobalVariable>(GV)));
    case SectionKind::RODataMergeConst:
-    return MergeableConstSection(cast<GlobalVariable>(GV));
+    return (isWeak ?
+            ConstDataCoalSection:
+            MergeableConstSection(cast<GlobalVariable>(GV)));
    default:
     assert(0 && "Unsuported section kind for global");
   }




From isanbard at gmail.com  Wed Jul  9 14:40:28 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 09 Jul 2008 19:40:28 -0000
Subject: [llvm-commits] [llvm] r53341 - /llvm/branches/Apple/Gaz/
Message-ID: <200807091940.m69JeSYW002118@zion.cs.uiuc.edu>

Author: void
Date: Wed Jul  9 14:40:27 2008
New Revision: 53341

URL: http://llvm.org/viewvc/llvm-project?rev=53341&view=rev
Log:
Creating Gaz branch at r53289.

Added:
    llvm/branches/Apple/Gaz/
      - copied from r53289, llvm/trunk/



From isanbard at gmail.com  Wed Jul  9 14:41:33 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 09 Jul 2008 19:41:33 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53342 -
	/llvm-gcc-4.2/branches/Apple/Gaz/
Message-ID: <200807091941.m69JfXdT002161@zion.cs.uiuc.edu>

Author: void
Date: Wed Jul  9 14:41:33 2008
New Revision: 53342

URL: http://llvm.org/viewvc/llvm-project?rev=53342&view=rev
Log:
Creating Gaz branch at r53289.

Added:
    llvm-gcc-4.2/branches/Apple/Gaz/
      - copied from r53289, llvm-gcc-4.2/trunk/



From dalej at apple.com  Wed Jul  9 14:42:59 2008
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 9 Jul 2008 12:42:59 -0700
Subject: [llvm-commits] [llvm] r53341 - /llvm/branches/Apple/Gaz/
In-Reply-To: <200807091940.m69JeSYW002118@zion.cs.uiuc.edu>
References: <200807091940.m69JeSYW002118@zion.cs.uiuc.edu>
Message-ID: <6609196A-8E7E-43D4-BEC3-C3BE89429277@apple.com>

The patch I committed this morning, 53338, should go in.  Are you
going to be handling that?

On Jul 9, 2008, at 12:40 PMPDT, Bill Wendling wrote:

> Author: void
> Date: Wed Jul  9 14:40:27 2008
> New Revision: 53341
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53341&view=rev
> Log:
> Creating Gaz branch at r53289.
>
> Added:
>    llvm/branches/Apple/Gaz/
>      - copied from r53289, llvm/trunk/
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From isanbard at gmail.com  Wed Jul  9 14:49:58 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 9 Jul 2008 12:49:58 -0700
Subject: [llvm-commits] [llvm] r53341 - /llvm/branches/Apple/Gaz/
In-Reply-To: <6609196A-8E7E-43D4-BEC3-C3BE89429277@apple.com>
References: <200807091940.m69JeSYW002118@zion.cs.uiuc.edu>
	<6609196A-8E7E-43D4-BEC3-C3BE89429277@apple.com>
Message-ID: <16e5fdf90807091249t23034797p6e9a358a7ec70626@mail.gmail.com>

Yes. Thanks. :-)

-bw

On Wed, Jul 9, 2008 at 12:42 PM, Dale Johannesen <dalej at apple.com> wrote:
> The patch I committed this morning, 53338, should go in.  Are you
> going to be handling that?
>
> On Jul 9, 2008, at 12:40 PMPDT, Bill Wendling wrote:
>
>> Author: void
>> Date: Wed Jul  9 14:40:27 2008
>> New Revision: 53341
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=53341&view=rev
>> Log:
>> Creating Gaz branch at r53289.
>>
>> Added:
>>    llvm/branches/Apple/Gaz/
>>      - copied from r53289, llvm/trunk/
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>


From gohman at apple.com  Wed Jul  9 14:51:01 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 09 Jul 2008 19:51:01 -0000
Subject: [llvm-commits] [llvm] r53344 - in /llvm/trunk/lib/CodeGen:
 RegAllocLocal.cpp RegAllocSimple.cpp
Message-ID: <200807091951.m69Jp1re002518@zion.cs.uiuc.edu>

Author: djg
Date: Wed Jul  9 14:51:00 2008
New Revision: 53344

URL: http://llvm.org/viewvc/llvm-project?rev=53344&view=rev
Log:
Use find with std::map, when that's what's needed, instead of lower_bound
with extra checks.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
    llvm/trunk/lib/CodeGen/RegAllocSimple.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53344&r1=53343&r2=53344&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Wed Jul  9 14:51:00 2008
@@ -250,9 +250,9 @@
 /// to be held on the stack.
 int RALocal::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
   // Find the location Reg would belong...
-  std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
+  std::map<unsigned, int>::iterator I = StackSlotForVirtReg.find(VirtReg);
 
-  if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
+  if (I != StackSlotForVirtReg.end())
     return I->second;          // Already has space allocated?
 
   // Allocate a new stack object for this spill location...

Modified: llvm/trunk/lib/CodeGen/RegAllocSimple.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocSimple.cpp?rev=53344&r1=53343&r2=53344&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocSimple.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocSimple.cpp Wed Jul  9 14:51:00 2008
@@ -103,10 +103,9 @@
 int RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
                                      const TargetRegisterClass *RC) {
   // Find the location VirtReg would belong...
-  std::map<unsigned, int>::iterator I =
-    StackSlotForVirtReg.lower_bound(VirtReg);
+  std::map<unsigned, int>::iterator I = StackSlotForVirtReg.find(VirtReg);
 
-  if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
+  if (I != StackSlotForVirtReg.end())
     return I->second;          // Already has space allocated?
 
   // Allocate a new stack object for this spill location...




From isanbard at gmail.com  Wed Jul  9 14:54:24 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 09 Jul 2008 19:54:24 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53345 -
	/llvm-gcc-4.2/branches/Apple/Gaz/gcc/llvm-convert.cpp
Message-ID: <200807091954.m69JsOtQ002615@zion.cs.uiuc.edu>

Author: void
Date: Wed Jul  9 14:54:24 2008
New Revision: 53345

URL: http://llvm.org/viewvc/llvm-project?rev=53345&view=rev
Log:
Merging r53338 from mainline into Gaz

Modified:
    llvm-gcc-4.2/branches/Apple/Gaz/gcc/llvm-convert.cpp

Modified: llvm-gcc-4.2/branches/Apple/Gaz/gcc/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/branches/Apple/Gaz/gcc/llvm-convert.cpp?rev=53345&r1=53344&r2=53345&view=diff

==============================================================================
--- llvm-gcc-4.2/branches/Apple/Gaz/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/branches/Apple/Gaz/gcc/llvm-convert.cpp Wed Jul  9 14:54:24 2008
@@ -6619,7 +6619,6 @@
 
 Constant *TreeConstantToLLVM::ConvertRecordCONSTRUCTOR(tree exp) {
   const StructType *STy = cast<StructType>(ConvertType(TREE_TYPE(exp)));
-  bool OneEltIsUnion = false;
   std::vector<Constant*> ResultElts;
   ResultElts.resize(STy->getNumElements());
 
@@ -6639,9 +6638,6 @@
       }
     }
 
-   if (TREE_CODE(TREE_TYPE(elt_value)) == UNION_TYPE)
-     OneEltIsUnion = true;
-   
     // Decode the field's value.
     Constant *Val = Convert(elt_value);
    
@@ -6682,29 +6678,9 @@
   }
   
   // Fill in null elements with zeros.
-  unsigned InitSize = 0;
   for (unsigned i = 0, e = ResultElts.size(); i != e; ++i) {
     if (ResultElts[i] == 0)
       ResultElts[i] = Constant::getNullValue(STy->getElementType(i));
-    InitSize += getTargetData().getABITypeSize(ResultElts[i]->getType());
-  }
-
-  // If the struct has a fixed size, and if one the union value we converted isn't 
-  // large enough to fill all the bits, add a zero initialized array at the end to pad
-  // it out.
-  tree StructType = TREE_TYPE(exp);
-  if (OneEltIsUnion && 
-      TYPE_SIZE(StructType) && TREE_CODE(TYPE_SIZE(StructType)) == INTEGER_CST) {
-    unsigned StructSize = ((unsigned)TREE_INT_CST_LOW(TYPE_SIZE(TREE_TYPE(exp)))+7)/8;
-    if (StructSize != InitSize) {
-      const Type *FillTy;
-      assert(StructSize > InitSize && "Init shouldn't be larger than struct!");
-      if (StructSize - InitSize == 1)
-        FillTy = Type::Int8Ty;
-      else
-        FillTy = ArrayType::get(Type::Int8Ty, StructSize - InitSize);
-      ResultElts.push_back(Constant::getNullValue(FillTy));
-    }
   }
 
   return ConstantStruct::get(ResultElts, STy->isPacked());




From gohman at apple.com  Wed Jul  9 14:55:19 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 09 Jul 2008 19:55:19 -0000
Subject: [llvm-commits] [llvm] r53346 -
	/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
Message-ID: <200807091955.m69JtJB9002652@zion.cs.uiuc.edu>

Author: djg
Date: Wed Jul  9 14:55:19 2008
New Revision: 53346

URL: http://llvm.org/viewvc/llvm-project?rev=53346&view=rev
Log:
RegAllocLocal has a TargetInstrInfo data member. Use it instead
of having local variables duplicate it.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53346&r1=53345&r2=53346&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Wed Jul  9 14:55:19 2008
@@ -291,8 +291,6 @@
   DOUT << "  Spilling register " << TRI->getName(PhysReg)
        << " containing %reg" << VirtReg;
   
-  const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
-  
   if (!isVirtRegModified(VirtReg)) {
     DOUT << " which has not been modified, so no store necessary!";
     std::pair<MachineInstr*, unsigned> &LastUse = getVirtRegLastUse(VirtReg);
@@ -507,7 +505,6 @@
        << TRI->getName(PhysReg) << "\n";
 
   // Add move instruction(s)
-  const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
   TII->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
   ++NumLoads;    // Update statistics
 
@@ -564,7 +561,6 @@
 void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
   // loop over each instruction
   MachineBasicBlock::iterator MII = MBB.begin();
-  const TargetInstrInfo &TII = *TM->getInstrInfo();
   
   DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
         if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
@@ -882,7 +878,7 @@
     
     // Finally, if this is a noop copy instruction, zap it.
     unsigned SrcReg, DstReg;
-    if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg)
+    if (TII->isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg)
       MBB.erase(MI);
   }
 




From gohman at apple.com  Wed Jul  9 14:56:01 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 09 Jul 2008 19:56:01 -0000
Subject: [llvm-commits] [llvm] r53347 -
	/llvm/trunk/lib/CodeGen/RegAllocSimple.cpp
Message-ID: <200807091956.m69Ju1Nw002688@zion.cs.uiuc.edu>

Author: djg
Date: Wed Jul  9 14:56:01 2008
New Revision: 53347

URL: http://llvm.org/viewvc/llvm-project?rev=53347&view=rev
Log:
Give RegAllocSimple a TargetInstrInfo member to keep it consistent
with RegAllocLocal.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocSimple.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocSimple.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocSimple.cpp?rev=53347&r1=53346&r2=53347&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocSimple.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocSimple.cpp Wed Jul  9 14:56:01 2008
@@ -46,6 +46,7 @@
     MachineFunction *MF;
     const TargetMachine *TM;
     const TargetRegisterInfo *TRI;
+    const TargetInstrInfo *TII;
 
     // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
     // these values are spilled
@@ -144,7 +145,6 @@
 
   // Add move instruction(s)
   ++NumLoads;
-  const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
   TII->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
   return PhysReg;
 }
@@ -153,7 +153,6 @@
                                   MachineBasicBlock::iterator I,
                                   unsigned VirtReg, unsigned PhysReg) {
   const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(VirtReg);
-  const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
   
   int FrameIdx = getStackSpaceFor(VirtReg, RC);
 
@@ -240,6 +239,7 @@
   MF = &Fn;
   TM = &MF->getTarget();
   TRI = TM->getRegisterInfo();
+  TII = TM->getInstrInfo();
 
   // Loop over all of the basic blocks, eliminating virtual register references
   for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();




From isanbard at gmail.com  Wed Jul  9 14:56:37 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 09 Jul 2008 19:56:37 -0000
Subject: [llvm-commits] [llvm] r53348 - /llvm/tags/Apple/llvmCore-2053/
Message-ID: <200807091956.m69JubL1002713@zion.cs.uiuc.edu>

Author: void
Date: Wed Jul  9 14:56:36 2008
New Revision: 53348

URL: http://llvm.org/viewvc/llvm-project?rev=53348&view=rev
Log:
Creating llvmCore-2053 from Gaz branch

Added:
    llvm/tags/Apple/llvmCore-2053/
      - copied from r53347, llvm/branches/Apple/Gaz/



From isanbard at gmail.com  Wed Jul  9 14:57:06 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 09 Jul 2008 19:57:06 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53349 -
	/llvm-gcc-4.2/tags/Apple/llvmgcc42-2053/
Message-ID: <200807091957.m69Jv6oW002735@zion.cs.uiuc.edu>

Author: void
Date: Wed Jul  9 14:57:06 2008
New Revision: 53349

URL: http://llvm.org/viewvc/llvm-project?rev=53349&view=rev
Log:
Creating llvmgcc42-2053 from Gaz branch

Added:
    llvm-gcc-4.2/tags/Apple/llvmgcc42-2053/
      - copied from r53348, llvm-gcc-4.2/branches/Apple/Gaz/



From asl at math.spbu.ru  Wed Jul  9 15:01:43 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 20:01:43 -0000
Subject: [llvm-commits] [llvm] r53350 -
	/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
Message-ID: <200807092001.m69K1hrg002882@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 15:01:42 2008
New Revision: 53350

URL: http://llvm.org/viewvc/llvm-project?rev=53350&view=rev
Log:
Distinguish .const and .const_data on Darwin, when needed. This is somehow crazy :)

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53350&r1=53349&r2=53350&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 15:01:42 2008
@@ -245,6 +245,7 @@
 X86DarwinTargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const {
   SectionKind::Kind Kind = SectionKindForGlobal(GV);
   bool isWeak = GV->isWeakForLinker();
+  bool isNonStatic = (X86TM->getRelocationModel() != Reloc::Static);
 
   switch (Kind) {
    case SectionKind::Text:
@@ -261,7 +262,8 @@
     else
       return (isWeak ? DataCoalSection : getDataSection_());
    case SectionKind::ROData:
-    return (isWeak ? ConstDataCoalSection : getReadOnlySection_());
+    return (isWeak ? ConstDataCoalSection :
+            (isNonStatic ? ConstDataSection : getReadOnlySection_()));
    case SectionKind::RODataMergeStr:
     return (isWeak ?
             ConstDataCoalSection :




From gohman at apple.com  Wed Jul  9 15:12:34 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 09 Jul 2008 20:12:34 -0000
Subject: [llvm-commits] [llvm] r53351 - in /llvm/trunk/lib/CodeGen:
 RegAllocLocal.cpp RegAllocSimple.cpp
Message-ID: <200807092012.m69KCa9b003237@zion.cs.uiuc.edu>

Author: djg
Date: Wed Jul  9 15:12:26 2008
New Revision: 53351

URL: http://llvm.org/viewvc/llvm-project?rev=53351&view=rev
Log:
Reuse the MO variable instead of recomputing it in RegAllocLocal.
Keep RegAllocSimple in sync.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
    llvm/trunk/lib/CodeGen/RegAllocSimple.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53351&r1=53350&r2=53351&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Wed Jul  9 15:12:26 2008
@@ -839,7 +839,7 @@
         getVirtRegLastUse(DestVirtReg) = std::make_pair((MachineInstr*)0, 0);
         DOUT << "  Assigning " << TRI->getName(DestPhysReg)
              << " to %reg" << DestVirtReg << "\n";
-        MI->getOperand(i).setReg(DestPhysReg);  // Assign the output register
+        MO.setReg(DestPhysReg);  // Assign the output register
       }
     }
 

Modified: llvm/trunk/lib/CodeGen/RegAllocSimple.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocSimple.cpp?rev=53351&r1=53350&r2=53351&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocSimple.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocSimple.cpp Wed Jul  9 15:12:26 2008
@@ -188,12 +188,12 @@
 
     // Loop over uses, move from memory into registers.
     for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
-      MachineOperand &op = MI->getOperand(i);
+      MachineOperand &MO = MI->getOperand(i);
 
-      if (op.isRegister() && op.getReg() &&
-          TargetRegisterInfo::isVirtualRegister(op.getReg())) {
-        unsigned virtualReg = (unsigned) op.getReg();
-        DOUT << "op: " << op << "\n";
+      if (MO.isRegister() && MO.getReg() &&
+          TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
+        unsigned virtualReg = (unsigned) MO.getReg();
+        DOUT << "op: " << MO << "\n";
         DOUT << "\t inst[" << i << "]: ";
         DEBUG(MI->print(*cerr.stream(), TM));
 
@@ -201,7 +201,7 @@
         // register in any given instruction
         unsigned physReg = Virt2PhysRegMap[virtualReg];
         if (physReg == 0) {
-          if (op.isDef()) {
+          if (MO.isDef()) {
             int TiedOp = Desc.findTiedToSrcOperand(i);
             if (TiedOp == -1) {
               physReg = getFreeReg(virtualReg);
@@ -222,8 +222,8 @@
             Virt2PhysRegMap[virtualReg] = physReg;
           }
         }
-        MI->getOperand(i).setReg(physReg);
-        DOUT << "virt: " << virtualReg << ", phys: " << op.getReg() << "\n";
+        MO.setReg(physReg);
+        DOUT << "virt: " << virtualReg << ", phys: " << MO.getReg() << "\n";
       }
     }
     RegClassIdx.clear();




From resistor at mac.com  Wed Jul  9 15:14:53 2008
From: resistor at mac.com (Owen Anderson)
Date: Wed, 09 Jul 2008 20:14:53 -0000
Subject: [llvm-commits] [llvm] r53352 -
	/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
Message-ID: <200807092014.m69KErVO003303@zion.cs.uiuc.edu>

Author: resistor
Date: Wed Jul  9 15:14:53 2008
New Revision: 53352

URL: http://llvm.org/viewvc/llvm-project?rev=53352&view=rev
Log:
Factor local liveness computation out into its own function.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53352&r1=53351&r2=53352&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Wed Jul  9 15:14:53 2008
@@ -239,6 +239,9 @@
     MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
                                 unsigned OpNum);
 
+    /// ComputeLocalLiveness - Computes liveness of registers within a basic
+    /// block, setting the killed/dead flags as appropriate.
+    void ComputeLocalLiveness(MachineBasicBlock& MBB);
 
     void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
                        unsigned PhysReg);
@@ -558,34 +561,9 @@
   return false;
 }
 
-void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
-  // loop over each instruction
-  MachineBasicBlock::iterator MII = MBB.begin();
-  
-  DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
-        if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
-
-  // If this is the first basic block in the machine function, add live-in
-  // registers as active.
-  if (&MBB == &*MF->begin() || MBB.isLandingPad()) {
-    for (MachineBasicBlock::livein_iterator I = MBB.livein_begin(),
-         E = MBB.livein_end(); I != E; ++I) {
-      unsigned Reg = *I;
-      MF->getRegInfo().setPhysRegUsed(Reg);
-      PhysRegsUsed[Reg] = 0;            // It is free and reserved now
-      AddToPhysRegsUseOrder(Reg); 
-      for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
-           *AliasSet; ++AliasSet) {
-        if (PhysRegsUsed[*AliasSet] != -2) {
-          AddToPhysRegsUseOrder(*AliasSet); 
-          PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
-          MF->getRegInfo().setPhysRegUsed(*AliasSet);
-        }
-      }
-    }    
-  }
-  
-  
+/// ComputeLocalLiveness - Computes liveness of registers within a basic
+/// block, setting the killed/dead flags as appropriate.
+void RALocal::ComputeLocalLiveness(MachineBasicBlock& MBB) {
   MachineRegisterInfo& MRI = MBB.getParent()->getRegInfo();
   // Keep track of the most recently seen previous use or def of each reg, 
   // so that we can update them with dead/kill markers.
@@ -675,6 +653,36 @@
         MO.setIsDead(true);
     }
   }
+}
+
+void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
+  // loop over each instruction
+  MachineBasicBlock::iterator MII = MBB.begin();
+  
+  DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
+        if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
+
+  // If this is the first basic block in the machine function, add live-in
+  // registers as active.
+  if (&MBB == &*MF->begin() || MBB.isLandingPad()) {
+    for (MachineBasicBlock::livein_iterator I = MBB.livein_begin(),
+         E = MBB.livein_end(); I != E; ++I) {
+      unsigned Reg = *I;
+      MF->getRegInfo().setPhysRegUsed(Reg);
+      PhysRegsUsed[Reg] = 0;            // It is free and reserved now
+      AddToPhysRegsUseOrder(Reg); 
+      for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
+           *AliasSet; ++AliasSet) {
+        if (PhysRegsUsed[*AliasSet] != -2) {
+          AddToPhysRegsUseOrder(*AliasSet); 
+          PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
+          MF->getRegInfo().setPhysRegUsed(*AliasSet);
+        }
+      }
+    }    
+  }
+  
+  ComputeLocalLiveness(MBB);
   
   // Otherwise, sequentially allocate each instruction in the MBB.
   while (MII != MBB.end()) {




From dalej at apple.com  Wed Jul  9 15:43:40 2008
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 09 Jul 2008 20:43:40 -0000
Subject: [llvm-commits] [llvm] r53353 -
	/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
Message-ID: <200807092043.m69KheQN005010@zion.cs.uiuc.edu>

Author: johannes
Date: Wed Jul  9 15:43:39 2008
New Revision: 53353

URL: http://llvm.org/viewvc/llvm-project?rev=53353&view=rev
Log:
Emit debug info for data-only files.  This version
applies to ppc Darwin only.


Modified:
    llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=53353&r1=53352&r2=53353&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed Jul  9 15:43:39 2008
@@ -790,9 +790,6 @@
 /// method to print assembly for each instruction.
 ///
 bool DarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
-  // We need this for Personality functions.
-  MMI = &getAnalysis<MachineModuleInfo>();
-  DW.SetModuleInfo(MMI);
 
   SetupMachineFunction(MF);
   O << "\n\n";
@@ -887,6 +884,15 @@
      
   bool Result = AsmPrinter::doInitialization(M);
   
+  // Emit initial debug information.
+  DW.BeginModule(&M);
+
+  // We need this for Personality functions.
+  // AsmPrinter::doInitialization should have done this analysis.
+  MMI = getAnalysisToUpdate<MachineModuleInfo>();
+  assert(MMI);
+  DW.SetModuleInfo(MMI);
+
   // Darwin wants symbols to be quoted if they have complex names.
   Mang->setUseQuotes(true);
   
@@ -903,8 +909,6 @@
   }
   SwitchToTextSection(TAI->getTextSection());
   
-  // Emit initial debug information.
-  DW.BeginModule(&M);
   return Result;
 }
 




From asl at math.spbu.ru  Wed Jul  9 15:47:55 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 20:47:55 -0000
Subject: [llvm-commits] [llvm] r53354 -
	/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
Message-ID: <200807092047.m69KltNE005173@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 15:47:55 2008
New Revision: 53354

URL: http://llvm.org/viewvc/llvm-project?rev=53354&view=rev
Log:
Add missed section

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53354&r1=53353&r2=53354&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 15:47:55 2008
@@ -147,6 +147,7 @@
   FourByteConstantSection = "\t.literal4\n";
   FourByteConstantSection_ = getUnnamedSection("\t.literal4\n",
                                                SectionFlags::Mergeable);
+  EightByteConstantSection = "\t.literal8\n";
   EightByteConstantSection_ = getUnnamedSection("\t.literal8\n",
                                                 SectionFlags::Mergeable);
   // FIXME: Why don't always use this section?




From baldrick at free.fr  Wed Jul  9 15:53:10 2008
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 9 Jul 2008 22:53:10 +0200
Subject: [llvm-commits] [llvm] r53353 -
	/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
In-Reply-To: <200807092043.m69KheQN005010@zion.cs.uiuc.edu>
References: <200807092043.m69KheQN005010@zion.cs.uiuc.edu>
Message-ID: <200807092253.11477.baldrick@free.fr>

Hi Dale,

> Emit debug info for data-only files.  This version
> applies to ppc Darwin only.

if this is a Good Thing (tm) shouldn't it be done for
all platforms?

Ciao,

Duncan.


From dalej at apple.com  Wed Jul  9 15:54:06 2008
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 9 Jul 2008 13:54:06 -0700
Subject: [llvm-commits] [llvm] r53353 -
	/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
In-Reply-To: <200807092253.11477.baldrick@free.fr>
References: <200807092043.m69KheQN005010@zion.cs.uiuc.edu>
	<200807092253.11477.baldrick@free.fr>
Message-ID: <6B3ECC24-B8A5-4B6D-A3DA-D25BB6213F98@apple.com>


On Jul 9, 2008, at 1:53 PMPDT, Duncan Sands wrote:

> Hi Dale,
>
>> Emit debug info for data-only files.  This version
>> applies to ppc Darwin only.
>
> if this is a Good Thing (tm) shouldn't it be done for
> all platforms?

Yes.  I screwed it up the first time so I'm being more careful now:)



From dalej at apple.com  Wed Jul  9 15:55:36 2008
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 09 Jul 2008 20:55:36 -0000
Subject: [llvm-commits] [llvm] r53355 -
	/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
Message-ID: <200807092055.m69KtaSD005427@zion.cs.uiuc.edu>

Author: johannes
Date: Wed Jul  9 15:55:35 2008
New Revision: 53355

URL: http://llvm.org/viewvc/llvm-project?rev=53355&view=rev
Log:
Emit debug info for data-only files.  This version
is X86 ATT only.


Modified:
    llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=53355&r1=53354&r2=53355&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Jul  9 15:55:35 2008
@@ -216,13 +216,6 @@
   const Function *F = MF.getFunction();
   unsigned CC = F->getCallingConv();
 
-  if (TAI->doesSupportDebugInformation()) {
-    // Let PassManager know we need debug information and relay
-    // the MachineModuleInfo address on to DwarfWriter.
-    MMI = &getAnalysis<MachineModuleInfo>();
-    DW.SetModuleInfo(MMI);
-  }
-
   SetupMachineFunction(MF);
   O << "\n\n";
 
@@ -739,6 +732,14 @@
 
   bool Result = AsmPrinter::doInitialization(M);
 
+  if (TAI->doesSupportDebugInformation()) {
+    // Let PassManager know we need debug information and relay
+    // the MachineModuleInfo address on to DwarfWriter.
+    // AsmPrinter::doInitialization did this analysis.
+    MMI = getAnalysisToUpdate<MachineModuleInfo>();
+    DW.SetModuleInfo(MMI);
+  }
+
   // Darwin wants symbols to be quoted if they have complex names.
   if (Subtarget->isTargetDarwin())
     Mang->setUseQuotes(true);




From isanbard at gmail.com  Wed Jul  9 16:00:41 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 09 Jul 2008 21:00:41 -0000
Subject: [llvm-commits] [llvm] r53356 - in /llvm/branches/Apple/Gaz:
 lib/Transforms/Scalar/InstructionCombining.cpp
 test/Transforms/InstCombine/2008-07-08-SubAnd.ll
Message-ID: <200807092100.m69L0fW3005576@zion.cs.uiuc.edu>

Author: void
Date: Wed Jul  9 16:00:40 2008
New Revision: 53356

URL: http://llvm.org/viewvc/llvm-project?rev=53356&view=rev
Log:
Reverting r53271 from Gaz branch

Modified:
    llvm/branches/Apple/Gaz/lib/Transforms/Scalar/InstructionCombining.cpp
    llvm/branches/Apple/Gaz/test/Transforms/InstCombine/2008-07-08-SubAnd.ll

Modified: llvm/branches/Apple/Gaz/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53356&r1=53355&r2=53356&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/Transforms/Scalar/InstructionCombining.cpp Wed Jul  9 16:00:40 2008
@@ -3461,17 +3461,6 @@
         // ((A ^ N) - B) & AndRHS -> (A - B) & AndRHS iff N&AndRHS == 0
         if (Value *V = FoldLogicalPlusAnd(Op0LHS, Op0RHS, AndRHS, true, I))
           return BinaryOperator::CreateAnd(V, AndRHS);
-
-        // (A - N) & AndRHS -> -N & AndRHS where A & AndRHS == 0
-        if (Op0I->hasOneUse() && MaskedValueIsZero(Op0LHS, AndRHSMask)) {
-          ConstantInt *A = dyn_cast<ConstantInt>(Op0LHS);
-          if (!A || !A->isZero()) {
-            Instruction *NewNeg = BinaryOperator::CreateNeg(Op0RHS);
-            InsertNewInstBefore(NewNeg, I);
-            return BinaryOperator::CreateAnd(NewNeg, AndRHS);
-          }
-        }
-
         break;
 
       case Instruction::Shl:
@@ -3819,7 +3808,7 @@
           }
     }
   }
-
+      
   return Changed ? &I : 0;
 }
 

Modified: llvm/branches/Apple/Gaz/test/Transforms/InstCombine/2008-07-08-SubAnd.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/test/Transforms/InstCombine/2008-07-08-SubAnd.ll?rev=53356&r1=53355&r2=53356&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/test/Transforms/InstCombine/2008-07-08-SubAnd.ll (original)
+++ llvm/branches/Apple/Gaz/test/Transforms/InstCombine/2008-07-08-SubAnd.ll Wed Jul  9 16:00:40 2008
@@ -1,9 +0,0 @@
-; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep -v {i32 8}
-; PR2330
-
-define i32 @a(i32 %a) nounwind  {
-entry:
-	%tmp2 = sub i32 8, %a		; <i32> [#uses=1]
-	%tmp3 = and i32 %tmp2, 7		; <i32> [#uses=1]
-	ret i32 %tmp3
-}




From isanbard at gmail.com  Wed Jul  9 16:01:58 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 09 Jul 2008 21:01:58 -0000
Subject: [llvm-commits] [llvm] r53357 - /llvm/tags/Apple/llvmCore-2053/
Message-ID: <200807092101.m69L1wIw005623@zion.cs.uiuc.edu>

Author: void
Date: Wed Jul  9 16:01:58 2008
New Revision: 53357

URL: http://llvm.org/viewvc/llvm-project?rev=53357&view=rev
Log:
Redoing 2053 tagging

Removed:
    llvm/tags/Apple/llvmCore-2053/



From isanbard at gmail.com  Wed Jul  9 16:02:35 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 09 Jul 2008 21:02:35 -0000
Subject: [llvm-commits] [llvm] r53358 - /llvm/tags/Apple/llvmCore-2053/
Message-ID: <200807092102.m69L2ZoU005648@zion.cs.uiuc.edu>

Author: void
Date: Wed Jul  9 16:02:34 2008
New Revision: 53358

URL: http://llvm.org/viewvc/llvm-project?rev=53358&view=rev
Log:
Creating llvmCore-2053 from Gaz branch

Added:
    llvm/tags/Apple/llvmCore-2053/
      - copied from r53357, llvm/branches/Apple/Gaz/



From resistor at mac.com  Wed Jul  9 16:15:11 2008
From: resistor at mac.com (Owen Anderson)
Date: Wed, 09 Jul 2008 21:15:11 -0000
Subject: [llvm-commits] [llvm] r53359 -
	/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
Message-ID: <200807092115.m69LFBwt006017@zion.cs.uiuc.edu>

Author: resistor
Date: Wed Jul  9 16:15:10 2008
New Revision: 53359

URL: http://llvm.org/viewvc/llvm-project?rev=53359&view=rev
Log:
Don't use an expensive check for two-address-ness when we have the information sitting around to determine it much more quickly,
This speeds up the local register allocator from 0.37s to 0.31s on instcombine.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53359&r1=53358&r2=53359&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Wed Jul  9 16:15:10 2008
@@ -585,13 +585,24 @@
       // Defs others than 2-addr redefs _do_ trigger flag changes:
       //   - A def followed by a def is dead
       //   - A use followed by a def is a kill
-      if (MO.isReg() && MO.getReg() && MO.isDef() && 
-         !I->isRegReDefinedByTwoAddr(MO.getReg())) {
+      if (MO.isReg() && MO.getReg() && MO.isDef()) {
         std::map<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
           last = LastUseDef.find(MO.getReg());
         if (last != LastUseDef.end()) {
+          
+          // If this is a two address instr, then we don't mark the def
+          // as killing the use.
+          if (last->second.first == I &&
+              I->getDesc().getOperandConstraint(last->second.second,
+                                                TOI::TIED_TO) == (signed)i) {
+            LastUseDef[MO.getReg()] = std::make_pair(I, i);
+            continue;
+          }
+            
+          
           MachineOperand& lastUD =
                       last->second.first->getOperand(last->second.second);
+          
           if (lastUD.isDef())
             lastUD.setIsDead(true);
           else if (lastUD.isUse())




From dalej at apple.com  Wed Jul  9 16:20:56 2008
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 09 Jul 2008 21:20:56 -0000
Subject: [llvm-commits] [llvm] r53360 -
	/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
Message-ID: <200807092120.m69LKupQ006208@zion.cs.uiuc.edu>

Author: johannes
Date: Wed Jul  9 16:20:54 2008
New Revision: 53360

URL: http://llvm.org/viewvc/llvm-project?rev=53360&view=rev
Log:
Emit debug info for data-only files.  ARM version.


Modified:
    llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=53360&r1=53359&r2=53360&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Wed Jul  9 16:20:54 2008
@@ -42,11 +42,13 @@
 namespace {
   struct VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
     ARMAsmPrinter(std::ostream &O, TargetMachine &TM, const TargetAsmInfo *T)
-      : AsmPrinter(O, TM, T), DW(O, this, T), AFI(NULL), InCPMode(false) {
+      : AsmPrinter(O, TM, T), DW(O, this, T), MMI(NULL), AFI(NULL), 
+        InCPMode(false) {
       Subtarget = &TM.getSubtarget<ARMSubtarget>();
     }
 
     DwarfWriter DW;
+    MachineModuleInfo *MMI;
 
     /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
     /// make the right decision when printing asm code for different targets.
@@ -176,8 +178,6 @@
 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
   AFI = MF.getInfo<ARMFunctionInfo>();
 
-  DW.SetModuleInfo(&getAnalysis<MachineModuleInfo>());
-
   SetupMachineFunction(MF);
   O << "\n";
 
@@ -800,6 +800,11 @@
   
   bool Result = AsmPrinter::doInitialization(M);
 
+  // AsmPrinter::doInitialization should have done this analysis.
+  MMI = getAnalysisToUpdate<MachineModuleInfo>();
+  assert(MMI);
+  DW.SetModuleInfo(MMI);
+
   // Darwin wants symbols to be quoted if they have complex names.
   if (Subtarget->isTargetDarwin())
     Mang->setUseQuotes(true);




From gohman at apple.com  Wed Jul  9 16:23:02 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 09 Jul 2008 21:23:02 -0000
Subject: [llvm-commits] [llvm] r53361 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAGNodes.h
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Message-ID: <200807092123.m69LN3B1006294@zion.cs.uiuc.edu>

Author: djg
Date: Wed Jul  9 16:23:02 2008
New Revision: 53361

URL: http://llvm.org/viewvc/llvm-project?rev=53361&view=rev
Log:
Move the IsVolatile and SVOffset fields into the MemSDNode base
class, and store IsVolatile and Alignment in a more compact form.
This makes AtomicSDNode slightly larger, but it shrinks LoadSDNode
and StoreSDNode, which are much more common and are the largest of
the SDNode subclasses. Also, this lets the isVolatile() and
getAlignment() accessors be non-virtual.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=53361&r1=53360&r2=53361&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Wed Jul  9 16:23:02 2008
@@ -1440,23 +1440,25 @@
   //! SrcValue - Memory location for alias analysis.
   const Value *SrcValue;
 
-  //! Alignment - Alignment of memory location in bytes.
-  unsigned Alignment;
+  //! SVOffset - Memory location offset. Note that base is defined in MemSDNode
+  int SVOffset;
+
+  /// Flags - the low bit indicates whether this is a volatile reference;
+  /// the remainder is a log2 encoding of the alignment in bytes.
+  unsigned Flags;
 
 public:
-  MemSDNode(unsigned Opc, SDVTList VTs, const Value *srcValue,
-            unsigned alignment)
-    : SDNode(Opc, VTs), SrcValue(srcValue), Alignment(alignment) {}
-  
-  virtual ~MemSDNode() {}
+  MemSDNode(unsigned Opc, SDVTList VTs,
+            const Value *srcValue, int SVOff,
+            unsigned alignment, bool isvolatile);
 
   /// Returns alignment and volatility of the memory access
-  unsigned getAlignment() const { return Alignment; }
-  virtual bool isVolatile() const = 0;
+  unsigned getAlignment() const { return (1u << (Flags >> 1)) >> 1; }
+  bool isVolatile() const { return Flags & 1; }
   
   /// Returns the SrcValue and offset that describes the location of the access
   const Value *getSrcValue() const { return SrcValue; }
-  virtual int getSrcValueOffset() const = 0;
+  int getSrcValueOffset() const { return SVOffset; }
   
   /// getMemOperand - Return a MachineMemOperand object describing the memory
   /// reference performed by operation.
@@ -1499,7 +1501,8 @@
   AtomicSDNode(unsigned Opc, SDVTList VTL, SDOperand Chain, SDOperand Ptr, 
                SDOperand Cmp, SDOperand Swp, const Value* SrcVal,
                unsigned Align=0)
-    : MemSDNode(Opc, VTL, SrcVal, Align) {
+    : MemSDNode(Opc, VTL, SrcVal, /*SVOffset=*/0,
+                Align, /*isVolatile=*/true) {
     Ops[0] = Chain;
     Ops[1] = Ptr;
     Ops[2] = Swp;
@@ -1508,7 +1511,8 @@
   }
   AtomicSDNode(unsigned Opc, SDVTList VTL, SDOperand Chain, SDOperand Ptr, 
                SDOperand Val, const Value* SrcVal, unsigned Align=0)
-    : MemSDNode(Opc, VTL, SrcVal, Align) {
+    : MemSDNode(Opc, VTL, SrcVal, /*SVOffset=*/0,
+                Align, /*isVolatile=*/true) {
     Ops[0] = Chain;
     Ops[1] = Ptr;
     Ops[2] = Val;
@@ -1521,10 +1525,6 @@
 
   bool isCompareAndSwap() const { return getOpcode() == ISD::ATOMIC_CMP_SWAP; }
 
-  // Implementation for MemSDNode
-  virtual int getSrcValueOffset() const { return 0; }
-  virtual bool isVolatile() const { return true; }   
-  
   /// getMemOperand - Return a MachineMemOperand object describing the memory
   /// reference performed by this atomic load/store.
   virtual MachineMemOperand getMemOperand() const;
@@ -2055,12 +2055,6 @@
   // MemoryVT - VT of in-memory value.
   MVT MemoryVT;
 
-  //! SVOffset - Memory location offset. Note that base is defined in MemSDNode
-  int SVOffset;
-
-  //! IsVolatile - True if the load/store is volatile.
-  bool IsVolatile;
-
 protected:
   //! Operand array for load and store
   /*!
@@ -2073,8 +2067,7 @@
   LSBaseSDNode(ISD::NodeType NodeTy, SDOperand *Operands, unsigned numOperands,
                SDVTList VTs, ISD::MemIndexedMode AM, MVT VT,
                const Value *SV, int SVO, unsigned Align, bool Vol)
-    : MemSDNode(NodeTy, VTs, SV, Align), AddrMode(AM), MemoryVT(VT),
-      SVOffset(SVO), IsVolatile(Vol) {
+    : MemSDNode(NodeTy, VTs, SV, SVO, Align, Vol), AddrMode(AM), MemoryVT(VT) {
     for (unsigned i = 0; i != numOperands; ++i)
       Ops[i] = Operands[i];
     InitOperands(Ops, numOperands);
@@ -2101,10 +2094,6 @@
   /// isUnindexed - Return true if this is NOT a pre/post inc/dec load/store.
   bool isUnindexed() const { return AddrMode == ISD::UNINDEXED; }
 
-  // Implementation for MemSDNode
-  virtual int getSrcValueOffset() const { return SVOffset; }
-  virtual bool isVolatile() const { return IsVolatile; }  
-  
   /// getMemOperand - Return a MachineMemOperand object describing the memory
   /// reference performed by this load or store.
   virtual MachineMemOperand getMemOperand() const;

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53361&r1=53360&r2=53361&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Jul  9 16:23:02 2008
@@ -4331,6 +4331,17 @@
   TheGlobal = const_cast<GlobalValue*>(GA);
 }
 
+MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs,
+                     const Value *srcValue, int SVO,
+                     unsigned alignment, bool vol)
+ : SDNode(Opc, VTs), SrcValue(srcValue), SVOffset(SVO),
+   Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
+
+  assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
+  assert(getAlignment() == alignment && "Alignment representation error!");
+  assert(isVolatile() == vol && "Volatile representation error!");
+}
+
 /// getMemOperand - Return a MachineMemOperand object describing the memory
 /// reference performed by this atomic.
 MachineMemOperand AtomicSDNode::getMemOperand() const {




From dalej at apple.com  Wed Jul  9 16:24:07 2008
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 09 Jul 2008 21:24:07 -0000
Subject: [llvm-commits] [llvm] r53362 -
	/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
Message-ID: <200807092124.m69LO7Rh006334@zion.cs.uiuc.edu>

Author: johannes
Date: Wed Jul  9 16:24:07 2008
New Revision: 53362

URL: http://llvm.org/viewvc/llvm-project?rev=53362&view=rev
Log:
Emit debug into for data-only files for Linux PPC.
I cannot test this target, let me know if it breaks!


Modified:
    llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=53362&r1=53361&r2=53362&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed Jul  9 16:24:07 2008
@@ -293,10 +293,11 @@
   struct VISIBILITY_HIDDEN LinuxAsmPrinter : public PPCAsmPrinter {
 
     DwarfWriter DW;
+    MachineModuleInfo *MMI;
 
     LinuxAsmPrinter(std::ostream &O, PPCTargetMachine &TM,
                     const TargetAsmInfo *T)
-      : PPCAsmPrinter(O, TM, T), DW(O, this, T) {
+      : PPCAsmPrinter(O, TM, T), DW(O, this, T), MMI(0) {
     }
 
     virtual const char *getPassName() const {
@@ -631,13 +632,19 @@
 bool LinuxAsmPrinter::doInitialization(Module &M) {
   bool Result = AsmPrinter::doInitialization(M);
   
+  // Emit initial debug information.
+  DW.BeginModule(&M);
+
+  // AsmPrinter::doInitialization should have done this analysis.
+  MMI = getAnalysisToUpdate<MachineModuleInfo>();
+  assert(MMI);
+  DW.SetModuleInfo(MMI);
+
   // GNU as handles section names wrapped in quotes
   Mang->setUseQuotes(true);
 
   SwitchToTextSection(TAI->getTextSection());
   
-  // Emit initial debug information.
-  DW.BeginModule(&M);
   return Result;
 }
 




From dalej at apple.com  Wed Jul  9 16:25:06 2008
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 09 Jul 2008 21:25:06 -0000
Subject: [llvm-commits] [llvm] r53363 -
	/llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp
Message-ID: <200807092125.m69LP6FA006368@zion.cs.uiuc.edu>

Author: johannes
Date: Wed Jul  9 16:25:06 2008
New Revision: 53363

URL: http://llvm.org/viewvc/llvm-project?rev=53363&view=rev
Log:
Emit debug info for data-only files on Cell SPU.
I cannot test this target, let me know if it breaks!


Modified:
    llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp?rev=53363&r1=53362&r2=53363&view=diff

==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUAsmPrinter.cpp Wed Jul  9 16:25:06 2008
@@ -273,11 +273,13 @@
   struct VISIBILITY_HIDDEN LinuxAsmPrinter : public SPUAsmPrinter {
   
     DwarfWriter DW;
+    MachineModuleInfo *MMI;
 
     LinuxAsmPrinter(std::ostream &O, SPUTargetMachine &TM,
                     const TargetAsmInfo *T) :
       SPUAsmPrinter(O, TM, T),
-      DW(O, this, T)
+      DW(O, this, T),
+      MMI(0)
     { }
 
     virtual const char *getPassName() const {
@@ -422,8 +424,6 @@
 bool
 LinuxAsmPrinter::runOnMachineFunction(MachineFunction &MF)
 {
-  DW.SetModuleInfo(&getAnalysis<MachineModuleInfo>());
-
   SetupMachineFunction(MF);
   O << "\n\n";
   
@@ -488,6 +488,8 @@
   SwitchToTextSection(TAI->getTextSection());
   // Emit initial debug information.
   DW.BeginModule(&M);
+  MMI = getAnalysisToUpdate<MachineModuleInfo>();
+  DW.SetModuleInfo(MMI);
   return Result;
 }
 




From dalej at apple.com  Wed Jul  9 16:28:54 2008
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 9 Jul 2008 14:28:54 -0700
Subject: [llvm-commits] [llvm] r53353 -
	/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
In-Reply-To: <6B3ECC24-B8A5-4B6D-A3DA-D25BB6213F98@apple.com>
References: <200807092043.m69KheQN005010@zion.cs.uiuc.edu>
	<200807092253.11477.baldrick@free.fr>
	<6B3ECC24-B8A5-4B6D-A3DA-D25BB6213F98@apple.com>
Message-ID: <C70ABD35-87A6-45A7-AABC-CF8ED90ACD10@apple.com>

On Jul 9, 2008, at 1:54 PMPDT, Dale Johannesen wrote:
> On Jul 9, 2008, at 1:53 PMPDT, Duncan Sands wrote:
>
>> Hi Dale,
>>
>>> Emit debug info for data-only files.  This version
>>> applies to ppc Darwin only.
>>
>> if this is a Good Thing (tm) shouldn't it be done for
>> all platforms?
>
> Yes.  I screwed it up the first time so I'm being more careful now:)

I have checked in this change for all affected platforms.  I am not in
a position to test for Linux PPC or Cell, can I get someone to do that?
The patch is pretty simple.

(Anton, as long as you're there, maybe this could be centralized  
somewhere?
if (TargetHasDwarf())...



From asl at math.spbu.ru  Wed Jul  9 16:32:02 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Thu, 10 Jul 2008 01:32:02 +0400
Subject: [llvm-commits] [llvm] r53353
	-	/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
In-Reply-To: <C70ABD35-87A6-45A7-AABC-CF8ED90ACD10@apple.com>
References: <200807092043.m69KheQN005010@zion.cs.uiuc.edu>
	<200807092253.11477.baldrick@free.fr>
	<6B3ECC24-B8A5-4B6D-A3DA-D25BB6213F98@apple.com>
	<C70ABD35-87A6-45A7-AABC-CF8ED90ACD10@apple.com>
Message-ID: <1215639122.18285.12.camel@localhost>

Hello, Dale

> (Anton, as long as you're there, maybe this could be centralized  
> somewhere?
> if (TargetHasDwarf())...
I have some thoughts about refactoring of Asm & Dwarf printers. I've
added this into TODO list.

-- 
With best regards, Anton Korobeynikov.

Faculty of Mathematics & Mechanics, Saint Petersburg State University.




From isanbard at gmail.com  Wed Jul  9 16:32:21 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 09 Jul 2008 21:32:21 -0000
Subject: [llvm-commits] [llvm] r53364 -
	/llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocLocal.cpp
Message-ID: <200807092132.m69LWLaj006579@zion.cs.uiuc.edu>

Author: void
Date: Wed Jul  9 16:32:21 2008
New Revision: 53364

URL: http://llvm.org/viewvc/llvm-project?rev=53364&view=rev
Log:
Pulling r53359 into Gaz:

Don't use an expensive check for two-address-ness when we have the information
sitting around to determine it much more quickly, This speeds up the local
register allocator from 0.37s to 0.31s on instcombine.


Modified:
    llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocLocal.cpp

Modified: llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocLocal.cpp?rev=53364&r1=53363&r2=53364&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocLocal.cpp Wed Jul  9 16:32:21 2008
@@ -611,13 +611,24 @@
       // Defs others than 2-addr redefs _do_ trigger flag changes:
       //   - A def followed by a def is dead
       //   - A use followed by a def is a kill
-      if (MO.isReg() && MO.getReg() && MO.isDef() && 
-         !I->isRegReDefinedByTwoAddr(MO.getReg())) {
+      if (MO.isReg() && MO.getReg() && MO.isDef()) {
         std::map<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
           last = LastUseDef.find(MO.getReg());
         if (last != LastUseDef.end()) {
+          
+          // If this is a two address instr, then we don't mark the def
+          // as killing the use.
+          if (last->second.first == I &&
+              I->getDesc().getOperandConstraint(last->second.second,
+                                                TOI::TIED_TO) == (signed)i) {
+            LastUseDef[MO.getReg()] = std::make_pair(I, i);
+            continue;
+          }
+            
+          
           MachineOperand& lastUD =
                       last->second.first->getOperand(last->second.second);
+          
           if (lastUD.isDef())
             lastUD.setIsDead(true);
           else if (lastUD.isUse())




From dalej at apple.com  Wed Jul  9 16:33:15 2008
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 09 Jul 2008 21:33:15 -0000
Subject: [llvm-commits] [llvm] r53365 -
	/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
Message-ID: <200807092133.m69LXFfI006622@zion.cs.uiuc.edu>

Author: johannes
Date: Wed Jul  9 16:33:15 2008
New Revision: 53365

URL: http://llvm.org/viewvc/llvm-project?rev=53365&view=rev
Log:
Remove extra call to DW.SetModuleInfo on Linux.


Modified:
    llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=53365&r1=53364&r2=53365&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed Jul  9 16:33:15 2008
@@ -565,7 +565,6 @@
 /// method to print assembly for each instruction.
 ///
 bool LinuxAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
-  DW.SetModuleInfo(&getAnalysis<MachineModuleInfo>());
 
   SetupMachineFunction(MF);
   O << "\n\n";




From isanbard at gmail.com  Wed Jul  9 16:33:25 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 09 Jul 2008 21:33:25 -0000
Subject: [llvm-commits] [llvm] r53366 - in /llvm/branches/Apple/Gaz:
 include/llvm/CodeGen/SelectionDAGNodes.h
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Message-ID: <200807092133.m69LXPCW006651@zion.cs.uiuc.edu>

Author: void
Date: Wed Jul  9 16:33:24 2008
New Revision: 53366

URL: http://llvm.org/viewvc/llvm-project?rev=53366&view=rev
Log:
Pulling r53361 into Gaz:

Move the IsVolatile and SVOffset fields into the MemSDNode base
class, and store IsVolatile and Alignment in a more compact form.
This makes AtomicSDNode slightly larger, but it shrinks LoadSDNode
and StoreSDNode, which are much more common and are the largest of
the SDNode subclasses. Also, this lets the isVolatile() and
getAlignment() accessors be non-virtual.


Modified:
    llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h?rev=53366&r1=53365&r2=53366&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h Wed Jul  9 16:33:24 2008
@@ -1440,23 +1440,25 @@
   //! SrcValue - Memory location for alias analysis.
   const Value *SrcValue;
 
-  //! Alignment - Alignment of memory location in bytes.
-  unsigned Alignment;
+  //! SVOffset - Memory location offset. Note that base is defined in MemSDNode
+  int SVOffset;
+
+  /// Flags - the low bit indicates whether this is a volatile reference;
+  /// the remainder is a log2 encoding of the alignment in bytes.
+  unsigned Flags;
 
 public:
-  MemSDNode(unsigned Opc, SDVTList VTs, const Value *srcValue,
-            unsigned alignment)
-    : SDNode(Opc, VTs), SrcValue(srcValue), Alignment(alignment) {}
-  
-  virtual ~MemSDNode() {}
+  MemSDNode(unsigned Opc, SDVTList VTs,
+            const Value *srcValue, int SVOff,
+            unsigned alignment, bool isvolatile);
 
   /// Returns alignment and volatility of the memory access
-  unsigned getAlignment() const { return Alignment; }
-  virtual bool isVolatile() const = 0;
+  unsigned getAlignment() const { return (1u << (Flags >> 1)) >> 1; }
+  bool isVolatile() const { return Flags & 1; }
   
   /// Returns the SrcValue and offset that describes the location of the access
   const Value *getSrcValue() const { return SrcValue; }
-  virtual int getSrcValueOffset() const = 0;
+  int getSrcValueOffset() const { return SVOffset; }
   
   /// getMemOperand - Return a MachineMemOperand object describing the memory
   /// reference performed by operation.
@@ -1499,7 +1501,8 @@
   AtomicSDNode(unsigned Opc, SDVTList VTL, SDOperand Chain, SDOperand Ptr, 
                SDOperand Cmp, SDOperand Swp, const Value* SrcVal,
                unsigned Align=0)
-    : MemSDNode(Opc, VTL, SrcVal, Align) {
+    : MemSDNode(Opc, VTL, SrcVal, /*SVOffset=*/0,
+                Align, /*isVolatile=*/true) {
     Ops[0] = Chain;
     Ops[1] = Ptr;
     Ops[2] = Swp;
@@ -1508,7 +1511,8 @@
   }
   AtomicSDNode(unsigned Opc, SDVTList VTL, SDOperand Chain, SDOperand Ptr, 
                SDOperand Val, const Value* SrcVal, unsigned Align=0)
-    : MemSDNode(Opc, VTL, SrcVal, Align) {
+    : MemSDNode(Opc, VTL, SrcVal, /*SVOffset=*/0,
+                Align, /*isVolatile=*/true) {
     Ops[0] = Chain;
     Ops[1] = Ptr;
     Ops[2] = Val;
@@ -1521,10 +1525,6 @@
 
   bool isCompareAndSwap() const { return getOpcode() == ISD::ATOMIC_CMP_SWAP; }
 
-  // Implementation for MemSDNode
-  virtual int getSrcValueOffset() const { return 0; }
-  virtual bool isVolatile() const { return true; }   
-  
   /// getMemOperand - Return a MachineMemOperand object describing the memory
   /// reference performed by this atomic load/store.
   virtual MachineMemOperand getMemOperand() const;
@@ -2055,12 +2055,6 @@
   // MemoryVT - VT of in-memory value.
   MVT MemoryVT;
 
-  //! SVOffset - Memory location offset. Note that base is defined in MemSDNode
-  int SVOffset;
-
-  //! IsVolatile - True if the load/store is volatile.
-  bool IsVolatile;
-
 protected:
   //! Operand array for load and store
   /*!
@@ -2073,8 +2067,7 @@
   LSBaseSDNode(ISD::NodeType NodeTy, SDOperand *Operands, unsigned numOperands,
                SDVTList VTs, ISD::MemIndexedMode AM, MVT VT,
                const Value *SV, int SVO, unsigned Align, bool Vol)
-    : MemSDNode(NodeTy, VTs, SV, Align), AddrMode(AM), MemoryVT(VT),
-      SVOffset(SVO), IsVolatile(Vol) {
+    : MemSDNode(NodeTy, VTs, SV, SVO, Align, Vol), AddrMode(AM), MemoryVT(VT) {
     for (unsigned i = 0; i != numOperands; ++i)
       Ops[i] = Operands[i];
     InitOperands(Ops, numOperands);
@@ -2101,10 +2094,6 @@
   /// isUnindexed - Return true if this is NOT a pre/post inc/dec load/store.
   bool isUnindexed() const { return AddrMode == ISD::UNINDEXED; }
 
-  // Implementation for MemSDNode
-  virtual int getSrcValueOffset() const { return SVOffset; }
-  virtual bool isVolatile() const { return IsVolatile; }  
-  
   /// getMemOperand - Return a MachineMemOperand object describing the memory
   /// reference performed by this load or store.
   virtual MachineMemOperand getMemOperand() const;

Modified: llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53366&r1=53365&r2=53366&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Jul  9 16:33:24 2008
@@ -4331,6 +4331,17 @@
   TheGlobal = const_cast<GlobalValue*>(GA);
 }
 
+MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs,
+                     const Value *srcValue, int SVO,
+                     unsigned alignment, bool vol)
+ : SDNode(Opc, VTs), SrcValue(srcValue), SVOffset(SVO),
+   Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
+
+  assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
+  assert(getAlignment() == alignment && "Alignment representation error!");
+  assert(isVolatile() == vol && "Volatile representation error!");
+}
+
 /// getMemOperand - Return a MachineMemOperand object describing the memory
 /// reference performed by this atomic.
 MachineMemOperand AtomicSDNode::getMemOperand() const {




From resistor at mac.com  Wed Jul  9 16:34:36 2008
From: resistor at mac.com (Owen Anderson)
Date: Wed, 09 Jul 2008 21:34:36 -0000
Subject: [llvm-commits] [llvm] r53367 -
	/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
Message-ID: <200807092134.m69LYbw3006697@zion.cs.uiuc.edu>

Author: resistor
Date: Wed Jul  9 16:34:36 2008
New Revision: 53367

URL: http://llvm.org/viewvc/llvm-project?rev=53367&view=rev
Log:
Loosen our check here.  Local regalloc only cares that the reg is used and def'd by the same instruction, but about the details of
the relationship.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53367&r1=53366&r2=53367&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Wed Jul  9 16:34:36 2008
@@ -592,9 +592,7 @@
           
           // If this is a two address instr, then we don't mark the def
           // as killing the use.
-          if (last->second.first == I &&
-              I->getDesc().getOperandConstraint(last->second.second,
-                                                TOI::TIED_TO) == (signed)i) {
+          if (last->second.first == I) {
             LastUseDef[MO.getReg()] = std::make_pair(I, i);
             continue;
           }




From asl at math.spbu.ru  Wed Jul  9 16:38:29 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 21:38:29 -0000
Subject: [llvm-commits] [llvm] r53368 -
	/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
Message-ID: <200807092138.m69LciDI006814@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 16:38:28 2008
New Revision: 53368

URL: http://llvm.org/viewvc/llvm-project?rev=53368&view=rev
Log:
Add FIXME for future checking.

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53368&r1=53367&r2=53368&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 16:38:28 2008
@@ -139,6 +139,8 @@
   PrivateGlobalPrefix = "L";     // Marker for constant pool idxs
   BSSSection = 0;                       // no BSS section.
   ZeroFillDirective = "\t.zerofill\t";  // Uses .zerofill
+  // FIXME: It seems, this should be .const_data if relocation model is not
+  // static.
   ConstantPoolSection = "\t.const\n";
   JumpTableDataSection = "\t.const\n";
   CStringSection = "\t.cstring";




From evan.cheng at apple.com  Wed Jul  9 16:53:02 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 09 Jul 2008 21:53:02 -0000
Subject: [llvm-commits] [llvm] r53369 -
	/llvm/trunk/lib/CodeGen/DwarfWriter.cpp
Message-ID: <200807092153.m69Lr2rL007245@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Jul  9 16:53:02 2008
New Revision: 53369

URL: http://llvm.org/viewvc/llvm-project?rev=53369&view=rev
Log:
Avoid creating expensive comment string if it's not going to be printed.

Modified:
    llvm/trunk/lib/CodeGen/DwarfWriter.cpp

Modified: llvm/trunk/lib/CodeGen/DwarfWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DwarfWriter.cpp?rev=53369&r1=53368&r2=53369&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/DwarfWriter.cpp (original)
+++ llvm/trunk/lib/CodeGen/DwarfWriter.cpp Wed Jul  9 16:53:02 2008
@@ -1091,7 +1091,10 @@
           Asm->EOL("Offset");
         } else if (Reg < 64) {
           Asm->EmitInt8(DW_CFA_offset + Reg);
-          Asm->EOL("DW_CFA_offset + Reg (" + utostr(Reg) + ")");
+          if (VerboseAsm)
+            Asm->EOL("DW_CFA_offset + Reg (" + utostr(Reg) + ")");
+          else
+            Asm->EOL();
           Asm->EmitULEB128Bytes(Offset);
           Asm->EOL("Offset");
         } else {




From asl at math.spbu.ru  Wed Jul  9 16:54:27 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 09 Jul 2008 21:54:27 -0000
Subject: [llvm-commits] [llvm] r53370 -
	/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
Message-ID: <200807092154.m69LsR3p007294@zion.cs.uiuc.edu>

Author: asl
Date: Wed Jul  9 16:54:26 2008
New Revision: 53370

URL: http://llvm.org/viewvc/llvm-project?rev=53370&view=rev
Log:
Remove a FIXME: we really need to use const_data section on darwin for
constant pool, if relocation model is not static. This directly maps to
the way how GCC works.

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=53370&r1=53369&r2=53370&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jul  9 16:54:26 2008
@@ -139,9 +139,10 @@
   PrivateGlobalPrefix = "L";     // Marker for constant pool idxs
   BSSSection = 0;                       // no BSS section.
   ZeroFillDirective = "\t.zerofill\t";  // Uses .zerofill
-  // FIXME: It seems, this should be .const_data if relocation model is not
-  // static.
-  ConstantPoolSection = "\t.const\n";
+  if (X86TM->getRelocationModel() != Reloc::Static)
+    ConstantPoolSection = "\t.const_data";
+  else
+    ConstantPoolSection = "\t.const\n";
   JumpTableDataSection = "\t.const\n";
   CStringSection = "\t.cstring";
   CStringSection_ = getUnnamedSection("\t.cstring",




From isanbard at gmail.com  Wed Jul  9 16:58:45 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 09 Jul 2008 21:58:45 -0000
Subject: [llvm-commits] [llvm] r53371 -
	/llvm/branches/Apple/Gaz/lib/CodeGen/DwarfWriter.cpp
Message-ID: <200807092158.m69Lwjo5007433@zion.cs.uiuc.edu>

Author: void
Date: Wed Jul  9 16:58:44 2008
New Revision: 53371

URL: http://llvm.org/viewvc/llvm-project?rev=53371&view=rev
Log:
Pulling r53369 into Gaz:

Avoid creating expensive comment string if it's not going to be printed.


Modified:
    llvm/branches/Apple/Gaz/lib/CodeGen/DwarfWriter.cpp

Modified: llvm/branches/Apple/Gaz/lib/CodeGen/DwarfWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/CodeGen/DwarfWriter.cpp?rev=53371&r1=53370&r2=53371&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/CodeGen/DwarfWriter.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/CodeGen/DwarfWriter.cpp Wed Jul  9 16:58:44 2008
@@ -1091,7 +1091,10 @@
           Asm->EOL("Offset");
         } else if (Reg < 64) {
           Asm->EmitInt8(DW_CFA_offset + Reg);
-          Asm->EOL("DW_CFA_offset + Reg (" + utostr(Reg) + ")");
+          if (VerboseAsm)
+            Asm->EOL("DW_CFA_offset + Reg (" + utostr(Reg) + ")");
+          else
+            Asm->EOL();
           Asm->EmitULEB128Bytes(Offset);
           Asm->EOL("Offset");
         } else {




From gohman at apple.com  Wed Jul  9 17:08:04 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 09 Jul 2008 22:08:04 -0000
Subject: [llvm-commits] [llvm] r53372 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAGNodes.h
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Message-ID: <200807092208.m69M85Tl007787@zion.cs.uiuc.edu>

Author: djg
Date: Wed Jul  9 17:08:04 2008
New Revision: 53372

URL: http://llvm.org/viewvc/llvm-project?rev=53372&view=rev
Log:
Move MemoryVT out of LSBaseNode into MemSDNode, allowing the
getMemOperand function to be moved into the base class as well
and made non-virtual.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=53372&r1=53371&r2=53372&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Wed Jul  9 17:08:04 2008
@@ -1437,6 +1437,9 @@
   virtual void ANCHOR();  // Out-of-line virtual method to give class a home.
 
 private:
+  // MemoryVT - VT of in-memory value.
+  MVT MemoryVT;
+
   //! SrcValue - Memory location for alias analysis.
   const Value *SrcValue;
 
@@ -1448,7 +1451,7 @@
   unsigned Flags;
 
 public:
-  MemSDNode(unsigned Opc, SDVTList VTs,
+  MemSDNode(unsigned Opc, SDVTList VTs, MVT MemoryVT,
             const Value *srcValue, int SVOff,
             unsigned alignment, bool isvolatile);
 
@@ -1460,9 +1463,17 @@
   const Value *getSrcValue() const { return SrcValue; }
   int getSrcValueOffset() const { return SVOffset; }
   
+  /// getMemoryVT - Return the type of the in-memory value.
+  MVT getMemoryVT() const { return MemoryVT; }
+    
   /// getMemOperand - Return a MachineMemOperand object describing the memory
   /// reference performed by operation.
-  virtual MachineMemOperand getMemOperand() const = 0;
+  MachineMemOperand getMemOperand() const;
+
+  const SDOperand &getChain() const { return getOperand(0); }
+  const SDOperand &getBasePtr() const {
+    return getOperand(getOpcode() == ISD::STORE ? 2 : 1);
+  }
 
   // Methods to support isa and dyn_cast
   static bool classof(const MemSDNode *) { return true; }
@@ -1501,7 +1512,7 @@
   AtomicSDNode(unsigned Opc, SDVTList VTL, SDOperand Chain, SDOperand Ptr, 
                SDOperand Cmp, SDOperand Swp, const Value* SrcVal,
                unsigned Align=0)
-    : MemSDNode(Opc, VTL, SrcVal, /*SVOffset=*/0,
+    : MemSDNode(Opc, VTL, Cmp.getValueType(), SrcVal, /*SVOffset=*/0,
                 Align, /*isVolatile=*/true) {
     Ops[0] = Chain;
     Ops[1] = Ptr;
@@ -1511,7 +1522,7 @@
   }
   AtomicSDNode(unsigned Opc, SDVTList VTL, SDOperand Chain, SDOperand Ptr, 
                SDOperand Val, const Value* SrcVal, unsigned Align=0)
-    : MemSDNode(Opc, VTL, SrcVal, /*SVOffset=*/0,
+    : MemSDNode(Opc, VTL, Val.getValueType(), SrcVal, /*SVOffset=*/0,
                 Align, /*isVolatile=*/true) {
     Ops[0] = Chain;
     Ops[1] = Ptr;
@@ -1519,16 +1530,11 @@
     InitOperands(Ops, 3);
   }
   
-  const SDOperand &getChain() const { return getOperand(0); }
   const SDOperand &getBasePtr() const { return getOperand(1); }
   const SDOperand &getVal() const { return getOperand(2); }
 
   bool isCompareAndSwap() const { return getOpcode() == ISD::ATOMIC_CMP_SWAP; }
 
-  /// getMemOperand - Return a MachineMemOperand object describing the memory
-  /// reference performed by this atomic load/store.
-  virtual MachineMemOperand getMemOperand() const;
-  
   // Methods to support isa and dyn_cast
   static bool classof(const AtomicSDNode *) { return true; }
   static bool classof(const SDNode *N) {
@@ -2052,9 +2058,6 @@
   // AddrMode - unindexed, pre-indexed, post-indexed.
   ISD::MemIndexedMode AddrMode;
 
-  // MemoryVT - VT of in-memory value.
-  MVT MemoryVT;
-
 protected:
   //! Operand array for load and store
   /*!
@@ -2067,7 +2070,7 @@
   LSBaseSDNode(ISD::NodeType NodeTy, SDOperand *Operands, unsigned numOperands,
                SDVTList VTs, ISD::MemIndexedMode AM, MVT VT,
                const Value *SV, int SVO, unsigned Align, bool Vol)
-    : MemSDNode(NodeTy, VTs, SV, SVO, Align, Vol), AddrMode(AM), MemoryVT(VT) {
+    : MemSDNode(NodeTy, VTs, VT, SV, SVO, Align, Vol), AddrMode(AM) {
     for (unsigned i = 0; i != numOperands; ++i)
       Ops[i] = Operands[i];
     InitOperands(Ops, numOperands);
@@ -2076,16 +2079,10 @@
            "Only indexed loads and stores have a non-undef offset operand");
   }
 
-  const SDOperand &getChain() const { return getOperand(0); }
-  const SDOperand &getBasePtr() const {
-    return getOperand(getOpcode() == ISD::LOAD ? 1 : 2);
-  }
   const SDOperand &getOffset() const {
     return getOperand(getOpcode() == ISD::LOAD ? 2 : 3);
   }
 
-  MVT getMemoryVT() const { return MemoryVT; }
-    
   ISD::MemIndexedMode getAddressingMode() const { return AddrMode; }
 
   /// isIndexed - Return true if this is a pre/post inc/dec load/store.
@@ -2094,10 +2091,6 @@
   /// isUnindexed - Return true if this is NOT a pre/post inc/dec load/store.
   bool isUnindexed() const { return AddrMode == ISD::UNINDEXED; }
 
-  /// getMemOperand - Return a MachineMemOperand object describing the memory
-  /// reference performed by this load or store.
-  virtual MachineMemOperand getMemOperand() const;
-
   static bool classof(const LSBaseSDNode *) { return true; }
   static bool classof(const SDNode *N) {
     return N->getOpcode() == ISD::LOAD ||

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53372&r1=53371&r2=53372&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Jul  9 17:08:04 2008
@@ -4331,10 +4331,10 @@
   TheGlobal = const_cast<GlobalValue*>(GA);
 }
 
-MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs,
+MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
                      const Value *srcValue, int SVO,
                      unsigned alignment, bool vol)
- : SDNode(Opc, VTs), SrcValue(srcValue), SVOffset(SVO),
+ : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
    Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
 
   assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
@@ -4343,13 +4343,22 @@
 }
 
 /// getMemOperand - Return a MachineMemOperand object describing the memory
-/// reference performed by this atomic.
-MachineMemOperand AtomicSDNode::getMemOperand() const {
-  int Size = (getValueType(0).getSizeInBits() + 7) >> 3;
-  int Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
+/// reference performed by this memory reference.
+MachineMemOperand MemSDNode::getMemOperand() const {
+  int Flags;
+  if (isa<LoadSDNode>(this))
+    Flags = MachineMemOperand::MOLoad;
+  else if (isa<StoreSDNode>(this))
+    Flags = MachineMemOperand::MOStore;
+  else {
+    assert(isa<AtomicSDNode>(this) && "Unknown MemSDNode opcode!");
+    Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
+  }
+
+  int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
   if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
   
-  // Check if the atomic references a frame index
+  // Check if the memory reference references a frame index
   const FrameIndexSDNode *FI = 
   dyn_cast<const FrameIndexSDNode>(getBasePtr().Val);
   if (!getSrcValue() && FI)
@@ -4360,27 +4369,6 @@
                              Size, getAlignment());
 }
 
-/// getMemOperand - Return a MachineMemOperand object describing the memory
-/// reference performed by this load or store.
-MachineMemOperand LSBaseSDNode::getMemOperand() const {
-  int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
-  int Flags =
-    getOpcode() == ISD::LOAD ? MachineMemOperand::MOLoad :
-                               MachineMemOperand::MOStore;
-  if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
-
-  // Check if the load references a frame index, and does not have
-  // an SV attached.
-  const FrameIndexSDNode *FI =
-    dyn_cast<const FrameIndexSDNode>(getBasePtr().Val);
-  if (!getSrcValue() && FI)
-    return MachineMemOperand(PseudoSourceValue::getFixedStack(), Flags,
-                             FI->getIndex(), Size, getAlignment());
-  else
-    return MachineMemOperand(getSrcValue(), Flags,
-                             getSrcValueOffset(), Size, getAlignment());
-}
-
 /// Profile - Gather unique data for the node.
 ///
 void SDNode::Profile(FoldingSetNodeID &ID) {




From gohman at apple.com  Wed Jul  9 17:39:01 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 09 Jul 2008 22:39:01 -0000
Subject: [llvm-commits] [llvm] r53374 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Message-ID: <200807092239.m69Md2eT008710@zion.cs.uiuc.edu>

Author: djg
Date: Wed Jul  9 17:39:01 2008
New Revision: 53374

URL: http://llvm.org/viewvc/llvm-project?rev=53374&view=rev
Log:
hasAnyUseOfValue can check SDUse nodes of its users directly instead
of examining every operand of every user.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53374&r1=53373&r2=53374&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Jul  9 17:39:01 2008
@@ -4401,8 +4401,6 @@
 
   SDOperand TheValue(const_cast<SDNode *>(this), Value);
 
-  SmallPtrSet<SDNode*, 32> UsersHandled;
-
   // TODO: Only iterate over uses of a given value of the node
   for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
     if (*UI == TheValue) {
@@ -4426,17 +4424,9 @@
 
   SDOperand TheValue(const_cast<SDNode *>(this), Value);
 
-  SmallPtrSet<SDNode*, 32> UsersHandled;
-
-  for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
-    SDNode *User = UI->getUser();
-    if (User->getNumOperands() == 1 ||
-        UsersHandled.insert(User))     // First time we've seen this?
-      for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i)
-        if (User->getOperand(i) == TheValue) {
-          return true;
-        }
-  }
+  for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
+    if (UI->getSDOperand() == TheValue)
+      return true;
 
   return false;
 }




From gohman at apple.com  Wed Jul  9 18:03:14 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 09 Jul 2008 23:03:14 -0000
Subject: [llvm-commits] [llvm] r53377 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAGNodes.h
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Message-ID: <200807092303.m69N3EIV009453@zion.cs.uiuc.edu>

Author: djg
Date: Wed Jul  9 18:03:14 2008
New Revision: 53377

URL: http://llvm.org/viewvc/llvm-project?rev=53377&view=rev
Log:
Simplify hasNUsesOfValue and hasAnyUsesOfValue even more. This
makes their special-case checks of use_size() less beneficial,
so remove them. This eliminates all but one use of use_size(),
which is in AssignTopologicalOrder, which uses it only once for
each node, and so can reasonably afford to recompute it, as
this allows the UsesSize field of SDNode to be removed
altogether.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=53377&r1=53376&r2=53377&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Wed Jul  9 18:03:14 2008
@@ -1048,9 +1048,6 @@
   /// NumOperands/NumValues - The number of entries in the Operand/Value list.
   unsigned short NumOperands, NumValues;
   
-  /// UsesSize - The size of the uses list.
-  unsigned UsesSize;
-
   /// Uses - List of uses for this SDNode.
   SDUse *Uses;
 
@@ -1075,9 +1072,11 @@
     return NodeType - ISD::BUILTIN_OP_END;
   }
 
-  size_t use_size() const { return UsesSize; }
+  size_t use_size() const { return std::distance(use_begin(), use_end()); }
   bool use_empty() const { return Uses == NULL; }
-  bool hasOneUse() const { return use_size() == 1; }
+  bool hasOneUse() const {
+    return !use_empty() && next(use_begin()) == use_end();
+  }
 
   /// getNodeId - Return the unique node id.
   ///
@@ -1249,7 +1248,7 @@
   }
 
   SDNode(unsigned Opc, SDVTList VTs, const SDOperand *Ops, unsigned NumOps)
-    : NodeType(Opc), NodeId(-1), UsesSize(0), Uses(NULL) {
+    : NodeType(Opc), NodeId(-1), Uses(NULL) {
     OperandsNeedDelete = true;
     NumOperands = NumOps;
     OperandList = NumOps ? new SDUse[NumOperands] : 0;
@@ -1258,7 +1257,6 @@
       OperandList[i] = Ops[i];
       OperandList[i].setUser(this);
       Ops[i].Val->addUse(OperandList[i]);
-      ++Ops[i].Val->UsesSize;
     }
     
     ValueList = VTs.VTs;
@@ -1266,7 +1264,7 @@
   }
 
   SDNode(unsigned Opc, SDVTList VTs, const SDUse *Ops, unsigned NumOps)
-    : NodeType(Opc), NodeId(-1), UsesSize(0), Uses(NULL) {
+    : NodeType(Opc), NodeId(-1), Uses(NULL) {
     OperandsNeedDelete = true;
     NumOperands = NumOps;
     OperandList = NumOps ? new SDUse[NumOperands] : 0;
@@ -1275,7 +1273,6 @@
       OperandList[i] = Ops[i];
       OperandList[i].setUser(this);
       Ops[i].getSDOperand().Val->addUse(OperandList[i]);
-      ++Ops[i].getSDOperand().Val->UsesSize;
     }
     
     ValueList = VTs.VTs;
@@ -1283,7 +1280,7 @@
   }
 
   SDNode(unsigned Opc, SDVTList VTs)
-    : NodeType(Opc), NodeId(-1), UsesSize(0), Uses(NULL) {
+    : NodeType(Opc), NodeId(-1), Uses(NULL) {
     OperandsNeedDelete = false;  // Operands set with InitOperands.
     NumOperands = 0;
     OperandList = 0;
@@ -1298,13 +1295,11 @@
     assert(OperandList == 0 && "Operands already set!");
     NumOperands = NumOps;
     OperandList = Ops;
-    UsesSize = 0;
     Uses = NULL;
     
     for (unsigned i = 0; i != NumOps; ++i) {
       OperandList[i].setUser(this);
       Ops[i].getVal()->addUse(OperandList[i]);
-      ++Ops[i].getVal()->UsesSize;
     }
   }
 
@@ -1323,14 +1318,12 @@
   void addUser(unsigned i, SDNode *User) {
     assert(User->OperandList[i].getUser() && "Node without parent");
     addUse(User->OperandList[i]);
-    ++UsesSize;
   }
 
   void removeUser(unsigned i, SDNode *User) {
     assert(User->OperandList[i].getUser() && "Node without parent");
     SDUse &Op = User->OperandList[i];
     Op.removeFromList();
-    --UsesSize;
   }
 };
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53377&r1=53376&r2=53377&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Jul  9 18:03:14 2008
@@ -3749,7 +3749,6 @@
     OperandList[i].setUser(this);
     SDNode *N = OperandList[i].getVal();
     N->addUser(i, this);
-    ++N->UsesSize;
     DeadNodeSet.erase(N);
   }
 
@@ -4394,16 +4393,9 @@
 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
   assert(Value < getNumValues() && "Bad value!");
 
-  // If there is only one value, this is easy.
-  if (getNumValues() == 1)
-    return use_size() == NUses;
-  if (use_size() < NUses) return false;
-
-  SDOperand TheValue(const_cast<SDNode *>(this), Value);
-
   // TODO: Only iterate over uses of a given value of the node
   for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
-    if (*UI == TheValue) {
+    if (UI->getSDOperand().ResNo == Value) {
       if (NUses == 0)
         return false;
       --NUses;
@@ -4420,12 +4412,8 @@
 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
   assert(Value < getNumValues() && "Bad value!");
 
-  if (use_empty()) return false;
-
-  SDOperand TheValue(const_cast<SDNode *>(this), Value);
-
   for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
-    if (UI->getSDOperand() == TheValue)
+    if (UI->getSDOperand().ResNo == Value)
       return true;
 
   return false;




From resistor at mac.com  Wed Jul  9 18:09:10 2008
From: resistor at mac.com (Owen Anderson)
Date: Wed, 09 Jul 2008 23:09:10 -0000
Subject: [llvm-commits] [llvm] r53378 -
	/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
Message-ID: <200807092309.m69N9A2Y009625@zion.cs.uiuc.edu>

Author: resistor
Date: Wed Jul  9 18:09:10 2008
New Revision: 53378

URL: http://llvm.org/viewvc/llvm-project?rev=53378&view=rev
Log:
Revert r53367, which was breaking things.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53378&r1=53377&r2=53378&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Wed Jul  9 18:09:10 2008
@@ -592,7 +592,9 @@
           
           // If this is a two address instr, then we don't mark the def
           // as killing the use.
-          if (last->second.first == I) {
+          if (last->second.first == I &&
+              I->getDesc().getOperandConstraint(last->second.second,
+                                                TOI::TIED_TO) == (signed)i) {
             LastUseDef[MO.getReg()] = std::make_pair(I, i);
             continue;
           }




From evan.cheng at apple.com  Wed Jul  9 19:04:23 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 10 Jul 2008 00:04:23 -0000
Subject: [llvm-commits] [llvm] r53379 - in /llvm/trunk:
 include/llvm/Support/Mangler.h lib/VMCore/Mangler.cpp
Message-ID: <200807100004.m6A04Nx1011333@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Jul  9 19:04:23 2008
New Revision: 53379

URL: http://llvm.org/viewvc/llvm-project?rev=53379&view=rev
Log:
- Replace use of std::map<std::string, ..> with StringMap. Replace use of std::map with DenseMap, std::set with SmallPtrSet. This results in minor speed up.
- Some code clean up.

Modified:
    llvm/trunk/include/llvm/Support/Mangler.h
    llvm/trunk/lib/VMCore/Mangler.cpp

Modified: llvm/trunk/include/llvm/Support/Mangler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/Mangler.h?rev=53379&r1=53378&r2=53379&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/Mangler.h (original)
+++ llvm/trunk/include/llvm/Support/Mangler.h Wed Jul  9 19:04:23 2008
@@ -15,8 +15,7 @@
 #define LLVM_SUPPORT_MANGLER_H
 
 #include "llvm/ADT/DenseMap.h"
-#include <map>
-#include <set>
+#include "llvm/ADT/SmallPtrSet.h"
 #include <string>
 
 namespace llvm {
@@ -49,13 +48,13 @@
   
   /// TypeMap - If the client wants us to unique types, this keeps track of the
   /// current assignments and TypeCounter keeps track of the next id to assign.
-  std::map<const Type*, unsigned> TypeMap;
+  DenseMap<const Type*, unsigned> TypeMap;
   unsigned TypeCounter;
 
   /// This keeps track of which global values have had their names
   /// mangled in the current module.
   ///
-  std::set<const GlobalValue*> MangledGlobals;
+  SmallPtrSet<const GlobalValue*, 16> MangledGlobals;
   
   /// AcceptableChars - This bitfield contains a one for each character that is
   /// allowed to be part of an unmangled name.
@@ -87,10 +86,6 @@
     return (AcceptableChars[X/32] & (1 << (X&31))) != 0;
   }
   
-  /// getTypeID - Return a unique ID for the specified LLVM type.
-  ///
-  unsigned getTypeID(const Type *Ty);
-
   /// getValueName - Returns the mangled name of V, an LLVM Value,
   /// in the current module.
   ///
@@ -105,9 +100,11 @@
   /// from getValueName.
   ///
   std::string makeNameProper(const std::string &x, const char *Prefix = "");
-  
+
 private:
-  void InsertName(GlobalValue *GV, std::map<std::string, GlobalValue*> &Names);
+  /// getTypeID - Return a unique ID for the specified LLVM type.
+  ///
+  unsigned getTypeID(const Type *Ty);
 };
 
 } // End llvm namespace

Modified: llvm/trunk/lib/VMCore/Mangler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Mangler.cpp?rev=53379&r1=53378&r2=53379&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/Mangler.cpp (original)
+++ llvm/trunk/lib/VMCore/Mangler.cpp Wed Jul  9 19:04:23 2008
@@ -16,6 +16,7 @@
 #include "llvm/Module.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/StringExtras.h"
+#include "llvm/ADT/StringMap.h"
 using namespace llvm;
 
 static char HexDigit(int V) {
@@ -138,7 +139,7 @@
   // - If V is an intrinsic function, do not change name at all
   // - Otherwise, mangling occurs if global collides with existing name.
   if (isa<Function>(GV) && cast<Function>(GV)->isIntrinsic()) {
-    Name = GV->getName(); // Is an intrinsic function
+    Name = GV->getNameStart(); // Is an intrinsic function
   } else if (!GV->hasName()) {
     // Must mangle the global into a unique ID.
     unsigned TypeUniqueID = getTypeID(GV->getType());
@@ -154,34 +155,35 @@
   return Name;
 }
 
-void Mangler::InsertName(GlobalValue *GV,
-                         std::map<std::string, GlobalValue*> &Names) {
+static void InsertName(GlobalValue *GV, StringMap<GlobalValue*> &Names,
+                       SmallPtrSet<const GlobalValue*, 16> &MangledGlobals) {
   if (!GV->hasName())   // We must mangle unnamed globals.
     return;
 
   // Figure out if this is already used.
-  GlobalValue *&ExistingValue = Names[GV->getName()];
+  GlobalValue *&ExistingValue = Names[GV->getNameStart()];
   if (!ExistingValue) {
     ExistingValue = GV;
+    return;
+  }
+
+  // If GV is external but the existing one is static, mangle the existing one
+  if ((GV->hasExternalLinkage() || GV->hasDLLImportLinkage()) &&
+      !(ExistingValue->hasExternalLinkage()
+        || ExistingValue->hasDLLImportLinkage())) {
+    MangledGlobals.insert(ExistingValue);
+    ExistingValue = GV;
+  } else if ((GV->hasExternalLinkage() ||
+              GV->hasDLLImportLinkage()) &&
+             (ExistingValue->hasExternalLinkage() ||
+              ExistingValue->hasDLLImportLinkage()) &&
+             GV->isDeclaration() &&
+             ExistingValue->isDeclaration()) {
+    // If the two globals both have external inkage, and are both external,
+    // don't mangle either of them, we just have some silly type mismatch.
   } else {
-    // If GV is external but the existing one is static, mangle the existing one
-    if ((GV->hasExternalLinkage() || GV->hasDLLImportLinkage()) &&
-        !(ExistingValue->hasExternalLinkage()
-          || ExistingValue->hasDLLImportLinkage())) {
-      MangledGlobals.insert(ExistingValue);
-      ExistingValue = GV;
-    } else if ((GV->hasExternalLinkage() ||
-                GV->hasDLLImportLinkage()) &&
-               (ExistingValue->hasExternalLinkage() ||
-                ExistingValue->hasDLLImportLinkage()) &&
-               GV->isDeclaration() &&
-               ExistingValue->isDeclaration()) {
-      // If the two globals both have external inkage, and are both external,
-      // don't mangle either of them, we just have some silly type mismatch.
-    } else {
-      // Otherwise, mangle GV
-      MangledGlobals.insert(GV);
-    }
+    // Otherwise, mangle GV
+    MangledGlobals.insert(GV);
   }
 }
 
@@ -206,11 +208,10 @@
     
   // Calculate which global values have names that will collide when we throw
   // away type information.
-  std::map<std::string, GlobalValue*> Names;
+  StringMap<GlobalValue*> Names;
   for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I)
-    InsertName(I, Names);
+    InsertName(I, Names, MangledGlobals);
   for (Module::global_iterator I = M.global_begin(), E = M.global_end();
-       I != E;
-       ++I)
-    InsertName(I, Names);
+       I != E; ++I)
+    InsertName(I, Names, MangledGlobals);
 }




From sabre at nondot.org  Wed Jul  9 19:08:17 2008
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 10 Jul 2008 00:08:17 -0000
Subject: [llvm-commits] [llvm] r53380 - in /llvm/trunk:
 lib/VMCore/ConstantFold.cpp
 test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
Message-ID: <200807100008.m6A08HwT011469@zion.cs.uiuc.edu>

Author: lattner
Date: Wed Jul  9 19:08:17 2008
New Revision: 53380

URL: http://llvm.org/viewvc/llvm-project?rev=53380&view=rev
Log:
elementwise comparison of vector constants was completely wrong.  Fix
it for PR2529

Modified:
    llvm/trunk/lib/VMCore/ConstantFold.cpp
    llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll

Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantFold.cpp?rev=53380&r1=53379&r2=53380&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/ConstantFold.cpp (original)
+++ llvm/trunk/lib/VMCore/ConstantFold.cpp Wed Jul  9 19:08:17 2008
@@ -1350,27 +1350,40 @@
     }
   } else if (const ConstantVector *CP1 = dyn_cast<ConstantVector>(C1)) {
     if (const ConstantVector *CP2 = dyn_cast<ConstantVector>(C2)) {
-      if (pred == FCmpInst::FCMP_OEQ || pred == FCmpInst::FCMP_UEQ) {
-        for (unsigned i = 0, e = CP1->getNumOperands(); i != e; ++i) {
-          Constant *C = ConstantExpr::getFCmp(FCmpInst::FCMP_OEQ,
-                                              CP1->getOperand(i),
-                                              CP2->getOperand(i));
-          if (ConstantInt *CB = dyn_cast<ConstantInt>(C))
-            return CB;
-        }
-        // Otherwise, could not decide from any element pairs.
-        return 0;
-      } else if (pred == ICmpInst::ICMP_EQ) {
-        for (unsigned i = 0, e = CP1->getNumOperands(); i != e; ++i) {
-          Constant *C = ConstantExpr::getICmp(ICmpInst::ICMP_EQ,
-                                              CP1->getOperand(i),
-                                              CP2->getOperand(i));
-          if (ConstantInt *CB = dyn_cast<ConstantInt>(C))
-            return CB;
+      // If we can constant fold the comparison of each element, constant fold
+      // the whole vector comparison.
+      SmallVector<Constant*, 4> Elts;
+      const Type *InEltTy = CP1->getOperand(0)->getType();
+      bool isFP = InEltTy->isFloatingPoint();
+      const Type *ResEltTy = InEltTy;
+      if (isFP)
+        ResEltTy = IntegerType::get(InEltTy->getPrimitiveSizeInBits());
+      
+      for (unsigned i = 0, e = CP1->getNumOperands(); i != e; ++i) {
+        // Compare the elements, producing an i1 result or constant expr.
+        Constant *C;
+        if (isFP)
+          C = ConstantExpr::getFCmp(pred, CP1->getOperand(i),
+                                    CP2->getOperand(i));
+        else
+          C = ConstantExpr::getICmp(pred, CP1->getOperand(i),
+                                    CP2->getOperand(i));
+
+        // If it is a bool or undef result, convert to the dest type.
+        if (ConstantInt *CI = dyn_cast<ConstantInt>(C)) {
+          if (CI->isZero())
+            Elts.push_back(Constant::getNullValue(ResEltTy));
+          else
+            Elts.push_back(Constant::getAllOnesValue(ResEltTy));
+        } else if (isa<UndefValue>(C)) {
+          Elts.push_back(UndefValue::get(ResEltTy));
+        } else {
+          break;
         }
-        // Otherwise, could not decide from any element pairs.
-        return 0;
       }
+      
+      if (Elts.size() == CP1->getNumOperands())
+        return ConstantVector::get(&Elts[0], Elts.size());
     }
   }
 

Modified: llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll?rev=53380&r1=53379&r2=53380&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll (original)
+++ llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll Wed Jul  9 19:08:17 2008
@@ -6,9 +6,17 @@
         ret <4 x i32> %foo
 }
 
-define <4 x i32> @main(i32 %argc, i8** %argv) {
+define <4 x i32> @test2(i32 %argc, i8** %argv) {
 entry:  
         %foo = vicmp slt <4 x i32> <i32 undef, i32 undef, i32 undef, i32
 undef>, <i32 undef, i32 undef, i32 undef, i32 undef>
         ret <4 x i32> %foo
 }
+
+
+define <4 x i32> @test3() {
+       %foo = vfcmp ueq <4 x float> <float 0.0, float 0.0, float 0.0, float
+undef>, <float 1.0, float 1.0, float 1.0, float undef>
+	ret <4 x i32> %foo
+}
+




From sabre at nondot.org  Wed Jul  9 19:28:11 2008
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 10 Jul 2008 00:28:11 -0000
Subject: [llvm-commits] [llvm] r53381 - /llvm/trunk/lib/VMCore/Constants.cpp
Message-ID: <200807100028.m6A0SBJ5012081@zion.cs.uiuc.edu>

Author: lattner
Date: Wed Jul  9 19:28:11 2008
New Revision: 53381

URL: http://llvm.org/viewvc/llvm-project?rev=53381&view=rev
Log:
add a helper method for code that wants to handle vector
constants by element without caring how they are formed.

Modified:
    llvm/trunk/lib/VMCore/Constants.cpp

Modified: llvm/trunk/lib/VMCore/Constants.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=53381&r1=53380&r2=53381&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/Constants.cpp (original)
+++ llvm/trunk/lib/VMCore/Constants.cpp Wed Jul  9 19:28:11 2008
@@ -155,6 +155,31 @@
 }
 
 
+/// getVectorElements - This method, which is only valid on constant of vector
+/// type, returns the elements of the vector in the specified smallvector.
+/// This handles breaking down a vector undef into undef elements, etc.
+void Constant::getVectorElements(SmallVectorImpl<Constant*> &Elts) const {
+  assert(isa<VectorType>(getType()) && "Not a vector constant!");
+  
+  if (const ConstantVector *CV = dyn_cast<ConstantVector>(this)) {
+    for (unsigned i = 0, e = CV->getNumOperands(); i != e; ++i)
+      Elts.push_back(CV->getOperand(i));
+    return;
+  }
+  
+  const VectorType *VT = cast<VectorType>(getType());
+  if (isa<ConstantAggregateZero>(this)) {
+    Elts.assign(VT->getNumElements(), 
+                Constant::getNullValue(VT->getElementType()));
+    return;
+  }
+  
+  assert(isa<UndefValue>(this) && "Unknown vector constant type!");
+  Elts.assign(VT->getNumElements(), UndefValue::get(VT->getElementType()));
+}
+
+
+
 //===----------------------------------------------------------------------===//
 //                                ConstantInt
 //===----------------------------------------------------------------------===//




From sabre at nondot.org  Wed Jul  9 19:28:34 2008
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 10 Jul 2008 00:28:34 -0000
Subject: [llvm-commits] [llvm] r53382 - /llvm/trunk/include/llvm/Constant.h
Message-ID: <200807100028.m6A0SYPB012108@zion.cs.uiuc.edu>

Author: lattner
Date: Wed Jul  9 19:28:34 2008
New Revision: 53382

URL: http://llvm.org/viewvc/llvm-project?rev=53382&view=rev
Log:
add a helper method for code that wants to handle vector
constants by element without caring how they are formed.

Modified:
    llvm/trunk/include/llvm/Constant.h

Modified: llvm/trunk/include/llvm/Constant.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constant.h?rev=53382&r1=53381&r2=53382&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Constant.h (original)
+++ llvm/trunk/include/llvm/Constant.h Wed Jul  9 19:28:34 2008
@@ -17,6 +17,7 @@
 #include "llvm/User.h"
 
 namespace llvm {
+  template<typename T> class SmallVectorImpl;
 
 /// This is an important base class in LLVM. It provides the common facilities
 /// of all constant values in an LLVM program. A constant is a value that is
@@ -79,6 +80,11 @@
   void setOperand(unsigned i, Constant *C) {
     User::setOperand(i, C);
   }
+  
+  /// getVectorElements - This method, which is only valid on constant of vector
+  /// type, returns the elements of the vector in the specified smallvector.
+  /// This handles breaking down a vector undef into undef elements, etc.
+  void getVectorElements(SmallVectorImpl<Constant*> &Elts) const;
 
   /// destroyConstant - Called if some element of this constant is no longer
   /// valid.  At this point only other constants may be on the use_list for this




From sabre at nondot.org  Wed Jul  9 19:29:28 2008
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 10 Jul 2008 00:29:28 -0000
Subject: [llvm-commits] [llvm] r53383 - in /llvm/trunk:
 lib/VMCore/ConstantFold.cpp
 test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
Message-ID: <200807100029.m6A0TSU1012171@zion.cs.uiuc.edu>

Author: lattner
Date: Wed Jul  9 19:29:28 2008
New Revision: 53383

URL: http://llvm.org/viewvc/llvm-project?rev=53383&view=rev
Log:
Fix a case where vector comparison constant folding would cause an
infinite recursion.  part of PR2529

Modified:
    llvm/trunk/lib/VMCore/ConstantFold.cpp
    llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll

Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantFold.cpp?rev=53383&r1=53382&r2=53383&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/ConstantFold.cpp (original)
+++ llvm/trunk/lib/VMCore/ConstantFold.cpp Wed Jul  9 19:29:28 2008
@@ -1348,43 +1348,43 @@
       return ConstantInt::get(Type::Int1Ty, R==APFloat::cmpGreaterThan ||
                                             R==APFloat::cmpEqual);
     }
-  } else if (const ConstantVector *CP1 = dyn_cast<ConstantVector>(C1)) {
-    if (const ConstantVector *CP2 = dyn_cast<ConstantVector>(C2)) {
-      // If we can constant fold the comparison of each element, constant fold
-      // the whole vector comparison.
-      SmallVector<Constant*, 4> Elts;
-      const Type *InEltTy = CP1->getOperand(0)->getType();
-      bool isFP = InEltTy->isFloatingPoint();
-      const Type *ResEltTy = InEltTy;
+  } else if (isa<VectorType>(C1->getType())) {
+    SmallVector<Constant*, 16> C1Elts, C2Elts;
+    C1->getVectorElements(C1Elts);
+    C2->getVectorElements(C2Elts);
+    
+    // If we can constant fold the comparison of each element, constant fold
+    // the whole vector comparison.
+    SmallVector<Constant*, 4> ResElts;
+    const Type *InEltTy = C1Elts[0]->getType();
+    bool isFP = InEltTy->isFloatingPoint();
+    const Type *ResEltTy = InEltTy;
+    if (isFP)
+      ResEltTy = IntegerType::get(InEltTy->getPrimitiveSizeInBits());
+    
+    for (unsigned i = 0, e = C1Elts.size(); i != e; ++i) {
+      // Compare the elements, producing an i1 result or constant expr.
+      Constant *C;
       if (isFP)
-        ResEltTy = IntegerType::get(InEltTy->getPrimitiveSizeInBits());
-      
-      for (unsigned i = 0, e = CP1->getNumOperands(); i != e; ++i) {
-        // Compare the elements, producing an i1 result or constant expr.
-        Constant *C;
-        if (isFP)
-          C = ConstantExpr::getFCmp(pred, CP1->getOperand(i),
-                                    CP2->getOperand(i));
+        C = ConstantExpr::getFCmp(pred, C1Elts[i], C2Elts[i]);
+      else
+        C = ConstantExpr::getICmp(pred, C1Elts[i], C2Elts[i]);
+
+      // If it is a bool or undef result, convert to the dest type.
+      if (ConstantInt *CI = dyn_cast<ConstantInt>(C)) {
+        if (CI->isZero())
+          ResElts.push_back(Constant::getNullValue(ResEltTy));
         else
-          C = ConstantExpr::getICmp(pred, CP1->getOperand(i),
-                                    CP2->getOperand(i));
-
-        // If it is a bool or undef result, convert to the dest type.
-        if (ConstantInt *CI = dyn_cast<ConstantInt>(C)) {
-          if (CI->isZero())
-            Elts.push_back(Constant::getNullValue(ResEltTy));
-          else
-            Elts.push_back(Constant::getAllOnesValue(ResEltTy));
-        } else if (isa<UndefValue>(C)) {
-          Elts.push_back(UndefValue::get(ResEltTy));
-        } else {
-          break;
-        }
+          ResElts.push_back(Constant::getAllOnesValue(ResEltTy));
+      } else if (isa<UndefValue>(C)) {
+        ResElts.push_back(UndefValue::get(ResEltTy));
+      } else {
+        break;
       }
-      
-      if (Elts.size() == CP1->getNumOperands())
-        return ConstantVector::get(&Elts[0], Elts.size());
     }
+    
+    if (ResElts.size() == C1Elts.size())
+      return ConstantVector::get(&ResElts[0], ResElts.size());
   }
 
   if (C1->getType()->isFloatingPoint()) {

Modified: llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll?rev=53383&r1=53382&r2=53383&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll (original)
+++ llvm/trunk/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll Wed Jul  9 19:29:28 2008
@@ -20,3 +20,9 @@
 	ret <4 x i32> %foo
 }
 
+define <4 x i32> @test4() {
+   %foo = vfcmp ueq <4 x float> <float 0.0, float 0.0, float 0.0, float 0.0>, <float 1.0, float 1.0, float 1.0, float 0.0>
+
+	ret <4 x i32> %foo
+}
+




From sabre at nondot.org  Wed Jul  9 19:44:03 2008
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 10 Jul 2008 00:44:03 -0000
Subject: [llvm-commits] [llvm] r53384 - /llvm/trunk/lib/VMCore/Constants.cpp
Message-ID: <200807100044.m6A0i4jh012630@zion.cs.uiuc.edu>

Author: lattner
Date: Wed Jul  9 19:44:03 2008
New Revision: 53384

URL: http://llvm.org/viewvc/llvm-project?rev=53384&view=rev
Log:
SImplify ConstantVector::get a bit and make it turn a vector
of all undefs into a single undef value.

Modified:
    llvm/trunk/lib/VMCore/Constants.cpp

Modified: llvm/trunk/lib/VMCore/Constants.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=53384&r1=53383&r2=53384&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/Constants.cpp (original)
+++ llvm/trunk/lib/VMCore/Constants.cpp Wed Jul  9 19:44:03 2008
@@ -1498,16 +1498,26 @@
 
 Constant *ConstantVector::get(const VectorType *Ty,
                               const std::vector<Constant*> &V) {
-  // If this is an all-zero vector, return a ConstantAggregateZero object
-  if (!V.empty()) {
-    Constant *C = V[0];
-    if (!C->isNullValue())
-      return VectorConstants->getOrCreate(Ty, V);
+  assert(!V.empty() && "Vectors can't be empty");
+  // If this is an all-undef or alll-zero vector, return a
+  // ConstantAggregateZero or UndefValue.
+  Constant *C = V[0];
+  bool isZero = C->isNullValue();
+  bool isUndef = isa<UndefValue>(C);
+
+  if (isZero || isUndef) {
     for (unsigned i = 1, e = V.size(); i != e; ++i)
-      if (V[i] != C)
-        return VectorConstants->getOrCreate(Ty, V);
+      if (V[i] != C) {
+        isZero = isUndef = false;
+        break;
+      }
   }
-  return ConstantAggregateZero::get(Ty);
+  
+  if (isZero)
+    return ConstantAggregateZero::get(Ty);
+  if (isUndef)
+    return UndefValue::get(Ty);
+  return VectorConstants->getOrCreate(Ty, V);
 }
 
 Constant *ConstantVector::get(const std::vector<Constant*> &V) {




From sabre at nondot.org  Wed Jul  9 19:52:20 2008
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 10 Jul 2008 00:52:20 -0000
Subject: [llvm-commits] [llvm] r53385 -
	/llvm/trunk/lib/System/DynamicLibrary.cpp
Message-ID: <200807100052.m6A0qKHb012911@zion.cs.uiuc.edu>

Author: lattner
Date: Wed Jul  9 19:52:20 2008
New Revision: 53385

URL: http://llvm.org/viewvc/llvm-project?rev=53385&view=rev
Log:
open plugins with RTLD_GLOBAL, pointed out by Bram Adams.

Modified:
    llvm/trunk/lib/System/DynamicLibrary.cpp

Modified: llvm/trunk/lib/System/DynamicLibrary.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/DynamicLibrary.cpp?rev=53385&r1=53384&r2=53385&view=diff

==============================================================================
--- llvm/trunk/lib/System/DynamicLibrary.cpp (original)
+++ llvm/trunk/lib/System/DynamicLibrary.cpp Wed Jul  9 19:52:20 2008
@@ -61,7 +61,7 @@
 
 bool DynamicLibrary::LoadLibraryPermanently(const char *Filename,
                                             std::string *ErrMsg) {
-  void *H = dlopen(Filename, RTLD_LAZY);
+  void *H = dlopen(Filename, RTLD_LAZY|RTLD_GLOBAL);
   if (H == 0) {
     if (ErrMsg)
       *ErrMsg = dlerror();




From evan.cheng at apple.com  Wed Jul  9 20:08:23 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 10 Jul 2008 01:08:23 -0000
Subject: [llvm-commits] [llvm] r53386 - in /llvm/trunk:
 lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/vec_set-J.ll
Message-ID: <200807100108.m6A18N9i013542@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Jul  9 20:08:23 2008
New Revision: 53386

URL: http://llvm.org/viewvc/llvm-project?rev=53386&view=rev
Log:
Fix for PR2472. Use movss to set lower 32-bits of a zero XMM vector.

Added:
    llvm/trunk/test/CodeGen/X86/vec_set-J.ll
Modified:
    llvm/trunk/lib/Target/X86/X86InstrSSE.td

Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=53386&r1=53385&r2=53386&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Wed Jul  9 20:08:23 2008
@@ -2870,6 +2870,8 @@
           (MOVLSS2PSrr (V_SET0), FR32:$src)>, Requires<[HasSSE2]>;
 def : Pat<(v4f32 (X86vzmovl (v4f32 VR128:$src))),
           (MOVLPSrr (V_SET0), VR128:$src)>, Requires<[HasSSE2]>;
+def : Pat<(v4i32 (X86vzmovl (v4i32 VR128:$src))),
+          (MOVLPSrr (V_SET0), VR128:$src)>, Requires<[HasSSE2]>;
 }
 
 // Splat v2f64 / v2i64

Added: llvm/trunk/test/CodeGen/X86/vec_set-J.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-J.ll?rev=53386&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_set-J.ll (added)
+++ llvm/trunk/test/CodeGen/X86/vec_set-J.ll Wed Jul  9 20:08:23 2008
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movss
+; PR2472
+
+define <4 x i32> @a(<4 x i32> %a) nounwind {
+entry:
+        %vecext = extractelement <4 x i32> %a, i32 0
+        insertelement <4 x i32> zeroinitializer, i32 %vecext, i32 0
+        %add = add <4 x i32> %a, %0
+        ret <4 x i32> %add
+}




From sabre at nondot.org  Wed Jul  9 20:09:34 2008
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 10 Jul 2008 01:09:34 -0000
Subject: [llvm-commits] [llvm] r53387 -
	/llvm/trunk/lib/Linker/LinkModules.cpp
Message-ID: <200807100109.m6A19YUi013605@zion.cs.uiuc.edu>

Author: lattner
Date: Wed Jul  9 20:09:33 2008
New Revision: 53387

URL: http://llvm.org/viewvc/llvm-project?rev=53387&view=rev
Log:
The source and dest of an alias are *not* required to have the same type,
though that would be nice and make sense :).  Patch by Nathan Keynes!

Modified:
    llvm/trunk/lib/Linker/LinkModules.cpp

Modified: llvm/trunk/lib/Linker/LinkModules.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=53387&r1=53386&r2=53387&view=diff

==============================================================================
--- llvm/trunk/lib/Linker/LinkModules.cpp (original)
+++ llvm/trunk/lib/Linker/LinkModules.cpp Wed Jul  9 20:09:33 2008
@@ -714,9 +714,7 @@
 
       // If types don't agree due to opaque types, try to resolve them.
       if (DGV && DGV->getType() != SGA->getType())
-        if (RecursiveResolveTypes(SGA->getType(), DGV->getType()))
-          return Error(Err, "Alias Collision on '" + SGA->getName()+
-                       "': aliases have different types");
+        RecursiveResolveTypes(SGA->getType(), DGV->getType());
     }
 
     if (!DGV && !SGA->hasInternalLinkage()) {
@@ -724,9 +722,7 @@
 
       // If types don't agree due to opaque types, try to resolve them.
       if (DGV && DGV->getType() != SGA->getType())
-        if (RecursiveResolveTypes(SGA->getType(), DGV->getType()))
-          return Error(Err, "Alias Collision on '" + SGA->getName()+
-                       "': aliases have different types");
+        RecursiveResolveTypes(SGA->getType(), DGV->getType());
     }
 
     if (!DGV && !SGA->hasInternalLinkage()) {
@@ -734,9 +730,7 @@
 
       // If types don't agree due to opaque types, try to resolve them.
       if (DGV && DGV->getType() != SGA->getType())
-        if (RecursiveResolveTypes(SGA->getType(), DGV->getType()))
-          return Error(Err, "Alias Collision on '" + SGA->getName()+
-                       "': aliases have different types");
+        RecursiveResolveTypes(SGA->getType(), DGV->getType());
     }
 
     // No linking to be performed on internal stuff.




From resistor at mac.com  Wed Jul  9 20:44:28 2008
From: resistor at mac.com (Owen Anderson)
Date: Thu, 10 Jul 2008 01:44:28 -0000
Subject: [llvm-commits] [llvm] r53388 -
	/llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp
Message-ID: <200807100144.m6A1iSxB014794@zion.cs.uiuc.edu>

Author: resistor
Date: Wed Jul  9 20:44:27 2008
New Revision: 53388

URL: http://llvm.org/viewvc/llvm-project?rev=53388&view=rev
Log:
Fix the build by adding a #include.

Modified:
    llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp?rev=53388&r1=53387&r2=53388&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcAsmPrinter.cpp Wed Jul  9 20:44:27 2008
@@ -32,6 +32,7 @@
 #include "llvm/Support/MathExtras.h"
 #include <cctype>
 #include <cstring>
+#include <map>
 using namespace llvm;
 
 STATISTIC(EmittedInsts, "Number of machine instrs printed");




From resistor at mac.com  Wed Jul  9 20:53:01 2008
From: resistor at mac.com (Owen Anderson)
Date: Thu, 10 Jul 2008 01:53:01 -0000
Subject: [llvm-commits] [llvm] r53389 -
	/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
Message-ID: <200807100153.m6A1r1lG015062@zion.cs.uiuc.edu>

Author: resistor
Date: Wed Jul  9 20:53:01 2008
New Revision: 53389

URL: http://llvm.org/viewvc/llvm-project?rev=53389&view=rev
Log:
Fix 403.gcc.  Finally got the check for two-address-ness correct.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53389&r1=53388&r2=53389&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Wed Jul  9 20:53:01 2008
@@ -589,20 +589,24 @@
         std::map<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
           last = LastUseDef.find(MO.getReg());
         if (last != LastUseDef.end()) {
-          
-          // If this is a two address instr, then we don't mark the def
-          // as killing the use.
-          if (last->second.first == I &&
-              I->getDesc().getOperandConstraint(last->second.second,
-                                                TOI::TIED_TO) == (signed)i) {
-            LastUseDef[MO.getReg()] = std::make_pair(I, i);
-            continue;
+          // Check if this is a two address instruction.  If so, then
+          // the def does not kill the use.
+          if (last->second.first == I) {
+            bool isTwoAddr = false;
+            for (unsigned j = i+1, je = I->getDesc().getNumOperands();
+                j < je; ++j) {
+              const MachineOperand &MO2 = I->getOperand(j);
+              if (MO2.isRegister() && MO2.isUse() &&
+                  MO2.getReg() == MO.getReg() &&
+                  I->getDesc().getOperandConstraint(j, TOI::TIED_TO) == (int)i)
+                isTwoAddr = true;
+            }
+
+            if (isTwoAddr) continue;
           }
-            
           
           MachineOperand& lastUD =
                       last->second.first->getOperand(last->second.second);
-          
           if (lastUD.isDef())
             lastUD.setIsDead(true);
           else if (lastUD.isUse())




From resistor at mac.com  Wed Jul  9 20:56:35 2008
From: resistor at mac.com (Owen Anderson)
Date: Thu, 10 Jul 2008 01:56:35 -0000
Subject: [llvm-commits] [llvm] r53390 -
	/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
Message-ID: <200807100156.m6A1uZcq015170@zion.cs.uiuc.edu>

Author: resistor
Date: Wed Jul  9 20:56:35 2008
New Revision: 53390

URL: http://llvm.org/viewvc/llvm-project?rev=53390&view=rev
Log:
Use DenseMap instead of std::map in local register allocation.  This improves the time on instcombine from .31s to .22s

Modified:
    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53390&r1=53389&r2=53390&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Wed Jul  9 20:56:35 2008
@@ -25,6 +25,7 @@
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/Compiler.h"
+#include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/IndexedMap.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
@@ -561,13 +562,25 @@
   return false;
 }
 
+namespace llvm {
+  template<> struct DenseMapInfo<uint32_t> {
+    static inline uint32_t getEmptyKey() { return ~0; }
+    static inline uint32_t getTombstoneKey() { return ~0 - 1; }
+    static unsigned getHashValue(const uint32_t& Val) { return Val * 37; }
+    static bool isPod() { return true; }
+    static bool isEqual(const uint32_t& LHS, const uint32_t& RHS) {
+      return LHS == RHS;
+    }
+  };
+}
+
 /// ComputeLocalLiveness - Computes liveness of registers within a basic
 /// block, setting the killed/dead flags as appropriate.
 void RALocal::ComputeLocalLiveness(MachineBasicBlock& MBB) {
   MachineRegisterInfo& MRI = MBB.getParent()->getRegInfo();
   // Keep track of the most recently seen previous use or def of each reg, 
   // so that we can update them with dead/kill markers.
-  std::map<unsigned, std::pair<MachineInstr*, unsigned> > LastUseDef;
+  DenseMap<unsigned, std::pair<MachineInstr*, unsigned> > LastUseDef;
   for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
        I != E; ++I) {
     for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
@@ -586,7 +599,7 @@
       //   - A def followed by a def is dead
       //   - A use followed by a def is a kill
       if (MO.isReg() && MO.getReg() && MO.isDef()) {
-        std::map<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
+        DenseMap<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
           last = LastUseDef.find(MO.getReg());
         if (last != LastUseDef.end()) {
           // Check if this is a two address instruction.  If so, then
@@ -633,7 +646,7 @@
   
   // Finally, loop over the final use/def of each reg 
   // in the block and determine if it is dead.
-  for (std::map<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
+  for (DenseMap<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
        I = LastUseDef.begin(), E = LastUseDef.end(); I != E; ++I) {
     MachineInstr* MI = I->second.first;
     unsigned idx = I->second.second;




From clattner at apple.com  Wed Jul  9 23:03:26 2008
From: clattner at apple.com (Chris Lattner)
Date: Wed, 9 Jul 2008 21:03:26 -0700
Subject: [llvm-commits] [llvm] r53390 -
	/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
In-Reply-To: <200807100156.m6A1uZcq015170@zion.cs.uiuc.edu>
References: <200807100156.m6A1uZcq015170@zion.cs.uiuc.edu>
Message-ID: <AC13C068-3C50-4146-B77D-72BA89A5B0F5@apple.com>


On Jul 9, 2008, at 6:56 PM, Owen Anderson wrote:

> Author: resistor
> Date: Wed Jul  9 20:56:35 2008
> New Revision: 53390
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53390&view=rev
> Log:
> Use DenseMap instead of std::map in local register allocation.  This  
> improves the time on instcombine from .31s to .22s

nice!

>       if (MO.isReg() && MO.getReg() && MO.isDef()) {
> -        std::map<unsigned, std::pair<MachineInstr*, unsigned>  
> >::iterator
> +        DenseMap<unsigned, std::pair<MachineInstr*, unsigned>  
> >::iterator
>           last = LastUseDef.find(MO.getReg());

Neither of these loops will care that iteration will be non- 
deterministic, will they?

-Chris

>
>         if (last != LastUseDef.end()) {
>           // Check if this is a two address instruction.  If so, then
> @@ -633,7 +646,7 @@
>
>   // Finally, loop over the final use/def of each reg
>   // in the block and determine if it is dead.
> -  for (std::map<unsigned, std::pair<MachineInstr*, unsigned>  
> >::iterator
> +  for (DenseMap<unsigned, std::pair<MachineInstr*, unsigned>  
> >::iterator
>        I = LastUseDef.begin(), E = LastUseDef.end(); I != E; ++I) {
>     MachineInstr* MI = I->second.first;
>     unsigned idx = I->second.second;
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From resistor at mac.com  Wed Jul  9 23:15:38 2008
From: resistor at mac.com (Owen Anderson)
Date: Wed, 09 Jul 2008 21:15:38 -0700
Subject: [llvm-commits] [llvm] r53390 -
 /llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
In-Reply-To: <AC13C068-3C50-4146-B77D-72BA89A5B0F5@apple.com>
References: <200807100156.m6A1uZcq015170@zion.cs.uiuc.edu>
	<AC13C068-3C50-4146-B77D-72BA89A5B0F5@apple.com>
Message-ID: <99C5AE50-4C4A-404F-848C-C27A3D420E9E@mac.com>


On Jul 9, 2008, at 9:03 PM, Chris Lattner wrote:

>
> On Jul 9, 2008, at 6:56 PM, Owen Anderson wrote:
>
>> Author: resistor
>> Date: Wed Jul  9 20:56:35 2008
>> New Revision: 53390
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=53390&view=rev
>> Log:
>> Use DenseMap instead of std::map in local register allocation.  This
>> improves the time on instcombine from .31s to .22s
>
> nice!
>
>>      if (MO.isReg() && MO.getReg() && MO.isDef()) {
>> -        std::map<unsigned, std::pair<MachineInstr*, unsigned>
>>> ::iterator
>> +        DenseMap<unsigned, std::pair<MachineInstr*, unsigned>
>>> ::iterator
>>          last = LastUseDef.find(MO.getReg());
>
> Neither of these loops will care that iteration will be non-
> deterministic, will they?
>

Nope.

--Owen
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From nicholas at mxc.ca  Thu Jul 10 00:51:40 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Thu, 10 Jul 2008 05:51:40 -0000
Subject: [llvm-commits] [llvm] r53393 - in /llvm/trunk:
 lib/Transforms/Scalar/InstructionCombining.cpp
 test/Transforms/InstCombine/2008-07-09-SubAndError.ll
Message-ID: <200807100551.m6A5pfZY022995@zion.cs.uiuc.edu>

Author: nicholas
Date: Thu Jul 10 00:51:40 2008
New Revision: 53393

URL: http://llvm.org/viewvc/llvm-project?rev=53393&view=rev
Log:
Fix overzealous optimization. Thanks to Duncan Sands for pointing out my error!

Added:
    llvm/trunk/test/Transforms/InstCombine/2008-07-09-SubAndError.ll
Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53393&r1=53392&r2=53393&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Thu Jul 10 00:51:40 2008
@@ -3462,16 +3462,21 @@
         if (Value *V = FoldLogicalPlusAnd(Op0LHS, Op0RHS, AndRHS, true, I))
           return BinaryOperator::CreateAnd(V, AndRHS);
 
-        // (A - N) & AndRHS -> -N & AndRHS where A & AndRHS == 0
-        if (Op0I->hasOneUse() && MaskedValueIsZero(Op0LHS, AndRHSMask)) {
+        // (A - N) & AndRHS -> -N & AndRHS iff A&AndRHS==0 and AndRHS
+        // has 1's for all bits that the subtraction with A might affect.
+        if (Op0I->hasOneUse()) {
+          uint32_t BitWidth = AndRHSMask.getBitWidth();
+          uint32_t Zeros = AndRHSMask.countLeadingZeros();
+          APInt Mask = APInt::getLowBitsSet(BitWidth, BitWidth - Zeros);
+
           ConstantInt *A = dyn_cast<ConstantInt>(Op0LHS);
-          if (!A || !A->isZero()) {
+          if (!(A && A->isZero()) &&               // avoid infinite recursion.
+              MaskedValueIsZero(Op0LHS, Mask)) {
             Instruction *NewNeg = BinaryOperator::CreateNeg(Op0RHS);
             InsertNewInstBefore(NewNeg, I);
             return BinaryOperator::CreateAnd(NewNeg, AndRHS);
           }
         }
-
         break;
 
       case Instruction::Shl:

Added: llvm/trunk/test/Transforms/InstCombine/2008-07-09-SubAndError.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-07-09-SubAndError.ll?rev=53393&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2008-07-09-SubAndError.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/2008-07-09-SubAndError.ll Thu Jul 10 00:51:40 2008
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep {sub i32 0}
+; PR2330
+
+define i32 @foo(i32 %a) nounwind {
+entry:
+  %A = sub i32 5, %a
+  %B = and i32 %A, 2
+  ret i32 %B
+}




From nicholas at mxc.ca  Thu Jul 10 00:52:59 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 09 Jul 2008 22:52:59 -0700
Subject: [llvm-commits] [llvm] r53271 - in /llvm/trunk:
 lib/Transforms/Scalar/InstructionCombining.cpp
 test/Transforms/InstCombine/2008-07-08-SubAnd.ll
In-Reply-To: <200807090956.32312.baldrick@free.fr>
References: <200807090432.m694WclY023187@zion.cs.uiuc.edu>
	<200807090956.32312.baldrick@free.fr>
Message-ID: <4875A3BB.1060009@mxc.ca>

Duncan Sands wrote:
> Hi Nick,
> 
>> +        // (A - N) & AndRHS -> -N & AndRHS where A & AndRHS == 0
> 
> this seems to be wrong for A = 5, N = 1, AndRHS = 2.

Thanks Duncan. The fix I used was to replace 'where A & AndRHS' with 
'where A & Mask' such that Mask = all 1's starting with the first 1 bit 
in AndRHS. That way AndRHS=2 causes Mask=3 and A&Mask = 1.

Nick



From clattner at apple.com  Thu Jul 10 01:11:04 2008
From: clattner at apple.com (Chris Lattner)
Date: Wed, 9 Jul 2008 23:11:04 -0700
Subject: [llvm-commits] [llvm] r53210 - in /llvm/trunk:
	include/llvm/ADT/alist.h include/llvm/ADT/alist_node.h
	include/llvm/ADT/ilist.h include/llvm/Support/Recycler.h
	include/llvm/Support/RecyclingAllocator.h
	include/llvm/SymbolTableListTraits.h lib/Support/Allocator.cpp
In-Reply-To: <200807072258.m67MwFQk016076@zion.cs.uiuc.edu>
References: <200807072258.m67MwFQk016076@zion.cs.uiuc.edu>
Message-ID: <76615F2C-9D2B-4C68-ABD0-95B1AEECA854@apple.com>


On Jul 7, 2008, at 3:58 PM, Dan Gohman wrote:

> Author: djg
> Date: Mon Jul  7 17:58:06 2008
> New Revision: 53210
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53210&view=rev
> Log:
> Add some basic Pool-allocation infrastructure. This adds a Recycler  
> class,
> for handling bookkeeping for deleted objects, as well as the alist  
> class
> template, for keeping lists of objects allocated from Recyclers, and  
> some
> related utilities.

This is very nice Dan.  Some minor comments:

> Added: llvm/trunk/include/llvm/ADT/alist_node.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/alist_node.h?rev=53210&view=auto
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/include/llvm/ADT/alist_node.h (added)
> +++ llvm/trunk/include/llvm/ADT/alist_node.h Mon Jul  7 17:58:06 2008
> @@ -0,0 +1,126 @@
> +//==- llvm/ADT/alist_node.h - Next/Prev helper class for alist --- 
> *- C++ -*-==//
> +//

>
> +
> +#include <cassert>
> +#include "llvm/ADT/ilist.h"
> +#include "llvm/Support/AlignOf.h"
> +#include "llvm/Support/DataTypes.h"

Please move the <cassert> #include to the end.  I think you only have  
the ilist #include for the partial specialization of ilist_traits.   
You can just forward declare ilist_traits and remove the #include if  
this is the case.

I really like your use of partial specialization here, very nice and  
tidy.

> +++ llvm/trunk/include/llvm/ADT/alist.h Mon Jul  7 17:58:06 2008
> @@ -0,0 +1,292 @@
> +//==- llvm/ADT/alist.h - Linked lists with hooks ----------------- 
> *- C++ -*-==//

What is the "a" stand for in alist?  please mention it here or in the  
file comment.

> +#ifndef LLVM_ADT_ALIST_H
> +#define LLVM_ADT_ALIST_H
> +
> +#include <cassert>
> +#include "llvm/ADT/alist_node.h"
> +#include "llvm/ADT/STLExtras.h"

cassert isn't needed.

> +// do not implement. this is to catch errors when people try to use
> +// them as random access iterators

isn't it better to just not implement them?  Then people will get a  
compile time error instead of a link-time one.

> +/// alist - This class is an ilist-style container that automatically
> +/// adds the next/prev pointers. It is designed to work in  
> cooperation
> +/// with <llvm/Support/Recycler.h>.

Would it be possible to replace ilist with this or merge alist and  
ilist?  When would someone use ilist vs alist?  When would someone use  
alist vs ilist?

FWIW, the name 'alist' is somewhat hard for me, I keep typing 'alias'.  
Maybe it's a form of finger/brain autocomplete :)

> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/include/llvm/Support/Recycler.h (added)
> +++ llvm/trunk/include/llvm/Support/Recycler.h Mon Jul  7 17:58:06  
> 2008

>
> +#ifndef LLVM_SUPPORT_RECYCLER_H
> +#define LLVM_SUPPORT_RECYCLER_H
> +
> +#include <cassert>
> +#include "llvm/ADT/alist_node.h"

<cassert> is dead.  System includes should be at end of #include list.

> +/// Recycler - This class manages a linked-list of deallocated nodes
> +/// and facilitates reusing deallocated memory in place of allocating
> +/// new memory. The objects it allocates are stored in alist_node
> +/// containers, so they may be used in alists.
> +///

Ok, if this is the motivation for alist, I have to ask: isn't it  
easier to just not try to use pointers in the nodes?  Why not blast  
over the first two words of the recycled memory with next/prev  
pointers regardless of what the type is?  It seems that doing so would  
simplify the design fairly substantially.

> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/include/llvm/Support/RecyclingAllocator.h (added)
> +++ llvm/trunk/include/llvm/Support/RecyclingAllocator.h Mon Jul  7  
> 17:58:06 2008
> +
> +#include <cassert>
> +#include "llvm/Support/Recycler.h"
> +#include "llvm/ADT/STLExtras.h"

cassert and STLExtras.h are both redundant.

>
> +
> +namespace llvm {
> +
> +/// RecyclingAllocator - This class wraps an Allocator, adding the
> +/// functionality of recycling deleted objects.
> +///
> +template<class AllocatorType, class T, class LargestT = T>
> +class RecyclingAllocator {

Very nice!

-Chris



From clattner at apple.com  Thu Jul 10 01:30:29 2008
From: clattner at apple.com (Chris Lattner)
Date: Wed, 9 Jul 2008 23:30:29 -0700
Subject: [llvm-commits] [llvm] r53211 - in /llvm/trunk:
	include/llvm/CodeGen/SelectionDAG.h
	include/llvm/CodeGen/SelectionDAGISel.h
	include/llvm/CodeGen/SelectionDAGNodes.h
	lib/CodeGen/SelectionDAG/SelectionDAG.cpp
	lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
In-Reply-To: <200807072302.m67N2hhL016253@zion.cs.uiuc.edu>
References: <200807072302.m67N2hhL016253@zion.cs.uiuc.edu>
Message-ID: <C3CFBB3D-45EA-4A2D-8A1A-7EEDE557DDB5@apple.com>


On Jul 7, 2008, at 4:02 PM, Dan Gohman wrote:

> Author: djg
> Date: Mon Jul  7 18:02:41 2008
> New Revision: 53211
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53211&view=rev
> Log:
> Pool-allocation for SDNodes. The pool is allocated once for each  
> function,
> and reused across SelectionDAGs.
>
> This drastically reduces the number of calls to malloc/free made  
> during
> instruction selection, and improves memory locality.

Very nice!

-Chris



From baldrick at free.fr  Thu Jul 10 01:33:32 2008
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 10 Jul 2008 08:33:32 +0200
Subject: [llvm-commits] [llvm] r53271 - in /llvm/trunk:
	lib/Transforms/Scalar/InstructionCombining.cpp
	test/Transforms/InstCombine/2008-07-08-SubAnd.ll
In-Reply-To: <4875A3BB.1060009@mxc.ca>
References: <200807090432.m694WclY023187@zion.cs.uiuc.edu>
	<200807090956.32312.baldrick@free.fr> <4875A3BB.1060009@mxc.ca>
Message-ID: <200807100833.32822.baldrick@free.fr>

Hi Nick,

> >> +        // (A - N) & AndRHS -> -N & AndRHS where A & AndRHS == 0
> > 
> > this seems to be wrong for A = 5, N = 1, AndRHS = 2.
> 
> Thanks Duncan. The fix I used was to replace 'where A & AndRHS' with 
> 'where A & Mask' such that Mask = all 1's starting with the first 1 bit 
> in AndRHS. That way AndRHS=2 causes Mask=3 and A&Mask = 1.

this looks ok: if M = Mask+1, then A & Mask = 0 means A mod M = 0.
Modulo arithmetic gives: (A - N) mod M = -N mod M.  Doing an additional
& AndRHS on the left- and right-hand side of this gives your simplification.
However, since this seems to be a combination of two simplifications, namely
modulo arithmetic and the transform (& Mask & AndRHS -> & AndRHS), mightn't
it be better to teach instcombine about each simplification individually?
In fact I'm kind of surprised it doesn't do these already.

Ciao,

Duncan.


From clattner at apple.com  Thu Jul 10 01:33:33 2008
From: clattner at apple.com (Chris Lattner)
Date: Wed, 9 Jul 2008 23:33:33 -0700
Subject: [llvm-commits] [llvm] r53212 - in /llvm/trunk:
	include/llvm/CodeGen/ lib/CodeGen/ lib/CodeGen/SelectionDAG/
	lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/
	lib/Target/IA64/ lib/Target/Mips/ lib/Target/PIC16/
	lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/
In-Reply-To: <200807072314.m67NER4K016634@zion.cs.uiuc.edu>
References: <200807072314.m67NER4K016634@zion.cs.uiuc.edu>
Message-ID: <F6A1196A-A8DE-4161-99A9-6DBC3CF217B7@apple.com>

On Jul 7, 2008, at 4:14 PM, Dan Gohman wrote:
> URL: http://llvm.org/viewvc/llvm-project?rev=53212&view=rev
> Log:
> Pool-allocation for MachineInstrs, MachineBasicBlocks, and
> MachineMemOperands. The pools are owned by MachineFunctions.
>
> This drastically reduces the number of calls to malloc/free made
> during the "Emit" phase of scheduling, as well as later phases
> in CodeGen. Combined with other changes, this speeds up the
> "instruction selection" phase of CodeGen by 10% in some cases.

Very nice Dan, this is great work!

> /// TID NULL and no operands.
> MachineInstr::MachineInstr()
>   : TID(0), NumImplicitOps(0), Parent(0) {
> -  // Make sure that we get added to a machine basicblock
> -  LeakDetector::addGarbageObject(this);
> }

Are you sure you want to disable the leak detector?  I realize that  
"leaks" won't actually leak memory (they will get freed when the  
function is done) but this sort of thing can indicate a serious logic  
error and can turn into a "leak" in the garbage collected sense.

-Chris


From nicholas at mxc.ca  Thu Jul 10 01:46:55 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 09 Jul 2008 23:46:55 -0700
Subject: [llvm-commits] [llvm] r53271 - in /llvm/trunk:
 lib/Transforms/Scalar/InstructionCombining.cpp
 test/Transforms/InstCombine/2008-07-08-SubAnd.ll
In-Reply-To: <200807100833.32822.baldrick@free.fr>
References: <200807090432.m694WclY023187@zion.cs.uiuc.edu>
	<200807090956.32312.baldrick@free.fr> <4875A3BB.1060009@mxc.ca>
	<200807100833.32822.baldrick@free.fr>
Message-ID: <4875B05F.7000708@mxc.ca>

Duncan Sands wrote:
> Hi Nick,
> 
>>>> +        // (A - N) & AndRHS -> -N & AndRHS where A & AndRHS == 0
>>> this seems to be wrong for A = 5, N = 1, AndRHS = 2.
>> Thanks Duncan. The fix I used was to replace 'where A & AndRHS' with 
>> 'where A & Mask' such that Mask = all 1's starting with the first 1 bit 
>> in AndRHS. That way AndRHS=2 causes Mask=3 and A&Mask = 1.
> 
> this looks ok: if M = Mask+1, then A & Mask = 0 means A mod M = 0.
> Modulo arithmetic gives: (A - N) mod M = -N mod M.  Doing an additional
> & AndRHS on the left- and right-hand side of this gives your simplification.

That's elegant. I certainly didn't work it through like that!

> However, since this seems to be a combination of two simplifications, namely
> modulo arithmetic and the transform (& Mask & AndRHS -> & AndRHS), mightn't
> it be better to teach instcombine about each simplification individually?
> In fact I'm kind of surprised it doesn't do these already.

I don't quite follow. How else, besides the presence of an 'and' 
instruction, would it know that's operating in a modulo space smaller 
than the one defined by the bitwidth of the integer type?

Were you suggesting that we look for 'urem' instructions where the right 
hand side isn't a power of 2? That wouldn't work correctly if the 
subtraction were to wrap around.

Nick



From baldrick at free.fr  Thu Jul 10 02:12:31 2008
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 10 Jul 2008 09:12:31 +0200
Subject: [llvm-commits] [llvm] r53271 - in /llvm/trunk:
	lib/Transforms/Scalar/InstructionCombining.cpp
	test/Transforms/InstCombine/2008-07-08-SubAnd.ll
In-Reply-To: <4875B05F.7000708@mxc.ca>
References: <200807090432.m694WclY023187@zion.cs.uiuc.edu>
	<200807100833.32822.baldrick@free.fr> <4875B05F.7000708@mxc.ca>
Message-ID: <200807100912.32135.baldrick@free.fr>

Hi,

> > However, since this seems to be a combination of two simplifications, namely
> > modulo arithmetic and the transform (& Mask & AndRHS -> & AndRHS), mightn't
> > it be better to teach instcombine about each simplification individually?
> > In fact I'm kind of surprised it doesn't do these already.
> 
> I don't quite follow. How else, besides the presence of an 'and' 
> instruction, would it know that's operating in a modulo space smaller 
> than the one defined by the bitwidth of the integer type?

Excellent question!  I hadn't though it through.

> Were you suggesting that we look for 'urem' instructions where the right 
> hand side isn't a power of 2? That wouldn't work correctly if the 
> subtraction were to wrap around.

Cases when urem would work are already transformed into 'and' I suppose?

Also, more generally you can transform
  (X binop Y) & Mask -> (X & Mask) binop (Y & Mask)
if binop = addition, subtraction or multiplication
and Mask = 2^X-1, because then &Mask is the same as
reducing modulo 2^X.

For example, in your (A - N) & AndMask example, if N&Mask = 0
then you can reduce this to A & AndMask.

Ciao,

Duncan.


From evan.cheng at apple.com  Thu Jul 10 02:35:44 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 10 Jul 2008 07:35:44 -0000
Subject: [llvm-commits] [llvm] r53394 - in /llvm/trunk:
 include/llvm/CodeGen/LiveIntervalAnalysis.h
 include/llvm/CodeGen/MachineInstr.h lib/CodeGen/LiveIntervalAnalysis.cpp
 lib/CodeGen/MachineInstr.cpp lib/CodeGen/RegAllocLocal.cpp
Message-ID: <200807100735.m6A7ZiRn028106@zion.cs.uiuc.edu>

Author: evancheng
Date: Thu Jul 10 02:35:43 2008
New Revision: 53394

URL: http://llvm.org/viewvc/llvm-project?rev=53394&view=rev
Log:
- Change the horrible N^2 isRegReDefinedByTwoAddr. Now callers must supply the operand index of def machineoperand and at most one full scan of non-implicit operands is needed.
- Change local register allocator to use the new isRegReDefinedByTwoAddr instead of reinventing the wheel.

Modified:
    llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h
    llvm/trunk/include/llvm/CodeGen/MachineInstr.h
    llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
    llvm/trunk/lib/CodeGen/MachineInstr.cpp
    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp

Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=53394&r1=53393&r2=53394&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original)
+++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Thu Jul 10 02:35:43 2008
@@ -328,14 +328,14 @@
     /// handleVirtualRegisterDef)
     void handleRegisterDef(MachineBasicBlock *MBB,
                            MachineBasicBlock::iterator MI, unsigned MIIdx,
-                           MachineOperand& MO);
+                           MachineOperand& MO, unsigned MOIdx);
 
     /// handleVirtualRegisterDef - update intervals for a virtual
     /// register def
     void handleVirtualRegisterDef(MachineBasicBlock *MBB,
                                   MachineBasicBlock::iterator MI,
                                   unsigned MIIdx, MachineOperand& MO,
-                                  LiveInterval& interval);
+                                  unsigned MOIdx, LiveInterval& interval);
 
     /// handlePhysicalRegisterDef - update intervals for a physical register
     /// def.

Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=53394&r1=53393&r2=53394&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineInstr.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h Thu Jul 10 02:35:43 2008
@@ -207,9 +207,9 @@
   /// none is found.
   int findFirstPredOperandIdx() const;
   
-  /// isRegReDefinedByTwoAddr - Returns true if the Reg re-definition is due
-  /// to two addr elimination.
-  bool isRegReDefinedByTwoAddr(unsigned Reg) const;
+  /// isRegReDefinedByTwoAddr - Given the defined register and the operand index,
+  /// check if the register def is a re-definition due to two addr elimination.
+  bool isRegReDefinedByTwoAddr(unsigned Reg, unsigned DefIdx) const;
 
   /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
   ///

Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=53394&r1=53393&r2=53394&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Thu Jul 10 02:35:43 2008
@@ -298,6 +298,7 @@
 void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
                                              MachineBasicBlock::iterator mi,
                                              unsigned MIIdx, MachineOperand& MO,
+                                             unsigned MOIdx,
                                              LiveInterval &interval) {
   DOUT << "\t\tregister: "; DEBUG(printRegName(interval.reg));
   LiveVariables::VarInfo& vi = lv_->getVarInfo(interval.reg);
@@ -390,7 +391,7 @@
     // must be due to phi elimination or two addr elimination.  If this is
     // the result of two address elimination, then the vreg is one of the
     // def-and-use register operand.
-    if (mi->isRegReDefinedByTwoAddr(interval.reg)) {
+    if (mi->isRegReDefinedByTwoAddr(interval.reg, MOIdx)) {
       // If this is a two-address definition, then we have already processed
       // the live range.  The only problem is that we didn't realize there
       // are actually two values in the live interval.  Because of this we
@@ -553,9 +554,10 @@
 void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB,
                                       MachineBasicBlock::iterator MI,
                                       unsigned MIIdx,
-                                      MachineOperand& MO) {
+                                      MachineOperand& MO,
+                                      unsigned MOIdx) {
   if (TargetRegisterInfo::isVirtualRegister(MO.getReg()))
-    handleVirtualRegisterDef(MBB, MI, MIIdx, MO, 
+    handleVirtualRegisterDef(MBB, MI, MIIdx, MO, MOIdx,
                              getOrCreateInterval(MO.getReg()));
   else if (allocatableRegs_[MO.getReg()]) {
     MachineInstr *CopyMI = NULL;
@@ -660,7 +662,7 @@
         MachineOperand &MO = MI->getOperand(i);
         // handle register defs - build intervals
         if (MO.isRegister() && MO.getReg() && MO.isDef())
-          handleRegisterDef(MBB, MI, MIIndex, MO);
+          handleRegisterDef(MBB, MI, MIIndex, MO, i);
       }
       
       MIIndex += InstrSlots::NUM;

Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=53394&r1=53393&r2=53394&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Thu Jul 10 02:35:43 2008
@@ -623,20 +623,15 @@
   return -1;
 }
   
-/// isRegReDefinedByTwoAddr - Returns true if the Reg re-definition is due
-/// to two addr elimination.
-bool MachineInstr::isRegReDefinedByTwoAddr(unsigned Reg) const {
+/// isRegReDefinedByTwoAddr - Given the defined register and the operand index,
+/// check if the register def is a re-definition due to two addr elimination.
+bool MachineInstr::isRegReDefinedByTwoAddr(unsigned Reg, unsigned DefIdx) const{
   const TargetInstrDesc &TID = getDesc();
-  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
-    const MachineOperand &MO1 = getOperand(i);
-    if (MO1.isRegister() && MO1.isDef() && MO1.getReg() == Reg) {
-      for (unsigned j = i+1; j < e; ++j) {
-        const MachineOperand &MO2 = getOperand(j);
-        if (MO2.isRegister() && MO2.isUse() && MO2.getReg() == Reg &&
-            TID.getOperandConstraint(j, TOI::TIED_TO) == (int)i)
-          return true;
-      }
-    }
+  for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) {
+    const MachineOperand &MO = getOperand(i);
+    if (MO.isRegister() && MO.isUse() && MO.getReg() == Reg &&
+        TID.getOperandConstraint(i, TOI::TIED_TO) == (int)DefIdx)
+      return true;
   }
   return false;
 }

Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53394&r1=53393&r2=53394&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Thu Jul 10 02:35:43 2008
@@ -604,25 +604,15 @@
         if (last != LastUseDef.end()) {
           // Check if this is a two address instruction.  If so, then
           // the def does not kill the use.
-          if (last->second.first == I) {
-            bool isTwoAddr = false;
-            for (unsigned j = i+1, je = I->getDesc().getNumOperands();
-                j < je; ++j) {
-              const MachineOperand &MO2 = I->getOperand(j);
-              if (MO2.isRegister() && MO2.isUse() &&
-                  MO2.getReg() == MO.getReg() &&
-                  I->getDesc().getOperandConstraint(j, TOI::TIED_TO) == (int)i)
-                isTwoAddr = true;
-            }
-
-            if (isTwoAddr) continue;
-          }
+          if (last->second.first == I &&
+              I->isRegReDefinedByTwoAddr(MO.getReg(), i))
+            continue;
           
           MachineOperand& lastUD =
                       last->second.first->getOperand(last->second.second);
           if (lastUD.isDef())
             lastUD.setIsDead(true);
-          else if (lastUD.isUse())
+          else
             lastUD.setIsKill(true);
         }
         
@@ -677,7 +667,7 @@
     if (isPhysReg || !usedOutsideBlock) {
       if (MO.isUse())
         MO.setIsKill(true);
-      else if (MI->getOperand(idx).isDef())
+      else
         MO.setIsDead(true);
     }
   }




From isanbard at gmail.com  Thu Jul 10 03:23:30 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 10 Jul 2008 08:23:30 -0000
Subject: [llvm-commits] [llvm] r53395 - in /llvm/branches/Apple/Gaz:
 include/llvm/Support/Mangler.h lib/VMCore/Mangler.cpp
Message-ID: <200807100823.m6A8NUB6006765@zion.cs.uiuc.edu>

Author: void
Date: Thu Jul 10 03:23:28 2008
New Revision: 53395

URL: http://llvm.org/viewvc/llvm-project?rev=53395&view=rev
Log:
Pulling in r53379 into Gaz:

- Replace use of std::map<std::string, ..> with StringMap. Replace use of
  std::map with DenseMap, std::set with SmallPtrSet. This results in minor
  speed up.
- Some code clean up.


Modified:
    llvm/branches/Apple/Gaz/include/llvm/Support/Mangler.h
    llvm/branches/Apple/Gaz/lib/VMCore/Mangler.cpp

Modified: llvm/branches/Apple/Gaz/include/llvm/Support/Mangler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/include/llvm/Support/Mangler.h?rev=53395&r1=53394&r2=53395&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/include/llvm/Support/Mangler.h (original)
+++ llvm/branches/Apple/Gaz/include/llvm/Support/Mangler.h Thu Jul 10 03:23:28 2008
@@ -15,8 +15,7 @@
 #define LLVM_SUPPORT_MANGLER_H
 
 #include "llvm/ADT/DenseMap.h"
-#include <map>
-#include <set>
+#include "llvm/ADT/SmallPtrSet.h"
 #include <string>
 
 namespace llvm {
@@ -49,13 +48,13 @@
   
   /// TypeMap - If the client wants us to unique types, this keeps track of the
   /// current assignments and TypeCounter keeps track of the next id to assign.
-  std::map<const Type*, unsigned> TypeMap;
+  DenseMap<const Type*, unsigned> TypeMap;
   unsigned TypeCounter;
 
   /// This keeps track of which global values have had their names
   /// mangled in the current module.
   ///
-  std::set<const GlobalValue*> MangledGlobals;
+  SmallPtrSet<const GlobalValue*, 16> MangledGlobals;
   
   /// AcceptableChars - This bitfield contains a one for each character that is
   /// allowed to be part of an unmangled name.
@@ -87,10 +86,6 @@
     return (AcceptableChars[X/32] & (1 << (X&31))) != 0;
   }
   
-  /// getTypeID - Return a unique ID for the specified LLVM type.
-  ///
-  unsigned getTypeID(const Type *Ty);
-
   /// getValueName - Returns the mangled name of V, an LLVM Value,
   /// in the current module.
   ///
@@ -105,9 +100,11 @@
   /// from getValueName.
   ///
   std::string makeNameProper(const std::string &x, const char *Prefix = "");
-  
+
 private:
-  void InsertName(GlobalValue *GV, std::map<std::string, GlobalValue*> &Names);
+  /// getTypeID - Return a unique ID for the specified LLVM type.
+  ///
+  unsigned getTypeID(const Type *Ty);
 };
 
 } // End llvm namespace

Modified: llvm/branches/Apple/Gaz/lib/VMCore/Mangler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/VMCore/Mangler.cpp?rev=53395&r1=53394&r2=53395&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/VMCore/Mangler.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/VMCore/Mangler.cpp Thu Jul 10 03:23:28 2008
@@ -16,6 +16,7 @@
 #include "llvm/Module.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/StringExtras.h"
+#include "llvm/ADT/StringMap.h"
 using namespace llvm;
 
 static char HexDigit(int V) {
@@ -138,7 +139,7 @@
   // - If V is an intrinsic function, do not change name at all
   // - Otherwise, mangling occurs if global collides with existing name.
   if (isa<Function>(GV) && cast<Function>(GV)->isIntrinsic()) {
-    Name = GV->getName(); // Is an intrinsic function
+    Name = GV->getNameStart(); // Is an intrinsic function
   } else if (!GV->hasName()) {
     // Must mangle the global into a unique ID.
     unsigned TypeUniqueID = getTypeID(GV->getType());
@@ -154,34 +155,35 @@
   return Name;
 }
 
-void Mangler::InsertName(GlobalValue *GV,
-                         std::map<std::string, GlobalValue*> &Names) {
+static void InsertName(GlobalValue *GV, StringMap<GlobalValue*> &Names,
+                       SmallPtrSet<const GlobalValue*, 16> &MangledGlobals) {
   if (!GV->hasName())   // We must mangle unnamed globals.
     return;
 
   // Figure out if this is already used.
-  GlobalValue *&ExistingValue = Names[GV->getName()];
+  GlobalValue *&ExistingValue = Names[GV->getNameStart()];
   if (!ExistingValue) {
     ExistingValue = GV;
+    return;
+  }
+
+  // If GV is external but the existing one is static, mangle the existing one
+  if ((GV->hasExternalLinkage() || GV->hasDLLImportLinkage()) &&
+      !(ExistingValue->hasExternalLinkage()
+        || ExistingValue->hasDLLImportLinkage())) {
+    MangledGlobals.insert(ExistingValue);
+    ExistingValue = GV;
+  } else if ((GV->hasExternalLinkage() ||
+              GV->hasDLLImportLinkage()) &&
+             (ExistingValue->hasExternalLinkage() ||
+              ExistingValue->hasDLLImportLinkage()) &&
+             GV->isDeclaration() &&
+             ExistingValue->isDeclaration()) {
+    // If the two globals both have external inkage, and are both external,
+    // don't mangle either of them, we just have some silly type mismatch.
   } else {
-    // If GV is external but the existing one is static, mangle the existing one
-    if ((GV->hasExternalLinkage() || GV->hasDLLImportLinkage()) &&
-        !(ExistingValue->hasExternalLinkage()
-          || ExistingValue->hasDLLImportLinkage())) {
-      MangledGlobals.insert(ExistingValue);
-      ExistingValue = GV;
-    } else if ((GV->hasExternalLinkage() ||
-                GV->hasDLLImportLinkage()) &&
-               (ExistingValue->hasExternalLinkage() ||
-                ExistingValue->hasDLLImportLinkage()) &&
-               GV->isDeclaration() &&
-               ExistingValue->isDeclaration()) {
-      // If the two globals both have external inkage, and are both external,
-      // don't mangle either of them, we just have some silly type mismatch.
-    } else {
-      // Otherwise, mangle GV
-      MangledGlobals.insert(GV);
-    }
+    // Otherwise, mangle GV
+    MangledGlobals.insert(GV);
   }
 }
 
@@ -206,11 +208,10 @@
     
   // Calculate which global values have names that will collide when we throw
   // away type information.
-  std::map<std::string, GlobalValue*> Names;
+  StringMap<GlobalValue*> Names;
   for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I)
-    InsertName(I, Names);
+    InsertName(I, Names, MangledGlobals);
   for (Module::global_iterator I = M.global_begin(), E = M.global_end();
-       I != E;
-       ++I)
-    InsertName(I, Names);
+       I != E; ++I)
+    InsertName(I, Names, MangledGlobals);
 }




From isanbard at gmail.com  Thu Jul 10 03:24:43 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 10 Jul 2008 08:24:43 -0000
Subject: [llvm-commits] [llvm] r53396 - in /llvm/branches/Apple/Gaz:
 include/llvm/CodeGen/SelectionDAGNodes.h
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Message-ID: <200807100824.m6A8OhVB006809@zion.cs.uiuc.edu>

Author: void
Date: Thu Jul 10 03:24:43 2008
New Revision: 53396

URL: http://llvm.org/viewvc/llvm-project?rev=53396&view=rev
Log:
Pulling r53372 into Gaz:

Move MemoryVT out of LSBaseNode into MemSDNode, allowing the
getMemOperand function to be moved into the base class as well
and made non-virtual.


Modified:
    llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h?rev=53396&r1=53395&r2=53396&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h Thu Jul 10 03:24:43 2008
@@ -1437,6 +1437,9 @@
   virtual void ANCHOR();  // Out-of-line virtual method to give class a home.
 
 private:
+  // MemoryVT - VT of in-memory value.
+  MVT MemoryVT;
+
   //! SrcValue - Memory location for alias analysis.
   const Value *SrcValue;
 
@@ -1448,7 +1451,7 @@
   unsigned Flags;
 
 public:
-  MemSDNode(unsigned Opc, SDVTList VTs,
+  MemSDNode(unsigned Opc, SDVTList VTs, MVT MemoryVT,
             const Value *srcValue, int SVOff,
             unsigned alignment, bool isvolatile);
 
@@ -1460,9 +1463,17 @@
   const Value *getSrcValue() const { return SrcValue; }
   int getSrcValueOffset() const { return SVOffset; }
   
+  /// getMemoryVT - Return the type of the in-memory value.
+  MVT getMemoryVT() const { return MemoryVT; }
+    
   /// getMemOperand - Return a MachineMemOperand object describing the memory
   /// reference performed by operation.
-  virtual MachineMemOperand getMemOperand() const = 0;
+  MachineMemOperand getMemOperand() const;
+
+  const SDOperand &getChain() const { return getOperand(0); }
+  const SDOperand &getBasePtr() const {
+    return getOperand(getOpcode() == ISD::STORE ? 2 : 1);
+  }
 
   // Methods to support isa and dyn_cast
   static bool classof(const MemSDNode *) { return true; }
@@ -1501,7 +1512,7 @@
   AtomicSDNode(unsigned Opc, SDVTList VTL, SDOperand Chain, SDOperand Ptr, 
                SDOperand Cmp, SDOperand Swp, const Value* SrcVal,
                unsigned Align=0)
-    : MemSDNode(Opc, VTL, SrcVal, /*SVOffset=*/0,
+    : MemSDNode(Opc, VTL, Cmp.getValueType(), SrcVal, /*SVOffset=*/0,
                 Align, /*isVolatile=*/true) {
     Ops[0] = Chain;
     Ops[1] = Ptr;
@@ -1511,7 +1522,7 @@
   }
   AtomicSDNode(unsigned Opc, SDVTList VTL, SDOperand Chain, SDOperand Ptr, 
                SDOperand Val, const Value* SrcVal, unsigned Align=0)
-    : MemSDNode(Opc, VTL, SrcVal, /*SVOffset=*/0,
+    : MemSDNode(Opc, VTL, Val.getValueType(), SrcVal, /*SVOffset=*/0,
                 Align, /*isVolatile=*/true) {
     Ops[0] = Chain;
     Ops[1] = Ptr;
@@ -1519,16 +1530,11 @@
     InitOperands(Ops, 3);
   }
   
-  const SDOperand &getChain() const { return getOperand(0); }
   const SDOperand &getBasePtr() const { return getOperand(1); }
   const SDOperand &getVal() const { return getOperand(2); }
 
   bool isCompareAndSwap() const { return getOpcode() == ISD::ATOMIC_CMP_SWAP; }
 
-  /// getMemOperand - Return a MachineMemOperand object describing the memory
-  /// reference performed by this atomic load/store.
-  virtual MachineMemOperand getMemOperand() const;
-  
   // Methods to support isa and dyn_cast
   static bool classof(const AtomicSDNode *) { return true; }
   static bool classof(const SDNode *N) {
@@ -2052,9 +2058,6 @@
   // AddrMode - unindexed, pre-indexed, post-indexed.
   ISD::MemIndexedMode AddrMode;
 
-  // MemoryVT - VT of in-memory value.
-  MVT MemoryVT;
-
 protected:
   //! Operand array for load and store
   /*!
@@ -2067,7 +2070,7 @@
   LSBaseSDNode(ISD::NodeType NodeTy, SDOperand *Operands, unsigned numOperands,
                SDVTList VTs, ISD::MemIndexedMode AM, MVT VT,
                const Value *SV, int SVO, unsigned Align, bool Vol)
-    : MemSDNode(NodeTy, VTs, SV, SVO, Align, Vol), AddrMode(AM), MemoryVT(VT) {
+    : MemSDNode(NodeTy, VTs, VT, SV, SVO, Align, Vol), AddrMode(AM) {
     for (unsigned i = 0; i != numOperands; ++i)
       Ops[i] = Operands[i];
     InitOperands(Ops, numOperands);
@@ -2076,16 +2079,10 @@
            "Only indexed loads and stores have a non-undef offset operand");
   }
 
-  const SDOperand &getChain() const { return getOperand(0); }
-  const SDOperand &getBasePtr() const {
-    return getOperand(getOpcode() == ISD::LOAD ? 1 : 2);
-  }
   const SDOperand &getOffset() const {
     return getOperand(getOpcode() == ISD::LOAD ? 2 : 3);
   }
 
-  MVT getMemoryVT() const { return MemoryVT; }
-    
   ISD::MemIndexedMode getAddressingMode() const { return AddrMode; }
 
   /// isIndexed - Return true if this is a pre/post inc/dec load/store.
@@ -2094,10 +2091,6 @@
   /// isUnindexed - Return true if this is NOT a pre/post inc/dec load/store.
   bool isUnindexed() const { return AddrMode == ISD::UNINDEXED; }
 
-  /// getMemOperand - Return a MachineMemOperand object describing the memory
-  /// reference performed by this load or store.
-  virtual MachineMemOperand getMemOperand() const;
-
   static bool classof(const LSBaseSDNode *) { return true; }
   static bool classof(const SDNode *N) {
     return N->getOpcode() == ISD::LOAD ||

Modified: llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53396&r1=53395&r2=53396&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Jul 10 03:24:43 2008
@@ -4331,10 +4331,10 @@
   TheGlobal = const_cast<GlobalValue*>(GA);
 }
 
-MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs,
+MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
                      const Value *srcValue, int SVO,
                      unsigned alignment, bool vol)
- : SDNode(Opc, VTs), SrcValue(srcValue), SVOffset(SVO),
+ : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
    Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
 
   assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
@@ -4343,13 +4343,22 @@
 }
 
 /// getMemOperand - Return a MachineMemOperand object describing the memory
-/// reference performed by this atomic.
-MachineMemOperand AtomicSDNode::getMemOperand() const {
-  int Size = (getValueType(0).getSizeInBits() + 7) >> 3;
-  int Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
+/// reference performed by this memory reference.
+MachineMemOperand MemSDNode::getMemOperand() const {
+  int Flags;
+  if (isa<LoadSDNode>(this))
+    Flags = MachineMemOperand::MOLoad;
+  else if (isa<StoreSDNode>(this))
+    Flags = MachineMemOperand::MOStore;
+  else {
+    assert(isa<AtomicSDNode>(this) && "Unknown MemSDNode opcode!");
+    Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
+  }
+
+  int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
   if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
   
-  // Check if the atomic references a frame index
+  // Check if the memory reference references a frame index
   const FrameIndexSDNode *FI = 
   dyn_cast<const FrameIndexSDNode>(getBasePtr().Val);
   if (!getSrcValue() && FI)
@@ -4360,27 +4369,6 @@
                              Size, getAlignment());
 }
 
-/// getMemOperand - Return a MachineMemOperand object describing the memory
-/// reference performed by this load or store.
-MachineMemOperand LSBaseSDNode::getMemOperand() const {
-  int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
-  int Flags =
-    getOpcode() == ISD::LOAD ? MachineMemOperand::MOLoad :
-                               MachineMemOperand::MOStore;
-  if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
-
-  // Check if the load references a frame index, and does not have
-  // an SV attached.
-  const FrameIndexSDNode *FI =
-    dyn_cast<const FrameIndexSDNode>(getBasePtr().Val);
-  if (!getSrcValue() && FI)
-    return MachineMemOperand(PseudoSourceValue::getFixedStack(), Flags,
-                             FI->getIndex(), Size, getAlignment());
-  else
-    return MachineMemOperand(getSrcValue(), Flags,
-                             getSrcValueOffset(), Size, getAlignment());
-}
-
 /// Profile - Gather unique data for the node.
 ///
 void SDNode::Profile(FoldingSetNodeID &ID) {




From isanbard at gmail.com  Thu Jul 10 03:25:27 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 10 Jul 2008 08:25:27 -0000
Subject: [llvm-commits] [llvm] r53397 -
 /llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Message-ID: <200807100825.m6A8PRrp006838@zion.cs.uiuc.edu>

Author: void
Date: Thu Jul 10 03:25:27 2008
New Revision: 53397

URL: http://llvm.org/viewvc/llvm-project?rev=53397&view=rev
Log:
Pulling r53374 into Gaz:

hasAnyUseOfValue can check SDUse nodes of its users directly instead
of examining every operand of every user.


Modified:
    llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53397&r1=53396&r2=53397&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Jul 10 03:25:27 2008
@@ -4401,8 +4401,6 @@
 
   SDOperand TheValue(const_cast<SDNode *>(this), Value);
 
-  SmallPtrSet<SDNode*, 32> UsersHandled;
-
   // TODO: Only iterate over uses of a given value of the node
   for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
     if (*UI == TheValue) {
@@ -4426,17 +4424,9 @@
 
   SDOperand TheValue(const_cast<SDNode *>(this), Value);
 
-  SmallPtrSet<SDNode*, 32> UsersHandled;
-
-  for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
-    SDNode *User = UI->getUser();
-    if (User->getNumOperands() == 1 ||
-        UsersHandled.insert(User))     // First time we've seen this?
-      for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i)
-        if (User->getOperand(i) == TheValue) {
-          return true;
-        }
-  }
+  for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
+    if (UI->getSDOperand() == TheValue)
+      return true;
 
   return false;
 }




From isanbard at gmail.com  Thu Jul 10 03:26:23 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 10 Jul 2008 08:26:23 -0000
Subject: [llvm-commits] [llvm] r53398 - in /llvm/branches/Apple/Gaz:
 include/llvm/CodeGen/SelectionDAGNodes.h
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Message-ID: <200807100826.m6A8QNCk006884@zion.cs.uiuc.edu>

Author: void
Date: Thu Jul 10 03:26:23 2008
New Revision: 53398

URL: http://llvm.org/viewvc/llvm-project?rev=53398&view=rev
Log:
Pull r53377 into Gaz:

Simplify hasNUsesOfValue and hasAnyUsesOfValue even more. This
makes their special-case checks of use_size() less beneficial,
so remove them. This eliminates all but one use of use_size(),
which is in AssignTopologicalOrder, which uses it only once for
each node, and so can reasonably afford to recompute it, as
this allows the UsesSize field of SDNode to be removed
altogether.


Modified:
    llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h?rev=53398&r1=53397&r2=53398&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h Thu Jul 10 03:26:23 2008
@@ -1048,9 +1048,6 @@
   /// NumOperands/NumValues - The number of entries in the Operand/Value list.
   unsigned short NumOperands, NumValues;
   
-  /// UsesSize - The size of the uses list.
-  unsigned UsesSize;
-
   /// Uses - List of uses for this SDNode.
   SDUse *Uses;
 
@@ -1075,9 +1072,11 @@
     return NodeType - ISD::BUILTIN_OP_END;
   }
 
-  size_t use_size() const { return UsesSize; }
+  size_t use_size() const { return std::distance(use_begin(), use_end()); }
   bool use_empty() const { return Uses == NULL; }
-  bool hasOneUse() const { return use_size() == 1; }
+  bool hasOneUse() const {
+    return !use_empty() && next(use_begin()) == use_end();
+  }
 
   /// getNodeId - Return the unique node id.
   ///
@@ -1249,7 +1248,7 @@
   }
 
   SDNode(unsigned Opc, SDVTList VTs, const SDOperand *Ops, unsigned NumOps)
-    : NodeType(Opc), NodeId(-1), UsesSize(0), Uses(NULL) {
+    : NodeType(Opc), NodeId(-1), Uses(NULL) {
     OperandsNeedDelete = true;
     NumOperands = NumOps;
     OperandList = NumOps ? new SDUse[NumOperands] : 0;
@@ -1258,7 +1257,6 @@
       OperandList[i] = Ops[i];
       OperandList[i].setUser(this);
       Ops[i].Val->addUse(OperandList[i]);
-      ++Ops[i].Val->UsesSize;
     }
     
     ValueList = VTs.VTs;
@@ -1266,7 +1264,7 @@
   }
 
   SDNode(unsigned Opc, SDVTList VTs, const SDUse *Ops, unsigned NumOps)
-    : NodeType(Opc), NodeId(-1), UsesSize(0), Uses(NULL) {
+    : NodeType(Opc), NodeId(-1), Uses(NULL) {
     OperandsNeedDelete = true;
     NumOperands = NumOps;
     OperandList = NumOps ? new SDUse[NumOperands] : 0;
@@ -1275,7 +1273,6 @@
       OperandList[i] = Ops[i];
       OperandList[i].setUser(this);
       Ops[i].getSDOperand().Val->addUse(OperandList[i]);
-      ++Ops[i].getSDOperand().Val->UsesSize;
     }
     
     ValueList = VTs.VTs;
@@ -1283,7 +1280,7 @@
   }
 
   SDNode(unsigned Opc, SDVTList VTs)
-    : NodeType(Opc), NodeId(-1), UsesSize(0), Uses(NULL) {
+    : NodeType(Opc), NodeId(-1), Uses(NULL) {
     OperandsNeedDelete = false;  // Operands set with InitOperands.
     NumOperands = 0;
     OperandList = 0;
@@ -1298,13 +1295,11 @@
     assert(OperandList == 0 && "Operands already set!");
     NumOperands = NumOps;
     OperandList = Ops;
-    UsesSize = 0;
     Uses = NULL;
     
     for (unsigned i = 0; i != NumOps; ++i) {
       OperandList[i].setUser(this);
       Ops[i].getVal()->addUse(OperandList[i]);
-      ++Ops[i].getVal()->UsesSize;
     }
   }
 
@@ -1323,14 +1318,12 @@
   void addUser(unsigned i, SDNode *User) {
     assert(User->OperandList[i].getUser() && "Node without parent");
     addUse(User->OperandList[i]);
-    ++UsesSize;
   }
 
   void removeUser(unsigned i, SDNode *User) {
     assert(User->OperandList[i].getUser() && "Node without parent");
     SDUse &Op = User->OperandList[i];
     Op.removeFromList();
-    --UsesSize;
   }
 };
 

Modified: llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53398&r1=53397&r2=53398&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Jul 10 03:26:23 2008
@@ -3749,7 +3749,6 @@
     OperandList[i].setUser(this);
     SDNode *N = OperandList[i].getVal();
     N->addUser(i, this);
-    ++N->UsesSize;
     DeadNodeSet.erase(N);
   }
 
@@ -4394,16 +4393,9 @@
 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
   assert(Value < getNumValues() && "Bad value!");
 
-  // If there is only one value, this is easy.
-  if (getNumValues() == 1)
-    return use_size() == NUses;
-  if (use_size() < NUses) return false;
-
-  SDOperand TheValue(const_cast<SDNode *>(this), Value);
-
   // TODO: Only iterate over uses of a given value of the node
   for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
-    if (*UI == TheValue) {
+    if (UI->getSDOperand().ResNo == Value) {
       if (NUses == 0)
         return false;
       --NUses;
@@ -4420,12 +4412,8 @@
 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
   assert(Value < getNumValues() && "Bad value!");
 
-  if (use_empty()) return false;
-
-  SDOperand TheValue(const_cast<SDNode *>(this), Value);
-
   for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
-    if (UI->getSDOperand() == TheValue)
+    if (UI->getSDOperand().ResNo == Value)
       return true;
 
   return false;




From isanbard at gmail.com  Thu Jul 10 03:28:02 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 10 Jul 2008 08:28:02 -0000
Subject: [llvm-commits] [llvm] r53399 -
	/llvm/branches/Apple/Gaz/lib/Target/X86/X86InstrSSE.td
Message-ID: <200807100828.m6A8S2iO006942@zion.cs.uiuc.edu>

Author: void
Date: Thu Jul 10 03:28:01 2008
New Revision: 53399

URL: http://llvm.org/viewvc/llvm-project?rev=53399&view=rev
Log:
Pull r53386 into Gaz:

Fix for PR2472. Use movss to set lower 32-bits of a zero XMM vector.

Modified:
    llvm/branches/Apple/Gaz/lib/Target/X86/X86InstrSSE.td

Modified: llvm/branches/Apple/Gaz/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/Target/X86/X86InstrSSE.td?rev=53399&r1=53398&r2=53399&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/branches/Apple/Gaz/lib/Target/X86/X86InstrSSE.td Thu Jul 10 03:28:01 2008
@@ -2870,6 +2870,8 @@
           (MOVLSS2PSrr (V_SET0), FR32:$src)>, Requires<[HasSSE2]>;
 def : Pat<(v4f32 (X86vzmovl (v4f32 VR128:$src))),
           (MOVLPSrr (V_SET0), VR128:$src)>, Requires<[HasSSE2]>;
+def : Pat<(v4i32 (X86vzmovl (v4i32 VR128:$src))),
+          (MOVLPSrr (V_SET0), VR128:$src)>, Requires<[HasSSE2]>;
 }
 
 // Splat v2f64 / v2i64




From matthijs at stdin.nl  Thu Jul 10 05:24:10 2008
From: matthijs at stdin.nl (Matthijs Kooijman)
Date: Thu, 10 Jul 2008 10:24:10 -0000
Subject: [llvm-commits] [llvm] r53400 - in /llvm/trunk:
 lib/Transforms/IPO/DeadArgumentElimination.cpp
 test/Transforms/DeadArgElim/multdeadretval.ll
Message-ID: <200807101024.m6AAOAhv011170@zion.cs.uiuc.edu>

Author: matthijs
Date: Thu Jul 10 05:24:08 2008
New Revision: 53400

URL: http://llvm.org/viewvc/llvm-project?rev=53400&view=rev
Log:
Restructure dead argument elimination, try #3 :-)

Rewrite the DeadArgumentElimination pass, to use a more explicit tracking of
dependencies between return values and/or arguments. Also make the handling of
arguments and return values the same.

The pass now looks properly inside returned structs, but only at the first
level (ie, not inside nested structs).

This version fixed a few more bugs and was cleaned up a bit. It now passes all
of LLVM's testing, and should still pass SPEC2006. There is still a minor bug
with regard to returning nested structs. Since there is currently nothing that
emits such IR, I will fix that in a seperate commit (partly because it requires
a non-trivial fix).

Modified:
    llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
    llvm/trunk/test/Transforms/DeadArgElim/multdeadretval.ll

Modified: llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp?rev=53400&r1=53399&r2=53400&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp Thu Jul 10 05:24:08 2008
@@ -10,10 +10,10 @@
 // This pass deletes dead arguments from internal functions.  Dead argument
 // elimination removes arguments which are directly dead, as well as arguments
 // only passed into function calls as dead arguments of other functions.  This
-// pass also deletes dead arguments in a similar way.
+// pass also deletes dead return values in a similar way.
 //
 // This pass is often useful as a cleanup pass to run after aggressive
-// interprocedural passes, which add possibly-dead arguments.
+// interprocedural passes, which add possibly-dead arguments or return values.
 //
 //===----------------------------------------------------------------------===//
 
@@ -30,6 +30,7 @@
 #include "llvm/Support/Debug.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
+#include "llvm/ADT/StringExtras.h"
 #include "llvm/Support/Compiler.h"
 #include <map>
 #include <set>
@@ -42,40 +43,78 @@
   /// DAE - The dead argument elimination pass.
   ///
   class VISIBILITY_HIDDEN DAE : public ModulePass {
+  public:
+
+    /// Struct that represents (part of) either a return value or a function
+    /// argument.  Used so that arguments and return values can be used
+    /// interchangably.
+    struct RetOrArg {
+      RetOrArg(const Function* F, unsigned Idx, bool IsArg) : F(F), Idx(Idx),
+               IsArg(IsArg) {}
+      const Function *F;
+      unsigned Idx;
+      bool IsArg;
+
+      /// Make RetOrArg comparable, so we can put it into a map.
+      bool operator<(const RetOrArg &O) const {
+        if (F != O.F)
+          return F < O.F;
+        else if (Idx != O.Idx)
+          return Idx < O.Idx;
+        else
+          return IsArg < O.IsArg;
+      }
+
+      /// Make RetOrArg comparable, so we can easily iterate the multimap.
+      bool operator==(const RetOrArg &O) const {
+        return F == O.F && Idx == O.Idx && IsArg == O.IsArg;
+      }
+
+      std::string getDescription() {
+        return std::string((IsArg ? "Argument #" : "Return value #")) 
+               + utostr(Idx) + " of function " + F->getName();
+      }
+    };
+
     /// Liveness enum - During our initial pass over the program, we determine
-    /// that things are either definately alive, definately dead, or in need of
-    /// interprocedural analysis (MaybeLive).
-    ///
-    enum Liveness { Live, MaybeLive, Dead };
-
-    /// LiveArguments, MaybeLiveArguments, DeadArguments - These sets contain
-    /// all of the arguments in the program.  The Dead set contains arguments
-    /// which are completely dead (never used in the function).  The MaybeLive
-    /// set contains arguments which are only passed into other function calls,
-    /// thus may be live and may be dead.  The Live set contains arguments which
-    /// are known to be alive.
-    ///
-    std::set<Argument*> DeadArguments, MaybeLiveArguments, LiveArguments;
-
-    /// DeadRetVal, MaybeLiveRetVal, LifeRetVal - These sets contain all of the
-    /// functions in the program.  The Dead set contains functions whose return
-    /// value is known to be dead.  The MaybeLive set contains functions whose
-    /// return values are only used by return instructions, and the Live set
-    /// contains functions whose return values are used, functions that are
-    /// external, and functions that already return void.
-    ///
-    std::set<Function*> DeadRetVal, MaybeLiveRetVal, LiveRetVal;
-
-    /// InstructionsToInspect - As we mark arguments and return values
-    /// MaybeLive, we keep track of which instructions could make the values
-    /// live here.  Once the entire program has had the return value and
-    /// arguments analyzed, this set is scanned to promote the MaybeLive objects
-    /// to be Live if they really are used.
-    std::vector<Instruction*> InstructionsToInspect;
-
-    /// CallSites - Keep track of the call sites of functions that have
-    /// MaybeLive arguments or return values.
-    std::multimap<Function*, CallSite> CallSites;
+    /// that things are either alive or maybe alive. We don't mark anything
+    /// explicitly dead (even if we know they are), since anything not alive
+    /// with no registered uses (in Uses) will never be marked alive and will
+    /// thus become dead in the end.
+    enum Liveness { Live, MaybeLive };
+
+    /// Convenience wrapper
+    RetOrArg CreateRet(const Function *F, unsigned Idx) {
+      return RetOrArg(F, Idx, false);
+    }
+    /// Convenience wrapper
+    RetOrArg CreateArg(const Function *F, unsigned Idx) {
+      return RetOrArg(F, Idx, true);
+    }
+
+    typedef std::multimap<RetOrArg, RetOrArg> UseMap;
+    /// This maps a return value or argument to any MaybeLive return values or
+    /// arguments it uses. This allows the MaybeLive values to be marked live
+    /// when any of its users is marked live.
+    /// For example (indices are left out for clarity):
+    ///  - Uses[ret F] = ret G
+    ///    This means that F calls G, and F returns the value returned by G.
+    ///  - Uses[arg F] = ret G
+    ///    This means that some function calls G and passes its result as an
+    ///    argument to F.
+    ///  - Uses[ret F] = arg F
+    ///    This means that F returns one of its own arguments.
+    ///  - Uses[arg F] = arg G
+    ///    This means that G calls F and passes one of its own (G's) arguments
+    ///    directly to F.
+    UseMap Uses;
+
+    typedef std::set<RetOrArg> LiveSet;
+
+    /// This set contains all values that have been determined to be live.
+    LiveSet LiveValues;
+
+    typedef SmallVector<RetOrArg, 5> UseVector;
 
   public:
     static char ID; // Pass identification, replacement for typeid
@@ -85,20 +124,21 @@
     virtual bool ShouldHackArguments() const { return false; }
 
   private:
-    Liveness getArgumentLiveness(const Argument &A);
-    bool isMaybeLiveArgumentNowLive(Argument *Arg);
-
+    Liveness MarkIfNotLive(RetOrArg Use, UseVector &MaybeLiveUses);
+    Liveness SurveyUse(Value::use_iterator U, UseVector &MaybeLiveUses,
+                       unsigned RetValNum = 0);
+    Liveness SurveyUses(Value *V, UseVector &MaybeLiveUses);
+
+    void SurveyFunction(Function &F);
+    void MarkValue(const RetOrArg &RA, Liveness L,
+                   const UseVector &MaybeLiveUses);
+    void MarkLive(RetOrArg RA);
+    bool RemoveDeadStuffFromFunction(Function *F);
     bool DeleteDeadVarargs(Function &Fn);
-    void SurveyFunction(Function &Fn);
-
-    void MarkArgumentLive(Argument *Arg);
-    void MarkRetValLive(Function *F);
-    void MarkReturnInstArgumentLive(ReturnInst *RI);
-
-    void RemoveDeadArgumentsFromFunction(Function *F);
   };
 }
 
+
 char DAE::ID = 0;
 static RegisterPass<DAE>
 X("deadargelim", "Dead Argument Elimination");
@@ -155,7 +195,7 @@
   // remove the "..." and adjust all the calls.
 
   // Start by computing a new prototype for the function, which is the same as
-  // the old function, but has fewer arguments.
+  // the old function, but doesn't have isVarArg set.
   const FunctionType *FTy = Fn.getFunctionType();
   std::vector<const Type*> Params(FTy->param_begin(), FTy->param_end());
   FunctionType *NFTy = FunctionType::get(FTy->getReturnType(), Params, false);
@@ -233,76 +273,164 @@
   return true;
 }
 
+/// Convenience function that returns the number of return values. It returns 0
+/// for void functions and 1 for functions not returning a struct. It returns
+/// the number of struct elements for functions returning a struct.
+static unsigned NumRetVals(const Function *F) {
+  if (F->getReturnType() == Type::VoidTy)
+    return 0;
+  else if (const StructType *STy = dyn_cast<StructType>(F->getReturnType()))
+    return STy->getNumElements();
+  else
+    return 1;
+}
 
-static inline bool CallPassesValueThoughVararg(Instruction *Call,
-                                               const Value *Arg) {
-  CallSite CS = CallSite::get(Call);
-  const Type *CalledValueTy = CS.getCalledValue()->getType();
-  const Type *FTy = cast<PointerType>(CalledValueTy)->getElementType();
-  unsigned NumFixedArgs = cast<FunctionType>(FTy)->getNumParams();
-  for (CallSite::arg_iterator AI = CS.arg_begin()+NumFixedArgs;
-       AI != CS.arg_end(); ++AI)
-    if (AI->get() == Arg)
-      return true;
-  return false;
-}
-
-// getArgumentLiveness - Inspect an argument, determining if is known Live
-// (used in a computation), MaybeLive (only passed as an argument to a call), or
-// Dead (not used).
-DAE::Liveness DAE::getArgumentLiveness(const Argument &A) {
-  const Function *F = A.getParent();
-  
-  // If this is the return value of a struct function, it's not really dead.
-  if (F->hasStructRetAttr() && &*(F->arg_begin()) == &A)
+/// MarkIfNotLive - This checks Use for liveness in LiveValues. If Use is not
+/// live, it adds Use to the MaybeLiveUses argument. Returns the determined
+/// liveness of Use.
+DAE::Liveness DAE::MarkIfNotLive(RetOrArg Use, UseVector &MaybeLiveUses) {
+  // We're live if our use is already marked as live.
+  if (LiveValues.count(Use))
     return Live;
-  
-  if (A.use_empty())  // First check, directly dead?
-    return Dead;
 
-  // Scan through all of the uses, looking for non-argument passing uses.
-  for (Value::use_const_iterator I = A.use_begin(), E = A.use_end(); I!=E;++I) {
-    // Return instructions do not immediately effect liveness.
-    if (isa<ReturnInst>(*I))
-      continue;
-
-    CallSite CS = CallSite::get(const_cast<User*>(*I));
-    if (!CS.getInstruction()) {
-      // If its used by something that is not a call or invoke, it's alive!
-      return Live;
-    }
-    // If it's an indirect call, mark it alive...
-    Function *Callee = CS.getCalledFunction();
-    if (!Callee) return Live;
-
-    // Check to see if it's passed through a va_arg area: if so, we cannot
-    // remove it.
-    if (CallPassesValueThoughVararg(CS.getInstruction(), &A))
-      return Live;   // If passed through va_arg area, we cannot remove it
-  }
+  // We're maybe live otherwise, but remember that we must become live if
+  // Use becomes live.
+  MaybeLiveUses.push_back(Use);
+  return MaybeLive;
+}
+
 
-  return MaybeLive;  // It must be used, but only as argument to a function
+/// SurveyUse - This looks at a single use of an argument or return value
+/// and determines if it should be alive or not. Adds this use to MaybeLiveUses
+/// if it causes the used value to become MaybeAlive.
+///
+/// RetValNum is the return value number to use when this use is used in a
+/// return instruction. This is used in the recursion, you should always leave
+/// it at 0.
+DAE::Liveness DAE::SurveyUse(Value::use_iterator U, UseVector &MaybeLiveUses,
+                             unsigned RetValNum) {
+    Value *V = *U;
+    if (ReturnInst *RI = dyn_cast<ReturnInst>(V)) {
+      // The value is returned from a function. It's only live when the
+      // function's return value is live. We use RetValNum here, for the case
+      // that U is really a use of an insertvalue instruction that uses the
+      // orginal Use.
+      RetOrArg Use = CreateRet(RI->getParent()->getParent(), RetValNum);
+      // We might be live, depending on the liveness of Use.
+      return MarkIfNotLive(Use, MaybeLiveUses);
+    }
+    if (InsertValueInst *IV = dyn_cast<InsertValueInst>(V)) {
+      if (U.getOperandNo() != InsertValueInst::getAggregateOperandIndex()
+          && IV->hasIndices())
+        // The use we are examining is inserted into an aggregate. Our liveness
+        // depends on all uses of that aggregate, but if it is used as a return
+        // value, only index at which we were inserted counts.
+        RetValNum = *IV->idx_begin();
+
+      // Note that if we are used as the aggregate operand to the insertvalue,
+      // we don't change RetValNum, but do survey all our uses.
+
+      Liveness Result = MaybeLive;
+      for (Value::use_iterator I = IV->use_begin(),
+           E = V->use_end(); I != E; ++I) {
+        Result = SurveyUse(I, MaybeLiveUses, RetValNum);
+        if (Result == Live)
+          break;
+      }
+      return Result;
+    }
+    CallSite CS = CallSite::get(V);
+    if (CS.getInstruction()) {
+      Function *F = CS.getCalledFunction();
+      if (F) {
+        // Used in a direct call.
+  
+        // Find the argument number. We know for sure that this use is an
+        // argument, since if it was the function argument this would be an
+        // indirect call and the we know can't be looking at a value of the
+        // label type (for the invoke instruction).
+        unsigned ArgNo = CS.getArgumentNo(U.getOperandNo());
+
+        if (ArgNo >= F->getFunctionType()->getNumParams())
+          // The value is passed in through a vararg! Must be live.
+          return Live;
+
+        assert(CS.getArgument(ArgNo) 
+               == CS.getInstruction()->getOperand(U.getOperandNo()) 
+               && "Argument is not where we expected it");
+
+        // Value passed to a normal call. It's only live when the corresponding
+        // argument to the called function turns out live.
+        RetOrArg Use = CreateArg(F, ArgNo);
+        return MarkIfNotLive(Use, MaybeLiveUses);
+      }
+    }
+    // Used in any other way? Value must be live.
+    return Live;
 }
 
+/// SurveyUses - This looks at all the uses of the given value
+/// Returns the Liveness deduced from the uses of this value.
+///
+/// Adds all uses that cause the result to be MaybeLive to MaybeLiveRetUses. If
+/// the result is Live, MaybeLiveUses might be modified but its content should
+/// be ignored (since it might not be complete).
+DAE::Liveness DAE::SurveyUses(Value *V, UseVector &MaybeLiveUses) {
+  // Assume it's dead (which will only hold if there are no uses at all..).
+  Liveness Result = MaybeLive;
+  // Check each use.
+  for (Value::use_iterator I = V->use_begin(),
+       E = V->use_end(); I != E; ++I) {
+    Result = SurveyUse(I, MaybeLiveUses);
+    if (Result == Live)
+      break;
+  }
+  return Result;
+}
 
 // SurveyFunction - This performs the initial survey of the specified function,
 // checking out whether or not it uses any of its incoming arguments or whether
-// any callers use the return value.  This fills in the
-// (Dead|MaybeLive|Live)(Arguments|RetVal) sets.
+// any callers use the return value.  This fills in the LiveValues set and Uses
+// map.
 //
 // We consider arguments of non-internal functions to be intrinsically alive as
 // well as arguments to functions which have their "address taken".
 //
 void DAE::SurveyFunction(Function &F) {
   bool FunctionIntrinsicallyLive = false;
-  Liveness RetValLiveness = F.getReturnType() == Type::VoidTy ? Live : Dead;
+  unsigned RetCount = NumRetVals(&F);
+  // Assume all return values are dead
+  typedef SmallVector<Liveness, 5> RetVals;
+  RetVals RetValLiveness(RetCount, MaybeLive);
+
+  typedef SmallVector<UseVector, 5> RetUses;
+  // These vectors map each return value to the uses that make it MaybeLive, so
+  // we can add those to the Uses map if the return value really turns out to be
+  // MaybeLive. Initialized to a list of RetCount empty lists.
+  RetUses MaybeLiveRetUses(RetCount);
+
+  for (Function::iterator BB = F.begin(), E = F.end(); BB != E; ++BB)
+    if (ReturnInst *RI = dyn_cast<ReturnInst>(BB->getTerminator()))
+      if (RI->getNumOperands() != 0 && RI->getOperand(0)->getType()
+          != F.getFunctionType()->getReturnType()) {
+        // We don't support old style multiple return values.
+        FunctionIntrinsicallyLive = true;
+        break;
+      }
 
-  if (!F.hasInternalLinkage() &&
-      (!ShouldHackArguments() || F.isIntrinsic()))
+  if (!F.hasInternalLinkage() && (!ShouldHackArguments() || F.isIntrinsic()))
     FunctionIntrinsicallyLive = true;
-  else
+
+  if (!FunctionIntrinsicallyLive) {
+    DOUT << "DAE - Inspecting callers for fn: " << F.getName() << "\n";
+    // Keep track of the number of live retvals, so we can skip checks once all
+    // of them turn out to be live.
+    unsigned NumLiveRetVals = 0;
+    const Type *STy = dyn_cast<StructType>(F.getReturnType());
+    // Loop all uses of the function.
     for (Value::use_iterator I = F.use_begin(), E = F.use_end(); I != E; ++I) {
-      // If the function is PASSED IN as an argument, its address has been taken
+      // If the function is PASSED IN as an argument, its address has been
+      // taken.
       if (I.getOperandNo() != 0) {
         FunctionIntrinsicallyLive = true;
         break;
@@ -316,222 +444,242 @@
         break;
       }
 
-      // Check to see if the return value is used...
-      if (RetValLiveness != Live)
-        for (Value::use_iterator I = TheCall->use_begin(),
-               E = TheCall->use_end(); I != E; ++I)
-          if (isa<ReturnInst>(cast<Instruction>(*I))) {
-            RetValLiveness = MaybeLive;
-          } else if (isa<CallInst>(cast<Instruction>(*I)) ||
-                     isa<InvokeInst>(cast<Instruction>(*I))) {
-            if (CallPassesValueThoughVararg(cast<Instruction>(*I), TheCall) ||
-                !CallSite::get(cast<Instruction>(*I)).getCalledFunction()) {
-              RetValLiveness = Live;
-              break;
+      // If we end up here, we are looking at a direct call to our function.
+
+      // Now, check how our return value(s) is/are used in this caller. Don't
+      // bother checking return values if all of them are live already.
+      if (NumLiveRetVals != RetCount) {
+        if (STy) {
+          // Check all uses of the return value.
+          for (Value::use_iterator I = TheCall->use_begin(),
+               E = TheCall->use_end(); I != E; ++I) {
+            ExtractValueInst *Ext = dyn_cast<ExtractValueInst>(*I);
+            if (Ext && Ext->hasIndices()) {
+              // This use uses a part of our return value, survey the uses of
+              // that part and store the results for this index only.
+              unsigned Idx = *Ext->idx_begin();
+              if (RetValLiveness[Idx] != Live) {
+                RetValLiveness[Idx] = SurveyUses(Ext, MaybeLiveRetUses[Idx]);
+                if (RetValLiveness[Idx] == Live)
+                  NumLiveRetVals++;
+              }
             } else {
-              RetValLiveness = MaybeLive;
+              // Used by something else than extractvalue. Mark all return
+              // values as live.
+              for (unsigned i = 0; i != RetCount; ++i )
+                RetValLiveness[i] = Live;
+              NumLiveRetVals = RetCount;
+              break;
             }
-          } else {
-            RetValLiveness = Live;
-            break;
           }
+        } else {
+          // Single return value
+          RetValLiveness[0] = SurveyUses(TheCall, MaybeLiveRetUses[0]);
+          if (RetValLiveness[0] == Live)
+            NumLiveRetVals = RetCount;
+        }
+      }
     }
-
+  }
   if (FunctionIntrinsicallyLive) {
-    DOUT << "  Intrinsically live fn: " << F.getName() << "\n";
-    for (Function::arg_iterator AI = F.arg_begin(), E = F.arg_end();
-         AI != E; ++AI)
-      LiveArguments.insert(AI);
-    LiveRetVal.insert(&F);
+    DOUT << "DAE - Intrinsically live fn: " << F.getName() << "\n";
+    // Mark all arguments as live.
+    unsigned i = 0;
+    for (unsigned i = 0, e = F.arg_size(); i != e; ++i)
+      MarkLive(CreateArg(&F, i));
+    // Mark all return values as live.
+    i = 0;
+    for (unsigned i = 0; i != RetCount; ++i)
+      MarkLive(CreateRet(&F, i));
     return;
   }
 
-  switch (RetValLiveness) {
-  case Live:      LiveRetVal.insert(&F); break;
-  case MaybeLive: MaybeLiveRetVal.insert(&F); break;
-  case Dead:      DeadRetVal.insert(&F); break;
+  // Now we've inspected all callers, record the liveness of our return values.
+  for (unsigned i = 0; i != RetCount; ++i)
+    MarkValue(CreateRet(&F, i), RetValLiveness[i], MaybeLiveRetUses[i]);
+
+  DOUT << "DAE - Inspecting args for fn: " << F.getName() << "\n";
+
+  // Now, check all of our arguments.
+  unsigned i = 0;
+  UseVector MaybeLiveArgUses;
+  for (Function::arg_iterator AI = F.arg_begin(),
+       E = F.arg_end(); AI != E; ++AI, ++i) {
+    // See what the effect of this use is (recording any uses that cause
+    // MaybeLive in MaybeLiveArgUses).
+    Liveness Result = SurveyUses(AI, MaybeLiveArgUses);
+    // Mark the result.
+    MarkValue(CreateArg(&F, i), Result, MaybeLiveArgUses);
+    // Clear the vector again for the next iteration.
+    MaybeLiveArgUses.clear();
   }
+}
 
-  DOUT << "  Inspecting args for fn: " << F.getName() << "\n";
-
-  // If it is not intrinsically alive, we know that all users of the
-  // function are call sites.  Mark all of the arguments live which are
-  // directly used, and keep track of all of the call sites of this function
-  // if there are any arguments we assume that are dead.
-  //
-  bool AnyMaybeLiveArgs = false;
-  for (Function::arg_iterator AI = F.arg_begin(), E = F.arg_end();
-       AI != E; ++AI)
-    switch (getArgumentLiveness(*AI)) {
-    case Live:
-      DOUT << "    Arg live by use: " << AI->getName() << "\n";
-      LiveArguments.insert(AI);
-      break;
-    case Dead:
-      DOUT << "    Arg definitely dead: " << AI->getName() <<"\n";
-      DeadArguments.insert(AI);
-      break;
+/// MarkValue - This function marks the liveness of RA depending on L. If L is
+/// MaybeLive, it also takes all uses in MaybeLiveUses and records them in Uses,
+/// such that RA will be marked live if any use in MaybeLiveUses gets marked
+/// live later on.
+void DAE::MarkValue(const RetOrArg &RA, Liveness L,
+                    const UseVector &MaybeLiveUses) {
+  switch (L) {
+    case Live: MarkLive(RA); break;
     case MaybeLive:
-      DOUT << "    Arg only passed to calls: " << AI->getName() << "\n";
-      AnyMaybeLiveArgs = true;
-      MaybeLiveArguments.insert(AI);
+    {
+      // Note any uses of this value, so this return value can be
+      // marked live whenever one of the uses becomes live.
+      for (UseVector::const_iterator UI = MaybeLiveUses.begin(),
+           UE = MaybeLiveUses.end(); UI != UE; ++UI)
+        Uses.insert(std::make_pair(*UI, RA));
       break;
     }
-
-  // If there are any "MaybeLive" arguments, we need to check callees of
-  // this function when/if they become alive.  Record which functions are
-  // callees...
-  if (AnyMaybeLiveArgs || RetValLiveness == MaybeLive)
-    for (Value::use_iterator I = F.use_begin(), E = F.use_end();
-         I != E; ++I) {
-      if (AnyMaybeLiveArgs)
-        CallSites.insert(std::make_pair(&F, CallSite::get(*I)));
-
-      if (RetValLiveness == MaybeLive)
-        for (Value::use_iterator UI = I->use_begin(), E = I->use_end();
-             UI != E; ++UI)
-          InstructionsToInspect.push_back(cast<Instruction>(*UI));
-    }
-}
-
-// isMaybeLiveArgumentNowLive - Check to see if Arg is alive.  At this point, we
-// know that the only uses of Arg are to be passed in as an argument to a
-// function call or return.  Check to see if the formal argument passed in is in
-// the LiveArguments set.  If so, return true.
-//
-bool DAE::isMaybeLiveArgumentNowLive(Argument *Arg) {
-  for (Value::use_iterator I = Arg->use_begin(), E = Arg->use_end(); I!=E; ++I){
-    if (isa<ReturnInst>(*I)) {
-      if (LiveRetVal.count(Arg->getParent())) return true;
-      continue;
-    }
-
-    CallSite CS = CallSite::get(*I);
-
-    // We know that this can only be used for direct calls...
-    Function *Callee = CS.getCalledFunction();
-
-    // Loop over all of the arguments (because Arg may be passed into the call
-    // multiple times) and check to see if any are now alive...
-    CallSite::arg_iterator CSAI = CS.arg_begin();
-    for (Function::arg_iterator AI = Callee->arg_begin(), E = Callee->arg_end();
-         AI != E; ++AI, ++CSAI)
-      // If this is the argument we are looking for, check to see if it's alive
-      if (*CSAI == Arg && LiveArguments.count(AI))
-        return true;
-  }
-  return false;
-}
-
-/// MarkArgumentLive - The MaybeLive argument 'Arg' is now known to be alive.
-/// Mark it live in the specified sets and recursively mark arguments in callers
-/// live that are needed to pass in a value.
-///
-void DAE::MarkArgumentLive(Argument *Arg) {
-  std::set<Argument*>::iterator It = MaybeLiveArguments.lower_bound(Arg);
-  if (It == MaybeLiveArguments.end() || *It != Arg) return;
-
-  DOUT << "  MaybeLive argument now live: " << Arg->getName() <<"\n";
-  MaybeLiveArguments.erase(It);
-  LiveArguments.insert(Arg);
-
-  // Loop over all of the call sites of the function, making any arguments
-  // passed in to provide a value for this argument live as necessary.
-  //
-  Function *Fn = Arg->getParent();
-  unsigned ArgNo = std::distance(Fn->arg_begin(), Function::arg_iterator(Arg));
-
-  std::multimap<Function*, CallSite>::iterator I = CallSites.lower_bound(Fn);
-  for (; I != CallSites.end() && I->first == Fn; ++I) {
-    CallSite CS = I->second;
-    Value *ArgVal = *(CS.arg_begin()+ArgNo);
-    if (Argument *ActualArg = dyn_cast<Argument>(ArgVal)) {
-      MarkArgumentLive(ActualArg);
-    } else {
-      // If the value passed in at this call site is a return value computed by
-      // some other call site, make sure to mark the return value at the other
-      // call site as being needed.
-      CallSite ArgCS = CallSite::get(ArgVal);
-      if (ArgCS.getInstruction())
-        if (Function *Fn = ArgCS.getCalledFunction())
-          MarkRetValLive(Fn);
-    }
   }
 }
 
-/// MarkArgumentLive - The MaybeLive return value for the specified function is
-/// now known to be alive.  Propagate this fact to the return instructions which
-/// produce it.
-void DAE::MarkRetValLive(Function *F) {
-  assert(F && "Shame shame, we can't have null pointers here!");
-
-  // Check to see if we already knew it was live
-  std::set<Function*>::iterator I = MaybeLiveRetVal.lower_bound(F);
-  if (I == MaybeLiveRetVal.end() || *I != F) return;  // It's already alive!
-
-  DOUT << "  MaybeLive retval now live: " << F->getName() << "\n";
-
-  MaybeLiveRetVal.erase(I);
-  LiveRetVal.insert(F);        // It is now known to be live!
-
-  // Loop over all of the functions, noticing that the return value is now live.
-  for (Function::iterator BB = F->begin(), E = F->end(); BB != E; ++BB)
-    if (ReturnInst *RI = dyn_cast<ReturnInst>(BB->getTerminator()))
-      MarkReturnInstArgumentLive(RI);
-}
-
-void DAE::MarkReturnInstArgumentLive(ReturnInst *RI) {
-  Value *Op = RI->getOperand(0);
-  if (Argument *A = dyn_cast<Argument>(Op)) {
-    MarkArgumentLive(A);
-  } else if (CallInst *CI = dyn_cast<CallInst>(Op)) {
-    if (Function *F = CI->getCalledFunction())
-      MarkRetValLive(F);
-  } else if (InvokeInst *II = dyn_cast<InvokeInst>(Op)) {
-    if (Function *F = II->getCalledFunction())
-      MarkRetValLive(F);
-  }
-}
+/// MarkLive - Mark the given return value or argument as live. Additionally,
+/// mark any values that are used by this value (according to Uses) live as
+/// well.
+void DAE::MarkLive(RetOrArg RA) {
+  if (!LiveValues.insert(RA).second)
+    return; // We were already marked Live.
+
+  if (RA.IsArg)
+    DOUT << "DAE - Marking argument " << RA.Idx << " to function "
+         << RA.F->getNameStart() << " live\n";
+  else
+    DOUT << "DAE - Marking return value " << RA.Idx << " of function "
+         << RA.F->getNameStart() << " live\n";
 
-// RemoveDeadArgumentsFromFunction - We know that F has dead arguments, as
-// specified by the DeadArguments list.  Transform the function and all of the
-// callees of the function to not have these arguments.
+  // We don't use upper_bound (or equal_range) here, because our recursive call
+  // to ourselves is likely to cause the upper_bound (which is the first value
+  // not belonging to RA) to become erased and the iterator invalidated.
+  UseMap::iterator Begin = Uses.lower_bound(RA);
+  UseMap::iterator E = Uses.end();
+  UseMap::iterator I;
+  for (I = Begin; I != E && I->first == RA; ++I)
+    MarkLive(I->second);
+
+  // Erase RA from the Uses map (from the lower bound to wherever we ended up
+  // after the loop).
+  Uses.erase(Begin, I);
+}
+
+// RemoveDeadStuffFromFunction - Remove any arguments and return values from F
+// that are not in LiveValues. Transform the function and all of the callees of
+// the function to not have these arguments and return values.
 //
-void DAE::RemoveDeadArgumentsFromFunction(Function *F) {
+bool DAE::RemoveDeadStuffFromFunction(Function *F) {
+  // Quick exit path for external functions
+  if (!F->hasInternalLinkage() && (!ShouldHackArguments() || F->isIntrinsic()))
+    return false;
+
   // Start by computing a new prototype for the function, which is the same as
-  // the old function, but has fewer arguments.
+  // the old function, but has fewer arguments and a different return type.
   const FunctionType *FTy = F->getFunctionType();
   std::vector<const Type*> Params;
 
-  // Set up to build a new list of parameter attributes
+  // Set up to build a new list of parameter attributes.
   SmallVector<ParamAttrsWithIndex, 8> ParamAttrsVec;
   const PAListPtr &PAL = F->getParamAttrs();
 
   // The existing function return attributes.
   ParameterAttributes RAttrs = PAL.getParamAttrs(0);
 
-  // Make the function return void if the return value is dead.
+
+  // Find out the new return value.
+
   const Type *RetTy = FTy->getReturnType();
-  if (DeadRetVal.count(F)) {
-    RetTy = Type::VoidTy;
-    RAttrs &= ~ParamAttr::typeIncompatible(RetTy);
-    DeadRetVal.erase(F);
-  }
+  const Type *NRetTy = NULL;
+  unsigned RetCount = NumRetVals(F);
+  // Explicitly track if anything changed, for debugging.
+  bool Changed = false;
+  // -1 means unused, other numbers are the new index
+  SmallVector<int, 5> NewRetIdxs(RetCount, -1);
+  std::vector<const Type*> RetTypes;
+  if (RetTy == Type::VoidTy) {
+    NRetTy = Type::VoidTy;
+  } else {
+    const StructType *STy = dyn_cast<StructType>(RetTy);
+    if (STy)
+      // Look at each of the original return values individually.
+      for (unsigned i = 0; i != RetCount; ++i) {
+        RetOrArg Ret = CreateRet(F, i);
+        if (LiveValues.erase(Ret)) {
+          RetTypes.push_back(STy->getElementType(i));
+          NewRetIdxs[i] = RetTypes.size() - 1;
+        } else {
+          ++NumRetValsEliminated;
+          DOUT << "DAE - Removing return value " << i << " from "
+               << F->getNameStart() << "\n";
+          Changed = true;
+        }
+      }
+    else
+      // We used to return a single value.
+      if (LiveValues.erase(CreateRet(F, 0))) {
+        RetTypes.push_back(RetTy);
+        NewRetIdxs[0] = 0;
+      } else {
+        DOUT << "DAE - Removing return value from " << F->getNameStart()
+             << "\n";
+        ++NumRetValsEliminated;
+        Changed = true;
+      }
+    if (RetTypes.size() > 1 || (STy && STy->getNumElements()==RetTypes.size()))
+      // More than one return type? Return a struct with them. Also, if we used
+      // to return a struct and didn't change the number of return values,
+      // return a struct again. This prevents changing {something} into
+      // something and {} into void.
+      // Make the new struct packed if we used to return a packed struct
+      // already.
+      NRetTy = StructType::get(RetTypes, STy->isPacked());
+    else if (RetTypes.size() == 1)
+      // One return type? Just a simple value then, but only if we didn't use to
+      // return a struct with that simple value before.
+      NRetTy = RetTypes.front();
+    else if (RetTypes.size() == 0)
+      // No return types? Make it void, but only if we didn't use to return {}.
+      NRetTy = Type::VoidTy;
+  }
+
+  assert(NRetTy && "No new return type found?");
+
+  // Remove any incompatible attributes, but only if we removed all return
+  // values. Otherwise, ensure that we don't have any conflicting attributes
+  // here. Currently, this should not be possible, but special handling might be
+  // required when new return value attributes are added.
+  if (NRetTy == Type::VoidTy)
+    RAttrs &= ~ParamAttr::typeIncompatible(NRetTy);
+  else
+    assert((RAttrs & ParamAttr::typeIncompatible(NRetTy)) == 0 
+           && "Return attributes no longer compatible?");
 
   if (RAttrs)
     ParamAttrsVec.push_back(ParamAttrsWithIndex::get(0, RAttrs));
 
+  // Remember which arguments are still alive.
+  SmallVector<bool, 10> ArgAlive(FTy->getNumParams(), false);
   // Construct the new parameter list from non-dead arguments. Also construct
-  // a new set of parameter attributes to correspond.
-  unsigned index = 1;
-  for (Function::arg_iterator I = F->arg_begin(), E = F->arg_end(); I != E;
-       ++I, ++index)
-    if (!DeadArguments.count(I)) {
+  // a new set of parameter attributes to correspond. Skip the first parameter
+  // attribute, since that belongs to the return value.
+  unsigned i = 0;
+  for (Function::arg_iterator I = F->arg_begin(), E = F->arg_end();
+       I != E; ++I, ++i) {
+    RetOrArg Arg = CreateArg(F, i);
+    if (LiveValues.erase(Arg)) {
       Params.push_back(I->getType());
-      
-      if (ParameterAttributes Attrs = PAL.getParamAttrs(index))
+      ArgAlive[i] = true;
+
+      // Get the original parameter attributes (skipping the first one, that is
+      // for the return value.
+      if (ParameterAttributes Attrs = PAL.getParamAttrs(i + 1))
         ParamAttrsVec.push_back(ParamAttrsWithIndex::get(Params.size(), Attrs));
+    } else {
+      ++NumArgumentsEliminated;
+      DOUT << "DAE - Removing argument " << i << " (" << I->getNameStart()
+           << ") from " << F->getNameStart() << "\n";
+      Changed = true;
     }
+  }
 
   // Reconstruct the ParamAttrsList based on the vector we constructed.
   PAListPtr NewPAL = PAListPtr::get(ParamAttrsVec.begin(), ParamAttrsVec.end());
@@ -539,19 +687,33 @@
   // Work around LLVM bug PR56: the CWriter cannot emit varargs functions which
   // have zero fixed arguments.
   //
+  // Note that we apply this hack for a vararg fuction that does not have any
+  // arguments anymore, but did have them before (so don't bother fixing
+  // functions that were already broken wrt CWriter).
   bool ExtraArgHack = false;
-  if (Params.empty() && FTy->isVarArg()) {
+  if (Params.empty() && FTy->isVarArg() && FTy->getNumParams() != 0) {
     ExtraArgHack = true;
     Params.push_back(Type::Int32Ty);
   }
 
   // Create the new function type based on the recomputed parameters.
-  FunctionType *NFTy = FunctionType::get(RetTy, Params, FTy->isVarArg());
+  FunctionType *NFTy = FunctionType::get(NRetTy, Params, FTy->isVarArg());
+
+  // No change?
+  if (NFTy == FTy)
+    return false;
+
+  // The function type is only allowed to be different if we actually left out
+  // an argument or return value.
+  assert(Changed && "Function type changed while no arguments or return values"
+                    "were removed!");
 
   // Create the new function body and insert it into the module...
   Function *NF = Function::Create(NFTy, F->getLinkage());
   NF->copyAttributesFrom(F);
   NF->setParamAttrs(NewPAL);
+  // Insert the new function before the old function, so we won't be processing
+  // it again.
   F->getParent()->getFunctionList().insert(F, NF);
   NF->takeName(F);
 
@@ -562,6 +724,7 @@
   while (!F->use_empty()) {
     CallSite CS = CallSite::get(F->use_back());
     Instruction *Call = CS.getInstruction();
+
     ParamAttrsVec.clear();
     const PAListPtr &CallPAL = CS.getParamAttrs();
 
@@ -572,14 +735,17 @@
     if (RAttrs)
       ParamAttrsVec.push_back(ParamAttrsWithIndex::get(0, RAttrs));
 
-    // Loop over the operands, deleting dead ones...
-    CallSite::arg_iterator AI = CS.arg_begin();
-    index = 1;
-    for (Function::arg_iterator I = F->arg_begin(), E = F->arg_end();
-         I != E; ++I, ++AI, ++index)
-      if (!DeadArguments.count(I)) {    // Remove operands for dead arguments
-        Args.push_back(*AI);
-        if (ParameterAttributes Attrs = CallPAL.getParamAttrs(index))
+    // Declare these outside of the loops, so we can reuse them for the second
+    // loop, which loops the varargs.
+    CallSite::arg_iterator I = CS.arg_begin();
+    unsigned i = 0;
+    // Loop over those operands, corresponding to the normal arguments to the
+    // original function, and add those that are still alive.
+    for (unsigned e = FTy->getNumParams(); i != e; ++I, ++i)
+      if (ArgAlive[i]) {
+        Args.push_back(*I);
+        // Get original parameter attributes, but skip return attributes.
+        if (ParameterAttributes Attrs = CallPAL.getParamAttrs(i + 1))
           ParamAttrsVec.push_back(ParamAttrsWithIndex::get(Args.size(), Attrs));
       }
 
@@ -587,9 +753,9 @@
       Args.push_back(UndefValue::get(Type::Int32Ty));
 
     // Push any varargs arguments on the list. Don't forget their attributes.
-    for (; AI != CS.arg_end(); ++AI) {
-      Args.push_back(*AI);
-      if (ParameterAttributes Attrs = CallPAL.getParamAttrs(index++))
+    for (CallSite::arg_iterator E = CS.arg_end(); I != E; ++I, ++i) {
+      Args.push_back(*I);
+      if (ParameterAttributes Attrs = CallPAL.getParamAttrs(i + 1))
         ParamAttrsVec.push_back(ParamAttrsWithIndex::get(Args.size(), Attrs));
     }
 
@@ -613,11 +779,55 @@
     Args.clear();
 
     if (!Call->use_empty()) {
-      if (New->getType() == Type::VoidTy)
-        Call->replaceAllUsesWith(Constant::getNullValue(Call->getType()));
-      else {
+      if (New->getType() == Call->getType()) {
+        // Return type not changed? Just replace users then.
         Call->replaceAllUsesWith(New);
         New->takeName(Call);
+      } else if (New->getType() == Type::VoidTy) {
+        // Our return value has uses, but they will get removed later on.
+        // Replace by null for now.
+        Call->replaceAllUsesWith(Constant::getNullValue(Call->getType()));
+      } else {
+        assert(isa<StructType>(RetTy) && "Return type changed, but not into a"
+                                         "void. The old return type must have"
+                                         "been a struct!");
+        // The original return value was a struct, update all uses (which are
+        // all extractvalue instructions).
+        for (Value::use_iterator I = Call->use_begin(), E = Call->use_end();
+             I != E;) {
+          assert(isa<ExtractValueInst>(*I) && "Return value not only used by"
+                                              "extractvalue?");
+          ExtractValueInst *EV = cast<ExtractValueInst>(*I);
+          // Increment now, since we're about to throw away this use.
+          ++I;
+          assert(EV->hasIndices() && "Return value used by extractvalue without"
+                                     "indices?");
+          unsigned Idx = *EV->idx_begin();
+          if (NewRetIdxs[Idx] != -1) {
+            if (RetTypes.size() > 1) {
+              // We're still returning a struct, create a new extractvalue
+              // instruction with the first index updated
+              std::vector<unsigned> NewIdxs(EV->idx_begin(), EV->idx_end());
+              NewIdxs[0] = NewRetIdxs[Idx];
+              Value *NEV = ExtractValueInst::Create(New, NewIdxs.begin(),
+                                                    NewIdxs.end(), "retval",
+                                                    EV);
+              EV->replaceAllUsesWith(NEV);
+              EV->eraseFromParent();
+            } else {
+              // We are now only returning a simple value, remove the
+              // extractvalue.
+              EV->replaceAllUsesWith(New);
+              EV->eraseFromParent();
+            }
+          } else {
+            // Value unused, replace uses by null for now, they will get removed
+            // later on.
+            EV->replaceAllUsesWith(Constant::getNullValue(EV->getType()));
+            EV->eraseFromParent();
+          }
+        }
+        New->takeName(Call);
       }
     }
 
@@ -632,13 +842,11 @@
   NF->getBasicBlockList().splice(NF->begin(), F->getBasicBlockList());
 
   // Loop over the argument list, transfering uses of the old arguments over to
-  // the new arguments, also transfering over the names as well.  While we're at
-  // it, remove the dead arguments from the DeadArguments list.
-  //
+  // the new arguments, also transfering over the names as well.
+  i = 0;
   for (Function::arg_iterator I = F->arg_begin(), E = F->arg_end(),
-         I2 = NF->arg_begin();
-       I != E; ++I)
-    if (!DeadArguments.count(I)) {
+       I2 = NF->arg_begin(); I != E; ++I, ++i)
+    if (ArgAlive[i]) {
       // If this is a live argument, move the name and users over to the new
       // version.
       I->replaceAllUsesWith(I2);
@@ -646,10 +854,8 @@
       ++I2;
     } else {
       // If this argument is dead, replace any uses of it with null constants
-      // (these are guaranteed to only be operands to call instructions which
-      // will later be simplified).
+      // (these are guaranteed to become unused later on).
       I->replaceAllUsesWith(Constant::getNullValue(I->getType()));
-      DeadArguments.erase(I);
     }
 
   // If we change the return value of the function we must rewrite any return
@@ -657,16 +863,52 @@
   if (F->getReturnType() != NF->getReturnType())
     for (Function::iterator BB = NF->begin(), E = NF->end(); BB != E; ++BB)
       if (ReturnInst *RI = dyn_cast<ReturnInst>(BB->getTerminator())) {
-        ReturnInst::Create(0, RI);
+        Value *RetVal;
+
+        if (NFTy->getReturnType() == Type::VoidTy) {
+          RetVal = 0;
+        } else {
+          assert (isa<StructType>(RetTy));
+          // The original return value was a struct, insert
+          // extractvalue/insertvalue chains to extract only the values we need
+          // to return and insert them into our new result.
+          // This does generate messy code, but we'll let it to instcombine to
+          // clean that up.
+          Value *OldRet = RI->getOperand(0);
+          // Start out building up our return value from undef
+          RetVal = llvm::UndefValue::get(NRetTy);
+          for (unsigned i = 0; i != RetCount; ++i)
+            if (NewRetIdxs[i] != -1) {
+              ExtractValueInst *EV = ExtractValueInst::Create(OldRet, i,
+                                                              "oldret", RI);
+              if (RetTypes.size() > 1) {
+                // We're still returning a struct, so reinsert the value into
+                // our new return value at the new index
+
+                RetVal = InsertValueInst::Create(RetVal, EV, NewRetIdxs[i],
+                                                 "newret", RI);
+              } else {
+                // We are now only returning a simple value, so just return the
+                // extracted value.
+                RetVal = EV;
+              }
+            }
+        }
+        // Replace the return instruction with one returning the new return
+        // value (possibly 0 if we became void).
+        ReturnInst::Create(RetVal, RI);
         BB->getInstList().erase(RI);
       }
 
   // Now that the old function is dead, delete it.
   F->eraseFromParent();
+
+  return true;
 }
 
 bool DAE::runOnModule(Module &M) {
   bool Changed = false;
+
   // First pass: Do a simple check to see if any functions can have their "..."
   // removed.  We can do this if they never call va_start.  This loop cannot be
   // fused with the next loop, because deleting a function invalidates
@@ -677,7 +919,7 @@
     if (F.getFunctionType()->isVarArg())
       Changed |= DeleteDeadVarargs(F);
   }
-  
+
   // Second phase:loop through the module, determining which arguments are live.
   // We assume all arguments are dead unless proven otherwise (allowing us to
   // determine that dead arguments passed into recursive functions are dead).
@@ -685,86 +927,14 @@
   DOUT << "DAE - Determining liveness\n";
   for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I)
     SurveyFunction(*I);
-
-  // Loop over the instructions to inspect, propagating liveness among arguments
-  // and return values which are MaybeLive.
-  while (!InstructionsToInspect.empty()) {
-    Instruction *I = InstructionsToInspect.back();
-    InstructionsToInspect.pop_back();
-
-    if (ReturnInst *RI = dyn_cast<ReturnInst>(I)) {
-      // For return instructions, we just have to check to see if the return
-      // value for the current function is known now to be alive.  If so, any
-      // arguments used by it are now alive, and any call instruction return
-      // value is alive as well.
-      if (LiveRetVal.count(RI->getParent()->getParent()))
-        MarkReturnInstArgumentLive(RI);
-
-    } else {
-      CallSite CS = CallSite::get(I);
-      assert(CS.getInstruction() && "Unknown instruction for the I2I list!");
-
-      Function *Callee = CS.getCalledFunction();
-
-      // If we found a call or invoke instruction on this list, that means that
-      // an argument of the function is a call instruction.  If the argument is
-      // live, then the return value of the called instruction is now live.
-      //
-      CallSite::arg_iterator AI = CS.arg_begin();  // ActualIterator
-      for (Function::arg_iterator FI = Callee->arg_begin(),
-             E = Callee->arg_end(); FI != E; ++AI, ++FI) {
-        // If this argument is another call...
-        CallSite ArgCS = CallSite::get(*AI);
-        if (ArgCS.getInstruction() && LiveArguments.count(FI))
-          if (Function *Callee = ArgCS.getCalledFunction())
-            MarkRetValLive(Callee);
-      }
-    }
+  
+  // Now, remove all dead arguments and return values from each function in
+  // turn
+  for (Module::iterator I = M.begin(), E = M.end(); I != E; ) {
+    // Increment now, because the function will probably get removed (ie
+    // replaced by a new one).
+    Function *F = I++;
+    Changed |= RemoveDeadStuffFromFunction(F);
   }
-
-  // Now we loop over all of the MaybeLive arguments, promoting them to be live
-  // arguments if one of the calls that uses the arguments to the calls they are
-  // passed into requires them to be live.  Of course this could make other
-  // arguments live, so process callers recursively.
-  //
-  // Because elements can be removed from the MaybeLiveArguments set, copy it to
-  // a temporary vector.
-  //
-  std::vector<Argument*> TmpArgList(MaybeLiveArguments.begin(),
-                                    MaybeLiveArguments.end());
-  for (unsigned i = 0, e = TmpArgList.size(); i != e; ++i) {
-    Argument *MLA = TmpArgList[i];
-    if (MaybeLiveArguments.count(MLA) &&
-        isMaybeLiveArgumentNowLive(MLA))
-      MarkArgumentLive(MLA);
-  }
-
-  // Recover memory early...
-  CallSites.clear();
-
-  // At this point, we know that all arguments in DeadArguments and
-  // MaybeLiveArguments are dead.  If the two sets are empty, there is nothing
-  // to do.
-  if (MaybeLiveArguments.empty() && DeadArguments.empty() &&
-      MaybeLiveRetVal.empty() && DeadRetVal.empty())
-    return Changed;
-
-  // Otherwise, compact into one set, and start eliminating the arguments from
-  // the functions.
-  DeadArguments.insert(MaybeLiveArguments.begin(), MaybeLiveArguments.end());
-  MaybeLiveArguments.clear();
-  DeadRetVal.insert(MaybeLiveRetVal.begin(), MaybeLiveRetVal.end());
-  MaybeLiveRetVal.clear();
-
-  LiveArguments.clear();
-  LiveRetVal.clear();
-
-  NumArgumentsEliminated += DeadArguments.size();
-  NumRetValsEliminated   += DeadRetVal.size();
-  while (!DeadArguments.empty())
-    RemoveDeadArgumentsFromFunction((*DeadArguments.begin())->getParent());
-
-  while (!DeadRetVal.empty())
-    RemoveDeadArgumentsFromFunction(*DeadRetVal.begin());
-  return true;
+  return Changed;
 }

Modified: llvm/trunk/test/Transforms/DeadArgElim/multdeadretval.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadArgElim/multdeadretval.ll?rev=53400&r1=53399&r2=53400&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/DeadArgElim/multdeadretval.ll (original)
+++ llvm/trunk/test/Transforms/DeadArgElim/multdeadretval.ll Thu Jul 10 05:24:08 2008
@@ -3,7 +3,6 @@
 ; run instcombine to fold insert/extractvalue chains and we run dce to clean up
 ; any remaining dead stuff.
 ; RUN: llvm-as < %s | opt -deadargelim -instcombine -dce | llvm-dis | not grep i16
-; XFAIL: *
 
 define internal {i16, i32} @test(i16 %DEADARG) {
         %A = insertvalue {i16,i32} undef, i16 1, 0
@@ -18,6 +17,8 @@
         ret {i32,i16} %B
 }
 
+; Dead argument, used to check if the second result of test2 is dead even when
+; it's used as a dead argument
 define internal i32 @test3(i16 %A) {
         %ret = call {i16, i32} @test( i16 %A )                ; <i32> [#uses=0]
         %DEAD = extractvalue {i16, i32} %ret, 0
@@ -29,6 +30,14 @@
         ret i16 0
 }
 
+; Multiple return values, multiple live return values
+define internal {i32, i32, i16} @test5() {
+        %A = insertvalue {i32,i32,i16} undef, i32 1, 0
+        %B = insertvalue {i32,i32,i16} %A, i32 2, 1
+        %C = insertvalue {i32,i32,i16} %B, i16 3, 2
+        ret {i32, i32, i16} %C
+}
+
 define i32 @main() {
         %ret = call {i32, i16} @test2()                ; <i32> [#uses=1]
         %LIVE = extractvalue {i32, i16} %ret, 0
@@ -36,5 +45,11 @@
         %Y = add i32 %LIVE, -123           ; <i32> [#uses=1]
         %LIVE2 = call i32 @test3(i16 %DEAD)                ; <i32> [#uses=1]
         %Z = add i32 %LIVE2, %Y           ; <i32> [#uses=1]
-        ret i32 %Z
+        %ret1 = call { i32, i32, i16 } @test5 ()
+        %LIVE3 = extractvalue { i32, i32, i16} %ret1, 0
+        %LIVE4 = extractvalue { i32, i32, i16} %ret1, 1
+        %DEAD2 = extractvalue { i32, i32, i16} %ret1, 2
+        %V = add i32 %LIVE3, %LIVE4
+        %W = add i32 %Z, %V
+        ret i32 %W
 }




From baldrick at free.fr  Thu Jul 10 06:22:00 2008
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 10 Jul 2008 11:22:00 -0000
Subject: [llvm-commits] [llvm] r53401 - /llvm/trunk/include/llvm/ADT/APInt.h
Message-ID: <200807101122.m6ABM1as012926@zion.cs.uiuc.edu>

Author: baldrick
Date: Thu Jul 10 06:21:59 2008
New Revision: 53401

URL: http://llvm.org/viewvc/llvm-project?rev=53401&view=rev
Log:
Correct a comment.

Modified:
    llvm/trunk/include/llvm/ADT/APInt.h

Modified: llvm/trunk/include/llvm/ADT/APInt.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APInt.h?rev=53401&r1=53400&r2=53401&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/APInt.h (original)
+++ llvm/trunk/include/llvm/ADT/APInt.h Thu Jul 10 06:21:59 2008
@@ -997,10 +997,10 @@
     return toString(radix, false);
   }
 
-  /// Considers the APInt to be unsigned and converts it into a string in the
+  /// Considers the APInt to be signed and converts it into a string in the
   /// radix given. The radix can be 2, 8, 10 or 16.
   /// @returns a character interpretation of the APInt
-  /// @brief Convert unsigned APInt to string representation.
+  /// @brief Convert signed APInt to string representation.
   std::string toStringSigned(uint8_t radix = 10) const {
     return toString(radix, true);
   }




From baldrick at free.fr  Thu Jul 10 06:23:14 2008
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 10 Jul 2008 11:23:14 -0000
Subject: [llvm-commits] [llvm] r53402 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Message-ID: <200807101123.m6ABNEcX012980@zion.cs.uiuc.edu>

Author: baldrick
Date: Thu Jul 10 06:23:14 2008
New Revision: 53402

URL: http://llvm.org/viewvc/llvm-project?rev=53402&view=rev
Log:
Don't barf when dumping a constant that contains
a ginormous value (eg: i128 -1).

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53402&r1=53401&r2=53402&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Jul 10 06:23:14 2008
@@ -4826,7 +4826,7 @@
   }
 
   if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
-    cerr << "<" << CSDN->getValue() << ">";
+    cerr << "<" << CSDN->getAPIntValue().toStringUnsigned() << ">";
   } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
     if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
       cerr << "<" << CSDN->getValueAPF().convertToFloat() << ">";




From baldrick at free.fr  Thu Jul 10 10:25:07 2008
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 10 Jul 2008 15:25:07 -0000
Subject: [llvm-commits] [llvm] r53403 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeIntegerTypes.cpp
 LegalizeTypes.cpp LegalizeTypes.h LegalizeTypesGeneric.cpp
 LegalizeVectorTypes.cpp
Message-ID: <200807101525.m6AFP8uS020746@zion.cs.uiuc.edu>

Author: baldrick
Date: Thu Jul 10 10:25:04 2008
New Revision: 53403

URL: http://llvm.org/viewvc/llvm-project?rev=53403&view=rev
Log:
Make the LegalizeType method naming scheme more regular.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=53403&r1=53402&r2=53403&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Thu Jul 10 10:25:04 2008
@@ -251,11 +251,11 @@
   case ExpandInteger:
   case ExpandFloat:
     break;
-  case Scalarize:
+  case ScalarizeVector:
     // Convert the element to an integer and promote it by hand.
     return DAG.getNode(ISD::ANY_EXTEND, OutVT,
                        BitConvertToInteger(GetScalarizedVector(InOp)));
-  case Split:
+  case SplitVector:
     // For example, i32 = BIT_CONVERT v2i16 on alpha.  Convert the split
     // pieces of the input into integers and reassemble in the final type.
     SDOperand Lo, Hi;

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=53403&r1=53402&r2=53403&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Thu Jul 10 10:25:04 2008
@@ -83,11 +83,11 @@
       case ExpandFloat:
         ExpandFloatResult(N, i);
         goto NodeDone;
-      case Scalarize:
-        ScalarizeResult(N, i);
+      case ScalarizeVector:
+        ScalarizeVectorResult(N, i);
         goto NodeDone;
-      case Split:
-        SplitResult(N, i);
+      case SplitVector:
+        SplitVectorResult(N, i);
         goto NodeDone;
       }
     } while (++i < NumResults);
@@ -116,11 +116,11 @@
       case ExpandFloat:
         NeedsRevisit = ExpandFloatOperand(N, i);
         break;
-      case Scalarize:
-        NeedsRevisit = ScalarizeOperand(N, i);
+      case ScalarizeVector:
+        NeedsRevisit = ScalarizeVectorOperand(N, i);
         break;
-      case Split:
-        NeedsRevisit = SplitOperand(N, i);
+      case SplitVector:
+        NeedsRevisit = SplitVectorOperand(N, i);
         break;
       }
       break;

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=53403&r1=53402&r2=53403&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Thu Jul 10 10:25:04 2008
@@ -26,16 +26,10 @@
 namespace llvm {
 
 //===----------------------------------------------------------------------===//
-/// DAGTypeLegalizer - This takes an arbitrary SelectionDAG as input and
-/// hacks on it until the target machine can handle it.  This involves
-/// eliminating value sizes the machine cannot handle (promoting small sizes to
-/// large sizes or splitting up large values into small values) as well as
-/// eliminating operations the machine cannot handle.
-///
-/// This code also does a small amount of optimization and recognition of idioms
-/// as part of its processing.  For example, if a target does not support a
-/// 'setcc' instruction efficiently, but does support 'brcc' instruction, this
-/// will attempt merge setcc and brc instructions into brcc's.
+/// DAGTypeLegalizer - This takes an arbitrary SelectionDAG as input and hacks
+/// on it until only value types the target machine can handle are left.  This
+/// involves promoting small sizes to large sizes or splitting up large values
+/// into small values.
 ///
 class VISIBILITY_HIDDEN DAGTypeLegalizer {
   TargetLowering &TLI;
@@ -59,13 +53,13 @@
   };
 private:
   enum LegalizeAction {
-    Legal,          // The target natively supports this type.
-    PromoteInteger, // Replace this integer type with a larger one.
-    ExpandInteger,  // Split this integer type into two of half the size.
-    SoftenFloat,    // Convert this float type to a same size integer type.
-    ExpandFloat,    // Split this float type into two of half the size.
-    Scalarize,      // Replace this one-element vector type with its element type.
-    Split           // This vector type should be split into smaller vectors.
+    Legal,           // The target natively supports this type.
+    PromoteInteger,  // Replace this integer type with a larger one.
+    ExpandInteger,   // Split this integer type into two of half the size.
+    SoftenFloat,     // Convert this float type to a same size integer type.
+    ExpandFloat,     // Split this float type into two of half the size.
+    ScalarizeVector, // Replace this one-element vector with its element type.
+    SplitVector      // This vector type should be split into smaller vectors.
   };
 
   /// ValueTypeActions - This is a bitvector that contains two bits for each
@@ -76,8 +70,8 @@
   /// getTypeAction - Return how we should legalize values of this type, either
   /// it is already legal, or we need to promote it to a larger integer type, or
   /// we need to expand it into multiple registers of a smaller integer type, or
-  /// we need to scalarize a one-element vector type into the element type, or
-  /// we need to split a vector type into smaller vector types.
+  /// we need to split a vector type into smaller vector types, or we need to
+  /// convert it to a different type of the same size.
   LegalizeAction getTypeAction(MVT VT) const {
     switch (ValueTypeActions.getTypeAction(VT)) {
     default:
@@ -99,9 +93,9 @@
         else
           return ExpandFloat;
       } else if (VT.getVectorNumElements() == 1) {
-        return Scalarize;
+        return ScalarizeVector;
       } else {
-        return Split;
+        return SplitVector;
       }
     }
   }
@@ -400,7 +394,7 @@
   void SetScalarizedVector(SDOperand Op, SDOperand Result);
 
   // Vector Result Scalarization: <1 x ty> -> ty.
-  void ScalarizeResult(SDNode *N, unsigned OpNo);
+  void ScalarizeVectorResult(SDNode *N, unsigned OpNo);
   SDOperand ScalarizeVecRes_BinOp(SDNode *N);
   SDOperand ScalarizeVecRes_UnaryOp(SDNode *N);
 
@@ -413,7 +407,7 @@
   SDOperand ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N);
 
   // Vector Operand Scalarization: <1 x ty> -> ty.
-  bool ScalarizeOperand(SDNode *N, unsigned OpNo);
+  bool ScalarizeVectorOperand(SDNode *N, unsigned OpNo);
   SDOperand ScalarizeVecOp_BIT_CONVERT(SDNode *N);
   SDOperand ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
   SDOperand ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo);
@@ -426,7 +420,7 @@
   void SetSplitVector(SDOperand Op, SDOperand Lo, SDOperand Hi);
 
   // Vector Result Splitting: <128 x ty> -> 2 x <64 x ty>.
-  void SplitResult(SDNode *N, unsigned OpNo);
+  void SplitVectorResult(SDNode *N, unsigned OpNo);
 
   void SplitVecRes_UNDEF(SDNode *N, SDOperand &Lo, SDOperand &Hi);
   void SplitVecRes_LOAD(LoadSDNode *N, SDOperand &Lo, SDOperand &Hi);
@@ -442,7 +436,7 @@
   void SplitVecRes_FPOWI(SDNode *N, SDOperand &Lo, SDOperand &Hi);
 
   // Vector Operand Splitting: <128 x ty> -> 2 x <64 x ty>.
-  bool SplitOperand(SDNode *N, unsigned OpNo);
+  bool SplitVectorOperand(SDNode *N, unsigned OpNo);
 
   SDOperand SplitVecOp_BIT_CONVERT(SDNode *N);
   SDOperand SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N);

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp?rev=53403&r1=53402&r2=53403&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp Thu Jul 10 10:25:04 2008
@@ -54,7 +54,7 @@
       Lo = DAG.getNode(ISD::BIT_CONVERT, NVT, Lo);
       Hi = DAG.getNode(ISD::BIT_CONVERT, NVT, Hi);
       return;
-    case Split:
+    case SplitVector:
       // Convert the split parts of the input if it was split in two.
       GetSplitVector(InOp, Lo, Hi);
       if (Lo.getValueType() == Hi.getValueType()) {
@@ -65,7 +65,7 @@
         return;
       }
       break;
-    case Scalarize:
+    case ScalarizeVector:
       // Convert the element instead.
       SplitInteger(BitConvertToInteger(GetScalarizedVector(InOp)), Lo, Hi);
       Lo = DAG.getNode(ISD::BIT_CONVERT, NVT, Lo);

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=53403&r1=53402&r2=53403&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Thu Jul 10 10:25:04 2008
@@ -27,7 +27,7 @@
 //  Result Vector Scalarization: <1 x ty> -> ty.
 //===----------------------------------------------------------------------===//
 
-void DAGTypeLegalizer::ScalarizeResult(SDNode *N, unsigned ResNo) {
+void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
   DEBUG(cerr << "Scalarize node result " << ResNo << ": "; N->dump(&DAG);
         cerr << "\n");
   SDOperand R = SDOperand();
@@ -35,7 +35,7 @@
   switch (N->getOpcode()) {
   default:
 #ifndef NDEBUG
-    cerr << "ScalarizeResult #" << ResNo << ": ";
+    cerr << "ScalarizeVectorResult #" << ResNo << ": ";
     N->dump(&DAG); cerr << "\n";
 #endif
     assert(0 && "Do not know how to scalarize the result of this operator!");
@@ -147,7 +147,7 @@
 //  Operand Vector Scalarization <1 x ty> -> ty.
 //===----------------------------------------------------------------------===//
 
-bool DAGTypeLegalizer::ScalarizeOperand(SDNode *N, unsigned OpNo) {
+bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
   DEBUG(cerr << "Scalarize node operand " << OpNo << ": "; N->dump(&DAG);
         cerr << "\n");
   SDOperand Res = SDOperand();
@@ -156,7 +156,7 @@
     switch (N->getOpcode()) {
     default:
 #ifndef NDEBUG
-      cerr << "ScalarizeOperand Op #" << OpNo << ": ";
+      cerr << "ScalarizeVectorOperand Op #" << OpNo << ": ";
       N->dump(&DAG); cerr << "\n";
 #endif
       assert(0 && "Do not know how to scalarize this operator's operand!");
@@ -222,19 +222,19 @@
 //  Result Vector Splitting
 //===----------------------------------------------------------------------===//
 
-/// SplitResult - This method is called when the specified result of the
+/// SplitVectorResult - This method is called when the specified result of the
 /// specified node is found to need vector splitting.  At this point, the node
 /// may also have invalid operands or may have other results that need
 /// legalization, we just know that (at least) one result needs vector
 /// splitting.
-void DAGTypeLegalizer::SplitResult(SDNode *N, unsigned ResNo) {
+void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
   DEBUG(cerr << "Split node result: "; N->dump(&DAG); cerr << "\n");
   SDOperand Lo, Hi;
 
   switch (N->getOpcode()) {
   default:
 #ifndef NDEBUG
-    cerr << "SplitResult #" << ResNo << ": ";
+    cerr << "SplitVectorResult #" << ResNo << ": ";
     N->dump(&DAG); cerr << "\n";
 #endif
     assert(0 && "Do not know how to split the result of this operator!");
@@ -456,7 +456,7 @@
   case Legal:
   case PromoteInteger:
   case SoftenFloat:
-  case Scalarize:
+  case ScalarizeVector:
     break;
   case ExpandInteger:
   case ExpandFloat:
@@ -472,7 +472,7 @@
       return;
     }
     break;
-  case Split:
+  case SplitVector:
     // If the input is a vector that needs to be split, convert each split
     // piece of the input now.
     GetSplitVector(InOp, Lo, Hi);
@@ -529,11 +529,11 @@
 //  Operand Vector Splitting
 //===----------------------------------------------------------------------===//
 
-/// SplitOperand - This method is called when the specified operand of the
+/// SplitVectorOperand - This method is called when the specified operand of the
 /// specified node is found to need vector splitting.  At this point, all of the
 /// result types of the node are known to be legal, but other operands of the
 /// node may need legalization as well as the specified one.
-bool DAGTypeLegalizer::SplitOperand(SDNode *N, unsigned OpNo) {
+bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
   DEBUG(cerr << "Split node operand: "; N->dump(&DAG); cerr << "\n");
   SDOperand Res = SDOperand();
 
@@ -541,7 +541,7 @@
     switch (N->getOpcode()) {
     default:
 #ifndef NDEBUG
-      cerr << "SplitOperand Op #" << OpNo << ": ";
+      cerr << "SplitVectorOperand Op #" << OpNo << ": ";
       N->dump(&DAG); cerr << "\n";
 #endif
       assert(0 && "Do not know how to split this operator's operand!");




From baldrick at free.fr  Thu Jul 10 10:26:17 2008
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 10 Jul 2008 15:26:17 -0000
Subject: [llvm-commits] [llvm] r53404 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
Message-ID: <200807101526.m6AFQHUY020793@zion.cs.uiuc.edu>

Author: baldrick
Date: Thu Jul 10 10:26:17 2008
New Revision: 53404

URL: http://llvm.org/viewvc/llvm-project?rev=53404&view=rev
Log:
Make sure the alignment of the temporary created
in CreateStackStoreLoad is good enough for both
the source and destination types.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=53404&r1=53403&r2=53404&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Thu Jul 10 10:26:17 2008
@@ -16,6 +16,7 @@
 #include "LegalizeTypes.h"
 #include "llvm/CallingConv.h"
 #include "llvm/Support/CommandLine.h"
+#include "llvm/Target/TargetData.h"
 using namespace llvm;
 
 #ifndef NDEBUG
@@ -547,8 +548,11 @@
 
 SDOperand DAGTypeLegalizer::CreateStackStoreLoad(SDOperand Op,
                                                  MVT DestVT) {
-  // Create the stack frame object.
-  SDOperand FIPtr = DAG.CreateStackTemporary(DestVT);
+  // Create the stack frame object.  Make sure it is aligned for both
+  // the source and destination types.
+  unsigned SrcAlign =
+   TLI.getTargetData()->getPrefTypeAlignment(Op.getValueType().getTypeForMVT());
+  SDOperand FIPtr = DAG.CreateStackTemporary(DestVT, SrcAlign);
 
   // Emit a store to the stack slot.
   SDOperand Store = DAG.getStore(DAG.getEntryNode(), Op, FIPtr, NULL, 0);




From baldrick at free.fr  Thu Jul 10 10:29:55 2008
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 10 Jul 2008 15:29:55 -0000
Subject: [llvm-commits] [llvm] r53405 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeIntegerTypes.cpp
 LegalizeTypes.cpp LegalizeTypes.h LegalizeTypesGeneric.cpp
Message-ID: <200807101529.m6AFTtjT020917@zion.cs.uiuc.edu>

Author: baldrick
Date: Thu Jul 10 10:29:55 2008
New Revision: 53405

URL: http://llvm.org/viewvc/llvm-project?rev=53405&view=rev
Log:
Remove PromoteIntRes_FP_ROUND - not sure what it
was doing there: FP_ROUND returns a float, not an
integer.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=53405&r1=53404&r2=53405&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Thu Jul 10 10:29:55 2008
@@ -60,7 +60,6 @@
   case ISD::SIGN_EXTEND:
   case ISD::ZERO_EXTEND:
   case ISD::ANY_EXTEND:  Result = PromoteIntRes_INT_EXTEND(N); break;
-  case ISD::FP_ROUND:    Result = PromoteIntRes_FP_ROUND(N); break;
   case ISD::FP_TO_SINT:
   case ISD::FP_TO_UINT:  Result = PromoteIntRes_FP_TO_XINT(N); break;
   case ISD::SETCC:    Result = PromoteIntRes_SETCC(N); break;
@@ -169,15 +168,6 @@
   return DAG.getNode(N->getOpcode(), NVT, N->getOperand(0));
 }
 
-SDOperand DAGTypeLegalizer::PromoteIntRes_FP_ROUND(SDNode *N) {
-  // NOTE: Assumes input is legal.
-  if (N->getConstantOperandVal(1) == 0)
-    return DAG.getNode(ISD::FP_ROUND_INREG, N->getOperand(0).getValueType(),
-                       N->getOperand(0), DAG.getValueType(N->getValueType(0)));
-  // If the precision discard isn't needed, just return the operand unrounded.
-  return N->getOperand(0);
-}
-
 SDOperand DAGTypeLegalizer::PromoteIntRes_FP_TO_XINT(SDNode *N) {
   unsigned NewOpc = N->getOpcode();
   MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=53405&r1=53404&r2=53405&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Thu Jul 10 10:29:55 2008
@@ -28,7 +28,6 @@
 #endif
 
 
-
 /// run - This is the main entry point for the type legalizer.  This does a
 /// top-down traversal of the dag, legalizing types as it goes.
 void DAGTypeLegalizer::run() {
@@ -353,7 +352,6 @@
   }
 }
 
-
 /// RemapNode - If the specified value was already legalized to another value,
 /// replace it by that value.
 void DAGTypeLegalizer::RemapNode(SDOperand &N) {
@@ -441,7 +439,6 @@
     ReplacedNodes.erase(SDOperand(N, i));
 }
 
-
 void DAGTypeLegalizer::SetPromotedInteger(SDOperand Op, SDOperand Result) {
   AnalyzeNewNode(Result.Val);
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=53405&r1=53404&r2=53405&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Thu Jul 10 10:29:55 2008
@@ -214,7 +214,6 @@
   SDOperand PromoteIntRes_CTPOP(SDNode *N);
   SDOperand PromoteIntRes_CTTZ(SDNode *N);
   SDOperand PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode *N);
-  SDOperand PromoteIntRes_FP_ROUND(SDNode *N);
   SDOperand PromoteIntRes_FP_TO_XINT(SDNode *N);
   SDOperand PromoteIntRes_INT_EXTEND(SDNode *N);
   SDOperand PromoteIntRes_LOAD(LoadSDNode *N);

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp?rev=53405&r1=53404&r2=53405&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp Thu Jul 10 10:29:55 2008
@@ -170,6 +170,7 @@
   ReplaceValueWith(SDOperand(N, 1), Chain);
 }
 
+
 //===--------------------------------------------------------------------===//
 // Generic Operand Expansion.
 //===--------------------------------------------------------------------===//




From baldrick at free.fr  Thu Jul 10 10:30:54 2008
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 10 Jul 2008 15:30:54 -0000
Subject: [llvm-commits] [llvm] r53406 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Message-ID: <200807101530.m6AFUsSo020962@zion.cs.uiuc.edu>

Author: baldrick
Date: Thu Jul 10 10:30:54 2008
New Revision: 53406

URL: http://llvm.org/viewvc/llvm-project?rev=53406&view=rev
Log:
Fix a FIXME: use an apint in CTTZ legalization.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=53406&r1=53405&r2=53406&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Thu Jul 10 10:30:54 2008
@@ -363,9 +363,9 @@
   // The count is the same in the promoted type except if the original
   // value was zero.  This can be handled by setting the bit just off
   // the top of the original type.
-  Op = DAG.getNode(ISD::OR, NVT, Op,
-                   // FIXME: Do this using an APINT constant.
-                   DAG.getConstant(1UL << OVT.getSizeInBits(), NVT));
+  APInt TopBit(NVT.getSizeInBits(), 0);
+  TopBit.set(OVT.getSizeInBits());
+  Op = DAG.getNode(ISD::OR, NVT, Op, DAG.getConstant(TopBit, NVT));
   return DAG.getNode(ISD::CTTZ, NVT, Op);
 }
 




From baldrick at free.fr  Thu Jul 10 10:33:03 2008
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 10 Jul 2008 15:33:03 -0000
Subject: [llvm-commits] [llvm] r53407 - in /llvm/trunk:
 include/llvm/CodeGen/RuntimeLibcalls.h
 lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
 lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
 lib/CodeGen/SelectionDAG/TargetLowering.cpp
Message-ID: <200807101533.m6AFX312021046@zion.cs.uiuc.edu>

Author: baldrick
Date: Thu Jul 10 10:33:02 2008
New Revision: 53407

URL: http://llvm.org/viewvc/llvm-project?rev=53407&view=rev
Log:
Add a mysteriously missing libcall, FPTOSINT_F80_I32.
Be nice to 16 bit machines by supporting FP_TO_XINT
expansion for these.

Modified:
    llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Modified: llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h?rev=53407&r1=53406&r2=53407&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h (original)
+++ llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h Thu Jul 10 10:33:02 2008
@@ -97,6 +97,7 @@
     FPTOSINT_F64_I32,
     FPTOSINT_F64_I64,
     FPTOSINT_F64_I128,
+    FPTOSINT_F80_I32,
     FPTOSINT_F80_I64,
     FPTOSINT_F80_I128,
     FPTOSINT_PPCF128_I32,

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=53407&r1=53406&r2=53407&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Jul 10 10:33:02 2008
@@ -3770,6 +3770,10 @@
             LC = RTLIB::FPTOSINT_F32_I32;
           else if (OVT == MVT::f64)
             LC = RTLIB::FPTOSINT_F64_I32;
+          else if (OVT == MVT::f80)
+            LC = RTLIB::FPTOSINT_F80_I32;
+          else if (OVT == MVT::ppcf128)
+            LC = RTLIB::FPTOSINT_PPCF128_I32;
           else
             assert(0 && "Unexpected i32-to-fp conversion!");
         } else if (VT == MVT::i64) {

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=53407&r1=53406&r2=53407&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Thu Jul 10 10:33:02 2008
@@ -536,6 +536,9 @@
     case MVT::f64:
       LC = RTLIB::FPTOSINT_F64_I32;
       break;
+    case MVT::f80:
+      LC = RTLIB::FPTOSINT_F80_I32;
+      break;
     case MVT::ppcf128:
       LC = RTLIB::FPTOSINT_PPCF128_I32;
       break;

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=53407&r1=53406&r2=53407&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Thu Jul 10 10:33:02 2008
@@ -444,6 +444,7 @@
   return Tmp;
 }
 
+
 //===----------------------------------------------------------------------===//
 //  Integer Operand Promotion
 //===----------------------------------------------------------------------===//
@@ -995,7 +996,17 @@
   MVT VT = N->getValueType(0);
   SDOperand Op = N->getOperand(0);
   RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
-  if (VT == MVT::i64) {
+
+  if (VT == MVT::i32) {
+    if (Op.getValueType() == MVT::f32)
+      LC = RTLIB::FPTOSINT_F32_I32;
+    else if (Op.getValueType() == MVT::f64)
+      LC = RTLIB::FPTOSINT_F64_I32;
+    else if (Op.getValueType() == MVT::f80)
+      LC = RTLIB::FPTOSINT_F80_I32;
+    else if (Op.getValueType() == MVT::ppcf128)
+      LC = RTLIB::FPTOSINT_PPCF128_I32;
+  } else if (VT == MVT::i64) {
     if (Op.getValueType() == MVT::f32)
       LC = RTLIB::FPTOSINT_F32_I64;
     else if (Op.getValueType() == MVT::f64)
@@ -1013,9 +1024,8 @@
       LC = RTLIB::FPTOSINT_F80_I128;
     else if (Op.getValueType() == MVT::ppcf128)
       LC = RTLIB::FPTOSINT_PPCF128_I128;
-  } else {
-    assert(0 && "Unexpected fp-to-sint conversion!");
   }
+  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unexpected fp-to-sint conversion!");
   SplitInteger(MakeLibCall(LC, VT, &Op, 1, true/*sign irrelevant*/), Lo, Hi);
 }
 
@@ -1024,7 +1034,16 @@
   MVT VT = N->getValueType(0);
   SDOperand Op = N->getOperand(0);
   RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
-  if (VT == MVT::i64) {
+  if (VT == MVT::i32) {
+    if (Op.getValueType() == MVT::f32)
+      LC = RTLIB::FPTOUINT_F32_I32;
+    else if (Op.getValueType() == MVT::f64)
+      LC = RTLIB::FPTOUINT_F64_I32;
+    else if (Op.getValueType() == MVT::f80)
+      LC = RTLIB::FPTOUINT_F80_I32;
+    else if (Op.getValueType() == MVT::ppcf128)
+      LC = RTLIB::FPTOUINT_PPCF128_I32;
+  } else if (VT == MVT::i64) {
     if (Op.getValueType() == MVT::f32)
       LC = RTLIB::FPTOUINT_F32_I64;
     else if (Op.getValueType() == MVT::f64)
@@ -1042,9 +1061,8 @@
       LC = RTLIB::FPTOUINT_F80_I128;
     else if (Op.getValueType() == MVT::ppcf128)
       LC = RTLIB::FPTOUINT_PPCF128_I128;
-  } else {
-    assert(0 && "Unexpected fp-to-uint conversion!");
   }
+  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unexpected fp-to-uint conversion!");
   SplitInteger(MakeLibCall(LC, VT, &Op, 1, false/*sign irrelevant*/), Lo, Hi);
 }
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=53407&r1=53406&r2=53407&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Thu Jul 10 10:33:02 2008
@@ -95,6 +95,7 @@
   Names[RTLIB::FPTOSINT_F64_I32] = "__fixdfsi";
   Names[RTLIB::FPTOSINT_F64_I64] = "__fixdfdi";
   Names[RTLIB::FPTOSINT_F64_I128] = "__fixdfti";
+  Names[RTLIB::FPTOSINT_F80_I32] = "__fixxfsi";
   Names[RTLIB::FPTOSINT_F80_I64] = "__fixxfdi";
   Names[RTLIB::FPTOSINT_F80_I128] = "__fixxfti";
   Names[RTLIB::FPTOSINT_PPCF128_I32] = "__fixtfsi";




From baldrick at free.fr  Thu Jul 10 10:35:05 2008
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 10 Jul 2008 15:35:05 -0000
Subject: [llvm-commits] [llvm] r53408 - in /llvm/trunk:
 include/llvm/CodeGen/RuntimeLibcalls.h
 lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
 lib/CodeGen/SelectionDAG/TargetLowering.cpp
Message-ID: <200807101535.m6AFZ6An021120@zion.cs.uiuc.edu>

Author: baldrick
Date: Thu Jul 10 10:35:05 2008
New Revision: 53408

URL: http://llvm.org/viewvc/llvm-project?rev=53408&view=rev
Log:
Add support for 128 bit multiplicative operations.
Lack of these caused a bootstrap failure with Fortran
on x86-64 with LegalizeTypes turned on.  While there,
be nice to 16 bit machines and support expansion of
i32 too.

Modified:
    llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Modified: llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h?rev=53408&r1=53407&r2=53408&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h (original)
+++ llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h Thu Jul 10 10:35:05 2008
@@ -35,14 +35,19 @@
     SRA_I64,
     MUL_I32,
     MUL_I64,
+    MUL_I128,
     SDIV_I32,
     SDIV_I64,
+    SDIV_I128,
     UDIV_I32,
     UDIV_I64,
+    UDIV_I128,
     SREM_I32,
     SREM_I64,
+    SREM_I128,
     UREM_I32,
     UREM_I64,
+    UREM_I128,
     NEG_I32,
     NEG_I64,
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=53408&r1=53407&r2=53408&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Thu Jul 10 10:35:05 2008
@@ -1077,8 +1077,8 @@
 
   MVT VT = N->getValueType(0);
   MVT NVT = TLI.getTypeToTransformTo(VT);
-  SDOperand Ch  = N->getChain();    // Legalize the chain.
-  SDOperand Ptr = N->getBasePtr();  // Legalize the pointer.
+  SDOperand Ch  = N->getChain();
+  SDOperand Ptr = N->getBasePtr();
   ISD::LoadExtType ExtType = N->getExtensionType();
   int SVOffset = N->getSrcValueOffset();
   unsigned Alignment = N->getAlignment();
@@ -1330,14 +1330,14 @@
   }
 
   // If nothing else, we can make a libcall.
-  RTLIB::Libcall LC;
-  switch (VT.getSimpleVT()) {
-  default:
-    assert(false && "Unsupported MUL!");
-  case MVT::i64:
+  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
+  if (VT == MVT::i32)
+    LC = RTLIB::MUL_I32;
+  else if (VT == MVT::i64)
     LC = RTLIB::MUL_I64;
-    break;
-  }
+  else if (VT == MVT::i128)
+    LC = RTLIB::MUL_I128;
+  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported MUL!");
 
   SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
   SplitInteger(MakeLibCall(LC, VT, Ops, 2, true/*sign irrelevant*/), Lo, Hi);
@@ -1345,34 +1345,70 @@
 
 void DAGTypeLegalizer::ExpandIntRes_SDIV(SDNode *N,
                                          SDOperand &Lo, SDOperand &Hi) {
-  assert(N->getValueType(0) == MVT::i64 && "Unsupported sdiv!");
+  MVT VT = N->getValueType(0);
+
+  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
+  if (VT == MVT::i32)
+    LC = RTLIB::SDIV_I32;
+  else if (VT == MVT::i64)
+    LC = RTLIB::SDIV_I64;
+  else if (VT == MVT::i128)
+    LC = RTLIB::SDIV_I128;
+  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported SDIV!");
+
   SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
-  SplitInteger(MakeLibCall(RTLIB::SDIV_I64, N->getValueType(0), Ops, 2, true),
-               Lo, Hi);
+  SplitInteger(MakeLibCall(LC, VT, Ops, 2, true), Lo, Hi);
 }
 
 void DAGTypeLegalizer::ExpandIntRes_SREM(SDNode *N,
                                          SDOperand &Lo, SDOperand &Hi) {
-  assert(N->getValueType(0) == MVT::i64 && "Unsupported srem!");
+  MVT VT = N->getValueType(0);
+
+  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
+  if (VT == MVT::i32)
+    LC = RTLIB::SREM_I32;
+  else if (VT == MVT::i64)
+    LC = RTLIB::SREM_I64;
+  else if (VT == MVT::i128)
+    LC = RTLIB::SREM_I128;
+  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported SREM!");
+
   SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
-  SplitInteger(MakeLibCall(RTLIB::SREM_I64, N->getValueType(0), Ops, 2, true),
-               Lo, Hi);
+  SplitInteger(MakeLibCall(LC, VT, Ops, 2, true), Lo, Hi);
 }
 
 void DAGTypeLegalizer::ExpandIntRes_UDIV(SDNode *N,
                                          SDOperand &Lo, SDOperand &Hi) {
-  assert(N->getValueType(0) == MVT::i64 && "Unsupported udiv!");
+  MVT VT = N->getValueType(0);
+
+  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
+  if (VT == MVT::i32)
+    LC = RTLIB::UDIV_I32;
+  else if (VT == MVT::i64)
+    LC = RTLIB::UDIV_I64;
+  else if (VT == MVT::i128)
+    LC = RTLIB::UDIV_I128;
+  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported UDIV!");
+
   SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
-  SplitInteger(MakeLibCall(RTLIB::UDIV_I64, N->getValueType(0), Ops, 2, false),
-               Lo, Hi);
+  SplitInteger(MakeLibCall(LC, VT, Ops, 2, false), Lo, Hi);
 }
 
 void DAGTypeLegalizer::ExpandIntRes_UREM(SDNode *N,
                                          SDOperand &Lo, SDOperand &Hi) {
-  assert(N->getValueType(0) == MVT::i64 && "Unsupported urem!");
+  MVT VT = N->getValueType(0);
+
+  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
+  if (VT == MVT::i32)
+    LC = RTLIB::UREM_I32;
+  else if (VT == MVT::i64)
+    LC = RTLIB::UREM_I64;
+  else if (VT == MVT::i128)
+    LC = RTLIB::UREM_I128;
+  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported UREM!");
+
   SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
-  SplitInteger(MakeLibCall(RTLIB::UREM_I64, N->getValueType(0), Ops, 2, false),
-               Lo, Hi);
+  SplitInteger(MakeLibCall(LC, VT, Ops, 2, false), Lo, Hi);
 }
 
 void DAGTypeLegalizer::ExpandIntRes_Shift(SDNode *N,

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=53408&r1=53407&r2=53408&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Thu Jul 10 10:35:05 2008
@@ -37,14 +37,19 @@
   Names[RTLIB::SRA_I64] = "__ashrdi3";
   Names[RTLIB::MUL_I32] = "__mulsi3";
   Names[RTLIB::MUL_I64] = "__muldi3";
+  Names[RTLIB::MUL_I128] = "__multi3";
   Names[RTLIB::SDIV_I32] = "__divsi3";
   Names[RTLIB::SDIV_I64] = "__divdi3";
+  Names[RTLIB::SDIV_I128] = "__divti3";
   Names[RTLIB::UDIV_I32] = "__udivsi3";
   Names[RTLIB::UDIV_I64] = "__udivdi3";
+  Names[RTLIB::UDIV_I128] = "__udivti3";
   Names[RTLIB::SREM_I32] = "__modsi3";
   Names[RTLIB::SREM_I64] = "__moddi3";
+  Names[RTLIB::SREM_I128] = "__modti3";
   Names[RTLIB::UREM_I32] = "__umodsi3";
   Names[RTLIB::UREM_I64] = "__umoddi3";
+  Names[RTLIB::UREM_I128] = "__umodti3";
   Names[RTLIB::NEG_I32] = "__negsi2";
   Names[RTLIB::NEG_I64] = "__negdi2";
   Names[RTLIB::ADD_F32] = "__addsf3";




From criswell at uiuc.edu  Thu Jul 10 10:35:39 2008
From: criswell at uiuc.edu (John Criswell)
Date: Thu, 10 Jul 2008 15:35:39 -0000
Subject: [llvm-commits] [poolalloc] r53409 -
	/poolalloc/trunk/lib/PoolAllocate/PASimple.cpp
Message-ID: <200807101535.m6AFZd2K021163@zion.cs.uiuc.edu>

Author: criswell
Date: Thu Jul 10 10:35:39 2008
New Revision: 53409

URL: http://llvm.org/viewvc/llvm-project?rev=53409&view=rev
Log:
Instead of merging all heap DSNodes, simply make them all type-unknown.
This should help reduce the number of incomplete/unknown nodes.

Modified:
    poolalloc/trunk/lib/PoolAllocate/PASimple.cpp

Modified: poolalloc/trunk/lib/PoolAllocate/PASimple.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PASimple.cpp?rev=53409&r1=53408&r2=53409&view=diff

==============================================================================
--- poolalloc/trunk/lib/PoolAllocate/PASimple.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/PASimple.cpp Thu Jul 10 10:35:39 2008
@@ -92,8 +92,7 @@
   }
 
   for (unsigned i = 0; i < HeapNodes.size(); ++i)
-    for (unsigned j = i+1; j < HeapNodes.size(); ++j)
-      HeapNodes[i].mergeWith (HeapNodes[j]);
+    HeapNodes[i].getNode()->foldNodeCompletely();
   return;
 }
 




From sabre at nondot.org  Thu Jul 10 11:33:40 2008
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 10 Jul 2008 16:33:40 -0000
Subject: [llvm-commits] [llvm] r53410 - in /llvm/trunk:
 lib/Target/PowerPC/PPCISelLowering.cpp
 test/CodeGen/PowerPC/2008-07-10-SplatMiscompile.ll
Message-ID: <200807101633.m6AGXeXv023179@zion.cs.uiuc.edu>

Author: lattner
Date: Thu Jul 10 11:33:38 2008
New Revision: 53410

URL: http://llvm.org/viewvc/llvm-project?rev=53410&view=rev
Log:
Fix an altivec constant miscompilation that Duncan found through
his work on legalizetypes.

Added:
    llvm/trunk/test/CodeGen/PowerPC/2008-07-10-SplatMiscompile.ll
Modified:
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=53410&r1=53409&r2=53410&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Thu Jul 10 11:33:38 2008
@@ -3399,8 +3399,10 @@
     // If this value is in the range [-32,30] and is even, use:
     //    tmp = VSPLTI[bhw], result = add tmp, tmp
     if (SextVal >= -32 && SextVal <= 30 && (SextVal & 1) == 0) {
-      Op = BuildSplatI(SextVal >> 1, SplatSize, Op.getValueType(), DAG);
-      return DAG.getNode(ISD::ADD, Op.getValueType(), Op, Op);
+      SDOperand Res = BuildSplatI(SextVal >> 1, SplatSize, MVT::Other, DAG);
+      Res = DAG.getNode(ISD::ADD, Res.getValueType(), Res, Res);
+      return DAG.getNode(ISD::BIT_CONVERT, Op.getValueType(), Res);
+
     }
     
     // If this is 0x8000_0000 x 4, turn into vspltisw + vslw.  If it is 

Added: llvm/trunk/test/CodeGen/PowerPC/2008-07-10-SplatMiscompile.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2008-07-10-SplatMiscompile.ll?rev=53410&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/2008-07-10-SplatMiscompile.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/2008-07-10-SplatMiscompile.ll Thu Jul 10 11:33:38 2008
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | grep vadduhm
+; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | grep vsubuhm
+
+define <4 x i32> @test() nounwind {
+	ret <4 x i32> < i32 4293066722, i32 4293066722, i32 4293066722, i32 4293066722>
+}
+
+define <4 x i32> @test2() nounwind {
+	ret <4 x i32> < i32 1114129, i32 1114129, i32 1114129, i32 1114129>
+}




From sabre at nondot.org  Thu Jul 10 11:49:55 2008
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 10 Jul 2008 16:49:55 -0000
Subject: [llvm-commits] [llvm] r53411 -
	/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
Message-ID: <200807101649.m6AGnu2l023772@zion.cs.uiuc.edu>

Author: lattner
Date: Thu Jul 10 11:49:53 2008
New Revision: 53411

URL: http://llvm.org/viewvc/llvm-project?rev=53411&view=rev
Log:
Remove extraneous vertical whitespace before Eric gets the wrong idea ;-)

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=53411&r1=53410&r2=53411&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Thu Jul 10 11:49:53 2008
@@ -3402,7 +3402,6 @@
       SDOperand Res = BuildSplatI(SextVal >> 1, SplatSize, MVT::Other, DAG);
       Res = DAG.getNode(ISD::ADD, Res.getValueType(), Res, Res);
       return DAG.getNode(ISD::BIT_CONVERT, Op.getValueType(), Res);
-
     }
     
     // If this is 0x8000_0000 x 4, turn into vspltisw + vslw.  If it is 




From evan.cheng at apple.com  Thu Jul 10 13:23:24 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 10 Jul 2008 18:23:24 -0000
Subject: [llvm-commits] [llvm] r53414 -
	/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
Message-ID: <200807101823.m6AINOmF026972@zion.cs.uiuc.edu>

Author: evancheng
Date: Thu Jul 10 13:23:23 2008
New Revision: 53414

URL: http://llvm.org/viewvc/llvm-project?rev=53414&view=rev
Log:
Change StackSlotForVirtReg (which maps vregs to frame indices) from std::map to IndexedMap.

Modified:
    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp

Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=53414&r1=53413&r2=53414&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Thu Jul 10 13:23:23 2008
@@ -31,7 +31,6 @@
 #include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/STLExtras.h"
 #include <algorithm>
-#include <map>
 using namespace llvm;
 
 STATISTIC(NumStores, "Number of stores added");
@@ -45,7 +44,8 @@
   class VISIBILITY_HIDDEN RALocal : public MachineFunctionPass {
   public:
     static char ID;
-    RALocal() : MachineFunctionPass((intptr_t)&ID) {}
+    RALocal() : MachineFunctionPass((intptr_t)&ID),
+      StackSlotForVirtReg(-1) {}
   private:
     const TargetMachine *TM;
     MachineFunction *MF;
@@ -54,7 +54,7 @@
 
     // StackSlotForVirtReg - Maps virtual regs to the frame index where these
     // values are spilled.
-    std::map<unsigned, int> StackSlotForVirtReg;
+    IndexedMap<int, VirtReg2IndexFunctor> StackSlotForVirtReg;
 
     // Virt2PhysRegMap - This map contains entries for each virtual register
     // that is currently available in a physical register.
@@ -254,17 +254,16 @@
 /// to be held on the stack.
 int RALocal::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
   // Find the location Reg would belong...
-  std::map<unsigned, int>::iterator I = StackSlotForVirtReg.find(VirtReg);
-
-  if (I != StackSlotForVirtReg.end())
-    return I->second;          // Already has space allocated?
+  int SS = StackSlotForVirtReg[VirtReg];
+  if (SS != -1)
+    return SS;          // Already has space allocated?
 
   // Allocate a new stack object for this spill location...
   int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
                                                        RC->getAlignment());
 
   // Assign the slot...
-  StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
+  StackSlotForVirtReg[VirtReg] = FrameIdx;
   return FrameIdx;
 }
 
@@ -961,6 +960,7 @@
   // initialize the virtual->physical register map to have a 'null'
   // mapping for all virtual registers
   unsigned LastVirtReg = MF->getRegInfo().getLastVirtReg();
+  StackSlotForVirtReg.grow(LastVirtReg);
   Virt2PhysRegMap.grow(LastVirtReg);
   Virt2LastUseMap.grow(LastVirtReg);
   VirtRegModified.resize(LastVirtReg+1-TargetRegisterInfo::FirstVirtualRegister);




From gohman at apple.com  Thu Jul 10 14:49:33 2008
From: gohman at apple.com (Dan Gohman)
Date: Thu, 10 Jul 2008 19:49:33 -0000
Subject: [llvm-commits] [llvm] r53415 -
	/llvm/trunk/lib/CodeGen/StackSlotColoring.cpp
Message-ID: <200807101949.m6AJnXVu030437@zion.cs.uiuc.edu>

Author: djg
Date: Thu Jul 10 14:49:32 2008
New Revision: 53415

URL: http://llvm.org/viewvc/llvm-project?rev=53415&view=rev
Log:
Make stack slot coloring's debug output more consistent with
other passes.

Modified:
    llvm/trunk/lib/CodeGen/StackSlotColoring.cpp

Modified: llvm/trunk/lib/CodeGen/StackSlotColoring.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackSlotColoring.cpp?rev=53415&r1=53414&r2=53415&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StackSlotColoring.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackSlotColoring.cpp Thu Jul 10 14:49:32 2008
@@ -242,7 +242,7 @@
 }
 
 bool StackSlotColoring::runOnMachineFunction(MachineFunction &MF) {
-  DOUT << "******** Stack Slot Coloring ********\n";
+  DOUT << "********** Stack Slot Coloring **********\n";
 
   MFI = MF.getFrameInfo();
   LS = &getAnalysis<LiveStacks>();




From gohman at apple.com  Thu Jul 10 14:55:04 2008
From: gohman at apple.com (Dan Gohman)
Date: Thu, 10 Jul 2008 19:55:04 -0000
Subject: [llvm-commits] [llvm] r53416 -
	/llvm/trunk/include/llvm/CodeGen/SchedGraphCommon.h
Message-ID: <200807101955.m6AJt4rf030674@zion.cs.uiuc.edu>

Author: djg
Date: Thu Jul 10 14:55:04 2008
New Revision: 53416

URL: http://llvm.org/viewvc/llvm-project?rev=53416&view=rev
Log:
Remove this file; the code that it went with is no longer
in the repository.

Removed:
    llvm/trunk/include/llvm/CodeGen/SchedGraphCommon.h

Removed: llvm/trunk/include/llvm/CodeGen/SchedGraphCommon.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SchedGraphCommon.h?rev=53415&view=auto

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SchedGraphCommon.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SchedGraphCommon.h (removed)
@@ -1,289 +0,0 @@
-//===-- SchedGraphCommon.h - Scheduling Base Graph --------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// A common graph class that is based on the SSA graph. It includes
-// extra dependencies that are caused by machine resources.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_CODEGEN_SCHEDGRAPHCOMMON_H
-#define LLVM_CODEGEN_SCHEDGRAPHCOMMON_H
-
-#include "llvm/Value.h"
-#include "llvm/ADT/iterator.h"
-#include "llvm/Support/Streams.h"
-#include <vector>
-
-namespace llvm {
-
-class SchedGraphEdge;
-class SchedGraphNode;
-
-/******************** Exported Data Types and Constants ********************/
-
-typedef int ResourceId;
-const ResourceId InvalidRID        = -1;
-const ResourceId MachineCCRegsRID  = -2; // use +ve numbers for actual regs
-const ResourceId MachineIntRegsRID = -3; // use +ve numbers for actual regs
-const ResourceId MachineFPRegsRID  = -4; // use +ve numbers for actual regs
-
-
-//*********************** Public Class Declarations ************************/
-class SchedGraphNodeCommon {
-protected:
-  unsigned ID;
-  std::vector<SchedGraphEdge*> inEdges;
-  std::vector<SchedGraphEdge*> outEdges;
-  int latency;
-  int origIndexInBB;            // original position of instr in BB
-
-public:
-  typedef std::vector<SchedGraphEdge*>::iterator iterator;
-  typedef std::vector<SchedGraphEdge*>::const_iterator const_iterator;
-  typedef std::vector<SchedGraphEdge*>::reverse_iterator reverse_iterator;
-  typedef std::vector<SchedGraphEdge*>::const_reverse_iterator const_reverse_iterator;
-
-  // Accessor methods
-  unsigned getNodeId() const { return ID; }
-  int getLatency() const { return latency; }
-  unsigned getNumInEdges() const { return inEdges.size(); }
-  unsigned getNumOutEdges() const { return outEdges.size(); }
-  int getOrigIndexInBB() const { return origIndexInBB; }
-
-  // Iterators
-  iterator beginInEdges() { return inEdges.begin(); }
-  iterator endInEdges() { return inEdges.end(); }
-  iterator beginOutEdges() { return outEdges.begin(); }
-  iterator endOutEdges() { return outEdges.end(); }
-
-  const_iterator beginInEdges() const { return inEdges.begin(); }
-  const_iterator endInEdges() const { return inEdges.end(); }
-  const_iterator beginOutEdges() const { return outEdges.begin(); }
-  const_iterator endOutEdges() const { return outEdges.end(); }
-
-  void dump(int indent=0) const;
-
-  // Debugging support
-  virtual void print(std::ostream &os) const = 0;
-  void print(std::ostream *os) const { if (os) print(*os); }
-
-protected:
-  friend class SchedGraphCommon;
-  friend class SchedGraphEdge;   // give access for adding edges
-
-
-  // disable default constructor and provide a ctor for single-block graphs
-  SchedGraphNodeCommon();  // DO NOT IMPLEMENT
-
-  inline SchedGraphNodeCommon(unsigned Id, int index, int late=0) : ID(Id), latency(late), origIndexInBB(index) {}
-
-  virtual ~SchedGraphNodeCommon();
-
-  //Functions to add and remove edges
-  inline void addInEdge(SchedGraphEdge* edge) { inEdges.push_back(edge); }
-  inline void addOutEdge(SchedGraphEdge* edge) { outEdges.push_back(edge); }
-  void removeInEdge(const SchedGraphEdge* edge);
-  void removeOutEdge(const SchedGraphEdge* edge);
-
-};
-
-// ostream << operator for SchedGraphNode class
-inline std::ostream &operator<<(std::ostream &os,
-                                const SchedGraphNodeCommon &node) {
-  node.print(os);
-  return os;
-}
-
-//
-// SchedGraphEdge - Edge class to represent dependencies
-//
-class SchedGraphEdge {
-public:
-  enum SchedGraphEdgeDepType {
-    CtrlDep, MemoryDep, ValueDep, MachineRegister, MachineResource
-  };
-  enum DataDepOrderType {
-    TrueDep = 0x1, AntiDep=0x2, OutputDep=0x4, NonDataDep=0x8
-  };
-
-protected:
-  SchedGraphNodeCommon* src;
-  SchedGraphNodeCommon* sink;
-  SchedGraphEdgeDepType depType;
-  unsigned int depOrderType;
-  int minDelay; // cached latency (assumes fixed target arch)
-  int iteDiff;
-
-  union {
-    const Value* val;
-    int          machineRegNum;
-    ResourceId   resourceId;
-  };
-
-public:
-  // For all constructors, if minDelay is unspecified, minDelay is
-  // set to _src->getLatency().
-
-  // constructor for CtrlDep or MemoryDep edges, selected by 3rd argument
-  SchedGraphEdge(SchedGraphNodeCommon* _src, SchedGraphNodeCommon* _sink,
-                 SchedGraphEdgeDepType _depType, unsigned int _depOrderType,
-                 int _minDelay = -1);
-
-  // constructor for explicit value dependence (may be true/anti/output)
-  SchedGraphEdge(SchedGraphNodeCommon* _src, SchedGraphNodeCommon* _sink,
-                 const Value* _val, unsigned int _depOrderType,
-                 int _minDelay = -1);
-
-  // constructor for machine register dependence
-  SchedGraphEdge(SchedGraphNodeCommon* _src,SchedGraphNodeCommon* _sink,
-                 unsigned int _regNum, unsigned int _depOrderType,
-                 int _minDelay = -1);
-
-  // constructor for any other machine resource dependences.
-  // DataDepOrderType is always NonDataDep.  It it not an argument to
-  // avoid overloading ambiguity with previous constructor.
-  SchedGraphEdge(SchedGraphNodeCommon* _src, SchedGraphNodeCommon* _sink,
-                 ResourceId _resourceId, int _minDelay = -1);
-
-  ~SchedGraphEdge() {}
-
-  SchedGraphNodeCommon* getSrc() const { return src; }
-  SchedGraphNodeCommon* getSink() const { return sink; }
-  int getMinDelay() const { return minDelay; }
-  SchedGraphEdgeDepType getDepType() const { return depType; }
-  unsigned int getDepOrderType() const { return depOrderType; }
-
-  const Value* getValue() const {
-    assert(depType == ValueDep); return val;
-  }
-
-  int getMachineReg() const {
-    assert(depType == MachineRegister); return machineRegNum;
-  }
-
-  int getResourceId() const {
-    assert(depType == MachineResource); return resourceId;
-  }
-
-  void setIteDiff(int _iteDiff) {
-    iteDiff = _iteDiff;
-  }
-
-  int getIteDiff() {
-    return iteDiff;
-  }
-
-public:
-  // Debugging support
-  void print(std::ostream &os) const;
-  void print(std::ostream *os) const { if (os) print(*os); }
-  void dump(int indent=0) const;
-
-private:
-  // disable default ctor
-  SchedGraphEdge(); // DO NOT IMPLEMENT
-};
-
-// ostream << operator for SchedGraphNode class
-inline std::ostream &operator<<(std::ostream &os, const SchedGraphEdge &edge) {
-  edge.print(os);
-  return os;
-}
-
-class SchedGraphCommon {
-
-protected:
-  SchedGraphNodeCommon* graphRoot;     // the root and leaf are not inserted
-  SchedGraphNodeCommon* graphLeaf;     //  in the hash_map (see getNumNodes())
-
-public:
-  //
-  // Accessor methods
-  //
-  SchedGraphNodeCommon* getRoot() const { return graphRoot; }
-  SchedGraphNodeCommon* getLeaf() const { return graphLeaf; }
-
-  //
-  // Delete nodes or edges from the graph.
-  //
-  void eraseNode(SchedGraphNodeCommon* node);
-  void eraseIncomingEdges(SchedGraphNodeCommon* node, bool addDummyEdges = true);
-  void eraseOutgoingEdges(SchedGraphNodeCommon* node, bool addDummyEdges = true);
-  void eraseIncidentEdges(SchedGraphNodeCommon* node, bool addDummyEdges = true);
-
-  SchedGraphCommon() {}
-  ~SchedGraphCommon();
-};
-
-
-//********************** Sched Graph Iterators *****************************/
-
-// Ok to make it a template because it shd get instantiated at most twice:
-// for <SchedGraphNode, SchedGraphNode::iterator> and
-// for <const SchedGraphNode, SchedGraphNode::const_iterator>.
-//
-template <class _NodeType, class _EdgeType, class _EdgeIter>
-class SGPredIterator: public bidirectional_iterator<_NodeType, ptrdiff_t> {
-protected:
-  _EdgeIter oi;
-public:
-  typedef SGPredIterator<_NodeType, _EdgeType, _EdgeIter> _Self;
-
-  inline SGPredIterator(_EdgeIter startEdge) : oi(startEdge) {}
-
-  inline bool operator==(const _Self& x) const { return oi == x.oi; }
-  inline bool operator!=(const _Self& x) const { return !operator==(x); }
-
-  // operator*() differs for pred or succ iterator
-  inline _NodeType* operator*() const { return (_NodeType*)(*oi)->getSrc(); }
-  inline _NodeType* operator->() const { return operator*(); }
-
-  inline _EdgeType* getEdge() const { return *(oi); }
-
-  inline _Self &operator++() { ++oi; return *this; }    // Preincrement
-  inline _Self operator++(int) {                        // Postincrement
-    _Self tmp(*this); ++*this; return tmp;
-  }
-
-  inline _Self &operator--() { --oi; return *this; }    // Predecrement
-  inline _Self operator--(int) {                        // Postdecrement
-    _Self tmp = *this; --*this; return tmp;
-  }
-};
-
-template <class _NodeType, class _EdgeType, class _EdgeIter>
-class SGSuccIterator : public bidirectional_iterator<_NodeType, ptrdiff_t> {
-protected:
-  _EdgeIter oi;
-public:
-  typedef SGSuccIterator<_NodeType, _EdgeType, _EdgeIter> _Self;
-
-  inline SGSuccIterator(_EdgeIter startEdge) : oi(startEdge) {}
-
-  inline bool operator==(const _Self& x) const { return oi == x.oi; }
-  inline bool operator!=(const _Self& x) const { return !operator==(x); }
-
-  inline _NodeType* operator*() const { return (_NodeType*)(*oi)->getSink(); }
-  inline _NodeType* operator->() const { return operator*(); }
-
-  inline _EdgeType* getEdge() const { return *(oi); }
-
-  inline _Self &operator++() { ++oi; return *this; }    // Preincrement
-  inline _Self operator++(int) {                        // Postincrement
-    _Self tmp(*this); ++*this; return tmp;
-  }
-
-  inline _Self &operator--() { --oi; return *this; }    // Predecrement
-  inline _Self operator--(int) {                        // Postdecrement
-    _Self tmp = *this; --*this; return tmp;
-  }
-};
-} // End llvm namespace
-
-#endif




From gohman at apple.com  Thu Jul 10 14:55:54 2008
From: gohman at apple.com (Dan Gohman)
Date: Thu, 10 Jul 2008 19:55:54 -0000
Subject: [llvm-commits] [llvm] r53417 -
	/llvm/trunk/include/llvm/Support/GraphWriter.h
Message-ID: <200807101955.m6AJtsjn030706@zion.cs.uiuc.edu>

Author: djg
Date: Thu Jul 10 14:55:54 2008
New Revision: 53417

URL: http://llvm.org/viewvc/llvm-project?rev=53417&view=rev
Log:
Escape the graph name. This unbreaks -view-cfg.

Modified:
    llvm/trunk/include/llvm/Support/GraphWriter.h

Modified: llvm/trunk/include/llvm/Support/GraphWriter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/GraphWriter.h?rev=53417&r1=53416&r2=53417&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/GraphWriter.h (original)
+++ llvm/trunk/include/llvm/Support/GraphWriter.h Thu Jul 10 14:55:54 2008
@@ -87,7 +87,7 @@
     if (!Name.empty())
       O << "digraph " << Name << " {\n";
     else if (!GraphName.empty())
-      O << "digraph " << GraphName << " {\n";
+      O << "digraph \"" << DOT::EscapeString(GraphName) << "\" {\n";
     else
       O << "digraph unnamed {\n";
 




From gohman at apple.com  Thu Jul 10 14:57:25 2008
From: gohman at apple.com (Dan Gohman)
Date: Thu, 10 Jul 2008 19:57:25 -0000
Subject: [llvm-commits] [llvm] r53418 -
	/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h
Message-ID: <200807101957.m6AJvPoD030754@zion.cs.uiuc.edu>

Author: djg
Date: Thu Jul 10 14:57:25 2008
New Revision: 53418

URL: http://llvm.org/viewvc/llvm-project?rev=53418&view=rev
Log:
Stack objects have nonnegative indices, not just positive indices.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h

Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=53418&r1=53417&r2=53418&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Thu Jul 10 14:57:25 2008
@@ -55,7 +55,7 @@
 ///
 /// To support this, the class assigns unique integer identifiers to stack
 /// objects requested clients.  These identifiers are negative integers for
-/// fixed stack objects (such as arguments passed on the stack) or positive
+/// fixed stack objects (such as arguments passed on the stack) or nonnegative
 /// for objects that may be reordered.  Instructions which refer to stack
 /// objects use a special MO_FrameIndex operand to represent these frame
 /// indexes.
@@ -327,7 +327,7 @@
   }
 
   /// CreateStackObject - Create a new statically sized stack object, returning
-  /// a postive identifier to represent it.
+  /// a nonnegative identifier to represent it.
   ///
   int CreateStackObject(uint64_t Size, unsigned Alignment) {
     assert(Size != 0 && "Cannot allocate zero size stack objects!");




From gohman at apple.com  Thu Jul 10 14:58:23 2008
From: gohman at apple.com (Dan Gohman)
Date: Thu, 10 Jul 2008 19:58:23 -0000
Subject: [llvm-commits] [llvm] r53419 -
	/llvm/trunk/include/llvm/CodeGen/MachineOperand.h
Message-ID: <200807101958.m6AJwNYm030796@zion.cs.uiuc.edu>

Author: djg
Date: Thu Jul 10 14:58:23 2008
New Revision: 53419

URL: http://llvm.org/viewvc/llvm-project?rev=53419&view=rev
Log:
Fix a copy+pasto in an assertion string.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineOperand.h

Modified: llvm/trunk/include/llvm/CodeGen/MachineOperand.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineOperand.h?rev=53419&r1=53418&r2=53419&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineOperand.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineOperand.h Thu Jul 10 14:58:23 2008
@@ -407,7 +407,7 @@
   void AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo);
 
   void RemoveRegOperandFromRegInfo() {
-    assert(isOnRegUseList() && "Can only add reg operand to use lists");
+    assert(isOnRegUseList() && "Reg operand is not on a use list");
     // Unlink this from the doubly linked list of operands.
     MachineOperand *NextOp = Contents.Reg.Next;
     *Contents.Reg.Prev = NextOp; 




From isanbard at gmail.com  Thu Jul 10 15:52:09 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 10 Jul 2008 20:52:09 -0000
Subject: [llvm-commits] [llvm] r53420 - in
 /llvm/branches/Apple/Gaz/lib/Target: PowerPC/PPCAsmPrinter.cpp
 X86/X86ATTAsmPrinter.cpp
Message-ID: <200807102052.m6AKq9d4032447@zion.cs.uiuc.edu>

Author: void
Date: Thu Jul 10 15:52:08 2008
New Revision: 53420

URL: http://llvm.org/viewvc/llvm-project?rev=53420&view=rev
Log:
Pull r53353 and r53355 into Gaz:

Emit debug info for data-only files.  This version
applies to ppc Darwin only.

Emit debug info for data-only files.  This version
is X86 ATT only.



Modified:
    llvm/branches/Apple/Gaz/lib/Target/PowerPC/PPCAsmPrinter.cpp
    llvm/branches/Apple/Gaz/lib/Target/X86/X86ATTAsmPrinter.cpp

Modified: llvm/branches/Apple/Gaz/lib/Target/PowerPC/PPCAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=53420&r1=53419&r2=53420&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/Target/PowerPC/PPCAsmPrinter.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/Target/PowerPC/PPCAsmPrinter.cpp Thu Jul 10 15:52:08 2008
@@ -790,9 +790,6 @@
 /// method to print assembly for each instruction.
 ///
 bool DarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
-  // We need this for Personality functions.
-  MMI = &getAnalysis<MachineModuleInfo>();
-  DW.SetModuleInfo(MMI);
 
   SetupMachineFunction(MF);
   O << "\n\n";
@@ -887,6 +884,15 @@
      
   bool Result = AsmPrinter::doInitialization(M);
   
+  // Emit initial debug information.
+  DW.BeginModule(&M);
+
+  // We need this for Personality functions.
+  // AsmPrinter::doInitialization should have done this analysis.
+  MMI = getAnalysisToUpdate<MachineModuleInfo>();
+  assert(MMI);
+  DW.SetModuleInfo(MMI);
+
   // Darwin wants symbols to be quoted if they have complex names.
   Mang->setUseQuotes(true);
   
@@ -903,8 +909,6 @@
   }
   SwitchToTextSection(TAI->getTextSection());
   
-  // Emit initial debug information.
-  DW.BeginModule(&M);
   return Result;
 }
 

Modified: llvm/branches/Apple/Gaz/lib/Target/X86/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=53420&r1=53419&r2=53420&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/Target/X86/X86ATTAsmPrinter.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/Target/X86/X86ATTAsmPrinter.cpp Thu Jul 10 15:52:08 2008
@@ -232,13 +232,6 @@
   const Function *F = MF.getFunction();
   unsigned CC = F->getCallingConv();
 
-  if (TAI->doesSupportDebugInformation()) {
-    // Let PassManager know we need debug information and relay
-    // the MachineModuleInfo address on to DwarfWriter.
-    MMI = &getAnalysis<MachineModuleInfo>();
-    DW.SetModuleInfo(MMI);
-  }
-
   SetupMachineFunction(MF);
   O << "\n\n";
 
@@ -758,6 +751,14 @@
 
   bool Result = AsmPrinter::doInitialization(M);
 
+  if (TAI->doesSupportDebugInformation()) {
+    // Let PassManager know we need debug information and relay
+    // the MachineModuleInfo address on to DwarfWriter.
+    // AsmPrinter::doInitialization did this analysis.
+    MMI = getAnalysisToUpdate<MachineModuleInfo>();
+    DW.SetModuleInfo(MMI);
+  }
+
   // Darwin wants symbols to be quoted if they have complex names.
   if (Subtarget->isTargetDarwin())
     Mang->setUseQuotes(true);




From jlerouge at apple.com  Thu Jul 10 15:50:07 2008
From: jlerouge at apple.com (Julien Lerouge)
Date: Thu, 10 Jul 2008 13:50:07 -0700
Subject: [llvm-commits] [llvm] r53212 - in
	/llvm/trunk:	include/llvm/CodeGen/ lib/CodeGen/
	lib/CodeGen/SelectionDAG/	lib/Target/ARM/ lib/Target/Alpha/
	lib/Target/CellSPU/	lib/Target/IA64/ lib/Target/Mips/
	lib/Target/PIC16/	lib/Target/PowerPC/ lib/Target/Sparc/
	lib/Target/X86/
In-Reply-To: <200807072314.m67NER4K016634@zion.cs.uiuc.edu>
References: <200807072314.m67NER4K016634@zion.cs.uiuc.edu>
Message-ID: <20080710205006.GB14307@pom.apple.com>

On Mon, Jul 07, 2008 at 11:14:25PM +0000, Dan Gohman wrote:
> Author: djg
> Date: Mon Jul  7 18:14:23 2008
> New Revision: 53212
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=53212&view=rev
> Log:
> Pool-allocation for MachineInstrs, MachineBasicBlocks, and
> MachineMemOperands. The pools are owned by MachineFunctions.
> 
> This drastically reduces the number of calls to malloc/free made
> during the "Emit" phase of scheduling, as well as later phases
> in CodeGen. Combined with other changes, this speeds up the
> "instruction selection" phase of CodeGen by 10% in some cases.
> 

Hello Dan,

This patch seems to break llvm-gcc build on MingW32 (using gcc 3.4.5). I get
the following assertion:

/c/cygwin/home/jlerouge/buildbot/llvm/gcc-build/./gcc/xgcc -B/c/cygwin/home/jlerouge/buildbot/llvm/gcc-build/./gcc/ -L/c/cygwin/home/jlerouge/buildbot/llvm/gcc-build/i686-pc-mingw32/winsup/mingw -L/c/cygwin/home/jlerouge/buildbot/llvm/gcc-build/i686-pc-mingw32/winsup/w32api/lib -isystem /c/cygwin/home/jlerouge/buildbot/llvm-gcc4.2-src/winsup/mingw/include -isystem /c/cygwin/home/jlerouge/buildbot/llvm-gcc4.2-src/winsup/w32api/include -Bc:/cygwin/home/jlerouge/buildbot/llvm/i686-pc-mingw32/bin/ -Bc:/cygwin/home/jlerouge/buildbot/llvm/i686-pc-mingw32/lib/ -isystem c:/cygwin/home/jlerouge/buildbot/llvm/i686-pc-mingw32/include -isystem c:/cygwin/home/jlerouge/buildbot/llvm/i686-pc-mingw32/sys-include -O2 -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition  -isystem ./include  -I. -I. -I../../../llvm-gcc4.2-src/gcc -I../../../llvm-gcc4.2-src/gcc/. -I../../../llvm-gcc4.2-src/gcc/../include -I../../../llvm-gcc4.2-src/gcc/../libcpp/include  -I../../../llvm-gcc4.2-src/gcc/../libdecnumber -I../libdecnumber -Ic:/cygwin/home/jlerouge/buildbot/llvm/llvm-build/include -I/c/cygwin/home/jlerouge/buildbot/llvm-src/include  -g0 -finhibit-size-directive -fno-inline-functions -fno-exceptions -fno-zero-initialized-in-bss -fno-toplevel-reorder  -c -o crtbegin.o \
../../../llvm-gcc4.2-src/gcc/config/i386/cygming-crtbegin.c
Assertion failed: unsigned(AlignOf<SubClass>::Alignment) <= unsigned(AlignOf<LargestT>::Alignment), file c:/cygwin/home/jlerouge/buildbot/llvm-src/include/llvm/ADT/alist_node.h, line 51



This application has requested the Runtime to terminate it in an unusual way.
Please contact the application's support team for more information.

../../../llvm-gcc4.2-src/gcc/config/i386/cygming-crtbegin.c:140: internal compiler error: Aborted

Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.

Any idea ? 

Thanks,
Julien

-- 
Julien Lerouge
PGP Key Id: 0xB1964A62
PGP Fingerprint: 392D 4BAD DB8B CE7F 4E5F FA3C 62DB 4AA7 B196 4A62
PGP Public Key from: keyserver.pgp.com



From isanbard at gmail.com  Thu Jul 10 16:06:01 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 10 Jul 2008 21:06:01 -0000
Subject: [llvm-commits] [llvm] r53421 - in /llvm/branches/Apple/Gaz:
 include/llvm/CodeGen/LiveIntervalAnalysis.h
 include/llvm/CodeGen/MachineInstr.h lib/CodeGen/LiveIntervalAnalysis.cpp
 lib/CodeGen/MachineInstr.cpp lib/CodeGen/RegAllocLocal.cpp
 lib/CodeGen/RegAllocSimple.cpp
Message-ID: <200807102106.m6AL61Ge000376@zion.cs.uiuc.edu>

Author: void
Date: Thu Jul 10 16:06:00 2008
New Revision: 53421

URL: http://llvm.org/viewvc/llvm-project?rev=53421&view=rev
Log:
Pull r53344, r53346, r53351, r53352, r53389, r53390, r53394 into Gaz.

Modified:
    llvm/branches/Apple/Gaz/include/llvm/CodeGen/LiveIntervalAnalysis.h
    llvm/branches/Apple/Gaz/include/llvm/CodeGen/MachineInstr.h
    llvm/branches/Apple/Gaz/lib/CodeGen/LiveIntervalAnalysis.cpp
    llvm/branches/Apple/Gaz/lib/CodeGen/MachineInstr.cpp
    llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocLocal.cpp
    llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocSimple.cpp

Modified: llvm/branches/Apple/Gaz/include/llvm/CodeGen/LiveIntervalAnalysis.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=53421&r1=53420&r2=53421&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/include/llvm/CodeGen/LiveIntervalAnalysis.h (original)
+++ llvm/branches/Apple/Gaz/include/llvm/CodeGen/LiveIntervalAnalysis.h Thu Jul 10 16:06:00 2008
@@ -328,14 +328,14 @@
     /// handleVirtualRegisterDef)
     void handleRegisterDef(MachineBasicBlock *MBB,
                            MachineBasicBlock::iterator MI, unsigned MIIdx,
-                           MachineOperand& MO);
+                           MachineOperand& MO, unsigned MOIdx);
 
     /// handleVirtualRegisterDef - update intervals for a virtual
     /// register def
     void handleVirtualRegisterDef(MachineBasicBlock *MBB,
                                   MachineBasicBlock::iterator MI,
                                   unsigned MIIdx, MachineOperand& MO,
-                                  LiveInterval& interval);
+                                  unsigned MOIdx, LiveInterval& interval);
 
     /// handlePhysicalRegisterDef - update intervals for a physical register
     /// def.

Modified: llvm/branches/Apple/Gaz/include/llvm/CodeGen/MachineInstr.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/include/llvm/CodeGen/MachineInstr.h?rev=53421&r1=53420&r2=53421&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/include/llvm/CodeGen/MachineInstr.h (original)
+++ llvm/branches/Apple/Gaz/include/llvm/CodeGen/MachineInstr.h Thu Jul 10 16:06:00 2008
@@ -207,9 +207,9 @@
   /// none is found.
   int findFirstPredOperandIdx() const;
   
-  /// isRegReDefinedByTwoAddr - Returns true if the Reg re-definition is due
-  /// to two addr elimination.
-  bool isRegReDefinedByTwoAddr(unsigned Reg) const;
+  /// isRegReDefinedByTwoAddr - Given the defined register and the operand index,
+  /// check if the register def is a re-definition due to two addr elimination.
+  bool isRegReDefinedByTwoAddr(unsigned Reg, unsigned DefIdx) const;
 
   /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
   ///

Modified: llvm/branches/Apple/Gaz/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=53421&r1=53420&r2=53421&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/CodeGen/LiveIntervalAnalysis.cpp Thu Jul 10 16:06:00 2008
@@ -298,6 +298,7 @@
 void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
                                              MachineBasicBlock::iterator mi,
                                              unsigned MIIdx, MachineOperand& MO,
+                                             unsigned MOIdx,
                                              LiveInterval &interval) {
   DOUT << "\t\tregister: "; DEBUG(printRegName(interval.reg));
   LiveVariables::VarInfo& vi = lv_->getVarInfo(interval.reg);
@@ -390,7 +391,7 @@
     // must be due to phi elimination or two addr elimination.  If this is
     // the result of two address elimination, then the vreg is one of the
     // def-and-use register operand.
-    if (mi->isRegReDefinedByTwoAddr(interval.reg)) {
+    if (mi->isRegReDefinedByTwoAddr(interval.reg, MOIdx)) {
       // If this is a two-address definition, then we have already processed
       // the live range.  The only problem is that we didn't realize there
       // are actually two values in the live interval.  Because of this we
@@ -553,9 +554,10 @@
 void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB,
                                       MachineBasicBlock::iterator MI,
                                       unsigned MIIdx,
-                                      MachineOperand& MO) {
+                                      MachineOperand& MO,
+                                      unsigned MOIdx) {
   if (TargetRegisterInfo::isVirtualRegister(MO.getReg()))
-    handleVirtualRegisterDef(MBB, MI, MIIdx, MO, 
+    handleVirtualRegisterDef(MBB, MI, MIIdx, MO, MOIdx,
                              getOrCreateInterval(MO.getReg()));
   else if (allocatableRegs_[MO.getReg()]) {
     MachineInstr *CopyMI = NULL;
@@ -660,7 +662,7 @@
         MachineOperand &MO = MI->getOperand(i);
         // handle register defs - build intervals
         if (MO.isRegister() && MO.getReg() && MO.isDef())
-          handleRegisterDef(MBB, MI, MIIndex, MO);
+          handleRegisterDef(MBB, MI, MIIndex, MO, i);
       }
       
       MIIndex += InstrSlots::NUM;

Modified: llvm/branches/Apple/Gaz/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/CodeGen/MachineInstr.cpp?rev=53421&r1=53420&r2=53421&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/CodeGen/MachineInstr.cpp Thu Jul 10 16:06:00 2008
@@ -623,20 +623,15 @@
   return -1;
 }
   
-/// isRegReDefinedByTwoAddr - Returns true if the Reg re-definition is due
-/// to two addr elimination.
-bool MachineInstr::isRegReDefinedByTwoAddr(unsigned Reg) const {
+/// isRegReDefinedByTwoAddr - Given the defined register and the operand index,
+/// check if the register def is a re-definition due to two addr elimination.
+bool MachineInstr::isRegReDefinedByTwoAddr(unsigned Reg, unsigned DefIdx) const{
   const TargetInstrDesc &TID = getDesc();
-  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
-    const MachineOperand &MO1 = getOperand(i);
-    if (MO1.isRegister() && MO1.isDef() && MO1.getReg() == Reg) {
-      for (unsigned j = i+1; j < e; ++j) {
-        const MachineOperand &MO2 = getOperand(j);
-        if (MO2.isRegister() && MO2.isUse() && MO2.getReg() == Reg &&
-            TID.getOperandConstraint(j, TOI::TIED_TO) == (int)i)
-          return true;
-      }
-    }
+  for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) {
+    const MachineOperand &MO = getOperand(i);
+    if (MO.isRegister() && MO.isUse() && MO.getReg() == Reg &&
+        TID.getOperandConstraint(i, TOI::TIED_TO) == (int)DefIdx)
+      return true;
   }
   return false;
 }

Modified: llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocLocal.cpp?rev=53421&r1=53420&r2=53421&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocLocal.cpp Thu Jul 10 16:06:00 2008
@@ -25,6 +25,7 @@
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/Compiler.h"
+#include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/IndexedMap.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
@@ -239,6 +240,9 @@
     MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
                                 unsigned OpNum);
 
+    /// ComputeLocalLiveness - Computes liveness of registers within a basic
+    /// block, setting the killed/dead flags as appropriate.
+    void ComputeLocalLiveness(MachineBasicBlock& MBB);
 
     void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
                        unsigned PhysReg);
@@ -250,9 +254,9 @@
 /// to be held on the stack.
 int RALocal::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
   // Find the location Reg would belong...
-  std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
+  std::map<unsigned, int>::iterator I = StackSlotForVirtReg.find(VirtReg);
 
-  if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
+  if (I != StackSlotForVirtReg.end())
     return I->second;          // Already has space allocated?
 
   // Allocate a new stack object for this spill location...
@@ -291,8 +295,6 @@
   DOUT << "  Spilling register " << TRI->getName(PhysReg)
        << " containing %reg" << VirtReg;
   
-  const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
-  
   if (!isVirtRegModified(VirtReg)) {
     DOUT << " which has not been modified, so no store necessary!";
     std::pair<MachineInstr*, unsigned> &LastUse = getVirtRegLastUse(VirtReg);
@@ -507,7 +509,6 @@
        << TRI->getName(PhysReg) << "\n";
 
   // Add move instruction(s)
-  const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
   TII->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
   ++NumLoads;    // Update statistics
 
@@ -561,39 +562,25 @@
   return false;
 }
 
-void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
-  // loop over each instruction
-  MachineBasicBlock::iterator MII = MBB.begin();
-  const TargetInstrInfo &TII = *TM->getInstrInfo();
-  
-  DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
-        if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
+namespace llvm {
+  template<> struct DenseMapInfo<uint32_t> {
+    static inline uint32_t getEmptyKey() { return ~0; }
+    static inline uint32_t getTombstoneKey() { return ~0 - 1; }
+    static unsigned getHashValue(const uint32_t& Val) { return Val * 37; }
+    static bool isPod() { return true; }
+    static bool isEqual(const uint32_t& LHS, const uint32_t& RHS) {
+      return LHS == RHS;
+    }
+  };
+}
 
-  // If this is the first basic block in the machine function, add live-in
-  // registers as active.
-  if (&MBB == &*MF->begin() || MBB.isLandingPad()) {
-    for (MachineBasicBlock::livein_iterator I = MBB.livein_begin(),
-         E = MBB.livein_end(); I != E; ++I) {
-      unsigned Reg = *I;
-      MF->getRegInfo().setPhysRegUsed(Reg);
-      PhysRegsUsed[Reg] = 0;            // It is free and reserved now
-      AddToPhysRegsUseOrder(Reg); 
-      for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
-           *AliasSet; ++AliasSet) {
-        if (PhysRegsUsed[*AliasSet] != -2) {
-          AddToPhysRegsUseOrder(*AliasSet); 
-          PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
-          MF->getRegInfo().setPhysRegUsed(*AliasSet);
-        }
-      }
-    }    
-  }
-  
-  
+/// ComputeLocalLiveness - Computes liveness of registers within a basic
+/// block, setting the killed/dead flags as appropriate.
+void RALocal::ComputeLocalLiveness(MachineBasicBlock& MBB) {
   MachineRegisterInfo& MRI = MBB.getParent()->getRegInfo();
   // Keep track of the most recently seen previous use or def of each reg, 
   // so that we can update them with dead/kill markers.
-  std::map<unsigned, std::pair<MachineInstr*, unsigned> > LastUseDef;
+  DenseMap<unsigned, std::pair<MachineInstr*, unsigned> > LastUseDef;
   for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
        I != E; ++I) {
     for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
@@ -612,26 +599,20 @@
       //   - A def followed by a def is dead
       //   - A use followed by a def is a kill
       if (MO.isReg() && MO.getReg() && MO.isDef()) {
-        std::map<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
+        DenseMap<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
           last = LastUseDef.find(MO.getReg());
         if (last != LastUseDef.end()) {
-          
-          // If this is a two address instr, then we don't mark the def
-          // as killing the use.
+          // Check if this is a two address instruction.  If so, then
+          // the def does not kill the use.
           if (last->second.first == I &&
-              I->getDesc().getOperandConstraint(last->second.second,
-                                                TOI::TIED_TO) == (signed)i) {
-            LastUseDef[MO.getReg()] = std::make_pair(I, i);
+              I->isRegReDefinedByTwoAddr(MO.getReg(), i))
             continue;
-          }
-            
           
           MachineOperand& lastUD =
                       last->second.first->getOperand(last->second.second);
-          
           if (lastUD.isDef())
             lastUD.setIsDead(true);
-          else if (lastUD.isUse())
+          else
             lastUD.setIsKill(true);
         }
         
@@ -655,7 +636,7 @@
   
   // Finally, loop over the final use/def of each reg 
   // in the block and determine if it is dead.
-  for (std::map<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
+  for (DenseMap<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
        I = LastUseDef.begin(), E = LastUseDef.end(); I != E; ++I) {
     MachineInstr* MI = I->second.first;
     unsigned idx = I->second.second;
@@ -686,10 +667,40 @@
     if (isPhysReg || !usedOutsideBlock) {
       if (MO.isUse())
         MO.setIsKill(true);
-      else if (MI->getOperand(idx).isDef())
+      else
         MO.setIsDead(true);
     }
   }
+}
+
+void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
+  // loop over each instruction
+  MachineBasicBlock::iterator MII = MBB.begin();
+  
+  DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
+        if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
+
+  // If this is the first basic block in the machine function, add live-in
+  // registers as active.
+  if (&MBB == &*MF->begin() || MBB.isLandingPad()) {
+    for (MachineBasicBlock::livein_iterator I = MBB.livein_begin(),
+         E = MBB.livein_end(); I != E; ++I) {
+      unsigned Reg = *I;
+      MF->getRegInfo().setPhysRegUsed(Reg);
+      PhysRegsUsed[Reg] = 0;            // It is free and reserved now
+      AddToPhysRegsUseOrder(Reg); 
+      for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
+           *AliasSet; ++AliasSet) {
+        if (PhysRegsUsed[*AliasSet] != -2) {
+          AddToPhysRegsUseOrder(*AliasSet); 
+          PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
+          MF->getRegInfo().setPhysRegUsed(*AliasSet);
+        }
+      }
+    }    
+  }
+  
+  ComputeLocalLiveness(MBB);
   
   // Otherwise, sequentially allocate each instruction in the MBB.
   while (MII != MBB.end()) {
@@ -854,7 +865,7 @@
         getVirtRegLastUse(DestVirtReg) = std::make_pair((MachineInstr*)0, 0);
         DOUT << "  Assigning " << TRI->getName(DestPhysReg)
              << " to %reg" << DestVirtReg << "\n";
-        MI->getOperand(i).setReg(DestPhysReg);  // Assign the output register
+        MO.setReg(DestPhysReg);  // Assign the output register
       }
     }
 
@@ -893,7 +904,7 @@
     
     // Finally, if this is a noop copy instruction, zap it.
     unsigned SrcReg, DstReg;
-    if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg)
+    if (TII->isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg)
       MBB.erase(MI);
   }
 

Modified: llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocSimple.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocSimple.cpp?rev=53421&r1=53420&r2=53421&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocSimple.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/CodeGen/RegAllocSimple.cpp Thu Jul 10 16:06:00 2008
@@ -103,10 +103,9 @@
 int RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
                                      const TargetRegisterClass *RC) {
   // Find the location VirtReg would belong...
-  std::map<unsigned, int>::iterator I =
-    StackSlotForVirtReg.lower_bound(VirtReg);
+  std::map<unsigned, int>::iterator I = StackSlotForVirtReg.find(VirtReg);
 
-  if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
+  if (I != StackSlotForVirtReg.end())
     return I->second;          // Already has space allocated?
 
   // Allocate a new stack object for this spill location...
@@ -190,12 +189,12 @@
 
     // Loop over uses, move from memory into registers.
     for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
-      MachineOperand &op = MI->getOperand(i);
+      MachineOperand &MO = MI->getOperand(i);
 
-      if (op.isRegister() && op.getReg() &&
-          TargetRegisterInfo::isVirtualRegister(op.getReg())) {
-        unsigned virtualReg = (unsigned) op.getReg();
-        DOUT << "op: " << op << "\n";
+      if (MO.isRegister() && MO.getReg() &&
+          TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
+        unsigned virtualReg = (unsigned) MO.getReg();
+        DOUT << "op: " << MO << "\n";
         DOUT << "\t inst[" << i << "]: ";
         DEBUG(MI->print(*cerr.stream(), TM));
 
@@ -203,7 +202,7 @@
         // register in any given instruction
         unsigned physReg = Virt2PhysRegMap[virtualReg];
         if (physReg == 0) {
-          if (op.isDef()) {
+          if (MO.isDef()) {
             int TiedOp = Desc.findTiedToSrcOperand(i);
             if (TiedOp == -1) {
               physReg = getFreeReg(virtualReg);
@@ -224,8 +223,8 @@
             Virt2PhysRegMap[virtualReg] = physReg;
           }
         }
-        MI->getOperand(i).setReg(physReg);
-        DOUT << "virt: " << virtualReg << ", phys: " << op.getReg() << "\n";
+        MO.setReg(physReg);
+        DOUT << "virt: " << virtualReg << ", phys: " << MO.getReg() << "\n";
       }
     }
     RegClassIdx.clear();




From gohman at apple.com  Thu Jul 10 16:44:59 2008
From: gohman at apple.com (Dan Gohman)
Date: Thu, 10 Jul 2008 21:44:59 -0000
Subject: [llvm-commits] [llvm] r53422 -
	/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
Message-ID: <200807102144.m6ALixZO001657@zion.cs.uiuc.edu>

Author: djg
Date: Thu Jul 10 16:44:59 2008
New Revision: 53422

URL: http://llvm.org/viewvc/llvm-project?rev=53422&view=rev
Log:
Add a SubclassData field to SDNode, similar to what's done
in Value, to make use of some otherwise unused space. Use this
field to shrink LoadSDNode and StoreSDNode by moving the
addressing mode and ext/trunc fields there.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=53422&r1=53421&r2=53422&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Thu Jul 10 16:44:59 2008
@@ -1032,8 +1032,15 @@
   
   /// OperandsNeedDelete - This is true if OperandList was new[]'d.  If true,
   /// then they will be delete[]'d when the node is destroyed.
-  bool OperandsNeedDelete : 1;
+  unsigned short OperandsNeedDelete : 1;
 
+protected:
+  /// SubclassData - This member is defined by this class, but is not used for
+  /// anything.  Subclasses can use it to hold whatever state they find useful.
+  /// This field is initialized to zero by the ctor.
+  unsigned short SubclassData : 15;
+
+private:
   /// NodeId - Unique id per SDNode in the DAG.
   int NodeId;
 
@@ -1248,8 +1255,8 @@
   }
 
   SDNode(unsigned Opc, SDVTList VTs, const SDOperand *Ops, unsigned NumOps)
-    : NodeType(Opc), NodeId(-1), Uses(NULL) {
-    OperandsNeedDelete = true;
+    : NodeType(Opc), OperandsNeedDelete(true), SubclassData(0),
+      NodeId(-1), Uses(NULL) {
     NumOperands = NumOps;
     OperandList = NumOps ? new SDUse[NumOperands] : 0;
     
@@ -1264,7 +1271,8 @@
   }
 
   SDNode(unsigned Opc, SDVTList VTs, const SDUse *Ops, unsigned NumOps)
-    : NodeType(Opc), NodeId(-1), Uses(NULL) {
+    : NodeType(Opc), OperandsNeedDelete(true), SubclassData(0),
+      NodeId(-1), Uses(NULL) {
     OperandsNeedDelete = true;
     NumOperands = NumOps;
     OperandList = NumOps ? new SDUse[NumOperands] : 0;
@@ -1279,9 +1287,11 @@
     NumValues = VTs.NumVTs;
   }
 
+  /// This constructor adds no operands itself; operands can be
+  /// set later with InitOperands.
   SDNode(unsigned Opc, SDVTList VTs)
-    : NodeType(Opc), NodeId(-1), Uses(NULL) {
-    OperandsNeedDelete = false;  // Operands set with InitOperands.
+    : NodeType(Opc), OperandsNeedDelete(false), SubclassData(0),
+      NodeId(-1), Uses(NULL) {
     NumOperands = 0;
     OperandList = 0;
     ValueList = VTs.VTs;
@@ -2047,10 +2057,6 @@
 /// LSBaseSDNode - Base class for LoadSDNode and StoreSDNode
 ///
 class LSBaseSDNode : public MemSDNode {
-private:
-  // AddrMode - unindexed, pre-indexed, post-indexed.
-  ISD::MemIndexedMode AddrMode;
-
 protected:
   //! Operand array for load and store
   /*!
@@ -2063,7 +2069,8 @@
   LSBaseSDNode(ISD::NodeType NodeTy, SDOperand *Operands, unsigned numOperands,
                SDVTList VTs, ISD::MemIndexedMode AM, MVT VT,
                const Value *SV, int SVO, unsigned Align, bool Vol)
-    : MemSDNode(NodeTy, VTs, VT, SV, SVO, Align, Vol), AddrMode(AM) {
+    : MemSDNode(NodeTy, VTs, VT, SV, SVO, Align, Vol) {
+    SubclassData = AM;
     for (unsigned i = 0; i != numOperands; ++i)
       Ops[i] = Operands[i];
     InitOperands(Ops, numOperands);
@@ -2076,13 +2083,17 @@
     return getOperand(getOpcode() == ISD::LOAD ? 2 : 3);
   }
 
-  ISD::MemIndexedMode getAddressingMode() const { return AddrMode; }
+  /// getAddressingMode - Return the addressing mode for this load or store:
+  /// unindexed, pre-inc, pre-dec, post-inc, or post-dec.
+  ISD::MemIndexedMode getAddressingMode() const {
+    return ISD::MemIndexedMode(SubclassData & 7);
+  }
 
   /// isIndexed - Return true if this is a pre/post inc/dec load/store.
-  bool isIndexed() const { return AddrMode != ISD::UNINDEXED; }
+  bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
 
   /// isUnindexed - Return true if this is NOT a pre/post inc/dec load/store.
-  bool isUnindexed() const { return AddrMode == ISD::UNINDEXED; }
+  bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
 
   static bool classof(const LSBaseSDNode *) { return true; }
   static bool classof(const SDNode *N) {
@@ -2095,21 +2106,23 @@
 ///
 class LoadSDNode : public LSBaseSDNode {
   virtual void ANCHOR();  // Out-of-line virtual method to give class a home.
-  
-  // ExtType - non-ext, anyext, sext, zext.
-  ISD::LoadExtType ExtType;
-
 protected:
   friend class SelectionDAG;
   LoadSDNode(SDOperand *ChainPtrOff, SDVTList VTs,
              ISD::MemIndexedMode AM, ISD::LoadExtType ETy, MVT LVT,
              const Value *SV, int O=0, unsigned Align=0, bool Vol=false)
     : LSBaseSDNode(ISD::LOAD, ChainPtrOff, 3,
-                   VTs, AM, LVT, SV, O, Align, Vol),
-      ExtType(ETy) {}
+                   VTs, AM, LVT, SV, O, Align, Vol) {
+    SubclassData |= (unsigned short)ETy << 3;
+  }
 public:
 
-  ISD::LoadExtType getExtensionType() const { return ExtType; }
+  /// getExtensionType - Return whether this is a plain node,
+  /// or one of the varieties of value-extending loads.
+  ISD::LoadExtType getExtensionType() const {
+    return ISD::LoadExtType((SubclassData >> 3) & 3);
+  }
+
   const SDOperand &getBasePtr() const { return getOperand(1); }
   const SDOperand &getOffset() const { return getOperand(2); }
   
@@ -2123,22 +2136,22 @@
 ///
 class StoreSDNode : public LSBaseSDNode {
   virtual void ANCHOR();  // Out-of-line virtual method to give class a home.
-
-  // IsTruncStore - True if the op does a truncation before store.  For
-  // integers this is the same as doing a TRUNCATE and storing the result.
-  // For floats, it is the same as doing an FP_ROUND and storing the result.
-  bool IsTruncStore;
 protected:
   friend class SelectionDAG;
   StoreSDNode(SDOperand *ChainValuePtrOff, SDVTList VTs,
               ISD::MemIndexedMode AM, bool isTrunc, MVT SVT,
               const Value *SV, int O=0, unsigned Align=0, bool Vol=false)
     : LSBaseSDNode(ISD::STORE, ChainValuePtrOff, 4,
-                   VTs, AM, SVT, SV, O, Align, Vol),
-      IsTruncStore(isTrunc) {}
+                   VTs, AM, SVT, SV, O, Align, Vol) {
+    SubclassData |= (unsigned short)isTrunc << 3;
+  }
 public:
 
-  bool isTruncatingStore() const { return IsTruncStore; }
+  /// isTruncatingStore - Return true if the op does a truncation before store.
+  /// For integers this is the same as doing a TRUNCATE and storing the result.
+  /// For floats, it is the same as doing an FP_ROUND and storing the result.
+  bool isTruncatingStore() const { return (SubclassData >> 3) & 1; }
+
   const SDOperand &getValue() const { return getOperand(1); }
   const SDOperand &getBasePtr() const { return getOperand(2); }
   const SDOperand &getOffset() const { return getOperand(3); }




From gohman at apple.com  Thu Jul 10 17:26:19 2008
From: gohman at apple.com (Dan Gohman)
Date: Thu, 10 Jul 2008 22:26:19 -0000
Subject: [llvm-commits] [llvm] r53426 - in /llvm/trunk/include/llvm:
 ADT/alist.h ADT/alist_node.h Support/Recycler.h
 Support/RecyclingAllocator.h
Message-ID: <200807102226.m6AMQJP5003075@zion.cs.uiuc.edu>

Author: djg
Date: Thu Jul 10 17:26:19 2008
New Revision: 53426

URL: http://llvm.org/viewvc/llvm-project?rev=53426&view=rev
Log:
Tidy up #includes.

Modified:
    llvm/trunk/include/llvm/ADT/alist.h
    llvm/trunk/include/llvm/ADT/alist_node.h
    llvm/trunk/include/llvm/Support/Recycler.h
    llvm/trunk/include/llvm/Support/RecyclingAllocator.h

Modified: llvm/trunk/include/llvm/ADT/alist.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/alist.h?rev=53426&r1=53425&r2=53426&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/alist.h (original)
+++ llvm/trunk/include/llvm/ADT/alist.h Thu Jul 10 17:26:19 2008
@@ -14,7 +14,6 @@
 #ifndef LLVM_ADT_ALIST_H
 #define LLVM_ADT_ALIST_H
 
-#include <cassert>
 #include "llvm/ADT/alist_node.h"
 #include "llvm/ADT/STLExtras.h"
 

Modified: llvm/trunk/include/llvm/ADT/alist_node.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/alist_node.h?rev=53426&r1=53425&r2=53426&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/alist_node.h (original)
+++ llvm/trunk/include/llvm/ADT/alist_node.h Thu Jul 10 17:26:19 2008
@@ -15,10 +15,10 @@
 #ifndef LLVM_ADT_ALIST_NODE_H
 #define LLVM_ADT_ALIST_NODE_H
 
-#include <cassert>
 #include "llvm/ADT/ilist.h"
 #include "llvm/Support/AlignOf.h"
 #include "llvm/Support/DataTypes.h"
+#include <cassert>
 
 namespace llvm {
 

Modified: llvm/trunk/include/llvm/Support/Recycler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/Recycler.h?rev=53426&r1=53425&r2=53426&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/Recycler.h (original)
+++ llvm/trunk/include/llvm/Support/Recycler.h Thu Jul 10 17:26:19 2008
@@ -15,7 +15,6 @@
 #ifndef LLVM_SUPPORT_RECYCLER_H
 #define LLVM_SUPPORT_RECYCLER_H
 
-#include <cassert>
 #include "llvm/ADT/alist_node.h"
 
 namespace llvm {

Modified: llvm/trunk/include/llvm/Support/RecyclingAllocator.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/RecyclingAllocator.h?rev=53426&r1=53425&r2=53426&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/RecyclingAllocator.h (original)
+++ llvm/trunk/include/llvm/Support/RecyclingAllocator.h Thu Jul 10 17:26:19 2008
@@ -15,9 +15,7 @@
 #ifndef LLVM_SUPPORT_RECYCLINGALLOCATOR_H
 #define LLVM_SUPPORT_RECYCLINGALLOCATOR_H
 
-#include <cassert>
 #include "llvm/Support/Recycler.h"
-#include "llvm/ADT/STLExtras.h"
 
 namespace llvm {
 




From isanbard at gmail.com  Thu Jul 10 17:35:32 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 10 Jul 2008 22:35:32 -0000
Subject: [llvm-commits] [llvm] r53427 - in /llvm/trunk/test: CodeGen/CPP/
 CodeGen/CPP/2007-06-16-Funcname.ll CodeGen/CPP/dg.exp
 CodeGen/CPP/llvm2cpp.ll Feature/llvm2cpp.ll Other/2007-06-16-Funcname.ll
Message-ID: <200807102235.m6AMZWBf003370@zion.cs.uiuc.edu>

Author: void
Date: Thu Jul 10 17:35:32 2008
New Revision: 53427

URL: http://llvm.org/viewvc/llvm-project?rev=53427&view=rev
Log:
Put CPPBackend tests into their own directory and run them only if they're
supported.

Added:
    llvm/trunk/test/CodeGen/CPP/
    llvm/trunk/test/CodeGen/CPP/2007-06-16-Funcname.ll
      - copied unchanged from r53426, llvm/trunk/test/Other/2007-06-16-Funcname.ll
    llvm/trunk/test/CodeGen/CPP/dg.exp
    llvm/trunk/test/CodeGen/CPP/llvm2cpp.ll
      - copied unchanged from r53426, llvm/trunk/test/Feature/llvm2cpp.ll
Removed:
    llvm/trunk/test/Feature/llvm2cpp.ll
    llvm/trunk/test/Other/2007-06-16-Funcname.ll

Added: llvm/trunk/test/CodeGen/CPP/dg.exp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CPP/dg.exp?rev=53427&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/CPP/dg.exp (added)
+++ llvm/trunk/test/CodeGen/CPP/dg.exp Thu Jul 10 17:35:32 2008
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target CppBackend] } {
+  RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}

Removed: llvm/trunk/test/Feature/llvm2cpp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Feature/llvm2cpp.ll?rev=53426&view=auto

==============================================================================
--- llvm/trunk/test/Feature/llvm2cpp.ll (original)
+++ llvm/trunk/test/Feature/llvm2cpp.ll (removed)
@@ -1,756 +0,0 @@
-; RUN: llvm-as < %s | llvm-dis > /dev/null
-; RUN: llvm-as < %s | llc -march=cpp -cppgen=program -o -
-
- at X = global i32 4, align 16		; <i32*> [#uses=0]
-
-define i32* @test1012() align 32 {
-	%X = alloca i32, align 4		; <i32*> [#uses=1]
-	%Y = alloca i32, i32 42, align 16		; <i32*> [#uses=0]
-	%Z = alloca i32		; <i32*> [#uses=0]
-	ret i32* %X
-}
-
-define i32* @test1013() {
-	%X = malloc i32, align 4		; <i32*> [#uses=1]
-	%Y = malloc i32, i32 42, align 16		; <i32*> [#uses=0]
-	%Z = malloc i32		; <i32*> [#uses=0]
-	ret i32* %X
-}
-
-define void @void(i32, i32) {
-	add i32 0, 0		; <i32>:3 [#uses=2]
-	sub i32 0, 4		; <i32>:4 [#uses=2]
-	br label %5
-
-; <label>:5		; preds = %5, %2
-	add i32 %0, %1		; <i32>:6 [#uses=2]
-	sub i32 %6, %4		; <i32>:7 [#uses=1]
-	icmp sle i32 %7, %3		; <i1>:8 [#uses=1]
-	br i1 %8, label %9, label %5
-
-; <label>:9		; preds = %5
-	add i32 %0, %1		; <i32>:10 [#uses=0]
-	sub i32 %6, %4		; <i32>:11 [#uses=1]
-	icmp sle i32 %11, %3		; <i1>:12 [#uses=0]
-	ret void
-}
-
-define i32 @zarro() {
-Startup:
-	ret i32 0
-}
-
-define fastcc void @foo() {
-	ret void
-}
-
-define coldcc void @bar() {
-	call fastcc void @foo( )
-	ret void
-}
-
-define void @structret({ i8 }* sret  %P) {
-	call void @structret( { i8 }* %P sret  )
-	ret void
-}
-
-define void @foo4() {
-	ret void
-}
-
-define coldcc void @bar2() {
-	call fastcc void @foo( )
-	ret void
-}
-
-define cc42 void @bar3() {
-	invoke fastcc void @foo( )
-			to label %Ok unwind label %U
-
-Ok:		; preds = %0
-	ret void
-
-U:		; preds = %0
-	unwind
-}
-
-define void @bar4() {
-	call cc42 void @bar( )
-	invoke cc42 void @bar3( )
-			to label %Ok unwind label %U
-
-Ok:		; preds = %0
-	ret void
-
-U:		; preds = %0
-	unwind
-}
-; ModuleID = 'calltest.ll'
-	%FunTy = type i32 (i32)
-
-define i32 @test1000(i32 %i0) {
-	ret i32 %i0
-}
-
-define void @invoke(%FunTy* %x) {
-	%foo = call i32 %x( i32 123 )		; <i32> [#uses=0]
-	%foo2 = tail call i32 %x( i32 123 )		; <i32> [#uses=0]
-	ret void
-}
-
-define i32 @main(i32 %argc) {
-	%retval = call i32 @test1000( i32 %argc )		; <i32> [#uses=2]
-	%two = add i32 %retval, %retval		; <i32> [#uses=1]
-	%retval2 = invoke i32 @test1000( i32 %argc )
-			to label %Next unwind label %Error		; <i32> [#uses=1]
-
-Next:		; preds = %0
-	%two2 = add i32 %two, %retval2		; <i32> [#uses=1]
-	call void @invoke( %FunTy* @test1000 )
-	ret i32 %two2
-
-Error:		; preds = %0
-	ret i32 -1
-}
-; ModuleID = 'casttest.ll'
-
-define i16 @FunFunc(i64 %x, i8 %z) {
-bb0:
-	%cast110 = sext i8 %z to i16		; <i16> [#uses=1]
-	%cast10 = trunc i64 %x to i16		; <i16> [#uses=1]
-	%reg109 = add i16 %cast110, %cast10		; <i16> [#uses=1]
-	ret i16 %reg109
-}
-; ModuleID = 'cfgstructures.ll'
-
-define void @irreducible(i1 %cond) {
-	br i1 %cond, label %X, label %Y
-
-X:		; preds = %Y, %0
-	br label %Y
-
-Y:		; preds = %X, %0
-	br label %X
-}
-
-define void @sharedheader(i1 %cond) {
-	br label %A
-
-A:		; preds = %Y, %X, %0
-	br i1 %cond, label %X, label %Y
-
-X:		; preds = %A
-	br label %A
-
-Y:		; preds = %A
-	br label %A
-}
-
-define void @nested(i1 %cond1, i1 %cond2, i1 %cond3) {
-	br label %Loop1
-
-Loop1:		; preds = %L2Exit, %0
-	br label %Loop2
-
-Loop2:		; preds = %L3Exit, %Loop1
-	br label %Loop3
-
-Loop3:		; preds = %Loop3, %Loop2
-	br i1 %cond3, label %Loop3, label %L3Exit
-
-L3Exit:		; preds = %Loop3
-	br i1 %cond2, label %Loop2, label %L2Exit
-
-L2Exit:		; preds = %L3Exit
-	br i1 %cond1, label %Loop1, label %L1Exit
-
-L1Exit:		; preds = %L2Exit
-	ret void
-}
-; ModuleID = 'constexpr.ll'
-	%SAType = type { i32, { [2 x float], i64 } }
-	%SType = type { i32, { float, { i8 } }, i64 }
-global i64 1		; <i64*>:0 [#uses=0]
-global i64 74514		; <i64*>:1 [#uses=0]
- at t2 = global i32* @t1		; <i32**> [#uses=0]
- at t3 = global i32* @t1		; <i32**> [#uses=2]
- at t1 = global i32 4		; <i32*> [#uses=2]
- at t4 = global i32** @t3		; <i32***> [#uses=1]
- at t5 = global i32** @t3		; <i32***> [#uses=0]
- at t6 = global i32*** @t4		; <i32****> [#uses=0]
- at t7 = global float* inttoptr (i32 12345678 to float*)		; <float**> [#uses=0]
- at t9 = global i32 8		; <i32*> [#uses=0]
-global i32* bitcast (float* @4 to i32*)		; <i32**>:2 [#uses=0]
-global float* @4		; <float**>:3 [#uses=0]
-global float 0.000000e+00		; <float*>:4 [#uses=2]
- at array = constant [2 x i32] [ i32 12, i32 52 ]		; <[2 x i32]*> [#uses=1]
- at arrayPtr = global i32* getelementptr ([2 x i32]* @array, i64 0, i64 0)		; <i32**> [#uses=1]
- at arrayPtr5 = global i32** getelementptr (i32** @arrayPtr, i64 5)		; <i32***> [#uses=0]
- at somestr = constant [11 x i8] c"hello world"		; <[11 x i8]*> [#uses=2]
- at char5 = global i8* getelementptr ([11 x i8]* @somestr, i64 0, i64 5)		; <i8**> [#uses=0]
- at char8a = global i32* bitcast (i8* getelementptr ([11 x i8]* @somestr, i64 0, i64 8) to i32*)		; <i32**> [#uses=0]
- at char8b = global i8* getelementptr ([11 x i8]* @somestr, i64 0, i64 8)		; <i8**> [#uses=0]
- at S1 = global %SType* null		; <%SType**> [#uses=1]
- at S2c = constant %SType {
-    i32 1, 
-    { float, { i8 } } { float 2.000000e+00, { i8 } { i8 3 } }, 
-    i64 4 }		; <%SType*> [#uses=3]
- at S3c = constant %SAType { i32 1, { [2 x float], i64 } { [2 x float] [ float 2.000000e+00, float 3.000000e+00 ], i64 4 } }		; <%SAType*> [#uses=1]
- at S1ptr = global %SType** @S1		; <%SType***> [#uses=0]
- at S2 = global %SType* @S2c		; <%SType**> [#uses=0]
- at S3 = global %SAType* @S3c		; <%SAType**> [#uses=0]
- at S1fld1a = global float* getelementptr (%SType* @S2c, i64 0, i32 1, i32 0)		; <float**> [#uses=0]
- at S1fld1b = global float* getelementptr (%SType* @S2c, i64 0, i32 1, i32 0)		; <float**> [#uses=1]
- at S1fld1bptr = global float** @S1fld1b		; <float***> [#uses=0]
- at S2fld3 = global i8* getelementptr (%SType* @S2c, i64 0, i32 1, i32 1, i32 0)		; <i8**> [#uses=0]
-
-; ModuleID = 'constpointer.ll'
- at cpt3 = global i32* @cpt1		; <i32**> [#uses=1]
- at cpt1 = global i32 4		; <i32*> [#uses=2]
- at cpt4 = global i32** @cpt3		; <i32***> [#uses=0]
- at cpt2 = global i32* @cpt1		; <i32**> [#uses=0]
-global float* @7		; <float**>:0 [#uses=0]
-global float* @7		; <float**>:1 [#uses=0]
-global float 0.000000e+00		; <float*>:2 [#uses=3]
-global float* @7		; <float**>:3 [#uses=0]
- at fptr = global void ()* @f		; <void ()**> [#uses=0]
- at sptr1 = global [11 x i8]* @somestr		; <[11 x i8]**> [#uses=0]
- at somestr2 = constant [11 x i8] c"hello world"		; <[11 x i8]*> [#uses=2]
- at sptr2 = global [11 x i8]* @somestr2		; <[11 x i8]**> [#uses=0]
-
-declare void @f()
-; ModuleID = 'escaped_label.ll'
-
-define i32 @foo3() {
-	br label "foo`~!@#$%^&*()-_=+{}[]\\|;:',<.>/?"
-
-"foo`~!@#$%^&*()-_=+{}[]\\|;:',<.>/?":		; preds = %0
-	ret i32 17
-}
-; ModuleID = 'float.ll'
- at F1 = global float 4.000000e+00		; <float*> [#uses=0]
- at D1 = global double 4.000000e+00		; <double*> [#uses=0]
-; ModuleID = 'fold-fpcast.ll'
-
-define i32 @test1() {
-	ret i32 1080872141
-}
-
-define float @test1002() {
-	ret float 0x36E1000000000000
-}
-
-define i64 @test3() {
-	ret i64 4614256656431372362
-}
-
-define double @test4() {
-	ret double 2.075076e-322
-}
-; ModuleID = 'forwardreftest.ll'
-	%myfn = type float (i32, double, i32, i16)
-	%myty = type i32
-	%thisfuncty = type i32 (i32)*
-
-declare void @F(%thisfuncty, %thisfuncty, %thisfuncty)
-
-define i32 @zarro2(i32 %Func) {
-Startup:
-	add i32 0, 10		; <i32>:0 [#uses=0]
-	ret i32 0
-}
-
-define i32 @test1004(i32) {
-	call void @F( %thisfuncty @zarro2, %thisfuncty @test1004, %thisfuncty @foozball )
-	ret i32 0
-}
-
-define i32 @foozball(i32) {
-	ret i32 0
-}
-
-; ModuleID = 'globalredefinition.ll'
- at A = global i32* @B		; <i32**> [#uses=0]
- at B = global i32 7		; <i32*> [#uses=1]
-
-define void @X() {
-	ret void
-}
-; ModuleID = 'global_section.ll'
- at GlobSec = global i32 4, section "foo", align 16
-
-define void @test1005() section "bar" {
-	ret void
-}
-
-; ModuleID = 'globalvars.ll'
- at MyVar = external global i32		; <i32*> [#uses=1]
- at MyIntList = external global { \2*, i32 }		; <{ \2*, i32 }*> [#uses=1]
-external global i32		; <i32*>:0 [#uses=0]
- at AConst = constant i32 123		; <i32*> [#uses=0]
- at AString = constant [4 x i8] c"test"		; <[4 x i8]*> [#uses=0]
- at ZeroInit = global { [100 x i32], [40 x float] } zeroinitializer		; <{ [100 x i32], [40 x float] }*> [#uses=0]
-
-define i32 @foo10015(i32 %blah) {
-	store i32 5, i32* @MyVar
-	%idx = getelementptr { \2*, i32 }* @MyIntList, i64 0, i32 1		; <i32*> [#uses=1]
-	store i32 12, i32* %idx
-	ret i32 %blah
-}
-; ModuleID = 'indirectcall2.ll'
-
-define i64 @test1006(i64 %X) {
-	ret i64 %X
-}
-
-define i64 @fib(i64 %n) {
-; <label>:0
-	%T = icmp ult i64 %n, 2		; <i1> [#uses=1]
-	br i1 %T, label %BaseCase, label %RecurseCase
-
-RecurseCase:		; preds = %0
-	%result = call i64 @test1006( i64 %n )		; <i64> [#uses=0]
-	br label %BaseCase
-
-BaseCase:		; preds = %RecurseCase, %0
-	%X = phi i64 [ 1, %0 ], [ 2, %RecurseCase ]		; <i64> [#uses=1]
-	ret i64 %X
-}
-; ModuleID = 'indirectcall.ll'
-
-declare i32 @atoi(i8*)
-
-define i64 @fibonacc(i64 %n) {
-	icmp ult i64 %n, 2		; <i1>:1 [#uses=1]
-	br i1 %1, label %BaseCase, label %RecurseCase
-
-BaseCase:		; preds = %0
-	ret i64 1
-
-RecurseCase:		; preds = %0
-	%n2 = sub i64 %n, 2		; <i64> [#uses=1]
-	%n1 = sub i64 %n, 1		; <i64> [#uses=1]
-	%f2 = call i64 @fibonacc( i64 %n2 )		; <i64> [#uses=1]
-	%f1 = call i64 @fibonacc( i64 %n1 )		; <i64> [#uses=1]
-	%result = add i64 %f2, %f1		; <i64> [#uses=1]
-	ret i64 %result
-}
-
-define i64 @realmain(i32 %argc, i8** %argv) {
-; <label>:0
-	icmp eq i32 %argc, 2		; <i1>:1 [#uses=1]
-	br i1 %1, label %HasArg, label %Continue
-
-HasArg:		; preds = %0
-	%n1 = add i32 1, 1		; <i32> [#uses=1]
-	br label %Continue
-
-Continue:		; preds = %HasArg, %0
-	%n = phi i32 [ %n1, %HasArg ], [ 1, %0 ]		; <i32> [#uses=1]
-	%N = sext i32 %n to i64		; <i64> [#uses=1]
-	%F = call i64 @fib( i64 %N )		; <i64> [#uses=1]
-	ret i64 %F
-}
-
-define i64 @trampoline(i64 %n, i64 (i64)* %fibfunc) {
-	%F = call i64 %fibfunc( i64 %n )		; <i64> [#uses=1]
-	ret i64 %F
-}
-
-define i32 @main2() {
-	%Result = call i64 @trampoline( i64 10, i64 (i64)* @fib )		; <i64> [#uses=1]
-	%Result.upgrd.1 = trunc i64 %Result to i32		; <i32> [#uses=1]
-	ret i32 %Result.upgrd.1
-}
-; ModuleID = 'inlineasm.ll'
-module asm "this is an inline asm block"
-module asm "this is another inline asm block"
-
-define i32 @test1007() {
-	%X = call i32 asm "tricky here $0, $1", "=r,r"( i32 4 )		; <i32> [#uses=1]
-	call void asm sideeffect "eieio", ""( )
-	ret i32 %X
-}
-; ModuleID = 'instructions.ll'
-
-define i32 @test_extractelement(<4 x i32> %V) {
-	%R = extractelement <4 x i32> %V, i32 1		; <i32> [#uses=1]
-	ret i32 %R
-}
-
-define <4 x i32> @test_insertelement(<4 x i32> %V) {
-	%R = insertelement <4 x i32> %V, i32 0, i32 0		; <<4 x i32>> [#uses=1]
-	ret <4 x i32> %R
-}
-
-define <4 x i32> @test_shufflevector_u(<4 x i32> %V) {
-	%R = shufflevector <4 x i32> %V, <4 x i32> %V, <4 x i32> < i32 1, i32 undef, i32 7, i32 2 >		; <<4 x i32>> [#uses=1]
-	ret <4 x i32> %R
-}
-
-define <4 x float> @test_shufflevector_f(<4 x float> %V) {
-	%R = shufflevector <4 x float> %V, <4 x float> undef, <4 x i32> < i32 1, i32 undef, i32 7, i32 2 >		; <<4 x float>> [#uses=1]
-	ret <4 x float> %R
-}
-; ModuleID = 'intrinsics.ll'
-
-declare i1 @llvm.isunordered.f32(float, float)
-
-declare i1 @llvm.isunordered.f64(double, double)
-
-declare void @llvm.prefetch(i8*, i32, i32)
-
-declare float @llvm.sqrt.f32(float)
-
-declare double @llvm.sqrt.f64(double)
-
-define void @libm() {
-	fcmp uno float 1.000000e+00, 2.000000e+00		; <i1>:1 [#uses=0]
-	fcmp uno double 3.000000e+00, 4.000000e+00		; <i1>:2 [#uses=0]
-	call void @llvm.prefetch( i8* null, i32 1, i32 3 )
-	call float @llvm.sqrt.f32( float 5.000000e+00 )		; <float>:3 [#uses=0]
-	call double @llvm.sqrt.f64( double 6.000000e+00 )		; <double>:4 [#uses=0]
-	call i8 @llvm.ctpop.i8( i8 10 )		; <i32>:5 [#uses=1]
-	call i16 @llvm.ctpop.i16( i16 11 )		; <i32>:7 [#uses=1]
-	call i32 @llvm.ctpop.i32( i32 12 )		; <i32>:9 [#uses=1]
-	call i64 @llvm.ctpop.i64( i64 13 )		; <i32>:11 [#uses=1]
-	call i8 @llvm.ctlz.i8( i8 14 )		; <i32>:13 [#uses=1]
-	call i16 @llvm.ctlz.i16( i16 15 )		; <i32>:15 [#uses=1]
-	call i32 @llvm.ctlz.i32( i32 16 )		; <i32>:17 [#uses=1]
-	call i64 @llvm.ctlz.i64( i64 17 )		; <i32>:19 [#uses=1]
-	call i8 @llvm.cttz.i8( i8 18 )		; <i32>:21 [#uses=1]
-	call i16 @llvm.cttz.i16( i16 19 )		; <i32>:23 [#uses=1]
-	call i32 @llvm.cttz.i32( i32 20 )		; <i32>:25 [#uses=1]
-	call i64 @llvm.cttz.i64( i64 21 )		; <i32>:27 [#uses=1]
-	ret void
-}
-
-declare i8 @llvm.ctpop.i8(i8)
-
-declare i16 @llvm.ctpop.i16(i16)
-
-declare i32 @llvm.ctpop.i32(i32)
-
-declare i64 @llvm.ctpop.i64(i64)
-
-declare i8 @llvm.ctlz.i8(i8)
-
-declare i16 @llvm.ctlz.i16(i16)
-
-declare i32 @llvm.ctlz.i32(i32)
-
-declare i64 @llvm.ctlz.i64(i64)
-
-declare i8 @llvm.cttz.i8(i8)
-
-declare i16 @llvm.cttz.i16(i16)
-
-declare i32 @llvm.cttz.i32(i32)
-
-declare i64 @llvm.cttz.i64(i64)
-
-; ModuleID = 'packed.ll'
- at foo1 = external global <4 x float>		; <<4 x float>*> [#uses=2]
- at foo102 = external global <2 x i32>		; <<2 x i32>*> [#uses=2]
-
-define void @main3() {
-	store <4 x float> < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 >, <4 x float>* @foo1
-	store <2 x i32> < i32 4, i32 4 >, <2 x i32>* @foo102
-	%l1 = load <4 x float>* @foo1		; <<4 x float>> [#uses=0]
-	%l2 = load <2 x i32>* @foo102		; <<2 x i32>> [#uses=0]
-	ret void
-}
-
-; ModuleID = 'properties.ll'
-target datalayout = "e-p:32:32"
-target triple = "proc-vend-sys"
-deplibs = [ "m", "c" ]
-; ModuleID = 'prototype.ll'
-
-declare i32 @bar1017(i32 %in)
-
-define i32 @foo1016(i32 %blah) {
-	%xx = call i32 @bar1017( i32 %blah )		; <i32> [#uses=1]
-	ret i32 %xx
-}
-
-; ModuleID = 'recursivetype.ll'
-	%list = type { %list*, i32 }
-
-declare i8* @malloc(i32)
-
-define void @InsertIntoListTail(%list** %L, i32 %Data) {
-bb1:
-	%reg116 = load %list** %L		; <%list*> [#uses=1]
-	%cast1004 = inttoptr i64 0 to %list*		; <%list*> [#uses=1]
-	%cond1000 = icmp eq %list* %reg116, %cast1004		; <i1> [#uses=1]
-	br i1 %cond1000, label %bb3, label %bb2
-
-bb2:		; preds = %bb2, %bb1
-	%reg117 = phi %list** [ %reg118, %bb2 ], [ %L, %bb1 ]		; <%list**> [#uses=1]
-	%cast1010 = bitcast %list** %reg117 to %list***		; <%list***> [#uses=1]
-	%reg118 = load %list*** %cast1010		; <%list**> [#uses=3]
-	%reg109 = load %list** %reg118		; <%list*> [#uses=1]
-	%cast1005 = inttoptr i64 0 to %list*		; <%list*> [#uses=1]
-	%cond1001 = icmp ne %list* %reg109, %cast1005		; <i1> [#uses=1]
-	br i1 %cond1001, label %bb2, label %bb3
-
-bb3:		; preds = %bb2, %bb1
-	%reg119 = phi %list** [ %reg118, %bb2 ], [ %L, %bb1 ]		; <%list**> [#uses=1]
-	%cast1006 = bitcast %list** %reg119 to i8**		; <i8**> [#uses=1]
-	%reg111 = call i8* @malloc( i32 16 )		; <i8*> [#uses=3]
-	store i8* %reg111, i8** %cast1006
-	%reg111.upgrd.1 = ptrtoint i8* %reg111 to i64		; <i64> [#uses=1]
-	%reg1002 = add i64 %reg111.upgrd.1, 8		; <i64> [#uses=1]
-	%reg1002.upgrd.2 = inttoptr i64 %reg1002 to i8*		; <i8*> [#uses=1]
-	%cast1008 = bitcast i8* %reg1002.upgrd.2 to i32*		; <i32*> [#uses=1]
-	store i32 %Data, i32* %cast1008
-	%cast1003 = inttoptr i64 0 to i64*		; <i64*> [#uses=1]
-	%cast1009 = bitcast i8* %reg111 to i64**		; <i64**> [#uses=1]
-	store i64* %cast1003, i64** %cast1009
-	ret void
-}
-
-define %list* @FindData(%list* %L, i32 %Data) {
-bb1:
-	br label %bb2
-
-bb2:		; preds = %bb6, %bb1
-	%reg115 = phi %list* [ %reg116, %bb6 ], [ %L, %bb1 ]		; <%list*> [#uses=4]
-	%cast1014 = inttoptr i64 0 to %list*		; <%list*> [#uses=1]
-	%cond1011 = icmp ne %list* %reg115, %cast1014		; <i1> [#uses=1]
-	br i1 %cond1011, label %bb4, label %bb3
-
-bb3:		; preds = %bb2
-	ret %list* null
-
-bb4:		; preds = %bb2
-	%idx = getelementptr %list* %reg115, i64 0, i32 1		; <i32*> [#uses=1]
-	%reg111 = load i32* %idx		; <i32> [#uses=1]
-	%cond1013 = icmp ne i32 %reg111, %Data		; <i1> [#uses=1]
-	br i1 %cond1013, label %bb6, label %bb5
-
-bb5:		; preds = %bb4
-	ret %list* %reg115
-
-bb6:		; preds = %bb4
-	%idx2 = getelementptr %list* %reg115, i64 0, i32 0		; <%list**> [#uses=1]
-	%reg116 = load %list** %idx2		; <%list*> [#uses=1]
-	br label %bb2
-}
-; ModuleID = 'simplecalltest.ll'
-	%FunTy = type i32 (i32)
-
-define void @invoke1019(%FunTy* %x) {
-	%foo = call i32 %x( i32 123 )		; <i32> [#uses=0]
-	ret void
-}
-
-define i32 @main4(i32 %argc, i8** %argv, i8** %envp) {
-	%retval = call i32 @test1008( i32 %argc )		; <i32> [#uses=2]
-	%two = add i32 %retval, %retval		; <i32> [#uses=1]
-	%retval2 = call i32 @test1008( i32 %argc )		; <i32> [#uses=1]
-	%two2 = add i32 %two, %retval2		; <i32> [#uses=1]
-	call void @invoke1019( %FunTy* @test1008 )
-	ret i32 %two2
-}
-
-define i32 @test1008(i32 %i0) {
-	ret i32 %i0
-}
-; ModuleID = 'smallest.ll'
-; ModuleID = 'small.ll'
-	%x = type i32
-
-define i32 @foo1020(i32 %in) {
-label:
-	ret i32 2
-}
-; ModuleID = 'testalloca.ll'
-	%inners = type { float, { i8 } }
-	%struct = type { i32, %inners, i64 }
-
-define i32 @testfunction(i32 %i0, i32 %j0) {
-	alloca i8, i32 5		; <i8*>:1 [#uses=0]
-	%ptr = alloca i32		; <i32*> [#uses=2]
-	store i32 3, i32* %ptr
-	%val = load i32* %ptr		; <i32> [#uses=0]
-	%sptr = alloca %struct		; <%struct*> [#uses=2]
-	%nsptr = getelementptr %struct* %sptr, i64 0, i32 1		; <%inners*> [#uses=1]
-	%ubsptr = getelementptr %inners* %nsptr, i64 0, i32 1		; <{ i8 }*> [#uses=1]
-	%idx = getelementptr { i8 }* %ubsptr, i64 0, i32 0		; <i8*> [#uses=1]
-	store i8 4, i8* %idx
-	%fptr = getelementptr %struct* %sptr, i64 0, i32 1, i32 0		; <float*> [#uses=1]
-	store float 4.000000e+00, float* %fptr
-	ret i32 3
-}
-; ModuleID = 'testconstants.ll'
- at somestr3 = constant [11 x i8] c"hello world"
- at array99 = constant [2 x i32] [ i32 12, i32 52 ]
-constant { i32, i32 } { i32 4, i32 3 }		; <{ i32, i32 }*>:0 [#uses=0]
-
-define [2 x i32]* @testfunction99(i32 %i0, i32 %j0) {
-	ret [2 x i32]* @array
-}
-
-define i8* @otherfunc(i32, double) {
-	%somestr = getelementptr [11 x i8]* @somestr3, i64 0, i64 0		; <i8*> [#uses=1]
-	ret i8* %somestr
-}
-
-define i8* @yetanotherfunc(i32, double) {
-	ret i8* null
-}
-
-define i32 @negativeUnsigned() {
-	ret i32 -1
-}
-
-define i32 @largeSigned() {
-	ret i32 -394967296
-}
-; ModuleID = 'testlogical.ll'
-
-define i32 @simpleAdd(i32 %i0, i32 %j0) {
-	%t1 = xor i32 %i0, %j0		; <i32> [#uses=1]
-	%t2 = or i32 %i0, %j0		; <i32> [#uses=1]
-	%t3 = and i32 %t1, %t2		; <i32> [#uses=1]
-	ret i32 %t3
-}
-; ModuleID = 'testmemory.ll'
-	%complexty = type { i32, { [4 x i8*], float }, double }
-	%struct = type { i32, { float, { i8 } }, i64 }
-
-define i32 @main6() {
-	call i32 @testfunction98( i64 0, i64 1 )
-	ret i32 0
-}
-
-define i32 @testfunction98(i64 %i0, i64 %j0) {
-	%array0 = malloc [4 x i8]		; <[4 x i8]*> [#uses=2]
-	%size = add i32 2, 2		; <i32> [#uses=1]
-	%array1 = malloc i8, i32 4		; <i8*> [#uses=1]
-	%array2 = malloc i8, i32 %size		; <i8*> [#uses=1]
-	%idx = getelementptr [4 x i8]* %array0, i64 0, i64 2		; <i8*> [#uses=1]
-	store i8 123, i8* %idx
-	free [4 x i8]* %array0
-	free i8* %array1
-	free i8* %array2
-	%aa = alloca %complexty, i32 5		; <%complexty*> [#uses=1]
-	%idx2 = getelementptr %complexty* %aa, i64 %i0, i32 1, i32 0, i64 %j0		; <i8**> [#uses=1]
-	store i8* null, i8** %idx2
-	%ptr = alloca i32		; <i32*> [#uses=2]
-	store i32 3, i32* %ptr
-	%val = load i32* %ptr		; <i32> [#uses=0]
-	%sptr = alloca %struct		; <%struct*> [#uses=1]
-	%ubsptr = getelementptr %struct* %sptr, i64 0, i32 1, i32 1		; <{ i8 }*> [#uses=1]
-	%idx3 = getelementptr { i8 }* %ubsptr, i64 0, i32 0		; <i8*> [#uses=1]
-	store i8 4, i8* %idx3
-	ret i32 3
-}
-; ModuleID = 'testswitch.ll'
-	%int = type i32
-
-define i32 @squared(i32 %i0) {
-	switch i32 %i0, label %Default [
-		 i32 1, label %Case1
-		 i32 2, label %Case2
-		 i32 4, label %Case4
-	]
-
-Default:		; preds = %0
-	ret i32 -1
-
-Case1:		; preds = %0
-	ret i32 1
-
-Case2:		; preds = %0
-	ret i32 4
-
-Case4:		; preds = %0
-	ret i32 16
-}
-; ModuleID = 'testvarargs.ll'
-
-declare i32 @printf(i8*, ...)
-
-define i32 @testvarar() {
-	call i32 (i8*, ...)* @printf( i8* null, i32 12, i8 42 )		; <i32>:1 [#uses=1]
-	ret i32 %1
-}
-; ModuleID = 'undefined.ll'
- at X2 = global i32 undef		; <i32*> [#uses=0]
-
-declare i32 @atoi(i8*)
-
-define i32 @test1009() {
-	ret i32 undef
-}
-
-define i32 @test1003() {
-	%X = add i32 undef, 1		; <i32> [#uses=1]
-	ret i32 %X
-}
-; ModuleID = 'unreachable.ll'
-
-declare void @bar()
-
-define i32 @foo1021() {
-	unreachable
-}
-
-define double @xyz() {
-	call void @bar( )
-	unreachable
-}
-; ModuleID = 'varargs.ll'
-
-declare void @llvm.va_start(i8* %ap)
-
-declare void @llvm.va_copy(i8* %aq, i8* %ap)
-
-declare void @llvm.va_end(i8* %ap)
-
-define i32 @test1010(i32 %X, ...) {
-	%ap = alloca i8*		; <i8**> [#uses=4]
-	%va.upgrd.1 = bitcast i8** %ap to i8*		; <i8*> [#uses=1]
-	call void @llvm.va_start( i8* %va.upgrd.1 )
-	%tmp = va_arg i8** %ap, i32		; <i32> [#uses=1]
-	%aq = alloca i8*		; <i8**> [#uses=2]
-	%va0.upgrd.2 = bitcast i8** %aq to i8*		; <i8*> [#uses=1]
-	%va1.upgrd.3 = bitcast i8** %ap to i8*		; <i8*> [#uses=1]
-	call void @llvm.va_copy( i8* %va0.upgrd.2, i8* %va1.upgrd.3 )
-	%va.upgrd.4 = bitcast i8** %aq to i8*		; <i8*> [#uses=1]
-	call void @llvm.va_end( i8* %va.upgrd.4 )
-	%va.upgrd.5 = bitcast i8** %ap to i8*		; <i8*> [#uses=1]
-	call void @llvm.va_end( i8* %va.upgrd.5 )
-	ret i32 %tmp
-}
-; ModuleID = 'varargs_new.ll'
-
-declare void @llvm.va_start(i8*)
-
-declare void @llvm.va_copy(i8*, i8*)
-
-declare void @llvm.va_end(i8*)
-
-define i32 @test1011(i32 %X, ...) {
-	%ap = alloca i8*		; <i8**> [#uses=4]
-	%aq = alloca i8*		; <i8**> [#uses=2]
-	%va.upgrd.1 = bitcast i8** %ap to i8*		; <i8*> [#uses=1]
-	call void @llvm.va_start( i8* %va.upgrd.1 )
-	%tmp = va_arg i8** %ap, i32		; <i32> [#uses=1]
-	%apv = load i8** %ap		; <i8*> [#uses=1]
-	%va0.upgrd.2 = bitcast i8** %aq to i8*		; <i8*> [#uses=1]
-	%va1.upgrd.3 = bitcast i8* %apv to i8*		; <i8*> [#uses=1]
-	call void @llvm.va_copy( i8* %va0.upgrd.2, i8* %va1.upgrd.3 )
-	%va.upgrd.4 = bitcast i8** %aq to i8*		; <i8*> [#uses=1]
-	call void @llvm.va_end( i8* %va.upgrd.4 )
-	%va.upgrd.5 = bitcast i8** %ap to i8*		; <i8*> [#uses=1]
-	call void @llvm.va_end( i8* %va.upgrd.5 )
-	ret i32 %tmp
-}
-; ModuleID = 'weirdnames.ll'
-	"&^ " = type { i32 }
-@"%.*+ foo" = global "&^ " { i32 5 }		; <"&^ "*> [#uses=0]
-@"0" = global float 0.000000e+00		; <float*> [#uses=0]

Removed: llvm/trunk/test/Other/2007-06-16-Funcname.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/2007-06-16-Funcname.ll?rev=53426&view=auto

==============================================================================
--- llvm/trunk/test/Other/2007-06-16-Funcname.ll (original)
+++ llvm/trunk/test/Other/2007-06-16-Funcname.ll (removed)
@@ -1,7 +0,0 @@
-; RUN: llvm-as < %s | llc -march=cpp -cppfname=WAKKA | not grep makeLLVMModule
-; PR1515
-
-define void @foo() {
-  ret void
-}
-




From kremenek at apple.com  Thu Jul 10 17:57:11 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Thu, 10 Jul 2008 22:57:11 -0000
Subject: [llvm-commits] [llvm] r53429 -
	/llvm/trunk/include/llvm/ADT/ImmutableMap.h
Message-ID: <200807102257.m6AMvBP5004058@zion.cs.uiuc.edu>

Author: kremenek
Date: Thu Jul 10 17:57:10 2008
New Revision: 53429

URL: http://llvm.org/viewvc/llvm-project?rev=53429&view=rev
Log:
Added ImmutableMap constructor that accepts a const TreeTy*.

Modified:
    llvm/trunk/include/llvm/ADT/ImmutableMap.h

Modified: llvm/trunk/include/llvm/ADT/ImmutableMap.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ImmutableMap.h?rev=53429&r1=53428&r2=53429&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/ImmutableMap.h (original)
+++ llvm/trunk/include/llvm/ADT/ImmutableMap.h Thu Jul 10 17:57:10 2008
@@ -76,7 +76,8 @@
   /// should use a Factory object to create maps instead of directly
   /// invoking the constructor, but there are cases where make this
   /// constructor public is useful.
-  explicit ImmutableMap(TreeTy* R) : Root(R) {}
+  explicit ImmutableMap(TreeTy* R) : Root(R) {}  
+  explicit ImmutableMap(const TreeTy* R) : Root(const_cast<TreeTy*>(R)) {}
   
   class Factory {
     typename TreeTy::Factory F;




From isanbard at gmail.com  Thu Jul 10 17:57:49 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 10 Jul 2008 22:57:49 -0000
Subject: [llvm-commits] [llvm] r53430 - in /llvm/trunk/include/llvm:
 ADT/alist_node.h CodeGen/SelectionDAGNodes.h Function.h Support/Recycler.h
Message-ID: <200807102257.m6AMvnLR004091@zion.cs.uiuc.edu>

Author: void
Date: Thu Jul 10 17:57:49 2008
New Revision: 53430

URL: http://llvm.org/viewvc/llvm-project?rev=53430&view=rev
Log:
Pull r53428 from Gaz into mainline:

Remove warnings about unused/shadowed variables.

Modified:
    llvm/trunk/include/llvm/ADT/alist_node.h
    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/trunk/include/llvm/Function.h
    llvm/trunk/include/llvm/Support/Recycler.h

Modified: llvm/trunk/include/llvm/ADT/alist_node.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/alist_node.h?rev=53430&r1=53429&r2=53430&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/alist_node.h (original)
+++ llvm/trunk/include/llvm/ADT/alist_node.h Thu Jul 10 17:57:49 2008
@@ -100,22 +100,22 @@
   }
 
   void destroySentinel(NodeTy *N) {
-    assert(N == &Sentinel);
+    assert(N == &Sentinel); N = N;
     Sentinel.setPrev(0);
     Sentinel.setNext(0);
   }
 
-  void addNodeToList(NodeTy *N) {}
-  void removeNodeFromList(NodeTy *N) {}
-  void transferNodesFromList(iplist<NodeTy, ilist_traits> &L2,
-                             ilist_iterator<NodeTy> first,
-                             ilist_iterator<NodeTy> last) {}
+  void addNodeToList(NodeTy *) {}
+  void removeNodeFromList(NodeTy *) {}
+  void transferNodesFromList(iplist<NodeTy, ilist_traits> &,
+                             ilist_iterator<NodeTy> /*first*/,
+                             ilist_iterator<NodeTy> /*last*/) {}
 
   // Ideally we wouldn't implement this, but ilist's clear calls it,
   // which is called from ilist's destructor. We won't ever call
   // either of those with a non-empty list, but statically this
   // method needs to exist.
-  void deleteNode(NodeTy *N) { assert(0); }
+  void deleteNode(NodeTy *) { assert(0); }
 
 private:
   static NodeTy *createNode(const NodeTy &V); // do not implement

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=53430&r1=53429&r2=53430&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Thu Jul 10 17:57:49 2008
@@ -2231,8 +2231,8 @@
   // Allocate the allocator immediately inside the traits class.
   AllocatorType Allocator;
 
-  void addNodeToList(SDNode* N) {}
-  void removeNodeFromList(SDNode* N) {}
+  void addNodeToList(SDNode*) {}
+  void removeNodeFromList(SDNode*) {}
   void transferNodesFromList(alist_traits &, iterator, iterator) {}
   void deleteNode(SDNode *N) {
     N->~SDNode();

Modified: llvm/trunk/include/llvm/Function.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Function.h?rev=53430&r1=53429&r2=53430&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Function.h (original)
+++ llvm/trunk/include/llvm/Function.h Thu Jul 10 17:57:49 2008
@@ -186,8 +186,8 @@
   bool doesNotAccessMemory() const {
     return paramHasAttr(0, ParamAttr::ReadNone);
   }
-  void setDoesNotAccessMemory(bool doesNotAccessMemory = true) {
-    if (doesNotAccessMemory) addParamAttr(0, ParamAttr::ReadNone);
+  void setDoesNotAccessMemory(bool DoesNotAccessMemory = true) {
+    if (DoesNotAccessMemory) addParamAttr(0, ParamAttr::ReadNone);
     else removeParamAttr(0, ParamAttr::ReadNone);
   }
 
@@ -195,8 +195,8 @@
   bool onlyReadsMemory() const {
     return doesNotAccessMemory() || paramHasAttr(0, ParamAttr::ReadOnly);
   }
-  void setOnlyReadsMemory(bool onlyReadsMemory = true) {
-    if (onlyReadsMemory) addParamAttr(0, ParamAttr::ReadOnly);
+  void setOnlyReadsMemory(bool OnlyReadsMemory = true) {
+    if (OnlyReadsMemory) addParamAttr(0, ParamAttr::ReadOnly);
     else removeParamAttr(0, ParamAttr::ReadOnly | ParamAttr::ReadNone);
   }
 
@@ -204,8 +204,8 @@
   bool doesNotReturn() const {
     return paramHasAttr(0, ParamAttr::NoReturn);
   }
-  void setDoesNotReturn(bool doesNotReturn = true) {
-    if (doesNotReturn) addParamAttr(0, ParamAttr::NoReturn);
+  void setDoesNotReturn(bool DoesNotReturn = true) {
+    if (DoesNotReturn) addParamAttr(0, ParamAttr::NoReturn);
     else removeParamAttr(0, ParamAttr::NoReturn);
   }
 
@@ -213,8 +213,8 @@
   bool doesNotThrow() const {
     return paramHasAttr(0, ParamAttr::NoUnwind);
   }
-  void setDoesNotThrow(bool doesNotThrow = true) {
-    if (doesNotThrow) addParamAttr(0, ParamAttr::NoUnwind);
+  void setDoesNotThrow(bool DoesNotThrow = true) {
+    if (DoesNotThrow) addParamAttr(0, ParamAttr::NoUnwind);
     else removeParamAttr(0, ParamAttr::NoUnwind);
   }
 

Modified: llvm/trunk/include/llvm/Support/Recycler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/Recycler.h?rev=53430&r1=53429&r2=53430&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/Recycler.h (original)
+++ llvm/trunk/include/llvm/Support/Recycler.h Thu Jul 10 17:57:49 2008
@@ -79,7 +79,7 @@
   }
 
   template<class SubClass, class AllocatorType>
-  void Deallocate(AllocatorType &Allocator, SubClass* Element) {
+  void Deallocate(AllocatorType & /*Allocator*/, SubClass* Element) {
     NodeTy *N = NodeTy::getNode(Element);
     assert(N->getPrev() == 0);
     assert(N->getNext() == 0);




From kremenek at apple.com  Thu Jul 10 17:58:10 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Thu, 10 Jul 2008 22:58:10 -0000
Subject: [llvm-commits] [llvm] r53431 - /llvm/trunk/include/llvm/ADT/ilist.h
Message-ID: <200807102258.m6AMwAjB004113@zion.cs.uiuc.edu>

Author: kremenek
Date: Thu Jul 10 17:58:10 2008
New Revision: 53431

URL: http://llvm.org/viewvc/llvm-project?rev=53431&view=rev
Log:
Make typedefs in ilist public (Visual C++ errors out when they are private).

Modified:
    llvm/trunk/include/llvm/ADT/ilist.h

Modified: llvm/trunk/include/llvm/ADT/ilist.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ilist.h?rev=53431&r1=53430&r2=53431&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/ilist.h (original)
+++ llvm/trunk/include/llvm/ADT/ilist.h Thu Jul 10 17:58:10 2008
@@ -83,10 +83,11 @@
 template<typename NodeTy>
 class ilist_iterator
   : public bidirectional_iterator<NodeTy, ptrdiff_t> {
+    
+public:
   typedef ilist_traits<NodeTy> Traits;
   typedef bidirectional_iterator<NodeTy, ptrdiff_t> super;
 
-public:
   typedef size_t size_type;
   typedef typename super::pointer pointer;
   typedef typename super::reference reference;




From kremenek at apple.com  Thu Jul 10 18:09:45 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Thu, 10 Jul 2008 23:09:45 -0000
Subject: [llvm-commits] [llvm] r53432 - /llvm/trunk/include/llvm/ADT/alist.h
Message-ID: <200807102309.m6AN9jvX004542@zion.cs.uiuc.edu>

Author: kremenek
Date: Thu Jul 10 18:09:45 2008
New Revision: 53432

URL: http://llvm.org/viewvc/llvm-project?rev=53432&view=rev
Log:
Make some typedefs public to make MSVC++ happy.

Modified:
    llvm/trunk/include/llvm/ADT/alist.h

Modified: llvm/trunk/include/llvm/ADT/alist.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/alist.h?rev=53432&r1=53431&r2=53432&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/alist.h (original)
+++ llvm/trunk/include/llvm/ADT/alist.h Thu Jul 10 18:09:45 2008
@@ -24,9 +24,11 @@
 template<class T, class LargestT = T, class ValueT = T,
          class NodeIterT = ilist_iterator<alist_node<T, LargestT> > >
 class alist_iterator : public bidirectional_iterator<ValueT, ptrdiff_t> {
+public:
   typedef bidirectional_iterator<ValueT, ptrdiff_t> super;
   typedef alist_node<T, LargestT> NodeTy;
 
+private:
   /// NodeIter - The underlying iplist iterator that is being wrapped.
   NodeIterT NodeIter;
 
@@ -144,9 +146,9 @@
 ///
 template<class T, class LargestT = T>
 class alist_traits {
+public:
   typedef alist_iterator<T, LargestT> iterator;
 
-public:
   void addNodeToList(T *) {}
   void removeNodeFromList(T *) {}
   void transferNodesFromList(alist_traits &, iterator, iterator) {}
@@ -159,9 +161,8 @@
 ///
 template<class T, class LargestT = T>
 class alist {
-  typedef alist_node<T, LargestT> NodeTy;
-
 public:
+  typedef alist_node<T, LargestT> NodeTy;
   typedef typename ilist<NodeTy>::size_type size_type;
 
 private:




From kremenek at apple.com  Thu Jul 10 18:24:20 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Thu, 10 Jul 2008 23:24:20 -0000
Subject: [llvm-commits] [llvm] r53433 -
	/llvm/trunk/include/llvm/ADT/alist_node.h
Message-ID: <200807102324.m6ANOKqH005297@zion.cs.uiuc.edu>

Author: kremenek
Date: Thu Jul 10 18:24:20 2008
New Revision: 53433

URL: http://llvm.org/viewvc/llvm-project?rev=53433&view=rev
Log:
Make typedef public to make MSVC++ happy.

Modified:
    llvm/trunk/include/llvm/ADT/alist_node.h

Modified: llvm/trunk/include/llvm/ADT/alist_node.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/alist_node.h?rev=53433&r1=53432&r2=53433&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/alist_node.h (original)
+++ llvm/trunk/include/llvm/ADT/alist_node.h Thu Jul 10 18:24:20 2008
@@ -77,6 +77,7 @@
 // A specialization of ilist_traits for alist_nodes.
 template<class T, class LargestT>
 class ilist_traits<alist_node<T, LargestT> > {
+public:
   typedef alist_node<T, LargestT> NodeTy;
 
 protected:




From gohman at apple.com  Thu Jul 10 18:28:49 2008
From: gohman at apple.com (Dan Gohman)
Date: Thu, 10 Jul 2008 16:28:49 -0700
Subject: [llvm-commits] [llvm] r53210 - in /llvm/trunk:
	include/llvm/ADT/alist.h include/llvm/ADT/alist_node.h
	include/llvm/ADT/ilist.h include/llvm/Support/Recycler.h
	include/llvm/Support/RecyclingAllocator.h	include/llvm/SymbolTableListTraits.h
	lib/Support/Allocator.cpp
In-Reply-To: <76615F2C-9D2B-4C68-ABD0-95B1AEECA854@apple.com>
References: <200807072258.m67MwFQk016076@zion.cs.uiuc.edu>
	<76615F2C-9D2B-4C68-ABD0-95B1AEECA854@apple.com>
Message-ID: <CC9F0CD3-7161-47D4-BD15-FBEC46F625FF@apple.com>


On Jul 9, 2008, at 11:11 PM, Chris Lattner wrote:
>> --- llvm/trunk/include/llvm/ADT/alist_node.h (added)
>> +++ llvm/trunk/include/llvm/ADT/alist_node.h Mon Jul  7 17:58:06 2008
>> @@ -0,0 +1,126 @@
>> +//==- llvm/ADT/alist_node.h - Next/Prev helper class for alist ---
>> *- C++ -*-==//
>> +//
>
>>
>> +
>> +#include <cassert>
>> +#include "llvm/ADT/ilist.h"
>> +#include "llvm/Support/AlignOf.h"
>> +#include "llvm/Support/DataTypes.h"
>
> Please move the <cassert> #include to the end.

Ok.

>  I think you only have
> the ilist #include for the partial specialization of ilist_traits.
> You can just forward declare ilist_traits and remove the #include if
> this is the case.

ilist_iterator is also used.

>> +++ llvm/trunk/include/llvm/ADT/alist.h Mon Jul  7 17:58:06 2008
>> @@ -0,0 +1,292 @@
>> +//==- llvm/ADT/alist.h - Linked lists with hooks -----------------
>> *- C++ -*-==//
>
> What is the "a" stand for in alist?  please mention it here or in the
> file comment.

It stood for "allocation" when I first named it, but it evolved
a bit since then.

>
>
>> +#ifndef LLVM_ADT_ALIST_H
>> +#define LLVM_ADT_ALIST_H
>> +
>> +#include <cassert>
>> +#include "llvm/ADT/alist_node.h"
>> +#include "llvm/ADT/STLExtras.h"
>
> cassert isn't needed.

Because alist_node.h includes it? Ok.

>
>
>> +// do not implement. this is to catch errors when people try to use
>> +// them as random access iterators
>
> isn't it better to just not implement them?  Then people will get a
> compile time error instead of a link-time one.

The whole situation in LLVM with iterators and pointers being
two-way implicit-convertable has its conveniences, but it has
its dark sides too. If the above aren't declared, overload
resolution will make different choices.

>
>
>> +/// alist - This class is an ilist-style container that  
>> automatically
>> +/// adds the next/prev pointers. It is designed to work in
>> cooperation
>> +/// with <llvm/Support/Recycler.h>.
>
> Would it be possible to replace ilist with this or merge alist and
> ilist?  When would someone use ilist vs alist?  When would someone use
> alist vs ilist?

Currently, alist is mostly just like ilist except that it doesn't  
require
the element types to provide their own next+prev pointers. And it's
Recycler-friendly.

>
>
> FWIW, the name 'alist' is somewhat hard for me, I keep typing 'alias'.
> Maybe it's a form of finger/brain autocomplete :)

Ok. I'll think about better names, as the design continues to evolve.

>
>
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> = 
>> =====================================================================
>> --- llvm/trunk/include/llvm/Support/Recycler.h (added)
>> +++ llvm/trunk/include/llvm/Support/Recycler.h Mon Jul  7 17:58:06
>> 2008
>
>>
>> +#ifndef LLVM_SUPPORT_RECYCLER_H
>> +#define LLVM_SUPPORT_RECYCLER_H
>> +
>> +#include <cassert>
>> +#include "llvm/ADT/alist_node.h"
>
> <cassert> is dead.  System includes should be at end of #include list.

Ok.

>
>
>> +/// Recycler - This class manages a linked-list of deallocated nodes
>> +/// and facilitates reusing deallocated memory in place of  
>> allocating
>> +/// new memory. The objects it allocates are stored in alist_node
>> +/// containers, so they may be used in alists.
>> +///
>
> Ok, if this is the motivation for alist, I have to ask: isn't it
> easier to just not try to use pointers in the nodes?  Why not blast
> over the first two words of the recycled memory with next/prev
> pointers regardless of what the type is?  It seems that doing so would
> simplify the design fairly substantially.

I'll think about it. Right now it's convenient for Recycler to
"know" about alist_nodes, so that it can hide the details from
its users.

>
>
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> = 
>> =====================================================================
>> --- llvm/trunk/include/llvm/Support/RecyclingAllocator.h (added)
>> +++ llvm/trunk/include/llvm/Support/RecyclingAllocator.h Mon Jul  7
>> 17:58:06 2008
>> +
>> +#include <cassert>
>> +#include "llvm/Support/Recycler.h"
>> +#include "llvm/ADT/STLExtras.h"
>
> cassert and STLExtras.h are both redundant.

Ok.

Dan



From sabre at nondot.org  Thu Jul 10 18:37:50 2008
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 10 Jul 2008 23:37:50 -0000
Subject: [llvm-commits] [llvm] r53434 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <200807102337.m6ANboKI005729@zion.cs.uiuc.edu>

Author: lattner
Date: Thu Jul 10 18:37:50 2008
New Revision: 53434

URL: http://llvm.org/viewvc/llvm-project?rev=53434&view=rev
Log:
make legalize types be a command line option: -enable-legalize-types.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=53434&r1=53433&r2=53434&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Jul 10 18:37:50 2008
@@ -50,7 +50,9 @@
 using namespace llvm;
 
 static cl::opt<bool>
-EnableValueProp("enable-value-prop", cl::Hidden, cl::init(false));
+EnableValueProp("enable-value-prop", cl::Hidden);
+static cl::opt<bool>
+EnableLegalizeTypes("enable-legalize-types", cl::Hidden);
 
 
 #ifndef NDEBUG
@@ -5296,10 +5298,11 @@
   
   // Second step, hack on the DAG until it only uses operations and types that
   // the target supports.
-#if 0  // Enable this some day.
-  DAG.LegalizeTypes();
-  // Someday even later, enable a dag combine pass here.
-#endif
+  if (EnableLegalizeTypes) {// Enable this some day.
+    DAG.LegalizeTypes();
+    // TODO: enable a dag combine pass here.
+  }
+  
   if (TimePassesIsEnabled) {
     NamedRegionTimer T("DAG Legalization");
     DAG.Legalize();




From isanbard at gmail.com  Thu Jul 10 17:52:11 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 10 Jul 2008 22:52:11 -0000
Subject: [llvm-commits] [llvm] r53428 - in
 /llvm/branches/Apple/Gaz/include/llvm: ADT/alist_node.h
 CodeGen/SelectionDAGNodes.h Function.h Support/Recycler.h
Message-ID: <200807102252.m6AMqB3P003897@zion.cs.uiuc.edu>

Author: void
Date: Thu Jul 10 17:52:10 2008
New Revision: 53428

URL: http://llvm.org/viewvc/llvm-project?rev=53428&view=rev
Log:
Remove warnings (errors) about shadowed and unused variables.

Modified:
    llvm/branches/Apple/Gaz/include/llvm/ADT/alist_node.h
    llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/branches/Apple/Gaz/include/llvm/Function.h
    llvm/branches/Apple/Gaz/include/llvm/Support/Recycler.h

Modified: llvm/branches/Apple/Gaz/include/llvm/ADT/alist_node.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/include/llvm/ADT/alist_node.h?rev=53428&r1=53427&r2=53428&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/include/llvm/ADT/alist_node.h (original)
+++ llvm/branches/Apple/Gaz/include/llvm/ADT/alist_node.h Thu Jul 10 17:52:10 2008
@@ -100,22 +100,22 @@
   }
 
   void destroySentinel(NodeTy *N) {
-    assert(N == &Sentinel);
+    assert(N == &Sentinel); N = N;
     Sentinel.setPrev(0);
     Sentinel.setNext(0);
   }
 
-  void addNodeToList(NodeTy *N) {}
-  void removeNodeFromList(NodeTy *N) {}
-  void transferNodesFromList(iplist<NodeTy, ilist_traits> &L2,
-                             ilist_iterator<NodeTy> first,
-                             ilist_iterator<NodeTy> last) {}
+  void addNodeToList(NodeTy *) {}
+  void removeNodeFromList(NodeTy *) {}
+  void transferNodesFromList(iplist<NodeTy, ilist_traits> &,
+                             ilist_iterator<NodeTy> /*first*/,
+                             ilist_iterator<NodeTy> /*last*/) {}
 
   // Ideally we wouldn't implement this, but ilist's clear calls it,
   // which is called from ilist's destructor. We won't ever call
   // either of those with a non-empty list, but statically this
   // method needs to exist.
-  void deleteNode(NodeTy *N) { assert(0); }
+  void deleteNode(NodeTy *) { assert(0); }
 
 private:
   static NodeTy *createNode(const NodeTy &V); // do not implement

Modified: llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h?rev=53428&r1=53427&r2=53428&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/branches/Apple/Gaz/include/llvm/CodeGen/SelectionDAGNodes.h Thu Jul 10 17:52:10 2008
@@ -2218,8 +2218,8 @@
   // Allocate the allocator immediately inside the traits class.
   AllocatorType Allocator;
 
-  void addNodeToList(SDNode* N) {}
-  void removeNodeFromList(SDNode* N) {}
+  void addNodeToList(SDNode*) {}
+  void removeNodeFromList(SDNode*) {}
   void transferNodesFromList(alist_traits &, iterator, iterator) {}
   void deleteNode(SDNode *N) {
     N->~SDNode();

Modified: llvm/branches/Apple/Gaz/include/llvm/Function.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/include/llvm/Function.h?rev=53428&r1=53427&r2=53428&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/include/llvm/Function.h (original)
+++ llvm/branches/Apple/Gaz/include/llvm/Function.h Thu Jul 10 17:52:10 2008
@@ -186,8 +186,8 @@
   bool doesNotAccessMemory() const {
     return paramHasAttr(0, ParamAttr::ReadNone);
   }
-  void setDoesNotAccessMemory(bool doesNotAccessMemory = true) {
-    if (doesNotAccessMemory) addParamAttr(0, ParamAttr::ReadNone);
+  void setDoesNotAccessMemory(bool DoesNotAccessMemory = true) {
+    if (DoesNotAccessMemory) addParamAttr(0, ParamAttr::ReadNone);
     else removeParamAttr(0, ParamAttr::ReadNone);
   }
 
@@ -195,8 +195,8 @@
   bool onlyReadsMemory() const {
     return doesNotAccessMemory() || paramHasAttr(0, ParamAttr::ReadOnly);
   }
-  void setOnlyReadsMemory(bool onlyReadsMemory = true) {
-    if (onlyReadsMemory) addParamAttr(0, ParamAttr::ReadOnly);
+  void setOnlyReadsMemory(bool OnlyReadsMemory = true) {
+    if (OnlyReadsMemory) addParamAttr(0, ParamAttr::ReadOnly);
     else removeParamAttr(0, ParamAttr::ReadOnly | ParamAttr::ReadNone);
   }
 
@@ -204,8 +204,8 @@
   bool doesNotReturn() const {
     return paramHasAttr(0, ParamAttr::NoReturn);
   }
-  void setDoesNotReturn(bool doesNotReturn = true) {
-    if (doesNotReturn) addParamAttr(0, ParamAttr::NoReturn);
+  void setDoesNotReturn(bool DoesNotReturn = true) {
+    if (DoesNotReturn) addParamAttr(0, ParamAttr::NoReturn);
     else removeParamAttr(0, ParamAttr::NoReturn);
   }
 
@@ -213,8 +213,8 @@
   bool doesNotThrow() const {
     return paramHasAttr(0, ParamAttr::NoUnwind);
   }
-  void setDoesNotThrow(bool doesNotThrow = true) {
-    if (doesNotThrow) addParamAttr(0, ParamAttr::NoUnwind);
+  void setDoesNotThrow(bool DoesNotThrow = true) {
+    if (DoesNotThrow) addParamAttr(0, ParamAttr::NoUnwind);
     else removeParamAttr(0, ParamAttr::NoUnwind);
   }
 

Modified: llvm/branches/Apple/Gaz/include/llvm/Support/Recycler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/include/llvm/Support/Recycler.h?rev=53428&r1=53427&r2=53428&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/include/llvm/Support/Recycler.h (original)
+++ llvm/branches/Apple/Gaz/include/llvm/Support/Recycler.h Thu Jul 10 17:52:10 2008
@@ -80,7 +80,7 @@
   }
 
   template<class SubClass, class AllocatorType>
-  void Deallocate(AllocatorType &Allocator, SubClass* Element) {
+  void Deallocate(AllocatorType & /*Allocator*/, SubClass* Element) {
     NodeTy *N = NodeTy::getNode(Element);
     assert(N->getPrev() == 0);
     assert(N->getNext() == 0);




From sabre at nondot.org  Thu Jul 10 18:46:13 2008
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 10 Jul 2008 23:46:13 -0000
Subject: [llvm-commits] [llvm] r53435 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Message-ID: <200807102346.m6ANkD5W005988@zion.cs.uiuc.edu>

Author: lattner
Date: Thu Jul 10 18:46:13 2008
New Revision: 53435

URL: http://llvm.org/viewvc/llvm-project?rev=53435&view=rev
Log:
Fix a bug in the soft-float handling of FCOPYSIGN that Duncan noticed
when working on legalizetypes.  Both legalizetypes and legalizeops now
produce hte same code for CodeGen/ARM/fcopysign.ll.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=53435&r1=53434&r2=53435&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Jul 10 18:46:13 2008
@@ -547,8 +547,11 @@
     SignBit = DAG.getNode(ISD::SRL, SrcNVT, SignBit,
                           DAG.getConstant(SizeDiff, TLI.getShiftAmountTy()));
     SignBit = DAG.getNode(ISD::TRUNCATE, NVT, SignBit);
-  } else if (SizeDiff < 0)
-    SignBit = DAG.getNode(ISD::SIGN_EXTEND, NVT, SignBit);
+  } else if (SizeDiff < 0) {
+    SignBit = DAG.getNode(ISD::ZERO_EXTEND, NVT, SignBit);
+    SignBit = DAG.getNode(ISD::SHL, NVT, SignBit,
+                          DAG.getConstant(-SizeDiff, TLI.getShiftAmountTy()));
+  }
 
   // Clear the sign bit of first operand.
   SDOperand Mask2 = (VT == MVT::f64)




From dalej at apple.com  Thu Jul 10 18:56:34 2008
From: dalej at apple.com (Dale Johannesen)
Date: Thu, 10 Jul 2008 23:56:34 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53436 -
	/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Message-ID: <200807102356.m6ANuY1i006358@zion.cs.uiuc.edu>

Author: johannes
Date: Thu Jul 10 18:56:33 2008
New Revision: 53436

URL: http://llvm.org/viewvc/llvm-project?rev=53436&view=rev
Log:
For MIN and MAX the type of the comparison comes
from the type of the result, not the type of the
operands.


Modified:
    llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp

Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=53436&r1=53435&r2=53436&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Thu Jul 10 18:56:33 2008
@@ -3383,7 +3383,7 @@
   Value *Compare;
   if (LHS->getType()->isFloatingPoint())
     Compare = Builder.CreateFCmp(FCmpInst::Predicate(FPPred), LHS, RHS);
-  else if TYPE_UNSIGNED(TREE_TYPE(TREE_OPERAND(exp, 0)))
+  else if (TYPE_UNSIGNED(TREE_TYPE(exp)))
     Compare = Builder.CreateICmp(ICmpInst::Predicate(UIPred), LHS, RHS);
   else
     Compare = Builder.CreateICmp(ICmpInst::Predicate(SIPred), LHS, RHS);




From evan.cheng at apple.com  Thu Jul 10 19:07:56 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 10 Jul 2008 17:07:56 -0700
Subject: [llvm-commits] [llvm] r53422 -
	/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
In-Reply-To: <200807102144.m6ALixZO001657@zion.cs.uiuc.edu>
References: <200807102144.m6ALixZO001657@zion.cs.uiuc.edu>
Message-ID: <89D86B02-D20B-448A-A4DD-09C8EF42FAA8@apple.com>

Cool. Can this be achieved with union + bitfields?

Evan

On Jul 10, 2008, at 2:44 PM, Dan Gohman wrote:

> Author: djg
> Date: Thu Jul 10 16:44:59 2008
> New Revision: 53422
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53422&view=rev
> Log:
> Add a SubclassData field to SDNode, similar to what's done
> in Value, to make use of some otherwise unused space. Use this
> field to shrink LoadSDNode and StoreSDNode by moving the
> addressing mode and ext/trunc fields there.
>
> Modified:
>    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
>
> Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=53422&r1=53421&r2=53422&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Thu Jul 10  
> 16:44:59 2008
> @@ -1032,8 +1032,15 @@
>
>   /// OperandsNeedDelete - This is true if OperandList was new[]'d.   
> If true,
>   /// then they will be delete[]'d when the node is destroyed.
> -  bool OperandsNeedDelete : 1;
> +  unsigned short OperandsNeedDelete : 1;
>
> +protected:
> +  /// SubclassData - This member is defined by this class, but is  
> not used for
> +  /// anything.  Subclasses can use it to hold whatever state they  
> find useful.
> +  /// This field is initialized to zero by the ctor.
> +  unsigned short SubclassData : 15;
> +
> +private:
>   /// NodeId - Unique id per SDNode in the DAG.
>   int NodeId;
>
> @@ -1248,8 +1255,8 @@
>   }
>
>   SDNode(unsigned Opc, SDVTList VTs, const SDOperand *Ops, unsigned  
> NumOps)
> -    : NodeType(Opc), NodeId(-1), Uses(NULL) {
> -    OperandsNeedDelete = true;
> +    : NodeType(Opc), OperandsNeedDelete(true), SubclassData(0),
> +      NodeId(-1), Uses(NULL) {
>     NumOperands = NumOps;
>     OperandList = NumOps ? new SDUse[NumOperands] : 0;
>
> @@ -1264,7 +1271,8 @@
>   }
>
>   SDNode(unsigned Opc, SDVTList VTs, const SDUse *Ops, unsigned  
> NumOps)
> -    : NodeType(Opc), NodeId(-1), Uses(NULL) {
> +    : NodeType(Opc), OperandsNeedDelete(true), SubclassData(0),
> +      NodeId(-1), Uses(NULL) {
>     OperandsNeedDelete = true;
>     NumOperands = NumOps;
>     OperandList = NumOps ? new SDUse[NumOperands] : 0;
> @@ -1279,9 +1287,11 @@
>     NumValues = VTs.NumVTs;
>   }
>
> +  /// This constructor adds no operands itself; operands can be
> +  /// set later with InitOperands.
>   SDNode(unsigned Opc, SDVTList VTs)
> -    : NodeType(Opc), NodeId(-1), Uses(NULL) {
> -    OperandsNeedDelete = false;  // Operands set with InitOperands.
> +    : NodeType(Opc), OperandsNeedDelete(false), SubclassData(0),
> +      NodeId(-1), Uses(NULL) {
>     NumOperands = 0;
>     OperandList = 0;
>     ValueList = VTs.VTs;
> @@ -2047,10 +2057,6 @@
> /// LSBaseSDNode - Base class for LoadSDNode and StoreSDNode
> ///
> class LSBaseSDNode : public MemSDNode {
> -private:
> -  // AddrMode - unindexed, pre-indexed, post-indexed.
> -  ISD::MemIndexedMode AddrMode;
> -
> protected:
>   //! Operand array for load and store
>   /*!
> @@ -2063,7 +2069,8 @@
>   LSBaseSDNode(ISD::NodeType NodeTy, SDOperand *Operands, unsigned  
> numOperands,
>                SDVTList VTs, ISD::MemIndexedMode AM, MVT VT,
>                const Value *SV, int SVO, unsigned Align, bool Vol)
> -    : MemSDNode(NodeTy, VTs, VT, SV, SVO, Align, Vol), AddrMode(AM) {
> +    : MemSDNode(NodeTy, VTs, VT, SV, SVO, Align, Vol) {
> +    SubclassData = AM;
>     for (unsigned i = 0; i != numOperands; ++i)
>       Ops[i] = Operands[i];
>     InitOperands(Ops, numOperands);
> @@ -2076,13 +2083,17 @@
>     return getOperand(getOpcode() == ISD::LOAD ? 2 : 3);
>   }
>
> -  ISD::MemIndexedMode getAddressingMode() const { return AddrMode; }
> +  /// getAddressingMode - Return the addressing mode for this load  
> or store:
> +  /// unindexed, pre-inc, pre-dec, post-inc, or post-dec.
> +  ISD::MemIndexedMode getAddressingMode() const {
> +    return ISD::MemIndexedMode(SubclassData & 7);
> +  }
>
>   /// isIndexed - Return true if this is a pre/post inc/dec load/ 
> store.
> -  bool isIndexed() const { return AddrMode != ISD::UNINDEXED; }
> +  bool isIndexed() const { return getAddressingMode() !=  
> ISD::UNINDEXED; }
>
>   /// isUnindexed - Return true if this is NOT a pre/post inc/dec  
> load/store.
> -  bool isUnindexed() const { return AddrMode == ISD::UNINDEXED; }
> +  bool isUnindexed() const { return getAddressingMode() ==  
> ISD::UNINDEXED; }
>
>   static bool classof(const LSBaseSDNode *) { return true; }
>   static bool classof(const SDNode *N) {
> @@ -2095,21 +2106,23 @@
> ///
> class LoadSDNode : public LSBaseSDNode {
>   virtual void ANCHOR();  // Out-of-line virtual method to give  
> class a home.
> -
> -  // ExtType - non-ext, anyext, sext, zext.
> -  ISD::LoadExtType ExtType;
> -
> protected:
>   friend class SelectionDAG;
>   LoadSDNode(SDOperand *ChainPtrOff, SDVTList VTs,
>              ISD::MemIndexedMode AM, ISD::LoadExtType ETy, MVT LVT,
>              const Value *SV, int O=0, unsigned Align=0, bool  
> Vol=false)
>     : LSBaseSDNode(ISD::LOAD, ChainPtrOff, 3,
> -                   VTs, AM, LVT, SV, O, Align, Vol),
> -      ExtType(ETy) {}
> +                   VTs, AM, LVT, SV, O, Align, Vol) {
> +    SubclassData |= (unsigned short)ETy << 3;
> +  }
> public:
>
> -  ISD::LoadExtType getExtensionType() const { return ExtType; }
> +  /// getExtensionType - Return whether this is a plain node,
> +  /// or one of the varieties of value-extending loads.
> +  ISD::LoadExtType getExtensionType() const {
> +    return ISD::LoadExtType((SubclassData >> 3) & 3);
> +  }
> +
>   const SDOperand &getBasePtr() const { return getOperand(1); }
>   const SDOperand &getOffset() const { return getOperand(2); }
>
> @@ -2123,22 +2136,22 @@
> ///
> class StoreSDNode : public LSBaseSDNode {
>   virtual void ANCHOR();  // Out-of-line virtual method to give  
> class a home.
> -
> -  // IsTruncStore - True if the op does a truncation before store.   
> For
> -  // integers this is the same as doing a TRUNCATE and storing the  
> result.
> -  // For floats, it is the same as doing an FP_ROUND and storing  
> the result.
> -  bool IsTruncStore;
> protected:
>   friend class SelectionDAG;
>   StoreSDNode(SDOperand *ChainValuePtrOff, SDVTList VTs,
>               ISD::MemIndexedMode AM, bool isTrunc, MVT SVT,
>               const Value *SV, int O=0, unsigned Align=0, bool  
> Vol=false)
>     : LSBaseSDNode(ISD::STORE, ChainValuePtrOff, 4,
> -                   VTs, AM, SVT, SV, O, Align, Vol),
> -      IsTruncStore(isTrunc) {}
> +                   VTs, AM, SVT, SV, O, Align, Vol) {
> +    SubclassData |= (unsigned short)isTrunc << 3;
> +  }
> public:
>
> -  bool isTruncatingStore() const { return IsTruncStore; }
> +  /// isTruncatingStore - Return true if the op does a truncation  
> before store.
> +  /// For integers this is the same as doing a TRUNCATE and storing  
> the result.
> +  /// For floats, it is the same as doing an FP_ROUND and storing  
> the result.
> +  bool isTruncatingStore() const { return (SubclassData >> 3) & 1; }
> +
>   const SDOperand &getValue() const { return getOperand(1); }
>   const SDOperand &getBasePtr() const { return getOperand(2); }
>   const SDOperand &getOffset() const { return getOperand(3); }
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From isanbard at gmail.com  Thu Jul 10 19:29:30 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Fri, 11 Jul 2008 00:29:30 -0000
Subject: [llvm-commits] [llvm] r53437 - /llvm/tags/Apple/llvmCore-2054/
Message-ID: <200807110029.m6B0TU5K007784@zion.cs.uiuc.edu>

Author: void
Date: Thu Jul 10 19:29:29 2008
New Revision: 53437

URL: http://llvm.org/viewvc/llvm-project?rev=53437&view=rev
Log:
Tagging Gaz to llvmCore-2054.

Added:
    llvm/tags/Apple/llvmCore-2054/
      - copied from r53436, llvm/branches/Apple/Gaz/



From sabre at nondot.org  Thu Jul 10 19:30:06 2008
From: sabre at nondot.org (Chris Lattner)
Date: Fri, 11 Jul 2008 00:30:06 -0000
Subject: [llvm-commits] [llvm] r53438 - in /llvm/trunk:
 lib/AsmParser/ParserInternals.h lib/AsmParser/llvmAsmParser.y
 test/Assembler/2008-07-10-APInt.ll
Message-ID: <200807110030.m6B0U6DA007815@zion.cs.uiuc.edu>

Author: lattner
Date: Thu Jul 10 19:30:06 2008
New Revision: 53438

URL: http://llvm.org/viewvc/llvm-project?rev=53438&view=rev
Log:
Implement PR2538

Added:
    llvm/trunk/test/Assembler/2008-07-10-APInt.ll
Modified:
    llvm/trunk/lib/AsmParser/ParserInternals.h
    llvm/trunk/lib/AsmParser/llvmAsmParser.y

Modified: llvm/trunk/lib/AsmParser/ParserInternals.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/ParserInternals.h?rev=53438&r1=53437&r2=53438&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/ParserInternals.h (original)
+++ llvm/trunk/lib/AsmParser/ParserInternals.h Thu Jul 10 19:30:06 2008
@@ -23,6 +23,7 @@
 #include "llvm/Assembly/Parser.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/APFloat.h"
+#include "llvm/ADT/APSInt.h"
 namespace llvm { class MemoryBuffer; }
 
 // Global variables exported from the lexer...
@@ -72,16 +73,17 @@
 struct ValID {
   enum {
     LocalID, GlobalID, LocalName, GlobalName,
-    ConstSIntVal, ConstUIntVal, ConstFPVal, ConstNullVal,
+    ConstSIntVal, ConstUIntVal, ConstAPInt, ConstFPVal, ConstNullVal,
     ConstUndefVal, ConstZeroVal, ConstantVal, InlineAsmVal
   } Type;
 
   union {
-    unsigned Num;         // If it's a numeric reference like %1234
+    unsigned Num;            // If it's a numeric reference like %1234
     std::string *Name;    // If it's a named reference.  Memory must be deleted.
-    int64_t  ConstPool64; // Constant pool reference.  This is the value
-    uint64_t UConstPool64;// Unsigned constant pool reference.
-    APFloat *ConstPoolFP; // Floating point constant pool reference
+    int64_t  ConstPool64;    // Constant pool reference.  This is the value
+    uint64_t UConstPool64;   // Unsigned constant pool reference.
+    APSInt *ConstPoolInt;     // Large Integer constant pool reference
+    APFloat *ConstPoolFP;    // Floating point constant pool reference
     Constant *ConstantValue; // Fully resolved constant for ConstantVal case.
     InlineAsmDescriptor *IAD;
  };
@@ -110,7 +112,14 @@
   static ValID create(APFloat *Val) {
     ValID D; D.Type = ConstFPVal; D.ConstPoolFP = Val; return D;
   }
-
+  
+  static ValID create(const APInt &Val, bool isSigned) {
+    ValID D; D.Type = ConstAPInt;
+    D.ConstPoolInt = new APSInt(Val, !isSigned);
+    return D;
+  }
+  
+  
   static ValID createNull() {
     ValID D; D.Type = ConstNullVal; return D;
   }
@@ -141,11 +150,16 @@
       delete Name;    // Free this strdup'd memory.
     else if (Type == InlineAsmVal)
       delete IAD;
+    else if (Type == ConstAPInt)
+      delete ConstPoolInt;
   }
 
   inline ValID copy() const {
-    if (Type != LocalName && Type != GlobalName) return *this;
     ValID Result = *this;
+    if (Type == ConstAPInt)
+      Result.ConstPoolInt = new APSInt(*ConstPoolInt);
+    
+    if (Type != LocalName && Type != GlobalName) return Result;
     Result.Name = new std::string(*Name);
     return Result;
   }
@@ -156,6 +170,7 @@
     case GlobalID      : return '@' + utostr(Num);
     case LocalName     : return *Name;
     case GlobalName    : return *Name;
+    case ConstAPInt    : return ConstPoolInt->toString();
     case ConstFPVal    : return ftostr(*ConstPoolFP);
     case ConstNullVal  : return "null";
     case ConstUndefVal : return "undef";
@@ -182,6 +197,7 @@
     case GlobalName:    return *Name < *V.Name;
     case ConstSIntVal:  return ConstPool64  < V.ConstPool64;
     case ConstUIntVal:  return UConstPool64 < V.UConstPool64;
+    case ConstAPInt    : return ConstPoolInt->ult(*V.ConstPoolInt);
     case ConstFPVal:    return ConstPoolFP->compare(*V.ConstPoolFP) ==
                                APFloat::cmpLessThan;
     case ConstNullVal:  return false;
@@ -193,24 +209,24 @@
   }
 
   bool operator==(const ValID &V) const {
-    if (Type == V.Type) {
-      switch (Type) {
-        case LocalID:
-        case GlobalID: return Num == V.Num;
-        case LocalName:
-        case GlobalName: return *Name == *(V.Name);
-        case ConstSIntVal:  return ConstPool64  == V.ConstPool64;
-        case ConstUIntVal:  return UConstPool64 == V.UConstPool64;
-        case ConstFPVal:    return ConstPoolFP->compare(*V.ConstPoolFP) == 
-                                   APFloat::cmpEqual;
-        case ConstantVal:   return ConstantValue == V.ConstantValue;
-        case ConstNullVal:  return true;
-        case ConstUndefVal: return true;
-        case ConstZeroVal:  return true;
-        default:  assert(0 && "Unknown value type!"); return false;
-      }
+    if (Type != V.Type) return false;
+    
+    switch (Type) {
+    default:  assert(0 && "Unknown value type!");
+    case LocalID:
+    case GlobalID: return Num == V.Num;
+    case LocalName:
+    case GlobalName: return *Name == *(V.Name);
+    case ConstSIntVal:  return ConstPool64  == V.ConstPool64;
+    case ConstUIntVal:  return UConstPool64 == V.UConstPool64;
+    case ConstAPInt:    return *ConstPoolInt == *V.ConstPoolInt;
+    case ConstFPVal:    return ConstPoolFP->compare(*V.ConstPoolFP) == 
+                               APFloat::cmpEqual;
+    case ConstantVal:   return ConstantValue == V.ConstantValue;
+    case ConstNullVal:  return true;
+    case ConstUndefVal: return true;
+    case ConstZeroVal:  return true;
     }
-    return false;
   }
 };
 

Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y?rev=53438&r1=53437&r2=53438&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/llvmAsmParser.y (original)
+++ llvm/trunk/lib/AsmParser/llvmAsmParser.y Thu Jul 10 19:30:06 2008
@@ -402,6 +402,20 @@
     // This is really a signed reference.  Transmogrify.
     return ConstantInt::get(Ty, D.ConstPool64, true);
 
+  case ValID::ConstAPInt:     // Is it an unsigned const pool reference?
+    if (!isa<IntegerType>(Ty)) {
+      GenerateError("Integral constant '" + D.getName() +
+                    "' is invalid or out of range for type '" +
+                    Ty->getDescription() + "'");
+      return 0;
+    }
+      
+    {
+      APSInt Tmp = *D.ConstPoolInt;
+      Tmp.extOrTrunc(Ty->getPrimitiveSizeInBits());
+      return ConstantInt::get(Tmp);
+    }
+      
   case ValID::ConstFPVal:        // Is it a floating point const pool reference?
     if (!Ty->isFloatingPoint() ||
         !ConstantFP::isValueValidForType(Ty, *D.ConstPoolFP)) {
@@ -2453,6 +2467,16 @@
     $$ = ValID::create($1);
     CHECK_FOR_ERROR
   }
+  | ESAPINTVAL {      // arbitrary precision integer constants
+    $$ = ValID::create(*$1, true);
+    delete $1;
+    CHECK_FOR_ERROR
+  }  
+  | EUAPINTVAL {      // arbitrary precision integer constants
+    $$ = ValID::create(*$1, false);
+    delete $1;
+    CHECK_FOR_ERROR
+  }
   | FPVAL {                     // Perhaps it's an FP constant?
     $$ = ValID::create($1);
     CHECK_FOR_ERROR

Added: llvm/trunk/test/Assembler/2008-07-10-APInt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/2008-07-10-APInt.ll?rev=53438&view=auto

==============================================================================
--- llvm/trunk/test/Assembler/2008-07-10-APInt.ll (added)
+++ llvm/trunk/test/Assembler/2008-07-10-APInt.ll Thu Jul 10 19:30:06 2008
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llvm-dis
+; PR2538
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+
+define i128 @a() {
+        ret i128 18446744073709551616
+}
+




From isanbard at gmail.com  Thu Jul 10 19:30:11 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Fri, 11 Jul 2008 00:30:11 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53439 -
	/llvm-gcc-4.2/tags/Apple/llvmgcc42-2054/
Message-ID: <200807110030.m6B0UBhq007827@zion.cs.uiuc.edu>

Author: void
Date: Thu Jul 10 19:30:11 2008
New Revision: 53439

URL: http://llvm.org/viewvc/llvm-project?rev=53439&view=rev
Log:
Copying Gaz to llvmgcc42-2054.

Added:
    llvm-gcc-4.2/tags/Apple/llvmgcc42-2054/
      - copied from r53437, llvm-gcc-4.2/branches/Apple/Gaz/



From sabre at nondot.org  Thu Jul 10 19:30:39 2008
From: sabre at nondot.org (Chris Lattner)
Date: Fri, 11 Jul 2008 00:30:39 -0000
Subject: [llvm-commits] [llvm] r53440 - in /llvm/trunk/lib/AsmParser:
 llvmAsmParser.cpp.cvs llvmAsmParser.h.cvs llvmAsmParser.y.cvs
Message-ID: <200807110030.m6B0Udk2007856@zion.cs.uiuc.edu>

Author: lattner
Date: Thu Jul 10 19:30:39 2008
New Revision: 53440

URL: http://llvm.org/viewvc/llvm-project?rev=53440&view=rev
Log:
regenerate

Modified:
    llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs
    llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs
    llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs

Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs?rev=53440&r1=53439&r2=53440&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs (original)
+++ llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs Thu Jul 10 19:30:39 2008
@@ -388,7 +388,7 @@
 
 
 /* Copy the first part of user declarations.  */
-#line 14 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 14 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 
 #include "ParserInternals.h"
 #include "llvm/CallingConv.h"
@@ -780,6 +780,20 @@
     // This is really a signed reference.  Transmogrify.
     return ConstantInt::get(Ty, D.ConstPool64, true);
 
+  case ValID::ConstAPInt:     // Is it an unsigned const pool reference?
+    if (!isa<IntegerType>(Ty)) {
+      GenerateError("Integral constant '" + D.getName() +
+                    "' is invalid or out of range for type '" +
+                    Ty->getDescription() + "'");
+      return 0;
+    }
+      
+    {
+      APSInt Tmp = *D.ConstPoolInt;
+      Tmp.extOrTrunc(Ty->getPrimitiveSizeInBits());
+      return ConstantInt::get(Tmp);
+    }
+      
   case ValID::ConstFPVal:        // Is it a floating point const pool reference?
     if (!Ty->isFloatingPoint() ||
         !ConstantFP::isValueValidForType(Ty, *D.ConstPoolFP)) {
@@ -1348,7 +1362,7 @@
 
 #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
 typedef union YYSTYPE
-#line 953 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 967 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   llvm::Module                           *ModuleVal;
   llvm::Function                         *FunctionVal;
@@ -1397,7 +1411,7 @@
   llvm::FCmpInst::Predicate         FPredicate;
 }
 /* Line 193 of yacc.c.  */
-#line 1401 "llvmAsmParser.tab.c"
+#line 1415 "llvmAsmParser.tab.c"
 	YYSTYPE;
 # define yystype YYSTYPE /* obsolescent; will be withdrawn */
 # define YYSTYPE_IS_DECLARED 1
@@ -1410,7 +1424,7 @@
 
 
 /* Line 216 of yacc.c.  */
-#line 1414 "llvmAsmParser.tab.c"
+#line 1428 "llvmAsmParser.tab.c"
 
 #ifdef short
 # undef short
@@ -1625,16 +1639,16 @@
 /* YYFINAL -- State number of the termination state.  */
 #define YYFINAL  44
 /* YYLAST -- Last index in YYTABLE.  */
-#define YYLAST   2339
+#define YYLAST   2360
 
 /* YYNTOKENS -- Number of terminals.  */
 #define YYNTOKENS  170
 /* YYNNTS -- Number of nonterminals.  */
 #define YYNNTS  86
 /* YYNRULES -- Number of rules.  */
-#define YYNRULES  340
+#define YYNRULES  342
 /* YYNRULES -- Number of states.  */
-#define YYNSTATES  699
+#define YYNSTATES  701
 
 /* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX.  */
 #define YYUNDEFTOK  2
@@ -1721,15 +1735,15 @@
      649,   652,   656,   658,   662,   666,   670,   674,   676,   677,
      683,   687,   689,   693,   695,   696,   707,   709,   711,   716,
      718,   720,   723,   727,   728,   730,   732,   734,   736,   738,
-     740,   742,   744,   746,   750,   754,   757,   760,   764,   767,
-     773,   778,   780,   786,   788,   790,   792,   794,   796,   798,
-     801,   803,   807,   810,   813,   817,   820,   821,   823,   826,
-     829,   833,   843,   853,   862,   877,   879,   881,   888,   894,
-     897,   904,   912,   917,   922,   929,   936,   937,   938,   942,
-     945,   949,   952,   954,   960,   966,   973,   980,   987,   994,
-     999,  1006,  1011,  1016,  1023,  1030,  1033,  1042,  1044,  1046,
-    1047,  1051,  1058,  1062,  1069,  1072,  1078,  1086,  1092,  1097,
-    1102
+     740,   742,   744,   746,   748,   750,   754,   758,   761,   764,
+     768,   771,   777,   782,   784,   790,   792,   794,   796,   798,
+     800,   802,   805,   807,   811,   814,   817,   821,   824,   825,
+     827,   830,   833,   837,   847,   857,   866,   881,   883,   885,
+     892,   898,   901,   908,   916,   921,   926,   933,   940,   941,
+     942,   946,   949,   953,   956,   958,   964,   970,   977,   984,
+     991,   998,  1003,  1010,  1015,  1020,  1027,  1034,  1037,  1046,
+    1048,  1050,  1051,  1055,  1062,  1066,  1073,  1076,  1082,  1090,
+    1096,  1101,  1106
 };
 
 /* YYRHS -- A `-1'-separated list of the rules' RHS.  */
@@ -1808,84 +1822,85 @@
      229,   157,   195,   200,   197,   196,    -1,    28,    -1,   167,
       -1,   189,   187,   230,   231,    -1,    29,    -1,   168,    -1,
      242,   233,    -1,   188,   187,   230,    -1,    -1,    61,    -1,
-       3,    -1,     4,    -1,     9,    -1,    26,    -1,    27,    -1,
-      40,    -1,    41,    -1,    25,    -1,   165,   212,   166,    -1,
-     162,   212,   164,    -1,   162,   164,    -1,   169,    22,    -1,
-     167,   212,   168,    -1,   167,   168,    -1,   165,   167,   212,
-     168,   166,    -1,   165,   167,   168,   166,    -1,   211,    -1,
-      59,   236,    22,   159,    22,    -1,     7,    -1,     8,    -1,
-     178,    -1,   182,    -1,   238,    -1,   237,    -1,   204,   239,
-      -1,   240,    -1,   241,   159,   240,    -1,   242,   243,    -1,
-     232,   243,    -1,   244,   181,   245,    -1,   244,   247,    -1,
-      -1,    21,    -1,    69,   241,    -1,    69,    10,    -1,    70,
-      17,   239,    -1,    70,    11,   239,   159,    17,   239,   159,
-      17,   239,    -1,    71,   176,   239,   159,    17,   239,   162,
-     246,   164,    -1,    71,   176,   239,   159,    17,   239,   162,
-     164,    -1,    72,   191,   206,   239,   156,   249,   157,   195,
-      38,    17,   239,    73,    17,   239,    -1,    73,    -1,    74,
-      -1,   246,   176,   237,   159,    17,   239,    -1,   176,   237,
-     159,    17,   239,    -1,   181,   253,    -1,   204,   162,   239,
-     159,   239,   164,    -1,   248,   159,   162,   239,   159,   239,
-     164,    -1,   204,   193,   239,   193,    -1,    17,   193,   239,
-     193,    -1,   249,   159,   204,   193,   239,   193,    -1,   249,
-     159,    17,   193,   239,   193,    -1,    -1,    -1,   250,   159,
-     240,    -1,   159,     4,    -1,   251,   159,     4,    -1,    58,
-      57,    -1,    57,    -1,   171,   204,   239,   159,   239,    -1,
-     172,   204,   239,   159,   239,    -1,    90,   174,   204,   239,
-     159,   239,    -1,    91,   175,   204,   239,   159,   239,    -1,
-      92,   174,   204,   239,   159,   239,    -1,    93,   175,   204,
-     239,   159,   239,    -1,   173,   240,    38,   204,    -1,   133,
-     240,   159,   240,   159,   240,    -1,   134,   240,   159,   204,
-      -1,   135,   240,   159,   240,    -1,   136,   240,   159,   240,
-     159,   240,    -1,   137,   240,   159,   240,   159,   240,    -1,
-     132,   248,    -1,   252,   191,   206,   239,   156,   249,   157,
-     195,    -1,   255,    -1,    36,    -1,    -1,   114,   204,   198,
-      -1,   114,   204,   159,    11,   239,   198,    -1,   115,   204,
-     198,    -1,   115,   204,   159,    11,   239,   198,    -1,   116,
-     240,    -1,   254,   117,   204,   239,   198,    -1,   254,   118,
-     240,   159,   204,   239,   198,    -1,   138,   204,   239,   159,
-       4,    -1,   119,   204,   239,   250,    -1,   139,   204,   239,
-     251,    -1,   140,   204,   239,   159,   204,   239,   251,    -1
+       3,    -1,     4,    -1,     5,    -1,     6,    -1,     9,    -1,
+      26,    -1,    27,    -1,    40,    -1,    41,    -1,    25,    -1,
+     165,   212,   166,    -1,   162,   212,   164,    -1,   162,   164,
+      -1,   169,    22,    -1,   167,   212,   168,    -1,   167,   168,
+      -1,   165,   167,   212,   168,   166,    -1,   165,   167,   168,
+     166,    -1,   211,    -1,    59,   236,    22,   159,    22,    -1,
+       7,    -1,     8,    -1,   178,    -1,   182,    -1,   238,    -1,
+     237,    -1,   204,   239,    -1,   240,    -1,   241,   159,   240,
+      -1,   242,   243,    -1,   232,   243,    -1,   244,   181,   245,
+      -1,   244,   247,    -1,    -1,    21,    -1,    69,   241,    -1,
+      69,    10,    -1,    70,    17,   239,    -1,    70,    11,   239,
+     159,    17,   239,   159,    17,   239,    -1,    71,   176,   239,
+     159,    17,   239,   162,   246,   164,    -1,    71,   176,   239,
+     159,    17,   239,   162,   164,    -1,    72,   191,   206,   239,
+     156,   249,   157,   195,    38,    17,   239,    73,    17,   239,
+      -1,    73,    -1,    74,    -1,   246,   176,   237,   159,    17,
+     239,    -1,   176,   237,   159,    17,   239,    -1,   181,   253,
+      -1,   204,   162,   239,   159,   239,   164,    -1,   248,   159,
+     162,   239,   159,   239,   164,    -1,   204,   193,   239,   193,
+      -1,    17,   193,   239,   193,    -1,   249,   159,   204,   193,
+     239,   193,    -1,   249,   159,    17,   193,   239,   193,    -1,
+      -1,    -1,   250,   159,   240,    -1,   159,     4,    -1,   251,
+     159,     4,    -1,    58,    57,    -1,    57,    -1,   171,   204,
+     239,   159,   239,    -1,   172,   204,   239,   159,   239,    -1,
+      90,   174,   204,   239,   159,   239,    -1,    91,   175,   204,
+     239,   159,   239,    -1,    92,   174,   204,   239,   159,   239,
+      -1,    93,   175,   204,   239,   159,   239,    -1,   173,   240,
+      38,   204,    -1,   133,   240,   159,   240,   159,   240,    -1,
+     134,   240,   159,   204,    -1,   135,   240,   159,   240,    -1,
+     136,   240,   159,   240,   159,   240,    -1,   137,   240,   159,
+     240,   159,   240,    -1,   132,   248,    -1,   252,   191,   206,
+     239,   156,   249,   157,   195,    -1,   255,    -1,    36,    -1,
+      -1,   114,   204,   198,    -1,   114,   204,   159,    11,   239,
+     198,    -1,   115,   204,   198,    -1,   115,   204,   159,    11,
+     239,   198,    -1,   116,   240,    -1,   254,   117,   204,   239,
+     198,    -1,   254,   118,   240,   159,   204,   239,   198,    -1,
+     138,   204,   239,   159,     4,    -1,   119,   204,   239,   250,
+      -1,   139,   204,   239,   251,    -1,   140,   204,   239,   159,
+     204,   239,   251,    -1
 };
 
 /* YYRLINE[YYN] -- source line where rule number YYN was defined.  */
 static const yytype_uint16 yyrline[] =
 {
-       0,  1118,  1118,  1118,  1118,  1118,  1118,  1118,  1118,  1118,
-    1118,  1119,  1119,  1119,  1119,  1119,  1119,  1120,  1120,  1120,
-    1120,  1120,  1120,  1121,  1121,  1121,  1121,  1121,  1121,  1124,
-    1124,  1125,  1125,  1126,  1126,  1127,  1127,  1128,  1128,  1132,
-    1132,  1133,  1133,  1134,  1134,  1135,  1135,  1136,  1136,  1137,
-    1137,  1138,  1138,  1139,  1140,  1145,  1146,  1146,  1146,  1146,
-    1146,  1148,  1148,  1148,  1149,  1149,  1151,  1152,  1156,  1160,
-    1165,  1165,  1167,  1168,  1173,  1179,  1180,  1181,  1182,  1183,
-    1184,  1188,  1189,  1190,  1194,  1195,  1196,  1197,  1201,  1202,
-    1203,  1207,  1208,  1209,  1210,  1211,  1215,  1216,  1217,  1220,
-    1221,  1222,  1223,  1224,  1225,  1226,  1233,  1234,  1235,  1236,
-    1237,  1238,  1239,  1240,  1241,  1242,  1246,  1247,  1252,  1253,
-    1254,  1255,  1256,  1257,  1260,  1261,  1266,  1267,  1274,  1275,
-    1281,  1282,  1291,  1299,  1300,  1305,  1306,  1307,  1312,  1325,
-    1325,  1325,  1325,  1325,  1325,  1325,  1328,  1332,  1336,  1343,
-    1348,  1356,  1385,  1410,  1415,  1425,  1435,  1439,  1449,  1456,
-    1465,  1472,  1477,  1482,  1489,  1490,  1497,  1504,  1512,  1518,
-    1530,  1558,  1574,  1601,  1629,  1655,  1675,  1701,  1721,  1733,
-    1740,  1806,  1816,  1826,  1832,  1842,  1848,  1858,  1864,  1870,
-    1883,  1895,  1916,  1924,  1930,  1941,  1946,  1951,  1956,  1961,
-    1967,  1973,  1979,  1987,  1998,  2002,  2010,  2010,  2013,  2013,
-    2016,  2028,  2049,  2054,  2062,  2063,  2067,  2067,  2071,  2071,
-    2074,  2077,  2101,  2113,  2112,  2124,  2123,  2133,  2132,  2143,
-    2183,  2186,  2192,  2202,  2206,  2211,  2213,  2218,  2223,  2232,
-    2242,  2253,  2257,  2266,  2275,  2280,  2409,  2409,  2411,  2420,
-    2420,  2422,  2427,  2439,  2443,  2448,  2452,  2456,  2460,  2464,
-    2468,  2472,  2476,  2480,  2502,  2524,  2530,  2543,  2555,  2560,
-    2572,  2578,  2582,  2592,  2596,  2600,  2605,  2612,  2612,  2618,
-    2627,  2632,  2637,  2641,  2650,  2659,  2668,  2672,  2680,  2687,
-    2691,  2696,  2707,  2726,  2735,  2821,  2825,  2832,  2843,  2856,
-    2866,  2877,  2887,  2898,  2906,  2916,  2923,  2926,  2927,  2935,
-    2941,  2950,  2954,  2959,  2975,  2992,  3006,  3020,  3034,  3048,
-    3060,  3068,  3075,  3081,  3087,  3093,  3108,  3198,  3203,  3207,
-    3214,  3221,  3231,  3238,  3248,  3256,  3270,  3287,  3295,  3310,
-    3325
+       0,  1132,  1132,  1132,  1132,  1132,  1132,  1132,  1132,  1132,
+    1132,  1133,  1133,  1133,  1133,  1133,  1133,  1134,  1134,  1134,
+    1134,  1134,  1134,  1135,  1135,  1135,  1135,  1135,  1135,  1138,
+    1138,  1139,  1139,  1140,  1140,  1141,  1141,  1142,  1142,  1146,
+    1146,  1147,  1147,  1148,  1148,  1149,  1149,  1150,  1150,  1151,
+    1151,  1152,  1152,  1153,  1154,  1159,  1160,  1160,  1160,  1160,
+    1160,  1162,  1162,  1162,  1163,  1163,  1165,  1166,  1170,  1174,
+    1179,  1179,  1181,  1182,  1187,  1193,  1194,  1195,  1196,  1197,
+    1198,  1202,  1203,  1204,  1208,  1209,  1210,  1211,  1215,  1216,
+    1217,  1221,  1222,  1223,  1224,  1225,  1229,  1230,  1231,  1234,
+    1235,  1236,  1237,  1238,  1239,  1240,  1247,  1248,  1249,  1250,
+    1251,  1252,  1253,  1254,  1255,  1256,  1260,  1261,  1266,  1267,
+    1268,  1269,  1270,  1271,  1274,  1275,  1280,  1281,  1288,  1289,
+    1295,  1296,  1305,  1313,  1314,  1319,  1320,  1321,  1326,  1339,
+    1339,  1339,  1339,  1339,  1339,  1339,  1342,  1346,  1350,  1357,
+    1362,  1370,  1399,  1424,  1429,  1439,  1449,  1453,  1463,  1470,
+    1479,  1486,  1491,  1496,  1503,  1504,  1511,  1518,  1526,  1532,
+    1544,  1572,  1588,  1615,  1643,  1669,  1689,  1715,  1735,  1747,
+    1754,  1820,  1830,  1840,  1846,  1856,  1862,  1872,  1878,  1884,
+    1897,  1909,  1930,  1938,  1944,  1955,  1960,  1965,  1970,  1975,
+    1981,  1987,  1993,  2001,  2012,  2016,  2024,  2024,  2027,  2027,
+    2030,  2042,  2063,  2068,  2076,  2077,  2081,  2081,  2085,  2085,
+    2088,  2091,  2115,  2127,  2126,  2138,  2137,  2147,  2146,  2157,
+    2197,  2200,  2206,  2216,  2220,  2225,  2227,  2232,  2237,  2246,
+    2256,  2267,  2271,  2280,  2289,  2294,  2423,  2423,  2425,  2434,
+    2434,  2436,  2441,  2453,  2457,  2462,  2466,  2470,  2475,  2480,
+    2484,  2488,  2492,  2496,  2500,  2504,  2526,  2548,  2554,  2567,
+    2579,  2584,  2596,  2602,  2606,  2616,  2620,  2624,  2629,  2636,
+    2636,  2642,  2651,  2656,  2661,  2665,  2674,  2683,  2692,  2696,
+    2704,  2711,  2715,  2720,  2731,  2750,  2759,  2845,  2849,  2856,
+    2867,  2880,  2890,  2901,  2911,  2922,  2930,  2940,  2947,  2950,
+    2951,  2959,  2965,  2974,  2978,  2983,  2999,  3016,  3030,  3044,
+    3058,  3072,  3084,  3092,  3099,  3105,  3111,  3117,  3132,  3222,
+    3227,  3231,  3238,  3245,  3255,  3262,  3272,  3280,  3294,  3311,
+    3319,  3334,  3349
 };
 #endif
 
@@ -1997,14 +2012,14 @@
      228,   229,   229,   229,   229,   230,   231,   231,   232,   233,
      233,   234,   235,   236,   236,   237,   237,   237,   237,   237,
      237,   237,   237,   237,   237,   237,   237,   237,   237,   237,
-     237,   237,   237,   238,   238,   238,   238,   239,   239,   240,
-     241,   241,   242,   242,   243,   244,   244,   244,   245,   245,
-     245,   245,   245,   245,   245,   245,   245,   246,   246,   247,
-     248,   248,   249,   249,   249,   249,   249,   250,   250,   251,
-     251,   252,   252,   253,   253,   253,   253,   253,   253,   253,
-     253,   253,   253,   253,   253,   253,   253,   253,   254,   254,
-     255,   255,   255,   255,   255,   255,   255,   255,   255,   255,
-     255
+     237,   237,   237,   237,   237,   238,   238,   238,   238,   239,
+     239,   240,   241,   241,   242,   242,   243,   244,   244,   244,
+     245,   245,   245,   245,   245,   245,   245,   245,   245,   246,
+     246,   247,   248,   248,   249,   249,   249,   249,   249,   250,
+     250,   251,   251,   252,   252,   253,   253,   253,   253,   253,
+     253,   253,   253,   253,   253,   253,   253,   253,   253,   253,
+     254,   254,   255,   255,   255,   255,   255,   255,   255,   255,
+     255,   255,   255
 };
 
 /* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN.  */
@@ -2036,15 +2051,15 @@
        2,     3,     1,     3,     3,     3,     3,     1,     0,     5,
        3,     1,     3,     1,     0,    10,     1,     1,     4,     1,
        1,     2,     3,     0,     1,     1,     1,     1,     1,     1,
-       1,     1,     1,     3,     3,     2,     2,     3,     2,     5,
-       4,     1,     5,     1,     1,     1,     1,     1,     1,     2,
-       1,     3,     2,     2,     3,     2,     0,     1,     2,     2,
-       3,     9,     9,     8,    14,     1,     1,     6,     5,     2,
-       6,     7,     4,     4,     6,     6,     0,     0,     3,     2,
-       3,     2,     1,     5,     5,     6,     6,     6,     6,     4,
-       6,     4,     4,     6,     6,     2,     8,     1,     1,     0,
-       3,     6,     3,     6,     2,     5,     7,     5,     4,     4,
-       7
+       1,     1,     1,     1,     1,     3,     3,     2,     2,     3,
+       2,     5,     4,     1,     5,     1,     1,     1,     1,     1,
+       1,     2,     1,     3,     2,     2,     3,     2,     0,     1,
+       2,     2,     3,     9,     9,     8,    14,     1,     1,     6,
+       5,     2,     6,     7,     4,     4,     6,     6,     0,     0,
+       3,     2,     3,     2,     1,     5,     5,     6,     6,     6,
+       6,     4,     6,     4,     4,     6,     6,     2,     8,     1,
+       1,     0,     3,     6,     3,     6,     2,     5,     7,     5,
+       4,     4,     7
 };
 
 /* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
@@ -2057,176 +2072,178 @@
       91,     0,     0,   230,     0,     0,    68,     0,    74,    75,
       77,    76,    78,    81,    79,    82,    80,    83,    85,    86,
       87,    84,    84,   209,     1,   215,    89,    90,    84,   219,
-      92,    93,    94,    95,    84,   286,   217,   286,     0,     0,
-     238,   231,   232,   220,   273,   274,   222,   139,   140,   141,
-     144,   143,   142,   145,   146,     0,     0,     0,     0,   275,
-     276,   147,   221,   149,   209,   209,    96,   208,     0,    99,
-      99,   287,   283,    69,   249,   250,   251,   282,   233,   234,
+      92,    93,    94,    95,    84,   288,   217,   288,     0,     0,
+     238,   231,   232,   220,   275,   276,   222,   139,   140,   141,
+     144,   143,   142,   145,   146,     0,     0,     0,     0,   277,
+     278,   147,   221,   149,   209,   209,    96,   208,     0,    99,
+      99,   289,   285,    69,   249,   250,   251,   284,   233,   234,
      237,     0,   167,   150,     0,     0,     0,     0,   156,   168,
        0,     0,   167,     0,     0,     0,    98,    97,     0,   206,
      207,     0,     0,   100,   101,   102,   103,   104,     0,   252,
-       0,   329,   285,     0,   235,   166,   116,   162,   164,     0,
+       0,   331,   287,     0,   235,   166,   116,   162,   164,     0,
        0,     0,     0,     0,     0,   155,     0,     0,   148,     0,
        0,   161,     0,   160,     0,   229,   139,   140,   141,   144,
      143,   142,     0,     0,    67,    67,   105,     0,   246,   247,
-     248,   328,   312,     0,     0,     0,     0,    99,   295,   296,
+     248,   330,   314,     0,     0,     0,     0,    99,   297,   298,
        2,     3,     4,     5,     6,     7,     8,     9,    10,    14,
       15,    16,    11,    12,    13,     0,     0,     0,     0,     0,
        0,     0,     0,    17,    18,    19,    20,    21,    22,    23,
       24,    25,    26,    27,    28,     0,     0,     0,     0,     0,
-       0,     0,     0,     0,     0,     0,     0,   284,    99,   299,
-       0,   327,   236,   159,     0,   124,    67,    67,   158,     0,
+       0,     0,     0,     0,     0,     0,     0,   286,    99,   301,
+       0,   329,   236,   159,     0,   124,    67,    67,   158,     0,
      169,     0,   124,    67,    67,     0,   210,   187,   188,   183,
      185,   184,   186,   189,   182,   178,   179,     0,     0,     0,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-       0,     0,     0,     0,     0,   181,   180,   223,     0,   311,
-     289,    67,   280,   288,     0,     0,    55,     0,     0,    29,
+       0,     0,     0,     0,     0,   181,   180,   223,     0,   313,
+     291,    67,   282,   290,     0,     0,    55,     0,     0,    29,
       30,    31,    32,    33,    34,    35,    36,    37,    38,     0,
       53,    54,    49,    50,    51,    52,    39,    40,    41,    42,
       43,    44,    45,    46,    47,    48,     0,     0,     0,   130,
-     130,   334,    67,    67,   325,     0,     0,     0,     0,     0,
+     130,   336,    67,    67,   327,     0,     0,     0,     0,     0,
       67,    67,    67,    67,    67,     0,     0,     0,     0,     0,
      107,   109,   108,   106,   110,   111,   112,   113,   114,   117,
      165,   163,   152,   153,   154,   157,    66,   151,   225,   227,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
        0,     0,   171,   205,     0,     0,     0,   175,     0,   172,
-       0,     0,     0,   135,   244,   255,   256,   257,   262,   258,
-     259,   260,   261,   253,     0,     0,     0,     0,   271,   278,
-     277,   279,     0,     0,   290,     0,     0,    67,    67,    67,
-      67,     0,   330,     0,   332,   307,     0,     0,     0,     0,
+       0,     0,     0,   135,   244,   255,   256,   257,   258,   259,
+     264,   260,   261,   262,   263,   253,     0,     0,     0,     0,
+     273,   280,   279,   281,     0,     0,   292,     0,     0,    67,
+      67,    67,    67,     0,   332,     0,   334,   309,     0,     0,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-      67,     0,   115,   121,   120,   118,   119,   122,   123,   125,
-     135,   135,     0,     0,     0,     0,     0,   307,     0,     0,
-       0,     0,     0,     0,     0,   170,   156,   168,     0,   173,
-     174,     0,     0,     0,     0,   224,   243,   116,   241,     0,
-     254,     0,   265,     0,     0,     0,   268,     0,   266,   281,
-       0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-     338,     0,     0,     0,   321,   322,     0,     0,     0,     0,
-     339,     0,     0,     0,   319,     0,   130,     0,   226,   228,
-      67,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-       0,     0,   204,   177,     0,     0,     0,     0,     0,     0,
-     137,   135,    65,     0,   124,     0,   264,   156,     0,   263,
-     267,     0,     0,   306,     0,     0,     0,     0,   130,   131,
-     130,     0,     0,     0,     0,     0,     0,   337,   309,     0,
-      67,   313,   314,   306,     0,   335,    67,   211,     0,     0,
-       0,     0,   191,     0,     0,     0,     0,   202,     0,   176,
-       0,     0,    67,   132,   138,   136,    64,   240,   242,   116,
-     133,     0,   270,     0,     0,     0,   116,   116,     0,   315,
-     316,   317,   318,   331,   333,   308,     0,     0,   320,   323,
-     324,   310,     0,     0,   130,     0,     0,     0,     0,     0,
-     199,     0,     0,     0,   193,   194,   190,    65,   134,   128,
-     272,   269,     0,     0,     0,     0,   124,     0,   300,     0,
-     340,   124,   336,   195,   196,   197,   198,     0,     0,     0,
-     203,   239,     0,   126,     0,   293,     0,     0,   107,   109,
-     116,   116,     0,   116,   116,   301,   326,   192,   200,   201,
-     129,     0,   245,   291,     0,   292,     0,   303,   302,     0,
-       0,     0,   127,     0,     0,     0,   116,   116,     0,     0,
-       0,   305,   304,   298,     0,     0,   297,     0,   294
+       0,     0,    67,     0,   115,   121,   120,   118,   119,   122,
+     123,   125,   135,   135,     0,     0,     0,     0,     0,   309,
+       0,     0,     0,     0,     0,     0,     0,   170,   156,   168,
+       0,   173,   174,     0,     0,     0,     0,   224,   243,   116,
+     241,     0,   254,     0,   267,     0,     0,     0,   270,     0,
+     268,   283,     0,     0,     0,     0,     0,     0,     0,     0,
+       0,     0,   340,     0,     0,     0,   323,   324,     0,     0,
+       0,     0,   341,     0,     0,     0,   321,     0,   130,     0,
+     226,   228,    67,     0,     0,     0,     0,     0,     0,     0,
+       0,     0,     0,     0,   204,   177,     0,     0,     0,     0,
+       0,     0,   137,   135,    65,     0,   124,     0,   266,   156,
+       0,   265,   269,     0,     0,   308,     0,     0,     0,     0,
+     130,   131,   130,     0,     0,     0,     0,     0,     0,   339,
+     311,     0,    67,   315,   316,   308,     0,   337,    67,   211,
+       0,     0,     0,     0,   191,     0,     0,     0,     0,   202,
+       0,   176,     0,     0,    67,   132,   138,   136,    64,   240,
+     242,   116,   133,     0,   272,     0,     0,     0,   116,   116,
+       0,   317,   318,   319,   320,   333,   335,   310,     0,     0,
+     322,   325,   326,   312,     0,     0,   130,     0,     0,     0,
+       0,     0,   199,     0,     0,     0,   193,   194,   190,    65,
+     134,   128,   274,   271,     0,     0,     0,     0,   124,     0,
+     302,     0,   342,   124,   338,   195,   196,   197,   198,     0,
+       0,     0,   203,   239,     0,   126,     0,   295,     0,     0,
+     107,   109,   116,   116,     0,   116,   116,   303,   328,   192,
+     200,   201,   129,     0,   245,   293,     0,   294,     0,   305,
+     304,     0,     0,     0,   127,     0,     0,     0,   116,   116,
+       0,     0,     0,   307,   306,   300,     0,     0,   299,     0,
+     296
 };
 
 /* YYDEFGOTO[NTERM-NUM].  */
 static const yytype_int16 yydefgoto[] =
 {
-      -1,   272,   273,   274,   299,   316,   162,   163,    79,   587,
+      -1,   272,   273,   274,   299,   316,   162,   163,    79,   589,
      113,    12,    80,    14,    15,    41,    42,    43,    48,    54,
-     118,   128,   349,   233,   439,   352,   672,   653,   412,   530,
-     629,   465,   531,    81,   164,   137,   154,   138,   139,   110,
-     373,   398,   374,   121,    88,   155,    16,    17,    18,    20,
-      19,   383,   440,   441,    63,    23,    61,   101,   468,   469,
-     129,   170,    55,    96,    56,    49,   471,   399,    83,   401,
-     282,   283,    57,    92,    93,   227,   657,   132,   324,   598,
-     490,   500,   228,   229,   230,   231
+     118,   128,   349,   233,   441,   352,   674,   655,   414,   532,
+     631,   467,   533,    81,   164,   137,   154,   138,   139,   110,
+     373,   400,   374,   121,    88,   155,    16,    17,    18,    20,
+      19,   383,   442,   443,    63,    23,    61,   101,   470,   471,
+     129,   170,    55,    96,    56,    49,   473,   401,    83,   403,
+     282,   283,    57,    92,    93,   227,   659,   132,   324,   600,
+     492,   502,   228,   229,   230,   231
 };
 
 /* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
    STATE-NUM.  */
-#define YYPACT_NINF -622
+#define YYPACT_NINF -608
 static const yytype_int16 yypact[] =
 {
-     805,  -622,  -622,  -622,  -622,  -622,  -622,  -622,    -6,  -112,
-      23,   -97,    91,   -94,    24,  -622,   126,  1385,  -622,   135,
-     257,    48,    77,  -622,     3,   216,  -622,  1807,  -622,  -622,
-    -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,
-    -622,    49,    49,   187,  -622,  -622,  -622,  -622,    49,  -622,
-    -622,  -622,  -622,  -622,    49,   218,  -622,    16,   220,   239,
-     243,  -622,  -622,  -622,  -622,  -622,   110,  -622,  -622,  -622,
-    -622,  -622,  -622,  -622,  -622,   267,   271,     1,   691,  -622,
-    -622,  -622,   -28,  -622,   246,   246,   206,  -622,    46,   215,
-     215,  -622,  -622,   343,  -622,  -622,  -622,  -622,  -622,  -622,
-    -622,   -59,  1537,  -622,   121,   130,   880,   110,  -622,   -28,
-    -110,   138,  1537,   142,    46,    46,  -622,  -622,  1555,  -622,
-    -622,  1830,   302,  -622,  -622,  -622,  -622,  -622,  1848,  -622,
-     -14,  2199,  -622,   293,  -622,  -622,   -28,  -622,   160,   165,
-    1877,  1877,   168,  -103,  1877,  -622,   334,   189,  -622,  1830,
-    1877,   110,   191,   -28,   221,  -622,    85,   341,   342,   345,
-     354,   355,   323,   360,  1373,   315,  -622,    28,  -622,  -622,
-    -622,  -622,  -622,   316,  1921,    42,   361,   215,  -622,  -622,
-    -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,
-    -622,  -622,  -622,  -622,  -622,   393,   529,   393,   529,  1877,
-    1877,  1877,  1877,  -622,  -622,  -622,  -622,  -622,  -622,  -622,
-    -622,  -622,  -622,  -622,  -622,  1877,  1877,  1877,  1877,  1877,
-    1877,  1877,  1877,  1877,  1877,  1877,  1877,  -622,   215,  -622,
-      70,  -622,  -622,   176,  1578,  -622,   -39,   -46,  -622,   208,
-     -28,   223,  -622,   315,     5,  1555,  -622,  -622,  -622,  -622,
-    -622,  -622,  -622,  -622,  -622,  -622,  -622,   393,   529,   393,
-     529,   219,   227,   228,   234,   235,   241,   242,  1596,  2009,
-     993,   356,   244,   245,   251,  -622,  -622,  -622,   254,  -622,
-     110,   792,  -622,   240,   943,   943,  -622,   943,  1848,  -622,
-    -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,  1877,
-    -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,
-    -622,  -622,  -622,  -622,  -622,  -622,  1877,  1877,  1877,    26,
-      58,  -622,   792,   -35,   252,   256,   258,   259,   260,   263,
-     792,   792,   792,   792,   792,   389,  1848,  1877,  1877,   375,
-    -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,
-    -622,  -622,   202,  -622,  -622,  -622,  -622,   202,  -622,   142,
-     390,   273,   274,   276,   277,  1830,  1830,  1830,  1830,  1830,
-    1830,  1830,  -622,  -622,    57,  1268,   -82,  -622,   -64,  -622,
-    1830,  1830,  1830,   275,  1628,  -622,  -622,  -622,  -622,  -622,
-    -622,  -622,  -622,   374,  1757,  2041,  1313,   414,  -622,  -622,
-    -622,  -622,  1877,   278,  -622,   279,   943,   792,   792,   792,
-     792,    31,  -622,    33,  -622,  -622,   943,   280,  1877,  1877,
-    1877,  1877,  1877,   281,   282,   284,   285,   287,  1877,   943,
-     792,   288,  -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,
-     275,   275,  1877,  1830,  1830,  1830,  1830,  -622,   290,   291,
-     292,   294,   282,   295,  1830,  -622,   286,  1222,   -62,  -622,
-    -622,   301,   307,   429,    20,  -622,  -622,   -28,   309,   312,
-    -622,   448,  -622,    87,  1508,   -10,  -622,   -61,  -622,  -622,
-     455,   456,   318,   317,   319,   320,   321,   943,   473,   943,
-     338,   339,   943,   340,   -28,  -622,   344,   346,   478,   496,
-     351,  1877,   943,   943,   -28,   348,   352,  1877,  -622,  -622,
-      -5,   353,   357,   359,   362,   115,  1830,  1830,  1830,  1830,
-     146,  1830,  -622,  -622,   336,  1830,  1830,  1877,   493,   515,
-    -622,   275,   530,  1789,  -622,   363,  -622,   358,   -60,  -622,
-    -622,   943,   943,  2082,   943,   943,   943,   943,   352,  -622,
-     352,  1877,   943,   364,  1877,  1877,  1877,  -622,  -622,   516,
-     792,  -622,  -622,  2082,   472,  -622,   792,  -622,  1830,  1830,
-    1830,  1830,  -622,   368,   377,   372,   376,  -622,   282,  -622,
-     379,   381,     2,  -622,  -622,  -622,  -622,  -622,  -622,   -28,
-       4,   517,  -622,   380,   382,   378,   -16,   -28,   157,  -622,
-    -622,  -622,  -622,  -622,  -622,  -622,   384,   943,  -622,  -622,
-    -622,  -622,   282,   178,   352,   386,   388,   394,   396,  1830,
-    -622,  1830,  1830,   198,  -622,  -622,  -622,   530,  -622,   507,
-    -622,  -622,   533,    -7,   641,   641,  -622,  2100,  -622,   398,
-     351,  -622,  -622,  -622,  -622,  -622,  -622,   406,   408,   409,
-    -622,  -622,   564,   417,   943,  -622,  1088,     7,   415,   416,
-    -622,  -622,   -12,   -16,   -28,  -622,   202,  -622,  -622,  -622,
-    -622,   548,  -622,  -622,   418,  -622,  1088,   176,   176,   557,
-     641,   641,  -622,   558,   419,   943,  -622,  -622,   943,   562,
-     508,   176,   176,  -622,   943,   563,  -622,   943,  -622
+     492,  -608,  -608,  -608,  -608,  -608,  -608,  -608,     1,   -93,
+      14,   -48,    39,   -39,    -3,  -608,   132,   926,  -608,    61,
+     261,   -14,     6,  -608,   -15,   148,  -608,  1840,  -608,  -608,
+    -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,
+    -608,    69,    69,    88,  -608,  -608,  -608,  -608,    69,  -608,
+    -608,  -608,  -608,  -608,    69,   120,  -608,   -11,   158,   166,
+     184,  -608,  -608,  -608,  -608,  -608,    53,  -608,  -608,  -608,
+    -608,  -608,  -608,  -608,  -608,   212,   222,    10,   812,  -608,
+    -608,  -608,     9,  -608,   201,   201,   168,  -608,    56,   253,
+     253,  -608,  -608,   323,  -608,  -608,  -608,  -608,  -608,  -608,
+    -608,    66,  1570,  -608,    85,    93,  1260,    53,  -608,     9,
+    -101,   121,  1570,   133,    56,    56,  -608,  -608,  1588,  -608,
+    -608,  1869,   305,  -608,  -608,  -608,  -608,  -608,  1915,  -608,
+     -12,  2220,  -608,   303,  -608,  -608,     9,  -608,   176,   170,
+    2001,  2001,   177,   -91,  2001,  -608,   344,   193,  -608,  1869,
+    2001,    53,   199,     9,   432,  -608,   296,   347,   348,   354,
+     356,   357,   283,   362,  1365,   317,  -608,    55,  -608,  -608,
+    -608,  -608,  -608,   316,  2033,    94,   363,   253,  -608,  -608,
+    -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,
+    -608,  -608,  -608,  -608,  -608,   464,   280,   464,   280,  2001,
+    2001,  2001,  2001,  -608,  -608,  -608,  -608,  -608,  -608,  -608,
+    -608,  -608,  -608,  -608,  -608,  2001,  2001,  2001,  2001,  2001,
+    2001,  2001,  2001,  2001,  2001,  2001,  2001,  -608,   253,  -608,
+      43,  -608,  -608,   192,  1620,  -608,   -35,   -40,  -608,   209,
+       9,   219,  -608,   317,   -23,  1588,  -608,  -608,  -608,  -608,
+    -608,  -608,  -608,  -608,  -608,  -608,  -608,   464,   280,   464,
+     280,   221,   243,   245,   246,   247,   250,   251,  1749,  2051,
+    1305,   386,   254,   256,   257,  -608,  -608,  -608,   259,  -608,
+      53,   913,  -608,   258,  1080,  1080,  -608,  1080,  1915,  -608,
+    -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,  2001,
+    -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,
+    -608,  -608,  -608,  -608,  -608,  -608,  2001,  2001,  2001,   -29,
+     -17,  -608,   913,   -34,   260,   262,   263,   264,   267,   268,
+     913,   913,   913,   913,   913,   378,  1915,  2001,  2001,   416,
+    -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,
+    -608,  -608,   124,  -608,  -608,  -608,  -608,   124,  -608,   133,
+     390,   273,   274,   275,   282,  1869,  1869,  1869,  1869,  1869,
+    1869,  1869,  -608,  -608,    81,  1500,  -104,  -608,   -89,  -608,
+    1869,  1869,  1869,   277,  1781,  -608,  -608,  -608,  -608,  -608,
+    -608,  -608,  -608,  -608,  -608,   382,  1799,  2080,  1529,   422,
+    -608,  -608,  -608,  -608,  2001,   286,  -608,   287,  1080,   913,
+     913,   913,   913,    36,  -608,    49,  -608,  -608,  1080,   285,
+    2001,  2001,  2001,  2001,  2001,   289,   290,   294,   298,   301,
+    2001,  1080,   913,   311,  -608,  -608,  -608,  -608,  -608,  -608,
+    -608,  -608,   277,   277,  2001,  1869,  1869,  1869,  1869,  -608,
+     312,   313,   314,   319,   290,   320,  1869,  -608,   309,  1214,
+     -87,  -608,  -608,   321,   322,   424,    -1,  -608,  -608,     9,
+     331,   334,  -608,   454,  -608,    99,  1547,   -21,  -608,   -64,
+    -608,  -608,   476,   477,   339,   338,   340,   341,   342,  1080,
+     494,  1080,   343,   358,  1080,   359,     9,  -608,   361,   365,
+     509,   517,   366,  2001,  1080,  1080,     9,   370,   369,  2001,
+    -608,  -608,    11,   374,   377,   381,   383,    82,  1869,  1869,
+    1869,  1869,    90,  1869,  -608,  -608,   375,  1869,  1869,  2001,
+     521,   541,  -608,   277,    37,  1822,  -608,   387,  -608,   384,
+     -51,  -608,  -608,  1080,  1080,  2098,  1080,  1080,  1080,  1080,
+     369,  -608,   369,  2001,  1080,   388,  2001,  2001,  2001,  -608,
+    -608,   545,   913,  -608,  -608,  2098,   497,  -608,   913,  -608,
+    1869,  1869,  1869,  1869,  -608,   394,   397,   396,   409,  -608,
+     290,  -608,   412,   413,    46,  -608,  -608,  -608,  -608,  -608,
+    -608,     9,    86,   553,  -608,   414,   419,   417,    27,     9,
+     119,  -608,  -608,  -608,  -608,  -608,  -608,  -608,   423,  1080,
+    -608,  -608,  -608,  -608,   290,   167,   369,   431,   433,   434,
+     439,  1869,  -608,  1869,  1869,   187,  -608,  -608,  -608,    37,
+    -608,   527,  -608,  -608,   572,    -2,   762,   762,  -608,  2121,
+    -608,   435,   366,  -608,  -608,  -608,  -608,  -608,  -608,   440,
+     441,   443,  -608,  -608,   597,   452,  1080,  -608,   568,     2,
+     455,   456,  -608,  -608,   118,    27,     9,  -608,   124,  -608,
+    -608,  -608,  -608,   592,  -608,  -608,   458,  -608,   568,   192,
+     192,   598,   762,   762,  -608,   601,   461,  1080,  -608,  -608,
+    1080,   604,   549,   192,   192,  -608,  1080,   606,  -608,  1080,
+    -608
 };
 
 /* YYPGOTO[NTERM-NUM].  */
 static const yytype_int16 yypgoto[] =
 {
-    -622,   451,   452,   454,  -163,  -157,  -174,  -622,     0,   -41,
-    -102,   494,    13,  -622,  -622,  -622,  -622,   222,  -622,  -622,
-    -622,  -145,  -622,  -427,  -622,  -227,  -622,  -622,  -301,    -2,
-    -622,  -412,  -622,  -622,   -26,   369,  -116,  -622,   477,   484,
-    -113,  -161,  -259,     8,   147,   347,  -622,  -622,   574,  -622,
-    -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,  -622,
-     503,  -622,  -622,  -622,  -622,  -622,  -622,  -621,  -121,    55,
-    -195,  -622,  -622,   537,  -622,  -622,  -622,  -622,  -622,    32,
-     151,  -445,  -622,  -622,  -622,  -622
+    -608,   493,   495,   499,  -174,  -164,  -170,  -608,     0,    -4,
+    -146,   535,     5,  -608,  -608,  -608,  -608,    58,  -608,  -608,
+    -608,  -141,  -608,  -445,  -608,  -238,  -608,  -608,  -295,    40,
+    -608,  -393,  -608,  -608,   -26,   399,  -125,  -608,   519,   528,
+     -86,  -162,  -262,   157,   269,   391,  -608,  -608,   618,  -608,
+    -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,  -608,
+     547,  -608,  -608,  -608,  -608,  -608,  -608,  -607,   -80,   174,
+    -189,  -608,  -608,   581,  -608,  -608,  -608,  -608,  -608,    74,
+     191,  -443,  -608,  -608,  -608,  -608
 };
 
 /* YYTABLE[YYPACT[STATE-NUM]].  What to do in state STATE-NUM.  If
@@ -2236,478 +2253,484 @@
 #define YYTABLE_NINF -214
 static const yytype_int16 yytable[] =
 {
-      11,    82,   287,   275,   286,   105,   321,   520,   165,   111,
-     376,   378,   167,    13,   168,   357,   111,    11,   286,   414,
-     111,   325,   326,   327,   328,   329,   679,   111,   508,   509,
-      13,   335,   288,   246,   317,   674,   243,    91,   528,  -145,
-     532,   318,   487,   276,   489,    94,    24,    21,     2,   144,
-     111,     4,   109,   284,   528,   684,   144,   111,   145,   285,
-     111,    26,    22,   277,    28,   239,    29,    30,    31,    32,
-      33,    34,    35,    36,   529,    37,   136,   454,   119,   120,
-     109,   111,    25,   336,   459,   488,   136,   488,   -55,   -55,
-     -55,   -55,   153,    11,   361,   454,   363,   454,   454,   454,
-     133,   362,   153,   364,   460,   134,   524,   540,   593,    27,
-     112,   247,   248,   111,   236,   237,   458,   112,   240,   585,
-     354,   112,   149,   150,   244,   353,    44,   416,   112,   433,
-     434,   435,   -67,   623,   436,   473,   475,   477,   437,   438,
-    -145,   358,   359,   431,  -145,   433,   434,   435,   281,   454,
-     436,   112,   567,   169,   437,   438,   539,   655,   112,   626,
-     400,   112,   627,   400,   400,    60,   400,   640,   106,   634,
-     635,   675,   406,   319,   320,   281,   322,    38,    39,    40,
-     278,    46,   112,    47,    95,   411,   -67,   337,   338,   323,
+      11,    82,   275,   167,   357,    13,   287,   376,   378,   286,
+      91,   522,   321,   286,   105,   111,   168,    11,    94,   277,
+     111,   111,    13,   317,   534,   416,   111,   325,   326,   327,
+     328,   329,   111,   530,   318,   165,   288,   335,   111,    29,
+      30,    31,    32,    33,    34,    35,    36,   489,    37,   510,
+     511,   676,   109,   531,    21,   456,     1,    27,   144,     3,
+     491,     5,   461,   243,   111,    24,   111,   145,   144,    22,
+     456,   686,   456,    25,   246,     2,   136,   239,     4,   462,
+     109,   526,  -145,   361,   276,   363,   136,   336,   119,   120,
+     490,   339,   153,    11,   362,   456,   364,   358,   359,    84,
+      85,   111,   153,   490,   542,   284,    89,    46,   456,    47,
+      26,   285,    90,   460,   236,   237,   112,   595,   240,    28,
+     530,   112,   112,    86,   244,    87,   354,   112,   418,   353,
+     413,   -67,    44,   112,   475,   477,   479,   625,   456,   112,
+     587,    91,   415,   -67,    58,   541,   629,    60,   281,   433,
+      38,    39,    40,   636,   637,   169,   681,    95,   340,   341,
+     337,   338,   657,   408,    59,   112,   677,   112,   569,   -67,
+      62,   642,   278,   319,   320,   281,   322,   106,   342,   343,
+      98,   344,   345,  -145,   346,   347,   348,  -145,    99,   323,
      281,   281,   281,   281,   281,   330,   331,   332,   333,   334,
-     281,   400,    38,    39,    40,   565,    58,   479,   136,   400,
-     400,   400,   400,   400,   112,   538,   454,   413,   -67,   153,
-     429,   455,    86,   493,    87,   495,   496,   497,    64,    65,
-     339,   114,   115,   677,   678,    59,   680,   681,    62,    91,
-       1,     2,    98,     3,     4,     5,   454,   603,   116,   604,
-     117,   536,   447,   448,   449,   450,   451,   452,   453,   691,
-     692,    99,   153,    84,    85,   100,   102,   461,   462,   463,
-      89,   103,   572,   407,   551,   104,    90,   122,   123,   124,
-     125,   126,   127,    87,   140,   400,   400,   400,   400,   400,
-     408,   409,   410,   141,   146,   400,   275,   340,   341,    50,
-      51,    52,   148,   577,    53,   559,   166,   590,   400,   400,
-     153,   430,   281,   642,   636,   232,   637,   342,   343,   234,
-     344,   345,   235,   346,   347,   348,   249,   250,   251,   252,
-     511,   512,   513,   514,   238,   641,   276,   637,   241,   403,
-     404,   522,   405,   433,   434,   435,   242,   245,   436,   457,
-     -56,   -57,   437,   438,   -60,   650,   605,   559,   467,   608,
-     609,   610,     1,   -59,   -58,     3,   400,     5,   400,   253,
-     111,   400,   286,   279,   355,   365,   281,   415,   379,   432,
-     356,   400,   400,   366,   367,   423,   424,   425,   426,   427,
-     368,   369,   281,   494,   281,   281,   281,   370,   371,   402,
-     380,   381,   504,   573,   574,   575,   576,   382,   578,   662,
-     384,   417,   580,   581,   666,   418,   510,   419,   420,   421,
-     400,   400,   422,   400,   400,   400,   400,   428,   442,   443,
-     444,   400,   445,   446,   464,   470,   478,   480,   481,   400,
-     498,   499,   492,   501,   502,   400,   503,   507,   457,   516,
-     517,   518,   523,   519,   521,   615,   616,   617,   618,   656,
-     525,   482,   483,   484,   485,   486,   526,   527,   533,   534,
-     535,   491,   541,   542,   543,   560,   544,   549,   545,   546,
-     547,   566,   557,   676,   505,   506,   400,   289,   290,   291,
-     292,   293,   294,   295,   296,   297,   298,   551,   552,   554,
-     558,   582,   579,   555,   563,   556,   647,   589,   648,   649,
-     559,   564,   568,   400,   400,   583,   569,   597,   570,   584,
-     611,   571,   591,   607,   592,   281,   488,   619,   281,   281,
-     281,   621,   586,   400,   620,   622,   624,   597,   625,   630,
-     633,   632,   548,   643,   550,   644,   631,   553,   638,     1,
-     654,   645,     3,   646,     5,   300,   301,   561,   562,   400,
-     400,   652,   665,   667,   400,   668,   669,   400,   670,   671,
-     682,   -18,   -19,   400,   685,   688,   400,   683,   689,   694,
-     697,   695,   224,   225,   339,   226,   651,   131,   628,   147,
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      158,   159,   160,   161,    73,     0,     1,     2,     0,     3,
-       4,     5,     0,     0,     0,     0,     0,     0,     0,    75,
-      76,     0,     0,    77,     0,    78,    64,    65,     0,   107,
-      67,    68,    69,    70,    71,    72,    73,    74,     1,     2,
-       0,     3,     4,     5,    64,    65,     0,    66,    67,    68,
-      69,    70,    71,    72,    73,     0,     1,     2,   588,     3,
        4,     5,     0,     0,     0,     0,     0,    64,    65,    74,
-     107,   156,   157,   158,   159,   160,   161,    73,     0,     1,
+     107,    67,    68,    69,    70,    71,    72,    73,     0,     1,
        2,     0,     3,     4,     5,    64,    65,    74,   151,    67,
-      68,    69,    70,    71,    72,    73,     0,     1,     2,     0,
+      68,    69,    70,    71,    72,    73,     0,     1,     2,   135,
        3,     4,     5,     0,     0,     0,     0,     0,     0,     0,
-      74,     0,     0,     0,    64,    65,     0,   107,    67,    68,
-      69,    70,    71,    72,    73,     0,     1,     2,    74,     3,
-       4,     5,     0,     0,     0,     0,     0,     0,     0,     0,
-       0,     0,     0,     0,     0,     0,     0,     0,    75,    76,
-       0,   472,    77,     0,    78,     0,     0,    74,    64,    65,
-       0,   280,    67,    68,    69,    70,    71,    72,    73,     0,
-       1,     2,     0,     3,     4,     5,     0,     0,     0,     0,
-      75,    76,     0,     0,    77,     0,    78,     0,     0,     0,
+      74,     0,     0,     0,     0,     0,     0,    64,    65,     0,
+     107,    67,    68,    69,    70,    71,    72,    73,    74,     1,
+       2,     0,     3,     4,     5,     0,     0,     0,     0,     0,
+       0,     0,     0,     0,     0,     0,     0,     0,     0,   350,
+       0,    75,    76,     0,     0,    77,     0,    78,   458,     0,
+      74,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+       0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+      75,    76,     0,     0,    77,     0,    78,   478,     0,     0,
        0,     0,     0,     0,     0,     0,     0,     0,    75,    76,
-       0,    74,    77,     0,    78,     0,     0,     0,     0,     0,
+       0,     0,    77,   152,    78,   539,     0,     0,     0,     0,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
        0,    75,    76,     0,     0,    77,     0,    78,     0,     0,
        0,     0,     0,     0,     0,     0,     0,     0,     0,    75,
       76,     0,     0,    77,     0,    78,    64,    65,     0,   107,
      156,   157,   158,   159,   160,   161,    73,     0,     1,     2,
-       0,     3,     4,     5,     0,     0,     0,     0,    75,    76,
-       0,     0,    77,     0,    78,     0,     0,     0,    64,    65,
-       0,   107,   156,   157,   158,   159,   160,   161,    73,    74,
-       1,     2,     0,     3,     4,     5,     0,     0,     0,     0,
+       0,     3,     4,     5,     0,     0,     0,     0,     0,     0,
+       0,    75,    76,     0,     0,    77,     0,    78,    64,    65,
+       0,   107,    67,    68,    69,    70,    71,    72,    73,    74,
+       1,     2,     0,     3,     4,     5,    64,    65,     0,   107,
+     156,   157,   158,   159,   160,   161,    73,     0,     1,     2,
+     468,     3,     4,     5,     0,     0,     0,     0,     0,    64,
+      65,    74,   107,    67,    68,    69,    70,    71,    72,    73,
+       0,     1,     2,     0,     3,     4,     5,    64,    65,    74,
+      66,    67,    68,    69,    70,    71,    72,    73,     0,     1,
+       2,   590,     3,     4,     5,     0,     0,     0,     0,     0,
+       0,     0,    74,     0,     0,     0,    64,    65,     0,   107,
+     156,   157,   158,   159,   160,   161,    73,     0,     1,     2,
+      74,     3,     4,     5,     0,     0,     0,     0,     0,     0,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-       0,     0,    75,    76,     0,     0,    77,     0,    78,    64,
-      65,    74,   107,    67,    68,    69,    70,    71,    72,   596,
-       0,     1,     2,     0,     3,     4,     5,    64,    65,     0,
-     107,    67,    68,    69,    70,    71,    72,   663,     0,     1,
-       2,     0,     3,     4,     5,     0,     0,     0,     0,     0,
-       0,     0,    74,     0,     0,     0,     0,     0,     0,     0,
+      75,    76,     0,   372,    77,     0,    78,     0,     0,    74,
+       0,     0,    64,    65,     0,   151,    67,    68,    69,    70,
+      71,    72,    73,     0,     1,     2,     0,     3,     4,     5,
+       0,     0,    75,    76,     0,     0,    77,     0,    78,     0,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-      74,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+      75,    76,     0,   474,    77,    74,    78,     0,     0,     0,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-      75,    76,     0,     0,    77,     0,   375,     0,     0,     0,
+       0,     0,     0,    75,    76,     0,     0,    77,     0,    78,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+       0,    75,    76,     0,     0,    77,     0,    78,    64,    65,
+       0,   107,    67,    68,    69,    70,    71,    72,    73,     0,
+       1,     2,     0,     3,     4,     5,     0,     0,     0,     0,
+      75,    76,     0,     0,    77,     0,    78,     0,     0,     0,
+      64,    65,     0,   280,    67,    68,    69,    70,    71,    72,
+      73,    74,     1,     2,     0,     3,     4,     5,    64,    65,
+       0,   107,   156,   157,   158,   159,   160,   161,    73,     0,
+       1,     2,     0,     3,     4,     5,    75,    76,     0,     0,
+      77,     0,    78,    74,     0,     0,     0,    64,    65,     0,
+     107,   156,   157,   158,   159,   160,   161,    73,     0,     1,
+       2,    74,     3,     4,     5,    64,    65,     0,   107,    67,
+      68,    69,    70,    71,    72,   598,     0,     1,     2,     0,
+       3,     4,     5,     0,     0,     0,     0,     0,    64,    65,
+      74,   107,    67,    68,    69,    70,    71,    72,   665,     0,
+       1,     2,     0,     3,     4,     5,     0,     0,    74,     0,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-       0,     0,    75,    76,     0,     0,    77,     0,   474,     0,
+       0,     0,    75,    76,     0,     0,    77,     0,    78,     0,
+       0,    74,     0,     0,     0,     0,     0,     0,     0,     0,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+       0,     0,     0,     0,    75,    76,     0,     0,    77,     0,
+      78,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+       0,     0,    75,    76,     0,     0,    77,     0,   375,     0,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-       0,     0,     0,     0,     0,   171,     0,     0,     0,     0,
-       0,     0,     0,    75,    76,     0,     0,    77,     0,    78,
-       0,     0,     0,     0,     0,     0,   172,   173,     0,     0,
-       0,    75,    76,     0,     0,    77,     0,    78,   174,   175,
-     176,   177,   178,   179,   180,   181,   182,   183,   184,   185,
-     186,   187,   188,   189,   190,   191,   192,   193,   194,   195,
-     196,   197,   198,     0,     0,     0,     0,     0,     0,     0,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
-       0,     0,     0,   199,   200,   201,     0,     0,   202,   203,
-     204,   205,   206,   207,   208,   209,   210,   211,   212,   213,
-     214,   215,   216,   217,   218,   219,   220,   221,   222,   223
+       0,    75,    76,     0,     0,    77,     0,   476,     0,     0,
+       0,     0,     0,     0,     0,     0,   171,     0,     0,    75,
+      76,     0,     0,    77,     0,    78,     0,     0,     0,     0,
+       0,     0,     0,     0,     0,     0,     0,   172,   173,     0,
+       0,     0,    75,    76,     0,     0,    77,     0,    78,   174,
+     175,   176,   177,   178,   179,   180,   181,   182,   183,   184,
+     185,   186,   187,   188,   189,   190,   191,   192,   193,   194,
+     195,   196,   197,   198,     0,     0,     0,     0,     0,     0,
+       0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+       0,     0,     0,     0,   199,   200,   201,     0,     0,   202,
+     203,   204,   205,   206,   207,   208,   209,   210,   211,   212,
+     213,   214,   215,   216,   217,   218,   219,   220,   221,   222,
+     223
 };
 
 static const yytype_int16 yycheck[] =
 {
-       0,    27,   176,   164,    11,     4,   201,   452,   121,    55,
-     269,   270,   128,     0,    28,   242,    55,    17,    11,   320,
-      55,   216,   217,   218,   219,   220,    38,    55,   440,   441,
-      17,   226,   177,   154,   197,   656,   149,    21,    34,    55,
-     467,   198,    11,   164,    11,    29,   158,    53,    20,   159,
-      55,    23,    78,    11,    34,   676,   159,    55,   168,    17,
-      55,   158,    68,   165,   158,   168,    42,    43,    44,    45,
-      46,    47,    48,    49,    54,    51,   102,   159,    32,    33,
-     106,    55,    59,   228,   166,    54,   112,    54,     3,     4,
-       5,     6,   118,    93,   257,   159,   259,   159,   159,   159,
-     159,   258,   128,   260,   168,   164,   168,   168,   168,    18,
-     156,    26,    27,    55,   140,   141,   375,   156,   144,   531,
-     166,   156,   114,   115,   150,   164,     0,   162,   156,   141,
-     142,   143,   160,   578,   146,   394,   395,   396,   150,   151,
-     156,   243,   244,   338,   160,   141,   142,   143,   174,   159,
-     146,   156,   157,   167,   150,   151,   166,   164,   156,   157,
-     281,   156,   589,   284,   285,   162,   287,   612,   167,   596,
-     597,   164,   288,   199,   200,   201,   202,   153,   154,   155,
-     167,    46,   156,    48,   168,   159,   160,   117,   118,   215,
+       0,    27,   164,   128,   242,     0,   176,   269,   270,    11,
+      21,   454,   201,    11,     4,    55,    28,    17,    29,   165,
+      55,    55,    17,   197,   469,   320,    55,   216,   217,   218,
+     219,   220,    55,    34,   198,   121,   177,   226,    55,    42,
+      43,    44,    45,    46,    47,    48,    49,    11,    51,   442,
+     443,   658,    78,    54,    53,   159,    19,    18,   159,    22,
+      11,    24,   166,   149,    55,   158,    55,   168,   159,    68,
+     159,   678,   159,    59,   154,    20,   102,   168,    23,   168,
+     106,   168,    55,   257,   164,   259,   112,   228,    32,    33,
+      54,    54,   118,    93,   258,   159,   260,   243,   244,    41,
+      42,    55,   128,    54,   168,    11,    48,    46,   159,    48,
+     158,    17,    54,   375,   140,   141,   156,   168,   144,   158,
+      34,   156,   156,    35,   150,    37,   166,   156,   162,   164,
+     159,   160,     0,   156,   396,   397,   398,   580,   159,   156,
+     533,    21,   159,   160,   158,   166,   591,   162,   174,   338,
+     153,   154,   155,   598,   599,   167,    38,   168,   121,   122,
+     117,   118,   164,   288,   158,   156,   164,   156,   157,   160,
+      22,   614,   167,   199,   200,   201,   202,   167,   141,   142,
+      22,   144,   145,   156,   147,   148,   149,   160,    22,   215,
      216,   217,   218,   219,   220,   221,   222,   223,   224,   225,
-     226,   322,   153,   154,   155,   506,   158,   402,   234,   330,
-     331,   332,   333,   334,   156,   474,   159,   159,   160,   245,
-     336,   164,    35,   418,    37,   420,   421,   422,     7,     8,
-      54,    84,    85,   660,   661,   158,   663,   664,    22,    21,
-      19,    20,    22,    22,    23,    24,   159,   548,    42,   550,
-      44,   164,   365,   366,   367,   368,   369,   370,   371,   686,
-     687,    22,   288,    41,    42,    22,   156,   380,   381,   382,
-      48,     4,   157,   299,   159,     4,    54,    62,    63,    64,
-      65,    66,    67,    37,   163,   406,   407,   408,   409,   410,
-     316,   317,   318,   163,   156,   416,   457,   121,   122,    42,
-      43,    44,   160,   157,    47,   159,     4,   534,   429,   430,
-     336,   337,   338,   614,   157,    22,   159,   141,   142,   159,
-     144,   145,   157,   147,   148,   149,     3,     4,     5,     6,
-     443,   444,   445,   446,   166,   157,   457,   159,     4,   284,
-     285,   454,   287,   141,   142,   143,   157,   156,   146,   375,
-       9,     9,   150,   151,     9,   157,   551,   159,   384,   554,
-     555,   556,    19,     9,     9,    22,   487,    24,   489,     9,
-      55,   492,    11,    57,   166,   156,   402,   322,    22,     4,
-     157,   502,   503,   156,   156,   330,   331,   332,   333,   334,
-     156,   156,   418,   419,   420,   421,   422,   156,   156,   159,
-     156,   156,   428,   516,   517,   518,   519,   156,   521,   636,
-     156,   159,   525,   526,   641,   159,   442,   159,   159,   159,
-     541,   542,   159,   544,   545,   546,   547,    38,    38,   156,
-     156,   552,   156,   156,   159,    61,    22,   159,   159,   560,
-     159,   159,   162,   159,   159,   566,   159,   159,   474,   159,
-     159,   159,   166,   159,   159,   568,   569,   570,   571,   633,
-     159,   406,   407,   408,   409,   410,   159,    38,   159,   157,
-      22,   416,    17,    17,   156,   501,   159,     4,   159,   159,
-     159,   507,     4,   657,   429,   430,   607,    94,    95,    96,
-      97,    98,    99,   100,   101,   102,   103,   159,   159,   159,
-       4,   527,   166,   159,   156,   159,   619,   533,   621,   622,
-     159,   159,   159,   634,   635,    22,   159,   543,   159,     4,
-       4,   159,   159,   159,   166,   551,    54,   159,   554,   555,
-     556,   159,   532,   654,   157,   159,   157,   563,   157,    22,
-     162,   159,   487,   157,   489,   157,   166,   492,   164,    19,
-      17,   157,    22,   157,    24,    26,    27,   502,   503,   680,
-     681,    54,   164,   157,   685,   157,   157,   688,     4,   152,
-      22,   156,   156,   694,    17,    17,   697,   159,   159,    17,
-      17,    73,   131,   131,    54,   131,   627,    93,   590,   112,
-     106,    17,   245,    90,    57,   563,   541,   542,   447,   544,
-     545,   546,   547,   234,    -1,    -1,    -1,   552,    -1,    -1,
-      -1,   637,    -1,    -1,    -1,   560,    -1,    -1,    -1,    -1,
-      -1,   566,    -1,    -1,    -1,    -1,    -1,   627,    -1,   100,
-     101,   102,   103,   104,   105,   106,   107,   108,   109,   110,
-     111,   112,   113,    -1,     3,     4,    -1,    -1,     7,     8,
-       9,   121,   122,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
-      19,    20,   607,    22,    23,    24,    25,    26,    27,    -1,
-      -1,   141,   142,    -1,   144,   145,    -1,   147,   148,   149,
-      -1,    40,    41,    -1,    -1,    -1,    -1,    -1,    -1,   634,
-     635,    -1,    -1,    -1,    -1,    54,    -1,    -1,     7,     8,
-      59,    10,    11,    12,    13,    14,    15,    16,    17,   654,
-      19,    20,    -1,    22,    23,    24,    75,    76,    77,    78,
-      79,    80,    81,    82,    83,    84,    85,    86,    87,    88,
-      89,    90,    91,    92,    93,   680,   681,    -1,    -1,    -1,
-     685,    50,    -1,   688,    -1,    -1,    -1,    -1,    -1,   694,
-      -1,    -1,   697,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
-     119,   120,   121,   122,   123,   124,   125,   126,   127,   128,
-     129,   130,   131,    -1,   133,    -1,   135,   136,   137,    -1,
-     139,   140,   141,   142,    -1,   144,   145,    -1,   147,   148,
-     149,    -1,    -1,    -1,    -1,     3,     4,    -1,    -1,     7,
-       8,     9,    -1,   162,    -1,     0,   165,    -1,   167,    -1,
-     169,    19,    20,    -1,    22,    23,    24,    25,    26,    27,
-      -1,    -1,    -1,    18,    19,    20,    -1,    22,    23,    24,
-      -1,    -1,    40,    41,    -1,    30,    31,    -1,    -1,    -1,
-      -1,    -1,    -1,    -1,    -1,    -1,    -1,    55,    -1,    -1,
-      -1,    59,   161,   162,    -1,    -1,   165,    52,   167,   168,
-      -1,    56,    -1,    -1,    -1,    60,    -1,    75,    76,    77,
+     226,   281,   156,   157,   284,   285,    22,   287,   234,   156,
+      42,   336,    44,   508,   476,   404,     4,   662,   663,   245,
+     665,   666,   153,   154,   155,   159,     4,   141,   142,   143,
+     164,   420,   146,   422,   423,   424,   150,   151,    37,   157,
+     159,   159,   322,   688,   689,   164,    54,   157,   163,   159,
+     330,   331,   332,   333,   334,   550,   163,   552,   159,   141,
+     142,   143,   288,   164,   146,   141,   142,   143,   150,   151,
+     146,   114,   115,   299,   150,   151,   157,   156,   159,   365,
+     366,   367,   368,   369,   370,   371,     3,     4,     5,     6,
+     316,   317,   318,   160,   380,   381,   382,   459,   536,     3,
+       4,     5,     6,    42,    43,    44,    26,    27,    47,     4,
+     336,   337,   338,   121,   122,    62,    63,    64,    65,    66,
+      67,   616,    26,    27,   157,    22,   159,   157,   408,   409,
+     410,   411,   412,   141,   142,   159,   144,   145,   418,   147,
+     148,   149,    19,   166,   157,    22,   159,    24,     4,   375,
+     157,   431,   432,    84,    85,   156,     9,     9,   384,   445,
+     446,   447,   448,     9,   553,     9,     9,   556,   557,   558,
+     456,     9,    55,    57,    11,   166,   157,   156,   404,   459,
+     100,   101,   102,   103,   104,   105,   106,   107,   108,   109,
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+      -1,   161,   162,    -1,    -1,   165,    -1,   167,   168,    -1,
+      50,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+      -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+     161,   162,    -1,    -1,   165,    -1,   167,   168,    -1,    -1,
       -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,   161,   162,
-      -1,    50,   165,    -1,   167,    -1,    -1,    -1,    -1,    -1,
+      -1,    -1,   165,   125,   167,   168,    -1,    -1,    -1,    -1,
       -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
       -1,   161,   162,    -1,    -1,   165,    -1,   167,    -1,    -1,
       -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,   161,
      162,    -1,    -1,   165,    -1,   167,     7,     8,    -1,    10,
       11,    12,    13,    14,    15,    16,    17,    -1,    19,    20,
-      -1,    22,    23,    24,    -1,    -1,    -1,    -1,   161,   162,
-      -1,    -1,   165,    -1,   167,    -1,    -1,    -1,     7,     8,
+      -1,    22,    23,    24,    -1,    -1,    -1,    -1,    -1,    -1,
+      -1,   161,   162,    -1,    -1,   165,    -1,   167,     7,     8,
       -1,    10,    11,    12,    13,    14,    15,    16,    17,    50,
-      19,    20,    -1,    22,    23,    24,    -1,    -1,    -1,    -1,
-      -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
-      -1,    -1,   161,   162,    -1,    -1,   165,    -1,   167,     7,
+      19,    20,    -1,    22,    23,    24,     7,     8,    -1,    10,
+      11,    12,    13,    14,    15,    16,    17,    -1,    19,    20,
+      39,    22,    23,    24,    -1,    -1,    -1,    -1,    -1,     7,
        8,    50,    10,    11,    12,    13,    14,    15,    16,    17,
-      -1,    19,    20,    -1,    22,    23,    24,     7,     8,    -1,
+      -1,    19,    20,    -1,    22,    23,    24,     7,     8,    50,
       10,    11,    12,    13,    14,    15,    16,    17,    -1,    19,
-      20,    -1,    22,    23,    24,    -1,    -1,    -1,    -1,    -1,
-      -1,    -1,    50,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+      20,    39,    22,    23,    24,    -1,    -1,    -1,    -1,    -1,
+      -1,    -1,    50,    -1,    -1,    -1,     7,     8,    -1,    10,
+      11,    12,    13,    14,    15,    16,    17,    -1,    19,    20,
+      50,    22,    23,    24,    -1,    -1,    -1,    -1,    -1,    -1,
       -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
-      50,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+     161,   162,    -1,   164,   165,    -1,   167,    -1,    -1,    50,
+      -1,    -1,     7,     8,    -1,    10,    11,    12,    13,    14,
+      15,    16,    17,    -1,    19,    20,    -1,    22,    23,    24,
+      -1,    -1,   161,   162,    -1,    -1,   165,    -1,   167,    -1,
+      -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+     161,   162,    -1,   164,   165,    50,   167,    -1,    -1,    -1,
       -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+      -1,    -1,    -1,   161,   162,    -1,    -1,   165,    -1,   167,
+      -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+      -1,   161,   162,    -1,    -1,   165,    -1,   167,     7,     8,
+      -1,    10,    11,    12,    13,    14,    15,    16,    17,    -1,
+      19,    20,    -1,    22,    23,    24,    -1,    -1,    -1,    -1,
      161,   162,    -1,    -1,   165,    -1,   167,    -1,    -1,    -1,
+       7,     8,    -1,    10,    11,    12,    13,    14,    15,    16,
+      17,    50,    19,    20,    -1,    22,    23,    24,     7,     8,
+      -1,    10,    11,    12,    13,    14,    15,    16,    17,    -1,
+      19,    20,    -1,    22,    23,    24,   161,   162,    -1,    -1,
+     165,    -1,   167,    50,    -1,    -1,    -1,     7,     8,    -1,
+      10,    11,    12,    13,    14,    15,    16,    17,    -1,    19,
+      20,    50,    22,    23,    24,     7,     8,    -1,    10,    11,
+      12,    13,    14,    15,    16,    17,    -1,    19,    20,    -1,
+      22,    23,    24,    -1,    -1,    -1,    -1,    -1,     7,     8,
+      50,    10,    11,    12,    13,    14,    15,    16,    17,    -1,
+      19,    20,    -1,    22,    23,    24,    -1,    -1,    50,    -1,
       -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+      -1,    -1,   161,   162,    -1,    -1,   165,    -1,   167,    -1,
+      -1,    50,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
       -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+      -1,    -1,    -1,    -1,   161,   162,    -1,    -1,   165,    -1,
+     167,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
       -1,    -1,   161,   162,    -1,    -1,   165,    -1,   167,    -1,
       -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
       -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
-      -1,    -1,    -1,    -1,    -1,    36,    -1,    -1,    -1,    -1,
-      -1,    -1,    -1,   161,   162,    -1,    -1,   165,    -1,   167,
-      -1,    -1,    -1,    -1,    -1,    -1,    57,    58,    -1,    -1,
-      -1,   161,   162,    -1,    -1,   165,    -1,   167,    69,    70,
-      71,    72,    73,    74,    75,    76,    77,    78,    79,    80,
-      81,    82,    83,    84,    85,    86,    87,    88,    89,    90,
-      91,    92,    93,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
+      -1,   161,   162,    -1,    -1,   165,    -1,   167,    -1,    -1,
+      -1,    -1,    -1,    -1,    -1,    -1,    36,    -1,    -1,   161,
+     162,    -1,    -1,   165,    -1,   167,    -1,    -1,    -1,    -1,
+      -1,    -1,    -1,    -1,    -1,    -1,    -1,    57,    58,    -1,
+      -1,    -1,   161,   162,    -1,    -1,   165,    -1,   167,    69,
+      70,    71,    72,    73,    74,    75,    76,    77,    78,    79,
+      80,    81,    82,    83,    84,    85,    86,    87,    88,    89,
+      90,    91,    92,    93,    -1,    -1,    -1,    -1,    -1,    -1,
       -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,    -1,
-      -1,    -1,    -1,   114,   115,   116,    -1,    -1,   119,   120,
-     121,   122,   123,   124,   125,   126,   127,   128,   129,   130,
-     131,   132,   133,   134,   135,   136,   137,   138,   139,   140
+      -1,    -1,    -1,    -1,   114,   115,   116,    -1,    -1,   119,
+     120,   121,   122,   123,   124,   125,   126,   127,   128,   129,
+     130,   131,   132,   133,   134,   135,   136,   137,   138,   139,
+     140
 };
 
 /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
@@ -2752,38 +2775,39 @@
       39,   205,   195,   164,   166,   166,   157,   195,   180,   180,
      215,   174,   175,   174,   175,   156,   156,   156,   156,   156,
      156,   156,   164,   210,   212,   167,   212,   168,   212,    22,
-     156,   156,   156,   221,   156,     3,     4,     9,    25,    26,
-      27,    40,    41,    59,   162,   165,   167,   169,   211,   237,
-     238,   239,   159,   239,   239,   239,   206,   204,   204,   204,
-     204,   159,   198,   159,   198,   239,   162,   159,   159,   159,
-     159,   159,   159,   239,   239,   239,   239,   239,    38,   206,
-     204,   240,     4,   141,   142,   143,   146,   150,   151,   194,
-     222,   223,    38,   156,   156,   156,   156,   210,   210,   210,
-     210,   210,   210,   210,   159,   164,   168,   204,   212,   166,
-     168,   210,   210,   210,   159,   201,    39,   204,   228,   229,
-      61,   236,   164,   212,   167,   212,   168,   212,    22,   240,
-     159,   159,   239,   239,   239,   239,   239,    11,    54,    11,
-     250,   239,   162,   240,   204,   240,   240,   240,   159,   159,
-     251,   159,   159,   159,   204,   239,   239,   159,   201,   201,
-     204,   210,   210,   210,   210,   250,   159,   159,   159,   159,
-     251,   159,   210,   166,   168,   159,   159,    38,    34,    54,
-     199,   202,   193,   159,   157,    22,   164,   168,   212,   166,
-     168,    17,    17,   156,   159,   159,   159,   159,   239,     4,
-     239,   159,   159,   239,   159,   159,   159,     4,     4,   159,
-     204,   239,   239,   156,   159,   198,   204,   157,   159,   159,
-     159,   159,   157,   210,   210,   210,   210,   157,   210,   166,
-     210,   210,   204,    22,     4,   201,   178,   179,    39,   204,
-     195,   159,   166,   168,   239,   239,    17,   204,   249,   239,
-     239,   239,   239,   198,   198,   240,   239,   159,   240,   240,
-     240,     4,   239,   249,   239,   210,   210,   210,   210,   159,
-     157,   159,   159,   251,   157,   157,   157,   193,   199,   200,
-      22,   166,   159,   162,   193,   193,   157,   159,   164,   239,
-     251,   157,   198,   157,   157,   157,   157,   210,   210,   210,
-     157,   179,    54,   197,    17,   164,   176,   246,   121,   122,
-     239,   239,   195,    17,   204,   164,   195,   157,   157,   157,
-       4,   152,   196,   239,   237,   164,   176,   193,   193,    38,
-     193,   193,    22,   159,   237,    17,   239,   239,    17,   159,
-     239,   193,   193,   239,    17,    73,   239,    17,   239
+     156,   156,   156,   221,   156,     3,     4,     5,     6,     9,
+      25,    26,    27,    40,    41,    59,   162,   165,   167,   169,
+     211,   237,   238,   239,   159,   239,   239,   239,   206,   204,
+     204,   204,   204,   159,   198,   159,   198,   239,   162,   159,
+     159,   159,   159,   159,   159,   239,   239,   239,   239,   239,
+      38,   206,   204,   240,     4,   141,   142,   143,   146,   150,
+     151,   194,   222,   223,    38,   156,   156,   156,   156,   210,
+     210,   210,   210,   210,   210,   210,   159,   164,   168,   204,
+     212,   166,   168,   210,   210,   210,   159,   201,    39,   204,
+     228,   229,    61,   236,   164,   212,   167,   212,   168,   212,
+      22,   240,   159,   159,   239,   239,   239,   239,   239,    11,
+      54,    11,   250,   239,   162,   240,   204,   240,   240,   240,
+     159,   159,   251,   159,   159,   159,   204,   239,   239,   159,
+     201,   201,   204,   210,   210,   210,   210,   250,   159,   159,
+     159,   159,   251,   159,   210,   166,   168,   159,   159,    38,
+      34,    54,   199,   202,   193,   159,   157,    22,   164,   168,
+     212,   166,   168,    17,    17,   156,   159,   159,   159,   159,
+     239,     4,   239,   159,   159,   239,   159,   159,   159,     4,
+       4,   159,   204,   239,   239,   156,   159,   198,   204,   157,
+     159,   159,   159,   159,   157,   210,   210,   210,   210,   157,
+     210,   166,   210,   210,   204,    22,     4,   201,   178,   179,
+      39,   204,   195,   159,   166,   168,   239,   239,    17,   204,
+     249,   239,   239,   239,   239,   198,   198,   240,   239,   159,
+     240,   240,   240,     4,   239,   249,   239,   210,   210,   210,
+     210,   159,   157,   159,   159,   251,   157,   157,   157,   193,
+     199,   200,    22,   166,   159,   162,   193,   193,   157,   159,
+     164,   239,   251,   157,   198,   157,   157,   157,   157,   210,
+     210,   210,   157,   179,    54,   197,    17,   164,   176,   246,
+     121,   122,   239,   239,   195,    17,   204,   164,   195,   157,
+     157,   157,     4,   152,   196,   239,   237,   164,   176,   193,
+     193,    38,   193,   193,    22,   159,   237,    17,   239,   239,
+      17,   159,   239,   193,   193,   239,    17,    73,   239,    17,
+     239
 };
 
 #define yyerrok		(yyerrstatus = 0)
@@ -3598,152 +3622,152 @@
   switch (yyn)
     {
         case 29:
-#line 1124 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1138 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_EQ; ;}
     break;
 
   case 30:
-#line 1124 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1138 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_NE; ;}
     break;
 
   case 31:
-#line 1125 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1139 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_SLT; ;}
     break;
 
   case 32:
-#line 1125 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1139 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_SGT; ;}
     break;
 
   case 33:
-#line 1126 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1140 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_SLE; ;}
     break;
 
   case 34:
-#line 1126 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1140 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_SGE; ;}
     break;
 
   case 35:
-#line 1127 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1141 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_ULT; ;}
     break;
 
   case 36:
-#line 1127 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1141 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_UGT; ;}
     break;
 
   case 37:
-#line 1128 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1142 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_ULE; ;}
     break;
 
   case 38:
-#line 1128 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1142 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_UGE; ;}
     break;
 
   case 39:
-#line 1132 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1146 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_OEQ; ;}
     break;
 
   case 40:
-#line 1132 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1146 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_ONE; ;}
     break;
 
   case 41:
-#line 1133 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1147 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_OLT; ;}
     break;
 
   case 42:
-#line 1133 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1147 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_OGT; ;}
     break;
 
   case 43:
-#line 1134 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1148 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_OLE; ;}
     break;
 
   case 44:
-#line 1134 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1148 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_OGE; ;}
     break;
 
   case 45:
-#line 1135 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1149 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_ORD; ;}
     break;
 
   case 46:
-#line 1135 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1149 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_UNO; ;}
     break;
 
   case 47:
-#line 1136 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1150 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_UEQ; ;}
     break;
 
   case 48:
-#line 1136 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1150 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_UNE; ;}
     break;
 
   case 49:
-#line 1137 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1151 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_ULT; ;}
     break;
 
   case 50:
-#line 1137 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1151 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_UGT; ;}
     break;
 
   case 51:
-#line 1138 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1152 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_ULE; ;}
     break;
 
   case 52:
-#line 1138 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1152 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_UGE; ;}
     break;
 
   case 53:
-#line 1139 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1153 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_TRUE; ;}
     break;
 
   case 54:
-#line 1140 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1154 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_FALSE; ;}
     break;
 
   case 65:
-#line 1149 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1163 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.StrVal) = 0; ;}
     break;
 
   case 66:
-#line 1151 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1165 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal)=(yyvsp[(3) - (4)].UInt64Val); ;}
     break;
 
   case 67:
-#line 1152 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1166 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal)=0; ;}
     break;
 
   case 68:
-#line 1156 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1170 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.StrVal) = (yyvsp[(1) - (2)].StrVal);
     CHECK_FOR_ERROR
@@ -3751,7 +3775,7 @@
     break;
 
   case 69:
-#line 1160 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1174 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.StrVal) = 0;
     CHECK_FOR_ERROR
@@ -3759,7 +3783,7 @@
     break;
 
   case 73:
-#line 1168 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1182 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.StrVal) = 0;
     CHECK_FOR_ERROR
@@ -3767,7 +3791,7 @@
     break;
 
   case 74:
-#line 1173 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1187 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.StrVal) = (yyvsp[(1) - (2)].StrVal);
     CHECK_FOR_ERROR
@@ -3775,157 +3799,157 @@
     break;
 
   case 75:
-#line 1179 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1193 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::InternalLinkage; ;}
     break;
 
   case 76:
-#line 1180 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1194 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::WeakLinkage; ;}
     break;
 
   case 77:
-#line 1181 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1195 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;}
     break;
 
   case 78:
-#line 1182 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1196 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::AppendingLinkage; ;}
     break;
 
   case 79:
-#line 1183 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1197 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;}
     break;
 
   case 80:
-#line 1184 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1198 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::CommonLinkage; ;}
     break;
 
   case 81:
-#line 1188 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1202 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;}
     break;
 
   case 82:
-#line 1189 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1203 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;}
     break;
 
   case 83:
-#line 1190 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1204 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;}
     break;
 
   case 84:
-#line 1194 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1208 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Visibility) = GlobalValue::DefaultVisibility;   ;}
     break;
 
   case 85:
-#line 1195 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1209 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Visibility) = GlobalValue::DefaultVisibility;   ;}
     break;
 
   case 86:
-#line 1196 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1210 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Visibility) = GlobalValue::HiddenVisibility;    ;}
     break;
 
   case 87:
-#line 1197 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1211 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Visibility) = GlobalValue::ProtectedVisibility; ;}
     break;
 
   case 88:
-#line 1201 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1215 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;}
     break;
 
   case 89:
-#line 1202 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1216 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;}
     break;
 
   case 90:
-#line 1203 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1217 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;}
     break;
 
   case 91:
-#line 1207 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1221 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;}
     break;
 
   case 92:
-#line 1208 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1222 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::InternalLinkage; ;}
     break;
 
   case 93:
-#line 1209 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1223 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;}
     break;
 
   case 94:
-#line 1210 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1224 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::WeakLinkage; ;}
     break;
 
   case 95:
-#line 1211 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1225 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;}
     break;
 
   case 96:
-#line 1215 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1229 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;}
     break;
 
   case 97:
-#line 1216 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1230 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::WeakLinkage; ;}
     break;
 
   case 98:
-#line 1217 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1231 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::InternalLinkage; ;}
     break;
 
   case 99:
-#line 1220 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1234 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::C; ;}
     break;
 
   case 100:
-#line 1221 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1235 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::C; ;}
     break;
 
   case 101:
-#line 1222 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1236 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::Fast; ;}
     break;
 
   case 102:
-#line 1223 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1237 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::Cold; ;}
     break;
 
   case 103:
-#line 1224 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1238 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::X86_StdCall; ;}
     break;
 
   case 104:
-#line 1225 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1239 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::X86_FastCall; ;}
     break;
 
   case 105:
-#line 1226 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1240 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
                    if ((unsigned)(yyvsp[(2) - (2)].UInt64Val) != (yyvsp[(2) - (2)].UInt64Val))
                      GEN_ERROR("Calling conv too large");
@@ -3935,129 +3959,129 @@
     break;
 
   case 106:
-#line 1233 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1247 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::ZExt;      ;}
     break;
 
   case 107:
-#line 1234 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1248 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::ZExt;      ;}
     break;
 
   case 108:
-#line 1235 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1249 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::SExt;      ;}
     break;
 
   case 109:
-#line 1236 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1250 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::SExt;      ;}
     break;
 
   case 110:
-#line 1237 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1251 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::InReg;     ;}
     break;
 
   case 111:
-#line 1238 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1252 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::StructRet; ;}
     break;
 
   case 112:
-#line 1239 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1253 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::NoAlias;   ;}
     break;
 
   case 113:
-#line 1240 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1254 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::ByVal;     ;}
     break;
 
   case 114:
-#line 1241 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1255 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::Nest;      ;}
     break;
 
   case 115:
-#line 1242 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1256 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = 
                           ParamAttr::constructAlignmentFromInt((yyvsp[(2) - (2)].UInt64Val));    ;}
     break;
 
   case 116:
-#line 1246 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1260 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::None; ;}
     break;
 
   case 117:
-#line 1247 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1261 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
                 (yyval.ParamAttrs) = (yyvsp[(1) - (2)].ParamAttrs) | (yyvsp[(2) - (2)].ParamAttrs);
               ;}
     break;
 
   case 118:
-#line 1252 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1266 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::NoReturn; ;}
     break;
 
   case 119:
-#line 1253 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1267 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::NoUnwind; ;}
     break;
 
   case 120:
-#line 1254 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1268 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::ZExt;     ;}
     break;
 
   case 121:
-#line 1255 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1269 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::SExt;     ;}
     break;
 
   case 122:
-#line 1256 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1270 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::ReadNone; ;}
     break;
 
   case 123:
-#line 1257 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1271 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::ReadOnly; ;}
     break;
 
   case 124:
-#line 1260 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1274 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamAttrs) = ParamAttr::None; ;}
     break;
 
   case 125:
-#line 1261 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1275 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
                 (yyval.ParamAttrs) = (yyvsp[(1) - (2)].ParamAttrs) | (yyvsp[(2) - (2)].ParamAttrs);
               ;}
     break;
 
   case 126:
-#line 1266 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1280 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.StrVal) = 0; ;}
     break;
 
   case 127:
-#line 1267 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1281 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
                 (yyval.StrVal) = (yyvsp[(2) - (2)].StrVal);
               ;}
     break;
 
   case 128:
-#line 1274 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1288 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = 0; ;}
     break;
 
   case 129:
-#line 1275 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1289 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   (yyval.UIntVal) = (yyvsp[(2) - (2)].UInt64Val);
   if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal)))
@@ -4067,12 +4091,12 @@
     break;
 
   case 130:
-#line 1281 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1295 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = 0; ;}
     break;
 
   case 131:
-#line 1282 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1296 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   (yyval.UIntVal) = (yyvsp[(3) - (3)].UInt64Val);
   if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal)))
@@ -4082,7 +4106,7 @@
     break;
 
   case 132:
-#line 1291 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1305 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   for (unsigned i = 0, e = (yyvsp[(2) - (2)].StrVal)->length(); i != e; ++i)
     if ((*(yyvsp[(2) - (2)].StrVal))[i] == '"' || (*(yyvsp[(2) - (2)].StrVal))[i] == '\\')
@@ -4093,27 +4117,27 @@
     break;
 
   case 133:
-#line 1299 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1313 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.StrVal) = 0; ;}
     break;
 
   case 134:
-#line 1300 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1314 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.StrVal) = (yyvsp[(1) - (1)].StrVal); ;}
     break;
 
   case 135:
-#line 1305 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1319 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {;}
     break;
 
   case 136:
-#line 1306 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1320 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {;}
     break;
 
   case 137:
-#line 1307 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1321 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurGV->setSection(*(yyvsp[(1) - (1)].StrVal));
     delete (yyvsp[(1) - (1)].StrVal);
@@ -4122,7 +4146,7 @@
     break;
 
   case 138:
-#line 1312 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1326 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(2) - (2)].UInt64Val) != 0 && !isPowerOf2_32((yyvsp[(2) - (2)].UInt64Val)))
       GEN_ERROR("Alignment must be a power of two");
@@ -4132,7 +4156,7 @@
     break;
 
   case 146:
-#line 1328 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1342 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeVal) = new PATypeHolder(OpaqueType::get());
     CHECK_FOR_ERROR
@@ -4140,7 +4164,7 @@
     break;
 
   case 147:
-#line 1332 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1346 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeVal) = new PATypeHolder((yyvsp[(1) - (1)].PrimType));
     CHECK_FOR_ERROR
@@ -4148,7 +4172,7 @@
     break;
 
   case 148:
-#line 1336 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1350 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {                             // Pointer type?
     if (*(yyvsp[(1) - (3)].TypeVal) == Type::LabelTy)
       GEN_ERROR("Cannot form a pointer to a basic block");
@@ -4159,7 +4183,7 @@
     break;
 
   case 149:
-#line 1343 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1357 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {            // Named types are also simple types...
     const Type* tmp = getTypeVal((yyvsp[(1) - (1)].ValIDVal));
     CHECK_FOR_ERROR
@@ -4168,7 +4192,7 @@
     break;
 
   case 150:
-#line 1348 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1362 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {                   // Type UpReference
     if ((yyvsp[(2) - (2)].UInt64Val) > (uint64_t)~0U) GEN_ERROR("Value out of range");
     OpaqueType *OT = OpaqueType::get();        // Use temporary placeholder
@@ -4180,7 +4204,7 @@
     break;
 
   case 151:
-#line 1356 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1370 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // Allow but ignore attributes on function types; this permits auto-upgrade.
     // FIXME: remove in LLVM 3.0.
@@ -4213,7 +4237,7 @@
     break;
 
   case 152:
-#line 1385 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1399 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // Allow but ignore attributes on function types; this permits auto-upgrade.
     // FIXME: remove in LLVM 3.0.
@@ -4241,7 +4265,7 @@
     break;
 
   case 153:
-#line 1410 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1424 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {          // Sized array type?
     (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(ArrayType::get(*(yyvsp[(4) - (5)].TypeVal), (yyvsp[(2) - (5)].UInt64Val))));
     delete (yyvsp[(4) - (5)].TypeVal);
@@ -4250,7 +4274,7 @@
     break;
 
   case 154:
-#line 1415 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1429 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {          // Vector type?
      const llvm::Type* ElemTy = (yyvsp[(4) - (5)].TypeVal)->get();
      if ((unsigned)(yyvsp[(2) - (5)].UInt64Val) != (yyvsp[(2) - (5)].UInt64Val))
@@ -4264,7 +4288,7 @@
     break;
 
   case 155:
-#line 1425 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1439 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {                        // Structure type?
     std::vector<const Type*> Elements;
     for (std::list<llvm::PATypeHolder>::iterator I = (yyvsp[(2) - (3)].TypeList)->begin(),
@@ -4278,7 +4302,7 @@
     break;
 
   case 156:
-#line 1435 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1449 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {                                  // Empty structure type?
     (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector<const Type*>()));
     CHECK_FOR_ERROR
@@ -4286,7 +4310,7 @@
     break;
 
   case 157:
-#line 1439 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1453 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     std::vector<const Type*> Elements;
     for (std::list<llvm::PATypeHolder>::iterator I = (yyvsp[(3) - (5)].TypeList)->begin(),
@@ -4300,7 +4324,7 @@
     break;
 
   case 158:
-#line 1449 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1463 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {                         // Empty structure type?
     (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector<const Type*>(), true));
     CHECK_FOR_ERROR
@@ -4308,7 +4332,7 @@
     break;
 
   case 159:
-#line 1456 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1470 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // Allow but ignore attributes on function types; this permits auto-upgrade.
     // FIXME: remove in LLVM 3.0.
@@ -4318,7 +4342,7 @@
     break;
 
   case 160:
-#line 1465 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1479 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (1)].TypeVal))->getDescription());
@@ -4329,14 +4353,14 @@
     break;
 
   case 161:
-#line 1472 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1486 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeVal) = new PATypeHolder(Type::VoidTy);
   ;}
     break;
 
   case 162:
-#line 1477 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1491 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeWithAttrsList) = new TypeWithAttrsList();
     (yyval.TypeWithAttrsList)->push_back((yyvsp[(1) - (1)].TypeWithAttrs));
@@ -4345,7 +4369,7 @@
     break;
 
   case 163:
-#line 1482 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1496 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     ((yyval.TypeWithAttrsList)=(yyvsp[(1) - (3)].TypeWithAttrsList))->push_back((yyvsp[(3) - (3)].TypeWithAttrs));
     CHECK_FOR_ERROR
@@ -4353,7 +4377,7 @@
     break;
 
   case 165:
-#line 1490 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1504 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeWithAttrsList)=(yyvsp[(1) - (3)].TypeWithAttrsList);
     TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None;
@@ -4364,7 +4388,7 @@
     break;
 
   case 166:
-#line 1497 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1511 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeWithAttrsList) = new TypeWithAttrsList;
     TypeWithAttrs TWA; TWA.Attrs = ParamAttr::None;
@@ -4375,7 +4399,7 @@
     break;
 
   case 167:
-#line 1504 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1518 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeWithAttrsList) = new TypeWithAttrsList();
     CHECK_FOR_ERROR
@@ -4383,7 +4407,7 @@
     break;
 
   case 168:
-#line 1512 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1526 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeList) = new std::list<PATypeHolder>();
     (yyval.TypeList)->push_back(*(yyvsp[(1) - (1)].TypeVal)); 
@@ -4393,7 +4417,7 @@
     break;
 
   case 169:
-#line 1518 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1532 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     ((yyval.TypeList)=(yyvsp[(1) - (3)].TypeList))->push_back(*(yyvsp[(3) - (3)].TypeVal)); 
     delete (yyvsp[(3) - (3)].TypeVal);
@@ -4402,7 +4426,7 @@
     break;
 
   case 170:
-#line 1530 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1544 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Nonempty unsized arr
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (4)].TypeVal))->getDescription());
@@ -4434,7 +4458,7 @@
     break;
 
   case 171:
-#line 1558 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1572 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription());
@@ -4454,7 +4478,7 @@
     break;
 
   case 172:
-#line 1574 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1588 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription());
@@ -4485,7 +4509,7 @@
     break;
 
   case 173:
-#line 1601 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1615 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Nonempty unsized arr
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (4)].TypeVal))->getDescription());
@@ -4517,7 +4541,7 @@
     break;
 
   case 174:
-#line 1629 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1643 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const StructType *STy = dyn_cast<StructType>((yyvsp[(1) - (4)].TypeVal)->get());
     if (STy == 0)
@@ -4547,7 +4571,7 @@
     break;
 
   case 175:
-#line 1655 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1669 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription());
@@ -4571,7 +4595,7 @@
     break;
 
   case 176:
-#line 1675 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1689 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const StructType *STy = dyn_cast<StructType>((yyvsp[(1) - (6)].TypeVal)->get());
     if (STy == 0)
@@ -4601,7 +4625,7 @@
     break;
 
   case 177:
-#line 1701 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1715 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (5)].TypeVal))->getDescription());
@@ -4625,7 +4649,7 @@
     break;
 
   case 178:
-#line 1721 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1735 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -4641,7 +4665,7 @@
     break;
 
   case 179:
-#line 1733 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1747 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -4652,7 +4676,7 @@
     break;
 
   case 180:
-#line 1740 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1754 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -4722,7 +4746,7 @@
     break;
 
   case 181:
-#line 1806 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1820 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -4736,7 +4760,7 @@
     break;
 
   case 182:
-#line 1816 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1830 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -4750,7 +4774,7 @@
     break;
 
   case 183:
-#line 1826 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1840 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // integral constants
     if (!ConstantInt::isValueValidForType((yyvsp[(1) - (2)].PrimType), (yyvsp[(2) - (2)].SInt64Val)))
       GEN_ERROR("Constant value doesn't fit in type");
@@ -4760,7 +4784,7 @@
     break;
 
   case 184:
-#line 1832 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1846 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // arbitrary precision integer constants
     uint32_t BitWidth = cast<IntegerType>((yyvsp[(1) - (2)].PrimType))->getBitWidth();
     if ((yyvsp[(2) - (2)].APIntVal)->getBitWidth() > BitWidth) {
@@ -4774,7 +4798,7 @@
     break;
 
   case 185:
-#line 1842 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1856 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // integral constants
     if (!ConstantInt::isValueValidForType((yyvsp[(1) - (2)].PrimType), (yyvsp[(2) - (2)].UInt64Val)))
       GEN_ERROR("Constant value doesn't fit in type");
@@ -4784,7 +4808,7 @@
     break;
 
   case 186:
-#line 1848 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1862 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // arbitrary precision integer constants
     uint32_t BitWidth = cast<IntegerType>((yyvsp[(1) - (2)].PrimType))->getBitWidth();
     if ((yyvsp[(2) - (2)].APIntVal)->getBitWidth() > BitWidth) {
@@ -4798,7 +4822,7 @@
     break;
 
   case 187:
-#line 1858 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1872 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {                      // Boolean constants
     if (cast<IntegerType>((yyvsp[(1) - (2)].PrimType))->getBitWidth() != 1)
       GEN_ERROR("Constant true must have type i1");
@@ -4808,7 +4832,7 @@
     break;
 
   case 188:
-#line 1864 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1878 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {                     // Boolean constants
     if (cast<IntegerType>((yyvsp[(1) - (2)].PrimType))->getBitWidth() != 1)
       GEN_ERROR("Constant false must have type i1");
@@ -4818,7 +4842,7 @@
     break;
 
   case 189:
-#line 1870 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1884 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {                   // Floating point constants
     if (!ConstantFP::isValueValidForType((yyvsp[(1) - (2)].PrimType), *(yyvsp[(2) - (2)].FPVal)))
       GEN_ERROR("Floating point constant invalid for type");
@@ -4833,7 +4857,7 @@
     break;
 
   case 190:
-#line 1883 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1897 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(5) - (6)].TypeVal))->getDescription());
@@ -4849,7 +4873,7 @@
     break;
 
   case 191:
-#line 1895 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1909 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!isa<PointerType>((yyvsp[(3) - (5)].ConstVal)->getType()))
       GEN_ERROR("GetElementPtr requires a pointer operand");
@@ -4874,7 +4898,7 @@
     break;
 
   case 192:
-#line 1916 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1930 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(3) - (8)].ConstVal)->getType() != Type::Int1Ty)
       GEN_ERROR("Select condition must be of boolean type");
@@ -4886,7 +4910,7 @@
     break;
 
   case 193:
-#line 1924 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1938 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(3) - (6)].ConstVal)->getType() != (yyvsp[(5) - (6)].ConstVal)->getType())
       GEN_ERROR("Binary operator types must match");
@@ -4896,7 +4920,7 @@
     break;
 
   case 194:
-#line 1930 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1944 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(3) - (6)].ConstVal)->getType() != (yyvsp[(5) - (6)].ConstVal)->getType())
       GEN_ERROR("Logical operator types must match");
@@ -4911,7 +4935,7 @@
     break;
 
   case 195:
-#line 1941 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1955 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType())
       GEN_ERROR("icmp operand types must match");
@@ -4920,7 +4944,7 @@
     break;
 
   case 196:
-#line 1946 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1960 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType())
       GEN_ERROR("fcmp operand types must match");
@@ -4929,7 +4953,7 @@
     break;
 
   case 197:
-#line 1951 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1965 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType())
       GEN_ERROR("vicmp operand types must match");
@@ -4938,7 +4962,7 @@
     break;
 
   case 198:
-#line 1956 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1970 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType())
       GEN_ERROR("vfcmp operand types must match");
@@ -4947,7 +4971,7 @@
     break;
 
   case 199:
-#line 1961 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1975 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!ExtractElementInst::isValidOperands((yyvsp[(3) - (6)].ConstVal), (yyvsp[(5) - (6)].ConstVal)))
       GEN_ERROR("Invalid extractelement operands");
@@ -4957,7 +4981,7 @@
     break;
 
   case 200:
-#line 1967 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1981 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!InsertElementInst::isValidOperands((yyvsp[(3) - (8)].ConstVal), (yyvsp[(5) - (8)].ConstVal), (yyvsp[(7) - (8)].ConstVal)))
       GEN_ERROR("Invalid insertelement operands");
@@ -4967,7 +4991,7 @@
     break;
 
   case 201:
-#line 1973 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1987 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!ShuffleVectorInst::isValidOperands((yyvsp[(3) - (8)].ConstVal), (yyvsp[(5) - (8)].ConstVal), (yyvsp[(7) - (8)].ConstVal)))
       GEN_ERROR("Invalid shufflevector operands");
@@ -4977,7 +5001,7 @@
     break;
 
   case 202:
-#line 1979 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 1993 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!isa<StructType>((yyvsp[(3) - (5)].ConstVal)->getType()) && !isa<ArrayType>((yyvsp[(3) - (5)].ConstVal)->getType()))
       GEN_ERROR("ExtractValue requires an aggregate operand");
@@ -4989,7 +5013,7 @@
     break;
 
   case 203:
-#line 1987 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2001 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!isa<StructType>((yyvsp[(3) - (7)].ConstVal)->getType()) && !isa<ArrayType>((yyvsp[(3) - (7)].ConstVal)->getType()))
       GEN_ERROR("InsertValue requires an aggregate operand");
@@ -5001,7 +5025,7 @@
     break;
 
   case 204:
-#line 1998 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2012 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     ((yyval.ConstVector) = (yyvsp[(1) - (3)].ConstVector))->push_back((yyvsp[(3) - (3)].ConstVal));
     CHECK_FOR_ERROR
@@ -5009,7 +5033,7 @@
     break;
 
   case 205:
-#line 2002 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2016 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ConstVector) = new std::vector<Constant*>();
     (yyval.ConstVector)->push_back((yyvsp[(1) - (1)].ConstVal));
@@ -5018,27 +5042,27 @@
     break;
 
   case 206:
-#line 2010 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2024 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.BoolVal) = false; ;}
     break;
 
   case 207:
-#line 2010 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2024 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.BoolVal) = true; ;}
     break;
 
   case 208:
-#line 2013 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2027 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.BoolVal) = true; ;}
     break;
 
   case 209:
-#line 2013 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2027 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.BoolVal) = false; ;}
     break;
 
   case 210:
-#line 2016 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2030 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const Type* VTy = (yyvsp[(1) - (2)].TypeVal)->get();
     Value *V = getVal(VTy, (yyvsp[(2) - (2)].ValIDVal));
@@ -5054,7 +5078,7 @@
     break;
 
   case 211:
-#line 2028 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2042 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     Constant *Val = (yyvsp[(3) - (6)].ConstVal);
     const Type *DestTy = (yyvsp[(5) - (6)].TypeVal)->get();
@@ -5070,7 +5094,7 @@
     break;
 
   case 212:
-#line 2049 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2063 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule;
     CurModule.ModuleDone();
@@ -5079,7 +5103,7 @@
     break;
 
   case 213:
-#line 2054 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2068 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule;
     CurModule.ModuleDone();
@@ -5088,12 +5112,12 @@
     break;
 
   case 216:
-#line 2067 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2081 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { CurFun.isDeclare = false; ;}
     break;
 
   case 217:
-#line 2067 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2081 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurFun.FunctionDone();
     CHECK_FOR_ERROR
@@ -5101,26 +5125,26 @@
     break;
 
   case 218:
-#line 2071 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2085 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { CurFun.isDeclare = true; ;}
     break;
 
   case 219:
-#line 2071 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2085 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CHECK_FOR_ERROR
   ;}
     break;
 
   case 220:
-#line 2074 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2088 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CHECK_FOR_ERROR
   ;}
     break;
 
   case 221:
-#line 2077 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2091 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (3)].TypeVal))->getDescription());
@@ -5148,7 +5172,7 @@
     break;
 
   case 222:
-#line 2101 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2115 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     ResolveTypeTo((yyvsp[(1) - (3)].StrVal), (yyvsp[(3) - (3)].PrimType));
 
@@ -5163,7 +5187,7 @@
     break;
 
   case 223:
-#line 2113 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2127 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { 
     /* "Externally Visible" Linkage */
     if ((yyvsp[(5) - (6)].ConstVal) == 0) 
@@ -5175,14 +5199,14 @@
     break;
 
   case 224:
-#line 2120 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2134 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurGV = 0;
   ;}
     break;
 
   case 225:
-#line 2124 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2138 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(6) - (7)].ConstVal) == 0) 
       GEN_ERROR("Global value initializer is not a constant");
@@ -5192,14 +5216,14 @@
     break;
 
   case 226:
-#line 2129 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2143 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurGV = 0;
   ;}
     break;
 
   case 227:
-#line 2133 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2147 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(6) - (7)].TypeVal))->getDescription());
@@ -5210,7 +5234,7 @@
     break;
 
   case 228:
-#line 2139 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2153 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurGV = 0;
     CHECK_FOR_ERROR
@@ -5218,7 +5242,7 @@
     break;
 
   case 229:
-#line 2143 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2157 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     std::string Name;
     if ((yyvsp[(1) - (5)].StrVal)) {
@@ -5262,21 +5286,21 @@
     break;
 
   case 230:
-#line 2183 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2197 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { 
     CHECK_FOR_ERROR
   ;}
     break;
 
   case 231:
-#line 2186 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2200 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CHECK_FOR_ERROR
   ;}
     break;
 
   case 232:
-#line 2192 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2206 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   const std::string &AsmSoFar = CurModule.CurrentModule->getModuleInlineAsm();
   if (AsmSoFar.empty())
@@ -5289,7 +5313,7 @@
     break;
 
   case 233:
-#line 2202 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2216 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurModule.CurrentModule->setTargetTriple(*(yyvsp[(3) - (3)].StrVal));
     delete (yyvsp[(3) - (3)].StrVal);
@@ -5297,7 +5321,7 @@
     break;
 
   case 234:
-#line 2206 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2220 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurModule.CurrentModule->setDataLayout(*(yyvsp[(3) - (3)].StrVal));
     delete (yyvsp[(3) - (3)].StrVal);
@@ -5305,7 +5329,7 @@
     break;
 
   case 236:
-#line 2213 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2227 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
           CurModule.CurrentModule->addLibrary(*(yyvsp[(3) - (3)].StrVal));
           delete (yyvsp[(3) - (3)].StrVal);
@@ -5314,7 +5338,7 @@
     break;
 
   case 237:
-#line 2218 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2232 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
           CurModule.CurrentModule->addLibrary(*(yyvsp[(1) - (1)].StrVal));
           delete (yyvsp[(1) - (1)].StrVal);
@@ -5323,14 +5347,14 @@
     break;
 
   case 238:
-#line 2223 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2237 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
           CHECK_FOR_ERROR
         ;}
     break;
 
   case 239:
-#line 2232 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2246 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (5)].TypeVal))->getDescription());
@@ -5344,7 +5368,7 @@
     break;
 
   case 240:
-#line 2242 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2256 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription());
@@ -5358,7 +5382,7 @@
     break;
 
   case 241:
-#line 2253 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2267 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ArgList) = (yyvsp[(1) - (1)].ArgList);
     CHECK_FOR_ERROR
@@ -5366,7 +5390,7 @@
     break;
 
   case 242:
-#line 2257 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2271 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ArgList) = (yyvsp[(1) - (3)].ArgList);
     struct ArgListEntry E;
@@ -5379,7 +5403,7 @@
     break;
 
   case 243:
-#line 2266 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2280 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ArgList) = new ArgListType;
     struct ArgListEntry E;
@@ -5392,7 +5416,7 @@
     break;
 
   case 244:
-#line 2275 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2289 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ArgList) = 0;
     CHECK_FOR_ERROR
@@ -5400,7 +5424,7 @@
     break;
 
   case 245:
-#line 2281 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2295 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   std::string FunctionName(*(yyvsp[(3) - (10)].StrVal));
   delete (yyvsp[(3) - (10)].StrVal);  // Free strdup'd memory!
@@ -5531,7 +5555,7 @@
     break;
 
   case 248:
-#line 2411 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2425 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   (yyval.FunctionVal) = CurFun.CurrentFunction;
 
@@ -5543,7 +5567,7 @@
     break;
 
   case 251:
-#line 2422 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2436 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal);
   CHECK_FOR_ERROR
@@ -5551,7 +5575,7 @@
     break;
 
   case 252:
-#line 2427 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2441 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurFun.CurrentFunction->setLinkage((yyvsp[(1) - (3)].Linkage));
     CurFun.CurrentFunction->setVisibility((yyvsp[(2) - (3)].Visibility));
@@ -5562,7 +5586,7 @@
     break;
 
   case 253:
-#line 2439 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2453 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = false;
     CHECK_FOR_ERROR
@@ -5570,7 +5594,7 @@
     break;
 
   case 254:
-#line 2443 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2457 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = true;
     CHECK_FOR_ERROR
@@ -5578,7 +5602,7 @@
     break;
 
   case 255:
-#line 2448 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2462 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {    // A reference to a direct constant
     (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].SInt64Val));
     CHECK_FOR_ERROR
@@ -5586,7 +5610,7 @@
     break;
 
   case 256:
-#line 2452 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2466 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].UInt64Val));
     CHECK_FOR_ERROR
@@ -5594,55 +5618,73 @@
     break;
 
   case 257:
-#line 2456 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 2470 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
+    {      // arbitrary precision integer constants
+    (yyval.ValIDVal) = ValID::create(*(yyvsp[(1) - (1)].APIntVal), true);
+    delete (yyvsp[(1) - (1)].APIntVal);
+    CHECK_FOR_ERROR
+  ;}
+    break;
+
+  case 258:
+#line 2475 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
+    {      // arbitrary precision integer constants
+    (yyval.ValIDVal) = ValID::create(*(yyvsp[(1) - (1)].APIntVal), false);
+    delete (yyvsp[(1) - (1)].APIntVal);
+    CHECK_FOR_ERROR
+  ;}
+    break;
+
+  case 259:
+#line 2480 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {                     // Perhaps it's an FP constant?
     (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].FPVal));
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 258:
-#line 2460 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 260:
+#line 2484 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::create(ConstantInt::getTrue());
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 259:
-#line 2464 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 261:
+#line 2488 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::create(ConstantInt::getFalse());
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 260:
-#line 2468 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 262:
+#line 2492 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::createNull();
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 261:
-#line 2472 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 263:
+#line 2496 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::createUndef();
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 262:
-#line 2476 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 264:
+#line 2500 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {     // A vector zero constant.
     (yyval.ValIDVal) = ValID::createZeroInit();
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 263:
-#line 2480 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 265:
+#line 2504 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Nonempty unsized packed vector
     const Type *ETy = (*(yyvsp[(2) - (3)].ConstVector))[0]->getType();
     unsigned NumElements = (yyvsp[(2) - (3)].ConstVector)->size(); 
@@ -5667,8 +5709,8 @@
   ;}
     break;
 
-  case 264:
-#line 2502 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 266:
+#line 2526 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Nonempty unsized arr
     const Type *ETy = (*(yyvsp[(2) - (3)].ConstVector))[0]->getType();
     uint64_t NumElements = (yyvsp[(2) - (3)].ConstVector)->size(); 
@@ -5693,8 +5735,8 @@
   ;}
     break;
 
-  case 265:
-#line 2524 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 267:
+#line 2548 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // Use undef instead of an array because it's inconvenient to determine
     // the element type at this point, there being no elements to examine.
@@ -5703,8 +5745,8 @@
   ;}
     break;
 
-  case 266:
-#line 2530 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 268:
+#line 2554 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     uint64_t NumElements = (yyvsp[(2) - (2)].StrVal)->length();
     const Type *ETy = Type::Int8Ty;
@@ -5720,8 +5762,8 @@
   ;}
     break;
 
-  case 267:
-#line 2543 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 269:
+#line 2567 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     std::vector<const Type*> Elements((yyvsp[(2) - (3)].ConstVector)->size());
     for (unsigned i = 0, e = (yyvsp[(2) - (3)].ConstVector)->size(); i != e; ++i)
@@ -5736,8 +5778,8 @@
   ;}
     break;
 
-  case 268:
-#line 2555 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 270:
+#line 2579 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const StructType *STy = StructType::get(std::vector<const Type*>());
     (yyval.ValIDVal) = ValID::create(ConstantStruct::get(STy, std::vector<Constant*>()));
@@ -5745,8 +5787,8 @@
   ;}
     break;
 
-  case 269:
-#line 2560 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 271:
+#line 2584 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     std::vector<const Type*> Elements((yyvsp[(3) - (5)].ConstVector)->size());
     for (unsigned i = 0, e = (yyvsp[(3) - (5)].ConstVector)->size(); i != e; ++i)
@@ -5761,8 +5803,8 @@
   ;}
     break;
 
-  case 270:
-#line 2572 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 272:
+#line 2596 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const StructType *STy = StructType::get(std::vector<const Type*>(),
                                             /*isPacked=*/true);
@@ -5771,16 +5813,16 @@
   ;}
     break;
 
-  case 271:
-#line 2578 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 273:
+#line 2602 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].ConstVal));
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 272:
-#line 2582 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 274:
+#line 2606 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::createInlineAsm(*(yyvsp[(3) - (5)].StrVal), *(yyvsp[(5) - (5)].StrVal), (yyvsp[(2) - (5)].BoolVal));
     delete (yyvsp[(3) - (5)].StrVal);
@@ -5789,24 +5831,24 @@
   ;}
     break;
 
-  case 273:
-#line 2592 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 275:
+#line 2616 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {  // Is it an integer reference...?
     (yyval.ValIDVal) = ValID::createLocalID((yyvsp[(1) - (1)].UIntVal));
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 274:
-#line 2596 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 276:
+#line 2620 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::createGlobalID((yyvsp[(1) - (1)].UIntVal));
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 275:
-#line 2600 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 277:
+#line 2624 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {                   // Is it a named reference...?
     (yyval.ValIDVal) = ValID::createLocalName(*(yyvsp[(1) - (1)].StrVal));
     delete (yyvsp[(1) - (1)].StrVal);
@@ -5814,8 +5856,8 @@
   ;}
     break;
 
-  case 276:
-#line 2605 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 278:
+#line 2629 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {                   // Is it a named reference...?
     (yyval.ValIDVal) = ValID::createGlobalName(*(yyvsp[(1) - (1)].StrVal));
     delete (yyvsp[(1) - (1)].StrVal);
@@ -5823,8 +5865,8 @@
   ;}
     break;
 
-  case 279:
-#line 2618 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 281:
+#line 2642 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -5834,8 +5876,8 @@
   ;}
     break;
 
-  case 280:
-#line 2627 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 282:
+#line 2651 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValueList) = new std::vector<Value *>();
     (yyval.ValueList)->push_back((yyvsp[(1) - (1)].ValueVal)); 
@@ -5843,32 +5885,32 @@
   ;}
     break;
 
-  case 281:
-#line 2632 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 283:
+#line 2656 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     ((yyval.ValueList)=(yyvsp[(1) - (3)].ValueList))->push_back((yyvsp[(3) - (3)].ValueVal)); 
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 282:
-#line 2637 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 284:
+#line 2661 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal);
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 283:
-#line 2641 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 285:
+#line 2665 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Do not allow functions with 0 basic blocks   
     (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal);
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 284:
-#line 2650 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 286:
+#line 2674 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     setValueName((yyvsp[(3) - (3)].TermInstVal), (yyvsp[(2) - (3)].StrVal));
     CHECK_FOR_ERROR
@@ -5879,8 +5921,8 @@
   ;}
     break;
 
-  case 285:
-#line 2659 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 287:
+#line 2683 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (CastInst *CI1 = dyn_cast<CastInst>((yyvsp[(2) - (2)].InstVal)))
       if (CastInst *CI2 = dyn_cast<CastInst>(CI1->getOperand(0)))
@@ -5892,16 +5934,16 @@
   ;}
     break;
 
-  case 286:
-#line 2668 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 288:
+#line 2692 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {          // Empty space between instruction lists
     (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalID(CurFun.NextValNum));
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 287:
-#line 2672 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 289:
+#line 2696 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {             // Labelled (named) basic block
     (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalName(*(yyvsp[(1) - (1)].StrVal)));
     delete (yyvsp[(1) - (1)].StrVal);
@@ -5910,8 +5952,8 @@
   ;}
     break;
 
-  case 288:
-#line 2680 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 290:
+#line 2704 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Return with a result...
     ValueList &VL = *(yyvsp[(2) - (2)].ValueList);
     assert(!VL.empty() && "Invalid ret operands!");
@@ -5921,16 +5963,16 @@
   ;}
     break;
 
-  case 289:
-#line 2687 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 291:
+#line 2711 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {                                    // Return with no result...
     (yyval.TermInstVal) = ReturnInst::Create();
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 290:
-#line 2691 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 292:
+#line 2715 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {                           // Unconditional Branch...
     BasicBlock* tmpBB = getBBVal((yyvsp[(3) - (3)].ValIDVal));
     CHECK_FOR_ERROR
@@ -5938,8 +5980,8 @@
   ;}
     break;
 
-  case 291:
-#line 2696 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 293:
+#line 2720 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {  
     if (cast<IntegerType>((yyvsp[(2) - (9)].PrimType))->getBitWidth() != 1)
       GEN_ERROR("Branch condition must have type i1");
@@ -5953,8 +5995,8 @@
   ;}
     break;
 
-  case 292:
-#line 2707 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 294:
+#line 2731 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     Value* tmpVal = getVal((yyvsp[(2) - (9)].PrimType), (yyvsp[(3) - (9)].ValIDVal));
     CHECK_FOR_ERROR
@@ -5976,8 +6018,8 @@
   ;}
     break;
 
-  case 293:
-#line 2726 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 295:
+#line 2750 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     Value* tmpVal = getVal((yyvsp[(2) - (8)].PrimType), (yyvsp[(3) - (8)].ValIDVal));
     CHECK_FOR_ERROR
@@ -5989,8 +6031,8 @@
   ;}
     break;
 
-  case 294:
-#line 2736 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 296:
+#line 2760 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
 
     // Handle the short syntax
@@ -6078,24 +6120,24 @@
   ;}
     break;
 
-  case 295:
-#line 2821 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 297:
+#line 2845 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TermInstVal) = new UnwindInst();
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 296:
-#line 2825 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 298:
+#line 2849 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TermInstVal) = new UnreachableInst();
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 297:
-#line 2832 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 299:
+#line 2856 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.JumpTable) = (yyvsp[(1) - (6)].JumpTable);
     Constant *V = cast<Constant>(getExistingVal((yyvsp[(2) - (6)].PrimType), (yyvsp[(3) - (6)].ValIDVal)));
@@ -6109,8 +6151,8 @@
   ;}
     break;
 
-  case 298:
-#line 2843 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 300:
+#line 2867 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.JumpTable) = new std::vector<std::pair<Constant*, BasicBlock*> >();
     Constant *V = cast<Constant>(getExistingVal((yyvsp[(1) - (5)].PrimType), (yyvsp[(2) - (5)].ValIDVal)));
@@ -6125,8 +6167,8 @@
   ;}
     break;
 
-  case 299:
-#line 2856 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 301:
+#line 2880 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // Is this definition named?? if so, assign the name...
     setValueName((yyvsp[(2) - (2)].InstVal), (yyvsp[(1) - (2)].StrVal));
@@ -6137,8 +6179,8 @@
   ;}
     break;
 
-  case 300:
-#line 2866 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 302:
+#line 2890 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {    // Used for PHI nodes
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (6)].TypeVal))->getDescription());
@@ -6152,8 +6194,8 @@
   ;}
     break;
 
-  case 301:
-#line 2877 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 303:
+#line 2901 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.PHIList) = (yyvsp[(1) - (7)].PHIList);
     Value* tmpVal = getVal((yyvsp[(1) - (7)].PHIList)->front().first->getType(), (yyvsp[(4) - (7)].ValIDVal));
@@ -6164,8 +6206,8 @@
   ;}
     break;
 
-  case 302:
-#line 2887 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 304:
+#line 2911 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0
     if (!UpRefs.empty())
@@ -6179,8 +6221,8 @@
   ;}
     break;
 
-  case 303:
-#line 2898 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 305:
+#line 2922 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0
     // Labels are only valid in ASMs
@@ -6191,8 +6233,8 @@
   ;}
     break;
 
-  case 304:
-#line 2906 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 306:
+#line 2930 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0
     if (!UpRefs.empty())
@@ -6205,8 +6247,8 @@
   ;}
     break;
 
-  case 305:
-#line 2916 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 307:
+#line 2940 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // FIXME: Remove trailing OptParamAttrs in LLVM 3.0, it was a mistake in 2.0
     (yyval.ParamList) = (yyvsp[(1) - (6)].ParamList);
@@ -6216,18 +6258,18 @@
   ;}
     break;
 
-  case 306:
-#line 2923 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 308:
+#line 2947 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamList) = new ParamList(); ;}
     break;
 
-  case 307:
-#line 2926 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 309:
+#line 2950 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ValueList) = new std::vector<Value*>(); ;}
     break;
 
-  case 308:
-#line 2927 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 310:
+#line 2951 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValueList) = (yyvsp[(1) - (3)].ValueList);
     (yyval.ValueList)->push_back((yyvsp[(3) - (3)].ValueVal));
@@ -6235,8 +6277,8 @@
   ;}
     break;
 
-  case 309:
-#line 2935 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 311:
+#line 2959 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ConstantList) = new std::vector<unsigned>();
     if ((unsigned)(yyvsp[(2) - (2)].UInt64Val) != (yyvsp[(2) - (2)].UInt64Val))
@@ -6245,8 +6287,8 @@
   ;}
     break;
 
-  case 310:
-#line 2941 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 312:
+#line 2965 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ConstantList) = (yyvsp[(1) - (3)].ConstantList);
     if ((unsigned)(yyvsp[(3) - (3)].UInt64Val) != (yyvsp[(3) - (3)].UInt64Val))
@@ -6256,24 +6298,24 @@
   ;}
     break;
 
-  case 311:
-#line 2950 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 313:
+#line 2974 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = true;
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 312:
-#line 2954 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 314:
+#line 2978 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = false;
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 313:
-#line 2959 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 315:
+#line 2983 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (5)].TypeVal))->getDescription());
@@ -6292,8 +6334,8 @@
   ;}
     break;
 
-  case 314:
-#line 2975 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 316:
+#line 2999 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (5)].TypeVal))->getDescription());
@@ -6313,8 +6355,8 @@
   ;}
     break;
 
-  case 315:
-#line 2992 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 317:
+#line 3016 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription());
@@ -6331,8 +6373,8 @@
   ;}
     break;
 
-  case 316:
-#line 3006 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 318:
+#line 3030 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription());
@@ -6349,8 +6391,8 @@
   ;}
     break;
 
-  case 317:
-#line 3020 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 319:
+#line 3044 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription());
@@ -6367,8 +6409,8 @@
   ;}
     break;
 
-  case 318:
-#line 3034 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 320:
+#line 3058 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription());
@@ -6385,8 +6427,8 @@
   ;}
     break;
 
-  case 319:
-#line 3048 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 321:
+#line 3072 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(4) - (4)].TypeVal))->getDescription());
@@ -6401,8 +6443,8 @@
   ;}
     break;
 
-  case 320:
-#line 3060 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 322:
+#line 3084 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(2) - (6)].ValueVal)->getType() != Type::Int1Ty)
       GEN_ERROR("select condition must be boolean");
@@ -6413,8 +6455,8 @@
   ;}
     break;
 
-  case 321:
-#line 3068 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 323:
+#line 3092 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(4) - (4)].TypeVal))->getDescription());
@@ -6424,8 +6466,8 @@
   ;}
     break;
 
-  case 322:
-#line 3075 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 324:
+#line 3099 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!ExtractElementInst::isValidOperands((yyvsp[(2) - (4)].ValueVal), (yyvsp[(4) - (4)].ValueVal)))
       GEN_ERROR("Invalid extractelement operands");
@@ -6434,8 +6476,8 @@
   ;}
     break;
 
-  case 323:
-#line 3081 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 325:
+#line 3105 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!InsertElementInst::isValidOperands((yyvsp[(2) - (6)].ValueVal), (yyvsp[(4) - (6)].ValueVal), (yyvsp[(6) - (6)].ValueVal)))
       GEN_ERROR("Invalid insertelement operands");
@@ -6444,8 +6486,8 @@
   ;}
     break;
 
-  case 324:
-#line 3087 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 326:
+#line 3111 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!ShuffleVectorInst::isValidOperands((yyvsp[(2) - (6)].ValueVal), (yyvsp[(4) - (6)].ValueVal), (yyvsp[(6) - (6)].ValueVal)))
       GEN_ERROR("Invalid shufflevector operands");
@@ -6454,8 +6496,8 @@
   ;}
     break;
 
-  case 325:
-#line 3093 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 327:
+#line 3117 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const Type *Ty = (yyvsp[(2) - (2)].PHIList)->front().first->getType();
     if (!Ty->isFirstClassType())
@@ -6473,8 +6515,8 @@
   ;}
     break;
 
-  case 326:
-#line 3109 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 328:
+#line 3133 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
 
     // Handle the short syntax
@@ -6566,32 +6608,32 @@
   ;}
     break;
 
-  case 327:
-#line 3198 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 329:
+#line 3222 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.InstVal) = (yyvsp[(1) - (1)].InstVal);
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 328:
-#line 3203 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 330:
+#line 3227 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = true;
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 329:
-#line 3207 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 331:
+#line 3231 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = false;
     CHECK_FOR_ERROR
   ;}
     break;
 
-  case 330:
-#line 3214 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 332:
+#line 3238 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (3)].TypeVal))->getDescription());
@@ -6601,8 +6643,8 @@
   ;}
     break;
 
-  case 331:
-#line 3221 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 333:
+#line 3245 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (6)].TypeVal))->getDescription());
@@ -6615,8 +6657,8 @@
   ;}
     break;
 
-  case 332:
-#line 3231 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 334:
+#line 3255 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (3)].TypeVal))->getDescription());
@@ -6626,8 +6668,8 @@
   ;}
     break;
 
-  case 333:
-#line 3238 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 335:
+#line 3262 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (6)].TypeVal))->getDescription());
@@ -6640,8 +6682,8 @@
   ;}
     break;
 
-  case 334:
-#line 3248 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 336:
+#line 3272 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!isa<PointerType>((yyvsp[(2) - (2)].ValueVal)->getType()))
       GEN_ERROR("Trying to free nonpointer type " + 
@@ -6651,8 +6693,8 @@
   ;}
     break;
 
-  case 335:
-#line 3256 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 337:
+#line 3280 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (5)].TypeVal))->getDescription());
@@ -6669,8 +6711,8 @@
   ;}
     break;
 
-  case 336:
-#line 3270 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 338:
+#line 3294 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(5) - (7)].TypeVal))->getDescription());
@@ -6690,8 +6732,8 @@
   ;}
     break;
 
-  case 337:
-#line 3287 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 339:
+#line 3311 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   Value *TmpVal = getVal((yyvsp[(2) - (5)].TypeVal)->get(), (yyvsp[(3) - (5)].ValIDVal));
   if (!GetResultInst::isValidOperands(TmpVal, (yyvsp[(5) - (5)].UInt64Val)))
@@ -6702,8 +6744,8 @@
   ;}
     break;
 
-  case 338:
-#line 3295 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 340:
+#line 3319 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (4)].TypeVal))->getDescription());
@@ -6721,8 +6763,8 @@
   ;}
     break;
 
-  case 339:
-#line 3310 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 341:
+#line 3334 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (4)].TypeVal))->getDescription());
@@ -6740,8 +6782,8 @@
   ;}
     break;
 
-  case 340:
-#line 3325 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+  case 342:
+#line 3349 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (7)].TypeVal))->getDescription());
@@ -6763,7 +6805,7 @@
 
 
 /* Line 1267 of yacc.c.  */
-#line 6767 "llvmAsmParser.tab.c"
+#line 6809 "llvmAsmParser.tab.c"
       default: break;
     }
   YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
@@ -6977,7 +7019,7 @@
 }
 
 
-#line 3344 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 3368 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 
 
 // common code from the two 'RunVMAsmParser' functions

Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs?rev=53440&r1=53439&r2=53440&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs (original)
+++ llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs Thu Jul 10 19:30:39 2008
@@ -354,7 +354,7 @@
 
 #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
 typedef union YYSTYPE
-#line 953 "/Volumes/Data/Code/work/llvm2/lib/AsmParser/llvmAsmParser.y"
+#line 967 "/Users/sabre/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   llvm::Module                           *ModuleVal;
   llvm::Function                         *FunctionVal;

Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs?rev=53440&r1=53439&r2=53440&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs (original)
+++ llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Thu Jul 10 19:30:39 2008
@@ -402,6 +402,20 @@
     // This is really a signed reference.  Transmogrify.
     return ConstantInt::get(Ty, D.ConstPool64, true);
 
+  case ValID::ConstAPInt:     // Is it an unsigned const pool reference?
+    if (!isa<IntegerType>(Ty)) {
+      GenerateError("Integral constant '" + D.getName() +
+                    "' is invalid or out of range for type '" +
+                    Ty->getDescription() + "'");
+      return 0;
+    }
+      
+    {
+      APSInt Tmp = *D.ConstPoolInt;
+      Tmp.extOrTrunc(Ty->getPrimitiveSizeInBits());
+      return ConstantInt::get(Tmp);
+    }
+      
   case ValID::ConstFPVal:        // Is it a floating point const pool reference?
     if (!Ty->isFloatingPoint() ||
         !ConstantFP::isValueValidForType(Ty, *D.ConstPoolFP)) {
@@ -2453,6 +2467,16 @@
     $$ = ValID::create($1);
     CHECK_FOR_ERROR
   }
+  | ESAPINTVAL {      // arbitrary precision integer constants
+    $$ = ValID::create(*$1, true);
+    delete $1;
+    CHECK_FOR_ERROR
+  }  
+  | EUAPINTVAL {      // arbitrary precision integer constants
+    $$ = ValID::create(*$1, false);
+    delete $1;
+    CHECK_FOR_ERROR
+  }
   | FPVAL {                     // Perhaps it's an FP constant?
     $$ = ValID::create($1);
     CHECK_FOR_ERROR




From dalej at apple.com  Thu Jul 10 19:46:51 2008
From: dalej at apple.com (Dale Johannesen)
Date: Fri, 11 Jul 2008 00:46:51 -0000
Subject: [llvm-commits] [llvm] r53441 -
	/llvm/branches/Apple/Gaz/lib/Target/Sparc/SparcAsmPrinter.cpp
Message-ID: <200807110046.m6B0kps7008291@zion.cs.uiuc.edu>

Author: johannes
Date: Thu Jul 10 19:46:51 2008
New Revision: 53441

URL: http://llvm.org/viewvc/llvm-project?rev=53441&view=rev
Log:
Unbreak build in Gaz.


Modified:
    llvm/branches/Apple/Gaz/lib/Target/Sparc/SparcAsmPrinter.cpp

Modified: llvm/branches/Apple/Gaz/lib/Target/Sparc/SparcAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/Target/Sparc/SparcAsmPrinter.cpp?rev=53441&r1=53440&r2=53441&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/Target/Sparc/SparcAsmPrinter.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/Target/Sparc/SparcAsmPrinter.cpp Thu Jul 10 19:46:51 2008
@@ -32,6 +32,7 @@
 #include "llvm/Support/MathExtras.h"
 #include <cctype>
 #include <cstring>
+#include <map>
 using namespace llvm;
 
 STATISTIC(EmittedInsts, "Number of machine instrs printed");




From clattner at apple.com  Thu Jul 10 20:50:49 2008
From: clattner at apple.com (Chris Lattner)
Date: Thu, 10 Jul 2008 18:50:49 -0700
Subject: [llvm-commits] [llvm] r53210 - in /llvm/trunk:
	include/llvm/ADT/alist.h include/llvm/ADT/alist_node.h
	include/llvm/ADT/ilist.h include/llvm/Support/Recycler.h
	include/llvm/Support/RecyclingAllocator.h	include/llvm/SymbolTableListTraits.h
	lib/Support/Allocator.cpp
In-Reply-To: <CC9F0CD3-7161-47D4-BD15-FBEC46F625FF@apple.com>
References: <200807072258.m67MwFQk016076@zion.cs.uiuc.edu>
	<76615F2C-9D2B-4C68-ABD0-95B1AEECA854@apple.com>
	<CC9F0CD3-7161-47D4-BD15-FBEC46F625FF@apple.com>
Message-ID: <DC129B1A-A2D1-4FA2-85C7-B1C841583FF1@apple.com>


On Jul 10, 2008, at 4:28 PM, Dan Gohman wrote:

>>
>>
>>> +// do not implement. this is to catch errors when people try to use
>>> +// them as random access iterators
>>
>> isn't it better to just not implement them?  Then people will get a
>> compile time error instead of a link-time one.
>
> The whole situation in LLVM with iterators and pointers being
> two-way implicit-convertable has its conveniences, but it has
> its dark sides too. If the above aren't declared, overload
> resolution will make different choices.

Ok

>>> +/// alist - This class is an ilist-style container that
>>> automatically
>>> +/// adds the next/prev pointers. It is designed to work in
>>> cooperation
>>> +/// with <llvm/Support/Recycler.h>.
>>
>> Would it be possible to replace ilist with this or merge alist and
>> ilist?  When would someone use ilist vs alist?  When would someone  
>> use
>> alist vs ilist?
>
> Currently, alist is mostly just like ilist except that it doesn't
> require
> the element types to provide their own next+prev pointers. And it's
> Recycler-friendly.

Could (aka 'would it make sense for') ilist be made to do this?

>>> +/// Recycler - This class manages a linked-list of deallocated  
>>> nodes
>>> +/// and facilitates reusing deallocated memory in place of
>>> allocating
>>> +/// new memory. The objects it allocates are stored in alist_node
>>> +/// containers, so they may be used in alists.
>>> +///
>>
>> Ok, if this is the motivation for alist, I have to ask: isn't it
>> easier to just not try to use pointers in the nodes?  Why not blast
>> over the first two words of the recycled memory with next/prev
>> pointers regardless of what the type is?  It seems that doing so  
>> would
>> simplify the design fairly substantially.
>
> I'll think about it. Right now it's convenient for Recycler to
> "know" about alist_nodes, so that it can hide the details from
> its users.

Ok

-Chris


From sabre at nondot.org  Thu Jul 10 22:54:58 2008
From: sabre at nondot.org (Chris Lattner)
Date: Fri, 11 Jul 2008 03:54:58 -0000
Subject: [llvm-commits] [llvm] r53442 -
	/llvm/trunk/test/Transforms/InstCombine/JavaCompare.ll
Message-ID: <200807110354.m6B3swnl013920@zion.cs.uiuc.edu>

Author: lattner
Date: Thu Jul 10 22:54:57 2008
New Revision: 53442

URL: http://llvm.org/viewvc/llvm-project?rev=53442&view=rev
Log:
make this condition more precise.

Modified:
    llvm/trunk/test/Transforms/InstCombine/JavaCompare.ll

Modified: llvm/trunk/test/Transforms/InstCombine/JavaCompare.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/JavaCompare.ll?rev=53442&r1=53441&r2=53442&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/JavaCompare.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/JavaCompare.ll Thu Jul 10 22:54:57 2008
@@ -1,8 +1,7 @@
 ; This is the sequence of stuff that the Java front-end expands for a single 
 ; <= comparison.  Check to make sure we turn it into a <= (only)
 
-; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
-; RUN:    grep -v {icmp sle} | not grep #uses
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {%c3 = icmp sle i32 %A, %B}
 
 define i1 @le(i32 %A, i32 %B) {
         %c1 = icmp sgt i32 %A, %B               ; <i1> [#uses=1]




From sabre at nondot.org  Thu Jul 10 23:09:09 2008
From: sabre at nondot.org (Chris Lattner)
Date: Fri, 11 Jul 2008 04:09:09 -0000
Subject: [llvm-commits] [llvm] r53443 - in /llvm/trunk:
 lib/Transforms/Scalar/InstructionCombining.cpp
 test/Transforms/InstCombine/2008-07-10-CastSextBool.ll
Message-ID: <200807110409.m6B499PZ014358@zion.cs.uiuc.edu>

Author: lattner
Date: Thu Jul 10 23:09:09 2008
New Revision: 53443

URL: http://llvm.org/viewvc/llvm-project?rev=53443&view=rev
Log:
Fix a bogus optimization: folding (slt (zext i1 A to i32), 1) -> (slt i1 A, true)

This cause a regression in InstCombine/JavaCompare, which was doing the right
thing on accident.  To handle the missed case, generalize the comparisons based
on masked bits a little bit to handle comparisons against the max value. For 
example, we can now xform (slt i32 (and X, 4), 4) -> (setne i32 (and X, 4), 4)



Added:
    llvm/trunk/test/Transforms/InstCombine/2008-07-10-CastSextBool.ll
Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53443&r1=53442&r2=53443&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Thu Jul 10 23:09:09 2008
@@ -5230,7 +5230,7 @@
   // See if we are doing a comparison between a constant and an instruction that
   // can be folded into the comparison.
   if (ConstantInt *CI = dyn_cast<ConstantInt>(Op1)) {
-      Value *A, *B;
+    Value *A, *B;
     
     // (icmp ne/eq (sub A B) 0) -> (icmp ne/eq A, B)
     if (I.isEquality() && CI->isNullValue() &&
@@ -5396,6 +5396,8 @@
           return ReplaceInstUsesWith(I, ConstantInt::getTrue());
         if (Min.sgt(RHSVal))
           return ReplaceInstUsesWith(I, ConstantInt::getFalse());
+        if (Max == RHSVal)  // A <s MAX -> A != MAX
+          return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
         break;
       case ICmpInst::ICMP_SGT: 
         if (Min.sgt(RHSVal))
@@ -6300,12 +6302,11 @@
     //    %B = icmp ugt short %X, 1330 
     // because %A may have negative value. 
     //
-    // However, it is OK if SrcTy is bool (See cast-set.ll testcase)
-    // OR operation is EQ/NE.
-    if (isSignedExt == isSignedCmp || SrcTy == Type::Int1Ty || ICI.isEquality())
+    // However, we allow this when the compare is EQ/NE, because they are
+    // signless.
+    if (isSignedExt == isSignedCmp || ICI.isEquality())
       return new ICmpInst(ICI.getPredicate(), LHSCIOp, Res1);
-    else
-      return 0;
+    return 0;
   }
 
   // The re-extended constant changed so the constant cannot be represented 
@@ -6343,17 +6344,15 @@
 
   // Finally, return the value computed.
   if (ICI.getPredicate() == ICmpInst::ICMP_ULT ||
-      ICI.getPredicate() == ICmpInst::ICMP_SLT) {
+      ICI.getPredicate() == ICmpInst::ICMP_SLT)
     return ReplaceInstUsesWith(ICI, Result);
-  } else {
-    assert((ICI.getPredicate()==ICmpInst::ICMP_UGT || 
-            ICI.getPredicate()==ICmpInst::ICMP_SGT) &&
-           "ICmp should be folded!");
-    if (Constant *CI = dyn_cast<Constant>(Result))
-      return ReplaceInstUsesWith(ICI, ConstantExpr::getNot(CI));
-    else
-      return BinaryOperator::CreateNot(Result);
-  }
+
+  assert((ICI.getPredicate()==ICmpInst::ICMP_UGT || 
+          ICI.getPredicate()==ICmpInst::ICMP_SGT) &&
+         "ICmp should be folded!");
+  if (Constant *CI = dyn_cast<Constant>(Result))
+    return ReplaceInstUsesWith(ICI, ConstantExpr::getNot(CI));
+  return BinaryOperator::CreateNot(Result);
 }
 
 Instruction *InstCombiner::visitShl(BinaryOperator &I) {

Added: llvm/trunk/test/Transforms/InstCombine/2008-07-10-CastSextBool.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-07-10-CastSextBool.ll?rev=53443&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2008-07-10-CastSextBool.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/2008-07-10-CastSextBool.ll Thu Jul 10 23:09:09 2008
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {%C = xor i1 %A, true}
+; PR2539
+
+define i1 @test(i1 %A) {
+	%B = zext i1 %A to i32
+	%C = icmp slt i32 %B, 1
+	ret i1 %C
+}




From sabre at nondot.org  Thu Jul 10 23:20:58 2008
From: sabre at nondot.org (Chris Lattner)
Date: Fri, 11 Jul 2008 04:20:58 -0000
Subject: [llvm-commits] [llvm] r53444 - in /llvm/trunk:
 lib/Transforms/Scalar/InstructionCombining.cpp
 test/Transforms/InstCombine/2008-07-10-CastSextBool.ll
Message-ID: <200807110420.m6B4KwG0014723@zion.cs.uiuc.edu>

Author: lattner
Date: Thu Jul 10 23:20:58 2008
New Revision: 53444

URL: http://llvm.org/viewvc/llvm-project?rev=53444&view=rev
Log:
Fix folding of icmp's of i1 where the comparison is signed.  The code
was using the algorithm for folding unsigned comparisons which is
completely wrong.  This has been broken since the signless types change.

Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
    llvm/trunk/test/Transforms/InstCombine/2008-07-10-CastSextBool.ll

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53444&r1=53443&r2=53444&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Thu Jul 10 23:20:58 2008
@@ -5196,34 +5196,46 @@
   if (Ty == Type::Int1Ty) {
     switch (I.getPredicate()) {
     default: assert(0 && "Invalid icmp instruction!");
-    case ICmpInst::ICMP_EQ: {               // icmp eq bool %A, %B -> ~(A^B)
+    case ICmpInst::ICMP_EQ: {               // icmp eq i1 A, B -> ~(A^B)
       Instruction *Xor = BinaryOperator::CreateXor(Op0, Op1, I.getName()+"tmp");
       InsertNewInstBefore(Xor, I);
       return BinaryOperator::CreateNot(Xor);
     }
-    case ICmpInst::ICMP_NE:                  // icmp eq bool %A, %B -> A^B
+    case ICmpInst::ICMP_NE:                  // icmp eq i1 A, B -> A^B
       return BinaryOperator::CreateXor(Op0, Op1);
 
     case ICmpInst::ICMP_UGT:
-    case ICmpInst::ICMP_SGT:
-      std::swap(Op0, Op1);                   // Change icmp gt -> icmp lt
+      std::swap(Op0, Op1);                   // Change icmp ugt -> icmp ult
       // FALL THROUGH
-    case ICmpInst::ICMP_ULT:
-    case ICmpInst::ICMP_SLT: {               // icmp lt bool A, B -> ~X & Y
+    case ICmpInst::ICMP_ULT:{               // icmp ult i1 A, B -> ~A & B
       Instruction *Not = BinaryOperator::CreateNot(Op0, I.getName()+"tmp");
       InsertNewInstBefore(Not, I);
       return BinaryOperator::CreateAnd(Not, Op1);
     }
+    case ICmpInst::ICMP_SGT:
+      std::swap(Op0, Op1);                   // Change icmp sgt -> icmp slt
+      // FALL THROUGH
+    case ICmpInst::ICMP_SLT: {               // icmp slt i1 A, B -> A & ~B
+      Instruction *Not = BinaryOperator::CreateNot(Op1, I.getName()+"tmp");
+      InsertNewInstBefore(Not, I);
+      return BinaryOperator::CreateAnd(Not, Op0);
+    }
     case ICmpInst::ICMP_UGE:
-    case ICmpInst::ICMP_SGE:
-      std::swap(Op0, Op1);                   // Change icmp ge -> icmp le
+      std::swap(Op0, Op1);                   // Change icmp uge -> icmp ule
       // FALL THROUGH
-    case ICmpInst::ICMP_ULE:
-    case ICmpInst::ICMP_SLE: {               //  icmp le bool %A, %B -> ~A | B
+    case ICmpInst::ICMP_ULE: {               //  icmp ule i1 A, B -> ~A | B
       Instruction *Not = BinaryOperator::CreateNot(Op0, I.getName()+"tmp");
       InsertNewInstBefore(Not, I);
       return BinaryOperator::CreateOr(Not, Op1);
     }
+    case ICmpInst::ICMP_SGE:
+      std::swap(Op0, Op1);                   // Change icmp sge -> icmp sle
+      // FALL THROUGH
+    case ICmpInst::ICMP_SLE: {               //  icmp sle i1 A, B -> A | ~B
+      Instruction *Not = BinaryOperator::CreateNot(Op1, I.getName()+"tmp");
+      InsertNewInstBefore(Not, I);
+      return BinaryOperator::CreateOr(Not, Op0);
+    }
     }
   }
 

Modified: llvm/trunk/test/Transforms/InstCombine/2008-07-10-CastSextBool.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-07-10-CastSextBool.ll?rev=53444&r1=53443&r2=53444&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2008-07-10-CastSextBool.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/2008-07-10-CastSextBool.ll Thu Jul 10 23:20:58 2008
@@ -1,8 +1,17 @@
 ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {%C = xor i1 %A, true}
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {ret i1 false}
 ; PR2539
 
-define i1 @test(i1 %A) {
+define i1 @test1(i1 %A) {
 	%B = zext i1 %A to i32
 	%C = icmp slt i32 %B, 1
 	ret i1 %C
 }
+
+
+define i1 @test2(i1 zeroext  %b) {
+entry:
+	%cmptmp = icmp slt i1 %b, true		; <i1> [#uses=1]
+	ret i1 %cmptmp
+}
+




From sabre at nondot.org  Fri Jul 11 00:08:55 2008
From: sabre at nondot.org (Chris Lattner)
Date: Fri, 11 Jul 2008 05:08:55 -0000
Subject: [llvm-commits] [llvm] r53445 -
	/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200807110508.m6B58tKH016152@zion.cs.uiuc.edu>

Author: lattner
Date: Fri Jul 11 00:08:55 2008
New Revision: 53445

URL: http://llvm.org/viewvc/llvm-project?rev=53445&view=rev
Log:
fold away (x <= cst) earlier, allowing us to not have to 
handle them in some code.

Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53445&r1=53444&r2=53445&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Fri Jul 11 00:08:55 2008
@@ -5251,6 +5251,29 @@
       return new ICmpInst(I.getPredicate(), A, B);
     }
     
+    // If we have a icmp le or icmp ge instruction, turn it into the appropriate
+    // icmp lt or icmp gt instruction.  This allows us to rely on them being
+    // folded in the code below.
+    switch (I.getPredicate()) {
+    default: break;
+    case ICmpInst::ICMP_ULE:
+      if (CI->isMaxValue(false))                 // A <=u MAX -> TRUE
+        return ReplaceInstUsesWith(I, ConstantInt::getTrue());
+      return new ICmpInst(ICmpInst::ICMP_ULT, Op0, AddOne(CI));
+    case ICmpInst::ICMP_SLE:
+      if (CI->isMaxValue(true))                  // A <=s MAX -> TRUE
+        return ReplaceInstUsesWith(I, ConstantInt::getTrue());
+      return new ICmpInst(ICmpInst::ICMP_SLT, Op0, AddOne(CI));
+    case ICmpInst::ICMP_UGE:
+      if (CI->isMinValue(false))                 // A >=u MIN -> TRUE
+        return ReplaceInstUsesWith(I, ConstantInt::getTrue());
+      return new ICmpInst( ICmpInst::ICMP_UGT, Op0, SubOne(CI));
+    case ICmpInst::ICMP_SGE:
+      if (CI->isMinValue(true))                  // A >=s MIN -> TRUE
+        return ReplaceInstUsesWith(I, ConstantInt::getTrue());
+      return new ICmpInst(ICmpInst::ICMP_SGT, Op0, SubOne(CI));
+    }
+    
     switch (I.getPredicate()) {
     default: break;
     case ICmpInst::ICMP_ULT:                        // A <u MIN -> FALSE
@@ -5298,64 +5321,11 @@
       if (isMaxValueMinusOne(CI, true))           // A >s MAX-1 -> A == MAX
         return new ICmpInst(ICmpInst::ICMP_EQ, Op0, AddOne(CI));
       break;
-
-    case ICmpInst::ICMP_ULE:
-      if (CI->isMaxValue(false))                 // A <=u MAX -> TRUE
-        return ReplaceInstUsesWith(I, ConstantInt::getTrue());
-      if (CI->isMinValue(false))                 // A <=u MIN -> A == MIN
-        return new ICmpInst(ICmpInst::ICMP_EQ, Op0, Op1);
-      if (isMaxValueMinusOne(CI,false))          // A <=u MAX-1 -> A != MAX
-        return new ICmpInst(ICmpInst::ICMP_NE, Op0, AddOne(CI));
-      break;
-
-    case ICmpInst::ICMP_SLE:
-      if (CI->isMaxValue(true))                  // A <=s MAX -> TRUE
-        return ReplaceInstUsesWith(I, ConstantInt::getTrue());
-      if (CI->isMinValue(true))                  // A <=s MIN -> A == MIN
-        return new ICmpInst(ICmpInst::ICMP_EQ, Op0, Op1);
-      if (isMaxValueMinusOne(CI,true))           // A <=s MAX-1 -> A != MAX
-        return new ICmpInst(ICmpInst::ICMP_NE, Op0, AddOne(CI));
-      break;
-
-    case ICmpInst::ICMP_UGE:
-      if (CI->isMinValue(false))                 // A >=u MIN -> TRUE
-        return ReplaceInstUsesWith(I, ConstantInt::getTrue());
-      if (CI->isMaxValue(false))                 // A >=u MAX -> A == MAX
-        return new ICmpInst(ICmpInst::ICMP_EQ, Op0, Op1);
-      if (isMinValuePlusOne(CI,false))           // A >=u MIN-1 -> A != MIN
-        return new ICmpInst(ICmpInst::ICMP_NE, Op0, SubOne(CI));
-      break;
-
-    case ICmpInst::ICMP_SGE:
-      if (CI->isMinValue(true))                  // A >=s MIN -> TRUE
-        return ReplaceInstUsesWith(I, ConstantInt::getTrue());
-      if (CI->isMaxValue(true))                  // A >=s MAX -> A == MAX
-        return new ICmpInst(ICmpInst::ICMP_EQ, Op0, Op1);
-      if (isMinValuePlusOne(CI,true))            // A >=s MIN-1 -> A != MIN
-        return new ICmpInst(ICmpInst::ICMP_NE, Op0, SubOne(CI));
-      break;
     }
 
-    // If we still have a icmp le or icmp ge instruction, turn it into the
-    // appropriate icmp lt or icmp gt instruction.  Since the border cases have
-    // already been handled above, this requires little checking.
-    //
-    switch (I.getPredicate()) {
-    default: break;
-    case ICmpInst::ICMP_ULE: 
-      return new ICmpInst(ICmpInst::ICMP_ULT, Op0, AddOne(CI));
-    case ICmpInst::ICMP_SLE:
-      return new ICmpInst(ICmpInst::ICMP_SLT, Op0, AddOne(CI));
-    case ICmpInst::ICMP_UGE:
-      return new ICmpInst( ICmpInst::ICMP_UGT, Op0, SubOne(CI));
-    case ICmpInst::ICMP_SGE:
-      return new ICmpInst(ICmpInst::ICMP_SGT, Op0, SubOne(CI));
-    }
-    
     // See if we can fold the comparison based on bits known to be zero or one
     // in the input.  If this comparison is a normal comparison, it demands all
     // bits, if it is a sign bit comparison, it only demands the sign bit.
-    
     bool UnusedBit;
     bool isSignBit = isSignBitCheck(I.getPredicate(), CI, UnusedBit);
     
@@ -5368,56 +5338,51 @@
       return &I;
         
     // Given the known and unknown bits, compute a range that the LHS could be
-    // in.
-    if ((KnownOne | KnownZero) != 0) {
-      // Compute the Min, Max and RHS values based on the known bits. For the
-      // EQ and NE we use unsigned values.
-      APInt Min(BitWidth, 0), Max(BitWidth, 0);
-      const APInt& RHSVal = CI->getValue();
-      if (ICmpInst::isSignedPredicate(I.getPredicate())) {
-        ComputeSignedMinMaxValuesFromKnownBits(Ty, KnownZero, KnownOne, Min, 
-                                               Max);
-      } else {
-        ComputeUnsignedMinMaxValuesFromKnownBits(Ty, KnownZero, KnownOne, Min, 
-                                                 Max);
-      }
-      switch (I.getPredicate()) {  // LE/GE have been folded already.
-      default: assert(0 && "Unknown icmp opcode!");
-      case ICmpInst::ICMP_EQ:
-        if (Max.ult(RHSVal) || Min.ugt(RHSVal))
-          return ReplaceInstUsesWith(I, ConstantInt::getFalse());
-        break;
-      case ICmpInst::ICMP_NE:
-        if (Max.ult(RHSVal) || Min.ugt(RHSVal))
-          return ReplaceInstUsesWith(I, ConstantInt::getTrue());
-        break;
-      case ICmpInst::ICMP_ULT:
-        if (Max.ult(RHSVal))
-          return ReplaceInstUsesWith(I, ConstantInt::getTrue());
-        if (Min.uge(RHSVal))
-          return ReplaceInstUsesWith(I, ConstantInt::getFalse());
-        break;
-      case ICmpInst::ICMP_UGT:
-        if (Min.ugt(RHSVal))
-          return ReplaceInstUsesWith(I, ConstantInt::getTrue());
-        if (Max.ule(RHSVal))
-          return ReplaceInstUsesWith(I, ConstantInt::getFalse());
-        break;
-      case ICmpInst::ICMP_SLT:
-        if (Max.slt(RHSVal))
-          return ReplaceInstUsesWith(I, ConstantInt::getTrue());
-        if (Min.sgt(RHSVal))
-          return ReplaceInstUsesWith(I, ConstantInt::getFalse());
-        if (Max == RHSVal)  // A <s MAX -> A != MAX
-          return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
-        break;
-      case ICmpInst::ICMP_SGT: 
-        if (Min.sgt(RHSVal))
-          return ReplaceInstUsesWith(I, ConstantInt::getTrue());
-        if (Max.sle(RHSVal))
-          return ReplaceInstUsesWith(I, ConstantInt::getFalse());
-        break;
-      }
+    // in.  Compute the Min, Max and RHS values based on the known bits. For the
+    // EQ and NE we use unsigned values.
+    APInt Min(BitWidth, 0), Max(BitWidth, 0);
+    const APInt& RHSVal = CI->getValue();
+    if (ICmpInst::isSignedPredicate(I.getPredicate()))
+      ComputeSignedMinMaxValuesFromKnownBits(Ty, KnownZero, KnownOne, Min, Max);
+    else
+      ComputeUnsignedMinMaxValuesFromKnownBits(Ty, KnownZero, KnownOne,Min,Max);
+    
+    switch (I.getPredicate()) {  // LE/GE have been folded already.
+    default: assert(0 && "Unknown icmp opcode!");
+    case ICmpInst::ICMP_EQ:
+      if (Max.ult(RHSVal) || Min.ugt(RHSVal))
+        return ReplaceInstUsesWith(I, ConstantInt::getFalse());
+      break;
+    case ICmpInst::ICMP_NE:
+      if (Max.ult(RHSVal) || Min.ugt(RHSVal))
+        return ReplaceInstUsesWith(I, ConstantInt::getTrue());
+      break;
+    case ICmpInst::ICMP_ULT:
+      if (Max.ult(RHSVal))
+        return ReplaceInstUsesWith(I, ConstantInt::getTrue());
+      if (Min.uge(RHSVal))
+        return ReplaceInstUsesWith(I, ConstantInt::getFalse());
+      break;
+    case ICmpInst::ICMP_UGT:
+      if (Min.ugt(RHSVal))
+        return ReplaceInstUsesWith(I, ConstantInt::getTrue());
+      if (Max.ule(RHSVal))
+        return ReplaceInstUsesWith(I, ConstantInt::getFalse());
+      break;
+    case ICmpInst::ICMP_SLT:
+      if (Max.slt(RHSVal))
+        return ReplaceInstUsesWith(I, ConstantInt::getTrue());
+      if (Min.sgt(RHSVal))
+        return ReplaceInstUsesWith(I, ConstantInt::getFalse());
+      if (Max == RHSVal)  // A <s MAX -> A != MAX
+        return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
+      break;
+    case ICmpInst::ICMP_SGT: 
+      if (Min.sgt(RHSVal))
+        return ReplaceInstUsesWith(I, ConstantInt::getTrue());
+      if (Max.sle(RHSVal))
+        return ReplaceInstUsesWith(I, ConstantInt::getFalse());
+      break;
     }
           
     // Since the RHS is a ConstantInt (CI), if the left hand side is an 




From sabre at nondot.org  Fri Jul 11 00:40:06 2008
From: sabre at nondot.org (Chris Lattner)
Date: Fri, 11 Jul 2008 05:40:06 -0000
Subject: [llvm-commits] [llvm] r53446 -
	/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200807110540.m6B5e6KV017012@zion.cs.uiuc.edu>

Author: lattner
Date: Fri Jul 11 00:40:05 2008
New Revision: 53446

URL: http://llvm.org/viewvc/llvm-project?rev=53446&view=rev
Log:
simplify and merge a bunch of code.  Instead of comparing against
the min/max values for an integer type, compare against the min/max
values we can prove contain the input.  This might be a tighter bound,
so this is general goodness.

Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53446&r1=53445&r2=53446&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Fri Jul 11 00:40:05 2008
@@ -2964,24 +2964,6 @@
   return commonRemTransforms(I);
 }
 
-// isMaxValueMinusOne - return true if this is Max-1
-static bool isMaxValueMinusOne(const ConstantInt *C, bool isSigned) {
-  uint32_t TypeBits = C->getType()->getPrimitiveSizeInBits();
-  if (!isSigned)
-    return C->getValue() == APInt::getAllOnesValue(TypeBits) - 1;
-  return C->getValue() == APInt::getSignedMaxValue(TypeBits)-1;
-}
-
-// isMinValuePlusOne - return true if this is Min+1
-static bool isMinValuePlusOne(const ConstantInt *C, bool isSigned) {
-  if (!isSigned)
-    return C->getValue() == 1; // unsigned
-    
-  // Calculate 1111111111000000000000
-  uint32_t TypeBits = C->getType()->getPrimitiveSizeInBits();
-  return C->getValue() == APInt::getSignedMinValue(TypeBits)+1;
-}
-
 // isOneBitSet - Return true if there is exactly one bit set in the specified
 // constant.
 static bool isOneBitSet(const ConstantInt *CI) {
@@ -5274,63 +5256,16 @@
       return new ICmpInst(ICmpInst::ICMP_SGT, Op0, SubOne(CI));
     }
     
-    switch (I.getPredicate()) {
-    default: break;
-    case ICmpInst::ICMP_ULT:                        // A <u MIN -> FALSE
-      if (CI->isMinValue(false))
-        return ReplaceInstUsesWith(I, ConstantInt::getFalse());
-      if (CI->isMaxValue(false))                    // A <u MAX -> A != MAX
-        return new ICmpInst(ICmpInst::ICMP_NE, Op0,Op1);
-      if (isMinValuePlusOne(CI,false))              // A <u MIN+1 -> A == MIN
-        return new ICmpInst(ICmpInst::ICMP_EQ, Op0, SubOne(CI));
-      // (x <u 2147483648) -> (x >s -1)  -> true if sign bit clear
-      if (CI->isMinValue(true))
-        return new ICmpInst(ICmpInst::ICMP_SGT, Op0,
-                            ConstantInt::getAllOnesValue(Op0->getType()));
-          
-      break;
-
-    case ICmpInst::ICMP_SLT:
-      if (CI->isMinValue(true))                    // A <s MIN -> FALSE
-        return ReplaceInstUsesWith(I, ConstantInt::getFalse());
-      if (CI->isMaxValue(true))                    // A <s MAX -> A != MAX
-        return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
-      if (isMinValuePlusOne(CI,true))              // A <s MIN+1 -> A == MIN
-        return new ICmpInst(ICmpInst::ICMP_EQ, Op0, SubOne(CI));
-      break;
-
-    case ICmpInst::ICMP_UGT:
-      if (CI->isMaxValue(false))                  // A >u MAX -> FALSE
-        return ReplaceInstUsesWith(I, ConstantInt::getFalse());
-      if (CI->isMinValue(false))                  // A >u MIN -> A != MIN
-        return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
-      if (isMaxValueMinusOne(CI, false))          // A >u MAX-1 -> A == MAX
-        return new ICmpInst(ICmpInst::ICMP_EQ, Op0, AddOne(CI));
-        
-      // (x >u 2147483647) -> (x <s 0)  -> true if sign bit set
-      if (CI->isMaxValue(true))
-        return new ICmpInst(ICmpInst::ICMP_SLT, Op0,
-                            ConstantInt::getNullValue(Op0->getType()));
-      break;
-
-    case ICmpInst::ICMP_SGT:
-      if (CI->isMaxValue(true))                   // A >s MAX -> FALSE
-        return ReplaceInstUsesWith(I, ConstantInt::getFalse());
-      if (CI->isMinValue(true))                   // A >s MIN -> A != MIN
-        return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
-      if (isMaxValueMinusOne(CI, true))           // A >s MAX-1 -> A == MAX
-        return new ICmpInst(ICmpInst::ICMP_EQ, Op0, AddOne(CI));
-      break;
-    }
-
-    // See if we can fold the comparison based on bits known to be zero or one
-    // in the input.  If this comparison is a normal comparison, it demands all
+    // See if we can fold the comparison based on range information we can get
+    // by checking whether bits are known to be zero or one in the input.
+    uint32_t BitWidth = cast<IntegerType>(Ty)->getBitWidth();
+    APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
+    
+    // If this comparison is a normal comparison, it demands all
     // bits, if it is a sign bit comparison, it only demands the sign bit.
     bool UnusedBit;
     bool isSignBit = isSignBitCheck(I.getPredicate(), CI, UnusedBit);
     
-    uint32_t BitWidth = cast<IntegerType>(Ty)->getBitWidth();
-    APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
     if (SimplifyDemandedBits(Op0, 
                              isSignBit ? APInt::getSignBit(BitWidth)
                                        : APInt::getAllOnesValue(BitWidth),
@@ -5341,12 +5276,22 @@
     // in.  Compute the Min, Max and RHS values based on the known bits. For the
     // EQ and NE we use unsigned values.
     APInt Min(BitWidth, 0), Max(BitWidth, 0);
-    const APInt& RHSVal = CI->getValue();
     if (ICmpInst::isSignedPredicate(I.getPredicate()))
       ComputeSignedMinMaxValuesFromKnownBits(Ty, KnownZero, KnownOne, Min, Max);
     else
       ComputeUnsignedMinMaxValuesFromKnownBits(Ty, KnownZero, KnownOne,Min,Max);
     
+    // If Min and Max are known to be the same, then SimplifyDemandedBits
+    // figured out that the LHS is a constant.  Just constant fold this now so
+    // that code below can assume that Min != Max.
+    if (Min == Max)
+      return ReplaceInstUsesWith(I, ConstantExpr::getICmp(I.getPredicate(),
+                                                          ConstantInt::get(Min),
+                                                          CI));
+    
+    // Based on the range information we know about the LHS, see if we can
+    // simplify this comparison.  For example, (x&4) < 8  is always true.
+    const APInt &RHSVal = CI->getValue();
     switch (I.getPredicate()) {  // LE/GE have been folded already.
     default: assert(0 && "Unknown icmp opcode!");
     case ICmpInst::ICMP_EQ:
@@ -5358,30 +5303,56 @@
         return ReplaceInstUsesWith(I, ConstantInt::getTrue());
       break;
     case ICmpInst::ICMP_ULT:
-      if (Max.ult(RHSVal))
+      if (Max.ult(RHSVal))                    // A <u C -> true iff max(A) < C
         return ReplaceInstUsesWith(I, ConstantInt::getTrue());
-      if (Min.uge(RHSVal))
+      if (Min.uge(RHSVal))                    // A <u C -> false iff min(A) >= C
         return ReplaceInstUsesWith(I, ConstantInt::getFalse());
+      if (RHSVal == Max)                      // A <u MAX -> A != MAX
+        return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
+      if (RHSVal == Min+1)                    // A <u MIN+1 -> A == MIN
+        return new ICmpInst(ICmpInst::ICMP_EQ, Op0, SubOne(CI));
+        
+      // (x <u 2147483648) -> (x >s -1)  -> true if sign bit clear
+      if (CI->isMinValue(true))
+        return new ICmpInst(ICmpInst::ICMP_SGT, Op0,
+                            ConstantInt::getAllOnesValue(Op0->getType()));
       break;
     case ICmpInst::ICMP_UGT:
-      if (Min.ugt(RHSVal))
+      if (Min.ugt(RHSVal))                    // A >u C -> true iff min(A) > C
         return ReplaceInstUsesWith(I, ConstantInt::getTrue());
-      if (Max.ule(RHSVal))
+      if (Max.ule(RHSVal))                    // A >u C -> false iff max(A) <= C
         return ReplaceInstUsesWith(I, ConstantInt::getFalse());
+        
+      if (RHSVal == Min)                      // A >u MIN -> A != MIN
+        return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
+      if (RHSVal == Max-1)                    // A >u MAX-1 -> A == MAX
+        return new ICmpInst(ICmpInst::ICMP_EQ, Op0, AddOne(CI));
+      
+      // (x >u 2147483647) -> (x <s 0)  -> true if sign bit set
+      if (CI->isMaxValue(true))
+        return new ICmpInst(ICmpInst::ICMP_SLT, Op0,
+                            ConstantInt::getNullValue(Op0->getType()));
       break;
     case ICmpInst::ICMP_SLT:
-      if (Max.slt(RHSVal))
+      if (Max.slt(RHSVal))                    // A <s C -> true iff max(A) < C
         return ReplaceInstUsesWith(I, ConstantInt::getTrue());
-      if (Min.sgt(RHSVal))
+      if (Min.sgt(RHSVal))                    // A <s C -> false iff min(A) >= C
         return ReplaceInstUsesWith(I, ConstantInt::getFalse());
-      if (Max == RHSVal)  // A <s MAX -> A != MAX
+      if (RHSVal == Max)                      // A <s MAX -> A != MAX
+        return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
+      if (RHSVal == Min-1)                    // A <s MIN+1 -> A == MIN
         return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
       break;
     case ICmpInst::ICMP_SGT: 
-      if (Min.sgt(RHSVal))
+      if (Min.sgt(RHSVal))                    // A >s C -> true iff min(A) > C
         return ReplaceInstUsesWith(I, ConstantInt::getTrue());
-      if (Max.sle(RHSVal))
+      if (Max.sle(RHSVal))                    // A >s C -> false iff max(A) <= C
         return ReplaceInstUsesWith(I, ConstantInt::getFalse());
+        
+      if (RHSVal == Min)                      // A >s MIN -> A != MIN
+        return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
+      if (RHSVal == Max-1)                    // A >s MAX-1 -> A == MAX
+        return new ICmpInst(ICmpInst::ICMP_EQ, Op0, AddOne(CI));
       break;
     }
           




From sabre at nondot.org  Fri Jul 11 01:36:01 2008
From: sabre at nondot.org (Chris Lattner)
Date: Fri, 11 Jul 2008 06:36:01 -0000
Subject: [llvm-commits] [llvm] r53447 -
	/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200807110636.m6B6a2Kv018683@zion.cs.uiuc.edu>

Author: lattner
Date: Fri Jul 11 01:36:01 2008
New Revision: 53447

URL: http://llvm.org/viewvc/llvm-project?rev=53447&view=rev
Log:
fix a bug spotted by Eli's eagle eyes

Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53447&r1=53446&r2=53447&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Fri Jul 11 01:36:01 2008
@@ -5340,8 +5340,8 @@
         return ReplaceInstUsesWith(I, ConstantInt::getFalse());
       if (RHSVal == Max)                      // A <s MAX -> A != MAX
         return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
-      if (RHSVal == Min-1)                    // A <s MIN+1 -> A == MIN
-        return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
+      if (RHSVal == Min+1)                    // A <s MIN+1 -> A == MIN
+        return new ICmpInst(ICmpInst::ICMP_EQ, Op0, Op1);
       break;
     case ICmpInst::ICMP_SGT: 
       if (Min.sgt(RHSVal))                    // A >s C -> true iff min(A) > C




From sabre at nondot.org  Fri Jul 11 01:38:16 2008
From: sabre at nondot.org (Chris Lattner)
Date: Fri, 11 Jul 2008 06:38:16 -0000
Subject: [llvm-commits] [llvm] r53448 -
	/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200807110638.m6B6cGAN018760@zion.cs.uiuc.edu>

Author: lattner
Date: Fri Jul 11 01:38:16 2008
New Revision: 53448

URL: http://llvm.org/viewvc/llvm-project?rev=53448&view=rev
Log:
another bug in the same line.

Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53448&r1=53447&r2=53448&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Fri Jul 11 01:38:16 2008
@@ -5341,7 +5341,7 @@
       if (RHSVal == Max)                      // A <s MAX -> A != MAX
         return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);
       if (RHSVal == Min+1)                    // A <s MIN+1 -> A == MIN
-        return new ICmpInst(ICmpInst::ICMP_EQ, Op0, Op1);
+        return new ICmpInst(ICmpInst::ICMP_EQ, Op0, SubOne(CI));
       break;
     case ICmpInst::ICMP_SGT: 
       if (Min.sgt(RHSVal))                    // A >s C -> true iff min(A) > C




From sabre at nondot.org  Fri Jul 11 01:40:29 2008
From: sabre at nondot.org (Chris Lattner)
Date: Fri, 11 Jul 2008 06:40:29 -0000
Subject: [llvm-commits] [llvm] r53449 -
	/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200807110640.m6B6eTKR018856@zion.cs.uiuc.edu>

Author: lattner
Date: Fri Jul 11 01:40:29 2008
New Revision: 53449

URL: http://llvm.org/viewvc/llvm-project?rev=53449&view=rev
Log:
a missed optimization that Eli spotted

Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53449&r1=53448&r2=53449&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Fri Jul 11 01:40:29 2008
@@ -5336,7 +5336,7 @@
     case ICmpInst::ICMP_SLT:
       if (Max.slt(RHSVal))                    // A <s C -> true iff max(A) < C
         return ReplaceInstUsesWith(I, ConstantInt::getTrue());
-      if (Min.sgt(RHSVal))                    // A <s C -> false iff min(A) >= C
+      if (Min.sge(RHSVal))                    // A <s C -> false iff min(A) >= C
         return ReplaceInstUsesWith(I, ConstantInt::getFalse());
       if (RHSVal == Max)                      // A <s MAX -> A != MAX
         return new ICmpInst(ICmpInst::ICMP_NE, Op0, Op1);




From isanbard at gmail.com  Fri Jul 11 02:18:53 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Fri, 11 Jul 2008 07:18:53 -0000
Subject: [llvm-commits] [llvm] r53450 - in /llvm/trunk:
 lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/x86-64-frameaddr.ll
Message-ID: <200807110718.m6B7IrgP020038@zion.cs.uiuc.edu>

Author: void
Date: Fri Jul 11 02:18:52 2008
New Revision: 53450

URL: http://llvm.org/viewvc/llvm-project?rev=53450&view=rev
Log:
The frame address on an x86-64 box needs to be offset by -8, not -4.


Added:
    llvm/trunk/test/CodeGen/X86/x86-64-frameaddr.ll
Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=53450&r1=53449&r2=53450&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Jul 11 02:18:52 2008
@@ -5348,7 +5348,7 @@
     
   SDOperand RetAddrFI = getReturnAddressFrameIndex(DAG);
   return DAG.getNode(ISD::SUB, getPointerTy(), RetAddrFI, 
-                     DAG.getIntPtrConstant(4));
+                     DAG.getIntPtrConstant(!Subtarget->is64Bit() ? 4 : 8));
 }
 
 SDOperand X86TargetLowering::LowerFRAME_TO_ARGS_OFFSET(SDOperand Op,

Added: llvm/trunk/test/CodeGen/X86/x86-64-frameaddr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-frameaddr.ll?rev=53450&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-64-frameaddr.ll (added)
+++ llvm/trunk/test/CodeGen/X86/x86-64-frameaddr.ll Fri Jul 11 02:18:52 2008
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -march=x86-64 | grep {leaq	-8(%rsp), %rax}
+ at llvm.noinline = appending global [1 x i8*] [ i8* bitcast (i64* ()* @stack_end_address to i8*) ], section "llvm.metadata"
+
+define internal i64* @stack_end_address() nounwind  {
+entry:
+	tail call i8* @llvm.frameaddress( i32 0 )
+	bitcast i8* %0 to i64*
+	ret i64* %1
+}
+
+declare i8* @llvm.frameaddress(i32) nounwind readnone 




From asl at math.spbu.ru  Fri Jul 11 02:18:52 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Fri, 11 Jul 2008 11:18:52 +0400
Subject: [llvm-commits] [llvm] r53212 -
	in	/llvm/trunk:	include/llvm/CodeGen/
	lib/CodeGen/	lib/CodeGen/SelectionDAG/	lib/Target/ARM/
	lib/Target/Alpha/	lib/Target/CellSPU/	lib/Target/IA64/
	lib/Target/Mips/	lib/Target/PIC16/	lib/Target/PowerPC/
	lib/Target/Sparc/ lib/Target/X86/
In-Reply-To: <20080710205006.GB14307@pom.apple.com>
References: <200807072314.m67NER4K016634@zion.cs.uiuc.edu>
	<20080710205006.GB14307@pom.apple.com>
Message-ID: <1215760732.18285.18.camel@localhost>

Hello, Julien

> This patch seems to break llvm-gcc build on MingW32 (using gcc 3.4.5). I get
> the following assertion:

> Any idea ? 
I wasn't be able to reproduce this with llc running on linux, so I
assume some sort of miscompilation there. I'll try to figure out, what
can be wrong then.

-- 
With best regards, Anton Korobeynikov.

Faculty of Mathematics & Mechanics, Saint Petersburg State University.




From nicholas at mxc.ca  Fri Jul 11 02:20:54 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Fri, 11 Jul 2008 07:20:54 -0000
Subject: [llvm-commits] [llvm] r53451 - in /llvm/trunk:
 lib/Transforms/Scalar/InstructionCombining.cpp
 test/Transforms/InstCombine/2008-07-10-ICmpBinOp.ll
Message-ID: <200807110720.m6B7Ksqd020111@zion.cs.uiuc.edu>

Author: nicholas
Date: Fri Jul 11 02:20:53 2008
New Revision: 53451

URL: http://llvm.org/viewvc/llvm-project?rev=53451&view=rev
Log:
Add another optimization from PR2330. Also catch some missing cases that are
similar.

Added:
    llvm/trunk/test/Transforms/InstCombine/2008-07-10-ICmpBinOp.ll
Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53451&r1=53450&r2=53451&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Fri Jul 11 02:20:53 2008
@@ -5480,6 +5480,45 @@
         return R;
   }
   
+  // See if it's the same type of instruction on the left and right.
+  if (BinaryOperator *Op0I = dyn_cast<BinaryOperator>(Op0)) {
+    if (BinaryOperator *Op1I = dyn_cast<BinaryOperator>(Op1)) {
+      if (Op0I->getOpcode() == Op1I->getOpcode() && Op0I->hasOneUse() &&
+          Op1I->hasOneUse() && Op0I->getOperand(1) == Op1I->getOperand(1) &&
+          I.isEquality()) {
+	switch (Op0I->getOpcode()) {
+        default: break;
+        case Instruction::Add:
+        case Instruction::Sub:
+        case Instruction::Xor:
+          // a+x icmp eq/ne b+x --> a icmp b
+          return new ICmpInst(I.getPredicate(), Op0I->getOperand(0),
+                              Op1I->getOperand(0));
+          break;
+        case Instruction::Mul:
+          if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0I->getOperand(1))) {
+            // a * Cst icmp eq/ne b * Cst --> a & 0x7f icmp b & 0x7f
+            if (!CI->isZero() && !CI->isOne()) {
+              const APInt &AP = CI->getValue();
+              ConstantInt *Mask = ConstantInt::get(
+                                      APInt::getLowBitsSet(AP.getBitWidth(),
+                                                           AP.getBitWidth() -
+                                                      AP.countTrailingZeros()));
+              Instruction *And1 = BinaryOperator::CreateAnd(Op0I->getOperand(0),
+                                                            Mask);
+              Instruction *And2 = BinaryOperator::CreateAnd(Op1I->getOperand(0),
+                                                            Mask);
+              InsertNewInstBefore(And1, I);
+              InsertNewInstBefore(And2, I);
+              return new ICmpInst(I.getPredicate(), And1, And2);
+            }
+          }
+          break;
+        }
+      }
+    }
+  }
+  
   // ~x < ~y --> y < x
   { Value *A, *B;
     if (match(Op0, m_Not(m_Value(A))) &&

Added: llvm/trunk/test/Transforms/InstCombine/2008-07-10-ICmpBinOp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-07-10-ICmpBinOp.ll?rev=53451&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2008-07-10-ICmpBinOp.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/2008-07-10-ICmpBinOp.ll Fri Jul 11 02:20:53 2008
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep add
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep mul
+; PR2330
+
+define i1 @f(i32 %x, i32 %y) nounwind {
+entry:
+  %A = add i32 %x, 5
+  %B = add i32 %y, 5
+  %C = icmp eq i32 %A, %B
+  ret i1 %C
+}
+
+define i1 @g(i32 %x, i32 %y) nounwind {
+entry:
+  %A = mul i32 %x, 5
+  %B = mul i32 %y, 5
+  %C = icmp eq i32 %A, %B
+  ret i1 %C
+}




From nicholas at mxc.ca  Fri Jul 11 02:36:19 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Fri, 11 Jul 2008 07:36:19 -0000
Subject: [llvm-commits] [llvm] r53452 -
	/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200807110736.m6B7aJvO021908@zion.cs.uiuc.edu>

Author: nicholas
Date: Fri Jul 11 02:36:19 2008
New Revision: 53452

URL: http://llvm.org/viewvc/llvm-project?rev=53452&view=rev
Log:
Remove misleading constant from comment.

Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53452&r1=53451&r2=53452&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Fri Jul 11 02:36:19 2008
@@ -5497,7 +5497,7 @@
           break;
         case Instruction::Mul:
           if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0I->getOperand(1))) {
-            // a * Cst icmp eq/ne b * Cst --> a & 0x7f icmp b & 0x7f
+            // a * Cst icmp eq/ne b * Cst --> a & Mask icmp b & Mask
             if (!CI->isZero() && !CI->isOne()) {
               const APInt &AP = CI->getValue();
               ConstantInt *Mask = ConstantInt::get(




From baldrick at free.fr  Fri Jul 11 02:37:31 2008
From: baldrick at free.fr (Duncan Sands)
Date: Fri, 11 Jul 2008 07:37:31 -0000
Subject: [llvm-commits] [llvm] r53453 -
	/llvm/trunk/lib/AsmParser/ParserInternals.h
Message-ID: <200807110737.m6B7bVdm022267@zion.cs.uiuc.edu>

Author: baldrick
Date: Fri Jul 11 02:37:30 2008
New Revision: 53453

URL: http://llvm.org/viewvc/llvm-project?rev=53453&view=rev
Log:
Align comments, colons and cases.  Remove trailing
whitespace.

Modified:
    llvm/trunk/lib/AsmParser/ParserInternals.h

Modified: llvm/trunk/lib/AsmParser/ParserInternals.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/ParserInternals.h?rev=53453&r1=53452&r2=53453&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/ParserInternals.h (original)
+++ llvm/trunk/lib/AsmParser/ParserInternals.h Fri Jul 11 02:37:30 2008
@@ -57,7 +57,7 @@
 struct InlineAsmDescriptor {
   std::string AsmString, Constraints;
   bool HasSideEffects;
-  
+
   InlineAsmDescriptor(const std::string &as, const std::string &c, bool HSE)
     : AsmString(as), Constraints(c), HasSideEffects(HSE) {}
 };
@@ -79,10 +79,10 @@
 
   union {
     unsigned Num;            // If it's a numeric reference like %1234
-    std::string *Name;    // If it's a named reference.  Memory must be deleted.
+    std::string *Name;       // If it's a named reference.  Memory must be deleted.
     int64_t  ConstPool64;    // Constant pool reference.  This is the value
     uint64_t UConstPool64;   // Unsigned constant pool reference.
-    APSInt *ConstPoolInt;     // Large Integer constant pool reference
+    APSInt *ConstPoolInt;    // Large Integer constant pool reference
     APFloat *ConstPoolFP;    // Floating point constant pool reference
     Constant *ConstantValue; // Fully resolved constant for ConstantVal case.
     InlineAsmDescriptor *IAD;
@@ -100,7 +100,7 @@
   static ValID createGlobalName(const std::string &Name) {
     ValID D; D.Type = GlobalName; D.Name = new std::string(Name); return D;
   }
-  
+
   static ValID create(int64_t Val) {
     ValID D; D.Type = ConstSIntVal; D.ConstPool64 = Val; return D;
   }
@@ -112,14 +112,14 @@
   static ValID create(APFloat *Val) {
     ValID D; D.Type = ConstFPVal; D.ConstPoolFP = Val; return D;
   }
-  
+
   static ValID create(const APInt &Val, bool isSigned) {
     ValID D; D.Type = ConstAPInt;
     D.ConstPoolInt = new APSInt(Val, !isSigned);
     return D;
   }
-  
-  
+
+
   static ValID createNull() {
     ValID D; D.Type = ConstNullVal; return D;
   }
@@ -131,11 +131,11 @@
   static ValID createZeroInit() {
     ValID D; D.Type = ConstZeroVal; return D;
   }
-  
+
   static ValID create(Constant *Val) {
     ValID D; D.Type = ConstantVal; D.ConstantValue = Val; return D;
   }
-  
+
   static ValID createInlineAsm(const std::string &AsmString,
                                const std::string &Constraints,
                                bool HasSideEffects) {
@@ -158,7 +158,7 @@
     ValID Result = *this;
     if (Type == ConstAPInt)
       Result.ConstPoolInt = new APSInt(*ConstPoolInt);
-    
+
     if (Type != LocalName && Type != GlobalName) return Result;
     Result.Name = new std::string(*Name);
     return Result;
@@ -197,12 +197,12 @@
     case GlobalName:    return *Name < *V.Name;
     case ConstSIntVal:  return ConstPool64  < V.ConstPool64;
     case ConstUIntVal:  return UConstPool64 < V.UConstPool64;
-    case ConstAPInt    : return ConstPoolInt->ult(*V.ConstPoolInt);
+    case ConstAPInt:    return ConstPoolInt->ult(*V.ConstPoolInt);
     case ConstFPVal:    return ConstPoolFP->compare(*V.ConstPoolFP) ==
                                APFloat::cmpLessThan;
     case ConstNullVal:  return false;
     case ConstUndefVal: return false;
-    case ConstZeroVal: return false;
+    case ConstZeroVal:  return false;
     case ConstantVal:   return ConstantValue < V.ConstantValue;
     default:  assert(0 && "Unknown value type!"); return false;
     }
@@ -210,17 +210,17 @@
 
   bool operator==(const ValID &V) const {
     if (Type != V.Type) return false;
-    
+
     switch (Type) {
     default:  assert(0 && "Unknown value type!");
     case LocalID:
-    case GlobalID: return Num == V.Num;
+    case GlobalID:      return Num == V.Num;
     case LocalName:
-    case GlobalName: return *Name == *(V.Name);
+    case GlobalName:    return *Name == *(V.Name);
     case ConstSIntVal:  return ConstPool64  == V.ConstPool64;
     case ConstUIntVal:  return UConstPool64 == V.UConstPool64;
     case ConstAPInt:    return *ConstPoolInt == *V.ConstPoolInt;
-    case ConstFPVal:    return ConstPoolFP->compare(*V.ConstPoolFP) == 
+    case ConstFPVal:    return ConstPoolFP->compare(*V.ConstPoolFP) ==
                                APFloat::cmpEqual;
     case ConstantVal:   return ConstantValue == V.ConstantValue;
     case ConstNullVal:  return true;
@@ -235,7 +235,7 @@
   ParameterAttributes Attrs;
 };
 
-typedef std::vector<TypeWithAttrs> TypeWithAttrsList; 
+typedef std::vector<TypeWithAttrs> TypeWithAttrsList;
 
 struct ArgListEntry {
   ParameterAttributes Attrs;




From baldrick at free.fr  Fri Jul 11 02:51:40 2008
From: baldrick at free.fr (Duncan Sands)
Date: Fri, 11 Jul 2008 09:51:40 +0200
Subject: [llvm-commits] [llvm] r53452 -
	/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
In-Reply-To: <200807110736.m6B7aJvO021908@zion.cs.uiuc.edu>
References: <200807110736.m6B7aJvO021908@zion.cs.uiuc.edu>
Message-ID: <200807110951.40781.baldrick@free.fr>

Hi Nick,

> +            // a * Cst icmp eq/ne b * Cst --> a & Mask icmp b & Mask

try a=4, b=0 and Cst=3 with i8 arithmetic.

Ciao,

Duncan.

PS: The reverse implication seems to be true, though that's not
much help to instcombine :)


From nicholas at mxc.ca  Fri Jul 11 03:16:26 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Fri, 11 Jul 2008 08:16:26 -0000
Subject: [llvm-commits] [llvm] r53454 -
	/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200807110816.m6B8GQW5032175@zion.cs.uiuc.edu>

Author: nicholas
Date: Fri Jul 11 03:16:26 2008
New Revision: 53454

URL: http://llvm.org/viewvc/llvm-project?rev=53454&view=rev
Log:
Document 'mask' in this calculation.

Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53454&r1=53453&r2=53454&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Fri Jul 11 03:16:26 2008
@@ -5498,6 +5498,7 @@
         case Instruction::Mul:
           if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0I->getOperand(1))) {
             // a * Cst icmp eq/ne b * Cst --> a & Mask icmp b & Mask
+            // Mask = -1 >> count-trailing-zeros(Cst).
             if (!CI->isZero() && !CI->isOne()) {
               const APInt &AP = CI->getValue();
               ConstantInt *Mask = ConstantInt::get(




From rafael.espindola at gmail.com  Fri Jul 11 07:33:06 2008
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Fri, 11 Jul 2008 12:33:06 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53455 -
	/llvm-gcc-4.2/trunk/gcc/cppdefault.c
Message-ID: <200807111233.m6BCX6d7007747@zion.cs.uiuc.edu>

Author: rafael
Date: Fri Jul 11 07:33:04 2008
New Revision: 53455

URL: http://llvm.org/viewvc/llvm-project?rev=53455&view=rev
Log:
get --with-sysroot to work  on non-darwin systems.

Modified:
    llvm-gcc-4.2/trunk/gcc/cppdefault.c

Modified: llvm-gcc-4.2/trunk/gcc/cppdefault.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cppdefault.c?rev=53455&r1=53454&r2=53455&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/cppdefault.c (original)
+++ llvm-gcc-4.2/trunk/gcc/cppdefault.c Fri Jul 11 07:33:04 2008
@@ -46,6 +46,11 @@
 /* APPLE LOCAL begin SDK 3886137.  */
 /* Allow -isysroot to override ALL  include patchs. This is done by
    setting add_sysroot for all default inclue paths.  */
+#ifdef CONFIG_DARWIN_H
+#define ADD_SYSROOT 1
+#else
+#define ADD_SYSROOT 0
+#endif
 const struct default_include cpp_include_defaults[]
 #ifdef INCLUDE_DEFAULTS
 = INCLUDE_DEFAULTS;
@@ -53,34 +58,34 @@
 = {
 #ifdef GPLUSPLUS_INCLUDE_DIR
     /* Pick up GNU C++ generic include files.  */
-    { GPLUSPLUS_INCLUDE_DIR, "G++", 1, 1, 1, 0 },
+    { GPLUSPLUS_INCLUDE_DIR, "G++", 1, 1, ADD_SYSROOT, 0 },
 #endif
 #ifdef GPLUSPLUS_TOOL_INCLUDE_DIR
     /* Pick up GNU C++ target-dependent include files.  */
-    { GPLUSPLUS_TOOL_INCLUDE_DIR, "G++", 1, 1, 1, 1 },
+    { GPLUSPLUS_TOOL_INCLUDE_DIR, "G++", 1, 1, ADD_SYSROOT, 1 },
 #endif
 #ifdef GPLUSPLUS_BACKWARD_INCLUDE_DIR
     /* Pick up GNU C++ backward and deprecated include files.  */
-    { GPLUSPLUS_BACKWARD_INCLUDE_DIR, "G++", 1, 1, 1, 0 },
+    { GPLUSPLUS_BACKWARD_INCLUDE_DIR, "G++", 1, 1, ADD_SYSROOT, 0 },
 #endif
 #ifdef LOCAL_INCLUDE_DIR
     /* /usr/local/include comes before the fixincluded header files.  */
     { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 0 },
 #endif
 #ifdef PREFIX_INCLUDE_DIR
-    { PREFIX_INCLUDE_DIR, 0, 0, 1, 1, 0 },
+    { PREFIX_INCLUDE_DIR, 0, 0, 1, ADD_SYSROOT, 0 },
 #endif
 #ifdef GCC_INCLUDE_DIR
     /* This is the dir for fixincludes and for gcc's private headers.  */
-    { GCC_INCLUDE_DIR, "GCC", 0, 0, 1, 0 },
+    { GCC_INCLUDE_DIR, "GCC", 0, 0, ADD_SYSROOT, 0 },
 #endif
 #ifdef CROSS_INCLUDE_DIR
     /* One place the target system's headers might be.  */
-    { CROSS_INCLUDE_DIR, "GCC", 0, 0, 1, 0 },
+    { CROSS_INCLUDE_DIR, "GCC", 0, 0, ADD_SYSROOT, 0 },
 #endif
 #ifdef TOOL_INCLUDE_DIR
     /* Another place the target system's headers might be.  */
-    { TOOL_INCLUDE_DIR, "BINUTILS", 0, 1, 1, 0 },
+    { TOOL_INCLUDE_DIR, "BINUTILS", 0, 1, ADD_SYSROOT, 0 },
 #endif
 #ifdef SYSTEM_INCLUDE_DIR
     /* Some systems have an extra dir of include files.  */
@@ -94,6 +99,7 @@
   };
 #endif /* no INCLUDE_DEFAULTS */
 
+#undef ADD_SYSROOT
 /* APPLE LOCAL end SDK 3886137.  */
 
 #ifdef GCC_INCLUDE_DIR




From espindola at google.com  Fri Jul 11 07:34:07 2008
From: espindola at google.com (Rafael Espindola)
Date: Fri, 11 Jul 2008 13:34:07 +0100
Subject: [llvm-commits] getting -with-sysroot to work
In-Reply-To: <80FE7B3E-2C20-42A4-A31C-63551CFFCFCC@apple.com>
References: <38a0d8450807041108q249ee5ces68f1af5ee1566e14@mail.gmail.com>
	<80FE7B3E-2C20-42A4-A31C-63551CFFCFCC@apple.com>
Message-ID: <38a0d8450807110534i451b06dep797d37dbb9214054@mail.gmail.com>

> The change reflects the way compiler SDKs are installed and searched
> by Apple gcc is used. Feel free to add a configure flag to make
> appropriate changes for your platform, but pl. don't change compiler
> behavior on darwin :)

Done: 53455

> -
> Devang
>

Cheers,
-- 
Rafael Avila de Espindola

Google Ireland Ltd.
Gordon House
Barrow Street
Dublin 4
Ireland

Registered in Dublin, Ireland
Registration Number: 368047


From espindola at google.com  Fri Jul 11 09:37:28 2008
From: espindola at google.com (Rafael Espindola)
Date: Fri, 11 Jul 2008 15:37:28 +0100
Subject: [llvm-commits] What do we do with ChangeLogs when back porting
	patches to llvm-gcc?
Message-ID: <38a0d8450807110737m6ba8a84fs7683f19d0b933ce7@mail.gmail.com>

I would like to port

http://gcc.gnu.org/viewcvs?view=rev&revision=127716

Into llvm-gcc. At the time there was no COPYING3 file, so this should
be OK, but I was wondering what is normally done with the ChangeLog.

I would love to just put it on the commit log, but I am not sure if
that is the practice on llvm-gcc :-)

Cheers,
-- 
Rafael Avila de Espindola

Google Ireland Ltd.
Gordon House
Barrow Street
Dublin 4
Ireland

Registered in Dublin, Ireland
Registration Number: 368047


From baldrick at free.fr  Fri Jul 11 09:44:09 2008
From: baldrick at free.fr (Duncan Sands)
Date: Fri, 11 Jul 2008 16:44:09 +0200
Subject: [llvm-commits] What do we do with ChangeLogs when back porting
	patches to llvm-gcc?
In-Reply-To: <38a0d8450807110737m6ba8a84fs7683f19d0b933ce7@mail.gmail.com>
References: <38a0d8450807110737m6ba8a84fs7683f19d0b933ce7@mail.gmail.com>
Message-ID: <200807111644.09662.baldrick@free.fr>

Hi,

> I would love to just put it on the commit log, but I am not sure if
> that is the practice on llvm-gcc :-)

it just goes in the commit log.

Ciao,

Duncan.


From rafael.espindola at gmail.com  Fri Jul 11 09:56:55 2008
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Fri, 11 Jul 2008 14:56:55 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53456 - in
 /llvm-gcc-4.2/trunk/gcc/cp: cp-tree.h decl2.c lex.c pt.c
Message-ID: <200807111456.m6BEuumg011899@zion.cs.uiuc.edu>

Author: rafael
Date: Fri Jul 11 09:56:49 2008
New Revision: 53456

URL: http://llvm.org/viewvc/llvm-project?rev=53456&view=rev
Log:
port
http://gcc.gnu.org/viewcvs?view=rev&revision=127716

2007-08-22  Jason Merrill  <jason at redhat.com>

       PR c++/29365
       * pt.c (outermost_tinst_level): New function.
       * lex.c (in_main_input_context): New function.
       * cp-tree.h: Declare it.
       * decl2.c (constrain_class_visibility): Use it to avoid warning
       about uses of the anonymous namespace in the main input file.



Modified:
    llvm-gcc-4.2/trunk/gcc/cp/cp-tree.h
    llvm-gcc-4.2/trunk/gcc/cp/decl2.c
    llvm-gcc-4.2/trunk/gcc/cp/lex.c
    llvm-gcc-4.2/trunk/gcc/cp/pt.c

Modified: llvm-gcc-4.2/trunk/gcc/cp/cp-tree.h
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/cp-tree.h?rev=53456&r1=53455&r2=53456&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/cp/cp-tree.h (original)
+++ llvm-gcc-4.2/trunk/gcc/cp/cp-tree.h Fri Jul 11 09:56:49 2008
@@ -4122,6 +4122,7 @@
 extern void yyhook				(int);
 extern bool cxx_init				(void);
 extern void cxx_finish				(void);
+extern bool in_main_input_context		(void);
 
 /* in method.c */
 extern void init_method				(void);
@@ -4204,6 +4205,7 @@
 extern bool reregister_specialization		(tree, tree, tree);
 extern tree fold_non_dependent_expr		(tree);
 extern bool explicit_class_specialization_p     (tree);
+extern tree outermost_tinst_level		(void);
 
 /* in repo.c */
 extern void init_repo				(void);

Modified: llvm-gcc-4.2/trunk/gcc/cp/decl2.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/decl2.c?rev=53456&r1=53455&r2=53456&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/cp/decl2.c (original)
+++ llvm-gcc-4.2/trunk/gcc/cp/decl2.c Fri Jul 11 09:56:49 2008
@@ -1879,9 +1879,12 @@
 	int subvis = type_visibility (ftype);
 
 	if (subvis == VISIBILITY_ANON)
-	  warning (0, "\
+	  {
+	    if (!in_main_input_context ())
+	      warning (0, "\
 %qT has a field %qD whose type uses the anonymous namespace",
 		   type, t);
+	  }
 	else if (IS_AGGR_TYPE (ftype)
 		 && vis < VISIBILITY_HIDDEN
 		 && subvis >= VISIBILITY_HIDDEN)
@@ -1896,9 +1899,12 @@
       int subvis = type_visibility (TREE_TYPE (t));
 
       if (subvis == VISIBILITY_ANON)
-	warning (0, "\
+        {
+	  if (!in_main_input_context())
+	    warning (0, "\
 %qT has a base %qT whose type uses the anonymous namespace",
 		 type, TREE_TYPE (t));
+	}
       else if (vis < VISIBILITY_HIDDEN
 	       && subvis >= VISIBILITY_HIDDEN)
 	warning (OPT_Wattributes, "\

Modified: llvm-gcc-4.2/trunk/gcc/cp/lex.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/lex.c?rev=53456&r1=53455&r2=53456&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/cp/lex.c (original)
+++ llvm-gcc-4.2/trunk/gcc/cp/lex.c Fri Jul 11 09:56:49 2008
@@ -877,3 +877,18 @@
 
   return t;
 }
+
+/* Returns true if we are currently in the main source file, or in a
+   template instantiation started from the main source file.  */
+
+bool
+in_main_input_context (void)
+{
+  tree tl = outermost_tinst_level();
+
+  if (tl)
+    return strcmp (main_input_filename,
+		   LOCATION_FILE (TINST_LOCATION (tl))) == 0;
+  else
+    return strcmp (main_input_filename, input_filename) == 0;
+}

Modified: llvm-gcc-4.2/trunk/gcc/cp/pt.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/pt.c?rev=53456&r1=53455&r2=53456&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/cp/pt.c (original)
+++ llvm-gcc-4.2/trunk/gcc/cp/pt.c Fri Jul 11 09:56:49 2008
@@ -5288,6 +5288,15 @@
   pop_tinst_level ();
 }
 
+/* Returns the TINST_LEVEL which gives the original instantiation
+   context.  */
+
+tree
+outermost_tinst_level (void)
+{
+  return tree_last (current_tinst_level);
+}
+
 /* DECL is a friend FUNCTION_DECL or TEMPLATE_DECL.  ARGS is the
    vector of template arguments, as for tsubst.
 




From asl at math.spbu.ru  Fri Jul 11 10:49:54 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Fri, 11 Jul 2008 19:49:54 +0400
Subject: [llvm-commits] [llvm-gcc-4.2] r53456 -
	in	/llvm-gcc-4.2/trunk/gcc/cp: cp-tree.h decl2.c lex.c pt.c
In-Reply-To: <200807111456.m6BEuumg011899@zion.cs.uiuc.edu>
References: <200807111456.m6BEuumg011899@zion.cs.uiuc.edu>
Message-ID: <1215791394.18285.73.camel@localhost>

Hello, Rafael

> http://gcc.gnu.org/viewcvs?view=rev&revision=127716
Please add /* LLVM LOCAL begin mainline */ markers

-- 
With best regards, Anton Korobeynikov.

Faculty of Mathematics & Mechanics, Saint Petersburg State University.




From espindola at google.com  Fri Jul 11 10:56:59 2008
From: espindola at google.com (Rafael Espindola)
Date: Fri, 11 Jul 2008 16:56:59 +0100
Subject: [llvm-commits] [llvm-gcc-4.2] r53456 - in
	/llvm-gcc-4.2/trunk/gcc/cp: cp-tree.h decl2.c lex.c pt.c
In-Reply-To: <1215791394.18285.73.camel@localhost>
References: <200807111456.m6BEuumg011899@zion.cs.uiuc.edu>
	<1215791394.18285.73.camel@localhost>
Message-ID: <38a0d8450807110856t113354c9j7358d7858b0458a4@mail.gmail.com>

2008/7/11 Anton Korobeynikov <asl at math.spbu.ru>:
> Hello, Rafael
>
>> http://gcc.gnu.org/viewcvs?view=rev&revision=127716
> Please add /* LLVM LOCAL begin mainline */ markers

This was backported from the 4.2 branch, should it be "begin mainline"
or "begin 4.2"?

Cheers,
-- 
Rafael Avila de Espindola

Google Ireland Ltd.
Gordon House
Barrow Street
Dublin 4
Ireland

Registered in Dublin, Ireland
Registration Number: 368047


From clattner at apple.com  Fri Jul 11 11:32:38 2008
From: clattner at apple.com (Chris Lattner)
Date: Fri, 11 Jul 2008 09:32:38 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53455 -
	/llvm-gcc-4.2/trunk/gcc/cppdefault.c
In-Reply-To: <200807111233.m6BCX6d7007747@zion.cs.uiuc.edu>
References: <200807111233.m6BCX6d7007747@zion.cs.uiuc.edu>
Message-ID: <41D703A7-418F-4AFA-B220-C3222444F10E@apple.com>


On Jul 11, 2008, at 5:33 AM, Rafael Espindola wrote:

> Author: rafael
> Date: Fri Jul 11 07:33:04 2008
> New Revision: 53455
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53455&view=rev
> Log:
> get --with-sysroot to work  on non-darwin systems.

Thank you rafael!

-Chris



From clattner at apple.com  Fri Jul 11 11:34:11 2008
From: clattner at apple.com (Chris Lattner)
Date: Fri, 11 Jul 2008 09:34:11 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r53456 - in
	/llvm-gcc-4.2/trunk/gcc/cp: cp-tree.h decl2.c lex.c pt.c
In-Reply-To: <200807111456.m6BEuumg011899@zion.cs.uiuc.edu>
References: <200807111456.m6BEuumg011899@zion.cs.uiuc.edu>
Message-ID: <019DCFA1-AC6D-4AEF-83AC-00EF9BDCB9CD@apple.com>


On Jul 11, 2008, at 7:56 AM, Rafael Espindola wrote:

> Author: rafael
> Date: Fri Jul 11 09:56:49 2008
> New Revision: 53456
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53456&view=rev
> Log:
> port
> http://gcc.gnu.org/viewcvs?view=rev&revision=127716
>
> 2007-08-22  Jason Merrill  <jason at redhat.com>
>
>       PR c++/29365
>       * pt.c (outermost_tinst_level): New function.
>       * lex.c (in_main_input_context): New function.
>       * cp-tree.h: Declare it.
>       * decl2.c (constrain_class_visibility): Use it to avoid warning
>       about uses of the anonymous namespace in the main input file.

Hi Rafael,

Was this before or after the 4.2 branch converted to GPL3?

-Chris


From sabre at nondot.org  Fri Jul 11 11:50:14 2008
From: sabre at nondot.org (Chris Lattner)
Date: Fri, 11 Jul 2008 16:50:14 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53457 - in
 /llvm-gcc-4.2/trunk/gcc/cp: cp-tree.h decl2.c lex.c pt.c
Message-ID: <200807111650.m6BGoEPK015713@zion.cs.uiuc.edu>

Author: lattner
Date: Fri Jul 11 11:50:12 2008
New Revision: 53457

URL: http://llvm.org/viewvc/llvm-project?rev=53457&view=rev
Log:
Revert Rafael's patch for now, which is GPL3.

Modified:
    llvm-gcc-4.2/trunk/gcc/cp/cp-tree.h
    llvm-gcc-4.2/trunk/gcc/cp/decl2.c
    llvm-gcc-4.2/trunk/gcc/cp/lex.c
    llvm-gcc-4.2/trunk/gcc/cp/pt.c

Modified: llvm-gcc-4.2/trunk/gcc/cp/cp-tree.h
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/cp-tree.h?rev=53457&r1=53456&r2=53457&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/cp/cp-tree.h (original)
+++ llvm-gcc-4.2/trunk/gcc/cp/cp-tree.h Fri Jul 11 11:50:12 2008
@@ -4122,7 +4122,6 @@
 extern void yyhook				(int);
 extern bool cxx_init				(void);
 extern void cxx_finish				(void);
-extern bool in_main_input_context		(void);
 
 /* in method.c */
 extern void init_method				(void);
@@ -4205,7 +4204,6 @@
 extern bool reregister_specialization		(tree, tree, tree);
 extern tree fold_non_dependent_expr		(tree);
 extern bool explicit_class_specialization_p     (tree);
-extern tree outermost_tinst_level		(void);
 
 /* in repo.c */
 extern void init_repo				(void);

Modified: llvm-gcc-4.2/trunk/gcc/cp/decl2.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/decl2.c?rev=53457&r1=53456&r2=53457&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/cp/decl2.c (original)
+++ llvm-gcc-4.2/trunk/gcc/cp/decl2.c Fri Jul 11 11:50:12 2008
@@ -1879,12 +1879,9 @@
 	int subvis = type_visibility (ftype);
 
 	if (subvis == VISIBILITY_ANON)
-	  {
-	    if (!in_main_input_context ())
-	      warning (0, "\
+	  warning (0, "\
 %qT has a field %qD whose type uses the anonymous namespace",
 		   type, t);
-	  }
 	else if (IS_AGGR_TYPE (ftype)
 		 && vis < VISIBILITY_HIDDEN
 		 && subvis >= VISIBILITY_HIDDEN)
@@ -1899,12 +1896,9 @@
       int subvis = type_visibility (TREE_TYPE (t));
 
       if (subvis == VISIBILITY_ANON)
-        {
-	  if (!in_main_input_context())
-	    warning (0, "\
+	warning (0, "\
 %qT has a base %qT whose type uses the anonymous namespace",
 		 type, TREE_TYPE (t));
-	}
       else if (vis < VISIBILITY_HIDDEN
 	       && subvis >= VISIBILITY_HIDDEN)
 	warning (OPT_Wattributes, "\

Modified: llvm-gcc-4.2/trunk/gcc/cp/lex.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/lex.c?rev=53457&r1=53456&r2=53457&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/cp/lex.c (original)
+++ llvm-gcc-4.2/trunk/gcc/cp/lex.c Fri Jul 11 11:50:12 2008
@@ -877,18 +877,3 @@
 
   return t;
 }
-
-/* Returns true if we are currently in the main source file, or in a
-   template instantiation started from the main source file.  */
-
-bool
-in_main_input_context (void)
-{
-  tree tl = outermost_tinst_level();
-
-  if (tl)
-    return strcmp (main_input_filename,
-		   LOCATION_FILE (TINST_LOCATION (tl))) == 0;
-  else
-    return strcmp (main_input_filename, input_filename) == 0;
-}

Modified: llvm-gcc-4.2/trunk/gcc/cp/pt.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/pt.c?rev=53457&r1=53456&r2=53457&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/cp/pt.c (original)
+++ llvm-gcc-4.2/trunk/gcc/cp/pt.c Fri Jul 11 11:50:12 2008
@@ -5288,15 +5288,6 @@
   pop_tinst_level ();
 }
 
-/* Returns the TINST_LEVEL which gives the original instantiation
-   context.  */
-
-tree
-outermost_tinst_level (void)
-{
-  return tree_last (current_tinst_level);
-}
-
 /* DECL is a friend FUNCTION_DECL or TEMPLATE_DECL.  ARGS is the
    vector of template arguments, as for tsubst.
 




From baldrick at free.fr  Fri Jul 11 11:52:29 2008
From: baldrick at free.fr (Duncan Sands)
Date: Fri, 11 Jul 2008 16:52:29 -0000
Subject: [llvm-commits] [llvm] r53458 - in /llvm/trunk:
 include/llvm/CodeGen/RuntimeLibcalls.h
 lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
 lib/CodeGen/SelectionDAG/TargetLowering.cpp
Message-ID: <200807111652.m6BGqUxF015812@zion.cs.uiuc.edu>

Author: baldrick
Date: Fri Jul 11 11:52:29 2008
New Revision: 53458

URL: http://llvm.org/viewvc/llvm-project?rev=53458&view=rev
Log:
Add support for 128 bit shifts and 32 bit shifts
on 16 bit machines.

Modified:
    llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Modified: llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h?rev=53458&r1=53457&r2=53458&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h (original)
+++ llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h Fri Jul 11 11:52:29 2008
@@ -29,10 +29,13 @@
     // Integer
     SHL_I32,
     SHL_I64,
+    SHL_I128,
     SRL_I32,
     SRL_I64,
+    SRL_I128,
     SRA_I32,
     SRA_I64,
+    SRA_I128,
     MUL_I32,
     MUL_I64,
     MUL_I128,

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=53458&r1=53457&r2=53458&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Fri Jul 11 11:52:29 2008
@@ -1454,21 +1454,35 @@
   }
 
   // Otherwise, emit a libcall.
-  assert(VT == MVT::i64 && "Unsupported shift!");
-
-  RTLIB::Libcall LC;
+  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
   bool isSigned;
   if (N->getOpcode() == ISD::SHL) {
-    LC = RTLIB::SHL_I64;
     isSigned = false; /*sign irrelevant*/
+    if (VT == MVT::i32)
+      LC = RTLIB::SHL_I32;
+    else if (VT == MVT::i64)
+      LC = RTLIB::SHL_I64;
+    else if (VT == MVT::i128)
+      LC = RTLIB::SHL_I128;
   } else if (N->getOpcode() == ISD::SRL) {
-    LC = RTLIB::SRL_I64;
     isSigned = false;
+    if (VT == MVT::i32)
+      LC = RTLIB::SRL_I32;
+    else if (VT == MVT::i64)
+      LC = RTLIB::SRL_I64;
+    else if (VT == MVT::i128)
+      LC = RTLIB::SRL_I128;
   } else {
     assert(N->getOpcode() == ISD::SRA && "Unknown shift!");
-    LC = RTLIB::SRA_I64;
     isSigned = true;
+    if (VT == MVT::i32)
+      LC = RTLIB::SRA_I32;
+    else if (VT == MVT::i64)
+      LC = RTLIB::SRA_I64;
+    else if (VT == MVT::i128)
+      LC = RTLIB::SRA_I128;
   }
+  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported shift!");
 
   SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
   SplitInteger(MakeLibCall(LC, VT, Ops, 2, isSigned), Lo, Hi);

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=53458&r1=53457&r2=53458&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Fri Jul 11 11:52:29 2008
@@ -31,10 +31,13 @@
 static void InitLibcallNames(const char **Names) {
   Names[RTLIB::SHL_I32] = "__ashlsi3";
   Names[RTLIB::SHL_I64] = "__ashldi3";
+  Names[RTLIB::SHL_I128] = "__ashlti3";
   Names[RTLIB::SRL_I32] = "__lshrsi3";
   Names[RTLIB::SRL_I64] = "__lshrdi3";
+  Names[RTLIB::SRL_I128] = "__lshrti3";
   Names[RTLIB::SRA_I32] = "__ashrsi3";
   Names[RTLIB::SRA_I64] = "__ashrdi3";
+  Names[RTLIB::SRA_I128] = "__ashrti3";
   Names[RTLIB::MUL_I32] = "__mulsi3";
   Names[RTLIB::MUL_I64] = "__muldi3";
   Names[RTLIB::MUL_I128] = "__multi3";




From baldrick at free.fr  Fri Jul 11 11:54:57 2008
From: baldrick at free.fr (Duncan Sands)
Date: Fri, 11 Jul 2008 16:54:57 -0000
Subject: [llvm-commits] [llvm] r53459 - in /llvm/trunk:
 lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
 test/CodeGen/X86/2008-07-11-SHLBy1.ll
Message-ID: <200807111654.m6BGsvbd015968@zion.cs.uiuc.edu>

Author: baldrick
Date: Fri Jul 11 11:54:57 2008
New Revision: 53459

URL: http://llvm.org/viewvc/llvm-project?rev=53459&view=rev
Log:
Port a shift-by-1 optimization from LegalizeDAG: it
was presumably added after the rest of the code was
copied to LegalizeTypes.

Added:
    llvm/trunk/test/CodeGen/X86/2008-07-11-SHLBy1.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=53459&r1=53458&r2=53459&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Fri Jul 11 11:54:57 2008
@@ -1556,6 +1556,13 @@
     } else if (Amt == NVTBits) {
       Lo = DAG.getConstant(0, NVT);
       Hi = InL;
+    } else if (Amt == 1) {
+      // Emit this X << 1 as X+X.
+      SDVTList VTList = DAG.getVTList(NVT, MVT::Flag);
+      SDOperand LoOps[2] = { InL, InL };
+      Lo = DAG.getNode(ISD::ADDC, VTList, LoOps, 2);
+      SDOperand HiOps[3] = { InH, InH, Lo.getValue(1) };
+      Hi = DAG.getNode(ISD::ADDE, VTList, HiOps, 3);
     } else {
       Lo = DAG.getNode(ISD::SHL, NVT, InL, DAG.getConstant(Amt, ShTy));
       Hi = DAG.getNode(ISD::OR, NVT,

Added: llvm/trunk/test/CodeGen/X86/2008-07-11-SHLBy1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-07-11-SHLBy1.ll?rev=53459&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-07-11-SHLBy1.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2008-07-11-SHLBy1.ll Fri Jul 11 11:54:57 2008
@@ -0,0 +1,5 @@
+; RUN: llvm-as < %s | llc -march=x86-64 -o - | not grep shr
+define i128 @sl(i128 %x) {
+        %t = shl i128 %x, 1
+        ret i128 %t
+}




From baldrick at free.fr  Fri Jul 11 11:57:02 2008
From: baldrick at free.fr (Duncan Sands)
Date: Fri, 11 Jul 2008 16:57:02 -0000
Subject: [llvm-commits] [llvm] r53460 - in /llvm/trunk:
 include/llvm/CodeGen/RuntimeLibcalls.h
 lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
 lib/CodeGen/SelectionDAG/TargetLowering.cpp
Message-ID: <200807111657.m6BGv2Ox016099@zion.cs.uiuc.edu>

Author: baldrick
Date: Fri Jul 11 11:57:02 2008
New Revision: 53460

URL: http://llvm.org/viewvc/llvm-project?rev=53460&view=rev
Log:
Add two missing SINT_TO_FP libcalls.

Modified:
    llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Modified: llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h?rev=53460&r1=53459&r2=53460&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h (original)
+++ llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h Fri Jul 11 11:57:02 2008
@@ -125,6 +125,8 @@
     FPTOUINT_PPCF128_I128,
     SINTTOFP_I32_F32,
     SINTTOFP_I32_F64,
+    SINTTOFP_I32_F80,
+    SINTTOFP_I32_PPCF128,
     SINTTOFP_I64_F32,
     SINTTOFP_I64_F64,
     SINTTOFP_I64_F80,

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=53460&r1=53459&r2=53460&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Fri Jul 11 11:57:02 2008
@@ -1771,11 +1771,12 @@
 }
 
 SDOperand DAGTypeLegalizer::ExpandIntOp_SINT_TO_FP(SDOperand Source,
-                                                     MVT DestTy) {
+                                                   MVT DestTy) {
   // We know the destination is legal, but that the input needs to be expanded.
   MVT SourceVT = Source.getValueType();
 
   // Check to see if the target has a custom way to lower this.  If so, use it.
+  // This can trigger when called from ExpandIntOp_UINT_TO_FP.
   switch (TLI.getOperationAction(ISD::SINT_TO_FP, SourceVT)) {
   default: assert(0 && "This action not implemented for this operation!");
   case TargetLowering::Legal:
@@ -1789,13 +1790,24 @@
   }
 
   RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
-  if (SourceVT == MVT::i64) {
+  if (SourceVT == MVT::i32) {
+    if (DestTy == MVT::f32)
+      LC = RTLIB::SINTTOFP_I32_F32;
+    else if (DestTy == MVT::f64)
+      LC = RTLIB::SINTTOFP_I32_F64;
+    else if (DestTy == MVT::f80)
+      LC = RTLIB::SINTTOFP_I32_F80;
+    else if (DestTy == MVT::ppcf128)
+      LC = RTLIB::SINTTOFP_I32_PPCF128;
+  } else if (SourceVT == MVT::i64) {
     if (DestTy == MVT::f32)
       LC = RTLIB::SINTTOFP_I64_F32;
-    else {
-      assert(DestTy == MVT::f64 && "Unknown fp value type!");
+    else if (DestTy == MVT::f64)
       LC = RTLIB::SINTTOFP_I64_F64;
-    }
+    else if (DestTy == MVT::f80)
+      LC = RTLIB::SINTTOFP_I64_F80;
+    else if (DestTy == MVT::ppcf128)
+      LC = RTLIB::SINTTOFP_I64_PPCF128;
   } else if (SourceVT == MVT::i128) {
     if (DestTy == MVT::f32)
       LC = RTLIB::SINTTOFP_I128_F32;
@@ -1803,16 +1815,12 @@
       LC = RTLIB::SINTTOFP_I128_F64;
     else if (DestTy == MVT::f80)
       LC = RTLIB::SINTTOFP_I128_F80;
-    else {
-      assert(DestTy == MVT::ppcf128 && "Unknown fp value type!");
+    else if (DestTy == MVT::ppcf128)
       LC = RTLIB::SINTTOFP_I128_PPCF128;
-    }
-  } else {
-    assert(0 && "Unknown int value type!");
   }
-
   assert(LC != RTLIB::UNKNOWN_LIBCALL &&
          "Don't know how to expand this SINT_TO_FP!");
+
   return MakeLibCall(LC, DestTy, &Source, 1, true);
 }
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=53460&r1=53459&r2=53460&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Fri Jul 11 11:57:02 2008
@@ -123,6 +123,8 @@
   Names[RTLIB::FPTOUINT_PPCF128_I128] = "__fixunstfti";
   Names[RTLIB::SINTTOFP_I32_F32] = "__floatsisf";
   Names[RTLIB::SINTTOFP_I32_F64] = "__floatsidf";
+  Names[RTLIB::SINTTOFP_I32_F80] = "__floatsixf";
+  Names[RTLIB::SINTTOFP_I32_PPCF128] = "__floatsitf";
   Names[RTLIB::SINTTOFP_I64_F32] = "__floatdisf";
   Names[RTLIB::SINTTOFP_I64_F64] = "__floatdidf";
   Names[RTLIB::SINTTOFP_I64_F80] = "__floatdixf";




From baldrick at free.fr  Fri Jul 11 12:00:14 2008
From: baldrick at free.fr (Duncan Sands)
Date: Fri, 11 Jul 2008 17:00:14 -0000
Subject: [llvm-commits] [llvm] r53461 - in /llvm/trunk:
 include/llvm/CodeGen/RuntimeLibcalls.h
 lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
 lib/CodeGen/SelectionDAG/LegalizeTypes.h
 lib/CodeGen/SelectionDAG/TargetLowering.cpp
Message-ID: <200807111700.m6BH0ESg016206@zion.cs.uiuc.edu>

Author: baldrick
Date: Fri Jul 11 12:00:14 2008
New Revision: 53461

URL: http://llvm.org/viewvc/llvm-project?rev=53461&view=rev
Log:
It is pointless to turn a UINT_TO_FP into an
SINT_TO_FP libcall plus additional operations:
it might as well be a direct UINT_TO_FP libcall.
So only turn it into an SINT_TO_FP if the target
has special handling for SINT_TO_FP.

Modified:
    llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Modified: llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h?rev=53461&r1=53460&r2=53461&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h (original)
+++ llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h Fri Jul 11 12:00:14 2008
@@ -137,8 +137,16 @@
     SINTTOFP_I128_PPCF128,
     UINTTOFP_I32_F32,
     UINTTOFP_I32_F64,
+    UINTTOFP_I32_F80,
+    UINTTOFP_I32_PPCF128,
     UINTTOFP_I64_F32,
     UINTTOFP_I64_F64,
+    UINTTOFP_I64_F80,
+    UINTTOFP_I64_PPCF128,
+    UINTTOFP_I128_F32,
+    UINTTOFP_I128_F64,
+    UINTTOFP_I128_F80,
+    UINTTOFP_I128_PPCF128,
 
     // COMPARISON
     OEQ_F32,

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=53461&r1=53460&r2=53461&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Fri Jul 11 12:00:14 2008
@@ -1727,12 +1727,8 @@
 
     case ISD::TRUNCATE:        Res = ExpandIntOp_TRUNCATE(N); break;
 
-    case ISD::SINT_TO_FP:
-      Res = ExpandIntOp_SINT_TO_FP(N->getOperand(0), N->getValueType(0));
-      break;
-    case ISD::UINT_TO_FP:
-      Res = ExpandIntOp_UINT_TO_FP(N->getOperand(0), N->getValueType(0));
-      break;
+    case ISD::SINT_TO_FP:      Res = ExpandIntOp_SINT_TO_FP(N); break;
+    case ISD::UINT_TO_FP:      Res = ExpandIntOp_UINT_TO_FP(N); break;
 
     case ISD::BR_CC:     Res = ExpandIntOp_BR_CC(N); break;
     case ISD::SELECT_CC: Res = ExpandIntOp_SELECT_CC(N); break;
@@ -1770,99 +1766,134 @@
   return DAG.getNode(ISD::TRUNCATE, N->getValueType(0), InL);
 }
 
-SDOperand DAGTypeLegalizer::ExpandIntOp_SINT_TO_FP(SDOperand Source,
-                                                   MVT DestTy) {
-  // We know the destination is legal, but that the input needs to be expanded.
-  MVT SourceVT = Source.getValueType();
-
-  // Check to see if the target has a custom way to lower this.  If so, use it.
-  // This can trigger when called from ExpandIntOp_UINT_TO_FP.
-  switch (TLI.getOperationAction(ISD::SINT_TO_FP, SourceVT)) {
-  default: assert(0 && "This action not implemented for this operation!");
-  case TargetLowering::Legal:
-  case TargetLowering::Expand:
-    break;   // This case is handled below.
-  case TargetLowering::Custom:
-    SDOperand NV = TLI.LowerOperation(DAG.getNode(ISD::SINT_TO_FP, DestTy,
-                                                  Source), DAG);
-    if (NV.Val) return NV;
-    break;   // The target lowered this.
-  }
+SDOperand DAGTypeLegalizer::ExpandIntOp_SINT_TO_FP(SDNode *N) {
+  SDOperand Op = N->getOperand(0);
+  MVT SrcVT = Op.getValueType();
+  MVT DstVT = N->getValueType(0);
 
   RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
-  if (SourceVT == MVT::i32) {
-    if (DestTy == MVT::f32)
+  if (SrcVT == MVT::i32) {
+    if (DstVT == MVT::f32)
       LC = RTLIB::SINTTOFP_I32_F32;
-    else if (DestTy == MVT::f64)
+    else if (DstVT == MVT::f64)
       LC = RTLIB::SINTTOFP_I32_F64;
-    else if (DestTy == MVT::f80)
+    else if (DstVT == MVT::f80)
       LC = RTLIB::SINTTOFP_I32_F80;
-    else if (DestTy == MVT::ppcf128)
+    else if (DstVT == MVT::ppcf128)
       LC = RTLIB::SINTTOFP_I32_PPCF128;
-  } else if (SourceVT == MVT::i64) {
-    if (DestTy == MVT::f32)
+  } else if (SrcVT == MVT::i64) {
+    if (DstVT == MVT::f32)
       LC = RTLIB::SINTTOFP_I64_F32;
-    else if (DestTy == MVT::f64)
+    else if (DstVT == MVT::f64)
       LC = RTLIB::SINTTOFP_I64_F64;
-    else if (DestTy == MVT::f80)
+    else if (DstVT == MVT::f80)
       LC = RTLIB::SINTTOFP_I64_F80;
-    else if (DestTy == MVT::ppcf128)
+    else if (DstVT == MVT::ppcf128)
       LC = RTLIB::SINTTOFP_I64_PPCF128;
-  } else if (SourceVT == MVT::i128) {
-    if (DestTy == MVT::f32)
+  } else if (SrcVT == MVT::i128) {
+    if (DstVT == MVT::f32)
       LC = RTLIB::SINTTOFP_I128_F32;
-    else if (DestTy == MVT::f64)
+    else if (DstVT == MVT::f64)
       LC = RTLIB::SINTTOFP_I128_F64;
-    else if (DestTy == MVT::f80)
+    else if (DstVT == MVT::f80)
       LC = RTLIB::SINTTOFP_I128_F80;
-    else if (DestTy == MVT::ppcf128)
+    else if (DstVT == MVT::ppcf128)
       LC = RTLIB::SINTTOFP_I128_PPCF128;
   }
   assert(LC != RTLIB::UNKNOWN_LIBCALL &&
          "Don't know how to expand this SINT_TO_FP!");
 
-  return MakeLibCall(LC, DestTy, &Source, 1, true);
+  return MakeLibCall(LC, DstVT, &Op, 1, true);
 }
 
-SDOperand DAGTypeLegalizer::ExpandIntOp_UINT_TO_FP(SDOperand Source,
-                                                     MVT DestTy) {
-  // We know the destination is legal, but that the input needs to be expanded.
-  assert(getTypeAction(Source.getValueType()) == ExpandInteger &&
-         "This is not an expansion!");
-
-  // If this is unsigned, and not supported, first perform the conversion to
-  // signed, then adjust the result if the sign bit is set.
-  SDOperand SignedConv = ExpandIntOp_SINT_TO_FP(Source, DestTy);
-
-  // The 64-bit value loaded will be incorrectly if the 'sign bit' of the
-  // incoming integer is set.  To handle this, we dynamically test to see if
-  // it is set, and, if so, add a fudge factor.
-  SDOperand Lo, Hi;
-  GetExpandedInteger(Source, Lo, Hi);
+SDOperand DAGTypeLegalizer::ExpandIntOp_UINT_TO_FP(SDNode *N) {
+  SDOperand Op = N->getOperand(0);
+  MVT SrcVT = Op.getValueType();
+  MVT DstVT = N->getValueType(0);
+
+  if (TLI.getOperationAction(ISD::SINT_TO_FP, SrcVT) == TargetLowering::Custom){
+    // Do a signed conversion then adjust the result.
+    SDOperand SignedConv = DAG.getNode(ISD::SINT_TO_FP, DstVT, Op);
+    SignedConv = TLI.LowerOperation(SignedConv, DAG);
+
+    // The result of the signed conversion needs adjusting if the 'sign bit' of
+    // the incoming integer was set.  To handle this, we dynamically test to see
+    // if it is set, and, if so, add a fudge factor.
+
+    const uint64_t F32TwoE32  = 0x4F800000ULL;
+    const uint64_t F32TwoE64  = 0x5F800000ULL;
+    const uint64_t F32TwoE128 = 0x7F800000ULL;
+
+    APInt FF(32, 0);
+    if (SrcVT == MVT::i32)
+      FF = APInt(32, F32TwoE32);
+    else if (SrcVT == MVT::i64)
+      FF = APInt(32, F32TwoE64);
+    else if (SrcVT == MVT::i128)
+      FF = APInt(32, F32TwoE128);
+    else
+      assert(false && "Unsupported UINT_TO_FP!");
+
+    // Check whether the sign bit is set.
+    SDOperand Lo, Hi;
+    GetExpandedInteger(Op, Lo, Hi);
+    SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultType(Hi), Hi,
+                                     DAG.getConstant(0, Hi.getValueType()),
+                                     ISD::SETLT);
+
+    // Build a 64 bit pair (0, FF) in the constant pool, with FF in the lo bits.
+    SDOperand FudgePtr = DAG.getConstantPool(ConstantInt::get(FF.zext(64)),
+                                             TLI.getPointerTy());
+
+    // Get a pointer to FF if the sign bit was set, or to 0 otherwise.
+    SDOperand Zero = DAG.getIntPtrConstant(0);
+    SDOperand Four = DAG.getIntPtrConstant(4);
+    if (TLI.isBigEndian()) std::swap(Zero, Four);
+    SDOperand Offset = DAG.getNode(ISD::SELECT, Zero.getValueType(), SignSet,
+                                   Zero, Four);
+    FudgePtr = DAG.getNode(ISD::ADD, TLI.getPointerTy(), FudgePtr, Offset);
+
+    // Load the value out, extending it from f32 to the destination float type.
+    // FIXME: Avoid the extend by constructing the right constant pool?
+    SDOperand Fudge = DAG.getExtLoad(ISD::EXTLOAD, DstVT, DAG.getEntryNode(),
+                                     FudgePtr, NULL, 0, MVT::f32);
+    return DAG.getNode(ISD::FADD, DstVT, SignedConv, Fudge);
+  }
 
-  SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultType(Hi), Hi,
-                                   DAG.getConstant(0, Hi.getValueType()),
-                                   ISD::SETLT);
-  SDOperand Zero = DAG.getIntPtrConstant(0), Four = DAG.getIntPtrConstant(4);
-  SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(),
-                                    SignSet, Four, Zero);
-  uint64_t FF = 0x5f800000ULL;
-  if (TLI.isLittleEndian()) FF <<= 32;
-  Constant *FudgeFactor = ConstantInt::get((Type*)Type::Int64Ty, FF);
-
-  SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy());
-  CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
-  SDOperand FudgeInReg;
-  if (DestTy == MVT::f32)
-    FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx, NULL, 0);
-  else if (DestTy.bitsGT(MVT::f32))
-    // FIXME: Avoid the extend by construction the right constantpool?
-    FudgeInReg = DAG.getExtLoad(ISD::EXTLOAD, DestTy, DAG.getEntryNode(),
-                                CPIdx, NULL, 0, MVT::f32);
-  else
-    assert(0 && "Unexpected conversion");
+  // Otherwise, use a libcall.
+  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
+  if (SrcVT == MVT::i32) {
+    if (DstVT == MVT::f32)
+      LC = RTLIB::UINTTOFP_I32_F32;
+    else if (DstVT == MVT::f64)
+      LC = RTLIB::UINTTOFP_I32_F64;
+    else if (DstVT == MVT::f80)
+      LC = RTLIB::UINTTOFP_I32_F80;
+    else if (DstVT == MVT::ppcf128)
+      LC = RTLIB::UINTTOFP_I32_PPCF128;
+  } else if (SrcVT == MVT::i64) {
+    if (DstVT == MVT::f32)
+      LC = RTLIB::UINTTOFP_I64_F32;
+    else if (DstVT == MVT::f64)
+      LC = RTLIB::UINTTOFP_I64_F64;
+    else if (DstVT == MVT::f80)
+      LC = RTLIB::UINTTOFP_I64_F80;
+    else if (DstVT == MVT::ppcf128)
+      LC = RTLIB::UINTTOFP_I64_PPCF128;
+  } else if (SrcVT == MVT::i128) {
+    if (DstVT == MVT::f32)
+      LC = RTLIB::UINTTOFP_I128_F32;
+    else if (DstVT == MVT::f64)
+      LC = RTLIB::UINTTOFP_I128_F64;
+    else if (DstVT == MVT::f80)
+      LC = RTLIB::UINTTOFP_I128_F80;
+    else if (DstVT == MVT::ppcf128)
+      LC = RTLIB::UINTTOFP_I128_PPCF128;
+  }
+  assert(LC != RTLIB::UNKNOWN_LIBCALL &&
+         "Don't know how to expand this UINT_TO_FP!");
 
-  return DAG.getNode(ISD::FADD, DestTy, SignedConv, FudgeInReg);
+  return MakeLibCall(LC, DstVT, &Op, 1, true);
 }
 
 SDOperand DAGTypeLegalizer::ExpandIntOp_BR_CC(SDNode *N) {

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=53461&r1=53460&r2=53461&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Fri Jul 11 12:00:14 2008
@@ -299,10 +299,10 @@
   SDOperand ExpandIntOp_EXTRACT_ELEMENT(SDNode *N);
   SDOperand ExpandIntOp_SELECT_CC(SDNode *N);
   SDOperand ExpandIntOp_SETCC(SDNode *N);
-  SDOperand ExpandIntOp_SINT_TO_FP(SDOperand Source, MVT DestTy);
+  SDOperand ExpandIntOp_SINT_TO_FP(SDNode *N);
   SDOperand ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo);
   SDOperand ExpandIntOp_TRUNCATE(SDNode *N);
-  SDOperand ExpandIntOp_UINT_TO_FP(SDOperand Source, MVT DestTy);
+  SDOperand ExpandIntOp_UINT_TO_FP(SDNode *N);
 
   void IntegerExpandSetCCOperands(SDOperand &NewLHS, SDOperand &NewRHS,
                                   ISD::CondCode &CCCode);

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=53461&r1=53460&r2=53461&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Fri Jul 11 12:00:14 2008
@@ -135,8 +135,16 @@
   Names[RTLIB::SINTTOFP_I128_PPCF128] = "__floattitf";
   Names[RTLIB::UINTTOFP_I32_F32] = "__floatunsisf";
   Names[RTLIB::UINTTOFP_I32_F64] = "__floatunsidf";
+  Names[RTLIB::UINTTOFP_I32_F80] = "__floatunsixf";
+  Names[RTLIB::UINTTOFP_I32_PPCF128] = "__floatunsitf";
   Names[RTLIB::UINTTOFP_I64_F32] = "__floatundisf";
   Names[RTLIB::UINTTOFP_I64_F64] = "__floatundidf";
+  Names[RTLIB::UINTTOFP_I64_F80] = "__floatundixf";
+  Names[RTLIB::UINTTOFP_I64_PPCF128] = "__floatunditf";
+  Names[RTLIB::UINTTOFP_I128_F32] = "__floatuntisf";
+  Names[RTLIB::UINTTOFP_I128_F64] = "__floatuntidf";
+  Names[RTLIB::UINTTOFP_I128_F80] = "__floatuntixf";
+  Names[RTLIB::UINTTOFP_I128_PPCF128] = "__floatuntitf";
   Names[RTLIB::OEQ_F32] = "__eqsf2";
   Names[RTLIB::OEQ_F64] = "__eqdf2";
   Names[RTLIB::UNE_F32] = "__nesf2";




From baldrick at free.fr  Fri Jul 11 12:02:09 2008
From: baldrick at free.fr (Duncan Sands)
Date: Fri, 11 Jul 2008 17:02:09 -0000
Subject: [llvm-commits] [llvm] r53462 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeTypes.h
 LegalizeVectorTypes.cpp
Message-ID: <200807111702.m6BH29b8016280@zion.cs.uiuc.edu>

Author: baldrick
Date: Fri Jul 11 12:02:09 2008
New Revision: 53462

URL: http://llvm.org/viewvc/llvm-project?rev=53462&view=rev
Log:
Remove an apparently useless routine: there should
be no need to split the result of a vector RET node,
since they are always already legal.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=53462&r1=53461&r2=53462&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Fri Jul 11 12:02:09 2008
@@ -440,7 +440,6 @@
   SDOperand SplitVecOp_BIT_CONVERT(SDNode *N);
   SDOperand SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N);
   SDOperand SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
-  SDOperand SplitVecOp_RET(SDNode *N, unsigned OpNo);
   SDOperand SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo);
   SDOperand SplitVecOp_VECTOR_SHUFFLE(SDNode *N, unsigned OpNo);
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=53462&r1=53461&r2=53462&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Fri Jul 11 12:02:09 2008
@@ -547,7 +547,6 @@
       assert(0 && "Do not know how to split this operator's operand!");
       abort();
     case ISD::STORE: Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo); break;
-    case ISD::RET:   Res = SplitVecOp_RET(N, OpNo); break;
 
     case ISD::BIT_CONVERT: Res = SplitVecOp_BIT_CONVERT(N); break;
 
@@ -604,19 +603,6 @@
   return DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
 }
 
-SDOperand DAGTypeLegalizer::SplitVecOp_RET(SDNode *N, unsigned OpNo) {
-  assert(N->getNumOperands() == 3 &&"Can only handle ret of one vector so far");
-  // FIXME: Returns of gcc generic vectors larger than a legal vector
-  // type should be returned by reference!
-  SDOperand Lo, Hi;
-  GetSplitVector(N->getOperand(1), Lo, Hi);
-
-  SDOperand Chain = N->getOperand(0);  // The chain.
-  SDOperand Sign = N->getOperand(2);  // Signness
-
-  return DAG.getNode(ISD::RET, MVT::Other, Chain, Lo, Sign, Hi, Sign);
-}
-
 SDOperand DAGTypeLegalizer::SplitVecOp_BIT_CONVERT(SDNode *N) {
   // For example, i64 = BIT_CONVERT v4i16 on alpha.  Typically the vector will
   // end up being split all the way down to individual components.  Convert the




From espindola at google.com  Fri Jul 11 12:15:43 2008
From: espindola at google.com (Rafael Espindola)
Date: Fri, 11 Jul 2008 18:15:43 +0100
Subject: [llvm-commits] [llvm-gcc-4.2] r53456 - in
	/llvm-gcc-4.2/trunk/gcc/cp: cp-tree.h decl2.c lex.c pt.c
In-Reply-To: <019DCFA1-AC6D-4AEF-83AC-00EF9BDCB9CD@apple.com>
References: <200807111456.m6BEuumg011899@zion.cs.uiuc.edu>
	<019DCFA1-AC6D-4AEF-83AC-00EF9BDCB9CD@apple.com>
Message-ID: <38a0d8450807111015g2bb66217q31562adda14c36f1@mail.gmail.com>

> Hi Rafael,
>
> Was this before or after the 4.2 branch converted to GPL3?

Before.

Cheers,
-- 
Rafael Avila de Espindola

Google Ireland Ltd.
Gordon House
Barrow Street
Dublin 4
Ireland

Registered in Dublin, Ireland
Registration Number: 368047


From espindola at google.com  Fri Jul 11 12:23:04 2008
From: espindola at google.com (Rafael Espindola)
Date: Fri, 11 Jul 2008 18:23:04 +0100
Subject: [llvm-commits] [llvm-gcc-4.2] r53456 - in
	/llvm-gcc-4.2/trunk/gcc/cp: cp-tree.h decl2.c lex.c pt.c
In-Reply-To: <38a0d8450807111015g2bb66217q31562adda14c36f1@mail.gmail.com>
References: <200807111456.m6BEuumg011899@zion.cs.uiuc.edu>
	<019DCFA1-AC6D-4AEF-83AC-00EF9BDCB9CD@apple.com>
	<38a0d8450807111015g2bb66217q31562adda14c36f1@mail.gmail.com>
Message-ID: <38a0d8450807111023mea51d2cheaea3c143c133f65@mail.gmail.com>

2008/7/11 Rafael Espindola <espindola at google.com>:
>> Hi Rafael,
> Before.

Note that the patch was committed to trunk after it was converted, but
was ported to 4.2 before.

The patch is rev 127716. The 4.2 branch moved to GPL3 at 128013.

Cheers,
-- 
Rafael Avila de Espindola

Google Ireland Ltd.
Gordon House
Barrow Street
Dublin 4
Ireland

Registered in Dublin, Ireland
Registration Number: 368047


From resistor at mac.com  Fri Jul 11 15:05:13 2008
From: resistor at mac.com (Owen Anderson)
Date: Fri, 11 Jul 2008 20:05:13 -0000
Subject: [llvm-commits] [llvm] r53470 -
	/llvm/trunk/lib/Transforms/Scalar/GVN.cpp
Message-ID: <200807112005.m6BK5DF2022115@zion.cs.uiuc.edu>

Author: resistor
Date: Fri Jul 11 15:05:13 2008
New Revision: 53470

URL: http://llvm.org/viewvc/llvm-project?rev=53470&view=rev
Log:
Don't call lookupNumber more than we have to.

Modified:
    llvm/trunk/lib/Transforms/Scalar/GVN.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=53470&r1=53469&r2=53470&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Fri Jul 11 15:05:13 2008
@@ -1267,11 +1267,14 @@
         Value* op = BI->getOperand(i);
         if (isa<Argument>(op) || isa<Constant>(op) || isa<GlobalValue>(op))
           PREInstr->setOperand(i, op);
-        else if (!lookupNumber(PREPred, VN.lookup(op))) {
-          success = false;
-          break;
-        } else
-          PREInstr->setOperand(i, lookupNumber(PREPred, VN.lookup(op)));
+        else {
+          Value* V = lookupNumber(PREPred, VN.lookup(op));
+          if (!V) {
+            success = false;
+            break;
+          } else
+            PREInstr->setOperand(i, V);
+        }
       }
       
       // Fail out if we encounter an operand that is not available in




From gohman at apple.com  Fri Jul 11 15:38:32 2008
From: gohman at apple.com (Dan Gohman)
Date: Fri, 11 Jul 2008 20:38:32 -0000
Subject: [llvm-commits] [llvm] r53471 - in /llvm/trunk:
 include/llvm/CodeGen/MachineConstantPool.h
 include/llvm/CodeGen/SelectionDAGISel.h lib/CodeGen/MachineFunction.cpp
 lib/CodeGen/MachineInstr.cpp lib/CodeGen/SelectionDAG/CallingConvLower.cpp
 lib/Target/ARM/ARMConstantPoolValue.h
 lib/Target/CellSPU/SPURegisterInfo.cpp
 lib/Target/PIC16/PIC16ConstantPoolValue.h
 lib/Target/PIC16/PIC16ISelDAGToDAG.cpp
 lib/Target/PowerPC/PPCRegisterInfo.cpp
Message-ID: <200807112038.m6BKcWqJ023156@zion.cs.uiuc.edu>

Author: djg
Date: Fri Jul 11 15:38:31 2008
New Revision: 53471

URL: http://llvm.org/viewvc/llvm-project?rev=53471&view=rev
Log:
Trim unnecessary #includes.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h
    llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
    llvm/trunk/lib/CodeGen/MachineFunction.cpp
    llvm/trunk/lib/CodeGen/MachineInstr.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
    llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.h
    llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp
    llvm/trunk/lib/Target/PIC16/PIC16ConstantPoolValue.h
    llvm/trunk/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp
    llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h?rev=53471&r1=53470&r2=53471&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h Fri Jul 11 15:38:31 2008
@@ -16,8 +16,8 @@
 #define LLVM_CODEGEN_MACHINECONSTANTPOOL_H
 
 #include "llvm/ADT/FoldingSet.h"
-#include "llvm/CodeGen/SelectionDAGNodes.h"
 #include "llvm/Support/Streams.h"
+#include <cassert>
 #include <vector>
 #include <iosfwd>
 
@@ -27,6 +27,7 @@
 class Constant;
 class TargetData;
 class TargetMachine;
+class Type;
 class MachineConstantPool;
 
 /// Abstract base class for all machine specific constantpool value subclasses.

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=53471&r1=53470&r2=53471&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Fri Jul 11 15:38:31 2008
@@ -18,7 +18,6 @@
 #include "llvm/Pass.h"
 #include "llvm/Constant.h"
 #include "llvm/CodeGen/SelectionDAG.h"
-#include "llvm/CodeGen/SelectionDAGNodes.h"
 
 namespace llvm {
   class SelectionDAGLowering;

Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=53471&r1=53470&r2=53471&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Fri Jul 11 15:38:31 2008
@@ -22,7 +22,6 @@
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/Target/TargetData.h"
-#include "llvm/Target/TargetLowering.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetFrameInfo.h"
 #include "llvm/Function.h"

Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=53471&r1=53470&r2=53471&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Fri Jul 11 15:38:31 2008
@@ -17,7 +17,6 @@
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/PseudoSourceValue.h"
-#include "llvm/CodeGen/SelectionDAGNodes.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetInstrDesc.h"

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp?rev=53471&r1=53470&r2=53471&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp Fri Jul 11 15:38:31 2008
@@ -13,7 +13,6 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/CallingConvLower.h"
-#include "llvm/CodeGen/SelectionDAGNodes.h"
 #include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Target/TargetData.h"
 #include "llvm/Target/TargetMachine.h"

Modified: llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.h?rev=53471&r1=53470&r2=53471&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.h Fri Jul 11 15:38:31 2008
@@ -18,6 +18,8 @@
 
 namespace llvm {
 
+class GlobalValue;
+
 namespace ARMCP {
   enum ARMCPKind {
     CPValue,

Modified: llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp?rev=53471&r1=53470&r2=53471&view=diff

==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp Fri Jul 11 15:38:31 2008
@@ -28,7 +28,6 @@
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineLocation.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/SelectionDAGNodes.h"
 #include "llvm/CodeGen/ValueTypes.h"
 #include "llvm/Target/TargetFrameInfo.h"
 #include "llvm/Target/TargetInstrInfo.h"

Modified: llvm/trunk/lib/Target/PIC16/PIC16ConstantPoolValue.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ConstantPoolValue.h?rev=53471&r1=53470&r2=53471&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16ConstantPoolValue.h (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16ConstantPoolValue.h Fri Jul 11 15:38:31 2008
@@ -18,6 +18,8 @@
 
 namespace llvm {
 
+class GlobalValue;
+
 namespace PIC16CP {
   enum PIC16CPKind {
     CPValue,

Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp?rev=53471&r1=53470&r2=53471&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp Fri Jul 11 15:38:31 2008
@@ -27,7 +27,6 @@
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"
-#include "llvm/CodeGen/SelectionDAGNodes.h"
 #include "llvm/Support/CFG.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/Debug.h"

Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=53471&r1=53470&r2=53471&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Fri Jul 11 15:38:31 2008
@@ -31,7 +31,6 @@
 #include "llvm/CodeGen/MachineLocation.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/RegisterScavenging.h"
-#include "llvm/CodeGen/SelectionDAGNodes.h"
 #include "llvm/Target/TargetFrameInfo.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"




From sabre at nondot.org  Fri Jul 11 15:53:00 2008
From: sabre at nondot.org (Chris Lattner)
Date: Fri, 11 Jul 2008 20:53:00 -0000
Subject: [llvm-commits] [llvm] r53472 -
	/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
Message-ID: <200807112053.m6BKr0Ib023656@zion.cs.uiuc.edu>

Author: lattner
Date: Fri Jul 11 15:53:00 2008
New Revision: 53472

URL: http://llvm.org/viewvc/llvm-project?rev=53472&view=rev
Log:
add support for returning i128, PR2532.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=53472&r1=53471&r2=53472&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Fri Jul 11 15:53:00 2008
@@ -685,6 +685,20 @@
       DAG.getMachineFunction().getRegInfo().addLiveOut(ARM::R1);
     }
     break;
+  case 9:  // i128 -> 4 regs
+    Copy = DAG.getCopyToReg(Chain, ARM::R3, Op.getOperand(7), SDOperand());
+    Copy = DAG.getCopyToReg(Copy , ARM::R2, Op.getOperand(5), Copy.getValue(1));
+    Copy = DAG.getCopyToReg(Copy , ARM::R1, Op.getOperand(3), Copy.getValue(1));
+    Copy = DAG.getCopyToReg(Copy , ARM::R0, Op.getOperand(1), Copy.getValue(1));
+    // If we haven't noted the R0+R1 are live out, do so now.
+    if (DAG.getMachineFunction().getRegInfo().liveout_empty()) {
+      DAG.getMachineFunction().getRegInfo().addLiveOut(ARM::R0);
+      DAG.getMachineFunction().getRegInfo().addLiveOut(ARM::R1);
+      DAG.getMachineFunction().getRegInfo().addLiveOut(ARM::R2);
+      DAG.getMachineFunction().getRegInfo().addLiveOut(ARM::R3);
+    }
+    break;
+      
   }
 
   //We must use RET_FLAG instead of BRIND because BRIND doesn't have a flag




From gohman at apple.com  Fri Jul 11 15:58:19 2008
From: gohman at apple.com (Dan Gohman)
Date: Fri, 11 Jul 2008 20:58:19 -0000
Subject: [llvm-commits] [llvm] r53474 - in /llvm/trunk:
 include/llvm/Analysis/LoopInfo.h lib/Analysis/LoadValueNumbering.cpp
 lib/Support/Timer.cpp lib/Transforms/IPO/GlobalDCE.cpp
 lib/VMCore/Constants.cpp lib/VMCore/Type.cpp
Message-ID: <200807112058.m6BKwKNl023959@zion.cs.uiuc.edu>

Author: djg
Date: Fri Jul 11 15:58:19 2008
New Revision: 53474

URL: http://llvm.org/viewvc/llvm-project?rev=53474&view=rev
Log:
Use find instead of lower_bound.

Modified:
    llvm/trunk/include/llvm/Analysis/LoopInfo.h
    llvm/trunk/lib/Analysis/LoadValueNumbering.cpp
    llvm/trunk/lib/Support/Timer.cpp
    llvm/trunk/lib/Transforms/IPO/GlobalDCE.cpp
    llvm/trunk/lib/VMCore/Constants.cpp
    llvm/trunk/lib/VMCore/Type.cpp

Modified: llvm/trunk/include/llvm/Analysis/LoopInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LoopInfo.h?rev=53474&r1=53473&r2=53474&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Analysis/LoopInfo.h (original)
+++ llvm/trunk/include/llvm/Analysis/LoopInfo.h Fri Jul 11 15:58:19 2008
@@ -823,8 +823,8 @@
     for (typename std::vector<BlockT*>::iterator I = L->Blocks.begin(),
            E = L->Blocks.end(); I != E; ++I) {
       typename std::map<BlockT*, LoopBase<BlockT>*>::iterator BBMI =
-                                                          BBMap.lower_bound(*I);
-      if (BBMI == BBMap.end() || BBMI->first != *I)  // Not in map yet...
+                                                          BBMap.find(*I);
+      if (BBMI == BBMap.end())                       // Not in map yet...
         BBMap.insert(BBMI, std::make_pair(*I, L));   // Must be at this level
     }
 

Modified: llvm/trunk/lib/Analysis/LoadValueNumbering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LoadValueNumbering.cpp?rev=53474&r1=53473&r2=53474&view=diff

==============================================================================
--- llvm/trunk/lib/Analysis/LoadValueNumbering.cpp (original)
+++ llvm/trunk/lib/Analysis/LoadValueNumbering.cpp Fri Jul 11 15:58:19 2008
@@ -117,9 +117,9 @@
 
   // Check whether this block is known transparent or not.
   std::map<BasicBlock*, bool>::iterator TBI =
-    TransparentBlocks.lower_bound(CurBlock);
+    TransparentBlocks.find(CurBlock);
 
-  if (TBI == TransparentBlocks.end() || TBI->first != CurBlock) {
+  if (TBI == TransparentBlocks.end()) {
     // If this basic block can modify the memory location, then the path is not
     // transparent!
     if (AA.canBasicBlockModify(*CurBlock, Ptr, Size)) {

Modified: llvm/trunk/lib/Support/Timer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Timer.cpp?rev=53474&r1=53473&r2=53474&view=diff

==============================================================================
--- llvm/trunk/lib/Support/Timer.cpp (original)
+++ llvm/trunk/lib/Support/Timer.cpp Fri Jul 11 15:58:19 2008
@@ -185,8 +185,8 @@
 static ManagedStatic<std::map<std::string, Timer> > NamedTimers;
 
 static Timer &getNamedRegionTimer(const std::string &Name) {
-  std::map<std::string, Timer>::iterator I = NamedTimers->lower_bound(Name);
-  if (I != NamedTimers->end() && I->first == Name)
+  std::map<std::string, Timer>::iterator I = NamedTimers->find(Name);
+  if (I != NamedTimers->end())
     return I->second;
 
   return NamedTimers->insert(I, std::make_pair(Name, Timer(Name)))->second;

Modified: llvm/trunk/lib/Transforms/IPO/GlobalDCE.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/GlobalDCE.cpp?rev=53474&r1=53473&r2=53474&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/IPO/GlobalDCE.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/GlobalDCE.cpp Fri Jul 11 15:58:19 2008
@@ -134,10 +134,10 @@
 /// MarkGlobalIsNeeded - the specific global value as needed, and
 /// recursively mark anything that it uses as also needed.
 void GlobalDCE::GlobalIsNeeded(GlobalValue *G) {
-  std::set<GlobalValue*>::iterator I = AliveGlobals.lower_bound(G);
+  std::set<GlobalValue*>::iterator I = AliveGlobals.find(G);
 
   // If the global is already in the set, no need to reprocess it.
-  if (I != AliveGlobals.end() && *I == G) return;
+  if (I != AliveGlobals.end()) return;
 
   // Otherwise insert it now, so we do not infinitely recurse
   AliveGlobals.insert(I, G);

Modified: llvm/trunk/lib/VMCore/Constants.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=53474&r1=53473&r2=53474&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/Constants.cpp (original)
+++ llvm/trunk/lib/VMCore/Constants.cpp Fri Jul 11 15:58:19 2008
@@ -1100,9 +1100,9 @@
     /// necessary.
     ConstantClass *getOrCreate(const TypeClass *Ty, const ValType &V) {
       MapKey Lookup(Ty, V);
-      typename MapTy::iterator I = Map.lower_bound(Lookup);
+      typename MapTy::iterator I = Map.find(Lookup);
       // Is it in the map?      
-      if (I != Map.end() && I->first == Lookup)
+      if (I != Map.end())
         return static_cast<ConstantClass *>(I->second);  
 
       // If no preexisting value, create one now...
@@ -1119,10 +1119,9 @@
       // If the type of the constant is abstract, make sure that an entry exists
       // for it in the AbstractTypeMap.
       if (Ty->isAbstract()) {
-        typename AbstractTypeMapTy::iterator TI =
-          AbstractTypeMap.lower_bound(Ty);
+        typename AbstractTypeMapTy::iterator TI = AbstractTypeMap.find(Ty);
 
-        if (TI == AbstractTypeMap.end() || TI->first != Ty) {
+        if (TI == AbstractTypeMap.end()) {
           // Add ourselves to the ATU list of the type.
           cast<DerivedType>(Ty)->addAbstractTypeUser(this);
 

Modified: llvm/trunk/lib/VMCore/Type.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Type.cpp?rev=53474&r1=53473&r2=53474&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/Type.cpp (original)
+++ llvm/trunk/lib/VMCore/Type.cpp Fri Jul 11 15:58:19 2008
@@ -251,8 +251,8 @@
                                       std::vector<const Type *> &TypeStack) {
   if (isa<OpaqueType>(Ty)) {                     // Base case for the recursion
     std::map<const Type*, std::string>::iterator I =
-      AbstractTypeDescriptions->lower_bound(Ty);
-    if (I != AbstractTypeDescriptions->end() && I->first == Ty)
+      AbstractTypeDescriptions->find(Ty);
+    if (I != AbstractTypeDescriptions->end())
       return I->second;
     std::string Desc = "opaque";
     AbstractTypeDescriptions->insert(std::make_pair(Ty, Desc));
@@ -655,8 +655,8 @@
   if (isa<OpaqueType>(Ty))
     return false;  // Two unequal opaque types are never equal
 
-  std::map<const Type*, const Type*>::iterator It = EqTypes.lower_bound(Ty);
-  if (It != EqTypes.end() && It->first == Ty)
+  std::map<const Type*, const Type*>::iterator It = EqTypes.find(Ty);
+  if (It != EqTypes.end())
     return It->second == Ty2;    // Looping back on a type, check for equality
 
   // Otherwise, add the mapping to the table to make sure we don't get




From gohman at apple.com  Fri Jul 11 16:54:35 2008
From: gohman at apple.com (Dan Gohman)
Date: Fri, 11 Jul 2008 21:54:35 -0000
Subject: [llvm-commits] [llvm] r53476 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAGISel.h include/llvm/Support/Timer.h
 lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
 lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Support/Timer.cpp
Message-ID: <200807112154.m6BLsZt6026402@zion.cs.uiuc.edu>

Author: djg
Date: Fri Jul 11 16:54:34 2008
New Revision: 53476

URL: http://llvm.org/viewvc/llvm-project?rev=53476&view=rev
Log:
Add support for putting NamedRegionTimers in TimerGroups, and
use a timer group for the timers in SelectionDAGISel. Also,
Split scheduling out from emitting, to give each their own
timer.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
    llvm/trunk/include/llvm/Support/Timer.h
    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    llvm/trunk/lib/Support/Timer.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=53476&r1=53475&r2=53476&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Fri Jul 11 16:54:34 2008
@@ -30,6 +30,7 @@
   class FunctionLoweringInfo;
   class HazardRecognizer;
   class CollectorMetadata;
+  class ScheduleDAG;
  
 /// SelectionDAGISel - This is the common base class used for SelectionDAG-based
 /// pattern-matching instruction selectors.
@@ -191,9 +192,9 @@
   
   void ComputeLiveOutVRegInfo(SelectionDAG &DAG);
 
-  /// Pick a safe ordering and emit instructions for each target node in the
+  /// Pick a safe ordering for instructions for each target node in the
   /// graph.
-  void ScheduleAndEmitDAG(SelectionDAG &DAG);
+  ScheduleDAG *Schedule(SelectionDAG &DAG);
 
   /// SwitchCases - Vector of CaseBlock structures used to communicate
   /// SwitchInst code generation information.

Modified: llvm/trunk/include/llvm/Support/Timer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/Timer.h?rev=53476&r1=53475&r2=53476&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/Timer.h (original)
+++ llvm/trunk/include/llvm/Support/Timer.h Fri Jul 11 16:54:34 2008
@@ -132,6 +132,8 @@
 ///
 struct NamedRegionTimer : public TimeRegion {
   explicit NamedRegionTimer(const std::string &Name);
+  explicit NamedRegionTimer(const std::string &Name,
+                            const std::string &GroupName);
 };
 
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp?rev=53476&r1=53475&r2=53476&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Fri Jul 11 16:54:34 2008
@@ -103,9 +103,6 @@
   DOUT << "*** Final schedule ***\n";
   DEBUG(dumpSchedule());
   DOUT << "\n";
-  
-  // Emit in scheduled order
-  EmitSchedule();
 }
 
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=53476&r1=53475&r2=53476&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Fri Jul 11 16:54:34 2008
@@ -208,9 +208,6 @@
   DOUT << "*** Final schedule ***\n";
   DEBUG(dumpSchedule());
   DOUT << "\n";
-  
-  // Emit in scheduled order
-  EmitSchedule();
 }
 
 /// CommuteNodesToReducePressure - If a node is two-address and commutable, and

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=53476&r1=53475&r2=53476&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri Jul 11 16:54:34 2008
@@ -5284,10 +5284,11 @@
 void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
   DOUT << "Lowered selection DAG:\n";
   DEBUG(DAG.dump());
+  std::string GroupName = "Instruction Selection and Scheduling";
 
   // Run the DAG combiner in pre-legalize mode.
   if (TimePassesIsEnabled) {
-    NamedRegionTimer T("DAG Combining 1");
+    NamedRegionTimer T("DAG Combining 1", GroupName);
     DAG.Combine(false, *AA);
   } else {
     DAG.Combine(false, *AA);
@@ -5304,7 +5305,7 @@
   }
   
   if (TimePassesIsEnabled) {
-    NamedRegionTimer T("DAG Legalization");
+    NamedRegionTimer T("DAG Legalization", GroupName);
     DAG.Legalize();
   } else {
     DAG.Legalize();
@@ -5315,7 +5316,7 @@
   
   // Run the DAG combiner in post-legalize mode.
   if (TimePassesIsEnabled) {
-    NamedRegionTimer T("DAG Combining 2");
+    NamedRegionTimer T("DAG Combining 2", GroupName);
     DAG.Combine(true, *AA);
   } else {
     DAG.Combine(true, *AA);
@@ -5332,24 +5333,41 @@
   // Third, instruction select all of the operations to machine code, adding the
   // code to the MachineBasicBlock.
   if (TimePassesIsEnabled) {
-    NamedRegionTimer T("Instruction Selection");
+    NamedRegionTimer T("Instruction Selection", GroupName);
     InstructionSelect(DAG);
   } else {
     InstructionSelect(DAG);
   }
 
+  // Schedule machine code.
+  ScheduleDAG *Scheduler;
+  if (TimePassesIsEnabled) {
+    NamedRegionTimer T("Instruction Scheduling", GroupName);
+    Scheduler = Schedule(DAG);
+  } else {
+    Scheduler = Schedule(DAG);
+  }
+
   // Emit machine code to BB.  This can change 'BB' to the last block being 
   // inserted into.
   if (TimePassesIsEnabled) {
-    NamedRegionTimer T("Instruction Scheduling");
-    ScheduleAndEmitDAG(DAG);
+    NamedRegionTimer T("Instruction Creation", GroupName);
+    Scheduler->EmitSchedule();
+  } else {
+    Scheduler->EmitSchedule();
+  }
+
+  // Free the scheduler state.
+  if (TimePassesIsEnabled) {
+    NamedRegionTimer T("Instruction Scheduling Cleanup", GroupName);
+    delete Scheduler;
   } else {
-    ScheduleAndEmitDAG(DAG);
+    delete Scheduler;
   }
 
   // Perform target specific isel post processing.
   if (TimePassesIsEnabled) {
-    NamedRegionTimer T("Instruction Selection Post Processing");
+    NamedRegionTimer T("Instruction Selection Post Processing", GroupName);
     InstructionSelectPostProcessing(DAG);
   } else {
     InstructionSelectPostProcessing(DAG);
@@ -5597,10 +5615,10 @@
 }
 
 
-//===----------------------------------------------------------------------===//
-/// ScheduleAndEmitDAG - Pick a safe ordering and emit instructions for each
+/// Schedule - Pick a safe ordering for instructions for each
 /// target node in the graph.
-void SelectionDAGISel::ScheduleAndEmitDAG(SelectionDAG &DAG) {
+///
+ScheduleDAG *SelectionDAGISel::Schedule(SelectionDAG &DAG) {
   if (ViewSchedDAGs) DAG.viewGraph();
 
   RegisterScheduler::FunctionPassCtor Ctor = RegisterScheduler::getDefault();
@@ -5610,12 +5628,11 @@
     RegisterScheduler::setDefault(Ctor);
   }
   
-  ScheduleDAG *SL = Ctor(this, &DAG, BB, FastISel);
-  BB = SL->Run();
-
-  if (ViewSUnitDAGs) SL->viewGraph();
+  ScheduleDAG *Scheduler = Ctor(this, &DAG, BB, FastISel);
+  BB = Scheduler->Run();
 
-  delete SL;
+  if (ViewSUnitDAGs) Scheduler->viewGraph();
+  return Scheduler;
 }
 
 

Modified: llvm/trunk/lib/Support/Timer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Timer.cpp?rev=53476&r1=53475&r2=53476&view=diff

==============================================================================
--- llvm/trunk/lib/Support/Timer.cpp (original)
+++ llvm/trunk/lib/Support/Timer.cpp Fri Jul 11 16:54:34 2008
@@ -182,19 +182,51 @@
 //   NamedRegionTimer Implementation
 //===----------------------------------------------------------------------===//
 
-static ManagedStatic<std::map<std::string, Timer> > NamedTimers;
+namespace {
+
+typedef std::map<std::string, Timer> Name2Timer;
+typedef std::map<std::string, std::pair<TimerGroup, Name2Timer> > Name2Pair;
+
+}
+
+static ManagedStatic<Name2Timer> NamedTimers;
+
+static ManagedStatic<Name2Pair> NamedGroupedTimers;
 
 static Timer &getNamedRegionTimer(const std::string &Name) {
-  std::map<std::string, Timer>::iterator I = NamedTimers->find(Name);
+  Name2Timer::iterator I = NamedTimers->find(Name);
   if (I != NamedTimers->end())
     return I->second;
 
   return NamedTimers->insert(I, std::make_pair(Name, Timer(Name)))->second;
 }
 
+static Timer &getNamedRegionTimer(const std::string &Name,
+                                  const std::string &GroupName) {
+
+  Name2Pair::iterator I = NamedGroupedTimers->find(GroupName);
+  if (I == NamedGroupedTimers->end()) {
+    TimerGroup TG(GroupName);
+    std::pair<TimerGroup, Name2Timer> Pair(TG, Name2Timer());
+    I = NamedGroupedTimers->insert(I, std::make_pair(GroupName, Pair));
+  }
+
+  Name2Timer::iterator J = I->second.second.find(Name);
+  if (J == I->second.second.end())
+    J = I->second.second.insert(J,
+                                std::make_pair(Name,
+                                               Timer(Name,
+                                                     I->second.first)));
+
+  return J->second;
+}
+
 NamedRegionTimer::NamedRegionTimer(const std::string &Name)
   : TimeRegion(getNamedRegionTimer(Name)) {}
 
+NamedRegionTimer::NamedRegionTimer(const std::string &Name,
+                                   const std::string &GroupName)
+  : TimeRegion(getNamedRegionTimer(Name, GroupName)) {}
 
 //===----------------------------------------------------------------------===//
 //   TimerGroup Implementation




From isanbard at gmail.com  Fri Jul 11 17:33:28 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Fri, 11 Jul 2008 22:33:28 -0000
Subject: [llvm-commits] [llvm] r53478 - in /llvm/tags/Apple/llvmCore-2045.2:
 ./ utils/buildit/build_llvm
Message-ID: <200807112233.m6BMXSkP027530@zion.cs.uiuc.edu>

Author: void
Date: Fri Jul 11 17:33:27 2008
New Revision: 53478

URL: http://llvm.org/viewvc/llvm-project?rev=53478&view=rev
Log:
Update to build_llvm. Don't output a floating point number for the version.

Added:
    llvm/tags/Apple/llvmCore-2045.2/
      - copied from r53477, llvm/tags/Apple/llvmCore-2045/
Modified:
    llvm/tags/Apple/llvmCore-2045.2/utils/buildit/build_llvm

Modified: llvm/tags/Apple/llvmCore-2045.2/utils/buildit/build_llvm
URL: http://llvm.org/viewvc/llvm-project/llvm/tags/Apple/llvmCore-2045.2/utils/buildit/build_llvm?rev=53478&r1=53477&r2=53478&view=diff

==============================================================================
--- llvm/tags/Apple/llvmCore-2045.2/utils/buildit/build_llvm (original)
+++ llvm/tags/Apple/llvmCore-2045.2/utils/buildit/build_llvm Fri Jul 11 17:33:27 2008
@@ -89,6 +89,14 @@
         || exit 1
 fi
 
+SUBVERSION=`echo $RC_ProjectSourceVersion | sed -e 's/.*\.//'`
+
+if [ "x$SUBVERSION" != "x$RC_ProjectSourceVersion" ]; then
+    LLVM_SUBMIT_SUBVERSION=`printf "%02d" $SUBVERSION`
+    RC_ProjectSourceVersion=`echo $RC_ProjectSourceVersion | sed -e 's/\..*//'`
+    LLVM_SUBMIT_VERSION=$RC_ProjectSourceVersion
+fi
+
 if [ "x$LLVM_SUBMIT_SUBVERSION" = "x00" -o "x$LLVM_SUBMIT_SUBVERSION" = "x0" ]; then
     LLVM_VERSION="$LLVM_SUBMIT_VERSION"
 else
@@ -158,6 +166,7 @@
 
 # Install Version.h
 RC_ProjectSourceSubversion=`printf "%d" $LLVM_SUBMIT_SUBVERSION`
+
 echo "#define LLVM_VERSION ${RC_ProjectSourceVersion}" > $DEST_DIR$DEST_ROOT/include/llvm/Version.h
 echo "#define LLVM_MINOR_VERSION ${RC_ProjectSourceSubversion}" >> $DEST_DIR$DEST_ROOT/include/llvm/Version.h
 
@@ -176,8 +185,10 @@
 
 if [ $MACOSX_DEPLOYMENT_TARGET = "10.4" ]; then
     find . -perm 755 -type f -exec lipo -extract ppc -extract i386 {} -output {} \;
-else
+elif [ $MACOSX_DEPLOYMENT_TARGET = "10.5" ]; then
     find . -perm 755 -type f -exec lipo -extract ppc7400 -extract i386 {} -output {} \;
+else
+    find . -perm 755 -type f -exec lipo -extract ppc7400 -extract i386 -extract x86_64 {} -output {} \;
 fi
 
 cd $DEST_DIR$DEST_ROOT




From isanbard at gmail.com  Fri Jul 11 17:36:20 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Fri, 11 Jul 2008 22:36:20 -0000
Subject: [llvm-commits] [llvm] r53479 - in /llvm/branches/Apple/Gaz:
 lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/x86-64-frameaddr.ll
Message-ID: <200807112236.m6BMaKlr027621@zion.cs.uiuc.edu>

Author: void
Date: Fri Jul 11 17:36:20 2008
New Revision: 53479

URL: http://llvm.org/viewvc/llvm-project?rev=53479&view=rev
Log:
Pull r53450 into Gaz:

The frame address on an x86-64 box needs to be offset by -8, not -4.

Added:
    llvm/branches/Apple/Gaz/test/CodeGen/X86/x86-64-frameaddr.ll
Modified:
    llvm/branches/Apple/Gaz/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/branches/Apple/Gaz/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/Target/X86/X86ISelLowering.cpp?rev=53479&r1=53478&r2=53479&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/Target/X86/X86ISelLowering.cpp Fri Jul 11 17:36:20 2008
@@ -5348,7 +5348,7 @@
     
   SDOperand RetAddrFI = getReturnAddressFrameIndex(DAG);
   return DAG.getNode(ISD::SUB, getPointerTy(), RetAddrFI, 
-                     DAG.getIntPtrConstant(4));
+                     DAG.getIntPtrConstant(!Subtarget->is64Bit() ? 4 : 8));
 }
 
 SDOperand X86TargetLowering::LowerFRAME_TO_ARGS_OFFSET(SDOperand Op,

Added: llvm/branches/Apple/Gaz/test/CodeGen/X86/x86-64-frameaddr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/test/CodeGen/X86/x86-64-frameaddr.ll?rev=53479&view=auto

==============================================================================
--- llvm/branches/Apple/Gaz/test/CodeGen/X86/x86-64-frameaddr.ll (added)
+++ llvm/branches/Apple/Gaz/test/CodeGen/X86/x86-64-frameaddr.ll Fri Jul 11 17:36:20 2008
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -march=x86-64 | grep {leaq	-8(%rsp), %rax}
+ at llvm.noinline = appending global [1 x i8*] [ i8* bitcast (i64* ()* @stack_end_address to i8*) ], section "llvm.metadata"
+
+define internal i64* @stack_end_address() nounwind  {
+entry:
+	tail call i8* @llvm.frameaddress( i32 0 )
+	bitcast i8* %0 to i64*
+	ret i64* %1
+}
+
+declare i8* @llvm.frameaddress(i32) nounwind readnone 




From gohman at apple.com  Fri Jul 11 17:36:22 2008
From: gohman at apple.com (Dan Gohman)
Date: Fri, 11 Jul 2008 22:36:22 -0000
Subject: [llvm-commits] [llvm] r53480 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: ScheduleDAG.cpp ScheduleDAGList.cpp
 ScheduleDAGRRList.cpp
Message-ID: <200807112236.m6BMaMkF027636@zion.cs.uiuc.edu>

Author: djg
Date: Fri Jul 11 17:36:22 2008
New Revision: 53480

URL: http://llvm.org/viewvc/llvm-project?rev=53480&view=rev
Log:
Factor out debugging code into the common base class.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=53480&r1=53479&r2=53480&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Fri Jul 11 17:36:22 2008
@@ -1136,6 +1136,11 @@
 ///
 MachineBasicBlock *ScheduleDAG::Run() {
   Schedule();
+  
+  DOUT << "*** Final schedule ***\n";
+  DEBUG(dumpSchedule());
+  DOUT << "\n";
+
   return BB;
 }
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp?rev=53480&r1=53479&r2=53480&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Fri Jul 11 17:36:22 2008
@@ -99,10 +99,6 @@
   ListScheduleTopDown();
   
   AvailableQueue->releaseState();
-  
-  DOUT << "*** Final schedule ***\n";
-  DEBUG(dumpSchedule());
-  DOUT << "\n";
 }
 
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=53480&r1=53479&r2=53480&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Fri Jul 11 17:36:22 2008
@@ -204,10 +204,6 @@
 
   if (!Fast)
     CommuteNodesToReducePressure();
-  
-  DOUT << "*** Final schedule ***\n";
-  DEBUG(dumpSchedule());
-  DOUT << "\n";
 }
 
 /// CommuteNodesToReducePressure - If a node is two-address and commutable, and




From gohman at apple.com  Fri Jul 11 17:39:59 2008
From: gohman at apple.com (Dan Gohman)
Date: Fri, 11 Jul 2008 22:39:59 -0000
Subject: [llvm-commits] [llvm] r53481 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
Message-ID: <200807112239.m6BMdxk8027779@zion.cs.uiuc.edu>

Author: djg
Date: Fri Jul 11 17:39:58 2008
New Revision: 53481

URL: http://llvm.org/viewvc/llvm-project?rev=53481&view=rev
Log:
Fix an obsolete top-level comment.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=53481&r1=53480&r2=53481&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Fri Jul 11 17:39:58 2008
@@ -7,9 +7,8 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This implements a simple two pass scheduler.  The first pass attempts to push
-// backward any lengthy instructions and critical paths.  The second pass packs
-// instructions into semi-optimal time slots.
+// This implements the ScheduleDAG class, which is a base class used by
+// scheduling implementation classes.
 //
 //===----------------------------------------------------------------------===//
 




From isanbard at gmail.com  Fri Jul 11 17:42:11 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Fri, 11 Jul 2008 22:42:11 -0000
Subject: [llvm-commits] [llvm] r53484 - /llvm/trunk/utils/buildit/build_llvm
Message-ID: <200807112242.m6BMgB5E027885@zion.cs.uiuc.edu>

Author: void
Date: Fri Jul 11 17:42:10 2008
New Revision: 53484

URL: http://llvm.org/viewvc/llvm-project?rev=53484&view=rev
Log:
Porting r53478 into mainline:

Update to build_llvm. Don't output a floating point number for the version.

Modified:
    llvm/trunk/utils/buildit/build_llvm

Modified: llvm/trunk/utils/buildit/build_llvm
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/buildit/build_llvm?rev=53484&r1=53483&r2=53484&view=diff

==============================================================================
--- llvm/trunk/utils/buildit/build_llvm (original)
+++ llvm/trunk/utils/buildit/build_llvm Fri Jul 11 17:42:10 2008
@@ -89,6 +89,14 @@
         || exit 1
 fi
 
+SUBVERSION=`echo $RC_ProjectSourceVersion | sed -e 's/.*\.//'`
+
+if [ "x$SUBVERSION" != "x$RC_ProjectSourceVersion" ]; then
+    LLVM_SUBMIT_SUBVERSION=`printf "%02d" $SUBVERSION`
+    RC_ProjectSourceVersion=`echo $RC_ProjectSourceVersion | sed -e 's/\..*//'`
+    LLVM_SUBMIT_VERSION=$RC_ProjectSourceVersion
+fi
+
 if [ "x$LLVM_SUBMIT_SUBVERSION" = "x00" -o "x$LLVM_SUBMIT_SUBVERSION" = "x0" ]; then
     LLVM_VERSION="$LLVM_SUBMIT_VERSION"
 else




From kremenek at apple.com  Fri Jul 11 17:43:07 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Fri, 11 Jul 2008 22:43:07 -0000
Subject: [llvm-commits] [llvm] r53485 -
	/llvm/trunk/include/llvm/ADT/ImmutableList.h
Message-ID: <200807112243.m6BMh8MS027931@zion.cs.uiuc.edu>

Author: kremenek
Date: Fri Jul 11 17:43:07 2008
New Revision: 53485

URL: http://llvm.org/viewvc/llvm-project?rev=53485&view=rev
Log:
Minor tweaks to the ImmutableList iterator interface.
Added partial specialization of DenseMapInfo<T> for ImmutableList.

Modified:
    llvm/trunk/include/llvm/ADT/ImmutableList.h

Modified: llvm/trunk/include/llvm/ADT/ImmutableList.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ImmutableList.h?rev=53485&r1=53484&r2=53485&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/ImmutableList.h (original)
+++ llvm/trunk/include/llvm/ADT/ImmutableList.h Fri Jul 11 17:43:07 2008
@@ -73,7 +73,7 @@
   // This constructor should normally only be called by ImmutableListFactory<T>.
   // There may be cases, however, when one needs to extract the internal pointer
   // and reconstruct a list object from that pointer.
-  ImmutableList(ImmutableListImpl<T>* x) : X(x) {}
+  ImmutableList(ImmutableListImpl<T>* x = 0) : X(x) {}
 
   ImmutableListImpl<T>* getInternalPointer() const {
     return X;
@@ -88,7 +88,8 @@
     iterator& operator++() { L = L->getTail(); return *this; }
     bool operator==(const iterator& I) const { return L == I.L; }
     bool operator!=(const iterator& I) const { return L != I.L; }
-    ImmutableList operator*() const { return L; }
+    const value_type& operator*() const { return L->getHead(); }    
+    ImmutableList getList() const { return L; }    
   };
 
   /// begin - Returns an iterator referring to the head of the list, or
@@ -186,6 +187,29 @@
   }
 };
   
+//===----------------------------------------------------------------------===//  
+// Partially-specialized Traits.
+//===----------------------------------------------------------------------===//  
+  
+template<typename T> struct DenseMapInfo;
+template<typename T> struct DenseMapInfo<ImmutableList<T> > {
+  static inline ImmutableList<T> getEmptyKey() {
+    return reinterpret_cast<ImmutableListImpl<T>*>(-1);
+  }
+  static inline ImmutableList<T> getTombstoneKey() {
+    return reinterpret_cast<ImmutableListImpl<T>*>(-2);
+  }
+  static unsigned getHashValue(ImmutableList<T> X) {
+    uintptr_t PtrVal = reinterpret_cast<uintptr_t>(X.getInternalPointer());
+    return (unsigned((uintptr_t)PtrVal) >> 4) ^ 
+           (unsigned((uintptr_t)PtrVal) >> 9);
+  }
+  static bool isEqual(ImmutableList<T> X1, ImmutableList<T> X2) {
+    return X1 == X2;
+  }
+  static bool isPod() { return true; }
+};
+  
 } // end llvm namespace
 
 #endif




From gohman at apple.com  Fri Jul 11 17:44:52 2008
From: gohman at apple.com (Dan Gohman)
Date: Fri, 11 Jul 2008 22:44:52 -0000
Subject: [llvm-commits] [llvm] r53486 - in /llvm/trunk:
 include/llvm/CodeGen/PseudoSourceValue.h lib/CodeGen/PseudoSourceValue.cpp
 lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
 lib/Target/PowerPC/PPCISelLowering.cpp lib/Target/X86/X86ISelLowering.cpp
Message-ID: <200807112244.m6BMir04027997@zion.cs.uiuc.edu>

Author: djg
Date: Fri Jul 11 17:44:52 2008
New Revision: 53486

URL: http://llvm.org/viewvc/llvm-project?rev=53486&view=rev
Log:
Include a frame index in the "fixed stack" pseudo source value
instead of using the frame index for the SVOffset, which was
inconsistent.

Modified:
    llvm/trunk/include/llvm/CodeGen/PseudoSourceValue.h
    llvm/trunk/lib/CodeGen/PseudoSourceValue.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/include/llvm/CodeGen/PseudoSourceValue.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/PseudoSourceValue.h?rev=53486&r1=53485&r2=53486&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/PseudoSourceValue.h (original)
+++ llvm/trunk/include/llvm/CodeGen/PseudoSourceValue.h Fri Jul 11 17:44:52 2008
@@ -35,9 +35,9 @@
       return V->getValueID() == PseudoSourceValueVal;
     }
 
-    /// A pseudo source value referencing to the stack frame of a function,
+    /// A pseudo source value referencing a fixed stack frame entry,
     /// e.g., a spill slot.
-    static const PseudoSourceValue *getFixedStack();
+    static const PseudoSourceValue *getFixedStack(int FI);
 
     /// A source value referencing the area below the stack frame of a function,
     /// e.g., the argument space.

Modified: llvm/trunk/lib/CodeGen/PseudoSourceValue.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PseudoSourceValue.cpp?rev=53486&r1=53485&r2=53486&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/PseudoSourceValue.cpp (original)
+++ llvm/trunk/lib/CodeGen/PseudoSourceValue.cpp Fri Jul 11 17:44:52 2008
@@ -13,28 +13,27 @@
 
 #include "llvm/CodeGen/PseudoSourceValue.h"
 #include "llvm/DerivedTypes.h"
+#include "llvm/Support/Compiler.h"
 #include "llvm/Support/ManagedStatic.h"
+#include <map>
 
 namespace llvm {
-  static ManagedStatic<PseudoSourceValue[5]> PSVs;
+  static ManagedStatic<PseudoSourceValue[4]> PSVs;
 
-  const PseudoSourceValue *PseudoSourceValue::getFixedStack()
-  { return &(*PSVs)[0]; }
   const PseudoSourceValue *PseudoSourceValue::getStack()
-  { return &(*PSVs)[1]; }
+  { return &(*PSVs)[0]; }
   const PseudoSourceValue *PseudoSourceValue::getGOT()
+  { return &(*PSVs)[1]; }
+  const PseudoSourceValue *PseudoSourceValue::getJumpTable()
   { return &(*PSVs)[2]; }
   const PseudoSourceValue *PseudoSourceValue::getConstantPool()
   { return &(*PSVs)[3]; }
-  const PseudoSourceValue *PseudoSourceValue::getJumpTable()
-  { return &(*PSVs)[4]; }
 
   static const char *const PSVNames[] = {
-    "FixedStack",
     "Stack",
     "GOT",
-    "ConstantPool",
     "JumpTable"
+    "ConstantPool"
   };
 
   PseudoSourceValue::PseudoSourceValue() :
@@ -43,4 +42,26 @@
   void PseudoSourceValue::print(std::ostream &OS) const {
     OS << PSVNames[this - *PSVs];
   }
+
+  /// FixedStackPseudoSourceValue - A specialized PseudoSourceValue
+  /// for holding FixedStack values, which must include a frame
+  /// index.
+  class VISIBILITY_HIDDEN FixedStackPseudoSourceValue
+    : public PseudoSourceValue {
+    const int FI;
+  public:
+    explicit FixedStackPseudoSourceValue(int fi) : FI(fi) {}
+    virtual void print(std::ostream &OS) const {
+      OS << "FixedStack" << FI;
+    }
+  };
+
+  static ManagedStatic<std::map<int, const PseudoSourceValue *> > FSValues;
+
+  const PseudoSourceValue *PseudoSourceValue::getFixedStack(int FI) {
+    const PseudoSourceValue *&V = (*FSValues)[FI];
+    if (!V)
+      V = new FixedStackPseudoSourceValue(FI);
+    return V;
+  }
 }

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=53486&r1=53485&r2=53486&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Jul 11 17:44:52 2008
@@ -780,13 +780,11 @@
   MVT PtrVT = TLI.getPointerTy();
   SDOperand StackPtr = DAG.CreateStackTemporary(VT);
 
-  FrameIndexSDNode *StackPtrFI = cast<FrameIndexSDNode>(StackPtr.Val);
-  int SPFI = StackPtrFI->getIndex();
+  int SPFI = cast<FrameIndexSDNode>(StackPtr.Val)->getIndex();
 
   // Store the vector.
   SDOperand Ch = DAG.getStore(DAG.getEntryNode(), Tmp1, StackPtr,
-                              PseudoSourceValue::getFixedStack(),
-                              SPFI);
+                              PseudoSourceValue::getFixedStack(SPFI), 0);
 
   // Truncate or zero extend offset to target pointer type.
   unsigned CastOpc = IdxVT.bitsGT(PtrVT) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
@@ -797,9 +795,10 @@
   SDOperand StackPtr2 = DAG.getNode(ISD::ADD, IdxVT, Tmp3, StackPtr);
   // Store the scalar value.
   Ch = DAG.getTruncStore(Ch, Tmp2, StackPtr2,
-                         PseudoSourceValue::getFixedStack(), SPFI, EltVT);
+                         PseudoSourceValue::getFixedStack(SPFI), 0, EltVT);
   // Load the updated vector.
-  return DAG.getLoad(VT, Ch, StackPtr, PseudoSourceValue::getFixedStack(),SPFI);
+  return DAG.getLoad(VT, Ch, StackPtr,
+                     PseudoSourceValue::getFixedStack(SPFI), 0);
 }
 
 /// LegalizeOp - We know that the specified value has a legal type, and
@@ -4906,12 +4905,12 @@
   
   if (SrcSize > SlotSize)
     Store = DAG.getTruncStore(DAG.getEntryNode(), SrcOp, FIPtr,
-                              PseudoSourceValue::getFixedStack(), SPFI, SlotVT, 
-                              false, SrcAlign);
+                              PseudoSourceValue::getFixedStack(SPFI), 0,
+                              SlotVT, false, SrcAlign);
   else {
     assert(SrcSize == SlotSize && "Invalid store");
     Store = DAG.getStore(DAG.getEntryNode(), SrcOp, FIPtr,
-                         PseudoSourceValue::getFixedStack(), SPFI,
+                         PseudoSourceValue::getFixedStack(SPFI), 0,
                          false, SrcAlign);
   }
   
@@ -4933,9 +4932,9 @@
   int SPFI = StackPtrFI->getIndex();
 
   SDOperand Ch = DAG.getStore(DAG.getEntryNode(), Node->getOperand(0), StackPtr,
-                              PseudoSourceValue::getFixedStack(), SPFI);
+                              PseudoSourceValue::getFixedStack(SPFI), 0);
   return DAG.getLoad(Node->getValueType(0), Ch, StackPtr,
-                     PseudoSourceValue::getFixedStack(), SPFI);
+                     PseudoSourceValue::getFixedStack(SPFI), 0);
 }
 
 
@@ -7017,15 +7016,13 @@
       // Lower to a store/load so that it can be split.
       // FIXME: this could be improved probably.
       SDOperand Ptr = DAG.CreateStackTemporary(InOp.getValueType());
-      FrameIndexSDNode *FI = cast<FrameIndexSDNode>(Ptr.Val);
+      int FI = cast<FrameIndexSDNode>(Ptr.Val)->getIndex();
 
       SDOperand St = DAG.getStore(DAG.getEntryNode(),
                                   InOp, Ptr,
-                                  PseudoSourceValue::getFixedStack(),
-                                  FI->getIndex());
+                                  PseudoSourceValue::getFixedStack(FI), 0);
       InOp = DAG.getLoad(Op.getValueType(), St, Ptr,
-                         PseudoSourceValue::getFixedStack(),
-                         FI->getIndex());
+                         PseudoSourceValue::getFixedStack(FI), 0);
     }
     // Split the vector and convert each of the pieces now.
     SplitVectorOp(InOp, Lo, Hi);

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=53486&r1=53485&r2=53486&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Fri Jul 11 17:44:52 2008
@@ -4361,8 +4361,8 @@
   const FrameIndexSDNode *FI = 
   dyn_cast<const FrameIndexSDNode>(getBasePtr().Val);
   if (!getSrcValue() && FI)
-    return MachineMemOperand(PseudoSourceValue::getFixedStack(), Flags,
-                             FI->getIndex(), Size, getAlignment());
+    return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
+                             Flags, 0, Size, getAlignment());
   else
     return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
                              Size, getAlignment());

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=53486&r1=53485&r2=53486&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Fri Jul 11 17:44:52 2008
@@ -1943,8 +1943,8 @@
     int FI = TailCallArgs[i].FrameIdx;
     // Store relative to framepointer.
     MemOpChains.push_back(DAG.getStore(Chain, Arg, FIN,
-                                       PseudoSourceValue::getFixedStack(),
-                                       FI));
+                                       PseudoSourceValue::getFixedStack(FI),
+                                       0));
   }
 }
 
@@ -1972,10 +1972,10 @@
     MVT VT = isPPC64 ? MVT::i64 : MVT::i32;
     SDOperand NewRetAddrFrIdx = DAG.getFrameIndex(NewRetAddr, VT);
     Chain = DAG.getStore(Chain, OldRetAddr, NewRetAddrFrIdx,
-                         PseudoSourceValue::getFixedStack(), NewRetAddr);
+                         PseudoSourceValue::getFixedStack(NewRetAddr), 0);
     SDOperand NewFramePtrIdx = DAG.getFrameIndex(NewFPIdx, VT);
     Chain = DAG.getStore(Chain, OldFP, NewFramePtrIdx,
-                         PseudoSourceValue::getFixedStack(), NewFPIdx);
+                         PseudoSourceValue::getFixedStack(NewFPIdx), 0);
   }
   return Chain;
 }
@@ -3029,8 +3029,8 @@
                                 Op.getOperand(0));
   
   // STD the extended value into the stack slot.
-  MachineMemOperand MO(PseudoSourceValue::getFixedStack(),
-                       MachineMemOperand::MOStore, FrameIdx, 8, 8);
+  MachineMemOperand MO(PseudoSourceValue::getFixedStack(FrameIdx),
+                       MachineMemOperand::MOStore, 0, 8, 8);
   SDOperand Store = DAG.getNode(PPCISD::STD_32, MVT::Other,
                                 DAG.getEntryNode(), Ext64, FIdx,
                                 DAG.getMemOperand(MO));

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=53486&r1=53485&r2=53486&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Jul 11 17:44:52 2008
@@ -1134,7 +1134,7 @@
   if (Flags.isByVal())
     return FIN;
   return DAG.getLoad(VA.getValVT(), Root, FIN,
-                     PseudoSourceValue::getFixedStack(), FI);
+                     PseudoSourceValue::getFixedStack(FI), 0);
 }
 
 SDOperand
@@ -1320,8 +1320,7 @@
         SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::i64);
         SDOperand Store =
           DAG.getStore(Val.getValue(1), Val, FIN,
-                       PseudoSourceValue::getFixedStack(),
-                       RegSaveFrameIndex);
+                       PseudoSourceValue::getFixedStack(RegSaveFrameIndex), 0);
         MemOps.push_back(Store);
         FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
                           DAG.getIntPtrConstant(8));
@@ -1336,8 +1335,7 @@
         SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::v4f32);
         SDOperand Store =
           DAG.getStore(Val.getValue(1), Val, FIN,
-                       PseudoSourceValue::getFixedStack(),
-                       RegSaveFrameIndex);
+                       PseudoSourceValue::getFixedStack(RegSaveFrameIndex), 0);
         MemOps.push_back(Store);
         FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
                           DAG.getIntPtrConstant(16));
@@ -1435,7 +1433,7 @@
   MVT VT = Is64Bit ? MVT::i64 : MVT::i32;
   SDOperand NewRetAddrFrIdx = DAG.getFrameIndex(NewReturnAddrFI, VT);
   Chain = DAG.getStore(Chain, RetAddrFrIdx, NewRetAddrFrIdx, 
-                       PseudoSourceValue::getFixedStack(), NewReturnAddrFI);
+                       PseudoSourceValue::getFixedStack(NewReturnAddrFI), 0);
   return Chain;
 }
 
@@ -1652,7 +1650,7 @@
           // Store relative to framepointer.
           MemOpChains2.push_back(
             DAG.getStore(Chain, Arg, FIN,
-                         PseudoSourceValue::getFixedStack(), FI));
+                         PseudoSourceValue::getFixedStack(FI), 0));
         }            
       }
     }
@@ -4403,8 +4401,7 @@
   SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
   SDOperand Chain = DAG.getStore(DAG.getEntryNode(), Op.getOperand(0),
                                  StackSlot,
-                                 PseudoSourceValue::getFixedStack(),
-                                 SSFI);
+                                 PseudoSourceValue::getFixedStack(SSFI), 0);
 
   // Build the FILD
   SDVTList Tys;
@@ -4439,7 +4436,7 @@
     Ops.push_back(InFlag);
     Chain = DAG.getNode(X86ISD::FST, Tys, &Ops[0], Ops.size());
     Result = DAG.getLoad(Op.getValueType(), Chain, StackSlot,
-                         PseudoSourceValue::getFixedStack(), SSFI);
+                         PseudoSourceValue::getFixedStack(SSFI), 0);
   }
 
   return Result;
@@ -4479,7 +4476,7 @@
   if (isScalarFPTypeInSSEReg(Op.getOperand(0).getValueType())) {
     assert(Op.getValueType() == MVT::i64 && "Invalid FP_TO_SINT to lower!");
     Chain = DAG.getStore(Chain, Value, StackSlot,
-                         PseudoSourceValue::getFixedStack(), SSFI);
+                         PseudoSourceValue::getFixedStack(SSFI), 0);
     SDVTList Tys = DAG.getVTList(Op.getOperand(0).getValueType(), MVT::Other);
     SDOperand Ops[] = {
       Chain, StackSlot, DAG.getValueType(Op.getOperand(0).getValueType())




From gohman at apple.com  Fri Jul 11 17:48:20 2008
From: gohman at apple.com (Dan Gohman)
Date: Fri, 11 Jul 2008 22:48:20 -0000
Subject: [llvm-commits] [llvm] r53487 -
	/llvm/trunk/include/llvm/Analysis/LoopPass.h
Message-ID: <200807112248.m6BMmKnY028186@zion.cs.uiuc.edu>

Author: djg
Date: Fri Jul 11 17:48:20 2008
New Revision: 53487

URL: http://llvm.org/viewvc/llvm-project?rev=53487&view=rev
Log:
Fix typos in comments.

Modified:
    llvm/trunk/include/llvm/Analysis/LoopPass.h

Modified: llvm/trunk/include/llvm/Analysis/LoopPass.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LoopPass.h?rev=53487&r1=53486&r2=53487&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Analysis/LoopPass.h (original)
+++ llvm/trunk/include/llvm/Analysis/LoopPass.h Fri Jul 11 17:48:20 2008
@@ -32,7 +32,7 @@
   explicit LoopPass(intptr_t pid) : Pass(pid) {}
 
   // runOnLoop - This method should be implemented by the subclass to perform
-  // whatever action is necessary for the specfied Loop. 
+  // whatever action is necessary for the specified Loop.
   virtual bool runOnLoop (Loop *L, LPPassManager &LPM) = 0;
   virtual bool runOnFunctionBody (Function &F, LPPassManager &LPM) { 
     return false; 
@@ -68,10 +68,10 @@
   /// SimpleAnalysis - Provides simple interface to update analysis info
   /// maintained by various passes. Note, if required this interface can
   /// be extracted into a separate abstract class but it would require
-  /// additional use of multiple inheritance in Pass class hierarcy, someting
+  /// additional use of multiple inheritance in Pass class hierarcy, something
   /// we are trying to avoid.
 
-  /// Each loop pass can override these simple analysis hookss to update
+  /// Each loop pass can override these simple analysis hooks to update
   /// desired analysis information.
   /// cloneBasicBlockAnalysis - Clone analysis info associated with basic block.
   virtual void cloneBasicBlockAnalysis(BasicBlock *F, BasicBlock *T, Loop *L) {}
@@ -134,7 +134,7 @@
   /// SimpleAnalysis - Provides simple interface to update analysis info
   /// maintained by various passes. Note, if required this interface can
   /// be extracted into a separate abstract class but it would require
-  /// additional use of multiple inheritance in Pass class hierarcy, someting
+  /// additional use of multiple inheritance in Pass class hierarcy, something
   /// we are trying to avoid.
 
   /// cloneBasicBlockSimpleAnalysis - Invoke cloneBasicBlockAnalysis hook for




From gohman at apple.com  Fri Jul 11 17:51:32 2008
From: gohman at apple.com (Dan Gohman)
Date: Fri, 11 Jul 2008 22:51:32 -0000
Subject: [llvm-commits] [llvm] r53489 - in /llvm/trunk:
 include/llvm/Analysis/LoopPass.h include/llvm/PassManagers.h
 lib/Analysis/LoopPass.cpp
Message-ID: <200807112251.m6BMpXqA028420@zion.cs.uiuc.edu>

Author: djg
Date: Fri Jul 11 17:51:32 2008
New Revision: 53489

URL: http://llvm.org/viewvc/llvm-project?rev=53489&view=rev
Log:
Fix spelling of "hierarchy" in comments.

Modified:
    llvm/trunk/include/llvm/Analysis/LoopPass.h
    llvm/trunk/include/llvm/PassManagers.h
    llvm/trunk/lib/Analysis/LoopPass.cpp

Modified: llvm/trunk/include/llvm/Analysis/LoopPass.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LoopPass.h?rev=53489&r1=53488&r2=53489&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Analysis/LoopPass.h (original)
+++ llvm/trunk/include/llvm/Analysis/LoopPass.h Fri Jul 11 17:51:32 2008
@@ -68,7 +68,7 @@
   /// SimpleAnalysis - Provides simple interface to update analysis info
   /// maintained by various passes. Note, if required this interface can
   /// be extracted into a separate abstract class but it would require
-  /// additional use of multiple inheritance in Pass class hierarcy, something
+  /// additional use of multiple inheritance in Pass class hierarchy, something
   /// we are trying to avoid.
 
   /// Each loop pass can override these simple analysis hooks to update
@@ -134,7 +134,7 @@
   /// SimpleAnalysis - Provides simple interface to update analysis info
   /// maintained by various passes. Note, if required this interface can
   /// be extracted into a separate abstract class but it would require
-  /// additional use of multiple inheritance in Pass class hierarcy, something
+  /// additional use of multiple inheritance in Pass class hierarchy, something
   /// we are trying to avoid.
 
   /// cloneBasicBlockSimpleAnalysis - Invoke cloneBasicBlockAnalysis hook for

Modified: llvm/trunk/include/llvm/PassManagers.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassManagers.h?rev=53489&r1=53488&r2=53489&view=diff

==============================================================================
--- llvm/trunk/include/llvm/PassManagers.h (original)
+++ llvm/trunk/include/llvm/PassManagers.h Fri Jul 11 17:51:32 2008
@@ -28,8 +28,8 @@
 //
 // Pass Manager Infrastructure uses multiple pass managers.  They are
 // PassManager, FunctionPassManager, MPPassManager, FPPassManager, BBPassManager.
-// This class hierarcy uses multiple inheritance but pass managers do not derive
-// from another pass manager.
+// This class hierarchy uses multiple inheritance but pass managers do not
+// derive from another pass manager.
 //
 // PassManager and FunctionPassManager are two top-level pass manager that
 // represents the external interface of this entire pass manager infrastucture.

Modified: llvm/trunk/lib/Analysis/LoopPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LoopPass.cpp?rev=53489&r1=53488&r2=53489&view=diff

==============================================================================
--- llvm/trunk/lib/Analysis/LoopPass.cpp (original)
+++ llvm/trunk/lib/Analysis/LoopPass.cpp Fri Jul 11 17:51:32 2008
@@ -32,7 +32,7 @@
   CurrentLoop = NULL;
 }
 
-/// Delete loop from the loop queue and loop hierarcy (LoopInfo). 
+/// Delete loop from the loop queue and loop hierarchy (LoopInfo). 
 void LPPassManager::deleteLoopFromQueue(Loop *L) {
 
   if (Loop *ParentLoop = L->getParentLoop()) { // Not a top-level loop.




From isanbard at gmail.com  Fri Jul 11 17:55:01 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Fri, 11 Jul 2008 22:55:01 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r53491 -
	/llvm-gcc-4.2/branches/Apple/Gaz/gcc/llvm-convert.cpp
Message-ID: <200807112255.m6BMt1fT028671@zion.cs.uiuc.edu>

Author: void
Date: Fri Jul 11 17:55:01 2008
New Revision: 53491

URL: http://llvm.org/viewvc/llvm-project?rev=53491&view=rev
Log:
Pull 53436 into Gaz:

For MIN and MAX the type of the comparison comes
from the type of the result, not the type of the
operands.


Modified:
    llvm-gcc-4.2/branches/Apple/Gaz/gcc/llvm-convert.cpp

Modified: llvm-gcc-4.2/branches/Apple/Gaz/gcc/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/branches/Apple/Gaz/gcc/llvm-convert.cpp?rev=53491&r1=53490&r2=53491&view=diff

==============================================================================
--- llvm-gcc-4.2/branches/Apple/Gaz/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/branches/Apple/Gaz/gcc/llvm-convert.cpp Fri Jul 11 17:55:01 2008
@@ -3383,7 +3383,7 @@
   Value *Compare;
   if (LHS->getType()->isFloatingPoint())
     Compare = Builder.CreateFCmp(FCmpInst::Predicate(FPPred), LHS, RHS);
-  else if TYPE_UNSIGNED(TREE_TYPE(TREE_OPERAND(exp, 0)))
+  else if (TYPE_UNSIGNED(TREE_TYPE(exp)))
     Compare = Builder.CreateICmp(ICmpInst::Predicate(UIPred), LHS, RHS);
   else
     Compare = Builder.CreateICmp(ICmpInst::Predicate(SIPred), LHS, RHS);




From kremenek at apple.com  Fri Jul 11 18:19:01 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Fri, 11 Jul 2008 23:19:01 -0000
Subject: [llvm-commits] [llvm] r53494 - /llvm/tags/checker/checker-60/
Message-ID: <200807112319.m6BNJ150029513@zion.cs.uiuc.edu>

Author: kremenek
Date: Fri Jul 11 18:19:01 2008
New Revision: 53494

URL: http://llvm.org/viewvc/llvm-project?rev=53494&view=rev
Log:
Tagging checker-60.

Added:
    llvm/tags/checker/checker-60/
      - copied from r53493, llvm/trunk/



From resistor at mac.com  Fri Jul 11 18:49:40 2008
From: resistor at mac.com (Owen Anderson)
Date: Fri, 11 Jul 2008 23:49:40 -0000
Subject: [llvm-commits] [test-suite] r53497 - in
 /test-suite/trunk/SingleSource/Benchmarks: Himeno/ Himeno/Makefile
 Himeno/himenobmtxpa.c Makefile
Message-ID: <200807112349.m6BNnenI030438@zion.cs.uiuc.edu>

Author: resistor
Date: Fri Jul 11 18:49:40 2008
New Revision: 53497

URL: http://llvm.org/viewvc/llvm-project?rev=53497&view=rev
Log:
Add the Himeno floating point benchmark, which actually appear to do well on (1.82 GCC/LLC).

Added:
    test-suite/trunk/SingleSource/Benchmarks/Himeno/
    test-suite/trunk/SingleSource/Benchmarks/Himeno/Makefile
    test-suite/trunk/SingleSource/Benchmarks/Himeno/himenobmtxpa.c
Modified:
    test-suite/trunk/SingleSource/Benchmarks/Makefile

Added: test-suite/trunk/SingleSource/Benchmarks/Himeno/Makefile
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Benchmarks/Himeno/Makefile?rev=53497&view=auto

==============================================================================
--- test-suite/trunk/SingleSource/Benchmarks/Himeno/Makefile (added)
+++ test-suite/trunk/SingleSource/Benchmarks/Himeno/Makefile Fri Jul 11 18:49:40 2008
@@ -0,0 +1,3 @@
+LEVEL = ../../..
+
+include $(LEVEL)/SingleSource/Makefile.singlesrc

Added: test-suite/trunk/SingleSource/Benchmarks/Himeno/himenobmtxpa.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Benchmarks/Himeno/himenobmtxpa.c?rev=53497&view=auto

==============================================================================
--- test-suite/trunk/SingleSource/Benchmarks/Himeno/himenobmtxpa.c (added)
+++ test-suite/trunk/SingleSource/Benchmarks/Himeno/himenobmtxpa.c Fri Jul 11 18:49:40 2008
@@ -0,0 +1,315 @@
+/********************************************************************
+
+ This benchmark test program is measuring a cpu performance
+ of floating point operation by a Poisson equation solver.
+
+ If you have any question, please ask me via email.
+ written by Ryutaro HIMENO, November 26, 2001.
+ Version 3.0
+ ----------------------------------------------
+ Ryutaro Himeno, Dr. of Eng.
+ Head of Computer Information Division,
+ RIKEN (The Institute of Pysical and Chemical Research)
+ Email : himeno at postman.riken.go.jp
+ ---------------------------------------------------------------
+ You can adjust the size of this benchmark code to fit your target
+ computer. In that case, please chose following sets of
+ [mimax][mjmax][mkmax]:
+ small : 33,33,65
+ small : 65,65,129
+ midium: 129,129,257
+ large : 257,257,513
+ ext.large: 513,513,1025
+ This program is to measure a computer performance in MFLOPS
+ by using a kernel which appears in a linear solver of pressure
+ Poisson eq. which appears in an incompressible Navier-Stokes solver.
+ A point-Jacobi method is employed in this solver as this method can 
+ be easyly vectrized and be parallelized.
+ ------------------
+ Finite-difference method, curvilinear coodinate system
+ Vectorizable and parallelizable on each grid point
+ No. of grid points : imax x jmax x kmax including boundaries
+ ------------------
+ A,B,C:coefficient matrix, wrk1: source term of Poisson equation
+ wrk2 : working area, OMEGA : relaxation parameter
+ BND:control variable for boundaries and objects ( = 0 or 1)
+ P: pressure
+********************************************************************/
+
+#include <stdio.h>
+#include <sys/time.h>
+
+#define MR(mt,n,r,c,d)  mt->m[(n) * mt->mrows * mt->mcols * mt->mdeps + (r) * mt->mcols* mt->mdeps + (c) * mt->mdeps + (d)]
+
+struct Mat {
+  float* m;
+  int mnums;
+  int mrows;
+  int mcols;
+  int mdeps;
+};
+
+/* prototypes */
+typedef struct Mat Matrix;
+
+int newMat(Matrix* Mat, int mnums, int mrows, int mcols, int mdeps);
+void clearMat(Matrix* Mat);
+void set_param(int i[],char *size);
+void mat_set(Matrix* Mat,int l,float z);
+void mat_set_init(Matrix* Mat);
+float jacobi(int n,Matrix* M1,Matrix* M2,Matrix* M3,
+             Matrix* M4,Matrix* M5,Matrix* M6,Matrix* M7);
+double fflop(int,int,int);
+double mflops(int,double,double);
+double second();
+
+float   omega=0.8;
+Matrix  a,b,c,p,bnd,wrk1,wrk2;
+
+int
+main(int argc, char *argv[])
+{
+  int    i,j,k,nn;
+  int    imax,jmax,kmax,mimax,mjmax,mkmax,msize[3];
+  float  gosa;
+  double  cpu0,cpu1,cpu,flop;
+
+  // hardcode to S size
+  msize[0]= 64;
+  msize[1]= 64;
+  msize[2]= 128;
+  
+  mimax= msize[0];
+  mjmax= msize[1];
+  mkmax= msize[2];
+  imax= mimax-1;
+  jmax= mjmax-1;
+  kmax= mkmax-1;
+
+  printf("mimax = %d mjmax = %d mkmax = %d\n",mimax,mjmax,mkmax);
+  printf("imax = %d jmax = %d kmax =%d\n",imax,jmax,kmax);
+
+  /*
+   *    Initializing matrixes
+   */
+  newMat(&p,1,mimax,mjmax,mkmax);
+  newMat(&bnd,1,mimax,mjmax,mkmax);
+  newMat(&wrk1,1,mimax,mjmax,mkmax);
+  newMat(&wrk2,1,mimax,mjmax,mkmax);
+  newMat(&a,4,mimax,mjmax,mkmax);
+  newMat(&b,3,mimax,mjmax,mkmax);
+  newMat(&c,3,mimax,mjmax,mkmax);
+
+  mat_set_init(&p);
+  mat_set(&bnd,0,1.0);
+  mat_set(&wrk1,0,0.0);
+  mat_set(&wrk2,0,0.0);
+  mat_set(&a,0,1.0);
+  mat_set(&a,1,1.0);
+  mat_set(&a,2,1.0);
+  mat_set(&a,3,1.0/6.0);
+  mat_set(&b,0,0.0);
+  mat_set(&b,1,0.0);
+  mat_set(&b,2,0.0);
+  mat_set(&c,0,1.0);
+  mat_set(&c,1,1.0);
+  mat_set(&c,2,1.0);
+
+  /*
+   *    Start measuring
+   */
+  nn= 64;
+
+  gosa = jacobi(nn,&a,&b,&c,&p,&bnd,&wrk1,&wrk2);
+
+  printf(" Loop executed for %d times\n",nn);
+  printf(" Gosa : %e \n",gosa);
+
+  /*
+   *   Matrix free
+   */ 
+  clearMat(&p);
+  clearMat(&bnd);
+  clearMat(&wrk1);
+  clearMat(&wrk2);
+  clearMat(&a);
+  clearMat(&b);
+  clearMat(&c);
+  
+  return (0);
+}
+
+double
+fflop(int mx,int my, int mz)
+{
+  return((double)(mz-2)*(double)(my-2)*(double)(mx-2)*34.0);
+}
+
+double
+mflops(int nn,double cpu,double flop)
+{
+  return(flop/cpu*1.e-6*(double)nn);
+}
+
+void
+set_param(int is[],char *size)
+{
+  if(!strcmp(size,"XS") || !strcmp(size,"xs")){
+    is[0]= 32;
+    is[1]= 32;
+    is[2]= 64;
+    return;
+  }
+  if(!strcmp(size,"S") || !strcmp(size,"s")){
+    is[0]= 64;
+    is[1]= 64;
+    is[2]= 128;
+    return;
+  }
+  if(!strcmp(size,"M") || !strcmp(size,"m")){
+    is[0]= 128;
+    is[1]= 128;
+    is[2]= 256;
+    return;
+  }
+  if(!strcmp(size,"L") || !strcmp(size,"l")){
+    is[0]= 256;
+    is[1]= 256;
+    is[2]= 512;
+    return;
+  }
+  if(!strcmp(size,"XL") || !strcmp(size,"xl")){
+    is[0]= 512;
+    is[1]= 512;
+    is[2]= 1024;
+    return;
+  } else {
+    printf("Invalid input character !!\n");
+    exit(6);
+  }
+}
+
+int
+newMat(Matrix* Mat, int mnums,int mrows, int mcols, int mdeps)
+{
+  Mat->mnums= mnums;
+  Mat->mrows= mrows;
+  Mat->mcols= mcols;
+  Mat->mdeps= mdeps;
+  Mat->m= NULL;
+  Mat->m= (float*) 
+    malloc(mnums * mrows * mcols * mdeps * sizeof(float));
+  
+  return(Mat->m != NULL) ? 1:0;
+}
+
+void
+clearMat(Matrix* Mat)
+{
+  if(Mat->m)
+    free(Mat->m);
+  Mat->m= NULL;
+  Mat->mnums= 0;
+  Mat->mcols= 0;
+  Mat->mrows= 0;
+  Mat->mdeps= 0;
+}
+
+void
+mat_set(Matrix* Mat, int l, float val)
+{
+  int i,j,k;
+
+    for(i=0; i<Mat->mrows; i++)
+      for(j=0; j<Mat->mcols; j++)
+        for(k=0; k<Mat->mdeps; k++)
+          MR(Mat,l,i,j,k)= val;
+}
+
+void
+mat_set_init(Matrix* Mat)
+{
+  int  i,j,k,l;
+  float tt;
+
+  for(i=0; i<Mat->mrows; i++)
+    for(j=0; j<Mat->mcols; j++)
+      for(k=0; k<Mat->mdeps; k++)
+        MR(Mat,0,i,j,k)= (float)(i*i)
+          /(float)((Mat->mrows - 1)*(Mat->mrows - 1));
+}
+
+float
+jacobi(int nn, Matrix* a,Matrix* b,Matrix* c,
+       Matrix* p,Matrix* bnd,Matrix* wrk1,Matrix* wrk2)
+{
+  int    i,j,k,n,imax,jmax,kmax;
+  float  gosa,s0,ss;
+
+  imax= p->mrows-1;
+  jmax= p->mcols-1;
+  kmax= p->mdeps-1;
+
+  for(n=0 ; n<nn ; n++){
+    gosa = 0.0;
+
+    for(i=1 ; i<imax; i++)
+      for(j=1 ; j<jmax ; j++)
+        for(k=1 ; k<kmax ; k++){
+          s0= MR(a,0,i,j,k)*MR(p,0,i+1,j,  k)
+            + MR(a,1,i,j,k)*MR(p,0,i,  j+1,k)
+            + MR(a,2,i,j,k)*MR(p,0,i,  j,  k+1)
+            + MR(b,0,i,j,k)
+             *( MR(p,0,i+1,j+1,k) - MR(p,0,i+1,j-1,k)
+              - MR(p,0,i-1,j+1,k) + MR(p,0,i-1,j-1,k) )
+            + MR(b,1,i,j,k)
+             *( MR(p,0,i,j+1,k+1) - MR(p,0,i,j-1,k+1)
+              - MR(p,0,i,j+1,k-1) + MR(p,0,i,j-1,k-1) )
+            + MR(b,2,i,j,k)
+             *( MR(p,0,i+1,j,k+1) - MR(p,0,i-1,j,k+1)
+              - MR(p,0,i+1,j,k-1) + MR(p,0,i-1,j,k-1) )
+            + MR(c,0,i,j,k) * MR(p,0,i-1,j,  k)
+            + MR(c,1,i,j,k) * MR(p,0,i,  j-1,k)
+            + MR(c,2,i,j,k) * MR(p,0,i,  j,  k-1)
+            + MR(wrk1,0,i,j,k);
+
+          ss= (s0*MR(a,3,i,j,k) - MR(p,0,i,j,k))*MR(bnd,0,i,j,k);
+
+          gosa+= ss*ss;
+          MR(wrk2,0,i,j,k)= MR(p,0,i,j,k) + omega*ss;
+        }
+
+    for(i=1 ; i<imax ; i++)
+      for(j=1 ; j<jmax ; j++)
+        for(k=1 ; k<kmax ; k++)
+          MR(p,0,i,j,k)= MR(wrk2,0,i,j,k);
+    
+  } /* end n loop */
+
+  return(gosa);
+}
+
+double
+second()
+{
+
+  struct timeval tm;
+  double t ;
+
+  static int base_sec = 0,base_usec = 0;
+
+  gettimeofday(&tm, NULL);
+  
+  if(base_sec == 0 && base_usec == 0)
+    {
+      base_sec = tm.tv_sec;
+      base_usec = tm.tv_usec;
+      t = 0.0;
+  } else {
+    t = (double) (tm.tv_sec-base_sec) + 
+      ((double) (tm.tv_usec-base_usec))/1.0e6 ;
+  }
+
+  return t ;
+}
+

Modified: test-suite/trunk/SingleSource/Benchmarks/Makefile
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Benchmarks/Makefile?rev=53497&r1=53496&r2=53497&view=diff

==============================================================================
--- test-suite/trunk/SingleSource/Benchmarks/Makefile (original)
+++ test-suite/trunk/SingleSource/Benchmarks/Makefile Fri Jul 11 18:49:40 2008
@@ -1,6 +1,6 @@
 LEVEL = ../..
 PARALLEL_DIRS=Dhrystone CoyoteBench Shootout Shootout-C++ Stanford McGill \
-              Misc Misc-C++ BenchmarkGame
+              Misc Misc-C++ BenchmarkGame Himeno
 # Misc-C++-EH - someday when EH is supported in llvm-gcc we should 
 #               re-enable this test. It always fails and its very slow
 #               (100MB Bytecode) so we disable it for now.




From gohman at apple.com  Fri Jul 11 19:10:52 2008
From: gohman at apple.com (Dan Gohman)
Date: Sat, 12 Jul 2008 00:10:52 -0000
Subject: [llvm-commits] [llvm] r53498 - in /llvm/trunk:
 include/llvm/CodeGen/MachineInstr.h lib/Target/X86/X86InstrInfo.cpp
Message-ID: <200807120010.m6C0ArZ2031022@zion.cs.uiuc.edu>

Author: djg
Date: Fri Jul 11 19:10:52 2008
New Revision: 53498

URL: http://llvm.org/viewvc/llvm-project?rev=53498&view=rev
Log:
Add a utility function to MachineInstr for testing whether an instruction
has exactly one MachineMemOperand, and change some X86 lowering code to
make use of it.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineInstr.h
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=53498&r1=53497&r2=53498&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineInstr.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h Fri Jul 11 19:10:52 2008
@@ -115,6 +115,13 @@
   { return MemOperands.end(); }
   bool memoperands_empty() const { return MemOperands.empty(); }
 
+  /// hasOneMemOperand - Return true if this instruction has exactly one
+  /// MachineMemOperand.
+  bool hasOneMemOperand() const {
+    return !memoperands_empty() &&
+           next(memoperands_begin()) == memoperands_end();
+  }
+
   /// isIdenticalTo - Return true if this instruction is identical to (same
   /// opcode and same operands as) the specified instruction.
   bool isIdenticalTo(const MachineInstr *Other) const {

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=53498&r1=53497&r2=53498&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Fri Jul 11 19:10:52 2008
@@ -2030,14 +2030,10 @@
   // Check switch flag 
   if (NoFusing) return NULL;
 
+  // Determine the alignment of the load.
   unsigned Alignment = 0;
-  for (alist<MachineMemOperand>::iterator i = LoadMI->memoperands_begin(),
-       e = LoadMI->memoperands_end(); i != e; ++i) {
-    const MachineMemOperand &MRO = *i;
-    unsigned Align = MRO.getAlignment();
-    if (Align > Alignment)
-      Alignment = Align;
-  }
+  if (LoadMI->hasOneMemOperand())
+    Alignment = LoadMI->memoperands_begin()->getAlignment();
 
   // FIXME: Move alignment requirement into tables?
   if (Alignment < 16) {




From evan.cheng at apple.com  Fri Jul 11 20:37:32 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 11 Jul 2008 18:37:32 -0700
Subject: [llvm-commits] [llvm] r53476 - in /llvm/trunk:
	include/llvm/CodeGen/SelectionDAGISel.h include/llvm/Support/Timer.h
	lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
	lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
	lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Support/Timer.cpp
In-Reply-To: <200807112154.m6BLsZt6026402@zion.cs.uiuc.edu>
References: <200807112154.m6BLsZt6026402@zion.cs.uiuc.edu>
Message-ID: <6B959E25-E1BB-45E8-BB75-07924B01A811@apple.com>

Hi Dan,

It makes no sense at all, but this patch appears to cause llc to  
miscompile 179.art. Try compiling the attached bc file with and  
without the patch and you can see some differences.

This probably means a bug in the scheduler. But I haven't had a chance  
to debug it. I'll just back out this and 53480 for now. Please take a  
look.

Thanks,

Evan

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On Jul 11, 2008, at 2:54 PM, Dan Gohman wrote:

> Author: djg
> Date: Fri Jul 11 16:54:34 2008
> New Revision: 53476
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53476&view=rev
> Log:
> Add support for putting NamedRegionTimers in TimerGroups, and
> use a timer group for the timers in SelectionDAGISel. Also,
> Split scheduling out from emitting, to give each their own
> timer.
>
> Modified:
>    llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
>    llvm/trunk/include/llvm/Support/Timer.h
>    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
>    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
>    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
>    llvm/trunk/lib/Support/Timer.cpp
>
> Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=53476&r1=53475&r2=53476&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Fri Jul 11  
> 16:54:34 2008
> @@ -30,6 +30,7 @@
>   class FunctionLoweringInfo;
>   class HazardRecognizer;
>   class CollectorMetadata;
> +  class ScheduleDAG;
>
> /// SelectionDAGISel - This is the common base class used for  
> SelectionDAG-based
> /// pattern-matching instruction selectors.
> @@ -191,9 +192,9 @@
>
>   void ComputeLiveOutVRegInfo(SelectionDAG &DAG);
>
> -  /// Pick a safe ordering and emit instructions for each target  
> node in the
> +  /// Pick a safe ordering for instructions for each target node in  
> the
>   /// graph.
> -  void ScheduleAndEmitDAG(SelectionDAG &DAG);
> +  ScheduleDAG *Schedule(SelectionDAG &DAG);
>
>   /// SwitchCases - Vector of CaseBlock structures used to communicate
>   /// SwitchInst code generation information.
>
> Modified: llvm/trunk/include/llvm/Support/Timer.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/Timer.h?rev=53476&r1=53475&r2=53476&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/include/llvm/Support/Timer.h (original)
> +++ llvm/trunk/include/llvm/Support/Timer.h Fri Jul 11 16:54:34 2008
> @@ -132,6 +132,8 @@
> ///
> struct NamedRegionTimer : public TimeRegion {
>   explicit NamedRegionTimer(const std::string &Name);
> +  explicit NamedRegionTimer(const std::string &Name,
> +                            const std::string &GroupName);
> };
>
>
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp?rev=53476&r1=53475&r2=53476&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Fri Jul  
> 11 16:54:34 2008
> @@ -103,9 +103,6 @@
>   DOUT << "*** Final schedule ***\n";
>   DEBUG(dumpSchedule());
>   DOUT << "\n";
> -
> -  // Emit in scheduled order
> -  EmitSchedule();
> }
>
> // 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=53476&r1=53475&r2=53476&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp  
> (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Fri  
> Jul 11 16:54:34 2008
> @@ -208,9 +208,6 @@
>   DOUT << "*** Final schedule ***\n";
>   DEBUG(dumpSchedule());
>   DOUT << "\n";
> -
> -  // Emit in scheduled order
> -  EmitSchedule();
> }
>
> /// CommuteNodesToReducePressure - If a node is two-address and  
> commutable, and
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=53476&r1=53475&r2=53476&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp  
> (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri Jul  
> 11 16:54:34 2008
> @@ -5284,10 +5284,11 @@
> void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
>   DOUT << "Lowered selection DAG:\n";
>   DEBUG(DAG.dump());
> +  std::string GroupName = "Instruction Selection and Scheduling";
>
>   // Run the DAG combiner in pre-legalize mode.
>   if (TimePassesIsEnabled) {
> -    NamedRegionTimer T("DAG Combining 1");
> +    NamedRegionTimer T("DAG Combining 1", GroupName);
>     DAG.Combine(false, *AA);
>   } else {
>     DAG.Combine(false, *AA);
> @@ -5304,7 +5305,7 @@
>   }
>
>   if (TimePassesIsEnabled) {
> -    NamedRegionTimer T("DAG Legalization");
> +    NamedRegionTimer T("DAG Legalization", GroupName);
>     DAG.Legalize();
>   } else {
>     DAG.Legalize();
> @@ -5315,7 +5316,7 @@
>
>   // Run the DAG combiner in post-legalize mode.
>   if (TimePassesIsEnabled) {
> -    NamedRegionTimer T("DAG Combining 2");
> +    NamedRegionTimer T("DAG Combining 2", GroupName);
>     DAG.Combine(true, *AA);
>   } else {
>     DAG.Combine(true, *AA);
> @@ -5332,24 +5333,41 @@
>   // Third, instruction select all of the operations to machine  
> code, adding the
>   // code to the MachineBasicBlock.
>   if (TimePassesIsEnabled) {
> -    NamedRegionTimer T("Instruction Selection");
> +    NamedRegionTimer T("Instruction Selection", GroupName);
>     InstructionSelect(DAG);
>   } else {
>     InstructionSelect(DAG);
>   }
>
> +  // Schedule machine code.
> +  ScheduleDAG *Scheduler;
> +  if (TimePassesIsEnabled) {
> +    NamedRegionTimer T("Instruction Scheduling", GroupName);
> +    Scheduler = Schedule(DAG);
> +  } else {
> +    Scheduler = Schedule(DAG);
> +  }
> +
>   // Emit machine code to BB.  This can change 'BB' to the last  
> block being
>   // inserted into.
>   if (TimePassesIsEnabled) {
> -    NamedRegionTimer T("Instruction Scheduling");
> -    ScheduleAndEmitDAG(DAG);
> +    NamedRegionTimer T("Instruction Creation", GroupName);
> +    Scheduler->EmitSchedule();
> +  } else {
> +    Scheduler->EmitSchedule();
> +  }
> +
> +  // Free the scheduler state.
> +  if (TimePassesIsEnabled) {
> +    NamedRegionTimer T("Instruction Scheduling Cleanup", GroupName);
> +    delete Scheduler;
>   } else {
> -    ScheduleAndEmitDAG(DAG);
> +    delete Scheduler;
>   }
>
>   // Perform target specific isel post processing.
>   if (TimePassesIsEnabled) {
> -    NamedRegionTimer T("Instruction Selection Post Processing");
> +    NamedRegionTimer T("Instruction Selection Post Processing",  
> GroupName);
>     InstructionSelectPostProcessing(DAG);
>   } else {
>     InstructionSelectPostProcessing(DAG);
> @@ -5597,10 +5615,10 @@
> }
>
>
> -// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> -/// ScheduleAndEmitDAG - Pick a safe ordering and emit instructions  
> for each
> +/// Schedule - Pick a safe ordering for instructions for each
> /// target node in the graph.
> -void SelectionDAGISel::ScheduleAndEmitDAG(SelectionDAG &DAG) {
> +///
> +ScheduleDAG *SelectionDAGISel::Schedule(SelectionDAG &DAG) {
>   if (ViewSchedDAGs) DAG.viewGraph();
>
>   RegisterScheduler::FunctionPassCtor Ctor =  
> RegisterScheduler::getDefault();
> @@ -5610,12 +5628,11 @@
>     RegisterScheduler::setDefault(Ctor);
>   }
>
> -  ScheduleDAG *SL = Ctor(this, &DAG, BB, FastISel);
> -  BB = SL->Run();
> -
> -  if (ViewSUnitDAGs) SL->viewGraph();
> +  ScheduleDAG *Scheduler = Ctor(this, &DAG, BB, FastISel);
> +  BB = Scheduler->Run();
>
> -  delete SL;
> +  if (ViewSUnitDAGs) Scheduler->viewGraph();
> +  return Scheduler;
> }
>
>
>
> Modified: llvm/trunk/lib/Support/Timer.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Timer.cpp?rev=53476&r1=53475&r2=53476&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Support/Timer.cpp (original)
> +++ llvm/trunk/lib/Support/Timer.cpp Fri Jul 11 16:54:34 2008
> @@ -182,19 +182,51 @@
> //   NamedRegionTimer Implementation
> // 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
>
> -static ManagedStatic<std::map<std::string, Timer> > NamedTimers;
> +namespace {
> +
> +typedef std::map<std::string, Timer> Name2Timer;
> +typedef std::map<std::string, std::pair<TimerGroup, Name2Timer> >  
> Name2Pair;
> +
> +}
> +
> +static ManagedStatic<Name2Timer> NamedTimers;
> +
> +static ManagedStatic<Name2Pair> NamedGroupedTimers;
>
> static Timer &getNamedRegionTimer(const std::string &Name) {
> -  std::map<std::string, Timer>::iterator I = NamedTimers->find(Name);
> +  Name2Timer::iterator I = NamedTimers->find(Name);
>   if (I != NamedTimers->end())
>     return I->second;
>
>   return NamedTimers->insert(I, std::make_pair(Name, Timer(Name)))- 
> >second;
> }
>
> +static Timer &getNamedRegionTimer(const std::string &Name,
> +                                  const std::string &GroupName) {
> +
> +  Name2Pair::iterator I = NamedGroupedTimers->find(GroupName);
> +  if (I == NamedGroupedTimers->end()) {
> +    TimerGroup TG(GroupName);
> +    std::pair<TimerGroup, Name2Timer> Pair(TG, Name2Timer());
> +    I = NamedGroupedTimers->insert(I, std::make_pair(GroupName,  
> Pair));
> +  }
> +
> +  Name2Timer::iterator J = I->second.second.find(Name);
> +  if (J == I->second.second.end())
> +    J = I->second.second.insert(J,
> +                                std::make_pair(Name,
> +                                               Timer(Name,
> +                                                     I- 
> >second.first)));
> +
> +  return J->second;
> +}
> +
> NamedRegionTimer::NamedRegionTimer(const std::string &Name)
>   : TimeRegion(getNamedRegionTimer(Name)) {}
>
> +NamedRegionTimer::NamedRegionTimer(const std::string &Name,
> +                                   const std::string &GroupName)
> +  : TimeRegion(getNamedRegionTimer(Name, GroupName)) {}
>
> // 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> //   TimerGroup Implementation
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits


From evan.cheng at apple.com  Fri Jul 11 20:38:51 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Sat, 12 Jul 2008 01:38:51 -0000
Subject: [llvm-commits] [llvm] r53502 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAGISel.h include/llvm/Support/Timer.h
 lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
 lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
 lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Support/Timer.cpp
Message-ID: <200807120138.m6C1cpma001227@zion.cs.uiuc.edu>

Author: evancheng
Date: Fri Jul 11 20:38:51 2008
New Revision: 53502

URL: http://llvm.org/viewvc/llvm-project?rev=53502&view=rev
Log:
Back out 53476 and 53480 for now. Somehow they cause llc to miscompile 179.art.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
    llvm/trunk/include/llvm/Support/Timer.h
    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    llvm/trunk/lib/Support/Timer.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=53502&r1=53501&r2=53502&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Fri Jul 11 20:38:51 2008
@@ -30,7 +30,6 @@
   class FunctionLoweringInfo;
   class HazardRecognizer;
   class CollectorMetadata;
-  class ScheduleDAG;
  
 /// SelectionDAGISel - This is the common base class used for SelectionDAG-based
 /// pattern-matching instruction selectors.
@@ -192,9 +191,9 @@
   
   void ComputeLiveOutVRegInfo(SelectionDAG &DAG);
 
-  /// Pick a safe ordering for instructions for each target node in the
+  /// Pick a safe ordering and emit instructions for each target node in the
   /// graph.
-  ScheduleDAG *Schedule(SelectionDAG &DAG);
+  void ScheduleAndEmitDAG(SelectionDAG &DAG);
 
   /// SwitchCases - Vector of CaseBlock structures used to communicate
   /// SwitchInst code generation information.

Modified: llvm/trunk/include/llvm/Support/Timer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/Timer.h?rev=53502&r1=53501&r2=53502&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Support/Timer.h (original)
+++ llvm/trunk/include/llvm/Support/Timer.h Fri Jul 11 20:38:51 2008
@@ -132,8 +132,6 @@
 ///
 struct NamedRegionTimer : public TimeRegion {
   explicit NamedRegionTimer(const std::string &Name);
-  explicit NamedRegionTimer(const std::string &Name,
-                            const std::string &GroupName);
 };
 
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=53502&r1=53501&r2=53502&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Fri Jul 11 20:38:51 2008
@@ -1135,11 +1135,6 @@
 ///
 MachineBasicBlock *ScheduleDAG::Run() {
   Schedule();
-  
-  DOUT << "*** Final schedule ***\n";
-  DEBUG(dumpSchedule());
-  DOUT << "\n";
-
   return BB;
 }
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp?rev=53502&r1=53501&r2=53502&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Fri Jul 11 20:38:51 2008
@@ -99,6 +99,13 @@
   ListScheduleTopDown();
   
   AvailableQueue->releaseState();
+  
+  DOUT << "*** Final schedule ***\n";
+  DEBUG(dumpSchedule());
+  DOUT << "\n";
+  
+  // Emit in scheduled order
+  EmitSchedule();
 }
 
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=53502&r1=53501&r2=53502&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Fri Jul 11 20:38:51 2008
@@ -204,6 +204,13 @@
 
   if (!Fast)
     CommuteNodesToReducePressure();
+  
+  DOUT << "*** Final schedule ***\n";
+  DEBUG(dumpSchedule());
+  DOUT << "\n";
+  
+  // Emit in scheduled order
+  EmitSchedule();
 }
 
 /// CommuteNodesToReducePressure - If a node is two-address and commutable, and

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=53502&r1=53501&r2=53502&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri Jul 11 20:38:51 2008
@@ -5284,11 +5284,10 @@
 void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
   DOUT << "Lowered selection DAG:\n";
   DEBUG(DAG.dump());
-  std::string GroupName = "Instruction Selection and Scheduling";
 
   // Run the DAG combiner in pre-legalize mode.
   if (TimePassesIsEnabled) {
-    NamedRegionTimer T("DAG Combining 1", GroupName);
+    NamedRegionTimer T("DAG Combining 1");
     DAG.Combine(false, *AA);
   } else {
     DAG.Combine(false, *AA);
@@ -5305,7 +5304,7 @@
   }
   
   if (TimePassesIsEnabled) {
-    NamedRegionTimer T("DAG Legalization", GroupName);
+    NamedRegionTimer T("DAG Legalization");
     DAG.Legalize();
   } else {
     DAG.Legalize();
@@ -5316,7 +5315,7 @@
   
   // Run the DAG combiner in post-legalize mode.
   if (TimePassesIsEnabled) {
-    NamedRegionTimer T("DAG Combining 2", GroupName);
+    NamedRegionTimer T("DAG Combining 2");
     DAG.Combine(true, *AA);
   } else {
     DAG.Combine(true, *AA);
@@ -5333,41 +5332,24 @@
   // Third, instruction select all of the operations to machine code, adding the
   // code to the MachineBasicBlock.
   if (TimePassesIsEnabled) {
-    NamedRegionTimer T("Instruction Selection", GroupName);
+    NamedRegionTimer T("Instruction Selection");
     InstructionSelect(DAG);
   } else {
     InstructionSelect(DAG);
   }
 
-  // Schedule machine code.
-  ScheduleDAG *Scheduler;
-  if (TimePassesIsEnabled) {
-    NamedRegionTimer T("Instruction Scheduling", GroupName);
-    Scheduler = Schedule(DAG);
-  } else {
-    Scheduler = Schedule(DAG);
-  }
-
   // Emit machine code to BB.  This can change 'BB' to the last block being 
   // inserted into.
   if (TimePassesIsEnabled) {
-    NamedRegionTimer T("Instruction Creation", GroupName);
-    Scheduler->EmitSchedule();
-  } else {
-    Scheduler->EmitSchedule();
-  }
-
-  // Free the scheduler state.
-  if (TimePassesIsEnabled) {
-    NamedRegionTimer T("Instruction Scheduling Cleanup", GroupName);
-    delete Scheduler;
+    NamedRegionTimer T("Instruction Scheduling");
+    ScheduleAndEmitDAG(DAG);
   } else {
-    delete Scheduler;
+    ScheduleAndEmitDAG(DAG);
   }
 
   // Perform target specific isel post processing.
   if (TimePassesIsEnabled) {
-    NamedRegionTimer T("Instruction Selection Post Processing", GroupName);
+    NamedRegionTimer T("Instruction Selection Post Processing");
     InstructionSelectPostProcessing(DAG);
   } else {
     InstructionSelectPostProcessing(DAG);
@@ -5615,10 +5597,10 @@
 }
 
 
-/// Schedule - Pick a safe ordering for instructions for each
+//===----------------------------------------------------------------------===//
+/// ScheduleAndEmitDAG - Pick a safe ordering and emit instructions for each
 /// target node in the graph.
-///
-ScheduleDAG *SelectionDAGISel::Schedule(SelectionDAG &DAG) {
+void SelectionDAGISel::ScheduleAndEmitDAG(SelectionDAG &DAG) {
   if (ViewSchedDAGs) DAG.viewGraph();
 
   RegisterScheduler::FunctionPassCtor Ctor = RegisterScheduler::getDefault();
@@ -5628,11 +5610,12 @@
     RegisterScheduler::setDefault(Ctor);
   }
   
-  ScheduleDAG *Scheduler = Ctor(this, &DAG, BB, FastISel);
-  BB = Scheduler->Run();
+  ScheduleDAG *SL = Ctor(this, &DAG, BB, FastISel);
+  BB = SL->Run();
+
+  if (ViewSUnitDAGs) SL->viewGraph();
 
-  if (ViewSUnitDAGs) Scheduler->viewGraph();
-  return Scheduler;
+  delete SL;
 }
 
 

Modified: llvm/trunk/lib/Support/Timer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Timer.cpp?rev=53502&r1=53501&r2=53502&view=diff

==============================================================================
--- llvm/trunk/lib/Support/Timer.cpp (original)
+++ llvm/trunk/lib/Support/Timer.cpp Fri Jul 11 20:38:51 2008
@@ -182,51 +182,19 @@
 //   NamedRegionTimer Implementation
 //===----------------------------------------------------------------------===//
 
-namespace {
-
-typedef std::map<std::string, Timer> Name2Timer;
-typedef std::map<std::string, std::pair<TimerGroup, Name2Timer> > Name2Pair;
-
-}
-
-static ManagedStatic<Name2Timer> NamedTimers;
-
-static ManagedStatic<Name2Pair> NamedGroupedTimers;
+static ManagedStatic<std::map<std::string, Timer> > NamedTimers;
 
 static Timer &getNamedRegionTimer(const std::string &Name) {
-  Name2Timer::iterator I = NamedTimers->find(Name);
+  std::map<std::string, Timer>::iterator I = NamedTimers->find(Name);
   if (I != NamedTimers->end())
     return I->second;
 
   return NamedTimers->insert(I, std::make_pair(Name, Timer(Name)))->second;
 }
 
-static Timer &getNamedRegionTimer(const std::string &Name,
-                                  const std::string &GroupName) {
-
-  Name2Pair::iterator I = NamedGroupedTimers->find(GroupName);
-  if (I == NamedGroupedTimers->end()) {
-    TimerGroup TG(GroupName);
-    std::pair<TimerGroup, Name2Timer> Pair(TG, Name2Timer());
-    I = NamedGroupedTimers->insert(I, std::make_pair(GroupName, Pair));
-  }
-
-  Name2Timer::iterator J = I->second.second.find(Name);
-  if (J == I->second.second.end())
-    J = I->second.second.insert(J,
-                                std::make_pair(Name,
-                                               Timer(Name,
-                                                     I->second.first)));
-
-  return J->second;
-}
-
 NamedRegionTimer::NamedRegionTimer(const std::string &Name)
   : TimeRegion(getNamedRegionTimer(Name)) {}
 
-NamedRegionTimer::NamedRegionTimer(const std::string &Name,
-                                   const std::string &GroupName)
-  : TimeRegion(getNamedRegionTimer(Name, GroupName)) {}
 
 //===----------------------------------------------------------------------===//
 //   TimerGroup Implementation




From evan.cheng at apple.com  Fri Jul 11 20:56:02 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Sat, 12 Jul 2008 01:56:02 -0000
Subject: [llvm-commits] [llvm] r53503 - in /llvm/trunk:
 lib/CodeGen/LiveIntervalAnalysis.cpp
 test/CodeGen/X86/2008-07-11-SpillerBug.ll
Message-ID: <200807120156.m6C1u3Pd001753@zion.cs.uiuc.edu>

Author: evancheng
Date: Fri Jul 11 20:56:02 2008
New Revision: 53503

URL: http://llvm.org/viewvc/llvm-project?rev=53503&view=rev
Log:
Fix PR2536: a nasty spiller bug. If a two-address instruction uses a register but the use portion of its live range is not part of its liveinterval, it must be defined by an implicit_def. In that case, do not spill the use. e.g.
8   %reg1024<def> = IMPLICIT_DEF
12  %reg1024<def> = INSERT_SUBREG %reg1024<kill>, %reg1025, 2

The live range [12, 14) are not part of the r1024 live interval since it's defined by an implicit def. It will not conflicts with live interval of r1025. Now suppose both registers are spilled, you can easily see a situation where both registers are reloaded before the INSERT_SUBREG and both target registers that would overlap.

Added:
    llvm/trunk/test/CodeGen/X86/2008-07-11-SpillerBug.ll
Modified:
    llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp

Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=53503&r1=53502&r2=53503&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Fri Jul 11 20:56:02 2008
@@ -1047,6 +1047,18 @@
       }
     }
 
+    if (HasUse && !li.liveAt(getUseIndex(index)))
+      // Must be defined by an implicit def. It should not be spilled. Note,
+      // this is for correctness reason. e.g.
+      // 8   %reg1024<def> = IMPLICIT_DEF
+      // 12  %reg1024<def> = INSERT_SUBREG %reg1024<kill>, %reg1025, 2
+      // The live range [12, 14) are not part of the r1024 live interval since
+      // it's defined by an implicit def. It will not conflicts with live
+      // interval of r1025. Now suppose both registers are spilled, you can
+      // easier see a situation where both registers are reloaded before
+      // the INSERT_SUBREG and both target registers that would overlap.
+      HasUse = false;
+
     // Update stack slot spill weight if we are splitting.
     float Weight = getSpillWeight(HasDef, HasUse, loopDepth);
       if (!TrySplit)
@@ -1228,6 +1240,17 @@
     unsigned index = getInstructionIndex(MI);
     if (index < start || index >= end)
       continue;
+    if (O.isUse() && !li.liveAt(getUseIndex(index)))
+      // Must be defined by an implicit def. It should not be spilled. Note,
+      // this is for correctness reason. e.g.
+      // 8   %reg1024<def> = IMPLICIT_DEF
+      // 12  %reg1024<def> = INSERT_SUBREG %reg1024<kill>, %reg1025, 2
+      // The live range [12, 14) are not part of the r1024 live interval since
+      // it's defined by an implicit def. It will not conflicts with live
+      // interval of r1025. Now suppose both registers are spilled, you can
+      // easier see a situation where both registers are reloaded before
+      // the INSERT_SUBREG and both target registers that would overlap.
+      continue;
     RewriteMIs.push_back(RewriteInfo(index, MI, O.isUse(), O.isDef()));
   }
   std::sort(RewriteMIs.begin(), RewriteMIs.end(), RewriteInfoCompare());

Added: llvm/trunk/test/CodeGen/X86/2008-07-11-SpillerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-07-11-SpillerBug.ll?rev=53503&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-07-11-SpillerBug.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2008-07-11-SpillerBug.ll Fri Jul 11 20:56:02 2008
@@ -0,0 +1,49 @@
+; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static |\
+; RUN:   %prcontext 65534 1 | grep movl | count 1
+; PR2536
+
+ at g_5 = external global i16		; <i16*> [#uses=2]
+ at g_107 = external global i16		; <i16*> [#uses=1]
+ at g_229 = external global i32		; <i32*> [#uses=1]
+ at g_227 = external global i16		; <i16*> [#uses=1]
+
+define i32 @func_54(i32 %p_55, i16 zeroext  %p_56) nounwind  {
+entry:
+	load i16* @g_5, align 2		; <i16>:0 [#uses=1]
+	zext i16 %0 to i32		; <i32>:1 [#uses=1]
+	%.mask = and i32 %1, 65534		; <i32> [#uses=1]
+	icmp eq i32 %.mask, 0		; <i1>:2 [#uses=1]
+	load i32* @g_229, align 4		; <i32>:3 [#uses=1]
+	load i16* @g_227, align 2		; <i16>:4 [#uses=1]
+	icmp eq i16 %4, 0		; <i1>:5 [#uses=1]
+	load i16* @g_5, align 2		; <i16>:6 [#uses=1]
+	br label %bb
+
+bb:		; preds = %bb7.preheader, %entry
+	%indvar4 = phi i32 [ 0, %entry ], [ %indvar.next5, %bb7.preheader ]		; <i32> [#uses=1]
+	%p_56_addr.1.reg2mem.0 = phi i16 [ %p_56, %entry ], [ %p_56_addr.0, %bb7.preheader ]		; <i16> [#uses=2]
+	br i1 %2, label %bb7.preheader, label %bb5
+
+bb5:		; preds = %bb
+	store i16 %6, i16* @g_107, align 2
+	br label %bb7.preheader
+
+bb7.preheader:		; preds = %bb5, %bb
+	icmp eq i16 %p_56_addr.1.reg2mem.0, 0		; <i1>:7 [#uses=1]
+	%.0 = select i1 %7, i32 1, i32 0		; <i32> [#uses=1]
+	urem i32 1, %.0		; <i32>:8 [#uses=1]
+	icmp eq i32 %8, 0		; <i1>:9 [#uses=1]
+	%.not = xor i1 %9, true		; <i1> [#uses=1]
+	%.not1 = xor i1 %5, true		; <i1> [#uses=1]
+	%brmerge = or i1 %.not, %.not1		; <i1> [#uses=1]
+	%iftmp.6.0 = select i1 %brmerge, i32 1, i32 0		; <i32> [#uses=1]
+	mul i32 %iftmp.6.0, %3		; <i32>:10 [#uses=1]
+	icmp eq i32 %10, 0		; <i1>:11 [#uses=1]
+	%p_56_addr.0 = select i1 %11, i16 %p_56_addr.1.reg2mem.0, i16 1		; <i16> [#uses=1]
+	%indvar.next5 = add i32 %indvar4, 1		; <i32> [#uses=2]
+	%exitcond6 = icmp eq i32 %indvar.next5, 17		; <i1> [#uses=1]
+	br i1 %exitcond6, label %bb25, label %bb
+
+bb25:		; preds = %bb7.preheader
+	ret i32 1
+}




From evan.cheng at apple.com  Fri Jul 11 21:22:07 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Sat, 12 Jul 2008 02:22:07 -0000
Subject: [llvm-commits] [llvm] r53504 -
	/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
Message-ID: <200807120222.m6C2M7wT002737@zion.cs.uiuc.edu>

Author: evancheng
Date: Fri Jul 11 21:22:07 2008
New Revision: 53504

URL: http://llvm.org/viewvc/llvm-project?rev=53504&view=rev
Log:
Typos.

Modified:
    llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp

Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=53504&r1=53503&r2=53504&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Fri Jul 11 21:22:07 2008
@@ -1055,7 +1055,7 @@
       // The live range [12, 14) are not part of the r1024 live interval since
       // it's defined by an implicit def. It will not conflicts with live
       // interval of r1025. Now suppose both registers are spilled, you can
-      // easier see a situation where both registers are reloaded before
+      // easily see a situation where both registers are reloaded before
       // the INSERT_SUBREG and both target registers that would overlap.
       HasUse = false;
 
@@ -1248,7 +1248,7 @@
       // The live range [12, 14) are not part of the r1024 live interval since
       // it's defined by an implicit def. It will not conflicts with live
       // interval of r1025. Now suppose both registers are spilled, you can
-      // easier see a situation where both registers are reloaded before
+      // easily see a situation where both registers are reloaded before
       // the INSERT_SUBREG and both target registers that would overlap.
       continue;
     RewriteMIs.push_back(RewriteInfo(index, MI, O.isUse(), O.isDef()));




From evan.cheng at apple.com  Fri Jul 11 21:23:19 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Sat, 12 Jul 2008 02:23:19 -0000
Subject: [llvm-commits] [llvm] r53505 - in /llvm/trunk/lib/Target/PowerPC:
 PPCISelLowering.cpp PPCISelLowering.h PPCInstr64Bit.td PPCInstrInfo.td
Message-ID: <200807120223.m6C2NJaY002783@zion.cs.uiuc.edu>

Author: evancheng
Date: Fri Jul 11 21:23:19 2008
New Revision: 53505

URL: http://llvm.org/viewvc/llvm-project?rev=53505&view=rev
Log:
Implement llvm.atomic.cmp.swap.i32 on PPC. Patch by Gary Benson!

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h
    llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
    llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=53505&r1=53504&r2=53505&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Fri Jul 11 21:23:19 2008
@@ -40,8 +40,7 @@
                                      cl::Hidden);
 
 PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
-  : TargetLowering(TM), PPCSubTarget(*TM.getSubtargetImpl()),
-    PPCAtomicLabelIndex(0) {
+  : TargetLowering(TM), PPCSubTarget(*TM.getSubtargetImpl()) {
     
   setPow2DivIsCheap();
   
@@ -378,45 +377,47 @@
 const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const {
   switch (Opcode) {
   default: return 0;
-  case PPCISD::FSEL:          return "PPCISD::FSEL";
-  case PPCISD::FCFID:         return "PPCISD::FCFID";
-  case PPCISD::FCTIDZ:        return "PPCISD::FCTIDZ";
-  case PPCISD::FCTIWZ:        return "PPCISD::FCTIWZ";
-  case PPCISD::STFIWX:        return "PPCISD::STFIWX";
-  case PPCISD::VMADDFP:       return "PPCISD::VMADDFP";
-  case PPCISD::VNMSUBFP:      return "PPCISD::VNMSUBFP";
-  case PPCISD::VPERM:         return "PPCISD::VPERM";
-  case PPCISD::Hi:            return "PPCISD::Hi";
-  case PPCISD::Lo:            return "PPCISD::Lo";
-  case PPCISD::DYNALLOC:      return "PPCISD::DYNALLOC";
-  case PPCISD::GlobalBaseReg: return "PPCISD::GlobalBaseReg";
-  case PPCISD::SRL:           return "PPCISD::SRL";
-  case PPCISD::SRA:           return "PPCISD::SRA";
-  case PPCISD::SHL:           return "PPCISD::SHL";
-  case PPCISD::EXTSW_32:      return "PPCISD::EXTSW_32";
-  case PPCISD::STD_32:        return "PPCISD::STD_32";
-  case PPCISD::CALL_ELF:      return "PPCISD::CALL_ELF";
-  case PPCISD::CALL_Macho:    return "PPCISD::CALL_Macho";
-  case PPCISD::MTCTR:         return "PPCISD::MTCTR";
-  case PPCISD::BCTRL_Macho:   return "PPCISD::BCTRL_Macho";
-  case PPCISD::BCTRL_ELF:     return "PPCISD::BCTRL_ELF";
-  case PPCISD::RET_FLAG:      return "PPCISD::RET_FLAG";
-  case PPCISD::MFCR:          return "PPCISD::MFCR";
-  case PPCISD::VCMP:          return "PPCISD::VCMP";
-  case PPCISD::VCMPo:         return "PPCISD::VCMPo";
-  case PPCISD::LBRX:          return "PPCISD::LBRX";
-  case PPCISD::STBRX:         return "PPCISD::STBRX";
-  case PPCISD::LARX:          return "PPCISD::LARX";
-  case PPCISD::STCX:          return "PPCISD::STCX";
-  case PPCISD::CMP_UNRESERVE: return "PPCISD::CMP_UNRESERVE";
-  case PPCISD::COND_BRANCH:   return "PPCISD::COND_BRANCH";
-  case PPCISD::MFFS:          return "PPCISD::MFFS";
-  case PPCISD::MTFSB0:        return "PPCISD::MTFSB0";
-  case PPCISD::MTFSB1:        return "PPCISD::MTFSB1";
-  case PPCISD::FADDRTZ:       return "PPCISD::FADDRTZ";
-  case PPCISD::MTFSF:         return "PPCISD::MTFSF";
-  case PPCISD::TAILCALL:      return "PPCISD::TAILCALL";
-  case PPCISD::TC_RETURN:     return "PPCISD::TC_RETURN";
+  case PPCISD::FSEL:            return "PPCISD::FSEL";
+  case PPCISD::FCFID:           return "PPCISD::FCFID";
+  case PPCISD::FCTIDZ:          return "PPCISD::FCTIDZ";
+  case PPCISD::FCTIWZ:          return "PPCISD::FCTIWZ";
+  case PPCISD::STFIWX:          return "PPCISD::STFIWX";
+  case PPCISD::VMADDFP:         return "PPCISD::VMADDFP";
+  case PPCISD::VNMSUBFP:        return "PPCISD::VNMSUBFP";
+  case PPCISD::VPERM:           return "PPCISD::VPERM";
+  case PPCISD::Hi:              return "PPCISD::Hi";
+  case PPCISD::Lo:              return "PPCISD::Lo";
+  case PPCISD::DYNALLOC:        return "PPCISD::DYNALLOC";
+  case PPCISD::GlobalBaseReg:   return "PPCISD::GlobalBaseReg";
+  case PPCISD::SRL:             return "PPCISD::SRL";
+  case PPCISD::SRA:             return "PPCISD::SRA";
+  case PPCISD::SHL:             return "PPCISD::SHL";
+  case PPCISD::EXTSW_32:        return "PPCISD::EXTSW_32";
+  case PPCISD::STD_32:          return "PPCISD::STD_32";
+  case PPCISD::CALL_ELF:        return "PPCISD::CALL_ELF";
+  case PPCISD::CALL_Macho:      return "PPCISD::CALL_Macho";
+  case PPCISD::MTCTR:           return "PPCISD::MTCTR";
+  case PPCISD::BCTRL_Macho:     return "PPCISD::BCTRL_Macho";
+  case PPCISD::BCTRL_ELF:       return "PPCISD::BCTRL_ELF";
+  case PPCISD::RET_FLAG:        return "PPCISD::RET_FLAG";
+  case PPCISD::MFCR:            return "PPCISD::MFCR";
+  case PPCISD::VCMP:            return "PPCISD::VCMP";
+  case PPCISD::VCMPo:           return "PPCISD::VCMPo";
+  case PPCISD::LBRX:            return "PPCISD::LBRX";
+  case PPCISD::STBRX:           return "PPCISD::STBRX";
+  case PPCISD::ATOMIC_LOAD_ADD: return "PPCISD::ATOMIC_LOAD_ADD";
+  case PPCISD::ATOMIC_CMP_SWAP: return "PPCISD::ATOMIC_CMP_SWAP";
+  case PPCISD::ATOMIC_SWAP:     return "PPCISD::ATOMIC_SWAP";
+  case PPCISD::LARX:            return "PPCISD::LARX";
+  case PPCISD::STCX:            return "PPCISD::STCX";
+  case PPCISD::COND_BRANCH:     return "PPCISD::COND_BRANCH";
+  case PPCISD::MFFS:            return "PPCISD::MFFS";
+  case PPCISD::MTFSB0:          return "PPCISD::MTFSB0";
+  case PPCISD::MTFSB1:          return "PPCISD::MTFSB1";
+  case PPCISD::FADDRTZ:         return "PPCISD::FADDRTZ";
+  case PPCISD::MTFSF:           return "PPCISD::MTFSF";
+  case PPCISD::TAILCALL:        return "PPCISD::TAILCALL";
+  case PPCISD::TC_RETURN:       return "PPCISD::TC_RETURN";
   }
 }
 
@@ -2726,33 +2727,13 @@
   SDOperand Ptr     = Op.getOperand(1);
   SDOperand Incr    = Op.getOperand(2);
 
-  // Issue a "load and reserve".
-  std::vector<MVT> VTs;
-  VTs.push_back(VT);
-  VTs.push_back(MVT::Other);
-
-  SDOperand Label  = DAG.getConstant(PPCAtomicLabelIndex++, MVT::i32);
+  SDVTList VTs = DAG.getVTList(VT, MVT::Other);
   SDOperand Ops[] = {
-    Chain,               // Chain
-    Ptr,                 // Ptr
-    Label,               // Label
+    Chain,
+    Ptr,
+    Incr,
   };
-  SDOperand Load = DAG.getNode(PPCISD::LARX, VTs, Ops, 3);
-  Chain = Load.getValue(1);
-
-  // Compute new value.
-  SDOperand NewVal  = DAG.getNode(ISD::ADD, VT, Load, Incr);
-
-  // Issue a "store and check".
-  SDOperand Ops2[] = {
-    Chain,               // Chain
-    NewVal,              // Value
-    Ptr,                 // Ptr
-    Label,               // Label
-  };
-  SDOperand Store = DAG.getNode(PPCISD::STCX, MVT::Other, Ops2, 4);
-  SDOperand OutOps[] = { Load, Store };
-  return DAG.getMergeValues(OutOps, 2);
+  return DAG.getNode(PPCISD::ATOMIC_LOAD_ADD, VTs, Ops, 3);
 }
 
 SDOperand PPCTargetLowering::LowerAtomicCMP_SWAP(SDOperand Op, SelectionDAG &DAG) {
@@ -2762,39 +2743,14 @@
   SDOperand NewVal  = Op.getOperand(2);
   SDOperand OldVal  = Op.getOperand(3);
 
-  // Issue a "load and reserve".
-  std::vector<MVT> VTs;
-  VTs.push_back(VT);
-  VTs.push_back(MVT::Other);
-
-  SDOperand Label  = DAG.getConstant(PPCAtomicLabelIndex++, MVT::i32);
+  SDVTList VTs = DAG.getVTList(VT, MVT::Other);
   SDOperand Ops[] = {
-    Chain,               // Chain
-    Ptr,                 // Ptr
-    Label,               // Label
-  };
-  SDOperand Load = DAG.getNode(PPCISD::LARX, VTs, Ops, 3);
-  Chain = Load.getValue(1);
-
-  // Compare and unreserve if not equal.
-  SDOperand Ops2[] = {
-    Chain,               // Chain
-    OldVal,              // Old value
-    Load,                // Value in memory
-    Label,               // Label
+    Chain,
+    Ptr,
+    OldVal,
+    NewVal,
   };
-  Chain = DAG.getNode(PPCISD::CMP_UNRESERVE, MVT::Other, Ops2, 4);
-
-  // Issue a "store and check".
-  SDOperand Ops3[] = {
-    Chain,               // Chain
-    NewVal,              // Value
-    Ptr,                 // Ptr
-    Label,               // Label
-  };
-  SDOperand Store = DAG.getNode(PPCISD::STCX, MVT::Other, Ops3, 4);
-  SDOperand OutOps[] = { Load, Store };
-  return DAG.getMergeValues(OutOps, 2);
+  return DAG.getNode(PPCISD::ATOMIC_CMP_SWAP, VTs, Ops, 4);
 }
 
 SDOperand PPCTargetLowering::LowerAtomicSWAP(SDOperand Op, SelectionDAG &DAG) {
@@ -2803,30 +2759,13 @@
   SDOperand Ptr     = Op.getOperand(1);
   SDOperand NewVal  = Op.getOperand(2);
 
-  // Issue a "load and reserve".
-  std::vector<MVT> VTs;
-  VTs.push_back(VT);
-  VTs.push_back(MVT::Other);
-
-  SDOperand Label  = DAG.getConstant(PPCAtomicLabelIndex++, MVT::i32);
+  SDVTList VTs = DAG.getVTList(VT, MVT::Other);
   SDOperand Ops[] = {
-    Chain,               // Chain
-    Ptr,                 // Ptr
-    Label,               // Label
-  };
-  SDOperand Load = DAG.getNode(PPCISD::LARX, VTs, Ops, 3);
-  Chain = Load.getValue(1);
-
-  // Issue a "store and check".
-  SDOperand Ops2[] = {
-    Chain,               // Chain
-    NewVal,              // Value
-    Ptr,                 // Ptr
-    Label,               // Label
+    Chain,
+    Ptr,
+    NewVal,
   };
-  SDOperand Store = DAG.getNode(PPCISD::STCX, MVT::Other, Ops2, 4);
-  SDOperand OutOps[] = { Load, Store };
-  return DAG.getMergeValues(OutOps, 2);
+  return DAG.getNode(PPCISD::ATOMIC_SWAP, VTs, Ops, 3);
 }
 
 /// LowerSELECT_CC - Lower floating point select_cc's into fsel instruction when
@@ -3981,58 +3920,197 @@
 PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
                                                MachineBasicBlock *BB) {
   const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
-  assert((MI->getOpcode() == PPC::SELECT_CC_I4 ||
-          MI->getOpcode() == PPC::SELECT_CC_I8 ||
-          MI->getOpcode() == PPC::SELECT_CC_F4 ||
-          MI->getOpcode() == PPC::SELECT_CC_F8 ||
-          MI->getOpcode() == PPC::SELECT_CC_VRRC) &&
-         "Unexpected instr type to insert");
-  
-  // To "insert" a SELECT_CC instruction, we actually have to insert the diamond
-  // control-flow pattern.  The incoming instruction knows the destination vreg
-  // to set, the condition code register to branch on, the true/false values to
-  // select between, and a branch opcode to use.
+
+  // To "insert" these instructions we actually have to insert their
+  // control-flow patterns.
   const BasicBlock *LLVM_BB = BB->getBasicBlock();
   MachineFunction::iterator It = BB;
   ++It;
-  
-  //  thisMBB:
-  //  ...
-  //   TrueVal = ...
-  //   cmpTY ccX, r1, r2
-  //   bCC copy1MBB
-  //   fallthrough --> copy0MBB
-  MachineBasicBlock *thisMBB = BB;
+
   MachineFunction *F = BB->getParent();
-  MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB);
-  MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);
-  unsigned SelectPred = MI->getOperand(4).getImm();
-  BuildMI(BB, TII->get(PPC::BCC))
-    .addImm(SelectPred).addReg(MI->getOperand(1).getReg()).addMBB(sinkMBB);
-  F->insert(It, copy0MBB);
-  F->insert(It, sinkMBB);
-  // Update machine-CFG edges by transferring all successors of the current
-  // block to the new block which will contain the Phi node for the select.
-  sinkMBB->transferSuccessors(BB);
-  // Next, add the true and fallthrough blocks as its successors.
-  BB->addSuccessor(copy0MBB);
-  BB->addSuccessor(sinkMBB);
-  
-  //  copy0MBB:
-  //   %FalseValue = ...
-  //   # fallthrough to sinkMBB
-  BB = copy0MBB;
-  
-  // Update machine-CFG edges
-  BB->addSuccessor(sinkMBB);
-  
-  //  sinkMBB:
-  //   %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ]
-  //  ...
-  BB = sinkMBB;
-  BuildMI(BB, TII->get(PPC::PHI), MI->getOperand(0).getReg())
-    .addReg(MI->getOperand(3).getReg()).addMBB(copy0MBB)
-    .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB);
+
+  if (MI->getOpcode() == PPC::SELECT_CC_I4 ||
+      MI->getOpcode() == PPC::SELECT_CC_I8 ||
+      MI->getOpcode() == PPC::SELECT_CC_F4 ||
+      MI->getOpcode() == PPC::SELECT_CC_F8 ||
+      MI->getOpcode() == PPC::SELECT_CC_VRRC) {
+
+    // The incoming instruction knows the destination vreg to set, the
+    // condition code register to branch on, the true/false values to
+    // select between, and a branch opcode to use.
+
+    //  thisMBB:
+    //  ...
+    //   TrueVal = ...
+    //   cmpTY ccX, r1, r2
+    //   bCC copy1MBB
+    //   fallthrough --> copy0MBB
+    MachineBasicBlock *thisMBB = BB;
+    MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB);
+    MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);
+    unsigned SelectPred = MI->getOperand(4).getImm();
+    BuildMI(BB, TII->get(PPC::BCC))
+      .addImm(SelectPred).addReg(MI->getOperand(1).getReg()).addMBB(sinkMBB);
+    F->insert(It, copy0MBB);
+    F->insert(It, sinkMBB);
+    // Update machine-CFG edges by transferring all successors of the current
+    // block to the new block which will contain the Phi node for the select.
+    sinkMBB->transferSuccessors(BB);
+    // Next, add the true and fallthrough blocks as its successors.
+    BB->addSuccessor(copy0MBB);
+    BB->addSuccessor(sinkMBB);
+    
+    //  copy0MBB:
+    //   %FalseValue = ...
+    //   # fallthrough to sinkMBB
+    BB = copy0MBB;
+    
+    // Update machine-CFG edges
+    BB->addSuccessor(sinkMBB);
+    
+    //  sinkMBB:
+    //   %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ]
+    //  ...
+    BB = sinkMBB;
+    BuildMI(BB, TII->get(PPC::PHI), MI->getOperand(0).getReg())
+      .addReg(MI->getOperand(3).getReg()).addMBB(copy0MBB)
+      .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB);
+  }
+  else if (MI->getOpcode() == PPC::ATOMIC_LOAD_ADD_I32 ||
+           MI->getOpcode() == PPC::ATOMIC_LOAD_ADD_I64) {
+    bool is64bit = MI->getOpcode() == PPC::ATOMIC_LOAD_ADD_I64;
+
+    unsigned dest = MI->getOperand(0).getReg();
+    unsigned ptrA = MI->getOperand(1).getReg();
+    unsigned ptrB = MI->getOperand(2).getReg();
+    unsigned incr = MI->getOperand(3).getReg();
+
+    MachineBasicBlock *loopMBB = F->CreateMachineBasicBlock(LLVM_BB);
+    MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB);
+    F->insert(It, loopMBB);
+    F->insert(It, exitMBB);
+    exitMBB->transferSuccessors(BB);
+
+    MachineRegisterInfo &RegInfo = F->getRegInfo();
+    unsigned TmpReg = RegInfo.createVirtualRegister(
+      is64bit ? (const TargetRegisterClass *) &PPC::GPRCRegClass :
+                (const TargetRegisterClass *) &PPC::G8RCRegClass);
+
+    //  thisMBB:
+    //   ...
+    //   fallthrough --> loopMBB
+    BB->addSuccessor(loopMBB);
+
+    //  loopMBB:
+    //   l[wd]arx dest, ptr
+    //   add r0, dest, incr
+    //   st[wd]cx. r0, ptr
+    //   bne- loopMBB
+    //   fallthrough --> exitMBB
+    BB = loopMBB;
+    BuildMI(BB, TII->get(is64bit ? PPC::LDARX : PPC::LWARX), dest)
+      .addReg(ptrA).addReg(ptrB);
+    BuildMI(BB, TII->get(is64bit ? PPC::ADD4 : PPC::ADD8), TmpReg)
+      .addReg(incr).addReg(dest);
+    BuildMI(BB, TII->get(is64bit ? PPC::STDCX : PPC::STWCX))
+      .addReg(TmpReg).addReg(ptrA).addReg(ptrB);
+    BuildMI(BB, TII->get(PPC::BCC))
+      .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loopMBB);    
+    BB->addSuccessor(loopMBB);
+    BB->addSuccessor(exitMBB);
+    
+    //  exitMBB:
+    //   ...
+    BB = exitMBB;
+  }
+  else if (MI->getOpcode() == PPC::ATOMIC_CMP_SWAP_I32 ||
+           MI->getOpcode() == PPC::ATOMIC_CMP_SWAP_I64) {
+    bool is64bit = MI->getOpcode() == PPC::ATOMIC_CMP_SWAP_I64;
+
+    unsigned dest   = MI->getOperand(0).getReg();
+    unsigned ptrA   = MI->getOperand(1).getReg();
+    unsigned ptrB   = MI->getOperand(2).getReg();
+    unsigned oldval = MI->getOperand(3).getReg();
+    unsigned newval = MI->getOperand(4).getReg();
+
+    MachineBasicBlock *loopMBB = F->CreateMachineBasicBlock(LLVM_BB);
+    MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB);
+    F->insert(It, loopMBB);
+    F->insert(It, exitMBB);
+    exitMBB->transferSuccessors(BB);
+
+    //  thisMBB:
+    //   ...
+    //   fallthrough --> loopMBB
+    BB->addSuccessor(loopMBB);
+
+    //  loopMBB:
+    //   l[wd]arx dest, ptr
+    //   cmp[wd] dest, oldval
+    //   bne- exitMBB
+    //   st[wd]cx. newval, ptr
+    //   bne- loopMBB
+    //   fallthrough --> exitMBB
+    BB = loopMBB;
+    BuildMI(BB, TII->get(is64bit ? PPC::LDARX : PPC::LWARX), dest)
+      .addReg(ptrA).addReg(ptrB);
+    BuildMI(BB, TII->get(is64bit ? PPC::CMPD : PPC::CMPW), PPC::CR0)
+      .addReg(oldval).addReg(dest);
+    BuildMI(BB, TII->get(PPC::BCC))
+      .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(exitMBB);
+    BuildMI(BB, TII->get(is64bit ? PPC::STDCX : PPC::STWCX))
+      .addReg(newval).addReg(ptrA).addReg(ptrB);
+    BuildMI(BB, TII->get(PPC::BCC))
+      .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loopMBB);    
+    BB->addSuccessor(loopMBB);
+    BB->addSuccessor(exitMBB);
+    
+    //  exitMBB:
+    //   ...
+    BB = exitMBB;
+  }
+  else if (MI->getOpcode() == PPC::ATOMIC_SWAP_I32 ||
+           MI->getOpcode() == PPC::ATOMIC_SWAP_I64) {
+    bool is64bit = MI->getOpcode() == PPC::ATOMIC_SWAP_I64;
+
+    unsigned dest   = MI->getOperand(0).getReg();
+    unsigned ptrA   = MI->getOperand(1).getReg();
+    unsigned ptrB   = MI->getOperand(2).getReg();
+    unsigned newval = MI->getOperand(3).getReg();
+
+    MachineBasicBlock *loopMBB = F->CreateMachineBasicBlock(LLVM_BB);
+    MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB);
+    F->insert(It, loopMBB);
+    F->insert(It, exitMBB);
+    exitMBB->transferSuccessors(BB);
+
+    //  thisMBB:
+    //   ...
+    //   fallthrough --> loopMBB
+    BB->addSuccessor(loopMBB);
+
+    //  loopMBB:
+    //   l[wd]arx dest, ptr
+    //   st[wd]cx. newval, ptr
+    //   bne- loopMBB
+    //   fallthrough --> exitMBB
+    BB = loopMBB;
+    BuildMI(BB, TII->get(is64bit ? PPC::LDARX : PPC::LWARX), dest)
+      .addReg(ptrA).addReg(ptrB);
+    BuildMI(BB, TII->get(is64bit ? PPC::STDCX : PPC::STWCX))
+      .addReg(newval).addReg(ptrA).addReg(ptrB);
+    BuildMI(BB, TII->get(PPC::BCC))
+      .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loopMBB);    
+    BB->addSuccessor(loopMBB);
+    BB->addSuccessor(exitMBB);
+    
+    //  exitMBB:
+    //   ...
+    BB = exitMBB;
+  }
+  else {
+    assert(0 && "Unexpected instr type to insert");
+  }
 
   F->DeleteMachineInstr(MI);   // The pseudo instruction is gone now.
   return BB;

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h?rev=53505&r1=53504&r2=53505&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h Fri Jul 11 21:23:19 2008
@@ -152,6 +152,11 @@
       /// MTFSF = F8RC, INFLAG - This moves the register into the FPSCR.
       MTFSF,
 
+      /// ATOMIC_LOAD_ADD, ATOMIC_CMP_SWAP, ATOMIC_SWAP - These
+      /// correspond to the llvm.atomic.load.add, llvm.atomic.cmp.swap
+      /// and llvm.atomic.swap intrinsics.
+      ATOMIC_LOAD_ADD, ATOMIC_CMP_SWAP, ATOMIC_SWAP,
+
       /// LARX = This corresponds to PPC l{w|d}arx instrcution: load and
       /// reserve indexed. This is used to implement atomic operations.
       LARX,
@@ -160,10 +165,6 @@
       /// indexed. This is used to implement atomic operations.
       STCX,
 
-      /// CMP_UNRESERVE = Test for equality and "unreserve" if not true. This
-      /// is used to implement atomic operations.
-      CMP_UNRESERVE,
-
       /// TAILCALL - Indicates a tail call should be taken.
       TAILCALL,
       /// TC_RETURN - A tail call return.
@@ -325,10 +326,6 @@
                                                    SelectionDAG &DAG) const;
 
   private:
-    /// PPCAtomicLabelIndex - Keep track the number of PPC atomic labels.
-    ///
-    unsigned PPCAtomicLabelIndex;
-
     SDOperand getFramePointerFrameIndex(SelectionDAG & DAG) const;
     SDOperand getReturnAddrFrameIndex(SelectionDAG & DAG) const;
 

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=53505&r1=53504&r2=53505&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Fri Jul 11 21:23:19 2008
@@ -116,24 +116,35 @@
 def : Pat<(PPCcall_ELF (i64 texternalsym:$dst)),
           (BL8_ELF texternalsym:$dst)>;
 
-// Atomic operations.
-def LDARX : Pseudo<(outs G8RC:$rD), (ins memrr:$ptr, i32imm:$label),
-                   "\nLa${label}_entry:\n\tldarx $rD, $ptr",
-                   [(set G8RC:$rD, (PPClarx xoaddr:$ptr, imm:$label))]>;
-
-let Defs = [CR0] in {
-def STDCX : Pseudo<(outs), (ins G8RC:$rS, memrr:$dst, i32imm:$label),
-                  "stdcx. $rS, $dst\n\tbne- La${label}_entry\nLa${label}_exit:",
-                   [(PPCstcx G8RC:$rS, xoaddr:$dst, imm:$label)]>;
-
-def CMP_UNRESd : Pseudo<(outs), (ins G8RC:$rA, G8RC:$rB, i32imm:$label),
-                         "cmpd $rA, $rB\n\tbne- La${label}_exit",
-                         [(PPCcmp_unres G8RC:$rA, G8RC:$rB, imm:$label)]>;
-def CMP_UNRESdi : Pseudo<(outs), (ins G8RC:$rA, s16imm64:$imm, i32imm:$label),
-                         "cmpdi $rA, $imm\n\tbne- La${label}_exit",
-                         [(PPCcmp_unres G8RC:$rA, immSExt16:$imm, imm:$label)]>;
+// Atomic operations
+let usesCustomDAGSchedInserter = 1 in {
+  let Uses = [CR0] in {
+    def ATOMIC_LOAD_ADD_I64 : Pseudo<
+      (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$incr),
+      "${:comment} ATOMIC_LOAD_ADD_I64 PSEUDO!",
+      [(set G8RC:$dst, (PPCatomic_load_add xoaddr:$ptr, G8RC:$incr))]>;
+    def ATOMIC_CMP_SWAP_I64 : Pseudo<
+      (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$old, G8RC:$new),
+      "${:comment} ATOMIC_CMP_SWAP_I64 PSEUDO!",
+      [(set G8RC:$dst, (PPCatomic_cmp_swap xoaddr:$ptr, G8RC:$old, G8RC:$new))]>;
+    def ATOMIC_SWAP_I64 : Pseudo<
+      (outs G8RC:$dst), (ins memrr:$ptr, G8RC:$new),
+      "${:comment} ATOMIC_SWAP_I64 PSEUDO!",
+      [(set G8RC:$dst, (PPCatomic_swap xoaddr:$ptr, G8RC:$new))]>;
+  }
 }
 
+// Instructions to support atomic operations
+def LDARX : XForm_1<31,  84, (outs G8RC:$rD), (ins memrr:$ptr),
+                   "ldarx $rD, $ptr", LdStLDARX,
+                   [(set G8RC:$rD, (PPClarx xoaddr:$ptr))]>;
+
+let Defs = [CR0] in
+def STDCX : XForm_1<31, 214, (outs), (ins G8RC:$rS, memrr:$dst),
+                   "stdcx. $rS, $dst", LdStSTDCX,
+                   [(PPCstcx G8RC:$rS, xoaddr:$dst)]>,
+                   isDOT;
+
 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in
 def TCRETURNdi8 :Pseudo< (outs),
                         (ins calltarget:$dst, i32imm:$offset, variable_ops),

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=53505&r1=53504&r2=53505&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Fri Jul 11 21:23:19 2008
@@ -42,15 +42,21 @@
   SDTCisVT<0, i32>, SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT>
 ]>;
 
-
-def SDT_PPClarx : SDTypeProfile<1, 2, [
-  SDTCisInt<0>, SDTCisPtrTy<1>, SDTCisVT<2, i32>
+def SDT_PPCatomic_load_add : SDTypeProfile<1, 2, [
+  SDTCisInt<0>, SDTCisPtrTy<1>, SDTCisInt<2>
+]>;
+def SDT_PPCatomic_cmp_swap : SDTypeProfile<1, 3, [
+  SDTCisInt<0>, SDTCisPtrTy<1>, SDTCisInt<2>, SDTCisInt<3>
+]>;
+def SDT_PPCatomic_swap : SDTypeProfile<1, 2, [
+  SDTCisInt<0>, SDTCisPtrTy<1>, SDTCisInt<2>
 ]>;
-def SDT_PPCstcx : SDTypeProfile<0, 3, [
-  SDTCisInt<0>, SDTCisPtrTy<1>, SDTCisVT<2, i32>
+
+def SDT_PPClarx : SDTypeProfile<1, 1, [
+  SDTCisInt<0>, SDTCisPtrTy<1>
 ]>;
-def SDT_PPCcmp_unres : SDTypeProfile<0, 3, [
-  SDTCisSameAs<0, 1>, SDTCisInt<1>, SDTCisVT<2, i32>
+def SDT_PPCstcx : SDTypeProfile<0, 2, [
+  SDTCisInt<0>, SDTCisPtrTy<1>
 ]>;
 
 def SDT_PPCTC_ret : SDTypeProfile<0, 2, [
@@ -143,12 +149,22 @@
 def PPCstbrx      : SDNode<"PPCISD::STBRX", SDT_PPCstbrx,
                            [SDNPHasChain, SDNPMayStore]>;
 
+// Atomic operations
+def PPCatomic_load_add : SDNode<"PPCISD::ATOMIC_LOAD_ADD",
+                                SDT_PPCatomic_load_add,
+                                [SDNPHasChain, SDNPMayLoad, SDNPMayStore]>;
+def PPCatomic_cmp_swap : SDNode<"PPCISD::ATOMIC_CMP_SWAP",
+                                SDT_PPCatomic_cmp_swap,
+                                [SDNPHasChain, SDNPMayLoad, SDNPMayStore]>;
+def PPCatomic_swap : SDNode<"PPCISD::ATOMIC_SWAP",
+                            SDT_PPCatomic_swap,
+                            [SDNPHasChain, SDNPMayLoad, SDNPMayStore]>;
+
+// Instructions to support atomic operations
 def PPClarx      : SDNode<"PPCISD::LARX", SDT_PPClarx,
                           [SDNPHasChain, SDNPMayLoad]>;
 def PPCstcx      : SDNode<"PPCISD::STCX", SDT_PPCstcx,
                           [SDNPHasChain, SDNPMayStore]>;
-def PPCcmp_unres  : SDNode<"PPCISD::CMP_UNRESERVE", SDT_PPCcmp_unres,
-                           [SDNPHasChain]>;
 
 // Instructions to support dynamic alloca.
 def SDTDynOp  : SDTypeProfile<1, 2, []>;
@@ -530,24 +546,35 @@
                       "dcbzl $dst", LdStDCBF, [(int_ppc_dcbzl xoaddr:$dst)]>,
                       PPC970_DGroup_Single;
 
-// Atomic operations.
-def LWARX : XForm_1<31,  20, (outs GPRC:$rD), (ins memrr:$ptr, i32imm:$label),
-                   "\nLa${label}_entry:\n\tlwarx $rD, $ptr", LdStLWARX,
-                   [(set GPRC:$rD, (PPClarx xoaddr:$ptr, imm:$label))]>;
-
-let Defs = [CR0] in {
-def STWCX : Pseudo<(outs), (ins GPRC:$rS, memrr:$dst, i32imm:$label),
-                  "stwcx. $rS, $dst\n\tbne- La${label}_entry\nLa${label}_exit:",
-                   [(PPCstcx GPRC:$rS, xoaddr:$dst, imm:$label)]>;
-
-def CMP_UNRESw : Pseudo<(outs), (ins GPRC:$rA, GPRC:$rB, i32imm:$label),
-                         "cmpw $rA, $rB\n\tbne- La${label}_exit",
-                         [(PPCcmp_unres GPRC:$rA, GPRC:$rB, imm:$label)]>;
-def CMP_UNRESwi : Pseudo<(outs), (ins GPRC:$rA, s16imm:$imm, i32imm:$label),
-                         "cmpwi $rA, $imm\n\tbne- La${label}_exit",
-                         [(PPCcmp_unres GPRC:$rA, immSExt16:$imm, imm:$label)]>;
+// Atomic operations
+let usesCustomDAGSchedInserter = 1 in {
+  let Uses = [CR0] in {
+    def ATOMIC_LOAD_ADD_I32 : Pseudo<
+      (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr),
+      "${:comment} ATOMIC_LOAD_ADD_I32 PSEUDO!",
+      [(set GPRC:$dst, (PPCatomic_load_add xoaddr:$ptr, GPRC:$incr))]>;
+    def ATOMIC_CMP_SWAP_I32 : Pseudo<
+      (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$old, GPRC:$new),
+      "${:comment} ATOMIC_CMP_SWAP_I32 PSEUDO!",
+      [(set GPRC:$dst, (PPCatomic_cmp_swap xoaddr:$ptr, GPRC:$old, GPRC:$new))]>;
+    def ATOMIC_SWAP_I32 : Pseudo<
+      (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$new),
+      "${:comment} ATOMIC_SWAP_I32 PSEUDO!",
+      [(set GPRC:$dst, (PPCatomic_swap xoaddr:$ptr, GPRC:$new))]>;
+  }
 }
 
+// Instructions to support atomic operations
+def LWARX : XForm_1<31,  20, (outs GPRC:$rD), (ins memrr:$src),
+                   "lwarx $rD, $src", LdStLWARX,
+                   [(set GPRC:$rD, (PPClarx xoaddr:$src))]>;
+
+let Defs = [CR0] in
+def STWCX : XForm_1<31, 150, (outs), (ins GPRC:$rS, memrr:$dst),
+                   "stwcx. $rS, $dst", LdStSTWCX,
+                   [(PPCstcx GPRC:$rS, xoaddr:$dst)]>,
+                   isDOT;
+
 //===----------------------------------------------------------------------===//
 // PPC32 Load Instructions.
 //
@@ -1327,9 +1354,5 @@
 def : Pat<(extloadf32 xaddr:$src),
           (FMRSD (LFSX xaddr:$src))>;
 
-// Atomic operations
-def : Pat<(PPCcmp_unres immSExt16:$imm, GPRC:$rA, imm:$label),
-          (CMP_UNRESwi GPRC:$rA, immSExt16:$imm, imm:$label)>;
-
 include "PPCInstrAltivec.td"
 include "PPCInstr64Bit.td"




From nicholas at mxc.ca  Fri Jul 11 23:00:08 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Fri, 11 Jul 2008 21:00:08 -0700
Subject: [llvm-commits] [llvm] r53452 -
	/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
In-Reply-To: <200807110951.40781.baldrick@free.fr>
References: <200807110736.m6B7aJvO021908@zion.cs.uiuc.edu>
	<200807110951.40781.baldrick@free.fr>
Message-ID: <48782C48.4000705@mxc.ca>

Duncan Sands wrote:
> Hi Nick,
> 
>> +            // a * Cst icmp eq/ne b * Cst --> a & Mask icmp b & Mask
> 
> try a=4, b=0 and Cst=3 with i8 arithmetic.

Duncan and I met on IRC to discuss this one, and we agreed that the 
transform is correct. The mask calculation is about figuring out how 
many times the top bits would be lost due to overflow (which is zero, 
for any Cst where the low bit is one).

Cst=3 causes Mask = -1 which is a non-mask, hence it becomes a * 3 icmp 
b * 3 --> a icmp b, which is correct.

Nick




From nicholas at mxc.ca  Sat Jul 12 00:04:39 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Sat, 12 Jul 2008 05:04:39 -0000
Subject: [llvm-commits] [llvm] r53506 - in /llvm/trunk:
 lib/Transforms/Scalar/InstructionCombining.cpp
 test/Transforms/InstCombine/2008-07-11-RemAnd.ll
Message-ID: <200807120504.m6C54dfs007531@zion.cs.uiuc.edu>

Author: nicholas
Date: Sat Jul 12 00:04:38 2008
New Revision: 53506

URL: http://llvm.org/viewvc/llvm-project?rev=53506&view=rev
Log:
Enhance analysis of srem.

Remove dead code analyzing urem. 'urem' of power-of-2 is canonicalized to an
'and' instruction.

Added:
    llvm/trunk/test/Transforms/InstCombine/2008-07-11-RemAnd.ll
Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53506&r1=53505&r2=53506&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Sat Jul 12 00:04:38 2008
@@ -1254,6 +1254,9 @@
     if (ConstantInt *Rem = dyn_cast<ConstantInt>(I->getOperand(1))) {
       APInt RA = Rem->getValue();
       if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
+        if (DemandedMask.ule(RA))    // srem won't affect demanded bits
+          return UpdateValueUsesWith(I, I->getOperand(0));
+
         APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
         APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
         if (SimplifyDemandedBits(I->getOperand(0), Mask2,
@@ -1273,21 +1276,6 @@
     }
     break;
   case Instruction::URem: {
-    if (ConstantInt *Rem = dyn_cast<ConstantInt>(I->getOperand(1))) {
-      APInt RA = Rem->getValue();
-      if (RA.isPowerOf2()) {
-        APInt LowBits = (RA - 1);
-        APInt Mask2 = LowBits & DemandedMask;
-        KnownZero |= ~LowBits & DemandedMask;
-        if (SimplifyDemandedBits(I->getOperand(0), Mask2,
-                                 KnownZero, KnownOne, Depth+1))
-          return true;
-
-        assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 
-        break;
-      }
-    }
-
     APInt KnownZero2(BitWidth, 0), KnownOne2(BitWidth, 0);
     APInt AllOnes = APInt::getAllOnesValue(BitWidth);
     if (SimplifyDemandedBits(I->getOperand(0), AllOnes,

Added: llvm/trunk/test/Transforms/InstCombine/2008-07-11-RemAnd.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-07-11-RemAnd.ll?rev=53506&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2008-07-11-RemAnd.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/2008-07-11-RemAnd.ll Sat Jul 12 00:04:38 2008
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep rem
+; PR2330
+
+define i32 @a(i32 %b) nounwind  {
+entry:
+	srem i32 %b, 8		; <i32>:0 [#uses=1]
+	and i32 %0, 1		; <i32>:1 [#uses=1]
+	ret i32 %1
+}




From nicholas at mxc.ca  Sat Jul 12 02:00:53 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Sat, 12 Jul 2008 07:00:53 -0000
Subject: [llvm-commits] [llvm] r53507 - /llvm/trunk/include/llvm/ADT/ilist.h
Message-ID: <200807120700.m6C70rlP010701@zion.cs.uiuc.edu>

Author: nicholas
Date: Sat Jul 12 02:00:52 2008
New Revision: 53507

URL: http://llvm.org/viewvc/llvm-project?rev=53507&view=rev
Log:
operator[] is not defined for list::iterator. Overload it in ilist::iterator
to prevent silly things from happening accidentally. PR2171

Modified:
    llvm/trunk/include/llvm/ADT/ilist.h

Modified: llvm/trunk/include/llvm/ADT/ilist.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ilist.h?rev=53507&r1=53506&r2=53507&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/ilist.h (original)
+++ llvm/trunk/include/llvm/ADT/ilist.h Sat Jul 12 02:00:52 2008
@@ -93,6 +93,10 @@
   typedef typename super::reference reference;
 private:
   pointer NodePtr;
+
+  // operator[] is not defined. Compile error instead of having a runtime bug.
+  void operator[](unsigned) {}
+  void operator[](unsigned) const {}
 public:
 
   ilist_iterator(pointer NP) : NodePtr(NP) {}




From nicholas at mxc.ca  Sat Jul 12 02:41:32 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Sat, 12 Jul 2008 07:41:32 -0000
Subject: [llvm-commits] [llvm] r53508 - in /llvm/trunk:
 lib/Analysis/ScalarEvolution.cpp
 test/Analysis/ScalarEvolution/2007-08-06-Unsigned.ll
 test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect1.ll
 test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect2.ll
Message-ID: <200807120741.m6C7fWYG015242@zion.cs.uiuc.edu>

Author: nicholas
Date: Sat Jul 12 02:41:32 2008
New Revision: 53508

URL: http://llvm.org/viewvc/llvm-project?rev=53508&view=rev
Log:
Stop creating extraneous smax/umax in SCEV. This removes a regression where we
started complicating many loops ('for' loops, in fact).

Added:
    llvm/trunk/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect1.ll
    llvm/trunk/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect2.ll
Modified:
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp
    llvm/trunk/test/Analysis/ScalarEvolution/2007-08-06-Unsigned.ll

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=53508&r1=53507&r2=53508&view=diff

==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Sat Jul 12 02:41:32 2008
@@ -1431,6 +1431,10 @@
     SCEVHandle HowManyLessThans(SCEV *LHS, SCEV *RHS, const Loop *L,
                                 bool isSigned);
 
+    /// executesAtLeastOnce - Test whether entry to the loop is protected by
+    /// a conditional between LHS and RHS.
+    bool executesAtLeastOnce(const Loop *L, bool isSigned, SCEV *LHS, SCEV *RHS);
+
     /// getConstantEvolutionLoopExitValue - If we know that the specified Phi is
     /// in the header of its containing loop, we know the loop executes a
     /// constant number of times, and the PHI node is just a recurrence
@@ -2612,6 +2616,70 @@
   return UnknownValue;
 }
 
+/// executesAtLeastOnce - Test whether entry to the loop is protected by
+/// a conditional between LHS and RHS.
+bool ScalarEvolutionsImpl::executesAtLeastOnce(const Loop *L, bool isSigned,
+                                               SCEV *LHS, SCEV *RHS) {
+  BasicBlock *Preheader = L->getLoopPreheader();
+  BasicBlock *PreheaderDest = L->getHeader();
+  if (Preheader == 0) return false;
+
+  BranchInst *LoopEntryPredicate =
+    dyn_cast<BranchInst>(Preheader->getTerminator());
+  if (!LoopEntryPredicate) return false;
+
+  // This might be a critical edge broken out.  If the loop preheader ends in
+  // an unconditional branch to the loop, check to see if the preheader has a
+  // single predecessor, and if so, look for its terminator.
+  while (LoopEntryPredicate->isUnconditional()) {
+    PreheaderDest = Preheader;
+    Preheader = Preheader->getSinglePredecessor();
+    if (!Preheader) return false;  // Multiple preds.
+    
+    LoopEntryPredicate =
+      dyn_cast<BranchInst>(Preheader->getTerminator());
+    if (!LoopEntryPredicate) return false;
+  }
+
+  ICmpInst *ICI = dyn_cast<ICmpInst>(LoopEntryPredicate->getCondition());
+  if (!ICI) return false;
+
+  // Now that we found a conditional branch that dominates the loop, check to
+  // see if it is the comparison we are looking for.
+  Value *PreCondLHS = ICI->getOperand(0);
+  Value *PreCondRHS = ICI->getOperand(1);
+  ICmpInst::Predicate Cond;
+  if (LoopEntryPredicate->getSuccessor(0) == PreheaderDest)
+    Cond = ICI->getPredicate();
+  else
+    Cond = ICI->getInversePredicate();
+
+  switch (Cond) {
+  case ICmpInst::ICMP_UGT:
+    if (isSigned) return false;
+    std::swap(PreCondLHS, PreCondRHS);
+    Cond = ICmpInst::ICMP_ULT;
+    break;
+  case ICmpInst::ICMP_SGT:
+    if (!isSigned) return false;
+    std::swap(PreCondLHS, PreCondRHS);
+    Cond = ICmpInst::ICMP_SLT;
+    break;
+  case ICmpInst::ICMP_ULT:
+    if (isSigned) return false;
+    break;
+  case ICmpInst::ICMP_SLT:
+    if (!isSigned) return false;
+    break;
+  default:
+    return false;
+  }
+
+  if (!PreCondLHS->getType()->isInteger()) return false;
+
+  return LHS == getSCEV(PreCondLHS) && RHS == getSCEV(PreCondRHS);
+}
+
 /// HowManyLessThans - Return the number of times a backedge containing the
 /// specified less-than comparison will execute.  If not computable, return
 /// UnknownValue.
@@ -2640,12 +2708,17 @@
 
     // Then, we get the value of the LHS in the first iteration in which the
     // above condition doesn't hold.  This equals to max(m,n).
-    SCEVHandle End = isSigned ? SE.getSMaxExpr(RHS, Start)
-                              : SE.getUMaxExpr(RHS, Start);
-
-    // Finally, we subtract these two values to get the number of times the
-    // backedge is executed: max(m,n)-n.
-    return SE.getMinusSCEV(End, Start);
+    if (executesAtLeastOnce(L, isSigned,
+                            SE.getMinusSCEV(AddRec->getOperand(0), One), RHS))
+      return SE.getMinusSCEV(RHS, Start);
+    else {
+      SCEVHandle End = isSigned ? SE.getSMaxExpr(RHS, Start)
+                                : SE.getUMaxExpr(RHS, Start);
+
+      // Finally, we subtract these two values to get the number of times the
+      // backedge is executed: max(m,n)-n.
+      return SE.getMinusSCEV(End, Start);
+    }
   }
 
   return UnknownValue;

Modified: llvm/trunk/test/Analysis/ScalarEvolution/2007-08-06-Unsigned.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/ScalarEvolution/2007-08-06-Unsigned.ll?rev=53508&r1=53507&r2=53508&view=diff

==============================================================================
--- llvm/trunk/test/Analysis/ScalarEvolution/2007-08-06-Unsigned.ll (original)
+++ llvm/trunk/test/Analysis/ScalarEvolution/2007-08-06-Unsigned.ll Sat Jul 12 02:41:32 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -scalar-evolution -analyze | grep {Loop bb: ( -1 + ( -1 \\*  %x) + (( 1 +  %x) umax  %y)) iterations!}
+; RUN: llvm-as < %s | opt -scalar-evolution -analyze | grep {Loop bb: ( -1 + ( -1 \\*  %x) +  %y) iterations!}
 ; PR1597
 
 define i32 @f(i32 %x, i32 %y) {

Added: llvm/trunk/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect1.ll?rev=53508&view=auto

==============================================================================
--- llvm/trunk/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect1.ll (added)
+++ llvm/trunk/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect1.ll Sat Jul 12 02:41:32 2008
@@ -0,0 +1,36 @@
+; RUN: llvm-as < %s | opt -analyze -scalar-evolution |& not grep smax
+; PR2261
+
+ at lut = common global [256 x i8] zeroinitializer, align 32		; <[256 x i8]*> [#uses=1]
+
+define void @foo(i32 %count, i32* %srcptr, i32* %dstptr) nounwind  {
+entry:
+	icmp sgt i32 %count, 0		; <i1>:0 [#uses=1]
+	br i1 %0, label %bb.nph, label %return
+
+bb.nph:		; preds = %entry
+	br label %bb
+
+bb:		; preds = %bb1, %bb.nph
+	%j.01 = phi i32 [ %8, %bb1 ], [ 0, %bb.nph ]		; <i32> [#uses=1]
+	load i32* %srcptr, align 4		; <i32>:1 [#uses=2]
+	and i32 %1, 255		; <i32>:2 [#uses=1]
+	and i32 %1, -256		; <i32>:3 [#uses=1]
+	getelementptr [256 x i8]* @lut, i32 0, i32 %2		; <i8*>:4 [#uses=1]
+	load i8* %4, align 1		; <i8>:5 [#uses=1]
+	zext i8 %5 to i32		; <i32>:6 [#uses=1]
+	or i32 %6, %3		; <i32>:7 [#uses=1]
+	store i32 %7, i32* %dstptr, align 4
+	add i32 %j.01, 1		; <i32>:8 [#uses=2]
+	br label %bb1
+
+bb1:		; preds = %bb
+	icmp slt i32 %8, %count		; <i1>:9 [#uses=1]
+	br i1 %9, label %bb, label %bb1.return_crit_edge
+
+bb1.return_crit_edge:		; preds = %bb1
+	br label %return
+
+return:		; preds = %bb1.return_crit_edge, %entry
+	ret void
+}

Added: llvm/trunk/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect2.ll?rev=53508&view=auto

==============================================================================
--- llvm/trunk/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect2.ll (added)
+++ llvm/trunk/test/Analysis/ScalarEvolution/2008-07-12-UnneededSelect2.ll Sat Jul 12 02:41:32 2008
@@ -0,0 +1,30 @@
+; RUN: llvm-as < %s | opt -analyze -scalar-evolution |& not grep smax
+; PR2070
+
+define i32 @a(i32 %x) nounwind  {
+entry:
+	icmp sgt i32 %x, 1		; <i1>:0 [#uses=1]
+	br i1 %0, label %bb.nph, label %bb2
+
+bb.nph:		; preds = %entry
+	br label %bb
+
+bb:		; preds = %bb1, %bb.nph
+	%z.02 = phi i32 [ %1, %bb1 ], [ 1, %bb.nph ]		; <i32> [#uses=1]
+	%i.01 = phi i32 [ %2, %bb1 ], [ 1, %bb.nph ]		; <i32> [#uses=2]
+	mul i32 %z.02, %i.01		; <i32>:1 [#uses=2]
+	add i32 %i.01, 1		; <i32>:2 [#uses=2]
+	br label %bb1
+
+bb1:		; preds = %bb
+	icmp slt i32 %2, %x		; <i1>:3 [#uses=1]
+	br i1 %3, label %bb, label %bb1.bb2_crit_edge
+
+bb1.bb2_crit_edge:		; preds = %bb1
+	%.lcssa = phi i32 [ %1, %bb1 ]		; <i32> [#uses=1]
+	br label %bb2
+
+bb2:		; preds = %bb1.bb2_crit_edge, %entry
+	%z.0.lcssa = phi i32 [ %.lcssa, %bb1.bb2_crit_edge ], [ 1, %entry ]		; <i32> [#uses=1]
+	ret i32 %z.0.lcssa
+}




From baldrick at free.fr  Sat Jul 12 03:49:30 2008
From: baldrick at free.fr (Duncan Sands)
Date: Sat, 12 Jul 2008 08:49:30 -0000
Subject: [llvm-commits] [test-suite] r53509 -
	/test-suite/trunk/Makefile.programs
Message-ID: <200807120849.m6C8nUfd024335@zion.cs.uiuc.edu>

Author: baldrick
Date: Sat Jul 12 03:49:29 2008
New Revision: 53509

URL: http://llvm.org/viewvc/llvm-project?rev=53509&view=rev
Log:
Give LegalizeTypes a whirl in the nightly testers.

Modified:
    test-suite/trunk/Makefile.programs

Modified: test-suite/trunk/Makefile.programs
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=53509&r1=53508&r2=53509&view=diff

==============================================================================
--- test-suite/trunk/Makefile.programs (original)
+++ test-suite/trunk/Makefile.programs Sat Jul 12 03:49:29 2008
@@ -243,6 +243,7 @@
 ifeq ($(ARCH),THUMB)
 LLCBETAOPTION := --enable-thumb-reg-scavenging
 endif
+LLCBETAOPTION += --enable-legalize-types
 
 print-llcbeta-option:
 	@echo $(LLCBETAOPTION)




From isanbard at gmail.com  Sat Jul 12 04:49:33 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Sat, 12 Jul 2008 09:49:33 -0000
Subject: [llvm-commits] [llvm] r53514 - in /llvm/branches/Apple/Gaz:
 lib/CodeGen/LiveIntervalAnalysis.cpp
 test/CodeGen/X86/2008-07-11-SpillerBug.ll
Message-ID: <200807120949.m6C9nXag026982@zion.cs.uiuc.edu>

Author: void
Date: Sat Jul 12 04:49:33 2008
New Revision: 53514

URL: http://llvm.org/viewvc/llvm-project?rev=53514&view=rev
Log:
Pull r53503 into Gaz:

Fix PR2536: a nasty spiller bug. If a two-address instruction uses a register
but the use portion of its live range is not part of its liveinterval, it must
be defined by an implicit_def. In that case, do not spill the use. e.g.

8   %reg1024<def> = IMPLICIT_DEF
12  %reg1024<def> = INSERT_SUBREG %reg1024<kill>, %reg1025, 2

The live range [12, 14) are not part of the r1024 live interval since it's
defined by an implicit def. It will not conflicts with live interval of r1025.
Now suppose both registers are spilled, you can easily see a situation where
both registers are reloaded before the INSERT_SUBREG and both target registers
that would overlap.


Added:
    llvm/branches/Apple/Gaz/test/CodeGen/X86/2008-07-11-SpillerBug.ll
Modified:
    llvm/branches/Apple/Gaz/lib/CodeGen/LiveIntervalAnalysis.cpp

Modified: llvm/branches/Apple/Gaz/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=53514&r1=53513&r2=53514&view=diff

==============================================================================
--- llvm/branches/Apple/Gaz/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/branches/Apple/Gaz/lib/CodeGen/LiveIntervalAnalysis.cpp Sat Jul 12 04:49:33 2008
@@ -1047,6 +1047,18 @@
       }
     }
 
+    if (HasUse && !li.liveAt(getUseIndex(index)))
+      // Must be defined by an implicit def. It should not be spilled. Note,
+      // this is for correctness reason. e.g.
+      // 8   %reg1024<def> = IMPLICIT_DEF
+      // 12  %reg1024<def> = INSERT_SUBREG %reg1024<kill>, %reg1025, 2
+      // The live range [12, 14) are not part of the r1024 live interval since
+      // it's defined by an implicit def. It will not conflicts with live
+      // interval of r1025. Now suppose both registers are spilled, you can
+      // easier see a situation where both registers are reloaded before
+      // the INSERT_SUBREG and both target registers that would overlap.
+      HasUse = false;
+
     // Update stack slot spill weight if we are splitting.
     float Weight = getSpillWeight(HasDef, HasUse, loopDepth);
       if (!TrySplit)
@@ -1228,6 +1240,17 @@
     unsigned index = getInstructionIndex(MI);
     if (index < start || index >= end)
       continue;
+    if (O.isUse() && !li.liveAt(getUseIndex(index)))
+      // Must be defined by an implicit def. It should not be spilled. Note,
+      // this is for correctness reason. e.g.
+      // 8   %reg1024<def> = IMPLICIT_DEF
+      // 12  %reg1024<def> = INSERT_SUBREG %reg1024<kill>, %reg1025, 2
+      // The live range [12, 14) are not part of the r1024 live interval since
+      // it's defined by an implicit def. It will not conflicts with live
+      // interval of r1025. Now suppose both registers are spilled, you can
+      // easier see a situation where both registers are reloaded before
+      // the INSERT_SUBREG and both target registers that would overlap.
+      continue;
     RewriteMIs.push_back(RewriteInfo(index, MI, O.isUse(), O.isDef()));
   }
   std::sort(RewriteMIs.begin(), RewriteMIs.end(), RewriteInfoCompare());

Added: llvm/branches/Apple/Gaz/test/CodeGen/X86/2008-07-11-SpillerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Gaz/test/CodeGen/X86/2008-07-11-SpillerBug.ll?rev=53514&view=auto

==============================================================================
--- llvm/branches/Apple/Gaz/test/CodeGen/X86/2008-07-11-SpillerBug.ll (added)
+++ llvm/branches/Apple/Gaz/test/CodeGen/X86/2008-07-11-SpillerBug.ll Sat Jul 12 04:49:33 2008
@@ -0,0 +1,49 @@
+; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static |\
+; RUN:   %prcontext 65534 1 | grep movl | count 1
+; PR2536
+
+ at g_5 = external global i16		; <i16*> [#uses=2]
+ at g_107 = external global i16		; <i16*> [#uses=1]
+ at g_229 = external global i32		; <i32*> [#uses=1]
+ at g_227 = external global i16		; <i16*> [#uses=1]
+
+define i32 @func_54(i32 %p_55, i16 zeroext  %p_56) nounwind  {
+entry:
+	load i16* @g_5, align 2		; <i16>:0 [#uses=1]
+	zext i16 %0 to i32		; <i32>:1 [#uses=1]
+	%.mask = and i32 %1, 65534		; <i32> [#uses=1]
+	icmp eq i32 %.mask, 0		; <i1>:2 [#uses=1]
+	load i32* @g_229, align 4		; <i32>:3 [#uses=1]
+	load i16* @g_227, align 2		; <i16>:4 [#uses=1]
+	icmp eq i16 %4, 0		; <i1>:5 [#uses=1]
+	load i16* @g_5, align 2		; <i16>:6 [#uses=1]
+	br label %bb
+
+bb:		; preds = %bb7.preheader, %entry
+	%indvar4 = phi i32 [ 0, %entry ], [ %indvar.next5, %bb7.preheader ]		; <i32> [#uses=1]
+	%p_56_addr.1.reg2mem.0 = phi i16 [ %p_56, %entry ], [ %p_56_addr.0, %bb7.preheader ]		; <i16> [#uses=2]
+	br i1 %2, label %bb7.preheader, label %bb5
+
+bb5:		; preds = %bb
+	store i16 %6, i16* @g_107, align 2
+	br label %bb7.preheader
+
+bb7.preheader:		; preds = %bb5, %bb
+	icmp eq i16 %p_56_addr.1.reg2mem.0, 0		; <i1>:7 [#uses=1]
+	%.0 = select i1 %7, i32 1, i32 0		; <i32> [#uses=1]
+	urem i32 1, %.0		; <i32>:8 [#uses=1]
+	icmp eq i32 %8, 0		; <i1>:9 [#uses=1]
+	%.not = xor i1 %9, true		; <i1> [#uses=1]
+	%.not1 = xor i1 %5, true		; <i1> [#uses=1]
+	%brmerge = or i1 %.not, %.not1		; <i1> [#uses=1]
+	%iftmp.6.0 = select i1 %brmerge, i32 1, i32 0		; <i32> [#uses=1]
+	mul i32 %iftmp.6.0, %3		; <i32>:10 [#uses=1]
+	icmp eq i32 %10, 0		; <i1>:11 [#uses=1]
+	%p_56_addr.0 = select i1 %11, i16 %p_56_addr.1.reg2mem.0, i16 1		; <i16> [#uses=1]
+	%indvar.next5 = add i32 %indvar4, 1		; <i32> [#uses=2]
+	%exitcond6 = icmp eq i32 %indvar.next5, 17		; <i1> [#uses=1]
+	br i1 %exitcond6, label %bb25, label %bb
+
+bb25:		; preds = %bb7.preheader
+	ret i32 1
+}




From kremenek at apple.com  Sat Jul 12 13:28:47 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Sat, 12 Jul 2008 18:28:47 -0000
Subject: [llvm-commits] [llvm] r53517 - /llvm/trunk/include/llvm/ADT/alist.h
Message-ID: <200807121828.m6CISmWG010814@zion.cs.uiuc.edu>

Author: kremenek
Date: Sat Jul 12 13:28:46 2008
New Revision: 53517

URL: http://llvm.org/viewvc/llvm-project?rev=53517&view=rev
Log:
Inline typedef for alist_iterator::pointer to work with MSVC++.

Modified:
    llvm/trunk/include/llvm/ADT/alist.h

Modified: llvm/trunk/include/llvm/ADT/alist.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/alist.h?rev=53517&r1=53516&r2=53517&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/alist.h (original)
+++ llvm/trunk/include/llvm/ADT/alist.h Sat Jul 12 13:28:46 2008
@@ -34,7 +34,11 @@
 
 public:
   typedef size_t size_type;
-  typedef typename super::pointer pointer;
+
+  // FIX for MSVC++.  This should be reviewed more.
+  // typedef typename super::pointer pointer;
+  typedef ValueT* pointer;
+
   typedef typename super::reference reference;
 
   alist_iterator(NodeIterT NI) : NodeIter(NI) {}




From monping at apple.com  Sat Jul 12 20:41:23 2008
From: monping at apple.com (Mon P Wang)
Date: Sat, 12 Jul 2008 18:41:23 -0700
Subject: [llvm-commits] Setting alignment when creating temporary patch
Message-ID: <49DDC12F-6E7C-44ED-BA68-7682C57C5B63@apple.com>

Hi,

I looked at uses of CreateStackTemporary to see if there were any  
other possible issues with alignment like in EmitStackConvert.  The  
only case that I saw was the case of a BIT_CONVERT when the convert  
from a scalar or a vector to a vector.

   -- Mon Ping


--- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp    (revision 53520)
+++ lib/CodeGen/SelectionDAG/LegalizeDAG.cpp    (working copy)
@@ -5464,7 +5464,6 @@
                                                       MVT DestVT) {
    if (Op0.getValueType() == MVT::i32) {
      // simple 32-bit [signed|unsigned] integer to float/double  
expansion
-
      // Get the stack frame index of a 8 byte buffer.
      SDOperand StackSlot = DAG.CreateStackTemporary(MVT::f64);

@@ -7015,7 +7014,9 @@
        // The input is a scalar or single-element vector.
        // Lower to a store/load so that it can be split.
        // FIXME: this could be improved probably.
-      SDOperand Ptr = DAG.CreateStackTemporary(InOp.getValueType());
+      unsigned LdAlign = TLI.getTargetData()->getPrefTypeAlignment(
+                                             
Op.getValueType().getTypeForMVT());
+      SDOperand Ptr = DAG.CreateStackTemporary(InOp.getValueType(),  
LdAlign);
        int FI = cast<FrameIndexSDNode>(Ptr.Val)->getIndex();

        SDOperand St = DAG.getStore(DAG.getEntryNode(),



From sabre at nondot.org  Sun Jul 13 14:35:22 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 13 Jul 2008 19:35:22 -0000
Subject: [llvm-commits] [llvm] r53523 - /llvm/trunk/tools/opt/opt.cpp
Message-ID: <200807131935.m6DJZMbc026128@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 14:35:21 2008
New Revision: 53523

URL: http://llvm.org/viewvc/llvm-project?rev=53523&view=rev
Log:
Fix PR2231 - opt -internalize -std-compile-opts should run internalize first

Modified:
    llvm/trunk/tools/opt/opt.cpp

Modified: llvm/trunk/tools/opt/opt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/opt.cpp?rev=53523&r1=53522&r2=53523&view=diff

==============================================================================
--- llvm/trunk/tools/opt/opt.cpp (original)
+++ llvm/trunk/tools/opt/opt.cpp Sun Jul 13 14:35:21 2008
@@ -379,18 +379,21 @@
     // Add an appropriate TargetData instance for this module...
     Passes.add(new TargetData(M.get()));
 
-    // If -std-compile-opts is given, add in all the standard compilation 
-    // optimizations first. This will handle -strip-debug, -disable-inline,
-    // and -disable-opt as well.
-    if (StandardCompileOpts)
-      AddStandardCompilePasses(Passes);
-
-    // otherwise if the -strip-debug command line option was specified, add it.
-    else if (StripDebug)
+    // If the -strip-debug command line option was specified, add it.  If
+    // -std-compile-opts was also specified, it will handle StripDebug.
+    if (StripDebug && !StandardCompileOpts)
       addPass(Passes, createStripSymbolsPass(true));
 
     // Create a new optimization pass for each one specified on the command line
     for (unsigned i = 0; i < PassList.size(); ++i) {
+      // Check to see if -std-compile-opts we specified before this option.  If
+      // so, handle it.
+      if (StandardCompileOpts && 
+          StandardCompileOpts.getPosition() < PassList.getPosition(i)) {
+        AddStandardCompilePasses(Passes);
+        StandardCompileOpts = false;
+      }
+      
       const PassInfo *PassInf = PassList[i];
       Pass *P = 0;
       if (PassInf->getNormalCtor())
@@ -418,6 +421,12 @@
       if (PrintEachXForm)
         Passes.add(new PrintModulePass(&cerr));
     }
+    
+    // If -std-compile-opts was specified at the end of the pass list, add them.
+    if (StandardCompileOpts) {
+      AddStandardCompilePasses(Passes);
+      StandardCompileOpts = false;
+    }    
 
     // Check that the module is well formed on completion of optimization
     if (!NoVerify && !VerifyEach)




From baldrick at free.fr  Sun Jul 13 15:14:39 2008
From: baldrick at free.fr (Duncan Sands)
Date: Sun, 13 Jul 2008 20:14:39 -0000
Subject: [llvm-commits] [llvm] r53525 - /llvm/trunk/tools/opt/opt.cpp
Message-ID: <200807132014.m6DKEdYk027552@zion.cs.uiuc.edu>

Author: baldrick
Date: Sun Jul 13 15:14:38 2008
New Revision: 53525

URL: http://llvm.org/viewvc/llvm-project?rev=53525&view=rev
Log:
Fix comment.

Modified:
    llvm/trunk/tools/opt/opt.cpp

Modified: llvm/trunk/tools/opt/opt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/opt.cpp?rev=53525&r1=53524&r2=53525&view=diff

==============================================================================
--- llvm/trunk/tools/opt/opt.cpp (original)
+++ llvm/trunk/tools/opt/opt.cpp Sun Jul 13 15:14:38 2008
@@ -386,7 +386,7 @@
 
     // Create a new optimization pass for each one specified on the command line
     for (unsigned i = 0; i < PassList.size(); ++i) {
-      // Check to see if -std-compile-opts we specified before this option.  If
+      // Check to see if -std-compile-opts was specified before this option.  If
       // so, handle it.
       if (StandardCompileOpts && 
           StandardCompileOpts.getPosition() < PassList.getPosition(i)) {




From sabre at nondot.org  Sun Jul 13 16:12:01 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 13 Jul 2008 21:12:01 -0000
Subject: [llvm-commits] [llvm] r53526 -
	/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
Message-ID: <200807132112.m6DLC1oG029287@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 16:12:01 2008
New Revision: 53526

URL: http://llvm.org/viewvc/llvm-project?rev=53526&view=rev
Log:
Refactor some code out into its own helper function, getting rid of crazy multiline
conditionals and commenting the code better.

No functionality change.

Modified:
    llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp

Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=53526&r1=53525&r2=53526&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Sun Jul 13 16:12:01 2008
@@ -1425,6 +1425,86 @@
   return true;
 }
 
+/// FoldBranchToCommonDest - If this basic block is ONLY a setcc and a branch,
+/// and if a predecessor branches to us and one of our successors, fold the
+/// setcc into the predecessor and use logical operations to pick the right
+/// destination.
+static bool FoldBranchToCommonDest(BranchInst *BI) {
+  Instruction *Cond = dyn_cast<Instruction>(BI->getCondition());
+  if (Cond == 0) return false;
+
+  BasicBlock *BB = BI->getParent();
+
+  // Only allow this if the condition is a simple instruction that can be
+  // executed unconditionally.  It must be in the same block as the branch, and
+  // must be at the front of the block.
+  if ((!isa<CmpInst>(Cond) && !isa<BinaryOperator>(Cond)) ||
+      Cond->getParent() != BB || &BB->front() != Cond || !Cond->hasOneUse())
+    return false;
+      
+  // Make sure the instruction after the condition is the cond branch.
+  BasicBlock::iterator CondIt = Cond; ++CondIt;
+  if (&*CondIt != BI)
+    return false;
+  
+  // Finally, don't infinitely unroll conditional loops.
+  BasicBlock *TrueDest  = BI->getSuccessor(0);
+  BasicBlock *FalseDest = BI->getSuccessor(1);
+  if (TrueDest == BB || FalseDest == BB)
+    return false;
+  
+  for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) {
+    BasicBlock *PredBlock = *PI;
+    BranchInst *PBI = dyn_cast<BranchInst>(PredBlock->getTerminator());
+    if (PBI == 0 || PBI->isUnconditional() ||
+        !SafeToMergeTerminators(BI, PBI))
+      continue;
+    
+    // Canonicalize the predecessors condition (inverting it) if needed to allow
+    // this xform to trigger.
+    if (PBI->getSuccessor(0) == FalseDest ||
+        PBI->getSuccessor(1) == TrueDest) {
+      Value *NewCond =
+        BinaryOperator::CreateNot(PBI->getCondition(),
+                        PBI->getCondition()->getName()+".not", PBI);
+      PBI->setCondition(NewCond);
+      BasicBlock *OldTrue = PBI->getSuccessor(0);
+      BasicBlock *OldFalse = PBI->getSuccessor(1);
+      PBI->setSuccessor(0, OldFalse);
+      PBI->setSuccessor(1, OldTrue);
+    }
+
+    if ((PBI->getSuccessor(0) == TrueDest && FalseDest != BB) ||
+        (PBI->getSuccessor(1) == FalseDest && TrueDest != BB)) {
+      // Clone Cond into the predecessor basic block, and or/and the
+      // two conditions together.
+      Instruction *New = Cond->clone();
+      PredBlock->getInstList().insert(PBI, New);
+      New->takeName(Cond);
+      Cond->setName(New->getName()+".old");
+      
+      Value *NewCond;
+      if (PBI->getSuccessor(0) == TrueDest)
+        NewCond = BinaryOperator::CreateOr(PBI->getCondition(), New, "or.cond",
+                                           PBI);
+      else
+        NewCond = BinaryOperator::CreateOr(PBI->getCondition(), New, "and.cond",
+                                           PBI);
+      PBI->setCondition(NewCond);
+      if (PBI->getSuccessor(0) == BB) {
+        AddPredecessorToBlock(TrueDest, PredBlock, BB);
+        PBI->setSuccessor(0, TrueDest);
+      }
+      if (PBI->getSuccessor(1) == BB) {
+        AddPredecessorToBlock(FalseDest, PredBlock, BB);
+        PBI->setSuccessor(1, FalseDest);
+      }
+      return true;
+    }
+  }
+  return false;
+}
+
 
 namespace {
   /// ConstantIntOrdering - This class implements a stable ordering of constant
@@ -1628,7 +1708,7 @@
       if (BBI->isTerminator() &&  // Terminator is the only non-phi instruction!
           Succ != BB)             // Don't hurt infinite loops!
         if (TryToSimplifyUncondBranchFromEmptyBlock(BB, Succ))
-          return 1;
+          return true;
       
     } else {  // Conditional branch
       if (isValueEqualityComparison(BI)) {
@@ -1658,59 +1738,9 @@
       // If this basic block is ONLY a setcc and a branch, and if a predecessor
       // branches to us and one of our successors, fold the setcc into the
       // predecessor and use logical operations to pick the right destination.
-      BasicBlock *TrueDest  = BI->getSuccessor(0);
-      BasicBlock *FalseDest = BI->getSuccessor(1);
-      if (Instruction *Cond = dyn_cast<Instruction>(BI->getCondition())) {
-        BasicBlock::iterator CondIt = Cond;
-        if ((isa<CmpInst>(Cond) || isa<BinaryOperator>(Cond)) &&
-            Cond->getParent() == BB && &BB->front() == Cond &&
-            &*++CondIt == BI && Cond->hasOneUse() &&
-            TrueDest != BB && FalseDest != BB)
-          for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI!=E; ++PI)
-            if (BranchInst *PBI = dyn_cast<BranchInst>((*PI)->getTerminator()))
-              if (PBI->isConditional() && SafeToMergeTerminators(BI, PBI)) {
-                BasicBlock *PredBlock = *PI;
-                if (PBI->getSuccessor(0) == FalseDest ||
-                    PBI->getSuccessor(1) == TrueDest) {
-                  // Invert the predecessors condition test (xor it with true),
-                  // which allows us to write this code once.
-                  Value *NewCond =
-                    BinaryOperator::CreateNot(PBI->getCondition(),
-                                    PBI->getCondition()->getName()+".not", PBI);
-                  PBI->setCondition(NewCond);
-                  BasicBlock *OldTrue = PBI->getSuccessor(0);
-                  BasicBlock *OldFalse = PBI->getSuccessor(1);
-                  PBI->setSuccessor(0, OldFalse);
-                  PBI->setSuccessor(1, OldTrue);
-                }
+      if (FoldBranchToCommonDest(BI))
+        return SimplifyCFG(BB) | 1;
 
-                if ((PBI->getSuccessor(0) == TrueDest && FalseDest != BB) ||
-                    (PBI->getSuccessor(1) == FalseDest && TrueDest != BB)) {
-                  // Clone Cond into the predecessor basic block, and or/and the
-                  // two conditions together.
-                  Instruction *New = Cond->clone();
-                  PredBlock->getInstList().insert(PBI, New);
-                  New->takeName(Cond);
-                  Cond->setName(New->getName()+".old");
-                  Instruction::BinaryOps Opcode =
-                    PBI->getSuccessor(0) == TrueDest ?
-                    Instruction::Or : Instruction::And;
-                  Value *NewCond =
-                    BinaryOperator::Create(Opcode, PBI->getCondition(),
-                                           New, "bothcond", PBI);
-                  PBI->setCondition(NewCond);
-                  if (PBI->getSuccessor(0) == BB) {
-                    AddPredecessorToBlock(TrueDest, PredBlock, BB);
-                    PBI->setSuccessor(0, TrueDest);
-                  }
-                  if (PBI->getSuccessor(1) == BB) {
-                    AddPredecessorToBlock(FalseDest, PredBlock, BB);
-                    PBI->setSuccessor(1, FalseDest);
-                  }
-                  return SimplifyCFG(BB) | 1;
-                }
-              }
-      }
 
       // Scan predessor blocks for conditional branches.
       for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI)
@@ -1811,7 +1841,7 @@
                 
                 DOUT << "FOLDING BRs:" << *PBI->getParent()
                      << "AND: " << *BI->getParent();
-                                
+
                 // BI may have other predecessors.  Because of this, we leave
                 // it alone, but modify PBI.
                 




From sabre at nondot.org  Sun Jul 13 16:15:11 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 13 Jul 2008 21:15:11 -0000
Subject: [llvm-commits] [llvm] r53527 -
	/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
Message-ID: <200807132115.m6DLFBWp029372@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 16:15:11 2008
New Revision: 53527

URL: http://llvm.org/viewvc/llvm-project?rev=53527&view=rev
Log:
simplify logic a bit

Modified:
    llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp

Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=53527&r1=53526&r2=53527&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Sun Jul 13 16:15:11 2008
@@ -1473,9 +1473,15 @@
       PBI->setSuccessor(0, OldFalse);
       PBI->setSuccessor(1, OldTrue);
     }
+    
+    Instruction::BinaryOps Opc = Instruction::Shl; // sentinel.
+    
+    if (PBI->getSuccessor(0) == TrueDest && FalseDest != BB)
+      Opc = Instruction::Or;
+    else if (PBI->getSuccessor(1) == FalseDest && TrueDest != BB)
+      Opc = Instruction::And;
 
-    if ((PBI->getSuccessor(0) == TrueDest && FalseDest != BB) ||
-        (PBI->getSuccessor(1) == FalseDest && TrueDest != BB)) {
+    if (Opc != Instruction::Shl) {
       // Clone Cond into the predecessor basic block, and or/and the
       // two conditions together.
       Instruction *New = Cond->clone();
@@ -1483,13 +1489,8 @@
       New->takeName(Cond);
       Cond->setName(New->getName()+".old");
       
-      Value *NewCond;
-      if (PBI->getSuccessor(0) == TrueDest)
-        NewCond = BinaryOperator::CreateOr(PBI->getCondition(), New, "or.cond",
-                                           PBI);
-      else
-        NewCond = BinaryOperator::CreateOr(PBI->getCondition(), New, "and.cond",
-                                           PBI);
+      Value *NewCond = BinaryOperator::Create(Opc, PBI->getCondition(),
+                                              New, "or.cond", PBI);
       PBI->setCondition(NewCond);
       if (PBI->getSuccessor(0) == BB) {
         AddPredecessorToBlock(TrueDest, PredBlock, BB);




From sabre at nondot.org  Sun Jul 13 16:20:20 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 13 Jul 2008 21:20:20 -0000
Subject: [llvm-commits] [llvm] r53528 -
	/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
Message-ID: <200807132120.m6DLKKuX029523@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 16:20:19 2008
New Revision: 53528

URL: http://llvm.org/viewvc/llvm-project?rev=53528&view=rev
Log:
Final bit of simplification for FoldBranchToCommonDest.

Modified:
    llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp

Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=53528&r1=53527&r2=53528&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Sun Jul 13 16:20:19 2008
@@ -1460,13 +1460,25 @@
         !SafeToMergeTerminators(BI, PBI))
       continue;
     
-    // Canonicalize the predecessors condition (inverting it) if needed to allow
-    // this xform to trigger.
-    if (PBI->getSuccessor(0) == FalseDest ||
-        PBI->getSuccessor(1) == TrueDest) {
+    Instruction::BinaryOps Opc;
+    bool InvertPredCond = false;
+
+    if (PBI->getSuccessor(0) == TrueDest)
+      Opc = Instruction::Or;
+    else if (PBI->getSuccessor(1) == FalseDest)
+      Opc = Instruction::And;
+    else if (PBI->getSuccessor(0) == FalseDest)
+      Opc = Instruction::And, InvertPredCond = true;
+    else if (PBI->getSuccessor(1) == TrueDest)
+      Opc = Instruction::Or, InvertPredCond = true;
+    else
+      continue;
+
+    // If we need to invert the condition in the pred block to match, do so now.
+    if (InvertPredCond) {
       Value *NewCond =
         BinaryOperator::CreateNot(PBI->getCondition(),
-                        PBI->getCondition()->getName()+".not", PBI);
+                                  PBI->getCondition()->getName()+".not", PBI);
       PBI->setCondition(NewCond);
       BasicBlock *OldTrue = PBI->getSuccessor(0);
       BasicBlock *OldFalse = PBI->getSuccessor(1);
@@ -1474,34 +1486,25 @@
       PBI->setSuccessor(1, OldTrue);
     }
     
-    Instruction::BinaryOps Opc = Instruction::Shl; // sentinel.
+    // Clone Cond into the predecessor basic block, and or/and the
+    // two conditions together.
+    Instruction *New = Cond->clone();
+    PredBlock->getInstList().insert(PBI, New);
+    New->takeName(Cond);
+    Cond->setName(New->getName()+".old");
     
-    if (PBI->getSuccessor(0) == TrueDest && FalseDest != BB)
-      Opc = Instruction::Or;
-    else if (PBI->getSuccessor(1) == FalseDest && TrueDest != BB)
-      Opc = Instruction::And;
-
-    if (Opc != Instruction::Shl) {
-      // Clone Cond into the predecessor basic block, and or/and the
-      // two conditions together.
-      Instruction *New = Cond->clone();
-      PredBlock->getInstList().insert(PBI, New);
-      New->takeName(Cond);
-      Cond->setName(New->getName()+".old");
-      
-      Value *NewCond = BinaryOperator::Create(Opc, PBI->getCondition(),
-                                              New, "or.cond", PBI);
-      PBI->setCondition(NewCond);
-      if (PBI->getSuccessor(0) == BB) {
-        AddPredecessorToBlock(TrueDest, PredBlock, BB);
-        PBI->setSuccessor(0, TrueDest);
-      }
-      if (PBI->getSuccessor(1) == BB) {
-        AddPredecessorToBlock(FalseDest, PredBlock, BB);
-        PBI->setSuccessor(1, FalseDest);
-      }
-      return true;
+    Value *NewCond = BinaryOperator::Create(Opc, PBI->getCondition(),
+                                            New, "or.cond", PBI);
+    PBI->setCondition(NewCond);
+    if (PBI->getSuccessor(0) == BB) {
+      AddPredecessorToBlock(TrueDest, PredBlock, BB);
+      PBI->setSuccessor(0, TrueDest);
+    }
+    if (PBI->getSuccessor(1) == BB) {
+      AddPredecessorToBlock(FalseDest, PredBlock, BB);
+      PBI->setSuccessor(1, FalseDest);
     }
+    return true;
   }
   return false;
 }
@@ -1742,7 +1745,6 @@
       if (FoldBranchToCommonDest(BI))
         return SimplifyCFG(BB) | 1;
 
-
       // Scan predessor blocks for conditional branches.
       for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI)
         if (BranchInst *PBI = dyn_cast<BranchInst>((*PI)->getTerminator()))




From sabre at nondot.org  Sun Jul 13 16:27:36 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 13 Jul 2008 21:27:36 -0000
Subject: [llvm-commits] [llvm] r53529 - /llvm/trunk/docs/index.html
Message-ID: <200807132127.m6DLRaAQ029736@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 16:27:36 2008
New Revision: 53529

URL: http://llvm.org/viewvc/llvm-project?rev=53529&view=rev
Log:
add a description.

Modified:
    llvm/trunk/docs/index.html

Modified: llvm/trunk/docs/index.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/index.html?rev=53529&r1=53528&r2=53529&view=diff

==============================================================================
--- llvm/trunk/docs/index.html (original)
+++ llvm/trunk/docs/index.html Sun Jul 13 16:27:36 2008
@@ -218,7 +218,8 @@
 describes the design and configuration of the LLVM compiler driver tool,
 <tt>llvmc</tt>.</li>
 
-<li><a href="BitCodeFormat.html">LLVM Bitcode File Format</a></li>
+<li><a href="BitCodeFormat.html">LLVM Bitcode File Format</a> - This describes 
+the file format and encoding used for LLVM "bc" files.</li>
 
 <li><a href="SystemLibrary.html">System Library</a> - This document describes
 the LLVM System Library (<tt>lib/System</tt>) and how to keep LLVM source code




From sabre at nondot.org  Sun Jul 13 16:53:27 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 13 Jul 2008 21:53:27 -0000
Subject: [llvm-commits] [llvm] r53530 -
	/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
Message-ID: <200807132153.m6DLrSE4030560@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 16:53:26 2008
New Revision: 53530

URL: http://llvm.org/viewvc/llvm-project?rev=53530&view=rev
Log:
factor another large hunk of code out into its own function.  
No functionality change.

Modified:
    llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp

Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=53530&r1=53529&r2=53530&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Sun Jul 13 16:53:26 2008
@@ -1509,6 +1509,173 @@
   return false;
 }
 
+/// SimplifyCondBranchToCondBranch - If we have a conditional branch as a
+/// predecessor of another block, this function tries to simplify it.  We know
+/// that PBI and BI are both conditional branches, and BI is in one of the
+/// successor blocks of PBI - PBI branches to BI.
+static bool SimplifyCondBranchToCondBranch(BranchInst *PBI, BranchInst *BI) {
+  assert(PBI->isConditional() && BI->isConditional());
+  BasicBlock *BB = BI->getParent();
+  
+  // If this block ends with a branch instruction, and if there is a
+  // predecessor that ends on a branch of the same condition, make 
+  // this conditional branch redundant.
+  if (PBI->getCondition() == BI->getCondition() &&
+      PBI->getSuccessor(0) != PBI->getSuccessor(1)) {
+    // Okay, the outcome of this conditional branch is statically
+    // knowable.  If this block had a single pred, handle specially.
+    if (BB->getSinglePredecessor()) {
+      // Turn this into a branch on constant.
+      bool CondIsTrue = PBI->getSuccessor(0) == BB;
+      BI->setCondition(ConstantInt::get(Type::Int1Ty, CondIsTrue));
+      return true;  // Nuke the branch on constant.
+    }
+    
+    // Otherwise, if there are multiple predecessors, insert a PHI that merges
+    // in the constant and simplify the block result.  Subsequent passes of
+    // simplifycfg will thread the block.
+    if (BlockIsSimpleEnoughToThreadThrough(BB)) {
+      PHINode *NewPN = PHINode::Create(Type::Int1Ty,
+                                       BI->getCondition()->getName() + ".pr",
+                                       BB->begin());
+      for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI)
+        if ((PBI = dyn_cast<BranchInst>((*PI)->getTerminator())) &&
+            PBI != BI && PBI->isConditional() &&
+            PBI->getCondition() == BI->getCondition() &&
+            PBI->getSuccessor(0) != PBI->getSuccessor(1)) {
+          bool CondIsTrue = PBI->getSuccessor(0) == BB;
+          NewPN->addIncoming(ConstantInt::get(Type::Int1Ty, 
+                                              CondIsTrue), *PI);
+        } else {
+          NewPN->addIncoming(BI->getCondition(), *PI);
+        }
+      
+      BI->setCondition(NewPN);
+      // This will thread the branch.
+      return true;
+    }
+  }
+  
+  // If this is a conditional branch in an empty block, and if any
+  // predecessors is a conditional branch to one of our destinations,
+  // fold the conditions into logical ops and one cond br.
+  if (&BB->front() == BI) {
+    int PBIOp, BIOp;
+    if (PBI->getSuccessor(0) == BI->getSuccessor(0)) {
+      PBIOp = BIOp = 0;
+    } else if (PBI->getSuccessor(0) == BI->getSuccessor(1)) {
+      PBIOp = 0; BIOp = 1;
+    } else if (PBI->getSuccessor(1) == BI->getSuccessor(0)) {
+      PBIOp = 1; BIOp = 0;
+    } else if (PBI->getSuccessor(1) == BI->getSuccessor(1)) {
+      PBIOp = BIOp = 1;
+    } else {
+      PBIOp = BIOp = -1;
+    }
+    
+    // Check to make sure that the other destination of this branch
+    // isn't BB itself.  If so, this is an infinite loop that will
+    // keep getting unwound.
+    if (PBIOp != -1 && PBI->getSuccessor(PBIOp) == BB)
+      PBIOp = BIOp = -1;
+    
+    // Do not perform this transformation if it would require 
+    // insertion of a large number of select instructions. For targets
+    // without predication/cmovs, this is a big pessimization.
+    if (PBIOp != -1) {
+      BasicBlock *CommonDest = PBI->getSuccessor(PBIOp);
+      
+      unsigned NumPhis = 0;
+      for (BasicBlock::iterator II = CommonDest->begin();
+           isa<PHINode>(II); ++II, ++NumPhis) {
+        if (NumPhis > 2) {
+          // Disable this xform.
+          PBIOp = -1;
+          break;
+        }
+      }
+    }
+    
+    // Finally, if everything is ok, fold the branches to logical ops.
+    if (PBIOp != -1) {
+      BasicBlock *CommonDest = PBI->getSuccessor(PBIOp);
+      BasicBlock *OtherDest  = BI->getSuccessor(BIOp ^ 1);
+      
+      // If OtherDest *is* BB, then this is a basic block with just
+      // a conditional branch in it, where one edge (OtherDesg) goes
+      // back to the block.  We know that the program doesn't get
+      // stuck in the infinite loop, so the condition must be such
+      // that OtherDest isn't branched through. Forward to CommonDest,
+      // and avoid an infinite loop at optimizer time.
+      if (OtherDest == BB)
+        OtherDest = CommonDest;
+      
+      DOUT << "FOLDING BRs:" << *PBI->getParent()
+           << "AND: " << *BI->getParent();
+      
+      DOUT << *PBI->getParent()->getParent();
+      
+      // BI may have other predecessors.  Because of this, we leave
+      // it alone, but modify PBI.
+      
+      // Make sure we get to CommonDest on True&True directions.
+      Value *PBICond = PBI->getCondition();
+      if (PBIOp)
+        PBICond = BinaryOperator::CreateNot(PBICond,
+                                            PBICond->getName()+".not",
+                                            PBI);
+      Value *BICond = BI->getCondition();
+      if (BIOp)
+        BICond = BinaryOperator::CreateNot(BICond,
+                                           BICond->getName()+".not",
+                                           PBI);
+      // Merge the conditions.
+      Value *Cond =
+        BinaryOperator::CreateOr(PBICond, BICond, "brmerge", PBI);
+      
+      // Modify PBI to branch on the new condition to the new dests.
+      PBI->setCondition(Cond);
+      PBI->setSuccessor(0, CommonDest);
+      PBI->setSuccessor(1, OtherDest);
+      
+      // OtherDest may have phi nodes.  If so, add an entry from PBI's
+      // block that are identical to the entries for BI's block.
+      PHINode *PN;
+      for (BasicBlock::iterator II = OtherDest->begin();
+           (PN = dyn_cast<PHINode>(II)); ++II) {
+        Value *V = PN->getIncomingValueForBlock(BB);
+        PN->addIncoming(V, PBI->getParent());
+      }
+      
+      // We know that the CommonDest already had an edge from PBI to
+      // it.  If it has PHIs though, the PHIs may have different
+      // entries for BB and PBI's BB.  If so, insert a select to make
+      // them agree.
+      for (BasicBlock::iterator II = CommonDest->begin();
+           (PN = dyn_cast<PHINode>(II)); ++II) {
+        Value * BIV = PN->getIncomingValueForBlock(BB);
+        unsigned PBBIdx = PN->getBasicBlockIndex(PBI->getParent());
+        Value *PBIV = PN->getIncomingValue(PBBIdx);
+        if (BIV != PBIV) {
+          // Insert a select in PBI to pick the right value.
+          Value *NV = SelectInst::Create(PBICond, PBIV, BIV,
+                                         PBIV->getName()+".mux", PBI);
+          PN->setIncomingValue(PBBIdx, NV);
+        }
+      }
+      
+      DOUT << "INTO: " << *PBI->getParent();
+      
+      DOUT << *PBI->getParent()->getParent();
+      
+      // This basic block is probably dead.  We know it has at least
+      // one fewer predecessor.
+      return true;
+    }
+  }
+  return false;
+}
+
 
 namespace {
   /// ConstantIntOrdering - This class implements a stable ordering of constant
@@ -1745,163 +1912,13 @@
       if (FoldBranchToCommonDest(BI))
         return SimplifyCFG(BB) | 1;
 
-      // Scan predessor blocks for conditional branches.
+
+      // Scan predecessor blocks for conditional branches.
       for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI)
         if (BranchInst *PBI = dyn_cast<BranchInst>((*PI)->getTerminator()))
-          if (PBI != BI && PBI->isConditional()) {
-              
-            // If this block ends with a branch instruction, and if there is a
-            // predecessor that ends on a branch of the same condition, make 
-            // this conditional branch redundant.
-            if (PBI->getCondition() == BI->getCondition() &&
-                PBI->getSuccessor(0) != PBI->getSuccessor(1)) {
-              // Okay, the outcome of this conditional branch is statically
-              // knowable.  If this block had a single pred, handle specially.
-              if (BB->getSinglePredecessor()) {
-                // Turn this into a branch on constant.
-                bool CondIsTrue = PBI->getSuccessor(0) == BB;
-                BI->setCondition(ConstantInt::get(Type::Int1Ty, CondIsTrue));
-                return SimplifyCFG(BB);  // Nuke the branch on constant.
-              }
-              
-              // Otherwise, if there are multiple predecessors, insert a PHI 
-              // that merges in the constant and simplify the block result.
-              if (BlockIsSimpleEnoughToThreadThrough(BB)) {
-                PHINode *NewPN = PHINode::Create(Type::Int1Ty,
-                                                 BI->getCondition()->getName()
-                                                 + ".pr", BB->begin());
-                for (PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI)
-                  if ((PBI = dyn_cast<BranchInst>((*PI)->getTerminator())) &&
-                      PBI != BI && PBI->isConditional() &&
-                      PBI->getCondition() == BI->getCondition() &&
-                      PBI->getSuccessor(0) != PBI->getSuccessor(1)) {
-                    bool CondIsTrue = PBI->getSuccessor(0) == BB;
-                    NewPN->addIncoming(ConstantInt::get(Type::Int1Ty, 
-                                                        CondIsTrue), *PI);
-                  } else {
-                    NewPN->addIncoming(BI->getCondition(), *PI);
-                  }
-                
-                BI->setCondition(NewPN);
-                // This will thread the branch.
-                return SimplifyCFG(BB) | true;
-              }
-            }
-            
-            // If this is a conditional branch in an empty block, and if any
-            // predecessors is a conditional branch to one of our destinations,
-            // fold the conditions into logical ops and one cond br.
-            if (&BB->front() == BI) {
-              int PBIOp, BIOp;
-              if (PBI->getSuccessor(0) == BI->getSuccessor(0)) {
-                PBIOp = BIOp = 0;
-              } else if (PBI->getSuccessor(0) == BI->getSuccessor(1)) {
-                PBIOp = 0; BIOp = 1;
-              } else if (PBI->getSuccessor(1) == BI->getSuccessor(0)) {
-                PBIOp = 1; BIOp = 0;
-              } else if (PBI->getSuccessor(1) == BI->getSuccessor(1)) {
-                PBIOp = BIOp = 1;
-              } else {
-                PBIOp = BIOp = -1;
-              }
-              
-              // Check to make sure that the other destination of this branch
-              // isn't BB itself.  If so, this is an infinite loop that will
-              // keep getting unwound.
-              if (PBIOp != -1 && PBI->getSuccessor(PBIOp) == BB)
-                PBIOp = BIOp = -1;
-              
-              // Do not perform this transformation if it would require 
-              // insertion of a large number of select instructions. For targets
-              // without predication/cmovs, this is a big pessimization.
-              if (PBIOp != -1) {
-                BasicBlock *CommonDest = PBI->getSuccessor(PBIOp);
-           
-                unsigned NumPhis = 0;
-                for (BasicBlock::iterator II = CommonDest->begin();
-                     isa<PHINode>(II); ++II, ++NumPhis) {
-                  if (NumPhis > 2) {
-                    // Disable this xform.
-                    PBIOp = -1;
-                    break;
-                  }
-                }
-              }
-
-              // Finally, if everything is ok, fold the branches to logical ops.
-              if (PBIOp != -1) {
-                BasicBlock *CommonDest = PBI->getSuccessor(PBIOp);
-                BasicBlock *OtherDest  = BI->getSuccessor(BIOp ^ 1);
-
-                // If OtherDest *is* BB, then this is a basic block with just
-                // a conditional branch in it, where one edge (OtherDesg) goes
-                // back to the block.  We know that the program doesn't get
-                // stuck in the infinite loop, so the condition must be such
-                // that OtherDest isn't branched through. Forward to CommonDest,
-                // and avoid an infinite loop at optimizer time.
-                if (OtherDest == BB)
-                  OtherDest = CommonDest;
-                
-                DOUT << "FOLDING BRs:" << *PBI->getParent()
-                     << "AND: " << *BI->getParent();
-
-                // BI may have other predecessors.  Because of this, we leave
-                // it alone, but modify PBI.
-                
-                // Make sure we get to CommonDest on True&True directions.
-                Value *PBICond = PBI->getCondition();
-                if (PBIOp)
-                  PBICond = BinaryOperator::CreateNot(PBICond,
-                                                      PBICond->getName()+".not",
-                                                      PBI);
-                Value *BICond = BI->getCondition();
-                if (BIOp)
-                  BICond = BinaryOperator::CreateNot(BICond,
-                                                     BICond->getName()+".not",
-                                                     PBI);
-                // Merge the conditions.
-                Value *Cond =
-                  BinaryOperator::CreateOr(PBICond, BICond, "brmerge", PBI);
-                
-                // Modify PBI to branch on the new condition to the new dests.
-                PBI->setCondition(Cond);
-                PBI->setSuccessor(0, CommonDest);
-                PBI->setSuccessor(1, OtherDest);
-
-                // OtherDest may have phi nodes.  If so, add an entry from PBI's
-                // block that are identical to the entries for BI's block.
-                PHINode *PN;
-                for (BasicBlock::iterator II = OtherDest->begin();
-                     (PN = dyn_cast<PHINode>(II)); ++II) {
-                  Value *V = PN->getIncomingValueForBlock(BB);
-                  PN->addIncoming(V, PBI->getParent());
-                }
-                
-                // We know that the CommonDest already had an edge from PBI to
-                // it.  If it has PHIs though, the PHIs may have different
-                // entries for BB and PBI's BB.  If so, insert a select to make
-                // them agree.
-                for (BasicBlock::iterator II = CommonDest->begin();
-                     (PN = dyn_cast<PHINode>(II)); ++II) {
-                  Value * BIV = PN->getIncomingValueForBlock(BB);
-                  unsigned PBBIdx = PN->getBasicBlockIndex(PBI->getParent());
-                  Value *PBIV = PN->getIncomingValue(PBBIdx);
-                  if (BIV != PBIV) {
-                    // Insert a select in PBI to pick the right value.
-                    Value *NV = SelectInst::Create(PBICond, PBIV, BIV,
-                                                   PBIV->getName()+".mux", PBI);
-                    PN->setIncomingValue(PBBIdx, NV);
-                  }
-                }
-
-                DOUT << "INTO: " << *PBI->getParent();
-
-                // This basic block is probably dead.  We know it has at least
-                // one fewer predecessor.
-                return SimplifyCFG(BB) | true;
-              }
-            }
-          }
+          if (PBI != BI && PBI->isConditional())
+            if (SimplifyCondBranchToCondBranch(PBI, BI))
+              return SimplifyCFG(BB) | true;
     }
   } else if (isa<UnreachableInst>(BB->getTerminator())) {
     // If there are any instructions immediately before the unreachable that can




From sabre at nondot.org  Sun Jul 13 16:55:47 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 13 Jul 2008 21:55:47 -0000
Subject: [llvm-commits] [llvm] r53531 -
	/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
Message-ID: <200807132155.m6DLtlKw030624@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 16:55:46 2008
New Revision: 53531

URL: http://llvm.org/viewvc/llvm-project?rev=53531&view=rev
Log:
improve comments.

Modified:
    llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp

Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=53531&r1=53530&r2=53531&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Sun Jul 13 16:55:46 2008
@@ -1538,6 +1538,9 @@
       PHINode *NewPN = PHINode::Create(Type::Int1Ty,
                                        BI->getCondition()->getName() + ".pr",
                                        BB->begin());
+      // Okay, we're going to insert the PHI node.  Since PBI is not the only
+      // predecessor, compute the PHI'd conditional value for all of the preds.
+      // Any predecessor where the condition is not computable we keep symbolic.
       for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI)
         if ((PBI = dyn_cast<BranchInst>((*PI)->getTerminator())) &&
             PBI != BI && PBI->isConditional() &&
@@ -1551,7 +1554,6 @@
         }
       
       BI->setCondition(NewPN);
-      // This will thread the branch.
       return true;
     }
   }
@@ -1653,7 +1655,7 @@
       // them agree.
       for (BasicBlock::iterator II = CommonDest->begin();
            (PN = dyn_cast<PHINode>(II)); ++II) {
-        Value * BIV = PN->getIncomingValueForBlock(BB);
+        Value *BIV = PN->getIncomingValueForBlock(BB);
         unsigned PBBIdx = PN->getBasicBlockIndex(PBI->getParent());
         Value *PBIV = PN->getIncomingValue(PBBIdx);
         if (BIV != PBIV) {




From sabre at nondot.org  Sun Jul 13 17:04:41 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 13 Jul 2008 22:04:41 -0000
Subject: [llvm-commits] [llvm] r53532 -
	/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
Message-ID: <200807132204.m6DM4fl6030864@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 17:04:41 2008
New Revision: 53532

URL: http://llvm.org/viewvc/llvm-project?rev=53532&view=rev
Log:
more refactoring.  Use early exits instead of really complex logic.
No functionality change.

Modified:
    llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp

Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=53532&r1=53531&r2=53532&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Sun Jul 13 17:04:41 2008
@@ -1561,121 +1561,110 @@
   // If this is a conditional branch in an empty block, and if any
   // predecessors is a conditional branch to one of our destinations,
   // fold the conditions into logical ops and one cond br.
-  if (&BB->front() == BI) {
-    int PBIOp, BIOp;
-    if (PBI->getSuccessor(0) == BI->getSuccessor(0)) {
-      PBIOp = BIOp = 0;
-    } else if (PBI->getSuccessor(0) == BI->getSuccessor(1)) {
-      PBIOp = 0; BIOp = 1;
-    } else if (PBI->getSuccessor(1) == BI->getSuccessor(0)) {
-      PBIOp = 1; BIOp = 0;
-    } else if (PBI->getSuccessor(1) == BI->getSuccessor(1)) {
-      PBIOp = BIOp = 1;
-    } else {
-      PBIOp = BIOp = -1;
-    }
+  if (&BB->front() != BI)
+    return false;
+  
+  int PBIOp, BIOp;
+  if (PBI->getSuccessor(0) == BI->getSuccessor(0))
+    PBIOp = BIOp = 0;
+  else if (PBI->getSuccessor(0) == BI->getSuccessor(1))
+    PBIOp = 0, BIOp = 1;
+  else if (PBI->getSuccessor(1) == BI->getSuccessor(0))
+    PBIOp = 1, BIOp = 0;
+  else if (PBI->getSuccessor(1) == BI->getSuccessor(1))
+    PBIOp = BIOp = 1;
+  else
+    return false;
     
-    // Check to make sure that the other destination of this branch
-    // isn't BB itself.  If so, this is an infinite loop that will
-    // keep getting unwound.
-    if (PBIOp != -1 && PBI->getSuccessor(PBIOp) == BB)
-      PBIOp = BIOp = -1;
+  // Check to make sure that the other destination of this branch
+  // isn't BB itself.  If so, this is an infinite loop that will
+  // keep getting unwound.
+  if (PBI->getSuccessor(PBIOp) == BB)
+    return false;
     
-    // Do not perform this transformation if it would require 
-    // insertion of a large number of select instructions. For targets
-    // without predication/cmovs, this is a big pessimization.
-    if (PBIOp != -1) {
-      BasicBlock *CommonDest = PBI->getSuccessor(PBIOp);
-      
-      unsigned NumPhis = 0;
-      for (BasicBlock::iterator II = CommonDest->begin();
-           isa<PHINode>(II); ++II, ++NumPhis) {
-        if (NumPhis > 2) {
-          // Disable this xform.
-          PBIOp = -1;
-          break;
-        }
-      }
-    }
+  // Do not perform this transformation if it would require 
+  // insertion of a large number of select instructions. For targets
+  // without predication/cmovs, this is a big pessimization.
+  BasicBlock *CommonDest = PBI->getSuccessor(PBIOp);
+      
+  unsigned NumPhis = 0;
+  for (BasicBlock::iterator II = CommonDest->begin();
+       isa<PHINode>(II); ++II, ++NumPhis)
+    if (NumPhis > 2) // Disable this xform.
+      return false;
     
-    // Finally, if everything is ok, fold the branches to logical ops.
-    if (PBIOp != -1) {
-      BasicBlock *CommonDest = PBI->getSuccessor(PBIOp);
-      BasicBlock *OtherDest  = BI->getSuccessor(BIOp ^ 1);
-      
-      // If OtherDest *is* BB, then this is a basic block with just
-      // a conditional branch in it, where one edge (OtherDesg) goes
-      // back to the block.  We know that the program doesn't get
-      // stuck in the infinite loop, so the condition must be such
-      // that OtherDest isn't branched through. Forward to CommonDest,
-      // and avoid an infinite loop at optimizer time.
-      if (OtherDest == BB)
-        OtherDest = CommonDest;
-      
-      DOUT << "FOLDING BRs:" << *PBI->getParent()
-           << "AND: " << *BI->getParent();
-      
-      DOUT << *PBI->getParent()->getParent();
-      
-      // BI may have other predecessors.  Because of this, we leave
-      // it alone, but modify PBI.
-      
-      // Make sure we get to CommonDest on True&True directions.
-      Value *PBICond = PBI->getCondition();
-      if (PBIOp)
-        PBICond = BinaryOperator::CreateNot(PBICond,
-                                            PBICond->getName()+".not",
-                                            PBI);
-      Value *BICond = BI->getCondition();
-      if (BIOp)
-        BICond = BinaryOperator::CreateNot(BICond,
-                                           BICond->getName()+".not",
-                                           PBI);
-      // Merge the conditions.
-      Value *Cond =
-        BinaryOperator::CreateOr(PBICond, BICond, "brmerge", PBI);
-      
-      // Modify PBI to branch on the new condition to the new dests.
-      PBI->setCondition(Cond);
-      PBI->setSuccessor(0, CommonDest);
-      PBI->setSuccessor(1, OtherDest);
-      
-      // OtherDest may have phi nodes.  If so, add an entry from PBI's
-      // block that are identical to the entries for BI's block.
-      PHINode *PN;
-      for (BasicBlock::iterator II = OtherDest->begin();
-           (PN = dyn_cast<PHINode>(II)); ++II) {
-        Value *V = PN->getIncomingValueForBlock(BB);
-        PN->addIncoming(V, PBI->getParent());
-      }
-      
-      // We know that the CommonDest already had an edge from PBI to
-      // it.  If it has PHIs though, the PHIs may have different
-      // entries for BB and PBI's BB.  If so, insert a select to make
-      // them agree.
-      for (BasicBlock::iterator II = CommonDest->begin();
-           (PN = dyn_cast<PHINode>(II)); ++II) {
-        Value *BIV = PN->getIncomingValueForBlock(BB);
-        unsigned PBBIdx = PN->getBasicBlockIndex(PBI->getParent());
-        Value *PBIV = PN->getIncomingValue(PBBIdx);
-        if (BIV != PBIV) {
-          // Insert a select in PBI to pick the right value.
-          Value *NV = SelectInst::Create(PBICond, PBIV, BIV,
-                                         PBIV->getName()+".mux", PBI);
-          PN->setIncomingValue(PBBIdx, NV);
-        }
-      }
-      
-      DOUT << "INTO: " << *PBI->getParent();
-      
-      DOUT << *PBI->getParent()->getParent();
-      
-      // This basic block is probably dead.  We know it has at least
-      // one fewer predecessor.
-      return true;
+  // Finally, if everything is ok, fold the branches to logical ops.
+  BasicBlock *OtherDest  = BI->getSuccessor(BIOp ^ 1);
+  
+  // If OtherDest *is* BB, then this is a basic block with just
+  // a conditional branch in it, where one edge (OtherDesg) goes
+  // back to the block.  We know that the program doesn't get
+  // stuck in the infinite loop, so the condition must be such
+  // that OtherDest isn't branched through. Forward to CommonDest,
+  // and avoid an infinite loop at optimizer time.
+  if (OtherDest == BB)
+    OtherDest = CommonDest;
+  
+  DOUT << "FOLDING BRs:" << *PBI->getParent()
+       << "AND: " << *BI->getParent();
+  
+  DOUT << *PBI->getParent()->getParent();
+  
+  // BI may have other predecessors.  Because of this, we leave
+  // it alone, but modify PBI.
+  
+  // Make sure we get to CommonDest on True&True directions.
+  Value *PBICond = PBI->getCondition();
+  if (PBIOp)
+    PBICond = BinaryOperator::CreateNot(PBICond,
+                                        PBICond->getName()+".not",
+                                        PBI);
+  Value *BICond = BI->getCondition();
+  if (BIOp)
+    BICond = BinaryOperator::CreateNot(BICond,
+                                       BICond->getName()+".not",
+                                       PBI);
+  // Merge the conditions.
+  Value *Cond = BinaryOperator::CreateOr(PBICond, BICond, "brmerge", PBI);
+  
+  // Modify PBI to branch on the new condition to the new dests.
+  PBI->setCondition(Cond);
+  PBI->setSuccessor(0, CommonDest);
+  PBI->setSuccessor(1, OtherDest);
+  
+  // OtherDest may have phi nodes.  If so, add an entry from PBI's
+  // block that are identical to the entries for BI's block.
+  PHINode *PN;
+  for (BasicBlock::iterator II = OtherDest->begin();
+       (PN = dyn_cast<PHINode>(II)); ++II) {
+    Value *V = PN->getIncomingValueForBlock(BB);
+    PN->addIncoming(V, PBI->getParent());
+  }
+  
+  // We know that the CommonDest already had an edge from PBI to
+  // it.  If it has PHIs though, the PHIs may have different
+  // entries for BB and PBI's BB.  If so, insert a select to make
+  // them agree.
+  for (BasicBlock::iterator II = CommonDest->begin();
+       (PN = dyn_cast<PHINode>(II)); ++II) {
+    Value *BIV = PN->getIncomingValueForBlock(BB);
+    unsigned PBBIdx = PN->getBasicBlockIndex(PBI->getParent());
+    Value *PBIV = PN->getIncomingValue(PBBIdx);
+    if (BIV != PBIV) {
+      // Insert a select in PBI to pick the right value.
+      Value *NV = SelectInst::Create(PBICond, PBIV, BIV,
+                                     PBIV->getName()+".mux", PBI);
+      PN->setIncomingValue(PBBIdx, NV);
     }
   }
-  return false;
+  
+  DOUT << "INTO: " << *PBI->getParent();
+  
+  DOUT << *PBI->getParent()->getParent();
+  
+  // This basic block is probably dead.  We know it has at least
+  // one fewer predecessor.
+  return true;
 }
 
 




From isanbard at gmail.com  Sun Jul 13 17:11:31 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Sun, 13 Jul 2008 15:11:31 -0700
Subject: [llvm-commits] [llvm] r53527 -
	/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
In-Reply-To: <200807132115.m6DLFBWp029372@zion.cs.uiuc.edu>
References: <200807132115.m6DLFBWp029372@zion.cs.uiuc.edu>
Message-ID: <5F58CD56-2EC1-4B07-8002-000934C96100@gmail.com>

On Jul 13, 2008, at 2:15 PM, Chris Lattner wrote:
> Author: lattner
> Date: Sun Jul 13 16:15:11 2008
> New Revision: 53527
>
> URL: http://llvm.org/viewvc/llvm-project?rev=53527&view=rev
> Log:
> simplify logic a bit
>
> Modified:
>    llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
>
> Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=53527&r1=53526&r2=53527&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original)
> +++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Sun Jul 13  
> 16:15:11 2008
> @@ -1473,9 +1473,15 @@
>       PBI->setSuccessor(0, OldFalse);
>       PBI->setSuccessor(1, OldTrue);
>     }
> +
> +    Instruction::BinaryOps Opc = Instruction::Shl; // sentinel.
> +
> +    if (PBI->getSuccessor(0) == TrueDest && FalseDest != BB)
> +      Opc = Instruction::Or;
> +    else if (PBI->getSuccessor(1) == FalseDest && TrueDest != BB)
> +      Opc = Instruction::And;
>
> -    if ((PBI->getSuccessor(0) == TrueDest && FalseDest != BB) ||
> -        (PBI->getSuccessor(1) == FalseDest && TrueDest != BB)) {
> +    if (Opc != Instruction::Shl) {
>       // Clone Cond into the predecessor basic block, and or/and the
>       // two conditions together.
>       Instruction *New = Cond->clone();
> @@ -1483,13 +1489,8 @@
>       New->takeName(Cond);
>       Cond->setName(New->getName()+".old");
>
> -      Value *NewCond;
> -      if (PBI->getSuccessor(0) == TrueDest)
> -        NewCond = BinaryOperator::CreateOr(PBI->getCondition(),  
> New, "or.cond",
> -                                           PBI);
> -      else
> -        NewCond = BinaryOperator::CreateOr(PBI->getCondition(),  
> New, "and.cond",
> -                                           PBI);

Did this also fix a bug where both of these were "CreateOr"? :-)

-bw

>
> +      Value *NewCond = BinaryOperator::Create(Opc, PBI- 
> >getCondition(),
> +                                              New, "or.cond", PBI);
>       PBI->setCondition(NewCond);
>       if (PBI->getSuccessor(0) == BB) {
>         AddPredecessorToBlock(TrueDest, PredBlock, BB);
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From sabre at nondot.org  Sun Jul 13 17:23:11 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 13 Jul 2008 22:23:11 -0000
Subject: [llvm-commits] [llvm] r53533 - in /llvm/trunk:
 lib/Transforms/Utils/SimplifyCFG.cpp
 test/Transforms/SimplifyCFG/2008-07-13-InfLoopMiscompile.ll
Message-ID: <200807132223.m6DMNBq9031455@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 17:23:11 2008
New Revision: 53533

URL: http://llvm.org/viewvc/llvm-project?rev=53533&view=rev
Log:
Fix mishandling of the infinite loop case when merging two blocks.  This
fixes PR2540.

Added:
    llvm/trunk/test/Transforms/SimplifyCFG/2008-07-13-InfLoopMiscompile.ll
Modified:
    llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp

Modified: llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp?rev=53533&r1=53532&r2=53533&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp Sun Jul 13 17:23:11 2008
@@ -68,11 +68,10 @@
          succ_end(ExistPred) && "ExistPred is not a predecessor of Succ!");
   if (!isa<PHINode>(Succ->begin())) return; // Quick exit if nothing to do
   
-  for (BasicBlock::iterator I = Succ->begin(); isa<PHINode>(I); ++I) {
-    PHINode *PN = cast<PHINode>(I);
-    Value *V = PN->getIncomingValueForBlock(ExistPred);
-    PN->addIncoming(V, NewPred);
-  }
+  PHINode *PN;
+  for (BasicBlock::iterator I = Succ->begin();
+       (PN = dyn_cast<PHINode>(I)); ++I)
+    PN->addIncoming(PN->getIncomingValueForBlock(ExistPred), NewPred);
 }
 
 // CanPropagatePredecessorsForPHIs - Return true if we can fold BB, an
@@ -860,7 +859,7 @@
       for (unsigned i = 0, e = NewSI->getNumSuccessors(); i != e; ++i)
         if (NewSI->getSuccessor(i) == BB) {
           if (InfLoopBlock == 0) {
-            // Insert it at the end of the loop, because it's either code,
+            // Insert it at the end of the function, because it's either code,
             // or it won't matter if it's hot. :)
             InfLoopBlock = BasicBlock::Create("infloop", BB->getParent());
             BranchInst::Create(InfLoopBlock, InfLoopBlock);
@@ -1430,11 +1429,11 @@
 /// setcc into the predecessor and use logical operations to pick the right
 /// destination.
 static bool FoldBranchToCommonDest(BranchInst *BI) {
+  BasicBlock *BB = BI->getParent();
   Instruction *Cond = dyn_cast<Instruction>(BI->getCondition());
   if (Cond == 0) return false;
 
-  BasicBlock *BB = BI->getParent();
-
+  
   // Only allow this if the condition is a simple instruction that can be
   // executed unconditionally.  It must be in the same block as the branch, and
   // must be at the front of the block.
@@ -1456,6 +1455,9 @@
   for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) {
     BasicBlock *PredBlock = *PI;
     BranchInst *PBI = dyn_cast<BranchInst>(PredBlock->getTerminator());
+    // Check that we have two conditional branches.  If there is a PHI node in
+    // the common successor, verify that the same value flows in from both
+    // blocks.
     if (PBI == 0 || PBI->isUnconditional() ||
         !SafeToMergeTerminators(BI, PBI))
       continue;
@@ -1596,18 +1598,25 @@
   // Finally, if everything is ok, fold the branches to logical ops.
   BasicBlock *OtherDest  = BI->getSuccessor(BIOp ^ 1);
   
-  // If OtherDest *is* BB, then this is a basic block with just
-  // a conditional branch in it, where one edge (OtherDesg) goes
-  // back to the block.  We know that the program doesn't get
-  // stuck in the infinite loop, so the condition must be such
-  // that OtherDest isn't branched through. Forward to CommonDest,
-  // and avoid an infinite loop at optimizer time.
-  if (OtherDest == BB)
-    OtherDest = CommonDest;
-  
   DOUT << "FOLDING BRs:" << *PBI->getParent()
        << "AND: " << *BI->getParent();
   
+  
+  // If OtherDest *is* BB, then BB is a basic block with a single conditional
+  // branch in it, where one edge (OtherDest) goes back to itself but the other
+  // exits.  We don't *know* that the program avoids the infinite loop
+  // (even though that seems likely).  If we do this xform naively, we'll end up
+  // recursively unpeeling the loop.  Since we know that (after the xform is
+  // done) that the block *is* infinite if reached, we just make it an obviously
+  // infinite loop with no cond branch.
+  if (OtherDest == BB) {
+    // Insert it at the end of the function, because it's either code,
+    // or it won't matter if it's hot. :)
+    BasicBlock *InfLoopBlock = BasicBlock::Create("infloop", BB->getParent());
+    BranchInst::Create(InfLoopBlock, InfLoopBlock);
+    OtherDest = InfLoopBlock;
+  }  
+  
   DOUT << *PBI->getParent()->getParent();
   
   // BI may have other predecessors.  Because of this, we leave

Added: llvm/trunk/test/Transforms/SimplifyCFG/2008-07-13-InfLoopMiscompile.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyCFG/2008-07-13-InfLoopMiscompile.ll?rev=53533&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/SimplifyCFG/2008-07-13-InfLoopMiscompile.ll (added)
+++ llvm/trunk/test/Transforms/SimplifyCFG/2008-07-13-InfLoopMiscompile.ll Sun Jul 13 17:23:11 2008
@@ -0,0 +1,36 @@
+; RUN: llvm-as < %s | opt -simplifycfg | llvm-dis | grep {%outval = phi i32 .*mux}
+; PR2540
+; Outval should end up with a select from 0/2, not all constants.
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i386-pc-linux-gnu"
+ at g_37 = common global i32 0		; <i32*> [#uses=1]
+ at .str = internal constant [4 x i8] c"%d\0A\00"		; <[4 x i8]*> [#uses=1]
+
+define i32 @main() nounwind  {
+entry:
+	%l = load i32* @g_37, align 4		; <i32> [#uses=1]
+	%cmpa = icmp ne i32 %l, 0		; <i1> [#uses=3]
+	br i1 %cmpa, label %func_1.exit, label %mooseblock
+
+mooseblock:		; preds = %entry
+	%cmpb = icmp eq i1 %cmpa, false		; <i1> [#uses=2]
+	br i1 %cmpb, label %monkeyblock, label %beeblock
+
+monkeyblock:		; preds = %monkeyblock, %mooseblock
+	br i1 %cmpb, label %cowblock, label %monkeyblock
+
+beeblock:		; preds = %beeblock, %mooseblock
+	br i1 %cmpa, label %cowblock, label %beeblock
+
+cowblock:		; preds = %beeblock, %monkeyblock
+	%cowval = phi i32 [ 2, %beeblock ], [ 0, %monkeyblock ]		; <i32> [#uses=1]
+	br label %func_1.exit
+
+func_1.exit:		; preds = %cowblock, %entry
+	%outval = phi i32 [ %cowval, %cowblock ], [ 1, %entry ]		; <i32> [#uses=1]
+	%pout = tail call i32 (i8*, ...)* @printf( i8* noalias  getelementptr ([4 x i8]* @.str, i32 0, i32 0), i32 %outval ) nounwind 		; <i32> [#uses=0]
+	ret i32 0
+}
+
+declare i32 @printf(i8*, ...) nounwind 




From clattner at apple.com  Sun Jul 13 17:31:35 2008
From: clattner at apple.com (Chris Lattner)
Date: Sun, 13 Jul 2008 15:31:35 -0700
Subject: [llvm-commits] [llvm] r53527 -
	/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
In-Reply-To: <5F58CD56-2EC1-4B07-8002-000934C96100@gmail.com>
References: <200807132115.m6DLFBWp029372@zion.cs.uiuc.edu>
	<5F58CD56-2EC1-4B07-8002-000934C96100@gmail.com>
Message-ID: <5D300B72-CD13-48F5-B356-E3BD666EB202@apple.com>


On Jul 13, 2008, at 3:11 PM, Bill Wendling wrote:

>>
>> -      Value *NewCond;
>> -      if (PBI->getSuccessor(0) == TrueDest)
>> -        NewCond = BinaryOperator::CreateOr(PBI->getCondition(),
>> New, "or.cond",
>> -                                           PBI);
>> -      else
>> -        NewCond = BinaryOperator::CreateOr(PBI->getCondition(),
>> New, "and.cond",
>> -                                           PBI);
>
> Did this also fix a bug where both of these were "CreateOr"? :-)

Yes.

-Chris


From sabre at nondot.org  Sun Jul 13 19:15:53 2008
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 14 Jul 2008 00:15:53 -0000
Subject: [llvm-commits] [llvm] r53534 - in /llvm/trunk:
 lib/Transforms/Scalar/InstructionCombining.cpp
 test/Transforms/InstCombine/2008-07-13-DivZero.ll
 test/Transforms/InstCombine/udiv_select_to_select_shift.ll
Message-ID: <200807140015.m6E0FroD004171@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 19:15:52 2008
New Revision: 53534

URL: http://llvm.org/viewvc/llvm-project?rev=53534&view=rev
Log:
Fix PR2506 by being a bit more careful about reverse fact propagation when
disproving a condition.  This actually compiles the existing testcase
(udiv_select_to_select_shift) to:

define i64 @test(i64 %X, i1 %Cond) {
entry:
	%divisor1.t = lshr i64 %X, 3		; <i64> [#uses=1]
	%quotient2 = lshr i64 %X, 3		; <i64> [#uses=1]
	%sum = add i64 %divisor1.t, %quotient2		; <i64> [#uses=1]
	ret i64 %sum
}

instead of:

define i64 @test(i64 %X, i1 %Cond) {
entry:
	%quotient1.v = select i1 %Cond, i64 3, i64 4		; <i64> [#uses=1]
	%quotient1 = lshr i64 %X, %quotient1.v		; <i64> [#uses=1]
	%quotient2 = lshr i64 %X, 3		; <i64> [#uses=1]
	%sum = add i64 %quotient1, %quotient2		; <i64> [#uses=1]
	ret i64 %sum
}


Added:
    llvm/trunk/test/Transforms/InstCombine/2008-07-13-DivZero.ll
Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
    llvm/trunk/test/Transforms/InstCombine/udiv_select_to_select_shift.ll

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53534&r1=53533&r2=53534&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Sun Jul 13 19:15:52 2008
@@ -172,6 +172,7 @@
     Instruction *visitURem(BinaryOperator &I);
     Instruction *visitSRem(BinaryOperator &I);
     Instruction *visitFRem(BinaryOperator &I);
+    bool SimplifyDivRemOfSelect(BinaryOperator &I);
     Instruction *commonRemTransforms(BinaryOperator &I);
     Instruction *commonIRemTransforms(BinaryOperator &I);
     Instruction *commonDivTransforms(BinaryOperator &I);
@@ -2566,6 +2567,78 @@
   return Changed ? &I : 0;
 }
 
+/// SimplifyDivRemOfSelect - Try to fold a divide or remainder of a select
+/// instruction.
+bool InstCombiner::SimplifyDivRemOfSelect(BinaryOperator &I) {
+  SelectInst *SI = cast<SelectInst>(I.getOperand(1));
+  
+  // div/rem X, (Cond ? 0 : Y) -> div/rem X, Y
+  int NonNullOperand = -1;
+  if (Constant *ST = dyn_cast<Constant>(SI->getOperand(1)))
+    if (ST->isNullValue())
+      NonNullOperand = 2;
+  // div/rem X, (Cond ? Y : 0) -> div/rem X, Y
+  if (Constant *ST = dyn_cast<Constant>(SI->getOperand(2)))
+    if (ST->isNullValue())
+      NonNullOperand = 1;
+  
+  if (NonNullOperand == -1)
+    return false;
+  
+  Value *SelectCond = SI->getOperand(0);
+  
+  // Change the div/rem to use 'Y' instead of the select.
+  I.setOperand(1, SI->getOperand(NonNullOperand));
+  
+  // Okay, we know we replace the operand of the div/rem with 'Y' with no
+  // problem.  However, the select, or the condition of the select may have
+  // multiple uses.  Based on our knowledge that the operand must be non-zero,
+  // propagate the known value for the select into other uses of it, and
+  // propagate a known value of the condition into its other users.
+  
+  // If the select and condition only have a single use, don't bother with this,
+  // early exit.
+  if (SI->use_empty() && SelectCond->hasOneUse())
+    return true;
+  
+  // Scan the current block backward, looking for other uses of SI.
+  BasicBlock::iterator BBI = &I, BBFront = I.getParent()->begin();
+  
+  while (BBI != BBFront) {
+    --BBI;
+    // If we found a call to a function, we can't assume it will return, so
+    // information from below it cannot be propagated above it.
+    if (isa<CallInst>(BBI) && !isa<IntrinsicInst>(BBI))
+      break;
+    
+    // Replace uses of the select or its condition with the known values.
+    for (Instruction::op_iterator I = BBI->op_begin(), E = BBI->op_end();
+         I != E; ++I) {
+      if (*I == SI) {
+        *I = SI->getOperand(NonNullOperand);
+        AddToWorkList(BBI);
+      } else if (*I == SelectCond) {
+        *I = NonNullOperand == 1 ? ConstantInt::getTrue() :
+                                   ConstantInt::getFalse();
+        AddToWorkList(BBI);
+      }
+    }
+    
+    // If we past the instruction, quit looking for it.
+    if (&*BBI == SI)
+      SI = 0;
+    if (&*BBI == SelectCond)
+      SelectCond = 0;
+    
+    // If we ran out of things to eliminate, break out of the loop.
+    if (SelectCond == 0 && SI == 0)
+      break;
+    
+  }
+  return true;
+}
+
+
 /// This function implements the transforms on div instructions that work
 /// regardless of the kind of div instruction it is (udiv, sdiv, or fdiv). It is
 /// used by the visitors to those instructions.
@@ -2585,40 +2658,6 @@
   if (isa<UndefValue>(Op1))
     return ReplaceInstUsesWith(I, Op1);
 
-  // Handle cases involving: [su]div X, (select Cond, Y, Z)
-  // This does not apply for fdiv.
-  if (SelectInst *SI = dyn_cast<SelectInst>(Op1)) {
-    // [su]div X, (Cond ? 0 : Y) -> div X, Y.  If the div and the select are in
-    // the same basic block, then we replace the select with Y, and the
-    // condition of the select with false (if the cond value is in the same BB).
-    // If the select has uses other than the div, this allows them to be
-    // simplified also. Note that div X, Y is just as good as div X, 0 (undef)
-    if (ConstantInt *ST = dyn_cast<ConstantInt>(SI->getOperand(1)))
-      if (ST->isNullValue()) {
-        Instruction *CondI = dyn_cast<Instruction>(SI->getOperand(0));
-        if (CondI && CondI->getParent() == I.getParent())
-          UpdateValueUsesWith(CondI, ConstantInt::getFalse());
-        else if (I.getParent() != SI->getParent() || SI->hasOneUse())
-          I.setOperand(1, SI->getOperand(2));
-        else
-          UpdateValueUsesWith(SI, SI->getOperand(2));
-        return &I;
-      }
-
-    // Likewise for: [su]div X, (Cond ? Y : 0) -> div X, Y
-    if (ConstantInt *ST = dyn_cast<ConstantInt>(SI->getOperand(2)))
-      if (ST->isNullValue()) {
-        Instruction *CondI = dyn_cast<Instruction>(SI->getOperand(0));
-        if (CondI && CondI->getParent() == I.getParent())
-          UpdateValueUsesWith(CondI, ConstantInt::getTrue());
-        else if (I.getParent() != SI->getParent() || SI->hasOneUse())
-          I.setOperand(1, SI->getOperand(1));
-        else
-          UpdateValueUsesWith(SI, SI->getOperand(1));
-        return &I;
-      }
-  }
-
   return 0;
 }
 
@@ -2643,6 +2682,11 @@
   
   if (Instruction *Common = commonDivTransforms(I))
     return Common;
+  
+  // Handle cases involving: [su]div X, (select Cond, Y, Z)
+  // This does not apply for fdiv.
+  if (isa<SelectInst>(Op1) && SimplifyDivRemOfSelect(I))
+    return &I;
 
   if (ConstantInt *RHS = dyn_cast<ConstantInt>(Op1)) {
     // div X, 1 == X
@@ -2798,36 +2842,8 @@
     return ReplaceInstUsesWith(I, Op1);  // X % undef -> undef
 
   // Handle cases involving: rem X, (select Cond, Y, Z)
-  if (SelectInst *SI = dyn_cast<SelectInst>(Op1)) {
-    // rem X, (Cond ? 0 : Y) -> rem X, Y.  If the rem and the select are in
-    // the same basic block, then we replace the select with Y, and the
-    // condition of the select with false (if the cond value is in the same
-    // BB).  If the select has uses other than the div, this allows them to be
-    // simplified also.
-    if (Constant *ST = dyn_cast<Constant>(SI->getOperand(1)))
-      if (ST->isNullValue()) {
-        Instruction *CondI = dyn_cast<Instruction>(SI->getOperand(0));
-        if (CondI && CondI->getParent() == I.getParent())
-          UpdateValueUsesWith(CondI, ConstantInt::getFalse());
-        else if (I.getParent() != SI->getParent() || SI->hasOneUse())
-          I.setOperand(1, SI->getOperand(2));
-        else
-          UpdateValueUsesWith(SI, SI->getOperand(2));
-        return &I;
-      }
-    // Likewise for: rem X, (Cond ? Y : 0) -> rem X, Y
-    if (Constant *ST = dyn_cast<Constant>(SI->getOperand(2)))
-      if (ST->isNullValue()) {
-        Instruction *CondI = dyn_cast<Instruction>(SI->getOperand(0));
-        if (CondI && CondI->getParent() == I.getParent())
-          UpdateValueUsesWith(CondI, ConstantInt::getTrue());
-        else if (I.getParent() != SI->getParent() || SI->hasOneUse())
-          I.setOperand(1, SI->getOperand(1));
-        else
-          UpdateValueUsesWith(SI, SI->getOperand(1));
-        return &I;
-      }
-  }
+  if (isa<SelectInst>(Op1) && SimplifyDivRemOfSelect(I))
+    return &I;
 
   return 0;
 }

Added: llvm/trunk/test/Transforms/InstCombine/2008-07-13-DivZero.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-07-13-DivZero.ll?rev=53534&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2008-07-13-DivZero.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/2008-07-13-DivZero.ll Sun Jul 13 19:15:52 2008
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {lshr.*3}
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {call .*%cond}
+; PR2506
+
+; We can simplify the operand of udiv to '8', but not the operand to the
+; call.  If the callee never returns, we can't assume the div is reachable.
+define i32 @a(i32 %x, i32 %y) {
+entry:
+        %tobool = icmp ne i32 %y, 0             ; <i1> [#uses=1]
+        %cond = select i1 %tobool, i32 8, i32 0         ; <i32> [#uses=2]
+        %call = call i32 @b( i32 %cond )                ; <i32> [#uses=0]
+        %div = udiv i32 %x, %cond               ; <i32> [#uses=1]
+        ret i32 %div
+}
+
+declare i32 @b(i32)

Modified: llvm/trunk/test/Transforms/InstCombine/udiv_select_to_select_shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/udiv_select_to_select_shift.ll?rev=53534&r1=53533&r2=53534&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/udiv_select_to_select_shift.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/udiv_select_to_select_shift.ll Sun Jul 13 19:15:52 2008
@@ -2,13 +2,13 @@
 ; udiv X, (Select Cond, C1, C2) --> Select Cond, (shr X, C1), (shr X, C2)
 ;
 ; RUN: llvm-as < %s | opt -instcombine | llvm-dis -f -o %t
-; RUN:   grep select %t | count 1
+; RUN:   not grep select %t
 ; RUN:   grep lshr %t | count 2
-; RUN:   ignore grep udiv %t | count 0
+; RUN:   not grep udiv %t
 
 define i64 @test(i64 %X, i1 %Cond ) {
 entry:
-        %divisor1 = select i1 %Cond, i64 8, i64 16
+        %divisor1 = select i1 %Cond, i64 16, i64 8
         %quotient1 = udiv i64 %X, %divisor1
         %divisor2 = select i1 %Cond, i64 8, i64 0
         %quotient2 = udiv i64 %X, %divisor2




From sabre at nondot.org  Sun Jul 13 19:19:59 2008
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 14 Jul 2008 00:19:59 -0000
Subject: [llvm-commits] [llvm] r53535 - /llvm/trunk/lib/Target/README.txt
Message-ID: <200807140019.m6E0Jxr3004295@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 19:19:59 2008
New Revision: 53535

URL: http://llvm.org/viewvc/llvm-project?rev=53535&view=rev
Log:
Add a note.

Modified:
    llvm/trunk/lib/Target/README.txt

Modified: llvm/trunk/lib/Target/README.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=53535&r1=53534&r2=53535&view=diff

==============================================================================
--- llvm/trunk/lib/Target/README.txt (original)
+++ llvm/trunk/lib/Target/README.txt Sun Jul 13 19:19:59 2008
@@ -784,3 +784,15 @@
 }
 
 //===---------------------------------------------------------------------===//
+
+Reassociate should turn things like:
+
+int factorial(int X) {
+ return X*X*X*X*X*X*X*X;
+}
+
+into llvm.powi calls, allowing the code generator to produce balanced
+multiplication trees.
+
+//===---------------------------------------------------------------------===//
+




From sabre at nondot.org  Sun Jul 13 19:27:31 2008
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 14 Jul 2008 00:27:31 -0000
Subject: [llvm-commits] [llvm] r53536 -
	/llvm/trunk/include/llvm/Transforms/Utils/InlineCost.h
Message-ID: <200807140027.m6E0RVGA004520@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 19:27:31 2008
New Revision: 53536

URL: http://llvm.org/viewvc/llvm-project?rev=53536&view=rev
Log:
doxygenate comments and wrap to 80 cols.

Modified:
    llvm/trunk/include/llvm/Transforms/Utils/InlineCost.h

Modified: llvm/trunk/include/llvm/Transforms/Utils/InlineCost.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Utils/InlineCost.h?rev=53536&r1=53535&r2=53536&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Transforms/Utils/InlineCost.h (original)
+++ llvm/trunk/include/llvm/Transforms/Utils/InlineCost.h Sun Jul 13 19:27:31 2008
@@ -38,35 +38,36 @@
     // FunctionInfo - For each function, calculate the size of it in blocks and
     // instructions.
     struct FunctionInfo {
-      // NumInsts, NumBlocks - Keep track of how large each function is, which is
-      // used to estimate the code size cost of inlining it.
+      /// NumInsts, NumBlocks - Keep track of how large each function is, which
+      /// is used to estimate the code size cost of inlining it.
       unsigned NumInsts, NumBlocks;
 
-      // NumVectorInsts - Keep track how many instrctions produce vector values.
-      // The inliner is being more aggressive with inlining vector kernels.
+      /// NumVectorInsts - Keep track how many instrctions produce vector
+      /// values.  The inliner is being more aggressive with inlining vector
+      /// kernels.
       unsigned NumVectorInsts;
       
-      // ArgumentWeights - Each formal argument of the function is inspected to
-      // see if it is used in any contexts where making it a constant or alloca
-      // would reduce the code size.  If so, we add some value to the argument
-      // entry here.
+      /// ArgumentWeights - Each formal argument of the function is inspected to
+      /// see if it is used in any contexts where making it a constant or alloca
+      /// would reduce the code size.  If so, we add some value to the argument
+      /// entry here.
       std::vector<ArgInfo> ArgumentWeights;
       
       FunctionInfo() : NumInsts(0), NumBlocks(0), NumVectorInsts(0) {}
       
-      /// analyzeFunction - Fill in the current structure with information gleaned
-      /// from the specified function.
+      /// analyzeFunction - Fill in the current structure with information
+      /// gleaned from the specified function.
       void analyzeFunction(Function *F);
 
-      // CountCodeReductionForConstant - Figure out an approximation for how many
-      // instructions will be constant folded if the specified value is constant.
-      //
+      /// CountCodeReductionForConstant - Figure out an approximation for how
+      /// many instructions will be constant folded if the specified value is
+      /// constant.
       unsigned CountCodeReductionForConstant(Value *V);
       
-      // CountCodeReductionForAlloca - Figure out an approximation of how much smaller
-      // the function will be if it is inlined into a context where an argument
-      // becomes an alloca.
-      //
+      /// CountCodeReductionForAlloca - Figure out an approximation of how much
+      /// smaller the function will be if it is inlined into a context where an
+      /// argument becomes an alloca.
+      ///
       unsigned CountCodeReductionForAlloca(Value *V);
     };
 
@@ -74,14 +75,14 @@
 
   public:
 
-    // getInlineCost - The heuristic used to determine if we should inline the
-    // function call or not.
-    //
+    /// getInlineCost - The heuristic used to determine if we should inline the
+    /// function call or not.
+    ///
     int getInlineCost(CallSite CS,
                       SmallPtrSet<const Function *, 16> &NeverInline);
 
-    // getInlineFudgeFactor - Return a > 1.0 factor if the inliner should use a
-    // higher threshold to determine if the function call should be inlined.
+    /// getInlineFudgeFactor - Return a > 1.0 factor if the inliner should use a
+    /// higher threshold to determine if the function call should be inlined.
     float getInlineFudgeFactor(CallSite CS);
   };
 }




From sabre at nondot.org  Sun Jul 13 19:28:46 2008
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 14 Jul 2008 00:28:46 -0000
Subject: [llvm-commits] [llvm] r53537 -
	/llvm/trunk/include/llvm/Transforms/Utils/InlineCost.h
Message-ID: <200807140028.m6E0SkeO004571@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 19:28:45 2008
New Revision: 53537

URL: http://llvm.org/viewvc/llvm-project?rev=53537&view=rev
Log:
whitespace fix.

Modified:
    llvm/trunk/include/llvm/Transforms/Utils/InlineCost.h

Modified: llvm/trunk/include/llvm/Transforms/Utils/InlineCost.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Utils/InlineCost.h?rev=53537&r1=53536&r2=53537&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Transforms/Utils/InlineCost.h (original)
+++ llvm/trunk/include/llvm/Transforms/Utils/InlineCost.h Sun Jul 13 19:28:45 2008
@@ -71,7 +71,7 @@
       unsigned CountCodeReductionForAlloca(Value *V);
     };
 
-    std::map<const Function *, FunctionInfo>CachedFunctionInfo;
+    std::map<const Function *, FunctionInfo> CachedFunctionInfo;
 
   public:
 




From sabre at nondot.org  Sun Jul 13 19:32:20 2008
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 14 Jul 2008 00:32:20 -0000
Subject: [llvm-commits] [llvm] r53538 -
	/llvm/trunk/lib/Transforms/Utils/InlineCost.cpp
Message-ID: <200807140032.m6E0WKID004682@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 19:32:20 2008
New Revision: 53538

URL: http://llvm.org/viewvc/llvm-project?rev=53538&view=rev
Log:
simplify some code, shuffle and insertelt always return a vector.

Modified:
    llvm/trunk/lib/Transforms/Utils/InlineCost.cpp

Modified: llvm/trunk/lib/Transforms/Utils/InlineCost.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineCost.cpp?rev=53538&r1=53537&r2=53538&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Utils/InlineCost.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/InlineCost.cpp Sun Jul 13 19:32:20 2008
@@ -103,8 +103,7 @@
       if (isa<DbgInfoIntrinsic>(II)) continue;  // Debug intrinsics don't count.
       if (isa<PHINode>(II)) continue;           // PHI nodes don't count.
 
-      if (isa<InsertElementInst>(II) || isa<ExtractElementInst>(II) ||
-          isa<ShuffleVectorInst>(II) || isa<VectorType>(II->getType()))
+      if (isa<ExtractElementInst>(II) || isa<VectorType>(II->getType()))
         ++NumVectorInsts; 
       
       // Noop casts, including ptr <-> int,  don't count.




From sabre at nondot.org  Sun Jul 13 19:46:17 2008
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 14 Jul 2008 00:46:17 -0000
Subject: [llvm-commits] [test-suite] r53539 -
 /test-suite/trunk/SingleSource/UnitTests/2008-07-13-InlineSetjmp.c
Message-ID: <200807140046.m6E0kHn0005087@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 19:46:16 2008
New Revision: 53539

URL: http://llvm.org/viewvc/llvm-project?rev=53539&view=rev
Log:
new testcase for PR2486

Added:
    test-suite/trunk/SingleSource/UnitTests/2008-07-13-InlineSetjmp.c

Added: test-suite/trunk/SingleSource/UnitTests/2008-07-13-InlineSetjmp.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/2008-07-13-InlineSetjmp.c?rev=53539&view=auto

==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/2008-07-13-InlineSetjmp.c (added)
+++ test-suite/trunk/SingleSource/UnitTests/2008-07-13-InlineSetjmp.c Sun Jul 13 19:46:16 2008
@@ -0,0 +1,9 @@
+// PR2486
+
+#include <setjmp.h>      
+#include <stdio.h>
+jmp_buf g;
+static int a() {longjmp(g,1);}
+static void b(int* x) {if (setjmp(g))return;*x = 10;a();}
+int main() {int a = 1; b(&a); printf("%d\n", a); return 0;}
+




From sabre at nondot.org  Sun Jul 13 19:46:57 2008
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 14 Jul 2008 00:46:57 -0000
Subject: [llvm-commits] [llvm] r53540 -
	/llvm/trunk/lib/Transforms/Utils/InlineCost.cpp
Message-ID: <200807140046.m6E0kvsY005114@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Jul 13 19:46:56 2008
New Revision: 53540

URL: http://llvm.org/viewvc/llvm-project?rev=53540&view=rev
Log:
If a function calls setjmp, never inline it into other functions.  This is
a hack around the fact that we don't represent the CFG correctly for sj/lj.
It fixes PR2486.

Modified:
    llvm/trunk/lib/Transforms/Utils/InlineCost.cpp

Modified: llvm/trunk/lib/Transforms/Utils/InlineCost.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineCost.cpp?rev=53540&r1=53539&r2=53540&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Utils/InlineCost.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/InlineCost.cpp Sun Jul 13 19:46:56 2008
@@ -100,9 +100,27 @@
   for (Function::const_iterator BB = F->begin(), E = F->end(); BB != E; ++BB) {
     for (BasicBlock::const_iterator II = BB->begin(), E = BB->end();
          II != E; ++II) {
-      if (isa<DbgInfoIntrinsic>(II)) continue;  // Debug intrinsics don't count.
       if (isa<PHINode>(II)) continue;           // PHI nodes don't count.
 
+      // Special handling for calls.
+      if (isa<CallInst>(II) || isa<InvokeInst>(II)) {
+        if (isa<DbgInfoIntrinsic>(II))
+          continue;  // Debug intrinsics don't count as size.
+        
+        CallSite CS = CallSite::get(const_cast<Instruction*>(&*II));
+        
+        // If this function contains a call to setjmp or _setjmp, never inline
+        // it.  This is a hack because we depend on the user marking their local
+        // variables as volatile if they are live across a setjmp call, and they
+        // probably won't do this in callers.
+        if (Function *F = CS.getCalledFunction())
+          if (F->isDeclaration() && 
+              (F->isName("setjmp") || F->isName("_setjmp"))) {
+            NeverInline = true;
+            return;
+          }
+      }
+      
       if (isa<ExtractElementInst>(II) || isa<VectorType>(II->getType()))
         ++NumVectorInsts; 
       
@@ -194,6 +212,10 @@
   // If we haven't calculated this information yet, do so now.
   if (CalleeFI.NumBlocks == 0)
     CalleeFI.analyzeFunction(Callee);
+  
+  // If we should never inline this, return a huge cost.
+  if (CalleeFI.NeverInline)
+    return 2000000000;
     
   // Add to the inline quality for properties that make the call valuable to
   // inline.  This includes factors that indicate that the result of inlining