From ggreif at gmail.com Mon Oct 13 04:38:09 2008
From: ggreif at gmail.com (Gabor Greif)
Date: Mon, 13 Oct 2008 09:38:09 -0000
Subject: [llvm-commits] [llvm] r57432 - /llvm/trunk/tools/llvmc2/driver/
Message-ID: <200810130938.m9D9c9D6002244@zion.cs.uiuc.edu>
Author: ggreif
Date: Mon Oct 13 04:38:08 2008
New Revision: 57432
URL: http://llvm.org/viewvc/llvm-project?rev=57432&view=rev
Log:
ignore the standard output dirs
Modified:
llvm/trunk/tools/llvmc2/driver/ (props changed)
Propchange: llvm/trunk/tools/llvmc2/driver/
------------------------------------------------------------------------------
--- svn:ignore (added)
+++ svn:ignore Mon Oct 13 04:38:08 2008
@@ -0,0 +1,3 @@
+Debug
+Release
+Release-Asserts
From ggreif at gmail.com Mon Oct 13 05:21:17 2008
From: ggreif at gmail.com (Gabor Greif)
Date: Mon, 13 Oct 2008 10:21:17 -0000
Subject: [llvm-commits] [llvm] r57433 -
/llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp
Message-ID: <200810131021.m9DALHIn003702@zion.cs.uiuc.edu>
Author: ggreif
Date: Mon Oct 13 05:21:17 2008
New Revision: 57433
URL: http://llvm.org/viewvc/llvm-project?rev=57433&view=rev
Log:
do not use deprecated interfaces
Modified:
llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp
Modified: llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp?rev=57433&r1=57432&r2=57433&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp Mon Oct 13 05:21:17 2008
@@ -242,17 +242,17 @@
Value *SCEVExpander::visitTruncateExpr(SCEVTruncateExpr *S) {
Value *V = expand(S->getOperand());
- return CastInst::createTruncOrBitCast(V, S->getType(), "tmp.", InsertPt);
+ return CastInst::CreateTruncOrBitCast(V, S->getType(), "tmp.", InsertPt);
}
Value *SCEVExpander::visitZeroExtendExpr(SCEVZeroExtendExpr *S) {
Value *V = expand(S->getOperand());
- return CastInst::createZExtOrBitCast(V, S->getType(), "tmp.", InsertPt);
+ return CastInst::CreateZExtOrBitCast(V, S->getType(), "tmp.", InsertPt);
}
Value *SCEVExpander::visitSignExtendExpr(SCEVSignExtendExpr *S) {
Value *V = expand(S->getOperand());
- return CastInst::createSExtOrBitCast(V, S->getType(), "tmp.", InsertPt);
+ return CastInst::CreateSExtOrBitCast(V, S->getType(), "tmp.", InsertPt);
}
Value *SCEVExpander::visitSMaxExpr(SCEVSMaxExpr *S) {
From ggreif at gmail.com Mon Oct 13 05:25:29 2008
From: ggreif at gmail.com (Gabor Greif)
Date: Mon, 13 Oct 2008 10:25:29 -0000
Subject: [llvm-commits] [llvm] r57434 - in /llvm/trunk/include/llvm: Use.h
Value.h
Message-ID: <200810131025.m9DAPT64003898@zion.cs.uiuc.edu>
Author: ggreif
Date: Mon Oct 13 05:25:27 2008
New Revision: 57434
URL: http://llvm.org/viewvc/llvm-project?rev=57434&view=rev
Log:
remove a deprecated internal interface
Modified:
llvm/trunk/include/llvm/Use.h
llvm/trunk/include/llvm/Value.h
Modified: llvm/trunk/include/llvm/Use.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Use.h?rev=57434&r1=57433&r2=57434&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Use.h (original)
+++ llvm/trunk/include/llvm/Use.h Mon Oct 13 05:25:27 2008
@@ -66,10 +66,6 @@
// Use is here to make keeping the "use" list of a Value up-to-date really easy.
//
class Use {
-private:
- /// init - specify Value and User
- /// @deprecated in 2.4, will be removed soon
- inline void init(Value *V, User *U);
public:
/// swap - provide a fast substitute to std::swap
-...
+[NICOLAS]
@@ -244,12 +245,11 @@
operations (shl, ashr, lshr) now all support vectors
and do an element-by-element shift (shifts of the whole vector can be
accomplished by bitcasting the vector to <1 x i128> for example). Second,
-there is support in development for vector comparisons. LLVM 2.4 actually
-supports two ways to do vector comparisons: the vicmp/vfcmp instructions and the
-icmp/fcmp instructions. The vicmp/vfcmp instructions are temporary and will be
-removed (do not use them). The icmp/fcmp instructions compare two vectors and
-return a vector of i1's for each result. Note that there is very little codegen
-support available for any of these IR features though.
+there is initial support in development for vector comparisons with the
+fcmp/icmp
+instructions. These instructions compare two vectors and return a vector of
+i1's for each result. Note that there is very little codegen support available
+for any of these IR features though.
A new DebugInfoBuilder class is available, which makes it much
easier for front-ends to create debug info descriptors, similar to the way that
From daniel at zuster.org Mon Oct 13 22:56:58 2008
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 14 Oct 2008 03:56:58 -0000
Subject: [llvm-commits] [llvm] r57473 - in /llvm/trunk/tools/llvmc2: core/
src/
Message-ID: <200810140356.m9E3uxgZ011717@zion.cs.uiuc.edu>
Author: ddunbar
Date: Mon Oct 13 22:56:55 2008
New Revision: 57473
URL: http://llvm.org/viewvc/llvm-project?rev=57473&view=rev
Log:
Remove stale src, core directories.
Removed:
llvm/trunk/tools/llvmc2/core/
llvm/trunk/tools/llvmc2/src/
From daniel at zuster.org Tue Oct 14 00:10:06 2008
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 14 Oct 2008 05:10:06 -0000
Subject: [llvm-commits] [test-suite] r57474 - in /test-suite/trunk:
MultiSource/Applications/lua/ SingleSource/Benchmarks/BenchmarkGame/
Message-ID: <200810140510.m9E5A6f9014159@zion.cs.uiuc.edu>
Author: ddunbar
Date: Tue Oct 14 00:10:04 2008
New Revision: 57474
URL: http://llvm.org/viewvc/llvm-project?rev=57474&view=rev
Log:
Set svn:ignore on some Output directories.
Modified:
test-suite/trunk/MultiSource/Applications/lua/ (props changed)
test-suite/trunk/SingleSource/Benchmarks/BenchmarkGame/ (props changed)
Propchange: test-suite/trunk/MultiSource/Applications/lua/
------------------------------------------------------------------------------
--- svn:ignore (added)
+++ svn:ignore Tue Oct 14 00:10:04 2008
@@ -0,0 +1 @@
+Output
Propchange: test-suite/trunk/SingleSource/Benchmarks/BenchmarkGame/
------------------------------------------------------------------------------
--- svn:ignore (added)
+++ svn:ignore Tue Oct 14 00:10:04 2008
@@ -0,0 +1 @@
+Output
From kremenek at apple.com Tue Oct 14 00:14:22 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Tue, 14 Oct 2008 05:14:22 -0000
Subject: [llvm-commits] [llvm] r57475 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <200810140514.m9E5EMeI014302@zion.cs.uiuc.edu>
Author: kremenek
Date: Tue Oct 14 00:14:21 2008
New Revision: 57475
URL: http://llvm.org/viewvc/llvm-project?rev=57475&view=rev
Log:
Add static analyzer notes.
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=57475&r1=57474&r2=57475&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Oct 14 00:14:21 2008
@@ -109,11 +109,29 @@
-
The
-static analysis tool
-
-[TED]
-.
+
The Clang project also includes an early stage static source code analysis
+tool for automatically
+finding bugs in C and Objective-C programs. The tool performs a growing set
+of checks to find bugs that occur on a specific path within a program. Examples
+of bugs the tool finds include logic errors such as null dereferences,
+violations of various API rules, dead code, and potential memory leaks in
+Objective-C programs. Since its public announcement at Apple's WWDC 2008
+conference, the public feedback on the tool has been extremely positive, and
+conservative estimates put the number of real bugs it has found in
+industrial-quality software on the order of thousands.
+
+
The tool also provides a simple web GUI to inspect potential bugs found by
+the tool. While still early in development, the GUI illustrates some of the key
+features of Clang: accurate source location information, which is used by the
+GUI to highlight specific code expressions that relate to a bug (including those
+that span multiple lines) and built-in knowledge of macros, which is used to
+perform inline expansion of macros within the GUI itself.
+
+
The set of checks perform by the static analyzer is gradually expanding, and
+future plans for the tool include full source-level inter-procedural analysis
+and deeper checks such as buffer overrun detection. There are many opportunities
+to extend and enhance the static analyzer, and anyone interested in working on
+this project is encouraged to get involved!
From gohman at apple.com Tue Oct 14 10:14:56 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 14 Oct 2008 15:14:56 -0000
Subject: [llvm-commits] [llvm] r57490 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <200810141514.m9EFEuSk012950@zion.cs.uiuc.edu>
Author: djg
Date: Tue Oct 14 10:14:55 2008
New Revision: 57490
URL: http://llvm.org/viewvc/llvm-project?rev=57490&view=rev
Log:
Add a brief mention of the new free-list management code.
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=57490&r1=57489&r2=57490&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Oct 14 10:14:55 2008
@@ -432,13 +432,13 @@
build your own tools based on it.
LLVM 2.4 includes a number of new generic algorithms and data structures,
- include a scoped hash table, 'immutable' data structures, and a
- raw_ostream class. The raw_ostream class and
+ include a scoped hash table, 'immutable' data structures, a simple
+ free-list manager, and a raw_ostream class.
+ The raw_ostream class and
format allow for efficient file output, and various pieces of LLVM
have switched over to use it. The eventual goal is to eliminate
std::ostream in favor of it.
-Recycler + pool allocation stuff? [DAN]
From criswell at uiuc.edu Tue Oct 14 10:34:28 2008
From: criswell at uiuc.edu (John Criswell)
Date: Tue, 14 Oct 2008 15:34:28 -0000
Subject: [llvm-commits] [poolalloc] r57493 -
/poolalloc/trunk/include/dsa/DataStructure.h
Message-ID: <200810141534.m9EFYS2m013627@zion.cs.uiuc.edu>
Author: criswell
Date: Tue Oct 14 10:34:28 2008
New Revision: 57493
URL: http://llvm.org/viewvc/llvm-project?rev=57493&view=rev
Log:
Mark CBU as preserving all previous analysis passes, too.
It shouldn't be changing anything.
Modified:
poolalloc/trunk/include/dsa/DataStructure.h
Modified: poolalloc/trunk/include/dsa/DataStructure.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DataStructure.h?rev=57493&r1=57492&r2=57493&view=diff
==============================================================================
--- poolalloc/trunk/include/dsa/DataStructure.h (original)
+++ poolalloc/trunk/include/dsa/DataStructure.h Tue Oct 14 10:34:28 2008
@@ -332,6 +332,7 @@
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired();
+ AU.setPreservesAll();
}
};
From alenhar2 at cs.uiuc.edu Tue Oct 14 11:11:33 2008
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Tue, 14 Oct 2008 16:11:33 -0000
Subject: [llvm-commits] [poolalloc] r57494 - in
/poolalloc/trunk/include/poolalloc_runtime: ./ PoolAllocator.h Support/
Support/SplayTree.h test.ex
Message-ID: <200810141611.m9EGBYBG014999@zion.cs.uiuc.edu>
Author: alenhar2
Date: Tue Oct 14 11:11:31 2008
New Revision: 57494
URL: http://llvm.org/viewvc/llvm-project?rev=57494&view=rev
Log:
some common infastructure for safecode runtimes
Added:
poolalloc/trunk/include/poolalloc_runtime/
poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h
poolalloc/trunk/include/poolalloc_runtime/Support/
poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h
poolalloc/trunk/include/poolalloc_runtime/test.ex
Added: poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h?rev=57494&view=auto
==============================================================================
--- poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h (added)
+++ poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h Tue Oct 14 11:11:31 2008
@@ -0,0 +1,75 @@
+#include "poolalloc_runtime/Support/SplayTree.h"
+#include
+
+template class SlabManager >
+class PoolAllocator : SlabManager {
+ using SlabManager::slab_alloc;
+ using SlabManager::slab_free;
+ using SlabManager::slab_valid;
+ using SlabManager::slab_getbounds;
+ public:
+ PoolAllocator(unsigned objsize, unsigned Alignment)
+ : SlabManager(objsize, Alignment)
+ {}
+
+
+ //In-place new operator
+ static void* operator new( std::size_t s, void* p ) throw() {
+ return p;
+ }
+
+ //Allocate an object of size objsize
+ void* alloc() {
+ return slab_alloc(1);
+ }
+
+ //Allocate an array with num objects of size objsize
+ void* alloc_array(unsigned num) {
+ return slab_alloc(num);
+ }
+
+ //Free allocated object
+ void dealloc(void* obj) {
+ slab_free(obj);
+ }
+
+ //Tests if obj is in an allocated object
+ bool isAllocated(void* obj) {
+ return slab_valid(obj);
+ }
+
+ // Returns the start and end of an object, return value is true if found
+ bool getBounds(void* obj, void*& start, void*& end) {
+ return slab_getbounds(obj, start, end);
+ }
+
+};
+
+class mmapPageManager {
+ enum { pageSize = 4096 };
+};
+
+template
+class MallocSlabManager {
+ SplayRangeSet objs;
+ unsigned objsize;
+ protected:
+ MallocSlabManager(unsigned Osize, unsigned Alignment) : objsize(Osize) {}
+
+ void* slab_alloc(unsigned num) {
+ void* x = malloc(num*objsize);
+ objs.insert(x, (char*)x + num*objsize - 1);
+ return x;
+ }
+ void slab_free(void* obj) {
+ objs.remove(obj);
+ free(obj);
+ }
+ bool slab_valid(void* obj) {
+ return objs.find(obj);
+ }
+ void* slab_getbounds(void* obj, void*& start, void*& end) {
+ return objs.find(obj, start, end);
+ }
+
+};
Added: poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h?rev=57494&view=auto
==============================================================================
--- poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h (added)
+++ poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h Tue Oct 14 11:11:31 2008
@@ -0,0 +1,155 @@
+
+class SplayRangeSet {
+ struct tree_node {
+ tree_node* left;
+ tree_node* right;
+ void* start;
+ void* end;
+ };
+
+ tree_node* Tree;
+
+ tree_node* rotate_right(tree_node* p) {
+ tree_node* x = p->left;
+ p->left = x->right;
+ x->right = p;
+ return x;
+ }
+
+ tree_node* rotate_left(tree_node* p) {
+ tree_node* x = p->right;
+ p->right = x->left;
+ x->left = p;
+ return x;
+ }
+
+ bool key_lt(void* _key, tree_node* _t) { return _key < _t->start; };
+
+ bool key_gt(void* _key, tree_node* _t) { return _key > _t->end; };
+
+ /* This function by D. Sleator */
+ tree_node* splay (tree_node * t, void* key) {
+ tree_node N, *l, *r, *y;
+ if (t == 0) return t;
+ N.left = N.right = 0;
+ l = r = &N;
+
+ while(1) {
+ if (key_lt(key, t)) {
+ if (t->left == 0) break;
+ if (key_lt(key, t->left)) {
+ y = t->left; /* rotate right */
+ t->left = y->right;
+ y->right = t;
+ t = y;
+ if (t->left == 0) break;
+ }
+ r->left = t; /* link right */
+ r = t;
+ t = t->left;
+ } else if (key_gt(key, t)) {
+ if (t->right == 0) break;
+ if (key_gt(key, t->right)) {
+ y = t->right; /* rotate left */
+ t->right = y->left;
+ y->left = t;
+ t = y;
+ if (t->right == 0) break;
+ }
+ l->right = t; /* link left */
+ l = t;
+ t = t->right;
+ } else {
+ break;
+ }
+ }
+ l->right = t->left; /* assemble */
+ r->left = t->right;
+ t->left = N.right;
+ t->right = N.left;
+ return t;
+ }
+
+ unsigned count_internal(tree_node* t) {
+ if (t)
+ return 1 + count_internal(t->left) + count_internal(t->right);
+ return 0;
+ }
+
+ public:
+
+ SplayRangeSet() : Tree(0) {}
+ ~SplayRangeSet() { clear(); }
+
+ bool insert(void* start, void* end) {
+ Tree = splay(Tree, start);
+ //If the key is already in, fail the insert
+ if (Tree && !key_lt(start, Tree) && !key_gt(start, Tree))
+ return false;
+
+ tree_node* n = new tree_node();
+ n->start = start;
+ n->end = end;
+ n->right = n->left = 0;
+ if (Tree) {
+ if (key_lt(start, Tree)) {
+ n->left = Tree->left;
+ n->right = Tree;
+ Tree->left = 0;
+ } else {
+ n->right = Tree->right;
+ n->left = Tree;
+ Tree->right = 0;
+ }
+ }
+ Tree = n;
+ }
+
+ bool remove(void* key) {
+ if (!Tree) return false;
+ Tree = splay(Tree, key);
+ if (!key_lt(key, Tree) && !key_gt(key, Tree)) {
+ tree_node* x = 0;
+ if (!Tree->left)
+ x = Tree->right;
+ else {
+ x = splay(Tree->left, key);
+ x->right = Tree->right;
+ }
+ tree_node* y = Tree;
+ Tree = x;
+ delete y;
+ return true;
+ }
+ return false; /* not there */
+ }
+
+ unsigned count() {
+ return count_internal(Tree);
+ }
+
+ void clear() {
+ while (Tree)
+ remove (Tree->start);
+ }
+
+ bool find(void* key, void*& start, void*& end) {
+ if (!Tree) return false;
+ Tree = splay(Tree, key);
+ if (!key_lt(key, Tree) && !key_gt(key, Tree)) {
+ start = Tree->start;
+ end = Tree->end;
+ return true;
+ }
+ return false;
+ }
+ bool find(void* key) {
+ if (!Tree) return false;
+ Tree = splay(Tree, key);
+ if (!key_lt(key, Tree) && !key_gt(key, Tree)) {
+ return true;
+ }
+ return false;
+ }
+
+};
Added: poolalloc/trunk/include/poolalloc_runtime/test.ex
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc_runtime/test.ex?rev=57494&view=auto
==============================================================================
--- poolalloc/trunk/include/poolalloc_runtime/test.ex (added)
+++ poolalloc/trunk/include/poolalloc_runtime/test.ex Tue Oct 14 11:11:31 2008
@@ -0,0 +1,13 @@
+#include "PoolAllocator.h"
+#include
+
+PoolAllocator a(10, 16);
+
+int main() {
+ void* x = a.alloc();
+ std::cerr << a.isAllocated(x) << " " << a.isAllocated((char*)x + 5) << " " << a.isAllocated((char*)x + 10) << "\n";
+ a.dealloc(x);
+ return 0;
+}
+
+
From gohman at apple.com Tue Oct 14 11:13:59 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 14 Oct 2008 16:13:59 -0000
Subject: [llvm-commits] [llvm] r57495 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <200810141613.m9EGDxtB015106@zion.cs.uiuc.edu>
Author: djg
Date: Tue Oct 14 11:13:59 2008
New Revision: 57495
URL: http://llvm.org/viewvc/llvm-project?rev=57495&view=rev
Log:
Fix a typo.
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=57495&r1=57494&r2=57495&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Oct 14 11:13:59 2008
@@ -274,7 +274,7 @@
easier for front-ends to create debug info descriptors, similar to the way that
IRBuilder makes it easier to create LLVM IR.
-The IRBuilder class is now parametrized by a class responsible
+The IRBuilder class is now parameterized by a class responsible
for constant folding. The default ConstantFolder class does target independent
constant folding. The NoFolder class does no constant folding at all, which is
useful when learning how LLVM works. The TargetFolder class folds the most,
From gohman at apple.com Tue Oct 14 11:23:02 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 14 Oct 2008 16:23:02 -0000
Subject: [llvm-commits] [llvm] r57496 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <200810141623.m9EGN2sr015511@zion.cs.uiuc.edu>
Author: djg
Date: Tue Oct 14 11:23:02 2008
New Revision: 57496
URL: http://llvm.org/viewvc/llvm-project?rev=57496&view=rev
Log:
Fix a few close tags.
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=57496&r1=57495&r2=57496&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Oct 14 11:23:02 2008
@@ -16,12 +16,12 @@
What's New in LLVM?
Installation Instructions
Portability and Supported Platforms
- Known Problems
+ Known Problems
Additional Information
From gohman at apple.com Tue Oct 14 11:32:04 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 14 Oct 2008 16:32:04 -0000
Subject: [llvm-commits] [llvm] r57497 - /llvm/trunk/docs/LangRef.html
Message-ID: <200810141632.m9EGW4R6015957@zion.cs.uiuc.edu>
Author: djg
Date: Tue Oct 14 11:32:04 2008
New Revision: 57497
URL: http://llvm.org/viewvc/llvm-project?rev=57497&view=rev
Log:
Add a missing close-tag.
Modified:
llvm/trunk/docs/LangRef.html
Modified: llvm/trunk/docs/LangRef.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=57497&r1=57496&r2=57497&view=diff
==============================================================================
--- llvm/trunk/docs/LangRef.html (original)
+++ llvm/trunk/docs/LangRef.html Tue Oct 14 11:32:04 2008
@@ -1156,6 +1156,7 @@
packed structure,
vector,
opaque.
+
From baldrick at free.fr Tue Oct 14 11:34:10 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 14 Oct 2008 18:34:10 +0200
Subject: [llvm-commits] [llvm] r57495 -
/llvm/trunk/docs/ReleaseNotes.html
In-Reply-To: <200810141613.m9EGDxtB015106@zion.cs.uiuc.edu>
References: <200810141613.m9EGDxtB015106@zion.cs.uiuc.edu>
Message-ID: <200810141834.11548.baldrick@free.fr>
Hi Dan,
> -The IRBuilder class is now parametrized by a class responsible
> +The IRBuilder class is now parameterized by a class responsible
are you sure parameterized is correct?
Ciao,
Duncan.
From clattner at apple.com Tue Oct 14 11:45:39 2008
From: clattner at apple.com (Chris Lattner)
Date: Tue, 14 Oct 2008 09:45:39 -0700
Subject: [llvm-commits] lost llvm commits
Message-ID: <03585128-44AB-4170-9161-16C407567EC2@apple.com>
The mailing list dropped some emails last night, here are the diffs
across the gap:
llvm:
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llvm-gcc:
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The right people at UIUC are investigating the mailing list outage,
-Chris
From alenhar2 at cs.uiuc.edu Tue Oct 14 11:45:57 2008
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Tue, 14 Oct 2008 16:45:57 -0000
Subject: [llvm-commits] [poolalloc] r57498 - in
/poolalloc/trunk/include/poolalloc_runtime: PoolAllocator.h
Support/SplayTree.h test.ex
Message-ID: <200810141645.m9EGjvsb016501@zion.cs.uiuc.edu>
Author: alenhar2
Date: Tue Oct 14 11:45:57 2008
New Revision: 57498
URL: http://llvm.org/viewvc/llvm-project?rev=57498&view=rev
Log:
map and set version of splay
Modified:
poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h
poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h
poolalloc/trunk/include/poolalloc_runtime/test.ex
Modified: poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h?rev=57498&r1=57497&r2=57498&view=diff
==============================================================================
--- poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h (original)
+++ poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h Tue Oct 14 11:45:57 2008
@@ -51,7 +51,7 @@
template
class MallocSlabManager {
- SplayRangeSet objs;
+ RangeSplaySet objs;
unsigned objsize;
protected:
MallocSlabManager(unsigned Osize, unsigned Alignment) : objsize(Osize) {}
@@ -68,7 +68,7 @@
bool slab_valid(void* obj) {
return objs.find(obj);
}
- void* slab_getbounds(void* obj, void*& start, void*& end) {
+ bool slab_getbounds(void* obj, void*& start, void*& end) {
return objs.find(obj, start, end);
}
Modified: poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h?rev=57498&r1=57497&r2=57498&view=diff
==============================================================================
--- poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h (original)
+++ poolalloc/trunk/include/poolalloc_runtime/Support/SplayTree.h Tue Oct 14 11:45:57 2008
@@ -1,12 +1,22 @@
+template
+struct range_tree_node {
+ range_tree_node* left;
+ range_tree_node* right;
+ void* start;
+ void* end;
+ dataTy data;
+};
-class SplayRangeSet {
- struct tree_node {
- tree_node* left;
- tree_node* right;
- void* start;
- void* end;
- };
+template<>
+struct range_tree_node {
+ range_tree_node* left;
+ range_tree_node* right;
+ void* start;
+ void* end;
+};
+template
+class RangeSplayTree {
tree_node* Tree;
tree_node* rotate_right(tree_node* p) {
@@ -76,16 +86,16 @@
return 0;
}
- public:
+ protected:
- SplayRangeSet() : Tree(0) {}
- ~SplayRangeSet() { clear(); }
+ RangeSplayTree() : Tree(0) {}
+ ~RangeSplayTree() { __clear(); }
- bool insert(void* start, void* end) {
+ tree_node* __insert(void* start, void* end) {
Tree = splay(Tree, start);
//If the key is already in, fail the insert
if (Tree && !key_lt(start, Tree) && !key_gt(start, Tree))
- return false;
+ return 0;
tree_node* n = new tree_node();
n->start = start;
@@ -103,9 +113,10 @@
}
}
Tree = n;
+ return Tree;
}
- bool remove(void* key) {
+ bool __remove(void* key) {
if (!Tree) return false;
Tree = splay(Tree, key);
if (!key_lt(key, Tree) && !key_gt(key, Tree)) {
@@ -124,32 +135,93 @@
return false; /* not there */
}
- unsigned count() {
+ unsigned __count() {
return count_internal(Tree);
}
- void clear() {
+ void __clear() {
while (Tree)
- remove (Tree->start);
+ __remove (Tree->start);
}
- bool find(void* key, void*& start, void*& end) {
+ tree_node* __find(void* key) {
if (!Tree) return false;
Tree = splay(Tree, key);
if (!key_lt(key, Tree) && !key_gt(key, Tree)) {
- start = Tree->start;
- end = Tree->end;
- return true;
+ return Tree;
}
- return false;
+ return 0;
}
- bool find(void* key) {
- if (!Tree) return false;
- Tree = splay(Tree, key);
- if (!key_lt(key, Tree) && !key_gt(key, Tree)) {
+};
+
+class RangeSplaySet : RangeSplayTree > {
+ public:
+ RangeSplaySet() : RangeSplayTree >() {}
+
+ bool insert(void* start, void* end) {
+ return 0 != __insert(start,end);
+ }
+
+ bool remove(void* key) {
+ return __remove(key);
+ }
+
+ bool count() { return __count(); }
+
+ void clear() { __clear(); }
+
+ bool find(void* key, void*& start, void*& end) {
+ range_tree_node* t = __find(key);
+ if (!t) return false;
+ start = t->start;
+ end = t->end;
+ return true;
+ }
+ bool find(void* key) {
+ range_tree_node* t = __find(key);
+ if (!t) return false;
+ return true;
+ }
+};
+
+template
+class RangeSplayMap : RangeSplayTree > {
+ public:
+ RangeSplayMap() : RangeSplayTree >() {}
+
+ using RangeSplayTree >::__insert;
+ using RangeSplayTree >::__remove;
+ using RangeSplayTree >::__count;
+ using RangeSplayTree >::__clear;
+ using RangeSplayTree >::__find;
+
+
+ bool insert(void* start, void* end, T& d) {
+ range_tree_node* t = __insert(start,end);
+ if (t == 0) return false;
+ t->data = d;
return true;
}
- return false;
- }
+ bool remove(void* key) {
+ return __remove(key);
+ }
+
+ bool count() { return __count(); }
+
+ void clear() { __clear(); }
+
+ bool find(void* key, void*& start, void*& end, T& d) {
+ range_tree_node* t = __find(key);
+ if (!t) return false;
+ start = t->start;
+ end = t->end;
+ d = t->data;
+ return true;
+ }
+ bool find(void* key) {
+ range_tree_node* t = __find(key);
+ if (!t) return false;
+ return true;
+ }
};
Modified: poolalloc/trunk/include/poolalloc_runtime/test.ex
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc_runtime/test.ex?rev=57498&r1=57497&r2=57498&view=diff
==============================================================================
--- poolalloc/trunk/include/poolalloc_runtime/test.ex (original)
+++ poolalloc/trunk/include/poolalloc_runtime/test.ex Tue Oct 14 11:45:57 2008
@@ -3,6 +3,8 @@
PoolAllocator a(10, 16);
+RangeSplayMap x;
+
int main() {
void* x = a.alloc();
std::cerr << a.isAllocated(x) << " " << a.isAllocated((char*)x + 5) << " " << a.isAllocated((char*)x + 10) << "\n";
From gohman at apple.com Tue Oct 14 11:51:45 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 14 Oct 2008 16:51:45 -0000
Subject: [llvm-commits] [llvm] r57500 - /llvm/trunk/docs/LangRef.html
Message-ID: <200810141651.m9EGpjSC016706@zion.cs.uiuc.edu>
Author: djg
Date: Tue Oct 14 11:51:45 2008
New Revision: 57500
URL: http://llvm.org/viewvc/llvm-project?rev=57500&view=rev
Log:
Fix missing end tags and invalid HTML entity syntax.
Modified:
llvm/trunk/docs/LangRef.html
Modified: llvm/trunk/docs/LangRef.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=57500&r1=57499&r2=57500&view=diff
==============================================================================
--- llvm/trunk/docs/LangRef.html (original)
+++ llvm/trunk/docs/LangRef.html Tue Oct 14 11:51:45 2008
@@ -24,7 +24,7 @@
Calling Conventions
Global Variables
Functions
- Aliases
+ Aliases
Parameter Attributes
Function Attributes
Garbage Collector Names
@@ -58,16 +58,16 @@
Constants
- - Simple Constants
-
- Aggregate Constants
-
- Global Variable and Function Addresses
-
- Undefined Values
-
- Constant Expressions
+
- Simple Constants
+ - Aggregate Constants
+ - Global Variable and Function Addresses
+ - Undefined Values
+ - Constant Expressions
Other Values
- - Inline Assembler Expressions
+
- Inline Assembler Expressions
Instruction Reference
@@ -143,6 +143,7 @@
'inttoptr .. to' Instruction
'bitcast .. to' Instruction
+
Other Operations
- 'icmp' Instruction
@@ -327,7 +328,7 @@
LLVM identifiers come in two basic types: global and local. Global
identifiers (functions, global variables) begin with the @ character. Local
identifiers (register names, types) begin with the % character. Additionally,
- there are three different formats for identifiers, for different purposes:
+ there are three different formats for identifiers, for different purposes:
- Named values are represented as a string of characters with their prefix.
@@ -571,7 +572,7 @@
to have any linkage type other than "externally visible", dllimport,
or extern_weak.
Aliases can have only external, internal and weak
-linkages.
+linkages.
@@ -1077,7 +1078,7 @@
- a0:0:1 - aggregates are 8-bit aligned
When LLVM is determining the alignment for a given type, it uses the
-following rules:
+following rules:
- If the type sought is an exact match for one of the specifications, that
specification is used.
@@ -1089,8 +1090,8 @@
i65 and i256 will use the alignment of i64 (largest specified).
If no match is found, and the type sought is a vector type, then the
largest vector type that is smaller than the sought vector type will be used
- as a fall back. This happens because <128 x double> can be implemented in
- terms of 64 <2 x double>, for example.
+ as a fall back. This happens because <128 x double> can be implemented
+ in terms of 64 <2 x double>, for example.
@@ -1800,7 +1801,7 @@
extractelement ( VAL, IDX )
Perform the extractelement
- operation on constants.
+ operation on constants.
insertelement ( VAL, ELT, IDX )
@@ -1955,7 +1956,7 @@
href="#i_invoke">invoke" instruction, execution continues
at the beginning of the "normal" destination block. If the instruction
returns a value, that value shall set the call or invoke instruction's
-return value.
+return value.
Example:
@@ -2072,7 +2073,7 @@
"ret" instruction, control flow will return to the
"normal" label. If the callee (or any indirect callees) returns with the "unwind" instruction, control is interrupted and
-continued at the dynamically nearest "exception" label.
+continued at the dynamically nearest "exception" label.
Arguments:
@@ -3066,6 +3067,7 @@
'getelementptr' instruction.
The value to insert must have the same type as the value identified
by the indices.
+
Semantics:
@@ -3430,7 +3432,7 @@
; yields [12 x i8]*:aptr
%aptr = getelementptr {i32, [12 x i8]}* %saptr, i64 0, i32 1
; yields i8*:vptr
- %vptr = getelementptr {i32, <2 x i8>}* %svptr, i64 0, i32 1, i32 1
+ %vptr = getelementptr {i32, <2 x i8>}* %svptr, i64 0, i32 1, i32 1
; yields i8*:eptr
%eptr = getelementptr [12 x i8]* %aptr, i64 0, i32 1
@@ -3734,7 +3736,7 @@
Example:
%X = uitofp i32 257 to float ; yields float:257.0
- %Y = uitofp i8 -1 to double ; yields double:255.0
+ %Y = uitofp i8 -1 to double ; yields double:255.0
@@ -3768,7 +3770,7 @@
Example:
%X = sitofp i32 257 to float ; yields float:257.0
- %Y = sitofp i8 -1 to double ; yields double:-1.0
+ %Y = sitofp i8 -1 to double ; yields double:-1.0
@@ -3790,7 +3792,7 @@
Arguments:
The 'ptrtoint' instruction takes a value to cast, which
must be a pointer value, and a type to cast it to
-ty2, which must be an integer type.
+ty2, which must be an integer type.
Semantics:
The 'ptrtoint' instruction converts value to integer type
@@ -3826,7 +3828,7 @@
Arguments:
The 'inttoptr' instruction takes an integer
value to cast, and a type to cast it to, which must be a
-pointer type.
+pointer type.
Semantics:
The 'inttoptr' instruction converts value to type
@@ -3884,7 +3886,7 @@
%X = bitcast i8 255 to i8 ; yields i8 :-1
%Y = bitcast i32* %x to sint* ; yields sint*:%x
- %Z = bitcast <2xint> %V to i64; ; yields i64: %V
+ %Z = bitcast <2 x int> %V to i64; ; yields i64: %V
@@ -3900,7 +3902,7 @@
Syntax:
-
<result> = icmp <cond> <ty> <op1>, <op2> ; yields {i1} or {<N x i1>}:result
+ <result> = icmp <cond> <ty> <op1>, <op2> ; yields {i1} or {<N x i1>}:result
Overview:
The 'icmp' instruction returns a boolean value or
@@ -3910,6 +3912,7 @@
The 'icmp' instruction takes three operands. The first operand is
the condition code indicating the kind of comparison to perform. It is not
a value, just a keyword. The possible condition code are:
+
- eq: equal
- ne: not equal
@@ -3930,12 +3933,13 @@
The 'icmp' compares op1 and op2 according to
the condition code given as cond. The comparison performed always
yields either an i1 or vector of i1 result, as follows:
+
- eq: yields true if the operands are equal,
false otherwise. No sign interpretation is necessary or performed.
- ne: yields true if the operands are unequal,
- false otherwise. No sign interpretation is necessary or performed.
+ false otherwise. No sign interpretation is necessary or performed.
- ugt: interprets the operands as unsigned values and yields
true if op1 is greater than op2.
- uge: interprets the operands as unsigned values and yields
@@ -3976,12 +3980,12 @@
Syntax:
-
<result> = fcmp <cond> <ty> <op1>, <op2> ; yields {i1} or {<N x i1>}:result
+ <result> = fcmp <cond> <ty> <op1>, <op2> ; yields {i1} or {<N x i1>}:result
Overview:
The 'fcmp' instruction returns a boolean value
or vector of boolean values based on comparison
-of its operands.
+of its operands.
If the operands are floating point scalars, then the result
type is a boolean (i1).
@@ -3992,7 +3996,7 @@
Arguments:
The 'fcmp' instruction takes three operands. The first operand is
the condition code indicating the kind of comparison to perform. It is not
-a value, just a keyword. The possible condition code are:
+a value, just a keyword. The possible condition code are:
- false: no comparison, always returns false
- oeq: ordered and equal
@@ -4023,7 +4027,7 @@
If the operands are vectors, then the vectors are compared
element by element.
Each comparison performed
-always yields an i1 result, as follows:
+always yields an i1 result, as follows:
- false: always yields false, regardless of operands.
- oeq: yields true if both operands are not a QNAN and
@@ -4077,7 +4081,7 @@
Arguments:
The 'vicmp' instruction takes three operands. The first operand is
the condition code indicating the kind of comparison to perform. It is not
-a value, just a keyword. The possible condition code are:
+a value, just a keyword. The possible condition code are:
- eq: equal
- ne: not equal
@@ -4100,7 +4104,7 @@
element is 1 if the element-wise comparison evaluates to true, and is 0
otherwise. All other bits of the result are undefined. The condition codes
are evaluated identically to the 'icmp'
-instruction.
+instruction.
Example:
@@ -4123,7 +4127,7 @@
Arguments:
The 'vfcmp' instruction takes three operands. The first operand is
the condition code indicating the kind of comparison to perform. It is not
-a value, just a keyword. The possible condition code are:
+a value, just a keyword. The possible condition code are:
- false: no comparison, always returns false
- oeq: ordered and equal
@@ -4154,7 +4158,7 @@
significant bit in each element is 1 if the element-wise comparison evaluates to
true, and is 0 otherwise. All other bits of the result are undefined. The
condition codes are evaluated identically to the
-'fcmp' instruction.
+'fcmp' instruction.
Example:
@@ -4219,7 +4223,7 @@
<result> = select selty <cond>, <ty> <val1>, <ty> <val2> ; yields ty
- selty is either i1 or {<N x i1>}
+ selty is either i1 or {<N x i1>}
Overview:
@@ -4287,12 +4291,12 @@
any allocas or varargs in the caller. If the "tail" marker is present, the
function call is eligible for tail call optimization. Note that calls may
be marked "tail" even if they do not occur before a ret instruction.
+ href="#i_ret">ret instruction.
-
The optional "cconv" marker indicates which calling
convention the call should use. If none is specified, the call defaults
- to using C calling conventions.
+ to using C calling conventions.
-
@@ -4339,7 +4343,7 @@
the specified values. Upon a 'ret'
instruction in the called function, control flow continues with the
instruction after the function call, and the return value of the
-function is bound to the result argument.
+function is bound to the result argument.
Example:
@@ -4519,17 +4523,17 @@
Syntax:
declare void %llvm.va_start(i8* <arglist>)
Overview:
-The 'llvm.va_start' intrinsic initializes
+
The 'llvm.va_start' intrinsic initializes
*<arglist> for subsequent use by va_arg.
Arguments:
-The argument is a pointer to a va_list element to initialize.
+The argument is a pointer to a va_list element to initialize.
Semantics:
-The 'llvm.va_start' intrinsic works just like the va_start
+
The 'llvm.va_start' intrinsic works just like the va_start
macro available in C. In a target-dependent way, it initializes the
va_list element to which the argument points, so that the next call to
va_arg will produce the first variable argument passed to the function.
@@ -5209,7 +5213,7 @@
Syntax:
This is an overloaded intrinsic. You can use llvm.sqrt on any
floating point or vector of floating point type. Not all targets support all
-types however.
+types however.
declare float @llvm.sqrt.f32(float %Val)
declare double @llvm.sqrt.f64(double %Val)
@@ -5253,7 +5257,7 @@
Syntax:
This is an overloaded intrinsic. You can use llvm.powi on any
floating point or vector of floating point type. Not all targets support all
-types however.
+types however.
declare float @llvm.powi.f32(float %Val, i32 %power)
declare double @llvm.powi.f64(double %Val, i32 %power)
@@ -5295,7 +5299,7 @@
Syntax:
This is an overloaded intrinsic. You can use llvm.sin on any
floating point or vector of floating point type. Not all targets support all
-types however.
+types however.
declare float @llvm.sin.f32(float %Val)
declare double @llvm.sin.f64(double %Val)
@@ -5334,7 +5338,7 @@
Syntax:
This is an overloaded intrinsic. You can use llvm.cos on any
floating point or vector of floating point type. Not all targets support all
-types however.
+types however.
declare float @llvm.cos.f32(float %Val)
declare double @llvm.cos.f64(double %Val)
@@ -5373,7 +5377,7 @@
Syntax:
This is an overloaded intrinsic. You can use llvm.pow on any
floating point or vector of floating point type. Not all targets support all
-types however.
+types however.
declare float @llvm.pow.f32(float %Val, float %Power)
declare double @llvm.pow.f64(double %Val, double %Power)
@@ -5428,7 +5432,7 @@
Syntax:
This is an overloaded intrinsic function. You can use bswap on any integer
-type that is an even number of bytes (i.e. BitWidth % 16 == 0).
+type that is an even number of bytes (i.e. BitWidth % 16 == 0).
declare i16 @llvm.bswap.i16(i16 <id>)
declare i32 @llvm.bswap.i32(i32 <id>)
@@ -5467,7 +5471,7 @@
Syntax:
This is an overloaded intrinsic. You can use llvm.ctpop on any integer bit
-width. Not all targets support all bit widths however.
+width. Not all targets support all bit widths however.
declare i8 @llvm.ctpop.i8 (i8 <src>)
declare i16 @llvm.ctpop.i16(i16 <src>)
@@ -5506,7 +5510,7 @@
Syntax:
This is an overloaded intrinsic. You can use llvm.ctlz on any
-integer bit width. Not all targets support all bit widths however.
+integer bit width. Not all targets support all bit widths however.
declare i8 @llvm.ctlz.i8 (i8 <src>)
declare i16 @llvm.ctlz.i16(i16 <src>)
@@ -5549,7 +5553,7 @@
Syntax:
This is an overloaded intrinsic. You can use llvm.cttz on any
-integer bit width. Not all targets support all bit widths however.
+integer bit width. Not all targets support all bit widths however.
declare i8 @llvm.cttz.i8 (i8 <src>)
declare i16 @llvm.cttz.i16(i16 <src>)
@@ -5590,7 +5594,7 @@
Syntax:
This is an overloaded intrinsic. You can use llvm.part.select
-on any integer bit width.
+on any integer bit width.
declare i17 @llvm.part.select.i17 (i17 %val, i32 %loBit, i32 %hiBit)
declare i29 @llvm.part.select.i29 (i29 %val, i32 %loBit, i32 %hiBit)
@@ -5620,7 +5624,7 @@
- The %loBits value is subtracted from the %hiBits value
to determine the number of bits to retain.
- A mask of the retained bits is created by shifting a -1 value.
- - The mask is ANDed with %val to produce the result.
+
- The mask is ANDed with %val to produce the result.
In reverse mode, a similar computation is made except that the bits are
returned in the reverse order. So, for example, if X has the value
@@ -5637,7 +5641,7 @@
Syntax:
This is an overloaded intrinsic. You can use llvm.part.set
-on any integer bit width.
+on any integer bit width.
declare i17 @llvm.part.set.i17.i9 (i17 %val, i9 %repl, i32 %lo, i32 %hi)
declare i29 @llvm.part.set.i29.i9 (i29 %val, i9 %repl, i32 %lo, i32 %hi)
@@ -5666,10 +5670,10 @@
In forward mode, the bits between %lo and %hi (inclusive)
are replaced with corresponding bits from %repl. That is the 0th bit
in %repl replaces the %loth bit in %val and etc. up
-to the %hith bit.
+to the %hith bit.
In reverse mode, a similar computation is made except that the bits are
reversed. That is, the 0th bit in %repl replaces the
-%hi bit in %val and etc. down to the %loth bit.
+%hi bit in %val and etc. down to the %loth bit.
Examples:
llvm.part.set(0xFFFF, 0, 4, 7) -> 0xFF0F
@@ -5836,7 +5840,7 @@
- ls: load-store barrier
- sl: store-load barrier
- ss: store-store barrier
- - device: barrier applies to device and uncached memory also.
+
- device: barrier applies to device and uncached memory also.
Semantics:
@@ -6360,6 +6364,7 @@
with arbitrary strings. This can be useful for special purpose optimizations
that want to look for these annotations. These have no other defined use, they
are ignored by code generation and optimization.
+
From gohman at apple.com Tue Oct 14 12:00:39 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 14 Oct 2008 17:00:39 -0000
Subject: [llvm-commits] [llvm] r57503 - in /llvm/trunk/docs:
CodeGenerator.html TableGenFundamentals.html UsingLibraries.html
WritingAnLLVMPass.html
Message-ID: <200810141700.m9EH0dEd017043@zion.cs.uiuc.edu>
Author: djg
Date: Tue Oct 14 12:00:38 2008
New Revision: 57503
URL: http://llvm.org/viewvc/llvm-project?rev=57503&view=rev
Log:
HTML syntax fixes.
Modified:
llvm/trunk/docs/CodeGenerator.html
llvm/trunk/docs/TableGenFundamentals.html
llvm/trunk/docs/UsingLibraries.html
llvm/trunk/docs/WritingAnLLVMPass.html
Modified: llvm/trunk/docs/CodeGenerator.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodeGenerator.html?rev=57503&r1=57502&r2=57503&view=diff
==============================================================================
--- llvm/trunk/docs/CodeGenerator.html (original)
+++ llvm/trunk/docs/CodeGenerator.html Tue Oct 14 12:00:38 2008
@@ -1255,7 +1255,7 @@
are in physical registers, so the physical register is assumed to be killed by
the end of the basic block. Live intervals for virtual registers are computed
for some ordering of the machine instructions [1, N]. A live interval
-is an interval [i, j), where 1 <= i <= j < N, for which a
+is an interval [i, j), where 1 <= i <= j < N, for which a
variable is live.
More to come...
Modified: llvm/trunk/docs/TableGenFundamentals.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/TableGenFundamentals.html?rev=57503&r1=57502&r2=57503&view=diff
==============================================================================
--- llvm/trunk/docs/TableGenFundamentals.html (original)
+++ llvm/trunk/docs/TableGenFundamentals.html Tue Oct 14 12:00:38 2008
@@ -707,12 +707,12 @@
let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0,
MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, EFLAGS] in {
- def CALLpcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i32imm:$dst,variable_ops),
- "call\t${dst:call}", []>;
- def CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops),
- "call\t{*}$dst", [(X86call GR32:$dst)]>;
- def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
- "call\t{*}$dst", []>;
+ def CALLpcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i32imm:$dst,variable_ops),
+ "call\t${dst:call}", []>;
+ def CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops),
+ "call\t{*}$dst", [(X86call GR32:$dst)]>;
+ def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
+ "call\t{*}$dst", []>;
}
Modified: llvm/trunk/docs/UsingLibraries.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/UsingLibraries.html?rev=57503&r1=57502&r2=57503&view=diff
==============================================================================
--- llvm/trunk/docs/UsingLibraries.html (original)
+++ llvm/trunk/docs/UsingLibraries.html Tue Oct 14 12:00:38 2008
@@ -199,33 +199,33 @@
textual form. The information is the same as shown on the graphs but arranged
alphabetically.
- - libLLVMAnalysis.a
+ - libLLVMAnalysis.a
- libLLVMCore.a
- libLLVMSupport.a
- libLLVMSystem.a
- libLLVMTarget.a
- - libLLVMArchive.a
+ - libLLVMArchive.a
- libLLVMBCReader.a
- libLLVMCore.a
- libLLVMSupport.a
- libLLVMSystem.a
- - libLLVMAsmParser.a
+ - libLLVMAsmParser.a
- libLLVMCore.a
- libLLVMSystem.a
- - libLLVMBCReader.a
+ - libLLVMBCReader.a
- libLLVMCore.a
- libLLVMSupport.a
- libLLVMSystem.a
- - libLLVMBCWriter.a
+ - libLLVMBCWriter.a
- libLLVMCore.a
- libLLVMSupport.a
- libLLVMSystem.a
- - libLLVMCodeGen.a
+ - libLLVMCodeGen.a
- libLLVMAnalysis.a
- libLLVMCore.a
- libLLVMScalarOpts.a
@@ -234,30 +234,30 @@
- libLLVMTarget.a
- libLLVMTransformUtils.a
- - libLLVMCore.a
+ - libLLVMCore.a
- libLLVMSupport.a
- libLLVMSystem.a
- - libLLVMDebugger.a
+ - libLLVMDebugger.a
- libLLVMBCReader.a
- libLLVMCore.a
- libLLVMSupport.a
- libLLVMSystem.a
- - libLLVMInstrumentation.a
+ - libLLVMInstrumentation.a
- libLLVMCore.a
- libLLVMScalarOpts.a
- libLLVMSupport.a
- libLLVMTransformUtils.a
- - libLLVMLinker.a
+ - libLLVMLinker.a
- libLLVMArchive.a
- libLLVMBCReader.a
- libLLVMCore.a
- libLLVMSupport.a
- libLLVMSystem.a
- - libLLVMScalarOpts.a
+ - libLLVMScalarOpts.a
- libLLVMAnalysis.a
- libLLVMCore.a
- libLLVMSupport.a
@@ -265,7 +265,7 @@
- libLLVMTarget.a
- libLLVMTransformUtils.a
- - libLLVMSelectionDAG.a
+ - libLLVMSelectionDAG.a
- libLLVMAnalysis.a
- libLLVMCodeGen.a
- libLLVMCore.a
@@ -274,18 +274,18 @@
- libLLVMTarget.a
- libLLVMTransformUtils.a
- - libLLVMSupport.a
+ - libLLVMSupport.a
- libLLVMSystem.a
- libLLVMbzip2.a
- - libLLVMSystem.a
+ - libLLVMSystem.a
- - libLLVMTarget.a
+ - libLLVMTarget.a
- libLLVMCore.a
- libLLVMSupport.a
- libLLVMSystem.a
- - libLLVMTransformUtils.a
+ - libLLVMTransformUtils.a
- libLLVMAnalysis.a
- libLLVMCore.a
- libLLVMSupport.a
@@ -293,15 +293,15 @@
- libLLVMTarget.a
- libLLVMipa.a
- - libLLVMbzip2.a
+ - libLLVMbzip2.a
- - libLLVMipa.a
+ - libLLVMipa.a
- libLLVMAnalysis.a
- libLLVMCore.a
- libLLVMSupport.a
- libLLVMSystem.a
- - libLLVMipo.a
+ - libLLVMipo.a
- libLLVMAnalysis.a
- libLLVMCore.a
- libLLVMSupport.a
@@ -310,7 +310,7 @@
- libLLVMTransformUtils.a
- libLLVMipa.a
- - libLLVMlto.a
+ - libLLVMlto.a
- libLLVMAnalysis.a
- libLLVMBCReader.a
- libLLVMBCWriter.a
@@ -323,7 +323,7 @@
- libLLVMipa.a
- libLLVMipo.a
- - LLVMARM.o
+ - LLVMARM.o
- libLLVMCodeGen.a
- libLLVMCore.a
- libLLVMSelectionDAG.a
@@ -331,7 +331,7 @@
- libLLVMSystem.a
- libLLVMTarget.a
- - LLVMAlpha.o
+ - LLVMAlpha.o
- libLLVMCodeGen.a
- libLLVMCore.a
- libLLVMSelectionDAG.a
@@ -339,7 +339,7 @@
- libLLVMSystem.a
- libLLVMTarget.a
- - LLVMCBackend.o
+ - LLVMCBackend.o
- libLLVMAnalysis.a
- libLLVMCodeGen.a
- libLLVMCore.a
@@ -350,13 +350,13 @@
- libLLVMTransformUtils.a
- libLLVMipa.a
- - LLVMExecutionEngine.o
+ - LLVMExecutionEngine.o
- libLLVMCore.a
- libLLVMSupport.a
- libLLVMSystem.a
- libLLVMTarget.a
- - LLVMIA64.o
+ - LLVMIA64.o
- libLLVMCodeGen.a
- libLLVMCore.a
- libLLVMSelectionDAG.a
@@ -364,7 +364,7 @@
- libLLVMSystem.a
- libLLVMTarget.a
- - LLVMInterpreter.o
+ - LLVMInterpreter.o
- LLVMExecutionEngine.o
- libLLVMCodeGen.a
- libLLVMCore.a
@@ -372,14 +372,14 @@
- libLLVMSystem.a
- libLLVMTarget.a
- - LLVMJIT.o
+ - LLVMJIT.o
- LLVMExecutionEngine.o
- libLLVMCore.a
- libLLVMSupport.a
- libLLVMSystem.a
- libLLVMTarget.a
- - LLVMPowerPC.o
+ - LLVMPowerPC.o
- libLLVMCodeGen.a
- libLLVMCore.a
- libLLVMSelectionDAG.a
@@ -387,7 +387,7 @@
- libLLVMSystem.a
- libLLVMTarget.a
- - LLVMSparc.o
+ - LLVMSparc.o
- libLLVMCodeGen.a
- libLLVMCore.a
- libLLVMSelectionDAG.a
@@ -395,7 +395,7 @@
- libLLVMSystem.a
- libLLVMTarget.a
- - LLVMX86.o
+ - LLVMX86.o
- libLLVMCodeGen.a
- libLLVMCore.a
- libLLVMSelectionDAG.a
Modified: llvm/trunk/docs/WritingAnLLVMPass.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/WritingAnLLVMPass.html?rev=57503&r1=57502&r2=57503&view=diff
==============================================================================
--- llvm/trunk/docs/WritingAnLLVMPass.html (original)
+++ llvm/trunk/docs/WritingAnLLVMPass.html Tue Oct 14 12:00:38 2008
@@ -1662,7 +1662,7 @@
cl::opt<RegisterMyPasses::FunctionPassCtor, false,
- RegisterPassParser<RegisterMyPasses> >
+ RegisterPassParser<RegisterMyPasses> >
MyPassOpt("mypass",
cl::init(&createDefaultMyPass),
cl::desc("my pass option help"));
From andrewl at lenharth.org Tue Oct 14 12:05:45 2008
From: andrewl at lenharth.org (Andrew Lenharth)
Date: Tue, 14 Oct 2008 12:05:45 -0500
Subject: [llvm-commits] [poolalloc] r57469 -
/poolalloc/trunk/include/dsa/DataStructure.h
In-Reply-To: <200810132201.m9DM13uA031472@zion.cs.uiuc.edu>
References: <200810132201.m9DM13uA031472@zion.cs.uiuc.edu>
Message-ID: <85dfcd7f0810141005s5f5d18e5sde808613ea497672@mail.gmail.com>
only local and TD preserves all. the others invalidate the previous result.
On Mon, Oct 13, 2008 at 5:01 PM, John Criswell wrote:
> Author: criswell
> Date: Mon Oct 13 17:01:01 2008
> New Revision: 57469
>
> URL: http://llvm.org/viewvc/llvm-project?rev=57469&view=rev
> Log:
> All DSA passes preserve all other analysis pass results.
>
> Modified:
> poolalloc/trunk/include/dsa/DataStructure.h
>
> Modified: poolalloc/trunk/include/dsa/DataStructure.h
> URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DataStructure.h?rev=57469&r1=57468&r2=57469&view=diff
>
> ==============================================================================
> --- poolalloc/trunk/include/dsa/DataStructure.h (original)
> +++ poolalloc/trunk/include/dsa/DataStructure.h Mon Oct 13 17:01:01 2008
> @@ -184,6 +184,7 @@
> ///
> virtual void getAnalysisUsage(AnalysisUsage &AU) const {
> AU.addRequired();
> + AU.setPreservesAll();
> }
> };
>
> @@ -202,6 +203,7 @@
> ///
> virtual void getAnalysisUsage(AnalysisUsage &AU) const {
> AU.addRequired();
> + AU.setPreservesAll();
> }
> };
>
> @@ -234,6 +236,7 @@
>
> virtual void getAnalysisUsage(AnalysisUsage &AU) const {
> AU.addRequired();
> + AU.setPreservesAll();
> }
>
> protected:
> @@ -299,6 +302,7 @@
> ///
> virtual void getAnalysisUsage(AnalysisUsage &AU) const {
> AU.addRequired();
> + AU.setPreservesAll();
> }
>
> private:
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
From gohman at apple.com Tue Oct 14 12:06:45 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 14 Oct 2008 17:06:45 -0000
Subject: [llvm-commits] [llvm] r57505 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <200810141706.m9EH6jFC017341@zion.cs.uiuc.edu>
Author: djg
Date: Tue Oct 14 12:06:44 2008
New Revision: 57505
URL: http://llvm.org/viewvc/llvm-project?rev=57505&view=rev
Log:
Mention a few methods in ConstantSDNode that were renamed.
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=57505&r1=57504&r2=57505&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Oct 14 12:06:44 2008
@@ -492,7 +492,10 @@
SDOperand was renamed to SDValue (and the "Val"
member was changed to be the getNode() accessor), and the
MVT::ValueType enum has been replaced with an "MVT"
- struct.
+ struct. The getSignExtended and getValue methods in the
+ ConstantSDNode class were renamed to getSExtValue and
+ getZExtValue respectively, to be more consistent with
+ the ConstantInt class.
From criswell at uiuc.edu Tue Oct 14 12:11:52 2008
From: criswell at uiuc.edu (John Criswell)
Date: Tue, 14 Oct 2008 17:11:52 -0000
Subject: [llvm-commits] [poolalloc] r57506 -
/poolalloc/trunk/include/dsa/DataStructure.h
Message-ID: <200810141711.m9EHBq3V017499@zion.cs.uiuc.edu>
Author: criswell
Date: Tue Oct 14 12:11:52 2008
New Revision: 57506
URL: http://llvm.org/viewvc/llvm-project?rev=57506&view=rev
Log:
Only the local and Top-Down passes preserve all other analysis passes.
Modified:
poolalloc/trunk/include/dsa/DataStructure.h
Modified: poolalloc/trunk/include/dsa/DataStructure.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DataStructure.h?rev=57506&r1=57505&r2=57506&view=diff
==============================================================================
--- poolalloc/trunk/include/dsa/DataStructure.h (original)
+++ poolalloc/trunk/include/dsa/DataStructure.h Tue Oct 14 12:11:52 2008
@@ -203,7 +203,6 @@
///
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired();
- AU.setPreservesAll();
}
};
@@ -236,7 +235,6 @@
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired();
- AU.setPreservesAll();
}
protected:
@@ -332,7 +330,6 @@
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired();
- AU.setPreservesAll();
}
};
From evan.cheng at apple.com Tue Oct 14 12:15:11 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 14 Oct 2008 17:15:11 -0000
Subject: [llvm-commits] [llvm] r57507 - in /llvm/trunk:
lib/Transforms/Scalar/InstructionCombining.cpp
test/Transforms/InstCombine/and-fcmp.ll
Message-ID: <200810141715.m9EHFBMP017605@zion.cs.uiuc.edu>
Author: evancheng
Date: Tue Oct 14 12:15:11 2008
New Revision: 57507
URL: http://llvm.org/viewvc/llvm-project?rev=57507&view=rev
Log:
Optimize anding of two fcmp into a single fcmp if the operands are the same. e.g. uno && ueq -> ueq
ord && olt -> olt
ord && ueq -> oeq
Added:
llvm/trunk/test/Transforms/InstCombine/and-fcmp.ll
Modified:
llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=57507&r1=57506&r2=57507&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Oct 14 12:15:11 2008
@@ -3116,10 +3116,35 @@
}
}
+/// getFCmpCode - Similar to getICmpCode but for FCmpInst. This encodes a fcmp
+/// predicate into a three bit mask. It also returns whether it is an ordered
+/// predicate by reference.
+static unsigned getFCmpCode(FCmpInst::Predicate CC, bool &isOrdered) {
+ isOrdered = false;
+ switch (CC) {
+ case FCmpInst::FCMP_ORD: isOrdered = true; return 0; // 000
+ case FCmpInst::FCMP_UNO: return 0; // 000
+ case FCmpInst::FCMP_OEQ: isOrdered = true; return 1; // 001
+ case FCmpInst::FCMP_UEQ: return 1; // 001
+ case FCmpInst::FCMP_OGT: isOrdered = true; return 2; // 010
+ case FCmpInst::FCMP_UGT: return 2; // 010
+ case FCmpInst::FCMP_OGE: isOrdered = true; return 3; // 011
+ case FCmpInst::FCMP_UGE: return 3; // 011
+ case FCmpInst::FCMP_OLT: isOrdered = true; return 4; // 100
+ case FCmpInst::FCMP_ULT: return 4; // 100
+ case FCmpInst::FCMP_OLE: isOrdered = true; return 6; // 110
+ case FCmpInst::FCMP_ULE: return 6; // 110
+ default:
+ // Not expecting FCMP_FALSE and FCMP_TRUE;
+ assert(0 && "Unexpected FCmp predicate!");
+ return 0;
+ }
+}
+
/// getICmpValue - This is the complement of getICmpCode, which turns an
/// opcode and two operands into either a constant true or false, or a brand
/// new ICmp instruction. The sign is passed in to determine which kind
-/// of predicate to use in new icmp instructions.
+/// of predicate to use in the new icmp instruction.
static Value *getICmpValue(bool sign, unsigned code, Value *LHS, Value *RHS) {
switch (code) {
default: assert(0 && "Illegal ICmp code!");
@@ -3150,6 +3175,47 @@
}
}
+/// getFCmpValue - This is the complement of getFCmpCode, which turns an
+/// opcode and two operands into either a FCmp instruction. isordered is passed
+/// in to determine which kind of predicate to use in the new fcmp instruction.
+static Value *getFCmpValue(bool isordered, unsigned code,
+ Value *LHS, Value *RHS) {
+ switch (code) {
+ default: assert(0 && "Illegal ICmp code!");
+ case 0:
+ if (isordered)
+ return new FCmpInst(FCmpInst::FCMP_ORD, LHS, RHS);
+ else
+ return new FCmpInst(FCmpInst::FCMP_UNO, LHS, RHS);
+ case 1:
+ if (isordered)
+ return new FCmpInst(FCmpInst::FCMP_OEQ, LHS, RHS);
+ else
+ return new FCmpInst(FCmpInst::FCMP_UEQ, LHS, RHS);
+ case 2:
+ if (isordered)
+ return new FCmpInst(FCmpInst::FCMP_OGT, LHS, RHS);
+ else
+ return new FCmpInst(FCmpInst::FCMP_UGT, LHS, RHS);
+ case 3:
+ if (isordered)
+ return new FCmpInst(FCmpInst::FCMP_OGE, LHS, RHS);
+ else
+ return new FCmpInst(FCmpInst::FCMP_UGE, LHS, RHS);
+ case 4:
+ if (isordered)
+ return new FCmpInst(FCmpInst::FCMP_OLT, LHS, RHS);
+ else
+ return new FCmpInst(FCmpInst::FCMP_ULT, LHS, RHS);
+ case 5:
+ if (isordered)
+ return new FCmpInst(FCmpInst::FCMP_OLE, LHS, RHS);
+ else
+ return new FCmpInst(FCmpInst::FCMP_ULE, LHS, RHS);
+ }
+}
+
+
static bool PredicatesFoldable(ICmpInst::Predicate p1, ICmpInst::Predicate p2) {
return (ICmpInst::isSignedPredicate(p1) == ICmpInst::isSignedPredicate(p2)) ||
(ICmpInst::isSignedPredicate(p1) &&
@@ -3887,11 +3953,12 @@
}
}
- // (fcmp ord x, c) & (fcmp ord y, c) -> (fcmp ord x, y)
+ // If and'ing two fcmp, try combine them into one.
if (FCmpInst *LHS = dyn_cast(I.getOperand(0))) {
if (FCmpInst *RHS = dyn_cast(I.getOperand(1))) {
if (LHS->getPredicate() == FCmpInst::FCMP_ORD &&
- RHS->getPredicate() == FCmpInst::FCMP_ORD)
+ RHS->getPredicate() == FCmpInst::FCMP_ORD) {
+ // (fcmp ord x, c) & (fcmp ord y, c) -> (fcmp ord x, y)
if (ConstantFP *LHSC = dyn_cast(LHS->getOperand(1)))
if (ConstantFP *RHSC = dyn_cast(RHS->getOperand(1))) {
// If either of the constants are nans, then the whole thing returns
@@ -3901,6 +3968,47 @@
return new FCmpInst(FCmpInst::FCMP_ORD, LHS->getOperand(0),
RHS->getOperand(0));
}
+ } else {
+ Value *Op0LHS, *Op0RHS, *Op1LHS, *Op1RHS;
+ FCmpInst::Predicate Op0CC, Op1CC;
+ if (match(Op0, m_FCmp(Op0CC, m_Value(Op0LHS), m_Value(Op0RHS))) &&
+ match(Op1, m_FCmp(Op1CC, m_Value(Op1LHS), m_Value(Op1RHS)))) {
+ if (Op0LHS == Op1LHS && Op0RHS == Op1RHS) {
+ // Simplify (fcmp cc0 x, y) & (fcmp cc1 x, y).
+ if (Op0CC == Op1CC)
+ return new FCmpInst((FCmpInst::Predicate)Op0CC, Op0LHS, Op0RHS);
+ else if (Op0CC == FCmpInst::FCMP_FALSE ||
+ Op1CC == FCmpInst::FCMP_FALSE)
+ return ReplaceInstUsesWith(I, ConstantInt::getFalse());
+ else if (Op0CC == FCmpInst::FCMP_TRUE)
+ return ReplaceInstUsesWith(I, Op1);
+ else if (Op1CC == FCmpInst::FCMP_TRUE)
+ return ReplaceInstUsesWith(I, Op0);
+ bool Op0Ordered;
+ bool Op1Ordered;
+ unsigned Op0Pred = getFCmpCode(Op0CC, Op0Ordered);
+ unsigned Op1Pred = getFCmpCode(Op1CC, Op1Ordered);
+ if (Op1Pred == 0) {
+ std::swap(Op0, Op1);
+ std::swap(Op0Pred, Op1Pred);
+ std::swap(Op0Ordered, Op1Ordered);
+ }
+ if (Op0Pred == 0) {
+ // uno && ueq -> uno && (uno || eq) -> ueq
+ // ord && olt -> ord && (ord && lt) -> olt
+ if (Op0Ordered == Op1Ordered)
+ return ReplaceInstUsesWith(I, Op1);
+ // uno && oeq -> uno && (ord && eq) -> false
+ // uno && ord -> false
+ if (!Op0Ordered)
+ return ReplaceInstUsesWith(I, ConstantInt::getFalse());
+ // ord && ueq -> ord && (uno || eq) -> oeq
+ return cast(getFCmpValue(true, Op1Pred,
+ Op0LHS, Op0RHS));
+ }
+ }
+ }
+ }
}
}
Added: llvm/trunk/test/Transforms/InstCombine/and-fcmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/and-fcmp.ll?rev=57507&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/and-fcmp.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/and-fcmp.ll Tue Oct 14 12:15:11 2008
@@ -0,0 +1,26 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep fcmp | count 2
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep ret | grep 0
+
+define zeroext i8 @t1(float %x, float %y) nounwind {
+ %a = fcmp ueq float %x, %y
+ %b = fcmp ord float %x, %y
+ %c = and i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
+
+define zeroext i8 @t2(float %x, float %y) nounwind {
+ %a = fcmp olt float %x, %y
+ %b = fcmp ord float %x, %y
+ %c = and i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
+
+define zeroext i8 @t3(float %x, float %y) nounwind {
+ %a = fcmp oge float %x, %y
+ %b = fcmp uno float %x, %y
+ %c = and i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
From evan.cheng at apple.com Tue Oct 14 12:15:40 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 14 Oct 2008 17:15:40 -0000
Subject: [llvm-commits] [llvm] r57508 -
/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
Message-ID: <200810141715.m9EHFe8s017625@zion.cs.uiuc.edu>
Author: evancheng
Date: Tue Oct 14 12:15:39 2008
New Revision: 57508
URL: http://llvm.org/viewvc/llvm-project?rev=57508&view=rev
Log:
Fix indentation.
Modified:
llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=57508&r1=57507&r2=57508&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Tue Oct 14 12:15:39 2008
@@ -986,9 +986,9 @@
// Get the new AND mask, this folds to a constant.
SDValue NewANDMask = CurDAG->getNode(ISD::SRL, N.getValueType(),
- SDValue(C2, 0), SDValue(C1, 0));
+ SDValue(C2, 0), SDValue(C1, 0));
SDValue NewAND = CurDAG->getNode(ISD::AND, N.getValueType(),
- Shift.getOperand(0), NewANDMask);
+ Shift.getOperand(0), NewANDMask);
SDValue NewSHIFT = CurDAG->getNode(ISD::SHL, N.getValueType(),
NewAND, SDValue(C1, 0));
NewANDMask.getNode()->setNodeId(Shift.getNode()->getNodeId());
From criswell at uiuc.edu Tue Oct 14 12:21:25 2008
From: criswell at uiuc.edu (John Criswell)
Date: Tue, 14 Oct 2008 17:21:25 -0000
Subject: [llvm-commits] [poolalloc] r57510 -
/poolalloc/trunk/lib/DSA/StdLibPass.cpp
Message-ID: <200810141721.m9EHLPZ7017972@zion.cs.uiuc.edu>
Author: criswell
Date: Tue Oct 14 12:21:25 2008
New Revision: 57510
URL: http://llvm.org/viewvc/llvm-project?rev=57510&view=rev
Log:
Add a NULL entry to the end of the special function table to terminate the
table.
Added spaces between comment markers and comment text to make reading them
easier.
Modified:
poolalloc/trunk/lib/DSA/StdLibPass.cpp
Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/StdLibPass.cpp?rev=57510&r1=57509&r2=57510&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/StdLibPass.cpp (original)
+++ poolalloc/trunk/lib/DSA/StdLibPass.cpp Tue Oct 14 12:21:25 2008
@@ -60,7 +60,7 @@
{"fstat", {NRET_YNARGS, NRET_NYARGS, NRET_NARGS, false, false, false}},
{"lstat", {NRET_YNARGS, NRET_NYARGS, NRET_NARGS, false, false, false}},
- //printf not strictly true, %n could cause a write
+ // printf not strictly true, %n could cause a write
{"printf", {NRET_YARGS, NRET_NARGS, NRET_NARGS, false, false, false}},
{"fprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, false, false, false}},
{"sprintf", {NRET_YARGS, NRET_YNARGS, NRET_NARGS, false, false, false}},
@@ -140,16 +140,17 @@
{"fopen", {false, true, true, true, false, false, false, false, false}},
{"getcwd", { true, true, true, true, true, true, false, true, true}},
#endif
- //C++ functions, as mangled on linux gcc 4.2
- //operator new(unsigned long)
+ // C++ functions, as mangled on linux gcc 4.2
+ // operator new(unsigned long)
{"_Znwm", {NRET_NARGS, YRET_NARGS, YRET_NARGS, false, false, false}},
- //operator new[](unsigned long)
+ // operator new[](unsigned long)
{"_Znam", {NRET_NARGS, YRET_NARGS, YRET_NARGS, false, false, false}},
- //operator delete(void*)
+ // operator delete(void*)
{"_ZdlPv", {NRET_NARGS, NRET_NARGS, NRET_YNARGS, false, false, false}},
- //operator delete[](void*)
+ // operator delete[](void*)
{"_ZdaPv", {NRET_NARGS, NRET_NARGS, NRET_YNARGS, false, false, false}},
-
+ // Terminate the list of special functions recognized by this pass
+ {0, {false, false, false, false, false, false}},
};
void StdLibDataStructures::eraseCallsTo(Function* F) {
From evan.cheng at apple.com Tue Oct 14 13:13:38 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 14 Oct 2008 18:13:38 -0000
Subject: [llvm-commits] [llvm] r57513 - in /llvm/trunk:
lib/Transforms/Scalar/InstructionCombining.cpp
test/Transforms/InstCombine/and-fcmp.ll
Message-ID: <200810141813.m9EIDdlf020102@zion.cs.uiuc.edu>
Author: evancheng
Date: Tue Oct 14 13:13:38 2008
New Revision: 57513
URL: http://llvm.org/viewvc/llvm-project?rev=57513&view=rev
Log:
- Somehow I forgot about one / une.
- Renumber fcmp predicates to match their icmp counterparts.
- Try swapping operands to expose more optimization opportunities.
Modified:
llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
llvm/trunk/test/Transforms/InstCombine/and-fcmp.ll
Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=57513&r1=57512&r2=57513&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Oct 14 13:13:38 2008
@@ -3124,14 +3124,16 @@
switch (CC) {
case FCmpInst::FCMP_ORD: isOrdered = true; return 0; // 000
case FCmpInst::FCMP_UNO: return 0; // 000
- case FCmpInst::FCMP_OEQ: isOrdered = true; return 1; // 001
- case FCmpInst::FCMP_UEQ: return 1; // 001
- case FCmpInst::FCMP_OGT: isOrdered = true; return 2; // 010
- case FCmpInst::FCMP_UGT: return 2; // 010
+ case FCmpInst::FCMP_OGT: isOrdered = true; return 1; // 001
+ case FCmpInst::FCMP_UGT: return 1; // 001
+ case FCmpInst::FCMP_OEQ: isOrdered = true; return 2; // 010
+ case FCmpInst::FCMP_UEQ: return 2; // 010
case FCmpInst::FCMP_OGE: isOrdered = true; return 3; // 011
case FCmpInst::FCMP_UGE: return 3; // 011
case FCmpInst::FCMP_OLT: isOrdered = true; return 4; // 100
case FCmpInst::FCMP_ULT: return 4; // 100
+ case FCmpInst::FCMP_ONE: isOrdered = true; return 5; // 101
+ case FCmpInst::FCMP_UNE: return 5; // 101
case FCmpInst::FCMP_OLE: isOrdered = true; return 6; // 110
case FCmpInst::FCMP_ULE: return 6; // 110
default:
@@ -3181,7 +3183,7 @@
static Value *getFCmpValue(bool isordered, unsigned code,
Value *LHS, Value *RHS) {
switch (code) {
- default: assert(0 && "Illegal ICmp code!");
+ default: assert(0 && "Illegal FCmp code!");
case 0:
if (isordered)
return new FCmpInst(FCmpInst::FCMP_ORD, LHS, RHS);
@@ -3189,14 +3191,14 @@
return new FCmpInst(FCmpInst::FCMP_UNO, LHS, RHS);
case 1:
if (isordered)
- return new FCmpInst(FCmpInst::FCMP_OEQ, LHS, RHS);
+ return new FCmpInst(FCmpInst::FCMP_OGT, LHS, RHS);
else
- return new FCmpInst(FCmpInst::FCMP_UEQ, LHS, RHS);
+ return new FCmpInst(FCmpInst::FCMP_UGT, LHS, RHS);
case 2:
if (isordered)
- return new FCmpInst(FCmpInst::FCMP_OGT, LHS, RHS);
+ return new FCmpInst(FCmpInst::FCMP_OEQ, LHS, RHS);
else
- return new FCmpInst(FCmpInst::FCMP_UGT, LHS, RHS);
+ return new FCmpInst(FCmpInst::FCMP_UEQ, LHS, RHS);
case 3:
if (isordered)
return new FCmpInst(FCmpInst::FCMP_OGE, LHS, RHS);
@@ -3209,6 +3211,11 @@
return new FCmpInst(FCmpInst::FCMP_ULT, LHS, RHS);
case 5:
if (isordered)
+ return new FCmpInst(FCmpInst::FCMP_ONE, LHS, RHS);
+ else
+ return new FCmpInst(FCmpInst::FCMP_UNE, LHS, RHS);
+ case 6:
+ if (isordered)
return new FCmpInst(FCmpInst::FCMP_OLE, LHS, RHS);
else
return new FCmpInst(FCmpInst::FCMP_ULE, LHS, RHS);
@@ -3973,6 +3980,11 @@
FCmpInst::Predicate Op0CC, Op1CC;
if (match(Op0, m_FCmp(Op0CC, m_Value(Op0LHS), m_Value(Op0RHS))) &&
match(Op1, m_FCmp(Op1CC, m_Value(Op1LHS), m_Value(Op1RHS)))) {
+ if (Op0LHS == Op1RHS && Op0RHS == Op1LHS) {
+ // Swap RHS operands to match LHS.
+ Op1CC = FCmpInst::getSwappedPredicate(Op1CC);
+ std::swap(Op1LHS, Op1RHS);
+ }
if (Op0LHS == Op1LHS && Op0RHS == Op1RHS) {
// Simplify (fcmp cc0 x, y) & (fcmp cc1 x, y).
if (Op0CC == Op1CC)
Modified: llvm/trunk/test/Transforms/InstCombine/and-fcmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/and-fcmp.ll?rev=57513&r1=57512&r2=57513&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/and-fcmp.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/and-fcmp.ll Tue Oct 14 13:13:38 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep fcmp | count 2
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep fcmp | count 3
; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep ret | grep 0
define zeroext i8 @t1(float %x, float %y) nounwind {
@@ -24,3 +24,11 @@
%retval = zext i1 %c to i8
ret i8 %retval
}
+
+define zeroext i8 @t4(float %x, float %y) nounwind {
+ %a = fcmp one float %y, %x
+ %b = fcmp ord float %x, %y
+ %c = and i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
From gohman at apple.com Tue Oct 14 13:40:51 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 14 Oct 2008 11:40:51 -0700
Subject: [llvm-commits] [llvm] r57495 -
/llvm/trunk/docs/ReleaseNotes.html
In-Reply-To: <200810141834.11548.baldrick@free.fr>
References: <200810141613.m9EGDxtB015106@zion.cs.uiuc.edu>
<200810141834.11548.baldrick@free.fr>
Message-ID:
On Oct 14, 2008, at 9:34 AM, Duncan Sands wrote:
> Hi Dan,
>
>> -- The IRBuilder class is now parametrized by a class
>> responsible
>> +
- The IRBuilder class is now parameterized by a class
>> responsible
>
> are you sure parameterized is correct?
Yes, though checking a few other dictionaries it appears that
some do have "parametrized" as a secondary spelling for
"parameterized".
Dan
From evan.cheng at apple.com Tue Oct 14 13:44:09 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 14 Oct 2008 18:44:09 -0000
Subject: [llvm-commits] [llvm] r57515 - in /llvm/trunk:
lib/Transforms/Scalar/InstructionCombining.cpp
test/Transforms/InstCombine/or-fcmp.ll
Message-ID: <200810141844.m9EIiAmU021415@zion.cs.uiuc.edu>
Author: evancheng
Date: Tue Oct 14 13:44:08 2008
New Revision: 57515
URL: http://llvm.org/viewvc/llvm-project?rev=57515&view=rev
Log:
Combine (fcmp cc0 x, y) | (fcmp cc1 x, y) into a single fcmp when possible.
Added:
llvm/trunk/test/Transforms/InstCombine/or-fcmp.ll
Modified:
llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=57515&r1=57514&r2=57515&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Oct 14 13:44:08 2008
@@ -3136,6 +3136,7 @@
case FCmpInst::FCMP_UNE: return 5; // 101
case FCmpInst::FCMP_OLE: isOrdered = true; return 6; // 110
case FCmpInst::FCMP_ULE: return 6; // 110
+ // True -> 7
default:
// Not expecting FCMP_FALSE and FCMP_TRUE;
assert(0 && "Unexpected FCmp predicate!");
@@ -3219,6 +3220,7 @@
return new FCmpInst(FCmpInst::FCMP_OLE, LHS, RHS);
else
return new FCmpInst(FCmpInst::FCMP_ULE, LHS, RHS);
+ case 7: return ConstantInt::getTrue();
}
}
@@ -4555,7 +4557,7 @@
if (FCmpInst *RHS = dyn_cast(I.getOperand(1))) {
if (LHS->getPredicate() == FCmpInst::FCMP_UNO &&
RHS->getPredicate() == FCmpInst::FCMP_UNO &&
- LHS->getOperand(0)->getType() == RHS->getOperand(0)->getType())
+ LHS->getOperand(0)->getType() == RHS->getOperand(0)->getType()) {
if (ConstantFP *LHSC = dyn_cast(LHS->getOperand(1)))
if (ConstantFP *RHSC = dyn_cast(RHS->getOperand(1))) {
// If either of the constants are nans, then the whole thing returns
@@ -4568,6 +4570,44 @@
return new FCmpInst(FCmpInst::FCMP_UNO, LHS->getOperand(0),
RHS->getOperand(0));
}
+ } else {
+ Value *Op0LHS, *Op0RHS, *Op1LHS, *Op1RHS;
+ FCmpInst::Predicate Op0CC, Op1CC;
+ if (match(Op0, m_FCmp(Op0CC, m_Value(Op0LHS), m_Value(Op0RHS))) &&
+ match(Op1, m_FCmp(Op1CC, m_Value(Op1LHS), m_Value(Op1RHS)))) {
+ if (Op0LHS == Op1RHS && Op0RHS == Op1LHS) {
+ // Swap RHS operands to match LHS.
+ Op1CC = FCmpInst::getSwappedPredicate(Op1CC);
+ std::swap(Op1LHS, Op1RHS);
+ }
+ if (Op0LHS == Op1LHS && Op0RHS == Op1RHS) {
+ // Simplify (fcmp cc0 x, y) | (fcmp cc1 x, y).
+ if (Op0CC == Op1CC)
+ return new FCmpInst((FCmpInst::Predicate)Op0CC, Op0LHS, Op0RHS);
+ else if (Op0CC == FCmpInst::FCMP_TRUE ||
+ Op1CC == FCmpInst::FCMP_TRUE)
+ return ReplaceInstUsesWith(I, ConstantInt::getTrue());
+ else if (Op0CC == FCmpInst::FCMP_FALSE)
+ return ReplaceInstUsesWith(I, Op1);
+ else if (Op1CC == FCmpInst::FCMP_FALSE)
+ return ReplaceInstUsesWith(I, Op0);
+ bool Op0Ordered;
+ bool Op1Ordered;
+ unsigned Op0Pred = getFCmpCode(Op0CC, Op0Ordered);
+ unsigned Op1Pred = getFCmpCode(Op1CC, Op1Ordered);
+ if (Op0Ordered == Op1Ordered) {
+ // If both are ordered or unordered, return a new fcmp with
+ // or'ed predicates.
+ Value *RV = getFCmpValue(Op0Ordered, Op0Pred|Op1Pred,
+ Op0LHS, Op0RHS);
+ if (Instruction *I = dyn_cast(RV))
+ return I;
+ // Otherwise, it's a constant boolean value...
+ return ReplaceInstUsesWith(I, RV);
+ }
+ }
+ }
+ }
}
}
Added: llvm/trunk/test/Transforms/InstCombine/or-fcmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/or-fcmp.ll?rev=57515&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/or-fcmp.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/or-fcmp.ll Tue Oct 14 13:44:08 2008
@@ -0,0 +1,34 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep fcmp | count 3
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep ret | grep 1
+
+define zeroext i8 @t1(float %x, float %y) nounwind {
+ %a = fcmp ueq float %x, %y ; [#uses=1]
+ %b = fcmp uno float %x, %y ; [#uses=1]
+ %c = or i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
+
+define zeroext i8 @t2(float %x, float %y) nounwind {
+ %a = fcmp olt float %x, %y ; [#uses=1]
+ %b = fcmp oeq float %x, %y ; [#uses=1]
+ %c = or i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
+
+define zeroext i8 @t3(float %x, float %y) nounwind {
+ %a = fcmp ult float %x, %y ; [#uses=1]
+ %b = fcmp uge float %x, %y ; [#uses=1]
+ %c = or i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
+
+define zeroext i8 @t4(float %x, float %y) nounwind {
+ %a = fcmp ult float %x, %y ; [#uses=1]
+ %b = fcmp ugt float %x, %y ; [#uses=1]
+ %c = or i1 %a, %b
+ %retval = zext i1 %c to i8
+ ret i8 %retval
+}
From baldrick at free.fr Tue Oct 14 13:52:05 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 14 Oct 2008 20:52:05 +0200
Subject: [llvm-commits] [llvm] r57495 -
/llvm/trunk/docs/ReleaseNotes.html
In-Reply-To:
References: <200810141613.m9EGDxtB015106@zion.cs.uiuc.edu>
<200810141834.11548.baldrick@free.fr>
Message-ID: <200810142052.05235.baldrick@free.fr>
> >> -
- The IRBuilder class is now parametrized by a class
> >> responsible
> >> +
- The IRBuilder class is now parameterized by a class
> >> responsible
> >
> > are you sure parameterized is correct?
>
> Yes, though checking a few other dictionaries it appears that
> some do have "parametrized" as a secondary spelling for
> "parameterized".
I guess "parameterized" is one of those weird American spellings - what
will these crazy colonials come up with next! :)
Ciao,
Duncan.
From alenhar2 at cs.uiuc.edu Tue Oct 14 14:19:53 2008
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Tue, 14 Oct 2008 19:19:53 -0000
Subject: [llvm-commits] [poolalloc] r57516 - in /poolalloc/trunk:
include/poolalloc_runtime/PoolAllocator.h lib/PoolAllocate/PoolAllocate.cpp
lib/PoolAllocate/PoolOptimize.cpp
Message-ID: <200810141919.m9EJJrOM022554@zion.cs.uiuc.edu>
Author: alenhar2
Date: Tue Oct 14 14:19:49 2008
New Revision: 57516
URL: http://llvm.org/viewvc/llvm-project?rev=57516&view=rev
Log:
silence some gcc warnings
Modified:
poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h
poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp
poolalloc/trunk/lib/PoolAllocate/PoolOptimize.cpp
Modified: poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h?rev=57516&r1=57515&r2=57516&view=diff
==============================================================================
--- poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h (original)
+++ poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h Tue Oct 14 14:19:49 2008
@@ -13,22 +13,22 @@
{}
- //In-place new operator
- static void* operator new( std::size_t s, void* p ) throw() {
- return p;
- }
+ //In-place new operator
+ static void* operator new( std::size_t s, void* p ) throw() {
+ return p;
+ }
- //Allocate an object of size objsize
- void* alloc() {
- return slab_alloc(1);
- }
+ //Allocate an object of size objsize
+ void* alloc() {
+ return slab_alloc(1);
+ }
- //Allocate an array with num objects of size objsize
- void* alloc_array(unsigned num) {
- return slab_alloc(num);
- }
+ //Allocate an array with num objects of size objsize
+ void* alloc_array(unsigned num) {
+ return slab_alloc(num);
+ }
- //Free allocated object
+ //Free allocated object
void dealloc(void* obj) {
slab_free(obj);
}
Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp?rev=57516&r1=57515&r2=57516&view=diff
==============================================================================
--- poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Tue Oct 14 14:19:49 2008
@@ -70,7 +70,7 @@
STATISTIC (NumTSPools , "Number of typesafe pools");
STATISTIC (NumPoolFree , "Number of poolfree's elided");
STATISTIC (NumNonprofit, "Number of DSNodes not profitable");
- STATISTIC (NumColocated, "Number of DSNodes colocated");
+ // STATISTIC (NumColocated, "Number of DSNodes colocated");
const Type *VoidPtrTy;
Modified: poolalloc/trunk/lib/PoolAllocate/PoolOptimize.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolOptimize.cpp?rev=57516&r1=57515&r2=57516&view=diff
==============================================================================
--- poolalloc/trunk/lib/PoolAllocate/PoolOptimize.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/PoolOptimize.cpp Tue Oct 14 14:19:49 2008
@@ -43,11 +43,12 @@
// Get the Function out of the constant
Function * F;
ConstantExpr * CE;
- if (!(F=dyn_cast(C)))
+ if (!(F=dyn_cast(C))) {
if ((CE = dyn_cast(C)) && (CE->isCast()))
F = dyn_cast(CE->getOperand(0));
else
assert (0 && "Constant is not a Function of ConstantExpr!");
+ }
Calls.clear();
for (Value::use_iterator UI = F->use_begin(), E = F->use_end(); UI != E; ++UI)
Calls.push_back(cast(*UI));
From nicolas.geoffray at lip6.fr Tue Oct 14 14:23:04 2008
From: nicolas.geoffray at lip6.fr (Nicolas Geoffray)
Date: Tue, 14 Oct 2008 19:23:04 -0000
Subject: [llvm-commits] [llvm] r57517 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <200810141923.m9EJN4BF022680@zion.cs.uiuc.edu>
Author: geoffray
Date: Tue Oct 14 14:23:04 2008
New Revision: 57517
URL: http://llvm.org/viewvc/llvm-project?rev=57517&view=rev
Log:
Add VMKit notes.
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=57517&r1=57516&r2=57517&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Oct 14 14:23:04 2008
@@ -77,7 +77,7 @@
supporting tools) and the llvm-gcc repository. In addition to this code, the
LLVM Project includes other sub-projects that are in development. The two which
are the most actively developed are the Clang Project and
-the vmkit Project.
+the VMKit Project.
@@ -137,17 +137,35 @@
-The vmkit project is an implementation of
+The VMKit project is an implementation of
a JVM and a CLI Virtual Machines (Microsoft .NET is an
implementation of the CLI) using the Just-In-Time compiler of LLVM.
-
[NICOLAS]
+
Following LLVM 2.4, VMKit has its first release 0.24 that you can find on
+the release page. The release includes
+bug fixes, cleanup and new features. The major changes include:
+
+
+Support for generics in the .Net virtual machine. This was implemented
+by Tilmann Scheller during his Google Summer of Code project.
+Initial support for the Mono class libraries.
+Support for MacOSX/x86, following LLVM's support for exceptions in
+JIT on MacOSX/x86.
+
A new vmkit driver: a program to run java or .net applications. The
+driver supports llvm command line arguments including the new "-fast" option.
+
+A new memory allocation scheme in the JVM that makes unloading a
+class loader very fast.
+VMKit now follows the LLVM Makefile machinery.
+
+
+
From dpatel at apple.com Tue Oct 14 15:03:46 2008
From: dpatel at apple.com (Devang Patel)
Date: Tue, 14 Oct 2008 20:03:46 -0000
Subject: [llvm-commits] [llvm] r57518 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <200810142003.m9EK3kC4023883@zion.cs.uiuc.edu>
Author: dpatel
Date: Tue Oct 14 15:03:43 2008
New Revision: 57518
URL: http://llvm.org/viewvc/llvm-project?rev=57518&view=rev
Log:
Document attributes changes.
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=57518&r1=57517&r2=57518&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Oct 14 15:03:43 2008
@@ -490,7 +490,23 @@
-- Attributes changes [DEVANG]
+- Now, function attributes and return value attributes are managed
+sepearately. Interface exported by ParameterAttributes.h header is now
+experted by Attributes.h header. The new attributes interface changes are:
+
+- getParamAttrs method is now replaced by
+getParamAttributes, getRetAttributes and
+getFnAttributes methods.
+- Return value attributes are stored at index 0. Function attributes are
+stored at index ~0U. Parameter attributes are stored at index that matches
+parameter number.
+- ParamAttr namespace is now renamed as Attribute.
+- The name of the class that manages reference count of opaque
+attributes is changed from PAListPtr to AttrListPtr.
+- ParamAttrsWithIndex is now renamed as AttributeWithIndex.
+
+
+
- The DbgStopPointInst methods getDirectory and
getFileName now return Value* instead of strings. These can be
From dalej at apple.com Tue Oct 14 15:18:54 2008
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 14 Oct 2008 20:18:54 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r57519 -
/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/builtins-47.c
Message-ID: <200810142018.m9EKIvxk024427@zion.cs.uiuc.edu>
Author: johannes
Date: Tue Oct 14 15:18:43 2008
New Revision: 57519
URL: http://llvm.org/viewvc/llvm-project?rev=57519&view=rev
Log:
One more test irrelevant to llvm.
Modified:
llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/builtins-47.c
Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/builtins-47.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/builtins-47.c?rev=57519&r1=57518&r2=57519&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/builtins-47.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/builtins-47.c Tue Oct 14 15:18:43 2008
@@ -1,5 +1,7 @@
/* { dg-do run } */
/* { dg-options "-ffast-math -fdump-tree-gimple" } */
+/* LLVM LOCAL no dumps available */
+/* { dg-require-fdump "" } */
extern double sqrt (double);
extern double pow (double, double);
From gohman at apple.com Tue Oct 14 15:25:08 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 14 Oct 2008 20:25:08 -0000
Subject: [llvm-commits] [llvm] r57521 - in /llvm/trunk: lib/CodeGen/
lib/CodeGen/SelectionDAG/ lib/Support/ lib/Target/ lib/Target/ARM/
lib/Target/Alpha/ lib/Target/CBackend/ lib/Target/CellSPU/
lib/Target/CppBackend/ lib/Target/IA64/ lib/Target/MSIL/ lib/Target/Mips/
lib/Target/PIC16/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/
tools/llc/
Message-ID: <200810142025.m9EKP9Uk024703@zion.cs.uiuc.edu>
Author: djg
Date: Tue Oct 14 15:25:08 2008
New Revision: 57521
URL: http://llvm.org/viewvc/llvm-project?rev=57521&view=rev
Log:
Fix command-line option printing to print two spaces where needed,
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.
Modified:
llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp
llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp
llvm/trunk/lib/CodeGen/RegAllocSimple.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/trunk/lib/CodeGen/VirtRegMap.cpp
llvm/trunk/lib/Support/CommandLine.cpp
llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp
llvm/trunk/lib/Target/CBackend/CBackend.cpp
llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp
llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp
llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp
llvm/trunk/lib/Target/MSIL/MSILWriter.cpp
llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp
llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp
llvm/trunk/lib/Target/TargetMachine.cpp
llvm/trunk/lib/Target/X86/X86Subtarget.cpp
llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
llvm/trunk/tools/llc/llc.cpp
Modified: llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp Tue Oct 14 15:25:08 2008
@@ -53,7 +53,7 @@
STATISTIC(NumFolded, "Number of loads/stores folded into instructions");
static RegisterRegAlloc
- bigBlockRegAlloc("bigblock", " Big-block register allocator",
+ bigBlockRegAlloc("bigblock", "Big-block register allocator",
createBigBlockRegisterAllocator);
namespace {
Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Tue Oct 14 15:25:08 2008
@@ -50,7 +50,7 @@
cl::init(false), cl::Hidden);
static RegisterRegAlloc
-linearscanRegAlloc("linearscan", " linear scan register allocator",
+linearscanRegAlloc("linearscan", "linear scan register allocator",
createLinearScanRegisterAllocator);
namespace {
Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Tue Oct 14 15:25:08 2008
@@ -37,7 +37,7 @@
STATISTIC(NumLoads , "Number of loads added");
static RegisterRegAlloc
- localRegAlloc("local", " local register allocator",
+ localRegAlloc("local", "local register allocator",
createLocalRegisterAllocator);
namespace {
Modified: llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp Tue Oct 14 15:25:08 2008
@@ -60,7 +60,7 @@
using namespace llvm;
static RegisterRegAlloc
-registerPBQPRepAlloc("pbqp", " PBQP register allocator",
+registerPBQPRepAlloc("pbqp", "PBQP register allocator",
createPBQPRegisterAllocator);
Modified: llvm/trunk/lib/CodeGen/RegAllocSimple.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocSimple.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocSimple.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocSimple.cpp Tue Oct 14 15:25:08 2008
@@ -35,7 +35,7 @@
namespace {
static RegisterRegAlloc
- simpleRegAlloc("simple", " simple register allocator",
+ simpleRegAlloc("simple", "simple register allocator",
createSimpleRegisterAllocator);
class VISIBILITY_HIDDEN RegAllocSimple : public MachineFunctionPass {
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp Tue Oct 14 15:25:08 2008
@@ -31,7 +31,7 @@
STATISTIC(NumCCCopies, "Number of cross class copies");
static RegisterScheduler
- fastDAGScheduler("fast", " Fast suboptimal list scheduling",
+ fastDAGScheduler("fast", "Fast suboptimal list scheduling",
createFastDAGScheduler);
namespace {
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Tue Oct 14 15:25:08 2008
@@ -37,7 +37,7 @@
STATISTIC(NumStalls, "Number of pipeline stalls");
static RegisterScheduler
- tdListDAGScheduler("list-td", " Top-down list scheduler",
+ tdListDAGScheduler("list-td", "Top-down list scheduler",
createTDListDAGScheduler);
namespace {
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Tue Oct 14 15:25:08 2008
@@ -41,11 +41,11 @@
static RegisterScheduler
burrListDAGScheduler("list-burr",
- " Bottom-up register reduction list scheduling",
+ "Bottom-up register reduction list scheduling",
createBURRListDAGScheduler);
static RegisterScheduler
tdrListrDAGScheduler("list-tdrr",
- " Top-down register reduction list scheduling",
+ "Top-down register reduction list scheduling",
createTDRRListDAGScheduler);
namespace {
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Oct 14 15:25:08 2008
@@ -119,7 +119,7 @@
" allocation):"));
static RegisterScheduler
-defaultListDAGScheduler("default", " Best scheduler for the target",
+defaultListDAGScheduler("default", "Best scheduler for the target",
createDefaultScheduler);
namespace llvm {
Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original)
+++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Tue Oct 14 15:25:08 2008
@@ -56,8 +56,8 @@
SpillerOpt("spiller",
cl::desc("Spiller to use: (default: local)"),
cl::Prefix,
- cl::values(clEnumVal(simple, " simple spiller"),
- clEnumVal(local, " local spiller"),
+ cl::values(clEnumVal(simple, "simple spiller"),
+ clEnumVal(local, "local spiller"),
clEnumValEnd),
cl::init(local));
Modified: llvm/trunk/lib/Support/CommandLine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/CommandLine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Support/CommandLine.cpp (original)
+++ llvm/trunk/lib/Support/CommandLine.cpp Tue Oct 14 15:25:08 2008
@@ -953,7 +953,7 @@
for (unsigned i = 0, e = getNumOptions(); i != e; ++i) {
size_t NumSpaces = GlobalWidth-strlen(getOption(i))-8;
cout << " =" << getOption(i) << std::string(NumSpaces, ' ')
- << " - " << getDescription(i) << "\n";
+ << " - " << getDescription(i) << "\n";
}
} else {
if (O.HelpStr[0])
Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -29,8 +29,8 @@
cl::desc("Disable if-conversion pass"));
// Register the target.
-static RegisterTarget X("arm", " ARM");
-static RegisterTarget Y("thumb", " Thumb");
+static RegisterTarget X("arm", "ARM");
+static RegisterTarget Y("thumb", "Thumb");
// No assembler printer by default
ARMTargetMachine::AsmPrinterCtorFn ARMTargetMachine::AsmPrinterCtor = 0;
Modified: llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -22,7 +22,7 @@
using namespace llvm;
// Register the targets
-static RegisterTarget X("alpha", " Alpha (incomplete)");
+static RegisterTarget X("alpha", "Alpha (incomplete)");
const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
return new AlphaTargetAsmInfo(*this);
Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original)
+++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Tue Oct 14 15:25:08 2008
@@ -49,7 +49,7 @@
using namespace llvm;
// Register the target.
-static RegisterTarget X("c", " C backend");
+static RegisterTarget X("c", "C backend");
namespace {
/// CBackendNameAllUsedStructsAndMergeFunctions - This pass inserts names for
Modified: llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -24,7 +24,7 @@
namespace {
// Register the targets
RegisterTarget
- CELLSPU("cellspu", " STI CBEA Cell SPU");
+ CELLSPU("cellspu", "STI CBEA Cell SPU");
}
const std::pair *
Modified: llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp (original)
+++ llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp Tue Oct 14 15:25:08 2008
@@ -72,7 +72,7 @@
cl::init("!bad!"));
// Register the target.
-static RegisterTarget X("cpp", " C++ backend");
+static RegisterTarget X("cpp", "C++ backend");
namespace {
typedef std::vector TypeList;
Modified: llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -26,7 +26,7 @@
extern "C" int IA64TargetMachineModule;
int IA64TargetMachineModule = 0;
-static RegisterTarget X("ia64", " IA-64 (Itanium)");
+static RegisterTarget X("ia64", "IA-64 (Itanium)");
const TargetAsmInfo *IA64TargetMachine::createTargetAsmInfo() const {
return new IA64TargetAsmInfo(*this);
Modified: llvm/trunk/lib/Target/MSIL/MSILWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSIL/MSILWriter.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSIL/MSILWriter.cpp (original)
+++ llvm/trunk/lib/Target/MSIL/MSILWriter.cpp Tue Oct 14 15:25:08 2008
@@ -45,7 +45,7 @@
}
-static RegisterTarget X("msil", " MSIL backend");
+static RegisterTarget X("msil", "MSIL backend");
bool MSILModule::runOnModule(Module &M) {
ModulePtr = &M;
Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -20,8 +20,8 @@
using namespace llvm;
// Register the target.
-static RegisterTarget X("mips", " Mips");
-static RegisterTarget Y("mipsel", " Mipsel");
+static RegisterTarget X("mips", "Mips");
+static RegisterTarget Y("mipsel", "Mipsel");
const TargetAsmInfo *MipsTargetMachine::
createTargetAsmInfo() const
Modified: llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -23,7 +23,7 @@
namespace {
// Register the targets
- RegisterTarget X("pic16", " PIC16 14-bit");
+ RegisterTarget X("pic16", "PIC16 14-bit");
}
PIC16TargetMachine::
Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -23,9 +23,9 @@
// Register the targets
static RegisterTarget
-X("ppc32", " PowerPC 32");
+X("ppc32", "PowerPC 32");
static RegisterTarget
-Y("ppc64", " PowerPC 64");
+Y("ppc64", "PowerPC 64");
// No assembler printer by default
PPCTargetMachine::AsmPrinterCtorFn PPCTargetMachine::AsmPrinterCtor = 0;
Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -19,7 +19,7 @@
using namespace llvm;
// Register the target.
-static RegisterTarget X("sparc", " SPARC");
+static RegisterTarget X("sparc", "SPARC");
const TargetAsmInfo *SparcTargetMachine::createTargetAsmInfo() const {
// FIXME: Handle Solaris subtarget someday :)
Modified: llvm/trunk/lib/Target/TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/TargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -102,13 +102,13 @@
cl::init(Reloc::Default),
cl::values(
clEnumValN(Reloc::Default, "default",
- " Target default relocation model"),
+ "Target default relocation model"),
clEnumValN(Reloc::Static, "static",
- " Non-relocatable code"),
+ "Non-relocatable code"),
clEnumValN(Reloc::PIC_, "pic",
- " Fully relocatable, position independent code"),
+ "Fully relocatable, position independent code"),
clEnumValN(Reloc::DynamicNoPIC, "dynamic-no-pic",
- " Relocatable external references, non-relocatable code"),
+ "Relocatable external references, non-relocatable code"),
clEnumValEnd));
static cl::opt
DefCodeModel(
@@ -118,15 +118,15 @@
cl::init(CodeModel::Default),
cl::values(
clEnumValN(CodeModel::Default, "default",
- " Target default code model"),
+ "Target default code model"),
clEnumValN(CodeModel::Small, "small",
- " Small code model"),
+ "Small code model"),
clEnumValN(CodeModel::Kernel, "kernel",
- " Kernel code model"),
+ "Kernel code model"),
clEnumValN(CodeModel::Medium, "medium",
- " Medium code model"),
+ "Medium code model"),
clEnumValN(CodeModel::Large, "large",
- " Large code model"),
+ "Large code model"),
clEnumValEnd));
static cl::opt
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Tue Oct 14 15:25:08 2008
@@ -23,8 +23,8 @@
AsmWriterFlavor("x86-asm-syntax", cl::init(X86Subtarget::Unset),
cl::desc("Choose style of code to emit from X86 backend:"),
cl::values(
- clEnumValN(X86Subtarget::ATT, "att", " Emit AT&T-style assembly"),
- clEnumValN(X86Subtarget::Intel, "intel", " Emit Intel-style assembly"),
+ clEnumValN(X86Subtarget::ATT, "att", "Emit AT&T-style assembly"),
+ clEnumValN(X86Subtarget::Intel, "intel", "Emit Intel-style assembly"),
clEnumValEnd));
Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -32,9 +32,9 @@
// Register the target.
static RegisterTarget
-X("x86", " 32-bit X86: Pentium-Pro and above");
+X("x86", "32-bit X86: Pentium-Pro and above");
static RegisterTarget
-Y("x86-64", " 64-bit X86: EM64T and AMD64");
+Y("x86-64", "64-bit X86: EM64T and AMD64");
// No assembler printer by default
X86TargetMachine::AsmPrinterCtorFn X86TargetMachine::AsmPrinterCtor = 0;
Modified: llvm/trunk/tools/llc/llc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llc/llc.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/tools/llc/llc.cpp (original)
+++ llvm/trunk/tools/llc/llc.cpp Tue Oct 14 15:25:08 2008
@@ -80,11 +80,11 @@
cl::desc("Choose a file type (not all types are supported by all targets):"),
cl::values(
clEnumValN(TargetMachine::AssemblyFile, "asm",
- " Emit an assembly ('.s') file"),
+ "Emit an assembly ('.s') file"),
clEnumValN(TargetMachine::ObjectFile, "obj",
- " Emit a native object ('.o') file [experimental]"),
+ "Emit a native object ('.o') file [experimental]"),
clEnumValN(TargetMachine::DynamicLibrary, "dynlib",
- " Emit a native dynamic library ('.so') file"
+ "Emit a native dynamic library ('.so') file"
" [experimental]"),
clEnumValEnd));
From dpatel at apple.com Tue Oct 14 15:30:55 2008
From: dpatel at apple.com (Devang Patel)
Date: Tue, 14 Oct 2008 20:30:55 -0000
Subject: [llvm-commits] [llvm] r57522 - /llvm/trunk/include/llvm/Attributes.h
Message-ID: <200810142030.m9EKUtBQ024898@zion.cs.uiuc.edu>
Author: dpatel
Date: Tue Oct 14 15:30:54 2008
New Revision: 57522
URL: http://llvm.org/viewvc/llvm-project?rev=57522&view=rev
Log:
Remove dead code.
Modified:
llvm/trunk/include/llvm/Attributes.h
Modified: llvm/trunk/include/llvm/Attributes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Attributes.h?rev=57522&r1=57521&r2=57522&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Attributes.h (original)
+++ llvm/trunk/include/llvm/Attributes.h Tue Oct 14 15:30:54 2008
@@ -84,9 +84,6 @@
std::string getAsString(Attributes Attrs);
} // end namespace Attribute
-namespace Attribute {
-} // end namespace Attribute
-
/// This is just a pair of values to associate a set of attributes
/// with an index.
struct AttributeWithIndex {
From dalej at apple.com Tue Oct 14 15:34:39 2008
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 14 Oct 2008 20:34:39 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r57523 -
/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pr26570.c
Message-ID: <200810142034.m9EKYd63025046@zion.cs.uiuc.edu>
Author: johannes
Date: Tue Oct 14 15:34:39 2008
New Revision: 57523
URL: http://llvm.org/viewvc/llvm-project?rev=57523&view=rev
Log:
Need profiling for this one.
Modified:
llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pr26570.c
Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pr26570.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pr26570.c?rev=57523&r1=57522&r2=57523&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pr26570.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/pr26570.c Tue Oct 14 15:34:39 2008
@@ -1,5 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-O2 -fprofile-generate -fprofile-use" } */
+/* LLVM LOCAL profiling support needed */
+/* { dg-require-profiling "" } */
unsigned test (unsigned a, unsigned b)
{
From grosbach at apple.com Tue Oct 14 15:36:24 2008
From: grosbach at apple.com (Jim Grosbach)
Date: Tue, 14 Oct 2008 20:36:24 -0000
Subject: [llvm-commits] [llvm] r57524 - in /llvm/trunk/lib/Target/ARM:
ARMInstrFormats.td ARMInstrInfo.td
Message-ID: <200810142036.m9EKaO7V025116@zion.cs.uiuc.edu>
Author: grosbach
Date: Tue Oct 14 15:36:24 2008
New Revision: 57524
URL: http://llvm.org/viewvc/llvm-project?rev=57524&view=rev
Log:
Update ARM Insn encoding to get endian-ness to match the documentation (31-0 left to right)
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=57524&r1=57523&r2=57524&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Tue Oct 14 15:36:24 2008
@@ -141,15 +141,13 @@
string asm, list pattern>
: I {
- let Inst{24} = 1; // L bit
- let Inst{25-27} = {1,0,1};
+ let Inst{27-24} = opcod;
}
class ABLI opcod, dag oops, dag iops, Format f, string asm,
list pattern>
: XI {
- let Inst{24} = 1; // L bit
- let Inst{25-27} = {1,0,1};
+ let Inst{27-24} = opcod;
}
// FIXME: BX
class AXIx2 opcod, dag oops, dag iops, Format f, string asm,
@@ -160,15 +158,13 @@
list pattern>
: XI {
- let Inst{24} = 0; // L bit
- let Inst{25-27} = {1,0,1};
+ let Inst{27-24} = opcod;
}
class ABccI opcod, dag oops, dag iops, Format f, string opc,
string asm, list pattern>
: I {
- let Inst{24} = 0; // L bit
- let Inst{25-27} = {1,0,1};
+ let Inst{27-24} = opcod;
}
// BR_JT instructions
@@ -177,16 +173,16 @@
: XI {
let Inst{20} = 0; // S Bit
- let Inst{21-24} = {1,0,1,1};
- let Inst{26-27} = {0,0};
+ let Inst{24-21} = opcod;
+ let Inst{27-26} = {0,0};
}
// == add pc
class JTI1 opcod, dag oops, dag iops, string asm, list pattern>
: XI {
let Inst{20} = 0; // S bit
- let Inst{21-24} = {0,0,1,0};
- let Inst{26-27} = {0,0};
+ let Inst{24-21} = opcod;
+ let Inst{27-26} = {0,0};
}
// == ldr pc
class JTI2 opcod, dag oops, dag iops, string asm, list pattern>
@@ -196,7 +192,7 @@
let Inst{21} = 0; // W bit
let Inst{22} = 0; // B bit
let Inst{24} = 1; // P bit
- let Inst{26-27} = {0,0};
+ let Inst{27-26} = {0,1};
}
@@ -205,22 +201,22 @@
string asm, list pattern>
: I {
- let Inst{21-24} = opcod;
- let Inst{26-27} = {0,0};
+ let Inst{24-21} = opcod;
+ let Inst{27-26} = {0,0};
}
class AsI1 opcod, dag oops, dag iops, Format f, string opc,
string asm, list pattern>
: sI {
- let Inst{21-24} = opcod;
- let Inst{26-27} = {0,0};
+ let Inst{24-21} = opcod;
+ let Inst{27-26} = {0,0};
}
class AXI1 opcod, dag oops, dag iops, Format f, string asm,
list pattern>
: XI {
- let Inst{21-24} = opcod;
- let Inst{26-27} = {0,0};
+ let Inst{24-21} = opcod;
+ let Inst{27-26} = {0,0};
}
class AI1x2 opcod, dag oops, dag iops, Format f, string opc,
string asm, list pattern>
@@ -233,7 +229,7 @@
string asm, list pattern>
: I {
- let Inst{26-27} = {1,0};
+ let Inst{27-26} = {0,1};
}
class AXI2 opcod, dag oops, dag iops, Format f, string asm,
list pattern>
@@ -644,7 +640,7 @@
"", pattern> {
let Inst{20} = 1; // L bit
let Inst{22} = 0; // S bit
- let Inst{25-27} = {0,0,1};
+ let Inst{27-25} = 0b100;
}
class AXI4ldpc opcod, dag oops, dag iops, Format f, string asm,
list pattern>
@@ -652,7 +648,7 @@
"", pattern> {
let Inst{20} = 1; // L bit
let Inst{22} = 1; // S bit
- let Inst{25-27} = {0,0,1};
+ let Inst{27-25} = 0b100;
}
class AXI4st opcod, dag oops, dag iops, Format f, string asm,
list pattern>
@@ -660,7 +656,7 @@
"", pattern> {
let Inst{20} = 0; // L bit
let Inst{22} = 0; // S bit
- let Inst{25-27} = {0,0,1};
+ let Inst{27-25} = 0b100;
}
Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=57524&r1=57523&r2=57524&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Oct 14 15:36:24 2008
@@ -521,9 +521,9 @@
let isReturn = 1, isTerminator = 1 in
def BX_RET : AI<0x0, (outs), (ins), BranchMisc, "bx", " lr", [(ARMretflag)]> {
- let Inst{4-7} = {1,0,0,0};
- let Inst{8-19} = {1,1,1,1,1,1,1,1,1,1,1,1};
- let Inst{20-27} = {0,1,0,0,1,0,0,0};
+ let Inst{7-4} = 0b0001;
+ let Inst{19-8} = 0b111111111111;
+ let Inst{27-20} = 0b00010010;
}
// FIXME: remove when we have a way to marking a MI with these properties.
@@ -550,9 +550,9 @@
def BLX : AXI<0x0, (outs), (ins GPR:$func, variable_ops), BranchMisc,
"blx $func",
[(ARMcall GPR:$func)]>, Requires<[IsARM, HasV5T]> {
- let Inst{4-7} = {1,1,0,0};
- let Inst{8-19} = {1,1,1,1,1,1,1,1,1,1,1,1};
- let Inst{20-27} = {0,1,0,0,1,0,0,0};
+ let Inst{7-4} = 0b0011;
+ let Inst{19-8} = 0b111111111111;
+ let Inst{27-20} = 0b00010010;
}
let Uses = [LR] in {
@@ -567,18 +567,18 @@
// B is "predicable" since it can be xformed into a Bcc.
let isBarrier = 1 in {
let isPredicable = 1 in
- def B : ABI<{0,1,0,1}, (outs), (ins brtarget:$target), Branch, "b $target",
+ def B : ABI<0xA, (outs), (ins brtarget:$target), Branch, "b $target",
[(br bb:$target)]>;
let isNotDuplicable = 1, isIndirectBranch = 1 in {
- def BR_JTr : JTI<0x0, (outs), (ins GPR:$target, jtblock_operand:$jt, i32imm:$id),
+ def BR_JTr : JTI<0b1101, (outs), (ins GPR:$target, jtblock_operand:$jt, i32imm:$id),
"mov pc, $target \n$jt",
[(ARMbrjt GPR:$target, tjumptable:$jt, imm:$id)]>;
def BR_JTm : JTI2<0x0, (outs), (ins addrmode2:$target, jtblock_operand:$jt, i32imm:$id),
"ldr pc, $target \n$jt",
[(ARMbrjt (i32 (load addrmode2:$target)), tjumptable:$jt,
imm:$id)]>;
- def BR_JTadd : JTI1<0x0, (outs), (ins GPR:$target, GPR:$idx, jtblock_operand:$jt,
+ def BR_JTadd : JTI1<0b0100, (outs), (ins GPR:$target, GPR:$idx, jtblock_operand:$jt,
i32imm:$id),
"add pc, $target, $idx \n$jt",
[(ARMbrjt (add GPR:$target, GPR:$idx), tjumptable:$jt,
@@ -752,16 +752,16 @@
// Move Instructions.
//
-def MOVr : AsI1<{1,0,1,1}, (outs GPR:$dst), (ins GPR:$src), DPRdReg,
+def MOVr : AsI1<0b1101, (outs GPR:$dst), (ins GPR:$src), DPRdReg,
"mov", " $dst, $src", []>;
-def MOVs : AsI1<{1,0,1,1}, (outs GPR:$dst), (ins so_reg:$src), DPRdSoReg,
+def MOVs : AsI1<0b1101, (outs GPR:$dst), (ins so_reg:$src), DPRdSoReg,
"mov", " $dst, $src", [(set GPR:$dst, so_reg:$src)]>;
let isReMaterializable = 1 in
-def MOVi : AsI1<{1,0,1,1}, (outs GPR:$dst), (ins so_imm:$src), DPRdIm,
+def MOVi : AsI1<0b1101, (outs GPR:$dst), (ins so_imm:$src), DPRdIm,
"mov", " $dst, $src", [(set GPR:$dst, so_imm:$src)]>;
-def MOVrx : AsI1<{1,0,1,1}, (outs GPR:$dst), (ins GPR:$src), DPRdMisc,
+def MOVrx : AsI1<0b1101, (outs GPR:$dst), (ins GPR:$src), DPRdMisc,
"mov", " $dst, $src, rrx",
[(set GPR:$dst, (ARMrrx GPR:$src))]>;
@@ -769,10 +769,10 @@
// due to flag operands.
let Defs = [CPSR] in {
-def MOVsrl_flag : AI1<{1,0,1,1}, (outs GPR:$dst), (ins GPR:$src), DPRdMisc,
+def MOVsrl_flag : AI1<0b1101, (outs GPR:$dst), (ins GPR:$src), DPRdMisc,
"mov", "s $dst, $src, lsr #1",
[(set GPR:$dst, (ARMsrl_flag GPR:$src))]>;
-def MOVsra_flag : AI1<{1,0,1,1}, (outs GPR:$dst), (ins GPR:$src), DPRdMisc,
+def MOVsra_flag : AI1<0b1101, (outs GPR:$dst), (ins GPR:$src), DPRdMisc,
"mov", "s $dst, $src, asr #1",
[(set GPR:$dst, (ARMsra_flag GPR:$src))]>;
}
@@ -820,48 +820,48 @@
// Arithmetic Instructions.
//
-defm ADD : AsI1_bin_irs<{0,0,1,0}, "add",
+defm ADD : AsI1_bin_irs<0b0100, "add",
BinOpFrag<(add node:$LHS, node:$RHS)>>;
-defm SUB : AsI1_bin_irs<{0,1,0,0}, "sub",
+defm SUB : AsI1_bin_irs<0b0010, "sub",
BinOpFrag<(sub node:$LHS, node:$RHS)>>;
// ADD and SUB with 's' bit set.
-defm ADDS : ASI1_bin_s_irs<{0,0,1,0}, "add",
+defm ADDS : ASI1_bin_s_irs<0b0100, "add",
BinOpFrag<(addc node:$LHS, node:$RHS)>>;
-defm SUBS : ASI1_bin_s_irs<{0,1,0,0}, "sub",
+defm SUBS : ASI1_bin_s_irs<0b0010, "sub",
BinOpFrag<(subc node:$LHS, node:$RHS)>>;
// FIXME: Do not allow ADC / SBC to be predicated for now.
-defm ADC : AsXI1_bin_c_irs<{1,0,1,0}, "adc",
+defm ADC : AsXI1_bin_c_irs<0b0101, "adc",
BinOpFrag<(adde node:$LHS, node:$RHS)>>;
-defm SBC : AsXI1_bin_c_irs<{0,1,1,0}, "sbc",
+defm SBC : AsXI1_bin_c_irs<0b0110, "sbc",
BinOpFrag<(sube node:$LHS, node:$RHS)>>;
// These don't define reg/reg forms, because they are handled above.
-def RSBri : AsI1<{1,1,0,0}, (outs GPR:$dst), (ins GPR:$a, so_imm:$b), DPRIm,
+def RSBri : AsI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_imm:$b), DPRIm,
"rsb", " $dst, $a, $b",
[(set GPR:$dst, (sub so_imm:$b, GPR:$a))]>;
-def RSBrs : AsI1<{1,1,0,0}, (outs GPR:$dst), (ins GPR:$a, so_reg:$b), DPRSoReg,
+def RSBrs : AsI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_reg:$b), DPRSoReg,
"rsb", " $dst, $a, $b",
[(set GPR:$dst, (sub so_reg:$b, GPR:$a))]>;
// RSB with 's' bit set.
let Defs = [CPSR] in {
-def RSBSri : AI1<{1,1,0,0}, (outs GPR:$dst), (ins GPR:$a, so_imm:$b), DPRIm,
+def RSBSri : AI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_imm:$b), DPRIm,
"rsb", "s $dst, $a, $b",
[(set GPR:$dst, (subc so_imm:$b, GPR:$a))]>;
-def RSBSrs : AI1<{1,1,0,0}, (outs GPR:$dst), (ins GPR:$a, so_reg:$b), DPRSoReg,
+def RSBSrs : AI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_reg:$b), DPRSoReg,
"rsb", "s $dst, $a, $b",
[(set GPR:$dst, (subc so_reg:$b, GPR:$a))]>;
}
// FIXME: Do not allow RSC to be predicated for now. But they can set CPSR.
let Uses = [CPSR] in {
-def RSCri : AXI1<{1,1,1,0}, (outs GPR:$dst), (ins GPR:$a, so_imm:$b, cc_out:$s),
+def RSCri : AXI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_imm:$b, cc_out:$s),
DPRIm, "rsc${s} $dst, $a, $b",
[(set GPR:$dst, (sube so_imm:$b, GPR:$a))]>;
-def RSCrs : AXI1<{1,1,1,0}, (outs GPR:$dst), (ins GPR:$a, so_reg:$b, cc_out:$s),
+def RSCrs : AXI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b, cc_out:$s),
DPRSoReg, "rsc${s} $dst, $a, $b",
[(set GPR:$dst, (sube so_reg:$b, GPR:$a))]>;
}
@@ -886,21 +886,21 @@
// Bitwise Instructions.
//
-defm AND : AsI1_bin_irs<{0,0,0,0}, "and",
+defm AND : AsI1_bin_irs<0b0000, "and",
BinOpFrag<(and node:$LHS, node:$RHS)>>;
-defm ORR : AsI1_bin_irs<{0,0,1,1}, "orr",
+defm ORR : AsI1_bin_irs<0b1100, "orr",
BinOpFrag<(or node:$LHS, node:$RHS)>>;
-defm EOR : AsI1_bin_irs<{1,0,0,0}, "eor",
+defm EOR : AsI1_bin_irs<0b0001, "eor",
BinOpFrag<(xor node:$LHS, node:$RHS)>>;
-defm BIC : AsI1_bin_irs<{0,1,1,1}, "bic",
+defm BIC : AsI1_bin_irs<0b1110, "bic",
BinOpFrag<(and node:$LHS, (not node:$RHS))>>;
-def MVNr : AsI1<{1,1,1,1}, (outs GPR:$dst), (ins GPR:$src), DPRdReg,
+def MVNr : AsI1<0b1111, (outs GPR:$dst), (ins GPR:$src), DPRdReg,
"mvn", " $dst, $src", [(set GPR:$dst, (not GPR:$src))]>;
-def MVNs : AsI1<{1,1,1,1}, (outs GPR:$dst), (ins so_reg:$src), DPRdSoReg,
+def MVNs : AsI1<0b1111, (outs GPR:$dst), (ins so_reg:$src), DPRdSoReg,
"mvn", " $dst, $src", [(set GPR:$dst, (not so_reg:$src))]>;
let isReMaterializable = 1 in
-def MVNi : AsI1<{1,1,1,1}, (outs GPR:$dst), (ins so_imm:$imm), DPRdIm,
+def MVNi : AsI1<0b1111, (outs GPR:$dst), (ins so_imm:$imm), DPRdIm,
"mvn", " $dst, $imm", [(set GPR:$dst, so_imm_not:$imm)]>;
def : ARMPat<(and GPR:$src, so_imm_not:$imm),
@@ -1099,9 +1099,9 @@
// Comparison Instructions...
//
-defm CMP : AI1_cmp_irs<{0,1,0,1}, "cmp",
+defm CMP : AI1_cmp_irs<0b1010, "cmp",
BinOpFrag<(ARMcmp node:$LHS, node:$RHS)>>;
-defm CMN : AI1_cmp_irs<{1,1,0,1}, "cmn",
+defm CMN : AI1_cmp_irs<0b1011, "cmn",
BinOpFrag<(ARMcmp node:$LHS,(ineg node:$RHS))>>;
// Note that TST/TEQ don't set all the same flags that CMP does!
@@ -1110,9 +1110,9 @@
defm TEQ : AI1_cmp_irs<0x9, "teq",
BinOpFrag<(ARMcmpNZ (xor node:$LHS, node:$RHS), 0)>>;
-defm CMPnz : AI1_cmp_irs<{0,1,0,1}, "cmp",
+defm CMPnz : AI1_cmp_irs<0b1010, "cmp",
BinOpFrag<(ARMcmpNZ node:$LHS, node:$RHS)>>;
-defm CMNnz : AI1_cmp_irs<{1,1,0,1}, "cmn",
+defm CMNnz : AI1_cmp_irs<0b1011, "cmn",
BinOpFrag<(ARMcmpNZ node:$LHS,(ineg node:$RHS))>>;
def : ARMPat<(ARMcmp GPR:$src, so_imm_neg:$imm),
From dalej at apple.com Tue Oct 14 16:21:53 2008
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 14 Oct 2008 21:21:53 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r57525 -
/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20020616-1.c
Message-ID: <200810142121.m9ELLrr0026710@zion.cs.uiuc.edu>
Author: johannes
Date: Tue Oct 14 16:21:50 2008
New Revision: 57525
URL: http://llvm.org/viewvc/llvm-project?rev=57525&view=rev
Log:
Fix dg-skip-if command so it works.
Modified:
llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20020616-1.c
Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20020616-1.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20020616-1.c?rev=57525&r1=57524&r2=57525&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20020616-1.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/20020616-1.c Tue Oct 14 16:21:50 2008
@@ -1,7 +1,8 @@
/* PR opt/6722 */
/* { dg-do run { target i?86-*-* x86_64-*-* } } */
/* APPLE LOCAL 5951276 */
-/* { dg-skip-if "" { i?86-apple-darwin* } } */
+/* LLVM LOCAL I need {"*"} and {""} explicitly for some reason */
+/* { dg-skip-if "" { i?86-apple-darwin* } {"*"} {""} } */
/* { dg-options "-O2" } */
register int k asm("%ebx");
From evan.cheng at apple.com Tue Oct 14 16:26:46 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 14 Oct 2008 21:26:46 -0000
Subject: [llvm-commits] [llvm] r57526 - in /llvm/trunk:
include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/SelectionDAG/
lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/IA64/
lib/Target/Mips/ lib/Target/PIC16/ lib/Target/PowerPC/ lib/Target/Sparc/
lib/Target/X86/
Message-ID: <200810142126.m9ELQlZq026890@zion.cs.uiuc.edu>
Author: evancheng
Date: Tue Oct 14 16:26:46 2008
New Revision: 57526
URL: http://llvm.org/viewvc/llvm-project?rev=57526&view=rev
Log:
Rename LoadX to LoadExt.
Modified:
llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
llvm/trunk/include/llvm/Target/TargetLowering.h
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp
llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp
llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp
llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=57526&r1=57525&r2=57526&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Tue Oct 14 16:26:46 2008
@@ -734,7 +734,7 @@
EXTLOAD,
SEXTLOAD,
ZEXTLOAD,
- LAST_LOADX_TYPE
+ LAST_LOADEXT_TYPE
};
//===--------------------------------------------------------------------===//
Modified: llvm/trunk/include/llvm/Target/TargetLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=57526&r1=57525&r2=57526&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetLowering.h (original)
+++ llvm/trunk/include/llvm/Target/TargetLowering.h Tue Oct 14 16:26:46 2008
@@ -305,23 +305,23 @@
getOperationAction(Op, VT) == Custom);
}
- /// getLoadXAction - Return how this load with extension should be treated:
+ /// getLoadExtAction - Return how this load with extension should be treated:
/// either it is legal, needs to be promoted to a larger size, needs to be
/// expanded to some other code sequence, or the target has a custom expander
/// for it.
- LegalizeAction getLoadXAction(unsigned LType, MVT VT) const {
- assert(LType < array_lengthof(LoadXActions) &&
- (unsigned)VT.getSimpleVT() < sizeof(LoadXActions[0])*4 &&
+ LegalizeAction getLoadExtAction(unsigned LType, MVT VT) const {
+ assert(LType < array_lengthof(LoadExtActions) &&
+ (unsigned)VT.getSimpleVT() < sizeof(LoadExtActions[0])*4 &&
"Table isn't big enough!");
- return (LegalizeAction)((LoadXActions[LType] >> (2*VT.getSimpleVT())) & 3);
+ return (LegalizeAction)((LoadExtActions[LType] >> (2*VT.getSimpleVT())) & 3);
}
- /// isLoadXLegal - Return true if the specified load with extension is legal
+ /// isLoadExtLegal - Return true if the specified load with extension is legal
/// on this target.
- bool isLoadXLegal(unsigned LType, MVT VT) const {
+ bool isLoadExtLegal(unsigned LType, MVT VT) const {
return VT.isSimple() &&
- (getLoadXAction(LType, VT) == Legal ||
- getLoadXAction(LType, VT) == Custom);
+ (getLoadExtAction(LType, VT) == Legal ||
+ getLoadExtAction(LType, VT) == Custom);
}
/// getTruncStoreAction - Return how this store with truncation should be
@@ -839,15 +839,15 @@
OpActions[Op] |= (uint64_t)Action << VT.getSimpleVT()*2;
}
- /// setLoadXAction - Indicate that the specified load with extension does not
- /// work with the with specified type and indicate what to do about it.
- void setLoadXAction(unsigned ExtType, MVT VT,
+ /// setLoadExtAction - Indicate that the specified load with extension does
+ /// not work with the with specified type and indicate what to do about it.
+ void setLoadExtAction(unsigned ExtType, MVT VT,
LegalizeAction Action) {
- assert((unsigned)VT.getSimpleVT() < sizeof(LoadXActions[0])*4 &&
- ExtType < array_lengthof(LoadXActions) &&
+ assert((unsigned)VT.getSimpleVT() < sizeof(LoadExtActions[0])*4 &&
+ ExtType < array_lengthof(LoadExtActions) &&
"Table isn't big enough!");
- LoadXActions[ExtType] &= ~(uint64_t(3UL) << VT.getSimpleVT()*2);
- LoadXActions[ExtType] |= (uint64_t)Action << VT.getSimpleVT()*2;
+ LoadExtActions[ExtType] &= ~(uint64_t(3UL) << VT.getSimpleVT()*2);
+ LoadExtActions[ExtType] |= (uint64_t)Action << VT.getSimpleVT()*2;
}
/// setTruncStoreAction - Indicate that the specified truncating store does
@@ -1411,10 +1411,10 @@
/// non-legal value types are not described here.
uint64_t OpActions[OpActionsCapacity];
- /// LoadXActions - For each load of load extension type and each value type,
+ /// LoadExtActions - For each load of load extension type and each value type,
/// keep a LegalizeAction that indicates how instruction selection should deal
/// with the load.
- uint64_t LoadXActions[ISD::LAST_LOADX_TYPE];
+ uint64_t LoadExtActions[ISD::LAST_LOADEXT_TYPE];
/// TruncStoreActions - For each truncating store, keep a LegalizeAction that
/// indicates how instruction selection should deal with the store.
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=57526&r1=57525&r2=57526&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Oct 14 16:26:46 2008
@@ -1724,7 +1724,7 @@
if (DAG.MaskedValueIsZero(N1, APInt::getHighBitsSet(BitWidth,
BitWidth - EVT.getSizeInBits())) &&
((!AfterLegalize && !LN0->isVolatile()) ||
- TLI.isLoadXLegal(ISD::ZEXTLOAD, EVT))) {
+ TLI.isLoadExtLegal(ISD::ZEXTLOAD, EVT))) {
SDValue ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, VT, LN0->getChain(),
LN0->getBasePtr(), LN0->getSrcValue(),
LN0->getSrcValueOffset(), EVT,
@@ -1746,7 +1746,7 @@
if (DAG.MaskedValueIsZero(N1, APInt::getHighBitsSet(BitWidth,
BitWidth - EVT.getSizeInBits())) &&
((!AfterLegalize && !LN0->isVolatile()) ||
- TLI.isLoadXLegal(ISD::ZEXTLOAD, EVT))) {
+ TLI.isLoadExtLegal(ISD::ZEXTLOAD, EVT))) {
SDValue ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, VT, LN0->getChain(),
LN0->getBasePtr(), LN0->getSrcValue(),
LN0->getSrcValueOffset(), EVT,
@@ -1775,7 +1775,7 @@
// Do not generate loads of non-round integer types since these can
// be expensive (and would be wrong if the type is not byte sized).
if (EVT != MVT::Other && LoadedVT.bitsGT(EVT) && EVT.isRound() &&
- (!AfterLegalize || TLI.isLoadXLegal(ISD::ZEXTLOAD, EVT))) {
+ (!AfterLegalize || TLI.isLoadExtLegal(ISD::ZEXTLOAD, EVT))) {
MVT PtrType = N0.getOperand(1).getValueType();
// For big endian targets, we need to add an offset to the pointer to
// load the correct bytes. For little endian systems, we merely need to
@@ -2858,7 +2858,7 @@
// fold (sext (load x)) -> (sext (truncate (sextload x)))
if (ISD::isNON_EXTLoad(N0.getNode()) &&
((!AfterLegalize && !cast(N0)->isVolatile()) ||
- TLI.isLoadXLegal(ISD::SEXTLOAD, N0.getValueType()))) {
+ TLI.isLoadExtLegal(ISD::SEXTLOAD, N0.getValueType()))) {
bool DoXform = true;
SmallVector SetCCs;
if (!N0.hasOneUse())
@@ -2900,7 +2900,7 @@
LoadSDNode *LN0 = cast(N0);
MVT EVT = LN0->getMemoryVT();
if ((!AfterLegalize && !LN0->isVolatile()) ||
- TLI.isLoadXLegal(ISD::SEXTLOAD, EVT)) {
+ TLI.isLoadExtLegal(ISD::SEXTLOAD, EVT)) {
SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, VT, LN0->getChain(),
LN0->getBasePtr(), LN0->getSrcValue(),
LN0->getSrcValueOffset(), EVT,
@@ -2984,7 +2984,7 @@
// fold (zext (load x)) -> (zext (truncate (zextload x)))
if (ISD::isNON_EXTLoad(N0.getNode()) &&
((!AfterLegalize && !cast(N0)->isVolatile()) ||
- TLI.isLoadXLegal(ISD::ZEXTLOAD, N0.getValueType()))) {
+ TLI.isLoadExtLegal(ISD::ZEXTLOAD, N0.getValueType()))) {
bool DoXform = true;
SmallVector SetCCs;
if (!N0.hasOneUse())
@@ -3026,7 +3026,7 @@
LoadSDNode *LN0 = cast(N0);
MVT EVT = LN0->getMemoryVT();
if ((!AfterLegalize && !LN0->isVolatile()) ||
- TLI.isLoadXLegal(ISD::ZEXTLOAD, EVT)) {
+ TLI.isLoadExtLegal(ISD::ZEXTLOAD, EVT)) {
SDValue ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, VT, LN0->getChain(),
LN0->getBasePtr(), LN0->getSrcValue(),
LN0->getSrcValueOffset(), EVT,
@@ -3106,7 +3106,7 @@
// fold (aext (load x)) -> (aext (truncate (extload x)))
if (ISD::isNON_EXTLoad(N0.getNode()) && N0.hasOneUse() &&
((!AfterLegalize && !cast(N0)->isVolatile()) ||
- TLI.isLoadXLegal(ISD::EXTLOAD, N0.getValueType()))) {
+ TLI.isLoadExtLegal(ISD::EXTLOAD, N0.getValueType()))) {
LoadSDNode *LN0 = cast(N0);
SDValue ExtLoad = DAG.getExtLoad(ISD::EXTLOAD, VT, LN0->getChain(),
LN0->getBasePtr(), LN0->getSrcValue(),
@@ -3212,7 +3212,7 @@
if (Opc == ISD::SIGN_EXTEND_INREG) {
ExtType = ISD::SEXTLOAD;
EVT = cast(N->getOperand(1))->getVT();
- if (AfterLegalize && !TLI.isLoadXLegal(ISD::SEXTLOAD, EVT))
+ if (AfterLegalize && !TLI.isLoadExtLegal(ISD::SEXTLOAD, EVT))
return SDValue();
}
@@ -3345,7 +3345,7 @@
ISD::isUNINDEXEDLoad(N0.getNode()) &&
EVT == cast(N0)->getMemoryVT() &&
((!AfterLegalize && !cast(N0)->isVolatile()) ||
- TLI.isLoadXLegal(ISD::SEXTLOAD, EVT))) {
+ TLI.isLoadExtLegal(ISD::SEXTLOAD, EVT))) {
LoadSDNode *LN0 = cast(N0);
SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, VT, LN0->getChain(),
LN0->getBasePtr(), LN0->getSrcValue(),
@@ -3361,7 +3361,7 @@
N0.hasOneUse() &&
EVT == cast(N0)->getMemoryVT() &&
((!AfterLegalize && !cast(N0)->isVolatile()) ||
- TLI.isLoadXLegal(ISD::SEXTLOAD, EVT))) {
+ TLI.isLoadExtLegal(ISD::SEXTLOAD, EVT))) {
LoadSDNode *LN0 = cast(N0);
SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, VT, LN0->getChain(),
LN0->getBasePtr(), LN0->getSrcValue(),
@@ -4043,7 +4043,7 @@
// fold (fpext (load x)) -> (fpext (fptrunc (extload x)))
if (ISD::isNON_EXTLoad(N0.getNode()) && N0.hasOneUse() &&
((!AfterLegalize && !cast(N0)->isVolatile()) ||
- TLI.isLoadXLegal(ISD::EXTLOAD, N0.getValueType()))) {
+ TLI.isLoadExtLegal(ISD::EXTLOAD, N0.getValueType()))) {
LoadSDNode *LN0 = cast(N0);
SDValue ExtLoad = DAG.getExtLoad(ISD::EXTLOAD, VT, LN0->getChain(),
LN0->getBasePtr(), LN0->getSrcValue(),
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=57526&r1=57525&r2=57526&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Oct 14 16:26:46 2008
@@ -456,7 +456,7 @@
if (CFP->isValueValidForType(SVT, CFP->getValueAPF()) &&
// Only do this if the target has a native EXTLOAD instruction from
// smaller type.
- TLI.isLoadXLegal(ISD::EXTLOAD, SVT) &&
+ TLI.isLoadExtLegal(ISD::EXTLOAD, SVT) &&
TLI.ShouldShrinkFPConstant(OrigVT)) {
const Type *SType = SVT.getTypeForMVT();
LLVMC = cast(ConstantExpr::getFPTrunc(LLVMC, SType));
@@ -1981,7 +1981,7 @@
// nice to have an effective generic way of getting these benefits...
// Until such a way is found, don't insist on promoting i1 here.
(SrcVT != MVT::i1 ||
- TLI.getLoadXAction(ExtType, MVT::i1) == TargetLowering::Promote)) {
+ TLI.getLoadExtAction(ExtType, MVT::i1) == TargetLowering::Promote)) {
// Promote to a byte-sized load if not loading an integral number of
// bytes. For example, promote EXTLOAD:i20 -> EXTLOAD:i24.
unsigned NewWidth = SrcVT.getStoreSizeInBits();
@@ -2086,7 +2086,7 @@
Tmp1 = LegalizeOp(Result);
Tmp2 = LegalizeOp(Ch);
} else {
- switch (TLI.getLoadXAction(ExtType, SrcVT)) {
+ switch (TLI.getLoadExtAction(ExtType, SrcVT)) {
default: assert(0 && "This action is not supported yet!");
case TargetLowering::Custom:
isCustom = true;
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=57526&r1=57525&r2=57526&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Tue Oct 14 16:26:46 2008
@@ -402,7 +402,7 @@
"Fixed size array in TargetLowering is not large enough!");
// All operations default to being supported.
memset(OpActions, 0, sizeof(OpActions));
- memset(LoadXActions, 0, sizeof(LoadXActions));
+ memset(LoadExtActions, 0, sizeof(LoadExtActions));
memset(TruncStoreActions, 0, sizeof(TruncStoreActions));
memset(IndexedModeActions, 0, sizeof(IndexedModeActions));
memset(ConvertActions, 0, sizeof(ConvertActions));
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=57526&r1=57525&r2=57526&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Oct 14 16:26:46 2008
@@ -131,10 +131,10 @@
computeRegisterProperties();
// ARM does not have f32 extending load.
- setLoadXAction(ISD::EXTLOAD, MVT::f32, Expand);
+ setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
// ARM does not have i1 sign extending load.
- setLoadXAction(ISD::SEXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
// ARM supports all 4 flavors of integer indexed load / store.
for (unsigned im = (unsigned)ISD::PRE_INC;
Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp?rev=57526&r1=57525&r2=57526&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Tue Oct 14 16:26:46 2008
@@ -52,15 +52,15 @@
// We want to custom lower some of our intrinsics.
setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
- setLoadXAction(ISD::EXTLOAD, MVT::i1, Promote);
- setLoadXAction(ISD::EXTLOAD, MVT::f32, Expand);
+ setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
- setLoadXAction(ISD::ZEXTLOAD, MVT::i1, Promote);
- setLoadXAction(ISD::ZEXTLOAD, MVT::i32, Expand);
+ setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::ZEXTLOAD, MVT::i32, Expand);
- setLoadXAction(ISD::SEXTLOAD, MVT::i1, Promote);
- setLoadXAction(ISD::SEXTLOAD, MVT::i8, Expand);
- setLoadXAction(ISD::SEXTLOAD, MVT::i16, Expand);
+ setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Expand);
+ setLoadExtAction(ISD::SEXTLOAD, MVT::i16, Expand);
// setOperationAction(ISD::BRIND, MVT::Other, Expand);
setOperationAction(ISD::BR_JT, MVT::Other, Expand);
Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=57526&r1=57525&r2=57526&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Tue Oct 14 16:26:46 2008
@@ -131,27 +131,27 @@
addRegisterClass(MVT::i128, SPU::GPRCRegisterClass);
// SPU has no sign or zero extended loads for i1, i8, i16:
- setLoadXAction(ISD::EXTLOAD, MVT::i1, Promote);
- setLoadXAction(ISD::SEXTLOAD, MVT::i1, Promote);
- setLoadXAction(ISD::ZEXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
setTruncStoreAction(MVT::i8, MVT::i1, Custom);
setTruncStoreAction(MVT::i16, MVT::i1, Custom);
setTruncStoreAction(MVT::i32, MVT::i1, Custom);
setTruncStoreAction(MVT::i64, MVT::i1, Custom);
setTruncStoreAction(MVT::i128, MVT::i1, Custom);
- setLoadXAction(ISD::EXTLOAD, MVT::i8, Custom);
- setLoadXAction(ISD::SEXTLOAD, MVT::i8, Custom);
- setLoadXAction(ISD::ZEXTLOAD, MVT::i8, Custom);
+ setLoadExtAction(ISD::EXTLOAD, MVT::i8, Custom);
+ setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Custom);
+ setLoadExtAction(ISD::ZEXTLOAD, MVT::i8, Custom);
setTruncStoreAction(MVT::i8 , MVT::i8, Custom);
setTruncStoreAction(MVT::i16 , MVT::i8, Custom);
setTruncStoreAction(MVT::i32 , MVT::i8, Custom);
setTruncStoreAction(MVT::i64 , MVT::i8, Custom);
setTruncStoreAction(MVT::i128, MVT::i8, Custom);
- setLoadXAction(ISD::EXTLOAD, MVT::i16, Custom);
- setLoadXAction(ISD::SEXTLOAD, MVT::i16, Custom);
- setLoadXAction(ISD::ZEXTLOAD, MVT::i16, Custom);
+ setLoadExtAction(ISD::EXTLOAD, MVT::i16, Custom);
+ setLoadExtAction(ISD::SEXTLOAD, MVT::i16, Custom);
+ setLoadExtAction(ISD::ZEXTLOAD, MVT::i16, Custom);
// SPU constant load actions are custom lowered:
setOperationAction(ISD::Constant, MVT::i64, Custom);
Modified: llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp?rev=57526&r1=57525&r2=57526&view=diff
==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp Tue Oct 14 16:26:46 2008
@@ -35,14 +35,14 @@
// register class for predicate registers
addRegisterClass(MVT::i1, IA64::PRRegisterClass);
- setLoadXAction(ISD::EXTLOAD , MVT::i1 , Promote);
+ setLoadExtAction(ISD::EXTLOAD , MVT::i1 , Promote);
- setLoadXAction(ISD::ZEXTLOAD , MVT::i1 , Promote);
+ setLoadExtAction(ISD::ZEXTLOAD , MVT::i1 , Promote);
- setLoadXAction(ISD::SEXTLOAD , MVT::i1 , Promote);
- setLoadXAction(ISD::SEXTLOAD , MVT::i8 , Expand);
- setLoadXAction(ISD::SEXTLOAD , MVT::i16 , Expand);
- setLoadXAction(ISD::SEXTLOAD , MVT::i32 , Expand);
+ setLoadExtAction(ISD::SEXTLOAD , MVT::i1 , Promote);
+ setLoadExtAction(ISD::SEXTLOAD , MVT::i8 , Expand);
+ setLoadExtAction(ISD::SEXTLOAD , MVT::i16 , Expand);
+ setLoadExtAction(ISD::SEXTLOAD , MVT::i32 , Expand);
setOperationAction(ISD::BRIND , MVT::Other, Expand);
setOperationAction(ISD::BR_JT , MVT::Other, Expand);
Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=57526&r1=57525&r2=57526&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Tue Oct 14 16:26:46 2008
@@ -82,9 +82,9 @@
addLegalFPImmediate(APFloat(+0.0f));
// Load extented operations for i1 types must be promoted
- setLoadXAction(ISD::EXTLOAD, MVT::i1, Promote);
- setLoadXAction(ISD::ZEXTLOAD, MVT::i1, Promote);
- setLoadXAction(ISD::SEXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
// Used by legalize types to correctly generate the setcc result.
// Without this, every float setcc comes with a AND/OR with the result,
Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp?rev=57526&r1=57525&r2=57526&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Tue Oct 14 16:26:46 2008
@@ -60,9 +60,9 @@
addRegisterClass(MVT::i16, PIC16::PTRRegsRegisterClass);
// Load extented operations for i1 types must be promoted .
- setLoadXAction(ISD::EXTLOAD, MVT::i1, Promote);
- setLoadXAction(ISD::ZEXTLOAD, MVT::i1, Promote);
- setLoadXAction(ISD::SEXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
setOperationAction(ISD::ADD, MVT::i1, Promote);
setOperationAction(ISD::ADD, MVT::i8, Legal);
Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=57526&r1=57525&r2=57526&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Tue Oct 14 16:26:46 2008
@@ -53,8 +53,8 @@
addRegisterClass(MVT::f64, PPC::F8RCRegisterClass);
// PowerPC has an i16 but no i8 (or i1) SEXTLOAD
- setLoadXAction(ISD::SEXTLOAD, MVT::i1, Promote);
- setLoadXAction(ISD::SEXTLOAD, MVT::i8, Expand);
+ setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Expand);
setTruncStoreAction(MVT::f64, MVT::f32, Expand);
Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=57526&r1=57525&r2=57526&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Tue Oct 14 16:26:46 2008
@@ -515,9 +515,9 @@
addRegisterClass(MVT::f64, SP::DFPRegsRegisterClass);
// Turn FP extload into load/fextend
- setLoadXAction(ISD::EXTLOAD, MVT::f32, Expand);
+ setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
// Sparc doesn't have i1 sign extending load
- setLoadXAction(ISD::SEXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
// Turn FP truncstore into trunc + store.
setTruncStoreAction(MVT::f64, MVT::f32, Expand);
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=57526&r1=57525&r2=57526&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Oct 14 16:26:46 2008
@@ -84,7 +84,7 @@
if (Subtarget->is64Bit())
addRegisterClass(MVT::i64, X86::GR64RegisterClass);
- setLoadXAction(ISD::SEXTLOAD, MVT::i1, Promote);
+ setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
// We don't accept any truncstore of integer registers.
setTruncStoreAction(MVT::i64, MVT::i32, Expand);
From gohman at apple.com Tue Oct 14 16:52:37 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 14 Oct 2008 21:52:37 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r57527 -
/llvm-gcc-4.2/trunk/gcc/except.c
Message-ID: <200810142152.m9ELqcmF027774@zion.cs.uiuc.edu>
Author: djg
Date: Tue Oct 14 16:52:37 2008
New Revision: 57527
URL: http://llvm.org/viewvc/llvm-project?rev=57527&view=rev
Log:
Fix the generated declaration of _Unwind_Resume and friends to not
use '...' in its argument list. This allows fast-isel to codegen it,
and it avoids the need for %al to be set to 0 on x86-64.
Modified:
llvm-gcc-4.2/trunk/gcc/except.c
Modified: llvm-gcc-4.2/trunk/gcc/except.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/except.c?rev=57527&r1=57526&r2=57527&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/except.c (original)
+++ llvm-gcc-4.2/trunk/gcc/except.c Tue Oct 14 16:52:37 2008
@@ -4079,13 +4079,25 @@
/* The default c++ routines aren't actually c++ specific, so use those. */
/* LLVM LOCAL begin */
#ifdef ENABLE_LLVM
- llvm_unwind_resume_libfunc = llvm_init_one_libfunc ( USING_SJLJ_EXCEPTIONS ?
- "_Unwind_SjLj_Resume"
+ /* Create the decl with build_decl instead of using llvm_init_one_libfunc
+ so that we can specify an argument type instead of just using '...'.
+ '...' is functionally correct, but more work for codegen to handle,
+ and even requires additional instructions on some targets. */
+ const char *name = USING_SJLJ_EXCEPTIONS ?
+ "_Unwind_SjLj_Resume"
#ifdef LLVM_STACKSENSITIVE_UNWIND_RESUME
- : "_Unwind_Resume_or_Rethrow");
+ : "_Unwind_Resume_or_Rethrow";
#else
- : "_Unwind_Resume");
+ : "_Unwind_Resume";
#endif
+ tree decl = build_decl (FUNCTION_DECL, get_identifier (name),
+ build_function_type (void_type_node,
+ tree_cons (0, ptr_type_node,
+ void_list_node)));
+ DECL_ARTIFICIAL (decl) = 1;
+ DECL_EXTERNAL (decl) = 1;
+ TREE_PUBLIC (decl) = 1;
+ llvm_unwind_resume_libfunc = decl;
#else
unwind_resume_libfunc =
init_one_libfunc ( USING_SJLJ_EXCEPTIONS ? "_Unwind_SjLj_Resume"
From dalej at apple.com Tue Oct 14 17:06:34 2008
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 14 Oct 2008 22:06:34 -0000
Subject: [llvm-commits] [llvm] r57528 - /llvm/trunk/lib/Target/X86/X86.td
Message-ID: <200810142206.m9EM6Yjj028271@zion.cs.uiuc.edu>
Author: johannes
Date: Tue Oct 14 17:06:33 2008
New Revision: 57528
URL: http://llvm.org/viewvc/llvm-project?rev=57528&view=rev
Log:
Accept -march=i586, because gcc does (a synonym
for pentium). Fixes
gcc.target/i386/20000720-1.c
gcc.target/i386/pr26826.c
Modified:
llvm/trunk/lib/Target/X86/X86.td
Modified: llvm/trunk/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=57528&r1=57527&r2=57528&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86.td (original)
+++ llvm/trunk/lib/Target/X86/X86.td Tue Oct 14 17:06:33 2008
@@ -59,6 +59,7 @@
def : Proc<"generic", []>;
def : Proc<"i386", []>;
def : Proc<"i486", []>;
+def : Proc<"i586", []>;
def : Proc<"pentium", []>;
def : Proc<"pentium-mmx", [FeatureMMX]>;
def : Proc<"i686", []>;
From dalej at apple.com Tue Oct 14 17:39:36 2008
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 14 Oct 2008 22:39:36 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r57530 -
/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/pic-1.c
Message-ID: <200810142239.m9EMdaNw029312@zion.cs.uiuc.edu>
Author: johannes
Date: Tue Oct 14 17:39:36 2008
New Revision: 57530
URL: http://llvm.org/viewvc/llvm-project?rev=57530&view=rev
Log:
llvm doesn't reserve EBX as the pic register, so there's
no reason to consider this code erroneous.
Modified:
llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/pic-1.c
Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/pic-1.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/pic-1.c?rev=57530&r1=57529&r2=57530&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/pic-1.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/pic-1.c Tue Oct 14 17:39:36 2008
@@ -7,7 +7,10 @@
{
static int a;
- __asm__ __volatile__ ( /* { dg-error "PIC register" } */
+/* LLVM LOCAL begin we don't reserve EBX as the pic register, it's variable,
+/* so there is no reason this code shouldn't work. dg-error removed. */
+ __asm__ __volatile__ (
+/* LLVM LOCAL end */
"xorl %%ebx, %%ebx\n"
"movl %%ebx, %0\n"
: "=m" (a)
From alenhar2 at cs.uiuc.edu Tue Oct 14 17:44:04 2008
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Tue, 14 Oct 2008 22:44:04 -0000
Subject: [llvm-commits] [poolalloc] r57531 -
/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp
Message-ID: <200810142244.m9EMi4Nw029455@zion.cs.uiuc.edu>
Author: alenhar2
Date: Tue Oct 14 17:44:04 2008
New Revision: 57531
URL: http://llvm.org/viewvc/llvm-project?rev=57531&view=rev
Log:
Fix for external main
Modified:
poolalloc/trunk/lib/DSA/BottomUpClosure.cpp
Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp?rev=57531&r1=57530&r2=57531&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/BottomUpClosure.cpp (original)
+++ poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Tue Oct 14 17:44:04 2008
@@ -48,7 +48,7 @@
unsigned NextID = 1;
Function *MainFunc = M.getFunction("main");
- if (MainFunc) {
+ if (MainFunc && !MainFunc->isDeclaration()) {
calculateGraphs(MainFunc, Stack, NextID, ValMap);
CloneAuxIntoGlobal(getDSGraph(*MainFunc));
} else {
From alenhar2 at cs.uiuc.edu Tue Oct 14 17:44:28 2008
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Tue, 14 Oct 2008 22:44:28 -0000
Subject: [llvm-commits] [poolalloc] r57532 -
/poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h
Message-ID: <200810142244.m9EMiSJJ029489@zion.cs.uiuc.edu>
Author: alenhar2
Date: Tue Oct 14 17:44:27 2008
New Revision: 57532
URL: http://llvm.org/viewvc/llvm-project?rev=57532&view=rev
Log:
fast check for when slab managers and stacked
Modified:
poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h
Modified: poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h?rev=57532&r1=57531&r2=57532&view=diff
==============================================================================
--- poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h (original)
+++ poolalloc/trunk/include/poolalloc_runtime/PoolAllocator.h Tue Oct 14 17:44:27 2008
@@ -68,8 +68,15 @@
bool slab_valid(void* obj) {
return objs.find(obj);
}
+ bool slab_contains(void* obj) {
+ return objs.find(obj);
+ }
bool slab_getbounds(void* obj, void*& start, void*& end) {
return objs.find(obj, start, end);
- }
+ }
+};
+
+template
+class BitMaskSlabManager {
};
From alenhar2 at cs.uiuc.edu Tue Oct 14 17:51:02 2008
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Tue, 14 Oct 2008 22:51:02 -0000
Subject: [llvm-commits] [poolalloc] r57533 -
/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp
Message-ID: <200810142251.m9EMp24L029717@zion.cs.uiuc.edu>
Author: alenhar2
Date: Tue Oct 14 17:51:02 2008
New Revision: 57533
URL: http://llvm.org/viewvc/llvm-project?rev=57533&view=rev
Log:
just because the Globals graph has the pointer doesn't mean it has a call site for that pointer
Modified:
poolalloc/trunk/lib/DSA/BottomUpClosure.cpp
Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp?rev=57533&r1=57532&r2=57533&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/BottomUpClosure.cpp (original)
+++ poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Tue Oct 14 17:51:02 2008
@@ -360,8 +360,10 @@
if (GGii->getCallSite().getInstruction()->getOperand(0) ==
ii->getCallSite().getInstruction()->getOperand(0))
break;
- assert (GGii != GG.afc_end() && "Callsite should exist but doesn't");
- RC.cloneCallSite(*ii).mergeWith(*GGii);
+ if (GGii != GG.afc_end())
+ RC.cloneCallSite(*ii).mergeWith(*GGii);
+ else
+ GG.getAuxFunctionCalls().push_front(RC.cloneCallSite(*ii));
} else {
GG.getAuxFunctionCalls().push_front(RC.cloneCallSite(*ii));
}
From daniel at zuster.org Tue Oct 14 18:24:01 2008
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 14 Oct 2008 23:24:01 -0000
Subject: [llvm-commits] [llvm] r57534 -
/llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj
Message-ID: <200810142324.m9ENO1hb030914@zion.cs.uiuc.edu>
Author: ddunbar
Date: Tue Oct 14 18:23:59 2008
New Revision: 57534
URL: http://llvm.org/viewvc/llvm-project?rev=57534&view=rev
Log:
Remove Stacker.html from Xcode project.
Modified:
llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj
Modified: llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj?rev=57534&r1=57533&r2=57534&view=diff
==============================================================================
--- llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj (original)
+++ llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj Tue Oct 14 18:23:59 2008
@@ -1035,7 +1035,6 @@
DE66F3F308ABF35D00323D32 /* Projects.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = Projects.html; sourceTree = ""; };
DE66F3F408ABF35D00323D32 /* ReleaseNotes.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = ReleaseNotes.html; sourceTree = ""; };
DE66F3F508ABF35D00323D32 /* SourceLevelDebugging.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = SourceLevelDebugging.html; sourceTree = ""; };
- DE66F3F608ABF35D00323D32 /* Stacker.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = Stacker.html; sourceTree = ""; };
DE66F3F708ABF35D00323D32 /* SystemLibrary.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = SystemLibrary.html; sourceTree = ""; };
DE66F3F808ABF35D00323D32 /* TableGenFundamentals.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = TableGenFundamentals.html; sourceTree = ""; };
DE66F3F908ABF35D00323D32 /* TestingGuide.html */ = {isa = PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 30; path = TestingGuide.html; sourceTree = ""; };
@@ -2688,7 +2687,6 @@
DE66F3F308ABF35D00323D32 /* Projects.html */,
DE66F3F408ABF35D00323D32 /* ReleaseNotes.html */,
DE66F3F508ABF35D00323D32 /* SourceLevelDebugging.html */,
- DE66F3F608ABF35D00323D32 /* Stacker.html */,
DE66F3F708ABF35D00323D32 /* SystemLibrary.html */,
DE66F3F808ABF35D00323D32 /* TableGenFundamentals.html */,
DE66F3F908ABF35D00323D32 /* TestingGuide.html */,
From daniel at zuster.org Tue Oct 14 18:25:09 2008
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 14 Oct 2008 23:25:09 -0000
Subject: [llvm-commits] [llvm] r57535 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <200810142325.m9ENP9Ng030955@zion.cs.uiuc.edu>
Author: ddunbar
Date: Tue Oct 14 18:25:09 2008
New Revision: 57535
URL: http://llvm.org/viewvc/llvm-project?rev=57535&view=rev
Log:
Add some ReleaseNotes on clang codegen.
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=57535&r1=57534&r2=57535&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Oct 14 18:25:09 2008
@@ -98,7 +98,29 @@
yet production quality, it is progressing very nicely. In addition, C++
front-end work has started to make significant progress.
-
Codegen progress/state [DANIEL]
+Clang, in conjunction with the ccc driver, is now usable as a
+replacement for gcc for building some small- to medium-sized C applications.
+Additionally, Clang now has code generation support for Objective-C on Mac OS X
+platform. Major highlights include:
+
+ - Clang/ccc pass almost all of the LLVM test suite on Mac OS X and Linux
+on the 32-bit x86 architecture. This includes significant C
+applications such as sqlite3,
+lua, and
+Clam AntiVirus.
+
+
- Clang can build the majority of Objective-C examples shipped with the
+Mac OS X Developer Tools.
+
+
+Clang code generation still needs considerable testing and development, however.
+Some areas under active development include:
+
+ - Improved support for C and Objective-C features, for example
+ variable-length arries, va_arg, exception handling (Obj-C), and garbage
+ collection (Obj-C).
+
- ABI compatibility, especially for platforms other than 32-bit x86.
+
From daniel at zuster.org Tue Oct 14 18:26:20 2008
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 14 Oct 2008 23:26:20 -0000
Subject: [llvm-commits] [llvm] r57536 -
/llvm/trunk/include/llvm/ADT/StringExtras.h
Message-ID: <200810142326.m9ENQKIt030997@zion.cs.uiuc.edu>
Author: ddunbar
Date: Tue Oct 14 18:26:20 2008
New Revision: 57536
URL: http://llvm.org/viewvc/llvm-project?rev=57536&view=rev
Log:
Add llvm::hexdigit to StringExtras (number -> hexadecimal char)
Modified:
llvm/trunk/include/llvm/ADT/StringExtras.h
Modified: llvm/trunk/include/llvm/ADT/StringExtras.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/StringExtras.h?rev=57536&r1=57535&r2=57536&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ADT/StringExtras.h (original)
+++ llvm/trunk/include/llvm/ADT/StringExtras.h Tue Oct 14 18:26:20 2008
@@ -23,6 +23,12 @@
namespace llvm {
+/// hexdigit - Return the (uppercase) hexadecimal character for the
+/// given number \arg X (which should be less than 16).
+static inline char hexdigit(unsigned X) {
+ return X < 10 ? '0' + X : 'A' + X - 10;
+}
+
static inline std::string utohexstr(uint64_t X) {
char Buffer[40];
char *BufPtr = Buffer+39;
@@ -32,10 +38,7 @@
while (X) {
unsigned char Mod = static_cast(X) & 15;
- if (Mod < 10)
- *--BufPtr = '0' + Mod;
- else
- *--BufPtr = 'A' + Mod-10;
+ *--BufPtr = hexdigit(Mod);
X >>= 4;
}
return std::string(BufPtr);
From daniel at zuster.org Tue Oct 14 18:28:10 2008
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 14 Oct 2008 23:28:10 -0000
Subject: [llvm-commits] [llvm] r57537 - /llvm/trunk/lib/VMCore/AsmWriter.cpp
Message-ID: <200810142328.m9ENSAxP031066@zion.cs.uiuc.edu>
Author: ddunbar
Date: Tue Oct 14 18:28:09 2008
New Revision: 57537
URL: http://llvm.org/viewvc/llvm-project?rev=57537&view=rev
Log:
Change getLLVMName to use raw_ostream & PrintLLVMName.
- Avoids duplicated quotification code.
- Remove QuoteNameIfNeeded.
- No functionality change.
Modified:
llvm/trunk/lib/VMCore/AsmWriter.cpp
Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AsmWriter.cpp?rev=57537&r1=57536&r2=57537&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/AsmWriter.cpp (original)
+++ llvm/trunk/lib/VMCore/AsmWriter.cpp Tue Oct 14 18:28:09 2008
@@ -68,58 +68,11 @@
return 0;
}
-
-/// NameNeedsQuotes - Return true if the specified llvm name should be wrapped
-/// with ""'s.
-static std::string QuoteNameIfNeeded(const std::string &Name) {
- std::string result;
- bool needsQuotes = Name[0] >= '0' && Name[0] <= '9';
- // Scan the name to see if it needs quotes and to replace funky chars with
- // their octal equivalent.
- for (unsigned i = 0, e = Name.size(); i != e; ++i) {
- char C = Name[i];
- assert(C != '"' && "Illegal character in LLVM value name!");
- if (isalnum(C) || C == '-' || C == '.' || C == '_')
- result += C;
- else if (C == '\\') {
- needsQuotes = true;
- result += "\\\\";
- } else if (isprint(C)) {
- needsQuotes = true;
- result += C;
- } else {
- needsQuotes = true;
- result += "\\";
- char hex1 = (C >> 4) & 0x0F;
- if (hex1 < 10)
- result += hex1 + '0';
- else
- result += hex1 - 10 + 'A';
- char hex2 = C & 0x0F;
- if (hex2 < 10)
- result += hex2 + '0';
- else
- result += hex2 - 10 + 'A';
- }
- }
- if (needsQuotes) {
- result.insert(0,"\"");
- result += '"';
- }
- return result;
-}
-
-/// getLLVMName - Turn the specified string into an 'LLVM name', which is
-/// surrounded with ""'s and escaped if it has special chars in it.
-static std::string getLLVMName(const std::string &Name) {
- assert(!Name.empty() && "Cannot get empty name!");
- return QuoteNameIfNeeded(Name);
-}
-
enum PrefixType {
GlobalPrefix,
LabelPrefix,
- LocalPrefix
+ LocalPrefix,
+ NoPrefix
};
/// PrintLLVMName - Turn the specified name into an 'LLVM name', which is either
@@ -130,6 +83,7 @@
assert(NameStr && "Cannot get empty name!");
switch (Prefix) {
default: assert(0 && "Bad prefix!");
+ case NoPrefix: break;
case GlobalPrefix: OS << '@'; break;
case LabelPrefix: break;
case LocalPrefix: OS << '%'; break;
@@ -165,21 +119,23 @@
OS << C;
} else {
OS << '\\';
- char hex1 = (C >> 4) & 0x0F;
- if (hex1 < 10)
- OS << (char)(hex1 + '0');
- else
- OS << (char)(hex1 - 10 + 'A');
- char hex2 = C & 0x0F;
- if (hex2 < 10)
- OS << (char)(hex2 + '0');
- else
- OS << (char)(hex2 - 10 + 'A');
+ OS << hexdigit((C >> 4) & 0x0F);
+ OS << hexdigit((C >> 0) & 0x0F);
}
}
OS << '"';
}
+/// getLLVMName - Turn the specified string into an 'LLVM name', which is
+/// surrounded with ""'s and escaped if it has special chars in it.
+static std::string getLLVMName(const std::string &Name) {
+ assert(!Name.empty() && "Cannot get empty name!");
+ std::string result;
+ raw_string_ostream OS(result);
+ PrintLLVMName(OS, Name.c_str(), Name.length(), NoPrefix);
+ return OS.str();
+}
+
/// PrintLLVMName - Turn the specified name into an 'LLVM name', which is either
/// prefixed with % (if the string only contains simple characters) or is
/// surrounded with ""'s (if it has special chars in it). Print it out.
From daniel at zuster.org Tue Oct 14 18:51:44 2008
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 14 Oct 2008 23:51:44 -0000
Subject: [llvm-commits] [llvm] r57538 - in /llvm/trunk: docs/LangRef.html
lib/VMCore/AsmWriter.cpp test/Assembler/2008-10-14-QuoteInName.ll
Message-ID: <200810142351.m9ENpimx031878@zion.cs.uiuc.edu>
Author: ddunbar
Date: Tue Oct 14 18:51:43 2008
New Revision: 57538
URL: http://llvm.org/viewvc/llvm-project?rev=57538&view=rev
Log:
Prevent assert when using '"' in names (via hexadecimal).
Update LangRef to mention \xx quoting in names.
Added:
llvm/trunk/test/Assembler/2008-10-14-QuoteInName.ll
Modified:
llvm/trunk/docs/LangRef.html
llvm/trunk/lib/VMCore/AsmWriter.cpp
Modified: llvm/trunk/docs/LangRef.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=57538&r1=57537&r2=57538&view=diff
==============================================================================
--- llvm/trunk/docs/LangRef.html (original)
+++ llvm/trunk/docs/LangRef.html Tue Oct 14 18:51:43 2008
@@ -335,8 +335,9 @@
For example, %foo, @DivisionByZero, %a.really.long.identifier. The actual
regular expression used is '[%@][a-zA-Z$._][a-zA-Z$._0-9]*'.
Identifiers which require other characters in their names can be surrounded
- with quotes. In this way, anything except a " character can
- be used in a named value.
+ with quotes. Special characters may be escaped using "\xx" where xx is the
+ ASCII code for the character in hexadecimal. In this way, any character can
+ be used in a name value, even quotes themselves.
- Unnamed values are represented as an unsigned numeric value with their
prefix. For example, %12, @2, %44.
Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AsmWriter.cpp?rev=57538&r1=57537&r2=57538&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/AsmWriter.cpp (original)
+++ llvm/trunk/lib/VMCore/AsmWriter.cpp Tue Oct 14 18:51:43 2008
@@ -112,10 +112,9 @@
OS << '"';
for (unsigned i = 0; i != NameLen; ++i) {
char C = NameStr[i];
- assert(C != '"' && "Illegal character in LLVM value name!");
if (C == '\\') {
OS << "\\\\";
- } else if (isprint(C)) {
+ } else if (C != '"' && isprint(C)) {
OS << C;
} else {
OS << '\\';
Added: llvm/trunk/test/Assembler/2008-10-14-QuoteInName.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/2008-10-14-QuoteInName.ll?rev=57538&view=auto
==============================================================================
--- llvm/trunk/test/Assembler/2008-10-14-QuoteInName.ll (added)
+++ llvm/trunk/test/Assembler/2008-10-14-QuoteInName.ll Tue Oct 14 18:51:43 2008
@@ -0,0 +1,3 @@
+; RUN: llvm-as < %s | llvm-dis | grep "quote"
+
+@"a\22quote" = global i32 0
From gohman at apple.com Tue Oct 14 18:54:12 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 14 Oct 2008 23:54:12 -0000
Subject: [llvm-commits] [llvm] r57539 - in /llvm/trunk:
include/llvm/CodeGen/FastISel.h include/llvm/CodeGen/SelectionDAGISel.h
include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/FastISel.cpp
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
lib/Target/X86/X86FastISel.cpp lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86ISelLowering.h
Message-ID: <200810142354.m9ENsC2M031970@zion.cs.uiuc.edu>
Author: djg
Date: Tue Oct 14 18:54:11 2008
New Revision: 57539
URL: http://llvm.org/viewvc/llvm-project?rev=57539&view=rev
Log:
FastISel support for exception-handling constructs.
- Move the EH landing-pad code and adjust it so that it works
with FastISel as well as with SDISel.
- Add FastISel support for @llvm.eh.exception and
@llvm.eh.selector.
Modified:
llvm/trunk/include/llvm/CodeGen/FastISel.h
llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
llvm/trunk/include/llvm/Target/TargetLowering.h
llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/trunk/lib/Target/X86/X86FastISel.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.h
Modified: llvm/trunk/include/llvm/CodeGen/FastISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/FastISel.h?rev=57539&r1=57538&r2=57539&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/FastISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/FastISel.h Tue Oct 14 18:54:11 2008
@@ -16,12 +16,14 @@
#include "llvm/BasicBlock.h"
#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/SmallSet.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
namespace llvm {
class AllocaInst;
class ConstantFP;
+class Instruction;
class MachineBasicBlock;
class MachineConstantPool;
class MachineFunction;
@@ -44,6 +46,9 @@
DenseMap &ValueMap;
DenseMap &MBBMap;
DenseMap &StaticAllocaMap;
+#ifndef NDEBUG
+ SmallSet &CatchInfoLost;
+#endif
MachineFunction &MF;
MachineModuleInfo *MMI;
MachineRegisterInfo &MRI;
@@ -108,7 +113,11 @@
MachineModuleInfo *mmi,
DenseMap &vm,
DenseMap &bm,
- DenseMap &am);
+ DenseMap &am
+#ifndef NDEBUG
+ , SmallSet &cil
+#endif
+ );
/// FastEmit_r - This method is called by target-independent code
/// to request that an instruction with the given type and opcode
Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=57539&r1=57538&r2=57539&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Tue Oct 14 18:54:11 2008
@@ -30,6 +30,7 @@
class MachineInstr;
class MachineModuleInfo;
class TargetLowering;
+ class TargetInstrInfo;
class FunctionLoweringInfo;
class HazardRecognizer;
class GCFunctionInfo;
@@ -107,7 +108,8 @@
private:
void SelectAllBasicBlocks(Function &Fn, MachineFunction &MF,
- MachineModuleInfo *MMI);
+ MachineModuleInfo *MMI,
+ const TargetInstrInfo &TII);
void FinishBasicBlock();
void SelectBasicBlock(BasicBlock *LLVMBB,
Modified: llvm/trunk/include/llvm/Target/TargetLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=57539&r1=57538&r2=57539&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetLowering.h (original)
+++ llvm/trunk/include/llvm/Target/TargetLowering.h Tue Oct 14 18:54:11 2008
@@ -28,6 +28,7 @@
#include "llvm/CodeGen/RuntimeLibcalls.h"
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/STLExtras.h"
#include