From evan.cheng at apple.com Mon Nov 3 01:14:02 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 03 Nov 2008 07:14:02 -0000 Subject: [llvm-commits] [llvm] r58598 - /llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Message-ID: <200811030714.mA37E2Ke007716@zion.cs.uiuc.edu> Author: evancheng Date: Mon Nov 3 01:14:02 2008 New Revision: 58598 URL: http://llvm.org/viewvc/llvm-project?rev=58598&view=rev Log: Silence a compiler warning. Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp?rev=58598&r1=58597&r2=58598&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Mon Nov 3 01:14:02 2008 @@ -875,7 +875,7 @@ // Resolve the relocations to concrete pointers. for (unsigned i = 0, e = Relocations.size(); i != e; ++i) { MachineRelocation &MR = Relocations[i]; - void *ResultPtr; + void *ResultPtr = 0; if (!MR.letTargetResolve()) { if (MR.isString()) { ResultPtr = TheJIT->getPointerToNamedFunction(MR.getString()); From isanbard at gmail.com Mon Nov 3 01:33:16 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 03 Nov 2008 07:33:16 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r58599 - in /llvm-gcc-4.2/trunk/gcc: attribs.c c-common.c c-common.h c-decl.c c-parser.c c-typeck.c config/darwin-c.c config/darwin-sections.def config/darwin.c config/darwin.h config/i386/i386.c coverage.c cp/call.c cp/decl.c cp/name-lookup.c cp/parser.c cp/tree.c cp/typeck.c dwarf2out.c function.c gimplify.c ipa-type-escape.c objc/objc-act.c stub-objc.c tree-inline.c tree.c tree.h varasm.c version.c Message-ID: <200811030733.mA37XH0c008494@zion.cs.uiuc.edu> Author: void Date: Mon Nov 3 01:33:15 2008 New Revision: 58599 URL: http://llvm.org/viewvc/llvm-project?rev=58599&view=rev Log: Many, many blocks updates. Sync with Apple GCC mainline. Modified: llvm-gcc-4.2/trunk/gcc/attribs.c llvm-gcc-4.2/trunk/gcc/c-common.c llvm-gcc-4.2/trunk/gcc/c-common.h llvm-gcc-4.2/trunk/gcc/c-decl.c llvm-gcc-4.2/trunk/gcc/c-parser.c llvm-gcc-4.2/trunk/gcc/c-typeck.c llvm-gcc-4.2/trunk/gcc/config/darwin-c.c llvm-gcc-4.2/trunk/gcc/config/darwin-sections.def llvm-gcc-4.2/trunk/gcc/config/darwin.c llvm-gcc-4.2/trunk/gcc/config/darwin.h llvm-gcc-4.2/trunk/gcc/config/i386/i386.c llvm-gcc-4.2/trunk/gcc/coverage.c llvm-gcc-4.2/trunk/gcc/cp/call.c llvm-gcc-4.2/trunk/gcc/cp/decl.c llvm-gcc-4.2/trunk/gcc/cp/name-lookup.c llvm-gcc-4.2/trunk/gcc/cp/parser.c llvm-gcc-4.2/trunk/gcc/cp/tree.c llvm-gcc-4.2/trunk/gcc/cp/typeck.c llvm-gcc-4.2/trunk/gcc/dwarf2out.c llvm-gcc-4.2/trunk/gcc/function.c llvm-gcc-4.2/trunk/gcc/gimplify.c llvm-gcc-4.2/trunk/gcc/ipa-type-escape.c llvm-gcc-4.2/trunk/gcc/objc/objc-act.c llvm-gcc-4.2/trunk/gcc/stub-objc.c llvm-gcc-4.2/trunk/gcc/tree-inline.c llvm-gcc-4.2/trunk/gcc/tree.c llvm-gcc-4.2/trunk/gcc/tree.h llvm-gcc-4.2/trunk/gcc/varasm.c llvm-gcc-4.2/trunk/gcc/version.c Modified: llvm-gcc-4.2/trunk/gcc/attribs.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/attribs.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/attribs.c (original) +++ llvm-gcc-4.2/trunk/gcc/attribs.c Mon Nov 3 01:33:15 2008 @@ -216,7 +216,8 @@ if (spec->function_type_required && TREE_CODE (*anode) != FUNCTION_TYPE && TREE_CODE (*anode) != METHOD_TYPE) { - if (TREE_CODE (*anode) == POINTER_TYPE + /* APPLE LOCAL radar 6246527 */ + if ((TREE_CODE (*anode) == POINTER_TYPE || TREE_CODE (*anode) == BLOCK_POINTER_TYPE) && (TREE_CODE (TREE_TYPE (*anode)) == FUNCTION_TYPE || TREE_CODE (TREE_TYPE (*anode)) == METHOD_TYPE)) { @@ -323,6 +324,14 @@ if (fn_ptr_tmp) { + /* APPLE LOCAL begin radar 6246527 */ + if (DECL_P (*node) && TREE_TYPE (*node) && + TREE_CODE (TREE_TYPE (*node)) == BLOCK_POINTER_TYPE) + /* Rebuild the block pointer type and put it in the + appropriate place. */ + fn_ptr_tmp = build_block_pointer_type (fn_ptr_tmp); + else + /* APPLE LOCAL end radar 6246527 */ /* Rebuild the function pointer type and put it in the appropriate place. */ fn_ptr_tmp = build_pointer_type (fn_ptr_tmp); Modified: llvm-gcc-4.2/trunk/gcc/c-common.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/c-common.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/c-common.c (original) +++ llvm-gcc-4.2/trunk/gcc/c-common.c Mon Nov 3 01:33:15 2008 @@ -201,11 +201,8 @@ tree saved_function_name_decls; */ - -/* APPLE LOCAL begin radar 5811943 - Fix type of pointers to Blocks */ -/* Move declaration of invoke_impl_ptr_type from c-typeck.c */ -tree invoke_impl_ptr_type; -/* APPLE LOCAL end radar 5811943 - Fix type of pointers to Blocks */ +/* APPLE LOCAL radar 6300081 */ +tree generic_block_literal_struct_type = NULL; tree c_global_trees[CTI_MAX]; @@ -302,7 +299,8 @@ /* Warn about format/argument anomalies in calls to formatted I/O functions (*printf, *scanf, strftime, strfmon, etc.). */ -int warn_format; +/* APPLE LOCAL default to Wformat-security 5764921 */ +int warn_format = 1; /* Warn about using __null (as NULL in C++) as sentinel. For code compiled with GCC this doesn't matter as __null is guaranteed to have the right @@ -6130,7 +6128,7 @@ *no_add_attrs = true; if (!(*node) || TREE_CODE (*node) != VAR_DECL) { - warning (OPT_Wattributes, "byref attribute can be specified on variables only - ignored"); + warning (OPT_Wattributes, "__block attribute can be specified on variables only - ignored"); return NULL_TREE; } arg_ident = TREE_VALUE (args); @@ -6242,7 +6240,7 @@ } /* This routine builds call to: - _Block_byref_release(VAR_DECL.forwarding); + _Block_byref_release(VAR_DECL.__forwarding); and adds it to the statement list. */ tree @@ -6250,9 +6248,9 @@ { tree exp = var_decl, call_exp, func_params; tree type = TREE_TYPE (var_decl); - /* __byref variables imported into Blocks are not _Block_byref_released() + /* __block variables imported into Blocks are not _Block_byref_released() from within the Block statement itself; otherwise, each envokation of - the block causes a release. Make sure to release __byref variables declared + the block causes a release. Make sure to release __block variables declared and used locally in the block though. */ if (cur_block && (BLOCK_DECL_COPIED (var_decl) || BLOCK_DECL_BYREF (var_decl))) @@ -6266,7 +6264,7 @@ TREE_USED (var_decl) = 1; /* Declare: _Block_byref_release(void*) if not done already. */ - exp = build_component_ref (exp, get_identifier ("forwarding")); + exp = build_component_ref (exp, get_identifier ("__forwarding")); func_params = tree_cons (NULL_TREE, exp, NULL_TREE); call_exp = build_function_call (build_block_byref_release_decl (), func_params); return call_exp; @@ -9141,5 +9139,55 @@ warning (OPT_Wchar_subscripts, "array subscript has type %"); } +/* APPLE LOCAL begin radar 6246527 */ +/* This routine is called for a "format" attribute. It adds the number of + hidden argument ('1') to the format's 2nd and 3rd argument to compensate + for these two arguments. This is to make rest of the "format" attribute + processing done in the middle-end to work seemlessly. */ + +static void +block_delta_format_args (tree format) +{ + tree format_num_expr, first_arg_num_expr; + int val; + tree args = TREE_VALUE (format); + gcc_assert (TREE_CHAIN (args) && TREE_CHAIN (TREE_CHAIN (args))); + format_num_expr = TREE_VALUE (TREE_CHAIN (args)); + first_arg_num_expr = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (args))); + if (format_num_expr && TREE_CODE (format_num_expr) == INTEGER_CST) + { + val = TREE_INT_CST_LOW (format_num_expr); + TREE_VALUE (TREE_CHAIN (args)) = build_int_cst (NULL_TREE, val+1); + } + if (first_arg_num_expr && TREE_CODE (first_arg_num_expr) == INTEGER_CST) + { + val = TREE_INT_CST_LOW (first_arg_num_expr); + if (val != 0) + TREE_VALUE (TREE_CHAIN (TREE_CHAIN (args))) = + build_int_cst (NULL_TREE, val+1); + } +} + +/* This routine recognizes legal block attributes. In case of block's "format" + attribute, it calls block_delta_format_args to compensate for hidden + argument _self getting passed to block's helper function. */ +bool +any_recognized_block_attribute (tree attributes) +{ + tree chain; + bool res = false; + for (chain = attributes; chain; chain = TREE_CHAIN (chain)) + { + if (is_attribute_p ("format", TREE_PURPOSE (chain))) + { + block_delta_format_args (chain); + res = true; + } + else if (is_attribute_p ("sentinel", TREE_PURPOSE (chain))) + res = true; + } + return res; +} +/* APPLE LOCAL end radar 6246527 */ #include "gt-c-common.h" Modified: llvm-gcc-4.2/trunk/gcc/c-common.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/c-common.h?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/c-common.h (original) +++ llvm-gcc-4.2/trunk/gcc/c-common.h Mon Nov 3 01:33:15 2008 @@ -978,9 +978,10 @@ extern tree objc_non_volatilized_type (tree); /* APPLE LOCAL radar 4697411 */ extern void objc_volatilize_component_ref (tree, tree); -extern bool objc_compare_types (tree, tree, int, tree); -/* APPLE LOCAL radar 4229905 */ -extern bool objc_have_common_type (tree, tree, int, tree); +/* APPLE LOCAL radar 6231433 */ +extern bool objc_compare_types (tree, tree, int, tree, const char *); +/* APPLE LOCAL radar 4229905 - radar 6231433 */ +extern bool objc_have_common_type (tree, tree, int, tree, const char *); /* APPLE LOCAL radar 4133425 */ extern bool objc_diagnose_private_ivar (tree); /* APPLE LOCAL radar 4507230 */ @@ -1127,7 +1128,9 @@ BLOCK_HAS_CXX_OBJ = (1 << 26), BLOCK_IS_GC = (1 << 27), /* APPLE LOCAL radar 5822844 */ - BLOCK_IS_GLOBAL = (1 << 28) + BLOCK_IS_GLOBAL = (1 << 28), + /* APPLE LOCAL radar 5847213 */ + BLOCK_HAS_DESCRIPTOR = (1 << 29) }; struct block_sema_info { @@ -1142,7 +1145,7 @@ /* APPLE LOCAL radar 5803600 */ tree block_byref_global_decl_list; tree block_original_ref_decl_list; - tree block_original_byref_decl_list; + /* APPLE LOCAL radar 5847213 - tree block_original_byref_decl_list is removed. */ tree block_body; bool hasPrototype; bool isVariadic; @@ -1169,17 +1172,12 @@ extern struct block_sema_info *cur_block; extern tree build_helper_func_decl (tree, tree); -extern bool building_block_byref_decl; -/* APPLE LOCAL - begin radar 6113240 */ -/* Move invoke_impl_ptr_type to tree.h */ -/* APPLE LOCAL - end radar 6113240 */ extern tree build_block_byref_decl (tree, tree, tree); extern tree build_block_ref_decl (tree, tree); extern tree begin_block (void); extern struct block_sema_info *finish_block (tree); extern bool in_imm_block (void); extern bool lookup_name_in_block (tree, tree*); -extern void build_block_internal_types (void); extern void push_to_top_level (void); extern void pop_from_top_level (void); extern void start_block_helper_function (tree func_decl); @@ -1199,17 +1197,17 @@ extern tree do_digest_init (tree, tree); extern tree cast_to_pointer_to_id (tree); /* APPLE LOCAL end radar 5932809 - copyable byref blocks */ - +/* APPLE LOCAL begin radar 6237713 */ +extern bool any_recognized_block_attribute (tree); +/* APPLE LOCAL end radar 6237713 */ + +/* APPLE LOCAL begin radar 5847213 */ +extern tree build_block_descriptor_type (bool); +/* APPLE LOCAL end radar 5847213 */ /* APPLE LOCAL begin radar 6083129 - byref escapes */ -extern void gen_block_byref_release_exp (tree); extern tree build_block_byref_release_exp (tree); extern tree build_block_byref_release_decl (void); extern tree build_block_byref_assign_copy_decl (void); -extern void release_all_local_byrefs_at_return (void); -void diagnose_byref_var_in_current_scope (void); -extern void release_local_byrefs_at_break (void); -extern void in_bc_stmt_block (void); -extern void outof_bc_stmt_block (void); /* APPLE LOCAL end radar 6083129 - byref escapes */ /* APPLE LOCAL radar 6040305 - blocks */ Modified: llvm-gcc-4.2/trunk/gcc/c-decl.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/c-decl.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/c-decl.c (original) +++ llvm-gcc-4.2/trunk/gcc/c-decl.c Mon Nov 3 01:33:15 2008 @@ -326,14 +326,6 @@ tree blocks; tree blocks_last; - /* APPLE LOCAL begin radar 6083129 - byref escapes (C++ cp) */ - /* Non-zero if outermost block of a statement which can have a - break/continue stmt; such as while, switch, etc. This cannot be - a boolen field because the same scope can be used for a nested - while/for statement; as in, while(...) while (...). */ - unsigned int bc_stmt_body; - /* APPLE LOCAL end radar 6083129 - byref escapes (C++ cp) */ - /* The depth of this scope. Used to keep the ->shadowed chain of bindings sorted innermost to outermost. */ unsigned int depth : 28; @@ -359,12 +351,6 @@ /* True means make a BLOCK for this scope no matter what. */ BOOL_BITFIELD keep : 1; - - /* APPLE LOCAL begin radar 6083129 - byref escapes (C++ cp) */ - /* When true, current scope has at least one local __byref variable - in its scope. This flag is used for compile-time performance. */ - BOOL_BITFIELD byref_in_current_scope : 1; - /* APPLE LOCAL end radar 6083129 - byref escapes (C++ cp) */ }; /* The scope currently in effect. */ @@ -688,10 +674,6 @@ scope->keep = keep_next_level_flag; scope->outer = current_scope; scope->depth = current_scope ? (current_scope->depth + 1) : 0; - /* APPLE LOCAL begin radar 6083129 - byref escapes (C++ cp) */ - scope->byref_in_current_scope = - current_scope ? current_scope->byref_in_current_scope : false; - /* APPLE LOCAL end radar 6083129 - byref escapes (C++ cp) */ /* Check for scope depth overflow. Unlikely (2^28 == 268,435,456) but possible. */ @@ -716,111 +698,6 @@ TYPE_CONTEXT (type) = context; } -/* APPLE LOCAL begin radar 6083129 - byref escapes (C++ cp) */ -/* This routine is called at the begining of parsing of a while/for, etc. - statement and sets bc_stmt_body in current scope to say that outer scope - is for such a statement. */ -void -in_bc_stmt_block (void) -{ - gcc_assert (current_scope); - ++current_scope->bc_stmt_body; -} - -/* This routine resets the bc_stmt_body flag before exiting the top-most - block of while/for, etc. statement. */ -void -outof_bc_stmt_block (void) -{ - gcc_assert (current_scope && current_scope->bc_stmt_body > 0); - --current_scope->bc_stmt_body; -} - -/* This routine generates calls of _Block_byref_release(VAR_DECL.forwarding); - for all byref variables seen in the scope of the return statement. -*/ -void -release_all_local_byrefs_at_return (void) -{ - struct c_scope *scope; - struct c_binding *b; - - gcc_assert (current_scope); - if (flag_objc_gc_only || !current_scope->byref_in_current_scope) - return; - - scope = current_scope; - while (scope && scope != file_scope) - { - for (b = scope->bindings; b; b = b->prev) - { - tree p = b->decl; - if (p && TREE_CODE (p) == VAR_DECL && COPYABLE_BYREF_LOCAL_VAR (p)) - gen_block_byref_release_exp (p); - } - /* Release up to scope of the block. */ - if (cur_block && cur_block->the_scope == scope) - break; - scope = scope->outer; - } -} - -/* This routine issues a diagnostic if a __byref variable is seen in - current scope. This is for now called from a goto statement. */ -void -diagnose_byref_var_in_current_scope (void) -{ - struct c_scope *scope; - struct c_binding *b; - - gcc_assert (current_scope); - if (flag_objc_gc_only || !current_scope->byref_in_current_scope) - return; - - scope = current_scope; - while (scope && scope != file_scope) - { - for (b = scope->bindings; b; b = b->prev) - { - tree p = b->decl; - if (p && TREE_CODE (p) == VAR_DECL && COPYABLE_BYREF_LOCAL_VAR (p)) { - error ("local byref variable %s is in the scope of this goto", - IDENTIFIER_POINTER (DECL_NAME (p))); - return; - } - } - scope = scope->outer; - } -} - -/* This routine generates call to - _Block_byref_release(VAR_DECL.forwarding); for all __byref - variables which go out of scope when 'break' is executed. */ -void -release_local_byrefs_at_break (void) -{ - struct c_scope *scope; - struct c_binding *b; - - gcc_assert (current_scope); - if (flag_objc_gc_only || !current_scope->byref_in_current_scope) - return; - - scope = current_scope; - while (scope && !scope->bc_stmt_body) - { - for (b = scope->bindings; b; b = b->prev) - { - tree p = b->decl; - if (p && TREE_CODE (p) == VAR_DECL && COPYABLE_BYREF_LOCAL_VAR (p)) - gen_block_byref_release_exp (p); - } - scope = scope->outer; - } -} - -/* APPLE LOCAL end radar 6083129 - byref escapes (C++ cp) */ - /* Exit a scope. Restore the state of the identifier-decl mappings that were in effect when this scope was entered. Return a BLOCK node containing all the DECLs in this scope that are of interest @@ -951,11 +828,6 @@ goto common_symbol; case VAR_DECL: - /* APPLE LOCAL begin radar 6083129 - byref escapes (C++ cp) */ - if (!flag_objc_gc_only && COPYABLE_BYREF_LOCAL_VAR (p)) - gen_block_byref_release_exp (p); - /* APPLE LOCAL end radar 6083129 - byref escapes (C++ cp) */ - /* Warnings for unused variables. */ if (!TREE_USED (p) && !TREE_NO_WARNING (p) @@ -3836,12 +3708,12 @@ struct __Block_byref_x { // APPLE LOCAL radar 6244520 - void *isa; // NULL for everything except __weak pointers - struct Block_byref_x *forwarding; - int32_t flags; - int32_t size; - void *ByrefKeepFuncPtr; // Only if variable is __byref ObjC object - void *ByrefDestroyFuncPtr; // Only if variable is __byref ObjC object + void *__isa; // NULL for everything except __weak pointers + struct Block_byref_x *__forwarding; + int32_t __flags; + int32_t __size; + void *__ByrefKeepFuncPtr; // Only if variable is __block ObjC object + void *__ByrefDestroyFuncPtr; // Only if variable is __block ObjC object typex x; } x; */ @@ -3863,36 +3735,36 @@ Block_byref_type = start_struct (RECORD_TYPE, get_identifier (string)); /* APPLE LOCAL begin radar 6244520 */ - /* void *isa; */ - field_decl = build_decl (FIELD_DECL, get_identifier ("isa"), ptr_type_node); + /* void *__isa; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("__isa"), ptr_type_node); field_decl_chain = field_decl; /* APPLE LOCAL end radar 6244520 */ - /* struct Block_byref_x *forwarding; */ - field_decl = build_decl (FIELD_DECL, get_identifier ("forwarding"), + /* struct Block_byref_x *__forwarding; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("__forwarding"), build_pointer_type (Block_byref_type)); /* APPLE LOCAL radar 6244520 */ chainon (field_decl_chain, field_decl); - /* int32_t flags; */ - field_decl = build_decl (FIELD_DECL, get_identifier ("flags"), + /* int32_t __flags; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("__flags"), unsigned_type_node); chainon (field_decl_chain, field_decl); - /* int32_t size; */ - field_decl = build_decl (FIELD_DECL, get_identifier ("size"), + /* int32_t __size; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("__size"), unsigned_type_node); chainon (field_decl_chain, field_decl); if (COPYABLE_BYREF_LOCAL_NONPOD (decl)) { - /* void *ByrefKeepFuncPtr; */ - field_decl = build_decl (FIELD_DECL, get_identifier ("ByrefKeepFuncPtr"), + /* void *__ByrefKeepFuncPtr; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("__ByrefKeepFuncPtr"), ptr_type_node); chainon (field_decl_chain, field_decl); - /* void *ByrefDestroyFuncPtr; */ - field_decl = build_decl (FIELD_DECL, get_identifier ("ByrefDestroyFuncPtr"), + /* void *__ByrefDestroyFuncPtr; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("__ByrefDestroyFuncPtr"), ptr_type_node); chainon (field_decl_chain, field_decl); } @@ -3919,7 +3791,7 @@ { NULL, &x, 0, sizeof(struct __Block_byref_x)}; when INIT is NULL_TREE - For __byref ObjC objects, it also adds "byref_keep" and "byref_destroy" + For __block ObjC objects, it also adds "byref_keep" and "byref_destroy" Funtion pointers. So the most general initializers would be: { NULL, &x, 0, sizeof(struct __Block_byref_x), &byref_keep, &byref_destroy, @@ -4034,23 +3906,28 @@ if (TREE_CODE (decl) == PARM_DECL) init = 0; /* APPLE LOCAL begin radar 5932809 - copyable byref blocks (C++ cq) */ - /* We build a new type for each local variable declared as __byref + /* We build a new type for each local variable declared as __block and initialize it to a list of initializers. */ else if (TREE_CODE (decl) == VAR_DECL && COPYABLE_BYREF_LOCAL_VAR (decl)) { if (DECL_EXTERNAL (decl) || TREE_STATIC (decl)) { warning (0, - "__byref attribute is only allowed on local variables - ignored"); + "__block attribute is only allowed on local variables - ignored"); COPYABLE_BYREF_LOCAL_VAR (decl) = 0; COPYABLE_BYREF_LOCAL_NONPOD (decl) = 0; } else { decl = new_block_byref_decl (decl); + /* APPLE LOCAL begin radar 6289031 */ + if (! flag_objc_gc_only) + { + push_cleanup (decl, build_block_byref_release_exp (decl), false); + } + /* APPLE LOCAL end radar 6289031 */ + init = init_byref_decl (decl, init); - /* Mark that current scope has a __byref local variable. */ - current_scope->byref_in_current_scope = true; } } /* APPLE LOCAL end radar 5932809 - copyable byref blocks (C++ cq) */ @@ -7717,6 +7594,13 @@ error ("% declared in % loop initial declaration", id); break; + /* APPLE LOCAL begin radar 6268817 */ + case FUNCTION_DECL: + /* Block helper function can be declared in the statement block + for the for-loop declarations. */ + if (BLOCK_SYNTHESIZED_FUNC (decl)) + break; + /* APPLE LOCAL end radar 6268817 */ default: error ("declaration of non-variable %q+D in % loop " "initial declaration", decl); @@ -7949,12 +7833,12 @@ /* APPLE LOCAL begin radar 5932809 - copyable byref blocks (C++ ch) */ /* build_byref_local_var_access - converts EXPR to: - EXPR.forwarding->. + EXPR.__forwarding->. */ tree build_byref_local_var_access (tree expr, tree decl_name) { - tree exp = build_component_ref (expr, get_identifier ("forwarding")); + tree exp = build_component_ref (expr, get_identifier ("__forwarding")); exp = build_indirect_ref (exp, "unary *"); exp = build_component_ref (exp, decl_name); return exp; @@ -7969,13 +7853,49 @@ build_block_byref_decl (tree name, tree decl, tree exp) { struct c_scope *scope = current_scope; + tree ptr_type, byref_decl; + /* APPLE LOCAL begin radar 6225809 */ + if (cur_block->prev_block_info) { + /* Traverse enclosing blocks. Insert a __block variable in + each enclosing block which has no declaration of this + variable. This is to ensure that the current (inner) block + gets the __block version of the variable; */ + struct block_sema_info *cb = cur_block->prev_block_info; + while (cb) { + struct c_binding *b = I_SYMBOL_BINDING (name); + /* Find the first declaration not in current block. */ + while (b && b->decl + && (TREE_CODE (b->decl) == VAR_DECL + || TREE_CODE (b->decl) == PARM_DECL) + && b->depth >= cur_block->the_scope->depth) + b = b->shadowed; + + /* Is the next declaration not in enclosing block? */ + if (b && b->decl + && (TREE_CODE (b->decl) == VAR_DECL + || TREE_CODE (b->decl) == PARM_DECL) + && b->depth < cb->the_scope->depth) { + /* No declaration of variable seen in the block. Must insert one. */ + struct c_scope *save_scope = current_scope; + struct block_sema_info *save_current_block = cur_block; + current_scope = cb->the_scope; + cur_block = cb; + decl = build_block_byref_decl (name, decl, exp); + cur_block = save_current_block; + current_scope = save_scope; + } + cb = cb->prev_block_info; + } + } + /* APPLE LOCAL end radar 6225809 */ + /* If it is already a byref declaration, do not add the pointer type because such declarations already have the pointer type added. This happens when we have two nested byref declarations in nested blocks. */ - tree ptr_type = (TREE_CODE (decl) == VAR_DECL && BLOCK_DECL_BYREF (decl)) - ? TREE_TYPE (decl) : build_pointer_type (TREE_TYPE (decl)); - tree byref_decl = build_decl (VAR_DECL, name, ptr_type); + ptr_type = (TREE_CODE (decl) == VAR_DECL && BLOCK_DECL_BYREF (decl)) + ? TREE_TYPE (decl) : build_pointer_type (TREE_TYPE (decl)); + byref_decl = build_decl (VAR_DECL, name, ptr_type); /* APPLE LOCAL begin radars 6144664 & 6145471 */ DECL_SOURCE_LOCATION (byref_decl) = DECL_SOURCE_LOCATION (cur_block->helper_func_decl); @@ -8001,8 +7921,12 @@ scope, /*invisible=*/false, /*nested=*/false); cur_block->block_byref_decl_list = tree_cons (NULL_TREE, byref_decl, cur_block->block_byref_decl_list); - cur_block->block_original_byref_decl_list = - tree_cons (NULL_TREE, exp, cur_block->block_original_byref_decl_list); + /* APPLE LOCAL radar 5847213 - building block_original_byref_decl_list list removed. */ + /* APPLE LOCAL begin radar 6289031 */ + if (! flag_objc_gc_only) + push_cleanup (byref_decl, build_block_byref_release_exp (byref_decl), false); + /* APPLE LOCAL end radar 6289031 */ + return byref_decl; } @@ -8020,7 +7944,7 @@ /* APPLE LOCAL radar 6212722 */ tree type, exp; /* APPLE LOCAL begin radar 5932809 - copyable byref blocks (C++ ch) */ - /* 'decl' was previously declared as __byref. Simply, copy the value + /* 'decl' was previously declared as __block. Simply, copy the value embedded in the above variable. */ if (TREE_CODE (decl) == VAR_DECL && COPYABLE_BYREF_LOCAL_VAR (decl)) decl = build_byref_local_var_access (decl, DECL_NAME (decl)); @@ -8106,62 +8030,68 @@ return ref_decl; } -/* APPLE LOCAL begin radar 5939894 (C++ ch) */ -/** build_block_internal_types - This routine builds the block type: - struct __invoke_impl { - void *isa; - int32_t Flags; - int32_t Size; - void *FuncPtr; - } *invoke_impl_ptr_type; - */ -void -build_block_internal_types (void) +/* APPLE LOCAL begin radar 5847213 - radar 6329245 */ +static GTY (()) tree descriptor_ptr_type; +static GTY (()) tree descriptor_ptr_type_with_copydispose; +/** build_block_descriptor_type - This routine builds following internal type: + struct __block_descriptor { + unsigned long int reserved; // NULL + unsigned long int Size; // sizeof(struct Block_literal_1) + + // optional helper functions + void *CopyFuncPtr; // When BLOCK_HAS_COPY_DISPOSE is set (withCopyDispose true) + void *DestroyFuncPtr; // When BLOCK_HAS_COPY_DISPOSE is set (withCopyDispose true) +} *descriptor_ptr_type; + +Objects of this type will always be static. This is one main component of abi change. +*/ +tree +build_block_descriptor_type (bool withCopyDispose) { tree field_decl_chain, field_decl; - tree invoke_impl_type; - - /* APPLE LOCAL begin radar 5939894 (C++ ch) */ - /* If a user-declaration of "struct __invoke_impl" is seen, use it. */ - invoke_impl_type = lookup_tag (RECORD_TYPE, get_identifier ("__invoke_impl"), 0); - if (invoke_impl_type) - { - invoke_impl_ptr_type = build_pointer_type (invoke_impl_type); - return; - } - /* APPLE LOCAL end radar 5939894 (C++ ch) */ - - push_to_top_level (); - invoke_impl_type = start_struct (RECORD_TYPE, get_identifier ("__invoke_impl")); - - /* APPLE LOCAL begin radar 5811599 (C++ ch) */ - /* void *isa; */ - field_decl = build_decl (FIELD_DECL, get_identifier ("isa"), ptr_type_node); - /* APPLE LOCAL end radar 5811599 (C++ ch) */ + tree main_type; + + if (withCopyDispose && descriptor_ptr_type_with_copydispose) + return descriptor_ptr_type_with_copydispose; + if (!withCopyDispose && descriptor_ptr_type) + return descriptor_ptr_type; + + main_type = + withCopyDispose ? + start_struct (RECORD_TYPE, get_identifier ("__block_descriptor_withcopydispose")) + : start_struct (RECORD_TYPE, get_identifier ("__block_descriptor")); + + /* unsigned long int reserved; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("reserved"), long_unsigned_type_node); field_decl_chain = field_decl; - - /* int32_t Flags; */ - field_decl = build_decl (FIELD_DECL, get_identifier ("Flags"), unsigned_type_node); - chainon (field_decl_chain, field_decl); - - /* int32_t Size */ - field_decl = build_decl (FIELD_DECL, get_identifier ("Size"), unsigned_type_node); - chainon (field_decl_chain, field_decl); - - /* void *FuncPtr; */ - field_decl = build_decl (FIELD_DECL, get_identifier ("FuncPtr"), ptr_type_node); + + /* unsigned long int Size; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("Size"), long_unsigned_type_node); chainon (field_decl_chain, field_decl); - - /* APPLE LOCAL begin radar 5811943 - Fix type of pointers to Blocks (C++ ch) */ - /* Mark this struct as being a block struct rather than a 'normal' - struct. */ - TYPE_BLOCK_IMPL_STRUCT (invoke_impl_type) = 1; - /* APPLE LOCAL end radar 5811943 - Fix type of pointers to Blocks (C++ ch) */ - finish_struct (invoke_impl_type, field_decl_chain, NULL_TREE); - pop_from_top_level (); - invoke_impl_ptr_type = build_pointer_type (invoke_impl_type); + + if (withCopyDispose) + { + /* void *CopyFuncPtr; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("CopyFuncPtr"), ptr_type_node); + chainon (field_decl_chain, field_decl); + /* void *DestroyFuncPtr; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("DestroyFuncPtr"), ptr_type_node); + chainon (field_decl_chain, field_decl); + } + + /* Mark this struct as being a block struct rather than a 'normal' + struct. */ + TYPE_BLOCK_IMPL_STRUCT (main_type) = 1; + finish_struct (main_type, field_decl_chain, NULL_TREE); + + main_type = build_pointer_type (main_type); + if (withCopyDispose) + descriptor_ptr_type_with_copydispose = main_type; + else + descriptor_ptr_type = main_type; + return main_type; } -/* APPLE LOCAL end radar 5939894 (C++ ch) */ +/* APPLE LOCAL end radar 5847213 - radar 6329245 */ /* APPLE LOCAL begin radar 5814025 (C++ ch) */ struct c_declarator * @@ -8172,12 +8102,6 @@ struct c_declarator *itarget = target; struct c_declarator *ret = XOBNEW (&parser_obstack, struct c_declarator); - /* APPLE LOCAL begin radar 5732232 - blocks (C++ ch) */ - /* Closure contructs seen -- generate supporting types. */ - if (!invoke_impl_ptr_type) - build_block_internal_types (); - /* APPLE LOCAL end radar 5732232 - blocks (C++ ch) */ - if (type_quals_attrs) { tree attrs = type_quals_attrs->attrs; @@ -8401,6 +8325,11 @@ decl_stmt = build_stmt (DECL_EXPR, decl); /* APPLE LOCAL Radar 5811961, Fix location of block prologue vars (C++ ch) */ SET_EXPR_LOCATION (decl_stmt, DECL_SOURCE_LOCATION (decl)); + /* APPLE LOCAL begin radar 6163705, Blocks prologues */ + /* Give the prologue statements a line number of one before the beginning of + the function, to make them easily identifiable later. */ + EXPR_LINENO (decl_stmt) = DECL_SOURCE_LINE (decl) - 1; + /* APPLE LOCAL end radar 6163705, Blocks prologues */ tsi_link_before (&i, decl_stmt, TSI_SAME_STMT); } Modified: llvm-gcc-4.2/trunk/gcc/c-parser.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/c-parser.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/c-parser.c (original) +++ llvm-gcc-4.2/trunk/gcc/c-parser.c Mon Nov 3 01:33:15 2008 @@ -1136,7 +1136,6 @@ static tree c_parser_asm_statement (c_parser *); /* APPLE LOCAL begin radar 5732232 - blocks (C++ ca) */ static tree c_parser_block_literal_expr (c_parser *); -static bool c_parser_block_byref_declarations (c_parser *); /* APPLE LOCAL end radar 5732232 - blocks (C++ ca) */ static tree c_parser_asm_operands (c_parser *, bool); static tree c_parser_asm_clobbers (c_parser *); @@ -3765,14 +3764,6 @@ else goto statement; } - /* APPLE LOCAL begin radar 5732232 - blocks (not in C++) */ - else if (flag_blocks && first_stmt && - c_parser_next_token_is (parser, CPP_OR) && - c_parser_block_byref_declarations (parser)) - { - ; - } - /* APPLE LOCAL end radar 5732232 - blocks (not in C++) */ else if (c_parser_next_token_is (parser, CPP_PRAGMA)) { /* External pragmas, and some omp pragmas, are not associated @@ -4241,8 +4232,6 @@ tree block, expr, body, save_break; gcc_assert (c_parser_next_token_is_keyword (parser, RID_SWITCH)); c_parser_consume_token (parser); - /* APPLE LOCAL radar 6083129 - byref escapes (C++ cp) */ - in_bc_stmt_block (); block = c_begin_compound_stmt (flag_isoc99); if (c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>")) { @@ -4260,8 +4249,6 @@ add_stmt (build1 (LABEL_EXPR, void_type_node, c_break_label)); c_break_label = save_break; add_stmt (c_end_compound_stmt (block, flag_isoc99)); - /* APPLE LOCAL radar 6083129 - byref escapes (C++ cp) */ - outof_bc_stmt_block (); } /* Parse a while statement (C90 6.6.5, C99 6.8.5). @@ -4286,8 +4273,6 @@ /* APPLE LOCAL begin for-fsf-4_4 3274130 5295549 */ \ attrs = c_parser_attributes (parser); /* APPLE LOCAL end for-fsf-4_4 3274130 5295549 */ \ - /* APPLE LOCAL radar 6083129 - byref escapes (C++ cp) */ - in_bc_stmt_block (); block = c_begin_compound_stmt (flag_isoc99); loc = c_parser_peek_token (parser)->location; cond = c_parser_paren_condition (parser); @@ -4301,8 +4286,6 @@ true); /* APPLE LOCAL end for-fsf-4_4 3274130 5295549 */ \ add_stmt (c_end_compound_stmt (block, flag_isoc99)); - /* APPLE LOCAL radar 6083129 - byref escapes (C++ cp) */ - outof_bc_stmt_block (); c_break_label = save_break; c_cont_label = save_cont; } @@ -4329,8 +4312,6 @@ /* APPLE LOCAL begin for-fsf-4_4 3274130 5295549 */ \ attrs = c_parser_attributes (parser); /* APPLE LOCAL end for-fsf-4_4 3274130 5295549 */ \ - /* APPLE LOCAL radar 6083129 - byref escapes (C++ cp) */ - in_bc_stmt_block (); block = c_begin_compound_stmt (flag_isoc99); loc = c_parser_peek_token (parser)->location; save_break = c_break_label; @@ -4350,8 +4331,6 @@ c_finish_loop (loc, cond, NULL, body, new_break, new_cont, attrs, false); /* APPLE LOCAL end for-fsf-4_4 3274130 5295549 */ \ add_stmt (c_end_compound_stmt (block, flag_isoc99)); - /* APPLE LOCAL radar 6083129 - byref escapes (C++ cp) */ - outof_bc_stmt_block (); } /* Parse a for statement (C90 6.6.5, C99 6.8.5). @@ -4391,8 +4370,6 @@ /* APPLE LOCAL begin for-fsf-4_4 3274130 5295549 */ \ attrs = c_parser_attributes (parser); /* APPLE LOCAL end for-fsf-4_4 3274130 5295549 */ \ - /* APPLE LOCAL radar 6083129 - byref escapes (C++ cp) */ - in_bc_stmt_block (); /* APPLE LOCAL radar 4472881 (in 4.2 ah) */ block = c_begin_compound_stmt (flag_isoc99 || c_dialect_objc ()); if (c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>")) @@ -4518,8 +4495,6 @@ /* APPLE LOCAL end radar 4708210 (for_objc_collection in 4.2) */ /* APPLE LOCAL radar 4472881 (in 4.2 ai) */ add_stmt (c_end_compound_stmt (block, flag_isoc99 || c_dialect_objc ())); - /* APPLE LOCAL radar 6083129 - byref escapes (C++ cp) */ - outof_bc_stmt_block (); c_break_label = save_break; c_cont_label = save_cont; } @@ -5598,8 +5573,7 @@ variable holds address of the outside variable referenced in. */ /* APPLE LOCAL begin radar 5932809 - copyable byref blocks (C++ cd) */ - if (TREE_CODE (expr.value) == VAR_DECL - && !building_block_byref_decl) + if (TREE_CODE (expr.value) == VAR_DECL) { if (BLOCK_DECL_BYREF (expr.value)) { @@ -5609,7 +5583,7 @@ /* What we have is an expression which is of type struct __Block_byref_X. Must get to the value of the variable embedded in this structure. It is at: - __Block_byref_X.forwarding->x */ + __Block_byref_X.__forwarding->x */ expr.value = build_byref_local_var_access (expr.value, DECL_NAME (orig_decl)); } @@ -6498,6 +6472,12 @@ && c_parser_next_token_is_not (parser, CPP_EOF)) { c_parser_objc_property_attribute (parser); + /* APPLE LOCAL begin radar 6302949 */ + if (c_parser_next_token_is_not (parser, CPP_COMMA) + && c_parser_next_token_is_not (parser, CPP_CLOSE_PAREN) + && c_parser_next_token_is_not (parser, CPP_EOF)) + warning (0, "property attributes must be separated by a comma"); + /* APPLE LOCAL end radar 6302949 */ if (c_parser_next_token_is (parser, CPP_COMMA) || c_parser_next_token_is (parser, CPP_NAME) /* error */) c_parser_consume_token (parser); @@ -9386,61 +9366,103 @@ } /* APPLE LOCAL end CW asm blocks */ /* APPLE LOCAL begin radar 5732232 - blocks (C++ ce) */ -static tree block_copy_assign_decl; -static tree block_destroy_decl; +/* APPLE LOCAL begin radar 6175959 */ +static GTY(()) tree block_copy_assign_decl; +static GTY(()) tree block_object_assign_decl; +static GTY(()) tree block_destroy_decl; +static GTY(()) tree block_object_dispose_func_decl; +/* APPLE LOCAL end radar 6175959 */ + +/* APPLE LOCAL begin radar 6300081 */ + +/* This function builds a "generic" block struct type, to be passed + into the debug information for blocks pointers, to allow gdb to + find the actual function pointer for the block. Any time the Blocks + structure layout changes, this may also need to change. + + Currently a block pointer is a pointer to a __block_literal_n struct, + the third field of which is a pointer to a __block_descriptor struct, + whose third field is the function pointer. There are other fields as + well, but these are the ones gdb needs to know about to find the + function pointer. Therefore a generic block struct currently looks + like this: + + struct __block_literal_generic + { + void * __isa; + int __flags; + int __reserved; + void (*__FuncPtr)(void *); + struct __block_descriptor + { + unsigned long int reserved; + unsigned long int Size; + } *__descriptor; + }; -void -gen_block_byref_release_exp (tree var_decl) -{ - tree cleanup = build_block_byref_release_exp (var_decl); - if (cleanup) - add_stmt (cleanup); -} + IF AT ANY TIME THE STRUCTURE OF A __BLOCK_LITERAL_N CHANGES, THIS + MUST BE CHANGED ALSO!! -bool building_block_byref_decl = false; -static bool -c_parser_block_byref_declarations (c_parser* parser) +*/ + +tree +build_generic_block_struct_type (void) { - if (!in_imm_block ()) - return false; - warning (0, "| x | has been deprecated in blocks"); - do { - struct c_expr byref_decl_expr; - c_parser_consume_token (parser); /* consume '|' or ',' */ - if (!c_parser_next_token_is (parser, CPP_NAME)) - { - error ("expected identifier in block by-reference variable list"); - return false; - } - building_block_byref_decl = true; - byref_decl_expr = c_parser_cast_expression (parser, NULL); - building_block_byref_decl = false; - if (byref_decl_expr.value != error_mark_node && - !(TREE_CODE (byref_decl_expr.value) == VAR_DECL && - (BLOCK_DECL_BYREF (byref_decl_expr.value) || - in_block_global_byref_list (byref_decl_expr.value)))) - error ( - "only a visible variable may be used in a block byref declaration"); - } while (c_parser_next_token_is (parser, CPP_COMMA)); + tree field_decl_chain; + tree field_decl; + tree block_struct_type; - if (!c_parser_next_token_is (parser, CPP_OR)) - { - error ("expected identifier or '|' at end of block by-reference variable list"); - return false; - } - c_parser_consume_token (parser); /* consume '|' */ - return true; + push_to_top_level (); + block_struct_type = start_struct (RECORD_TYPE, + get_identifier ("__block_literal_generic")); + + field_decl = build_decl (FIELD_DECL, get_identifier ("__isa"), ptr_type_node); + field_decl_chain = field_decl; + + field_decl = build_decl (FIELD_DECL, get_identifier ("__flags"), + integer_type_node); + chainon (field_decl_chain, field_decl); + + field_decl = build_decl (FIELD_DECL, get_identifier ("__reserved"), + integer_type_node); + chainon (field_decl_chain, field_decl); + + /* void *__FuncPtr; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("__FuncPtr"), ptr_type_node); + chainon (field_decl_chain, field_decl); + + field_decl = build_decl (FIELD_DECL, get_identifier ("__descriptor"), + build_block_descriptor_type (false)); + chainon (field_decl_chain, field_decl); + + TYPE_BLOCK_IMPL_STRUCT (block_struct_type) = 1; + finish_struct (block_struct_type, field_decl_chain, NULL_TREE); + pop_from_top_level (); + return block_struct_type; } +/* APPLE LOCAL end radar 6300081 */ +/* APPLE LOCAL begin radar 5847213 - radar 6329245 */ /** build_block_struct_type - - struct block_1 { - struct invok_impl impl; - void *CopyFuncPtr; // only if BLOCK_HAS_COPY_DISPOSE is set - void *DestroyFuncPtr; // only if BLOCK_HAS_COPY_DISPOSE is set + struct __block_literal_n { + void *__isa; // initialized to &_NSConcreteStackBlock or &_NSConcreteGlobalBlock + int __flags; + int __reserved; + void *__FuncPtr; + struct __block_descriptor { + unsigned long int reserved; // NULL + unsigned long int Size; // sizeof(struct __block_literal_n) + + // optional helper functions + void *CopyFuncPtr; // When BLOCK_HAS_COPY_DISPOSE + void *DestroyFuncPtr; // When BLOCK_HAS_COPY_DISPOSE + } *__descriptor; + + // imported variables int x; // ref variable list ... int *y; // byref variable list }; - */ +*/ static tree build_block_struct_type (struct block_sema_info * block_impl) { @@ -9448,9 +9470,6 @@ char buffer[32]; static int unique_count; tree block_struct_type; - /* build struct invok_impl */ - if (!invoke_impl_ptr_type) - build_block_internal_types (); /* Check and see if this block is required to have a Copy/Dispose helper function. If yes, set BlockHasCopyDispose to TRUE. */ @@ -9462,7 +9481,7 @@ break; } - /* Further check to see that we have __byref variables which require + /* Further check to see that we have __block variables which require Copy/Dispose helpers. */ for (chain = block_impl->block_byref_decl_list; chain; chain = TREE_CHAIN (chain)) @@ -9472,23 +9491,35 @@ break; } - sprintf(buffer, "__block_%d", ++unique_count); + sprintf(buffer, "__block_literal_%d", ++unique_count); push_to_top_level (); block_struct_type = start_struct (RECORD_TYPE, get_identifier (buffer)); - /* struct invok_impl impl; */ - field_decl = build_decl (FIELD_DECL, get_identifier ("impl"), - TREE_TYPE (invoke_impl_ptr_type)); + + /* void *__isa; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("__isa"), ptr_type_node); field_decl_chain = field_decl; + + /* int __flags */ + field_decl = build_decl (FIELD_DECL, get_identifier ("__flags"), + integer_type_node); + chainon (field_decl_chain, field_decl); + + /* int __reserved */ + field_decl = build_decl (FIELD_DECL, get_identifier ("__reserved"), + integer_type_node); + chainon (field_decl_chain, field_decl); + + /* void *__FuncPtr; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("__FuncPtr"), ptr_type_node); + chainon (field_decl_chain, field_decl); + + /* struct __block_descriptor *__descriptor */ + field_decl = build_decl (FIELD_DECL, get_identifier ("__descriptor"), + build_block_descriptor_type (block_impl->BlockHasCopyDispose)); + chainon (field_decl_chain, field_decl); + if (block_impl->BlockHasCopyDispose) { - /* void *CopyFuncPtr; */ - field_decl = build_decl (FIELD_DECL, get_identifier ("CopyFuncPtr"), - ptr_type_node); - chainon (field_decl_chain, field_decl); - /* void *DestroyFuncPtr; */ - field_decl = build_decl (FIELD_DECL, get_identifier ("DestroyFuncPtr"), - ptr_type_node); - chainon (field_decl_chain, field_decl); /* If inner block of a nested block has BlockHasCopyDispose, so does its outer block. */ if (block_impl->prev_block_info) @@ -9521,28 +9552,98 @@ return block_struct_type; } +/** build_descriptor_block_decl - + This routine builds a static block_descriptior variable of type: + struct __block_descriptor; and initializes it to: + {0, sizeof(struct literal_block_n), + copy_helper_block_1, // only if block BLOCK_HAS_COPY_DISPOSE + destroy_helper_block_1, // only if block BLOCK_HAS_COPY_DISPOSE + } +*/ +static tree +build_descriptor_block_decl (tree block_struct_type, struct block_sema_info *block_impl) +{ + extern tree create_tmp_var_raw (tree, const char *); + static int desc_unique_count; + int size; + tree helper_addr, fields; + tree decl, constructor, initlist; + tree exp, bind; + char name [32]; + tree descriptor_type = + TREE_TYPE (build_block_descriptor_type (block_impl->BlockHasCopyDispose)); + + sprintf (name, "__block_descriptor_tmp_%d", ++desc_unique_count); + decl = create_tmp_var_raw (descriptor_type, name); + DECL_CONTEXT (decl) = NULL_TREE; + DECL_ARTIFICIAL (decl) = 1; + + /* Initialize "reserved" field to 0 for now. */ + fields = TYPE_FIELDS (descriptor_type); + initlist = build_tree_list (fields, build_int_cst (long_unsigned_type_node, 0)); + fields = TREE_CHAIN (fields); + + /* Initialize "Size" field. */ + size = TREE_INT_CST_LOW (TYPE_SIZE_UNIT (block_struct_type)); + initlist = tree_cons (fields, + build_int_cst (long_unsigned_type_node, size), + initlist); + + if (block_impl->BlockHasCopyDispose) + { + /* Initialize "CopyFuncPtr" and "DestroyFuncPtr" fields. */ + /* Helpers were previously generated completeley as a nested + function (and context was required for code gen.) But they are not, + so context must be set to NULL so initialization logic does not complain. */ + DECL_CONTEXT (block_impl->copy_helper_func_decl) = NULL_TREE; + fields = TREE_CHAIN (fields); + helper_addr = build_fold_addr_expr (block_impl->copy_helper_func_decl); + helper_addr = convert (ptr_type_node, helper_addr); + initlist = tree_cons (fields, helper_addr, initlist); + DECL_CONTEXT (block_impl->destroy_helper_func_decl) = NULL_TREE; + fields = TREE_CHAIN (fields); + helper_addr = build_fold_addr_expr (block_impl->destroy_helper_func_decl); + helper_addr = convert (ptr_type_node, helper_addr); + initlist = tree_cons (fields, helper_addr, initlist); + } + constructor = build_constructor_from_list (descriptor_type, + nreverse (initlist)); + TREE_CONSTANT (constructor) = 1; + TREE_STATIC (constructor) = 1; + TREE_READONLY (constructor) = 1; + DECL_INITIAL (decl) = constructor; + exp = build_stmt (DECL_EXPR, decl); + bind = build3 (BIND_EXPR, void_type_node, decl, exp, NULL); + TREE_SIDE_EFFECTS (bind) = 1; + add_stmt (bind); + TREE_PUBLIC (decl) = 0; + TREE_STATIC (decl) = 1; + finish_decl (decl, constructor, NULL_TREE); + return decl; +} + /** build_block_struct_initlist - builds the initializer list: - { &_NSConcreteStackBlock or &_NSConcreteGlobalBlock // isa, - BLOCK_HAS_COPY_DISPOSE | BLOCK_IS_GLOBAL // flags, - sizeof(struct block_1), - helper_1 }, - copy_helper_block_1, // only if block BLOCK_HAS_COPY_DISPOSE - destroy_helper_block_1, // only if block BLOCK_HAS_COPY_DISPOSE - x, - &y + { &_NSConcreteStackBlock or &_NSConcreteGlobalBlock // __isa, + BLOCK_HAS_DESCRIPTOR | BLOCK_HAS_COPY_DISPOSE | BLOCK_IS_GLOBAL // __flags, + 0, // __reserved + &helper_1, // __FuncPtr, + &static_descriptor_variable // __descriptor, + x, // user variables. + &y + ... } */ static tree build_block_struct_initlist (tree block_struct_type, struct block_sema_info *block_impl) { - tree initlist; - int size; - tree helper_addr, chain, fields; - unsigned flags = 0; + tree initlist, helper_addr; + tree chain, fields; + unsigned int flags = BLOCK_HAS_DESCRIPTOR; static tree NSConcreteStackBlock_decl = NULL_TREE; static tree NSConcreteGlobalBlock_decl = NULL_TREE; + tree descriptor_block_decl = build_descriptor_block_decl (block_struct_type, block_impl); if (block_impl->BlockHasCopyDispose) /* Note! setting of this flag merely indicates to the runtime that @@ -9550,9 +9651,12 @@ routines. */ flags |= BLOCK_HAS_COPY_DISPOSE; - fields = TYPE_FIELDS (TREE_TYPE (invoke_impl_ptr_type)); - - if (!current_function_decl) + fields = TYPE_FIELDS (block_struct_type); + /* APPLE LOCAL begin radar 6230297 */ + if (!current_function_decl || + (block_impl->block_ref_decl_list == NULL_TREE && + block_impl->block_byref_decl_list == NULL_TREE)) + /* APPLE LOCAL end radar 6230297 */ { /* This is a global block. */ /* Find an existing declaration for _NSConcreteGlobalBlock or declare @@ -9596,34 +9700,28 @@ } fields = TREE_CHAIN (fields); + /* __flags */ initlist = tree_cons (fields, - build_int_cst (unsigned_type_node, flags), + build_int_cst (integer_type_node, flags), initlist); fields = TREE_CHAIN (fields); - size = TREE_INT_CST_LOW (TYPE_SIZE_UNIT (block_struct_type)); + + /* __reserved */ initlist = tree_cons (fields, - build_int_cst (unsigned_type_node, size), + build_int_cst (integer_type_node, 0), initlist); fields = TREE_CHAIN (fields); + + /* __FuncPtr */ helper_addr = build_fold_addr_expr (block_impl->helper_func_decl); helper_addr = convert (ptr_type_node, helper_addr); initlist = tree_cons (fields, helper_addr, initlist); - gcc_assert (invoke_impl_ptr_type); - initlist = build_constructor_from_list (TREE_TYPE (invoke_impl_ptr_type), - nreverse (initlist)); - fields = TYPE_FIELDS (block_struct_type); - initlist = build_tree_list (fields, initlist); - if (block_impl->BlockHasCopyDispose) - { - fields = TREE_CHAIN (fields); - helper_addr = build_fold_addr_expr (block_impl->copy_helper_func_decl); - helper_addr = convert (ptr_type_node, helper_addr); - initlist = tree_cons (fields, helper_addr, initlist); - fields = TREE_CHAIN (fields); - helper_addr = build_fold_addr_expr (block_impl->destroy_helper_func_decl); - helper_addr = convert (ptr_type_node, helper_addr); - initlist = tree_cons (fields, helper_addr, initlist); - } + fields = TREE_CHAIN (fields); + + /* __descriptor */ + initlist = tree_cons (fields, + convert (ptr_type_node, build_fold_addr_expr (descriptor_block_decl)), + initlist); for (chain = block_impl->block_original_ref_decl_list; chain; chain = TREE_CHAIN (chain)) { @@ -9632,14 +9730,30 @@ fields = TREE_CHAIN (fields); initlist = tree_cons (fields, copy_in_object (y), initlist); } - for (chain = block_impl->block_original_byref_decl_list; chain; + for (chain = block_impl->block_byref_decl_list; chain; chain = TREE_CHAIN (chain)) { - tree y = TREE_VALUE (chain); + tree y = lookup_name (DECL_NAME (TREE_VALUE (chain))); + tree forwarding_expr; + gcc_assert (y); TREE_USED (y) = 1; + if (COPYABLE_BYREF_LOCAL_VAR (y)) + { + /* For variables declared __block, either the original one + at the point of declaration or the imported version (which is + initialized in the helper function's prologue) is used to + initilize the byref variable field in the temporary. */ + if (TREE_CODE (TREE_TYPE (y)) != RECORD_TYPE) + y = build_indirect_ref (y, "unary *"); + /* We will be using the __block_struct_variable.__forwarding as the + initializer. */ + forwarding_expr = build_component_ref (y, get_identifier ("__forwarding")); + } + else + /* Global variable is always assumed passed by its address. */ + forwarding_expr = build_fold_addr_expr (y); fields = TREE_CHAIN (fields); - y = build_fold_addr_expr (y); - initlist = tree_cons (fields, y, initlist); + initlist = tree_cons (fields, forwarding_expr, initlist); } return initlist; } @@ -9648,29 +9762,39 @@ build_block_literal_tmp - This routine: 1) builds block type: - struct block_1 { - struct invok_impl impl; - void *CopyFuncPtr; // only if block BLOCK_HAS_COPY_DISPOSE - void *DestroyFuncPtr; // only if block BLOCK_HAS_COPY_DISPOSE + struct __block_literal_n { + void *__isa; // initialized to &_NSConcreteStackBlock or &_NSConcreteGlobalBlock + int __flags; + int __reserved; + void *__FuncPtr + struct __block_descriptor { + unsigned long int reserved; // NULL + unsigned long int Size; // sizeof(struct Block_literal_1) + + // optional helper functions + void *CopyFuncPtr; // When BLOCK_HAS_COPY_DISPOSE + void *DestroyFuncPtr; // When BLOCK_HAS_COPY_DISPOSE + } *__descriptor; + + // imported variables int x; // ref variable list ... int *y; // byref variable list }; 2) build function prototype: - double helper_1(struct block_1 *ii, int z); + double helper_1(struct __block_literal_n *ii, int z); 3) build the temporary initialization: - struct block_1 I = { - { &_NSConcreteStackBlock or &_NSConcreteGlobalBlock // isa, - BLOCK_HAS_COPY_DISPOSE | BLOCK_IS_GLOBAL // flags, - sizeof(struct block_1), - helper_1 }, - copy_helper_block_1, // only if block BLOCK_HAS_COPY_DISPOSE - destroy_helper_block_1, // only if block BLOCK_HAS_COPY_DISPOSE - x, - &y -}; - + struct __block_literal_n I = { + &_NSConcreteStackBlock or &_NSConcreteGlobalBlock // __isa, + BLOCK_HAS_DESCRIPTOR | BLOCK_HAS_COPY_DISPOSE | BLOCK_IS_GLOBAL // __flags, + 0, // __reserved + &helper_1, // __FuncPtr + &static_descriptor_variable // __descriptor, + x, // user variables. + &y + ... + }; It return the temporary. */ @@ -9683,12 +9807,22 @@ tree constructor, initlist; tree exp, bind; tree block_struct_type = TREE_TYPE (block_impl->block_arg_ptr_type); + /* APPLE LOCAL begin radar 6230297 */ + bool staticBlockTmp = (block_impl->block_ref_decl_list == NULL_TREE && + block_impl->block_byref_decl_list == NULL_TREE); block_holder_tmp_decl = create_tmp_var_raw (block_struct_type, name); /* Context will not be known until when the literal is synthesized. This is more so in the case of nested block literal blocks. */ - DECL_CONTEXT (block_holder_tmp_decl) = current_function_decl; + DECL_CONTEXT (block_holder_tmp_decl) = staticBlockTmp ? NULL_TREE + : current_function_decl; + /* In the new ABI, helper function decl. is the initializer for the + descriptor variable which is always declared static. So, it must + have no context; otherwise, gcc thinks that it requires trampoline! when + address of this function is used as initializer. */ + DECL_CONTEXT (block_impl->helper_func_decl) = NULL_TREE; + /* APPLE LOCAL end radar 6230297 */ DECL_ARTIFICIAL (block_holder_tmp_decl) = 1; initlist = build_block_struct_initlist (block_struct_type, @@ -9705,13 +9839,15 @@ TREE_SIDE_EFFECTS (bind) = 1; add_stmt (bind); /* Temporary representing a global block is made global static. */ - if (global_bindings_p ()) { + /* APPLE LOCAL radar 6230297 */ + if (staticBlockTmp || global_bindings_p ()) { TREE_PUBLIC (block_holder_tmp_decl) = 0; TREE_STATIC (block_holder_tmp_decl) = 1; finish_decl (block_holder_tmp_decl, constructor, NULL_TREE); } return block_holder_tmp_decl; } +/* APPLE LOCAL end radar 5847213 - radar 6329245 */ static tree clean_and_exit (tree block) @@ -9739,7 +9875,8 @@ DECL_ARG_TYPE (dst_arg) = block_impl->block_arg_ptr_type; src_arg = build_decl (PARM_DECL, get_identifier ("_src"), block_impl->block_arg_ptr_type); - DECL_CONTEXT (dst_arg) = cur_block->copy_helper_func_decl; + /* APPLE LOCAL radar 5847213 */ + DECL_CONTEXT (src_arg) = cur_block->copy_helper_func_decl; TREE_USED (src_arg) = 1; DECL_ARG_TYPE (src_arg) = block_impl->block_arg_ptr_type; arg_info = xcalloc (1, sizeof (struct c_arg_info)); @@ -9760,6 +9897,9 @@ chain = TREE_CHAIN (chain)) if (block_requires_copying (TREE_VALUE (chain))) { + /* APPLE LOCAL begin radar 6175959 */ + tree which_function_decl; + tree func_params, call_exp; tree p = TREE_VALUE (chain); tree dst_block_component, src_block_component; dst_block_component = build_component_ref (build_indirect_ref (dst_arg, "->"), @@ -9769,40 +9909,58 @@ if (TREE_CODE (TREE_TYPE (p)) == BLOCK_POINTER_TYPE) { - tree func_params, call_exp; - /* _Block_copy_assign(&_dest->myImportedBlock, _src->myImportedClosure) */ - /* Build a: void _Block_copy_assign (void *, void *) if not done + /* _Block_copy_assign(&_dest->myImportedBlock, _src->myImportedClosure, 0) */ + /* Build a: void _Block_copy_assign (void *, void *, int) if not done already. */ - if (!block_copy_assign_decl) + /* APPLE LOCAL begin radar 6310599 */ + if (!block_copy_assign_decl && + !(block_copy_assign_decl = lookup_name (get_identifier ("_Block_copy_assign")))) + /* APPLE LOCAL end radar 6310599 */ { tree func_type = build_function_type (void_type_node, tree_cons (NULL_TREE, ptr_type_node, - tree_cons (NULL_TREE, ptr_type_node, void_list_node))); + tree_cons (NULL_TREE, ptr_type_node, + tree_cons (NULL_TREE, integer_type_node, void_list_node)))); block_copy_assign_decl = builtin_function ("_Block_copy_assign", func_type, 0, NOT_BUILT_IN, 0, NULL_TREE); TREE_NOTHROW (block_copy_assign_decl) = 0; } - dst_block_component = build_fold_addr_expr (dst_block_component); - func_params = tree_cons (NULL_TREE, dst_block_component, - tree_cons (NULL_TREE, src_block_component, - NULL_TREE)); - call_exp = build_function_call (block_copy_assign_decl, func_params); - add_stmt (call_exp); + which_function_decl = block_copy_assign_decl; } else { - /* _dest-> imported_object_x = [_src->imported_object_x retain] */ - tree rhs, store; - /* [_src->imported_object_x retain] */ - rhs = retain_block_component (src_block_component); - store = build_modify_expr (dst_block_component, NOP_EXPR, rhs); - add_stmt (store); + /* _Block_object_assign(&_dest->myImportedBlock, _src->myImportedClosure, 0) */ + /* Build a: void _Block_object_assign (void *, void *, int) if not done + already. */ + if (!block_object_assign_decl && + !(block_object_assign_decl = lookup_name (get_identifier ("_Block_object_assign")))) + { + tree func_type = + build_function_type (void_type_node, + tree_cons (NULL_TREE, ptr_type_node, + tree_cons (NULL_TREE, ptr_type_node, + tree_cons (NULL_TREE, integer_type_node, void_list_node)))); + + block_object_assign_decl = builtin_function ("_Block_object_assign", func_type, + 0, NOT_BUILT_IN, 0, NULL_TREE); + TREE_NOTHROW (block_object_assign_decl) = 0; + } + which_function_decl = block_object_assign_decl; } + dst_block_component = build_fold_addr_expr (dst_block_component); + func_params = tree_cons (NULL_TREE, dst_block_component, + tree_cons (NULL_TREE, src_block_component, + tree_cons (NULL_TREE, + build_int_cst (integer_type_node, 0), + NULL_TREE))); + call_exp = build_function_call (which_function_decl, func_params); + add_stmt (call_exp); + /* APPLE LOCAL end radar 6175959 */ } - /* For each __byref declared variable used in |...| Must generate call to: + /* For each __block declared variable must generate call to: _Block_byref_assign_copy(&_dest->myImportedBlock, _src->myImportedBlock) */ for (chain = block_impl->block_byref_decl_list; chain; @@ -9833,6 +9991,30 @@ free (arg_info); } +/* APPLE LOCAL begin radar 6175959 */ +static tree +block_object_dispose (tree src_block_component) +{ + tree func_params; + if (!block_object_dispose_func_decl && + !(block_object_dispose_func_decl = lookup_name (get_identifier ("_Block_object_dispose")))) + { + tree func_type = + build_function_type (void_type_node, + tree_cons (NULL_TREE, ptr_type_node, + tree_cons (NULL_TREE, integer_type_node, void_list_node))); + + block_object_dispose_func_decl = builtin_function ("_Block_object_dispose", func_type, + 0, NOT_BUILT_IN, 0, NULL_TREE); + TREE_NOTHROW (block_object_dispose_func_decl) = 0; + } + func_params = tree_cons (NULL_TREE, src_block_component, + tree_cons (NULL_TREE, + build_int_cst (integer_type_node, 0), NULL_TREE)); + return build_function_call (block_object_dispose_func_decl, func_params); +} +/* APPLE LOCAL end radar 6175959 */ + static void synth_destroy_helper_block_func (struct block_sema_info * block_impl) { @@ -9860,6 +10042,7 @@ chain = TREE_CHAIN (chain)) if (block_requires_copying (TREE_VALUE (chain))) { + /* APPLE LOCAL begin radar 6175959 */ tree p = TREE_VALUE (chain); tree src_block_component; src_block_component = build_component_ref (build_indirect_ref (src_arg, "->"), @@ -9876,26 +10059,30 @@ { tree func_type = build_function_type (void_type_node, - tree_cons (NULL_TREE, ptr_type_node, void_list_node)); + tree_cons (NULL_TREE, ptr_type_node, + tree_cons (NULL_TREE, integer_type_node, void_list_node))); block_destroy_decl = builtin_function ("_Block_destroy", func_type, 0, NOT_BUILT_IN, 0, NULL_TREE); TREE_NOTHROW (block_destroy_decl) = 0; } - func_params = tree_cons (NULL_TREE, src_block_component, NULL_TREE); + func_params = tree_cons (NULL_TREE, src_block_component, + tree_cons (NULL_TREE, + build_int_cst (integer_type_node, 0), NULL_TREE)); call_exp = build_function_call (block_destroy_decl, func_params); add_stmt (call_exp); } else { tree rel_exp; - /* [_src->imported_object_0 release]; */ - rel_exp = release_block_component (src_block_component); + /* _Block_object_dispose(_src->imported_object_0, 0); */ + rel_exp = block_object_dispose (src_block_component); add_stmt (rel_exp); } + /* APPLE LOCAL end radar 6175959 */ } - /* For each __byref declared variable used in |...| Must generate call to: + /* For each __block declared variable must generate call to: _Block_byref_release(_src->myImportedClosure) */ for (chain = block_impl->block_byref_decl_list; chain; @@ -10078,6 +10265,8 @@ /* APPLE LOCAL begin radar 6237713 */ if (c_parser_next_token_is_keyword (parser, RID_ATTRIBUTE)) attributes = c_parser_attributes (parser); + /* APPLE LOCAL radar 6246527 */ + any_recognized_block_attribute (attributes); decl_attributes (&cur_block->helper_func_decl, attributes, 0); /* APPLE LOCAL end radar 6237713 */ Modified: llvm-gcc-4.2/trunk/gcc/c-typeck.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/c-typeck.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/c-typeck.c (original) +++ llvm-gcc-4.2/trunk/gcc/c-typeck.c Mon Nov 3 01:33:15 2008 @@ -76,9 +76,6 @@ static int require_constant_elements; /* APPLE LOCAL begin radar 5732232 - blocks (C++ cm) */ -/* APPLE LOCAL begin radar 5811943 - Fix type of pointers to Blocks */ -/* Move declaration of invoke_impl_ptr_type to c-common.c */ -/* APPLE LOCAL end radar 5811943 - Fix type of pointers to Blocks */ static bool types_are_block_compatible (tree lhptee, tree rhptee); static tree build_block_call (tree, tree, tree); /* APPLE LOCAL end radar 5732232 - blocks (C++ cm) */ @@ -2195,9 +2192,7 @@ (DECL_EXTERNAL (decl) || TREE_STATIC (decl))); /* Treat all 'global' variables as 'byref' by default. */ /* APPLE LOCAL begin radar 6014138 (C++ ci) */ - if (building_block_byref_decl || gdecl - || (TREE_CODE (decl) == VAR_DECL - && COPYABLE_BYREF_LOCAL_VAR (decl))) + if (gdecl || (TREE_CODE (decl) == VAR_DECL && COPYABLE_BYREF_LOCAL_VAR (decl))) /* APPLE LOCAL end radar 6014138 (C++ ci) */ { /* APPLE LOCAL begin radar 5803600 (C++ ci) */ @@ -3692,8 +3687,8 @@ } /* APPLE LOCAL begin 4154928 */ /* Objective-C pointer comparisons are a bit more lenient. */ - /* APPLE LOCAL radar 4229905 */ - else if (objc_have_common_type (type1, type2, -3, NULL_TREE)) + /* APPLE LOCAL radar 4229905 - radar 6231433 */ + else if (objc_have_common_type (type1, type2, -3, NULL_TREE, "conditional expression")) result_type = objc_common_type (type1, type2); /* APPLE LOCAL end 4154928 */ else @@ -4076,39 +4071,40 @@ return false; } +/* APPLE LOCAL begin radar 5847213 - radar 6329245 */ /** build_block_call - Routine to build a block call; as in: - ((double(*)(struct invok_impl *, int))(BLOCK_PTR_VAR->FuncPtr))(I, 42); + ((double(*)(void *, int))(BLOCK_PTR_EXP->__FuncPtr))(I, 42); FNTYPE is the original function type derived from the syntax. - FUNCTION is the4 block pointer variable. + BLOCK_PTR_EXP is the block pointer variable. PARAMS is the parameter list. */ static tree -build_block_call (tree fntype, tree function, tree params) +build_block_call (tree fntype, tree block_ptr_exp, tree params) { - tree block_ptr_exp; tree function_ptr_exp; tree typelist; - /* (struct invok_impl *)BLOCK_PTR_VAR */ - /* First convert it to 'void *'. */ - block_ptr_exp = convert (ptr_type_node, function); - gcc_assert (invoke_impl_ptr_type); - block_ptr_exp = convert (invoke_impl_ptr_type, block_ptr_exp); - params = tree_cons (NULL_TREE, block_ptr_exp, params); - /* BLOCK_PTR_VAR->FuncPtr */ - function_ptr_exp = - build_component_ref (build_indirect_ref (block_ptr_exp, "->"), - get_identifier ("FuncPtr")); + /* First convert BLOCK_PTR_EXP to 'void *'. */ + block_ptr_exp = convert (ptr_type_node, block_ptr_exp); + gcc_assert (generic_block_literal_struct_type); + block_ptr_exp = convert (build_pointer_type (generic_block_literal_struct_type), + block_ptr_exp); + /* BLOCK_PTR_VAR->__FuncPtr */ + function_ptr_exp = build_component_ref (build_indirect_ref (block_ptr_exp, "->"), + get_identifier ("__FuncPtr")); + gcc_assert (function_ptr_exp); - /* Build: result_type(*)(struct invok_impl *, function-arg-type-list) */ + /* Build: result_type(*)(void *, function-arg-type-list) */ typelist = TYPE_ARG_TYPES (fntype); - typelist = tree_cons (NULL_TREE, invoke_impl_ptr_type, typelist); + typelist = tree_cons (NULL_TREE, ptr_type_node, typelist); fntype = build_function_type (TREE_TYPE (fntype), typelist); function_ptr_exp = convert (build_pointer_type (fntype), function_ptr_exp); + params = tree_cons (NULL_TREE, block_ptr_exp, params); return fold_build3 (CALL_EXPR, TREE_TYPE (fntype), function_ptr_exp, params, NULL_TREE); } +/* APPLE LOCAL end radar 5847213 - radar 6329245 */ /* APPLE LOCAL end radar 5732232 - blocks (C++ cm) */ /* Interpret a cast of expression EXPR to type TYPE. */ @@ -4350,7 +4346,8 @@ break; } - objc_ok = objc_compare_types (type, rhstype, parmno, rname); + /* APPLE LOCAL radar 6231433 */ + objc_ok = objc_compare_types (type, rhstype, parmno, rname, "comparison"); } if (TYPE_MAIN_VARIANT (type) == TYPE_MAIN_VARIANT (rhstype)) @@ -5260,7 +5257,8 @@ /* APPLE LOCAL begin radar 4293709 */ if (c_dialect_objc ()) (void)objc_compare_types (type, TREE_TYPE (inside_init), - -2/* init */, NULL_TREE); + /* APPLE LOCAL radar 6231433 */ + -2/* init */, NULL_TREE, NULL); /* APPLE LOCAL end radar 4293709 */ } @@ -7543,8 +7541,7 @@ nlist->label = decl; label_context_stack_vm->labels_used = nlist; } - /* APPLE LOCAL radar 6083129 - byref escapes (C++ cp) */ - diagnose_byref_var_in_current_scope (); + TREE_USED (decl) = 1; return add_stmt (build1 (GOTO_EXPR, void_type_node, decl)); } @@ -7875,8 +7872,7 @@ retval = build2 (MODIFY_EXPR, TREE_TYPE (res), res, t); } - /* APPLE LOCAL radar 6083129 - byref escapes (C++ cp) */ - release_all_local_byrefs_at_return (); + ret_stmt = build_stmt (RETURN_EXPR, retval); TREE_NO_WARNING (ret_stmt) |= no_warning; return add_stmt (ret_stmt); @@ -8222,11 +8218,6 @@ if (skip) return NULL_TREE; - /* APPLE LOCAL begin radar 6083129 - byref escapes (C++ cp) */ - /* Before breaking out or on continue, release all local __byref - variables which go out of scope. */ - release_local_byrefs_at_break (); - /* APPLE LOCAL end radar 6083129 - byref escapes (C++ cp) */ return add_stmt (build1 (GOTO_EXPR, void_type_node, label)); } @@ -8688,7 +8679,8 @@ return error_mark_node; } - objc_ok = objc_compare_types (type0, type1, -3, NULL_TREE); + /* APPLE LOCAL radar 6231433 */ + objc_ok = objc_compare_types (type0, type1, -3, NULL_TREE, "comparison"); switch (code) { Modified: llvm-gcc-4.2/trunk/gcc/config/darwin-c.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/darwin-c.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/darwin-c.c (original) +++ llvm-gcc-4.2/trunk/gcc/config/darwin-c.c Mon Nov 3 01:33:15 2008 @@ -1086,8 +1086,6 @@ /* APPLE LOCAL end ObjC GC */ /* APPLE LOCAL begin radar 5932809 - copyable byref blocks */ if (flag_blocks) { - /* APPLE LOCAL radar 6096219 */ - builtin_define ("__byref=__attribute__((__blocks__(byref)))"); builtin_define ("__block=__attribute__((__blocks__(byref)))"); } /* APPLE LOCAL radar 6230656 */ Modified: llvm-gcc-4.2/trunk/gcc/config/darwin-sections.def URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/darwin-sections.def?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/darwin-sections.def (original) +++ llvm-gcc-4.2/trunk/gcc/config/darwin-sections.def Mon Nov 3 01:33:15 2008 @@ -89,7 +89,8 @@ ".section __TEXT,__picsymbolstub4,symbol_stubs,none,16", 0) /* APPLE LOCAL end ARM pic support */ DEF_SECTION (darwin_exception_section, 0, - ".section __DATA,__gcc_except_tab", 0) + /* APPLE LOCAL EH __TEXT __gcc_except_tab 5819051 */ + ".section __TEXT,__gcc_except_tab", 0) DEF_SECTION (darwin_eh_frame_section, 0, ".section " EH_FRAME_SECTION_NAME ",__eh_frame" EH_FRAME_SECTION_ATTR, 0) @@ -98,6 +99,12 @@ DEF_SECTION (objc_v2_message_refs_section, 0, ".section __DATA, __objc_msgrefs, coalesced", 0) /* APPLE LOCAL end radar 5575115 */ +/* APPLE LOCAL begin radar 6255595 */ +DEF_SECTION (objc_v2_classdefs_section, 0, + ".section __DATA, __objc_data", 0) +DEF_SECTION (objc_v2_metadata_section, 0, + ".section __DATA, __objc_const", 0) +/* APPLE LOCAL end radar 6255595 */ DEF_SECTION (objc_v2_classrefs_section, 0, ".section __DATA, __objc_classrefs, regular, no_dead_strip", 1) DEF_SECTION (objc_v2_classlist_section, 0, Modified: llvm-gcc-4.2/trunk/gcc/config/darwin.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/darwin.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/darwin.c (original) +++ llvm-gcc-4.2/trunk/gcc/config/darwin.c Mon Nov 3 01:33:15 2008 @@ -148,6 +148,10 @@ static const enum darwin_section_enum tomarkv2[] = { objc_v2_message_refs_section, + /* APPLE LOCAL begin radar 6255595 */ + objc_v2_classdefs_section, + objc_v2_metadata_section, + /* APPLE LOCAL end radar 6255595 */ objc_v2_classrefs_section, objc_v2_classlist_section, objc_v2_categorylist_section, @@ -1325,6 +1329,30 @@ return MACHOPIC_INDIRECT ? 3 : 0; } +/* APPLE LOCAL begin radar 5575115, 6255595 */ +/* This routine returns TRUE if EXP is a variable representing + on objective C meta data. */ +static inline bool +objc_internal_variable_name (tree exp) +{ + if (TREE_CODE (exp) == VAR_DECL) + { + tree decl_name = DECL_NAME (exp); + if (decl_name && TREE_CODE (decl_name) == IDENTIFIER_NODE + && IDENTIFIER_POINTER (decl_name)) + { + const char* name = IDENTIFIER_POINTER (decl_name); + return + (!strncmp (name, "_OBJC_", 6) + || !strncmp (name, "OBJC_", 5) + || !strncmp (name, "l_OBJC_", 7) + || !strncmp (name, "l_objc_", 7)); + } + } + return false; +} +/* APPLE LOCAL end radar 5575115, 6255595 */ + section * machopic_select_section (tree exp, int reloc, unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED) @@ -1423,14 +1451,9 @@ else return base_section; } - else if (TREE_CODE (exp) == VAR_DECL && - DECL_NAME (exp) && - TREE_CODE (DECL_NAME (exp)) == IDENTIFIER_NODE && - IDENTIFIER_POINTER (DECL_NAME (exp)) && - /* APPLE LOCAL begin radar 5575115 */ - (!strncmp (IDENTIFIER_POINTER (DECL_NAME (exp)), "_OBJC_", 6) - || !strncmp (IDENTIFIER_POINTER (DECL_NAME (exp)), "l_objc_", 7))) - /* APPLE LOCAL end radar 5575115 */ + /* APPLE LOCAL begin radar 5575115, 6255595 */ + else if (objc_internal_variable_name (exp)) + /* APPLE LOCAL end radar 5575115, 6255595 */ { const char *name = IDENTIFIER_POINTER (DECL_NAME (exp)); /* APPLE LOCAL begin radar 4792158 */ @@ -1505,8 +1528,8 @@ return darwin_sections[objc_v2_classrefs_section]; else if (!strncmp (name, "_OBJC_CLASSLIST_SUP_REFS_", 25)) return darwin_sections[objc_v2_super_classrefs_section]; - /* APPLE LOCAL radar 5575115 */ - else if (!strncmp (name, "l_objc_msgSend_", 15)) + /* APPLE LOCAL radar 5575115 - radar 6252174 */ + else if (!strncmp (name, "l_objc_msgSend", 14)) return darwin_sections[objc_v2_message_refs_section]; else if (!strncmp (name, "_OBJC_LABEL_CLASS_", 18)) return darwin_sections[objc_v2_classlist_section]; @@ -1524,8 +1547,14 @@ return darwin_sections[objc_v2_selector_refs_section]; else if (!strncmp (name, "_OBJC_IMAGE_INFO", 16)) return darwin_sections[objc_v2_image_info_section]; + /* APPLE LOCAL begin radar 6255595 */ + else if (!strncmp (name, "OBJC_CLASS_$_", 13) + || !strncmp (name, "OBJC_METACLASS_$_", 17)) + return darwin_sections[objc_v2_classdefs_section]; else - return base_section; + return (base_section == data_section) ? + darwin_sections[objc_v2_metadata_section] : base_section; + /* APPLE LOCAL end radar 6255595 */ } /* APPLE LOCAL end radar 4792158 */ } @@ -2158,6 +2187,8 @@ /* APPLE LOCAL begin pubtypes, approved for 4.3 4535968 */ DEBUG_PUBTYPES_SECTION, /* APPLE LOCAL end pubtypes, approved for 4.3 4535968 */ + /* APPLE LOCAL radar 6275985 debug inlined section */ + DEBUG_INLINED_SECTION, DEBUG_STR_SECTION, DEBUG_RANGES_SECTION }; Modified: llvm-gcc-4.2/trunk/gcc/config/darwin.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/darwin.h?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/darwin.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/darwin.h Mon Nov 3 01:33:15 2008 @@ -156,7 +156,8 @@ { "-seg_addr_table_filename", "-Zfn_seg_addr_table_filename" }, \ /* APPLE LOCAL mainline */ \ { "-umbrella", "-Zumbrella" }, \ - { "-fapple-kext", "-fapple-kext -static -Wa,-static" }, \ + /* APPLE LOCAL kext weak_import 5935650 */ \ + { "-fapple-kext", "-fapple-kext -static" }, \ { "-filelist", "-Xlinker -filelist -Xlinker" }, \ { "-findirect-virtual-calls", "-fapple-kext" }, \ { "-flat_namespace", "-Zflat_namespace" }, \ @@ -169,17 +170,20 @@ { "-install_name", "-Zinstall_name" }, \ /* LLVM LOCAL */ \ LLVM_FLAG \ - { "-mkernel", "-mkernel -static -Wa,-static" }, \ + /* APPLE LOCAL kext weak_import 5935650 */ \ + { "-mkernel", "-mkernel -static" }, \ { "-multiply_defined_unused", "-Zmultiplydefinedunused" }, \ { "-multiply_defined", "-Zmultiply_defined" }, \ { "-multi_module", "-Zmulti_module" }, \ - { "-static", "-static -Wa,-static" }, \ + /* APPLE LOCAL begin kext weak_import 5935650 */ \ + /* Removed -static */ \ + /* APPLE LOCAL end kext weak_import 5935650 */ \ /* APPLE LOCAL mainline */ \ { "-shared", "-Zdynamiclib" }, \ { "-single_module", "-Zsingle_module" }, \ { "-unexported_symbols_list", "-Zunexported_symbols_list" }, \ - /* APPLE LOCAL ObjC GC */ \ - { "-fobjc-gc", "-fobjc-gc -Wno-non-lvalue-assign" }, \ + /* APPLE LOCAL radar 6269491 */ \ + /* code removed. */ \ /* APPLE LOCAL begin constant cfstrings */ \ { "-fconstant-cfstrings", "-mconstant-cfstrings" }, \ { "-fno-constant-cfstrings", "-mno-constant-cfstrings" }, \ @@ -576,11 +580,14 @@ /* APPLE LOCAL end ARM 5683689 */ /* Default Darwin ASM_SPEC, very simple. */ +/* APPLE LOCAL begin kext weak_import 5935650 */ /* APPLE LOCAL begin radar 4161346 */ #define ASM_SPEC "-arch %(darwin_arch) \ %{Zforce_cpusubtype_ALL:-force_cpusubtype_ALL} \ - %{!Zforce_cpusubtype_ALL:%{faltivec:-force_cpusubtype_ALL}}" + %{!Zforce_cpusubtype_ALL:%{faltivec:-force_cpusubtype_ALL}} \ + %{mkernel|static|fapple-kext:%{!Zdynamic:-static}}" /* APPLE LOCAL end radar 4161346 */ +/* APPLE LOCAL end kext weak_import 5935650 */ /* APPLE LOCAL begin mainline 4.3 2006-10-31 4370143 */ /* We still allow output of STABS. */ @@ -614,6 +621,8 @@ /* APPLE LOCAL begin pubtypes, approved for 4.3 4535968 */ #define DEBUG_PUBTYPES_SECTION "__DWARF,__debug_pubtypes,regular,debug" /* APPLE LOCAL end pubtypes, approved for 4.3 4535968 */ +/* APPLE LOCAL radar 6275985 debug inlined section */ +#define DEBUG_INLINED_SECTION "__DWARF,__debug_inlined,regular,debug" #define DEBUG_STR_SECTION "__DWARF,__debug_str,regular,debug" #define DEBUG_RANGES_SECTION "__DWARF,__debug_ranges,regular,debug" @@ -858,6 +867,13 @@ } while (0) /* APPLE LOCAL end radar 4531086 */ +/* APPLE LOCAL begin radar 6307941 */ +#undef OBJC2_ABI_DISPATCH +#define OBJC2_ABI_DISPATCH \ +(darwin_macosx_version_min \ + && strverscmp (darwin_macosx_version_min, "10.6") < 0) +/* APPLE LOCAL end radar 6307941 */ + /* The RTTI data (e.g., __ti4name) is common and public (and static), but it does need to be referenced via indirect PIC data pointers. The machopic_define_symbol calls are telling the machopic subsystem @@ -1238,7 +1254,8 @@ #undef ASM_PREFERRED_EH_DATA_FORMAT #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \ - (((CODE) == 2 && (GLOBAL) == 1) \ + /* APPLE LOCAL EH __TEXT __gcc_except_tab 5819051 */ \ + ((((CODE) == 2 || (CODE) == 0) && (GLOBAL) == 1) \ ? (DW_EH_PE_pcrel | DW_EH_PE_indirect | DW_EH_PE_sdata4) : \ ((CODE) == 1 || (GLOBAL) == 0) ? DW_EH_PE_pcrel : DW_EH_PE_absptr) Modified: llvm-gcc-4.2/trunk/gcc/config/i386/i386.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/i386.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/i386.c (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/i386.c Mon Nov 3 01:33:15 2008 @@ -6880,6 +6880,20 @@ /* TLS references should always be enclosed in UNSPEC. */ if (SYMBOL_REF_TLS_MODEL (op0)) return false; + /* APPLE LOCAL begin 6227434 */ +#if TARGET_MACHO + /* ObjC machinery always has a legitimate PIC + address. */ + if (objc_anonymous_local_objc_name (XSTR (op0, 0)) + || SYMBOL_REF_LOCAL_P (op0)) + return true; + /* Under -mfix-and-continue, even local storage is + addressed via the GOT, so that the value of local + statics is preserved when a function is "fixed." */ + if (TARGET_FIX_AND_CONTINUE) + return false; +#endif + /* APPLE LOCAL end 6227434 */ if (!SYMBOL_REF_FAR_ADDR_P (op0) && SYMBOL_REF_LOCAL_P (op0)) return true; break; @@ -9615,10 +9629,7 @@ { int strict = (reload_in_progress || reload_completed); /* APPLE LOCAL dynamic-no-pic */ -#if TARGET_MACHO - rtx insn; -#endif - rtx op0, op1; + rtx insn, op0, op1; enum tls_model model; op0 = operands[0]; @@ -15923,14 +15934,14 @@ /* SSE4.1 */ { MASK_SSE4_1, CODE_FOR_sse4_1_packusdw, "__builtin_ia32_packusdw128", IX86_BUILTIN_PACKUSDW128, UNKNOWN, 0 }, { MASK_SSE4_1, CODE_FOR_sse4_1_eqv2di3, "__builtin_ia32_pcmpeqq", IX86_BUILTIN_PCMPEQQ, UNKNOWN, 0 }, - { MASK_SSE4_1, CODE_FOR_smaxv16qi3, "__builtin_ia32_pmaxsb128", IX86_BUILTIN_PMAXSB128, UNKNOWN, 0 }, - { MASK_SSE4_1, CODE_FOR_smaxv4si3, "__builtin_ia32_pmaxsd128", IX86_BUILTIN_PMAXSD128, UNKNOWN, 0 }, - { MASK_SSE4_1, CODE_FOR_umaxv4si3, "__builtin_ia32_pmaxud128", IX86_BUILTIN_PMAXUD128, UNKNOWN, 0 }, - { MASK_SSE4_1, CODE_FOR_umaxv8hi3, "__builtin_ia32_pmaxuw128", IX86_BUILTIN_PMAXUW128, UNKNOWN, 0 }, - { MASK_SSE4_1, CODE_FOR_sminv16qi3, "__builtin_ia32_pminsb128", IX86_BUILTIN_PMINSB128, UNKNOWN, 0 }, - { MASK_SSE4_1, CODE_FOR_sminv4si3, "__builtin_ia32_pminsd128", IX86_BUILTIN_PMINSD128, UNKNOWN, 0 }, - { MASK_SSE4_1, CODE_FOR_uminv4si3, "__builtin_ia32_pminud128", IX86_BUILTIN_PMINUD128, UNKNOWN, 0 }, - { MASK_SSE4_1, CODE_FOR_uminv8hi3, "__builtin_ia32_pminuw128", IX86_BUILTIN_PMINUW128, UNKNOWN, 0 }, + { MASK_SSE4_1, CODE_FOR_sse4_1_smaxv16qi3, "__builtin_ia32_pmaxsb128", IX86_BUILTIN_PMAXSB128, UNKNOWN, 0 }, + { MASK_SSE4_1, CODE_FOR_sse4_1_smaxv4si3, "__builtin_ia32_pmaxsd128", IX86_BUILTIN_PMAXSD128, UNKNOWN, 0 }, + { MASK_SSE4_1, CODE_FOR_sse4_1_umaxv4si3, "__builtin_ia32_pmaxud128", IX86_BUILTIN_PMAXUD128, UNKNOWN, 0 }, + { MASK_SSE4_1, CODE_FOR_sse4_1_umaxv8hi3, "__builtin_ia32_pmaxuw128", IX86_BUILTIN_PMAXUW128, UNKNOWN, 0 }, + { MASK_SSE4_1, CODE_FOR_sse4_1_sminv16qi3, "__builtin_ia32_pminsb128", IX86_BUILTIN_PMINSB128, UNKNOWN, 0 }, + { MASK_SSE4_1, CODE_FOR_sse4_1_sminv4si3, "__builtin_ia32_pminsd128", IX86_BUILTIN_PMINSD128, UNKNOWN, 0 }, + { MASK_SSE4_1, CODE_FOR_sse4_1_uminv4si3, "__builtin_ia32_pminud128", IX86_BUILTIN_PMINUD128, UNKNOWN, 0 }, + { MASK_SSE4_1, CODE_FOR_sse4_1_uminv8hi3, "__builtin_ia32_pminuw128", IX86_BUILTIN_PMINUW128, UNKNOWN, 0 }, { MASK_SSE4_1, CODE_FOR_sse4_1_mulv2siv2di3, 0, IX86_BUILTIN_PMULDQ128, UNKNOWN, 0 }, { MASK_SSE4_1, CODE_FOR_mulv4si3, "__builtin_ia32_pmulld128", IX86_BUILTIN_PMULLD128, UNKNOWN, 0 }, Modified: llvm-gcc-4.2/trunk/gcc/coverage.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/coverage.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/coverage.c (original) +++ llvm-gcc-4.2/trunk/gcc/coverage.c Mon Nov 3 01:33:15 2008 @@ -77,13 +77,15 @@ static unsigned no_coverage = 0; /* Cumulative counter information for whole program. */ -static unsigned prg_ctr_mask; /* Mask of counter types generated. */ -static unsigned prg_n_ctrs[GCOV_COUNTERS]; /* Total counters allocated. */ +/* APPLE LOCAL begin 5834718 */ +static GTY (()) unsigned prg_ctr_mask; /* Mask of counter types generated. */ +static GTY (()) unsigned prg_n_ctrs[GCOV_COUNTERS]; /* Total counters allocated. */ /* Counter information for current function. */ -static unsigned fn_ctr_mask; /* Mask of counters used. */ -static unsigned fn_n_ctrs[GCOV_COUNTERS]; /* Counters allocated. */ -static unsigned fn_b_ctrs[GCOV_COUNTERS]; /* Allocation base. */ +static GTY (()) unsigned fn_ctr_mask; /* Mask of counters used. */ +static GTY (()) unsigned fn_n_ctrs[GCOV_COUNTERS]; /* Counters allocated. */ +static GTY (()) unsigned fn_b_ctrs[GCOV_COUNTERS]; /* Allocation base. */ +/* APPLE LOCAL end 5834718 */ /* Name of the output file for coverage output file. */ static char *bbg_file_name; Modified: llvm-gcc-4.2/trunk/gcc/cp/call.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/call.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/cp/call.c (original) +++ llvm-gcc-4.2/trunk/gcc/cp/call.c Mon Nov 3 01:33:15 2008 @@ -797,7 +797,8 @@ /* Allow conversions among compatible ObjC pointer types (base conversions have been already handled above). */ else if (c_dialect_objc () - && objc_compare_types (to, from, -4, NULL_TREE)) + /* APPLE LOCAL radar 6231433 */ + && objc_compare_types (to, from, -4, NULL_TREE, NULL)) conv = build_conv (ck_ptr, to, conv); /* APPLE LOCAL end 4154928 */ else if (ptr_reasonably_similar (to_pointee, from_pointee)) Modified: llvm-gcc-4.2/trunk/gcc/cp/decl.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/decl.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/cp/decl.c (original) +++ llvm-gcc-4.2/trunk/gcc/cp/decl.c Mon Nov 3 01:33:15 2008 @@ -2465,39 +2465,6 @@ return check_previous_goto_1 (NULL_TREE, level, level->names, false, NULL); } -/* APPLE LOCAL begin blocks 6040305 (cp) */ -/* This routine issues a diagnostic if a __block variable is seen in - the current scope. This is for now called from a goto statement. */ -void -diagnose_byref_var_in_current_scope (void) -{ -#if 0 - /* FIXME finish this off. */ - struct c_scope *scope; - struct c_binding *b; - - gcc_assert (current_scope); - if (flag_objc_gc_only || !current_scope->byref_in_current_scope) - return; - - scope = current_scope; - while (scope && scope != file_scope) - { - for (b = scope->bindings; b; b = b->prev) - { - tree p = b->decl; - if (p && TREE_CODE (p) == VAR_DECL && COPYABLE_BYREF_LOCAL_VAR (p)) { - error ("local byref variable %s is in the scope of this goto", - IDENTIFIER_POINTER (DECL_NAME (p))); - return; - } - } - scope = scope->outer; - } -#endif -} -/* APPLE LOCAL end blocks 6040305 (cp) */ - /* Check that a new jump to a label DECL is OK. Called by finish_goto_stmt. */ @@ -2508,10 +2475,6 @@ bool saw_catch = false, identified = false; tree bad; - /* APPLE LOCAL begin 6040305 */ - diagnose_byref_var_in_current_scope (); - /* APPLE LOCAL end 6040305 */ - /* We can't know where a computed goto is jumping. So we assume that it's OK. */ if (TREE_CODE (decl) != LABEL_DECL) @@ -5494,12 +5457,12 @@ struct __Block_byref_x { // APPLE LOCAL radar 6244520 - void *isa; // NULL for everything except __weak pointers - struct Block_byref_x *forwarding; - int32_t flags; - int32_t size; - void *ByrefKeepFuncPtr; // Only if variable is __byref ObjC object - void *ByrefDestroyFuncPtr; // Only if variable is __byref ObjC object + void *__isa; // NULL for everything except __weak pointers + struct Block_byref_x *__forwarding; + int32_t __flags; + int32_t __size; + void *__ByrefKeepFuncPtr; // Only if variable is __block ObjC object + void *__ByrefDestroyFuncPtr; // Only if variable is __block ObjC object typex x; } x; */ @@ -5523,36 +5486,36 @@ Block_byref_type = block_start_struct (get_identifier (string)); /* APPLE LOCAL begin radar 6244520 */ - /* void *isa; */ - field = build_decl (FIELD_DECL, get_identifier ("isa"), ptr_type_node); + /* void *__isa; */ + field = build_decl (FIELD_DECL, get_identifier ("__isa"), ptr_type_node); fields = field; /* APPLE LOCAL end radar 6244520 */ - /* struct Block_byref_x *forwarding; */ - field = build_decl (FIELD_DECL, get_identifier ("forwarding"), + /* struct Block_byref_x *__forwarding; */ + field = build_decl (FIELD_DECL, get_identifier ("__forwarding"), build_pointer_type (Block_byref_type)); /* APPLE LOCAL radar 6244520 */ chainon (fields, field); - /* int32_t flags; */ - field = build_decl (FIELD_DECL, get_identifier ("flags"), + /* int32_t __flags; */ + field = build_decl (FIELD_DECL, get_identifier ("__flags"), unsigned_type_node); chainon (fields, field); - /* int32_t size; */ - field = build_decl (FIELD_DECL, get_identifier ("size"), + /* int32_t __size; */ + field = build_decl (FIELD_DECL, get_identifier ("__size"), unsigned_type_node); chainon (fields, field); if (COPYABLE_BYREF_LOCAL_NONPOD (decl)) { - /* void *ByrefKeepFuncPtr; */ - field = build_decl (FIELD_DECL, get_identifier ("ByrefKeepFuncPtr"), + /* void *__ByrefKeepFuncPtr; */ + field = build_decl (FIELD_DECL, get_identifier ("__ByrefKeepFuncPtr"), ptr_type_node); chainon (fields, field); - /* void *ByrefDestroyFuncPtr; */ - field = build_decl (FIELD_DECL, get_identifier ("ByrefDestroyFuncPtr"), + /* void *__ByrefDestroyFuncPtr; */ + field = build_decl (FIELD_DECL, get_identifier ("__ByrefDestroyFuncPtr"), ptr_type_node); chainon (fields, field); } @@ -5580,7 +5543,7 @@ { NULL, &x, 0, sizeof(struct __Block_byref_x)}; when INIT is NULL_TREE - For __byref ObjC objects, it also adds "byref_keep" and "byref_destroy" + For __block ObjC objects, it also adds "byref_keep" and "byref_destroy" Funtion pointers. So the most general initializers would be: { NULL, &x, 0, sizeof(struct __Block_byref_x), &byref_keep, &byref_destroy, @@ -5817,7 +5780,7 @@ if (DECL_EXTERNAL (decl) || TREE_STATIC (decl)) { warning (0, - "__byref attribute is only allowed on local variables - ignored"); + "__block attribute is only allowed on local variables - ignored"); COPYABLE_BYREF_LOCAL_VAR (decl) = 0; COPYABLE_BYREF_LOCAL_NONPOD (decl) = 0; } @@ -11554,6 +11517,82 @@ } +/* APPLE LOCAL begin warn missing prototype 6261539 */ +static bool +fn_previously_found (tree decl, tree olddecl) +{ + int types_match; + + if (olddecl == 0) + return false; + + if (TREE_CODE (olddecl) == OVERLOAD) + { + if (OVL_CHAIN (olddecl) == NULL_TREE) + olddecl = OVL_CURRENT (olddecl); + else + { + tree match; + for (match = olddecl; match; match = OVL_NEXT (match)) + { + if (fn_previously_found (decl, OVL_CURRENT (match))) + return true; + } + return false; + } + } + + /* Don't warn about previously erroneous things that have the same + name. */ + if (TREE_TYPE (olddecl) == error_mark_node) + return true; + + /* Internally defined things still need a prototype to escape the + warning. */ + if (DECL_ARTIFICIAL (olddecl)) + return false; + + if (TREE_CODE (olddecl) != FUNCTION_DECL) + return false; + + /* These will match or error, don't also spew prototype warnings. */ + if (DECL_EXTERN_C_P (olddecl) + && DECL_EXTERN_C_P (decl)) + return true; + + /* These will match or error, don't also spew prototype warnings. */ + if (compparms (TYPE_ARG_TYPES (TREE_TYPE (decl)), + TYPE_ARG_TYPES (TREE_TYPE (olddecl)))) + return true; + + types_match = decls_match (decl, olddecl); + + if (types_match) + return true; + + return false; +} + +inline static void +check_missing_prototype (tree decl) +{ + if (warn_missing_prototypes + && namespace_bindings_p () + && TREE_PUBLIC (decl) + && !DECL_MAIN_P (decl) + && DECL_NON_THUNK_FUNCTION_P (decl) + && ! DECL_FUNCTION_MEMBER_P (decl) + && DECL_NAMESPACE_SCOPE_P (decl) + && ! decl_anon_ns_mem_p (decl) + && ! DECL_DECLARED_INLINE_P (decl)) + { + tree olddecl = namespace_binding (DECL_NAME (decl), DECL_CONTEXT (decl)); + if (!fn_previously_found (decl, olddecl)) + warning (OPT_Wmissing_prototypes, "no previous prototype for %q+D", decl); + } +} +/* APPLE LOCAL end warn missing prototype 6261539 */ + /* Like start_preparsed_function, except that instead of a FUNCTION_DECL, this function takes DECLSPECS and DECLARATOR. @@ -11586,6 +11625,10 @@ gcc_assert (same_type_p (TREE_TYPE (TREE_TYPE (decl1)), integer_type_node)); + /* APPLE LOCAL begin warn missing prototype 6261539 */ + check_missing_prototype (decl1); + /* APPLE LOCAL end warn missing prototype 6261539 */ + start_preparsed_function (decl1, attrs, /*flags=*/SF_DEFAULT); return 1; Modified: llvm-gcc-4.2/trunk/gcc/cp/name-lookup.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/name-lookup.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/cp/name-lookup.c (original) +++ llvm-gcc-4.2/trunk/gcc/cp/name-lookup.c Mon Nov 3 01:33:15 2008 @@ -4039,12 +4039,12 @@ if (binding) { - /* APPLE LOCAL begin 6322334 */ - /* Ick, we don't want to find a hidden friend inside a - local class! */ - if (hidden_name_p (binding)) - POP_TIMEVAR_AND_RETURN (TV_NAME_LOOKUP, NULL_TREE); - /* APPLE LOCAL end 6322334 */ + /* APPLE LOCAL begin 6322334 */ + /* Ick, we don't want to find a hidden friend inside a + local class! */ + if (hidden_name_p (binding)) + POP_TIMEVAR_AND_RETURN (TV_NAME_LOOKUP, NULL_TREE); + /* APPLE LOCAL end 6322334 */ val = binding; break; Modified: llvm-gcc-4.2/trunk/gcc/cp/parser.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/parser.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/cp/parser.c (original) +++ llvm-gcc-4.2/trunk/gcc/cp/parser.c Mon Nov 3 01:33:15 2008 @@ -2794,6 +2794,12 @@ error ("unknown property attribute"); break; } + /* APPLE LOCAL begin radar 6302949 */ + if (cp_lexer_next_token_is_not (parser->lexer, CPP_COMMA) + && cp_lexer_next_token_is_not (parser->lexer, CPP_CLOSE_PAREN) + && cp_lexer_next_token_is_not (parser->lexer, CPP_EOF)) + warning (0, "property attributes must be separated by a comma"); + /* APPLE LOCAL end radar 6302949 */ if (cp_lexer_next_token_is (parser->lexer, CPP_COMMA)) cp_lexer_consume_token (parser->lexer); token = cp_lexer_peek_token (parser->lexer); @@ -19451,6 +19457,15 @@ if (cp_lexer_next_token_is_not (parser->lexer, CPP_CLOSE_PAREN)) cp_type = cp_parser_type_id (parser); + /* APPLE LOCAL begin radar 6261630 */ + if (cp_lexer_next_token_is_keyword (parser->lexer, RID_ATTRIBUTE)) + { + /* Chain on the trailing attribute. */ + tree attrs = chainon (NULL_TREE, + cp_parser_attributes_opt (parser)); + cplus_decl_attributes (&cp_type, attrs, 0); + } + /* APPLE LOCAL end radar 6261630 */ cp_parser_require (parser, CPP_CLOSE_PAREN, "`)'"); typename = build_tree_list (proto_quals, cp_type); } @@ -19753,8 +19768,8 @@ /* APPLE LOCAL begin radar 4290840 */ /* Check for all possibilities of illegal lookahead tokens. */ ptk = cp_lexer_peek_token (parser->lexer); - if (!(ptk->type == CPP_PLUS || ptk->type == CPP_MINUS - || ptk->type == CPP_EOF || ptk->keyword == RID_AT_END)) + /* APPLE LOCAL radar 6271728 */ + if (ptk->type == CPP_OPEN_BRACE) { perform_deferred_access_checks (); stop_deferring_access_checks (); @@ -19763,6 +19778,10 @@ pop_deferring_access_checks (); objc_finish_method_definition (meth); } + /* APPLE LOCAL begin radar 6271728 */ + else + cp_parser_require (parser, CPP_OPEN_BRACE, "`{'"); + /* APPLE LOCAL end radar 6271728 */ /* APPLE LOCAL end radar 4290840 */ } /* APPLE LOCAL begin C* interface */ @@ -20519,18 +20538,175 @@ } /* APPLE LOCAL end radar 6214617 */ -static tree block_copy_assign_decl; -static tree block_destroy_decl; +/* APPLE LOCAL begin radar 6175959 */ +static GTY(()) tree block_copy_assign_decl; +static GTY(()) tree block_object_assign_decl; +static GTY(()) tree block_destroy_decl; +static GTY(()) tree block_object_dispose_func_decl; +/* APPLE LOCAL end radar 6175959 */ + +/* APPLE LOCAL begin radar 5847213 - radar 6329245 */ +/** build_descriptor_block_decl - + This routine builds a static block_descriptior variable of type: + struct __block_descriptor; and initializes it to: + {0, sizeof(struct literal_block_n), + copy_helper_block_1, // only if block BLOCK_HAS_COPY_DISPOSE + destroy_helper_block_1, // only if block BLOCK_HAS_COPY_DISPOSE + } +*/ +static tree +build_descriptor_block_decl (tree block_struct_type, struct block_sema_info *block_impl) +{ + extern tree create_tmp_var_raw (tree, const char *); + static int desc_unique_count; + int size; + tree helper_addr; + tree decl, constructor; + char name [32]; + VEC(constructor_elt,gc) *impl_v = NULL; + tree descriptor_type = + TREE_TYPE (build_block_descriptor_type (block_impl->BlockHasCopyDispose)); + + sprintf (name, "__block_descriptor_tmp_%d", ++desc_unique_count); + decl = create_tmp_var_raw (descriptor_type, name); + DECL_CONTEXT (decl) = NULL_TREE; + + /* Initialize "reserved" field to 0 for now. */ + CONSTRUCTOR_APPEND_ELT(impl_v, NULL_TREE, build_int_cst (long_unsigned_type_node, 0)); + + /* Initialize "Size" field. */ + size = TREE_INT_CST_LOW (TYPE_SIZE_UNIT (block_struct_type)); + CONSTRUCTOR_APPEND_ELT(impl_v, NULL_TREE, build_int_cst (long_unsigned_type_node, size)); + + if (block_impl->BlockHasCopyDispose) + { + /* Initialize "CopyFuncPtr" and "DestroyFuncPtr" fields. */ + /* Helpers were previously generated completeley as a nested + function (and context was required for code gen.) But they are not, + so context must be set to NULL so initialization logic does not complain. */ + DECL_CONTEXT (block_impl->copy_helper_func_decl) = NULL_TREE; + helper_addr = build_fold_addr_expr (block_impl->copy_helper_func_decl); + helper_addr = convert (ptr_type_node, helper_addr); + CONSTRUCTOR_APPEND_ELT(impl_v, NULL_TREE, helper_addr); + + DECL_CONTEXT (block_impl->destroy_helper_func_decl) = NULL_TREE; + helper_addr = build_fold_addr_expr (block_impl->destroy_helper_func_decl); + helper_addr = convert (ptr_type_node, helper_addr); + CONSTRUCTOR_APPEND_ELT(impl_v, NULL_TREE, helper_addr); + } + /* Create a CONSTRUCTOR to represent the braced-initializer. */ + constructor = make_node (CONSTRUCTOR); + CONSTRUCTOR_ELTS (constructor) = impl_v; + TREE_PUBLIC (decl) = 0; + TREE_STATIC (decl) = 1; + cp_finish_decl (decl, constructor, 0, 0, LOOKUP_ONLYCONVERTING); + return decl; +} + +/* APPLE LOCAL begin radar 6300081 */ +/* This function builds a "generic" block struct type, to be passed + into the debug information for blocks pointers, to allow gdb to + find the actual function pointer for the block. Any time the Blocks + structure layout changes, this may also need to change. + + Currently a block pointer is a pointer to a __block_literal_n struct, + the third field of which is a pointer to a __block_descriptor struct, + whose third field is the function pointer. There are other fields as + well, but these are the ones gdb needs to know about to find the + function pointer. Therefore a generic block struct currently looks + like this: + + struct __block_literal_generic + { + void * __isa; + int __flags; + int __reserved; + void *__FuncPtr; + struct __block_descriptor + { + unsigned long int reserved; + unsigned long int Size; + } *__descriptor; + }; + + IF AT ANY TIME THE STRUCTURE OF A __BLOCK_LITERAL_N CHANGES, THIS + MUST BE CHANGED ALSO!! + +*/ + +tree +build_generic_block_struct_type (void) +{ + tree fields = NULL_TREE; + tree field; + tree block_struct_type; + + push_to_top_level (); + block_struct_type = xref_tag (record_type, + get_identifier ("__block_literal_generic"), + ts_current, false); + xref_basetypes (block_struct_type, NULL_TREE); + CLASSTYPE_DECLARED_CLASS (block_struct_type) = 0; + pushclass (block_struct_type); + + field = build_decl (FIELD_DECL, get_identifier ("__isa"), ptr_type_node); + TREE_CHAIN (field) = fields; + fields = field; + + field = build_decl (FIELD_DECL, get_identifier ("__flags"), + integer_type_node); + TREE_CHAIN (field) = fields; + fields = field; + + field = build_decl (FIELD_DECL, get_identifier ("__reserved"), + integer_type_node); + TREE_CHAIN (field) = fields; + fields = field; + + field = build_decl (FIELD_DECL, get_identifier ("__FuncPtr"), + ptr_type_node); + TREE_CHAIN (field) = fields; + fields = field; + + field = build_decl (FIELD_DECL, get_identifier ("__descriptor"), + build_block_descriptor_type (false)); + TREE_CHAIN (field) = fields; + fields = field; + + TYPE_FIELDS (block_struct_type) = fields; + TYPE_NAME (block_struct_type) = build_decl (TYPE_DECL, + get_identifier ("__block_literal_generic"), + block_struct_type); + TYPE_STUB_DECL (block_struct_type) = TYPE_NAME (block_struct_type); + TYPE_BLOCK_IMPL_STRUCT (block_struct_type) = 1; + finish_struct (block_struct_type, NULL_TREE); + pop_from_top_level (); + + return block_struct_type; +} +/* APPLE LOCAL end radar 6300081 */ /** build_block_struct_type - - struct block_1 { - struct invok_impl impl; - void *CopyFuncPtr; // only if BLOCK_HAS_COPY_DISPOSE is set - void *DestroyFuncPtr; // only if BLOCK_HAS_COPY_DISPOSE is set + struct __block_literal_n { + void *__isa; // initialized to &_NSConcreteStackBlock or &_NSConcreteGlobalBlock + int __flags; + int __reserved; + void *__FuncPtr; + + struct __block_descriptor { + unsigned long int reserved; // NULL + unsigned long int Size; // sizeof(struct __block_literal_n) + + // optional helper functions + void *CopyFuncPtr; // When BLOCK_HAS_COPY_DISPOSE + void *DestroyFuncPtr; // When BLOCK_HAS_COPY_DISPOSE + } *__descriptor; + + // imported variables int x; // ref variable list ... int *y; // byref variable list }; - */ +*/ static tree build_block_struct_type (struct block_sema_info * block_impl) { @@ -20538,9 +20714,6 @@ char buffer[32]; static int unique_count; tree block_struct_type; - /* build struct invok_impl */ - if (!invoke_impl_ptr_type) - build_block_internal_types (); /* Check and see if this block is required to have a Copy/Dispose helper function. If yes, set BlockHasCopyDispose to TRUE. */ @@ -20559,7 +20732,7 @@ /* APPLE LOCAL end radar 6214617 */ } - /* Further check to see that we have __byref variables which require + /* Further check to see that we have __block variables which require Copy/Dispose helpers. */ for (chain = block_impl->block_byref_decl_list; chain; chain = TREE_CHAIN (chain)) @@ -20569,29 +20742,43 @@ break; } - sprintf(buffer, "__block_%d", ++unique_count); + sprintf(buffer, "__block_literal_%d", ++unique_count); push_to_top_level (); - /* block_struct_type = start_struct (RECORD_TYPE, get_identifier (buffer)); */ - block_struct_type = make_aggr_type (RECORD_TYPE); + /* APPLE LOCAL begin radar 6243400 */ + block_struct_type = xref_tag (record_type, get_identifier (buffer), ts_current, false); xref_basetypes (block_struct_type, NULL_TREE); + CLASSTYPE_DECLARED_CLASS (block_struct_type) = 0; + pushclass (block_struct_type); + /* APPLE LOCAL end radar 6243400 */ + /* void * __isa; */ + field = build_decl (FIELD_DECL, get_identifier ("__isa"), ptr_type_node); + TREE_CHAIN (field) = fields; + fields = field; + + /* int __flags. */ + field = build_decl (FIELD_DECL, get_identifier ("__flags"), integer_type_node); + TREE_CHAIN (field) = fields; + fields = field; + + /* int __reserved. */ + field = build_decl (FIELD_DECL, get_identifier ("__reserved"), integer_type_node); + TREE_CHAIN (field) = fields; + fields = field; - /* struct invok_impl impl; */ - field = build_decl (FIELD_DECL, get_identifier ("impl"), - TREE_TYPE (invoke_impl_ptr_type)); + /* void *__FuncPtr. */ + field = build_decl (FIELD_DECL, get_identifier ("__FuncPtr"), + ptr_type_node); TREE_CHAIN (field) = fields; fields = field; + + /* struct __block_descriptor *__descriptor */ + field = build_decl (FIELD_DECL, get_identifier ("__descriptor"), + build_block_descriptor_type (block_impl->BlockHasCopyDispose)); + TREE_CHAIN (field) = fields; + fields = field; + if (block_impl->BlockHasCopyDispose) { - /* void *CopyFuncPtr; */ - field = build_decl (FIELD_DECL, get_identifier ("CopyFuncPtr"), - ptr_type_node); - TREE_CHAIN (field) = fields; - fields = field; - /* void *DestroyFuncPtr; */ - field = build_decl (FIELD_DECL, get_identifier ("DestroyFuncPtr"), - ptr_type_node); - TREE_CHAIN (field) = fields; - fields = field; /* If inner block of a nested block has BlockHasCopyDispose, so does its outer block. */ if (block_impl->prev_block_info) @@ -20622,33 +20809,27 @@ fields = field; } + /* APPLE LOCAL begin radar 6243400 */ + TYPE_FIELDS (block_struct_type) = fields; + TYPE_NAME (block_struct_type) = + build_decl (TYPE_DECL, get_identifier (buffer), block_struct_type); + TYPE_STUB_DECL (block_struct_type) = TYPE_NAME (block_struct_type); + finish_struct (block_struct_type, NULL_TREE); pop_from_top_level (); - /* finish_struct (block_struct_type, field_decl_chain, NULL_TREE); */ - finish_builtin_struct (block_struct_type, buffer, - fields, NULL_TREE); - /* APPLE LOCAL begin radar 6169527 */ - /* This type is now a full-blown c++ struct and as such, this field must - be set. */ - CLASSTYPE_AS_BASE (block_struct_type) = block_struct_type; - /* APPLE LOCAL end radar 6169527 */ - /* Zap out the name so that the back-end will give us the debugging - information for this anonymous RECORD_TYPE. */ - TYPE_NAME (block_struct_type) = NULL_TREE; - + /* APPLE LOCAL end radar 6243400 */ return block_struct_type; } /** build_block_struct_initlist - builds the initializer list: - { &_NSConcreteStackBlock or &_NSConcreteGlobalBlock // isa, - BLOCK_HAS_CXX_OBJ | BLOCK_HAS_COPY_DISPOSE | BLOCK_IS_GLOBAL // flags, - sizeof(struct block_1), - helper_1 - }, - copy_helper_block_1, // only if block BLOCK_HAS_COPY_DISPOSE - destroy_helper_block_1, // only if block BLOCK_HAS_COPY_DISPOSE - x, - &y + { &_NSConcreteStackBlock or &_NSConcreteGlobalBlock // __isa, + BLOCK_HAS_DESCRIPTOR | BLOCK_HAS_COPY_DISPOSE | BLOCK_IS_GLOBAL // __flags, + 0, // __reserved, + &helper_1, // __FuncPtr, + &static_descriptor_variable // __descriptor, + x, // user variables. + &y + ... } */ /* APPLE LOCAL begin radar 6169527 */ @@ -20658,14 +20839,12 @@ build_block_struct_initlist (tree block_struct_type, struct block_sema_info *block_impl) { - int size; - tree helper_addr, chain; - unsigned flags = 0; + tree expr, chain, helper_addr; + unsigned flags = BLOCK_HAS_DESCRIPTOR; static tree NSConcreteStackBlock_decl = NULL_TREE; static tree NSConcreteGlobalBlock_decl = NULL_TREE; - tree impl_constructor; VEC(constructor_elt,gc) *impl_v = NULL; - VEC(constructor_elt,gc) *v = NULL; + tree descriptor_block_decl = build_descriptor_block_decl (block_struct_type, block_impl); if (block_impl->BlockHasCopyDispose) /* Note! setting of this flag merely indicates to the runtime that @@ -20677,8 +20856,11 @@ if (block_impl->BlockImportsCxxObjects) flags |= BLOCK_HAS_CXX_OBJ; /* APPLE LOCAL end radar 6214617 */ - - if (!current_function_decl) + /* APPLE LOCAL begin radar 6230297 */ + if (!current_function_decl || + (block_impl->block_ref_decl_list == NULL_TREE && + block_impl->block_byref_decl_list == NULL_TREE)) + /* APPLE LOCAL end radar 6230297 */ { /* This is a global block. */ /* Find an existing declaration for _NSConcreteGlobalBlock or declare @@ -20719,56 +20901,76 @@ CONSTRUCTOR_APPEND_ELT(impl_v, NULL_TREE, build_fold_addr_expr (NSConcreteStackBlock_decl)); } - CONSTRUCTOR_APPEND_ELT(impl_v, NULL_TREE, build_int_cst (unsigned_type_node, flags)); - - size = TREE_INT_CST_LOW (TYPE_SIZE_UNIT (block_struct_type)); - CONSTRUCTOR_APPEND_ELT(impl_v, NULL_TREE, build_int_cst (unsigned_type_node, size)); - + /* __flags */ + CONSTRUCTOR_APPEND_ELT(impl_v, NULL_TREE, build_int_cst (integer_type_node, flags)); + /* __reserved */ + CONSTRUCTOR_APPEND_ELT(impl_v, NULL_TREE, build_int_cst (integer_type_node, 0)); + /* __FuncPtr */ helper_addr = build_fold_addr_expr (block_impl->helper_func_decl); - /* mark_used (block_impl->helper_func_decl); */ helper_addr = convert (ptr_type_node, helper_addr); CONSTRUCTOR_APPEND_ELT(impl_v, NULL_TREE, helper_addr); - - impl_constructor = make_node (CONSTRUCTOR); - CONSTRUCTOR_ELTS (impl_constructor) = impl_v; - CONSTRUCTOR_APPEND_ELT(v, NULL_TREE, impl_constructor); - if (block_impl->BlockHasCopyDispose) - { - helper_addr = build_fold_addr_expr (block_impl->copy_helper_func_decl); - helper_addr = convert (ptr_type_node, helper_addr); - CONSTRUCTOR_APPEND_ELT(v, NULL_TREE, helper_addr); - helper_addr = build_fold_addr_expr (block_impl->destroy_helper_func_decl); - helper_addr = convert (ptr_type_node, helper_addr); - CONSTRUCTOR_APPEND_ELT(v, NULL_TREE, helper_addr); - } + /* &static_descriptor_variable initializer */ + expr = build_fold_addr_expr (descriptor_block_decl); + CONSTRUCTOR_APPEND_ELT(impl_v, NULL_TREE, expr); + for (chain = block_impl->block_original_ref_decl_list; chain; chain = TREE_CHAIN (chain)) { tree y = TREE_VALUE (chain); TREE_USED (y) = 1; - CONSTRUCTOR_APPEND_ELT(v, NULL_TREE, copy_in_object (y)); + CONSTRUCTOR_APPEND_ELT(impl_v, NULL_TREE, copy_in_object (y)); } - for (chain = block_impl->block_original_byref_decl_list; chain; + for (chain = block_impl->block_byref_decl_list; chain; chain = TREE_CHAIN (chain)) { - tree y = TREE_VALUE (chain); + tree y = lookup_name (DECL_NAME (TREE_VALUE (chain))); + tree forwarding_expr; + gcc_assert (y); TREE_USED (y) = 1; - y = build_fold_addr_expr (y); - CONSTRUCTOR_APPEND_ELT(v, NULL_TREE, y); + if (COPYABLE_BYREF_LOCAL_VAR (y)) + { + /* For variables declared __block, either the original one + at the point of declaration or the imported version (which is + initialized in the helper function's prologue) is used to + initilize the byref variable field in the temporary. */ + if (TREE_CODE (TREE_TYPE (y)) != RECORD_TYPE) + y = build_indirect_ref (y, "unary *"); + /* We will be using the __block_struct_variable.__forwarding as the + initializer. */ + forwarding_expr = build_component_ref (y, get_identifier ("__forwarding")); + } + else + /* Global variable is always assumed passed by its address. */ + forwarding_expr = build_fold_addr_expr (y); + + CONSTRUCTOR_APPEND_ELT(impl_v, NULL_TREE, forwarding_expr); } - return v; + return impl_v; } /* APPLE LOCAL end radar 6169527 */ +/* APPLE LOCAL end radar 5847213 - radar 6329245 */ /** build_block_literal_tmp - This routine: 1) builds block type: - struct block_1 { - struct invok_impl impl; - void *CopyFuncPtr; // only if block BLOCK_HAS_COPY_DISPOSE - void *DestroyFuncPtr; // only if block BLOCK_HAS_COPY_DISPOSE + struct __block_literal_n { + void *__isa; // initialized to &_NSConcreteStackBlock or &_NSConcreteGlobalBlock + int __flags; + int __reserved; + void *__FuncPtr; + + struct __block_descriptor { + unsigned long int reserved; // NULL + unsigned long int Size; // sizeof(struct Block_literal_1) + + // optional helper functions + void *CopyFuncPtr; // When BLOCK_HAS_COPY_DISPOSE + void *DestroyFuncPtr; // When BLOCK_HAS_COPY_DISPOSE + } *__descriptor; + + // imported variables int x; // ref variable list ... int *y; // byref variable list }; @@ -20780,10 +20982,14 @@ struct block_1 I = { { &_NSConcreteStackBlock or &_NSConcreteGlobalBlock // isa, BLOCK_HAS_CXX_OBJ | BLOCK_HAS_COPY_DISPOSE | BLOCK_IS_GLOBAL // flags, - sizeof(struct block_1), - helper_1 }, - copy_helper_block_1, // only if block BLOCK_HAS_COPY_DISPOSE - destroy_helper_block_1, // only if block BLOCK_HAS_COPY_DISPOSE + 0, // reserved, + &helper_1, + &{ + NULL, + sizeof(struct block_1), + copy_helper_block_1, // only if block BLOCK_HAS_COPY_DISPOSE + destroy_helper_block_1, // only if block BLOCK_HAS_COPY_DISPOSE + }, x, &y }; @@ -20799,13 +21005,19 @@ tree block_holder_tmp_decl; tree constructor; tree block_struct_type = TREE_TYPE (block_impl->block_arg_ptr_type); - + /* APPLE LOCAL begin radar 6230297 */ + bool staticBlockTmp = (block_impl->block_ref_decl_list == NULL_TREE && + block_impl->block_byref_decl_list == NULL_TREE); block_holder_tmp_decl = create_tmp_var_raw (block_struct_type, name); /* Context will not be known until when the literal is synthesized. This is more so in the case of nested block literal blocks. */ maybe_push_decl (block_holder_tmp_decl); - DECL_CONTEXT (block_holder_tmp_decl) = current_function_decl; + DECL_CONTEXT (block_holder_tmp_decl) = staticBlockTmp ? NULL_TREE + : current_function_decl; + if (staticBlockTmp) + DECL_CONTEXT (block_impl->helper_func_decl) = NULL_TREE; + /* APPLE LOCAL end radar 6230297 */ DECL_ARTIFICIAL (block_holder_tmp_decl) = 1; /* Create a CONSTRUCTOR to represent the braced-initializer. */ @@ -20814,7 +21026,8 @@ CONSTRUCTOR_ELTS (constructor) = build_block_struct_initlist (block_struct_type, block_impl); /* Temporary representing a global block is made global static. */ - if (global_bindings_p ()) { + /* APPLE LOCAL radar 6230297 */ + if (staticBlockTmp || global_bindings_p ()) { TREE_PUBLIC (block_holder_tmp_decl) = 0; TREE_STATIC (block_holder_tmp_decl) = 1; } @@ -20851,7 +21064,7 @@ DECL_ARG_TYPE (dst_arg) = block_impl->block_arg_ptr_type; src_arg = build_decl (PARM_DECL, get_identifier ("_src"), block_impl->block_arg_ptr_type); - DECL_CONTEXT (dst_arg) = cur_block->copy_helper_func_decl; + DECL_CONTEXT (src_arg) = cur_block->copy_helper_func_decl; TREE_USED (src_arg) = 1; DECL_ARG_TYPE (src_arg) = block_impl->block_arg_ptr_type; /* arg_info = xcalloc (1, sizeof (struct c_arg_info)); */ @@ -20879,6 +21092,8 @@ /* APPLE LOCAL radar 6214617 */ if (cp_block_requires_copying (TREE_VALUE (chain))) { + /* APPLE LOCAL begin radar 6175959 */ + tree which_function_decl = NULL_TREE; tree p = TREE_VALUE (chain); tree dst_block_component, src_block_component; dst_block_component = build_component_ref (build_indirect_ref (dst_arg, "->"), @@ -20888,27 +21103,25 @@ if (TREE_CODE (TREE_TYPE (p)) == BLOCK_POINTER_TYPE) { - tree func_params, call_exp; - /* _Block_copy_assign(&_dest->myImportedBlock, _src->myImportedClosure) */ - /* Build a: void _Block_copy_assign (void *, void *) if not done + /* _Block_copy_assign(&_dest->myImportedBlock, _src->myImportedClosure, 0) */ + /* Build a: void _Block_copy_assign (void *, void *, int) if not done already. */ - if (!block_copy_assign_decl) + /* APPLE LOCAL begin radar 6310599 */ + if (!block_copy_assign_decl && + !(block_copy_assign_decl = lookup_name (get_identifier ("_Block_copy_assign")))) + /* APPLE LOCAL end radar 6310599 */ { tree func_type = build_function_type (void_type_node, tree_cons (NULL_TREE, ptr_type_node, - tree_cons (NULL_TREE, ptr_type_node, void_list_node))); + tree_cons (NULL_TREE, ptr_type_node, + tree_cons (NULL_TREE, integer_type_node, void_list_node)))); block_copy_assign_decl = builtin_function ("_Block_copy_assign", func_type, - 0, NOT_BUILT_IN, 0, NULL_TREE); + 0, NOT_BUILT_IN, 0, NULL_TREE); TREE_NOTHROW (block_copy_assign_decl) = 0; } - dst_block_component = build_fold_addr_expr (dst_block_component); - func_params = tree_cons (NULL_TREE, dst_block_component, - tree_cons (NULL_TREE, src_block_component, - NULL_TREE)); - call_exp = build_function_call (block_copy_assign_decl, func_params); - add_stmt (call_exp); + which_function_decl = block_copy_assign_decl; } /* APPLE LOCAL begin radar 6214617 */ else if (TYPE_HAS_CONSTRUCTOR (TREE_TYPE (p)) @@ -20921,14 +21134,38 @@ /* APPLE LOCAL end radar 6214617 */ else { - /* _dest-> imported_object_x = [_src->imported_object_x retain] */ - tree rhs, store; - /* [_src->imported_object_x retain] */ - rhs = retain_block_component (src_block_component); - store = build_modify_expr (dst_block_component, NOP_EXPR, rhs); - add_stmt (store); + /* _Block_object_assign(&_dest->myImportedBlock, _src->myImportedClosure, 0) */ + /* Build a: void _Block_object_assign (void *, void *, int) if not done + already. */ + if (!block_object_assign_decl && + !(block_object_assign_decl = lookup_name (get_identifier ("_Block_object_assign")))) + { + tree func_type = + build_function_type (void_type_node, + tree_cons (NULL_TREE, ptr_type_node, + tree_cons (NULL_TREE, ptr_type_node, + tree_cons (NULL_TREE, integer_type_node, void_list_node)))); + + block_object_assign_decl = builtin_function ("_Block_object_assign", func_type, + 0, NOT_BUILT_IN, 0, NULL_TREE); + TREE_NOTHROW (block_object_assign_decl) = 0; } + which_function_decl = block_object_assign_decl; + } + if (which_function_decl) + { + tree func_params, call_exp; + dst_block_component = build_fold_addr_expr (dst_block_component); + func_params = tree_cons (NULL_TREE, dst_block_component, + tree_cons (NULL_TREE, src_block_component, + tree_cons (NULL_TREE, + build_int_cst (integer_type_node, 0), + NULL_TREE))); + call_exp = build_function_call (which_function_decl, func_params); + add_stmt (call_exp); } + /* APPLE LOCAL end radar 6175959 */ + } /* For each __block declared variable used in |...| Must generate call to: _Block_byref_assign_copy(&_dest->myImportedBlock, _src->myImportedBlock) @@ -20964,6 +21201,30 @@ /* free (arg_info); */ } +/* APPLE LOCAL begin radar 6175959 */ +static tree +block_object_dispose (tree src_block_component) +{ + tree func_params; + if (!block_object_dispose_func_decl && + !(block_object_dispose_func_decl = lookup_name (get_identifier ("_Block_object_dispose")))) + { + tree func_type = + build_function_type (void_type_node, + tree_cons (NULL_TREE, ptr_type_node, + tree_cons (NULL_TREE, integer_type_node, void_list_node))); + + block_object_dispose_func_decl = builtin_function ("_Block_object_dispose", func_type, + 0, NOT_BUILT_IN, 0, NULL_TREE); + TREE_NOTHROW (block_object_dispose_func_decl) = 0; + } + func_params = tree_cons (NULL_TREE, src_block_component, + tree_cons (NULL_TREE, + build_int_cst (integer_type_node, 0), NULL_TREE)); + return build_function_call (block_object_dispose_func_decl, func_params); +} +/* APPLE LOCAL end radar 6175959 */ + static void synth_destroy_helper_block_func (struct block_sema_info * block_impl) { @@ -21010,22 +21271,27 @@ if (TREE_CODE (TREE_TYPE (p)) == BLOCK_POINTER_TYPE) { tree func_params, call_exp; + /* APPLE LOCAL begin radar 6175959 */ /* _Block_destroy(_src->myImportedClosure); */ /* _Block_destroy (void *); */ /* Build a: void _Block_destroy (void *) if not done already. */ if (!block_destroy_decl && - !(block_destroy_decl = lookup_name (get_identifier ("_Block_destroy")))) + !(block_destroy_decl = lookup_name (get_identifier ("_Block_destroy")))) { tree func_type = build_function_type (void_type_node, - tree_cons (NULL_TREE, ptr_type_node, void_list_node)); + tree_cons (NULL_TREE, ptr_type_node, + tree_cons (NULL_TREE, integer_type_node, void_list_node))); block_destroy_decl = builtin_function ("_Block_destroy", func_type, - 0, NOT_BUILT_IN, 0, NULL_TREE); + 0, NOT_BUILT_IN, 0, NULL_TREE); TREE_NOTHROW (block_destroy_decl) = 0; } - func_params = tree_cons (NULL_TREE, src_block_component, NULL_TREE); + func_params = tree_cons (NULL_TREE, src_block_component, + tree_cons (NULL_TREE, + build_int_cst (integer_type_node, 0), NULL_TREE)); call_exp = build_function_call (block_destroy_decl, func_params); + /* APPLE LOCAL end radar 6175959 */ add_stmt (call_exp); } /* APPLE LOCAL begin radar 6214617 */ @@ -21040,13 +21306,15 @@ else { tree rel_exp; - /* [_src->imported_object_0 release]; */ - rel_exp = release_block_component (src_block_component); + /* APPLE LOCAL begin radar 6175959 */ + /* _Block_object_dispose(_src->imported_object_0, 0); */ + rel_exp = block_object_dispose (src_block_component); + /* APPLE LOCAL end radar 6175959 */ add_stmt (rel_exp); } } - /* For each __byref declared variable used in |...| Must generate call to: + /* For each __block declared variable used in |...| Must generate call to: _Block_byref_release(_src->myImportedClosure) */ for (chain = block_impl->block_byref_decl_list; chain; @@ -21239,6 +21507,8 @@ /* APPLE LOCAL begin radar 6237713 */ if (cp_lexer_peek_token (parser->lexer)->keyword == RID_ATTRIBUTE) attributes = cp_parser_attributes_opt (parser); + /* APPLE LOCAL radar 6246527 */ + any_recognized_block_attribute (attributes); decl_attributes (&cur_block->helper_func_decl, attributes, 0); /* APPLE LOCAL end radar 6237713 */ @@ -21355,17 +21625,19 @@ /* APPLE LOCAL begin blocks 6040305 (ch) */ /* build_byref_local_var_access - converts EXPR to: - EXPR.forwarding->. + EXPR.__forwarding->. */ tree build_byref_local_var_access (tree expr, tree decl_name) { - tree exp = build_component_ref (expr, get_identifier ("forwarding")); + tree exp = build_component_ref (expr, get_identifier ("__forwarding")); exp = build_indirect_ref (exp, "unary *"); exp = build_component_ref (exp, decl_name); return exp; } +#define BINDING_VALUE(b) ((b)->value) + /** build_block_byref_decl - This routine inserts a variable declared as a 'byref' variable using the |...| syntax in helper function's outer-most scope. @@ -21373,13 +21645,67 @@ tree build_block_byref_decl (tree name, tree decl, tree exp) { + tree ptr_type, byref_decl; + /* APPLE LOCAL begin radar 6225809 */ + if (cur_block->prev_block_info) { + /* Traverse enclosing blocks. Insert a __block variable in + each enclosing block which has no declaration of this + variable. This is to ensure that the current (inner) block + gets the __block version of the variable; */ + struct block_sema_info *cb = cur_block->prev_block_info; + while (cb) { + struct cxx_binding *b = I_SYMBOL_BINDING (name); + gcc_assert (b); + gcc_assert (BINDING_VALUE (b)); + gcc_assert (TREE_CODE (BINDING_VALUE (b)) == VAR_DECL + || TREE_CODE (BINDING_VALUE (b)) == PARM_DECL); + /* Find the first declaration not in current block. */ + while (b && BINDING_VALUE (b) + && (TREE_CODE (BINDING_VALUE (b)) == VAR_DECL + || TREE_CODE (BINDING_VALUE (b)) == PARM_DECL) + && DECL_CONTEXT (BINDING_VALUE (b)) == cur_block->helper_func_decl) + { + /* FIXME: This can't happen?! */ + abort (); + /* b = b->previous; */ + } + + gcc_assert (b); + gcc_assert (BINDING_VALUE (b)); + gcc_assert (TREE_CODE (BINDING_VALUE (b)) == VAR_DECL + || TREE_CODE (BINDING_VALUE (b)) == PARM_DECL); + + /* Is the next declaration not in the enclosing block? */ + if (b && BINDING_VALUE (b) + && (TREE_CODE (BINDING_VALUE (b)) == VAR_DECL + || TREE_CODE (BINDING_VALUE (b)) == PARM_DECL) + && DECL_CONTEXT (BINDING_VALUE (b)) != cb->helper_func_decl) + { + /* No declaration of variable seen in the block. Must insert one. */ + /* FIXME: does this push enough? scope? */ + struct cp_binding_level *save_scope = current_binding_level; + struct block_sema_info *save_current_block = cur_block; + tree save_current_function_decl = current_function_decl; + current_binding_level = cb->cp_the_scope; + cur_block = cb; + current_function_decl = cb->helper_func_decl; + decl = build_block_byref_decl (name, decl, exp); + cur_block = save_current_block; + current_binding_level = save_scope; + current_function_decl = save_current_function_decl; + } + cb = cb->prev_block_info; + } + } + /* APPLE LOCAL end radar 6225809 */ + /* If it is already a byref declaration, do not add the pointer type because such declarations already have the pointer type added. This happens when we have two nested byref declarations in nested blocks. */ - tree ptr_type = (TREE_CODE (decl) == VAR_DECL && BLOCK_DECL_BYREF (decl)) - ? TREE_TYPE (decl) : build_pointer_type (TREE_TYPE (decl)); - tree byref_decl = build_decl (VAR_DECL, name, ptr_type); + ptr_type = (TREE_CODE (decl) == VAR_DECL && BLOCK_DECL_BYREF (decl)) + ? TREE_TYPE (decl) : build_pointer_type (TREE_TYPE (decl)); + byref_decl = build_decl (VAR_DECL, name, ptr_type); DECL_CONTEXT (byref_decl) = current_function_decl; BLOCK_DECL_BYREF (byref_decl) = 1; @@ -21401,8 +21727,8 @@ /* APPLE LOCAL end radar 6083129 - byref escapes (cp) */ cur_block->block_byref_decl_list = tree_cons (NULL_TREE, byref_decl, cur_block->block_byref_decl_list); - cur_block->block_original_byref_decl_list = - tree_cons (NULL_TREE, exp, cur_block->block_original_byref_decl_list); + /* APPLE LOCAL radar 5847213 */ + /* build of block_original_byref_decl_list us removed. */ /* APPLE LOCAL begin radar 6144664 */ DECL_SOURCE_LOCATION (byref_decl) = DECL_SOURCE_LOCATION (cur_block->helper_func_decl); @@ -21410,8 +21736,6 @@ return byref_decl; } -#define BINDING_VALUE(b) ((b)->value) - /** build_block_ref_decl - This routine inserts a copied-in variable (a variable referenced in the block but whose scope is outside the block) in helper @@ -21525,64 +21849,74 @@ return ref_decl; } -/** build_block_internal_types - This routine builds the block type: - struct __invoke_impl { - void *isa; - int32_t Flags; - int32_t Size; - void *FuncPtr; - } *invoke_impl_ptr_type; - */ -void -build_block_internal_types (void) +/* APPLE LOCAL begin radar 5847213 - radar 6329245 */ +static GTY (()) tree descriptor_ptr_type; +static GTY (()) tree descriptor_ptr_type_with_copydispose; +/** build_block_descriptor_type - This routine builds following internal type: + struct __block_descriptor { + unsigned long int reserved; // NULL + unsigned long int Size; // sizeof(struct Block_literal_1) + + // optional helper functions + void *CopyFuncPtr; // When BLOCK_HAS_COPY_DISPOSE is set (withCopyDispose true) + void *DestroyFuncPtr; // When BLOCK_HAS_COPY_DISPOSE is set (withCopyDispose true) +} *descriptor_ptr_type; + +Objects of this type will always be static. This is one main component of abi change. +*/ +tree +build_block_descriptor_type (bool withCopyDispose) { - tree fields = NULL_TREE, field_decl; - tree invoke_impl_type; + tree field_decl_chain = NULL_TREE, field_decl; + tree main_type; + + if (withCopyDispose && descriptor_ptr_type_with_copydispose) + return descriptor_ptr_type_with_copydispose; + if (!withCopyDispose && descriptor_ptr_type) + return descriptor_ptr_type; + + main_type = make_aggr_type (RECORD_TYPE); + xref_basetypes (main_type, NULL_TREE); + + /* unsigned long int reserved; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("reserved"), long_unsigned_type_node); + TREE_CHAIN (field_decl) = field_decl_chain; + field_decl_chain = field_decl; + + /* unsigned long int Size; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("Size"), long_unsigned_type_node); + TREE_CHAIN (field_decl) = field_decl_chain; + field_decl_chain = field_decl; - /* If a user-declaration of "struct __invoke_impl" is seen, use it. */ - invoke_impl_type = lookup_name_prefer_type (get_identifier ("__invoke_impl"), 2); - if (invoke_impl_type) + if (withCopyDispose) { - invoke_impl_ptr_type = build_pointer_type (invoke_impl_type); - return; + /* void *CopyFuncPtr; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("CopyFuncPtr"), ptr_type_node); + TREE_CHAIN (field_decl) = field_decl_chain; + field_decl_chain = field_decl; + /* void *DestroyFuncPtr; */ + field_decl = build_decl (FIELD_DECL, get_identifier ("DestroyFuncPtr"), ptr_type_node); + TREE_CHAIN (field_decl) = field_decl_chain; + field_decl_chain = field_decl; } - push_to_top_level (); - - /* invoke_impl_type = start_struct (RECORD_TYPE, get_identifier ("__invoke_impl")); */ - invoke_impl_type = make_aggr_type (RECORD_TYPE); - xref_basetypes (invoke_impl_type, NULL_TREE); - - /* void *isa; */ - field_decl = build_decl (FIELD_DECL, get_identifier ("isa"), ptr_type_node); - TREE_CHAIN (field_decl) = fields; - fields = field_decl; - - /* int32_t Flags; */ - field_decl = build_decl (FIELD_DECL, get_identifier ("Flags"), unsigned_type_node); - TREE_CHAIN (field_decl) = fields; - fields = field_decl; - - /* int32_t Size */ - field_decl = build_decl (FIELD_DECL, get_identifier ("Size"), unsigned_type_node); - TREE_CHAIN (field_decl) = fields; - fields = field_decl; - - /* void *FuncPtr; */ - field_decl = build_decl (FIELD_DECL, get_identifier ("FuncPtr"), ptr_type_node); - TREE_CHAIN (field_decl) = fields; - fields = field_decl; - - /* Mark this struct as being a block struct rather than a 'normal' - struct. */ - TYPE_BLOCK_IMPL_STRUCT (invoke_impl_type) = 1; - /* finish_struct (invoke_impl_type, field_decl_chain, NULL_TREE); */ - finish_builtin_struct (invoke_impl_type, "__invoke_impl", fields, NULL_TREE); - /* APPLE LOCAL radar 6169527 */ - CLASSTYPE_AS_BASE (invoke_impl_type) = invoke_impl_type; - pop_from_top_level (); - invoke_impl_ptr_type = build_pointer_type (invoke_impl_type); + /* Mark this struct as being a block struct rather than a 'normal' + struct. */ + TYPE_BLOCK_IMPL_STRUCT (main_type) = 1; + if (withCopyDispose) + finish_builtin_struct (main_type, "__block_descriptor_withcopydispose", field_decl_chain, NULL_TREE); + else + finish_builtin_struct (main_type, "__block_descriptor", field_decl_chain, NULL_TREE); + CLASSTYPE_AS_BASE (main_type) = main_type; + + main_type = build_pointer_type (main_type); + if (withCopyDispose) + descriptor_ptr_type_with_copydispose = main_type; + else + descriptor_ptr_type = main_type; + return main_type; } +/* APPLE LOCAL end radar 5847213 - radar 6329245 */ cp_declarator * make_block_pointer_declarator (tree attributes, @@ -21592,9 +21926,9 @@ struct cp_declarator *itarget = target; struct cp_declarator *ret = make_declarator (cdk_block_pointer); - /* Closure contructs seen -- generate supporting types. */ - if (!invoke_impl_ptr_type) - build_block_internal_types (); + /* APPLE LOCAL radar 5847213 */ + /* code removed */ + ret->attributes = attributes; ret->declarator = itarget; @@ -21666,11 +22000,15 @@ tree decl, block_component; tree_stmt_iterator i; tree initialization_stmt; + /* APPLE LOCAL radar 6163705 */ + int save_line = LOCATION_LINE (input_location); decl = component; block_component = build_component_ref (build_indirect_ref (self_parm, "->"), DECL_NAME (component)); gcc_assert (block_component); + /* APPLE LOCAL radar 6163705 */ + LOCATION_LINE (input_location) = DECL_SOURCE_LINE (decl) - 1; DECL_EXTERNAL (decl) = 0; TREE_STATIC (decl) = 0; TREE_USED (decl) = 1; @@ -21679,7 +22017,9 @@ initialization_stmt = push_stmt_list(); cp_finish_decl (decl, block_component, 0, 0, LOOKUP_ONLYCONVERTING); initialization_stmt = pop_stmt_list (initialization_stmt); - /* Prepend a initialization_stmt statement to the statement list. */ + /* APPLE LOCAL radar 6163705 */ + LOCATION_LINE (input_location) = save_line; + /* Prepend a initialization_stmt statement to the statement list. */ i = tsi_start (stmt); tsi_link_before (&i, initialization_stmt, TSI_SAME_STMT); } @@ -21710,6 +22050,11 @@ i = tsi_start (stmt); decl_stmt = build_stmt (DECL_EXPR, decl); SET_EXPR_LOCATION (decl_stmt, DECL_SOURCE_LOCATION (decl)); + /* APPLE LOCAL begin radar 6163705, Blocks prologues */ + /* Give the prologue statements a line number of one before the beginning of + the function, to make them easily identifiable later. */ + EXPR_LINENO (decl_stmt) = DECL_SOURCE_LINE (decl) - 1; + /* APPLE LOCAL end radar 6163705, Blocks prologues */ decl_stmt = build3 (BIND_EXPR, void_type_node, decl, decl_stmt, NULL); TREE_SIDE_EFFECTS (decl_stmt) = 1; Modified: llvm-gcc-4.2/trunk/gcc/cp/tree.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/tree.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/cp/tree.c (original) +++ llvm-gcc-4.2/trunk/gcc/cp/tree.c Mon Nov 3 01:33:15 2008 @@ -1717,6 +1717,15 @@ && same_type_p (TYPE_MAIN_VARIANT (TREE_TYPE (current_class_ref)), current_class_type)) decl = current_class_ref; + /* APPLE LOCAL begin radar 6154598 */ + else if (cur_block) + { + tree this_copiedin_var = lookup_name (this_identifier); + gcc_assert (!current_class_ref); + gcc_assert (this_copiedin_var); + decl = build_x_arrow (this_copiedin_var); + } + /* APPLE LOCAL end radar 6154598 */ else decl = build_dummy_object (context); Modified: llvm-gcc-4.2/trunk/gcc/cp/typeck.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/typeck.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/cp/typeck.c (original) +++ llvm-gcc-4.2/trunk/gcc/cp/typeck.c Mon Nov 3 01:33:15 2008 @@ -531,8 +531,8 @@ if (c_dialect_objc () && TREE_CODE (t1) == POINTER_TYPE && TREE_CODE (t2) == POINTER_TYPE) { - /* APPLE LOCAL radar 4229905 */ - if (objc_have_common_type (t1, t2, -3, NULL_TREE)) + /* APPLE LOCAL radar 4229905 - radar 6231433 */ + if (objc_have_common_type (t1, t2, -3, NULL_TREE, location)) /* APPLE LOCAL 4154928 */ return objc_common_type (t1, t2); } @@ -2762,43 +2762,46 @@ } /* APPLE LOCAL begin blocks 6040305 (cm) */ +/* APPLE LOCAL begin radar 5847213 - radar 6329245 */ /** build_block_call - Routine to build a block call; as in: - ((double(*)(struct invok_impl *, int))(BLOCK_PTR_VAR->FuncPtr))(I, 42); + ((double(*)(void *, int))(BLOCK_PTR_EXP->__FuncPtr))(I, 42); FNTYPE is the original function type derived from the syntax. - FUNCTION is the4 block pointer variable. + BLOCK_PTR_EXP is the block pointer variable. PARAMS is the parameter list. - */ +*/ static tree -build_block_call (tree fntype, tree function, tree params) +build_block_call (tree fntype, tree block_ptr_exp, tree params) { - tree block_ptr_exp; tree function_ptr_exp; tree typelist; tree result; - /* (struct invok_impl *)BLOCK_PTR_VAR */ /* First convert it to 'void *'. */ - block_ptr_exp = convert (ptr_type_node, function); - gcc_assert (invoke_impl_ptr_type); - block_ptr_exp = convert (invoke_impl_ptr_type, block_ptr_exp); - params = tree_cons (NULL_TREE, block_ptr_exp, params); - /* BLOCK_PTR_VAR->FuncPtr */ + block_ptr_exp = convert (ptr_type_node, block_ptr_exp); + gcc_assert (generic_block_literal_struct_type); + block_ptr_exp = convert (build_pointer_type (generic_block_literal_struct_type), + block_ptr_exp); + + /* BLOCK_PTR_VAR->__FuncPtr */ function_ptr_exp = - finish_class_member_access_expr (build_indirect_ref (block_ptr_exp, "->"), - get_identifier ("FuncPtr"), false); + finish_class_member_access_expr (build_indirect_ref (block_ptr_exp, "->"), + get_identifier ("__FuncPtr"), false); + gcc_assert (function_ptr_exp); - /* Build: result_type(*)(struct invok_impl *, function-arg-type-list) */ + /* Build: result_type(*)(void *, function-arg-type-list) */ typelist = TYPE_ARG_TYPES (fntype); - typelist = tree_cons (NULL_TREE, invoke_impl_ptr_type, typelist); + typelist = tree_cons (NULL_TREE, ptr_type_node, typelist); fntype = build_function_type (TREE_TYPE (fntype), typelist); function_ptr_exp = convert (build_pointer_type (fntype), function_ptr_exp); + params = tree_cons (NULL_TREE, block_ptr_exp, params); result = build3 (CALL_EXPR, TREE_TYPE (fntype), function_ptr_exp, params, NULL_TREE); /* FIXME: should do more from build_cxx_call */ result = convert_from_reference (result); return result; } +/* APPLE LOCAL end radar 5847213 - radar 6329245 */ /* APPLE LOCAL end blocks 6040305 (cm) */ tree @@ -6717,7 +6720,8 @@ } } - if (objc_compare_types (type, rhstype, parmno, rname)) + /* APPLE LOCAL file radar 6231433 */ + if (objc_compare_types (type, rhstype, parmno, rname, "comparison")) /* APPLE LOCAL radar 4874632 */ new_rhs = convert (type, rhs); } Modified: llvm-gcc-4.2/trunk/gcc/dwarf2out.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/dwarf2out.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/dwarf2out.c (original) +++ llvm-gcc-4.2/trunk/gcc/dwarf2out.c Mon Nov 3 01:33:15 2008 @@ -163,6 +163,8 @@ static GTY(()) section *debug_str_section; static GTY(()) section *debug_ranges_section; static GTY(()) section *debug_frame_section; +/* APPLE LOCAL radar 6275985 debug inlined section */ +static GTY(()) section *debug_inlined_section; /* How to start an assembler comment. */ #ifndef ASM_COMMENT_START @@ -330,6 +332,8 @@ const char *str; unsigned int refcount; unsigned int form; + /* APPLE LOCAL radar 6275985 debug inlined section */ + bool is_fn_name; char *label; }; @@ -3706,6 +3710,8 @@ typedef struct dw_separate_line_info_struct *dw_separate_line_info_ref; typedef struct pubname_struct *pubname_ref; typedef struct dw_ranges_struct *dw_ranges_ref; +/* APPLE LOCAL radar 6275985 debug inlined section */ +typedef struct inlined_entry_struct *inlined_ref; /* Each entry in the line_info_table maintains the file and line number associated with the label generated for that @@ -3787,6 +3793,20 @@ DEF_VEC_O(pubname_entry); DEF_VEC_ALLOC_O(pubname_entry, gc); /* APPLE LOCAL end pubtypes, approved for 4.3 4535968 */ +/* APPLE LOCAL begin radar 6275985 debug inlined section */ +DEF_VEC_O(dw_die_ref); +DEF_VEC_ALLOC_O(dw_die_ref, gc); + +typedef struct inlined_entry_struct GTY (()) +{ + dw_die_ref origin_die; + VEC(dw_die_ref,gc) *inlined_instances; +} +inlined_entry; + +DEF_VEC_O(inlined_entry); +DEF_VEC_ALLOC_O(inlined_entry, gc); +/* APPLE LOCAL end radar 6275985 debug inlined section */ struct dw_ranges_struct GTY(()) { @@ -3838,6 +3858,11 @@ /* Fixed size portion of public names info. */ #define DWARF_PUBNAMES_HEADER_SIZE (2 * DWARF_OFFSET_SIZE + 2) +/* APPLE LOCAL begin radar 6275985 debug inlined section */ +/* Fixed size portion of inlined section info. */ +#define DWARF_INLINED_HEADER_SIZE (3) +/* APPLE LOCAL end radar 6275985 debug inlined section */ + /* Fixed size portion of the address range info. */ #define DWARF_ARANGES_HEADER_SIZE \ (DWARF_ROUND (DWARF_INITIAL_LENGTH_SIZE + DWARF_OFFSET_SIZE + 4, \ @@ -3978,6 +4003,9 @@ static GTY (()) VEC (pubname_entry, gc) * pubtype_table; /* APPLE LOCAL end pubtypes, approved for 4.3 4535968 */ +/* APPLE LOCAL radar 6275985 debug inlined section */ +static GTY (()) VEC (inlined_entry, gc) * debug_inlined_table; + /* Array of dies for which we should generate .debug_arange info. */ static GTY((length ("arange_table_allocated"))) dw_die_ref *arange_table; @@ -4152,6 +4180,8 @@ static void unmark_all_dies (dw_die_ref); /* APPLE LOCAL pubtypes, approved for 4.3 4535968 */ static unsigned long size_of_pubnames (VEC (pubname_entry,gc) *); +/* APPLE LOCAL radar 6275985 debug inlined section */ +static unsigned long size_of_inlined (VEC (inlined_entry,gc) *); static unsigned long size_of_aranges (void); static enum dwarf_form value_format (dw_attr_ref); static void output_value_format (dw_attr_ref); @@ -4166,6 +4196,10 @@ static void add_pubtype (tree, dw_die_ref); static void output_pubnames (VEC (pubname_entry,gc) *); /* APPLE LOCAL end pubtypes, approved for 4.3 4535968 */ +/* APPLE LOCAL begin radar 6275985 debug inlined section */ +static void add_inlined_section_entry (dw_die_ref); +static void output_debug_inlined_section (VEC (inlined_entry,gc) *); +/* APPLE LOCAL end radar 6275985 debug inlined section */ static void add_arange (tree, dw_die_ref); static void output_aranges (void); static unsigned int add_ranges (tree); @@ -5099,6 +5133,18 @@ node->str = ggc_strdup (str); node->refcount++; + /* APPLE LOCAL begin radar 6275985 debug inlined section */ +#ifdef DEBUG_INLINED_SECTION + /* Force the names of functions (which may be inlined) to be in the + debug string section (i.e. string pointers). */ + if (die + && die->die_tag == DW_TAG_subprogram + && ((attr_kind == DW_AT_name) + || (attr_kind == DW_AT_MIPS_linkage_name))) + node->is_fn_name = true; +#endif + /* APPLE LOCAL end radar 6275985 debug inlined section */ + attr.dw_attr = attr_kind; attr.dw_attr_val.val_class = dw_val_class_str; attr.dw_attr_val.v.val_str = node; @@ -5130,17 +5176,23 @@ len = strlen (node->str) + 1; + /* APPLE LOCAL begin radar 6275985 debug inlined section */ + /* Ths sentence below is false. If the string is a function name we + always want it to go into the debug_str section. */ /* If the string is shorter or equal to the size of the reference, it is always better to put it inline. */ - if (len <= DWARF_OFFSET_SIZE || node->refcount == 0) + if ((len <= DWARF_OFFSET_SIZE || node->refcount == 0) + && !node->is_fn_name) return node->form = DW_FORM_string; /* If we cannot expect the linker to merge strings in .debug_str section, only put it into .debug_str if it is worth even in this single module. */ if ((debug_str_section->common.flags & SECTION_MERGE) == 0 - && (len - DWARF_OFFSET_SIZE) * node->refcount <= len) + && (len - DWARF_OFFSET_SIZE) * node->refcount <= len + && !node->is_fn_name) return node->form = DW_FORM_string; + /* APPLE LOCAL end radar 6275985 debug inlined section */ ASM_GENERATE_INTERNAL_LABEL (label, "LASF", dw2_string_counter); ++dw2_string_counter; @@ -5374,6 +5426,29 @@ return a->dw_attr_val.v.val_lbl_id; } +/* APPLE LOCAL begin radar 6275985 debug inlined section */ + +/* Get the attribute of type attr_kind, if the die has it. + This differs from get_AT in that it does NOT search any + abstract origin or specification dies; it ONLY looks directly + at the die that was passed in. */ + +static dw_attr_ref +has_AT (dw_die_ref die, enum dwarf_attribute attr_kind) +{ + dw_attr_ref a; + unsigned ix; + + if (! die) + return NULL; + + for (ix = 0; VEC_iterate (dw_attr_node, die->die_attr, ix, a); ix++) + if (a->dw_attr == attr_kind) + return a; + + return NULL; +} +/* APPLE LOCAL end radar 6275985 debug inlined section */ /* Get the attribute of type attr_kind. */ static dw_attr_ref @@ -6636,7 +6711,7 @@ if appropriate. */ if (! die->die_child) return; - /* APPLE LOCAL end radar 6066486 */ + /* APPLE LOCAL end radar 6066486 - Code moved from above. */ if (die->die_parent && die != die->die_parent->die_child) add_AT_die_ref (die, DW_AT_sibling, die->die_sib); @@ -6908,6 +6983,27 @@ unmark_all_dies (AT_ref (a)); } +/* APPLE LOCAL begin radar 6275985 debug inlined section */ +static unsigned long +size_of_inlined (VEC (inlined_entry, gc) * inlined_dies) +{ + unsigned long size; + unsigned i; + unsigned num_entries; + inlined_ref iptr; + + size = DWARF_INLINED_HEADER_SIZE; + + for (i = 0; VEC_iterate (inlined_entry, inlined_dies, i, iptr); i++) + { + num_entries = VEC_length (dw_die_ref, iptr->inlined_instances); + size += (2 * DWARF_OFFSET_SIZE) + (num_entries * DWARF2_ADDR_SIZE) + + (num_entries * DWARF_OFFSET_SIZE) + size_of_uleb128 (num_entries); + } + + return size; +} +/* APPLE LOCAL end radar 6275985 debug inlined section */ /* APPLE LOCAL begin pubtypes, approved for 4.3 4535968 */ /* Return the size of the .debug_pubnames or .debug_pubtypes table generated for the compilation unit. */ @@ -7547,6 +7643,121 @@ } } +/* APPLE LOCAL begin radar 6275985 debug inlined section */ +static void +add_inlined_section_entry (dw_die_ref die) +{ + unsigned i; + bool found = false; + inlined_ref iptr; + dw_die_ref current_origin_die = get_AT_ref (die, DW_AT_abstract_origin); + + /* APPLE LOCAL begin radar 6292557 */ + if (!current_origin_die) + return; + /* APPLE LOCAL end radar 6292557 */ + + if (!has_AT (die, DW_AT_low_pc)) + return; + + for (i = 0; VEC_iterate (inlined_entry, debug_inlined_table, i, iptr); i++) + { + if (iptr->origin_die == current_origin_die) + { + VEC_safe_push (dw_die_ref, gc, iptr->inlined_instances, &die); + found = true; + } + } + + if (!found) + { + inlined_entry *new_entry = (inlined_entry *) xmalloc (sizeof (inlined_entry)); + new_entry->origin_die = current_origin_die; + new_entry->inlined_instances = VEC_alloc (dw_die_ref, gc, 32); + VEC_safe_push (dw_die_ref, gc, new_entry->inlined_instances, &die); + VEC_safe_push (inlined_entry, gc, debug_inlined_table, new_entry); + } +} + +static void +output_debug_inlined_section (VEC (inlined_entry, gc) * inlined_dies) +{ + unsigned i; + unsigned long inlined_length = size_of_inlined (inlined_dies); + inlined_entry *iptr; + + if (DWARF_INITIAL_LENGTH_SIZE - DWARF_OFFSET_SIZE == 4) + dw2_asm_output_data (4, 0xffffffff, + "Initial length escape value indicating 64-bit DWARF extension"); + dw2_asm_output_data (DWARF_OFFSET_SIZE, inlined_length, + "Length of Inlined Subroutines Info"); + dw2_asm_output_data (2, DWARF_VERSION, "DWARF Version"); + /* + dw2_asm_output_offset (DWARF_OFFSET_SIZE, debug_info_section_label, + debug_info_section, + "Offset of Compilation Unit Info"); + dw2_asm_output_data (DWARF_OFFSET_SIZE, next_die_offset, + "Compilation Unit Length"); + */ + dw2_asm_output_data (1, DWARF2_ADDR_SIZE, "Pointer Size (in bytes)"); + + for (i = 0; VEC_iterate (inlined_entry, inlined_dies, i, iptr); i++) + { + dw_attr_ref name_attr; + dw_attr_ref mips_name_attr; + dw_die_ref *diep; + unsigned j; + unsigned num_entries = VEC_length (dw_die_ref, iptr->inlined_instances); + dw_die_ref origin_die = iptr->origin_die; + + mips_name_attr = get_AT (origin_die, DW_AT_MIPS_linkage_name); + name_attr = get_AT (origin_die, DW_AT_name); + + if (!mips_name_attr) + mips_name_attr = name_attr; + + gcc_assert (origin_die != NULL); + gcc_assert (name_attr != NULL); + gcc_assert (mips_name_attr != NULL); + gcc_assert (num_entries > 0); + gcc_assert (AT_string_form (name_attr) == DW_FORM_strp); + gcc_assert (AT_string_form (mips_name_attr) == DW_FORM_strp); + + /* + dw2_asm_output_data (DWARF_OFFSET_SIZE, origin_die->die_offset, + "Origin die offset"); + */ + + dw2_asm_output_offset (DWARF_OFFSET_SIZE, + mips_name_attr->dw_attr_val.v.val_str->label, + debug_str_section, + "MIPS linkage name: \"%s\"", + AT_string (mips_name_attr)); + + dw2_asm_output_offset (DWARF_OFFSET_SIZE, + name_attr->dw_attr_val.v.val_str->label, + debug_str_section, + "Function name: \"%s\"", AT_string (name_attr)); + + dw2_asm_output_data_uleb128 (num_entries, NULL); + + for (j = 0; VEC_iterate (dw_die_ref, iptr->inlined_instances, j, diep); + j++) + { + const char *low_pc = get_AT_low_pc (*diep); + + gcc_assert (low_pc != NULL); + + dw2_asm_output_data (DWARF_OFFSET_SIZE, (*diep)->die_offset, + "inlined subroutine die offset"); + dw2_asm_output_addr (DWARF2_ADDR_SIZE, low_pc, "%s", + "Low PC address"); + + } + } +} +/* APPLE LOCAL end radar 6275985 debug inlined section */ + /* Output the public names table used to speed up access to externally visible names; or the public types table used to find type definitions. For now, only generate entries for externally @@ -8774,8 +8985,7 @@ if (sub_die != NULL) add_AT_die_ref (mod_type_die, DW_AT_type, sub_die); - /* APPLE LOCAL begin radar 5359827 add named pointer types to - pubtype table */ + /* APPLE LOCAL begin radar 5359827 add named pointer types to pubtype table */ if (mod_type_die && mod_type_die->die_tag == DW_TAG_pointer_type && get_AT (mod_type_die, DW_AT_name)) @@ -11262,7 +11472,22 @@ here. */ if (origin_die) + /* APPLE LOCAL begin radar 6275985 debug inlined section */ + { add_AT_die_ref (die, DW_AT_abstract_origin, origin_die); + if (die->die_tag == DW_TAG_inlined_subroutine) + { + dw_attr_ref inline_attr = get_AT (origin_die, DW_AT_inline); + if (!inline_attr) + { + if (DECL_P (origin) && DECL_DECLARED_INLINE_P (origin)) + add_AT_unsigned (origin_die, DW_AT_inline, DW_INL_declared_inlined); + else + add_AT_unsigned (origin_die, DW_AT_inline, DW_INL_inlined); + } + } + } + /* APPLE LOCAL end radar 6275985 debug inlined section */ } /* We do not currently support the pure_virtual attribute. */ @@ -11500,15 +11725,18 @@ enum tree_code code = TREE_CODE (type); dw_die_ref type_die = NULL; +/* APPLE LOCAL begin radar 5847213 */ /* APPLE LOCAL begin radar 5811943 - Fix type of pointers to blocks */ /* APPLE LOCAL - radar 6113240 */ - if (code == BLOCK_POINTER_TYPE && invoke_impl_ptr_type) + /* APPLE LOCAL begin radar 6300081 */ + if (code == BLOCK_POINTER_TYPE && generic_block_literal_struct_type) { - /* APPLE LOCAL - radar 6113240 Removed gcc_assert */ - type = invoke_impl_ptr_type; + type = build_pointer_type (generic_block_literal_struct_type); code = TREE_CODE (type); } + /* APPLE LOCAL end radar 6300081 */ /* APPLE LOCAL end radar 5811943 - Fix type of pointers to Blocks */ +/* APPLE LOCAL end radar 5847213 */ /* ??? If this type is an unnamed subrange type of an integral or floating-point type, use the inner type. This is because we have no @@ -12474,11 +12702,28 @@ if (TREE_CODE (block_struct) != RECORD_TYPE) return ret_type; - if ((! TYPE_NAME (block_struct)) - || (! IDENTIFIER_POINTER (TYPE_NAME (block_struct))) - || (strncmp (IDENTIFIER_POINTER (TYPE_NAME (block_struct)), + /* APPLE LOCAL begin radar 6237086 */ + /* Look for a type name, and make sure it contains the __Block_byref_ + substring. */ + + if (! TYPE_NAME (block_struct)) + return ret_type; + + if (TREE_CODE (TYPE_NAME (block_struct)) != IDENTIFIER_NODE + && TREE_CODE (TYPE_NAME (block_struct)) != TYPE_DECL) + return ret_type; + + if (TREE_CODE (TYPE_NAME (block_struct)) == IDENTIFIER_NODE + && (strncmp (IDENTIFIER_POINTER (TYPE_NAME (block_struct)), "__Block_byref_", 14) != 0)) return ret_type; + else if (TREE_CODE (TYPE_NAME (block_struct)) == TYPE_DECL + && ((! DECL_NAME (TYPE_NAME (block_struct))) + || (strncmp + (IDENTIFIER_POINTER (DECL_NAME (TYPE_NAME (block_struct))), + "__Block_byref_", 14) != 0))) + return ret_type; + /* APPLE LOCAL end radar 6237086 */ /* We've got the record for a __Byref_block_etc; go through the fields looking for one with the same name as the var_decl. */ @@ -12504,6 +12749,35 @@ return ret_type; } +/* APPLE LOCAL begin radar 6237616 */ +/* Called from build_byref_var_location_expression, this function + checks to see if the starting location description is of type + DW_OP_regX (which, legally, cannot have anything added to it), + and if so, changes it to the equivalent DW_OP_bregX + 0, which + CAN legally have other stuff added to it. */ + +static void +blocks_fixup_location_description (dw_loc_descr_ref *main_descr) +{ + dw_loc_descr_ref old_descr; + dw_loc_descr_ref new_descr; + enum dwarf_location_atom new_op; + int regno; + unsigned int offset = 0; + + old_descr = *main_descr; + + if (old_descr->dw_loc_opc >= DW_OP_reg0 + && old_descr->dw_loc_opc <= DW_OP_reg31) + { + regno = old_descr->dw_loc_opc - DW_OP_reg0; + new_op = DW_OP_breg0 + regno; + new_descr = new_loc_descr (new_op, offset, 0); + *main_descr = new_descr; + } +} +/* APPLE LOCAL end radar 6237616 */ + /* This function is a helper function for the function below, add_block_byref_var_location_attribute. See comments there for full description. */ @@ -12516,6 +12790,12 @@ { dw_loc_descr_ref temp_descr; + /* APPLE LOCAL begin radar 6237616 */ + /* Make sure main_descr is legal, to start with. */ + + blocks_fixup_location_description (main_descr); + /* APPLE LOCAL end radar 6237616 */ + /* If we started with a pointer to the __Block_byref... struct, then the first thing we need to do is dereference the pointer (DW_OP_deref). */ @@ -12645,11 +12925,28 @@ if (TREE_CODE (block_struct) != RECORD_TYPE) return false; - if ((! TYPE_NAME (block_struct)) - || (! IDENTIFIER_POINTER (TYPE_NAME (block_struct))) - || strncmp (IDENTIFIER_POINTER (TYPE_NAME (block_struct)), - "__Block_byref_", 14) != 0) + /* APPLE LOCAL begin radar 6237086 */ + /* Look for a type name, and make sure it contains the __Block_byref_ + substring. */ + + if (! TYPE_NAME (block_struct)) + return false; + + if (TREE_CODE (TYPE_NAME (block_struct)) != IDENTIFIER_NODE + && TREE_CODE (TYPE_NAME (block_struct)) != TYPE_DECL) + return false; + + if (TREE_CODE (TYPE_NAME (block_struct)) == IDENTIFIER_NODE + && (strncmp (IDENTIFIER_POINTER (TYPE_NAME (block_struct)), + "__Block_byref_", 14) != 0)) + return false; + else if (TREE_CODE (TYPE_NAME (block_struct)) == TYPE_DECL + && ((! DECL_NAME (TYPE_NAME (block_struct))) + || (strncmp + (IDENTIFIER_POINTER (DECL_NAME (TYPE_NAME (block_struct))), + "__Block_byref_", 14) != 0))) return false; + /* APPLE LOCAL end radar 6237086 */ /* Find the forwarding field and the variable field within the struct. */ @@ -12668,7 +12965,7 @@ var_name) == 0) var_field = temp_field; else if (strcmp (IDENTIFIER_POINTER (DECL_NAME (temp_field)), - "forwarding") == 0) + "__forwarding") == 0) forwarding_field = temp_field; } @@ -12825,14 +13122,26 @@ { if (TREE_CODE (decl_type) == POINTER_TYPE) decl_type = TREE_TYPE (decl_type); + /* APPLE LOCAL begin radar 6237086 */ if (decl_type && TREE_CODE (decl_type) == RECORD_TYPE - && TYPE_NAME (decl_type) - && TREE_CODE (TYPE_NAME (decl_type)) == IDENTIFIER_NODE - && IDENTIFIER_POINTER (TYPE_NAME (decl_type)) - && (strncmp (IDENTIFIER_POINTER (TYPE_NAME (decl_type)), - "__Block_byref_", 14) == 0)) - is_block_byref_var = true; + && TYPE_NAME (decl_type)) + { + if (TREE_CODE (TYPE_NAME (decl_type)) == IDENTIFIER_NODE + && strncmp (IDENTIFIER_POINTER (TYPE_NAME (decl_type)), + "__Block_byref_", 14) == 0) + is_block_byref_var = true; + else if (TREE_CODE (TYPE_NAME (decl_type)) == TYPE_DECL + && DECL_NAME (TYPE_NAME (decl_type)) + && IDENTIFIER_POINTER (DECL_NAME (TYPE_NAME (decl_type))) + && (strncmp + (IDENTIFIER_POINTER (DECL_NAME (TYPE_NAME (decl_type))), + "__Block_byref_", 14) == 0)) + is_block_byref_var = true; + else + is_block_byref_var = false; + } + /* APPLE LOCAL end radar 6237086 */ } /* APPLE LOCAL end radar 6048397 handle block byref variables */ if (origin != NULL) @@ -13053,6 +13362,8 @@ decls_for_scope (stmt, subr_die, depth); current_function_has_inlines = 1; + /* APPLE LOCAL radar 6275985 debug inlined section */ + add_inlined_section_entry (subr_die); } else /* We may get here if we're the outer block of function A that was @@ -14846,6 +15157,8 @@ pubname_table = VEC_alloc (pubname_entry, gc, 32); pubtype_table = VEC_alloc (pubname_entry, gc, 32); /* APPLE LOCAL end pubtypes, approved for 4.3 4535968 */ + /* APPLE LOCAL radar 6275985 debug inlined section */ + debug_inlined_table = VEC_alloc (inlined_entry, gc, 32); /* Generate the initial DIE for the .debug section. Note that the (string) value given in the DW_AT_name attribute of the DW_TAG_compile_unit DIE @@ -14879,6 +15192,12 @@ SECTION_DEBUG, NULL); #endif /* APPLE LOCAL end pubtypes, approved for 4.3 4535968 */ + /* APPLE LOCAL begin radar 6275985 debug inlined section */ +#ifdef DEBUG_INLINED_SECTION + debug_inlined_section = get_section (DEBUG_INLINED_SECTION, + SECTION_DEBUG, NULL); +#endif + /* APPLE LOCAL end radar 6275985 debug inlined section */ debug_str_section = get_section (DEBUG_STR_SECTION, DEBUG_STR_SECTION_FLAGS, NULL); debug_ranges_section = get_section (DEBUG_RANGES_SECTION, @@ -15105,15 +15424,19 @@ s->refcount++; /* Avoid unnecessarily putting strings that are used less than twice in the hash table. */ - if (s->refcount - == ((DEBUG_STR_SECTION_FLAGS & SECTION_MERGE) ? 1 : 2)) + /* APPLE LOCAL begin radar 6275985 debug inlined section */ + /* We always want function names to go into the hash table. */ + if ((s->refcount + == ((DEBUG_STR_SECTION_FLAGS & SECTION_MERGE) ? 1 : 2)) + || s->is_fn_name) { void ** slot; slot = htab_find_slot_with_hash (debug_str_hash, s->str, htab_hash_string (s->str), INSERT); - gcc_assert (*slot == NULL); - *slot = s; + if (*slot == NULL) + *slot = s; + /* APPLE LOCAL end radar 6275985 debug inlined section */ } } } @@ -15402,6 +15725,17 @@ #endif /* APPLE LOCAL end pubtypes, approved for 4.3 4535968 */ + /* APPLE LOCAL begin radar 6275985 debug inlined section */ +#ifdef DEBUG_INLINED_SECTION + /* Output debug section containing info about inlined subroutines */ + if (! VEC_empty (inlined_entry, debug_inlined_table)) + { + switch_to_section (debug_inlined_section); + output_debug_inlined_section (debug_inlined_table); + } +#endif + /* APPLE LOCAL end radar 6275985 debug inlined section */ + /* Output the address range information. We only put functions in the arange table, so don't write it out if we don't have any. */ if (fde_table_in_use) Modified: llvm-gcc-4.2/trunk/gcc/function.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/function.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/function.c (original) +++ llvm-gcc-4.2/trunk/gcc/function.c Mon Nov 3 01:33:15 2008 @@ -216,6 +216,8 @@ static void do_clobber_return_reg (rtx, void *); static void do_use_return_reg (rtx, void *); static void set_insn_locators (rtx, int) ATTRIBUTE_UNUSED; +/* APPLE LOCAL radar 6163705, Blocks prologues */ +static rtx find_block_prologue_insns (void); /* Pointer to chain of `struct function' for containing functions. */ struct function *outer_function_chain; @@ -5140,6 +5142,140 @@ } #endif +/* APPLE LOCAL begin radar 6163705, Blocks prologues */ + +/* The function should only be called for Blocks functions. + + On being called, the main instruction list for the Blocks function + may contain instructions for setting up the ref_decl and byref_decl + variables in the Block. Those isns really need to go before the + function prologue note rather than after. If such instructions are + present, they are identifiable by their source line number, which + will be one line preceding the declaration of the function. If + they are present, there will also be a source line note instruction + for that line. + + This function does a set of things: + - It finds the first such prologue insn. + - It finds the last such prologue insn. + - It changes the insn locator of all such prologue insns to + the prologue locator. + - It finds the source line note for the bogus location and + removes it. + - It decides if it is safe to place the prolgoue end note + after the last prologue insn it finds, and if so, returns + the last prologue insn (otherwise it returns NULL). + + This function makes the following checks to determine if it is + safe to move the prologue end note to just below the last + prologue insn it finds. If ALL of the checks succeed then it + is safe. If any check fails, this function returns NULL. The + checks it makes are: + + - There were no INSN_P instructions that occurred before the + first prologue insn. + - If there are any non-prologue insns between the first & last + prologue insn, the non-prologue insns do not outnumber the + prologue insns. + - The first prologue insn & the last prologue insn are in the + same basic block. +*/ + +static rtx +find_block_prologue_insns (void) +{ + rtx first_prologue_insn = NULL; + rtx last_prologue_insn = NULL; + rtx line_number_note = NULL; + rtx tmp_insn; + int num_prologue_insns = 0; + int total_insns = 0; + int prologue_line = DECL_SOURCE_LINE (cfun->decl) - 1; + bool other_insns_before_prologue = false; + bool start_of_fnbody_found = false; + + /* Go through all the insns and find the first prologue insn, the + last prologue insn, the source line location note, and whether or + not there are any "real" insns that occur before the first + prologue insn. Re-set the insn locator for prologue insns to the + prologue locator. */ + + for (tmp_insn = get_insns(); tmp_insn; tmp_insn = NEXT_INSN (tmp_insn)) + { + if (INSN_P (tmp_insn)) + { + if (insn_line (tmp_insn) == prologue_line) + { + if (!first_prologue_insn) + first_prologue_insn = tmp_insn; + num_prologue_insns++; + last_prologue_insn = tmp_insn; + INSN_LOCATOR (tmp_insn) = prologue_locator; + } + else if (!first_prologue_insn + && start_of_fnbody_found) + other_insns_before_prologue = true; + } + else if (NOTE_P (tmp_insn) + && NOTE_LINE_NUMBER (tmp_insn) == NOTE_INSN_FUNCTION_BEG) + start_of_fnbody_found = true; + else if (NOTE_P (tmp_insn) + && (XINT (tmp_insn, 5) == prologue_line)) + line_number_note = tmp_insn; + } + + /* If there were no prologue insns, return now. */ + + if (!first_prologue_insn) + return NULL; + + /* If the source location note for the line before the beginning of the + function was found, remove it. */ + + if (line_number_note) + remove_insn (line_number_note); + + /* If other real insns got moved above the prologue insns, we can't + pull out the prologue insns, so return now. */ + + if (other_insns_before_prologue && (optimize > 0)) + return NULL; + + /* Count the number of insns between the first prologue insn and the + last prologue insn; also count the number of non-prologue insns + between the first prologue insn and the last prologue insn. */ + + tmp_insn = first_prologue_insn; + while (tmp_insn != last_prologue_insn) + { + total_insns++; + tmp_insn = NEXT_INSN (tmp_insn); + } + total_insns++; + + /* If more than half of the insns between the first & last prologue + insns are not prologue insns, then there is too much code that + got moved in between prologue insns (by optimizations), so we + will not try to pull it out. */ + + if ((num_prologue_insns * 2) <= total_insns) + return NULL; + + /* Make sure all the prologue insns are within one basic block. + If the insns cross a basic block boundary, then there is a chance + that moving them will cause incorrect code, so don't do it. */ + + gcc_assert (first_prologue_insn != NULL); + gcc_assert (last_prologue_insn != NULL); + + if (BLOCK_FOR_INSN (first_prologue_insn) != + BLOCK_FOR_INSN (last_prologue_insn)) + return NULL; + + return last_prologue_insn; +} +/* APPLE LOCAL end radar 6163705, Blocks prologues */ + /* Generate the prologue and epilogue RTL if the machine supports it. Thread this into place with notes indicating where the prologue ends and where the epilogue begins. Update the basic block information when possible. */ @@ -5163,13 +5299,24 @@ #ifdef HAVE_prologue if (HAVE_prologue) { + /* APPLE LOCAL begin radar 6163705, Blocks prologues */ + rtx last_prologue_insn = NULL; + + if (BLOCK_SYNTHESIZED_FUNC (cfun->decl)) + last_prologue_insn = find_block_prologue_insns(); + /* APPLE LOCAL end radar 6163705, Blocks prologues */ + start_sequence (); seq = gen_prologue (); emit_insn (seq); /* Retain a map of the prologue insns. */ record_insns (seq, &prologue); - prologue_end = emit_note (NOTE_INSN_PROLOGUE_END); + + /* APPLE LOCAL begin radar 6163705, Blocks prologues */ + if (!last_prologue_insn) + prologue_end = emit_note (NOTE_INSN_PROLOGUE_END); + /* APPLE LOCAL end radar 6163705, Blocks prologues */ #ifndef PROFILE_BEFORE_PROLOGUE /* Ensure that instructions are not moved into the prologue when @@ -5190,7 +5337,11 @@ insert_insn_on_edge (seq, single_succ_edge (ENTRY_BLOCK_PTR)); inserted = 1; - } + + /* APPLE LOCAL begin radar 6163705, Blocks prologues */ + if (last_prologue_insn) + emit_note_after (NOTE_INSN_PROLOGUE_END, last_prologue_insn); + /* APPLE LOCAL end radar 6163705, Blocks prologues */ } #endif /* If the exit block has no non-fake predecessors, we don't need Modified: llvm-gcc-4.2/trunk/gcc/gimplify.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/gimplify.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/gimplify.c (original) +++ llvm-gcc-4.2/trunk/gcc/gimplify.c Mon Nov 3 01:33:15 2008 @@ -1148,8 +1148,9 @@ tree result_decl, result; if (!ret_expr || TREE_CODE (ret_expr) == RESULT_DECL - /* APPLE LOCAL radar 6040305 - blocks */ - || ret_expr == error_mark_node || cur_block) + /* APPLE LOCAL radar 6261552 */ + /* code to check for cur_block is removed. */ + || ret_expr == error_mark_node) return GS_ALL_DONE; if (VOID_TYPE_P (TREE_TYPE (TREE_TYPE (current_function_decl)))) Modified: llvm-gcc-4.2/trunk/gcc/ipa-type-escape.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/ipa-type-escape.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/ipa-type-escape.c (original) +++ llvm-gcc-4.2/trunk/gcc/ipa-type-escape.c Mon Nov 3 01:33:15 2008 @@ -519,11 +519,22 @@ /* Return true if PARENT is supertype of CHILD. Both types must be known to be structures or unions. */ +/* APPLE LOCAL begin 6107012 */ +static struct pointer_set_t GTY(()) *parent_type_p_pset; +/* APPLE LOCAL end 6107012 */ + static bool parent_type_p (tree parent, tree child) { int i; tree binfo, base_binfo; + + /* APPLE LOCAL begin 6107012 */ + /* Don't walk the same tree twice. */ + if (parent_type_p_pset && pointer_set_insert (parent_type_p_pset, parent)) + return false; + /* APPLE LOCAL end 6107012 */ + if (TYPE_BINFO (parent)) for (binfo = TYPE_BINFO (parent), i = 0; BINFO_BASE_ITERATE (binfo, i, base_binfo); i++) @@ -643,8 +654,18 @@ if (to_type == from_type) return CT_USELESS; + /* APPLE LOCAL 6107012 */ + parent_type_p_pset = pointer_set_create (); if (parent_type_p (to_type, from_type)) return CT_UP; + /* APPLE LOCAL begin 6107012 */ + pointer_set_destroy (parent_type_p_pset); + parent_type_p_pset = pointer_set_create (); + /* APPLE LOCAL end 6107012 */ if (parent_type_p (from_type, to_type)) return CT_DOWN; + /* APPLE LOCAL begin 6107012 */ + pointer_set_destroy (parent_type_p_pset); + parent_type_p_pset = (struct pointer_set_t *)0; + /* APPLE LOCAL end 6107012 */ return CT_SIDEWAYS; } Modified: llvm-gcc-4.2/trunk/gcc/objc/objc-act.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/objc/objc-act.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/objc/objc-act.c (original) +++ llvm-gcc-4.2/trunk/gcc/objc/objc-act.c Mon Nov 3 01:33:15 2008 @@ -141,6 +141,12 @@ #endif /* APPLE LOCAL end radar 4531086 */ +/* APPLE LOCAL begin radar 6307941 */ +#ifndef OBJC2_ABI_DISPATCH +#define OBJC2_ABI_DISPATCH 0 +#endif +/* APPLE LOCAL end radar 6307941 */ + /* These need specifying. */ #ifndef OBJC_FORWARDING_STACK_OFFSET #define OBJC_FORWARDING_STACK_OFFSET 0 @@ -188,7 +194,8 @@ /* Code generation. */ static tree objc_build_constructor (tree, tree); -static tree build_objc_method_call (int, tree, tree, tree, tree); +/* APPLE LOCAL radar 6307941 */ +static tree build_objc_method_call (int, tree, tree, tree, tree, tree); static tree get_proto_encoding (tree); static tree lookup_interface (tree); static tree objc_add_static_instance (tree, tree); @@ -257,7 +264,8 @@ static void build_v2_class_template (void); static void build_v2_protocol_template (void); static void build_message_ref_template (void); -static tree build_v2_build_objc_method_call (int, tree, tree, tree, tree, bool); +/* APPLE LOCAL radar 6307941 */ +static tree build_v2_build_objc_method_call (int, tree, tree, tree, tree, tree, bool); /* APPLE LOCAL radar 4695109 */ static void build_v2_protocol_reference (tree); /* APPLE LOCAL radar 5153561 */ @@ -389,7 +397,8 @@ #endif static int comp_proto_with_proto (tree, tree, int); /* APPLE LOCAL begin 4209854 */ -static tree get_arg_type_list (tree, int, int); +/* APPLE LOCAL radar 6307941 */ +static tree get_arg_type_list (tree, tree, int, int); static tree objc_decay_parm_type (tree); /* APPLE LOCAL end 4209854 */ static void objc_push_parm (tree); @@ -753,16 +762,18 @@ if (flag_next_runtime) { /* APPLE LOCAL begin ARM hybrid objc-2.0 */ - bool use_hybrid_msgSend = (flag_objc_abi == 2 - && flag_objc_legacy_dispatch); + /* APPLE LOCAL radar 6307941 */ + /* code removed. */ TAG_GETCLASS = "objc_getClass"; TAG_GETMETACLASS = "objc_getMetaClass"; TAG_MSGSEND = "objc_msgSend"; - TAG_MSGSENDSUPER = use_hybrid_msgSend ? "objc_msgSendSuper2" - : "objc_msgSendSuper"; + /* APPLE LOCAL begin radar 6307941 */ + TAG_MSGSENDSUPER = flag_objc_abi==2 ? "objc_msgSendSuper2" + : "objc_msgSendSuper"; TAG_MSGSEND_STRET = "objc_msgSend_stret"; - TAG_MSGSENDSUPER_STRET = use_hybrid_msgSend ? "objc_msgSendSuper2_stret" - : "objc_msgSendSuper_stret"; + TAG_MSGSENDSUPER_STRET = flag_objc_abi==2 ? "objc_msgSendSuper2_stret" + : "objc_msgSendSuper_stret"; + /* APPLE LOCAL end radar 6307941 */ /* APPLE LOCAL end ARM hybrid objc-2.0 */ default_constant_string_class_name = "NSConstantString"; /* APPLE LOCAL begin radar 4810609 */ @@ -1070,6 +1081,7 @@ void objc_continue_implementation (void) + { objc_ivar_chain = continue_class (objc_implementation_context); @@ -1175,7 +1187,9 @@ managed_objc_object_pointer (tree type) { return type && type != error_mark_node && POINTER_TYPE_P (type) - && (objc_is_object_id (TREE_TYPE (type)) || TYPED_OBJECT (TREE_TYPE (type))); + && (objc_is_object_id (TREE_TYPE (type)) || TYPED_OBJECT (TREE_TYPE (type)) + /* APPLE LOCAL radar 6255671 */ + || TREE_CODE (type) == BLOCK_POINTER_TYPE); } /* APPLE LOCAL end radar 5168496 */ @@ -1314,9 +1328,17 @@ /* APPLE LOCAL begin radar 4855821 */ if (!flag_objc_gc) { + /* APPLE LOCAL begin radar 6255671 */ if (!property_assign) - warning (0, "'assign' attribute (default) not appropriate for non-gc object property %qs", - IDENTIFIER_POINTER (PROPERTY_NAME (property_decl))); + { + if (TREE_CODE (TREE_TYPE (property_decl)) == BLOCK_POINTER_TYPE) + error ("assign attribute (default) not appropriate for non-gc object property %qs", + IDENTIFIER_POINTER (PROPERTY_NAME (property_decl))); + else + warning (0, "assign attribute (default) not appropriate for non-gc object property %qs", + IDENTIFIER_POINTER (PROPERTY_NAME (property_decl))); + } + /* APPLE LOCAL end radar 6255671 */ } /* APPLE LOCAL end radar 4855821 */ else if (!property_assign) @@ -1916,7 +1938,8 @@ and in accordance with C99 rules we generate: type temp; (temp = rhs, [lhs Setter:temp], temp) */ /* APPLE LOCAL begin radar 5279122 */ - rhs = default_conversion (rhs); + /* APPLE LOCAL radar 6264448 */ + /* rhs = default_conversion (rhs); removed */ temp = objc_create_named_tmp_var (TREE_TYPE (rhs), "prop"); /* APPLE LOCAL end radar 5279122 */ bind = build3 (BIND_EXPR, void_type_node, temp, NULL, NULL); @@ -1925,6 +1948,12 @@ comma_exp = build_modify_expr (temp, NOP_EXPR, rhs); comma_exp = build_compound_expr (comma_exp, objc_setter_func_call (receiver, prop_ident, temp)); + /* APPLE LOCAL begin radar 6264448 */ + /* conversion of 'temp' moved *after* it is passed ar argument to build + setter call. This is because its type must match the setter's argument + type. */ + temp = default_conversion (temp); + /* APPLE LOCAL end radar 6264448 */ } else { @@ -2766,12 +2795,11 @@ /* struct objc_method_list *optional_instance_methods; */ if (!optional_instance_meth) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, - convert (objc_method_list_ptr, - build_int_cst (NULL_TREE, 0)), + convert (objc_method_list_ptr, integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_method_list_ptr, build_unary_op (ADDR_EXPR, @@ -2781,12 +2809,11 @@ /* struct objc_method_list *optional_class_methods; */ if (!optional_class_meth) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, - convert (objc_method_list_ptr, - build_int_cst (NULL_TREE, 0)), + convert (objc_method_list_ptr, integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_method_list_ptr, build_unary_op (ADDR_EXPR, @@ -2796,12 +2823,11 @@ /* struct objc_prop_list *instance_properties; */ if (!instance_prop) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, - convert (objc_prop_list_ptr, - build_int_cst (NULL_TREE, 0)), + convert (objc_prop_list_ptr, integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_prop_list_ptr, build_unary_op (ADDR_EXPR, @@ -2876,18 +2902,17 @@ initlist = build_tree_list (NULL_TREE, build_int_cst (NULL_TREE, size)); initlist = tree_cons (NULL_TREE, - (!weak_ivar_layout_tree ? build_int_cst (NULL_TREE, 0) + (!weak_ivar_layout_tree ? integer_zero_node : weak_ivar_layout_tree), initlist); /* struct _prop_list_t *properties; */ if (!property_list) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, - convert (objc_prop_list_ptr, - build_int_cst (NULL_TREE, 0)), + convert (objc_prop_list_ptr, integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_prop_list_ptr, @@ -3009,6 +3034,61 @@ : INSTANCE_METHOD_DECL); } + +/* APPLE LOCAL begin radar 6307941 */ +/* Non-legacy dispatch is a performance optimization only. + Using the "wrong" dispatch is not a correctness problem, + assuming non-legacy dispatch is supported at all. + + SnowLeopard: only the selectors below are optimized by the runtime. + Other selectors should use legacy dispatch to save memory. +*/ +static const char * const nonlegacy_dispatched_selectors[] = { + "allocWithZone:", + "alloc", + "class", + "self", + "isKindOfClass:", + "respondsToSelector:", + "isFlipped", + "length", + "objectForKey:", + "count", + "objectAtIndex:", + "isEqualToString:", + "isEqual:", + "retain", + "release", + "autorelease", + "hash", + "addObject:", + "countByEnumeratingWithState:objects:count:", +}; + +static int +objc_legacy_dispatched_selector_p (tree sel_name) +{ + gcc_assert (flag_objc_abi == 2); + gcc_assert (sel_name); + if (flag_objc_legacy_dispatch) + return true; + if (OBJC2_ABI_DISPATCH) + /* Do this for Snow Leopard ot later only. */ + return false; + else { + size_t i, count; + const char *sel_cname = IDENTIFIER_POINTER (sel_name); + count = sizeof(nonlegacy_dispatched_selectors) / sizeof(nonlegacy_dispatched_selectors[0]); + for (i = 0; i < count; i++) + { + if (!strcmp (sel_cname, nonlegacy_dispatched_selectors[i])) + return false; + } + } + return true; +} +/* APPLE LOCAL end radar 6307941 */ + tree objc_build_method_signature (tree rettype, tree selector, tree optparms, bool ellipsis) @@ -3212,7 +3292,7 @@ /* APPLE LOCAL begin radar 5676962 */ tree t; int cv = 0; - /* LLVM LOCAL */ + /* APPLE LOCAL radar 6285794 */ struct lang_type ** pTypeLang = 0; /* APPLE LOCAL end radar 5676962 */ @@ -3615,7 +3695,8 @@ APPLE LOCAL end 4175534 */ bool -objc_compare_types (tree ltyp, tree rtyp, int argno, tree callee) +/* APPLE LOCAL radar 6231433 */ +objc_compare_types (tree ltyp, tree rtyp, int argno, tree callee, const char *message) { tree lcls, rcls, lproto, rproto; bool pointers_compatible; @@ -3647,7 +3728,8 @@ /* Return types must be covariant. */ if (!comptypes (TREE_TYPE (ltyp), TREE_TYPE (rtyp)) && !objc_compare_types (TREE_TYPE (ltyp), TREE_TYPE (rtyp), - argno, callee)) + /* APPLE LOCAL radar 6231433 */ + argno, callee, message)) return false; /* Argument types must be contravariant. */ @@ -3656,7 +3738,8 @@ { if (!comptypes (TREE_VALUE (rtyp), TREE_VALUE (ltyp)) && !objc_compare_types (TREE_VALUE (rtyp), TREE_VALUE (ltyp), - argno, callee)) + /* APPLE LOCAL radar 6231433 */ + argno, callee, message)) return false; } @@ -3791,8 +3874,10 @@ /* APPLE LOCAL end 4175534 */ /* APPLE LOCAL begin radar 5839123 */ case -3: - warning (0, "comparison of distinct Objective-C types %qT and %qT lacks a cast", - orig_rtyp, orig_ltyp); + /* APPLE LOCAL begin radar 6231433 */ + warning (0, "%s of distinct Objective-C types %qT and %qT lacks a cast", + message, orig_rtyp, orig_ltyp); + /* APPLE LOCAL end radar 6231433 */ break; case -2: @@ -3823,16 +3908,16 @@ return true; } -/* APPLE LOCAL begin radar 4229905 */ +/* APPLE LOCAL begin radar 4229905 - radar 6131433 */ /* This routine is similar to objc_compare_types except that function-pointers are excluded. This is because, caller assumes that common types are of (id, Object*) variety and calls objc_common_type to obtain a common type. There is no commonolty between two function-pointers in this regard. */ bool -objc_have_common_type (tree ltyp, tree rtyp, int argno, tree callee) +objc_have_common_type (tree ltyp, tree rtyp, int argno, tree callee, const char *message) { - if (objc_compare_types (ltyp, rtyp, argno, callee)) + if (objc_compare_types (ltyp, rtyp, argno, callee, message)) { /* exclude function-pointer types. */ do @@ -3845,7 +3930,7 @@ } return false; } -/* APPLE LOCAL end radar 4229905 */ +/* APPLE LOCAL end radar 4229905 - radar 6131433 */ /* Check if LTYP and RTYP have the same type qualifiers. If either type lives in the volatilized hash table, ignore the 'volatile' bit when @@ -4032,8 +4117,17 @@ : xref_tag (RECORD_TYPE, type)); } /* APPLE LOCAL end 4216500 */ - else + /* APPLE LOCAL begin radar 6267049 */ + else { + /* This can only happen because of bogus code. Note that in this + path, protocols is not even considered. */ + error ("qualified type is not a valid object"); + /* Check further to see if protocol is valid. */ + if (protocols) + (void) lookup_and_install_protocols (protocols, false); return interface; + } + /* APPLE LOCAL end radar 6267049 */ } if (protocols) @@ -4210,6 +4304,10 @@ #ifdef OBJCPLUS DECL_THIS_STATIC (var) = 1; /* squash redeclaration errors */ #endif + /* APPLE LOCAL begin 6255801 */ + /* Keep word alignment for metadata records. */ + DECL_USER_ALIGN (var) = 1; + /* APPLE LOCAL end 6255801 */ } /* APPLE LOCAL end radar 4431864 */ @@ -5018,7 +5116,8 @@ = build_tree_list (fields, flag_next_runtime ? build_unary_op (ADDR_EXPR, string_class_decl, 0) - : build_int_cst (NULL_TREE, 0)); + /* APPLE LOCAL radar 6285794 */ + : integer_zero_node); fields = TREE_CHAIN (fields); initlist = tree_cons (fields, build_unary_op (ADDR_EXPR, string, 1), initlist); @@ -5206,7 +5305,8 @@ if (static_instances_decl) expr = build_unary_op (ADDR_EXPR, static_instances_decl, 0); else - expr = build_int_cst (NULL_TREE, 0); + /* APPLE LOCAL radar 6285794 */ + expr = integer_zero_node; initlist = tree_cons (NULL_TREE, expr, initlist); } @@ -5229,12 +5329,12 @@ /* refs = { ..., _OBJC_SELECTOR_TABLE, ... } */ if (flag_next_runtime || ! sel_ref_chain) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (build_pointer_type (objc_selector_type), - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else initlist = tree_cons (NULL_TREE, @@ -5381,7 +5481,8 @@ if (UOBJC_SYMBOLS_decl) expr = build_unary_op (ADDR_EXPR, UOBJC_SYMBOLS_decl, 0); else - expr = build_int_cst (NULL_TREE, 0); + /* APPLE LOCAL radar 6285794 */ + expr = integer_zero_node; initlist = tree_cons (NULL_TREE, expr, initlist); return objc_build_constructor (type, nreverse (initlist)); @@ -5576,7 +5677,8 @@ } /* Output {..., NULL}. */ - initlist = tree_cons (NULL_TREE, build_int_cst (NULL_TREE, 0), initlist); + /* APPLE LOCAL radar 6285794 */ + initlist = tree_cons (NULL_TREE, integer_zero_node, initlist); expr = objc_build_constructor (TREE_TYPE (decl), nreverse (initlist)); finish_var_decl (decl, expr); @@ -5584,7 +5686,8 @@ = tree_cons (NULL_TREE, build_unary_op (ADDR_EXPR, decl, 1), decls); } - decls = tree_cons (NULL_TREE, build_int_cst (NULL_TREE, 0), decls); + /* APPLE LOCAL radar 6285794 */ + decls = tree_cons (NULL_TREE, integer_zero_node, decls); expr = objc_build_constructor (type, nreverse (decls)); static_instances_decl = start_var_decl (type, "_OBJC_STATIC_INSTANCES"); finish_var_decl (static_instances_decl, expr); @@ -5881,11 +5984,14 @@ ? objc_build_constructor (objc_selector_template, tree_cons (NULL_TREE, - build_int_cst (NULL_TREE, 0), + /* APPLE LOCAL radar 6285794 */ + integer_zero_node, tree_cons (NULL_TREE, - build_int_cst (NULL_TREE, 0), + /* APPLE LOCAL radar 6285794 */ + integer_zero_node, NULL_TREE))) - : build_int_cst (NULL_TREE, 0), initlist); + /* APPLE LOCAL radar 6285794 */ + : integer_zero_node, initlist); initlist = objc_build_constructor (TREE_TYPE (UOBJC_SELECTOR_TABLE_decl), nreverse (initlist)); finish_var_decl (UOBJC_SELECTOR_TABLE_decl, initlist); @@ -5909,7 +6015,8 @@ return add_objc_string (encoding, meth_var_types); } else - return build_int_cst (NULL_TREE, 0); + /* APPLE LOCAL radar 6285794 */ + return integer_zero_node; } /* sel_ref_chain is a list whose "value" fields will be instances of @@ -9655,17 +9762,16 @@ /* static struct objc_protocol _OBJC_PROTOCOL_; */ protocol_name_expr = add_objc_string (PROTOCOL_NAME (p), class_names); - /* LLVM LOCAL - begin NUL pointer */ if (refs_decl) refs_expr = convert (build_pointer_type (build_pointer_type (objc_protocol_template)), build_unary_op (ADDR_EXPR, refs_decl, 0)); else + /* APPLE LOCAL begin radar 6285794 */ refs_expr = convert (build_pointer_type (build_pointer_type (objc_protocol_template)), - build_int_cst (NULL_TREE, 0)); - /* LLVM LOCAL - end NUL pointer */ - + integer_zero_node); + /* APPLE LOCAL end radar 6285794 */ /* APPLE LOCAL begin radar 4585769 - Objective-C 1.0 extensions */ save_objc_implementation_context = objc_implementation_context; objc_implementation_context = p; @@ -9739,11 +9845,12 @@ /* APPLE LOCAL begin ObjC new abi */ /* APPLE LOCAL begin radar 4533974 - ObjC new protocol */ /* APPLE LOCAL begin radar 4533974 - ObjC newprotocol - radar 4695109 */ - /* LLVM LOCAL - begin NUL pointer */ if (newabi) { /* 'isa' is NULL in the new ObjC abi */ - expr = convert (objc_object_type, build_int_cst (NULL_TREE, 0)); + /* APPLE LOCAL begin radar 6285794 */ + expr = convert (objc_object_type, integer_zero_node); + /* APPLE LOCAL end radar 6285794 */ } /* APPLE LOCAL end radar 4533974 - ObjC newprotocol - radar 4695109 */ /* APPLE LOCAL begin radar 4585769 - Objective-C 1.0 extensions */ @@ -9751,19 +9858,20 @@ else { if (!objc_protocol_or_opt_ins_meth) + /* APPLE LOCAL begin radar 6285794 */ { if (!objc_protocol_extension_template) build_objc_protocol_extension_template (); expr = convert (build_pointer_type (objc_protocol_extension_template), - build_int_cst (NULL_TREE, 0)); + integer_zero_node); } + /* APPLE LOCAL end radar 6285794 */ else expr = convert (build_pointer_type (objc_protocol_extension_template), build_unary_op (ADDR_EXPR, objc_protocol_or_opt_ins_meth, 0)); } - /* LLVM LOCAL - end NUL pointer */ /* APPLE LOCAL end radar 4585769 - Objective-C 1.0 extensions */ initlist = tree_cons (NULL_TREE, expr, initlist); @@ -9773,12 +9881,12 @@ initlist = tree_cons (NULL_TREE, protocol_list, initlist); if (!instance_methods) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (objc_method_proto_list_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_method_proto_list_ptr, @@ -9787,12 +9895,12 @@ } if (!class_methods) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (objc_method_proto_list_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_method_proto_list_ptr, @@ -9805,12 +9913,12 @@ { /* APPLE LOCAL begin radar 4695109 */ if (!objc_protocol_or_opt_ins_meth) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (objc_method_proto_list_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_method_proto_list_ptr, @@ -9818,12 +9926,12 @@ initlist = tree_cons (NULL_TREE, expr, initlist); } if (!opt_cls_meth) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (objc_method_proto_list_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_method_proto_list_ptr, @@ -9832,12 +9940,12 @@ } /* APPLE LOCAL end radar 4695109 */ if (!property_list) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (objc_prop_list_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_prop_list_ptr, @@ -9851,7 +9959,7 @@ TREE_INT_CST_LOW (TYPE_SIZE_UNIT (objc_v2_protocol_template))); initlist = tree_cons (NULL_TREE, expr, initlist); /* const uint32_t flags; = 0 */ - initlist = tree_cons (NULL_TREE, build_int_cst (NULL_TREE, 0), initlist); + initlist = tree_cons (NULL_TREE, integer_zero_node, initlist); /* APPLE LOCAL end radar 5192466 */ } /* APPLE LOCAL end C* property metadata (Radar 4498373) */ @@ -10925,12 +11033,12 @@ ivar); else /* Unnamed bit-field ivar (yuck). */ - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ ivar = tree_cons (NULL_TREE, convert (string_type_node, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), ivar); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ /* Set type. */ encode_field_decl (field_decl, @@ -11498,12 +11606,12 @@ meth_var_types), eltlist); - /* LLVM LOCAL begin */ + /* APPLE LOCAL begin radar 6285794 */ eltlist = tree_cons (NULL_TREE, convert (objc_method_list_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), eltlist); - /* LLVM LOCAL end */ + /* APPLE LOCAL end radar 6285794 */ initlist = tree_cons (NULL_TREE, objc_build_constructor (type, nreverse (eltlist)), @@ -11621,7 +11729,8 @@ size++; /* Build initializer. */ - initlist = tree_cons (NULL_TREE, build_int_cst (NULL_TREE, 0), NULL_TREE); + /* APPLE LOCAL radar 6285794 */ + initlist = tree_cons (NULL_TREE, integer_zero_node, NULL_TREE); e = build_int_cst (build_pointer_type (objc_protocol_template), size); initlist = tree_cons (NULL_TREE, e, initlist); @@ -11674,12 +11783,12 @@ initlist = tree_cons (NULL_TREE, class_name, initlist); if (!instance_methods) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (objc_method_list_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_method_list_ptr, @@ -11687,12 +11796,12 @@ initlist = tree_cons (NULL_TREE, expr, initlist); } if (!class_methods) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (objc_method_list_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_method_list_ptr, @@ -11701,7 +11810,7 @@ } /* protocol_list = */ - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ { tree protocol_list_ptr = (abi_v2) ? build_pointer_type (objc_v2_protocol_template) @@ -11710,7 +11819,7 @@ if (!protocol_list) initlist = tree_cons (NULL_TREE, convert (protocol_list_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); else { @@ -11720,7 +11829,7 @@ initlist = tree_cons (NULL_TREE, expr, initlist); } } - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ /* APPLE LOCAL begin radar 4585769 - Objective-C 1.0 extensions */ if (!abi_v2) { @@ -11732,12 +11841,12 @@ /* APPLE LOCAL begin C* property metadata (Radar 4498373) */ /* struct _objc_property_list *instance_properties; */ if (!property_list) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (objc_prop_list_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_prop_list_ptr, @@ -11804,12 +11913,12 @@ /* objc_ivar_list = */ if (!ivar_list) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (objc_ivar_list_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_ivar_list_ptr, @@ -11819,12 +11928,12 @@ /* objc_method_list = */ if (!dispatch_table) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (objc_method_list_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_method_list_ptr, @@ -11832,7 +11941,7 @@ initlist = tree_cons (NULL_TREE, expr, initlist); } - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ if (flag_next_runtime) /* method_cache = */ initlist = tree_cons (NULL_TREE, @@ -11840,20 +11949,20 @@ (xref_tag (RECORD_TYPE, get_identifier ("objc_cache"))), - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); else { tree null_objc_class_ptr = convert (build_pointer_type (objc_class_template), - build_int_cst (NULL_TREE, 0)); + integer_zero_node); /* dtable = */ initlist = tree_cons (NULL_TREE, convert (build_pointer_type (xref_tag (RECORD_TYPE, get_identifier ("sarray"))), - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); /* subclass_list = */ @@ -11862,10 +11971,10 @@ /* sibling_class = */ initlist = tree_cons (NULL_TREE, null_objc_class_ptr, initlist); } - /* LLVM LOCAL - end NUL pointer */ - + /* APPLE LOCAL end radar 6285794 */ + /* protocol_list = */ - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ { tree objc_protocol_ptr_ptr = build_pointer_type (build_pointer_type (objc_protocol_template)); @@ -11873,7 +11982,7 @@ if (!protocol_list) initlist = tree_cons (NULL_TREE, convert (objc_protocol_ptr_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); else { @@ -11882,34 +11991,34 @@ initlist = tree_cons (NULL_TREE, expr, initlist); } } - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ /* APPLE LOCAL begin radar 4585769 - Objective-C 1.0 extensions */ if (flag_next_runtime) { /* const char *ivar_layout; */ if (IS_CLS_META (status)) /* Meta Class ? */ - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (string_type_node, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { tree ivar_layout = objc_build_ivar_layout (true); if (!ivar_layout) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (string_type_node, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else initlist = tree_cons (NULL_TREE, ivar_layout, initlist); } /* struct _objc_class_ext *ext; */ - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ if (!objc_class_ext_template) build_objc_class_ext_template (); @@ -11920,7 +12029,7 @@ if (!objc_class_ext) initlist = tree_cons (NULL_TREE, convert (objc_class_ext_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); else { @@ -11929,11 +12038,11 @@ initlist = tree_cons (NULL_TREE, expr, initlist); } } - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ } else /* gc_object_type = NULL */ - /* LLVM LOCAL - NUL pointer */ + /* APPLE LOCAL radar 6285794 - NUL pointer */ initlist = tree_cons (NULL_TREE, null_pointer_node, initlist); /* APPLE LOCAL end radar 4585769 - Objective-C 1.0 extensions */ @@ -12098,19 +12207,19 @@ if (cache) initlist = tree_cons (NULL_TREE, cache, initlist); else - /* LLVM LOCAL - NUL pointer */ + /* APPLE LOCAL radar 6285794 - NUL pointer */ initlist = tree_cons (NULL_TREE, null_pointer_node, initlist); /* vtable */ if (vtable) initlist = tree_cons (NULL_TREE, vtable, initlist); else - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (build_pointer_type (objc_imp_type), - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ /* ro */ initlist = tree_cons (NULL_TREE, ro, initlist); @@ -12154,12 +12263,12 @@ /* APPLE LOCAL begin radar 4695101 */ /* ivarLayout */ if (!ivarLayout) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (string_type_node, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else initlist = tree_cons (NULL_TREE, ivarLayout, initlist); /* APPLE LOCAL end radar 4695101 */ @@ -12169,12 +12278,12 @@ /* baseMethods */ if (!baseMethods) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (objc_method_list_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_method_list_ptr, @@ -12183,7 +12292,7 @@ } /* baseProtocols */ - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ { tree protocol_list_t_p = build_pointer_type (xref_tag (RECORD_TYPE, @@ -12192,7 +12301,7 @@ if (!baseProtocols) initlist = tree_cons (NULL_TREE, convert (protocol_list_t_p, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); else { @@ -12201,16 +12310,16 @@ initlist = tree_cons (NULL_TREE, expr, initlist); } } - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ /* ivars */ if (!ivars) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (objc_v2_ivar_list_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_v2_ivar_list_ptr, @@ -12221,12 +12330,12 @@ /* APPLE LOCAL begin radar 4695101 */ /* weakIvarLayout */ if (!weakIvarLayout) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (string_type_node, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else initlist = tree_cons (NULL_TREE, weakIvarLayout, initlist); /* APPLE LOCAL end radar 4695101 */ @@ -12234,12 +12343,12 @@ /* APPLE LOCAL begin C* property metadata (Radar 4498373) */ /* property list */ if (!property_list) - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ initlist = tree_cons (NULL_TREE, convert (objc_prop_list_ptr, - build_int_cst (NULL_TREE, 0)), + integer_zero_node), initlist); - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ else { expr = convert (objc_prop_list_ptr, @@ -12315,17 +12424,36 @@ /* APPLE LOCAL begin radar 4695109 */ /* APPLE LOCAL begin - LLVM radar 5476262 */ #ifdef ENABLE_LLVM - /* LLVM LOCAL - add 'L' prefix */ - sprintf (string, "L_OBJC_PROTOCOL_$_%s", - IDENTIFIER_POINTER (PROTOCOL_NAME (expr))); + if (flag_objc_abi == 2) + /* LLVM LOCAL - add 'l' prefix */ + sprintf (string, "l_OBJC_PROTOCOL_$_%s", + IDENTIFIER_POINTER (PROTOCOL_NAME (expr))); + else + /* LLVM LOCAL - add 'L' prefix */ + sprintf (string, "L_OBJC_PROTOCOL_$_%s", + IDENTIFIER_POINTER (PROTOCOL_NAME (expr))); + expr = lookup_name (get_identifier(string)); + if (expr == NULL_TREE) - /* LLVM LOCAL - &string[1] because of 'L' prefix */ + /* LLVM LOCAL - &string[1] because of '[Ll]' prefix */ expr = start_var_decl (objc_v2_protocol_template, &string[1]); #else - sprintf (string, "_OBJC_PROTOCOL_$_%s", - IDENTIFIER_POINTER (PROTOCOL_NAME (expr))); - expr = start_var_decl (objc_v2_protocol_template, string); + /* APPLE LOCAL begin radar 6255913 */ + if (flag_objc_abi == 2) + { + sprintf (string, "l_OBJC_PROTOCOL_$_%s", + IDENTIFIER_POINTER (PROTOCOL_NAME (expr))); + expr = start_var_decl (objc_v2_protocol_template, string); + set_user_assembler_name (expr, string); + } + /* APPLE LOCAL end radar 6255913 */ + else + { + sprintf (string, "_OBJC_PROTOCOL_$_%s", + IDENTIFIER_POINTER (PROTOCOL_NAME (expr))); + expr = start_var_decl (objc_v2_protocol_template, string); + } #endif /* APPLE LOCAL end - LLVM radar 5476262 */ /* APPLE LOCAL end radar 4695109 */ @@ -12524,10 +12652,10 @@ /* root class. */ root_expr = build_unary_op (ADDR_EXPR, metaclass_decl, 0); metaclass_superclass_expr = build_unary_op (ADDR_EXPR, class_decl, 0); - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ class_superclass_expr = convert (build_pointer_type (objc_v2_class_template), - build_int_cst (NULL_TREE, 0)); - /* LLVM LOCAL - end NUL pointer */ + integer_zero_node); + /* APPLE LOCAL end radar 6285794 */ flags |= 0x2; /* CLS_ROOT: it is also a root meta class */ } @@ -12735,13 +12863,13 @@ super_expr = build_c_cast (cast_type, super_expr); /* cast! */ } else - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ { super_expr = convert (string_type_node, - build_int_cst (NULL_TREE, 0)); + integer_zero_node); super_expr = build_c_cast (cast_type, super_expr); /* cast! */ } - /* LLVM LOCAL - end NUL pointer */ + /* APPLE LOCAL end radar 6285794 */ root_expr = add_objc_string (my_root_id, class_names); root_expr = build_c_cast (cast_type, root_expr); /* cast! */ @@ -13051,7 +13179,9 @@ /* hackery to make an obj method look like a function type. */ tree rettype = TREE_TYPE (*node); TREE_TYPE (*node) = build_function_type (TREE_VALUE (rettype), - get_arg_type_list (*node, METHOD_REF, 0)); + /* APPLE LOCAL radar 6307941 */ + get_arg_type_list (METHOD_SEL_NAME (*node), + *node, METHOD_REF, 0)); decl_attributes (node, attributes, flags); METHOD_TYPE_ATTRIBUTES (*node) = TYPE_ATTRIBUTES (TREE_TYPE (*node)); TREE_TYPE (*node) = rettype; @@ -13070,7 +13200,8 @@ arguments (i.e., beyond self and _cmd) shall be represented by `...'. */ static tree -get_arg_type_list (tree meth, int context, int superflag) +/* APPLE LOCAL radar 6307941 */ +get_arg_type_list (tree sel_name, tree meth, int context, int superflag) { tree arglist, akey; @@ -13085,8 +13216,8 @@ /* Selector type - will eventually change to `int'. */ /* APPLE LOCAL begin ObjC new abi */ chainon (arglist, build_tree_list (NULL_TREE, flag_objc_abi == 2 - /* APPLE LOCAL ARM hybrid objc-2.0 */ - && !flag_objc_legacy_dispatch + /* APPLE LOCAL ARM hybrid objc-2.0 - radar 6307941 */ + && !objc_legacy_dispatched_selector_p (sel_name) ? (superflag ? objc_v2_super_selector_type : objc_v2_selector_type) @@ -13654,8 +13785,8 @@ /* APPLE LOCAL ObjC new abi */ /* Code moved down */ /* APPLE LOCAL begin ObjC new abi */ - /* APPLE LOCAL ARM hybrid objc-2.0 */ - if (flag_objc_abi == 2 && !flag_objc_legacy_dispatch) + /* APPLE LOCAL ARM hybrid objc-2.0 - radar 6307941 */ + if (flag_objc_abi == 2 && !objc_legacy_dispatched_selector_p (sel_name)) { tree ret_type; tree message_func_decl; @@ -13725,9 +13856,10 @@ /* (*_msg.messenger) (receiver, &_msg, ...); */ retval = build_v2_build_objc_method_call (super, method_prototype, - receiver, selector, - method_params, - check_for_nil); + /* APPLE LOCAL radar 6307941 */ + receiver, sel_name, selector, + method_params, + check_for_nil); } else { @@ -13741,7 +13873,8 @@ /* APPLE LOCAL end radar 4359757 */ retval = build_objc_method_call (super, method_prototype, - receiver, + /* APPLE LOCAL radar 6307941 */ + receiver, sel_name, selector, method_params); } /* APPLE LOCAL end ObjC new abi */ @@ -13760,7 +13893,8 @@ static tree build_objc_method_call (int super_flag, tree method_prototype, - tree lookup_object, tree selector, + /* APPLE LOCAL radar 6307941 */ + tree lookup_object, tree sel_name, tree selector, tree method_params) { tree sender = (super_flag ? umsg_super_decl : @@ -13779,7 +13913,9 @@ ? TREE_VALUE (TREE_TYPE (method_prototype)) : objc_object_type); /* APPLE LOCAL begin radar 3803157 - objc attribute */ - tree method_param_types = get_arg_type_list (method_prototype, METHOD_REF, super_flag); + /* APPLE LOCAL radar 6307941 */ + tree method_param_types = get_arg_type_list (sel_name, method_prototype, + METHOD_REF, super_flag); tree ftype = build_function_type (ret_type, method_param_types); tree sender_cast; tree method, t; @@ -13856,9 +13992,9 @@ static tree build_v2_build_objc_method_call (int super_flag, tree method_prototype, - tree lookup_object, tree selector, - tree method_params, - bool check_for_nil) + tree lookup_object, tree sel_name, + tree selector, tree method_params, + bool check_for_nil) { tree ret_val; tree sender, rcv_p, t; @@ -13866,7 +14002,8 @@ = (method_prototype ? TREE_VALUE (TREE_TYPE (method_prototype)) : objc_object_type); - tree method_param_types = get_arg_type_list (method_prototype, + /* APPLE LOCAL radar 6307941 */ + tree method_param_types = get_arg_type_list (sel_name, method_prototype, METHOD_REF, super_flag); /* APPLE LOCAL begin radar 3803157 - objc attribute */ tree ftype = build_function_type (ret_type, method_param_types); @@ -13936,8 +14073,12 @@ /* static struct protocol_t _OBJC_PROTOCOL_$; */ - proto_name = synth_id_with_class_suffix ("_OBJC_PROTOCOL_$", p); - decl = start_var_decl (objc_v2_protocol_template, proto_name); + /* APPLE LOCAL begin radar 6255913 */ + proto_name = synth_id_with_class_suffix ("l_OBJC_PROTOCOL_$", p); + decl = create_hidden_decl (objc_v2_protocol_template, proto_name); + DECL_WEAK (decl) = 1; + set_user_assembler_name (decl, proto_name); + /* APPLE LOCAL end radar 6255913 */ PROTOCOL_V2_FORWARD_DECL (p) = decl; /* APPLE LOCAL begin - LLVM radar 5476262 */ #ifdef ENABLE_LLVM @@ -14039,11 +14180,11 @@ refs_expr = convert (build_pointer_type (objc_v2_protocol_template), build_unary_op (ADDR_EXPR, refs_decl, 0)); else - /* LLVM LOCAL - begin NUL pointer */ + /* APPLE LOCAL begin radar 6285794 */ refs_expr = convert (build_pointer_type (objc_v2_protocol_template), - build_int_cst (NULL_TREE, 0)); - /* LLVM LOCAL - end NUL pointer */ + integer_zero_node); + /* APPLE LOCAL end radar 6285794 */ /* APPLE LOCAL begin radar 4695101 */ /* Build table of list of properties for this protocol. */ @@ -15804,7 +15945,8 @@ PROPERTY_READONLY (cl_prop) == boolean_true_node && PROPERTY_READONLY (property) == boolean_true_node && objc_compare_types (TREE_TYPE (cl_prop), TREE_TYPE (property), - -6, NULL_TREE)) + /* APPLE LOCAL radar 6231433 */ + -6, NULL_TREE, NULL)) ; else warning (0, "property %qs type does not match %s %qs property type", @@ -16724,6 +16866,27 @@ } /* APPLE LOCAL end radar 4968128 */ +/* APPLE LOCAL begin radar 6017984 */ +/* This routine merges all methods declared in the protocol-list + into the current class. */ +static void +objc_merge_protocol_methods (tree class, tree rproto_list) +{ + tree rproto; + for (rproto = rproto_list; rproto; rproto = TREE_CHAIN (rproto)) + { + tree p = TREE_VALUE (rproto); + if (TREE_CODE (p) == PROTOCOL_INTERFACE_TYPE) + { + objc_merge_methods (class, PROTOCOL_CLS_METHODS (p), '+'); + objc_merge_methods (class, PROTOCOL_NST_METHODS (p), '-'); + /* Search in nested protocols also. */ + objc_merge_proto_properties_in_class (class, PROTOCOL_LIST (p)); + } + } +} +/* APPLE LOCAL end radar 6017984 */ + /* This is called once we see the "@end" in an interface/implementation. */ static void @@ -17014,6 +17177,12 @@ { objc_merge_methods (primary, CLASS_NST_METHODS (class), '-'); objc_merge_methods (primary, CLASS_CLS_METHODS (class), '+'); + /* APPLE LOCAL begin radar 6017984 */ + /* Just as we are adding anonymous category's methods to the + primary class, must also add methods in anonymous category's protocols + to the class as well, */ + objc_merge_protocol_methods (primary, CLASS_PROTOCOL_LIST (class)); + /* APPLE LOCAL end radar 6017984 */ } } /* APPLE LOCAL end radar 4965989 */ @@ -17925,13 +18094,16 @@ return 0; if (!objc_types_share_size_and_alignment (type1, type2)) return 0; - if (strict == 1 && !objc_compare_types(type1, type2, -2, 0)) + /* APPLE LOCAL radar 6231433 */ + if (strict == 1 && !objc_compare_types(type1, type2, -2, 0, NULL)) return 0; } /* Compare argument types. */ - for (type1 = get_arg_type_list (proto1, METHOD_REF, 0), - type2 = get_arg_type_list (proto2, METHOD_REF, 0); + /* APPLE LOCAL begin radar 6307941 */ + for (type1 = get_arg_type_list (METHOD_SEL_NAME (proto1), proto1, METHOD_REF, 0), + type2 = get_arg_type_list (METHOD_SEL_NAME (proto2), proto2, METHOD_REF, 0); + /* APPLE LOCAL end radar 6307941 */ type1 && type2; type1 = TREE_CHAIN (type1), type2 = TREE_CHAIN (type2)) { @@ -17941,7 +18113,8 @@ if (!objc_types_share_size_and_alignment (TREE_VALUE (type1), TREE_VALUE (type2))) return 0; /* Note, order of type2 and type1 in argument call is intentional. */ - if (strict == 1 && !objc_compare_types(TREE_VALUE (type2), TREE_VALUE (type1), -2, 0)) + /* APPLE LOCAL radar 6231433 */ + if (strict == 1 && !objc_compare_types(TREE_VALUE (type2), TREE_VALUE (type1), -2, 0, NULL)) return 0; } } @@ -18119,7 +18292,8 @@ meth_type = build_function_type (ret_type, - get_arg_type_list (method, METHOD_DEF, 0)); + /* APPLE LOCAL radar 6307941 */ + get_arg_type_list (METHOD_SEL_NAME (method), method, METHOD_DEF, 0)); /* APPLE LOCAL radar 5839812 - location for synthesized methods */ objc_start_function (method_id, meth_type, NULL_TREE, parmlist, method); @@ -19131,7 +19305,7 @@ build_index_type (build_int_cst (NULL_TREE, 2 - 1)))); /* LLVM LOCAL */ #endif - initlist = build_tree_list (NULL_TREE, build_int_cst (NULL_TREE, 0)); + initlist = build_tree_list (NULL_TREE, integer_zero_node); initlist = tree_cons (NULL_TREE, build_int_cst (NULL_TREE, flags), initlist); initlist = objc_build_constructor (TREE_TYPE (decl), nreverse (initlist)); TREE_TYPE (initlist) = TREE_TYPE (decl); @@ -19431,11 +19605,11 @@ constructor_fields = TYPE_FIELDS (fast_enum_state_type); /* __objcFastEnumerationState enumState = { 0 }; */ *enumState_decl = objc_create_named_tmp_var (fast_enum_state_type, "cstar"); - /* LLVM LOCAL begin */ + /* APPLE LOCAL begin radar 6285794 */ initlist = build_tree_list (constructor_fields, convert (TREE_TYPE(constructor_fields), - build_int_cst (NULL_TREE, 0))); - /* LLVM LOCAL end */ + integer_zero_node)); + /* APPLE LOCAL end radar 6285794 */ init = objc_build_constructor (fast_enum_state_type, initlist); DECL_INITIAL (*enumState_decl) = init; @@ -20006,7 +20180,8 @@ #endif comparison_result = comptypes (ivar_type, property_type) != 1; if (comparison_result - && !objc_compare_types (property_type, ivar_type, -5, NULL_TREE)) + /* APPLE LOCAL radar 6231433 */ + && !objc_compare_types (property_type, ivar_type, -5, NULL_TREE, NULL)) /* APPLE LOCAL end radar 6029624 */ /* APPLE LOCAL end radar 5389292 */ { Modified: llvm-gcc-4.2/trunk/gcc/stub-objc.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/stub-objc.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/stub-objc.c (original) +++ llvm-gcc-4.2/trunk/gcc/stub-objc.c Mon Nov 3 01:33:15 2008 @@ -102,19 +102,23 @@ bool objc_compare_types (tree ARG_UNUSED (ltyp), tree ARG_UNUSED (rtyp), - int ARG_UNUSED (argno), tree ARG_UNUSED (callee)) + /* APPLE LOCAL begin radar 6231433 */ + int ARG_UNUSED (argno), tree ARG_UNUSED (callee), + const char * ARG_UNUSED (message)) + /* APPLE LOCAL end radar 6231433 */ { return false; } -/* APPLE LOCAL begin radar 4229905 */ +/* APPLE LOCAL begin radar 4229905 - radar 6231433 */ bool objc_have_common_type (tree ARG_UNUSED (ltyp), tree ARG_UNUSED (rtyp), - int ARG_UNUSED (argno), tree ARG_UNUSED (callee)) + int ARG_UNUSED (argno), tree ARG_UNUSED (callee), + const char * ARG_UNUSED (message)) { return false; } -/* APPLE LOCAL end radar 4229905 */ +/* APPLE LOCAL end radar 4229905 - radar 6231433 */ void objc_volatilize_decl (tree ARG_UNUSED (decl)) @@ -592,7 +596,12 @@ } bool block_requires_copying (tree exp) { - return TREE_CODE (TREE_TYPE (exp)) == BLOCK_POINTER_TYPE; + /* APPLE LOCAL begin radar 6175959 */ + tree type = TREE_TYPE (exp); + return TREE_CODE (type) == BLOCK_POINTER_TYPE + || (POINTER_TYPE_P (type) + && lookup_attribute ("NSObject", TYPE_ATTRIBUTES (type))); + /* APPLE LOCAL end radar 6175959 */ } /* APPLE LOCAL end radar 5782740 - blocks */ Modified: llvm-gcc-4.2/trunk/gcc/tree-inline.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/tree-inline.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/tree-inline.c (original) +++ llvm-gcc-4.2/trunk/gcc/tree-inline.c Mon Nov 3 01:33:15 2008 @@ -1278,14 +1278,15 @@ var = modify_dest; use = NULL; - /* LLVM LOCAL begin */ + /* LLVM LOCAL begin */ #ifdef ENABLE_LLVM - /* The return node may not dominate all of its uses. Because of this, - conservatively don't consider it for SSA form anymore. */ - if (TREE_CODE (var) == VAR_DECL) - DECL_GIMPLE_FORMAL_TEMP_P (var) = 0; + /* The return node may not dominate all of its uses. Because of this, + conservatively don't consider it for SSA form anymore. */ + if (TREE_CODE (var) == VAR_DECL) + DECL_GIMPLE_FORMAL_TEMP_P (var) = 0; #endif /* LLVM LOCAL end */ + goto done; } } Modified: llvm-gcc-4.2/trunk/gcc/tree.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/tree.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/tree.c (original) +++ llvm-gcc-4.2/trunk/gcc/tree.c Mon Nov 3 01:33:15 2008 @@ -5108,6 +5108,11 @@ { tree t; + /* APPLE LOCAL begin radar 6300081 */ + if (!generic_block_literal_struct_type) + generic_block_literal_struct_type = build_generic_block_struct_type (); + /* APPLE LOCAL end radar 6300081 */ + t = make_node (BLOCK_POINTER_TYPE); TREE_TYPE (t) = to_type; Modified: llvm-gcc-4.2/trunk/gcc/tree.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/tree.h?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/tree.h (original) +++ llvm-gcc-4.2/trunk/gcc/tree.h Mon Nov 3 01:33:15 2008 @@ -4850,7 +4850,10 @@ extern void note_alternative_entry_points (void); /* APPLE LOCAL end CW asm blocks */ -/* APPLE LOCAL radar 6113240 */ -extern GTY(()) tree invoke_impl_ptr_type; +/* APPLE LOCAL begin radar 6300081 */ +extern GTY(()) tree generic_block_literal_struct_type; + +extern tree build_generic_block_struct_type (void); +/* APPLE LOCAL end radar 6300081 */ #endif /* GCC_TREE_H */ Modified: llvm-gcc-4.2/trunk/gcc/varasm.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/varasm.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/varasm.c (original) +++ llvm-gcc-4.2/trunk/gcc/varasm.c Mon Nov 3 01:33:15 2008 @@ -2974,7 +2974,12 @@ /* Create a string containing the label name, in LABEL. */ labelno = const_labelno++; - ASM_GENERATE_INTERNAL_LABEL (label, "LC", labelno); + /* APPLE LOCAL begin radar 6243961 */ + if (flag_writable_strings && TREE_CODE (exp) == STRING_CST) + ASM_GENERATE_INTERNAL_LABEL (label, "lC", labelno); + else + ASM_GENERATE_INTERNAL_LABEL (label, "LC", labelno); + /* APPLE LOCAL end radar 6243961 */ /* We have a symbol name; construct the SYMBOL_REF and the MEM. */ if (use_object_blocks_p ()) @@ -3027,6 +3032,12 @@ struct constant_descriptor_tree key; void **loc; + /* APPLE LOCAL begin radar 6243961 */ + int save_flag_writable_strings = flag_writable_strings; + if (flag_writable_strings && TREE_CODE (exp) == STRING_CST + && darwin_constant_cfstring_p (exp)) + flag_writable_strings = 0; + /* APPLE LOCAL end radar 6243961 */ /* Look up EXP in the table of constant descriptors. If we didn't find it, create a new one. */ key.value = exp; @@ -3042,6 +3053,8 @@ } maybe_output_constant_def_contents (desc, defer); + /* APPLE LOCAL radar 6243961 */ + flag_writable_strings = save_flag_writable_strings; return desc->rtl; } Modified: llvm-gcc-4.2/trunk/gcc/version.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/version.c?rev=58599&r1=58598&r2=58599&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/version.c (original) +++ llvm-gcc-4.2/trunk/gcc/version.c Mon Nov 3 01:33:15 2008 @@ -11,12 +11,12 @@ /* APPLE LOCAL begin Apple version */ #ifdef ENABLE_LLVM #ifdef LLVM_VERSION_INFO -#define VERSUFFIX " (Based on Apple Inc. build 5623) (LLVM build " LLVM_VERSION_INFO ")" +#define VERSUFFIX " (Based on Apple Inc. build 5627) (LLVM build " LLVM_VERSION_INFO ")" #else -#define VERSUFFIX " (Based on Apple Inc. build 5623) (LLVM build)" +#define VERSUFFIX " (Based on Apple Inc. build 5627) (LLVM build)" #endif #else -#define VERSUFFIX " (Based on Apple Inc. build 5623)" +#define VERSUFFIX " (Based on Apple Inc. build 5627)" #endif /* APPLE LOCAL end Apple version */ From evan.cheng at apple.com Mon Nov 3 01:47:52 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Sun, 2 Nov 2008 23:47:52 -0800 Subject: [llvm-commits] Patch: generalize vector shuffle In-Reply-To: <00BEE636-9DBF-40CE-A322-1A50F2D6BEE3@apple.com> References: <7C812DE7-E002-4767-A0AE-192738C25237@apple.com> <00BEE636-9DBF-40CE-A322-1A50F2D6BEE3@apple.com> Message-ID: Hi Mon Ping, Thanks for doing this. It's an important improvement. However, this patch is hard (at least for me) to digest. It's just a lot of code. :-) Some of the functions have become so big that it's hard to follow. For example, SplitVecRes_VECTOR_SHUFFLE. Is it possible to factor some stuff out? Also, some of code seems to be replicated in several functions (please correct me if that's not the case). For example, the code that determines how an element is used. A stylistic nitpick: + if (VT1NumElems*2 == NumElems && SequentialMask(Mask, 0)) { + setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, VT, V1, V2)); + return; + } + else { The else { } isn't needed because of the early exit. Same issue here: + if (VT1NumElems == NumElems && SequentialMask(Mask,0)) { + setValue(&I, V1); + return; + } else if (VT1NumElems == NumElems && SequentialMask(Mask,NumElems)) { + setValue(&I, V2); + return; + } else { + // Analyze the access pattern of the vector to see if we can extract + // two subvectors and do the shuffle. Don't forget to end comment sentences with periods. :-) Evan On Oct 31, 2008, at 7:56 PM, Mon Ping Wang wrote: > From duncan.sands at math.u-psud.fr Mon Nov 3 02:30:20 2008 From: duncan.sands at math.u-psud.fr (Duncan Sands) Date: Mon, 3 Nov 2008 09:30:20 +0100 Subject: [llvm-commits] Recent apple changes broke the Ada build Message-ID: <200811030930.20704.duncan.sands@math.u-psud.fr> Hi Bill, I'm getting these errors when building Ada: libbackend.a(dwarf2out.o): In function `add_type_attribute': gcc/dwarf2out.c:11732: undefined reference to `generic_block_literal_struct_type' libbackend.a(gtype-desc.o):(.rodata+0x9f8): undefined reference to `generic_block_literal_struct_type' libbackend.a(tree.o): In function `build_block_pointer_type': gcc/tree.c:5112: undefined reference to `generic_block_literal_struct_type' gcc/tree.c:5113: undefined reference to `build_generic_block_struct_type' gcc/tree.c:5113: undefined reference to `generic_block_literal_struct_type' Can you please take care of it. I understand that you can't reasonably try to build Ada before committing, but maybe in the future you can check that Fortran builds (both languages usually fail to build when Apple changes put C stuff in non-C places): it should just be a matter of adding "fortran" to --enable-languages=. Since Fortran is (hopefully) going to be included in the next release, it would anyway be good to regularly test Fortran. Ciao, Duncan. From isanbard at gmail.com Mon Nov 3 02:36:00 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 03 Nov 2008 08:36:00 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r58601 - in /llvm-gcc-4.2/trunk/gcc/testsuite: ./ bugs/powerpc/ g++.apple/ g++.dg/ gcc.apple/ gcc.dg/cpp/ gcc.target/i386/ gcc.target/powerpc/ gcc.target/x86_64/abi/ obj-c++.dg/ objc.dg/ objc.dg/special/ Message-ID: <200811030836.mA38a8Rt011324@zion.cs.uiuc.edu> Author: void Date: Mon Nov 3 02:35:57 2008 New Revision: 58601 URL: http://llvm.org/viewvc/llvm-project?rev=58601&view=rev Log: Sync with Apple GCC mainline. Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/asm-block-66.C llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-destructors.C llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-duplicate-err.C llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-explicit-this.C llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-in-foreach-header.C llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-in_structors.C llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-localisglobal.C llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-nested-block-var.C llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-objectassign.C llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-printf-attribute-1.C llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-sentinel-attribute.C llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/blocks-method-call.C llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/cp-block-byref-2.C llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/debug-inlined-section.C llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/eh1.C 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llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-visibility-hidden-1.m llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-alignment-test-1.m llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-1.m llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-2.m llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-4.m llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-5.m llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-9.m llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/selector-3.m llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/special/unclaimed-category-1.m llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/stret-2.m llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/symtab-1.m llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/sync-objc-exception.m llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/try-catch-15.m llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/try-catch-17.m llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/volatile-1.m llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/zero-link-2.m Modified: llvm-gcc-4.2/trunk/gcc/testsuite/ChangeLog.apple URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/ChangeLog.apple?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/ChangeLog.apple (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/ChangeLog.apple Mon Nov 3 02:35:57 2008 @@ -1,3 +1,629 @@ +2008-10-31 Stuart Hastings + + Radar 5813291 + * gcc.apple/5813291.c: New. + +2008-10-31 Fariborz Jahanian + + Radar 6175959 + * gcc.apple/block-5992047.c: Modified + * gcc.apple/block-objectassign.c: Add + * g++.apple/block-objectassign.C: Add + * g++.apple/block-5992047.C: Modified + +2008-10-28 Fariborz Jahanian + + Radar 6329245 + * gcc.apple/block-nullblockisa.c: Modified + * gcc.apple/block-blocks-test-8.c: Modified + * gcc.apple/block-6116917.c: Modified + * g++.apple/block-nullblockisa.C: Modified + * g++.apple/block-blocks-test-8.C: Modified + * g++.apple/blocks-recovercpp.C: Modified + +2008-10-28 Fariborz Jahanian + + Radar 6261630 + * obj-c++.dg/method-type-attribute.mm: Add + +2008-10-27 Fariborz Jahanian + + Radar 6231433 + * objc.dg/cond-expr-warn.m: Add + * obj-c++.dg/cond-expr-warn.mm: Add + +2008-10-27 Fariborz Jahanian + + Radar 6302949 + * objc.dg/property-missing-comma.m: Add + * obj-c++.dg/property-missing-comma.mm: Add + +2008-10-24 Fariborz Jahanian + + Radar 6305545 + * g++.apple/block-in_structors.C: Add + +2008-10-24 Stuart Hastings + + Radar 308664 6310728 6311054 6311100 + * gcc.apple/6310728.c: New. + * gcc.apple/6308664.c: New. + * objc.dg/6311054.m: New. + +2008-10-24 Josh Conner + + Radar 6305331 + * gcc.apple/longcall-2.c: New test. + +2008-10-22 Fariborz Jahanian + + Radar 6310599 + * gcc.apple/block-duplicate-err.c: Add + * g++.apple/block-duplicate-err.C: Add + +2008-10-21 Stuart Hastings + + Radar 6187262 + * gcc.apple/6187262.c: New. + +2008-10-21 Fariborz Jahanian + + Radar 4746503 + * gcc.apple/no-nested-deprecated-warn.c: Add + +2008-10-20 Stuart Hastings + + Radar 6222167 + * gcc.apple/6222167.c: New. + +2008-10-20 Fariborz Jahanian + + Radar 6255595 + * objc.dg/objc2-newmetadata-sections.m: New + +2008-10-17 Fariborz Jahanian + + Radar 6289031 + * gcc.apple/block-escape-do.c: Modified + * gcc.apple/block-escape-goto.c: Modified + * gcc.apple/block-escape-return.c: Modified + * gcc.apple/block-escape-while.c: Modified + * gcc.apple/block-noescape-helper.c: Modified + * gcc.apple/block-escape-for.c: Modified + * gcc.apple/block-escape-for1.c: Modified + * gcc.apple/block-noescape-helper-1.c: Modified + * gcc.apple/block-noescape-helper-2.c: Modified + +2008-10-15 Stuart Hastings + + Radar 6255801 + * objc.dg/6255801.m: New. + +2008-10-16 Fariborz Jahanian + + Radar 6276695 + * gcc.apple/block-blocks-test-4.c: Modified + * gcc.apple/block-byref.c: Modified + * gcc.apple/block-noescape-helper-3.c: Modified + * gcc.apple/block-error-global-byref.c: Modified + * gcc.apple/block-block-property-2.c: Modified + * gcc.apple/block-blocks-test-5.c: Modified + * gcc.apple/block-escape-do.c: Modified + * gcc.apple/block-escape-switch.c: Modified + * gcc.apple/block-enum.c: Modified + * gcc.apple/block-assignweakgc-1.c: Modified + * gcc.apple/block-assigngcstrongcast.c: Modified + * gcc.apple/block-unused-parameter.c: Modified + * gcc.apple/block-blocks-test-6.c: Modified + * gcc.apple/block-escape-goto.c: Modified + * gcc.apple/block-escape-return.c: Modified + * gcc.apple/block-global-byref.c: Modified + * gcc.apple/block-byref-attribute.c: Modified + * gcc.apple/block-unused-warn.c: Modified + * gcc.apple/block-blocks-test-7.c: Modified + * gcc.apple/block-readweakgc.c: Modified + * gcc.apple/block-blocks-test-8.c: Modified + * gcc.apple/block-escape-while.c: Modified + * gcc.apple/block-codegen-1.c: Modified + * gcc.apple/block-assignweakgc.c: Modified + * gcc.apple/block-readweakgcivar.c: Modified + * gcc.apple/block-blocks-test-1.c: Modified + * gcc.apple/block-noescape-helper.c: Modified + * gcc.apple/block-escape-for.c: Modified + * gcc.apple/block-escape-nested-while.c: Modified + * gcc.apple/block-escape-for1.c: Modifie.c: Modified + * gcc.apple/block-blocks-test-2.c: Modified + * gcc.apple/block-noescape-helper-1.c: Modified + * gcc.apple/block-assigngcglobal.c: Modified + * gcc.apple/block-copy-destroy.c: Modified + * gcc.apple/block-global-byref-1.c: Modified + * gcc.apple/block-assigngcivar.c: Modified + * gcc.apple/block-blocks-test-3.c: Modified + * gcc.apple/block-escape-return1.c: Modified + * gcc.apple/block-noescape-helper-2.c: Modified + * gcc.apple/block-assignweakgcivar.c: Modified + * gcc.apple/block-dup-invoke_impl.c: Modified + * gcc.apple/block-global-byref-2.c: Modified + * g++.apple/block-byref.C: Modified + * g++.apple/block-noescape-helper-3.C: Modified + * g++.apple/block-block-property-2.C: Modified + * g++.apple/block-blocks-test-5.C: Modified + * g++.apple/block-escape-do.C: Modified + * g++.apple/block-escape-switch.C: Modified + * g++.apple/block-enum.C: Modified + * g++.apple/block-assignweakgc-1.C: Modified + * g++.apple/block-assigngcstrongcast.C: Modified + * g++.apple/block-unused-parameter.C: Modified + * g++.apple/block-blocks-test-6.C: Modified + * g++.apple/block-escape-goto.C: Modified + * g++.apple/block-escape-return.C: Modified + * g++.apple/block-unused-warn.C: Modified + * g++.apple/block-byref-attribute.C: Modified + * g++.apple/block-nested.C: Modified + * g++.apple/block-blocks-test-7.C: Modified + * g++.apple/block-readweakgc.C: Modified + * g++.apple/block-blocks-test-8.C: Modified + * g++.apple/block-escape-while.C: Modified + * g++.apple/block-codegen-1.C: Modified + * g++.apple/block-assignweakgc.C: Modified + * g++.apple/block-readweakgcivar.C: Modified + * g++.apple/block-blocks-test-1.C: Modified + * g++.apple/block-noescape-helper.C: Modified + * g++.apple/block-escape-for.C: Modified + * g++.apple/block-escape-nested-while.C: Modified + * g++.apple/block-escape-for1.C: Modified + * g++.apple/block-blocks-test-2.C: Modified + * g++.apple/block-noescape-helper-1.C: Modified + * g++.apple/block-assigngcglobal.C: Modified + * g++.apple/block-copy-destroy.C: Modified + * g++.apple/block-assigngcivar.C: Modified + * g++.apple/block-blocks-test-3.C: Modified + * g++.apple/block-escape-return1.C: Modified + * g++.apple/block-noescape-helper-2.C: Modified + * g++.apple/block-assignweakgcivar.C: Modified + * g++.apple/block-dup-invoke_impl.C: Modified + * g++.apple/block-global-byref-2.C: Modified + * g++.apple/block-blocks-test-4.C: Modified +2008-10-16 Fariborz Jahanian + + Radar 6017984 + * objc.dg/unimplemented-anon-category.m: Add + +2008-10-15 Fariborz Jahanian + + Radar 6285794 + * objc.dg/symtab-1-64bit.m: Modified + +2008-10-15 Fariborz Jahanian + + Radar 6271728 + * obj-c++.dg/syntax-error-7.mm: Modified + * obj-c++.dg/syntax-error-9.mm: Add + +2008-10-14 Fariborz Jahanian + + Radar 6275956 + * g++.apple/block-explicit-this.C: Add + +2008-10-14 Fariborz Jahanian + + Radar 6286881 + * gcc.apple/6286881.c: New + +2008-10-13 Devang Patel + + Radar 6184418 + * gcc.apple/block-nested.c: Undo previous fix. + * gcc.apple/block-byref-block.c: Undo previous fix. + * gcc.apple/block-6116917.c: Undo previous fix. + * gcc.apple/align-test-5c.c: Undo previous fix. + * g++.apple/block-byref-block.c: Undo previous fix. + * objc-c++.dg/objc-gc-5.mm: Undo previous fix. + * objc.dg/objc-gc-3.m: Undo previous fix. + +2008-10-13 Fariborz Jahanian + + Radar 6255913 + * objc.dg/objc2-protocol-1.m: Modifed + * objc.dg/objc2-protocol-9.m: Modifed + * objc.dg/objc2-protocol-2.m: Modifed + * objc.dg/objc2-protocol-4.m: Modifed + * objc.dg/objc2-protocol-5.m: Modifed + * obj-c++.dg/objc2-protocol-9.mm: Modifed + * obj-c++.dg/objc2-protocol-4.mm: Modifed + * obj-c++.dg/objc2-protocol-5.mm: Modifed + * obj-c++.dg/objc2-protocol-1.mm: Modifed + * obj-c++.dg/objc2-protocol-2.mm: Modifed + +2008-10-10 Fariborz Jahanian + + Radar 5847213 - New block ABI + + * gcc.apple/block-nullblockisa.c: Modified + * gcc.apple/block-blocks-test-8.c: Modified + * gcc.apple/block-6116917.c: Modified + * gcc.apple/block-nested-block-var.c: Modified + * g++.apple/block-nullblockisa.C: Modified + * g++.apple/block-blocks-test-8.C: Modified + * g++.apple/blocks-recovercpp.C: Modified + * g++.apple/block-nested-block-var.C: Modified + +2008-10-10 Stuart Hastings + + Radar 6227434 + * gcc.apple/6227434.c: New. + +2008-10-10 Caroline Tice a + + Radar 6275985 + * obj-c++.dg/dwarf-1.mm : Modify to expect function name + to be in __debug_str section. + * gcc.apple/debug-inlined-section.c: New testcase. + * gcc.apple/debug-inlined-section.h: New testcase. + * g++.apple/debug-inlined-section.C: New testcase. + +2008-10-09 Fariborz Jahanian + + Radar 6269491 + * objc.dg/objc-gc-lvalue-cast-warn.m: Add + * objc.dg/objc-gc-7.m: Modified + * objc.dg/objc-gc-weak-1.m: Modified + * objc.dg/objc-gc-1.m: Modified + * objc.dg/objc-gc-2.m: Modified + * obj-c++.dg/objc-gc-2.mm: Modified + * obj-c++.dg/objc-gc-weak-1.mm: Modified + * obj-c++.dg/objc-gc-8.mm: Modified + * obj-c++.dg/objc-gc-1.mm: Modified + + +2008-10-09 Devang Patel + + Radar 6184418 + * gcc.target/powerpc/darwin-bool-1.c: Require ilp32. + * gcc.target/i386/4891561.c: Require ilp32. + * gcc.target/i386/stack-prot-kernel.c: Require ilp32. + * gcc.target/i386/reload-1.c: Require ilp32. + * gcc.apple/asm-block-18.c: Require ilp32. + * gcc.apple/align-test-5d.c: Require ilp32. + * gcc.apple/block-byref-block.c: Require ilp32. + * gcc.apple/4525731-2.c: Require ilp32. + * gcc.apple/asm-block-6.c: Require ilp32. + * gcc.apple/i386-ssetype-6.c: Require ilp32. + * gcc.apple/asm-block-36.c: Require ilp32. + * gcc.apple/asm-block-45.c: Require ilp32. + * gcc.apple/4182984.c: Require ilp32. + * gcc.apple/bswap-1.c: Require ilp32. + * gcc.apple/asm-block-7.c: Require ilp32. + * gcc.apple/asm-block-54.c: Require ilp32. + * gcc.apple/4603883.c: Require ilp32. + * gcc.apple/default-x86_32-sse3.c: Require ilp32. + * gcc.apple/i386-att-stub-1.c: Require ilp32. + * gcc.apple/asm-block-13.c: Require ilp32. + * gcc.apple/asm-block-55.c: Require ilp32. + * gcc.apple/i386-bitmask1.c: Require ilp32. + * gcc.apple/block-nested.c: Require ilp32. + * gcc.apple/asm-block-31.c: Require ilp32. + * gcc.apple/i386-regparmandstackparm-1.c: Require ilp32. + * gcc.apple/block-blocks-test-8.c: Require ilp32. + * gcc.apple/asm-block-32.c: Require ilp32. + * gcc.apple/asm-block-57.c: Require ilp32. + * gcc.apple/asm-block-41.c: Require ilp32. + * gcc.apple/asm-block-24.c: Require ilp32. + * gcc.apple/i386-unaligned-movaps.c: Require ilp32. + * gcc.apple/i386-deep-branch-predict-1.c: Require ilp32. + * gcc.apple/asm-block-50.c: Require ilp32. + * gcc.apple/asm-block-33.c: Require ilp32. + * gcc.apple/default-cpu-1.c: Require ilp32. + * gcc.apple/opt-size-2.c: Require ilp32. + * gcc.apple/align-test-5b.c: Require ilp32. + * gcc.apple/4104248.c: Require ilp32. + * gcc.apple/asm-block-25.c: Require ilp32. + * gcc.apple/4167459.c: Require ilp32. + * gcc.apple/const-cfstring-3.c: Require ilp32. + * gcc.apple/4115609.c: Require ilp32. + * gcc.apple/asm-block-17.c: Require ilp32. + * gcc.apple/default-cpu-2.c: Require ilp32. + * gcc.apple/align-test-5c.c: Require ilp32. + * gcc.apple/4113078.c: Require ilp32. + * gcc.apple/4525731-1.c: Require ilp32. + * gcc.apple/dynamic-no-pic-1.c: Require ilp32. + * gcc.apple/asm-test-nofralloc.c: Require ilp32. + * gcc.apple/block-6116917.c: Require ilp32. + * gcc.apple/asm-block-35.c: Require ilp32. + * g++.dg/kext4.C: Require ilp32. + * g++.dg/apple-longcall-2.C: Require ilp32. + * g++.dg/kext7.C: Require ilp32. + * g++.dg/apple-longcall-3.C: Require ilp32. + * objc.dg/objc-fast-4.m: Require ilp32. + * objc.dg/objc-dir-dispatch.m: Require ilp32. + * objc.dg/objc-fpret-2.m: Require ilp32. + * objc.dg/objc-gc-3.m: Require ilp32. + * objc.dg/const-str-10.m: Require ilp32. + * objc.dg/try-catch-17.m: Require ilp32. + * objc.dg/objc2-alignment-test-1.m: Require ilp32. + * objc.dg/const-str-11.m: Require ilp32. + * objc.dg/objc-visibility-hidden-1.m: Require ilp32. + * objc.dg/selector-3.m: Require ilp32. + * objc.dg/objc-gc-section-1.m: Require ilp32. + * objc.dg/const-str-12.m: Require ilp32. + * objc.dg/symtab-1.m: Require ilp32. + * objc.dg/objc-gc-section-2.m: Require ilp32. + * objc.dg/volatile-1.m: Require ilp32. + * objc.dg/const-str-13.m: Require ilp32. + * objc.dg/stubify-2.m: Require ilp32. + * objc.dg/special/unclaimed-category-1.m: Require ilp32. + * objc.dg/encode-7a.m: Require ilp32. + * objc.dg/layout-1.m: Require ilp32. + * objc.dg/bitfield-3.m: Require ilp32. + * objc.dg/defs-warn-1.m: Require ilp32. + * objc.dg/objc-fast-1.m: Require ilp32. + * objc.dg/stret-2.m: Require ilp32. + * objc.dg/zero-link-2.m: Require ilp32. + * objc.dg/objc-fast-2.m: Require ilp32. + * objc.dg/method-4.m: Require ilp32. + * objc.dg/sync-objc-exception.m: Require ilp32. + * objc.dg/next-runtime-1.m: Require ilp32. + * objc.dg/image-info.m: Require ilp32. + * objc.dg/bitfield-5.m: Require ilp32. + * objc.dg/objc-fast-3.m: Require ilp32. + * objc.dg/try-catch-15.m: Require ilp32. + * objc.dg/objc-fpret-1.m: Require ilp32. + * objc.dg/const-str-6.m: Require ilp32. + * objc.dg/objc-gc-2.m: Require ilp32. + * objc.dg/const-cfstring-4.m: Require ilp32. + * objc.dg/defs.m: Require ilp32. + * obj-c++.dg/template-4.m: Require ilp32. + * obj-c++.dg/defs.m: Require ilp32. + * obj-c++.dg/const-str-12.m: Require ilp32. + * obj-c++.dg/cxx-ivars-3.m: Require ilp32. + * obj-c++.dg/const-cfstring-4.mm: Require ilp32. + * obj-c++.dg/objc-fast-2.mm: Require ilp32. + * obj-c++.dg/layout-1.mm: Require ilp32. + * obj-c++.dg/const-str-13.mm: Require ilp32. + * obj-c++.dg/try-catch-20.mm: Require ilp32. + * obj-c++.dg/bitfield-1.mm: Require ilp32. + * obj-c++.dg/objc-fast-3.mm: Require ilp32. + * obj-c++.dg/debug-1.mm: Require ilp32. + * obj-c++.dg/const-str-9.mm: Require ilp32. + * obj-c++.dg/objc-fpret-1.mm: Require ilp32. + * obj-c++.dg/method-11.mm: Require ilp32. + * obj-c++.dg/objc-gc-4.mm: Require ilp32. + * obj-c++.dg/objc-gc-section-1.mm: Require ilp32. + * obj-c++.dg/objc-fast-4.mm: Require ilp32. + * obj-c++.dg/objc-gc-5.mm: Require ilp32. + * obj-c++.dg/const-str-10.mm: Require ilp32. + * obj-c++.dg/objc-gc-section-2.mm: Require ilp32. + * obj-c++.dg/objc-visibility-hidden-1.mm: Require ilp32. + * obj-c++.dg/objc-stret-1.mm: Require ilp32. + * obj-c++.dg/defs-warn-1.mm: Require ilp32. + * obj-c++.dg/const-str-11.mm: Require ilp32. + * obj-c++.dg/bitfield-4.mm: Require ilp32. + * obj-c++.dg/sync-objc-exception.mm: Require ilp32. + * obj-c++.dg/objc-fast-1.mm: Require ilp32. + * g++.apple/block-blocks-test-8.C: Require ilp32. + * g++.apple/block-byref-block.C: Require ilp32. + +2008-10-07 Stuart Hastings + + Radar 6258941 + * gcc.apple/6258941.c: New. + +2008-10-06 Fariborz Jahanian + + Radar 6268817 + * gcc.apple/block-in-foreach-header.c: Add + * g++.apple/block-in-foreach-header.C: Add + +2008-10-03 Fariborz Jahanian + + Radar 6267049 + * objc.dg/objc2-property-typedefprotocol.m: Add + +2008-10-03 Fariborz Jahanian + + Radar 6264448 + * objc.dg/objc-property-enumtype.m: Add + * obj-c++.dg/objc-property-enumtype.mm: Add + +2008-10-02 Fariborz Jahanian + + Radar 6230656 + + * gcc.apple/block-no-block-def.c: Add + +2008-10-02 Fariborz Jahanian + + Radar 6246527 + * gcc.apple/block-printf-attribute-1.c: Add + * gcc.apple/block-sentinel-attribute.c: Add + * g++.apple/block-sentinel-attribute.C: Add + * g++.apple/block-printf-attribute-1.C: Add + +2008-10-02 Stuart Hastings + + Radar 5919583 + * gcc.apple/5919583.c: New. + +2008-10-01 Fariborz Jahanian + + Radar 6252174 + * objc.dg/objc2-sendsuper_msg.m: Add + +2008-10-01 Fariborz Jahanian + + Radar 6255671 + * gcc.apple/block-block-property-2.c: Add + * g++.apple/block-block-property-2.C: Add + +2008-09-30 Fariborz Jahanian + + Radar 6230297 + * g++.apple/block-localisglobal.C: New + * gcc.apple/block-localisglobal.c: New + * gcc.apple/block-complicated-type.c: Modified + * gcc.apple/block-explicit-return-type.c: Modified + * gcc.apple/block-local-stack.c: Modified + * gcc.apple/block-literal.c: Modified + * g++.apple/block-continuation.C: Modified + * g++.apple/block-explicit-return-type.C: Modified + * g++.apple/block-literal.C: Modified + * g++.apple/block-local-stack.C: Modified + * g++.apple/block-complicated-type.C: Modified + * gcc.apple/block-attributes-1.c: Modified + * g++.apple/block-attributes-1.C: Modified + + +2008-09-30 Fariborz Jahanian + + Radar 6225809 + * gcc.apple/block-nested-block-var.c: Add + * g++.apple/block-nested-block-var.C: Add + +2008-09-30 Stuart Hastings + + Radar 5919583 + Revert 2008-09-26 patch. + +2008-09-30 Caroline Tice + + Radars 6237086 & 6237616 + g++.apple/cp-block-byref-2.C: Make minor fix to testcase. + +2008-09-30 Caroline Tice + + Radars 6237086 & 6237616 + gcc.apple/block-byref-2.c: New testcase. + g++.apple/cp-block-byref-2.C: New testcase + +2008-09-29 Fariborz Jahanian + + Radar 6154598 + * g++.apple/blocks-method-call.C: Add + +2008-09-26 Fariborz Jahanian + + Radar 6243400 + * g++.apple/block-destructors.C: New + +2008-09-28 Caroline Tice + + Radar 6163705 + * gcc.apple/block-byref-3.c: Fix to work properly with -m64. + +2008-09-26 Stuart Hastings + + Radar 5919583 + * gcc.apple/5919583.c: New. + +2008-09-26 Caroline Tice + + Radar 6163705 + * gcc.apple/block-byref-3.c: New testcase. + +2008-09-25 Fariborz Jahanian + + Radar 6246965 + * gcc.apple/block-call.c : Added more tests. + +2008-09-25 Fariborz Jahanian + + Radar 6244520 + * gcc.apple/block-nullblockisa.c: Add + * gcc.apple/block-blocks-test-8.c: Modified + * g++.apple/block-nullblockisa.C: Add + +2008-09-25 Fariborz Jahanian + + Radar 6237713 + * gcc.apple/block-attributes-1.c: New + * g++.apple/block-attributes-1.C: New + +2008-09-24 Stuart Hastings + + Radar 6025404 + * gcc.apple/6025404.c: New. + +2008-09-24 Stuart Hastings + + Radar 6119849 + * gcc.apple/6119849.c: Added return. + +2008-09-23 Fariborz Jahanian + + Radar 6196572 + * gcc.apple/block-call.c: Modified + +2008-09-23 Fariborz Jahanian + + Radar 6230701 + * gcc.apple/block-no-trampoline.c: New + * gcc.apple/block-implicit-byref.c: Modified + * g++.apple/block-no-trampoline.C: New + +2008-09-22 Stuart Hastings + + Radar 6185789 + * g++.apple/6185789.C: New. + +2008-09-22 Josh Conner + + Radar 6204451 + * objc.dg/6204451.m: New test. + +2008-09-19 Fariborz Jahanian + + Radar 6230800 + * obj-c++.dg/objc2-none-fragile-ivar-use.mm: Modified + * objc.dg/objc2-none-fragile-ivar-use.m: Modified + +2008-09-19 Fariborz Jahanian + + Radar 4900615 + * objc.dg/encode-ld.m: Add + +2008-09-19 Fariborz Jahanian + + Radar 6173152 + * objc.dg/enhanced-proto-4.m: Modified + * objc.dg/newproperty-type-conv-1.m: Modified + * objc.dg/property-synthesize-ivar-1.m: Modified + * objc.dg/property-synthesize-ivar-9.m: Add + * objc.dg/newproperty-syntax-1.m: Modified + * objc.dg/newproperty-weak-attribute-3.m: Modified + * objc.dg/property-synthesize-ivar-2.m: Modified + * objc.dg/property-synthesize-ivar-3.m: Modified + * objc.dg/property-synthesize-ivar-4.m: Modified + * objc.dg/property-synthesize-ivar-32-5.m: Add + * objc.dg/property-synthesize-ivar-5.m: Modified + * objc.dg/property-synthesize-ivar-6.m: Add + * objc.dg/newproperty-nowarn-compound-exp.m: Modified + * objc.dg/newproperty-neg-ivar-check-1.m: Modified + * objc.dg/synthesized-unknown-ivar-warn.m: Modified + * objc.dg/property-synthesize-ivar-7.m: Modified + * obj-c++.dg/newproperty-type-conv-1.mm: Modified + * obj-c++.dg/property-synthesize-ivar-5.mm: Add + * obj-c++.dg/property-synthesize-ivar-32-5.mm: Add + * obj-c++.dg/newproperty-syntax-1.mm: Modified + * obj-c++.dg/property-synthesize-ivar-6.mm: Add + * obj-c++.dg/property-synthesize-ivar-1.mm: Modified + * obj-c++.dg/newproperty-weak-attribute-3.mm: Modified + * obj-c++.dg/property-synthesize-ivar-7.mm: Modified + * obj-c++.dg/enhanced-proto-4.mm: Modified + * obj-c++.dg/newproperty-nowarn-compound-exp.mm: Modified + * obj-c++.dg/property-synthesize-ivar-2.mm: Modified + * obj-c++.dg/newproperty-neg-ivar-check-1.mm: Modified + * obj-c++.dg/property-synthesize-ivar-8.mm: Add + * obj-c++.dg/property-synthesize-ivar-3.mm: Modified + * obj-c++.dg/property-synthesize-ivar-10.mm: Add + * obj-c++.dg/property-synthesize-ivar-9.mm: Add + * objc.dg/property-synthesize-ivar-8.m: Add + * obj-c++.dg/property-synthesize-ivar-4.mm: Modified + +2008-09-19 Stuart Hastings + + Radar 6119849 + * gcc.apple/6119849.c: New. + 2008-09-16 Fariborz Jahanian Radar 6214617 Modified: llvm-gcc-4.2/trunk/gcc/testsuite/bugs/powerpc/gcc.xfail URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/bugs/powerpc/gcc.xfail?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/bugs/powerpc/gcc.xfail (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/bugs/powerpc/gcc.xfail Mon Nov 3 02:35:57 2008 @@ -12,6 +12,24 @@ ###------------------------------------------------------------------ 5066141: gcc.dg/pr30643.c scan-assembler-not undefined 5951276: gcc.target/i386/20020616-1.c execution test +# temporary failures due to new linker messages +6312070: gcc.dg/compat/scalar-by-value-1 c_compat_x_tst.o-c_compat_y_tst.o link +6312070: gcc.dg/compat/scalar-by-value-3 c_compat_x_tst.o-c_compat_y_tst.o link +6312070: gcc.dg/darwin-ld-1.c (test for excess errors) +6312070: gcc.dg/torture/fp-int-convert-float80-timode.c -O0 (test for excess errors) +6312070: gcc.dg/torture/fp-int-convert-float80-timode.c -O1 (test for excess errors) +6312070: gcc.dg/torture/fp-int-convert-float80-timode.c -O2 (test for excess errors) +6312070: gcc.dg/torture/fp-int-convert-float80-timode.c -O3 -fomit-frame-pointer (test for excess errors) +6312070: gcc.dg/torture/fp-int-convert-float80-timode.c -O3 -g (test for excess errors) +6312070: gcc.dg/torture/fp-int-convert-float80-timode.c -Os (test for excess errors) +6312070: gcc.dg/torture/fp-int-convert-float80-timode.c -fast (test for excess errors) +6312070: gcc.dg/torture/fp-int-convert-timode.c -O0 (test for excess errors) +6312070: gcc.dg/torture/fp-int-convert-timode.c -O1 (test for excess errors) +6312070: gcc.dg/torture/fp-int-convert-timode.c -O2 (test for excess errors) +6312070: gcc.dg/torture/fp-int-convert-timode.c -O3 -fomit-frame-pointer (test for excess errors) +6312070: gcc.dg/torture/fp-int-convert-timode.c -O3 -g (test for excess errors) +6312070: gcc.dg/torture/fp-int-convert-timode.c -Os (test for excess errors) +6312070: gcc.dg/torture/fp-int-convert-timode.c -fast (test for excess errors) # # ppc only 3906375: gcc.dg/debug/debug-1.c -gstabs -fast scan-assembler xyzzy @@ -27,6 +45,40 @@ 4875164: gcc.dg/vect/section-anchors-vect-69.c (test for excess errors) 4875164: gcc.dg/vect/section-anchors-vect-69.c scan-tree-dump-times Alignment of access forced using peeling 4 4875176: gcc.target/powerpc/stabs-attrib-vect-darwin.c scan-assembler .stabs.*vi:\\(0,[0-9]+\\)=@V +6186620: gcc.dg/builtins-18.c (test for excess errors) +6186620: gcc.dg/builtins-20.c (test for excess errors) +6186620: gcc.dg/builtins-55.c (test for excess errors) +6186620: gcc.dg/darwin-minversion-2.c (test for excess errors) +6186620: gcc.dg/darwin64-abi.c (test for excess errors) +6186620: gcc.dg/single-precision-constant.c (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-1.c -O0 (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-1.c -O1 (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-1.c -O2 (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-1.c -O3 -fomit-frame-pointer (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-1.c -O3 -g (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-1.c -Os (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-1.c -fast (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-2.c -O0 (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-2.c -O1 (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-2.c -O2 (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-2.c -O3 -fomit-frame-pointer (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-2.c -O3 -g (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-2.c -Os (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-2.c -fast (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-3.c -O0 (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-3.c -O1 (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-3.c -O2 (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-3.c -O3 -fomit-frame-pointer (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-3.c -O3 -g (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-3.c -Os (test for excess errors) +6186620: gcc.dg/torture/builtin-convert-3.c -fast (test for excess errors) +6186620: gcc.dg/torture/builtin-power-1.c -O0 (test for excess errors) +6186620: gcc.dg/torture/builtin-power-1.c -O1 (test for excess errors) +6186620: gcc.dg/torture/builtin-power-1.c -O2 (test for excess errors) +6186620: gcc.dg/torture/builtin-power-1.c -O3 -fomit-frame-pointer (test for excess errors) +6186620: gcc.dg/torture/builtin-power-1.c -O3 -g (test for excess errors) +6186620: gcc.dg/torture/builtin-power-1.c -Os (test for excess errors) +6186620: gcc.dg/torture/builtin-power-1.c -fast (test for excess errors) # # x86 only 4874504: gcc.dg/tree-ssa/gen-vect-11b.c scan-tree-dump-times vectorized 0 loops 1 Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/asm-block-66.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/asm-block-66.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/asm-block-66.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/asm-block-66.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,8 @@ +/* APPLE LOCAL file CW asm blocks 6276214 */ +/* { dg-do compile { target i?86*-*-darwin* } } */ +/* { dg-options { -fasm-blocks } } */ +/* Radar 6276214 */ + +void foo () { + asm test esi, 24 ; 11000b +} Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-5992047.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-5992047.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-5992047.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-5992047.C Mon Nov 3 02:35:57 2008 @@ -1,11 +1,11 @@ -/* APPLE LOCAL file radar 5992047 */ +/* APPLE LOCAL file radar 5992047 - radar 6175959 */ /* Check that with a previous declaration of _Block_destroy, test case compiles with no error or ICE. */ /* { dg-options "-fblocks" } */ /* { dg-do compile { target *-*-darwin* } } */ #define Block_destroy(xxx) _Block_destroy((const void *)(xxx)) -void _Block_destroy(const void *aBlock); +void _Block_destroy(const void *aBlock, int); typedef struct dispatch_item_s *dispatch_item_t; typedef void (^completion_block_t)(void); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assigngcglobal.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-assigngcglobal.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assigngcglobal.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assigngcglobal.C Mon Nov 3 02:35:57 2008 @@ -31,7 +31,7 @@ int main(char *argc, char *argv[]) { - __byref int i = 0; + __block int i = 0; // assigning a Block into a global should elicit a global write-barrier under GC GlobalVoidVoid = ^ { ++i; }; return GlobalInt - 1; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assigngcivar.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-assigngcivar.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assigngcivar.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assigngcivar.C Mon Nov 3 02:35:57 2008 @@ -48,7 +48,7 @@ int main(char *argc, char *argv[]) { - __byref int i = 0; + __block int i = 0; TestObject *to = [[TestObject alloc] init]; // assigning a Block into an ivar should elicit a write-barrier under GC to->ivarBlock = ^ { ++i; }; // fails to gen write-barrier Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assigngcstrongcast.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-assigngcstrongcast.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assigngcstrongcast.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assigngcstrongcast.C Mon Nov 3 02:35:57 2008 @@ -38,7 +38,7 @@ int main(char *argc, char *argv[]) { StructWithBlock_t *swbp = (StructWithBlock_t *)malloc(sizeof(StructWithBlock_t*)); - __byref int i = 10; + __block int i = 10; // assigning a Block into an struct slot should elicit a write-barrier under GC swbp->ivarBlock = ^ { ++i; }; return GlobalInt - 1; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assignweakgc-1.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-assignweakgc-1.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assignweakgc-1.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assignweakgc-1.C Mon Nov 3 02:35:57 2008 @@ -28,7 +28,7 @@ int main(char *argc, char *argv[]) { // an object should not be retained within a stack Block - __byref int i = 0; + __block int i = 0; void (^local)(void); Henry = ^ { ++i; return &i; }; if (GlobalInt == 1) { Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assignweakgc.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-assignweakgc.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assignweakgc.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assignweakgc.C Mon Nov 3 02:35:57 2008 @@ -28,7 +28,7 @@ int main(char *argc, char *argv[]) { // an object should not be retained within a stack Block - __byref int i = 0; + __block int i = 0; void (^local)(void); Henry = ^ { ++i; }; if (GlobalInt == 1) { Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assignweakgcivar.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-assignweakgcivar.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assignweakgcivar.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-assignweakgcivar.C Mon Nov 3 02:35:57 2008 @@ -36,7 +36,7 @@ int main(char *argc, char *argv[]) { // an object should not be retained within a stack Block - __byref int i = 0; + __block int i = 0; void (^local)(void); Foo *foo = [[Foo alloc] init]; foo->ivar = ^ { ++i; }; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-attributes-1.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-attributes-1.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-attributes-1.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-attributes-1.C Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file radar 6237713 */ +/* APPLE LOCAL file radar 6237713 - modified for radar 6230297 */ /* Test for using attributes on blocks. */ /* { dg-options "-mmacosx-version-min=10.5 -fblocks" { target *-*-darwin* } } */ /* { dg-do compile } */ @@ -11,10 +11,10 @@ { void (^a)(void) __attribute__((noreturn)) = ^ (void) __attribute__((noreturn)) { exit (0); }; // OK; - ^ (int i) __attribute__((noreturn)) { return i; }; /* { dg-warning "function declared \\'noreturn\\' has a \\'return\\' statement" } */ + int (^b)(int) __attribute__((noreturn)) = ^ (int i) __attribute__((noreturn)) { return i; }; /* { dg-warning "function declared \\'noreturn\\' has a \\'return\\' statement" } */ /* { dg-warning "\\'noreturn\\' function does return" "" { target *-*-* } 14 } */ - ^ __attribute__((noreturn)) { return 100; }; /* { dg-warning "function declared \\'noreturn\\' has a \\'return\\' statement" } */ + int (^c)(void) __attribute__((noreturn)) = ^ __attribute__((noreturn)) { return 100; }; /* { dg-warning "function declared \\'noreturn\\' has a \\'return\\' statement" } */ /* { dg-warning "\\'noreturn\\' function does return" "" { target *-*-* } 17 } */ a = ^ (void) __attribute__((noreturn)) { exit (0); }; // OK Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-block-property-2.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-block-property-2.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-block-property-2.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-block-property-2.C Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file radar 5831920 */ +/* APPLE LOCAL file radar 5831920 - Modified for radar 6255671 */ #import /* Test a property with block type. */ /* { dg-do run } */ @@ -15,8 +15,8 @@ int (^getIntRetain)(void); } - at property int (^getIntCopy)(void); - at property int (^getIntRetain)(void); + at property (assign) int (^getIntCopy)(void); + at property (assign) int (^getIntRetain)(void); @end @implementation TestObject @@ -34,7 +34,7 @@ int main(char *argc, char *argv[]) { int count; - __byref int val = 0; + __block int val = 0; TestObject *to = [[TestObject alloc] init]; to.getIntRetain = ^ { printf("\n Hello(%d)\n", val); return ++val; }; to.getIntCopy = to.getIntRetain; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-1.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-blocks-test-1.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-1.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-1.C Mon Nov 3 02:35:57 2008 @@ -2,14 +2,14 @@ /* { dg-options "-fblocks" } */ /* { dg-do compile } */ -__byref int X; /* { dg-warning "__byref attribute is only allowed on local variables - ignored" } */ +__block int X; /* { dg-warning "__block attribute is only allowed on local variables - ignored" } */ -int foo(__byref int param) { /* { dg-warning "byref attribute can be specified on variables only - ignored" } */ - __byref int OK = 1; +int foo(__block int param) { /* { dg-warning "__block attribute can be specified on variables only - ignored" } */ + __block int OK = 1; - extern __byref double extern_var; /* { dg-warning "__byref attribute is only allowed on local variables - ignored" } */ + extern __block double extern_var; /* { dg-warning "__block attribute is only allowed on local variables - ignored" } */ if (X) { - static __byref char * pch; /* { dg-warning "__byref attribute is only allowed on local variables - ignored" } */ + static __block char * pch; /* { dg-warning "__block attribute is only allowed on local variables - ignored" } */ } return OK - 1; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-2.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-blocks-test-2.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-2.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-2.C Mon Nov 3 02:35:57 2008 @@ -6,8 +6,8 @@ #include int main() { - __byref int X = 1234; - __byref const char * message = "HELLO"; + __block int X = 1234; + __block const char * message = "HELLO"; X = X - 1234; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-3.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-blocks-test-3.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-3.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-3.C Mon Nov 3 02:35:57 2008 @@ -6,8 +6,8 @@ #include int main() { - __byref int X = 1234; - __byref const char * message = "HELLO\n"; + __block int X = 1234; + __block const char * message = "HELLO\n"; X = X - 1234; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-4.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-blocks-test-4.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-4.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-4.C Mon Nov 3 02:35:57 2008 @@ -10,7 +10,7 @@ }; int main() { - __byref int X = 1234; + __block int X = 1234; int (^CP)(void) = ^{ X = X+1; return X; }; CP(); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-5.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-blocks-test-5.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-5.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-5.C Mon Nov 3 02:35:57 2008 @@ -17,8 +17,8 @@ int main() { int x = 1; - __byref int y = 2; - __byref int br_x; + __block int y = 2; + __block int br_x; int y1; double res = test(^(int z){ y = x+z; return (double)x; }); printf("result = %f x = %d y = %d\n", res, x, y); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-6.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-blocks-test-6.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-6.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-6.C Mon Nov 3 02:35:57 2008 @@ -16,8 +16,8 @@ } int main() { - __byref int x = 1; - __byref int y = 2; + __block int x = 1; + __block int y = 2; double res = test(^(int z){ y = x+z; return (double)x; }); printf("result = %f x = %d y = %d\n", res, x, y); if (x != 1 || y != 43) Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-7.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-blocks-test-7.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-7.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-7.C Mon Nov 3 02:35:57 2008 @@ -12,27 +12,27 @@ int i; int foo() { - __byref id FFFFFF; - __byref id Q; + __block id FFFFFF; + __block id Q; ^{ FFFFFF = 0; }; if (i) { - __byref id FFFFFF; - __byref id Q; + __block id FFFFFF; + __block id Q; ^{ FFFFFF = 0; }; } } int main() { - __byref id X; - __byref id X1; + __block id X; + __block id X1; ^{ X = 0; }; if (i) { - __byref id X; - __byref id X1; + __block id X; + __block id X1; ^{ X = 0; }; } return 0; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-8.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-blocks-test-8.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-8.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-blocks-test-8.C Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* Test the __byreg runtime features. */ /* { dg-options "-mmacosx-version-min=10.5 -ObjC++ -framework Foundation" { target i?86-*-darwin* } } */ /* { dg-do run { target i?86-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #include #import @@ -48,17 +48,28 @@ BLOCK_IS_GC = (1 << 27), }; +/* APPLE LOCAL begin radar 5847213 - radar 6329245 */ struct Block_basic { - void *isa; - int Block_flags; // int32_t - int Block_size; // XXX should be packed into Block_flags + void *isa; // initialized to &_NSConcreteStackBlock or &_NSConcreteGlobalBlock + int Block_flags; + int reserved; void (*Block_invoke)(void *); - void (*Block_copy)(void *dst, void *src); - void (*Block_dispose)(void *); - //long params[0]; // generic space for const & byref hidden params, return value, variable on needs of course + + struct Block_descriptor_1 { + unsigned long int reserved; // NULL + unsigned long int Block_size; // sizeof(struct Block_literal_1) + + // optional helper functions + void (*Block_copy)(void *dst, void *src); + void (*Block_dispose)(void *src); + } *descriptor; + + // imported variables }; +/* APPLE LOCAL end radar 5847213 - radar 6329245 */ + struct Block_byref { - //long reserved; + void* isa; struct Block_byref *forwarding; int flags;//refcount; int size; @@ -89,7 +100,7 @@ } int main(int argc, char *argv[]) { - id __byref dumbo = newDumbObject(); //[DumbObject new]; + id __block dumbo = newDumbObject(); //[DumbObject new]; void (^dummy)(void) = ^{ [dumbo self]; }; @@ -101,8 +112,8 @@ } char result[200]; - printf("calling out to copy support helper at %p\n", aBlock->Block_copy); - (*aBlock->Block_copy)(result, aBlock); // do fixup + printf("calling out to copy support helper at %p\n", aBlock->descriptor->Block_copy); + (*aBlock->descriptor->Block_copy)(result, aBlock); // do fixup // The copy/destroy helper should have had a callout to _Block_byref_assign_copy for its byref block if (! ByrefAssignCopy) { @@ -116,7 +127,7 @@ return 1; } - (*aBlock->Block_dispose)(aBlock); + (*aBlock->descriptor->Block_dispose)(aBlock); return 0; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-byref-attribute.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-byref-attribute.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-byref-attribute.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-byref-attribute.C Mon Nov 3 02:35:57 2008 @@ -1,11 +1,11 @@ /* APPLE LOCAL file radar 6096219 */ -/* Test that __byref attribute can be used directly. */ +/* Test that __block attribute can be used directly. */ /* { dg-options "-mmacosx-version-min=10.5 -fblocks" { target *-*-darwin* } } */ /* { dg-do compile } */ int main() { - __byref int JJJJ; + __block int JJJJ; __attribute__((__blocks__(byref))) int III; int (^XXX)(void) = ^{ return III+JJJJ; }; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-byref.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-byref.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-byref.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-byref.C Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* { dg-options "-fblocks" } */ int main() { - __byref int x, y; + __block int x, y; ^{ }; ^{ int r; return x+y+r; }; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-codegen-1.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-codegen-1.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-codegen-1.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-codegen-1.C Mon Nov 3 02:35:57 2008 @@ -18,8 +18,8 @@ } int main() { - __byref int x = 1; - __byref int y = 2; + __block int x = 1; + __block int y = 2; double res = test(^(int z){ y = x+z; return (double)x; }); printf("result = %f x = %d y = %d\n", res, x, y); if (x != 1 || y != 43) Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-complicated-type.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-complicated-type.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-complicated-type.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-complicated-type.C Mon Nov 3 02:35:57 2008 @@ -15,6 +15,8 @@ int (^(^block)(double x))(char, short); void foo() { - block = ^(double x){ return ^(char c, short y) { return (int)c + y; };}; /* { dg-error "returning block that lives on the local stack" } */ + int one = 1; + /* APPLE LOCAL radar 6230297 */ + block = ^(double x){ return ^(char c, short y) { return one + (int)c + y; };}; /* { dg-error "returning block that lives on the local stack" } */ } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-continuation.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-continuation.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-continuation.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-continuation.C Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file radar 5732232 - blocks */ +/* APPLE LOCAL file radar 5732232 - radar 6230297 - blocks */ /* Modified for radar 6169527 */ /* { dg-do compile } */ /* { dg-options "-fblocks" } */ @@ -6,12 +6,13 @@ void takeblock (void (^)()); int main() { + int one = 1; while (1) { takeblock(^{ break; /* { dg-error "break statement not within loop or switch" } */ - while (1) break;/* ok */ + while (one) break;/* ok */ goto label1; /* { dg-error "goto not allowed in block literal" } */ - /* { dg-error "label" "" { target *-*-* } 13 } */ + /* { dg-error "label" "" { target *-*-* } 14 } */ }); /* { dg-error "enters" } */ label1: /* { dg-error "jump to label" } */ break; /* OK */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-copy-destroy.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-copy-destroy.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-copy-destroy.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-copy-destroy.C Mon Nov 3 02:35:57 2008 @@ -12,7 +12,7 @@ @implementation Root - (void)example { - __byref int y, x; + __block int y, x; NSAutoreleasePool *pool = [NSAutoreleasePool new]; NSAutoreleasePool *relpool = [NSAutoreleasePool new]; bar(^(int z){ y = x+z; [pool drain]; if (y) y++; [relpool release]; return y+2.0; }); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-copyconstructor.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-copyconstructor.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-copyconstructor.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-copyconstructor.C Mon Nov 3 02:35:57 2008 @@ -3,6 +3,7 @@ support code. */ /* { dg-do run } */ /* { dg-options "-mmacosx-version-min=10.6 " { target *-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ #import #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-debug-1.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-debug-1.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-debug-1.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-debug-1.C Mon Nov 3 02:35:57 2008 @@ -4,7 +4,8 @@ /* { dg-do compile } */ /* { dg-options "-g -O0 -fblocks -dA" } */ -/* { dg-final { scan-assembler "invoke_impl.*DW_AT_name" } } */ +/* { dg-final { scan-assembler "__block_descriptor.*DW_AT_name" } } */ +/* { dg-final { scan-assembler "__block_literal_generic.*DW_AT_name" } } */ struct inStruct { void (^genericBlockPtr)(); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-debug-2.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-debug-2.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-debug-2.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-debug-2.C Mon Nov 3 02:35:57 2008 @@ -4,7 +4,8 @@ /* { dg-do compile } */ /* { dg-options "-g -O0 -fblocks -dA" } */ -/* { dg-final { scan-assembler "invoke_impl.*DW_AT_name" } } */ +/* { dg-final { scan-assembler "__block_descriptor.*DW_AT_name" } } */ +/* { dg-final { scan-assembler "__block_literal_generic.*DW_AT_name" } } */ void (^os)(); Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-destructors.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-destructors.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-destructors.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-destructors.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,74 @@ +/* APPLE LOCAL file radar 6243400 */ +/* { dg-options "-fblocks" } */ +/* { dg-do run } */ + +#include +extern "C" void abort(void); +int constructors = 0; +int destructors = 0; + +class TestObject +{ +public: + TestObject(const TestObject& inObj); + TestObject(); + ~TestObject(); + + TestObject& operator=(const TestObject& inObj); + + int version() const { return _version; } +private: + mutable int _version; +}; + +TestObject::TestObject(const TestObject& inObj) + +{ + ++constructors; + _version = inObj._version; + printf("%p (%d) -- TestObject(const TestObject&) called\n", this, _version); +} + + +TestObject::TestObject() +{ + _version = ++constructors; + printf("%p (%d) -- TestObject() called\n", this, _version); +} + + +TestObject::~TestObject() +{ + printf("%p -- ~TestObject() called\n", this); + ++destructors; +} + + +TestObject& TestObject::operator=(const TestObject& inObj) +{ + printf("%p -- operator= called\n", this); + _version = inObj._version; + return *this; +} + +void testRoutine() { + TestObject one; + + void (^b)(void) = ^{ printf("my const copy of one is %d\n", one.version()); }; +} + + + +int main(char *argc, char *argv[]) { + testRoutine(); + if (constructors == 0) { + printf("No copy constructors!!!\n"); + abort(); + } + if (constructors != destructors) { + printf("%d constructors but only %d destructors\n", constructors, destructors); + abort(); + } + printf("%s:success\n", argv[0]); + return 0; +} Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-dup-invoke_impl.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-dup-invoke_impl.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-dup-invoke_impl.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-dup-invoke_impl.C Mon Nov 3 02:35:57 2008 @@ -23,8 +23,8 @@ } int main() { - __byref enum numbers x = one; - __byref enum numbers y = two; + __block enum numbers x = one; + __block enum numbers y = two; myblock CL = ^(enum numbers z) { y = z; Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-duplicate-err.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-duplicate-err.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-duplicate-err.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-duplicate-err.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,14 @@ +/* APPLE LOCAL file radar 6310599 */ +/* Check that internal fields do not conflict with user names. */ +/* { dg-options "-fblocks" } */ +/* { dg-do compile } */ + +int main() +{ + __block int flags; + __block void *isa; + + ^{ flags=1; isa = (void *)isa; }; + return 0; +} + Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-enum.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-enum.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-enum.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-enum.C Mon Nov 3 02:35:57 2008 @@ -23,8 +23,8 @@ } int main() { - __byref enum numbers x = one; - __byref enum numbers y = two; + __block enum numbers x = one; + __block enum numbers y = two; enum numbers res = test(^(enum numbers z){ y = z; return x; }); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-do.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-escape-do.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-do.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-do.C Mon Nov 3 02:35:57 2008 @@ -14,12 +14,12 @@ int main() { { - __byref int O1; + __block int O1; int p = 0; do { - __byref int I1; + __block int I1; do { - __byref int J1; + __block int J1; if (p == 2) break; } while ( ++p < 3); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-for.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-escape-for.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-for.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-for.C Mon Nov 3 02:35:57 2008 @@ -12,11 +12,11 @@ int main() { { - __byref int O1; + __block int O1; int i; for (i = 1; i <= 5; i++) { - __byref int I1; + __block int I1; } if (count != 5) abort(); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-for1.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-escape-for1.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-for1.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-for1.C Mon Nov 3 02:35:57 2008 @@ -15,14 +15,14 @@ int main() { { - __byref int O1; + __block int O1; int i; int p; for (i = 1; i <= 5; i++) { - __byref int I1; + __block int I1; p = 0; while (p != 10) { - __byref int II1; + __block int II1; if (p == 2) break; ++p; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-goto.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-escape-goto.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-goto.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-goto.C Mon Nov 3 02:35:57 2008 @@ -4,13 +4,13 @@ int main(int p) { p = -5; - __byref int O1; + __block int O1; int i; LOUT: ; for (i = 1; i < 100; i++) { - __byref int I1; + __block int I1; while (p < 0) { - __byref int II1; + __block int II1; if (p == 100) goto LOUT; ++p; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-nested-while.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-escape-nested-while.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-nested-while.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-nested-while.C Mon Nov 3 02:35:57 2008 @@ -16,8 +16,8 @@ void objc_get_type_qualifiers (int flag, int type) { while (flag--) while (type++ < 4) { - __byref int W1; - __byref int W2; + __block int W1; + __block int W2; if (type == 2) break; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-return.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-escape-return.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-return.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-return.C Mon Nov 3 02:35:57 2008 @@ -16,9 +16,9 @@ int main1() { - __byref int X = 1234; + __block int X = 1234; if (X) { - __byref int local_BYREF = 100; + __block int local_BYREF = 100; X += 100 + local_BYREF; return count-2; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-return1.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-escape-return1.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-return1.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-return1.C Mon Nov 3 02:35:57 2008 @@ -17,9 +17,9 @@ void *_NSConcreteStackBlock; void FOO(int arg) { - __byref int X = 1234; + __block int X = 1234; if (arg) { - __byref int local_BYREF = 100; + __block int local_BYREF = 100; X += 100 + local_BYREF; return; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-switch.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-escape-switch.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-switch.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-switch.C Mon Nov 3 02:35:57 2008 @@ -15,34 +15,34 @@ } int foo(int p, int q) { - __byref int O1; + __block int O1; switch (p) { case 1: { - __byref int I1; + __block int I1; I1 += 1; break; } case 10: { - __byref int J1; + __block int J1; break; } default : { - __byref int D1; - __byref int D2; + __block int D1; + __block int D2; switch (q) { case 11: { - __byref int Q1; + __block int Q1; break; } default: { - __byref int ID1; - __byref int ID2; + __block int ID1; + __block int ID2; } }; break; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-while.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-escape-while.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-while.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-escape-while.C Mon Nov 3 02:35:57 2008 @@ -12,10 +12,10 @@ int main() { { - __byref int O1; + __block int O1; int i = 0; while (++i != 5) { - __byref int I1; + __block int I1; } if (count != 4) abort(); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-explicit-return-type.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-explicit-return-type.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-explicit-return-type.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-explicit-return-type.C Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file radar 6185344 */ +/* APPLE LOCAL file radar 6185344 - updated for radar 6230297 */ /* Test for blocks with explicit return type specified. */ /* { dg-options "-mmacosx-version-min=10.6 -ObjC++" { target *-*-darwin* } } */ /* { dg-do compile } */ @@ -75,9 +75,10 @@ int (^(^block)(double x))(char, short); void foo() { - block = ^(double x){ return ^int(char c, short y) { return c + y; };}; /* { dg-warning "returning block that lives on the local stack" } */ + int one = 1; + block = ^(double x){ return ^int(char c, short y) { return one + c + y; };}; /* { dg-warning "returning block that lives on the local stack" } */ // or: - block = ^(double x){ return ^(char c, short y) { return (int)c + y; };}; /* { dg-warning "returning block that lives on the local stack" } */ + block = ^(double x){ return ^(char c, short y) { return one + (int)c + y; };}; /* { dg-warning "returning block that lives on the local stack" } */ } Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-explicit-this.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-explicit-this.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-explicit-this.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-explicit-this.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,29 @@ +/* APPLE LOCAL file radar 6275956 */ +/* Use of explicit "this" inside a block. */ +/* { dg-options "-mmacosx-version-min=10.5" { target *-*-darwin* } } */ +/* { dg-do run } */ +extern "C" void abort (void); + +struct S { + + int ifield; + + int mem () + { + int (^p) (void) = ^ { return this->ifield; }; + if (p() != ifield) + abort (); + return 0; + } + S (int val) { ifield = val; } + +}; + +int main() +{ + S s(123); + + return s.mem(); +} + + Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-global-byref-2.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-global-byref-2.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-global-byref-2.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-global-byref-2.C Mon Nov 3 02:35:57 2008 @@ -1,5 +1,5 @@ /* APPLE LOCAL file radar 6014138 */ -/* Test use of __byref on locals which will be used as 'byref' variables in blocks. */ +/* Test use of __block on locals which will be used as 'byref' variables in blocks. */ /* { dg-do run } */ /* { dg-options "-mmacosx-version-min=10.5 -fblocks" { target *-*-darwin* } } */ @@ -14,9 +14,9 @@ int foo() { - __byref int local_byref_1 = 10; - __byref int local_byref_2 = 10; - __byref int local_byref_3 = 10; + __block int local_byref_1 = 10; + __block int local_byref_2 = 10; + __block int local_byref_3 = 10; CallBlock( ^ { ++local_byref_1; ++local_byref_2; ++local_byref_3; CallBlock(^ { ++local_byref_1; ++local_byref_2; ++local_byref_3; }); Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-in-foreach-header.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-in-foreach-header.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-in-foreach-header.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-in-foreach-header.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,57 @@ +/* APPLE LOCAL file radar 6268817 */ +/* Testing use of block literal expression in ObjC's enumeration foreach-statement loop header. */ +/* { dg-options "-mmacosx-version-min=10.6 -ObjC++ -framework Foundation" { target *-*-darwin* } } */ +/* { dg-do run } */ + +#import + + at interface TargetSymbol : NSObject { + NSString * _symbolName; +} + at property (copy) NSString *name; + at end + + at implementation TargetSymbol + at synthesize name = _symbolName; + at end + +static void Looper(NSArray *symbols) { + // 1. Block literal assigned to a block pointer, which is used in loop: build succeeds + NSComparator comparator = ^(id target1, id target2){return [((TargetSymbol *)target1).name compare:((TargetSymbol *)target2).name];}; + + for (id symbol in [symbols sortedArrayUsingComparator:comparator]) { + // Do something + } + + // 2. Block expression literal used, but still outside loop: build succeeds + NSArray *sortedSymbols = [symbols sortedArrayUsingComparator:^(id target1, id target2){return [((TargetSymbol *)target1).name compare:((TargetSymbol *)target2).name];}]; + + for (id symbol in sortedSymbols) { + // Do something + } + + // 3. Block expression literal used directly in loop: build fails + for (id symbol in [symbols sortedArrayUsingComparator:^(id target1, id target2){return [((TargetSymbol *)target1).name compare:((TargetSymbol *)target2).name];}]) { + // Do something + } + + // 3. Block expression literal used directly in loop: build fails + for (id symbol in [symbols sortedArrayUsingComparator:^(id target1, id target2){return [((TargetSymbol *)target1).name compare:((TargetSymbol *)target2).name];}]) { + // Do something + } + + // 3. Block expression literal used directly in loop: build fails + for (id symbol in [symbols sortedArrayUsingComparator:^(id target1, id target2){return [((TargetSymbol *)target1).name compare:((TargetSymbol *)target2).name];}]) { + // Do something + } +} + + +int main (int argc, const char * argv[]) { + NSAutoreleasePool * pool = [[NSAutoreleasePool alloc] init]; + + // insert code here... + NSLog(@"Hello, World!"); + [pool drain]; + return 0; +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-in_structors.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-in_structors.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-in_structors.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-in_structors.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,33 @@ +/* APPLE LOCAL file radar 6305545 */ +/* { dg-do run } */ +/* { dg-options "-mmacosx-version-min=10.5" { target *-*-darwin* } } */ + +extern "C" void abort(void); + +static int count = 100; +struct CParallelTest +{ + CParallelTest (void); + ~CParallelTest (void) { + void (^p1)() = ^ { count -= 3; }; + p1(); + } +}; + +CParallelTest::CParallelTest (void) +{ + void (^p1)() = ^ { count = 1; }; + int (^p2)() = ^ { return ++count; }; + int (^p3)() = ^ { return ++count; }; + p1(); p2(); p3(); +} + +int main() +{ + { + CParallelTest t1; + } + if (count != 0) + abort(); + return 0; +} Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-literal.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-literal.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-literal.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-literal.C Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file radar 5732232, 6034839 - blocks */ +/* APPLE LOCAL file radar 5732232, 6034839, 6230297 - blocks */ /* { dg-do compile } */ /* { dg-options "-fblocks" } */ @@ -25,7 +25,7 @@ noop = ^; /* { dg-error "expected" } */ - return ^{printf("\nBlock\n"); }; /* { dg-error "returning block that lives on the local stack" } */ + return ^{printf("\nBlock\n"); }; } void test2() { @@ -36,7 +36,8 @@ } void (^test3())(void) { - return ^{}; /* { dg-error "returning block that lives on the local stack" } */ + __block int i; + return ^{ i = 1; }; /* { dg-error "returning block that lives on the local stack" } */ } void test4() { Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-local-stack.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-local-stack.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-local-stack.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-local-stack.C Mon Nov 3 02:35:57 2008 @@ -1,8 +1,9 @@ -/* APPLE LOCAL file radar 5732232 - blocks */ +/* APPLE LOCAL file radar 5732232 - radar 6230297 - blocks */ /* { dg-do compile } */ /* { dg-options "-fblocks" } */ void (^test3())(void) { - return ^{}; /* { dg-error "returning block that lives on the local stack" } */ + __block int i; + return ^{i = 1; }; /* { dg-error "returning block that lives on the local stack" } */ } Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-localisglobal.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-localisglobal.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-localisglobal.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-localisglobal.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,42 @@ +/* APPLE LOCAL file radar 6230297 */ +/* { dg-options "-mmacosx-version-min=10.6" { target *-*-darwin* } } */ +/* { dg-do run } */ + +/* + * localisglobal.c + * testObjects + * + * Created by Blaine Garst on 9/29/08. + * Copyright 2008 __MyCompanyName__. All rights reserved. + * + * works in all configurations + * CONFIG + * rdar://6230297 + */ + +#include + +void (^global)(void) = ^{ printf("hello world\n"); }; + +int aresame(void *first, void *second) { + long *f = (long *)first; + long *s = (long *)second; + return *f == *s; +} +int main(int argc, char *argv[]) { + int i = 10; + void (^local)(void) = ^ { printf("hi %d\n", i); }; + void (^localisglobal)(void) = ^ { printf("hi\n"); }; + + if (aresame(local, localisglobal)) { + printf("local block could be global, but isn't\n"); + return 1; + } + if (!aresame(global, localisglobal)) { + printf("local block is not global, not stack, what is it??\n"); + return 1; + } + printf("%s: success\n", argv[0]); + return 0; + +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-nested-block-var.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-nested-block-var.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-nested-block-var.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-nested-block-var.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,32 @@ +/* APPLE LOCAL file radar 6225809 - radar 5847213 */ +/* __block var used in a nested block neeb be implicitly declared in + each intervening block. */ +/* { dg-options "-mmacosx-version-min=10.6 " { target *-*-darwin* } } */ +/* { dg-do run } */ + +#include + +static void Block_copy (void (^I)(void)) +{ + I(); +} + +int main(int argc, char *argv[]) { + __block int a = 42; + int save_a = a; // just to keep the address on the stack. + + void (^b)(void) = ^{ + Block_copy(^{ + a = 2; + }); + }; + + Block_copy(b); + + if(a == save_a) { + printf("**** __block heap storage should have been created at this point\n"); + return 1; + } + printf("%s: Success (old %d new %d)\n", argv[0], save_a, a); + return 0; +} Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-nested.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-nested.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-nested.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-nested.C Mon Nov 3 02:35:57 2008 @@ -22,12 +22,12 @@ } int main() { - __byref enum numbers x = one; - __byref enum numbers y = two; + __block enum numbers x = one; + __block enum numbers y = two; myblock CL = ^(enum numbers z) { enum numbers savex = x; - { __byref enum numbers x = savex; + { __block enum numbers x = savex; y = z; if (y != three) exit (6); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-noescape-helper-1.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-noescape-helper-1.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-noescape-helper-1.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-noescape-helper-1.C Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file radar 6083129 byref escapes */ /* Test for generation of escape _Block_byref_release call when a local - __byref variable is copied in. */ + __block variable is copied in. */ /* { dg-options "-fblocks" } */ /* { dg-do run } */ @@ -22,7 +22,7 @@ int test() { { - int __byref i = 10; + int __block i = 10; void (^dummy)(void) = ^{ printf("i = %d\n", i); }; junk(dummy); } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-noescape-helper-2.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-noescape-helper-2.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-noescape-helper-2.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-noescape-helper-2.C Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file radar 6083129 byref escapes */ /* Test for generation of escape _Block_byref_release call when a local - __byref variable is copied in and block has a return statement. */ + __block variable is copied in and block has a return statement. */ /* { dg-options "-fblocks" } */ /* { dg-do run } */ @@ -22,7 +22,7 @@ int test() { { - int __byref i = 10; + int __block i = 10; int (^dummy)(void) = ^{ printf("i = %d\n", i); return i; }; junk(dummy); } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-noescape-helper-3.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-noescape-helper-3.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-noescape-helper-3.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-noescape-helper-3.C Mon Nov 3 02:35:57 2008 @@ -1,5 +1,5 @@ /* APPLE LOCAL file radar 6083129 byref escapes */ -/* Test for generation of escape _Block_byref_release call when a __byref +/* Test for generation of escape _Block_byref_release call when a __block variable inside a block is declared and used. */ /* { dg-options "-fblocks" } */ /* { dg-do run } */ @@ -22,7 +22,7 @@ int test() { { - void (^dummy)(void) = ^{ int __byref i = 10; printf("i = %d\n", i); }; + void (^dummy)(void) = ^{ int __block i = 10; printf("i = %d\n", i); }; junk(dummy); } return count; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-noescape-helper.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-noescape-helper.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-noescape-helper.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-noescape-helper.C Mon Nov 3 02:35:57 2008 @@ -20,7 +20,7 @@ int test() { { - __byref int i = 10; + __block int i = 10; void (^dummy)(void) = ^{ ++i; }; junk(dummy); } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-nullblockisa.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-nullblockisa.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-nullblockisa.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-nullblockisa.C Mon Nov 3 02:35:57 2008 @@ -5,13 +5,9 @@ #include #include -#define HASISA 1 - void check(void *ptr) { struct inner { -#if HASISA void* isa; // should be zero -#endif long forwarding; int flags; int size; @@ -19,20 +15,30 @@ // long disposehelper not needed int i; // }; +/* APPLE LOCAL begin radar 5847213 - radar 6329245 */ struct block_with_blocki { - long isa; - int flags; - int size; - long impl; - long copyhelper; - long destroyhelper; - struct inner *blocki; + void *isa; // initialized to &_NSConcreteStackBlock or &_NSConcreteGlobalBlock + int Block_flags; + int reserved; + void (*Block_invoke)(void *); + + struct Block_descriptor_1 { + unsigned long int reserved; // NULL + unsigned long int size; // sizeof(struct Block_literal_1) + + // optional helper functions + void (*Block_copy)(void *dst, void *src); + void (*Block_dispose)(void *src); + } *descriptor; + struct inner *blocki; } *block = (struct block_with_blocki *)ptr; +/* APPLE LOCAL end radar 5847213 - radar 6329245 */ + // sanity checks - if (block->size != sizeof(struct block_with_blocki)) { + if (block->descriptor->size != sizeof(struct block_with_blocki)) { // layout funny printf("layout is funny, struct size is %d vs runtime size %ld\n", - block->size, + (int)block->descriptor->size, sizeof(struct block_with_blocki)); exit(1); } @@ -41,12 +47,10 @@ block->blocki->size); exit(1); } -#if HASISA if (block->blocki->isa != (void*)NULL) { printf("not a NULL __block isa\n"); exit(1); } -#endif return; } Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-objectassign.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-objectassign.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-objectassign.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-objectassign.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,79 @@ +/* APPLE LOCAL file radar 6175959 */ +/* Test for generation of two new APIs; _Block_object_assign and _Block_object_dispose */ +/* { dg-options "-mmacosx-version-min=10.6 -fblocks" { target *-*-darwin* } } */ +/* { dg-do run } */ + +#include + +#define BLOCK_HAS_DESCRIPTOR (1 << 29) +#define BLOCK_HAS_COPY_DISPOSE (1 << 25) + +struct Block_descriptor { + unsigned long int reserved; + unsigned long int size; + void (*copy)(void *dst, void *src); + void (*dispose)(void *); +}; + +struct Block_layout { + void *isa; + int flags; + int reserved; + void (*invoke)(void *, ...); + struct Block_descriptor *descriptor; + // imported variables +}; + +int AssignCalled = 0; +int DisposeCalled = 0; + +// local copy instead of libSystem.B.dylib copy +void _Block_object_assign(void *destAddr, const void *object, const int isWeak) { + printf("_Block_object_assign(%p, %p, %d) called\n", destAddr, object, isWeak); + AssignCalled = 1; +} + +void _Block_object_dispose(const void *object, const int isWeak) { + printf("_Block_object_dispose(%p, %d) called\n", object, isWeak); + DisposeCalled = 1; +} + +struct MyStruct { + long isa; + long field; +}; + +typedef struct MyStruct *__attribute__((NSObject)) MyStruct_t; + +int main(int argc, char *argv[]) { + // create a block + struct MyStruct X; + MyStruct_t xp = (MyStruct_t)&X; + xp->field = 10; + void (^myBlock)(void) = ^{ printf("field is %ld\n", xp->field); }; + // should be a copy helper generated with a calls to above routines + // Lets find out! + struct Block_layout *bl = (struct Block_layout *)(void *)myBlock; + if ((bl->flags & BLOCK_HAS_DESCRIPTOR) != BLOCK_HAS_DESCRIPTOR) { + printf("using old runtime layout!\n"); + return 1; + } + if ((bl->flags & BLOCK_HAS_COPY_DISPOSE) != BLOCK_HAS_COPY_DISPOSE) { + printf("no copy dispose!!!!\n"); + return 1; + } + // call helper routines directly. These will, in turn, we hope, call the stubs above + long destBuffer[256]; + printf("destbuffer is at %p, block at %p\n", destBuffer, (void *)bl); + bl->descriptor->copy(destBuffer, bl); + bl->descriptor->dispose(bl); + if (AssignCalled == 0) { + printf("did not call assign helper!\n"); + return 1; + } + if (DisposeCalled == 0) { + printf("did not call dispose helper\n"); + return 1; + } + return 0; +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-printf-attribute-1.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-printf-attribute-1.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-printf-attribute-1.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-printf-attribute-1.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,15 @@ +/* APPLE LOCAL file radar 6246527 */ +/* { dg-do compile } */ +/* { dg-options "-Wformat" } */ + +int main() +{ + void (^b) (int arg, const char * format, ...) __attribute__ ((__format__ (__printf__, 1, 3))) = /* { dg-error "format string argument not a string type" } */ + ^ __attribute__ ((__format__ (__printf__, 1, 3))) (int arg, const char * format, ...) {}; /* { dg-error "format string argument not a string type" } */ + void (^z) (int arg, const char * format, ...) __attribute__ ((__format__ (__printf__, 2, 3))) = ^ __attribute__ ((__format__ (__printf__, 2, 3))) (int arg, const char * format, ...) {}; + + z(1, "%s", 1); /* { dg-warning "format \\'\%s\\' expects type" } */ + z(1, "%s", "HELLO"); + +} + Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-readweakgc.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-readweakgc.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-readweakgc.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-readweakgc.C Mon Nov 3 02:35:57 2008 @@ -28,7 +28,7 @@ int main(char *argc, char *argv[]) { // an object should not be retained within a stack Block void (^local)(void); - __byref int i = 10; + __block int i = 10; Henry = ^ { ++i; }; local = Henry; if (GlobalInt2 == 1) { Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-readweakgcivar.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-readweakgcivar.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-readweakgcivar.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-readweakgcivar.C Mon Nov 3 02:35:57 2008 @@ -33,7 +33,7 @@ int main(char *argc, char *argv[]) { // an object should not be retained within a stack Block - __byref int i = 0; + __block int i = 0; void (^local)(void); Foo *foo = [[Foo alloc] init]; foo->ivar = ^ { ++i; }; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-reference-in-method.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-reference-in-method.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-reference-in-method.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-reference-in-method.C Mon Nov 3 02:35:57 2008 @@ -2,6 +2,7 @@ /* Test use of blocks in member functions. */ /* { dg-do run } */ /* { dg-options "-mmacosx-version-min=10.6 " { target *-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ #import #include Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-sentinel-attribute.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-sentinel-attribute.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-sentinel-attribute.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-sentinel-attribute.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,28 @@ +/* APPLE LOCAL file radar 6246527 */ +/* { dg-do compile } */ +/* { dg-options "-Wformat" } */ +#include + +void (^e) (int arg, const char * format, ...) __attribute__ ((__sentinel__ (1,1))); +void (^e1) (int arg, const char * format, ...) __attribute__ ((__sentinel__ (1,1, 3))); /* { dg-error "wrong number of arguments" "sentinel" } */ + +int main() +{ + void (^b) (int arg, const char * format, ...) __attribute__ ((__sentinel__)) = + ^ __attribute__ ((__sentinel__)) (int arg, const char * format, ...) {}; + void (^z) (int arg, const char * format, ...) __attribute__ ((__sentinel__ (2))) = ^ __attribute__ ((__sentinel__ (2))) (int arg, const char * format, ...) {}; + + + void (^y) (int arg, const char * format, ...) __attribute__ ((__sentinel__ (5))) = ^ __attribute__ ((__sentinel__ (5))) (int arg, const char * format, ...) {}; + + b(1, "%s", NULL); // OK + b(1, "%s", 0); /* { dg-warning "missing sentinel in function call" } */ + z(1, "%s",4 ,1,0); /* { dg-warning "missing sentinel in function call" } */ + z(1, "%s", NULL, 1, 0); // OK + + y(1, "%s", 1,2,3,4,5,6,7); /* { dg-warning "missing sentinel in function call" } */ + + y(1, "%s", NULL,3,4,5,6,7); // OK + +} + Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-unused-parameter.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-unused-parameter.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-unused-parameter.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-unused-parameter.C Mon Nov 3 02:35:57 2008 @@ -5,7 +5,7 @@ int main() { - __byref int i = 1; + __block int i = 1; ^ { i = 1; return i; }; return 0; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-unused-warn.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/block-unused-warn.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-unused-warn.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/block-unused-warn.C Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* { dg-options "-Wall" } */ int main() { - __byref int x = 10; + __block int x = 10; int y = 1; int (^myBlock)(void) = ^{ return x+y; }; Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/blocks-method-call.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/blocks-method-call.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/blocks-method-call.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/blocks-method-call.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,29 @@ +/* APPLE LOCAL file radar 6154598 */ +/* Test that methods may be called from within a block + declared inside a member function. */ +/* { dg-options "-mmacosx-version-min=10.5" { target *-*-darwin* } } */ +/* { dg-do run } */ + +extern "C" void abort(void); +struct SSSSSS +{ + void Index( void ) { if (_version != 2) abort(); } + void func(void); + int _version; + SSSSSS() { _version = 2; } +}; + +void SSSSSS::func(void) +{ + void (^X)(void) = ^(void) { Index(); }; + X(); +} + +int main() +{ + SSSSSS s1; + s1.func(); + return 0; +} + + Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/blocks-recovercpp.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/blocks-recovercpp.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/blocks-recovercpp.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/blocks-recovercpp.C Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file radar 6214617 */ +/* APPLE LOCAL file radar 6214617 - modified for radar 5847213 */ /* { dg-options "-mmacosx-version-min=10.5 -ObjC++" { target *-*-darwin* } } */ /* { dg-do run } */ @@ -57,16 +57,24 @@ } void hack(void *block) { + /* APPLE LOCAL begin radar 6329245 */ // check flags to see if constructor/destructor is available; struct myblock { void *isa; int flags; - int refcount; - void *invokeptr; - void (*copyhelper)(struct myblock *dst, struct myblock *src); - void (*disposehelper)(struct myblock *src); + int reserved; + void (*Block_invoke)(void *); + struct Block_descriptor_1 { + unsigned long int reserved; // NULL + unsigned long int Block_size; // sizeof(struct Block_literal_1) + + // optional helper functions + void (*copyhelper)(void *dst, void *src); + void (*disposehelper)(void *src); + } *descriptor; long space[32]; } myversion, *mbp = (struct myblock *)block; + /* APPLE LOCAL end radar 6329245 */ printf("flags -> %x\n", mbp->flags); if (! ((1<<25) & mbp->flags)) { printf("no copy/dispose helper functions provided!\n"); @@ -76,16 +84,16 @@ printf("no marking for ctor/dtors present!\n"); exit(1); } - printf("copyhelper -> %p\n", mbp->copyhelper); + printf("copyhelper -> %p\n", mbp->descriptor->copyhelper); // simulate copy - mbp->copyhelper(&myversion, mbp); + mbp->descriptor->copyhelper(&myversion, mbp); if (constructors != 3) { printf("copy helper didn't do the constructor part\n"); exit(1); } - printf("disposehelper -> %p\n", mbp->disposehelper); + printf("disposehelper -> %p\n", mbp->descriptor->disposehelper); // simulate destroy - mbp->disposehelper(&myversion); + mbp->descriptor->disposehelper(&myversion); if (destructors != 1) { printf("dispose helper didn't do the dispose\n"); exit(1); Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/cp-block-byref-2.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/cp-block-byref-2.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/cp-block-byref-2.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/cp-block-byref-2.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,34 @@ +/* APPLE LOCAL file radar 6237086 */ +/* { dg-do compile } */ +/* { dg-options "-g -O0 -dA -mmacosx-version-min=10.6" }*/ +/* { dg-final { scan-assembler "DW_OP_fbreg+\[ \t\n]+\[ \t]\\.byte+\[ \t]0x\[0-9a-f]+\[ \t]+\[#;@]\[ \t]sleb128 -\[0-9]+\[ \t\n]+\[ \t]\\.byte+\[ \t]0x6+\[ \t]+\[#;@]\[ \t]DW_OP_deref+\[ \t\n]+\[ \t]\\.byte+\[ \t]\[0x6;0x23]+\[ \t]+\[#;@]\[ \t]\[DW_OP_deref;DW_OP_plus_uconst]" } } */ + +#include + +int +main () +{ + int val_1, val_2; + + int (^my_block) (int); + + if (1) + { + __block int use_by_ref = 1; + int use_by_value = 0xfefefefe; + + my_block = ^ (int in_value) { + use_by_ref++; + printf ("Block function has: %d %d %d.\n", in_value, use_by_value, use_by_ref); + return in_value + use_by_ref + use_by_value; + }; + use_by_ref++; + val_1 = my_block (10); + } + + val_1 = my_block (20); + val_2 = my_block (30); + printf ("Got: %d and %d.\n", val_1, val_2); + + return 0; +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/debug-inlined-section.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/debug-inlined-section.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/debug-inlined-section.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/debug-inlined-section.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,53 @@ +/* APPLE LOCAL file, Radar 6275985 */ +/* { dg-do compile { target *-*-darwin* } } */ +/* { dg-options "-O1 -gdwarf-2 -dA" } */ +/* { dg-final { scan-assembler "__debug_inlined" } } */ +/* { dg-final { scan-assembler "\[#;@]+\[ \t]+MIPS linkage name: \"_ZNK1UcvPKcEv\"" } } */ +/* { dg-final { scan-assembler "\[#;@]+\[ \t]+Function name: \"operator const char" } } */ +/* { dg-final { scan-assembler "\[#;@]+\[ \t]+MIPS linkage name: \"operator" } } */ + +struct S +{ + virtual ~S(); + S (const char *str); + S& operator= (const char *str); + operator const char *() const; + S& operator+= (const char *str); +}; +inline S operator+ (const char *s1, const S &s2) +{ + S x (s1); + x += s2; + return x; +} +struct U +{ + U (); + U& operator= (const char *); + const char *foo() const; + operator const char *() const { return foo(); } +}; +template struct V +{ + T v; +}; +template struct W +{ + V *w; + W() : w (0) {} + const T& operator* () const { return w->v; } + T& operator* () { return w->v; } +}; +struct X { + X(); +}; +struct Y { + Y (const U &u); +}; +X::X() +{ + W a; + U b; + b = (*a) + "xx"; + Y c (b); +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/eh1.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/eh1.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/eh1.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/eh1.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,14 @@ +/* APPLE LOCAL file EH __TEXT __gcc_except_tab 5819051 */ +/* { dg-do compile { target *-*-darwin* } } */ +/* { dg-final { scan-assembler "section __TEXT,__gcc_except_tab" } } */ +/* Radar 5819051 */ + +#include + +void foo() { + try { + throw 1; + } catch (int i) { + printf("Hi\n"); + } +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/kext-weak.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/kext-weak.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/kext-weak.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/kext-weak.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,9 @@ +/* APPLE LOCAL kext weak_import 5935650 */ +/* { dg-do assemble { target i?86*-*-darwin* } } */ +/* { dg-options "-mkernel -dynamic -m64" } */ + +extern void foo() __attribute__((weak_import)); +void test() { + if (foo) + foo(); +} Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/lookup-1.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/lookup-1.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/lookup-1.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/lookup-1.C Mon Nov 3 02:35:57 2008 @@ -7,7 +7,7 @@ void A::foo(const char* basename) { class B { friend class C; - static void WaitForSinks(C:: /* { dg-error "has not been declared" } */ - D* data); /* { dg-error "expected" } */ + static void WaitForSinks(C:: /* { dg-error "has not been declared" } */ + D* data); /* { dg-error "expected" } */ }; } Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/prototype.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/prototype.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/prototype.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/prototype.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,55 @@ +/* APPLE LOCAL file warn missing prototype 6261539 */ +/* Radar 6261539 */ +/* { dg-options "-Wmissing-prototypes" } */ +void foo() { } /* { dg-warning "no previous prototype" } */ +void foo(int i) { } /* { dg-warning "no previous prototype" } */ +void bar(); +void bar() { } +void bar1(); +void bar1(int i); +void bar1(int i) { } +void bar1(float) { } /* { dg-warning "no previous prototype" } */ +extern "C" void bar1(char); +extern "C" void bar1(char) { } /* { dg-error "previous declaration" } */ +extern "C" void bar1(short); /* { dg-error "conflicts with" } */ +extern "C" void bar1(short) { } +extern "C" void bar2(char); +extern "C" void bar2(char) { } /* { dg-error "previous declaration" } */ +extern "C" void bar2(short) { } /* { dg-error "conflicts with" } */ +extern "C" void bar3(char); +extern "C" void bar3(char) { } /* { dg-error "previous declaration" } */ +extern "C" void bar3(short) { } /* { dg-error "conflicts with" } */ +struct beef { }; +void beef() { } /* { dg-warning "no previous prototype" } */ +void dead(); +namespace { + void dead() { } +} +void dead4(); +namespace A { + void dead4() { } /* { dg-warning "no previous prototype" } */ +} +void dead1(); +namespace A { + void dead1(int); + void dead1() { } /* { dg-warning "no previous prototype" } */ +} +void dead2(); /* { dg-error "old declaration" } */ +int dead2() { } /* { dg-error "new declaration" } */ +struct undef; +undef meat; /* { dg-error "incomplete type and cannot be defined" } */ +double meat() { } +static void local() { } +int main() { } +void exit(float); +void exit(int e) { a: goto a; } /* { dg-warning "no previous prototype" } */ +void dead3(float); +int dead3(int); /* { dg-error "old declaration" } */ +void dead3(int e) { a: goto a; }/* { dg-error "new declaration" } */ +class A { + void m(); +}; +void A::m() { } +namespace { + void m() { } +}; Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/template.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/template.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/template.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/template.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,31 @@ +/* APPLE LOCAL file templated static data 6298605 */ +/* Radar 6298605 */ + +namespace { + template + struct ElfSizes { + static const int sym_size = 5; + static const int ehdr_size = 5; + }; + + template + struct SizedElfFileData { + SizedElfFileData(); + + virtual void ReadSymbols(); + }; + + template + SizedElfFileData::SizedElfFileData() { + ElfSizes::ehdr_size; + } + + template + void SizedElfFileData::ReadSymbols() { + ElfSizes::sym_size; + } + + void Open() { + SizedElfFileData<32> foo = SizedElfFileData<32>(); + } +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/warn-ctors.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.apple/warn-ctors.C?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/warn-ctors.C (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.apple/warn-ctors.C Mon Nov 3 02:35:57 2008 @@ -0,0 +1,22 @@ +/* APPLE LOCAL file Wglobal-constructors 6324584 */ +/* { dg-options "-Wglobal-constructors" } */ +/* Radar 6324584 */ + +volatile int i; + +class A { +public: + A() { i = 1; } +} a; /* { dg-warning "requires global construction" } */ + +class B { +public: + ~B() { i = 1; } +} b; /* { dg-warning "requires global destruction" } */ + +void ctor() __attribute__((constructor)); +void ctor() { /* { dg-warning "requires global construction" } */ +} +void dtor() __attribute__((destructor)); +void dtor() { /* { dg-warning "requires global destruction" } */ +} Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.dg/apple-longcall-2.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.dg/apple-longcall-2.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.dg/apple-longcall-2.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.dg/apple-longcall-2.C Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file 4299630 */ /* { dg-do compile { target powerpc*-*-darwin* } } */ -/* { dg-skip-if "Not valid on 64-bit" { powerpc*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-mlongcall" } */ /* { dg-final { scan-assembler "\tjmp[ ]" } } */ /* Radar 4299630: insure C++ thunks get long jmps. */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.dg/apple-longcall-3.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.dg/apple-longcall-3.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.dg/apple-longcall-3.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.dg/apple-longcall-3.C Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file 4380289 */ /* { dg-do compile { target powerpc*-*-darwin* } } */ -/* { dg-skip-if "Not valid on 64-bit" { powerpc*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-mlongcall -mkernel" } */ /* { dg-final { scan-assembler "\tjmp" } } */ /* { dg-final { scan-assembler "\tjbsr" } } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.dg/kext4.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.dg/kext4.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.dg/kext4.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.dg/kext4.C Mon Nov 3 02:35:57 2008 @@ -1,7 +1,7 @@ /* APPLE LOCAL file KEXT double destructor */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-options "-fapple-kext" } */ -/* { dg-skip-if "Not valid on 64-bit" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* test for use of apple_kext_compatibility on stack */ struct B1 { virtual ~B1(); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/g++.dg/kext7.C URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/g%2B%2B.dg/kext7.C?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/g++.dg/kext7.C (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/g++.dg/kext7.C Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* Radar 3943783 kernel extensions built with gcc-4.0 can't be loaded */ /* { dg-do compile { target powerpc*-*-darwin* } } */ /* { dg-options "-S -fapple-kext" } */ -/* { dg-skip-if "Not valid on 64-bit" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ struct Base { virtual ~Base(); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4104248.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4104248.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4104248.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4104248.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file 4104248 */ /* { dg-do compile { target "i?86*-*-darwin*" } } */ -/* { dg-skip-if "" { i?86*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-Os" } */ register char foo asm("edi"); char x; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4113078.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4113078.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4113078.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4113078.c Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* Check that stack alignment is correct when callee inlined function uses a vector and caller does not. */ /* { dg-do compile { target i?86-*-darwin* } } */ -/* { dg-skip-if "" { i?86-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -msse3 -march=pentium4 -march=prescott" } */ #include extern void bar(__m128i*); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4115609.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4115609.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4115609.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4115609.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file 4115609 */ /* { dg-do compile { target i?86-*-darwin* } } */ -/* { dg-skip-if "" { i?86-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-O3 -mdynamic-no-pic -fomit-frame-pointer" } */ /* { dg-final { scan-assembler-times "movl\t*" 55} } */ /* { dg-final { scan-assembler-not "sall" } } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4167459.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4167459.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4167459.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4167459.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL begin radar 4167459 */ /* { dg-do compile { target i?86-*-darwin* } } */ -/* { dg-skip-if "" { i?86-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-O -march=pentium4" } */ extern double foo(double); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4182984.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4182984.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4182984.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4182984.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file 4182984 */ /* { dg-do run { target i?86-*-darwin* } } */ -/* { dg-skip-if "" { i?86-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-O3" } */ typedef unsigned int UINT; typedef unsigned long UINT32; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4525731-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4525731-1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4525731-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4525731-1.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file 4525731 */ /* { dg-do run { target i?86-*-* } } */ -/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-O3" } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4525731-2.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4525731-2.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4525731-2.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4525731-2.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file 4525731 */ /* { dg-do compile { target i?86-*-* } } */ -/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-O3" } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4603883.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4603883.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4603883.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4603883.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file radar 4603883 */ /* { dg-do compile } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ double param[10][10][5000000]; /* { dg-error "size of array 'param' is too large" } */ void foo () { Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/5813921.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/5813921.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/5813921.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/5813921.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,18 @@ +/* APPLE LOCAL file 5813921 */ +/* { dg-do compile { target powerpc-*-* i?86-*-* x86_64-*-* } } */ +/* { dg-options { -Os } } */ +/* { dg-final { scan-assembler "cntlzw" { target powerpc-*-* } } } */ +/* { dg-final { scan-assembler "bsr" { target i?86-*-* x86_64-*-* } } } */ +typedef long unsigned int __darwin_size_t; +typedef __darwin_size_t size_t; +typedef enum RoundingMode { + kRoundTowardNearestEven = 1, kRoundTowardZero = 2, kRoundTowardInf = 4, + kRoundTowardMinusInf = 8, + kRoundAll = kRoundTowardNearestEven | kRoundTowardZero | kRoundTowardInf + | kRoundTowardMinusInf } RoundingMode; +extern const int roundingModes[4]; +void SetRoundingMode( RoundingMode mode ) { + long m = mode; + size_t r = (8*sizeof(long)-1) - __builtin_clzl( m ); + fesetround( roundingModes[ r ] ); +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/5919583.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/5919583.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/5919583.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/5919583.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,41 @@ +/* APPLE LOCAL file 5919583 */ +/* { dg-do run { target i?86*-*-* } } */ +/* { dg-options { -msse3 } } */ +#include +#include + +typedef union { + char ary[16]; + __m128i vec; +} vectype; + +vectype ref; + +int __attribute__ ((__noinline__)) scare (vectype); +int __attribute__ ((__noinline__)) +scare (vectype vec) +{ + int i; + for (i=0; i<16; i++) + if (vec.ary[i] != ref.ary[i]) + return -1; /* fail */ + return 0; /* pass */ +} + +int main( void ) +{ + vectype v; + + ref.vec = (const __m128i) { 0x32100123456789ABULL, 0xFEDCBA987654ULL }; + v.vec = _mm_srli_si128( (const __m128i) { 0x0123456789ABCDEFULL, 0xFEDCBA9876543210ULL }, 2 ); + /* + { + int i; + for( i = 0; i < 16; i++ ) + printf( "%2.2x", ((unsigned char*) &v)[i] ); + } + printf ("scare = %d\n", scare(v)); + */ + + return scare (v); +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6187262.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6187262.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6187262.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6187262.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,14 @@ +/* APPLE LOCAL file 6187262 */ +/* { dg-do compile { target { i?86-*-darwin* x86_64-*-darwin* } } } */ +/* { dg-options { -O1 } } */ +typedef long long __m64 __attribute__ ((__vector_size__ (8), __may_alias__)); +int main() +{ + __m64 mm6; + int i; + for(i=0; i<1e7; ++i) + { + mm6 = (__m64)(unsigned long long)i; + mm6 = __builtin_ia32_pand(mm6, mm6); + } +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6222167.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6222167.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6222167.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6222167.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,21 @@ +/* { dg-do compile { target i?86-apple-darwin* x86_64-apple-darwin* } } */ +/* { dg-options "-msse4.1" } */ +/* { dg-final { scan-assembler "pmaxsd" } } */ +/* { dg-final { scan-assembler "pminsd" } } */ +#include +#include "smmintrin.h" +typedef int int4 __attribute__ ((vector_size(16))); + +int main( void ) +{ + volatile int4 a = (int4) { 0, 1, 2, 3}; + volatile int4 b = (int4) { 2, 2, 2, 2}; + + int4 max = __builtin_ia32_pmaxsd128( a, b ); + int4 min = __builtin_ia32_pminsd128( a, b ); + + printf( "max: { %d, %d %d, %d}\n", ((int*) &max)[0], ((int*) &max)[1], ((int*) &max)[2], ((int*) &max)[3] ); + printf( "min: { %d, %d %d, %d}\n", ((int*) &min)[0], ((int*) &min)[1], ((int*) &min)[2], ((int*) &min)[3] ); + + return 0; +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6227434.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6227434.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6227434.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6227434.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,12 @@ +/* APPLE LOCAL file 6227434 */ +/* { dg-do compile { target i?86-apple-darwin* x86_64-apple-darwin* } } */ +/* { dg-options { -mfix-and-continue } } */ +/* { dg-require-effective-target lp64 } */ +/* { scan-assembler-not "_count\[12\]-" } */ +static unsigned count1 = 0; +extern unsigned count2; + +void t(void) { + count1 = 1; + count2 = 2; +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6258941.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6258941.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6258941.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6258941.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,9 @@ +/* APPLE LOCAL file 6258941 */ +/* { dg-do compile { target powerpc*-apple-darwin* } } */ +/* { dg-options { -mtune=G4 } } */ +extern void malloc_printf(const char *format, ...); +void auto_fatal(const char *format, ...) { + static char buffer[512]; + malloc_printf("%s", buffer); + __builtin_trap(); +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6286881.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6286881.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6286881.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6286881.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,9 @@ +/* APPLE LOCAL file radar 6286881 */ +/* Check for incorrect expression does not result in compiler looping; instead of diagnostic. */ +/* { dg-do compile } */ +unsigned int +func_48 (signed char p_49) +{ + signed char l_340; + func_44 (&((1 ^ 1 == (lshift_u_s (1)) != (l_340 < 1)) & 1L)); /* { dg-error "lvalue required as unary" } */ +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6308664.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6308664.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6308664.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6308664.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,11 @@ +/* APPLE LOCAL file 6308664 */ +/* { dg-do compile { target i?86-*-darwin* x86_64-*-darwin* } } */ +/* { dg-options { -m64 } } */ +/* { dg-final { scan-assembler-not "GOTPCREL" } } */ +extern void doit(double x); + +void test() +{ + doit(16.0); + doit(32.0); +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6310728.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6310728.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6310728.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/6310728.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,62 @@ +/* APPLE LOCAL file 6310728 */ +/* { dg-do compile } */ +/* { dg-options { -mfix-and-continue -m64 } } */ +typedef int int32_t; +typedef int32_t SINT32 ; +void RowCol8x8( SINT32 *in8x8, SINT32 *out8x8, SINT32 acqfact, SINT32 intraFlag, float *i2f9808div2, float *i2f9239div2, float *i2f7071div2, char *qAC) { + SINT32 k; + float tmpout[64]; + SINT32 *ptrL; + float *ptrF; + SINT32 tmpL0,tmpL1,tmpL2,tmpL3,tmpL4,tmpL5,tmpL6,tmpL7,tmpL8,tmpL9; + float kess7071div2 = 0.3535533905932737; + float kess9808div2 = 0.4903926402016152; + float kess8315div2 = 0.4157348061512726; + float kess5556div2 = 0.2777851165098011; + float kess1951div2 = 0.09754516100806417; + float kess9239div2 = 0.4619397662556434; + float kess3827div2 = 0.1913417161825449; + float tmp0,tmp1,tmp2,tmp3,tmp4,tmp5,tmp6,tmp7,tmp8,tmp9; + for (ptrL=in8x8,ptrF=tmpout,k=0; + k<8; + k++,ptrF++,ptrL++) { + tmp1 = ptrF[0]; + tmp2 = ptrF[56]; + tmp4 = ptrF[48]; + if (intraFlag && k == 0) { + tmp5 = 0.5 + tmp5*0.125; + } + tmpL1 = tmp5; + tmpL2 = tmp7 - kess7071div2*tmp8; + tmp7 = kess9239div2*tmp0; + tmpL4 = tmp7 + kess3827div2*tmp1; + tmp8 = kess3827div2*tmp0; + tmpL7 = tmp8 - kess9239div2*tmp1; + tmp5 = kess9808div2*tmp9; + tmp5 += kess8315div2*tmp2; + tmp5 += kess5556div2*tmp4; + tmpL3 = tmp5 + kess1951div2*tmp6; + tmp8 += kess8315div2*tmp4; + tmpL8 = tmp8 - kess9808div2*tmp6; + if (!(intraFlag && k == 0)) { + if (!( acqfact <= 7 )) { + ptrL[0] = (SINT32) qAC[(tmpL1)]; + } + else ptrL[0] = tmpL1; + } + if (!( acqfact <= 7 )) { + ptrL[16] = (SINT32) qAC[(tmpL4)]; + ptrL[24] = (SINT32) qAC[(tmpL5)]; + ptrL[40] = (SINT32) qAC[(tmpL6)]; + ptrL[48] = (SINT32) qAC[(tmpL7)]; + ptrL[56] = (SINT32) qAC[(tmpL8)]; + } + else { + ptrL[32] = tmpL2; + ptrL[8] = tmpL3; + ptrL[16] = tmpL4; + ptrL[48] = tmpL7; + ptrL[56] = tmpL8; + } + } +} Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/align-test-5b.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/align-test-5b.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/align-test-5b.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/align-test-5b.c Mon Nov 3 02:35:57 2008 @@ -5,7 +5,7 @@ /* { dg-options "-malign-power -DSIZE=12" } */ /* We have a different test to pick up the warning from 64-bit case. */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* * GCC alignment test for command line options for setting alignment modes. Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/align-test-5d.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/align-test-5d.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/align-test-5d.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/align-test-5d.c Mon Nov 3 02:35:57 2008 @@ -5,7 +5,7 @@ /* { dg-options "-malign-natural -DSIZE=12" } */ /* This is for Intel only. */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* * GCC alignment test for command line options for setting alignment modes. Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-13.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-13.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-13.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-13.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do assemble { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 } } */ /* Radar 4259442 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-17.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-17.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-17.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-17.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do assemble { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 -O2 } } */ /* Radar */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-18.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-18.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-18.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-18.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do assemble { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 -O2 } } */ /* Radar 4248228 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-24.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-24.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-24.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-24.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do assemble { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 } } */ /* Radar 4300095 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-25.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-25.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-25.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-25.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do assemble { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 } } */ /* Radar 4309942 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-31.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-31.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-31.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-31.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do assemble { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 -mdynamic-no-pic } } */ /* Radar 4319881 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-32.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-32.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-32.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-32.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do assemble { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 } } */ /* Radar 4319887 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-33.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-33.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-33.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-33.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do assemble { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 } } */ /* Radar 4300193 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-35.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-35.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-35.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-35.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do assemble { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 -mdynamic-no-pic } } */ /* Radar 4371551 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-36.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-36.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-36.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-36.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do assemble { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 } } */ /* Radar 4371958 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-41.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-41.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-41.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-41.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do assemble { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 } } */ /* Radar 4429851 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-45.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-45.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-45.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-45.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do assemble { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 } } */ /* Radar 4419735 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-50.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-50.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-50.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-50.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do assemble { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 } } */ /* Radar 4505741 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-54.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-54.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-54.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-54.c Mon Nov 3 02:35:57 2008 @@ -1,5 +1,5 @@ /* { dg-do compile { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 } } */ /* { dg-final { scan-assembler "movq -\(16|36\)\\\(%ebp\\\), %mm0" } } */ /* Radar 4515069 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-55.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-55.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-55.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-55.c Mon Nov 3 02:35:57 2008 @@ -1,5 +1,5 @@ /* { dg-do compile { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 -mdynamic-no-pic } } */ /* { dg-final { scan-assembler "movq _packedw1.*, %mm0" } } */ /* Radar 4515069 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-57.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-57.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-57.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-57.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do run { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { i?86*-*-darwin* } { "-m64" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { -fasm-blocks -msse3 } } */ /* Radar 4682427 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-6.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-6.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-6.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-6.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do assemble { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { "-fasm-blocks" } } */ /* Radar 4211978 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-7.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-7.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-7.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-block-7.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file CW asm blocks */ /* { dg-do assemble { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options { "-fasm-blocks" } } */ /* Radar 4214021 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-test-nofralloc.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-test-nofralloc.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-test-nofralloc.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/asm-test-nofralloc.c Mon Nov 3 02:35:57 2008 @@ -1,7 +1,7 @@ /* APPLE LOCAL begin radar 4187164 */ /* { dg-do run { target powerpc*-*-darwin* } } */ /* This testcase isn't 64-bit safe. */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-fasm-blocks" } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-5992047.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-5992047.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-5992047.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-5992047.c Mon Nov 3 02:35:57 2008 @@ -1,11 +1,11 @@ -/* APPLE LOCAL file radar 5992047 */ +/* APPLE LOCAL file radar 5992047 - radar 6175959 */ /* Check that with a previous declaration of _Block_destroy, test case compiles with no error or ICE. */ /* { dg-options "-fblocks" } */ /* { dg-do compile { target *-*-darwin* } } */ #define Block_destroy(xxx) _Block_destroy((const void *)(xxx)) -void _Block_destroy(const void *aBlock); +void _Block_destroy(const void *aBlock, int isWeak); typedef struct dispatch_item_s *dispatch_item_t; typedef void (^completion_block_t)(void); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-6116917.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-6116917.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-6116917.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-6116917.c Mon Nov 3 02:35:57 2008 @@ -7,16 +7,25 @@ #include //#include +/* APPLE LOCAL begin radar 5847213 - radar 6329245 */ struct Block_basic { - void *isa; - int Block_flags; // int32_t - int Block_size; // XXX should be packed into Block_flags + void *isa; // initialized to &_NSConcreteStackBlock or &_NSConcreteGlobalBlock + int Block_flags; + int reserved; void (*Block_invoke)(void *); - void (*Block_copy)(void *dst, void *src); - void (*Block_dispose)(void *); - //long params[0]; // generic space for const & byref hidden params, return value, variable on needs of course -}; + struct Block_descriptor_1 { + unsigned long int reserved; // NULL + unsigned long int Block_size; // sizeof(struct Block_literal_1) + + // optional helper functions + void (*Block_copy)(void *dst, void *src); + void (*Block_dispose)(void *src); + } *descriptor; + + // imported variables +}; +/* APPLE LOCAL end radar 5847213 - radar 6329245 */ void func(void (^b)(void)) @@ -51,6 +60,7 @@ bb = (void *)stage1; + /* APPLE LOCAL radar 5847213 - radar 6329245 */ bbi_addr = (long)bb->Block_invoke; bb_addr = (long)bb; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assigngcglobal.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assigngcglobal.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assigngcglobal.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assigngcglobal.c Mon Nov 3 02:35:57 2008 @@ -28,8 +28,8 @@ int main(char *argc, char *argv[]) { - int i = 0; + __block int i = 0; // assigning a Block into a global should elicit a global write-barrier under GC - GlobalVoidVoid = ^ { | i | ++i; }; /* { dg-warning "has been deprecated in blocks" } */ + GlobalVoidVoid = ^ { ++i; }; return GlobalInt - 1; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assigngcivar.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assigngcivar.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assigngcivar.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assigngcivar.c Mon Nov 3 02:35:57 2008 @@ -45,10 +45,10 @@ int main(char *argc, char *argv[]) { - int i = 0; + __block int i = 0; TestObject *to = [[TestObject alloc] init]; // assigning a Block into an ivar should elicit a write-barrier under GC - to->ivarBlock = ^ { | i | ++i; }; // fails to gen write-barrier /* { dg-warning "has been deprecated in blocks" } */ + to->ivarBlock = ^ { ++i; }; // fails to gen write-barrier //to->x = to; // gens write-barrier return GlobalInt - 1; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assigngcstrongcast.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assigngcstrongcast.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assigngcstrongcast.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assigngcstrongcast.c Mon Nov 3 02:35:57 2008 @@ -35,8 +35,8 @@ int main(char *argc, char *argv[]) { StructWithBlock_t *swbp = (StructWithBlock_t *)malloc(sizeof(StructWithBlock_t*)); - int i = 10; + __block int i = 10; // assigning a Block into an struct slot should elicit a write-barrier under GC - swbp->ivarBlock = ^ { | i | ++i; }; /* { dg-warning "has been deprecated in blocks" } */ + swbp->ivarBlock = ^ { ++i; }; return GlobalInt - 1; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assignweakgc-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assignweakgc-1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assignweakgc-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assignweakgc-1.c Mon Nov 3 02:35:57 2008 @@ -25,9 +25,9 @@ int main(char *argc, char *argv[]) { // an object should not be retained within a stack Block - int i = 0; + __block int i = 0; void (^local)(void); - Henry = ^ { | i | ++i; return &i; }; /* { dg-warning "has been deprecated in blocks" } */ + Henry = ^ { ++i; return &i; }; if (GlobalInt == 1) { printf("%s: success\n", argv[0]); exit(0); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assignweakgc.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assignweakgc.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assignweakgc.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assignweakgc.c Mon Nov 3 02:35:57 2008 @@ -25,9 +25,9 @@ int main(char *argc, char *argv[]) { // an object should not be retained within a stack Block - int i = 0; + __block int i = 0; void (^local)(void); - Henry = ^ { | i | ++i; }; /* { dg-warning "has been deprecated in blocks" } */ + Henry = ^ { ++i; }; if (GlobalInt == 1) { printf("%s: success\n", argv[0]); exit(0); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assignweakgcivar.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assignweakgcivar.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assignweakgcivar.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-assignweakgcivar.c Mon Nov 3 02:35:57 2008 @@ -33,10 +33,10 @@ int main(char *argc, char *argv[]) { // an object should not be retained within a stack Block - int i = 0; + __block int i = 0; void (^local)(void); Foo *foo = [[Foo alloc] init]; - foo->ivar = ^ { | i | ++i; }; /* { dg-warning "has been deprecated in blocks" } */ + foo->ivar = ^ { ++i; }; if (GlobalInt == 1) { printf("%s: success\n", argv[0]); exit(0); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-attributes-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-attributes-1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-attributes-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-attributes-1.c Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file radar 6237713 */ +/* APPLE LOCAL file radar 6237713 - modified for radar 6230297 */ /* Test for using attributes on blocks. */ /* { dg-options "-mmacosx-version-min=10.5 -fblocks" { target *-*-darwin* } } */ /* { dg-do compile } */ @@ -11,10 +11,10 @@ { void (^a)(void) __attribute__((noreturn)) = ^ (void) __attribute__((noreturn)) { exit (0); }; // OK; - ^ (int i) __attribute__((noreturn)) { return i; }; /* { dg-warning "function declared \\'noreturn\\' has a \\'return\\' statement" } */ + int (^b)(int) __attribute__((noreturn)) = ^ (int i) __attribute__((noreturn)) { return i; }; /* { dg-warning "function declared \\'noreturn\\' has a \\'return\\' statement" } */ /* { dg-warning "\\'noreturn\\' function does return" "" { target *-*-* } 14 } */ - ^ __attribute__((noreturn)) { return 100; }; /* { dg-warning "function declared \\'noreturn\\' has a \\'return\\' statement" } */ + int (^c)(void) __attribute__((noreturn)) = ^ __attribute__((noreturn)) { return 100; }; /* { dg-warning "function declared \\'noreturn\\' has a \\'return\\' statement" } */ /* { dg-warning "\\'noreturn\\' function does return" "" { target *-*-* } 17 } */ a = ^ (void) __attribute__((noreturn)) { exit (0); }; // OK Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-block-property-2.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-block-property-2.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-block-property-2.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-block-property-2.c Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file radar 5831920 */ +/* APPLE LOCAL file radar 5831920 - modified for radar 6255671 */ #import /* Test a property with block type. */ /* { dg-do run } */ @@ -12,8 +12,8 @@ int (^getIntRetain)(void); } - at property int (^getIntCopy)(void); - at property int (^getIntRetain)(void); + at property (assign) int (^getIntCopy)(void); + at property (assign) int (^getIntRetain)(void); @end @implementation TestObject @@ -31,9 +31,9 @@ int main(char *argc, char *argv[]) { int count; - int val = 0; + __block int val = 0; TestObject *to = [[TestObject alloc] init]; - to.getIntRetain = ^ { | val| printf("\n Hello(%d)\n", val); return ++val; }; /* { dg-warning "has been deprecated in blocks" } */ + to.getIntRetain = ^ { printf("\n Hello(%d)\n", val); return ++val; }; to.getIntCopy = to.getIntRetain; count = DoBlock (to.getIntCopy); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-1.c Mon Nov 3 02:35:57 2008 @@ -2,14 +2,14 @@ /* { dg-options "-fblocks" } */ /* { dg-do compile } */ -__byref int X; /* { dg-warning "__byref attribute is only allowed on local variables - ignored" } */ +__block int X; /* { dg-warning "__block attribute is only allowed on local variables - ignored" } */ -int foo(__byref int param) { /* { dg-warning "byref attribute can be specified on variables only - ignored" } */ - __byref int OK = 1; +int foo(__block int param) { /* { dg-warning "__block attribute can be specified on variables only - ignored" } */ + __block int OK = 1; - extern __byref double extern_var; /* { dg-warning "__byref attribute is only allowed on local variables - ignored" } */ + extern __block double extern_var; /* { dg-warning "__block attribute is only allowed on local variables - ignored" } */ if (X) { - static __byref char * pch; /* { dg-warning "__byref attribute is only allowed on local variables - ignored" } */ + static __block char * pch; /* { dg-warning "__block attribute is only allowed on local variables - ignored" } */ } return OK - 1; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-2.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-2.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-2.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-2.c Mon Nov 3 02:35:57 2008 @@ -6,8 +6,8 @@ void _Block_byref_release(void*src){} int main() { - __byref int X = 1234; - __byref const char * message = "HELLO"; + __block int X = 1234; + __block const char * message = "HELLO"; X = X - 1234; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-3.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-3.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-3.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-3.c Mon Nov 3 02:35:57 2008 @@ -6,8 +6,8 @@ void _Block_byref_release(void*src){} int main() { - __byref int X = 1234; - __byref const char * message = "HELLO\n"; + __block int X = 1234; + __block const char * message = "HELLO\n"; X = X - 1234; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-4.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-4.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-4.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-4.c Mon Nov 3 02:35:57 2008 @@ -8,9 +8,9 @@ void _Block_byref_release(void*src){} int main() { - __byref int X = 1234; + __block int X = 1234; - int (^CP)(void) = ^{ |X| X = X+1; return X; }; /* { dg-warning "has been deprecated in blocks" } */ + int (^CP)(void) = ^{ X = X+1; return X; }; CP(); printf ("X = %d\n", X); return X - 1235; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-5.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-5.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-5.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-5.c Mon Nov 3 02:35:57 2008 @@ -17,10 +17,10 @@ int main() { int x = 1; - __byref int y = 2; - __byref br_x; + __block int y = 2; + __block br_x; int y1; - double res = test(^(int z){|y| y = x+z; return (double)x; }); /* { dg-warning "has been deprecated in blocks" } */ + double res = test(^(int z){y = x+z; return (double)x; }); printf("result = %f x = %d y = %d\n", res, x, y); if (x != 1 || y != 43) exit(1); @@ -28,7 +28,7 @@ br_x = x; y1 = y; - res = test(^(int z){|br_x| br_x = br_x+z; return (double)y1; }); /* { dg-warning "has been deprecated in blocks" } */ + res = test(^(int z){br_x = br_x+z; return (double)y1; }); printf("result = %f br_x = %d y1 = %d\n", res, br_x, y1); if (br_x != 43 || y1 != 43) exit(1); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-6.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-6.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-6.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-6.c Mon Nov 3 02:35:57 2008 @@ -16,14 +16,14 @@ } int main() { - __byref int x = 1; - __byref int y = 2; - double res = test(^(int z){|y| y = x+z; return (double)x; }); /* { dg-warning "has been deprecated in blocks" } */ + __block int x = 1; + __block int y = 2; + double res = test(^(int z){y = x+z; return (double)x; }); printf("result = %f x = %d y = %d\n", res, x, y); if (x != 1 || y != 43) exit(1); - res = test(^(int z){|x| x = x+z; return (double)y; }); /* { dg-warning "has been deprecated in blocks" } */ + res = test(^(int z){x = x+z; return (double)y; }); printf("result = %f x = %d y = %d\n", res, x, y); if (x != 43 || y != 43) exit(1); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-7.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-7.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-7.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-7.c Mon Nov 3 02:35:57 2008 @@ -12,28 +12,28 @@ int i; int foo() { - __byref id FFFFFF; - __byref id Q; - ^{ |FFFFFF| FFFFFF = 0; }; /* { dg-warning "has been deprecated in blocks" } */ + __block id FFFFFF; + __block id Q; + ^{ FFFFFF = 0; }; if (i) { - __byref id FFFFFF; - __byref id Q; - ^{ |FFFFFF| FFFFFF = 0; }; /* { dg-warning "has been deprecated in blocks" } */ + __block id FFFFFF; + __block id Q; + ^{ FFFFFF = 0; }; } } int main() { - __byref id X; - __byref id X1; - ^{ |X| X = 0; }; /* { dg-warning "has been deprecated in blocks" } */ + __block id X; + __block id X1; + ^{ X = 0; }; if (i) { - __byref id X; - __byref id X1; - ^{ |X| X = 0; }; /* { dg-warning "has been deprecated in blocks" } */ + __block id X; + __block id X1; + ^{ X = 0; }; } return 0; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-8.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-8.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-8.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-blocks-test-8.c Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* Test the __byreg runtime features. */ /* { dg-options "-mmacosx-version-min=10.5 -ObjC -framework Foundation" { target i?86-*-darwin* } } */ /* { dg-do run { target i?86-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #import @@ -49,15 +49,26 @@ BLOCK_IS_GC = (1 << 27), }; +/* APPLE LOCAL begin radar 5847213 - radar 6329245 */ struct Block_basic { - void *isa; - int Block_flags; // int32_t - int Block_size; // XXX should be packed into Block_flags + void *isa; // initialized to &_NSConcreteStackBlock or &_NSConcreteGlobalBlock + int Block_flags; + int reserved; void (*Block_invoke)(void *); - void (*Block_copy)(void *dst, void *src); - void (*Block_dispose)(void *); - //long params[0]; // generic space for const & byref hidden params, return value, variable on needs of course + + struct Block_descriptor_1 { + unsigned long int reserved; // NULL + unsigned long int Block_size; // sizeof(struct Block_literal_1) + + // optional helper functions + void (*Block_copy)(void *dst, void *src); + void (*Block_dispose)(void *src); + } *descriptor; + + // imported variables }; +/* APPLE LOCAL end radar 5847213 - radar 6329245 */ + struct Block_byref { void* isa; struct Block_byref *forwarding; @@ -90,8 +101,8 @@ } int main(int argc, char *argv[]) { - id __byref dumbo = newDumbObject(); //[DumbObject new]; - void (^dummy)(void) = ^{ | dumbo | /* { dg-warning "has been deprecated in blocks" } */ + id __block dumbo = newDumbObject(); //[DumbObject new]; + void (^dummy)(void) = ^{ [dumbo self]; }; @@ -102,8 +113,8 @@ } char result[200]; - printf("calling out to copy support helper at %p\n", aBlock->Block_copy); - (*aBlock->Block_copy)(result, aBlock); // do fixup + printf("calling out to copy support helper at %p\n", aBlock->descriptor->Block_copy); + (*aBlock->descriptor->Block_copy)(result, aBlock); // do fixup // The copy/destroy helper should have had a callout to _Block_byref_assign_copy for its byref block if (! ByrefAssignCopy) { @@ -117,7 +128,7 @@ return 1; } - (*aBlock->Block_dispose)(aBlock); + (*aBlock->descriptor->Block_dispose)(aBlock); return 0; } Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref-2.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref-2.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref-2.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref-2.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,35 @@ +/* APPLE LOCAL file radar 6237616 */ +/* { dg-do compile } */ +/* { dg-options "-g -O3 -dA -mmacosx-version-min=10.6" }*/ +/* { dg-final { scan-assembler "DW_OP_breg\[0-9a-f]+\[ \t\n]+\[ \t]\\.byte+\[ \t]0x0+\[ \t]+\[#;@]\[ \t]sleb128 0+\[ \t\n]+\[ \t]\\.byte+\[ \t]0x6+\[ \t]+\[#;@]\[ \t]DW_OP_deref+\[ \t\n]+\[ \t]\\.byte+\[ \t]\[0x6;0x23]+\[ \t]+\[#;@]\[ \t]\[DW_OP_deref;DW_OP_plus_uconst]"} } */ +/* { dg-final { scan-assembler-not "DW_OP_reg\[0-9a-f]+\[ \t\n]+\[ \t]\\.byte+\[ \t]0x6+\[ \t]+\[#;@]\[ \t]DW_OP_deref"} } */ + +#include + +int +main () +{ + int val_1, val_2; + + int (^my_block) (int); + + if (1) + { + __block int use_by_ref = 1; + int use_by_value = 0xfefefefe; + + my_block = ^ (int in_value) { + use_by_ref++; + printf ("Block function has: %d %d %d.\n", in_value, use_by_value, use_by_ref); + return in_value + use_by_ref + use_by_value; + }; + use_by_ref++; + val_1 = my_block (10); + } + + val_1 = my_block (20); + val_2 = my_block (30); + printf ("Got: %d and %d.\n", val_1, val_2); + + return 0; +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref-3.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref-3.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref-3.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref-3.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,35 @@ +/* APPLE LOCAL file radar 6237616 */ +/* { dg-do compile } */ +/* { dg-options "-g -O0 -dA -mmacosx-version-min=10.6" }*/ +/* { dg-final { scan-assembler "line 15+\[ \t\n]+\[ \t]\\.byte+\[ \t]0x0+\[ \t]+\[#;@]\[ \t]DW_LNE_set_address+\[ \t\n]+\[ \t]\\.byte+\[ \t]0x\[0-9a-f]+\[ \t]+\[#;@]\[ \t]uleb128 0x\[0-9a-f]+\[ \t\n]+\[ \t]\\.byte+\[ \t]0x2+\[ \t\n]+\[ \t]\[\\.long;\\.quad]+\[ \t]LM\[0-9]+\[ \t\n]+\[ \t]\\.byte+\[ \t]0x\[0-9a-f]+\[ \t]+\[#;@]\[ \t]line 16"} } */ +/* { dg-final { scan-assembler-not "line 15+\[ \t\n]+\[ \t]\\.byte+\[ \t]0x0+\[ \t]+\[#;@]\[ \t]DW_LNE_set_address+\[ \t\n]+\[ \t]\\.byte+\[ \t]0x\[0-9a-f]+\[ \t]+\[#;@]\[ \t]uleb128 0x\[0-9a-f]+\[ \t\n]+\[ \t]\\.byte+\[ \t]0x2+\[ \t\n]+\[ \t]\[\\.long;\\.quad]+\[ \t]LM\[0-9]+\[ \t\n]+\[ \t]\\.byte+\[ \t]0x\[0-9a-f]+\[ \t]+\[#;@]\[ \t]DW_LNS_copy" } } */ + +#include +#line 3 +int +main () +{ + int val_1, val_2; + + int (^my_block) (int); + + if (1) + { + __block int use_by_ref = 1; + int use_by_value = 0xfefefefe; + + my_block = ^ (int in_value) { + use_by_ref++; + printf ("Block function has: %d %d %d.\n", in_value, use_by_value, use_by_ref); + return in_value + use_by_ref + use_by_value; + }; + use_by_ref++; + val_1 = my_block (10); + } + + val_1 = my_block (20); + val_2 = my_block (30); + printf ("Got: %d and %d.\n", val_1, val_2); + + return 0; +} Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref-attribute.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref-attribute.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref-attribute.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref-attribute.c Mon Nov 3 02:35:57 2008 @@ -1,11 +1,11 @@ /* APPLE LOCAL file radar 6096219 */ -/* Test that __byref attribute can be used directly. */ +/* Test that __block attribute can be used directly. */ /* { dg-options "-mmacosx-version-min=10.5 -fblocks" { target *-*-darwin* } } */ /* { dg-do compile } */ int main() { - __byref int JJJJ; + __block int JJJJ; __attribute__((__blocks__(byref))) int III; int (^XXX)(void) = ^{ return III+JJJJ; }; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-byref.c Mon Nov 3 02:35:57 2008 @@ -4,38 +4,26 @@ /* { dg-options "-fblocks" } */ int main() { + __block int a; + __block int b; int x, y; ^{ }; - ^{|x|}; /* { dg-warning "has been deprecated in blocks" } */ + ^{}; - ^{ |x,y| int r; return x+y+r; }; /* { dg-warning "has been deprecated in blocks" } */ - ^{ |x,y|; int r; return x+y+r; }; /* { dg-warning "has been deprecated in blocks" } */ + ^{ int r; return x+y+r; }; + ^{ int r; return x+y+r; }; - ^{ |x,y|; int r; return x+y+r; /* { dg-warning "has been deprecated in blocks" } */ + ^{ int r; return x+y+r; ^{ - |x,y|; int r; return x+y; /* { dg-warning "has been deprecated in blocks" } */ + int r; return x+y; }; }; - ^{ |x,y|; int r; return x+y+r; /* { dg-warning "has been deprecated in blocks" } */ - ^{ - { |x,y|; int r; return x+y; }; /* { dg-error "expected expression before" } */ - }; - }; + ^{a = 1;}; - ^ { int r; - |x, y| /* { dg-error "expected expression before" } */ - }; - - ^{| /* { dg-warning "has been deprecated in blocks" } */ - main()|}; /* { dg-error "only a visible variable may be used in a block byref declaration" } */ - - /* Assigning to byref variables. */ - ^{|x| x = 1;}; /* { dg-warning "has been deprecated in blocks" } */ - - ^{ |x,y| /* { dg-warning "has been deprecated in blocks" } */ - if (x != y) - x = y = 100; + ^{ + if (a != b) + a = b = 100; }; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-codegen-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-codegen-1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-codegen-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-codegen-1.c Mon Nov 3 02:35:57 2008 @@ -14,14 +14,14 @@ } int main() { - int x = 1; - int y = 2; - double res = test(^(int z){|y| y = x+z; return (double)x; }); /* { dg-warning "has been deprecated in blocks" } */ + __block int x = 1; + __block int y = 2; + double res = test(^(int z){y = x+z; return (double)x; }); printf("result = %f x = %d y = %d\n", res, x, y); if (x != 1 || y != 43) exit(1); - res = test(^(int z){|x| x = x+z; return (double)y; }); /* { dg-warning "has been deprecated in blocks" } */ + res = test(^(int z){x = x+z; return (double)y; }); printf("result = %f x = %d y = %d\n", res, x, y); if (x != 43 || y != 43) exit(1); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-complicated-type.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-complicated-type.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-complicated-type.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-complicated-type.c Mon Nov 3 02:35:57 2008 @@ -15,6 +15,8 @@ int (^(^block)(double x))(char, short); void foo() { - block = ^(double x){ return ^(char c, short y) { return (int)c + y; };}; /* { dg-error "returning block that lives on the local stack" } */ + int one = 1; + /* APPLE LOCAL radar 6230297 */ + block = ^(double x){ return ^(char c, short y) { return one + (int)c + y; };}; /* { dg-error "returning block that lives on the local stack" } */ } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-copy-destroy.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-copy-destroy.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-copy-destroy.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-copy-destroy.c Mon Nov 3 02:35:57 2008 @@ -12,10 +12,11 @@ @implementation Root - (void)example { - int y, x; + int x; + __block int y; NSAutoreleasePool *pool = [NSAutoreleasePool new]; NSAutoreleasePool *relpool = [NSAutoreleasePool new]; - bar(^(int z){ |y| y = x+z; [pool drain]; if (y) y++; [relpool release]; return y+2.0; }); /* { dg-warning "has been deprecated in blocks" } */ + bar(^(int z){ y = x+z; [pool drain]; if (y) y++; [relpool release]; return y+2.0; }); } @end Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-debug-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-debug-1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-debug-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-debug-1.c Mon Nov 3 02:35:57 2008 @@ -4,7 +4,8 @@ /* { dg-do compile } */ /* { dg-options "-g -O0 -fblocks -dA" } */ -/* { dg-final { scan-assembler "invoke_impl.*DW_AT_name" } } */ +/* { dg-final { scan-assembler "__block_descriptor.*DW_AT_name" } } */ +/* { dg-final { scan-assembler "__block_literal_generic.*DW_AT_name" } } */ struct inStruct { void (^genericBlockPtr)(); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-debug-2.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-debug-2.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-debug-2.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-debug-2.c Mon Nov 3 02:35:57 2008 @@ -4,7 +4,8 @@ /* { dg-do compile } */ /* { dg-options "-g -O0 -fblocks -dA" } */ -/* { dg-final { scan-assembler "invoke_impl.*DW_AT_name" } } */ +/* { dg-final { scan-assembler "__block_descriptor.*DW_AT_name" } } */ +/* { dg-final { scan-assembler "__block_literal_generic.*DW_AT_name" } } */ void (^os)(); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-dup-invoke_impl.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-dup-invoke_impl.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-dup-invoke_impl.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-dup-invoke_impl.c Mon Nov 3 02:35:57 2008 @@ -23,13 +23,13 @@ } int main() { - enum numbers x = one; - enum numbers y = two; + __block enum numbers x = one; + __block enum numbers y = two; myblock CL = ^(enum numbers z) - {|y| y = z; /* { dg-warning "has been deprecated in blocks" } */ + {y = z; test ( - ^ (enum numbers z) { |x| /* { dg-warning "has been deprecated in blocks" } */ + ^ (enum numbers z) { x = z; return (enum numbers) four; } Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-duplicate-err.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-duplicate-err.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-duplicate-err.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-duplicate-err.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,14 @@ +/* APPLE LOCAL file radar 6310599 */ +/* Check that internal fields do not conflict with user names. */ +/* { dg-options "-fblocks" } */ +/* { dg-do compile } */ + +int main() +{ + __block int flags; + __block void *isa; + + ^{ flags=1; isa = (void *)isa; }; + return 0; +} + Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-enum.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-enum.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-enum.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-enum.c Mon Nov 3 02:35:57 2008 @@ -20,15 +20,15 @@ } int main() { - enum numbers x = one; - enum numbers y = two; + __block enum numbers x = one; + __block enum numbers y = two; - enum numbers res = test(^(enum numbers z){|y| y = z; return x; }); /* { dg-warning "has been deprecated in blocks" } */ + enum numbers res = test(^(enum numbers z){y = z; return x; }); if (x != one || y != three || res != one) exit(1); - res = test(^(enum numbers z){|x| x = z; return x; }); /* { dg-warning "has been deprecated in blocks" } */ + res = test(^(enum numbers z){x = z; return x; }); if (x != three || res != three) exit(1); return 0; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-error-global-byref.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-error-global-byref.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-error-global-byref.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-error-global-byref.c Mon Nov 3 02:35:57 2008 @@ -16,7 +16,7 @@ static int static_local = 10; int local; CallBlock( ^ {++glob; - CallBlock(^ { |glob, static_local| /* { dg-warning "has been deprecated in blocks" } */ + CallBlock(^ { ++glob; stat++; ++static_local; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-do.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-do.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-do.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-do.c Mon Nov 3 02:35:57 2008 @@ -13,22 +13,20 @@ } int main() { - __byref int O1; - int p = 0; - do - { - __byref int I1; - do - { - __byref int J1; - if (p == 2) - break; - } - while ( ++p < 3); + { + __block int O1; + int p = 0; + do { + __block int I1; + do { + __block int J1; + if (p == 2) + break; + } while ( ++p < 3); if (p == 4) break; - } - while (++p != 5); + } while (++p != 5); + } return count-7; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-for.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-for.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-for.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-for.c Mon Nov 3 02:35:57 2008 @@ -7,19 +7,19 @@ static int count; static void _Block_byref_release(void * arg) { - ++count; + ++count; } -int main() -{ - __byref int O1; +int main() { + { + __block int O1; int i; for (i = 1; i <= 5; i++) - { - __byref int I1; - } + { + __block int I1; + } if (count != 5) - abort(); - return count - 6; + abort(); + } + return count - 6; } - Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-for1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-for1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-for1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-for1.c Mon Nov 3 02:35:57 2008 @@ -14,18 +14,20 @@ } int main() { - __byref int O1; + { + __block int O1; int i; int p; for (i = 1; i <= 5; i++) { - __byref int I1; + __block int I1; p = 0; while (p != 10) { - __byref int II1; + __block int II1; if (p == 2) break; ++p; } } + } return count-21; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-goto.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-goto.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-goto.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-goto.c Mon Nov 3 02:35:57 2008 @@ -2,25 +2,21 @@ /* { dg-options "-fblocks" } */ /* { dg-do compile } */ - -int foo(int p) -{ - __byref int O1; - int i; - LOUT: ; - for (i = 1; i < 100; i++) - { - __byref int I1; - while (p < 0) - { - __byref int II1; - if (p == 100) - goto LOUT; /* { dg-error "local byref variable II1 is in the scope of this goto" } */ - ++p; - if (p == 2345) - break; - } +int main(int p) { + p = -5; + __block int O1; + int i; + LOUT: ; + for (i = 1; i < 100; i++) { + __block int I1; + while (p < 0) { + __block int II1; + if (p == 100) + goto LOUT; + ++p; + if (p == 2345) + break; } - return 0; + } + return 0; } - Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-nested-while.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-nested-while.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-nested-while.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-nested-while.c Mon Nov 3 02:35:57 2008 @@ -16,8 +16,8 @@ void objc_get_type_qualifiers (int flag, int type) { while (flag--) while (type++ < 4) { - __byref int W1; - __byref int W2; + __block int W1; + __block int W2; if (type == 2) break; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-return.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-return.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-return.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-return.c Mon Nov 3 02:35:57 2008 @@ -15,12 +15,17 @@ } -int main() { - __byref int X = 1234; +int main1() { + __block int X = 1234; if (X) { - __byref int local_BYREF = 100; + __block int local_BYREF = 100; X += 100 + local_BYREF; return count-2; } return -1; } + +int main() { + main1(); + return count-2; +} Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-return1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-return1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-return1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-return1.c Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file radar 6083129 byref escapes */ +/* APPLE LOCAL file radar 6083129 block escapes */ /* { dg-options "-fblocks" } */ /* { dg-do run } */ @@ -17,13 +17,13 @@ void *_NSConcreteStackBlock; void FOO(int arg) { - __byref int X = 1234; + __block int X = 1234; if (arg) { - __byref int local_BYREF = 100; + __block int local_BYREF = 100; X += 100 + local_BYREF; return; } - ^{ |X| X++; }; /* { dg-warning "has been deprecated in blocks" } */ + ^{ X++; }; X = 1000; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-switch.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-switch.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-switch.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-switch.c Mon Nov 3 02:35:57 2008 @@ -15,33 +15,33 @@ } int foo(int p, int q) { - __byref int O1; + __block int O1; switch (p) { case 1: { - __byref int I1; + __block int I1; I1 += 1; break; } case 10: { - __byref int J1; + __block int J1; break; } default : { - __byref int D1; - __byref int D2; + __block int D1; + __block int D2; switch (q) { case 11: { - __byref int Q1; + __block int Q1; break; } default: { - __byref int ID1; - __byref int ID2; + __block int ID1; + __block int ID2; } }; break; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-while.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-while.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-while.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-escape-while.c Mon Nov 3 02:35:57 2008 @@ -12,14 +12,16 @@ int main() { - __byref int O1; + { + __block int O1; int i = 0; while (++i != 5) { - __byref int I1; + __block int I1; } if (count != 4) abort(); + } return count - 5; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-explicit-return-type.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-explicit-return-type.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-explicit-return-type.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-explicit-return-type.c Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file radar 6185344 */ +/* APPLE LOCAL file radar 6185344 - updated for radar 6230297 */ /* Test for blocks with explicit return type specified. */ /* { dg-options "-mmacosx-version-min=10.6 -ObjC" { target *-*-darwin* } } */ /* { dg-do compile } */ @@ -75,9 +75,10 @@ int (^(^block)(double x))(char, short); void foo() { - block = ^(double x){ return ^int(char c, short y) { return c + y; };}; /* { dg-warning "returning block that lives on the local stack" } */ + int one = 1; + block = ^(double x){ return ^int(char c, short y) { return one + c + y; };}; /* { dg-warning "returning block that lives on the local stack" } */ // or: - block = ^(double x){ return ^(char c, short y) { return (int)c + y; };}; /* { dg-warning "returning block that lives on the local stack" } */ + block = ^(double x){ return ^(char c, short y) { return one + (int)c + y; };}; /* { dg-warning "returning block that lives on the local stack" } */ } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-global-byref-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-global-byref-1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-global-byref-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-global-byref-1.c Mon Nov 3 02:35:57 2008 @@ -1,5 +1,5 @@ /* APPLE LOCAL file radar 5803005 */ -/* Test that all global variables referenced in blocks are treated as 'byref' as default. */ +/* Test that all global variables referenced in blocks are treated as 'block' as default. */ /* { dg-do run } */ /* { dg-options "-mmacosx-version-min=10.5 -fblocks" { target *-*-darwin* } } */ @@ -15,8 +15,8 @@ int foo() { static int local = 10; - CallBlock( ^ {| local| ++glob; ++stat; ++local; /* { dg-warning "has been deprecated in blocks" } */ - CallBlock(^ { |local| ++glob; ++stat; ++local; }); /* { dg-warning "has been deprecated in blocks" } */ + CallBlock( ^ {++glob; ++stat; ++local; + CallBlock(^ { ++glob; ++stat; ++local; }); ++glob; ++stat; ++local; }); if (glob != 13 || stat != 13 || local != 13) Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-global-byref-2.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-global-byref-2.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-global-byref-2.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-global-byref-2.c Mon Nov 3 02:35:57 2008 @@ -1,5 +1,5 @@ /* APPLE LOCAL file radar 6014138 */ -/* Test use of __byref on locals which will be used as 'byref' variables in blocks. */ +/* Test use of __block on locals which will be used as 'byref' variables in blocks. */ /* { dg-do run } */ /* { dg-options "-mmacosx-version-min=10.5 -fblocks" { target *-*-darwin* } } */ @@ -14,9 +14,9 @@ int foo() { - __byref int local_byref_1 = 10; - __byref int local_byref_2 = 10; - __byref int local_byref_3 = 10; + __block int local_byref_1 = 10; + __block int local_byref_2 = 10; + __block int local_byref_3 = 10; CallBlock( ^ { ++local_byref_1; ++local_byref_2; ++local_byref_3; CallBlock(^ { ++local_byref_1; ++local_byref_2; ++local_byref_3; }); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-global-byref.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-global-byref.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-global-byref.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-global-byref.c Mon Nov 3 02:35:57 2008 @@ -15,8 +15,8 @@ int foo() { static int local = 10; - CallBlock( ^ {| glob, stat, local| ++glob; ++stat; ++local; /* { dg-warning "has been deprecated in blocks" } */ - CallBlock(^ { |glob, stat, local| ++glob; ++stat; ++local; }); /* { dg-warning "has been deprecated in blocks" } */ + CallBlock( ^ {++glob; ++stat; ++local; + CallBlock(^ { ++glob; ++stat; ++local; }); ++glob; ++stat; ++local; }); if (glob != 13 || stat != 13 || local != 13) Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-in-foreach-header.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-in-foreach-header.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-in-foreach-header.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-in-foreach-header.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,57 @@ +/* APPLE LOCAL file radar 6268817 */ +/* Testing use of block literal expression in ObjC's enumeration foreach-statement loop header. */ +/* { dg-options "-mmacosx-version-min=10.6 -ObjC -framework Foundation" { target *-*-darwin* } } */ +/* { dg-do run } */ + +#import + + at interface TargetSymbol : NSObject { + NSString * _symbolName; +} + at property (copy) NSString *name; + at end + + at implementation TargetSymbol + at synthesize name = _symbolName; + at end + +static void Looper(NSArray *symbols) { + // 1. Block literal assigned to a block pointer, which is used in loop: build succeeds + NSComparator comparator = ^(id target1, id target2){return [((TargetSymbol *)target1).name compare:((TargetSymbol *)target2).name];}; + + for (id symbol in [symbols sortedArrayUsingComparator:comparator]) { + // Do something + } + + // 2. Block expression literal used, but still outside loop: build succeeds + NSArray *sortedSymbols = [symbols sortedArrayUsingComparator:^(id target1, id target2){return [((TargetSymbol *)target1).name compare:((TargetSymbol *)target2).name];}]; + + for (id symbol in sortedSymbols) { + // Do something + } + + // 3. Block expression literal used directly in loop: build fails + for (id symbol in [symbols sortedArrayUsingComparator:^(id target1, id target2){return [((TargetSymbol *)target1).name compare:((TargetSymbol *)target2).name];}]) { + // Do something + } + + // 3. Block expression literal used directly in loop: build fails + for (id symbol in [symbols sortedArrayUsingComparator:^(id target1, id target2){return [((TargetSymbol *)target1).name compare:((TargetSymbol *)target2).name];}]) { + // Do something + } + + // 3. Block expression literal used directly in loop: build fails + for (id symbol in [symbols sortedArrayUsingComparator:^(id target1, id target2){return [((TargetSymbol *)target1).name compare:((TargetSymbol *)target2).name];}]) { + // Do something + } +} + + +int main (int argc, const char * argv[]) { + NSAutoreleasePool * pool = [[NSAutoreleasePool alloc] init]; + + // insert code here... + NSLog(@"Hello, World!"); + [pool drain]; + return 0; +} Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-literal.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-literal.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-literal.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-literal.c Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file radar 5732232, 6034839 - blocks */ +/* APPLE LOCAL file radar 5732232, 6034839, 6230297 - blocks */ /* { dg-do compile } */ /* { dg-options "-fblocks" } */ @@ -27,7 +27,7 @@ /* { dg-error "blocks require" "" { target *-*-* } 26 } */ ; /* { dg-error "argument list is required for block expression literals" } */ - return ^{printf("\nBlock\n"); }; /* { dg-error "returning block that lives on the local stack" } */ + return ^{printf("\nBlock\n"); }; } void test2() { @@ -44,7 +44,8 @@ } void (^test3())(void) { - return ^{}; /* { dg-error "returning block that lives on the local stack" } */ + /* APPLE LOCAL radar 6230297 */ + return ^{}; } void test4() { Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-local-stack.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-local-stack.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-local-stack.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-local-stack.c Mon Nov 3 02:35:57 2008 @@ -1,8 +1,9 @@ -/* APPLE LOCAL file radar 5732232 - blocks */ +/* APPLE LOCAL file radar 5732232 - radar 6230297 - blocks */ /* { dg-do compile } */ /* { dg-options "-fblocks" } */ void (^test3())(void) { - return ^{}; /* { dg-error "returning block that lives on the local stack" } */ + __block int i; + return ^{i = 1; }; /* { dg-error "returning block that lives on the local stack" } */ } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-local-static-test.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-local-static-test.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-local-static-test.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-local-static-test.c Mon Nov 3 02:35:57 2008 @@ -2,6 +2,7 @@ /* local statics need be treated same as file static (byref). */ /* { dg-options "-mmacosx-version-min=10.6" { target *-*-darwin* } } */ /* { dg-do run } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ #include Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-localisglobal.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-localisglobal.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-localisglobal.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-localisglobal.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,42 @@ +/* APPLE LOCAL file radar 6230297 */ +/* { dg-options "-mmacosx-version-min=10.6" { target *-*-darwin* } } */ +/* { dg-do run } */ + +/* + * localisglobal.c + * testObjects + * + * Created by Blaine Garst on 9/29/08. + * Copyright 2008 __MyCompanyName__. All rights reserved. + * + * works in all configurations + * CONFIG + * rdar://6230297 + */ + +#include + +void (^global)(void) = ^{ printf("hello world\n"); }; + +int aresame(void *first, void *second) { + long *f = (long *)first; + long *s = (long *)second; + return *f == *s; +} +int main(int argc, char *argv[]) { + int i = 10; + void (^local)(void) = ^ { printf("hi %d\n", i); }; + void (^localisglobal)(void) = ^ { printf("hi\n"); }; + + if (aresame(local, localisglobal)) { + printf("local block could be global, but isn't\n"); + return 1; + } + if (!aresame(global, localisglobal)) { + printf("local block is not global, not stack, what is it??\n"); + return 1; + } + printf("%s: success\n", argv[0]); + return 0; + +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-nested-block-var.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-nested-block-var.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-nested-block-var.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-nested-block-var.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,32 @@ +/* APPLE LOCAL file radar 6225809 - radar 5847213 */ +/* __block var used in a nested block neeb be implicitly declared in + each intervening block. */ +/* { dg-options "-mmacosx-version-min=10.6 " { target *-*-darwin* } } */ +/* { dg-do run } */ + +#include + +static void Block_copy (void (^I)(void)) +{ + I(); +} + +int main(int argc, char *argv[]) { + __block int a = 42; + int save_a = a; // just to keep the address on the stack. + + void (^b)(void) = ^{ + Block_copy(^{ + a = 2; + }); + }; + + Block_copy(b); + + if(a == save_a) { + printf("**** __block heap storage should have been created at this point\n"); + return 1; + } + printf("%s: Success (old %d new %d)\n", argv[0], save_a, a); + return 0; +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-no-block-def.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-no-block-def.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-no-block-def.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-no-block-def.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,7 @@ +/* APPLE LOCAL radar 6230656 */ +/* { dg-options "-fno-blocks" } */ +/* { dg-do compile { target *-*-darwin* } } */ + +#if __block +#error +#endif Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper-1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper-1.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file radar 6083129 byref escapes */ /* Test for generation of escape _Block_byref_release call when a local - __byref variable is copied in. */ + __block variable is copied in. */ /* { dg-options "-fblocks" } */ /* { dg-do run } */ @@ -13,7 +13,7 @@ static int count; static void _Block_byref_release(void * arg) { - ++count; + ++count; } void junk(void (^block)(void)) { @@ -21,16 +21,16 @@ } int test() { - int __byref i = 10; - void (^dummy)(void) = ^{ printf("i = %d\n", i); }; - junk(dummy); + { + int __block i = 10; + void (^dummy)(void) = ^{ printf("i = %d\n", i); }; + junk(dummy); + } return count; } -int main() -{ - if ( test() != 1) - abort(); - return 0; +int main() { + if ( test() != 1) + abort(); + return 0; } - Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper-2.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper-2.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper-2.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper-2.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file radar 6083129 byref escapes */ /* Test for generation of escape _Block_byref_release call when a local - __byref variable is copied in and block has a return statement. */ + __block variable is copied in and block has a return statement. */ /* { dg-options "-fblocks" } */ /* { dg-do run } */ @@ -21,9 +21,11 @@ } int test() { - int __byref i = 10; + { + int __block i = 10; int (^dummy)(void) = ^{ printf("i = %d\n", i); return i; }; junk(dummy); + } return count; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper-3.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper-3.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper-3.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper-3.c Mon Nov 3 02:35:57 2008 @@ -1,5 +1,5 @@ /* APPLE LOCAL file radar 6083129 byref escapes */ -/* Test for generation of escape _Block_byref_release call when a __byref +/* Test for generation of escape _Block_byref_release call when a __block variable inside a block is declared and used. */ /* { dg-options "-fblocks" } */ /* { dg-do run } */ @@ -21,7 +21,7 @@ } int test() { - void (^dummy)(void) = ^{ int __byref i = 10; printf("i = %d\n", i); }; + void (^dummy)(void) = ^{ int __block i = 10; printf("i = %d\n", i); }; junk(dummy); return count; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-noescape-helper.c Mon Nov 3 02:35:57 2008 @@ -19,9 +19,11 @@ } int test() { - int __byref i = 10; - void (^dummy)(void) = ^{ | i | ++i; }; /* { dg-warning "has been deprecated in blocks" } */ + { + int __block i = 10; + void (^dummy)(void) = ^{ ++i; }; junk(dummy); + } return count; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-nullblockisa.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-nullblockisa.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-nullblockisa.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-nullblockisa.c Mon Nov 3 02:35:57 2008 @@ -5,13 +5,9 @@ #include #include -#define HASISA 1 - void check(void *ptr) { struct inner { -#if HASISA void* isa; // should be zero -#endif long forwarding; int flags; int size; @@ -19,20 +15,29 @@ // long disposehelper not needed int i; // }; +/* APPLE LOCAL begin radar 5847213 - radar 6329245 */ struct block_with_blocki { - long isa; - int flags; - int size; - long impl; - long copyhelper; - long destroyhelper; - struct inner *blocki; + void *isa; // initialized to &_NSConcreteStackBlock or &_NSConcreteGlobalBlock + int Block_flags; + int reserved; + void *FuncPtr; + struct Block_descriptor_1 { + unsigned long int reserved; // NULL + unsigned long int size; // sizeof(struct Block_literal_1) + + // optional helper functions + void (*Block_copy)(void *dst, void *src); + void (*Block_dispose)(void *src); + } *descriptor; + struct inner *blocki; } *block = (struct block_with_blocki *)ptr; +/* APPLE LOCAL end radar 5847213 - radar 6329245 */ + // sanity checks - if (block->size != sizeof(struct block_with_blocki)) { + if (block->descriptor->size != sizeof(struct block_with_blocki)) { // layout funny printf("layout is funny, struct size is %d vs runtime size %ld\n", - block->size, + (int)block->descriptor->size, sizeof(struct block_with_blocki)); exit(1); } @@ -41,12 +46,10 @@ block->blocki->size); exit(1); } -#if HASISA if (block->blocki->isa != (void*)NULL) { printf("not a NULL __block isa\n"); exit(1); } -#endif return; } Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-objectassign.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-objectassign.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-objectassign.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-objectassign.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,79 @@ +/* APPLE LOCAL file radar 6175959 */ +/* Test for generation of two new APIs; _Block_object_assign and _Block_object_dispose */ +/* { dg-options "-mmacosx-version-min=10.6 -fblocks" { target *-*-darwin* } } */ +/* { dg-do run } */ + +#include + +#define BLOCK_HAS_DESCRIPTOR (1 << 29) +#define BLOCK_HAS_COPY_DISPOSE (1 << 25) + +struct Block_descriptor { + unsigned long int reserved; + unsigned long int size; + void (*copy)(void *dst, void *src); + void (*dispose)(void *); +}; + +struct Block_layout { + void *isa; + int flags; + int reserved; + void (*invoke)(void *, ...); + struct Block_descriptor *descriptor; + // imported variables +}; + +int AssignCalled = 0; +int DisposeCalled = 0; + +// local copy instead of libSystem.B.dylib copy +void _Block_object_assign(void *destAddr, const void *object, const int isWeak) { + printf("_Block_object_assign(%p, %p, %d) called\n", destAddr, object, isWeak); + AssignCalled = 1; +} + +void _Block_object_dispose(const void *object, const int isWeak) { + printf("_Block_object_dispose(%p, %d) called\n", object, isWeak); + DisposeCalled = 1; +} + +struct MyStruct { + long isa; + long field; +}; + +typedef struct MyStruct *__attribute__((NSObject)) MyStruct_t; + +int main(int argc, char *argv[]) { + // create a block + struct MyStruct X; + MyStruct_t xp = (MyStruct_t)&X; + xp->field = 10; + void (^myBlock)(void) = ^{ printf("field is %ld\n", xp->field); }; + // should be a copy helper generated with a calls to above routines + // Lets find out! + struct Block_layout *bl = (struct Block_layout *)(void *)myBlock; + if ((bl->flags & BLOCK_HAS_DESCRIPTOR) != BLOCK_HAS_DESCRIPTOR) { + printf("using old runtime layout!\n"); + return 1; + } + if ((bl->flags & BLOCK_HAS_COPY_DISPOSE) != BLOCK_HAS_COPY_DISPOSE) { + printf("no copy dispose!!!!\n"); + return 1; + } + // call helper routines directly. These will, in turn, we hope, call the stubs above + long destBuffer[256]; + printf("destbuffer is at %p, block at %p\n", destBuffer, (void *)bl); + bl->descriptor->copy(destBuffer, bl); + bl->descriptor->dispose(bl); + if (AssignCalled == 0) { + printf("did not call assign helper!\n"); + return 1; + } + if (DisposeCalled == 0) { + printf("did not call dispose helper\n"); + return 1; + } + return 0; +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-printf-attribute-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-printf-attribute-1.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-printf-attribute-1.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-printf-attribute-1.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,15 @@ +/* APPLE LOCAL file radar 6246527 */ +/* { dg-do compile } */ +/* { dg-options "-Wformat" } */ + +int main() +{ + void (^b) (int arg, const char * format, ...) __attribute__ ((__format__ (__printf__, 1, 3))) = /* { dg-error "format string argument not a string type" } */ + ^ __attribute__ ((__format__ (__printf__, 1, 3))) (int arg, const char * format, ...) {}; /* { dg-error "format string argument not a string type" } */ + void (^z) (int arg, const char * format, ...) __attribute__ ((__format__ (__printf__, 2, 3))) = ^ __attribute__ ((__format__ (__printf__, 2, 3))) (int arg, const char * format, ...) {}; + + z(1, "%s", 1); /* { dg-warning "format \\'\%s\\' expects type \\'char \\*\\'\, but argument 3 has type \\'int\\'" } */ + z(1, "%s", "HELLO"); + +} + Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-readweakgc.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-readweakgc.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-readweakgc.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-readweakgc.c Mon Nov 3 02:35:57 2008 @@ -25,8 +25,8 @@ int main(char *argc, char *argv[]) { // an object should not be retained within a stack Block void (^local)(void); - int i = 10; - Henry = ^ { | i | ++i; }; /* { dg-warning "has been deprecated in blocks" } */ + __block int i = 10; + Henry = ^ { ++i; }; local = Henry; if (GlobalInt2 == 1) { printf("%s: success\n", argv[0]); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-readweakgcivar.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-readweakgcivar.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-readweakgcivar.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-readweakgcivar.c Mon Nov 3 02:35:57 2008 @@ -30,10 +30,10 @@ int main(char *argc, char *argv[]) { // an object should not be retained within a stack Block - int i = 0; + __block int i = 0; void (^local)(void); Foo *foo = [[Foo alloc] init]; - foo->ivar = ^ { | i | ++i; }; /* { dg-warning "has been deprecated in blocks" } */ + foo->ivar = ^ { ++i; }; local = foo->ivar; if (GlobalInt2 == 1) { printf("%s: success\n", argv[0]); Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-sentinel-attribute.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-sentinel-attribute.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-sentinel-attribute.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-sentinel-attribute.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,28 @@ +/* APPLE LOCAL file radar 6246527 */ +/* { dg-do compile } */ +/* { dg-options "-Wformat" } */ +#include + +void (^e) (int arg, const char * format, ...) __attribute__ ((__sentinel__ (1,1))); +void (^e1) (int arg, const char * format, ...) __attribute__ ((__sentinel__ (1,1, 3))); /* { dg-error "wrong number of arguments" "sentinel" } */ + +int main() +{ + void (^b) (int arg, const char * format, ...) __attribute__ ((__sentinel__)) = + ^ __attribute__ ((__sentinel__)) (int arg, const char * format, ...) {}; + void (^z) (int arg, const char * format, ...) __attribute__ ((__sentinel__ (2))) = ^ __attribute__ ((__sentinel__ (2))) (int arg, const char * format, ...) {}; + + + void (^y) (int arg, const char * format, ...) __attribute__ ((__sentinel__ (5))) = ^ __attribute__ ((__sentinel__ (5))) (int arg, const char * format, ...) {}; + + b(1, "%s", NULL); // OK + b(1, "%s", 0); /* { dg-warning "missing sentinel in function call" } */ + z(1, "%s",4 ,1,0); /* { dg-warning "missing sentinel in function call" } */ + z(1, "%s", NULL, 1, 0); // OK + + y(1, "%s", 1,2,3,4,5,6,7); /* { dg-warning "missing sentinel in function call" } */ + + y(1, "%s", NULL,3,4,5,6,7); // OK + +} + Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-unused-parameter.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-unused-parameter.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-unused-parameter.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-unused-parameter.c Mon Nov 3 02:35:57 2008 @@ -5,8 +5,8 @@ int main() { - int i = 1; - ^ { |i| i = 1; return i; }; /* { dg-warning "has been deprecated in blocks" } */ + __block int i = 1; + ^ { i = 1; return i; }; return 0; } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-unused-warn.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-unused-warn.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-unused-warn.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/block-unused-warn.c Mon Nov 3 02:35:57 2008 @@ -5,10 +5,10 @@ int main() { -int x = 10; +__block int x = 10; int y = 1; -int (^myBlock)(void) = ^{ |x| return x+y; }; /* { dg-warning "has been deprecated in blocks" } */ +int (^myBlock)(void) = ^{ return x+y; }; myBlock(); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/const-cfstring-3.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/const-cfstring-3.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/const-cfstring-3.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/const-cfstring-3.c Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* Developed by Ziemowit Laski . */ /* { dg-do compile { target *-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-fconstant-cfstrings" } */ typedef const struct __CFString *CFStringRef; Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/debug-inlined-section.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/debug-inlined-section.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/debug-inlined-section.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/debug-inlined-section.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,35 @@ +/* APPLE LOCAL file, Radar 6275985 */ +/* { dg-do compile { target *-*-darwin* } } */ +/* { dg-options "-g -dA -save-temps -mmacosx-version-min=10.6" } */ +/* { dg-final { scan-assembler "__debug_inlined" } } */ +/* { dg-final { scan-assembler "\[#;@]\[ \t]+MIPS linkage name: \"getData\"" } } */ +/* { dg-final { scan-assembler "\[#;@]\[ \t]+Function name: \"getData\"" } } */ +/* { dg-final { scan-assembler "\[#;@]\[ \t]+MIPS linkage name: \"get_length\"" } } */ +/* { dg-final { scan-assembler "\[#;@]\[ \t]+Function name: \"get_length\"" } } */ + +#include +#include + +struct mystruct { + int data; +}; + +int globl; + +static __inline__ __attribute__((always_inline)) getData (struct mystruct *a) { + return a->data * globl; +} + +#include "debug-inlined-section.h" + + +main (int argc, char **argv) +{ + struct mystruct c; + c.data = argc; + globl = c.data; +// globl = getData (&c); + int b = get_length (&c); + printf ("%d\n", b); + return (c.data); +} Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/debug-inlined-section.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/debug-inlined-section.h?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/debug-inlined-section.h (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/debug-inlined-section.h Mon Nov 3 02:35:57 2008 @@ -0,0 +1,15 @@ +/* APPLE LOCAL file, Radar 6275985 */ + +extern int globl; + +static __inline__ __attribute__((always_inline)) get_length (struct mystruct *d) { + if (globl && malloc (globl)) + { + return getData (d) + globl; + } + else + return getData (d) * globl; +} + +extern int globl; + Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-cpu-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-cpu-1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-cpu-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-cpu-1.c Mon Nov 3 02:35:57 2008 @@ -1,7 +1,7 @@ /* Test default cpu type */ /* { dg-do compile { target powerpc*-*-darwin* } } */ /* This test doesn't make sense on 64-bit */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-mmacosx-version-min=10.5" } */ int main() { Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-cpu-2.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-cpu-2.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-cpu-2.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-cpu-2.c Mon Nov 3 02:35:57 2008 @@ -1,7 +1,7 @@ /* Test default cpu type */ /* { dg-do compile { target powerpc*-*-darwin* } } */ /* This test doesn't make sense on 64-bit darwin. */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-mmacosx-version-min=10.4" } */ int main() { Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-x86_32-sse3.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-x86_32-sse3.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-x86_32-sse3.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/default-x86_32-sse3.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file 4515157 */ /* { dg-do compile { target i?86-*-darwin* } } */ -/* { dg-skip-if "" { i?86-*-darwin* } { "-m64" } } */ +/* { dg-require-effective-target ilp32 } */ /* Ensure that 32-bit x86 does not imply -msse3 on Darwin/x86. */ #ifdef __SSE3__ #error "SSE3 should be disabled by default for x86 -m32" Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/dynamic-no-pic-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/dynamic-no-pic-1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/dynamic-no-pic-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/dynamic-no-pic-1.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file Radar 4010664 */ /* { dg-do compile { target i?86*-*-darwin* } } */ -/* { dg-skip-if "" { i?86*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-mdynamic-no-pic -march=pentium4" } */ /* { dg-final { scan-assembler-not "86.get_pc_thunk" } } */ #define TEST_STRING "test string %d" Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-att-stub-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-att-stub-1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-att-stub-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-att-stub-1.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file Radar 4164563 */ /* { dg-do compile { target i?86-*-darwin* } } */ -/* { dg-skip-if "" { i?86-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* APPLE LOCAL axe stubs 5571540 */ /* { dg-options "-matt-stubs -mmacosx-version-min=10.4" } */ /* { dg-final { scan-assembler "hlt" } } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-bitmask1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-bitmask1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-bitmask1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-bitmask1.c Mon Nov 3 02:35:57 2008 @@ -1,7 +1,8 @@ /* APPLE LOCAL file radar 4645709 */ /* { dg-do compile { target "i?86-*-*" } } */ /* { dg-options "-O2" } */ -/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ +/* LLVM LOCAL */ /* { dg-final { scan-assembler "and.*(0xffffff00|4294967040)" } } */ unsigned char lut[256]; /* LLVM LOCAL make these global */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-deep-branch-predict-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-deep-branch-predict-1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-deep-branch-predict-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-deep-branch-predict-1.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file Radar 4010498 et. al. */ /* { dg-do compile { target i?86-*-darwin* } } */ -/* { dg-skip-if "" { i?86-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-march=pentium4 -fPIC" } */ /* { dg-final { scan-assembler "86.get_pc_thunk" } } */ #define TEST_STRING "test string %d" Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-regparmandstackparm-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-regparmandstackparm-1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-regparmandstackparm-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-regparmandstackparm-1.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file 420513 */ /* { dg-do compile { target i?86-*-* } } */ -/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2" } */ /* Look for both entry points to the regparmandstackparm function. */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-ssetype-6.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-ssetype-6.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-ssetype-6.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-ssetype-6.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file 4099020 */ /* { dg-do compile { target i?86-*-* } } */ -/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -msse2 -march=pentium4" } */ /* { dg-final { scan-assembler-times "movq\[^\\n\]*" 3} } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-unaligned-movaps.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-unaligned-movaps.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-unaligned-movaps.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/i386-unaligned-movaps.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL begin radar 4614623 */ /* { dg-do run { target i?86-*-* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-O -mmmx -fomit-frame-pointer -march=pentium-m" } */ #include extern void abort (void); Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/longcall-2.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/longcall-2.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/longcall-2.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/longcall-2.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,27 @@ +/* Verify that switch tables aren't fundamentally broken with + -mlongcall. */ +/* { dg-options "-mlongcall" } */ +/* { dg-do run } */ + +int val = 3; + +int main (void) +{ + switch (val) + { + case 0: + return 1; + case 1: + return 2; + case 2: + return 4; + case 3: + return 0; + case 4: + return 8; + case 5: + return 16; + } + return 32; +} + Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/no-nested-deprecated-warn.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/no-nested-deprecated-warn.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/no-nested-deprecated-warn.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/no-nested-deprecated-warn.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,19 @@ +/* APPLE LOCAL file radar 4746503 */ +/* Don't issue 'deprecated' warning in a function which itself is deprecated. */ + +extern void foo() __attribute__((deprecated)); +extern void bar() __attribute__((deprecated)); + +void foo() {} + +void bar() { + foo(); +} + + +void gorf() { + foo(); /* { dg-warning "\\'foo\\' is deprecated" } */ + bar(); /* { dg-warning "\\'bar\\' is deprecated" } */ +} + + Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/opt-size-2.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/opt-size-2.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/opt-size-2.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/opt-size-2.c Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL file 4231773 */ /* { dg-do compile { target i?86-*-darwin* } } */ -/* { dg-skip-if "" { i?86-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-Oz -static" } */ /* { dg-final { scan-assembler "\tincl?\[ \]*_?global_x" } } */ Added: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/r6292557.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/r6292557.c?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/r6292557.c (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/r6292557.c Mon Nov 3 02:35:57 2008 @@ -0,0 +1,73 @@ +/* APPLE LOCAL begin radar 6292557 (copied from gcc.dg/i386-lshiftrt-1.c) */ +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-g -O2 -msse" } */ +/* { dg-final { scan-assembler "__debug_inlined" } } */ + +typedef double __v2df __attribute__ ((__vector_size__ (16))); +typedef long long __v2di __attribute__ ((__vector_size__ (16))); +typedef int __v4si __attribute__ ((__vector_size__ (16))); +typedef short __v8hi __attribute__ ((__vector_size__ (16))); +typedef char __v16qi __attribute__ ((__vector_size__ (16))); + +typedef __v2di __m128i; +typedef __v2df __m128d; + +static inline __m128i __attribute__((__always_inline__, __nodebug__)) +_mm_packus_epi16 (__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_packuswb128 ((__v8hi)__A, (__v8hi)__B); +} + + +static inline __m128i __attribute__((__always_inline__, __nodebug__)) +_mm_load_si128 (__m128i const *__P) +{ + return *__P; +} + +static inline __m128i __attribute__((__always_inline__, __nodebug__)) +_mm_or_si128 (__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_por128 ((__v2di)__A, (__v2di)__B); +} +static inline __m128i __attribute__((__always_inline__, __nodebug__)) +_mm_add_epi16 (__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_paddw128 ((__v8hi)__A, (__v8hi)__B); +} +static inline int __attribute__((__always_inline__, __nodebug__)) +_mm_cvtsi128_si32 (__m128i __A) +{ + return __builtin_ia32_vec_ext_v4si ((__v4si)__A, 0); +} +void FUNC( unsigned char const* pixPtr) +{ + + __m128i vu16YPredictionHi, vu16YPredictionLo; + + __m128i vu16YPrediction3; + __m128i vtemp0, vtemp1, vtemp2, vtemp3; + + vtemp2 = ((__m128i)__builtin_ia32_pslldqi128 (vu16YPrediction3, (4) * 8)); + vtemp2 = ((__m128i)__builtin_ia32_psrldqi128 (vtemp2, (8) * 8)); + vtemp3 = ((__m128i)__builtin_ia32_psrldqi128 (vu16YPrediction3, (6) * 8)); + vtemp3 = ((__m128i)__builtin_ia32_pslldqi128 (vtemp3, (8) * 8)); + + vu16YPredictionLo = _mm_or_si128(vtemp2, vtemp3); + + __m128i vs16YResidualHi, vs16YResidualLo, vs16YResultHi, vs16YResultLo; + __m128i vu8YResult; + unsigned int itemp0, itemp1, itemp2, itemp3; + vs16YResultHi = _mm_add_epi16(vu16YPredictionHi, vs16YResidualHi); + vs16YResultLo = _mm_add_epi16(vu16YPredictionLo, vs16YResidualLo); + vu8YResult = _mm_packus_epi16(vs16YResultHi, vs16YResultLo); + itemp0 = _mm_cvtsi128_si32(vu8YResult); + vu8YResult = ((__m128i)__builtin_ia32_psrldqi128 (vu8YResult, (4) * 8)); + itemp1 = _mm_cvtsi128_si32(vu8YResult); + vu8YResult = ((__m128i)__builtin_ia32_psrldqi128 (vu8YResult, (4) * 8)); + itemp2 = _mm_cvtsi128_si32(vu8YResult); + vu8YResult = ((__m128i)__builtin_ia32_psrldqi128 (vu8YResult, (4) * 8)); + itemp3 = _mm_cvtsi128_si32(vu8YResult); + *(unsigned int*)pixPtr = itemp0; +} +/* APPLE LOCAL end radar 4266982 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/cpp/_Pragma3.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/cpp/_Pragma3.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/cpp/_Pragma3.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.dg/cpp/_Pragma3.c Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ /* { dg-do preprocess } */ /* Pragma buffers have a NULL "inc" member, which we would dereference - when getting a file's date and time. + when getting a file's date and time. Based on PR 7526. 14 Aug 2002. */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/4891561.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/4891561.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/4891561.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/4891561.c Mon Nov 3 02:35:57 2008 @@ -1,7 +1,7 @@ /* APPLE LOCAL file radar 4891561 */ /* { dg-do compile { target i?86-*-darwin* } } */ /* { dg-options "-O1 -std=gnu99 -fno-inline -fschedule-insns -mtune=pentium-m" } */ -/* { dg-skip-if "" { i?86-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ static inline unsigned char ceq (unsigned char a, unsigned char b) { Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/reload-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/reload-1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/reload-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/reload-1.c Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ /* { dg-options "-O3 -msse2 -fdump-rtl-csa" } */ /* LLVM LOCAL fdump not supported */ /* { dg-require-fdump "" } */ -/* { dg-skip-if "" { i?86-*-* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-final { scan-rtl-dump "deleted 5 dead insns" "csa" } }*/ #include typedef __SIZE_TYPE__ size_t; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/stack-prot-kernel.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/stack-prot-kernel.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/stack-prot-kernel.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/stack-prot-kernel.c Mon Nov 3 02:35:57 2008 @@ -1,5 +1,6 @@ /* { dg-do compile { target lp64 } } */ -/* { dg-skip-if "darwin x86_64 is pic" { *-*-darwin* } { "-m64" } { "" } } */ +/* APPLE LOCAL 64 bit default */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -fstack-protector-all -mcmodel=kernel" } */ void test1 (int x) Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/powerpc/darwin-bool-1.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/powerpc/darwin-bool-1.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/powerpc/darwin-bool-1.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/powerpc/darwin-bool-1.c Mon Nov 3 02:35:57 2008 @@ -1,7 +1,8 @@ /* Check that sizeof(bool) is 4 if we don't use special options. */ /* Matt Austern */ /* { dg-do run { target powerpc*-*-darwin* } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ +/* APPLE LOCAL 64 bit default */ +/* { dg-require-effective-target ilp32 } */ int dummy1[sizeof(_Bool) - 3]; int dummy2[5 - sizeof(_Bool)]; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/x86_64/abi/test_struct_returning.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/x86_64/abi/test_struct_returning.c?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/x86_64/abi/test_struct_returning.c (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/x86_64/abi/test_struct_returning.c Mon Nov 3 02:35:57 2008 @@ -233,7 +233,7 @@ D(600) /* LLVM LOCAL */ D(601) D(602) - if (num_failed) + if (num_failed) abort (); return 0; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/bitfield-1.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/bitfield-1.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/bitfield-1.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/bitfield-1.mm Mon Nov 3 02:35:57 2008 @@ -8,7 +8,7 @@ /* { dg-options "-Wpadded -Wabi" } */ /* { dg-do run } */ /* APPLE LOCAL radar 4894756 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* APPLE LOCAL ARM objc2 */ /* { dg-skip-if "" { arm*-*-darwin* } { "*" } { "" } } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/bitfield-4.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/bitfield-4.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/bitfield-4.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/bitfield-4.mm Mon Nov 3 02:35:57 2008 @@ -5,7 +5,7 @@ /* { dg-options "-lobjc -Wpadded" } */ /* { dg-do run } */ /* APPLE LOCAL radar 4894756 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* APPLE LOCAL ARM objc2 */ /* { dg-skip-if "" { arm*-*-darwin* } { "*" } { "" } } */ Added: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/cond-expr-warn.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/cond-expr-warn.mm?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/cond-expr-warn.mm (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/cond-expr-warn.mm Mon Nov 3 02:35:57 2008 @@ -0,0 +1,10 @@ +/* APPLE LOCAL file radar 6231433 */ +/* { dg-do compile } */ + + at interface NSKey @end + at interface UpdatesList @end + +void foo (int i, NSKey *NSKeyValueCoding_NullValue, UpdatesList *nukedUpdatesList) +{ + i ? NSKeyValueCoding_NullValue : nukedUpdatesList; /* { dg-warning "conditional expression" } */ +} Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-cfstring-4.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/const-cfstring-4.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-cfstring-4.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-cfstring-4.mm Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* { dg-options "-fconstant-cfstrings" } */ /* { dg-do compile { target *-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ typedef const struct __CFString * CFStringRef; CFStringRef appKey = (CFStringRef) @"com.apple.soundpref"; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-str-10.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/const-str-10.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-str-10.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-str-10.mm Mon Nov 3 02:35:57 2008 @@ -5,7 +5,7 @@ /* { dg-options "-fnext-runtime -fno-constant-cfstrings" } */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-str-11.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/const-str-11.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-str-11.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-str-11.mm Mon Nov 3 02:35:57 2008 @@ -5,7 +5,7 @@ /* { dg-options "-fnext-runtime -fno-constant-cfstrings -fconstant-string-class=XStr" } */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-str-12.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/const-str-12.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-str-12.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-str-12.mm Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* { dg-options "-fno-constant-cfstrings -fconstant-string-class=Foo" } */ /* { dg-do compile { target *-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-str-13.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/const-str-13.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-str-13.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-str-13.mm Mon Nov 3 02:35:57 2008 @@ -5,7 +5,7 @@ /* { dg-options "-fno-constant-cfstrings -fwritable-strings -fconstant-string-class=Foo -mmacosx-version-min=10.4" { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-options "-fno-constant-cfstrings -fwritable-strings -fconstant-string-class=Foo" { target arm*-*-darwin* } } */ /* { dg-do run { target *-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #include #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-str-9.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/const-str-9.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-str-9.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/const-str-9.mm Mon Nov 3 02:35:57 2008 @@ -5,7 +5,7 @@ /* { dg-options "-fnext-runtime -fno-constant-cfstrings" } */ /* APPLE LOCAL ARM radar 5804096 */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/cxx-ivars-3.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/cxx-ivars-3.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/cxx-ivars-3.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/cxx-ivars-3.mm Mon Nov 3 02:35:57 2008 @@ -5,7 +5,7 @@ // APPLE LOCAL radar 4842158 // { dg-options "-fnext-runtime -mmacosx-version-min=10.3" } /* APPLE LOCAL radar 4280641 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #include #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/debug-1.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/debug-1.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/debug-1.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/debug-1.mm Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ /* Tesst debug info for virtual base class. */ /* { dg-do compile } */ /* { dg-options "-gstabs+ -gfull" } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* LLVM LOCAL llvm doesn't currently support stabs. */ /* { dg-require-stabs "" } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/defs-warn-1.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/defs-warn-1.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/defs-warn-1.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/defs-warn-1.mm Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ /* { dg-options "-lobjc -Wobjc2" } */ /* { dg-do run } */ /* APPLE LOCAL radar 4894756 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* APPLE LOCAL ARM objc2 */ /* { dg-skip-if "" { arm*-*-darwin* } { "*" } { "" } } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/defs.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/defs.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/defs.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/defs.mm Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* { dg-options "-lobjc" } */ /* { dg-do run } */ /* APPLE LOCAL radar 4894756 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* APPLE LOCAL ARM objc2 */ /* { dg-skip-if "" { arm*-*-darwin* } { "*" } { "" } } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/layout-1.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/layout-1.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/layout-1.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/layout-1.mm Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-options "-Wpadded -Wpacked -Wabi" } */ /* APPLE LOCAL radar 4894756 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* APPLE LOCAL radar 4894756 */ #include "../objc/execute/Object2.h" Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/method-11.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/method-11.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/method-11.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/method-11.mm Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* { dg-options "-fnext-runtime" } */ /* { dg-do compile } */ /* APPLE LOCAL radar 4894756 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* APPLE LOCAL ARM objc2 */ /* { dg-skip-if "" { arm*-*-darwin* } { "*" } { "" } } */ Added: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/method-type-attribute.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/method-type-attribute.mm?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/method-type-attribute.mm (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/method-type-attribute.mm Mon Nov 3 02:35:57 2008 @@ -0,0 +1,12 @@ +/* APPLE LOCAL file radar 6261630 */ +/* Test use of trailing attribute in a method return type. */ +/* { dg-options "-fobjc-gc" } */ +/* { dg-do compile { target *-*-darwin* } } */ + + at interface INTF +- (const char * __attribute__((objc_gc(strong))))encoding; +- (id __strong)encoding1; +- (const char * __weak)encoding2; +- (const char ** __strong)encoding3; + at end + Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-fast-1.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc-fast-1.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-fast-1.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-fast-1.mm Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ /* Developed by Ziemowit Laski */ /* { dg-do compile { target powerpc*-*-darwin* } } */ /* { dg-options "-fnext-runtime -fobjc-gc -fobjc-direct-dispatch -Wassign-intercept" } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-require-effective-target objc_gc } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-fast-2.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc-fast-2.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-fast-2.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-fast-2.mm Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ /* Developed by Ziemowit Laski */ /* { dg-do compile { target powerpc*-*-darwin* } } */ /* { dg-options "-fnext-runtime -fobjc-gc -fobjc-direct-dispatch -Wno-assign-intercept -O2" } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-require-effective-target objc_gc } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-fast-3.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc-fast-3.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-fast-3.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-fast-3.mm Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* Developed by Ziemowit Laski */ /* { dg-do compile { target powerpc*-*-darwin* } } */ /* { dg-options "-fnext-runtime -fobjc-gc -fobjc-direct-dispatch -Wno-assign-intercept -O2" } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-require-effective-target objc_gc } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-fast-4.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc-fast-4.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-fast-4.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-fast-4.mm Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ with -O0, so the sibcall case cannot occur. */ /* { dg-do compile { target powerpc*-*-darwin* } } */ /* { dg-options "-O0 -fobjc-direct-dispatch" } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-fpret-1.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc-fpret-1.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-fpret-1.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-fpret-1.mm Mon Nov 3 02:35:57 2008 @@ -1,6 +1,7 @@ /* APPLE LOCAL begin radar 4280641 */ /* { dg-do compile { target i?86-*-darwin* } } */ -/* { dg-skip-if "" { i?86-*-darwin* } { "-m64" } { "" } } */ +/* APPLE LOCAL 64 bit default */ +/* { dg-require-effective-target ilp32 } */ #include @interface Example : Object Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-1.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc-gc-1.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-1.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-1.mm Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* A compile-only test for insertion of write barriers. */ /* Developed by Ziemowit Laski */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-options "-fnext-runtime -fobjc-gc -Wassign-intercept" } */ +/* { dg-options "-fnext-runtime -fobjc-gc -Wno-non-lvalue-assign -Wassign-intercept" } */ /* { dg-require-effective-target objc_gc } */ #ifndef __OBJC_GC__ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-2.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc-gc-2.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-2.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-2.mm Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* A compile-only test for insertion of write barriers. */ /* Developed by Ziemowit Laski */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-options "-fnext-runtime -fobjc-gc -Wassign-intercept" } */ +/* { dg-options "-fnext-runtime -fobjc-gc -Wno-non-lvalue-assign -Wassign-intercept" } */ /* { dg-require-effective-target objc_gc } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-4.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc-gc-4.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-4.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-4.mm Mon Nov 3 02:35:57 2008 @@ -5,7 +5,7 @@ /* { dg-do run { target powerpc*-*-darwin* } } */ /* { dg-options "-fnext-runtime -fobjc-gc -mmacosx-version-min=10.3" } */ /* APPLE LOCAL radar 4894756 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-require-effective-target objc_gc } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-8.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc-gc-8.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-8.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-8.mm Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* Do _not_ generate write barriers for global function pointers, even ones returning 'id'. */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-options "-fnext-runtime -fobjc-gc -Wassign-intercept" } */ +/* { dg-options "-fnext-runtime -fobjc-gc -Wno-non-lvalue-assign -Wassign-intercept" } */ /* { dg-require-effective-target objc_gc } */ /* APPLE LOCAL radar 4894756 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-section-1.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc-gc-section-1.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-section-1.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-section-1.mm Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ with flag of 0 */ /* { dg-do compile } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-skip-if "" { arm*-*-darwin* } { "*" } { "" } } */ @interface INTF Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-section-2.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc-gc-section-2.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-section-2.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-section-2.mm Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* Check that -fobjc-gc-only option produces a 110 flag in objc section. */ /* { dg-options "-fobjc-gc-only" } */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-require-effective-target objc_gc } */ @interface INTF Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-weak-1.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc-gc-weak-1.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-weak-1.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-gc-weak-1.mm Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* A run-time test for insertion of write barriers for __weak objects. */ /* { dg-do run { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-options "-fnext-runtime -fobjc-gc" } */ +/* { dg-options "-fnext-runtime -fobjc-gc -Wno-non-lvalue-assign" } */ /* { dg-require-effective-target objc_gc } */ #include Added: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-property-enumtype.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc-property-enumtype.mm?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-property-enumtype.mm (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-property-enumtype.mm Mon Nov 3 02:35:57 2008 @@ -0,0 +1,62 @@ +/* APPLE LOCAL file radar 6264448 */ +/* Test that property of enum types don't cause error + when setter call is generated. */ +/* { dg-do run { target *-*-darwin* } } */ +/* { dg-options "-framework Foundation -Werror" } */ + +#import + +enum TimeType { + TimeTypeZero = 0, + TimeTypeOne = 1, + TimeTypeTwo = 2 +}; + +typedef enum TimeType TimeType; + + + at interface A : NSObject { + TimeType tt; +} + + at property (nonatomic) TimeType tt; + + at end + + at interface B : NSObject { + TimeType tt; +} + + at property (nonatomic) TimeType tt; + + at end + + at implementation A + + at synthesize tt; + + at end + + at implementation B + + at synthesize tt; + + at end + +int main (int argc, const char * argv[]) { + NSAutoreleasePool * pool = [[NSAutoreleasePool alloc] init]; + + A* a = [[A alloc] init]; + B* b = [[B alloc] init]; + + a.tt = TimeTypeOne; + // failure here: + b.tt = a.tt; + + b.tt = [a tt]; + + [b setTt: [a tt]]; + + [pool drain]; + return 0; +} Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-stret-1.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc-stret-1.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-stret-1.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-stret-1.mm Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ that is memory bound, we still generate objc_msgSend_stret for all platforms. */ /* { dg-do compile { target *-*-darwin* } } */ /* APPLE LOCAL radar 4492976 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ @interface Joiner { } Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-visibility-hidden-1.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc-visibility-hidden-1.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-visibility-hidden-1.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc-visibility-hidden-1.mm Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* Test for visibility 'hidden' flag inserted in 32bit objc class's meta-data. */ /* { dg-options "-mmacosx-version-min=10.5" { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-do compile { target *-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-skip-if "" { arm*-*-darwin* } { "*" } { "" } } */ __attribute__((visibility("hidden"))) Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc2-protocol-1.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc2-protocol-1.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc2-protocol-1.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc2-protocol-1.mm Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file 4695109 */ +/* APPLE LOCAL file 4695109 - modified for radar 6255913 */ /* Protocol meta-data for protocol used in @protocol expression must be generated. */ /* { dg-options "-mmacosx-version-min=10.5 -fobjc-abi-version=2" { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-do compile { target *-*-darwin* } } */ @@ -15,6 +15,6 @@ return (long) @protocol(Proto1); } /* LLVM LOCAL begin accept llvm syntax */ -/* { dg-final { scan-assembler "L_.*OBJC_PROTOCOL_\\\$_Proto1:" } } */ +/* { dg-final { scan-assembler "l_.*OBJC_PROTOCOL_\\\$_Proto1:" } } */ /* { dg-final { scan-assembler-not ".*_OBJC_PROTOCOL_\\\$_Proto2" } } */ -/* LLVM LOCAL end */ \ No newline at end of file +/* LLVM LOCAL end */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc2-protocol-2.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc2-protocol-2.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc2-protocol-2.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc2-protocol-2.mm Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file 4695109 */ +/* APPLE LOCAL file 4695109 - modified for radar 6255913 */ /* Check for generation of protocol meta-data */ /* { dg-options "-mmacosx-version-min=10.5 -fobjc-abi-version=2" { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-do compile { target *-*-darwin* } } */ @@ -12,6 +12,6 @@ @interface Super { id isa; } @end @implementation Super @end /* LLVM LOCAL begin llvm syntax */ -/* { dg-final { scan-assembler "L_.*OBJC_PROTOCOL_\\\$_Proto1:" } } */ -/* { dg-final { scan-assembler "L_.*OBJC_PROTOCOL_\\\$_Proto2:" } } */ +/* { dg-final { scan-assembler "l_.*OBJC_PROTOCOL_\\\$_Proto1:" } } */ +/* { dg-final { scan-assembler "l_.*OBJC_PROTOCOL_\\\$_Proto2:" } } */ /* LLVM LOCAL end */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc2-protocol-4.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc2-protocol-4.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc2-protocol-4.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc2-protocol-4.mm Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file 5465109 */ +/* APPLE LOCAL file 5465109 - modified for radar 6255913 */ /* The following test program should emit metadata for _OBJC_PROTOCOL_$_Proto2 and _OBJC_PROTOCOL_$__Proto1. This root emits both protocols and puts them both in __protocol_list. @@ -21,6 +21,6 @@ return (long)@protocol(Proto2); } /* LLVM LOCAL begin llvm syntax */ -/* { dg-final { scan-assembler "L_.*OBJC_PROTOCOL_\\\$_Proto1:" } } */ -/* { dg-final { scan-assembler "L_.*OBJC_PROTOCOL_\\\$_Proto2:" } } */ +/* { dg-final { scan-assembler "l_.*OBJC_PROTOCOL_\\\$_Proto1:" } } */ +/* { dg-final { scan-assembler "l_.*OBJC_PROTOCOL_\\\$_Proto2:" } } */ /* LLVM LOCAL end */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc2-protocol-5.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc2-protocol-5.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc2-protocol-5.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc2-protocol-5.mm Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file 4695109 */ +/* APPLE LOCAL file 4695109 - modified for radar 6255913 */ /* { dg-options "-mmacosx-version-min=10.5 -fobjc-abi-version=2" { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-do compile { target *-*-darwin* } } */ @@ -14,4 +14,4 @@ return (long) @protocol(Proto1); } /* LLVM LOCAL llvm syntax */ -/* { dg-final { scan-assembler "L_.*OBJC_PROTOCOL_\\\$_Proto1:" } } */ +/* { dg-final { scan-assembler "l_.*OBJC_PROTOCOL_\\\$_Proto1:" } } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc2-protocol-9.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/objc2-protocol-9.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc2-protocol-9.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/objc2-protocol-9.mm Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file 4695109 */ +/* APPLE LOCAL file 4695109 - modified for radar 6255913 */ /* Cechk that both protocols metadata generated for them. */ /* { dg-options "-mmacosx-version-min=10.5 -fobjc-abi-version=2" { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-do compile { target *-*-darwin* } } */ @@ -19,6 +19,6 @@ @implementation Foo (Category) @end /* LLVM LOCAL begin accept llvm syntax */ -/* { dg-final { scan-assembler "L_.*OBJC_PROTOCOL_\\\$_Proto1:" } } */ -/* { dg-final { scan-assembler "L_.*OBJC_PROTOCOL_\\\$_Proto2:" } } */ +/* { dg-final { scan-assembler "l_.*OBJC_PROTOCOL_\\\$_Proto1:" } } */ +/* { dg-final { scan-assembler "l_.*OBJC_PROTOCOL_\\\$_Proto2:" } } */ /* LLVM LOCAL end */ Added: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/property-missing-comma.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/property-missing-comma.mm?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/property-missing-comma.mm (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/property-missing-comma.mm Mon Nov 3 02:35:57 2008 @@ -0,0 +1,16 @@ +/* APPLE LOCAL file radar 6302949 */ +/* { dg-options "-mmacosx-version-min=10.5" { target *-*-darwin* } } */ +/* { dg-do compile } */ + + at interface BadPropClass // : NSObject +{ + int _awesome; +} + + at property (readonly) int hello; + at property (nonatomic readonly, getter=isAwesome) int _awesome; /* { dg-warning " property attributes must be separated by a comma" } */ + at property (nonatomic, readonly, getter=isAwesome) int _anew; + at property (nonatomic, readonly, getter=isAwesome) int _anew1; + + at end + Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/property-neg-3.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/property-neg-3.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/property-neg-3.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/property-neg-3.mm Mon Nov 3 02:35:57 2008 @@ -1,8 +1,6 @@ /* APPLE LOCAL file radar 4436866 */ /* Check for proper declaration of @property. */ -/* APPLE LOCAL radar 4899595 */ -/* { dg-options "-fno-objc-new-property -mmacosx-version-min=10.5" { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-options "-fno-objc-new-property" { target arm*-*-darwin* } } */ +/* { dg-options "-mmacosx-version-min=10.5" { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-do compile { target *-*-darwin* } } */ @interface Bar Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/sync-objc-exception.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/sync-objc-exception.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/sync-objc-exception.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/sync-objc-exception.mm Mon Nov 3 02:35:57 2008 @@ -5,7 +5,7 @@ */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-options "-fobjc-exceptions -Os -Wextra -Werror" } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ struct MyPoint { int x; }; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/syntax-error-7.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/syntax-error-7.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/syntax-error-7.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/syntax-error-7.mm Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL begin radar 4290840 */ +/* APPLE LOCAL file radar 4290840 - Modified for radar 6271728 */ /* { dg-do compile } */ @interface Foo @@ -8,7 +8,7 @@ @implementation Foo -(void) -(void) someMethod /* { dg-error "expected before .-." } */ + /* { dg-error "expected" "" { target *-*-* } 10 } */ { } @end -/* APPLE LOCAL end radar 4290840 */ Added: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/syntax-error-9.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/syntax-error-9.mm?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/syntax-error-9.mm (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/syntax-error-9.mm Mon Nov 3 02:35:57 2008 @@ -0,0 +1,9 @@ +/* APPLE LOCAL file radar 6271728 */ +/* Check for error reporting of bad method definition. */ + at interface MyClass + at end + + + at implementation MyClass +- (void) ni + at end /* { dg-error "expected `\{' before \\'end\\'" } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/template-4.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/template-4.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/template-4.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/template-4.mm Mon Nov 3 02:35:57 2008 @@ -6,7 +6,7 @@ /* APPLE LOCAL Radar 5706927 */ /* { dg-do run { target powerpc*-*-darwin* } } */ /* APPLE LOCAL radar 4894756 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* APPLE LOCAL radar 4894756 */ #include "../objc/execute/Object2.h" Modified: llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/try-catch-20.mm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/obj-c%2B%2B.dg/try-catch-20.mm?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/try-catch-20.mm (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/obj-c++.dg/try-catch-20.mm Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ all uncaught exceptions. */ /* { dg-options "-fobjc-exceptions" } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-do run } */ extern "C" void abort (void); Added: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/6255801.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/6255801.m?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/6255801.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/6255801.m Mon Nov 3 02:35:57 2008 @@ -0,0 +1,6 @@ +/* APPLE LOCAL file 6255801 */ +/* { dg-do compile { target *-*-darwin* } } */ + at interface Foo @end + at implementation Foo @end +/* Any alignment above ".align 3" (=64-bit) is too much. */ +/* { dg-final { scan-assembler-not "\.align\[\t \]+\[4-9\]" } } */ Added: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/6311054.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/6311054.m?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/6311054.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/6311054.m Mon Nov 3 02:35:57 2008 @@ -0,0 +1,16 @@ +/* APPLE LOCAL file 6311054 */ +/* { dg-do compile } */ +/* { dg-options { -fPIC -quiet -mfix-and-continue -m64 -mmacosx-version-min=10.5 } } */ +typedef unsigned char uint8_t; +typedef unsigned int uint32_t; +static const uint8_t kObfuscationKey[] = { + 0x7d, 0x89, 0x52, 0x23, 0xd2, 0xbc, 0xdd, 0xea, 0xa3, 0xb9, 0x1f }; +void obfuscate( void *buffer, uint32_t bufferLength ) { + uint8_t *pBuf = (uint8_t *) buffer; + const uint8_t *pKey = kObfuscationKey, *eKey = pKey + sizeof( kObfuscationKey ); + while ( bufferLength-- ) { + *pBuf = *pBuf ^ *pKey; + ++pKey; + if ( pKey == eKey ) pKey = kObfuscationKey; + } +} Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/bitfield-3.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/bitfield-3.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/bitfield-3.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/bitfield-3.m Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* { dg-options "-lobjc -Wpadded" } */ /* { dg-do run } */ /* APPLE LOCAL begin objc2 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-skip-if "" { arm*-*-darwin* } { "*" } { "" } } */ /* APPLE LOCAL end objc2 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/bitfield-5.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/bitfield-5.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/bitfield-5.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/bitfield-5.m Mon Nov 3 02:35:57 2008 @@ -7,7 +7,7 @@ /* { dg-options "-Wpadded" } */ /* { dg-do run } */ /* APPLE LOCAL begin objc2 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-skip-if "" { arm*-*-darwin* } { "*" } { "" } } */ /* APPLE LOCAL end objc2 */ Added: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/cond-expr-warn.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/cond-expr-warn.m?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/cond-expr-warn.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/cond-expr-warn.m Mon Nov 3 02:35:57 2008 @@ -0,0 +1,10 @@ +/* APPLE LOCAL file radar 6231433 */ +/* { dg-do compile } */ + + at interface NSKey @end + at interface UpdatesList @end + +void foo (int i, NSKey *NSKeyValueCoding_NullValue, UpdatesList *nukedUpdatesList) +{ + i ? NSKeyValueCoding_NullValue : nukedUpdatesList; /* { dg-warning "conditional expression" } */ +} Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-cfstring-4.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-cfstring-4.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-cfstring-4.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-cfstring-4.m Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* { dg-options "-fconstant-cfstrings" } */ /* { dg-do compile { target *-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ typedef const struct __CFString * CFStringRef; static CFStringRef appKey = (CFStringRef) @"com.apple.soundpref"; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-10.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-10.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-10.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-10.m Mon Nov 3 02:35:57 2008 @@ -5,7 +5,7 @@ /* APPLE LOCAL file 4149909 */ /* { dg-options "-fnext-runtime -fno-constant-cfstrings" } */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-11.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-11.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-11.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-11.m Mon Nov 3 02:35:57 2008 @@ -5,7 +5,7 @@ /* APPLE LOCAL file 4149909 */ /* { dg-options "-fnext-runtime -fno-constant-cfstrings -fconstant-string-class=XStr" } */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-12.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-12.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-12.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-12.m Mon Nov 3 02:35:57 2008 @@ -1,7 +1,7 @@ /* { dg-options "-Wall -funit-at-a-time -fgnu-runtime" } */ /* { dg-do compile } */ /* APPLE LOCAL objc2 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* PR objc/27438, make sure that the decl produced by the front-end does not cause a warning to be produced. */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-13.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-13.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-13.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-13.m Mon Nov 3 02:35:57 2008 @@ -5,7 +5,7 @@ /* { dg-options "-fno-constant-cfstrings -fwritable-strings -fconstant-string-class=Foo -mmacosx-version-min=10.4" { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-options "-fno-constant-cfstrings -fwritable-strings -fconstant-string-class=Foo" { target arm*-*-darwin* } } */ /* { dg-do run { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #include #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-6.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-6.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-6.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/const-str-6.m Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* { dg-options "-fno-constant-cfstrings -fconstant-string-class=MyConstantString" } */ /* { dg-do compile } */ /* APPLE LOCAL objc2 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ @interface MyBase { char p; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/defs-warn-1.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/defs-warn-1.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/defs-warn-1.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/defs-warn-1.m Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* Issue warning wherevr @defs is used. */ /* { dg-options "-lobjc -Wobjc2" } */ /* { dg-do run { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #include #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/defs.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/defs.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/defs.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/defs.m Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* { dg-options "-lobjc" } */ /* { dg-do run } */ /* APPLE LOCAL begin objc2 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-skip-if "" { arm*-*-darwin* } { "*" } { "" } } */ /* APPLE LOCAL end objc2 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/encode-7a.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/encode-7a.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/encode-7a.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/encode-7a.m Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* { dg-do run { target *-*-darwin* } } */ /* { dg-options "-fnext-runtime" } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* APPLE LOCAL radar 4894756 */ #include "../objc/execute/Object2.h" Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/image-info.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/image-info.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/image-info.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/image-info.m Mon Nov 3 02:35:57 2008 @@ -6,7 +6,7 @@ /* APPLE LOCAL ARM objc2 */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* APPLE LOCAL radar 4894756 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #ifndef __NEXT_RUNTIME__ #error Feature not currently supported by the GNU runtime Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/layout-1.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/layout-1.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/layout-1.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/layout-1.m Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-options "-Wpadded -Wpacked" } */ /* APPLE LOCAL radar 4894756 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* APPLE LOCAL radar 4894756 */ #include "../objc/execute/Object2.h" Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/method-4.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/method-4.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/method-4.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/method-4.m Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* { dg-options "-fnext-runtime" } */ /* { dg-do compile } */ /* APPLE LOCAL begin objc2 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-skip-if "" { arm*-*-darwin* } { "*" } { "" } } */ /* APPLE LOCAL end objc2 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/next-runtime-1.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/next-runtime-1.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/next-runtime-1.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/next-runtime-1.m Mon Nov 3 02:35:57 2008 @@ -7,7 +7,7 @@ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-options "-fnext-runtime" } */ /* APPLE LOCAL 64-bit 4492976 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* APPLE LOCAL radar 4894756 */ #include "../objc/execute/Object2.h" Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-dir-dispatch.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-dir-dispatch.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-dir-dispatch.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-dir-dispatch.m Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ -mmacosx-version-min=10.4. */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-options "-mmacosx-version-min=10.4" { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* APPLE LOCAL radar 4894756 */ #include "../objc/execute/Object2.h" Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-1.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-1.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-1.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-1.m Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ /* Developed by Ziemowit Laski */ /* { dg-do compile { target powerpc*-*-darwin* } } */ /* { dg-options "-fnext-runtime -fobjc-gc -fobjc-direct-dispatch -Wassign-intercept" } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-require-effective-target objc_gc } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-2.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-2.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-2.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-2.m Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ /* Developed by Ziemowit Laski */ /* { dg-do compile { target powerpc*-*-darwin* } } */ /* { dg-options "-fnext-runtime -fobjc-gc -fobjc-direct-dispatch -Wno-assign-intercept -O2" } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-require-effective-target objc_gc } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-3.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-3.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-3.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-3.m Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* Developed by Ziemowit Laski */ /* { dg-do compile { target powerpc*-*-darwin* } } */ /* { dg-options "-fnext-runtime -fobjc-gc -fobjc-direct-dispatch -Wno-assign-intercept -O2" } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-require-effective-target objc_gc } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-4.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-4.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-4.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fast-4.m Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ /* { dg-do compile { target powerpc*-*-darwin* } } */ /* APPLE LOCAL ObjC direct dispatch */ /* { dg-options "-O0 -fobjc-direct-dispatch -fnext-runtime" } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* Radar 4015820 */ /* { dg-skip-if "" { powerpc*-*-darwin* } { "-m64" } { "" } } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fpret-1.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fpret-1.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fpret-1.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fpret-1.m Mon Nov 3 02:35:57 2008 @@ -1,6 +1,6 @@ /* APPLE LOCAL begin radar 4280641 */ /* { dg-do compile { target i?86-*-darwin* } } */ -/* { dg-skip-if "" { i?86-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #include @interface Example : Object Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fpret-2.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fpret-2.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fpret-2.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-fpret-2.m Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ */ /* { dg-options "-mmacosx-version-min=10.5 -fobjc-abi-version=2" } */ /* { dg-do compile { target i?86-*-darwin* } } */ -/* { dg-skip-if "" { i?86-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ @interface Test @end @implementation Test Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-1.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-1.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-1.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-1.m Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* A compile-only test for insertion of write barriers. */ /* Developed by Ziemowit Laski */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-options "-fnext-runtime -fobjc-gc -Wassign-intercept" } */ +/* { dg-options "-fnext-runtime -fobjc-gc -Wno-non-lvalue-assign -Wassign-intercept" } */ /* { dg-require-effective-target objc_gc } */ #ifndef __OBJC_GC__ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-2.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-2.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-2.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-2.m Mon Nov 3 02:35:57 2008 @@ -2,9 +2,9 @@ /* A run-time test for insertion of write barriers. */ /* { dg-do run { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-options "-fnext-runtime -fobjc-gc" } */ -/* { dg-options "-fnext-runtime -fobjc-gc -mmacosx-version-min=10.3" { target powerpc*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-options "-fnext-runtime -fobjc-gc -Wno-non-lvalue-assign" } */ +/* { dg-options "-fnext-runtime -fobjc-gc -Wno-non-lvalue-assign -mmacosx-version-min=10.3" { target powerpc*-*-darwin* } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-require-effective-target objc_gc } */ #include Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-7.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-7.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-7.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-7.m Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* Do _not_ generate write barriers for global function pointers, even ones returning 'id'. */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-options "-fnext-runtime -fobjc-gc -Wassign-intercept" } */ +/* { dg-options "-fnext-runtime -fobjc-gc -Wno-non-lvalue-assign -Wassign-intercept" } */ /* { dg-require-effective-target objc_gc } */ /* APPLE LOCAL radar 4894756 */ Added: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-lvalue-cast-warn.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-lvalue-cast-warn.m?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-lvalue-cast-warn.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-lvalue-cast-warn.m Mon Nov 3 02:35:57 2008 @@ -0,0 +1,11 @@ +/* APPLE LOCAL file radar 6269491 */ +/* Test that lvalue cast with -fobjc-gc also results in a warning. */ +/* { dg-options "-fobjc-gc" } */ + + at interface I @end + +void foo(I* pI) +{ + (id) pI = 0; /* { dg-warning "target of assignment not really an lvalue" } */ +} + Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-section-1.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-section-1.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-section-1.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-section-1.m Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ with flag of 0 */ /* { dg-do compile } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-skip-if "" { arm*-*-darwin* } { "*" } { "" } } */ @interface INTF Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-section-2.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-section-2.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-section-2.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-section-2.m Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* Check that -fobjc-gc-only option produces a 110 flag in objc section. */ /* { dg-options "-fobjc-gc-only" } */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-require-effective-target objc_gc } */ @interface INTF Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-weak-1.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-weak-1.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-weak-1.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-gc-weak-1.m Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* A run-time test for insertion of write barriers for __weak objects. */ /* { dg-do run { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-options "-fnext-runtime -fobjc-gc" } */ +/* { dg-options "-fnext-runtime -fobjc-gc -Wno-non-lvalue-assign" } */ /* { dg-require-effective-target objc_gc } */ #include Added: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-property-enumtype.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-property-enumtype.m?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-property-enumtype.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-property-enumtype.m Mon Nov 3 02:35:57 2008 @@ -0,0 +1,62 @@ +/* APPLE LOCAL file radar 6264448 */ +/* Test that property of enum types don't cause error + when setter call is generated. */ +/* { dg-do run { target *-*-darwin* } } */ +/* { dg-options "-framework Foundation -Werror" } */ + +#import + +enum TimeType { + TimeTypeZero = 0, + TimeTypeOne = 1, + TimeTypeTwo = 2 +}; + +typedef enum TimeType TimeType; + + + at interface A : NSObject { + TimeType tt; +} + + at property (nonatomic) TimeType tt; + + at end + + at interface B : NSObject { + TimeType tt; +} + + at property (nonatomic) TimeType tt; + + at end + + at implementation A + + at synthesize tt; + + at end + + at implementation B + + at synthesize tt; + + at end + +int main (int argc, const char * argv[]) { + NSAutoreleasePool * pool = [[NSAutoreleasePool alloc] init]; + + A* a = [[A alloc] init]; + B* b = [[B alloc] init]; + + a.tt = TimeTypeOne; + // failure here: + b.tt = a.tt; + + b.tt = [a tt]; + + [b setTt: [a tt]]; + + [pool drain]; + return 0; +} Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-visibility-hidden-1.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-visibility-hidden-1.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-visibility-hidden-1.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc-visibility-hidden-1.m Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* Test for visibility 'hidden' flag inserted in 32bit objc class's meta-data. */ /* { dg-options "-mmacosx-version-min=10.5" } */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ __attribute__((visibility("hidden"))) @interface Foo { Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-alignment-test-1.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-alignment-test-1.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-alignment-test-1.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-alignment-test-1.m Mon Nov 3 02:35:57 2008 @@ -2,7 +2,7 @@ /* Test that alignment of __class_list sections, among others, are at their 'natural' alignment on x86. */ /* { dg-do compile { target i?86-*-darwin* } } */ -/* { dg-skip-if "" { i?86-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-options "-mmacosx-version-min=10.5 -fobjc-abi-version=2" } */ @interface c1 @end @@ -39,4 +39,4 @@ /* LLVM LOCAL begin accept llvm syntax */ /* { dg-final { scan-assembler "\t.align( |\t)2\nL_OBJC_LABEL_CLASS_\\\$:" } } */ /* { dg-final { scan-assembler "\t.align( |\t)2\nL_OBJC_LABEL_NONLAZY_CLASS_\\\$:" } } */ -/* LLVM LOCAL end */ \ No newline at end of file +/* LLVM LOCAL end */ Added: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-newmetadata-sections.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-newmetadata-sections.m?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-newmetadata-sections.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-newmetadata-sections.m Mon Nov 3 02:35:57 2008 @@ -0,0 +1,12 @@ +/* APPLE LOCAL file radar 6255595 */ +/* Check for generation of new sections for objc2 meta-data. */ +/* { dg-options "-fobjc-abi-version=2 -mmacosx-version-min=10.6" } */ +/* { dg-do compile */ + at protocol PROTO + at end + + at interface INTF @end + + at implementation INTF @end +/* { dg-final { scan-assembler ".section __DATA, __objc_const" } } */ +/* { dg-final { scan-assembler ".section __DATA, __objc_data" } } */ Added: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-property-typedefprotocol.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-property-typedefprotocol.m?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-property-typedefprotocol.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-property-typedefprotocol.m Mon Nov 3 02:35:57 2008 @@ -0,0 +1,10 @@ +/* APPLE LOCAL file radar 6267049 */ +typedef int MyTypedef; + + at interface MyClass + + at property MyTypedef myProperty; /* { dg-error "qualified type is not a valid object" } */ + /* { dg-error "cannot find protocol declaration for \\'Gobbledygook\\'" "" { target *-*-* } 6 } */ + + at end + Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-1.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-1.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-1.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-1.m Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file 4695109 */ +/* APPLE LOCAL file 4695109 - modified for radar 6255913 */ /* Protocol meta-data for protocol used in @protocol expression must be generated. */ /* { dg-options "-mmacosx-version-min=10.5 -fobjc-abi-version=2" { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-do compile { target *-*-darwin* } } */ @@ -14,5 +14,5 @@ int main() { return (long) @protocol(Proto1); } -/* { dg-final { scan-assembler "L_OBJC_PROTOCOL_\\\$_Proto1:" } } */ +/* { dg-final { scan-assembler "l_OBJC_PROTOCOL_\\\$_Proto1:" } } */ /* { dg-final { scan-assembler-not "_OBJC_PROTOCOL_\\\$_Proto2" } } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-2.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-2.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-2.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-2.m Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file 4695109 */ +/* APPLE LOCAL file 4695109 - modified for radar 6255913 */ /* Check for generation of protocol meta-data */ /* { dg-options "-mmacosx-version-min=10.5 -fobjc-abi-version=2" { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-do compile { target *-*-darwin* } } */ @@ -11,5 +11,5 @@ @interface Super { id isa; } @end @implementation Super @end -/* { dg-final { scan-assembler "L_OBJC_PROTOCOL_\\\$_Proto1:" } } */ -/* { dg-final { scan-assembler "L_OBJC_PROTOCOL_\\\$_Proto2:" } } */ +/* { dg-final { scan-assembler "l_OBJC_PROTOCOL_\\\$_Proto1:" } } */ +/* { dg-final { scan-assembler "l_OBJC_PROTOCOL_\\\$_Proto2:" } } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-4.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-4.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-4.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-4.m Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file 5465109 */ +/* APPLE LOCAL file 5465109 - modified for radar 6255913 */ /* The following test program should emit metadata for _OBJC_PROTOCOL_$_Proto2 and _OBJC_PROTOCOL_$__Proto1. This root emits both protocols and puts them both in __protocol_list. @@ -20,5 +20,5 @@ { return (long)@protocol(Proto2); } -/* { dg-final { scan-assembler "L_OBJC_PROTOCOL_\\\$_Proto1:" } } */ -/* { dg-final { scan-assembler "L_OBJC_PROTOCOL_\\\$_Proto2:" } } */ +/* { dg-final { scan-assembler "l_OBJC_PROTOCOL_\\\$_Proto1:" } } */ +/* { dg-final { scan-assembler "l_OBJC_PROTOCOL_\\\$_Proto2:" } } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-5.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-5.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-5.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-5.m Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file 4695109 */ +/* APPLE LOCAL file 4695109 - modified for radar 6255913 */ /* { dg-options "-mmacosx-version-min=10.5 -fobjc-abi-version=2" { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-do compile { target *-*-darwin* } } */ @@ -13,4 +13,4 @@ int main() { return (long) @protocol(Proto1); } -/* { dg-final { scan-assembler "L_OBJC_PROTOCOL_\\\$_Proto1:" } } */ +/* { dg-final { scan-assembler "l_OBJC_PROTOCOL_\\\$_Proto1:" } } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-9.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-9.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-9.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-protocol-9.m Mon Nov 3 02:35:57 2008 @@ -1,4 +1,4 @@ -/* APPLE LOCAL file 4695109 */ +/* APPLE LOCAL file 4695109 - modified for radar 6255913 */ /* Cechk that both protocols metadata generated for them. */ /* { dg-options "-mmacosx-version-min=10.5 -fobjc-abi-version=2" { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-do compile { target *-*-darwin* } } */ @@ -18,5 +18,5 @@ @implementation Foo (Category) @end -/* { dg-final { scan-assembler "L_OBJC_PROTOCOL_\\\$_Proto1:" } } */ -/* { dg-final { scan-assembler "L_OBJC_PROTOCOL_\\\$_Proto2:" } } */ +/* { dg-final { scan-assembler "l_OBJC_PROTOCOL_\\\$_Proto1:" } } */ +/* { dg-final { scan-assembler "l_OBJC_PROTOCOL_\\\$_Proto2:" } } */ Added: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-sendsuper_msg.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-sendsuper_msg.m?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-sendsuper_msg.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-sendsuper_msg.m Mon Nov 3 02:35:57 2008 @@ -0,0 +1,14 @@ +/* APPLE LOCAL file radar 6252174 */ +/* { dg-options "-m64 -mmacosx-version-min=10.6" } */ +/* { dg-do compile { target *-*-darwin* } } */ + + at interface NSObject +-method; + at end + + at interface Sub : NSObject @end + + at implementation Sub +-method { [super method]; } + at end +/* { dg-final { scan-assembler-not ".section __DATA, __objc_msgrefs, coalesced\n\t.align 4\n\tl_objc_msgSendSuper2_fixup_method" } } */ Added: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/property-missing-comma.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/property-missing-comma.m?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/property-missing-comma.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/property-missing-comma.m Mon Nov 3 02:35:57 2008 @@ -0,0 +1,19 @@ +/* APPLE LOCAL file radar 6302949 */ +/* { dg-options "-mmacosx-version-min=10.5" { target *-*-darwin* } } */ +/* { dg-do compile } */ + + at interface BadPropClass // : NSObject +{ + int _awesome; +} + + at property (readonly) int hello; + at property (nonatomic readonly /* { dg-warning " property attributes must be separated by a comma" } */ + getter=isAwesome) int _awesome; /* { dg-warning " property attributes must be separated by a comma" } */ + at property (nonatomic, readonly, + getter=isAwesome) int _anew; + at property (nonatomic, readonly, + getter=isAwesome) int _anew1; + + at end + Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/selector-3.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/selector-3.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/selector-3.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/selector-3.m Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ /* { dg-options "-Wselector -fgnu-runtime" } */ /* { dg-do compile } */ /* APPLE LOCAL radar 4894756 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ typedef struct objc_object { struct objc_class *class_pointer; } *id; typedef const struct objc_selector *SEL; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/special/unclaimed-category-1.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/special/unclaimed-category-1.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/special/unclaimed-category-1.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/special/unclaimed-category-1.m Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ #include #include /* APPLE LOCAL radar file 4894756 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ extern void abort (void); Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/stret-2.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/stret-2.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/stret-2.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/stret-2.m Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* Contributed by Ziemowit Laski . */ /* { dg-do compile { target *-*-darwin* } } */ /* APPLE LOCAL radar 4492976 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* APPLE LOCAL radar 4894756 */ #include "../objc/execute/Object2.h" Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/symtab-1.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/symtab-1.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/symtab-1.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/symtab-1.m Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ /* { dg-options "-fnext-runtime" } */ /* { dg-do compile { target *-*-darwin* } } */ /* APPLE LOCAL radar 4492976 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* APPLE LOCAL ARM not available on arm-darwin targets */ /* { dg-skip-if "" { arm*-*-darwin* } { "*" } { "" } } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/sync-objc-exception.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/sync-objc-exception.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/sync-objc-exception.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/sync-objc-exception.m Mon Nov 3 02:35:57 2008 @@ -5,7 +5,7 @@ */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* { dg-options "-fobjc-exceptions -Os -Wextra -Werror" } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ struct MyPoint { int x; }; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/try-catch-15.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/try-catch-15.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/try-catch-15.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/try-catch-15.m Mon Nov 3 02:35:57 2008 @@ -6,7 +6,7 @@ /* { dg-do compile { target powerpc*-*-darwin* } } */ /* APPLE LOCAL begin radar 4894756 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #include "../objc/execute/Object2.h" /* APPLE LOCAL end radar 4894756 */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/try-catch-17.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/try-catch-17.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/try-catch-17.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/try-catch-17.m Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ all uncaught exceptions. */ /* { dg-options "-fobjc-exceptions" } */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ /* { dg-do run } */ #include "../objc/execute/Object2.h" Added: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/unimplemented-anon-category.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/unimplemented-anon-category.m?rev=58601&view=auto ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/unimplemented-anon-category.m (added) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/unimplemented-anon-category.m Mon Nov 3 02:35:57 2008 @@ -0,0 +1,18 @@ +/* APPLE LOCAL file radar 6017984 */ +/* Warn if @implementation does not implement methods declared + in anonymous category's protocol list. */ +/* { dg-do compile { target *-*-darwin* } } */ + + at protocol Bar +- (void) baz; + at end + + at interface Foo + at end + + at interface Foo () + at end + + at implementation Foo + at end /* { dg-warning "incomplete implementation of class 'Foo'" } */ + /* { dg-warning "method definition for '-baz' not found" "" { target *-*-* } 17 } */ Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/volatile-1.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/volatile-1.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/volatile-1.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/volatile-1.m Mon Nov 3 02:35:57 2008 @@ -3,7 +3,7 @@ /* { dg-options "-O2" } */ /* Contributed by Ziemowit Laski */ /* APPLE LOCAL radar 4894756 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ @interface Test -(void) test2: (volatile int) a; Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/zero-link-2.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/zero-link-2.m?rev=58601&r1=58600&r2=58601&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/zero-link-2.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/zero-link-2.m Mon Nov 3 02:35:57 2008 @@ -4,7 +4,7 @@ /* APPLE LOCAL ARM objc2 */ /* { dg-do compile { target powerpc*-*-darwin* i?86*-*-darwin* } } */ /* APPLE LOCAL radar 4894756 */ -/* { dg-skip-if "" { *-*-darwin* } { "-m64" } { "" } } */ +/* { dg-require-effective-target ilp32 } */ #include #include From clattner at apple.com Mon Nov 3 03:40:58 2008 From: clattner at apple.com (Chris Lattner) Date: Mon, 3 Nov 2008 01:40:58 -0800 Subject: [llvm-commits] patch: flush raw_ostream after AsmPrinting function In-Reply-To: <6a8523d60811020107v619688f4v8bc19ae71bea91b7@mail.gmail.com> References: <1225471329.28395.19.camel@Remington> <6a8523d60811020107v619688f4v8bc19ae71bea91b7@mail.gmail.com> Message-ID: <62938304-1204-43E3-9448-0737ADF0682C@apple.com> On Nov 2, 2008, at 1:07 AM, Daniel Dunbar wrote: > I agree with Dan, this is unfortunate. > > Is an extra branch in the write routine really a performance issue > here? The performance metric in this case is "time clang -E INPUTS/Cocoa.h - o /dev/null" with a release-asserts build. If that doesn't regress, I'm happy. :) However, performance of output to stderr is not very important (to me at least). Maybe we could do a little hack where the size of the buffer is 0 or 1 bytes, causing every write to go into the overflow case. Handling the flushing in the overflow case would be perfectly acceptable to me. Clang uses a very large output buffer for -E, so it wouldn't affect it significantly. -Chris From matthijs at stdin.nl Mon Nov 3 05:16:44 2008 From: matthijs at stdin.nl (Matthijs Kooijman) Date: Mon, 03 Nov 2008 11:16:44 -0000 Subject: [llvm-commits] [llvm] r58606 - /llvm/trunk/lib/CodeGen/MachineFunction.cpp Message-ID: <200811031116.mA3BGiq2026027@zion.cs.uiuc.edu> Author: matthijs Date: Mon Nov 3 05:16:43 2008 New Revision: 58606 URL: http://llvm.org/viewvc/llvm-project?rev=58606&view=rev Log: Make MachineFrameInfo::print not crash when no TargetFrameInfo is available. Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=58606&r1=58605&r2=58606&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Mon Nov 3 05:16:43 2008 @@ -396,7 +396,8 @@ void MachineFrameInfo::print(const MachineFunction &MF, std::ostream &OS) const{ - int ValOffset = MF.getTarget().getFrameInfo()->getOffsetOfLocalArea(); + const TargetFrameInfo *FI = MF.getTarget().getFrameInfo(); + int ValOffset = (FI ? FI->getOffsetOfLocalArea() : 0); for (unsigned i = 0, e = Objects.size(); i != e; ++i) { const StackObject &SO = Objects[i]; From baldrick at free.fr Mon Nov 3 05:51:12 2008 From: baldrick at free.fr (Duncan Sands) Date: Mon, 03 Nov 2008 11:51:12 -0000 Subject: [llvm-commits] [llvm] r58608 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp test/CodeGen/X86/2008-11-03-F80VAARG.ll Message-ID: <200811031151.mA3BpCVM027144@zion.cs.uiuc.edu> Author: baldrick Date: Mon Nov 3 05:51:11 2008 New Revision: 58608 URL: http://llvm.org/viewvc/llvm-project?rev=58608&view=rev Log: Make VAARG work with x86 long double (which is 10 bytes long, but is passed in 12/16 bytes). Added: llvm/trunk/test/CodeGen/X86/2008-11-03-F80VAARG.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=58608&r1=58607&r2=58608&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Nov 3 05:51:11 2008 @@ -3438,9 +3438,9 @@ const Value *V = cast(Node->getOperand(2))->getValue(); SDValue VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2, V, 0); // Increment the pointer, VAList, to the next vaarg - Tmp3 = DAG.getNode(ISD::ADD, TLI.getPointerTy(), VAList, - DAG.getConstant(VT.getSizeInBits()/8, - TLI.getPointerTy())); + Tmp3 = DAG.getNode(ISD::ADD, TLI.getPointerTy(), VAList, + DAG.getConstant(TLI.getTargetData()->getABITypeSize(VT.getTypeForMVT()), + TLI.getPointerTy())); // Store the incremented VAList to the legalized pointer Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Tmp2, V, 0); // Load the actual argument out of the pointer VAList Added: llvm/trunk/test/CodeGen/X86/2008-11-03-F80VAARG.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-11-03-F80VAARG.ll?rev=58608&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2008-11-03-F80VAARG.ll (added) +++ llvm/trunk/test/CodeGen/X86/2008-11-03-F80VAARG.ll Mon Nov 3 05:51:11 2008 @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -march=x86 -o - | not grep 10 + +declare void @llvm.va_start(i8*) nounwind + +declare void @llvm.va_copy(i8*, i8*) nounwind + +declare void @llvm.va_end(i8*) nounwind + +define x86_fp80 @test(...) nounwind { + %ap = alloca i8* ; [#uses=3] + %v1 = bitcast i8** %ap to i8* ; [#uses=1] + call void @llvm.va_start(i8* %v1) + %t1 = va_arg i8** %ap, x86_fp80 ; [#uses=1] + %t2 = va_arg i8** %ap, x86_fp80 ; [#uses=1] + %t = add x86_fp80 %t1, %t2 ; [#uses=1] + ret x86_fp80 %t +} From clattner at apple.com Mon Nov 3 06:11:46 2008 From: clattner at apple.com (Chris Lattner) Date: Mon, 3 Nov 2008 04:11:46 -0800 Subject: [llvm-commits] Recent apple changes broke the Ada build In-Reply-To: <200811030930.20704.duncan.sands@math.u-psud.fr> References: <200811030930.20704.duncan.sands@math.u-psud.fr> Message-ID: <04263C73-375B-4CEE-88E8-40E4281139A9@apple.com> On Nov 3, 2008, at 12:30 AM, Duncan Sands wrote: > Hi Bill, I'm getting these errors when building Ada: Fariborz, can you please investigate genericizing, #ifdef'ing, or stubbing these? Thanks, -Chris > > > libbackend.a(dwarf2out.o): In function `add_type_attribute': > gcc/dwarf2out.c:11732: undefined reference to > `generic_block_literal_struct_type' > libbackend.a(gtype-desc.o):(.rodata+0x9f8): undefined reference to > `generic_block_literal_struct_type' > libbackend.a(tree.o): In function `build_block_pointer_type': > gcc/tree.c:5112: undefined reference to > `generic_block_literal_struct_type' > gcc/tree.c:5113: undefined reference to > `build_generic_block_struct_type' > gcc/tree.c:5113: undefined reference to > `generic_block_literal_struct_type' > > Can you please take care of it. I understand that you can't > reasonably > try to build Ada before committing, but maybe in the future you can > check > that Fortran builds (both languages usually fail to build when Apple > changes > put C stuff in non-C places): it should just be a matter of adding > "fortran" > to --enable-languages=. Since Fortran is (hopefully) going to be > included in > the next release, it would anyway be good to regularly test Fortran. > > Ciao, > > Duncan. > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From asl at math.spbu.ru Mon Nov 3 08:21:40 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 03 Nov 2008 14:21:40 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r58610 - /llvm-gcc-4.2/trunk/gcc/config/i386/i386.c Message-ID: <200811031421.mA3ELfqO001982@zion.cs.uiuc.edu> Author: asl Date: Mon Nov 3 08:21:40 2008 New Revision: 58610 URL: http://llvm.org/viewvc/llvm-project?rev=58610&view=rev Log: Fix weird fallout from partial backport of cmdline option handling: llvm-gcc forgot all subtarget-specific flags if there was explicit target selection via -march option. As a result we ended with 4-byte aligned long doubles on x86-64/linux. Darwin was suddenly ok, because they override the whole subtarget options, on just 64-bit ones. Modified: llvm-gcc-4.2/trunk/gcc/config/i386/i386.c Modified: llvm-gcc-4.2/trunk/gcc/config/i386/i386.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/i386.c?rev=58610&r1=58609&r2=58610&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/i386.c (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/i386.c Mon Nov 3 08:21:40 2008 @@ -2020,13 +2020,15 @@ error ("-mstackrealign not supported in the 64bit mode"); /* APPLE LOCAL end radar 4877693 */ + target_flags |= TARGET_SUBTARGET64_DEFAULT & ~target_flags_explicit; + /* Enable by default the SSE and MMX builtins. Do allow the user to explicitly disable any of these. In particular, disabling SSE and MMX for kernel code is extremely useful. */ if (!ix86_arch_specified) target_flags - |= ((MASK_SSE2 | MASK_SSE | MASK_MMX | MASK_128BIT_LONG_DOUBLE - | TARGET_SUBTARGET64_DEFAULT) & ~target_flags_explicit); + |= ((MASK_SSE2 | MASK_SSE | MASK_MMX | MASK_128BIT_LONG_DOUBLE) + & ~target_flags_explicit); /* APPLE LOCAL begin mainline candidate */ /* Disable the red zone for kernel compilation. ??? Why aren't we using -mcmodel=kernel? */ From asl at math.spbu.ru Mon Nov 3 08:43:31 2008 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 03 Nov 2008 14:43:31 -0000 Subject: [llvm-commits] [llvm] r58611 - /llvm/trunk/test/FrontendFortran/2008-11-03-OptionOverride.f90 Message-ID: <200811031443.mA3EhVP1003453@zion.cs.uiuc.edu> Author: asl Date: Mon Nov 3 08:43:31 2008 New Revision: 58611 URL: http://llvm.org/viewvc/llvm-project?rev=58611&view=rev Log: Testcase for recent llvm-gcc fix Added: llvm/trunk/test/FrontendFortran/2008-11-03-OptionOverride.f90 Added: llvm/trunk/test/FrontendFortran/2008-11-03-OptionOverride.f90 URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendFortran/2008-11-03-OptionOverride.f90?rev=58611&view=auto ============================================================================== --- llvm/trunk/test/FrontendFortran/2008-11-03-OptionOverride.f90 (added) +++ llvm/trunk/test/FrontendFortran/2008-11-03-OptionOverride.f90 Mon Nov 3 08:43:31 2008 @@ -0,0 +1,3 @@ +! RUN: %llvmgcc -c %s -march=k8 +! Note: this file intentionally left blank, the problem itself is in +! frontend initialization routines and march flag! \ No newline at end of file From criswell at uiuc.edu Mon Nov 3 10:03:12 2008 From: criswell at uiuc.edu (John Criswell) Date: Mon, 03 Nov 2008 16:03:12 -0000 Subject: [llvm-commits] [poolalloc] r58614 - /poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Message-ID: <200811031603.mA3G3Clc009257@zion.cs.uiuc.edu> Author: criswell Date: Mon Nov 3 10:03:12 2008 New Revision: 58614 URL: http://llvm.org/viewvc/llvm-project?rev=58614&view=rev Log: When replacing references to an original function with a reference to a cloned function, do not do replacements for call or invoke instructions in original functions. All cases where such replacement can properly pass pool descriptors has already been done; any further replacement incorrect replaces a call to an original function with an incorrect call to a cloned function. Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp?rev=58614&r1=58613&r2=58614&view=diff ============================================================================== --- poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp (original) +++ poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Mon Nov 3 10:03:12 2008 @@ -129,6 +129,7 @@ if (!I->isDeclaration() && Graphs->hasDSGraph(*I)) FindFunctionPoolArgs(*I); + // Map that maps an original function to its clone std::map FuncMap; // Now clone a function using the pool arg list obtained in the previous @@ -156,11 +157,41 @@ ProcessFunctionBody(*I, FI != FuncMap.end() ? *FI->second : *I); } } - // Replace all uses of original functions with the transformed function. + + // + // Replace any remaining uses of original functions with the transformed + // function i.e., the cloned function. + // for (std::map::iterator I = FuncMap.begin(), - E = FuncMap.end(); I != E; ++I) { + E = FuncMap.end(); + I != E; ++I) { Function *F = I->first; - F->replaceAllUsesWith(ConstantExpr::getPointerCast(I->second, F->getType())); + + // + // Scan through all uses of the original function. Replace it as long as + // the use is not a Call or Invoke instruction that + // o) is within an original function (all such call instructions should + // have been transformed already), and + // o) the called function is the function that we're replacing + // + for (Function::use_iterator User = F->use_begin(); + User != F->use_end(); + ++User) { + if (CallInst * CI = dyn_cast(User)) { + if (CI->getCalledFunction() == F) + if ((FuncMap.find(CI->getParent()->getParent())) != FuncMap.end()) + continue; + } + + if (InvokeInst * CI = dyn_cast(User)) { + if (CI->getCalledFunction() == F) + if ((FuncMap.find(CI->getParent()->getParent())) != FuncMap.end()) + continue; + } + + User->replaceUsesOfWith (F, ConstantExpr::getPointerCast(I->second, + F->getType())); + } } if (CurHeuristic->IsRealHeuristic()) From alenhar2 at cs.uiuc.edu Mon Nov 3 10:05:35 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Mon, 03 Nov 2008 16:05:35 -0000 Subject: [llvm-commits] [llvm] r58615 - /llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp Message-ID: <200811031605.mA3G5amA009446@zion.cs.uiuc.edu> Author: alenhar2 Date: Mon Nov 3 10:05:35 2008 New Revision: 58615 URL: http://llvm.org/viewvc/llvm-project?rev=58615&view=rev Log: Ensure that we are checking only calls to the function we are interested in specializing Modified: llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp Modified: llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp?rev=58615&r1=58614&r2=58615&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp Mon Nov 3 10:05:35 2008 @@ -165,14 +165,16 @@ } } +/// scanDistribution - Construct a histogram of constants for arg of F at arg int PartSpec::scanDistribution(Function& F, int arg, std::map& dist) { bool hasIndirect = false; int total = 0; for(Value::use_iterator ii = F.use_begin(), ee = F.use_end(); ii != ee; ++ii) - if (CallInst* CI = dyn_cast(ii)) { - ++dist[dyn_cast(CI->getOperand(arg + 1))]; + if ((isa(ii) || isa(ii)) + && ii->getOperand(0) == &F) { + ++dist[dyn_cast(ii->getOperand(arg + 1))]; ++total; } else hasIndirect = true; From criswell at uiuc.edu Mon Nov 3 10:09:30 2008 From: criswell at uiuc.edu (John Criswell) Date: Mon, 03 Nov 2008 16:09:30 -0000 Subject: [llvm-commits] [poolalloc] r58616 - /poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Message-ID: <200811031609.mA3G9Uph009750@zion.cs.uiuc.edu> Author: criswell Date: Mon Nov 3 10:09:30 2008 New Revision: 58616 URL: http://llvm.org/viewvc/llvm-project?rev=58616&view=rev Log: Formatting improvements. No functionality changes. Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp?rev=58616&r1=58615&r2=58616&view=diff ============================================================================== --- poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp (original) +++ poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Mon Nov 3 10:09:30 2008 @@ -108,10 +108,15 @@ if (M.begin() == M.end()) return false; CurModule = &M; + // + // Get references to the DSA information. For SAFECode, we need Top-Down + // DSA. For Automatic Pool Allocation only, we need Bottom-Up DSA. In all + // cases, we need to use the Equivalence-Class version of DSA. + // if (SAFECodeEnabled) - Graphs = &getAnalysis(); // folded inlined CBU graphs - else - Graphs = &getAnalysis(); // folded inlined CBU graphs + Graphs = &getAnalysis(); + else + Graphs = &getAnalysis(); CurHeuristic = Heuristic::create(); CurHeuristic->Initialize(M, Graphs->getGlobalsGraph(), *this); @@ -446,6 +451,7 @@ for (std::map::iterator I = FI.ValueMap.begin(), E = FI.ValueMap.end(); I != E; ++I) ValueMap.insert(std::make_pair(I->first, I->second)); + for (Function::arg_iterator I = F.arg_begin(); NI != New->arg_end(); ++I, ++NI) { ValueMap[I] = NI; From gohman at apple.com Mon Nov 3 11:00:26 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 3 Nov 2008 09:00:26 -0800 (PST) Subject: [llvm-commits] [llvm] r58517 - /llvm/trunk/lib/Target/X86/X86RegisterInfo.td In-Reply-To: <200810311652.m9VGqw6S010172@zion.cs.uiuc.edu> References: <200810311652.m9VGqw6S010172@zion.cs.uiuc.edu> Message-ID: On Fri, October 31, 2008 8:52 am, Evan Cheng wrote: > Author: evancheng > Date: Fri Oct 31 11:52:57 2008 > New Revision: 58517 > > URL: http://llvm.org/viewvc/llvm-project?rev=58517&view=rev > Log: > Change x86 register allocation ordering to match that of gcc. Otherwise > some tools get confused by prologue generated by llvm. What tools depend on the order that compilers allocate registers? > def GR64 : RegisterClass<"X86", [i64], 64, > [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11, > - RBX, R14, R15, R12, R13, RBP, RSP]> { > + RBX, R12, R13, R14, R15, RBP, RSP]> { Registers %r13 and %rbp are special and require some instructions to be encoded differently. It's desirable to allocate them last. For example, instructions like this: leaq (%r13,%rax),%rax must be encoded with a displacement immediate field when the base register is %r13 or %rbp, but it doesn't require one for other registers. Dan From gohman at apple.com Mon Nov 3 11:10:24 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 03 Nov 2008 17:10:24 -0000 Subject: [llvm-commits] [llvm] r58620 - /llvm/trunk/include/llvm/CodeGen/ValueTypes.h Message-ID: <200811031710.mA3HAPnl014114@zion.cs.uiuc.edu> Author: djg Date: Mon Nov 3 11:10:24 2008 New Revision: 58620 URL: http://llvm.org/viewvc/llvm-project?rev=58620&view=rev Log: Remove redundant inline keywords from functions defined within class definitions. Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ValueTypes.h?rev=58620&r1=58619&r2=58620&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ValueTypes.h (original) +++ llvm/trunk/include/llvm/CodeGen/ValueTypes.h Mon Nov 3 11:10:24 2008 @@ -139,13 +139,13 @@ MVT() {} MVT(SimpleValueType S) : V(S) {} - inline bool operator== (const MVT VT) const { return V == VT.V; } - inline bool operator!= (const MVT VT) const { return V != VT.V; } + bool operator== (const MVT VT) const { return V == VT.V; } + bool operator!= (const MVT VT) const { return V != VT.V; } /// getFloatingPointVT - Returns the MVT that represents a floating point /// type with the given number of bits. There are two floating point types /// with 128 bits - this returns f128 rather than ppcf128. - static inline MVT getFloatingPointVT(unsigned BitWidth) { + static MVT getFloatingPointVT(unsigned BitWidth) { switch (BitWidth) { default: assert(false && "Bad bit width!"); @@ -162,7 +162,7 @@ /// getIntegerVT - Returns the MVT that represents an integer with the given /// number of bits. - static inline MVT getIntegerVT(unsigned BitWidth) { + static MVT getIntegerVT(unsigned BitWidth) { switch (BitWidth) { default: break; @@ -187,7 +187,7 @@ /// getVectorVT - Returns the MVT that represents a vector NumElements in /// length, where each element is of type VT. - static inline MVT getVectorVT(MVT VT, unsigned NumElements) { + static MVT getVectorVT(MVT VT, unsigned NumElements) { switch (VT.V) { default: break; @@ -228,7 +228,7 @@ /// getIntVectorWithNumElements - Return any integer vector type that has /// the specified number of elements. - static inline MVT getIntVectorWithNumElements(unsigned NumElts) { + static MVT getIntVectorWithNumElements(unsigned NumElts) { switch (NumElts) { default: return getVectorVT(i8, NumElts); case 1: return v1i64; @@ -243,90 +243,90 @@ /// isSimple - Test if the given MVT is simple (as opposed to being /// extended). - inline bool isSimple() const { + bool isSimple() const { return V <= SimpleTypeMask; } /// isExtended - Test if the given MVT is extended (as opposed to /// being simple). - inline bool isExtended() const { + bool isExtended() const { return !isSimple(); } /// isFloatingPoint - Return true if this is a FP, or a vector FP type. - inline bool isFloatingPoint() const { + bool isFloatingPoint() const { uint32_t SVT = V & SimpleTypeMask; return (SVT >= f32 && SVT <= ppcf128) || (SVT >= v2f32 && SVT <= v2f64); } /// isInteger - Return true if this is an integer, or a vector integer type. - inline bool isInteger() const { + bool isInteger() const { uint32_t SVT = V & SimpleTypeMask; return (SVT >= FIRST_INTEGER_VALUETYPE && SVT <= LAST_INTEGER_VALUETYPE) || (SVT >= v8i8 && SVT <= v2i64) || (SVT == iAny && (V & PrecisionMask)); } /// isVector - Return true if this is a vector value type. - inline bool isVector() const { + bool isVector() const { return (V >= FIRST_VECTOR_VALUETYPE && V <= LAST_VECTOR_VALUETYPE) || (V & VectorMask); } /// is64BitVector - Return true if this is a 64-bit vector type. - inline bool is64BitVector() const { + bool is64BitVector() const { return (V==v8i8 || V==v4i16 || V==v2i32 || V==v1i64 || V==v2f32 || (isExtended() && isVector() && getSizeInBits()==64)); } /// is128BitVector - Return true if this is a 128-bit vector type. - inline bool is128BitVector() const { + bool is128BitVector() const { return (V==v16i8 || V==v8i16 || V==v4i32 || V==v2i64 || V==v4f32 || V==v2f64 || (isExtended() && isVector() && getSizeInBits()==128)); } /// isByteSized - Return true if the bit size is a multiple of 8. - inline bool isByteSized() const { + bool isByteSized() const { return (getSizeInBits() & 7) == 0; } /// isRound - Return true if the size is a power-of-two number of bytes. - inline bool isRound() const { + bool isRound() const { unsigned BitSize = getSizeInBits(); return BitSize >= 8 && !(BitSize & (BitSize - 1)); } /// bitsGT - Return true if this has more bits than VT. - inline bool bitsGT(MVT VT) const { + bool bitsGT(MVT VT) const { return getSizeInBits() > VT.getSizeInBits(); } /// bitsGE - Return true if this has no less bits than VT. - inline bool bitsGE(MVT VT) const { + bool bitsGE(MVT VT) const { return getSizeInBits() >= VT.getSizeInBits(); } /// bitsLT - Return true if this has less bits than VT. - inline bool bitsLT(MVT VT) const { + bool bitsLT(MVT VT) const { return getSizeInBits() < VT.getSizeInBits(); } /// bitsLE - Return true if this has no more bits than VT. - inline bool bitsLE(MVT VT) const { + bool bitsLE(MVT VT) const { return getSizeInBits() <= VT.getSizeInBits(); } /// getSimpleVT - Return the SimpleValueType held in the specified /// simple MVT. - inline SimpleValueType getSimpleVT() const { + SimpleValueType getSimpleVT() const { assert(isSimple() && "Expected a SimpleValueType!"); return (SimpleValueType)V; } /// getVectorElementType - Given a vector type, return the type of /// each element. - inline MVT getVectorElementType() const { + MVT getVectorElementType() const { assert(isVector() && "Invalid vector type!"); switch (V) { default: { @@ -353,7 +353,7 @@ /// getVectorNumElements - Given a vector type, return the number of /// elements it contains. - inline unsigned getVectorNumElements() const { + unsigned getVectorNumElements() const { assert(isVector() && "Invalid vector type!"); switch (V) { default: @@ -376,7 +376,7 @@ } /// getSizeInBits - Return the size of the specified value type in bits. - inline unsigned getSizeInBits() const { + unsigned getSizeInBits() const { switch (V) { default: assert(isExtended() && "MVT has no known size!"); @@ -415,14 +415,14 @@ /// getStoreSizeInBits - Return the number of bits overwritten by a store /// of the specified value type. - inline unsigned getStoreSizeInBits() const { + unsigned getStoreSizeInBits() const { return (getSizeInBits() + 7)/8*8; } /// getRoundIntegerType - Rounds the bit-width of the given integer MVT up /// to the nearest power of two (and at least to eight), and returns the /// integer MVT with that number of bits. - inline MVT getRoundIntegerType() const { + MVT getRoundIntegerType() const { assert(isInteger() && !isVector() && "Invalid integer type!"); unsigned BitWidth = getSizeInBits(); if (BitWidth <= 8) @@ -433,7 +433,7 @@ /// getIntegerVTBitMask - Return an integer with 1's every place there are /// bits in the specified integer value type. FIXME: Should return an apint. - inline uint64_t getIntegerVTBitMask() const { + uint64_t getIntegerVTBitMask() const { assert(isInteger() && !isVector() && "Only applies to int scalars!"); return ~uint64_t(0UL) >> (64-getSizeInBits()); } @@ -441,7 +441,7 @@ /// getIntegerVTSignBit - Return an integer with a 1 in the position of the /// sign bit for the specified integer value type. FIXME: Should return an /// apint. - inline uint64_t getIntegerVTSignBit() const { + uint64_t getIntegerVTSignBit() const { assert(isInteger() && !isVector() && "Only applies to int scalars!"); return uint64_t(1UL) << (getSizeInBits()-1); } From daniel at zuster.org Mon Nov 3 11:33:36 2008 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 03 Nov 2008 17:33:36 -0000 Subject: [llvm-commits] [llvm] r58621 - /llvm/trunk/Makefile.rules Message-ID: <200811031733.mA3HXaFZ015724@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Nov 3 11:33:36 2008 New Revision: 58621 URL: http://llvm.org/viewvc/llvm-project?rev=58621&view=rev Log: Comment fix. Modified: llvm/trunk/Makefile.rules Modified: llvm/trunk/Makefile.rules URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile.rules?rev=58621&r1=58620&r2=58621&view=diff ============================================================================== --- llvm/trunk/Makefile.rules (original) +++ llvm/trunk/Makefile.rules Mon Nov 3 11:33:36 2008 @@ -1302,7 +1302,7 @@ # INCFiles rule: All of the tblgen generated files are emitted to # $(ObjDir)/%.inc.tmp, instead of emitting them directly to %.inc. This allows # us to only "touch" the real file if the contents of it change. IOW, if -# tblgen is modified, all of the .inc.tmp files are regereated, but no +# tblgen is modified, all of the .inc.tmp files are regenerated, but no # dependencies of the .inc files are, unless the contents of the .inc file # changes. $(INCFiles) : %.inc : $(ObjDir)/%.inc.tmp From gohman at apple.com Mon Nov 3 11:56:27 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 03 Nov 2008 17:56:27 -0000 Subject: [llvm-commits] [llvm] r58623 - in /llvm/trunk: include/llvm/CodeGen/ValueTypes.h lib/VMCore/ValueTypes.cpp test/CodeGen/X86/i2k.ll utils/TableGen/CMakeLists.txt utils/TableGen/TGValueTypes.cpp Message-ID: <200811031756.mA3HuRvA017091@zion.cs.uiuc.edu> Author: djg Date: Mon Nov 3 11:56:27 2008 New Revision: 58623 URL: http://llvm.org/viewvc/llvm-project?rev=58623&view=rev Log: Change how extended types are represented in MVTs. Instead of fiddling bits, use a union of a SimpleValueType enum and a regular Type*. This increases the size of MVT on 64-bit hosts from 32 bits to 64 bits. In most cases, this doesn't add significant overhead. There are places in codegen that use arrays of MVTs, so these are now larger, but they're small in common cases. This eliminates restrictions on the size of integer types and vector types that can be represented in codegen. As the included testcase demonstrates, it's now possible to codegen very large add operations. There are still some complications with using very large types. PR2880 is still open so they can't be used as return values on normal targets, there are no libcalls defined for very large integers so operations like multiply and divide aren't supported. This also introduces a minimal tablgen Type library, capable of handling IntegerType and VectorType. This will allow parts of TableGen that don't depend on using SimpleValueType values to handle arbitrary integer and vector types. Added: llvm/trunk/test/CodeGen/X86/i2k.ll llvm/trunk/utils/TableGen/TGValueTypes.cpp Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h llvm/trunk/lib/VMCore/ValueTypes.cpp llvm/trunk/utils/TableGen/CMakeLists.txt Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ValueTypes.h?rev=58623&r1=58622&r2=58623&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ValueTypes.h (original) +++ llvm/trunk/include/llvm/CodeGen/ValueTypes.h Mon Nov 3 11:56:27 2008 @@ -26,7 +26,6 @@ struct MVT { // MVT = Machine Value Type public: - enum SimpleValueType { // If you change this numbering, you must change the values in // ValueTypes.td as well! @@ -87,10 +86,14 @@ // iPTR - An int value the size of the pointer of the current // target. This should only be used internal to tblgen! - iPTR = 255 + iPTR = 255, + + // LastSimpleValueType - The greatest valid SimpleValueType value. + LastSimpleValueType = 255 }; - /// MVT - This type holds low-level value types. Valid values include any of + private: + /// This union holds low-level value types. Valid values include any of /// the values in the SimpleValueType enum, or any value returned from one /// of the MVT methods. Any value type equal to one of the SimpleValueType /// enum values is a "simple" value type. All others are "extended". @@ -99,48 +102,22 @@ /// All legal value types must be simple, but often there are some simple /// value types that are not legal. /// - /// @internal - /// Extended types are either vector types or arbitrary precision integers. - /// Arbitrary precision integers have iAny in the first SimpleTypeBits bits, - /// and the bit-width in the next PrecisionBits bits, offset by minus one. - /// Vector types are encoded by having the first - /// SimpleTypeBits+PrecisionBits bits encode the vector element type - /// (which must be a scalar type, possibly an arbitrary precision integer) - /// and the remaining VectorBits upper bits encode the vector length, offset - /// by one. - /// - /// 32--------------16-----------8-------------0 - /// | Vector length | Precision | Simple type | - /// | | Vector element | - /// - - private: - - static const int SimpleTypeBits = 8; - static const int PrecisionBits = 8; - static const int VectorBits = 32 - SimpleTypeBits - PrecisionBits; - - static const uint32_t SimpleTypeMask = - (~uint32_t(0) << (32 - SimpleTypeBits)) >> (32 - SimpleTypeBits); - - static const uint32_t PrecisionMask = - ((~uint32_t(0) << VectorBits) >> (32 - PrecisionBits)) << SimpleTypeBits; - - static const uint32_t VectorMask = - (~uint32_t(0) >> (32 - VectorBits)) << (32 - VectorBits); - - static const uint32_t ElementMask = - (~uint32_t(0) << VectorBits) >> VectorBits; - - uint32_t V; + union { + uintptr_t V; + SimpleValueType SimpleTy; + const Type *LLVMTy; + }; public: - MVT() {} MVT(SimpleValueType S) : V(S) {} - bool operator== (const MVT VT) const { return V == VT.V; } - bool operator!= (const MVT VT) const { return V != VT.V; } + bool operator==(const MVT VT) const { + return getRawBits() == VT.getRawBits(); + } + bool operator!=(const MVT VT) const { + return getRawBits() != VT.getRawBits(); + } /// getFloatingPointVT - Returns the MVT that represents a floating point /// type with the given number of bits. There are two floating point types @@ -179,10 +156,7 @@ case 128: return i128; } - MVT VT; - VT.V = iAny | (((BitWidth - 1) << SimpleTypeBits) & PrecisionMask); - assert(VT.getSizeInBits() == BitWidth && "Bad bit width!"); - return VT; + return getExtendedIntegerVT(BitWidth); } /// getVectorVT - Returns the MVT that represents a vector NumElements in @@ -217,13 +191,7 @@ if (NumElements == 2) return v2f64; break; } - MVT Result; - Result.V = VT.V | ((NumElements + 1) << (32 - VectorBits)); - assert(Result.getVectorElementType() == VT && - "Bad vector element type!"); - assert(Result.getVectorNumElements() == NumElements && - "Bad vector length!"); - return Result; + return getExtendedVectorVT(VT, NumElements); } /// getIntVectorWithNumElements - Return any integer vector type that has @@ -240,11 +208,10 @@ } } - /// isSimple - Test if the given MVT is simple (as opposed to being /// extended). bool isSimple() const { - return V <= SimpleTypeMask; + return V <= LastSimpleValueType; } /// isExtended - Test if the given MVT is extended (as opposed to @@ -255,34 +222,43 @@ /// isFloatingPoint - Return true if this is a FP, or a vector FP type. bool isFloatingPoint() const { - uint32_t SVT = V & SimpleTypeMask; - return (SVT >= f32 && SVT <= ppcf128) || (SVT >= v2f32 && SVT <= v2f64); + return isSimple() ? + ((SimpleTy >= f32 && SimpleTy <= ppcf128) || + (SimpleTy >= v2f32 && SimpleTy <= v2f64)) : + isExtendedFloatingPoint(); } /// isInteger - Return true if this is an integer, or a vector integer type. bool isInteger() const { - uint32_t SVT = V & SimpleTypeMask; - return (SVT >= FIRST_INTEGER_VALUETYPE && SVT <= LAST_INTEGER_VALUETYPE) || - (SVT >= v8i8 && SVT <= v2i64) || (SVT == iAny && (V & PrecisionMask)); + return isSimple() ? + ((SimpleTy >= FIRST_INTEGER_VALUETYPE && + SimpleTy <= LAST_INTEGER_VALUETYPE) || + (SimpleTy >= v8i8 && SimpleTy <= v2i64)) : + isExtendedInteger(); } /// isVector - Return true if this is a vector value type. bool isVector() const { - return (V >= FIRST_VECTOR_VALUETYPE && V <= LAST_VECTOR_VALUETYPE) || - (V & VectorMask); + return isSimple() ? + (SimpleTy >= FIRST_VECTOR_VALUETYPE && + SimpleTy <= LAST_VECTOR_VALUETYPE) : + isExtendedVector(); } /// is64BitVector - Return true if this is a 64-bit vector type. bool is64BitVector() const { - return (V==v8i8 || V==v4i16 || V==v2i32 || V==v1i64 || V==v2f32 || - (isExtended() && isVector() && getSizeInBits()==64)); + return isSimple() ? + (SimpleTy==v8i8 || SimpleTy==v4i16 || SimpleTy==v2i32 || + SimpleTy==v1i64 || SimpleTy==v2f32) : + isExtended64BitVector(); } /// is128BitVector - Return true if this is a 128-bit vector type. bool is128BitVector() const { - return (V==v16i8 || V==v8i16 || V==v4i32 || V==v2i64 || - V==v4f32 || V==v2f64 || - (isExtended() && isVector() && getSizeInBits()==128)); + return isSimple() ? + (SimpleTy==v16i8 || SimpleTy==v8i16 || SimpleTy==v4i32 || + SimpleTy==v2i64 || SimpleTy==v4f32 || SimpleTy==v2f64) : + isExtended128BitVector(); } /// isByteSized - Return true if the bit size is a multiple of 8. @@ -321,7 +297,7 @@ /// simple MVT. SimpleValueType getSimpleVT() const { assert(isSimple() && "Expected a SimpleValueType!"); - return (SimpleValueType)V; + return SimpleTy; } /// getVectorElementType - Given a vector type, return the type of @@ -329,12 +305,8 @@ MVT getVectorElementType() const { assert(isVector() && "Invalid vector type!"); switch (V) { - default: { - assert(isExtended() && "Unknown simple vector type!"); - MVT VT; - VT.V = V & ElementMask; - return VT; - } + default: + return getExtendedVectorElementType(); case v8i8 : case v16i8: return i8; case v4i16: @@ -357,8 +329,7 @@ assert(isVector() && "Invalid vector type!"); switch (V) { default: - assert(isExtended() && "Unknown simple vector type!"); - return ((V & VectorMask) >> (32 - VectorBits)) - 1; + return getExtendedVectorNumElements(); case v16i8: return 16; case v8i8 : case v8i16: return 8; @@ -379,13 +350,7 @@ unsigned getSizeInBits() const { switch (V) { default: - assert(isExtended() && "MVT has no known size!"); - if (isVector()) - return getVectorElementType().getSizeInBits()*getVectorNumElements(); - if (isInteger()) - return ((V & PrecisionMask) >> SimpleTypeBits) + 1; - assert(false && "Unknown value type!"); - return 0; + return getExtendedSizeInBits(); case i1 : return 1; case i8 : return 8; case i16 : return 16; @@ -410,6 +375,12 @@ case v2i64: case v4f32: case v2f64: return 128; + case iPTR: + assert(false && "Value type size is target-dependent. Ask TLI."); + case iPTRAny: + case iAny: + case fAny: + assert(false && "Value type is overloaded."); } } @@ -461,7 +432,7 @@ static MVT getMVT(const Type *Ty, bool HandleUnknown = false); /// getRawBits - Represent the type as a bunch of bits. - uint32_t getRawBits() const { return V; } + uintptr_t getRawBits() const { return V; } /// compareRawBits - A meaningless but well-behaved order, useful for /// constructing containers. @@ -470,6 +441,21 @@ return L.getRawBits() < R.getRawBits(); } }; + + private: + // Methods for handling the Extended-type case in functions above. + // These are all out-of-line to prevent users of this header file + // from having a dependency on Type.h. + static MVT getExtendedIntegerVT(unsigned BitWidth); + static MVT getExtendedVectorVT(MVT VT, unsigned NumElements); + bool isExtendedFloatingPoint() const; + bool isExtendedInteger() const; + bool isExtendedVector() const; + bool isExtended64BitVector() const; + bool isExtended128BitVector() const; + MVT getExtendedVectorElementType() const; + unsigned getExtendedVectorNumElements() const; + unsigned getExtendedSizeInBits() const; }; } // End llvm namespace Modified: llvm/trunk/lib/VMCore/ValueTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ValueTypes.cpp?rev=58623&r1=58622&r2=58623&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/ValueTypes.cpp (original) +++ llvm/trunk/lib/VMCore/ValueTypes.cpp Mon Nov 3 11:56:27 2008 @@ -17,6 +17,60 @@ #include "llvm/DerivedTypes.h" using namespace llvm; +MVT MVT::getExtendedIntegerVT(unsigned BitWidth) { + MVT VT; + VT.LLVMTy = IntegerType::get(BitWidth); + return VT; +} + +MVT MVT::getExtendedVectorVT(MVT VT, unsigned NumElements) { + MVT ResultVT; + ResultVT.LLVMTy = VectorType::get(VT.getTypeForMVT(), NumElements); + return ResultVT; +} + +bool MVT::isExtendedFloatingPoint() const { + assert(isExtended() && "Type is not extended!"); + return LLVMTy->isFPOrFPVector(); +} + +bool MVT::isExtendedInteger() const { + assert(isExtended() && "Type is not extended!"); + return LLVMTy->isIntOrIntVector(); +} + +bool MVT::isExtendedVector() const { + assert(isExtended() && "Type is not extended!"); + return isa(LLVMTy); +} + +bool MVT::isExtended64BitVector() const { + return isExtendedVector() && getSizeInBits() == 64; +} + +bool MVT::isExtended128BitVector() const { + return isExtendedVector() && getSizeInBits() == 128; +} + +MVT MVT::getExtendedVectorElementType() const { + assert(isExtended() && "Type is not extended!"); + return MVT::getMVT(cast(LLVMTy)->getElementType()); +} + +unsigned MVT::getExtendedVectorNumElements() const { + assert(isExtended() && "Type is not extended!"); + return cast(LLVMTy)->getNumElements(); +} + +unsigned MVT::getExtendedSizeInBits() const { + assert(isExtended() && "Type is not extended!"); + if (const IntegerType *ITy = dyn_cast(LLVMTy)) + return ITy->getBitWidth(); + if (const VectorType *VTy = dyn_cast(LLVMTy)) + return VTy->getBitWidth(); + assert(false && "Unrecognized extended type!"); +} + /// getMVTString - This function returns value type as a string, e.g. "i32". std::string MVT::getMVTString() const { switch (V) { Added: llvm/trunk/test/CodeGen/X86/i2k.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/i2k.ll?rev=58623&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/i2k.ll (added) +++ llvm/trunk/test/CodeGen/X86/i2k.ll Mon Nov 3 11:56:27 2008 @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=x86 + +define void @foo(i2011* %x, i2011* %y, i2011* %p) nounwind { + %a = load i2011* %x + %b = load i2011* %y + %c = add i2011 %a, %b + store i2011 %c, i2011* %p + ret void +} Modified: llvm/trunk/utils/TableGen/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CMakeLists.txt?rev=58623&r1=58622&r2=58623&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CMakeLists.txt (original) +++ llvm/trunk/utils/TableGen/CMakeLists.txt Mon Nov 3 11:56:27 2008 @@ -15,6 +15,7 @@ SubtargetEmitter.cpp TGLexer.cpp TGParser.cpp + TGValueTypes.cpp TableGen.cpp TableGenBackend.cpp FastISelEmitter.cpp Added: llvm/trunk/utils/TableGen/TGValueTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/TGValueTypes.cpp?rev=58623&view=auto ============================================================================== --- llvm/trunk/utils/TableGen/TGValueTypes.cpp (added) +++ llvm/trunk/utils/TableGen/TGValueTypes.cpp Mon Nov 3 11:56:27 2008 @@ -0,0 +1,123 @@ +//===- ValueTypes.cpp - Tablegen extended ValueType implementation --------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// The MVT type is used by tablegen as well as in LLVM. In order to handle +// extended types, the MVT type uses support functions that call into +// LLVM's type system code. These aren't accessible in tablegen, so this +// file provides simple replacements. +// +//===----------------------------------------------------------------------===// + +#include "llvm/CodeGen/ValueTypes.h" +#include "llvm/Support/Streams.h" +#include +#include +using namespace llvm; + +namespace llvm { + +class Type { +public: + virtual unsigned getSizeInBits() const = 0; +}; + +} + +class ExtendedIntegerType : public Type { + unsigned BitWidth; +public: + explicit ExtendedIntegerType(unsigned bits) + : BitWidth(bits) {} + unsigned getSizeInBits() const { + return getBitWidth(); + } + unsigned getBitWidth() const { + return BitWidth; + } +}; + +class ExtendedVectorType : public Type { + MVT ElementType; + unsigned NumElements; +public: + ExtendedVectorType(MVT elty, unsigned num) + : ElementType(elty), NumElements(num) {} + unsigned getSizeInBits() const { + return getNumElements() * getElementType().getSizeInBits(); + } + MVT getElementType() const { + return ElementType; + } + unsigned getNumElements() const { + return NumElements; + } +}; + +static std::map + ExtendedIntegerTypeMap; +static std::map, const Type *> + ExtendedVectorTypeMap; + +MVT MVT::getExtendedIntegerVT(unsigned BitWidth) { + const Type *&ET = ExtendedIntegerTypeMap[BitWidth]; + if (!ET) ET = new ExtendedIntegerType(BitWidth); + MVT VT; + VT.LLVMTy = ET; + return VT; +} + +MVT MVT::getExtendedVectorVT(MVT VT, unsigned NumElements) { + const Type *&ET = ExtendedVectorTypeMap[std::make_pair(VT.getRawBits(), + NumElements)]; + if (!ET) ET = new ExtendedVectorType(VT, NumElements); + MVT ResultVT; + ResultVT.LLVMTy = ET; + return ResultVT; +} + +bool MVT::isExtendedFloatingPoint() const { + assert(isExtended() && "Type is not extended!"); + // Extended floating-point types are not supported yet. + return false; +} + +bool MVT::isExtendedInteger() const { + assert(isExtended() && "Type is not extended!"); + return dynamic_cast(LLVMTy) != 0; +} + +bool MVT::isExtendedVector() const { + assert(isExtended() && "Type is not extended!"); + return dynamic_cast(LLVMTy) != 0; +} + +bool MVT::isExtended64BitVector() const { + assert(isExtended() && "Type is not extended!"); + return isExtendedVector() && getSizeInBits() == 64; +} + +bool MVT::isExtended128BitVector() const { + assert(isExtended() && "Type is not extended!"); + return isExtendedVector() && getSizeInBits() == 128; +} + +MVT MVT::getExtendedVectorElementType() const { + assert(isExtendedVector() && "Type is not an extended vector!"); + return static_cast(LLVMTy)->getElementType(); +} + +unsigned MVT::getExtendedVectorNumElements() const { + assert(isExtendedVector() && "Type is not an extended vector!"); + return static_cast(LLVMTy)->getNumElements(); +} + +unsigned MVT::getExtendedSizeInBits() const { + assert(isExtended() && "Type is not extended!"); + return LLVMTy->getSizeInBits(); +} From wangmp at apple.com Mon Nov 3 12:17:18 2008 From: wangmp at apple.com (Mon Ping Wang) Date: Mon, 3 Nov 2008 10:17:18 -0800 Subject: [llvm-commits] Patch: generalize vector shuffle In-Reply-To: References: <7C812DE7-E002-4767-A0AE-192738C25237@apple.com> <00BEE636-9DBF-40CE-A322-1A50F2D6BEE3@apple.com> Message-ID: Hi Evan, There are a few functions that duplicated between LegalizeTypes and LegalizeDAG. I wasn't sure if the right thing to do here. If LegalizeType will remain optional for sometime, I would have the two use the same function and have them shared (I don't think there is such a case today). If LegalizeType was be required soon, I thought it would be easier to duplicate the two and delete it from LegalizeDAG as it wouldn't be necessary anymore. However, it seems that I made a mistake of doing the 2nd way as this would cause some maintenance headaches until LegalizeType is required as well as making the patch more painful to digest. I'll look for a place to house these utilities functions so they can be shared. I'll clean up the early exit stuff and try to factor out more of SplitVecRes_VECTOR_SHUFFLE stuff. Thanks, -- Mon Ping On Nov 2, 2008, at 11:47 PM, Evan Cheng wrote: > Hi Mon Ping, > > Thanks for doing this. It's an important improvement. > > However, this patch is hard (at least for me) to digest. It's just a > lot of code. :-) Some of the functions have become so big that it's > hard to follow. For example, SplitVecRes_VECTOR_SHUFFLE. Is it > possible to factor some stuff out? > > Also, some of code seems to be replicated in several functions (please > correct me if that's not the case). For example, the code that > determines how an element is used. > > A stylistic nitpick: > > + if (VT1NumElems*2 == NumElems && SequentialMask(Mask, 0)) { > + setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, VT, V1, V2)); > + return; > + } > + else { > > The else { } isn't needed because of the early exit. Same issue here: > > + if (VT1NumElems == NumElems && SequentialMask(Mask,0)) { > + setValue(&I, V1); > + return; > + } else if (VT1NumElems == NumElems && > SequentialMask(Mask,NumElems)) { > + setValue(&I, V2); > + return; > + } else { > + // Analyze the access pattern of the vector to see if we can > extract > + // two subvectors and do the shuffle. > > Don't forget to end comment sentences with periods. :-) > > Evan > > On Oct 31, 2008, at 7:56 PM, Mon Ping Wang wrote: > >> > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From gohman at apple.com Mon Nov 3 12:22:43 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 03 Nov 2008 18:22:43 -0000 Subject: [llvm-commits] [llvm] r58624 - in /llvm/trunk: include/llvm/Target/DarwinTargetAsmInfo.h include/llvm/Target/ELFTargetAsmInfo.h include/llvm/Target/TargetAsmInfo.h lib/Target/ARM/ARMTargetAsmInfo.cpp lib/Target/Alpha/AlphaTargetAsmInfo.cpp lib/Target/CellSPU/SPUTargetAsmInfo.cpp lib/Target/DarwinTargetAsmInfo.cpp lib/Target/ELFTargetAsmInfo.cpp lib/Target/Mips/MipsTargetAsmInfo.cpp lib/Target/PIC16/PIC16TargetAsmInfo.cpp lib/Target/TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.h Message-ID: <200811031822.mA3IMikV018785@zion.cs.uiuc.edu> Author: djg Date: Mon Nov 3 12:22:42 2008 New Revision: 58624 URL: http://llvm.org/viewvc/llvm-project?rev=58624&view=rev Log: Refactor various TargetAsmInfo subclasses' TargetMachine members away adding a TargetMachine member to the base TargetAsmInfo class instead. Modified: llvm/trunk/include/llvm/Target/DarwinTargetAsmInfo.h llvm/trunk/include/llvm/Target/ELFTargetAsmInfo.h llvm/trunk/include/llvm/Target/TargetAsmInfo.h llvm/trunk/lib/Target/ARM/ARMTargetAsmInfo.cpp llvm/trunk/lib/Target/Alpha/AlphaTargetAsmInfo.cpp llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp llvm/trunk/lib/Target/Mips/MipsTargetAsmInfo.cpp llvm/trunk/lib/Target/PIC16/PIC16TargetAsmInfo.cpp llvm/trunk/lib/Target/TargetAsmInfo.cpp llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Modified: llvm/trunk/include/llvm/Target/DarwinTargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/DarwinTargetAsmInfo.h?rev=58624&r1=58623&r2=58624&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/DarwinTargetAsmInfo.h (original) +++ llvm/trunk/include/llvm/Target/DarwinTargetAsmInfo.h Mon Nov 3 12:22:42 2008 @@ -44,8 +44,6 @@ const Section* MergeableConstSection(const Type *Ty) const; const Section* MergeableStringSection(const GlobalVariable *GV) const; const Section* SelectSectionForMachineConst(const Type *Ty) const; - protected: - const TargetMachine* DTM; }; } Modified: llvm/trunk/include/llvm/Target/ELFTargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/ELFTargetAsmInfo.h?rev=58624&r1=58623&r2=58624&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/ELFTargetAsmInfo.h (original) +++ llvm/trunk/include/llvm/Target/ELFTargetAsmInfo.h Mon Nov 3 12:22:42 2008 @@ -33,8 +33,6 @@ const Section* MergeableStringSection(const GlobalVariable *GV) const; virtual const Section* SelectSectionForMachineConst(const Type *Ty) const; - protected: - const TargetMachine* ETM; }; } Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=58624&r1=58623&r2=58624&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Mon Nov 3 12:22:42 2008 @@ -126,6 +126,9 @@ mutable SectionFlags::FlagsStringsMapType FlagsStrings; void fillDefaultValues(); protected: + /// TM - The current TargetMachine. + const TargetMachine &TM; + //===------------------------------------------------------------------===// // Properties to be set by the target writer, used to configure asm printer. // @@ -510,8 +513,7 @@ const char *const *AsmTransCBE; // Defaults to empty public: - TargetAsmInfo(); - TargetAsmInfo(const TargetMachine &TM); + explicit TargetAsmInfo(const TargetMachine &TM); virtual ~TargetAsmInfo(); const Section* getNamedSection(const char *Name, Modified: llvm/trunk/lib/Target/ARM/ARMTargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetAsmInfo.cpp?rev=58624&r1=58623&r2=58624&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMTargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMTargetAsmInfo.cpp Mon Nov 3 12:22:42 2008 @@ -45,7 +45,7 @@ ARMDarwinTargetAsmInfo::ARMDarwinTargetAsmInfo(const ARMTargetMachine &TM): ARMTargetAsmInfo(TM) { - Subtarget = &DTM->getSubtarget(); + Subtarget = &TM.getSubtarget(); GlobalPrefix = "_"; PrivateGlobalPrefix = "L"; @@ -93,7 +93,7 @@ ARMELFTargetAsmInfo::ARMELFTargetAsmInfo(const ARMTargetMachine &TM): ARMTargetAsmInfo(TM) { - Subtarget = &ETM->getSubtarget(); + Subtarget = &TM.getSubtarget(); NeedsSet = false; HasLEB128 = true; Modified: llvm/trunk/lib/Target/Alpha/AlphaTargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaTargetAsmInfo.cpp?rev=58624&r1=58623&r2=58624&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaTargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaTargetAsmInfo.cpp Mon Nov 3 12:22:42 2008 @@ -11,11 +11,13 @@ // //===----------------------------------------------------------------------===// +#include "AlphaTargetMachine.h" #include "AlphaTargetAsmInfo.h" using namespace llvm; -AlphaTargetAsmInfo::AlphaTargetAsmInfo(const AlphaTargetMachine &TM) { +AlphaTargetAsmInfo::AlphaTargetAsmInfo(const AlphaTargetMachine &TM) + : TargetAsmInfo(TM) { AlignmentIsInBytes = false; PrivateGlobalPrefix = "$"; JumpTableDirective = ".gprel32"; Modified: llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp?rev=58624&r1=58623&r2=58624&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp Mon Nov 3 12:22:42 2008 @@ -16,7 +16,8 @@ #include "llvm/Function.h" using namespace llvm; -SPUTargetAsmInfo::SPUTargetAsmInfo(const SPUTargetMachine &TM) { +SPUTargetAsmInfo::SPUTargetAsmInfo(const SPUTargetMachine &TM) + : TargetAsmInfo(TM) { PCSymbol = "."; CommentString = "#"; GlobalPrefix = ""; Modified: llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp?rev=58624&r1=58623&r2=58624&view=diff ============================================================================== --- llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp Mon Nov 3 12:22:42 2008 @@ -24,8 +24,8 @@ using namespace llvm; -DarwinTargetAsmInfo::DarwinTargetAsmInfo(const TargetMachine &TM) { - DTM = &TM; +DarwinTargetAsmInfo::DarwinTargetAsmInfo(const TargetMachine &TM) + : TargetAsmInfo(TM) { CStringSection_ = getUnnamedSection("\t.cstring", SectionFlags::Mergeable | SectionFlags::Strings); @@ -76,7 +76,7 @@ DarwinTargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const { SectionKind::Kind Kind = SectionKindForGlobal(GV); bool isWeak = GV->mayBeOverridden(); - bool isNonStatic = (DTM->getRelocationModel() != Reloc::Static); + bool isNonStatic = TM.getRelocationModel() != Reloc::Static; switch (Kind) { case SectionKind::Text: @@ -112,13 +112,12 @@ const Section* DarwinTargetAsmInfo::MergeableStringSection(const GlobalVariable *GV) const { - const TargetData *TD = DTM->getTargetData(); + const TargetData *TD = TM.getTargetData(); Constant *C = cast(GV)->getInitializer(); const Type *Type = cast(C)->getType()->getElementType(); unsigned Size = TD->getABITypeSize(Type); if (Size) { - const TargetData *TD = DTM->getTargetData(); unsigned Align = TD->getPreferredAlignment(GV); if (Align <= 32) return getCStringSection_(); @@ -136,7 +135,7 @@ inline const Section* DarwinTargetAsmInfo::MergeableConstSection(const Type *Ty) const { - const TargetData *TD = DTM->getTargetData(); + const TargetData *TD = TM.getTargetData(); unsigned Size = TD->getABITypeSize(Ty); if (Size == 4) @@ -155,7 +154,7 @@ // Handle weird special case, when compiling PIC stuff. if (S == getReadOnlySection() && - DTM->getRelocationModel() != Reloc::Static) + TM.getRelocationModel() != Reloc::Static) return ConstDataSection; return S; Modified: llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp?rev=58624&r1=58623&r2=58624&view=diff ============================================================================== --- llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp Mon Nov 3 12:22:42 2008 @@ -24,8 +24,8 @@ using namespace llvm; -ELFTargetAsmInfo::ELFTargetAsmInfo(const TargetMachine &TM) { - ETM = &TM; +ELFTargetAsmInfo::ELFTargetAsmInfo(const TargetMachine &TM) + : TargetAsmInfo(TM) { BSSSection_ = getUnnamedSection("\t.bss", SectionFlags::Writeable | SectionFlags::BSS); @@ -102,7 +102,7 @@ inline const Section* ELFTargetAsmInfo::MergeableConstSection(const Type *Ty) const { - const TargetData *TD = ETM->getTargetData(); + const TargetData *TD = TM.getTargetData(); // FIXME: string here is temporary, until stuff will fully land in. // We cannot use {Four,Eight,Sixteen}ByteConstantSection here, since it's @@ -121,7 +121,7 @@ const Section* ELFTargetAsmInfo::MergeableStringSection(const GlobalVariable *GV) const { - const TargetData *TD = ETM->getTargetData(); + const TargetData *TD = TM.getTargetData(); Constant *C = cast(GV)->getInitializer(); const ConstantArray *CVA = cast(C); const Type *Ty = CVA->getType()->getElementType(); @@ -131,7 +131,6 @@ assert(getCStringSection() && "Should have string section prefix"); // We also need alignment here - const TargetData *TD = ETM->getTargetData(); unsigned Align = TD->getPrefTypeAlignment(Ty); if (Align < Size) Align = Size; Modified: llvm/trunk/lib/Target/Mips/MipsTargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetAsmInfo.cpp?rev=58624&r1=58623&r2=58624&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsTargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsTargetAsmInfo.cpp Mon Nov 3 12:22:42 2008 @@ -65,7 +65,7 @@ return K; if (isa(GV)) { - const TargetData *TD = ETM->getTargetData(); + const TargetData *TD = TM.getTargetData(); unsigned Size = TD->getABITypeSize(GV->getType()->getElementType()); unsigned Threshold = Subtarget->getSSectionThreshold(); Modified: llvm/trunk/lib/Target/PIC16/PIC16TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16TargetAsmInfo.cpp?rev=58624&r1=58623&r2=58624&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/PIC16/PIC16TargetAsmInfo.cpp Mon Nov 3 12:22:42 2008 @@ -12,12 +12,13 @@ //===----------------------------------------------------------------------===// #include "PIC16TargetAsmInfo.h" +#include "PIC16TargetMachine.h" using namespace llvm; PIC16TargetAsmInfo:: -PIC16TargetAsmInfo(const PIC16TargetMachine &TM) -{ +PIC16TargetAsmInfo(const PIC16TargetMachine &TM) + : TargetAsmInfo(TM) { Data16bitsDirective = "\t.half\t"; Data32bitsDirective = "\t.word\t"; CommentString = ";"; Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=58624&r1=58623&r2=58624&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Mon Nov 3 12:22:42 2008 @@ -119,11 +119,8 @@ DataSection = getUnnamedSection("\t.data", SectionFlags::Writeable); } -TargetAsmInfo::TargetAsmInfo() { - fillDefaultValues(); -} - -TargetAsmInfo::TargetAsmInfo(const TargetMachine &TM) { +TargetAsmInfo::TargetAsmInfo(const TargetMachine &tm) + : TM(tm) { fillDefaultValues(); } Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=58624&r1=58623&r2=58624&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Mon Nov 3 12:22:42 2008 @@ -39,7 +39,7 @@ X86DarwinTargetAsmInfo::X86DarwinTargetAsmInfo(const X86TargetMachine &TM): X86TargetAsmInfo(TM) { - const X86Subtarget* Subtarget = &DTM->getSubtarget(); + const X86Subtarget* Subtarget = &TM.getSubtarget(); bool is64Bit = Subtarget->is64Bit(); AlignmentIsInBytes = false; @@ -52,7 +52,7 @@ LessPrivateGlobalPrefix = "l"; // Marker for some ObjC metadata BSSSection = 0; // no BSS section. ZeroFillDirective = "\t.zerofill\t"; // Uses .zerofill - if (DTM->getRelocationModel() != Reloc::Static) + if (TM.getRelocationModel() != Reloc::Static) ConstantPoolSection = "\t.const_data"; else ConstantPoolSection = "\t.const\n"; @@ -171,17 +171,17 @@ DwarfExceptionSection = "\t.section\t.gcc_except_table,\"a\", at progbits"; // On Linux we must declare when we can use a non-executable stack. - if (ETM->getSubtarget().isLinux()) + if (TM.getSubtarget().isLinux()) NonexecutableStackDirective = "\t.section\t.note.GNU-stack,\"\", at progbits"; } unsigned X86ELFTargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason, bool Global) const { - CodeModel::Model CM = ETM->getCodeModel(); - bool is64Bit = ETM->getSubtarget().is64Bit(); + CodeModel::Model CM = TM.getCodeModel(); + bool is64Bit = TM.getSubtarget().is64Bit(); - if (ETM->getRelocationModel() == Reloc::PIC_) { + if (TM.getRelocationModel() == Reloc::PIC_) { unsigned Format = 0; if (!is64Bit) @@ -216,7 +216,6 @@ X86COFFTargetAsmInfo::X86COFFTargetAsmInfo(const X86TargetMachine &TM): X86GenericTargetAsmInfo(TM) { - X86TM = &TM; GlobalPrefix = "_"; LCOMMDirective = "\t.lcomm\t"; @@ -251,10 +250,10 @@ unsigned X86COFFTargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason, bool Global) const { - CodeModel::Model CM = X86TM->getCodeModel(); - bool is64Bit = X86TM->getSubtarget().is64Bit(); + CodeModel::Model CM = TM.getCodeModel(); + bool is64Bit = TM.getSubtarget().is64Bit(); - if (X86TM->getRelocationModel() == Reloc::PIC_) { + if (TM.getRelocationModel() == Reloc::PIC_) { unsigned Format = 0; if (!is64Bit) Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h?rev=58624&r1=58623&r2=58624&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h (original) +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.h Mon Nov 3 12:22:42 2008 @@ -63,8 +63,6 @@ virtual std::string UniqueSectionForGlobal(const GlobalValue* GV, SectionKind::Kind kind) const; virtual std::string printSectionFlags(unsigned flags) const; - protected: - const X86TargetMachine *X86TM; }; struct X86WinTargetAsmInfo : public X86GenericTargetAsmInfo { From dpatel at apple.com Mon Nov 3 12:32:19 2008 From: dpatel at apple.com (Devang Patel) Date: Mon, 03 Nov 2008 18:32:19 -0000 Subject: [llvm-commits] [llvm] r58625 - in /llvm/trunk: lib/Transforms/Scalar/IndVarSimplify.cpp test/Transforms/IndVarsSimplify/2008-11-03-Floating.ll Message-ID: <200811031832.mA3IWJL2019277@zion.cs.uiuc.edu> Author: dpatel Date: Mon Nov 3 12:32:19 2008 New Revision: 58625 URL: http://llvm.org/viewvc/llvm-project?rev=58625&view=rev Log: Turn floating point IVs into integer IVs where possible. This allows SCEV users to effectively calculate trip count. LSR later on transforms back integer IVs to floating point IVs later on to avoid int-to-float casts inside the loop. Added: llvm/trunk/test/Transforms/IndVarsSimplify/2008-11-03-Floating.ll Modified: llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp Modified: llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp?rev=58625&r1=58624&r2=58625&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp Mon Nov 3 12:32:19 2008 @@ -95,6 +95,7 @@ void DeleteTriviallyDeadInstructions(std::set &Insts); void OptimizeCanonicalIVType(Loop *L); + void HandleFloatingPointIV(Loop *L); }; } @@ -466,6 +467,7 @@ // auxillary induction variables. std::vector > IndVars; + HandleFloatingPointIV(L); for (BasicBlock::iterator I = Header->begin(); isa(I); ++I) { PHINode *PN = cast(I); if (PN->getType()->isInteger()) { // FIXME: when we have fast-math, enable! @@ -718,3 +720,151 @@ Incr->eraseFromParent(); } +/// HandleFloatingPointIV - If the loop has floating induction variable +/// then insert corresponding integer induction variable if possible. +void IndVarSimplify::HandleFloatingPointIV(Loop *L) { + BasicBlock *Header = L->getHeader(); + SmallVector FPHIs; + Instruction *NonPHIInsn = NULL; + + // Collect all floating point IVs first. + BasicBlock::iterator I = Header->begin(); + while(true) { + if (!isa(I)) { + NonPHIInsn = I; + break; + } + PHINode *PH = cast(I); + if (PH->getType()->isFloatingPoint()) + FPHIs.push_back(PH); + ++I; + } + + for (SmallVector::iterator I = FPHIs.begin(), E = FPHIs.end(); + I != E; ++I) { + PHINode *PH = *I; + unsigned IncomingEdge = L->contains(PH->getIncomingBlock(0)); + unsigned BackEdge = IncomingEdge^1; + + // Check incoming value. + ConstantFP *CZ = dyn_cast(PH->getIncomingValue(IncomingEdge)); + if (!CZ) continue; + APFloat PHInit = CZ->getValueAPF(); + if (!PHInit.isPosZero()) continue; + + // Check IV increment. + BinaryOperator *Incr = + dyn_cast(PH->getIncomingValue(BackEdge)); + if (!Incr) continue; + if (Incr->getOpcode() != Instruction::Add) continue; + ConstantFP *IncrValue = NULL; + unsigned IncrVIndex = 1; + if (Incr->getOperand(1) == PH) + IncrVIndex = 0; + IncrValue = dyn_cast(Incr->getOperand(IncrVIndex)); + if (!IncrValue) continue; + APFloat IVAPF = IncrValue->getValueAPF(); + APFloat One = APFloat(IVAPF.getSemantics(), 1); + if (!IVAPF.bitwiseIsEqual(One)) continue; + + // Check Incr uses. + Value::use_iterator IncrUse = Incr->use_begin(); + Instruction *U1 = cast(IncrUse++); + if (IncrUse == Incr->use_end()) continue; + Instruction *U2 = cast(IncrUse++); + if (IncrUse != Incr->use_end()) continue; + + // Find exict condition. + FCmpInst *EC = dyn_cast(U1); + if (!EC) + EC = dyn_cast(U2); + if (!EC) continue; + bool skip = false; + Instruction *Terminator = EC->getParent()->getTerminator(); + for(Value::use_iterator ECUI = EC->use_begin(), ECUE = EC->use_end(); + ECUI != ECUE; ++ECUI) { + Instruction *U = cast(ECUI); + if (U != Terminator) { + skip = true; + break; + } + } + if (skip) continue; + + // Find exit value. + ConstantFP *EV = NULL; + unsigned EVIndex = 1; + if (EC->getOperand(1) == Incr) + EVIndex = 0; + EV = dyn_cast(EC->getOperand(EVIndex)); + if (!EV) continue; + APFloat EVAPF = EV->getValueAPF(); + if (EVAPF.isNegative()) continue; + + // Find corresponding integer exit value. + uint64_t integerVal = Type::Int32Ty->getPrimitiveSizeInBits(); + bool isExact = false; + if (EVAPF.convertToInteger(&integerVal, 32, false, APFloat::rmTowardZero, &isExact) + != APFloat::opOK) + continue; + if (!isExact) continue; + + // Find new predicate for integer comparison. + CmpInst::Predicate NewPred = CmpInst::BAD_ICMP_PREDICATE; + switch (EC->getPredicate()) { + case CmpInst::FCMP_OEQ: + case CmpInst::FCMP_UEQ: + NewPred = CmpInst::ICMP_EQ; + break; + case CmpInst::FCMP_OGT: + case CmpInst::FCMP_UGT: + NewPred = CmpInst::ICMP_UGT; + break; + case CmpInst::FCMP_OGE: + case CmpInst::FCMP_UGE: + NewPred = CmpInst::ICMP_UGE; + break; + case CmpInst::FCMP_OLT: + case CmpInst::FCMP_ULT: + NewPred = CmpInst::ICMP_ULT; + break; + case CmpInst::FCMP_OLE: + case CmpInst::FCMP_ULE: + NewPred = CmpInst::ICMP_ULE; + break; + default: + break; + } + if (NewPred == CmpInst::BAD_ICMP_PREDICATE) continue; + + // Insert new integer induction variable. + SCEVExpander Rewriter(*SE, *LI); + PHINode *NewIV = + cast(Rewriter.getOrInsertCanonicalInductionVariable(L,Type::Int32Ty)); + ConstantInt *NewEV = ConstantInt::get(Type::Int32Ty, integerVal); + Value *LHS = (EVIndex == 1 ? NewIV->getIncomingValue(BackEdge) : NewEV); + Value *RHS = (EVIndex == 1 ? NewEV : NewIV->getIncomingValue(BackEdge)); + ICmpInst *NewEC = new ICmpInst(NewPred, LHS, RHS, EC->getNameStart(), + EC->getParent()->getTerminator()); + + // Delete old, floating point, exit comparision instruction. + SE->deleteValueFromRecords(EC); + EC->replaceAllUsesWith(NewEC); + EC->eraseFromParent(); + + // Delete old, floating point, increment instruction. + SE->deleteValueFromRecords(Incr); + Incr->replaceAllUsesWith(UndefValue::get(Incr->getType())); + Incr->eraseFromParent(); + + // Replace floating induction variable. + UIToFPInst *Conv = new UIToFPInst(NewIV, PH->getType(), "indvar.conv", + NonPHIInsn); + PH->replaceAllUsesWith(Conv); + + SE->deleteValueFromRecords(PH); + PH->removeIncomingValue((unsigned)0); + PH->removeIncomingValue((unsigned)0); + } +} + Added: llvm/trunk/test/Transforms/IndVarsSimplify/2008-11-03-Floating.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarsSimplify/2008-11-03-Floating.ll?rev=58625&view=auto ============================================================================== --- llvm/trunk/test/Transforms/IndVarsSimplify/2008-11-03-Floating.ll (added) +++ llvm/trunk/test/Transforms/IndVarsSimplify/2008-11-03-Floating.ll Mon Nov 3 12:32:19 2008 @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | opt -indvars | llvm-dis | grep icmp | count 1 +define void @bar() nounwind { +entry: + br label %bb + +bb: ; preds = %bb, %entry + %x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; [#uses=2] + %0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; [#uses=0] + %1 = add double %x.0.reg2mem.0, 1.000000e+00 ; [#uses=2] + %2 = fcmp olt double %1, 1.000000e+04 ; [#uses=1] + br i1 %2, label %bb, label %return + +return: ; preds = %bb + ret void +} + +declare i32 @foo(double) From grosbach at apple.com Mon Nov 3 12:38:32 2008 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 03 Nov 2008 18:38:32 -0000 Subject: [llvm-commits] [llvm] r58626 - in /llvm/trunk/lib/Target/ARM: ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.h ARMInstrInfo.td Message-ID: <200811031838.mA3IcWqw019585@zion.cs.uiuc.edu> Author: grosbach Date: Mon Nov 3 12:38:31 2008 New Revision: 58626 URL: http://llvm.org/viewvc/llvm-project?rev=58626&view=rev Log: Add binary encoding support for multiply instructions. Some blanks left to fill in, but the basics are there. Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrInfo.h llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58626&r1=58625&r2=58626&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Mon Nov 3 12:38:31 2008 @@ -82,8 +82,8 @@ const TargetInstrDesc &TID, const MachineOperand &MO); - unsigned getAddrMode1SBit(const MachineInstr &MI, - const TargetInstrDesc &TID) const; + unsigned getAddrModeSBit(const MachineInstr &MI, + const TargetInstrDesc &TID) const; unsigned getAddrMode1InstrBinary(const MachineInstr &MI, const TargetInstrDesc &TID, @@ -97,6 +97,9 @@ unsigned getAddrMode4InstrBinary(const MachineInstr &MI, const TargetInstrDesc &TID, unsigned Binary); + unsigned getAddrMode6InstrBinary(const MachineInstr &MI, + const TargetInstrDesc &TID, + unsigned Binary); /// getInstrBinary - Return binary encoding for the specified /// machine instruction. @@ -432,8 +435,8 @@ return Binary; } -unsigned ARMCodeEmitter::getAddrMode1SBit(const MachineInstr &MI, - const TargetInstrDesc &TID) const { +unsigned ARMCodeEmitter::getAddrModeSBit(const MachineInstr &MI, + const TargetInstrDesc &TID) const { for (unsigned i = MI.getNumOperands(), e = TID.getNumOperands(); i != e; --i){ const MachineOperand &MO = MI.getOperand(i-1); if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) @@ -449,7 +452,7 @@ Binary |= II->getPredicate(&MI) << 28; // Encode S bit if MI modifies CPSR. - Binary |= getAddrMode1SBit(MI, TID); + Binary |= getAddrModeSBit(MI, TID); // Encode register def if there is one. unsigned NumDefs = TID.getNumDefs(); @@ -618,6 +621,33 @@ return Binary; } +unsigned ARMCodeEmitter::getAddrMode6InstrBinary(const MachineInstr &MI, + const TargetInstrDesc &TID, + unsigned Binary) { + // Set the conditional execution predicate + Binary |= II->getPredicate(&MI) << 28; + + // Encode S bit if MI modifies CPSR. + Binary |= getAddrModeSBit(MI, TID); + + // 32x32->64bit operations have two destination registers. The number + // of register definitions will tell us if that's what we're dealing with. + int OpIdx = 0; + if (TID.getNumDefs() == 2) + Binary |= getMachineOpValue (MI, OpIdx++) << ARMII::RegRdLoShift; + + // Encode Rd + Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdHiShift; + + // Encode Rm + Binary |= getMachineOpValue(MI, OpIdx++); + + // Encode Rs + Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRsShift; + + return Binary; +} + /// getInstrBinary - Return binary encoding for the specified /// machine instruction. unsigned ARMCodeEmitter::getInstrBinary(const MachineInstr &MI) { @@ -636,6 +666,8 @@ return getAddrMode3InstrBinary(MI, TID, Binary); case ARMII::AddrMode4: return getAddrMode4InstrBinary(MI, TID, Binary); + case ARMII::AddrMode6: + return getAddrMode6InstrBinary(MI, TID, Binary); } abort(); Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58626&r1=58625&r2=58626&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Mon Nov 3 12:38:31 2008 @@ -659,6 +659,28 @@ let Inst{27-25} = 0b100; } +// addrmode6 +// Unsigned multiply, multiply-accumulate instructions. +class AI6 opcod, dag oops, dag iops, Format f, string opc, + string asm, list pattern> + : I +{ + // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, SMLAWy, ...) + let Inst{7-4} = 0b1001; + let Inst{27-24} = 0b0000; + let Inst{23-20} = opcod; +} +class AsI6 opcod, dag oops, dag iops, Format f, string opc, + string asm, list pattern> + : sI +{ + // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, SMLAWy, ...) + let Inst{7-4} = 0b1001; + let Inst{27-24} = 0b0000; + let Inst{23-20} = opcod; +} //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=58626&r1=58625&r2=58626&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Mon Nov 3 12:38:31 2008 @@ -30,8 +30,7 @@ // Instruction Flags. //===------------------------------------------------------------------===// - // This three-bit field describes the addressing mode used. Zero is unused - // so that we can tell if we forgot to set a value. + // This four-bit field describes the addressing mode used. AddrModeMask = 0xf, AddrModeNone = 0, @@ -40,10 +39,11 @@ AddrMode3 = 3, AddrMode4 = 4, AddrMode5 = 5, - AddrModeT1 = 6, - AddrModeT2 = 7, - AddrModeT4 = 8, - AddrModeTs = 9, // i8 * 4 for pc and sp relative data + AddrMode6 = 6, + AddrModeT1 = 7, + AddrModeT2 = 8, + AddrModeT4 = 9, + AddrModeTs = 10, // i8 * 4 for pc and sp relative data // Size* - Flags to keep track of the size of an instruction. SizeShift = 4, @@ -115,15 +115,17 @@ // Field shifts - such shifts are used to set field while generating // machine instructions. - RotImmShift = 8, - RegRsShift = 8, - RegRdShift = 12, - RegRnShift = 16, - L_BitShift = 20, - S_BitShift = 20, - U_BitShift = 23, - IndexShift = 24, - I_BitShift = 25 + RotImmShift = 8, + RegRsShift = 8, + RegRdLoShift = 12, + RegRdShift = 12, + RegRdHiShift = 16, + RegRnShift = 16, + L_BitShift = 20, + S_BitShift = 20, + U_BitShift = 23, + IndexShift = 24, + I_BitShift = 25 }; } Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58626&r1=58625&r2=58626&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Nov 3 12:38:31 2008 @@ -310,10 +310,11 @@ def AddrMode3 : AddrMode<3>; def AddrMode4 : AddrMode<4>; def AddrMode5 : AddrMode<5>; -def AddrModeT1 : AddrMode<6>; -def AddrModeT2 : AddrMode<7>; -def AddrModeT4 : AddrMode<8>; -def AddrModeTs : AddrMode<9>; +def AddrMode6 : AddrMode<6>; +def AddrModeT1 : AddrMode<7>; +def AddrModeT2 : AddrMode<8>; +def AddrModeT4 : AddrMode<9>; +def AddrModeTs : AddrMode<10>; // Instruction size. class SizeFlagVal val> { @@ -910,49 +911,53 @@ // Multiply Instructions. // -def MUL : AsI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm, - "mul", " $dst, $a, $b", - [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>; - -def MLA : AsI<0x2, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), - MulFrm, "mla", " $dst, $a, $b, $c", - [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR:$c))]>; +def MUL : AsI6<0b0000, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm, + "mul", " $dst, $a, $b", + [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>; + +def MLA : AsI6<0b0010, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), + MulFrm, "mla", " $dst, $a, $b, $c", + [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR:$c))]>; // Extra precision multiplies with low / high results -def SMULL : AsI<0xC, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b), - MulFrm, "smull", " $ldst, $hdst, $a, $b", []>; +def SMULL : AsI6<0b1100, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b), + MulFrm, "smull", " $ldst, $hdst, $a, $b", []>; -def UMULL : AsI<0x8, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b), - MulFrm, "umull", " $ldst, $hdst, $a, $b", []>; +def UMULL : AsI6<0b1000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b), + MulFrm, "umull", " $ldst, $hdst, $a, $b", []>; // Multiply + accumulate -def SMLAL : AsI<0xE, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b), - MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>; +def SMLAL : AsI6<0b1110, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b), + MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>; -def UMLAL : AsI<0xA, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b), - MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>; +def UMLAL : AsI6<0b1010, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b), + MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>; -def UMAAL : AI<0x0, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b), MulFrm, - "umaal", " $ldst, $hdst, $a, $b", []>, - Requires<[IsARM, HasV6]>; +def UMAAL : AI6 <0b0000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b), + MulFrm, "umaal", " $ldst, $hdst, $a, $b", []>, + Requires<[IsARM, HasV6]>; // Most significant word multiply +// FIXME: encoding def SMMUL : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm, "smmul", " $dst, $a, $b", [(set GPR:$dst, (mulhs GPR:$a, GPR:$b))]>, Requires<[IsARM, HasV6]>; +// FIXME: encoding def SMMLA : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), MulFrm, "smmla", " $dst, $a, $b, $c", [(set GPR:$dst, (add (mulhs GPR:$a, GPR:$b), GPR:$c))]>, Requires<[IsARM, HasV6]>; +// FIXME: encoding def SMMLS : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), MulFrm, "smmls", " $dst, $a, $b, $c", [(set GPR:$dst, (sub GPR:$c, (mulhs GPR:$a, GPR:$b)))]>, Requires<[IsARM, HasV6]>; +// FIXME: encoding multiclass AI_smul { def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL, !strconcat(opc, "bb"), " $dst, $a, $b", @@ -992,6 +997,7 @@ } +// FIXME: encoding multiclass AI_smla { def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), MulSMLA, !strconcat(opc, "bb"), " $dst, $a, $b, $acc", @@ -1031,7 +1037,9 @@ Requires<[IsARM, HasV5TE]>; } +// FIXME: encoding defm SMUL : AI_smul<"smul", BinOpFrag<(mul node:$LHS, node:$RHS)>>; +// FIXME: encoding defm SMLA : AI_smla<"smla", BinOpFrag<(mul node:$LHS, node:$RHS)>>; // TODO: Halfword multiple accumulate long: SMLAL From evan.cheng at apple.com Mon Nov 3 12:39:14 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Nov 2008 10:39:14 -0800 Subject: [llvm-commits] [llvm] r58591 - /llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp In-Reply-To: <200811030233.mA32XSLO031832@zion.cs.uiuc.edu> References: <200811030233.mA32XSLO031832@zion.cs.uiuc.edu> Message-ID: Thanks. Your check was overly restrictive. The proper check needs if any bb that's part of the live ranges defined by the val# can be reached from the def instruction and the restore instruction. I see one of the following solutions: 1. Walk the cfg from both def mbb and barrier mbb and look for new joins. This is potentially expensive so perhaps we can cache the information for live interval shrink wrapping? 2. Detect this during live interval shrink wrapping and introduce a new val# to define the joined portion and mark old and new val# as hasPHIKill. 3. Detect this during live interval shrink wrapping and undo all the changes? Seems to me #2 is the ideal solution unless #1 turns out to be relative cheap. Evan On Nov 2, 2008, at 6:33 PM, Owen Anderson wrote: > Author: resistor > Date: Sun Nov 2 20:33:28 2008 > New Revision: 58591 > > URL: http://llvm.org/viewvc/llvm-project?rev=58591&view=rev > Log: > Revert my last patch until I consult with Evan about it. > > Modified: > llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp > > Modified: llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp?rev=58591&r1=58590&r2=58591&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp (original) > +++ llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp Sun Nov 2 20:33:28 > 2008 > @@ -89,8 +89,6 @@ > AU.addPreservedID(StrongPHIEliminationID); > else > AU.addPreservedID(PHIEliminationID); > - AU.addRequired(); > - AU.addPreserved(); > MachineFunctionPass::getAnalysisUsage(AU); > } > > @@ -635,14 +633,6 @@ > assert(0 && "Val# is defined by a dead def?"); > abort(); > } > - > - // Pre-splitting a vreg that does not have a PHI kill across a > barrier > - // that is within a loop can potentially create a join that was not > - // present before, which would make updating the live intervals > very > - // difficult. Bailout instead. > - MachineLoopInfo& MLI = getAnalysis(); > - if (!ValNo->hasPHIKill && MLI.getLoopFor(BarrierMBB)) > - return false; > > // FIXME: For now, if definition is rematerializable, do not split. > MachineInstr *DefMI = (ValNo->def != ~0U) > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From kremenek at apple.com Mon Nov 3 12:53:22 2008 From: kremenek at apple.com (Ted Kremenek) Date: Mon, 03 Nov 2008 18:53:22 -0000 Subject: [llvm-commits] [llvm] r58627 - /llvm/tags/checker/checker-121/ Message-ID: <200811031853.mA3IrMDu020438@zion.cs.uiuc.edu> Author: kremenek Date: Mon Nov 3 12:53:21 2008 New Revision: 58627 URL: http://llvm.org/viewvc/llvm-project?rev=58627&view=rev Log: Tagging checker-121. Added: llvm/tags/checker/checker-121/ - copied from r58626, llvm/trunk/ From wendling at apple.com Mon Nov 3 13:11:28 2008 From: wendling at apple.com (Bill Wendling) Date: Mon, 3 Nov 2008 11:11:28 -0800 Subject: [llvm-commits] Recent apple changes broke the Ada build In-Reply-To: <04263C73-375B-4CEE-88E8-40E4281139A9@apple.com> References: <200811030930.20704.duncan.sands@math.u-psud.fr> <04263C73-375B-4CEE-88E8-40E4281139A9@apple.com> Message-ID: <47C33C69-6490-4B1D-9595-8B0417FEB0EC@apple.com> Hi Duncan, Sorry about the breakage. We're trying to be more diligent about not breaking non-C-based languages. I'll look into this. -bw On Nov 3, 2008, at 4:11 AM, Chris Lattner wrote: > > On Nov 3, 2008, at 12:30 AM, Duncan Sands wrote: > >> Hi Bill, I'm getting these errors when building Ada: > > Fariborz, can you please investigate genericizing, #ifdef'ing, or > stubbing these? Thanks, > > -Chris > > >> >> >> libbackend.a(dwarf2out.o): In function `add_type_attribute': >> gcc/dwarf2out.c:11732: undefined reference to >> `generic_block_literal_struct_type' >> libbackend.a(gtype-desc.o):(.rodata+0x9f8): undefined reference to >> `generic_block_literal_struct_type' >> libbackend.a(tree.o): In function `build_block_pointer_type': >> gcc/tree.c:5112: undefined reference to >> `generic_block_literal_struct_type' >> gcc/tree.c:5113: undefined reference to >> `build_generic_block_struct_type' >> gcc/tree.c:5113: undefined reference to >> `generic_block_literal_struct_type' >> >> Can you please take care of it. I understand that you can't >> reasonably >> try to build Ada before committing, but maybe in the future you can >> check >> that Fortran builds (both languages usually fail to build when >> Apple changes >> put C stuff in non-C places): it should just be a matter of adding >> "fortran" >> to --enable-languages=. Since Fortran is (hopefully) going to be >> included in >> the next release, it would anyway be good to regularly test Fortran. >> >> Ciao, >> >> Duncan. >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From evan.cheng at apple.com Mon Nov 3 13:17:29 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Nov 2008 11:17:29 -0800 Subject: [llvm-commits] [llvm] r58626 - in /llvm/trunk/lib/Target/ARM: ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.h ARMInstrInfo.td In-Reply-To: <200811031838.mA3IcWqw019585@zion.cs.uiuc.edu> References: <200811031838.mA3IcWqw019585@zion.cs.uiuc.edu> Message-ID: Thanks. But is addrmode6 the right name? I don't see ARM manuals using that name. Evan On Nov 3, 2008, at 10:38 AM, Jim Grosbach wrote: > Author: grosbach > Date: Mon Nov 3 12:38:31 2008 > New Revision: 58626 > > URL: http://llvm.org/viewvc/llvm-project?rev=58626&view=rev > Log: > Add binary encoding support for multiply instructions. Some blanks > left to fill in, but the basics are there. > > Modified: > llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp > llvm/trunk/lib/Target/ARM/ARMInstrFormats.td > llvm/trunk/lib/Target/ARM/ARMInstrInfo.h > llvm/trunk/lib/Target/ARM/ARMInstrInfo.td > > Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58626&r1=58625&r2=58626&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original) > +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Mon Nov 3 12:38:31 > 2008 > @@ -82,8 +82,8 @@ > const TargetInstrDesc &TID, > const MachineOperand &MO); > > - unsigned getAddrMode1SBit(const MachineInstr &MI, > - const TargetInstrDesc &TID) const; > + unsigned getAddrModeSBit(const MachineInstr &MI, > + const TargetInstrDesc &TID) const; > > unsigned getAddrMode1InstrBinary(const MachineInstr &MI, > const TargetInstrDesc &TID, > @@ -97,6 +97,9 @@ > unsigned getAddrMode4InstrBinary(const MachineInstr &MI, > const TargetInstrDesc &TID, > unsigned Binary); > + unsigned getAddrMode6InstrBinary(const MachineInstr &MI, > + const TargetInstrDesc &TID, > + unsigned Binary); > > /// getInstrBinary - Return binary encoding for the specified > /// machine instruction. > @@ -432,8 +435,8 @@ > return Binary; > } > > -unsigned ARMCodeEmitter::getAddrMode1SBit(const MachineInstr &MI, > - const TargetInstrDesc > &TID) const { > +unsigned ARMCodeEmitter::getAddrModeSBit(const MachineInstr &MI, > + const TargetInstrDesc > &TID) const { > for (unsigned i = MI.getNumOperands(), e = TID.getNumOperands(); > i != e; --i){ > const MachineOperand &MO = MI.getOperand(i-1); > if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) > @@ -449,7 +452,7 @@ > Binary |= II->getPredicate(&MI) << 28; > > // Encode S bit if MI modifies CPSR. > - Binary |= getAddrMode1SBit(MI, TID); > + Binary |= getAddrModeSBit(MI, TID); > > // Encode register def if there is one. > unsigned NumDefs = TID.getNumDefs(); > @@ -618,6 +621,33 @@ > return Binary; > } > > +unsigned ARMCodeEmitter::getAddrMode6InstrBinary(const MachineInstr > &MI, > + const > TargetInstrDesc &TID, > + unsigned Binary) { > + // Set the conditional execution predicate > + Binary |= II->getPredicate(&MI) << 28; > + > + // Encode S bit if MI modifies CPSR. > + Binary |= getAddrModeSBit(MI, TID); > + > + // 32x32->64bit operations have two destination registers. The > number > + // of register definitions will tell us if that's what we're > dealing with. > + int OpIdx = 0; > + if (TID.getNumDefs() == 2) > + Binary |= getMachineOpValue (MI, OpIdx++) << ARMII::RegRdLoShift; > + > + // Encode Rd > + Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdHiShift; > + > + // Encode Rm > + Binary |= getMachineOpValue(MI, OpIdx++); > + > + // Encode Rs > + Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRsShift; > + > + return Binary; > +} > + > /// getInstrBinary - Return binary encoding for the specified > /// machine instruction. > unsigned ARMCodeEmitter::getInstrBinary(const MachineInstr &MI) { > @@ -636,6 +666,8 @@ > return getAddrMode3InstrBinary(MI, TID, Binary); > case ARMII::AddrMode4: > return getAddrMode4InstrBinary(MI, TID, Binary); > + case ARMII::AddrMode6: > + return getAddrMode6InstrBinary(MI, TID, Binary); > } > > abort(); > > Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58626&r1=58625&r2=58626&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) > +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Mon Nov 3 12:38:31 > 2008 > @@ -659,6 +659,28 @@ > let Inst{27-25} = 0b100; > } > > +// addrmode6 > +// Unsigned multiply, multiply-accumulate instructions. > +class AI6 opcod, dag oops, dag iops, Format f, string opc, > + string asm, list pattern> > + : I opc, > + asm,"",pattern> > +{ > + // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, SMLAWy, ...) > + let Inst{7-4} = 0b1001; > + let Inst{27-24} = 0b0000; > + let Inst{23-20} = opcod; > +} > +class AsI6 opcod, dag oops, dag iops, Format f, string opc, > + string asm, list pattern> > + : sI opc, > + asm,"",pattern> > +{ > + // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, SMLAWy, ...) > + let Inst{7-4} = 0b1001; > + let Inst{27-24} = 0b0000; > + let Inst{23-20} = opcod; > +} > > // > = > = > = > ----------------------------------------------------------------------= > ==// > > > Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=58626&r1=58625&r2=58626&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original) > +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Mon Nov 3 12:38:31 2008 > @@ -30,8 +30,7 @@ > // Instruction Flags. > > // > ===------------------------------------------------------------------ > ===// > - // This three-bit field describes the addressing mode used. > Zero is unused > - // so that we can tell if we forgot to set a value. > + // This four-bit field describes the addressing mode used. > > AddrModeMask = 0xf, > AddrModeNone = 0, > @@ -40,10 +39,11 @@ > AddrMode3 = 3, > AddrMode4 = 4, > AddrMode5 = 5, > - AddrModeT1 = 6, > - AddrModeT2 = 7, > - AddrModeT4 = 8, > - AddrModeTs = 9, // i8 * 4 for pc and sp relative data > + AddrMode6 = 6, > + AddrModeT1 = 7, > + AddrModeT2 = 8, > + AddrModeT4 = 9, > + AddrModeTs = 10, // i8 * 4 for pc and sp relative data > > // Size* - Flags to keep track of the size of an instruction. > SizeShift = 4, > @@ -115,15 +115,17 @@ > > // Field shifts - such shifts are used to set field while > generating > // machine instructions. > - RotImmShift = 8, > - RegRsShift = 8, > - RegRdShift = 12, > - RegRnShift = 16, > - L_BitShift = 20, > - S_BitShift = 20, > - U_BitShift = 23, > - IndexShift = 24, > - I_BitShift = 25 > + RotImmShift = 8, > + RegRsShift = 8, > + RegRdLoShift = 12, > + RegRdShift = 12, > + RegRdHiShift = 16, > + RegRnShift = 16, > + L_BitShift = 20, > + S_BitShift = 20, > + U_BitShift = 23, > + IndexShift = 24, > + I_BitShift = 25 > }; > } > > > Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58626&r1=58625&r2=58626&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) > +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Nov 3 12:38:31 2008 > @@ -310,10 +310,11 @@ > def AddrMode3 : AddrMode<3>; > def AddrMode4 : AddrMode<4>; > def AddrMode5 : AddrMode<5>; > -def AddrModeT1 : AddrMode<6>; > -def AddrModeT2 : AddrMode<7>; > -def AddrModeT4 : AddrMode<8>; > -def AddrModeTs : AddrMode<9>; > +def AddrMode6 : AddrMode<6>; > +def AddrModeT1 : AddrMode<7>; > +def AddrModeT2 : AddrMode<8>; > +def AddrModeT4 : AddrMode<9>; > +def AddrModeTs : AddrMode<10>; > > // Instruction size. > class SizeFlagVal val> { > @@ -910,49 +911,53 @@ > // Multiply Instructions. > // > > -def MUL : AsI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm, > - "mul", " $dst, $a, $b", > - [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>; > - > -def MLA : AsI<0x2, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), > - MulFrm, "mla", " $dst, $a, $b, $c", > - [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR:$c))]>; > +def MUL : AsI6<0b0000, (outs GPR:$dst), (ins GPR:$a, GPR:$b), > MulFrm, > + "mul", " $dst, $a, $b", > + [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>; > + > +def MLA : AsI6<0b0010, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR: > $c), > + MulFrm, "mla", " $dst, $a, $b, $c", > + [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR: > $c))]>; > > // Extra precision multiplies with low / high results > -def SMULL : AsI<0xC, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: > $b), > - MulFrm, "smull", " $ldst, $hdst, $a, $b", []>; > +def SMULL : AsI6<0b1100, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, > GPR:$b), > + MulFrm, "smull", " $ldst, $hdst, $a, $b", []>; > > -def UMULL : AsI<0x8, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: > $b), > - MulFrm, "umull", " $ldst, $hdst, $a, $b", []>; > +def UMULL : AsI6<0b1000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, > GPR:$b), > + MulFrm, "umull", " $ldst, $hdst, $a, $b", []>; > > // Multiply + accumulate > -def SMLAL : AsI<0xE, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: > $b), > - MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>; > +def SMLAL : AsI6<0b1110, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, > GPR:$b), > + MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>; > > -def UMLAL : AsI<0xA, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: > $b), > - MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>; > +def UMLAL : AsI6<0b1010, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, > GPR:$b), > + MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>; > > -def UMAAL : AI<0x0, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: > $b), MulFrm, > - "umaal", " $ldst, $hdst, $a, $b", []>, > - Requires<[IsARM, HasV6]>; > +def UMAAL : AI6 <0b0000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, > GPR:$b), > + MulFrm, "umaal", " $ldst, $hdst, $a, $b", []>, > + Requires<[IsARM, HasV6]>; > > // Most significant word multiply > +// FIXME: encoding > def SMMUL : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm, > "smmul", " $dst, $a, $b", > [(set GPR:$dst, (mulhs GPR:$a, GPR:$b))]>, > Requires<[IsARM, HasV6]>; > > +// FIXME: encoding > def SMMLA : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), > MulFrm, > "smmla", " $dst, $a, $b, $c", > [(set GPR:$dst, (add (mulhs GPR:$a, GPR:$b), GPR: > $c))]>, > Requires<[IsARM, HasV6]>; > > > +// FIXME: encoding > def SMMLS : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), > MulFrm, > "smmls", " $dst, $a, $b, $c", > [(set GPR:$dst, (sub GPR:$c, (mulhs GPR:$a, GPR: > $b)))]>, > Requires<[IsARM, HasV6]>; > > +// FIXME: encoding > multiclass AI_smul { > def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL, > !strconcat(opc, "bb"), " $dst, $a, $b", > @@ -992,6 +997,7 @@ > } > > > +// FIXME: encoding > multiclass AI_smla { > def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), > MulSMLA, > !strconcat(opc, "bb"), " $dst, $a, $b, $acc", > @@ -1031,7 +1037,9 @@ > Requires<[IsARM, HasV5TE]>; > } > > +// FIXME: encoding > defm SMUL : AI_smul<"smul", BinOpFrag<(mul node:$LHS, node:$RHS)>>; > +// FIXME: encoding > defm SMLA : AI_smla<"smla", BinOpFrag<(mul node:$LHS, node:$RHS)>>; > > // TODO: Halfword multiple accumulate long: SMLAL > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Mon Nov 3 13:25:40 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 3 Nov 2008 11:25:40 -0800 Subject: [llvm-commits] [llvm] r58615 - /llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp In-Reply-To: <200811031605.mA3G5amA009446@zion.cs.uiuc.edu> References: <200811031605.mA3G5amA009446@zion.cs.uiuc.edu> Message-ID: <16e5fdf90811031125h3c26db92rd0b86dd98bc74ade@mail.gmail.com> On Mon, Nov 3, 2008 at 8:05 AM, Andrew Lenharth wrote: > Author: alenhar2 > Date: Mon Nov 3 10:05:35 2008 > New Revision: 58615 > > URL: http://llvm.org/viewvc/llvm-project?rev=58615&view=rev > Log: > Ensure that we are checking only calls to the function we are interested in specializing > > Modified: > llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp > > Modified: llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp?rev=58615&r1=58614&r2=58615&view=diff > > ============================================================================== > --- llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp (original) > +++ llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp Mon Nov 3 10:05:35 2008 > @@ -165,14 +165,16 @@ > } > } > > +/// scanDistribution - Construct a histogram of constants for arg of F at arg Period at the end of the comment? ;-) -bw From andrewl at lenharth.org Mon Nov 3 13:28:24 2008 From: andrewl at lenharth.org (Andrew Lenharth) Date: Mon, 3 Nov 2008 13:28:24 -0600 Subject: [llvm-commits] [llvm] r58615 - /llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp In-Reply-To: <16e5fdf90811031125h3c26db92rd0b86dd98bc74ade@mail.gmail.com> References: <200811031605.mA3G5amA009446@zion.cs.uiuc.edu> <16e5fdf90811031125h3c26db92rd0b86dd98bc74ade@mail.gmail.com> Message-ID: <85dfcd7f0811031128h5510cc41j305c1c9f3d4d77d7@mail.gmail.com> On Mon, Nov 3, 2008 at 1:25 PM, Bill Wendling wrote: > Period at the end of the comment? ;-) As though that were a well formed sentence... ;) Andrew From alenhar2 at cs.uiuc.edu Mon Nov 3 13:29:30 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Mon, 03 Nov 2008 19:29:30 -0000 Subject: [llvm-commits] [llvm] r58630 - /llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp Message-ID: <200811031929.mA3JTUO7022609@zion.cs.uiuc.edu> Author: alenhar2 Date: Mon Nov 3 13:29:29 2008 New Revision: 58630 URL: http://llvm.org/viewvc/llvm-project?rev=58630&view=rev Log: add a period at the end of the comment, ignoring the fact that the comment would be hard pressed to be considered a sentence, but if it makes Bill happy... Modified: llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp Modified: llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp?rev=58630&r1=58629&r2=58630&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp Mon Nov 3 13:29:29 2008 @@ -165,7 +165,7 @@ } } -/// scanDistribution - Construct a histogram of constants for arg of F at arg +/// scanDistribution - Construct a histogram of constants for arg of F at arg. int PartSpec::scanDistribution(Function& F, int arg, std::map& dist) { bool hasIndirect = false; From dpatel at apple.com Mon Nov 3 13:38:07 2008 From: dpatel at apple.com (Devang Patel) Date: Mon, 03 Nov 2008 19:38:07 -0000 Subject: [llvm-commits] [llvm] r58631 - in /llvm/trunk: lib/Transforms/Scalar/LoopUnswitch.cpp test/Transforms/LoopUnswitch/2008-11-03-Invariant.ll Message-ID: <200811031938.mA3Jc768023118@zion.cs.uiuc.edu> Author: dpatel Date: Mon Nov 3 13:38:07 2008 New Revision: 58631 URL: http://llvm.org/viewvc/llvm-project?rev=58631&view=rev Log: Ignore conditions that are outside the loop. Added: llvm/trunk/test/Transforms/LoopUnswitch/2008-11-03-Invariant.ll Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp?rev=58631&r1=58630&r2=58631&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Mon Nov 3 13:38:07 2008 @@ -167,8 +167,10 @@ // TODO: Handle: br (VARIANT|INVARIANT). // TODO: Hoist simple expressions out of loops. - if (L->isLoopInvariant(Cond)) return Cond; - + if (Instruction *I = dyn_cast(Cond)) + if (!L->contains(I->getParent())) + return 0; + if (BinaryOperator *BO = dyn_cast(Cond)) if (BO->getOpcode() == Instruction::And || BO->getOpcode() == Instruction::Or) { Added: llvm/trunk/test/Transforms/LoopUnswitch/2008-11-03-Invariant.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopUnswitch/2008-11-03-Invariant.ll?rev=58631&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LoopUnswitch/2008-11-03-Invariant.ll (added) +++ llvm/trunk/test/Transforms/LoopUnswitch/2008-11-03-Invariant.ll Mon Nov 3 13:38:07 2008 @@ -0,0 +1,47 @@ +; RUN: llvm-as < %s | opt -loop-unswitch -stats | not grep loop-unswitch + + +define void @test_fc_while_continue_or(float %x, float %y, float* %result) nounwind { +entry: + br label %bb2.outer + +bb: ; preds = %bb2 + %0 = add float %5, %z.0 ; [#uses=3] + %1 = fcmp oeq float %0, 0.000000e+00 ; [#uses=1] + br i1 %1, label %bb2, label %bb1 + +bb1: ; preds = %bb + %.lcssa = phi float [ %0, %bb ] ; [#uses=1] + %z.0.lcssa1 = phi float [ %z.0, %bb ] ; [#uses=0] + %2 = add float %x_addr.0.ph, 1.000000e+00 ; [#uses=1] + br label %bb2.outer + +bb2.outer: ; preds = %bb1, %entry + %z.0.ph = phi float [ 0.000000e+00, %entry ], [ %.lcssa, %bb1 ] ; [#uses=1] + %x_addr.0.ph = phi float [ %x, %entry ], [ %2, %bb1 ] ; [#uses=3] + %3 = fcmp une float %x_addr.0.ph, 0.000000e+00 ; [#uses=1] + %4 = fcmp une float %y, 0.000000e+00 ; [#uses=1] + %or.cond = or i1 %3, %4 ; [#uses=1] + %5 = mul float %x_addr.0.ph, %y ; [#uses=1] + br label %bb2 + +bb2: ; preds = %bb2.outer, %bb + %z.0 = phi float [ %0, %bb ], [ %z.0.ph, %bb2.outer ] ; [#uses=3] + br i1 %or.cond, label %bb, label %bb4 + +bb4: ; preds = %bb2 + %z.0.lcssa = phi float [ %z.0, %bb2 ] ; [#uses=1] + store float %z.0.lcssa, float* %result, align 4 + ret void +} + +define i32 @main() nounwind { +entry: + %z = alloca [10 x i32] ; <[10 x i32]*> [#uses=2] + %0 = call i32 (...)* @test_fc_while_or(i32 0, i32 0, [10 x i32]* %z) nounwind ; [#uses=0] + %1 = getelementptr [10 x i32]* %z, i32 0, i32 0 ; [#uses=1] + %2 = load i32* %1, align 4 ; [#uses=1] + ret i32 %2 +} + +declare i32 @test_fc_while_or(...) From gohman at apple.com Mon Nov 3 13:40:18 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 03 Nov 2008 19:40:18 -0000 Subject: [llvm-commits] [llvm] r58632 - in /llvm/trunk: include/llvm/ADT/FoldingSet.h lib/Support/FoldingSet.cpp Message-ID: <200811031940.mA3JeIIw023296@zion.cs.uiuc.edu> Author: djg Date: Mon Nov 3 13:40:18 2008 New Revision: 58632 URL: http://llvm.org/viewvc/llvm-project?rev=58632&view=rev Log: Overload AddInteger on int/long/long long instead of on int/int64_t, to avoid overload ambiguities. This fixes build errors introduced by r58623. Modified: llvm/trunk/include/llvm/ADT/FoldingSet.h llvm/trunk/lib/Support/FoldingSet.cpp Modified: llvm/trunk/include/llvm/ADT/FoldingSet.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/FoldingSet.h?rev=58632&r1=58631&r2=58632&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/FoldingSet.h (original) +++ llvm/trunk/include/llvm/ADT/FoldingSet.h Mon Nov 3 13:40:18 2008 @@ -221,8 +221,10 @@ void AddPointer(const void *Ptr); void AddInteger(signed I); void AddInteger(unsigned I); - void AddInteger(int64_t I); - void AddInteger(uint64_t I); + void AddInteger(long I); + void AddInteger(unsigned long I); + void AddInteger(long long I); + void AddInteger(unsigned long long I); void AddFloat(float F); void AddDouble(double D); void AddString(const std::string &String); Modified: llvm/trunk/lib/Support/FoldingSet.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/FoldingSet.cpp?rev=58632&r1=58631&r2=58632&view=diff ============================================================================== --- llvm/trunk/lib/Support/FoldingSet.cpp (original) +++ llvm/trunk/lib/Support/FoldingSet.cpp Mon Nov 3 13:40:18 2008 @@ -41,13 +41,23 @@ void FoldingSetNodeID::AddInteger(unsigned I) { Bits.push_back(I); } -void FoldingSetNodeID::AddInteger(int64_t I) { - AddInteger((uint64_t)I); +void FoldingSetNodeID::AddInteger(long I) { + AddInteger((unsigned long)I); } -void FoldingSetNodeID::AddInteger(uint64_t I) { - Bits.push_back(unsigned(I)); - - // If the integer is small, encode it just as 32-bits. +void FoldingSetNodeID::AddInteger(unsigned long I) { + if (sizeof(long) == sizeof(int)) + AddInteger(unsigned(I)); + else if (sizeof(long) == sizeof(long long)) { + AddInteger((unsigned long long)I); + } else { + assert(0 && "unexpected sizeof(long)"); + } +} +void FoldingSetNodeID::AddInteger(long long I) { + AddInteger((unsigned long long)I); +} +void FoldingSetNodeID::AddInteger(unsigned long long I) { + AddInteger(unsigned(I)); if ((uint64_t)(int)I != I) Bits.push_back(unsigned(I >> 32)); } From grosbach at apple.com Mon Nov 3 13:41:27 2008 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 3 Nov 2008 11:41:27 -0800 Subject: [llvm-commits] [llvm] r58626 - in /llvm/trunk/lib/Target/ARM: ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.h ARMInstrInfo.td In-Reply-To: References: <200811031838.mA3IcWqw019585@zion.cs.uiuc.edu> Message-ID: <11542DAB-355C-4414-87BE-13A31708DF6D@apple.com> I have no real preference for what name to use. I chose that to be consistent with the other operations doing similar things (choosing how to encode operands for a class of instructions). If there's an alternative nomenclature that's preferable, that's fine with me. On Nov 3, 2008, at 11:17 AM, Evan Cheng wrote: > Thanks. But is addrmode6 the right name? I don't see ARM manuals using > that name. > > Evan > > On Nov 3, 2008, at 10:38 AM, Jim Grosbach wrote: > >> Author: grosbach >> Date: Mon Nov 3 12:38:31 2008 >> New Revision: 58626 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=58626&view=rev >> Log: >> Add binary encoding support for multiply instructions. Some blanks >> left to fill in, but the basics are there. >> >> Modified: >> llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp >> llvm/trunk/lib/Target/ARM/ARMInstrFormats.td >> llvm/trunk/lib/Target/ARM/ARMInstrInfo.h >> llvm/trunk/lib/Target/ARM/ARMInstrInfo.td >> >> Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58626&r1=58625&r2=58626&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original) >> +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Mon Nov 3 12:38:31 >> 2008 >> @@ -82,8 +82,8 @@ >> const TargetInstrDesc &TID, >> const MachineOperand &MO); >> >> - unsigned getAddrMode1SBit(const MachineInstr &MI, >> - const TargetInstrDesc &TID) const; >> + unsigned getAddrModeSBit(const MachineInstr &MI, >> + const TargetInstrDesc &TID) const; >> >> unsigned getAddrMode1InstrBinary(const MachineInstr &MI, >> const TargetInstrDesc &TID, >> @@ -97,6 +97,9 @@ >> unsigned getAddrMode4InstrBinary(const MachineInstr &MI, >> const TargetInstrDesc &TID, >> unsigned Binary); >> + unsigned getAddrMode6InstrBinary(const MachineInstr &MI, >> + const TargetInstrDesc &TID, >> + unsigned Binary); >> >> /// getInstrBinary - Return binary encoding for the specified >> /// machine instruction. >> @@ -432,8 +435,8 @@ >> return Binary; >> } >> >> -unsigned ARMCodeEmitter::getAddrMode1SBit(const MachineInstr &MI, >> - const TargetInstrDesc >> &TID) const { >> +unsigned ARMCodeEmitter::getAddrModeSBit(const MachineInstr &MI, >> + const TargetInstrDesc >> &TID) const { >> for (unsigned i = MI.getNumOperands(), e = TID.getNumOperands(); >> i != e; --i){ >> const MachineOperand &MO = MI.getOperand(i-1); >> if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) >> @@ -449,7 +452,7 @@ >> Binary |= II->getPredicate(&MI) << 28; >> >> // Encode S bit if MI modifies CPSR. >> - Binary |= getAddrMode1SBit(MI, TID); >> + Binary |= getAddrModeSBit(MI, TID); >> >> // Encode register def if there is one. >> unsigned NumDefs = TID.getNumDefs(); >> @@ -618,6 +621,33 @@ >> return Binary; >> } >> >> +unsigned ARMCodeEmitter::getAddrMode6InstrBinary(const MachineInstr >> &MI, >> + const >> TargetInstrDesc &TID, >> + unsigned Binary) { >> + // Set the conditional execution predicate >> + Binary |= II->getPredicate(&MI) << 28; >> + >> + // Encode S bit if MI modifies CPSR. >> + Binary |= getAddrModeSBit(MI, TID); >> + >> + // 32x32->64bit operations have two destination registers. The >> number >> + // of register definitions will tell us if that's what we're >> dealing with. >> + int OpIdx = 0; >> + if (TID.getNumDefs() == 2) >> + Binary |= getMachineOpValue (MI, OpIdx++) << >> ARMII::RegRdLoShift; >> + >> + // Encode Rd >> + Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdHiShift; >> + >> + // Encode Rm >> + Binary |= getMachineOpValue(MI, OpIdx++); >> + >> + // Encode Rs >> + Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRsShift; >> + >> + return Binary; >> +} >> + >> /// getInstrBinary - Return binary encoding for the specified >> /// machine instruction. >> unsigned ARMCodeEmitter::getInstrBinary(const MachineInstr &MI) { >> @@ -636,6 +666,8 @@ >> return getAddrMode3InstrBinary(MI, TID, Binary); >> case ARMII::AddrMode4: >> return getAddrMode4InstrBinary(MI, TID, Binary); >> + case ARMII::AddrMode6: >> + return getAddrMode6InstrBinary(MI, TID, Binary); >> } >> >> abort(); >> >> Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58626&r1=58625&r2=58626&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) >> +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Mon Nov 3 12:38:31 >> 2008 >> @@ -659,6 +659,28 @@ >> let Inst{27-25} = 0b100; >> } >> >> +// addrmode6 >> +// Unsigned multiply, multiply-accumulate instructions. >> +class AI6 opcod, dag oops, dag iops, Format f, string opc, >> + string asm, list pattern> >> + : I> opc, >> + asm,"",pattern> >> +{ >> + // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, SMLAWy, ...) >> + let Inst{7-4} = 0b1001; >> + let Inst{27-24} = 0b0000; >> + let Inst{23-20} = opcod; >> +} >> +class AsI6 opcod, dag oops, dag iops, Format f, string opc, >> + string asm, list pattern> >> + : sI> opc, >> + asm,"",pattern> >> +{ >> + // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, SMLAWy, ...) >> + let Inst{7-4} = 0b1001; >> + let Inst{27-24} = 0b0000; >> + let Inst{23-20} = opcod; >> +} >> >> // >> = >> = >> = >> ----------------------------------------------------------------------= >> ==// >> >> >> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=58626&r1=58625&r2=58626&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original) >> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Mon Nov 3 12:38:31 2008 >> @@ -30,8 +30,7 @@ >> // Instruction Flags. >> >> // >> ===------------------------------------------------------------------ >> ===// >> - // This three-bit field describes the addressing mode used. >> Zero is unused >> - // so that we can tell if we forgot to set a value. >> + // This four-bit field describes the addressing mode used. >> >> AddrModeMask = 0xf, >> AddrModeNone = 0, >> @@ -40,10 +39,11 @@ >> AddrMode3 = 3, >> AddrMode4 = 4, >> AddrMode5 = 5, >> - AddrModeT1 = 6, >> - AddrModeT2 = 7, >> - AddrModeT4 = 8, >> - AddrModeTs = 9, // i8 * 4 for pc and sp relative data >> + AddrMode6 = 6, >> + AddrModeT1 = 7, >> + AddrModeT2 = 8, >> + AddrModeT4 = 9, >> + AddrModeTs = 10, // i8 * 4 for pc and sp relative data >> >> // Size* - Flags to keep track of the size of an instruction. >> SizeShift = 4, >> @@ -115,15 +115,17 @@ >> >> // Field shifts - such shifts are used to set field while >> generating >> // machine instructions. >> - RotImmShift = 8, >> - RegRsShift = 8, >> - RegRdShift = 12, >> - RegRnShift = 16, >> - L_BitShift = 20, >> - S_BitShift = 20, >> - U_BitShift = 23, >> - IndexShift = 24, >> - I_BitShift = 25 >> + RotImmShift = 8, >> + RegRsShift = 8, >> + RegRdLoShift = 12, >> + RegRdShift = 12, >> + RegRdHiShift = 16, >> + RegRnShift = 16, >> + L_BitShift = 20, >> + S_BitShift = 20, >> + U_BitShift = 23, >> + IndexShift = 24, >> + I_BitShift = 25 >> }; >> } >> >> >> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58626&r1=58625&r2=58626&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) >> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Nov 3 12:38:31 >> 2008 >> @@ -310,10 +310,11 @@ >> def AddrMode3 : AddrMode<3>; >> def AddrMode4 : AddrMode<4>; >> def AddrMode5 : AddrMode<5>; >> -def AddrModeT1 : AddrMode<6>; >> -def AddrModeT2 : AddrMode<7>; >> -def AddrModeT4 : AddrMode<8>; >> -def AddrModeTs : AddrMode<9>; >> +def AddrMode6 : AddrMode<6>; >> +def AddrModeT1 : AddrMode<7>; >> +def AddrModeT2 : AddrMode<8>; >> +def AddrModeT4 : AddrMode<9>; >> +def AddrModeTs : AddrMode<10>; >> >> // Instruction size. >> class SizeFlagVal val> { >> @@ -910,49 +911,53 @@ >> // Multiply Instructions. >> // >> >> -def MUL : AsI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm, >> - "mul", " $dst, $a, $b", >> - [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>; >> - >> -def MLA : AsI<0x2, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), >> - MulFrm, "mla", " $dst, $a, $b, $c", >> - [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR: >> $c))]>; >> +def MUL : AsI6<0b0000, (outs GPR:$dst), (ins GPR:$a, GPR:$b), >> MulFrm, >> + "mul", " $dst, $a, $b", >> + [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>; >> + >> +def MLA : AsI6<0b0010, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR: >> $c), >> + MulFrm, "mla", " $dst, $a, $b, $c", >> + [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR: >> $c))]>; >> >> // Extra precision multiplies with low / high results >> -def SMULL : AsI<0xC, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: >> $b), >> - MulFrm, "smull", " $ldst, $hdst, $a, $b", []>; >> +def SMULL : AsI6<0b1100, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >> GPR:$b), >> + MulFrm, "smull", " $ldst, $hdst, $a, $b", []>; >> >> -def UMULL : AsI<0x8, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: >> $b), >> - MulFrm, "umull", " $ldst, $hdst, $a, $b", []>; >> +def UMULL : AsI6<0b1000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >> GPR:$b), >> + MulFrm, "umull", " $ldst, $hdst, $a, $b", []>; >> >> // Multiply + accumulate >> -def SMLAL : AsI<0xE, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: >> $b), >> - MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>; >> +def SMLAL : AsI6<0b1110, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >> GPR:$b), >> + MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>; >> >> -def UMLAL : AsI<0xA, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: >> $b), >> - MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>; >> +def UMLAL : AsI6<0b1010, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >> GPR:$b), >> + MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>; >> >> -def UMAAL : AI<0x0, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: >> $b), MulFrm, >> - "umaal", " $ldst, $hdst, $a, $b", []>, >> - Requires<[IsARM, HasV6]>; >> +def UMAAL : AI6 <0b0000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >> GPR:$b), >> + MulFrm, "umaal", " $ldst, $hdst, $a, $b", []>, >> + Requires<[IsARM, HasV6]>; >> >> // Most significant word multiply >> +// FIXME: encoding >> def SMMUL : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm, >> "smmul", " $dst, $a, $b", >> [(set GPR:$dst, (mulhs GPR:$a, GPR:$b))]>, >> Requires<[IsARM, HasV6]>; >> >> +// FIXME: encoding >> def SMMLA : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), >> MulFrm, >> "smmla", " $dst, $a, $b, $c", >> [(set GPR:$dst, (add (mulhs GPR:$a, GPR:$b), GPR: >> $c))]>, >> Requires<[IsARM, HasV6]>; >> >> >> +// FIXME: encoding >> def SMMLS : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), >> MulFrm, >> "smmls", " $dst, $a, $b, $c", >> [(set GPR:$dst, (sub GPR:$c, (mulhs GPR:$a, GPR: >> $b)))]>, >> Requires<[IsARM, HasV6]>; >> >> +// FIXME: encoding >> multiclass AI_smul { >> def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL, >> !strconcat(opc, "bb"), " $dst, $a, $b", >> @@ -992,6 +997,7 @@ >> } >> >> >> +// FIXME: encoding >> multiclass AI_smla { >> def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), >> MulSMLA, >> !strconcat(opc, "bb"), " $dst, $a, $b, $acc", >> @@ -1031,7 +1037,9 @@ >> Requires<[IsARM, HasV5TE]>; >> } >> >> +// FIXME: encoding >> defm SMUL : AI_smul<"smul", BinOpFrag<(mul node:$LHS, node:$RHS)>>; >> +// FIXME: encoding >> defm SMLA : AI_smla<"smla", BinOpFrag<(mul node:$LHS, node:$RHS)>>; >> >> // TODO: Halfword multiple accumulate long: SMLAL >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Mon Nov 3 13:44:36 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 03 Nov 2008 19:44:36 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r58633 - in /llvm-gcc-4.2/trunk/gcc: c-common.c stub-c.c tree.c Message-ID: <200811031944.mA3Jiac9023490@zion.cs.uiuc.edu> Author: void Date: Mon Nov 3 13:44:35 2008 New Revision: 58633 URL: http://llvm.org/viewvc/llvm-project?rev=58633&view=rev Log: * Move generic_block_literal_struct_type into the tree.c file. This isn't ideal, but it's used there and in dwarf2out.c only. It's not ideal because this is a C-family specific call. * Create a stub for build_generic_block_struct_type. Modified: llvm-gcc-4.2/trunk/gcc/c-common.c llvm-gcc-4.2/trunk/gcc/stub-c.c llvm-gcc-4.2/trunk/gcc/tree.c Modified: llvm-gcc-4.2/trunk/gcc/c-common.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/c-common.c?rev=58633&r1=58632&r2=58633&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/c-common.c (original) +++ llvm-gcc-4.2/trunk/gcc/c-common.c Mon Nov 3 13:44:35 2008 @@ -201,8 +201,6 @@ tree saved_function_name_decls; */ -/* APPLE LOCAL radar 6300081 */ -tree generic_block_literal_struct_type = NULL; tree c_global_trees[CTI_MAX]; Modified: llvm-gcc-4.2/trunk/gcc/stub-c.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/stub-c.c?rev=58633&r1=58632&r2=58633&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/stub-c.c (original) +++ llvm-gcc-4.2/trunk/gcc/stub-c.c Mon Nov 3 13:44:35 2008 @@ -180,3 +180,11 @@ { gcc_assert(0); } + +/* APPLE LOCAL begin radar 6300081 */ +tree +build_generic_block_struct_type (void) +{ + return NULL_TREE; +} +/* APPLE LOCAL end radar 6300081 */ Modified: llvm-gcc-4.2/trunk/gcc/tree.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/tree.c?rev=58633&r1=58632&r2=58633&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/tree.c (original) +++ llvm-gcc-4.2/trunk/gcc/tree.c Mon Nov 3 13:44:35 2008 @@ -71,6 +71,8 @@ /* obstack.[ch] explicitly declined to prototype this. */ extern int _obstack_allocated_p (struct obstack *h, void *obj); +/* APPLE LOCAL radar 6300081 */ +tree generic_block_literal_struct_type = NULL; #ifdef GATHER_STATISTICS /* Statistics-gathering stuff. */ From anton at korobeynikov.info Mon Nov 3 13:51:03 2008 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Mon, 3 Nov 2008 22:51:03 +0300 Subject: [llvm-commits] [llvm-gcc-4.2] r58633 - in /llvm-gcc-4.2/trunk/gcc: c-common.c stub-c.c tree.c In-Reply-To: <200811031944.mA3Jiac9023490@zion.cs.uiuc.edu> References: <200811031944.mA3Jiac9023490@zion.cs.uiuc.edu> Message-ID: Hi, Bill > +/* APPLE LOCAL begin radar 6300081 */ > +tree > +build_generic_block_struct_type (void) > +{ > + return NULL_TREE; > +} > +/* APPLE LOCAL end radar 6300081 */ Why don't gcc_assert(0) here? We shouldn't call this routine for non-C languages, thus this approach seems to be more "robust". -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From baldrick at free.fr Mon Nov 3 14:22:12 2008 From: baldrick at free.fr (Duncan Sands) Date: Mon, 03 Nov 2008 20:22:12 -0000 Subject: [llvm-commits] [llvm] r58635 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Message-ID: <200811032022.mA3KMC1k025602@zion.cs.uiuc.edu> Author: baldrick Date: Mon Nov 3 14:22:12 2008 New Revision: 58635 URL: http://llvm.org/viewvc/llvm-project?rev=58635&view=rev Log: Make VAARG promotion work correctly with large funky sized integers like i129, and also reduce the number of assumptions made about how vaarg is implemented. This still doesn't work correctly for small integers like (eg) i1 on x86, since x86 passes each of them (essentially an i8) in a 4 byte stack slot, so the pointer needs to be advanced by 4 bytes not by 1 byte as now. But this is no longer a LegalizeTypes problem (it was also wrong in LT before): it is a bug in the operation expansion in LegalizeDAG: now LegalizeTypes turns an i1 vaarg into an i8 vaarg which would work fine if only the i8 vaarg was turned into correct code later. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=58635&r1=58634&r2=58635&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Mon Nov 3 14:22:12 2008 @@ -532,29 +532,37 @@ SDValue Ptr = N->getOperand(1); // Get the pointer. MVT VT = N->getValueType(0); - const Value *V = cast(N->getOperand(2))->getValue(); - SDValue VAList = DAG.getLoad(TLI.getPointerTy(), Chain, Ptr, V, 0); + MVT RegVT = TLI.getRegisterType(VT); + unsigned NumRegs = TLI.getNumRegisters(VT); + // The argument is passed as NumRegs registers of type RegVT. - // Increment the arg pointer, VAList, to the next vaarg - // FIXME: should the ABI size be used for the increment? Think of - // x86 long double (10 bytes long, but aligned on 4 or 8 bytes) or - // integers of unusual size (such MVT::i1, which gives an increment - // of zero here!). - unsigned Increment = VT.getSizeInBits() / 8; - SDValue Tmp = DAG.getNode(ISD::ADD, TLI.getPointerTy(), VAList, - DAG.getIntPtrConstant(Increment)); - - // Store the incremented VAList to the pointer. - Tmp = DAG.getStore(VAList.getValue(1), Tmp, Ptr, V, 0); - - // Load the actual argument out of the arg pointer VAList. - Tmp = DAG.getExtLoad(ISD::EXTLOAD, TLI.getTypeToTransformTo(VT), Tmp, - VAList, NULL, 0, VT); + SmallVector Parts(NumRegs); + for (unsigned i = 0; i < NumRegs; ++i) { + Parts[i] = DAG.getVAArg(RegVT, Chain, Ptr, N->getOperand(2)); + Chain = Parts[i].getValue(1); + } - // Legalized the chain result - switch anything that used the old chain to + // Handle endianness of the load. + if (TLI.isBigEndian()) + std::reverse(Parts.begin(), Parts.end()); + + // Assemble the parts in the promoted type. + MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0)); + SDValue Res = DAG.getNode(ISD::ZERO_EXTEND, NVT, Parts[0]); + for (unsigned i = 1; i < NumRegs; ++i) { + SDValue Part = DAG.getNode(ISD::ZERO_EXTEND, NVT, Parts[i]); + // Shift it to the right position and "or" it in. + Part = DAG.getNode(ISD::SHL, NVT, Part, + DAG.getConstant(i * RegVT.getSizeInBits(), + TLI.getShiftAmountTy())); + Res = DAG.getNode(ISD::OR, NVT, Res, Part); + } + + // Modified the chain result - switch anything that used the old chain to // use the new one. - ReplaceValueWith(SDValue(N, 1), Tmp.getValue(1)); - return Tmp; + ReplaceValueWith(SDValue(N, 1), Chain); + + return Res; } From kremenek at apple.com Mon Nov 3 14:30:10 2008 From: kremenek at apple.com (Ted Kremenek) Date: Mon, 03 Nov 2008 20:30:10 -0000 Subject: [llvm-commits] [llvm] r58636 - /llvm/tags/checker/checker-121/ Message-ID: <200811032030.mA3KUArb026058@zion.cs.uiuc.edu> Author: kremenek Date: Mon Nov 3 14:30:09 2008 New Revision: 58636 URL: http://llvm.org/viewvc/llvm-project?rev=58636&view=rev Log: Removing checker-121. Removed: llvm/tags/checker/checker-121/ From kremenek at apple.com Mon Nov 3 14:30:46 2008 From: kremenek at apple.com (Ted Kremenek) Date: Mon, 03 Nov 2008 20:30:46 -0000 Subject: [llvm-commits] [llvm] r58638 - /llvm/tags/checker/checker-121/ Message-ID: <200811032030.mA3KUk4i026105@zion.cs.uiuc.edu> Author: kremenek Date: Mon Nov 3 14:30:46 2008 New Revision: 58638 URL: http://llvm.org/viewvc/llvm-project?rev=58638&view=rev Log: Tagging checker-121. Added: llvm/tags/checker/checker-121/ - copied from r58637, llvm/trunk/ From dalej at apple.com Mon Nov 3 14:35:38 2008 From: dalej at apple.com (Dale Johannesen) Date: Mon, 3 Nov 2008 12:35:38 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r58633 - in /llvm-gcc-4.2/trunk/gcc: c-common.c stub-c.c tree.c In-Reply-To: <200811031944.mA3Jiac9023490@zion.cs.uiuc.edu> References: <200811031944.mA3Jiac9023490@zion.cs.uiuc.edu> Message-ID: <2119AB79-1E43-42BC-AE5C-8C1C49021FEC@apple.com> On Nov 3, 2008, at 11:44 AMPST, Bill Wendling wrote: > Author: void > Date: Mon Nov 3 13:44:35 2008 > New Revision: 58633 > > URL: http://llvm.org/viewvc/llvm-project?rev=58633&view=rev > Log: > * Move generic_block_literal_struct_type into the tree.c file. This > isn't ideal, > but it's used there and in dwarf2out.c only. It's not ideal because > this is a > C-family specific call. The "right" way to do this sort of thing in gcc is to use a langhook, which is null for languages that don't support the feature. (People tend to avoid doing this because it's a PITA, you have to modify 7 or 8 files IIRC.) See the langhooks* files. I suggest taking an existing langhook and grepping for it throughout to see how this works. > * Create a stub for build_generic_block_struct_type. > > Modified: > llvm-gcc-4.2/trunk/gcc/c-common.c > llvm-gcc-4.2/trunk/gcc/stub-c.c > llvm-gcc-4.2/trunk/gcc/tree.c > > Modified: llvm-gcc-4.2/trunk/gcc/c-common.c > URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/c-common.c?rev=58633&r1=58632&r2=58633&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm-gcc-4.2/trunk/gcc/c-common.c (original) > +++ llvm-gcc-4.2/trunk/gcc/c-common.c Mon Nov 3 13:44:35 2008 > @@ -201,8 +201,6 @@ > tree saved_function_name_decls; > > */ > -/* APPLE LOCAL radar 6300081 */ > -tree generic_block_literal_struct_type = NULL; > > tree c_global_trees[CTI_MAX]; > > > Modified: llvm-gcc-4.2/trunk/gcc/stub-c.c > URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/stub-c.c?rev=58633&r1=58632&r2=58633&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm-gcc-4.2/trunk/gcc/stub-c.c (original) > +++ llvm-gcc-4.2/trunk/gcc/stub-c.c Mon Nov 3 13:44:35 2008 > @@ -180,3 +180,11 @@ > { > gcc_assert(0); > } > + > +/* APPLE LOCAL begin radar 6300081 */ > +tree > +build_generic_block_struct_type (void) > +{ > + return NULL_TREE; > +} > +/* APPLE LOCAL end radar 6300081 */ > > Modified: llvm-gcc-4.2/trunk/gcc/tree.c > URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/tree.c?rev=58633&r1=58632&r2=58633&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm-gcc-4.2/trunk/gcc/tree.c (original) > +++ llvm-gcc-4.2/trunk/gcc/tree.c Mon Nov 3 13:44:35 2008 > @@ -71,6 +71,8 @@ > > /* obstack.[ch] explicitly declined to prototype this. */ > extern int _obstack_allocated_p (struct obstack *h, void *obj); > +/* APPLE LOCAL radar 6300081 */ > +tree generic_block_literal_struct_type = NULL; > > #ifdef GATHER_STATISTICS > /* Statistics-gathering stuff. */ > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Mon Nov 3 14:42:18 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 03 Nov 2008 20:42:18 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r58640 - /llvm-gcc-4.2/trunk/gcc/stub-c.c Message-ID: <200811032042.mA3KgIDf026914@zion.cs.uiuc.edu> Author: void Date: Mon Nov 3 14:42:17 2008 New Revision: 58640 URL: http://llvm.org/viewvc/llvm-project?rev=58640&view=rev Log: Call gcc_assert instead of returning a value. Modified: llvm-gcc-4.2/trunk/gcc/stub-c.c Modified: llvm-gcc-4.2/trunk/gcc/stub-c.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/stub-c.c?rev=58640&r1=58639&r2=58640&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/stub-c.c (original) +++ llvm-gcc-4.2/trunk/gcc/stub-c.c Mon Nov 3 14:42:17 2008 @@ -185,6 +185,6 @@ tree build_generic_block_struct_type (void) { - return NULL_TREE; + gcc_assert(0); } /* APPLE LOCAL end radar 6300081 */ From isanbard at gmail.com Mon Nov 3 14:43:09 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 3 Nov 2008 12:43:09 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r58633 - in /llvm-gcc-4.2/trunk/gcc: c-common.c stub-c.c tree.c In-Reply-To: References: <200811031944.mA3Jiac9023490@zion.cs.uiuc.edu> Message-ID: <16e5fdf90811031243w303324hbc853131b21319e4@mail.gmail.com> On Mon, Nov 3, 2008 at 11:51 AM, Anton Korobeynikov wrote: > Hi, Bill > >> +/* APPLE LOCAL begin radar 6300081 */ >> +tree >> +build_generic_block_struct_type (void) >> +{ >> + return NULL_TREE; >> +} >> +/* APPLE LOCAL end radar 6300081 */ > Why don't gcc_assert(0) here? We shouldn't call this routine for non-C > languages, thus this approach seems to be more "robust". > Okay. Done. -bw From evan.cheng at apple.com Mon Nov 3 14:44:57 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Nov 2008 12:44:57 -0800 Subject: [llvm-commits] [llvm] r58626 - in /llvm/trunk/lib/Target/ARM: ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.h ARMInstrInfo.td In-Reply-To: <11542DAB-355C-4414-87BE-13A31708DF6D@apple.com> References: <200811031838.mA3IcWqw019585@zion.cs.uiuc.edu> <11542DAB-355C-4414-87BE-13A31708DF6D@apple.com> Message-ID: <840F490C-F893-46E0-ADFF-B61BC21677D5@apple.com> Ok. It's not just a naming issue. AddrMode information is used by other ARM routines to determine instruction properties. Currently AddrMode6 is only used by the code emitter to determine instruction encoding. That seems wrong. You should be using instruction format bits to determine how to encode these instructions instead. See // Format specifies the encoding used by the instruction. This is part of the // ad-hoc solution used to emit machine instruction encodings by our machine // code emitter. class Format val> { bits<5> Value = val; } def Pseudo : Format<1>; def MulFrm : Format<2>; def MulSMLAW : Format<3>; Evan On Nov 3, 2008, at 11:41 AM, Jim Grosbach wrote: > I have no real preference for what name to use. I chose that to be > consistent with the other operations doing similar things (choosing > how to encode operands for a class of instructions). If there's an > alternative nomenclature that's preferable, that's fine with me. > > > On Nov 3, 2008, at 11:17 AM, Evan Cheng wrote: > >> Thanks. But is addrmode6 the right name? I don't see ARM manuals >> using >> that name. >> >> Evan >> >> On Nov 3, 2008, at 10:38 AM, Jim Grosbach wrote: >> >>> Author: grosbach >>> Date: Mon Nov 3 12:38:31 2008 >>> New Revision: 58626 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=58626&view=rev >>> Log: >>> Add binary encoding support for multiply instructions. Some blanks >>> left to fill in, but the basics are there. >>> >>> Modified: >>> llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp >>> llvm/trunk/lib/Target/ARM/ARMInstrFormats.td >>> llvm/trunk/lib/Target/ARM/ARMInstrInfo.h >>> llvm/trunk/lib/Target/ARM/ARMInstrInfo.td >>> >>> Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58626&r1=58625&r2=58626&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original) >>> +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Mon Nov 3 12:38:31 >>> 2008 >>> @@ -82,8 +82,8 @@ >>> const TargetInstrDesc &TID, >>> const MachineOperand &MO); >>> >>> - unsigned getAddrMode1SBit(const MachineInstr &MI, >>> - const TargetInstrDesc &TID) const; >>> + unsigned getAddrModeSBit(const MachineInstr &MI, >>> + const TargetInstrDesc &TID) const; >>> >>> unsigned getAddrMode1InstrBinary(const MachineInstr &MI, >>> const TargetInstrDesc &TID, >>> @@ -97,6 +97,9 @@ >>> unsigned getAddrMode4InstrBinary(const MachineInstr &MI, >>> const TargetInstrDesc &TID, >>> unsigned Binary); >>> + unsigned getAddrMode6InstrBinary(const MachineInstr &MI, >>> + const TargetInstrDesc &TID, >>> + unsigned Binary); >>> >>> /// getInstrBinary - Return binary encoding for the specified >>> /// machine instruction. >>> @@ -432,8 +435,8 @@ >>> return Binary; >>> } >>> >>> -unsigned ARMCodeEmitter::getAddrMode1SBit(const MachineInstr &MI, >>> - const TargetInstrDesc >>> &TID) const { >>> +unsigned ARMCodeEmitter::getAddrModeSBit(const MachineInstr &MI, >>> + const TargetInstrDesc >>> &TID) const { >>> for (unsigned i = MI.getNumOperands(), e = TID.getNumOperands(); >>> i != e; --i){ >>> const MachineOperand &MO = MI.getOperand(i-1); >>> if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) >>> @@ -449,7 +452,7 @@ >>> Binary |= II->getPredicate(&MI) << 28; >>> >>> // Encode S bit if MI modifies CPSR. >>> - Binary |= getAddrMode1SBit(MI, TID); >>> + Binary |= getAddrModeSBit(MI, TID); >>> >>> // Encode register def if there is one. >>> unsigned NumDefs = TID.getNumDefs(); >>> @@ -618,6 +621,33 @@ >>> return Binary; >>> } >>> >>> +unsigned ARMCodeEmitter::getAddrMode6InstrBinary(const MachineInstr >>> &MI, >>> + const >>> TargetInstrDesc &TID, >>> + unsigned Binary) { >>> + // Set the conditional execution predicate >>> + Binary |= II->getPredicate(&MI) << 28; >>> + >>> + // Encode S bit if MI modifies CPSR. >>> + Binary |= getAddrModeSBit(MI, TID); >>> + >>> + // 32x32->64bit operations have two destination registers. The >>> number >>> + // of register definitions will tell us if that's what we're >>> dealing with. >>> + int OpIdx = 0; >>> + if (TID.getNumDefs() == 2) >>> + Binary |= getMachineOpValue (MI, OpIdx++) << >>> ARMII::RegRdLoShift; >>> + >>> + // Encode Rd >>> + Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdHiShift; >>> + >>> + // Encode Rm >>> + Binary |= getMachineOpValue(MI, OpIdx++); >>> + >>> + // Encode Rs >>> + Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRsShift; >>> + >>> + return Binary; >>> +} >>> + >>> /// getInstrBinary - Return binary encoding for the specified >>> /// machine instruction. >>> unsigned ARMCodeEmitter::getInstrBinary(const MachineInstr &MI) { >>> @@ -636,6 +666,8 @@ >>> return getAddrMode3InstrBinary(MI, TID, Binary); >>> case ARMII::AddrMode4: >>> return getAddrMode4InstrBinary(MI, TID, Binary); >>> + case ARMII::AddrMode6: >>> + return getAddrMode6InstrBinary(MI, TID, Binary); >>> } >>> >>> abort(); >>> >>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58626&r1=58625&r2=58626&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) >>> +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Mon Nov 3 12:38:31 >>> 2008 >>> @@ -659,6 +659,28 @@ >>> let Inst{27-25} = 0b100; >>> } >>> >>> +// addrmode6 >>> +// Unsigned multiply, multiply-accumulate instructions. >>> +class AI6 opcod, dag oops, dag iops, Format f, string opc, >>> + string asm, list pattern> >>> + : I>> opc, >>> + asm,"",pattern> >>> +{ >>> + // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, SMLAWy, ...) >>> + let Inst{7-4} = 0b1001; >>> + let Inst{27-24} = 0b0000; >>> + let Inst{23-20} = opcod; >>> +} >>> +class AsI6 opcod, dag oops, dag iops, Format f, string opc, >>> + string asm, list pattern> >>> + : sI>> opc, >>> + asm,"",pattern> >>> +{ >>> + // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, SMLAWy, ...) >>> + let Inst{7-4} = 0b1001; >>> + let Inst{27-24} = 0b0000; >>> + let Inst{23-20} = opcod; >>> +} >>> >>> // >>> = >>> = >>> = >>> ----------------------------------------------------------------------= >>> ==// >>> >>> >>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=58626&r1=58625&r2=58626&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original) >>> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Mon Nov 3 12:38:31 >>> 2008 >>> @@ -30,8 +30,7 @@ >>> // Instruction Flags. >>> >>> // >>> = >>> ==------------------------------------------------------------------ >>> ===// >>> - // This three-bit field describes the addressing mode used. >>> Zero is unused >>> - // so that we can tell if we forgot to set a value. >>> + // This four-bit field describes the addressing mode used. >>> >>> AddrModeMask = 0xf, >>> AddrModeNone = 0, >>> @@ -40,10 +39,11 @@ >>> AddrMode3 = 3, >>> AddrMode4 = 4, >>> AddrMode5 = 5, >>> - AddrModeT1 = 6, >>> - AddrModeT2 = 7, >>> - AddrModeT4 = 8, >>> - AddrModeTs = 9, // i8 * 4 for pc and sp relative data >>> + AddrMode6 = 6, >>> + AddrModeT1 = 7, >>> + AddrModeT2 = 8, >>> + AddrModeT4 = 9, >>> + AddrModeTs = 10, // i8 * 4 for pc and sp relative data >>> >>> // Size* - Flags to keep track of the size of an instruction. >>> SizeShift = 4, >>> @@ -115,15 +115,17 @@ >>> >>> // Field shifts - such shifts are used to set field while >>> generating >>> // machine instructions. >>> - RotImmShift = 8, >>> - RegRsShift = 8, >>> - RegRdShift = 12, >>> - RegRnShift = 16, >>> - L_BitShift = 20, >>> - S_BitShift = 20, >>> - U_BitShift = 23, >>> - IndexShift = 24, >>> - I_BitShift = 25 >>> + RotImmShift = 8, >>> + RegRsShift = 8, >>> + RegRdLoShift = 12, >>> + RegRdShift = 12, >>> + RegRdHiShift = 16, >>> + RegRnShift = 16, >>> + L_BitShift = 20, >>> + S_BitShift = 20, >>> + U_BitShift = 23, >>> + IndexShift = 24, >>> + I_BitShift = 25 >>> }; >>> } >>> >>> >>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58626&r1=58625&r2=58626&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) >>> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Nov 3 12:38:31 >>> 2008 >>> @@ -310,10 +310,11 @@ >>> def AddrMode3 : AddrMode<3>; >>> def AddrMode4 : AddrMode<4>; >>> def AddrMode5 : AddrMode<5>; >>> -def AddrModeT1 : AddrMode<6>; >>> -def AddrModeT2 : AddrMode<7>; >>> -def AddrModeT4 : AddrMode<8>; >>> -def AddrModeTs : AddrMode<9>; >>> +def AddrMode6 : AddrMode<6>; >>> +def AddrModeT1 : AddrMode<7>; >>> +def AddrModeT2 : AddrMode<8>; >>> +def AddrModeT4 : AddrMode<9>; >>> +def AddrModeTs : AddrMode<10>; >>> >>> // Instruction size. >>> class SizeFlagVal val> { >>> @@ -910,49 +911,53 @@ >>> // Multiply Instructions. >>> // >>> >>> -def MUL : AsI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm, >>> - "mul", " $dst, $a, $b", >>> - [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>; >>> - >>> -def MLA : AsI<0x2, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), >>> - MulFrm, "mla", " $dst, $a, $b, $c", >>> - [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR: >>> $c))]>; >>> +def MUL : AsI6<0b0000, (outs GPR:$dst), (ins GPR:$a, GPR:$b), >>> MulFrm, >>> + "mul", " $dst, $a, $b", >>> + [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>; >>> + >>> +def MLA : AsI6<0b0010, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR: >>> $c), >>> + MulFrm, "mla", " $dst, $a, $b, $c", >>> + [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR: >>> $c))]>; >>> >>> // Extra precision multiplies with low / high results >>> -def SMULL : AsI<0xC, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: >>> $b), >>> - MulFrm, "smull", " $ldst, $hdst, $a, $b", []>; >>> +def SMULL : AsI6<0b1100, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>> GPR:$b), >>> + MulFrm, "smull", " $ldst, $hdst, $a, $b", []>; >>> >>> -def UMULL : AsI<0x8, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: >>> $b), >>> - MulFrm, "umull", " $ldst, $hdst, $a, $b", []>; >>> +def UMULL : AsI6<0b1000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>> GPR:$b), >>> + MulFrm, "umull", " $ldst, $hdst, $a, $b", []>; >>> >>> // Multiply + accumulate >>> -def SMLAL : AsI<0xE, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: >>> $b), >>> - MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>; >>> +def SMLAL : AsI6<0b1110, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>> GPR:$b), >>> + MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>; >>> >>> -def UMLAL : AsI<0xA, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: >>> $b), >>> - MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>; >>> +def UMLAL : AsI6<0b1010, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>> GPR:$b), >>> + MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>; >>> >>> -def UMAAL : AI<0x0, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: >>> $b), MulFrm, >>> - "umaal", " $ldst, $hdst, $a, $b", []>, >>> - Requires<[IsARM, HasV6]>; >>> +def UMAAL : AI6 <0b0000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>> GPR:$b), >>> + MulFrm, "umaal", " $ldst, $hdst, $a, $b", []>, >>> + Requires<[IsARM, HasV6]>; >>> >>> // Most significant word multiply >>> +// FIXME: encoding >>> def SMMUL : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm, >>> "smmul", " $dst, $a, $b", >>> [(set GPR:$dst, (mulhs GPR:$a, GPR:$b))]>, >>> Requires<[IsARM, HasV6]>; >>> >>> +// FIXME: encoding >>> def SMMLA : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), >>> MulFrm, >>> "smmla", " $dst, $a, $b, $c", >>> [(set GPR:$dst, (add (mulhs GPR:$a, GPR:$b), GPR: >>> $c))]>, >>> Requires<[IsARM, HasV6]>; >>> >>> >>> +// FIXME: encoding >>> def SMMLS : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), >>> MulFrm, >>> "smmls", " $dst, $a, $b, $c", >>> [(set GPR:$dst, (sub GPR:$c, (mulhs GPR:$a, GPR: >>> $b)))]>, >>> Requires<[IsARM, HasV6]>; >>> >>> +// FIXME: encoding >>> multiclass AI_smul { >>> def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL, >>> !strconcat(opc, "bb"), " $dst, $a, $b", >>> @@ -992,6 +997,7 @@ >>> } >>> >>> >>> +// FIXME: encoding >>> multiclass AI_smla { >>> def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), >>> MulSMLA, >>> !strconcat(opc, "bb"), " $dst, $a, $b, $acc", >>> @@ -1031,7 +1037,9 @@ >>> Requires<[IsARM, HasV5TE]>; >>> } >>> >>> +// FIXME: encoding >>> defm SMUL : AI_smul<"smul", BinOpFrag<(mul node:$LHS, node:$RHS)>>; >>> +// FIXME: encoding >>> defm SMLA : AI_smla<"smla", BinOpFrag<(mul node:$LHS, node:$RHS)>>; >>> >>> // TODO: Halfword multiple accumulate long: SMLAL >>> >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dalej at apple.com Mon Nov 3 14:47:45 2008 From: dalej at apple.com (Dale Johannesen) Date: Mon, 03 Nov 2008 20:47:45 -0000 Subject: [llvm-commits] [llvm] r58642 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Message-ID: <200811032047.mA3KljXc027256@zion.cs.uiuc.edu> Author: johannes Date: Mon Nov 3 14:47:45 2008 New Revision: 58642 URL: http://llvm.org/viewvc/llvm-project?rev=58642&view=rev Log: Fix some ppcf128 regressions: make ExpandFloatRes_LOAD work correctly, and bring over a late change to ppcf128 SetCC handling. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=58642&r1=58641&r2=58642&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Mon Nov 3 14:47:45 2008 @@ -885,16 +885,16 @@ assert(NVT.isByteSized() && "Expanded type not byte sized!"); assert(LD->getMemoryVT().bitsLE(NVT) && "Float type not round?"); - Lo = DAG.getExtLoad(LD->getExtensionType(), NVT, Chain, Ptr, + Hi = DAG.getExtLoad(LD->getExtensionType(), NVT, Chain, Ptr, LD->getSrcValue(), LD->getSrcValueOffset(), LD->getMemoryVT(), LD->isVolatile(), LD->getAlignment()); // Remember the chain. - Chain = Lo.getValue(1); + Chain = Hi.getValue(1); - // The high part is undefined. - Hi = DAG.getNode(ISD::UNDEF, NVT); + // The low part is zero. + Lo = DAG.getConstantFP(APFloat(APInt(NVT.getSizeInBits(), 0)), NVT); // Modified the chain - switch anything that used the old chain to use the // new one. @@ -1039,15 +1039,15 @@ assert(VT == MVT::ppcf128 && "Unsupported setcc type!"); // FIXME: This generated code sucks. We want to generate - // FCMP crN, hi1, hi2 + // FCMPU crN, hi1, hi2 // BNE crN, L: - // FCMP crN, lo1, lo2 + // FCMPU crN, lo1, lo2 // The following can be improved, but not that much. SDValue Tmp1, Tmp2, Tmp3; - Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETEQ); + Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETOEQ); Tmp2 = DAG.getSetCC(TLI.getSetCCResultType(LHSLo), LHSLo, RHSLo, CCCode); Tmp3 = DAG.getNode(ISD::AND, Tmp1.getValueType(), Tmp1, Tmp2); - Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETNE); + Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETUNE); Tmp2 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, CCCode); Tmp1 = DAG.getNode(ISD::AND, Tmp1.getValueType(), Tmp1, Tmp2); NewLHS = DAG.getNode(ISD::OR, Tmp1.getValueType(), Tmp1, Tmp3); From evan.cheng at apple.com Mon Nov 3 15:02:40 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 03 Nov 2008 21:02:40 -0000 Subject: [llvm-commits] [llvm] r58643 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Message-ID: <200811032102.mA3L2eZu028207@zion.cs.uiuc.edu> Author: evancheng Date: Mon Nov 3 15:02:39 2008 New Revision: 58643 URL: http://llvm.org/viewvc/llvm-project?rev=58643&view=rev Log: Minor code restructuring. No functionality change. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp?rev=58643&r1=58642&r2=58643&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Mon Nov 3 15:02:39 2008 @@ -296,13 +296,13 @@ } // Transfer LiveVariables states, kill / dead info. - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand &MO = MI->getOperand(i); - if (MO.isReg() && MO.getReg() && - TargetRegisterInfo::isVirtualRegister(MO.getReg())) { - unsigned Reg = MO.getReg(); + if (LV) { + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + MachineOperand &MO = MI->getOperand(i); + if (MO.isReg() && MO.getReg() && + TargetRegisterInfo::isVirtualRegister(MO.getReg())) { + unsigned Reg = MO.getReg(); - if (LV) { LiveVariables::VarInfo &VI = LV->getVarInfo(Reg); if (MO.isDef()) { MachineInstr *NewMI = (Reg == WBReg) ? UpdateMI : MemMI; From isanbard at gmail.com Mon Nov 3 14:42:49 2008 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 3 Nov 2008 12:42:49 -0800 Subject: [llvm-commits] [llvm-gcc-4.2] r58633 - in /llvm-gcc-4.2/trunk/gcc: c-common.c stub-c.c tree.c In-Reply-To: <2119AB79-1E43-42BC-AE5C-8C1C49021FEC@apple.com> References: <200811031944.mA3Jiac9023490@zion.cs.uiuc.edu> <2119AB79-1E43-42BC-AE5C-8C1C49021FEC@apple.com> Message-ID: <16e5fdf90811031242l28fbb1aeqde9ab517f4c7c847@mail.gmail.com> On Mon, Nov 3, 2008 at 12:35 PM, Dale Johannesen wrote: > > On Nov 3, 2008, at 11:44 AMPST, Bill Wendling wrote: > >> Author: void >> Date: Mon Nov 3 13:44:35 2008 >> New Revision: 58633 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=58633&view=rev >> Log: >> * Move generic_block_literal_struct_type into the tree.c file. This >> isn't ideal, >> but it's used there and in dwarf2out.c only. It's not ideal because >> this is a >> C-family specific call. > > The "right" way to do this sort of thing in gcc is to use a langhook, > which is null for languages that don't support the feature. > (People tend to avoid doing this because it's a PITA, you have to > modify 7 or 8 files IIRC.) See the langhooks* files. I suggest > taking an existing langhook and grepping for it throughout to see how > this works. > Okay. I'm going to talk with the person who created the original patch and see if I can convince her to redo it. -bw From evan.cheng at apple.com Mon Nov 3 15:26:53 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 03 Nov 2008 21:26:53 -0000 Subject: [llvm-commits] [llvm] r58644 - /llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Message-ID: <200811032126.mA3LQsn3029654@zion.cs.uiuc.edu> Author: evancheng Date: Mon Nov 3 15:26:52 2008 New Revision: 58644 URL: http://llvm.org/viewvc/llvm-project?rev=58644&view=rev Log: Remove a dead switch statement. Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=58644&r1=58643&r2=58644&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Mon Nov 3 15:26:52 2008 @@ -775,23 +775,6 @@ default: { if (InCPMode && AFI->isThumbFunction()) InCPMode = false; - switch (Opc) { - case ARM::PICADD: - case ARM::PICLD: - case ARM::PICLDZH: - case ARM::PICLDZB: - case ARM::PICLDH: - case ARM::PICLDB: - case ARM::PICLDSH: - case ARM::PICLDSB: - case ARM::PICSTR: - case ARM::PICSTRH: - case ARM::PICSTRB: - case ARM::tPICADD: - break; - default: - break; - } }} // Call the autogenerated instruction printer routines. From daniel at zuster.org Mon Nov 3 14:55:51 2008 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 3 Nov 2008 12:55:51 -0800 Subject: [llvm-commits] Release-Asserts warnings Message-ID: <6a8523d60811031255w938cdf3l38ba2cfee397c6de@mail.gmail.com> Quite a few warnings have crept in Release-Asserts mode. I'll fix some of these but it would be nice to have help, especially for the backend parts which have clear owners & I don't understand. :) The lists, taken from my nightlytester: -- ConstantFold.cpp: In function 'llvm::Constant* FoldBitCast(llvm::Constant*, const llvm::Type*)': ConstantFold.cpp:126: warning: unused variable 'SrcTy' Constants.cpp: In static member function 'static llvm::Constant* llvm::ConstantExpr::getUIToFP(llvm::Constant*, const llvm::Type*)': Constants.cpp:1926: warning: unused variable 'fromVec' Constants.cpp:1927: warning: unused variable 'toVec' Constants.cpp: In static member function 'static llvm::Constant* llvm::ConstantExpr::getSIToFP(llvm::Constant*, const llvm::Type*)': Constants.cpp:1935: warning: unused variable 'fromVec' Constants.cpp:1936: warning: unused variable 'toVec' Constants.cpp: In static member function 'static llvm::Constant* llvm::ConstantExpr::getFPToUI(llvm::Constant*, const llvm::Type*)': Constants.cpp:1944: warning: unused variable 'fromVec' Constants.cpp:1945: warning: unused variable 'toVec' Constants.cpp: In static member function 'static llvm::Constant* llvm::ConstantExpr::getFPToSI(llvm::Constant*, const llvm::Type*)': Constants.cpp:1953: warning: unused variable 'fromVec' Constants.cpp:1954: warning: unused variable 'toVec' Constants.cpp: In static member function 'static llvm::Constant* llvm::ConstantExpr::getBitCast(llvm::Constant*, const llvm::Type*)': Constants.cpp:1983: warning: unused variable 'SrcBitSize' Constants.cpp:1984: warning: unused variable 'DstBitSize' Constants.cpp: In static member function 'static llvm::Constant* llvm::ConstantExpr::getInsertValue(llvm::Constant*, llvm::Constant*, const unsigned int*, unsigned int)': Constants.cpp:2368: warning: unused variable 'ValTy' Instructions.cpp: In static member function 'static llvm::Instruction::CastOps llvm::CastInst::getCastOpcode(const llvm::Value*, bool, const llvm::Type*, bool)': Instructions.cpp:2172: warning: unused variable 'PTy' Instructions.cpp:2195: warning: unused variable 'PTy' Instructions.cpp:2203: warning: unused variable 'SrcPTy' BasicBlockUtils.cpp: In function 'llvm::BasicBlock* llvm::SplitEdge(llvm::BasicBlock*, llvm::BasicBlock*, llvm::Pass*)': BasicBlockUtils.cpp:208: warning: unused variable 'e' BasicBlockUtils.cpp:223: warning: unused variable 'SP' ArchiveWriter.cpp: In member function 'void llvm::Archive::writeSymbolTable(std::ofstream&)': ArchiveWriter.cpp:310: warning: unused variable 'startpos' ArchiveWriter.cpp:325: warning: unused variable 'endpos' DAGCombiner.cpp: In member function 'llvm::SDValue::DAGCombiner::FindBetterChain(llvm::SDNode*, llvm::SDValue)': DAGCombiner.cpp:5666: warning: 'SrcValueOffset' may be used uninitialized in this function DAGCombiner.cpp:5666: note: 'SrcValueOffset' was declared here DAGCombiner.cpp:5665: warning: 'SrcValue' may be used uninitialized in this function DAGCombiner.cpp:5665: note: 'SrcValue' was declared here DAGCombiner.cpp:5664: warning: 'Size' may be used uninitialized in this function DAGCombiner.cpp:5664: note: 'Size' was declared here DAGCombiner.cpp:5694: warning: 'OpSrcValueOffset' may be used uninitialized in this function DAGCombiner.cpp:5694: note: 'OpSrcValueOffset' was declared here DAGCombiner.cpp:5693: warning: 'OpSrcValue' may be used uninitialized in this function DAGCombiner.cpp:5693: note: 'OpSrcValue' was declared here DAGCombiner.cpp:5692: warning: 'OpSize' may be used uninitialized in this function DAGCombiner.cpp:5692: note: 'OpSize' was declared here LegalizeDAG.cpp: In member function 'void::SelectionDAGLegalize::AddPromotedOperand(llvm::SDValue, llvm::SDValue)': LegalizeDAG.cpp:115: warning: unused variable 'isNew' LegalizeDAG.cpp: In member function 'void::SelectionDAGLegalize::AddWidenOperand(llvm::SDValue, llvm::SDValue)': LegalizeDAG.cpp:121: warning: unused variable 'isNew' LegalizeDAG.cpp: In member function 'void::SelectionDAGLegalize::ExpandOp(llvm::SDValue, llvm::SDValue&, llvm::SDValue&)': LegalizeDAG.cpp:7088: warning: unused variable 'isNew' LegalizeDAG.cpp: In member function 'void::SelectionDAGLegalize::SplitVectorOp(llvm::SDValue, llvm::SDValue&, llvm::SDValue&)': LegalizeDAG.cpp:7398: warning: unused variable 'isNew' LegalizeDAG.cpp: In member function 'llvm::SDValue::SelectionDAGLegalize::ScalarizeVectorOp(llvm::SDValue)': LegalizeDAG.cpp:7556: warning: unused variable 'isNew' X86CodeEmitter.cpp: In member function 'void::Emitter::emitInstruction(const llvm::MachineInstr&, const llvm::TargetInstrDesc*)': X86CodeEmitter.cpp:519: warning: unused variable 'Value' LegalizeDAG.cpp: In function 'llvm::SDValue ExpandUnalignedLoad(llvm::LoadSDNode*, llvm::SelectionDAG&, llvm::TargetLowering&)': LegalizeDAG.cpp:686: warning: 'intVT.llvm::MVT::V' may be used uninitialized in this function LegalizeDAG.cpp: In function 'llvm::SDValue ExpandUnalignedStore(llvm::StoreSDNode*, llvm::SelectionDAG&, llvm::TargetLowering&)': LegalizeDAG.cpp:631: warning: 'intVT.llvm::MVT::V' may be used uninitialized in this function X86FastISel.cpp: In member function 'bool X86FastISel::X86SelectCall(llvm::Instruction*)': X86FastISel.cpp:1064: warning: unused variable 'Emitted' X86FastISel.cpp:1071: warning: unused variable 'Emitted' X86FastISel.cpp:1095: warning: unused variable 'Emitted' X86FastISel.cpp:1123: warning: unused variable 'Emitted' X86FastISel.cpp:1173: warning: unused variable 'Emitted' DwarfWriter.cpp: In member function 'void llvm::DwarfDebug::SetModuleInfo(llvm::MachineModuleInfo*)': DwarfWriter.cpp:2763: warning: unused variable 'AppendOk' ScalarEvolution.cpp: In member function 'void::ScalarEvolutionsImpl::setSCEV(llvm::Value*, const llvm::SCEVHandle&)': ScalarEvolution.cpp:1407: warning: unused variable 'isNew' X86ISelLowering.cpp: In member function 'llvm::SDValue llvm::X86TargetLowering::LowerFORMAL_ARGUMENTS(llvm::SDValue, llvm::SelectionDAG&)': X86ISelLowering.cpp:1235: warning: 'RC' may be used uninitialized in this function SelectionDAG.cpp: In member function 'llvm::SDValue llvm::SelectionDAG::getMemOperand(const llvm::MachineMemOperand&)': SelectionDAG.cpp:1200: warning: unused variable 'v' AlphaGenDAGISel.inc: In member function 'llvm::SDValue::AlphaDAGToDAGISel::Transform_immBRCond(llvm::SDNode*)': AlphaGenDAGISel.inc:69: warning: control reaches end of non-void function X86RegisterInfo.cpp: In member function 'virtual int llvm::X86RegisterInfo::getFrameIndexOffset(llvm::MachineFunction&, int) const': X86RegisterInfo.cpp:336: warning: unused variable 'Align' X86RegisterInfo.cpp: In member function 'virtual void llvm::X86RegisterInfo::processFunctionBeforeFrameFinalized(llvm::MachineFunction&) const': X86RegisterInfo.cpp:479: warning: unused variable 'FrameIdx' X86TargetAsmInfo.cpp: In member function 'virtual std::string llvm::X86COFFTargetAsmInfo::UniqueSectionForGlobal(const llvm::GlobalValue*, llvm::SectionKind::Kind) const': X86TargetAsmInfo.cpp:308: warning: control reaches end of non-void function LiveIntervalAnalysis.cpp: In member function 'void llvm::LiveIntervals::computeNumbering()': LiveIntervalAnalysis.cpp:127: warning: unused variable 'inserted' PPCRegisterInfo.cpp: In member function 'virtual void llvm::PPCRegisterInfo::emitEpilogue(llvm::MachineFunction&, llvm::MachineBasicBlock&) const': PPCRegisterInfo.cpp:1371: warning: unused variable 'JumpTarget' PPCRegisterInfo.cpp:1385: warning: unused variable 'JumpTarget' LiveVariables.cpp: In member function 'void llvm::LiveVariables::removeVirtualRegistersKilled(llvm::MachineInstr*)': LiveVariables.cpp:679: warning: unused variable 'removed' Reassociate.cpp: In member function 'void::Reassociate::LinearizeExprTree(llvm::BinaryOperator*, std::vector<::ValueEntry, std::allocator<::ValueEntry> >&)': Reassociate.cpp:283: warning: unused variable 'Success' LowerSubregs.cpp: In member function 'bool::LowerSubregsInstructionPass::LowerInsert(llvm::MachineInstr*)': LowerSubregs.cpp:155: warning: unused variable 'SrcReg' ARMConstantIslandPass.cpp:709: warning: 'bool BBIsJumpedOver(llvm::MachineBasicBlock*)' defined but not used MachOWriter.cpp: In member function 'void llvm::MachOCodeEmitter::emitConstantPool(llvm::MachineConstantPool*)': MachOWriter.cpp:267: warning: unused variable 'isPIC' MachOWriter.cpp: In member function 'void llvm::MachOCodeEmitter::emitJumpTables(llvm::MachineJumpTableInfo*)': MachOWriter.cpp:308: warning: unused variable 'isPIC' Reassociate.cpp: At global scope: Reassociate.cpp:58: warning: 'void PrintOps(llvm::Instruction*, const std::vector<::ValueEntry, std::allocator<::ValueEntry> >&)' defined but not used SCCP.cpp: In member function 'virtual bool::IPSCCP::runOnModule(llvm::Module&)': SCCP.cpp:1794: warning: unused variable 'SI' SCCP.cpp:1791: warning: unused variable 'BI' MipsISelDAGToDAG.cpp: In member function 'llvm::SDNode*::MipsDAGToDAGISel::Select(llvm::SDValue)': MipsISelDAGToDAG.cpp:221: warning: unused variable 'Opc' PredicateSimplifier.cpp:346: warning: 'bool::validPredicate(::LatticeVal)' defined but not used MipsInstrInfo.cpp: In member function 'virtual llvm::MachineInstr* llvm::MipsInstrInfo::foldMemoryOperand(llvm::MachineFunction&, llvm::MachineInstr*, const llvm::SmallVectorImpl&, int) const': MipsInstrInfo.cpp:317: warning: 'LoadOpc' may be used uninitialized in this function MipsInstrInfo.cpp:317: warning: 'StoreOpc' may be used uninitialized in this function MipsInstrInfo.cpp: In member function 'virtual void llvm::MipsInstrInfo::loadRegFromAddr(llvm::MachineFunction&, unsigned int, llvm::SmallVectorImpl&, const llvm::TargetRegisterClass*, llvm::SmallVectorImpl&) const': MipsInstrInfo.cpp:255: warning: 'Opc' may be used uninitialized in this function MipsInstrInfo.cpp: In member function 'virtual void llvm::MipsInstrInfo::storeRegToAddr(llvm::MachineFunction&, unsigned int, bool, llvm::SmallVectorImpl&, const llvm::TargetRegisterClass*, llvm::SmallVectorImpl&) const': MipsInstrInfo.cpp:204: warning: 'Opc' may be used uninitialized in this function MipsInstrInfo.cpp: In member function 'virtual void llvm::MipsInstrInfo::storeRegToStackSlot(llvm::MachineBasicBlock&, llvm::ilist_iterator, unsigned int, bool, int, const llvm::TargetRegisterClass*) const': MipsInstrInfo.cpp:184: warning: 'Opc' may be used uninitialized in this function MipsInstrInfo.cpp: In member function 'virtual void llvm::MipsInstrInfo::loadRegFromStackSlot(llvm::MachineBasicBlock&, llvm::ilist_iterator, unsigned int, int, const llvm::TargetRegisterClass*) const': MipsInstrInfo.cpp:236: warning: 'Opc' may be used uninitialized in this function ARMISelLowering.cpp: In member function 'llvm::SDValue llvm::ARMTargetLowering::LowerCALL(llvm::SDValue, llvm::SelectionDAG&)': ARMISelLowering.cpp:406: warning: unused variable 'CallConv' SPUAsmPrinter.cpp: In member function 'void::SPUAsmPrinter::printMemRegImmS10(const llvm::MachineInstr*, unsigned int)': SPUAsmPrinter.cpp:188: warning: unused variable 'MO' DarwinTargetAsmInfo.cpp: In member function 'virtual const llvm::Section* llvm::DarwinTargetAsmInfo::SelectSectionForGlobal(const llvm::GlobalValue*) const': DarwinTargetAsmInfo.cpp:111: warning: control reaches end of non-void function ELFTargetAsmInfo.cpp: In member function 'virtual const llvm::Section* llvm::ELFTargetAsmInfo::SelectSectionForGlobal(const llvm::GlobalValue*) const': ELFTargetAsmInfo.cpp:89: warning: control reaches end of non-void function RegAllocSimple.cpp: In member function 'unsigned int::RegAllocSimple::getFreeReg(unsigned int)': RegAllocSimple.cpp:125: warning: unused variable 'RE' TargetAsmInfo.cpp: In member function 'virtual std::string llvm::TargetAsmInfo::UniqueSectionForGlobal(const llvm::GlobalValue*, llvm::SectionKind::Kind) const': TargetAsmInfo.cpp:344: warning: control reaches end of non-void function RegisterScavenging.cpp:146: warning: 'bool isLiveInButUnusedBefore(unsigned int, llvm::MachineInstr*, llvm::MachineBasicBlock*, const llvm::TargetRegisterInfo*, llvm::MachineRegisterInfo*)' defined but not used SimpleRegisterCoalescing.cpp: In member function 'bool llvm::SimpleRegisterCoalescing::SimpleJoin(llvm::LiveInterval&, llvm::LiveInterval&)': SimpleRegisterCoalescing.cpp:1645: warning: 'LHSValNo' may be used uninitialized in this function -- - Daniel -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20081103/c1840b70/attachment.html From grosbach at apple.com Mon Nov 3 16:10:33 2008 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 3 Nov 2008 14:10:33 -0800 Subject: [llvm-commits] [llvm] r58626 - in /llvm/trunk/lib/Target/ARM: ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.h ARMInstrInfo.td In-Reply-To: <840F490C-F893-46E0-ADFF-B61BC21677D5@apple.com> References: <200811031838.mA3IcWqw019585@zion.cs.uiuc.edu> <11542DAB-355C-4414-87BE-13A31708DF6D@apple.com> <840F490C-F893-46E0-ADFF-B61BC21677D5@apple.com> Message-ID: On Nov 3, 2008, at 12:44 PM, Evan Cheng wrote: > Ok. It's not just a naming issue. AddrMode information is used by > other ARM routines to determine instruction properties. Currently > AddrMode6 is only used by the code emitter to determine instruction > encoding. That seems wrong. You should be using instruction format > bits to determine how to encode these instructions instead. See > The places where the addressing mode is used in the backend are: ARMConstantIslands::InitialFunctionScan() - This is checking the max PC relative displacement for constant operands for a given instruction. The addressing mode check is performed when a constant pool operand is found. Since none of these instructions have constant operands, this check will never be hit and it is correct to omit reference to it in the switch statement (just like AddrMode4 is omitted). ARMRegisterInfo::eliminateFrameIndex() - Here we're looking for frame indexing and adjusting the instructions to get their operands relative to the stack pointer instead. Since all operands for these instructions are register direct, this does not apply. ARMRegisterInfo::processFunctionBeforeCalleeSavedScan() - Check for AddrMode3 and AddrMode5 explicitly to make sure enough registers are available for materializing stack offsets when necessary. Since these instructions don't do anything like that, again, there's nothing to add here. ARMInstrInfo::convertToThreeAddress() - Indexed load/store instructions are converted to an add/subtract with a non-indexed load/ store. Not applicable to the instructions we're looking at for these encodings. ARMCodeEmitter::getInstrBinary() - Dispatch routine for instruction encoding. This is currently based exclusively on AddrMode, and calls out to a separate function for each one. This is the one place where we do need to hook in for the new instructions. The instruction format bits are currently used to determine how to format and encode individual operands within a class of instructions. For example, my intent here is to use that format mask to handle bits 5 and 6 for the SMLAxy, SMLAWy, SULWy, etc. instructions. That is, the usage pattern in place is to use the addressing mode bits to indicate a class of instructions with common operand schemes, then use the format mask to break down nuances of those encodings. That's the pattern I've attempted to stay consistent with. It is, of course, technically possible to just hook off from getAddrModeNoneInstrBinary() based on the format mask entirely. I chose not to do that for the reasons outlined above. Do you have a counter-example that demonstrates why this is the wrong approach? > > // Format specifies the encoding used by the instruction. This is > part of the > // ad-hoc solution used to emit machine instruction encodings by our > machine > // code emitter. > class Format val> { > bits<5> Value = val; > } > > def Pseudo : Format<1>; > def MulFrm : Format<2>; > def MulSMLAW : Format<3>; > > Evan > > > On Nov 3, 2008, at 11:41 AM, Jim Grosbach wrote: > >> I have no real preference for what name to use. I chose that to be >> consistent with the other operations doing similar things (choosing >> how to encode operands for a class of instructions). If there's an >> alternative nomenclature that's preferable, that's fine with me. >> >> >> On Nov 3, 2008, at 11:17 AM, Evan Cheng wrote: >> >>> Thanks. But is addrmode6 the right name? I don't see ARM manuals >>> using >>> that name. >>> >>> Evan >>> >>> On Nov 3, 2008, at 10:38 AM, Jim Grosbach wrote: >>> >>>> Author: grosbach >>>> Date: Mon Nov 3 12:38:31 2008 >>>> New Revision: 58626 >>>> >>>> URL: http://llvm.org/viewvc/llvm-project?rev=58626&view=rev >>>> Log: >>>> Add binary encoding support for multiply instructions. Some blanks >>>> left to fill in, but the basics are there. >>>> >>>> Modified: >>>> llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp >>>> llvm/trunk/lib/Target/ARM/ARMInstrFormats.td >>>> llvm/trunk/lib/Target/ARM/ARMInstrInfo.h >>>> llvm/trunk/lib/Target/ARM/ARMInstrInfo.td >>>> >>>> Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp >>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58626&r1=58625&r2=58626&view=diff >>>> >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> =================================================================== >>>> --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original) >>>> +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Mon Nov 3 >>>> 12:38:31 >>>> 2008 >>>> @@ -82,8 +82,8 @@ >>>> const TargetInstrDesc &TID, >>>> const MachineOperand &MO); >>>> >>>> - unsigned getAddrMode1SBit(const MachineInstr &MI, >>>> - const TargetInstrDesc &TID) const; >>>> + unsigned getAddrModeSBit(const MachineInstr &MI, >>>> + const TargetInstrDesc &TID) const; >>>> >>>> unsigned getAddrMode1InstrBinary(const MachineInstr &MI, >>>> const TargetInstrDesc &TID, >>>> @@ -97,6 +97,9 @@ >>>> unsigned getAddrMode4InstrBinary(const MachineInstr &MI, >>>> const TargetInstrDesc &TID, >>>> unsigned Binary); >>>> + unsigned getAddrMode6InstrBinary(const MachineInstr &MI, >>>> + const TargetInstrDesc &TID, >>>> + unsigned Binary); >>>> >>>> /// getInstrBinary - Return binary encoding for the specified >>>> /// machine instruction. >>>> @@ -432,8 +435,8 @@ >>>> return Binary; >>>> } >>>> >>>> -unsigned ARMCodeEmitter::getAddrMode1SBit(const MachineInstr &MI, >>>> - const TargetInstrDesc >>>> &TID) const { >>>> +unsigned ARMCodeEmitter::getAddrModeSBit(const MachineInstr &MI, >>>> + const TargetInstrDesc >>>> &TID) const { >>>> for (unsigned i = MI.getNumOperands(), e = TID.getNumOperands(); >>>> i != e; --i){ >>>> const MachineOperand &MO = MI.getOperand(i-1); >>>> if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) >>>> @@ -449,7 +452,7 @@ >>>> Binary |= II->getPredicate(&MI) << 28; >>>> >>>> // Encode S bit if MI modifies CPSR. >>>> - Binary |= getAddrMode1SBit(MI, TID); >>>> + Binary |= getAddrModeSBit(MI, TID); >>>> >>>> // Encode register def if there is one. >>>> unsigned NumDefs = TID.getNumDefs(); >>>> @@ -618,6 +621,33 @@ >>>> return Binary; >>>> } >>>> >>>> +unsigned ARMCodeEmitter::getAddrMode6InstrBinary(const >>>> MachineInstr >>>> &MI, >>>> + const >>>> TargetInstrDesc &TID, >>>> + unsigned >>>> Binary) { >>>> + // Set the conditional execution predicate >>>> + Binary |= II->getPredicate(&MI) << 28; >>>> + >>>> + // Encode S bit if MI modifies CPSR. >>>> + Binary |= getAddrModeSBit(MI, TID); >>>> + >>>> + // 32x32->64bit operations have two destination registers. The >>>> number >>>> + // of register definitions will tell us if that's what we're >>>> dealing with. >>>> + int OpIdx = 0; >>>> + if (TID.getNumDefs() == 2) >>>> + Binary |= getMachineOpValue (MI, OpIdx++) << >>>> ARMII::RegRdLoShift; >>>> + >>>> + // Encode Rd >>>> + Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdHiShift; >>>> + >>>> + // Encode Rm >>>> + Binary |= getMachineOpValue(MI, OpIdx++); >>>> + >>>> + // Encode Rs >>>> + Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRsShift; >>>> + >>>> + return Binary; >>>> +} >>>> + >>>> /// getInstrBinary - Return binary encoding for the specified >>>> /// machine instruction. >>>> unsigned ARMCodeEmitter::getInstrBinary(const MachineInstr &MI) { >>>> @@ -636,6 +666,8 @@ >>>> return getAddrMode3InstrBinary(MI, TID, Binary); >>>> case ARMII::AddrMode4: >>>> return getAddrMode4InstrBinary(MI, TID, Binary); >>>> + case ARMII::AddrMode6: >>>> + return getAddrMode6InstrBinary(MI, TID, Binary); >>>> } >>>> >>>> abort(); >>>> >>>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td >>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58626&r1=58625&r2=58626&view=diff >>>> >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> =================================================================== >>>> --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) >>>> +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Mon Nov 3 >>>> 12:38:31 >>>> 2008 >>>> @@ -659,6 +659,28 @@ >>>> let Inst{27-25} = 0b100; >>>> } >>>> >>>> +// addrmode6 >>>> +// Unsigned multiply, multiply-accumulate instructions. >>>> +class AI6 opcod, dag oops, dag iops, Format f, string opc, >>>> + string asm, list pattern> >>>> + : I>>> opc, >>>> + asm,"",pattern> >>>> +{ >>>> + // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, >>>> SMLAWy, ...) >>>> + let Inst{7-4} = 0b1001; >>>> + let Inst{27-24} = 0b0000; >>>> + let Inst{23-20} = opcod; >>>> +} >>>> +class AsI6 opcod, dag oops, dag iops, Format f, string >>>> opc, >>>> + string asm, list pattern> >>>> + : sI>>> opc, >>>> + asm,"",pattern> >>>> +{ >>>> + // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, >>>> SMLAWy, ...) >>>> + let Inst{7-4} = 0b1001; >>>> + let Inst{27-24} = 0b0000; >>>> + let Inst{23-20} = opcod; >>>> +} >>>> >>>> // >>>> = >>>> = >>>> = >>>> ----------------------------------------------------------------------= >>>> ==// >>>> >>>> >>>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h >>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=58626&r1=58625&r2=58626&view=diff >>>> >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> =================================================================== >>>> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original) >>>> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Mon Nov 3 12:38:31 >>>> 2008 >>>> @@ -30,8 +30,7 @@ >>>> // Instruction Flags. >>>> >>>> // >>>> = >>>> = >>>> =------------------------------------------------------------------ >>>> ===// >>>> - // This three-bit field describes the addressing mode used. >>>> Zero is unused >>>> - // so that we can tell if we forgot to set a value. >>>> + // This four-bit field describes the addressing mode used. >>>> >>>> AddrModeMask = 0xf, >>>> AddrModeNone = 0, >>>> @@ -40,10 +39,11 @@ >>>> AddrMode3 = 3, >>>> AddrMode4 = 4, >>>> AddrMode5 = 5, >>>> - AddrModeT1 = 6, >>>> - AddrModeT2 = 7, >>>> - AddrModeT4 = 8, >>>> - AddrModeTs = 9, // i8 * 4 for pc and sp relative data >>>> + AddrMode6 = 6, >>>> + AddrModeT1 = 7, >>>> + AddrModeT2 = 8, >>>> + AddrModeT4 = 9, >>>> + AddrModeTs = 10, // i8 * 4 for pc and sp relative data >>>> >>>> // Size* - Flags to keep track of the size of an instruction. >>>> SizeShift = 4, >>>> @@ -115,15 +115,17 @@ >>>> >>>> // Field shifts - such shifts are used to set field while >>>> generating >>>> // machine instructions. >>>> - RotImmShift = 8, >>>> - RegRsShift = 8, >>>> - RegRdShift = 12, >>>> - RegRnShift = 16, >>>> - L_BitShift = 20, >>>> - S_BitShift = 20, >>>> - U_BitShift = 23, >>>> - IndexShift = 24, >>>> - I_BitShift = 25 >>>> + RotImmShift = 8, >>>> + RegRsShift = 8, >>>> + RegRdLoShift = 12, >>>> + RegRdShift = 12, >>>> + RegRdHiShift = 16, >>>> + RegRnShift = 16, >>>> + L_BitShift = 20, >>>> + S_BitShift = 20, >>>> + U_BitShift = 23, >>>> + IndexShift = 24, >>>> + I_BitShift = 25 >>>> }; >>>> } >>>> >>>> >>>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td >>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58626&r1=58625&r2=58626&view=diff >>>> >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> = >>>> =================================================================== >>>> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) >>>> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Nov 3 12:38:31 >>>> 2008 >>>> @@ -310,10 +310,11 @@ >>>> def AddrMode3 : AddrMode<3>; >>>> def AddrMode4 : AddrMode<4>; >>>> def AddrMode5 : AddrMode<5>; >>>> -def AddrModeT1 : AddrMode<6>; >>>> -def AddrModeT2 : AddrMode<7>; >>>> -def AddrModeT4 : AddrMode<8>; >>>> -def AddrModeTs : AddrMode<9>; >>>> +def AddrMode6 : AddrMode<6>; >>>> +def AddrModeT1 : AddrMode<7>; >>>> +def AddrModeT2 : AddrMode<8>; >>>> +def AddrModeT4 : AddrMode<9>; >>>> +def AddrModeTs : AddrMode<10>; >>>> >>>> // Instruction size. >>>> class SizeFlagVal val> { >>>> @@ -910,49 +911,53 @@ >>>> // Multiply Instructions. >>>> // >>>> >>>> -def MUL : AsI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm, >>>> - "mul", " $dst, $a, $b", >>>> - [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>; >>>> - >>>> -def MLA : AsI<0x2, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), >>>> - MulFrm, "mla", " $dst, $a, $b, $c", >>>> - [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR: >>>> $c))]>; >>>> +def MUL : AsI6<0b0000, (outs GPR:$dst), (ins GPR:$a, GPR:$b), >>>> MulFrm, >>>> + "mul", " $dst, $a, $b", >>>> + [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>; >>>> + >>>> +def MLA : AsI6<0b0010, (outs GPR:$dst), (ins GPR:$a, GPR:$b, >>>> GPR: >>>> $c), >>>> + MulFrm, "mla", " $dst, $a, $b, $c", >>>> + [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR: >>>> $c))]>; >>>> >>>> // Extra precision multiplies with low / high results >>>> -def SMULL : AsI<0xC, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>>> GPR: >>>> $b), >>>> - MulFrm, "smull", " $ldst, $hdst, $a, $b", []>; >>>> +def SMULL : AsI6<0b1100, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>>> GPR:$b), >>>> + MulFrm, "smull", " $ldst, $hdst, $a, $b", []>; >>>> >>>> -def UMULL : AsI<0x8, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>>> GPR: >>>> $b), >>>> - MulFrm, "umull", " $ldst, $hdst, $a, $b", []>; >>>> +def UMULL : AsI6<0b1000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>>> GPR:$b), >>>> + MulFrm, "umull", " $ldst, $hdst, $a, $b", []>; >>>> >>>> // Multiply + accumulate >>>> -def SMLAL : AsI<0xE, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>>> GPR: >>>> $b), >>>> - MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>; >>>> +def SMLAL : AsI6<0b1110, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>>> GPR:$b), >>>> + MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>; >>>> >>>> -def UMLAL : AsI<0xA, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>>> GPR: >>>> $b), >>>> - MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>; >>>> +def UMLAL : AsI6<0b1010, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>>> GPR:$b), >>>> + MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>; >>>> >>>> -def UMAAL : AI<0x0, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR: >>>> $b), MulFrm, >>>> - "umaal", " $ldst, $hdst, $a, $b", []>, >>>> - Requires<[IsARM, HasV6]>; >>>> +def UMAAL : AI6 <0b0000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>>> GPR:$b), >>>> + MulFrm, "umaal", " $ldst, $hdst, $a, $b", []>, >>>> + Requires<[IsARM, HasV6]>; >>>> >>>> // Most significant word multiply >>>> +// FIXME: encoding >>>> def SMMUL : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm, >>>> "smmul", " $dst, $a, $b", >>>> [(set GPR:$dst, (mulhs GPR:$a, GPR:$b))]>, >>>> Requires<[IsARM, HasV6]>; >>>> >>>> +// FIXME: encoding >>>> def SMMLA : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), >>>> MulFrm, >>>> "smmla", " $dst, $a, $b, $c", >>>> [(set GPR:$dst, (add (mulhs GPR:$a, GPR:$b), GPR: >>>> $c))]>, >>>> Requires<[IsARM, HasV6]>; >>>> >>>> >>>> +// FIXME: encoding >>>> def SMMLS : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), >>>> MulFrm, >>>> "smmls", " $dst, $a, $b, $c", >>>> [(set GPR:$dst, (sub GPR:$c, (mulhs GPR:$a, GPR: >>>> $b)))]>, >>>> Requires<[IsARM, HasV6]>; >>>> >>>> +// FIXME: encoding >>>> multiclass AI_smul { >>>> def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL, >>>> !strconcat(opc, "bb"), " $dst, $a, $b", >>>> @@ -992,6 +997,7 @@ >>>> } >>>> >>>> >>>> +// FIXME: encoding >>>> multiclass AI_smla { >>>> def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), >>>> MulSMLA, >>>> !strconcat(opc, "bb"), " $dst, $a, $b, $acc", >>>> @@ -1031,7 +1037,9 @@ >>>> Requires<[IsARM, HasV5TE]>; >>>> } >>>> >>>> +// FIXME: encoding >>>> defm SMUL : AI_smul<"smul", BinOpFrag<(mul node:$LHS, node:$RHS)>>; >>>> +// FIXME: encoding >>>> defm SMLA : AI_smla<"smla", BinOpFrag<(mul node:$LHS, node:$RHS)>>; >>>> >>>> // TODO: Halfword multiple accumulate long: SMLAL >>>> >>>> >>>> _______________________________________________ >>>> llvm-commits mailing list >>>> llvm-commits at cs.uiuc.edu >>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From criswell at uiuc.edu Mon Nov 3 16:28:16 2008 From: criswell at uiuc.edu (John Criswell) Date: Mon, 03 Nov 2008 22:28:16 -0000 Subject: [llvm-commits] [poolalloc] r58645 - /poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Message-ID: <200811032228.mA3MSGlg001407@zion.cs.uiuc.edu> Author: criswell Date: Mon Nov 3 16:28:16 2008 New Revision: 58645 URL: http://llvm.org/viewvc/llvm-project?rev=58645&view=rev Log: Create another work around for using bugpoint on automatic pool allocation. Modified: poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Modified: poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp?rev=58645&r1=58644&r2=58645&view=diff ============================================================================== --- poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp (original) +++ poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Mon Nov 3 16:28:16 2008 @@ -661,6 +661,8 @@ assert (CF && "No call graph info"); // Get the common graph for the set of functions this call may invoke. + if (UsingBugpoint && (!(Graphs.hasDSGraph(*CF)))) return; + assert ((Graphs.hasDSGraph(*CF)) && "Function has no DSGraph!\n"); CalleeGraph = Graphs.getDSGraph(*CF); #ifndef NDEBUG From evan.cheng at apple.com Mon Nov 3 16:32:19 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Nov 2008 14:32:19 -0800 Subject: [llvm-commits] [llvm] r58626 - in /llvm/trunk/lib/Target/ARM: ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.h ARMInstrInfo.td In-Reply-To: References: <200811031838.mA3IcWqw019585@zion.cs.uiuc.edu> <11542DAB-355C-4414-87BE-13A31708DF6D@apple.com> <840F490C-F893-46E0-ADFF-B61BC21677D5@apple.com> Message-ID: <6361908F-1AFD-4B0A-920F-BA51EB869C48@apple.com> On Nov 3, 2008, at 2:10 PM, Jim Grosbach wrote: > On Nov 3, 2008, at 12:44 PM, Evan Cheng wrote: > >> Ok. It's not just a naming issue. AddrMode information is used by >> other ARM routines to determine instruction properties. Currently >> AddrMode6 is only used by the code emitter to determine instruction >> encoding. That seems wrong. You should be using instruction format >> bits to determine how to encode these instructions instead. See >> > > The places where the addressing mode is used in the backend are: > > > ARMCodeEmitter::getInstrBinary() - Dispatch routine for instruction > encoding. This is currently based exclusively on AddrMode, and calls > out to a separate function for each one. This is the one place where > we do need to hook in for the new instructions. > > > The instruction format bits are currently used to determine how to > format and encode individual operands within a class of instructions. > For example, my intent here is to use that format mask to handle bits > 5 and 6 for the SMLAxy, SMLAWy, SULWy, etc. instructions. > > That is, the usage pattern in place is to use the addressing mode bits > to indicate a class of instructions with common operand schemes, then > use the format mask to break down nuances of those encodings. That's > the pattern I've attempted to stay consistent with. Right. We are confusing "addressing mode" with "instruction set encoding scheme". It's a not advisable. It's done this way due to some legacy code. We got away with it because the all instructions in each address mode happens to be in the same encoding scheme (this is actually not true in addrmode1 case). This ought to be cleaned up when we have a chance. Please don't contribute to the problem. It's worse if you introduce a new addrmode6 address mode to represent a new encoding scheme. This is really confusing since isn't a address mode 6 in the ARM instruction set. > > It is, of course, technically possible to just hook off from > getAddrModeNoneInstrBinary() based on the format mask entirely. I > chose not to do that for the reasons outlined above. We ought to follow "A3.1 Instruction set encoding" by classifying instructions into the formats listed there. That doesn't have to be done now. But let's not follow the same mistake that's already made. We can leave addr1 to 5 instructions alone for now. For the rest, let's branch off to different encoding functions based on the format mask. This also means we should do away with getAddrModeNoneInstrBinary and introduce getBranchInstrBinary to handle the branch instructions. Evan > > > Do you have a counter-example that demonstrates why this is the wrong > approach? > > >> >> // Format specifies the encoding used by the instruction. This is >> part of the >> // ad-hoc solution used to emit machine instruction encodings by our >> machine >> // code emitter. >> class Format val> { >> bits<5> Value = val; >> } >> >> def Pseudo : Format<1>; >> def MulFrm : Format<2>; >> def MulSMLAW : Format<3>; >> >> Evan >> >> >> On Nov 3, 2008, at 11:41 AM, Jim Grosbach wrote: >> >>> I have no real preference for what name to use. I chose that to be >>> consistent with the other operations doing similar things (choosing >>> how to encode operands for a class of instructions). If there's an >>> alternative nomenclature that's preferable, that's fine with me. >>> >>> >>> On Nov 3, 2008, at 11:17 AM, Evan Cheng wrote: >>> >>>> Thanks. But is addrmode6 the right name? I don't see ARM manuals >>>> using >>>> that name. >>>> >>>> Evan >>>> >>>> On Nov 3, 2008, at 10:38 AM, Jim Grosbach wrote: >>>> >>>>> Author: grosbach >>>>> Date: Mon Nov 3 12:38:31 2008 >>>>> New Revision: 58626 >>>>> >>>>> URL: http://llvm.org/viewvc/llvm-project?rev=58626&view=rev >>>>> Log: >>>>> Add binary encoding support for multiply instructions. Some blanks >>>>> left to fill in, but the basics are there. >>>>> >>>>> Modified: >>>>> llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp >>>>> llvm/trunk/lib/Target/ARM/ARMInstrFormats.td >>>>> llvm/trunk/lib/Target/ARM/ARMInstrInfo.h >>>>> llvm/trunk/lib/Target/ARM/ARMInstrInfo.td >>>>> >>>>> Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp >>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58626&r1=58625&r2=58626&view=diff >>>>> >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> ================================================================== >>>>> --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original) >>>>> +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Mon Nov 3 >>>>> 12:38:31 >>>>> 2008 >>>>> @@ -82,8 +82,8 @@ >>>>> const TargetInstrDesc &TID, >>>>> const MachineOperand &MO); >>>>> >>>>> - unsigned getAddrMode1SBit(const MachineInstr &MI, >>>>> - const TargetInstrDesc &TID) const; >>>>> + unsigned getAddrModeSBit(const MachineInstr &MI, >>>>> + const TargetInstrDesc &TID) const; >>>>> >>>>> unsigned getAddrMode1InstrBinary(const MachineInstr &MI, >>>>> const TargetInstrDesc &TID, >>>>> @@ -97,6 +97,9 @@ >>>>> unsigned getAddrMode4InstrBinary(const MachineInstr &MI, >>>>> const TargetInstrDesc &TID, >>>>> unsigned Binary); >>>>> + unsigned getAddrMode6InstrBinary(const MachineInstr &MI, >>>>> + const TargetInstrDesc &TID, >>>>> + unsigned Binary); >>>>> >>>>> /// getInstrBinary - Return binary encoding for the specified >>>>> /// machine instruction. >>>>> @@ -432,8 +435,8 @@ >>>>> return Binary; >>>>> } >>>>> >>>>> -unsigned ARMCodeEmitter::getAddrMode1SBit(const MachineInstr &MI, >>>>> - const TargetInstrDesc >>>>> &TID) const { >>>>> +unsigned ARMCodeEmitter::getAddrModeSBit(const MachineInstr &MI, >>>>> + const TargetInstrDesc >>>>> &TID) const { >>>>> for (unsigned i = MI.getNumOperands(), e = TID.getNumOperands(); >>>>> i != e; --i){ >>>>> const MachineOperand &MO = MI.getOperand(i-1); >>>>> if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) >>>>> @@ -449,7 +452,7 @@ >>>>> Binary |= II->getPredicate(&MI) << 28; >>>>> >>>>> // Encode S bit if MI modifies CPSR. >>>>> - Binary |= getAddrMode1SBit(MI, TID); >>>>> + Binary |= getAddrModeSBit(MI, TID); >>>>> >>>>> // Encode register def if there is one. >>>>> unsigned NumDefs = TID.getNumDefs(); >>>>> @@ -618,6 +621,33 @@ >>>>> return Binary; >>>>> } >>>>> >>>>> +unsigned ARMCodeEmitter::getAddrMode6InstrBinary(const >>>>> MachineInstr >>>>> &MI, >>>>> + const >>>>> TargetInstrDesc &TID, >>>>> + unsigned >>>>> Binary) { >>>>> + // Set the conditional execution predicate >>>>> + Binary |= II->getPredicate(&MI) << 28; >>>>> + >>>>> + // Encode S bit if MI modifies CPSR. >>>>> + Binary |= getAddrModeSBit(MI, TID); >>>>> + >>>>> + // 32x32->64bit operations have two destination registers. The >>>>> number >>>>> + // of register definitions will tell us if that's what we're >>>>> dealing with. >>>>> + int OpIdx = 0; >>>>> + if (TID.getNumDefs() == 2) >>>>> + Binary |= getMachineOpValue (MI, OpIdx++) << >>>>> ARMII::RegRdLoShift; >>>>> + >>>>> + // Encode Rd >>>>> + Binary |= getMachineOpValue(MI, OpIdx++) << >>>>> ARMII::RegRdHiShift; >>>>> + >>>>> + // Encode Rm >>>>> + Binary |= getMachineOpValue(MI, OpIdx++); >>>>> + >>>>> + // Encode Rs >>>>> + Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRsShift; >>>>> + >>>>> + return Binary; >>>>> +} >>>>> + >>>>> /// getInstrBinary - Return binary encoding for the specified >>>>> /// machine instruction. >>>>> unsigned ARMCodeEmitter::getInstrBinary(const MachineInstr &MI) { >>>>> @@ -636,6 +666,8 @@ >>>>> return getAddrMode3InstrBinary(MI, TID, Binary); >>>>> case ARMII::AddrMode4: >>>>> return getAddrMode4InstrBinary(MI, TID, Binary); >>>>> + case ARMII::AddrMode6: >>>>> + return getAddrMode6InstrBinary(MI, TID, Binary); >>>>> } >>>>> >>>>> abort(); >>>>> >>>>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td >>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58626&r1=58625&r2=58626&view=diff >>>>> >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> ================================================================== >>>>> --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) >>>>> +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Mon Nov 3 >>>>> 12:38:31 >>>>> 2008 >>>>> @@ -659,6 +659,28 @@ >>>>> let Inst{27-25} = 0b100; >>>>> } >>>>> >>>>> +// addrmode6 >>>>> +// Unsigned multiply, multiply-accumulate instructions. >>>>> +class AI6 opcod, dag oops, dag iops, Format f, string >>>>> opc, >>>>> + string asm, list pattern> >>>>> + : I>>>> opc, >>>>> + asm,"",pattern> >>>>> +{ >>>>> + // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, >>>>> SMLAWy, ...) >>>>> + let Inst{7-4} = 0b1001; >>>>> + let Inst{27-24} = 0b0000; >>>>> + let Inst{23-20} = opcod; >>>>> +} >>>>> +class AsI6 opcod, dag oops, dag iops, Format f, string >>>>> opc, >>>>> + string asm, list pattern> >>>>> + : sI>>>> f, >>>>> opc, >>>>> + asm,"",pattern> >>>>> +{ >>>>> + // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, >>>>> SMLAWy, ...) >>>>> + let Inst{7-4} = 0b1001; >>>>> + let Inst{27-24} = 0b0000; >>>>> + let Inst{23-20} = opcod; >>>>> +} >>>>> >>>>> // >>>>> = >>>>> = >>>>> = >>>>> ----------------------------------------------------------------------= >>>>> ==// >>>>> >>>>> >>>>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h >>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=58626&r1=58625&r2=58626&view=diff >>>>> >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> ================================================================== >>>>> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original) >>>>> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Mon Nov 3 12:38:31 >>>>> 2008 >>>>> @@ -30,8 +30,7 @@ >>>>> // Instruction Flags. >>>>> >>>>> // >>>>> = >>>>> = >>>>> = >>>>> ------------------------------------------------------------------ >>>>> ===// >>>>> - // This three-bit field describes the addressing mode used. >>>>> Zero is unused >>>>> - // so that we can tell if we forgot to set a value. >>>>> + // This four-bit field describes the addressing mode used. >>>>> >>>>> AddrModeMask = 0xf, >>>>> AddrModeNone = 0, >>>>> @@ -40,10 +39,11 @@ >>>>> AddrMode3 = 3, >>>>> AddrMode4 = 4, >>>>> AddrMode5 = 5, >>>>> - AddrModeT1 = 6, >>>>> - AddrModeT2 = 7, >>>>> - AddrModeT4 = 8, >>>>> - AddrModeTs = 9, // i8 * 4 for pc and sp relative data >>>>> + AddrMode6 = 6, >>>>> + AddrModeT1 = 7, >>>>> + AddrModeT2 = 8, >>>>> + AddrModeT4 = 9, >>>>> + AddrModeTs = 10, // i8 * 4 for pc and sp relative data >>>>> >>>>> // Size* - Flags to keep track of the size of an instruction. >>>>> SizeShift = 4, >>>>> @@ -115,15 +115,17 @@ >>>>> >>>>> // Field shifts - such shifts are used to set field while >>>>> generating >>>>> // machine instructions. >>>>> - RotImmShift = 8, >>>>> - RegRsShift = 8, >>>>> - RegRdShift = 12, >>>>> - RegRnShift = 16, >>>>> - L_BitShift = 20, >>>>> - S_BitShift = 20, >>>>> - U_BitShift = 23, >>>>> - IndexShift = 24, >>>>> - I_BitShift = 25 >>>>> + RotImmShift = 8, >>>>> + RegRsShift = 8, >>>>> + RegRdLoShift = 12, >>>>> + RegRdShift = 12, >>>>> + RegRdHiShift = 16, >>>>> + RegRnShift = 16, >>>>> + L_BitShift = 20, >>>>> + S_BitShift = 20, >>>>> + U_BitShift = 23, >>>>> + IndexShift = 24, >>>>> + I_BitShift = 25 >>>>> }; >>>>> } >>>>> >>>>> >>>>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td >>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58626&r1=58625&r2=58626&view=diff >>>>> >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> = >>>>> ================================================================== >>>>> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) >>>>> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Nov 3 12:38:31 >>>>> 2008 >>>>> @@ -310,10 +310,11 @@ >>>>> def AddrMode3 : AddrMode<3>; >>>>> def AddrMode4 : AddrMode<4>; >>>>> def AddrMode5 : AddrMode<5>; >>>>> -def AddrModeT1 : AddrMode<6>; >>>>> -def AddrModeT2 : AddrMode<7>; >>>>> -def AddrModeT4 : AddrMode<8>; >>>>> -def AddrModeTs : AddrMode<9>; >>>>> +def AddrMode6 : AddrMode<6>; >>>>> +def AddrModeT1 : AddrMode<7>; >>>>> +def AddrModeT2 : AddrMode<8>; >>>>> +def AddrModeT4 : AddrMode<9>; >>>>> +def AddrModeTs : AddrMode<10>; >>>>> >>>>> // Instruction size. >>>>> class SizeFlagVal val> { >>>>> @@ -910,49 +911,53 @@ >>>>> // Multiply Instructions. >>>>> // >>>>> >>>>> -def MUL : AsI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b), >>>>> MulFrm, >>>>> - "mul", " $dst, $a, $b", >>>>> - [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>; >>>>> - >>>>> -def MLA : AsI<0x2, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR: >>>>> $c), >>>>> - MulFrm, "mla", " $dst, $a, $b, $c", >>>>> - [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR: >>>>> $c))]>; >>>>> +def MUL : AsI6<0b0000, (outs GPR:$dst), (ins GPR:$a, GPR:$b), >>>>> MulFrm, >>>>> + "mul", " $dst, $a, $b", >>>>> + [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>; >>>>> + >>>>> +def MLA : AsI6<0b0010, (outs GPR:$dst), (ins GPR:$a, GPR:$b, >>>>> GPR: >>>>> $c), >>>>> + MulFrm, "mla", " $dst, $a, $b, $c", >>>>> + [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR: >>>>> $c))]>; >>>>> >>>>> // Extra precision multiplies with low / high results >>>>> -def SMULL : AsI<0xC, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>>>> GPR: >>>>> $b), >>>>> - MulFrm, "smull", " $ldst, $hdst, $a, $b", []>; >>>>> +def SMULL : AsI6<0b1100, (outs GPR:$ldst, GPR:$hdst), (ins GPR: >>>>> $a, >>>>> GPR:$b), >>>>> + MulFrm, "smull", " $ldst, $hdst, $a, $b", []>; >>>>> >>>>> -def UMULL : AsI<0x8, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>>>> GPR: >>>>> $b), >>>>> - MulFrm, "umull", " $ldst, $hdst, $a, $b", []>; >>>>> +def UMULL : AsI6<0b1000, (outs GPR:$ldst, GPR:$hdst), (ins GPR: >>>>> $a, >>>>> GPR:$b), >>>>> + MulFrm, "umull", " $ldst, $hdst, $a, $b", []>; >>>>> >>>>> // Multiply + accumulate >>>>> -def SMLAL : AsI<0xE, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>>>> GPR: >>>>> $b), >>>>> - MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>; >>>>> +def SMLAL : AsI6<0b1110, (outs GPR:$ldst, GPR:$hdst), (ins GPR: >>>>> $a, >>>>> GPR:$b), >>>>> + MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>; >>>>> >>>>> -def UMLAL : AsI<0xA, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>>>> GPR: >>>>> $b), >>>>> - MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>; >>>>> +def UMLAL : AsI6<0b1010, (outs GPR:$ldst, GPR:$hdst), (ins GPR: >>>>> $a, >>>>> GPR:$b), >>>>> + MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>; >>>>> >>>>> -def UMAAL : AI<0x0, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, >>>>> GPR: >>>>> $b), MulFrm, >>>>> - "umaal", " $ldst, $hdst, $a, $b", []>, >>>>> - Requires<[IsARM, HasV6]>; >>>>> +def UMAAL : AI6 <0b0000, (outs GPR:$ldst, GPR:$hdst), (ins GPR: >>>>> $a, >>>>> GPR:$b), >>>>> + MulFrm, "umaal", " $ldst, $hdst, $a, $b", []>, >>>>> + Requires<[IsARM, HasV6]>; >>>>> >>>>> // Most significant word multiply >>>>> +// FIXME: encoding >>>>> def SMMUL : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm, >>>>> "smmul", " $dst, $a, $b", >>>>> [(set GPR:$dst, (mulhs GPR:$a, GPR:$b))]>, >>>>> Requires<[IsARM, HasV6]>; >>>>> >>>>> +// FIXME: encoding >>>>> def SMMLA : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), >>>>> MulFrm, >>>>> "smmla", " $dst, $a, $b, $c", >>>>> [(set GPR:$dst, (add (mulhs GPR:$a, GPR:$b), GPR: >>>>> $c))]>, >>>>> Requires<[IsARM, HasV6]>; >>>>> >>>>> >>>>> +// FIXME: encoding >>>>> def SMMLS : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), >>>>> MulFrm, >>>>> "smmls", " $dst, $a, $b, $c", >>>>> [(set GPR:$dst, (sub GPR:$c, (mulhs GPR:$a, GPR: >>>>> $b)))]>, >>>>> Requires<[IsARM, HasV6]>; >>>>> >>>>> +// FIXME: encoding >>>>> multiclass AI_smul { >>>>> def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL, >>>>> !strconcat(opc, "bb"), " $dst, $a, $b", >>>>> @@ -992,6 +997,7 @@ >>>>> } >>>>> >>>>> >>>>> +// FIXME: encoding >>>>> multiclass AI_smla { >>>>> def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), >>>>> MulSMLA, >>>>> !strconcat(opc, "bb"), " $dst, $a, $b, $acc", >>>>> @@ -1031,7 +1037,9 @@ >>>>> Requires<[IsARM, HasV5TE]>; >>>>> } >>>>> >>>>> +// FIXME: encoding >>>>> defm SMUL : AI_smul<"smul", BinOpFrag<(mul node:$LHS, node: >>>>> $RHS)>>; >>>>> +// FIXME: encoding >>>>> defm SMLA : AI_smla<"smla", BinOpFrag<(mul node:$LHS, node: >>>>> $RHS)>>; >>>>> >>>>> // TODO: Halfword multiple accumulate long: SMLAL >>>>> >>>>> >>>>> _______________________________________________ >>>>> llvm-commits mailing list >>>>> llvm-commits at cs.uiuc.edu >>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>>> >>>> _______________________________________________ >>>> llvm-commits mailing list >>>> llvm-commits at cs.uiuc.edu >>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From ggreif at gmail.com Mon Nov 3 16:41:42 2008 From: ggreif at gmail.com (Gabor Greif) Date: Mon, 03 Nov 2008 22:41:42 -0000 Subject: [llvm-commits] [llvm] r58648 - /llvm/branches/ggreif/README Message-ID: <200811032241.mA3MfgdL002064@zion.cs.uiuc.edu> Author: ggreif Date: Mon Nov 3 16:41:42 2008 New Revision: 58648 URL: http://llvm.org/viewvc/llvm-project?rev=58648&view=rev Log: Update my status items, hint at son-of-use-diet. Modified: llvm/branches/ggreif/README Modified: llvm/branches/ggreif/README URL: http://llvm.org/viewvc/llvm-project/llvm/branches/ggreif/README?rev=58648&r1=58647&r2=58648&view=diff ============================================================================== --- llvm/branches/ggreif/README (original) +++ llvm/branches/ggreif/README Mon Nov 3 16:41:42 2008 @@ -24,6 +24,15 @@ svn switch http(s)://llvm.org/svn/llvm-project/llvm/branches/ggreif/parallelized-test/Transforms/DecomposeMultiDimRefs Transforms/DecomposeMultiDimRefs rm -r Transforms/DecomposeMultiDimRefs +STATUS: Pretty stable. There are some intermittent failures with -j4 because BugPoint seems + to hard-code the filename for its reductions. This causes races. Merging to main would + be easy, the harder part is to verify that the generated report has the same format as + the non-parallel dejagnu output (whatever that is) and that there is a smooth fallback + to the non-parallel execution that do not impose the overhead of the parallel tests. + +IDEAS: The creation of the many small files could be made faster by using a ram-disk (or + equivalent). + -------------------------------------------------------------------------------- 2) size reduction. After some conversation with Chris I think we are ready for a @@ -76,3 +85,13 @@ cd llvm svn switch http(s)://llvm.org/svn/llvm-project/llvm/branches/ggreif/use-diet . +STATUS: waves 1..3 already merged to trunk and released in 2.4. Measured 13% memory + savings on big testcases (dealII). An estimated another 10% seems realistic + with waves 4..6. Ideas formulated, implementation started. Feasibility uncertain. + +-------------------------------------------------------------------------------- +3) Son of Use-Diet. + +Reduction of struct Use size to 2 pointers. Uses a variant of the original +waymarking algorithm. Implementation exists and applicable against release 2.4. + From gohman at apple.com Mon Nov 3 16:55:43 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 03 Nov 2008 22:55:43 -0000 Subject: [llvm-commits] [llvm] r58650 - in /llvm/trunk: include/llvm-c/Core.h lib/VMCore/Core.cpp Message-ID: <200811032255.mA3MthHr002574@zion.cs.uiuc.edu> Author: djg Date: Mon Nov 3 16:55:43 2008 New Revision: 58650 URL: http://llvm.org/viewvc/llvm-project?rev=58650&view=rev Log: Add C bindings for extractvalue and insertvalue. Patch by Frits van Bommel! Modified: llvm/trunk/include/llvm-c/Core.h llvm/trunk/lib/VMCore/Core.cpp Modified: llvm/trunk/include/llvm-c/Core.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm-c/Core.h?rev=58650&r1=58649&r2=58650&view=diff ============================================================================== --- llvm/trunk/include/llvm-c/Core.h (original) +++ llvm/trunk/include/llvm-c/Core.h Mon Nov 3 16:55:43 2008 @@ -371,6 +371,11 @@ LLVMValueRef LLVMConstShuffleVector(LLVMValueRef VectorAConstant, LLVMValueRef VectorBConstant, LLVMValueRef MaskConstant); +LLVMValueRef LLVMConstExtractValue(LLVMValueRef AggConstant, unsigned *IdxList, + unsigned NumIdx); +LLVMValueRef LLVMConstInsertValue(LLVMValueRef AggConstant, + LLVMValueRef ElementValueConstant, + unsigned *IdxList, unsigned NumIdx); /* Operations on global variables, functions, and aliases (globals) */ LLVMModuleRef LLVMGetGlobalParent(LLVMValueRef Global); @@ -605,6 +610,11 @@ LLVMValueRef LLVMBuildShuffleVector(LLVMBuilderRef, LLVMValueRef V1, LLVMValueRef V2, LLVMValueRef Mask, const char *Name); +LLVMValueRef LLVMBuildExtractValue(LLVMBuilderRef, LLVMValueRef AggVal, + unsigned Index, const char *Name); +LLVMValueRef LLVMBuildInsertValue(LLVMBuilderRef, LLVMValueRef AggVal, + LLVMValueRef EltVal, unsigned Index, + const char *Name); /*===-- Module providers --------------------------------------------------===*/ Modified: llvm/trunk/lib/VMCore/Core.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Core.cpp?rev=58650&r1=58649&r2=58650&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Core.cpp (original) +++ llvm/trunk/lib/VMCore/Core.cpp Mon Nov 3 16:55:43 2008 @@ -541,6 +541,20 @@ unwrap(MaskConstant))); } +LLVMValueRef LLVMConstExtractValue(LLVMValueRef AggConstant, unsigned *IdxList, + unsigned NumIdx) { + return wrap(ConstantExpr::getExtractValue(unwrap(AggConstant), + IdxList, NumIdx)); +} + +LLVMValueRef LLVMConstInsertValue(LLVMValueRef AggConstant, + LLVMValueRef ElementValueConstant, + unsigned *IdxList, unsigned NumIdx) { + return wrap(ConstantExpr::getInsertValue(unwrap(AggConstant), + unwrap(ElementValueConstant), + IdxList, NumIdx)); +} + /*--.. Operations on global variables, functions, and aliases (globals) ....--*/ LLVMModuleRef LLVMGetGlobalParent(LLVMValueRef Global) { @@ -1326,6 +1340,18 @@ unwrap(Mask), Name)); } +LLVMValueRef LLVMBuildExtractValue(LLVMBuilderRef B, LLVMValueRef AggVal, + unsigned Index, const char *Name) { + return wrap(unwrap(B)->CreateExtractValue(unwrap(AggVal), Index, Name)); +} + +LLVMValueRef LLVMBuildInsertValue(LLVMBuilderRef B, LLVMValueRef AggVal, + LLVMValueRef EltVal, unsigned Index, + const char *Name) { + return wrap(unwrap(B)->CreateInsertValue(unwrap(AggVal), unwrap(EltVal), + Index, Name)); +} + /*===-- Module providers --------------------------------------------------===*/ From dpatel at apple.com Mon Nov 3 17:14:09 2008 From: dpatel at apple.com (Devang Patel) Date: Mon, 03 Nov 2008 23:14:09 -0000 Subject: [llvm-commits] [llvm] r58651 - /llvm/trunk/lib/Transforms/Utils/BasicBlockUtils.cpp Message-ID: <200811032314.mA3NE9ia003406@zion.cs.uiuc.edu> Author: dpatel Date: Mon Nov 3 17:14:09 2008 New Revision: 58651 URL: http://llvm.org/viewvc/llvm-project?rev=58651&view=rev Log: Fix unused variable warnings. Modified: llvm/trunk/lib/Transforms/Utils/BasicBlockUtils.cpp Modified: llvm/trunk/lib/Transforms/Utils/BasicBlockUtils.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/BasicBlockUtils.cpp?rev=58651&r1=58650&r2=58651&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/BasicBlockUtils.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/BasicBlockUtils.cpp Mon Nov 3 17:14:09 2008 @@ -205,7 +205,10 @@ BasicBlock *llvm::SplitEdge(BasicBlock *BB, BasicBlock *Succ, Pass *P) { TerminatorInst *LatchTerm = BB->getTerminator(); unsigned SuccNum = 0; - for (unsigned i = 0, e = LatchTerm->getNumSuccessors(); ; ++i) { +#ifndef NDEBUG + unsigned e = LatchTerm->getNumSuccessors(); +#endif + for (unsigned i = 0; ; ++i) { assert(i != e && "Didn't find edge?"); if (LatchTerm->getSuccessor(i) == Succ) { SuccNum = i; @@ -224,6 +227,7 @@ // If the successor only has a single pred, split the top of the successor // block. assert(SP == BB && "CFG broken"); + SP = NULL; return SplitBlock(Succ, Succ->begin(), P); } else { // Otherwise, if BB has a single successor, split it at the bottom of the From dpatel at apple.com Mon Nov 3 17:20:04 2008 From: dpatel at apple.com (Devang Patel) Date: Mon, 03 Nov 2008 23:20:04 -0000 Subject: [llvm-commits] [llvm] r58653 - in /llvm/trunk/lib/VMCore: ConstantFold.cpp Constants.cpp Message-ID: <200811032320.mA3NK4VJ003681@zion.cs.uiuc.edu> Author: dpatel Date: Mon Nov 3 17:20:04 2008 New Revision: 58653 URL: http://llvm.org/viewvc/llvm-project?rev=58653&view=rev Log: Fix unused variable warnings. Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp llvm/trunk/lib/VMCore/Constants.cpp Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantFold.cpp?rev=58653&r1=58652&r2=58653&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/ConstantFold.cpp (original) +++ llvm/trunk/lib/VMCore/ConstantFold.cpp Mon Nov 3 17:20:04 2008 @@ -126,6 +126,7 @@ if (const VectorType *SrcTy = dyn_cast(V->getType())) { assert(DestPTy->getBitWidth() == SrcTy->getBitWidth() && "Not cast between same sized vectors!"); + SrcTy = NULL; // First, check for null. Undef is already handled. if (isa(V)) return Constant::getNullValue(DestTy); Modified: llvm/trunk/lib/VMCore/Constants.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=58653&r1=58652&r2=58653&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Constants.cpp (original) +++ llvm/trunk/lib/VMCore/Constants.cpp Mon Nov 3 17:20:04 2008 @@ -1923,8 +1923,10 @@ } Constant *ConstantExpr::getUIToFP(Constant *C, const Type *Ty) { +#ifndef NDEBUG bool fromVec = C->getType()->getTypeID() == Type::VectorTyID; bool toVec = Ty->getTypeID() == Type::VectorTyID; +#endif assert((fromVec == toVec) && "Cannot convert from scalar to/from vector"); assert(C->getType()->isIntOrIntVector() && Ty->isFPOrFPVector() && "This is an illegal uint to floating point cast!"); @@ -1932,8 +1934,10 @@ } Constant *ConstantExpr::getSIToFP(Constant *C, const Type *Ty) { +#ifndef NDEBUG bool fromVec = C->getType()->getTypeID() == Type::VectorTyID; bool toVec = Ty->getTypeID() == Type::VectorTyID; +#endif assert((fromVec == toVec) && "Cannot convert from scalar to/from vector"); assert(C->getType()->isIntOrIntVector() && Ty->isFPOrFPVector() && "This is an illegal sint to floating point cast!"); @@ -1941,8 +1945,10 @@ } Constant *ConstantExpr::getFPToUI(Constant *C, const Type *Ty) { +#ifndef NDEBUG bool fromVec = C->getType()->getTypeID() == Type::VectorTyID; bool toVec = Ty->getTypeID() == Type::VectorTyID; +#endif assert((fromVec == toVec) && "Cannot convert from scalar to/from vector"); assert(C->getType()->isFPOrFPVector() && Ty->isIntOrIntVector() && "This is an illegal floating point to uint cast!"); @@ -1950,8 +1956,10 @@ } Constant *ConstantExpr::getFPToSI(Constant *C, const Type *Ty) { +#ifndef NDEBUG bool fromVec = C->getType()->getTypeID() == Type::VectorTyID; bool toVec = Ty->getTypeID() == Type::VectorTyID; +#endif assert((fromVec == toVec) && "Cannot convert from scalar to/from vector"); assert(C->getType()->isFPOrFPVector() && Ty->isIntOrIntVector() && "This is an illegal floating point to sint cast!"); @@ -1973,6 +1981,7 @@ Constant *ConstantExpr::getBitCast(Constant *C, const Type *DstTy) { // BitCast implies a no-op cast of type only. No bits change. However, you // can't cast pointers to anything but pointers. +#ifndef NDEBUG const Type *SrcTy = C->getType(); assert((isa(SrcTy) == isa(DstTy)) && "BitCast cannot cast pointer to non-pointer and vice versa"); @@ -1982,6 +1991,7 @@ // destination bit widths are identical. unsigned SrcBitSize = SrcTy->getPrimitiveSizeInBits(); unsigned DstBitSize = DstTy->getPrimitiveSizeInBits(); +#endif assert(SrcBitSize == DstBitSize && "BitCast requies types of same width"); return getFoldedCast(Instruction::BitCast, C, DstTy); } @@ -2365,8 +2375,10 @@ "Tried to create insertelement operation on non-first-class type!"); const Type *ReqTy = Agg->getType(); +#ifndef NDEBUG const Type *ValTy = ExtractValueInst::getIndexedType(Agg->getType(), IdxList, IdxList+NumIdx); +#endif assert(ValTy == Val->getType() && "insertvalue indices invalid!"); return getInsertValueTy(ReqTy, Agg, Val, IdxList, NumIdx); } From gohman at apple.com Mon Nov 3 17:43:55 2008 From: gohman at apple.com (Dan Gohman) Date: Mon, 03 Nov 2008 23:43:55 -0000 Subject: [llvm-commits] [llvm] r58655 - in /llvm/trunk: lib/Target/X86/X86ISelDAGToDAG.cpp test/CodeGen/X86/pr2982.ll Message-ID: <200811032343.mA3Nhtl5004527@zion.cs.uiuc.edu> Author: djg Date: Mon Nov 3 17:43:55 2008 New Revision: 58655 URL: http://llvm.org/viewvc/llvm-project?rev=58655&view=rev Log: The ANDMask node folds to a constant, and isn't the node that needs to have its node id set. The new and and shift nodes are the nodes that need the IDs. This fixes PR2982. Added: llvm/trunk/test/CodeGen/X86/pr2982.ll Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=58655&r1=58654&r2=58655&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Nov 3 17:43:55 2008 @@ -993,8 +993,8 @@ Shift.getOperand(0), NewANDMask); SDValue NewSHIFT = CurDAG->getNode(ISD::SHL, N.getValueType(), NewAND, SDValue(C1, 0)); - NewANDMask.getNode()->setNodeId(Shift.getNode()->getNodeId()); - NewAND.getNode()->setNodeId(N.getNode()->getNodeId()); + NewAND.getNode()->setNodeId(Shift.getNode()->getNodeId()); + NewSHIFT.getNode()->setNodeId(N.getNode()->getNodeId()); CurDAG->ReplaceAllUsesWith(N, NewSHIFT); AM.Scale = 1 << ShiftCst; Added: llvm/trunk/test/CodeGen/X86/pr2982.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr2982.ll?rev=58655&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/pr2982.ll (added) +++ llvm/trunk/test/CodeGen/X86/pr2982.ll Mon Nov 3 17:43:55 2008 @@ -0,0 +1,26 @@ +; RUN: llvm-as < %s | llc -march=x86 +; PR2982 + +target datalayout = +"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin9.5" + at g_279 = external global i32 ; [#uses=1] + at g_265 = external global i32 ; [#uses=1] + at g_3 = external global i8 ; [#uses=1] + +declare i32 @rshift_u_u(...) + +define void @bar() nounwind { +entry: + %0 = load i32* @g_279, align 4 ; [#uses=1] + %1 = shl i32 %0, 1 ; [#uses=1] + %2 = and i32 %1, 2 ; [#uses=1] + %3 = load i32* @g_265, align 4 ; [#uses=1] + %4 = load i8* @g_3, align 1 ; [#uses=1] + %5 = sext i8 %4 to i32 ; [#uses=1] + %6 = add i32 %2, %3 ; [#uses=1] + %7 = add i32 %6, %5 ; [#uses=1] + %8 = tail call i32 (...)* @rshift_u_u(i32 %7, i32 0) nounwind +; [#uses=0] + ret void +} From kremenek at apple.com Mon Nov 3 18:09:47 2008 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 04 Nov 2008 00:09:47 -0000 Subject: [llvm-commits] [llvm] r58659 - /llvm/tags/checker/checker-122/ Message-ID: <200811040009.mA409l8W005540@zion.cs.uiuc.edu> Author: kremenek Date: Mon Nov 3 18:09:46 2008 New Revision: 58659 URL: http://llvm.org/viewvc/llvm-project?rev=58659&view=rev Log: Tagging checker-122. Added: llvm/tags/checker/checker-122/ - copied from r58658, llvm/trunk/ From kremenek at apple.com Mon Nov 3 18:21:52 2008 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 04 Nov 2008 00:21:52 -0000 Subject: [llvm-commits] [llvm] r58661 - /llvm/tags/checker/checker-122/ Message-ID: <200811040021.mA40LrrA005936@zion.cs.uiuc.edu> Author: kremenek Date: Mon Nov 3 18:21:52 2008 New Revision: 58661 URL: http://llvm.org/viewvc/llvm-project?rev=58661&view=rev Log: Removing checker-122. Removed: llvm/tags/checker/checker-122/ From kremenek at apple.com Mon Nov 3 18:22:35 2008 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 04 Nov 2008 00:22:35 -0000 Subject: [llvm-commits] [llvm] r58664 - /llvm/tags/checker/checker-122/ Message-ID: <200811040022.mA40MZMv005993@zion.cs.uiuc.edu> Author: kremenek Date: Mon Nov 3 18:22:34 2008 New Revision: 58664 URL: http://llvm.org/viewvc/llvm-project?rev=58664&view=rev Log: Tagging checker-122. Added: llvm/tags/checker/checker-122/ - copied from r58663, llvm/trunk/ From kremenek at apple.com Mon Nov 3 18:37:34 2008 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 04 Nov 2008 00:37:34 -0000 Subject: [llvm-commits] [llvm] r58667 - /llvm/tags/checker/checker-122/ Message-ID: <200811040037.mA40bYS9006533@zion.cs.uiuc.edu> Author: kremenek Date: Mon Nov 3 18:37:33 2008 New Revision: 58667 URL: http://llvm.org/viewvc/llvm-project?rev=58667&view=rev Log: Removing checker-122. Removed: llvm/tags/checker/checker-122/ From kremenek at apple.com Mon Nov 3 18:38:23 2008 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 04 Nov 2008 00:38:23 -0000 Subject: [llvm-commits] [llvm] r58669 - /llvm/tags/checker/checker-122/ Message-ID: <200811040038.mA40cNnI006608@zion.cs.uiuc.edu> Author: kremenek Date: Mon Nov 3 18:38:23 2008 New Revision: 58669 URL: http://llvm.org/viewvc/llvm-project?rev=58669&view=rev Log: Tagging checker-122. Added: llvm/tags/checker/checker-122/ - copied from r58668, llvm/trunk/ From evan.cheng at apple.com Mon Nov 3 18:50:32 2008 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Nov 2008 00:50:32 -0000 Subject: [llvm-commits] [llvm] r58671 - in /llvm/trunk/lib/Target/ARM: ARMCodeEmitter.cpp ARMConstantPoolValue.cpp ARMJITInfo.cpp ARMJITInfo.h ARMRelocations.h Message-ID: <200811040050.mA40oX7g007252@zion.cs.uiuc.edu> Author: evancheng Date: Mon Nov 3 18:50:32 2008 New Revision: 58671 URL: http://llvm.org/viewvc/llvm-project?rev=58671&view=rev Log: Handle ARM machine constantpool entries. Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.cpp llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp llvm/trunk/lib/Target/ARM/ARMJITInfo.h llvm/trunk/lib/Target/ARM/ARMRelocations.h Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58671&r1=58670&r2=58671&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Mon Nov 3 18:50:32 2008 @@ -158,7 +158,7 @@ TD = ((ARMTargetMachine&)MF.getTarget()).getTargetData(); JTI = ((ARMTargetMachine&)MF.getTarget()).getJITInfo(); MCPEs = &MF.getConstantPool()->getConstants(); - JTI->ResizeConstPoolMap(MCPEs->size()); + JTI->Initialize(MCPEs); do { DOUT << "JITTing function '" << MF.getFunction()->getName() << "'\n"; @@ -257,7 +257,7 @@ } void ARMCodeEmitter::emitInstruction(const MachineInstr &MI) { - DOUT << "JIT: " << "0x" << MCE.getCurrentPCValue() << ":\t" << MI; + DOUT << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << MI; NumEmitted++; // Keep track of the # of mi's emitted if ((MI.getDesc().TSFlags & ARMII::FormMask) == ARMII::Pseudo) @@ -286,8 +286,10 @@ GlobalValue *GV = ACPV->getGV(); if (GV) { assert(!ACPV->isStub() && "Don't know how to deal this yet!"); - emitGlobalAddress(GV, ARM::reloc_arm_absolute, false); - } else { + MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), + ARM::reloc_arm_machine_cp_entry, + GV, CPIndex, false)); + } else { assert(!ACPV->isNonLazyPointer() && "Don't know how to deal this yet!"); emitExternalSymbolAddress(ACPV->getSymbol(), ARM::reloc_arm_absolute); } @@ -320,6 +322,12 @@ emitConstPoolInstruction(MI); break; case ARM::PICADD: { + // Remember of the address of the PC label for relocation later. + const MachineOperand &MO2 = MI.getOperand(2); + DOUT << "\t** LPC" << MO2.getImm() << " @ " + << (void*)MCE.getCurrentPCValue() << '\n'; + JTI->addPCLabelAddr(MO2.getImm(), MCE.getCurrentPCValue()); + // PICADD is just an add instruction that implicitly read pc. unsigned Binary = getBinaryCodeForInstr(MI); const TargetInstrDesc &TID = MI.getDesc(); Modified: llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.cpp?rev=58671&r1=58670&r2=58671&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.cpp Mon Nov 3 18:50:32 2008 @@ -93,10 +93,8 @@ else if (isStub()) O << "$stub"; if (Modifier) O << "(" << Modifier << ")"; if (PCAdjust != 0) { - O << "-(LPIC" << LabelId << "+" - << (unsigned)PCAdjust; - if (AddCurrentAddress) - O << "-."; + O << "-(LPC" << LabelId << "+" << (unsigned)PCAdjust; + if (AddCurrentAddress) O << "-."; O << ")"; } } Modified: llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp?rev=58671&r1=58670&r2=58671&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp Mon Nov 3 18:50:32 2008 @@ -13,6 +13,7 @@ #define DEBUG_TYPE "jit" #include "ARMJITInfo.h" +#include "ARMConstantPoolValue.h" #include "ARMRelocations.h" #include "ARMSubtarget.h" #include "llvm/Function.h" @@ -167,6 +168,25 @@ return MCE.finishFunctionStub(F); } +intptr_t ARMJITInfo::resolveRelocationAddr(MachineRelocation *MR) const { + ARM::RelocationType RT = (ARM::RelocationType)MR->getRelocationType(); + if (RT == ARM::reloc_arm_cp_entry) + return getConstantPoolEntryAddr(MR->getConstantPoolIndex()); + else if (RT == ARM::reloc_arm_machine_cp_entry) { + const MachineConstantPoolEntry &MCPE = (*MCPEs)[MR->getConstantVal()]; + assert(MCPE.isMachineConstantPoolEntry() && + "Expecting a machine constant pool entry!"); + ARMConstantPoolValue *ACPV = + static_cast(MCPE.Val.MachineCPVal); + assert((!ACPV->hasModifier() && !ACPV->mustAddCurrentAddress()) && + "Can't handle this machine constant pool entry yet!"); + intptr_t Addr = (intptr_t)(MR->getResultPointer()); + Addr -= getPCLabelAddr(ACPV->getLabelId()) + ACPV->getPCAdjustment(); + return Addr; + } + return (intptr_t)(MR->getResultPointer()); +} + /// relocate - Before the JIT can run a block of code that has been emitted, /// it must rewrite the code to contain the actual addresses of any /// referenced global symbols. @@ -174,12 +194,9 @@ unsigned NumRelocs, unsigned char* GOTBase) { for (unsigned i = 0; i != NumRelocs; ++i, ++MR) { void *RelocPos = (char*)Function + MR->getMachineCodeOffset(); - ARM::RelocationType RT = (ARM::RelocationType)MR->getRelocationType(); // If this is a constpool relocation, get the address of the // constpool_entry instruction. - intptr_t ResultPtr = (RT == ARM::reloc_arm_cp_entry) - ? getConstantPoolEntryAddr(MR->getConstantPoolIndex()) - : (intptr_t)MR->getResultPointer(); + intptr_t ResultPtr = resolveRelocationAddr(MR); switch ((ARM::RelocationType)MR->getRelocationType()) { case ARM::reloc_arm_cp_entry: case ARM::reloc_arm_relative: { @@ -190,18 +207,20 @@ if (ResultPtr >= 0) *((unsigned*)RelocPos) |= 1 << 23; else { - // otherwise, obtain the absolute value and set + // Otherwise, obtain the absolute value and set // bit U(23) to 0. ResultPtr *= -1; *((unsigned*)RelocPos) &= 0xFF7FFFFF; } - // set the immed value calculated + // Set the immed value calculated. *((unsigned*)RelocPos) |= (unsigned)ResultPtr; - // set register Rn to PC + // Set register Rn to PC. *((unsigned*)RelocPos) |= 0xF << 16; break; } + case ARM::reloc_arm_machine_cp_entry: case ARM::reloc_arm_absolute: { + // These addresses have already been resolved. *((unsigned*)RelocPos) += (unsigned)ResultPtr; break; } Modified: llvm/trunk/lib/Target/ARM/ARMJITInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMJITInfo.h?rev=58671&r1=58670&r2=58671&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMJITInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMJITInfo.h Mon Nov 3 18:50:32 2008 @@ -15,6 +15,8 @@ #define ARMJITINFO_H #include "llvm/Target/TargetJITInfo.h" +#include "llvm/CodeGen/MachineConstantPool.h" +#include "llvm/ADT/DenseMap.h" #include "llvm/ADT/SmallVector.h" namespace llvm { @@ -23,10 +25,17 @@ class ARMJITInfo : public TargetJITInfo { ARMTargetMachine &TM; + // MCPEs - List of the constant pool entries for the current machine + // function that's being processed. + const std::vector *MCPEs; + // ConstPoolId2AddrMap - A map from constant pool ids to the corresponding // CONSTPOOL_ENTRY addresses. SmallVector ConstPoolId2AddrMap; + // PCLabelMap - A map from PC labels to addresses. + DenseMap PCLabelMap; + public: explicit ARMJITInfo(ARMTargetMachine &tm) : TM(tm) { useGOT = false; } @@ -51,15 +60,16 @@ /// referenced global symbols. virtual void relocate(void *Function, MachineRelocation *MR, unsigned NumRelocs, unsigned char* GOTBase); - + /// hasCustomConstantPool - Allows a target to specify that constant /// pool address resolution is handled by the target. virtual bool hasCustomConstantPool() const { return true; } - /// ResizeConstPoolMap - Resize constant pool ids to CONSTPOOL_ENTRY - /// addresses map. - void ResizeConstPoolMap(unsigned Size) { - ConstPoolId2AddrMap.resize(Size); + /// Initialize - Initialize internal stage. Get the list of constant pool + /// Resize constant pool ids to CONSTPOOL_ENTRY addresses map. + void Initialize(const std::vector *mcpes) { + MCPEs = mcpes; + ConstPoolId2AddrMap.resize(MCPEs->size()); } /// getConstantPoolEntryAddr - The ARM target puts all constant @@ -77,6 +87,24 @@ assert(CPI < ConstPoolId2AddrMap.size()); ConstPoolId2AddrMap[CPI] = Addr; } + + /// getPCLabelAddr - Retrieve the address of the PC label of the specified id. + intptr_t getPCLabelAddr(unsigned Id) const { + DenseMap::const_iterator I = PCLabelMap.find(Id); + assert(I != PCLabelMap.end()); + return I->second; + } + + /// addPCLabelAddr - Remember the address of the specified PC label. + void addPCLabelAddr(unsigned Id, intptr_t Addr) { + PCLabelMap.insert(std::make_pair(Id, Addr)); + } + + private: + /// resolveRelocationAddr - Resolve the resulting address of the relocation + /// if it's not already solved. Constantpool entries must be resolved by + /// ARM target. + intptr_t resolveRelocationAddr(MachineRelocation *MR) const; }; } Modified: llvm/trunk/lib/Target/ARM/ARMRelocations.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRelocations.h?rev=58671&r1=58670&r2=58671&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMRelocations.h (original) +++ llvm/trunk/lib/Target/ARM/ARMRelocations.h Mon Nov 3 18:50:32 2008 @@ -31,6 +31,10 @@ // addresses are kept locally in a map. reloc_arm_cp_entry, + // reloc_arm_machine_cp_entry - Relocation of a ARM machine constantpool + // entry. + reloc_arm_machine_cp_entry, + // reloc_arm_branch - Branch address relocation. reloc_arm_branch }; From isanbard at gmail.com Mon Nov 3 20:10:23 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 04 Nov 2008 02:10:23 -0000 Subject: [llvm-commits] [llvm] r58673 - in /llvm/trunk: include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/StackProtector.cpp Message-ID: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu> Author: void Date: Mon Nov 3 20:10:20 2008 New Revision: 58673 URL: http://llvm.org/viewvc/llvm-project?rev=58673&view=rev Log: Initial checkin for stack protectors. Here's what it does: * The prologue is modified to read the __stack_chk_guard global and insert it onto the stack. * The epilogue is modified to read the stored guard from the stack and compare it to the original __stack_chk_guard value. If they differ, then the __stack_chk_fail() function is called. * The stack protector needs to be first on the stack (after the parameters) to catch any stack-smashing activities. Front-end support will follow after a round of beta testing. Added: llvm/trunk/lib/CodeGen/StackProtector.cpp Modified: llvm/trunk/include/llvm/CodeGen/Passes.h llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Modified: llvm/trunk/include/llvm/CodeGen/Passes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=58673&r1=58672&r2=58673&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/Passes.h (original) +++ llvm/trunk/include/llvm/CodeGen/Passes.h Mon Nov 3 20:10:20 2008 @@ -191,7 +191,10 @@ /// createStackSlotColoringPass - This pass performs stack slot coloring. FunctionPass *createStackSlotColoringPass(); - + + /// createStackProtectorPass - This pass adds stack protectors to functions. + FunctionPass *createStackProtectorPass(int Level); + } // End llvm namespace #endif Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=58673&r1=58672&r2=58673&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original) +++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Mon Nov 3 20:10:20 2008 @@ -60,6 +60,11 @@ EnableFastISelOption("fast-isel", cl::Hidden, cl::desc("Enable the experimental \"fast\" instruction selector")); +// Enable stack protectors. +static cl::opt +EnableStackProtector("enable-stack-protector", cl::init(0), + cl::desc("Use ProPolice as a stack protection method.")); + FileModel::Model LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM, raw_ostream &Out, @@ -165,6 +170,8 @@ if (!Fast) PM.add(createCodeGenPreparePass(getTargetLowering())); + PM.add(createStackProtectorPass(EnableStackProtector)); + if (PrintISelInput) PM.add(createPrintFunctionPass("\n\n" "*** Final LLVM Code input to ISel ***\n", Added: llvm/trunk/lib/CodeGen/StackProtector.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58673&view=auto ============================================================================== --- llvm/trunk/lib/CodeGen/StackProtector.cpp (added) +++ llvm/trunk/lib/CodeGen/StackProtector.cpp Mon Nov 3 20:10:20 2008 @@ -0,0 +1,228 @@ +//===-- StackProtector.cpp - Stack Protector Insertion --------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This pass inserts stack protectors into functions which need them. The stack +// protectors this uses are the type that ProPolice used. A variable with a +// random value in it is stored onto the stack before the local variables are +// allocated. Upon exitting the block, the stored value is checked. If it's +// changed, then there was some sort of violation and the program aborts. +// +//===----------------------------------------------------------------------===// + +#define DEBUG_TYPE "stack-protector" +#include "llvm/CodeGen/Passes.h" +#include "llvm/Constants.h" +#include "llvm/DerivedTypes.h" +#include "llvm/Function.h" +#include "llvm/Instructions.h" +#include "llvm/Module.h" +#include "llvm/Pass.h" +#include "llvm/ADT/APInt.h" +#include "llvm/Support/CommandLine.h" +using namespace llvm; + +// Enable stack protectors. +static cl::opt +SSPBufferSize("ssp-buffer-size", cl::init(8), + cl::desc("The lower bound for a buffer to be considered for " + "stack smashing protection.")); + +namespace { + class VISIBILITY_HIDDEN StackProtector : public FunctionPass { + // Level == 0 -- Stack protectors are off. + // Level == 1 -- Stack protectors are on only for some functions. + // Level == 2 -- Stack protectors are on for all functions. + int Level; + + /// FailBB - Holds the basic block to jump to when the stack protector check + /// fails. + BasicBlock *FailBB; + + /// StackProtFrameSlot - The place on the stack that the stack protector + /// guard is kept. + AllocaInst *StackProtFrameSlot; + + /// StackGuardVar - The global variable for the stack guard. + GlobalVariable *StackGuardVar; + + Function *F; + Module *M; + + /// InsertStackProtectorPrologue - Insert code into the entry block that + /// stores the __stack_chk_guard variable onto the stack. + void InsertStackProtectorPrologue(); + + /// InsertStackProtectorEpilogue - Insert code before the return + /// instructions checking the stack value that was stored in the + /// prologue. If it isn't the same as the original value, then call a + /// "failure" function. + void InsertStackProtectorEpilogue(); + + /// CreateFailBB - Create a basic block to jump to when the stack protector + /// check fails. + void CreateFailBB(); + + /// RequiresStackProtector - Check whether or not this function needs a + /// stack protector based upon the stack protector level. + bool RequiresStackProtector(); + public: + static char ID; // Pass identification, replacement for typeid. + StackProtector(int lvl = 0) : FunctionPass(&ID), Level(lvl), FailBB(0) {} + + virtual bool runOnFunction(Function &Fn); + }; +} // end anonymous namespace + +char StackProtector::ID = 0; +static RegisterPass +X("stack-protector", "Insert stack protectors"); + +FunctionPass *llvm::createStackProtectorPass(int lvl) { + return new StackProtector(lvl); +} + +bool StackProtector::runOnFunction(Function &Fn) { + F = &Fn; + M = F->getParent(); + + if (!RequiresStackProtector()) return false; + + InsertStackProtectorPrologue(); + InsertStackProtectorEpilogue(); + + // Cleanup. + FailBB = 0; + StackProtFrameSlot = 0; + StackGuardVar = 0; + return true; +} + +/// InsertStackProtectorPrologue - Insert code into the entry block that stores +/// the __stack_chk_guard variable onto the stack. +void StackProtector::InsertStackProtectorPrologue() { + BasicBlock &Entry = F->getEntryBlock(); + Instruction &InsertPt = Entry.front(); + + const char *StackGuardStr = "__stack_chk_guard"; + StackGuardVar = M->getNamedGlobal(StackGuardStr); + + if (!StackGuardVar) + StackGuardVar = new GlobalVariable(PointerType::getUnqual(Type::Int8Ty), + false, GlobalValue::ExternalLinkage, + 0, StackGuardStr, M); + + StackProtFrameSlot = new AllocaInst(PointerType::getUnqual(Type::Int8Ty), + "StackProt_Frame", &InsertPt); + LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", true, &InsertPt); + new StoreInst(LI, StackProtFrameSlot, true, &InsertPt); +} + +/// InsertStackProtectorEpilogue - Insert code before the return instructions +/// checking the stack value that was stored in the prologue. If it isn't the +/// same as the original value, then call a "failure" function. +void StackProtector::InsertStackProtectorEpilogue() { + // Create the basic block to jump to when the guard check fails. + CreateFailBB(); + + Function::iterator I = F->begin(), E = F->end(); + std::vector ReturnBBs; + ReturnBBs.reserve(F->size()); + + for (; I != E; ++I) + if (isa((*I).getTerminator())) + ReturnBBs.push_back(I); + + if (ReturnBBs.empty()) return; // Odd, but could happen. . . + + // Loop through the basic blocks that have return instructions. Convert this: + // + // return: + // ... + // ret ... + // + // into this: + // + // return: + // ... + // %1 = load __stack_chk_guard + // %2 = load + // %3 = cmp i1 %1, %2 + // br i1 %3, label %SPRet, label %CallStackCheckFailBlk + // + // SPRet: + // ret ... + // + // CallStackCheckFailBlk: + // call void @__stack_chk_fail() + // unreachable + // + for (std::vector::iterator + II = ReturnBBs.begin(), IE = ReturnBBs.end(); II != IE; ++II) { + BasicBlock *BB = *II; + ReturnInst *RI = cast(BB->getTerminator()); + Function::iterator InsPt = BB; ++InsPt; // Insertion point for new BB. + + BasicBlock *NewBB = BasicBlock::Create("SPRet", F, InsPt); + + // Move the return instruction into the new basic block. + RI->removeFromParent(); + NewBB->getInstList().insert(NewBB->begin(), RI); + + LoadInst *LI2 = new LoadInst(StackGuardVar, "", false, BB); + LoadInst *LI1 = new LoadInst(StackProtFrameSlot, "", true, BB); + ICmpInst *Cmp = new ICmpInst(CmpInst::ICMP_EQ, LI1, LI2, "", BB); + BranchInst::Create(NewBB, FailBB, Cmp, BB); + } +} + +/// CreateFailBB - Create a basic block to jump to when the stack protector +/// check fails. +void StackProtector::CreateFailBB() { + assert(!FailBB && "Failure basic block already created?!"); + FailBB = BasicBlock::Create("CallStackCheckFailBlk", F); + std::vector Params; + Constant *StackChkFail = + M->getOrInsertFunction("__stack_chk_fail", + FunctionType::get(Type::VoidTy, Params, false)); + CallInst::Create(StackChkFail, "", FailBB); + new UnreachableInst(FailBB); +} + +/// RequiresStackProtector - Check whether or not this function needs a stack +/// protector based upon the stack protector level. +bool StackProtector::RequiresStackProtector() { + switch (Level) { + default: return false; + case 2: return true; + case 1: { + // If the size of the local variables allocated on the stack is greater than + // SSPBufferSize, then we require a stack protector. + uint64_t StackSize = 0; + + for (Function::iterator I = F->begin(), E = F->end(); I != E; ++I) { + BasicBlock *BB = I; + + for (BasicBlock::iterator + II = BB->begin(), IE = BB->end(); II != IE; ++II) + if (AllocaInst *AI = dyn_cast(II)) + if (ConstantInt *CI = dyn_cast(AI->getArraySize())) { + const APInt &Size = CI->getValue(); + StackSize += Size.getZExtValue() * 8; + } + } + + if (SSPBufferSize <= StackSize) + return true; + + return false; + } + } +} + +// [EOF] StackProtector.cpp From isanbard at gmail.com Mon Nov 3 20:13:26 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 04 Nov 2008 02:13:26 -0000 Subject: [llvm-commits] [test-suite] r58674 - /test-suite/trunk/Makefile.programs Message-ID: <200811040213.mA42DQcW009761@zion.cs.uiuc.edu> Author: void Date: Mon Nov 3 20:13:25 2008 New Revision: 58674 URL: http://llvm.org/viewvc/llvm-project?rev=58674&view=rev Log: Test stack protectors. Modified: test-suite/trunk/Makefile.programs Modified: test-suite/trunk/Makefile.programs URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=58674&r1=58673&r2=58674&view=diff ============================================================================== --- test-suite/trunk/Makefile.programs (original) +++ test-suite/trunk/Makefile.programs Mon Nov 3 20:13:25 2008 @@ -231,7 +231,8 @@ LLCBETAOPTION := -sched=simple endif ifeq ($(ARCH),x86) -LLCBETAOPTION := -fast-isel +LLCBETAOPTION := -enable-stack-protector=2 +#-fast-isel #-aggressive-remat #-machine-licm #-new-spilling-heuristic From isanbard at gmail.com Mon Nov 3 20:15:23 2008 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 04 Nov 2008 02:15:23 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r58675 - in /llvm-gcc-4.2/trunk/gcc: llvm-backend.cpp opts.c Message-ID: <200811040215.mA42FNrP009833@zion.cs.uiuc.edu> Author: void Date: Mon Nov 3 20:15:23 2008 New Revision: 58675 URL: http://llvm.org/viewvc/llvm-project?rev=58675&view=rev Log: Add the "enable-stack-protector" flag to the backend calling stuff. Don't change the default in common.opt for the flag_stack_protect just yet! Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp llvm-gcc-4.2/trunk/gcc/opts.c Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=58675&r1=58674&r2=58675&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Mon Nov 3 20:15:23 2008 @@ -70,6 +70,7 @@ #include "tree-inline.h" #include "langhooks.h" #include "cgraph.h" +#include "params.h" } // Non-zero if bytecode from PCH is successfully read. @@ -165,6 +166,13 @@ ArgStrings.push_back(Arg); } + if (flag_stack_protect > 0) { + std::string Arg("--enable-stack-protector=" + utostr(flag_stack_protect)); + ArgStrings.push_back(Arg); + Arg = "--ssp-buffer-size=" + utostr(PARAM_VALUE(PARAM_SSP_BUFFER_SIZE)); + ArgStrings.push_back(Arg); + } + if (llvm_optns) { std::string Opts = llvm_optns; for (std::string Opt = getToken(Opts); !Opt.empty(); Opt = getToken(Opts)) Modified: llvm-gcc-4.2/trunk/gcc/opts.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/opts.c?rev=58675&r1=58674&r2=58675&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/opts.c (original) +++ llvm-gcc-4.2/trunk/gcc/opts.c Mon Nov 3 20:15:23 2008 @@ -206,13 +206,6 @@ opt = argv[0]; - /* LLVM LOCAL begin stack protector */ -#ifdef ENABLE_LLVM - if (strncmp(opt, "-fstack-protector", 17) == 0) - error ("-fstack-protector is not supported."); -#endif - /* LLVM LOCAL end stack protector */ - opt_index = find_opt (opt + 1, lang_mask | CL_COMMON | CL_TARGET); if (opt_index == cl_options_count && (opt[1] == 'W' || opt[1] == 'f' || opt[1] == 'm') From ofv at wanadoo.es Mon Nov 3 21:24:09 2008 From: ofv at wanadoo.es (Oscar Fuentes) Date: Tue, 04 Nov 2008 03:24:09 -0000 Subject: [llvm-commits] [llvm] r58676 - /llvm/trunk/lib/CodeGen/CMakeLists.txt Message-ID: <200811040324.mA43OBLG011992@zion.cs.uiuc.edu> Author: ofv Date: Mon Nov 3 21:24:04 2008 New Revision: 58676 URL: http://llvm.org/viewvc/llvm-project?rev=58676&view=rev Log: CMake: Updated list of source files. Modified: llvm/trunk/lib/CodeGen/CMakeLists.txt Modified: llvm/trunk/lib/CodeGen/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CMakeLists.txt?rev=58676&r1=58675&r2=58676&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/CMakeLists.txt (original) +++ llvm/trunk/lib/CodeGen/CMakeLists.txt Mon Nov 3 21:24:04 2008 @@ -42,6 +42,7 @@ RegisterScavenging.cpp ShadowStackGC.cpp SimpleRegisterCoalescing.cpp + StackProtector.cpp StackSlotColoring.cpp StrongPHIElimination.cpp TargetInstrInfoImpl.cpp From ofv at wanadoo.es Mon Nov 3 21:27:28 2008 From: ofv at wanadoo.es (Oscar Fuentes) Date: Tue, 04 Nov 2008 03:27:28 -0000 Subject: [llvm-commits] [llvm] r58677 - in /llvm/trunk: CMakeLists.txt cmake/modules/AddPartiallyLinkedObject.cmake Message-ID: <200811040327.mA43RTlB012105@zion.cs.uiuc.edu> Author: ofv Date: Mon Nov 3 21:27:24 2008 New Revision: 58677 URL: http://llvm.org/viewvc/llvm-project?rev=58677&view=rev Log: CMake: Support for building 32 bit mode libs and binaries on Linux/x86-64. Modified: llvm/trunk/CMakeLists.txt llvm/trunk/cmake/modules/AddPartiallyLinkedObject.cmake Modified: llvm/trunk/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CMakeLists.txt?rev=58677&r1=58676&r2=58677&view=diff ============================================================================== --- llvm/trunk/CMakeLists.txt (original) +++ llvm/trunk/CMakeLists.txt Mon Nov 3 21:27:24 2008 @@ -73,6 +73,21 @@ add_definitions( -D__STDC_LIMIT_MACROS ) add_definitions( -D__STDC_CONSTANT_MACROS ) +set(LLVM_PLO_FLAGS "" CACHE + STRING "Flags for creating partially linked objects.") + +if( CMAKE_SIZEOF_VOID_P EQUAL 8 AND NOT WIN32 ) + # TODO: support other platforms and toolchains. + option(BUILD_32_BITS "Build 32 bits executables and libraries." OFF) + if( BUILD_32_BITS ) + message(STATUS "Building 32 bits executables and libraries.") + add_definitions( -m32 ) + set( CMAKE_EXE_LINKER_FLAGS "-m32 ${CMAKE_EXE_LINKER_FLAGS}" ) + set( CMAKE_LINK_LIBRARY_FLAG "-m32 ${CMAKE_LINK_LIBRARY_FLAG}" ) + set( LLVM_PLO_FLAGS -melf_i386 ${LLVM_PLO_FLAGS} ) + endif( BUILD_32_BITS ) +endif( CMAKE_SIZEOF_VOID_P EQUAL 8 AND NOT WIN32 ) + if( MSVC ) add_definitions( -D_CRT_SECURE_NO_DEPRECATE -D_CRT_SECURE_NO_WARNINGS ) add_definitions( -D_SCL_SECURE_NO_WARNINGS -DCRT_NONSTDC_NO_WARNINGS ) Modified: llvm/trunk/cmake/modules/AddPartiallyLinkedObject.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/AddPartiallyLinkedObject.cmake?rev=58677&r1=58676&r2=58677&view=diff ============================================================================== --- llvm/trunk/cmake/modules/AddPartiallyLinkedObject.cmake (original) +++ llvm/trunk/cmake/modules/AddPartiallyLinkedObject.cmake Mon Nov 3 21:27:24 2008 @@ -24,7 +24,7 @@ DEPENDS ${lib} WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/temp_lib COMMAND ar x ${CMAKE_STATIC_LIBRARY_PREFIX}${lib}${CMAKE_STATIC_LIBRARY_SUFFIX} - COMMAND ld -r *${CMAKE_CXX_OUTPUT_EXTENSION} -o ${pll} + COMMAND ld "${LLVM_PLO_FLAGS}" -r "*${CMAKE_CXX_OUTPUT_EXTENSION}" -o ${pll} COMMAND rm -f *${CMAKE_CXX_OUTPUT_EXTENSION} ) target_name_of_partially_linked_object(${lib} tnplo) From ofv at wanadoo.es Mon Nov 3 21:28:37 2008 From: ofv at wanadoo.es (Oscar Fuentes) Date: Tue, 04 Nov 2008 03:28:37 -0000 Subject: [llvm-commits] [llvm] r58678 - /llvm/trunk/tools/llc/CMakeLists.txt Message-ID: <200811040328.mA43Sbu1012160@zion.cs.uiuc.edu> Author: ofv Date: Mon Nov 3 21:28:37 2008 New Revision: 58678 URL: http://llvm.org/viewvc/llvm-project?rev=58678&view=rev Log: CMakeLists: removed asmprinter component from tools/llc/CMakeLists.txt. Modified: llvm/trunk/tools/llc/CMakeLists.txt Modified: llvm/trunk/tools/llc/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llc/CMakeLists.txt?rev=58678&r1=58677&r2=58678&view=diff ============================================================================== --- llvm/trunk/tools/llc/CMakeLists.txt (original) +++ llvm/trunk/tools/llc/CMakeLists.txt Mon Nov 3 21:28:37 2008 @@ -1,4 +1,4 @@ -set(LLVM_LINK_COMPONENTS ${LLVM_TARGETS_TO_BUILD} bitreader asmprinter) +set(LLVM_LINK_COMPONENTS ${LLVM_TARGETS_TO_BUILD} bitreader) add_llvm_tool(llc llc.cpp From alenhar2 at cs.uiuc.edu Mon Nov 3 21:45:07 2008 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Mon, 3 Nov 2008 21:45:07 -0600 Subject: [llvm-commits] CVS: llvm-www/pubs/2007-06-10-PLDI-DSA-Presentation.pdf 2007-06-10-PLDI-DSA.html Message-ID: <200811040345.mA43j7c9028792@gravity.cs.uiuc.edu> Changes in directory llvm-www/pubs: 2007-06-10-PLDI-DSA-Presentation.pdf added (r1.1) 2007-06-10-PLDI-DSA.html updated: 1.2 -> 1.3 --- Log message: DSA slides --- Diffs of the changes: (+5 -2) 2007-06-10-PLDI-DSA-Presentation.pdf | 0 2007-06-10-PLDI-DSA.html | 7 +++++-- 2 files changed, 5 insertions(+), 2 deletions(-) Index: llvm-www/pubs/2007-06-10-PLDI-DSA-Presentation.pdf Index: llvm-www/pubs/2007-06-10-PLDI-DSA.html diff -u llvm-www/pubs/2007-06-10-PLDI-DSA.html:1.2 llvm-www/pubs/2007-06-10-PLDI-DSA.html:1.3 --- llvm-www/pubs/2007-06-10-PLDI-DSA.html:1.2 Thu Mar 29 16:49:41 2007 +++ llvm-www/pubs/2007-06-10-PLDI-DSA.html Mon Nov 3 21:44:20 2008 @@ -14,7 +14,7 @@
Chris Lattner, - Andrew Lenharth, and + Andrew Lenharth, and Vikram Adve
@@ -67,7 +67,10 @@

Slides:

-

not yet

+

BibTeX Entry:






From isanbard at gmail.com  Mon Nov  3 21:52:29 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 04 Nov 2008 03:52:29 -0000
Subject: [llvm-commits] [test-suite] r58679 -
	/test-suite/trunk/Makefile.programs
Message-ID: <200811040352.mA43qUgj012909@zion.cs.uiuc.edu>

Author: void
Date: Mon Nov  3 21:52:29 2008
New Revision: 58679

URL: http://llvm.org/viewvc/llvm-project?rev=58679&view=rev
Log:
Stack protectors aren't Darwin-specific. However, other platforms need to add
the -lssp library or they'll fail.

Modified:
    test-suite/trunk/Makefile.programs

Modified: test-suite/trunk/Makefile.programs
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=58679&r1=58678&r2=58679&view=diff

==============================================================================
--- test-suite/trunk/Makefile.programs (original)
+++ test-suite/trunk/Makefile.programs Mon Nov  3 21:52:29 2008
@@ -231,7 +231,11 @@
 LLCBETAOPTION := -sched=simple 
 endif
 ifeq ($(ARCH),x86)
+ifeq ($(OS),Darwin)
 LLCBETAOPTION := -enable-stack-protector=2
+else
+LLCBETAOPTION := -fast-isel
+endif
 #-fast-isel
 #-aggressive-remat
 #-machine-licm




From evan.cheng at apple.com  Tue Nov  4 00:09:39 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 04 Nov 2008 06:09:39 -0000
Subject: [llvm-commits] [llvm] r58682 -
	/llvm/trunk/lib/System/Disassembler.cpp
Message-ID: <200811040609.mA469eon017246@zion.cs.uiuc.edu>

Author: evancheng
Date: Tue Nov  4 00:09:38 2008
New Revision: 58682

URL: http://llvm.org/viewvc/llvm-project?rev=58682&view=rev
Log:
hasDisassembler should return false if disassembler isn't available.

Modified:
    llvm/trunk/lib/System/Disassembler.cpp

Modified: llvm/trunk/lib/System/Disassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Disassembler.cpp?rev=58682&r1=58681&r2=58682&view=diff

==============================================================================
--- llvm/trunk/lib/System/Disassembler.cpp (original)
+++ llvm/trunk/lib/System/Disassembler.cpp Tue Nov  4 00:09:38 2008
@@ -30,10 +30,14 @@
 {
 #if defined (__i386__) || defined (__amd64__) || defined (__x86_64__)
   // We have option to enable udis86 library.
+# if USE_UDIS86
   return true;
 #else
   return false;
 #endif
+#else
+  return false;
+#endif
 }
 
 std::string llvm::sys::disassembleBuffer(uint8_t* start, size_t length,




From evan.cheng at apple.com  Tue Nov  4 00:10:07 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 04 Nov 2008 06:10:07 -0000
Subject: [llvm-commits] [llvm] r58683 -
	/llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp
Message-ID: <200811040610.mA46A7xg017280@zion.cs.uiuc.edu>

Author: evancheng
Date: Tue Nov  4 00:10:06 2008
New Revision: 58683

URL: http://llvm.org/viewvc/llvm-project?rev=58683&view=rev
Log:
Stylistic change.

Modified:
    llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp?rev=58683&r1=58682&r2=58683&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp Tue Nov  4 00:10:06 2008
@@ -111,7 +111,7 @@
   // stub with:
   //   ldr pc, [pc,#-4]
   //   
-  bool ok = sys::Memory::setRangeWritable ((void*)StubAddr, 8);
+  bool ok = sys::Memory::setRangeWritable((void*)StubAddr, 8);
   if (!ok)
     {
       cerr << "ERROR: Unable to mark stub writable\n";
@@ -119,7 +119,7 @@
     }
   *(intptr_t *)StubAddr = 0xe51ff004;
   *(intptr_t *)(StubAddr+4) = NewVal;
-  ok = sys::Memory::setRangeExecutable ((void*)StubAddr, 8);
+  ok = sys::Memory::setRangeExecutable((void*)StubAddr, 8);
   if (!ok)
     {
       cerr << "ERROR: Unable to mark stub executable\n";




From evan.cheng at apple.com  Tue Nov  4 00:10:31 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 04 Nov 2008 06:10:31 -0000
Subject: [llvm-commits] [llvm] r58684 -
	/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp
Message-ID: <200811040610.mA46AWQs017305@zion.cs.uiuc.edu>

Author: evancheng
Date: Tue Nov  4 00:10:31 2008
New Revision: 58684

URL: http://llvm.org/viewvc/llvm-project?rev=58684&view=rev
Log:
80 col violation.

Modified:
    llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp

Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp?rev=58684&r1=58683&r2=58684&view=diff

==============================================================================
--- llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Tue Nov  4 00:10:31 2008
@@ -715,8 +715,8 @@
 /// is the address of the memory at which to store Val, cast to GenericValue *.
 /// It is not a pointer to a GenericValue containing the address at which to
 /// store Val.
-void ExecutionEngine::StoreValueToMemory(const GenericValue &Val, GenericValue *Ptr,
-                                         const Type *Ty) {
+void ExecutionEngine::StoreValueToMemory(const GenericValue &Val,
+                                         GenericValue *Ptr, const Type *Ty) {
   const unsigned StoreBytes = getTargetData()->getTypeStoreSize(Ty);
 
   switch (Ty->getTypeID()) {




From isanbard at gmail.com  Tue Nov  4 01:43:01 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 04 Nov 2008 07:43:01 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r58686 - /llvm-gcc-4.2/trunk/gcc/c.opt
Message-ID: <200811040743.mA47h2rL020110@zion.cs.uiuc.edu>

Author: void
Date: Tue Nov  4 01:42:59 2008
New Revision: 58686

URL: http://llvm.org/viewvc/llvm-project?rev=58686&view=rev
Log:
Enable for ObjC++

Modified:
    llvm-gcc-4.2/trunk/gcc/c.opt

Modified: llvm-gcc-4.2/trunk/gcc/c.opt
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/c.opt?rev=58686&r1=58685&r2=58686&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/c.opt (original)
+++ llvm-gcc-4.2/trunk/gcc/c.opt Tue Nov  4 01:42:59 2008
@@ -331,7 +331,7 @@
 
 ; APPLE LOCAL begin warn missing prototype 6261539
 Wmissing-prototypes
-C ObjC C++ Objc++ Var(warn_missing_prototypes)
+C ObjC C++ ObjC++ Var(warn_missing_prototypes)
 Warn about global functions without prototypes
 ; APPLE LOCAL end warn missing prototype 6261539
 




From s.othman at web.de  Mon Nov  3 16:45:06 2008
From: s.othman at web.de (Sascha Othman)
Date: Mon, 03 Nov 2008 23:45:06 +0100
Subject: [llvm-commits] Patch: improve protability of llvm-config
Message-ID: <490F7EF2.2020808@web.de>

llvm-config uses shell scripting instead of perl functions to determine
llvm's installation directories, which is not very portable. This patch
is an attempt to fix that by using perl's Cwd functions.
Please review twice and don't be too harsh with me since I'm not
especially experienced at this kind of thing.

Regards,
Sascha
-------------- next part --------------
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From nicholas at mxc.ca  Tue Nov  4 02:05:21 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Tue, 04 Nov 2008 08:05:21 -0000
Subject: [llvm-commits] [llvm] r58687 -
	/llvm/trunk/tools/llvm-config/llvm-config.in.in
Message-ID: <200811040805.mA485MH9020764@zion.cs.uiuc.edu>

Author: nicholas
Date: Tue Nov  4 02:05:21 2008
New Revision: 58687

URL: http://llvm.org/viewvc/llvm-project?rev=58687&view=rev
Log:
Don't "shell out" to resolve paths. Using pure perl makes llvm-config
friendlier to non-Unixes that happen to have perl. Patch from Sascha Othman!

Modified:
    llvm/trunk/tools/llvm-config/llvm-config.in.in

Modified: llvm/trunk/tools/llvm-config/llvm-config.in.in
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-config/llvm-config.in.in?rev=58687&r1=58686&r2=58687&view=diff

==============================================================================
--- llvm/trunk/tools/llvm-config/llvm-config.in.in (original)
+++ llvm/trunk/tools/llvm-config/llvm-config.in.in Tue Nov  4 02:05:21 2008
@@ -18,6 +18,7 @@
 use 5.006;
 use strict;
 use warnings;
+use Cwd;
 
 #---- begin autoconf values ----
 my $PACKAGE_NAME        = q{@PACKAGE_NAME@};
@@ -64,21 +65,13 @@
 # Convert the current executable name into its directory (e.g. ".").
 my ($RUN_DIR) = ($0 =~ /^(.*)\/.*$/);
 
-# Find the unix pwd program: we don't want to use the bash builtin, as it does
-# not look through symlinks etc.
-my $PWD = `which pwd`;
-chomp($PWD);
-$PWD = "pwd" if (!-e $PWD);
-
 # Turn the directory into an absolute directory on the file system, also pop up
 # from "bin" into the build or prefix dir.
-my $ABS_RUN_DIR = `cd $RUN_DIR/..; $PWD`;
-chomp($ABS_RUN_DIR);
+my $ABS_RUN_DIR = Cwd::realpath("$RUN_DIR/..");
 
 # Compute the absolute object directory build, e.g. "foo/llvm/Debug".
 my $ABS_OBJ_ROOT = "$LLVM_OBJ_ROOT/$LLVM_BUILDMODE";
-$ABS_OBJ_ROOT = `cd $ABS_OBJ_ROOT; $PWD` if (-d $ABS_OBJ_ROOT);
-chomp($ABS_OBJ_ROOT);
+$ABS_OBJ_ROOT = Cwd::realpath($ABS_OBJ_ROOT) if (-d $ABS_OBJ_ROOT);
 
 my $INCLUDEDIR = "$ABS_RUN_DIR/include";
 my $LIBDIR     = "$ABS_RUN_DIR/lib";
@@ -142,9 +135,9 @@
         } elsif ($arg eq "--build-mode") {
             $has_opt = 1; print "$LLVM_BUILDMODE\n";
         } elsif ($arg eq "--obj-root") {
-            $has_opt = 1; print `cd $LLVM_OBJ_ROOT/; $PWD`;
+            $has_opt = 1; print Cwd::realpath($LLVM_OBJ_ROOT), "\n";
         } elsif ($arg eq "--src-root") {
-            $has_opt = 1; print `cd $LLVM_SRC_ROOT/; $PWD`;
+            $has_opt = 1; print Cwd::realpath($LLVM_SRC_ROOT), "\n";
         } else {
             usage();
         }




From nicholas at mxc.ca  Tue Nov  4 02:05:23 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Tue, 04 Nov 2008 00:05:23 -0800
Subject: [llvm-commits] Patch: improve protability of llvm-config
In-Reply-To: <490F7EF2.2020808@web.de>
References: <490F7EF2.2020808@web.de>
Message-ID: <49100243.3000402@mxc.ca>

Sascha Othman wrote:
> llvm-config uses shell scripting instead of perl functions to determine
> llvm's installation directories, which is not very portable. This patch
> is an attempt to fix that by using perl's Cwd functions.
> Please review twice and don't be too harsh with me since I'm not
> especially experienced at this kind of thing.

Patch applied!

The only change I made was to add , "\n" to the print statements, 
otherwise llvm-config --obj-root wouldn't print a newline.

Nick

> Regards,
> Sascha
> 
> 
> ------------------------------------------------------------------------
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From evan.cheng at apple.com  Tue Nov  4 03:30:49 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 04 Nov 2008 09:30:49 -0000
Subject: [llvm-commits] [llvm] r58688 - in /llvm/trunk:
 include/llvm/Target/TargetJITInfo.h lib/ExecutionEngine/JIT/JIT.cpp
 lib/Target/ARM/ARMJITInfo.h
Message-ID: <200811040930.mA49UnXl000451@zion.cs.uiuc.edu>

Author: evancheng
Date: Tue Nov  4 03:30:48 2008
New Revision: 58688

URL: http://llvm.org/viewvc/llvm-project?rev=58688&view=rev
Log:
For some targets, it's not possible to place GVs in the same memory buffer as the MachineCodeEmitter allocated memory. Code and data has different read / write / execution privilege requirements.

This is a short term workaround. The current solution is for the JIT memory manager to manage code and data memory separately.

Modified:
    llvm/trunk/include/llvm/Target/TargetJITInfo.h
    llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp
    llvm/trunk/lib/Target/ARM/ARMJITInfo.h

Modified: llvm/trunk/include/llvm/Target/TargetJITInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetJITInfo.h?rev=58688&r1=58687&r2=58688&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetJITInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetJITInfo.h Tue Nov  4 03:30:48 2008
@@ -110,6 +110,11 @@
     /// hasCustomConstantPool - Allows a target to specify that constant
     /// pool address resolution is handled by the target.
     virtual bool hasCustomConstantPool() const { return false; }
+
+    /// allocateSeparateGVMemory - If true, globals should be placed in
+    /// separately allocated heap memory rather than in the same
+    /// code memory allocated by MachineCodeEmitter.
+    virtual bool allocateSeparateGVMemory() const { return false; }
   protected:
     bool useGOT;
   };

Modified: llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp?rev=58688&r1=58687&r2=58688&view=diff

==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp Tue Nov  4 03:30:48 2008
@@ -565,6 +565,16 @@
     if (GV->isThreadLocal()) {
       MutexGuard locked(lock);
       Ptr = TJI.allocateThreadLocalMemory(S);
+    } else if (TJI.allocateSeparateGVMemory()) {
+      if (A <= 8) {
+        Ptr = malloc(S);
+      } else {
+        // Allocate S+A bytes of memory, then use an aligned pointer within that
+        // space.
+        Ptr = malloc(S+A);
+        unsigned MisAligned = ((intptr_t)Ptr & (A-1));
+        Ptr = (char*)Ptr + (MisAligned ? (A-MisAligned) : 0);
+      }
     } else {
       Ptr = MCE->allocateSpace(S, A);
     }

Modified: llvm/trunk/lib/Target/ARM/ARMJITInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMJITInfo.h?rev=58688&r1=58687&r2=58688&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMJITInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMJITInfo.h Tue Nov  4 03:30:48 2008
@@ -65,6 +65,17 @@
     /// pool address resolution is handled by the target.
     virtual bool hasCustomConstantPool() const { return true; }
 
+    /// allocateSeparateGVMemory - If true, globals should be placed in
+    /// separately allocated heap memory rather than in the same
+    /// code memory allocated by MachineCodeEmitter.
+    virtual bool allocateSeparateGVMemory() const {
+#ifdef __APPLE__
+      return true;
+#else
+      return false;
+#endif
+    }
+
     /// Initialize - Initialize internal stage. Get the list of constant pool
     /// Resize constant pool ids to CONSTPOOL_ENTRY addresses map.
     void Initialize(const std::vector *mcpes) {




From duncan.sands at math.u-psud.fr  Tue Nov  4 03:38:35 2008
From: duncan.sands at math.u-psud.fr (Duncan Sands)
Date: Tue, 4 Nov 2008 10:38:35 +0100
Subject: [llvm-commits] [llvm] r58623 - in /llvm/trunk:
	include/llvm/CodeGen/ValueTypes.h lib/VMCore/ValueTypes.cpp
	test/CodeGen/X86/i2k.ll utils/TableGen/CMakeLists.txt
	utils/TableGen/TGValueTypes.cpp
In-Reply-To: <200811031756.mA3HuRvA017091@zion.cs.uiuc.edu>
References: <200811031756.mA3HuRvA017091@zion.cs.uiuc.edu>
Message-ID: <200811041038.36565.duncan.sands@math.u-psud.fr>

Hi Dan,

> Change how extended types are represented in MVTs. Instead of fiddling
> bits, use a union of a SimpleValueType enum and a regular Type*.

this is a wonderful improvement!

> there are no libcalls defined for very large integers so operations
> like multiply and divide aren't supported.

Here's a crazy idea.  I hear that people are working on "libllvm",
a reimplementation of libgcc.  Maybe instead the code generator
could be taught to generate library functions on the fly.  For
example, suppose a call to __udivsi3 is needed.  Then the code
generator creates the function __udivsi3 in the assembler, with
weak linkage.  Thanks to weak linkage there will be only one
copy no matter how many object files it turns up in, and there
is no need to link with libllvm.  Now imagine that you need a
similar library function to __udivsi3, but for i1024.  Then you
can have the code generators squirt out __udivsiXYZ!

> This also introduces a minimal tablgen Type library, capable of
> handling IntegerType and VectorType. This will allow parts of
> TableGen that don't depend on using SimpleValueType values to handle
> arbitrary integer and vector types.

Are there any such parts?  Or, rather, can such parts be changed
to only use SimpleValueType?

>      /// isSimple - Test if the given MVT is simple (as opposed to being
>      /// extended).
>      bool isSimple() const {
> -      return V <= SimpleTypeMask;
> +      return V <= LastSimpleValueType;
>      }

I see that you are confident that heap allocations never occur in the
first 256 bytes of memory! :)

> +unsigned MVT::getExtendedSizeInBits() const {
> +  assert(isExtended() && "Type is not extended!");
> +  if (const IntegerType *ITy = dyn_cast(LLVMTy))
> +    return ITy->getBitWidth();
> +  if (const VectorType *VTy = dyn_cast(LLVMTy))
> +    return VTy->getBitWidth();
> +  assert(false && "Unrecognized extended type!");

You probably want a return statement here so as not to get
compiler warnings when assertions are turned off.
> +}

Finally, I notice that you didn't touch getTypeForMVT.  For extended
value types that function could be simplified to return LLVMTy.

Ciao,

Duncan.


From sabre at nondot.org  Tue Nov  4 04:24:36 2008
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 4 Nov 2008 04:24:36 -0600
Subject: [llvm-commits] CVS: llvm-www/pubs/2008-10-04-ACAT-LLVM-Intro.html
	2008-10-04-ACAT-LLVM-Intro.pdf
Message-ID: <200811041024.mA4AOaEw003084@zion.cs.uiuc.edu>



Changes in directory llvm-www/pubs:

2008-10-04-ACAT-LLVM-Intro.html added (r1.1)
2008-10-04-ACAT-LLVM-Intro.pdf added (r1.1)
---
Log message:

add a new talk


---
Diffs of the changes:  (+41 -0)

 2008-10-04-ACAT-LLVM-Intro.html |   41 ++++++++++++++++++++++++++++++++++++++++
 2008-10-04-ACAT-LLVM-Intro.pdf  |    0 
 2 files changed, 41 insertions(+)


Index: llvm-www/pubs/2008-10-04-ACAT-LLVM-Intro.html
diff -c /dev/null llvm-www/pubs/2008-10-04-ACAT-LLVM-Intro.html:1.1
*** /dev/null	Tue Nov  4 04:23:17 2008
--- llvm-www/pubs/2008-10-04-ACAT-LLVM-Intro.html	Tue Nov  4 04:23:06 2008
***************
*** 0 ****
--- 1,41 ----
+ 
+ 
+ 
+   
+   
+   Introduction to the LLVM Compiler System
+ 
+ 
+ 
+ 

+   Introduction to the LLVM Compiler System
+ 

+ 

+   Chris Lattner
+ 

+ 
+ 
Abstract:

+ 

+ 

+ This talk gives a gentle introduction to LLVM, talking about the benefits of
+ using llvm-gcc and including updated compile-time and run-time performance
+ numbers.  This talk is high level and particularly suited
+ for those without a deep compiler hacker background.
+ 

+ 
+ 

+ 
+ 
Published:

+ 

+   "Introduction to the LLVM Compiler System", Chris Lattner,

+   ACAT 2008: Advanced Computing and Analysis Techniques in Physics Research, Erice, Sicily, Italy, Nov 2008.

+ 

+ 
+ 
Download Presentation:

+ 
+ 
+ 
+ 
+ 


Index: llvm-www/pubs/2008-10-04-ACAT-LLVM-Intro.pdf





From sabre at nondot.org  Tue Nov  4 04:25:57 2008
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 4 Nov 2008 04:25:57 -0600
Subject: [llvm-commits] CVS: llvm-www/pubs/index.html
Message-ID: <200811041025.mA4APvnm003221@zion.cs.uiuc.edu>



Changes in directory llvm-www/pubs:

index.html updated: 1.83 -> 1.84
---
Log message:

add talk


---
Diffs of the changes:  (+4 -0)

 index.html |    4 ++++
 1 files changed, 4 insertions(+)


Index: llvm-www/pubs/index.html
diff -u llvm-www/pubs/index.html:1.83 llvm-www/pubs/index.html:1.84
--- llvm-www/pubs/index.html:1.83	Thu Oct  9 13:18:40 2008
+++ llvm-www/pubs/index.html	Tue Nov  4 04:25:34 2008
@@ -3,6 +3,10 @@
 
 
    
 
+
  1. "Introduction to the LLVM Compiler System"
    
+ Chris Lattner
    
+  Plenary Talk, ACAT 2008: Advanced Computing and Analysis Techniques in Physics Research, Erice, Sicily, Italy, November 2008.
    2. 
+
 
 
  2. "KLEE: Unassisted and Automatic 
 Generation of High-Coverage Tests for Complex Systems Programs"
    





From clattner at apple.com  Tue Nov  4 04:54:18 2008
From: clattner at apple.com (Chris Lattner)
Date: Tue, 4 Nov 2008 02:54:18 -0800
Subject: [llvm-commits] [llvm] r58631 - in /llvm/trunk:
	lib/Transforms/Scalar/LoopUnswitch.cpp
	test/Transforms/LoopUnswitch/2008-11-03-Invariant.ll
In-Reply-To: <200811031938.mA3Jc768023118@zion.cs.uiuc.edu>
References: <200811031938.mA3Jc768023118@zion.cs.uiuc.edu>
Message-ID: <13D2BF23-2BF9-42C0-A8C1-67C90F3AC2B8@apple.com>


On Nov 3, 2008, at 11:38 AM, Devang Patel wrote:

> Author: dpatel
> Date: Mon Nov  3 13:38:07 2008
> New Revision: 58631
>
> URL: http://llvm.org/viewvc/llvm-project?rev=58631&view=rev
> Log:
> Ignore conditions that are outside the loop.

Why can't this be unswitched?  Is this a missed optimization now?

-Chris



From clattner at apple.com  Tue Nov  4 04:58:23 2008
From: clattner at apple.com (Chris Lattner)
Date: Tue, 4 Nov 2008 02:58:23 -0800
Subject: [llvm-commits] [llvm] r58623 - in /llvm/trunk:
	include/llvm/CodeGen/ValueTypes.h lib/VMCore/ValueTypes.cpp
	test/CodeGen/X86/i2k.ll utils/TableGen/CMakeLists.txt
	utils/TableGen/TGValueTypes.cpp
In-Reply-To: <200811041038.36565.duncan.sands@math.u-psud.fr>
References: <200811031756.mA3HuRvA017091@zion.cs.uiuc.edu>
	<200811041038.36565.duncan.sands@math.u-psud.fr>
Message-ID: <822CF83A-249C-4FB3-8D72-750E76E20D87@apple.com>

On Nov 4, 2008, at 1:38 AM, Duncan Sands wrote:
> Hi Dan,
>> Change how extended types are represented in MVTs. Instead of  
>> fiddling
>> bits, use a union of a SimpleValueType enum and a regular Type*.
>
> this is a wonderful improvement!

I agree!

>> there are no libcalls defined for very large integers so operations
>> like multiply and divide aren't supported.
>
> Here's a crazy idea.  I hear that people are working on "libllvm",
> a reimplementation of libgcc.  Maybe instead the code generator
> could be taught to generate library functions on the fly.  For
> example, suppose a call to __udivsi3 is needed.  Then the code
> generator creates the function __udivsi3 in the assembler, with
> weak linkage.  Thanks to weak linkage there will be only one
> copy no matter how many object files it turns up in, and there
> is no need to link with libllvm.  Now imagine that you need a
> similar library function to __udivsi3, but for i1024.  Then you
> can have the code generators squirt out __udivsiXYZ!

I think it would be better to make an arbitrary precision version of  
udiv that takes a pointer to the integer in memory, and the size in  
bits as an argument.

-Chris


From clattner at apple.com  Tue Nov  4 05:19:33 2008
From: clattner at apple.com (Chris Lattner)
Date: Tue, 4 Nov 2008 03:19:33 -0800
Subject: [llvm-commits] [llvm] r58505 - /llvm/trunk/lib/VMCore/Type.cpp
In-Reply-To: <1225536655.7995.2.camel@idc-lt-i00171.microchip.com>
References: <200810311026.m9VAQKSc028696@zion.cs.uiuc.edu>
	
	<1225536655.7995.2.camel@idc-lt-i00171.microchip.com>
Message-ID: <64763E6A-1EBC-4939-BEA7-856332B147C2@apple.com>

On Nov 1, 2008, at 3:50 AM, sanjiv gupta wrote:
>> I think this is the right way to go, but I don't want to get stuck
>> with half of the change in the tree but it not working 100%.
>>
>> -Chris
>>
> Agree. I will revert this back and make changes when everything is
> ready.

Thank you Sanjiv!  Sorry for the trouble, but I appreciate it,

-Chris


From nunoplopes at sapo.pt  Tue Nov  4 07:03:00 2008
From: nunoplopes at sapo.pt (Nuno Lopes)
Date: Tue, 04 Nov 2008 13:03:00 -0000
Subject: [llvm-commits] [llvm] r58690 -
	/llvm/trunk/lib/CodeGen/IfConversion.cpp
Message-ID: <200811041303.mA4D30Os008130@zion.cs.uiuc.edu>

Author: nlopes
Date: Tue Nov  4 07:02:59 2008
New Revision: 58690

URL: http://llvm.org/viewvc/llvm-project?rev=58690&view=rev
Log:
fix leakage of IfcvtTokens

Modified:
    llvm/trunk/lib/CodeGen/IfConversion.cpp

Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=58690&r1=58689&r2=58690&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/IfConversion.cpp (original)
+++ llvm/trunk/lib/CodeGen/IfConversion.cpp Tue Nov  4 07:02:59 2008
@@ -256,6 +256,10 @@
       Tokens.pop_back();
       BBInfo &BBI = Token->BBI;
       IfcvtKind Kind = Token->Kind;
+      unsigned NumDups = Token->NumDups;
+      unsigned NumDups2 = Token->NumDups;
+
+      delete Token;
 
       // If the block has been evicted out of the queue or it has already been
       // marked dead (due to it being predicated), then skip it.
@@ -323,7 +327,7 @@
         DOUT << "Ifcvt (Diamond): BB#" << BBI.BB->getNumber() << " (T:"
              << BBI.TrueBB->getNumber() << ",F:"
              << BBI.FalseBB->getNumber() << ") ";
-        RetVal = IfConvertDiamond(BBI, Kind, Token->NumDups, Token->NumDups2);
+        RetVal = IfConvertDiamond(BBI, Kind, NumDups, NumDups2);
         DOUT << (RetVal ? "succeeded!" : "failed!") << "\n";
         if (RetVal) NumDiamonds++;
         break;




From duncan.sands at math.u-psud.fr  Tue Nov  4 07:15:18 2008
From: duncan.sands at math.u-psud.fr (Duncan Sands)
Date: Tue, 4 Nov 2008 14:15:18 +0100
Subject: [llvm-commits] [llvm] r58623 - in /llvm/trunk:
	include/llvm/CodeGen/ValueTypes.h lib/VMCore/ValueTypes.cpp
	test/CodeGen/X86/i2k.ll utils/TableGen/CMakeLists.txt
	utils/TableGen/TGValueTypes.cpp
In-Reply-To: <822CF83A-249C-4FB3-8D72-750E76E20D87@apple.com>
References: <200811031756.mA3HuRvA017091@zion.cs.uiuc.edu>
	<200811041038.36565.duncan.sands@math.u-psud.fr>
	<822CF83A-249C-4FB3-8D72-750E76E20D87@apple.com>
Message-ID: <200811041415.18278.duncan.sands@math.u-psud.fr>

> > Here's a crazy idea.  I hear that people are working on "libllvm",
> > a reimplementation of libgcc.  Maybe instead the code generator
> > could be taught to generate library functions on the fly.  For
> > example, suppose a call to __udivsi3 is needed.  Then the code
> > generator creates the function __udivsi3 in the assembler, with
> > weak linkage.  Thanks to weak linkage there will be only one
> > copy no matter how many object files it turns up in, and there
> > is no need to link with libllvm.  Now imagine that you need a
> > similar library function to __udivsi3, but for i1024.  Then you
> > can have the code generators squirt out __udivsiXYZ!
> 
> I think it would be better to make an arbitrary precision version of  
> udiv that takes a pointer to the integer in memory, and the size in  
> bits as an argument.

Spoilsport :)  That said, the current design of breaking big integers
into registers is not well adapted to huge integers.  It's a bit like
first class aggregates in that respect.  So if someone wants to go down
the i1024 arithmetic route, they probably should start by rethinking
the break-into-registers design.

Ciao,

Duncan.


From clattner at apple.com  Tue Nov  4 07:28:13 2008
From: clattner at apple.com (Chris Lattner)
Date: Tue, 4 Nov 2008 05:28:13 -0800
Subject: [llvm-commits] [llvm] r58673 - in /llvm/trunk:
	include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp
	lib/CodeGen/StackProtector.cpp
In-Reply-To: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu>
References: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu>
Message-ID: 

On Nov 3, 2008, at 6:10 PM, Bill Wendling wrote:
> URL: http://llvm.org/viewvc/llvm-project?rev=58673&view=rev
> Log:
> Initial checkin for stack protectors. Here's what it does:

Cool!  Some questions/comments below:

> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original)
> +++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Mon Nov  3 20:10:20  
> 2008
> @@ -60,6 +60,11 @@
> EnableFastISelOption("fast-isel", cl::Hidden,
>   cl::desc("Enable the experimental \"fast\" instruction selector"));
>
> +// Enable stack protectors.
> +static cl::opt
> +EnableStackProtector("enable-stack-protector", cl::init(0),
> +                     cl::desc("Use ProPolice as a stack protection  
> method."));

I don't know what "ProPolice" is, but it sounds like it may be a  
trademark or something.  Please just use "stack canary" or something  
generic like that.

Also, you should use an enum for this, not magic integer numbers.  I'd  
like to see -enable-stack-protector=all | some | none.


> @@ -165,6 +170,8 @@
>   if (!Fast)
>     PM.add(createCodeGenPreparePass(getTargetLowering()));
>
> +  PM.add(createStackProtectorPass(EnableStackProtector));

Why do you add the pass even when it is not enabled?  Have you looked  
at whether adding this pass ends up breaking analysis chains, and  
requiring them to be run multiple times?  For example, does dominators  
end up being run more frequently with this?  If so, the pass should  
update dominators instead of invalidating it.

> @@ -0,0 +1,228 @@
> +//===-- StackProtector.cpp - Stack Protector Insertion  
> --------------------===//
> +//
> +//                     The LLVM Compiler Infrastructure
> +//
> +// This file is distributed under the University of Illinois Open  
> Source
> +// License. See LICENSE.TXT for details.
> +//
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +//
> +// This pass inserts stack protectors into functions which need  
> them. The stack
> +// protectors this uses are the type that ProPolice used. A  
> variable with a

Please remove references to ProPolice and make the documentation self  
contained instead.

>
> +// random value in it is stored onto the stack before the local  
> variables are
> +// allocated. Upon exitting the block, the stored value is checked.  
> If it's

typo exiting.

> +// Enable stack protectors.
> +static cl::opt
> +SSPBufferSize("ssp-buffer-size", cl::init(8),
> +              cl::desc("The lower bound for a buffer to be  
> considered for "
> +                       "stack smashing protection."));

why the contraction ssp?  Please use something like "stack-protector- 
buffer-size" or something like that, for similarity with the enable- 
stack-protector option.

>
> +
> +namespace {
> +  class VISIBILITY_HIDDEN StackProtector : public FunctionPass {
> +    // Level == 0  --  Stack protectors are off.
> +    // Level == 1  --  Stack protectors are on only for some  
> functions.
> +    // Level == 2  --  Stack protectors are on for all functions.
> +    int Level;

I think that this should be an enum in Passes.h, which can also be  
used above for the command line option.

>
> ++    /// RequiresStackProtector - Check whether or not this  
> function needs a
> +    /// stack protector based upon the stack protector level.
> +    bool RequiresStackProtector();

This should be const.

> +/// InsertStackProtectorPrologue - Insert code into the entry block  
> that stores
> +/// the __stack_chk_guard variable onto the stack.
> +void StackProtector::InsertStackProtectorPrologue() {
> +  BasicBlock &Entry = F->getEntryBlock();
> +  Instruction &InsertPt = Entry.front();
> +
> +  const char *StackGuardStr = "__stack_chk_guard";
> +  StackGuardVar = M->getNamedGlobal(StackGuardStr)

If the module already has a '__stack_chk_guard' global with the wrong  
type, I think this code will crash, see below:

>
> +  if (!StackGuardVar)
> +    StackGuardVar = new  
> GlobalVariable(PointerType::getUnqual(Type::Int8Ty),
> +                                       false,  
> GlobalValue::ExternalLinkage,
> +                                       0, StackGuardStr, M);

We really want a Module::getOrInsertGlobal() method that works like  
getOrInsertFunction.  It would do the bitcast to solve the problem  
above and factor away this code.  Can you please add this?

> +  StackProtFrameSlot = new  
> AllocaInst(PointerType::getUnqual(Type::Int8Ty),
> +                                      "StackProt_Frame", &InsertPt);

What ensures that this alloca ends up in the right place in the stack  
frame at codegen time?

> +  LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", true,  
> &InsertPt);
> +  new StoreInst(LI, StackProtFrameSlot, true, &InsertPt);

Please add a comment indicating why these are volatile.  Why is the  
load volatile?

> +/// InsertStackProtectorEpilogue - Insert code before the return  
> instructions
> +/// checking the stack value that was stored in the prologue. If it  
> isn't the
> +/// same as the original value, then call a "failure" function.
> +void StackProtector::InsertStackProtectorEpilogue() {
> +  // Create the basic block to jump to when the guard check fails.
> +  CreateFailBB();
> +
> +  Function::iterator I = F->begin(), E = F->end();
> +  std::vector ReturnBBs;
> +  ReturnBBs.reserve(F->size());
> +
> +  for (; I != E; ++I)
> +    if (isa((*I).getTerminator()))
> +      ReturnBBs.push_back(I);

Two things: first, use I->getTerminator.  Second, why do you make a  
vector of returns and iterate over the vector?  You should be able to  
handle all of these with one pass over the function without the  
intermediate vector.  Also, F->size() is linear time, so that itself  
does a pass over the function.

> +  for (std::vector::iterator
> +         II = ReturnBBs.begin(), IE = ReturnBBs.end(); II != IE; + 
> +II) {
> +    BasicBlock *BB = *II;
> +    ReturnInst *RI = cast(BB->getTerminator());
> +    Function::iterator InsPt = BB; ++InsPt; // Insertion point for  
> new BB.
> +
> +    BasicBlock *NewBB = BasicBlock::Create("SPRet", F, InsPt);
> +
> +    // Move the return instruction into the new basic block.
> +    RI->removeFromParent();
> +    NewBB->getInstList().insert(NewBB->begin(), RI);

Please use BasicBlock::splitBasicBlock to simplify this code.

> +/// CreateFailBB - Create a basic block to jump to when the stack  
> protector
> +/// check fails.
> +void StackProtector::CreateFailBB() {
> +  assert(!FailBB && "Failure basic block already created?!");
> +  FailBB = BasicBlock::Create("CallStackCheckFailBlk", F);
> +  std::vector Params;
> +  Constant *StackChkFail =
> +    M->getOrInsertFunction("__stack_chk_fail",
> +                           FunctionType::get(Type::VoidTy, Params,  
> false));

You can eliminate the temporary vector by using the varargs form of  
getOrInsertFunction:

Constant *StackChkFail =
   M->getOrInsertFunction("__stack_chk_fail", Type::VoidTy, NULL);

> +/// RequiresStackProtector - Check whether or not this function  
> needs a stack
> +/// protector based upon the stack protector level.
> +bool StackProtector::RequiresStackProtector() {
> +  switch (Level) {
> +  default: return false;
> +  case 2:  return true;
> +  case 1: {

Please use enums instead of magic numbers :)

> +    // If the size of the local variables allocated on the stack is  
> greater than
> +    // SSPBufferSize, then we require a stack protector.
> +    uint64_t StackSize = 0;
> +
> +    for (Function::iterator I = F->begin(), E = F->end(); I != E; + 
> +I) {
> +      BasicBlock *BB = I;
> +
> +      for (BasicBlock::iterator
> +             II = BB->begin(), IE = BB->end(); II != IE; ++II)
> +        if (AllocaInst *AI = dyn_cast(II))
> +          if (ConstantInt *CI = dyn_cast(AI- 
> >getArraySize())) {
> +            const APInt &Size = CI->getValue();
> +            StackSize += Size.getZExtValue() * 8;
> +          }

This isn't sufficient.  If you have "alloca i32", the array size is  
1.  You need to use TargetData to multiply the array size by the size  
of the type.  Also, is the protection size in bits or bytes?

Does GCC ignore variable sized stack allocations?

> +    if (SSPBufferSize <= StackSize)
> +      return true;

This check should be moved inside the loop so that you stop scanning a  
function as soon as you see at least enough to qualify for stack  
protection.

>
> +
> +// [EOF] StackProtector.cpp

Urr?

-Chris


From clattner at apple.com  Tue Nov  4 07:28:51 2008
From: clattner at apple.com (Chris Lattner)
Date: Tue, 4 Nov 2008 05:28:51 -0800
Subject: [llvm-commits] [llvm] r58623 - in /llvm/trunk:
	include/llvm/CodeGen/ValueTypes.h lib/VMCore/ValueTypes.cpp
	test/CodeGen/X86/i2k.ll utils/TableGen/CMakeLists.txt
	utils/TableGen/TGValueTypes.cpp
In-Reply-To: <200811041415.18278.duncan.sands@math.u-psud.fr>
References: <200811031756.mA3HuRvA017091@zion.cs.uiuc.edu>
	<200811041038.36565.duncan.sands@math.u-psud.fr>
	<822CF83A-249C-4FB3-8D72-750E76E20D87@apple.com>
	<200811041415.18278.duncan.sands@math.u-psud.fr>
Message-ID: 


On Nov 4, 2008, at 5:15 AM, Duncan Sands wrote:

>>> Here's a crazy idea.  I hear that people are working on "libllvm",
>>> a reimplementation of libgcc.  Maybe instead the code generator
>>> could be taught to generate library functions on the fly.  For
>>> example, suppose a call to __udivsi3 is needed.  Then the code
>>> generator creates the function __udivsi3 in the assembler, with
>>> weak linkage.  Thanks to weak linkage there will be only one
>>> copy no matter how many object files it turns up in, and there
>>> is no need to link with libllvm.  Now imagine that you need a
>>> similar library function to __udivsi3, but for i1024.  Then you
>>> can have the code generators squirt out __udivsiXYZ!
>>
>> I think it would be better to make an arbitrary precision version of
>> udiv that takes a pointer to the integer in memory, and the size in
>> bits as an argument.
>
> Spoilsport :)  That said, the current design of breaking big integers
> into registers is not well adapted to huge integers.  It's a bit like
> first class aggregates in that respect.  So if someone wants to go  
> down
> the i1024 arithmetic route, they probably should start by rethinking
> the break-into-registers design.

I agree, I doubt that this will be a real priority for anyone in the  
near future.

-Chris


From nunoplopes at sapo.pt  Tue Nov  4 08:26:59 2008
From: nunoplopes at sapo.pt (Nuno Lopes)
Date: Tue, 04 Nov 2008 14:26:59 -0000
Subject: [llvm-commits] [llvm] r58693 -
	/llvm/trunk/lib/AsmParser/llvmAsmParser.y
Message-ID: <200811041426.mA4EQx5B011121@zion.cs.uiuc.edu>

Author: nlopes
Date: Tue Nov  4 08:26:58 2008
New Revision: 58693

URL: http://llvm.org/viewvc/llvm-project?rev=58693&view=rev
Log:
fix leakage of APSInt in getVal()

Modified:
    llvm/trunk/lib/AsmParser/llvmAsmParser.y

Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y?rev=58693&r1=58692&r2=58693&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/llvmAsmParser.y (original)
+++ llvm/trunk/lib/AsmParser/llvmAsmParser.y Tue Nov  4 08:26:58 2008
@@ -418,6 +418,7 @@
 
     {
       APSInt Tmp = *D.ConstPoolInt;
+      D.destroy();
       Tmp.extOrTrunc(Ty->getPrimitiveSizeInBits());
       return ConstantInt::get(Tmp);
     }




From nunoplopes at sapo.pt  Tue Nov  4 08:28:33 2008
From: nunoplopes at sapo.pt (Nuno Lopes)
Date: Tue, 04 Nov 2008 14:28:33 -0000
Subject: [llvm-commits] [llvm] r58694 - in /llvm/trunk/lib/AsmParser:
 llvmAsmParser.cpp.cvs llvmAsmParser.h.cvs llvmAsmParser.y.cvs
Message-ID: <200811041428.mA4ESXe0011174@zion.cs.uiuc.edu>

Author: nlopes
Date: Tue Nov  4 08:28:33 2008
New Revision: 58694

URL: http://llvm.org/viewvc/llvm-project?rev=58694&view=rev
Log:
regenerate

Modified:
    llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs
    llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs
    llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs

Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs?rev=58694&r1=58693&r2=58694&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs (original)
+++ llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs Tue Nov  4 08:28:33 2008
@@ -802,6 +802,7 @@
 
     {
       APSInt Tmp = *D.ConstPoolInt;
+      D.destroy();
       Tmp.extOrTrunc(Ty->getPrimitiveSizeInBits());
       return ConstantInt::get(Tmp);
     }
@@ -1382,7 +1383,7 @@
 
 #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
 typedef union YYSTYPE
-#line 981 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 982 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   llvm::Module                           *ModuleVal;
   llvm::Function                         *FunctionVal;
@@ -1431,7 +1432,7 @@
   llvm::FCmpInst::Predicate         FPredicate;
 }
 /* Line 187 of yacc.c.  */
-#line 1435 "llvmAsmParser.tab.c"
+#line 1436 "llvmAsmParser.tab.c"
 	YYSTYPE;
 # define yystype YYSTYPE /* obsolescent; will be withdrawn */
 # define YYSTYPE_IS_DECLARED 1
@@ -1444,7 +1445,7 @@
 
 
 /* Line 216 of yacc.c.  */
-#line 1448 "llvmAsmParser.tab.c"
+#line 1449 "llvmAsmParser.tab.c"
 
 #ifdef short
 # undef short
@@ -1888,41 +1889,41 @@
 /* YYRLINE[YYN] -- source line where rule number YYN was defined.  */
 static const yytype_uint16 yyrline[] =
 {
-       0,  1147,  1147,  1147,  1147,  1147,  1147,  1147,  1147,  1147,
-    1147,  1148,  1148,  1148,  1148,  1148,  1148,  1149,  1149,  1149,
-    1149,  1149,  1149,  1150,  1150,  1150,  1150,  1150,  1150,  1153,
-    1153,  1154,  1154,  1155,  1155,  1156,  1156,  1157,  1157,  1161,
-    1161,  1162,  1162,  1163,  1163,  1164,  1164,  1165,  1165,  1166,
-    1166,  1167,  1167,  1168,  1169,  1172,  1172,  1172,  1173,  1173,
-    1175,  1176,  1180,  1184,  1189,  1195,  1195,  1197,  1198,  1203,
-    1209,  1210,  1211,  1212,  1213,  1214,  1218,  1219,  1220,  1224,
-    1225,  1226,  1227,  1231,  1232,  1233,  1237,  1238,  1239,  1240,
-    1241,  1245,  1246,  1247,  1250,  1251,  1252,  1253,  1254,  1255,
-    1256,  1263,  1264,  1265,  1266,  1267,  1268,  1269,  1270,  1271,
-    1272,  1276,  1277,  1282,  1283,  1284,  1287,  1288,  1294,  1295,
-    1296,  1297,  1298,  1299,  1300,  1301,  1302,  1303,  1306,  1307,
-    1313,  1314,  1321,  1322,  1328,  1329,  1338,  1346,  1347,  1352,
-    1353,  1354,  1359,  1372,  1372,  1372,  1372,  1372,  1372,  1372,
-    1375,  1379,  1383,  1390,  1395,  1403,  1438,  1469,  1474,  1484,
-    1494,  1498,  1508,  1515,  1524,  1531,  1536,  1541,  1548,  1549,
-    1556,  1563,  1571,  1577,  1589,  1617,  1633,  1660,  1688,  1714,
-    1734,  1760,  1780,  1792,  1799,  1865,  1875,  1885,  1896,  1909,
-    1920,  1934,  1941,  1948,  1966,  1978,  1999,  2007,  2013,  2024,
-    2029,  2034,  2039,  2044,  2050,  2056,  2062,  2070,  2081,  2085,
-    2093,  2093,  2096,  2096,  2099,  2111,  2132,  2137,  2145,  2146,
-    2150,  2150,  2154,  2154,  2157,  2160,  2184,  2196,  2195,  2207,
-    2206,  2216,  2215,  2226,  2266,  2269,  2275,  2285,  2289,  2294,
-    2296,  2301,  2306,  2315,  2325,  2336,  2340,  2349,  2358,  2363,
-    2512,  2512,  2514,  2523,  2523,  2525,  2530,  2542,  2546,  2551,
-    2555,  2559,  2564,  2569,  2573,  2577,  2581,  2585,  2589,  2593,
-    2615,  2637,  2643,  2656,  2668,  2673,  2685,  2691,  2695,  2705,
-    2709,  2713,  2718,  2725,  2725,  2731,  2740,  2745,  2750,  2754,
-    2763,  2772,  2785,  2794,  2798,  2806,  2826,  2830,  2835,  2846,
-    2865,  2874,  2978,  2982,  2989,  3000,  3013,  3022,  3035,  3046,
-    3056,  3067,  3075,  3085,  3092,  3095,  3096,  3104,  3110,  3119,
-    3123,  3128,  3144,  3161,  3173,  3185,  3199,  3213,  3225,  3246,
-    3253,  3259,  3265,  3271,  3286,  3396,  3401,  3405,  3412,  3419,
-    3429,  3436,  3446,  3454,  3468,  3485,  3499,  3514,  3529
+       0,  1148,  1148,  1148,  1148,  1148,  1148,  1148,  1148,  1148,
+    1148,  1149,  1149,  1149,  1149,  1149,  1149,  1150,  1150,  1150,
+    1150,  1150,  1150,  1151,  1151,  1151,  1151,  1151,  1151,  1154,
+    1154,  1155,  1155,  1156,  1156,  1157,  1157,  1158,  1158,  1162,
+    1162,  1163,  1163,  1164,  1164,  1165,  1165,  1166,  1166,  1167,
+    1167,  1168,  1168,  1169,  1170,  1173,  1173,  1173,  1174,  1174,
+    1176,  1177,  1181,  1185,  1190,  1196,  1196,  1198,  1199,  1204,
+    1210,  1211,  1212,  1213,  1214,  1215,  1219,  1220,  1221,  1225,
+    1226,  1227,  1228,  1232,  1233,  1234,  1238,  1239,  1240,  1241,
+    1242,  1246,  1247,  1248,  1251,  1252,  1253,  1254,  1255,  1256,
+    1257,  1264,  1265,  1266,  1267,  1268,  1269,  1270,  1271,  1272,
+    1273,  1277,  1278,  1283,  1284,  1285,  1288,  1289,  1295,  1296,
+    1297,  1298,  1299,  1300,  1301,  1302,  1303,  1304,  1307,  1308,
+    1314,  1315,  1322,  1323,  1329,  1330,  1339,  1347,  1348,  1353,
+    1354,  1355,  1360,  1373,  1373,  1373,  1373,  1373,  1373,  1373,
+    1376,  1380,  1384,  1391,  1396,  1404,  1439,  1470,  1475,  1485,
+    1495,  1499,  1509,  1516,  1525,  1532,  1537,  1542,  1549,  1550,
+    1557,  1564,  1572,  1578,  1590,  1618,  1634,  1661,  1689,  1715,
+    1735,  1761,  1781,  1793,  1800,  1866,  1876,  1886,  1897,  1910,
+    1921,  1935,  1942,  1949,  1967,  1979,  2000,  2008,  2014,  2025,
+    2030,  2035,  2040,  2045,  2051,  2057,  2063,  2071,  2082,  2086,
+    2094,  2094,  2097,  2097,  2100,  2112,  2133,  2138,  2146,  2147,
+    2151,  2151,  2155,  2155,  2158,  2161,  2185,  2197,  2196,  2208,
+    2207,  2217,  2216,  2227,  2267,  2270,  2276,  2286,  2290,  2295,
+    2297,  2302,  2307,  2316,  2326,  2337,  2341,  2350,  2359,  2364,
+    2513,  2513,  2515,  2524,  2524,  2526,  2531,  2543,  2547,  2552,
+    2556,  2560,  2565,  2570,  2574,  2578,  2582,  2586,  2590,  2594,
+    2616,  2638,  2644,  2657,  2669,  2674,  2686,  2692,  2696,  2706,
+    2710,  2714,  2719,  2726,  2726,  2732,  2741,  2746,  2751,  2755,
+    2764,  2773,  2786,  2795,  2799,  2807,  2827,  2831,  2836,  2847,
+    2866,  2875,  2979,  2983,  2990,  3001,  3014,  3023,  3036,  3047,
+    3057,  3068,  3076,  3086,  3093,  3096,  3097,  3105,  3111,  3120,
+    3124,  3129,  3145,  3162,  3174,  3186,  3200,  3214,  3226,  3247,
+    3254,  3260,  3266,  3272,  3287,  3397,  3402,  3406,  3413,  3420,
+    3430,  3437,  3447,  3455,  3469,  3486,  3500,  3515,  3530
 };
 #endif
 
@@ -3648,152 +3649,152 @@
   switch (yyn)
     {
         case 29:
-#line 1153 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1154 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_EQ; ;}
     break;
 
   case 30:
-#line 1153 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1154 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_NE; ;}
     break;
 
   case 31:
-#line 1154 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1155 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_SLT; ;}
     break;
 
   case 32:
-#line 1154 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1155 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_SGT; ;}
     break;
 
   case 33:
-#line 1155 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1156 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_SLE; ;}
     break;
 
   case 34:
-#line 1155 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1156 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_SGE; ;}
     break;
 
   case 35:
-#line 1156 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1157 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_ULT; ;}
     break;
 
   case 36:
-#line 1156 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1157 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_UGT; ;}
     break;
 
   case 37:
-#line 1157 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1158 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_ULE; ;}
     break;
 
   case 38:
-#line 1157 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1158 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_UGE; ;}
     break;
 
   case 39:
-#line 1161 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1162 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_OEQ; ;}
     break;
 
   case 40:
-#line 1161 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1162 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_ONE; ;}
     break;
 
   case 41:
-#line 1162 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1163 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_OLT; ;}
     break;
 
   case 42:
-#line 1162 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1163 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_OGT; ;}
     break;
 
   case 43:
-#line 1163 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1164 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_OLE; ;}
     break;
 
   case 44:
-#line 1163 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1164 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_OGE; ;}
     break;
 
   case 45:
-#line 1164 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1165 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_ORD; ;}
     break;
 
   case 46:
-#line 1164 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1165 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_UNO; ;}
     break;
 
   case 47:
-#line 1165 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1166 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_UEQ; ;}
     break;
 
   case 48:
-#line 1165 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1166 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_UNE; ;}
     break;
 
   case 49:
-#line 1166 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1167 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_ULT; ;}
     break;
 
   case 50:
-#line 1166 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1167 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_UGT; ;}
     break;
 
   case 51:
-#line 1167 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1168 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_ULE; ;}
     break;
 
   case 52:
-#line 1167 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1168 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_UGE; ;}
     break;
 
   case 53:
-#line 1168 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1169 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_TRUE; ;}
     break;
 
   case 54:
-#line 1169 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1170 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_FALSE; ;}
     break;
 
   case 59:
-#line 1173 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1174 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.StrVal) = 0; ;}
     break;
 
   case 60:
-#line 1175 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1176 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal)=(yyvsp[(3) - (4)].UInt64Val); ;}
     break;
 
   case 61:
-#line 1176 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1177 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal)=0; ;}
     break;
 
   case 62:
-#line 1180 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1181 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.StrVal) = (yyvsp[(1) - (2)].StrVal);
     CHECK_FOR_ERROR
@@ -3801,7 +3802,7 @@
     break;
 
   case 63:
-#line 1184 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1185 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.StrVal) = 0;
     CHECK_FOR_ERROR
@@ -3809,7 +3810,7 @@
     break;
 
   case 64:
-#line 1189 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1190 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   (yyval.UIntVal) = (yyvsp[(1) - (2)].UIntVal);
   CHECK_FOR_ERROR
@@ -3817,7 +3818,7 @@
     break;
 
   case 68:
-#line 1198 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1199 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.StrVal) = 0;
     CHECK_FOR_ERROR
@@ -3825,7 +3826,7 @@
     break;
 
   case 69:
-#line 1203 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1204 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.StrVal) = (yyvsp[(1) - (2)].StrVal);
     CHECK_FOR_ERROR
@@ -3833,157 +3834,157 @@
     break;
 
   case 70:
-#line 1209 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1210 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::InternalLinkage; ;}
     break;
 
   case 71:
-#line 1210 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1211 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::WeakLinkage; ;}
     break;
 
   case 72:
-#line 1211 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1212 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;}
     break;
 
   case 73:
-#line 1212 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1213 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::AppendingLinkage; ;}
     break;
 
   case 74:
-#line 1213 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1214 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;}
     break;
 
   case 75:
-#line 1214 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1215 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::CommonLinkage; ;}
     break;
 
   case 76:
-#line 1218 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1219 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;}
     break;
 
   case 77:
-#line 1219 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1220 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;}
     break;
 
   case 78:
-#line 1220 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1221 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;}
     break;
 
   case 79:
-#line 1224 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1225 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Visibility) = GlobalValue::DefaultVisibility;   ;}
     break;
 
   case 80:
-#line 1225 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1226 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Visibility) = GlobalValue::DefaultVisibility;   ;}
     break;
 
   case 81:
-#line 1226 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1227 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Visibility) = GlobalValue::HiddenVisibility;    ;}
     break;
 
   case 82:
-#line 1227 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1228 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Visibility) = GlobalValue::ProtectedVisibility; ;}
     break;
 
   case 83:
-#line 1231 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1232 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;}
     break;
 
   case 84:
-#line 1232 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1233 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;}
     break;
 
   case 85:
-#line 1233 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1234 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;}
     break;
 
   case 86:
-#line 1237 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1238 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;}
     break;
 
   case 87:
-#line 1238 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1239 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::InternalLinkage; ;}
     break;
 
   case 88:
-#line 1239 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1240 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;}
     break;
 
   case 89:
-#line 1240 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1241 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::WeakLinkage; ;}
     break;
 
   case 90:
-#line 1241 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1242 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;}
     break;
 
   case 91:
-#line 1245 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1246 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;}
     break;
 
   case 92:
-#line 1246 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1247 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::WeakLinkage; ;}
     break;
 
   case 93:
-#line 1247 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1248 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::InternalLinkage; ;}
     break;
 
   case 94:
-#line 1250 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1251 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::C; ;}
     break;
 
   case 95:
-#line 1251 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1252 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::C; ;}
     break;
 
   case 96:
-#line 1252 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1253 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::Fast; ;}
     break;
 
   case 97:
-#line 1253 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1254 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::Cold; ;}
     break;
 
   case 98:
-#line 1254 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1255 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::X86_StdCall; ;}
     break;
 
   case 99:
-#line 1255 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1256 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::X86_FastCall; ;}
     break;
 
   case 100:
-#line 1256 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1257 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
                    if ((unsigned)(yyvsp[(2) - (2)].UInt64Val) != (yyvsp[(2) - (2)].UInt64Val))
                      GEN_ERROR("Calling conv too large");
@@ -3993,176 +3994,176 @@
     break;
 
   case 101:
-#line 1263 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1264 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::ZExt;      ;}
     break;
 
   case 102:
-#line 1264 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1265 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::ZExt;      ;}
     break;
 
   case 103:
-#line 1265 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1266 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::SExt;      ;}
     break;
 
   case 104:
-#line 1266 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1267 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::SExt;      ;}
     break;
 
   case 105:
-#line 1267 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1268 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::InReg;     ;}
     break;
 
   case 106:
-#line 1268 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1269 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::StructRet; ;}
     break;
 
   case 107:
-#line 1269 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1270 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::NoAlias;   ;}
     break;
 
   case 108:
-#line 1270 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1271 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::ByVal;     ;}
     break;
 
   case 109:
-#line 1271 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1272 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::Nest;      ;}
     break;
 
   case 110:
-#line 1272 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1273 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) =
                           Attribute::constructAlignmentFromInt((yyvsp[(2) - (2)].UInt64Val));    ;}
     break;
 
   case 111:
-#line 1276 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1277 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::None; ;}
     break;
 
   case 112:
-#line 1277 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1278 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
                 (yyval.Attributes) = (yyvsp[(1) - (2)].Attributes) | (yyvsp[(2) - (2)].Attributes);
               ;}
     break;
 
   case 113:
-#line 1282 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1283 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::InReg;     ;}
     break;
 
   case 114:
-#line 1283 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1284 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::ZExt;     ;}
     break;
 
   case 115:
-#line 1284 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1285 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::SExt;     ;}
     break;
 
   case 116:
-#line 1287 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1288 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::None; ;}
     break;
 
   case 117:
-#line 1288 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1289 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
                (yyval.Attributes) = (yyvsp[(1) - (2)].Attributes) | (yyvsp[(2) - (2)].Attributes);
              ;}
     break;
 
   case 118:
-#line 1294 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1295 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::NoReturn; ;}
     break;
 
   case 119:
-#line 1295 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1296 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::NoUnwind; ;}
     break;
 
   case 120:
-#line 1296 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1297 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::InReg;     ;}
     break;
 
   case 121:
-#line 1297 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1298 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::ZExt;     ;}
     break;
 
   case 122:
-#line 1298 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1299 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::SExt;     ;}
     break;
 
   case 123:
-#line 1299 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1300 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::ReadNone; ;}
     break;
 
   case 124:
-#line 1300 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1301 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::ReadOnly; ;}
     break;
 
   case 125:
-#line 1301 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1302 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::NoInline; ;}
     break;
 
   case 126:
-#line 1302 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1303 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::AlwaysInline; ;}
     break;
 
   case 127:
-#line 1303 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1304 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::OptimizeForSize; ;}
     break;
 
   case 128:
-#line 1306 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1307 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::None; ;}
     break;
 
   case 129:
-#line 1307 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1308 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
                 (yyval.Attributes) = (yyvsp[(1) - (2)].Attributes) | (yyvsp[(2) - (2)].Attributes);
               ;}
     break;
 
   case 130:
-#line 1313 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1314 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.StrVal) = 0; ;}
     break;
 
   case 131:
-#line 1314 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1315 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
                 (yyval.StrVal) = (yyvsp[(2) - (2)].StrVal);
               ;}
     break;
 
   case 132:
-#line 1321 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1322 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = 0; ;}
     break;
 
   case 133:
-#line 1322 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1323 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   (yyval.UIntVal) = (yyvsp[(2) - (2)].UInt64Val);
   if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal)))
@@ -4172,12 +4173,12 @@
     break;
 
   case 134:
-#line 1328 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1329 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = 0; ;}
     break;
 
   case 135:
-#line 1329 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1330 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   (yyval.UIntVal) = (yyvsp[(3) - (3)].UInt64Val);
   if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal)))
@@ -4187,7 +4188,7 @@
     break;
 
   case 136:
-#line 1338 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1339 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   for (unsigned i = 0, e = (yyvsp[(2) - (2)].StrVal)->length(); i != e; ++i)
     if ((*(yyvsp[(2) - (2)].StrVal))[i] == '"' || (*(yyvsp[(2) - (2)].StrVal))[i] == '\\')
@@ -4198,27 +4199,27 @@
     break;
 
   case 137:
-#line 1346 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1347 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.StrVal) = 0; ;}
     break;
 
   case 138:
-#line 1347 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1348 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.StrVal) = (yyvsp[(1) - (1)].StrVal); ;}
     break;
 
   case 139:
-#line 1352 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1353 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {;}
     break;
 
   case 140:
-#line 1353 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1354 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {;}
     break;
 
   case 141:
-#line 1354 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1355 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurGV->setSection(*(yyvsp[(1) - (1)].StrVal));
     delete (yyvsp[(1) - (1)].StrVal);
@@ -4227,7 +4228,7 @@
     break;
 
   case 142:
-#line 1359 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1360 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(2) - (2)].UInt64Val) != 0 && !isPowerOf2_32((yyvsp[(2) - (2)].UInt64Val)))
       GEN_ERROR("Alignment must be a power of two");
@@ -4237,7 +4238,7 @@
     break;
 
   case 150:
-#line 1375 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1376 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeVal) = new PATypeHolder(OpaqueType::get());
     CHECK_FOR_ERROR
@@ -4245,7 +4246,7 @@
     break;
 
   case 151:
-#line 1379 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1380 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeVal) = new PATypeHolder((yyvsp[(1) - (1)].PrimType));
     CHECK_FOR_ERROR
@@ -4253,7 +4254,7 @@
     break;
 
   case 152:
-#line 1383 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1384 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                             // Pointer type?
     if (*(yyvsp[(1) - (3)].TypeVal) == Type::LabelTy)
       GEN_ERROR("Cannot form a pointer to a basic block");
@@ -4264,7 +4265,7 @@
     break;
 
   case 153:
-#line 1390 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1391 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {            // Named types are also simple types...
     const Type* tmp = getTypeVal((yyvsp[(1) - (1)].ValIDVal));
     CHECK_FOR_ERROR
@@ -4273,7 +4274,7 @@
     break;
 
   case 154:
-#line 1395 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1396 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                   // Type UpReference
     if ((yyvsp[(2) - (2)].UInt64Val) > (uint64_t)~0U) GEN_ERROR("Value out of range");
     OpaqueType *OT = OpaqueType::get();        // Use temporary placeholder
@@ -4285,7 +4286,7 @@
     break;
 
   case 155:
-#line 1403 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1404 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // Allow but ignore attributes on function types; this permits auto-upgrade.
     // FIXME: remove in LLVM 3.0.
@@ -4324,7 +4325,7 @@
     break;
 
   case 156:
-#line 1438 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1439 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // Allow but ignore attributes on function types; this permits auto-upgrade.
     // FIXME: remove in LLVM 3.0.
@@ -4358,7 +4359,7 @@
     break;
 
   case 157:
-#line 1469 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1470 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {          // Sized array type?
     (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(ArrayType::get(*(yyvsp[(4) - (5)].TypeVal), (yyvsp[(2) - (5)].UInt64Val))));
     delete (yyvsp[(4) - (5)].TypeVal);
@@ -4367,7 +4368,7 @@
     break;
 
   case 158:
-#line 1474 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1475 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {          // Vector type?
      const llvm::Type* ElemTy = (yyvsp[(4) - (5)].TypeVal)->get();
      if ((unsigned)(yyvsp[(2) - (5)].UInt64Val) != (yyvsp[(2) - (5)].UInt64Val))
@@ -4381,7 +4382,7 @@
     break;
 
   case 159:
-#line 1484 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1485 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                        // Structure type?
     std::vector Elements;
     for (std::list::iterator I = (yyvsp[(2) - (3)].TypeList)->begin(),
@@ -4395,7 +4396,7 @@
     break;
 
   case 160:
-#line 1494 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1495 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                                  // Empty structure type?
     (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector()));
     CHECK_FOR_ERROR
@@ -4403,7 +4404,7 @@
     break;
 
   case 161:
-#line 1498 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1499 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     std::vector Elements;
     for (std::list::iterator I = (yyvsp[(3) - (5)].TypeList)->begin(),
@@ -4417,7 +4418,7 @@
     break;
 
   case 162:
-#line 1508 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1509 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                         // Empty structure type?
     (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector(), true));
     CHECK_FOR_ERROR
@@ -4425,7 +4426,7 @@
     break;
 
   case 163:
-#line 1515 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1516 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // Allow but ignore attributes on function types; this permits auto-upgrade.
     // FIXME: remove in LLVM 3.0.
@@ -4435,7 +4436,7 @@
     break;
 
   case 164:
-#line 1524 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1525 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (1)].TypeVal))->getDescription());
@@ -4446,14 +4447,14 @@
     break;
 
   case 165:
-#line 1531 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1532 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeVal) = new PATypeHolder(Type::VoidTy);
   ;}
     break;
 
   case 166:
-#line 1536 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1537 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeWithAttrsList) = new TypeWithAttrsList();
     (yyval.TypeWithAttrsList)->push_back((yyvsp[(1) - (1)].TypeWithAttrs));
@@ -4462,7 +4463,7 @@
     break;
 
   case 167:
-#line 1541 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1542 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     ((yyval.TypeWithAttrsList)=(yyvsp[(1) - (3)].TypeWithAttrsList))->push_back((yyvsp[(3) - (3)].TypeWithAttrs));
     CHECK_FOR_ERROR
@@ -4470,7 +4471,7 @@
     break;
 
   case 169:
-#line 1549 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1550 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeWithAttrsList)=(yyvsp[(1) - (3)].TypeWithAttrsList);
     TypeWithAttrs TWA; TWA.Attrs = Attribute::None;
@@ -4481,7 +4482,7 @@
     break;
 
   case 170:
-#line 1556 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1557 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeWithAttrsList) = new TypeWithAttrsList;
     TypeWithAttrs TWA; TWA.Attrs = Attribute::None;
@@ -4492,7 +4493,7 @@
     break;
 
   case 171:
-#line 1563 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1564 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeWithAttrsList) = new TypeWithAttrsList();
     CHECK_FOR_ERROR
@@ -4500,7 +4501,7 @@
     break;
 
   case 172:
-#line 1571 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1572 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeList) = new std::list();
     (yyval.TypeList)->push_back(*(yyvsp[(1) - (1)].TypeVal));
@@ -4510,7 +4511,7 @@
     break;
 
   case 173:
-#line 1577 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1578 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     ((yyval.TypeList)=(yyvsp[(1) - (3)].TypeList))->push_back(*(yyvsp[(3) - (3)].TypeVal));
     delete (yyvsp[(3) - (3)].TypeVal);
@@ -4519,7 +4520,7 @@
     break;
 
   case 174:
-#line 1589 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1590 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Nonempty unsized arr
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (4)].TypeVal))->getDescription());
@@ -4551,7 +4552,7 @@
     break;
 
   case 175:
-#line 1617 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1618 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription());
@@ -4571,7 +4572,7 @@
     break;
 
   case 176:
-#line 1633 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1634 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription());
@@ -4602,7 +4603,7 @@
     break;
 
   case 177:
-#line 1660 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1661 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Nonempty unsized arr
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (4)].TypeVal))->getDescription());
@@ -4634,7 +4635,7 @@
     break;
 
   case 178:
-#line 1688 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1689 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const StructType *STy = dyn_cast((yyvsp[(1) - (4)].TypeVal)->get());
     if (STy == 0)
@@ -4664,7 +4665,7 @@
     break;
 
   case 179:
-#line 1714 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1715 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription());
@@ -4688,7 +4689,7 @@
     break;
 
   case 180:
-#line 1734 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1735 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const StructType *STy = dyn_cast((yyvsp[(1) - (6)].TypeVal)->get());
     if (STy == 0)
@@ -4718,7 +4719,7 @@
     break;
 
   case 181:
-#line 1760 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1761 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (5)].TypeVal))->getDescription());
@@ -4742,7 +4743,7 @@
     break;
 
   case 182:
-#line 1780 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1781 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -4758,7 +4759,7 @@
     break;
 
   case 183:
-#line 1792 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1793 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -4769,7 +4770,7 @@
     break;
 
   case 184:
-#line 1799 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1800 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -4839,7 +4840,7 @@
     break;
 
   case 185:
-#line 1865 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1866 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -4853,7 +4854,7 @@
     break;
 
   case 186:
-#line 1875 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1876 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -4867,7 +4868,7 @@
     break;
 
   case 187:
-#line 1885 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1886 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // integral constants
     if (IntegerType *IT = dyn_cast((yyvsp[(1) - (2)].TypeVal)->get())) {
       if (!ConstantInt::isValueValidForType(IT, (yyvsp[(2) - (2)].SInt64Val)))
@@ -4882,7 +4883,7 @@
     break;
 
   case 188:
-#line 1896 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1897 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // arbitrary precision integer constants
     if (IntegerType *IT = dyn_cast((yyvsp[(1) - (2)].TypeVal)->get())) {
       if ((yyvsp[(2) - (2)].APIntVal)->getBitWidth() > IT->getBitWidth())
@@ -4899,7 +4900,7 @@
     break;
 
   case 189:
-#line 1909 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1910 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // integral constants
     if (IntegerType *IT = dyn_cast((yyvsp[(1) - (2)].TypeVal)->get())) {
       if (!ConstantInt::isValueValidForType(IT, (yyvsp[(2) - (2)].UInt64Val)))
@@ -4914,7 +4915,7 @@
     break;
 
   case 190:
-#line 1920 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1921 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // arbitrary precision integer constants
     if (IntegerType *IT = dyn_cast((yyvsp[(1) - (2)].TypeVal)->get())) {
       if ((yyvsp[(2) - (2)].APIntVal)->getBitWidth() > IT->getBitWidth())
@@ -4932,7 +4933,7 @@
     break;
 
   case 191:
-#line 1934 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1935 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                      // Boolean constants
     if ((yyvsp[(1) - (2)].TypeVal)->get() != Type::Int1Ty)
       GEN_ERROR("Constant true must have type i1");
@@ -4943,7 +4944,7 @@
     break;
 
   case 192:
-#line 1941 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1942 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                     // Boolean constants
     if ((yyvsp[(1) - (2)].TypeVal)->get() != Type::Int1Ty)
       GEN_ERROR("Constant false must have type i1");
@@ -4954,7 +4955,7 @@
     break;
 
   case 193:
-#line 1948 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1949 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                   // Floating point constants
     if (!ConstantFP::isValueValidForType((yyvsp[(1) - (2)].TypeVal)->get(), *(yyvsp[(2) - (2)].FPVal)))
       GEN_ERROR("Floating point constant invalid for type");
@@ -4974,7 +4975,7 @@
     break;
 
   case 194:
-#line 1966 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1967 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(5) - (6)].TypeVal))->getDescription());
@@ -4990,7 +4991,7 @@
     break;
 
   case 195:
-#line 1978 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1979 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!isa((yyvsp[(3) - (5)].ConstVal)->getType()))
       GEN_ERROR("GetElementPtr requires a pointer operand");
@@ -5015,7 +5016,7 @@
     break;
 
   case 196:
-#line 1999 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2000 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(3) - (8)].ConstVal)->getType() != Type::Int1Ty)
       GEN_ERROR("Select condition must be of boolean type");
@@ -5027,7 +5028,7 @@
     break;
 
   case 197:
-#line 2007 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2008 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(3) - (6)].ConstVal)->getType() != (yyvsp[(5) - (6)].ConstVal)->getType())
       GEN_ERROR("Binary operator types must match");
@@ -5037,7 +5038,7 @@
     break;
 
   case 198:
-#line 2013 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2014 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(3) - (6)].ConstVal)->getType() != (yyvsp[(5) - (6)].ConstVal)->getType())
       GEN_ERROR("Logical operator types must match");
@@ -5052,7 +5053,7 @@
     break;
 
   case 199:
-#line 2024 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2025 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType())
       GEN_ERROR("icmp operand types must match");
@@ -5061,7 +5062,7 @@
     break;
 
   case 200:
-#line 2029 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2030 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType())
       GEN_ERROR("fcmp operand types must match");
@@ -5070,7 +5071,7 @@
     break;
 
   case 201:
-#line 2034 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2035 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType())
       GEN_ERROR("vicmp operand types must match");
@@ -5079,7 +5080,7 @@
     break;
 
   case 202:
-#line 2039 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2040 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType())
       GEN_ERROR("vfcmp operand types must match");
@@ -5088,7 +5089,7 @@
     break;
 
   case 203:
-#line 2044 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2045 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!ExtractElementInst::isValidOperands((yyvsp[(3) - (6)].ConstVal), (yyvsp[(5) - (6)].ConstVal)))
       GEN_ERROR("Invalid extractelement operands");
@@ -5098,7 +5099,7 @@
     break;
 
   case 204:
-#line 2050 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2051 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!InsertElementInst::isValidOperands((yyvsp[(3) - (8)].ConstVal), (yyvsp[(5) - (8)].ConstVal), (yyvsp[(7) - (8)].ConstVal)))
       GEN_ERROR("Invalid insertelement operands");
@@ -5108,7 +5109,7 @@
     break;
 
   case 205:
-#line 2056 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2057 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!ShuffleVectorInst::isValidOperands((yyvsp[(3) - (8)].ConstVal), (yyvsp[(5) - (8)].ConstVal), (yyvsp[(7) - (8)].ConstVal)))
       GEN_ERROR("Invalid shufflevector operands");
@@ -5118,7 +5119,7 @@
     break;
 
   case 206:
-#line 2062 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2063 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!isa((yyvsp[(3) - (5)].ConstVal)->getType()) && !isa((yyvsp[(3) - (5)].ConstVal)->getType()))
       GEN_ERROR("ExtractValue requires an aggregate operand");
@@ -5130,7 +5131,7 @@
     break;
 
   case 207:
-#line 2070 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2071 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!isa((yyvsp[(3) - (7)].ConstVal)->getType()) && !isa((yyvsp[(3) - (7)].ConstVal)->getType()))
       GEN_ERROR("InsertValue requires an aggregate operand");
@@ -5142,7 +5143,7 @@
     break;
 
   case 208:
-#line 2081 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2082 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     ((yyval.ConstVector) = (yyvsp[(1) - (3)].ConstVector))->push_back((yyvsp[(3) - (3)].ConstVal));
     CHECK_FOR_ERROR
@@ -5150,7 +5151,7 @@
     break;
 
   case 209:
-#line 2085 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2086 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ConstVector) = new std::vector();
     (yyval.ConstVector)->push_back((yyvsp[(1) - (1)].ConstVal));
@@ -5159,27 +5160,27 @@
     break;
 
   case 210:
-#line 2093 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2094 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.BoolVal) = false; ;}
     break;
 
   case 211:
-#line 2093 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2094 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.BoolVal) = true; ;}
     break;
 
   case 212:
-#line 2096 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2097 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.BoolVal) = true; ;}
     break;
 
   case 213:
-#line 2096 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2097 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.BoolVal) = false; ;}
     break;
 
   case 214:
-#line 2099 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2100 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const Type* VTy = (yyvsp[(1) - (2)].TypeVal)->get();
     Value *V = getVal(VTy, (yyvsp[(2) - (2)].ValIDVal));
@@ -5195,7 +5196,7 @@
     break;
 
   case 215:
-#line 2111 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2112 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     Constant *Val = (yyvsp[(3) - (6)].ConstVal);
     const Type *DestTy = (yyvsp[(5) - (6)].TypeVal)->get();
@@ -5211,7 +5212,7 @@
     break;
 
   case 216:
-#line 2132 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2133 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule;
     CurModule.ModuleDone();
@@ -5220,7 +5221,7 @@
     break;
 
   case 217:
-#line 2137 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2138 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule;
     CurModule.ModuleDone();
@@ -5229,12 +5230,12 @@
     break;
 
   case 220:
-#line 2150 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2151 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { CurFun.isDeclare = false; ;}
     break;
 
   case 221:
-#line 2150 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2151 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurFun.FunctionDone();
     CHECK_FOR_ERROR
@@ -5242,26 +5243,26 @@
     break;
 
   case 222:
-#line 2154 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2155 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { CurFun.isDeclare = true; ;}
     break;
 
   case 223:
-#line 2154 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2155 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CHECK_FOR_ERROR
   ;}
     break;
 
   case 224:
-#line 2157 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2158 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CHECK_FOR_ERROR
   ;}
     break;
 
   case 225:
-#line 2160 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2161 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (3)].TypeVal))->getDescription());
@@ -5289,7 +5290,7 @@
     break;
 
   case 226:
-#line 2184 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2185 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     ResolveTypeTo((yyvsp[(1) - (3)].StrVal), (yyvsp[(3) - (3)].PrimType));
 
@@ -5304,7 +5305,7 @@
     break;
 
   case 227:
-#line 2196 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2197 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     /* "Externally Visible" Linkage */
     if ((yyvsp[(5) - (6)].ConstVal) == 0)
@@ -5316,14 +5317,14 @@
     break;
 
   case 228:
-#line 2203 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2204 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurGV = 0;
   ;}
     break;
 
   case 229:
-#line 2207 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2208 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(6) - (7)].ConstVal) == 0)
       GEN_ERROR("Global value initializer is not a constant");
@@ -5333,14 +5334,14 @@
     break;
 
   case 230:
-#line 2212 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2213 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurGV = 0;
   ;}
     break;
 
   case 231:
-#line 2216 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2217 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(6) - (7)].TypeVal))->getDescription());
@@ -5351,7 +5352,7 @@
     break;
 
   case 232:
-#line 2222 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2223 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurGV = 0;
     CHECK_FOR_ERROR
@@ -5359,7 +5360,7 @@
     break;
 
   case 233:
-#line 2226 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2227 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     std::string Name;
     if ((yyvsp[(1) - (5)].StrVal)) {
@@ -5403,21 +5404,21 @@
     break;
 
   case 234:
-#line 2266 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2267 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CHECK_FOR_ERROR
   ;}
     break;
 
   case 235:
-#line 2269 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2270 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CHECK_FOR_ERROR
   ;}
     break;
 
   case 236:
-#line 2275 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2276 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   const std::string &AsmSoFar = CurModule.CurrentModule->getModuleInlineAsm();
   if (AsmSoFar.empty())
@@ -5430,7 +5431,7 @@
     break;
 
   case 237:
-#line 2285 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2286 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurModule.CurrentModule->setTargetTriple(*(yyvsp[(3) - (3)].StrVal));
     delete (yyvsp[(3) - (3)].StrVal);
@@ -5438,7 +5439,7 @@
     break;
 
   case 238:
-#line 2289 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2290 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurModule.CurrentModule->setDataLayout(*(yyvsp[(3) - (3)].StrVal));
     delete (yyvsp[(3) - (3)].StrVal);
@@ -5446,7 +5447,7 @@
     break;
 
   case 240:
-#line 2296 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2297 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
           CurModule.CurrentModule->addLibrary(*(yyvsp[(3) - (3)].StrVal));
           delete (yyvsp[(3) - (3)].StrVal);
@@ -5455,7 +5456,7 @@
     break;
 
   case 241:
-#line 2301 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2302 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
           CurModule.CurrentModule->addLibrary(*(yyvsp[(1) - (1)].StrVal));
           delete (yyvsp[(1) - (1)].StrVal);
@@ -5464,14 +5465,14 @@
     break;
 
   case 242:
-#line 2306 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2307 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
           CHECK_FOR_ERROR
         ;}
     break;
 
   case 243:
-#line 2315 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2316 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (5)].TypeVal))->getDescription());
@@ -5485,7 +5486,7 @@
     break;
 
   case 244:
-#line 2325 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2326 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription());
@@ -5499,7 +5500,7 @@
     break;
 
   case 245:
-#line 2336 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2337 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ArgList) = (yyvsp[(1) - (1)].ArgList);
     CHECK_FOR_ERROR
@@ -5507,7 +5508,7 @@
     break;
 
   case 246:
-#line 2340 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2341 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ArgList) = (yyvsp[(1) - (3)].ArgList);
     struct ArgListEntry E;
@@ -5520,7 +5521,7 @@
     break;
 
   case 247:
-#line 2349 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2350 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ArgList) = new ArgListType;
     struct ArgListEntry E;
@@ -5533,7 +5534,7 @@
     break;
 
   case 248:
-#line 2358 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2359 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ArgList) = 0;
     CHECK_FOR_ERROR
@@ -5541,7 +5542,7 @@
     break;
 
   case 249:
-#line 2364 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2365 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   std::string FunctionName(*(yyvsp[(4) - (11)].StrVal));
   delete (yyvsp[(4) - (11)].StrVal);  // Free strdup'd memory!
@@ -5692,7 +5693,7 @@
     break;
 
   case 252:
-#line 2514 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2515 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   (yyval.FunctionVal) = CurFun.CurrentFunction;
 
@@ -5704,7 +5705,7 @@
     break;
 
   case 255:
-#line 2525 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2526 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal);
   CHECK_FOR_ERROR
@@ -5712,7 +5713,7 @@
     break;
 
   case 256:
-#line 2530 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2531 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurFun.CurrentFunction->setLinkage((yyvsp[(1) - (3)].Linkage));
     CurFun.CurrentFunction->setVisibility((yyvsp[(2) - (3)].Visibility));
@@ -5723,7 +5724,7 @@
     break;
 
   case 257:
-#line 2542 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2543 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = false;
     CHECK_FOR_ERROR
@@ -5731,7 +5732,7 @@
     break;
 
   case 258:
-#line 2546 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2547 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = true;
     CHECK_FOR_ERROR
@@ -5739,7 +5740,7 @@
     break;
 
   case 259:
-#line 2551 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2552 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {    // A reference to a direct constant
     (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].SInt64Val));
     CHECK_FOR_ERROR
@@ -5747,7 +5748,7 @@
     break;
 
   case 260:
-#line 2555 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2556 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].UInt64Val));
     CHECK_FOR_ERROR
@@ -5755,7 +5756,7 @@
     break;
 
   case 261:
-#line 2559 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2560 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // arbitrary precision integer constants
     (yyval.ValIDVal) = ValID::create(*(yyvsp[(1) - (1)].APIntVal), true);
     delete (yyvsp[(1) - (1)].APIntVal);
@@ -5764,7 +5765,7 @@
     break;
 
   case 262:
-#line 2564 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2565 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // arbitrary precision integer constants
     (yyval.ValIDVal) = ValID::create(*(yyvsp[(1) - (1)].APIntVal), false);
     delete (yyvsp[(1) - (1)].APIntVal);
@@ -5773,7 +5774,7 @@
     break;
 
   case 263:
-#line 2569 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2570 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                     // Perhaps it's an FP constant?
     (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].FPVal));
     CHECK_FOR_ERROR
@@ -5781,7 +5782,7 @@
     break;
 
   case 264:
-#line 2573 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2574 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::create(ConstantInt::getTrue());
     CHECK_FOR_ERROR
@@ -5789,7 +5790,7 @@
     break;
 
   case 265:
-#line 2577 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2578 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::create(ConstantInt::getFalse());
     CHECK_FOR_ERROR
@@ -5797,7 +5798,7 @@
     break;
 
   case 266:
-#line 2581 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2582 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::createNull();
     CHECK_FOR_ERROR
@@ -5805,7 +5806,7 @@
     break;
 
   case 267:
-#line 2585 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2586 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::createUndef();
     CHECK_FOR_ERROR
@@ -5813,7 +5814,7 @@
     break;
 
   case 268:
-#line 2589 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2590 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {     // A vector zero constant.
     (yyval.ValIDVal) = ValID::createZeroInit();
     CHECK_FOR_ERROR
@@ -5821,7 +5822,7 @@
     break;
 
   case 269:
-#line 2593 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2594 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Nonempty unsized packed vector
     const Type *ETy = (*(yyvsp[(2) - (3)].ConstVector))[0]->getType();
     unsigned NumElements = (yyvsp[(2) - (3)].ConstVector)->size();
@@ -5847,7 +5848,7 @@
     break;
 
   case 270:
-#line 2615 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2616 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Nonempty unsized arr
     const Type *ETy = (*(yyvsp[(2) - (3)].ConstVector))[0]->getType();
     uint64_t NumElements = (yyvsp[(2) - (3)].ConstVector)->size();
@@ -5873,7 +5874,7 @@
     break;
 
   case 271:
-#line 2637 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2638 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // Use undef instead of an array because it's inconvenient to determine
     // the element type at this point, there being no elements to examine.
@@ -5883,7 +5884,7 @@
     break;
 
   case 272:
-#line 2643 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2644 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     uint64_t NumElements = (yyvsp[(2) - (2)].StrVal)->length();
     const Type *ETy = Type::Int8Ty;
@@ -5900,7 +5901,7 @@
     break;
 
   case 273:
-#line 2656 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2657 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     std::vector Elements((yyvsp[(2) - (3)].ConstVector)->size());
     for (unsigned i = 0, e = (yyvsp[(2) - (3)].ConstVector)->size(); i != e; ++i)
@@ -5916,7 +5917,7 @@
     break;
 
   case 274:
-#line 2668 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2669 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const StructType *STy = StructType::get(std::vector());
     (yyval.ValIDVal) = ValID::create(ConstantStruct::get(STy, std::vector()));
@@ -5925,7 +5926,7 @@
     break;
 
   case 275:
-#line 2673 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2674 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     std::vector Elements((yyvsp[(3) - (5)].ConstVector)->size());
     for (unsigned i = 0, e = (yyvsp[(3) - (5)].ConstVector)->size(); i != e; ++i)
@@ -5941,7 +5942,7 @@
     break;
 
   case 276:
-#line 2685 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2686 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const StructType *STy = StructType::get(std::vector(),
                                             /*isPacked=*/true);
@@ -5951,7 +5952,7 @@
     break;
 
   case 277:
-#line 2691 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2692 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].ConstVal));
     CHECK_FOR_ERROR
@@ -5959,7 +5960,7 @@
     break;
 
   case 278:
-#line 2695 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2696 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::createInlineAsm(*(yyvsp[(3) - (5)].StrVal), *(yyvsp[(5) - (5)].StrVal), (yyvsp[(2) - (5)].BoolVal));
     delete (yyvsp[(3) - (5)].StrVal);
@@ -5969,7 +5970,7 @@
     break;
 
   case 279:
-#line 2705 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2706 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {  // Is it an integer reference...?
     (yyval.ValIDVal) = ValID::createLocalID((yyvsp[(1) - (1)].UIntVal));
     CHECK_FOR_ERROR
@@ -5977,7 +5978,7 @@
     break;
 
   case 280:
-#line 2709 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2710 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::createGlobalID((yyvsp[(1) - (1)].UIntVal));
     CHECK_FOR_ERROR
@@ -5985,7 +5986,7 @@
     break;
 
   case 281:
-#line 2713 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2714 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                   // Is it a named reference...?
     (yyval.ValIDVal) = ValID::createLocalName(*(yyvsp[(1) - (1)].StrVal));
     delete (yyvsp[(1) - (1)].StrVal);
@@ -5994,7 +5995,7 @@
     break;
 
   case 282:
-#line 2718 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2719 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                   // Is it a named reference...?
     (yyval.ValIDVal) = ValID::createGlobalName(*(yyvsp[(1) - (1)].StrVal));
     delete (yyvsp[(1) - (1)].StrVal);
@@ -6003,7 +6004,7 @@
     break;
 
   case 285:
-#line 2731 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2732 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -6014,7 +6015,7 @@
     break;
 
   case 286:
-#line 2740 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2741 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValueList) = new std::vector();
     (yyval.ValueList)->push_back((yyvsp[(1) - (1)].ValueVal));
@@ -6023,7 +6024,7 @@
     break;
 
   case 287:
-#line 2745 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2746 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     ((yyval.ValueList)=(yyvsp[(1) - (3)].ValueList))->push_back((yyvsp[(3) - (3)].ValueVal));
     CHECK_FOR_ERROR
@@ -6031,7 +6032,7 @@
     break;
 
   case 288:
-#line 2750 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2751 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal);
     CHECK_FOR_ERROR
@@ -6039,7 +6040,7 @@
     break;
 
   case 289:
-#line 2754 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2755 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Do not allow functions with 0 basic blocks
     (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal);
     CHECK_FOR_ERROR
@@ -6047,7 +6048,7 @@
     break;
 
   case 290:
-#line 2763 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2764 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     setValueName((yyvsp[(3) - (3)].TermInstVal), (yyvsp[(2) - (3)].StrVal));
     CHECK_FOR_ERROR
@@ -6059,7 +6060,7 @@
     break;
 
   case 291:
-#line 2772 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2773 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   CHECK_FOR_ERROR
   int ValNum = InsertValue((yyvsp[(3) - (3)].TermInstVal));
@@ -6074,7 +6075,7 @@
     break;
 
   case 292:
-#line 2785 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2786 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (CastInst *CI1 = dyn_cast((yyvsp[(2) - (2)].InstVal)))
       if (CastInst *CI2 = dyn_cast(CI1->getOperand(0)))
@@ -6087,7 +6088,7 @@
     break;
 
   case 293:
-#line 2794 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2795 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {          // Empty space between instruction lists
     (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalID(CurFun.NextValNum));
     CHECK_FOR_ERROR
@@ -6095,7 +6096,7 @@
     break;
 
   case 294:
-#line 2798 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2799 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {             // Labelled (named) basic block
     (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalName(*(yyvsp[(1) - (1)].StrVal)));
     delete (yyvsp[(1) - (1)].StrVal);
@@ -6105,7 +6106,7 @@
     break;
 
   case 295:
-#line 2806 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2807 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Return with a result...
     ValueList &VL = *(yyvsp[(2) - (2)].ValueList);
     assert(!VL.empty() && "Invalid ret operands!");
@@ -6129,7 +6130,7 @@
     break;
 
   case 296:
-#line 2826 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2827 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                                    // Return with no result...
     (yyval.TermInstVal) = ReturnInst::Create();
     CHECK_FOR_ERROR
@@ -6137,7 +6138,7 @@
     break;
 
   case 297:
-#line 2830 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2831 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                           // Unconditional Branch...
     BasicBlock* tmpBB = getBBVal((yyvsp[(3) - (3)].ValIDVal));
     CHECK_FOR_ERROR
@@ -6146,7 +6147,7 @@
     break;
 
   case 298:
-#line 2835 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2836 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (cast((yyvsp[(2) - (9)].PrimType))->getBitWidth() != 1)
       GEN_ERROR("Branch condition must have type i1");
@@ -6161,7 +6162,7 @@
     break;
 
   case 299:
-#line 2846 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2847 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     Value* tmpVal = getVal((yyvsp[(2) - (9)].PrimType), (yyvsp[(3) - (9)].ValIDVal));
     CHECK_FOR_ERROR
@@ -6184,7 +6185,7 @@
     break;
 
   case 300:
-#line 2865 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2866 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     Value* tmpVal = getVal((yyvsp[(2) - (8)].PrimType), (yyvsp[(3) - (8)].ValIDVal));
     CHECK_FOR_ERROR
@@ -6197,7 +6198,7 @@
     break;
 
   case 301:
-#line 2875 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2876 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
 
     // Handle the short syntax
@@ -6304,7 +6305,7 @@
     break;
 
   case 302:
-#line 2978 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2979 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TermInstVal) = new UnwindInst();
     CHECK_FOR_ERROR
@@ -6312,7 +6313,7 @@
     break;
 
   case 303:
-#line 2982 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2983 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TermInstVal) = new UnreachableInst();
     CHECK_FOR_ERROR
@@ -6320,7 +6321,7 @@
     break;
 
   case 304:
-#line 2989 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2990 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.JumpTable) = (yyvsp[(1) - (6)].JumpTable);
     Constant *V = cast(getExistingVal((yyvsp[(2) - (6)].PrimType), (yyvsp[(3) - (6)].ValIDVal)));
@@ -6335,7 +6336,7 @@
     break;
 
   case 305:
-#line 3000 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3001 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.JumpTable) = new std::vector >();
     Constant *V = cast(getExistingVal((yyvsp[(1) - (5)].PrimType), (yyvsp[(2) - (5)].ValIDVal)));
@@ -6351,7 +6352,7 @@
     break;
 
   case 306:
-#line 3013 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3014 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // Is this definition named?? if so, assign the name...
     setValueName((yyvsp[(2) - (2)].InstVal), (yyvsp[(1) - (2)].StrVal));
@@ -6363,7 +6364,7 @@
     break;
 
   case 307:
-#line 3022 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3023 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CHECK_FOR_ERROR
     int ValNum = InsertValue((yyvsp[(2) - (2)].InstVal));
@@ -6378,7 +6379,7 @@
     break;
 
   case 308:
-#line 3035 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3036 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {    // Used for PHI nodes
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (6)].TypeVal))->getDescription());
@@ -6393,7 +6394,7 @@
     break;
 
   case 309:
-#line 3046 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3047 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.PHIList) = (yyvsp[(1) - (7)].PHIList);
     Value* tmpVal = getVal((yyvsp[(1) - (7)].PHIList)->front().first->getType(), (yyvsp[(4) - (7)].ValIDVal));
@@ -6405,7 +6406,7 @@
     break;
 
   case 310:
-#line 3056 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3057 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // FIXME: Remove trailing OptAttributes in LLVM 3.0, it was a mistake in 2.0
     if (!UpRefs.empty())
@@ -6420,7 +6421,7 @@
     break;
 
   case 311:
-#line 3067 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3068 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // FIXME: Remove trailing OptAttributes in LLVM 3.0, it was a mistake in 2.0
     // Labels are only valid in ASMs
@@ -6432,7 +6433,7 @@
     break;
 
   case 312:
-#line 3075 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3076 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // FIXME: Remove trailing OptAttributes in LLVM 3.0, it was a mistake in 2.0
     if (!UpRefs.empty())
@@ -6446,7 +6447,7 @@
     break;
 
   case 313:
-#line 3085 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3086 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // FIXME: Remove trailing OptAttributes in LLVM 3.0, it was a mistake in 2.0
     (yyval.ParamList) = (yyvsp[(1) - (6)].ParamList);
@@ -6457,17 +6458,17 @@
     break;
 
   case 314:
-#line 3092 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3093 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamList) = new ParamList(); ;}
     break;
 
   case 315:
-#line 3095 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3096 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ValueList) = new std::vector(); ;}
     break;
 
   case 316:
-#line 3096 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3097 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValueList) = (yyvsp[(1) - (3)].ValueList);
     (yyval.ValueList)->push_back((yyvsp[(3) - (3)].ValueVal));
@@ -6476,7 +6477,7 @@
     break;
 
   case 317:
-#line 3104 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3105 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ConstantList) = new std::vector();
     if ((unsigned)(yyvsp[(2) - (2)].UInt64Val) != (yyvsp[(2) - (2)].UInt64Val))
@@ -6486,7 +6487,7 @@
     break;
 
   case 318:
-#line 3110 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3111 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ConstantList) = (yyvsp[(1) - (3)].ConstantList);
     if ((unsigned)(yyvsp[(3) - (3)].UInt64Val) != (yyvsp[(3) - (3)].UInt64Val))
@@ -6497,7 +6498,7 @@
     break;
 
   case 319:
-#line 3119 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3120 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = true;
     CHECK_FOR_ERROR
@@ -6505,7 +6506,7 @@
     break;
 
   case 320:
-#line 3123 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3124 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = false;
     CHECK_FOR_ERROR
@@ -6513,7 +6514,7 @@
     break;
 
   case 321:
-#line 3128 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3129 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (5)].TypeVal))->getDescription());
@@ -6533,7 +6534,7 @@
     break;
 
   case 322:
-#line 3144 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3145 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (5)].TypeVal))->getDescription());
@@ -6554,7 +6555,7 @@
     break;
 
   case 323:
-#line 3161 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3162 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription());
@@ -6570,7 +6571,7 @@
     break;
 
   case 324:
-#line 3173 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3174 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription());
@@ -6586,7 +6587,7 @@
     break;
 
   case 325:
-#line 3185 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3186 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription());
@@ -6604,7 +6605,7 @@
     break;
 
   case 326:
-#line 3199 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3200 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription());
@@ -6622,7 +6623,7 @@
     break;
 
   case 327:
-#line 3213 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3214 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(4) - (4)].TypeVal))->getDescription());
@@ -6638,7 +6639,7 @@
     break;
 
   case 328:
-#line 3225 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3226 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (isa((yyvsp[(2) - (6)].ValueVal)->getType())) {
       // vector select
@@ -6663,7 +6664,7 @@
     break;
 
   case 329:
-#line 3246 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3247 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(4) - (4)].TypeVal))->getDescription());
@@ -6674,7 +6675,7 @@
     break;
 
   case 330:
-#line 3253 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3254 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!ExtractElementInst::isValidOperands((yyvsp[(2) - (4)].ValueVal), (yyvsp[(4) - (4)].ValueVal)))
       GEN_ERROR("Invalid extractelement operands");
@@ -6684,7 +6685,7 @@
     break;
 
   case 331:
-#line 3259 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3260 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!InsertElementInst::isValidOperands((yyvsp[(2) - (6)].ValueVal), (yyvsp[(4) - (6)].ValueVal), (yyvsp[(6) - (6)].ValueVal)))
       GEN_ERROR("Invalid insertelement operands");
@@ -6694,7 +6695,7 @@
     break;
 
   case 332:
-#line 3265 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3266 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!ShuffleVectorInst::isValidOperands((yyvsp[(2) - (6)].ValueVal), (yyvsp[(4) - (6)].ValueVal), (yyvsp[(6) - (6)].ValueVal)))
       GEN_ERROR("Invalid shufflevector operands");
@@ -6704,7 +6705,7 @@
     break;
 
   case 333:
-#line 3271 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3272 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const Type *Ty = (yyvsp[(2) - (2)].PHIList)->front().first->getType();
     if (!Ty->isFirstClassType())
@@ -6723,7 +6724,7 @@
     break;
 
   case 334:
-#line 3287 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3288 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
 
     // Handle the short syntax
@@ -6836,7 +6837,7 @@
     break;
 
   case 335:
-#line 3396 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3397 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.InstVal) = (yyvsp[(1) - (1)].InstVal);
     CHECK_FOR_ERROR
@@ -6844,7 +6845,7 @@
     break;
 
   case 336:
-#line 3401 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3402 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = true;
     CHECK_FOR_ERROR
@@ -6852,7 +6853,7 @@
     break;
 
   case 337:
-#line 3405 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3406 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = false;
     CHECK_FOR_ERROR
@@ -6860,7 +6861,7 @@
     break;
 
   case 338:
-#line 3412 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3413 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (3)].TypeVal))->getDescription());
@@ -6871,7 +6872,7 @@
     break;
 
   case 339:
-#line 3419 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3420 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (6)].TypeVal))->getDescription());
@@ -6885,7 +6886,7 @@
     break;
 
   case 340:
-#line 3429 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3430 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (3)].TypeVal))->getDescription());
@@ -6896,7 +6897,7 @@
     break;
 
   case 341:
-#line 3436 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3437 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (6)].TypeVal))->getDescription());
@@ -6910,7 +6911,7 @@
     break;
 
   case 342:
-#line 3446 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3447 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!isa((yyvsp[(2) - (2)].ValueVal)->getType()))
       GEN_ERROR("Trying to free nonpointer type " +
@@ -6921,7 +6922,7 @@
     break;
 
   case 343:
-#line 3454 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3455 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (5)].TypeVal))->getDescription());
@@ -6939,7 +6940,7 @@
     break;
 
   case 344:
-#line 3468 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3469 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(5) - (7)].TypeVal))->getDescription());
@@ -6960,7 +6961,7 @@
     break;
 
   case 345:
-#line 3485 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3486 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (5)].TypeVal))->getDescription());
@@ -6978,7 +6979,7 @@
     break;
 
   case 346:
-#line 3499 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3500 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (4)].TypeVal))->getDescription());
@@ -6997,7 +6998,7 @@
     break;
 
   case 347:
-#line 3514 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3515 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (4)].TypeVal))->getDescription());
@@ -7016,7 +7017,7 @@
     break;
 
   case 348:
-#line 3529 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3530 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (7)].TypeVal))->getDescription());
@@ -7038,7 +7039,7 @@
 
 
 /* Line 1267 of yacc.c.  */
-#line 7042 "llvmAsmParser.tab.c"
+#line 7043 "llvmAsmParser.tab.c"
       default: break;
     }
   YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
@@ -7252,7 +7253,7 @@
 }
 
 
-#line 3548 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3549 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
 
 
 // common code from the two 'RunVMAsmParser' functions

Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs?rev=58694&r1=58693&r2=58694&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs (original)
+++ llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs Tue Nov  4 08:28:33 2008
@@ -360,7 +360,7 @@
 
 #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
 typedef union YYSTYPE
-#line 981 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 982 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   llvm::Module                           *ModuleVal;
   llvm::Function                         *FunctionVal;

Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs?rev=58694&r1=58693&r2=58694&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs (original)
+++ llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Tue Nov  4 08:28:33 2008
@@ -418,6 +418,7 @@
 
     {
       APSInt Tmp = *D.ConstPoolInt;
+      D.destroy();
       Tmp.extOrTrunc(Ty->getPrimitiveSizeInBits());
       return ConstantInt::get(Tmp);
     }




From nunoplopes at sapo.pt  Tue Nov  4 08:42:20 2008
From: nunoplopes at sapo.pt (Nuno Lopes)
Date: Tue, 04 Nov 2008 14:42:20 -0000
Subject: [llvm-commits] [llvm] r58696 - in /llvm/trunk/lib/AsmParser:
 ParserInternals.h llvmAsmParser.y
Message-ID: <200811041442.mA4EgKGc011611@zion.cs.uiuc.edu>

Author: nlopes
Date: Tue Nov  4 08:42:19 2008
New Revision: 58696

URL: http://llvm.org/viewvc/llvm-project?rev=58696&view=rev
Log:
fix leakage of APFloats in getExistingVal()

Modified:
    llvm/trunk/lib/AsmParser/ParserInternals.h
    llvm/trunk/lib/AsmParser/llvmAsmParser.y

Modified: llvm/trunk/lib/AsmParser/ParserInternals.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/ParserInternals.h?rev=58696&r1=58695&r2=58696&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/ParserInternals.h (original)
+++ llvm/trunk/lib/AsmParser/ParserInternals.h Tue Nov  4 08:42:19 2008
@@ -152,6 +152,8 @@
       delete IAD;
     else if (Type == ConstAPInt)
       delete ConstPoolInt;
+    else if (Type == ConstFPVal)
+      delete ConstPoolFP;
   }
 
   inline ValID copy() const {

Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y?rev=58696&r1=58695&r2=58696&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/llvmAsmParser.y (original)
+++ llvm/trunk/lib/AsmParser/llvmAsmParser.y Tue Nov  4 08:42:19 2008
@@ -437,7 +437,11 @@
       D.ConstPoolFP->convert(APFloat::IEEEsingle, APFloat::rmNearestTiesToEven,
                              &ignored);
     }
-    return ConstantFP::get(*D.ConstPoolFP);
+    {
+      ConstantFP *tmp = ConstantFP::get(*D.ConstPoolFP);
+      D.destroy();
+      return tmp;
+    }
 
   case ValID::ConstNullVal:      // Is it a null value?
     if (!isa(Ty)) {




From nunoplopes at sapo.pt  Tue Nov  4 08:43:20 2008
From: nunoplopes at sapo.pt (Nuno Lopes)
Date: Tue, 04 Nov 2008 14:43:20 -0000
Subject: [llvm-commits] [llvm] r58697 - in /llvm/trunk/lib/AsmParser:
 llvmAsmParser.cpp.cvs llvmAsmParser.h.cvs llvmAsmParser.y.cvs
Message-ID: <200811041443.mA4EhLfv011653@zion.cs.uiuc.edu>

Author: nlopes
Date: Tue Nov  4 08:43:20 2008
New Revision: 58697

URL: http://llvm.org/viewvc/llvm-project?rev=58697&view=rev
Log:
regenerate

Modified:
    llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs
    llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs
    llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs

Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs?rev=58697&r1=58696&r2=58697&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs (original)
+++ llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs Tue Nov  4 08:43:20 2008
@@ -821,7 +821,11 @@
       D.ConstPoolFP->convert(APFloat::IEEEsingle, APFloat::rmNearestTiesToEven,
                              &ignored);
     }
-    return ConstantFP::get(*D.ConstPoolFP);
+    {
+      ConstantFP *tmp = ConstantFP::get(*D.ConstPoolFP);
+      D.destroy();
+      return tmp;
+    }
 
   case ValID::ConstNullVal:      // Is it a null value?
     if (!isa(Ty)) {
@@ -1383,7 +1387,7 @@
 
 #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
 typedef union YYSTYPE
-#line 982 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 986 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   llvm::Module                           *ModuleVal;
   llvm::Function                         *FunctionVal;
@@ -1432,7 +1436,7 @@
   llvm::FCmpInst::Predicate         FPredicate;
 }
 /* Line 187 of yacc.c.  */
-#line 1436 "llvmAsmParser.tab.c"
+#line 1440 "llvmAsmParser.tab.c"
 	YYSTYPE;
 # define yystype YYSTYPE /* obsolescent; will be withdrawn */
 # define YYSTYPE_IS_DECLARED 1
@@ -1445,7 +1449,7 @@
 
 
 /* Line 216 of yacc.c.  */
-#line 1449 "llvmAsmParser.tab.c"
+#line 1453 "llvmAsmParser.tab.c"
 
 #ifdef short
 # undef short
@@ -1889,41 +1893,41 @@
 /* YYRLINE[YYN] -- source line where rule number YYN was defined.  */
 static const yytype_uint16 yyrline[] =
 {
-       0,  1148,  1148,  1148,  1148,  1148,  1148,  1148,  1148,  1148,
-    1148,  1149,  1149,  1149,  1149,  1149,  1149,  1150,  1150,  1150,
-    1150,  1150,  1150,  1151,  1151,  1151,  1151,  1151,  1151,  1154,
-    1154,  1155,  1155,  1156,  1156,  1157,  1157,  1158,  1158,  1162,
-    1162,  1163,  1163,  1164,  1164,  1165,  1165,  1166,  1166,  1167,
-    1167,  1168,  1168,  1169,  1170,  1173,  1173,  1173,  1174,  1174,
-    1176,  1177,  1181,  1185,  1190,  1196,  1196,  1198,  1199,  1204,
-    1210,  1211,  1212,  1213,  1214,  1215,  1219,  1220,  1221,  1225,
-    1226,  1227,  1228,  1232,  1233,  1234,  1238,  1239,  1240,  1241,
-    1242,  1246,  1247,  1248,  1251,  1252,  1253,  1254,  1255,  1256,
-    1257,  1264,  1265,  1266,  1267,  1268,  1269,  1270,  1271,  1272,
-    1273,  1277,  1278,  1283,  1284,  1285,  1288,  1289,  1295,  1296,
-    1297,  1298,  1299,  1300,  1301,  1302,  1303,  1304,  1307,  1308,
-    1314,  1315,  1322,  1323,  1329,  1330,  1339,  1347,  1348,  1353,
-    1354,  1355,  1360,  1373,  1373,  1373,  1373,  1373,  1373,  1373,
-    1376,  1380,  1384,  1391,  1396,  1404,  1439,  1470,  1475,  1485,
-    1495,  1499,  1509,  1516,  1525,  1532,  1537,  1542,  1549,  1550,
-    1557,  1564,  1572,  1578,  1590,  1618,  1634,  1661,  1689,  1715,
-    1735,  1761,  1781,  1793,  1800,  1866,  1876,  1886,  1897,  1910,
-    1921,  1935,  1942,  1949,  1967,  1979,  2000,  2008,  2014,  2025,
-    2030,  2035,  2040,  2045,  2051,  2057,  2063,  2071,  2082,  2086,
-    2094,  2094,  2097,  2097,  2100,  2112,  2133,  2138,  2146,  2147,
-    2151,  2151,  2155,  2155,  2158,  2161,  2185,  2197,  2196,  2208,
-    2207,  2217,  2216,  2227,  2267,  2270,  2276,  2286,  2290,  2295,
-    2297,  2302,  2307,  2316,  2326,  2337,  2341,  2350,  2359,  2364,
-    2513,  2513,  2515,  2524,  2524,  2526,  2531,  2543,  2547,  2552,
-    2556,  2560,  2565,  2570,  2574,  2578,  2582,  2586,  2590,  2594,
-    2616,  2638,  2644,  2657,  2669,  2674,  2686,  2692,  2696,  2706,
-    2710,  2714,  2719,  2726,  2726,  2732,  2741,  2746,  2751,  2755,
-    2764,  2773,  2786,  2795,  2799,  2807,  2827,  2831,  2836,  2847,
-    2866,  2875,  2979,  2983,  2990,  3001,  3014,  3023,  3036,  3047,
-    3057,  3068,  3076,  3086,  3093,  3096,  3097,  3105,  3111,  3120,
-    3124,  3129,  3145,  3162,  3174,  3186,  3200,  3214,  3226,  3247,
-    3254,  3260,  3266,  3272,  3287,  3397,  3402,  3406,  3413,  3420,
-    3430,  3437,  3447,  3455,  3469,  3486,  3500,  3515,  3530
+       0,  1152,  1152,  1152,  1152,  1152,  1152,  1152,  1152,  1152,
+    1152,  1153,  1153,  1153,  1153,  1153,  1153,  1154,  1154,  1154,
+    1154,  1154,  1154,  1155,  1155,  1155,  1155,  1155,  1155,  1158,
+    1158,  1159,  1159,  1160,  1160,  1161,  1161,  1162,  1162,  1166,
+    1166,  1167,  1167,  1168,  1168,  1169,  1169,  1170,  1170,  1171,
+    1171,  1172,  1172,  1173,  1174,  1177,  1177,  1177,  1178,  1178,
+    1180,  1181,  1185,  1189,  1194,  1200,  1200,  1202,  1203,  1208,
+    1214,  1215,  1216,  1217,  1218,  1219,  1223,  1224,  1225,  1229,
+    1230,  1231,  1232,  1236,  1237,  1238,  1242,  1243,  1244,  1245,
+    1246,  1250,  1251,  1252,  1255,  1256,  1257,  1258,  1259,  1260,
+    1261,  1268,  1269,  1270,  1271,  1272,  1273,  1274,  1275,  1276,
+    1277,  1281,  1282,  1287,  1288,  1289,  1292,  1293,  1299,  1300,
+    1301,  1302,  1303,  1304,  1305,  1306,  1307,  1308,  1311,  1312,
+    1318,  1319,  1326,  1327,  1333,  1334,  1343,  1351,  1352,  1357,
+    1358,  1359,  1364,  1377,  1377,  1377,  1377,  1377,  1377,  1377,
+    1380,  1384,  1388,  1395,  1400,  1408,  1443,  1474,  1479,  1489,
+    1499,  1503,  1513,  1520,  1529,  1536,  1541,  1546,  1553,  1554,
+    1561,  1568,  1576,  1582,  1594,  1622,  1638,  1665,  1693,  1719,
+    1739,  1765,  1785,  1797,  1804,  1870,  1880,  1890,  1901,  1914,
+    1925,  1939,  1946,  1953,  1971,  1983,  2004,  2012,  2018,  2029,
+    2034,  2039,  2044,  2049,  2055,  2061,  2067,  2075,  2086,  2090,
+    2098,  2098,  2101,  2101,  2104,  2116,  2137,  2142,  2150,  2151,
+    2155,  2155,  2159,  2159,  2162,  2165,  2189,  2201,  2200,  2212,
+    2211,  2221,  2220,  2231,  2271,  2274,  2280,  2290,  2294,  2299,
+    2301,  2306,  2311,  2320,  2330,  2341,  2345,  2354,  2363,  2368,
+    2517,  2517,  2519,  2528,  2528,  2530,  2535,  2547,  2551,  2556,
+    2560,  2564,  2569,  2574,  2578,  2582,  2586,  2590,  2594,  2598,
+    2620,  2642,  2648,  2661,  2673,  2678,  2690,  2696,  2700,  2710,
+    2714,  2718,  2723,  2730,  2730,  2736,  2745,  2750,  2755,  2759,
+    2768,  2777,  2790,  2799,  2803,  2811,  2831,  2835,  2840,  2851,
+    2870,  2879,  2983,  2987,  2994,  3005,  3018,  3027,  3040,  3051,
+    3061,  3072,  3080,  3090,  3097,  3100,  3101,  3109,  3115,  3124,
+    3128,  3133,  3149,  3166,  3178,  3190,  3204,  3218,  3230,  3251,
+    3258,  3264,  3270,  3276,  3291,  3401,  3406,  3410,  3417,  3424,
+    3434,  3441,  3451,  3459,  3473,  3490,  3504,  3519,  3534
 };
 #endif
 
@@ -3649,152 +3653,152 @@
   switch (yyn)
     {
         case 29:
-#line 1154 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1158 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_EQ; ;}
     break;
 
   case 30:
-#line 1154 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1158 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_NE; ;}
     break;
 
   case 31:
-#line 1155 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1159 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_SLT; ;}
     break;
 
   case 32:
-#line 1155 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1159 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_SGT; ;}
     break;
 
   case 33:
-#line 1156 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1160 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_SLE; ;}
     break;
 
   case 34:
-#line 1156 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1160 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_SGE; ;}
     break;
 
   case 35:
-#line 1157 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1161 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_ULT; ;}
     break;
 
   case 36:
-#line 1157 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1161 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_UGT; ;}
     break;
 
   case 37:
-#line 1158 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1162 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_ULE; ;}
     break;
 
   case 38:
-#line 1158 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1162 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.IPredicate) = ICmpInst::ICMP_UGE; ;}
     break;
 
   case 39:
-#line 1162 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1166 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_OEQ; ;}
     break;
 
   case 40:
-#line 1162 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1166 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_ONE; ;}
     break;
 
   case 41:
-#line 1163 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1167 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_OLT; ;}
     break;
 
   case 42:
-#line 1163 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1167 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_OGT; ;}
     break;
 
   case 43:
-#line 1164 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1168 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_OLE; ;}
     break;
 
   case 44:
-#line 1164 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1168 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_OGE; ;}
     break;
 
   case 45:
-#line 1165 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1169 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_ORD; ;}
     break;
 
   case 46:
-#line 1165 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1169 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_UNO; ;}
     break;
 
   case 47:
-#line 1166 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1170 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_UEQ; ;}
     break;
 
   case 48:
-#line 1166 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1170 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_UNE; ;}
     break;
 
   case 49:
-#line 1167 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1171 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_ULT; ;}
     break;
 
   case 50:
-#line 1167 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1171 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_UGT; ;}
     break;
 
   case 51:
-#line 1168 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1172 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_ULE; ;}
     break;
 
   case 52:
-#line 1168 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1172 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_UGE; ;}
     break;
 
   case 53:
-#line 1169 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1173 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_TRUE; ;}
     break;
 
   case 54:
-#line 1170 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1174 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.FPredicate) = FCmpInst::FCMP_FALSE; ;}
     break;
 
   case 59:
-#line 1174 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1178 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.StrVal) = 0; ;}
     break;
 
   case 60:
-#line 1176 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1180 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal)=(yyvsp[(3) - (4)].UInt64Val); ;}
     break;
 
   case 61:
-#line 1177 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1181 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal)=0; ;}
     break;
 
   case 62:
-#line 1181 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1185 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.StrVal) = (yyvsp[(1) - (2)].StrVal);
     CHECK_FOR_ERROR
@@ -3802,7 +3806,7 @@
     break;
 
   case 63:
-#line 1185 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1189 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.StrVal) = 0;
     CHECK_FOR_ERROR
@@ -3810,7 +3814,7 @@
     break;
 
   case 64:
-#line 1190 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1194 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   (yyval.UIntVal) = (yyvsp[(1) - (2)].UIntVal);
   CHECK_FOR_ERROR
@@ -3818,7 +3822,7 @@
     break;
 
   case 68:
-#line 1199 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1203 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.StrVal) = 0;
     CHECK_FOR_ERROR
@@ -3826,7 +3830,7 @@
     break;
 
   case 69:
-#line 1204 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1208 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.StrVal) = (yyvsp[(1) - (2)].StrVal);
     CHECK_FOR_ERROR
@@ -3834,157 +3838,157 @@
     break;
 
   case 70:
-#line 1210 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1214 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::InternalLinkage; ;}
     break;
 
   case 71:
-#line 1211 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1215 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::WeakLinkage; ;}
     break;
 
   case 72:
-#line 1212 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1216 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;}
     break;
 
   case 73:
-#line 1213 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1217 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::AppendingLinkage; ;}
     break;
 
   case 74:
-#line 1214 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1218 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;}
     break;
 
   case 75:
-#line 1215 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1219 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::CommonLinkage; ;}
     break;
 
   case 76:
-#line 1219 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1223 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;}
     break;
 
   case 77:
-#line 1220 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1224 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;}
     break;
 
   case 78:
-#line 1221 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1225 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;}
     break;
 
   case 79:
-#line 1225 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1229 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Visibility) = GlobalValue::DefaultVisibility;   ;}
     break;
 
   case 80:
-#line 1226 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1230 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Visibility) = GlobalValue::DefaultVisibility;   ;}
     break;
 
   case 81:
-#line 1227 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1231 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Visibility) = GlobalValue::HiddenVisibility;    ;}
     break;
 
   case 82:
-#line 1228 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1232 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Visibility) = GlobalValue::ProtectedVisibility; ;}
     break;
 
   case 83:
-#line 1232 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1236 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;}
     break;
 
   case 84:
-#line 1233 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1237 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::DLLImportLinkage; ;}
     break;
 
   case 85:
-#line 1234 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1238 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalWeakLinkage; ;}
     break;
 
   case 86:
-#line 1238 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1242 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;}
     break;
 
   case 87:
-#line 1239 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1243 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::InternalLinkage; ;}
     break;
 
   case 88:
-#line 1240 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1244 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::LinkOnceLinkage; ;}
     break;
 
   case 89:
-#line 1241 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1245 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::WeakLinkage; ;}
     break;
 
   case 90:
-#line 1242 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1246 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::DLLExportLinkage; ;}
     break;
 
   case 91:
-#line 1246 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1250 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::ExternalLinkage; ;}
     break;
 
   case 92:
-#line 1247 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1251 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::WeakLinkage; ;}
     break;
 
   case 93:
-#line 1248 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1252 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Linkage) = GlobalValue::InternalLinkage; ;}
     break;
 
   case 94:
-#line 1251 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1255 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::C; ;}
     break;
 
   case 95:
-#line 1252 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1256 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::C; ;}
     break;
 
   case 96:
-#line 1253 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1257 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::Fast; ;}
     break;
 
   case 97:
-#line 1254 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1258 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::Cold; ;}
     break;
 
   case 98:
-#line 1255 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1259 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::X86_StdCall; ;}
     break;
 
   case 99:
-#line 1256 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1260 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = CallingConv::X86_FastCall; ;}
     break;
 
   case 100:
-#line 1257 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1261 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
                    if ((unsigned)(yyvsp[(2) - (2)].UInt64Val) != (yyvsp[(2) - (2)].UInt64Val))
                      GEN_ERROR("Calling conv too large");
@@ -3994,176 +3998,176 @@
     break;
 
   case 101:
-#line 1264 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1268 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::ZExt;      ;}
     break;
 
   case 102:
-#line 1265 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1269 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::ZExt;      ;}
     break;
 
   case 103:
-#line 1266 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1270 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::SExt;      ;}
     break;
 
   case 104:
-#line 1267 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1271 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::SExt;      ;}
     break;
 
   case 105:
-#line 1268 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1272 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::InReg;     ;}
     break;
 
   case 106:
-#line 1269 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1273 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::StructRet; ;}
     break;
 
   case 107:
-#line 1270 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1274 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::NoAlias;   ;}
     break;
 
   case 108:
-#line 1271 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1275 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::ByVal;     ;}
     break;
 
   case 109:
-#line 1272 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1276 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::Nest;      ;}
     break;
 
   case 110:
-#line 1273 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1277 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) =
                           Attribute::constructAlignmentFromInt((yyvsp[(2) - (2)].UInt64Val));    ;}
     break;
 
   case 111:
-#line 1277 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1281 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::None; ;}
     break;
 
   case 112:
-#line 1278 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1282 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
                 (yyval.Attributes) = (yyvsp[(1) - (2)].Attributes) | (yyvsp[(2) - (2)].Attributes);
               ;}
     break;
 
   case 113:
-#line 1283 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1287 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::InReg;     ;}
     break;
 
   case 114:
-#line 1284 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1288 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::ZExt;     ;}
     break;
 
   case 115:
-#line 1285 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1289 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::SExt;     ;}
     break;
 
   case 116:
-#line 1288 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1292 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::None; ;}
     break;
 
   case 117:
-#line 1289 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1293 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
                (yyval.Attributes) = (yyvsp[(1) - (2)].Attributes) | (yyvsp[(2) - (2)].Attributes);
              ;}
     break;
 
   case 118:
-#line 1295 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1299 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::NoReturn; ;}
     break;
 
   case 119:
-#line 1296 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1300 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::NoUnwind; ;}
     break;
 
   case 120:
-#line 1297 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1301 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::InReg;     ;}
     break;
 
   case 121:
-#line 1298 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1302 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::ZExt;     ;}
     break;
 
   case 122:
-#line 1299 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1303 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::SExt;     ;}
     break;
 
   case 123:
-#line 1300 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1304 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::ReadNone; ;}
     break;
 
   case 124:
-#line 1301 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1305 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::ReadOnly; ;}
     break;
 
   case 125:
-#line 1302 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1306 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::NoInline; ;}
     break;
 
   case 126:
-#line 1303 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1307 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::AlwaysInline; ;}
     break;
 
   case 127:
-#line 1304 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1308 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::OptimizeForSize; ;}
     break;
 
   case 128:
-#line 1307 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1311 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.Attributes) = Attribute::None; ;}
     break;
 
   case 129:
-#line 1308 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1312 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
                 (yyval.Attributes) = (yyvsp[(1) - (2)].Attributes) | (yyvsp[(2) - (2)].Attributes);
               ;}
     break;
 
   case 130:
-#line 1314 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1318 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.StrVal) = 0; ;}
     break;
 
   case 131:
-#line 1315 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1319 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
                 (yyval.StrVal) = (yyvsp[(2) - (2)].StrVal);
               ;}
     break;
 
   case 132:
-#line 1322 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1326 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = 0; ;}
     break;
 
   case 133:
-#line 1323 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1327 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   (yyval.UIntVal) = (yyvsp[(2) - (2)].UInt64Val);
   if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal)))
@@ -4173,12 +4177,12 @@
     break;
 
   case 134:
-#line 1329 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1333 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.UIntVal) = 0; ;}
     break;
 
   case 135:
-#line 1330 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1334 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   (yyval.UIntVal) = (yyvsp[(3) - (3)].UInt64Val);
   if ((yyval.UIntVal) != 0 && !isPowerOf2_32((yyval.UIntVal)))
@@ -4188,7 +4192,7 @@
     break;
 
   case 136:
-#line 1339 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1343 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   for (unsigned i = 0, e = (yyvsp[(2) - (2)].StrVal)->length(); i != e; ++i)
     if ((*(yyvsp[(2) - (2)].StrVal))[i] == '"' || (*(yyvsp[(2) - (2)].StrVal))[i] == '\\')
@@ -4199,27 +4203,27 @@
     break;
 
   case 137:
-#line 1347 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1351 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.StrVal) = 0; ;}
     break;
 
   case 138:
-#line 1348 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1352 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.StrVal) = (yyvsp[(1) - (1)].StrVal); ;}
     break;
 
   case 139:
-#line 1353 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1357 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {;}
     break;
 
   case 140:
-#line 1354 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1358 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {;}
     break;
 
   case 141:
-#line 1355 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1359 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurGV->setSection(*(yyvsp[(1) - (1)].StrVal));
     delete (yyvsp[(1) - (1)].StrVal);
@@ -4228,7 +4232,7 @@
     break;
 
   case 142:
-#line 1360 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1364 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(2) - (2)].UInt64Val) != 0 && !isPowerOf2_32((yyvsp[(2) - (2)].UInt64Val)))
       GEN_ERROR("Alignment must be a power of two");
@@ -4238,7 +4242,7 @@
     break;
 
   case 150:
-#line 1376 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1380 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeVal) = new PATypeHolder(OpaqueType::get());
     CHECK_FOR_ERROR
@@ -4246,7 +4250,7 @@
     break;
 
   case 151:
-#line 1380 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1384 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeVal) = new PATypeHolder((yyvsp[(1) - (1)].PrimType));
     CHECK_FOR_ERROR
@@ -4254,7 +4258,7 @@
     break;
 
   case 152:
-#line 1384 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1388 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                             // Pointer type?
     if (*(yyvsp[(1) - (3)].TypeVal) == Type::LabelTy)
       GEN_ERROR("Cannot form a pointer to a basic block");
@@ -4265,7 +4269,7 @@
     break;
 
   case 153:
-#line 1391 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1395 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {            // Named types are also simple types...
     const Type* tmp = getTypeVal((yyvsp[(1) - (1)].ValIDVal));
     CHECK_FOR_ERROR
@@ -4274,7 +4278,7 @@
     break;
 
   case 154:
-#line 1396 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1400 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                   // Type UpReference
     if ((yyvsp[(2) - (2)].UInt64Val) > (uint64_t)~0U) GEN_ERROR("Value out of range");
     OpaqueType *OT = OpaqueType::get();        // Use temporary placeholder
@@ -4286,7 +4290,7 @@
     break;
 
   case 155:
-#line 1404 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1408 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // Allow but ignore attributes on function types; this permits auto-upgrade.
     // FIXME: remove in LLVM 3.0.
@@ -4325,7 +4329,7 @@
     break;
 
   case 156:
-#line 1439 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1443 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // Allow but ignore attributes on function types; this permits auto-upgrade.
     // FIXME: remove in LLVM 3.0.
@@ -4359,7 +4363,7 @@
     break;
 
   case 157:
-#line 1470 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1474 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {          // Sized array type?
     (yyval.TypeVal) = new PATypeHolder(HandleUpRefs(ArrayType::get(*(yyvsp[(4) - (5)].TypeVal), (yyvsp[(2) - (5)].UInt64Val))));
     delete (yyvsp[(4) - (5)].TypeVal);
@@ -4368,7 +4372,7 @@
     break;
 
   case 158:
-#line 1475 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1479 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {          // Vector type?
      const llvm::Type* ElemTy = (yyvsp[(4) - (5)].TypeVal)->get();
      if ((unsigned)(yyvsp[(2) - (5)].UInt64Val) != (yyvsp[(2) - (5)].UInt64Val))
@@ -4382,7 +4386,7 @@
     break;
 
   case 159:
-#line 1485 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1489 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                        // Structure type?
     std::vector Elements;
     for (std::list::iterator I = (yyvsp[(2) - (3)].TypeList)->begin(),
@@ -4396,7 +4400,7 @@
     break;
 
   case 160:
-#line 1495 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1499 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                                  // Empty structure type?
     (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector()));
     CHECK_FOR_ERROR
@@ -4404,7 +4408,7 @@
     break;
 
   case 161:
-#line 1499 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1503 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     std::vector Elements;
     for (std::list::iterator I = (yyvsp[(3) - (5)].TypeList)->begin(),
@@ -4418,7 +4422,7 @@
     break;
 
   case 162:
-#line 1509 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1513 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                         // Empty structure type?
     (yyval.TypeVal) = new PATypeHolder(StructType::get(std::vector(), true));
     CHECK_FOR_ERROR
@@ -4426,7 +4430,7 @@
     break;
 
   case 163:
-#line 1516 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1520 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // Allow but ignore attributes on function types; this permits auto-upgrade.
     // FIXME: remove in LLVM 3.0.
@@ -4436,7 +4440,7 @@
     break;
 
   case 164:
-#line 1525 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1529 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (1)].TypeVal))->getDescription());
@@ -4447,14 +4451,14 @@
     break;
 
   case 165:
-#line 1532 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1536 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeVal) = new PATypeHolder(Type::VoidTy);
   ;}
     break;
 
   case 166:
-#line 1537 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1541 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeWithAttrsList) = new TypeWithAttrsList();
     (yyval.TypeWithAttrsList)->push_back((yyvsp[(1) - (1)].TypeWithAttrs));
@@ -4463,7 +4467,7 @@
     break;
 
   case 167:
-#line 1542 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1546 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     ((yyval.TypeWithAttrsList)=(yyvsp[(1) - (3)].TypeWithAttrsList))->push_back((yyvsp[(3) - (3)].TypeWithAttrs));
     CHECK_FOR_ERROR
@@ -4471,7 +4475,7 @@
     break;
 
   case 169:
-#line 1550 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1554 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeWithAttrsList)=(yyvsp[(1) - (3)].TypeWithAttrsList);
     TypeWithAttrs TWA; TWA.Attrs = Attribute::None;
@@ -4482,7 +4486,7 @@
     break;
 
   case 170:
-#line 1557 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1561 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeWithAttrsList) = new TypeWithAttrsList;
     TypeWithAttrs TWA; TWA.Attrs = Attribute::None;
@@ -4493,7 +4497,7 @@
     break;
 
   case 171:
-#line 1564 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1568 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeWithAttrsList) = new TypeWithAttrsList();
     CHECK_FOR_ERROR
@@ -4501,7 +4505,7 @@
     break;
 
   case 172:
-#line 1572 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1576 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TypeList) = new std::list();
     (yyval.TypeList)->push_back(*(yyvsp[(1) - (1)].TypeVal));
@@ -4511,7 +4515,7 @@
     break;
 
   case 173:
-#line 1578 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1582 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     ((yyval.TypeList)=(yyvsp[(1) - (3)].TypeList))->push_back(*(yyvsp[(3) - (3)].TypeVal));
     delete (yyvsp[(3) - (3)].TypeVal);
@@ -4520,7 +4524,7 @@
     break;
 
   case 174:
-#line 1590 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1594 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Nonempty unsized arr
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (4)].TypeVal))->getDescription());
@@ -4552,7 +4556,7 @@
     break;
 
   case 175:
-#line 1618 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1622 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription());
@@ -4572,7 +4576,7 @@
     break;
 
   case 176:
-#line 1634 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1638 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription());
@@ -4603,7 +4607,7 @@
     break;
 
   case 177:
-#line 1661 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1665 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Nonempty unsized arr
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (4)].TypeVal))->getDescription());
@@ -4635,7 +4639,7 @@
     break;
 
   case 178:
-#line 1689 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1693 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const StructType *STy = dyn_cast((yyvsp[(1) - (4)].TypeVal)->get());
     if (STy == 0)
@@ -4665,7 +4669,7 @@
     break;
 
   case 179:
-#line 1715 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1719 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription());
@@ -4689,7 +4693,7 @@
     break;
 
   case 180:
-#line 1735 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1739 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const StructType *STy = dyn_cast((yyvsp[(1) - (6)].TypeVal)->get());
     if (STy == 0)
@@ -4719,7 +4723,7 @@
     break;
 
   case 181:
-#line 1761 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1765 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (5)].TypeVal))->getDescription());
@@ -4743,7 +4747,7 @@
     break;
 
   case 182:
-#line 1781 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1785 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -4759,7 +4763,7 @@
     break;
 
   case 183:
-#line 1793 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1797 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -4770,7 +4774,7 @@
     break;
 
   case 184:
-#line 1800 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1804 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -4840,7 +4844,7 @@
     break;
 
   case 185:
-#line 1866 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1870 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -4854,7 +4858,7 @@
     break;
 
   case 186:
-#line 1876 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1880 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -4868,7 +4872,7 @@
     break;
 
   case 187:
-#line 1886 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1890 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // integral constants
     if (IntegerType *IT = dyn_cast((yyvsp[(1) - (2)].TypeVal)->get())) {
       if (!ConstantInt::isValueValidForType(IT, (yyvsp[(2) - (2)].SInt64Val)))
@@ -4883,7 +4887,7 @@
     break;
 
   case 188:
-#line 1897 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1901 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // arbitrary precision integer constants
     if (IntegerType *IT = dyn_cast((yyvsp[(1) - (2)].TypeVal)->get())) {
       if ((yyvsp[(2) - (2)].APIntVal)->getBitWidth() > IT->getBitWidth())
@@ -4900,7 +4904,7 @@
     break;
 
   case 189:
-#line 1910 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1914 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // integral constants
     if (IntegerType *IT = dyn_cast((yyvsp[(1) - (2)].TypeVal)->get())) {
       if (!ConstantInt::isValueValidForType(IT, (yyvsp[(2) - (2)].UInt64Val)))
@@ -4915,7 +4919,7 @@
     break;
 
   case 190:
-#line 1921 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1925 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // arbitrary precision integer constants
     if (IntegerType *IT = dyn_cast((yyvsp[(1) - (2)].TypeVal)->get())) {
       if ((yyvsp[(2) - (2)].APIntVal)->getBitWidth() > IT->getBitWidth())
@@ -4933,7 +4937,7 @@
     break;
 
   case 191:
-#line 1935 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1939 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                      // Boolean constants
     if ((yyvsp[(1) - (2)].TypeVal)->get() != Type::Int1Ty)
       GEN_ERROR("Constant true must have type i1");
@@ -4944,7 +4948,7 @@
     break;
 
   case 192:
-#line 1942 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1946 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                     // Boolean constants
     if ((yyvsp[(1) - (2)].TypeVal)->get() != Type::Int1Ty)
       GEN_ERROR("Constant false must have type i1");
@@ -4955,7 +4959,7 @@
     break;
 
   case 193:
-#line 1949 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1953 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                   // Floating point constants
     if (!ConstantFP::isValueValidForType((yyvsp[(1) - (2)].TypeVal)->get(), *(yyvsp[(2) - (2)].FPVal)))
       GEN_ERROR("Floating point constant invalid for type");
@@ -4975,7 +4979,7 @@
     break;
 
   case 194:
-#line 1967 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1971 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(5) - (6)].TypeVal))->getDescription());
@@ -4991,7 +4995,7 @@
     break;
 
   case 195:
-#line 1979 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 1983 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!isa((yyvsp[(3) - (5)].ConstVal)->getType()))
       GEN_ERROR("GetElementPtr requires a pointer operand");
@@ -5016,7 +5020,7 @@
     break;
 
   case 196:
-#line 2000 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2004 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(3) - (8)].ConstVal)->getType() != Type::Int1Ty)
       GEN_ERROR("Select condition must be of boolean type");
@@ -5028,7 +5032,7 @@
     break;
 
   case 197:
-#line 2008 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2012 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(3) - (6)].ConstVal)->getType() != (yyvsp[(5) - (6)].ConstVal)->getType())
       GEN_ERROR("Binary operator types must match");
@@ -5038,7 +5042,7 @@
     break;
 
   case 198:
-#line 2014 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2018 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(3) - (6)].ConstVal)->getType() != (yyvsp[(5) - (6)].ConstVal)->getType())
       GEN_ERROR("Logical operator types must match");
@@ -5053,7 +5057,7 @@
     break;
 
   case 199:
-#line 2025 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2029 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType())
       GEN_ERROR("icmp operand types must match");
@@ -5062,7 +5066,7 @@
     break;
 
   case 200:
-#line 2030 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2034 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType())
       GEN_ERROR("fcmp operand types must match");
@@ -5071,7 +5075,7 @@
     break;
 
   case 201:
-#line 2035 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2039 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType())
       GEN_ERROR("vicmp operand types must match");
@@ -5080,7 +5084,7 @@
     break;
 
   case 202:
-#line 2040 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2044 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(4) - (7)].ConstVal)->getType() != (yyvsp[(6) - (7)].ConstVal)->getType())
       GEN_ERROR("vfcmp operand types must match");
@@ -5089,7 +5093,7 @@
     break;
 
   case 203:
-#line 2045 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2049 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!ExtractElementInst::isValidOperands((yyvsp[(3) - (6)].ConstVal), (yyvsp[(5) - (6)].ConstVal)))
       GEN_ERROR("Invalid extractelement operands");
@@ -5099,7 +5103,7 @@
     break;
 
   case 204:
-#line 2051 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2055 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!InsertElementInst::isValidOperands((yyvsp[(3) - (8)].ConstVal), (yyvsp[(5) - (8)].ConstVal), (yyvsp[(7) - (8)].ConstVal)))
       GEN_ERROR("Invalid insertelement operands");
@@ -5109,7 +5113,7 @@
     break;
 
   case 205:
-#line 2057 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2061 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!ShuffleVectorInst::isValidOperands((yyvsp[(3) - (8)].ConstVal), (yyvsp[(5) - (8)].ConstVal), (yyvsp[(7) - (8)].ConstVal)))
       GEN_ERROR("Invalid shufflevector operands");
@@ -5119,7 +5123,7 @@
     break;
 
   case 206:
-#line 2063 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2067 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!isa((yyvsp[(3) - (5)].ConstVal)->getType()) && !isa((yyvsp[(3) - (5)].ConstVal)->getType()))
       GEN_ERROR("ExtractValue requires an aggregate operand");
@@ -5131,7 +5135,7 @@
     break;
 
   case 207:
-#line 2071 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2075 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!isa((yyvsp[(3) - (7)].ConstVal)->getType()) && !isa((yyvsp[(3) - (7)].ConstVal)->getType()))
       GEN_ERROR("InsertValue requires an aggregate operand");
@@ -5143,7 +5147,7 @@
     break;
 
   case 208:
-#line 2082 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2086 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     ((yyval.ConstVector) = (yyvsp[(1) - (3)].ConstVector))->push_back((yyvsp[(3) - (3)].ConstVal));
     CHECK_FOR_ERROR
@@ -5151,7 +5155,7 @@
     break;
 
   case 209:
-#line 2086 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2090 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ConstVector) = new std::vector();
     (yyval.ConstVector)->push_back((yyvsp[(1) - (1)].ConstVal));
@@ -5160,27 +5164,27 @@
     break;
 
   case 210:
-#line 2094 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2098 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.BoolVal) = false; ;}
     break;
 
   case 211:
-#line 2094 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2098 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.BoolVal) = true; ;}
     break;
 
   case 212:
-#line 2097 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2101 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.BoolVal) = true; ;}
     break;
 
   case 213:
-#line 2097 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2101 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.BoolVal) = false; ;}
     break;
 
   case 214:
-#line 2100 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2104 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const Type* VTy = (yyvsp[(1) - (2)].TypeVal)->get();
     Value *V = getVal(VTy, (yyvsp[(2) - (2)].ValIDVal));
@@ -5196,7 +5200,7 @@
     break;
 
   case 215:
-#line 2112 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2116 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     Constant *Val = (yyvsp[(3) - (6)].ConstVal);
     const Type *DestTy = (yyvsp[(5) - (6)].TypeVal)->get();
@@ -5212,7 +5216,7 @@
     break;
 
   case 216:
-#line 2133 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2137 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule;
     CurModule.ModuleDone();
@@ -5221,7 +5225,7 @@
     break;
 
   case 217:
-#line 2138 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2142 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ModuleVal) = ParserResult = CurModule.CurrentModule;
     CurModule.ModuleDone();
@@ -5230,12 +5234,12 @@
     break;
 
   case 220:
-#line 2151 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2155 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { CurFun.isDeclare = false; ;}
     break;
 
   case 221:
-#line 2151 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2155 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurFun.FunctionDone();
     CHECK_FOR_ERROR
@@ -5243,26 +5247,26 @@
     break;
 
   case 222:
-#line 2155 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2159 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { CurFun.isDeclare = true; ;}
     break;
 
   case 223:
-#line 2155 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2159 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CHECK_FOR_ERROR
   ;}
     break;
 
   case 224:
-#line 2158 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2162 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CHECK_FOR_ERROR
   ;}
     break;
 
   case 225:
-#line 2161 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2165 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (3)].TypeVal))->getDescription());
@@ -5290,7 +5294,7 @@
     break;
 
   case 226:
-#line 2185 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2189 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     ResolveTypeTo((yyvsp[(1) - (3)].StrVal), (yyvsp[(3) - (3)].PrimType));
 
@@ -5305,7 +5309,7 @@
     break;
 
   case 227:
-#line 2197 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2201 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     /* "Externally Visible" Linkage */
     if ((yyvsp[(5) - (6)].ConstVal) == 0)
@@ -5317,14 +5321,14 @@
     break;
 
   case 228:
-#line 2204 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2208 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurGV = 0;
   ;}
     break;
 
   case 229:
-#line 2208 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2212 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if ((yyvsp[(6) - (7)].ConstVal) == 0)
       GEN_ERROR("Global value initializer is not a constant");
@@ -5334,14 +5338,14 @@
     break;
 
   case 230:
-#line 2213 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2217 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurGV = 0;
   ;}
     break;
 
   case 231:
-#line 2217 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2221 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(6) - (7)].TypeVal))->getDescription());
@@ -5352,7 +5356,7 @@
     break;
 
   case 232:
-#line 2223 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2227 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurGV = 0;
     CHECK_FOR_ERROR
@@ -5360,7 +5364,7 @@
     break;
 
   case 233:
-#line 2227 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2231 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     std::string Name;
     if ((yyvsp[(1) - (5)].StrVal)) {
@@ -5404,21 +5408,21 @@
     break;
 
   case 234:
-#line 2267 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2271 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CHECK_FOR_ERROR
   ;}
     break;
 
   case 235:
-#line 2270 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2274 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CHECK_FOR_ERROR
   ;}
     break;
 
   case 236:
-#line 2276 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2280 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   const std::string &AsmSoFar = CurModule.CurrentModule->getModuleInlineAsm();
   if (AsmSoFar.empty())
@@ -5431,7 +5435,7 @@
     break;
 
   case 237:
-#line 2286 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2290 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurModule.CurrentModule->setTargetTriple(*(yyvsp[(3) - (3)].StrVal));
     delete (yyvsp[(3) - (3)].StrVal);
@@ -5439,7 +5443,7 @@
     break;
 
   case 238:
-#line 2290 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2294 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurModule.CurrentModule->setDataLayout(*(yyvsp[(3) - (3)].StrVal));
     delete (yyvsp[(3) - (3)].StrVal);
@@ -5447,7 +5451,7 @@
     break;
 
   case 240:
-#line 2297 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2301 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
           CurModule.CurrentModule->addLibrary(*(yyvsp[(3) - (3)].StrVal));
           delete (yyvsp[(3) - (3)].StrVal);
@@ -5456,7 +5460,7 @@
     break;
 
   case 241:
-#line 2302 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2306 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
           CurModule.CurrentModule->addLibrary(*(yyvsp[(1) - (1)].StrVal));
           delete (yyvsp[(1) - (1)].StrVal);
@@ -5465,14 +5469,14 @@
     break;
 
   case 242:
-#line 2307 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2311 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
           CHECK_FOR_ERROR
         ;}
     break;
 
   case 243:
-#line 2316 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2320 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (5)].TypeVal))->getDescription());
@@ -5486,7 +5490,7 @@
     break;
 
   case 244:
-#line 2326 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2330 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (3)].TypeVal))->getDescription());
@@ -5500,7 +5504,7 @@
     break;
 
   case 245:
-#line 2337 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2341 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ArgList) = (yyvsp[(1) - (1)].ArgList);
     CHECK_FOR_ERROR
@@ -5508,7 +5512,7 @@
     break;
 
   case 246:
-#line 2341 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2345 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ArgList) = (yyvsp[(1) - (3)].ArgList);
     struct ArgListEntry E;
@@ -5521,7 +5525,7 @@
     break;
 
   case 247:
-#line 2350 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2354 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ArgList) = new ArgListType;
     struct ArgListEntry E;
@@ -5534,7 +5538,7 @@
     break;
 
   case 248:
-#line 2359 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2363 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ArgList) = 0;
     CHECK_FOR_ERROR
@@ -5542,7 +5546,7 @@
     break;
 
   case 249:
-#line 2365 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2369 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   std::string FunctionName(*(yyvsp[(4) - (11)].StrVal));
   delete (yyvsp[(4) - (11)].StrVal);  // Free strdup'd memory!
@@ -5693,7 +5697,7 @@
     break;
 
   case 252:
-#line 2515 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2519 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   (yyval.FunctionVal) = CurFun.CurrentFunction;
 
@@ -5705,7 +5709,7 @@
     break;
 
   case 255:
-#line 2526 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2530 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal);
   CHECK_FOR_ERROR
@@ -5713,7 +5717,7 @@
     break;
 
   case 256:
-#line 2531 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2535 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CurFun.CurrentFunction->setLinkage((yyvsp[(1) - (3)].Linkage));
     CurFun.CurrentFunction->setVisibility((yyvsp[(2) - (3)].Visibility));
@@ -5724,7 +5728,7 @@
     break;
 
   case 257:
-#line 2543 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2547 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = false;
     CHECK_FOR_ERROR
@@ -5732,7 +5736,7 @@
     break;
 
   case 258:
-#line 2547 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2551 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = true;
     CHECK_FOR_ERROR
@@ -5740,7 +5744,7 @@
     break;
 
   case 259:
-#line 2552 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2556 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {    // A reference to a direct constant
     (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].SInt64Val));
     CHECK_FOR_ERROR
@@ -5748,7 +5752,7 @@
     break;
 
   case 260:
-#line 2556 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2560 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].UInt64Val));
     CHECK_FOR_ERROR
@@ -5756,7 +5760,7 @@
     break;
 
   case 261:
-#line 2560 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2564 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // arbitrary precision integer constants
     (yyval.ValIDVal) = ValID::create(*(yyvsp[(1) - (1)].APIntVal), true);
     delete (yyvsp[(1) - (1)].APIntVal);
@@ -5765,7 +5769,7 @@
     break;
 
   case 262:
-#line 2565 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2569 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {      // arbitrary precision integer constants
     (yyval.ValIDVal) = ValID::create(*(yyvsp[(1) - (1)].APIntVal), false);
     delete (yyvsp[(1) - (1)].APIntVal);
@@ -5774,7 +5778,7 @@
     break;
 
   case 263:
-#line 2570 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2574 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                     // Perhaps it's an FP constant?
     (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].FPVal));
     CHECK_FOR_ERROR
@@ -5782,7 +5786,7 @@
     break;
 
   case 264:
-#line 2574 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2578 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::create(ConstantInt::getTrue());
     CHECK_FOR_ERROR
@@ -5790,7 +5794,7 @@
     break;
 
   case 265:
-#line 2578 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2582 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::create(ConstantInt::getFalse());
     CHECK_FOR_ERROR
@@ -5798,7 +5802,7 @@
     break;
 
   case 266:
-#line 2582 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2586 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::createNull();
     CHECK_FOR_ERROR
@@ -5806,7 +5810,7 @@
     break;
 
   case 267:
-#line 2586 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2590 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::createUndef();
     CHECK_FOR_ERROR
@@ -5814,7 +5818,7 @@
     break;
 
   case 268:
-#line 2590 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2594 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {     // A vector zero constant.
     (yyval.ValIDVal) = ValID::createZeroInit();
     CHECK_FOR_ERROR
@@ -5822,7 +5826,7 @@
     break;
 
   case 269:
-#line 2594 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2598 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Nonempty unsized packed vector
     const Type *ETy = (*(yyvsp[(2) - (3)].ConstVector))[0]->getType();
     unsigned NumElements = (yyvsp[(2) - (3)].ConstVector)->size();
@@ -5848,7 +5852,7 @@
     break;
 
   case 270:
-#line 2616 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2620 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Nonempty unsized arr
     const Type *ETy = (*(yyvsp[(2) - (3)].ConstVector))[0]->getType();
     uint64_t NumElements = (yyvsp[(2) - (3)].ConstVector)->size();
@@ -5874,7 +5878,7 @@
     break;
 
   case 271:
-#line 2638 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2642 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // Use undef instead of an array because it's inconvenient to determine
     // the element type at this point, there being no elements to examine.
@@ -5884,7 +5888,7 @@
     break;
 
   case 272:
-#line 2644 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2648 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     uint64_t NumElements = (yyvsp[(2) - (2)].StrVal)->length();
     const Type *ETy = Type::Int8Ty;
@@ -5901,7 +5905,7 @@
     break;
 
   case 273:
-#line 2657 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2661 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     std::vector Elements((yyvsp[(2) - (3)].ConstVector)->size());
     for (unsigned i = 0, e = (yyvsp[(2) - (3)].ConstVector)->size(); i != e; ++i)
@@ -5917,7 +5921,7 @@
     break;
 
   case 274:
-#line 2669 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2673 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const StructType *STy = StructType::get(std::vector());
     (yyval.ValIDVal) = ValID::create(ConstantStruct::get(STy, std::vector()));
@@ -5926,7 +5930,7 @@
     break;
 
   case 275:
-#line 2674 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2678 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     std::vector Elements((yyvsp[(3) - (5)].ConstVector)->size());
     for (unsigned i = 0, e = (yyvsp[(3) - (5)].ConstVector)->size(); i != e; ++i)
@@ -5942,7 +5946,7 @@
     break;
 
   case 276:
-#line 2686 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2690 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const StructType *STy = StructType::get(std::vector(),
                                             /*isPacked=*/true);
@@ -5952,7 +5956,7 @@
     break;
 
   case 277:
-#line 2692 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2696 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::create((yyvsp[(1) - (1)].ConstVal));
     CHECK_FOR_ERROR
@@ -5960,7 +5964,7 @@
     break;
 
   case 278:
-#line 2696 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2700 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::createInlineAsm(*(yyvsp[(3) - (5)].StrVal), *(yyvsp[(5) - (5)].StrVal), (yyvsp[(2) - (5)].BoolVal));
     delete (yyvsp[(3) - (5)].StrVal);
@@ -5970,7 +5974,7 @@
     break;
 
   case 279:
-#line 2706 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2710 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {  // Is it an integer reference...?
     (yyval.ValIDVal) = ValID::createLocalID((yyvsp[(1) - (1)].UIntVal));
     CHECK_FOR_ERROR
@@ -5978,7 +5982,7 @@
     break;
 
   case 280:
-#line 2710 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2714 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValIDVal) = ValID::createGlobalID((yyvsp[(1) - (1)].UIntVal));
     CHECK_FOR_ERROR
@@ -5986,7 +5990,7 @@
     break;
 
   case 281:
-#line 2714 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2718 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                   // Is it a named reference...?
     (yyval.ValIDVal) = ValID::createLocalName(*(yyvsp[(1) - (1)].StrVal));
     delete (yyvsp[(1) - (1)].StrVal);
@@ -5995,7 +5999,7 @@
     break;
 
   case 282:
-#line 2719 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2723 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                   // Is it a named reference...?
     (yyval.ValIDVal) = ValID::createGlobalName(*(yyvsp[(1) - (1)].StrVal));
     delete (yyvsp[(1) - (1)].StrVal);
@@ -6004,7 +6008,7 @@
     break;
 
   case 285:
-#line 2732 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2736 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (2)].TypeVal))->getDescription());
@@ -6015,7 +6019,7 @@
     break;
 
   case 286:
-#line 2741 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2745 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValueList) = new std::vector();
     (yyval.ValueList)->push_back((yyvsp[(1) - (1)].ValueVal));
@@ -6024,7 +6028,7 @@
     break;
 
   case 287:
-#line 2746 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2750 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     ((yyval.ValueList)=(yyvsp[(1) - (3)].ValueList))->push_back((yyvsp[(3) - (3)].ValueVal));
     CHECK_FOR_ERROR
@@ -6032,7 +6036,7 @@
     break;
 
   case 288:
-#line 2751 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2755 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal);
     CHECK_FOR_ERROR
@@ -6040,7 +6044,7 @@
     break;
 
   case 289:
-#line 2755 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2759 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Do not allow functions with 0 basic blocks
     (yyval.FunctionVal) = (yyvsp[(1) - (2)].FunctionVal);
     CHECK_FOR_ERROR
@@ -6048,7 +6052,7 @@
     break;
 
   case 290:
-#line 2764 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2768 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     setValueName((yyvsp[(3) - (3)].TermInstVal), (yyvsp[(2) - (3)].StrVal));
     CHECK_FOR_ERROR
@@ -6060,7 +6064,7 @@
     break;
 
   case 291:
-#line 2773 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2777 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
   CHECK_FOR_ERROR
   int ValNum = InsertValue((yyvsp[(3) - (3)].TermInstVal));
@@ -6075,7 +6079,7 @@
     break;
 
   case 292:
-#line 2786 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2790 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (CastInst *CI1 = dyn_cast((yyvsp[(2) - (2)].InstVal)))
       if (CastInst *CI2 = dyn_cast(CI1->getOperand(0)))
@@ -6088,7 +6092,7 @@
     break;
 
   case 293:
-#line 2795 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2799 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {          // Empty space between instruction lists
     (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalID(CurFun.NextValNum));
     CHECK_FOR_ERROR
@@ -6096,7 +6100,7 @@
     break;
 
   case 294:
-#line 2799 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2803 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {             // Labelled (named) basic block
     (yyval.BasicBlockVal) = defineBBVal(ValID::createLocalName(*(yyvsp[(1) - (1)].StrVal)));
     delete (yyvsp[(1) - (1)].StrVal);
@@ -6106,7 +6110,7 @@
     break;
 
   case 295:
-#line 2807 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2811 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { // Return with a result...
     ValueList &VL = *(yyvsp[(2) - (2)].ValueList);
     assert(!VL.empty() && "Invalid ret operands!");
@@ -6130,7 +6134,7 @@
     break;
 
   case 296:
-#line 2827 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2831 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                                    // Return with no result...
     (yyval.TermInstVal) = ReturnInst::Create();
     CHECK_FOR_ERROR
@@ -6138,7 +6142,7 @@
     break;
 
   case 297:
-#line 2831 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2835 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {                           // Unconditional Branch...
     BasicBlock* tmpBB = getBBVal((yyvsp[(3) - (3)].ValIDVal));
     CHECK_FOR_ERROR
@@ -6147,7 +6151,7 @@
     break;
 
   case 298:
-#line 2836 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2840 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (cast((yyvsp[(2) - (9)].PrimType))->getBitWidth() != 1)
       GEN_ERROR("Branch condition must have type i1");
@@ -6162,7 +6166,7 @@
     break;
 
   case 299:
-#line 2847 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2851 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     Value* tmpVal = getVal((yyvsp[(2) - (9)].PrimType), (yyvsp[(3) - (9)].ValIDVal));
     CHECK_FOR_ERROR
@@ -6185,7 +6189,7 @@
     break;
 
   case 300:
-#line 2866 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2870 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     Value* tmpVal = getVal((yyvsp[(2) - (8)].PrimType), (yyvsp[(3) - (8)].ValIDVal));
     CHECK_FOR_ERROR
@@ -6198,7 +6202,7 @@
     break;
 
   case 301:
-#line 2876 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2880 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
 
     // Handle the short syntax
@@ -6305,7 +6309,7 @@
     break;
 
   case 302:
-#line 2979 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2983 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TermInstVal) = new UnwindInst();
     CHECK_FOR_ERROR
@@ -6313,7 +6317,7 @@
     break;
 
   case 303:
-#line 2983 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2987 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.TermInstVal) = new UnreachableInst();
     CHECK_FOR_ERROR
@@ -6321,7 +6325,7 @@
     break;
 
   case 304:
-#line 2990 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 2994 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.JumpTable) = (yyvsp[(1) - (6)].JumpTable);
     Constant *V = cast(getExistingVal((yyvsp[(2) - (6)].PrimType), (yyvsp[(3) - (6)].ValIDVal)));
@@ -6336,7 +6340,7 @@
     break;
 
   case 305:
-#line 3001 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3005 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.JumpTable) = new std::vector >();
     Constant *V = cast(getExistingVal((yyvsp[(1) - (5)].PrimType), (yyvsp[(2) - (5)].ValIDVal)));
@@ -6352,7 +6356,7 @@
     break;
 
   case 306:
-#line 3014 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3018 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // Is this definition named?? if so, assign the name...
     setValueName((yyvsp[(2) - (2)].InstVal), (yyvsp[(1) - (2)].StrVal));
@@ -6364,7 +6368,7 @@
     break;
 
   case 307:
-#line 3023 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3027 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     CHECK_FOR_ERROR
     int ValNum = InsertValue((yyvsp[(2) - (2)].InstVal));
@@ -6379,7 +6383,7 @@
     break;
 
   case 308:
-#line 3036 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3040 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {    // Used for PHI nodes
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(1) - (6)].TypeVal))->getDescription());
@@ -6394,7 +6398,7 @@
     break;
 
   case 309:
-#line 3047 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3051 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.PHIList) = (yyvsp[(1) - (7)].PHIList);
     Value* tmpVal = getVal((yyvsp[(1) - (7)].PHIList)->front().first->getType(), (yyvsp[(4) - (7)].ValIDVal));
@@ -6406,7 +6410,7 @@
     break;
 
   case 310:
-#line 3057 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3061 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // FIXME: Remove trailing OptAttributes in LLVM 3.0, it was a mistake in 2.0
     if (!UpRefs.empty())
@@ -6421,7 +6425,7 @@
     break;
 
   case 311:
-#line 3068 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3072 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // FIXME: Remove trailing OptAttributes in LLVM 3.0, it was a mistake in 2.0
     // Labels are only valid in ASMs
@@ -6433,7 +6437,7 @@
     break;
 
   case 312:
-#line 3076 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3080 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // FIXME: Remove trailing OptAttributes in LLVM 3.0, it was a mistake in 2.0
     if (!UpRefs.empty())
@@ -6447,7 +6451,7 @@
     break;
 
   case 313:
-#line 3086 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3090 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     // FIXME: Remove trailing OptAttributes in LLVM 3.0, it was a mistake in 2.0
     (yyval.ParamList) = (yyvsp[(1) - (6)].ParamList);
@@ -6458,17 +6462,17 @@
     break;
 
   case 314:
-#line 3093 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3097 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ParamList) = new ParamList(); ;}
     break;
 
   case 315:
-#line 3096 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3100 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     { (yyval.ValueList) = new std::vector(); ;}
     break;
 
   case 316:
-#line 3097 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3101 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ValueList) = (yyvsp[(1) - (3)].ValueList);
     (yyval.ValueList)->push_back((yyvsp[(3) - (3)].ValueVal));
@@ -6477,7 +6481,7 @@
     break;
 
   case 317:
-#line 3105 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3109 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ConstantList) = new std::vector();
     if ((unsigned)(yyvsp[(2) - (2)].UInt64Val) != (yyvsp[(2) - (2)].UInt64Val))
@@ -6487,7 +6491,7 @@
     break;
 
   case 318:
-#line 3111 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3115 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.ConstantList) = (yyvsp[(1) - (3)].ConstantList);
     if ((unsigned)(yyvsp[(3) - (3)].UInt64Val) != (yyvsp[(3) - (3)].UInt64Val))
@@ -6498,7 +6502,7 @@
     break;
 
   case 319:
-#line 3120 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3124 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = true;
     CHECK_FOR_ERROR
@@ -6506,7 +6510,7 @@
     break;
 
   case 320:
-#line 3124 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3128 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = false;
     CHECK_FOR_ERROR
@@ -6514,7 +6518,7 @@
     break;
 
   case 321:
-#line 3129 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3133 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (5)].TypeVal))->getDescription());
@@ -6534,7 +6538,7 @@
     break;
 
   case 322:
-#line 3145 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3149 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (5)].TypeVal))->getDescription());
@@ -6555,7 +6559,7 @@
     break;
 
   case 323:
-#line 3162 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3166 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription());
@@ -6571,7 +6575,7 @@
     break;
 
   case 324:
-#line 3174 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3178 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription());
@@ -6587,7 +6591,7 @@
     break;
 
   case 325:
-#line 3186 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3190 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription());
@@ -6605,7 +6609,7 @@
     break;
 
   case 326:
-#line 3200 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3204 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (6)].TypeVal))->getDescription());
@@ -6623,7 +6627,7 @@
     break;
 
   case 327:
-#line 3214 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3218 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(4) - (4)].TypeVal))->getDescription());
@@ -6639,7 +6643,7 @@
     break;
 
   case 328:
-#line 3226 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3230 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (isa((yyvsp[(2) - (6)].ValueVal)->getType())) {
       // vector select
@@ -6664,7 +6668,7 @@
     break;
 
   case 329:
-#line 3247 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3251 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(4) - (4)].TypeVal))->getDescription());
@@ -6675,7 +6679,7 @@
     break;
 
   case 330:
-#line 3254 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3258 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!ExtractElementInst::isValidOperands((yyvsp[(2) - (4)].ValueVal), (yyvsp[(4) - (4)].ValueVal)))
       GEN_ERROR("Invalid extractelement operands");
@@ -6685,7 +6689,7 @@
     break;
 
   case 331:
-#line 3260 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3264 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!InsertElementInst::isValidOperands((yyvsp[(2) - (6)].ValueVal), (yyvsp[(4) - (6)].ValueVal), (yyvsp[(6) - (6)].ValueVal)))
       GEN_ERROR("Invalid insertelement operands");
@@ -6695,7 +6699,7 @@
     break;
 
   case 332:
-#line 3266 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3270 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!ShuffleVectorInst::isValidOperands((yyvsp[(2) - (6)].ValueVal), (yyvsp[(4) - (6)].ValueVal), (yyvsp[(6) - (6)].ValueVal)))
       GEN_ERROR("Invalid shufflevector operands");
@@ -6705,7 +6709,7 @@
     break;
 
   case 333:
-#line 3272 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3276 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     const Type *Ty = (yyvsp[(2) - (2)].PHIList)->front().first->getType();
     if (!Ty->isFirstClassType())
@@ -6724,7 +6728,7 @@
     break;
 
   case 334:
-#line 3288 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3292 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
 
     // Handle the short syntax
@@ -6837,7 +6841,7 @@
     break;
 
   case 335:
-#line 3397 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3401 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.InstVal) = (yyvsp[(1) - (1)].InstVal);
     CHECK_FOR_ERROR
@@ -6845,7 +6849,7 @@
     break;
 
   case 336:
-#line 3402 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3406 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = true;
     CHECK_FOR_ERROR
@@ -6853,7 +6857,7 @@
     break;
 
   case 337:
-#line 3406 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3410 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     (yyval.BoolVal) = false;
     CHECK_FOR_ERROR
@@ -6861,7 +6865,7 @@
     break;
 
   case 338:
-#line 3413 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3417 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (3)].TypeVal))->getDescription());
@@ -6872,7 +6876,7 @@
     break;
 
   case 339:
-#line 3420 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3424 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (6)].TypeVal))->getDescription());
@@ -6886,7 +6890,7 @@
     break;
 
   case 340:
-#line 3430 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3434 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (3)].TypeVal))->getDescription());
@@ -6897,7 +6901,7 @@
     break;
 
   case 341:
-#line 3437 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3441 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (6)].TypeVal))->getDescription());
@@ -6911,7 +6915,7 @@
     break;
 
   case 342:
-#line 3447 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3451 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!isa((yyvsp[(2) - (2)].ValueVal)->getType()))
       GEN_ERROR("Trying to free nonpointer type " +
@@ -6922,7 +6926,7 @@
     break;
 
   case 343:
-#line 3455 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3459 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(3) - (5)].TypeVal))->getDescription());
@@ -6940,7 +6944,7 @@
     break;
 
   case 344:
-#line 3469 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3473 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(5) - (7)].TypeVal))->getDescription());
@@ -6961,7 +6965,7 @@
     break;
 
   case 345:
-#line 3486 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3490 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (5)].TypeVal))->getDescription());
@@ -6979,7 +6983,7 @@
     break;
 
   case 346:
-#line 3500 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3504 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (4)].TypeVal))->getDescription());
@@ -6998,7 +7002,7 @@
     break;
 
   case 347:
-#line 3515 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3519 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (4)].TypeVal))->getDescription());
@@ -7017,7 +7021,7 @@
     break;
 
   case 348:
-#line 3530 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3534 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
     {
     if (!UpRefs.empty())
       GEN_ERROR("Invalid upreference in type: " + (*(yyvsp[(2) - (7)].TypeVal))->getDescription());
@@ -7039,7 +7043,7 @@
 
 
 /* Line 1267 of yacc.c.  */
-#line 7043 "llvmAsmParser.tab.c"
+#line 7047 "llvmAsmParser.tab.c"
       default: break;
     }
   YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
@@ -7253,7 +7257,7 @@
 }
 
 
-#line 3549 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 3553 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
 
 
 // common code from the two 'RunVMAsmParser' functions

Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs?rev=58697&r1=58696&r2=58697&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs (original)
+++ llvm/trunk/lib/AsmParser/llvmAsmParser.h.cvs Tue Nov  4 08:43:20 2008
@@ -360,7 +360,7 @@
 
 #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
 typedef union YYSTYPE
-#line 982 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
+#line 986 "/cvs/llvm/lib/AsmParser/llvmAsmParser.y"
 {
   llvm::Module                           *ModuleVal;
   llvm::Function                         *FunctionVal;

Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs?rev=58697&r1=58696&r2=58697&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs (original)
+++ llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs Tue Nov  4 08:43:20 2008
@@ -437,7 +437,11 @@
       D.ConstPoolFP->convert(APFloat::IEEEsingle, APFloat::rmNearestTiesToEven,
                              &ignored);
     }
-    return ConstantFP::get(*D.ConstPoolFP);
+    {
+      ConstantFP *tmp = ConstantFP::get(*D.ConstPoolFP);
+      D.destroy();
+      return tmp;
+    }
 
   case ValID::ConstNullVal:      // Is it a null value?
     if (!isa(Ty)) {




From gohman at apple.com  Tue Nov  4 10:03:57 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 04 Nov 2008 16:03:57 -0000
Subject: [llvm-commits] [llvm] r58701 - in /llvm/trunk:
 lib/VMCore/ValueTypes.cpp utils/TableGen/TGValueTypes.cpp
Message-ID: <200811041603.mA4G3wve014340@zion.cs.uiuc.edu>

Author: djg
Date: Tue Nov  4 10:03:56 2008
New Revision: 58701

URL: http://llvm.org/viewvc/llvm-project?rev=58701&view=rev
Log:
Add some asserts to verify MVT invariant assumptions.

Modified:
    llvm/trunk/lib/VMCore/ValueTypes.cpp
    llvm/trunk/utils/TableGen/TGValueTypes.cpp

Modified: llvm/trunk/lib/VMCore/ValueTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ValueTypes.cpp?rev=58701&r1=58700&r2=58701&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/ValueTypes.cpp (original)
+++ llvm/trunk/lib/VMCore/ValueTypes.cpp Tue Nov  4 10:03:56 2008
@@ -20,12 +20,14 @@
 MVT MVT::getExtendedIntegerVT(unsigned BitWidth) {
   MVT VT;
   VT.LLVMTy = IntegerType::get(BitWidth);
+  assert(VT.isExtended() && "Type is not extended!");
   return VT;
 }
 
 MVT MVT::getExtendedVectorVT(MVT VT, unsigned NumElements) {
   MVT ResultVT;
   ResultVT.LLVMTy = VectorType::get(VT.getTypeForMVT(), NumElements);
+  assert(ResultVT.isExtended() && "Type is not extended!");
   return ResultVT;
 }
 

Modified: llvm/trunk/utils/TableGen/TGValueTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/TGValueTypes.cpp?rev=58701&r1=58700&r2=58701&view=diff

==============================================================================
--- llvm/trunk/utils/TableGen/TGValueTypes.cpp (original)
+++ llvm/trunk/utils/TableGen/TGValueTypes.cpp Tue Nov  4 10:03:56 2008
@@ -69,6 +69,7 @@
   if (!ET) ET = new ExtendedIntegerType(BitWidth);
   MVT VT;
   VT.LLVMTy = ET;
+  assert(VT.isExtended() && "Type is not extended!");
   return VT;
 }
 
@@ -78,6 +79,7 @@
   if (!ET) ET = new ExtendedVectorType(VT, NumElements);
   MVT ResultVT;
   ResultVT.LLVMTy = ET;
+  assert(ResultVT.isExtended() && "Type is not extended!");
   return ResultVT;
 }
 




From gohman at apple.com  Tue Nov  4 10:08:58 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 04 Nov 2008 16:08:58 -0000
Subject: [llvm-commits] [llvm] r58702 - /llvm/trunk/lib/VMCore/ValueTypes.cpp
Message-ID: <200811041608.mA4G8wcC014507@zion.cs.uiuc.edu>

Author: djg
Date: Tue Nov  4 10:08:57 2008
New Revision: 58702

URL: http://llvm.org/viewvc/llvm-project?rev=58702&view=rev
Log:
Add a return statement to suppress warnings in NDEBUG builds.

Modified:
    llvm/trunk/lib/VMCore/ValueTypes.cpp

Modified: llvm/trunk/lib/VMCore/ValueTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ValueTypes.cpp?rev=58702&r1=58701&r2=58702&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/ValueTypes.cpp (original)
+++ llvm/trunk/lib/VMCore/ValueTypes.cpp Tue Nov  4 10:08:57 2008
@@ -71,6 +71,7 @@
   if (const VectorType *VTy = dyn_cast(LLVMTy))
     return VTy->getBitWidth();
   assert(false && "Unrecognized extended type!");
+  return 0; // Suppress warnings.
 }
 
 /// getMVTString - This function returns value type as a string, e.g. "i32".




From gohman at apple.com  Tue Nov  4 10:19:44 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 04 Nov 2008 16:19:44 -0000
Subject: [llvm-commits] [llvm] r58703 - /llvm/trunk/lib/VMCore/ValueTypes.cpp
Message-ID: <200811041619.mA4GJiOU014845@zion.cs.uiuc.edu>

Author: djg
Date: Tue Nov  4 10:19:44 2008
New Revision: 58703

URL: http://llvm.org/viewvc/llvm-project?rev=58703&view=rev
Log:
Duncan pointed out that the Extended case in getTypeForMVT could
be considerably simplified.

Modified:
    llvm/trunk/lib/VMCore/ValueTypes.cpp

Modified: llvm/trunk/lib/VMCore/ValueTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ValueTypes.cpp?rev=58703&r1=58702&r2=58703&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/ValueTypes.cpp (original)
+++ llvm/trunk/lib/VMCore/ValueTypes.cpp Tue Nov  4 10:19:44 2008
@@ -121,13 +121,8 @@
 const Type *MVT::getTypeForMVT() const {
   switch (V) {
   default:
-    if (isVector())
-      return VectorType::get(getVectorElementType().getTypeForMVT(),
-                             getVectorNumElements());
-    if (isInteger())
-      return IntegerType::get(getSizeInBits());
-    assert(0 && "MVT does not correspond to LLVM type!");
-    return Type::VoidTy;
+    assert(isExtended() && "Type is not extended!");
+    return LLVMTy;
   case MVT::isVoid:  return Type::VoidTy;
   case MVT::i1:      return Type::Int1Ty;
   case MVT::i8:      return Type::Int8Ty;




From gohman at apple.com  Tue Nov  4 10:44:53 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 4 Nov 2008 08:44:53 -0800 (PST)
Subject: [llvm-commits] [llvm] r58623 - in /llvm/trunk:
 include/llvm/CodeGen/ValueTypes.h lib/VMCore/ValueTypes.cpp
 test/CodeGen/X86/i2k.ll utils/TableGen/CMakeLists.txt
 utils/TableGen/TGValueTypes.cpp
In-Reply-To: <200811041038.36565.duncan.sands@math.u-psud.fr>
References: <200811031756.mA3HuRvA017091@zion.cs.uiuc.edu>
	<200811041038.36565.duncan.sands@math.u-psud.fr>
Message-ID: 

On Tue, November 4, 2008 1:38 am, Duncan Sands wrote:
>> there are no libcalls defined for very large integers so operations
>> like multiply and divide aren't supported.
>
> Here's a crazy idea.  I hear that people are working on "libllvm",
> a reimplementation of libgcc.  Maybe instead the code generator
> could be taught to generate library functions on the fly.  For
> example, suppose a call to __udivsi3 is needed.  Then the code
> generator creates the function __udivsi3 in the assembler, with
> weak linkage.  Thanks to weak linkage there will be only one
> copy no matter how many object files it turns up in, and there
> is no need to link with libllvm.  Now imagine that you need a
> similar library function to __udivsi3, but for i1024.  Then you
> can have the code generators squirt out __udivsiXYZ!

This is a clever idea, though I agree with the other messages in
this thread.

>
>> This also introduces a minimal tablgen Type library, capable of
>> handling IntegerType and VectorType. This will allow parts of
>> TableGen that don't depend on using SimpleValueType values to handle
>> arbitrary integer and vector types.
>
> Are there any such parts?  Or, rather, can such parts be changed
> to only use SimpleValueType?

The intrinsics handling.

>>      /// isSimple - Test if the given MVT is simple (as opposed to being
>>      /// extended).
>>      bool isSimple() const {
>> -      return V <= SimpleTypeMask;
>> +      return V <= LastSimpleValueType;
>>      }
>
> I see that you are confident that heap allocations never occur in the
> first 256 bytes of memory! :)

I added asserts to verify this assumption. If they ever fail for
someone, there are ways to fix this.

>> +unsigned MVT::getExtendedSizeInBits() const {
>> +  assert(isExtended() && "Type is not extended!");
>> +  if (const IntegerType *ITy = dyn_cast(LLVMTy))
>> +    return ITy->getBitWidth();
>> +  if (const VectorType *VTy = dyn_cast(LLVMTy))
>> +    return VTy->getBitWidth();
>> +  assert(false && "Unrecognized extended type!");
>
> You probably want a return statement here so as not to get
> compiler warnings when assertions are turned off.
>> +}

Fixed.

>
> Finally, I notice that you didn't touch getTypeForMVT.  For extended
> value types that function could be simplified to return LLVMTy.

Good idea. It's now done.

Thanks,

Dan




From baldrick at free.fr  Tue Nov  4 11:31:20 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 04 Nov 2008 17:31:20 -0000
Subject: [llvm-commits] [llvm] r58706 - in /llvm/trunk:
 lib/CodeGen/SelectionDAG/LegalizeTypes.h
 lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
 test/CodeGen/PowerPC/select-cc.ll
Message-ID: <200811041731.mA4HVM4w017248@zion.cs.uiuc.edu>

Author: baldrick
Date: Tue Nov  4 11:31:08 2008
New Revision: 58706

URL: http://llvm.org/viewvc/llvm-project?rev=58706&view=rev
Log:
Fix PR3011: LegalizeTypes support for scalarizing
SELECT_CC.

Added:
    llvm/trunk/test/CodeGen/PowerPC/select-cc.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=58706&r1=58705&r2=58706&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Tue Nov  4 11:31:08 2008
@@ -452,6 +452,7 @@
   SDValue ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N);
   SDValue ScalarizeVecRes_LOAD(LoadSDNode *N);
   SDValue ScalarizeVecRes_SELECT(SDNode *N);
+  SDValue ScalarizeVecRes_SELECT_CC(SDNode *N);
   SDValue ScalarizeVecRes_UNDEF(SDNode *N);
   SDValue ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N);
   SDValue ScalarizeVecRes_VSETCC(SDNode *N);

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=58706&r1=58705&r2=58706&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Tue Nov  4 11:31:08 2008
@@ -48,6 +48,7 @@
   case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
   case ISD::LOAD:           R = ScalarizeVecRes_LOAD(cast(N));break;
   case ISD::SELECT:         R = ScalarizeVecRes_SELECT(N); break;
+  case ISD::SELECT_CC:      R = ScalarizeVecRes_SELECT_CC(N); break;
   case ISD::UNDEF:          R = ScalarizeVecRes_UNDEF(N); break;
   case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
   case ISD::VSETCC:         R = ScalarizeVecRes_VSETCC(N); break;
@@ -162,6 +163,14 @@
                      GetScalarizedVector(N->getOperand(2)));
 }
 
+SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
+  SDValue LHS = GetScalarizedVector(N->getOperand(2));
+  return DAG.getNode(ISD::SELECT_CC, LHS.getValueType(),
+                     N->getOperand(0), N->getOperand(1),
+                     LHS, GetScalarizedVector(N->getOperand(3)),
+                     N->getOperand(4));
+}
+
 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
   // Figure out if the scalar is the LHS or RHS and return it.
   SDValue Arg = N->getOperand(2).getOperand(0);

Added: llvm/trunk/test/CodeGen/PowerPC/select-cc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/select-cc.ll?rev=58706&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/select-cc.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/select-cc.ll Tue Nov  4 11:31:08 2008
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -march=ppc32
+; PR3011
+
+define <2 x double> @vector_select(<2 x double> %x, <2 x double> %y) nounwind  {
+	%x.lo = extractelement <2 x double> %x, i32 0		;  [#uses=1]
+	%x.lo.ge = fcmp oge double %x.lo, 0.000000e+00		;  [#uses=1]
+	%a.d = select i1 %x.lo.ge, <2 x double> %y, <2 x double> %x		; <<2 x double>> [#uses=1]
+	ret <2 x double> %a.d
+}




From evan.cheng at apple.com  Tue Nov  4 11:57:10 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 04 Nov 2008 17:57:10 -0000
Subject: [llvm-commits] [llvm] r58707 -
	/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
Message-ID: <200811041757.mA4HvA5T018000@zion.cs.uiuc.edu>

Author: evancheng
Date: Tue Nov  4 11:57:07 2008
New Revision: 58707

URL: http://llvm.org/viewvc/llvm-project?rev=58707&view=rev
Log:
LDM_RET restores pc, do not set 's' bit which would restore CPSR from SPSR.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58707&r1=58706&r2=58707&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Tue Nov  4 11:57:07 2008
@@ -647,7 +647,6 @@
   : XI {
   let Inst{20}    = 1; // L bit
-  let Inst{22}    = 1; // S bit
   let Inst{27-25} = 0b100;
 }
 class AXI4st opcod, dag oops, dag iops, Format f, string asm,




From evan.cheng at apple.com  Tue Nov  4 11:58:54 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 04 Nov 2008 17:58:54 -0000
Subject: [llvm-commits] [llvm] r58708 -
	/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
Message-ID: <200811041758.mA4HwsPT018094@zion.cs.uiuc.edu>

Author: evancheng
Date: Tue Nov  4 11:58:53 2008
New Revision: 58708

URL: http://llvm.org/viewvc/llvm-project?rev=58708&view=rev
Log:
Debug output tweak.

Modified:
    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58708&r1=58707&r2=58708&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Tue Nov  4 11:58:53 2008
@@ -281,7 +281,7 @@
       static_cast(MCPE.Val.MachineCPVal);
 
     DOUT << "\t** ARM constant pool #" << CPI << " @ "
-         << (void*)MCE.getCurrentPCValue() << " '" << *ACPV << "'\n";
+         << (void*)MCE.getCurrentPCValue() << " " << *ACPV << "\n";
 
     GlobalValue *GV = ACPV->getGV();
     if (GV) {
@@ -298,7 +298,7 @@
     Constant *CV = MCPE.Val.ConstVal;
 
     DOUT << "\t** Constant pool #" << CPI << " @ "
-         << (void*)MCE.getCurrentPCValue() << " '" << *CV << "'\n";
+         << (void*)MCE.getCurrentPCValue() << " " << *CV << "\n";
 
     if (GlobalValue *GV = dyn_cast(CV)) {
       emitGlobalAddress(GV, ARM::reloc_arm_absolute, false);




From baldrick at free.fr  Tue Nov  4 12:05:35 2008
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 04 Nov 2008 18:05:35 -0000
Subject: [llvm-commits] [llvm] r58709 -
	/llvm/trunk/lib/CodeGen/IfConversion.cpp
Message-ID: <200811041805.mA4I5aQF018346@zion.cs.uiuc.edu>

Author: baldrick
Date: Tue Nov  4 12:05:30 2008
New Revision: 58709

URL: http://llvm.org/viewvc/llvm-project?rev=58709&view=rev
Log:
Fix typo.  Patch by nlewycky.

Modified:
    llvm/trunk/lib/CodeGen/IfConversion.cpp

Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=58709&r1=58708&r2=58709&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/IfConversion.cpp (original)
+++ llvm/trunk/lib/CodeGen/IfConversion.cpp Tue Nov  4 12:05:30 2008
@@ -257,7 +257,7 @@
       BBInfo &BBI = Token->BBI;
       IfcvtKind Kind = Token->Kind;
       unsigned NumDups = Token->NumDups;
-      unsigned NumDups2 = Token->NumDups;
+      unsigned NumDups2 = Token->NumDups2;
 
       delete Token;
 




From evan.cheng at apple.com  Tue Nov  4 12:06:07 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 4 Nov 2008 10:06:07 -0800
Subject: [llvm-commits] [llvm] r58673 - in /llvm/trunk:
	include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp
	lib/CodeGen/StackProtector.cpp
In-Reply-To: 
References: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu>
	
Message-ID: <12743ED4-76FC-4BBA-A2F6-183CF7ABCCD6@apple.com>


On Nov 4, 2008, at 5:28 AM, Chris Lattner wrote:
>
>
>> +  StackProtFrameSlot = new
>> AllocaInst(PointerType::getUnqual(Type::Int8Ty),
>> +                                      "StackProt_Frame", &InsertPt);
>
> What ensures that this alloca ends up in the right place in the stack
> frame at codegen time?

This is unclear.Can we give it a special name that starts with "__"  
and sdisel will mark the corresponding stack object. PEI will have to  
make sure it's in the right location. I don't particularly like it but  
I can't think of anything better. Any ideas?

Evan


From gohman at apple.com  Tue Nov  4 12:09:08 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 04 Nov 2008 18:09:08 -0000
Subject: [llvm-commits] [llvm] r58710 -
	/llvm/trunk/utils/TableGen/TGValueTypes.cpp
Message-ID: <200811041809.mA4I986P018468@zion.cs.uiuc.edu>

Author: djg
Date: Tue Nov  4 12:09:07 2008
New Revision: 58710

URL: http://llvm.org/viewvc/llvm-project?rev=58710&view=rev
Log:
Give tablegen's Type a destructor, to suppress spurious
"Type has virtual functions but non-virtual destructor"
warnings.

Modified:
    llvm/trunk/utils/TableGen/TGValueTypes.cpp

Modified: llvm/trunk/utils/TableGen/TGValueTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/TGValueTypes.cpp?rev=58710&r1=58709&r2=58710&view=diff

==============================================================================
--- llvm/trunk/utils/TableGen/TGValueTypes.cpp (original)
+++ llvm/trunk/utils/TableGen/TGValueTypes.cpp Tue Nov  4 12:09:07 2008
@@ -25,6 +25,7 @@
 class Type {
 public:
   virtual unsigned getSizeInBits() const = 0;
+  virtual ~Type() {}
 };
 
 }




From gohman at apple.com  Tue Nov  4 12:13:13 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 4 Nov 2008 10:13:13 -0800
Subject: [llvm-commits] [llvm] r58673 - in /llvm/trunk:
	include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp
	lib/CodeGen/StackProtector.cpp
In-Reply-To: <12743ED4-76FC-4BBA-A2F6-183CF7ABCCD6@apple.com>
References: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu>
	
	<12743ED4-76FC-4BBA-A2F6-183CF7ABCCD6@apple.com>
Message-ID: <1981AC23-EDC1-4FBB-AB7E-4522A6AA25B6@apple.com>


On Nov 4, 2008, at 10:06 AM, Evan Cheng wrote:

>
> On Nov 4, 2008, at 5:28 AM, Chris Lattner wrote:
>>
>>
>>> +  StackProtFrameSlot = new
>>> AllocaInst(PointerType::getUnqual(Type::Int8Ty),
>>> +                                      "StackProt_Frame",  
>>> &InsertPt);
>>
>> What ensures that this alloca ends up in the right place in the stack
>> frame at codegen time?
>
> This is unclear.Can we give it a special name that starts with "__"
> and sdisel will mark the corresponding stack object. PEI will have to
> make sure it's in the right location. I don't particularly like it but
> I can't think of anything better. Any ideas?


Names aren't always preserved. How about replacing the Alloca with
an intrinsic that does the allocation?

Dan



From tonic at nondot.org  Tue Nov  4 12:40:28 2008
From: tonic at nondot.org (Tanya Lattner)
Date: Tue, 04 Nov 2008 18:40:28 -0000
Subject: [llvm-commits] [llvm] r58712 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <200811041840.mA4IeSbB019972@zion.cs.uiuc.edu>

Author: tbrethou
Date: Tue Nov  4 12:40:27 2008
New Revision: 58712

URL: http://llvm.org/viewvc/llvm-project?rev=58712&view=rev
Log:
Add note about cmake. Patch by Oscar Fuentes.


Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=58712&r1=58711&r2=58712&view=diff

==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Nov  4 12:40:27 2008
@@ -482,6 +482,10 @@
     have switched over to use it.   The eventual goal is to eliminate
     std::ostream in favor of it.
    3. 
 
+
  3. LLVM 2.4 includes an optional build system based on CMake. It
+    still is on its early stages but can be useful for Visual C++
+    userswho can not use the Visual Studio IDE.
    4. 
+
 
 
 




From isanbard at gmail.com  Tue Nov  4 13:40:43 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 4 Nov 2008 11:40:43 -0800
Subject: [llvm-commits] [llvm] r58673 - in /llvm/trunk:
	include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp
	lib/CodeGen/StackProtector.cpp
In-Reply-To: 
References: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu>
	
Message-ID: <16e5fdf90811041140m43efd5e0oa15f8dd704f364d0@mail.gmail.com>

On Tue, Nov 4, 2008 at 5:28 AM, Chris Lattner  wrote:
> On Nov 3, 2008, at 6:10 PM, Bill Wendling wrote:
>> URL: http://llvm.org/viewvc/llvm-project?rev=58673&view=rev
>> Log:
>> Initial checkin for stack protectors. Here's what it does:
>
> Cool!  Some questions/comments below:
>
>> @@ -60,6 +60,11 @@
>> EnableFastISelOption("fast-isel", cl::Hidden,
>>   cl::desc("Enable the experimental \"fast\" instruction selector"));
>>
>> +// Enable stack protectors.
>> +static cl::opt
>> +EnableStackProtector("enable-stack-protector", cl::init(0),
>> +                     cl::desc("Use ProPolice as a stack protection
>> method."));
>
> I don't know what "ProPolice" is, but it sounds like it may be a
> trademark or something.  Please just use "stack canary" or something
> generic like that.
>
It's used in the GCC documentation for the flag:

common.opt:
fstack-protector
Common Report Var(flag_stack_protect, 1) Init(-1)
Use propolice as a stack protection method

But I can live without it.

> Also, you should use an enum for this, not magic integer numbers.  I'd
> like to see -enable-stack-protector=all | some | none.
>
Okay.

>> @@ -165,6 +170,8 @@
>>   if (!Fast)
>>     PM.add(createCodeGenPreparePass(getTargetLowering()));
>>
>> +  PM.add(createStackProtectorPass(EnableStackProtector));
>
> Why do you add the pass even when it is not enabled?  Have you looked
> at whether adding this pass ends up breaking analysis chains, and
> requiring them to be run multiple times?  For example, does dominators
> end up being run more frequently with this?  If so, the pass should
> update dominators instead of invalidating it.
>
Okay. No. Don't know.

>> +// random value in it is stored onto the stack before the local
>> variables are
>> +// allocated. Upon exitting the block, the stored value is checked.
>> If it's
>
> typo exiting.
>
>> +// Enable stack protectors.
>> +static cl::opt
>> +SSPBufferSize("ssp-buffer-size", cl::init(8),
>> +              cl::desc("The lower bound for a buffer to be
>> considered for "
>> +                       "stack smashing protection."));
>
> why the contraction ssp?  Please use something like "stack-protector-
> buffer-size" or something like that, for similarity with the enable-
> stack-protector option.
>
It's the same name that's used in GCC. I'm not tied to the name, and
I'm not expecting this to be used much at all.

>> +namespace {
>> +  class VISIBILITY_HIDDEN StackProtector : public FunctionPass {
>> +    // Level == 0  --  Stack protectors are off.
>> +    // Level == 1  --  Stack protectors are on only for some
>> functions.
>> +    // Level == 2  --  Stack protectors are on for all functions.
>> +    int Level;
>
> I think that this should be an enum in Passes.h, which can also be
> used above for the command line option.
>
Okay.

>>
>> ++    /// RequiresStackProtector - Check whether or not this
>> function needs a
>> +    /// stack protector based upon the stack protector level.
>> +    bool RequiresStackProtector();
>
> This should be const.
>
Oh yeah!

>> +/// InsertStackProtectorPrologue - Insert code into the entry block
>> that stores
>> +/// the __stack_chk_guard variable onto the stack.
>> +void StackProtector::InsertStackProtectorPrologue() {
>> +  BasicBlock &Entry = F->getEntryBlock();
>> +  Instruction &InsertPt = Entry.front();
>> +
>> +  const char *StackGuardStr = "__stack_chk_guard";
>> +  StackGuardVar = M->getNamedGlobal(StackGuardStr)
>
> If the module already has a '__stack_chk_guard' global with the wrong
> type, I think this code will crash, see below:
>
Hrh?

>>
>> +  if (!StackGuardVar)
>> +    StackGuardVar = new
>> GlobalVariable(PointerType::getUnqual(Type::Int8Ty),
>> +                                       false,
>> GlobalValue::ExternalLinkage,
>> +                                       0, StackGuardStr, M);
>
> We really want a Module::getOrInsertGlobal() method that works like
> getOrInsertFunction.  It would do the bitcast to solve the problem
> above and factor away this code.  Can you please add this?
>
Sure. That would be nice.

>> +  StackProtFrameSlot = new
>> AllocaInst(PointerType::getUnqual(Type::Int8Ty),
>> +                                      "StackProt_Frame", &InsertPt);
>
> What ensures that this alloca ends up in the right place in the stack
> frame at codegen time?
>
We looked at the code in code gen -- the lowering of allocas. It's
doing the "right thing" with regard to this. There might be some
special magic that needs to be done, though.

>> +  LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", true,
>> &InsertPt);
>> +  new StoreInst(LI, StackProtFrameSlot, true, &InsertPt);
>
> Please add a comment indicating why these are volatile.  Why is the
> load volatile?
>
This one probably doesn't need to be.

>> +/// InsertStackProtectorEpilogue - Insert code before the return
>> instructions
>> +/// checking the stack value that was stored in the prologue. If it
>> isn't the
>> +/// same as the original value, then call a "failure" function.
>> +void StackProtector::InsertStackProtectorEpilogue() {
>> +  // Create the basic block to jump to when the guard check fails.
>> +  CreateFailBB();
>> +
>> +  Function::iterator I = F->begin(), E = F->end();
>> +  std::vector ReturnBBs;
>> +  ReturnBBs.reserve(F->size());
>> +
>> +  for (; I != E; ++I)
>> +    if (isa((*I).getTerminator()))
>> +      ReturnBBs.push_back(I);
>
> Two things: first, use I->getTerminator.  Second, why do you make a
> vector of returns and iterate over the vector?  You should be able to
> handle all of these with one pass over the function without the
> intermediate vector.  Also, F->size() is linear time, so that itself
> does a pass over the function.
>
I'm modifying the Function (inserting new blocks). Won't that
invalidate the iterators?

>> +  for (std::vector::iterator
>> +         II = ReturnBBs.begin(), IE = ReturnBBs.end(); II != IE; +
>> +II) {
>> +    BasicBlock *BB = *II;
>> +    ReturnInst *RI = cast(BB->getTerminator());
>> +    Function::iterator InsPt = BB; ++InsPt; // Insertion point for
>> new BB.
>> +
>> +    BasicBlock *NewBB = BasicBlock::Create("SPRet", F, InsPt);
>> +
>> +    // Move the return instruction into the new basic block.
>> +    RI->removeFromParent();
>> +    NewBB->getInstList().insert(NewBB->begin(), RI);
>
> Please use BasicBlock::splitBasicBlock to simplify this code.
>
Okay.

>> +/// CreateFailBB - Create a basic block to jump to when the stack
>> protector
>> +/// check fails.
>> +void StackProtector::CreateFailBB() {
>> +  assert(!FailBB && "Failure basic block already created?!");
>> +  FailBB = BasicBlock::Create("CallStackCheckFailBlk", F);
>> +  std::vector Params;
>> +  Constant *StackChkFail =
>> +    M->getOrInsertFunction("__stack_chk_fail",
>> +                           FunctionType::get(Type::VoidTy, Params,
>> false));
>
> You can eliminate the temporary vector by using the varargs form of
> getOrInsertFunction:
>
> Constant *StackChkFail =
>   M->getOrInsertFunction("__stack_chk_fail", Type::VoidTy, NULL);
>
Ah! Good.

>> +/// RequiresStackProtector - Check whether or not this function
>> needs a stack
>> +/// protector based upon the stack protector level.
>> +bool StackProtector::RequiresStackProtector() {
>> +  switch (Level) {
>> +  default: return false;
>> +  case 2:  return true;
>> +  case 1: {
>
> Please use enums instead of magic numbers :)
>
But the magic makes it work!!! ;-)

>> +    // If the size of the local variables allocated on the stack is
>> greater than
>> +    // SSPBufferSize, then we require a stack protector.
>> +    uint64_t StackSize = 0;
>> +
>> +    for (Function::iterator I = F->begin(), E = F->end(); I != E; +
>> +I) {
>> +      BasicBlock *BB = I;
>> +
>> +      for (BasicBlock::iterator
>> +             II = BB->begin(), IE = BB->end(); II != IE; ++II)
>> +        if (AllocaInst *AI = dyn_cast(II))
>> +          if (ConstantInt *CI = dyn_cast(AI-
>> >getArraySize())) {
>> +            const APInt &Size = CI->getValue();
>> +            StackSize += Size.getZExtValue() * 8;
>> +          }
>
> This isn't sufficient.  If you have "alloca i32", the array size is
> 1.  You need to use TargetData to multiply the array size by the size
> of the type.  Also, is the protection size in bits or bytes?
>
Bytes, so the "* 8" is wrong. I need to flesh this out some more.

> Does GCC ignore variable sized stack allocations?
>
>> +    if (SSPBufferSize <= StackSize)
>> +      return true;
>
> This check should be moved inside the loop so that you stop scanning a
> function as soon as you see at least enough to qualify for stack
> protection.
>
Okay.

>>
>> +
>> +// [EOF] StackProtector.cpp
>
> Urr?
>
Totally the end of file! ;-)

-bw


From dalej at apple.com  Tue Nov  4 13:47:19 2008
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 4 Nov 2008 11:47:19 -0800
Subject: [llvm-commits] [llvm] r58673 - in /llvm/trunk:
	include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp
	lib/CodeGen/StackProtector.cpp
In-Reply-To: <16e5fdf90811041140m43efd5e0oa15f8dd704f364d0@mail.gmail.com>
References: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu>
	
	<16e5fdf90811041140m43efd5e0oa15f8dd704f364d0@mail.gmail.com>
Message-ID: <06B25350-98C8-407D-A713-A34F9974D558@apple.com>


On Nov 4, 2008, at 11:40 AMPST, Bill Wendling wrote:
>>
>> I don't know what "ProPolice" is, but it sounds like it may be a
>> trademark or something.  Please just use "stack canary" or something
>> generic like that.
>>
> It's used in the GCC documentation for the flag:
>
> common.opt:
> fstack-protector
> Common Report Var(flag_stack_protect, 1) Init(-1)
> Use propolice as a stack protection method

Wikipedia defines it; it's apparently known terminology to people  
expert in this area (not me) and doesn't appear to be a trademark.
http://en.wikipedia.org/wiki/Stack-smashing_protection



From anton at korobeynikov.info  Tue Nov  4 13:48:44 2008
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Tue, 4 Nov 2008 22:48:44 +0300
Subject: [llvm-commits] [llvm] r58673 - in /llvm/trunk:
	include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp
	lib/CodeGen/StackProtector.cpp
In-Reply-To: <16e5fdf90811041140m43efd5e0oa15f8dd704f364d0@mail.gmail.com>
References: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu>
	
	<16e5fdf90811041140m43efd5e0oa15f8dd704f364d0@mail.gmail.com>
Message-ID: 

Hi, Bill

> We looked at the code in code gen -- the lowering of allocas. It's
> doing the "right thing" with regard to this. There might be some
> special magic that needs to be done, though.
Just quick q: I think this will work without any problems on targets,
which require stack probing (and this alloca is lowered to special
call), right?

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University


From isanbard at gmail.com  Tue Nov  4 13:44:40 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 4 Nov 2008 11:44:40 -0800
Subject: [llvm-commits] [llvm] r58673 - in /llvm/trunk:
	include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp
	lib/CodeGen/StackProtector.cpp
In-Reply-To: <1981AC23-EDC1-4FBB-AB7E-4522A6AA25B6@apple.com>
References: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu>
	
	<12743ED4-76FC-4BBA-A2F6-183CF7ABCCD6@apple.com>
	<1981AC23-EDC1-4FBB-AB7E-4522A6AA25B6@apple.com>
Message-ID: <16e5fdf90811041144n63cb4b15ge5bde962064453db@mail.gmail.com>

On Tue, Nov 4, 2008 at 10:13 AM, Dan Gohman  wrote:
>
> On Nov 4, 2008, at 10:06 AM, Evan Cheng wrote:
>
>> On Nov 4, 2008, at 5:28 AM, Chris Lattner wrote:
>>>
>>>
>>>> +  StackProtFrameSlot = new
>>>> AllocaInst(PointerType::getUnqual(Type::Int8Ty),
>>>> +                                      "StackProt_Frame",
>>>> &InsertPt);
>>>
>>> What ensures that this alloca ends up in the right place in the stack
>>> frame at codegen time?
>>
>> This is unclear.Can we give it a special name that starts with "__"
>> and sdisel will mark the corresponding stack object. PEI will have to
>> make sure it's in the right location. I don't particularly like it but
>> I can't think of anything better. Any ideas?
>
> Names aren't always preserved. How about replacing the Alloca with
> an intrinsic that does the allocation?
>
I'm not sure that that's necessary. It should be possible to keep
track of the alloca instruction from this pass through code gen. Once
it's lowered, then I'll know what FI it's at, etc. Then PEI can
perform its magic.

-bw


From isanbard at gmail.com  Tue Nov  4 13:55:05 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 4 Nov 2008 11:55:05 -0800
Subject: [llvm-commits] [llvm] r58673 - in /llvm/trunk:
	include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp
	lib/CodeGen/StackProtector.cpp
In-Reply-To: 
References: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu>
	
	<16e5fdf90811041140m43efd5e0oa15f8dd704f364d0@mail.gmail.com>
	
Message-ID: <16e5fdf90811041155y4e7d0484gb3457d7e740fb3c7@mail.gmail.com>

Hi Anton,

>> We looked at the code in code gen -- the lowering of allocas. It's
>> doing the "right thing" with regard to this. There might be some
>> special magic that needs to be done, though.
>
> Just quick q: I think this will work without any problems on targets,
> which require stack probing (and this alloca is lowered to special
> call), right?
>
It shouldn't mess up that code. The only requirement is that the
canary be shoved into the "correct" place on the stack to catch any
stack smashing activities. I suppose it's possible that it won't work
as expected in such a case. It's clear that this part needs some more
attention.

-bw


From evan.cheng at apple.com  Tue Nov  4 13:57:50 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 04 Nov 2008 19:57:50 -0000
Subject: [llvm-commits] [llvm] r58714 - in /llvm/trunk:
 lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/fixunsdfdi.ll
Message-ID: <200811041957.mA4Jvphw022462@zion.cs.uiuc.edu>

Author: evancheng
Date: Tue Nov  4 13:57:48 2008
New Revision: 58714

URL: http://llvm.org/viewvc/llvm-project?rev=58714&view=rev
Log:
Custom lower bit_convert i64 -> f64 into FMDRR. This is now happening with legalizetypes.

Added:
    llvm/trunk/test/CodeGen/ARM/fixunsdfdi.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=58714&r1=58713&r2=58714&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Nov  4 13:57:48 2008
@@ -214,7 +214,7 @@
   setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand);
 
   if (!UseSoftFloat && Subtarget->hasVFP2() && !Subtarget->isThumb())
-    // Turn f64->i64 into FMRRD iff target supports vfp2.
+    // Turn f64->i64 into FMRRD, i64 -> f64 to FMDRR iff target supports vfp2.
     setOperationAction(ISD::BIT_CONVERT, MVT::i64, Custom);
 
   // We want to custom lower some of our intrinsics.
@@ -1349,13 +1349,19 @@
 }
 
 static SDNode *ExpandBIT_CONVERT(SDNode *N, SelectionDAG &DAG) {
-  // Turn f64->i64 into FMRRD.
-  assert(N->getValueType(0) == MVT::i64 &&
-         N->getOperand(0).getValueType() == MVT::f64);
-  
   SDValue Op = N->getOperand(0);
+  if (N->getValueType(0) == MVT::f64) {
+    // Turn i64->f64 into FMDRR.
+    SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op,
+                             DAG.getConstant(0, MVT::i32));
+    SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, Op,
+                             DAG.getConstant(1, MVT::i32));
+    return DAG.getNode(ARMISD::FMDRR, MVT::f64, Lo, Hi).getNode();
+  }
+  
+  // Turn f64->i64 into FMRRD.
   SDValue Cvt = DAG.getNode(ARMISD::FMRRD, DAG.getVTList(MVT::i32, MVT::i32),
-                              &Op, 1);
+                            &Op, 1);
   
   // Merge the pieces into a single i64 value.
   return DAG.getNode(ISD::BUILD_PAIR, MVT::i64, Cvt, Cvt.getValue(1)).getNode();
@@ -1417,9 +1423,6 @@
   case ISD::FRAMEADDR:     break;
   case ISD::GLOBAL_OFFSET_TABLE: return LowerGLOBAL_OFFSET_TABLE(Op, DAG);
   case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);
-      
-      
-  // FIXME: Remove these when LegalizeDAGTypes lands.
   case ISD::BIT_CONVERT:   return SDValue(ExpandBIT_CONVERT(Op.getNode(), DAG), 0);
   case ISD::SRL:
   case ISD::SRA:           return SDValue(ExpandSRx(Op.getNode(), DAG,Subtarget),0);

Added: llvm/trunk/test/CodeGen/ARM/fixunsdfdi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fixunsdfdi.ll?rev=58714&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fixunsdfdi.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/fixunsdfdi.ll Tue Nov  4 13:57:48 2008
@@ -0,0 +1,29 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
+; RUN: llvm-as < %s | llc -march=arm -mattr=vfp2 | not grep fstd
+
+define hidden i64 @__fixunsdfdi(double %x) nounwind readnone {
+entry:
+	%x14 = bitcast double %x to i64		;  [#uses=1]
+	br i1 true, label %bb3, label %bb10
+
+bb3:		; preds = %entry
+	br i1 true, label %bb5, label %bb7
+
+bb5:		; preds = %bb3
+	%u.in.mask = and i64 %x14, -4294967296		;  [#uses=1]
+	%.ins = or i64 0, %u.in.mask		;  [#uses=1]
+	%0 = bitcast i64 %.ins to double		;  [#uses=1]
+	%1 = sub double %x, %0		;  [#uses=1]
+	%2 = fptosi double %1 to i32		;  [#uses=1]
+	%3 = add i32 %2, 0		;  [#uses=1]
+	%4 = zext i32 %3 to i64		;  [#uses=1]
+	%5 = shl i64 %4, 32		;  [#uses=1]
+	%6 = or i64 %5, 0		;  [#uses=1]
+	ret i64 %6
+
+bb7:		; preds = %bb3
+	ret i64 0
+
+bb10:		; preds = %entry
+	ret i64 0
+}




From evan.cheng at apple.com  Tue Nov  4 13:58:08 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 04 Nov 2008 19:58:08 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r58715 -
	/llvm-gcc-4.2/trunk/gcc/config/arm/arm.c
Message-ID: <200811041958.mA4Jw8Hm022480@zion.cs.uiuc.edu>

Author: evancheng
Date: Tue Nov  4 13:58:08 2008
New Revision: 58715

URL: http://llvm.org/viewvc/llvm-project?rev=58715&view=rev
Log:
Unbreak ARM build with -Werror.

Modified:
    llvm-gcc-4.2/trunk/gcc/config/arm/arm.c

Modified: llvm-gcc-4.2/trunk/gcc/config/arm/arm.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/arm/arm.c?rev=58715&r1=58714&r2=58715&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/config/arm/arm.c (original)
+++ llvm-gcc-4.2/trunk/gcc/config/arm/arm.c Tue Nov  4 13:58:08 2008
@@ -84,7 +84,6 @@
 static const char *fp_const_from_val (REAL_VALUE_TYPE *);
 static arm_cc get_arm_condition_code (rtx);
 static HOST_WIDE_INT int_log2 (HOST_WIDE_INT);
-static rtx is_jump_table (rtx);
 static const char *output_multi_immediate (rtx *, const char *, const char *,
 					   int, HOST_WIDE_INT);
 static const char *shift_op (rtx, HOST_WIDE_INT *);




From jlerouge at apple.com  Tue Nov  4 13:58:18 2008
From: jlerouge at apple.com (Julien Lerouge)
Date: Tue, 4 Nov 2008 11:58:18 -0800
Subject: [llvm-commits] [llvm] r58687
	-	/llvm/trunk/tools/llvm-config/llvm-config.in.in
In-Reply-To: <200811040805.mA485MH9020764@zion.cs.uiuc.edu>
References: <200811040805.mA485MH9020764@zion.cs.uiuc.edu>
Message-ID: <20081104195817.GA18399@pom.apple.com>

On Tue, Nov 04, 2008 at 08:05:21AM +0000, Nick Lewycky wrote:
> Author: nicholas
> Date: Tue Nov  4 02:05:21 2008
> New Revision: 58687
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=58687&view=rev
> Log:
> Don't "shell out" to resolve paths. Using pure perl makes llvm-config
> friendlier to non-Unixes that happen to have perl. Patch from Sascha Othman!
> 
> Modified:
>     llvm/trunk/tools/llvm-config/llvm-config.in.in
> 
> Modified: llvm/trunk/tools/llvm-config/llvm-config.in.in
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-config/llvm-config.in.in?rev=58687&r1=58686&r2=58687&view=diff
> 

Hello Nick,

This breaks LLVM build on MingW. Seems like realpath is not really
working as expected on that platform (Using perl 5.6.1, I get errors
like: readdir(/c/llvm-build/Release/bin/../../../..): Bad file number at
/c/llvm-build/Release//bin/llvm-config line 74).

Can we revert to using the shell and pwd, or use File::Spec instead ?
The patch below works for me on MingW and MacOS, but it might break some
other platforms.

File::Spec handles things slightly differently, as noted on the CPAN
doc:

| Note that this does *not* collapse x/../y sections into y. This is by
| design. If /foo on your system is a symlink to /bar/baz, then
| /foo/../quux is actually /bar/quux, not /quux as a naive ../-removal
| would give you. If you want to do this kind of processing, you probably
| want Cwd's realpath() function to actually traverse the filesystem
| cleaning up paths like this.

Thanks,
Julien

-- 
Julien Lerouge
PGP Key Id: 0xB1964A62
PGP Fingerprint: 392D 4BAD DB8B CE7F 4E5F FA3C 62DB 4AA7 B196 4A62
PGP Public Key from: keyserver.pgp.com
-------------- next part --------------
Index: tools/llvm-config/llvm-config.in.in
===================================================================
--- tools/llvm-config/llvm-config.in.in	(revision 58710)
+++ tools/llvm-config/llvm-config.in.in	(working copy)
@@ -18,7 +18,7 @@
 use 5.006;
 use strict;
 use warnings;
-use Cwd;
+use File::Spec;
 
 #---- begin autoconf values ----
 my $PACKAGE_NAME        = q{@PACKAGE_NAME@};
@@ -67,11 +67,11 @@
 
 # Turn the directory into an absolute directory on the file system, also pop up
 # from "bin" into the build or prefix dir.
-my $ABS_RUN_DIR = Cwd::realpath("$RUN_DIR/..");
+my $ABS_RUN_DIR = File::Spec->rel2abs("$RUN_DIR/..");
 
 # Compute the absolute object directory build, e.g. "foo/llvm/Debug".
 my $ABS_OBJ_ROOT = "$LLVM_OBJ_ROOT/$LLVM_BUILDMODE";
-$ABS_OBJ_ROOT = Cwd::realpath($ABS_OBJ_ROOT) if (-d $ABS_OBJ_ROOT);
+$ABS_OBJ_ROOT = File::Spec->rel2abs("$ABS_OBJ_ROOT") if (-d $ABS_OBJ_ROOT);
 
 my $INCLUDEDIR = "$ABS_RUN_DIR/include";
 my $LIBDIR     = "$ABS_RUN_DIR/lib";
@@ -135,9 +135,9 @@
         } elsif ($arg eq "--build-mode") {
             $has_opt = 1; print "$LLVM_BUILDMODE\n";
         } elsif ($arg eq "--obj-root") {
-            $has_opt = 1; print Cwd::realpath($LLVM_OBJ_ROOT), "\n";
+            $has_opt = 1; print File::Spec->rel2abs($LLVM_OBJ_ROOT), "\n";
         } elsif ($arg eq "--src-root") {
-            $has_opt = 1; print Cwd::realpath($LLVM_SRC_ROOT), "\n";
+            $has_opt = 1; print File::Spec->rel2abs($LLVM_SRC_ROOT), "\n";
         } else {
             usage();
         }

From dalej at apple.com  Tue Nov  4 14:52:49 2008
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 04 Nov 2008 20:52:49 -0000
Subject: [llvm-commits] [llvm] r58717 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Message-ID: <200811042052.mA4Kqo6k024543@zion.cs.uiuc.edu>

Author: johannes
Date: Tue Nov  4 14:52:49 2008
New Revision: 58717

URL: http://llvm.org/viewvc/llvm-project?rev=58717&view=rev
Log:
80 columns


Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=58717&r1=58716&r2=58717&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Nov  4 14:52:49 2008
@@ -5610,8 +5610,8 @@
       Hi = Source;
     }
 
-    // Check to see if the target has a custom way to lower this.  If so, use it.
-    // (Note we've already expanded the operand in this case.)
+    // Check to see if the target has a custom way to lower this.  If so, use
+    // it.  (Note we've already expanded the operand in this case.)
     switch (TLI.getOperationAction(ISD::UINT_TO_FP, SourceVT)) {
     default: assert(0 && "This action not implemented for this operation!");
     case TargetLowering::Legal:




From dalej at apple.com  Tue Nov  4 14:54:04 2008
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 04 Nov 2008 20:54:04 -0000
Subject: [llvm-commits] [llvm] r58718 -
	/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
Message-ID: <200811042054.mA4Ks4Ro024583@zion.cs.uiuc.edu>

Author: johannes
Date: Tue Nov  4 14:54:03 2008
New Revision: 58718

URL: http://llvm.org/viewvc/llvm-project?rev=58718&view=rev
Log:
Allow SROA of vectors.  Removing this caused a
huge performance regression in something we care
about.  This may not be final fix.


Modified:
    llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=58718&r1=58717&r2=58718&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Tue Nov  4 14:54:03 2008
@@ -531,8 +531,6 @@
     }
   }
  
-  bool hasVector = false;
-  
   // Walk through the GEP type indices, checking the types that this indexes
   // into.
   for (; I != E; ++I) {
@@ -551,19 +549,13 @@
       // integer. Specifically, consider A[0][i]. We cannot know that the user
       // isn't doing invalid things like allowing i to index an out-of-range
       // subscript that accesses A[1].  Because of this, we have to reject SROA
-      // of any accesses into structs where any of the components are variables.
+      // of any accesses into structs where any of the components are variables. 
       if (IdxVal->getZExtValue() >= AT->getNumElements())
         return MarkUnsafe(Info);
+    } else if (const VectorType *VT = dyn_cast(*I)) {
+      if (IdxVal->getZExtValue() >= VT->getNumElements())
+        return MarkUnsafe(Info);
     }
-  
-    // Note if we've seen a vector type yet
-    hasVector |= isa(*I);
-    
-    // Don't SROA pointers into vectors, unless all indices are zero. When all
-    // indices are zero, we only consider this GEP as a bitcast, but will still
-    // not consider breaking up the vector.
-    if (hasVector && !IsAllZeroIndices)
-      return MarkUnsafe(Info);
   }
   
   // If there are any non-simple uses of this getelementptr, make sure to reject




From tonic at nondot.org  Tue Nov  4 15:06:12 2008
From: tonic at nondot.org (Tanya Lattner)
Date: Tue, 04 Nov 2008 21:06:12 -0000
Subject: [llvm-commits] [llvm] r58719 -
	/llvm/trunk/tools/llvm-config/llvm-config.in.in
Message-ID: <200811042106.mA4L6Ctt024944@zion.cs.uiuc.edu>

Author: tbrethou
Date: Tue Nov  4 15:06:11 2008
New Revision: 58719

URL: http://llvm.org/viewvc/llvm-project?rev=58719&view=rev
Log:
Revert 58687. This breaks mingw.

Modified:
    llvm/trunk/tools/llvm-config/llvm-config.in.in

Modified: llvm/trunk/tools/llvm-config/llvm-config.in.in
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-config/llvm-config.in.in?rev=58719&r1=58718&r2=58719&view=diff

==============================================================================
--- llvm/trunk/tools/llvm-config/llvm-config.in.in (original)
+++ llvm/trunk/tools/llvm-config/llvm-config.in.in Tue Nov  4 15:06:11 2008
@@ -18,7 +18,6 @@
 use 5.006;
 use strict;
 use warnings;
-use Cwd;
 
 #---- begin autoconf values ----
 my $PACKAGE_NAME        = q{@PACKAGE_NAME@};
@@ -65,13 +64,21 @@
 # Convert the current executable name into its directory (e.g. ".").
 my ($RUN_DIR) = ($0 =~ /^(.*)\/.*$/);
 
+# Find the unix pwd program: we don't want to use the bash builtin, as it does
+# not look through symlinks etc.
+my $PWD = `which pwd`;
+chomp($PWD);
+$PWD = "pwd" if (!-e $PWD);
+
 # Turn the directory into an absolute directory on the file system, also pop up
 # from "bin" into the build or prefix dir.
-my $ABS_RUN_DIR = Cwd::realpath("$RUN_DIR/..");
+my $ABS_RUN_DIR = `cd $RUN_DIR/..; $PWD`;
+chomp($ABS_RUN_DIR);
 
 # Compute the absolute object directory build, e.g. "foo/llvm/Debug".
 my $ABS_OBJ_ROOT = "$LLVM_OBJ_ROOT/$LLVM_BUILDMODE";
-$ABS_OBJ_ROOT = Cwd::realpath($ABS_OBJ_ROOT) if (-d $ABS_OBJ_ROOT);
+$ABS_OBJ_ROOT = `cd $ABS_OBJ_ROOT; $PWD` if (-d $ABS_OBJ_ROOT);
+chomp($ABS_OBJ_ROOT);
 
 my $INCLUDEDIR = "$ABS_RUN_DIR/include";
 my $LIBDIR     = "$ABS_RUN_DIR/lib";
@@ -135,9 +142,9 @@
         } elsif ($arg eq "--build-mode") {
             $has_opt = 1; print "$LLVM_BUILDMODE\n";
         } elsif ($arg eq "--obj-root") {
-            $has_opt = 1; print Cwd::realpath($LLVM_OBJ_ROOT), "\n";
+            $has_opt = 1; print `cd $LLVM_OBJ_ROOT/; $PWD`;
         } elsif ($arg eq "--src-root") {
-            $has_opt = 1; print Cwd::realpath($LLVM_SRC_ROOT), "\n";
+            $has_opt = 1; print `cd $LLVM_SRC_ROOT/; $PWD`;
         } else {
             usage();
         }




From matthijs.kooijman at inter-actief.net  Tue Nov  4 15:27:51 2008
From: matthijs.kooijman at inter-actief.net (Matthijs Kooijman - Inter-Actief)
Date: Tue, 4 Nov 2008 22:27:51 +0100
Subject: [llvm-commits] [llvm] r58718
	-	/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
In-Reply-To: <200811042054.mA4Ks4Ro024583@zion.cs.uiuc.edu>
References: <200811042054.mA4Ks4Ro024583@zion.cs.uiuc.edu>
Message-ID: <20081104212751.GK1010@katherina.student.utwente.nl>

Hi Johannes,

> Allow SROA of vectors.  Removing this caused a
> huge performance regression in something we care
> about.  This may not be final fix.
Good to see this fix. I had intended to work out something like this, but
never found the time.

However, you're saying "Removing this", but AFAIK SROA of vectors never
happened? I recently touched this code, but only made the "don't touch
vectors" limitation slightly less strict, I didn't add it AFAICS?

Gr.

Matthijs
-------------- next part --------------
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From evan.cheng at apple.com  Tue Nov  4 15:36:56 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 04 Nov 2008 21:36:56 -0000
Subject: [llvm-commits] [test-suite] r58720 -
	/test-suite/trunk/Makefile.programs
Message-ID: <200811042136.mA4LauFG025829@zion.cs.uiuc.edu>

Author: evancheng
Date: Tue Nov  4 15:36:56 2008
New Revision: 58720

URL: http://llvm.org/viewvc/llvm-project?rev=58720&view=rev
Log:
-rsh-host has been renamed to -remote-host; also -rsh-user -> -remote-user.

Modified:
    test-suite/trunk/Makefile.programs

Modified: test-suite/trunk/Makefile.programs
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=58720&r1=58719&r2=58720&view=diff

==============================================================================
--- test-suite/trunk/Makefile.programs (original)
+++ test-suite/trunk/Makefile.programs Tue Nov  4 15:36:56 2008
@@ -487,9 +487,9 @@
 # Support remote execution
 ifdef REMOTE_HOST
 ifdef REMOTE_USER
-BUGPOINT_OPTIONS += -rsh-host=$(REMOTE_HOST) -rsh-user=$(REMOTE_USER)
+BUGPOINT_OPTIONS += -remote-host=$(REMOTE_HOST) -remote-user=$(REMOTE_USER)
 else
-BUGPOINT_OPTIONS += -rsh-host=$(REMOTE_HOST)
+BUGPOINT_OPTIONS += -remote-host=$(REMOTE_HOST)
 endif
 endif
 




From ggreif at gmail.com  Tue Nov  4 15:48:10 2008
From: ggreif at gmail.com (Gabor Greif)
Date: Tue, 04 Nov 2008 21:48:10 -0000
Subject: [llvm-commits] [llvm] r58721 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <200811042148.mA4LmAqx026159@zion.cs.uiuc.edu>

Author: ggreif
Date: Tue Nov  4 15:48:10 2008
New Revision: 58721

URL: http://llvm.org/viewvc/llvm-project?rev=58721&view=rev
Log:
fix typos, harmonize formatting

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=58721&r1=58720&r2=58721&view=diff

==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Nov  4 15:48:10 2008
@@ -482,9 +482,9 @@
     have switched over to use it.   The eventual goal is to eliminate
     std::ostream in favor of it.
 
-
  4. LLVM 2.4 includes an optional build system based on CMake. It
-    still is on its early stages but can be useful for Visual C++
-    userswho can not use the Visual Studio IDE.
    5. 
+
  5. LLVM 2.4 includes an optional build system based on CMake. It
+    still is in its early stages but can be useful for Visual C++
+    users who can not use the Visual Studio IDE.
    6. 
 
 
 




From ggreif at gmail.com  Tue Nov  4 15:50:59 2008
From: ggreif at gmail.com (Gabor Greif)
Date: Tue, 04 Nov 2008 21:50:59 -0000
Subject: [llvm-commits] [llvm] r58722 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <200811042150.mA4LoxeT026248@zion.cs.uiuc.edu>

Author: ggreif
Date: Tue Nov  4 15:50:59 2008
New Revision: 58722

URL: http://llvm.org/viewvc/llvm-project?rev=58722&view=rev
Log:
fix two validation errors

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=58722&r1=58721&r2=58722&view=diff

==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Nov  4 15:50:59 2008
@@ -821,12 +821,13 @@
 
 
 
    
+
      
 
    • Fortran support generally works, but there are still several unresolved bugs
     in Bugzilla.  Please see the tools/gfortran component for details.
      • 
     
 
    • The Fortran front-end currently does not build on Darwin (without tweaks)
     due to unresolved dependencies on the C front-end.
      • 
-    
+
    
 
    
 
 




From isanbard at gmail.com  Tue Nov  4 15:53:10 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 04 Nov 2008 21:53:10 -0000
Subject: [llvm-commits] [llvm] r58723 - in /llvm/trunk:
 include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp
 lib/CodeGen/StackProtector.cpp
Message-ID: <200811042153.mA4LrAXY026319@zion.cs.uiuc.edu>

Author: void
Date: Tue Nov  4 15:53:09 2008
New Revision: 58723

URL: http://llvm.org/viewvc/llvm-project?rev=58723&view=rev
Log:
Update in response to feedback from Chris:

- Use enums instead of magic numbers.

- Rework algorithm to use the bytes size from the target to determine when to
  emit stack protectors.

- Get rid of "propolice" in any comments.

- Renamed an option to its expanded form.

- Other miscellanenous changes.

More changes will come after this.

Modified:
    llvm/trunk/include/llvm/CodeGen/Passes.h
    llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
    llvm/trunk/lib/CodeGen/StackProtector.cpp

Modified: llvm/trunk/include/llvm/CodeGen/Passes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Passes.h?rev=58723&r1=58722&r2=58723&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/Passes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/Passes.h Tue Nov  4 15:53:09 2008
@@ -23,8 +23,19 @@
   class FunctionPass;
   class PassInfo;
   class TargetMachine;
+  class TargetLowering;
   class RegisterCoalescer;
 
+  /// StackProtectorLevel - An enumeration for when to determin when to turn
+  /// stack smashing protection (SSP) on.
+  namespace SSP {
+    enum StackProtectorLevel {
+      OFF,          // Stack protectors are off.
+      SOME,         // Stack protectors on only for functions that require them.
+      ALL           // Stack protectors on for all functions.
+    };
+  } // end SSP namespace
+
   /// createUnreachableBlockEliminationPass - The LLVM code generator does not
   /// work well with unreachable basic blocks (what live ranges make sense for a
   /// block that cannot be reached?).  As such, a code generator should either
@@ -193,7 +204,8 @@
   FunctionPass *createStackSlotColoringPass();
 
   /// createStackProtectorPass - This pass adds stack protectors to functions.
-  FunctionPass *createStackProtectorPass(int Level);
+  FunctionPass *createStackProtectorPass(SSP::StackProtectorLevel lvl,
+                                         const TargetLowering *tli);
 
 } // End llvm namespace
 

Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=58723&r1=58722&r2=58723&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original)
+++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Tue Nov  4 15:53:09 2008
@@ -61,9 +61,17 @@
   cl::desc("Enable the experimental \"fast\" instruction selector"));
 
 // Enable stack protectors.
-static cl::opt
-EnableStackProtector("enable-stack-protector", cl::init(0),
-                     cl::desc("Use ProPolice as a stack protection method."));
+static cl::opt
+EnableStackProtector("enable-stack-protector",
+                     cl::desc("Stack canary protection level: (default: off)"),
+                     cl::init(SSP::OFF),
+                     cl::values(clEnumValN(SSP::ALL,  "all",
+                                         "All functions get stack protectors."),
+                                clEnumValN(SSP::SOME, "some",
+                         "Only functions requiring stack protectors get them."),
+                                clEnumValN(SSP::OFF,  "off",
+                                          "No functions get stack protectors."),
+                                clEnumValEnd));
 
 FileModel::Model
 LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
@@ -170,7 +178,8 @@
   if (!Fast)
     PM.add(createCodeGenPreparePass(getTargetLowering()));
 
-  PM.add(createStackProtectorPass(EnableStackProtector));
+  if (EnableStackProtector != SSP::OFF)
+    PM.add(createStackProtectorPass(EnableStackProtector, getTargetLowering()));
 
   if (PrintISelInput)
     PM.add(createPrintFunctionPass("\n\n"

Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58723&r1=58722&r2=58723&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackProtector.cpp Tue Nov  4 15:53:09 2008
@@ -7,10 +7,9 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This pass inserts stack protectors into functions which need them. The stack
-// protectors this uses are the type that ProPolice used. A variable with a
-// random value in it is stored onto the stack before the local variables are
-// allocated. Upon exitting the block, the stored value is checked. If it's
+// This pass inserts stack protectors into functions which need them. A variable
+// with a random value in it is stored onto the stack before the local variables
+// are allocated. Upon exiting the block, the stored value is checked. If it's
 // changed, then there was some sort of violation and the program aborts.
 //
 //===----------------------------------------------------------------------===//
@@ -25,20 +24,24 @@
 #include "llvm/Pass.h"
 #include "llvm/ADT/APInt.h"
 #include "llvm/Support/CommandLine.h"
+#include "llvm/Target/TargetData.h"
+#include "llvm/Target/TargetLowering.h"
 using namespace llvm;
 
 // Enable stack protectors.
 static cl::opt
-SSPBufferSize("ssp-buffer-size", cl::init(8),
+SSPBufferSize("stack-protector-buffer-size", cl::init(8),
               cl::desc("The lower bound for a buffer to be considered for "
                        "stack smashing protection."));
 
 namespace {
   class VISIBILITY_HIDDEN StackProtector : public FunctionPass {
-    // Level == 0  --  Stack protectors are off.
-    // Level == 1  --  Stack protectors are on only for some functions.
-    // Level == 2  --  Stack protectors are on for all functions.
-    int Level;
+    /// Level - The level of stack protection.
+    SSP::StackProtectorLevel Level;
+
+    /// TLI - Keep a pointer of a TargetLowering to consult for determining
+    /// target type sizes.
+    const TargetLowering *TLI;
 
     /// FailBB - Holds the basic block to jump to when the stack protector check
     /// fails.
@@ -70,10 +73,12 @@
 
     /// RequiresStackProtector - Check whether or not this function needs a
     /// stack protector based upon the stack protector level.
-    bool RequiresStackProtector();
+    bool RequiresStackProtector() const;
   public:
     static char ID;             // Pass identification, replacement for typeid.
-    StackProtector(int lvl = 0) : FunctionPass(&ID), Level(lvl), FailBB(0) {}
+    StackProtector() : FunctionPass(&ID), Level(SSP::OFF), TLI(0), FailBB(0) {}
+    StackProtector(SSP::StackProtectorLevel lvl, const TargetLowering *tli)
+      : FunctionPass(&ID), Level(lvl), TLI(tli), FailBB(0) {}
 
     virtual bool runOnFunction(Function &Fn);
   };
@@ -83,8 +88,9 @@
 static RegisterPass
 X("stack-protector", "Insert stack protectors");
 
-FunctionPass *llvm::createStackProtectorPass(int lvl) {
-  return new StackProtector(lvl);
+FunctionPass *llvm::createStackProtectorPass(SSP::StackProtectorLevel lvl,
+                                             const TargetLowering *tli) {
+  return new StackProtector(lvl, tli);
 }
 
 bool StackProtector::runOnFunction(Function &Fn) {
@@ -119,8 +125,8 @@
 
   StackProtFrameSlot = new AllocaInst(PointerType::getUnqual(Type::Int8Ty),
                                       "StackProt_Frame", &InsertPt);
-  LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", true, &InsertPt);
-  new StoreInst(LI, StackProtFrameSlot, true, &InsertPt);
+  LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", false, &InsertPt);
+  new StoreInst(LI, StackProtFrameSlot, false, &InsertPt);
 }
 
 /// InsertStackProtectorEpilogue - Insert code before the return instructions
@@ -135,7 +141,7 @@
   ReturnBBs.reserve(F->size());
 
   for (; I != E; ++I)
-    if (isa((*I).getTerminator()))
+    if (isa(I->getTerminator()))
       ReturnBBs.push_back(I);
 
   if (ReturnBBs.empty()) return; // Odd, but could happen. . .
@@ -188,41 +194,41 @@
   FailBB = BasicBlock::Create("CallStackCheckFailBlk", F);
   std::vector Params;
   Constant *StackChkFail =
-    M->getOrInsertFunction("__stack_chk_fail",
-                           FunctionType::get(Type::VoidTy, Params, false));
+    M->getOrInsertFunction("__stack_chk_fail", Type::VoidTy, NULL);
   CallInst::Create(StackChkFail, "", FailBB);
   new UnreachableInst(FailBB);
 }
 
 /// RequiresStackProtector - Check whether or not this function needs a stack
 /// protector based upon the stack protector level.
-bool StackProtector::RequiresStackProtector() {
+bool StackProtector::RequiresStackProtector() const {
   switch (Level) {
   default: return false;
-  case 2:  return true;
-  case 1: {
+  case SSP::ALL: return true;
+  case SSP::SOME: {
     // If the size of the local variables allocated on the stack is greater than
     // SSPBufferSize, then we require a stack protector.
     uint64_t StackSize = 0;
+    const TargetData *TD = TLI->getTargetData();
 
     for (Function::iterator I = F->begin(), E = F->end(); I != E; ++I) {
       BasicBlock *BB = I;
 
       for (BasicBlock::iterator
              II = BB->begin(), IE = BB->end(); II != IE; ++II)
-        if (AllocaInst *AI = dyn_cast(II))
+        if (AllocaInst *AI = dyn_cast(II)) {
           if (ConstantInt *CI = dyn_cast(AI->getArraySize())) {
+            uint64_t Bytes = TD->getTypeSizeInBits(AI->getAllocatedType()) / 8;
             const APInt &Size = CI->getValue();
-            StackSize += Size.getZExtValue() * 8;
+            StackSize += Bytes * Size.getZExtValue();
+
+            if (SSPBufferSize <= StackSize)
+              return true;
           }
+        }
     }
 
-    if (SSPBufferSize <= StackSize)
-      return true;
-
     return false;
   }
   }
 }
-
-// [EOF] StackProtector.cpp




From isanbard at gmail.com  Tue Nov  4 15:54:08 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 04 Nov 2008 21:54:08 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r58724 -
	/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
Message-ID: <200811042154.mA4Ls8OF026356@zion.cs.uiuc.edu>

Author: void
Date: Tue Nov  4 15:54:08 2008
New Revision: 58724

URL: http://llvm.org/viewvc/llvm-project?rev=58724&view=rev
Log:
Update to use the enumerated values for --enable-stack-protector option.

Modified:
    llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp

Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=58724&r1=58723&r2=58724&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Tue Nov  4 15:54:08 2008
@@ -167,9 +167,16 @@
   }
 
   if (flag_stack_protect > 0) {
-    std::string Arg("--enable-stack-protector=" + utostr(flag_stack_protect));
+    std::string Arg("--enable-stack-protector=");
+
+    if (flag_stack_protect == 1)
+      Arg += "some";
+    else
+      Arg += "all";
+
     ArgStrings.push_back(Arg);
-    Arg = "--ssp-buffer-size=" + utostr(PARAM_VALUE(PARAM_SSP_BUFFER_SIZE));
+    Arg = "--stack-protector-buffer-size=" +
+      utostr(PARAM_VALUE(PARAM_SSP_BUFFER_SIZE));
     ArgStrings.push_back(Arg);
   }
 




From evan.cheng at apple.com  Tue Nov  4 16:19:55 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 04 Nov 2008 22:19:55 -0000
Subject: [llvm-commits] [llvm] r58725 - in /llvm/trunk:
 lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/uint64tof64.ll
Message-ID: <200811042219.mA4MJtdx027401@zion.cs.uiuc.edu>

Author: evancheng
Date: Tue Nov  4 16:19:55 2008
New Revision: 58725

URL: http://llvm.org/viewvc/llvm-project?rev=58725&view=rev
Log:
Actually ARM / Mac OS X does have UINTTOFP_I64_F{64|32} libcalls.

Added:
    llvm/trunk/test/CodeGen/ARM/uint64tof64.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=58725&r1=58724&r2=58725&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Nov  4 16:19:55 2008
@@ -41,10 +41,6 @@
   Subtarget = &TM.getSubtarget();
 
   if (Subtarget->isTargetDarwin()) {
-    // Don't have these.
-    setLibcallName(RTLIB::UINTTOFP_I64_F32, NULL);
-    setLibcallName(RTLIB::UINTTOFP_I64_F64, NULL);
-
     // Uses VFP for Thumb libfuncs if available.
     if (Subtarget->isThumb() && Subtarget->hasVFP2()) {
       // Single-precision floating-point arithmetic.

Added: llvm/trunk/test/CodeGen/ARM/uint64tof64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/uint64tof64.ll?rev=58725&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/ARM/uint64tof64.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/uint64tof64.ll Tue Nov  4 16:19:55 2008
@@ -0,0 +1,17 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+vfp2
+
+	%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+	%struct.__sFILEX = type opaque
+	%struct.__sbuf = type { i8*, i32 }
+@"\01LC10" = external constant [54 x i8]		; <[54 x i8]*> [#uses=1]
+
+define fastcc void @t() {
+entry:
+	%0 = load i64* null, align 4		;  [#uses=1]
+	%1 = uitofp i64 %0 to double		;  [#uses=1]
+	%2 = fdiv double 0.000000e+00, %1		;  [#uses=1]
+	%3 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* null, i8* getelementptr ([54 x i8]* @"\01LC10", i32 0, i32 0), i64 0, double %2)		;  [#uses=0]
+	ret void
+}
+
+declare i32 @fprintf(%struct.FILE*, i8*, ...)




From resistor at mac.com  Tue Nov  4 16:22:42 2008
From: resistor at mac.com (Owen Anderson)
Date: Tue, 04 Nov 2008 22:22:42 -0000
Subject: [llvm-commits] [llvm] r58726 -
	/llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp
Message-ID: <200811042222.mA4MMglr027502@zion.cs.uiuc.edu>

Author: resistor
Date: Tue Nov  4 16:22:41 2008
New Revision: 58726

URL: http://llvm.org/viewvc/llvm-project?rev=58726&view=rev
Log:
First pass at checking for the creation of a new join point when doing pre-alloc splitting.  This is not turned on yet.

Modified:
    llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp

Modified: llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp?rev=58726&r1=58725&r2=58726&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp (original)
+++ llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp Tue Nov  4 16:22:41 2008
@@ -17,6 +17,7 @@
 #define DEBUG_TYPE "pre-alloc-split"
 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
 #include "llvm/CodeGen/LiveStackAnalysis.h"
+#include "llvm/CodeGen/MachineDominators.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineLoopInfo.h"
@@ -89,6 +90,10 @@
         AU.addPreservedID(StrongPHIEliminationID);
       else
         AU.addPreservedID(PHIEliminationID);
+      AU.addRequired();
+      AU.addRequired();
+      AU.addPreserved();
+      AU.addPreserved();
       MachineFunctionPass::getAnalysisUsage(AU);
     }
     
@@ -145,6 +150,9 @@
     bool SplitRegLiveInterval(LiveInterval*);
 
     bool SplitRegLiveIntervals(const TargetRegisterClass **);
+    
+    bool createsNewJoin(LiveRange* LR, MachineBasicBlock* DefMBB,
+                        MachineBasicBlock* BarrierMBB);
   };
 } // end anonymous namespace
 
@@ -817,6 +825,71 @@
   return Change;
 }
 
+bool PreAllocSplitting::createsNewJoin(LiveRange* LR,
+                                       MachineBasicBlock* DefMBB,
+                                       MachineBasicBlock* BarrierMBB) {
+  if (DefMBB == BarrierMBB)
+    return false;
+  
+  if (LR->valno->hasPHIKill)
+    return false;
+  
+  unsigned MBBEnd = LIs->getMBBEndIdx(BarrierMBB);
+  if (LR->end < MBBEnd)
+    return false;
+  
+  MachineLoopInfo& MLI = getAnalysis();
+  if (MLI.getLoopFor(DefMBB) != MLI.getLoopFor(BarrierMBB))
+    return true;
+  
+  MachineDominatorTree& MDT = getAnalysis();
+  SmallPtrSet Visited;
+  typedef std::pair ItPair;
+  SmallVector Stack;
+  Stack.push_back(std::make_pair(BarrierMBB, BarrierMBB->succ_begin()));
+  
+  while (!Stack.empty()) {
+    ItPair P = Stack.back();
+    Stack.pop_back();
+    
+    MachineBasicBlock* PredMBB = P.first;
+    MachineBasicBlock::succ_iterator S = P.second;
+    
+    if (S == PredMBB->succ_end())
+      continue;
+    else if (Visited.count(*S)) {
+      Stack.push_back(std::make_pair(PredMBB, ++S));
+      continue;
+    } else
+      Stack.push_back(std::make_pair(PredMBB, ++S));
+    
+    MachineBasicBlock* MBB = *S;
+    Visited.insert(MBB);
+    
+    if (MBB == BarrierMBB)
+      return true;
+    
+    MachineDomTreeNode* DefMDTN = MDT.getNode(DefMBB);
+    MachineDomTreeNode* BarrierMDTN = MDT.getNode(BarrierMBB);
+    MachineDomTreeNode* MDTN = MDT.getNode(MBB)->getIDom();
+    while (MDTN) {
+      if (MDTN == DefMDTN)
+        return true;
+      else if (MDTN == BarrierMDTN)
+        break;
+      MDTN = MDTN->getIDom();
+    }
+    
+    MBBEnd = LIs->getMBBEndIdx(MBB);
+    if (LR->end > MBBEnd)
+      Stack.push_back(std::make_pair(MBB, MBB->succ_begin()));
+  }
+  
+  return false;
+} 
+  
+
 bool PreAllocSplitting::runOnMachineFunction(MachineFunction &MF) {
   CurrMF = &MF;
   TM     = &MF.getTarget();




From dalej at apple.com  Tue Nov  4 16:46:27 2008
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 4 Nov 2008 14:46:27 -0800
Subject: [llvm-commits] [llvm] r58718	-
	/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
In-Reply-To: <20081104212751.GK1010@katherina.student.utwente.nl>
References: <200811042054.mA4Ks4Ro024583@zion.cs.uiuc.edu>
	<20081104212751.GK1010@katherina.student.utwente.nl>
Message-ID: <100F42E9-C013-4078-A1A9-D9BB34A5B4AC@apple.com>


On Nov 4, 2008, at 1:27 PMPST, Matthijs Kooijman - Inter-Actief wrote:

> Hi Johannes,
>
>> Allow SROA of vectors.  Removing this caused a
>> huge performance regression in something we care
>> about.  This may not be final fix.
> Good to see this fix. I had intended to work out something like  
> this, but
> never found the time.
>
> However, you're saying "Removing this", but AFAIK SROA of vectors  
> never
> happened? I recently touched this code, but only made the "don't touch
> vectors" limitation slightly less strict, I didn't add it AFAICS?

Right, Chris added the restriction in 55226.  Before that it worked.

Chris is of the opinion that the restriction ought to be there, so  
this patch may not stay in place forever.  If you have good arguments  
for permitting this that would be interesting.


  


From isanbard at gmail.com  Tue Nov  4 16:51:24 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 04 Nov 2008 22:51:24 -0000
Subject: [llvm-commits] [llvm] r58727 - in /llvm/trunk:
 include/llvm/Module.h lib/CodeGen/StackProtector.cpp lib/VMCore/Module.cpp
Message-ID: <200811042251.mA4MpO0E028324@zion.cs.uiuc.edu>

Author: void
Date: Tue Nov  4 16:51:24 2008
New Revision: 58727

URL: http://llvm.org/viewvc/llvm-project?rev=58727&view=rev
Log:
- Add a "getOrInsertGlobal" method to the Module class. This acts similarly to
  "getOrInsertFunction" in that it either adds a new declaration of the global
  and returns it, or returns the current one -- optionally casting it to the
  correct type.
- Use the new getOrInsertGlobal in the stack protector code.
- Use "splitBasicBlock" in the stack protector code.


Modified:
    llvm/trunk/include/llvm/Module.h
    llvm/trunk/lib/CodeGen/StackProtector.cpp
    llvm/trunk/lib/VMCore/Module.cpp

Modified: llvm/trunk/include/llvm/Module.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Module.h?rev=58727&r1=58726&r2=58727&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Module.h (original)
+++ llvm/trunk/include/llvm/Module.h Tue Nov  4 16:51:24 2008
@@ -229,6 +229,15 @@
     return getGlobalVariable(Name, true);
   }
 
+  /// getOrInsertGlobal - Look up the specified global in the module symbol
+  /// table.
+  ///   1. If it does not exist, add a declaration of the global and return it.
+  ///   2. Else, the global exists but has the wrong type: return the function
+  ///      with a constantexpr cast to the right type.
+  ///   3. Finally, if the existing global is the correct delclaration, return
+  ///      the existing global.
+  Constant *getOrInsertGlobal(const std::string &Name, const Type *Ty);
+
 /// @}
 /// @name Global Alias Accessors
 /// @{

Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58727&r1=58726&r2=58727&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackProtector.cpp Tue Nov  4 16:51:24 2008
@@ -52,7 +52,7 @@
     AllocaInst *StackProtFrameSlot;
 
     /// StackGuardVar - The global variable for the stack guard.
-    GlobalVariable *StackGuardVar;
+    Constant *StackGuardVar;
 
     Function *F;
     Module *M;
@@ -115,14 +115,8 @@
   BasicBlock &Entry = F->getEntryBlock();
   Instruction &InsertPt = Entry.front();
 
-  const char *StackGuardStr = "__stack_chk_guard";
-  StackGuardVar = M->getNamedGlobal(StackGuardStr);
-
-  if (!StackGuardVar)
-    StackGuardVar = new GlobalVariable(PointerType::getUnqual(Type::Int8Ty),
-                                       false, GlobalValue::ExternalLinkage,
-                                       0, StackGuardStr, M);
-
+  StackGuardVar = M->getOrInsertGlobal("__stack_chk_guard",
+                                       PointerType::getUnqual(Type::Int8Ty));
   StackProtFrameSlot = new AllocaInst(PointerType::getUnqual(Type::Int8Ty),
                                       "StackProt_Frame", &InsertPt);
   LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", false, &InsertPt);
@@ -161,7 +155,7 @@
   //     %3 = cmp i1 %1, %2
   //     br i1 %3, label %SPRet, label %CallStackCheckFailBlk
   //
-  //   SPRet:
+  //   SP_return:
   //     ret ...
   //
   //   CallStackCheckFailBlk:
@@ -174,12 +168,15 @@
     ReturnInst *RI = cast(BB->getTerminator());
     Function::iterator InsPt = BB; ++InsPt; // Insertion point for new BB.
 
-    BasicBlock *NewBB = BasicBlock::Create("SPRet", F, InsPt);
+    // Split the basic block before the return instruction.
+    BasicBlock *NewBB = BB->splitBasicBlock(RI, "SP_return");
 
-    // Move the return instruction into the new basic block.
-    RI->removeFromParent();
-    NewBB->getInstList().insert(NewBB->begin(), RI);
+    // Move the newly created basic block to the point right after the old basic
+    // block.
+    NewBB->removeFromParent();
+    F->getBasicBlockList().insert(InsPt, NewBB);
 
+    // Generate the stack protector instructions in the old basic block.
     LoadInst *LI2 = new LoadInst(StackGuardVar, "", false, BB);
     LoadInst *LI1 = new LoadInst(StackProtFrameSlot, "", true, BB);
     ICmpInst *Cmp = new ICmpInst(CmpInst::ICMP_EQ, LI1, LI2, "", BB);

Modified: llvm/trunk/lib/VMCore/Module.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Module.cpp?rev=58727&r1=58726&r2=58727&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/Module.cpp (original)
+++ llvm/trunk/lib/VMCore/Module.cpp Tue Nov  4 16:51:24 2008
@@ -224,6 +224,28 @@
   return 0;
 }
 
+Constant *Module::getOrInsertGlobal(const std::string &Name, const Type *Ty) {
+  ValueSymbolTable &SymTab = getValueSymbolTable();
+
+  // See if we have a definition for the specified global already.
+  GlobalVariable *GV = dyn_cast_or_null(SymTab.lookup(Name));
+  if (GV == 0) {
+    // Nope, add it
+    GlobalVariable *New =
+      new GlobalVariable(Ty, false, GlobalVariable::ExternalLinkage, 0, Name);
+    GlobalList.push_back(New);
+    return New;                    // Return the new declaration.
+  }
+
+  // If the variable exists but has the wrong type, return a bitcast to the
+  // right type.
+  if (GV->getType() != PointerType::getUnqual(Ty))
+    return ConstantExpr::getBitCast(GV, PointerType::getUnqual(Ty));
+  
+  // Otherwise, we just found the existing function or a prototype.
+  return GV;
+}
+
 //===----------------------------------------------------------------------===//
 // Methods for easy access to the global variables in the module.
 //




From isanbard at gmail.com  Tue Nov  4 16:54:44 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 04 Nov 2008 22:54:44 -0000
Subject: [llvm-commits] [llvm] r58728 -
	/llvm/trunk/lib/CodeGen/StackProtector.cpp
Message-ID: <200811042254.mA4Msilc028426@zion.cs.uiuc.edu>

Author: void
Date: Tue Nov  4 16:54:43 2008
New Revision: 58728

URL: http://llvm.org/viewvc/llvm-project?rev=58728&view=rev
Log:
Small simplification of the stack guard type.

Modified:
    llvm/trunk/lib/CodeGen/StackProtector.cpp

Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58728&r1=58727&r2=58728&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackProtector.cpp Tue Nov  4 16:54:43 2008
@@ -114,11 +114,10 @@
 void StackProtector::InsertStackProtectorPrologue() {
   BasicBlock &Entry = F->getEntryBlock();
   Instruction &InsertPt = Entry.front();
+  const PointerType *GuardTy = PointerType::getUnqual(Type::Int8Ty);
 
-  StackGuardVar = M->getOrInsertGlobal("__stack_chk_guard",
-                                       PointerType::getUnqual(Type::Int8Ty));
-  StackProtFrameSlot = new AllocaInst(PointerType::getUnqual(Type::Int8Ty),
-                                      "StackProt_Frame", &InsertPt);
+  StackGuardVar = M->getOrInsertGlobal("__stack_chk_guard", GuardTy);
+  StackProtFrameSlot = new AllocaInst(GuardTy, "StackProt_Frame", &InsertPt);
   LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", false, &InsertPt);
   new StoreInst(LI, StackProtFrameSlot, false, &InsertPt);
 }




From evan.cheng at apple.com  Tue Nov  4 16:58:57 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 4 Nov 2008 14:58:57 -0800
Subject: [llvm-commits] [llvm-gcc-4.2] r58724 -
	/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
In-Reply-To: <200811042154.mA4Ls8OF026356@zion.cs.uiuc.edu>
References: <200811042154.mA4Ls8OF026356@zion.cs.uiuc.edu>
Message-ID: <9B129617-B0B7-4002-AB08-2D1462CDED65@apple.com>


On Nov 4, 2008, at 1:54 PM, Bill Wendling wrote:

> Author: void
> Date: Tue Nov  4 15:54:08 2008
> New Revision: 58724
>
> URL: http://llvm.org/viewvc/llvm-project?rev=58724&view=rev
> Log:
> Update to use the enumerated values for --enable-stack-protector  
> option.
>
> Modified:
>    llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
>
> Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=58724&r1=58723&r2=58724&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original)
> +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Tue Nov  4 15:54:08 2008
> @@ -167,9 +167,16 @@
>   }
>
>   if (flag_stack_protect > 0) {
> -    std::string Arg("--enable-stack-protector=" +  
> utostr(flag_stack_protect));
> +    std::string Arg("--enable-stack-protector=");
> +
> +    if (flag_stack_protect == 1)
> +      Arg += "some";
> +    else
> +      Arg += "all";

It's a minor issue. But why not

if (flag_stack_protect == 1)
   ArgStrings.push_back("--enable-stack-protector=some")
else
...

to avoid concatenating the strings?

Evan

>
> +
>     ArgStrings.push_back(Arg);
> -    Arg = "--ssp-buffer-size=" +  
> utostr(PARAM_VALUE(PARAM_SSP_BUFFER_SIZE));
> +    Arg = "--stack-protector-buffer-size=" +
> +      utostr(PARAM_VALUE(PARAM_SSP_BUFFER_SIZE));
>     ArgStrings.push_back(Arg);
>   }
>
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From nunoplopes at sapo.pt  Tue Nov  4 17:03:59 2008
From: nunoplopes at sapo.pt (Nuno Lopes)
Date: Tue, 04 Nov 2008 23:03:59 -0000
Subject: [llvm-commits] [llvm] r58730 - in /llvm/trunk:
	lib/VMCore/PassManager.cpp tools/opt/opt.cpp
Message-ID: <200811042303.mA4N3xaE028969@zion.cs.uiuc.edu>

Author: nlopes
Date: Tue Nov  4 17:03:58 2008
New Revision: 58730

URL: http://llvm.org/viewvc/llvm-project?rev=58730&view=rev
Log:
fix memory leak in pass manager when adding an analysis pass that already existed. as pass manager takes ownership of the added passes, it has to delete the pass if it isnt added to the pass list
tweak the opt tool so that it doesnt access a Pass after the ownership was taken by the pass manager

Modified:
    llvm/trunk/lib/VMCore/PassManager.cpp
    llvm/trunk/tools/opt/opt.cpp

Modified: llvm/trunk/lib/VMCore/PassManager.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/PassManager.cpp?rev=58730&r1=58729&r2=58730&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/PassManager.cpp (original)
+++ llvm/trunk/lib/VMCore/PassManager.cpp Tue Nov  4 17:03:58 2008
@@ -458,8 +458,10 @@
   // generate the analysis again. Stale analysis info should not be
   // available at this point.
   if (P->getPassInfo() &&
-      P->getPassInfo()->isAnalysis() && findAnalysisPass(P->getPassInfo()))
+      P->getPassInfo()->isAnalysis() && findAnalysisPass(P->getPassInfo())) {
+    delete P;
     return;
+  }
 
   AnalysisUsage *AnUsage = findAnalysisUsage(P);
 

Modified: llvm/trunk/tools/opt/opt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/opt.cpp?rev=58730&r1=58729&r2=58730&view=diff

==============================================================================
--- llvm/trunk/tools/opt/opt.cpp (original)
+++ llvm/trunk/tools/opt/opt.cpp Tue Nov  4 17:03:58 2008
@@ -527,16 +527,21 @@
         cerr << argv[0] << ": cannot create pass: "
              << PassInf->getPassName() << "\n";
       if (P) {
+        bool isBBPass = dynamic_cast(P) != 0;
+        bool isLPass = !isBBPass && dynamic_cast(P) != 0;
+        bool isFPass = !isLPass && dynamic_cast(P) != 0;
+        bool isCGSCCPass = !isFPass && dynamic_cast(P) != 0;
+
         addPass(Passes, P);
-        
+
         if (AnalyzeOnly) {
-          if (dynamic_cast(P))
+          if (isBBPass)
             Passes.add(new BasicBlockPassPrinter(PassInf));
-          else if (dynamic_cast(P))
-            Passes.add(new  LoopPassPrinter(PassInf));
-          else if (dynamic_cast(P))
+          else if (isLPass)
+            Passes.add(new LoopPassPrinter(PassInf));
+          else if (isFPass)
             Passes.add(new FunctionPassPrinter(PassInf));
-          else if (dynamic_cast(P))
+          else if (isCGSCCPass)
             Passes.add(new CallGraphSCCPassPrinter(PassInf));
           else
             Passes.add(new ModulePassPrinter(PassInf));




From dpatel at apple.com  Tue Nov  4 17:13:50 2008
From: dpatel at apple.com (Devang Patel)
Date: Tue, 04 Nov 2008 23:13:50 -0000
Subject: [llvm-commits] [llvm] r58731 -
	/llvm/trunk/tools/lto/LTOCodeGenerator.cpp
Message-ID: <200811042313.mA4NDoKb029254@zion.cs.uiuc.edu>

Author: dpatel
Date: Tue Nov  4 17:13:50 2008
New Revision: 58731

URL: http://llvm.org/viewvc/llvm-project?rev=58731&view=rev
Log:
On darwin, 32-bit x86 target is i386-apple-darwin...

Modified:
    llvm/trunk/tools/lto/LTOCodeGenerator.cpp

Modified: llvm/trunk/tools/lto/LTOCodeGenerator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOCodeGenerator.cpp?rev=58731&r1=58730&r2=58731&view=diff

==============================================================================
--- llvm/trunk/tools/lto/LTOCodeGenerator.cpp (original)
+++ llvm/trunk/tools/lto/LTOCodeGenerator.cpp Tue Nov  4 17:13:50 2008
@@ -224,7 +224,7 @@
     std::string targetTriple = _linker.getModule()->getTargetTriple();
     args.push_back(gcc.c_str());
     if ( targetTriple.find("darwin") != targetTriple.size() ) {
-        if (strncmp(targetTriple.c_str(), "i686-apple-", 11) == 0) {
+        if (strncmp(targetTriple.c_str(), "i386-apple-", 11) == 0) {
             args.push_back("-arch");
             args.push_back("i386");
         }




From gohman at apple.com  Tue Nov  4 17:41:45 2008
From: gohman at apple.com (Dan Gohman)
Date: Tue, 04 Nov 2008 23:41:45 -0000
Subject: [llvm-commits] [llvm] r58732 - in /llvm/trunk:
 include/llvm/LinkAllPasses.h include/llvm/Transforms/Scalar.h
 lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp
 test/Transforms/SimplifyLibCalls/half-powr.ll
Message-ID: <200811042341.mA4Nfj4s030466@zion.cs.uiuc.edu>

Author: djg
Date: Tue Nov  4 17:41:45 2008
New Revision: 58732

URL: http://llvm.org/viewvc/llvm-project?rev=58732&view=rev
Log:
Add a new pass to simplify specific half_powr function calls. This is
a specialized pass that it not likely to be generally useful.

Added:
    llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp
    llvm/trunk/test/Transforms/SimplifyLibCalls/half-powr.ll
Modified:
    llvm/trunk/include/llvm/LinkAllPasses.h
    llvm/trunk/include/llvm/Transforms/Scalar.h

Modified: llvm/trunk/include/llvm/LinkAllPasses.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LinkAllPasses.h?rev=58732&r1=58731&r2=58732&view=diff

==============================================================================
--- llvm/trunk/include/llvm/LinkAllPasses.h (original)
+++ llvm/trunk/include/llvm/LinkAllPasses.h Tue Nov  4 17:41:45 2008
@@ -99,6 +99,7 @@
       (void) llvm::createSCCPPass();
       (void) llvm::createScalarReplAggregatesPass();
       (void) llvm::createSimplifyLibCallsPass();
+      (void) llvm::createSimplifyHalfPowrLibCallsPass();
       (void) llvm::createSingleLoopExtractorPass();
       (void) llvm::createStripSymbolsPass();
       (void) llvm::createStripDeadPrototypesPass();

Modified: llvm/trunk/include/llvm/Transforms/Scalar.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Scalar.h?rev=58732&r1=58731&r2=58732&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Transforms/Scalar.h (original)
+++ llvm/trunk/include/llvm/Transforms/Scalar.h Tue Nov  4 17:41:45 2008
@@ -319,6 +319,12 @@
 
 //===----------------------------------------------------------------------===//
 //
+/// createSimplifyHalfPowrLibCallsPass - This is an experimental pass that
+/// optimizes specific half_pow functions.
+FunctionPass *createSimplifyHalfPowrLibCallsPass();
+
+//===----------------------------------------------------------------------===//
+//
 // CodeGenPrepare - This pass prepares a function for instruction selection.
 //
 FunctionPass *createCodeGenPreparePass(const TargetLowering *TLI = 0);

Added: llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp?rev=58732&view=auto

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp (added)
+++ llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp Tue Nov  4 17:41:45 2008
@@ -0,0 +1,159 @@
+//===- SimplifyHalfPowrLibCalls.cpp - Optimize specific half_powr calls ---===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements a simple pass that applies an experimental
+// transformation on calls to specific functions.
+//
+//===----------------------------------------------------------------------===//
+
+#define DEBUG_TYPE "simplify-libcalls-halfpowr"
+#include "llvm/Transforms/Scalar.h"
+#include "llvm/Instructions.h"
+#include "llvm/Intrinsics.h"
+#include "llvm/Module.h"
+#include "llvm/Pass.h"
+#include "llvm/Transforms/Utils/BasicBlockUtils.h"
+#include "llvm/Transforms/Utils/Cloning.h"
+#include "llvm/Target/TargetData.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/Support/Compiler.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Config/config.h"
+using namespace llvm;
+
+namespace {
+  /// This pass optimizes well half_powr function calls.
+  ///
+  class VISIBILITY_HIDDEN SimplifyHalfPowrLibCalls : public FunctionPass {
+    const TargetData *TD;
+  public:
+    static char ID; // Pass identification
+    SimplifyHalfPowrLibCalls() : FunctionPass(&ID) {}
+
+    bool runOnFunction(Function &F);
+
+    virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+      AU.addRequired();
+    }
+
+    Instruction *
+    InlineHalfPowrs(const std::vector &HalfPowrs,
+                    Instruction *InsertPt);
+  };
+  char SimplifyHalfPowrLibCalls::ID = 0;
+} // end anonymous namespace.
+
+static RegisterPass
+X("simplify-libcalls-halfpowr", "Simplify half_powr library calls");
+
+// Public interface to the Simplify HalfPowr LibCalls pass.
+FunctionPass *llvm::createSimplifyHalfPowrLibCallsPass() {
+  return new SimplifyHalfPowrLibCalls(); 
+}
+
+/// InlineHalfPowrs - Inline a sequence of adjacent half_powr calls, rearranging
+/// their control flow to better facilitate subsequent optimization.
+Instruction *
+SimplifyHalfPowrLibCalls::InlineHalfPowrs(const std::vector &HalfPowrs,
+                                        Instruction *InsertPt) {
+  std::vector Bodies;
+  BasicBlock *NewBlock = 0;
+
+  for (unsigned i = 0, e = HalfPowrs.size(); i != e; ++i) {
+    CallInst *Call = cast(HalfPowrs[i]);
+    Function *Callee = Call->getCalledFunction();
+
+    // Minimally sanity-check the CFG of half_powr to ensure that it contains
+    // the the kind of code we expect.  If we're running this pass, we have
+    // reason to believe it will be what we expect.
+    Function::iterator I = Callee->begin();
+    BasicBlock *Prologue = I++;
+    if (I == Callee->end()) break;
+    BasicBlock *SubnormalHandling = I++;
+    if (I == Callee->end()) break;
+    BasicBlock *Body = I++;
+    if (I != Callee->end()) break;
+    if (SubnormalHandling->getSinglePredecessor() != Prologue)
+      break;
+    BranchInst *PBI = dyn_cast(Prologue->getTerminator());
+    if (!PBI || !PBI->isConditional())
+      break;
+    BranchInst *SNBI = dyn_cast(SubnormalHandling->getTerminator());
+    if (!SNBI || SNBI->isConditional())
+      break;
+    if (!isa(Body->getTerminator()))
+      break;
+
+    Instruction *NextInst = next(BasicBlock::iterator(Call));
+
+    // Inline the call, taking care of what code ends up where.
+    NewBlock = SplitBlock(NextInst->getParent(), NextInst, this);
+
+    bool B = InlineFunction(Call, 0, TD);
+    assert(B && "half_powr didn't inline?");
+
+    BasicBlock *NewBody = NewBlock->getSinglePredecessor();
+    assert(NewBody);
+    Bodies.push_back(NewBody);
+  }
+
+  if (!NewBlock)
+    return InsertPt;
+
+  // Put the code for all the bodies into one block, to facilitate
+  // subsequent optimization.
+  (void)SplitEdge(NewBlock->getSinglePredecessor(), NewBlock, this);
+  for (unsigned i = 0, e = Bodies.size(); i != e; ++i) {
+    BasicBlock *Body = Bodies[i];
+    Instruction *FNP = Body->getFirstNonPHI();
+    // Splice the insts from body into NewBlock.
+    NewBlock->getInstList().splice(NewBlock->begin(), Body->getInstList(),
+                                   FNP, Body->getTerminator());
+  }
+
+  return NewBlock->begin();
+}
+
+/// runOnFunction - Top level algorithm.
+///
+bool SimplifyHalfPowrLibCalls::runOnFunction(Function &F) {
+  TD = &getAnalysis();
+  
+  bool Changed = false;
+  std::vector HalfPowrs;
+  for (Function::iterator BB = F.begin(), E = F.end(); BB != E; ++BB) {
+    for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) {
+      // Look for calls.
+      bool IsHalfPowr = false;
+      if (CallInst *CI = dyn_cast(I)) {
+        // Look for direct calls and calls to non-external functions.
+        Function *Callee = CI->getCalledFunction();
+        if (Callee && Callee->hasExternalLinkage()) {
+          // Look for calls with well-known names.
+          const char *CalleeName = Callee->getNameStart();
+          if (strcmp(CalleeName, "__half_powrf4") == 0)
+            IsHalfPowr = true;
+        }
+      }
+      if (IsHalfPowr)
+        HalfPowrs.push_back(I);
+      // We're looking for sequences of up to three such calls, which we'll
+      // simplify as a group.
+      if ((!IsHalfPowr && !HalfPowrs.empty()) || HalfPowrs.size() == 3) {
+        I = InlineHalfPowrs(HalfPowrs, I);
+        E = I->getParent()->end();
+        HalfPowrs.clear();
+        Changed = true;
+      }
+    }
+    assert(HalfPowrs.empty() && "Block had no terminator!");
+  }
+
+  return Changed;
+}

Added: llvm/trunk/test/Transforms/SimplifyLibCalls/half-powr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SimplifyLibCalls/half-powr.ll?rev=58732&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/SimplifyLibCalls/half-powr.ll (added)
+++ llvm/trunk/test/Transforms/SimplifyLibCalls/half-powr.ll Tue Nov  4 17:41:45 2008
@@ -0,0 +1,41 @@
+; RUN: llvm-as < %s | opt -simplify-libcalls-halfpowr | llvm-dis | %prcontext {mul float} 1 | grep {mul float} | count 8
+
+define float @__half_powrf4(float %f, float %g) nounwind readnone {
+entry:
+	%0 = fcmp olt float %f, 2.000000e+00		;  [#uses=1]
+	br i1 %0, label %bb, label %bb1
+
+bb:		; preds = %entry
+	%1 = fdiv float %f, 3.000000e+00		;  [#uses=1]
+	br label %bb1
+
+bb1:		; preds = %bb, %entry
+	%f_addr.0 = phi float [ %1, %bb ], [ %f, %entry ]		;  [#uses=1]
+	%2 = mul float %f_addr.0, %g		;  [#uses=1]
+	ret float %2
+}
+
+define void @foo(float* %p) nounwind {
+entry:
+	%0 = load float* %p, align 4		;  [#uses=1]
+	%1 = getelementptr float* %p, i32 1		;  [#uses=1]
+	%2 = load float* %1, align 4		;  [#uses=1]
+	%3 = getelementptr float* %p, i32 2		;  [#uses=1]
+	%4 = load float* %3, align 4		;  [#uses=1]
+	%5 = getelementptr float* %p, i32 3		;  [#uses=1]
+	%6 = load float* %5, align 4		;  [#uses=1]
+	%7 = getelementptr float* %p, i32 4		;  [#uses=1]
+	%8 = load float* %7, align 4		;  [#uses=1]
+	%9 = getelementptr float* %p, i32 5		;  [#uses=1]
+	%10 = load float* %9, align 4		;  [#uses=1]
+	%11 = tail call float @__half_powrf4(float %0, float %6) nounwind		;  [#uses=1]
+	%12 = tail call float @__half_powrf4(float %2, float %8) nounwind		;  [#uses=1]
+	%13 = tail call float @__half_powrf4(float %4, float %10) nounwind		;  [#uses=1]
+	%14 = getelementptr float* %p, i32 6		;  [#uses=1]
+	store float %11, float* %14, align 4
+	%15 = getelementptr float* %p, i32 7		;  [#uses=1]
+	store float %12, float* %15, align 4
+	%16 = getelementptr float* %p, i32 8		;  [#uses=1]
+	store float %13, float* %16, align 4
+	ret void
+}




From alenhar2 at cs.uiuc.edu  Tue Nov  4 17:43:42 2008
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Tue, 04 Nov 2008 23:43:42 -0000
Subject: [llvm-commits] [poolalloc] r58733 -
	/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp
Message-ID: <200811042343.mA4NhhDF030632@zion.cs.uiuc.edu>

Author: alenhar2
Date: Tue Nov  4 17:43:42 2008
New Revision: 58733

URL: http://llvm.org/viewvc/llvm-project?rev=58733&view=rev
Log:
replaceUsesOfWith is not valid on constants, replaceAllUsesOfWith is though.  This might cover the constant case.  Alternate idea is to keep track of what shouldn't change and undo the change for those afterwards

Modified:
    poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp

Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp?rev=58733&r1=58732&r2=58733&view=diff

==============================================================================
--- poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Tue Nov  4 17:43:42 2008
@@ -194,8 +194,17 @@
             continue;
       }
 
-      User->replaceUsesOfWith (F, ConstantExpr::getPointerCast(I->second,
-                                                               F->getType()));
+      Constant* CEnew = ConstantExpr::getPointerCast(I->second, F->getType());
+
+      // Must handle Constants specially, we cannot call replaceUsesOfWith on a
+      // constant because they are uniqued.
+      if (Constant *C = dyn_cast(User)) {
+        if (!isa(C)) {
+          C->replaceUsesOfWithOnConstant(F, CEnew, User->op_begin());
+          continue;
+        }
+      }
+      User->replaceUsesOfWith (F, CEnew);
     }
   }
 




From asl at math.spbu.ru  Tue Nov  4 17:02:39 2008
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Tue, 04 Nov 2008 23:02:39 -0000
Subject: [llvm-commits] [llvm] r58729 - in
 /llvm/trunk/test/Transforms/MergeFunc: phi-speculation1.ll
 phi-speculation2.ll
Message-ID: <200811042302.mA4N2dcl028893@zion.cs.uiuc.edu>

Author: asl
Date: Tue Nov  4 17:02:39 2008
New Revision: 58729

URL: http://llvm.org/viewvc/llvm-project?rev=58729&view=rev
Log:
Fix tests not to emit IR output

Modified:
    llvm/trunk/test/Transforms/MergeFunc/phi-speculation1.ll
    llvm/trunk/test/Transforms/MergeFunc/phi-speculation2.ll

Modified: llvm/trunk/test/Transforms/MergeFunc/phi-speculation1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/MergeFunc/phi-speculation1.ll?rev=58729&r1=58728&r2=58729&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/MergeFunc/phi-speculation1.ll (original)
+++ llvm/trunk/test/Transforms/MergeFunc/phi-speculation1.ll Tue Nov  4 17:02:39 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -mergefunc -stats | not grep {functions merged}
+; RUN: llvm-as < %s | opt -mergefunc -stats -disable-output |& not grep {functions merged}
 
 define i32 @foo1(i32 %x) {
 entry:

Modified: llvm/trunk/test/Transforms/MergeFunc/phi-speculation2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/MergeFunc/phi-speculation2.ll?rev=58729&r1=58728&r2=58729&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/MergeFunc/phi-speculation2.ll (original)
+++ llvm/trunk/test/Transforms/MergeFunc/phi-speculation2.ll Tue Nov  4 17:02:39 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -mergefunc -stats |& grep {functions merged}
+; RUN: llvm-as < %s | opt -mergefunc -stats -disable-output |& grep {functions merged}
 
 define i32 @foo1(i32 %x) {
 entry:




From monping at apple.com  Tue Nov  4 17:54:35 2008
From: monping at apple.com (Mon Ping Wang)
Date: Tue, 4 Nov 2008 15:54:35 -0800
Subject: [llvm-commits] Patch: generalize vector shuffle
In-Reply-To: 
References: <7C812DE7-E002-4767-A0AE-192738C25237@apple.com>
	<00BEE636-9DBF-40CE-A322-1A50F2D6BEE3@apple.com>
	
	
Message-ID: <8C28F2F1-32AE-42CC-8CD2-3B13FC6F6F9F@apple.com>

Hi,

I added a new class to share utilities that can be used by both  
LegalizeTypes and  LegalizeDAGs.
I moved the common functions in there.  Once LegalizeType is required,  
I can move those functions into LegalizeTypes as they will no longer  
be necessary.  For splitting the vector shuffle, I didn't find a nice  
way to split that function into pieces.  It could be split cleanly if  
I remove the optimization that tries to reuse subvectors (it tries to  
extract only the subvectors that it needs to split the vector  
shuffle).  I have added more comments that tries to describe what is  
going on in that routine.  Please let me know if anyone has any  
comments.

Thanks,
   -- Mon Ping

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On Nov 3, 2008, at 10:17 AM, Mon Ping Wang wrote:

> Hi Evan,
>
> There are a few functions that duplicated between LegalizeTypes and
> LegalizeDAG.  I wasn't sure if the right thing to do here.  If
> LegalizeType will remain optional for sometime, I would have the two
> use the same function and have them shared (I don't think there is
> such a case today).   If LegalizeType was be required soon, I thought
> it would be easier to duplicate the two and delete it from LegalizeDAG
> as it wouldn't be necessary anymore.  However, it seems that I made a
> mistake of doing the 2nd way as this would cause some maintenance
> headaches until LegalizeType is required as well as making the patch
> more painful to digest.  I'll look for a place to house these
> utilities functions so they can be shared.  I'll clean up the early
> exit stuff and try to factor out more of SplitVecRes_VECTOR_SHUFFLE
> stuff.
>
> Thanks,
> -- Mon Ping
>
>
>
> On Nov 2, 2008, at 11:47 PM, Evan Cheng wrote:
>
>> Hi Mon Ping,
>>
>> Thanks for doing this. It's an important improvement.
>>
>> However, this patch is hard (at least for me) to digest. It's just a
>> lot of code. :-) Some of the functions have become so big that it's
>> hard to follow. For example, SplitVecRes_VECTOR_SHUFFLE. Is it
>> possible to factor some stuff out?
>>
>> Also, some of code seems to be replicated in several functions  
>> (please
>> correct me if that's not the case). For example, the code that
>> determines how an element is used.
>>
>> A stylistic nitpick:
>>
>> +    if (VT1NumElems*2 == NumElems && SequentialMask(Mask, 0)) {
>> +      setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, VT, V1, V2));
>> +      return;
>> +    }
>> +    else {
>>
>> The else { } isn't needed because of the early exit. Same issue here:
>>
>> +    if (VT1NumElems == NumElems && SequentialMask(Mask,0)) {
>> +      setValue(&I, V1);
>> +      return;
>> +    } else if (VT1NumElems == NumElems &&
>> SequentialMask(Mask,NumElems)) {
>> +      setValue(&I, V2);
>> +      return;
>> +    } else {
>> +      // Analyze the access pattern of the vector to see if we can
>> extract
>> +      // two subvectors and do the shuffle.
>>
>> Don't forget to end comment sentences with periods. :-)
>>
>> Evan
>>
>> On Oct 31, 2008, at 7:56 PM, Mon Ping Wang wrote:
>>
>>> 
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits


From isanbard at gmail.com  Tue Nov  4 17:59:35 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 4 Nov 2008 15:59:35 -0800
Subject: [llvm-commits] [llvm] r58673 - in /llvm/trunk:
	include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp
	lib/CodeGen/StackProtector.cpp
In-Reply-To: 
References: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu>
	
Message-ID: <16e5fdf90811041559n79df52cej45d726133f7d2521@mail.gmail.com>

On Tue, Nov 4, 2008 at 5:28 AM, Chris Lattner  wrote:
>> +  PM.add(createStackProtectorPass(EnableStackProtector));
>
> Why do you add the pass even when it is not enabled?  Have you looked
> at whether adding this pass ends up breaking analysis chains, and
> requiring them to be run multiple times?  For example, does dominators
> end up being run more frequently with this?  If so, the pass should
> update dominators instead of invalidating it.
>
I looked at --debug-pass=Details with stack protectors and without.
There doesn't seem to be a difference in the two analyses. I'll test
more on other programs to make sure. I'm trying to do this late in the
game -- right before DAG conversion -- so that LLVM IR passes won't be
affected too much.

> Two things: first, use I->getTerminator.  Second, why do you make a
> vector of returns and iterate over the vector?  You should be able to
> handle all of these with one pass over the function without the
> intermediate vector.  Also, F->size() is linear time, so that itself
> does a pass over the function.
>
I simplified the code. But it still looks like modifying the function
while iterating over it is doing badness (it went into an infinite
loop on me when I tried it out). What did you have in mind?

-bw


From isanbard at gmail.com  Tue Nov  4 18:00:22 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 05 Nov 2008 00:00:22 -0000
Subject: [llvm-commits] [llvm] r58734 -
	/llvm/trunk/lib/CodeGen/StackProtector.cpp
Message-ID: <200811050000.mA500MWr031281@zion.cs.uiuc.edu>

Author: void
Date: Tue Nov  4 18:00:21 2008
New Revision: 58734

URL: http://llvm.org/viewvc/llvm-project?rev=58734&view=rev
Log:
Some code simplification. It now doesn't generate a prologue if the epilogue
isn't going to be generated.

Modified:
    llvm/trunk/lib/CodeGen/StackProtector.cpp

Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58734&r1=58733&r2=58734&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackProtector.cpp Tue Nov  4 18:00:21 2008
@@ -43,42 +43,29 @@
     /// target type sizes.
     const TargetLowering *TLI;
 
-    /// FailBB - Holds the basic block to jump to when the stack protector check
-    /// fails.
-    BasicBlock *FailBB;
-
-    /// StackProtFrameSlot - The place on the stack that the stack protector
-    /// guard is kept.
-    AllocaInst *StackProtFrameSlot;
-
-    /// StackGuardVar - The global variable for the stack guard.
-    Constant *StackGuardVar;
-
     Function *F;
     Module *M;
 
-    /// InsertStackProtectorPrologue - Insert code into the entry block that
-    /// stores the __stack_chk_guard variable onto the stack.
-    void InsertStackProtectorPrologue();
-
-    /// InsertStackProtectorEpilogue - Insert code before the return
-    /// instructions checking the stack value that was stored in the
-    /// prologue. If it isn't the same as the original value, then call a
-    /// "failure" function.
-    void InsertStackProtectorEpilogue();
+    /// InsertStackProtectors - Insert code into the prologue and epilogue of
+    /// the function.
+    ///
+    ///  - The prologue code loads and stores the stack guard onto the stack.
+    ///  - The epilogue checks the value stored in the prologue against the
+    ///    original value. It calls __stack_chk_fail if they differ.
+    bool InsertStackProtectors();
 
     /// CreateFailBB - Create a basic block to jump to when the stack protector
     /// check fails.
-    void CreateFailBB();
+    BasicBlock *CreateFailBB();
 
     /// RequiresStackProtector - Check whether or not this function needs a
     /// stack protector based upon the stack protector level.
     bool RequiresStackProtector() const;
   public:
     static char ID;             // Pass identification, replacement for typeid.
-    StackProtector() : FunctionPass(&ID), Level(SSP::OFF), TLI(0), FailBB(0) {}
+    StackProtector() : FunctionPass(&ID), Level(SSP::OFF), TLI(0) {}
     StackProtector(SSP::StackProtectorLevel lvl, const TargetLowering *tli)
-      : FunctionPass(&ID), Level(lvl), TLI(tli), FailBB(0) {}
+      : FunctionPass(&ID), Level(lvl), TLI(tli) {}
 
     virtual bool runOnFunction(Function &Fn);
   };
@@ -99,45 +86,42 @@
 
   if (!RequiresStackProtector()) return false;
   
-  InsertStackProtectorPrologue();
-  InsertStackProtectorEpilogue();
-
-  // Cleanup.
-  FailBB = 0;
-  StackProtFrameSlot = 0;
-  StackGuardVar = 0;
-  return true;
-}
-
-/// InsertStackProtectorPrologue - Insert code into the entry block that stores
-/// the __stack_chk_guard variable onto the stack.
-void StackProtector::InsertStackProtectorPrologue() {
-  BasicBlock &Entry = F->getEntryBlock();
-  Instruction &InsertPt = Entry.front();
-  const PointerType *GuardTy = PointerType::getUnqual(Type::Int8Ty);
-
-  StackGuardVar = M->getOrInsertGlobal("__stack_chk_guard", GuardTy);
-  StackProtFrameSlot = new AllocaInst(GuardTy, "StackProt_Frame", &InsertPt);
-  LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", false, &InsertPt);
-  new StoreInst(LI, StackProtFrameSlot, false, &InsertPt);
+  return InsertStackProtectors();
 }
 
-/// InsertStackProtectorEpilogue - Insert code before the return instructions
-/// checking the stack value that was stored in the prologue. If it isn't the
-/// same as the original value, then call a "failure" function.
-void StackProtector::InsertStackProtectorEpilogue() {
-  // Create the basic block to jump to when the guard check fails.
-  CreateFailBB();
-
-  Function::iterator I = F->begin(), E = F->end();
+/// InsertStackProtectors - Insert code into the prologue and epilogue of the
+/// function.
+///
+///  - The prologue code loads and stores the stack guard onto the stack.
+///  - The epilogue checks the value stored in the prologue against the original
+///    value. It calls __stack_chk_fail if they differ.
+bool StackProtector::InsertStackProtectors() {
   std::vector ReturnBBs;
-  ReturnBBs.reserve(F->size());
 
-  for (; I != E; ++I)
+  for (Function::iterator I = F->begin(); I != F->end(); ++I)
     if (isa(I->getTerminator()))
       ReturnBBs.push_back(I);
 
-  if (ReturnBBs.empty()) return; // Odd, but could happen. . .
+  // If this function doesn't return, don't bother with stack protectors.
+  if (ReturnBBs.empty()) return false;
+
+  // Insert code into the entry block that stores the __stack_chk_guard variable
+  // onto the stack.
+  BasicBlock &Entry = F->getEntryBlock();
+  Instruction *InsertPt = &Entry.front();
+  const PointerType *GuardTy = PointerType::getUnqual(Type::Int8Ty);
+
+  // The global variable for the stack guard.
+  Constant *StackGuardVar = M->getOrInsertGlobal("__stack_chk_guard", GuardTy);
+
+  // The place on the stack that the stack protector guard is kept.
+  AllocaInst *StackProtFrameSlot =
+    new AllocaInst(GuardTy, "StackProt_Frame", InsertPt);
+  LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", false, InsertPt);
+  new StoreInst(LI, StackProtFrameSlot, false, InsertPt);
+
+  // Create the basic block to jump to when the guard check fails.
+  BasicBlock *FailBB = CreateFailBB();
 
   // Loop through the basic blocks that have return instructions. Convert this:
   //
@@ -162,8 +146,8 @@
   //     unreachable
   //
   for (std::vector::iterator
-         II = ReturnBBs.begin(), IE = ReturnBBs.end(); II != IE; ++II) {
-    BasicBlock *BB = *II;
+         I = ReturnBBs.begin(), E = ReturnBBs.end(); I != E; ++I) {
+    BasicBlock *BB = *I;
     ReturnInst *RI = cast(BB->getTerminator());
     Function::iterator InsPt = BB; ++InsPt; // Insertion point for new BB.
 
@@ -171,7 +155,7 @@
     BasicBlock *NewBB = BB->splitBasicBlock(RI, "SP_return");
 
     // Move the newly created basic block to the point right after the old basic
-    // block.
+    // block so that it's in the "fall through" position.
     NewBB->removeFromParent();
     F->getBasicBlockList().insert(InsPt, NewBB);
 
@@ -181,18 +165,20 @@
     ICmpInst *Cmp = new ICmpInst(CmpInst::ICMP_EQ, LI1, LI2, "", BB);
     BranchInst::Create(NewBB, FailBB, Cmp, BB);
   }
+
+  return true;
 }
 
 /// CreateFailBB - Create a basic block to jump to when the stack protector
 /// check fails.
-void StackProtector::CreateFailBB() {
-  assert(!FailBB && "Failure basic block already created?!");
-  FailBB = BasicBlock::Create("CallStackCheckFailBlk", F);
+BasicBlock *StackProtector::CreateFailBB() {
+  BasicBlock *FailBB = BasicBlock::Create("CallStackCheckFailBlk", F);
   std::vector Params;
   Constant *StackChkFail =
     M->getOrInsertFunction("__stack_chk_fail", Type::VoidTy, NULL);
   CallInst::Create(StackChkFail, "", FailBB);
   new UnreachableInst(FailBB);
+  return FailBB;
 }
 
 /// RequiresStackProtector - Check whether or not this function needs a stack




From isanbard at gmail.com  Tue Nov  4 18:02:14 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 4 Nov 2008 16:02:14 -0800
Subject: [llvm-commits] [llvm-gcc-4.2] r58724 -
	/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
In-Reply-To: <9B129617-B0B7-4002-AB08-2D1462CDED65@apple.com>
References: <200811042154.mA4Ls8OF026356@zion.cs.uiuc.edu>
	<9B129617-B0B7-4002-AB08-2D1462CDED65@apple.com>
Message-ID: <16e5fdf90811041602x6c78698eh953c6e05dfb5731c@mail.gmail.com>

On Tue, Nov 4, 2008 at 2:58 PM, Evan Cheng  wrote:
>
> On Nov 4, 2008, at 1:54 PM, Bill Wendling wrote:
>
>> Author: void
>> Date: Tue Nov  4 15:54:08 2008
>> New Revision: 58724
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=58724&view=rev
>> Log:
>> Update to use the enumerated values for --enable-stack-protector
>> option.
>>
>> Modified:
>>    llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
>>
>> Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=58724&r1=58723&r2=58724&view=diff
>>
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> ======================================================================
>> --- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original)
>> +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Tue Nov  4 15:54:08 2008
>> @@ -167,9 +167,16 @@
>>   }
>>
>>   if (flag_stack_protect > 0) {
>> -    std::string Arg("--enable-stack-protector=" +
>> utostr(flag_stack_protect));
>> +    std::string Arg("--enable-stack-protector=");
>> +
>> +    if (flag_stack_protect == 1)
>> +      Arg += "some";
>> +    else
>> +      Arg += "all";
>
> It's a minor issue. But why not
>
> if (flag_stack_protect == 1)
>   ArgStrings.push_back("--enable-stack-protector=some")
> else
> ...
>
> to avoid concatenating the strings?
>
Sure. :-)

-bw


From isanbard at gmail.com  Tue Nov  4 18:03:20 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 05 Nov 2008 00:03:20 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r58735 -
	/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
Message-ID: <200811050003.mA503Kil031371@zion.cs.uiuc.edu>

Author: void
Date: Tue Nov  4 18:03:20 2008
New Revision: 58735

URL: http://llvm.org/viewvc/llvm-project?rev=58735&view=rev
Log:
Simplification to get rid of string concatenation.

Modified:
    llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp

Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=58735&r1=58734&r2=58735&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Tue Nov  4 18:03:20 2008
@@ -167,12 +167,12 @@
   }
 
   if (flag_stack_protect > 0) {
-    std::string Arg("--enable-stack-protector=");
+    std::string Arg;
 
     if (flag_stack_protect == 1)
-      Arg += "some";
+      Arg = "--enable-stack-protector=some";
     else
-      Arg += "all";
+      Arg = "--enable-stack-protector=all";
 
     ArgStrings.push_back(Arg);
     Arg = "--stack-protector-buffer-size=" +




From ofv at wanadoo.es  Tue Nov  4 18:11:22 2008
From: ofv at wanadoo.es (Oscar Fuentes)
Date: Wed, 05 Nov 2008 00:11:22 -0000
Subject: [llvm-commits] [llvm] r58736 -
	/llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt
Message-ID: <200811050011.mA50BMJ9031650@zion.cs.uiuc.edu>

Author: ofv
Date: Tue Nov  4 18:11:22 2008
New Revision: 58736

URL: http://llvm.org/viewvc/llvm-project?rev=58736&view=rev
Log:
CMake: updated list of source files.

Modified:
    llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt

Modified: llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt?rev=58736&r1=58735&r2=58736&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt (original)
+++ llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt Tue Nov  4 18:11:22 2008
@@ -26,6 +26,7 @@
   Scalar.cpp
   ScalarReplAggregates.cpp
   SimplifyCFGPass.cpp
+  SimplifyHalfPowrLibCalls.cpp
   SimplifyLibCalls.cpp
   TailDuplication.cpp
   TailRecursionElimination.cpp




From evan.cheng at apple.com  Tue Nov  4 18:22:28 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 05 Nov 2008 00:22:28 -0000
Subject: [llvm-commits] [llvm] r58737 -
	/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp
Message-ID: <200811050022.mA50MSSx032023@zion.cs.uiuc.edu>

Author: evancheng
Date: Tue Nov  4 18:22:28 2008
New Revision: 58737

URL: http://llvm.org/viewvc/llvm-project?rev=58737&view=rev
Log:
Debugging output tweak.

Modified:
    llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp

Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp?rev=58737&r1=58736&r2=58737&view=diff

==============================================================================
--- llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Tue Nov  4 18:22:28 2008
@@ -94,7 +94,7 @@
 void ExecutionEngine::addGlobalMapping(const GlobalValue *GV, void *Addr) {
   MutexGuard locked(lock);
 
-  DOUT << "Map " << *GV << " to " << Addr << "\n";  
+  DOUT << "Map \'" << GV->getNameStart() << "\' to " << Addr << "\n";  
   void *&CurVal = state.getGlobalAddressMap(locked)[GV];
   assert((CurVal == 0 || Addr == 0) && "GlobalMapping already established!");
   CurVal = Addr;
@@ -839,7 +839,7 @@
 // specified memory location...
 //
 void ExecutionEngine::InitializeMemory(const Constant *Init, void *Addr) {
-  DOUT << "Initializing " << Addr;
+  DOUT << "Initializing " << Addr << " ";
   DEBUG(Init->dump());
   if (isa(Init)) {
     return;




From resistor at mac.com  Tue Nov  4 18:32:13 2008
From: resistor at mac.com (Owen Anderson)
Date: Wed, 05 Nov 2008 00:32:13 -0000
Subject: [llvm-commits] [llvm] r58738 -
	/llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp
Message-ID: <200811050032.mA50WDQI032392@zion.cs.uiuc.edu>

Author: resistor
Date: Tue Nov  4 18:32:13 2008
New Revision: 58738

URL: http://llvm.org/viewvc/llvm-project?rev=58738&view=rev
Log:
Use the new predicate to control when we do prealloc splitting.  Fix a small bug.

Modified:
    llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp

Modified: llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp?rev=58738&r1=58737&r2=58738&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp (original)
+++ llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp Tue Nov  4 18:32:13 2008
@@ -648,6 +648,10 @@
   if (DefMI && LIs->isReMaterializable(*LI, ValNo, DefMI))
     return false;
 
+  // If this would create a new join point, do not split.
+  if (DefMI && createsNewJoin(LR, DefMI->getParent(), Barrier->getParent()))
+    return false;
+
   // Find all references in the barrier mbb.
   SmallPtrSet RefsInMBB;
   for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(CurrLI->reg),
@@ -862,7 +866,7 @@
       Stack.push_back(std::make_pair(PredMBB, ++S));
       continue;
     } else
-      Stack.push_back(std::make_pair(PredMBB, ++S));
+      Stack.push_back(std::make_pair(PredMBB, S+1));
     
     MachineBasicBlock* MBB = *S;
     Visited.insert(MBB);




From isanbard at gmail.com  Tue Nov  4 18:46:16 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 05 Nov 2008 00:46:16 -0000
Subject: [llvm-commits] [llvm] r58739 -
	/llvm/trunk/lib/CodeGen/StackProtector.cpp
Message-ID: <200811050046.mA50kGxw000360@zion.cs.uiuc.edu>

Author: void
Date: Tue Nov  4 18:46:15 2008
New Revision: 58739

URL: http://llvm.org/viewvc/llvm-project?rev=58739&view=rev
Log:
Fix comment

Modified:
    llvm/trunk/lib/CodeGen/StackProtector.cpp

Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58739&r1=58738&r2=58739&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackProtector.cpp Tue Nov  4 18:46:15 2008
@@ -28,7 +28,8 @@
 #include "llvm/Target/TargetLowering.h"
 using namespace llvm;
 
-// Enable stack protectors.
+// SSPBufferSize - The lower bound for a buffer to be considered for stack
+// smashing protection.
 static cl::opt
 SSPBufferSize("stack-protector-buffer-size", cl::init(8),
               cl::desc("The lower bound for a buffer to be considered for "




From isanbard at gmail.com  Tue Nov  4 18:54:27 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 05 Nov 2008 00:54:27 -0000
Subject: [llvm-commits] [llvm] r58740 -
	/llvm/trunk/lib/CodeGen/StackProtector.cpp
Message-ID: <200811050054.mA50sRIG000604@zion.cs.uiuc.edu>

Author: void
Date: Tue Nov  4 18:54:27 2008
New Revision: 58740

URL: http://llvm.org/viewvc/llvm-project?rev=58740&view=rev
Log:
Simplify the allocated size calculation.

Modified:
    llvm/trunk/lib/CodeGen/StackProtector.cpp

Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58740&r1=58739&r2=58740&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackProtector.cpp Tue Nov  4 18:54:27 2008
@@ -201,9 +201,9 @@
              II = BB->begin(), IE = BB->end(); II != IE; ++II)
         if (AllocaInst *AI = dyn_cast(II)) {
           if (ConstantInt *CI = dyn_cast(AI->getArraySize())) {
-            uint64_t Bytes = TD->getTypeSizeInBits(AI->getAllocatedType()) / 8;
-            const APInt &Size = CI->getValue();
-            StackSize += Bytes * Size.getZExtValue();
+            const Type *Ty = AI->getAllocatedType();
+            uint64_t TySize = TD->getABITypeSize(Ty);
+            StackSize += TySize * CI->getZExtValue(); // Total allocated size.
 
             if (SSPBufferSize <= StackSize)
               return true;




From isanbard at gmail.com  Tue Nov  4 18:56:36 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 05 Nov 2008 00:56:36 -0000
Subject: [llvm-commits] [llvm] r58741 -
	/llvm/trunk/lib/CodeGen/StackProtector.cpp
Message-ID: <200811050056.mA50ua0S000675@zion.cs.uiuc.edu>

Author: void
Date: Tue Nov  4 18:56:35 2008
New Revision: 58741

URL: http://llvm.org/viewvc/llvm-project?rev=58741&view=rev
Log:
Remove dead variable.

Modified:
    llvm/trunk/lib/CodeGen/StackProtector.cpp

Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58741&r1=58740&r2=58741&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackProtector.cpp Tue Nov  4 18:56:35 2008
@@ -174,7 +174,6 @@
 /// check fails.
 BasicBlock *StackProtector::CreateFailBB() {
   BasicBlock *FailBB = BasicBlock::Create("CallStackCheckFailBlk", F);
-  std::vector Params;
   Constant *StackChkFail =
     M->getOrInsertFunction("__stack_chk_fail", Type::VoidTy, NULL);
   CallInst::Create(StackChkFail, "", FailBB);




From evan.cheng at apple.com  Tue Nov  4 19:05:32 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 4 Nov 2008 17:05:32 -0800
Subject: [llvm-commits] [llvm] r58726 -
	/llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp
In-Reply-To: <200811042222.mA4MMglr027502@zion.cs.uiuc.edu>
References: <200811042222.mA4MMglr027502@zion.cs.uiuc.edu>
Message-ID: 

Thanks. Please add comment to createsNewJoin. Also, the function name  
sounds like it's creating a new join. How about SplitWillCreateNewJoin?

Evan

On Nov 4, 2008, at 2:22 PM, Owen Anderson wrote:

> Author: resistor
> Date: Tue Nov  4 16:22:41 2008
> New Revision: 58726
>
> URL: http://llvm.org/viewvc/llvm-project?rev=58726&view=rev
> Log:
> First pass at checking for the creation of a new join point when  
> doing pre-alloc splitting.  This is not turned on yet.
>
> Modified:
>    llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp
>
> Modified: llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp?rev=58726&r1=58725&r2=58726&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp (original)
> +++ llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp Tue Nov  4 16:22:41  
> 2008
> @@ -17,6 +17,7 @@
> #define DEBUG_TYPE "pre-alloc-split"
> #include "llvm/CodeGen/LiveIntervalAnalysis.h"
> #include "llvm/CodeGen/LiveStackAnalysis.h"
> +#include "llvm/CodeGen/MachineDominators.h"
> #include "llvm/CodeGen/MachineFrameInfo.h"
> #include "llvm/CodeGen/MachineFunctionPass.h"
> #include "llvm/CodeGen/MachineLoopInfo.h"
> @@ -89,6 +90,10 @@
>         AU.addPreservedID(StrongPHIEliminationID);
>       else
>         AU.addPreservedID(PHIEliminationID);
> +      AU.addRequired();
> +      AU.addRequired();
> +      AU.addPreserved();
> +      AU.addPreserved();
>       MachineFunctionPass::getAnalysisUsage(AU);
>     }
>
> @@ -145,6 +150,9 @@
>     bool SplitRegLiveInterval(LiveInterval*);
>
>     bool SplitRegLiveIntervals(const TargetRegisterClass **);
> +
> +    bool createsNewJoin(LiveRange* LR, MachineBasicBlock* DefMBB,
> +                        MachineBasicBlock* BarrierMBB);
>   };
> } // end anonymous namespace
>
> @@ -817,6 +825,71 @@
>   return Change;
> }
>
> +bool PreAllocSplitting::createsNewJoin(LiveRange* LR,
> +                                       MachineBasicBlock* DefMBB,
> +                                       MachineBasicBlock*  
> BarrierMBB) {
> +  if (DefMBB == BarrierMBB)
> +    return false;
> +
> +  if (LR->valno->hasPHIKill)
> +    return false;
> +
> +  unsigned MBBEnd = LIs->getMBBEndIdx(BarrierMBB);
> +  if (LR->end < MBBEnd)
> +    return false;
> +
> +  MachineLoopInfo& MLI = getAnalysis();
> +  if (MLI.getLoopFor(DefMBB) != MLI.getLoopFor(BarrierMBB))
> +    return true;
> +
> +  MachineDominatorTree& MDT = getAnalysis();
> +  SmallPtrSet Visited;
> +  typedef std::pair +                    MachineBasicBlock::succ_iterator> ItPair;
> +  SmallVector Stack;
> +  Stack.push_back(std::make_pair(BarrierMBB, BarrierMBB- 
> >succ_begin()));
> +
> +  while (!Stack.empty()) {
> +    ItPair P = Stack.back();
> +    Stack.pop_back();
> +
> +    MachineBasicBlock* PredMBB = P.first;
> +    MachineBasicBlock::succ_iterator S = P.second;
> +
> +    if (S == PredMBB->succ_end())
> +      continue;
> +    else if (Visited.count(*S)) {
> +      Stack.push_back(std::make_pair(PredMBB, ++S));
> +      continue;
> +    } else
> +      Stack.push_back(std::make_pair(PredMBB, ++S));
> +
> +    MachineBasicBlock* MBB = *S;
> +    Visited.insert(MBB);
> +
> +    if (MBB == BarrierMBB)
> +      return true;
> +
> +    MachineDomTreeNode* DefMDTN = MDT.getNode(DefMBB);
> +    MachineDomTreeNode* BarrierMDTN = MDT.getNode(BarrierMBB);
> +    MachineDomTreeNode* MDTN = MDT.getNode(MBB)->getIDom();
> +    while (MDTN) {
> +      if (MDTN == DefMDTN)
> +        return true;
> +      else if (MDTN == BarrierMDTN)
> +        break;
> +      MDTN = MDTN->getIDom();
> +    }
> +
> +    MBBEnd = LIs->getMBBEndIdx(MBB);
> +    if (LR->end > MBBEnd)
> +      Stack.push_back(std::make_pair(MBB, MBB->succ_begin()));
> +  }
> +
> +  return false;
> +}
> +
> +
> bool PreAllocSplitting::runOnMachineFunction(MachineFunction &MF) {
>   CurrMF = &MF;
>   TM     = &MF.getTarget();
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From lattner at apple.com  Tue Nov  4 19:07:02 2008
From: lattner at apple.com (Tanya Lattner)
Date: Tue, 4 Nov 2008 17:07:02 -0800
Subject: [llvm-commits] Patch: improve protability of llvm-config
In-Reply-To: <490F7EF2.2020808@web.de>
References: <490F7EF2.2020808@web.de>
Message-ID: 

FYI, this patch has been reverted. It breaks the mingw build.

Please see Julien's email to llvm-commits.

-Tanya

On Nov 3, 2008, at 2:45 PM, Sascha Othman wrote:

> llvm-config uses shell scripting instead of perl functions to  
> determine
> llvm's installation directories, which is not very portable. This  
> patch
> is an attempt to fix that by using perl's Cwd functions.
> Please review twice and don't be too harsh with me since I'm not
> especially experienced at this kind of thing.
>
> Regards,
> Sascha
> --- llvm-config.in.in	2008-11-03 22:28:01.000000000 +0100
> +++ llvm-config.in.in.patched	2008-11-03 22:32:56.000000000 +0100
> @@ -18,6 +18,7 @@
> use 5.006;
> use strict;
> use warnings;
> +use Cwd;
>
> #---- begin autoconf values ----
> my $PACKAGE_NAME        = q{@PACKAGE_NAME@};
> @@ -64,21 +65,13 @@
> # Convert the current executable name into its directory (e.g. ".").
> my ($RUN_DIR) = ($0 =~ /^(.*)\/.*$/);
>
> -# Find the unix pwd program: we don't want to use the bash builtin,  
> as it does
> -# not look through symlinks etc.
> -my $PWD = `which pwd`;
> -chomp($PWD);
> -$PWD = "pwd" if (!-e $PWD);
> -
> # Turn the directory into an absolute directory on the file system,  
> also pop up
> # from "bin" into the build or prefix dir.
> -my $ABS_RUN_DIR = `cd $RUN_DIR/..; $PWD`;
> -chomp($ABS_RUN_DIR);
> +my $ABS_RUN_DIR = Cwd::realpath("$RUN_DIR/..");
>
> # Compute the absolute object directory build, e.g. "foo/llvm/Debug".
> my $ABS_OBJ_ROOT = "$LLVM_OBJ_ROOT/$LLVM_BUILDMODE";
> -$ABS_OBJ_ROOT = `cd $ABS_OBJ_ROOT; $PWD` if (-d $ABS_OBJ_ROOT);
> -chomp($ABS_OBJ_ROOT);
> +$ABS_OBJ_ROOT = Cwd::realpath($ABS_OBJ_ROOT) if (-d $ABS_OBJ_ROOT);
>
> my $INCLUDEDIR = "$ABS_RUN_DIR/include";
> my $LIBDIR     = "$ABS_RUN_DIR/lib";
> @@ -142,9 +135,9 @@
>         } elsif ($arg eq "--build-mode") {
>             $has_opt = 1; print "$LLVM_BUILDMODE\n";
>         } elsif ($arg eq "--obj-root") {
> -            $has_opt = 1; print `cd $LLVM_OBJ_ROOT/; $PWD`;
> +            $has_opt = 1; print Cwd::realpath($LLVM_OBJ_ROOT);
>         } elsif ($arg eq "--src-root") {
> -            $has_opt = 1; print `cd $LLVM_SRC_ROOT/; $PWD`;
> +            $has_opt = 1; print Cwd::realpath($LLVM_SRC_ROOT);
>         } else {
>             usage();
>         }
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

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From dpatel at apple.com  Tue Nov  4 19:37:06 2008
From: dpatel at apple.com (Devang Patel)
Date: Wed, 05 Nov 2008 01:37:06 -0000
Subject: [llvm-commits] [llvm] r58742 -
	/llvm/trunk/lib/Transforms/Utils/InlineCost.cpp
Message-ID: <200811050137.mA51b6ck001823@zion.cs.uiuc.edu>

Author: dpatel
Date: Tue Nov  4 19:37:05 2008
New Revision: 58742

URL: http://llvm.org/viewvc/llvm-project?rev=58742&view=rev
Log:
Check Attribute::NoInline.

Modified:
    llvm/trunk/lib/Transforms/Utils/InlineCost.cpp

Modified: llvm/trunk/lib/Transforms/Utils/InlineCost.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineCost.cpp?rev=58742&r1=58741&r2=58742&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Utils/InlineCost.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/InlineCost.cpp Tue Nov  4 19:37:05 2008
@@ -182,11 +182,9 @@
       // FIXME: We allow link-once linkage since in practice all versions of
       // the function have the same body (C++ ODR) - but the LLVM definition
       // of LinkOnceLinkage doesn't require this.
-      (Callee->mayBeOverridden() && !Callee->hasLinkOnceLinkage()
-       ) ||
-
+      (Callee->mayBeOverridden() && !Callee->hasLinkOnceLinkage()) ||
       // Don't inline functions marked noinline.
-      NeverInline.count(Callee))
+      Callee->hasFnAttr(Attribute::NoInline) || NeverInline.count(Callee))
     return llvm::InlineCost::getNever();
 
   // InlineCost - This value measures how good of an inline candidate this call




From dpatel at apple.com  Tue Nov  4 19:37:40 2008
From: dpatel at apple.com (Devang Patel)
Date: Wed, 05 Nov 2008 01:37:40 -0000
Subject: [llvm-commits] [llvm] r58743 -
	/llvm/trunk/lib/VMCore/Instructions.cpp
Message-ID: <200811050137.mA51bfMR001847@zion.cs.uiuc.edu>

Author: dpatel
Date: Tue Nov  4 19:37:40 2008
New Revision: 58743

URL: http://llvm.org/viewvc/llvm-project?rev=58743&view=rev
Log:
Silence unused variable warnings.

Modified:
    llvm/trunk/lib/VMCore/Instructions.cpp

Modified: llvm/trunk/lib/VMCore/Instructions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=58743&r1=58742&r2=58743&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/Instructions.cpp (original)
+++ llvm/trunk/lib/VMCore/Instructions.cpp Tue Nov  4 19:37:40 2008
@@ -2172,6 +2172,7 @@
     } else if (const VectorType *PTy = dyn_cast(SrcTy)) {
       assert(DestBits == PTy->getBitWidth() &&
                "Casting vector to integer of different width");
+      PTy = NULL;
       return BitCast;                             // Same size, no-op cast
     } else {
       assert(isa(SrcTy) &&
@@ -2195,7 +2196,8 @@
     } else if (const VectorType *PTy = dyn_cast(SrcTy)) {
       assert(DestBits == PTy->getBitWidth() &&
              "Casting vector to floating point of different width");
-        return BitCast;                             // same size, no-op cast
+      PTy = NULL;
+      return BitCast;                             // same size, no-op cast
     } else {
       assert(0 && "Casting pointer or non-first class to float");
     }




From dpatel at apple.com  Tue Nov  4 19:39:16 2008
From: dpatel at apple.com (Devang Patel)
Date: Wed, 05 Nov 2008 01:39:16 -0000
Subject: [llvm-commits] [llvm] r58744 - in /llvm/trunk:
 include/llvm/Transforms/IPO/InlinerPass.h
 lib/Transforms/IPO/InlineAlways.cpp lib/Transforms/IPO/Inliner.cpp
Message-ID: <200811050139.mA51dGAa001898@zion.cs.uiuc.edu>

Author: dpatel
Date: Tue Nov  4 19:39:16 2008
New Revision: 58744

URL: http://llvm.org/viewvc/llvm-project?rev=58744&view=rev
Log:
Do now allow InlineAlways pass to remove dead functions.

Modified:
    llvm/trunk/include/llvm/Transforms/IPO/InlinerPass.h
    llvm/trunk/lib/Transforms/IPO/InlineAlways.cpp
    llvm/trunk/lib/Transforms/IPO/Inliner.cpp

Modified: llvm/trunk/include/llvm/Transforms/IPO/InlinerPass.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/IPO/InlinerPass.h?rev=58744&r1=58743&r2=58744&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Transforms/IPO/InlinerPass.h (original)
+++ llvm/trunk/include/llvm/Transforms/IPO/InlinerPass.h Tue Nov  4 19:39:16 2008
@@ -61,6 +61,10 @@
   ///
   virtual float getInlineFudgeFactor(CallSite CS) = 0;
 
+  /// removeDeadFunctions - Remove dead functions that are not included in
+  /// DNR (Do Not Remove) list.
+  bool removeDeadFunctions(CallGraph &CG, 
+                           SmallPtrSet *DNR = NULL);
 private:
   // InlineThreshold - Cache the value here for easy access.
   unsigned InlineThreshold;

Modified: llvm/trunk/lib/Transforms/IPO/InlineAlways.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/InlineAlways.cpp?rev=58744&r1=58743&r2=58744&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/IPO/InlineAlways.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/InlineAlways.cpp Tue Nov  4 19:39:16 2008
@@ -45,6 +45,9 @@
     float getInlineFudgeFactor(CallSite CS) {
       return CA.getInlineFudgeFactor(CS);
     }
+    virtual bool doFinalization(CallGraph &CG) { 
+      return removeDeadFunctions(CG, &NeverInline); 
+    }
     virtual bool doInitialization(CallGraph &CG);
   };
 }

Modified: llvm/trunk/lib/Transforms/IPO/Inliner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/Inliner.cpp?rev=58744&r1=58743&r2=58744&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/IPO/Inliner.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/Inliner.cpp Tue Nov  4 19:39:16 2008
@@ -204,6 +204,13 @@
 // doFinalization - Remove now-dead linkonce functions at the end of
 // processing to avoid breaking the SCC traversal.
 bool Inliner::doFinalization(CallGraph &CG) {
+  return removeDeadFunctions(CG);
+}
+
+  /// removeDeadFunctions - Remove dead functions that are not included in
+  /// DNR (Do Not Remove) list.
+bool Inliner::removeDeadFunctions(CallGraph &CG, 
+                                 SmallPtrSet *DNR) {
   std::set FunctionsToRemove;
 
   // Scan for all of the functions, looking for ones that should now be removed
@@ -215,6 +222,9 @@
       // them.
       F->removeDeadConstantUsers();
 
+      if (DNR && DNR->count(F))
+        continue;
+
       if ((F->hasLinkOnceLinkage() || F->hasInternalLinkage()) &&
           F->use_empty()) {
 




From dpatel at apple.com  Tue Nov  4 19:40:30 2008
From: dpatel at apple.com (Devang Patel)
Date: Wed, 05 Nov 2008 01:40:30 -0000
Subject: [llvm-commits] [llvm] r58745 -
	/llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll
Message-ID: <200811050140.mA51eUEP001948@zion.cs.uiuc.edu>

Author: dpatel
Date: Tue Nov  4 19:40:30 2008
New Revision: 58745

URL: http://llvm.org/viewvc/llvm-project?rev=58745&view=rev
Log:
New test case.

Added:
    llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll

Added: llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll?rev=58745&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll (added)
+++ llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll Tue Nov  4 19:40:30 2008
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | opt -always-inline | llvm-dis | grep {@foo}
+; Ensure that foo is not removed by always inliner
+
+define internal i32 @foo() nounwind {
+  ret i32 0
+}




From evan.cheng at apple.com  Tue Nov  4 19:50:32 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 05 Nov 2008 01:50:32 -0000
Subject: [llvm-commits] [llvm] r58746 - in /llvm/trunk:
 include/llvm/CodeGen/MachineRelocation.h
 include/llvm/Target/TargetJITInfo.h lib/ExecutionEngine/JIT/JITEmitter.cpp
 lib/Target/X86/X86CodeEmitter.cpp lib/Target/X86/X86JITInfo.cpp
 lib/Target/X86/X86JITInfo.h
Message-ID: <200811050150.mA51oWkr002239@zion.cs.uiuc.edu>

Author: evancheng
Date: Tue Nov  4 19:50:32 2008
New Revision: 58746

URL: http://llvm.org/viewvc/llvm-project?rev=58746&view=rev
Log:
Rename isGVLazyPtr to isGVNonLazyPtr relocation. This represents Mac OS X
indirect gv reference. Please don't call it lazy.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineRelocation.h
    llvm/trunk/include/llvm/Target/TargetJITInfo.h
    llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
    llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
    llvm/trunk/lib/Target/X86/X86JITInfo.cpp
    llvm/trunk/lib/Target/X86/X86JITInfo.h

Modified: llvm/trunk/include/llvm/CodeGen/MachineRelocation.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineRelocation.h?rev=58746&r1=58745&r2=58746&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineRelocation.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineRelocation.h Tue Nov  4 19:50:32 2008
@@ -39,7 +39,7 @@
   enum AddressType {
     isResult,         // Relocation has be transformed into its result pointer.
     isGV,             // The Target.GV field is valid.
-    isGVLazyPtr,      // Relocation of a lazily resolved GV address.
+    isGVNonLazyPtr,   // Relocation of a Mac OS X NonLazy indirect reference.
     isBB,             // Relocation of BB address.
     isExtSym,         // The Target.ExtSym field is valid.
     isConstPool,      // Relocation of constant pool address.
@@ -56,7 +56,7 @@
 
   union {
     void *Result;           // If this has been resolved to a resolved pointer
-    GlobalValue *GV;        // If this is a pointer to a GV or a GV lazy ptr
+    GlobalValue *GV;        // If this is a pointer to a GV or a GV nonlazy ptr
     MachineBasicBlock *MBB; // If this is a pointer to a LLVM BB
     const char *ExtSym;     // If this is a pointer to a named symbol
     unsigned Index;         // Constant pool / jump table index
@@ -96,9 +96,9 @@
     return Result;
   }
 
-  /// MachineRelocation::getGVLazyPtr - Return a relocation entry for a
-  /// lazily resolved GlobalValue address.
-  static MachineRelocation getGVLazyPtr(intptr_t offset,
+  /// MachineRelocation::getGVNonLazyPtr - Return a relocation entry for a
+  /// Mac OS X non-lazy GlobalValue indirect reference.
+  static MachineRelocation getGVNonLazyPtr(intptr_t offset,
                                  unsigned RelocationType, 
                                  GlobalValue *GV, intptr_t cst = 0,
                                  bool NeedStub = 0,
@@ -108,7 +108,7 @@
     Result.Offset = offset;
     Result.ConstantVal = cst;
     Result.TargetReloType = RelocationType;
-    Result.AddrType = isGVLazyPtr;
+    Result.AddrType = isGVNonLazyPtr;
     Result.NeedStub = NeedStub;
     Result.GOTRelative = GOTrelative;
     Result.TargetResolve = false;
@@ -221,10 +221,10 @@
     return AddrType == isGV;
   }
 
-  /// isGlobalValueVLazyPtr - Return true if this relocation is the address
-  /// of a lazily resolved GlobalValue.
-  bool isGlobalValueLazyPtr() const {
-    return AddrType == isGVLazyPtr;
+  /// isGlobalValueNonLazyPtr - Return true if this relocation is the address
+  /// of a Mac OS X non-lazy indirect reference.
+  bool isGlobalValueNonLazyPtr() const {
+    return AddrType == isGVNonLazyPtr;
   }
 
   /// isBasicBlock - Return true if this relocation is a basic block reference.
@@ -274,7 +274,7 @@
   /// getGlobalValue - If this is a global value reference, return the
   /// referenced global.
   GlobalValue *getGlobalValue() const {
-    assert((isGlobalValue() || isGlobalValueLazyPtr()) &&
+    assert((isGlobalValue() || isGlobalValueNonLazyPtr()) &&
            "This is not a global value reference!");
     return Target.GV;
   }

Modified: llvm/trunk/include/llvm/Target/TargetJITInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetJITInfo.h?rev=58746&r1=58745&r2=58746&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetJITInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetJITInfo.h Tue Nov  4 19:50:32 2008
@@ -40,11 +40,12 @@
     ///
     virtual void replaceMachineCodeForFunction(void *Old, void *New) = 0;
 
-    /// emitGlobalValueLazyPtr - Use the specified MachineCodeEmitter object to
-    /// emit a lazy pointer which contains the address of the specified ptr.
-    virtual void *emitGlobalValueLazyPtr(const GlobalValue* GV, void *ptr,
-                                         MachineCodeEmitter &MCE) {
-      assert(0 && "This target doesn't implement emitGlobalValueLazyPtr!");
+    /// emitGlobalValueNonLazyPtr - Use the specified MachineCodeEmitter object
+    /// to emit a Mac OS X non-lazy pointer which contains the address of the
+    /// specified ptr.
+    virtual void *emitGlobalValueNonLazyPtr(const GlobalValue* GV, void *ptr,
+                                            MachineCodeEmitter &MCE) {
+      assert(0 && "This target doesn't implement emitGlobalValueNonLazyPtr!");
       return 0;
     }
 

Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp?rev=58746&r1=58745&r2=58746&view=diff

==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Tue Nov  4 19:50:32 2008
@@ -59,9 +59,9 @@
     /// corresponds to.
     std::map StubToFunctionMap;
 
-    /// GlobalToLazyPtrMap - Keep track of the lazy pointer created for a
+    /// GlobalToNonLazyPtrMap - Keep track of the lazy pointer created for a
     /// particular GlobalVariable so that we can reuse them if necessary.
-    std::map GlobalToLazyPtrMap;
+    std::map GlobalToNonLazyPtrMap;
 
   public:
     std::map& getFunctionToStubMap(const MutexGuard& locked) {
@@ -75,9 +75,9 @@
     }
 
     std::map&
-    getGlobalToLazyPtrMap(const MutexGuard& locked) {
+    getGlobalToNonLazyPtrMap(const MutexGuard& locked) {
       assert(locked.holds(TheJIT->lock));
-      return GlobalToLazyPtrMap;
+      return GlobalToNonLazyPtrMap;
     }
   };
 
@@ -120,9 +120,9 @@
     /// specified address, created lazily on demand.
     void *getExternalFunctionStub(void *FnAddr);
 
-    /// getGlobalValueLazyPtr - Return a lazy pointer containing the specified
-    /// GV address.
-    void *getGlobalValueLazyPtr(GlobalValue *V, void *GVAddress);
+    /// getGlobalValueNonLazyPtr - Return a non-lazy pointer containing the
+    /// specified GV address.
+    void *getGlobalValueNonLazyPtr(GlobalValue *V, void *GVAddress);
 
     /// AddCallbackAtLocation - If the target is capable of rewriting an
     /// instruction without the use of a stub, record the location of the use so
@@ -184,23 +184,23 @@
   return Stub;
 }
 
-/// getGlobalValueLazyPtr - Return a lazy pointer containing the specified
+/// getGlobalValueNonLazyPtr - Return a lazy pointer containing the specified
 /// GV address.
-void *JITResolver::getGlobalValueLazyPtr(GlobalValue *GV, void *GVAddress) {
+void *JITResolver::getGlobalValueNonLazyPtr(GlobalValue *GV, void *GVAddress) {
   MutexGuard locked(TheJIT->lock);
 
   // If we already have a stub for this global variable, recycle it.
-  void *&LazyPtr = state.getGlobalToLazyPtrMap(locked)[GV];
-  if (LazyPtr) return LazyPtr;
+  void *&NonLazyPtr = state.getGlobalToNonLazyPtrMap(locked)[GV];
+  if (NonLazyPtr) return NonLazyPtr;
 
   // Otherwise, codegen a new lazy pointer.
-  LazyPtr = TheJIT->getJITInfo().emitGlobalValueLazyPtr(GV, GVAddress,
-                                                    *TheJIT->getCodeEmitter());
+  NonLazyPtr = TheJIT->getJITInfo().emitGlobalValueNonLazyPtr(GV, GVAddress,
+                                                     *TheJIT->getCodeEmitter());
 
-  DOUT << "JIT: Stub emitted at [" << LazyPtr << "] for GV '"
+  DOUT << "JIT: Stub emitted at [" << NonLazyPtr << "] for GV '"
        << GV->getName() << "'\n";
 
-  return LazyPtr;
+  return NonLazyPtr;
 }
 
 /// getExternalFunctionStub - Return a stub for the function at the
@@ -570,8 +570,8 @@
 
   private:
     void *getPointerToGlobal(GlobalValue *GV, void *Reference, bool NoNeedStub);
-    void *getPointerToGVLazyPtr(GlobalValue *V, void *Reference,
-                                bool NoNeedStub);
+    void *getPointerToGVNonLazyPtr(GlobalValue *V, void *Reference,
+                                   bool NoNeedStub);
     unsigned addSizeOfGlobal(const GlobalVariable *GV, unsigned Size);
     unsigned addSizeOfGlobalsInConstantVal(const Constant *C, unsigned Size);
     unsigned addSizeOfGlobalsInInitializer(const Constant *Init, unsigned Size);
@@ -613,13 +613,13 @@
   return Resolver.getFunctionStub(F);
 }
 
-void *JITEmitter::getPointerToGVLazyPtr(GlobalValue *V, void *Reference,
+void *JITEmitter::getPointerToGVNonLazyPtr(GlobalValue *V, void *Reference,
                                         bool DoesntNeedStub) {
   // Make sure GV is emitted first.
   // FIXME: For now, if the GV is an external function we force the JIT to
-  // compile it so the lazy pointer will contain the fully resolved address.
+  // compile it so the non-lazy pointer will contain the fully resolved address.
   void *GVAddress = getPointerToGlobal(V, Reference, true);
-  return Resolver.getGlobalValueLazyPtr(V, GVAddress);
+  return Resolver.getGlobalValueNonLazyPtr(V, GVAddress);
 }
 
 static unsigned GetConstantPoolSizeInBytes(MachineConstantPool *MCP) {
@@ -887,8 +887,8 @@
           ResultPtr = getPointerToGlobal(MR.getGlobalValue(),
                                          BufferBegin+MR.getMachineCodeOffset(),
                                          MR.doesntNeedStub());
-        } else if (MR.isGlobalValueLazyPtr()) {
-          ResultPtr = getPointerToGVLazyPtr(MR.getGlobalValue(),
+        } else if (MR.isGlobalValueNonLazyPtr()) {
+          ResultPtr = getPointerToGVNonLazyPtr(MR.getGlobalValue(),
                                           BufferBegin+MR.getMachineCodeOffset(),
                                           MR.doesntNeedStub());
         } else if (MR.isBasicBlock()) {

Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=58746&r1=58745&r2=58746&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Tue Nov  4 19:50:32 2008
@@ -73,7 +73,7 @@
     void emitPCRelativeBlockAddress(MachineBasicBlock *MBB);
     void emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
                            intptr_t Disp = 0, intptr_t PCAdj = 0,
-                           bool NeedStub = false, bool IsLazy = false);
+                           bool NeedStub = false, bool IsNonLazy = false);
     void emitExternalSymbolAddress(const char *ES, unsigned Reloc);
     void emitConstPoolAddress(unsigned CPI, unsigned Reloc, intptr_t Disp = 0,
                               intptr_t PCAdj = 0);
@@ -94,7 +94,7 @@
 
     unsigned getX86RegNum(unsigned RegNo) const;
 
-    bool gvNeedsLazyPtr(const GlobalValue *GV);
+    bool gvNeedsNonLazyPtr(const GlobalValue *GV);
   };
   char Emitter::ID = 0;
 }
@@ -155,15 +155,15 @@
                                 intptr_t Disp /* = 0 */,
                                 intptr_t PCAdj /* = 0 */,
                                 bool NeedStub /* = false */,
-                                bool isLazy /* = false */) {
+                                bool isNonLazy /* = false */) {
   intptr_t RelocCST = 0;
   if (Reloc == X86::reloc_picrel_word)
     RelocCST = PICBaseOffset;
   else if (Reloc == X86::reloc_pcrel_word)
     RelocCST = PCAdj;
-  MachineRelocation MR = isLazy 
-    ? MachineRelocation::getGVLazyPtr(MCE.getCurrentPCOffset(), Reloc,
-                                      GV, RelocCST, NeedStub)
+  MachineRelocation MR = isNonLazy 
+    ? MachineRelocation::getGVNonLazyPtr(MCE.getCurrentPCOffset(), Reloc,
+                                         GV, RelocCST, NeedStub)
     : MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
                                GV, RelocCST, NeedStub);
   MCE.addRelocation(MR);
@@ -263,8 +263,8 @@
   return Value == (signed char)Value;
 }
 
-bool Emitter::gvNeedsLazyPtr(const GlobalValue *GV) {
-  // For Darwin, simulate the linktime GOT by using the same lazy-pointer
+bool Emitter::gvNeedsNonLazyPtr(const GlobalValue *GV) {
+  // For Darwin, simulate the linktime GOT by using the same non-lazy-pointer
   // mechanism as 32-bit mode.
   return (!Is64BitMode || TM.getSubtarget().isTargetDarwin()) &&
     TM.getSubtarget().GVRequiresExtraLoad(GV, TM, false);
@@ -289,9 +289,9 @@
     unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
       : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
     bool NeedStub = isa(RelocOp->getGlobal());
-    bool isLazy = gvNeedsLazyPtr(RelocOp->getGlobal());
+    bool isNonLazy = gvNeedsNonLazyPtr(RelocOp->getGlobal());
     emitGlobalAddress(RelocOp->getGlobal(), rt, RelocOp->getOffset(),
-                      PCAdj, NeedStub, isLazy);
+                      PCAdj, NeedStub, isNonLazy);
   } else if (RelocOp->isCPI()) {
     unsigned rt = Is64BitMode ? X86::reloc_pcrel_word : X86::reloc_picrel_word;
     emitConstPoolAddress(RelocOp->getIndex(), rt,
@@ -610,9 +610,9 @@
           rt = X86::reloc_absolute_dword;  // FIXME: add X86II flag?
         if (MO1.isGlobal()) {
           bool NeedStub = isa(MO1.getGlobal());
-          bool isLazy = gvNeedsLazyPtr(MO1.getGlobal());
+          bool isNonLazy = gvNeedsNonLazyPtr(MO1.getGlobal());
           emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), 0,
-                            NeedStub, isLazy);
+                            NeedStub, isNonLazy);
         } else if (MO1.isSymbol())
           emitExternalSymbolAddress(MO1.getSymbolName(), rt);
         else if (MO1.isCPI())
@@ -688,9 +688,9 @@
           rt = X86::reloc_absolute_word;  // FIXME: add X86II flag?
         if (MO1.isGlobal()) {
           bool NeedStub = isa(MO1.getGlobal());
-          bool isLazy = gvNeedsLazyPtr(MO1.getGlobal());
+          bool isNonLazy = gvNeedsNonLazyPtr(MO1.getGlobal());
           emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), 0,
-                            NeedStub, isLazy);
+                            NeedStub, isNonLazy);
         } else if (MO1.isSymbol())
           emitExternalSymbolAddress(MO1.getSymbolName(), rt);
         else if (MO1.isCPI())
@@ -726,9 +726,9 @@
           rt = X86::reloc_absolute_word;  // FIXME: add X86II flag?
         if (MO.isGlobal()) {
           bool NeedStub = isa(MO.getGlobal());
-          bool isLazy = gvNeedsLazyPtr(MO.getGlobal());
+          bool isNonLazy = gvNeedsNonLazyPtr(MO.getGlobal());
           emitGlobalAddress(MO.getGlobal(), rt, MO.getOffset(), 0,
-                            NeedStub, isLazy);
+                            NeedStub, isNonLazy);
         } else if (MO.isSymbol())
           emitExternalSymbolAddress(MO.getSymbolName(), rt);
         else if (MO.isCPI())

Modified: llvm/trunk/lib/Target/X86/X86JITInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86JITInfo.cpp?rev=58746&r1=58745&r2=58746&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86JITInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86JITInfo.cpp Tue Nov  4 19:50:32 2008
@@ -413,8 +413,8 @@
   return X86CompilationCallback;
 }
 
-void *X86JITInfo::emitGlobalValueLazyPtr(const GlobalValue* GV, void *ptr,
-                                         MachineCodeEmitter &MCE) {
+void *X86JITInfo::emitGlobalValueNonLazyPtr(const GlobalValue* GV, void *ptr,
+                                            MachineCodeEmitter &MCE) {
 #if defined (X86_64_JIT)
   MCE.startFunctionStub(GV, 8, 8);
   MCE.emitWordLE((unsigned)(intptr_t)ptr);

Modified: llvm/trunk/lib/Target/X86/X86JITInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86JITInfo.h?rev=58746&r1=58745&r2=58746&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86JITInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86JITInfo.h Tue Nov  4 19:50:32 2008
@@ -37,10 +37,11 @@
     ///
     virtual void replaceMachineCodeForFunction(void *Old, void *New);
 
-    /// emitGlobalValueLazyPtr - Use the specified MachineCodeEmitter object to
-    /// emit a lazy pointer which contains the address of the specified ptr.
-    virtual void *emitGlobalValueLazyPtr(const GlobalValue* GV, void *ptr,
-                                         MachineCodeEmitter &MCE);
+    /// emitGlobalValueNonLazyPtr - Use the specified MachineCodeEmitter object
+    /// to emit a Mac OS X non-lazy pointer which contains the address of the
+    /// specified ptr.
+    virtual void *emitGlobalValueNonLazyPtr(const GlobalValue* GV, void *ptr,
+                                            MachineCodeEmitter &MCE);
 
     /// emitFunctionStub - Use the specified MachineCodeEmitter object to emit a
     /// small native function that simply calls the function at the specified




From isanbard at gmail.com  Tue Nov  4 19:54:53 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 4 Nov 2008 17:54:53 -0800
Subject: [llvm-commits] [llvm] r58745 -
	/llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll
In-Reply-To: <200811050140.mA51eUEP001948@zion.cs.uiuc.edu>
References: <200811050140.mA51eUEP001948@zion.cs.uiuc.edu>
Message-ID: <16e5fdf90811041754jbdc6edey86ab97a2b000cea0@mail.gmail.com>

On Tue, Nov 4, 2008 at 5:40 PM, Devang Patel  wrote:
> Author: dpatel
> Date: Tue Nov  4 19:40:30 2008
> New Revision: 58745
>
> URL: http://llvm.org/viewvc/llvm-project?rev=58745&view=rev
> Log:
> New test case.
>
> Added:
>    llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll
>
> Added: llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll?rev=58745&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll (added)
> +++ llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll Tue Nov  4 19:40:30 2008
> @@ -0,0 +1,6 @@
> +; RUN: llvm-as < %s | opt -always-inline | llvm-dis | grep {@foo}
> +; Ensure that foo is not removed by always inliner
> +
Hi Devang,

Could you mark this with the PR that it fixes? :-)

Thanks!
-bw


From gohman at apple.com  Tue Nov  4 20:06:09 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 05 Nov 2008 02:06:09 -0000
Subject: [llvm-commits] [llvm] r58747 -
	/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
Message-ID: <200811050206.mA5269hL002692@zion.cs.uiuc.edu>

Author: djg
Date: Tue Nov  4 20:06:09 2008
New Revision: 58747

URL: http://llvm.org/viewvc/llvm-project?rev=58747&view=rev
Log:
Use getTargetConstant instead of getConstant for nodes that should not be visited
by isel and potentially forced into registers.

Modified:
    llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp

Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=58747&r1=58746&r2=58747&view=diff

==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Tue Nov  4 20:06:09 2008
@@ -1332,7 +1332,7 @@
       Value = Value >> 32;
     }
     if (Value <= 0x3ffff)
-      return DAG.getConstant(Value, ValueType);
+      return DAG.getTargetConstant(Value, ValueType);
   }
 
   return SDValue();
@@ -1354,7 +1354,7 @@
       Value = Value >> 32;
     }
     if (Value >= -(1 << 15) && Value <= ((1 << 15) - 1)) {
-      return DAG.getConstant(Value, ValueType);
+      return DAG.getTargetConstant(Value, ValueType);
     }
   }
 
@@ -1377,7 +1377,7 @@
       Value = Value >> 32;
     }
     if (isS10Constant(Value))
-      return DAG.getConstant(Value, ValueType);
+      return DAG.getTargetConstant(Value, ValueType);
   }
 
   return SDValue();
@@ -1397,10 +1397,10 @@
     if (ValueType == MVT::i16
         && Value <= 0xffff                 /* truncated from uint64_t */
         && ((short) Value >> 8) == ((short) Value & 0xff))
-      return DAG.getConstant(Value & 0xff, ValueType);
+      return DAG.getTargetConstant(Value & 0xff, ValueType);
     else if (ValueType == MVT::i8
              && (Value & 0xff) == Value)
-      return DAG.getConstant(Value, ValueType);
+      return DAG.getTargetConstant(Value, ValueType);
   }
 
   return SDValue();
@@ -1416,7 +1416,7 @@
     if ((ValueType == MVT::i32
           && ((unsigned) Value & 0xffff0000) == (unsigned) Value)
         || (ValueType == MVT::i64 && (Value & 0xffff0000) == Value))
-      return DAG.getConstant(Value >> 16, ValueType);
+      return DAG.getTargetConstant(Value >> 16, ValueType);
   }
 
   return SDValue();
@@ -1425,7 +1425,7 @@
 /// get_v4i32_imm - Catch-all for general 32-bit constant vectors
 SDValue SPU::get_v4i32_imm(SDNode *N, SelectionDAG &DAG) {
   if (ConstantSDNode *CN = getVecImm(N)) {
-    return DAG.getConstant((unsigned) CN->getZExtValue(), MVT::i32);
+    return DAG.getTargetConstant((unsigned) CN->getZExtValue(), MVT::i32);
   }
 
   return SDValue();
@@ -1434,7 +1434,7 @@
 /// get_v4i32_imm - Catch-all for general 64-bit constant vectors
 SDValue SPU::get_v2i64_imm(SDNode *N, SelectionDAG &DAG) {
   if (ConstantSDNode *CN = getVecImm(N)) {
-    return DAG.getConstant((unsigned) CN->getZExtValue(), MVT::i64);
+    return DAG.getTargetConstant((unsigned) CN->getZExtValue(), MVT::i64);
   }
 
   return SDValue();




From gohman at apple.com  Tue Nov  4 22:14:33 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 05 Nov 2008 04:14:33 -0000
Subject: [llvm-commits] [llvm] r58748 - in /llvm/trunk:
 include/llvm/CodeGen/DAGISelHeader.h include/llvm/CodeGen/SelectionDAG.h
 lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/Alpha/AlphaISelDAGToDAG.cpp
 lib/Target/CellSPU/SPUISelDAGToDAG.cpp lib/Target/IA64/IA64ISelDAGToDAG.cpp
 lib/Target/Mips/MipsISelDAGToDAG.cpp lib/Target/PowerPC/PPCISelDAGToDAG.cpp
 lib/Target/Sparc/SparcISelDAGToDAG.cpp lib/Target/X86/X86ISelDAGToDAG.cpp
 utils/TableGen/DAGISelEmitter.cpp
Message-ID: <200811050414.mA54EcaU006563@zion.cs.uiuc.edu>

Author: djg
Date: Tue Nov  4 22:14:16 2008
New Revision: 58748

URL: http://llvm.org/viewvc/llvm-project?rev=58748&view=rev
Log:
Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.

The impact on most targets is that AddToISelQueue calls can be simply removed.

In the x86 target, there are two additional notable changes.

The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.

Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.

Modified:
    llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h
    llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
    llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
    llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
    llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
    llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp
    llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp
    llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
    llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp
    llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
    llvm/trunk/utils/TableGen/DAGISelEmitter.cpp

Modified: llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h?rev=58748&r1=58747&r2=58748&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h (original)
+++ llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h Tue Nov  4 22:14:16 2008
@@ -21,15 +21,10 @@
 #ifndef LLVM_CODEGEN_DAGISEL_HEADER_H
 #define LLVM_CODEGEN_DAGISEL_HEADER_H
 
-/// ISelQueue - Instruction selector priority queue sorted 
-/// in the order of decreasing NodeId() values.
-std::vector ISelQueue;
-
-/// Keep track of nodes which have already been added to queue.
-unsigned char *ISelQueued;
-
-/// Keep track of nodes which have already been selected.
-unsigned char *ISelSelected;
+/// ISelPosition - Node iterator marking the current position of
+/// instruction selection as it procedes through the topologically-sorted
+/// node list.
+SelectionDAG::allnodes_iterator ISelPosition;
 
 /// IsChainCompatible - Returns true if Chain is Op or Chain does
 /// not reach Op.
@@ -46,97 +41,38 @@
   return true;
 }
 
-/// isel_sort - Sorting functions for the selection queue in the
-/// decreasing NodeId order.
-struct isel_sort : public std::binary_function {
-  bool operator()(const SDNode* left, const SDNode* right) const {
-    return left->getNodeId() < right->getNodeId();
-  }
-};
-
-/// setQueued - marks the node with a given NodeId() as element of the 
-/// instruction selection queue.
-inline void setQueued(int Id) {
-  ISelQueued[Id / 8] |= 1 << (Id % 8);
-}
-
-/// isSelected - checks if the node with a given NodeId() is
-/// in the instruction selection queue already.
-inline bool isQueued(int Id) {
-  return ISelQueued[Id / 8] & (1 << (Id % 8));
-}
-
-/// setSelected - marks the node with a given NodeId() as selected.
-inline void setSelected(int Id) {
-  ISelSelected[Id / 8] |= 1 << (Id % 8);
-}
-
-/// isSelected - checks if the node with a given NodeId() is
-/// selected already.
-inline bool isSelected(int Id) {
-  return ISelSelected[Id / 8] & (1 << (Id % 8));
-}
-
-/// AddToISelQueue - adds a node to the instruction 
-/// selection queue.
-void AddToISelQueue(SDValue N) DISABLE_INLINE {
-  int Id = N.getNode()->getNodeId();
-  if (Id != -1 && !isQueued(Id)) {
-    ISelQueue.push_back(N.getNode());
-    std::push_heap(ISelQueue.begin(), ISelQueue.end(), isel_sort());
-    setQueued(Id);
+/// ISelUpdater - helper class to handle updates of the 
+/// instruciton selection graph.
+class VISIBILITY_HIDDEN ISelUpdater : public SelectionDAG::DAGUpdateListener {
+  SelectionDAG::allnodes_iterator &ISelPosition;
+  bool HadDelete; // Indicate if any deletions were done.
+public:
+  explicit ISelUpdater(SelectionDAG::allnodes_iterator &isp)
+    : ISelPosition(isp) {}
+  
+  /// NodeDeleted - remove node from the selection queue.
+  virtual void NodeDeleted(SDNode *N, SDNode *E) {
+    if (ISelPosition == SelectionDAG::allnodes_iterator(N))
+      ++ISelPosition;
   }
-}
-
-/// ISelQueueUpdater - helper class to handle updates of the 
-/// instruciton selection queue.
-class VISIBILITY_HIDDEN ISelQueueUpdater :
-  public SelectionDAG::DAGUpdateListener {
-    std::vector &ISelQueue;
-    bool HadDelete; // Indicate if any deletions were done.
-  public:
-    explicit ISelQueueUpdater(std::vector &isq)
-      : ISelQueue(isq), HadDelete(false) {}
-    
-    bool hadDelete() const { return HadDelete; }
-
-    /// NodeDeleted - remove node from the selection queue.
-    virtual void NodeDeleted(SDNode *N, SDNode *E) {
-      ISelQueue.erase(std::remove(ISelQueue.begin(), ISelQueue.end(), N),
-                      ISelQueue.end());
-      HadDelete = true;
-    }
-
-    /// NodeUpdated - Ignore updates for now.
-    virtual void NodeUpdated(SDNode *N) {}
-  };
-
-/// UpdateQueue - update the instruction selction queue to maintain 
-/// the decreasing NodeId() ordering property.
-inline void UpdateQueue(const ISelQueueUpdater &ISQU) {
-  if (ISQU.hadDelete())
-    std::make_heap(ISelQueue.begin(), ISelQueue.end(),isel_sort());
-}
 
+  /// NodeUpdated - Ignore updates for now.
+  virtual void NodeUpdated(SDNode *N) {}
+};
 
 /// ReplaceUses - replace all uses of the old node F with the use
 /// of the new node T.
 void ReplaceUses(SDValue F, SDValue T) DISABLE_INLINE {
-  ISelQueueUpdater ISQU(ISelQueue);
-  CurDAG->ReplaceAllUsesOfValueWith(F, T, &ISQU);
-  setSelected(F.getNode()->getNodeId());
-  UpdateQueue(ISQU);
+  ISelUpdater ISU(ISelPosition);
+  CurDAG->ReplaceAllUsesOfValueWith(F, T, &ISU);
 }
 
 /// ReplaceUses - replace all uses of the old nodes F with the use
 /// of the new nodes T.
 void ReplaceUses(const SDValue *F, const SDValue *T,
                  unsigned Num) DISABLE_INLINE {
-  ISelQueueUpdater ISQU(ISelQueue);
-  CurDAG->ReplaceAllUsesOfValuesWith(F, T, Num, &ISQU);
-  for (unsigned i = 0; i != Num; ++i)
-    setSelected(F[i].getNode()->getNodeId());
-  UpdateQueue(ISQU);
+  ISelUpdater ISU(ISelPosition);
+  CurDAG->ReplaceAllUsesOfValuesWith(F, T, Num, &ISU);
 }
 
 /// ReplaceUses - replace all uses of the old node F with the use
@@ -144,42 +80,30 @@
 void ReplaceUses(SDNode *F, SDNode *T) DISABLE_INLINE {
   unsigned FNumVals = F->getNumValues();
   unsigned TNumVals = T->getNumValues();
-  ISelQueueUpdater ISQU(ISelQueue);
+  ISelUpdater ISU(ISelPosition);
   if (FNumVals != TNumVals) {
     for (unsigned i = 0, e = std::min(FNumVals, TNumVals); i < e; ++i)
-     CurDAG->ReplaceAllUsesOfValueWith(SDValue(F, i), SDValue(T, i), &ISQU);
+     CurDAG->ReplaceAllUsesOfValueWith(SDValue(F, i), SDValue(T, i), &ISU);
   } else {
-    CurDAG->ReplaceAllUsesWith(F, T, &ISQU);
+    CurDAG->ReplaceAllUsesWith(F, T, &ISU);
   }
-  setSelected(F->getNodeId());
-  UpdateQueue(ISQU);
 }
 
 /// SelectRoot - Top level entry to DAG instruction selector.
 /// Selects instructions starting at the root of the current DAG.
 void SelectRoot(SelectionDAG &DAG) {
   SelectRootInit();
-  unsigned NumBytes = (DAGSize + 7) / 8;
-  ISelQueued   = new unsigned char[NumBytes];
-  ISelSelected = new unsigned char[NumBytes];
-  memset(ISelQueued,   0, NumBytes);
-  memset(ISelSelected, 0, NumBytes);
 
   // Create a dummy node (which is not added to allnodes), that adds
   // a reference to the root node, preventing it from being deleted,
   // and tracking any changes of the root.
   HandleSDNode Dummy(CurDAG->getRoot());
-  ISelQueue.push_back(CurDAG->getRoot().getNode());
+  ISelPosition = next(SelectionDAG::allnodes_iterator(CurDAG->getRoot().getNode()));
 
   // Select pending nodes from the instruction selection queue
   // until no more nodes are left for selection.
-  while (!ISelQueue.empty()) {
-    SDNode *Node = ISelQueue.front();
-    std::pop_heap(ISelQueue.begin(), ISelQueue.end(), isel_sort());
-    ISelQueue.pop_back();
-    // Skip already selected nodes.
-    if (isSelected(Node->getNodeId()))
-      continue;
+  while (ISelPosition != CurDAG->allnodes_begin()) {
+    SDNode *Node = --ISelPosition;
 #if 0
     DAG.setSubgraphColor(Node, "red");
 #endif
@@ -199,16 +123,11 @@
     // If after the replacement this node is not used any more,
     // remove this dead node.
     if (Node->use_empty()) { // Don't delete EntryToken, etc.
-      ISelQueueUpdater ISQU(ISelQueue);
-      CurDAG->RemoveDeadNode(Node, &ISQU);
-      UpdateQueue(ISQU);
+      ISelUpdater ISU(ISelPosition);
+      CurDAG->RemoveDeadNode(Node, &ISU);
     }
   }
 
-  delete[] ISelQueued;
-  ISelQueued = NULL;
-  delete[] ISelSelected;
-  ISelSelected = NULL;
   CurDAG->setRoot(Dummy.getValue());
 }
 

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=58748&r1=58747&r2=58748&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Tue Nov  4 22:14:16 2008
@@ -693,6 +693,13 @@
   /// topological order. Returns the number of nodes.
   unsigned AssignTopologicalOrder();
 
+  /// RepositionNode - Move node N in the AllNodes list to be immediately
+  /// before the given iterator Position. This may be used to update the
+  /// topological ordering when the list of nodes is modified.
+  void RepositionNode(allnodes_iterator Position, SDNode *N) {
+    AllNodes.insert(Position, AllNodes.remove(N));
+  }
+
   /// isCommutativeBinOp - Returns true if the opcode is a commutative binary
   /// operation.
   static bool isCommutativeBinOp(unsigned Opcode) {

Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=58748&r1=58747&r2=58748&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue Nov  4 22:14:16 2008
@@ -599,8 +599,6 @@
       std::swap(LHSR, RHSR);
     }
     if (RHSR && RHSR->getReg() == ARM::SP) {
-      AddToISelQueue(N0);
-      AddToISelQueue(N1);
       return CurDAG->SelectNodeTo(N, ARM::tADDhirr, Op.getValueType(), N0, N1);
     }
     break;
@@ -613,7 +611,6 @@
       if (!RHSV) break;
       if (isPowerOf2_32(RHSV-1)) {  // 2^n+1?
         SDValue V = Op.getOperand(0);
-        AddToISelQueue(V);
         unsigned ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, Log2_32(RHSV-1));
         SDValue Ops[] = { V, V, CurDAG->getRegister(0, MVT::i32),
                             CurDAG->getTargetConstant(ShImm, MVT::i32),
@@ -623,7 +620,6 @@
       }
       if (isPowerOf2_32(RHSV+1)) {  // 2^n-1?
         SDValue V = Op.getOperand(0);
-        AddToISelQueue(V);
         unsigned ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, Log2_32(RHSV+1));
         SDValue Ops[] = { V, V, CurDAG->getRegister(0, MVT::i32),
                             CurDAG->getTargetConstant(ShImm, MVT::i32),
@@ -634,21 +630,16 @@
     }
     break;
   case ARMISD::FMRRD:
-    AddToISelQueue(Op.getOperand(0));
     return CurDAG->getTargetNode(ARM::FMRRD, MVT::i32, MVT::i32,
                                  Op.getOperand(0), getAL(CurDAG),
                                  CurDAG->getRegister(0, MVT::i32));
   case ISD::UMUL_LOHI: {
-    AddToISelQueue(Op.getOperand(0));
-    AddToISelQueue(Op.getOperand(1));
     SDValue Ops[] = { Op.getOperand(0), Op.getOperand(1),
                         getAL(CurDAG), CurDAG->getRegister(0, MVT::i32),
                         CurDAG->getRegister(0, MVT::i32) };
     return CurDAG->getTargetNode(ARM::UMULL, MVT::i32, MVT::i32, Ops, 5);
   }
   case ISD::SMUL_LOHI: {
-    AddToISelQueue(Op.getOperand(0));
-    AddToISelQueue(Op.getOperand(1));
     SDValue Ops[] = { Op.getOperand(0), Op.getOperand(1),
                         getAL(CurDAG), CurDAG->getRegister(0, MVT::i32),
                         CurDAG->getRegister(0, MVT::i32) };
@@ -690,9 +681,6 @@
       if (Match) {
         SDValue Chain = LD->getChain();
         SDValue Base = LD->getBasePtr();
-        AddToISelQueue(Chain);
-        AddToISelQueue(Base);
-        AddToISelQueue(Offset);
         SDValue Ops[]= { Base, Offset, AMOpc, getAL(CurDAG),
                            CurDAG->getRegister(0, MVT::i32), Chain };
         return CurDAG->getTargetNode(Opcode, MVT::i32, MVT::i32,
@@ -721,9 +709,6 @@
     assert(N2.getOpcode() == ISD::Constant);
     assert(N3.getOpcode() == ISD::Register);
 
-    AddToISelQueue(Chain);
-    AddToISelQueue(N1);
-    AddToISelQueue(InFlag);
     SDValue Tmp2 = CurDAG->getTargetConstant(((unsigned)
                                cast(N2)->getZExtValue()),
                                MVT::i32);
@@ -756,11 +741,6 @@
     SDValue CPTmp2;
     if (!isThumb && VT == MVT::i32 &&
         SelectShifterOperandReg(Op, N1, CPTmp0, CPTmp1, CPTmp2)) {
-      AddToISelQueue(N0);
-      AddToISelQueue(CPTmp0);
-      AddToISelQueue(CPTmp1);
-      AddToISelQueue(CPTmp2);
-      AddToISelQueue(InFlag);
       SDValue Tmp2 = CurDAG->getTargetConstant(((unsigned)
                                cast(N2)->getZExtValue()),
                                MVT::i32);
@@ -777,8 +757,6 @@
     if (VT == MVT::i32 &&
         N3.getOpcode() == ISD::Constant &&
         Predicate_so_imm(N3.getNode())) {
-      AddToISelQueue(N0);
-      AddToISelQueue(InFlag);
       SDValue Tmp1 = CurDAG->getTargetConstant(((unsigned)
                                cast(N1)->getZExtValue()),
                                MVT::i32);
@@ -799,9 +777,6 @@
     // Pattern complexity = 6  cost = 11  size = 0
     //
     // Also FCPYScc and FCPYDcc.
-    AddToISelQueue(N0);
-    AddToISelQueue(N1);
-    AddToISelQueue(InFlag);
     SDValue Tmp2 = CurDAG->getTargetConstant(((unsigned)
                                cast(N2)->getZExtValue()),
                                MVT::i32);
@@ -832,9 +807,6 @@
     assert(N2.getOpcode() == ISD::Constant);
     assert(N3.getOpcode() == ISD::Register);
 
-    AddToISelQueue(N0);
-    AddToISelQueue(N1);
-    AddToISelQueue(InFlag);
     SDValue Tmp2 = CurDAG->getTargetConstant(((unsigned)
                                cast(N2)->getZExtValue()),
                                MVT::i32);

Modified: llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp?rev=58748&r1=58747&r2=58748&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaISelDAGToDAG.cpp Tue Nov  4 22:14:16 2008
@@ -174,7 +174,6 @@
       default: return true;
       case 'm':   // memory
         Op0 = Op;
-        AddToISelQueue(Op0);
         break;
       }
       
@@ -270,9 +269,6 @@
     SDValue N0 = Op.getOperand(0);
     SDValue N1 = Op.getOperand(1);
     SDValue N2 = Op.getOperand(2);
-    AddToISelQueue(N0);
-    AddToISelQueue(N1);
-    AddToISelQueue(N2);
     Chain = CurDAG->getCopyToReg(Chain, Alpha::R24, N1, 
                                  SDValue(0,0));
     Chain = CurDAG->getCopyToReg(Chain, Alpha::R25, N2, 
@@ -289,7 +285,6 @@
 
   case ISD::READCYCLECOUNTER: {
     SDValue Chain = N->getOperand(0);
-    AddToISelQueue(Chain); //Select chain
     return CurDAG->getTargetNode(Alpha::RPCC, MVT::i64, MVT::Other,
                                  Chain);
   }
@@ -368,8 +363,6 @@
       };
       SDValue tmp1 = N->getOperand(rev?1:0);
       SDValue tmp2 = N->getOperand(rev?0:1);
-      AddToISelQueue(tmp1);
-      AddToISelQueue(tmp2);
       SDNode *cmp = CurDAG->getTargetNode(Opc, MVT::f64, tmp1, tmp2);
       if (inv) 
         cmp = CurDAG->getTargetNode(Alpha::CMPTEQ, MVT::f64, SDValue(cmp, 0), 
@@ -406,9 +399,6 @@
       SDValue cond = N->getOperand(0);
       SDValue TV = N->getOperand(1);
       SDValue FV = N->getOperand(2);
-      AddToISelQueue(cond);
-      AddToISelQueue(TV);
-      AddToISelQueue(FV);
       
       SDNode* LD = CurDAG->getTargetNode(Alpha::ITOFT, MVT::f64, cond);
       return CurDAG->getTargetNode(isDouble?Alpha::FCMOVNET:Alpha::FCMOVNES,
@@ -436,7 +426,6 @@
         mask = mask | dontcare;
       
       if (get_zapImm(mask)) {
-        AddToISelQueue(N->getOperand(0).getOperand(0));
         SDValue Z = 
           SDValue(CurDAG->getTargetNode(Alpha::ZAPNOTi, MVT::i64,
                                           N->getOperand(0).getOperand(0),
@@ -460,7 +449,6 @@
   SDValue Chain = N->getOperand(0);
   SDValue Addr = N->getOperand(1);
   SDValue InFlag(0,0);  // Null incoming flag value.
-  AddToISelQueue(Chain);
 
    std::vector CallOperands;
    std::vector TypeOperands;
@@ -468,7 +456,6 @@
    //grab the arguments
    for(int i = 2, e = N->getNumOperands(); i < e; ++i) {
      TypeOperands.push_back(N->getOperand(i).getValueType());
-     AddToISelQueue(N->getOperand(i));
      CallOperands.push_back(N->getOperand(i));
    }
    int count = N->getNumOperands() - 2;
@@ -514,7 +501,6 @@
      Chain = SDValue(CurDAG->getTargetNode(Alpha::BSR, MVT::Other, MVT::Flag, 
                                              Addr.getOperand(0), Chain, InFlag), 0);
    } else {
-     AddToISelQueue(Addr);
      Chain = CurDAG->getCopyToReg(Chain, Alpha::R27, Addr, InFlag);
      InFlag = Chain.getValue(1);
      Chain = SDValue(CurDAG->getTargetNode(Alpha::JSR, MVT::Other, MVT::Flag, 

Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp?rev=58748&r1=58747&r2=58748&view=diff

==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Tue Nov  4 22:14:16 2008
@@ -296,7 +296,6 @@
       if (!SelectDFormAddr(Op, Op, Op0, Op1)
           && !SelectAFormAddr(Op, Op, Op0, Op1)) {
         Op0 = Op;
-        AddToISelQueue(Op0);     // r+0.
         Op1 = getSmallIPtrImm(0);
       }
       break;
@@ -609,8 +608,6 @@
       Ops[0] = CurDAG->getRegister(SPU::R1, PtrVT);
       Ops[1] = CurDAG->getConstant(FI, PtrVT);
       n_ops = 2;
-
-      AddToISelQueue(Ops[1]);
     }
   } else if (Opc == ISD::ZERO_EXTEND) {
     // (zero_extend:i16 (and:i8 , ))
@@ -643,19 +640,16 @@
       abort();
     }
 
-    AddToISelQueue(Arg);
     Opc = vtm->ldresult_ins;
     if (vtm->ldresult_imm) {
       SDValue Zero = CurDAG->getTargetConstant(0, VT);
 
-      AddToISelQueue(Zero);
       Result = CurDAG->getTargetNode(Opc, VT, MVT::Other, Arg, Zero, Chain);
     } else {
       Result = CurDAG->getTargetNode(Opc, MVT::Other, Arg, Arg, Chain);
     }
 
     Chain = SDValue(Result, 1);
-    AddToISelQueue(Chain);
 
     return Result;
   } else if (Opc == SPUISD::IndirectAddr) {
@@ -676,8 +670,6 @@
         ConstantSDNode *CN = cast(Op1);
         Op1 = CurDAG->getTargetConstant(CN->getZExtValue(), VT);
         NewOpc = (isI32IntS10Immediate(CN) ? SPU::AIr32 : SPU::Ar32);
-        AddToISelQueue(Op0);
-        AddToISelQueue(Op1);
         Ops[0] = Op0;
         Ops[1] = Op1;
         n_ops = 2;

Modified: llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp?rev=58748&r1=58747&r2=58748&view=diff

==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp Tue Nov  4 22:14:16 2008
@@ -106,10 +106,6 @@
   SDValue Chain = N->getOperand(0);
   SDValue Tmp1 = N->getOperand(0);
   SDValue Tmp2 = N->getOperand(1);
-  AddToISelQueue(Chain);
-
-  AddToISelQueue(Tmp1);
-  AddToISelQueue(Tmp2);
 
   bool isFP=false;
 
@@ -312,10 +308,8 @@
     SDValue Chain = N->getOperand(0);
     SDValue InFlag;  // Null incoming flag value.
 
-    AddToISelQueue(Chain);
     if(N->getNumOperands()==3) { // we have an incoming chain, callee and flag
       InFlag = N->getOperand(2);
-      AddToISelQueue(InFlag);
     }
 
     unsigned CallOpcode;
@@ -336,7 +330,6 @@
     // load the branch target (function)'s entry point and GP,
     // branch (call) then restore the GP
     SDValue FnDescriptor = N->getOperand(1);
-    AddToISelQueue(FnDescriptor);
    
     // load the branch target's entry point [mem] and 
     // GP value [mem+8]
@@ -385,7 +378,6 @@
   
   case IA64ISD::GETFD: {
     SDValue Input = N->getOperand(0);
-    AddToISelQueue(Input);
     return CurDAG->getTargetNode(IA64::GETFD, MVT::i64, Input);
   } 
   
@@ -461,8 +453,6 @@
     LoadSDNode *LD = cast(N);
     SDValue Chain = LD->getChain();
     SDValue Address = LD->getBasePtr();
-    AddToISelQueue(Chain);
-    AddToISelQueue(Address);
 
     MVT TypeBeingLoaded = LD->getMemoryVT();
     unsigned Opc;
@@ -501,8 +491,6 @@
     StoreSDNode *ST = cast(N);
     SDValue Address = ST->getBasePtr();
     SDValue Chain = ST->getChain();
-    AddToISelQueue(Address);
-    AddToISelQueue(Chain);
    
     unsigned Opc;
     if (ISD::isNON_TRUNCStore(N)) {
@@ -515,7 +503,6 @@
         Chain = Initial.getValue(1);
         // then load 1 into the same reg iff the predicate to store is 1
         SDValue Tmp = ST->getValue();
-        AddToISelQueue(Tmp);
         Tmp =
           SDValue(CurDAG->getTargetNode(IA64::TPCADDS, MVT::i64, Initial,
                                           CurDAG->getTargetConstant(1,
@@ -538,16 +525,12 @@
     
     SDValue N1 = N->getOperand(1);
     SDValue N2 = N->getOperand(2);
-    AddToISelQueue(N1);
-    AddToISelQueue(N2);
     return CurDAG->SelectNodeTo(N, Opc, MVT::Other, N2, N1, Chain);
   }
 
   case ISD::BRCOND: {
     SDValue Chain = N->getOperand(0);
     SDValue CC = N->getOperand(1);
-    AddToISelQueue(Chain);
-    AddToISelQueue(CC);
     MachineBasicBlock *Dest =
       cast(N->getOperand(2))->getBasicBlock();
     //FIXME - we do NOT need long branches all the time
@@ -561,14 +544,12 @@
     unsigned Opc = N->getOpcode() == ISD::CALLSEQ_START ?
       IA64::ADJUSTCALLSTACKDOWN : IA64::ADJUSTCALLSTACKUP;
     SDValue N0 = N->getOperand(0);
-    AddToISelQueue(N0);
     return CurDAG->SelectNodeTo(N, Opc, MVT::Other, getI64Imm(Amt), N0);
   }
 
   case ISD::BR:
     // FIXME: we don't need long branches all the time!
     SDValue N0 = N->getOperand(0);
-    AddToISelQueue(N0);
     return CurDAG->SelectNodeTo(N, IA64::BRL_NOTCALL, MVT::Other, 
                                 N->getOperand(1), N0);
   }

Modified: llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp?rev=58748&r1=58747&r2=58748&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp Tue Nov  4 22:14:16 2008
@@ -236,8 +236,6 @@
 
       SDValue LHS = Node->getOperand(0);
       SDValue RHS = Node->getOperand(1);
-      AddToISelQueue(LHS);
-      AddToISelQueue(RHS);
 
       MVT VT = LHS.getValueType();
       SDNode *Carry = CurDAG->getTargetNode(Mips::SLTu, VT, Ops, 2);
@@ -255,8 +253,6 @@
     case ISD::UMUL_LOHI: {
       SDValue Op1 = Node->getOperand(0);
       SDValue Op2 = Node->getOperand(1);
-      AddToISelQueue(Op1);
-      AddToISelQueue(Op2);
 
       unsigned Op;
       if (Opcode == ISD::UMUL_LOHI || Opcode == ISD::SMUL_LOHI)
@@ -287,8 +283,6 @@
     case ISD::MULHU: {
       SDValue MulOp1 = Node->getOperand(0);
       SDValue MulOp2 = Node->getOperand(1);
-      AddToISelQueue(MulOp1);
-      AddToISelQueue(MulOp2);
 
       unsigned MulOp  = (Opcode == ISD::MULHU ? Mips::MULTu : Mips::MULT);
       SDNode *MulNode = CurDAG->getTargetNode(MulOp, MVT::Flag, MulOp1, MulOp2);
@@ -308,8 +302,6 @@
     case ISD::UDIV: {
       SDValue Op1 = Node->getOperand(0);
       SDValue Op2 = Node->getOperand(1);
-      AddToISelQueue(Op1);
-      AddToISelQueue(Op2);
 
       unsigned Op, MOp;
       if (Opcode == ISD::SDIV || Opcode == ISD::UDIV) {
@@ -341,7 +333,6 @@
         //bool isCodeLarge = (TM.getCodeModel() == CodeModel::Large);
         SDValue Chain  = Node->getOperand(0);
         SDValue Callee = Node->getOperand(1);
-        AddToISelQueue(Chain);
         SDValue T9Reg = CurDAG->getRegister(Mips::T9, MVT::i32);
         SDValue InFlag(0, 0);
 
@@ -356,7 +347,6 @@
           SDValue Load = SDValue(CurDAG->getTargetNode(Mips::LW, MVT::i32, 
                                      MVT::Other, Ops, 3), 0);
           Chain = Load.getValue(1);
-          AddToISelQueue(Chain);
 
           // Call target must be on T9
           Chain = CurDAG->getCopyToReg(Chain, T9Reg, Load, InFlag);
@@ -364,8 +354,6 @@
           /// Indirect call
           Chain = CurDAG->getCopyToReg(Chain, T9Reg, Callee, InFlag);
 
-        AddToISelQueue(Chain);
-
         // Emit Jump and Link Register
         SDNode *ResNode = CurDAG->getTargetNode(Mips::JALR, MVT::Other,
                                   MVT::Flag, T9Reg, Chain);

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=58748&r1=58747&r2=58748&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Tue Nov  4 22:14:16 2008
@@ -153,7 +153,6 @@
       case 'o':   // offsetable
         if (!SelectAddrImm(Op, Op, Op0, Op1)) {
           Op0 = Op;
-          AddToISelQueue(Op0);     // r+0.
           Op1 = getSmallIPtrImm(0);
         }
         break;
@@ -477,8 +476,6 @@
       }
       
       Tmp3 = (Op0Opc == ISD::AND && DisjointMask) ? Op0.getOperand(0) : Op0;
-      AddToISelQueue(Tmp3);
-      AddToISelQueue(Op1);
       SH &= 31;
       SDValue Ops[] = { Tmp3, Op1, getI32Imm(SH), getI32Imm(MB),
                           getI32Imm(ME) };
@@ -493,7 +490,6 @@
 SDValue PPCDAGToDAGISel::SelectCC(SDValue LHS, SDValue RHS,
                                     ISD::CondCode CC) {
   // Always select the LHS.
-  AddToISelQueue(LHS);
   unsigned Opc;
   
   if (LHS.getValueType() == MVT::i32) {
@@ -586,7 +582,6 @@
     assert(LHS.getValueType() == MVT::f64 && "Unknown vt!");
     Opc = PPC::FCMPUD;
   }
-  AddToISelQueue(RHS);
   return SDValue(CurDAG->getTargetNode(Opc, MVT::i32, LHS, RHS), 0);
 }
 
@@ -662,7 +657,6 @@
     // setcc op, 0
     if (Imm == 0) {
       SDValue Op = N->getOperand(0);
-      AddToISelQueue(Op);
       switch (CC) {
       default: break;
       case ISD::SETEQ: {
@@ -691,7 +685,6 @@
       }
     } else if (Imm == ~0U) {        // setcc op, -1
       SDValue Op = N->getOperand(0);
-      AddToISelQueue(Op);
       switch (CC) {
       default: break;
       case ISD::SETEQ:
@@ -872,7 +865,6 @@
 
   case PPCISD::MFCR: {
     SDValue InFlag = N->getOperand(1);
-    AddToISelQueue(InFlag);
     // Use MFOCRF if supported.
     if (PPCSubTarget.isGigaProcessor())
       return CurDAG->getTargetNode(PPC::MFOCRF, MVT::i32,
@@ -890,7 +882,6 @@
     unsigned Imm;
     if (isInt32Immediate(N->getOperand(1), Imm)) {
       SDValue N0 = N->getOperand(0);
-      AddToISelQueue(N0);
       if ((signed)Imm > 0 && isPowerOf2_32(Imm)) {
         SDNode *Op =
           CurDAG->getTargetNode(PPC::SRAWI, MVT::i32, MVT::Flag,
@@ -955,9 +946,6 @@
       
       SDValue Chain = LD->getChain();
       SDValue Base = LD->getBasePtr();
-      AddToISelQueue(Chain);
-      AddToISelQueue(Base);
-      AddToISelQueue(Offset);
       SDValue Ops[] = { Offset, Base, Chain };
       // FIXME: PPC64
       return CurDAG->getTargetNode(Opcode, LD->getValueType(0),
@@ -976,7 +964,6 @@
     if (isInt32Immediate(N->getOperand(1), Imm) &&
         isRotateAndMask(N->getOperand(0).getNode(), Imm, false, SH, MB, ME)) {
       SDValue Val = N->getOperand(0).getOperand(0);
-      AddToISelQueue(Val);
       SDValue Ops[] = { Val, getI32Imm(SH), getI32Imm(MB), getI32Imm(ME) };
       return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4);
     }
@@ -986,13 +973,11 @@
         isRunOfOnes(Imm, MB, ME) && 
         N->getOperand(0).getOpcode() != ISD::ROTL) {
       SDValue Val = N->getOperand(0);
-      AddToISelQueue(Val);
       SDValue Ops[] = { Val, getI32Imm(0), getI32Imm(MB), getI32Imm(ME) };
       return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4);
     }
     // AND X, 0 -> 0, not "rlwinm 32".
     if (isInt32Immediate(N->getOperand(1), Imm) && (Imm == 0)) {
-      AddToISelQueue(N->getOperand(1));
       ReplaceUses(SDValue(N, 0), N->getOperand(1));
       return NULL;
     }
@@ -1004,8 +989,6 @@
       unsigned MB, ME;
       Imm = ~(Imm^Imm2);
       if (isRunOfOnes(Imm, MB, ME)) {
-        AddToISelQueue(N->getOperand(0).getOperand(0));
-        AddToISelQueue(N->getOperand(0).getOperand(1));
         SDValue Ops[] = { N->getOperand(0).getOperand(0),
                             N->getOperand(0).getOperand(1),
                             getI32Imm(0), getI32Imm(MB),getI32Imm(ME) };
@@ -1027,7 +1010,6 @@
     unsigned Imm, SH, MB, ME;
     if (isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::AND, Imm) &&
         isRotateAndMask(N, Imm, true, SH, MB, ME)) {
-      AddToISelQueue(N->getOperand(0).getOperand(0));
       SDValue Ops[] = { N->getOperand(0).getOperand(0),
                           getI32Imm(SH), getI32Imm(MB), getI32Imm(ME) };
       return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4);
@@ -1040,7 +1022,6 @@
     unsigned Imm, SH, MB, ME;
     if (isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::AND, Imm) &&
         isRotateAndMask(N, Imm, true, SH, MB, ME)) { 
-      AddToISelQueue(N->getOperand(0).getOperand(0));
       SDValue Ops[] = { N->getOperand(0).getOperand(0),
                           getI32Imm(SH), getI32Imm(MB), getI32Imm(ME) };
       return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4);
@@ -1060,7 +1041,6 @@
               N2C->getZExtValue() == 1ULL && CC == ISD::SETNE &&
               // FIXME: Implement this optzn for PPC64.
               N->getValueType(0) == MVT::i32) {
-            AddToISelQueue(N->getOperand(0));
             SDNode *Tmp =
               CurDAG->getTargetNode(PPC::ADDIC, MVT::i32, MVT::Flag,
                                     N->getOperand(0), getI32Imm(~0U));
@@ -1084,18 +1064,15 @@
     else
       SelectCCOp = PPC::SELECT_CC_VRRC;
 
-    AddToISelQueue(N->getOperand(2));
-    AddToISelQueue(N->getOperand(3));
     SDValue Ops[] = { CCReg, N->getOperand(2), N->getOperand(3),
                         getI32Imm(BROpc) };
     return CurDAG->SelectNodeTo(N, SelectCCOp, N->getValueType(0), Ops, 4);
   }
   case PPCISD::COND_BRANCH: {
-    AddToISelQueue(N->getOperand(0));  // Op #0 is the Chain.
     // Op #1 is the PPC::PRED_* number.
     // Op #2 is the CR#
     // Op #3 is the Dest MBB
-    AddToISelQueue(N->getOperand(4));  // Op #4 is the Flag.
+    // Op #4 is the Flag.
     // Prevent PPC::PRED_* from being selected into LI.
     SDValue Pred =
       getI32Imm(cast(N->getOperand(1))->getZExtValue());
@@ -1104,7 +1081,6 @@
     return CurDAG->SelectNodeTo(N, PPC::BCC, MVT::Other, Ops, 5);
   }
   case ISD::BR_CC: {
-    AddToISelQueue(N->getOperand(0));
     ISD::CondCode CC = cast(N->getOperand(1))->get();
     SDValue CondCode = SelectCC(N->getOperand(2), N->getOperand(3), CC);
     SDValue Ops[] = { getI32Imm(getPredicateForSetCC(CC)), CondCode, 
@@ -1115,8 +1091,6 @@
     // FIXME: Should custom lower this.
     SDValue Chain = N->getOperand(0);
     SDValue Target = N->getOperand(1);
-    AddToISelQueue(Chain);
-    AddToISelQueue(Target);
     unsigned Opc = Target.getValueType() == MVT::i32 ? PPC::MTCTR : PPC::MTCTR8;
     Chain = SDValue(CurDAG->getTargetNode(Opc, MVT::Other, Target,
                                             Chain), 0);

Modified: llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp?rev=58748&r1=58747&r2=58748&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp Tue Nov  4 22:14:16 2008
@@ -151,8 +151,6 @@
     // FIXME: should use a custom expander to expose the SRA to the dag.
     SDValue DivLHS = N->getOperand(0);
     SDValue DivRHS = N->getOperand(1);
-    AddToISelQueue(DivLHS);
-    AddToISelQueue(DivRHS);
 
     // Set the Y register to the high-part.
     SDValue TopPart;
@@ -175,8 +173,6 @@
     // FIXME: Handle mul by immediate.
     SDValue MulLHS = N->getOperand(0);
     SDValue MulRHS = N->getOperand(1);
-    AddToISelQueue(MulLHS);
-    AddToISelQueue(MulRHS);
     unsigned Opcode = N->getOpcode() == ISD::MULHU ? SP::UMULrr : SP::SMULrr;
     SDNode *Mul = CurDAG->getTargetNode(Opcode, MVT::i32, MVT::Flag,
                                         MulLHS, MulRHS);

Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=58748&r1=58747&r2=58748&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Tue Nov  4 22:14:16 2008
@@ -777,9 +777,6 @@
     return true;
   }
 
-  int id = N.getNode()->getNodeId();
-  bool AlreadySelected = isSelected(id); // Already selected, not yet replaced.
-
   switch (N.getOpcode()) {
   default: break;
   case ISD::Constant: {
@@ -794,7 +791,6 @@
   case X86ISD::Wrapper: {
     DOUT << "Wrapper: 64bit " << is64Bit;
     DOUT << " AM "; DEBUG(AM.dump()); DOUT << "\n";
-    DOUT << "AlreadySelected " << AlreadySelected << "\n";
     // Under X86-64 non-small code model, GV (and friends) are 64-bits.
     // Also, base and index reg must be 0 in order to use rip as base.
     if (is64Bit && (TM.getCodeModel() != CodeModel::Small ||
@@ -805,7 +801,7 @@
     // If value is available in a register both base and index components have
     // been picked, we can't fit the result available in the register in the
     // addressing mode. Duplicate GlobalAddress or ConstantPool as displacement.
-    if (!AlreadySelected || (AM.Base.Reg.getNode() && AM.IndexReg.getNode())) {
+    {
       SDValue N0 = N.getOperand(0);
       if (GlobalAddressSDNode *G = dyn_cast(N0)) {
         if (!is64Bit || isInt32(AM.Disp + G->getOffset())) {
@@ -846,8 +842,7 @@
     break;
 
   case ISD::SHL:
-    if (AlreadySelected || AM.IndexReg.getNode() != 0
-        || AM.Scale != 1 || AM.isRIPRel)
+    if (AM.IndexReg.getNode() != 0 || AM.Scale != 1 || AM.isRIPRel)
       break;
       
     if (ConstantSDNode
@@ -885,8 +880,7 @@
     // FALL THROUGH
   case ISD::MUL:
     // X*[3,5,9] -> X+X*[2,4,8]
-    if (!AlreadySelected &&
-        AM.BaseType == X86ISelAddressMode::RegBase &&
+    if (AM.BaseType == X86ISelAddressMode::RegBase &&
         AM.Base.Reg.getNode() == 0 &&
         AM.IndexReg.getNode() == 0 &&
         !AM.isRIPRel) {
@@ -924,7 +918,7 @@
     break;
 
   case ISD::ADD:
-    if (!AlreadySelected) {
+    {
       X86ISelAddressMode Backup = AM;
       if (!MatchAddress(N.getNode()->getOperand(0), AM, false, Depth+1) &&
           !MatchAddress(N.getNode()->getOperand(1), AM, false, Depth+1))
@@ -939,8 +933,6 @@
 
   case ISD::OR:
     // Handle "X | C" as "X + C" iff X is known to have C bits clear.
-    if (AlreadySelected) break;
-      
     if (ConstantSDNode *CN = dyn_cast(N.getOperand(1))) {
       X86ISelAddressMode Backup = AM;
       // Start with the LHS as an addr mode.
@@ -961,10 +953,9 @@
   case ISD::AND: {
     // Handle "(x << C1) & C2" as "(X & (C2>>C1)) << C1" if safe and if this
     // allows us to fold the shift into this addressing mode.
-    if (AlreadySelected) break;
     SDValue Shift = N.getOperand(0);
     if (Shift.getOpcode() != ISD::SHL) break;
-    
+
     // Scale must not be used already.
     if (AM.IndexReg.getNode() != 0 || AM.Scale != 1) break;
 
@@ -987,14 +978,34 @@
       break;
     
     // Get the new AND mask, this folds to a constant.
+    SDValue X = Shift.getOperand(0);
     SDValue NewANDMask = CurDAG->getNode(ISD::SRL, N.getValueType(),
                                          SDValue(C2, 0), SDValue(C1, 0));
-    SDValue NewAND = CurDAG->getNode(ISD::AND, N.getValueType(),
-                                     Shift.getOperand(0), NewANDMask);
+    SDValue NewAND = CurDAG->getNode(ISD::AND, N.getValueType(), X, NewANDMask);
     SDValue NewSHIFT = CurDAG->getNode(ISD::SHL, N.getValueType(),
                                        NewAND, SDValue(C1, 0));
-    NewAND.getNode()->setNodeId(Shift.getNode()->getNodeId());
-    NewSHIFT.getNode()->setNodeId(N.getNode()->getNodeId());
+
+    // Insert the new nodes into the topological ordering.
+    if (C1->getNodeId() > X.getNode()->getNodeId()) {
+      CurDAG->RepositionNode(X.getNode(), C1);
+      C1->setNodeId(X.getNode()->getNodeId());
+    }
+    if (NewANDMask.getNode()->getNodeId() == -1 ||
+        NewANDMask.getNode()->getNodeId() > X.getNode()->getNodeId()) {
+      CurDAG->RepositionNode(X.getNode(), NewANDMask.getNode());
+      NewANDMask.getNode()->setNodeId(X.getNode()->getNodeId());
+    }
+    if (NewAND.getNode()->getNodeId() == -1 ||
+        NewAND.getNode()->getNodeId() > Shift.getNode()->getNodeId()) {
+      CurDAG->RepositionNode(Shift.getNode(), NewAND.getNode());
+      NewAND.getNode()->setNodeId(Shift.getNode()->getNodeId());
+    }
+    if (NewSHIFT.getNode()->getNodeId() == -1 ||
+        NewSHIFT.getNode()->getNodeId() > N.getNode()->getNodeId()) {
+      CurDAG->RepositionNode(N.getNode(), NewSHIFT.getNode());
+      NewSHIFT.getNode()->setNodeId(N.getNode()->getNodeId());
+    }
+
     CurDAG->ReplaceAllUsesWith(N, NewSHIFT);
     
     AM.Scale = 1 << ShiftCst;
@@ -1212,14 +1223,6 @@
   if (!SelectAddr(In1, In1, Tmp0, Tmp1, Tmp2, Tmp3))
     return NULL;
   SDValue LSI = Node->getOperand(4);    // MemOperand
-  AddToISelQueue(Tmp0);
-  AddToISelQueue(Tmp1);
-  AddToISelQueue(Tmp2);
-  AddToISelQueue(Tmp3);
-  AddToISelQueue(In2L);
-  AddToISelQueue(In2H);
-  // For now, don't select the MemOperand object, we don't know how.
-  AddToISelQueue(Chain);
   const SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, In2L, In2H, LSI, Chain };
   return CurDAG->getTargetNode(Opc, MVT::i32, MVT::i32, MVT::Other, Ops, 8);
 }
@@ -1308,16 +1311,10 @@
           std::swap(N0, N1);
       }
 
-      AddToISelQueue(N0);
       SDValue InFlag = CurDAG->getCopyToReg(CurDAG->getEntryNode(), LoReg,
                                               N0, SDValue()).getValue(1);
 
       if (foldedLoad) {
-        AddToISelQueue(N1.getOperand(0));
-        AddToISelQueue(Tmp0);
-        AddToISelQueue(Tmp1);
-        AddToISelQueue(Tmp2);
-        AddToISelQueue(Tmp3);
         SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, N1.getOperand(0), InFlag };
         SDNode *CNode =
           CurDAG->getTargetNode(MOpc, MVT::Other, MVT::Flag, Ops, 6);
@@ -1325,7 +1322,6 @@
         // Update the chain.
         ReplaceUses(N1.getValue(1), SDValue(CNode, 0));
       } else {
-        AddToISelQueue(N1);
         InFlag =
           SDValue(CurDAG->getTargetNode(Opc, MVT::Flag, N1, InFlag), 0);
       }
@@ -1436,18 +1432,12 @@
         SDValue Tmp0, Tmp1, Tmp2, Tmp3, Move, Chain;
         if (TryFoldLoad(N, N0, Tmp0, Tmp1, Tmp2, Tmp3)) {
           SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, N0.getOperand(0) };
-          AddToISelQueue(N0.getOperand(0));
-          AddToISelQueue(Tmp0);
-          AddToISelQueue(Tmp1);
-          AddToISelQueue(Tmp2);
-          AddToISelQueue(Tmp3);
           Move =
             SDValue(CurDAG->getTargetNode(X86::MOVZX16rm8, MVT::i16, MVT::Other,
                                             Ops, 5), 0);
           Chain = Move.getValue(1);
           ReplaceUses(N0.getValue(1), Chain);
         } else {
-          AddToISelQueue(N0);
           Move =
             SDValue(CurDAG->getTargetNode(X86::MOVZX16rr8, MVT::i16, N0), 0);
           Chain = CurDAG->getEntryNode();
@@ -1455,7 +1445,6 @@
         Chain  = CurDAG->getCopyToReg(Chain, X86::AX, Move, SDValue());
         InFlag = Chain.getValue(1);
       } else {
-        AddToISelQueue(N0);
         InFlag =
           CurDAG->getCopyToReg(CurDAG->getEntryNode(),
                                LoReg, N0, SDValue()).getValue(1);
@@ -1472,11 +1461,6 @@
       }
 
       if (foldedLoad) {
-        AddToISelQueue(N1.getOperand(0));
-        AddToISelQueue(Tmp0);
-        AddToISelQueue(Tmp1);
-        AddToISelQueue(Tmp2);
-        AddToISelQueue(Tmp3);
         SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, N1.getOperand(0), InFlag };
         SDNode *CNode =
           CurDAG->getTargetNode(MOpc, MVT::Other, MVT::Flag, Ops, 6);
@@ -1484,7 +1468,6 @@
         // Update the chain.
         ReplaceUses(N1.getValue(1), SDValue(CNode, 0));
       } else {
-        AddToISelQueue(N1);
         InFlag =
           SDValue(CurDAG->getTargetNode(Opc, MVT::Flag, N1, InFlag), 0);
       }
@@ -1540,7 +1523,6 @@
       MVT SVT = cast(Node->getOperand(1))->getVT();
       if (SVT == MVT::i8 && !Subtarget->is64Bit()) {
         SDValue N0 = Node->getOperand(0);
-        AddToISelQueue(N0);
       
         SDValue TruncOp = SDValue(getTruncateTo8Bit(N0), 0);
         unsigned Opc = 0;
@@ -1573,7 +1555,6 @@
     case ISD::TRUNCATE: {
       if (NVT == MVT::i8 && !Subtarget->is64Bit()) {
         SDValue Input = Node->getOperand(0);
-        AddToISelQueue(Node->getOperand(0));
         SDNode *ResNode = getTruncateTo8Bit(Input);
       
 #ifndef NDEBUG
@@ -1605,7 +1586,6 @@
           cast(N2.getOperand(0))->getGlobal();
         SDValue Tmp1 = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy());
         SDValue Tmp2 = CurDAG->getTargetGlobalAddress(GV, TLI.getPointerTy());
-        AddToISelQueue(Chain);
         SDValue Ops[] = { Tmp1, Tmp2, Chain };
         return CurDAG->getTargetNode(TargetInstrInfo::DECLARE,
                                      MVT::Other, Ops, 3);
@@ -1647,10 +1627,6 @@
   OutOps.push_back(Op1);
   OutOps.push_back(Op2);
   OutOps.push_back(Op3);
-  AddToISelQueue(Op0);
-  AddToISelQueue(Op1);
-  AddToISelQueue(Op2);
-  AddToISelQueue(Op3);
   return false;
 }
 

Modified: llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelEmitter.cpp?rev=58748&r1=58747&r2=58748&view=diff

==============================================================================
--- llvm/trunk/utils/TableGen/DAGISelEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/DAGISelEmitter.cpp Tue Nov  4 22:14:16 2008
@@ -856,14 +856,12 @@
         NodeOps.push_back(Val);
       } else if (N->isLeaf() && (CP = NodeGetComplexPattern(N, CGP))) {
         for (unsigned i = 0; i < CP->getNumOperands(); ++i) {
-          emitCode("AddToISelQueue(CPTmp" + utostr(i) + ");");
           NodeOps.push_back("CPTmp" + utostr(i));
         }
       } else {
         // This node, probably wrapped in a SDNodeXForm, behaves like a leaf
         // node even if it isn't one. Don't select it.
         if (!LikeLeaf) {
-          emitCode("AddToISelQueue(" + Val + ");");
           if (isRoot && N->isLeaf()) {
             emitCode("ReplaceUses(N, " + Val + ");");
             emitCode("return NULL;");
@@ -969,11 +967,9 @@
         for (unsigned i = 0, e = OrigChains.size(); i < e; ++i) {
           emitCode("if (" + OrigChains[i].first + ".getNode() != " +
                    OrigChains[i].second + ".getNode()) {");
-          emitCode("  AddToISelQueue(" + OrigChains[i].first + ");");
           emitCode("  InChains.push_back(" + OrigChains[i].first + ");");
           emitCode("}");
         }
-        emitCode("AddToISelQueue(" + ChainName + ");");
         emitCode("InChains.push_back(" + ChainName + ");");
         emitCode(ChainName + " = CurDAG->getNode(ISD::TokenFactor, MVT::Other, "
                  "&InChains[0], InChains.size());");
@@ -1020,8 +1016,6 @@
 
       // Emit all the chain and CopyToReg stuff.
       bool ChainEmitted = NodeHasChain;
-      if (NodeHasChain)
-        emitCode("AddToISelQueue(" + ChainName + ");");
       if (NodeHasInFlag || HasImpInputs)
         EmitInFlagSelectCode(Pattern, "N", ChainEmitted,
                              InFlagDecled, ResNodeDecled, true);
@@ -1033,7 +1027,6 @@
         if (NodeHasOptInFlag) {
           emitCode("if (HasInFlag) {");
           emitCode("  InFlag = N.getOperand(N.getNumOperands()-1);");
-          emitCode("  AddToISelQueue(InFlag);");
           emitCode("}");
         }
       }
@@ -1098,7 +1091,6 @@
         emitCode("for (unsigned i = NumInputRootOps + " + utostr(NodeHasChain) +
                  ", e = N.getNumOperands()" + EndAdjust + "; i != e; ++i) {");
 
-        emitCode("  AddToISelQueue(N.getOperand(i));");
         emitCode("  Ops" + utostr(OpsNo) + ".push_back(N.getOperand(i));");
         emitCode("}");
       }
@@ -1383,14 +1375,12 @@
                 InFlagDecled = true;
               } else
                 emitCode("InFlag = " + RootName + utostr(OpNo) + ";");
-              emitCode("AddToISelQueue(InFlag);");
             } else {
               if (!ChainEmitted) {
                 emitCode("SDValue Chain = CurDAG->getEntryNode();");
                 ChainName = "Chain";
                 ChainEmitted = true;
               }
-              emitCode("AddToISelQueue(" + RootName + utostr(OpNo) + ");");
               if (!InFlagDecled) {
                 emitCode("SDValue InFlag(0, 0);");
                 InFlagDecled = true;
@@ -1416,7 +1406,6 @@
       } else
         emitCode("InFlag = " + RootName +
                ".getOperand(" + utostr(OpNo) + ");");
-      emitCode("AddToISelQueue(InFlag);");
     }
   }
 };
@@ -1901,10 +1890,6 @@
      << "  std::vector Ops(N.getNode()->op_begin(), N.getNode()->op_end());\n"
      << "  SelectInlineAsmMemoryOperands(Ops);\n\n"
     
-     << "  // Ensure that the asm operands are themselves selected.\n"
-     << "  for (unsigned j = 0, e = Ops.size(); j != e; ++j)\n"
-     << "    AddToISelQueue(Ops[j]);\n\n"
-    
      << "  std::vector VTs;\n"
      << "  VTs.push_back(MVT::Other);\n"
      << "  VTs.push_back(MVT::Flag);\n"
@@ -1922,7 +1907,6 @@
      << "  SDValue Chain = N.getOperand(0);\n"
      << "  unsigned C = cast(N)->getLabelID();\n"
      << "  SDValue Tmp = CurDAG->getTargetConstant(C, MVT::i32);\n"
-     << "  AddToISelQueue(Chain);\n"
      << "  return CurDAG->SelectNodeTo(N.getNode(), TargetInstrInfo::DBG_LABEL,\n"
      << "                              MVT::Other, Tmp, Chain);\n"
      << "}\n\n";
@@ -1931,7 +1915,6 @@
      << "  SDValue Chain = N.getOperand(0);\n"
      << "  unsigned C = cast(N)->getLabelID();\n"
      << "  SDValue Tmp = CurDAG->getTargetConstant(C, MVT::i32);\n"
-     << "  AddToISelQueue(Chain);\n"
      << "  return CurDAG->SelectNodeTo(N.getNode(), TargetInstrInfo::EH_LABEL,\n"
      << "                              MVT::Other, Tmp, Chain);\n"
      << "}\n\n";
@@ -1949,7 +1932,6 @@
      << "CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy());\n"
      << "  SDValue Tmp2 = "
      << "CurDAG->getTargetGlobalAddress(GV, TLI.getPointerTy());\n"
-     << "  AddToISelQueue(Chain);\n"
      << "  return CurDAG->SelectNodeTo(N.getNode(), TargetInstrInfo::DECLARE,\n"
      << "                              MVT::Other, Tmp1, Tmp2, Chain);\n"
      << "}\n\n";
@@ -1959,7 +1941,6 @@
      << "  SDValue N1 = N.getOperand(1);\n"
      << "  unsigned C = cast(N1)->getZExtValue();\n"
      << "  SDValue Tmp = CurDAG->getTargetConstant(C, MVT::i32);\n"
-     << "  AddToISelQueue(N0);\n"
      << "  return CurDAG->SelectNodeTo(N.getNode(), TargetInstrInfo::EXTRACT_SUBREG,\n"
      << "                              N.getValueType(), N0, Tmp);\n"
      << "}\n\n";
@@ -1970,8 +1951,6 @@
      << "  SDValue N2 = N.getOperand(2);\n"
      << "  unsigned C = cast(N2)->getZExtValue();\n"
      << "  SDValue Tmp = CurDAG->getTargetConstant(C, MVT::i32);\n"
-     << "  AddToISelQueue(N1);\n"
-     << "  AddToISelQueue(N0);\n"
      << "  return CurDAG->SelectNodeTo(N.getNode(), TargetInstrInfo::INSERT_SUBREG,\n"
      << "                              N.getValueType(), N0, N1, Tmp);\n"
      << "}\n\n";
@@ -1985,6 +1964,7 @@
      << "  switch (N.getOpcode()) {\n"
      << "  default: break;\n"
      << "  case ISD::EntryToken:       // These leaves remain the same.\n"
+     << "  case ISD::MEMOPERAND:\n"
      << "  case ISD::BasicBlock:\n"
      << "  case ISD::Register:\n"
      << "  case ISD::HANDLENODE:\n"
@@ -1995,22 +1975,17 @@
      << "  case ISD::TargetExternalSymbol:\n"
      << "  case ISD::TargetJumpTable:\n"
      << "  case ISD::TargetGlobalTLSAddress:\n"
-     << "  case ISD::TargetGlobalAddress: {\n"
+     << "  case ISD::TargetGlobalAddress:\n"
+     << "  case ISD::TokenFactor:\n"
+     << "  case ISD::CopyFromReg:\n"
+     << "  case ISD::CopyToReg: {\n"
      << "    return NULL;\n"
      << "  }\n"
      << "  case ISD::AssertSext:\n"
      << "  case ISD::AssertZext: {\n"
-     << "    AddToISelQueue(N.getOperand(0));\n"
      << "    ReplaceUses(N, N.getOperand(0));\n"
      << "    return NULL;\n"
      << "  }\n"
-     << "  case ISD::TokenFactor:\n"
-     << "  case ISD::CopyFromReg:\n"
-     << "  case ISD::CopyToReg: {\n"
-     << "    for (unsigned i = 0, e = N.getNumOperands(); i != e; ++i)\n"
-     << "      AddToISelQueue(N.getOperand(i));\n"
-     << "    return NULL;\n"
-     << "  }\n"
      << "  case ISD::INLINEASM: return Select_INLINEASM(N);\n"
      << "  case ISD::DBG_LABEL: return Select_DBG_LABEL(N);\n"
      << "  case ISD::EH_LABEL: return Select_EH_LABEL(N);\n"




From evan.cheng at apple.com  Wed Nov  5 00:03:38 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 05 Nov 2008 06:03:38 -0000
Subject: [llvm-commits] [llvm] r58750 -
	/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Message-ID: <200811050603.mA563drD009699@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Nov  5 00:03:38 2008
New Revision: 58750

URL: http://llvm.org/viewvc/llvm-project?rev=58750&view=rev
Log:
Indentation.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=58750&r1=58749&r2=58750&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Nov  5 00:03:38 2008
@@ -7516,7 +7516,7 @@
 
 
 SDValue X86TargetLowering::PerformDAGCombine(SDNode *N,
-                                               DAGCombinerInfo &DCI) const {
+                                             DAGCombinerInfo &DCI) const {
   SelectionDAG &DAG = DCI.DAG;
   switch (N->getOpcode()) {
   default: break;




From evan.cheng at apple.com  Wed Nov  5 00:04:18 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 05 Nov 2008 06:04:18 -0000
Subject: [llvm-commits] [llvm] r58751 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Message-ID: <200811050604.mA564J0k009724@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Nov  5 00:04:18 2008
New Revision: 58751

URL: http://llvm.org/viewvc/llvm-project?rev=58751&view=rev
Log:
Type of shuffle mask has changed.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=58751&r1=58750&r2=58751&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Nov  5 00:04:18 2008
@@ -5155,6 +5155,7 @@
       // Return the new VECTOR_SHUFFLE node.
       MVT EVT = RHS.getValueType().getVectorElementType();
       MVT VT = MVT::getVectorVT(EVT, NumElts);
+      MVT MaskVT = MVT::getVectorVT(TLI.getPointerTy(), NumElts);
       std::vector Ops;
       LHS = DAG.getNode(ISD::BIT_CONVERT, VT, LHS);
       Ops.push_back(LHS);
@@ -5162,7 +5163,7 @@
       std::vector ZeroOps(NumElts, DAG.getConstant(0, EVT));
       Ops.push_back(DAG.getNode(ISD::BUILD_VECTOR, VT,
                                 &ZeroOps[0], ZeroOps.size()));
-      Ops.push_back(DAG.getNode(ISD::BUILD_VECTOR, VT,
+      Ops.push_back(DAG.getNode(ISD::BUILD_VECTOR, MaskVT,
                                 &IdxOps[0], IdxOps.size()));
       SDValue Result = DAG.getNode(ISD::VECTOR_SHUFFLE, VT,
                                      &Ops[0], Ops.size());




From evan.cheng at apple.com  Wed Nov  5 00:04:51 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 05 Nov 2008 06:04:51 -0000
Subject: [llvm-commits] [llvm] r58752 - in /llvm/trunk:
 lib/Target/X86/X86InstrMMX.td test/CodeGen/X86/mmx-vzmovl.ll
Message-ID: <200811050604.mA564puV009752@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Nov  5 00:04:51 2008
New Revision: 58752

URL: http://llvm.org/viewvc/llvm-project?rev=58752&view=rev
Log:
Add more vector move low and zero-extend patterns.

Added:
    llvm/trunk/test/CodeGen/X86/mmx-vzmovl.ll
Modified:
    llvm/trunk/lib/Target/X86/X86InstrMMX.td

Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=58752&r1=58751&r2=58752&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Wed Nov  5 00:04:51 2008
@@ -585,6 +585,15 @@
            (MMX_MOVZDI2PDIrr GR32:$src)>; 
 }
 
+let AddedComplexity = 20 in {
+  def : Pat<(v8i8 (X86vzmovl (bc_v8i8 (load_mmx addr:$src)))),
+           (MMX_MOVZDI2PDIrm addr:$src)>; 
+  def : Pat<(v4i16 (X86vzmovl (bc_v4i16 (load_mmx addr:$src)))),
+           (MMX_MOVZDI2PDIrm addr:$src)>; 
+  def : Pat<(v2i32 (X86vzmovl (bc_v2i32 (load_mmx addr:$src)))),
+           (MMX_MOVZDI2PDIrm addr:$src)>; 
+}
+
 // Scalar to v4i16 / v8i8. The source may be a GR32, but only the lower
 // 8 or 16-bits matter.
 def : Pat<(bc_v8i8  (v2i32 (scalar_to_vector GR32:$src))),

Added: llvm/trunk/test/CodeGen/X86/mmx-vzmovl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-vzmovl.ll?rev=58752&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-vzmovl.ll (added)
+++ llvm/trunk/test/CodeGen/X86/mmx-vzmovl.ll Wed Nov  5 00:04:51 2008
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep movd
+; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep movq
+
+define void @foo(<1 x i64>* %a, <1 x i64>* %b) nounwind {
+entry:
+	%0 = load <1 x i64>* %a, align 8		; <<1 x i64>> [#uses=1]
+	%1 = bitcast <1 x i64> %0 to <2 x i32>		; <<2 x i32>> [#uses=1]
+	%2 = and <2 x i32> %1, < i32 -1, i32 0 >		; <<2 x i32>> [#uses=1]
+	%3 = bitcast <2 x i32> %2 to <1 x i64>		; <<1 x i64>> [#uses=1]
+	store <1 x i64> %3, <1 x i64>* %b, align 8
+	br label %bb2
+
+bb2:		; preds = %entry
+	ret void
+}




From baldrick at free.fr  Wed Nov  5 01:17:28 2008
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 05 Nov 2008 07:17:28 -0000
Subject: [llvm-commits] [llvm] r58753 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
Message-ID: <200811050717.mA57HSVT011997@zion.cs.uiuc.edu>

Author: baldrick
Date: Wed Nov  5 01:17:27 2008
New Revision: 58753

URL: http://llvm.org/viewvc/llvm-project?rev=58753&view=rev
Log:
Fix thinko in ppcf128 expansion of truncating store.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=58753&r1=58752&r2=58753&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Wed Nov  5 01:17:27 2008
@@ -1183,7 +1183,7 @@
   SDValue Lo, Hi;
   GetExpandedOp(ST->getValue(), Lo, Hi);
 
-  return DAG.getTruncStore(Chain, Lo, Ptr,
+  return DAG.getTruncStore(Chain, Hi, Ptr,
                            ST->getSrcValue(), ST->getSrcValueOffset(),
                            ST->getMemoryVT(),
                            ST->isVolatile(), ST->getAlignment());




From isanbard at gmail.com  Wed Nov  5 01:19:23 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 05 Nov 2008 07:19:23 -0000
Subject: [llvm-commits] [test-suite] r58754 -
 /test-suite/trunk/MultiSource/Benchmarks/MiBench/automotive-susan/susan.c
Message-ID: <200811050719.mA57JN1j012059@zion.cs.uiuc.edu>

Author: void
Date: Wed Nov  5 01:19:23 2008
New Revision: 58754

URL: http://llvm.org/viewvc/llvm-project?rev=58754&view=rev
Log:
Fix test. The main function should return 0 to indicate a successful execution.

Modified:
    test-suite/trunk/MultiSource/Benchmarks/MiBench/automotive-susan/susan.c

Modified: test-suite/trunk/MultiSource/Benchmarks/MiBench/automotive-susan/susan.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/MultiSource/Benchmarks/MiBench/automotive-susan/susan.c?rev=58754&r1=58753&r2=58754&view=diff

==============================================================================
--- test-suite/trunk/MultiSource/Benchmarks/MiBench/automotive-susan/susan.c (original)
+++ test-suite/trunk/MultiSource/Benchmarks/MiBench/automotive-susan/susan.c Wed Nov  5 01:19:23 2008
@@ -2119,6 +2119,7 @@
 /* }}} */
 
   put_image(argv[2],in,x_size,y_size);
+  return 0;
 }
 
 /* }}} */




From clattner at apple.com  Wed Nov  5 02:44:11 2008
From: clattner at apple.com (Chris Lattner)
Date: Wed, 5 Nov 2008 00:44:11 -0800
Subject: [llvm-commits] [llvm] r58727 - in /llvm/trunk:
	include/llvm/Module.h lib/CodeGen/StackProtector.cpp
	lib/VMCore/Module.cpp
In-Reply-To: <200811042251.mA4MpO0E028324@zion.cs.uiuc.edu>
References: <200811042251.mA4MpO0E028324@zion.cs.uiuc.edu>
Message-ID: <30CA4196-CC39-4B54-9D37-3BBD4C5FB43F@apple.com>


On Nov 4, 2008, at 2:51 PM, Bill Wendling wrote:

> Author: void
> Date: Tue Nov  4 16:51:24 2008
> New Revision: 58727
>
> URL: http://llvm.org/viewvc/llvm-project?rev=58727&view=rev
> Log:
> - Add a "getOrInsertGlobal" method to the Module class. This acts  
> similarly to
>  "getOrInsertFunction" in that it either adds a new declaration of  
> the global
>  and returns it, or returns the current one -- optionally casting it  
> to the
>  correct type.
> - Use the new getOrInsertGlobal in the stack protector code.
> - Use "splitBasicBlock" in the stack protector code.

Awesome, thanks Bill!  One minor nit: getOrInsertFunction takes a  
function, not a pointer to the function.  Do you think it makes sense  
for getOrInsertGlobal to take the "contained" type of the global,  
instead of the pointer?

-Chris



From matthijs at stdin.nl  Wed Nov  5 02:59:30 2008
From: matthijs at stdin.nl (Matthijs Kooijman)
Date: Wed, 5 Nov 2008 09:59:30 +0100
Subject: [llvm-commits] [llvm] r58718
	-	/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
In-Reply-To: <100F42E9-C013-4078-A1A9-D9BB34A5B4AC@apple.com>
References: <200811042054.mA4Ks4Ro024583@zion.cs.uiuc.edu>
	<20081104212751.GK1010@katherina.student.utwente.nl>
	<100F42E9-C013-4078-A1A9-D9BB34A5B4AC@apple.com>
Message-ID: <20081105085930.GM1010@katherina.student.utwente.nl>

Hi Dale,

> > Hi Johannes,
Seems I misinterpreted your login name there :-)

> Right, Chris added the restriction in 55226.  Before that it worked.
Ah, that does explain why the changes I made were needed to get our compiler
on its feet again :-)

> Chris is of the opinion that the restriction ought to be there, so  
> this patch may not stay in place forever.  If you have good arguments  
> for permitting this that would be interesting.
I'm not so sure what is the right approach here, and for our compiler either
way is fine at the moment. However, I feel that removing the restriction makes
sense. I'm not so sure about how vectors work and what other restrictions SROA
imposes, but if a vector is used only in ways that don't interfere with SROA,
then it probably shouldn't have been a vector in the first place. In
particular, if it is used as a vector, and things like vector shuffles and
vector operations are used on it, I think SROA will leave it alone
automatically, right?

Gr.

Matthijs
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From isanbard at gmail.com  Wed Nov  5 04:13:00 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 5 Nov 2008 02:13:00 -0800
Subject: [llvm-commits] [llvm] r58727 - in /llvm/trunk:
	include/llvm/Module.h lib/CodeGen/StackProtector.cpp
	lib/VMCore/Module.cpp
In-Reply-To: <30CA4196-CC39-4B54-9D37-3BBD4C5FB43F@apple.com>
References: <200811042251.mA4MpO0E028324@zion.cs.uiuc.edu>
	<30CA4196-CC39-4B54-9D37-3BBD4C5FB43F@apple.com>
Message-ID: 

On Nov 5, 2008, at 12:44 AM, Chris Lattner wrote:

> On Nov 4, 2008, at 2:51 PM, Bill Wendling wrote:
>
>> Author: void
>> Date: Tue Nov  4 16:51:24 2008
>> New Revision: 58727
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=58727&view=rev
>> Log:
>> - Add a "getOrInsertGlobal" method to the Module class. This acts
>> similarly to
>> "getOrInsertFunction" in that it either adds a new declaration of
>> the global
>> and returns it, or returns the current one -- optionally casting it
>> to the
>> correct type.
>> - Use the new getOrInsertGlobal in the stack protector code.
>> - Use "splitBasicBlock" in the stack protector code.
>
> Awesome, thanks Bill!  One minor nit: getOrInsertFunction takes a
> function, not a pointer to the function.  Do you think it makes sense
> for getOrInsertGlobal to take the "contained" type of the global,
> instead of the pointer?
>
It's probably because it's late, but I'm not 100% sure what you mean.  
But consistency is a Good Thing(tm), so I would tend to agree with the  
sentiment.

I'll look at this again tomorrow. :-)

-bw



From richard at xmos.com  Wed Nov  5 03:53:59 2008
From: richard at xmos.com (Richard Osborne)
Date: Wed, 05 Nov 2008 09:53:59 -0000
Subject: [llvm-commits] [llvm] r58755 - in /llvm/trunk/lib/Target/XCore: ./
	Makefile
Message-ID: <200811050953.mA59rxJV026294@zion.cs.uiuc.edu>

Author: friedgold
Date: Wed Nov  5 03:53:58 2008
New Revision: 58755

URL: http://llvm.org/viewvc/llvm-project?rev=58755&view=rev
Log:
Test commit, add Makefile for XCore target, more to follow.

Added:
    llvm/trunk/lib/Target/XCore/
    llvm/trunk/lib/Target/XCore/Makefile

Added: llvm/trunk/lib/Target/XCore/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/Makefile?rev=58755&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/Makefile (added)
+++ llvm/trunk/lib/Target/XCore/Makefile Wed Nov  5 03:53:58 2008
@@ -0,0 +1,21 @@
+##===- lib/Target/XCore/Makefile ---------------------------*- Makefile -*-===##
+# 
+#                     The LLVM Compiler Infrastructure
+#
+# This file is distributed under the University of Illinois Open Source
+# License. See LICENSE.TXT for details.
+#
+##===----------------------------------------------------------------------===##
+LEVEL = ../../..
+LIBRARYNAME = LLVMXCore
+TARGET = XCore
+
+# Make sure that tblgen is run, first thing.
+BUILT_SOURCES = XCoreGenRegisterInfo.h.inc XCoreGenRegisterNames.inc \
+                XCoreGenRegisterInfo.inc XCoreGenInstrNames.inc \
+                XCoreGenInstrInfo.inc XCoreGenAsmWriter.inc \
+                XCoreGenDAGISel.inc XCoreGenCallingConv.inc \
+		XCoreGenSubtarget.inc
+
+include $(LEVEL)/Makefile.common
+




From richard at xmos.com  Wed Nov  5 04:48:39 2008
From: richard at xmos.com (Richard Osborne)
Date: Wed, 05 Nov 2008 10:48:39 +0000
Subject: [llvm-commits] [Patch] XCore Backend, part 1
Message-ID: <49117A07.90000@xmos.com>

What follows is the first of a series of patches to add support for the 
XCore processor from XMOS. I've split the changes into multiple patches 
on Chris' advice so each part may be reviewed before being commited.

This patch contains the target description files. The instruction 
formats are incomplete (all instructions are encoded as 0) and not all 
instructions in the instruction set are targeted (the comments in 
XCoreInstrInfo.td indicate those which are missing).

OK to commit?

Richard Osborne | XMOS
http://www.xmos.com

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From richard at xmos.com  Wed Nov  5 09:49:55 2008
From: richard at xmos.com (Richard Osborne)
Date: Wed, 05 Nov 2008 15:49:55 +0000
Subject: [llvm-commits] [Patch] XCore Backend, part 2
Message-ID: <4911C0A3.6020200@xmos.com>

This patch adds the RegisterInfo / InstructionInfo classes for the XCore 
Backend.

Richard Osborne | XMOS
http://www.xmos.com
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From richard at xmos.com  Wed Nov  5 10:01:27 2008
From: richard at xmos.com (Richard Osborne)
Date: Wed, 05 Nov 2008 16:01:27 +0000
Subject: [llvm-commits] [Patch] XCore Backend, part 3
Message-ID: <4911C357.8070707@xmos.com>

This patch adds the SelectionDAGISel, TargetLowering, TargetFrameInfo 
and MachineFunctionInfo classes for the XCore Backend.

Richard Osborne | XMOS
http://www.xmos.com
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From richard at xmos.com  Wed Nov  5 10:05:35 2008
From: richard at xmos.com (Richard Osborne)
Date: Wed, 05 Nov 2008 16:05:35 +0000
Subject: [llvm-commits] [Patch] XCoreBackend, part 4
Message-ID: <4911C44F.3090707@xmos.com>

This patch adds the TargetAsmInfo and AsmPrinter classes for the XCore 
backend.

Richard Osborne | XMOS
http://www.xmos.com
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From richard at xmos.com  Wed Nov  5 10:14:03 2008
From: richard at xmos.com (Richard Osborne)
Date: Wed, 05 Nov 2008 16:14:03 +0000
Subject: [llvm-commits] XCore Backend, part 5
Message-ID: <4911C64B.4010708@xmos.com>

This final patch adds the remaining parts of the XCore backend - The 
TargetSubtarget class, the TargetMachine class and a build list for CMake.

Richard Osborne | XMOS
http://www.xmos.com
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From anton at korobeynikov.info  Wed Nov  5 10:19:46 2008
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Wed, 5 Nov 2008 19:19:46 +0300
Subject: [llvm-commits] [Patch] XCoreBackend, part 4
In-Reply-To: <4911C44F.3090707@xmos.com>
References: <4911C44F.3090707@xmos.com>
Message-ID: 

Hi, Richard

> This patch adds the TargetAsmInfo and AsmPrinter classes for the XCore
> backend.
These look ok for me, except that you don't need to use None in stuff
like "SectionFlags::None | SectionFlags::Small", however it can be
considered better for readability.

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University


From gohman at apple.com  Wed Nov  5 11:13:57 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 05 Nov 2008 17:13:57 -0000
Subject: [llvm-commits] [llvm] r58759 -
	/llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h
Message-ID: <200811051713.mA5HDvDM007958@zion.cs.uiuc.edu>

Author: djg
Date: Wed Nov  5 11:13:57 2008
New Revision: 58759

URL: http://llvm.org/viewvc/llvm-project?rev=58759&view=rev
Log:
Update some comments to reflect the new code.

Modified:
    llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h

Modified: llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h?rev=58759&r1=58758&r2=58759&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h (original)
+++ llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h Wed Nov  5 11:13:57 2008
@@ -50,7 +50,10 @@
   explicit ISelUpdater(SelectionDAG::allnodes_iterator &isp)
     : ISelPosition(isp) {}
   
-  /// NodeDeleted - remove node from the selection queue.
+  /// NodeDeleted - Handle nodes deleted from the graph. If the
+  /// node being deleted is the current ISelPosition node, update
+  /// ISelPosition.
+  ///
   virtual void NodeDeleted(SDNode *N, SDNode *E) {
     if (ISelPosition == SelectionDAG::allnodes_iterator(N))
       ++ISelPosition;
@@ -100,8 +103,10 @@
   HandleSDNode Dummy(CurDAG->getRoot());
   ISelPosition = next(SelectionDAG::allnodes_iterator(CurDAG->getRoot().getNode()));
 
-  // Select pending nodes from the instruction selection queue
-  // until no more nodes are left for selection.
+  // The AllNodes list is now topological-sorted. Visit the
+  // nodes by starting at the end of the list (the root of the
+  // graph) and preceding back toward the beginning (the entry
+  // node).
   while (ISelPosition != CurDAG->allnodes_begin()) {
     SDNode *Node = --ISelPosition;
 #if 0




From gohman at apple.com  Wed Nov  5 11:16:24 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 05 Nov 2008 17:16:24 -0000
Subject: [llvm-commits] [llvm] r58760 -
	/llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
Message-ID: <200811051716.mA5HGO50008041@zion.cs.uiuc.edu>

Author: djg
Date: Wed Nov  5 11:16:24 2008
New Revision: 58760

URL: http://llvm.org/viewvc/llvm-project?rev=58760&view=rev
Log:
Reintroduce a comment that was removed with the AddToISelQueue
changes.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=58760&r1=58759&r2=58760&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Wed Nov  5 11:16:24 2008
@@ -1069,6 +1069,7 @@
     return CurDAG->SelectNodeTo(N, SelectCCOp, N->getValueType(0), Ops, 4);
   }
   case PPCISD::COND_BRANCH: {
+    // Op #0 is the Chain.
     // Op #1 is the PPC::PRED_* number.
     // Op #2 is the CR#
     // Op #3 is the Dest MBB




From duncan.sands at math.u-psud.fr  Wed Nov  5 11:25:20 2008
From: duncan.sands at math.u-psud.fr (Duncan Sands)
Date: Wed, 5 Nov 2008 18:25:20 +0100
Subject: [llvm-commits] Patch: generalize vector shuffle
In-Reply-To: <8C28F2F1-32AE-42CC-8CD2-3B13FC6F6F9F@apple.com>
References: <7C812DE7-E002-4767-A0AE-192738C25237@apple.com>
	
	<8C28F2F1-32AE-42CC-8CD2-3B13FC6F6F9F@apple.com>
Message-ID: <200811051825.21127.duncan.sands@math.u-psud.fr>

Hi Mon Ping,

general comment: there is trailing whitespace on many lines.

> @@ -1324,8 +1326,7 @@
>    const VectorType *MaskTy = dyn_cast(Mask->getType());
>    if (!isa(Mask) || MaskTy == 0 ||
>        MaskTy->getElementType() != Type::Int32Ty ||
> -      MaskTy->getNumElements() !=
> -      cast(V1->getType())->getNumElements())
> +      MaskTy->getNumElements() <= 1)

Why not allow a mask of length 1?  The DAG combiner or SelectionDAG
can simplify this of course, but I don't see why it should be illegal.

> Assert1(MV->getNumOperands() > 1,
> +            "Shufflevector mask can not have one element!", &SV);

Likewise.

> -  unsigned NumElts = cast(V1->getType())->getNumElements();
> +
> +  unsigned NumElts = cast(Mask->getType())->getNumElements();
> +  unsigned V1NumElts = cast(V1->getType())->getNumElements();
>    const Type *EltTy = cast(V1->getType())->getElementType();

How about SrcNumElts instead of V1NumElts, and MaskNumElts instead of NumElts?
Likewise in the rest of the patch: the names given to the number of elements
are not always self-explanatory.

> +//===---- LegalizeTypesUtils.cpp - Utilities for Legalization of types

Why not only do it in LegalizeTypes?

Also, I think SplitVecRes_VECTOR_SHUFFLE needs some changes, but I didn't
spot any.

> +void DAGLegalizeTypeUtils::DetermineVectorShuffleUse(SelectionDAG& CurDAG,
> +                               SDValue Mask, unsigned Start, unsigned End,
> +                               unsigned NumElements, unsigned Half,
> +                               MVT NewEltVT, SmallVector& NewMask,
> +                               VecUse& LhsUse, VecUse& RhsUse) {

How about a comment describing this function.  I found the names LhsUse and
RhsUse not very self-explanatory.

> +  if (LLhsUse != VecUseBoth && LRhsUse != VecUseBoth) {

I have the impression that you could reduce the amount of duplicated
code by swapping Lo and Hi parts depending on what is used.  By the way,
I thought a bit about how to do this splitting, and I think what you are
doing is pretty optimal.  However I wasn't brave enough to check that you
are actually doing what I think you are doing :)  I will check the algorithm
when you have a final version.

> +    Ops.clear();

Not sure why you have Ops.clear() at the end of each branch, rather
than once after the end of the "if"...

> +    Ops.clear();
> +  }
> +}

It's also rather pointless at the end of the function!

> +void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
> +                                                     SDValue &Hi) {
> +  // We only support constant index.
> +  MVT LoVT, HiVT;
> +  GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
> +  unsigned LoNumElts = LoVT.getVectorNumElements();
> +  unsigned HiNumElts = HiVT.getVectorNumElements();
> +
> +  SDValue Vec = N->getOperand(0);
> +  SDValue Idx = N->getOperand(1);
> +
> +  if (TLI.isTypeLegal(Vec.getValueType())) {

Why not just always do this?  It should work fine even if Vec is illegal.

> +    // If the incoming vector type is legal, just extract the correct subpart.
> +    ConstantSDNode *CIdx = cast(Idx);

You don't have to assume that Idx is constant here, you just have to do an
ADD below.

> +    Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, LoVT, Vec, Idx);
> +    Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, HiVT, Vec,
> +                     DAG.getConstant(CIdx->getZExtValue() + LoNumElts,
> +                                     Idx.getValueType()));

If LoVT != HiVT then there is no reason to think that these new
indices are a multiple of the lengths LoVT/HiVT, i.e. you may be
producing illegal subvectors here.  I think you should add an
assertion that LoVT == HiVT until the vector widening stuff is
complete (and splitting is no longer done for non-power-of-two
vectors).

> +  } else {

Aren't you just repeating here the work done by
SplitVecOp_EXTRACT_SUBVECTOR?

> -  case ISD::VECTOR_SHUFFLE:
> +  case ISD::VECTOR_SHUFFLE: {
> +    assert(Node->getOperand(0).getValueType().getVectorNumElements() ==
> +           Op.getValueType().getVectorNumElements() &&
> +           "Vector shuffle must be normalized");

Why must it be normalized, and who takes care of this?  Likewise below.

> -  case ISD::FCOS: {
> +  case ISD::FCOS:
> +  case ISD::CTPOP:
> +  case ISD::CTTZ:
> +  case ISD::CTLZ: {

What's this about?

> +    // Check if we need to normalize the vector shuffle

I'm not sure this belongs in LegalizeTypes.  It seems to
me that this is to do with legalizing the operation, because
it is unsupported by targets, not legalizing the types.  As
such it belongs in LegalizeDAG.  In any case, you don't
actually do anything here!

> +  // Normalize the shuffle vector since mask and vector length don't match.
> +  assert(NumElems != 1 && "Vector shuffle can not result in 1 element");

Why not allow this (and immediately simplify to something else)?

If this only produces normalized vectors, why are changes needed elsewhere
(eg: LegalizeTypes)?  At this point I am quite confused!

>    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
> -            CCAssignToReg<[XMM0,XMM1]>>,
> +            CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,

What's this about?

Ciao,

Duncan.


From gohman at apple.com  Wed Nov  5 11:35:14 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 05 Nov 2008 17:35:14 -0000
Subject: [llvm-commits] [llvm] r58761 -
	/llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h
Message-ID: <200811051735.mA5HZEp8008701@zion.cs.uiuc.edu>

Author: djg
Date: Wed Nov  5 11:35:14 2008
New Revision: 58761

URL: http://llvm.org/viewvc/llvm-project?rev=58761&view=rev
Log:
The HadDelete field is no longer used.

Modified:
    llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h

Modified: llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h?rev=58761&r1=58760&r2=58761&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h (original)
+++ llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h Wed Nov  5 11:35:14 2008
@@ -45,7 +45,6 @@
 /// instruciton selection graph.
 class VISIBILITY_HIDDEN ISelUpdater : public SelectionDAG::DAGUpdateListener {
   SelectionDAG::allnodes_iterator &ISelPosition;
-  bool HadDelete; // Indicate if any deletions were done.
 public:
   explicit ISelUpdater(SelectionDAG::allnodes_iterator &isp)
     : ISelPosition(isp) {}




From s.othman at web.de  Wed Nov  5 12:02:38 2008
From: s.othman at web.de (Sascha Othman)
Date: Wed, 05 Nov 2008 19:02:38 +0100
Subject: [llvm-commits] Patch: improve protability of llvm-config
In-Reply-To: 
References: <490F7EF2.2020808@web.de>
	
Message-ID: <4911DFBE.9080007@web.de>

May I then suggest the following changes in response to Julien's message
at
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20081103/069380.html
?
His proposed patch works as far as I can tell (thanks, Julien), but it
has the sideeffect of not resolving to absolute paths and thus making
llvm-config produce output like /usr/local/bin/../bin
The submitted solution here was tested on linux, MSYS/MinGW and Windows.
It would really be nice if we could use something else than shell
scripting, for portability reasons.

Regards,
Sascha
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From gohman at apple.com  Wed Nov  5 12:30:53 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 05 Nov 2008 18:30:53 -0000
Subject: [llvm-commits] [llvm] r58763 -
	/llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
Message-ID: <200811051830.mA5IUrGZ010494@zion.cs.uiuc.edu>

Author: djg
Date: Wed Nov  5 12:30:52 2008
New Revision: 58763

URL: http://llvm.org/viewvc/llvm-project?rev=58763&view=rev
Log:
Use an assert to check that SelectCode isn't called on
nodes that are already selected.

Modified:
    llvm/trunk/utils/TableGen/DAGISelEmitter.cpp

Modified: llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelEmitter.cpp?rev=58763&r1=58762&r2=58763&view=diff

==============================================================================
--- llvm/trunk/utils/TableGen/DAGISelEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/DAGISelEmitter.cpp Wed Nov  5 12:30:52 2008
@@ -1957,13 +1957,12 @@
 
   OS << "// The main instruction selector code.\n"
      << "SDNode *SelectCode(SDValue N) {\n"
-     << "  if (N.isMachineOpcode()) {\n"
-     << "    return NULL;   // Already selected.\n"
-     << "  }\n\n"
      << "  MVT::SimpleValueType NVT = N.getNode()->getValueType(0).getSimpleVT();\n"
      << "  switch (N.getOpcode()) {\n"
-     << "  default: break;\n"
-     << "  case ISD::EntryToken:       // These leaves remain the same.\n"
+     << "  default:\n"
+     << "    assert(!N.isMachineOpcode() && \"Node already selected!\");\n"
+     << "    break;\n"
+     << "  case ISD::EntryToken:       // These nodes remain the same.\n"
      << "  case ISD::MEMOPERAND:\n"
      << "  case ISD::BasicBlock:\n"
      << "  case ISD::Register:\n"




From jlerouge at apple.com  Wed Nov  5 12:33:32 2008
From: jlerouge at apple.com (Julien Lerouge)
Date: Wed, 5 Nov 2008 10:33:32 -0800
Subject: [llvm-commits] Patch: improve protability of llvm-config
In-Reply-To: <4911DFBE.9080007@web.de>
References: <490F7EF2.2020808@web.de>
	
	<4911DFBE.9080007@web.de>
Message-ID: <20081105183332.GA70642@pom.apple.com>

Hello Sacha,

Sorry, it still doesn't work for me, I still have the same errors in
readdir/opendir. 

What version of MSYS are you testing on ? And what version of perl are
you using (the one that comes with msys or ActiveState) ?

I am using MSYS 1.0.10 with the msys perl (5.6.1). I will try MSYS
1.0.11.

Thanks,
Julien

On Wed, Nov 05, 2008 at 07:02:38PM +0100, Sascha Othman wrote:
> May I then suggest the following changes in response to Julien's message
> at
> http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20081103/069380.html
> ?
> His proposed patch works as far as I can tell (thanks, Julien), but it
> has the sideeffect of not resolving to absolute paths and thus making
> llvm-config produce output like /usr/local/bin/../bin
> The submitted solution here was tested on linux, MSYS/MinGW and Windows.
> It would really be nice if we could use something else than shell
> scripting, for portability reasons.
> 
> Regards,
> Sascha

-- 
Julien Lerouge
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From evan.cheng at apple.com  Wed Nov  5 12:35:53 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 05 Nov 2008 18:35:53 -0000
Subject: [llvm-commits] [llvm] r58764 - in /llvm/trunk/lib/Target/ARM:
 ARM.td ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.h ARMInstrInfo.td
Message-ID: <200811051835.mA5IZrVp010673@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Nov  5 12:35:52 2008
New Revision: 58764

URL: http://llvm.org/viewvc/llvm-project?rev=58764&view=rev
Log:
Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions.

Modified:
    llvm/trunk/lib/Target/ARM/ARM.td
    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARM.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=58764&r1=58763&r2=58764&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARM.td (original)
+++ llvm/trunk/lib/Target/ARM/ARM.td Wed Nov  5 12:35:52 2008
@@ -102,12 +102,14 @@
                        "SizeFlag",
                        "IndexModeBits",
                        "Opcode",
+                       "isUnaryDataProc",
                        "Form"];
   let TSFlagsShifts = [0,
                        4,
                        7,
                        9,
-                       13];
+                       13,
+                       14];
 }
 
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58764&r1=58763&r2=58764&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Wed Nov  5 12:35:52 2008
@@ -69,10 +69,6 @@
 
     void emitPseudoInstruction(const MachineInstr &MI);
 
-    unsigned getAddrModeNoneInstrBinary(const MachineInstr &MI,
-                                        const TargetInstrDesc &TID,
-                                        unsigned Binary);
-
     unsigned getMachineSoRegOpValue(const MachineInstr &MI,
                                     const TargetInstrDesc &TID,
                                     const MachineOperand &MO,
@@ -85,25 +81,19 @@
     unsigned getAddrModeSBit(const MachineInstr &MI,
                              const TargetInstrDesc &TID) const;
 
-    unsigned getAddrMode1InstrBinary(const MachineInstr &MI,
-                                     const TargetInstrDesc &TID,
-                                     unsigned Binary);
-    unsigned getAddrMode2InstrBinary(const MachineInstr &MI,
-                                     const TargetInstrDesc &TID,
-                                     unsigned Binary);
-    unsigned getAddrMode3InstrBinary(const MachineInstr &MI,
-                                     const TargetInstrDesc &TID,
-                                     unsigned Binary);
-    unsigned getAddrMode4InstrBinary(const MachineInstr &MI,
-                                     const TargetInstrDesc &TID,
-                                     unsigned Binary);
-    unsigned getAddrMode6InstrBinary(const MachineInstr &MI,
-                                     const TargetInstrDesc &TID,
-                                     unsigned Binary);
-
-    /// getInstrBinary - Return binary encoding for the specified
-    /// machine instruction.
-    unsigned getInstrBinary(const MachineInstr &MI);
+    void emitDataProcessingInstruction(const MachineInstr &MI);
+
+    void emitLoadStoreInstruction(const MachineInstr &MI);
+
+    void emitMiscLoadStoreInstruction(const MachineInstr &MI);
+
+    void emitLoadStoreMultipleInstruction(const MachineInstr &MI);
+
+    void emitMulFrm1Instruction(const MachineInstr &MI);
+
+    void emitBranchInstruction(const MachineInstr &MI);
+
+    void emitMiscBranchInstruction(const MachineInstr &MI);
 
     /// getBinaryCodeForInstr - This function, generated by the
     /// CodeEmitterGenerator using TableGen, produces the binary encoding for
@@ -260,10 +250,39 @@
   DOUT << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << MI;
 
   NumEmitted++;  // Keep track of the # of mi's emitted
-  if ((MI.getDesc().TSFlags & ARMII::FormMask) == ARMII::Pseudo)
+  switch (MI.getDesc().TSFlags & ARMII::FormMask) {
+  default:
+    assert(0 && "Unhandled instruction encoding format!");
+    break;
+  case ARMII::Pseudo:
     emitPseudoInstruction(MI);
-  else
-    MCE.emitWordLE(getInstrBinary(MI));
+    break;
+  case ARMII::DPFrm:
+  case ARMII::DPSoRegFrm:
+    emitDataProcessingInstruction(MI);
+    break;
+  case ARMII::LdFrm:
+  case ARMII::StFrm:
+    emitLoadStoreInstruction(MI);
+    break;
+  case ARMII::LdMiscFrm:
+  case ARMII::StMiscFrm:
+    emitMiscLoadStoreInstruction(MI);
+    break;
+  case ARMII::LdMulFrm:
+  case ARMII::StMulFrm:
+    emitLoadStoreMultipleInstruction(MI);
+    break;
+  case ARMII::MulFrm1:
+    emitMulFrm1Instruction(MI);
+    break;
+  case ARMII::Branch:
+    emitBranchInstruction(MI);
+    break;
+  case ARMII::BranchMisc:
+    emitMiscBranchInstruction(MI);
+    break;
+  }
 }
 
 void ARMCodeEmitter::emitConstPoolInstruction(const MachineInstr &MI) {
@@ -329,51 +348,13 @@
     JTI->addPCLabelAddr(MO2.getImm(), MCE.getCurrentPCValue());
 
     // PICADD is just an add instruction that implicitly read pc.
-    unsigned Binary = getBinaryCodeForInstr(MI);
-    const TargetInstrDesc &TID = MI.getDesc();
-    MCE.emitWordLE(getAddrMode1InstrBinary(MI, TID, Binary));
+    emitDataProcessingInstruction(MI);
     break;
   }
   }
 }
 
 
-unsigned ARMCodeEmitter::getAddrModeNoneInstrBinary(const MachineInstr &MI,
-                                                    const TargetInstrDesc &TID,
-                                                    unsigned Binary) {
-  // Set the conditional execution predicate
-  Binary |= II->getPredicate(&MI) << 28;
-
-  switch (TID.TSFlags & ARMII::FormMask) {
-  default:
-    assert(0 && "Unknown instruction subtype!");
-    break;
-  case ARMII::Branch: {
-    // Set signed_immed_24 field
-    Binary |= getMachineOpValue(MI, 0);
-
-    // if it is a conditional branch, set cond field
-    if (TID.Opcode == ARM::Bcc) {
-      Binary &= 0x0FFFFFFF;                      // clear conditional field
-      Binary |= getMachineOpValue(MI, 1) << 28;  // set conditional field
-    }
-    break;
-  }
-  case ARMII::BranchMisc: {
-    if (TID.Opcode == ARM::BX)
-      abort(); // FIXME
-    if (TID.Opcode == ARM::BX_RET)
-      Binary |= 0xe; // the return register is LR
-    else 
-      // otherwise, set the return register
-      Binary |= getMachineOpValue(MI, 0);
-    break;
-  }
-  }
-
-  return Binary;
-}
-
 unsigned ARMCodeEmitter::getMachineSoRegOpValue(const MachineInstr &MI,
                                                 const TargetInstrDesc &TID,
                                                 const MachineOperand &MO,
@@ -453,9 +434,14 @@
   return 0;
 }
 
-unsigned ARMCodeEmitter::getAddrMode1InstrBinary(const MachineInstr &MI,
-                                                 const TargetInstrDesc &TID,
-                                                 unsigned Binary) {
+void ARMCodeEmitter::emitDataProcessingInstruction(const MachineInstr &MI) {
+  const TargetInstrDesc &TID = MI.getDesc();
+  if (TID.getOpcode() == ARM::MOVi2pieces)
+    abort(); // FIXME
+
+  // Part of binary is determined by TableGn.
+  unsigned Binary = getBinaryCodeForInstr(MI);
+
   // Set the conditional execution predicate
   Binary |= II->getPredicate(&MI) << 28;
 
@@ -471,16 +457,12 @@
   }
 
   // Encode first non-shifter register operand if there is one.
-  unsigned Format = TID.TSFlags & ARMII::FormMask;
-  bool HasRnReg = !(Format == ARMII::DPRdMisc  ||
-                    Format == ARMII::DPRdIm    ||
-                    Format == ARMII::DPRdReg   ||
-                    Format == ARMII::DPRdSoReg);
-  if (HasRnReg) {
+  bool isUnary = TID.TSFlags & ARMII::UnaryDP;
+  if (!isUnary) {
     if (TID.getOpcode() == ARM::PICADD)
-      // Special handling for PICADD. It implicitly use add.
-      Binary |=
-        ARMRegisterInfo::getRegisterNumbering(ARM::PC) << ARMII::RegRnShift;
+      // Special handling for PICADD. It implicitly uses PC register.
+      Binary |= (ARMRegisterInfo::getRegisterNumbering(ARM::PC)
+                 << ARMII::RegRnShift);
     else {
       Binary |= getMachineOpValue(MI, OpIdx) << ARMII::RegRnShift;
       ++OpIdx;
@@ -488,30 +470,33 @@
   }
 
   // Encode shifter operand.
-  bool HasSoReg = (Format == ARMII::DPRdSoReg ||
-                   Format == ARMII::DPRnSoReg ||
-                   Format == ARMII::DPRSoReg  ||
-                   Format == ARMII::DPRSoRegS);
-
   const MachineOperand &MO = MI.getOperand(OpIdx);
-  if (HasSoReg)
+  if ((TID.TSFlags & ARMII::FormMask) == ARMII::DPSoRegFrm) {
     // Encode SoReg.
-    return Binary | getMachineSoRegOpValue(MI, TID, MO, OpIdx);
+    MCE.emitWordLE(Binary | getMachineSoRegOpValue(MI, TID, MO, OpIdx));
+    return;
+  }
 
-  if (MO.isReg())
+  if (MO.isReg()) {
     // Encode register Rm.
-    return Binary | ARMRegisterInfo::getRegisterNumbering(MO.getReg());
+    MCE.emitWordLE(Binary | ARMRegisterInfo::getRegisterNumbering(MO.getReg()));
+    return;
+  }
 
   // Encode so_imm.
   // Set bit I(25) to identify this is the immediate form of 
   Binary |= 1 << ARMII::I_BitShift;
   Binary |= getMachineSoImmOpValue(MI, TID, MO);
-  return Binary;
+
+  MCE.emitWordLE(Binary);
 }
 
-unsigned ARMCodeEmitter::getAddrMode2InstrBinary(const MachineInstr &MI,
-                                                 const TargetInstrDesc &TID,
-                                                 unsigned Binary) {
+void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI) {
+  const TargetInstrDesc &TID = MI.getDesc();
+
+  // Part of binary is determined by TableGn.
+  unsigned Binary = getBinaryCodeForInstr(MI);
+
   // Set the conditional execution predicate
   Binary |= II->getPredicate(&MI) << 28;
 
@@ -531,7 +516,8 @@
     if (ARM_AM::getAM2Offset(MO3.getImm()))
       // Set the value of offset_12 field
       Binary |= ARM_AM::getAM2Offset(MO3.getImm());
-    return Binary;
+    MCE.emitWordLE(Binary);
+    return;
   }
 
   // Set bit I(25), because this is not in immediate enconding.
@@ -547,12 +533,15 @@
     Binary |= ShImm           << 7;  // shift_immed
   }
 
-  return Binary;
+  MCE.emitWordLE(Binary);
 }
 
-unsigned ARMCodeEmitter::getAddrMode3InstrBinary(const MachineInstr &MI,
-                                                 const TargetInstrDesc &TID,
-                                                 unsigned Binary) {
+void ARMCodeEmitter::emitMiscLoadStoreInstruction(const MachineInstr &MI) {
+  const TargetInstrDesc &TID = MI.getDesc();
+
+  // Part of binary is determined by TableGn.
+  unsigned Binary = getBinaryCodeForInstr(MI);
+
   // Set the conditional execution predicate
   Binary |= II->getPredicate(&MI) << 28;
 
@@ -573,7 +562,8 @@
   // to the corresponding Rm register.
   if (MO2.getReg()) {
     Binary |= ARMRegisterInfo::getRegisterNumbering(MO2.getReg());
-    return Binary;
+    MCE.emitWordLE(Binary);
+    return;
   }
 
   // if this instr is in immediate offset/index encoding, set bit 22 to 1
@@ -584,12 +574,15 @@
     Binary |= (ImmOffs & ~0xF);     // immedL
   }
 
-  return Binary;
+  MCE.emitWordLE(Binary);
 }
 
-unsigned ARMCodeEmitter::getAddrMode4InstrBinary(const MachineInstr &MI,
-                                                 const TargetInstrDesc &TID,
-                                                 unsigned Binary) {
+void ARMCodeEmitter::emitLoadStoreMultipleInstruction(const MachineInstr &MI) {
+  const TargetInstrDesc &TID = MI.getDesc();
+
+  // Part of binary is determined by TableGn.
+  unsigned Binary = getBinaryCodeForInstr(MI);
+
   // Set the conditional execution predicate
   Binary |= II->getPredicate(&MI) << 28;
 
@@ -626,12 +619,15 @@
     Binary |= 0x1 << RegNum;
   }
 
-  return Binary;
+  MCE.emitWordLE(Binary);
 }
 
-unsigned ARMCodeEmitter::getAddrMode6InstrBinary(const MachineInstr &MI,
-                                                 const TargetInstrDesc &TID,
-                                                 unsigned Binary) {
+void ARMCodeEmitter::emitMulFrm1Instruction(const MachineInstr &MI) {
+  const TargetInstrDesc &TID = MI.getDesc();
+
+  // Part of binary is determined by TableGn.
+  unsigned Binary = getBinaryCodeForInstr(MI);
+
   // Set the conditional execution predicate
   Binary |= II->getPredicate(&MI) << 28;
 
@@ -653,33 +649,49 @@
   // Encode Rs
   Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRsShift;
 
-  return Binary;
+  MCE.emitWordLE(Binary);
 }
 
-/// getInstrBinary - Return binary encoding for the specified
-/// machine instruction.
-unsigned ARMCodeEmitter::getInstrBinary(const MachineInstr &MI) {
+void ARMCodeEmitter::emitBranchInstruction(const MachineInstr &MI) {
+  const TargetInstrDesc &TID = MI.getDesc();
+
   // Part of binary is determined by TableGn.
   unsigned Binary = getBinaryCodeForInstr(MI);
 
-  const TargetInstrDesc &TID = MI.getDesc();
-  switch (TID.TSFlags & ARMII::AddrModeMask) {
-  case ARMII::AddrModeNone:
-    return getAddrModeNoneInstrBinary(MI, TID, Binary);
-  case ARMII::AddrMode1:
-    return getAddrMode1InstrBinary(MI, TID, Binary);
-  case ARMII::AddrMode2:
-    return getAddrMode2InstrBinary(MI, TID, Binary);
-  case ARMII::AddrMode3:
-    return getAddrMode3InstrBinary(MI, TID, Binary);
-  case ARMII::AddrMode4:
-    return getAddrMode4InstrBinary(MI, TID, Binary);
-  case ARMII::AddrMode6:
-    return getAddrMode6InstrBinary(MI, TID, Binary);
+  // Set the conditional execution predicate
+  Binary |= II->getPredicate(&MI) << 28;
+
+  // Set signed_immed_24 field
+  Binary |= getMachineOpValue(MI, 0);
+
+  // if it is a conditional branch, set cond field
+  if (TID.Opcode == ARM::Bcc) {
+    Binary &= 0x0FFFFFFF;                      // clear conditional field
+    Binary |= getMachineOpValue(MI, 1) << 28;  // set conditional field
   }
 
-  abort();
-  return 0;
+  MCE.emitWordLE(Binary);
+}
+
+void ARMCodeEmitter::emitMiscBranchInstruction(const MachineInstr &MI) {
+  const TargetInstrDesc &TID = MI.getDesc();
+  if (TID.Opcode == ARM::BX)
+    abort(); // FIXME
+
+  // Part of binary is determined by TableGn.
+  unsigned Binary = getBinaryCodeForInstr(MI);
+
+  // Set the conditional execution predicate
+  Binary |= II->getPredicate(&MI) << 28;
+
+  if (TID.Opcode == ARM::BX_RET)
+    // The return register is LR.
+    Binary |= ARMRegisterInfo::getRegisterNumbering(ARM::LR);
+  else 
+    // otherwise, set the return register
+    Binary |= getMachineOpValue(MI, 0);
+
+  MCE.emitWordLE(Binary);
 }
 
 #include "ARMGenCodeEmitter.inc"

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58764&r1=58763&r2=58764&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Wed Nov  5 12:35:52 2008
@@ -20,35 +20,32 @@
 }
 
 def Pseudo      : Format<1>;
-def MulFrm      : Format<2>;
-def MulSMLAW    : Format<3>;
-def MulSMULW    : Format<4>;
-def MulSMLA     : Format<5>;
-def MulSMUL     : Format<6>;
-def Branch      : Format<7>;
-def BranchMisc  : Format<8>;
-
-def DPRdIm      : Format<9>;
-def DPRdReg     : Format<10>;
-def DPRdSoReg   : Format<11>;
-def DPRdMisc    : Format<12>;
-def DPRnIm      : Format<13>;
-def DPRnReg     : Format<14>;
-def DPRnSoReg   : Format<15>;
-def DPRIm       : Format<16>;
-def DPRReg      : Format<17>;
-def DPRSoReg    : Format<18>;
-def DPRImS      : Format<19>;
-def DPRRegS     : Format<20>;
-def DPRSoRegS   : Format<21>;
-
-def LdFrm       : Format<22>;
-def StFrm       : Format<23>;
-
-def ArithMisc   : Format<24>;
-def ThumbFrm    : Format<25>;
-def VFPFrm      : Format<26>;
-
+def MulFrm1     : Format<2>;
+def MulFrm2     : Format<3>;
+def MulSMLAW    : Format<4>;
+def MulSMULW    : Format<5>;
+def MulSMLA     : Format<6>;
+def MulSMUL     : Format<7>;
+def Branch      : Format<8>;
+def BranchMisc  : Format<9>;
+
+def DPFrm       : Format<10>;
+def DPSoRegFrm  : Format<11>;
+
+def LdFrm       : Format<12>;
+def StFrm       : Format<13>;
+def LdMiscFrm   : Format<14>;
+def StMiscFrm   : Format<15>;
+def LdMulFrm    : Format<16>;
+def StMulFrm    : Format<17>;
+
+def ArithMisc   : Format<18>;
+def ThumbFrm    : Format<19>;
+def VFPFrm      : Format<20>;
+
+// Misc flag for data processing instructions that indicates whether
+// the instruction has a Rn register operand.
+class UnaryDP  { bit isUnaryDataProc = 1; }
 
 //===----------------------------------------------------------------------===//
 
@@ -63,6 +60,8 @@
   let Namespace = "ARM";
 
   bits<4> Opcode = opcod;
+
+  // TSFlagsFields
   AddrMode AM = am;
   bits<4> AddrModeBits = AM.Value;
   
@@ -74,6 +73,11 @@
   
   Format F = f;
   bits<5> Form = F.Value;
+
+  //
+  // Attributes specific to ARM instructions...
+  //
+  bit isUnaryDataProc = 0;
   
   let Constraints = cstr;
 }
@@ -658,23 +662,20 @@
   let Inst{27-25} = 0b100;
 }
 
-// addrmode6
 // Unsigned multiply, multiply-accumulate instructions.
-class AI6 opcod, dag oops, dag iops, Format f, string opc,
+class AMul1I opcod, dag oops, dag iops, string opc,
          string asm, list pattern>
-  : I
-{
+  : I {
   // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, SMLAWy, ...)
   let Inst{7-4}   = 0b1001;
   let Inst{27-24} = 0b0000;
   let Inst{23-20} = opcod;
 }
-class AsI6 opcod, dag oops, dag iops, Format f, string opc,
+class AsMul1I opcod, dag oops, dag iops, string opc,
           string asm, list pattern>
-  : sI
-{
+  : sI {
   // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, SMLAWy, ...)
   let Inst{7-4}   = 0b1001;
   let Inst{27-24} = 0b0000;

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=58764&r1=58763&r2=58764&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Wed Nov  5 12:35:52 2008
@@ -39,11 +39,10 @@
     AddrMode3     = 3,
     AddrMode4     = 4,
     AddrMode5     = 5,
-    AddrMode6     = 6,
-    AddrModeT1    = 7,
-    AddrModeT2    = 8,
-    AddrModeT4    = 9,
-    AddrModeTs    = 10,  // i8 * 4 for pc and sp relative data
+    AddrModeT1    = 6,
+    AddrModeT2    = 7,
+    AddrModeT4    = 8,
+    AddrModeTs    = 9,  // i8 * 4 for pc and sp relative data
 
     // Size* - Flags to keep track of the size of an instruction.
     SizeShift     = 4,
@@ -63,56 +62,57 @@
     // Opcode
     OpcodeShift   = 9,
     OpcodeMask    = 0xf << OpcodeShift,
-    
-    // Format
-    FormShift   = 13,
-    FormMask    = 31 << FormShift,
+
+    //===------------------------------------------------------------------===//
+    // Misc flags.
+
+    // UnaryDP - Indicates this is a unary data processing instruction, i.e.
+    // it doesn't have a Rn operand.
+    UnaryDP       = 1 << 13,
+
+    //===------------------------------------------------------------------===//
+    // Instruction encoding formats.
+    //
+    FormShift   = 14,
+    FormMask    = 0x1f << FormShift,
 
     // Pseudo instructions
     Pseudo      = 1 << FormShift,
 
     // Multiply instructions
-    MulFrm      = 2 << FormShift,
-    MulSMLAW    = 3 << FormShift,
-    MulSMULW    = 4 << FormShift,
-    MulSMLA     = 5 << FormShift,
-    MulSMUL     = 6 << FormShift,
+    MulFrm1     = 2 << FormShift,
+    MulFrm2     = 3 << FormShift,
+    MulSMLAW    = 4 << FormShift,
+    MulSMULW    = 5 << FormShift,
+    MulSMLA     = 6 << FormShift,
+    MulSMUL     = 7 << FormShift,
 
     // Branch instructions
-    Branch      = 7 << FormShift,
-    BranchMisc  = 8 << FormShift,
+    Branch      = 8 << FormShift,
+    BranchMisc  = 9 << FormShift,
 
     // Data Processing instructions
-    DPRdIm      = 9 << FormShift,
-    DPRdReg     = 10 << FormShift,
-    DPRdSoReg   = 11 << FormShift,
-    DPRdMisc    = 12 << FormShift,
-
-    DPRnIm      = 13 << FormShift,
-    DPRnReg     = 14 << FormShift,
-    DPRnSoReg   = 15 << FormShift,
-
-    DPRIm       = 16 << FormShift,
-    DPRReg      = 17 << FormShift,
-    DPRSoReg    = 18 << FormShift,
-
-    DPRImS      = 19 << FormShift,
-    DPRRegS     = 20 << FormShift,
-    DPRSoRegS   = 21 << FormShift,
+    DPFrm       = 10 << FormShift,
+    DPSoRegFrm  = 11 << FormShift,
 
     // Load and Store
-    LdFrm       = 22 << FormShift,
-    StFrm       = 23 << FormShift,
+    LdFrm       = 12 << FormShift,
+    StFrm       = 13 << FormShift,
+    LdMiscFrm   = 14 << FormShift,
+    StMiscFrm   = 15 << FormShift,
+    LdMulFrm    = 16 << FormShift,
+    StMulFrm    = 17 << FormShift,
 
     // Miscellaneous arithmetic instructions
-    ArithMisc   = 24 << FormShift,
+    ArithMisc   = 18 << FormShift,
 
     // Thumb format
-    ThumbFrm    = 25 << FormShift,
+    ThumbFrm    = 19 << FormShift,
 
     // VFP format
-    VPFFrm      = 26 << FormShift,
+    VPFFrm      = 20 << FormShift,
 
+    //===------------------------------------------------------------------===//
     // Field shifts - such shifts are used to set field while generating
     // machine instructions.
     RotImmShift  = 8,

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58764&r1=58763&r2=58764&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Nov  5 12:35:52 2008
@@ -310,11 +310,10 @@
 def AddrMode3    : AddrMode<3>;
 def AddrMode4    : AddrMode<4>;
 def AddrMode5    : AddrMode<5>;
-def AddrMode6    : AddrMode<6>;
-def AddrModeT1   : AddrMode<7>;
-def AddrModeT2   : AddrMode<8>;
-def AddrModeT4   : AddrMode<9>;
-def AddrModeTs   : AddrMode<10>;
+def AddrModeT1   : AddrMode<6>;
+def AddrModeT2   : AddrMode<7>;
+def AddrModeT4   : AddrMode<8>;
+def AddrModeTs   : AddrMode<9>;
 
 // Instruction size.
 class SizeFlagVal val> {
@@ -345,13 +344,13 @@
 /// AsI1_bin_irs - Defines a set of (op r, {so_imm|r|so_reg}) patterns for a
 /// binop that produces a value.
 multiclass AsI1_bin_irs opcod, string opc, PatFrag opnode> {
-  def ri : AsI1;
-  def rr : AsI1;
-  def rs : AsI1;
 }
@@ -360,13 +359,13 @@
 /// instruction modifies the CSPR register.
 let Defs = [CPSR] in {
 multiclass ASI1_bin_s_irs opcod, string opc, PatFrag opnode> {
-  def ri : AI1;
-  def rr : AI1;
-  def rs : AI1;
 }
@@ -377,13 +376,13 @@
 /// a explicit result, only implicitly set CPSR.
 let Defs = [CPSR] in {
 multiclass AI1_cmp_irs opcod, string opc, PatFrag opnode> {
-  def ri : AI1;
-  def rr : AI1;
-  def rs : AI1;
 }
@@ -420,13 +419,13 @@
 let Uses = [CPSR] in {
 multiclass AsXI1_bin_c_irs opcod, string opc, PatFrag opnode> {
   def ri : AXI1;
   def rr : AXI1;
   def rs : AXI1;
 }
 }
@@ -533,7 +532,7 @@
 let isReturn = 1, isTerminator = 1 in
   def LDM_RET : AXI4ldpc<0x0, (outs),
                     (ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops),
-                    LdFrm, "ldm${p}${addr:submode} $addr, $dst1",
+                    LdMulFrm, "ldm${p}${addr:submode} $addr, $dst1",
                     []>;
 
 let isCall = 1,
@@ -610,7 +609,7 @@
                  "ldr", " $dst, $addr", []>;
 
 // Loads with zero extension
-def LDRH  : AI3ldh<0xB, (outs GPR:$dst), (ins addrmode3:$addr), LdFrm,
+def LDRH  : AI3ldh<0xB, (outs GPR:$dst), (ins addrmode3:$addr), LdMiscFrm,
                  "ldr", "h $dst, $addr",
                 [(set GPR:$dst, (zextloadi16 addrmode3:$addr))]>;
 
@@ -619,17 +618,17 @@
                 [(set GPR:$dst, (zextloadi8 addrmode2:$addr))]>;
 
 // Loads with sign extension
-def LDRSH : AI3ldsh<0xE, (outs GPR:$dst), (ins addrmode3:$addr), LdFrm,
+def LDRSH : AI3ldsh<0xE, (outs GPR:$dst), (ins addrmode3:$addr), LdMiscFrm,
                  "ldr", "sh $dst, $addr",
                 [(set GPR:$dst, (sextloadi16 addrmode3:$addr))]>;
 
-def LDRSB : AI3ldsb<0xD, (outs GPR:$dst), (ins addrmode3:$addr), LdFrm,
+def LDRSB : AI3ldsb<0xD, (outs GPR:$dst), (ins addrmode3:$addr), LdMiscFrm,
                  "ldr", "sb $dst, $addr",
                 [(set GPR:$dst, (sextloadi8 addrmode3:$addr))]>;
 
 let mayLoad = 1 in {
 // Load doubleword
-def LDRD  : AI3ldd<0xD, (outs GPR:$dst), (ins addrmode3:$addr), LdFrm,
+def LDRD  : AI3ldd<0xD, (outs GPR:$dst), (ins addrmode3:$addr), LdMiscFrm,
                  "ldr", "d $dst, $addr",
                 []>, Requires<[IsARM, HasV5T]>;
 
@@ -643,11 +642,11 @@
                      "ldr", " $dst, [$base], $offset", "$base = $base_wb", []>;
 
 def LDRH_PRE  : AI3ldhpr<0xB, (outs GPR:$dst, GPR:$base_wb),
-                     (ins addrmode3:$addr), LdFrm,
+                     (ins addrmode3:$addr), LdMiscFrm,
                      "ldr", "h $dst, $addr!", "$addr.base = $base_wb", []>;
 
 def LDRH_POST : AI3ldhpo<0xB, (outs GPR:$dst, GPR:$base_wb),
-                     (ins GPR:$base,am3offset:$offset), LdFrm,
+                     (ins GPR:$base,am3offset:$offset), LdMiscFrm,
                      "ldr", "h $dst, [$base], $offset", "$base = $base_wb", []>;
 
 def LDRB_PRE  : AI2ldbpr<0x1, (outs GPR:$dst, GPR:$base_wb),
@@ -659,19 +658,19 @@
                      "ldr", "b $dst, [$base], $offset", "$base = $base_wb", []>;
 
 def LDRSH_PRE : AI3ldshpr<0xE, (outs GPR:$dst, GPR:$base_wb),
-                      (ins addrmode3:$addr), LdFrm,
+                      (ins addrmode3:$addr), LdMiscFrm,
                       "ldr", "sh $dst, $addr!", "$addr.base = $base_wb", []>;
 
 def LDRSH_POST: AI3ldshpo<0xE, (outs GPR:$dst, GPR:$base_wb),
-                      (ins GPR:$base,am3offset:$offset), LdFrm,
+                      (ins GPR:$base,am3offset:$offset), LdMiscFrm,
                       "ldr", "sh $dst, [$base], $offset", "$base = $base_wb", []>;
 
 def LDRSB_PRE : AI3ldsbpr<0xD, (outs GPR:$dst, GPR:$base_wb),
-                      (ins addrmode3:$addr), LdFrm,
+                      (ins addrmode3:$addr), LdMiscFrm,
                       "ldr", "sb $dst, $addr!", "$addr.base = $base_wb", []>;
 
 def LDRSB_POST: AI3ldsbpo<0xD, (outs GPR:$dst, GPR:$base_wb),
-                      (ins GPR:$base,am3offset:$offset), LdFrm,
+                      (ins GPR:$base,am3offset:$offset), LdMiscFrm,
                       "ldr", "sb $dst, [$base], $offset", "$base = $base_wb", []>;
 }
 
@@ -681,7 +680,7 @@
                [(store GPR:$src, addrmode2:$addr)]>;
 
 // Stores with truncate
-def STRH : AI3sth<0xB, (outs), (ins GPR:$src, addrmode3:$addr), StFrm,
+def STRH : AI3sth<0xB, (outs), (ins GPR:$src, addrmode3:$addr), StMiscFrm,
                "str", "h $src, $addr",
                [(truncstorei16 GPR:$src, addrmode3:$addr)]>;
 
@@ -691,7 +690,7 @@
 
 // Store doubleword
 let mayStore = 1 in
-def STRD : AI3std<0xF, (outs), (ins GPR:$src, addrmode3:$addr), StFrm,
+def STRD : AI3std<0xF, (outs), (ins GPR:$src, addrmode3:$addr), StMiscFrm,
                "str", "d $src, $addr",
                []>, Requires<[IsARM, HasV5T]>;
 
@@ -709,13 +708,13 @@
                       (post_store GPR:$src, GPR:$base, am2offset:$offset))]>;
 
 def STRH_PRE : AI3sthpr<0xB, (outs GPR:$base_wb),
-                     (ins GPR:$src, GPR:$base,am3offset:$offset), StFrm,
+                     (ins GPR:$src, GPR:$base,am3offset:$offset), StMiscFrm,
                      "str", "h $src, [$base, $offset]!", "$base = $base_wb",
                     [(set GPR:$base_wb,
                       (pre_truncsti16 GPR:$src, GPR:$base,am3offset:$offset))]>;
 
 def STRH_POST: AI3sthpo<0xB, (outs GPR:$base_wb),
-                     (ins GPR:$src, GPR:$base,am3offset:$offset), StFrm,
+                     (ins GPR:$src, GPR:$base,am3offset:$offset), StMiscFrm,
                      "str", "h $src, [$base], $offset", "$base = $base_wb",
                     [(set GPR:$base_wb, (post_truncsti16 GPR:$src,
                                          GPR:$base, am3offset:$offset))]>;
@@ -740,42 +739,42 @@
 let mayLoad = 1 in
 def LDM : AXI4ld<0x0, (outs),
                (ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops),
-               LdFrm, "ldm${p}${addr:submode} $addr, $dst1",
+               LdMulFrm, "ldm${p}${addr:submode} $addr, $dst1",
                []>;
 
 let mayStore = 1 in
 def STM : AXI4st<0x0, (outs),
                (ins addrmode4:$addr, pred:$p, reglist:$src1, variable_ops),
-               StFrm, "stm${p}${addr:submode} $addr, $src1",
+               StMulFrm, "stm${p}${addr:submode} $addr, $src1",
                []>;
 
 //===----------------------------------------------------------------------===//
 //  Move Instructions.
 //
 
-def MOVr : AsI1<0b1101, (outs GPR:$dst), (ins GPR:$src), DPRdReg,
-                 "mov", " $dst, $src", []>;
-def MOVs : AsI1<0b1101, (outs GPR:$dst), (ins so_reg:$src), DPRdSoReg,
-                 "mov", " $dst, $src", [(set GPR:$dst, so_reg:$src)]>;
+def MOVr : AsI1<0b1101, (outs GPR:$dst), (ins GPR:$src), DPFrm,
+                 "mov", " $dst, $src", []>, UnaryDP;
+def MOVs : AsI1<0b1101, (outs GPR:$dst), (ins so_reg:$src), DPSoRegFrm,
+                 "mov", " $dst, $src", [(set GPR:$dst, so_reg:$src)]>, UnaryDP;
 
 let isReMaterializable = 1 in
-def MOVi : AsI1<0b1101, (outs GPR:$dst), (ins so_imm:$src), DPRdIm,
-                 "mov", " $dst, $src", [(set GPR:$dst, so_imm:$src)]>;
+def MOVi : AsI1<0b1101, (outs GPR:$dst), (ins so_imm:$src), DPFrm,
+                 "mov", " $dst, $src", [(set GPR:$dst, so_imm:$src)]>, UnaryDP;
 
-def MOVrx : AsI1<0b1101, (outs GPR:$dst), (ins GPR:$src), DPRdMisc,
+def MOVrx : AsI1<0b1101, (outs GPR:$dst), (ins GPR:$src), DPFrm,
                  "mov", " $dst, $src, rrx",
-                 [(set GPR:$dst, (ARMrrx GPR:$src))]>;
+                 [(set GPR:$dst, (ARMrrx GPR:$src))]>, UnaryDP;
 
 // These aren't really mov instructions, but we have to define them this way
 // due to flag operands.
 
 let Defs = [CPSR] in {
-def MOVsrl_flag : AI1<0b1101, (outs GPR:$dst), (ins GPR:$src), DPRdMisc,
+def MOVsrl_flag : AI1<0b1101, (outs GPR:$dst), (ins GPR:$src), DPFrm,
                       "mov", "s $dst, $src, lsr #1",
-                      [(set GPR:$dst, (ARMsrl_flag GPR:$src))]>;
-def MOVsra_flag : AI1<0b1101, (outs GPR:$dst), (ins GPR:$src), DPRdMisc,
+                      [(set GPR:$dst, (ARMsrl_flag GPR:$src))]>, UnaryDP;
+def MOVsra_flag : AI1<0b1101, (outs GPR:$dst), (ins GPR:$src), DPFrm,
                       "mov", "s $dst, $src, asr #1",
-                      [(set GPR:$dst, (ARMsra_flag GPR:$src))]>;
+                      [(set GPR:$dst, (ARMsra_flag GPR:$src))]>, UnaryDP;
 }
 
 //===----------------------------------------------------------------------===//
@@ -839,20 +838,20 @@
                             BinOpFrag<(sube node:$LHS, node:$RHS)>>;
 
 // These don't define reg/reg forms, because they are handled above.
-def RSBri : AsI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_imm:$b), DPRIm,
+def RSBri : AsI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_imm:$b), DPFrm,
                   "rsb", " $dst, $a, $b",
                   [(set GPR:$dst, (sub so_imm:$b, GPR:$a))]>;
 
-def RSBrs : AsI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_reg:$b), DPRSoReg,
+def RSBrs : AsI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_reg:$b), DPSoRegFrm,
                   "rsb", " $dst, $a, $b",
                   [(set GPR:$dst, (sub so_reg:$b, GPR:$a))]>;
 
 // RSB with 's' bit set.
 let Defs = [CPSR] in {
-def RSBSri : AI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_imm:$b), DPRIm,
+def RSBSri : AI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_imm:$b), DPFrm,
                  "rsb", "s $dst, $a, $b",
                  [(set GPR:$dst, (subc so_imm:$b, GPR:$a))]>;
-def RSBSrs : AI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_reg:$b), DPRSoReg,
+def RSBSrs : AI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_reg:$b), DPSoRegFrm,
                  "rsb", "s $dst, $a, $b",
                  [(set GPR:$dst, (subc so_reg:$b, GPR:$a))]>;
 }
@@ -860,10 +859,10 @@
 // FIXME: Do not allow RSC to be predicated for now. But they can set CPSR.
 let Uses = [CPSR] in {
 def RSCri : AXI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_imm:$b, cc_out:$s),
-                 DPRIm, "rsc${s} $dst, $a, $b",
+                 DPFrm, "rsc${s} $dst, $a, $b",
                  [(set GPR:$dst, (sube so_imm:$b, GPR:$a))]>;
 def RSCrs : AXI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b, cc_out:$s),
-                 DPRSoReg, "rsc${s} $dst, $a, $b",
+                 DPSoRegFrm, "rsc${s} $dst, $a, $b",
                  [(set GPR:$dst, (sube so_reg:$b, GPR:$a))]>;
 }
 
@@ -896,13 +895,16 @@
 defm BIC   : AsI1_bin_irs<0b1110, "bic",
                           BinOpFrag<(and node:$LHS, (not node:$RHS))>>;
 
-def  MVNr  : AsI1<0b1111, (outs GPR:$dst), (ins GPR:$src), DPRdReg,
-                  "mvn", " $dst, $src", [(set GPR:$dst, (not GPR:$src))]>;
-def  MVNs  : AsI1<0b1111, (outs GPR:$dst), (ins so_reg:$src), DPRdSoReg,
-                  "mvn", " $dst, $src", [(set GPR:$dst, (not so_reg:$src))]>;
+def  MVNr  : AsI1<0b1111, (outs GPR:$dst), (ins GPR:$src), DPFrm,
+                  "mvn", " $dst, $src",
+                  [(set GPR:$dst, (not GPR:$src))]>, UnaryDP;
+def  MVNs  : AsI1<0b1111, (outs GPR:$dst), (ins so_reg:$src), DPSoRegFrm,
+                  "mvn", " $dst, $src",
+                  [(set GPR:$dst, (not so_reg:$src))]>, UnaryDP;
 let isReMaterializable = 1 in
-def  MVNi  : AsI1<0b1111, (outs GPR:$dst), (ins so_imm:$imm), DPRdIm,
-                  "mvn", " $dst, $imm", [(set GPR:$dst, so_imm_not:$imm)]>;
+def  MVNi  : AsI1<0b1111, (outs GPR:$dst), (ins so_imm:$imm), DPFrm,
+                  "mvn", " $dst, $imm",
+                  [(set GPR:$dst, so_imm_not:$imm)]>,UnaryDP;
 
 def : ARMPat<(and   GPR:$src, so_imm_not:$imm),
              (BICri GPR:$src, so_imm_not:$imm)>;
@@ -911,48 +913,48 @@
 //  Multiply Instructions.
 //
 
-def MUL   : AsI6<0b0000, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm,
+def MUL   : AsMul1I<0b0000, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
                  "mul", " $dst, $a, $b",
                  [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>;
 
-def MLA   : AsI6<0b0010, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c),
-                 MulFrm, "mla", " $dst, $a, $b, $c",
+def MLA   : AsMul1I<0b0010, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c),
+                 "mla", " $dst, $a, $b, $c",
                  [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR:$c))]>;
 
 // Extra precision multiplies with low / high results
-def SMULL : AsI6<0b1100, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b),
-                 MulFrm, "smull", " $ldst, $hdst, $a, $b", []>;
+def SMULL : AsMul1I<0b1100, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b),
+                 "smull", " $ldst, $hdst, $a, $b", []>;
 
-def UMULL : AsI6<0b1000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b),
-                 MulFrm, "umull", " $ldst, $hdst, $a, $b", []>;
+def UMULL : AsMul1I<0b1000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b),
+                 "umull", " $ldst, $hdst, $a, $b", []>;
 
 // Multiply + accumulate
-def SMLAL : AsI6<0b1110, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b),
-                 MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>;
+def SMLAL : AsMul1I<0b1110, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b),
+                 "smlal", " $ldst, $hdst, $a, $b", []>;
 
-def UMLAL : AsI6<0b1010, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b),
-                 MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>;
+def UMLAL : AsMul1I<0b1010, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b),
+                 "umlal", " $ldst, $hdst, $a, $b", []>;
 
-def UMAAL : AI6 <0b0000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b), 
-                 MulFrm, "umaal", " $ldst, $hdst, $a, $b", []>,
-                 Requires<[IsARM, HasV6]>;
+def UMAAL : AMul1I<0b0000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b), 
+                   "umaal", " $ldst, $hdst, $a, $b", []>,
+                   Requires<[IsARM, HasV6]>;
 
 // Most significant word multiply
 // FIXME: encoding
-def SMMUL : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm,
+def SMMUL : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm2,
                "smmul", " $dst, $a, $b",
                [(set GPR:$dst, (mulhs GPR:$a, GPR:$b))]>,
             Requires<[IsARM, HasV6]>;
 
 // FIXME: encoding
-def SMMLA : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), MulFrm,
+def SMMLA : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), MulFrm2,
                "smmla", " $dst, $a, $b, $c",
                [(set GPR:$dst, (add (mulhs GPR:$a, GPR:$b), GPR:$c))]>,
             Requires<[IsARM, HasV6]>;
 
 
 // FIXME: encoding
-def SMMLS : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), MulFrm,
+def SMMLS : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), MulFrm2,
                "smmls", " $dst, $a, $b, $c",
                [(set GPR:$dst, (sub GPR:$c, (mulhs GPR:$a, GPR:$b)))]>,
                Requires<[IsARM, HasV6]>;
@@ -1133,20 +1135,20 @@
 // Conditional moves
 // FIXME: should be able to write a pattern for ARMcmov, but can't use
 // a two-value operand where a dag node expects two operands. :( 
-def MOVCCr : AI<0xD, (outs GPR:$dst), (ins GPR:$false, GPR:$true),
-                DPRdReg, "mov", " $dst, $true",
+def MOVCCr : AI<0xD, (outs GPR:$dst), (ins GPR:$false, GPR:$true), DPFrm,
+                "mov", " $dst, $true",
       [/*(set GPR:$dst, (ARMcmov GPR:$false, GPR:$true, imm:$cc, CCR:$ccr))*/]>,
                 RegConstraint<"$false = $dst">;
 
-def MOVCCs : AI<0xD, (outs GPR:$dst), (ins GPR:$false, so_reg:$true),
-                DPRdSoReg, "mov", " $dst, $true",
+def MOVCCs : AI<0xD, (outs GPR:$dst), (ins GPR:$false, so_reg:$true), DPSoRegFrm,
+                "mov", " $dst, $true",
    [/*(set GPR:$dst, (ARMcmov GPR:$false, so_reg:$true, imm:$cc, CCR:$ccr))*/]>,
-                RegConstraint<"$false = $dst">;
+                RegConstraint<"$false = $dst">, UnaryDP;
 
-def MOVCCi : AI<0xD, (outs GPR:$dst), (ins GPR:$false, so_imm:$true),
-                DPRdIm, "mov", " $dst, $true",
+def MOVCCi : AI<0xD, (outs GPR:$dst), (ins GPR:$false, so_imm:$true), DPFrm,
+                "mov", " $dst, $true",
    [/*(set GPR:$dst, (ARMcmov GPR:$false, so_imm:$true, imm:$cc, CCR:$ccr))*/]>,
-                RegConstraint<"$false = $dst">;
+                RegConstraint<"$false = $dst">, UnaryDP;
 
 
 // LEApcrel - Load a pc-relative address into a register without offending the
@@ -1192,9 +1194,9 @@
 
 // Two piece so_imms.
 let isReMaterializable = 1 in
-def MOVi2pieces : AI1x2<0x0, (outs GPR:$dst), (ins so_imm2part:$src), DPRdMisc,
+def MOVi2pieces : AI1x2<0x0, (outs GPR:$dst), (ins so_imm2part:$src), DPFrm,
                          "mov", " $dst, $src",
-                         [(set GPR:$dst, so_imm2part:$src)]>;
+                         [(set GPR:$dst, so_imm2part:$src)]>, UnaryDP;
 
 def : ARMPat<(or GPR:$LHS, so_imm2part:$RHS),
               (ORRri (ORRri GPR:$LHS, (so_imm2part_1 imm:$RHS)),




From anton at korobeynikov.info  Wed Nov  5 12:39:02 2008
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Wed, 5 Nov 2008 21:39:02 +0300
Subject: [llvm-commits] Patch: improve protability of llvm-config
In-Reply-To: <20081105183332.GA70642@pom.apple.com>
References: <490F7EF2.2020808@web.de>
	
	<4911DFBE.9080007@web.de> <20081105183332.GA70642@pom.apple.com>
Message-ID: 

Hello, Everyone

> I am using MSYS 1.0.10 with the msys perl (5.6.1). I will try MSYS
> 1.0.11.
We should not introduce new requirements without extra benefits. Thus
I think, that any patch should work correctly on msys 1.0.10 with
standard perl (5.6.1, from msys DTK).

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University


From dpatel at apple.com  Wed Nov  5 12:41:15 2008
From: dpatel at apple.com (Devang Patel)
Date: Wed, 05 Nov 2008 18:41:15 -0000
Subject: [llvm-commits] [llvm] r58765 -
	/llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll
Message-ID: <200811051841.mA5IfFBI010856@zion.cs.uiuc.edu>

Author: dpatel
Date: Wed Nov  5 12:41:15 2008
New Revision: 58765

URL: http://llvm.org/viewvc/llvm-project?rev=58765&view=rev
Log:
Add PR number.

Modified:
    llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll

Modified: llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll?rev=58765&r1=58764&r2=58765&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll (original)
+++ llvm/trunk/test/Transforms/Inline/2008-11-04-AlwaysInline.ll Wed Nov  5 12:41:15 2008
@@ -1,5 +1,6 @@
 ; RUN: llvm-as < %s | opt -always-inline | llvm-dis | grep {@foo}
 ; Ensure that foo is not removed by always inliner
+; PR 2945
 
 define internal i32 @foo() nounwind {
   ret i32 0




From pgurd at rapidmind.com  Wed Nov  5 12:59:50 2008
From: pgurd at rapidmind.com (Preston Gurd)
Date: Wed, 5 Nov 2008 13:59:50 -0500
Subject: [llvm-commits] patch: flush raw_ostream after
	AsmPrinting	function
In-Reply-To: <6a8523d60811020107v619688f4v8bc19ae71bea91b7@mail.gmail.com>
References: <1225471329.28395.19.camel@Remington>
	
	
	<6a8523d60811020107v619688f4v8bc19ae71bea91b7@mail.gmail.com>
Message-ID: <1225911590.8085.18.camel@Remington>

While you are all considering the one true way to handle this issue
(which would be above my patch-grade, I think), might you consider
applying the (attached) patch for the time being?

When printing the generated assembly code for a function to a
raw_ostream using the -print-emitted-asm option, flush the raw_ostream
output to avoid the possibility of having the last partial buffer be
separated from the rest of the generated code output by other output to
the same device, but using a different output stream.


On Sun, 2008-02-11 at 03:07 -0500, Daniel Dunbar wrote:
> I agree with Dan, this is unfortunate.
> 
> Is an extra branch in the write routine really a performance issue
> here?
> 
>  - Daniel
> 
> On Fri, Oct 31, 2008 at 4:33 PM, Chris Lattner 
> wrote:
>         
>         On Oct 31, 2008, at 1:52 PM, Dan Gohman wrote:
>         
>         > The real bug here, in my opinion, is that the new
>         raw_ostream
>         > version of stderr is buffered.
>         
>         
>         Patches, as they say, are welcome :).  If you can figure out a
>         way to
>         not affect the perf of the buffered case, I would really
>         really like
>         this.
>         
>         -Chris
>         
>         _______________________________________________
>         llvm-commits mailing list
>         llvm-commits at cs.uiuc.edu
>         http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>         
> 
-------------- next part --------------
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From zaimoni at zaimoni.com  Wed Nov  5 13:00:36 2008
From: zaimoni at zaimoni.com (Kenneth Boyd)
Date: Wed, 05 Nov 2008 13:00:36 -0600
Subject: [llvm-commits] Patch: improve protability of llvm-config
In-Reply-To: <4911DFBE.9080007@web.de>
References: <490F7EF2.2020808@web.de>	
	<4911DFBE.9080007@web.de>
Message-ID: <4911ED54.3080509@zaimoni.com>

Sascha Othman wrote:
> May I then suggest the following changes in response to Julien's message
> at
> http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20081103/069380.html
> ?
> His proposed patch works as far as I can tell (thanks, Julien), but it
> has the sideeffect of not resolving to absolute paths and thus making
> llvm-config produce output like /usr/local/bin/../bin
> The submitted solution here was tested on linux, MSYS/MinGW and Windows.
>   
Weird.  I think the point is that realpath/abs_path is broken under 
mingw Perl (it is what I use to make ActiveState work.)

So a proper patch *needs* to fall back to Cwd::realpath/abs_path when 
shell scripting fails outright, rather than failover to shell scripting 
when Cwd doesn't load (which as a base module it should for Perl 5.6.0 
and later).

Kenneth



From s.othman at web.de  Wed Nov  5 13:28:59 2008
From: s.othman at web.de (Sascha Othman)
Date: Wed, 05 Nov 2008 20:28:59 +0100
Subject: [llvm-commits] Patch: improve protability of llvm-config
In-Reply-To: 
References: <490F7EF2.2020808@web.de>	
		
	<4911DFBE.9080007@web.de> <20081105183332.GA70642@pom.apple.com>
	
Message-ID: <4911F3FB.60603@web.de>

Using Perl 5.6.1 for MSYS (from the DTK) as well, with MSYS 1.0.11 here,
so an outdated MSYS might be the culprit. The benefit of the change
would be llvm-config being usable from Windows (without MSYS) and other
platforms which don't provide a *NIX-like shell and tools like 'which'
and 'pwd'.


From wangmp at apple.com  Wed Nov  5 13:53:00 2008
From: wangmp at apple.com (Mon Ping Wang)
Date: Wed, 5 Nov 2008 11:53:00 -0800
Subject: [llvm-commits] Patch: generalize vector shuffle
In-Reply-To: <200811051825.21127.duncan.sands@math.u-psud.fr>
References: <7C812DE7-E002-4767-A0AE-192738C25237@apple.com>
	
	<8C28F2F1-32AE-42CC-8CD2-3B13FC6F6F9F@apple.com>
	<200811051825.21127.duncan.sands@math.u-psud.fr>
Message-ID: <3F809D20-B3C9-4A91-A907-788673A90809@apple.com>

Hi Duncan,

On Nov 5, 2008, at 9:25 AM, Duncan Sands wrote:

> Hi Mon Ping,
>
> general comment: there is trailing whitespace on many lines.
>

I'll run a scrubber and make sure they are all removed.


>> @@ -1324,8 +1326,7 @@
>>   const VectorType *MaskTy = dyn_cast(Mask->getType());
>>   if (!isa(Mask) || MaskTy == 0 ||
>>       MaskTy->getElementType() != Type::Int32Ty ||
>> -      MaskTy->getNumElements() !=
>> -      cast(V1->getType())->getNumElements())
>> +      MaskTy->getNumElements() <= 1)
>
> Why not allow a mask of length 1?  The DAG combiner or SelectionDAG
> can simplify this of course, but I don't see why it should be illegal.

 From an implementation point of view, there is no reason not to allow  
it.  At a IR level, there is no problem having vector of length 1 but  
I preferred if they would use the element instead and use extract  
element.  Since vector of single element is allowed in the IR, I  
shouldn't allow my prejudices against the concept affect me and allow  
a vector shuffle to create a single vector element :->.


>> Assert1(MV->getNumOperands() > 1,
>> +            "Shufflevector mask can not have one element!", &SV);
>
> Likewise.
>
>> -  unsigned NumElts = cast(V1->getType())- 
>> >getNumElements();
>> +
>> +  unsigned NumElts = cast(Mask->getType())- 
>> >getNumElements();
>> +  unsigned V1NumElts = cast(V1->getType())- 
>> >getNumElements();
>>   const Type *EltTy = cast(V1->getType())- 
>> >getElementType();
>
> How about SrcNumElts instead of V1NumElts, and MaskNumElts instead  
> of NumElts?
> Likewise in the rest of the patch: the names given to the number of  
> elements
> are not always self-explanatory.
>

That does seem clearer.  I'll make the change.

>> +//===---- LegalizeTypesUtils.cpp - Utilities for Legalization of  
>> types
>
> Why not only do it in LegalizeTypes?
>

Are you asking why these utilities are not part of LegalizeTypes  
instead of placing them in their own class?  If so, LegalizeDAG would  
need access to the utility and I thought it was cleaner to have a  
separate class that both LegalizeDAG and LegalizeTypes can have access  
to instead of dirtying up LegalizeTypes with these utilities.


> Also, I think SplitVecRes_VECTOR_SHUFFLE needs some changes, but I  
> didn't
> spot any.
>
>> +void DAGLegalizeTypeUtils::DetermineVectorShuffleUse(SelectionDAG&  
>> CurDAG,
>> +                               SDValue Mask, unsigned Start,  
>> unsigned End,
>> +                               unsigned NumElements, unsigned Half,
>> +                               MVT NewEltVT, SmallVector> 16>& NewMask,
>> +                               VecUse& LhsUse, VecUse& RhsUse) {
>
> How about a comment describing this function.  I found the names  
> LhsUse and
> RhsUse not very self-explanatory.
>

I put the comment in the .h file for the function but didn't  
duplicated in the .cpp file.  I'll copy it over so people don't have  
to to go the header file to figure out what it does.  How about  
Src1Use and Src2Use instead of LhsUse and RhsUse?  We are trying to  
figure out how the input vectors are being used in the vector shuffle.


>> +  if (LLhsUse != VecUseBoth && LRhsUse != VecUseBoth) {
>
> I have the impression that you could reduce the amount of duplicated
> code by swapping Lo and Hi parts depending on what is used.  By the  
> way,
> I thought a bit about how to do this splitting, and I think what you  
> are
> doing is pretty optimal.  However I wasn't brave enough to check  
> that you
> are actually doing what I think you are doing :)  I will check the  
> algorithm
> when you have a final version.
>

After you point this out,  I think I understand now Evan's point too :- 
 >.  I can't factor out how to handle the vector is being used but I  
can factor out the common code that either extract the low part of   
the vector, the high part of the vector, or create an undef vector  
when it is not being used.  I'll make that change.


>> +    Ops.clear();
>
> Not sure why you have Ops.clear() at the end of each branch, rather
> than once after the end of the "if"...
>
>> +    Ops.clear();
>> +  }
>> +}
>
> It's also rather pointless at the end of the function!

Both of those are a mistake.  I cleaned that part up yesterday by only  
putting Ops.clear() before I start inserting      elements into Ops  
but I didn't want to send another patch for that small change.


>> +void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N,  
>> SDValue &Lo,
>> +                                                     SDValue &Hi) {
>> +  // We only support constant index.
>> +  MVT LoVT, HiVT;
>> +  GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
>> +  unsigned LoNumElts = LoVT.getVectorNumElements();
>> +  unsigned HiNumElts = HiVT.getVectorNumElements();
>> +
>> +  SDValue Vec = N->getOperand(0);
>> +  SDValue Idx = N->getOperand(1);
>> +
>> +  if (TLI.isTypeLegal(Vec.getValueType())) {
>
> Why not just always do this?  It should work fine even if Vec is  
> illegal.

That is what I had originally had but then though that if the incoming  
vector is illegal, it would be better to split it at this point.   
There is no point doing it here as SplitVecOp_EXTRACT_SUBVECTOR would  
do this for me anyway.

>> +    // If the incoming vector type is legal, just extract the  
>> correct subpart.
>> +    ConstantSDNode *CIdx = cast(Idx);
>
> You don't have to assume that Idx is constant here, you just have to  
> do an
> ADD below.

I'll remove the restriction.

>
>
>> +    Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, LoVT, Vec, Idx);
>> +    Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, HiVT, Vec,
>> +                     DAG.getConstant(CIdx->getZExtValue() +  
>> LoNumElts,
>> +                                     Idx.getValueType()));
>
> If LoVT != HiVT then there is no reason to think that these new
> indices are a multiple of the lengths LoVT/HiVT, i.e. you may be
> producing illegal subvectors here.  I think you should add an
> assertion that LoVT == HiVT until the vector widening stuff is
> complete (and splitting is no longer done for non-power-of-two
> vectors).
>

That is true.  In generally, it will not work but there are cases were  
it will.  For the case of a constant index, I can check to make sure  
that the indices are a multiple of the length.  Otherwise, the LoVT ==  
HiVT.  I want to make sure the case of vector 3 should work.  As we  
discussing previously in widening emails, for all architectures, widen  
will always widen a vector to a power of 2 so LoVT should always HiVT.

>> +  } else {
>
> Aren't you just repeating here the work done by
> SplitVecOp_EXTRACT_SUBVECTOR?

Yes, I'm.  I was splitting the op early but there is no reason for me  
to do so.  I misunderstood the structure of LegalizeType.

>> -  case ISD::VECTOR_SHUFFLE:
>> +  case ISD::VECTOR_SHUFFLE: {
>> +    assert(Node->getOperand(0).getValueType().getVectorNumElements 
>> () ==
>> +           Op.getValueType().getVectorNumElements() &&
>> +           "Vector shuffle must be normalized");
>
> Why must it be normalized, and who takes care of this?  Likewise  
> below.

When we build the SelectionDAG, we normalize all the vector shuffles  
and introduce any new operation.   The pros of doing this way is that  
after DAG construction, none of the DAG passes would have to worry  
about non-normalized shuffles, allow optimizations after   
normalization, and in LegalizeTypes, we wouldn't have to do a pass to  
normalize the vector shuffles. (We might be able to fold the work when  
iterate the DAG to build the worklist in LegalizeTypes).  The downside  
is no DAG optimization can generate a non-normalized shufflevector.   
The latter shouldn't be a problem since any optimizations that we want  
do with non-normalized shuffle vectors should be done in phases like  
InstCombine.

>
>> -  case ISD::FCOS: {
>> +  case ISD::FCOS:
>> +  case ISD::CTPOP:
>> +  case ISD::CTTZ:
>> +  case ISD::CTLZ: {
>
> What's this about?
>

This actually a change in widening when I was testing the vector  
shuffle.  It shouldn't be part of this patch as it should be part of  
the second widening patch when support for widening goes into  
LegalizeTypes.


>> +    // Check if we need to normalize the vector shuffle
>
> I'm not sure this belongs in LegalizeTypes.  It seems to
> me that this is to do with legalizing the operation, because
> it is unsupported by targets, not legalizing the types.  As
> such it belongs in LegalizeDAG.  In any case, you don't
> actually do anything here!
>

Ack! I been looking at this patch so long that missed the comments.   
It should not be there as I created it when I was experiment with  
normalizing in LegalizeTypes.  I decided not to do it that way (see  
above) and I thought I deleted all the code for that experiment but I  
didn't.

>
>> +  // Normalize the shuffle vector since mask and vector length  
>> don't match.
>> +  assert(NumElems != 1 && "Vector shuffle can not result in 1  
>> element");
>
> Why not allow this (and immediately simplify to something else)?
>
> If this only produces normalized vectors, why are changes needed  
> elsewhere
> (eg: LegalizeTypes)?  At this point I am quite confused!
>

The changes in LegalizesTypes are needed to take advantage of  
generalized the vector shuffle.   I should have copied my original  
email for the patch to this last patch as an introduction.   With  
these changes, we try to keep as much as the original vector program  
(after optimization) structure all the way to the backend.  The  
incoming program uses generalize vector shuffles, in SelectionDAG  
building, we normalize, and then in Legalization, we convert any of  
the illegal normalized shuffles to concat, extract sub vectors, etc.   
Before, legalization would break it down to insert/extracts which we  
had a hard time rebuilding.   For examples like transposing a vector,  
this allows us to generate much better code.  Sorry about the confusion!


>>   CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
>> -            CCAssignToReg<[XMM0,XMM1]>>,
>> +            CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
>
> What's this about?
>

This shouldn't go in this patch either.  I needed it to run various  
tests on vector shuffles where we have code that pass 8 element  
vectors in registers.  This will go into another patch as we need it  
for some work here at apple.  XMM2 and XMM3 are non ABI compliant for  
X86 but since all front ends lower their code, this shouldn't cause  
problems

Thanks for your effort of going through the patch,
   -- Mon Ping




From grosbach at apple.com  Wed Nov  5 13:53:02 2008
From: grosbach at apple.com (Jim Grosbach)
Date: Wed, 5 Nov 2008 11:53:02 -0800
Subject: [llvm-commits] [llvm] r58626 - in /llvm/trunk/lib/Target/ARM:
	ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.h ARMInstrInfo.td
In-Reply-To: <6361908F-1AFD-4B0A-920F-BA51EB869C48@apple.com>
References: <200811031838.mA3IcWqw019585@zion.cs.uiuc.edu>
	
	<11542DAB-355C-4414-87BE-13A31708DF6D@apple.com>
	<840F490C-F893-46E0-ADFF-B61BC21677D5@apple.com>
	
	<6361908F-1AFD-4B0A-920F-BA51EB869C48@apple.com>
Message-ID: 

Since you insist, I'll change it.

On Nov 3, 2008, at 2:32 PM, Evan Cheng wrote:

>
> On Nov 3, 2008, at 2:10 PM, Jim Grosbach wrote:
>
>> On Nov 3, 2008, at 12:44 PM, Evan Cheng wrote:
>>
>>> Ok. It's not just a naming issue. AddrMode information is used by
>>> other ARM routines to determine instruction properties. Currently
>>> AddrMode6 is only used by the code emitter to determine instruction
>>> encoding. That seems wrong. You should be using instruction format
>>> bits to determine how to encode these instructions instead. See
>>>
>>
>> The places where the addressing mode is used in the backend are:
>>
>>
>> ARMCodeEmitter::getInstrBinary() - Dispatch routine for instruction
>> encoding. This is currently based exclusively on AddrMode, and calls
>> out to a separate function for each one. This is the one place where
>> we do need to hook in for the new instructions.
>>
>>
>> The instruction format bits are currently used to determine how to
>> format and encode individual operands within a class of instructions.
>> For example, my intent here is to use that format mask to handle bits
>> 5 and 6 for the SMLAxy, SMLAWy, SULWy, etc. instructions.
>>
>> That is, the usage pattern in place is to use the addressing mode  
>> bits
>> to indicate a class of instructions with common operand schemes, then
>> use the format mask to break down nuances of those encodings. That's
>> the pattern I've attempted to stay consistent with.
>
> Right. We are confusing "addressing mode" with "instruction set
> encoding scheme". It's a not advisable. It's done this way due to some
> legacy code. We got away with it because the all instructions in each
> address mode happens to be in the same encoding scheme (this is
> actually not true in addrmode1 case). This ought to be cleaned up when
> we have a chance. Please don't contribute to the problem. It's worse
> if you introduce a new addrmode6  address mode to represent a new
> encoding scheme. This is really confusing since isn't a address mode 6
> in the ARM instruction set.
>
>>
>> It is, of course, technically possible to just hook off from
>> getAddrModeNoneInstrBinary() based on the format mask entirely. I
>> chose not to do that for the reasons outlined above.
>
> We ought to follow "A3.1 Instruction set encoding" by classifying
> instructions into the formats listed there. That doesn't have to be
> done now. But let's not follow the same mistake that's already made.
> We can leave addr1 to 5 instructions alone for now. For the rest,
> let's branch off to different encoding functions based on the format
> mask. This also means we should do away with
> getAddrModeNoneInstrBinary and introduce getBranchInstrBinary to
> handle the branch instructions.
>
> Evan
>
>>
>>
>> Do you have a counter-example that demonstrates why this is the wrong
>> approach?
>>
>>
>>>
>>> // Format specifies the encoding used by the instruction.  This is
>>> part of the
>>> // ad-hoc solution used to emit machine instruction encodings by our
>>> machine
>>> // code emitter.
>>> class Format val> {
>>> bits<5> Value = val;
>>> }
>>>
>>> def Pseudo      : Format<1>;
>>> def MulFrm      : Format<2>;
>>> def MulSMLAW    : Format<3>;
>>>
>>> Evan
>>>
>>>
>>> On Nov 3, 2008, at 11:41 AM, Jim Grosbach wrote:
>>>
>>>> I have no real preference for what name to use. I chose that to be
>>>> consistent with the other operations doing similar things (choosing
>>>> how to encode operands for a class of instructions). If there's an
>>>> alternative nomenclature that's preferable, that's fine with me.
>>>>
>>>>
>>>> On Nov 3, 2008, at 11:17 AM, Evan Cheng wrote:
>>>>
>>>>> Thanks. But is addrmode6 the right name? I don't see ARM manuals
>>>>> using
>>>>> that name.
>>>>>
>>>>> Evan
>>>>>
>>>>> On Nov 3, 2008, at 10:38 AM, Jim Grosbach wrote:
>>>>>
>>>>>> Author: grosbach
>>>>>> Date: Mon Nov  3 12:38:31 2008
>>>>>> New Revision: 58626
>>>>>>
>>>>>> URL: http://llvm.org/viewvc/llvm-project?rev=58626&view=rev
>>>>>> Log:
>>>>>> Add binary encoding support for multiply instructions. Some  
>>>>>> blanks
>>>>>> left to fill in, but the basics are there.
>>>>>>
>>>>>> Modified:
>>>>>> llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
>>>>>> llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
>>>>>> llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
>>>>>> llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
>>>>>>
>>>>>> Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
>>>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58626&r1=58625&r2=58626&view=diff
>>>>>>
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> = 
>>>>>> =================================================================
>>>>>> --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
>>>>>> +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Mon Nov  3
>>>>>> 12:38:31
>>>>>> 2008
>>>>>> @@ -82,8 +82,8 @@
>>>>>>                                const TargetInstrDesc &TID,
>>>>>>                                const MachineOperand &MO);
>>>>>>
>>>>>> -    unsigned getAddrMode1SBit(const MachineInstr &MI,
>>>>>> -                              const TargetInstrDesc &TID) const;
>>>>>> +    unsigned getAddrModeSBit(const MachineInstr &MI,
>>>>>> +                             const TargetInstrDesc &TID) const;
>>>>>>
>>>>>> unsigned getAddrMode1InstrBinary(const MachineInstr &MI,
>>>>>>                                 const TargetInstrDesc &TID,
>>>>>> @@ -97,6 +97,9 @@
>>>>>> unsigned getAddrMode4InstrBinary(const MachineInstr &MI,
>>>>>>                                 const TargetInstrDesc &TID,
>>>>>>                                 unsigned Binary);
>>>>>> +    unsigned getAddrMode6InstrBinary(const MachineInstr &MI,
>>>>>> +                                     const TargetInstrDesc &TID,
>>>>>> +                                     unsigned Binary);
>>>>>>
>>>>>> /// getInstrBinary - Return binary encoding for the specified
>>>>>> /// machine instruction.
>>>>>> @@ -432,8 +435,8 @@
>>>>>> return Binary;
>>>>>> }
>>>>>>
>>>>>> -unsigned ARMCodeEmitter::getAddrMode1SBit(const MachineInstr  
>>>>>> &MI,
>>>>>> -                                          const TargetInstrDesc
>>>>>> &TID) const {
>>>>>> +unsigned ARMCodeEmitter::getAddrModeSBit(const MachineInstr &MI,
>>>>>> +                                         const TargetInstrDesc
>>>>>> &TID) const {
>>>>>> for (unsigned i = MI.getNumOperands(), e = TID.getNumOperands();
>>>>>> i != e; --i){
>>>>>> const MachineOperand &MO = MI.getOperand(i-1);
>>>>>> if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR)
>>>>>> @@ -449,7 +452,7 @@
>>>>>> Binary |= II->getPredicate(&MI) << 28;
>>>>>>
>>>>>> // Encode S bit if MI modifies CPSR.
>>>>>> -  Binary |= getAddrMode1SBit(MI, TID);
>>>>>> +  Binary |= getAddrModeSBit(MI, TID);
>>>>>>
>>>>>> // Encode register def if there is one.
>>>>>> unsigned NumDefs = TID.getNumDefs();
>>>>>> @@ -618,6 +621,33 @@
>>>>>> return Binary;
>>>>>> }
>>>>>>
>>>>>> +unsigned ARMCodeEmitter::getAddrMode6InstrBinary(const
>>>>>> MachineInstr
>>>>>> &MI,
>>>>>> +                                                 const
>>>>>> TargetInstrDesc &TID,
>>>>>> +                                                 unsigned
>>>>>> Binary) {
>>>>>> +  // Set the conditional execution predicate
>>>>>> +  Binary |= II->getPredicate(&MI) << 28;
>>>>>> +
>>>>>> +  // Encode S bit if MI modifies CPSR.
>>>>>> +  Binary |= getAddrModeSBit(MI, TID);
>>>>>> +
>>>>>> +  // 32x32->64bit operations have two destination registers. The
>>>>>> number
>>>>>> +  // of register definitions will tell us if that's what we're
>>>>>> dealing with.
>>>>>> +  int OpIdx = 0;
>>>>>> +  if (TID.getNumDefs() == 2)
>>>>>> +    Binary |= getMachineOpValue (MI, OpIdx++) <<
>>>>>> ARMII::RegRdLoShift;
>>>>>> +
>>>>>> +  // Encode Rd
>>>>>> +  Binary |= getMachineOpValue(MI, OpIdx++) <<
>>>>>> ARMII::RegRdHiShift;
>>>>>> +
>>>>>> +  // Encode Rm
>>>>>> +  Binary |= getMachineOpValue(MI, OpIdx++);
>>>>>> +
>>>>>> +  // Encode Rs
>>>>>> +  Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRsShift;
>>>>>> +
>>>>>> +  return Binary;
>>>>>> +}
>>>>>> +
>>>>>> /// getInstrBinary - Return binary encoding for the specified
>>>>>> /// machine instruction.
>>>>>> unsigned ARMCodeEmitter::getInstrBinary(const MachineInstr &MI) {
>>>>>> @@ -636,6 +666,8 @@
>>>>>> return getAddrMode3InstrBinary(MI, TID, Binary);
>>>>>> case ARMII::AddrMode4:
>>>>>> return getAddrMode4InstrBinary(MI, TID, Binary);
>>>>>> +  case ARMII::AddrMode6:
>>>>>> +    return getAddrMode6InstrBinary(MI, TID, Binary);
>>>>>> }
>>>>>>
>>>>>> abort();
>>>>>>
>>>>>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
>>>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58626&r1=58625&r2=58626&view=diff
>>>>>>
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> = 
>>>>>> =================================================================
>>>>>> --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
>>>>>> +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Mon Nov  3
>>>>>> 12:38:31
>>>>>> 2008
>>>>>> @@ -659,6 +659,28 @@
>>>>>> let Inst{27-25} = 0b100;
>>>>>> }
>>>>>>
>>>>>> +// addrmode6
>>>>>> +// Unsigned multiply, multiply-accumulate instructions.
>>>>>> +class AI6 opcod, dag oops, dag iops, Format f, string
>>>>>> opc,
>>>>>> +         string asm, list pattern>
>>>>>> +  : I>>>>> f,
>>>>>> opc,
>>>>>> +      asm,"",pattern>
>>>>>> +{
>>>>>> +  // FIXME: bits 7-4 should be a sub-mode (for SMLAxx,
>>>>>> SMLAWy, ...)
>>>>>> +  let Inst{7-4}   = 0b1001;
>>>>>> +  let Inst{27-24} = 0b0000;
>>>>>> +  let Inst{23-20} = opcod;
>>>>>> +}
>>>>>> +class AsI6 opcod, dag oops, dag iops, Format f, string
>>>>>> opc,
>>>>>> +          string asm, list pattern>
>>>>>> +  : sI>>>>> f,
>>>>>> opc,
>>>>>> +       asm,"",pattern>
>>>>>> +{
>>>>>> +  // FIXME: bits 7-4 should be a sub-mode (for SMLAxx,
>>>>>> SMLAWy, ...)
>>>>>> +  let Inst{7-4}   = 0b1001;
>>>>>> +  let Inst{27-24} = 0b0000;
>>>>>> +  let Inst{23-20} = opcod;
>>>>>> +}
>>>>>>
>>>>>> //
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> ----------------------------------------------------------------------=
>>>>>> ==//
>>>>>>
>>>>>>
>>>>>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
>>>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=58626&r1=58625&r2=58626&view=diff
>>>>>>
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> = 
>>>>>> =================================================================
>>>>>> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original)
>>>>>> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Mon Nov  3 12:38:31
>>>>>> 2008
>>>>>> @@ -30,8 +30,7 @@
>>>>>> // Instruction Flags.
>>>>>>
>>>>>> //
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> ------------------------------------------------------------------
>>>>>> ===//
>>>>>> -    // This three-bit field describes the addressing mode used.
>>>>>> Zero is unused
>>>>>> -    // so that we can tell if we forgot to set a value.
>>>>>> +    // This four-bit field describes the addressing mode used.
>>>>>>
>>>>>> AddrModeMask  = 0xf,
>>>>>> AddrModeNone  = 0,
>>>>>> @@ -40,10 +39,11 @@
>>>>>> AddrMode3     = 3,
>>>>>> AddrMode4     = 4,
>>>>>> AddrMode5     = 5,
>>>>>> -    AddrModeT1    = 6,
>>>>>> -    AddrModeT2    = 7,
>>>>>> -    AddrModeT4    = 8,
>>>>>> -    AddrModeTs    = 9,   // i8 * 4 for pc and sp relative data
>>>>>> +    AddrMode6     = 6,
>>>>>> +    AddrModeT1    = 7,
>>>>>> +    AddrModeT2    = 8,
>>>>>> +    AddrModeT4    = 9,
>>>>>> +    AddrModeTs    = 10,  // i8 * 4 for pc and sp relative data
>>>>>>
>>>>>> // Size* - Flags to keep track of the size of an instruction.
>>>>>> SizeShift     = 4,
>>>>>> @@ -115,15 +115,17 @@
>>>>>>
>>>>>> // Field shifts - such shifts are used to set field while
>>>>>> generating
>>>>>> // machine instructions.
>>>>>> -    RotImmShift = 8,
>>>>>> -    RegRsShift  = 8,
>>>>>> -    RegRdShift  = 12,
>>>>>> -    RegRnShift  = 16,
>>>>>> -    L_BitShift  = 20,
>>>>>> -    S_BitShift  = 20,
>>>>>> -    U_BitShift  = 23,
>>>>>> -    IndexShift  = 24,
>>>>>> -    I_BitShift  = 25
>>>>>> +    RotImmShift  = 8,
>>>>>> +    RegRsShift   = 8,
>>>>>> +    RegRdLoShift = 12,
>>>>>> +    RegRdShift   = 12,
>>>>>> +    RegRdHiShift = 16,
>>>>>> +    RegRnShift   = 16,
>>>>>> +    L_BitShift   = 20,
>>>>>> +    S_BitShift   = 20,
>>>>>> +    U_BitShift   = 23,
>>>>>> +    IndexShift   = 24,
>>>>>> +    I_BitShift   = 25
>>>>>> };
>>>>>> }
>>>>>>
>>>>>>
>>>>>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
>>>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58626&r1=58625&r2=58626&view=diff
>>>>>>
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> =
>>>>>> = 
>>>>>> =================================================================
>>>>>> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
>>>>>> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Nov  3 12:38:31
>>>>>> 2008
>>>>>> @@ -310,10 +310,11 @@
>>>>>> def AddrMode3    : AddrMode<3>;
>>>>>> def AddrMode4    : AddrMode<4>;
>>>>>> def AddrMode5    : AddrMode<5>;
>>>>>> -def AddrModeT1   : AddrMode<6>;
>>>>>> -def AddrModeT2   : AddrMode<7>;
>>>>>> -def AddrModeT4   : AddrMode<8>;
>>>>>> -def AddrModeTs   : AddrMode<9>;
>>>>>> +def AddrMode6    : AddrMode<6>;
>>>>>> +def AddrModeT1   : AddrMode<7>;
>>>>>> +def AddrModeT2   : AddrMode<8>;
>>>>>> +def AddrModeT4   : AddrMode<9>;
>>>>>> +def AddrModeTs   : AddrMode<10>;
>>>>>>
>>>>>> // Instruction size.
>>>>>> class SizeFlagVal val> {
>>>>>> @@ -910,49 +911,53 @@
>>>>>> //  Multiply Instructions.
>>>>>> //
>>>>>>
>>>>>> -def MUL  : AsI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
>>>>>> MulFrm,
>>>>>> -               "mul", " $dst, $a, $b",
>>>>>> -               [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>;
>>>>>> -
>>>>>> -def MLA  : AsI<0x2, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:
>>>>>> $c),
>>>>>> -               MulFrm, "mla", " $dst, $a, $b, $c",
>>>>>> -               [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR:
>>>>>> $c))]>;
>>>>>> +def MUL   : AsI6<0b0000, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
>>>>>> MulFrm,
>>>>>> +                 "mul", " $dst, $a, $b",
>>>>>> +                 [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>;
>>>>>> +
>>>>>> +def MLA   : AsI6<0b0010, (outs GPR:$dst), (ins GPR:$a, GPR:$b,
>>>>>> GPR:
>>>>>> $c),
>>>>>> +                 MulFrm, "mla", " $dst, $a, $b, $c",
>>>>>> +                 [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR:
>>>>>> $c))]>;
>>>>>>
>>>>>> // Extra precision multiplies with low / high results
>>>>>> -def SMULL : AsI<0xC, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a,
>>>>>> GPR:
>>>>>> $b),
>>>>>> -                MulFrm, "smull", " $ldst, $hdst, $a, $b", []>;
>>>>>> +def SMULL : AsI6<0b1100, (outs GPR:$ldst, GPR:$hdst), (ins GPR:
>>>>>> $a,
>>>>>> GPR:$b),
>>>>>> +                 MulFrm, "smull", " $ldst, $hdst, $a, $b", []>;
>>>>>>
>>>>>> -def UMULL : AsI<0x8, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a,
>>>>>> GPR:
>>>>>> $b),
>>>>>> -                MulFrm, "umull", " $ldst, $hdst, $a, $b", []>;
>>>>>> +def UMULL : AsI6<0b1000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:
>>>>>> $a,
>>>>>> GPR:$b),
>>>>>> +                 MulFrm, "umull", " $ldst, $hdst, $a, $b", []>;
>>>>>>
>>>>>> // Multiply + accumulate
>>>>>> -def SMLAL : AsI<0xE, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a,
>>>>>> GPR:
>>>>>> $b),
>>>>>> -                MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>;
>>>>>> +def SMLAL : AsI6<0b1110, (outs GPR:$ldst, GPR:$hdst), (ins GPR:
>>>>>> $a,
>>>>>> GPR:$b),
>>>>>> +                 MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>;
>>>>>>
>>>>>> -def UMLAL : AsI<0xA, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a,
>>>>>> GPR:
>>>>>> $b),
>>>>>> -                MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>;
>>>>>> +def UMLAL : AsI6<0b1010, (outs GPR:$ldst, GPR:$hdst), (ins GPR:
>>>>>> $a,
>>>>>> GPR:$b),
>>>>>> +                 MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>;
>>>>>>
>>>>>> -def UMAAL : AI<0x0, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a,
>>>>>> GPR:
>>>>>> $b), MulFrm,
>>>>>> -               "umaal", " $ldst, $hdst, $a, $b", []>,
>>>>>> -            Requires<[IsARM, HasV6]>;
>>>>>> +def UMAAL : AI6 <0b0000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:
>>>>>> $a,
>>>>>> GPR:$b),
>>>>>> +                 MulFrm, "umaal", " $ldst, $hdst, $a, $b", []>,
>>>>>> +                 Requires<[IsARM, HasV6]>;
>>>>>>
>>>>>> // Most significant word multiply
>>>>>> +// FIXME: encoding
>>>>>> def SMMUL : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b),  
>>>>>> MulFrm,
>>>>>>           "smmul", " $dst, $a, $b",
>>>>>>           [(set GPR:$dst, (mulhs GPR:$a, GPR:$b))]>,
>>>>>>        Requires<[IsARM, HasV6]>;
>>>>>>
>>>>>> +// FIXME: encoding
>>>>>> def SMMLA : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR: 
>>>>>> $c),
>>>>>> MulFrm,
>>>>>>           "smmla", " $dst, $a, $b, $c",
>>>>>>           [(set GPR:$dst, (add (mulhs GPR:$a, GPR:$b), GPR:
>>>>>> $c))]>,
>>>>>>        Requires<[IsARM, HasV6]>;
>>>>>>
>>>>>>
>>>>>> +// FIXME: encoding
>>>>>> def SMMLS : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR: 
>>>>>> $c),
>>>>>> MulFrm,
>>>>>>           "smmls", " $dst, $a, $b, $c",
>>>>>>           [(set GPR:$dst, (sub GPR:$c, (mulhs GPR:$a, GPR:
>>>>>> $b)))]>,
>>>>>>           Requires<[IsARM, HasV6]>;
>>>>>>
>>>>>> +// FIXME: encoding
>>>>>> multiclass AI_smul {
>>>>>> def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL,
>>>>>>          !strconcat(opc, "bb"), " $dst, $a, $b",
>>>>>> @@ -992,6 +997,7 @@
>>>>>> }
>>>>>>
>>>>>>
>>>>>> +// FIXME: encoding
>>>>>> multiclass AI_smla {
>>>>>> def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc),
>>>>>> MulSMLA,
>>>>>>          !strconcat(opc, "bb"), " $dst, $a, $b, $acc",
>>>>>> @@ -1031,7 +1037,9 @@
>>>>>>        Requires<[IsARM, HasV5TE]>;
>>>>>> }
>>>>>>
>>>>>> +// FIXME: encoding
>>>>>> defm SMUL : AI_smul<"smul", BinOpFrag<(mul node:$LHS, node:
>>>>>> $RHS)>>;
>>>>>> +// FIXME: encoding
>>>>>> defm SMLA : AI_smla<"smla", BinOpFrag<(mul node:$LHS, node:
>>>>>> $RHS)>>;
>>>>>>
>>>>>> // TODO: Halfword multiple accumulate long: SMLAL
>>>>>>
>>>>>>
>>>>>> _______________________________________________
>>>>>> llvm-commits mailing list
>>>>>> llvm-commits at cs.uiuc.edu
>>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>>>
>>>>> _______________________________________________
>>>>> llvm-commits mailing list
>>>>> llvm-commits at cs.uiuc.edu
>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>>
>>>> _______________________________________________
>>>> llvm-commits mailing list
>>>> llvm-commits at cs.uiuc.edu
>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>
>>> _______________________________________________
>>> llvm-commits mailing list
>>> llvm-commits at cs.uiuc.edu
>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From duncan.sands at math.u-psud.fr  Wed Nov  5 14:42:15 2008
From: duncan.sands at math.u-psud.fr (Duncan Sands)
Date: Wed, 5 Nov 2008 21:42:15 +0100
Subject: [llvm-commits] Patch: generalize vector shuffle
In-Reply-To: <3F809D20-B3C9-4A91-A907-788673A90809@apple.com>
References: <7C812DE7-E002-4767-A0AE-192738C25237@apple.com>
	<200811051825.21127.duncan.sands@math.u-psud.fr>
	<3F809D20-B3C9-4A91-A907-788673A90809@apple.com>
Message-ID: <200811052142.15627.duncan.sands@math.u-psud.fr>

Hi Mon Ping,

> >> +//===---- LegalizeTypesUtils.cpp - Utilities for Legalization of  
> >> types
> >
> > Why not only do it in LegalizeTypes?
>
> Are you asking why these utilities are not part of LegalizeTypes  
> instead of placing them in their own class?  If so, LegalizeDAG would  
> need access to the utility...

why does LegalizeDAG need access to this at all?  At some point I'm
going to start removing all type legalization code from LegalizeDAG.
Not quite yet, I admit!  However is there really much point in adding
new type legalization code to LegalizeDAG?

> The changes in LegalizesTypes are needed to take advantage of  
> generalized the vector shuffle.   I should have copied my original  
> email for the patch to this last patch as an introduction.   With  
> these changes, we try to keep as much as the original vector program  
> (after optimization) structure all the way to the backend.  The  
> incoming program uses generalize vector shuffles, in SelectionDAG  
> building, we normalize, and then in Legalization, we convert any of  
> the illegal normalized shuffles to concat, extract sub vectors, etc.   
> Before, legalization would break it down to insert/extracts which we  
> had a hard time rebuilding.   For examples like transposing a vector,  
> this allows us to generate much better code.  Sorry about the confusion!

if I understand right, the changes to LegalizeTypes/LegalizeDAG are
logically independent of the generalization of vector shuffle (and must
be, because this code never sees generalized vector shuffles!): they
would already make sense without the vector shuffle generalization.
Maybe you can break them out of the patch and submit them separately.
For example, the EXTRACT_SUBVECTOR part could go in at once (with the
small cleanups I mentioned), and likewise for the vector shuffle
legalization, after a bit more cleaning/simplifying/reviewing.

Just a thought,

Duncan.


From evan.cheng at apple.com  Wed Nov  5 15:21:46 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 5 Nov 2008 13:21:46 -0800
Subject: [llvm-commits] [llvm] r58626 - in /llvm/trunk/lib/Target/ARM:
	ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.h ARMInstrInfo.td
In-Reply-To: 
References: <200811031838.mA3IcWqw019585@zion.cs.uiuc.edu>
	
	<11542DAB-355C-4414-87BE-13A31708DF6D@apple.com>
	<840F490C-F893-46E0-ADFF-B61BC21677D5@apple.com>
	
	<6361908F-1AFD-4B0A-920F-BA51EB869C48@apple.com>
	
Message-ID: <3609A562-05C0-4062-9B49-724E1207E2E4@apple.com>

Already done as part of 58764.

Evan

On Nov 5, 2008, at 11:53 AM, Jim Grosbach wrote:

> Since you insist, I'll change it.
>
> On Nov 3, 2008, at 2:32 PM, Evan Cheng wrote:
>
>>
>> On Nov 3, 2008, at 2:10 PM, Jim Grosbach wrote:
>>
>>> On Nov 3, 2008, at 12:44 PM, Evan Cheng wrote:
>>>
>>>> Ok. It's not just a naming issue. AddrMode information is used by
>>>> other ARM routines to determine instruction properties. Currently
>>>> AddrMode6 is only used by the code emitter to determine instruction
>>>> encoding. That seems wrong. You should be using instruction format
>>>> bits to determine how to encode these instructions instead. See
>>>>
>>>
>>> The places where the addressing mode is used in the backend are:
>>>
>>>
>>> ARMCodeEmitter::getInstrBinary() - Dispatch routine for instruction
>>> encoding. This is currently based exclusively on AddrMode, and calls
>>> out to a separate function for each one. This is the one place where
>>> we do need to hook in for the new instructions.
>>>
>>>
>>> The instruction format bits are currently used to determine how to
>>> format and encode individual operands within a class of  
>>> instructions.
>>> For example, my intent here is to use that format mask to handle  
>>> bits
>>> 5 and 6 for the SMLAxy, SMLAWy, SULWy, etc. instructions.
>>>
>>> That is, the usage pattern in place is to use the addressing mode
>>> bits
>>> to indicate a class of instructions with common operand schemes,  
>>> then
>>> use the format mask to break down nuances of those encodings. That's
>>> the pattern I've attempted to stay consistent with.
>>
>> Right. We are confusing "addressing mode" with "instruction set
>> encoding scheme". It's a not advisable. It's done this way due to  
>> some
>> legacy code. We got away with it because the all instructions in each
>> address mode happens to be in the same encoding scheme (this is
>> actually not true in addrmode1 case). This ought to be cleaned up  
>> when
>> we have a chance. Please don't contribute to the problem. It's worse
>> if you introduce a new addrmode6  address mode to represent a new
>> encoding scheme. This is really confusing since isn't a address  
>> mode 6
>> in the ARM instruction set.
>>
>>>
>>> It is, of course, technically possible to just hook off from
>>> getAddrModeNoneInstrBinary() based on the format mask entirely. I
>>> chose not to do that for the reasons outlined above.
>>
>> We ought to follow "A3.1 Instruction set encoding" by classifying
>> instructions into the formats listed there. That doesn't have to be
>> done now. But let's not follow the same mistake that's already made.
>> We can leave addr1 to 5 instructions alone for now. For the rest,
>> let's branch off to different encoding functions based on the format
>> mask. This also means we should do away with
>> getAddrModeNoneInstrBinary and introduce getBranchInstrBinary to
>> handle the branch instructions.
>>
>> Evan
>>
>>>
>>>
>>> Do you have a counter-example that demonstrates why this is the  
>>> wrong
>>> approach?
>>>
>>>
>>>>
>>>> // Format specifies the encoding used by the instruction.  This is
>>>> part of the
>>>> // ad-hoc solution used to emit machine instruction encodings by  
>>>> our
>>>> machine
>>>> // code emitter.
>>>> class Format val> {
>>>> bits<5> Value = val;
>>>> }
>>>>
>>>> def Pseudo      : Format<1>;
>>>> def MulFrm      : Format<2>;
>>>> def MulSMLAW    : Format<3>;
>>>>
>>>> Evan
>>>>
>>>>
>>>> On Nov 3, 2008, at 11:41 AM, Jim Grosbach wrote:
>>>>
>>>>> I have no real preference for what name to use. I chose that to be
>>>>> consistent with the other operations doing similar things  
>>>>> (choosing
>>>>> how to encode operands for a class of instructions). If there's an
>>>>> alternative nomenclature that's preferable, that's fine with me.
>>>>>
>>>>>
>>>>> On Nov 3, 2008, at 11:17 AM, Evan Cheng wrote:
>>>>>
>>>>>> Thanks. But is addrmode6 the right name? I don't see ARM manuals
>>>>>> using
>>>>>> that name.
>>>>>>
>>>>>> Evan
>>>>>>
>>>>>> On Nov 3, 2008, at 10:38 AM, Jim Grosbach wrote:
>>>>>>
>>>>>>> Author: grosbach
>>>>>>> Date: Mon Nov  3 12:38:31 2008
>>>>>>> New Revision: 58626
>>>>>>>
>>>>>>> URL: http://llvm.org/viewvc/llvm-project?rev=58626&view=rev
>>>>>>> Log:
>>>>>>> Add binary encoding support for multiply instructions. Some
>>>>>>> blanks
>>>>>>> left to fill in, but the basics are there.
>>>>>>>
>>>>>>> Modified:
>>>>>>> llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
>>>>>>> llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
>>>>>>> llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
>>>>>>> llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
>>>>>>>
>>>>>>> Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
>>>>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58626&r1=58625&r2=58626&view=diff
>>>>>>>
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> = 
>>>>>>> ================================================================
>>>>>>> --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
>>>>>>> +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Mon Nov  3
>>>>>>> 12:38:31
>>>>>>> 2008
>>>>>>> @@ -82,8 +82,8 @@
>>>>>>>                               const TargetInstrDesc &TID,
>>>>>>>                               const MachineOperand &MO);
>>>>>>>
>>>>>>> -    unsigned getAddrMode1SBit(const MachineInstr &MI,
>>>>>>> -                              const TargetInstrDesc &TID)  
>>>>>>> const;
>>>>>>> +    unsigned getAddrModeSBit(const MachineInstr &MI,
>>>>>>> +                             const TargetInstrDesc &TID) const;
>>>>>>>
>>>>>>> unsigned getAddrMode1InstrBinary(const MachineInstr &MI,
>>>>>>>                                const TargetInstrDesc &TID,
>>>>>>> @@ -97,6 +97,9 @@
>>>>>>> unsigned getAddrMode4InstrBinary(const MachineInstr &MI,
>>>>>>>                                const TargetInstrDesc &TID,
>>>>>>>                                unsigned Binary);
>>>>>>> +    unsigned getAddrMode6InstrBinary(const MachineInstr &MI,
>>>>>>> +                                     const TargetInstrDesc  
>>>>>>> &TID,
>>>>>>> +                                     unsigned Binary);
>>>>>>>
>>>>>>> /// getInstrBinary - Return binary encoding for the specified
>>>>>>> /// machine instruction.
>>>>>>> @@ -432,8 +435,8 @@
>>>>>>> return Binary;
>>>>>>> }
>>>>>>>
>>>>>>> -unsigned ARMCodeEmitter::getAddrMode1SBit(const MachineInstr
>>>>>>> &MI,
>>>>>>> -                                          const TargetInstrDesc
>>>>>>> &TID) const {
>>>>>>> +unsigned ARMCodeEmitter::getAddrModeSBit(const MachineInstr  
>>>>>>> &MI,
>>>>>>> +                                         const TargetInstrDesc
>>>>>>> &TID) const {
>>>>>>> for (unsigned i = MI.getNumOperands(), e = TID.getNumOperands();
>>>>>>> i != e; --i){
>>>>>>> const MachineOperand &MO = MI.getOperand(i-1);
>>>>>>> if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR)
>>>>>>> @@ -449,7 +452,7 @@
>>>>>>> Binary |= II->getPredicate(&MI) << 28;
>>>>>>>
>>>>>>> // Encode S bit if MI modifies CPSR.
>>>>>>> -  Binary |= getAddrMode1SBit(MI, TID);
>>>>>>> +  Binary |= getAddrModeSBit(MI, TID);
>>>>>>>
>>>>>>> // Encode register def if there is one.
>>>>>>> unsigned NumDefs = TID.getNumDefs();
>>>>>>> @@ -618,6 +621,33 @@
>>>>>>> return Binary;
>>>>>>> }
>>>>>>>
>>>>>>> +unsigned ARMCodeEmitter::getAddrMode6InstrBinary(const
>>>>>>> MachineInstr
>>>>>>> &MI,
>>>>>>> +                                                 const
>>>>>>> TargetInstrDesc &TID,
>>>>>>> +                                                 unsigned
>>>>>>> Binary) {
>>>>>>> +  // Set the conditional execution predicate
>>>>>>> +  Binary |= II->getPredicate(&MI) << 28;
>>>>>>> +
>>>>>>> +  // Encode S bit if MI modifies CPSR.
>>>>>>> +  Binary |= getAddrModeSBit(MI, TID);
>>>>>>> +
>>>>>>> +  // 32x32->64bit operations have two destination registers.  
>>>>>>> The
>>>>>>> number
>>>>>>> +  // of register definitions will tell us if that's what we're
>>>>>>> dealing with.
>>>>>>> +  int OpIdx = 0;
>>>>>>> +  if (TID.getNumDefs() == 2)
>>>>>>> +    Binary |= getMachineOpValue (MI, OpIdx++) <<
>>>>>>> ARMII::RegRdLoShift;
>>>>>>> +
>>>>>>> +  // Encode Rd
>>>>>>> +  Binary |= getMachineOpValue(MI, OpIdx++) <<
>>>>>>> ARMII::RegRdHiShift;
>>>>>>> +
>>>>>>> +  // Encode Rm
>>>>>>> +  Binary |= getMachineOpValue(MI, OpIdx++);
>>>>>>> +
>>>>>>> +  // Encode Rs
>>>>>>> +  Binary |= getMachineOpValue(MI, OpIdx++) <<  
>>>>>>> ARMII::RegRsShift;
>>>>>>> +
>>>>>>> +  return Binary;
>>>>>>> +}
>>>>>>> +
>>>>>>> /// getInstrBinary - Return binary encoding for the specified
>>>>>>> /// machine instruction.
>>>>>>> unsigned ARMCodeEmitter::getInstrBinary(const MachineInstr  
>>>>>>> &MI) {
>>>>>>> @@ -636,6 +666,8 @@
>>>>>>> return getAddrMode3InstrBinary(MI, TID, Binary);
>>>>>>> case ARMII::AddrMode4:
>>>>>>> return getAddrMode4InstrBinary(MI, TID, Binary);
>>>>>>> +  case ARMII::AddrMode6:
>>>>>>> +    return getAddrMode6InstrBinary(MI, TID, Binary);
>>>>>>> }
>>>>>>>
>>>>>>> abort();
>>>>>>>
>>>>>>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
>>>>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58626&r1=58625&r2=58626&view=diff
>>>>>>>
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> = 
>>>>>>> ================================================================
>>>>>>> --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
>>>>>>> +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Mon Nov  3
>>>>>>> 12:38:31
>>>>>>> 2008
>>>>>>> @@ -659,6 +659,28 @@
>>>>>>> let Inst{27-25} = 0b100;
>>>>>>> }
>>>>>>>
>>>>>>> +// addrmode6
>>>>>>> +// Unsigned multiply, multiply-accumulate instructions.
>>>>>>> +class AI6 opcod, dag oops, dag iops, Format f, string
>>>>>>> opc,
>>>>>>> +         string asm, list pattern>
>>>>>>> +  : I>>>>>> f,
>>>>>>> opc,
>>>>>>> +      asm,"",pattern>
>>>>>>> +{
>>>>>>> +  // FIXME: bits 7-4 should be a sub-mode (for SMLAxx,
>>>>>>> SMLAWy, ...)
>>>>>>> +  let Inst{7-4}   = 0b1001;
>>>>>>> +  let Inst{27-24} = 0b0000;
>>>>>>> +  let Inst{23-20} = opcod;
>>>>>>> +}
>>>>>>> +class AsI6 opcod, dag oops, dag iops, Format f, string
>>>>>>> opc,
>>>>>>> +          string asm, list pattern>
>>>>>>> +  : sI>>>>>> f,
>>>>>>> opc,
>>>>>>> +       asm,"",pattern>
>>>>>>> +{
>>>>>>> +  // FIXME: bits 7-4 should be a sub-mode (for SMLAxx,
>>>>>>> SMLAWy, ...)
>>>>>>> +  let Inst{7-4}   = 0b1001;
>>>>>>> +  let Inst{27-24} = 0b0000;
>>>>>>> +  let Inst{23-20} = opcod;
>>>>>>> +}
>>>>>>>
>>>>>>> //
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> ----------------------------------------------------------------------=
>>>>>>> ==//
>>>>>>>
>>>>>>>
>>>>>>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
>>>>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=58626&r1=58625&r2=58626&view=diff
>>>>>>>
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> = 
>>>>>>> ================================================================
>>>>>>> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original)
>>>>>>> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Mon Nov  3 12:38:31
>>>>>>> 2008
>>>>>>> @@ -30,8 +30,7 @@
>>>>>>> // Instruction Flags.
>>>>>>>
>>>>>>> //
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> ------------------------------------------------------------------
>>>>>>> ===//
>>>>>>> -    // This three-bit field describes the addressing mode used.
>>>>>>> Zero is unused
>>>>>>> -    // so that we can tell if we forgot to set a value.
>>>>>>> +    // This four-bit field describes the addressing mode used.
>>>>>>>
>>>>>>> AddrModeMask  = 0xf,
>>>>>>> AddrModeNone  = 0,
>>>>>>> @@ -40,10 +39,11 @@
>>>>>>> AddrMode3     = 3,
>>>>>>> AddrMode4     = 4,
>>>>>>> AddrMode5     = 5,
>>>>>>> -    AddrModeT1    = 6,
>>>>>>> -    AddrModeT2    = 7,
>>>>>>> -    AddrModeT4    = 8,
>>>>>>> -    AddrModeTs    = 9,   // i8 * 4 for pc and sp relative data
>>>>>>> +    AddrMode6     = 6,
>>>>>>> +    AddrModeT1    = 7,
>>>>>>> +    AddrModeT2    = 8,
>>>>>>> +    AddrModeT4    = 9,
>>>>>>> +    AddrModeTs    = 10,  // i8 * 4 for pc and sp relative data
>>>>>>>
>>>>>>> // Size* - Flags to keep track of the size of an instruction.
>>>>>>> SizeShift     = 4,
>>>>>>> @@ -115,15 +115,17 @@
>>>>>>>
>>>>>>> // Field shifts - such shifts are used to set field while
>>>>>>> generating
>>>>>>> // machine instructions.
>>>>>>> -    RotImmShift = 8,
>>>>>>> -    RegRsShift  = 8,
>>>>>>> -    RegRdShift  = 12,
>>>>>>> -    RegRnShift  = 16,
>>>>>>> -    L_BitShift  = 20,
>>>>>>> -    S_BitShift  = 20,
>>>>>>> -    U_BitShift  = 23,
>>>>>>> -    IndexShift  = 24,
>>>>>>> -    I_BitShift  = 25
>>>>>>> +    RotImmShift  = 8,
>>>>>>> +    RegRsShift   = 8,
>>>>>>> +    RegRdLoShift = 12,
>>>>>>> +    RegRdShift   = 12,
>>>>>>> +    RegRdHiShift = 16,
>>>>>>> +    RegRnShift   = 16,
>>>>>>> +    L_BitShift   = 20,
>>>>>>> +    S_BitShift   = 20,
>>>>>>> +    U_BitShift   = 23,
>>>>>>> +    IndexShift   = 24,
>>>>>>> +    I_BitShift   = 25
>>>>>>> };
>>>>>>> }
>>>>>>>
>>>>>>>
>>>>>>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
>>>>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58626&r1=58625&r2=58626&view=diff
>>>>>>>
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> =
>>>>>>> = 
>>>>>>> ================================================================
>>>>>>> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
>>>>>>> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Nov  3  
>>>>>>> 12:38:31
>>>>>>> 2008
>>>>>>> @@ -310,10 +310,11 @@
>>>>>>> def AddrMode3    : AddrMode<3>;
>>>>>>> def AddrMode4    : AddrMode<4>;
>>>>>>> def AddrMode5    : AddrMode<5>;
>>>>>>> -def AddrModeT1   : AddrMode<6>;
>>>>>>> -def AddrModeT2   : AddrMode<7>;
>>>>>>> -def AddrModeT4   : AddrMode<8>;
>>>>>>> -def AddrModeTs   : AddrMode<9>;
>>>>>>> +def AddrMode6    : AddrMode<6>;
>>>>>>> +def AddrModeT1   : AddrMode<7>;
>>>>>>> +def AddrModeT2   : AddrMode<8>;
>>>>>>> +def AddrModeT4   : AddrMode<9>;
>>>>>>> +def AddrModeTs   : AddrMode<10>;
>>>>>>>
>>>>>>> // Instruction size.
>>>>>>> class SizeFlagVal val> {
>>>>>>> @@ -910,49 +911,53 @@
>>>>>>> //  Multiply Instructions.
>>>>>>> //
>>>>>>>
>>>>>>> -def MUL  : AsI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
>>>>>>> MulFrm,
>>>>>>> -               "mul", " $dst, $a, $b",
>>>>>>> -               [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>;
>>>>>>> -
>>>>>>> -def MLA  : AsI<0x2, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:
>>>>>>> $c),
>>>>>>> -               MulFrm, "mla", " $dst, $a, $b, $c",
>>>>>>> -               [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR:
>>>>>>> $c))]>;
>>>>>>> +def MUL   : AsI6<0b0000, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
>>>>>>> MulFrm,
>>>>>>> +                 "mul", " $dst, $a, $b",
>>>>>>> +                 [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>;
>>>>>>> +
>>>>>>> +def MLA   : AsI6<0b0010, (outs GPR:$dst), (ins GPR:$a, GPR:$b,
>>>>>>> GPR:
>>>>>>> $c),
>>>>>>> +                 MulFrm, "mla", " $dst, $a, $b, $c",
>>>>>>> +                 [(set GPR:$dst, (add (mul GPR:$a, GPR:$b),  
>>>>>>> GPR:
>>>>>>> $c))]>;
>>>>>>>
>>>>>>> // Extra precision multiplies with low / high results
>>>>>>> -def SMULL : AsI<0xC, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a,
>>>>>>> GPR:
>>>>>>> $b),
>>>>>>> -                MulFrm, "smull", " $ldst, $hdst, $a, $b", []>;
>>>>>>> +def SMULL : AsI6<0b1100, (outs GPR:$ldst, GPR:$hdst), (ins GPR:
>>>>>>> $a,
>>>>>>> GPR:$b),
>>>>>>> +                 MulFrm, "smull", " $ldst, $hdst, $a, $b", []>;
>>>>>>>
>>>>>>> -def UMULL : AsI<0x8, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a,
>>>>>>> GPR:
>>>>>>> $b),
>>>>>>> -                MulFrm, "umull", " $ldst, $hdst, $a, $b", []>;
>>>>>>> +def UMULL : AsI6<0b1000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:
>>>>>>> $a,
>>>>>>> GPR:$b),
>>>>>>> +                 MulFrm, "umull", " $ldst, $hdst, $a, $b", []>;
>>>>>>>
>>>>>>> // Multiply + accumulate
>>>>>>> -def SMLAL : AsI<0xE, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a,
>>>>>>> GPR:
>>>>>>> $b),
>>>>>>> -                MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>;
>>>>>>> +def SMLAL : AsI6<0b1110, (outs GPR:$ldst, GPR:$hdst), (ins GPR:
>>>>>>> $a,
>>>>>>> GPR:$b),
>>>>>>> +                 MulFrm, "smlal", " $ldst, $hdst, $a, $b", []>;
>>>>>>>
>>>>>>> -def UMLAL : AsI<0xA, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a,
>>>>>>> GPR:
>>>>>>> $b),
>>>>>>> -                MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>;
>>>>>>> +def UMLAL : AsI6<0b1010, (outs GPR:$ldst, GPR:$hdst), (ins GPR:
>>>>>>> $a,
>>>>>>> GPR:$b),
>>>>>>> +                 MulFrm, "umlal", " $ldst, $hdst, $a, $b", []>;
>>>>>>>
>>>>>>> -def UMAAL : AI<0x0, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a,
>>>>>>> GPR:
>>>>>>> $b), MulFrm,
>>>>>>> -               "umaal", " $ldst, $hdst, $a, $b", []>,
>>>>>>> -            Requires<[IsARM, HasV6]>;
>>>>>>> +def UMAAL : AI6 <0b0000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:
>>>>>>> $a,
>>>>>>> GPR:$b),
>>>>>>> +                 MulFrm, "umaal", " $ldst, $hdst, $a, $b", []>,
>>>>>>> +                 Requires<[IsARM, HasV6]>;
>>>>>>>
>>>>>>> // Most significant word multiply
>>>>>>> +// FIXME: encoding
>>>>>>> def SMMUL : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
>>>>>>> MulFrm,
>>>>>>>          "smmul", " $dst, $a, $b",
>>>>>>>          [(set GPR:$dst, (mulhs GPR:$a, GPR:$b))]>,
>>>>>>>       Requires<[IsARM, HasV6]>;
>>>>>>>
>>>>>>> +// FIXME: encoding
>>>>>>> def SMMLA : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:
>>>>>>> $c),
>>>>>>> MulFrm,
>>>>>>>          "smmla", " $dst, $a, $b, $c",
>>>>>>>          [(set GPR:$dst, (add (mulhs GPR:$a, GPR:$b), GPR:
>>>>>>> $c))]>,
>>>>>>>       Requires<[IsARM, HasV6]>;
>>>>>>>
>>>>>>>
>>>>>>> +// FIXME: encoding
>>>>>>> def SMMLS : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:
>>>>>>> $c),
>>>>>>> MulFrm,
>>>>>>>          "smmls", " $dst, $a, $b, $c",
>>>>>>>          [(set GPR:$dst, (sub GPR:$c, (mulhs GPR:$a, GPR:
>>>>>>> $b)))]>,
>>>>>>>          Requires<[IsARM, HasV6]>;
>>>>>>>
>>>>>>> +// FIXME: encoding
>>>>>>> multiclass AI_smul {
>>>>>>> def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL,
>>>>>>>         !strconcat(opc, "bb"), " $dst, $a, $b",
>>>>>>> @@ -992,6 +997,7 @@
>>>>>>> }
>>>>>>>
>>>>>>>
>>>>>>> +// FIXME: encoding
>>>>>>> multiclass AI_smla {
>>>>>>> def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR: 
>>>>>>> $acc),
>>>>>>> MulSMLA,
>>>>>>>         !strconcat(opc, "bb"), " $dst, $a, $b, $acc",
>>>>>>> @@ -1031,7 +1037,9 @@
>>>>>>>       Requires<[IsARM, HasV5TE]>;
>>>>>>> }
>>>>>>>
>>>>>>> +// FIXME: encoding
>>>>>>> defm SMUL : AI_smul<"smul", BinOpFrag<(mul node:$LHS, node:
>>>>>>> $RHS)>>;
>>>>>>> +// FIXME: encoding
>>>>>>> defm SMLA : AI_smla<"smla", BinOpFrag<(mul node:$LHS, node:
>>>>>>> $RHS)>>;
>>>>>>>
>>>>>>> // TODO: Halfword multiple accumulate long: SMLAL
>>>>>>>
>>>>>>>
>>>>>>> _______________________________________________
>>>>>>> llvm-commits mailing list
>>>>>>> llvm-commits at cs.uiuc.edu
>>>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>>>>
>>>>>> _______________________________________________
>>>>>> llvm-commits mailing list
>>>>>> llvm-commits at cs.uiuc.edu
>>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>>>
>>>>> _______________________________________________
>>>>> llvm-commits mailing list
>>>>> llvm-commits at cs.uiuc.edu
>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>>
>>>> _______________________________________________
>>>> llvm-commits mailing list
>>>> llvm-commits at cs.uiuc.edu
>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>
>>> _______________________________________________
>>> llvm-commits mailing list
>>> llvm-commits at cs.uiuc.edu
>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

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From isanbard at gmail.com  Wed Nov  5 15:28:39 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 05 Nov 2008 21:28:39 -0000
Subject: [llvm-commits] [test-suite] r58768 -
	/test-suite/trunk/Makefile.programs
Message-ID: <200811052128.mA5LSdfj016639@zion.cs.uiuc.edu>

Author: void
Date: Wed Nov  5 15:28:38 2008
New Revision: 58768

URL: http://llvm.org/viewvc/llvm-project?rev=58768&view=rev
Log:
Update flag with new syntax.

Modified:
    test-suite/trunk/Makefile.programs

Modified: test-suite/trunk/Makefile.programs
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=58768&r1=58767&r2=58768&view=diff

==============================================================================
--- test-suite/trunk/Makefile.programs (original)
+++ test-suite/trunk/Makefile.programs Wed Nov  5 15:28:38 2008
@@ -232,7 +232,7 @@
 endif
 ifeq ($(ARCH),x86)
 ifeq ($(OS),Darwin)
-LLCBETAOPTION := -enable-stack-protector=2
+LLCBETAOPTION := -enable-stack-protector=all
 else
 LLCBETAOPTION := -fast-isel
 endif




From kremenek at apple.com  Wed Nov  5 16:18:23 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Wed, 05 Nov 2008 22:18:23 -0000
Subject: [llvm-commits] [llvm] r58773 - /llvm/tags/checker/checker-123/
Message-ID: <200811052218.mA5MINfi018131@zion.cs.uiuc.edu>

Author: kremenek
Date: Wed Nov  5 16:18:22 2008
New Revision: 58773

URL: http://llvm.org/viewvc/llvm-project?rev=58773&view=rev
Log:
Tagging checker-123.

Added:
    llvm/tags/checker/checker-123/
      - copied from r58772, llvm/trunk/



From wangmp at apple.com  Wed Nov  5 16:37:42 2008
From: wangmp at apple.com (Mon Ping Wang)
Date: Wed, 5 Nov 2008 14:37:42 -0800
Subject: [llvm-commits] Patch: generalize vector shuffle
In-Reply-To: <200811052142.15627.duncan.sands@math.u-psud.fr>
References: <7C812DE7-E002-4767-A0AE-192738C25237@apple.com>
	<200811051825.21127.duncan.sands@math.u-psud.fr>
	<3F809D20-B3C9-4A91-A907-788673A90809@apple.com>
	<200811052142.15627.duncan.sands@math.u-psud.fr>
Message-ID: <79D867D7-9AA7-4B9A-AF4C-CD7DC36C1B1C@apple.com>

Hi Duncan,

On Nov 5, 2008, at 12:42 PM, Duncan Sands wrote:

> Hi Mon Ping,
>
>>>> +//===---- LegalizeTypesUtils.cpp - Utilities for Legalization of
>>>> types
>>>
>>> Why not only do it in LegalizeTypes?
>>
>> Are you asking why these utilities are not part of LegalizeTypes
>> instead of placing them in their own class?  If so, LegalizeDAG would
>> need access to the utility...
>
> why does LegalizeDAG need access to this at all?  At some point I'm
> going to start removing all type legalization code from LegalizeDAG.
> Not quite yet, I admit!  However is there really much point in adding
> new type legalization code to LegalizeDAG?

My understanding is that LegalizeType is optional so I wanted to be  
able to turn on and off LegalizeType and get the same code coming out  
as some people might turn off LegalizeType.  I do see your point that  
if LegalizeType is going to be required soon, it seems silly to add  
functionality to LegalizeDAG and then rip it out again.  What I'll do  
is wait to checkin the LegalizeDAG changes until I see a real need for  
them for what we are doing and just checkin the code for LegalizeTypes.

>> The changes in LegalizesTypes are needed to take advantage of
>> generalized the vector shuffle.   I should have copied my original
>> email for the patch to this last patch as an introduction.   With
>> these changes, we try to keep as much as the original vector program
>> (after optimization) structure all the way to the backend.  The
>> incoming program uses generalize vector shuffles, in SelectionDAG
>> building, we normalize, and then in Legalization, we convert any of
>> the illegal normalized shuffles to concat, extract sub vectors, etc.
>> Before, legalization would break it down to insert/extracts which we
>> had a hard time rebuilding.   For examples like transposing a vector,
>> this allows us to generate much better code.  Sorry about the  
>> confusion!
>
> if I understand right, the changes to LegalizeTypes/LegalizeDAG are
> logically independent of the generalization of vector shuffle (and  
> must
> be, because this code never sees generalized vector shuffles!): they
> would already make sense without the vector shuffle generalization.
> Maybe you can break them out of the patch and submit them separately.
> For example, the EXTRACT_SUBVECTOR part could go in at once (with the
> small cleanups I mentioned), and likewise for the vector shuffle
> legalization, after a bit more cleaning/simplifying/reviewing.

I don't have a problem of breaking it into two patches if they will be  
easier for people to digest.  The two patches will follow relatively  
quickly one after the other though (after another review for the  
shuffle one of course :-).

> Just a thought,
>
> Duncan.

-- Mon Ping


From alenhar2 at cs.uiuc.edu  Wed Nov  5 16:42:51 2008
From: alenhar2 at cs.uiuc.edu (Andrew Lenharth)
Date: Wed, 05 Nov 2008 22:42:51 -0000
Subject: [llvm-commits] [llvm] r58775 -
	/llvm/trunk/include/llvm/LinkAllVMCore.h
Message-ID: <200811052242.mA5MgpQp018864@zion.cs.uiuc.edu>

Author: alenhar2
Date: Wed Nov  5 16:42:50 2008
New Revision: 58775

URL: http://llvm.org/viewvc/llvm-project?rev=58775&view=rev
Log:
opt was not exporting the Mangler symbols

Modified:
    llvm/trunk/include/llvm/LinkAllVMCore.h

Modified: llvm/trunk/include/llvm/LinkAllVMCore.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LinkAllVMCore.h?rev=58775&r1=58774&r2=58775&view=diff

==============================================================================
--- llvm/trunk/include/llvm/LinkAllVMCore.h (original)
+++ llvm/trunk/include/llvm/LinkAllVMCore.h Wed Nov  5 16:42:50 2008
@@ -44,9 +44,10 @@
       // to know that getenv() never returns -1, this will do the job.
       if (std::getenv("bar") != (char*) -1)
         return;
-      (void)new llvm::Module("");
+      llvm::Module* M = new llvm::Module("");
       (void)new llvm::UnreachableInst();
       (void)    llvm::createVerifierPass(); 
+      (void) new llvm::Mangler(*M,"");
     }
   } ForceVMCoreLinking;
 }




From gohman at apple.com  Wed Nov  5 16:56:48 2008
From: gohman at apple.com (Dan Gohman)
Date: Wed, 05 Nov 2008 22:56:48 -0000
Subject: [llvm-commits] [llvm] r58777 - in /llvm/trunk:
 include/llvm/CodeGen/DAGISelHeader.h test/CodeGen/PowerPC/delete-node.ll
Message-ID: <200811052256.mA5MumnP019671@zion.cs.uiuc.edu>

Author: djg
Date: Wed Nov  5 16:56:47 2008
New Revision: 58777

URL: http://llvm.org/viewvc/llvm-project?rev=58777&view=rev
Log:
Make ISel ignore dead nodes. The DAGCombiner normally eliminates
dead nodes, but in this case its missing one. Fixing the DAGCombiner
is desirable, but it's somewhat involved.

Added:
    llvm/trunk/test/CodeGen/PowerPC/delete-node.ll
Modified:
    llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h

Modified: llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h?rev=58777&r1=58776&r2=58777&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h (original)
+++ llvm/trunk/include/llvm/CodeGen/DAGISelHeader.h Wed Nov  5 16:56:47 2008
@@ -108,6 +108,11 @@
   // node).
   while (ISelPosition != CurDAG->allnodes_begin()) {
     SDNode *Node = --ISelPosition;
+    // Skip dead nodes. DAGCombiner is expected to eliminate all dead nodes,
+    // but there are currently some corner cases that it misses. Also, this
+    // makes it theoretically possible to disable the DAGCombiner.
+    if (Node->use_empty())
+      continue;
 #if 0
     DAG.setSubgraphColor(Node, "red");
 #endif

Added: llvm/trunk/test/CodeGen/PowerPC/delete-node.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/delete-node.ll?rev=58777&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/delete-node.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/delete-node.ll Wed Nov  5 16:56:47 2008
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llc -march=ppc32
+
+; The DAGCombiner leaves behind a dead node in this testcase. Currently
+; ISel is ignoring dead nodes, though it would be preferable for
+; DAGCombiner to be able to eliminate the dead node.
+
+define void @GrayATo32ARGBTabB(i8* %baseAddr, i16** %cmp, i32 %rowBytes) nounwind {
+entry:
+      	br label %bb1
+
+bb1:            ; preds = %bb1, %entry
+        %0 = load i16* null, align 2            ;  [#uses=1]
+        %1 = ashr i16 %0, 4             ;  [#uses=1]
+        %2 = sext i16 %1 to i32         ;  [#uses=1]
+        %3 = getelementptr i8* null, i32 %2             ;  [#uses=1]
+        %4 = load i8* %3, align 1               ;  [#uses=1]
+        %5 = zext i8 %4 to i32          ;  [#uses=1]
+        %6 = shl i32 %5, 24             ;  [#uses=1]
+        %7 = or i32 0, %6               ;  [#uses=1]
+        store i32 %7, i32* null, align 4
+        br label %bb1
+}




From evan.cheng at apple.com  Wed Nov  5 17:21:12 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 05 Nov 2008 23:21:12 -0000
Subject: [llvm-commits] [llvm] r58778 -
	/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
Message-ID: <200811052321.mA5NLC13020823@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Nov  5 17:21:11 2008
New Revision: 58778

URL: http://llvm.org/viewvc/llvm-project?rev=58778&view=rev
Log:
Remove debug output that's not really useful.

Modified:
    llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp

Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp?rev=58778&r1=58777&r2=58778&view=diff

==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Wed Nov  5 17:21:11 2008
@@ -954,22 +954,9 @@
   MemMgr->setMemoryExecutable();
 
 #ifndef NDEBUG
-  {
-  DOUT << std::hex;
-  int i;
-  unsigned char* q = FnStart;
-  for (i=1; q!=FnEnd; q++, i++) {
-    if (i%8==1)
-      DOUT << "0x" << (long)q << ": ";
-    DOUT<< (unsigned short)*q << " ";
-    if (i%8==0)
-      DOUT<<"\n";
-  }
-  DOUT << std::dec;
   if (sys::hasDisassembler())
     DOUT << "Disassembled code:\n"
          << sys::disassembleBuffer(FnStart, FnEnd-FnStart, (uintptr_t)FnStart);
-  }
 #endif
   if (ExceptionHandling) {
     uintptr_t ActualSize = 0;




From evan.cheng at apple.com  Wed Nov  5 17:21:52 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 05 Nov 2008 23:21:52 -0000
Subject: [llvm-commits] [llvm] r58779 - /llvm/trunk/tools/lli/lli.cpp
Message-ID: <200811052321.mA5NLqXF020855@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Nov  5 17:21:52 2008
New Revision: 58779

URL: http://llvm.org/viewvc/llvm-project?rev=58779&view=rev
Log:
Add command line option -entry-funcion to override entry function (default is main).

Modified:
    llvm/trunk/tools/lli/lli.cpp

Modified: llvm/trunk/tools/lli/lli.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lli/lli.cpp?rev=58779&r1=58778&r2=58779&view=diff

==============================================================================
--- llvm/trunk/tools/lli/lli.cpp (original)
+++ llvm/trunk/tools/lli/lli.cpp Wed Nov  5 17:21:52 2008
@@ -49,6 +49,13 @@
 
   cl::opt
   TargetTriple("mtriple", cl::desc("Override target triple for module"));
+
+  cl::opt
+  EntryFunc("entry-function",
+            cl::desc("Specify the entry function (default = 'main') "
+                     "of the executable"),
+            cl::value_desc("function"),
+            cl::init("main"));
   
   cl::opt
   FakeArgv0("fake-argv0",
@@ -140,9 +147,9 @@
   // using the contents of Args to determine argc & argv, and the contents of
   // EnvVars to determine envp.
   //
-  Function *MainFn = Mod->getFunction("main");
-  if (!MainFn) {
-    std::cerr << "'main' function not found in module.\n";
+  Function *EntryFn = Mod->getFunction(EntryFunc);
+  if (!EntryFn) {
+    std::cerr << '\'' << EntryFunc << "\' function not found in module.\n";
     return -1;
   }
 
@@ -160,13 +167,13 @@
   if (NoLazyCompilation) {
     for (Module::iterator I = Mod->begin(), E = Mod->end(); I != E; ++I) {
       Function *Fn = &*I;
-      if (Fn != MainFn && !Fn->isDeclaration())
+      if (Fn != EntryFn && !Fn->isDeclaration())
         EE->getPointerToFunction(Fn);
     }
   }
 
   // Run main.
-  int Result = EE->runFunctionAsMain(MainFn, InputArgv, envp);
+  int Result = EE->runFunctionAsMain(EntryFn, InputArgv, envp);
 
   // Run static destructors.
   EE->runStaticConstructorsDestructors(true);




From evan.cheng at apple.com  Wed Nov  5 17:22:35 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 05 Nov 2008 23:22:35 -0000
Subject: [llvm-commits] [llvm] r58780 - in /llvm/trunk/lib/Target/ARM:
 ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.td
Message-ID: <200811052322.mA5NMZnt020892@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Nov  5 17:22:34 2008
New Revision: 58780

URL: http://llvm.org/viewvc/llvm-project?rev=58780&view=rev
Log:
Encode pic load / store instructions; fix some encoding bugs.

Modified:
    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58780&r1=58779&r2=58780&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Wed Nov  5 17:22:34 2008
@@ -65,8 +65,12 @@
 
   private:
 
+    void emitWordLE(unsigned Binary);
+
     void emitConstPoolInstruction(const MachineInstr &MI);
 
+    void addPCLabel(unsigned LabelID);
+
     void emitPseudoInstruction(const MachineInstr &MI);
 
     unsigned getMachineSoRegOpValue(const MachineInstr &MI,
@@ -81,11 +85,14 @@
     unsigned getAddrModeSBit(const MachineInstr &MI,
                              const TargetInstrDesc &TID) const;
 
-    void emitDataProcessingInstruction(const MachineInstr &MI);
+    void emitDataProcessingInstruction(const MachineInstr &MI,
+                                       unsigned ImplicitRn = 0);
 
-    void emitLoadStoreInstruction(const MachineInstr &MI);
+    void emitLoadStoreInstruction(const MachineInstr &MI,
+                                  unsigned ImplicitRn = 0);
 
-    void emitMiscLoadStoreInstruction(const MachineInstr &MI);
+    void emitMiscLoadStoreInstruction(const MachineInstr &MI,
+                                      unsigned ImplicitRn = 0);
 
     void emitLoadStoreMultipleInstruction(const MachineInstr &MI);
 
@@ -114,9 +121,9 @@
       return (TID.TSFlags & ARMII::OpcodeMask) >> ARMII::OpcodeShift;
     }
 
-    /// getShiftOp - Return the shift opcode (bit[6:5]) of the machine operand.
+    /// getShiftOp - Return the shift opcode (bit[6:5]) of the immediate value.
     ///
-    unsigned getShiftOp(const MachineOperand &MO) const ;
+    unsigned getShiftOp(unsigned Imm) const ;
 
     /// Routines that handle operands which add machine relocations which are
     /// fixed up by the JIT fixup stage.
@@ -165,10 +172,10 @@
   return false;
 }
 
-/// getShiftOp - Return the shift opcode (bit[6:5]) of the machine operand.
+/// getShiftOp - Return the shift opcode (bit[6:5]) of the immediate value.
 ///
-unsigned ARMCodeEmitter::getShiftOp(const MachineOperand &MO) const {
-  switch (ARM_AM::getAM2ShiftOpc(MO.getImm())) {
+unsigned ARMCodeEmitter::getShiftOp(unsigned Imm) const {
+  switch (ARM_AM::getAM2ShiftOpc(Imm)) {
   default: assert(0 && "Unknown shift opc!");
   case ARM_AM::asr: return 2;
   case ARM_AM::lsl: return 0;
@@ -246,6 +253,11 @@
                                              ARM::reloc_arm_branch, BB));
 }
 
+void ARMCodeEmitter::emitWordLE(unsigned Binary) {
+  DOUT << "\t" << (void*)Binary << "\n";
+  MCE.emitWordLE(Binary);
+}
+
 void ARMCodeEmitter::emitInstruction(const MachineInstr &MI) {
   DOUT << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << MI;
 
@@ -312,7 +324,7 @@
       assert(!ACPV->isNonLazyPointer() && "Don't know how to deal this yet!");
       emitExternalSymbolAddress(ACPV->getSymbol(), ARM::reloc_arm_absolute);
     }
-    MCE.emitWordLE(0);
+    emitWordLE(0);
   } else {
     Constant *CV = MCPE.Val.ConstVal;
 
@@ -321,17 +333,23 @@
 
     if (GlobalValue *GV = dyn_cast(CV)) {
       emitGlobalAddress(GV, ARM::reloc_arm_absolute, false);
-      MCE.emitWordLE(0);
+      emitWordLE(0);
     } else {
       assert(CV->getType()->isInteger() &&
              "Not expecting non-integer constpool entries yet!");
       const ConstantInt *CI = dyn_cast(CV);
       uint32_t Val = *(uint32_t*)CI->getValue().getRawData();
-      MCE.emitWordLE(Val);
+      emitWordLE(Val);
     }
   }
 }
 
+void ARMCodeEmitter::addPCLabel(unsigned LabelID) {
+  DOUT << "\t** LPC" << LabelID << " @ "
+       << (void*)MCE.getCurrentPCValue() << '\n';
+  JTI->addPCLabelAddr(LabelID, MCE.getCurrentPCValue());
+}
+
 void ARMCodeEmitter::emitPseudoInstruction(const MachineInstr &MI) {
   unsigned Opcode = MI.getDesc().Opcode;
   switch (Opcode) {
@@ -342,13 +360,29 @@
     break;
   case ARM::PICADD: {
     // Remember of the address of the PC label for relocation later.
-    const MachineOperand &MO2 = MI.getOperand(2);
-    DOUT << "\t** LPC" << MO2.getImm() << " @ "
-         << (void*)MCE.getCurrentPCValue() << '\n';
-    JTI->addPCLabelAddr(MO2.getImm(), MCE.getCurrentPCValue());
-
+    addPCLabel(MI.getOperand(2).getImm());
     // PICADD is just an add instruction that implicitly read pc.
-    emitDataProcessingInstruction(MI);
+    emitDataProcessingInstruction(MI, ARM::PC);
+    break;
+  }
+  case ARM::PICLDR:
+  case ARM::PICLDRB:
+  case ARM::PICSTR:
+  case ARM::PICSTRB: {
+    // Remember of the address of the PC label for relocation later.
+    addPCLabel(MI.getOperand(2).getImm());
+    // These are just load / store instructions that implicitly read pc.
+    emitLoadStoreInstruction(MI, ARM::PC);
+    break;
+  }
+  case ARM::PICLDRH:
+  case ARM::PICLDRSH:
+  case ARM::PICLDRSB:
+  case ARM::PICSTRH: {
+    // Remember of the address of the PC label for relocation later.
+    addPCLabel(MI.getOperand(2).getImm());
+    // These are just load / store instructions that implicitly read pc.
+    emitMiscLoadStoreInstruction(MI, ARM::PC);
     break;
   }
   }
@@ -434,7 +468,8 @@
   return 0;
 }
 
-void ARMCodeEmitter::emitDataProcessingInstruction(const MachineInstr &MI) {
+void ARMCodeEmitter::emitDataProcessingInstruction(const MachineInstr &MI,
+                                                   unsigned ImplicitRn) {
   const TargetInstrDesc &TID = MI.getDesc();
   if (TID.getOpcode() == ARM::MOVi2pieces)
     abort(); // FIXME
@@ -459,9 +494,9 @@
   // Encode first non-shifter register operand if there is one.
   bool isUnary = TID.TSFlags & ARMII::UnaryDP;
   if (!isUnary) {
-    if (TID.getOpcode() == ARM::PICADD)
-      // Special handling for PICADD. It implicitly uses PC register.
-      Binary |= (ARMRegisterInfo::getRegisterNumbering(ARM::PC)
+    if (ImplicitRn)
+      // Special handling for implicit use (e.g. PC).
+      Binary |= (ARMRegisterInfo::getRegisterNumbering(ImplicitRn)
                  << ARMII::RegRnShift);
     else {
       Binary |= getMachineOpValue(MI, OpIdx) << ARMII::RegRnShift;
@@ -473,13 +508,13 @@
   const MachineOperand &MO = MI.getOperand(OpIdx);
   if ((TID.TSFlags & ARMII::FormMask) == ARMII::DPSoRegFrm) {
     // Encode SoReg.
-    MCE.emitWordLE(Binary | getMachineSoRegOpValue(MI, TID, MO, OpIdx));
+    emitWordLE(Binary | getMachineSoRegOpValue(MI, TID, MO, OpIdx));
     return;
   }
 
   if (MO.isReg()) {
     // Encode register Rm.
-    MCE.emitWordLE(Binary | ARMRegisterInfo::getRegisterNumbering(MO.getReg()));
+    emitWordLE(Binary | ARMRegisterInfo::getRegisterNumbering(MO.getReg()));
     return;
   }
 
@@ -488,10 +523,11 @@
   Binary |= 1 << ARMII::I_BitShift;
   Binary |= getMachineSoImmOpValue(MI, TID, MO);
 
-  MCE.emitWordLE(Binary);
+  emitWordLE(Binary);
 }
 
-void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI) {
+void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI,
+                                              unsigned ImplicitRn) {
   const TargetInstrDesc &TID = MI.getDesc();
 
   // Part of binary is determined by TableGn.
@@ -504,19 +540,28 @@
   Binary |= getMachineOpValue(MI, 0) << ARMII::RegRdShift;
 
   // Set second operand
-  Binary |= getMachineOpValue(MI, 1) << ARMII::RegRnShift;
+  unsigned OpIdx = 1;
+  if (ImplicitRn)
+    // Special handling for implicit use (e.g. PC).
+    Binary |= (ARMRegisterInfo::getRegisterNumbering(ImplicitRn)
+               << ARMII::RegRnShift);
+  else {
+    Binary |= getMachineOpValue(MI, OpIdx) << ARMII::RegRnShift;
+    ++OpIdx;
+  }
 
-  const MachineOperand &MO2 = MI.getOperand(2);
-  const MachineOperand &MO3 = MI.getOperand(3);
+  const MachineOperand &MO2 = MI.getOperand(OpIdx);
+  unsigned AM2Opc = (OpIdx == TID.getNumOperands())
+    ? 0 : MI.getOperand(OpIdx+1).getImm();
 
   // Set bit U(23) according to sign of immed value (positive or negative).
-  Binary |= ((ARM_AM::getAM2Op(MO3.getImm()) == ARM_AM::add ? 1 : 0) <<
+  Binary |= ((ARM_AM::getAM2Op(AM2Opc) == ARM_AM::add ? 1 : 0) <<
              ARMII::U_BitShift);
   if (!MO2.getReg()) { // is immediate
-    if (ARM_AM::getAM2Offset(MO3.getImm()))
+    if (ARM_AM::getAM2Offset(AM2Opc))
       // Set the value of offset_12 field
-      Binary |= ARM_AM::getAM2Offset(MO3.getImm());
-    MCE.emitWordLE(Binary);
+      Binary |= ARM_AM::getAM2Offset(AM2Opc);
+    emitWordLE(Binary);
     return;
   }
 
@@ -528,15 +573,16 @@
 
   // if this instr is in scaled register offset/index instruction, set
   // shift_immed(bit[11:7]) and shift(bit[6:5]) fields.
-  if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm())) {
-    Binary |= getShiftOp(MO3) << 5;  // shift
-    Binary |= ShImm           << 7;  // shift_immed
+  if (unsigned ShImm = ARM_AM::getAM2Offset(AM2Opc)) {
+    Binary |= getShiftOp(AM2Opc) << 5;  // shift
+    Binary |= ShImm              << 7;  // shift_immed
   }
 
-  MCE.emitWordLE(Binary);
+  emitWordLE(Binary);
 }
 
-void ARMCodeEmitter::emitMiscLoadStoreInstruction(const MachineInstr &MI) {
+void ARMCodeEmitter::emitMiscLoadStoreInstruction(const MachineInstr &MI,
+                                                  unsigned ImplicitRn) {
   const TargetInstrDesc &TID = MI.getDesc();
 
   // Part of binary is determined by TableGn.
@@ -549,37 +595,44 @@
   Binary |= getMachineOpValue(MI, 0) << ARMII::RegRdShift;
 
   // Set second operand
-  Binary |= getMachineOpValue(MI, 1) << ARMII::RegRnShift;
+  unsigned OpIdx = 1;
+  if (ImplicitRn)
+    // Special handling for implicit use (e.g. PC).
+    Binary |= (ARMRegisterInfo::getRegisterNumbering(ImplicitRn)
+               << ARMII::RegRnShift);
+  else {
+    Binary |= getMachineOpValue(MI, OpIdx) << ARMII::RegRnShift;
+    ++OpIdx;
+  }
 
-  const MachineOperand &MO2 = MI.getOperand(2);
-  const MachineOperand &MO3 = MI.getOperand(3);
+  const MachineOperand &MO2 = MI.getOperand(OpIdx);
+  unsigned AM3Opc = (OpIdx == TID.getNumOperands())
+    ? 0 : MI.getOperand(OpIdx+1).getImm();
 
   // Set bit U(23) according to sign of immed value (positive or negative)
-  Binary |= ((ARM_AM::getAM2Op(MO3.getImm()) == ARM_AM::add ? 1 : 0) <<
+  Binary |= ((ARM_AM::getAM3Op(AM3Opc) == ARM_AM::add ? 1 : 0) <<
              ARMII::U_BitShift);
 
   // If this instr is in register offset/index encoding, set bit[3:0]
   // to the corresponding Rm register.
   if (MO2.getReg()) {
     Binary |= ARMRegisterInfo::getRegisterNumbering(MO2.getReg());
-    MCE.emitWordLE(Binary);
+    emitWordLE(Binary);
     return;
   }
 
   // if this instr is in immediate offset/index encoding, set bit 22 to 1
-  if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm())) {
+  if (unsigned ImmOffs = ARM_AM::getAM3Offset(AM3Opc)) {
     Binary |= 1 << 22;
     // Set operands
     Binary |= (ImmOffs >> 4) << 8;  // immedH
     Binary |= (ImmOffs & ~0xF);     // immedL
   }
 
-  MCE.emitWordLE(Binary);
+  emitWordLE(Binary);
 }
 
 void ARMCodeEmitter::emitLoadStoreMultipleInstruction(const MachineInstr &MI) {
-  const TargetInstrDesc &TID = MI.getDesc();
-
   // Part of binary is determined by TableGn.
   unsigned Binary = getBinaryCodeForInstr(MI);
 
@@ -619,7 +672,7 @@
     Binary |= 0x1 << RegNum;
   }
 
-  MCE.emitWordLE(Binary);
+  emitWordLE(Binary);
 }
 
 void ARMCodeEmitter::emitMulFrm1Instruction(const MachineInstr &MI) {
@@ -649,7 +702,7 @@
   // Encode Rs
   Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRsShift;
 
-  MCE.emitWordLE(Binary);
+  emitWordLE(Binary);
 }
 
 void ARMCodeEmitter::emitBranchInstruction(const MachineInstr &MI) {
@@ -670,7 +723,7 @@
     Binary |= getMachineOpValue(MI, 1) << 28;  // set conditional field
   }
 
-  MCE.emitWordLE(Binary);
+  emitWordLE(Binary);
 }
 
 void ARMCodeEmitter::emitMiscBranchInstruction(const MachineInstr &MI) {
@@ -691,7 +744,7 @@
     // otherwise, set the return register
     Binary |= getMachineOpValue(MI, 0);
 
-  MCE.emitWordLE(Binary);
+  emitWordLE(Binary);
 }
 
 #include "ARMGenCodeEmitter.inc"

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58780&r1=58779&r2=58780&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Wed Nov  5 17:22:34 2008
@@ -235,81 +235,89 @@
       asm, "", pattern> {
   let Inst{27-26} = {0,1};
 }
-class AXI2 opcod, dag oops, dag iops, Format f, string asm,
-           list pattern>
-  : XI;
 
 // loads
 class AI2ldw opcod, dag oops, dag iops, Format f, string opc,
           string asm, list pattern>
-  : AI2 {
+  : I {
   let Inst{20}    = 1; // L bit
   let Inst{21}    = 0; // W bit
   let Inst{22}    = 0; // B bit
   let Inst{24}    = 1; // P bit
+  let Inst{27-26} = {0,1};
 }
 class AXI2ldw opcod, dag oops, dag iops, Format f, string asm,
            list pattern>
-  : XI {
+  : XI {
   let Inst{20}    = 1; // L bit
   let Inst{21}    = 0; // W bit
   let Inst{22}    = 0; // B bit
   let Inst{24}    = 1; // P bit
+  let Inst{27-26} = {0,1};
 }
 class AI2ldb opcod, dag oops, dag iops, Format f, string opc,
           string asm, list pattern>
-  : AI2 {
+  : I {
   let Inst{20}    = 1; // L bit
   let Inst{21}    = 0; // W bit
   let Inst{22}    = 1; // B bit
   let Inst{24}    = 1; // P bit
+  let Inst{27-26} = {0,1};
 }
 class AXI2ldb opcod, dag oops, dag iops, Format f, string asm,
            list pattern>
-  : XI {
+  : XI {
   let Inst{20}    = 1; // L bit
   let Inst{21}    = 0; // W bit
   let Inst{22}    = 1; // B bit
   let Inst{24}    = 1; // P bit
+  let Inst{27-26} = {0,1};
 }
 
 // stores
 class AI2stw opcod, dag oops, dag iops, Format f, string opc,
           string asm, list pattern>
-  : AI2 {
+  : I {
   let Inst{20}    = 0; // L bit
   let Inst{21}    = 0; // W bit
   let Inst{22}    = 0; // B bit
   let Inst{24}    = 1; // P bit
+  let Inst{27-26} = {0,1};
 }
 class AXI2stw opcod, dag oops, dag iops, Format f, string asm,
            list pattern>
-  : XI {
+  : XI {
   let Inst{20}    = 0; // L bit
   let Inst{21}    = 0; // W bit
   let Inst{22}    = 0; // B bit
   let Inst{24}    = 1; // P bit
+  let Inst{27-26} = {0,1};
 }
 class AI2stb opcod, dag oops, dag iops, Format f, string opc,
           string asm, list pattern>
-  : AI2 {
+  : I {
   let Inst{20}    = 0; // L bit
   let Inst{21}    = 0; // W bit
   let Inst{22}    = 1; // B bit
   let Inst{24}    = 1; // P bit
+  let Inst{27-26} = {0,1};
 }
 class AXI2stb opcod, dag oops, dag iops, Format f, string asm,
            list pattern>
-  : XI {
+  : XI {
   let Inst{20}    = 0; // L bit
   let Inst{21}    = 0; // W bit
   let Inst{22}    = 1; // B bit
   let Inst{24}    = 1; // P bit
+  let Inst{27-26} = {0,1};
 }
 
 // Pre-indexed loads
@@ -321,6 +329,7 @@
   let Inst{21}    = 1; // W bit
   let Inst{22}    = 0; // B bit
   let Inst{24}    = 1; // P bit
+  let Inst{27-26} = {0,1};
 }
 class AI2ldbpr opcod, dag oops, dag iops, Format f, string opc,
             string asm, string cstr, list pattern>
@@ -330,6 +339,7 @@
   let Inst{21}    = 1; // W bit
   let Inst{22}    = 1; // B bit
   let Inst{24}    = 1; // P bit
+  let Inst{27-26} = {0,1};
 }
 
 // Pre-indexed stores
@@ -341,6 +351,7 @@
   let Inst{21}    = 1; // W bit
   let Inst{22}    = 0; // B bit
   let Inst{24}    = 1; // P bit
+  let Inst{27-26} = {0,1};
 }
 class AI2stbpr opcod, dag oops, dag iops, Format f, string opc,
             string asm, string cstr, list pattern>
@@ -350,6 +361,7 @@
   let Inst{21}    = 1; // W bit
   let Inst{22}    = 1; // B bit
   let Inst{24}    = 1; // P bit
+  let Inst{27-26} = {0,1};
 }
 
 // Post-indexed loads
@@ -361,6 +373,7 @@
   let Inst{21}    = 0; // W bit
   let Inst{22}    = 0; // B bit
   let Inst{24}    = 0; // P bit
+  let Inst{27-26} = {0,1};
 }
 class AI2ldbpo opcod, dag oops, dag iops, Format f, string opc,
             string asm, string cstr, list pattern>
@@ -370,6 +383,7 @@
   let Inst{21}    = 0; // W bit
   let Inst{22}    = 1; // B bit
   let Inst{24}    = 0; // P bit
+  let Inst{27-26} = {0,1};
 }
 
 // Post-indexed stores
@@ -381,6 +395,7 @@
   let Inst{21}    = 0; // W bit
   let Inst{22}    = 0; // B bit
   let Inst{24}    = 0; // P bit
+  let Inst{27-26} = {0,1};
 }
 class AI2stbpo opcod, dag oops, dag iops, Format f, string opc,
             string asm, string cstr, list pattern>
@@ -390,6 +405,7 @@
   let Inst{21}    = 0; // W bit
   let Inst{22}    = 1; // B bit
   let Inst{24}    = 0; // P bit
+  let Inst{27-26} = {0,1};
 }
 
 // addrmode3 instructions
@@ -417,8 +433,8 @@
 }
 class AXI3ldh opcod, dag oops, dag iops, Format f, string asm,
            list pattern>
-  : XI {
+  : XI {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
   let Inst{6}     = 0; // S bit
@@ -441,8 +457,8 @@
 }
 class AXI3ldsh opcod, dag oops, dag iops, Format f, string asm,
            list pattern>
-  : XI {
+  : XI {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
   let Inst{6}     = 1; // S bit
@@ -465,8 +481,8 @@
 }
 class AXI3ldsb opcod, dag oops, dag iops, Format f, string asm,
            list pattern>
-  : XI {
+  : XI {
   let Inst{4}     = 1;
   let Inst{5}     = 0; // H bit
   let Inst{6}     = 1; // S bit
@@ -503,8 +519,8 @@
 }
 class AXI3sth opcod, dag oops, dag iops, Format f, string asm,
            list pattern>
-  : XI {
+  : XI {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
   let Inst{6}     = 0; // S bit

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58780&r1=58779&r2=58780&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Nov  5 17:22:34 2008
@@ -472,31 +472,23 @@
 
 let AddedComplexity = 10 in {
 let isSimpleLoad = 1 in
-def PICLD   : AXI2ldw<0x0, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
+def PICLDR  : AXI2ldw<0x0, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
                   Pseudo, "${addr:label}:\n\tldr$p $dst, $addr",
                   [(set GPR:$dst, (load addrmodepc:$addr))]>;
 
-def PICLDZH : AXI3ldh<0x0, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
+def PICLDRH : AXI3ldh<0xB, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
                   Pseudo, "${addr:label}:\n\tldr${p}h $dst, $addr",
                   [(set GPR:$dst, (zextloadi16 addrmodepc:$addr))]>;
 
-def PICLDZB : AXI2ldb<0x0, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
+def PICLDRB : AXI2ldb<0x1, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
                   Pseudo, "${addr:label}:\n\tldr${p}b $dst, $addr",
                   [(set GPR:$dst, (zextloadi8 addrmodepc:$addr))]>;
 
-def PICLDH  : AXI3ldh<0x0, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
-                  Pseudo, "${addr:label}:\n\tldr${p}h $dst, $addr",
-                  [(set GPR:$dst, (extloadi16 addrmodepc:$addr))]>;
-
-def PICLDB  : AXI2ldb<0x0, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
-                  Pseudo, "${addr:label}:\n\tldr${p}b $dst, $addr",
-                  [(set GPR:$dst, (extloadi8 addrmodepc:$addr))]>;
-
-def PICLDSH : AXI3ldsh<0x0, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
+def PICLDRSH : AXI3ldsh<0xE, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
                   Pseudo, "${addr:label}:\n\tldr${p}sh $dst, $addr",
                   [(set GPR:$dst, (sextloadi16 addrmodepc:$addr))]>;
 
-def PICLDSB : AXI3ldsb<0x0, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
+def PICLDRSB : AXI3ldsb<0xD, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
                   Pseudo, "${addr:label}:\n\tldr${p}sb $dst, $addr",
                   [(set GPR:$dst, (sextloadi8 addrmodepc:$addr))]>;
 }
@@ -505,11 +497,11 @@
                Pseudo, "${addr:label}:\n\tstr$p $src, $addr",
                [(store GPR:$src, addrmodepc:$addr)]>;
 
-def PICSTRH : AXI3sth<0x0, (outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
+def PICSTRH : AXI3sth<0xB, (outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
                Pseudo, "${addr:label}:\n\tstr${p}h $src, $addr",
                [(truncstorei16 GPR:$src, addrmodepc:$addr)]>;
 
-def PICSTRB : AXI2stb<0x0, (outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
+def PICSTRB : AXI2stb<0x1, (outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
                Pseudo, "${addr:label}:\n\tstr${p}b $src, $addr",
                [(truncstorei8 GPR:$src, addrmodepc:$addr)]>;
 }
@@ -1219,6 +1211,9 @@
 def : ARMPat<(extloadi8  addrmode2:$addr),  (LDRB addrmode2:$addr)>;
 def : ARMPat<(extloadi16 addrmode3:$addr),  (LDRH addrmode3:$addr)>;
 
+def : ARMPat<(extloadi8  addrmodepc:$addr), (PICLDRB addrmodepc:$addr)>;
+def : ARMPat<(extloadi16 addrmodepc:$addr), (PICLDRH addrmodepc:$addr)>;
+
 // smul* and smla*
 def : ARMV5TEPat<(mul (sra (shl GPR:$a, 16), 16), (sra (shl GPR:$b, 16), 16)),
                  (SMULBB GPR:$a, GPR:$b)>;




From dalej at apple.com  Wed Nov  5 17:23:49 2008
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 5 Nov 2008 15:23:49 -0800
Subject: [llvm-commits] [llvm] r58778 -
	/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
In-Reply-To: <200811052321.mA5NLC13020823@zion.cs.uiuc.edu>
References: <200811052321.mA5NLC13020823@zion.cs.uiuc.edu>
Message-ID: 


On Nov 5, 2008, at 3:21 PMPST, Evan Cheng wrote:

> Author: evancheng
> Date: Wed Nov  5 17:21:11 2008
> New Revision: 58778
>
> URL: http://llvm.org/viewvc/llvm-project?rev=58778&view=rev
> Log:
> Remove debug output that's not really useful.

I found it useful, that's why I put it there.  Could you at least  
leave it inside #if 0?

> Modified:
>    llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
>
> Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp?rev=58778&r1=58777&r2=58778&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp (original)
> +++ llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Wed Nov  5  
> 17:21:11 2008
> @@ -954,22 +954,9 @@
>   MemMgr->setMemoryExecutable();
>
> #ifndef NDEBUG
> -  {
> -  DOUT << std::hex;
> -  int i;
> -  unsigned char* q = FnStart;
> -  for (i=1; q!=FnEnd; q++, i++) {
> -    if (i%8==1)
> -      DOUT << "0x" << (long)q << ": ";
> -    DOUT<< (unsigned short)*q << " ";
> -    if (i%8==0)
> -      DOUT<<"\n";
> -  }
> -  DOUT << std::dec;
>   if (sys::hasDisassembler())
>     DOUT << "Disassembled code:\n"
>          << sys::disassembleBuffer(FnStart, FnEnd-FnStart,  
> (uintptr_t)FnStart);
> -  }
> #endif
>   if (ExceptionHandling) {
>     uintptr_t ActualSize = 0;
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From isanbard at gmail.com  Wed Nov  5 17:42:27 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 05 Nov 2008 23:42:27 -0000
Subject: [llvm-commits] [llvm] r58781 - /llvm/trunk/lib/VMCore/Module.cpp
Message-ID: <200811052342.mA5NgRKJ021615@zion.cs.uiuc.edu>

Author: void
Date: Wed Nov  5 17:42:27 2008
New Revision: 58781

URL: http://llvm.org/viewvc/llvm-project?rev=58781&view=rev
Log:
Add comments to function.

Modified:
    llvm/trunk/lib/VMCore/Module.cpp

Modified: llvm/trunk/lib/VMCore/Module.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Module.cpp?rev=58781&r1=58780&r2=58781&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/Module.cpp (original)
+++ llvm/trunk/lib/VMCore/Module.cpp Wed Nov  5 17:42:27 2008
@@ -224,6 +224,12 @@
   return 0;
 }
 
+/// getOrInsertGlobal - Look up the specified global in the module symbol table.
+///   1. If it does not exist, add a declaration of the global and return it.
+///   2. Else, the global exists but has the wrong type: return the function
+///      with a constantexpr cast to the right type.
+///   3. Finally, if the existing global is the correct delclaration, return the
+///      existing global.
 Constant *Module::getOrInsertGlobal(const std::string &Name, const Type *Ty) {
   ValueSymbolTable &SymTab = getValueSymbolTable();
 




From evan.cheng at apple.com  Wed Nov  5 17:44:09 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 05 Nov 2008 23:44:09 -0000
Subject: [llvm-commits] [llvm] r58782 -
	/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
Message-ID: <200811052344.mA5Ni9gV021666@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Nov  5 17:44:08 2008
New Revision: 58782

URL: http://llvm.org/viewvc/llvm-project?rev=58782&view=rev
Log:
Undo 58778 but makes the binary dump prettier.

Modified:
    llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp

Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp?rev=58782&r1=58781&r2=58782&view=diff

==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Wed Nov  5 17:44:08 2008
@@ -38,6 +38,9 @@
 #include "llvm/ADT/Statistic.h"
 #include 
 #include 
+#ifndef NDEBUG
+#include 
+#endif
 using namespace llvm;
 
 STATISTIC(NumBytes, "Number of bytes of machine code compiled");
@@ -954,9 +957,24 @@
   MemMgr->setMemoryExecutable();
 
 #ifndef NDEBUG
-  if (sys::hasDisassembler())
-    DOUT << "Disassembled code:\n"
-         << sys::disassembleBuffer(FnStart, FnEnd-FnStart, (uintptr_t)FnStart);
+  {
+    if (sys::hasDisassembler())
+      DOUT << "Disassembled code:\n"
+           << sys::disassembleBuffer(FnStart, FnEnd-FnStart, (uintptr_t)FnStart);
+    else {
+      DOUT << std::hex;
+      int i;
+      unsigned char* q = FnStart;
+      for (i=1; q!=FnEnd; q++, i++) {
+        if (i%8==1)
+          DOUT << "0x" << (long)q << ": ";
+        DOUT<< std::setw(2) << std::setfill('0') << (unsigned short)*q << " ";
+        if (i%8==0)
+          DOUT<<"\n";
+      }
+      DOUT << std::dec;
+    }
+  }
 #endif
   if (ExceptionHandling) {
     uintptr_t ActualSize = 0;




From jlerouge at apple.com  Wed Nov  5 17:46:54 2008
From: jlerouge at apple.com (Julien Lerouge)
Date: Wed, 5 Nov 2008 15:46:54 -0800
Subject: [llvm-commits] Patch: improve protability of llvm-config
In-Reply-To: <4911F3FB.60603@web.de>
References: <490F7EF2.2020808@web.de>
	
	<4911DFBE.9080007@web.de> <20081105183332.GA70642@pom.apple.com>
	
	<4911F3FB.60603@web.de>
Message-ID: <20081105234654.GA79020@pom.apple.com>

On Wed, Nov 05, 2008 at 08:28:59PM +0100, Sascha Othman wrote:
> Using Perl 5.6.1 for MSYS (from the DTK) as well, with MSYS 1.0.11 here,
> so an outdated MSYS might be the culprit. The benefit of the change
> would be llvm-config being usable from Windows (without MSYS) and other
> platforms which don't provide a *NIX-like shell and tools like 'which'
> and 'pwd'.

I gave a try to 1.0.11 and I got the same error, then I realized the
problem might come from the "/c/" prefix on the path that ends up being
used in realpath (my build folder is not directly in the msys root).

I do not have a "c" folder in my msys root. It's not created by default,
and I was assuming the /c/ thing would be handled transparently.

But it's not for realpath apparently... so I just did "mkdir /c" and
everything seems to work now, even on 1.0.10. 

So, your initial patch is fine assuming all the magic paths like
"/volume" have a real folder associated with them in the msys root.

Thanks,
Julien

-- 
Julien Lerouge
PGP Key Id: 0xB1964A62
PGP Fingerprint: 392D 4BAD DB8B CE7F 4E5F FA3C 62DB 4AA7 B196 4A62
PGP Public Key from: keyserver.pgp.com


From dalej at apple.com  Wed Nov  5 18:08:37 2008
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 5 Nov 2008 16:08:37 -0800
Subject: [llvm-commits] [llvm] r58782 -
	/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
In-Reply-To: <200811052344.mA5Ni9gV021666@zion.cs.uiuc.edu>
References: <200811052344.mA5Ni9gV021666@zion.cs.uiuc.edu>
Message-ID: <6C035254-AF79-4AEB-922E-A577B2E6B71B@apple.com>


On Nov 5, 2008, at 3:44 PMPST, Evan Cheng wrote:

> Author: evancheng
> Date: Wed Nov  5 17:44:08 2008
> New Revision: 58782
>
> URL: http://llvm.org/viewvc/llvm-project?rev=58782&view=rev
> Log:
> Undo 58778 but makes the binary dump prettier.

That will do, thanks!

> Modified:
>    llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
>
> Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp?rev=58782&r1=58781&r2=58782&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp (original)
> +++ llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Wed Nov  5  
> 17:44:08 2008
> @@ -38,6 +38,9 @@
> #include "llvm/ADT/Statistic.h"
> #include 
> #include 
> +#ifndef NDEBUG
> +#include 
> +#endif
> using namespace llvm;
>
> STATISTIC(NumBytes, "Number of bytes of machine code compiled");
> @@ -954,9 +957,24 @@
>   MemMgr->setMemoryExecutable();
>
> #ifndef NDEBUG
> -  if (sys::hasDisassembler())
> -    DOUT << "Disassembled code:\n"
> -         << sys::disassembleBuffer(FnStart, FnEnd-FnStart,  
> (uintptr_t)FnStart);
> +  {
> +    if (sys::hasDisassembler())
> +      DOUT << "Disassembled code:\n"
> +           << sys::disassembleBuffer(FnStart, FnEnd-FnStart,  
> (uintptr_t)FnStart);
> +    else {
> +      DOUT << std::hex;
> +      int i;
> +      unsigned char* q = FnStart;
> +      for (i=1; q!=FnEnd; q++, i++) {
> +        if (i%8==1)
> +          DOUT << "0x" << (long)q << ": ";
> +        DOUT<< std::setw(2) << std::setfill('0') << (unsigned  
> short)*q << " ";
> +        if (i%8==0)
> +          DOUT<<"\n";
> +      }
> +      DOUT << std::dec;
> +    }
> +  }
> #endif
>   if (ExceptionHandling) {
>     uintptr_t ActualSize = 0;
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From snaroff at apple.com  Wed Nov  5 18:11:31 2008
From: snaroff at apple.com (Steve Naroff)
Date: Thu, 06 Nov 2008 00:11:31 -0000
Subject: [llvm-commits] [llvm] r58783 - /llvm/trunk/win32/clang.sln
Message-ID: <200811060011.mA60BVmw022484@zion.cs.uiuc.edu>

Author: snaroff
Date: Wed Nov  5 18:11:31 2008
New Revision: 58783

URL: http://llvm.org/viewvc/llvm-project?rev=58783&view=rev
Log:
Add post-build event for clangDriver (to copy clang.exe into "dstroot").

Modified:
    llvm/trunk/win32/clang.sln

Modified: llvm/trunk/win32/clang.sln
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/win32/clang.sln?rev=58783&r1=58782&r2=58783&view=diff

==============================================================================
--- llvm/trunk/win32/clang.sln (original)
+++ llvm/trunk/win32/clang.sln Wed Nov  5 18:11:31 2008
@@ -265,6 +265,8 @@
 EndProject
 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "clangDriver", "..\tools\clang\win32\clangDriver\clangDriver.vcproj", "{7E7DA455-C276-4B93-8D02-8F7E2F629BAF}"
 	ProjectSection(ProjectDependencies) = postProject
+		{030F6909-B2FA-4E53-BEA7-9A559CFC2F73} = {030F6909-B2FA-4E53-BEA7-9A559CFC2F73}
+		{6C98551A-4C36-4E74-8419-4D3EEEC9D8E0} = {6C98551A-4C36-4E74-8419-4D3EEEC9D8E0}
 		{0622E827-8464-489D-8B1C-B0B496F35C08} = {0622E827-8464-489D-8B1C-B0B496F35C08}
 		{28AA9146-3482-4F41-9CC6-407B1D258508} = {28AA9146-3482-4F41-9CC6-407B1D258508}
 		{F1EFF064-8869-4DFF-8E1A-CD8F4A5F8D62} = {F1EFF064-8869-4DFF-8E1A-CD8F4A5F8D62}
@@ -275,13 +277,11 @@
 		{4727E8B7-AA99-41C9-AB09-A8A862595DB7} = {4727E8B7-AA99-41C9-AB09-A8A862595DB7}
 		{059FBAB8-C76D-48A0-AA75-3C57BD3EAFE4} = {059FBAB8-C76D-48A0-AA75-3C57BD3EAFE4}
 		{08CEB1BB-C2A4-4587-B9A9-AEDB8FB44897} = {08CEB1BB-C2A4-4587-B9A9-AEDB8FB44897}
+		{C59374C1-9FC0-4147-B836-327DFDC52D99} = {C59374C1-9FC0-4147-B836-327DFDC52D99}
 		{45CD78D7-C5D9-47FE-AD12-F3251EEDAFFB} = {45CD78D7-C5D9-47FE-AD12-F3251EEDAFFB}
 		{5125C3DB-FBD6-4BF8-8D8B-CE51D6E93BCD} = {5125C3DB-FBD6-4BF8-8D8B-CE51D6E93BCD}
 		{AECB78DF-C319-4D49-B2FD-F98F62EBBDF4} = {AECB78DF-C319-4D49-B2FD-F98F62EBBDF4}
 		{0F8407F3-FA23-4CF1-83A9-DCBE0B361489} = {0F8407F3-FA23-4CF1-83A9-DCBE0B361489}
-		{C59374C1-9FC0-4147-B836-327DFDC52D99} = {C59374C1-9FC0-4147-B836-327DFDC52D99}
-		{6C98551A-4C36-4E74-8419-4D3EEEC9D8E0} = {6C98551A-4C36-4E74-8419-4D3EEEC9D8E0}
-		{030F6909-B2FA-4E53-BEA7-9A559CFC2F73} = {030F6909-B2FA-4E53-BEA7-9A559CFC2F73}
 	EndProjectSection
 EndProject
 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "clangBasic", "..\tools\clang\win32\clangBasic\clangBasic.vcproj", "{298B4876-6EF1-4E80-85D7-72F80693BBEB}"
@@ -292,6 +292,8 @@
 EndProject
 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "clangLibDriver", "..\tools\clang\win32\clangLibDriver\clangLibDriver.vcproj", "{AECB78DF-C319-4D49-B2FD-F98F62EBBDF4}"
 EndProject
+Project("{54435603-DBB4-11D2-8724-00A0C9A8B90C}") = "clang", "clang\clang.vdproj", "{025666E2-60EA-4C49-8C68-49CEC99DD4B1}"
+EndProject
 Global
 	GlobalSection(SolutionConfigurationPlatforms) = preSolution
 		Configure|Win32 = Configure|Win32
@@ -539,6 +541,9 @@
 		{AECB78DF-C319-4D49-B2FD-F98F62EBBDF4}.Debug|Win32.Build.0 = Debug|Win32
 		{AECB78DF-C319-4D49-B2FD-F98F62EBBDF4}.Release|Win32.ActiveCfg = Release|Win32
 		{AECB78DF-C319-4D49-B2FD-F98F62EBBDF4}.Release|Win32.Build.0 = Release|Win32
+		{025666E2-60EA-4C49-8C68-49CEC99DD4B1}.Configure|Win32.ActiveCfg = Release
+		{025666E2-60EA-4C49-8C68-49CEC99DD4B1}.Debug|Win32.ActiveCfg = Debug
+		{025666E2-60EA-4C49-8C68-49CEC99DD4B1}.Release|Win32.ActiveCfg = Release
 	EndGlobalSection
 	GlobalSection(SolutionProperties) = preSolution
 		HideSolutionNode = FALSE
@@ -584,6 +589,7 @@
 		{6C98551A-4C36-4E74-8419-4D3EEEC9D8E0} = {DAC2AB11-F09C-454B-86FD-9BDBBA25827F}
 		{F9FBDDA2-9EE1-473C-A456-BE20B7B2439D} = {DAC2AB11-F09C-454B-86FD-9BDBBA25827F}
 		{AECB78DF-C319-4D49-B2FD-F98F62EBBDF4} = {DAC2AB11-F09C-454B-86FD-9BDBBA25827F}
+		{025666E2-60EA-4C49-8C68-49CEC99DD4B1} = {DAC2AB11-F09C-454B-86FD-9BDBBA25827F}
 	EndGlobalSection
 	GlobalSection(DPCodeReviewSolutionGUID) = preSolution
 		DPCodeReviewSolutionGUID = {00000000-0000-0000-0000-000000000000}




From isanbard at gmail.com  Wed Nov  5 18:14:17 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 06 Nov 2008 00:14:17 -0000
Subject: [llvm-commits] [llvm] r58784 - /llvm/tags/Apple/llvmCore-2079/
Message-ID: <200811060014.mA60EHc5022604@zion.cs.uiuc.edu>

Author: void
Date: Wed Nov  5 18:14:17 2008
New Revision: 58784

URL: http://llvm.org/viewvc/llvm-project?rev=58784&view=rev
Log:
Creating llvmCore-2079 branch

Added:
    llvm/tags/Apple/llvmCore-2079/
      - copied from r58783, llvm/trunk/



From isanbard at gmail.com  Wed Nov  5 18:14:24 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 06 Nov 2008 00:14:24 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r58785 -
	/llvm-gcc-4.2/tags/Apple/llvmgcc42-2079/
Message-ID: <200811060014.mA60EOi6022616@zion.cs.uiuc.edu>

Author: void
Date: Wed Nov  5 18:14:24 2008
New Revision: 58785

URL: http://llvm.org/viewvc/llvm-project?rev=58785&view=rev
Log:
Creating llvmgcc42-2079 branch

Added:
    llvm-gcc-4.2/tags/Apple/llvmgcc42-2079/
      - copied from r58784, llvm-gcc-4.2/trunk/



From isanbard at gmail.com  Wed Nov  5 18:19:59 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 5 Nov 2008 16:19:59 -0800
Subject: [llvm-commits] [llvm] r58727 - in /llvm/trunk:
	include/llvm/Module.h lib/CodeGen/StackProtector.cpp
	lib/VMCore/Module.cpp
In-Reply-To: <30CA4196-CC39-4B54-9D37-3BBD4C5FB43F@apple.com>
References: <200811042251.mA4MpO0E028324@zion.cs.uiuc.edu>
	<30CA4196-CC39-4B54-9D37-3BBD4C5FB43F@apple.com>
Message-ID: <16e5fdf90811051619g50c3e4a4x7691775b833e9816@mail.gmail.com>

On Wed, Nov 5, 2008 at 12:44 AM, Chris Lattner  wrote:
>
> On Nov 4, 2008, at 2:51 PM, Bill Wendling wrote:
>
>> Author: void
>> Date: Tue Nov  4 16:51:24 2008
>> New Revision: 58727
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=58727&view=rev
>> Log:
>> - Add a "getOrInsertGlobal" method to the Module class. This acts
>> similarly to
>>  "getOrInsertFunction" in that it either adds a new declaration of
>> the global
>>  and returns it, or returns the current one -- optionally casting it
>> to the
>>  correct type.
>> - Use the new getOrInsertGlobal in the stack protector code.
>> - Use "splitBasicBlock" in the stack protector code.
>
> Awesome, thanks Bill!  One minor nit: getOrInsertFunction takes a
> function, not a pointer to the function.  Do you think it makes sense
> for getOrInsertGlobal to take the "contained" type of the global,
> instead of the pointer?
>
If I understand correctly, that's what this change is doing. :-) Or do
you want to create another "derived type" called GlobalType similar to
FunctionType and use that?

-bw


From dpatel at apple.com  Wed Nov  5 18:30:09 2008
From: dpatel at apple.com (Devang Patel)
Date: Thu, 06 Nov 2008 00:30:09 -0000
Subject: [llvm-commits] [llvm] r58786 - in /llvm/trunk:
 lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
 test/DebugInfo/2008-11-05-InlinedFuncStart.ll
Message-ID: <200811060030.mA60U9Rx023183@zion.cs.uiuc.edu>

Author: dpatel
Date: Wed Nov  5 18:30:09 2008
New Revision: 58786

URL: http://llvm.org/viewvc/llvm-project?rev=58786&view=rev
Log:
Emit label for llvm.dbg.func.start of the inlined function.

Added:
    llvm/trunk/test/DebugInfo/2008-11-05-InlinedFuncStart.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp?rev=58786&r1=58785&r2=58786&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Wed Nov  5 18:30:09 2008
@@ -3556,9 +3556,12 @@
       SubprogramDesc *Subprogram = cast(DD);
       const CompileUnitDesc *CompileUnit = Subprogram->getFile();
       unsigned SrcFile = MMI->RecordSource(CompileUnit);
-      // Record the source line but does create a label. It will be emitted
-      // at asm emission time.
-      MMI->RecordSourceLine(Subprogram->getLine(), 0, SrcFile);
+      // Record the source line but does not create a label for the normal
+      // function start. It will be emitted at asm emission time. However,
+      // create a label if this is a beginning of inlined function.
+      unsigned LabelID = MMI->RecordSourceLine(Subprogram->getLine(), 0, SrcFile);
+      if (MMI->getSourceLines().size() != 1)
+        DAG.setRoot(DAG.getLabel(ISD::DBG_LABEL, getRoot(), LabelID));
     }
 
     return 0;

Added: llvm/trunk/test/DebugInfo/2008-11-05-InlinedFuncStart.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/2008-11-05-InlinedFuncStart.ll?rev=58786&view=auto

==============================================================================
--- llvm/trunk/test/DebugInfo/2008-11-05-InlinedFuncStart.ll (added)
+++ llvm/trunk/test/DebugInfo/2008-11-05-InlinedFuncStart.ll Wed Nov  5 18:30:09 2008
@@ -0,0 +1,71 @@
+; RUN: llvm-as < %s | llc
+	%llvm.dbg.anchor.type = type { i32, i32 }
+	%llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
+	%llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8* }
+	%llvm.dbg.subprogram.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1 }
+ at llvm.dbg.subprogram = internal constant %llvm.dbg.subprogram.type { i32 393262, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 1, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), i1 false, i1 true }, section "llvm.metadata"		; <%llvm.dbg.subprogram.type*> [#uses=1]
+ at llvm.dbg.subprograms = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 46 }, section "llvm.metadata"		; <%llvm.dbg.anchor.type*> [#uses=1]
+ at llvm.dbg.compile_unit = internal constant %llvm.dbg.compile_unit.type { i32 393233, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([52 x i8]* @.str2, i32 0, i32 0) }, section "llvm.metadata"		; <%llvm.dbg.compile_unit.type*> [#uses=1]
+ at llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 17 }, section "llvm.metadata"		; <%llvm.dbg.anchor.type*> [#uses=1]
+ at .str = internal constant [4 x i8] c"a.c\00", section "llvm.metadata"		; <[4 x i8]*> [#uses=1]
+ at .str1 = internal constant [5 x i8] c"/tmp\00", section "llvm.metadata"		; <[5 x i8]*> [#uses=1]
+ at .str2 = internal constant [52 x i8] c"4.2.1 (Based on Apple Inc. build 5627) (LLVM build)\00", section "llvm.metadata"		; <[52 x i8]*> [#uses=1]
+ at .str3 = internal constant [4 x i8] c"foo\00", section "llvm.metadata"		; <[4 x i8]*> [#uses=1]
+ at llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { i32 393252, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str4, i32 0, i32 0), { }* null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata"		; <%llvm.dbg.basictype.type*> [#uses=1]
+ at .str4 = internal constant [4 x i8] c"int\00", section "llvm.metadata"		; <[4 x i8]*> [#uses=1]
+ at llvm.dbg.subprogram5 = internal constant %llvm.dbg.subprogram.type { i32 393262, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([5 x i8]* @.str6, i32 0, i32 0), i8* getelementptr ([5 x i8]* @.str6, i32 0, i32 0), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 2, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), i1 false, i1 true }, section "llvm.metadata"		; <%llvm.dbg.subprogram.type*> [#uses=1]
+ at .str6 = internal constant [5 x i8] c"main\00", section "llvm.metadata"		; <[5 x i8]*> [#uses=1]
+
+define i32 @foo() nounwind alwaysinline {
+entry:
+	%retval = alloca i32		;  [#uses=2]
+	%0 = alloca i32		;  [#uses=2]
+	%"alloca point" = bitcast i32 0 to i32		;  [#uses=0]
+	call void @llvm.dbg.func.start({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
+	call void @llvm.dbg.stoppoint(i32 1, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+	store i32 42, i32* %0, align 4
+	%1 = load i32* %0, align 4		;  [#uses=1]
+	store i32 %1, i32* %retval, align 4
+	br label %return
+
+return:		; preds = %entry
+	%retval1 = load i32* %retval		;  [#uses=1]
+	call void @llvm.dbg.stoppoint(i32 1, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+	call void @llvm.dbg.region.end({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
+	ret i32 %retval1
+}
+
+declare void @llvm.dbg.func.start({ }*) nounwind
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+declare void @llvm.dbg.region.end({ }*) nounwind
+
+define i32 @main() nounwind {
+entry:
+	%retval.i = alloca i32		;  [#uses=2]
+	%0 = alloca i32		;  [#uses=2]
+	%retval = alloca i32		;  [#uses=2]
+	%1 = alloca i32		;  [#uses=2]
+	%"alloca point" = bitcast i32 0 to i32		;  [#uses=0]
+	call void @llvm.dbg.func.start({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram5 to { }*))
+	call void @llvm.dbg.stoppoint(i32 2, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+	call void @llvm.dbg.func.start({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*)) nounwind
+	call void @llvm.dbg.stoppoint(i32 1, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*)) nounwind
+	store i32 42, i32* %0, align 4
+	%2 = load i32* %0, align 4		;  [#uses=1]
+	store i32 %2, i32* %retval.i, align 4
+	%retval1.i = load i32* %retval.i		;  [#uses=1]
+	call void @llvm.dbg.stoppoint(i32 1, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*)) nounwind
+	call void @llvm.dbg.region.end({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*)) nounwind
+	store i32 %retval1.i, i32* %1, align 4
+	%3 = load i32* %1, align 4		;  [#uses=1]
+	store i32 %3, i32* %retval, align 4
+	br label %return
+
+return:		; preds = %entry
+	%retval1 = load i32* %retval		;  [#uses=1]
+	call void @llvm.dbg.stoppoint(i32 2, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+	call void @llvm.dbg.region.end({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram5 to { }*))
+	ret i32 %retval1
+}




From anton at korobeynikov.info  Wed Nov  5 18:30:36 2008
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Thu, 6 Nov 2008 03:30:36 +0300
Subject: [llvm-commits] Patch: improve protability of llvm-config
In-Reply-To: <20081105234654.GA79020@pom.apple.com>
References: <490F7EF2.2020808@web.de>
	
	<4911DFBE.9080007@web.de> <20081105183332.GA70642@pom.apple.com>
	
	<4911F3FB.60603@web.de> <20081105234654.GA79020@pom.apple.com>
Message-ID: 

> So, your initial patch is fine assuming all the magic paths like
> "/volume" have a real folder associated with them in the msys root.
This seems to be quite 'unnatural' requirement. I think the problem
can be even worse if there is some magic prefix for volumes, etc. of
form "/driveprefix/driveletter".

Another question: how are the paths like "c:/dir1/dir2/dir3" are
handled? Do they left as-is, or transformed into "/c/dir1/dir2/dir3" ?
(I don't have mingw box currently and cannot verify by myself). If
they are left as-is, then resulted binaries /scripts, even having
paths hardcoded in them, can still be run without msys shell (this is
how the things work currently).

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University


From dpatel at apple.com  Wed Nov  5 19:00:16 2008
From: dpatel at apple.com (Devang Patel)
Date: Thu, 06 Nov 2008 01:00:16 -0000
Subject: [llvm-commits] [llvm] r58787 -
	/llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp
Message-ID: <200811060100.mA610Glx024140@zion.cs.uiuc.edu>

Author: dpatel
Date: Wed Nov  5 19:00:16 2008
New Revision: 58787

URL: http://llvm.org/viewvc/llvm-project?rev=58787&view=rev
Log:
InstructionNamer preserves everything.

Modified:
    llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp

Modified: llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp?rev=58787&r1=58786&r2=58787&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp Wed Nov  5 19:00:16 2008
@@ -25,6 +25,10 @@
     static char ID; // Pass identification, replacement for typeid
     InstNamer() : FunctionPass(&ID) {}
     
+    void getAnalysisUsage(AnalysisUsage &Info) const {
+      Info.setPreservesAll();
+    }
+
     bool runOnFunction(Function &F) {
       for (Function::iterator BB = F.begin(), E = F.end(); BB != E; ++BB)
         for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I)




From jlerouge at apple.com  Wed Nov  5 19:03:48 2008
From: jlerouge at apple.com (Julien Lerouge)
Date: Wed, 5 Nov 2008 17:03:48 -0800
Subject: [llvm-commits] Patch: improve protability of llvm-config
In-Reply-To: 
References: <490F7EF2.2020808@web.de>
	
	<4911DFBE.9080007@web.de> <20081105183332.GA70642@pom.apple.com>
	
	<4911F3FB.60603@web.de> <20081105234654.GA79020@pom.apple.com>
	
Message-ID: <20081106010347.GB79020@pom.apple.com>

On Thu, Nov 06, 2008 at 03:30:36AM +0300, Anton Korobeynikov wrote:
> > So, your initial patch is fine assuming all the magic paths like
> > "/volume" have a real folder associated with them in the msys root.
> This seems to be quite 'unnatural' requirement. I think the problem
> can be even worse if there is some magic prefix for volumes, etc. of
> form "/driveprefix/driveletter".

Agreed.

> Another question: how are the paths like "c:/dir1/dir2/dir3" are
> handled? Do they left as-is, or transformed into "/c/dir1/dir2/dir3" ?
> (I don't have mingw box currently and cannot verify by myself). If
> they are left as-is, then resulted binaries /scripts, even having
> paths hardcoded in them, can still be run without msys shell (this is
> how the things work currently).

Good point, running the following perl:

use Cwd;
print STDERR Cwd::realpath("c:/WINDOWS");

* On MSYS/MingW:

$ perl t.pl
opendir(c:/WINDOWS/../..): No such file or directory at t.pl line 2

* For comparison, on cygwin:

$ perl t.pl
/cygdrive/c/WINDOWS

* On ActivePerl:

> t.pl
c:/WINDOWS

So, it's a mess... Path like c:/dir1/dir2 cannot be used on MSYS/MingW,
but they can still be used if using ActivePerl. If running MSYS/MingW,
then posix path have to be used (/c/...) and the /c folder must exist in
the MSYS root.

I think falling back to realpath if the shell doesn't work is the right
way to go.

Hope this helps,
Julien

-- 
Julien Lerouge
PGP Key Id: 0xB1964A62
PGP Fingerprint: 392D 4BAD DB8B CE7F 4E5F FA3C 62DB 4AA7 B196 4A62
PGP Public Key from: keyserver.pgp.com


From evan.cheng at apple.com  Wed Nov  5 19:18:29 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 06 Nov 2008 01:18:29 -0000
Subject: [llvm-commits] [llvm] r58788 -
	/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
Message-ID: <200811060118.mA61ITrk024795@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Nov  5 19:18:29 2008
New Revision: 58788

URL: http://llvm.org/viewvc/llvm-project?rev=58788&view=rev
Log:
Need a \n.

Modified:
    llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp

Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp?rev=58788&r1=58787&r2=58788&view=diff

==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Wed Nov  5 19:18:29 2008
@@ -970,9 +970,10 @@
           DOUT << "0x" << (long)q << ": ";
         DOUT<< std::setw(2) << std::setfill('0') << (unsigned short)*q << " ";
         if (i%8==0)
-          DOUT<<"\n";
+          DOUT << '\n';
       }
       DOUT << std::dec;
+      DOUT<< '\n';
     }
   }
 #endif




From evan.cheng at apple.com  Wed Nov  5 19:21:28 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 06 Nov 2008 01:21:28 -0000
Subject: [llvm-commits] [llvm] r58789 - in /llvm/trunk/lib/Target/ARM:
 ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.h ARMInstrInfo.td
Message-ID: <200811060121.mA61LTHF024997@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Nov  5 19:21:28 2008
New Revision: 58789

URL: http://llvm.org/viewvc/llvm-project?rev=58789&view=rev
Log:
Fix encoding of multiple instructions with 3 src operands; also handle smmul, smmla, and smmls.

Modified:
    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58789&r1=58788&r2=58789&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Wed Nov  5 19:21:28 2008
@@ -96,7 +96,7 @@
 
     void emitLoadStoreMultipleInstruction(const MachineInstr &MI);
 
-    void emitMulFrm1Instruction(const MachineInstr &MI);
+    void emitMulFrmInstruction(const MachineInstr &MI);
 
     void emitBranchInstruction(const MachineInstr &MI);
 
@@ -285,8 +285,8 @@
   case ARMII::StMulFrm:
     emitLoadStoreMultipleInstruction(MI);
     break;
-  case ARMII::MulFrm1:
-    emitMulFrm1Instruction(MI);
+  case ARMII::MulFrm:
+    emitMulFrmInstruction(MI);
     break;
   case ARMII::Branch:
     emitBranchInstruction(MI);
@@ -675,7 +675,7 @@
   emitWordLE(Binary);
 }
 
-void ARMCodeEmitter::emitMulFrm1Instruction(const MachineInstr &MI) {
+void ARMCodeEmitter::emitMulFrmInstruction(const MachineInstr &MI) {
   const TargetInstrDesc &TID = MI.getDesc();
 
   // Part of binary is determined by TableGn.
@@ -702,6 +702,11 @@
   // Encode Rs
   Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRsShift;
 
+  // Many multiple instructions (e.g. MLA) have three src operands. Encode
+  // it as Rn (for multiply, that's in the same offset as RdLo.
+  if (TID.getNumOperands() - TID.getNumDefs() == 3)
+    Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdLoShift;
+
   emitWordLE(Binary);
 }
 

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58789&r1=58788&r2=58789&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Wed Nov  5 19:21:28 2008
@@ -20,28 +20,27 @@
 }
 
 def Pseudo      : Format<1>;
-def MulFrm1     : Format<2>;
-def MulFrm2     : Format<3>;
-def MulSMLAW    : Format<4>;
-def MulSMULW    : Format<5>;
-def MulSMLA     : Format<6>;
-def MulSMUL     : Format<7>;
-def Branch      : Format<8>;
-def BranchMisc  : Format<9>;
-
-def DPFrm       : Format<10>;
-def DPSoRegFrm  : Format<11>;
-
-def LdFrm       : Format<12>;
-def StFrm       : Format<13>;
-def LdMiscFrm   : Format<14>;
-def StMiscFrm   : Format<15>;
-def LdMulFrm    : Format<16>;
-def StMulFrm    : Format<17>;
-
-def ArithMisc   : Format<18>;
-def ThumbFrm    : Format<19>;
-def VFPFrm      : Format<20>;
+def MulFrm      : Format<2>;
+def MulSMLAW    : Format<3>;
+def MulSMULW    : Format<4>;
+def MulSMLA     : Format<5>;
+def MulSMUL     : Format<6>;
+def Branch      : Format<7>;
+def BranchMisc  : Format<8>;
+
+def DPFrm       : Format<9>;
+def DPSoRegFrm  : Format<10>;
+
+def LdFrm       : Format<11>;
+def StFrm       : Format<12>;
+def LdMiscFrm   : Format<13>;
+def StMiscFrm   : Format<14>;
+def LdMulFrm    : Format<15>;
+def StMulFrm    : Format<16>;
+
+def ArithMisc   : Format<17>;
+def ThumbFrm    : Format<18>;
+def VFPFrm      : Format<19>;
 
 // Misc flag for data processing instructions that indicates whether
 // the instruction has a Rn register operand.
@@ -679,23 +678,30 @@
 }
 
 // Unsigned multiply, multiply-accumulate instructions.
-class AMul1I opcod, dag oops, dag iops, string opc,
+class AMul1I mulopc, dag oops, dag iops, string opc,
          string asm, list pattern>
-  : I {
-  // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, SMLAWy, ...)
   let Inst{7-4}   = 0b1001;
-  let Inst{27-24} = 0b0000;
-  let Inst{23-20} = opcod;
+  let Inst{20}    = 0; // S bit
+  let Inst{27-21} = mulopc;
 }
-class AsMul1I opcod, dag oops, dag iops, string opc,
+class AsMul1I mulopc, dag oops, dag iops, string opc,
           string asm, list pattern>
-  : sI {
-  // FIXME: bits 7-4 should be a sub-mode (for SMLAxx, SMLAWy, ...)
   let Inst{7-4}   = 0b1001;
-  let Inst{27-24} = 0b0000;
-  let Inst{23-20} = opcod;
+  let Inst{27-21} = mulopc;
+}
+
+// Most significant word multiply
+class AMul2I mulopc, dag oops, dag iops, string opc,
+         string asm, list pattern>
+  : I<0, oops, iops, AddrModeNone, Size4Bytes, IndexModeNone, MulFrm, opc,
+      asm,"",pattern> {
+  let Inst{7-4}   = 0b1001;
+  let Inst{20}    = 1;
+  let Inst{27-21} = mulopc;
 }
 
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=58789&r1=58788&r2=58789&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Wed Nov  5 19:21:28 2008
@@ -80,37 +80,36 @@
     Pseudo      = 1 << FormShift,
 
     // Multiply instructions
-    MulFrm1     = 2 << FormShift,
-    MulFrm2     = 3 << FormShift,
-    MulSMLAW    = 4 << FormShift,
-    MulSMULW    = 5 << FormShift,
-    MulSMLA     = 6 << FormShift,
-    MulSMUL     = 7 << FormShift,
+    MulFrm      = 2 << FormShift,
+    MulSMLAW    = 3 << FormShift,
+    MulSMULW    = 4 << FormShift,
+    MulSMLA     = 5 << FormShift,
+    MulSMUL     = 6 << FormShift,
 
     // Branch instructions
-    Branch      = 8 << FormShift,
-    BranchMisc  = 9 << FormShift,
+    Branch      = 7 << FormShift,
+    BranchMisc  = 8 << FormShift,
 
     // Data Processing instructions
-    DPFrm       = 10 << FormShift,
-    DPSoRegFrm  = 11 << FormShift,
+    DPFrm       = 9  << FormShift,
+    DPSoRegFrm  = 10 << FormShift,
 
     // Load and Store
-    LdFrm       = 12 << FormShift,
-    StFrm       = 13 << FormShift,
-    LdMiscFrm   = 14 << FormShift,
-    StMiscFrm   = 15 << FormShift,
-    LdMulFrm    = 16 << FormShift,
-    StMulFrm    = 17 << FormShift,
+    LdFrm       = 11 << FormShift,
+    StFrm       = 12 << FormShift,
+    LdMiscFrm   = 13 << FormShift,
+    StMiscFrm   = 14 << FormShift,
+    LdMulFrm    = 15 << FormShift,
+    StMulFrm    = 16 << FormShift,
 
     // Miscellaneous arithmetic instructions
-    ArithMisc   = 18 << FormShift,
+    ArithMisc   = 17 << FormShift,
 
     // Thumb format
-    ThumbFrm    = 19 << FormShift,
+    ThumbFrm    = 18 << FormShift,
 
     // VFP format
-    VPFFrm      = 20 << FormShift,
+    VPFFrm      = 19 << FormShift,
 
     //===------------------------------------------------------------------===//
     // Field shifts - such shifts are used to set field while generating

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58789&r1=58788&r2=58789&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Nov  5 19:21:28 2008
@@ -905,51 +905,60 @@
 //  Multiply Instructions.
 //
 
-def MUL   : AsMul1I<0b0000, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
+def MUL   : AsMul1I<0b0000000, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
                  "mul", " $dst, $a, $b",
                  [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>;
 
-def MLA   : AsMul1I<0b0010, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c),
+def MLA   : AsMul1I<0b0000001, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c),
                  "mla", " $dst, $a, $b, $c",
                  [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR:$c))]>;
 
 // Extra precision multiplies with low / high results
-def SMULL : AsMul1I<0b1100, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b),
-                 "smull", " $ldst, $hdst, $a, $b", []>;
-
-def UMULL : AsMul1I<0b1000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b),
-                 "umull", " $ldst, $hdst, $a, $b", []>;
+def SMULL : AsMul1I<0b0000110, (outs GPR:$ldst, GPR:$hdst),
+                               (ins GPR:$a, GPR:$b),
+                    "smull", " $ldst, $hdst, $a, $b", []>;
+
+def UMULL : AsMul1I<0b0000100, (outs GPR:$ldst, GPR:$hdst),
+                               (ins GPR:$a, GPR:$b),
+                    "umull", " $ldst, $hdst, $a, $b", []>;
 
 // Multiply + accumulate
-def SMLAL : AsMul1I<0b1110, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b),
-                 "smlal", " $ldst, $hdst, $a, $b", []>;
-
-def UMLAL : AsMul1I<0b1010, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b),
-                 "umlal", " $ldst, $hdst, $a, $b", []>;
-
-def UMAAL : AMul1I<0b0000, (outs GPR:$ldst, GPR:$hdst), (ins GPR:$a, GPR:$b), 
-                   "umaal", " $ldst, $hdst, $a, $b", []>,
-                   Requires<[IsARM, HasV6]>;
+def SMLAL : AsMul1I<0b0000111, (outs GPR:$ldst, GPR:$hdst),
+                               (ins GPR:$a, GPR:$b),
+                    "smlal", " $ldst, $hdst, $a, $b", []>;
+
+def UMLAL : AsMul1I<0b0000101, (outs GPR:$ldst, GPR:$hdst),
+                               (ins GPR:$a, GPR:$b),
+                    "umlal", " $ldst, $hdst, $a, $b", []>;
+
+def UMAAL : AMul1I <0b0000010, (outs GPR:$ldst, GPR:$hdst),
+                               (ins GPR:$a, GPR:$b),
+                    "umaal", " $ldst, $hdst, $a, $b", []>,
+                    Requires<[IsARM, HasV6]>;
 
 // Most significant word multiply
-// FIXME: encoding
-def SMMUL : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulFrm2,
+def SMMUL : AMul2I <0b0111010, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
                "smmul", " $dst, $a, $b",
                [(set GPR:$dst, (mulhs GPR:$a, GPR:$b))]>,
-            Requires<[IsARM, HasV6]>;
+            Requires<[IsARM, HasV6]> {
+  let Inst{7-4}   = 0b0001;
+  let Inst{15-12} = 0b1111;
+}
 
-// FIXME: encoding
-def SMMLA : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), MulFrm2,
+def SMMLA : AMul2I <0b0111010, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c),
                "smmla", " $dst, $a, $b, $c",
                [(set GPR:$dst, (add (mulhs GPR:$a, GPR:$b), GPR:$c))]>,
-            Requires<[IsARM, HasV6]>;
+            Requires<[IsARM, HasV6]> {
+  let Inst{7-4}   = 0b0001;
+}
 
 
-// FIXME: encoding
-def SMMLS : AI<0x0, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c), MulFrm2,
+def SMMLS : AMul2I <0b0111010, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c),
                "smmls", " $dst, $a, $b, $c",
                [(set GPR:$dst, (sub GPR:$c, (mulhs GPR:$a, GPR:$b)))]>,
-               Requires<[IsARM, HasV6]>;
+            Requires<[IsARM, HasV6]> {
+  let Inst{7-4}   = 0b1101;
+}
 
 // FIXME: encoding
 multiclass AI_smul {




From evan.cheng at apple.com  Wed Nov  5 20:25:39 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 06 Nov 2008 02:25:39 -0000
Subject: [llvm-commits] [llvm] r58790 - in /llvm/trunk/lib/Target/ARM:
 ARMCodeEmitter.cpp ARMInstrInfo.td AsmPrinter/ARMAsmPrinter.cpp
Message-ID: <200811060225.mA62Pdnd027341@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Nov  5 20:25:39 2008
New Revision: 58790

URL: http://llvm.org/viewvc/llvm-project?rev=58790&view=rev
Log:
Fix so_imm encoding bug; add support for MOVi2pieces.

Modified:
    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58790&r1=58789&r2=58790&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Wed Nov  5 20:25:39 2008
@@ -69,6 +69,8 @@
 
     void emitConstPoolInstruction(const MachineInstr &MI);
 
+    void emitMOVi2piecesInstruction(const MachineInstr &MI);
+
     void addPCLabel(unsigned LabelID);
 
     void emitPseudoInstruction(const MachineInstr &MI);
@@ -78,9 +80,7 @@
                                     const MachineOperand &MO,
                                     unsigned OpIdx);
 
-    unsigned getMachineSoImmOpValue(const MachineInstr &MI,
-                                    const TargetInstrDesc &TID,
-                                    const MachineOperand &MO);
+    unsigned getMachineSoImmOpValue(unsigned SoImm);
 
     unsigned getAddrModeSBit(const MachineInstr &MI,
                              const TargetInstrDesc &TID) const;
@@ -344,6 +344,47 @@
   }
 }
 
+void ARMCodeEmitter::emitMOVi2piecesInstruction(const MachineInstr &MI) {
+  const MachineOperand &MO0 = MI.getOperand(0);
+  const MachineOperand &MO1 = MI.getOperand(1);
+  assert(MO1.isImm() && "Not a valid so_imm value!");
+  unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO1.getImm());
+  unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO1.getImm());
+
+  // Emit the 'mov' instruction.
+  unsigned Binary = 0xd << 21;  // mov: Insts{24-21} = 0b1101
+
+  // Set the conditional execution predicate.
+  Binary |= II->getPredicate(&MI) << 28;
+
+  // Encode Rd.
+  Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift;
+
+  // Encode so_imm.
+  // Set bit I(25) to identify this is the immediate form of 
+  Binary |= 1 << ARMII::I_BitShift;
+  Binary |= getMachineSoImmOpValue(ARM_AM::getSOImmVal(V1));
+  emitWordLE(Binary);
+
+  // Now the 'orr' instruction.
+  Binary = 0xc << 21;  // orr: Insts{24-21} = 0b1100
+
+  // Set the conditional execution predicate.
+  Binary |= II->getPredicate(&MI) << 28;
+
+  // Encode Rd.
+  Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift;
+
+  // Encode Rn.
+  Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRnShift;
+
+  // Encode so_imm.
+  // Set bit I(25) to identify this is the immediate form of 
+  Binary |= 1 << ARMII::I_BitShift;
+  Binary |= getMachineSoImmOpValue(ARM_AM::getSOImmVal(V2));
+  emitWordLE(Binary);
+}
+
 void ARMCodeEmitter::addPCLabel(unsigned LabelID) {
   DOUT << "\t** LPC" << LabelID << " @ "
        << (void*)MCE.getCurrentPCValue() << '\n';
@@ -385,6 +426,10 @@
     emitMiscLoadStoreInstruction(MI, ARM::PC);
     break;
   }
+  case ARM::MOVi2pieces:
+    // Two instructions to materialize a constant.
+    emitMOVi2piecesInstruction(MI);
+    break;
   }
 }
 
@@ -447,14 +492,11 @@
   return Binary | ARM_AM::getSORegOffset(MO2.getImm()) << 7;
 }
 
-unsigned ARMCodeEmitter::getMachineSoImmOpValue(const MachineInstr &MI,
-                                                const TargetInstrDesc &TID,
-                                                const MachineOperand &MO) {
-  unsigned SoImm = MO.getImm();
+unsigned ARMCodeEmitter::getMachineSoImmOpValue(unsigned SoImm) {
   // Encode rotate_imm.
-  unsigned Binary = ARM_AM::getSOImmValRot(SoImm) << ARMII::RotImmShift;
+  unsigned Binary = (ARM_AM::getSOImmValRot(SoImm) >> 1) << ARMII::RotImmShift;
   // Encode immed_8.
-  Binary |= ARM_AM::getSOImmVal(SoImm);
+  Binary |= ARM_AM::getSOImmValImm(SoImm);
   return Binary;
 }
 
@@ -471,8 +513,6 @@
 void ARMCodeEmitter::emitDataProcessingInstruction(const MachineInstr &MI,
                                                    unsigned ImplicitRn) {
   const TargetInstrDesc &TID = MI.getDesc();
-  if (TID.getOpcode() == ARM::MOVi2pieces)
-    abort(); // FIXME
 
   // Part of binary is determined by TableGn.
   unsigned Binary = getBinaryCodeForInstr(MI);
@@ -521,7 +561,7 @@
   // Encode so_imm.
   // Set bit I(25) to identify this is the immediate form of 
   Binary |= 1 << ARMII::I_BitShift;
-  Binary |= getMachineSoImmOpValue(MI, TID, MO);
+  Binary |= getMachineSoImmOpValue(MO.getImm());
 
   emitWordLE(Binary);
 }

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58790&r1=58789&r2=58790&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Nov  5 20:25:39 2008
@@ -1195,9 +1195,9 @@
 
 // Two piece so_imms.
 let isReMaterializable = 1 in
-def MOVi2pieces : AI1x2<0x0, (outs GPR:$dst), (ins so_imm2part:$src), DPFrm,
+def MOVi2pieces : AI1x2<0x0, (outs GPR:$dst), (ins so_imm2part:$src), Pseudo,
                          "mov", " $dst, $src",
-                         [(set GPR:$dst, so_imm2part:$src)]>, UnaryDP;
+                         [(set GPR:$dst, so_imm2part:$src)]>;
 
 def : ARMPat<(or GPR:$LHS, so_imm2part:$RHS),
               (ORRri (ORRri GPR:$LHS, (so_imm2part_1 imm:$RHS)),

Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=58790&r1=58789&r2=58790&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Wed Nov  5 20:25:39 2008
@@ -363,8 +363,8 @@
   printSOImm(O, MO.getImm(), TAI);
 }
 
-/// printSOImm2PartOperand - SOImm is broken into two pieces using a mov
-/// followed by a or to materialize.
+/// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
+/// followed by an 'orr' to materialize.
 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
   const MachineOperand &MO = MI->getOperand(OpNum);
   assert(MO.isImm() && "Not a valid so_imm value!");




From isanbard at gmail.com  Wed Nov  5 20:29:10 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 06 Nov 2008 02:29:10 -0000
Subject: [llvm-commits] [llvm] r58791 - in /llvm/trunk:
 include/llvm/CodeGen/MachineFrameInfo.h include/llvm/Intrinsics.td
 lib/CodeGen/PrologEpilogInserter.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
 lib/CodeGen/StackProtector.cpp
Message-ID: <200811060229.mA62TBgi027457@zion.cs.uiuc.edu>

Author: void
Date: Wed Nov  5 20:29:10 2008
New Revision: 58791

URL: http://llvm.org/viewvc/llvm-project?rev=58791&view=rev
Log:
Implement the stack protector stack accesses via intrinsics:

- stackprotector_prologue creates a stack object and stores the guard there.

- stackprotector_epilogue reads the stack guard from the stack position created
  by stackprotector_prologue.

- The PrologEpilogInserter was changed to make sure that the stack guard is
  first on the stack frame.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h
    llvm/trunk/include/llvm/Intrinsics.td
    llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
    llvm/trunk/lib/CodeGen/StackProtector.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=58791&r1=58790&r2=58791&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Wed Nov  5 20:29:10 2008
@@ -150,6 +150,12 @@
   /// only valid during and after prolog/epilog code insertion.
   bool HasCalls;
 
+  /// HasStackProtector - Set to true if this function has stack protectors.
+  bool HasStackProtector;
+
+  /// StackProtectorIdx - The frame index for the stack protector.
+  int StackProtectorIdx;
+
   /// MaxCallFrameSize - This contains the size of the largest call frame if the
   /// target uses frame setup/destroy pseudo instructions (as defined in the
   /// TargetFrameInfo class).  This information is important for frame pointer
@@ -180,6 +186,8 @@
     HasVarSizedObjects = false;
     FrameAddressTaken = false;
     HasCalls = false;
+    HasStackProtector = false;
+    StackProtectorIdx = -1;
     MaxCallFrameSize = 0;
     MMI = 0;
   }
@@ -195,6 +203,17 @@
   ///
   bool hasVarSizedObjects() const { return HasVarSizedObjects; }
 
+  /// hasStackProtector - Return true if the function has a stack protector.
+  ///
+  bool hasStackProtector() const { return HasStackProtector; }
+  void setStackProtector(bool T) { HasStackProtector = T; }
+
+  /// getStackProtectorIndex/setStackProtectorIndex - Return the index for the
+  /// stack protector object.
+  ///
+  int getStackProtectorIndex() const { return StackProtectorIdx; }
+  void setStackProtectorIndex(int I) { StackProtectorIdx = I; }
+
   /// isFrameAddressTaken - This method may be called any time after instruction
   /// selection is complete to determine if there is a call to
   /// @llvm.frameaddress in this function.

Modified: llvm/trunk/include/llvm/Intrinsics.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Intrinsics.td?rev=58791&r1=58790&r2=58791&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Intrinsics.td (original)
+++ llvm/trunk/include/llvm/Intrinsics.td Wed Nov  5 20:29:10 2008
@@ -165,6 +165,7 @@
                         GCCBuiltin<"__builtin_stack_save">;
 def int_stackrestore  : Intrinsic<[llvm_void_ty, llvm_ptr_ty]>,
                         GCCBuiltin<"__builtin_stack_restore">;
+
 // IntrWriteArgMem is more pessimistic than strictly necessary for prefetch,
 // however it does conveniently prevent the prefetch from being reordered
 // with respect to nearby accesses to the same memory.
@@ -175,6 +176,10 @@
 
 def int_readcyclecounter : Intrinsic<[llvm_i64_ty]>;
 
+// Stack protector intrinsics.
+def int_stackprotector_prologue : Intrinsic<[llvm_void_ty, llvm_ptr_ty]>;
+def int_stackprotector_epilogue : Intrinsic<[llvm_ptr_ty]>;
+
 //===------------------- Standard C Library Intrinsics --------------------===//
 //
 

Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=58791&r1=58790&r2=58791&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original)
+++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Wed Nov  5 20:29:10 2008
@@ -406,6 +406,33 @@
     }
   }
 
+  // Make sure that the stack protector comes before the local variables on the
+  // stack.
+  if (FFI->hasStackProtector()) {
+    int FI = FFI->getStackProtectorIndex();
+
+    // If stack grows down, we need to add size of find the lowest
+    // address of the object.
+    if (StackGrowsDown)
+      Offset += FFI->getObjectSize(FI);
+
+    unsigned Align = FFI->getObjectAlignment(FI);
+
+    // If the alignment of this object is greater than that of the stack, then
+    // increase the stack alignment to match.
+    MaxAlign = std::max(MaxAlign, Align);
+
+    // Adjust to alignment boundary.
+    Offset = (Offset + Align - 1) / Align * Align;
+
+    if (StackGrowsDown) {
+      FFI->setObjectOffset(FI, -Offset); // Set the computed offset
+    } else {
+      FFI->setObjectOffset(FI, Offset);
+      Offset += FFI->getObjectSize(FI);
+    }
+  }
+
   // Then assign frame offsets to stack objects that are not used to spill
   // callee saved registers.
   for (unsigned i = 0, e = FFI->getObjectIndexEnd(); i != e; ++i) {

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp?rev=58791&r1=58790&r2=58791&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Wed Nov  5 20:29:10 2008
@@ -25,6 +25,7 @@
 #include "llvm/Instructions.h"
 #include "llvm/Intrinsics.h"
 #include "llvm/IntrinsicInst.h"
+#include "llvm/Module.h"
 #include "llvm/CodeGen/FastISel.h"
 #include "llvm/CodeGen/GCStrategy.h"
 #include "llvm/CodeGen/GCMetadata.h"
@@ -34,6 +35,7 @@
 #include "llvm/CodeGen/MachineJumpTableInfo.h"
 #include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/PseudoSourceValue.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Target/TargetData.h"
@@ -3793,6 +3795,47 @@
     DAG.setRoot(DAG.getNode(ISD::STACKRESTORE, MVT::Other, getRoot(), Tmp));
     return 0;
   }
+  case Intrinsic::stackprotector_prologue: {
+    // Emit code into the DAG to store the stack guard onto the stack.
+    MachineFunction &MF = DAG.getMachineFunction();
+    MachineFrameInfo *MFI = MF.getFrameInfo();
+    MVT PtrTy = TLI.getPointerTy();
+
+    // Retrieve the stack protector guard's value.
+    SDValue Src = getValue(I.getOperand(1));
+
+    // Create a slot on the stack for the stack protector. It should go first
+    // before local variables are allocated.
+    unsigned Align =
+      TLI.getTargetData()->getPrefTypeAlignment(PtrTy.getTypeForMVT());
+    int FI = MFI->CreateStackObject(PtrTy.getSizeInBits() / 8, Align);
+
+    MFI->setStackProtector(true);
+    MFI->setStackProtectorIndex(FI);
+
+    SDValue FIN = DAG.getFrameIndex(FI, PtrTy);
+
+    // Store the stack protector onto the stack.
+    SDValue Result = DAG.getStore(getRoot(), Src, FIN,
+                                  PseudoSourceValue::getFixedStack(FI),
+                                  0, true);
+    setValue(&I, Result);
+    DAG.setRoot(Result);
+    return 0;
+  }
+  case Intrinsic::stackprotector_epilogue: {
+    // Emit code into the DAG to retrieve the stack guard off of the stack.
+    MachineFunction &MF = DAG.getMachineFunction();
+    MachineFrameInfo *MFI = MF.getFrameInfo();
+    MVT PtrTy = TLI.getPointerTy();
+
+    // Load the value stored on the stack.
+    int FI = MFI->getStackProtectorIndex();
+    SDValue FIN = DAG.getFrameIndex(MFI->getStackProtectorIndex(), PtrTy);
+    setValue(&I, DAG.getLoad(PtrTy, getRoot(), FIN,
+                             PseudoSourceValue::getFixedStack(FI), 0, true));
+    return 0;
+  }
   case Intrinsic::var_annotation:
     // Discard annotate attributes
     return 0;

Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58791&r1=58790&r2=58791&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackProtector.cpp Wed Nov  5 20:29:10 2008
@@ -20,6 +20,7 @@
 #include "llvm/DerivedTypes.h"
 #include "llvm/Function.h"
 #include "llvm/Instructions.h"
+#include "llvm/Intrinsics.h"
 #include "llvm/Module.h"
 #include "llvm/Pass.h"
 #include "llvm/ADT/APInt.h"
@@ -110,16 +111,15 @@
   // onto the stack.
   BasicBlock &Entry = F->getEntryBlock();
   Instruction *InsertPt = &Entry.front();
+
   const PointerType *GuardTy = PointerType::getUnqual(Type::Int8Ty);
 
   // The global variable for the stack guard.
   Constant *StackGuardVar = M->getOrInsertGlobal("__stack_chk_guard", GuardTy);
-
-  // The place on the stack that the stack protector guard is kept.
-  AllocaInst *StackProtFrameSlot =
-    new AllocaInst(GuardTy, "StackProt_Frame", InsertPt);
   LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", false, InsertPt);
-  new StoreInst(LI, StackProtFrameSlot, false, InsertPt);
+  CallInst::
+    Create(Intrinsic::getDeclaration(M, Intrinsic::stackprotector_prologue),
+           LI, "", InsertPt);
 
   // Create the basic block to jump to when the guard check fails.
   BasicBlock *FailBB = CreateFailBB();
@@ -137,7 +137,7 @@
   //     %1 = load __stack_chk_guard
   //     %2 = load 
   //     %3 = cmp i1 %1, %2
-  //     br i1 %3, label %SPRet, label %CallStackCheckFailBlk
+  //     br i1 %3, label %SP_return, label %CallStackCheckFailBlk
   //
   //   SP_return:
   //     ret ...
@@ -161,9 +161,11 @@
     F->getBasicBlockList().insert(InsPt, NewBB);
 
     // Generate the stack protector instructions in the old basic block.
-    LoadInst *LI2 = new LoadInst(StackGuardVar, "", false, BB);
-    LoadInst *LI1 = new LoadInst(StackProtFrameSlot, "", true, BB);
-    ICmpInst *Cmp = new ICmpInst(CmpInst::ICMP_EQ, LI1, LI2, "", BB);
+    LoadInst *LI1 = new LoadInst(StackGuardVar, "", false, BB);
+    CallInst *CI = CallInst::
+      Create(Intrinsic::getDeclaration(M, Intrinsic::stackprotector_epilogue),
+             "", BB);
+    ICmpInst *Cmp = new ICmpInst(CmpInst::ICMP_EQ, CI, LI1, "", BB);
     BranchInst::Create(NewBB, FailBB, Cmp, BB);
   }
 




From isanbard at gmail.com  Wed Nov  5 20:38:58 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 06 Nov 2008 02:38:58 -0000
Subject: [llvm-commits] [llvm] r58792 -
	/llvm/trunk/lib/CodeGen/StackProtector.cpp
Message-ID: <200811060238.mA62cwHB027747@zion.cs.uiuc.edu>

Author: void
Date: Wed Nov  5 20:38:58 2008
New Revision: 58792

URL: http://llvm.org/viewvc/llvm-project?rev=58792&view=rev
Log:
Adjust the stack protector heuristic to care about only arrays or calls to
"alloca".

Modified:
    llvm/trunk/lib/CodeGen/StackProtector.cpp

Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58792&r1=58791&r2=58792&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackProtector.cpp Wed Nov  5 20:38:58 2008
@@ -184,7 +184,9 @@
 }
 
 /// RequiresStackProtector - Check whether or not this function needs a stack
-/// protector based upon the stack protector level.
+/// protector based upon the stack protector level. The heuristic we use is to
+/// add a guard variable to functions that call alloca, and functions with
+/// buffers larger than 8 bytes.
 bool StackProtector::RequiresStackProtector() const {
   switch (Level) {
   default: return false;
@@ -201,6 +203,8 @@
       for (BasicBlock::iterator
              II = BB->begin(), IE = BB->end(); II != IE; ++II)
         if (AllocaInst *AI = dyn_cast(II)) {
+          if (!AI->isArrayAllocation()) continue; // Only care about arrays.
+
           if (ConstantInt *CI = dyn_cast(AI->getArraySize())) {
             const Type *Ty = AI->getAllocatedType();
             uint64_t TySize = TD->getABITypeSize(Ty);
@@ -208,6 +212,10 @@
 
             if (SSPBufferSize <= StackSize)
               return true;
+          } else {
+            // This is a call to alloca with a variable size. Default to adding
+            // stack protectors.
+            return true;
           }
         }
     }




From evan.cheng at apple.com  Wed Nov  5 21:35:07 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 06 Nov 2008 03:35:07 -0000
Subject: [llvm-commits] [llvm] r58793 - in /llvm/trunk/lib/Target/ARM:
 ARMInstrFormats.td ARMInstrInfo.h ARMInstrInfo.td
Message-ID: <200811060335.mA63Z7EM029545@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Nov  5 21:35:07 2008
New Revision: 58793

URL: http://llvm.org/viewvc/llvm-project?rev=58793&view=rev
Log:
Handle smul, smulw, smla, smlaw.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58793&r1=58792&r2=58793&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Wed Nov  5 21:35:07 2008
@@ -21,26 +21,22 @@
 
 def Pseudo      : Format<1>;
 def MulFrm      : Format<2>;
-def MulSMLAW    : Format<3>;
-def MulSMULW    : Format<4>;
-def MulSMLA     : Format<5>;
-def MulSMUL     : Format<6>;
-def Branch      : Format<7>;
-def BranchMisc  : Format<8>;
-
-def DPFrm       : Format<9>;
-def DPSoRegFrm  : Format<10>;
-
-def LdFrm       : Format<11>;
-def StFrm       : Format<12>;
-def LdMiscFrm   : Format<13>;
-def StMiscFrm   : Format<14>;
-def LdMulFrm    : Format<15>;
-def StMulFrm    : Format<16>;
-
-def ArithMisc   : Format<17>;
-def ThumbFrm    : Format<18>;
-def VFPFrm      : Format<19>;
+def Branch      : Format<3>;
+def BranchMisc  : Format<4>;
+
+def DPFrm       : Format<5>;
+def DPSoRegFrm  : Format<6>;
+
+def LdFrm       : Format<7>;
+def StFrm       : Format<8>;
+def LdMiscFrm   : Format<9>;
+def StMiscFrm   : Format<10>;
+def LdMulFrm    : Format<11>;
+def StMulFrm    : Format<12>;
+
+def ArithMisc   : Format<13>;
+def ThumbFrm    : Format<14>;
+def VFPFrm      : Format<15>;
 
 // Misc flag for data processing instructions that indicates whether
 // the instruction has a Rn register operand.
@@ -704,6 +700,17 @@
   let Inst{27-21} = mulopc;
 }
 
+// SMUL / SMULW / SMLA / SMLAW
+class AMulxyI mulopc, dag oops, dag iops, string opc,
+         string asm, list pattern>
+  : I<0, oops, iops, AddrModeNone, Size4Bytes, IndexModeNone, MulFrm, opc,
+      asm,"",pattern> {
+  let Inst{4}     = 0;
+  let Inst{7}     = 1;
+  let Inst{20}    = 0;
+  let Inst{27-21} = mulopc;
+}
+
 //===----------------------------------------------------------------------===//
 
 // ARMPat - Same as Pat<>, but requires that the compiler be in ARM mode.

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=58793&r1=58792&r2=58793&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Wed Nov  5 21:35:07 2008
@@ -74,42 +74,38 @@
     // Instruction encoding formats.
     //
     FormShift   = 14,
-    FormMask    = 0x1f << FormShift,
+    FormMask    = 0xf << FormShift,
 
     // Pseudo instructions
     Pseudo      = 1 << FormShift,
 
     // Multiply instructions
     MulFrm      = 2 << FormShift,
-    MulSMLAW    = 3 << FormShift,
-    MulSMULW    = 4 << FormShift,
-    MulSMLA     = 5 << FormShift,
-    MulSMUL     = 6 << FormShift,
 
     // Branch instructions
-    Branch      = 7 << FormShift,
-    BranchMisc  = 8 << FormShift,
+    Branch      = 3 << FormShift,
+    BranchMisc  = 4 << FormShift,
 
     // Data Processing instructions
-    DPFrm       = 9  << FormShift,
-    DPSoRegFrm  = 10 << FormShift,
+    DPFrm       = 5 << FormShift,
+    DPSoRegFrm  = 6 << FormShift,
 
     // Load and Store
-    LdFrm       = 11 << FormShift,
-    StFrm       = 12 << FormShift,
-    LdMiscFrm   = 13 << FormShift,
-    StMiscFrm   = 14 << FormShift,
-    LdMulFrm    = 15 << FormShift,
-    StMulFrm    = 16 << FormShift,
+    LdFrm       = 7  << FormShift,
+    StFrm       = 8  << FormShift,
+    LdMiscFrm   = 9  << FormShift,
+    StMiscFrm   = 10 << FormShift,
+    LdMulFrm    = 11 << FormShift,
+    StMulFrm    = 12 << FormShift,
 
     // Miscellaneous arithmetic instructions
-    ArithMisc   = 17 << FormShift,
+    ArithMisc   = 13 << FormShift,
 
     // Thumb format
-    ThumbFrm    = 18 << FormShift,
+    ThumbFrm    = 14 << FormShift,
 
     // VFP format
-    VPFFrm      = 19 << FormShift,
+    VPFFrm      = 15 << FormShift,
 
     //===------------------------------------------------------------------===//
     // Field shifts - such shifts are used to set field while generating

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58793&r1=58792&r2=58793&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Nov  5 21:35:07 2008
@@ -962,87 +962,121 @@
 
 // FIXME: encoding
 multiclass AI_smul {
-  def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL,
+  def BB : AMulxyI<0b0001011, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
               !strconcat(opc, "bb"), " $dst, $a, $b",
               [(set GPR:$dst, (opnode (sext_inreg GPR:$a, i16),
                                       (sext_inreg GPR:$b, i16)))]>,
-           Requires<[IsARM, HasV5TE]>;
+           Requires<[IsARM, HasV5TE]> {
+             let Inst{5} = 0;
+             let Inst{6} = 0;
+           }
 
-  def BT : AI<0xC, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL,
+  def BT : AMulxyI<0b0001011, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
               !strconcat(opc, "bt"), " $dst, $a, $b",
               [(set GPR:$dst, (opnode (sext_inreg GPR:$a, i16),
                                       (sra GPR:$b, 16)))]>,
-           Requires<[IsARM, HasV5TE]>;
+           Requires<[IsARM, HasV5TE]> {
+             let Inst{5} = 0;
+             let Inst{6} = 1;
+           }
 
-  def TB : AI<0xA, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL,
+  def TB : AMulxyI<0b0001011, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
               !strconcat(opc, "tb"), " $dst, $a, $b",
               [(set GPR:$dst, (opnode (sra GPR:$a, 16),
                                       (sext_inreg GPR:$b, i16)))]>,
-           Requires<[IsARM, HasV5TE]>;
+           Requires<[IsARM, HasV5TE]> {
+             let Inst{5} = 1;
+             let Inst{6} = 0;
+           }
 
-  def TT : AI<0xE, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMUL,
+  def TT : AMulxyI<0b0001011, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
               !strconcat(opc, "tt"), " $dst, $a, $b",
               [(set GPR:$dst, (opnode (sra GPR:$a, 16),
                                       (sra GPR:$b, 16)))]>,
-            Requires<[IsARM, HasV5TE]>;
+            Requires<[IsARM, HasV5TE]> {
+             let Inst{5} = 1;
+             let Inst{6} = 1;
+           }
 
-  def WB : AI<0xA, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMULW,
+  def WB : AMulxyI<0b0001001, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
               !strconcat(opc, "wb"), " $dst, $a, $b",
               [(set GPR:$dst, (sra (opnode GPR:$a,
                                     (sext_inreg GPR:$b, i16)), 16))]>,
-           Requires<[IsARM, HasV5TE]>;
+           Requires<[IsARM, HasV5TE]> {
+             let Inst{5} = 1;
+             let Inst{6} = 0;
+           }
 
-  def WT : AI<0xE, (outs GPR:$dst), (ins GPR:$a, GPR:$b), MulSMULW,
+  def WT : AMulxyI<0b0001001, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
               !strconcat(opc, "wt"), " $dst, $a, $b",
               [(set GPR:$dst, (sra (opnode GPR:$a,
                                     (sra GPR:$b, 16)), 16))]>,
-            Requires<[IsARM, HasV5TE]>;
+            Requires<[IsARM, HasV5TE]> {
+             let Inst{5} = 1;
+             let Inst{6} = 1;
+           }
 }
 
 
 // FIXME: encoding
 multiclass AI_smla {
-  def BB : AI<0x8, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), MulSMLA,
+  def BB : AMulxyI<0b0001000, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc),
               !strconcat(opc, "bb"), " $dst, $a, $b, $acc",
               [(set GPR:$dst, (add GPR:$acc,
                                (opnode (sext_inreg GPR:$a, i16),
                                        (sext_inreg GPR:$b, i16))))]>,
-           Requires<[IsARM, HasV5TE]>;
+           Requires<[IsARM, HasV5TE]> {
+             let Inst{5} = 0;
+             let Inst{6} = 0;
+           }
 
-  def BT : AI<0xC, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), MulSMLA,
+  def BT : AMulxyI<0b0001000, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc),
               !strconcat(opc, "bt"), " $dst, $a, $b, $acc",
               [(set GPR:$dst, (add GPR:$acc, (opnode (sext_inreg GPR:$a, i16),
                                                      (sra GPR:$b, 16))))]>,
-           Requires<[IsARM, HasV5TE]>;
+           Requires<[IsARM, HasV5TE]> {
+             let Inst{5} = 0;
+             let Inst{6} = 1;
+           }
 
-  def TB : AI<0xA, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), MulSMLA,
+  def TB : AMulxyI<0b0001000, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc),
               !strconcat(opc, "tb"), " $dst, $a, $b, $acc",
               [(set GPR:$dst, (add GPR:$acc, (opnode (sra GPR:$a, 16),
                                                  (sext_inreg GPR:$b, i16))))]>,
-           Requires<[IsARM, HasV5TE]>;
+           Requires<[IsARM, HasV5TE]> {
+             let Inst{5} = 1;
+             let Inst{6} = 0;
+           }
 
-  def TT : AI<0xE, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), MulSMLA,
+  def TT : AMulxyI<0b0001000, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc),
               !strconcat(opc, "tt"), " $dst, $a, $b, $acc",
               [(set GPR:$dst, (add GPR:$acc, (opnode (sra GPR:$a, 16),
                                                      (sra GPR:$b, 16))))]>,
-            Requires<[IsARM, HasV5TE]>;
+            Requires<[IsARM, HasV5TE]> {
+             let Inst{5} = 1;
+             let Inst{6} = 1;
+           }
 
-  def WB : AI<0xA, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), MulSMLAW,
+  def WB : AMulxyI<0b0001001, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc),
               !strconcat(opc, "wb"), " $dst, $a, $b, $acc",
               [(set GPR:$dst, (add GPR:$acc, (sra (opnode GPR:$a,
                                             (sext_inreg GPR:$b, i16)), 16)))]>,
-           Requires<[IsARM, HasV5TE]>;
+           Requires<[IsARM, HasV5TE]> {
+             let Inst{5} = 0;
+             let Inst{6} = 0;
+           }
 
-  def WT : AI<0xE, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc), MulSMLAW,
+  def WT : AMulxyI<0b0001001, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc),
               !strconcat(opc, "wt"), " $dst, $a, $b, $acc",
               [(set GPR:$dst, (add GPR:$acc, (sra (opnode GPR:$a,
                                                    (sra GPR:$b, 16)), 16)))]>,
-            Requires<[IsARM, HasV5TE]>;
+            Requires<[IsARM, HasV5TE]> {
+             let Inst{5} = 0;
+             let Inst{6} = 1;
+           }
 }
 
-// FIXME: encoding
 defm SMUL : AI_smul<"smul", BinOpFrag<(mul node:$LHS, node:$RHS)>>;
-// FIXME: encoding
 defm SMLA : AI_smla<"smla", BinOpFrag<(mul node:$LHS, node:$RHS)>>;
 
 // TODO: Halfword multiple accumulate long: SMLAL




From nicholas at mxc.ca  Wed Nov  5 22:52:50 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Thu, 06 Nov 2008 04:52:50 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r58794 -
	/llvm-gcc-4.2/trunk/gcc/cp/method.c
Message-ID: <200811060452.mA64qoEY031756@zion.cs.uiuc.edu>

Author: nicholas
Date: Wed Nov  5 22:52:49 2008
New Revision: 58794

URL: http://llvm.org/viewvc/llvm-project?rev=58794&view=rev
Log:
Remove this "gross hack", now that aliases are supported. This shouldn't have
any impact on platforms without alias support, such as Darwin.

Modified:
    llvm-gcc-4.2/trunk/gcc/cp/method.c

Modified: llvm-gcc-4.2/trunk/gcc/cp/method.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/method.c?rev=58794&r1=58793&r2=58794&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/cp/method.c (original)
+++ llvm-gcc-4.2/trunk/gcc/cp/method.c Wed Nov  5 22:52:49 2008
@@ -354,14 +354,7 @@
   if (!emit_p)
     return;
 
-  /* LLVM LOCAL begin */
-  /* PR843 */
-#ifndef ENABLE_LLVM
   if (TARGET_USE_LOCAL_THUNK_ALIAS_P (function))
-#else
-  if (0 && TARGET_USE_LOCAL_THUNK_ALIAS_P (function))
-#endif
-  /* LLVM LOCAL end */
    alias = make_alias_for_thunk (function);
   else
    alias = function;




From wangmp at apple.com  Wed Nov  5 23:31:54 2008
From: wangmp at apple.com (Mon P Wang)
Date: Thu, 06 Nov 2008 05:31:54 -0000
Subject: [llvm-commits] [llvm] r58796 - in /llvm/trunk/lib:
 CodeGen/SelectionDAG/LegalizeDAG.cpp CodeGen/SelectionDAG/LegalizeTypes.h
 CodeGen/SelectionDAG/TargetLowering.cpp Target/X86/X86ISelLowering.cpp
Message-ID: <200811060531.mA65VtDh000509@zion.cs.uiuc.edu>

Author: wangmp
Date: Wed Nov  5 23:31:54 2008
New Revision: 58796

URL: http://llvm.org/viewvc/llvm-project?rev=58796&view=rev
Log:
Widening cleanup

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=58796&r1=58795&r2=58796&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Nov  5 23:31:54 2008
@@ -100,9 +100,9 @@
   /// processed to the result.
   std::map ScalarizedNodes;
   
-  /// WidenNodes - For nodes that need to be widen from one vector type to
-  /// another, this contains the mapping of ones we have already widen.  This
-  /// allows us to avoid widening more than once.
+  /// WidenNodes - For nodes that need to be widened from one vector type to
+  /// another, this contains the mapping of those that we have already widen.
+  /// This allows us to avoid widening more than once.
   std::map WidenNodes;
 
   void AddLegalizedOperand(SDValue From, SDValue To) {
@@ -117,7 +117,7 @@
     // If someone requests legalization of the new node, return itself.
     LegalizedNodes.insert(std::make_pair(To, To));
   }
-  void AddWidenOperand(SDValue From, SDValue To) {
+  void AddWidenedOperand(SDValue From, SDValue To) {
     bool isNew = WidenNodes.insert(std::make_pair(From, To)).second;
     assert(isNew && "Got into the map somehow?");
     // If someone requests legalization of the new node, return itself.
@@ -180,13 +180,12 @@
   /// types.
   void ExpandOp(SDValue O, SDValue &Lo, SDValue &Hi);
 
-  /// WidenVectorOp - Widen a vector operation in order to do the computation
-  /// in a wider type given to a wider type given by WidenVT (e.g., v3i32 to
-  /// v4i32).  The produced value will have the correct value for the existing
-  /// elements but no guarantee is made about the new elements at the end of
-  /// the vector: it may be zero, sign-extended, or garbage.  This is useful
-  /// when we have instruction operating on an illegal vector type and we want
-  /// to widen it to do the computation on a legal wider vector type.
+  /// WidenVectorOp - Widen a vector operation to a wider type given by WidenVT 
+  /// (e.g., v3i32 to v4i32).  The produced value will have the correct value
+  /// for the existing elements but no guarantee is made about the new elements
+  /// at the end of the vector: it may be zero, ones, or garbage. This is useful
+  /// when we have an instruction operating on an illegal vector type and we
+  /// want to widen it to do the computation on a legal wider vector type.
   SDValue WidenVectorOp(SDValue Op, MVT WidenVT);
 
   /// SplitVectorOp - Given an operand of vector type, break it down into
@@ -198,7 +197,7 @@
   /// scalar (e.g. f32) value.
   SDValue ScalarizeVectorOp(SDValue O);
   
-  /// Useful 16 element vector used to pass operands for widening
+  /// Useful 16 element vector type that is used to pass operands for widening.
   typedef SmallVector SDValueVector;  
   
   /// LoadWidenVectorOp - Load a vector for a wider type. Returns true if
@@ -7583,8 +7582,7 @@
   // the legal type, the resulting code will be more efficient.  If this is not
   // the case, the resulting code will preform badly as we end up generating
   // code to pack/unpack the results. It is the function that calls widen
-  // that is responsible for seeing this doesn't happen.  For some cases, we
-  // have decided that it is not worth widening so we just split the operation.
+  // that is responsible for seeing this doesn't happen.
   switch (Node->getOpcode()) {
   default: 
 #ifndef NDEBUG
@@ -8017,7 +8015,7 @@
   if (Result != Op)
     Result = LegalizeOp(Result);
 
-  AddWidenOperand(Op, Result);
+  AddWidenedOperand(Op, Result);
   return Result;
 }
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=58796&r1=58795&r2=58796&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Wed Nov  5 23:31:54 2008
@@ -80,13 +80,14 @@
       return Legal;
     case TargetLowering::Promote:
       // Promote can mean
-      //   1) On integers, it means to promote type (e.g., i8 to i32)
-      //   2) For vectors, it means try to widen (e.g., v3i32 to v4i32)
+      //   1) On integers, use the promote integer type (e.g., i8 to i32)
+      //   2) For vectors, use the widen vector type returned by the target
+      //      (e.g., v3i32 to v4i32).  If the type is the same as the original
+      //      type, than expand the vector instead.
       if (!VT.isVector()) {
         return PromoteInteger;
-      }
-      else {
-        // TODO: move widen code to LegalizeType
+      } else {
+        // TODO: move widen code to LegalizeType.
         if (VT.getVectorNumElements() == 1) {
           return ScalarizeVector;
         } else {

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=58796&r1=58795&r2=58796&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Nov  5 23:31:54 2008
@@ -645,7 +645,7 @@
 /// getWidenVectorType: given a vector type, returns the type to widen to
 /// (e.g., v7i8 to v8i8). If the vector type is legal, it returns itself.
 /// If there is no vector type that we want to widen to, returns MVT::Other
-/// When and were to widen is target dependent based on the cost of
+/// When and where to widen is target dependent based on the cost of
 /// scalarizing vs using the wider vector type.
 MVT TargetLowering::getWidenVectorType(MVT VT) {
   assert(VT.isVector());

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=58796&r1=58795&r2=58796&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Nov  5 23:31:54 2008
@@ -523,7 +523,7 @@
   setOperationAction(ISD::FEXP, MVT::f80, Expand);
   setOperationAction(ISD::FEXP2, MVT::f80, Expand);
 
-  // First set operation action for all vector types to either to promote
+  // First set operation action for all vector types to either promote
   // (for widening) or expand (for scalarization). Then we will selectively
   // turn on ones that can be effectively codegen'd.
   for (unsigned VT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
@@ -544,8 +544,6 @@
     setOperationAction(ISD::VECTOR_SHUFFLE, (MVT::SimpleValueType)VT, Expand);
     setOperationAction(ISD::EXTRACT_VECTOR_ELT,(MVT::SimpleValueType)VT,Expand);
     setOperationAction(ISD::INSERT_VECTOR_ELT,(MVT::SimpleValueType)VT, Expand);
-    setOperationAction(ISD::EXTRACT_SUBVECTOR,(MVT::SimpleValueType)VT, Expand);
-    setOperationAction(ISD::CONCAT_VECTORS,(MVT::SimpleValueType)VT, Expand);
     setOperationAction(ISD::FABS, (MVT::SimpleValueType)VT, Expand);
     setOperationAction(ISD::FSIN, (MVT::SimpleValueType)VT, Expand);
     setOperationAction(ISD::FCOS, (MVT::SimpleValueType)VT, Expand);
@@ -7852,7 +7850,7 @@
 /// getWidenVectorType: given a vector type, returns the type to widen
 /// to (e.g., v7i8 to v8i8). If the vector type is legal, it returns itself.
 /// If there is no vector type that we want to widen to, returns MVT::Other
-/// When and were to widen is target dependent based on the cost of
+/// When and where to widen is target dependent based on the cost of
 /// scalarizing vs using the wider vector type.
 
 MVT X86TargetLowering::getWidenVectorType(MVT VT) {




From evan.cheng at apple.com  Thu Nov  6 00:12:08 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 5 Nov 2008 22:12:08 -0800
Subject: [llvm-commits] [llvm] r58791 - in /llvm/trunk:
	include/llvm/CodeGen/MachineFrameInfo.h include/llvm/Intrinsics.td
	lib/CodeGen/PrologEpilogInserter.cpp
	lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
	lib/CodeGen/StackProtector.cpp
In-Reply-To: <200811060229.mA62TBgi027457@zion.cs.uiuc.edu>
References: <200811060229.mA62TBgi027457@zion.cs.uiuc.edu>
Message-ID: <0EBA97CA-A8AA-4566-91A7-B6F54A59C788@apple.com>


On Nov 5, 2008, at 6:29 PM, Bill Wendling wrote:

>
>
> Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=58791&r1=58790&r2=58791&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Wed Nov  5  
> 20:29:10 2008
> @@ -150,6 +150,12 @@
>   /// only valid during and after prolog/epilog code insertion.
>   bool HasCalls;
>
> +  /// HasStackProtector - Set to true if this function has stack  
> protectors.
> +  bool HasStackProtector;

There is no need for HasStackProtector. If StackProtectorIndex is  
negative (fixed object), then the MF doesn't have one.

>
> +
> +  /// StackProtectorIdx - The frame index for the stack protector.
> +  int StackProtectorIdx;
> +
>   /// MaxCallFrameSize - This contains the size of the largest call  
> frame if the
>   /// target uses frame setup/destroy pseudo instructions (as  
> defined in the
>   /// TargetFrameInfo class).  This information is important for  
> frame pointer
> @@ -180,6 +186,8 @@
>     HasVarSizedObjects = false;
>     FrameAddressTaken = false;
>     HasCalls = false;
> +    HasStackProtector = false;
> +    StackProtectorIdx = -1;
>     MaxCallFrameSize = 0;
>     MMI = 0;
>   }
> @@ -195,6 +203,17 @@
>   ///
>   bool hasVarSizedObjects() const { return HasVarSizedObjects; }
>
> +  /// hasStackProtector - Return true if the function has a stack  
> protector.
> +  ///
> +  bool hasStackProtector() const { return HasStackProtector; }
> +  void setStackProtector(bool T) { HasStackProtector = T; }
> +
> +  /// getStackProtectorIndex/setStackProtectorIndex - Return the  
> index for the
> +  /// stack protector object.
> +  ///
> +  int getStackProtectorIndex() const { return StackProtectorIdx; }
> +  void setStackProtectorIndex(int I) { StackProtectorIdx = I; }
> +
>   /// isFrameAddressTaken - This method may be called any time after  
> instruction
>   /// selection is complete to determine if there is a call to
>   /// @llvm.frameaddress in this function.
>
> Modified: llvm/trunk/include/llvm/Intrinsics.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Intrinsics.td?rev=58791&r1=58790&r2=58791&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/include/llvm/Intrinsics.td (original)
> +++ llvm/trunk/include/llvm/Intrinsics.td Wed Nov  5 20:29:10 2008
> @@ -165,6 +165,7 @@
>                         GCCBuiltin<"__builtin_stack_save">;
> def int_stackrestore  : Intrinsic<[llvm_void_ty, llvm_ptr_ty]>,
>                         GCCBuiltin<"__builtin_stack_restore">;
> +
> // IntrWriteArgMem is more pessimistic than strictly necessary for  
> prefetch,
> // however it does conveniently prevent the prefetch from being  
> reordered
> // with respect to nearby accesses to the same memory.
> @@ -175,6 +176,10 @@
>
> def int_readcyclecounter : Intrinsic<[llvm_i64_ty]>;
>
> +// Stack protector intrinsics.
> +def int_stackprotector_prologue : Intrinsic<[llvm_void_ty,  
> llvm_ptr_ty]>;
> +def int_stackprotector_epilogue : Intrinsic<[llvm_ptr_ty]>;

Comments? How are these used? Do they read / write memory?

>
> +
> //===------------------- Standard C Library Intrinsics  
> --------------------===//
> //
>
>
> Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=58791&r1=58790&r2=58791&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original)
> +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Wed Nov  5  
> 20:29:10 2008
> @@ -406,6 +406,33 @@
>     }
>   }
>
> +  // Make sure that the stack protector comes before the local  
> variables on the
> +  // stack.
> +  if (FFI->hasStackProtector()) {
> +    int FI = FFI->getStackProtectorIndex();
> +
> +    // If stack grows down, we need to add size of find the lowest
> +    // address of the object.
> +    if (StackGrowsDown)
> +      Offset += FFI->getObjectSize(FI);
> +
> +    unsigned Align = FFI->getObjectAlignment(FI);
> +
> +    // If the alignment of this object is greater than that of the  
> stack, then
> +    // increase the stack alignment to match.
> +    MaxAlign = std::max(MaxAlign, Align);
> +
> +    // Adjust to alignment boundary.
> +    Offset = (Offset + Align - 1) / Align * Align;
> +
> +    if (StackGrowsDown) {
> +      FFI->setObjectOffset(FI, -Offset); // Set the computed offset
> +    } else {
> +      FFI->setObjectOffset(FI, Offset);
> +      Offset += FFI->getObjectSize(FI);
> +    }
> +  }
> +
>   // Then assign frame offsets to stack objects that are not used to  
> spill
>   // callee saved registers.
>   for (unsigned i = 0, e = FFI->getObjectIndexEnd(); i != e; ++i) {
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp?rev=58791&r1=58790&r2=58791&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp  
> (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Wed  
> Nov  5 20:29:10 2008
> @@ -25,6 +25,7 @@
> #include "llvm/Instructions.h"
> #include "llvm/Intrinsics.h"
> #include "llvm/IntrinsicInst.h"
> +#include "llvm/Module.h"
> #include "llvm/CodeGen/FastISel.h"
> #include "llvm/CodeGen/GCStrategy.h"
> #include "llvm/CodeGen/GCMetadata.h"
> @@ -34,6 +35,7 @@
> #include "llvm/CodeGen/MachineJumpTableInfo.h"
> #include "llvm/CodeGen/MachineModuleInfo.h"
> #include "llvm/CodeGen/MachineRegisterInfo.h"
> +#include "llvm/CodeGen/PseudoSourceValue.h"
> #include "llvm/CodeGen/SelectionDAG.h"
> #include "llvm/Target/TargetRegisterInfo.h"
> #include "llvm/Target/TargetData.h"
> @@ -3793,6 +3795,47 @@
>     DAG.setRoot(DAG.getNode(ISD::STACKRESTORE, MVT::Other,  
> getRoot(), Tmp));
>     return 0;
>   }
> +  case Intrinsic::stackprotector_prologue: {

Ok. Perhaps call this stackprotector_create? And change  
stackprotector_epilogue to stackprotector_check?

Evan

>
> +    // Emit code into the DAG to store the stack guard onto the  
> stack.
> +    MachineFunction &MF = DAG.getMachineFunction();
> +    MachineFrameInfo *MFI = MF.getFrameInfo();
> +    MVT PtrTy = TLI.getPointerTy();
> +
> +    // Retrieve the stack protector guard's value.
> +    SDValue Src = getValue(I.getOperand(1));
> +
> +    // Create a slot on the stack for the stack protector. It  
> should go first
> +    // before local variables are allocated.
> +    unsigned Align =
> +      TLI.getTargetData()- 
> >getPrefTypeAlignment(PtrTy.getTypeForMVT());
> +    int FI = MFI->CreateStackObject(PtrTy.getSizeInBits() / 8,  
> Align);
> +
> +    MFI->setStackProtector(true);
> +    MFI->setStackProtectorIndex(FI);
> +
> +    SDValue FIN = DAG.getFrameIndex(FI, PtrTy);
> +
> +    // Store the stack protector onto the stack.
> +    SDValue Result = DAG.getStore(getRoot(), Src, FIN,
> +                                   
> PseudoSourceValue::getFixedStack(FI),
> +                                  0, true);
> +    setValue(&I, Result);
> +    DAG.setRoot(Result);
> +    return 0;
> +  }
> +  case Intrinsic::stackprotector_epilogue: {
> +    // Emit code into the DAG to retrieve the stack guard off of  
> the stack.
> +    MachineFunction &MF = DAG.getMachineFunction();
> +    MachineFrameInfo *MFI = MF.getFrameInfo();
> +    MVT PtrTy = TLI.getPointerTy();
> +
> +    // Load the value stored on the stack.
> +    int FI = MFI->getStackProtectorIndex();
> +    SDValue FIN = DAG.getFrameIndex(MFI->getStackProtectorIndex(),  
> PtrTy);
> +    setValue(&I, DAG.getLoad(PtrTy, getRoot(), FIN,
> +                             PseudoSourceValue::getFixedStack(FI),  
> 0, true));
> +    return 0;
> +  }
>   case Intrinsic::var_annotation:
>     // Discard annotate attributes
>     return 0;
>
> Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58791&r1=58790&r2=58791&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
> +++ llvm/trunk/lib/CodeGen/StackProtector.cpp Wed Nov  5 20:29:10 2008
> @@ -20,6 +20,7 @@
> #include "llvm/DerivedTypes.h"
> #include "llvm/Function.h"
> #include "llvm/Instructions.h"
> +#include "llvm/Intrinsics.h"
> #include "llvm/Module.h"
> #include "llvm/Pass.h"
> #include "llvm/ADT/APInt.h"
> @@ -110,16 +111,15 @@
>   // onto the stack.
>   BasicBlock &Entry = F->getEntryBlock();
>   Instruction *InsertPt = &Entry.front();
> +
>   const PointerType *GuardTy = PointerType::getUnqual(Type::Int8Ty);
>
>   // The global variable for the stack guard.
>   Constant *StackGuardVar = M- 
> >getOrInsertGlobal("__stack_chk_guard", GuardTy);
> -
> -  // The place on the stack that the stack protector guard is kept.
> -  AllocaInst *StackProtFrameSlot =
> -    new AllocaInst(GuardTy, "StackProt_Frame", InsertPt);
>   LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", false,  
> InsertPt);
> -  new StoreInst(LI, StackProtFrameSlot, false, InsertPt);
> +  CallInst::
> +    Create(Intrinsic::getDeclaration(M,  
> Intrinsic::stackprotector_prologue),
> +           LI, "", InsertPt);
>
>   // Create the basic block to jump to when the guard check fails.
>   BasicBlock *FailBB = CreateFailBB();
> @@ -137,7 +137,7 @@
>   //     %1 = load __stack_chk_guard
>   //     %2 = load 
>   //     %3 = cmp i1 %1, %2
> -  //     br i1 %3, label %SPRet, label %CallStackCheckFailBlk
> +  //     br i1 %3, label %SP_return, label %CallStackCheckFailBlk
>   //
>   //   SP_return:
>   //     ret ...
> @@ -161,9 +161,11 @@
>     F->getBasicBlockList().insert(InsPt, NewBB);
>
>     // Generate the stack protector instructions in the old basic  
> block.
> -    LoadInst *LI2 = new LoadInst(StackGuardVar, "", false, BB);
> -    LoadInst *LI1 = new LoadInst(StackProtFrameSlot, "", true, BB);
> -    ICmpInst *Cmp = new ICmpInst(CmpInst::ICMP_EQ, LI1, LI2, "", BB);
> +    LoadInst *LI1 = new LoadInst(StackGuardVar, "", false, BB);
> +    CallInst *CI = CallInst::
> +      Create(Intrinsic::getDeclaration(M,  
> Intrinsic::stackprotector_epilogue),
> +             "", BB);
> +    ICmpInst *Cmp = new ICmpInst(CmpInst::ICMP_EQ, CI, LI1, "", BB);
>     BranchInst::Create(NewBB, FailBB, Cmp, BB);
>   }
>
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From evan.cheng at apple.com  Thu Nov  6 00:16:48 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 5 Nov 2008 22:16:48 -0800
Subject: [llvm-commits] [Patch] XCore Backend, part 1
In-Reply-To: <49117A07.90000@xmos.com>
References: <49117A07.90000@xmos.com>
Message-ID: <3E7092AB-4BEC-4B93-9353-BE9482DA309A@apple.com>

Where is part 2? :-) Is it just me that's missing the email?

Evan

On Nov 5, 2008, at 2:48 AM, Richard Osborne wrote:

> What follows is the first of a series of patches to add support for  
> the XCore processor from XMOS. I've split the changes into multiple  
> patches on Chris' advice so each part may be reviewed before being  
> commited.
>
> This patch contains the target description files. The instruction  
> formats are incomplete (all instructions are encoded as 0) and not  
> all instructions in the instruction set are targeted (the comments  
> in XCoreInstrInfo.td indicate those which are missing).
>
> OK to commit?
>
> Richard Osborne | XMOS
> http://www.xmos.com
>
> Index: lib/Target/XCore/XCoreInstrFormats.td
> ===================================================================
> --- lib/Target/XCore/XCoreInstrFormats.td	(revision 0)
> +++ lib/Target/XCore/XCoreInstrFormats.td	(revision 0)
> @@ -0,0 +1,120 @@
> +//===- XCoreInstrFormats.td - XCore Instruction Formats ----*-  
> tablegen -*-===//
> +//
> +//                     The LLVM Compiler Infrastructure
> +//
> +// This file is distributed under the University of Illinois Open  
> Source
> +// License. See LICENSE.TXT for details.
> +//
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// Instruction format superclass
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +class InstXCore pattern>
> +    : Instruction {
> +  field bits<32> Inst;
> +
> +  let Namespace = "XCore";
> +  dag OutOperandList = outs;
> +  dag InOperandList = ins;
> +  let AsmString   = asmstr;
> +  let Pattern = pattern;
> +}
> +
> +// XCore pseudo instructions format
> +class PseudoInstXCore  
> pattern>
> +   : InstXCore;
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// Instruction formats
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +class _F3R pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _FL3R pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _F2RUS pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _FL2RUS pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _FRU6 pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _FLRU6 pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _FU6 pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _FLU6 pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _FU10 pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _FLU10 pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _F2R pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _FRUS pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _FL2R pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _F1R pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _F0R pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _L4R pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _L5R pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> +
> +class _L6R pattern>
> +    : InstXCore {
> +  let Inst{31-0} = 0;
> +}
> Index: lib/Target/XCore/XCoreInstrInfo.td
> ===================================================================
> --- lib/Target/XCore/XCoreInstrInfo.td	(revision 0)
> +++ lib/Target/XCore/XCoreInstrInfo.td	(revision 0)
> @@ -0,0 +1,980 @@
> +//===- XCoreInstrInfo.td - Target Description for XCore ----*-  
> tablegen -*-===//
> +//
> +//                     The LLVM Compiler Infrastructure
> +//
> +// This file is distributed under the University of Illinois Open  
> Source
> +// License. See LICENSE.TXT for details.
> +//
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +//
> +// This file describes the XCore instructions in TableGen format.
> +//
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +// Uses of CP, DP are not currently reflected in the patterns, since
> +// having a physical register as an operand prevents loop hoisting  
> and
> +// since the value of these registers never changes during the life  
> of the
> +// function.
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// Instruction format superclass.
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +include "XCoreInstrFormats.td"
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// Feature predicates.
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +// HasXS1A - This predicate is true when the target processor  
> supports XS1A
> +// instructions.
> +def HasXS1A   : Predicate<"Subtarget.isXS1A()">;
> +
> +// HasXS1B - This predicate is true when the target processor  
> supports XS1B
> +// instructions.
> +def HasXS1B : Predicate<"Subtarget.isXS1B()">;
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// XCore specific DAG Nodes.
> +//
> +
> +// Call
> +def SDT_XCoreBranchLink : SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>;
> +def XCoreBranchLink     : SDNode<"XCoreISD::BL",SDT_XCoreBranchLink,
> +                            [SDNPHasChain, SDNPOptInFlag,  
> SDNPOutFlag]>;
> +
> +def XCoreRetsp       : SDNode<"XCoreISD::RETSP", SDTNone,
> +                         [SDNPHasChain, SDNPOptInFlag]>;
> +
> +def SDT_XCoreAddress    : SDTypeProfile<1, 1,
> +                            [SDTCisSameAs<0, 1>, SDTCisPtrTy<0>]>;
> +
> +def pcrelwrapper : SDNode<"XCoreISD::PCRelativeWrapper",  
> SDT_XCoreAddress,
> +	                   []>;
> +
> +def dprelwrapper : SDNode<"XCoreISD::DPRelativeWrapper",  
> SDT_XCoreAddress,
> +	                   []>;
> +
> +def cprelwrapper : SDNode<"XCoreISD::CPRelativeWrapper",  
> SDT_XCoreAddress,
> +	                   []>;
> +
> +def SDT_XCoreStwsp    : SDTypeProfile<0, 2, [SDTCisInt<1>]>;
> +def XCoreStwsp         : SDNode<"XCoreISD::STWSP", SDT_XCoreStwsp,
> +	                   [SDNPHasChain]>;
> +
> +// These are target-independent nodes, but have target-specific  
> formats.
> +def SDT_XCoreCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i32> ]>;
> +def SDT_XCoreCallSeqEnd   : SDCallSeqEnd<[ SDTCisVT<0, i32>,
> +                                        SDTCisVT<1, i32> ]>;
> +
> +def callseq_start : SDNode<"ISD::CALLSEQ_START",  
> SDT_XCoreCallSeqStart,
> +                           [SDNPHasChain, SDNPOutFlag]>;
> +def callseq_end   : SDNode<"ISD::CALLSEQ_END",   SDT_XCoreCallSeqEnd,
> +                           [SDNPHasChain, SDNPOptInFlag,  
> SDNPOutFlag]>;
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// Instruction Pattern Stuff
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +def div4_xform : SDNodeXForm +  // Transformation function: imm/4
> +  assert(N->getZExtValue() % 4 == 0);
> +  return getI32Imm(N->getZExtValue()/4);
> +}]>;
> +
> +def msksize_xform : SDNodeXForm +  // Transformation function: get the size of a mask
> +  assert(isMask_32(N->getZExtValue()));
> +  // look for the first non-zero bit
> +  return getI32Imm(32 - CountLeadingZeros_32(N->getZExtValue()));
> +}]>;
> +
> +def neg_xform : SDNodeXForm +  // Transformation function: -imm
> +  uint32_t value = N->getZExtValue();
> +  return getI32Imm(-value);
> +}]>;
> +
> +def div4neg_xform : SDNodeXForm +  // Transformation function: -imm/4
> +  uint32_t value = N->getZExtValue();
> +  assert(-value % 4 == 0);
> +  return getI32Imm(-value/4);
> +}]>;
> +
> +def immUs4Neg : PatLeaf<(imm), [{
> +  uint32_t value = (uint32_t)N->getZExtValue();
> +  return (-value)%4 == 0 && (-value)/4 <= 11;
> +}]>;
> +
> +def immUs4 : PatLeaf<(imm), [{
> +  uint32_t value = (uint32_t)N->getZExtValue();
> +  return value%4 == 0 && value/4 <= 11;
> +}]>;
> +
> +def immUsNeg : PatLeaf<(imm), [{
> +  return -((uint32_t)N->getZExtValue()) <= 11;
> +}]>;
> +
> +def immUs : PatLeaf<(imm), [{
> +  return (uint32_t)N->getZExtValue() <= 11;
> +}]>;
> +
> +def immU6 : PatLeaf<(imm), [{
> +  return (uint32_t)N->getZExtValue() < (1 << 6);
> +}]>;
> +
> +def immU10 : PatLeaf<(imm), [{
> +  return (uint32_t)N->getZExtValue() < (1 << 10);
> +}]>;
> +
> +def immU16 : PatLeaf<(imm), [{
> +  return (uint32_t)N->getZExtValue() < (1 << 16);
> +}]>;
> +
> +def immU20 : PatLeaf<(imm), [{
> +  return (uint32_t)N->getZExtValue() < (1 << 20);
> +}]>;
> +
> +// FIXME check subtarget. Currently we check if the immediate
> +// is in the common subset of legal immediate values for both
> +// XS1A and XS1B.
> +def immMskBitp : PatLeaf<(imm), [{
> +  uint32_t value = (uint32_t)N->getZExtValue();
> +  if (!isMask_32(value)) {
> +    return false;
> +  }
> +  int msksize = 32 - CountLeadingZeros_32(value);
> +  return (msksize >= 1 && msksize <= 8)
> +          || msksize == 16
> +          || msksize == 24
> +          || msksize == 32;
> +}]>;
> +
> +// FIXME check subtarget. Currently we check if the immediate
> +// is in the common subset of legal immediate values for both
> +// XS1A and XS1B.
> +def immBitp : PatLeaf<(imm), [{
> +  uint32_t value = (uint32_t)N->getZExtValue();
> +  return (value >= 1 && value <= 8)
> +          || value == 16
> +          || value == 24
> +          || value == 32;
> +}]>;
> +
> +def lda16f : PatFrag<(ops node:$addr, node:$offset),
> +                     (add node:$addr, (shl node:$offset, 1))>;
> +def lda16b : PatFrag<(ops node:$addr, node:$offset),
> +                     (sub node:$addr, (shl node:$offset, 1))>;
> +def ldawf : PatFrag<(ops node:$addr, node:$offset),
> +                     (add node:$addr, (shl node:$offset, 2))>;
> +def ldawb : PatFrag<(ops node:$addr, node:$offset),
> +                     (sub node:$addr, (shl node:$offset, 2))>;
> +
> +// Instruction operand types
> +def calltarget  : Operand;
> +def brtarget : Operand;
> +def pclabel : Operand;
> +
> +// Addressing modes
> +def ADDRspii : ComplexPattern frameindex], []>;
> +def ADDRdpii : ComplexPattern dprelwrapper],
> +                 []>;
> +def ADDRcpii : ComplexPattern cprelwrapper],
> +                 []>;
> +
> +// Address operands
> +def MEMii : Operand {
> +  let PrintMethod = "printMemOperand";
> +  let MIOperandInfo = (ops i32imm, i32imm);
> +}
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// Instruction Class Templates
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +// Three operand short
> +
> +multiclass F3R_2RUS {
> +  def _3r: _F3R<
> +                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
> +                 !strconcat(OpcStr, " $dst, $b, $c"),
> +                 [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>;
> +  def _2rus : _F2RUS<
> +                 (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
> +                 !strconcat(OpcStr, " $dst, $b, $c"),
> +                 [(set GRRegs:$dst, (OpNode GRRegs:$b, immUs:$c))]>;
> +}
> +
> +multiclass F3R_2RUS_np {
> +  def _3r: _F3R<
> +                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
> +                 !strconcat(OpcStr, " $dst, $b, $c"),
> +                 []>;
> +  def _2rus : _F2RUS<
> +                 (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
> +                 !strconcat(OpcStr, " $dst, $b, $c"),
> +                 []>;
> +}
> +
> +multiclass F3R_2RBITP {
> +  def _3r: _F3R<
> +                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
> +                 !strconcat(OpcStr, " $dst, $b, $c"),
> +                 [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>;
> +  def _2rus : _F2RUS<
> +                 (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
> +                 !strconcat(OpcStr, " $dst, $b, $c"),
> +                 [(set GRRegs:$dst, (OpNode GRRegs:$b, immBitp: 
> $c))]>;
> +}
> +
> +class F3R : _F3R<
> +                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
> +                 !strconcat(OpcStr, " $dst, $b, $c"),
> +                 [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>;
> +
> +class F3R_np : _F3R<
> +                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
> +                 !strconcat(OpcStr, " $dst, $b, $c"),
> +                 []>;
> +// Three operand long
> +
> +/// FL3R_L2RUS multiclass - Define a normal FL3R/FL2RUS pattern in  
> one shot.
> +multiclass FL3R_L2RUS {
> +  def _l3r: _FL3R<
> +                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
> +                 !strconcat(OpcStr, " $dst, $b, $c"),
> +                 [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>;
> +  def _l2rus : _FL2RUS<
> +                 (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
> +                 !strconcat(OpcStr, " $dst, $b, $c"),
> +                 [(set GRRegs:$dst, (OpNode GRRegs:$b, immUs:$c))]>;
> +}
> +
> +/// FL3R_L2RUS multiclass - Define a normal FL3R/FL2RUS pattern in  
> one shot.
> +multiclass FL3R_L2RBITP {
> +  def _l3r: _FL3R<
> +                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
> +                 !strconcat(OpcStr, " $dst, $b, $c"),
> +                 [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>;
> +  def _l2rus : _FL2RUS<
> +                 (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
> +                 !strconcat(OpcStr, " $dst, $b, $c"),
> +                 [(set GRRegs:$dst, (OpNode GRRegs:$b, immBitp: 
> $c))]>;
> +}
> +
> +class FL3R : _FL3R<
> +                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
> +                 !strconcat(OpcStr, " $dst, $b, $c"),
> +                 [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>;
> +
> +// Register - U6
> +// Operand register - U6
> +multiclass FRU6_LRU6_branch {
> +  def _ru6: _FRU6<
> +                 (outs), (ins GRRegs:$cond, brtarget:$dest),
> +                 !strconcat(OpcStr, " $cond, $dest"),
> +                 []>;
> +  def _lru6: _FLRU6<
> +                 (outs), (ins GRRegs:$cond, brtarget:$dest),
> +                 !strconcat(OpcStr, " $cond, $dest"),
> +                 []>;
> +}
> +
> +multiclass FRU6_LRU6_cp {
> +  def _ru6: _FRU6<
> +                 (outs GRRegs:$dst), (ins i32imm:$a),
> +                 !strconcat(OpcStr, " $dst, cp[$a]"),
> +                 []>;
> +  def _lru6: _FLRU6<
> +                 (outs GRRegs:$dst), (ins i32imm:$a),
> +                 !strconcat(OpcStr, " $dst, cp[$a]"),
> +                 []>;
> +}
> +
> +// U6
> +multiclass FU6_LU6 {
> +  def _u6: _FU6<
> +                 (outs), (ins i32imm:$b),
> +                 !strconcat(OpcStr, " $b"),
> +                 [(OpNode immU6:$b)]>;
> +  def _lu6: _FLU6<
> +                 (outs), (ins i32imm:$b),
> +                 !strconcat(OpcStr, " $b"),
> +                 [(OpNode immU16:$b)]>;
> +}
> +
> +multiclass FU6_LU6_np {
> +  def _u6: _FU6<
> +                 (outs), (ins i32imm:$b),
> +                 !strconcat(OpcStr, " $b"),
> +                 []>;
> +  def _lu6: _FLU6<
> +                 (outs), (ins i32imm:$b),
> +                 !strconcat(OpcStr, " $b"),
> +                 []>;
> +}
> +
> +// U10
> +multiclass FU10_LU10_np {
> +  def _u10: _FU10<
> +                 (outs), (ins i32imm:$b),
> +                 !strconcat(OpcStr, " $b"),
> +                 []>;
> +  def _lu10: _FLU10<
> +                 (outs), (ins i32imm:$b),
> +                 !strconcat(OpcStr, " $b"),
> +                 []>;
> +}
> +
> +// Two operand short
> +
> +class F2R_np : _F2R<
> +                 (outs GRRegs:$dst), (ins GRRegs:$b),
> +                 !strconcat(OpcStr, " $dst, $b"),
> +                 []>;
> +
> +// Two operand long
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// Pseudo Instructions
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +let Defs = [SP], Uses = [SP] in {
> +def ADJCALLSTACKDOWN : PseudoInstXCore<(outs), (ins i32imm:$amt),
> +                               "${:comment} ADJCALLSTACKDOWN $amt",
> +                               [(callseq_start timm:$amt)]>;
> +def ADJCALLSTACKUP : PseudoInstXCore<(outs), (ins i32imm:$amt1,  
> i32imm:$amt2),
> +                            "${:comment} ADJCALLSTACKUP $amt1",
> +                            [(callseq_end timm:$amt1, timm:$amt2)]>;
> +}
> +
> +// SELECT_CC_* - Used to implement the SELECT_CC DAG operation.   
> Expanded by the
> +// scheduler into a branch sequence.
> +let usesCustomDAGSchedInserter = 1 in {
> +  def SELECT_CC : PseudoInstXCore<(outs GRRegs:$dst),
> +                              (ins GRRegs:$cond, GRRegs:$T, GRRegs: 
> $F),
> +                              "${:comment} SELECT_CC PSEUDO!",
> +                              [(set GRRegs:$dst,
> +                                 (select GRRegs:$cond, GRRegs:$T,  
> GRRegs:$F))]>;
> +}
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// Instructions
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +// Three operand short
> +defm ADD : F3R_2RUS<"add", add>;
> +defm SUB : F3R_2RUS<"sub", sub>;
> +let neverHasSideEffects = 1 in {
> +defm EQ : F3R_2RUS_np<"eq">;
> +def LSS_3r : F3R_np<"lss">;
> +def LSU_3r : F3R_np<"lsu">;
> +}
> +def AND_3r : F3R<"and", and>;
> +def OR_3r : F3R<"or", or>;
> +
> +let mayLoad=1 in {
> +def LDW_3r : _F3R<(outs GRRegs:$dst), (ins GRRegs:$addr, GRRegs: 
> $offset),
> +                  "ldw $dst, $addr[$offset]",
> +                  []>;
> +
> +def LDW_2rus : _F2RUS<(outs GRRegs:$dst), (ins GRRegs:$addr, i32imm: 
> $offset),
> +                  "ldw $dst, $addr[$offset]",
> +                  []>;
> +
> +def LD16S_3r :  _F3R<(outs GRRegs:$dst), (ins GRRegs:$addr, GRRegs: 
> $offset),
> +                  "ld16s $dst, $addr[$offset]",
> +                  []>;
> +
> +def LD8U_3r :  _F3R<(outs GRRegs:$dst), (ins GRRegs:$addr, GRRegs: 
> $offset),
> +                  "ld8u $dst, $addr[$offset]",
> +                  []>;
> +}
> +
> +let mayStore=1 in {
> +def STW_3r : _F3R<(outs), (ins GRRegs:$val, GRRegs:$addr, GRRegs: 
> $offset),
> +                  "stw $val, $addr[$offset]",
> +                  []>;
> +
> +def STW_2rus : _F2RUS<(outs), (ins GRRegs:$val, GRRegs:$addr,  
> i32imm:$offset),
> +                  "stw $val, $addr[$offset]",
> +                  []>;
> +}
> +
> +defm SHL : F3R_2RBITP<"shl", shl>;
> +defm SHR : F3R_2RBITP<"shr", srl>;
> +// TODO tsetr
> +
> +// Three operand long
> +def LDAWF_l3r : _FL3R<(outs GRRegs:$dst), (ins GRRegs:$addr, GRRegs: 
> $offset),
> +                  "ldaw $dst, $addr[$offset]",
> +                  [(set GRRegs:$dst, (ldawf GRRegs:$addr, GRRegs: 
> $offset))]>;
> +
> +let neverHasSideEffects = 1 in
> +def LDAWF_l2rus : _FL2RUS<(outs GRRegs:$dst),
> +                    (ins GRRegs:$addr, i32imm:$offset),
> +                    "ldaw $dst, $addr[$offset]",
> +                    []>;
> +
> +def LDAWB_l3r : _FL3R<(outs GRRegs:$dst), (ins GRRegs:$addr, GRRegs: 
> $offset),
> +                  "ldaw $dst, $addr[-$offset]",
> +                  [(set GRRegs:$dst, (ldawb GRRegs:$addr, GRRegs: 
> $offset))]>;
> +
> +let neverHasSideEffects = 1 in
> +def LDAWB_l2rus : _FL2RUS<(outs GRRegs:$dst),
> +                    (ins GRRegs:$addr, i32imm:$offset),
> +                    "ldaw $dst, $addr[-$offset]",
> +                    []>;
> +
> +def LDA16F_l3r : _FL3R<(outs GRRegs:$dst), (ins GRRegs:$addr,  
> GRRegs:$offset),
> +                  "lda16 $dst, $addr[$offset]",
> +                  [(set GRRegs:$dst, (lda16f GRRegs:$addr, GRRegs: 
> $offset))]>;
> +
> +def LDA16B_l3r : _FL3R<(outs GRRegs:$dst), (ins GRRegs:$addr,  
> GRRegs:$offset),
> +                  "lda16 $dst, $addr[-$offset]",
> +                  [(set GRRegs:$dst, (lda16b GRRegs:$addr, GRRegs: 
> $offset))]>;
> +
> +def MUL_l3r : FL3R<"mul", mul>;
> +// Instructions which may trap are marked as side effecting.
> +let hasSideEffects = 1 in {
> +def DIVS_l3r : FL3R<"divs", sdiv>;
> +def DIVU_l3r : FL3R<"divu", udiv>;
> +def REMS_l3r : FL3R<"rems", srem>;
> +def REMU_l3r : FL3R<"remu", urem>;
> +}
> +def XOR_l3r : FL3R<"xor", xor>;
> +defm ASHR : FL3R_L2RBITP<"ashr", sra>;
> +// TODO crc32, crc8, inpw, outpw
> +let mayStore=1 in {
> +def ST16_l3r : _FL3R<(outs), (ins GRRegs:$val, GRRegs:$addr, GRRegs: 
> $offset),
> +                "st16 $val, $addr[$offset]",
> +                []>;
> +
> +def ST8_l3r : _FL3R<(outs), (ins GRRegs:$val, GRRegs:$addr, GRRegs: 
> $offset),
> +                "st8 $val, $addr[$offset]",
> +                []>;
> +}
> +
> +// Four operand long
> +let Predicates = [HasXS1B], Constraints = "$src1 = $dst1,$src2 =  
> $dst2" in {
> +def MACCU_l4r : _L4R<(outs GRRegs:$dst1, GRRegs:$dst2),
> +                    (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3,
> +                      GRRegs:$src4),
> +                    "maccu $dst1, $dst2, $src3, $src4",
> +                    []>;
> +
> +def MACCS_l4r : _L4R<(outs GRRegs:$dst1, GRRegs:$dst2),
> +                    (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3,
> +                      GRRegs:$src4),
> +                    "maccs $dst1, $dst2, $src3, $src4",
> +                    []>;
> +}
> +
> +// Five operand long
> +
> +let Predicates = [HasXS1B] in {
> +def LADD_l5r : _L5R<(outs GRRegs:$dst1, GRRegs:$dst2),
> +                    (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3),
> +                    "ladd $dst1, $dst2, $src1, $src2, $src3",
> +                    []>;
> +
> +def LSUB_l5r : _L5R<(outs GRRegs:$dst1, GRRegs:$dst2),
> +                    (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3),
> +                    "lsub $dst1, $dst2, $src1, $src2, $src3",
> +                    []>;
> +
> +def LDIV_l5r : _L5R<(outs GRRegs:$dst1, GRRegs:$dst2),
> +                    (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3),
> +                    "ldiv $dst1, $dst2, $src1, $src2, $src3",
> +                    []>;
> +}
> +
> +// Six operand long
> +
> +def LMUL_l6r : _L6R<(outs GRRegs:$dst1, GRRegs:$dst2),
> +                    (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3,
> +                      GRRegs:$src4),
> +                    "lmul $dst1, $dst2, $src1, $src2, $src3, $src4",
> +                    []>;
> +
> +let Predicates = [HasXS1A] in
> +def MACC_l6r : _L6R<(outs GRRegs:$dst1, GRRegs:$dst2),
> +                    (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3,
> +                      GRRegs:$src4),
> +                    "macc $dst1, $dst2, $src1, $src2, $src3, $src4",
> +                    []>;
> +
> +// Register - U6
> +
> +//let Uses = [DP] in ...
> +let neverHasSideEffects = 1, isReMaterializable = 1 in
> +def LDAWDP_ru6: _FRU6<(outs GRRegs:$dst), (ins MEMii:$a),
> +                    "ldaw $dst, dp[$a]",
> +                    []>;
> +
> +let isReMaterializable = 1 in
> +def LDAWDP_lru6: _FLRU6<
> +                    (outs GRRegs:$dst), (ins MEMii:$a),
> +                    "ldaw $dst, dp[$a]",
> +                    [(set GRRegs:$dst, ADDRdpii:$a)]>;
> +
> +let mayLoad=1 in
> +def LDWDP_ru6: _FRU6<(outs GRRegs:$dst), (ins MEMii:$a),
> +                    "ldw $dst, dp[$a]",
> +                    []>;
> +
> +def LDWDP_lru6: _FLRU6<
> +                    (outs GRRegs:$dst), (ins MEMii:$a),
> +                    "ldw $dst, dp[$a]",
> +                    [(set GRRegs:$dst, (load ADDRdpii:$a))]>;
> +
> +let mayStore=1 in
> +def STWDP_ru6 : _FRU6<(outs), (ins GRRegs:$val, MEMii:$addr),
> +                  "stw $val, dp[$addr]",
> +                  []>;
> +
> +def STWDP_lru6 : _FLRU6<(outs), (ins GRRegs:$val, MEMii:$addr),
> +                  "stw $val, dp[$addr]",
> +                  [(store GRRegs:$val, ADDRdpii:$addr)]>;
> +
> +//let Uses = [CP] in ..
> +let mayLoad = 1, isReMaterializable = 1 in
> +defm LDWCP : FRU6_LRU6_cp<"ldw">;
> +
> +let Uses = [SP] in {
> +let mayStore=1 in
> +def STWSP_ru6 : _FRU6<
> +                 (outs), (ins GRRegs:$dst, MEMii:$b),
> +                 "stw $dst, sp[$b]",
> +                 []>;
> +
> +def STWSP_lru6 : _FLRU6<
> +                 (outs), (ins GRRegs:$dst, MEMii:$b),
> +                 "stw $dst, sp[$b]",
> +                 [(store GRRegs:$dst, ADDRspii:$b)]>;
> +
> +let mayStore=1 in
> +def STWSP_ru6_2 : _FRU6<
> +                 (outs), (ins GRRegs:$dst, i32imm:$b),
> +                 "stw $dst, sp[$b]",
> +                 []>;
> +
> +def STWSP_lru6_2 : _FLRU6<
> +                 (outs), (ins GRRegs:$dst, i32imm:$b),
> +                 "stw $dst, sp[$b]",
> +                 [(store GRRegs:$dst, ADDRspii:$b)]>;
> +
> +let mayLoad=1 in
> +def LDWSP_ru6 : _FRU6<
> +                 (outs GRRegs:$dst), (ins MEMii:$b),
> +                 "ldw $dst, sp[$b]",
> +                 []>;
> +
> +def LDWSP_lru6 : _FLRU6<
> +                 (outs GRRegs:$dst), (ins MEMii:$b),
> +                 "ldw $dst, sp[$b]",
> +                 [(set GRRegs:$dst, (load ADDRspii:$b))]>;
> +
> +let neverHasSideEffects = 1 in
> +def LDAWSP_ru6 : _FRU6<
> +                 (outs GRRegs:$dst), (ins MEMii:$b),
> +                 "ldaw $dst, sp[$b]",
> +                 []>;
> +
> +def LDAWSP_lru6 : _FLRU6<
> +                 (outs GRRegs:$dst), (ins MEMii:$b),
> +                 "ldaw $dst, sp[$b]",
> +                 [(set GRRegs: $dst, ADDRspii:$b)]>;
> +
> +let neverHasSideEffects = 1 in {
> +def LDAWSP_ru6_RRegs : _FRU6<
> +                 (outs RRegs:$dst), (ins i32imm:$b),
> +                 "ldaw $dst, sp[$b]",
> +                 []>;
> +
> +def LDAWSP_lru6_RRegs : _FLRU6<
> +                 (outs RRegs:$dst), (ins i32imm:$b),
> +                 "ldaw $dst, sp[$b]",
> +                 []>;
> +}
> +}
> +
> +let isReMaterializable = 1 in {
> +def LDC_ru6 : _FRU6<
> +                 (outs GRRegs:$dst), (ins i32imm:$b),
> +                 "ldc $dst, $b",
> +                 [(set GRRegs:$dst, immU6:$b)]>;
> +
> +def LDC_lru6 : _FLRU6<
> +                 (outs GRRegs:$dst), (ins i32imm:$b),
> +                 "ldc $dst, $b",
> +                 [(set GRRegs:$dst, immU16:$b)]>;
> +}
> +
> +// Operand register - U6
> +// TODO setc
> +let isBranch = 1, isTerminator = 1 in {
> +defm BRFT: FRU6_LRU6_branch<"bt">;
> +defm BRBT: FRU6_LRU6_branch<"bt">;
> +defm BRFF: FRU6_LRU6_branch<"bf">;
> +defm BRBF: FRU6_LRU6_branch<"bf">;
> +}
> +
> +// U6
> +let Defs = [SP], Uses = [SP] in {
> +let neverHasSideEffects = 1 in
> +defm EXTSP : FU6_LU6_np<"extsp">;
> +let mayStore = 1 in
> +defm ENTSP : FU6_LU6_np<"entsp">;
> +
> +let isReturn = 1, isTerminator = 1, mayLoad = 1 in {
> +defm RETSP : FU6_LU6<"retsp", XCoreRetsp>;
> +}
> +}
> +
> +// TODO extdp, kentsp, krestsp, blat, setsr
> +// clrsr, getsr, kalli
> +let isBranch = 1, isTerminator = 1 in {
> +def BRBU_u6 : _FU6<
> +                 (outs),
> +                 (ins brtarget:$target),
> +                 "bu $target",
> +                 []>;
> +
> +def BRBU_lu6 : _FLU6<
> +                 (outs),
> +                 (ins brtarget:$target),
> +                 "bu $target",
> +                 []>;
> +
> +def BRFU_u6 : _FU6<
> +                 (outs),
> +                 (ins brtarget:$target),
> +                 "bu $target",
> +                 []>;
> +
> +def BRFU_lu6 : _FLU6<
> +                 (outs),
> +                 (ins brtarget:$target),
> +                 "bu $target",
> +                 []>;
> +}
> +
> +//let Uses = [CP] in ...
> +let Predicates = [HasXS1B], Defs = [R11], neverHasSideEffects = 1,
> +  isReMaterializable = 1 in
> +def LDAWCP_u6: _FRU6<(outs), (ins MEMii:$a),
> +                    "ldaw r11, cp[$a]",
> +                    []>;
> +
> +let Predicates = [HasXS1B], Defs = [R11], isReMaterializable = 1 in
> +def LDAWCP_lu6: _FLRU6<
> +                    (outs), (ins MEMii:$a),
> +                    "ldaw r11, cp[$a]",
> +                    [(set R11, ADDRcpii:$a)]>;
> +
> +// U10
> +// TODO ldwcpl, blacp
> +
> +let Defs = [R11], isReMaterializable = 1, neverHasSideEffects = 1 in
> +def LDAP_u10 : _FU10<
> +                  (outs),
> +                  (ins i32imm:$addr),
> +                  "ldap r11, $addr",
> +                  []>;
> +
> +let Defs = [R11], isReMaterializable = 1 in
> +def LDAP_lu10 : _FLU10<
> +                  (outs),
> +                  (ins i32imm:$addr),
> +                  "ldap r11, $addr",
> +                  [(set R11, (pcrelwrapper tglobaladdr:$addr))]>;
> +
> +let isCall=1,
> +// All calls clobber the the link register and the non-callee-saved  
> registers:
> +Defs = [R0, R1, R2, R3, R11, LR] in {
> +def BL_u10 : _FU10<
> +                  (outs),
> +                  (ins calltarget:$target, variable_ops),
> +                  "bl $target",
> +                  [(XCoreBranchLink immU10:$target)]>;
> +
> +def BL_lu10 : _FLU10<
> +                  (outs),
> +                  (ins calltarget:$target, variable_ops),
> +                  "bl $target",
> +                  [(XCoreBranchLink immU20:$target)]>;
> +}
> +
> +// Two operand short
> +// TODO getr, getst
> +def NOT : _F2R<(outs GRRegs:$dst), (ins GRRegs:$b),
> +                 "not $dst, $b",
> +                 [(set GRRegs:$dst, (not GRRegs:$b))]>;
> +
> +def NEG : _F2R<(outs GRRegs:$dst), (ins GRRegs:$b),
> +                 "neg $dst, $b",
> +                 [(set GRRegs:$dst, (ineg GRRegs:$b))]>;
> +
> +// TODO setd, eet, eef, getts, setpt, outct, inct, chkct, outt,  
> intt, out,
> +// in, outshr, inshr, testct, testwct, tinitpc, tinitdp, tinitsp,  
> tinitcp,
> +// tsetmr, sext (reg), zext (reg)
> +let isTwoAddress = 1 in {
> +let neverHasSideEffects = 1 in
> +def SEXT_rus : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, i32imm: 
> $src2),
> +                 "sext $dst, $src2",
> +                 []>;
> +
> +let neverHasSideEffects = 1 in
> +def ZEXT_rus : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, i32imm: 
> $src2),
> +                 "zext $dst, $src2",
> +                 []>;
> +
> +def ANDNOT_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs: 
> $src2),
> +                 "andnot $dst, $src2",
> +                 [(set GRRegs:$dst, (and GRRegs:$src1, (not GRRegs: 
> $src2)))]>;
> +}
> +
> +let isReMaterializable = 1, neverHasSideEffects = 1 in
> +def MKMSK_rus : _FRUS<(outs GRRegs:$dst), (ins i32imm:$size),
> +                 "mkmsk $dst, $size",
> +                 []>;
> +
> +def MKMSK_2r : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$size),
> +                 "mkmsk $dst, $size",
> +                 [(set GRRegs:$dst, (add (shl 1, GRRegs:$size),  
> 0xffffffff))]>;
> +
> +// Two operand long
> +// TODO settw, setclk, setrdy, setpsc, endin, peek,
> +// getd, testlcl, tinitlr, getps, setps
> +def BITREV_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
> +                 "bitrev $dst, $src",
> +                 []>;
> +
> +def BYTEREV_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
> +                 "byterev $dst, $src",
> +                 [(set GRRegs:$dst, (bswap GRRegs:$src))]>;
> +
> +def CLZ_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
> +                 "clz $dst, $src",
> +                 [(set GRRegs:$dst, (ctlz GRRegs:$src))]>;
> +
> +// One operand short
> +// TODO edu, eeu, waitet, waitef, freer, tstart, msync, mjoin,  
> syncr, clrtp
> +// bru, setdp, setcp, setv, setev, kcall, ecallt, ecallf
> +// dgetreg
> +let isBranch=1, isIndirectBranch=1, isTerminator=1 in
> +def BAU_1r : _F1R<(outs), (ins GRRegs:$addr),
> +                 "bau $addr",
> +                 [(brind GRRegs:$addr)]>;
> +
> +let Defs=[SP], neverHasSideEffects=1 in
> +def SETSP_1r : _F1R<(outs), (ins GRRegs:$src),
> +                 "set sp, $src",
> +                 []>;
> +
> +let isCall=1,
> +// All calls clobber the the link register and the non-callee-saved  
> registers:
> +Defs = [R0, R1, R2, R3, R11, LR] in {
> +def BLA_1r : _F1R<(outs), (ins GRRegs:$addr, variable_ops),
> +                 "bla $addr",
> +                 [(XCoreBranchLink GRRegs:$addr)]>;
> +}
> +
> +// Zero operand short
> +// TODO waiteu, clre, ssync, freet, ldspc, stspc, ldssr, stssr,  
> ldsed, stsed,
> +// stet, geted, getet, getkep, getksp, setkep, getid, kret, dcall,  
> dret,
> +// dentsp, drestsp
> +
> +let Defs = [R11] in
> +def GETID_0R : _F0R<(outs), (ins),
> +                 "get r11, id",
> +                 []>;
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// Non-Instruction Patterns
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +def : Pat<(XCoreBranchLink tglobaladdr:$addr), (BL_lu10 tglobaladdr: 
> $addr)>;
> +def : Pat<(XCoreBranchLink texternalsym:$addr), (BL_lu10  
> texternalsym:$addr)>;
> +def : Pat<(XCoreStwsp GRRegs:$val, immU6:$index),
> +          (STWSP_ru6_2 GRRegs:$val, immU6:$index)>;
> +def : Pat<(XCoreStwsp GRRegs:$val, immU16:$index),
> +          (STWSP_lru6_2 GRRegs:$val, immU16:$index)>;
> +
> +/// sext_inreg
> +def : Pat<(sext_inreg GRRegs:$b, i1), (SEXT_rus GRRegs:$b, 1)>;
> +def : Pat<(sext_inreg GRRegs:$b, i8), (SEXT_rus GRRegs:$b, 8)>;
> +def : Pat<(sext_inreg GRRegs:$b, i16), (SEXT_rus GRRegs:$b, 16)>;
> +
> +/// loads
> +def : Pat<(zextloadi8 (add GRRegs:$addr, GRRegs:$offset)),
> +          (LD8U_3r GRRegs:$addr, GRRegs:$offset)>;
> +def : Pat<(zextloadi8 GRRegs:$addr), (LD8U_3r GRRegs:$addr,  
> (LDC_ru6 0))>;
> +
> +def : Pat<(zextloadi16 (lda16f GRRegs:$addr, GRRegs:$offset)),
> +          (LD16S_3r GRRegs:$addr, GRRegs:$offset)>;
> +def : Pat<(sextloadi16 GRRegs:$addr), (LD16S_3r GRRegs:$addr,  
> (LDC_ru6 0))>;
> +
> +def : Pat<(load (ldawf GRRegs:$addr, GRRegs:$offset)),
> +          (LDW_3r GRRegs:$addr, GRRegs:$offset)>;
> +def : Pat<(load (add GRRegs:$addr, immUs4:$offset)),
> +          (LDW_2rus GRRegs:$addr, (div4_xform immUs4:$offset))>;
> +def : Pat<(load GRRegs:$addr), (LDW_2rus GRRegs:$addr, 0)>;
> +
> +/// anyext
> +def : Pat<(extloadi8 (add GRRegs:$addr, GRRegs:$offset)),
> +          (LD8U_3r GRRegs:$addr, GRRegs:$offset)>;
> +def : Pat<(extloadi8 GRRegs:$addr), (LD8U_3r GRRegs:$addr, (LDC_ru6  
> 0))>;
> +def : Pat<(extloadi16 (lda16f GRRegs:$addr, GRRegs:$offset)),
> +          (LD16S_3r GRRegs:$addr, GRRegs:$offset)>;
> +def : Pat<(extloadi16 GRRegs:$addr), (LD16S_3r GRRegs:$addr,  
> (LDC_ru6 0))>;
> +
> +/// stores
> +def : Pat<(truncstorei8 GRRegs:$val, (add GRRegs:$addr, GRRegs: 
> $offset)),
> +          (ST8_l3r GRRegs:$val, GRRegs:$addr, GRRegs:$offset)>;
> +def : Pat<(truncstorei8 GRRegs:$val, GRRegs:$addr),
> +          (ST8_l3r GRRegs:$val, GRRegs:$addr, (LDC_ru6 0))>;
> +
> +def : Pat<(truncstorei16 GRRegs:$val, (lda16f GRRegs:$addr, GRRegs: 
> $offset)),
> +          (ST16_l3r GRRegs:$val, GRRegs:$addr, GRRegs:$offset)>;
> +def : Pat<(truncstorei16 GRRegs:$val, GRRegs:$addr),
> +          (ST16_l3r GRRegs:$val, GRRegs:$addr, (LDC_ru6 0))>;
> +
> +def : Pat<(store GRRegs:$val, (ldawf GRRegs:$addr, GRRegs:$offset)),
> +          (STW_3r GRRegs:$val, GRRegs:$addr, GRRegs:$offset)>;
> +def : Pat<(store GRRegs:$val, (add GRRegs:$addr, immUs4:$offset)),
> +          (STW_2rus GRRegs:$val, GRRegs:$addr, (div4_xform  
> immUs4:$offset))>;
> +def : Pat<(store GRRegs:$val, GRRegs:$addr),
> +          (STW_2rus GRRegs:$val, GRRegs:$addr, 0)>;
> +
> +/// cttz
> +def : Pat<(cttz GRRegs:$src), (CLZ_l2r (BITREV_l2r GRRegs:$src))>;
> +
> +///
> +/// branch patterns
> +///
> +
> +// unconditional branch
> +def : Pat<(br bb:$addr), (BRFU_lu6 bb:$addr)>;
> +
> +// direct match equal/notequal zero brcond
> +def : Pat<(brcond (setne GRRegs:$lhs, 0), bb:$dst),
> +          (BRFT_lru6 GRRegs:$lhs, bb:$dst)>;
> +def : Pat<(brcond (seteq GRRegs:$lhs, 0), bb:$dst),
> +          (BRFF_lru6 GRRegs:$lhs, bb:$dst)>;
> +
> +def : Pat<(brcond (setle GRRegs:$lhs, GRRegs:$rhs), bb:$dst),
> +          (BRFF_lru6 (LSS_3r GRRegs:$rhs, GRRegs:$lhs), bb:$dst)>;
> +def : Pat<(brcond (setule GRRegs:$lhs, GRRegs:$rhs), bb:$dst),
> +          (BRFF_lru6 (LSU_3r GRRegs:$rhs, GRRegs:$lhs), bb:$dst)>;
> +def : Pat<(brcond (setge GRRegs:$lhs, GRRegs:$rhs), bb:$dst),
> +          (BRFF_lru6 (LSS_3r GRRegs:$lhs, GRRegs:$rhs), bb:$dst)>;
> +def : Pat<(brcond (setuge GRRegs:$lhs, GRRegs:$rhs), bb:$dst),
> +          (BRFF_lru6 (LSU_3r GRRegs:$lhs, GRRegs:$rhs), bb:$dst)>;
> +def : Pat<(brcond (setne GRRegs:$lhs, GRRegs:$rhs), bb:$dst),
> +          (BRFF_lru6 (EQ_3r GRRegs:$lhs, GRRegs:$rhs), bb:$dst)>;
> +def : Pat<(brcond (setne GRRegs:$lhs, immUs:$rhs), bb:$dst),
> +          (BRFF_lru6 (EQ_2rus GRRegs:$lhs, immUs:$rhs), bb:$dst)>;
> +
> +// generic brcond pattern
> +def : Pat<(brcond GRRegs:$cond, bb:$addr), (BRFT_lru6 GRRegs:$cond,  
> bb:$addr)>;
> +
> +
> +///
> +/// Select patterns
> +///
> +
> +// direct match equal/notequal zero select
> +def : Pat<(select (setne GRRegs:$lhs, 0), GRRegs:$T, GRRegs:$F),
> +        (SELECT_CC GRRegs:$lhs, GRRegs:$T, GRRegs:$F)>;
> +
> +def : Pat<(select (seteq GRRegs:$lhs, 0), GRRegs:$T, GRRegs:$F),
> +        (SELECT_CC GRRegs:$lhs, GRRegs:$F, GRRegs:$T)>;
> +
> +def : Pat<(select (setle GRRegs:$lhs, GRRegs:$rhs), GRRegs:$T,  
> GRRegs:$F),
> +          (SELECT_CC (LSS_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F,  
> GRRegs:$T)>;
> +def : Pat<(select (setule GRRegs:$lhs, GRRegs:$rhs), GRRegs:$T,  
> GRRegs:$F),
> +          (SELECT_CC (LSU_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F,  
> GRRegs:$T)>;
> +def : Pat<(select (setge GRRegs:$lhs, GRRegs:$rhs), GRRegs:$T,  
> GRRegs:$F),
> +          (SELECT_CC (LSS_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F,  
> GRRegs:$T)>;
> +def : Pat<(select (setuge GRRegs:$lhs, GRRegs:$rhs), GRRegs:$T,  
> GRRegs:$F),
> +          (SELECT_CC (LSU_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F,  
> GRRegs:$T)>;
> +def : Pat<(select (setne GRRegs:$lhs, GRRegs:$rhs), GRRegs:$T,  
> GRRegs:$F),
> +          (SELECT_CC (EQ_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F,  
> GRRegs:$T)>;
> +def : Pat<(select (setne GRRegs:$lhs, immUs:$rhs), GRRegs:$T,  
> GRRegs:$F),
> +          (SELECT_CC (EQ_2rus GRRegs:$lhs, immUs:$rhs), GRRegs:$F,  
> GRRegs:$T)>;
> +
> +///
> +/// setcc patterns, only matched when none of the above brcond
> +/// patterns match
> +///
> +
> +// setcc 2 register operands
> +def : Pat<(setle GRRegs:$lhs, GRRegs:$rhs),
> +          (EQ_2rus (LSS_3r GRRegs:$rhs, GRRegs:$lhs), 0)>;
> +def : Pat<(setule GRRegs:$lhs, GRRegs:$rhs),
> +          (EQ_2rus (LSU_3r GRRegs:$rhs, GRRegs:$lhs), 0)>;
> +
> +def : Pat<(setgt GRRegs:$lhs, GRRegs:$rhs),
> +          (LSS_3r GRRegs:$rhs, GRRegs:$lhs)>;
> +def : Pat<(setugt GRRegs:$lhs, GRRegs:$rhs),
> +          (LSU_3r GRRegs:$rhs, GRRegs:$lhs)>;
> +
> +def : Pat<(setge GRRegs:$lhs, GRRegs:$rhs),
> +          (EQ_2rus (LSS_3r GRRegs:$lhs, GRRegs:$rhs), 0)>;
> +def : Pat<(setuge GRRegs:$lhs, GRRegs:$rhs),
> +          (EQ_2rus (LSU_3r GRRegs:$lhs, GRRegs:$rhs), 0)>;
> +
> +def : Pat<(setlt GRRegs:$lhs, GRRegs:$rhs),
> +          (LSS_3r GRRegs:$lhs, GRRegs:$rhs)>;
> +def : Pat<(setult GRRegs:$lhs, GRRegs:$rhs),
> +          (LSU_3r GRRegs:$lhs, GRRegs:$rhs)>;
> +
> +def : Pat<(setne GRRegs:$lhs, GRRegs:$rhs),
> +          (EQ_2rus (EQ_3r GRRegs:$lhs, GRRegs:$rhs), 0)>;
> +
> +def : Pat<(seteq GRRegs:$lhs, GRRegs:$rhs),
> +          (EQ_3r GRRegs:$lhs, GRRegs:$rhs)>;
> +
> +// setcc reg/imm operands
> +def : Pat<(seteq GRRegs:$lhs, immUs:$rhs),
> +          (EQ_2rus GRRegs:$lhs, immUs:$rhs)>;
> +def : Pat<(setne GRRegs:$lhs, immUs:$rhs),
> +          (EQ_2rus (EQ_2rus GRRegs:$lhs, immUs:$rhs), 0)>;
> +
> +// misc
> +def : Pat<(add GRRegs:$addr, immUs4:$offset),
> +          (LDAWF_l2rus GRRegs:$addr, (div4_xform immUs4:$offset))>;
> +
> +def : Pat<(sub GRRegs:$addr, immUs4:$offset),
> +          (LDAWB_l2rus GRRegs:$addr, (div4_xform immUs4:$offset))>;
> +
> +def : Pat<(and GRRegs:$val, immMskBitp:$mask),
> +          (ZEXT_rus GRRegs:$val, (msksize_xform immMskBitp:$mask))>;
> +
> +// (sub X, imm) gets canonicalized to (add X, -imm).  Match this  
> form.
> +def : Pat<(add GRRegs:$src1, immUsNeg:$src2),
> +          (SUB_2rus GRRegs:$src1, (neg_xform immUsNeg:$src2))>;
> +
> +def : Pat<(add GRRegs:$src1, immUs4Neg:$src2),
> +          (LDAWB_l2rus GRRegs:$src1, (div4neg_xform immUs4Neg: 
> $src2))>;
> +
> +///
> +/// Some peepholes
> +///
> +
> +def : Pat<(mul GRRegs:$src, 3),
> +          (LDA16F_l3r GRRegs:$src, GRRegs:$src)>;
> +
> +def : Pat<(mul GRRegs:$src, 5),
> +          (LDAWF_l3r GRRegs:$src, GRRegs:$src)>;
> +
> +def : Pat<(mul GRRegs:$src, -3),
> +          (LDAWB_l3r GRRegs:$src, GRRegs:$src)>;
> +
> +// ashr X, 32 is equivalent to ashr X, 31 on the XCore.
> +def : Pat<(sra GRRegs:$src, 31),
> +          (ASHR_l2rus GRRegs:$src, 32)>;
> +
> Index: lib/Target/XCore/XCoreCallingConv.td
> ===================================================================
> --- lib/Target/XCore/XCoreCallingConv.td	(revision 0)
> +++ lib/Target/XCore/XCoreCallingConv.td	(revision 0)
> @@ -0,0 +1,33 @@
> +//===- XCoreCallingConv.td - Calling Conventions for XCore -*-  
> tablegen -*-===//
> +//
> +//                     The LLVM Compiler Infrastructure
> +//
> +// This file is distributed under the University of Illinois Open  
> Source
> +// License. See LICENSE.TXT for details.
> +//
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// This describes the calling conventions for XCore architecture.
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// XCore Return Value Calling Convention
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +def RetCC_XCore : CallingConv<[
> +  // i32 are returned in registers R0, R1, R2, R3
> +  CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>
> +]>;
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// XCore Argument Calling Conventions
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +def CC_XCore : CallingConv<[
> +  // Promote i8/i16 arguments to i32.
> +  CCIfType<[i8, i16], CCPromoteToType>,
> +
> +  // The first 4 integer arguments are passed in integer registers.
> +  CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>,
> +
> +  // Integer values get stored in stack slots that are 4 bytes in
> +  // size and 4-byte aligned.
> +  CCIfType<[i32], CCAssignToStack<4, 4>>
> +]>;
> Index: lib/Target/XCore/XCore.td
> ===================================================================
> --- lib/Target/XCore/XCore.td	(revision 0)
> +++ lib/Target/XCore/XCore.td	(revision 0)
> @@ -0,0 +1,62 @@
> +//===- XCore.td - Describe the XCore Target Machine --------*-  
> tablegen -*-===//
> +//
> +//                     The LLVM Compiler Infrastructure
> +//
> +// This file is distributed under the University of Illinois Open  
> Source
> +// License. See LICENSE.TXT for details.
> +//
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +//
> +//
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// Target-independent interfaces which we are implementing
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +include "../Target.td"
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// Descriptions
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +include "XCoreRegisterInfo.td"
> +include "XCoreInstrInfo.td"
> +include "XCoreCallingConv.td"
> +
> +def XCoreInstrInfo : InstrInfo {
> +  let TSFlagsFields = [];
> +  let TSFlagsShifts = [];
> +}
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// XCore Subtarget features.
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +def FeatureXS1A
> +  : SubtargetFeature<"xs1a", "IsXS1A", "true",
> +                     "Enable XS1A instructions">;
> +
> +def FeatureXS1B
> +  : SubtargetFeature<"xs1b", "IsXS1B", "true",
> +                     "Enable XS1B instructions">;
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// XCore processors supported.
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +class Proc Features>
> + : Processor;
> +
> +def : Proc<"generic",      [FeatureXS1A]>;
> +def : Proc<"xs1a-generic", [FeatureXS1A]>;
> +def : Proc<"xs1b-generic", [FeatureXS1B]>;
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +// Declare the target which we are implementing
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +def XCore : Target {
> +  // Pull in Instruction Info:
> +  let InstructionSet = XCoreInstrInfo;
> +}
> Index: lib/Target/XCore/XCoreRegisterInfo.td
> ===================================================================
> --- lib/Target/XCore/XCoreRegisterInfo.td	(revision 0)
> +++ lib/Target/XCore/XCoreRegisterInfo.td	(revision 0)
> @@ -0,0 +1,91 @@
> +//===- XCoreRegisterInfo.td - XCore Register defs ----------*-  
> tablegen -*-===//
> +//
> +//                     The LLVM Compiler Infrastructure
> +//
> +// This file is distributed under the University of Illinois Open  
> Source
> +// License. See LICENSE.TXT for details.
> +//
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +//  Declarations that describe the XCore register file
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +class XCoreReg : Register {
> +  field bits<4> Num;
> +  let Namespace = "XCore";
> +}
> +
> +// Registers are identified with 4-bit ID numbers.
> +// Ri - 32-bit integer registers
> +class Ri num, string n> : XCoreReg {
> +  let Num = num;
> +}
> +
> +// CPU registers
> +def R0  : Ri< 0, "r0">, DwarfRegNum<[0]>;
> +def R1  : Ri< 1, "r1">, DwarfRegNum<[1]>;
> +def R2  : Ri< 2, "r2">, DwarfRegNum<[2]>;
> +def R3  : Ri< 3, "r3">, DwarfRegNum<[3]>;
> +def R4  : Ri< 4, "r4">, DwarfRegNum<[4]>;
> +def R5  : Ri< 5, "r5">, DwarfRegNum<[5]>;
> +def R6  : Ri< 6, "r6">, DwarfRegNum<[6]>;
> +def R7  : Ri< 7, "r7">, DwarfRegNum<[7]>;
> +def R8  : Ri< 8, "r8">, DwarfRegNum<[8]>;
> +def R9  : Ri< 9, "r9">, DwarfRegNum<[9]>;
> +def R10 : Ri<10, "r10">, DwarfRegNum<[10]>;
> +def R11 : Ri<11, "r11">, DwarfRegNum<[11]>;
> +def CP : Ri<12, "cp">, DwarfRegNum<[12]>;
> +def DP : Ri<13, "dp">, DwarfRegNum<[13]>;
> +def SP : Ri<14, "sp">, DwarfRegNum<[14]>;
> +def LR : Ri<15, "lr">, DwarfRegNum<[15]>;
> +
> +// Register classes.
> +//
> +def GRRegs : RegisterClass<"XCore", [i32], 32,
> +  // Return values and arguments
> +  [R0, R1, R2, R3,
> +  // Not preserved across procedure calls
> +  R11,
> +  // Callee save
> +  R4, R5, R6, R7, R8, R9, R10]> {
> +  let MethodProtos = [{
> +    iterator allocation_order_begin(const MachineFunction &MF) const;
> +    iterator allocation_order_end(const MachineFunction &MF) const;
> +  }];
> +  let MethodBodies = [{
> +    GRRegsClass::iterator
> +    GRRegsClass::allocation_order_begin(const MachineFunction &MF)  
> const {
> +      return begin();
> +    }
> +    GRRegsClass::iterator
> +    GRRegsClass::allocation_order_end(const MachineFunction &MF)  
> const {
> +      const TargetMachine &TM = MF.getTarget();
> +      const TargetRegisterInfo *RI = TM.getRegisterInfo();
> +      if (RI->hasFP(MF))
> +        return end()-1;  // don't allocate R10
> +      else
> +        return end();
> +    }
> +  }];
> +}
> +
> +def RRegs : RegisterClass<"XCore", [i32], 32,
> +  // Reserved
> +  [CP, DP, SP, LR]> {
> +  let MethodProtos = [{
> +    iterator allocation_order_begin(const MachineFunction &MF) const;
> +    iterator allocation_order_end(const MachineFunction &MF) const;
> +  }];
> +  let MethodBodies = [{
> +    RRegsClass::iterator
> +    RRegsClass::allocation_order_begin(const MachineFunction &MF)  
> const {
> +      return begin();
> +    }
> +    RRegsClass::iterator
> +    RRegsClass::allocation_order_end(const MachineFunction &MF)  
> const {
> +      // No allocatable registers
> +      return begin();
> +    }
> +  }];
> +}
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From anton at korobeynikov.info  Thu Nov  6 00:18:46 2008
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Thu, 6 Nov 2008 09:18:46 +0300
Subject: [llvm-commits] [Patch] XCore Backend, part 1
In-Reply-To: <3E7092AB-4BEC-4B93-9353-BE9482DA309A@apple.com>
References: <49117A07.90000@xmos.com>
	<3E7092AB-4BEC-4B93-9353-BE9482DA309A@apple.com>
Message-ID: 

On Thu, Nov 6, 2008 at 9:16 AM, Evan Cheng  wrote:
> Where is part 2? :-) Is it just me that's missing the email?
Here, for example:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20081103/069432.html

:)
-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University


From snaroff at apple.com  Thu Nov  6 00:24:59 2008
From: snaroff at apple.com (Steve Naroff)
Date: Thu, 06 Nov 2008 06:24:59 -0000
Subject: [llvm-commits] [llvm] r58798 - in /llvm/trunk/win32:
 CodeGen/CodeGen.vcproj TableGen/TableGen.vcproj
 Transforms/Transforms.vcproj
Message-ID: <200811060624.mA66OxWN002209@zion.cs.uiuc.edu>

Author: snaroff
Date: Thu Nov  6 00:24:59 2008
New Revision: 58798

URL: http://llvm.org/viewvc/llvm-project?rev=58798&view=rev
Log:
Update VC++ projects.

Modified:
    llvm/trunk/win32/CodeGen/CodeGen.vcproj
    llvm/trunk/win32/TableGen/TableGen.vcproj
    llvm/trunk/win32/Transforms/Transforms.vcproj

Modified: llvm/trunk/win32/CodeGen/CodeGen.vcproj
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/win32/CodeGen/CodeGen.vcproj?rev=58798&r1=58797&r2=58798&view=diff

==============================================================================
--- llvm/trunk/win32/CodeGen/CodeGen.vcproj (original)
+++ llvm/trunk/win32/CodeGen/CodeGen.vcproj Thu Nov  6 00:24:59 2008
@@ -485,6 +485,10 @@
 				>
 			
 			
+			
+			
 			

Modified: llvm/trunk/win32/TableGen/TableGen.vcproj
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/win32/TableGen/TableGen.vcproj?rev=58798&r1=58797&r2=58798&view=diff

==============================================================================
--- llvm/trunk/win32/TableGen/TableGen.vcproj (original)
+++ llvm/trunk/win32/TableGen/TableGen.vcproj Thu Nov  6 00:24:59 2008
@@ -1,7 +1,7 @@
 
 
 		
 		
 			
 			
 			
 			
 		
 		
 			
 			
 			
 			
 			
+			
+			
 		
 		
 		
 		
 			
 			
 			
 		
 		
 			
 			
 			
+			
+			
+			
+			
 			
@@ -661,7 +669,7 @@
 						/>
 					
 					
 						
 					
 					
 						
References: <200811060229.mA62TBgi027457@zion.cs.uiuc.edu>
	<0EBA97CA-A8AA-4566-91A7-B6F54A59C788@apple.com>
Message-ID: 

On Nov 5, 2008, at 10:12 PM, Evan Cheng wrote:

> On Nov 5, 2008, at 6:29 PM, Bill Wendling wrote:
>
>> +  /// HasStackProtector - Set to true if this function has stack
>> protectors.
>> +  bool HasStackProtector;
>
> There is no need for HasStackProtector. If StackProtectorIndex is
> negative (fixed object), then the MF doesn't have one.
>
Okay.

>> +// Stack protector intrinsics.
>> +def int_stackprotector_prologue : Intrinsic<[llvm_void_ty,
>> llvm_ptr_ty]>;
>> +def int_stackprotector_epilogue : Intrinsic<[llvm_ptr_ty]>;
>
> Comments? How are these used? Do they read / write memory?
>
Modified.

>> +  case Intrinsic::stackprotector_prologue: {
>
> Ok. Perhaps call this stackprotector_create? And change
> stackprotector_epilogue to stackprotector_check?
>
Ick! but okay.

-bw



From isanbard at gmail.com  Thu Nov  6 01:23:03 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 06 Nov 2008 07:23:03 -0000
Subject: [llvm-commits] [llvm] r58799 - in /llvm/trunk:
 include/llvm/CodeGen/MachineFrameInfo.h include/llvm/Intrinsics.td
 lib/CodeGen/PrologEpilogInserter.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
 lib/CodeGen/StackProtector.cpp
Message-ID: <200811060723.mA67N3Fl003966@zion.cs.uiuc.edu>

Author: void
Date: Thu Nov  6 01:23:03 2008
New Revision: 58799

URL: http://llvm.org/viewvc/llvm-project?rev=58799&view=rev
Log:
- Rename stackprotector_{prologue,epilogue} to stackprotector_{create,check}.
- Get rid of "HasStackProtector" in MachineFrameInfo.
- Modify intrinsics to tell which are doing what with memory.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h
    llvm/trunk/include/llvm/Intrinsics.td
    llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
    llvm/trunk/lib/CodeGen/StackProtector.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=58799&r1=58798&r2=58799&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Thu Nov  6 01:23:03 2008
@@ -150,9 +150,6 @@
   /// only valid during and after prolog/epilog code insertion.
   bool HasCalls;
 
-  /// HasStackProtector - Set to true if this function has stack protectors.
-  bool HasStackProtector;
-
   /// StackProtectorIdx - The frame index for the stack protector.
   int StackProtectorIdx;
 
@@ -186,7 +183,6 @@
     HasVarSizedObjects = false;
     FrameAddressTaken = false;
     HasCalls = false;
-    HasStackProtector = false;
     StackProtectorIdx = -1;
     MaxCallFrameSize = 0;
     MMI = 0;
@@ -203,11 +199,6 @@
   ///
   bool hasVarSizedObjects() const { return HasVarSizedObjects; }
 
-  /// hasStackProtector - Return true if the function has a stack protector.
-  ///
-  bool hasStackProtector() const { return HasStackProtector; }
-  void setStackProtector(bool T) { HasStackProtector = T; }
-
   /// getStackProtectorIndex/setStackProtectorIndex - Return the index for the
   /// stack protector object.
   ///

Modified: llvm/trunk/include/llvm/Intrinsics.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Intrinsics.td?rev=58799&r1=58798&r2=58799&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Intrinsics.td (original)
+++ llvm/trunk/include/llvm/Intrinsics.td Thu Nov  6 01:23:03 2008
@@ -176,9 +176,12 @@
 
 def int_readcyclecounter : Intrinsic<[llvm_i64_ty]>;
 
-// Stack protector intrinsics.
-def int_stackprotector_prologue : Intrinsic<[llvm_void_ty, llvm_ptr_ty]>;
-def int_stackprotector_epilogue : Intrinsic<[llvm_ptr_ty]>;
+// Stack Protector Intrinsics - The stackprotector_create writes the stack guard
+// to the correct place on the stack frame. The stackprotector_check reads back
+// the stack guard that the stackprotector_create stored.
+def int_stackprotector_create : Intrinsic<[llvm_void_ty, llvm_ptr_ty],
+                                          [IntrWriteMem]>;
+def int_stackprotector_check  : Intrinsic<[llvm_ptr_ty], [IntrReadMem]>;
 
 //===------------------- Standard C Library Intrinsics --------------------===//
 //

Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=58799&r1=58798&r2=58799&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original)
+++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Thu Nov  6 01:23:03 2008
@@ -408,7 +408,7 @@
 
   // Make sure that the stack protector comes before the local variables on the
   // stack.
-  if (FFI->hasStackProtector()) {
+  if (FFI->getStackProtectorIndex() >= 0) {
     int FI = FFI->getStackProtectorIndex();
 
     // If stack grows down, we need to add size of find the lowest

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp?rev=58799&r1=58798&r2=58799&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Thu Nov  6 01:23:03 2008
@@ -3795,7 +3795,7 @@
     DAG.setRoot(DAG.getNode(ISD::STACKRESTORE, MVT::Other, getRoot(), Tmp));
     return 0;
   }
-  case Intrinsic::stackprotector_prologue: {
+  case Intrinsic::stackprotector_create: {
     // Emit code into the DAG to store the stack guard onto the stack.
     MachineFunction &MF = DAG.getMachineFunction();
     MachineFrameInfo *MFI = MF.getFrameInfo();
@@ -3809,8 +3809,6 @@
     unsigned Align =
       TLI.getTargetData()->getPrefTypeAlignment(PtrTy.getTypeForMVT());
     int FI = MFI->CreateStackObject(PtrTy.getSizeInBits() / 8, Align);
-
-    MFI->setStackProtector(true);
     MFI->setStackProtectorIndex(FI);
 
     SDValue FIN = DAG.getFrameIndex(FI, PtrTy);
@@ -3823,7 +3821,7 @@
     DAG.setRoot(Result);
     return 0;
   }
-  case Intrinsic::stackprotector_epilogue: {
+  case Intrinsic::stackprotector_check: {
     // Emit code into the DAG to retrieve the stack guard off of the stack.
     MachineFunction &MF = DAG.getMachineFunction();
     MachineFrameInfo *MFI = MF.getFrameInfo();

Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58799&r1=58798&r2=58799&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackProtector.cpp Thu Nov  6 01:23:03 2008
@@ -118,7 +118,7 @@
   Constant *StackGuardVar = M->getOrInsertGlobal("__stack_chk_guard", GuardTy);
   LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", false, InsertPt);
   CallInst::
-    Create(Intrinsic::getDeclaration(M, Intrinsic::stackprotector_prologue),
+    Create(Intrinsic::getDeclaration(M, Intrinsic::stackprotector_create),
            LI, "", InsertPt);
 
   // Create the basic block to jump to when the guard check fails.
@@ -163,7 +163,7 @@
     // Generate the stack protector instructions in the old basic block.
     LoadInst *LI1 = new LoadInst(StackGuardVar, "", false, BB);
     CallInst *CI = CallInst::
-      Create(Intrinsic::getDeclaration(M, Intrinsic::stackprotector_epilogue),
+      Create(Intrinsic::getDeclaration(M, Intrinsic::stackprotector_check),
              "", BB);
     ICmpInst *Cmp = new ICmpInst(CmpInst::ICMP_EQ, CI, LI1, "", BB);
     BranchInst::Create(NewBB, FailBB, Cmp, BB);




From evan.cheng at apple.com  Thu Nov  6 02:47:40 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 06 Nov 2008 08:47:40 -0000
Subject: [llvm-commits] [llvm] r58800 - in /llvm/trunk/lib/Target/ARM:
 ARM.td ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.h ARMInstrInfo.td
 ARMInstrVFP.td
Message-ID: <200811060847.mA68lfYc011288@zion.cs.uiuc.edu>

Author: evancheng
Date: Thu Nov  6 02:47:38 2008
New Revision: 58800

URL: http://llvm.org/viewvc/llvm-project?rev=58800&view=rev
Log:
Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 encoding bug.

Modified:
    llvm/trunk/lib/Target/ARM/ARM.td
    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/ARMInstrVFP.td

Modified: llvm/trunk/lib/Target/ARM/ARM.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=58800&r1=58799&r2=58800&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARM.td (original)
+++ llvm/trunk/lib/Target/ARM/ARM.td Thu Nov  6 02:47:38 2008
@@ -101,15 +101,13 @@
   let TSFlagsFields = ["AddrModeBits",
                        "SizeFlag",
                        "IndexModeBits",
-                       "Opcode",
                        "isUnaryDataProc",
                        "Form"];
   let TSFlagsShifts = [0,
                        4,
                        7,
                        9,
-                       13,
-                       14];
+                       10];
 }
 
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58800&r1=58799&r2=58800&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Thu Nov  6 02:47:38 2008
@@ -115,12 +115,6 @@
       return getMachineOpValue(MI, MI.getOperand(OpIdx));
     }
 
-    /// getBaseOpcodeFor - Return the opcode value.
-    ///
-    unsigned getBaseOpcodeFor(const TargetInstrDesc &TID) const {
-      return (TID.TSFlags & ARMII::OpcodeMask) >> ARMII::OpcodeShift;
-    }
-
     /// getShiftOp - Return the shift opcode (bit[6:5]) of the immediate value.
     ///
     unsigned getShiftOp(unsigned Imm) const ;
@@ -531,6 +525,10 @@
     ++OpIdx;
   }
 
+  // If this is a two-address operand, skip it. e.g. MOVCCr operand 1.
+  if (TID.getOperandConstraint(OpIdx, TOI::TIED_TO) != -1)
+    ++OpIdx;
+
   // Encode first non-shifter register operand if there is one.
   bool isUnary = TID.TSFlags & ARMII::UnaryDP;
   if (!isUnary) {
@@ -591,7 +589,7 @@
   }
 
   const MachineOperand &MO2 = MI.getOperand(OpIdx);
-  unsigned AM2Opc = (OpIdx == TID.getNumOperands())
+  unsigned AM2Opc = (ImplicitRn == ARM::PC)
     ? 0 : MI.getOperand(OpIdx+1).getImm();
 
   // Set bit U(23) according to sign of immed value (positive or negative).
@@ -646,7 +644,7 @@
   }
 
   const MachineOperand &MO2 = MI.getOperand(OpIdx);
-  unsigned AM3Opc = (OpIdx == TID.getNumOperands())
+  unsigned AM3Opc = (ImplicitRn == ARM::PC)
     ? 0 : MI.getOperand(OpIdx+1).getImm();
 
   // Set bit U(23) according to sign of immed value (positive or negative)
@@ -661,9 +659,9 @@
     return;
   }
 
-  // if this instr is in immediate offset/index encoding, set bit 22 to 1
+  // This instr is in immediate offset/index encoding, set bit 22 to 1.
+  Binary |= 1 << 22;
   if (unsigned ImmOffs = ARM_AM::getAM3Offset(AM3Opc)) {
-    Binary |= 1 << 22;
     // Set operands
     Binary |= (ImmOffs >> 4) << 8;  // immedH
     Binary |= (ImmOffs & ~0xF);     // immedL

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58800&r1=58799&r2=58800&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Thu Nov  6 02:47:38 2008
@@ -47,15 +47,13 @@
 // ARM Instruction templates.
 //
 
-class InstARM opcod, AddrMode am, SizeFlagVal sz, IndexMode im,
+class InstARM
   : Instruction {
   field bits<32> Inst;
 
   let Namespace = "ARM";
 
-  bits<4> Opcode = opcod;
-
   // TSFlagsFields
   AddrMode AM = am;
   bits<4> AddrModeBits = AM.Value;
@@ -78,7 +76,7 @@
 }
 
 class PseudoInst pattern>
-  : InstARM<0, AddrModeNone, SizeSpecial, IndexModeNone, Pseudo, ""> {
+  : InstARM {
   let OutOperandList = oops;
   let InOperandList = iops;
   let AsmString   = asm;
@@ -86,10 +84,10 @@
 }
 
 // Almost all ARM instructions are predicable.
-class I opcod, dag oops, dag iops, AddrMode am, SizeFlagVal sz,
+class I pattern>
-  : InstARM {
+  : InstARM {
   let OutOperandList = oops;
   let InOperandList = !con(iops, (ops pred:$p));
   let AsmString   = !strconcat(opc, !strconcat("${p}", asm));
@@ -100,10 +98,10 @@
 // Same as I except it can optionally modify CPSR. Note it's modeled as
 // an input operand since by default it's a zero register. It will
 // become an implicit def once it's "flipped".
-class sI opcod, dag oops, dag iops, AddrMode am, SizeFlagVal sz,
+class sI pattern>
-  : InstARM {
+  : InstARM {
   let OutOperandList = oops;
   let InOperandList = !con(iops, (ops pred:$p, cc_out:$s));
   let AsmString   = !strconcat(opc, !strconcat("${p}${s}", asm));
@@ -112,9 +110,9 @@
 }
 
 // Special cases
-class XI opcod, dag oops, dag iops, AddrMode am, SizeFlagVal sz,
+class XI pattern>
-  : InstARM {
+  : InstARM {
   let OutOperandList = oops;
   let InOperandList = iops;
   let AsmString   = asm;
@@ -122,46 +120,46 @@
   list Predicates = [IsARM];
 }
 
-class AI opcod, dag oops, dag iops, Format f, string opc,
+class AI pattern>
-  : I;
-class AsI opcod, dag oops, dag iops, Format f, string opc,
+class AsI pattern>
-  : sI;
-class AXI opcod, dag oops, dag iops, Format f, string asm,
+class AXI pattern>
-  : XI;
 
 // Ctrl flow instructions
 class ABLpredI opcod, dag oops, dag iops, Format f, string opc,
          string asm, list pattern>
-  : I {
   let Inst{27-24} = opcod;
 }
 class ABLI opcod, dag oops, dag iops, Format f, string asm,
           list pattern>
-  : XI {
   let Inst{27-24} = opcod;
 }
 // FIXME: BX
-class AXIx2 opcod, dag oops, dag iops, Format f, string asm,
+class AXIx2 pattern>
-  : XI;
 class ABI opcod, dag oops, dag iops, Format f, string asm,
           list pattern>
-  : XI {
   let Inst{27-24} = opcod;
 }
 class ABccI opcod, dag oops, dag iops, Format f, string opc,
          string asm, list pattern>
-  : I {
   let Inst{27-24} = opcod;
 }
@@ -169,7 +167,7 @@
 // BR_JT instructions
 // == mov pc
 class JTI opcod, dag oops, dag iops, string asm, list pattern>
-  : XI {
   let Inst{20}    = 0; // S Bit
   let Inst{24-21} = opcod;
@@ -177,7 +175,7 @@
 }
 // == add pc
 class JTI1 opcod, dag oops, dag iops, string asm, list pattern>
-  : XI {
   let Inst{20}    = 0; // S bit
   let Inst{24-21} = opcod;
@@ -185,7 +183,7 @@
 }
 // == ldr pc
 class JTI2 opcod, dag oops, dag iops, string asm, list pattern>
-  : XI {
   let Inst{20}    = 1; // L bit
   let Inst{21}    = 0; // W bit
@@ -198,43 +196,43 @@
 // addrmode1 instructions
 class AI1 opcod, dag oops, dag iops, Format f, string opc,
           string asm, list pattern>
-  : I {
   let Inst{24-21} = opcod;
   let Inst{27-26} = {0,0};
 }
 class AsI1 opcod, dag oops, dag iops, Format f, string opc,
            string asm, list pattern>
-  : sI {
   let Inst{24-21} = opcod;
   let Inst{27-26} = {0,0};
 }
 class AXI1 opcod, dag oops, dag iops, Format f, string asm,
            list pattern>
-  : XI {
   let Inst{24-21} = opcod;
   let Inst{27-26} = {0,0};
 }
-class AI1x2 opcod, dag oops, dag iops, Format f, string opc,
+class AI1x2 pattern>
-  : I;
 
 
 // addrmode2 loads and stores
-class AI2 opcod, dag oops, dag iops, Format f, string opc,
+class AI2 pattern>
-  : I {
   let Inst{27-26} = {0,1};
 }
 
 // loads
-class AI2ldw opcod, dag oops, dag iops, Format f, string opc,
+class AI2ldw pattern>
-  : I {
   let Inst{20}    = 1; // L bit
   let Inst{21}    = 0; // W bit
@@ -242,9 +240,9 @@
   let Inst{24}    = 1; // P bit
   let Inst{27-26} = {0,1};
 }
-class AXI2ldw opcod, dag oops, dag iops, Format f, string asm,
+class AXI2ldw pattern>
-  : XI {
   let Inst{20}    = 1; // L bit
   let Inst{21}    = 0; // W bit
@@ -252,9 +250,9 @@
   let Inst{24}    = 1; // P bit
   let Inst{27-26} = {0,1};
 }
-class AI2ldb opcod, dag oops, dag iops, Format f, string opc,
+class AI2ldb pattern>
-  : I {
   let Inst{20}    = 1; // L bit
   let Inst{21}    = 0; // W bit
@@ -262,9 +260,9 @@
   let Inst{24}    = 1; // P bit
   let Inst{27-26} = {0,1};
 }
-class AXI2ldb opcod, dag oops, dag iops, Format f, string asm,
+class AXI2ldb pattern>
-  : XI {
   let Inst{20}    = 1; // L bit
   let Inst{21}    = 0; // W bit
@@ -274,9 +272,9 @@
 }
 
 // stores
-class AI2stw opcod, dag oops, dag iops, Format f, string opc,
+class AI2stw pattern>
-  : I {
   let Inst{20}    = 0; // L bit
   let Inst{21}    = 0; // W bit
@@ -284,9 +282,9 @@
   let Inst{24}    = 1; // P bit
   let Inst{27-26} = {0,1};
 }
-class AXI2stw opcod, dag oops, dag iops, Format f, string asm,
+class AXI2stw pattern>
-  : XI {
   let Inst{20}    = 0; // L bit
   let Inst{21}    = 0; // W bit
@@ -294,9 +292,9 @@
   let Inst{24}    = 1; // P bit
   let Inst{27-26} = {0,1};
 }
-class AI2stb opcod, dag oops, dag iops, Format f, string opc,
+class AI2stb pattern>
-  : I {
   let Inst{20}    = 0; // L bit
   let Inst{21}    = 0; // W bit
@@ -304,9 +302,9 @@
   let Inst{24}    = 1; // P bit
   let Inst{27-26} = {0,1};
 }
-class AXI2stb opcod, dag oops, dag iops, Format f, string asm,
+class AXI2stb pattern>
-  : XI {
   let Inst{20}    = 0; // L bit
   let Inst{21}    = 0; // W bit
@@ -316,9 +314,9 @@
 }
 
 // Pre-indexed loads
-class AI2ldwpr opcod, dag oops, dag iops, Format f, string opc,
+class AI2ldwpr pattern>
-  : I {
   let Inst{20}    = 1; // L bit
   let Inst{21}    = 1; // W bit
@@ -326,9 +324,9 @@
   let Inst{24}    = 1; // P bit
   let Inst{27-26} = {0,1};
 }
-class AI2ldbpr opcod, dag oops, dag iops, Format f, string opc,
+class AI2ldbpr pattern>
-  : I {
   let Inst{20}    = 1; // L bit
   let Inst{21}    = 1; // W bit
@@ -338,9 +336,9 @@
 }
 
 // Pre-indexed stores
-class AI2stwpr opcod, dag oops, dag iops, Format f, string opc,
+class AI2stwpr pattern>
-  : I {
   let Inst{20}    = 0; // L bit
   let Inst{21}    = 1; // W bit
@@ -348,9 +346,9 @@
   let Inst{24}    = 1; // P bit
   let Inst{27-26} = {0,1};
 }
-class AI2stbpr opcod, dag oops, dag iops, Format f, string opc,
+class AI2stbpr pattern>
-  : I {
   let Inst{20}    = 0; // L bit
   let Inst{21}    = 1; // W bit
@@ -360,9 +358,9 @@
 }
 
 // Post-indexed loads
-class AI2ldwpo opcod, dag oops, dag iops, Format f, string opc,
+class AI2ldwpo pattern>
-  : I {
   let Inst{20}    = 1; // L bit
   let Inst{21}    = 0; // W bit
@@ -370,9 +368,9 @@
   let Inst{24}    = 0; // P bit
   let Inst{27-26} = {0,1};
 }
-class AI2ldbpo opcod, dag oops, dag iops, Format f, string opc,
+class AI2ldbpo pattern>
-  : I {
   let Inst{20}    = 1; // L bit
   let Inst{21}    = 0; // W bit
@@ -382,9 +380,9 @@
 }
 
 // Post-indexed stores
-class AI2stwpo opcod, dag oops, dag iops, Format f, string opc,
+class AI2stwpo pattern>
-  : I {
   let Inst{20}    = 0; // L bit
   let Inst{21}    = 0; // W bit
@@ -392,9 +390,9 @@
   let Inst{24}    = 0; // P bit
   let Inst{27-26} = {0,1};
 }
-class AI2stbpo opcod, dag oops, dag iops, Format f, string opc,
+class AI2stbpo pattern>
-  : I {
   let Inst{20}    = 0; // L bit
   let Inst{21}    = 0; // W bit
@@ -404,19 +402,19 @@
 }
 
 // addrmode3 instructions
-class AI3 opcod, dag oops, dag iops, Format f, string opc,
+class AI3 pattern>
-  : I;
-class AXI3 opcod, dag oops, dag iops, Format f, string asm,
+class AXI3 pattern>
-  : XI;
 
 // loads
-class AI3ldh opcod, dag oops, dag iops, Format f, string opc,
+class AI3ldh pattern>
-  : I {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
@@ -426,9 +424,9 @@
   let Inst{21}    = 0; // W bit
   let Inst{24}    = 1; // P bit
 }
-class AXI3ldh opcod, dag oops, dag iops, Format f, string asm,
+class AXI3ldh pattern>
-  : XI {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
@@ -438,9 +436,9 @@
   let Inst{21}    = 0; // W bit
   let Inst{24}    = 1; // P bit
 }
-class AI3ldsh opcod, dag oops, dag iops, Format f, string opc,
+class AI3ldsh pattern>
-  : I {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
@@ -450,9 +448,9 @@
   let Inst{21}    = 0; // W bit
   let Inst{24}    = 1; // P bit
 }
-class AXI3ldsh opcod, dag oops, dag iops, Format f, string asm,
+class AXI3ldsh pattern>
-  : XI {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
@@ -462,9 +460,9 @@
   let Inst{21}    = 0; // W bit
   let Inst{24}    = 1; // P bit
 }
-class AI3ldsb opcod, dag oops, dag iops, Format f, string opc,
+class AI3ldsb pattern>
-  : I {
   let Inst{4}     = 1;
   let Inst{5}     = 0; // H bit
@@ -474,9 +472,9 @@
   let Inst{21}    = 0; // W bit
   let Inst{24}    = 1; // P bit
 }
-class AXI3ldsb opcod, dag oops, dag iops, Format f, string asm,
+class AXI3ldsb pattern>
-  : XI {
   let Inst{4}     = 1;
   let Inst{5}     = 0; // H bit
@@ -486,9 +484,9 @@
   let Inst{21}    = 0; // W bit
   let Inst{24}    = 1; // P bit
 }
-class AI3ldd opcod, dag oops, dag iops, Format f, string opc,
+class AI3ldd pattern>
-  : I {
   let Inst{4}     = 1;
   let Inst{5}     = 0; // H bit
@@ -500,9 +498,9 @@
 }
 
 // stores
-class AI3sth opcod, dag oops, dag iops, Format f, string opc,
+class AI3sth pattern>
-  : I {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
@@ -512,9 +510,9 @@
   let Inst{21}    = 0; // W bit
   let Inst{24}    = 1; // P bit
 }
-class AXI3sth opcod, dag oops, dag iops, Format f, string asm,
+class AXI3sth pattern>
-  : XI {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
@@ -524,9 +522,9 @@
   let Inst{21}    = 0; // W bit
   let Inst{24}    = 1; // P bit
 }
-class AI3std opcod, dag oops, dag iops, Format f, string opc,
+class AI3std pattern>
-  : I {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
@@ -538,9 +536,9 @@
 }
 
 // Pre-indexed loads
-class AI3ldhpr opcod, dag oops, dag iops, Format f, string opc,
+class AI3ldhpr pattern>
-  : I {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
@@ -550,9 +548,9 @@
   let Inst{21}    = 1; // W bit
   let Inst{24}    = 1; // P bit
 }
-class AI3ldshpr opcod, dag oops, dag iops, Format f, string opc,
+class AI3ldshpr pattern>
-  : I {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
@@ -562,9 +560,9 @@
   let Inst{21}    = 1; // W bit
   let Inst{24}    = 1; // P bit
 }
-class AI3ldsbpr opcod, dag oops, dag iops, Format f, string opc,
+class AI3ldsbpr pattern>
-  : I {
   let Inst{4}     = 1;
   let Inst{5}     = 0; // H bit
@@ -576,9 +574,9 @@
 }
 
 // Pre-indexed stores
-class AI3sthpr opcod, dag oops, dag iops, Format f, string opc,
+class AI3sthpr pattern>
-  : I {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
@@ -590,9 +588,9 @@
 }
 
 // Post-indexed loads
-class AI3ldhpo opcod, dag oops, dag iops, Format f, string opc,
+class AI3ldhpo pattern>
-  : I {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
@@ -602,9 +600,9 @@
   let Inst{21}    = 1; // W bit
   let Inst{24}    = 0; // P bit
 }
-class AI3ldshpo opcod, dag oops, dag iops, Format f, string opc,
+class AI3ldshpo pattern>
-  : I {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
@@ -614,9 +612,9 @@
   let Inst{21}    = 1; // W bit
   let Inst{24}    = 0; // P bit
 }
-class AI3ldsbpo opcod, dag oops, dag iops, Format f, string opc,
+class AI3ldsbpo pattern>
-  : I {
   let Inst{4}     = 1;
   let Inst{5}     = 0; // H bit
@@ -628,9 +626,9 @@
 }
 
 // Post-indexed stores
-class AI3sthpo opcod, dag oops, dag iops, Format f, string opc,
+class AI3sthpo pattern>
-  : I {
   let Inst{4}     = 1;
   let Inst{5}     = 1; // H bit
@@ -643,30 +641,30 @@
 
 
 // addrmode4 instructions
-class AI4 opcod, dag oops, dag iops, Format f, string opc,
+class AI4 pattern>
-  : I {
   let Inst{25-27} = {0,0,1};
 }
-class AXI4ld opcod, dag oops, dag iops, Format f, string asm,
+class AXI4ld pattern>
-  : XI {
   let Inst{20}    = 1; // L bit
   let Inst{22}    = 0; // S bit
   let Inst{27-25} = 0b100;
 }
-class AXI4ldpc opcod, dag oops, dag iops, Format f, string asm,
+class AXI4ldpc pattern>
-  : XI {
   let Inst{20}    = 1; // L bit
   let Inst{27-25} = 0b100;
 }
-class AXI4st opcod, dag oops, dag iops, Format f, string asm,
+class AXI4st pattern>
-  : XI {
   let Inst{20}    = 0; // L bit
   let Inst{22}    = 0; // S bit
@@ -674,41 +672,41 @@
 }
 
 // Unsigned multiply, multiply-accumulate instructions.
-class AMul1I mulopc, dag oops, dag iops, string opc,
+class AMul1I opcod, dag oops, dag iops, string opc,
          string asm, list pattern>
-  : I<0, oops, iops, AddrModeNone, Size4Bytes, IndexModeNone, MulFrm, opc,
+  : I {
   let Inst{7-4}   = 0b1001;
   let Inst{20}    = 0; // S bit
-  let Inst{27-21} = mulopc;
+  let Inst{27-21} = opcod;
 }
-class AsMul1I mulopc, dag oops, dag iops, string opc,
+class AsMul1I opcod, dag oops, dag iops, string opc,
           string asm, list pattern>
-  : sI<0, oops, iops, AddrModeNone, Size4Bytes, IndexModeNone, MulFrm, opc,
+  : sI {
   let Inst{7-4}   = 0b1001;
-  let Inst{27-21} = mulopc;
+  let Inst{27-21} = opcod;
 }
 
 // Most significant word multiply
-class AMul2I mulopc, dag oops, dag iops, string opc,
+class AMul2I opcod, dag oops, dag iops, string opc,
          string asm, list pattern>
-  : I<0, oops, iops, AddrModeNone, Size4Bytes, IndexModeNone, MulFrm, opc,
+  : I {
   let Inst{7-4}   = 0b1001;
   let Inst{20}    = 1;
-  let Inst{27-21} = mulopc;
+  let Inst{27-21} = opcod;
 }
 
 // SMUL / SMULW / SMLA / SMLAW
-class AMulxyI mulopc, dag oops, dag iops, string opc,
+class AMulxyI opcod, dag oops, dag iops, string opc,
          string asm, list pattern>
-  : I<0, oops, iops, AddrModeNone, Size4Bytes, IndexModeNone, MulFrm, opc,
+  : I {
   let Inst{4}     = 0;
   let Inst{7}     = 1;
   let Inst{20}    = 0;
-  let Inst{27-21} = mulopc;
+  let Inst{27-21} = opcod;
 }
 
 //===----------------------------------------------------------------------===//
@@ -734,8 +732,7 @@
 
 class ThumbI pattern>
-  // FIXME: Set all opcodes to 0 for now.
-  : InstARM<0, am, sz, IndexModeNone, ThumbFrm, cstr> {
+  : InstARM {
   let OutOperandList = outs;
   let InOperandList = ins;
   let AsmString   = asm;

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=58800&r1=58799&r2=58800&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Thu Nov  6 02:47:38 2008
@@ -59,21 +59,17 @@
     IndexModePre   = 1,
     IndexModePost  = 2,
     
-    // Opcode
-    OpcodeShift   = 9,
-    OpcodeMask    = 0xf << OpcodeShift,
-
     //===------------------------------------------------------------------===//
     // Misc flags.
 
     // UnaryDP - Indicates this is a unary data processing instruction, i.e.
     // it doesn't have a Rn operand.
-    UnaryDP       = 1 << 13,
+    UnaryDP       = 1 << 9,
 
     //===------------------------------------------------------------------===//
     // Instruction encoding formats.
     //
-    FormShift   = 14,
+    FormShift   = 10,
     FormMask    = 0xf << FormShift,
 
     // Pseudo instructions

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58800&r1=58799&r2=58800&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu Nov  6 02:47:38 2008
@@ -390,11 +390,11 @@
 
 /// AI_unary_rrot - A unary operation with two forms: one whose operand is a
 /// register and one whose operand is a register rotated by 8/16/24.
-multiclass AI_unary_rrot opcod, string opc, PatFrag opnode> {
-  def r     : AI {
+  def r     : AI<(outs GPR:$dst), (ins GPR:$Src), Pseudo,
                  opc, " $dst, $Src",
                  [(set GPR:$dst, (opnode GPR:$Src))]>, Requires<[IsARM, HasV6]>;
-  def r_rot : AI,
               Requires<[IsARM, HasV6]>;
@@ -402,12 +402,12 @@
 
 /// AI_bin_rrot - A binary operation with two forms: one whose operand is a
 /// register and one whose operand is a register rotated by 8/16/24.
-multiclass AI_bin_rrot opcod, string opc, PatFrag opnode> {
-  def rr     : AI {
+  def rr     : AI<(outs GPR:$dst), (ins GPR:$LHS, GPR:$RHS),
                   Pseudo, opc, " $dst, $LHS, $RHS",
                   [(set GPR:$dst, (opnode GPR:$LHS, GPR:$RHS))]>,
                   Requires<[IsARM, HasV6]>;
-  def rr_rot : AI,
@@ -472,36 +472,36 @@
 
 let AddedComplexity = 10 in {
 let isSimpleLoad = 1 in
-def PICLDR  : AXI2ldw<0x0, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
+def PICLDR  : AXI2ldw<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
                   Pseudo, "${addr:label}:\n\tldr$p $dst, $addr",
                   [(set GPR:$dst, (load addrmodepc:$addr))]>;
 
-def PICLDRH : AXI3ldh<0xB, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
+def PICLDRH : AXI3ldh<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
                   Pseudo, "${addr:label}:\n\tldr${p}h $dst, $addr",
                   [(set GPR:$dst, (zextloadi16 addrmodepc:$addr))]>;
 
-def PICLDRB : AXI2ldb<0x1, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
+def PICLDRB : AXI2ldb<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
                   Pseudo, "${addr:label}:\n\tldr${p}b $dst, $addr",
                   [(set GPR:$dst, (zextloadi8 addrmodepc:$addr))]>;
 
-def PICLDRSH : AXI3ldsh<0xE, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
+def PICLDRSH : AXI3ldsh<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
                   Pseudo, "${addr:label}:\n\tldr${p}sh $dst, $addr",
                   [(set GPR:$dst, (sextloadi16 addrmodepc:$addr))]>;
 
-def PICLDRSB : AXI3ldsb<0xD, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
+def PICLDRSB : AXI3ldsb<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
                   Pseudo, "${addr:label}:\n\tldr${p}sb $dst, $addr",
                   [(set GPR:$dst, (sextloadi8 addrmodepc:$addr))]>;
 }
 let AddedComplexity = 10 in {
-def PICSTR  : AXI2stw<0x0, (outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
+def PICSTR  : AXI2stw<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
                Pseudo, "${addr:label}:\n\tstr$p $src, $addr",
                [(store GPR:$src, addrmodepc:$addr)]>;
 
-def PICSTRH : AXI3sth<0xB, (outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
+def PICSTRH : AXI3sth<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
                Pseudo, "${addr:label}:\n\tstr${p}h $src, $addr",
                [(truncstorei16 GPR:$src, addrmodepc:$addr)]>;
 
-def PICSTRB : AXI2stb<0x1, (outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
+def PICSTRB : AXI2stb<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
                Pseudo, "${addr:label}:\n\tstr${p}b $src, $addr",
                [(truncstorei8 GPR:$src, addrmodepc:$addr)]>;
 }
@@ -512,7 +512,7 @@
 //
 
 let isReturn = 1, isTerminator = 1 in
-  def BX_RET : AI<0x0, (outs), (ins), BranchMisc, "bx", " lr", [(ARMretflag)]> {
+  def BX_RET : AI<(outs), (ins), BranchMisc, "bx", " lr", [(ARMretflag)]> {
   let Inst{7-4}   = 0b0001;
   let Inst{19-8}  = 0b111111111111;
   let Inst{27-20} = 0b00010010;
@@ -522,7 +522,7 @@
 // FIXME: $dst1 should be a def. But the extra ops must be in the end of the
 // operand list.
 let isReturn = 1, isTerminator = 1 in
-  def LDM_RET : AXI4ldpc<0x0, (outs),
+  def LDM_RET : AXI4ldpc<(outs),
                     (ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops),
                     LdMulFrm, "ldm${p}${addr:submode} $addr, $dst1",
                     []>;
@@ -530,16 +530,16 @@
 let isCall = 1,
   Defs = [R0, R1, R2, R3, R12, LR,
           D0, D1, D2, D3, D4, D5, D6, D7, CPSR] in {
-  def BL  : ABLI<0xB, (outs), (ins i32imm:$func, variable_ops), Branch,
+  def BL  : ABLI<0b1011, (outs), (ins i32imm:$func, variable_ops), Branch,
                 "bl ${func:call}",
                 [(ARMcall tglobaladdr:$func)]>;
 
-  def BL_pred : ABLpredI<0xB, (outs), (ins i32imm:$func, variable_ops), Branch,
+  def BL_pred : ABLpredI<0b1011, (outs), (ins i32imm:$func, variable_ops), Branch,
                    "bl", " ${func:call}",
                    [(ARMcall_pred tglobaladdr:$func)]>;
 
   // ARMv5T and above
-  def BLX : AXI<0x0, (outs), (ins GPR:$func, variable_ops), BranchMisc,
+  def BLX : AXI<(outs), (ins GPR:$func, variable_ops), BranchMisc,
                 "blx $func",
                 [(ARMcall GPR:$func)]>, Requires<[IsARM, HasV5T]> {
     let Inst{7-4}   = 0b0011;
@@ -549,7 +549,7 @@
 
   let Uses = [LR] in {
     // ARMv4T
-    def BX : AXIx2<0x0, (outs), (ins GPR:$func, variable_ops),
+    def BX : AXIx2<(outs), (ins GPR:$func, variable_ops),
                    BranchMisc, "mov lr, pc\n\tbx $func",
                    [(ARMcall_nolink GPR:$func)]>;
   }
@@ -559,28 +559,31 @@
   // B is "predicable" since it can be xformed into a Bcc.
   let isBarrier = 1 in {
     let isPredicable = 1 in
-    def B : ABI<0xA, (outs), (ins brtarget:$target), Branch, "b $target",
+    def B : ABI<0b1010, (outs), (ins brtarget:$target), Branch, "b $target",
                 [(br bb:$target)]>;
 
   let isNotDuplicable = 1, isIndirectBranch = 1 in {
-  def BR_JTr : JTI<0b1101, (outs), (ins GPR:$target, jtblock_operand:$jt, i32imm:$id),
+  def BR_JTr : JTI<0b1101, (outs),
+                           (ins GPR:$target, jtblock_operand:$jt, i32imm:$id),
                     "mov pc, $target \n$jt",
                     [(ARMbrjt GPR:$target, tjumptable:$jt, imm:$id)]>;
-  def BR_JTm : JTI2<0x0, (outs), (ins addrmode2:$target, jtblock_operand:$jt, i32imm:$id),
+  def BR_JTm : JTI2<0, (outs),
+                       (ins addrmode2:$target, jtblock_operand:$jt, i32imm:$id),
                      "ldr pc, $target \n$jt",
                      [(ARMbrjt (i32 (load addrmode2:$target)), tjumptable:$jt,
                        imm:$id)]>;
-  def BR_JTadd : JTI1<0b0100, (outs), (ins GPR:$target, GPR:$idx, jtblock_operand:$jt,
-                       i32imm:$id),
-                       "add pc, $target, $idx \n$jt",
-                       [(ARMbrjt (add GPR:$target, GPR:$idx), tjumptable:$jt,
-                         imm:$id)]>;
+  def BR_JTadd : JTI1<0b0100, (outs),
+                              (ins GPR:$target, GPR:$idx, jtblock_operand:$jt,
+                      i32imm:$id),
+                      "add pc, $target, $idx \n$jt",
+                      [(ARMbrjt (add GPR:$target, GPR:$idx), tjumptable:$jt,
+                        imm:$id)]>;
   }
   }
 
   // FIXME: should be able to write a pattern for ARMBrcond, but can't use
   // a two-value operand where a dag node expects two operands. :( 
-  def Bcc : ABccI<0xA, (outs), (ins brtarget:$target), Branch,
+  def Bcc : ABccI<0b1010, (outs), (ins brtarget:$target), Branch,
                "b", " $target",
                [/*(ARMbrcond bb:$target, imm:$cc, CCR:$ccr)*/]>;
 }
@@ -591,133 +594,133 @@
 
 // Load
 let isSimpleLoad = 1 in 
-def LDR  : AI2ldw<0x0, (outs GPR:$dst), (ins addrmode2:$addr), LdFrm,
+def LDR  : AI2ldw<(outs GPR:$dst), (ins addrmode2:$addr), LdFrm,
                "ldr", " $dst, $addr",
                [(set GPR:$dst, (load addrmode2:$addr))]>;
 
 // Special LDR for loads from non-pc-relative constpools.
 let isSimpleLoad = 1, mayLoad = 1, isReMaterializable = 1 in
-def LDRcp : AI2ldw<0x0, (outs GPR:$dst), (ins addrmode2:$addr), LdFrm,
+def LDRcp : AI2ldw<(outs GPR:$dst), (ins addrmode2:$addr), LdFrm,
                  "ldr", " $dst, $addr", []>;
 
 // Loads with zero extension
-def LDRH  : AI3ldh<0xB, (outs GPR:$dst), (ins addrmode3:$addr), LdMiscFrm,
+def LDRH  : AI3ldh<(outs GPR:$dst), (ins addrmode3:$addr), LdMiscFrm,
                  "ldr", "h $dst, $addr",
                 [(set GPR:$dst, (zextloadi16 addrmode3:$addr))]>;
 
-def LDRB  : AI2ldb<0x1, (outs GPR:$dst), (ins addrmode2:$addr), LdFrm,
+def LDRB  : AI2ldb<(outs GPR:$dst), (ins addrmode2:$addr), LdFrm,
                  "ldr", "b $dst, $addr",
                 [(set GPR:$dst, (zextloadi8 addrmode2:$addr))]>;
 
 // Loads with sign extension
-def LDRSH : AI3ldsh<0xE, (outs GPR:$dst), (ins addrmode3:$addr), LdMiscFrm,
+def LDRSH : AI3ldsh<(outs GPR:$dst), (ins addrmode3:$addr), LdMiscFrm,
                  "ldr", "sh $dst, $addr",
                 [(set GPR:$dst, (sextloadi16 addrmode3:$addr))]>;
 
-def LDRSB : AI3ldsb<0xD, (outs GPR:$dst), (ins addrmode3:$addr), LdMiscFrm,
+def LDRSB : AI3ldsb<(outs GPR:$dst), (ins addrmode3:$addr), LdMiscFrm,
                  "ldr", "sb $dst, $addr",
                 [(set GPR:$dst, (sextloadi8 addrmode3:$addr))]>;
 
 let mayLoad = 1 in {
 // Load doubleword
-def LDRD  : AI3ldd<0xD, (outs GPR:$dst), (ins addrmode3:$addr), LdMiscFrm,
+def LDRD  : AI3ldd<(outs GPR:$dst), (ins addrmode3:$addr), LdMiscFrm,
                  "ldr", "d $dst, $addr",
                 []>, Requires<[IsARM, HasV5T]>;
 
 // Indexed loads
-def LDR_PRE  : AI2ldwpr<0x0, (outs GPR:$dst, GPR:$base_wb),
+def LDR_PRE  : AI2ldwpr<(outs GPR:$dst, GPR:$base_wb),
                      (ins addrmode2:$addr), LdFrm,
                      "ldr", " $dst, $addr!", "$addr.base = $base_wb", []>;
 
-def LDR_POST : AI2ldwpo<0x0, (outs GPR:$dst, GPR:$base_wb),
+def LDR_POST : AI2ldwpo<(outs GPR:$dst, GPR:$base_wb),
                      (ins GPR:$base, am2offset:$offset), LdFrm,
                      "ldr", " $dst, [$base], $offset", "$base = $base_wb", []>;
 
-def LDRH_PRE  : AI3ldhpr<0xB, (outs GPR:$dst, GPR:$base_wb),
+def LDRH_PRE  : AI3ldhpr<(outs GPR:$dst, GPR:$base_wb),
                      (ins addrmode3:$addr), LdMiscFrm,
                      "ldr", "h $dst, $addr!", "$addr.base = $base_wb", []>;
 
-def LDRH_POST : AI3ldhpo<0xB, (outs GPR:$dst, GPR:$base_wb),
+def LDRH_POST : AI3ldhpo<(outs GPR:$dst, GPR:$base_wb),
                      (ins GPR:$base,am3offset:$offset), LdMiscFrm,
                      "ldr", "h $dst, [$base], $offset", "$base = $base_wb", []>;
 
-def LDRB_PRE  : AI2ldbpr<0x1, (outs GPR:$dst, GPR:$base_wb),
+def LDRB_PRE  : AI2ldbpr<(outs GPR:$dst, GPR:$base_wb),
                      (ins addrmode2:$addr), LdFrm,
                      "ldr", "b $dst, $addr!", "$addr.base = $base_wb", []>;
 
-def LDRB_POST : AI2ldbpo<0x1, (outs GPR:$dst, GPR:$base_wb),
+def LDRB_POST : AI2ldbpo<(outs GPR:$dst, GPR:$base_wb),
                      (ins GPR:$base,am2offset:$offset), LdFrm,
                      "ldr", "b $dst, [$base], $offset", "$base = $base_wb", []>;
 
-def LDRSH_PRE : AI3ldshpr<0xE, (outs GPR:$dst, GPR:$base_wb),
+def LDRSH_PRE : AI3ldshpr<(outs GPR:$dst, GPR:$base_wb),
                       (ins addrmode3:$addr), LdMiscFrm,
                       "ldr", "sh $dst, $addr!", "$addr.base = $base_wb", []>;
 
-def LDRSH_POST: AI3ldshpo<0xE, (outs GPR:$dst, GPR:$base_wb),
+def LDRSH_POST: AI3ldshpo<(outs GPR:$dst, GPR:$base_wb),
                       (ins GPR:$base,am3offset:$offset), LdMiscFrm,
                       "ldr", "sh $dst, [$base], $offset", "$base = $base_wb", []>;
 
-def LDRSB_PRE : AI3ldsbpr<0xD, (outs GPR:$dst, GPR:$base_wb),
+def LDRSB_PRE : AI3ldsbpr<(outs GPR:$dst, GPR:$base_wb),
                       (ins addrmode3:$addr), LdMiscFrm,
                       "ldr", "sb $dst, $addr!", "$addr.base = $base_wb", []>;
 
-def LDRSB_POST: AI3ldsbpo<0xD, (outs GPR:$dst, GPR:$base_wb),
+def LDRSB_POST: AI3ldsbpo<(outs GPR:$dst, GPR:$base_wb),
                       (ins GPR:$base,am3offset:$offset), LdMiscFrm,
                       "ldr", "sb $dst, [$base], $offset", "$base = $base_wb", []>;
 }
 
 // Store
-def STR  : AI2stw<0x0, (outs), (ins GPR:$src, addrmode2:$addr), StFrm,
+def STR  : AI2stw<(outs), (ins GPR:$src, addrmode2:$addr), StFrm,
                "str", " $src, $addr",
                [(store GPR:$src, addrmode2:$addr)]>;
 
 // Stores with truncate
-def STRH : AI3sth<0xB, (outs), (ins GPR:$src, addrmode3:$addr), StMiscFrm,
+def STRH : AI3sth<(outs), (ins GPR:$src, addrmode3:$addr), StMiscFrm,
                "str", "h $src, $addr",
                [(truncstorei16 GPR:$src, addrmode3:$addr)]>;
 
-def STRB : AI2stb<0x1, (outs), (ins GPR:$src, addrmode2:$addr), StFrm,
+def STRB : AI2stb<(outs), (ins GPR:$src, addrmode2:$addr), StFrm,
                "str", "b $src, $addr",
                [(truncstorei8 GPR:$src, addrmode2:$addr)]>;
 
 // Store doubleword
 let mayStore = 1 in
-def STRD : AI3std<0xF, (outs), (ins GPR:$src, addrmode3:$addr), StMiscFrm,
+def STRD : AI3std<(outs), (ins GPR:$src, addrmode3:$addr), StMiscFrm,
                "str", "d $src, $addr",
                []>, Requires<[IsARM, HasV5T]>;
 
 // Indexed stores
-def STR_PRE  : AI2stwpr<0x0, (outs GPR:$base_wb),
+def STR_PRE  : AI2stwpr<(outs GPR:$base_wb),
                      (ins GPR:$src, GPR:$base, am2offset:$offset), StFrm,
                     "str", " $src, [$base, $offset]!", "$base = $base_wb",
                     [(set GPR:$base_wb,
                       (pre_store GPR:$src, GPR:$base, am2offset:$offset))]>;
 
-def STR_POST : AI2stwpo<0x0, (outs GPR:$base_wb),
+def STR_POST : AI2stwpo<(outs GPR:$base_wb),
                      (ins GPR:$src, GPR:$base,am2offset:$offset), StFrm,
                     "str", " $src, [$base], $offset", "$base = $base_wb",
                     [(set GPR:$base_wb,
                       (post_store GPR:$src, GPR:$base, am2offset:$offset))]>;
 
-def STRH_PRE : AI3sthpr<0xB, (outs GPR:$base_wb),
+def STRH_PRE : AI3sthpr<(outs GPR:$base_wb),
                      (ins GPR:$src, GPR:$base,am3offset:$offset), StMiscFrm,
                      "str", "h $src, [$base, $offset]!", "$base = $base_wb",
                     [(set GPR:$base_wb,
                       (pre_truncsti16 GPR:$src, GPR:$base,am3offset:$offset))]>;
 
-def STRH_POST: AI3sthpo<0xB, (outs GPR:$base_wb),
+def STRH_POST: AI3sthpo<(outs GPR:$base_wb),
                      (ins GPR:$src, GPR:$base,am3offset:$offset), StMiscFrm,
                      "str", "h $src, [$base], $offset", "$base = $base_wb",
                     [(set GPR:$base_wb, (post_truncsti16 GPR:$src,
                                          GPR:$base, am3offset:$offset))]>;
 
-def STRB_PRE : AI2stbpr<0x1, (outs GPR:$base_wb),
+def STRB_PRE : AI2stbpr<(outs GPR:$base_wb),
                      (ins GPR:$src, GPR:$base,am2offset:$offset), StFrm,
                      "str", "b $src, [$base, $offset]!", "$base = $base_wb",
                     [(set GPR:$base_wb, (pre_truncsti8 GPR:$src,
                                          GPR:$base, am2offset:$offset))]>;
 
-def STRB_POST: AI2stbpo<0x1, (outs GPR:$base_wb),
+def STRB_POST: AI2stbpo<(outs GPR:$base_wb),
                      (ins GPR:$src, GPR:$base,am2offset:$offset), StFrm,
                      "str", "b $src, [$base], $offset", "$base = $base_wb",
                     [(set GPR:$base_wb, (post_truncsti8 GPR:$src,
@@ -729,13 +732,13 @@
 
 // FIXME: $dst1 should be a def.
 let mayLoad = 1 in
-def LDM : AXI4ld<0x0, (outs),
+def LDM : AXI4ld<(outs),
                (ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops),
                LdMulFrm, "ldm${p}${addr:submode} $addr, $dst1",
                []>;
 
 let mayStore = 1 in
-def STM : AXI4st<0x0, (outs),
+def STM : AXI4st<(outs),
                (ins addrmode4:$addr, pred:$p, reglist:$src1, variable_ops),
                StMulFrm, "stm${p}${addr:submode} $addr, $src1",
                []>;
@@ -775,12 +778,12 @@
 
 // Sign extenders
 
-defm SXTB  : AI_unary_rrot<0x0, "sxtb", UnOpFrag<(sext_inreg node:$Src, i8)>>;
-defm SXTH  : AI_unary_rrot<0x0, "sxth", UnOpFrag<(sext_inreg node:$Src, i16)>>;
+defm SXTB  : AI_unary_rrot<"sxtb", UnOpFrag<(sext_inreg node:$Src, i8)>>;
+defm SXTH  : AI_unary_rrot<"sxth", UnOpFrag<(sext_inreg node:$Src, i16)>>;
 
-defm SXTAB : AI_bin_rrot<0x0, "sxtab",
+defm SXTAB : AI_bin_rrot<"sxtab",
                         BinOpFrag<(add node:$LHS, (sext_inreg node:$RHS, i8))>>;
-defm SXTAH : AI_bin_rrot<0x0, "sxtah",
+defm SXTAH : AI_bin_rrot<"sxtah",
                         BinOpFrag<(add node:$LHS, (sext_inreg node:$RHS,i16))>>;
 
 // TODO: SXT(A){B|H}16
@@ -788,18 +791,18 @@
 // Zero extenders
 
 let AddedComplexity = 16 in {
-defm UXTB   : AI_unary_rrot<0x0, "uxtb"  , UnOpFrag<(and node:$Src, 0x000000FF)>>;
-defm UXTH   : AI_unary_rrot<0x0, "uxth"  , UnOpFrag<(and node:$Src, 0x0000FFFF)>>;
-defm UXTB16 : AI_unary_rrot<0x0, "uxtb16", UnOpFrag<(and node:$Src, 0x00FF00FF)>>;
+defm UXTB   : AI_unary_rrot<"uxtb"  , UnOpFrag<(and node:$Src, 0x000000FF)>>;
+defm UXTH   : AI_unary_rrot<"uxth"  , UnOpFrag<(and node:$Src, 0x0000FFFF)>>;
+defm UXTB16 : AI_unary_rrot<"uxtb16", UnOpFrag<(and node:$Src, 0x00FF00FF)>>;
 
 def : ARMV6Pat<(and (shl GPR:$Src, 8), 0xFF00FF),
                (UXTB16r_rot GPR:$Src, 24)>;
 def : ARMV6Pat<(and (srl GPR:$Src, 8), 0xFF00FF),
                (UXTB16r_rot GPR:$Src, 8)>;
 
-defm UXTAB : AI_bin_rrot<0x0, "uxtab",
+defm UXTAB : AI_bin_rrot<"uxtab",
                         BinOpFrag<(add node:$LHS, (and node:$RHS, 0x00FF))>>;
-defm UXTAH : AI_bin_rrot<0x0, "uxtah",
+defm UXTAH : AI_bin_rrot<"uxtah",
                         BinOpFrag<(add node:$LHS, (and node:$RHS, 0xFFFF))>>;
 }
 
@@ -1086,15 +1089,15 @@
 //  Misc. Arithmetic Instructions.
 //
 
-def CLZ  : AI<0x0, (outs GPR:$dst), (ins GPR:$src), ArithMisc,
+def CLZ  : AI<(outs GPR:$dst), (ins GPR:$src), ArithMisc,
               "clz", " $dst, $src",
               [(set GPR:$dst, (ctlz GPR:$src))]>, Requires<[IsARM, HasV5T]>;
 
-def REV  : AI<0x0, (outs GPR:$dst), (ins GPR:$src), ArithMisc,
+def REV  : AI<(outs GPR:$dst), (ins GPR:$src), ArithMisc,
               "rev", " $dst, $src",
               [(set GPR:$dst, (bswap GPR:$src))]>, Requires<[IsARM, HasV6]>;
 
-def REV16 : AI<0x0, (outs GPR:$dst), (ins GPR:$src), ArithMisc,
+def REV16 : AI<(outs GPR:$dst), (ins GPR:$src), ArithMisc,
                "rev16", " $dst, $src",
                [(set GPR:$dst,
                    (or (and (srl GPR:$src, 8), 0xFF),
@@ -1103,7 +1106,7 @@
                                (and (shl GPR:$src, 8), 0xFF000000)))))]>,
                Requires<[IsARM, HasV6]>;
 
-def REVSH : AI<0x0, (outs GPR:$dst), (ins GPR:$src), ArithMisc,
+def REVSH : AI<(outs GPR:$dst), (ins GPR:$src), ArithMisc,
                "revsh", " $dst, $src",
                [(set GPR:$dst,
                   (sext_inreg
@@ -1111,7 +1114,7 @@
                         (shl GPR:$src, 8)), i16))]>,
                Requires<[IsARM, HasV6]>;
 
-def PKHBT : AI<0x0, (outs GPR:$dst), (ins GPR:$src1, GPR:$src2, i32imm:$shamt),
+def PKHBT : AI<(outs GPR:$dst), (ins GPR:$src1, GPR:$src2, i32imm:$shamt),
                Pseudo, "pkhbt", " $dst, $src1, $src2, LSL $shamt",
                [(set GPR:$dst, (or (and GPR:$src1, 0xFFFF),
                                    (and (shl GPR:$src2, (i32 imm:$shamt)),
@@ -1125,7 +1128,7 @@
                (PKHBT GPR:$src1, GPR:$src2, imm16_31:$shamt)>;
 
 
-def PKHTB : AI<0x0, (outs GPR:$dst), (ins GPR:$src1, GPR:$src2, i32imm:$shamt),
+def PKHTB : AI<(outs GPR:$dst), (ins GPR:$src1, GPR:$src2, i32imm:$shamt),
                Pseudo, "pkhtb", " $dst, $src1, $src2, ASR $shamt",
                [(set GPR:$dst, (or (and GPR:$src1, 0xFFFF0000),
                                    (and (sra GPR:$src2, imm16_31:$shamt),
@@ -1150,9 +1153,9 @@
                         BinOpFrag<(ARMcmp node:$LHS,(ineg node:$RHS))>>;
 
 // Note that TST/TEQ don't set all the same flags that CMP does!
-defm TST  : AI1_cmp_irs<0x8, "tst",
+defm TST  : AI1_cmp_irs<0b1000, "tst",
                         BinOpFrag<(ARMcmpNZ (and node:$LHS, node:$RHS), 0)>>;
-defm TEQ  : AI1_cmp_irs<0x9, "teq",
+defm TEQ  : AI1_cmp_irs<0b1001, "teq",
                         BinOpFrag<(ARMcmpNZ (xor node:$LHS, node:$RHS), 0)>>;
 
 defm CMPnz : AI1_cmp_irs<0b1010, "cmp",
@@ -1170,17 +1173,19 @@
 // Conditional moves
 // FIXME: should be able to write a pattern for ARMcmov, but can't use
 // a two-value operand where a dag node expects two operands. :( 
-def MOVCCr : AI<0xD, (outs GPR:$dst), (ins GPR:$false, GPR:$true), DPFrm,
+def MOVCCr : AI1<0b1101, (outs GPR:$dst), (ins GPR:$false, GPR:$true), DPFrm,
                 "mov", " $dst, $true",
       [/*(set GPR:$dst, (ARMcmov GPR:$false, GPR:$true, imm:$cc, CCR:$ccr))*/]>,
-                RegConstraint<"$false = $dst">;
+                RegConstraint<"$false = $dst">, UnaryDP;
 
-def MOVCCs : AI<0xD, (outs GPR:$dst), (ins GPR:$false, so_reg:$true), DPSoRegFrm,
+def MOVCCs : AI1<0b1101, (outs GPR:$dst),
+                        (ins GPR:$false, so_reg:$true), DPSoRegFrm,
                 "mov", " $dst, $true",
    [/*(set GPR:$dst, (ARMcmov GPR:$false, so_reg:$true, imm:$cc, CCR:$ccr))*/]>,
                 RegConstraint<"$false = $dst">, UnaryDP;
 
-def MOVCCi : AI<0xD, (outs GPR:$dst), (ins GPR:$false, so_imm:$true), DPFrm,
+def MOVCCi : AI1<0b1101, (outs GPR:$dst),
+                        (ins GPR:$false, so_imm:$true), DPFrm,
                 "mov", " $dst, $true",
    [/*(set GPR:$dst, (ARMcmov GPR:$false, so_imm:$true, imm:$cc, CCR:$ccr))*/]>,
                 RegConstraint<"$false = $dst">, UnaryDP;
@@ -1210,7 +1215,7 @@
 // __aeabi_read_tp preserves the registers r1-r3.
 let isCall = 1,
   Defs = [R0, R12, LR, CPSR] in {
-  def TPsoft : AXI<0x0, (outs), (ins), BranchMisc,
+  def TPsoft : AXI<(outs), (ins), BranchMisc,
                "bl __aeabi_read_tp",
                [(set R0, ARMthread_pointer)]>;
 }
@@ -1229,7 +1234,7 @@
 
 // Two piece so_imms.
 let isReMaterializable = 1 in
-def MOVi2pieces : AI1x2<0x0, (outs GPR:$dst), (ins so_imm2part:$src), Pseudo,
+def MOVi2pieces : AI1x2<(outs GPR:$dst), (ins so_imm2part:$src), Pseudo,
                          "mov", " $dst, $src",
                          [(set GPR:$dst, so_imm2part:$src)]>;
 

Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=58800&r1=58799&r2=58800&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Thu Nov  6 02:47:38 2008
@@ -17,49 +17,49 @@
 
 // ARM Float Instruction
 class ASI pattern>
-  : AI<0x0, outs, ins, VFPFrm, opc, asm, pattern> {
+  : AI {
   // TODO: Mark the instructions with the appropriate subtarget info.
 }
 
 class ASI5 pattern>
-  : I<0x0, outs, ins, AddrMode5, Size4Bytes, IndexModeNone,
+  : I {
   // TODO: Mark the instructions with the appropriate subtarget info.
 }
 
 // ARM Double Instruction
 class ADI pattern>
-  : AI<0x0, outs, ins, VFPFrm, opc, asm, pattern> {
+  : AI {
   // TODO: Mark the instructions with the appropriate subtarget info.
 }
 
 class ADI5 pattern>
-  : I<0x0, outs, ins, AddrMode5, Size4Bytes, IndexModeNone,
+  : I {
   // TODO: Mark the instructions with the appropriate subtarget info.
 }
 
 // Special cases.
 class AXSI pattern>
-  : XI<0x0, outs, ins, AddrModeNone, Size4Bytes, IndexModeNone,
+  : XI {
   // TODO: Mark the instructions with the appropriate subtarget info.
 }
 
 class AXSI5 pattern>
-  : XI<0x0, outs, ins, AddrMode5, Size4Bytes, IndexModeNone,
+  : XI {
   // TODO: Mark the instructions with the appropriate subtarget info.
 }
 
 class AXDI pattern>
-  : XI<0x0, outs, ins, AddrModeNone, Size4Bytes, IndexModeNone,
+  : XI {
   // TODO: Mark the instructions with the appropriate subtarget info.
 }
 
 class AXDI5 pattern>
-  : XI<0x0, outs, ins, AddrMode5, Size4Bytes, IndexModeNone,
+  : XI {
   // TODO: Mark the instructions with the appropriate subtarget info.
 }




From baldrick at free.fr  Thu Nov  6 02:51:33 2008
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 06 Nov 2008 08:51:33 -0000
Subject: [llvm-commits] [llvm] r58801 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
Message-ID: <200811060851.mA68pXZH012233@zion.cs.uiuc.edu>

Author: baldrick
Date: Thu Nov  6 02:51:32 2008
New Revision: 58801

URL: http://llvm.org/viewvc/llvm-project?rev=58801&view=rev
Log:
Formating/comment changes - no functionality change.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=58801&r1=58800&r2=58801&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Thu Nov  6 02:51:32 2008
@@ -80,20 +80,15 @@
       return Legal;
     case TargetLowering::Promote:
       // Promote can mean
-      //   1) On integers, use the promote integer type (e.g., i8 to i32)
-      //   2) For vectors, use the widen vector type returned by the target
-      //      (e.g., v3i32 to v4i32).  If the type is the same as the original
-      //      type, than expand the vector instead.
-      if (!VT.isVector()) {
+      //   1) For integers, use a larger integer type (e.g. i8 -> i32).
+      //   2) For vectors, use a wider vector type (e.g. v3i32 -> v4i32).
+      if (!VT.isVector())
         return PromoteInteger;
-      } else {
-        // TODO: move widen code to LegalizeType.
-        if (VT.getVectorNumElements() == 1) {
-          return ScalarizeVector;
-        } else {
-          return SplitVector;
-        }        
-      }
+      else if (VT.getVectorNumElements() == 1)
+        return ScalarizeVector;
+      else
+        // TODO: move widen code to LegalizeTypes.
+        return SplitVector;
     case TargetLowering::Expand:
       // Expand can mean
       // 1) split scalar in half, 2) convert a float to an integer,




From nunoplopes at sapo.pt  Thu Nov  6 10:21:50 2008
From: nunoplopes at sapo.pt (Nuno Lopes)
Date: Thu, 06 Nov 2008 16:21:50 -0000
Subject: [llvm-commits] [llvm] r58805 - /llvm/trunk/lib/System/Mutex.cpp
Message-ID: <200811061621.mA6GLoXr031979@zion.cs.uiuc.edu>

Author: nlopes
Date: Thu Nov  6 10:21:49 2008
New Revision: 58805

URL: http://llvm.org/viewvc/llvm-project?rev=58805&view=rev
Log:
plug leakage of mutex data. pthread_mutex_destroy() doesnt free our malloc'ed memory.

Modified:
    llvm/trunk/lib/System/Mutex.cpp

Modified: llvm/trunk/lib/System/Mutex.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Mutex.cpp?rev=58805&r1=58804&r2=58805&view=diff

==============================================================================
--- llvm/trunk/lib/System/Mutex.cpp (original)
+++ llvm/trunk/lib/System/Mutex.cpp Thu Nov  6 10:21:49 2008
@@ -101,7 +101,7 @@
     pthread_mutex_t* mutex = static_cast(data_);
     assert(mutex != 0);
     pthread_mutex_destroy(mutex);
-    assert(mutex != 0);
+    free(mutex);
   }
 }
 




From evan.cheng at apple.com  Thu Nov  6 11:46:05 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 06 Nov 2008 17:46:05 -0000
Subject: [llvm-commits] [llvm] r58807 - in /llvm/trunk/lib/ExecutionEngine:
 ExecutionEngine.cpp JIT/JITEmitter.cpp
Message-ID: <200811061746.mA6Hk51N002692@zion.cs.uiuc.edu>

Author: evancheng
Date: Thu Nov  6 11:46:04 2008
New Revision: 58807

URL: http://llvm.org/viewvc/llvm-project?rev=58807&view=rev
Log:
Improve JIT debugging outputs format consistency.

Modified:
    llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp
    llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp

Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp?rev=58807&r1=58806&r2=58807&view=diff

==============================================================================
--- llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Thu Nov  6 11:46:04 2008
@@ -94,7 +94,7 @@
 void ExecutionEngine::addGlobalMapping(const GlobalValue *GV, void *Addr) {
   MutexGuard locked(lock);
 
-  DOUT << "Map \'" << GV->getNameStart() << "\' to " << Addr << "\n";  
+  DOUT << "JIT: Map \'" << GV->getNameStart() << "\' to " << Addr << "\n";  
   void *&CurVal = state.getGlobalAddressMap(locked)[GV];
   assert((CurVal == 0 || Addr == 0) && "GlobalMapping already established!");
   CurVal = Addr;
@@ -211,13 +211,13 @@
   unsigned PtrSize = EE->getTargetData()->getPointerSize();
   char *Result = new char[(InputArgv.size()+1)*PtrSize];
 
-  DOUT << "ARGV = " << (void*)Result << "\n";
+  DOUT << "JIT: ARGV = " << (void*)Result << "\n";
   const Type *SBytePtr = PointerType::getUnqual(Type::Int8Ty);
 
   for (unsigned i = 0; i != InputArgv.size(); ++i) {
     unsigned Size = InputArgv[i].size()+1;
     char *Dest = new char[Size];
-    DOUT << "ARGV[" << i << "] = " << (void*)Dest << "\n";
+    DOUT << "JIT: ARGV[" << i << "] = " << (void*)Dest << "\n";
 
     std::copy(InputArgv[i].begin(), InputArgv[i].end(), Dest);
     Dest[Size-1] = 0;
@@ -839,7 +839,7 @@
 // specified memory location...
 //
 void ExecutionEngine::InitializeMemory(const Constant *Init, void *Addr) {
-  DOUT << "Initializing " << Addr << " ";
+  DOUT << "JIT: Initializing " << Addr << " ";
   DEBUG(Init->dump());
   if (isa(Init)) {
     return;
@@ -989,7 +989,6 @@
 // already in the map.
 void ExecutionEngine::EmitGlobalVariable(const GlobalVariable *GV) {
   void *GA = getPointerToGlobalIfAvailable(GV);
-  DOUT << "Global '" << GV->getName() << "' -> " << GA << "\n";
 
   if (GA == 0) {
     // If it's not already specified, allocate memory for the global.

Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp?rev=58807&r1=58806&r2=58807&view=diff

==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Thu Nov  6 11:46:04 2008
@@ -226,7 +226,7 @@
   if (!idx) {
     idx = ++nextGOTIndex;
     revGOTMap[addr] = idx;
-    DOUT << "Adding GOT entry " << idx << " for addr " << addr << "\n";
+    DOUT << "JIT: Adding GOT entry " << idx << " for addr " << addr << "\n";
   }
   return idx;
 }
@@ -664,7 +664,7 @@
   size_t GVSize = (size_t)TheJIT->getTargetData()->getABITypeSize(ElTy);
   size_t GVAlign = 
       (size_t)TheJIT->getTargetData()->getPreferredAlignment(GV);
-  DOUT << "Adding in size " << GVSize << " alignment " << GVAlign;
+  DOUT << "JIT: Adding in size " << GVSize << " alignment " << GVAlign;
   DEBUG(GV->dump());
   // Assume code section ends with worst possible alignment, so first
   // variable needs maximal padding.
@@ -787,7 +787,7 @@
       }
     }
   }
-  DOUT << "About to look through initializers\n";
+  DOUT << "JIT: About to look through initializers\n";
   // Look for more globals that are referenced only from initializers.
   // GVSet.end is computed each time because the set can grow as we go.
   for (std::set::iterator I = GVSet.begin(); 
@@ -801,11 +801,14 @@
 }
 
 void JITEmitter::startFunction(MachineFunction &F) {
+  DOUT << "JIT: Starting CodeGen of Function "
+       << F.getFunction()->getName() << "\n";
+
   uintptr_t ActualSize = 0;
   // Set the memory writable, if it's not already
   MemMgr->setMemoryWritable();
   if (MemMgr->NeedsExactSize()) {
-    DOUT << "ExactSize\n";
+    DOUT << "JIT: ExactSize\n";
     const TargetInstrInfo* TII = F.getTarget().getInstrInfo();
     MachineJumpTableInfo *MJTI = F.getJumpTableInfo();
     MachineConstantPool *MCP = F.getConstantPool();
@@ -833,12 +836,12 @@
     // Add the function size
     ActualSize += TII->GetFunctionSizeInBytes(F);
 
-    DOUT << "ActualSize before globals " << ActualSize << "\n";
+    DOUT << "JIT: ActualSize before globals " << ActualSize << "\n";
     // Add the size of the globals that will be allocated after this function.
     // These are all the ones referenced from this function that were not
     // previously allocated.
     ActualSize += GetSizeOfGlobalsInBytes(F);
-    DOUT << "ActualSize after globals " << ActualSize << "\n";
+    DOUT << "JIT: ActualSize after globals " << ActualSize << "\n";
   }
 
   BufferBegin = CurBufferPtr = MemMgr->startFunctionBody(F.getFunction(),
@@ -912,7 +915,7 @@
         unsigned idx = Resolver.getGOTIndexForAddr(ResultPtr);
         MR.setGOTIndex(idx);
         if (((void**)MemMgr->getGOTBase())[idx] != ResultPtr) {
-          DOUT << "GOT was out of date for " << ResultPtr
+          DOUT << "JIT: GOT was out of date for " << ResultPtr
                << " pointing at " << ((void**)MemMgr->getGOTBase())[idx]
                << "\n";
           ((void**)MemMgr->getGOTBase())[idx] = ResultPtr;
@@ -928,7 +931,7 @@
   if (MemMgr->isManagingGOT()) {
     unsigned idx = Resolver.getGOTIndexForAddr((void*)BufferBegin);
     if (((void**)MemMgr->getGOTBase())[idx] != (void*)BufferBegin) {
-      DOUT << "GOT was out of date for " << (void*)BufferBegin
+      DOUT << "JIT: GOT was out of date for " << (void*)BufferBegin
            << " pointing at " << ((void**)MemMgr->getGOTBase())[idx] << "\n";
       ((void**)MemMgr->getGOTBase())[idx] = (void*)BufferBegin;
     }
@@ -958,16 +961,16 @@
 
 #ifndef NDEBUG
   {
+    DOUT << "JIT: Disassembled code:\n";
     if (sys::hasDisassembler())
-      DOUT << "Disassembled code:\n"
-           << sys::disassembleBuffer(FnStart, FnEnd-FnStart, (uintptr_t)FnStart);
+      DOUT << sys::disassembleBuffer(FnStart, FnEnd-FnStart, (uintptr_t)FnStart);
     else {
       DOUT << std::hex;
       int i;
       unsigned char* q = FnStart;
       for (i=1; q!=FnEnd; q++, i++) {
         if (i%8==1)
-          DOUT << "0x" << (long)q << ": ";
+          DOUT << "JIT: 0x" << (long)q << ": ";
         DOUT<< std::setw(2) << std::setfill('0') << (unsigned short)*q << " ";
         if (i%8==0)
           DOUT << '\n';




From evan.cheng at apple.com  Thu Nov  6 11:48:05 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 06 Nov 2008 17:48:05 -0000
Subject: [llvm-commits] [llvm] r58808 - in /llvm/trunk/lib/Target/ARM:
 ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.h ARMInstrInfo.td
Message-ID: <200811061748.mA6Hm54o002762@zion.cs.uiuc.edu>

Author: evancheng
Date: Thu Nov  6 11:48:05 2008
New Revision: 58808

URL: http://llvm.org/viewvc/llvm-project?rev=58808&view=rev
Log:
- Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm.
- Consolidate instruction formats.
- Other clean up.

Modified:
    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58808&r1=58807&r2=58808&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Thu Nov  6 11:48:05 2008
@@ -248,7 +248,7 @@
 }
 
 void ARMCodeEmitter::emitWordLE(unsigned Binary) {
-  DOUT << "\t" << (void*)Binary << "\n";
+  DOUT << "  " << (void*)Binary << "\n";
   MCE.emitWordLE(Binary);
 }
 
@@ -282,10 +282,10 @@
   case ARMII::MulFrm:
     emitMulFrmInstruction(MI);
     break;
-  case ARMII::Branch:
+  case ARMII::BrFrm:
     emitBranchInstruction(MI);
     break;
-  case ARMII::BranchMisc:
+  case ARMII::BrMiscFrm:
     emitMiscBranchInstruction(MI);
     break;
   }
@@ -305,7 +305,7 @@
     ARMConstantPoolValue *ACPV =
       static_cast(MCPE.Val.MachineCPVal);
 
-    DOUT << "\t** ARM constant pool #" << CPI << " @ "
+    DOUT << "  ** ARM constant pool #" << CPI << " @ "
          << (void*)MCE.getCurrentPCValue() << " " << *ACPV << "\n";
 
     GlobalValue *GV = ACPV->getGV();
@@ -322,7 +322,7 @@
   } else {
     Constant *CV = MCPE.Val.ConstVal;
 
-    DOUT << "\t** Constant pool #" << CPI << " @ "
+    DOUT << "  ** Constant pool #" << CPI << " @ "
          << (void*)MCE.getCurrentPCValue() << " " << *CV << "\n";
 
     if (GlobalValue *GV = dyn_cast(CV)) {
@@ -380,7 +380,7 @@
 }
 
 void ARMCodeEmitter::addPCLabel(unsigned LabelID) {
-  DOUT << "\t** LPC" << LabelID << " @ "
+  DOUT << "  ** LPC" << LabelID << " @ "
        << (void*)MCE.getCurrentPCValue() << '\n';
   JTI->addPCLabelAddr(LabelID, MCE.getCurrentPCValue());
 }
@@ -566,8 +566,6 @@
 
 void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI,
                                               unsigned ImplicitRn) {
-  const TargetInstrDesc &TID = MI.getDesc();
-
   // Part of binary is determined by TableGn.
   unsigned Binary = getBinaryCodeForInstr(MI);
 
@@ -621,8 +619,6 @@
 
 void ARMCodeEmitter::emitMiscLoadStoreInstruction(const MachineInstr &MI,
                                                   unsigned ImplicitRn) {
-  const TargetInstrDesc &TID = MI.getDesc();
-
   // Part of binary is determined by TableGn.
   unsigned Binary = getBinaryCodeForInstr(MI);
 
@@ -751,6 +747,9 @@
 void ARMCodeEmitter::emitBranchInstruction(const MachineInstr &MI) {
   const TargetInstrDesc &TID = MI.getDesc();
 
+  if (TID.Opcode == ARM::TPsoft)
+    abort(); // FIXME
+
   // Part of binary is determined by TableGn.
   unsigned Binary = getBinaryCodeForInstr(MI);
 
@@ -771,7 +770,10 @@
 
 void ARMCodeEmitter::emitMiscBranchInstruction(const MachineInstr &MI) {
   const TargetInstrDesc &TID = MI.getDesc();
-  if (TID.Opcode == ARM::BX)
+  if (TID.Opcode == ARM::BX ||
+      TID.Opcode == ARM::BR_JTr ||
+      TID.Opcode == ARM::BR_JTm ||
+      TID.Opcode == ARM::BR_JTadd)
     abort(); // FIXME
 
   // Part of binary is determined by TableGn.

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58808&r1=58807&r2=58808&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Thu Nov  6 11:48:05 2008
@@ -21,8 +21,8 @@
 
 def Pseudo      : Format<1>;
 def MulFrm      : Format<2>;
-def Branch      : Format<3>;
-def BranchMisc  : Format<4>;
+def BrFrm       : Format<3>;
+def BrMiscFrm   : Format<4>;
 
 def DPFrm       : Format<5>;
 def DPSoRegFrm  : Format<6>;
@@ -134,40 +134,25 @@
        "", pattern>;
 
 // Ctrl flow instructions
-class ABLpredI opcod, dag oops, dag iops, Format f, string opc,
+class ABI opcod, dag oops, dag iops, string opc,
          string asm, list pattern>
-  : I {
   let Inst{27-24} = opcod;
 }
-class ABLI opcod, dag oops, dag iops, Format f, string asm,
-          list pattern>
-  : XI opcod, dag oops, dag iops, string asm, list pattern>
+  : XI {
   let Inst{27-24} = opcod;
 }
-// FIXME: BX
-class AXIx2 pattern>
-  : XI pattern>
+  : XI;
-class ABI opcod, dag oops, dag iops, Format f, string asm,
-          list pattern>
-  : XI {
-  let Inst{27-24} = opcod;
-}
-class ABccI opcod, dag oops, dag iops, Format f, string opc,
-         string asm, list pattern>
-  : I {
-  let Inst{27-24} = opcod;
-}
 
 // BR_JT instructions
 // == mov pc
 class JTI opcod, dag oops, dag iops, string asm, list pattern>
-  : XI {
   let Inst{20}    = 0; // S Bit
   let Inst{24-21} = opcod;
@@ -175,7 +160,7 @@
 }
 // == add pc
 class JTI1 opcod, dag oops, dag iops, string asm, list pattern>
-  : XI {
   let Inst{20}    = 0; // S bit
   let Inst{24-21} = opcod;
@@ -183,7 +168,7 @@
 }
 // == ldr pc
 class JTI2 opcod, dag oops, dag iops, string asm, list pattern>
-  : XI {
   let Inst{20}    = 1; // L bit
   let Inst{21}    = 0; // W bit
@@ -641,29 +626,14 @@
 
 
 // addrmode4 instructions
-class AI4 pattern>
-  : I {
-  let Inst{25-27} = {0,0,1};
-}
-class AXI4ld pattern>
+class AXI4ld pattern>
   : XI {
   let Inst{20}    = 1; // L bit
   let Inst{22}    = 0; // S bit
   let Inst{27-25} = 0b100;
 }
-class AXI4ldpc pattern>
-  : XI {
-  let Inst{20}    = 1; // L bit
-  let Inst{27-25} = 0b100;
-}
-class AXI4st pattern>
+class AXI4st pattern>
   : XI {
   let Inst{20}    = 0; // L bit

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=58808&r1=58807&r2=58808&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Thu Nov  6 11:48:05 2008
@@ -79,8 +79,8 @@
     MulFrm      = 2 << FormShift,
 
     // Branch instructions
-    Branch      = 3 << FormShift,
-    BranchMisc  = 4 << FormShift,
+    BrFrm       = 3 << FormShift,
+    BrMiscFrm   = 4 << FormShift,
 
     // Data Processing instructions
     DPFrm       = 5 << FormShift,

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58808&r1=58807&r2=58808&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu Nov  6 11:48:05 2008
@@ -445,7 +445,7 @@
 let isNotDuplicable = 1 in
 def CONSTPOOL_ENTRY :
 PseudoInst<(outs), (ins cpinst_operand:$instid, cpinst_operand:$cpidx,
-                        i32imm:$size),
+                    i32imm:$size),
            "${instid:label} ${cpidx:cpentry}", []>;
 
 let Defs = [SP], Uses = [SP] in {
@@ -465,6 +465,8 @@
            ".loc $file, $line, $col",
            [(dwarf_loc (i32 imm:$line), (i32 imm:$col), (i32 imm:$file))]>;
 
+
+// Address computation and loads and stores in PIC mode.
 let isNotDuplicable = 1 in {
 def PICADD : AXI1<0b0100, (outs GPR:$dst), (ins GPR:$a, pclabel:$cp, pred:$p),
                   Pseudo, "$cp:\n\tadd$p $dst, pc, $a",
@@ -505,14 +507,14 @@
                Pseudo, "${addr:label}:\n\tstr${p}b $src, $addr",
                [(truncstorei8 GPR:$src, addrmodepc:$addr)]>;
 }
-}
+} // isNotDuplicable = 1
 
 //===----------------------------------------------------------------------===//
 //  Control Flow Instructions.
 //
 
 let isReturn = 1, isTerminator = 1 in
-  def BX_RET : AI<(outs), (ins), BranchMisc, "bx", " lr", [(ARMretflag)]> {
+  def BX_RET : AI<(outs), (ins), BrMiscFrm, "bx", " lr", [(ARMretflag)]> {
   let Inst{7-4}   = 0b0001;
   let Inst{19-8}  = 0b111111111111;
   let Inst{27-20} = 0b00010010;
@@ -521,8 +523,9 @@
 // FIXME: remove when we have a way to marking a MI with these properties.
 // FIXME: $dst1 should be a def. But the extra ops must be in the end of the
 // operand list.
+// FIXME: Should pc be an implicit operand like PICADD, etc?
 let isReturn = 1, isTerminator = 1 in
-  def LDM_RET : AXI4ldpc<(outs),
+  def LDM_RET : AXI4ld<(outs),
                     (ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops),
                     LdMulFrm, "ldm${p}${addr:submode} $addr, $dst1",
                     []>;
@@ -530,16 +533,16 @@
 let isCall = 1,
   Defs = [R0, R1, R2, R3, R12, LR,
           D0, D1, D2, D3, D4, D5, D6, D7, CPSR] in {
-  def BL  : ABLI<0b1011, (outs), (ins i32imm:$func, variable_ops), Branch,
+  def BL  : ABXI<0b1011, (outs), (ins i32imm:$func, variable_ops),
                 "bl ${func:call}",
                 [(ARMcall tglobaladdr:$func)]>;
 
-  def BL_pred : ABLpredI<0b1011, (outs), (ins i32imm:$func, variable_ops), Branch,
+  def BL_pred : ABI<0b1011, (outs), (ins i32imm:$func, variable_ops),
                    "bl", " ${func:call}",
                    [(ARMcall_pred tglobaladdr:$func)]>;
 
   // ARMv5T and above
-  def BLX : AXI<(outs), (ins GPR:$func, variable_ops), BranchMisc,
+  def BLX : AXI<(outs), (ins GPR:$func, variable_ops), BrMiscFrm,
                 "blx $func",
                 [(ARMcall GPR:$func)]>, Requires<[IsARM, HasV5T]> {
     let Inst{7-4}   = 0b0011;
@@ -549,9 +552,9 @@
 
   let Uses = [LR] in {
     // ARMv4T
-    def BX : AXIx2<(outs), (ins GPR:$func, variable_ops),
-                   BranchMisc, "mov lr, pc\n\tbx $func",
-                   [(ARMcall_nolink GPR:$func)]>;
+    def BX : ABXIx2<(outs), (ins GPR:$func, variable_ops),
+                     "mov lr, pc\n\tbx $func",
+                    [(ARMcall_nolink GPR:$func)]>;
   }
 }
 
@@ -559,7 +562,7 @@
   // B is "predicable" since it can be xformed into a Bcc.
   let isBarrier = 1 in {
     let isPredicable = 1 in
-    def B : ABI<0b1010, (outs), (ins brtarget:$target), Branch, "b $target",
+    def B : ABXI<0b1010, (outs), (ins brtarget:$target), "b $target",
                 [(br bb:$target)]>;
 
   let isNotDuplicable = 1, isIndirectBranch = 1 in {
@@ -583,7 +586,7 @@
 
   // FIXME: should be able to write a pattern for ARMBrcond, but can't use
   // a two-value operand where a dag node expects two operands. :( 
-  def Bcc : ABccI<0b1010, (outs), (ins brtarget:$target), Branch,
+  def Bcc : ABI<0b1010, (outs), (ins brtarget:$target),
                "b", " $target",
                [/*(ARMbrcond bb:$target, imm:$cc, CCR:$ccr)*/]>;
 }
@@ -909,12 +912,12 @@
 //
 
 def MUL   : AsMul1I<0b0000000, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
-                 "mul", " $dst, $a, $b",
-                 [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>;
+                    "mul", " $dst, $a, $b",
+                   [(set GPR:$dst, (mul GPR:$a, GPR:$b))]>;
 
 def MLA   : AsMul1I<0b0000001, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$c),
-                 "mla", " $dst, $a, $b, $c",
-                 [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR:$c))]>;
+                    "mla", " $dst, $a, $b, $c",
+                   [(set GPR:$dst, (add (mul GPR:$a, GPR:$b), GPR:$c))]>;
 
 // Extra precision multiplies with low / high results
 def SMULL : AsMul1I<0b0000110, (outs GPR:$ldst, GPR:$hdst),
@@ -963,7 +966,6 @@
   let Inst{7-4}   = 0b1101;
 }
 
-// FIXME: encoding
 multiclass AI_smul {
   def BB : AMulxyI<0b0001011, (outs GPR:$dst), (ins GPR:$a, GPR:$b),
               !strconcat(opc, "bb"), " $dst, $a, $b",
@@ -1021,7 +1023,6 @@
 }
 
 
-// FIXME: encoding
 multiclass AI_smla {
   def BB : AMulxyI<0b0001000, (outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc),
               !strconcat(opc, "bb"), " $dst, $a, $b, $acc",
@@ -1142,7 +1143,6 @@
                    (and (srl GPR:$src2, imm1_15:$shamt), 0xFFFF)),
                (PKHTB GPR:$src1, GPR:$src2, imm1_15:$shamt)>;
 
-
 //===----------------------------------------------------------------------===//
 //  Comparison Instructions...
 //
@@ -1215,7 +1215,7 @@
 // __aeabi_read_tp preserves the registers r1-r3.
 let isCall = 1,
   Defs = [R0, R12, LR, CPSR] in {
-  def TPsoft : AXI<(outs), (ins), BranchMisc,
+  def TPsoft : ABXI<0b1011, (outs), (ins),
                "bl __aeabi_read_tp",
                [(set R0, ARMthread_pointer)]>;
 }




From clattner at apple.com  Thu Nov  6 11:57:13 2008
From: clattner at apple.com (Chris Lattner)
Date: Thu, 6 Nov 2008 09:57:13 -0800
Subject: [llvm-commits] [llvm] r58727 - in /llvm/trunk:
	include/llvm/Module.h
	lib/CodeGen/StackProtector.cpp	lib/VMCore/Module.cpp
In-Reply-To: <16e5fdf90811051619g50c3e4a4x7691775b833e9816@mail.gmail.com>
References: <200811042251.mA4MpO0E028324@zion.cs.uiuc.edu>
	<30CA4196-CC39-4B54-9D37-3BBD4C5FB43F@apple.com>
	<16e5fdf90811051619g50c3e4a4x7691775b833e9816@mail.gmail.com>
Message-ID: <80A92D9D-4DDE-4221-8A35-E32068034293@apple.com>

On Nov 5, 2008, at 4:19 PM, Bill Wendling wrote:
>> Awesome, thanks Bill!  One minor nit: getOrInsertFunction takes a
>> function, not a pointer to the function.  Do you think it makes sense
>> for getOrInsertGlobal to take the "contained" type of the global,
>> instead of the pointer?
>>
> If I understand correctly, that's what this change is doing. :-) Or do
> you want to create another "derived type" called GlobalType similar to
> FunctionType and use that?

I believe that if you pass in an i32 to the current implementation  
that it will get an assert fail or invalid IR, not a global that holds  
an i32.  To get a global that holds an i32, you have to pass in i32*  
(which is different than how the globalvariable ctor works, which is  
confusing).

If it doesn't work like this, then please ignore me :)

-Chris


From clattner at apple.com  Thu Nov  6 12:24:55 2008
From: clattner at apple.com (Chris Lattner)
Date: Thu, 6 Nov 2008 10:24:55 -0800
Subject: [llvm-commits] [llvm] r58673 - in /llvm/trunk:
	include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp
	lib/CodeGen/StackProtector.cpp
In-Reply-To: <16e5fdf90811041144n63cb4b15ge5bde962064453db@mail.gmail.com>
References: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu>
	
	<12743ED4-76FC-4BBA-A2F6-183CF7ABCCD6@apple.com>
	<1981AC23-EDC1-4FBB-AB7E-4522A6AA25B6@apple.com>
	<16e5fdf90811041144n63cb4b15ge5bde962064453db@mail.gmail.com>
Message-ID: <80DEAA94-4A34-4BA8-B3E1-57FE14BF79FB@apple.com>

On Nov 4, 2008, at 11:44 AM, Bill Wendling wrote:
> On Tue, Nov 4, 2008 at 10:13 AM, Dan Gohman  wrote:
>> On Nov 4, 2008, at 10:06 AM, Evan Cheng wrote:
>>> On Nov 4, 2008, at 5:28 AM, Chris Lattner wrote:
>>>>
>>>>
>>>>> +  StackProtFrameSlot = new
>>>>> AllocaInst(PointerType::getUnqual(Type::Int8Ty),
>>>>> +                                      "StackProt_Frame",
>>>>> &InsertPt);
>>>>
>>>> What ensures that this alloca ends up in the right place in the  
>>>> stack
>>>> frame at codegen time?
>>>
>>> This is unclear.Can we give it a special name that starts with "__"
>>> and sdisel will mark the corresponding stack object. PEI will have  
>>> to
>>> make sure it's in the right location. I don't particularly like it  
>>> but
>>> I can't think of anything better. Any ideas?
>>
>> Names aren't always preserved. How about replacing the Alloca with
>> an intrinsic that does the allocation?
>>
> I'm not sure that that's necessary. It should be possible to keep
> track of the alloca instruction from this pass through code gen. Once
> it's lowered, then I'll know what FI it's at, etc. Then PEI can
> perform its magic.

Good idea, how about something like this:

%tmp = alloca ...
call llvm.makestackcanary(%tmp)

?  A better name is prefered :)

-Chris


From clattner at apple.com  Thu Nov  6 12:25:51 2008
From: clattner at apple.com (Chris Lattner)
Date: Thu, 6 Nov 2008 10:25:51 -0800
Subject: [llvm-commits] [llvm] r58673 - in /llvm/trunk:
	include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp
	lib/CodeGen/StackProtector.cpp
In-Reply-To: <06B25350-98C8-407D-A713-A34F9974D558@apple.com>
References: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu>
	
	<16e5fdf90811041140m43efd5e0oa15f8dd704f364d0@mail.gmail.com>
	<06B25350-98C8-407D-A713-A34F9974D558@apple.com>
Message-ID: <84ACFF85-DC55-475B-8FD0-D7255CC5DD10@apple.com>


On Nov 4, 2008, at 11:47 AM, Dale Johannesen wrote:

>
> On Nov 4, 2008, at 11:40 AMPST, Bill Wendling wrote:
>>>
>>> I don't know what "ProPolice" is, but it sounds like it may be a
>>> trademark or something.  Please just use "stack canary" or something
>>> generic like that.
>>>
>> It's used in the GCC documentation for the flag:
>>
>> common.opt:
>> fstack-protector
>> Common Report Var(flag_stack_protect, 1) Init(-1)
>> Use propolice as a stack protection method
>
> Wikipedia defines it; it's apparently known terminology to people
> expert in this area (not me) and doesn't appear to be a trademark.
> http://en.wikipedia.org/wiki/Stack-smashing_protection

Ok, I'd still prefer to make the llvm sources self contained.  If we  
actually had non-gcc compiler documentation, we could describe it in  
more detail (referencing propolice and what it actually means) there.

-Chris


From clattner at apple.com  Thu Nov  6 12:35:25 2008
From: clattner at apple.com (Chris Lattner)
Date: Thu, 6 Nov 2008 10:35:25 -0800
Subject: [llvm-commits] [llvm] r58673 - in /llvm/trunk:
	include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp
	lib/CodeGen/StackProtector.cpp
In-Reply-To: <16e5fdf90811041140m43efd5e0oa15f8dd704f364d0@mail.gmail.com>
References: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu>
	
	<16e5fdf90811041140m43efd5e0oa15f8dd704f364d0@mail.gmail.com>
Message-ID: <687D326F-13C8-4182-ADDD-1C8A117BF0B2@apple.com>

On Nov 4, 2008, at 11:40 AM, Bill Wendling wrote:
>>> @@ -165,6 +170,8 @@
>>>  if (!Fast)
>>>    PM.add(createCodeGenPreparePass(getTargetLowering()));
>>>
>>> +  PM.add(createStackProtectorPass(EnableStackProtector));
>>
>> Why do you add the pass even when it is not enabled?  Have you looked
>> at whether adding this pass ends up breaking analysis chains, and
>> requiring them to be run multiple times?  For example, does  
>> dominators
>> end up being run more frequently with this?  If so, the pass should
>> update dominators instead of invalidating it.
>>
> Okay. No. Don't know.

Can you check?  Just pass -debug-pass=Structure to llc with and  
without the pass.

>>> +// random value in it is stored onto the stack before the local
>>> variables are
>>> +// allocated. Upon exitting the block, the stored value is checked.
>>> If it's
>>
>> typo exiting.
>>
>>> +// Enable stack protectors.
>>> +static cl::opt
>>> +SSPBufferSize("ssp-buffer-size", cl::init(8),
>>> +              cl::desc("The lower bound for a buffer to be
>>> considered for "
>>> +                       "stack smashing protection."));
>>
>> why the contraction ssp?  Please use something like "stack-protector-
>> buffer-size" or something like that, for similarity with the enable-
>> stack-protector option.
>>
> It's the same name that's used in GCC. I'm not tied to the name, and
> I'm not expecting this to be used much at all.

I understand, but gcc and llc don't agree on many options.  I'd prefer  
to keep the llc options regular where possible, even if gcc is strange.

>>> +/// InsertStackProtectorPrologue - Insert code into the entry block
>>> that stores
>>> +/// the __stack_chk_guard variable onto the stack.
>>> +void StackProtector::InsertStackProtectorPrologue() {
>>> +  BasicBlock &Entry = F->getEntryBlock();
>>> +  Instruction &InsertPt = Entry.front();
>>> +
>>> +  const char *StackGuardStr = "__stack_chk_guard";
>>> +  StackGuardVar = M->getNamedGlobal(StackGuardStr)
>>
>> If the module already has a '__stack_chk_guard' global with the wrong
>> type, I think this code will crash, see below:
>>
> Hrh?

Nevermind, getOrInsertGlobal fixes this.

>>> +  if (!StackGuardVar)
>>> +    StackGuardVar = new
>>> GlobalVariable(PointerType::getUnqual(Type::Int8Ty),
>>> +                                       false,
>>> GlobalValue::ExternalLinkage,
>>> +                                       0, StackGuardStr, M);
>>
>> We really want a Module::getOrInsertGlobal() method that works like
>> getOrInsertFunction.  It would do the bitcast to solve the problem
>> above and factor away this code.  Can you please add this?
>>
> Sure. That would be nice.

Awesome, thanks for doing this!

>>> +  StackProtFrameSlot = new
>>> AllocaInst(PointerType::getUnqual(Type::Int8Ty),
>>> +                                      "StackProt_Frame",  
>>> &InsertPt);
>>
>> What ensures that this alloca ends up in the right place in the stack
>> frame at codegen time?
>>
> We looked at the code in code gen -- the lowering of allocas. It's
> doing the "right thing" with regard to this. There might be some
> special magic that needs to be done, though.

I'd prefer to have something a little bit less magic than this.  Does  
the canary go before spill slots for callee save regs, could the frame  
packing pass move the field?  If we had a pass that sorted the fields  
based on size, it would move it.  Instead of ending up a normal frame  
index, we really want the canary to be a fixed frame index pinned to  
be right next to the retaddr.

>>> +  Function::iterator I = F->begin(), E = F->end();
>>> +  std::vector ReturnBBs;
>>> +  ReturnBBs.reserve(F->size());
>>> +
>>> +  for (; I != E; ++I)
>>> +    if (isa((*I).getTerminator()))
>>> +      ReturnBBs.push_back(I);
>>
>> Two things: first, use I->getTerminator.  Second, why do you make a
>> vector of returns and iterate over the vector?  You should be able to
>> handle all of these with one pass over the function without the
>> intermediate vector.  Also, F->size() is linear time, so that itself
>> does a pass over the function.
>>
> I'm modifying the Function (inserting new blocks). Won't that
> invalidate the iterators?

No, linked list iterators don't get invalided like that.  The problem  
you'll have is that you'll rewrite the return block infinitely  
(because you split the block, and it might point to the block before  
the return, so you rediscover the return again), just increment the  
iterator once extra to solve that problem.

Thanks for working on this Bill, I really like this implementation  
approach!

-Chris


From isanbard at gmail.com  Thu Nov  6 13:41:54 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 06 Nov 2008 19:41:54 -0000
Subject: [llvm-commits] [llvm] r58809 - /llvm/tags/Apple/llvmCore-2079/
Message-ID: <200811061941.mA6JfskY006722@zion.cs.uiuc.edu>

Author: void
Date: Thu Nov  6 13:41:51 2008
New Revision: 58809

URL: http://llvm.org/viewvc/llvm-project?rev=58809&view=rev
Log:
Deleting tag.

Removed:
    llvm/tags/Apple/llvmCore-2079/



From isanbard at gmail.com  Thu Nov  6 13:42:08 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 06 Nov 2008 19:42:08 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r58810 -
	/llvm-gcc-4.2/tags/Apple/llvmgcc42-2079/
Message-ID: <200811061942.mA6Jg8h0006740@zion.cs.uiuc.edu>

Author: void
Date: Thu Nov  6 13:42:08 2008
New Revision: 58810

URL: http://llvm.org/viewvc/llvm-project?rev=58810&view=rev
Log:
Deleting tag.

Removed:
    llvm-gcc-4.2/tags/Apple/llvmgcc42-2079/



From isanbard at gmail.com  Thu Nov  6 13:43:10 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 06 Nov 2008 19:43:10 -0000
Subject: [llvm-commits] [llvm] r58811 - /llvm/tags/Apple/llvmCore-2079/
Message-ID: <200811061943.mA6JhAED006784@zion.cs.uiuc.edu>

Author: void
Date: Thu Nov  6 13:43:09 2008
New Revision: 58811

URL: http://llvm.org/viewvc/llvm-project?rev=58811&view=rev
Log:
Creating llvmCore-2079 branch

Added:
    llvm/tags/Apple/llvmCore-2079/
      - copied from r58810, llvm/trunk/



From isanbard at gmail.com  Thu Nov  6 13:43:17 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 06 Nov 2008 19:43:17 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r58812 -
	/llvm-gcc-4.2/tags/Apple/llvmgcc42-2079/
Message-ID: <200811061943.mA6JhHM2006796@zion.cs.uiuc.edu>

Author: void
Date: Thu Nov  6 13:43:17 2008
New Revision: 58812

URL: http://llvm.org/viewvc/llvm-project?rev=58812&view=rev
Log:
Creating llvmgcc42-2079 branch

Added:
    llvm-gcc-4.2/tags/Apple/llvmgcc42-2079/
      - copied from r58811, llvm-gcc-4.2/trunk/



From dpatel at apple.com  Thu Nov  6 13:47:49 2008
From: dpatel at apple.com (Devang Patel)
Date: Thu, 06 Nov 2008 19:47:49 -0000
Subject: [llvm-commits] [llvm] r58813 -
	/llvm/trunk/docs/WritingAnLLVMPass.html
Message-ID: <200811061947.mA6Jlnv9006947@zion.cs.uiuc.edu>

Author: dpatel
Date: Thu Nov  6 13:47:49 2008
New Revision: 58813

URL: http://llvm.org/viewvc/llvm-project?rev=58813&view=rev
Log:
Clarify documentation. A module pass MP can require a function paqss FP only if FP does not require any module pass.

Modified:
    llvm/trunk/docs/WritingAnLLVMPass.html

Modified: llvm/trunk/docs/WritingAnLLVMPass.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/WritingAnLLVMPass.html?rev=58813&r1=58812&r2=58813&view=diff

==============================================================================
--- llvm/trunk/docs/WritingAnLLVMPass.html (original)
+++ llvm/trunk/docs/WritingAnLLVMPass.html Thu Nov  6 13:47:49 2008
@@ -492,7 +492,8 @@
 functions.  Because nothing is known about the behavior of ModulePass
 subclasses, no optimization can be done for their execution. A module pass
 can use function level passes (e.g. dominators) using getAnalysis interface
- getAnalysis<DominatorTree>(Function). 
     
+ getAnalysis<DominatorTree>(Function), if the function pass
+does not require any module passes. 
     
 
 
    To write a correct ModulePass subclass, derive from
 ModulePass and overload the runOnModule method with the




From dpatel at apple.com  Thu Nov  6 15:28:21 2008
From: dpatel at apple.com (Devang Patel)
Date: Thu, 06 Nov 2008 21:28:21 -0000
Subject: [llvm-commits] [llvm] r58814 - in /llvm/trunk:
 lib/CodeGen/SelectionDAG/FastISel.cpp
 test/DebugInfo/2008-11-05-InlinedFuncStart.ll
Message-ID: <200811062128.mA6LSLu6010566@zion.cs.uiuc.edu>

Author: dpatel
Date: Thu Nov  6 15:28:20 2008
New Revision: 58814

URL: http://llvm.org/viewvc/llvm-project?rev=58814&view=rev
Log:
Emit label for llvm.dbg.func.start of the inlined function.


Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
    llvm/trunk/test/DebugInfo/2008-11-05-InlinedFuncStart.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=58814&r1=58813&r2=58814&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Thu Nov  6 15:28:20 2008
@@ -349,9 +349,14 @@
       SubprogramDesc *Subprogram = cast(DD);
       const CompileUnitDesc *CompileUnit = Subprogram->getFile();
       unsigned SrcFile = MMI->RecordSource(CompileUnit);
-      // Record the source line but does create a label. It will be emitted
-      // at asm emission time.
-      MMI->RecordSourceLine(Subprogram->getLine(), 0, SrcFile);
+      // Record the source line but does not create a label for the normal
+      // function start. It will be emitted at asm emission time. However,
+      // create a label if this is a beginning of inlined function.
+      unsigned LabelID = MMI->RecordSourceLine(Subprogram->getLine(), 0, SrcFile);
+      if (MMI->getSourceLines().size() != 1) {
+        const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
+        BuildMI(MBB, II).addImm(LabelID);
+      }
     }
     return true;
   }

Modified: llvm/trunk/test/DebugInfo/2008-11-05-InlinedFuncStart.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/2008-11-05-InlinedFuncStart.ll?rev=58814&r1=58813&r2=58814&view=diff

==============================================================================
--- llvm/trunk/test/DebugInfo/2008-11-05-InlinedFuncStart.ll (original)
+++ llvm/trunk/test/DebugInfo/2008-11-05-InlinedFuncStart.ll Thu Nov  6 15:28:20 2008
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | llc
+; RUN: llvm-as < %s | llc -fast
 	%llvm.dbg.anchor.type = type { i32, i32 }
 	%llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
 	%llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8* }




From isanbard at gmail.com  Thu Nov  6 15:37:09 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 06 Nov 2008 21:37:09 -0000
Subject: [llvm-commits] [llvm] r58815 -
	/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
Message-ID: <200811062137.mA6Lb9dq010881@zion.cs.uiuc.edu>

Author: void
Date: Thu Nov  6 15:37:09 2008
New Revision: 58815

URL: http://llvm.org/viewvc/llvm-project?rev=58815&view=rev
Log:
Don't recalculate the stack position of the stack protector.

Modified:
    llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp

Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=58815&r1=58814&r2=58815&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original)
+++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Thu Nov  6 15:37:09 2008
@@ -442,6 +442,8 @@
       continue;
     if (FFI->isDeadObjectIndex(i))
       continue;
+    if (FFI->getStackProtectorIndex() == (int)i)
+      continue;
 
     // If stack grows down, we need to add size of find the lowest
     // address of the object.




From isanbard at gmail.com  Thu Nov  6 15:55:35 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 6 Nov 2008 13:55:35 -0800
Subject: [llvm-commits] [llvm] r58673 - in /llvm/trunk:
	include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp
	lib/CodeGen/StackProtector.cpp
In-Reply-To: <80DEAA94-4A34-4BA8-B3E1-57FE14BF79FB@apple.com>
References: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu>
	
	<12743ED4-76FC-4BBA-A2F6-183CF7ABCCD6@apple.com>
	<1981AC23-EDC1-4FBB-AB7E-4522A6AA25B6@apple.com>
	<16e5fdf90811041144n63cb4b15ge5bde962064453db@mail.gmail.com>
	<80DEAA94-4A34-4BA8-B3E1-57FE14BF79FB@apple.com>
Message-ID: <16e5fdf90811061355j155b8052x837e9c06b9c97698@mail.gmail.com>

On Thu, Nov 6, 2008 at 10:24 AM, Chris Lattner  wrote:
> On Nov 4, 2008, at 11:44 AM, Bill Wendling wrote:
>> On Tue, Nov 4, 2008 at 10:13 AM, Dan Gohman  wrote:
>>> On Nov 4, 2008, at 10:06 AM, Evan Cheng wrote:
>>>> On Nov 4, 2008, at 5:28 AM, Chris Lattner wrote:
>>>>>
>>>>>
>>>>>> +  StackProtFrameSlot = new
>>>>>> AllocaInst(PointerType::getUnqual(Type::Int8Ty),
>>>>>> +                                      "StackProt_Frame",
>>>>>> &InsertPt);
>>>>>
>>>>> What ensures that this alloca ends up in the right place in the
>>>>> stack
>>>>> frame at codegen time?
>>>>
>>>> This is unclear.Can we give it a special name that starts with "__"
>>>> and sdisel will mark the corresponding stack object. PEI will have
>>>> to
>>>> make sure it's in the right location. I don't particularly like it
>>>> but
>>>> I can't think of anything better. Any ideas?
>>>
>>> Names aren't always preserved. How about replacing the Alloca with
>>> an intrinsic that does the allocation?
>>>
>> I'm not sure that that's necessary. It should be possible to keep
>> track of the alloca instruction from this pass through code gen. Once
>> it's lowered, then I'll know what FI it's at, etc. Then PEI can
>> perform its magic.
>
> Good idea, how about something like this:
>
> %tmp = alloca ...
> call llvm.makestackcanary(%tmp)
>
> ?  A better name is prefered :)
>
Did. :-)

-bw


From gohman at apple.com  Thu Nov  6 15:57:17 2008
From: gohman at apple.com (Dan Gohman)
Date: Thu, 06 Nov 2008 21:57:17 -0000
Subject: [llvm-commits] [llvm] r58816 -
	/llvm/trunk/lib/VMCore/PassManager.cpp
Message-ID: <200811062157.mA6LvH78011870@zion.cs.uiuc.edu>

Author: djg
Date: Thu Nov  6 15:57:17 2008
New Revision: 58816

URL: http://llvm.org/viewvc/llvm-project?rev=58816&view=rev
Log:
Fix a use of an invalid iterator when -debug-pass=Details is used.

Modified:
    llvm/trunk/lib/VMCore/PassManager.cpp

Modified: llvm/trunk/lib/VMCore/PassManager.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/PassManager.cpp?rev=58816&r1=58815&r2=58816&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/PassManager.cpp (original)
+++ llvm/trunk/lib/VMCore/PassManager.cpp Thu Nov  6 15:57:17 2008
@@ -727,12 +727,12 @@
         && std::find(PreservedSet.begin(), PreservedSet.end(), Info->first) == 
         PreservedSet.end()) {
       // Remove this analysis
-      AvailableAnalysis.erase(Info);
       if (PassDebugging >= Details) {
         Pass *S = Info->second;
         cerr << " -- '" <<  P->getPassName() << "' is not preserving '";
         cerr << S->getPassName() << "'\n";
       }
+      AvailableAnalysis.erase(Info);
     }
   }
 




From isanbard at gmail.com  Thu Nov  6 16:01:31 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 6 Nov 2008 14:01:31 -0800
Subject: [llvm-commits] [llvm] r58673 - in /llvm/trunk:
	include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp
	lib/CodeGen/StackProtector.cpp
In-Reply-To: <687D326F-13C8-4182-ADDD-1C8A117BF0B2@apple.com>
References: <200811040210.mA42ANXh009663@zion.cs.uiuc.edu>
	
	<16e5fdf90811041140m43efd5e0oa15f8dd704f364d0@mail.gmail.com>
	<687D326F-13C8-4182-ADDD-1C8A117BF0B2@apple.com>
Message-ID: <16e5fdf90811061401g157ac7e5k1149c2cddc627b99@mail.gmail.com>

On Thu, Nov 6, 2008 at 10:35 AM, Chris Lattner  wrote:
> On Nov 4, 2008, at 11:40 AM, Bill Wendling wrote:
>>>> @@ -165,6 +170,8 @@
>>>>  if (!Fast)
>>>>    PM.add(createCodeGenPreparePass(getTargetLowering()));
>>>>
>>>> +  PM.add(createStackProtectorPass(EnableStackProtector));
>>>
>>> Why do you add the pass even when it is not enabled?  Have you looked
>>> at whether adding this pass ends up breaking analysis chains, and
>>> requiring them to be run multiple times?  For example, does
>>> dominators
>>> end up being run more frequently with this?  If so, the pass should
>>> update dominators instead of invalidating it.
>>>
>> Okay. No. Don't know.
>
> Can you check?  Just pass -debug-pass=Structure to llc with and
> without the pass.
>
I did a check and there didn't seem to be a difference between running
it and not running it (except for the addition of the stack protector
pass). That wasn't a massive function, though. I can check it out on a
more complex case.

>>> why the contraction ssp?  Please use something like "stack-protector-
>>> buffer-size" or something like that, for similarity with the enable-
>>> stack-protector option.
>>>
>> It's the same name that's used in GCC. I'm not tied to the name, and
>> I'm not expecting this to be used much at all.
>
> I understand, but gcc and llc don't agree on many options.  I'd prefer
> to keep the llc options regular where possible, even if gcc is strange.
>
No prob. :-)

>>>> +  if (!StackGuardVar)
>>>> +    StackGuardVar = new
>>>> GlobalVariable(PointerType::getUnqual(Type::Int8Ty),
>>>> +                                       false,
>>>> GlobalValue::ExternalLinkage,
>>>> +                                       0, StackGuardStr, M);
>>>
>>> We really want a Module::getOrInsertGlobal() method that works like
>>> getOrInsertFunction.  It would do the bitcast to solve the problem
>>> above and factor away this code.  Can you please add this?
>>>
>> Sure. That would be nice.
>
> Awesome, thanks for doing this!
>
NP :-)

>>>> +  StackProtFrameSlot = new
>>>> AllocaInst(PointerType::getUnqual(Type::Int8Ty),
>>>> +                                      "StackProt_Frame",
>>>> &InsertPt);
>>>
>>> What ensures that this alloca ends up in the right place in the stack
>>> frame at codegen time?
>>>
>> We looked at the code in code gen -- the lowering of allocas. It's
>> doing the "right thing" with regard to this. There might be some
>> special magic that needs to be done, though.
>
> I'd prefer to have something a little bit less magic than this.  Does
> the canary go before spill slots for callee save regs, could the frame
> packing pass move the field?  If we had a pass that sorted the fields
> based on size, it would move it.  Instead of ending up a normal frame
> index, we really want the canary to be a fixed frame index pinned to
> be right next to the retaddr.
>
*nods*. I put code in the PEI module to do this, but I'll need to
check to make sure that there isn't additional places that can foul it
up.

>>>> +  Function::iterator I = F->begin(), E = F->end();
>>>> +  std::vector ReturnBBs;
>>>> +  ReturnBBs.reserve(F->size());
>>>> +
>>>> +  for (; I != E; ++I)
>>>> +    if (isa((*I).getTerminator()))
>>>> +      ReturnBBs.push_back(I);
>>>
>>> Two things: first, use I->getTerminator.  Second, why do you make a
>>> vector of returns and iterate over the vector?  You should be able to
>>> handle all of these with one pass over the function without the
>>> intermediate vector.  Also, F->size() is linear time, so that itself
>>> does a pass over the function.
>>>
>> I'm modifying the Function (inserting new blocks). Won't that
>> invalidate the iterators?
>
> No, linked list iterators don't get invalided like that.  The problem
> you'll have is that you'll rewrite the return block infinitely
> (because you split the block, and it might point to the block before
> the return, so you rediscover the return again), just increment the
> iterator once extra to solve that problem.
>
Hmm. Okay. I didn't know that the ilist stuff was a linked list. . .

> Thanks for working on this Bill, I really like this implementation
> approach!
>
Thanks! :)

-bw


From evan.cheng at apple.com  Thu Nov  6 16:15:19 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 06 Nov 2008 22:15:19 -0000
Subject: [llvm-commits] [llvm] r58818 - in /llvm/trunk/lib/Target/ARM:
 ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.h ARMInstrInfo.td
Message-ID: <200811062215.mA6MFJsA012652@zion.cs.uiuc.edu>

Author: evancheng
Date: Thu Nov  6 16:15:19 2008
New Revision: 58818

URL: http://llvm.org/viewvc/llvm-project?rev=58818&view=rev
Log:
Encode extend instructions; more clean up.

Modified:
    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58818&r1=58817&r2=58818&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Thu Nov  6 16:15:19 2008
@@ -98,6 +98,8 @@
 
     void emitMulFrmInstruction(const MachineInstr &MI);
 
+    void emitExtendInstruction(const MachineInstr &MI);
+
     void emitBranchInstruction(const MachineInstr &MI);
 
     void emitMiscBranchInstruction(const MachineInstr &MI);
@@ -282,6 +284,9 @@
   case ARMII::MulFrm:
     emitMulFrmInstruction(MI);
     break;
+  case ARMII::ExtFrm:
+    emitExtendInstruction(MI);
+    break;
   case ARMII::BrFrm:
     emitBranchInstruction(MI);
     break;
@@ -349,7 +354,7 @@
   unsigned Binary = 0xd << 21;  // mov: Insts{24-21} = 0b1101
 
   // Set the conditional execution predicate.
-  Binary |= II->getPredicate(&MI) << 28;
+  Binary |= II->getPredicate(&MI) << ARMII::CondShift;
 
   // Encode Rd.
   Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift;
@@ -364,7 +369,7 @@
   Binary = 0xc << 21;  // orr: Insts{24-21} = 0b1100
 
   // Set the conditional execution predicate.
-  Binary |= II->getPredicate(&MI) << 28;
+  Binary |= II->getPredicate(&MI) << ARMII::CondShift;
 
   // Encode Rd.
   Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift;
@@ -488,7 +493,9 @@
 
 unsigned ARMCodeEmitter::getMachineSoImmOpValue(unsigned SoImm) {
   // Encode rotate_imm.
-  unsigned Binary = (ARM_AM::getSOImmValRot(SoImm) >> 1) << ARMII::RotImmShift;
+  unsigned Binary = (ARM_AM::getSOImmValRot(SoImm) >> 1)
+    << ARMII::SoRotImmShift;
+
   // Encode immed_8.
   Binary |= ARM_AM::getSOImmValImm(SoImm);
   return Binary;
@@ -512,7 +519,7 @@
   unsigned Binary = getBinaryCodeForInstr(MI);
 
   // Set the conditional execution predicate
-  Binary |= II->getPredicate(&MI) << 28;
+  Binary |= II->getPredicate(&MI) << ARMII::CondShift;
 
   // Encode S bit if MI modifies CPSR.
   Binary |= getAddrModeSBit(MI, TID);
@@ -570,7 +577,7 @@
   unsigned Binary = getBinaryCodeForInstr(MI);
 
   // Set the conditional execution predicate
-  Binary |= II->getPredicate(&MI) << 28;
+  Binary |= II->getPredicate(&MI) << ARMII::CondShift;
 
   // Set first operand
   Binary |= getMachineOpValue(MI, 0) << ARMII::RegRdShift;
@@ -623,7 +630,7 @@
   unsigned Binary = getBinaryCodeForInstr(MI);
 
   // Set the conditional execution predicate
-  Binary |= II->getPredicate(&MI) << 28;
+  Binary |= II->getPredicate(&MI) << ARMII::CondShift;
 
   // Set first operand
   Binary |= getMachineOpValue(MI, 0) << ARMII::RegRdShift;
@@ -656,7 +663,7 @@
   }
 
   // This instr is in immediate offset/index encoding, set bit 22 to 1.
-  Binary |= 1 << 22;
+  Binary |= 1 << ARMII::AM3_I_BitShift;
   if (unsigned ImmOffs = ARM_AM::getAM3Offset(AM3Opc)) {
     // Set operands
     Binary |= (ImmOffs >> 4) << 8;  // immedH
@@ -671,7 +678,7 @@
   unsigned Binary = getBinaryCodeForInstr(MI);
 
   // Set the conditional execution predicate
-  Binary |= II->getPredicate(&MI) << 28;
+  Binary |= II->getPredicate(&MI) << ARMII::CondShift;
 
   // Set first operand
   Binary |= getMachineOpValue(MI, 0) << ARMII::RegRnShift;
@@ -686,14 +693,14 @@
   switch (Mode) {
   default: assert(0 && "Unknown addressing sub-mode!");
   case ARM_AM::da:                      break;
-  case ARM_AM::db: Binary |= 0x1 << 24; break;
-  case ARM_AM::ia: Binary |= 0x1 << 23; break;
-  case ARM_AM::ib: Binary |= 0x3 << 23; break;
+  case ARM_AM::db: Binary |= 0x1 << ARMII::P_BitShift; break;
+  case ARM_AM::ia: Binary |= 0x1 << ARMII::U_BitShift; break;
+  case ARM_AM::ib: Binary |= 0x3 << ARMII::U_BitShift; break;
   }
 
   // Set bit W(21)
   if (ARM_AM::getAM4WBFlag(MO.getImm()))
-    Binary |= 0x1 << 21;
+    Binary |= 0x1 << ARMII::W_BitShift;
 
   // Set registers
   for (unsigned i = 4, e = MI.getNumOperands(); i != e; ++i) {
@@ -716,14 +723,14 @@
   unsigned Binary = getBinaryCodeForInstr(MI);
 
   // Set the conditional execution predicate
-  Binary |= II->getPredicate(&MI) << 28;
+  Binary |= II->getPredicate(&MI) << ARMII::CondShift;
 
   // Encode S bit if MI modifies CPSR.
   Binary |= getAddrModeSBit(MI, TID);
 
   // 32x32->64bit operations have two destination registers. The number
   // of register definitions will tell us if that's what we're dealing with.
-  int OpIdx = 0;
+  unsigned OpIdx = 0;
   if (TID.getNumDefs() == 2)
     Binary |= getMachineOpValue (MI, OpIdx++) << ARMII::RegRdLoShift;
 
@@ -738,8 +745,47 @@
 
   // Many multiple instructions (e.g. MLA) have three src operands. Encode
   // it as Rn (for multiply, that's in the same offset as RdLo.
-  if (TID.getNumOperands() - TID.getNumDefs() == 3)
-    Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdLoShift;
+  if (TID.getNumOperands() > OpIdx &&
+      !TID.OpInfo[OpIdx].isPredicate() &&
+      !TID.OpInfo[OpIdx].isOptionalDef())
+    Binary |= getMachineOpValue(MI, OpIdx) << ARMII::RegRdLoShift;
+
+  emitWordLE(Binary);
+}
+
+void ARMCodeEmitter::emitExtendInstruction(const MachineInstr &MI) {
+  const TargetInstrDesc &TID = MI.getDesc();
+
+  // Part of binary is determined by TableGn.
+  unsigned Binary = getBinaryCodeForInstr(MI);
+
+  // Set the conditional execution predicate
+  Binary |= II->getPredicate(&MI) << ARMII::CondShift;
+
+  unsigned OpIdx = 0;
+
+  // Encode Rd
+  Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdShift;
+
+  const MachineOperand &MO1 = MI.getOperand(OpIdx++);
+  const MachineOperand &MO2 = MI.getOperand(OpIdx);
+  if (MO2.isReg()) {
+    // Two register operand form.
+    // Encode Rn.
+    Binary |= getMachineOpValue(MI, MO1) << ARMII::RegRnShift;
+
+    // Encode Rm.
+    Binary |= getMachineOpValue(MI, MO2);
+    ++OpIdx;
+  } else {
+    Binary |= getMachineOpValue(MI, MO1);
+  }
+
+  // Encode rot imm (0, 8, 16, or 24) if it has a rotate immediate operand.
+  if (MI.getOperand(OpIdx).isImm() &&
+      !TID.OpInfo[OpIdx].isPredicate() &&
+      !TID.OpInfo[OpIdx].isOptionalDef())
+    Binary |= (getMachineOpValue(MI, OpIdx) / 8) << ARMII::ExtRotImmShift;
 
   emitWordLE(Binary);
 }
@@ -754,17 +800,11 @@
   unsigned Binary = getBinaryCodeForInstr(MI);
 
   // Set the conditional execution predicate
-  Binary |= II->getPredicate(&MI) << 28;
+  Binary |= II->getPredicate(&MI) << ARMII::CondShift;
 
   // Set signed_immed_24 field
   Binary |= getMachineOpValue(MI, 0);
 
-  // if it is a conditional branch, set cond field
-  if (TID.Opcode == ARM::Bcc) {
-    Binary &= 0x0FFFFFFF;                      // clear conditional field
-    Binary |= getMachineOpValue(MI, 1) << 28;  // set conditional field
-  }
-
   emitWordLE(Binary);
 }
 
@@ -780,7 +820,7 @@
   unsigned Binary = getBinaryCodeForInstr(MI);
 
   // Set the conditional execution predicate
-  Binary |= II->getPredicate(&MI) << 28;
+  Binary |= II->getPredicate(&MI) << ARMII::CondShift;
 
   if (TID.Opcode == ARM::BX_RET)
     // The return register is LR.

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58818&r1=58817&r2=58818&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Thu Nov  6 16:15:19 2008
@@ -34,9 +34,10 @@
 def LdMulFrm    : Format<11>;
 def StMulFrm    : Format<12>;
 
-def ArithMisc   : Format<13>;
-def ThumbFrm    : Format<14>;
-def VFPFrm      : Format<15>;
+def ArithMiscFrm: Format<13>;
+def ExtFrm      : Format<14>;
+def ThumbFrm    : Format<15>;
+def VFPFrm      : Format<16>;
 
 // Misc flag for data processing instructions that indicates whether
 // the instruction has a Rn register operand.
@@ -123,11 +124,11 @@
 class AI pattern>
   : I;
+      asm, "", pattern>;
 class AsI pattern>
   : sI;
+       asm, "", pattern>;
 class AXI pattern>
   : XI opcod, dag oops, dag iops, string opc,
          string asm, list pattern>
   : I {
+      asm, "", pattern> {
   let Inst{27-24} = opcod;
 }
 class ABXI opcod, dag oops, dag iops, string asm, list pattern>
@@ -645,7 +646,7 @@
 class AMul1I opcod, dag oops, dag iops, string opc,
          string asm, list pattern>
   : I {
+      asm, "", pattern> {
   let Inst{7-4}   = 0b1001;
   let Inst{20}    = 0; // S bit
   let Inst{27-21} = opcod;
@@ -653,7 +654,7 @@
 class AsMul1I opcod, dag oops, dag iops, string opc,
           string asm, list pattern>
   : sI {
+       asm, "", pattern> {
   let Inst{7-4}   = 0b1001;
   let Inst{27-21} = opcod;
 }
@@ -662,7 +663,7 @@
 class AMul2I opcod, dag oops, dag iops, string opc,
          string asm, list pattern>
   : I {
+      asm, "", pattern> {
   let Inst{7-4}   = 0b1001;
   let Inst{20}    = 1;
   let Inst{27-21} = opcod;
@@ -672,13 +673,22 @@
 class AMulxyI opcod, dag oops, dag iops, string opc,
          string asm, list pattern>
   : I {
+      asm, "", pattern> {
   let Inst{4}     = 0;
   let Inst{7}     = 1;
   let Inst{20}    = 0;
   let Inst{27-21} = opcod;
 }
 
+// Extend instructions.
+class AExtI opcod, dag oops, dag iops, string opc,
+            string asm, list pattern>
+  : I {
+  let Inst{7-4}   = 0b0111;
+  let Inst{27-20} = opcod;
+}
+
 //===----------------------------------------------------------------------===//
 
 // ARMPat - Same as Pat<>, but requires that the compiler be in ARM mode.

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=58818&r1=58817&r2=58818&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Thu Nov  6 16:15:19 2008
@@ -95,28 +95,34 @@
     StMulFrm    = 12 << FormShift,
 
     // Miscellaneous arithmetic instructions
-    ArithMisc   = 13 << FormShift,
+    ArithMiscFrm= 13 << FormShift,
+
+    // Extend instructions
+    ExtFrm      = 14 << FormShift,
 
     // Thumb format
-    ThumbFrm    = 14 << FormShift,
+    ThumbFrm    = 15 << FormShift,
 
     // VFP format
-    VPFFrm      = 15 << FormShift,
+    VPFFrm      = 16 << FormShift,
 
     //===------------------------------------------------------------------===//
     // Field shifts - such shifts are used to set field while generating
     // machine instructions.
-    RotImmShift  = 8,
-    RegRsShift   = 8,
-    RegRdLoShift = 12,
-    RegRdShift   = 12,
-    RegRdHiShift = 16,
-    RegRnShift   = 16,
-    L_BitShift   = 20,
-    S_BitShift   = 20,
-    U_BitShift   = 23,
-    IndexShift   = 24,
-    I_BitShift   = 25
+    SoRotImmShift  = 8,
+    RegRsShift     = 8,
+    ExtRotImmShift = 10,
+    RegRdLoShift   = 12,
+    RegRdShift     = 12,
+    RegRdHiShift   = 16,
+    RegRnShift     = 16,
+    S_BitShift     = 20,
+    W_BitShift     = 21,
+    AM3_I_BitShift = 22,
+    U_BitShift     = 23,
+    P_BitShift     = 24,
+    I_BitShift     = 25,
+    CondShift      = 28
   };
 }
 

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58818&r1=58817&r2=58818&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu Nov  6 16:15:19 2008
@@ -390,25 +390,31 @@
 
 /// AI_unary_rrot - A unary operation with two forms: one whose operand is a
 /// register and one whose operand is a register rotated by 8/16/24.
-multiclass AI_unary_rrot {
-  def r     : AI<(outs GPR:$dst), (ins GPR:$Src), Pseudo,
+/// FIXME: Remove the 'r' variant. Its rot_imm is zero.
+multiclass AI_unary_rrot opcod, string opc, PatFrag opnode> {
+  def r     : AExtI, Requires<[IsARM, HasV6]>;
-  def r_rot : AI<(outs GPR:$dst), (ins GPR:$Src, i32imm:$rot), Pseudo,
+                 [(set GPR:$dst, (opnode GPR:$Src))]>,
+              Requires<[IsARM, HasV6]> {
+                let Inst{19-16} = 0b1111;
+              }
+  def r_rot : AExtI,
-              Requires<[IsARM, HasV6]>;
+              Requires<[IsARM, HasV6]> {
+                let Inst{19-16} = 0b1111;
+              }
 }
 
 /// AI_bin_rrot - A binary operation with two forms: one whose operand is a
 /// register and one whose operand is a register rotated by 8/16/24.
-multiclass AI_bin_rrot {
-  def rr     : AI<(outs GPR:$dst), (ins GPR:$LHS, GPR:$RHS),
-                  Pseudo, opc, " $dst, $LHS, $RHS",
+multiclass AI_bin_rrot opcod, string opc, PatFrag opnode> {
+  def rr     : AExtI,
                   Requires<[IsARM, HasV6]>;
-  def rr_rot : AI<(outs GPR:$dst), (ins GPR:$LHS, GPR:$RHS, i32imm:$rot),
-                  Pseudo, opc, " $dst, $LHS, $RHS, ror $rot",
+  def rr_rot : AExtI,
                   Requires<[IsARM, HasV6]>;
@@ -781,31 +787,36 @@
 
 // Sign extenders
 
-defm SXTB  : AI_unary_rrot<"sxtb", UnOpFrag<(sext_inreg node:$Src, i8)>>;
-defm SXTH  : AI_unary_rrot<"sxth", UnOpFrag<(sext_inreg node:$Src, i16)>>;
-
-defm SXTAB : AI_bin_rrot<"sxtab",
-                        BinOpFrag<(add node:$LHS, (sext_inreg node:$RHS, i8))>>;
-defm SXTAH : AI_bin_rrot<"sxtah",
-                        BinOpFrag<(add node:$LHS, (sext_inreg node:$RHS,i16))>>;
+defm SXTB  : AI_unary_rrot<0b01101010,
+                           "sxtb", UnOpFrag<(sext_inreg node:$Src, i8)>>;
+defm SXTH  : AI_unary_rrot<0b01101011,
+                           "sxth", UnOpFrag<(sext_inreg node:$Src, i16)>>;
+
+defm SXTAB : AI_bin_rrot<0b01101010,
+               "sxtab", BinOpFrag<(add node:$LHS, (sext_inreg node:$RHS, i8))>>;
+defm SXTAH : AI_bin_rrot<0b01101011,
+               "sxtah", BinOpFrag<(add node:$LHS, (sext_inreg node:$RHS,i16))>>;
 
 // TODO: SXT(A){B|H}16
 
 // Zero extenders
 
 let AddedComplexity = 16 in {
-defm UXTB   : AI_unary_rrot<"uxtb"  , UnOpFrag<(and node:$Src, 0x000000FF)>>;
-defm UXTH   : AI_unary_rrot<"uxth"  , UnOpFrag<(and node:$Src, 0x0000FFFF)>>;
-defm UXTB16 : AI_unary_rrot<"uxtb16", UnOpFrag<(and node:$Src, 0x00FF00FF)>>;
+defm UXTB   : AI_unary_rrot<0b01101110,
+                            "uxtb"  , UnOpFrag<(and node:$Src, 0x000000FF)>>;
+defm UXTH   : AI_unary_rrot<0b01101111,
+                            "uxth"  , UnOpFrag<(and node:$Src, 0x0000FFFF)>>;
+defm UXTB16 : AI_unary_rrot<0b01101100,
+                            "uxtb16", UnOpFrag<(and node:$Src, 0x00FF00FF)>>;
 
 def : ARMV6Pat<(and (shl GPR:$Src, 8), 0xFF00FF),
                (UXTB16r_rot GPR:$Src, 24)>;
 def : ARMV6Pat<(and (srl GPR:$Src, 8), 0xFF00FF),
                (UXTB16r_rot GPR:$Src, 8)>;
 
-defm UXTAB : AI_bin_rrot<"uxtab",
+defm UXTAB : AI_bin_rrot<0b01101110, "uxtab",
                         BinOpFrag<(add node:$LHS, (and node:$RHS, 0x00FF))>>;
-defm UXTAH : AI_bin_rrot<"uxtah",
+defm UXTAH : AI_bin_rrot<0b01101111, "uxtah",
                         BinOpFrag<(add node:$LHS, (and node:$RHS, 0xFFFF))>>;
 }
 
@@ -1090,15 +1101,15 @@
 //  Misc. Arithmetic Instructions.
 //
 
-def CLZ  : AI<(outs GPR:$dst), (ins GPR:$src), ArithMisc,
+def CLZ  : AI<(outs GPR:$dst), (ins GPR:$src), ArithMiscFrm,
               "clz", " $dst, $src",
               [(set GPR:$dst, (ctlz GPR:$src))]>, Requires<[IsARM, HasV5T]>;
 
-def REV  : AI<(outs GPR:$dst), (ins GPR:$src), ArithMisc,
+def REV  : AI<(outs GPR:$dst), (ins GPR:$src), ArithMiscFrm,
               "rev", " $dst, $src",
               [(set GPR:$dst, (bswap GPR:$src))]>, Requires<[IsARM, HasV6]>;
 
-def REV16 : AI<(outs GPR:$dst), (ins GPR:$src), ArithMisc,
+def REV16 : AI<(outs GPR:$dst), (ins GPR:$src), ArithMiscFrm,
                "rev16", " $dst, $src",
                [(set GPR:$dst,
                    (or (and (srl GPR:$src, 8), 0xFF),
@@ -1107,7 +1118,7 @@
                                (and (shl GPR:$src, 8), 0xFF000000)))))]>,
                Requires<[IsARM, HasV6]>;
 
-def REVSH : AI<(outs GPR:$dst), (ins GPR:$src), ArithMisc,
+def REVSH : AI<(outs GPR:$dst), (ins GPR:$src), ArithMiscFrm,
                "revsh", " $dst, $src",
                [(set GPR:$dst,
                   (sext_inreg
@@ -1116,7 +1127,7 @@
                Requires<[IsARM, HasV6]>;
 
 def PKHBT : AI<(outs GPR:$dst), (ins GPR:$src1, GPR:$src2, i32imm:$shamt),
-               Pseudo, "pkhbt", " $dst, $src1, $src2, LSL $shamt",
+               ArithMiscFrm, "pkhbt", " $dst, $src1, $src2, LSL $shamt",
                [(set GPR:$dst, (or (and GPR:$src1, 0xFFFF),
                                    (and (shl GPR:$src2, (i32 imm:$shamt)),
                                         0xFFFF0000)))]>,
@@ -1130,7 +1141,7 @@
 
 
 def PKHTB : AI<(outs GPR:$dst), (ins GPR:$src1, GPR:$src2, i32imm:$shamt),
-               Pseudo, "pkhtb", " $dst, $src1, $src2, ASR $shamt",
+               ArithMiscFrm, "pkhtb", " $dst, $src1, $src2, ASR $shamt",
                [(set GPR:$dst, (or (and GPR:$src1, 0xFFFF0000),
                                    (and (sra GPR:$src2, imm16_31:$shamt),
                                         0xFFFF)))]>, Requires<[IsARM, HasV6]>;




From isanbard at gmail.com  Thu Nov  6 16:18:44 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 06 Nov 2008 22:18:44 -0000
Subject: [llvm-commits] [llvm] r58819 -
	/llvm/trunk/lib/CodeGen/StackProtector.cpp
Message-ID: <200811062218.mA6MIjIK012772@zion.cs.uiuc.edu>

Author: void
Date: Thu Nov  6 16:18:44 2008
New Revision: 58819

URL: http://llvm.org/viewvc/llvm-project?rev=58819&view=rev
Log:
The size limit is for individual arrays. So if any array has more than 8 bytes
in it, then emit stack protectors.

Modified:
    llvm/trunk/lib/CodeGen/StackProtector.cpp

Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58819&r1=58818&r2=58819&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackProtector.cpp Thu Nov  6 16:18:44 2008
@@ -192,9 +192,6 @@
   default: return false;
   case SSP::ALL: return true;
   case SSP::SOME: {
-    // If the size of the local variables allocated on the stack is greater than
-    // SSPBufferSize, then we require a stack protector.
-    uint64_t StackSize = 0;
     const TargetData *TD = TLI->getTargetData();
 
     for (Function::iterator I = F->begin(), E = F->end(); I != E; ++I) {
@@ -208,9 +205,10 @@
           if (ConstantInt *CI = dyn_cast(AI->getArraySize())) {
             const Type *Ty = AI->getAllocatedType();
             uint64_t TySize = TD->getABITypeSize(Ty);
-            StackSize += TySize * CI->getZExtValue(); // Total allocated size.
 
-            if (SSPBufferSize <= StackSize)
+            // If an array has more than 8 bytes of allocated space, then we
+            // emit stack protectors.
+            if (SSPBufferSize <= TySize * CI->getZExtValue())
               return true;
           } else {
             // This is a call to alloca with a variable size. Default to adding




From wangmp at apple.com  Thu Nov  6 16:52:22 2008
From: wangmp at apple.com (Mon P Wang)
Date: Thu, 06 Nov 2008 22:52:22 -0000
Subject: [llvm-commits] [llvm] r58820 - in /llvm/trunk/lib:
 CodeGen/SelectionDAG/LegalizeDAG.cpp
 Transforms/Scalar/InstructionCombining.cpp
Message-ID: <200811062252.mA6MqMuk013962@zion.cs.uiuc.edu>

Author: wangmp
Date: Thu Nov  6 16:52:21 2008
New Revision: 58820

URL: http://llvm.org/viewvc/llvm-project?rev=58820&view=rev
Log:
Fixed scalarizing an extract subvector and prevent an infinite loop
when simplify a vector. 

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=58820&r1=58819&r2=58820&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Nov  6 16:52:21 2008
@@ -7516,8 +7516,8 @@
     break;
   }
   case ISD::EXTRACT_SUBVECTOR:
-    Result = Node->getOperand(0);
-    assert(Result.getValueType() == NewVT);
+    Result = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, NewVT, Node->getOperand(0),
+                          Node->getOperand(1));
     break;
   case ISD::BIT_CONVERT: {
     SDValue Op0 = Op.getOperand(0);
@@ -8174,7 +8174,7 @@
 
   SDValue VecOp = DAG.getNode(ISD::BIT_CONVERT, VecEVT, ValOp);
   SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, EVT, VecOp,
-                                  DAG.getIntPtrConstant(0));
+                            DAG.getIntPtrConstant(0));
   SDValue StOp = DAG.getStore(Chain, EOp, BasePtr, SV, SVOffset,
                                isVolatile, Alignment);
   StChain.push_back(StOp);

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=58820&r1=58819&r2=58820&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Thu Nov  6 16:52:21 2008
@@ -1410,6 +1410,12 @@
   } else if (isa(V)) {
     // Simplify the CAZ to a ConstantVector where the non-demanded elements are
     // set to undef.
+    
+    // Check if this is identity. If so, return 0 since we are not simplifying
+    // anything.
+    if (DemandedElts == ((1ULL << VWidth) -1))
+      return 0;
+    
     const Type *EltTy = cast(V->getType())->getElementType();
     Constant *Zero = Constant::getNullValue(EltTy);
     Constant *Undef = UndefValue::get(EltTy);




From isanbard at gmail.com  Thu Nov  6 17:55:49 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 06 Nov 2008 23:55:49 -0000
Subject: [llvm-commits] [llvm] r58822 -
	/llvm/trunk/lib/CodeGen/StackProtector.cpp
Message-ID: <200811062355.mA6Ntnne016023@zion.cs.uiuc.edu>

Author: void
Date: Thu Nov  6 17:55:49 2008
New Revision: 58822

URL: http://llvm.org/viewvc/llvm-project?rev=58822&view=rev
Log:
Don't build a vector of returns. Just modify the Function in the loop.

Modified:
    llvm/trunk/lib/CodeGen/StackProtector.cpp

Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58822&r1=58821&r2=58822&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackProtector.cpp Thu Nov  6 17:55:49 2008
@@ -98,31 +98,8 @@
 ///  - The epilogue checks the value stored in the prologue against the original
 ///    value. It calls __stack_chk_fail if they differ.
 bool StackProtector::InsertStackProtectors() {
-  std::vector ReturnBBs;
-
-  for (Function::iterator I = F->begin(); I != F->end(); ++I)
-    if (isa(I->getTerminator()))
-      ReturnBBs.push_back(I);
-
-  // If this function doesn't return, don't bother with stack protectors.
-  if (ReturnBBs.empty()) return false;
-
-  // Insert code into the entry block that stores the __stack_chk_guard variable
-  // onto the stack.
-  BasicBlock &Entry = F->getEntryBlock();
-  Instruction *InsertPt = &Entry.front();
-
-  const PointerType *GuardTy = PointerType::getUnqual(Type::Int8Ty);
-
-  // The global variable for the stack guard.
-  Constant *StackGuardVar = M->getOrInsertGlobal("__stack_chk_guard", GuardTy);
-  LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", false, InsertPt);
-  CallInst::
-    Create(Intrinsic::getDeclaration(M, Intrinsic::stackprotector_create),
-           LI, "", InsertPt);
-
-  // Create the basic block to jump to when the guard check fails.
-  BasicBlock *FailBB = CreateFailBB();
+  Constant *StackGuardVar = 0;  // The global variable for the stack guard.
+  BasicBlock *FailBB = 0;       // The basic block to jump to if check fails.
 
   // Loop through the basic blocks that have return instructions. Convert this:
   //
@@ -146,29 +123,55 @@
   //     call void @__stack_chk_fail()
   //     unreachable
   //
-  for (std::vector::iterator
-         I = ReturnBBs.begin(), E = ReturnBBs.end(); I != E; ++I) {
-    BasicBlock *BB = *I;
-    ReturnInst *RI = cast(BB->getTerminator());
-    Function::iterator InsPt = BB; ++InsPt; // Insertion point for new BB.
-
-    // Split the basic block before the return instruction.
-    BasicBlock *NewBB = BB->splitBasicBlock(RI, "SP_return");
-
-    // Move the newly created basic block to the point right after the old basic
-    // block so that it's in the "fall through" position.
-    NewBB->removeFromParent();
-    F->getBasicBlockList().insert(InsPt, NewBB);
-
-    // Generate the stack protector instructions in the old basic block.
-    LoadInst *LI1 = new LoadInst(StackGuardVar, "", false, BB);
-    CallInst *CI = CallInst::
-      Create(Intrinsic::getDeclaration(M, Intrinsic::stackprotector_check),
-             "", BB);
-    ICmpInst *Cmp = new ICmpInst(CmpInst::ICMP_EQ, CI, LI1, "", BB);
-    BranchInst::Create(NewBB, FailBB, Cmp, BB);
+  for (Function::iterator I = F->begin(), E = F->end(); I != E; ++I) {
+    BasicBlock *BB = I;
+
+    if (isa(BB->getTerminator())) {
+      // Create the basic block to jump to when the guard check fails.
+      if (!FailBB)
+        FailBB = CreateFailBB();
+
+      if (!StackGuardVar)
+        StackGuardVar =
+          M->getOrInsertGlobal("__stack_chk_guard",
+                               PointerType::getUnqual(Type::Int8Ty));
+
+      ReturnInst *RI = cast(BB->getTerminator());
+      Function::iterator InsPt = BB; ++InsPt; // Insertion point for new BB.
+      ++I;
+
+      // Split the basic block before the return instruction.
+      BasicBlock *NewBB = BB->splitBasicBlock(RI, "SP_return");
+
+      // Move the newly created basic block to the point right after the old basic
+      // block so that it's in the "fall through" position.
+      NewBB->removeFromParent();
+      F->getBasicBlockList().insert(InsPt, NewBB);
+
+      // Generate the stack protector instructions in the old basic block.
+      LoadInst *LI1 = new LoadInst(StackGuardVar, "", false, BB);
+      CallInst *CI = CallInst::
+        Create(Intrinsic::getDeclaration(M, Intrinsic::stackprotector_check),
+               "", BB);
+      ICmpInst *Cmp = new ICmpInst(CmpInst::ICMP_EQ, CI, LI1, "", BB);
+      BranchInst::Create(NewBB, FailBB, Cmp, BB);
+    }
   }
 
+  // Return if we didn't modify any basic blocks. I.e., there are no return
+  // statements in the function.
+  if (!FailBB) return false;
+
+  // Insert code into the entry block that stores the __stack_chk_guard variable
+  // onto the stack.
+  BasicBlock &Entry = F->getEntryBlock();
+  Instruction *InsertPt = &Entry.front();
+
+  LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", false, InsertPt);
+  CallInst::
+    Create(Intrinsic::getDeclaration(M, Intrinsic::stackprotector_create),
+           LI, "", InsertPt);
+
   return true;
 }
 




From isanbard at gmail.com  Thu Nov  6 17:57:00 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 06 Nov 2008 23:57:00 -0000
Subject: [llvm-commits] [llvm] r58823 -
	/llvm/trunk/lib/CodeGen/StackProtector.cpp
Message-ID: <200811062357.mA6Nv058016071@zion.cs.uiuc.edu>

Author: void
Date: Thu Nov  6 17:56:59 2008
New Revision: 58823

URL: http://llvm.org/viewvc/llvm-project?rev=58823&view=rev
Log:
Remove unneeded header file.

Modified:
    llvm/trunk/lib/CodeGen/StackProtector.cpp

Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58823&r1=58822&r2=58823&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackProtector.cpp Thu Nov  6 17:56:59 2008
@@ -23,7 +23,6 @@
 #include "llvm/Intrinsics.h"
 #include "llvm/Module.h"
 #include "llvm/Pass.h"
-#include "llvm/ADT/APInt.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Target/TargetData.h"
 #include "llvm/Target/TargetLowering.h"




From isanbard at gmail.com  Thu Nov  6 18:06:49 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 6 Nov 2008 16:06:49 -0800
Subject: [llvm-commits] [llvm] r58727 - in /llvm/trunk:
	include/llvm/Module.h lib/CodeGen/StackProtector.cpp
	lib/VMCore/Module.cpp
In-Reply-To: <80A92D9D-4DDE-4221-8A35-E32068034293@apple.com>
References: <200811042251.mA4MpO0E028324@zion.cs.uiuc.edu>
	<30CA4196-CC39-4B54-9D37-3BBD4C5FB43F@apple.com>
	<16e5fdf90811051619g50c3e4a4x7691775b833e9816@mail.gmail.com>
	<80A92D9D-4DDE-4221-8A35-E32068034293@apple.com>
Message-ID: <16e5fdf90811061606g6260b465x8d4b7d88f9500830@mail.gmail.com>

On Thu, Nov 6, 2008 at 9:57 AM, Chris Lattner  wrote:
> On Nov 5, 2008, at 4:19 PM, Bill Wendling wrote:
>>> Awesome, thanks Bill!  One minor nit: getOrInsertFunction takes a
>>> function, not a pointer to the function.  Do you think it makes sense
>>> for getOrInsertGlobal to take the "contained" type of the global,
>>> instead of the pointer?
>>>
>> If I understand correctly, that's what this change is doing. :-) Or do
>> you want to create another "derived type" called GlobalType similar to
>> FunctionType and use that?
>
> I believe that if you pass in an i32 to the current implementation
> that it will get an assert fail or invalid IR, not a global that holds
> an i32.  To get a global that holds an i32, you have to pass in i32*
> (which is different than how the globalvariable ctor works, which is
> confusing).
>
> If it doesn't work like this, then please ignore me :)
>
I did a quick test with this code:

  Constant *C = M->getOrInsertGlobal("__fnord", Type::Int32Ty);
  new LoadInst(C, "C", false, InsertPt);

and the LLVM IR looks like this:

@__fnord = external global i32          ;  [#uses=1]

define i32 @foo() nounwind {
entry:
        %C = load i32* @__fnord         ;  [#uses=0]

So ignore you? ;-)

-bw


From isanbard at gmail.com  Thu Nov  6 19:24:01 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Fri, 07 Nov 2008 01:24:01 -0000
Subject: [llvm-commits] [llvm] r58824 - in /llvm/trunk:
 include/llvm/Intrinsics.td lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
 lib/CodeGen/StackProtector.cpp
Message-ID: <200811070124.mA71O25R018649@zion.cs.uiuc.edu>

Author: void
Date: Thu Nov  6 19:23:58 2008
New Revision: 58824

URL: http://llvm.org/viewvc/llvm-project?rev=58824&view=rev
Log:
- Modify the stack protector algorithm so that the stack slot is allocated in
  LLVM IR code and not in the selection DAG ISel. This is a cleaner solution.

- Fix the heuristic for determining if protectors are necessary. The previous
  one wasn't checking the proper type size.


Modified:
    llvm/trunk/include/llvm/Intrinsics.td
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
    llvm/trunk/lib/CodeGen/StackProtector.cpp

Modified: llvm/trunk/include/llvm/Intrinsics.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Intrinsics.td?rev=58824&r1=58823&r2=58824&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Intrinsics.td (original)
+++ llvm/trunk/include/llvm/Intrinsics.td Thu Nov  6 19:23:58 2008
@@ -179,9 +179,10 @@
 // Stack Protector Intrinsics - The stackprotector_create writes the stack guard
 // to the correct place on the stack frame. The stackprotector_check reads back
 // the stack guard that the stackprotector_create stored.
-def int_stackprotector_create : Intrinsic<[llvm_void_ty, llvm_ptr_ty],
-                                          [IntrWriteMem]>;
-def int_stackprotector_check  : Intrinsic<[llvm_ptr_ty], [IntrReadMem]>;
+def int_stackprotector_create : Intrinsic<[llvm_void_ty, llvm_ptr_ty,
+                                           llvm_ptrptr_ty], [IntrWriteMem]>;
+def int_stackprotector_check  : Intrinsic<[llvm_ptr_ty, llvm_ptrptr_ty],
+                                          [IntrReadMem]>;
 
 //===------------------- Standard C Library Intrinsics --------------------===//
 //

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp?rev=58824&r1=58823&r2=58824&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Thu Nov  6 19:23:58 2008
@@ -3801,14 +3801,10 @@
     MachineFrameInfo *MFI = MF.getFrameInfo();
     MVT PtrTy = TLI.getPointerTy();
 
-    // Retrieve the stack protector guard's value.
-    SDValue Src = getValue(I.getOperand(1));
+    SDValue Src = getValue(I.getOperand(1));   // The guard's value.
+    AllocaInst *Slot = cast(I.getOperand(2));
 
-    // Create a slot on the stack for the stack protector. It should go first
-    // before local variables are allocated.
-    unsigned Align =
-      TLI.getTargetData()->getPrefTypeAlignment(PtrTy.getTypeForMVT());
-    int FI = MFI->CreateStackObject(PtrTy.getSizeInBits() / 8, Align);
+    int FI = FuncInfo.StaticAllocaMap[Slot];
     MFI->setStackProtectorIndex(FI);
 
     SDValue FIN = DAG.getFrameIndex(FI, PtrTy);

Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=58824&r1=58823&r2=58824&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackProtector.cpp Thu Nov  6 19:23:58 2008
@@ -97,9 +97,6 @@
 ///  - The epilogue checks the value stored in the prologue against the original
 ///    value. It calls __stack_chk_fail if they differ.
 bool StackProtector::InsertStackProtectors() {
-  Constant *StackGuardVar = 0;  // The global variable for the stack guard.
-  BasicBlock *FailBB = 0;       // The basic block to jump to if check fails.
-
   // Loop through the basic blocks that have return instructions. Convert this:
   //
   //   return:
@@ -122,18 +119,34 @@
   //     call void @__stack_chk_fail()
   //     unreachable
   //
+  BasicBlock *FailBB = 0;       // The basic block to jump to if check fails.
+  AllocaInst *AI = 0;           // Place on stack that stores the stack guard.
+  Constant *StackGuardVar = 0;  // The stack guard variable.
+
   for (Function::iterator I = F->begin(), E = F->end(); I != E; ++I) {
     BasicBlock *BB = I;
 
     if (isa(BB->getTerminator())) {
-      // Create the basic block to jump to when the guard check fails.
-      if (!FailBB)
+      if (!FailBB) {
+        // Create the basic block to jump to when the guard check fails.
         FailBB = CreateFailBB();
 
-      if (!StackGuardVar)
-        StackGuardVar =
-          M->getOrInsertGlobal("__stack_chk_guard",
-                               PointerType::getUnqual(Type::Int8Ty));
+        // Insert code into the entry block that stores the __stack_chk_guard
+        // variable onto the stack.
+        PointerType *PtrTy = PointerType::getUnqual(Type::Int8Ty);
+        StackGuardVar = M->getOrInsertGlobal("__stack_chk_guard", PtrTy);
+
+        BasicBlock &Entry = F->getEntryBlock();
+        Instruction *InsPt = &Entry.front();
+
+        AI = new AllocaInst(PtrTy, "StackGuardSlot", InsPt);
+        LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", false, InsPt);
+
+        Value *Args[] = { LI, AI };
+        CallInst::
+          Create(Intrinsic::getDeclaration(M, Intrinsic::stackprotector_create),
+                 &Args[0], array_endof(Args), "", InsPt);
+      }
 
       ReturnInst *RI = cast(BB->getTerminator());
       Function::iterator InsPt = BB; ++InsPt; // Insertion point for new BB.
@@ -151,7 +164,7 @@
       LoadInst *LI1 = new LoadInst(StackGuardVar, "", false, BB);
       CallInst *CI = CallInst::
         Create(Intrinsic::getDeclaration(M, Intrinsic::stackprotector_check),
-               "", BB);
+               AI, "", BB);
       ICmpInst *Cmp = new ICmpInst(CmpInst::ICMP_EQ, CI, LI1, "", BB);
       BranchInst::Create(NewBB, FailBB, Cmp, BB);
     }
@@ -161,16 +174,6 @@
   // statements in the function.
   if (!FailBB) return false;
 
-  // Insert code into the entry block that stores the __stack_chk_guard variable
-  // onto the stack.
-  BasicBlock &Entry = F->getEntryBlock();
-  Instruction *InsertPt = &Entry.front();
-
-  LoadInst *LI = new LoadInst(StackGuardVar, "StackGuard", false, InsertPt);
-  CallInst::
-    Create(Intrinsic::getDeclaration(M, Intrinsic::stackprotector_create),
-           LI, "", InsertPt);
-
   return true;
 }
 
@@ -202,21 +205,16 @@
       for (BasicBlock::iterator
              II = BB->begin(), IE = BB->end(); II != IE; ++II)
         if (AllocaInst *AI = dyn_cast(II)) {
-          if (!AI->isArrayAllocation()) continue; // Only care about arrays.
-
-          if (ConstantInt *CI = dyn_cast(AI->getArraySize())) {
-            const Type *Ty = AI->getAllocatedType();
-            uint64_t TySize = TD->getABITypeSize(Ty);
+          if (AI->isArrayAllocation())
+            // This is a call to alloca with a variable size. Emit stack
+            // protectors.
+            return true;
 
+          if (const ArrayType *AT = dyn_cast(AI->getAllocatedType()))
             // If an array has more than 8 bytes of allocated space, then we
             // emit stack protectors.
-            if (SSPBufferSize <= TySize * CI->getZExtValue())
+            if (SSPBufferSize <= TD->getABITypeSize(AT))
               return true;
-          } else {
-            // This is a call to alloca with a variable size. Default to adding
-            // stack protectors.
-            return true;
-          }
         }
     }
 




From dalej at apple.com  Thu Nov  6 19:28:02 2008
From: dalej at apple.com (Dale Johannesen)
Date: Fri, 07 Nov 2008 01:28:02 -0000
Subject: [llvm-commits] [llvm] r58825 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Message-ID: <200811070128.mA71S2HU018770@zion.cs.uiuc.edu>

Author: johannes
Date: Thu Nov  6 19:28:02 2008
New Revision: 58825

URL: http://llvm.org/viewvc/llvm-project?rev=58825&view=rev
Log:
When we're doing a compare of load-AND-constant to 0
(e.g. a bitfield test) narrow the load as much as possible.
The has the potential to avoid unnecessary partial-word
load-after-store conflicts, which cause stalls on several targets.
Also a size win on x86 (testb vs testl).


Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=58825&r1=58824&r2=58825&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Thu Nov  6 19:28:02 2008
@@ -1352,6 +1352,52 @@
                               Zero, Cond);
         }
       }
+
+      // If the LHS is '(and load, const)', the RHS is 0,
+      // the test is for equality or unsigned, and all 1 bits of the const are
+      // in the same partial word, see if we can shorten the load.
+      if (DCI.isBeforeLegalize() &&
+          N0.getOpcode() == ISD::AND && C1 == 0 &&
+          isa(N0.getOperand(0)) &&
+          N0.getOperand(0).getNode()->hasOneUse() &&
+          isa(N0.getOperand(1))) {
+        LoadSDNode *Lod = cast(N0.getOperand(0));
+        uint64_t Mask = cast(N0.getOperand(1))->getZExtValue();
+        unsigned bestWidth = 0, bestOffset = 0;
+        if (!Lod->isVolatile()) {
+          unsigned origWidth = N0.getValueType().getSizeInBits();
+          for (unsigned width = origWidth / 2; width>=8; width /= 2) {
+            uint64_t newMask = (1ULL << width) - 1;
+            for (unsigned offset=0; offset> (bestOffset * 8);
+            MVT PtrType = Lod->getOperand(1).getValueType();
+            SDValue Ptr = Lod->getBasePtr();
+            if (bestOffset != 0)
+              Ptr = DAG.getNode(ISD::ADD, PtrType, Lod->getBasePtr(),
+                                DAG.getConstant(bestOffset, PtrType));
+            unsigned NewAlign = MinAlign(Lod->getAlignment(), bestOffset);
+            SDValue NewLoad = DAG.getLoad(newVT, Lod->getChain(), Ptr,
+                                          Lod->getSrcValue(), 
+                                          Lod->getSrcValueOffset() + bestOffset,
+                                          false, NewAlign);
+            return DAG.getSetCC(VT, DAG.getNode(ISD::AND, newVT, NewLoad,
+                                            DAG.getConstant(bestMask, newVT)),
+                                    DAG.getConstant(0LL, newVT), Cond);
+          }
+        }
+      }
       
       // If the LHS is a ZERO_EXTEND, perform the comparison on the input.
       if (N0.getOpcode() == ISD::ZERO_EXTEND) {




From dpatel at apple.com  Thu Nov  6 19:30:07 2008
From: dpatel at apple.com (Devang Patel)
Date: Fri, 07 Nov 2008 01:30:07 -0000
Subject: [llvm-commits] [llvm] r58826 - in /llvm/trunk:
 lib/Transforms/Utils/PromoteMemoryToRegister.cpp
 test/DebugInfo/2008-11-06-Mem2Reg.ll
Message-ID: <200811070130.mA71U7m9018913@zion.cs.uiuc.edu>

Author: dpatel
Date: Thu Nov  6 19:30:07 2008
New Revision: 58826

URL: http://llvm.org/viewvc/llvm-project?rev=58826&view=rev
Log:
Handle (delete) dbg intrinsics while promoting alloca.

Added:
    llvm/trunk/test/DebugInfo/2008-11-06-Mem2Reg.ll
Modified:
    llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp

Modified: llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp?rev=58826&r1=58825&r2=58826&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp Thu Nov  6 19:30:07 2008
@@ -22,6 +22,7 @@
 #include "llvm/DerivedTypes.h"
 #include "llvm/Function.h"
 #include "llvm/Instructions.h"
+#include "llvm/IntrinsicInst.h"
 #include "llvm/Analysis/Dominators.h"
 #include "llvm/Analysis/AliasSetTracker.h"
 #include "llvm/ADT/DenseMap.h"
@@ -79,7 +80,18 @@
       if (SI->isVolatile())
         return false;
     } else {
-      return false;   // Not a load or store.
+      const BitCastInst *BC = dyn_cast(*UI);
+      if (!BC) 
+        return false;   // Not a load or store or dbg intrinsic.
+      Value::use_const_iterator BCUI = BC->use_begin(), BCUE = BC->use_end();
+      if (BCUI == BCUE) 
+        return false; // Not a dbg intrinsic.
+      const DbgInfoIntrinsic *DI = dyn_cast(*BCUI);
+      if (!DI) 
+        return false; // Not a dbg intrinsic.
+      BCUI++; 
+      if (BCUI != BCUE) 
+        return false; // Not a dbg intrinsic use.
     }
 
   return true;
@@ -275,14 +287,21 @@
     /// ivars.
     void AnalyzeAlloca(AllocaInst *AI) {
       clear();
-      
+
       // As we scan the uses of the alloca instruction, keep track of stores,
       // and decide whether all of the loads and stores to the alloca are within
       // the same basic block.
       for (Value::use_iterator U = AI->use_begin(), E = AI->use_end();
            U != E; ++U) {
         Instruction *User = cast(*U);
-        if (StoreInst *SI = dyn_cast(User)) {
+        if (BitCastInst *BC = dyn_cast(User)) {
+          // Remove dbg intrinsic uses now.
+          Value::use_iterator BCUI = BC->use_begin();
+          DbgInfoIntrinsic *DI = cast(*BCUI);
+          assert (BCUI + 1 == BC->use_end() && "Unexpected alloca uses!");
+          DI->eraseFromParent();
+          BC->eraseFromParent();
+        } else if (StoreInst *SI = dyn_cast(User)) {
           // Remember the basic blocks which define new values for the alloca
           DefiningBlocks.push_back(SI->getParent());
           AllocaPointerVal = SI->getOperand(0);

Added: llvm/trunk/test/DebugInfo/2008-11-06-Mem2Reg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/2008-11-06-Mem2Reg.ll?rev=58826&view=auto

==============================================================================
--- llvm/trunk/test/DebugInfo/2008-11-06-Mem2Reg.ll (added)
+++ llvm/trunk/test/DebugInfo/2008-11-06-Mem2Reg.ll Thu Nov  6 19:30:07 2008
@@ -0,0 +1,56 @@
+; RUN: llvm-as < %s | opt -mem2reg | llvm-dis | grep alloca | count 1
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+	%llvm.dbg.anchor.type = type { i32, i32 }
+	%llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
+	%llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8* }
+	%llvm.dbg.subprogram.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1 }
+	%llvm.dbg.variable.type = type { i32, { }*, i8*, { }*, i32, { }* }
+ at llvm.dbg.subprogram = internal constant %llvm.dbg.subprogram.type { i32 393262, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 2, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), i1 false, i1 true }, section "llvm.metadata"		; <%llvm.dbg.subprogram.type*> [#uses=1]
+ at llvm.dbg.subprograms = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 46 }, section "llvm.metadata"		; <%llvm.dbg.anchor.type*> [#uses=1]
+ at llvm.dbg.compile_unit = internal constant %llvm.dbg.compile_unit.type { i32 393233, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([7 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([55 x i8]* @.str2, i32 0, i32 0) }, section "llvm.metadata"		; <%llvm.dbg.compile_unit.type*> [#uses=1]
+ at llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 17 }, section "llvm.metadata"		; <%llvm.dbg.anchor.type*> [#uses=1]
+ at .str = internal constant [7 x i8] c"adce.c\00", section "llvm.metadata"		; <[7 x i8]*> [#uses=1]
+ at .str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata"		; <[6 x i8]*> [#uses=1]
+ at .str2 = internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5623) (LLVM build 00)\00", section "llvm.metadata"		; <[55 x i8]*> [#uses=1]
+ at .str3 = internal constant [4 x i8] c"foo\00", section "llvm.metadata"		; <[4 x i8]*> [#uses=1]
+ at llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { i32 393252, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str4, i32 0, i32 0), { }* null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata"		; <%llvm.dbg.basictype.type*> [#uses=1]
+ at .str4 = internal constant [4 x i8] c"int\00", section "llvm.metadata"		; <[4 x i8]*> [#uses=1]
+ at llvm.dbg.variable = internal constant %llvm.dbg.variable.type { i32 393472, { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*), i8* getelementptr ([2 x i8]* @.str5, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 3, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*) }, section "llvm.metadata"		; <%llvm.dbg.variable.type*> [#uses=1]
+ at .str5 = internal constant [2 x i8] c"i\00", section "llvm.metadata"		; <[2 x i8]*> [#uses=1]
+
+define i32 @foo() nounwind {
+entry:
+	%retval = alloca i32		;  [#uses=2]
+	%i = alloca i32		;  [#uses=4]
+	%0 = alloca i32		;  [#uses=2]
+	%"alloca point" = bitcast i32 0 to i32		;  [#uses=0]
+	call void @llvm.dbg.func.start({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
+	%i1 = bitcast i32* %i to { }*		; <{ }*> [#uses=1]
+	call void @llvm.dbg.declare({ }* %i1, { }* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable to { }*))
+	call void @llvm.dbg.stoppoint(i32 3, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+	store i32 4, i32* %i, align 4
+	call void @llvm.dbg.stoppoint(i32 4, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+	%1 = load i32* %i, align 4		;  [#uses=1]
+	%2 = mul i32 %1, 84		;  [#uses=1]
+	store i32 %2, i32* %i, align 4
+	call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+	store i32 42, i32* %0, align 4
+	%3 = load i32* %0, align 4		;  [#uses=1]
+	store i32 %3, i32* %retval, align 4
+	br label %return
+
+return:		; preds = %entry
+	%retval2 = load i32* %retval		;  [#uses=1]
+	call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
+	call void @llvm.dbg.region.end({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
+	ret i32 %retval2
+}
+
+declare void @llvm.dbg.func.start({ }*) nounwind
+
+declare void @llvm.dbg.declare({ }*, { }*) nounwind
+
+declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
+
+declare void @llvm.dbg.region.end({ }*) nounwind




From dalej at apple.com  Thu Nov  6 19:30:19 2008
From: dalej at apple.com (Dale Johannesen)
Date: Fri, 07 Nov 2008 01:30:19 -0000
Subject: [llvm-commits] [llvm] r58827 -
	/llvm/trunk/test/CodeGen/X86/2008-11-06-testb.ll
Message-ID: <200811070130.mA71UJK0018930@zion.cs.uiuc.edu>

Author: johannes
Date: Thu Nov  6 19:30:18 2008
New Revision: 58827

URL: http://llvm.org/viewvc/llvm-project?rev=58827&view=rev
Log:
Testcase for testb optimization.


Added:
    llvm/trunk/test/CodeGen/X86/2008-11-06-testb.ll

Added: llvm/trunk/test/CodeGen/X86/2008-11-06-testb.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-11-06-testb.ll?rev=58827&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-11-06-testb.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2008-11-06-testb.ll Thu Nov  6 19:30:18 2008
@@ -0,0 +1,25 @@
+; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep testb
+; ModuleID = ''
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.5"
+	%struct.x = type <{ i8, i8, i16 }>
+
+define i32 @foo(%struct.x* %p) nounwind {
+entry:
+	%0 = getelementptr %struct.x* %p, i32 0, i32 0		;  [#uses=1]
+	store i8 55, i8* %0, align 1
+	%1 = bitcast %struct.x* %p to i32*		;  [#uses=1]
+	%2 = load i32* %1, align 1		;  [#uses=1]
+	%3 = and i32 %2, 512		;  [#uses=1]
+	%4 = icmp eq i32 %3, 0		;  [#uses=1]
+	br i1 %4, label %bb5, label %bb
+
+bb:		; preds = %entry
+	%5 = tail call i32 (...)* @xx() nounwind		;  [#uses=1]
+	ret i32 %5
+
+bb5:		; preds = %entry
+	ret i32 0
+}
+
+declare i32 @xx(...)




From dberlin at dberlin.org  Thu Nov  6 19:41:10 2008
From: dberlin at dberlin.org (Daniel Berlin)
Date: Thu, 6 Nov 2008 20:41:10 -0500
Subject: [llvm-commits] [llvm] r58826 - in /llvm/trunk:
	lib/Transforms/Utils/PromoteMemoryToRegister.cpp
	test/DebugInfo/2008-11-06-Mem2Reg.ll
In-Reply-To: <200811070130.mA71U7m9018913@zion.cs.uiuc.edu>
References: <200811070130.mA71U7m9018913@zion.cs.uiuc.edu>
Message-ID: <4aca3dc20811061741ha0b35ccg745fe51cd1c5a6d9@mail.gmail.com>

This breaks build.
PromoteMemoryToRegister.cpp:301: error: no match for 'operator+' in 'BCUI + 1'


On Thu, Nov 6, 2008 at 8:30 PM, Devang Patel  wrote:
> Author: dpatel
> Date: Thu Nov  6 19:30:07 2008
> New Revision: 58826
>
> URL: http://llvm.org/viewvc/llvm-project?rev=58826&view=rev
> Log:
> Handle (delete) dbg intrinsics while promoting alloca.
>
> Added:
>    llvm/trunk/test/DebugInfo/2008-11-06-Mem2Reg.ll
> Modified:
>    llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
>
> Modified: llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp?rev=58826&r1=58825&r2=58826&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp (original)
> +++ llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp Thu Nov  6 19:30:07 2008
> @@ -22,6 +22,7 @@
>  #include "llvm/DerivedTypes.h"
>  #include "llvm/Function.h"
>  #include "llvm/Instructions.h"
> +#include "llvm/IntrinsicInst.h"
>  #include "llvm/Analysis/Dominators.h"
>  #include "llvm/Analysis/AliasSetTracker.h"
>  #include "llvm/ADT/DenseMap.h"
> @@ -79,7 +80,18 @@
>       if (SI->isVolatile())
>         return false;
>     } else {
> -      return false;   // Not a load or store.
> +      const BitCastInst *BC = dyn_cast(*UI);
> +      if (!BC)
> +        return false;   // Not a load or store or dbg intrinsic.
> +      Value::use_const_iterator BCUI = BC->use_begin(), BCUE = BC->use_end();
> +      if (BCUI == BCUE)
> +        return false; // Not a dbg intrinsic.
> +      const DbgInfoIntrinsic *DI = dyn_cast(*BCUI);
> +      if (!DI)
> +        return false; // Not a dbg intrinsic.
> +      BCUI++;
> +      if (BCUI != BCUE)
> +        return false; // Not a dbg intrinsic use.
>     }
>
>   return true;
> @@ -275,14 +287,21 @@
>     /// ivars.
>     void AnalyzeAlloca(AllocaInst *AI) {
>       clear();
> -
> +
>       // As we scan the uses of the alloca instruction, keep track of stores,
>       // and decide whether all of the loads and stores to the alloca are within
>       // the same basic block.
>       for (Value::use_iterator U = AI->use_begin(), E = AI->use_end();
>            U != E; ++U) {
>         Instruction *User = cast(*U);
> -        if (StoreInst *SI = dyn_cast(User)) {
> +        if (BitCastInst *BC = dyn_cast(User)) {
> +          // Remove dbg intrinsic uses now.
> +          Value::use_iterator BCUI = BC->use_begin();
> +          DbgInfoIntrinsic *DI = cast(*BCUI);
> +          assert (BCUI + 1 == BC->use_end() && "Unexpected alloca uses!");
> +          DI->eraseFromParent();
> +          BC->eraseFromParent();
> +        } else if (StoreInst *SI = dyn_cast(User)) {
>           // Remember the basic blocks which define new values for the alloca
>           DefiningBlocks.push_back(SI->getParent());
>           AllocaPointerVal = SI->getOperand(0);
>
> Added: llvm/trunk/test/DebugInfo/2008-11-06-Mem2Reg.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/2008-11-06-Mem2Reg.ll?rev=58826&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/DebugInfo/2008-11-06-Mem2Reg.ll (added)
> +++ llvm/trunk/test/DebugInfo/2008-11-06-Mem2Reg.ll Thu Nov  6 19:30:07 2008
> @@ -0,0 +1,56 @@
> +; RUN: llvm-as < %s | opt -mem2reg | llvm-dis | grep alloca | count 1
> +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
> +target triple = "i386-apple-darwin9.5"
> +       %llvm.dbg.anchor.type = type { i32, i32 }
> +       %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
> +       %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8* }
> +       %llvm.dbg.subprogram.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1 }
> +       %llvm.dbg.variable.type = type { i32, { }*, i8*, { }*, i32, { }* }
> + at llvm.dbg.subprogram = internal constant %llvm.dbg.subprogram.type { i32 393262, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 2, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), i1 false, i1 true }, section "llvm.metadata"              ; <%llvm.dbg.subprogram.type*> [#uses=1]
> + at llvm.dbg.subprograms = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 46 }, section "llvm.metadata"                ; <%llvm.dbg.anchor.type*> [#uses=1]
> + at llvm.dbg.compile_unit = internal constant %llvm.dbg.compile_unit.type { i32 393233, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([7 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([55 x i8]* @.str2, i32 0, i32 0) }, section "llvm.metadata"               ; <%llvm.dbg.compile_unit.type*> [#uses=1]
> + at llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 17 }, section "llvm.metadata"              ; <%llvm.dbg.anchor.type*> [#uses=1]
> + at .str = internal constant [7 x i8] c"adce.c\00", section "llvm.metadata"               ; <[7 x i8]*> [#uses=1]
> + at .str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata"               ; <[6 x i8]*> [#uses=1]
> + at .str2 = internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5623) (LLVM build 00)\00", section "llvm.metadata"             ; <[55 x i8]*> [#uses=1]
> + at .str3 = internal constant [4 x i8] c"foo\00", section "llvm.metadata"         ; <[4 x i8]*> [#uses=1]
> + at llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { i32 393252, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str4, i32 0, i32 0), { }* null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata"                ; <%llvm.dbg.basictype.type*> [#uses=1]
> + at .str4 = internal constant [4 x i8] c"int\00", section "llvm.metadata"         ; <[4 x i8]*> [#uses=1]
> + at llvm.dbg.variable = internal constant %llvm.dbg.variable.type { i32 393472, { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*), i8* getelementptr ([2 x i8]* @.str5, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 3, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*) }, section "llvm.metadata"            ; <%llvm.dbg.variable.type*> [#uses=1]
> + at .str5 = internal constant [2 x i8] c"i\00", section "llvm.metadata"           ; <[2 x i8]*> [#uses=1]
> +
> +define i32 @foo() nounwind {
> +entry:
> +       %retval = alloca i32            ;  [#uses=2]
> +       %i = alloca i32         ;  [#uses=4]
> +       %0 = alloca i32         ;  [#uses=2]
> +       %"alloca point" = bitcast i32 0 to i32          ;  [#uses=0]
> +       call void @llvm.dbg.func.start({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
> +       %i1 = bitcast i32* %i to { }*           ; <{ }*> [#uses=1]
> +       call void @llvm.dbg.declare({ }* %i1, { }* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable to { }*))
> +       call void @llvm.dbg.stoppoint(i32 3, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
> +       store i32 4, i32* %i, align 4
> +       call void @llvm.dbg.stoppoint(i32 4, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
> +       %1 = load i32* %i, align 4              ;  [#uses=1]
> +       %2 = mul i32 %1, 84             ;  [#uses=1]
> +       store i32 %2, i32* %i, align 4
> +       call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
> +       store i32 42, i32* %0, align 4
> +       %3 = load i32* %0, align 4              ;  [#uses=1]
> +       store i32 %3, i32* %retval, align 4
> +       br label %return
> +
> +return:                ; preds = %entry
> +       %retval2 = load i32* %retval            ;  [#uses=1]
> +       call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
> +       call void @llvm.dbg.region.end({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
> +       ret i32 %retval2
> +}
> +
> +declare void @llvm.dbg.func.start({ }*) nounwind
> +
> +declare void @llvm.dbg.declare({ }*, { }*) nounwind
> +
> +declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
> +
> +declare void @llvm.dbg.region.end({ }*) nounwind
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>


From evan.cheng at apple.com  Thu Nov  6 19:41:36 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 07 Nov 2008 01:41:36 -0000
Subject: [llvm-commits] [llvm] r58828 - in /llvm/trunk/lib/Target/ARM:
 ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.h ARMInstrInfo.td
Message-ID: <200811070141.mA71faYb019313@zion.cs.uiuc.edu>

Author: evancheng
Date: Thu Nov  6 19:41:35 2008
New Revision: 58828

URL: http://llvm.org/viewvc/llvm-project?rev=58828&view=rev
Log:
Encode misc arithmetic instructions.

Modified:
    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58828&r1=58827&r2=58828&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Thu Nov  6 19:41:35 2008
@@ -100,6 +100,8 @@
 
     void emitExtendInstruction(const MachineInstr &MI);
 
+    void emitMiscArithInstruction(const MachineInstr &MI);
+
     void emitBranchInstruction(const MachineInstr &MI);
 
     void emitMiscBranchInstruction(const MachineInstr &MI);
@@ -287,6 +289,9 @@
   case ARMII::ExtFrm:
     emitExtendInstruction(MI);
     break;
+  case ARMII::ArithMiscFrm:
+    emitMiscArithInstruction(MI);
+    break;
   case ARMII::BrFrm:
     emitBranchInstruction(MI);
     break;
@@ -790,6 +795,44 @@
   emitWordLE(Binary);
 }
 
+void ARMCodeEmitter::emitMiscArithInstruction(const MachineInstr &MI) {
+  const TargetInstrDesc &TID = MI.getDesc();
+
+  // Part of binary is determined by TableGn.
+  unsigned Binary = getBinaryCodeForInstr(MI);
+
+  // Set the conditional execution predicate
+  Binary |= II->getPredicate(&MI) << ARMII::CondShift;
+
+  unsigned OpIdx = 0;
+
+  // Encode Rd
+  Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdShift;
+
+  const MachineOperand &MO = MI.getOperand(OpIdx++);
+  if (OpIdx == TID.getNumOperands() ||
+      TID.OpInfo[OpIdx].isPredicate() ||
+      TID.OpInfo[OpIdx].isOptionalDef()) {
+    // Encode Rm and it's done.
+    Binary |= getMachineOpValue(MI, MO);
+    emitWordLE(Binary);
+    return;
+  }
+
+  // Encode Rn.
+  Binary |= getMachineOpValue(MI, MO) << ARMII::RegRnShift;
+
+  // Encode Rm.
+  Binary |= getMachineOpValue(MI, OpIdx++);
+
+  // Encode shift_imm.
+  unsigned ShiftAmt = MI.getOperand(OpIdx).getImm();
+  assert(ShiftAmt < 32 && "shift_imm range is 0 to 31!");
+  Binary |= ShiftAmt << ARMII::ShiftShift;
+  
+  emitWordLE(Binary);
+}
+
 void ARMCodeEmitter::emitBranchInstruction(const MachineInstr &MI) {
   const TargetInstrDesc &TID = MI.getDesc();
 

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58828&r1=58827&r2=58828&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Thu Nov  6 19:41:35 2008
@@ -689,6 +689,14 @@
   let Inst{27-20} = opcod;
 }
 
+// Misc Arithmetic instructions.
+class AMiscA1I opcod, dag oops, dag iops, string opc,
+               string asm, list pattern>
+  : I {
+  let Inst{27-20} = opcod;
+}
+
 //===----------------------------------------------------------------------===//
 
 // ARMPat - Same as Pat<>, but requires that the compiler be in ARM mode.

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=58828&r1=58827&r2=58828&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Thu Nov  6 19:41:35 2008
@@ -109,6 +109,7 @@
     //===------------------------------------------------------------------===//
     // Field shifts - such shifts are used to set field while generating
     // machine instructions.
+    ShiftShift     = 7,
     SoRotImmShift  = 8,
     RegRsShift     = 8,
     ExtRotImmShift = 10,

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58828&r1=58827&r2=58828&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu Nov  6 19:41:35 2008
@@ -1101,37 +1101,56 @@
 //  Misc. Arithmetic Instructions.
 //
 
-def CLZ  : AI<(outs GPR:$dst), (ins GPR:$src), ArithMiscFrm,
+def CLZ  : AMiscA1I<0b000010110, (outs GPR:$dst), (ins GPR:$src),
               "clz", " $dst, $src",
-              [(set GPR:$dst, (ctlz GPR:$src))]>, Requires<[IsARM, HasV5T]>;
+              [(set GPR:$dst, (ctlz GPR:$src))]>, Requires<[IsARM, HasV5T]> {
+  let Inst{7-4}   = 0b0001;
+  let Inst{11-8}  = 0b1111;
+  let Inst{19-16} = 0b1111;
+}
 
-def REV  : AI<(outs GPR:$dst), (ins GPR:$src), ArithMiscFrm,
+def REV  : AMiscA1I<0b01101011, (outs GPR:$dst), (ins GPR:$src),
               "rev", " $dst, $src",
-              [(set GPR:$dst, (bswap GPR:$src))]>, Requires<[IsARM, HasV6]>;
+              [(set GPR:$dst, (bswap GPR:$src))]>, Requires<[IsARM, HasV6]> {
+  let Inst{7-4}   = 0b0011;
+  let Inst{11-8}  = 0b1111;
+  let Inst{19-16} = 0b1111;
+}
 
-def REV16 : AI<(outs GPR:$dst), (ins GPR:$src), ArithMiscFrm,
+def REV16 : AMiscA1I<0b01101011, (outs GPR:$dst), (ins GPR:$src),
                "rev16", " $dst, $src",
                [(set GPR:$dst,
                    (or (and (srl GPR:$src, 8), 0xFF),
                        (or (and (shl GPR:$src, 8), 0xFF00),
                            (or (and (srl GPR:$src, 8), 0xFF0000),
                                (and (shl GPR:$src, 8), 0xFF000000)))))]>,
-               Requires<[IsARM, HasV6]>;
+               Requires<[IsARM, HasV6]> {
+  let Inst{7-4}   = 0b1011;
+  let Inst{11-8}  = 0b1111;
+  let Inst{19-16} = 0b1111;
+}
 
-def REVSH : AI<(outs GPR:$dst), (ins GPR:$src), ArithMiscFrm,
+def REVSH : AMiscA1I<0b01101111, (outs GPR:$dst), (ins GPR:$src),
                "revsh", " $dst, $src",
                [(set GPR:$dst,
                   (sext_inreg
                     (or (srl (and GPR:$src, 0xFF00), 8),
                         (shl GPR:$src, 8)), i16))]>,
-               Requires<[IsARM, HasV6]>;
+               Requires<[IsARM, HasV6]> {
+  let Inst{7-4}   = 0b1011;
+  let Inst{11-8}  = 0b1111;
+  let Inst{19-16} = 0b1111;
+}
 
-def PKHBT : AI<(outs GPR:$dst), (ins GPR:$src1, GPR:$src2, i32imm:$shamt),
-               ArithMiscFrm, "pkhbt", " $dst, $src1, $src2, LSL $shamt",
+def PKHBT : AMiscA1I<0b01101000, (outs GPR:$dst),
+                                 (ins GPR:$src1, GPR:$src2, i32imm:$shamt),
+               "pkhbt", " $dst, $src1, $src2, LSL $shamt",
                [(set GPR:$dst, (or (and GPR:$src1, 0xFFFF),
                                    (and (shl GPR:$src2, (i32 imm:$shamt)),
                                         0xFFFF0000)))]>,
-               Requires<[IsARM, HasV6]>;
+               Requires<[IsARM, HasV6]> {
+  let Inst{6-4} = 0b001;
+}
 
 // Alternate cases for PKHBT where identities eliminate some nodes.
 def : ARMV6Pat<(or (and GPR:$src1, 0xFFFF), (and GPR:$src2, 0xFFFF0000)),
@@ -1140,11 +1159,14 @@
                (PKHBT GPR:$src1, GPR:$src2, imm16_31:$shamt)>;
 
 
-def PKHTB : AI<(outs GPR:$dst), (ins GPR:$src1, GPR:$src2, i32imm:$shamt),
-               ArithMiscFrm, "pkhtb", " $dst, $src1, $src2, ASR $shamt",
+def PKHTB : AMiscA1I<0b01101000, (outs GPR:$dst),
+                                 (ins GPR:$src1, GPR:$src2, i32imm:$shamt),
+               "pkhtb", " $dst, $src1, $src2, ASR $shamt",
                [(set GPR:$dst, (or (and GPR:$src1, 0xFFFF0000),
                                    (and (sra GPR:$src2, imm16_31:$shamt),
-                                        0xFFFF)))]>, Requires<[IsARM, HasV6]>;
+                                        0xFFFF)))]>, Requires<[IsARM, HasV6]> {
+  let Inst{6-4} = 0b101;
+}
 
 // Alternate cases for PKHTB where identities eliminate some nodes.  Note that
 // a shift amount of 0 is *not legal* here, it is PKHBT instead.




From tonic at nondot.org  Thu Nov  6 19:46:05 2008
From: tonic at nondot.org (Tanya Lattner)
Date: Thu, 6 Nov 2008 19:46:05 -0600
Subject: [llvm-commits] CVS: llvm-www/www-index.html
Message-ID: <200811070146.mA71k58J019517@zion.cs.uiuc.edu>



Changes in directory llvm-www:

www-index.html updated: 1.165 -> 1.166
---
Log message:

Update release date.


---
Diffs of the changes:  (+1 -1)

 www-index.html |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm-www/www-index.html
diff -u llvm-www/www-index.html:1.165 llvm-www/www-index.html:1.166
--- llvm-www/www-index.html:1.165	Fri Oct 31 15:47:32 2008
+++ llvm-www/www-index.html	Thu Nov  6 19:44:54 2008
@@ -112,7 +112,7 @@
 
  6. Oct 19, 2008: Pre-release testing ends. 
    7. 
 
  7. Oct 31, 2008: Second round of pre-release testing begins.
    8. 
 
  8. Nov  5, 2008: Pre-release testing ends.
    9. 
-
  9. Nov  6, 2008: 2.4 Released.
    10. 
+
  10. Nov  9, 2008: 2.4 Released.
    11. 
 
 
 





From isanbard at gmail.com  Thu Nov  6 19:48:58 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Fri, 07 Nov 2008 01:48:58 -0000
Subject: [llvm-commits] [llvm] r58829 -
	/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
Message-ID: <200811070148.mA71mxwn019616@zion.cs.uiuc.edu>

Author: void
Date: Thu Nov  6 19:48:58 2008
New Revision: 58829

URL: http://llvm.org/viewvc/llvm-project?rev=58829&view=rev
Log:
Refactor code that adjusts the offsets of stack objects.

Modified:
    llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp

Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=58829&r1=58828&r2=58829&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original)
+++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Thu Nov  6 19:48:58 2008
@@ -306,6 +306,32 @@
     }
 }
 
+/// AdjustStackOffset - Helper function used to adjust the stack frame offset.
+static inline void
+AdjustStackOffset(MachineFrameInfo *FFI, int FrameIdx,
+                  bool StackGrowsDown, int64_t &Offset,
+                  unsigned &MaxAlign) {
+  // If stack grows down, we need to add size of find the lowest address of the
+  // object.
+  if (StackGrowsDown)
+    Offset += FFI->getObjectSize(FrameIdx);
+
+  unsigned Align = FFI->getObjectAlignment(FrameIdx);
+
+  // If the alignment of this object is greater than that of the stack, then
+  // increase the stack alignment to match.
+  MaxAlign = std::max(MaxAlign, Align);
+
+  // Adjust to alignment boundary.
+  Offset = (Offset + Align - 1) / Align * Align;
+
+  if (StackGrowsDown) {
+    FFI->setObjectOffset(FrameIdx, -Offset); // Set the computed offset
+  } else {
+    FFI->setObjectOffset(FrameIdx, Offset);
+    Offset += FFI->getObjectSize(FrameIdx);
+  }
+}
 
 /// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the
 /// abstract stack objects.
@@ -387,51 +413,15 @@
   const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
   if (RS && RegInfo->hasFP(Fn)) {
     int SFI = RS->getScavengingFrameIndex();
-    if (SFI >= 0) {
-      // If stack grows down, we need to add size of the lowest
-      // address of the object.
-      if (StackGrowsDown)
-        Offset += FFI->getObjectSize(SFI);
-
-      unsigned Align = FFI->getObjectAlignment(SFI);
-      // Adjust to alignment boundary
-      Offset = (Offset+Align-1)/Align*Align;
-
-      if (StackGrowsDown) {
-        FFI->setObjectOffset(SFI, -Offset);        // Set the computed offset
-      } else {
-        FFI->setObjectOffset(SFI, Offset);
-        Offset += FFI->getObjectSize(SFI);
-      }
-    }
+    if (SFI >= 0)
+      AdjustStackOffset(FFI, SFI, StackGrowsDown, Offset, MaxAlign);
   }
 
   // Make sure that the stack protector comes before the local variables on the
   // stack.
-  if (FFI->getStackProtectorIndex() >= 0) {
-    int FI = FFI->getStackProtectorIndex();
-
-    // If stack grows down, we need to add size of find the lowest
-    // address of the object.
-    if (StackGrowsDown)
-      Offset += FFI->getObjectSize(FI);
-
-    unsigned Align = FFI->getObjectAlignment(FI);
-
-    // If the alignment of this object is greater than that of the stack, then
-    // increase the stack alignment to match.
-    MaxAlign = std::max(MaxAlign, Align);
-
-    // Adjust to alignment boundary.
-    Offset = (Offset + Align - 1) / Align * Align;
-
-    if (StackGrowsDown) {
-      FFI->setObjectOffset(FI, -Offset); // Set the computed offset
-    } else {
-      FFI->setObjectOffset(FI, Offset);
-      Offset += FFI->getObjectSize(FI);
-    }
-  }
+  if (FFI->getStackProtectorIndex() >= 0)
+    AdjustStackOffset(FFI, FFI->getStackProtectorIndex(), StackGrowsDown,
+                      Offset, MaxAlign);
 
   // Then assign frame offsets to stack objects that are not used to spill
   // callee saved registers.
@@ -445,50 +435,15 @@
     if (FFI->getStackProtectorIndex() == (int)i)
       continue;
 
-    // If stack grows down, we need to add size of find the lowest
-    // address of the object.
-    if (StackGrowsDown)
-      Offset += FFI->getObjectSize(i);
-
-    unsigned Align = FFI->getObjectAlignment(i);
-    // If the alignment of this object is greater than that of the stack, then
-    // increase the stack alignment to match.
-    MaxAlign = std::max(MaxAlign, Align);
-    // Adjust to alignment boundary
-    Offset = (Offset+Align-1)/Align*Align;
-
-    if (StackGrowsDown) {
-      FFI->setObjectOffset(i, -Offset);        // Set the computed offset
-    } else {
-      FFI->setObjectOffset(i, Offset);
-      Offset += FFI->getObjectSize(i);
-    }
+    AdjustStackOffset(FFI, i, StackGrowsDown, Offset, MaxAlign);
   }
 
   // Make sure the special register scavenging spill slot is closest to the
   // stack pointer.
   if (RS && !RegInfo->hasFP(Fn)) {
     int SFI = RS->getScavengingFrameIndex();
-    if (SFI >= 0) {
-      // If stack grows down, we need to add size of find the lowest
-      // address of the object.
-      if (StackGrowsDown)
-        Offset += FFI->getObjectSize(SFI);
-
-      unsigned Align = FFI->getObjectAlignment(SFI);
-      // If the alignment of this object is greater than that of the
-      // stack, then increase the stack alignment to match.
-      MaxAlign = std::max(MaxAlign, Align);
-      // Adjust to alignment boundary
-      Offset = (Offset+Align-1)/Align*Align;
-
-      if (StackGrowsDown) {
-        FFI->setObjectOffset(SFI, -Offset);        // Set the computed offset
-      } else {
-        FFI->setObjectOffset(SFI, Offset);
-        Offset += FFI->getObjectSize(SFI);
-      }
-    }
+    if (SFI >= 0)
+      AdjustStackOffset(FFI, SFI, StackGrowsDown, Offset, MaxAlign);
   }
 
   // Round up the size to a multiple of the alignment, but only if there are




From wangmp at apple.com  Thu Nov  6 19:49:40 2008
From: wangmp at apple.com (Mon Ping Wang)
Date: Thu, 6 Nov 2008 17:49:40 -0800
Subject: [llvm-commits] Patch: vector shuffle for generalized vector shuffle
In-Reply-To: <79D867D7-9AA7-4B9A-AF4C-CD7DC36C1B1C@apple.com>
References: <7C812DE7-E002-4767-A0AE-192738C25237@apple.com>
	<200811051825.21127.duncan.sands@math.u-psud.fr>
	<3F809D20-B3C9-4A91-A907-788673A90809@apple.com>
	<200811052142.15627.duncan.sands@math.u-psud.fr>
	<79D867D7-9AA7-4B9A-AF4C-CD7DC36C1B1C@apple.com>
Message-ID: <726CDE41-CC30-4D97-99D5-4F3E8BB08AA9@apple.com>

Hi,

As discussed, I'm going to first submit the non vector shuffle part of  
the generalized vector shuffle patch first and then the following  
patch for splitting the vector shuffle.   I also included the  
SplitVecRes_VECTOR_SHUFFLE as a separate attachment (splitvec_routine)  
as I found it easy to read than the diff on the function.  This patch  
still assumes that incoming vectors may not be a power of 2.  We can  
do some cleanup after I'm done moving widening into LegalizeTypes  
(which should be soon).  After widening is in, we can assume that all  
incoming vectors to the split routines are always a power of 2.

Thanks,
-- Mon Ping
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From evan.cheng at apple.com  Thu Nov  6 19:50:16 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 6 Nov 2008 17:50:16 -0800
Subject: [llvm-commits] [llvm] r58825 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
In-Reply-To: <200811070128.mA71S2HU018770@zion.cs.uiuc.edu>
References: <200811070128.mA71S2HU018770@zion.cs.uiuc.edu>
Message-ID: 


On Nov 6, 2008, at 5:28 PM, Dale Johannesen wrote:

> Author: johannes
> Date: Thu Nov  6 19:28:02 2008
> New Revision: 58825
>
> URL: http://llvm.org/viewvc/llvm-project?rev=58825&view=rev
> Log:
> When we're doing a compare of load-AND-constant to 0
> (e.g. a bitfield test) narrow the load as much as possible.
> The has the potential to avoid unnecessary partial-word
> load-after-store conflicts, which cause stalls on several targets.
> Also a size win on x86 (testb vs testl).

This can a loss if the load is narrowed to i16 though. Assuming we  
have the checks in place, this is probably ok. But I still wonder if  
this is the approach we ought to take. Perhaps we need to attack all  
of the load-after-store issues?

Evan

>
>
>
> Modified:
>    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=58825&r1=58824&r2=58825&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Thu Nov   
> 6 19:28:02 2008
> @@ -1352,6 +1352,52 @@
>                               Zero, Cond);
>         }
>       }
> +
> +      // If the LHS is '(and load, const)', the RHS is 0,
> +      // the test is for equality or unsigned, and all 1 bits of  
> the const are
> +      // in the same partial word, see if we can shorten the load.
> +      if (DCI.isBeforeLegalize() &&
> +          N0.getOpcode() == ISD::AND && C1 == 0 &&
> +          isa(N0.getOperand(0)) &&
> +          N0.getOperand(0).getNode()->hasOneUse() &&
> +          isa(N0.getOperand(1))) {
> +        LoadSDNode *Lod = cast(N0.getOperand(0));
> +        uint64_t Mask = cast(N0.getOperand(1))- 
> >getZExtValue();
> +        unsigned bestWidth = 0, bestOffset = 0;
> +        if (!Lod->isVolatile()) {
> +          unsigned origWidth = N0.getValueType().getSizeInBits();
> +          for (unsigned width = origWidth / 2; width>=8; width /=  
> 2) {
> +            uint64_t newMask = (1ULL << width) - 1;
> +            for (unsigned offset=0; offset +) {
> +              if ((newMask & Mask)==Mask) {
> +                bestOffset = (uint64_t)offset * (width/8);
> +                bestWidth = width;
> +                break;
> +              }
> +              newMask = newMask << width;
> +            }
> +          }
> +        }
> +        if (bestWidth) {
> +          MVT newVT = MVT::getIntegerVT(bestWidth);
> +          if (newVT.isRound()) {
> +            uint64_t bestMask = Mask >> (bestOffset * 8);
> +            MVT PtrType = Lod->getOperand(1).getValueType();
> +            SDValue Ptr = Lod->getBasePtr();
> +            if (bestOffset != 0)
> +              Ptr = DAG.getNode(ISD::ADD, PtrType, Lod->getBasePtr(),
> +                                DAG.getConstant(bestOffset,  
> PtrType));
> +            unsigned NewAlign = MinAlign(Lod->getAlignment(),  
> bestOffset);
> +            SDValue NewLoad = DAG.getLoad(newVT, Lod->getChain(),  
> Ptr,
> +                                          Lod->getSrcValue(),
> +                                          Lod->getSrcValueOffset()  
> + bestOffset,
> +                                          false, NewAlign);
> +            return DAG.getSetCC(VT, DAG.getNode(ISD::AND, newVT,  
> NewLoad,
> +                                             
> DAG.getConstant(bestMask, newVT)),
> +                                    DAG.getConstant(0LL, newVT),  
> Cond);
> +          }
> +        }
> +      }
>
>       // If the LHS is a ZERO_EXTEND, perform the comparison on the  
> input.
>       if (N0.getOpcode() == ISD::ZERO_EXTEND) {
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From dalej at apple.com  Thu Nov  6 19:53:03 2008
From: dalej at apple.com (Dale Johannesen)
Date: Thu, 6 Nov 2008 17:53:03 -0800
Subject: [llvm-commits] [llvm] r58825 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
In-Reply-To: 
References: <200811070128.mA71S2HU018770@zion.cs.uiuc.edu>
	
Message-ID: 


On Nov 6, 2008, at 5:50 PMPST, Evan Cheng wrote:

>
> On Nov 6, 2008, at 5:28 PM, Dale Johannesen wrote:
>
>> Author: johannes
>> Date: Thu Nov  6 19:28:02 2008
>> New Revision: 58825
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=58825&view=rev
>> Log:
>> When we're doing a compare of load-AND-constant to 0
>> (e.g. a bitfield test) narrow the load as much as possible.
>> The has the potential to avoid unnecessary partial-word
>> load-after-store conflicts, which cause stalls on several targets.
>> Also a size win on x86 (testb vs testl).
>
> This can a loss if the load is narrowed to i16 though.

Why?  testw is OK.

> Assuming we
> have the checks in place, this is probably ok. But I still wonder if
> this is the approach we ought to take. Perhaps we need to attack all
> of the load-after-store issues?

What did you have in mind?
Let's see how this one works.

> Evan
>
>>
>>
>>
>> Modified:
>>   llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
>>
>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=58825&r1=58824&r2=58825&view=diff
>>
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =====================================================================
>> --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Thu Nov
>> 6 19:28:02 2008
>> @@ -1352,6 +1352,52 @@
>>                              Zero, Cond);
>>        }
>>      }
>> +
>> +      // If the LHS is '(and load, const)', the RHS is 0,
>> +      // the test is for equality or unsigned, and all 1 bits of
>> the const are
>> +      // in the same partial word, see if we can shorten the load.
>> +      if (DCI.isBeforeLegalize() &&
>> +          N0.getOpcode() == ISD::AND && C1 == 0 &&
>> +          isa(N0.getOperand(0)) &&
>> +          N0.getOperand(0).getNode()->hasOneUse() &&
>> +          isa(N0.getOperand(1))) {
>> +        LoadSDNode *Lod = cast(N0.getOperand(0));
>> +        uint64_t Mask = cast(N0.getOperand(1))-
>>> getZExtValue();
>> +        unsigned bestWidth = 0, bestOffset = 0;
>> +        if (!Lod->isVolatile()) {
>> +          unsigned origWidth = N0.getValueType().getSizeInBits();
>> +          for (unsigned width = origWidth / 2; width>=8; width /=
>> 2) {
>> +            uint64_t newMask = (1ULL << width) - 1;
>> +            for (unsigned offset=0; offset> +) {
>> +              if ((newMask & Mask)==Mask) {
>> +                bestOffset = (uint64_t)offset * (width/8);
>> +                bestWidth = width;
>> +                break;
>> +              }
>> +              newMask = newMask << width;
>> +            }
>> +          }
>> +        }
>> +        if (bestWidth) {
>> +          MVT newVT = MVT::getIntegerVT(bestWidth);
>> +          if (newVT.isRound()) {
>> +            uint64_t bestMask = Mask >> (bestOffset * 8);
>> +            MVT PtrType = Lod->getOperand(1).getValueType();
>> +            SDValue Ptr = Lod->getBasePtr();
>> +            if (bestOffset != 0)
>> +              Ptr = DAG.getNode(ISD::ADD, PtrType, Lod- 
>> >getBasePtr(),
>> +                                DAG.getConstant(bestOffset,
>> PtrType));
>> +            unsigned NewAlign = MinAlign(Lod->getAlignment(),
>> bestOffset);
>> +            SDValue NewLoad = DAG.getLoad(newVT, Lod->getChain(),
>> Ptr,
>> +                                          Lod->getSrcValue(),
>> +                                          Lod->getSrcValueOffset()
>> + bestOffset,
>> +                                          false, NewAlign);
>> +            return DAG.getSetCC(VT, DAG.getNode(ISD::AND, newVT,
>> NewLoad,
>> +
>> DAG.getConstant(bestMask, newVT)),
>> +                                    DAG.getConstant(0LL, newVT),
>> Cond);
>> +          }
>> +        }
>> +      }
>>
>>      // If the LHS is a ZERO_EXTEND, perform the comparison on the
>> input.
>>      if (N0.getOpcode() == ISD::ZERO_EXTEND) {
>>
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From isanbard at gmail.com  Thu Nov  6 19:58:56 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 6 Nov 2008 17:58:56 -0800
Subject: [llvm-commits] [llvm] r58826 - in /llvm/trunk:
	lib/Transforms/Utils/PromoteMemoryToRegister.cpp
	test/DebugInfo/2008-11-06-Mem2Reg.ll
In-Reply-To: <4aca3dc20811061741ha0b35ccg745fe51cd1c5a6d9@mail.gmail.com>
References: <200811070130.mA71U7m9018913@zion.cs.uiuc.edu>
	<4aca3dc20811061741ha0b35ccg745fe51cd1c5a6d9@mail.gmail.com>
Message-ID: <16e5fdf90811061758i59c678f8n90fdfa7b9144574e@mail.gmail.com>

I have a patch ready. Testing now.

-bw

On Thu, Nov 6, 2008 at 5:41 PM, Daniel Berlin  wrote:
> This breaks build.
> PromoteMemoryToRegister.cpp:301: error: no match for 'operator+' in 'BCUI + 1'
>
>
> On Thu, Nov 6, 2008 at 8:30 PM, Devang Patel  wrote:
>> Author: dpatel
>> Date: Thu Nov  6 19:30:07 2008
>> New Revision: 58826
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=58826&view=rev
>> Log:
>> Handle (delete) dbg intrinsics while promoting alloca.
>>
>> Added:
>>    llvm/trunk/test/DebugInfo/2008-11-06-Mem2Reg.ll
>> Modified:
>>    llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
>>
>> Modified: llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp?rev=58826&r1=58825&r2=58826&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp (original)
>> +++ llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp Thu Nov  6 19:30:07 2008
>> @@ -22,6 +22,7 @@
>>  #include "llvm/DerivedTypes.h"
>>  #include "llvm/Function.h"
>>  #include "llvm/Instructions.h"
>> +#include "llvm/IntrinsicInst.h"
>>  #include "llvm/Analysis/Dominators.h"
>>  #include "llvm/Analysis/AliasSetTracker.h"
>>  #include "llvm/ADT/DenseMap.h"
>> @@ -79,7 +80,18 @@
>>       if (SI->isVolatile())
>>         return false;
>>     } else {
>> -      return false;   // Not a load or store.
>> +      const BitCastInst *BC = dyn_cast(*UI);
>> +      if (!BC)
>> +        return false;   // Not a load or store or dbg intrinsic.
>> +      Value::use_const_iterator BCUI = BC->use_begin(), BCUE = BC->use_end();
>> +      if (BCUI == BCUE)
>> +        return false; // Not a dbg intrinsic.
>> +      const DbgInfoIntrinsic *DI = dyn_cast(*BCUI);
>> +      if (!DI)
>> +        return false; // Not a dbg intrinsic.
>> +      BCUI++;
>> +      if (BCUI != BCUE)
>> +        return false; // Not a dbg intrinsic use.
>>     }
>>
>>   return true;
>> @@ -275,14 +287,21 @@
>>     /// ivars.
>>     void AnalyzeAlloca(AllocaInst *AI) {
>>       clear();
>> -
>> +
>>       // As we scan the uses of the alloca instruction, keep track of stores,
>>       // and decide whether all of the loads and stores to the alloca are within
>>       // the same basic block.
>>       for (Value::use_iterator U = AI->use_begin(), E = AI->use_end();
>>            U != E; ++U) {
>>         Instruction *User = cast(*U);
>> -        if (StoreInst *SI = dyn_cast(User)) {
>> +        if (BitCastInst *BC = dyn_cast(User)) {
>> +          // Remove dbg intrinsic uses now.
>> +          Value::use_iterator BCUI = BC->use_begin();
>> +          DbgInfoIntrinsic *DI = cast(*BCUI);
>> +          assert (BCUI + 1 == BC->use_end() && "Unexpected alloca uses!");
>> +          DI->eraseFromParent();
>> +          BC->eraseFromParent();
>> +        } else if (StoreInst *SI = dyn_cast(User)) {
>>           // Remember the basic blocks which define new values for the alloca
>>           DefiningBlocks.push_back(SI->getParent());
>>           AllocaPointerVal = SI->getOperand(0);
>>
>> Added: llvm/trunk/test/DebugInfo/2008-11-06-Mem2Reg.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/2008-11-06-Mem2Reg.ll?rev=58826&view=auto
>>
>> ==============================================================================
>> --- llvm/trunk/test/DebugInfo/2008-11-06-Mem2Reg.ll (added)
>> +++ llvm/trunk/test/DebugInfo/2008-11-06-Mem2Reg.ll Thu Nov  6 19:30:07 2008
>> @@ -0,0 +1,56 @@
>> +; RUN: llvm-as < %s | opt -mem2reg | llvm-dis | grep alloca | count 1
>> +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
>> +target triple = "i386-apple-darwin9.5"
>> +       %llvm.dbg.anchor.type = type { i32, i32 }
>> +       %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
>> +       %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8* }
>> +       %llvm.dbg.subprogram.type = type { i32, { }*, { }*, i8*, i8*, i8*, { }*, i32, { }*, i1, i1 }
>> +       %llvm.dbg.variable.type = type { i32, { }*, i8*, { }*, i32, { }* }
>> + at llvm.dbg.subprogram = internal constant %llvm.dbg.subprogram.type { i32 393262, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to { }*), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), i8* null, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 2, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*), i1 false, i1 true }, section "llvm.metadata"              ; <%llvm.dbg.subprogram.type*> [#uses=1]
>> + at llvm.dbg.subprograms = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 46 }, section "llvm.metadata"                ; <%llvm.dbg.anchor.type*> [#uses=1]
>> + at llvm.dbg.compile_unit = internal constant %llvm.dbg.compile_unit.type { i32 393233, { }* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to { }*), i32 1, i8* getelementptr ([7 x i8]* @.str, i32 0, i32 0), i8* getelementptr ([6 x i8]* @.str1, i32 0, i32 0), i8* getelementptr ([55 x i8]* @.str2, i32 0, i32 0) }, section "llvm.metadata"               ; <%llvm.dbg.compile_unit.type*> [#uses=1]
>> + at llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 393216, i32 17 }, section "llvm.metadata"              ; <%llvm.dbg.anchor.type*> [#uses=1]
>> + at .str = internal constant [7 x i8] c"adce.c\00", section "llvm.metadata"               ; <[7 x i8]*> [#uses=1]
>> + at .str1 = internal constant [6 x i8] c"/tmp/\00", section "llvm.metadata"               ; <[6 x i8]*> [#uses=1]
>> + at .str2 = internal constant [55 x i8] c"4.2.1 (Based on Apple Inc. build 5623) (LLVM build 00)\00", section "llvm.metadata"             ; <[55 x i8]*> [#uses=1]
>> + at .str3 = internal constant [4 x i8] c"foo\00", section "llvm.metadata"         ; <[4 x i8]*> [#uses=1]
>> + at llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { i32 393252, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str4, i32 0, i32 0), { }* null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata"                ; <%llvm.dbg.basictype.type*> [#uses=1]
>> + at .str4 = internal constant [4 x i8] c"int\00", section "llvm.metadata"         ; <[4 x i8]*> [#uses=1]
>> + at llvm.dbg.variable = internal constant %llvm.dbg.variable.type { i32 393472, { }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*), i8* getelementptr ([2 x i8]* @.str5, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 3, { }* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to { }*) }, section "llvm.metadata"            ; <%llvm.dbg.variable.type*> [#uses=1]
>> + at .str5 = internal constant [2 x i8] c"i\00", section "llvm.metadata"           ; <[2 x i8]*> [#uses=1]
>> +
>> +define i32 @foo() nounwind {
>> +entry:
>> +       %retval = alloca i32            ;  [#uses=2]
>> +       %i = alloca i32         ;  [#uses=4]
>> +       %0 = alloca i32         ;  [#uses=2]
>> +       %"alloca point" = bitcast i32 0 to i32          ;  [#uses=0]
>> +       call void @llvm.dbg.func.start({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
>> +       %i1 = bitcast i32* %i to { }*           ; <{ }*> [#uses=1]
>> +       call void @llvm.dbg.declare({ }* %i1, { }* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable to { }*))
>> +       call void @llvm.dbg.stoppoint(i32 3, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
>> +       store i32 4, i32* %i, align 4
>> +       call void @llvm.dbg.stoppoint(i32 4, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
>> +       %1 = load i32* %i, align 4              ;  [#uses=1]
>> +       %2 = mul i32 %1, 84             ;  [#uses=1]
>> +       store i32 %2, i32* %i, align 4
>> +       call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
>> +       store i32 42, i32* %0, align 4
>> +       %3 = load i32* %0, align 4              ;  [#uses=1]
>> +       store i32 %3, i32* %retval, align 4
>> +       br label %return
>> +
>> +return:                ; preds = %entry
>> +       %retval2 = load i32* %retval            ;  [#uses=1]
>> +       call void @llvm.dbg.stoppoint(i32 5, i32 0, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*))
>> +       call void @llvm.dbg.region.end({ }* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram to { }*))
>> +       ret i32 %retval2
>> +}
>> +
>> +declare void @llvm.dbg.func.start({ }*) nounwind
>> +
>> +declare void @llvm.dbg.declare({ }*, { }*) nounwind
>> +
>> +declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
>> +
>> +declare void @llvm.dbg.region.end({ }*) nounwind
>>
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>


From isanbard at gmail.com  Thu Nov  6 19:59:41 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Fri, 07 Nov 2008 01:59:41 -0000
Subject: [llvm-commits] [llvm] r58830 -
	/llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
Message-ID: <200811070159.mA71xfvH019928@zion.cs.uiuc.edu>

Author: void
Date: Thu Nov  6 19:59:41 2008
New Revision: 58830

URL: http://llvm.org/viewvc/llvm-project?rev=58830&view=rev
Log:
BCUI + 1 doesn't work. Use next instead.

Modified:
    llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp

Modified: llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp?rev=58830&r1=58829&r2=58830&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/PromoteMemoryToRegister.cpp Thu Nov  6 19:59:41 2008
@@ -30,6 +30,7 @@
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/StringExtras.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/CFG.h"
 #include "llvm/Support/Compiler.h"
 #include 
@@ -298,7 +299,7 @@
           // Remove dbg intrinsic uses now.
           Value::use_iterator BCUI = BC->use_begin();
           DbgInfoIntrinsic *DI = cast(*BCUI);
-          assert (BCUI + 1 == BC->use_end() && "Unexpected alloca uses!");
+          assert (next(BCUI) == BC->use_end() && "Unexpected alloca uses!");
           DI->eraseFromParent();
           BC->eraseFromParent();
         } else if (StoreInst *SI = dyn_cast(User)) {




From evan.cheng at apple.com  Thu Nov  6 20:07:17 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 6 Nov 2008 18:07:17 -0800
Subject: [llvm-commits] [llvm] r58825 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
In-Reply-To: 
References: <200811070128.mA71S2HU018770@zion.cs.uiuc.edu>
	
	
Message-ID: 


On Nov 6, 2008, at 5:53 PM, Dale Johannesen wrote:

>
> On Nov 6, 2008, at 5:50 PMPST, Evan Cheng wrote:
>
>>
>> On Nov 6, 2008, at 5:28 PM, Dale Johannesen wrote:
>>
>>> Author: johannes
>>> Date: Thu Nov  6 19:28:02 2008
>>> New Revision: 58825
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=58825&view=rev
>>> Log:
>>> When we're doing a compare of load-AND-constant to 0
>>> (e.g. a bitfield test) narrow the load as much as possible.
>>> The has the potential to avoid unnecessary partial-word
>>> load-after-store conflicts, which cause stalls on several targets.
>>> Also a size win on x86 (testb vs testl).
>>
>> This can a loss if the load is narrowed to i16 though.
>
> Why?  testw is OK.

16-bit instructions are larger because of the 0x66 prefix.

>
>
>> Assuming we
>> have the checks in place, this is probably ok. But I still wonder if
>> this is the approach we ought to take. Perhaps we need to attack all
>> of the load-after-store issues?
>
> What did you have in mind?
> Let's see how this one works.

Perhaps a pass (or at least a more generic approach to look for load- 
after-store hazards). Just thinking out loud at this point. Perhaps  
someone will come up with a better idea.

Evan

>
>
>> Evan
>>
>>>
>>>
>>>
>>> Modified:
>>>  llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
>>>
>>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=58825&r1=58824&r2=58825&view=diff
>>>
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> = 
>>> ====================================================================
>>> --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp  
>>> (original)
>>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Thu Nov
>>> 6 19:28:02 2008
>>> @@ -1352,6 +1352,52 @@
>>>                             Zero, Cond);
>>>       }
>>>     }
>>> +
>>> +      // If the LHS is '(and load, const)', the RHS is 0,
>>> +      // the test is for equality or unsigned, and all 1 bits of
>>> the const are
>>> +      // in the same partial word, see if we can shorten the load.
>>> +      if (DCI.isBeforeLegalize() &&
>>> +          N0.getOpcode() == ISD::AND && C1 == 0 &&
>>> +          isa(N0.getOperand(0)) &&
>>> +          N0.getOperand(0).getNode()->hasOneUse() &&
>>> +          isa(N0.getOperand(1))) {
>>> +        LoadSDNode *Lod = cast(N0.getOperand(0));
>>> +        uint64_t Mask = cast(N0.getOperand(1))-
>>>> getZExtValue();
>>> +        unsigned bestWidth = 0, bestOffset = 0;
>>> +        if (!Lod->isVolatile()) {
>>> +          unsigned origWidth = N0.getValueType().getSizeInBits();
>>> +          for (unsigned width = origWidth / 2; width>=8; width /=
>>> 2) {
>>> +            uint64_t newMask = (1ULL << width) - 1;
>>> +            for (unsigned offset=0; offset>> +) {
>>> +              if ((newMask & Mask)==Mask) {
>>> +                bestOffset = (uint64_t)offset * (width/8);
>>> +                bestWidth = width;
>>> +                break;
>>> +              }
>>> +              newMask = newMask << width;
>>> +            }
>>> +          }
>>> +        }
>>> +        if (bestWidth) {
>>> +          MVT newVT = MVT::getIntegerVT(bestWidth);
>>> +          if (newVT.isRound()) {
>>> +            uint64_t bestMask = Mask >> (bestOffset * 8);
>>> +            MVT PtrType = Lod->getOperand(1).getValueType();
>>> +            SDValue Ptr = Lod->getBasePtr();
>>> +            if (bestOffset != 0)
>>> +              Ptr = DAG.getNode(ISD::ADD, PtrType, Lod-
>>>> getBasePtr(),
>>> +                                DAG.getConstant(bestOffset,
>>> PtrType));
>>> +            unsigned NewAlign = MinAlign(Lod->getAlignment(),
>>> bestOffset);
>>> +            SDValue NewLoad = DAG.getLoad(newVT, Lod->getChain(),
>>> Ptr,
>>> +                                          Lod->getSrcValue(),
>>> +                                          Lod->getSrcValueOffset()
>>> + bestOffset,
>>> +                                          false, NewAlign);
>>> +            return DAG.getSetCC(VT, DAG.getNode(ISD::AND, newVT,
>>> NewLoad,
>>> +
>>> DAG.getConstant(bestMask, newVT)),
>>> +                                    DAG.getConstant(0LL, newVT),
>>> Cond);
>>> +          }
>>> +        }
>>> +      }
>>>
>>>     // If the LHS is a ZERO_EXTEND, perform the comparison on the
>>> input.
>>>     if (N0.getOpcode() == ISD::ZERO_EXTEND) {
>>>
>>>
>>> _______________________________________________
>>> llvm-commits mailing list
>>> llvm-commits at cs.uiuc.edu
>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From scottm at aero.org  Thu Nov  6 22:36:26 2008
From: scottm at aero.org (Scott Michel)
Date: Fri, 07 Nov 2008 04:36:26 -0000
Subject: [llvm-commits] [llvm] r58832 - in /llvm/trunk/lib/Target/CellSPU:
 SPUTargetAsmInfo.cpp SPUTargetAsmInfo.h SPUTargetMachine.cpp
Message-ID: <200811070436.mA74aRls024623@zion.cs.uiuc.edu>

Author: pingbak
Date: Thu Nov  6 22:36:25 2008
New Revision: 58832

URL: http://llvm.org/viewvc/llvm-project?rev=58832&view=rev
Log:
Teach CellSPU about ELF sections and new section emitter classes.

NB: This is likely to need more work.

Modified:
    llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp
    llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.h
    llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp

Modified: llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp?rev=58832&r1=58831&r2=58832&view=diff

==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp Thu Nov  6 22:36:25 2008
@@ -14,38 +14,28 @@
 #include "SPUTargetAsmInfo.h"
 #include "SPUTargetMachine.h"
 #include "llvm/Function.h"
+#include "llvm/Support/Compiler.h"
+
 using namespace llvm;
 
-SPUTargetAsmInfo::SPUTargetAsmInfo(const SPUTargetMachine &TM)
-  : TargetAsmInfo(TM) {
+SPULinuxTargetAsmInfo::SPULinuxTargetAsmInfo(const SPUTargetMachine &TM) :
+    SPUTargetAsmInfo(TM) {
   PCSymbol = ".";
   CommentString = "#";
   GlobalPrefix = "";
   PrivateGlobalPrefix = ".L";
-  ZeroDirective = "\t.space\t";
-  SetDirective = "\t.set";
-  Data64bitsDirective = "\t.quad\t";  
-  AlignmentIsInBytes = false;
-  SwitchToSectionDirective = ".section\t";
-  ConstantPoolSection = "\t.const\t";
-  JumpTableDataSection = ".const";
-  CStringSection = "\t.cstring";
-  StaticCtorsSection = ".mod_init_func";
-  StaticDtorsSection = ".mod_term_func";
-  InlineAsmStart = "# InlineAsm Start";
-  InlineAsmEnd = "# InlineAsm End";
-  
-  NeedsSet = true;
-  /* FIXME: Need actual assembler syntax for DWARF info: */
-  DwarfAbbrevSection = ".section __DWARF,__debug_abbrev,regular,debug";
-  DwarfInfoSection = ".section __DWARF,__debug_info,regular,debug";
-  DwarfLineSection = ".section __DWARF,__debug_line,regular,debug";
-  DwarfFrameSection = ".section __DWARF,__debug_frame,regular,debug";
-  DwarfPubNamesSection = ".section __DWARF,__debug_pubnames,regular,debug";
-  DwarfPubTypesSection = ".section __DWARF,__debug_pubtypes,regular,debug";
-  DwarfStrSection = ".section __DWARF,__debug_str,regular,debug";
-  DwarfLocSection = ".section __DWARF,__debug_loc,regular,debug";
-  DwarfARangesSection = ".section __DWARF,__debug_aranges,regular,debug";
-  DwarfRangesSection = ".section __DWARF,__debug_ranges,regular,debug";
-  DwarfMacInfoSection = ".section __DWARF,__debug_macinfo,regular,debug";
 }
+
+/// PreferredEHDataFormat - This hook allows the target to select data
+/// format used for encoding pointers in exception handling data. Reason is
+/// 0 for data, 1 for code labels, 2 for function pointers. Global is true
+/// if the symbol can be relocated.
+unsigned
+SPULinuxTargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason,
+                                             bool Global) const {
+  // We really need to write something here.
+  return TargetAsmInfo::PreferredEHDataFormat(Reason, Global);
+}
+
+// Instantiate default implementation.
+TEMPLATE_INSTANTIATION(class SPUTargetAsmInfo);

Modified: llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.h?rev=58832&r1=58831&r2=58832&view=diff

==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.h (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.h Thu Nov  6 22:36:25 2008
@@ -11,20 +11,41 @@
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef PPCTARGETASMINFO_H
-#define PPCTARGETASMINFO_H
+#ifndef SPUTARGETASMINFO_H
+#define SPUTARGETASMINFO_H
 
 #include "llvm/Target/TargetAsmInfo.h"
+#include "llvm/Target/ELFTargetAsmInfo.h"
+#include "SPUTargetMachine.h"
+#include "SPUSubtarget.h"
 
 namespace llvm {
 
   // Forward declaration.
   class SPUTargetMachine;
-
-  struct SPUTargetAsmInfo : public TargetAsmInfo {
-    SPUTargetAsmInfo(const SPUTargetMachine &TM);
+  
+  template 
+  struct SPUTargetAsmInfo : public BaseTAI {
+    explicit SPUTargetAsmInfo(const SPUTargetMachine &TM):
+      BaseTAI(TM) {
+      /* (unused today)
+       * const SPUSubtarget *Subtarget = &TM.getSubtarget(); */
+
+      BaseTAI::ZeroDirective = "\t.space\t";
+      BaseTAI::SetDirective = "\t.set";
+      BaseTAI::Data64bitsDirective = "\t.quad\t";
+      BaseTAI::AlignmentIsInBytes = false;
+      BaseTAI::LCOMMDirective = "\t.lcomm\t";
+      BaseTAI::InlineAsmStart = "# InlineAsm Start";
+      BaseTAI::InlineAsmEnd = "# InlineAsm End";
+    }
+  };
+  
+  struct SPULinuxTargetAsmInfo : public SPUTargetAsmInfo {
+    explicit SPULinuxTargetAsmInfo(const SPUTargetMachine &TM);
+    virtual unsigned PreferredEHDataFormat(DwarfEncoding::Target Reason,
+                                           bool Global) const;
   };
-
 } // namespace llvm
 
-#endif
+#endif /* SPUTARGETASMINFO_H */

Modified: llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp?rev=58832&r1=58831&r2=58832&view=diff

==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp Thu Nov  6 22:36:25 2008
@@ -36,7 +36,7 @@
 const TargetAsmInfo *
 SPUTargetMachine::createTargetAsmInfo() const
 {
-  return new SPUTargetAsmInfo(*this);
+  return new SPULinuxTargetAsmInfo(*this);
 }
 
 unsigned




From anton at korobeynikov.info  Fri Nov  7 02:05:31 2008
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Fri, 7 Nov 2008 11:05:31 +0300
Subject: [llvm-commits] [llvm] r58832 - in
	/llvm/trunk/lib/Target/CellSPU: SPUTargetAsmInfo.cpp
	SPUTargetAsmInfo.h SPUTargetMachine.cpp
In-Reply-To: <200811070436.mA74aRls024623@zion.cs.uiuc.edu>
References: <200811070436.mA74aRls024623@zion.cs.uiuc.edu>
Message-ID: 

Hi Scott,

> +  template 
> +  struct SPUTargetAsmInfo : public BaseTAI {
The main reason for this trick was that we had common code in X86/PPC
TAI which can be aplied to all subtargets (handling of inline asm
mostly). And at the same time we had to 'use' more or less
arch-independent {Darwin,ELF}TargetAsmInfo. Is it the same situation
for SPU? If not - you can just do normal subclassing, since this
approach leads to fatter code.

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University


From evan.cheng at apple.com  Fri Nov  7 03:01:15 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 07 Nov 2008 09:01:15 -0000
Subject: [llvm-commits] [llvm] r58834 -
	/llvm/trunk/include/llvm/CodeGen/MachineRelocation.h
Message-ID: <200811070901.mA791FEe007196@zion.cs.uiuc.edu>

Author: evancheng
Date: Fri Nov  7 03:01:15 2008
New Revision: 58834

URL: http://llvm.org/viewvc/llvm-project?rev=58834&view=rev
Log:
Jump table relocation addresses may be resolved by target.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineRelocation.h

Modified: llvm/trunk/include/llvm/CodeGen/MachineRelocation.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineRelocation.h?rev=58834&r1=58833&r2=58834&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineRelocation.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineRelocation.h Fri Nov  7 03:01:15 2008
@@ -175,7 +175,8 @@
   /// table entry.
   ///
   static MachineRelocation getJumpTable(intptr_t offset,unsigned RelocationType,
-                                        unsigned JTI, intptr_t cst = 0) {
+                                        unsigned JTI, intptr_t cst = 0,
+                                        bool letTargetResolve = false) {
     assert((RelocationType & ~63) == 0 && "Relocation type too large!");
     MachineRelocation Result;
     Result.Offset = offset;
@@ -184,7 +185,7 @@
     Result.AddrType = isJumpTable;
     Result.NeedStub = false;
     Result.GOTRelative = false;
-    Result.TargetResolve = false;
+    Result.TargetResolve = letTargetResolve;
     Result.Target.Index = JTI;
     return Result;
   }




From evan.cheng at apple.com  Fri Nov  7 03:02:17 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 07 Nov 2008 09:02:17 -0000
Subject: [llvm-commits] [llvm] r58835 - in /llvm/trunk:
 include/llvm/Target/TargetJITInfo.h lib/ExecutionEngine/JIT/JITEmitter.cpp
Message-ID: <200811070902.mA792HRd007942@zion.cs.uiuc.edu>

Author: evancheng
Date: Fri Nov  7 03:02:17 2008
New Revision: 58835

URL: http://llvm.org/viewvc/llvm-project?rev=58835&view=rev
Log:
Jump tables may be emitted by target.

Modified:
    llvm/trunk/include/llvm/Target/TargetJITInfo.h
    llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp

Modified: llvm/trunk/include/llvm/Target/TargetJITInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetJITInfo.h?rev=58835&r1=58834&r2=58835&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetJITInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetJITInfo.h Fri Nov  7 03:02:17 2008
@@ -112,6 +112,10 @@
     /// pool address resolution is handled by the target.
     virtual bool hasCustomConstantPool() const { return false; }
 
+    /// hasCustomJumpTables - Allows a target to specify that jumptables
+    /// are emitted by the target.
+    virtual bool hasCustomJumpTables() const { return false; }
+
     /// allocateSeparateGVMemory - If true, globals should be placed in
     /// separately allocated heap memory rather than in the same
     /// code memory allocated by MachineCodeEmitter.

Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp?rev=58835&r1=58834&r2=58835&view=diff

==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Fri Nov  7 03:02:17 2008
@@ -35,9 +35,9 @@
 #include "llvm/System/Disassembler.h"
 #include "llvm/System/Memory.h"
 #include "llvm/Target/TargetInstrInfo.h"
+#include "llvm/ADT/SmallPtrSet.h"
 #include "llvm/ADT/Statistic.h"
 #include 
-#include 
 #ifndef NDEBUG
 #include 
 #endif
@@ -485,7 +485,7 @@
     MachineModuleInfo* MMI;
 
     // GVSet - a set to keep track of which globals have been seen
-    std::set GVSet;
+    SmallPtrSet GVSet;
 
   public:
     JITEmitter(JIT &jit, JITMemoryManager *JMM) : Resolver(jit) {
@@ -728,7 +728,7 @@
 
   if (C->getType()->getTypeID() == Type::PointerTyID)
     if (const GlobalVariable* GV = dyn_cast(C))
-      if (GVSet.insert(GV).second)
+      if (GVSet.insert(GV))
         Size = addSizeOfGlobal(GV, Size);
 
   return Size;
@@ -780,7 +780,7 @@
           // assuming the addresses of the new globals in this module
           // start at 0 (or something) and adjusting them after codegen
           // complete.  Another possibility is to grab a marker bit in GV.
-          if (GVSet.insert(GV).second)
+          if (GVSet.insert(GV))
             // A variable as yet unseen.  Add in its size.
             Size = addSizeOfGlobal(GV, Size);
         }
@@ -790,7 +790,7 @@
   DOUT << "JIT: About to look through initializers\n";
   // Look for more globals that are referenced only from initializers.
   // GVSet.end is computed each time because the set can grow as we go.
-  for (std::set::iterator I = GVSet.begin(); 
+  for (SmallPtrSet::iterator I = GVSet.begin(); 
        I != GVSet.end(); I++) {
     const GlobalVariable* GV = *I;
     if (GV->hasInitializer())
@@ -1022,11 +1022,9 @@
 }
 
 void JITEmitter::emitConstantPool(MachineConstantPool *MCP) {
-  if (TheJIT->getJITInfo().hasCustomConstantPool()) {
-    DOUT << "JIT: Target has custom constant pool handling. Omitting standard "
-            "constant pool\n";
+  if (TheJIT->getJITInfo().hasCustomConstantPool())
     return;
-  }
+
   const std::vector &Constants = MCP->getConstants();
   if (Constants.empty()) return;
 
@@ -1060,6 +1058,9 @@
 }
 
 void JITEmitter::initJumpTableInfo(MachineJumpTableInfo *MJTI) {
+  if (TheJIT->getJITInfo().hasCustomJumpTables())
+    return;
+
   const std::vector &JT = MJTI->getJumpTables();
   if (JT.empty()) return;
   
@@ -1077,6 +1078,9 @@
 }
 
 void JITEmitter::emitJumpTableInfo(MachineJumpTableInfo *MJTI) {
+  if (TheJIT->getJITInfo().hasCustomJumpTables())
+    return;
+
   const std::vector &JT = MJTI->getJumpTables();
   if (JT.empty() || JumpTableBase == 0) return;
   




From evan.cheng at apple.com  Fri Nov  7 03:06:08 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 07 Nov 2008 09:06:08 -0000
Subject: [llvm-commits] [llvm] r58836 - in /llvm/trunk/lib/Target/ARM:
 ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.td ARMJITInfo.cpp
 ARMJITInfo.h ARMRelocations.h
Message-ID: <200811070906.mA7968kK009599@zion.cs.uiuc.edu>

Author: evancheng
Date: Fri Nov  7 03:06:08 2008
New Revision: 58836

URL: http://llvm.org/viewvc/llvm-project?rev=58836&view=rev
Log:
Jump table JIT support. Work in progress.

Modified:
    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp
    llvm/trunk/lib/Target/ARM/ARMJITInfo.h
    llvm/trunk/lib/Target/ARM/ARMRelocations.h

Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=58836&r1=58835&r2=58836&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Fri Nov  7 03:06:08 2008
@@ -28,10 +28,14 @@
 #include "llvm/CodeGen/MachineConstantPool.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineJumpTableInfo.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/Debug.h"
+#ifndef NDEBUG
+#include 
+#endif
 using namespace llvm;
 
 STATISTIC(NumEmitted, "Number of machine instructions emitted");
@@ -44,16 +48,20 @@
     TargetMachine             &TM;
     MachineCodeEmitter        &MCE;
     const std::vector *MCPEs;
-    
+    const std::vector *MJTEs;
+    bool IsPIC;
+
   public:
     static char ID;
     explicit ARMCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce)
       : MachineFunctionPass(&ID), JTI(0), II(0), TD(0), TM(tm),
-      MCE(mce), MCPEs(0) {}
+      MCE(mce), MCPEs(0), MJTEs(0),
+      IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
     ARMCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce,
             const ARMInstrInfo &ii, const TargetData &td)
       : MachineFunctionPass(&ID), JTI(0), II(&ii), TD(&td), TM(tm),
-      MCE(mce), MCPEs(0) {}
+      MCE(mce), MCPEs(0), MJTEs(0),
+      IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
 
     bool runOnMachineFunction(MachineFunction &MF);
 
@@ -71,6 +79,8 @@
 
     void emitMOVi2piecesInstruction(const MachineInstr &MI);
 
+    void emitLEApcrelJTInstruction(const MachineInstr &MI);
+
     void addPCLabel(unsigned LabelID);
 
     void emitPseudoInstruction(const MachineInstr &MI);
@@ -89,6 +99,7 @@
                                        unsigned ImplicitRn = 0);
 
     void emitLoadStoreInstruction(const MachineInstr &MI,
+                                  unsigned ImplicitRd = 0,
                                   unsigned ImplicitRn = 0);
 
     void emitMiscLoadStoreInstruction(const MachineInstr &MI,
@@ -104,6 +115,8 @@
 
     void emitBranchInstruction(const MachineInstr &MI);
 
+    void emitInlineJumpTable(unsigned JTIndex, intptr_t JTBase);
+
     void emitMiscBranchInstruction(const MachineInstr &MI);
 
     /// getBinaryCodeForInstr - This function, generated by the
@@ -133,7 +146,7 @@
     void emitJumpTableAddress(unsigned JTIndex, unsigned Reloc,
                               unsigned PCAdj = 0);
     void emitGlobalConstant(const Constant *CV);
-    void emitMachineBasicBlock(MachineBasicBlock *BB);
+    void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc);
   };
   char ARMCodeEmitter::ID = 0;
 }
@@ -153,7 +166,9 @@
   TD = ((ARMTargetMachine&)MF.getTarget()).getTargetData();
   JTI = ((ARMTargetMachine&)MF.getTarget()).getJITInfo();
   MCPEs = &MF.getConstantPool()->getConstants();
-  JTI->Initialize(MCPEs);
+  MJTEs = &MF.getJumpTableInfo()->getJumpTables();
+  IsPIC = TM.getRelocationModel() == Reloc::PIC_;
+  JTI->Initialize(MF);
 
   do {
     DOUT << "JITTing function '" << MF.getFunction()->getName() << "'\n";
@@ -201,7 +216,7 @@
   else if (MO.isJTI())
     emitJumpTableAddress(MO.getIndex(), ARM::reloc_arm_relative);
   else if (MO.isMBB())
-    emitMachineBasicBlock(MO.getMBB());
+    emitMachineBasicBlock(MO.getMBB(), ARM::reloc_arm_branch);
   else {
     cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
     abort();
@@ -242,17 +257,21 @@
 void ARMCodeEmitter::emitJumpTableAddress(unsigned JTIndex, unsigned Reloc,
                                           unsigned PCAdj /* = 0 */) {
   MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
-                                                    Reloc, JTIndex, PCAdj));
+                                                  Reloc, JTIndex, PCAdj, true));
 }
 
 /// emitMachineBasicBlock - Emit the specified address basic block.
-void ARMCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB) {
+void ARMCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB,
+                                           unsigned Reloc) {
   MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
-                                             ARM::reloc_arm_branch, BB));
+                                             Reloc, BB));
 }
 
 void ARMCodeEmitter::emitWordLE(unsigned Binary) {
-  DOUT << "  " << (void*)Binary << "\n";
+#ifndef NDEBUG
+  DOUT << "  0x" << std::hex << std::setw(8) << std::setfill('0')
+       << Binary << std::dec << "\n";
+#endif
   MCE.emitWordLE(Binary);
 }
 
@@ -389,6 +408,34 @@
   emitWordLE(Binary);
 }
 
+void ARMCodeEmitter::emitLEApcrelJTInstruction(const MachineInstr &MI) {
+  // It's basically add r, pc, (LJTI - $+8)
+  
+  const TargetInstrDesc &TID = MI.getDesc();
+
+  // Emit the 'add' instruction.
+  unsigned Binary = 0x4 << 21;  // add: Insts{24-31} = 0b0100
+
+  // Set the conditional execution predicate
+  Binary |= II->getPredicate(&MI) << ARMII::CondShift;
+
+  // Encode S bit if MI modifies CPSR.
+  Binary |= getAddrModeSBit(MI, TID);
+
+  // Encode Rd.
+  Binary |= getMachineOpValue(MI, 0) << ARMII::RegRdShift;
+
+  // Encode Rn which is PC.
+  Binary |= ARMRegisterInfo::getRegisterNumbering(ARM::PC) << ARMII::RegRnShift;
+
+  // Encode the displacement.
+  // Set bit I(25) to identify this is the immediate form of .
+  Binary |= 1 << ARMII::I_BitShift;
+  emitJumpTableAddress(MI.getOperand(1).getIndex(), ARM::reloc_arm_jt_base);
+
+  emitWordLE(Binary);
+}
+
 void ARMCodeEmitter::addPCLabel(unsigned LabelID) {
   DOUT << "  ** LPC" << LabelID << " @ "
        << (void*)MCE.getCurrentPCValue() << '\n';
@@ -417,7 +464,7 @@
     // Remember of the address of the PC label for relocation later.
     addPCLabel(MI.getOperand(2).getImm());
     // These are just load / store instructions that implicitly read pc.
-    emitLoadStoreInstruction(MI, ARM::PC);
+    emitLoadStoreInstruction(MI, 0, ARM::PC);
     break;
   }
   case ARM::PICLDRH:
@@ -434,6 +481,10 @@
     // Two instructions to materialize a constant.
     emitMOVi2piecesInstruction(MI);
     break;
+  case ARM::LEApcrelJT:
+    // Materialize jumptable address.
+    emitLEApcrelJTInstruction(MI);
+    break;
   }
 }
 
@@ -569,7 +620,7 @@
   }
 
   // Encode so_imm.
-  // Set bit I(25) to identify this is the immediate form of 
+  // Set bit I(25) to identify this is the immediate form of .
   Binary |= 1 << ARMII::I_BitShift;
   Binary |= getMachineSoImmOpValue(MO.getImm());
 
@@ -577,6 +628,7 @@
 }
 
 void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI,
+                                              unsigned ImplicitRd,
                                               unsigned ImplicitRn) {
   // Part of binary is determined by TableGn.
   unsigned Binary = getBinaryCodeForInstr(MI);
@@ -585,18 +637,21 @@
   Binary |= II->getPredicate(&MI) << ARMII::CondShift;
 
   // Set first operand
-  Binary |= getMachineOpValue(MI, 0) << ARMII::RegRdShift;
+  unsigned OpIdx = 0;
+  if (ImplicitRd)
+    // Special handling for implicit use (e.g. PC).
+    Binary |= (ARMRegisterInfo::getRegisterNumbering(ImplicitRd)
+               << ARMII::RegRdShift);
+  else
+    Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdShift;
 
   // Set second operand
-  unsigned OpIdx = 1;
   if (ImplicitRn)
     // Special handling for implicit use (e.g. PC).
     Binary |= (ARMRegisterInfo::getRegisterNumbering(ImplicitRn)
                << ARMII::RegRnShift);
-  else {
-    Binary |= getMachineOpValue(MI, OpIdx) << ARMII::RegRnShift;
-    ++OpIdx;
-  }
+  else
+    Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRnShift;
 
   const MachineOperand &MO2 = MI.getOperand(OpIdx);
   unsigned AM2Opc = (ImplicitRn == ARM::PC)
@@ -646,10 +701,8 @@
     // Special handling for implicit use (e.g. PC).
     Binary |= (ARMRegisterInfo::getRegisterNumbering(ImplicitRn)
                << ARMII::RegRnShift);
-  else {
-    Binary |= getMachineOpValue(MI, OpIdx) << ARMII::RegRnShift;
-    ++OpIdx;
-  }
+  else
+    Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRnShift;
 
   const MachineOperand &MO2 = MI.getOperand(OpIdx);
   unsigned AM3Opc = (ImplicitRn == ARM::PC)
@@ -851,14 +904,40 @@
   emitWordLE(Binary);
 }
 
+void ARMCodeEmitter::emitInlineJumpTable(unsigned JTIndex, intptr_t JTBase) {
+  // Remember the base address of the inline jump table.
+  JTI->addJumpTableBaseAddr(JTIndex, MCE.getCurrentPCValue());
+
+  // Now emit the jump table entries.
+  const std::vector &MBBs = (*MJTEs)[JTIndex].MBBs;
+  for (unsigned i = 0, e = MBBs.size(); i != e; ++i) {
+    if (IsPIC)
+      // DestBB address - JT base.
+      MCE.addRelocation(MachineRelocation::getBB(JTBase, ARM::reloc_arm_pic_jt,
+                                                 MBBs[i]));
+    else
+      // Absolute DestBB address.
+      emitMachineBasicBlock(MBBs[i], ARM::reloc_arm_absolute);
+    emitWordLE(0);
+  }
+}
+
 void ARMCodeEmitter::emitMiscBranchInstruction(const MachineInstr &MI) {
   const TargetInstrDesc &TID = MI.getDesc();
   if (TID.Opcode == ARM::BX ||
       TID.Opcode == ARM::BR_JTr ||
-      TID.Opcode == ARM::BR_JTm ||
       TID.Opcode == ARM::BR_JTadd)
     abort(); // FIXME
 
+  if (TID.Opcode == ARM::BR_JTm) {
+    // First emit a ldr pc, [] instruction.
+    emitLoadStoreInstruction(MI, ARM::PC);
+
+    // Then emit the inline jump table.
+    emitInlineJumpTable(MI.getOperand(3).getIndex(), MCE.getCurrentPCOffset());
+    return;
+  }
+
   // Part of binary is determined by TableGn.
   unsigned Binary = getBinaryCodeForInstr(MI);
 

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=58836&r1=58835&r2=58836&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Fri Nov  7 03:06:08 2008
@@ -151,33 +151,9 @@
        "", pattern>;
 
 // BR_JT instructions
-// == mov pc
-class JTI opcod, dag oops, dag iops, string asm, list pattern>
+class JTI pattern>
   : XI {
-  let Inst{20}    = 0; // S Bit
-  let Inst{24-21} = opcod;
-  let Inst{27-26} = {0,0};
-}
-// == add pc
-class JTI1 opcod, dag oops, dag iops, string asm, list pattern>
-  : XI {
-  let Inst{20}    = 0; // S bit
-  let Inst{24-21} = opcod;
-  let Inst{27-26} = {0,0};
-}
-// == ldr pc
-class JTI2 opcod, dag oops, dag iops, string asm, list pattern>
-  : XI {
-  let Inst{20}    = 1; // L bit
-  let Inst{21}    = 0; // W bit
-  let Inst{22}    = 0; // B bit
-  let Inst{24}    = 1; // P bit
-  let Inst{27-26} = {0,1};
-}
-
+       asm, "", pattern>;
 
 // addrmode1 instructions
 class AI1 opcod, dag oops, dag iops, Format f, string opc,

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=58836&r1=58835&r2=58836&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Fri Nov  7 03:06:08 2008
@@ -572,23 +572,35 @@
                 [(br bb:$target)]>;
 
   let isNotDuplicable = 1, isIndirectBranch = 1 in {
-  def BR_JTr : JTI<0b1101, (outs),
-                           (ins GPR:$target, jtblock_operand:$jt, i32imm:$id),
+  def BR_JTr : JTI<(outs), (ins GPR:$target, jtblock_operand:$jt, i32imm:$id),
                     "mov pc, $target \n$jt",
-                    [(ARMbrjt GPR:$target, tjumptable:$jt, imm:$id)]>;
-  def BR_JTm : JTI2<0, (outs),
-                       (ins addrmode2:$target, jtblock_operand:$jt, i32imm:$id),
-                     "ldr pc, $target \n$jt",
-                     [(ARMbrjt (i32 (load addrmode2:$target)), tjumptable:$jt,
-                       imm:$id)]>;
-  def BR_JTadd : JTI1<0b0100, (outs),
-                              (ins GPR:$target, GPR:$idx, jtblock_operand:$jt,
-                      i32imm:$id),
-                      "add pc, $target, $idx \n$jt",
-                      [(ARMbrjt (add GPR:$target, GPR:$idx), tjumptable:$jt,
-                        imm:$id)]>;
+                    [(ARMbrjt GPR:$target, tjumptable:$jt, imm:$id)]> {
+    let Inst{20}    = 0; // S Bit
+    let Inst{24-21} = 0b1101;
+    let Inst{27-26} = {0,0};
   }
+  def BR_JTm : JTI<(outs),
+                   (ins addrmode2:$target, jtblock_operand:$jt, i32imm:$id),
+                   "ldr pc, $target \n$jt",
+                  [(ARMbrjt (i32 (load addrmode2:$target)), tjumptable:$jt,
+                    imm:$id)]> {
+    let Inst{20}    = 1; // L bit
+    let Inst{21}    = 0; // W bit
+    let Inst{22}    = 0; // B bit
+    let Inst{24}    = 1; // P bit
+    let Inst{27-26} = {0,1};
   }
+  def BR_JTadd : JTI<(outs),
+                   (ins GPR:$target, GPR:$idx, jtblock_operand:$jt, i32imm:$id),
+                     "add pc, $target, $idx \n$jt",
+                    [(ARMbrjt (add GPR:$target, GPR:$idx), tjumptable:$jt,
+                      imm:$id)]> {
+    let Inst{20}    = 0; // S bit
+    let Inst{24-21} = 0b0100;
+    let Inst{27-26} = {0,0};
+  }
+  } // isNotDuplicable = 1, isIndirectBranch = 1
+  } // isBarrier = 1
 
   // FIXME: should be able to write a pattern for ARMBrcond, but can't use
   // a two-value operand where a dag node expects two operands. :( 

Modified: llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp?rev=58836&r1=58835&r2=58836&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMJITInfo.cpp Fri Nov  7 03:06:08 2008
@@ -168,9 +168,11 @@
   return MCE.finishFunctionStub(F);
 }
 
-intptr_t ARMJITInfo::resolveRelocationAddr(MachineRelocation *MR) const {
+intptr_t ARMJITInfo::resolveRelocDestAddr(MachineRelocation *MR) const {
   ARM::RelocationType RT = (ARM::RelocationType)MR->getRelocationType();
-  if (RT == ARM::reloc_arm_cp_entry)
+  if (RT == ARM::reloc_arm_jt_base)
+    return getJumpTableBaseAddr(MR->getJumpTableIndex());
+  else if (RT == ARM::reloc_arm_cp_entry)
     return getConstantPoolEntryAddr(MR->getConstantPoolIndex());
   else if (RT == ARM::reloc_arm_machine_cp_entry) {
     const MachineConstantPoolEntry &MCPE = (*MCPEs)[MR->getConstantVal()];
@@ -196,7 +198,7 @@
     void *RelocPos = (char*)Function + MR->getMachineCodeOffset();
     // If this is a constpool relocation, get the address of the
     // constpool_entry instruction.
-    intptr_t ResultPtr = resolveRelocationAddr(MR);
+    intptr_t ResultPtr = resolveRelocDestAddr(MR);
     switch ((ARM::RelocationType)MR->getRelocationType()) {
     case ARM::reloc_arm_cp_entry:
     case ARM::reloc_arm_relative: {
@@ -221,7 +223,7 @@
     case ARM::reloc_arm_machine_cp_entry:
     case ARM::reloc_arm_absolute: {
       // These addresses have already been resolved.
-      *((unsigned*)RelocPos) += (unsigned)ResultPtr;
+      *((unsigned*)RelocPos) |= (unsigned)ResultPtr;
       break;
     }
     case ARM::reloc_arm_branch: {
@@ -230,12 +232,24 @@
       // byte offset, which must be inside the range -33554432 and +33554428.
       // Then, we set the signed_immed_24 field of the instruction to bits
       // [25:2] of the byte offset. More details ARM-ARM p. A4-11.
-      ResultPtr = ResultPtr-(intptr_t)RelocPos-8;
+      ResultPtr = ResultPtr - (intptr_t)RelocPos - 8;
       ResultPtr = (ResultPtr & 0x03FFFFFC) >> 2;
       assert(ResultPtr >= -33554432 && ResultPtr <= 33554428);
       *((unsigned*)RelocPos) |= ResultPtr;
       break;
     }
+    case ARM::reloc_arm_jt_base: {
+      // JT base - (instruction addr + 8)
+      ResultPtr = ResultPtr - (intptr_t)RelocPos - 8;
+      *((unsigned*)RelocPos) |= ResultPtr;
+      break;
+    }
+    case ARM::reloc_arm_pic_jt: {
+      // PIC JT entry is destination - JT base.
+      ResultPtr = ResultPtr - (intptr_t)RelocPos;
+      *((unsigned*)RelocPos) |= ResultPtr;
+      break;
+    }
     }
   }
 }

Modified: llvm/trunk/lib/Target/ARM/ARMJITInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMJITInfo.h?rev=58836&r1=58835&r2=58836&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMJITInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMJITInfo.h Fri Nov  7 03:06:08 2008
@@ -16,6 +16,8 @@
 
 #include "llvm/Target/TargetJITInfo.h"
 #include "llvm/CodeGen/MachineConstantPool.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineJumpTableInfo.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/SmallVector.h"
 
@@ -31,7 +33,11 @@
 
     // ConstPoolId2AddrMap - A map from constant pool ids to the corresponding
     // CONSTPOOL_ENTRY addresses.
-    SmallVector ConstPoolId2AddrMap;
+    SmallVector ConstPoolId2AddrMap;
+
+    // JumpTableId2AddrMap - A map from inline jumptable ids to the
+    // corresponding inline jump table bases.
+    SmallVector JumpTableId2AddrMap;
 
     // PCLabelMap - A map from PC labels to addresses.
     DenseMap PCLabelMap;
@@ -65,6 +71,10 @@
     /// pool address resolution is handled by the target.
     virtual bool hasCustomConstantPool() const { return true; }
 
+    /// hasCustomJumpTables - Allows a target to specify that jumptables
+    /// are emitted by the target.
+    virtual bool hasCustomJumpTables() const { return true; }
+
     /// allocateSeparateGVMemory - If true, globals should be placed in
     /// separately allocated heap memory rather than in the same
     /// code memory allocated by MachineCodeEmitter.
@@ -78,20 +88,21 @@
 
     /// Initialize - Initialize internal stage. Get the list of constant pool
     /// Resize constant pool ids to CONSTPOOL_ENTRY addresses map.
-    void Initialize(const std::vector *mcpes) {
-      MCPEs = mcpes;
+    void Initialize(const MachineFunction &MF) {
+      MCPEs = &MF.getConstantPool()->getConstants();
       ConstPoolId2AddrMap.resize(MCPEs->size());
+      JumpTableId2AddrMap.resize(MF.getJumpTableInfo()->getJumpTables().size());
     }
 
     /// getConstantPoolEntryAddr - The ARM target puts all constant
-    /// pool entries into constant islands. Resolve the constant pool index
-    /// into the address where the constant is stored.
+    /// pool entries into constant islands. This returns the address of the
+    /// constant pool entry of the specified index.
     intptr_t getConstantPoolEntryAddr(unsigned CPI) const {
       assert(CPI < ConstPoolId2AddrMap.size());
       return ConstPoolId2AddrMap[CPI];
     }
 
-    /// addConstantPoolEntryAddr - Map a Constant Pool Index (CPI) to the address
+    /// addConstantPoolEntryAddr - Map a Constant Pool Index to the address
     /// where its associated value is stored. When relocations are processed,
     /// this value will be used to resolve references to the constant.
     void addConstantPoolEntryAddr(unsigned CPI, intptr_t Addr) {
@@ -99,6 +110,23 @@
       ConstPoolId2AddrMap[CPI] = Addr;
     }
 
+    /// getJumpTableBaseAddr - The ARM target inline all jump tables within
+    /// text section of the function. This returns the address of the base of
+    /// the jump table of the specified index.
+    intptr_t getJumpTableBaseAddr(unsigned JTI) const {
+      assert(JTI < JumpTableId2AddrMap.size());
+      return JumpTableId2AddrMap[JTI];
+    }
+
+    /// addJumpTableBaseAddr - Map a jump table index to the address where
+    /// the corresponding inline jump table is emitted. When relocations are
+    /// processed, this value will be used to resolve references to the
+    /// jump table.
+    void addJumpTableBaseAddr(unsigned JTI, intptr_t Addr) {
+      assert(JTI < JumpTableId2AddrMap.size());
+      JumpTableId2AddrMap[JTI] = Addr;
+    }
+
     /// getPCLabelAddr - Retrieve the address of the PC label of the specified id.
     intptr_t getPCLabelAddr(unsigned Id) const {
       DenseMap::const_iterator I = PCLabelMap.find(Id);
@@ -112,10 +140,10 @@
     }
 
   private:
-    /// resolveRelocationAddr - Resolve the resulting address of the relocation
+    /// resolveRelocDestAddr - Resolve the resulting address of the relocation
     /// if it's not already solved. Constantpool entries must be resolved by
     /// ARM target.
-    intptr_t resolveRelocationAddr(MachineRelocation *MR) const;
+    intptr_t resolveRelocDestAddr(MachineRelocation *MR) const;
   };
 }
 

Modified: llvm/trunk/lib/Target/ARM/ARMRelocations.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRelocations.h?rev=58836&r1=58835&r2=58836&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMRelocations.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMRelocations.h Fri Nov  7 03:06:08 2008
@@ -35,6 +35,13 @@
       // entry.
       reloc_arm_machine_cp_entry,
 
+      // reloc_arm_jt_base - PC relative relocation for jump tables whose
+      // addresses are kept locally in a map.
+      reloc_arm_jt_base,
+
+      // reloc_arm_pic_jt - PIC jump table entry relocation: dest bb - jt base.
+      reloc_arm_pic_jt,
+
       // reloc_arm_branch - Branch address relocation.
       reloc_arm_branch
     };




From anton at korobeynikov.info  Fri Nov  7 03:18:45 2008
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Fri, 7 Nov 2008 12:18:45 +0300
Subject: [llvm-commits] [llvm] r58826 - in /llvm/trunk:
	lib/Transforms/Utils/PromoteMemoryToRegister.cpp
	test/DebugInfo/2008-11-06-Mem2Reg.ll
In-Reply-To: <200811070130.mA71U7m9018913@zion.cs.uiuc.edu>
References: <200811070130.mA71U7m9018913@zion.cs.uiuc.edu>
Message-ID: 

Hi, Davang

> Handle (delete) dbg intrinsics while promoting alloca.
According to buildbot: http://google1.osuosl.org:8011/waterfall the
test is failed on x86-64

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University


From anton at korobeynikov.info  Fri Nov  7 03:20:53 2008
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Fri, 7 Nov 2008 12:20:53 +0300
Subject: [llvm-commits] [llvm] r58826 - in /llvm/trunk:
	lib/Transforms/Utils/PromoteMemoryToRegister.cpp
	test/DebugInfo/2008-11-06-Mem2Reg.ll
In-Reply-To: 
References: <200811070130.mA71U7m9018913@zion.cs.uiuc.edu>
	
Message-ID: 

> According to buildbot: http://google1.osuosl.org:8011/waterfall the
> test is failed on x86-64
Update: opt crashes:

FAIL: /home/buildbot/buildslave/llvm-x86_64/build/test/DebugInfo/2008-11-06-Mem2Reg.ll
Failed with exit(1) at line 1
while running:  llvm-as <
/home/buildbot/buildslave/llvm-x86_64/build/test/DebugInfo/2008-11-06-Mem2Reg.ll
|  opt -mem2reg |  llvm-dis | /bin/grep alloca | count 1
count: expected 1 lines and got 0.
opt[0x9ed053]
opt[0x9ed174]
/lib/libc.so.6[0x2ba6ade44060]
opt(_ZNK4llvm3Use7getUserEv+0x21)[0x99e9db]
opt(_ZNK4llvm18value_use_iteratorINS_4UserEEdeEv+0x3d)[0x6bfca5]
opt[0x854f2a]
opt[0x8554af]
opt(_ZN4llvm15PromoteMemToRegERKSt6vectorIPNS_10AllocaInstESaIS2_EERNS_13DominatorTreeERNS_17DominanceFrontierEPNS_15AliasSetTrackerE+0x6e)[0x85616c]
opt[0x8521e1]
opt(_ZN4llvm13FPPassManager13runOnFunctionERNS_8FunctionE+0xef)[0x97e289]
opt(_ZN4llvm13FPPassManager11runOnModuleERNS_6ModuleE+0x52)[0x97e3ec]
opt(_ZN4llvm13MPPassManager11runOnModuleERNS_6ModuleE+0xbd)[0x97d385]
opt(_ZN4llvm15PassManagerImpl3runERNS_6ModuleE+0x74)[0x97ecb8]
opt(_ZN4llvm11PassManager3runERNS_6ModuleE+0x21)[0x97ed1b]
opt(main+0xfa8)[0x6cdac0]
/lib/libc.so.6(__libc_start_main+0xe6)[0x2ba6ade2f466]
opt[0x6be409]
llvm-dis: Invalid bitcode signature

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University


From richard at xmos.com  Fri Nov  7 04:56:30 2008
From: richard at xmos.com (Richard Osborne)
Date: Fri, 07 Nov 2008 10:56:30 +0000
Subject: [llvm-commits] [Patch] XCoreBackend, part 4
In-Reply-To: 
References: <4911C44F.3090707@xmos.com>
	
Message-ID: <49141EDE.5070005@xmos.com>

Anton Korobeynikov wrote:
> Hi, Richard
>
>   
>> This patch adds the TargetAsmInfo and AsmPrinter classes for the XCore
>> backend.
>>     
> These look ok for me, except that you don't need to use None in stuff
> like "SectionFlags::None | SectionFlags::Small", however it can be
> considered better for readability.
>   
Thanks for the feedback. I've made the changes you suggest and will commit.

-- 
Richard Osborne | XMOS
http://www.xmos.com




From richard at xmos.com  Fri Nov  7 04:59:01 2008
From: richard at xmos.com (Richard Osborne)
Date: Fri, 07 Nov 2008 10:59:01 -0000
Subject: [llvm-commits] [llvm] r58838 - in /llvm/trunk: ./ autoconf/
	lib/Target/XCore/
Message-ID: <200811071059.mA7Ax2Wk013798@zion.cs.uiuc.edu>

Author: friedgold
Date: Fri Nov  7 04:59:00 2008
New Revision: 58838

URL: http://llvm.org/viewvc/llvm-project?rev=58838&view=rev
Log:
Add XCore backend.

Added:
    llvm/trunk/lib/Target/XCore/CMakeLists.txt
    llvm/trunk/lib/Target/XCore/README.txt
    llvm/trunk/lib/Target/XCore/XCore.h
    llvm/trunk/lib/Target/XCore/XCore.td
    llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp
    llvm/trunk/lib/Target/XCore/XCoreCallingConv.td
    llvm/trunk/lib/Target/XCore/XCoreFrameInfo.cpp
    llvm/trunk/lib/Target/XCore/XCoreFrameInfo.h
    llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp
    llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
    llvm/trunk/lib/Target/XCore/XCoreISelLowering.h
    llvm/trunk/lib/Target/XCore/XCoreInstrFormats.td
    llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp
    llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h
    llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td
    llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.h
    llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp
    llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h
    llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.td
    llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp
    llvm/trunk/lib/Target/XCore/XCoreSubtarget.h
    llvm/trunk/lib/Target/XCore/XCoreTargetAsmInfo.cpp
    llvm/trunk/lib/Target/XCore/XCoreTargetAsmInfo.h
    llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp
    llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h
Modified:
    llvm/trunk/autoconf/configure.ac
    llvm/trunk/configure

Modified: llvm/trunk/autoconf/configure.ac
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=58838&r1=58837&r2=58838&view=diff

==============================================================================
--- llvm/trunk/autoconf/configure.ac (original)
+++ llvm/trunk/autoconf/configure.ac Fri Nov  7 04:59:00 2008
@@ -225,6 +225,7 @@
   arm-*)                  llvm_cv_target_arch="ARM" ;;
   mips-*)                 llvm_cv_target_arch="Mips" ;;
   pic16-*)                llvm_cv_target_arch="PIC16" ;;
+  xcore-*)                llvm_cv_target_arch="XCore" ;;
   *)                      llvm_cv_target_arch="Unknown" ;;
 esac])
 
@@ -332,6 +333,7 @@
     ARM)     AC_SUBST(TARGET_HAS_JIT,0) ;;
     Mips)    AC_SUBST(TARGET_HAS_JIT,0) ;;
     PIC16)   AC_SUBST(TARGET_HAS_JIT,0) ;;
+    XCore)   AC_SUBST(TARGET_HAS_JIT,0) ;;
     *)       AC_SUBST(TARGET_HAS_JIT,0) ;;
   esac
 fi
@@ -381,7 +383,7 @@
     [Build specific host targets: all,host-only,{target-name} (default=all)]),,
     enableval=all)
 case "$enableval" in
-  all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU PIC16 CBackend MSIL CppBackend" ;;
+  all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU PIC16 XCore CBackend MSIL CppBackend" ;;
   host-only)
     case "$llvm_cv_target_arch" in
       x86)     TARGETS_TO_BUILD="X86" ;;
@@ -394,6 +396,7 @@
       Mips)    TARGETS_TO_BUILD="Mips" ;;
       CellSPU|SPU) TARGETS_TO_BUILD="CellSPU" ;;
       PIC16)   TARGETS_TO_BUILD="PIC16" ;;
+      XCore)   TARGETS_TO_BUILD="XCore" ;;
       *)       AC_MSG_ERROR([Can not set target to build]) ;;
     esac
     ;;
@@ -409,6 +412,7 @@
         mips)    TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
         spu)     TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
         pic16)   TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;;
+        xcore)   TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
         cbe)     TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
         msil)    TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
         cpp)     TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;

Modified: llvm/trunk/configure
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=58838&r1=58837&r2=58838&view=diff

==============================================================================
--- llvm/trunk/configure (original)
+++ llvm/trunk/configure Fri Nov  7 04:59:00 2008
@@ -2389,6 +2389,7 @@
   arm-*)                  llvm_cv_target_arch="ARM" ;;
   mips-*)                 llvm_cv_target_arch="Mips" ;;
   pic16-*)                llvm_cv_target_arch="PIC16" ;;
+  xcore-*)                llvm_cv_target_arch="XCore" ;;
   *)                      llvm_cv_target_arch="Unknown" ;;
 esac
 fi
@@ -4811,6 +4812,8 @@
  ;;
     PIC16)   TARGET_HAS_JIT=0
  ;;
+    XCore)   TARGET_HAS_JIT=0
+ ;;
     *)       TARGET_HAS_JIT=0
  ;;
   esac
@@ -4892,7 +4895,7 @@
 fi
 
 case "$enableval" in
-  all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU PIC16 CBackend MSIL CppBackend" ;;
+  all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU PIC16 XCore CBackend MSIL CppBackend" ;;
   host-only)
     case "$llvm_cv_target_arch" in
       x86)     TARGETS_TO_BUILD="X86" ;;
@@ -4905,6 +4908,7 @@
       Mips)    TARGETS_TO_BUILD="Mips" ;;
       CellSPU|SPU) TARGETS_TO_BUILD="CellSPU" ;;
       PIC16)   TARGETS_TO_BUILD="PIC16" ;;
+      XCore)   TARGETS_TO_BUILD="XCore" ;;
       *)       { { echo "$as_me:$LINENO: error: Can not set target to build" >&5
 echo "$as_me: error: Can not set target to build" >&2;}
    { (exit 1); exit 1; }; } ;;
@@ -4922,6 +4926,7 @@
         mips)    TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
         spu)     TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
         pic16)   TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;;
+        xcore)   TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
         cbe)     TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
         msil)    TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
         cpp)     TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
@@ -10827,7 +10832,7 @@
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext < conftest.$ac_ext
+  echo '#line 12979 "configure"' > conftest.$ac_ext
   if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
   (eval $ac_compile) 2>&5
   ac_status=$?
@@ -14689,11 +14694,11 @@
    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
    -e 's:$: $lt_compiler_flag:'`
-   (eval echo "\"\$as_me:14692: $lt_compile\"" >&5)
+   (eval echo "\"\$as_me:14697: $lt_compile\"" >&5)
    (eval "$lt_compile" 2>conftest.err)
    ac_status=$?
    cat conftest.err >&5
-   echo "$as_me:14696: \$? = $ac_status" >&5
+   echo "$as_me:14701: \$? = $ac_status" >&5
    if (exit $ac_status) && test -s "$ac_outfile"; then
      # The compiler can only warn and ignore the option if not recognized
      # So say no if there are warnings other than the usual output.
@@ -14957,11 +14962,11 @@
    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
    -e 's:$: $lt_compiler_flag:'`
-   (eval echo "\"\$as_me:14960: $lt_compile\"" >&5)
+   (eval echo "\"\$as_me:14965: $lt_compile\"" >&5)
    (eval "$lt_compile" 2>conftest.err)
    ac_status=$?
    cat conftest.err >&5
-   echo "$as_me:14964: \$? = $ac_status" >&5
+   echo "$as_me:14969: \$? = $ac_status" >&5
    if (exit $ac_status) && test -s "$ac_outfile"; then
      # The compiler can only warn and ignore the option if not recognized
      # So say no if there are warnings other than the usual output.
@@ -15061,11 +15066,11 @@
    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
    -e 's:$: $lt_compiler_flag:'`
-   (eval echo "\"\$as_me:15064: $lt_compile\"" >&5)
+   (eval echo "\"\$as_me:15069: $lt_compile\"" >&5)
    (eval "$lt_compile" 2>out/conftest.err)
    ac_status=$?
    cat out/conftest.err >&5
-   echo "$as_me:15068: \$? = $ac_status" >&5
+   echo "$as_me:15073: \$? = $ac_status" >&5
    if (exit $ac_status) && test -s out/conftest2.$ac_objext
    then
      # The compiler can only warn and ignore the option if not recognized
@@ -17513,7 +17518,7 @@
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext < conftest.$ac_ext <&5)
+   (eval echo "\"\$as_me:19989: $lt_compile\"" >&5)
    (eval "$lt_compile" 2>conftest.err)
    ac_status=$?
    cat conftest.err >&5
-   echo "$as_me:19988: \$? = $ac_status" >&5
+   echo "$as_me:19993: \$? = $ac_status" >&5
    if (exit $ac_status) && test -s "$ac_outfile"; then
      # The compiler can only warn and ignore the option if not recognized
      # So say no if there are warnings other than the usual output.
@@ -20085,11 +20090,11 @@
    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
    -e 's:$: $lt_compiler_flag:'`
-   (eval echo "\"\$as_me:20088: $lt_compile\"" >&5)
+   (eval echo "\"\$as_me:20093: $lt_compile\"" >&5)
    (eval "$lt_compile" 2>out/conftest.err)
    ac_status=$?
    cat out/conftest.err >&5
-   echo "$as_me:20092: \$? = $ac_status" >&5
+   echo "$as_me:20097: \$? = $ac_status" >&5
    if (exit $ac_status) && test -s out/conftest2.$ac_objext
    then
      # The compiler can only warn and ignore the option if not recognized
@@ -21655,11 +21660,11 @@
    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
    -e 's:$: $lt_compiler_flag:'`
-   (eval echo "\"\$as_me:21658: $lt_compile\"" >&5)
+   (eval echo "\"\$as_me:21663: $lt_compile\"" >&5)
    (eval "$lt_compile" 2>conftest.err)
    ac_status=$?
    cat conftest.err >&5
-   echo "$as_me:21662: \$? = $ac_status" >&5
+   echo "$as_me:21667: \$? = $ac_status" >&5
    if (exit $ac_status) && test -s "$ac_outfile"; then
      # The compiler can only warn and ignore the option if not recognized
      # So say no if there are warnings other than the usual output.
@@ -21759,11 +21764,11 @@
    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
    -e 's:$: $lt_compiler_flag:'`
-   (eval echo "\"\$as_me:21762: $lt_compile\"" >&5)
+   (eval echo "\"\$as_me:21767: $lt_compile\"" >&5)
    (eval "$lt_compile" 2>out/conftest.err)
    ac_status=$?
    cat out/conftest.err >&5
-   echo "$as_me:21766: \$? = $ac_status" >&5
+   echo "$as_me:21771: \$? = $ac_status" >&5
    if (exit $ac_status) && test -s out/conftest2.$ac_objext
    then
      # The compiler can only warn and ignore the option if not recognized
@@ -23994,11 +23999,11 @@
    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
    -e 's:$: $lt_compiler_flag:'`
-   (eval echo "\"\$as_me:23997: $lt_compile\"" >&5)
+   (eval echo "\"\$as_me:24002: $lt_compile\"" >&5)
    (eval "$lt_compile" 2>conftest.err)
    ac_status=$?
    cat conftest.err >&5
-   echo "$as_me:24001: \$? = $ac_status" >&5
+   echo "$as_me:24006: \$? = $ac_status" >&5
    if (exit $ac_status) && test -s "$ac_outfile"; then
      # The compiler can only warn and ignore the option if not recognized
      # So say no if there are warnings other than the usual output.
@@ -24262,11 +24267,11 @@
    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
    -e 's:$: $lt_compiler_flag:'`
-   (eval echo "\"\$as_me:24265: $lt_compile\"" >&5)
+   (eval echo "\"\$as_me:24270: $lt_compile\"" >&5)
    (eval "$lt_compile" 2>conftest.err)
    ac_status=$?
    cat conftest.err >&5
-   echo "$as_me:24269: \$? = $ac_status" >&5
+   echo "$as_me:24274: \$? = $ac_status" >&5
    if (exit $ac_status) && test -s "$ac_outfile"; then
      # The compiler can only warn and ignore the option if not recognized
      # So say no if there are warnings other than the usual output.
@@ -24366,11 +24371,11 @@
    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
    -e 's:$: $lt_compiler_flag:'`
-   (eval echo "\"\$as_me:24369: $lt_compile\"" >&5)
+   (eval echo "\"\$as_me:24374: $lt_compile\"" >&5)
    (eval "$lt_compile" 2>out/conftest.err)
    ac_status=$?
    cat out/conftest.err >&5
-   echo "$as_me:24373: \$? = $ac_status" >&5
+   echo "$as_me:24378: \$? = $ac_status" >&5
    if (exit $ac_status) && test -s out/conftest2.$ac_objext
    then
      # The compiler can only warn and ignore the option if not recognized

Added: llvm/trunk/lib/Target/XCore/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/CMakeLists.txt?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/CMakeLists.txt (added)
+++ llvm/trunk/lib/Target/XCore/CMakeLists.txt Fri Nov  7 04:59:00 2008
@@ -0,0 +1,23 @@
+set(LLVM_TARGET_DEFINITIONS XCore.td)
+
+tablegen(XCoreGenRegisterInfo.h.inc -gen-register-desc-header)
+tablegen(XCoreGenRegisterNames.inc -gen-register-enums)
+tablegen(XCoreGenRegisterInfo.inc -gen-register-desc)
+tablegen(XCoreGenInstrNames.inc -gen-instr-enums)
+tablegen(XCoreGenInstrInfo.inc -gen-instr-desc)
+tablegen(XCoreGenAsmWriter.inc -gen-asm-writer)
+tablegen(XCoreGenDAGISel.inc -gen-dag-isel)
+tablegen(XCoreGenCallingConv.inc -gen-callingconv)
+tablegen(XCoreGenSubtarget.inc -gen-subtarget)
+
+add_llvm_target(XCore
+  XCoreAsmPrinter.cpp
+  XCoreFrameInfo.cpp
+  XCoreInstrInfo.cpp
+  XCoreISelDAGToDAG.cpp
+  XCoreISelLowering.cpp
+  XCoreRegisterInfo.cpp
+  XCoreSubtarget.cpp
+  XCoreTargetAsmInfo.cpp
+  XCoreTargetMachine.cpp
+  )

Added: llvm/trunk/lib/Target/XCore/README.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/README.txt?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/README.txt (added)
+++ llvm/trunk/lib/Target/XCore/README.txt Fri Nov  7 04:59:00 2008
@@ -0,0 +1,8 @@
+To-do
+-----
+
+* Instruction encodings
+* Tailcalls
+* Investigate loop alignment
+* Add builtins
+* Make better use of lmul / macc

Added: llvm/trunk/lib/Target/XCore/XCore.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCore.h?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCore.h (added)
+++ llvm/trunk/lib/Target/XCore/XCore.h Fri Nov  7 04:59:00 2008
@@ -0,0 +1,38 @@
+//===-- XCore.h - Top-level interface for XCore representation --*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the entry points for global functions defined in the LLVM
+// XCore back-end.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef TARGET_XCORE_H
+#define TARGET_XCORE_H
+
+namespace llvm {
+  class FunctionPass;
+  class TargetMachine;
+  class XCoreTargetMachine;
+  class raw_ostream;
+
+  FunctionPass *createXCoreISelDag(XCoreTargetMachine &TM);
+  FunctionPass *createXCoreCodePrinterPass(raw_ostream &OS,
+                                           XCoreTargetMachine &TM);
+} // end namespace llvm;
+
+// Defines symbolic names for XCore registers.  This defines a mapping from
+// register name to register number.
+//
+#include "XCoreGenRegisterNames.inc"
+
+// Defines symbolic names for the XCore instructions.
+//
+#include "XCoreGenInstrNames.inc"
+
+#endif

Added: llvm/trunk/lib/Target/XCore/XCore.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCore.td?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCore.td (added)
+++ llvm/trunk/lib/Target/XCore/XCore.td Fri Nov  7 04:59:00 2008
@@ -0,0 +1,62 @@
+//===- XCore.td - Describe the XCore Target Machine --------*- tablegen -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+//
+//===----------------------------------------------------------------------===//
+
+//===----------------------------------------------------------------------===//
+// Target-independent interfaces which we are implementing
+//===----------------------------------------------------------------------===//
+
+include "../Target.td"
+
+//===----------------------------------------------------------------------===//
+// Descriptions
+//===----------------------------------------------------------------------===//
+
+include "XCoreRegisterInfo.td"
+include "XCoreInstrInfo.td"
+include "XCoreCallingConv.td"
+
+def XCoreInstrInfo : InstrInfo {
+  let TSFlagsFields = [];
+  let TSFlagsShifts = [];
+}
+
+//===----------------------------------------------------------------------===//
+// XCore Subtarget features.
+//===----------------------------------------------------------------------===//
+
+def FeatureXS1A
+  : SubtargetFeature<"xs1a", "IsXS1A", "true",
+                     "Enable XS1A instructions">;
+
+def FeatureXS1B
+  : SubtargetFeature<"xs1b", "IsXS1B", "true",
+                     "Enable XS1B instructions">;
+
+//===----------------------------------------------------------------------===//
+// XCore processors supported.
+//===----------------------------------------------------------------------===//
+
+class Proc Features>
+ : Processor;
+
+def : Proc<"generic",      [FeatureXS1A]>;
+def : Proc<"xs1a-generic", [FeatureXS1A]>;
+def : Proc<"xs1b-generic", [FeatureXS1B]>;
+
+//===----------------------------------------------------------------------===//
+// Declare the target which we are implementing
+//===----------------------------------------------------------------------===//
+
+def XCore : Target {
+  // Pull in Instruction Info:
+  let InstructionSet = XCoreInstrInfo;
+}

Added: llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp (added)
+++ llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp Fri Nov  7 04:59:00 2008
@@ -0,0 +1,459 @@
+//===-- XCoreAsmPrinter.cpp - XCore LLVM assembly writer ------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains a printer that converts from our internal representation
+// of machine-dependent LLVM code to the XAS-format XCore assembly language.
+//
+//===----------------------------------------------------------------------===//
+
+#define DEBUG_TYPE "asm-printer"
+#include "XCore.h"
+#include "XCoreInstrInfo.h"
+#include "XCoreSubtarget.h"
+#include "XCoreTargetMachine.h"
+#include "llvm/Constants.h"
+#include "llvm/DerivedTypes.h"
+#include "llvm/Module.h"
+#include "llvm/CodeGen/AsmPrinter.h"
+#include "llvm/CodeGen/DwarfWriter.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineConstantPool.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/Target/TargetAsmInfo.h"
+#include "llvm/Target/TargetData.h"
+#include "llvm/Support/Mangler.h"
+#include "llvm/ADT/Statistic.h"
+#include "llvm/ADT/StringExtras.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/MathExtras.h"
+#include "llvm/Support/raw_ostream.h"
+#include 
+#include 
+using namespace llvm;
+
+STATISTIC(EmittedInsts, "Number of machine instrs printed");
+
+static cl::opt FileDirective("xcore-file-directive", cl::Optional,
+  cl::desc("Output a file directive into the assembly file"),
+  cl::Hidden,
+  cl::value_desc("filename"),
+  cl::init(""));
+
+static cl::opt MaxThreads("xcore-max-threads", cl::Optional,
+  cl::desc("Maximum number of threads (for emulation thread-local storage)"),
+  cl::Hidden,
+  cl::value_desc("number"),
+  cl::init(8));
+
+namespace {
+  struct VISIBILITY_HIDDEN XCoreAsmPrinter : public AsmPrinter {
+    XCoreAsmPrinter(raw_ostream &O, XCoreTargetMachine &TM,
+                    const TargetAsmInfo *T)
+      : AsmPrinter(O, TM, T), DW(O, this, T),
+        Subtarget(*TM.getSubtargetImpl()) { }
+
+    DwarfWriter DW;
+    const XCoreSubtarget &Subtarget;
+
+    virtual const char *getPassName() const {
+      return "XCore Assembly Printer";
+    }
+
+    void printMemOperand(const MachineInstr *MI, int opNum);
+    void printOperand(const MachineInstr *MI, int opNum);
+    bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
+                        unsigned AsmVariant, const char *ExtraCode);
+    
+    void emitFileDirective(const std::string &filename);
+    void emitGlobalDirective(const std::string &name);
+    void emitExternDirective(const std::string &name);
+    
+    void emitArrayBound(const std::string &name, const GlobalVariable *GV);
+    void emitGlobal(const GlobalVariable *GV);
+
+    void emitFunctionStart(MachineFunction &MF);
+    void emitFunctionEnd(MachineFunction &MF);
+
+    bool printInstruction(const MachineInstr *MI);  // autogenerated.
+    void printMachineInstruction(const MachineInstr *MI);
+    bool runOnMachineFunction(MachineFunction &F);
+    bool doInitialization(Module &M);
+    bool doFinalization(Module &M);
+    
+    void getAnalysisUsage(AnalysisUsage &AU) const {
+      AsmPrinter::getAnalysisUsage(AU);
+      AU.setPreservesAll();
+      AU.addRequired();
+    }
+  };
+} // end of anonymous namespace
+
+#include "XCoreGenAsmWriter.inc"
+
+/// createXCoreCodePrinterPass - Returns a pass that prints the XCore
+/// assembly code for a MachineFunction to the given output stream,
+/// using the given target machine description.  This should work
+/// regardless of whether the function is in SSA form.
+///
+FunctionPass *llvm::createXCoreCodePrinterPass(raw_ostream &o,
+                                               XCoreTargetMachine &tm) {
+  return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo());
+}
+
+// PrintEscapedString - Print each character of the specified string, escaping
+// it if it is not printable or if it is an escape char.
+static void PrintEscapedString(const std::string &Str, raw_ostream &Out) {
+  for (unsigned i = 0, e = Str.size(); i != e; ++i) {
+    unsigned char C = Str[i];
+    if (isprint(C) && C != '"' && C != '\\') {
+      Out << C;
+    } else {
+      Out << '\\'
+          << (char) ((C/16  < 10) ? ( C/16 +'0') : ( C/16 -10+'A'))
+          << (char)(((C&15) < 10) ? ((C&15)+'0') : ((C&15)-10+'A'));
+    }
+  }
+}
+
+void XCoreAsmPrinter::
+emitFileDirective(const std::string &name)
+{
+  O << "\t.file\t\"";
+  PrintEscapedString(name, O);
+  O << "\"\n";
+}
+
+void XCoreAsmPrinter::
+emitGlobalDirective(const std::string &name)
+{
+  O << TAI->getGlobalDirective() << name;
+  O << "\n";
+}
+
+void XCoreAsmPrinter::
+emitExternDirective(const std::string &name)
+{
+  O << "\t.extern\t" << name;
+  O << '\n';
+}
+
+void XCoreAsmPrinter::
+emitArrayBound(const std::string &name, const GlobalVariable *GV)
+{
+  assert((GV->hasExternalLinkage() ||
+    GV->hasWeakLinkage()) ||
+    GV->hasLinkOnceLinkage() && "Unexpected linkage");
+  if (const ArrayType *ATy = dyn_cast(
+    cast(GV->getType())->getElementType()))
+  {
+    O << TAI->getGlobalDirective() << name << ".globound" << "\n";
+    O << TAI->getSetDirective() << name << ".globound" << ","
+      << ATy->getNumElements() << "\n";
+    if (GV->hasWeakLinkage() || GV->hasLinkOnceLinkage()) {
+      // TODO Use COMDAT groups for LinkOnceLinkage
+      O << TAI->getWeakDefDirective() << name << ".globound" << "\n";
+    }
+  }
+}
+
+void XCoreAsmPrinter::
+emitGlobal(const GlobalVariable *GV)
+{
+  const TargetData *TD = TM.getTargetData();
+
+  if (GV->hasInitializer()) {
+    // Check to see if this is a special global used by LLVM, if so, emit it.
+    if (EmitSpecialLLVMGlobal(GV))
+      return;
+
+    SwitchToSection(TAI->SectionForGlobal(GV));
+    
+    std::string name = Mang->getValueName(GV);
+    Constant *C = GV->getInitializer();
+    unsigned Align = (unsigned)TD->getPreferredTypeAlignmentShift(C->getType());
+    
+    // Mark the start of the global
+    O << "\t.cc_top " << name << ".data," << name << "\n";
+
+    switch (GV->getLinkage()) {
+    case GlobalValue::AppendingLinkage:
+      cerr << "AppendingLinkage is not supported by this target!\n";
+      abort();
+    case GlobalValue::LinkOnceLinkage:
+    case GlobalValue::WeakLinkage:
+    case GlobalValue::ExternalLinkage:
+      emitArrayBound(name, GV);
+      emitGlobalDirective(name);
+      // TODO Use COMDAT groups for LinkOnceLinkage
+      if (GV->hasWeakLinkage() || GV->hasLinkOnceLinkage()) {
+        O << TAI->getWeakDefDirective() << name << "\n";
+      }
+      // FALL THROUGH
+    case GlobalValue::InternalLinkage:
+      break;
+    case GlobalValue::GhostLinkage:
+      cerr << "Should not have any unmaterialized functions!\n";
+      abort();
+    case GlobalValue::DLLImportLinkage:
+      cerr << "DLLImport linkage is not supported by this target!\n";
+      abort();
+    case GlobalValue::DLLExportLinkage:
+      cerr << "DLLExport linkage is not supported by this target!\n";
+      abort();
+    default:
+      assert(0 && "Unknown linkage type!");
+    }
+
+    EmitAlignment(Align, GV, 2);
+    
+    unsigned Size = TD->getABITypeSize(C->getType());
+    if (GV->isThreadLocal()) {
+      Size *= MaxThreads;
+    }
+    if (TAI->hasDotTypeDotSizeDirective()) {
+      O << "\t.type " << name << ", at object\n";
+      O << "\t.size " << name << "," << Size << "\n";
+    }
+    O << name << ":\n";
+    
+    EmitGlobalConstant(C);
+    if (GV->isThreadLocal()) {
+      for (unsigned i = 1; i < MaxThreads; ++i) {
+        EmitGlobalConstant(C);
+      }
+    }
+    if (Size < 4) {
+      // The ABI requires that unsigned scalar types smaller than 32 bits
+      // are are padded to 32 bits.
+      EmitZeros(4 - Size);
+    }
+    
+    // Mark the end of the global
+    O << "\t.cc_bottom " << name << ".data\n";
+  } else {
+    if (GV->hasExternalWeakLinkage())
+      ExtWeakSymbols.insert(GV);
+  }
+}
+
+/// Emit the directives on the start of functions
+void XCoreAsmPrinter::
+emitFunctionStart(MachineFunction &MF)
+{
+  // Print out the label for the function.
+  const Function *F = MF.getFunction();
+
+  SwitchToSection(TAI->SectionForGlobal(F));
+  
+  // Mark the start of the function
+  O << "\t.cc_top " << CurrentFnName << ".function," << CurrentFnName << "\n";
+
+  switch (F->getLinkage()) {
+  default: assert(0 && "Unknown linkage type!");
+  case Function::InternalLinkage:  // Symbols default to internal.
+    break;
+  case Function::ExternalLinkage:
+    emitGlobalDirective(CurrentFnName);
+    break;
+  case Function::LinkOnceLinkage:
+  case Function::WeakLinkage:
+    // TODO Use COMDAT groups for LinkOnceLinkage
+    O << TAI->getGlobalDirective() << CurrentFnName << "\n";
+    O << TAI->getWeakDefDirective() << CurrentFnName << "\n";
+    break;
+  }
+  // (1 << 1) byte aligned
+  EmitAlignment(1, F, 1);
+  if (TAI->hasDotTypeDotSizeDirective()) {
+    O << "\t.type " << CurrentFnName << ", at function\n";
+  }
+  O << CurrentFnName << ":\n";
+}
+
+/// Emit the directives on the end of functions
+void XCoreAsmPrinter::
+emitFunctionEnd(MachineFunction &MF) 
+{
+  // Mark the end of the function
+  O << "\t.cc_bottom " << CurrentFnName << ".function\n";
+}
+
+/// runOnMachineFunction - This uses the printMachineInstruction()
+/// method to print assembly for each instruction.
+///
+bool XCoreAsmPrinter::runOnMachineFunction(MachineFunction &MF)
+{
+  SetupMachineFunction(MF);
+
+  // Print out constants referenced by the function
+  EmitConstantPool(MF.getConstantPool());
+
+  // Print out jump tables referenced by the function
+  EmitJumpTableInfo(MF.getJumpTableInfo(), MF);
+
+  // What's my mangled name?
+  CurrentFnName = Mang->getValueName(MF.getFunction());
+
+  // Emit the function start directives
+  emitFunctionStart(MF);
+  
+  // Emit pre-function debug information.
+  DW.BeginFunction(&MF);
+
+  // Print out code for the function.
+  for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
+       I != E; ++I) {
+
+    // Print a label for the basic block.
+    if (I != MF.begin()) {
+      printBasicBlockLabel(I, true , true);
+      O << '\n';
+    }
+
+    for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
+         II != E; ++II) {
+      // Print the assembly for the instruction.
+      O << "\t";
+      printMachineInstruction(II);
+    }
+
+    // Each Basic Block is separated by a newline
+    O << '\n';
+  }
+
+  // Emit function end directives
+  emitFunctionEnd(MF);
+  
+  // Emit post-function debug information.
+  DW.EndFunction(&MF);
+
+  // We didn't modify anything.
+  return false;
+}
+
+void XCoreAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum)
+{
+  printOperand(MI, opNum);
+  
+  if (MI->getOperand(opNum+1).isImm()
+    && MI->getOperand(opNum+1).getImm() == 0)
+    return;
+  
+  O << "+";
+  printOperand(MI, opNum+1);
+}
+
+void XCoreAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
+  const MachineOperand &MO = MI->getOperand(opNum);
+  switch (MO.getType()) {
+  case MachineOperand::MO_Register:
+    if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
+      O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
+    else
+      assert(0 && "not implemented");
+    break;
+  case MachineOperand::MO_Immediate:
+    O << MO.getImm();
+    break;
+  case MachineOperand::MO_MachineBasicBlock:
+    printBasicBlockLabel(MO.getMBB());
+    break;
+  case MachineOperand::MO_GlobalAddress:
+    O << Mang->getValueName(MO.getGlobal());
+    if (MO.getGlobal()->hasExternalWeakLinkage())
+      ExtWeakSymbols.insert(MO.getGlobal());
+    break;
+  case MachineOperand::MO_ExternalSymbol:
+    O << MO.getSymbolName();
+    break;
+  case MachineOperand::MO_ConstantPoolIndex:
+    O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
+      << '_' << MO.getIndex();
+    break;
+  case MachineOperand::MO_JumpTableIndex:
+    O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
+      << '_' << MO.getIndex();
+    break;
+  default:
+    assert(0 && "not implemented");
+  }
+}
+
+/// PrintAsmOperand - Print out an operand for an inline asm expression.
+///
+bool XCoreAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
+                                      unsigned AsmVariant, 
+                                      const char *ExtraCode) {
+  printOperand(MI, OpNo);
+  return false;
+}
+
+void XCoreAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
+  ++EmittedInsts;
+
+  // Check for mov mnemonic
+  unsigned src, dst;
+  if (TM.getInstrInfo()->isMoveInstr(*MI, src, dst)) {
+    O << "\tmov ";
+    O << TM.getRegisterInfo()->get(dst).AsmName;
+    O << ", ";
+    O << TM.getRegisterInfo()->get(src).AsmName;
+    O << "\n";
+    return;
+  }
+  if (printInstruction(MI)) {
+    return;
+  }
+  assert(0 && "Unhandled instruction in asm writer!");
+}
+
+bool XCoreAsmPrinter::doInitialization(Module &M) {
+  bool Result = AsmPrinter::doInitialization(M);
+  
+  if (!FileDirective.empty()) {
+    emitFileDirective(FileDirective);
+  }
+  
+  // Print out type strings for external functions here
+  for (Module::const_iterator I = M.begin(), E = M.end();
+       I != E; ++I) {
+    if (I->isDeclaration() && !I->isIntrinsic()) {
+      switch (I->getLinkage()) {
+      default:
+        assert(0 && "Unexpected linkage");
+      case Function::ExternalWeakLinkage:
+        ExtWeakSymbols.insert(I);
+        // fallthrough
+      case Function::ExternalLinkage:
+        break;
+      }
+    }
+  }
+
+  // Emit initial debug information.
+  DW.BeginModule(&M);
+
+  DW.SetModuleInfo(getAnalysisToUpdate());
+  return Result;
+}
+
+bool XCoreAsmPrinter::doFinalization(Module &M) {
+
+  // Print out module-level global variables.
+  for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
+       I != E; ++I) {
+    emitGlobal(I);
+  }
+  
+  // Emit final debug information.
+  DW.EndModule();
+
+  return AsmPrinter::doFinalization(M);
+}

Added: llvm/trunk/lib/Target/XCore/XCoreCallingConv.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreCallingConv.td?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreCallingConv.td (added)
+++ llvm/trunk/lib/Target/XCore/XCoreCallingConv.td Fri Nov  7 04:59:00 2008
@@ -0,0 +1,33 @@
+//===- XCoreCallingConv.td - Calling Conventions for XCore -*- tablegen -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+// This describes the calling conventions for XCore architecture.
+//===----------------------------------------------------------------------===//
+
+//===----------------------------------------------------------------------===//
+// XCore Return Value Calling Convention
+//===----------------------------------------------------------------------===//
+def RetCC_XCore : CallingConv<[
+  // i32 are returned in registers R0, R1, R2, R3
+  CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>
+]>;
+
+//===----------------------------------------------------------------------===//
+// XCore Argument Calling Conventions
+//===----------------------------------------------------------------------===//
+def CC_XCore : CallingConv<[
+  // Promote i8/i16 arguments to i32.
+  CCIfType<[i8, i16], CCPromoteToType>,
+
+  // The first 4 integer arguments are passed in integer registers.
+  CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>,
+
+  // Integer values get stored in stack slots that are 4 bytes in
+  // size and 4-byte aligned.
+  CCIfType<[i32], CCAssignToStack<4, 4>>
+]>;

Added: llvm/trunk/lib/Target/XCore/XCoreFrameInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreFrameInfo.cpp?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreFrameInfo.cpp (added)
+++ llvm/trunk/lib/Target/XCore/XCoreFrameInfo.cpp Fri Nov  7 04:59:00 2008
@@ -0,0 +1,27 @@
+//===-- XCoreFrameInfo.cpp - Frame info for XCore Target ---------*- C++ -*-==//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains XCore frame information that doesn't fit anywhere else
+// cleanly...
+//
+//===----------------------------------------------------------------------===//
+
+#include "XCore.h"
+#include "XCoreFrameInfo.h"
+using namespace llvm;
+
+//===----------------------------------------------------------------------===//
+// XCoreFrameInfo:
+//===----------------------------------------------------------------------===//
+
+XCoreFrameInfo::XCoreFrameInfo(const TargetMachine &tm):
+  TargetFrameInfo(TargetFrameInfo::StackGrowsDown, 4, 0)
+{
+  // Do nothing
+}

Added: llvm/trunk/lib/Target/XCore/XCoreFrameInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreFrameInfo.h?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreFrameInfo.h (added)
+++ llvm/trunk/lib/Target/XCore/XCoreFrameInfo.h Fri Nov  7 04:59:00 2008
@@ -0,0 +1,34 @@
+//===-- XCoreFrameInfo.h - Frame info for XCore Target -----------*- C++ -*-==//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains XCore frame information that doesn't fit anywhere else
+// cleanly...
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef XCOREFRAMEINFO_H
+#define XCOREFRAMEINFO_H
+
+#include "llvm/Target/TargetFrameInfo.h"
+#include "llvm/Target/TargetMachine.h"
+
+namespace llvm {
+  class XCoreFrameInfo: public TargetFrameInfo {
+
+  public:
+    XCoreFrameInfo(const TargetMachine &tm);
+
+    //! Stack slot size (4 bytes)
+    static int stackSlotSize() {
+      return 4;
+    }
+  };
+}
+
+#endif // XCOREFRAMEINFO_H

Added: llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp (added)
+++ llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp Fri Nov  7 04:59:00 2008
@@ -0,0 +1,228 @@
+//===-- XCoreISelDAGToDAG.cpp - A dag to dag inst selector for XCore ------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines an instruction selector for the XCore target.
+//
+//===----------------------------------------------------------------------===//
+
+#include "XCore.h"
+#include "XCoreISelLowering.h"
+#include "XCoreTargetMachine.h"
+#include "llvm/DerivedTypes.h"
+#include "llvm/Function.h"
+#include "llvm/Intrinsics.h"
+#include "llvm/CallingConv.h"
+#include "llvm/Constants.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/SelectionDAG.h"
+#include "llvm/CodeGen/SelectionDAGISel.h"
+#include "llvm/Target/TargetLowering.h"
+#include "llvm/Support/Compiler.h"
+#include "llvm/Support/Debug.h"
+#include 
+#include 
+using namespace llvm;
+
+/// XCoreDAGToDAGISel - XCore specific code to select XCore machine
+/// instructions for SelectionDAG operations.
+///
+namespace {
+  class XCoreDAGToDAGISel : public SelectionDAGISel {
+    XCoreTargetLowering &Lowering;
+    const XCoreSubtarget &Subtarget;
+
+  public:
+    XCoreDAGToDAGISel(XCoreTargetMachine &TM)
+      : SelectionDAGISel(*TM.getTargetLowering()),
+        Lowering(*TM.getTargetLowering()), 
+        Subtarget(*TM.getSubtargetImpl()) { }
+
+    SDNode *Select(SDValue Op);
+    
+    /// getI32Imm - Return a target constant with the specified value, of type
+    /// i32.
+    inline SDValue getI32Imm(unsigned Imm) {
+      return CurDAG->getTargetConstant(Imm, MVT::i32);
+    }
+
+    // Complex Pattern Selectors.
+    bool SelectADDRspii(SDValue Op, SDValue Addr, SDValue &Base,
+                        SDValue &Offset);
+    bool SelectADDRdpii(SDValue Op, SDValue Addr, SDValue &Base,
+                        SDValue &Offset);
+    bool SelectADDRcpii(SDValue Op, SDValue Addr, SDValue &Base,
+                        SDValue &Offset);
+    
+    virtual void InstructionSelect();
+
+    virtual const char *getPassName() const {
+      return "XCore DAG->DAG Pattern Instruction Selection";
+    } 
+    
+    // Include the pieces autogenerated from the target description.
+  #include "XCoreGenDAGISel.inc"
+  };
+}  // end anonymous namespace
+
+/// createXCoreISelDag - This pass converts a legalized DAG into a 
+/// XCore-specific DAG, ready for instruction scheduling.
+///
+FunctionPass *llvm::createXCoreISelDag(XCoreTargetMachine &TM) {
+  return new XCoreDAGToDAGISel(TM);
+}
+
+bool XCoreDAGToDAGISel::SelectADDRspii(SDValue Op, SDValue Addr,
+                                  SDValue &Base, SDValue &Offset) {
+  FrameIndexSDNode *FIN = 0;
+  if (FIN = dyn_cast(Addr)) {
+    Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
+    Offset = CurDAG->getTargetConstant(0, MVT::i32);
+    return true;
+  }
+  if (Addr.getOpcode() == ISD::ADD) {
+    ConstantSDNode *CN = 0;
+    if ((FIN = dyn_cast(Addr.getOperand(0)))
+      && (CN = dyn_cast(Addr.getOperand(1)))
+      && (CN->getSExtValue() % 4 == 0)) {
+      // Constant word offset from frame pointer
+      Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
+      Offset = CurDAG->getTargetConstant(CN->getSExtValue(), MVT::i32);
+      return true;
+    }
+  }
+  return false;
+}
+
+bool XCoreDAGToDAGISel::SelectADDRdpii(SDValue Op, SDValue Addr,
+                                  SDValue &Base, SDValue &Offset) {
+  if (Addr.getOpcode() == XCoreISD::DPRelativeWrapper) {
+    Base = Addr.getOperand(0);
+    Offset = CurDAG->getTargetConstant(0, MVT::i32);
+    return true;
+  }
+  if (Addr.getOpcode() == ISD::ADD) {
+    ConstantSDNode *CN = 0;
+    if ((Addr.getOperand(0).getOpcode() == XCoreISD::DPRelativeWrapper)
+      && (CN = dyn_cast(Addr.getOperand(1)))
+      && (CN->getSExtValue() % 4 == 0)) {
+      // Constant word offset from a object in the data region
+      Base = Addr.getOperand(0).getOperand(0);
+      Offset = CurDAG->getTargetConstant(CN->getSExtValue(), MVT::i32);
+      return true;
+    }
+  }
+  return false;
+}
+
+bool XCoreDAGToDAGISel::SelectADDRcpii(SDValue Op, SDValue Addr,
+                                  SDValue &Base, SDValue &Offset) {
+  if (Addr.getOpcode() == XCoreISD::CPRelativeWrapper) {
+    Base = Addr.getOperand(0);
+    Offset = CurDAG->getTargetConstant(0, MVT::i32);
+    return true;
+  }
+  if (Addr.getOpcode() == ISD::ADD) {
+    ConstantSDNode *CN = 0;
+    if ((Addr.getOperand(0).getOpcode() == XCoreISD::CPRelativeWrapper)
+      && (CN = dyn_cast(Addr.getOperand(1)))
+      && (CN->getSExtValue() % 4 == 0)) {
+      // Constant word offset from a object in the data region
+      Base = Addr.getOperand(0).getOperand(0);
+      Offset = CurDAG->getTargetConstant(CN->getSExtValue(), MVT::i32);
+      return true;
+    }
+  }
+  return false;
+}
+
+/// InstructionSelect - This callback is invoked by
+/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
+void XCoreDAGToDAGISel::
+InstructionSelect() {
+  DEBUG(BB->dump());
+
+  // Select target instructions for the DAG.
+  SelectRoot(*CurDAG);
+  
+  CurDAG->RemoveDeadNodes();
+}
+
+SDNode *XCoreDAGToDAGISel::Select(SDValue Op) {
+  SDNode *N = Op.getNode();
+  MVT NVT = N->getValueType(0);
+  if (NVT == MVT::i32) {
+    switch (N->getOpcode()) {
+      default: break;
+      case ISD::Constant: {
+        if (Predicate_immMskBitp(N)) {
+          SDValue MskSize = Transform_msksize_xform(N);
+          return CurDAG->getTargetNode(XCore::MKMSK_rus, MVT::i32, MskSize);
+        }
+        else if (! Predicate_immU16(N)) {
+          unsigned Val = cast(N)->getZExtValue();
+          SDValue CPIdx =
+            CurDAG->getTargetConstantPool(ConstantInt::get(Type::Int32Ty, Val),
+                                          TLI.getPointerTy());
+          return CurDAG->getTargetNode(XCore::LDWCP_lru6, MVT::i32, MVT::Other,
+                                            CPIdx, CurDAG->getEntryNode());
+        }
+        break;
+      }
+      case ISD::SMUL_LOHI: {
+        // FIXME fold addition into the macc instruction
+        if (!Subtarget.isXS1A()) {
+          SDValue Zero(CurDAG->getTargetNode(XCore::LDC_ru6, MVT::i32,
+                                  CurDAG->getTargetConstant(0, MVT::i32)), 0);
+          SDValue Ops[] = { Zero, Zero, Op.getOperand(0), Op.getOperand(1) };
+          SDNode *ResNode = CurDAG->getTargetNode(XCore::MACCS_l4r, MVT::i32,
+                                                  MVT::i32, Ops, 4);
+          ReplaceUses(SDValue(N, 0), SDValue(ResNode, 1));
+          ReplaceUses(SDValue(N, 1), SDValue(ResNode, 0));
+          return NULL;
+        }
+        break;
+      }
+      case ISD::UMUL_LOHI: {
+        // FIXME fold addition into the macc / lmul instruction
+        SDValue Zero(CurDAG->getTargetNode(XCore::LDC_ru6, MVT::i32,
+                                  CurDAG->getTargetConstant(0, MVT::i32)), 0);
+        SDValue Ops[] = { Op.getOperand(0), Op.getOperand(1),
+                            Zero, Zero };
+        SDNode *ResNode = CurDAG->getTargetNode(XCore::LMUL_l6r, MVT::i32,
+                                                MVT::i32, Ops, 4);
+        ReplaceUses(SDValue(N, 0), SDValue(ResNode, 1));
+        ReplaceUses(SDValue(N, 1), SDValue(ResNode, 0));
+        return NULL;
+      }
+      case XCoreISD::LADD: {
+        if (!Subtarget.isXS1A()) {
+          SDValue Ops[] = { Op.getOperand(0), Op.getOperand(1),
+                              Op.getOperand(2) };
+          return CurDAG->getTargetNode(XCore::LADD_l5r, MVT::i32, MVT::i32,
+                                       Ops, 3);
+        }
+        break;
+      }
+      case XCoreISD::LSUB: {
+        if (!Subtarget.isXS1A()) {
+          SDValue Ops[] = { Op.getOperand(0), Op.getOperand(1),
+                              Op.getOperand(2) };
+          return CurDAG->getTargetNode(XCore::LSUB_l5r, MVT::i32, MVT::i32,
+                                       Ops, 3);
+        }
+        break;
+      }
+      // Other cases are autogenerated.
+    }
+  }
+  return SelectCode(Op);
+}

Added: llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp (added)
+++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp Fri Nov  7 04:59:00 2008
@@ -0,0 +1,919 @@
+//===-- XCoreISelLowering.cpp - XCore DAG Lowering Implementation   ------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements the XCoreTargetLowering class.
+//
+//===----------------------------------------------------------------------===//
+
+#define DEBUG_TYPE "xcore-lower"
+
+#include "XCoreISelLowering.h"
+#include "XCoreMachineFunctionInfo.h"
+#include "XCore.h"
+#include "XCoreTargetMachine.h"
+#include "XCoreSubtarget.h"
+#include "llvm/DerivedTypes.h"
+#include "llvm/Function.h"
+#include "llvm/Intrinsics.h"
+#include "llvm/CallingConv.h"
+#include "llvm/GlobalVariable.h"
+#include "llvm/GlobalAlias.h"
+#include "llvm/CodeGen/CallingConvLower.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/SelectionDAGISel.h"
+#include "llvm/CodeGen/ValueTypes.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/ADT/VectorExtras.h"
+#include 
+#include 
+using namespace llvm;
+
+const char *XCoreTargetLowering::
+getTargetNodeName(unsigned Opcode) const 
+{
+  switch (Opcode) 
+  {
+    case XCoreISD::BL                : return "XCoreISD::BL";
+    case XCoreISD::PCRelativeWrapper : return "XCoreISD::PCRelativeWrapper";
+    case XCoreISD::DPRelativeWrapper : return "XCoreISD::DPRelativeWrapper";
+    case XCoreISD::CPRelativeWrapper : return "XCoreISD::CPRelativeWrapper";
+    case XCoreISD::STWSP             : return "XCoreISD::STWSP";
+    case XCoreISD::RETSP             : return "XCoreISD::RETSP";
+    default                           : return NULL;
+  }
+}
+
+XCoreTargetLowering::XCoreTargetLowering(XCoreTargetMachine &XTM)
+  : TargetLowering(XTM),
+    TM(XTM),
+    Subtarget(*XTM.getSubtargetImpl()) {
+
+  // Set up the register classes.
+  addRegisterClass(MVT::i32, XCore::GRRegsRegisterClass);
+
+  // Compute derived properties from the register classes
+  computeRegisterProperties();
+
+  // Division is expensive
+  setIntDivIsCheap(false);
+
+  setShiftAmountType(MVT::i32);
+  // shl X, 32 == 0
+  setShiftAmountFlavor(Extend);
+  setStackPointerRegisterToSaveRestore(XCore::SP);
+
+  setSchedulingPreference(SchedulingForRegPressure);
+
+  // Use i32 for setcc operations results (slt, sgt, ...).
+  setSetCCResultContents(ZeroOrOneSetCCResult);
+
+  // XCore does not have the NodeTypes below.
+  setOperationAction(ISD::BR_CC,     MVT::Other, Expand);
+  setOperationAction(ISD::SELECT_CC, MVT::i32,   Custom);
+  setOperationAction(ISD::ADDC, MVT::i32, Expand);
+  setOperationAction(ISD::ADDE, MVT::i32, Expand);
+  setOperationAction(ISD::SUBC, MVT::i32, Expand);
+  setOperationAction(ISD::SUBE, MVT::i32, Expand);
+
+  // Stop the combiner recombining select and set_cc
+  setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
+  
+  // 64bit
+  setOperationAction(ISD::ADD, MVT::i64, Custom);
+  setOperationAction(ISD::SUB, MVT::i64, Custom);
+  
+  if (Subtarget.isXS1A()) {
+    setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
+  }
+  setOperationAction(ISD::MULHS, MVT::i32, Expand);
+  setOperationAction(ISD::MULHU, MVT::i32, Expand);
+  setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
+  setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
+  setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand);
+  
+  // Bit Manipulation
+  setOperationAction(ISD::CTPOP, MVT::i32, Expand);
+  setOperationAction(ISD::ROTL , MVT::i32, Expand);
+  setOperationAction(ISD::ROTR , MVT::i32, Expand);
+  
+  // Expand jump tables for now
+  setOperationAction(ISD::BR_JT, MVT::Other, Expand);
+  setOperationAction(ISD::JumpTable, MVT::i32, Custom);
+
+  // RET must be custom lowered, to meet ABI requirements
+  setOperationAction(ISD::RET,           MVT::Other, Custom);
+
+  setOperationAction(ISD::GlobalAddress, MVT::i32,   Custom);
+  
+  // Thread Local Storage
+  setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom);
+  
+  // Conversion of i64 -> double produces constantpool nodes
+  setOperationAction(ISD::ConstantPool, MVT::i32,   Custom);
+
+  // Loads
+  setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
+  setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
+  setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
+
+  setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Expand);
+  setLoadExtAction(ISD::ZEXTLOAD, MVT::i16, Expand);
+  
+  // Varargs
+  setOperationAction(ISD::VAEND, MVT::Other, Expand);
+  setOperationAction(ISD::VACOPY, MVT::Other, Expand);
+  setOperationAction(ISD::VAARG, MVT::Other, Custom);
+  setOperationAction(ISD::VASTART, MVT::Other, Custom);
+  
+  // Dynamic stack
+  setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
+  setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
+  setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
+  
+  // Debug
+  setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
+  setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
+}
+
+SDValue XCoreTargetLowering::
+LowerOperation(SDValue Op, SelectionDAG &DAG) {
+  switch (Op.getOpcode()) 
+  {
+  case ISD::CALL:             return LowerCALL(Op, DAG);
+  case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG);
+  case ISD::RET:              return LowerRET(Op, DAG);
+  case ISD::GlobalAddress:    return LowerGlobalAddress(Op, DAG);
+  case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
+  case ISD::ConstantPool:     return LowerConstantPool(Op, DAG);
+  case ISD::JumpTable:        return LowerJumpTable(Op, DAG);
+  case ISD::SELECT_CC:        return LowerSELECT_CC(Op, DAG);
+  case ISD::VAARG:            return LowerVAARG(Op, DAG);
+  case ISD::VASTART:          return LowerVASTART(Op, DAG);
+  // FIXME: Remove these when LegalizeDAGTypes lands.
+  case ISD::ADD:
+  case ISD::SUB:              return SDValue(ExpandADDSUB(Op.getNode(), DAG),0);
+  
+  case ISD::FRAMEADDR:        return LowerFRAMEADDR(Op, DAG);
+  default:
+    assert(0 && "unimplemented operand");
+    return SDValue();
+  }
+}
+
+SDNode *XCoreTargetLowering::
+ExpandOperationResult(SDNode *N, SelectionDAG &DAG) {
+  switch (N->getOpcode()) {
+  case ISD::SUB:
+  case ISD::ADD:
+    return ExpandADDSUB(N, DAG);
+  default:
+    assert(0 && "Wasn't expecting to be able to lower this!");
+    return NULL;
+  }
+}
+
+//===----------------------------------------------------------------------===//
+//  Misc Lower Operation implementation
+//===----------------------------------------------------------------------===//
+
+SDValue XCoreTargetLowering::
+LowerSELECT_CC(SDValue Op, SelectionDAG &DAG)
+{
+  SDValue Cond = DAG.getNode(ISD::SETCC, MVT::i32, Op.getOperand(2),
+                             Op.getOperand(3), Op.getOperand(4));
+  return DAG.getNode(ISD::SELECT, MVT::i32, Cond, Op.getOperand(0),
+                     Op.getOperand(1));
+}
+
+SDValue XCoreTargetLowering::
+getGlobalAddressWrapper(SDValue GA, GlobalValue *GV, SelectionDAG &DAG)
+{
+  if (isa(GV)) {
+    return DAG.getNode(XCoreISD::PCRelativeWrapper, MVT::i32, GA);
+  } else if (!Subtarget.isXS1A()) {
+    const GlobalVariable *GVar = dyn_cast(GV);
+    if (!GVar) {
+      // If GV is an alias then use the aliasee to determine constness
+      if (const GlobalAlias *GA = dyn_cast(GV))
+        GVar = dyn_cast_or_null(GA->resolveAliasedGlobal());
+    }
+    bool isConst = GVar && GVar->isConstant();
+    if (isConst) {
+      return DAG.getNode(XCoreISD::CPRelativeWrapper, MVT::i32, GA);
+    }
+  }
+  return DAG.getNode(XCoreISD::DPRelativeWrapper, MVT::i32, GA);
+}
+
+SDValue XCoreTargetLowering::
+LowerGlobalAddress(SDValue Op, SelectionDAG &DAG)
+{
+  GlobalValue *GV = cast(Op)->getGlobal();
+  SDValue GA = DAG.getTargetGlobalAddress(GV, MVT::i32);
+  // If it's a debug information descriptor, don't mess with it.
+  if (DAG.isVerifiedDebugInfoDesc(Op))
+    return GA;
+  return getGlobalAddressWrapper(GA, GV, DAG);
+}
+
+static inline SDValue BuildGetId(SelectionDAG &DAG) {
+  // TODO
+  assert(0 && "Unimplemented");
+  return SDValue();
+}
+
+static inline bool isZeroLengthArray(const Type *Ty) {
+  const ArrayType *AT = dyn_cast_or_null(Ty);
+  return AT && (AT->getNumElements() == 0);
+}
+
+SDValue XCoreTargetLowering::
+LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG)
+{
+  // transform to label + getid() * size
+  GlobalValue *GV = cast(Op)->getGlobal();
+  SDValue GA = DAG.getTargetGlobalAddress(GV, MVT::i32);
+  const GlobalVariable *GVar = dyn_cast(GV);
+  if (!GVar) {
+    // If GV is an alias then use the aliasee to determine size
+    if (const GlobalAlias *GA = dyn_cast(GV))
+      GVar = dyn_cast_or_null(GA->resolveAliasedGlobal());
+  }
+  if (! GVar) {
+    assert(0 && "Thread local object not a GlobalVariable?");
+    return SDValue();
+  }
+  const Type *Ty = cast(GV->getType())->getElementType();
+  if (!Ty->isSized() || isZeroLengthArray(Ty)) {
+    cerr << "Size of thread local object " << GVar->getName()
+         << " is unknown\n";
+    abort();
+  }
+  SDValue base = getGlobalAddressWrapper(GA, GV, DAG);
+  const TargetData *TD = TM.getTargetData();
+  unsigned Size = TD->getABITypeSize(Ty);
+  SDValue offset = DAG.getNode(ISD::MUL, MVT::i32, BuildGetId(DAG),
+                       DAG.getConstant(Size, MVT::i32));
+  return DAG.getNode(ISD::ADD, MVT::i32, base, offset);
+}
+
+SDValue XCoreTargetLowering::
+LowerConstantPool(SDValue Op, SelectionDAG &DAG)
+{
+  ConstantPoolSDNode *CP = cast(Op);
+  if (Subtarget.isXS1A()) {
+    assert(0 && "Lowering of constant pool unimplemented");
+    return SDValue();
+  } else {
+    MVT PtrVT = Op.getValueType();
+    SDValue Res;
+    if (CP->isMachineConstantPoolEntry()) {
+      Res = DAG.getTargetConstantPool(CP->getMachineCPVal(), PtrVT,
+                                      CP->getAlignment());
+    } else {
+      Res = DAG.getTargetConstantPool(CP->getConstVal(), PtrVT,
+                                      CP->getAlignment());
+    }
+    return DAG.getNode(XCoreISD::CPRelativeWrapper, MVT::i32, Res);
+  }
+}
+
+SDValue XCoreTargetLowering::
+LowerJumpTable(SDValue Op, SelectionDAG &DAG)
+{
+  MVT PtrVT = Op.getValueType();
+  JumpTableSDNode *JT = cast(Op);
+  SDValue JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT);
+  return DAG.getNode(XCoreISD::DPRelativeWrapper, MVT::i32, JTI);
+}
+
+SDNode *XCoreTargetLowering::
+ExpandADDSUB(SDNode *N, SelectionDAG &DAG)
+{
+  assert(N->getValueType(0) == MVT::i64 &&
+         (N->getOpcode() == ISD::ADD || N->getOpcode() == ISD::SUB) &&
+        "Unknown operand to lower!");
+  
+  // Extract components
+  SDValue LHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, N->getOperand(0),
+                             DAG.getConstant(0, MVT::i32));
+  SDValue LHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, N->getOperand(0),
+                             DAG.getConstant(1, MVT::i32));
+  SDValue RHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, N->getOperand(1),
+                             DAG.getConstant(0, MVT::i32));
+  SDValue RHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, MVT::i32, N->getOperand(1),
+                             DAG.getConstant(1, MVT::i32));
+  
+  // Expand
+  if (Subtarget.isXS1A()) {
+    SDValue Lo = DAG.getNode(N->getOpcode(), MVT::i32, LHSL, RHSL);
+    
+    ISD::CondCode CarryCC = (N->getOpcode() == ISD::ADD) ? ISD::SETULT :
+                                                           ISD::SETUGT;
+    SDValue Carry = DAG.getSetCC(MVT::i32, Lo, LHSL, CarryCC);
+    
+    SDValue Hi = DAG.getNode(N->getOpcode(), MVT::i32, LHSH, Carry);
+    Hi = DAG.getNode(N->getOpcode(), MVT::i32, Hi, RHSH);
+    // Merge the pieces
+    return DAG.getNode(ISD::BUILD_PAIR, MVT::i64, Lo, Hi).getNode();
+  }
+  unsigned Opcode = (N->getOpcode() == ISD::ADD) ? XCoreISD::LADD :
+                                                   XCoreISD::LSUB;
+  SDValue Zero = DAG.getConstant(0, MVT::i32);
+  SDValue Carry = DAG.getNode(Opcode, DAG.getVTList(MVT::i32, MVT::i32),
+                                  LHSL, RHSL, Zero);
+  SDValue Lo(Carry.getNode(), 1);
+  
+  SDValue Ignored = DAG.getNode(Opcode, DAG.getVTList(MVT::i32, MVT::i32),
+                                  LHSH, RHSH, Carry);
+  SDValue Hi(Ignored.getNode(), 1);
+  // Merge the pieces
+  return DAG.getNode(ISD::BUILD_PAIR, MVT::i64, Lo, Hi).getNode();
+}
+
+SDValue XCoreTargetLowering::
+LowerVAARG(SDValue Op, SelectionDAG &DAG)
+{
+  assert(0 && "unimplemented");
+  // FIX Arguments passed by reference need a extra dereference.
+  SDNode *Node = Op.getNode();
+  const Value *V = cast(Node->getOperand(2))->getValue();
+  MVT VT = Node->getValueType(0);
+  SDValue VAList = DAG.getLoad(getPointerTy(), Node->getOperand(0),
+                               Node->getOperand(1), V, 0);
+  // Increment the pointer, VAList, to the next vararg
+  SDValue Tmp3 = DAG.getNode(ISD::ADD, getPointerTy(), VAList, 
+                     DAG.getConstant(VT.getSizeInBits(), 
+                                     getPointerTy()));
+  // Store the incremented VAList to the legalized pointer
+  Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Node->getOperand(1), V, 0);
+  // Load the actual argument out of the pointer VAList
+  return DAG.getLoad(VT, Tmp3, VAList, NULL, 0);
+}
+
+SDValue XCoreTargetLowering::
+LowerVASTART(SDValue Op, SelectionDAG &DAG)
+{
+  // vastart stores the address of the VarArgsFrameIndex slot into the
+  // memory location argument
+  MachineFunction &MF = DAG.getMachineFunction();
+  XCoreFunctionInfo *XFI = MF.getInfo();
+  SDValue Addr = DAG.getFrameIndex(XFI->getVarArgsFrameIndex(), MVT::i32);
+  const Value *SV = cast(Op.getOperand(2))->getValue();
+  return DAG.getStore(Op.getOperand(0), Addr, Op.getOperand(1), SV, 0);
+}
+
+SDValue XCoreTargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) {
+  // Depths > 0 not supported yet! 
+  if (cast(Op.getOperand(0))->getZExtValue() > 0)
+    return SDValue();
+  
+  MachineFunction &MF = DAG.getMachineFunction();
+  const TargetRegisterInfo *RegInfo = getTargetMachine().getRegisterInfo();
+  return DAG.getCopyFromReg(DAG.getEntryNode(), RegInfo->getFrameRegister(MF),
+    MVT::i32);
+}
+
+//===----------------------------------------------------------------------===//
+//                      Calling Convention Implementation
+//
+//  The lower operations present on calling convention works on this order:
+//      LowerCALL (virt regs --> phys regs, virt regs --> stack) 
+//      LowerFORMAL_ARGUMENTS (phys --> virt regs, stack --> virt regs)
+//      LowerRET (virt regs --> phys regs)
+//      LowerCALL (phys regs --> virt regs)
+//
+//===----------------------------------------------------------------------===//
+
+#include "XCoreGenCallingConv.inc"
+
+//===----------------------------------------------------------------------===//
+//                  CALL Calling Convention Implementation
+//===----------------------------------------------------------------------===//
+
+/// XCore custom CALL implementation
+SDValue XCoreTargetLowering::
+LowerCALL(SDValue Op, SelectionDAG &DAG)
+{
+  CallSDNode *TheCall = cast(Op.getNode());
+  unsigned CallingConv = TheCall->getCallingConv();
+  // For now, only CallingConv::C implemented
+  switch (CallingConv) 
+  {
+    default:
+      assert(0 && "Unsupported calling convention");
+    case CallingConv::Fast:
+    case CallingConv::C:
+      return LowerCCCCallTo(Op, DAG, CallingConv);
+  }
+}
+
+/// LowerCCCCallTo - functions arguments are copied from virtual
+/// regs to (physical regs)/(stack frame), CALLSEQ_START and
+/// CALLSEQ_END are emitted.
+/// TODO: isTailCall, sret.
+SDValue XCoreTargetLowering::
+LowerCCCCallTo(SDValue Op, SelectionDAG &DAG, unsigned CC) 
+{
+  CallSDNode *TheCall = cast(Op.getNode());
+  SDValue Chain  = TheCall->getChain();
+  SDValue Callee = TheCall->getCallee();
+  bool isVarArg  = TheCall->isVarArg();
+
+  // Analyze operands of the call, assigning locations to each operand.
+  SmallVector ArgLocs;
+  CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs);
+
+  // The ABI dictates there should be one stack slot available to the callee
+  // on function entry (for saving lr).
+  CCInfo.AllocateStack(4, 4);
+
+  CCInfo.AnalyzeCallOperands(TheCall, CC_XCore);
+
+  // Get a count of how many bytes are to be pushed on the stack.
+  unsigned NumBytes = CCInfo.getNextStackOffset();
+
+  Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, 
+                                 getPointerTy(), true));
+
+  SmallVector, 4> RegsToPass;
+  SmallVector MemOpChains;
+
+  // Walk the register/memloc assignments, inserting copies/loads.
+  for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
+    CCValAssign &VA = ArgLocs[i];
+
+    // Arguments start after the 5 first operands of ISD::CALL
+    SDValue Arg = TheCall->getArg(i);
+
+    // Promote the value if needed.
+    switch (VA.getLocInfo()) {
+      default: assert(0 && "Unknown loc info!");
+      case CCValAssign::Full: break;
+      case CCValAssign::SExt:
+        Arg = DAG.getNode(ISD::SIGN_EXTEND, VA.getLocVT(), Arg);
+        break;
+      case CCValAssign::ZExt:
+        Arg = DAG.getNode(ISD::ZERO_EXTEND, VA.getLocVT(), Arg);
+        break;
+      case CCValAssign::AExt:
+        Arg = DAG.getNode(ISD::ANY_EXTEND, VA.getLocVT(), Arg);
+        break;
+    }
+    
+    // Arguments that can be passed on register must be kept at 
+    // RegsToPass vector
+    if (VA.isRegLoc()) {
+      RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
+    } else {
+      assert(VA.isMemLoc());
+
+      int Offset = VA.getLocMemOffset();
+
+      MemOpChains.push_back(DAG.getNode(XCoreISD::STWSP, MVT::Other, Chain, Arg,
+                                        DAG.getConstant(Offset/4, MVT::i32)));
+    }
+  }
+
+  // Transform all store nodes into one single node because
+  // all store nodes are independent of each other.
+  if (!MemOpChains.empty())
+    Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, 
+                        &MemOpChains[0], MemOpChains.size());
+
+  // Build a sequence of copy-to-reg nodes chained together with token 
+  // chain and flag operands which copy the outgoing args into registers.
+  // The InFlag in necessary since all emited instructions must be
+  // stuck together.
+  SDValue InFlag;
+  for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
+    Chain = DAG.getCopyToReg(Chain, RegsToPass[i].first, 
+                             RegsToPass[i].second, InFlag);
+    InFlag = Chain.getValue(1);
+  }
+
+  // If the callee is a GlobalAddress node (quite common, every direct call is)
+  // turn it into a TargetGlobalAddress node so that legalize doesn't hack it.
+  // Likewise ExternalSymbol -> TargetExternalSymbol.
+  if (GlobalAddressSDNode *G = dyn_cast(Callee))
+    Callee = DAG.getTargetGlobalAddress(G->getGlobal(), MVT::i32);
+  else if (ExternalSymbolSDNode *E = dyn_cast(Callee))
+    Callee = DAG.getTargetExternalSymbol(E->getSymbol(), MVT::i32);
+
+  // XCoreBranchLink = #chain, #target_address, #opt_in_flags...
+  //             = Chain, Callee, Reg#1, Reg#2, ...  
+  //
+  // Returns a chain & a flag for retval copy to use.
+  SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag);
+  SmallVector Ops;
+  Ops.push_back(Chain);
+  Ops.push_back(Callee);
+
+  // Add argument registers to the end of the list so that they are 
+  // known live into the call.
+  for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
+    Ops.push_back(DAG.getRegister(RegsToPass[i].first,
+                                  RegsToPass[i].second.getValueType()));
+
+  if (InFlag.getNode())
+    Ops.push_back(InFlag);
+
+  Chain  = DAG.getNode(XCoreISD::BL, NodeTys, &Ops[0], Ops.size());
+  InFlag = Chain.getValue(1);
+
+  // Create the CALLSEQ_END node.
+  Chain = DAG.getCALLSEQ_END(Chain,
+                             DAG.getConstant(NumBytes, getPointerTy(), true),
+                             DAG.getConstant(0, getPointerTy(), true),
+                             InFlag);
+  InFlag = Chain.getValue(1);
+
+  // Handle result values, copying them out of physregs into vregs that we
+  // return.
+  return SDValue(LowerCallResult(Chain, InFlag, TheCall, CC, DAG),
+                 Op.getResNo());
+}
+
+/// LowerCallResult - Lower the result values of an ISD::CALL into the
+/// appropriate copies out of appropriate physical registers.  This assumes that
+/// Chain/InFlag are the input chain/flag to use, and that TheCall is the call
+/// being lowered. Returns a SDNode with the same number of values as the 
+/// ISD::CALL.
+SDNode *XCoreTargetLowering::
+LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall, 
+        unsigned CallingConv, SelectionDAG &DAG) {
+  bool isVarArg = TheCall->isVarArg();
+
+  // Assign locations to each value returned by this call.
+  SmallVector RVLocs;
+  CCState CCInfo(CallingConv, isVarArg, getTargetMachine(), RVLocs);
+
+  CCInfo.AnalyzeCallResult(TheCall, RetCC_XCore);
+  SmallVector ResultVals;
+
+  // Copy all of the result registers out of their specified physreg.
+  for (unsigned i = 0; i != RVLocs.size(); ++i) {
+    Chain = DAG.getCopyFromReg(Chain, RVLocs[i].getLocReg(),
+                                 RVLocs[i].getValVT(), InFlag).getValue(1);
+    InFlag = Chain.getValue(2);
+    ResultVals.push_back(Chain.getValue(0));
+  }
+
+  ResultVals.push_back(Chain);
+
+  // Merge everything together with a MERGE_VALUES node.
+  return DAG.getNode(ISD::MERGE_VALUES, TheCall->getVTList(),
+                     &ResultVals[0], ResultVals.size()).getNode();
+}
+
+//===----------------------------------------------------------------------===//
+//             FORMAL_ARGUMENTS Calling Convention Implementation
+//===----------------------------------------------------------------------===//
+
+/// XCore custom FORMAL_ARGUMENTS implementation
+SDValue XCoreTargetLowering::
+LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) 
+{
+  unsigned CC = cast(Op.getOperand(1))->getZExtValue();
+  switch(CC) 
+  {
+    default:
+      assert(0 && "Unsupported calling convention");
+    case CallingConv::C:
+    case CallingConv::Fast:
+      return LowerCCCArguments(Op, DAG);
+  }
+}
+
+/// LowerCCCArguments - transform physical registers into
+/// virtual registers and generate load operations for
+/// arguments places on the stack.
+/// TODO: sret
+SDValue XCoreTargetLowering::
+LowerCCCArguments(SDValue Op, SelectionDAG &DAG)
+{
+  MachineFunction &MF = DAG.getMachineFunction();
+  MachineFrameInfo *MFI = MF.getFrameInfo();
+  MachineRegisterInfo &RegInfo = MF.getRegInfo();
+  SDValue Root = Op.getOperand(0);
+  bool isVarArg = cast(Op.getOperand(2))->getZExtValue() != 0;
+  unsigned CC = MF.getFunction()->getCallingConv();
+
+  // Assign locations to all of the incoming arguments.
+  SmallVector ArgLocs;
+  CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs);
+
+  CCInfo.AnalyzeFormalArguments(Op.getNode(), CC_XCore);
+
+  unsigned StackSlotSize = XCoreFrameInfo::stackSlotSize();
+
+  SmallVector ArgValues;
+  
+  unsigned LRSaveSize = StackSlotSize;
+  
+  for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
+
+    CCValAssign &VA = ArgLocs[i];
+    
+    if (VA.isRegLoc()) {
+      // Arguments passed in registers
+      MVT RegVT = VA.getLocVT();
+      switch (RegVT.getSimpleVT()) {
+      default:
+        cerr << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
+             << RegVT.getSimpleVT()
+             << "\n";
+        abort();
+      case MVT::i32:
+        unsigned VReg = RegInfo.createVirtualRegister(
+                          XCore::GRRegsRegisterClass);
+        RegInfo.addLiveIn(VA.getLocReg(), VReg);
+        ArgValues.push_back(DAG.getCopyFromReg(Root, VReg, RegVT));
+      }
+    } else {
+      // sanity check
+      assert(VA.isMemLoc());
+      // Load the argument to a virtual register
+      unsigned ObjSize = VA.getLocVT().getSizeInBits()/8;
+      if (ObjSize > StackSlotSize) {
+        cerr << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
+             << VA.getLocVT().getSimpleVT()
+             << "\n";
+      }
+      // Create the frame index object for this incoming parameter...
+      int FI = MFI->CreateFixedObject(ObjSize,
+                                      LRSaveSize + VA.getLocMemOffset());
+
+      // Create the SelectionDAG nodes corresponding to a load
+      //from this parameter
+      SDValue FIN = DAG.getFrameIndex(FI, MVT::i32);
+      ArgValues.push_back(DAG.getLoad(VA.getLocVT(), Root, FIN, NULL, 0));
+    }
+  }
+  
+  if (isVarArg) {
+    /* Argument registers */
+    static const unsigned ArgRegs[] = {
+      XCore::R0, XCore::R1, XCore::R2, XCore::R3
+    };
+    XCoreFunctionInfo *XFI = MF.getInfo();
+    unsigned FirstVAReg = CCInfo.getFirstUnallocated(ArgRegs,
+                                                     array_lengthof(ArgRegs));
+    if (FirstVAReg < array_lengthof(ArgRegs)) {
+      SmallVector MemOps;
+      int offset = 0;
+      // Save remaining registers, storing higher register numbers at a higher
+      // address
+      for (unsigned i = array_lengthof(ArgRegs) - 1; i >= FirstVAReg; --i) {
+        // Create a stack slot
+        int FI = MFI->CreateFixedObject(4, offset);
+        if (i == FirstVAReg) {
+          XFI->setVarArgsFrameIndex(FI);
+        }
+        offset -= StackSlotSize;
+        SDValue FIN = DAG.getFrameIndex(FI, MVT::i32);
+        // Move argument from phys reg -> virt reg
+        unsigned VReg = RegInfo.createVirtualRegister(
+                          XCore::GRRegsRegisterClass);
+        RegInfo.addLiveIn(ArgRegs[i], VReg);
+        SDValue Val = DAG.getCopyFromReg(Root, VReg, MVT::i32);
+        // Move argument from virt reg -> stack
+        SDValue Store = DAG.getStore(Val.getValue(1), Val, FIN, NULL, 0);
+        MemOps.push_back(Store);
+      }
+      if (!MemOps.empty())
+        Root = DAG.getNode(ISD::TokenFactor, MVT::Other,
+                           &MemOps[0], MemOps.size());
+    } else {
+      // This will point to the next argument passed via stack.
+      XFI->setVarArgsFrameIndex(
+          MFI->CreateFixedObject(4, LRSaveSize + CCInfo.getNextStackOffset()));
+    }
+  }
+  
+  ArgValues.push_back(Root);
+
+  // Return the new list of results.
+  std::vector RetVT(Op.getNode()->value_begin(),
+                                    Op.getNode()->value_end());
+  return DAG.getNode(ISD::MERGE_VALUES, RetVT, &ArgValues[0], ArgValues.size());
+}
+
+//===----------------------------------------------------------------------===//
+//               Return Value Calling Convention Implementation
+//===----------------------------------------------------------------------===//
+
+SDValue XCoreTargetLowering::
+LowerRET(SDValue Op, SelectionDAG &DAG)
+{
+  // CCValAssign - represent the assignment of
+  // the return value to a location
+  SmallVector RVLocs;
+  unsigned CC   = DAG.getMachineFunction().getFunction()->getCallingConv();
+  bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg();
+
+  // CCState - Info about the registers and stack slot.
+  CCState CCInfo(CC, isVarArg, getTargetMachine(), RVLocs);
+
+  // Analize return values of ISD::RET
+  CCInfo.AnalyzeReturn(Op.getNode(), RetCC_XCore);
+
+  // If this is the first return lowered for this function, add 
+  // the regs to the liveout set for the function.
+  if (DAG.getMachineFunction().getRegInfo().liveout_empty()) {
+    for (unsigned i = 0; i != RVLocs.size(); ++i)
+      if (RVLocs[i].isRegLoc())
+        DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg());
+  }
+
+  // The chain is always operand #0
+  SDValue Chain = Op.getOperand(0);
+  SDValue Flag;
+
+  // Copy the result values into the output registers.
+  for (unsigned i = 0; i != RVLocs.size(); ++i) {
+    CCValAssign &VA = RVLocs[i];
+    assert(VA.isRegLoc() && "Can only return in registers!");
+
+    // ISD::RET => ret chain, (regnum1,val1), ...
+    // So i*2+1 index only the regnums
+    Chain = DAG.getCopyToReg(Chain, VA.getLocReg(), Op.getOperand(i*2+1), Flag);
+
+    // guarantee that all emitted copies are
+    // stuck together, avoiding something bad
+    Flag = Chain.getValue(1);
+  }
+
+  // Return on XCore is always a "retsp 0"
+  if (Flag.getNode())
+    return DAG.getNode(XCoreISD::RETSP, MVT::Other,
+                       Chain, DAG.getConstant(0, MVT::i32), Flag);
+  else // Return Void
+    return DAG.getNode(XCoreISD::RETSP, MVT::Other,
+                       Chain, DAG.getConstant(0, MVT::i32));
+}
+
+//===----------------------------------------------------------------------===//
+//  Other Lowering Code
+//===----------------------------------------------------------------------===//
+
+MachineBasicBlock *
+XCoreTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
+                                               MachineBasicBlock *BB) {
+  const TargetInstrInfo &TII = *getTargetMachine().getInstrInfo();
+  assert((MI->getOpcode() == XCore::SELECT_CC) &&
+         "Unexpected instr type to insert");
+  
+  // To "insert" a SELECT_CC instruction, we actually have to insert the diamond
+  // control-flow pattern.  The incoming instruction knows the destination vreg
+  // to set, the condition code register to branch on, the true/false values to
+  // select between, and a branch opcode to use.
+  const BasicBlock *LLVM_BB = BB->getBasicBlock();
+  MachineFunction::iterator It = BB;
+  ++It;
+  
+  //  thisMBB:
+  //  ...
+  //   TrueVal = ...
+  //   cmpTY ccX, r1, r2
+  //   bCC copy1MBB
+  //   fallthrough --> copy0MBB
+  MachineBasicBlock *thisMBB = BB;
+  MachineFunction *F = BB->getParent();
+  MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB);
+  MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);
+  BuildMI(BB, TII.get(XCore::BRFT_lru6))
+    .addReg(MI->getOperand(1).getReg()).addMBB(sinkMBB);
+  F->insert(It, copy0MBB);
+  F->insert(It, sinkMBB);
+  // Update machine-CFG edges by transferring all successors of the current
+  // block to the new block which will contain the Phi node for the select.
+  sinkMBB->transferSuccessors(BB);
+  // Next, add the true and fallthrough blocks as its successors.
+  BB->addSuccessor(copy0MBB);
+  BB->addSuccessor(sinkMBB);
+  
+  //  copy0MBB:
+  //   %FalseValue = ...
+  //   # fallthrough to sinkMBB
+  BB = copy0MBB;
+  
+  // Update machine-CFG edges
+  BB->addSuccessor(sinkMBB);
+  
+  //  sinkMBB:
+  //   %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ]
+  //  ...
+  BB = sinkMBB;
+  BuildMI(BB, TII.get(XCore::PHI), MI->getOperand(0).getReg())
+    .addReg(MI->getOperand(3).getReg()).addMBB(copy0MBB)
+    .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB);
+  
+  F->DeleteMachineInstr(MI);   // The pseudo instruction is gone now.
+  return BB;
+}
+
+//===----------------------------------------------------------------------===//
+//  Addressing mode description hooks
+//===----------------------------------------------------------------------===//
+
+static inline bool isImmUs(int64_t val)
+{
+  return (val >= 0 && val <= 11);
+}
+
+static inline bool isImmUs2(int64_t val)
+{
+  return (val%2 == 0 && isImmUs(val/2));
+}
+
+static inline bool isImmUs4(int64_t val)
+{
+  return (val%4 == 0 && isImmUs(val/4));
+}
+
+/// isLegalAddressingMode - Return true if the addressing mode represented
+/// by AM is legal for this target, for a load/store of the specified type.
+bool
+XCoreTargetLowering::isLegalAddressingMode(const AddrMode &AM, 
+                                              const Type *Ty) const {
+  MVT VT = getValueType(Ty, true);
+  // Get expected value type after legalization
+  switch (VT.getSimpleVT()) {
+  // Legal load / stores
+  case MVT::i8:
+  case MVT::i16:
+  case MVT::i32:
+    break;
+  // Expand i1 -> i8
+  case MVT::i1:
+    VT = MVT::i8;
+    break;
+  // Everything else is lowered to words
+  default:
+    VT = MVT::i32;
+    break;
+  }
+  if (AM.BaseGV) {
+    return VT == MVT::i32 && !AM.HasBaseReg && AM.Scale == 0 &&
+                 AM.BaseOffs%4 == 0;
+  }
+  
+  switch (VT.getSimpleVT()) {
+  default:
+    return false;
+  case MVT::i8:
+    // reg + imm
+    if (AM.Scale == 0) {
+      return isImmUs(AM.BaseOffs);
+    }
+    return AM.Scale == 1 && AM.BaseOffs == 0;
+  case MVT::i16:
+    // reg + imm
+    if (AM.Scale == 0) {
+      return isImmUs2(AM.BaseOffs);
+    }
+    return AM.Scale == 2 && AM.BaseOffs == 0;
+  case MVT::i32:
+    // reg + imm
+    if (AM.Scale == 0) {
+      return isImmUs4(AM.BaseOffs);
+    }
+    // reg + reg<<2
+    return AM.Scale == 4 && AM.BaseOffs == 0;
+  }
+  
+  return false;
+}
+
+//===----------------------------------------------------------------------===//
+//                           XCore Inline Assembly Support
+//===----------------------------------------------------------------------===//
+
+std::vector XCoreTargetLowering::
+getRegClassForInlineAsmConstraint(const std::string &Constraint,
+                                  MVT VT) const 
+{
+  if (Constraint.size() != 1)
+    return std::vector();
+
+  switch (Constraint[0]) {
+    default : break;
+    case 'r':
+      return make_vector(XCore::R0, XCore::R1,  XCore::R2, 
+                                   XCore::R3, XCore::R4,  XCore::R5, 
+                                   XCore::R6, XCore::R7,  XCore::R8, 
+                                   XCore::R9, XCore::R10, XCore::R11, 0);
+      break;
+  }
+  return std::vector();
+}

Added: llvm/trunk/lib/Target/XCore/XCoreISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.h?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreISelLowering.h (added)
+++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.h Fri Nov  7 04:59:00 2008
@@ -0,0 +1,119 @@
+//===-- XCoreISelLowering.h - XCore DAG Lowering Interface ------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the interfaces that XCore uses to lower LLVM code into a
+// selection DAG.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef XCOREISELLOWERING_H
+#define XCOREISELLOWERING_H
+
+#include "llvm/CodeGen/SelectionDAG.h"
+#include "llvm/Target/TargetLowering.h"
+#include "XCore.h"
+
+namespace llvm {
+  
+  // Forward delcarations
+  class XCoreSubtarget;
+  class XCoreTargetMachine;
+  
+  namespace XCoreISD {
+    enum NodeType {
+      // Start the numbering where the builtin ops and target ops leave off.
+      FIRST_NUMBER = ISD::BUILTIN_OP_END+XCore::INSTRUCTION_LIST_END,
+
+      // Branch and link (call)
+      BL,
+
+      // pc relative address
+      PCRelativeWrapper,
+
+      // dp relative address
+      DPRelativeWrapper,
+      
+      // cp relative address
+      CPRelativeWrapper,
+      
+      // Store word to stack
+      STWSP,
+
+      // Corresponds to retsp instruction
+      RETSP,
+      
+      // Corresponds to LADD instruction
+      LADD,
+
+      // Corresponds to LSUB instruction
+      LSUB
+    };
+  }
+
+  //===--------------------------------------------------------------------===//
+  // TargetLowering Implementation
+  //===--------------------------------------------------------------------===//
+  class XCoreTargetLowering : public TargetLowering 
+  {
+  public:
+
+    explicit XCoreTargetLowering(XCoreTargetMachine &TM);
+
+    /// LowerOperation - Provide custom lowering hooks for some operations.
+    virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
+  
+    virtual SDNode *ExpandOperationResult(SDNode *N, SelectionDAG &DAG);
+
+    /// getTargetNodeName - This method returns the name of a target specific 
+    //  DAG node.
+    virtual const char *getTargetNodeName(unsigned Opcode) const;
+  
+    virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
+                                                        MachineBasicBlock *MBB);
+
+    virtual bool isLegalAddressingMode(const AddrMode &AM,
+                                       const Type *Ty) const;
+
+  private:
+    const XCoreTargetMachine &TM;
+    const XCoreSubtarget &Subtarget;
+  
+    // Lower Operand helpers
+    SDValue LowerCCCArguments(SDValue Op, SelectionDAG &DAG);
+    SDValue LowerCCCCallTo(SDValue Op, SelectionDAG &DAG, unsigned CC);
+    SDNode *LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode*TheCall,
+                            unsigned CallingConv, SelectionDAG &DAG);
+    SDValue getReturnAddressFrameIndex(SelectionDAG &DAG);
+    SDValue getGlobalAddressWrapper(SDValue GA, GlobalValue *GV,
+                                    SelectionDAG &DAG);
+
+    // Lower Operand specifics
+    SDValue LowerRET(SDValue Op, SelectionDAG &DAG);
+    SDValue LowerCALL(SDValue Op, SelectionDAG &DAG);
+    SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG);
+    SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
+    SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG);
+    SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
+    SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
+    SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
+    SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG);
+    SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG);
+    SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG);
+  
+    // Inline asm support
+    std::vector
+    getRegClassForInlineAsmConstraint(const std::string &Constraint,
+              MVT VT) const;
+  
+    // Expand specifics
+    SDNode *ExpandADDSUB(SDNode *Op, SelectionDAG &DAG);
+  };
+}
+
+#endif // XCOREISELLOWERING_H

Added: llvm/trunk/lib/Target/XCore/XCoreInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrFormats.td?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreInstrFormats.td (added)
+++ llvm/trunk/lib/Target/XCore/XCoreInstrFormats.td Fri Nov  7 04:59:00 2008
@@ -0,0 +1,120 @@
+//===- XCoreInstrFormats.td - XCore Instruction Formats ----*- tablegen -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+//===----------------------------------------------------------------------===//
+// Instruction format superclass
+//===----------------------------------------------------------------------===//
+class InstXCore pattern>
+    : Instruction {
+  field bits<32> Inst;
+
+  let Namespace = "XCore";
+  dag OutOperandList = outs;
+  dag InOperandList = ins;
+  let AsmString   = asmstr;
+  let Pattern = pattern;
+}
+
+// XCore pseudo instructions format
+class PseudoInstXCore pattern>
+   : InstXCore;
+
+//===----------------------------------------------------------------------===//
+// Instruction formats
+//===----------------------------------------------------------------------===//
+
+class _F3R pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _FL3R pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _F2RUS pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _FL2RUS pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _FRU6 pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _FLRU6 pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _FU6 pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _FLU6 pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _FU10 pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _FLU10 pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _F2R pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _FRUS pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _FL2R pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _F1R pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _F0R pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _L4R pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _L5R pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}
+
+class _L6R pattern>
+    : InstXCore {
+  let Inst{31-0} = 0;
+}

Added: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp (added)
+++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp Fri Nov  7 04:59:00 2008
@@ -0,0 +1,506 @@
+//===- XCoreInstrInfo.cpp - XCore Instruction Information -------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the XCore implementation of the TargetInstrInfo class.
+//
+//===----------------------------------------------------------------------===//
+
+#include "XCoreMachineFunctionInfo.h"
+#include "XCoreInstrInfo.h"
+#include "XCore.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineLocation.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "XCoreGenInstrInfo.inc"
+#include "llvm/Support/Debug.h"
+
+namespace llvm {
+namespace XCore {
+
+  // XCore Condition Codes
+  enum CondCode {
+    COND_TRUE,
+    COND_FALSE,
+    COND_INVALID
+  };
+}
+}
+
+using namespace llvm;
+
+XCoreInstrInfo::XCoreInstrInfo(void)
+  : TargetInstrInfoImpl(XCoreInsts, array_lengthof(XCoreInsts)),
+    RI(*this) {
+}
+
+static bool isZeroImm(const MachineOperand &op) {
+  return op.isImm() && op.getImm() == 0;
+}
+
+/// Return true if the instruction is a register to register move and
+/// leave the source and dest operands in the passed parameters.
+///
+bool XCoreInstrInfo::isMoveInstr(const MachineInstr &MI,
+                                 unsigned &SrcReg, unsigned &DstReg) const {
+  // We look for 4 kinds of patterns here:
+  // add dst, src, 0
+  // sub dst, src, 0
+  // or dst, src, src
+  // and dst, src, src
+  if ((MI.getOpcode() == XCore::ADD_2rus || MI.getOpcode() == XCore::SUB_2rus)
+      && isZeroImm(MI.getOperand(2))) {
+    DstReg = MI.getOperand(0).getReg();
+    SrcReg = MI.getOperand(1).getReg();
+    return true;
+  } else if ((MI.getOpcode() == XCore::OR_3r || MI.getOpcode() == XCore::AND_3r)
+      && MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) {
+    DstReg = MI.getOperand(0).getReg();
+    SrcReg = MI.getOperand(1).getReg();
+    return true;
+  }
+  return false;
+}
+
+/// isLoadFromStackSlot - If the specified machine instruction is a direct
+/// load from a stack slot, return the virtual or physical register number of
+/// the destination along with the FrameIndex of the loaded stack slot.  If
+/// not, return 0.  This predicate must return 0 if the instruction has
+/// any side effects other than loading from the stack slot.
+unsigned
+XCoreInstrInfo::isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const{
+  int Opcode = MI->getOpcode();
+  if (Opcode == XCore::LDWSP_ru6 || Opcode == XCore::LDWSP_lru6) 
+  {
+    if ((MI->getOperand(1).isFI()) && // is a stack slot
+        (MI->getOperand(2).isImm()) &&  // the imm is zero
+        (isZeroImm(MI->getOperand(2)))) 
+    {
+      FrameIndex = MI->getOperand(1).getIndex();
+      return MI->getOperand(0).getReg();
+    }
+  }
+  return 0;
+}
+  
+  /// isStoreToStackSlot - If the specified machine instruction is a direct
+  /// store to a stack slot, return the virtual or physical register number of
+  /// the source reg along with the FrameIndex of the loaded stack slot.  If
+  /// not, return 0.  This predicate must return 0 if the instruction has
+  /// any side effects other than storing to the stack slot.
+unsigned
+XCoreInstrInfo::isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const {
+  int Opcode = MI->getOpcode();
+  if (Opcode == XCore::STWSP_ru6 || Opcode == XCore::STWSP_lru6) 
+  {
+    if ((MI->getOperand(1).isFI()) && // is a stack slot
+        (MI->getOperand(2).isImm()) &&  // the imm is zero
+        (isZeroImm(MI->getOperand(2)))) 
+    {
+      FrameIndex = MI->getOperand(1).getIndex();
+      return MI->getOperand(0).getReg();
+    }
+  }
+  else if (Opcode == XCore::STWSP_ru6_2 || Opcode == XCore::STWSP_lru6_2)
+  {
+    if (MI->getOperand(1).isFI())
+    {
+      FrameIndex = MI->getOperand(1).getIndex();
+      return MI->getOperand(0).getReg();
+    }
+  }
+  return 0;
+}
+
+/// isInvariantLoad - Return true if the specified instruction (which is marked
+/// mayLoad) is loading from a location whose value is invariant across the
+/// function.  For example, loading a value from the constant pool or from
+/// from the argument area of a function if it does not change.  This should
+/// only return true of *all* loads the instruction does are invariant (if it
+/// does multiple loads).
+bool
+XCoreInstrInfo::isInvariantLoad(MachineInstr *MI) const {
+  // Loads from constants pools and loads from invariant argument slots are
+  // invariant
+  int Opcode = MI->getOpcode();
+  if (Opcode == XCore::LDWCP_ru6 || Opcode == XCore::LDWCP_lru6) {
+    return MI->getOperand(1).isCPI();
+  }
+  int FrameIndex;
+  if (isLoadFromStackSlot(MI, FrameIndex)) {
+    const MachineFrameInfo &MFI =
+      *MI->getParent()->getParent()->getFrameInfo();
+    return MFI.isFixedObjectIndex(FrameIndex) &&
+           MFI.isImmutableObjectIndex(FrameIndex);
+  }
+  return false;
+}
+
+//===----------------------------------------------------------------------===//
+// Branch Analysis
+//===----------------------------------------------------------------------===//
+
+static inline bool IsBRU(unsigned BrOpc) {
+  return BrOpc == XCore::BRFU_u6
+      || BrOpc == XCore::BRFU_lu6
+      || BrOpc == XCore::BRBU_u6
+      || BrOpc == XCore::BRBU_lu6;
+}
+
+static inline bool IsBRT(unsigned BrOpc) {
+  return BrOpc == XCore::BRFT_ru6
+      || BrOpc == XCore::BRFT_lru6
+      || BrOpc == XCore::BRBT_ru6
+      || BrOpc == XCore::BRBT_lru6;
+}
+
+static inline bool IsBRF(unsigned BrOpc) {
+  return BrOpc == XCore::BRFF_ru6
+      || BrOpc == XCore::BRFF_lru6
+      || BrOpc == XCore::BRBF_ru6
+      || BrOpc == XCore::BRBF_lru6;
+}
+
+static inline bool IsCondBranch(unsigned BrOpc) {
+  return IsBRF(BrOpc) || IsBRT(BrOpc);
+}
+
+/// GetCondFromBranchOpc - Return the XCore CC that matches 
+/// the correspondent Branch instruction opcode.
+static XCore::CondCode GetCondFromBranchOpc(unsigned BrOpc) 
+{
+  if (IsBRT(BrOpc)) {
+    return XCore::COND_TRUE;
+  } else if (IsBRF(BrOpc)) {
+    return XCore::COND_FALSE;
+  } else {
+    return XCore::COND_INVALID;
+  }
+}
+
+/// GetCondBranchFromCond - Return the Branch instruction
+/// opcode that matches the cc.
+static inline unsigned GetCondBranchFromCond(XCore::CondCode CC) 
+{
+  switch (CC) {
+  default: assert(0 && "Illegal condition code!");
+  case XCore::COND_TRUE   : return XCore::BRFT_lru6;
+  case XCore::COND_FALSE  : return XCore::BRFF_lru6;
+  }
+}
+
+/// GetOppositeBranchCondition - Return the inverse of the specified 
+/// condition, e.g. turning COND_E to COND_NE.
+static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC)
+{
+  switch (CC) {
+  default: assert(0 && "Illegal condition code!");
+  case XCore::COND_TRUE   : return XCore::COND_FALSE;
+  case XCore::COND_FALSE  : return XCore::COND_TRUE;
+  }
+}
+
+/// AnalyzeBranch - Analyze the branching code at the end of MBB, returning
+/// true if it cannot be understood (e.g. it's a switch dispatch or isn't
+/// implemented for a target).  Upon success, this returns false and returns
+/// with the following information in various cases:
+///
+/// 1. If this block ends with no branches (it just falls through to its succ)
+///    just return false, leaving TBB/FBB null.
+/// 2. If this block ends with only an unconditional branch, it sets TBB to be
+///    the destination block.
+/// 3. If this block ends with an conditional branch and it falls through to
+///    an successor block, it sets TBB to be the branch destination block and a
+///    list of operands that evaluate the condition. These
+///    operands can be passed to other TargetInstrInfo methods to create new
+///    branches.
+/// 4. If this block ends with an conditional branch and an unconditional
+///    block, it returns the 'true' destination in TBB, the 'false' destination
+///    in FBB, and a list of operands that evaluate the condition. These
+///    operands can be passed to other TargetInstrInfo methods to create new
+///    branches.
+///
+/// Note that RemoveBranch and InsertBranch must be implemented to support
+/// cases where this method returns success.
+///
+bool
+XCoreInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
+                           MachineBasicBlock *&FBB,
+                           SmallVectorImpl &Cond) const {
+  // If the block has no terminators, it just falls into the block after it.
+  MachineBasicBlock::iterator I = MBB.end();
+  if (I == MBB.begin() || !isUnpredicatedTerminator(--I))
+    return false;
+
+  // Get the last instruction in the block.
+  MachineInstr *LastInst = I;
+  
+  // If there is only one terminator instruction, process it.
+  if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
+    if (IsBRU(LastInst->getOpcode())) {
+      TBB = LastInst->getOperand(0).getMBB();
+      return false;
+    }
+    
+    XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode());
+    if (BranchCode == XCore::COND_INVALID)
+      return true;  // Can't handle indirect branch.
+    
+    // Conditional branch
+    // Block ends with fall-through condbranch.
+
+    TBB = LastInst->getOperand(1).getMBB();
+    Cond.push_back(MachineOperand::CreateImm(BranchCode));
+    Cond.push_back(LastInst->getOperand(0));
+    return false;
+  }
+  
+  // Get the instruction before it if it's a terminator.
+  MachineInstr *SecondLastInst = I;
+
+  // If there are three terminators, we don't know what sort of block this is.
+  if (SecondLastInst && I != MBB.begin() &&
+      isUnpredicatedTerminator(--I))
+    return true;
+  
+  unsigned SecondLastOpc    = SecondLastInst->getOpcode();
+  XCore::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc);
+  
+  // If the block ends with conditional branch followed by unconditional,
+  // handle it.
+  if (BranchCode != XCore::COND_INVALID
+    && IsBRU(LastInst->getOpcode())) {
+
+    TBB = SecondLastInst->getOperand(1).getMBB();
+    Cond.push_back(MachineOperand::CreateImm(BranchCode));
+    Cond.push_back(SecondLastInst->getOperand(0));
+
+    FBB = LastInst->getOperand(0).getMBB();
+    return false;
+  }
+  
+  // If the block ends with two unconditional branches, handle it.  The second
+  // one is not executed, so remove it.
+  if (IsBRU(SecondLastInst->getOpcode()) && 
+      IsBRU(LastInst->getOpcode())) {
+    TBB = SecondLastInst->getOperand(0).getMBB();
+    I = LastInst;
+    I->eraseFromParent();
+    return false;
+  }
+
+  // Otherwise, can't handle this.
+  return true;
+}
+
+unsigned
+XCoreInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB,
+                             MachineBasicBlock *FBB,
+                             const SmallVectorImpl &Cond)const{
+  // Shouldn't be a fall through.
+  assert(TBB && "InsertBranch must not be told to insert a fallthrough");
+  assert((Cond.size() == 2 || Cond.size() == 0) &&
+         "Unexpected number of components!");
+  
+  if (FBB == 0) { // One way branch.
+    if (Cond.empty()) {
+      // Unconditional branch
+      BuildMI(&MBB, get(XCore::BRFU_lu6)).addMBB(TBB);
+    } else {
+      // Conditional branch.
+      unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm());
+      BuildMI(&MBB, get(Opc)).addReg(Cond[1].getReg())
+                             .addMBB(TBB);
+    }
+    return 1;
+  }
+  
+  // Two-way Conditional branch.
+  assert(Cond.size() == 2 && "Unexpected number of components!");
+  unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm());
+  BuildMI(&MBB, get(Opc)).addReg(Cond[1].getReg())
+                         .addMBB(TBB);
+  BuildMI(&MBB, get(XCore::BRFU_lu6)).addMBB(FBB);
+  return 2;
+}
+
+unsigned
+XCoreInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
+  MachineBasicBlock::iterator I = MBB.end();
+  if (I == MBB.begin()) return 0;
+  --I;
+  if (!IsBRU(I->getOpcode()) && !IsCondBranch(I->getOpcode()))
+    return 0;
+  
+  // Remove the branch.
+  I->eraseFromParent();
+  
+  I = MBB.end();
+
+  if (I == MBB.begin()) return 1;
+  --I;
+  if (!IsCondBranch(I->getOpcode()))
+    return 1;
+  
+  // Remove the branch.
+  I->eraseFromParent();
+  return 2;
+}
+
+bool XCoreInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
+                                     MachineBasicBlock::iterator I,
+                                     unsigned DestReg, unsigned SrcReg,
+                                     const TargetRegisterClass *DestRC,
+                                     const TargetRegisterClass *SrcRC) const {
+  if (DestRC == SrcRC) {
+    if (DestRC == XCore::GRRegsRegisterClass) {
+      BuildMI(MBB, I, get(XCore::ADD_2rus), DestReg).addReg(SrcReg).addImm(0);
+      return true;
+    } else {
+      return false;
+    }
+  }
+  
+  if (SrcRC == XCore::RRegsRegisterClass && SrcReg == XCore::SP &&
+    DestRC == XCore::GRRegsRegisterClass) {
+    BuildMI(MBB, I, get(XCore::LDAWSP_ru6), DestReg).addImm(0).addImm(0);
+    return true;
+  }
+  if (DestRC == XCore::RRegsRegisterClass && DestReg == XCore::SP &&
+    SrcRC == XCore::GRRegsRegisterClass) {
+    BuildMI(MBB, I, get(XCore::SETSP_1r)).addReg(SrcReg);
+    return true;
+  }
+  return false;
+}
+
+void XCoreInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
+                                  MachineBasicBlock::iterator I,
+                                  unsigned SrcReg, bool isKill, int FrameIndex,
+                                  const TargetRegisterClass *RC) const
+{
+  BuildMI(MBB, I, get(XCore::STWSP_lru6)).addReg(SrcReg, false, false, isKill)
+                                         .addFrameIndex(FrameIndex).addImm(0);
+}
+
+void XCoreInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
+                            bool isKill, SmallVectorImpl &Addr,
+                            const TargetRegisterClass *RC,
+                            SmallVectorImpl &NewMIs) const
+{
+  assert(0 && "unimplemented\n");
+}
+
+void XCoreInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
+                                  MachineBasicBlock::iterator I,
+                                  unsigned DestReg, int FrameIndex,
+                                  const TargetRegisterClass *RC) const
+{
+  BuildMI(MBB, I, get(XCore::LDWSP_lru6), DestReg).addFrameIndex(FrameIndex)
+                                                  .addImm(0);
+}
+
+void XCoreInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
+                              SmallVectorImpl &Addr,
+                              const TargetRegisterClass *RC,
+                              SmallVectorImpl &NewMIs) const
+{
+  assert(0 && "unimplemented\n");
+}
+
+bool XCoreInstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
+				MachineBasicBlock::iterator MI,
+			const std::vector &CSI) const
+{
+  if (CSI.empty()) {
+    return true;
+  }
+  MachineFunction *MF = MBB.getParent();
+  const MachineFrameInfo *MFI = MF->getFrameInfo();
+  MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
+  XCoreFunctionInfo *XFI = MF->getInfo();
+  
+  bool emitFrameMoves = XCoreRegisterInfo::needsFrameMoves(*MF);
+  
+  for (std::vector::const_iterator it = CSI.begin();
+                                                    it != CSI.end(); ++it) {
+    // Add the callee-saved register as live-in. It's killed at the spill.
+    MBB.addLiveIn(it->getReg());
+
+    storeRegToStackSlot(MBB, MI, it->getReg(), true,
+                                   it->getFrameIdx(), it->getRegClass());
+    if (emitFrameMoves) {
+      unsigned SaveLabelId = MMI->NextLabelID();
+      BuildMI(MBB, MI, get(XCore::DBG_LABEL)).addImm(SaveLabelId);
+      XFI->getSpillLabels().push_back(
+          std::pair(SaveLabelId, *it));
+    }
+  }
+  return true;
+}
+
+bool XCoreInstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
+                                         MachineBasicBlock::iterator MI,
+                               const std::vector &CSI) const
+{
+  bool AtStart = MI == MBB.begin();
+  MachineBasicBlock::iterator BeforeI = MI;
+  if (!AtStart)
+    --BeforeI;
+  for (std::vector::const_iterator it = CSI.begin();
+                                                    it != CSI.end(); ++it) {
+    
+    loadRegFromStackSlot(MBB, MI, it->getReg(),
+                                  it->getFrameIdx(),
+                                  it->getRegClass());
+    assert(MI != MBB.begin() &&
+           "loadRegFromStackSlot didn't insert any code!");
+    // Insert in reverse order.  loadRegFromStackSlot can insert multiple
+    // instructions.
+    if (AtStart)
+      MI = MBB.begin();
+    else {
+      MI = BeforeI;
+      ++MI;
+    }
+  }
+  return true;
+}
+
+/// BlockHasNoFallThrough - Analyse if MachineBasicBlock does not
+/// fall-through into its successor block.
+bool XCoreInstrInfo::
+BlockHasNoFallThrough(const MachineBasicBlock &MBB) const 
+{
+  if (MBB.empty()) return false;
+  
+  switch (MBB.back().getOpcode()) {
+  case XCore::RETSP_u6:     // Return.
+  case XCore::RETSP_lu6:
+  case XCore::BAU_1r:       // Indirect branch.
+  case XCore::BRFU_u6:      // Uncond branch.
+  case XCore::BRFU_lu6:
+  case XCore::BRBU_u6:
+  case XCore::BRBU_lu6:
+    return true;
+  default: return false;
+  }
+}
+
+/// ReverseBranchCondition - Return the inverse opcode of the 
+/// specified Branch instruction.
+bool XCoreInstrInfo::
+ReverseBranchCondition(SmallVectorImpl &Cond) const 
+{
+  assert((Cond.size() == 2) && 
+          "Invalid XCore branch condition!");
+  Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm()));
+  return false;
+}

Added: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h (added)
+++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h Fri Nov  7 04:59:00 2008
@@ -0,0 +1,107 @@
+//===- XCoreInstrInfo.h - XCore Instruction Information ---------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the XCore implementation of the TargetInstrInfo class.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef XCOREINSTRUCTIONINFO_H
+#define XCOREINSTRUCTIONINFO_H
+
+#include "llvm/Target/TargetInstrInfo.h"
+#include "XCoreRegisterInfo.h"
+
+namespace llvm {
+
+class XCoreInstrInfo : public TargetInstrInfoImpl {
+  const XCoreRegisterInfo RI;
+public:
+  XCoreInstrInfo(void);
+
+  /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
+  /// such, whenever a client has an instance of instruction info, it should
+  /// always be able to get register info as well (through this method).
+  ///
+  virtual const TargetRegisterInfo &getRegisterInfo() const { return RI; }
+
+  /// Return true if the instruction is a register to register move and
+  /// leave the source and dest operands in the passed parameters.
+  ///
+  virtual bool isMoveInstr(const MachineInstr &MI,
+                           unsigned &SrcReg, unsigned &DstReg) const;
+  
+  /// isLoadFromStackSlot - If the specified machine instruction is a direct
+  /// load from a stack slot, return the virtual or physical register number of
+  /// the destination along with the FrameIndex of the loaded stack slot.  If
+  /// not, return 0.  This predicate must return 0 if the instruction has
+  /// any side effects other than loading from the stack slot.
+  virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
+  
+  /// isStoreToStackSlot - If the specified machine instruction is a direct
+  /// store to a stack slot, return the virtual or physical register number of
+  /// the source reg along with the FrameIndex of the loaded stack slot.  If
+  /// not, return 0.  This predicate must return 0 if the instruction has
+  /// any side effects other than storing to the stack slot.
+  virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
+  
+  virtual bool isInvariantLoad(MachineInstr *MI) const;
+  
+  virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
+                             MachineBasicBlock *&FBB,
+                             SmallVectorImpl &Cond) const;
+  
+  virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
+                             MachineBasicBlock *FBB,
+                             const SmallVectorImpl &Cond) const;
+  
+  virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
+
+  virtual bool copyRegToReg(MachineBasicBlock &MBB,
+                            MachineBasicBlock::iterator I,
+                            unsigned DestReg, unsigned SrcReg,
+                            const TargetRegisterClass *DestRC,
+                            const TargetRegisterClass *SrcRC) const;
+
+  virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
+                                   MachineBasicBlock::iterator MI,
+                                   unsigned SrcReg, bool isKill, int FrameIndex,
+                                   const TargetRegisterClass *RC) const;
+
+  virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
+                              SmallVectorImpl &Addr,
+                              const TargetRegisterClass *RC,
+                              SmallVectorImpl &NewMIs) const;
+
+  virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
+                                    MachineBasicBlock::iterator MI,
+                                    unsigned DestReg, int FrameIndex,
+                                    const TargetRegisterClass *RC) const;
+
+  virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
+                               SmallVectorImpl &Addr,
+                               const TargetRegisterClass *RC,
+                               SmallVectorImpl &NewMIs) const;
+			       
+  virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
+                                        MachineBasicBlock::iterator MI,
+                                const std::vector &CSI) const;
+  
+  virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
+                                         MachineBasicBlock::iterator MI,
+                               const std::vector &CSI) const;
+
+  virtual bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
+
+  virtual bool ReverseBranchCondition(
+                            SmallVectorImpl &Cond) const;
+};
+
+}
+
+#endif

Added: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td (added)
+++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td Fri Nov  7 04:59:00 2008
@@ -0,0 +1,980 @@
+//===- XCoreInstrInfo.td - Target Description for XCore ----*- tablegen -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file describes the XCore instructions in TableGen format.
+//
+//===----------------------------------------------------------------------===//
+
+// Uses of CP, DP are not currently reflected in the patterns, since
+// having a physical register as an operand prevents loop hoisting and
+// since the value of these registers never changes during the life of the
+// function.
+
+//===----------------------------------------------------------------------===//
+// Instruction format superclass.
+//===----------------------------------------------------------------------===//
+
+include "XCoreInstrFormats.td"
+
+//===----------------------------------------------------------------------===//
+// Feature predicates.
+//===----------------------------------------------------------------------===//
+
+// HasXS1A - This predicate is true when the target processor supports XS1A
+// instructions.
+def HasXS1A   : Predicate<"Subtarget.isXS1A()">;
+
+// HasXS1B - This predicate is true when the target processor supports XS1B
+// instructions.
+def HasXS1B : Predicate<"Subtarget.isXS1B()">;
+
+//===----------------------------------------------------------------------===//
+// XCore specific DAG Nodes.
+//
+
+// Call
+def SDT_XCoreBranchLink : SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>;
+def XCoreBranchLink     : SDNode<"XCoreISD::BL",SDT_XCoreBranchLink,
+                            [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
+
+def XCoreRetsp       : SDNode<"XCoreISD::RETSP", SDTNone,
+                         [SDNPHasChain, SDNPOptInFlag]>;
+
+def SDT_XCoreAddress    : SDTypeProfile<1, 1,
+                            [SDTCisSameAs<0, 1>, SDTCisPtrTy<0>]>;
+
+def pcrelwrapper : SDNode<"XCoreISD::PCRelativeWrapper", SDT_XCoreAddress,
+	                   []>;
+
+def dprelwrapper : SDNode<"XCoreISD::DPRelativeWrapper", SDT_XCoreAddress,
+	                   []>;
+
+def cprelwrapper : SDNode<"XCoreISD::CPRelativeWrapper", SDT_XCoreAddress,
+	                   []>;
+
+def SDT_XCoreStwsp    : SDTypeProfile<0, 2, [SDTCisInt<1>]>;
+def XCoreStwsp         : SDNode<"XCoreISD::STWSP", SDT_XCoreStwsp,
+	                   [SDNPHasChain]>;
+
+// These are target-independent nodes, but have target-specific formats.
+def SDT_XCoreCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i32> ]>;
+def SDT_XCoreCallSeqEnd   : SDCallSeqEnd<[ SDTCisVT<0, i32>,
+                                        SDTCisVT<1, i32> ]>;
+
+def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_XCoreCallSeqStart,
+                           [SDNPHasChain, SDNPOutFlag]>;
+def callseq_end   : SDNode<"ISD::CALLSEQ_END",   SDT_XCoreCallSeqEnd,
+                           [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
+
+//===----------------------------------------------------------------------===//
+// Instruction Pattern Stuff
+//===----------------------------------------------------------------------===//
+
+def div4_xform : SDNodeXFormgetZExtValue() % 4 == 0);
+  return getI32Imm(N->getZExtValue()/4);
+}]>;
+
+def msksize_xform : SDNodeXFormgetZExtValue()));
+  // look for the first non-zero bit
+  return getI32Imm(32 - CountLeadingZeros_32(N->getZExtValue()));
+}]>;
+
+def neg_xform : SDNodeXFormgetZExtValue();
+  return getI32Imm(-value);
+}]>;
+
+def div4neg_xform : SDNodeXFormgetZExtValue();
+  assert(-value % 4 == 0);
+  return getI32Imm(-value/4);
+}]>;
+
+def immUs4Neg : PatLeaf<(imm), [{
+  uint32_t value = (uint32_t)N->getZExtValue();
+  return (-value)%4 == 0 && (-value)/4 <= 11;
+}]>;
+
+def immUs4 : PatLeaf<(imm), [{
+  uint32_t value = (uint32_t)N->getZExtValue();
+  return value%4 == 0 && value/4 <= 11;
+}]>;
+
+def immUsNeg : PatLeaf<(imm), [{
+  return -((uint32_t)N->getZExtValue()) <= 11;
+}]>;
+
+def immUs : PatLeaf<(imm), [{
+  return (uint32_t)N->getZExtValue() <= 11;
+}]>;
+
+def immU6 : PatLeaf<(imm), [{
+  return (uint32_t)N->getZExtValue() < (1 << 6);
+}]>;
+
+def immU10 : PatLeaf<(imm), [{
+  return (uint32_t)N->getZExtValue() < (1 << 10);
+}]>;
+
+def immU16 : PatLeaf<(imm), [{
+  return (uint32_t)N->getZExtValue() < (1 << 16);
+}]>;
+
+def immU20 : PatLeaf<(imm), [{
+  return (uint32_t)N->getZExtValue() < (1 << 20);
+}]>;
+
+// FIXME check subtarget. Currently we check if the immediate
+// is in the common subset of legal immediate values for both
+// XS1A and XS1B.
+def immMskBitp : PatLeaf<(imm), [{
+  uint32_t value = (uint32_t)N->getZExtValue();
+  if (!isMask_32(value)) {
+    return false;
+  }
+  int msksize = 32 - CountLeadingZeros_32(value);
+  return (msksize >= 1 && msksize <= 8)
+          || msksize == 16
+          || msksize == 24
+          || msksize == 32;
+}]>;
+
+// FIXME check subtarget. Currently we check if the immediate
+// is in the common subset of legal immediate values for both
+// XS1A and XS1B.
+def immBitp : PatLeaf<(imm), [{
+  uint32_t value = (uint32_t)N->getZExtValue();
+  return (value >= 1 && value <= 8)
+          || value == 16
+          || value == 24
+          || value == 32;
+}]>;
+
+def lda16f : PatFrag<(ops node:$addr, node:$offset),
+                     (add node:$addr, (shl node:$offset, 1))>;
+def lda16b : PatFrag<(ops node:$addr, node:$offset),
+                     (sub node:$addr, (shl node:$offset, 1))>;
+def ldawf : PatFrag<(ops node:$addr, node:$offset),
+                     (add node:$addr, (shl node:$offset, 2))>;
+def ldawb : PatFrag<(ops node:$addr, node:$offset),
+                     (sub node:$addr, (shl node:$offset, 2))>;
+
+// Instruction operand types
+def calltarget  : Operand;
+def brtarget : Operand;
+def pclabel : Operand;
+
+// Addressing modes
+def ADDRspii : ComplexPattern;
+def ADDRdpii : ComplexPattern;
+def ADDRcpii : ComplexPattern;
+
+// Address operands
+def MEMii : Operand {
+  let PrintMethod = "printMemOperand";
+  let MIOperandInfo = (ops i32imm, i32imm);
+}
+
+//===----------------------------------------------------------------------===//
+// Instruction Class Templates
+//===----------------------------------------------------------------------===//
+
+// Three operand short
+
+multiclass F3R_2RUS {
+  def _3r: _F3R<
+                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
+                 !strconcat(OpcStr, " $dst, $b, $c"),
+                 [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>;
+  def _2rus : _F2RUS<
+                 (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
+                 !strconcat(OpcStr, " $dst, $b, $c"),
+                 [(set GRRegs:$dst, (OpNode GRRegs:$b, immUs:$c))]>;
+}
+
+multiclass F3R_2RUS_np {
+  def _3r: _F3R<
+                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
+                 !strconcat(OpcStr, " $dst, $b, $c"),
+                 []>;
+  def _2rus : _F2RUS<
+                 (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
+                 !strconcat(OpcStr, " $dst, $b, $c"),
+                 []>;
+}
+
+multiclass F3R_2RBITP {
+  def _3r: _F3R<
+                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
+                 !strconcat(OpcStr, " $dst, $b, $c"),
+                 [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>;
+  def _2rus : _F2RUS<
+                 (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
+                 !strconcat(OpcStr, " $dst, $b, $c"),
+                 [(set GRRegs:$dst, (OpNode GRRegs:$b, immBitp:$c))]>;
+}
+
+class F3R : _F3R<
+                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
+                 !strconcat(OpcStr, " $dst, $b, $c"),
+                 [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>;
+
+class F3R_np : _F3R<
+                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
+                 !strconcat(OpcStr, " $dst, $b, $c"),
+                 []>;
+// Three operand long
+
+/// FL3R_L2RUS multiclass - Define a normal FL3R/FL2RUS pattern in one shot.
+multiclass FL3R_L2RUS {
+  def _l3r: _FL3R<
+                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
+                 !strconcat(OpcStr, " $dst, $b, $c"),
+                 [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>;
+  def _l2rus : _FL2RUS<
+                 (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
+                 !strconcat(OpcStr, " $dst, $b, $c"),
+                 [(set GRRegs:$dst, (OpNode GRRegs:$b, immUs:$c))]>;
+}
+
+/// FL3R_L2RUS multiclass - Define a normal FL3R/FL2RUS pattern in one shot.
+multiclass FL3R_L2RBITP {
+  def _l3r: _FL3R<
+                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
+                 !strconcat(OpcStr, " $dst, $b, $c"),
+                 [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>;
+  def _l2rus : _FL2RUS<
+                 (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
+                 !strconcat(OpcStr, " $dst, $b, $c"),
+                 [(set GRRegs:$dst, (OpNode GRRegs:$b, immBitp:$c))]>;
+}
+
+class FL3R : _FL3R<
+                 (outs GRRegs:$dst), (ins GRRegs:$b, GRRegs:$c),
+                 !strconcat(OpcStr, " $dst, $b, $c"),
+                 [(set GRRegs:$dst, (OpNode GRRegs:$b, GRRegs:$c))]>;
+
+// Register - U6
+// Operand register - U6
+multiclass FRU6_LRU6_branch {
+  def _ru6: _FRU6<
+                 (outs), (ins GRRegs:$cond, brtarget:$dest),
+                 !strconcat(OpcStr, " $cond, $dest"),
+                 []>;
+  def _lru6: _FLRU6<
+                 (outs), (ins GRRegs:$cond, brtarget:$dest),
+                 !strconcat(OpcStr, " $cond, $dest"),
+                 []>;
+}
+
+multiclass FRU6_LRU6_cp {
+  def _ru6: _FRU6<
+                 (outs GRRegs:$dst), (ins i32imm:$a),
+                 !strconcat(OpcStr, " $dst, cp[$a]"),
+                 []>;
+  def _lru6: _FLRU6<
+                 (outs GRRegs:$dst), (ins i32imm:$a),
+                 !strconcat(OpcStr, " $dst, cp[$a]"),
+                 []>;
+}
+
+// U6
+multiclass FU6_LU6 {
+  def _u6: _FU6<
+                 (outs), (ins i32imm:$b),
+                 !strconcat(OpcStr, " $b"),
+                 [(OpNode immU6:$b)]>;
+  def _lu6: _FLU6<
+                 (outs), (ins i32imm:$b),
+                 !strconcat(OpcStr, " $b"),
+                 [(OpNode immU16:$b)]>;
+}
+
+multiclass FU6_LU6_np {
+  def _u6: _FU6<
+                 (outs), (ins i32imm:$b),
+                 !strconcat(OpcStr, " $b"),
+                 []>;
+  def _lu6: _FLU6<
+                 (outs), (ins i32imm:$b),
+                 !strconcat(OpcStr, " $b"),
+                 []>;
+}
+
+// U10
+multiclass FU10_LU10_np {
+  def _u10: _FU10<
+                 (outs), (ins i32imm:$b),
+                 !strconcat(OpcStr, " $b"),
+                 []>;
+  def _lu10: _FLU10<
+                 (outs), (ins i32imm:$b),
+                 !strconcat(OpcStr, " $b"),
+                 []>;
+}
+
+// Two operand short
+
+class F2R_np : _F2R<
+                 (outs GRRegs:$dst), (ins GRRegs:$b),
+                 !strconcat(OpcStr, " $dst, $b"),
+                 []>;
+
+// Two operand long
+
+//===----------------------------------------------------------------------===//
+// Pseudo Instructions
+//===----------------------------------------------------------------------===//
+
+let Defs = [SP], Uses = [SP] in {
+def ADJCALLSTACKDOWN : PseudoInstXCore<(outs), (ins i32imm:$amt),
+                               "${:comment} ADJCALLSTACKDOWN $amt",
+                               [(callseq_start timm:$amt)]>;
+def ADJCALLSTACKUP : PseudoInstXCore<(outs), (ins i32imm:$amt1, i32imm:$amt2),
+                            "${:comment} ADJCALLSTACKUP $amt1",
+                            [(callseq_end timm:$amt1, timm:$amt2)]>;
+}
+
+// SELECT_CC_* - Used to implement the SELECT_CC DAG operation.  Expanded by the
+// scheduler into a branch sequence.
+let usesCustomDAGSchedInserter = 1 in {
+  def SELECT_CC : PseudoInstXCore<(outs GRRegs:$dst),
+                              (ins GRRegs:$cond, GRRegs:$T, GRRegs:$F),
+                              "${:comment} SELECT_CC PSEUDO!",
+                              [(set GRRegs:$dst,
+                                 (select GRRegs:$cond, GRRegs:$T, GRRegs:$F))]>;
+}
+
+//===----------------------------------------------------------------------===//
+// Instructions
+//===----------------------------------------------------------------------===//
+
+// Three operand short
+defm ADD : F3R_2RUS<"add", add>;
+defm SUB : F3R_2RUS<"sub", sub>;
+let neverHasSideEffects = 1 in {
+defm EQ : F3R_2RUS_np<"eq">;
+def LSS_3r : F3R_np<"lss">;
+def LSU_3r : F3R_np<"lsu">;
+}
+def AND_3r : F3R<"and", and>;
+def OR_3r : F3R<"or", or>;
+
+let mayLoad=1 in {
+def LDW_3r : _F3R<(outs GRRegs:$dst), (ins GRRegs:$addr, GRRegs:$offset),
+                  "ldw $dst, $addr[$offset]",
+                  []>;
+
+def LDW_2rus : _F2RUS<(outs GRRegs:$dst), (ins GRRegs:$addr, i32imm:$offset),
+                  "ldw $dst, $addr[$offset]",
+                  []>;
+
+def LD16S_3r :  _F3R<(outs GRRegs:$dst), (ins GRRegs:$addr, GRRegs:$offset),
+                  "ld16s $dst, $addr[$offset]",
+                  []>;
+
+def LD8U_3r :  _F3R<(outs GRRegs:$dst), (ins GRRegs:$addr, GRRegs:$offset),
+                  "ld8u $dst, $addr[$offset]",
+                  []>;
+}
+
+let mayStore=1 in {
+def STW_3r : _F3R<(outs), (ins GRRegs:$val, GRRegs:$addr, GRRegs:$offset),
+                  "stw $val, $addr[$offset]",
+                  []>;
+
+def STW_2rus : _F2RUS<(outs), (ins GRRegs:$val, GRRegs:$addr, i32imm:$offset),
+                  "stw $val, $addr[$offset]",
+                  []>;
+}
+
+defm SHL : F3R_2RBITP<"shl", shl>;
+defm SHR : F3R_2RBITP<"shr", srl>;
+// TODO tsetr
+
+// Three operand long
+def LDAWF_l3r : _FL3R<(outs GRRegs:$dst), (ins GRRegs:$addr, GRRegs:$offset),
+                  "ldaw $dst, $addr[$offset]",
+                  [(set GRRegs:$dst, (ldawf GRRegs:$addr, GRRegs:$offset))]>;
+
+let neverHasSideEffects = 1 in
+def LDAWF_l2rus : _FL2RUS<(outs GRRegs:$dst),
+                    (ins GRRegs:$addr, i32imm:$offset),
+                    "ldaw $dst, $addr[$offset]",
+                    []>;
+
+def LDAWB_l3r : _FL3R<(outs GRRegs:$dst), (ins GRRegs:$addr, GRRegs:$offset),
+                  "ldaw $dst, $addr[-$offset]",
+                  [(set GRRegs:$dst, (ldawb GRRegs:$addr, GRRegs:$offset))]>;
+
+let neverHasSideEffects = 1 in
+def LDAWB_l2rus : _FL2RUS<(outs GRRegs:$dst),
+                    (ins GRRegs:$addr, i32imm:$offset),
+                    "ldaw $dst, $addr[-$offset]",
+                    []>;
+
+def LDA16F_l3r : _FL3R<(outs GRRegs:$dst), (ins GRRegs:$addr, GRRegs:$offset),
+                  "lda16 $dst, $addr[$offset]",
+                  [(set GRRegs:$dst, (lda16f GRRegs:$addr, GRRegs:$offset))]>;
+
+def LDA16B_l3r : _FL3R<(outs GRRegs:$dst), (ins GRRegs:$addr, GRRegs:$offset),
+                  "lda16 $dst, $addr[-$offset]",
+                  [(set GRRegs:$dst, (lda16b GRRegs:$addr, GRRegs:$offset))]>;
+
+def MUL_l3r : FL3R<"mul", mul>;
+// Instructions which may trap are marked as side effecting.
+let hasSideEffects = 1 in {
+def DIVS_l3r : FL3R<"divs", sdiv>;
+def DIVU_l3r : FL3R<"divu", udiv>;
+def REMS_l3r : FL3R<"rems", srem>;
+def REMU_l3r : FL3R<"remu", urem>;
+}
+def XOR_l3r : FL3R<"xor", xor>;
+defm ASHR : FL3R_L2RBITP<"ashr", sra>;
+// TODO crc32, crc8, inpw, outpw
+let mayStore=1 in {
+def ST16_l3r : _FL3R<(outs), (ins GRRegs:$val, GRRegs:$addr, GRRegs:$offset),
+                "st16 $val, $addr[$offset]",
+                []>;
+
+def ST8_l3r : _FL3R<(outs), (ins GRRegs:$val, GRRegs:$addr, GRRegs:$offset),
+                "st8 $val, $addr[$offset]",
+                []>;
+}
+
+// Four operand long
+let Predicates = [HasXS1B], Constraints = "$src1 = $dst1,$src2 = $dst2" in {
+def MACCU_l4r : _L4R<(outs GRRegs:$dst1, GRRegs:$dst2),
+                    (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3,
+                      GRRegs:$src4),
+                    "maccu $dst1, $dst2, $src3, $src4",
+                    []>;
+
+def MACCS_l4r : _L4R<(outs GRRegs:$dst1, GRRegs:$dst2),
+                    (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3,
+                      GRRegs:$src4),
+                    "maccs $dst1, $dst2, $src3, $src4",
+                    []>;
+}
+
+// Five operand long
+
+let Predicates = [HasXS1B] in {
+def LADD_l5r : _L5R<(outs GRRegs:$dst1, GRRegs:$dst2),
+                    (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3),
+                    "ladd $dst1, $dst2, $src1, $src2, $src3",
+                    []>;
+
+def LSUB_l5r : _L5R<(outs GRRegs:$dst1, GRRegs:$dst2),
+                    (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3),
+                    "lsub $dst1, $dst2, $src1, $src2, $src3",
+                    []>;
+
+def LDIV_l5r : _L5R<(outs GRRegs:$dst1, GRRegs:$dst2),
+                    (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3),
+                    "ldiv $dst1, $dst2, $src1, $src2, $src3",
+                    []>;
+}
+
+// Six operand long
+
+def LMUL_l6r : _L6R<(outs GRRegs:$dst1, GRRegs:$dst2),
+                    (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3,
+                      GRRegs:$src4),
+                    "lmul $dst1, $dst2, $src1, $src2, $src3, $src4",
+                    []>;
+
+let Predicates = [HasXS1A] in
+def MACC_l6r : _L6R<(outs GRRegs:$dst1, GRRegs:$dst2),
+                    (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3,
+                      GRRegs:$src4),
+                    "macc $dst1, $dst2, $src1, $src2, $src3, $src4",
+                    []>;
+
+// Register - U6
+
+//let Uses = [DP] in ...
+let neverHasSideEffects = 1, isReMaterializable = 1 in
+def LDAWDP_ru6: _FRU6<(outs GRRegs:$dst), (ins MEMii:$a),
+                    "ldaw $dst, dp[$a]",
+                    []>;
+
+let isReMaterializable = 1 in                    
+def LDAWDP_lru6: _FLRU6<
+                    (outs GRRegs:$dst), (ins MEMii:$a),
+                    "ldaw $dst, dp[$a]",
+                    [(set GRRegs:$dst, ADDRdpii:$a)]>;
+
+let mayLoad=1 in
+def LDWDP_ru6: _FRU6<(outs GRRegs:$dst), (ins MEMii:$a),
+                    "ldw $dst, dp[$a]",
+                    []>;
+                    
+def LDWDP_lru6: _FLRU6<
+                    (outs GRRegs:$dst), (ins MEMii:$a),
+                    "ldw $dst, dp[$a]",
+                    [(set GRRegs:$dst, (load ADDRdpii:$a))]>;
+
+let mayStore=1 in
+def STWDP_ru6 : _FRU6<(outs), (ins GRRegs:$val, MEMii:$addr),
+                  "stw $val, dp[$addr]",
+                  []>;
+
+def STWDP_lru6 : _FLRU6<(outs), (ins GRRegs:$val, MEMii:$addr),
+                  "stw $val, dp[$addr]",
+                  [(store GRRegs:$val, ADDRdpii:$addr)]>;
+
+//let Uses = [CP] in ..
+let mayLoad = 1, isReMaterializable = 1 in
+defm LDWCP : FRU6_LRU6_cp<"ldw">;
+
+let Uses = [SP] in {
+let mayStore=1 in
+def STWSP_ru6 : _FRU6<
+                 (outs), (ins GRRegs:$dst, MEMii:$b),
+                 "stw $dst, sp[$b]",
+                 []>;
+
+def STWSP_lru6 : _FLRU6<
+                 (outs), (ins GRRegs:$dst, MEMii:$b),
+                 "stw $dst, sp[$b]",
+                 [(store GRRegs:$dst, ADDRspii:$b)]>;
+
+let mayStore=1 in
+def STWSP_ru6_2 : _FRU6<
+                 (outs), (ins GRRegs:$dst, i32imm:$b),
+                 "stw $dst, sp[$b]",
+                 []>;
+
+def STWSP_lru6_2 : _FLRU6<
+                 (outs), (ins GRRegs:$dst, i32imm:$b),
+                 "stw $dst, sp[$b]",
+                 [(store GRRegs:$dst, ADDRspii:$b)]>;
+
+let mayLoad=1 in
+def LDWSP_ru6 : _FRU6<
+                 (outs GRRegs:$dst), (ins MEMii:$b),
+                 "ldw $dst, sp[$b]",
+                 []>;
+
+def LDWSP_lru6 : _FLRU6<
+                 (outs GRRegs:$dst), (ins MEMii:$b),
+                 "ldw $dst, sp[$b]",
+                 [(set GRRegs:$dst, (load ADDRspii:$b))]>;
+
+let neverHasSideEffects = 1 in
+def LDAWSP_ru6 : _FRU6<
+                 (outs GRRegs:$dst), (ins MEMii:$b),
+                 "ldaw $dst, sp[$b]",
+                 []>;
+
+def LDAWSP_lru6 : _FLRU6<
+                 (outs GRRegs:$dst), (ins MEMii:$b),
+                 "ldaw $dst, sp[$b]",
+                 [(set GRRegs: $dst, ADDRspii:$b)]>;
+
+let neverHasSideEffects = 1 in {
+def LDAWSP_ru6_RRegs : _FRU6<
+                 (outs RRegs:$dst), (ins i32imm:$b),
+                 "ldaw $dst, sp[$b]",
+                 []>;
+
+def LDAWSP_lru6_RRegs : _FLRU6<
+                 (outs RRegs:$dst), (ins i32imm:$b),
+                 "ldaw $dst, sp[$b]",
+                 []>;
+}
+}
+
+let isReMaterializable = 1 in {
+def LDC_ru6 : _FRU6<
+                 (outs GRRegs:$dst), (ins i32imm:$b),
+                 "ldc $dst, $b",
+                 [(set GRRegs:$dst, immU6:$b)]>;
+
+def LDC_lru6 : _FLRU6<
+                 (outs GRRegs:$dst), (ins i32imm:$b),
+                 "ldc $dst, $b",
+                 [(set GRRegs:$dst, immU16:$b)]>;
+}
+
+// Operand register - U6
+// TODO setc
+let isBranch = 1, isTerminator = 1 in {
+defm BRFT: FRU6_LRU6_branch<"bt">;
+defm BRBT: FRU6_LRU6_branch<"bt">;
+defm BRFF: FRU6_LRU6_branch<"bf">;
+defm BRBF: FRU6_LRU6_branch<"bf">;
+}
+
+// U6
+let Defs = [SP], Uses = [SP] in {
+let neverHasSideEffects = 1 in
+defm EXTSP : FU6_LU6_np<"extsp">;
+let mayStore = 1 in
+defm ENTSP : FU6_LU6_np<"entsp">;
+
+let isReturn = 1, isTerminator = 1, mayLoad = 1 in {
+defm RETSP : FU6_LU6<"retsp", XCoreRetsp>;
+}
+}
+
+// TODO extdp, kentsp, krestsp, blat, setsr
+// clrsr, getsr, kalli
+let isBranch = 1, isTerminator = 1 in {
+def BRBU_u6 : _FU6<
+                 (outs),
+                 (ins brtarget:$target),
+                 "bu $target",
+                 []>;
+
+def BRBU_lu6 : _FLU6<
+                 (outs),
+                 (ins brtarget:$target),
+                 "bu $target",
+                 []>;
+
+def BRFU_u6 : _FU6<
+                 (outs),
+                 (ins brtarget:$target),
+                 "bu $target",
+                 []>;
+
+def BRFU_lu6 : _FLU6<
+                 (outs),
+                 (ins brtarget:$target),
+                 "bu $target",
+                 []>;
+}
+
+//let Uses = [CP] in ...
+let Predicates = [HasXS1B], Defs = [R11], neverHasSideEffects = 1,
+  isReMaterializable = 1 in
+def LDAWCP_u6: _FRU6<(outs), (ins MEMii:$a),
+                    "ldaw r11, cp[$a]",
+                    []>;
+
+let Predicates = [HasXS1B], Defs = [R11], isReMaterializable = 1 in
+def LDAWCP_lu6: _FLRU6<
+                    (outs), (ins MEMii:$a),
+                    "ldaw r11, cp[$a]",
+                    [(set R11, ADDRcpii:$a)]>;
+
+// U10
+// TODO ldwcpl, blacp
+
+let Defs = [R11], isReMaterializable = 1, neverHasSideEffects = 1 in
+def LDAP_u10 : _FU10<
+                  (outs),
+                  (ins i32imm:$addr),
+                  "ldap r11, $addr",
+                  []>;
+
+let Defs = [R11], isReMaterializable = 1 in
+def LDAP_lu10 : _FLU10<
+                  (outs),
+                  (ins i32imm:$addr),
+                  "ldap r11, $addr",
+                  [(set R11, (pcrelwrapper tglobaladdr:$addr))]>;
+
+let isCall=1,
+// All calls clobber the the link register and the non-callee-saved registers:
+Defs = [R0, R1, R2, R3, R11, LR] in {
+def BL_u10 : _FU10<
+                  (outs),
+                  (ins calltarget:$target, variable_ops),
+                  "bl $target",
+                  [(XCoreBranchLink immU10:$target)]>;
+
+def BL_lu10 : _FLU10<
+                  (outs),
+                  (ins calltarget:$target, variable_ops),
+                  "bl $target",
+                  [(XCoreBranchLink immU20:$target)]>;
+}
+
+// Two operand short
+// TODO getr, getst
+def NOT : _F2R<(outs GRRegs:$dst), (ins GRRegs:$b),
+                 "not $dst, $b",
+                 [(set GRRegs:$dst, (not GRRegs:$b))]>;
+
+def NEG : _F2R<(outs GRRegs:$dst), (ins GRRegs:$b),
+                 "neg $dst, $b",
+                 [(set GRRegs:$dst, (ineg GRRegs:$b))]>;
+
+// TODO setd, eet, eef, getts, setpt, outct, inct, chkct, outt, intt, out,
+// in, outshr, inshr, testct, testwct, tinitpc, tinitdp, tinitsp, tinitcp,
+// tsetmr, sext (reg), zext (reg)
+let isTwoAddress = 1 in {
+let neverHasSideEffects = 1 in
+def SEXT_rus : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, i32imm:$src2),
+                 "sext $dst, $src2",
+                 []>;
+
+let neverHasSideEffects = 1 in
+def ZEXT_rus : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, i32imm:$src2),
+                 "zext $dst, $src2",
+                 []>;
+
+def ANDNOT_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2),
+                 "andnot $dst, $src2",
+                 [(set GRRegs:$dst, (and GRRegs:$src1, (not GRRegs:$src2)))]>;
+}
+
+let isReMaterializable = 1, neverHasSideEffects = 1 in
+def MKMSK_rus : _FRUS<(outs GRRegs:$dst), (ins i32imm:$size),
+                 "mkmsk $dst, $size",
+                 []>;
+
+def MKMSK_2r : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$size),
+                 "mkmsk $dst, $size",
+                 [(set GRRegs:$dst, (add (shl 1, GRRegs:$size), 0xffffffff))]>;
+
+// Two operand long
+// TODO settw, setclk, setrdy, setpsc, endin, peek,
+// getd, testlcl, tinitlr, getps, setps
+def BITREV_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
+                 "bitrev $dst, $src",
+                 []>;
+
+def BYTEREV_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
+                 "byterev $dst, $src",
+                 [(set GRRegs:$dst, (bswap GRRegs:$src))]>;
+
+def CLZ_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
+                 "clz $dst, $src",
+                 [(set GRRegs:$dst, (ctlz GRRegs:$src))]>;
+
+// One operand short
+// TODO edu, eeu, waitet, waitef, freer, tstart, msync, mjoin, syncr, clrtp
+// bru, setdp, setcp, setv, setev, kcall, ecallt, ecallf
+// dgetreg
+let isBranch=1, isIndirectBranch=1, isTerminator=1 in
+def BAU_1r : _F1R<(outs), (ins GRRegs:$addr),
+                 "bau $addr",
+                 [(brind GRRegs:$addr)]>;
+
+let Defs=[SP], neverHasSideEffects=1 in
+def SETSP_1r : _F1R<(outs), (ins GRRegs:$src),
+                 "set sp, $src",
+                 []>;
+
+let isCall=1, 
+// All calls clobber the the link register and the non-callee-saved registers:
+Defs = [R0, R1, R2, R3, R11, LR] in {
+def BLA_1r : _F1R<(outs), (ins GRRegs:$addr, variable_ops),
+                 "bla $addr",
+                 [(XCoreBranchLink GRRegs:$addr)]>;
+}
+
+// Zero operand short
+// TODO waiteu, clre, ssync, freet, ldspc, stspc, ldssr, stssr, ldsed, stsed,
+// stet, geted, getet, getkep, getksp, setkep, getid, kret, dcall, dret,
+// dentsp, drestsp
+
+let Defs = [R11] in
+def GETID_0R : _F0R<(outs), (ins),
+                 "get r11, id",
+                 []>;
+
+//===----------------------------------------------------------------------===//
+// Non-Instruction Patterns
+//===----------------------------------------------------------------------===//
+
+def : Pat<(XCoreBranchLink tglobaladdr:$addr), (BL_lu10 tglobaladdr:$addr)>;
+def : Pat<(XCoreBranchLink texternalsym:$addr), (BL_lu10 texternalsym:$addr)>;
+def : Pat<(XCoreStwsp GRRegs:$val, immU6:$index),
+          (STWSP_ru6_2 GRRegs:$val, immU6:$index)>;
+def : Pat<(XCoreStwsp GRRegs:$val, immU16:$index),
+          (STWSP_lru6_2 GRRegs:$val, immU16:$index)>;
+
+/// sext_inreg
+def : Pat<(sext_inreg GRRegs:$b, i1), (SEXT_rus GRRegs:$b, 1)>;
+def : Pat<(sext_inreg GRRegs:$b, i8), (SEXT_rus GRRegs:$b, 8)>;
+def : Pat<(sext_inreg GRRegs:$b, i16), (SEXT_rus GRRegs:$b, 16)>;
+
+/// loads
+def : Pat<(zextloadi8 (add GRRegs:$addr, GRRegs:$offset)),
+          (LD8U_3r GRRegs:$addr, GRRegs:$offset)>;
+def : Pat<(zextloadi8 GRRegs:$addr), (LD8U_3r GRRegs:$addr, (LDC_ru6 0))>;
+
+def : Pat<(zextloadi16 (lda16f GRRegs:$addr, GRRegs:$offset)),
+          (LD16S_3r GRRegs:$addr, GRRegs:$offset)>;
+def : Pat<(sextloadi16 GRRegs:$addr), (LD16S_3r GRRegs:$addr, (LDC_ru6 0))>;
+
+def : Pat<(load (ldawf GRRegs:$addr, GRRegs:$offset)),
+          (LDW_3r GRRegs:$addr, GRRegs:$offset)>;
+def : Pat<(load (add GRRegs:$addr, immUs4:$offset)),
+          (LDW_2rus GRRegs:$addr, (div4_xform immUs4:$offset))>;
+def : Pat<(load GRRegs:$addr), (LDW_2rus GRRegs:$addr, 0)>;
+
+/// anyext
+def : Pat<(extloadi8 (add GRRegs:$addr, GRRegs:$offset)),
+          (LD8U_3r GRRegs:$addr, GRRegs:$offset)>;
+def : Pat<(extloadi8 GRRegs:$addr), (LD8U_3r GRRegs:$addr, (LDC_ru6 0))>;
+def : Pat<(extloadi16 (lda16f GRRegs:$addr, GRRegs:$offset)),
+          (LD16S_3r GRRegs:$addr, GRRegs:$offset)>;
+def : Pat<(extloadi16 GRRegs:$addr), (LD16S_3r GRRegs:$addr, (LDC_ru6 0))>;
+
+/// stores
+def : Pat<(truncstorei8 GRRegs:$val, (add GRRegs:$addr, GRRegs:$offset)),
+          (ST8_l3r GRRegs:$val, GRRegs:$addr, GRRegs:$offset)>;
+def : Pat<(truncstorei8 GRRegs:$val, GRRegs:$addr),
+          (ST8_l3r GRRegs:$val, GRRegs:$addr, (LDC_ru6 0))>;
+          
+def : Pat<(truncstorei16 GRRegs:$val, (lda16f GRRegs:$addr, GRRegs:$offset)),
+          (ST16_l3r GRRegs:$val, GRRegs:$addr, GRRegs:$offset)>;
+def : Pat<(truncstorei16 GRRegs:$val, GRRegs:$addr),
+          (ST16_l3r GRRegs:$val, GRRegs:$addr, (LDC_ru6 0))>;
+
+def : Pat<(store GRRegs:$val, (ldawf GRRegs:$addr, GRRegs:$offset)),
+          (STW_3r GRRegs:$val, GRRegs:$addr, GRRegs:$offset)>;
+def : Pat<(store GRRegs:$val, (add GRRegs:$addr, immUs4:$offset)),
+          (STW_2rus GRRegs:$val, GRRegs:$addr, (div4_xform immUs4:$offset))>;
+def : Pat<(store GRRegs:$val, GRRegs:$addr),
+          (STW_2rus GRRegs:$val, GRRegs:$addr, 0)>;
+
+/// cttz
+def : Pat<(cttz GRRegs:$src), (CLZ_l2r (BITREV_l2r GRRegs:$src))>;
+
+///
+/// branch patterns
+///
+
+// unconditional branch
+def : Pat<(br bb:$addr), (BRFU_lu6 bb:$addr)>;
+
+// direct match equal/notequal zero brcond
+def : Pat<(brcond (setne GRRegs:$lhs, 0), bb:$dst),
+          (BRFT_lru6 GRRegs:$lhs, bb:$dst)>;
+def : Pat<(brcond (seteq GRRegs:$lhs, 0), bb:$dst),
+          (BRFF_lru6 GRRegs:$lhs, bb:$dst)>;
+
+def : Pat<(brcond (setle GRRegs:$lhs, GRRegs:$rhs), bb:$dst),
+          (BRFF_lru6 (LSS_3r GRRegs:$rhs, GRRegs:$lhs), bb:$dst)>;
+def : Pat<(brcond (setule GRRegs:$lhs, GRRegs:$rhs), bb:$dst),
+          (BRFF_lru6 (LSU_3r GRRegs:$rhs, GRRegs:$lhs), bb:$dst)>;
+def : Pat<(brcond (setge GRRegs:$lhs, GRRegs:$rhs), bb:$dst),
+          (BRFF_lru6 (LSS_3r GRRegs:$lhs, GRRegs:$rhs), bb:$dst)>;
+def : Pat<(brcond (setuge GRRegs:$lhs, GRRegs:$rhs), bb:$dst),
+          (BRFF_lru6 (LSU_3r GRRegs:$lhs, GRRegs:$rhs), bb:$dst)>;
+def : Pat<(brcond (setne GRRegs:$lhs, GRRegs:$rhs), bb:$dst),
+          (BRFF_lru6 (EQ_3r GRRegs:$lhs, GRRegs:$rhs), bb:$dst)>;
+def : Pat<(brcond (setne GRRegs:$lhs, immUs:$rhs), bb:$dst),
+          (BRFF_lru6 (EQ_2rus GRRegs:$lhs, immUs:$rhs), bb:$dst)>;
+
+// generic brcond pattern
+def : Pat<(brcond GRRegs:$cond, bb:$addr), (BRFT_lru6 GRRegs:$cond, bb:$addr)>;
+
+
+///
+/// Select patterns
+///
+
+// direct match equal/notequal zero select
+def : Pat<(select (setne GRRegs:$lhs, 0), GRRegs:$T, GRRegs:$F),
+        (SELECT_CC GRRegs:$lhs, GRRegs:$T, GRRegs:$F)>;
+
+def : Pat<(select (seteq GRRegs:$lhs, 0), GRRegs:$T, GRRegs:$F),
+        (SELECT_CC GRRegs:$lhs, GRRegs:$F, GRRegs:$T)>;
+
+def : Pat<(select (setle GRRegs:$lhs, GRRegs:$rhs), GRRegs:$T, GRRegs:$F),
+          (SELECT_CC (LSS_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F, GRRegs:$T)>;
+def : Pat<(select (setule GRRegs:$lhs, GRRegs:$rhs), GRRegs:$T, GRRegs:$F),
+          (SELECT_CC (LSU_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F, GRRegs:$T)>;
+def : Pat<(select (setge GRRegs:$lhs, GRRegs:$rhs), GRRegs:$T, GRRegs:$F),
+          (SELECT_CC (LSS_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
+def : Pat<(select (setuge GRRegs:$lhs, GRRegs:$rhs), GRRegs:$T, GRRegs:$F),
+          (SELECT_CC (LSU_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
+def : Pat<(select (setne GRRegs:$lhs, GRRegs:$rhs), GRRegs:$T, GRRegs:$F),
+          (SELECT_CC (EQ_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
+def : Pat<(select (setne GRRegs:$lhs, immUs:$rhs), GRRegs:$T, GRRegs:$F),
+          (SELECT_CC (EQ_2rus GRRegs:$lhs, immUs:$rhs), GRRegs:$F, GRRegs:$T)>;
+
+///
+/// setcc patterns, only matched when none of the above brcond
+/// patterns match
+///
+
+// setcc 2 register operands
+def : Pat<(setle GRRegs:$lhs, GRRegs:$rhs),
+          (EQ_2rus (LSS_3r GRRegs:$rhs, GRRegs:$lhs), 0)>;
+def : Pat<(setule GRRegs:$lhs, GRRegs:$rhs),
+          (EQ_2rus (LSU_3r GRRegs:$rhs, GRRegs:$lhs), 0)>;
+
+def : Pat<(setgt GRRegs:$lhs, GRRegs:$rhs),
+          (LSS_3r GRRegs:$rhs, GRRegs:$lhs)>;
+def : Pat<(setugt GRRegs:$lhs, GRRegs:$rhs),
+          (LSU_3r GRRegs:$rhs, GRRegs:$lhs)>;
+
+def : Pat<(setge GRRegs:$lhs, GRRegs:$rhs),
+          (EQ_2rus (LSS_3r GRRegs:$lhs, GRRegs:$rhs), 0)>;
+def : Pat<(setuge GRRegs:$lhs, GRRegs:$rhs),
+          (EQ_2rus (LSU_3r GRRegs:$lhs, GRRegs:$rhs), 0)>;
+
+def : Pat<(setlt GRRegs:$lhs, GRRegs:$rhs),
+          (LSS_3r GRRegs:$lhs, GRRegs:$rhs)>;
+def : Pat<(setult GRRegs:$lhs, GRRegs:$rhs),
+          (LSU_3r GRRegs:$lhs, GRRegs:$rhs)>;
+
+def : Pat<(setne GRRegs:$lhs, GRRegs:$rhs),
+          (EQ_2rus (EQ_3r GRRegs:$lhs, GRRegs:$rhs), 0)>;
+
+def : Pat<(seteq GRRegs:$lhs, GRRegs:$rhs),
+          (EQ_3r GRRegs:$lhs, GRRegs:$rhs)>;
+
+// setcc reg/imm operands
+def : Pat<(seteq GRRegs:$lhs, immUs:$rhs),
+          (EQ_2rus GRRegs:$lhs, immUs:$rhs)>;
+def : Pat<(setne GRRegs:$lhs, immUs:$rhs),
+          (EQ_2rus (EQ_2rus GRRegs:$lhs, immUs:$rhs), 0)>;
+
+// misc
+def : Pat<(add GRRegs:$addr, immUs4:$offset),
+          (LDAWF_l2rus GRRegs:$addr, (div4_xform immUs4:$offset))>;
+
+def : Pat<(sub GRRegs:$addr, immUs4:$offset),
+          (LDAWB_l2rus GRRegs:$addr, (div4_xform immUs4:$offset))>;
+
+def : Pat<(and GRRegs:$val, immMskBitp:$mask),
+          (ZEXT_rus GRRegs:$val, (msksize_xform immMskBitp:$mask))>;
+
+// (sub X, imm) gets canonicalized to (add X, -imm).  Match this form.
+def : Pat<(add GRRegs:$src1, immUsNeg:$src2),
+          (SUB_2rus GRRegs:$src1, (neg_xform immUsNeg:$src2))>;
+
+def : Pat<(add GRRegs:$src1, immUs4Neg:$src2),
+          (LDAWB_l2rus GRRegs:$src1, (div4neg_xform immUs4Neg:$src2))>;
+
+///
+/// Some peepholes
+///
+
+def : Pat<(mul GRRegs:$src, 3),
+          (LDA16F_l3r GRRegs:$src, GRRegs:$src)>;
+
+def : Pat<(mul GRRegs:$src, 5),
+          (LDAWF_l3r GRRegs:$src, GRRegs:$src)>;
+
+def : Pat<(mul GRRegs:$src, -3),
+          (LDAWB_l3r GRRegs:$src, GRRegs:$src)>;
+
+// ashr X, 32 is equivalent to ashr X, 31 on the XCore.
+def : Pat<(sra GRRegs:$src, 31),
+          (ASHR_l2rus GRRegs:$src, 32)>;
+

Added: llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.h?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.h (added)
+++ llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.h Fri Nov  7 04:59:00 2008
@@ -0,0 +1,69 @@
+//====- XCoreMachineFuctionInfo.h - XCore machine function info -*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file declares XCore-specific per-machine-function information.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef XCOREMACHINEFUNCTIONINFO_H
+#define XCOREMACHINEFUNCTIONINFO_H
+
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
+#include 
+
+namespace llvm {
+
+// Forward declarations
+class Function;
+
+/// XCoreFunctionInfo - This class is derived from MachineFunction private
+/// XCore target-specific information for each MachineFunction.
+class XCoreFunctionInfo : public MachineFunctionInfo {
+private:
+  bool UsesLR;
+  int LRSpillSlot;
+  int FPSpillSlot;
+  int VarArgsFrameIndex;
+  std::vector > SpillLabels;
+
+public:
+  XCoreFunctionInfo() :
+    UsesLR(false),
+    LRSpillSlot(0),
+    FPSpillSlot(0),
+    VarArgsFrameIndex(0) {}
+  
+  XCoreFunctionInfo(MachineFunction &MF) :
+    UsesLR(false),
+    LRSpillSlot(0),
+    FPSpillSlot(0),
+    VarArgsFrameIndex(0) {}
+  
+  ~XCoreFunctionInfo() {}
+  
+  void setVarArgsFrameIndex(int off) { VarArgsFrameIndex = off; }
+  int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
+  
+  void setUsesLR(bool val) { UsesLR = val; }
+  bool getUsesLR() const { return UsesLR; }
+  
+  void setLRSpillSlot(int off) { LRSpillSlot = off; }
+  int getLRSpillSlot() const { return LRSpillSlot; }
+  
+  void setFPSpillSlot(int off) { FPSpillSlot = off; }
+  int getFPSpillSlot() const { return FPSpillSlot; }
+  
+  std::vector >&getSpillLabels() {
+    return SpillLabels;
+  }
+};
+} // End llvm namespace
+
+#endif // XCOREMACHINEFUNCTIONINFO_H

Added: llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp (added)
+++ llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp Fri Nov  7 04:59:00 2008
@@ -0,0 +1,596 @@
+//===- XCoreRegisterInfo.cpp - XCore Register Information -------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the XCore implementation of the MRegisterInfo class.
+//
+//===----------------------------------------------------------------------===//
+
+#include "XCoreRegisterInfo.h"
+#include "XCoreMachineFunctionInfo.h"
+#include "XCore.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineLocation.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/RegisterScavenging.h"
+#include "llvm/Target/TargetFrameInfo.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetOptions.h"
+#include "llvm/Target/TargetInstrInfo.h"
+#include "llvm/Type.h"
+#include "llvm/Function.h"
+#include "llvm/ADT/BitVector.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/Support/Debug.h"
+
+using namespace llvm;
+
+XCoreRegisterInfo::XCoreRegisterInfo(const TargetInstrInfo &tii)
+  : XCoreGenRegisterInfo(XCore::ADJCALLSTACKDOWN, XCore::ADJCALLSTACKUP),
+    TII(tii) {
+}
+
+// helper functions
+static inline bool isImmUs(unsigned val) {
+  return val <= 11;
+}
+
+static inline bool isImmU6(unsigned val) {
+  return val < (1 << 6);
+}
+
+static inline bool isImmU16(unsigned val) {
+  return val < (1 << 16);
+}
+
+static const unsigned XCore_ArgRegs[] = {
+  XCore::R0, XCore::R1, XCore::R2, XCore::R3
+};
+
+const unsigned * XCoreRegisterInfo::getArgRegs(const MachineFunction *MF)
+{
+  return XCore_ArgRegs;
+}
+
+unsigned XCoreRegisterInfo::getNumArgRegs(const MachineFunction *MF)
+{
+  return array_lengthof(XCore_ArgRegs);
+}
+
+bool XCoreRegisterInfo::needsFrameMoves(const MachineFunction &MF)
+{
+  const MachineFrameInfo *MFI = MF.getFrameInfo();
+  MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
+  return (MMI && MMI->hasDebugInfo()) ||
+          !MF.getFunction()->doesNotThrow() ||
+          UnwindTablesMandatory;
+}
+
+const unsigned* XCoreRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
+                                                                         const {
+  static const unsigned CalleeSavedRegs[] = {
+    XCore::R4, XCore::R5, XCore::R6, XCore::R7,
+    XCore::R8, XCore::R9, XCore::R10, XCore::LR,
+    0
+  };
+  return CalleeSavedRegs;
+}
+
+const TargetRegisterClass* const*
+XCoreRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
+  static const TargetRegisterClass * const CalleeSavedRegClasses[] = {
+    XCore::GRRegsRegisterClass, XCore::GRRegsRegisterClass,
+    XCore::GRRegsRegisterClass, XCore::GRRegsRegisterClass,
+    XCore::GRRegsRegisterClass, XCore::GRRegsRegisterClass,
+    XCore::GRRegsRegisterClass, XCore::RRegsRegisterClass,
+    0
+  };
+  return CalleeSavedRegClasses;
+}
+
+BitVector XCoreRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
+  BitVector Reserved(getNumRegs());
+  Reserved.set(XCore::CP);
+  Reserved.set(XCore::DP);
+  Reserved.set(XCore::SP);
+  Reserved.set(XCore::LR);
+  if (hasFP(MF)) {
+    Reserved.set(XCore::R10);
+  }
+  return Reserved;
+}
+
+bool
+XCoreRegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const {
+  // TODO can we estimate stack size?
+  return hasFP(MF);
+}
+
+bool XCoreRegisterInfo::hasFP(const MachineFunction &MF) const {
+  return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects();
+}
+
+// This function eliminates ADJCALLSTACKDOWN,
+// ADJCALLSTACKUP pseudo instructions
+void XCoreRegisterInfo::
+eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
+                              MachineBasicBlock::iterator I) const {
+  if (!hasReservedCallFrame(MF)) {
+    // Turn the adjcallstackdown instruction into 'extsp ' and the
+    // adjcallstackup instruction into 'ldaw sp, sp[]'
+    MachineInstr *Old = I;
+    uint64_t Amount = Old->getOperand(0).getImm();
+    if (Amount != 0) {
+      // We need to keep the stack aligned properly.  To do this, we round the
+      // amount of space needed for the outgoing arguments up to the next
+      // alignment boundary.
+      unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
+      Amount = (Amount+Align-1)/Align*Align;
+
+      assert(Amount%4 == 0);
+      Amount /= 4;
+      
+      bool isU6 = isImmU6(Amount);
+      
+      if (!isU6 && !isImmU16(Amount)) {
+        // FIX could emit multiple instructions in this case.
+        cerr << "eliminateCallFramePseudoInstr size too big: "
+             << Amount << "\n";
+        abort();
+      }
+
+      MachineInstr *New;
+      if (Old->getOpcode() == XCore::ADJCALLSTACKDOWN) {
+        int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
+        New=BuildMI(MF, TII.get(Opcode))
+          .addImm(Amount);
+      } else {
+        assert(Old->getOpcode() == XCore::ADJCALLSTACKUP);
+        int Opcode = isU6 ? XCore::LDAWSP_ru6_RRegs : XCore::LDAWSP_lru6_RRegs;
+        New=BuildMI(MF, TII.get(Opcode), XCore::SP)
+          .addImm(Amount);
+      }
+
+      // Replace the pseudo instruction with a new instruction...
+      MBB.insert(I, New);
+    }
+  }
+  
+  MBB.erase(I);
+}
+
+void XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
+                                            int SPAdj, RegScavenger *RS) const {
+  assert(SPAdj == 0 && "Unexpected");
+  MachineInstr &MI = *II;
+  unsigned i = 0;
+
+  while (!MI.getOperand(i).isFI()) {
+    ++i;
+    assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
+  }
+
+  MachineOperand &FrameOp = MI.getOperand(i);
+  int FrameIndex = FrameOp.getIndex();
+
+  MachineFunction &MF = *MI.getParent()->getParent();
+  int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
+  int StackSize = MF.getFrameInfo()->getStackSize();
+
+  #ifndef NDEBUG
+  DOUT << "\nFunction         : " << MF.getFunction()->getName() << "\n";
+  DOUT << "<--------->\n";
+  MI.print(DOUT);
+  DOUT << "FrameIndex         : " << FrameIndex << "\n";
+  DOUT << "FrameOffset        : " << Offset << "\n";
+  DOUT << "StackSize          : " << StackSize << "\n";
+  #endif
+
+  Offset += StackSize;
+  
+  // fold constant into offset.
+  Offset += MI.getOperand(i + 1).getImm();
+  MI.getOperand(i + 1).ChangeToImmediate(0);
+  
+  assert(Offset%4 == 0 && "Misaligned stack offset");
+
+  #ifndef NDEBUG
+  DOUT << "Offset             : " << Offset << "\n";
+  DOUT << "<--------->\n";
+  #endif
+  
+  Offset/=4;
+  
+  bool FP = hasFP(MF);
+  
+  if (FP) {
+    bool isUs = isImmUs(Offset);
+    MachineBasicBlock &MBB = *MI.getParent();
+    unsigned FramePtr = XCore::R10;
+    unsigned Reg = MI.getOperand(0).getReg();
+    bool isKill = MI.getOperand(0).isKill();
+    
+    if (Reg == XCore::LR) {
+      // The LR should have been save in the prologue.
+      cerr << "saving LR to FP unimplemented\n";
+      abort();
+    }
+
+    MachineInstr *New = 0;
+    if (!isUs) {
+      if (!RS) {
+        cerr << "eliminateFrameIndex Frame size too big: " << Offset << "\n";
+        abort();
+      }
+      unsigned ScratchReg = RS->scavengeRegister(XCore::GRRegsRegisterClass, II,
+                                                 SPAdj);
+      loadConstant(MBB, II, ScratchReg, Offset);
+      switch (MI.getOpcode()) {
+      case XCore::LDWSP_lru6:
+        New = BuildMI(MBB, II, TII.get(XCore::LDW_3r), Reg)
+              .addReg(FramePtr)
+              .addReg(ScratchReg, false, false, true);
+        break;
+      case XCore::STWSP_lru6:
+        New = BuildMI(MBB, II, TII.get(XCore::STW_3r))
+              .addReg(Reg, false, false, isKill)
+              .addReg(FramePtr)
+              .addReg(ScratchReg, false, false, true);
+        break;
+      case XCore::LDAWSP_lru6:
+        New = BuildMI(MBB, II, TII.get(XCore::LDAWF_l3r), Reg)
+              .addReg(FramePtr)
+              .addReg(ScratchReg, false, false, true);
+        break;
+      default:
+        assert(0 && "Unexpected Opcode\n");
+      }
+    } else {
+      switch (MI.getOpcode()) {
+      case XCore::LDWSP_lru6:
+        New = BuildMI(MBB, II, TII.get(XCore::LDW_2rus), Reg)
+              .addReg(FramePtr)
+              .addImm(Offset);
+        break;
+      case XCore::STWSP_lru6:
+        New = BuildMI(MBB, II, TII.get(XCore::STW_2rus))
+              .addReg(Reg, false, false, isKill)
+              .addReg(FramePtr)
+              .addImm(Offset);
+        break;
+      case XCore::LDAWSP_lru6:
+        New = BuildMI(MBB, II, TII.get(XCore::LDAWF_l2rus), Reg)
+              .addReg(FramePtr)
+              .addImm(Offset);
+        break;
+      default:
+        assert(0 && "Unexpected Opcode\n");
+      }
+    }
+    
+    // Erase old instruction.
+    MBB.erase(II);
+  } else {
+    bool isU6 = isImmU6(Offset);
+    if (!isU6 && !isImmU16(Offset)) {
+      // FIXME could make this work for LDWSP, LDAWSP.
+      cerr << "eliminateFrameIndex Frame size too big: " << Offset << "\n";
+      abort();
+    }
+
+    int NewOpcode = MI.getOpcode();
+
+    switch (NewOpcode) {
+    case XCore::LDWSP_lru6:
+      NewOpcode = (isU6) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6;
+      break;
+    case XCore::STWSP_lru6:
+      NewOpcode = (isU6) ? XCore::STWSP_ru6 : XCore::STWSP_lru6;
+      break;
+    case XCore::LDAWSP_lru6:
+      NewOpcode = (isU6) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6;
+      break;
+    default:
+      assert(0 && "Unexpected Opcode\n");
+    }
+
+    MI.setDesc(TII.get(NewOpcode));
+    FrameOp.ChangeToImmediate(Offset);
+  }
+}
+
+void
+XCoreRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
+                                                      RegScavenger *RS) const {
+  MachineFrameInfo *MFI = MF.getFrameInfo();
+  bool LRUsed = MF.getRegInfo().isPhysRegUsed(XCore::LR);
+  const TargetRegisterClass *RC = XCore::GRRegsRegisterClass;
+  XCoreFunctionInfo *XFI = MF.getInfo();
+  if (LRUsed) {
+    MF.getRegInfo().setPhysRegUnused(XCore::LR);
+    
+    bool isVarArg = MF.getFunction()->isVarArg();
+    int FrameIdx;
+    if (! isVarArg) {
+      // A fixed offset of 0 allows us to save / restore LR using entsp / retsp.
+      FrameIdx = MFI->CreateFixedObject(RC->getSize(), 0);
+    } else {
+      FrameIdx = MFI->CreateStackObject(RC->getSize(), RC->getAlignment());
+    }
+    XFI->setUsesLR(FrameIdx);
+    XFI->setLRSpillSlot(FrameIdx);
+  }
+  if (requiresRegisterScavenging(MF)) {
+    // Reserve a slot close to SP or frame pointer.
+    RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
+                                                RC->getAlignment()));
+  }
+  if (hasFP(MF)) {
+    // A callee save register is used to hold the FP.
+    // This needs saving / restoring in the epilogue / prologue.
+    XFI->setFPSpillSlot(MFI->CreateStackObject(RC->getSize(),
+                        RC->getAlignment()));
+  }
+}
+
+void XCoreRegisterInfo::
+processFunctionBeforeFrameFinalized(MachineFunction &MF) const {
+  
+}
+
+void XCoreRegisterInfo::
+loadConstant(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
+            unsigned DstReg, int64_t Value) const {
+  // TODO use mkmsk if possible.
+  if (!isImmU16(Value)) {
+    // TODO use constant pool.
+    cerr << "loadConstant value too big " << Value << "\n";
+    abort();
+  }
+  int Opcode = isImmU6(Value) ? XCore::LDC_ru6 : XCore::LDC_lru6;
+  BuildMI(MBB, I, TII.get(Opcode), DstReg).addImm(Value);
+}
+
+void XCoreRegisterInfo::
+storeToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
+                  unsigned SrcReg, int Offset) const {
+  assert(Offset%4 == 0 && "Misaligned stack offset");
+  Offset/=4;
+  bool isU6 = isImmU6(Offset);
+  if (!isU6 && !isImmU16(Offset)) {
+    cerr << "storeToStack offset too big " << Offset << "\n";
+    abort();
+  }
+  int Opcode = isU6 ? XCore::STWSP_ru6 : XCore::STWSP_lru6;
+  BuildMI(MBB, I, TII.get(Opcode))
+    .addReg(SrcReg)
+    .addImm(Offset)
+    .addImm(0);
+}
+
+void XCoreRegisterInfo::
+loadFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
+                  unsigned DstReg, int Offset) const {
+  assert(Offset%4 == 0 && "Misaligned stack offset");
+  Offset/=4;
+  bool isU6 = isImmU6(Offset);
+  if (!isU6 && !isImmU16(Offset)) {
+    cerr << "storeToStack offset too big " << Offset << "\n";
+    abort();
+  }
+  int Opcode = isU6 ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6;
+  BuildMI(MBB, I, TII.get(Opcode), DstReg)
+    .addImm(Offset)
+    .addImm(0);
+}
+
+void XCoreRegisterInfo::emitPrologue(MachineFunction &MF) const {
+  MachineBasicBlock &MBB = MF.front();   // Prolog goes in entry BB
+  MachineBasicBlock::iterator MBBI = MBB.begin();
+  MachineFrameInfo *MFI = MF.getFrameInfo();
+  MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
+  XCoreFunctionInfo *XFI = MF.getInfo();
+
+  bool FP = hasFP(MF);
+
+  // Work out frame sizes.
+  int FrameSize = MFI->getStackSize();
+
+  assert(FrameSize%4 == 0 && "Misaligned frame size");
+  
+  FrameSize/=4;
+  
+  bool isU6 = isImmU6(FrameSize);
+
+  if (!isU6 && !isImmU16(FrameSize)) {
+    // FIXME could emit multiple instructions.
+    cerr << "emitPrologue Frame size too big: " << FrameSize << "\n";
+    abort();
+  }
+  bool emitFrameMoves = needsFrameMoves(MF);
+
+  // Do we need to allocate space on the stack?
+  if (FrameSize) {
+    bool saveLR = XFI->getUsesLR();
+    bool LRSavedOnEntry = false;
+    int Opcode;
+    if (saveLR && (MFI->getObjectOffset(XFI->getLRSpillSlot()) == 0)) {
+      Opcode = (isU6) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6;
+      MBB.addLiveIn(XCore::LR);
+      saveLR = false;
+      LRSavedOnEntry = true;
+    } else {
+      Opcode = (isU6) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
+    }
+    BuildMI(MBB, MBBI, TII.get(Opcode)).addImm(FrameSize);
+    
+    if (emitFrameMoves) {
+      std::vector &Moves = MMI->getFrameMoves();
+      
+      // Show update of SP.
+      unsigned FrameLabelId = MMI->NextLabelID();
+      BuildMI(MBB, MBBI, TII.get(XCore::DBG_LABEL)).addImm(FrameLabelId);
+      
+      MachineLocation SPDst(MachineLocation::VirtualFP);
+      MachineLocation SPSrc(MachineLocation::VirtualFP, -FrameSize * 4);
+      Moves.push_back(MachineMove(FrameLabelId, SPDst, SPSrc));
+      
+      if (LRSavedOnEntry) {
+        MachineLocation CSDst(MachineLocation::VirtualFP, 0);
+        MachineLocation CSSrc(XCore::LR);
+        Moves.push_back(MachineMove(FrameLabelId, CSDst, CSSrc));
+      }
+    }
+    if (saveLR) {
+      int LRSpillOffset = MFI->getObjectOffset(XFI->getLRSpillSlot());
+      storeToStack(MBB, MBBI, XCore::LR, LRSpillOffset + FrameSize*4);
+      MBB.addLiveIn(XCore::LR);
+      
+      if (emitFrameMoves) {
+        unsigned SaveLRLabelId = MMI->NextLabelID();
+        BuildMI(MBB, MBBI, TII.get(XCore::DBG_LABEL)).addImm(SaveLRLabelId);
+        MachineLocation CSDst(MachineLocation::VirtualFP, LRSpillOffset);
+        MachineLocation CSSrc(XCore::LR);
+        MMI->getFrameMoves().push_back(MachineMove(SaveLRLabelId,
+                                                   CSDst, CSSrc));
+      }
+    }
+  }
+  
+  if (FP) {
+    // Save R10 to the stack.
+    int FPSpillOffset = MFI->getObjectOffset(XFI->getFPSpillSlot());
+    storeToStack(MBB, MBBI, XCore::R10, FPSpillOffset + FrameSize*4);
+    // R10 is live-in. It is killed at the spill.
+    MBB.addLiveIn(XCore::R10);
+    if (emitFrameMoves) {
+      unsigned SaveR10LabelId = MMI->NextLabelID();
+      BuildMI(MBB, MBBI, TII.get(XCore::DBG_LABEL)).addImm(SaveR10LabelId);
+      MachineLocation CSDst(MachineLocation::VirtualFP, FPSpillOffset);
+      MachineLocation CSSrc(XCore::R10);
+      MMI->getFrameMoves().push_back(MachineMove(SaveR10LabelId,
+                                                 CSDst, CSSrc));
+    }
+    // Set the FP from the SP.
+    unsigned FramePtr = XCore::R10;
+    BuildMI(MBB, MBBI, TII.get(XCore::LDAWSP_ru6), FramePtr)
+      .addImm(0)
+      .addImm(0);
+    if (emitFrameMoves) {
+      // Show FP is now valid.
+      unsigned FrameLabelId = MMI->NextLabelID();
+      BuildMI(MBB, MBBI, TII.get(XCore::DBG_LABEL)).addImm(FrameLabelId);
+      MachineLocation SPDst(FramePtr);
+      MachineLocation SPSrc(MachineLocation::VirtualFP);
+      MMI->getFrameMoves().push_back(MachineMove(FrameLabelId, SPDst, SPSrc));
+    }
+  }
+  
+  if (emitFrameMoves) {
+    // Frame moves for callee saved.
+    std::vector &Moves = MMI->getFrameMoves();
+    std::vector >&SpillLabels =
+        XFI->getSpillLabels();
+    for (unsigned I = 0, E = SpillLabels.size(); I != E; ++I) {
+      unsigned SpillLabel = SpillLabels[I].first;
+      CalleeSavedInfo &CSI = SpillLabels[I].second;
+      int Offset = MFI->getObjectOffset(CSI.getFrameIdx());
+      unsigned Reg = CSI.getReg();
+      MachineLocation CSDst(MachineLocation::VirtualFP, Offset);
+      MachineLocation CSSrc(Reg);
+      Moves.push_back(MachineMove(SpillLabel, CSDst, CSSrc));
+    }
+  }
+}
+
+void XCoreRegisterInfo::emitEpilogue(MachineFunction &MF,
+                                     MachineBasicBlock &MBB) const {
+  MachineFrameInfo *MFI            = MF.getFrameInfo();
+  MachineBasicBlock::iterator MBBI = prior(MBB.end());
+  
+  bool FP = hasFP(MF);
+  
+  if (FP) {
+    // Restore the stack pointer.
+    unsigned FramePtr = XCore::R10;
+    BuildMI(MBB, MBBI, TII.get(XCore::SETSP_1r))
+      .addReg(FramePtr);
+  }
+
+  // Work out frame sizes.
+  int FrameSize = MFI->getStackSize();
+
+  assert(FrameSize%4 == 0 && "Misaligned frame size");
+
+  FrameSize/=4;
+  
+  bool isU6 = isImmU6(FrameSize);
+
+  if (!isU6 && !isImmU16(FrameSize)) {
+    // FIXME could emit multiple instructions.
+    cerr << "emitEpilogue Frame size too big: " << FrameSize << "\n";
+    abort();
+  }
+
+  if (FrameSize) {
+    XCoreFunctionInfo *XFI = MF.getInfo();
+    
+    if (FP) {
+      // Restore R10
+      int FPSpillOffset = MFI->getObjectOffset(XFI->getFPSpillSlot());
+      FPSpillOffset += FrameSize*4;
+      loadFromStack(MBB, MBBI, XCore::R10, FPSpillOffset);
+    }
+    bool restoreLR = XFI->getUsesLR();
+    if (restoreLR && MFI->getObjectOffset(XFI->getLRSpillSlot()) != 0) {
+      int LRSpillOffset = MFI->getObjectOffset(XFI->getLRSpillSlot());
+      LRSpillOffset += FrameSize*4;
+      loadFromStack(MBB, MBBI, XCore::LR, LRSpillOffset);
+      restoreLR = false;
+    }
+    if (restoreLR) {
+      // Fold prologue into return instruction
+      assert(MBBI->getOpcode() == XCore::RETSP_u6
+        || MBBI->getOpcode() == XCore::RETSP_lu6);
+      int Opcode = (isU6) ? XCore::RETSP_u6 : XCore::RETSP_lu6;
+      BuildMI(MBB, MBBI, TII.get(Opcode)).addImm(FrameSize);
+      MBB.erase(MBBI);
+    } else {
+      int Opcode = (isU6) ? XCore::LDAWSP_ru6_RRegs : XCore::LDAWSP_lru6_RRegs;
+      BuildMI(MBB, MBBI, TII.get(Opcode), XCore::SP).addImm(FrameSize);
+    }
+  }
+}
+
+int XCoreRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
+  return XCoreGenRegisterInfo::getDwarfRegNumFull(RegNum, 0);
+}
+
+unsigned XCoreRegisterInfo::getFrameRegister(MachineFunction &MF) const {
+  bool FP = hasFP(MF);
+  
+  return FP ? XCore::R10 : XCore::SP;
+}
+
+unsigned XCoreRegisterInfo::getRARegister() const {
+  return XCore::LR;
+}
+
+void XCoreRegisterInfo::getInitialFrameState(std::vector &Moves)
+                                                                         const {
+  // Initial state of the frame pointer is SP.
+  MachineLocation Dst(MachineLocation::VirtualFP);
+  MachineLocation Src(XCore::SP, 0);
+  Moves.push_back(MachineMove(0, Dst, Src));
+}
+
+#include "XCoreGenRegisterInfo.inc"
+

Added: llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h (added)
+++ llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h Fri Nov  7 04:59:00 2008
@@ -0,0 +1,94 @@
+//===- XCoreRegisterInfo.h - XCore Register Information Impl ----*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the XCore implementation of the MRegisterInfo class.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef XCOREREGISTERINFO_H
+#define XCOREREGISTERINFO_H
+
+#include "llvm/Target/TargetRegisterInfo.h"
+#include "XCoreGenRegisterInfo.h.inc"
+
+namespace llvm {
+
+class TargetInstrInfo;
+
+struct XCoreRegisterInfo : public XCoreGenRegisterInfo {
+private:
+  const TargetInstrInfo &TII;
+
+  void loadConstant(MachineBasicBlock &MBB,
+                  MachineBasicBlock::iterator I,
+                  unsigned DstReg, int64_t Value) const;
+
+  void storeToStack(MachineBasicBlock &MBB,
+                  MachineBasicBlock::iterator I,
+                  unsigned SrcReg, int Offset) const;
+
+  void loadFromStack(MachineBasicBlock &MBB,
+                  MachineBasicBlock::iterator I,
+                  unsigned DstReg, int Offset) const;
+
+public:
+  XCoreRegisterInfo(const TargetInstrInfo &tii);
+
+  /// Code Generation virtual methods...
+
+  const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
+
+  const TargetRegisterClass* const* getCalleeSavedRegClasses(
+                                     const MachineFunction *MF = 0) const;
+
+  BitVector getReservedRegs(const MachineFunction &MF) const;
+  
+  bool requiresRegisterScavenging(const MachineFunction &MF) const;
+
+  bool hasFP(const MachineFunction &MF) const;
+
+  void eliminateCallFramePseudoInstr(MachineFunction &MF,
+                                     MachineBasicBlock &MBB,
+                                     MachineBasicBlock::iterator I) const;
+
+  void eliminateFrameIndex(MachineBasicBlock::iterator II,
+                           int SPAdj, RegScavenger *RS = NULL) const;
+                           
+  void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
+                                                RegScavenger *RS = NULL) const;
+
+  void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
+
+  void emitPrologue(MachineFunction &MF) const;
+  void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
+  
+  // Debug information queries.
+  unsigned getRARegister() const;
+  unsigned getFrameRegister(MachineFunction &MF) const;
+  void getInitialFrameState(std::vector &Moves) const;
+
+  //! Return the array of argument passing registers
+  /*!
+    \note The size of this array is returned by getArgRegsSize().
+    */
+  static const unsigned *getArgRegs(const MachineFunction *MF = 0);
+
+  //! Return the size of the argument passing register array
+  static unsigned getNumArgRegs(const MachineFunction *MF = 0);
+  
+  //! Return whether to emit frame moves
+  static bool needsFrameMoves(const MachineFunction &MF);
+
+  //! Get DWARF debugging register number
+  int getDwarfRegNum(unsigned RegNum, bool isEH) const;
+};
+
+} // end namespace llvm
+
+#endif

Added: llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.td?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.td (added)
+++ llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.td Fri Nov  7 04:59:00 2008
@@ -0,0 +1,91 @@
+//===- XCoreRegisterInfo.td - XCore Register defs ----------*- tablegen -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+//===----------------------------------------------------------------------===//
+//  Declarations that describe the XCore register file 
+//===----------------------------------------------------------------------===//
+
+class XCoreReg : Register {
+  field bits<4> Num;
+  let Namespace = "XCore";
+}
+
+// Registers are identified with 4-bit ID numbers.
+// Ri - 32-bit integer registers
+class Ri num, string n> : XCoreReg {
+  let Num = num;
+}
+
+// CPU registers
+def R0  : Ri< 0, "r0">, DwarfRegNum<[0]>;
+def R1  : Ri< 1, "r1">, DwarfRegNum<[1]>;
+def R2  : Ri< 2, "r2">, DwarfRegNum<[2]>; 
+def R3  : Ri< 3, "r3">, DwarfRegNum<[3]>;
+def R4  : Ri< 4, "r4">, DwarfRegNum<[4]>;
+def R5  : Ri< 5, "r5">, DwarfRegNum<[5]>; 
+def R6  : Ri< 6, "r6">, DwarfRegNum<[6]>;
+def R7  : Ri< 7, "r7">, DwarfRegNum<[7]>;
+def R8  : Ri< 8, "r8">, DwarfRegNum<[8]>;
+def R9  : Ri< 9, "r9">, DwarfRegNum<[9]>; 
+def R10 : Ri<10, "r10">, DwarfRegNum<[10]>;
+def R11 : Ri<11, "r11">, DwarfRegNum<[11]>;
+def CP : Ri<12, "cp">, DwarfRegNum<[12]>; 
+def DP : Ri<13, "dp">, DwarfRegNum<[13]>;
+def SP : Ri<14, "sp">, DwarfRegNum<[14]>;
+def LR : Ri<15, "lr">, DwarfRegNum<[15]>;
+
+// Register classes.
+//
+def GRRegs : RegisterClass<"XCore", [i32], 32,
+  // Return values and arguments
+  [R0, R1, R2, R3,
+  // Not preserved across procedure calls
+  R11,
+  // Callee save
+  R4, R5, R6, R7, R8, R9, R10]> {
+  let MethodProtos = [{
+    iterator allocation_order_begin(const MachineFunction &MF) const;
+    iterator allocation_order_end(const MachineFunction &MF) const;
+  }];
+  let MethodBodies = [{
+    GRRegsClass::iterator
+    GRRegsClass::allocation_order_begin(const MachineFunction &MF) const {
+      return begin();
+    }
+    GRRegsClass::iterator
+    GRRegsClass::allocation_order_end(const MachineFunction &MF) const {
+      const TargetMachine &TM = MF.getTarget();
+      const TargetRegisterInfo *RI = TM.getRegisterInfo();
+      if (RI->hasFP(MF))
+        return end()-1;  // don't allocate R10
+      else
+        return end();
+    }
+  }];
+}
+
+def RRegs : RegisterClass<"XCore", [i32], 32,
+  // Reserved
+  [CP, DP, SP, LR]> {
+  let MethodProtos = [{
+    iterator allocation_order_begin(const MachineFunction &MF) const;
+    iterator allocation_order_end(const MachineFunction &MF) const;
+  }];
+  let MethodBodies = [{
+    RRegsClass::iterator
+    RRegsClass::allocation_order_begin(const MachineFunction &MF) const {
+      return begin();
+    }
+    RRegsClass::iterator
+    RRegsClass::allocation_order_end(const MachineFunction &MF) const {
+      // No allocatable registers
+      return begin();
+    }
+  }];
+}

Added: llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp (added)
+++ llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp Fri Nov  7 04:59:00 2008
@@ -0,0 +1,28 @@
+//===- XCoreSubtarget.cpp - XCore Subtarget Information -----------*- C++ -*-=//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements the XCore specific subclass of TargetSubtarget.
+//
+//===----------------------------------------------------------------------===//
+
+#include "XCoreSubtarget.h"
+#include "XCore.h"
+#include "XCoreGenSubtarget.inc"
+using namespace llvm;
+
+XCoreSubtarget::XCoreSubtarget(const TargetMachine &TM, const Module &M, 
+                             const std::string &FS)
+  : IsXS1A(false),
+    IsXS1B(false)
+{
+  std::string CPU = "xs1a-generic";
+
+  // Parse features string.
+  ParseSubtargetFeatures(FS, CPU);
+}

Added: llvm/trunk/lib/Target/XCore/XCoreSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreSubtarget.h?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreSubtarget.h (added)
+++ llvm/trunk/lib/Target/XCore/XCoreSubtarget.h Fri Nov  7 04:59:00 2008
@@ -0,0 +1,45 @@
+//=====-- XCoreSubtarget.h - Define Subtarget for the XCore -----*- C++ -*--==//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file declares the XCore specific subclass of TargetSubtarget.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef XCORESUBTARGET_H
+#define XCORESUBTARGET_H
+
+#include "llvm/Target/TargetSubtarget.h"
+#include "llvm/Target/TargetMachine.h"
+
+#include 
+
+namespace llvm {
+class Module;
+
+class XCoreSubtarget : public TargetSubtarget {
+  bool IsXS1A;
+  bool IsXS1B;
+
+public:
+  /// This constructor initializes the data members to match that
+  /// of the specified module.
+  ///
+  XCoreSubtarget(const TargetMachine &TM, const Module &M, 
+                const std::string &FS);
+
+  bool isXS1A() const { return IsXS1A; }
+  bool isXS1B() const { return IsXS1B; }
+  
+  /// ParseSubtargetFeatures - Parses features string setting specified 
+  /// subtarget options.  Definition of function is auto generated by tblgen.
+  void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
+};
+} // End llvm namespace
+
+#endif

Added: llvm/trunk/lib/Target/XCore/XCoreTargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetAsmInfo.cpp?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreTargetAsmInfo.cpp (added)
+++ llvm/trunk/lib/Target/XCore/XCoreTargetAsmInfo.cpp Fri Nov  7 04:59:00 2008
@@ -0,0 +1,201 @@
+//===-- XCoreTargetAsmInfo.cpp - XCore asm properties -----------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the declarations of the XCoreTargetAsmInfo properties.
+// We use the small section flag for the CP relative and DP relative
+// flags. If a section is small and writable then it is DP relative. If a
+// section is small and not writable then it is CP relative.
+//
+//===----------------------------------------------------------------------===//
+
+#include "XCoreTargetAsmInfo.h"
+#include "XCoreTargetMachine.h"
+#include "llvm/GlobalVariable.h"
+#include "llvm/ADT/StringExtras.h"
+
+using namespace llvm;
+
+XCoreTargetAsmInfo::XCoreTargetAsmInfo(const XCoreTargetMachine &TM)
+  : ELFTargetAsmInfo(TM),
+    Subtarget(TM.getSubtargetImpl()) {
+  TextSection = getUnnamedSection("\t.text", SectionFlags::Code);
+  DataSection = getNamedSection("\t.dp.data", SectionFlags::Writeable |
+                                SectionFlags::Small);
+  BSSSection_  = getNamedSection("\t.dp.bss", SectionFlags::Writeable |
+                                 SectionFlags::BSS | SectionFlags::Small);
+  if (Subtarget->isXS1A()) {
+    ReadOnlySection = getNamedSection("\t.dp.rodata", SectionFlags::None |
+                                      SectionFlags::Writeable |
+                                      SectionFlags::Small);
+  } else {
+    ReadOnlySection = getNamedSection("\t.cp.rodata", SectionFlags::None |
+                                      SectionFlags::Small);
+  }
+  Data16bitsDirective = "\t.short\t";
+  Data32bitsDirective = "\t.long\t";
+  Data64bitsDirective = 0;
+  ZeroDirective = "\t.space\t";
+  CommentString = "#";
+  ConstantPoolSection = "\t.section\t.cp.rodata,\"ac\", at progbits";
+  JumpTableDataSection = "\t.section\t.dp.data,\"awd\", at progbits";
+  PrivateGlobalPrefix = ".L";
+  AscizDirective = ".asciiz";
+  WeakDefDirective = "\t.weak\t";
+  WeakRefDirective = "\t.weak\t";
+  SetDirective = "\t.set\t";
+
+  // Debug
+  HasLEB128 = true;
+  AbsoluteDebugSectionOffsets = true;
+  
+  DwarfAbbrevSection = "\t.section\t.debug_abbrev,\"\", at progbits";
+  DwarfInfoSection = "\t.section\t.debug_info,\"\", at progbits";
+  DwarfLineSection = "\t.section\t.debug_line,\"\", at progbits";
+  DwarfFrameSection = "\t.section\t.debug_frame,\"\", at progbits";
+  DwarfPubNamesSection = "\t.section\t.debug_pubnames,\"\", at progbits";
+  DwarfPubTypesSection = "\t.section\t.debug_pubtypes,\"\", at progbits";
+  DwarfStrSection = "\t.section\t.debug_str,\"\", at progbits";
+  DwarfLocSection = "\t.section\t.debug_loc,\"\", at progbits";
+  DwarfARangesSection = "\t.section\t.debug_aranges,\"\", at progbits";
+  DwarfRangesSection = "\t.section\t.debug_ranges,\"\", at progbits";
+  DwarfMacInfoSection = "\t.section\t.debug_macinfo,\"\", at progbits";
+}
+
+const Section*
+XCoreTargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const {
+  SectionKind::Kind Kind = SectionKindForGlobal(GV);
+
+  if (const GlobalVariable *GVar = dyn_cast(GV))
+  {
+    if (!GVar->mayBeOverridden()) {
+      switch (Kind) {
+      case SectionKind::RODataMergeStr:
+        return MergeableStringSection(GVar);
+      case SectionKind::RODataMergeConst:
+        return getReadOnlySection();
+      case SectionKind::ThreadData:
+        return DataSection;
+      case SectionKind::ThreadBSS:
+        return getBSSSection_();
+      default:
+        break;
+      }
+    }
+  }
+  return ELFTargetAsmInfo::SelectSectionForGlobal(GV);
+}
+
+const Section*
+XCoreTargetAsmInfo::SelectSectionForMachineConst(const Type *Ty) const {
+  return MergeableConstSection(Ty);
+}
+
+const Section*
+XCoreTargetAsmInfo::MergeableConstSection(const GlobalVariable *GV) const {
+  Constant *C = GV->getInitializer();
+  return MergeableConstSection(C->getType());
+}
+
+inline const Section*
+XCoreTargetAsmInfo::MergeableConstSection(const Type *Ty) const {
+  const TargetData *TD = TM.getTargetData();
+
+  unsigned Size = TD->getABITypeSize(Ty);
+  if (Size == 4 || Size == 8 || Size == 16) {
+    std::string Name =  ".cp.const" + utostr(Size);
+
+    return getNamedSection(Name.c_str(),
+                           SectionFlags::setEntitySize(SectionFlags::Mergeable |
+                                                       SectionFlags::Small,
+                                                       Size));
+  }
+
+  return getReadOnlySection();
+}
+
+const Section* XCoreTargetAsmInfo::
+MergeableStringSection(const GlobalVariable *GV) const {
+  // FIXME insert in correct mergable section
+  return getReadOnlySection();
+}
+
+unsigned XCoreTargetAsmInfo::
+SectionFlagsForGlobal(const GlobalValue *GV,
+                                     const char* Name) const {
+  unsigned Flags = ELFTargetAsmInfo::SectionFlagsForGlobal(GV, Name);
+  // Mask out unsupported flags
+  Flags &= ~(SectionFlags::Small | SectionFlags::TLS);
+
+  // Set CP / DP relative flags
+  if (GV) {
+    SectionKind::Kind Kind = SectionKindForGlobal(GV);
+    switch (Kind) {
+    case SectionKind::ThreadData:
+    case SectionKind::ThreadBSS:
+    case SectionKind::Data:
+    case SectionKind::BSS:
+    case SectionKind::SmallData:
+    case SectionKind::SmallBSS:
+      Flags |= SectionFlags::Small;
+      break;
+    case SectionKind::ROData:
+    case SectionKind::RODataMergeStr:
+    case SectionKind::SmallROData:
+      if (Subtarget->isXS1A()) {
+        Flags |= SectionFlags::Writeable;
+      }
+      Flags |=SectionFlags::Small;
+      break;
+    case SectionKind::RODataMergeConst:
+      Flags |=SectionFlags::Small;
+    default:
+      break;
+    }
+  }
+
+  return Flags;
+}
+
+std::string XCoreTargetAsmInfo::
+printSectionFlags(unsigned flags) const {
+  std::string Flags = ",\"";
+
+  if (!(flags & SectionFlags::Debug))
+    Flags += 'a';
+  if (flags & SectionFlags::Code)
+    Flags += 'x';
+  if (flags & SectionFlags::Writeable)
+    Flags += 'w';
+  if (flags & SectionFlags::Mergeable)
+    Flags += 'M';
+  if (flags & SectionFlags::Strings)
+    Flags += 'S';
+  if (flags & SectionFlags::TLS)
+    Flags += 'T';
+  if (flags & SectionFlags::Small) {
+    if (flags & SectionFlags::Writeable)
+      Flags += 'd'; // DP relative
+    else
+      Flags += 'c'; // CP relative
+  }
+
+  Flags += "\",";
+  
+  Flags += '@';
+
+  if (flags & SectionFlags::BSS)
+    Flags += "nobits";
+  else
+    Flags += "progbits";
+
+  if (unsigned entitySize = SectionFlags::getEntitySize(flags))
+    Flags += "," + utostr(entitySize);
+
+  return Flags;
+}

Added: llvm/trunk/lib/Target/XCore/XCoreTargetAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetAsmInfo.h?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreTargetAsmInfo.h (added)
+++ llvm/trunk/lib/Target/XCore/XCoreTargetAsmInfo.h Fri Nov  7 04:59:00 2008
@@ -0,0 +1,45 @@
+//=====-- XCoreTargetAsmInfo.h - XCore asm properties ---------*- C++ -*--====//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the declaration of the XCoreTargetAsmInfo class.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef XCORETARGETASMINFO_H
+#define XCORETARGETASMINFO_H
+
+#include "llvm/Target/ELFTargetAsmInfo.h"
+
+namespace llvm {
+
+  // Forward declarations.
+  class XCoreTargetMachine;
+  class XCoreSubtarget;
+
+  class XCoreTargetAsmInfo : public ELFTargetAsmInfo {
+  private:
+    const XCoreSubtarget *Subtarget;
+  public:
+    explicit XCoreTargetAsmInfo(const XCoreTargetMachine &TM);
+    
+    virtual const Section* SelectSectionForGlobal(const GlobalValue *GV) const;
+    virtual std::string printSectionFlags(unsigned flags) const;
+    const Section* MergeableConstSection(const GlobalVariable *GV) const;
+    inline const Section* MergeableConstSection(const Type *Ty) const;
+    const Section* MergeableStringSection(const GlobalVariable *GV) const;
+    virtual const Section*
+    SelectSectionForMachineConst(const Type *Ty) const;
+    virtual unsigned
+    SectionFlagsForGlobal(const GlobalValue *GV = NULL,
+                          const char* name = NULL) const;
+  };
+
+} // namespace llvm
+
+#endif

Added: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp (added)
+++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp Fri Nov  7 04:59:00 2008
@@ -0,0 +1,60 @@
+//===-- XCoreTargetMachine.cpp - Define TargetMachine for XCore -----------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+//
+//===----------------------------------------------------------------------===//
+
+#include "XCoreTargetAsmInfo.h"
+#include "XCoreTargetMachine.h"
+#include "XCore.h"
+#include "llvm/Module.h"
+#include "llvm/PassManager.h"
+#include "llvm/Target/TargetMachineRegistry.h"
+using namespace llvm;
+
+namespace {
+  // Register the target.
+  RegisterTarget X("xcore", "  XCore");
+}
+
+const TargetAsmInfo *XCoreTargetMachine::createTargetAsmInfo() const {
+  return new XCoreTargetAsmInfo(*this);
+}
+
+/// XCoreTargetMachine ctor - Create an ILP32 architecture model
+///
+XCoreTargetMachine::XCoreTargetMachine(const Module &M, const std::string &FS)
+  : Subtarget(*this, M, FS),
+    DataLayout("e-p:32:32:32-a0:0:32-f32:32:32-f64:32:32-i1:8:32-i8:8:32-"
+               "i16:16:32-i32:32:32-i64:32:32"),
+    InstrInfo(),
+    FrameInfo(*this),
+    TLInfo(*this) {
+}
+
+unsigned XCoreTargetMachine::getModuleMatchQuality(const Module &M) {
+  std::string TT = M.getTargetTriple();
+  if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "xcore-")
+    return 20;
+  
+  // Otherwise we don't match.
+  return 0;
+}
+
+bool XCoreTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
+  PM.add(createXCoreISelDag(*this));
+  return false;
+}
+
+bool XCoreTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
+                                            raw_ostream &Out) {
+  // Output assembly language.
+  PM.add(createXCoreCodePrinterPass(Out, *this));
+  return false;
+}

Added: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h?rev=58838&view=auto

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h (added)
+++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h Fri Nov  7 04:59:00 2008
@@ -0,0 +1,62 @@
+//===-- XCoreTargetMachine.h - Define TargetMachine for XCore ---*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file declares the XCore specific subclass of TargetMachine.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef XCORETARGETMACHINE_H
+#define XCORETARGETMACHINE_H
+
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetData.h"
+#include "XCoreFrameInfo.h"
+#include "XCoreSubtarget.h"
+#include "XCoreInstrInfo.h"
+#include "XCoreISelLowering.h"
+
+namespace llvm {
+
+class Module;
+
+class XCoreTargetMachine : public LLVMTargetMachine {
+  XCoreSubtarget Subtarget;
+  const TargetData DataLayout;       // Calculates type size & alignment
+  XCoreInstrInfo InstrInfo;
+  XCoreFrameInfo FrameInfo;
+  XCoreTargetLowering TLInfo;
+
+protected:
+  virtual const TargetAsmInfo *createTargetAsmInfo() const;
+
+public:
+  XCoreTargetMachine(const Module &M, const std::string &FS);
+
+  virtual const XCoreInstrInfo *getInstrInfo() const { return &InstrInfo; }
+  virtual const XCoreFrameInfo *getFrameInfo() const { return &FrameInfo; }
+  virtual const XCoreSubtarget *getSubtargetImpl() const { return &Subtarget; }
+  virtual       XCoreTargetLowering *getTargetLowering() const {
+    return const_cast(&TLInfo);
+  }
+
+  virtual const TargetRegisterInfo *getRegisterInfo() const {
+    return &InstrInfo.getRegisterInfo();
+  }
+  virtual const TargetData       *getTargetData() const { return &DataLayout; }
+  static unsigned getModuleMatchQuality(const Module &M);
+
+  // Pass Pipeline Configuration
+  virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
+  virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
+                                  raw_ostream &Out);
+};
+
+} // end namespace llvm
+
+#endif




From anton at korobeynikov.info  Fri Nov  7 05:04:17 2008
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Fri, 7 Nov 2008 14:04:17 +0300
Subject: [llvm-commits] [llvm] r58838 - in /llvm/trunk: ./ autoconf/
	lib/Target/XCore/
In-Reply-To: <200811071059.mA7Ax2Wk013798@zion.cs.uiuc.edu>
References: <200811071059.mA7Ax2Wk013798@zion.cs.uiuc.edu>
Message-ID: 

Hello, Richard

> Modified:
>    llvm/trunk/autoconf/configure.ac
>    llvm/trunk/configure
One minor thing: it's common practice to commit autogenerated stuff
(configures, bison-generated files) in separate commit in order not to
mess review with huge amount of autogenerated changes.
-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University


From scottm at aero.org  Fri Nov  7 05:06:44 2008
From: scottm at aero.org (Scott Michel)
Date: Fri, 07 Nov 2008 11:06:44 -0000
Subject: [llvm-commits] [llvm] r58839 -
	/llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp
Message-ID: <200811071106.mA7B6icH014041@zion.cs.uiuc.edu>

Author: pingbak
Date: Fri Nov  7 05:06:44 2008
New Revision: 58839

URL: http://llvm.org/viewvc/llvm-project?rev=58839&view=rev
Log:
CellSPU: Ensure that C strings are always put in the .rodata section

Modified:
    llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp?rev=58839&r1=58838&r2=58839&view=diff

==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUTargetAsmInfo.cpp Fri Nov  7 05:06:44 2008
@@ -24,6 +24,7 @@
   CommentString = "#";
   GlobalPrefix = "";
   PrivateGlobalPrefix = ".L";
+  CStringSection = ".rodata";
 }
 
 /// PreferredEHDataFormat - This hook allows the target to select data




From anton at korobeynikov.info  Fri Nov  7 05:11:52 2008
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Fri, 7 Nov 2008 14:11:52 +0300
Subject: [llvm-commits] [llvm] r58838 - in /llvm/trunk: ./ autoconf/
	lib/Target/XCore/
In-Reply-To: 
References: <200811071059.mA7Ax2Wk013798@zion.cs.uiuc.edu>
	
Message-ID: 

Two new warnings (they were added only to gcc 4.3):

XCoreAsmPrinter.cpp:150: warning: suggest parentheses around && within ||
XCoreISelDAGToDAG.cpp:86: warning: suggest parentheses around
assignment used as truth value

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University


From richard at xmos.com  Fri Nov  7 05:21:13 2008
From: richard at xmos.com (Richard Osborne)
Date: Fri, 07 Nov 2008 11:21:13 -0000
Subject: [llvm-commits] [llvm] r58840 - in /llvm/trunk/lib/Target/XCore:
 XCoreAsmPrinter.cpp XCoreISelDAGToDAG.cpp
Message-ID: <200811071121.mA7BLDOt014479@zion.cs.uiuc.edu>

Author: friedgold
Date: Fri Nov  7 05:21:09 2008
New Revision: 58840

URL: http://llvm.org/viewvc/llvm-project?rev=58840&view=rev
Log:
Fix compile warnings.

Modified:
    llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp
    llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp?rev=58840&r1=58839&r2=58840&view=diff

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp Fri Nov  7 05:21:09 2008
@@ -147,9 +147,9 @@
 void XCoreAsmPrinter::
 emitArrayBound(const std::string &name, const GlobalVariable *GV)
 {
-  assert((GV->hasExternalLinkage() ||
+  assert(((GV->hasExternalLinkage() ||
     GV->hasWeakLinkage()) ||
-    GV->hasLinkOnceLinkage() && "Unexpected linkage");
+    GV->hasLinkOnceLinkage()) && "Unexpected linkage");
   if (const ArrayType *ATy = dyn_cast(
     cast(GV->getType())->getElementType()))
   {

Modified: llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp?rev=58840&r1=58839&r2=58840&view=diff

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreISelDAGToDAG.cpp Fri Nov  7 05:21:09 2008
@@ -83,7 +83,7 @@
 bool XCoreDAGToDAGISel::SelectADDRspii(SDValue Op, SDValue Addr,
                                   SDValue &Base, SDValue &Offset) {
   FrameIndexSDNode *FIN = 0;
-  if (FIN = dyn_cast(Addr)) {
+  if ((FIN = dyn_cast(Addr))) {
     Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
     Offset = CurDAG->getTargetConstant(0, MVT::i32);
     return true;




From richard at xmos.com  Fri Nov  7 05:24:12 2008
From: richard at xmos.com (Richard Osborne)
Date: Fri, 07 Nov 2008 11:24:12 -0000
Subject: [llvm-commits] [llvm] r58841 - in /llvm/trunk/test/CodeGen/XCore:
	./ basictest.ll dg.exp
Message-ID: <200811071124.mA7BOCrs014578@zion.cs.uiuc.edu>

Author: friedgold
Date: Fri Nov  7 05:24:12 2008
New Revision: 58841

URL: http://llvm.org/viewvc/llvm-project?rev=58841&view=rev
Log:
Add basic test for XCore backend

Added:
    llvm/trunk/test/CodeGen/XCore/
    llvm/trunk/test/CodeGen/XCore/basictest.ll
    llvm/trunk/test/CodeGen/XCore/dg.exp

Added: llvm/trunk/test/CodeGen/XCore/basictest.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/basictest.ll?rev=58841&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/XCore/basictest.ll (added)
+++ llvm/trunk/test/CodeGen/XCore/basictest.ll Fri Nov  7 05:24:12 2008
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=xcore
+
+define i32 @test(i32 %X) {
+	%tmp.1 = add i32 %X, 1
+	ret i32 %tmp.1
+}

Added: llvm/trunk/test/CodeGen/XCore/dg.exp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/dg.exp?rev=58841&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/XCore/dg.exp (added)
+++ llvm/trunk/test/CodeGen/XCore/dg.exp Fri Nov  7 05:24:12 2008
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target XCore] } {
+  RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}




From richard at xmos.com  Fri Nov  7 05:35:37 2008
From: richard at xmos.com (Richard Osborne)
Date: Fri, 07 Nov 2008 11:35:37 +0000
Subject: [llvm-commits] [llvm] r58838 - in /llvm/trunk: ./
	autoconf/	lib/Target/XCore/
In-Reply-To: 
References: <200811071059.mA7Ax2Wk013798@zion.cs.uiuc.edu>	
	
Message-ID: <49142809.5030500@xmos.com>

Anton Korobeynikov wrote:
> Two new warnings (they were added only to gcc 4.3):
>
> XCoreAsmPrinter.cpp:150: warning: suggest parentheses around && within ||
> XCoreISelDAGToDAG.cpp:86: warning: suggest parentheses around
> assignment used as truth value
>
>   
Thanks, should be fixed in r58840:

http://article.gmane.org/gmane.comp.compilers.llvm.cvs/40595

-- 
Richard Osborne | XMOS
http://www.xmos.com




From richard at xmos.com  Fri Nov  7 06:37:47 2008
From: richard at xmos.com (Richard Osborne)
Date: Fri, 07 Nov 2008 12:37:47 -0000
Subject: [llvm-commits] [llvm] r58843 - /llvm/trunk/CMakeLists.txt
Message-ID: <200811071237.mA7CblZn016933@zion.cs.uiuc.edu>

Author: friedgold
Date: Fri Nov  7 06:37:45 2008
New Revision: 58843

URL: http://llvm.org/viewvc/llvm-project?rev=58843&view=rev
Log:
Add XCore backend to CMake build.

Modified:
    llvm/trunk/CMakeLists.txt

Modified: llvm/trunk/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CMakeLists.txt?rev=58843&r1=58842&r2=58843&view=diff

==============================================================================
--- llvm/trunk/CMakeLists.txt (original)
+++ llvm/trunk/CMakeLists.txt Fri Nov  7 06:37:45 2008
@@ -18,7 +18,7 @@
     CACHE STRING "Semicolon-separated list of targets to build")
 else( MSVC )
   set(LLVM_TARGETS_TO_BUILD
-    Alpha ARM CBackend CellSPU CppBackend IA64 Mips MSIL PIC16 PowerPC Sparc X86
+    Alpha ARM CBackend CellSPU CppBackend IA64 Mips MSIL PIC16 PowerPC Sparc X86 XCore
     CACHE STRING "Semicolon-separated list of targets to build")
 endif( MSVC )
 




From richard at xmos.com  Fri Nov  7 06:41:15 2008
From: richard at xmos.com (Richard Osborne)
Date: Fri, 07 Nov 2008 12:41:15 -0000
Subject: [llvm-commits] [llvm] r58844 - /llvm/trunk/CREDITS.TXT
Message-ID: <200811071241.mA7CfFkv017038@zion.cs.uiuc.edu>

Author: friedgold
Date: Fri Nov  7 06:41:14 2008
New Revision: 58844

URL: http://llvm.org/viewvc/llvm-project?rev=58844&view=rev
Log:
Add contributer information for XCore backend to CREDITS.TXT

Modified:
    llvm/trunk/CREDITS.TXT

Modified: llvm/trunk/CREDITS.TXT
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CREDITS.TXT?rev=58844&r1=58843&r2=58844&view=diff

==============================================================================
--- llvm/trunk/CREDITS.TXT (original)
+++ llvm/trunk/CREDITS.TXT Fri Nov  7 06:41:14 2008
@@ -270,3 +270,7 @@
 D: Darwin exception handling
 D: MMX & SSSE3 instructions
 D: SPEC2006 support
+
+N: Richard Osborne
+E: richard at xmos.com
+D: XCore backend




From richard at xmos.com  Fri Nov  7 06:44:36 2008
From: richard at xmos.com (Richard Osborne)
Date: Fri, 07 Nov 2008 12:44:36 -0000
Subject: [llvm-commits] [llvm] r58845 - /llvm/trunk/CREDITS.TXT
Message-ID: <200811071244.mA7Ciapw017138@zion.cs.uiuc.edu>

Author: friedgold
Date: Fri Nov  7 06:44:36 2008
New Revision: 58845

URL: http://llvm.org/viewvc/llvm-project?rev=58845&view=rev
Log:
Keep CREDITS.TXT sorted by name.

Modified:
    llvm/trunk/CREDITS.TXT

Modified: llvm/trunk/CREDITS.TXT
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CREDITS.TXT?rev=58845&r1=58844&r2=58845&view=diff

==============================================================================
--- llvm/trunk/CREDITS.TXT (original)
+++ llvm/trunk/CREDITS.TXT Fri Nov  7 06:44:36 2008
@@ -219,6 +219,10 @@
 E: morten at hue.no
 D: Visual C++ compatibility fixes 
 
+N: Richard Osborne
+E: richard at xmos.com
+D: XCore backend
+
 N: Devang Patel
 E: dpatel at apple.com
 D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate
@@ -270,7 +274,3 @@
 D: Darwin exception handling
 D: MMX & SSSE3 instructions
 D: SPEC2006 support
-
-N: Richard Osborne
-E: richard at xmos.com
-D: XCore backend




From nicholas at mxc.ca  Fri Nov  7 08:52:56 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Fri, 07 Nov 2008 14:52:56 -0000
Subject: [llvm-commits] [llvm] r58852 -
	/llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp
Message-ID: <200811071452.mA7Eqvnv021478@zion.cs.uiuc.edu>

Author: nicholas
Date: Fri Nov  7 08:52:51 2008
New Revision: 58852

URL: http://llvm.org/viewvc/llvm-project?rev=58852&view=rev
Log:
Update to add newer bitcodes.

Modified:
    llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp

Modified: llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp?rev=58852&r1=58851&r2=58852&view=diff

==============================================================================
--- llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp (original)
+++ llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp Fri Nov  7 08:52:51 2008
@@ -123,6 +123,7 @@
     case bitc::MODULE_CODE_FUNCTION:    return "FUNCTION";
     case bitc::MODULE_CODE_ALIAS:       return "ALIAS";
     case bitc::MODULE_CODE_PURGEVALS:   return "PURGEVALS";
+    case bitc::MODULE_CODE_GCNAME:      return "GCNAME";
     }
   case bitc::PARAMATTR_BLOCK_ID:
     switch (CodeID) {
@@ -132,18 +133,21 @@
   case bitc::TYPE_BLOCK_ID:
     switch (CodeID) {
     default: return 0;
-    case bitc::TYPE_CODE_NUMENTRY: return "NUMENTRY";
-    case bitc::TYPE_CODE_VOID:     return "VOID";
-    case bitc::TYPE_CODE_FLOAT:    return "FLOAT";
-    case bitc::TYPE_CODE_DOUBLE:   return "DOUBLE";
-    case bitc::TYPE_CODE_LABEL:    return "LABEL";
-    case bitc::TYPE_CODE_OPAQUE:   return "OPAQUE";
-    case bitc::TYPE_CODE_INTEGER:  return "INTEGER";
-    case bitc::TYPE_CODE_POINTER:  return "POINTER";
-    case bitc::TYPE_CODE_FUNCTION: return "FUNCTION";
-    case bitc::TYPE_CODE_STRUCT:   return "STRUCT";
-    case bitc::TYPE_CODE_ARRAY:    return "ARRAY";
-    case bitc::TYPE_CODE_VECTOR:   return "VECTOR";
+    case bitc::TYPE_CODE_NUMENTRY:  return "NUMENTRY";
+    case bitc::TYPE_CODE_VOID:      return "VOID";
+    case bitc::TYPE_CODE_FLOAT:     return "FLOAT";
+    case bitc::TYPE_CODE_DOUBLE:    return "DOUBLE";
+    case bitc::TYPE_CODE_LABEL:     return "LABEL";
+    case bitc::TYPE_CODE_OPAQUE:    return "OPAQUE";
+    case bitc::TYPE_CODE_INTEGER:   return "INTEGER";
+    case bitc::TYPE_CODE_POINTER:   return "POINTER";
+    case bitc::TYPE_CODE_FUNCTION:  return "FUNCTION";
+    case bitc::TYPE_CODE_STRUCT:    return "STRUCT";
+    case bitc::TYPE_CODE_ARRAY:     return "ARRAY";
+    case bitc::TYPE_CODE_VECTOR:    return "VECTOR";
+    case bitc::TYPE_CODE_X86_FP80:  return "X86_FP80";
+    case bitc::TYPE_CODE_FP128:     return "FP128";
+    case bitc::TYPE_CODE_PPC_FP128: return "PPC_FP128";
     }
     
   case bitc::CONSTANTS_BLOCK_ID:
@@ -199,6 +203,10 @@
     case bitc::FUNC_CODE_INST_VAARG:       return "INST_VAARG";
     case bitc::FUNC_CODE_INST_STORE2:      return "INST_STORE2";
     case bitc::FUNC_CODE_INST_GETRESULT:   return "INST_GETRESULT";
+    case bitc::FUNC_CODE_INST_EXTRACTVAL:  return "INST_EXTRACTVAL";
+    case bitc::FUNC_CODE_INST_INSERTVAL:   return "INST_INSERTVAL";
+    case bitc::FUNC_CODE_INST_CMP2:        return "INST_CMP2";
+    case bitc::FUNC_CODE_INST_VSELECT:     return "INST_VSELECT";
     }
   case bitc::TYPE_SYMTAB_BLOCK_ID:
     switch (CodeID) {




From jbrandmeyer at earthlink.net  Thu Nov  6 20:58:27 2008
From: jbrandmeyer at earthlink.net (Jonathan Brandmeyer)
Date: Thu, 06 Nov 2008 21:58:27 -0500
Subject: [llvm-commits] Patch to the Lexicon
In-Reply-To: <49126A25.30106@mxc.ca>
References: <1225664442.10243.13.camel@pheonix>
	<6D582580-F9B5-4263-8DB6-B4D117BAF9CC@apple.com>
	<1a5018f7-23ff-4b95-b097-f3976fd83be9@s9g2000prg.googlegroups.com>
	<215CABF4-DEBC-41AD-B6B1-8135FC22036F@apple.com>
	<1225941723.26010.14.camel@pheonix>  <49126A25.30106@mxc.ca>
Message-ID: <1226026707.31499.16.camel@pheonix>

On Wed, 2008-11-05 at 19:53 -0800, Nick Lewycky wrote:
> Jonathan Brandmeyer wrote:
> 
> > PS: What is RAUW?  I'll volunteer the clerical work of adding it to the
> > Lexicon if you'd be kind enough to hand me a small dose of clue :)
> 
> ReplaceAllUsesWith. It can be used to substitute any one Value for 
> another (except that on a Constant, replaceUsesOfWithOnConstant should 
> be used instead).
> 
> For example, given:
> 
>    %x = add i32 %i, 0
> 
> an optimization would call %x->RAUW(%i).

Patch as promised.

Thanks,

-Jonathan
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From dalej at apple.com  Fri Nov  7 11:40:33 2008
From: dalej at apple.com (Dale Johannesen)
Date: Fri, 7 Nov 2008 09:40:33 -0800
Subject: [llvm-commits] [llvm] r58825 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
In-Reply-To: 
References: <200811070128.mA71S2HU018770@zion.cs.uiuc.edu>
	
	
	
Message-ID: <4AE22047-F908-48F6-820B-E3CA1F53EE33@apple.com>


On Nov 6, 2008, at 6:07 PMPST, Evan Cheng wrote:

>
> On Nov 6, 2008, at 5:53 PM, Dale Johannesen wrote:
>
>>
>> On Nov 6, 2008, at 5:50 PMPST, Evan Cheng wrote:
>>
>>>
>>> On Nov 6, 2008, at 5:28 PM, Dale Johannesen wrote:
>>>
>>>> Author: johannes
>>>> Date: Thu Nov  6 19:28:02 2008
>>>> New Revision: 58825
>>>>
>>>> URL: http://llvm.org/viewvc/llvm-project?rev=58825&view=rev
>>>> Log:
>>>> When we're doing a compare of load-AND-constant to 0
>>>> (e.g. a bitfield test) narrow the load as much as possible.
>>>> The has the potential to avoid unnecessary partial-word
>>>> load-after-store conflicts, which cause stalls on several targets.
>>>> Also a size win on x86 (testb vs testl).
>>>
>>> This can a loss if the load is narrowed to i16 though.
>>
>> Why?  testw is OK.
>
> 16-bit instructions are larger because of the 0x66 prefix.

Yes, but 16-bit immediates are smaller than 32-bit, for a net win.

>>> Assuming we
>>> have the checks in place, this is probably ok. But I still wonder if
>>> this is the approach we ought to take. Perhaps we need to attack all
>>> of the load-after-store issues?
>>
>> What did you have in mind?
>> Let's see how this one works.
>
> Perhaps a pass (or at least a more generic approach to look for load-
> after-store hazards). Just thinking out loud at this point. Perhaps
> someone will come up with a better idea.
>
> Evan
>
>>
>>
>>> Evan
>>>
>>>>
>>>>
>>>>
>>>> Modified:
>>>> llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
>>>>
>>>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=58825&r1=58824&r2=58825&view=diff
>>>>
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> ===================================================================
>>>> --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
>>>> (original)
>>>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Thu Nov
>>>> 6 19:28:02 2008
>>>> @@ -1352,6 +1352,52 @@
>>>>                            Zero, Cond);
>>>>      }
>>>>    }
>>>> +
>>>> +      // If the LHS is '(and load, const)', the RHS is 0,
>>>> +      // the test is for equality or unsigned, and all 1 bits of
>>>> the const are
>>>> +      // in the same partial word, see if we can shorten the load.
>>>> +      if (DCI.isBeforeLegalize() &&
>>>> +          N0.getOpcode() == ISD::AND && C1 == 0 &&
>>>> +          isa(N0.getOperand(0)) &&
>>>> +          N0.getOperand(0).getNode()->hasOneUse() &&
>>>> +          isa(N0.getOperand(1))) {
>>>> +        LoadSDNode *Lod = cast(N0.getOperand(0));
>>>> +        uint64_t Mask = cast(N0.getOperand(1))-
>>>>> getZExtValue();
>>>> +        unsigned bestWidth = 0, bestOffset = 0;
>>>> +        if (!Lod->isVolatile()) {
>>>> +          unsigned origWidth = N0.getValueType().getSizeInBits();
>>>> +          for (unsigned width = origWidth / 2; width>=8; width /=
>>>> 2) {
>>>> +            uint64_t newMask = (1ULL << width) - 1;
>>>> +            for (unsigned offset=0; offset>>> offset+
>>>> +) {
>>>> +              if ((newMask & Mask)==Mask) {
>>>> +                bestOffset = (uint64_t)offset * (width/8);
>>>> +                bestWidth = width;
>>>> +                break;
>>>> +              }
>>>> +              newMask = newMask << width;
>>>> +            }
>>>> +          }
>>>> +        }
>>>> +        if (bestWidth) {
>>>> +          MVT newVT = MVT::getIntegerVT(bestWidth);
>>>> +          if (newVT.isRound()) {
>>>> +            uint64_t bestMask = Mask >> (bestOffset * 8);
>>>> +            MVT PtrType = Lod->getOperand(1).getValueType();
>>>> +            SDValue Ptr = Lod->getBasePtr();
>>>> +            if (bestOffset != 0)
>>>> +              Ptr = DAG.getNode(ISD::ADD, PtrType, Lod-
>>>>> getBasePtr(),
>>>> +                                DAG.getConstant(bestOffset,
>>>> PtrType));
>>>> +            unsigned NewAlign = MinAlign(Lod->getAlignment(),
>>>> bestOffset);
>>>> +            SDValue NewLoad = DAG.getLoad(newVT, Lod->getChain(),
>>>> Ptr,
>>>> +                                          Lod->getSrcValue(),
>>>> +                                          Lod->getSrcValueOffset()
>>>> + bestOffset,
>>>> +                                          false, NewAlign);
>>>> +            return DAG.getSetCC(VT, DAG.getNode(ISD::AND, newVT,
>>>> NewLoad,
>>>> +
>>>> DAG.getConstant(bestMask, newVT)),
>>>> +                                    DAG.getConstant(0LL, newVT),
>>>> Cond);
>>>> +          }
>>>> +        }
>>>> +      }
>>>>
>>>>    // If the LHS is a ZERO_EXTEND, perform the comparison on the
>>>> input.
>>>>    if (N0.getOpcode() == ISD::ZERO_EXTEND) {
>>>>
>>>>
>>>> _______________________________________________
>>>> llvm-commits mailing list
>>>> llvm-commits at cs.uiuc.edu
>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>
>>> _______________________________________________
>>> llvm-commits mailing list
>>> llvm-commits at cs.uiuc.edu
>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>> ___________________________