Customizing LLVMC: Reference Manual

Mikhail Glushenkov <foldr@codedegers.com>

<result> = shl i32 4, %var   ; yields {i32}: 4 << %var
@@ -2616,7 +2618,9 @@
 This instruction always performs a logical shift right operation. The most
 significant bits of the result will be filled with zero bits after the 
 shift.  If op2 is (statically or dynamically) equal to or larger than
-the number of bits in op1, the result is undefined.
+the number of bits in op1, the result is undefined. If the arguments are
+vectors, each vector element of op1 is shifted by the corresponding shift
+amount in op2.
 
 Example:
 @@ -2651,8 +2655,9 @@
 This instruction always performs an arithmetic shift right operation, 
 The most significant bits of the result will be filled with the sign bit 
 of op1.  If op2 is (statically or dynamically) equal to or
-larger than the number of bits in op1, the result is undefined.
-
+larger than the number of bits in op1, the result is undefined. If the
+arguments are vectors, each vector element of op1 is shifted by the
+corresponding shift amount in op2.
 
 Example:
 



From baldrick at free.fr  Wed Dec 10 03:38:47 2008
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 10 Dec 2008 09:38:47 -0000
Subject: [llvm-commits] [llvm] r60832 -
	/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
Message-ID: <200812100938.mBA9cm9a026784@zion.cs.uiuc.edu>

Author: baldrick
Date: Wed Dec 10 03:38:36 2008
New Revision: 60832

URL: http://llvm.org/viewvc/llvm-project?rev=60832&view=rev
Log:
Don't dereference the end() iterator.  This was
causing a bunch of failures when running
"make ENABLE_EXPENSIVE_CHECKS=1 check".

Modified:
    llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp

Modified: llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp?rev=60832&r1=60831&r2=60832&view=diff

==============================================================================

--- llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp Wed Dec 10 03:38:36 2008
@@ -21,6 +21,7 @@
 #include "llvm/Function.h"
 #include "llvm/Analysis/AliasAnalysis.h"
 #include "llvm/ADT/Statistic.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/PredIteratorCache.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Target/TargetData.h"
@@ -401,7 +402,7 @@
     NonLocalDepInfo::iterator Entry = 
       std::upper_bound(Cache.begin(), Cache.begin()+NumSortedEntries,
                        std::make_pair(DirtyBB, MemDepResult()));
-    if (Entry != Cache.begin() && (&*Entry)[-1].first == DirtyBB)
+    if (Entry != Cache.begin() && prior(Entry)->first == DirtyBB)
       --Entry;
     
     MemDepResult *ExistingResult = 0;
@@ -506,7 +507,7 @@
   NonLocalDepInfo::iterator Entry =
     std::upper_bound(Cache->begin(), Cache->begin()+NumSortedEntries,
                      std::make_pair(BB, MemDepResult()));
-  if (Entry != Cache->begin() && (&*Entry)[-1].first == BB)
+  if (Entry != Cache->begin() && prior(Entry)->first == BB)
     --Entry;
   
   MemDepResult *ExistingResult = 0;




From baldrick at free.fr  Wed Dec 10 04:51:34 2008
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 10 Dec 2008 10:51:34 -0000
Subject: [llvm-commits] [llvm] r60833 - /llvm/trunk/docs/index.html
Message-ID: <200812101051.mBAApqTk029279@zion.cs.uiuc.edu>

Author: baldrick
Date: Wed Dec 10 04:50:58 2008
New Revision: 60833

URL: http://llvm.org/viewvc/llvm-project?rev=60833&view=rev
Log:
Mention the Ada and Fortran front-ends.

Modified:
    llvm/trunk/docs/index.html

Modified: llvm/trunk/docs/index.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/index.html?rev=60833&r1=60832&r2=60833&view=diff

==============================================================================
--- llvm/trunk/docs/index.html (original)
+++ llvm/trunk/docs/index.html Wed Dec 10 04:50:58 2008
@@ -108,8 +108,8 @@
 LLVM Testing Infrastructure Guide - A reference
 manual for using the LLVM testing infrastructure.
 
-How to build the C/C++ front-end -
-Instructions for building the front-end from source.
+How to build the Ada/C/C++/Fortran front-ends -
+Instructions for building gcc front-ends from source.
 
 The LLVM Lexicon - Definition of acronyms, terms
 and concepts used in LLVM.




From baldrick at free.fr  Wed Dec 10 06:30:59 2008
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 10 Dec 2008 12:30:59 -0000
Subject: [llvm-commits] [llvm] r60834 - in /llvm/trunk:
 lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
 lib/CodeGen/SelectionDAG/LegalizeTypes.h
 test/CodeGen/Generic/add-with-overflow-24.ll
Message-ID: <200812101231.mBACV0BD032131@zion.cs.uiuc.edu>

Author: baldrick
Date: Wed Dec 10 06:30:42 2008
New Revision: 60834

URL: http://llvm.org/viewvc/llvm-project?rev=60834&view=rev
Log:
For amusement, implement SADDO, SSUBO, UADDO, USUBO
for promoted integer types, eg: i16 on ppc-32, or
i24 on any platform.  Complete support for arbitrary
precision integers would require handling expanded
integer types, eg: i128, but I couldn't be bothered.

Added:
    llvm/trunk/test/CodeGen/Generic/add-with-overflow-24.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=60834&r1=60833&r2=60834&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Wed Dec 10 06:30:42 2008
@@ -92,11 +92,11 @@
   case ISD::UREM:        Result = PromoteIntRes_UDIV(N); break;
 
   case ISD::SADDO:
+  case ISD::SSUBO:       Result = PromoteIntRes_SADDSUBO(N, ResNo); break;
   case ISD::UADDO:
-  case ISD::SSUBO:
-  case ISD::USUBO:
+  case ISD::USUBO:       Result = PromoteIntRes_UADDSUBO(N, ResNo); break;
   case ISD::SMULO:
-  case ISD::UMULO:       Result = PromoteIntRes_XALUO(N, ResNo); break;
+  case ISD::UMULO:       Result = PromoteIntRes_XMULO(N, ResNo); break;
 
   case ISD::ATOMIC_LOAD_ADD_8:
   case ISD::ATOMIC_LOAD_SUB_8:
@@ -428,6 +428,49 @@
   return Res;
 }
 
+/// Promote the overflow flag of an overflowing arithmetic node.
+SDValue DAGTypeLegalizer::PromoteIntRes_Overflow(SDNode *N) {
+  // Simply change the return type of the boolean result.
+  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(1));
+  MVT ValueVTs[] = { N->getValueType(0), NVT };
+  SDValue Ops[] = { N->getOperand(0), N->getOperand(1) };
+  SDValue Res = DAG.getNode(N->getOpcode(), DAG.getVTList(ValueVTs, 2), Ops, 2);
+
+  // Modified the sum result - switch anything that used the old sum to use
+  // the new one.
+  ReplaceValueWith(SDValue(N, 0), Res);
+
+  return SDValue(Res.getNode(), 1);
+}
+
+SDValue DAGTypeLegalizer::PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo) {
+  if (ResNo == 1)
+    return PromoteIntRes_Overflow(N);
+
+  // The operation overflowed iff the result in the larger type is not the
+  // sign extension of its truncation to the original type.
+  SDValue LHS = SExtPromotedInteger(N->getOperand(0));
+  SDValue RHS = SExtPromotedInteger(N->getOperand(1));
+  MVT OVT = N->getOperand(0).getValueType();
+  MVT NVT = LHS.getValueType();
+
+  // Do the arithmetic in the larger type.
+  unsigned Opcode = N->getOpcode() == ISD::SADDO ? ISD::ADD : ISD::SUB;
+  SDValue Res = DAG.getNode(Opcode, NVT, LHS, RHS);
+
+  // Calculate the overflow flag: sign extend the arithmetic result from
+  // the original type.
+  SDValue Ofl = DAG.getNode(ISD::SIGN_EXTEND_INREG, NVT, Res,
+                            DAG.getValueType(OVT));
+  // Overflowed if and only if this is not equal to Res.
+  Ofl = DAG.getSetCC(N->getValueType(1), Ofl, Res, ISD::SETNE);
+
+  // Use the calculated overflow everywhere.
+  ReplaceValueWith(SDValue(N, 1), Ofl);
+
+  return Res;
+}
+
 SDValue DAGTypeLegalizer::PromoteIntRes_SDIV(SDNode *N) {
   // Sign extend the input.
   SDValue LHS = SExtPromotedInteger(N->getOperand(0));
@@ -515,27 +558,38 @@
   return DAG.getNode(ISD::TRUNCATE, NVT, Res);
 }
 
-SDValue DAGTypeLegalizer::PromoteIntRes_UDIV(SDNode *N) {
-  // Zero extend the input.
+SDValue DAGTypeLegalizer::PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo) {
+  if (ResNo == 1)
+    return PromoteIntRes_Overflow(N);
+
+  // The operation overflowed iff the result in the larger type is not the
+  // zero extension of its truncation to the original type.
   SDValue LHS = ZExtPromotedInteger(N->getOperand(0));
   SDValue RHS = ZExtPromotedInteger(N->getOperand(1));
-  return DAG.getNode(N->getOpcode(), LHS.getValueType(), LHS, RHS);
-}
+  MVT OVT = N->getOperand(0).getValueType();
+  MVT NVT = LHS.getValueType();
 
-SDValue DAGTypeLegalizer::PromoteIntRes_XALUO(SDNode *N, unsigned ResNo) {
-  assert(ResNo == 1 && "Only boolean result promotion currently supported!");
+  // Do the arithmetic in the larger type.
+  unsigned Opcode = N->getOpcode() == ISD::UADDO ? ISD::ADD : ISD::SUB;
+  SDValue Res = DAG.getNode(Opcode, NVT, LHS, RHS);
+
+  // Calculate the overflow flag: zero extend the arithmetic result from
+  // the original type.
+  SDValue Ofl = DAG.getZeroExtendInReg(Res, OVT);
+  // Overflowed if and only if this is not equal to Res.
+  Ofl = DAG.getSetCC(N->getValueType(1), Ofl, Res, ISD::SETNE);
 
-  // Simply change the return type of the boolean result.
-  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(1));
-  MVT ValueVTs[] = { N->getValueType(0), NVT };
-  SDValue Ops[] = { N->getOperand(0), N->getOperand(1) };
-  SDValue Res = DAG.getNode(N->getOpcode(), DAG.getVTList(ValueVTs, 2), Ops, 2);
+  // Use the calculated overflow everywhere.
+  ReplaceValueWith(SDValue(N, 1), Ofl);
 
-  // Modified the sum result - switch anything that used the old sum to use
-  // the new one.
-  ReplaceValueWith(SDValue(N, 0), Res);
+  return Res;
+}
 
-  return SDValue(Res.getNode(), 1);
+SDValue DAGTypeLegalizer::PromoteIntRes_UDIV(SDNode *N) {
+  // Zero extend the input.
+  SDValue LHS = ZExtPromotedInteger(N->getOperand(0));
+  SDValue RHS = ZExtPromotedInteger(N->getOperand(1));
+  return DAG.getNode(N->getOpcode(), LHS.getValueType(), LHS, RHS);
 }
 
 SDValue DAGTypeLegalizer::PromoteIntRes_UNDEF(SDNode *N) {
@@ -580,6 +634,10 @@
   return Res;
 }
 
+SDValue DAGTypeLegalizer::PromoteIntRes_XMULO(SDNode *N, unsigned ResNo) {
+  assert(ResNo == 1 && "Only boolean result promotion currently supported!");
+  return PromoteIntRes_Overflow(N);
+}
 
 //===----------------------------------------------------------------------===//
 //  Integer Operand Promotion

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=60834&r1=60833&r2=60834&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Wed Dec 10 06:30:42 2008
@@ -257,6 +257,8 @@
   SDValue PromoteIntRes_FP_TO_XINT(SDNode *N);
   SDValue PromoteIntRes_INT_EXTEND(SDNode *N);
   SDValue PromoteIntRes_LOAD(LoadSDNode *N);
+  SDValue PromoteIntRes_Overflow(SDNode *N);
+  SDValue PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo);
   SDValue PromoteIntRes_SDIV(SDNode *N);
   SDValue PromoteIntRes_SELECT(SDNode *N);
   SDValue PromoteIntRes_SELECT_CC(SDNode *N);
@@ -267,10 +269,11 @@
   SDValue PromoteIntRes_SRA(SDNode *N);
   SDValue PromoteIntRes_SRL(SDNode *N);
   SDValue PromoteIntRes_TRUNCATE(SDNode *N);
+  SDValue PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo);
   SDValue PromoteIntRes_UDIV(SDNode *N);
   SDValue PromoteIntRes_UNDEF(SDNode *N);
   SDValue PromoteIntRes_VAARG(SDNode *N);
-  SDValue PromoteIntRes_XALUO(SDNode *N, unsigned ResNo);
+  SDValue PromoteIntRes_XMULO(SDNode *N, unsigned ResNo);
 
   // Integer Operand Promotion.
   bool PromoteIntegerOperand(SDNode *N, unsigned OperandNo);

Added: llvm/trunk/test/CodeGen/Generic/add-with-overflow-24.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/add-with-overflow-24.ll?rev=60834&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/Generic/add-with-overflow-24.ll (added)
+++ llvm/trunk/test/CodeGen/Generic/add-with-overflow-24.ll Wed Dec 10 06:30:42 2008
@@ -0,0 +1,42 @@
+; RUN: llvm-as < %s | llc
+
+ at ok = internal constant [4 x i8] c"%d\0A\00"
+ at no = internal constant [4 x i8] c"no\0A\00"
+
+define i1 @func1(i24 signext %v1, i24 signext %v2) nounwind {
+entry:
+  %t = call {i24, i1} @llvm.sadd.with.overflow.i24(i24 %v1, i24 %v2)
+  %sum = extractvalue {i24, i1} %t, 0
+  %sum32 = sext i24 %sum to i32
+  %obit = extractvalue {i24, i1} %t, 1
+  br i1 %obit, label %overflow, label %normal
+
+normal:
+  %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum32 ) nounwind
+  ret i1 true
+
+overflow:
+  %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
+  ret i1 false
+}
+
+define i1 @func2(i24 zeroext %v1, i24 zeroext %v2) nounwind {
+entry:
+  %t = call {i24, i1} @llvm.uadd.with.overflow.i24(i24 %v1, i24 %v2)
+  %sum = extractvalue {i24, i1} %t, 0
+  %sum32 = zext i24 %sum to i32
+  %obit = extractvalue {i24, i1} %t, 1
+  br i1 %obit, label %carry, label %normal
+
+normal:
+  %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum32 ) nounwind
+  ret i1 true
+
+carry:
+  %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
+  ret i1 false
+}
+
+declare i32 @printf(i8*, ...) nounwind
+declare {i24, i1} @llvm.sadd.with.overflow.i24(i24, i24)
+declare {i24, i1} @llvm.uadd.with.overflow.i24(i24, i24)




From baldrick at free.fr  Wed Dec 10 08:25:18 2008
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 10 Dec 2008 14:25:18 -0000
Subject: [llvm-commits] [llvm] r60838 -
	/llvm/trunk/docs/GCCFEBuildInstrs.html
Message-ID: <200812101425.mBAEPLWG003060@zion.cs.uiuc.edu>

Author: baldrick
Date: Wed Dec 10 08:24:58 2008
New Revision: 60838

URL: http://llvm.org/viewvc/llvm-project?rev=60838&view=rev
Log:
Update these instructions to the 2.4 release.

Modified:
    llvm/trunk/docs/GCCFEBuildInstrs.html

Modified: llvm/trunk/docs/GCCFEBuildInstrs.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GCCFEBuildInstrs.html?rev=60838&r1=60837&r2=60838&view=diff

==============================================================================
--- llvm/trunk/docs/GCCFEBuildInstrs.html (original)
+++ llvm/trunk/docs/GCCFEBuildInstrs.html Wed Dec 10 08:24:58 2008
@@ -84,7 +84,7 @@
   The build requires having a compiler that supports Ada, C and C++.
       The Ada front-end is written in Ada so an Ada compiler is needed to
       build it.  Compilers known to work with the
-      LLVM 2.3 release
+      LLVM 2.4 release
       are gcc-4.2 and the
       2005, 2006 and 2007 versions of the
       GNAT GPL Edition.
@@ -110,9 +110,9 @@
       and unpack it:
 
 
-wget http://llvm.org/releases/2.3/llvm-2.3.tar.gz
-tar xzf llvm-2.3.tar.gz
-mv llvm-2.3 llvm
+wget http://llvm.org/releases/2.4/llvm-2.4.tar.gz
+tar xzf llvm-2.4.tar.gz
+mv llvm-2.4 llvm
 
 
       or check out the
@@ -128,9 +128,9 @@
       and unpack it:

 
 
-wget http://llvm.org/releases/2.3/llvm-gcc-4.2-2.3.source.tar.gz
-tar xzf llvm-gcc-4.2-2.3.source.tar.gz
-mv llvm-gcc4.2-2.3.source llvm-gcc-4.2
+wget http://llvm.org/releases/2.4/llvm-gcc-4.2-2.4.source.tar.gz
+tar xzf llvm-gcc-4.2-2.4.source.tar.gz
+mv llvm-gcc4.2-2.4.source llvm-gcc-4.2
 
 
       or check out the




From nunoplopes at sapo.pt  Wed Dec 10 10:02:33 2008
From: nunoplopes at sapo.pt (Nuno Lopes)
Date: Wed, 10 Dec 2008 16:02:33 -0000
Subject: [llvm-commits] [llvm] r60840 - /llvm/trunk/docs/GettingStarted.html
Message-ID: <200812101602.mBAG2pjv005847@zion.cs.uiuc.edu>

Author: nlopes
Date: Wed Dec 10 10:01:22 2008
New Revision: 60840

URL: http://llvm.org/viewvc/llvm-project?rev=60840&view=rev
Log:
add gcc 4.1.2 from redhat to the list of broken compilers

Modified:
    llvm/trunk/docs/GettingStarted.html

Modified: llvm/trunk/docs/GettingStarted.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GettingStarted.html?rev=60840&r1=60839&r2=60840&view=diff

==============================================================================
--- llvm/trunk/docs/GettingStarted.html (original)
+++ llvm/trunk/docs/GettingStarted.html Wed Dec 10 10:01:22 2008
@@ -558,6 +558,8 @@
 
GCC 4.1.2 (20061115 (prerelease) (Debian 4.1.1-21)) on Debian: Appears
 to miscompile parts of LLVM 2.4. One symptom is ValueSymbolTable complaining
 about symbols remaining in the table on destruction.

+GCC 4.1.2 20071124 (Red Hat 4.1.2-42): Suffers from the same symptons
+as the previous one. It appears to work with ENABLE_OPTIMIZED=0 (the default).
 
 GNU ld 2.16.X. Some 2.16.X versions of the ld linker will produce very
 long warning messages complaining that some ".gnu.linkonce.t.*" symbol was




From nunoplopes at sapo.pt  Wed Dec 10 10:12:02 2008
From: nunoplopes at sapo.pt (Nuno Lopes)
Date: Wed, 10 Dec 2008 16:12:02 -0000
Subject: [llvm-commits] [llvm] r60841 - /llvm/trunk/docs/GettingStarted.html
Message-ID: <200812101612.mBAGCG7x006152@zion.cs.uiuc.edu>

Author: nlopes
Date: Wed Dec 10 10:11:10 2008
New Revision: 60841

URL: http://llvm.org/viewvc/llvm-project?rev=60841&view=rev
Log:
fix typo. thanks Baldrick for noticing

Modified:
    llvm/trunk/docs/GettingStarted.html

Modified: llvm/trunk/docs/GettingStarted.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GettingStarted.html?rev=60841&r1=60840&r2=60841&view=diff

==============================================================================
--- llvm/trunk/docs/GettingStarted.html (original)
+++ llvm/trunk/docs/GettingStarted.html Wed Dec 10 10:11:10 2008
@@ -558,7 +558,7 @@
 
GCC 4.1.2 (20061115 (prerelease) (Debian 4.1.1-21)) on Debian: Appears
 to miscompile parts of LLVM 2.4. One symptom is ValueSymbolTable complaining
 about symbols remaining in the table on destruction.
-GCC 4.1.2 20071124 (Red Hat 4.1.2-42): Suffers from the same symptons
+
GCC 4.1.2 20071124 (Red Hat 4.1.2-42): Suffers from the same symptoms
 as the previous one. It appears to work with ENABLE_OPTIMIZED=0 (the default).
 
 GNU ld 2.16.X. Some 2.16.X versions of the ld linker will produce very




From echeng at apple.com  Wed Dec 10 11:16:47 2008
From: echeng at apple.com (Evan Cheng)
Date: Wed, 10 Dec 2008 09:16:47 -0800
Subject: [llvm-commits] [llvm] r60807 - in /llvm/trunk:
	lib/Target/X86/X86FastISel.cpp test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: <200812092319.mB9NJDWN031452@zion.cs.uiuc.edu>
References: <200812092319.mB9NJDWN031452@zion.cs.uiuc.edu>
Message-ID: <2EDB43CA-522D-4A4B-9F1E-4FA0B8F2831F@apple.com>


On Dec 9, 2008, at 3:19 PM, Bill Wendling wrote:

> Author: void
> Date: Tue Dec  9 17:19:12 2008
> New Revision: 60807
>
> URL: http://llvm.org/viewvc/llvm-project?rev=60807&view=rev
> Log:
> Implement fast-isel conversion of a branch instruction that's  
> branching on an
> overflow/carry from the "arithmetic with overflow" intrinsics. It  
> searches the
> machine basic block from bottom to top to find the SETO/SETC  
> instruction that is
> its conditional. If an instruction modifies EFLAGS before it reaches  
> the
> SETO/SETC instruction, then it defaults to the normal instruction  
> emission.
>
> Modified:
>    llvm/trunk/lib/Target/X86/X86FastISel.cpp
>    llvm/trunk/test/CodeGen/X86/add-with-overflow.ll
>
> Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=60807&r1=60806&r2=60807&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Tue Dec  9 17:19:12 2008
> @@ -748,6 +748,69 @@
>       MBB->addSuccessor(TrueMBB);
>       return true;
>     }
> +  } else if (ExtractValueInst *EI =
> +             dyn_cast(BI->getCondition())) {
> +    // Check to see if the branch instruction is from an  
> "arithmetic with
> +    // overflow" intrinsic. The main way these intrinsics are used  
> is:
> +    //
> +    //   %t = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32  
> %v1, i32 %v2)
> +    //   %sum = extractvalue { i32, i1 } %t, 0
> +    //   %obit = extractvalue { i32, i1 } %t, 1
> +    //   br i1 %obit, label %overflow, label %normal
> +    //
> +    // The %sum and %obit are converted in an ADD and a SETO/SETC  
> before
> +    // reaching the branch. Therefore, we search backwards through  
> the MBB
> +    // looking for the SETO/SETC instruction. If an instruction  
> modifies the
> +    // EFLAGS register before we reach the SETO/SETC instruction,  
> then we can't
> +    // convert the branch into a JO/JC instruction.
> +    const MachineInstr *SetMI = 0;
> +    unsigned Reg = lookUpRegForValue(EI);
> +
> +    for (MachineBasicBlock::const_reverse_iterator
> +           RI = MBB->rbegin(), RE = MBB->rend(); RI != RE; ++RI) {
> +      const MachineInstr &MI = *RI;

Hi Bill,

I don't think it makes sense to traverse machine instructions here. We  
want fastisel to be fast and this has the potential to be slow. This  
code is only correct when we are doing top down fastisel, right? If  
that's the case why not just check the end of MBB instruction is a  
SETO / SETC? If there are other instructions in between, then we'll do  
dag isel instead. This allows the code to handle the most common cases.

Also, it should first check if the source of extractvalue comes from  
arithmetic with overflow intrinsics. If not, then the code should not  
be looking for SETO / SETC at all.

Thanks,

Evan
>
> +
> +      if (MI.modifiesRegister(Reg)) {
> +        unsigned Src, Dst;
> +
> +        if (getInstrInfo()->isMoveInstr(MI, Src, Dst)) {
> +          Reg = Src;
> +          continue;
> +        }
> +
> +        SetMI = &MI;
> +        break;
> +      }
> +
> +      const TargetInstrDesc &TID = MI.getDesc();
> +      const unsigned *ImpDefs = TID.getImplicitDefs();
> +
> +      if (TID.hasUnmodeledSideEffects()) break;
> +
> +      bool ModifiesEFlags = false;
> +
> +      if (ImpDefs) {
> +        for (unsigned u = 0; ImpDefs[u]; ++u)
> +          if (ImpDefs[u] == X86::EFLAGS) {
> +            ModifiesEFlags = true;
> +            break;
> +          }
> +      }
> +
> +      if (ModifiesEFlags) break;
> +    }
> +
> +    if (SetMI) {
> +      unsigned OpCode = SetMI->getOpcode();
> +
> +      if (OpCode == X86::SETOr || OpCode == X86::SETCr) {
> +        BuildMI(MBB, TII.get((OpCode == X86::SETOr) ?
> +                             X86::JO : X86::JC)).addMBB(TrueMBB);
> +        FastEmitBranch(FalseMBB);
> +        MBB->addSuccessor(TrueMBB);
> +        return true;
> +      }
> +    }
>   }
>
>   // Otherwise do a clumsy setcc and re-test it.
>
> Modified: llvm/trunk/test/CodeGen/X86/add-with-overflow.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/add-with-overflow.ll?rev=60807&r1=60806&r2=60807&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/test/CodeGen/X86/add-with-overflow.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/add-with-overflow.ll Tue Dec  9  
> 17:19:12 2008
> @@ -1,5 +1,7 @@
> ; RUN: llvm-as < %s | llc -march=x86 | grep {jo} | count 1
> ; RUN: llvm-as < %s | llc -march=x86 | grep {jc} | count 1
> +; RUN: llvm-as < %s | llc -march=x86 -fast | grep {jo} | count 1
> +; RUN: llvm-as < %s | llc -march=x86 -fast | grep {jc} | count 1
>
> @ok = internal constant [4 x i8] c"%d\0A\00"
> @no = internal constant [4 x i8] c"no\0A\00"
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From clattner at apple.com  Wed Dec 10 11:44:47 2008
From: clattner at apple.com (Chris Lattner)
Date: Wed, 10 Dec 2008 09:44:47 -0800
Subject: [llvm-commits] [llvm] r60832 -
	/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
In-Reply-To: <200812100938.mBA9cm9a026784@zion.cs.uiuc.edu>
References: <200812100938.mBA9cm9a026784@zion.cs.uiuc.edu>
Message-ID: 


On Dec 10, 2008, at 1:38 AM, Duncan Sands wrote:

> Author: baldrick
> Date: Wed Dec 10 03:38:36 2008
> New Revision: 60832
>
> URL: http://llvm.org/viewvc/llvm-project?rev=60832&view=rev
> Log:
> Don't dereference the end() iterator.  This was
> causing a bunch of failures when running
> "make ENABLE_EXPENSIVE_CHECKS=1 check".

Thanks Duncan!

-Chris



From edwintorok at gmail.com  Wed Dec 10 13:02:03 2008
From: edwintorok at gmail.com (=?ISO-8859-1?Q?T=F6r=F6k_Edwin?=)
Date: Wed, 10 Dec 2008 21:02:03 +0200
Subject: [llvm-commits] [PATCH] Debug info utilities and printer pass
Message-ID: <4940122B.5040005@gmail.com>

Hi,

[@John Criswell: this is a much improved version of SourceLocator I sent
you ages ago ;)]

01-bb.patch:
BasicBlock::getUniquePredecessor -> similar to getSinglePredecessor()
but works if there is a unique predecessor listed multiple times

02-intrin.patch:
Introduce DbgFuncStart::getDisplayName() (which refers to unmangled C++
name!), and DbgDeclareInst::getVariableName()
Introduce include/llvm/Support/DebugInfo.h:
 findStopPoint: Instruction* -> associated StopPoint*
 findBBStopPoint: BasicBlock* -> associated StopPoint*
 findDbgDeclare: Value* -> associated DbgDeclareInst*
This header may not be the best place, but if I place these in
Support/.cpp I get circular dependencies with VMCore

03-pass.patch:
-print-dbg-info: An example pass that shows how to use the functions in
02-intrin.patch, and how to handle debug info in general for the purpose
of mapping LLVM IR back to original source code.
This pass can be very useful when developing other passes, because you
can see which line a certain LLVM instruction corresponds to,
and can see the unmangled name of functions.

Do you see any problems with these patches, or can I go ahead and commit
them?

Best regards,
--Edwin
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From isanbard at gmail.com  Wed Dec 10 13:10:35 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 10 Dec 2008 11:10:35 -0800
Subject: [llvm-commits] [llvm] r60807 - in /llvm/trunk:
	lib/Target/X86/X86FastISel.cpp test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: <2EDB43CA-522D-4A4B-9F1E-4FA0B8F2831F@apple.com>
References: <200812092319.mB9NJDWN031452@zion.cs.uiuc.edu>
	<2EDB43CA-522D-4A4B-9F1E-4FA0B8F2831F@apple.com>
Message-ID: <16e5fdf90812101110t1b329ca5u7f6c22076571a164@mail.gmail.com>

On Wed, Dec 10, 2008 at 9:16 AM, Evan Cheng  wrote:
>
>> +    const MachineInstr *SetMI = 0;
>> +    unsigned Reg = lookUpRegForValue(EI);
>> +
>> +    for (MachineBasicBlock::const_reverse_iterator
>> +           RI = MBB->rbegin(), RE = MBB->rend(); RI != RE; ++RI) {
>> +      const MachineInstr &MI = *RI;
>
> Hi Bill,
>
> I don't think it makes sense to traverse machine instructions here. We
> want fastisel to be fast and this has the potential to be slow. This
> code is only correct when we are doing top down fastisel, right? If
> that's the case why not just check the end of MBB instruction is a
> SETO / SETC? If there are other instructions in between, then we'll do
> dag isel instead. This allows the code to handle the most common cases.
>
The last instruction at this point isn't a SETO/SETC instruction, but
a (useless) move of the register that SETO/SETC defines into another
register. That's why I check whether it's a move instruction. The code
looks something like this:

        %reg1024 = MOV32rm , 1, %reg0, 0, Mem:LD(4,4)
[FixedStack-1 + 0]
        %reg1025 = MOV32rm , 1, %reg0, 0, Mem:LD(4,4)
[FixedStack-2 + 0]
        %reg1028 = ADD32rr %reg1024, %reg1025, %EFLAGS
        %reg1029 = SETOr %EFLAGS
        %reg1026 = MOV32rr %reg1028
        %reg1027 = MOV8rr %reg1029

with the conditional for the BRCOND being %reg1027. If I only look at
the last instruction, then this will never trigger. I *could* look at
the last three instructions, but that's pretty restrictive . . . but
fast.

Comments?

> Also, it should first check if the source of extractvalue comes from
> arithmetic with overflow intrinsics. If not, then the code should not
> be looking for SETO / SETC at all.
>
Okay.

-bw


From isanbard at gmail.com  Wed Dec 10 13:44:25 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 10 Dec 2008 19:44:25 -0000
Subject: [llvm-commits] [llvm] r60844 -
	/llvm/trunk/lib/Target/X86/X86FastISel.cpp
Message-ID: <200812101944.mBAJiQKJ012736@zion.cs.uiuc.edu>

Author: void
Date: Wed Dec 10 13:44:24 2008
New Revision: 60844

URL: http://llvm.org/viewvc/llvm-project?rev=60844&view=rev
Log:
Only perform SETO/SETC to JO/JC conversion if extractvalue is coming from an arithmetic with overflow instruction.

Modified:
    llvm/trunk/lib/Target/X86/X86FastISel.cpp

Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=60844&r1=60843&r2=60844&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Wed Dec 10 13:44:24 2008
@@ -763,52 +763,67 @@
     // looking for the SETO/SETC instruction. If an instruction modifies the
     // EFLAGS register before we reach the SETO/SETC instruction, then we can't
     // convert the branch into a JO/JC instruction.
-    const MachineInstr *SetMI = 0;
-    unsigned Reg = lookUpRegForValue(EI);
 
-    for (MachineBasicBlock::const_reverse_iterator
-           RI = MBB->rbegin(), RE = MBB->rend(); RI != RE; ++RI) {
-      const MachineInstr &MI = *RI;
-
-      if (MI.modifiesRegister(Reg)) {
-        unsigned Src, Dst;
-
-        if (getInstrInfo()->isMoveInstr(MI, Src, Dst)) {
-          Reg = Src;
-          continue;
-        }
-
-        SetMI = &MI;
-        break;
-      }
+    Value *Agg = EI->getAggregateOperand();
 
-      const TargetInstrDesc &TID = MI.getDesc();
-      const unsigned *ImpDefs = TID.getImplicitDefs();
+    if (CallInst *CI = dyn_cast(Agg)) {
+      Function *F = CI->getCalledFunction();
 
-      if (TID.hasUnmodeledSideEffects()) break;
+      if (F && F->isDeclaration()) {
+        switch (F->getIntrinsicID()) {
+        default: break;
+        case Intrinsic::sadd_with_overflow:
+        case Intrinsic::uadd_with_overflow: {
+          const MachineInstr *SetMI = 0;
+          unsigned Reg = lookUpRegForValue(EI);
+
+          for (MachineBasicBlock::const_reverse_iterator
+                 RI = MBB->rbegin(), RE = MBB->rend(); RI != RE; ++RI) {
+            const MachineInstr &MI = *RI;
+
+            if (MI.modifiesRegister(Reg)) {
+              unsigned Src, Dst;
+
+              if (getInstrInfo()->isMoveInstr(MI, Src, Dst)) {
+                Reg = Src;
+                continue;
+              }
+
+              SetMI = &MI;
+              break;
+            }
+
+            const TargetInstrDesc &TID = MI.getDesc();
+            const unsigned *ImpDefs = TID.getImplicitDefs();
+
+            if (TID.hasUnmodeledSideEffects()) break;
+
+            bool ModifiesEFlags = false;
+
+            if (ImpDefs) {
+              for (unsigned u = 0; ImpDefs[u]; ++u)
+                if (ImpDefs[u] == X86::EFLAGS) {
+                  ModifiesEFlags = true;
+                  break;
+                }
+            }
 
-      bool ModifiesEFlags = false;
-
-      if (ImpDefs) {
-        for (unsigned u = 0; ImpDefs[u]; ++u)
-          if (ImpDefs[u] == X86::EFLAGS) {
-            ModifiesEFlags = true;
-            break;
+            if (ModifiesEFlags) break;
           }
-      }
 
-      if (ModifiesEFlags) break;
-    }
+          if (SetMI) {
+            unsigned OpCode = SetMI->getOpcode();
 
-    if (SetMI) {
-      unsigned OpCode = SetMI->getOpcode();
-
-      if (OpCode == X86::SETOr || OpCode == X86::SETCr) {
-        BuildMI(MBB, TII.get((OpCode == X86::SETOr) ? 
-                             X86::JO : X86::JC)).addMBB(TrueMBB);
-        FastEmitBranch(FalseMBB);
-        MBB->addSuccessor(TrueMBB);
-        return true;
+            if (OpCode == X86::SETOr || OpCode == X86::SETCr) {
+              BuildMI(MBB, TII.get((OpCode == X86::SETOr) ? 
+                                   X86::JO : X86::JC)).addMBB(TrueMBB);
+              FastEmitBranch(FalseMBB);
+              MBB->addSuccessor(TrueMBB);
+              return true;
+            }
+          }
+        }
+        }
       }
     }
   }




From kremenek at apple.com  Wed Dec 10 14:44:42 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Wed, 10 Dec 2008 20:44:42 -0000
Subject: [llvm-commits] [llvm] r60846 - /llvm/tags/checker/checker-132/
Message-ID: <200812102044.mBAKihq0014714@zion.cs.uiuc.edu>

Author: kremenek
Date: Wed Dec 10 14:44:32 2008
New Revision: 60846

URL: http://llvm.org/viewvc/llvm-project?rev=60846&view=rev
Log:
Tagging checker-132.

Added:
    llvm/tags/checker/checker-132/
      - copied from r60845, llvm/trunk/



From dpatel at apple.com  Wed Dec 10 15:13:44 2008
From: dpatel at apple.com (Devang Patel)
Date: Wed, 10 Dec 2008 13:13:44 -0800
Subject: [llvm-commits] [PATCH] Debug info utilities and printer pass
In-Reply-To: <4940122B.5040005@gmail.com>
References: <4940122B.5040005@gmail.com>
Message-ID: 

Hi Torok,

On Dec 10, 2008, at 11:02 AM, T?r?k Edwin wrote:

> Hi,
>
> [@John Criswell: this is a much improved version of SourceLocator I  
> sent
> you ages ago ;)]
>
> 01-bb.patch:
> BasicBlock::getUniquePredecessor -> similar to getSinglePredecessor()
> but works if there is a unique predecessor listed multiple times

This is OK.

> 02-intrin.patch:
> Introduce DbgFuncStart::getDisplayName() (which refers to unmangled C 
> ++
> name!), and DbgDeclareInst::getVariableName()
> Introduce include/llvm/Support/DebugInfo.h:

We already have include/llvm/Analysis/DebugInfo.h, so I suggest that  
you use another name for this new header.


+namespace llvm {
+  class DbgStopPointInst;
+  /// Finds the stoppoint coressponding to this instruction, that is  
the
+  /// stoppoint that dominates this instruction
+  static const DbgStopPointInst *findStopPoint(const Instruction *Inst)
+  {
+    if (isa(Inst))
+      return cast(Inst);

pl. use dyn_cast instead of isa + cast.

+
+    const BasicBlock *BB = Inst->getParent();
+    BasicBlock::const_iterator I = Inst, B;
+    do {
+      B = BB->begin();
+      // a BB consisting only of a terminator, can't have a stoppoint
+      if (I != B) {
+        do {
+          --I;
+          if (isa(*I))
+            return cast(&*I);
+        } while (I != B);
+      }
+      // this BB didn't have a stoppoint, if there is only one
+      // predecessor, look for a stoppoint there
+      // we could use getIDom(), but that would require dominator info
+      BB = I->getParent()->getUniquePredecessor();
+      if (BB)
+        I = BB->getTerminator();
+    } while (BB != 0);
+    return 0;
+  }
+
+  /// Finds the stoppoint corresponding to first real (non-debug  
intrinsic)
+  /// instruction in this Basic Block, and returns the stoppoint for  
it.
+  static const DbgStopPointInst *findBBStopPoint(const BasicBlock *BB)
+  {
+    for(BasicBlock::const_iterator I = BB->begin(), E = BB->end(); I ! 
= E; ++I) {
+      if (isa(*I))
+        return cast(&*I);
+    }
+    // fallback to looking for stoppoint of terminator inst
+    // useful if this BB contains no stoppoints, but unique  
predecessor does
+    return findStopPoint(BB->getTerminator());

This will iterate BB again again.


>
> findStopPoint: Instruction* -> associated StopPoint*
> findBBStopPoint: BasicBlock* -> associated StopPoint*
> findDbgDeclare: Value* -> associated DbgDeclareInst*
> This header may not be the best place, but if I place these in
> Support/.cpp I get circular dependencies with VMCore
>
> 03-pass.patch:
> -print-dbg-info: An example pass that shows how to use the functions  
> in
> 02-intrin.patch, and how to handle debug info in general for the  
> purpose
> of mapping LLVM IR back to original source code.
> This pass can be very useful when developing other passes, because you
> can see which line a certain LLVM instruction corresponds to,
> and can see the unmangled name of functions.
>
> Do you see any problems with these patches, or can I go ahead and  
> commit
> them?
>
> Best regards,
> --Edwin
> <01-bb.patch><02-intrin.patch><03- 
> pass.patch>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

-
Devang






From evan.cheng at apple.com  Wed Dec 10 15:49:15 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 10 Dec 2008 21:49:15 -0000
Subject: [llvm-commits] [llvm] r60850 -
	/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
Message-ID: <200812102149.mBALnIqX016906@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Dec 10 15:49:05 2008
New Revision: 60850

URL: http://llvm.org/viewvc/llvm-project?rev=60850&view=rev
Log:
Some code clean up.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=60850&r1=60849&r2=60850&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Dec 10 15:49:05 2008
@@ -1532,22 +1532,24 @@
       SDValue Chain = Node->getOperand(0);
       SDValue N1 = Node->getOperand(1);
       SDValue N2 = Node->getOperand(2);
-      if (!isa(N1))
+      FrameIndexSDNode *FINode = dyn_cast(N1);
+      if (!FINode)
         break;
-      int FI = cast(N1)->getIndex();
       if (N2.getOpcode() == ISD::ADD &&
           N2.getOperand(0).getOpcode() == X86ISD::GlobalBaseReg)
         N2 = N2.getOperand(1);
-      if (N2.getOpcode() == X86ISD::Wrapper &&
-          isa(N2.getOperand(0))) {
-        GlobalValue *GV =
-          cast(N2.getOperand(0))->getGlobal();
-        SDValue Tmp1 = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy());
-        SDValue Tmp2 = CurDAG->getTargetGlobalAddress(GV, TLI.getPointerTy());
-        SDValue Ops[] = { Tmp1, Tmp2, Chain };
-        return CurDAG->getTargetNode(TargetInstrInfo::DECLARE,
-                                     MVT::Other, Ops, 3);
-      }
+      if (N2.getOpcode() != X86ISD::Wrapper)
+        break;
+      GlobalAddressSDNode *GVNode = dyn_cast(N2.getOperand(0));
+      if (!GVNode)
+        break;
+      SDValue Tmp1 = CurDAG->getTargetFrameIndex(FINode->getIndex(),
+                                                 TLI.getPointerTy());
+      SDValue Tmp2 = CurDAG->getTargetGlobalAddress(GVNode->getGlobal(),
+                                                    TLI.getPointerTy());
+      SDValue Ops[] = { Tmp1, Tmp2, Chain };
+      return CurDAG->getTargetNode(TargetInstrInfo::DECLARE,
+                                   MVT::Other, Ops, 3);
       break;
     }
   }




From echeng at apple.com  Wed Dec 10 15:51:22 2008
From: echeng at apple.com (Evan Cheng)
Date: Wed, 10 Dec 2008 13:51:22 -0800
Subject: [llvm-commits] [llvm] r60807 - in /llvm/trunk:
	lib/Target/X86/X86FastISel.cpp test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: <16e5fdf90812101110t1b329ca5u7f6c22076571a164@mail.gmail.com>
References: <200812092319.mB9NJDWN031452@zion.cs.uiuc.edu>
	<2EDB43CA-522D-4A4B-9F1E-4FA0B8F2831F@apple.com>
	<16e5fdf90812101110t1b329ca5u7f6c22076571a164@mail.gmail.com>
Message-ID: 


On Dec 10, 2008, at 11:10 AM, Bill Wendling wrote:

> On Wed, Dec 10, 2008 at 9:16 AM, Evan Cheng  wrote:
>>
>>> +    const MachineInstr *SetMI = 0;
>>> +    unsigned Reg = lookUpRegForValue(EI);
>>> +
>>> +    for (MachineBasicBlock::const_reverse_iterator
>>> +           RI = MBB->rbegin(), RE = MBB->rend(); RI != RE; ++RI) {
>>> +      const MachineInstr &MI = *RI;
>>
>> Hi Bill,
>>
>> I don't think it makes sense to traverse machine instructions here.  
>> We
>> want fastisel to be fast and this has the potential to be slow. This
>> code is only correct when we are doing top down fastisel, right? If
>> that's the case why not just check the end of MBB instruction is a
>> SETO / SETC? If there are other instructions in between, then we'll  
>> do
>> dag isel instead. This allows the code to handle the most common  
>> cases.
>>
> The last instruction at this point isn't a SETO/SETC instruction, but
> a (useless) move of the register that SETO/SETC defines into another
> register. That's why I check whether it's a move instruction. The code
> looks something like this:
>
>        %reg1024 = MOV32rm , 1, %reg0, 0, Mem:LD(4,4)
> [FixedStack-1 + 0]
>        %reg1025 = MOV32rm , 1, %reg0, 0, Mem:LD(4,4)
> [FixedStack-2 + 0]
>        %reg1028 = ADD32rr %reg1024, %reg1025, %EFLAGS
>        %reg1029 = SETOr %EFLAGS
>        %reg1026 = MOV32rr %reg1028
>        %reg1027 = MOV8rr %reg1029
>
> with the conditional for the BRCOND being %reg1027. If I only look at
> the last instruction, then this will never trigger. I *could* look at
> the last three instructions, but that's pretty restrictive . . . but
> fast.

Where are the moves coming from?

Evan

>
>
> Comments?
>
>> Also, it should first check if the source of extractvalue comes from
>> arithmetic with overflow intrinsics. If not, then the code should not
>> be looking for SETO / SETC at all.
>>
> Okay.
>
> -bw
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From evan.cheng at apple.com  Wed Dec 10 15:54:34 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 10 Dec 2008 21:54:34 -0000
Subject: [llvm-commits] [llvm] r60851 - in /llvm/trunk/lib/Target/ARM:
 ARMISelDAGToDAG.cpp ARMInstrInfo.cpp ARMRegisterInfo.cpp
 AsmPrinter/ARMAsmPrinter.cpp
Message-ID: <200812102154.mBALscAg017070@zion.cs.uiuc.edu>

Author: evancheng
Date: Wed Dec 10 15:54:21 2008
New Revision: 60851

URL: http://llvm.org/viewvc/llvm-project?rev=60851&view=rev
Log:
Preliminary ARM debug support based on patch by Mikael of FlexyCore.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp
    llvm/trunk/lib/Target/ARM/ARMRegisterInfo.cpp
    llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=60851&r1=60850&r2=60851&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Wed Dec 10 15:54:21 2008
@@ -12,9 +12,10 @@
 //===----------------------------------------------------------------------===//
 
 #include "ARM.h"
+#include "ARMAddressingModes.h"
+#include "ARMConstantPoolValue.h"
 #include "ARMISelLowering.h"
 #include "ARMTargetMachine.h"
-#include "ARMAddressingModes.h"
 #include "llvm/CallingConv.h"
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
@@ -821,11 +822,46 @@
       break;
     case MVT::f64:
       Opc = ARM::FNEGDcc;
-      break; 
+      break;
     }
     return CurDAG->SelectNodeTo(Op.getNode(), Opc, VT, Ops, 5);
   }
+
+  case ISD::DECLARE: {
+    SDValue Chain = Op.getOperand(0);
+    SDValue N1 = Op.getOperand(1);
+    SDValue N2 = Op.getOperand(2);
+    FrameIndexSDNode *FINode = dyn_cast(N1);
+    if (!FINode)
+      break;
+    if (N2.getOpcode() == ARMISD::PIC_ADD && isa(N2.getOperand(0)))
+      N2 = N2.getOperand(0);
+    LoadSDNode *Ld = dyn_cast(N2);
+    if (!Ld)
+      break;
+    SDValue BasePtr = Ld->getBasePtr();
+    assert(BasePtr.getOpcode() == ARMISD::Wrapper &&
+           isa(BasePtr.getOperand(0)) &&
+           "llvm.dbg.variable should be a constantpool node");
+    ConstantPoolSDNode *CP = cast(BasePtr.getOperand(0));
+    GlobalValue *GV = 0;
+    if (CP->isMachineConstantPoolEntry()) {
+      ARMConstantPoolValue *ACPV = (ARMConstantPoolValue*)CP->getMachineCPVal();
+      GV = ACPV->getGV();
+    } else
+      GV = dyn_cast(CP->getConstVal());
+    if (GV) {
+      SDValue Tmp1 = CurDAG->getTargetFrameIndex(FINode->getIndex(),
+                                                 TLI.getPointerTy());
+      SDValue Tmp2 = CurDAG->getTargetGlobalAddress(GV, TLI.getPointerTy());
+      SDValue Ops[] = { Tmp1, Tmp2, Chain };
+      return CurDAG->getTargetNode(TargetInstrInfo::DECLARE,
+                                   MVT::Other, Ops, 3);
+    }
+    break;
+  }
   }
+
   return SelectCode(Op);
 }
 

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp?rev=60851&r1=60850&r2=60851&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Wed Dec 10 15:54:21 2008
@@ -900,16 +900,24 @@
   unsigned TSFlags = TID.TSFlags;
   
   switch ((TSFlags & ARMII::SizeMask) >> ARMII::SizeShift) {
-  default:
+  default: {
     // If this machine instr is an inline asm, measure it.
     if (MI->getOpcode() == ARM::INLINEASM)
       return TAI->getInlineAsmLength(MI->getOperand(0).getSymbolName());
     if (MI->isLabel())
       return 0;
-    if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF)
+    switch (MI->getOpcode()) {
+    default:
+      assert(0 && "Unknown or unset size field for instr!");
+      break;
+    case TargetInstrInfo::IMPLICIT_DEF:
+    case TargetInstrInfo::DECLARE:
+    case TargetInstrInfo::DBG_LABEL:
+    case TargetInstrInfo::EH_LABEL:
       return 0;
-    assert(0 && "Unknown or unset size field for instr!");
+    }
     break;
+  }
   case ARMII::Size8Bytes: return 8;          // Arm instruction x 2.
   case ARMII::Size4Bytes: return 4;          // Arm instruction.
   case ARMII::Size2Bytes: return 2;          // Thumb instruction.

Modified: llvm/trunk/lib/Target/ARM/ARMRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRegisterInfo.cpp?rev=60851&r1=60850&r2=60851&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMRegisterInfo.cpp Wed Dec 10 15:54:21 2008
@@ -1455,8 +1455,7 @@
 }
 
 int ARMRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
-  assert(0 && "What is the dwarf register number");
-  return -1;
+	return ARMGenRegisterInfo::getDwarfRegNumFull(RegNum, 0);
 }
 
 #include "ARMGenRegisterInfo.inc"

Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=60851&r1=60850&r2=60851&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Wed Dec 10 15:54:21 2008
@@ -231,8 +231,7 @@
 
   O << CurrentFnName << ":\n";
   // Emit pre-function debug information.
-  // FIXME: Dwarf support.
-  //DW.BeginFunction(&MF);
+  DW.BeginFunction(&MF);
 
   if (Subtarget->isTargetDarwin()) {
     // If the function is empty, then we need to emit *something*. Otherwise,
@@ -263,8 +262,7 @@
     O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
 
   // Emit post-function debug information.
-  // FIXME: Dwarf support.
-  //DW.EndFunction();
+  DW.EndFunction(&MF);
 
   O.flush();
 
@@ -779,16 +777,14 @@
 
 bool ARMAsmPrinter::doInitialization(Module &M) {
   // Emit initial debug information.
-  // FIXME: Dwarf support.
-  //DW.BeginModule(&M);
-  
+  DW.BeginModule(&M);
+
   bool Result = AsmPrinter::doInitialization(M);
 
   // AsmPrinter::doInitialization should have done this analysis.
   MMI = getAnalysisToUpdate();
   assert(MMI);
-  // FIXME: Dwarf support.
-  //DW.SetModuleInfo(MMI);
+  DW.SetModuleInfo(MMI);
 
   // Darwin wants symbols to be quoted if they have complex names.
   if (Subtarget->isTargetDarwin())
@@ -1016,8 +1012,7 @@
 
 
     // Emit initial debug information.
-    // FIXME: Dwarf support.
-    //DW.EndModule();
+    DW.EndModule();
 
     // Funny Darwin hack: This flag tells the linker that no global symbols
     // contain code that falls through to other global symbols (e.g. the obvious
@@ -1027,8 +1022,7 @@
     O << "\t.subsections_via_symbols\n";
   } else {
     // Emit final debug information for ELF.
-    // FIXME: Dwarf support.
-    //DW.EndModule();
+    DW.EndModule();
   }
 
   return AsmPrinter::doFinalization(M);




From isanbard at gmail.com  Wed Dec 10 16:02:50 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 10 Dec 2008 14:02:50 -0800
Subject: [llvm-commits] [llvm] r60807 - in /llvm/trunk:
	lib/Target/X86/X86FastISel.cpp test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: 
References: <200812092319.mB9NJDWN031452@zion.cs.uiuc.edu>
	<2EDB43CA-522D-4A4B-9F1E-4FA0B8F2831F@apple.com>
	<16e5fdf90812101110t1b329ca5u7f6c22076571a164@mail.gmail.com>
	
Message-ID: <16e5fdf90812101402g3d1ad08sec901899a5127600@mail.gmail.com>

On Wed, Dec 10, 2008 at 1:51 PM, Evan Cheng  wrote:
>
> On Dec 10, 2008, at 11:10 AM, Bill Wendling wrote:
>
>> On Wed, Dec 10, 2008 at 9:16 AM, Evan Cheng  wrote:
>>>
>>>> +    const MachineInstr *SetMI = 0;
>>>> +    unsigned Reg = lookUpRegForValue(EI);
>>>> +
>>>> +    for (MachineBasicBlock::const_reverse_iterator
>>>> +           RI = MBB->rbegin(), RE = MBB->rend(); RI != RE; ++RI) {
>>>> +      const MachineInstr &MI = *RI;
>>>
>>> Hi Bill,
>>>
>>> I don't think it makes sense to traverse machine instructions here.
>>> We
>>> want fastisel to be fast and this has the potential to be slow. This
>>> code is only correct when we are doing top down fastisel, right? If
>>> that's the case why not just check the end of MBB instruction is a
>>> SETO / SETC? If there are other instructions in between, then we'll
>>> do
>>> dag isel instead. This allows the code to handle the most common
>>> cases.
>>>
>> The last instruction at this point isn't a SETO/SETC instruction, but
>> a (useless) move of the register that SETO/SETC defines into another
>> register. That's why I check whether it's a move instruction. The code
>> looks something like this:
>>
>>        %reg1024 = MOV32rm , 1, %reg0, 0, Mem:LD(4,4)
>> [FixedStack-1 + 0]
>>        %reg1025 = MOV32rm , 1, %reg0, 0, Mem:LD(4,4)
>> [FixedStack-2 + 0]
>>        %reg1028 = ADD32rr %reg1024, %reg1025, %EFLAGS
>>        %reg1029 = SETOr %EFLAGS
>>        %reg1026 = MOV32rr %reg1028
>>        %reg1027 = MOV8rr %reg1029
>>
>> with the conditional for the BRCOND being %reg1027. If I only look at
>> the last instruction, then this will never trigger. I *could* look at
>> the last three instructions, but that's pretty restrictive . . . but
>> fast.
>
> Where are the moves coming from?
>
The typical way to use these intrinsics is this:

  %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)
  %sum = extractvalue {i32, i1} %t, 0
  %obit = extractvalue {i32, i1} %t, 1
  br i1 %obit, label %overflow, label %normal

The llvm.sadd.with.overflow call is lowered into

        %reg1024 = MOV32rm ...
        %reg1025 = MOV32rm ...
        %reg1028 = ADD32rr %reg1024, %reg1025, %EFLAGS
        %reg1029 = SETOr %EFLAGS

The extractvalue calls are handled in FastISel by calling

        UpdateValueMap(I, lookUpRegForValue(Agg) + *EI->idx_begin());

Assigning them the register value from the ADD or SETO (depending on
its index). These result in the two move instructions.

-bw


From echeng at apple.com  Wed Dec 10 16:17:27 2008
From: echeng at apple.com (Evan Cheng)
Date: Wed, 10 Dec 2008 14:17:27 -0800
Subject: [llvm-commits] [llvm] r60807 - in /llvm/trunk:
	lib/Target/X86/X86FastISel.cpp test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: <16e5fdf90812101402g3d1ad08sec901899a5127600@mail.gmail.com>
References: <200812092319.mB9NJDWN031452@zion.cs.uiuc.edu>
	<2EDB43CA-522D-4A4B-9F1E-4FA0B8F2831F@apple.com>
	<16e5fdf90812101110t1b329ca5u7f6c22076571a164@mail.gmail.com>
	
	<16e5fdf90812101402g3d1ad08sec901899a5127600@mail.gmail.com>
Message-ID: <110748DE-E919-4D7A-8974-C8A156A389AB@apple.com>


On Dec 10, 2008, at 2:02 PM, Bill Wendling wrote:

> On Wed, Dec 10, 2008 at 1:51 PM, Evan Cheng  wrote:
>>
>> On Dec 10, 2008, at 11:10 AM, Bill Wendling wrote:
>>
>>> On Wed, Dec 10, 2008 at 9:16 AM, Evan Cheng   
>>> wrote:
>>>>
>>>>> +    const MachineInstr *SetMI = 0;
>>>>> +    unsigned Reg = lookUpRegForValue(EI);
>>>>> +
>>>>> +    for (MachineBasicBlock::const_reverse_iterator
>>>>> +           RI = MBB->rbegin(), RE = MBB->rend(); RI != RE; + 
>>>>> +RI) {
>>>>> +      const MachineInstr &MI = *RI;
>>>>
>>>> Hi Bill,
>>>>
>>>> I don't think it makes sense to traverse machine instructions here.
>>>> We
>>>> want fastisel to be fast and this has the potential to be slow.  
>>>> This
>>>> code is only correct when we are doing top down fastisel, right? If
>>>> that's the case why not just check the end of MBB instruction is a
>>>> SETO / SETC? If there are other instructions in between, then we'll
>>>> do
>>>> dag isel instead. This allows the code to handle the most common
>>>> cases.
>>>>
>>> The last instruction at this point isn't a SETO/SETC instruction,  
>>> but
>>> a (useless) move of the register that SETO/SETC defines into another
>>> register. That's why I check whether it's a move instruction. The  
>>> code
>>> looks something like this:
>>>
>>>       %reg1024 = MOV32rm , 1, %reg0, 0, Mem:LD(4,4)
>>> [FixedStack-1 + 0]
>>>       %reg1025 = MOV32rm , 1, %reg0, 0, Mem:LD(4,4)
>>> [FixedStack-2 + 0]
>>>       %reg1028 = ADD32rr %reg1024, %reg1025, %EFLAGS
>>>       %reg1029 = SETOr %EFLAGS
>>>       %reg1026 = MOV32rr %reg1028
>>>       %reg1027 = MOV8rr %reg1029
>>>
>>> with the conditional for the BRCOND being %reg1027. If I only look  
>>> at
>>> the last instruction, then this will never trigger. I *could* look  
>>> at
>>> the last three instructions, but that's pretty restrictive . . . but
>>> fast.
>>
>> Where are the moves coming from?
>>
> The typical way to use these intrinsics is this:
>
>  %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)
>  %sum = extractvalue {i32, i1} %t, 0
>  %obit = extractvalue {i32, i1} %t, 1
>  br i1 %obit, label %overflow, label %normal
>
> The llvm.sadd.with.overflow call is lowered into
>
>        %reg1024 = MOV32rm ...
>        %reg1025 = MOV32rm ...
>        %reg1028 = ADD32rr %reg1024, %reg1025, %EFLAGS
>        %reg1029 = SETOr %EFLAGS
>
> The extractvalue calls are handled in FastISel by calling
>
>        UpdateValueMap(I, lookUpRegForValue(Agg) + *EI->idx_begin());
>
> Assigning them the register value from the ADD or SETO (depending on
> its index). These result in the two move instructions.

I see. I guess you have no choice but to traverse pass these moves  
until you get to the SETO / SETC. But if it runs into any other  
instructions in between, I would just drop out.

Evan

>
>
> -bw
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From kremenek at apple.com  Wed Dec 10 16:20:54 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Wed, 10 Dec 2008 22:20:54 -0000
Subject: [llvm-commits] [llvm] r60853 - /llvm/tags/checker/checker-132/
Message-ID: <200812102220.mBAMKxLg017860@zion.cs.uiuc.edu>

Author: kremenek
Date: Wed Dec 10 16:20:34 2008
New Revision: 60853

URL: http://llvm.org/viewvc/llvm-project?rev=60853&view=rev
Log:
Removing checker-132.

Removed:
    llvm/tags/checker/checker-132/



From edwintorok at gmail.com  Wed Dec 10 16:21:31 2008
From: edwintorok at gmail.com (=?ISO-8859-1?Q?T=F6r=F6k_Edwin?=)
Date: Thu, 11 Dec 2008 00:21:31 +0200
Subject: [llvm-commits] [PATCH] Debug info utilities and printer pass
In-Reply-To: 
References: <4940122B.5040005@gmail.com>
	
Message-ID: <494040EB.4050001@gmail.com>

On 2008-12-10 23:13, Devang Patel wrote:
> Hi Torok,
>   

Hi Devang,

> On Dec 10, 2008, at 11:02 AM, T?r?k Edwin wrote:
>
>   
>> Hi,
>>
>> [@John Criswell: this is a much improved version of SourceLocator I  
>> sent
>> you ages ago ;)]
>>
>> 01-bb.patch:
>> BasicBlock::getUniquePredecessor -> similar to getSinglePredecessor()
>> but works if there is a unique predecessor listed multiple times
>>     
>
> This is OK.
>   

Thanks, will commit this tomorrow morning.

>   
>> 02-intrin.patch:
>> Introduce DbgFuncStart::getDisplayName() (which refers to unmangled C 
>> ++
>> name!), and DbgDeclareInst::getVariableName()
>> Introduce include/llvm/Support/DebugInfo.h:
>>     
>
> We already have include/llvm/Analysis/DebugInfo.h, so I suggest that  
> you use another name for this new header.
>   

I named it include/llvm/Support/SourceInfo.h now.

>
> +namespace llvm {
> +  class DbgStopPointInst;
> +  /// Finds the stoppoint coressponding to this instruction, that is  
> the
> +  /// stoppoint that dominates this instruction
> +  static const DbgStopPointInst *findStopPoint(const Instruction *Inst)
> +  {
> +    if (isa(Inst))
> +      return cast(Inst);
>
> pl. use dyn_cast instead of isa + cast.
>   

Ok.

> +
> +    const BasicBlock *BB = Inst->getParent();
> +    BasicBlock::const_iterator I = Inst, B;
> +    do {
> +      B = BB->begin();
> +      // a BB consisting only of a terminator, can't have a stoppoint
> +      if (I != B) {
> +        do {
> +          --I;
> +          if (isa(*I))
> +            return cast(&*I);
> +        } while (I != B);
> +      }
> +      // this BB didn't have a stoppoint, if there is only one
> +      // predecessor, look for a stoppoint there
> +      // we could use getIDom(), but that would require dominator info
> +      BB = I->getParent()->getUniquePredecessor();
> +      if (BB)
> +        I = BB->getTerminator();
> +    } while (BB != 0);
> +    return 0;
> +  }
> +
> +  /// Finds the stoppoint corresponding to first real (non-debug  
> intrinsic)
> +  /// instruction in this Basic Block, and returns the stoppoint for  
> it.
> +  static const DbgStopPointInst *findBBStopPoint(const BasicBlock *BB)
> +  {
> +    for(BasicBlock::const_iterator I = BB->begin(), E = BB->end(); I ! 
> = E; ++I) {
> +      if (isa(*I))
> +        return cast(&*I);
> +    }
> +    // fallback to looking for stoppoint of terminator inst
> +    // useful if this BB contains no stoppoints, but unique  
> predecessor does
> +    return findStopPoint(BB->getTerminator());
>
> This will iterate BB again again.
>   

Thanks for spotting this, see the updated 02-intrin.patch.

Best regards,
--Edwin
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From isanbard at gmail.com  Wed Dec 10 16:25:18 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 10 Dec 2008 14:25:18 -0800
Subject: [llvm-commits] [llvm] r60807 - in /llvm/trunk:
	lib/Target/X86/X86FastISel.cpp test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: <110748DE-E919-4D7A-8974-C8A156A389AB@apple.com>
References: <200812092319.mB9NJDWN031452@zion.cs.uiuc.edu>
	<2EDB43CA-522D-4A4B-9F1E-4FA0B8F2831F@apple.com>
	<16e5fdf90812101110t1b329ca5u7f6c22076571a164@mail.gmail.com>
	
	<16e5fdf90812101402g3d1ad08sec901899a5127600@mail.gmail.com>
	<110748DE-E919-4D7A-8974-C8A156A389AB@apple.com>
Message-ID: <16e5fdf90812101425h1ebd797fp325d8bb1fc2e021b@mail.gmail.com>

On Wed, Dec 10, 2008 at 2:17 PM, Evan Cheng  wrote:
>
> On Dec 10, 2008, at 2:02 PM, Bill Wendling wrote:
>
>> On Wed, Dec 10, 2008 at 1:51 PM, Evan Cheng  wrote:
>>>
>>> On Dec 10, 2008, at 11:10 AM, Bill Wendling wrote:
>>>
>>>> On Wed, Dec 10, 2008 at 9:16 AM, Evan Cheng 
>>>> wrote:
>>>>>
>>>>>> +    const MachineInstr *SetMI = 0;
>>>>>> +    unsigned Reg = lookUpRegForValue(EI);
>>>>>> +
>>>>>> +    for (MachineBasicBlock::const_reverse_iterator
>>>>>> +           RI = MBB->rbegin(), RE = MBB->rend(); RI != RE; +
>>>>>> +RI) {
>>>>>> +      const MachineInstr &MI = *RI;
>>>>>
>>>>> Hi Bill,
>>>>>
>>>>> I don't think it makes sense to traverse machine instructions here.
>>>>> We
>>>>> want fastisel to be fast and this has the potential to be slow.
>>>>> This
>>>>> code is only correct when we are doing top down fastisel, right? If
>>>>> that's the case why not just check the end of MBB instruction is a
>>>>> SETO / SETC? If there are other instructions in between, then we'll
>>>>> do
>>>>> dag isel instead. This allows the code to handle the most common
>>>>> cases.
>>>>>
>>>> The last instruction at this point isn't a SETO/SETC instruction,
>>>> but
>>>> a (useless) move of the register that SETO/SETC defines into another
>>>> register. That's why I check whether it's a move instruction. The
>>>> code
>>>> looks something like this:
>>>>
>>>>       %reg1024 = MOV32rm , 1, %reg0, 0, Mem:LD(4,4)
>>>> [FixedStack-1 + 0]
>>>>       %reg1025 = MOV32rm , 1, %reg0, 0, Mem:LD(4,4)
>>>> [FixedStack-2 + 0]
>>>>       %reg1028 = ADD32rr %reg1024, %reg1025, %EFLAGS
>>>>       %reg1029 = SETOr %EFLAGS
>>>>       %reg1026 = MOV32rr %reg1028
>>>>       %reg1027 = MOV8rr %reg1029
>>>>
>>>> with the conditional for the BRCOND being %reg1027. If I only look
>>>> at
>>>> the last instruction, then this will never trigger. I *could* look
>>>> at
>>>> the last three instructions, but that's pretty restrictive . . . but
>>>> fast.
>>>
>>> Where are the moves coming from?
>>>
>> The typical way to use these intrinsics is this:
>>
>>  %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)
>>  %sum = extractvalue {i32, i1} %t, 0
>>  %obit = extractvalue {i32, i1} %t, 1
>>  br i1 %obit, label %overflow, label %normal
>>
>> The llvm.sadd.with.overflow call is lowered into
>>
>>        %reg1024 = MOV32rm ...
>>        %reg1025 = MOV32rm ...
>>        %reg1028 = ADD32rr %reg1024, %reg1025, %EFLAGS
>>        %reg1029 = SETOr %EFLAGS
>>
>> The extractvalue calls are handled in FastISel by calling
>>
>>        UpdateValueMap(I, lookUpRegForValue(Agg) + *EI->idx_begin());
>>
>> Assigning them the register value from the ADD or SETO (depending on
>> its index). These result in the two move instructions.
>
> I see. I guess you have no choice but to traverse pass these moves
> until you get to the SETO / SETC. But if it runs into any other
> instructions in between, I would just drop out.
>
Sure. That sounds fine. :-)

-bw


From kremenek at apple.com  Wed Dec 10 16:28:12 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Wed, 10 Dec 2008 22:28:12 -0000
Subject: [llvm-commits] [llvm] r60855 - /llvm/tags/checker/checker-132/
Message-ID: <200812102228.mBAMSCOZ018181@zion.cs.uiuc.edu>

Author: kremenek
Date: Wed Dec 10 16:28:00 2008
New Revision: 60855

URL: http://llvm.org/viewvc/llvm-project?rev=60855&view=rev
Log:
Tagging checker-132.

Added:
    llvm/tags/checker/checker-132/
      - copied from r60854, llvm/trunk/



From isanbard at gmail.com  Wed Dec 10 16:36:15 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 10 Dec 2008 22:36:15 -0000
Subject: [llvm-commits] [llvm] r60857 - in /llvm/trunk:
 lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 test/CodeGen/X86/add-with-overflow.ll
Message-ID: <200812102236.mBAMaKQ6018412@zion.cs.uiuc.edu>

Author: void
Date: Wed Dec 10 16:36:00 2008
New Revision: 60857

URL: http://llvm.org/viewvc/llvm-project?rev=60857&view=rev
Log:
If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation on
them. The DAG combiner expects that nodes that are transformed have one value
result.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/X86/add-with-overflow.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=60857&r1=60856&r2=60857&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Dec 10 16:36:00 2008
@@ -966,6 +966,11 @@
     SDValue FoldedVOp = SimplifyVBinOp(N);
     if (FoldedVOp.getNode()) return FoldedVOp;
   }
+
+  if (N->getNumValues() != 1)
+    // FIXME: DAG combiner cannot handle multiple return values on arithmetic
+    //        operators.
+    return SDValue();
   
   // fold (add x, undef) -> undef
   if (N0.getOpcode() == ISD::UNDEF)
@@ -1161,6 +1166,11 @@
     SDValue FoldedVOp = SimplifyVBinOp(N);
     if (FoldedVOp.getNode()) return FoldedVOp;
   }
+
+  if (N->getNumValues() != 1)
+    // FIXME: DAG combiner cannot handle multiple return values on arithmetic
+    //        operators.
+    return SDValue();
   
   // fold (sub x, x) -> 0
   if (N0 == N1)
@@ -1220,6 +1230,11 @@
     if (FoldedVOp.getNode()) return FoldedVOp;
   }
   
+  if (N->getNumValues() != 1)
+    // FIXME: DAG combiner cannot handle multiple return values on arithmetic
+    //        operators.
+    return SDValue();
+    
   // fold (mul x, undef) -> 0
   if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF)
     return DAG.getConstant(0, VT);

Modified: llvm/trunk/test/CodeGen/X86/add-with-overflow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/add-with-overflow.ll?rev=60857&r1=60856&r2=60857&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/X86/add-with-overflow.ll (original)
+++ llvm/trunk/test/CodeGen/X86/add-with-overflow.ll Wed Dec 10 16:36:00 2008
@@ -1,7 +1,7 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep {jo} | count 1
-; RUN: llvm-as < %s | llc -march=x86 | grep {jc} | count 1
-; RUN: llvm-as < %s | llc -march=x86 -fast | grep {jo} | count 1
-; RUN: llvm-as < %s | llc -march=x86 -fast | grep {jc} | count 1
+; RUN: llvm-as < %s | llc -march=x86 | grep {jo} | count 2
+; RUN: llvm-as < %s | llc -march=x86 | grep {jc} | count 2
+; RUN: llvm-as < %s | llc -march=x86 -fast | grep {jo} | count 2
+; RUN: llvm-as < %s | llc -march=x86 -fast | grep {jc} | count 2
 
 @ok = internal constant [4 x i8] c"%d\0A\00"
 @no = internal constant [4 x i8] c"no\0A\00"
@@ -38,6 +38,38 @@
   ret i1 false
 }
 
+define i1 @func3() nounwind {
+entry:
+  %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 0, i32 0)
+  %sum = extractvalue {i32, i1} %t, 0
+  %obit = extractvalue {i32, i1} %t, 1
+  br i1 %obit, label %carry, label %normal
+
+normal:
+  %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
+  ret i1 true
+
+carry:
+  %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
+  ret i1 false
+}
+
+define i1 @func4() nounwind {
+entry:
+  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 0, i32 0)
+  %sum = extractvalue {i32, i1} %t, 0
+  %obit = extractvalue {i32, i1} %t, 1
+  br i1 %obit, label %carry, label %normal
+
+normal:
+  %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
+  ret i1 true
+
+carry:
+  %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
+  ret i1 false
+}
+
 declare i32 @printf(i8*, ...) nounwind
 declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32)
 declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32)




From brukman+llvm at gmail.com  Wed Dec 10 17:07:03 2008
From: brukman+llvm at gmail.com (Misha Brukman)
Date: Wed, 10 Dec 2008 23:07:03 -0000
Subject: [llvm-commits] [llvm] r60859 - /llvm/trunk/docs/CodingStandards.html
Message-ID: <200812102307.mBAN74nM019394@zion.cs.uiuc.edu>

Author: brukman
Date: Wed Dec 10 17:07:02 2008
New Revision: 60859

URL: http://llvm.org/viewvc/llvm-project?rev=60859&view=rev
Log:
s/A Few Coding Standards/LLVM Coding Standards/g

Modified:
    llvm/trunk/docs/CodingStandards.html

Modified: llvm/trunk/docs/CodingStandards.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodingStandards.html?rev=60859&r1=60858&r2=60859&view=diff

==============================================================================
--- llvm/trunk/docs/CodingStandards.html (original)
+++ llvm/trunk/docs/CodingStandards.html Wed Dec 10 17:07:02 2008
@@ -3,12 +3,12 @@
 
 
   
-  A Few Coding Standards
+  LLVM Coding Standards
 
 
 
 

-  A Few Coding Standards
+  LLVM Coding Standards
 
 
 




From isanbard at gmail.com  Wed Dec 10 17:24:52 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 10 Dec 2008 23:24:52 -0000
Subject: [llvm-commits] [llvm] r60861 -
	/llvm/trunk/lib/CodeGen/BranchFolding.cpp
Message-ID: <200812102324.mBANOrYd019932@zion.cs.uiuc.edu>

Author: void
Date: Wed Dec 10 17:24:43 2008
New Revision: 60861

URL: http://llvm.org/viewvc/llvm-project?rev=60861&view=rev
Log:
Add a newline after this debug output.

Modified:
    llvm/trunk/lib/CodeGen/BranchFolding.cpp

Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=60861&r1=60860&r2=60861&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original)
+++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Wed Dec 10 17:24:43 2008
@@ -596,7 +596,7 @@
   unsigned minCommonTailLength = (SuccBB ? 1 : 2) + 1;
   MadeChange = false;
   
-  DOUT << "\nTryMergeBlocks " << MergePotentials.size();
+  DOUT << "\nTryMergeBlocks " << MergePotentials.size() << '\n';
 
   // Sort by hash value so that blocks with identical end sequences sort
   // together.




From wangmp at apple.com  Wed Dec 10 18:26:24 2008
From: wangmp at apple.com (Mon P Wang)
Date: Thu, 11 Dec 2008 00:26:24 -0000
Subject: [llvm-commits] [llvm] r60865 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Message-ID: <200812110026.mBB0QQQt021781@zion.cs.uiuc.edu>

Author: wangmp
Date: Wed Dec 10 18:26:16 2008
New Revision: 60865

URL: http://llvm.org/viewvc/llvm-project?rev=60865&view=rev
Log:
Make fix for r60829 less conservative to allow the proper optimization for
vec_extract-sse4.ll.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=60865&r1=60864&r2=60865&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Dec 10 18:26:16 2008
@@ -4884,14 +4884,16 @@
   if (isa(EltNo)) {
     unsigned Elt = cast(EltNo)->getZExtValue();
     bool NewLoad = false;
+    bool BCNumEltsChanged = false;
     MVT VT = InVec.getValueType();
     MVT EVT = VT.getVectorElementType();
     MVT LVT = EVT;
     if (InVec.getOpcode() == ISD::BIT_CONVERT) {
       MVT BCVT = InVec.getOperand(0).getValueType();
-      if (!BCVT.isVector() || EVT.bitsGT(BCVT.getVectorElementType()) ||
-          VT.getVectorNumElements() != BCVT.getVectorNumElements())
+      if (!BCVT.isVector() || EVT.bitsGT(BCVT.getVectorElementType()))
         return SDValue();
+      if (VT.getVectorNumElements() != BCVT.getVectorNumElements())
+        BCNumEltsChanged = true;
       InVec = InVec.getOperand(0);
       EVT = BCVT.getVectorElementType();
       NewLoad = true;
@@ -4908,6 +4910,11 @@
       // (vextract (vector_shuffle (load $addr), v2, <1, u, u, u>), 1)
       // =>
       // (load $addr+1*size)
+      
+      // If the bit convert changed the number of elements, it is unsafe
+      // to examine the mask.
+      if (BCNumEltsChanged)
+        return SDValue();
       unsigned Idx = cast(InVec.getOperand(2).
                                           getOperand(Elt))->getZExtValue();
       unsigned NumElems = InVec.getOperand(2).getNumOperands();




From wangmp at apple.com  Wed Dec 10 18:44:38 2008
From: wangmp at apple.com (Mon P Wang)
Date: Thu, 11 Dec 2008 00:44:38 -0000
Subject: [llvm-commits] [llvm] r60866 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Message-ID: <200812110044.mBB0ifm4022396@zion.cs.uiuc.edu>

Author: wangmp
Date: Wed Dec 10 18:44:22 2008
New Revision: 60866

URL: http://llvm.org/viewvc/llvm-project?rev=60866&view=rev
Log:
Whitespace clean up (tabs with spaces)

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=60866&r1=60865&r2=60866&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Dec 10 18:44:22 2008
@@ -3928,15 +3928,15 @@
       switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
       default: assert(0 && "Unknown TRUNCATE legalization operation action!");
       case TargetLowering::Custom:
-	isCustom = true;
-	// FALLTHROUGH
+        isCustom = true;
+        // FALLTHROUGH
       case TargetLowering::Legal:
-	Result = DAG.UpdateNodeOperands(Result, Tmp1);
-	if (isCustom) {
-	  Tmp1 = TLI.LowerOperation(Result, DAG);
-	  if (Tmp1.getNode()) Result = Tmp1;
-	}
-	break;
+        Result = DAG.UpdateNodeOperands(Result, Tmp1);
+        if (isCustom) {
+          Tmp1 = TLI.LowerOperation(Result, DAG);
+          if (Tmp1.getNode()) Result = Tmp1;
+        }
+        break;
       }
       break;
     case Expand:




From echeng at apple.com  Wed Dec 10 19:15:47 2008
From: echeng at apple.com (Evan Cheng)
Date: Wed, 10 Dec 2008 17:15:47 -0800
Subject: [llvm-commits] [llvm] r60857 - in /llvm/trunk:
	lib/CodeGen/SelectionDAG/DAGCombiner.cpp
	test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: <200812102236.mBAMaKQ6018412@zion.cs.uiuc.edu>
References: <200812102236.mBAMaKQ6018412@zion.cs.uiuc.edu>
Message-ID: <508BD598-280D-4B57-B932-598670CD5316@apple.com>


On Dec 10, 2008, at 2:36 PM, Bill Wendling wrote:

> Author: void
> Date: Wed Dec 10 16:36:00 2008
> New Revision: 60857
>
> URL: http://llvm.org/viewvc/llvm-project?rev=60857&view=rev
> Log:
> If ADD, SUB, or MUL have an overflow bit that's used, don't do  
> transformation on
> them. The DAG combiner expects that nodes that are transformed have  
> one value
> result.
>
> Modified:
>    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>    llvm/trunk/test/CodeGen/X86/add-with-overflow.ll
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=60857&r1=60856&r2=60857&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Dec 10  
> 16:36:00 2008
> @@ -966,6 +966,11 @@
>     SDValue FoldedVOp = SimplifyVBinOp(N);
>     if (FoldedVOp.getNode()) return FoldedVOp;
>   }
> +
> +  if (N->getNumValues() != 1)
> +    // FIXME: DAG combiner cannot handle multiple return values on  
> arithmetic
> +    //        operators.

"Return values" is not exactly the right way to put it. How about  
"cannot handle arithmetic operators whose implicit definitions are  
being used" or "cannot handle arithmetic operators which produce  
multiple results"?

Evan

>
> +    return SDValue();
>
>   // fold (add x, undef) -> undef
>   if (N0.getOpcode() == ISD::UNDEF)
> @@ -1161,6 +1166,11 @@
>     SDValue FoldedVOp = SimplifyVBinOp(N);
>     if (FoldedVOp.getNode()) return FoldedVOp;
>   }
> +
> +  if (N->getNumValues() != 1)
> +    // FIXME: DAG combiner cannot handle multiple return values on  
> arithmetic
> +    //        operators.
> +    return SDValue();
>
>   // fold (sub x, x) -> 0
>   if (N0 == N1)
> @@ -1220,6 +1230,11 @@
>     if (FoldedVOp.getNode()) return FoldedVOp;
>   }
>
> +  if (N->getNumValues() != 1)
> +    // FIXME: DAG combiner cannot handle multiple return values on  
> arithmetic
> +    //        operators.
> +    return SDValue();
> +
>   // fold (mul x, undef) -> 0
>   if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF)
>     return DAG.getConstant(0, VT);
>
> Modified: llvm/trunk/test/CodeGen/X86/add-with-overflow.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/add-with-overflow.ll?rev=60857&r1=60856&r2=60857&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/test/CodeGen/X86/add-with-overflow.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/add-with-overflow.ll Wed Dec 10  
> 16:36:00 2008
> @@ -1,7 +1,7 @@
> -; RUN: llvm-as < %s | llc -march=x86 | grep {jo} | count 1
> -; RUN: llvm-as < %s | llc -march=x86 | grep {jc} | count 1
> -; RUN: llvm-as < %s | llc -march=x86 -fast | grep {jo} | count 1
> -; RUN: llvm-as < %s | llc -march=x86 -fast | grep {jc} | count 1
> +; RUN: llvm-as < %s | llc -march=x86 | grep {jo} | count 2
> +; RUN: llvm-as < %s | llc -march=x86 | grep {jc} | count 2
> +; RUN: llvm-as < %s | llc -march=x86 -fast | grep {jo} | count 2
> +; RUN: llvm-as < %s | llc -march=x86 -fast | grep {jc} | count 2
>
> @ok = internal constant [4 x i8] c"%d\0A\00"
> @no = internal constant [4 x i8] c"no\0A\00"
> @@ -38,6 +38,38 @@
>   ret i1 false
> }
>
> +define i1 @func3() nounwind {
> +entry:
> +  %t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 0, i32 0)
> +  %sum = extractvalue {i32, i1} %t, 0
> +  %obit = extractvalue {i32, i1} %t, 1
> +  br i1 %obit, label %carry, label %normal
> +
> +normal:
> +  %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x  
> i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
> +  ret i1 true
> +
> +carry:
> +  %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x  
> i8]* @no, i32 0, i32 0) ) nounwind
> +  ret i1 false
> +}
> +
> +define i1 @func4() nounwind {
> +entry:
> +  %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 0, i32 0)
> +  %sum = extractvalue {i32, i1} %t, 0
> +  %obit = extractvalue {i32, i1} %t, 1
> +  br i1 %obit, label %carry, label %normal
> +
> +normal:
> +  %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x  
> i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
> +  ret i1 true
> +
> +carry:
> +  %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x  
> i8]* @no, i32 0, i32 0) ) nounwind
> +  ret i1 false
> +}
> +
> declare i32 @printf(i8*, ...) nounwind
> declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32)
> declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32)
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From isanbard at gmail.com  Wed Dec 10 19:26:54 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 10 Dec 2008 17:26:54 -0800
Subject: [llvm-commits] [llvm] r60857 - in /llvm/trunk:
	lib/CodeGen/SelectionDAG/DAGCombiner.cpp
	test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: <508BD598-280D-4B57-B932-598670CD5316@apple.com>
References: <200812102236.mBAMaKQ6018412@zion.cs.uiuc.edu>
	<508BD598-280D-4B57-B932-598670CD5316@apple.com>
Message-ID: <16e5fdf90812101726l610a77b6wed2178d31bbcf8cb@mail.gmail.com>

On Wed, Dec 10, 2008 at 5:15 PM, Evan Cheng  wrote:
>
> On Dec 10, 2008, at 2:36 PM, Bill Wendling wrote:
>
>> Author: void
>> Date: Wed Dec 10 16:36:00 2008
>> New Revision: 60857
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=60857&view=rev
>> Log:
>> If ADD, SUB, or MUL have an overflow bit that's used, don't do
>> transformation on
>> them. The DAG combiner expects that nodes that are transformed have
>> one value
>> result.
>>
>> Modified:
>>    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>>    llvm/trunk/test/CodeGen/X86/add-with-overflow.ll
>>
>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=60857&r1=60856&r2=60857&view=diff
>>
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> ======================================================================
>> --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Dec 10
>> 16:36:00 2008
>> @@ -966,6 +966,11 @@
>>     SDValue FoldedVOp = SimplifyVBinOp(N);
>>     if (FoldedVOp.getNode()) return FoldedVOp;
>>   }
>> +
>> +  if (N->getNumValues() != 1)
>> +    // FIXME: DAG combiner cannot handle multiple return values on
>> arithmetic
>> +    //        operators.
>
> "Return values" is not exactly the right way to put it. How about
> "cannot handle arithmetic operators whose implicit definitions are
> being used" or "cannot handle arithmetic operators which produce
> multiple results"?
>

Sure. Done.

-bw


From isanbard at gmail.com  Wed Dec 10 19:26:55 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 11 Dec 2008 01:26:55 -0000
Subject: [llvm-commits] [llvm] r60867 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Message-ID: <200812110126.mBB1QwQG023649@zion.cs.uiuc.edu>

Author: void
Date: Wed Dec 10 19:26:44 2008
New Revision: 60867

URL: http://llvm.org/viewvc/llvm-project?rev=60867&view=rev
Log:
Clarify FIXME.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=60867&r1=60866&r2=60867&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Dec 10 19:26:44 2008
@@ -968,8 +968,8 @@
   }
 
   if (N->getNumValues() != 1)
-    // FIXME: DAG combiner cannot handle multiple return values on arithmetic
-    //        operators.
+    // FIXME: DAG combiner cannot handle arithmetic operators which produce
+    // multiple results.
     return SDValue();
   
   // fold (add x, undef) -> undef
@@ -1168,8 +1168,8 @@
   }
 
   if (N->getNumValues() != 1)
-    // FIXME: DAG combiner cannot handle multiple return values on arithmetic
-    //        operators.
+    // FIXME: DAG combiner cannot handle arithmetic operators which produce
+    // multiple results.
     return SDValue();
   
   // fold (sub x, x) -> 0
@@ -1231,8 +1231,8 @@
   }
   
   if (N->getNumValues() != 1)
-    // FIXME: DAG combiner cannot handle multiple return values on arithmetic
-    //        operators.
+    // FIXME: DAG combiner cannot handle arithmetic operators which produce
+    // multiple results.
     return SDValue();
     
   // fold (mul x, undef) -> 0




From clattner at apple.com  Wed Dec 10 20:11:03 2008
From: clattner at apple.com (Chris Lattner)
Date: Wed, 10 Dec 2008 18:11:03 -0800
Subject: [llvm-commits] [llvm] r60857 - in /llvm/trunk:
	lib/CodeGen/SelectionDAG/DAGCombiner.cpp
	test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: <200812102236.mBAMaKQ6018412@zion.cs.uiuc.edu>
References: <200812102236.mBAMaKQ6018412@zion.cs.uiuc.edu>
Message-ID: <0A37EA44-347C-4DEC-937D-17C08A1BBBF4@apple.com>


On Dec 10, 2008, at 2:36 PM, Bill Wendling wrote:

> Author: void
> Date: Wed Dec 10 16:36:00 2008
> New Revision: 60857
>
> URL: http://llvm.org/viewvc/llvm-project?rev=60857&view=rev
> Log:
> If ADD, SUB, or MUL have an overflow bit that's used, don't do  
> transformation on
> them. The DAG combiner expects that nodes that are transformed have  
> one value
> result.

Bill, I'm very confused about this.  The "ADD" node is defined to have  
two inputs and one output.  How could N->getNumValues() even be non  
1?  Are you somehow getting SADDO/UADDO into this code?  visitADD  
should only be called on an ADD node.  What am I missing?

-Chris



From clattner at apple.com  Wed Dec 10 20:13:10 2008
From: clattner at apple.com (Chris Lattner)
Date: Wed, 10 Dec 2008 18:13:10 -0800
Subject: [llvm-commits] [PATCH] Debug info utilities and printer pass
In-Reply-To: 
References: <4940122B.5040005@gmail.com>
	
Message-ID: 

On Dec 10, 2008, at 1:13 PM, Devang Patel wrote:
>> 02-intrin.patch:
>> Introduce DbgFuncStart::getDisplayName() (which refers to unmangled C
>> ++
>> name!), and DbgDeclareInst::getVariableName()
>> Introduce include/llvm/Support/DebugInfo.h:
>
> We already have include/llvm/Analysis/DebugInfo.h, so I suggest that
> you use another name for this new header.

More strongly, why do we need this new code when we have llvm/Analysis/ 
Debuginfo.h?  What does this do that llvm/Analysis/DebugInfo doesn't,  
or shouldn't do?

I'd really rather make Analysis/DebugInfo.h better rather than  
introduce a new parallel way to analyze debug info.

-Chris



From isanbard at gmail.com  Wed Dec 10 21:30:01 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 10 Dec 2008 19:30:01 -0800
Subject: [llvm-commits] [llvm] r60857 - in /llvm/trunk:
	lib/CodeGen/SelectionDAG/DAGCombiner.cpp
	test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: <0A37EA44-347C-4DEC-937D-17C08A1BBBF4@apple.com>
References: <200812102236.mBAMaKQ6018412@zion.cs.uiuc.edu>
	<0A37EA44-347C-4DEC-937D-17C08A1BBBF4@apple.com>
Message-ID: 

On Dec 10, 2008, at 6:11 PM, Chris Lattner wrote:

> On Dec 10, 2008, at 2:36 PM, Bill Wendling wrote:
>
>> Author: void
>> Date: Wed Dec 10 16:36:00 2008
>> New Revision: 60857
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=60857&view=rev
>> Log:
>> If ADD, SUB, or MUL have an overflow bit that's used, don't do
>> transformation on
>> them. The DAG combiner expects that nodes that are transformed have
>> one value
>> result.
>
> Bill, I'm very confused about this.  The "ADD" node is defined to have
> two inputs and one output.  How could N->getNumValues() even be non
> 1?  Are you somehow getting SADDO/UADDO into this code?  visitADD
> should only be called on an ADD node.  What am I missing?
>
We converted the ADD node to having an implicit def. The overflow  
checking code then uses that implicit def to generate the overflow/ 
carry check. We did it this way because we needed the generated check  
to be associated with the add in some form. If there wasn't a use of  
that implicit def, then the generated check would be hanging out and  
if a pass comes along and removes or replaces the add instruction,  
then the check would be invalid.

In a sense, the ADDO nodes are acting as an encapsulation of two  
nodes: an ADD plus an associated SETCC. Should they be more first- 
class citizens of the back-end?

-bw


From wangmp at apple.com  Wed Dec 10 21:30:15 2008
From: wangmp at apple.com (Mon P Wang)
Date: Thu, 11 Dec 2008 03:30:15 -0000
Subject: [llvm-commits] [llvm] r60869 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Message-ID: <200812110330.mBB3UGqr027087@zion.cs.uiuc.edu>

Author: wangmp
Date: Wed Dec 10 21:30:13 2008
New Revision: 60869

URL: http://llvm.org/viewvc/llvm-project?rev=60869&view=rev
Log:
Avoid generating a convert_rndsat node when the src and dest type are the same.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=60869&r1=60868&r2=60869&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Dec 10 21:30:13 2008
@@ -1140,6 +1140,10 @@
 SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy,
                                        SDValue STy, SDValue Rnd, SDValue Sat,
                                        ISD::CvtCode Code) {
+  // If the src and dest types are the same, no conversion is necessary.
+  if (DTy == STy)
+    return Val;
+
   FoldingSetNodeID ID;
   void* IP = 0;
   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))




From eli.friedman at gmail.com  Wed Dec 10 17:44:53 2008
From: eli.friedman at gmail.com (Eli Friedman)
Date: Wed, 10 Dec 2008 15:44:53 -0800
Subject: [llvm-commits] [llvm] r60857 - in /llvm/trunk:
	lib/CodeGen/SelectionDAG/DAGCombiner.cpp
	test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: <200812102236.mBAMaKQ6018412@zion.cs.uiuc.edu>
References: <200812102236.mBAMaKQ6018412@zion.cs.uiuc.edu>
Message-ID: 

On Wed, Dec 10, 2008 at 2:36 PM, Bill Wendling  wrote:
> Author: void
> Date: Wed Dec 10 16:36:00 2008
> New Revision: 60857
>
> URL: http://llvm.org/viewvc/llvm-project?rev=60857&view=rev
> Log:
> If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation on
> them. The DAG combiner expects that nodes that are transformed have one value
> result.

This approach somehow seems a little scary; I'm not completely sure,
but do we really want target-independent nodes producing
platform-specific results?  I don't think any other code does this,
and it seems like it's overloading the semantics in a dangerous way.
Is there some particular reason why you preferred this over adding
instructions like X86ISD::ADD_FLAGS for an add that sets EFLAGS?

-Eli


From clattner at apple.com  Wed Dec 10 22:35:06 2008
From: clattner at apple.com (Chris Lattner)
Date: Wed, 10 Dec 2008 20:35:06 -0800
Subject: [llvm-commits] [llvm] r60857 - in /llvm/trunk:
	lib/CodeGen/SelectionDAG/DAGCombiner.cpp	test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: 
References: <200812102236.mBAMaKQ6018412@zion.cs.uiuc.edu>
	
Message-ID: <71D0799E-82F1-4BC3-A566-CD6AE0BD393F@apple.com>


On Dec 10, 2008, at 3:44 PM, Eli Friedman wrote:

> On Wed, Dec 10, 2008 at 2:36 PM, Bill Wendling   
> wrote:
>> Author: void
>> Date: Wed Dec 10 16:36:00 2008
>> New Revision: 60857
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=60857&view=rev
>> Log:
>> If ADD, SUB, or MUL have an overflow bit that's used, don't do  
>> transformation on
>> them. The DAG combiner expects that nodes that are transformed have  
>> one value
>> result.
>
> This approach somehow seems a little scary; I'm not completely sure,
> but do we really want target-independent nodes producing
> platform-specific results?

No, we don't.

-Chris


From schlie at comcast.net  Thu Dec 11 00:02:31 2008
From: schlie at comcast.net (Paul Schlie)
Date: Thu, 11 Dec 2008 01:02:31 -0500
Subject: [llvm-commits] [llvm] r60857 - in /llvm/trunk:
 lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 test/CodeGen/X86/add-with-overflow.ll
Message-ID: 

I don't know if the following may be related to this thread; but although
it can be helpful when attempting to implement bignum or crypto code for
example, to be able explicitly access the logical carry produced by a
preceding addition operation possibly via a symbol such as "__carry"; it
would be most useful to be able to programmatically typedef arbitrarily
long 2^N extended width integer types further optionally declared as one's
complement values; which are then correspondingly naturally represented
within llvm's tree structure (as opposed to attempting to approximate them
as classes composed of arrays of integers, and then having to extrapolate
carries most likely by restricting intermediate operation precision to
extract and propagate carries as required), and thereby alternatively allow
more efficient intermediate optimization and the back-ends to map extended
precision integer and/or one's-complement types and operations to target
machine more efficiently.

Possibly enabling something like:

typedef __oint(32) ocomp32; // one's complement 32 bit integer.

ocomp32 checksum = 0;

while (count--) {
    checksum += *dp++;    // 32 bit one's complement addition.
}
...

-- or --

typedef __sint(1024) sint1024; // signed 1024 bit integer.

sint1024 a = 23334332235324312334323453233124;

a = a + a;                    // signed 1024 bit integer addition.

As just a thought, having seen nothing short of having to resort to
target specific assembly code, or accept inefficient implementation
otherwise?

(I understand that C++0x enables the definition of extended integer
precision types, but my understanding is that they most likely need
to be statically predefined in the compiler, and does not enable the
specification of one's complement types as very useful in many crypto
and com-protocol implementations).





From schlie at comcast.net  Thu Dec 11 00:51:28 2008
From: schlie at comcast.net (Paul Schlie)
Date: Thu, 11 Dec 2008 01:51:28 -0500
Subject: [llvm-commits] [llvm] r60857 - in /llvm/trunk:
 lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: 
Message-ID: 

Alternatively, if the thread is predominantly about how should state side-
effects of predominant interest to back-end mapping and their subsequent
optimization be allowed to be represented; I agree it would seem most
flexible to enable back-ends to specify all side-effects (inclusive of any
storage/condition-code registers etc.) which their instruction mappings
mutate and/or depend to be expressed, although not necessary within the
language's original semantic tree per se.  As although many architectures
increasingly shy away from implicit state inter-dependencies, it's not
unusual for more specialized architectures to heavily rely on implicit
state to affect subsequent instruction behaviors, and ideally would be
nice to generally allow their efficient specification/implementation.
(and thereby more flexibility allow generalized extended integer support).


Paul Schlie wrote:
> I don't know if the following may be related to this thread; but although
> it can be helpful when attempting to implement bignum or crypto code for
> example, to be able explicitly access the logical carry produced by a
> preceding addition operation possibly via a symbol such as "__carry"; it
> would be most useful to be able to programmatically typedef arbitrarily
> long 2^N extended width integer types further optionally declared as one's
> complement values; which are then correspondingly naturally represented
> within llvm's tree structure (as opposed to attempting to approximate them
> as classes composed of arrays of integers, and then having to extrapolate
> carries most likely by restricting intermediate operation precision to
> extract and propagate carries as required), and thereby alternatively allow
> more efficient intermediate optimization and the back-ends to map extended
> precision integer and/or one's-complement types and operations to target
> machine more efficiently.
> 
> Possibly enabling something like:
> 
> typedef __oint(32) ocomp32; // one's complement 32 bit integer.
> 
> ocomp32 checksum = 0;
> 
> while (count--) {
>     checksum += *dp++;    // 32 bit one's complement addition.
> }
> ...
> 
> -- or --
> 
> typedef __sint(1024) sint1024; // signed 1024 bit integer.
> 
> sint1024 a = 23334332235324312334323453233124;
> 
> a = a + a;                    // signed 1024 bit integer addition.
> 
> As just a thought, having seen nothing short of having to resort to
> target specific assembly code, or accept inefficient implementation
> otherwise?
> 
> (I understand that C++0x enables the definition of extended integer
> precision types, but my understanding is that they most likely need
> to be statically predefined in the compiler, and does not enable the
> specification of one's complement types as very useful in many crypto
> and com-protocol implementations).
> 




From monping at apple.com  Thu Dec 11 01:34:10 2008
From: monping at apple.com (Mon Ping Wang)
Date: Wed, 10 Dec 2008 23:34:10 -0800
Subject: [llvm-commits] Patch: mmx truncation and selects
Message-ID: <8F55D9BD-6D98-45B0-B821-84CDE9527187@apple.com>


This is a patch that fixes two issues that widening discovered for X86  
and mmx.
- For X86, we don't support SELECT v8i8 and v4i16.  This patch  
implements it the same way that SSE does.
- For X86, we could not codegen truncating a v8i16 to v8i8 (both are  
legal types).  The patch will allow legal code generation that we  
should improve on it later.

Thanks,
-- Mon Ping

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From isanbard at gmail.com  Thu Dec 11 02:23:10 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 11 Dec 2008 00:23:10 -0800
Subject: [llvm-commits] [llvm] r60857 - in /llvm/trunk:
	lib/CodeGen/SelectionDAG/DAGCombiner.cpp
	test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: 
References: <200812102236.mBAMaKQ6018412@zion.cs.uiuc.edu>
	
Message-ID: 

On Dec 10, 2008, at 3:44 PM, Eli Friedman wrote:

> On Wed, Dec 10, 2008 at 2:36 PM, Bill Wendling   
> wrote:
>> Author: void
>> Date: Wed Dec 10 16:36:00 2008
>> New Revision: 60857
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=60857&view=rev
>> Log:
>> If ADD, SUB, or MUL have an overflow bit that's used, don't do  
>> transformation on
>> them. The DAG combiner expects that nodes that are transformed have  
>> one value
>> result.
>
> This approach somehow seems a little scary; I'm not completely sure,
> but do we really want target-independent nodes producing
> platform-specific results?  I don't think any other code does this,
> and it seems like it's overloading the semantics in a dangerous way.
> Is there some particular reason why you preferred this over adding
> instructions like X86ISD::ADD_FLAGS for an add that sets EFLAGS?
>
The idea is that there be platform independent ways of calculating  
when an overflow has occurred, and rely upon target-specific lowering  
when the target can handle the flags. This is what ADDO and SUBO do.  
MULO is trickier, so it doesn't do that . . . yet.

-bw



From eli.friedman at gmail.com  Thu Dec 11 03:13:46 2008
From: eli.friedman at gmail.com (Eli Friedman)
Date: Thu, 11 Dec 2008 01:13:46 -0800
Subject: [llvm-commits] [llvm] r60857 - in /llvm/trunk:
	lib/CodeGen/SelectionDAG/DAGCombiner.cpp
	test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: 
References: <200812102236.mBAMaKQ6018412@zion.cs.uiuc.edu>
	
	
Message-ID: 

On Thu, Dec 11, 2008 at 12:23 AM, Bill Wendling  wrote:
> On Dec 10, 2008, at 3:44 PM, Eli Friedman wrote:
>
>> On Wed, Dec 10, 2008 at 2:36 PM, Bill Wendling 
>> wrote:
>>> Author: void
>>> Date: Wed Dec 10 16:36:00 2008
>>> New Revision: 60857
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=60857&view=rev
>>> Log:
>>> If ADD, SUB, or MUL have an overflow bit that's used, don't do
>>> transformation on
>>> them. The DAG combiner expects that nodes that are transformed have
>>> one value
>>> result.
>>
>> This approach somehow seems a little scary; I'm not completely sure,
>> but do we really want target-independent nodes producing
>> platform-specific results?  I don't think any other code does this,
>> and it seems like it's overloading the semantics in a dangerous way.
>> Is there some particular reason why you preferred this over adding
>> instructions like X86ISD::ADD_FLAGS for an add that sets EFLAGS?
>>
> The idea is that there be platform independent ways of calculating
> when an overflow has occurred, and rely upon target-specific lowering
> when the target can handle the flags. This is what ADDO and SUBO do.
> MULO is trickier, so it doesn't do that . . . yet.

I'm aware of all of that, and it's not really what I was asking about.
My question is, why are you using the second output value of ISD::ADD?
 Per the platform-independent definition, the output you're using
doesn't exist; the fact that it gets lowered to the expected result
is, as far as I can tell, essentially a quirk in the way instruction
selection works.  Also, no other existing code uses a pattern like
this.

-Eli


From foldr at codedgers.com  Thu Dec 11 04:34:40 2008
From: foldr at codedgers.com (Mikhail Glushenkov)
Date: Thu, 11 Dec 2008 10:34:40 -0000
Subject: [llvm-commits] [llvm] r60871 -
	/llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp
Message-ID: <200812111034.mBBAYjD2017265@zion.cs.uiuc.edu>

Author: foldr
Date: Thu Dec 11 04:34:18 2008
New Revision: 60871

URL: http://llvm.org/viewvc/llvm-project?rev=60871&view=rev
Log:
Put Edge* classes into anonymous namespace.

Prevents conflicts between plugins.

Modified:
    llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp

Modified: llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp?rev=60871&r1=60870&r2=60871&view=diff

==============================================================================
--- llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Thu Dec 11 04:34:18 2008
@@ -1500,7 +1500,6 @@
 void EmitPopulateLanguageMap (const RecordKeeper& Records, std::ostream& O)
 {
   // Generate code
-  O << "namespace {\n\n";
   O << "void PopulateLanguageMapLocal(LanguageMap& langMap) {\n";
 
   // Get the relevant field out of RecordKeeper
@@ -1526,7 +1525,7 @@
     }
   }
 
-  O << "}\n\n}\n\n";
+  O << "}\n\n";
 }
 
 /// IncDecWeight - Helper function passed to EmitCaseConstructHandler()
@@ -1595,7 +1594,6 @@
                                    const ToolDescriptions& ToolDescs,
                                    std::ostream& O)
 {
-  O << "namespace {\n\n";
   O << "void PopulateCompilationGraphLocal(CompilationGraph& G) {\n";
 
   for (ToolDescriptions::const_iterator B = ToolDescs.begin(),
@@ -1625,7 +1623,7 @@
     ++i;
   }
 
-  O << "}\n\n}\n\n";
+  O << "}\n\n";
 }
 
 /// ExtractHookNames - Extract the hook names from all instances of
@@ -1692,8 +1690,7 @@
 
 /// EmitRegisterPlugin - Emit code to register this plugin.
 void EmitRegisterPlugin(int Priority, std::ostream& O) {
-  O << "namespace {\n\n"
-    << "struct Plugin : public llvmc::BasePlugin {\n\n"
+  O << "struct Plugin : public llvmc::BasePlugin {\n\n"
     << Indent1 << "int Priority() const { return " << Priority << "; }\n\n"
     << Indent1 << "void PopulateLanguageMap(LanguageMap& langMap) const\n"
     << Indent1 << "{ PopulateLanguageMapLocal(langMap); }\n\n"
@@ -1702,7 +1699,7 @@
     << Indent1 << "{ PopulateCompilationGraphLocal(graph); }\n"
     << "};\n\n"
 
-    << "static llvmc::RegisterPlugin RP;\n\n}\n\n";
+    << "static llvmc::RegisterPlugin RP;\n\n";
 }
 
 /// EmitIncludes - Emit necessary #include directives and some
@@ -1811,6 +1808,8 @@
   // Emit hook declarations.
   EmitHookDeclarations(Data.ToolDescs, O);
 
+  O << "namespace {\n\n";
+
   // Emit PopulateLanguageMap() function
   // (a language map maps from file extensions to language names).
   EmitPopulateLanguageMap(Records, O);
@@ -1829,6 +1828,7 @@
   // Emit code for plugin registration.
   EmitRegisterPlugin(Data.Priority, O);
 
+  O << "} // End anonymous namespace.\n";
   // EOF
 }
 




From edwintorok at gmail.com  Thu Dec 11 04:36:16 2008
From: edwintorok at gmail.com (Torok Edwin)
Date: Thu, 11 Dec 2008 10:36:16 -0000
Subject: [llvm-commits] [llvm] r60872 - in /llvm/trunk:
 include/llvm/BasicBlock.h lib/VMCore/BasicBlock.cpp
Message-ID: <200812111036.mBBAaJ6p017324@zion.cs.uiuc.edu>

Author: edwin
Date: Thu Dec 11 04:36:07 2008
New Revision: 60872

URL: http://llvm.org/viewvc/llvm-project?rev=60872&view=rev
Log:
introduce BasicBlock::getUniquePredecessor()

Modified:
    llvm/trunk/include/llvm/BasicBlock.h
    llvm/trunk/lib/VMCore/BasicBlock.cpp

Modified: llvm/trunk/include/llvm/BasicBlock.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/BasicBlock.h?rev=60872&r1=60871&r2=60872&view=diff

==============================================================================
--- llvm/trunk/include/llvm/BasicBlock.h (original)
+++ llvm/trunk/include/llvm/BasicBlock.h Thu Dec 11 04:36:07 2008
@@ -134,6 +134,16 @@
     return const_cast(this)->getSinglePredecessor();
   }
 
+  /// getUniquePredecessor - If this basic block has a unique predecessor block,
+  /// return the block, otherwise return a null pointer.
+  /// Note that unique predecessor doesn't mean single edge, there can be 
+  /// multiple edges from the unique predecessor to this block (for example in
+  /// case of a switch statement with multiple cases having same destination).
+  BasicBlock *getUniquePredecessor();
+  const BasicBlock *getUniquePredecessor() const {
+    return const_cast(this)->getUniquePredecessor();
+  }
+
   //===--------------------------------------------------------------------===//
   /// Instruction iterator methods
   ///

Modified: llvm/trunk/lib/VMCore/BasicBlock.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/BasicBlock.cpp?rev=60872&r1=60871&r2=60872&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/BasicBlock.cpp (original)
+++ llvm/trunk/lib/VMCore/BasicBlock.cpp Thu Dec 11 04:36:07 2008
@@ -169,6 +169,25 @@
   return (PI == E) ? ThePred : 0 /*multiple preds*/;
 }
 
+/// getUniquePredecessor - If this basic block has a unique predecessor block,
+/// return the block, otherwise return a null pointer.
+/// Note that unique predecessor doesn't mean single edge, there can be 
+/// multiple edges from the unique predecessor to this block (for example in
+/// case of a switch statement with multiple cases having same destination).
+BasicBlock *BasicBlock::getUniquePredecessor() {
+  pred_iterator PI = pred_begin(this), E = pred_end(this);
+  if (PI == E) return 0; // No preds.
+  BasicBlock *PredBB = *PI;
+  ++PI;
+  for (;PI != E; ++PI) {
+    if (*PI != PredBB)
+      return 0;
+    // same predecessor appears multiple times in predecessor list,
+    // this is ok
+  }
+  return PredBB;
+}
+
 /// removePredecessor - This method is used to notify a BasicBlock that the
 /// specified Predecessor of the block is no longer able to reach it.  This is
 /// actually not used to update the Predecessor list, but is actually used to




From foldr at codedgers.com  Thu Dec 11 04:38:24 2008
From: foldr at codedgers.com (Mikhail Glushenkov)
Date: Thu, 11 Dec 2008 10:38:24 -0000
Subject: [llvm-commits] [llvm] r60873 - in /llvm/trunk:
 include/llvm/CompilerDriver/Tools.td tools/llvmc/doc/LLVMC-Reference.rst
 tools/llvmc/plugins/Base/Base.td
Message-ID: <200812111038.mBBAcV0R017416@zion.cs.uiuc.edu>

Author: foldr
Date: Thu Dec 11 04:38:06 2008
New Revision: 60873

URL: http://llvm.org/viewvc/llvm-project?rev=60873&view=rev
Log:
Merge Base.td and Tools.td.

This stuff is not used outside Base.td, and with the conversion of the
compilation graph to string-based format became much less (if at all)
useful.

Removed:
    llvm/trunk/include/llvm/CompilerDriver/Tools.td
Modified:
    llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst
    llvm/trunk/tools/llvmc/plugins/Base/Base.td

Removed: llvm/trunk/include/llvm/CompilerDriver/Tools.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CompilerDriver/Tools.td?rev=60872&view=auto

==============================================================================
--- llvm/trunk/include/llvm/CompilerDriver/Tools.td (original)
+++ llvm/trunk/include/llvm/CompilerDriver/Tools.td (removed)
@@ -1,145 +0,0 @@
-//===- Tools.td - Tools description for LLVMC2 -------------*- tablegen -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains descriptions of the various build tools run by llvmc2.
-//
-//===----------------------------------------------------------------------===//
-
-def OptList : OptionList<[
- (switch_option "emit-llvm",
-    (help "Emit LLVM .ll files instead of native object files")),
- (switch_option "E",
-    (help "Stop after the preprocessing stage, do not run the compiler")),
- (switch_option "fsyntax-only",
-    (help "Stop after checking the input for syntax errors")),
- (switch_option "opt",
-    (help "Enable opt")),
- (switch_option "S",
-    (help "Stop after compilation, do not assemble")),
- (switch_option "c",
-    (help "Compile and assemble, but do not link")),
- (switch_option "pthread",
-    (help "Enable threads")),
- (parameter_option "linker",
-    (help "Choose linker (possible values: gcc, g++)")),
- (parameter_list_option "include",
-    (help "Include the named file prior to preprocessing")),
- (prefix_list_option "I",
-    (help "Add a directory to include path")),
- (prefix_list_option "Wa,",
-    (help "Pass options to assembler")),
- (prefix_list_option "L",
-    (help "Add a directory to link path")),
- (prefix_list_option "l",
-    (help "Search a library when linking")),
- (prefix_list_option "Wl,",
-    (help "Pass options to linker"))
-]>;
-
-class llvm_gcc_based  : Tool<
-[(in_language in_lang),
- (out_language "llvm-bitcode"),
- (output_suffix "bc"),
- (cmd_line (case
-            (switch_on "E"),
-              (case (not_empty "o"),
-                    !strconcat(cmd_prefix, " -E $INFILE -o $OUTFILE"),
-                    (default),
-                    !strconcat(cmd_prefix, " -E $INFILE")),
-            (switch_on "fsyntax-only"),
-              !strconcat(cmd_prefix, " -fsyntax-only $INFILE"),
-            (and (switch_on "S"), (switch_on "emit-llvm")),
-              !strconcat(cmd_prefix, " -S $INFILE -o $OUTFILE -emit-llvm"),
-            (default),
-              !strconcat(cmd_prefix, " -c $INFILE -o $OUTFILE -emit-llvm"))),
- (actions
-     (case
-         (switch_on "E"), [(stop_compilation), (output_suffix E_ext)],
-         (and (switch_on "emit-llvm"), (switch_on "S")),
-              [(output_suffix "ll"), (stop_compilation)],
-         (and (switch_on "emit-llvm"), (switch_on "c")), (stop_compilation),
-         (switch_on "fsyntax-only"), (stop_compilation),
-         (not_empty "include"), (forward "include"),
-         (not_empty "I"), (forward "I"))),
- (sink)
-]>;
-
-def llvm_gcc_c : llvm_gcc_based<"llvm-gcc -x c", "c", "i">;
-def llvm_gcc_cpp : llvm_gcc_based<"llvm-g++ -x c++", "c++", "i">;
-def llvm_gcc_m : llvm_gcc_based<"llvm-gcc -x objective-c", "objective-c", "mi">;
-def llvm_gcc_mxx : llvm_gcc_based<"llvm-gcc -x objective-c++",
-                                  "objective-c++", "mi">;
-
-def opt : Tool<
-[(in_language "llvm-bitcode"),
- (out_language "llvm-bitcode"),
- (output_suffix "bc"),
- (cmd_line "opt -f $INFILE -o $OUTFILE")
-]>;
-
-def llvm_as : Tool<
-[(in_language "llvm-assembler"),
- (out_language "llvm-bitcode"),
- (output_suffix "bc"),
- (cmd_line "llvm-as $INFILE -o $OUTFILE")
-]>;
-
-def llvm_gcc_assembler : Tool<
-[(in_language "assembler"),
- (out_language "object-code"),
- (output_suffix "o"),
- (cmd_line "llvm-gcc -c -x assembler $INFILE -o $OUTFILE"),
- (actions (case
-          (switch_on "c"), (stop_compilation),
-          (not_empty "Wa,"), (unpack_values "Wa,")))
-]>;
-
-def llc : Tool<
-[(in_language "llvm-bitcode"),
- (out_language "assembler"),
- (output_suffix "s"),
- (cmd_line "llc -relocation-model=pic -f $INFILE -o $OUTFILE"),
- (actions (case (switch_on "S"), (stop_compilation)))
-]>;
-
-// Base class for linkers
-class llvm_gcc_based_linker  : Tool<
-[(in_language "object-code"),
- (out_language "executable"),
- (output_suffix "out"),
- (cmd_line !strconcat(cmd_prefix, " $INFILE -o $OUTFILE")),
- (join),
- (actions (case
-          (switch_on "pthread"), (append_cmd "-lpthread"),
-          (not_empty "L"), (forward "L"),
-          (not_empty "l"), (forward "l"),
-          (not_empty "Wl,"), (unpack_values "Wl,")))
-]>;
-
-// Default linker
-def llvm_gcc_linker : llvm_gcc_based_linker<"llvm-gcc">;
-// Alternative linker for C++
-def llvm_gcc_cpp_linker : llvm_gcc_based_linker<"llvm-g++">;
-
-// Language map
-
-def LanguageMap : LanguageMap<
-    [LangToSuffixes<"c++", ["cc", "cp", "cxx", "cpp", "CPP", "c++", "C"]>,
-     LangToSuffixes<"c", ["c"]>,
-     LangToSuffixes<"c-cpp-output", ["i"]>,
-     LangToSuffixes<"objective-c-cpp-output", ["mi"]>,
-     LangToSuffixes<"objective-c++", ["mm"]>,
-     LangToSuffixes<"objective-c", ["m"]>,
-     LangToSuffixes<"assembler", ["s"]>,
-     LangToSuffixes<"assembler-with-cpp", ["S"]>,
-     LangToSuffixes<"llvm-assembler", ["ll"]>,
-     LangToSuffixes<"llvm-bitcode", ["bc"]>,
-     LangToSuffixes<"object-code", ["o"]>,
-     LangToSuffixes<"executable", ["out"]>
-     ]>;

Modified: llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst?rev=60873&r1=60872&r2=60873&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst (original)
+++ llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst Thu Dec 11 04:38:06 2008
@@ -158,9 +158,6 @@
 definitions::
 
    include "llvm/CompilerDriver/Common.td"
-   // And optionally:
-   // include "llvm/CompilerDriver/Tools.td"
-   // which contains some useful tool definitions.
 
 Internally, LLVMC stores information about possible source
 transformations in form of a graph. Nodes in this graph represent

Modified: llvm/trunk/tools/llvmc/plugins/Base/Base.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/plugins/Base/Base.td?rev=60873&r1=60872&r2=60873&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/plugins/Base/Base.td (original)
+++ llvm/trunk/tools/llvmc/plugins/Base/Base.td Thu Dec 11 04:38:06 2008
@@ -12,9 +12,145 @@
 //===----------------------------------------------------------------------===//
 
 include "llvm/CompilerDriver/Common.td"
-include "llvm/CompilerDriver/Tools.td"
 
-// Toolchains
+// Options
+
+def OptList : OptionList<[
+ (switch_option "emit-llvm",
+    (help "Emit LLVM .ll files instead of native object files")),
+ (switch_option "E",
+    (help "Stop after the preprocessing stage, do not run the compiler")),
+ (switch_option "fsyntax-only",
+    (help "Stop after checking the input for syntax errors")),
+ (switch_option "opt",
+    (help "Enable opt")),
+ (switch_option "S",
+    (help "Stop after compilation, do not assemble")),
+ (switch_option "c",
+    (help "Compile and assemble, but do not link")),
+ (switch_option "pthread",
+    (help "Enable threads")),
+ (parameter_option "linker",
+    (help "Choose linker (possible values: gcc, g++)")),
+ (parameter_list_option "include",
+    (help "Include the named file prior to preprocessing")),
+ (prefix_list_option "I",
+    (help "Add a directory to include path")),
+ (prefix_list_option "Wa,",
+    (help "Pass options to assembler")),
+ (prefix_list_option "L",
+    (help "Add a directory to link path")),
+ (prefix_list_option "l",
+    (help "Search a library when linking")),
+ (prefix_list_option "Wl,",
+    (help "Pass options to linker"))
+]>;
+
+// Tools
+
+class llvm_gcc_based  : Tool<
+[(in_language in_lang),
+ (out_language "llvm-bitcode"),
+ (output_suffix "bc"),
+ (cmd_line (case
+            (switch_on "E"),
+              (case (not_empty "o"),
+                    !strconcat(cmd_prefix, " -E $INFILE -o $OUTFILE"),
+                    (default),
+                    !strconcat(cmd_prefix, " -E $INFILE")),
+            (switch_on "fsyntax-only"),
+              !strconcat(cmd_prefix, " -fsyntax-only $INFILE"),
+            (and (switch_on "S"), (switch_on "emit-llvm")),
+              !strconcat(cmd_prefix, " -S $INFILE -o $OUTFILE -emit-llvm"),
+            (default),
+              !strconcat(cmd_prefix, " -c $INFILE -o $OUTFILE -emit-llvm"))),
+ (actions
+     (case
+         (switch_on "E"), [(stop_compilation), (output_suffix E_ext)],
+         (and (switch_on "emit-llvm"), (switch_on "S")),
+              [(output_suffix "ll"), (stop_compilation)],
+         (and (switch_on "emit-llvm"), (switch_on "c")), (stop_compilation),
+         (switch_on "fsyntax-only"), (stop_compilation),
+         (not_empty "include"), (forward "include"),
+         (not_empty "I"), (forward "I"))),
+ (sink)
+]>;
+
+def llvm_gcc_c : llvm_gcc_based<"llvm-gcc -x c", "c", "i">;
+def llvm_gcc_cpp : llvm_gcc_based<"llvm-g++ -x c++", "c++", "i">;
+def llvm_gcc_m : llvm_gcc_based<"llvm-gcc -x objective-c", "objective-c", "mi">;
+def llvm_gcc_mxx : llvm_gcc_based<"llvm-gcc -x objective-c++",
+                                  "objective-c++", "mi">;
+
+def opt : Tool<
+[(in_language "llvm-bitcode"),
+ (out_language "llvm-bitcode"),
+ (output_suffix "bc"),
+ (cmd_line "opt -f $INFILE -o $OUTFILE")
+]>;
+
+def llvm_as : Tool<
+[(in_language "llvm-assembler"),
+ (out_language "llvm-bitcode"),
+ (output_suffix "bc"),
+ (cmd_line "llvm-as $INFILE -o $OUTFILE")
+]>;
+
+def llvm_gcc_assembler : Tool<
+[(in_language "assembler"),
+ (out_language "object-code"),
+ (output_suffix "o"),
+ (cmd_line "llvm-gcc -c -x assembler $INFILE -o $OUTFILE"),
+ (actions (case
+          (switch_on "c"), (stop_compilation),
+          (not_empty "Wa,"), (unpack_values "Wa,")))
+]>;
+
+def llc : Tool<
+[(in_language "llvm-bitcode"),
+ (out_language "assembler"),
+ (output_suffix "s"),
+ (cmd_line "llc -relocation-model=pic -f $INFILE -o $OUTFILE"),
+ (actions (case (switch_on "S"), (stop_compilation)))
+]>;
+
+// Base class for linkers
+class llvm_gcc_based_linker  : Tool<
+[(in_language "object-code"),
+ (out_language "executable"),
+ (output_suffix "out"),
+ (cmd_line !strconcat(cmd_prefix, " $INFILE -o $OUTFILE")),
+ (join),
+ (actions (case
+          (switch_on "pthread"), (append_cmd "-lpthread"),
+          (not_empty "L"), (forward "L"),
+          (not_empty "l"), (forward "l"),
+          (not_empty "Wl,"), (unpack_values "Wl,")))
+]>;
+
+// Default linker
+def llvm_gcc_linker : llvm_gcc_based_linker<"llvm-gcc">;
+// Alternative linker for C++
+def llvm_gcc_cpp_linker : llvm_gcc_based_linker<"llvm-g++">;
+
+// Language map
+
+def LanguageMap : LanguageMap<
+    [LangToSuffixes<"c++", ["cc", "cp", "cxx", "cpp", "CPP", "c++", "C"]>,
+     LangToSuffixes<"c", ["c"]>,
+     LangToSuffixes<"c-cpp-output", ["i"]>,
+     LangToSuffixes<"objective-c-cpp-output", ["mi"]>,
+     LangToSuffixes<"objective-c++", ["mm"]>,
+     LangToSuffixes<"objective-c", ["m"]>,
+     LangToSuffixes<"assembler", ["s"]>,
+     LangToSuffixes<"assembler-with-cpp", ["S"]>,
+     LangToSuffixes<"llvm-assembler", ["ll"]>,
+     LangToSuffixes<"llvm-bitcode", ["bc"]>,
+     LangToSuffixes<"object-code", ["o"]>,
+     LangToSuffixes<"executable", ["out"]>
+     ]>;
+
+// Compilation graph
 
 def CompilationGraph : CompilationGraph<[
     Edge<"root", "llvm_gcc_c">,




From baldrick at free.fr  Thu Dec 11 05:24:38 2008
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 11 Dec 2008 12:24:38 +0100
Subject: [llvm-commits] [llvm] r60872 - in /llvm/trunk:
	include/llvm/BasicBlock.h lib/VMCore/BasicBlock.cpp
In-Reply-To: <200812111036.mBBAaJ6p017324@zion.cs.uiuc.edu>
References: <200812111036.mBBAaJ6p017324@zion.cs.uiuc.edu>
Message-ID: <200812111224.39078.baldrick@free.fr>


Hi Edwin,

> +  /// multiple edges from the unique predecessor to this block (for example in
> +  /// case of a switch statement with multiple cases having same destination).

having same destination -> having the same destination
Likewise below.

> +    // same predecessor appears multiple times in predecessor list,
> +    // this is ok

-> The same predecessor appears multiple times in the predecessor list.
This is OK.

Ciao,

Duncan.


From edwintorok at gmail.com  Thu Dec 11 05:45:14 2008
From: edwintorok at gmail.com (Torok Edwin)
Date: Thu, 11 Dec 2008 11:45:14 -0000
Subject: [llvm-commits] [llvm] r60875 - in /llvm/trunk:
 include/llvm/BasicBlock.h lib/VMCore/BasicBlock.cpp
Message-ID: <200812111145.mBBBjI4J019533@zion.cs.uiuc.edu>

Author: edwin
Date: Thu Dec 11 05:44:49 2008
New Revision: 60875

URL: http://llvm.org/viewvc/llvm-project?rev=60875&view=rev
Log:
fix grammar, thanks Duncan!

Modified:
    llvm/trunk/include/llvm/BasicBlock.h
    llvm/trunk/lib/VMCore/BasicBlock.cpp

Modified: llvm/trunk/include/llvm/BasicBlock.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/BasicBlock.h?rev=60875&r1=60874&r2=60875&view=diff

==============================================================================
--- llvm/trunk/include/llvm/BasicBlock.h (original)
+++ llvm/trunk/include/llvm/BasicBlock.h Thu Dec 11 05:44:49 2008
@@ -137,8 +137,8 @@
   /// getUniquePredecessor - If this basic block has a unique predecessor block,
   /// return the block, otherwise return a null pointer.
   /// Note that unique predecessor doesn't mean single edge, there can be 
-  /// multiple edges from the unique predecessor to this block (for example in
-  /// case of a switch statement with multiple cases having same destination).
+  /// multiple edges from the unique predecessor to this block (for example 
+  /// a switch statement with multiple cases having the same destination).
   BasicBlock *getUniquePredecessor();
   const BasicBlock *getUniquePredecessor() const {
     return const_cast(this)->getUniquePredecessor();

Modified: llvm/trunk/lib/VMCore/BasicBlock.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/BasicBlock.cpp?rev=60875&r1=60874&r2=60875&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/BasicBlock.cpp (original)
+++ llvm/trunk/lib/VMCore/BasicBlock.cpp Thu Dec 11 05:44:49 2008
@@ -172,8 +172,8 @@
 /// getUniquePredecessor - If this basic block has a unique predecessor block,
 /// return the block, otherwise return a null pointer.
 /// Note that unique predecessor doesn't mean single edge, there can be 
-/// multiple edges from the unique predecessor to this block (for example in
-/// case of a switch statement with multiple cases having same destination).
+/// multiple edges from the unique predecessor to this block (for example 
+/// a switch statement with multiple cases having the same destination).
 BasicBlock *BasicBlock::getUniquePredecessor() {
   pred_iterator PI = pred_begin(this), E = pred_end(this);
   if (PI == E) return 0; // No preds.
@@ -182,8 +182,8 @@
   for (;PI != E; ++PI) {
     if (*PI != PredBB)
       return 0;
-    // same predecessor appears multiple times in predecessor list,
-    // this is ok
+    // The same predecessor appears multiple times in the predecessor list.
+    // This is OK.
   }
   return PredBB;
 }




From edwintorok at gmail.com  Thu Dec 11 05:46:08 2008
From: edwintorok at gmail.com (=?ISO-8859-1?Q?T=F6r=F6k_Edwin?=)
Date: Thu, 11 Dec 2008 13:46:08 +0200
Subject: [llvm-commits] [llvm] r60872 - in /llvm/trunk:
 include/llvm/BasicBlock.h lib/VMCore/BasicBlock.cpp
In-Reply-To: <200812111224.39078.baldrick@free.fr>
References: <200812111036.mBBAaJ6p017324@zion.cs.uiuc.edu>
	<200812111224.39078.baldrick@free.fr>
Message-ID: <4940FD80.60407@gmail.com>

On 2008-12-11 13:24, Duncan Sands wrote:
> Hi Edwin,
>
>   
>> +  /// multiple edges from the unique predecessor to this block (for example in
>> +  /// case of a switch statement with multiple cases having same destination).
>>     
>
> having same destination -> having the same destination
> Likewise below.
>
>   
>> +    // same predecessor appears multiple times in predecessor list,
>> +    // this is ok
>>     
>
> -> The same predecessor appears multiple times in the predecessor list.
> This is OK.
>   

Thanks, fixed.

Best regards,
--Edwin


From edwintorok at gmail.com  Thu Dec 11 05:55:03 2008
From: edwintorok at gmail.com (=?ISO-8859-1?Q?T=F6r=F6k_Edwin?=)
Date: Thu, 11 Dec 2008 13:55:03 +0200
Subject: [llvm-commits] [PATCH] Debug info utilities and printer pass
In-Reply-To: 
References: <4940122B.5040005@gmail.com>
	
	
Message-ID: <4940FF97.30204@gmail.com>

On 2008-12-11 04:13, Chris Lattner wrote:
> On Dec 10, 2008, at 1:13 PM, Devang Patel wrote:
>>> 02-intrin.patch:
>>> Introduce DbgFuncStart::getDisplayName() (which refers to unmangled C
>>> ++
>>> name!), and DbgDeclareInst::getVariableName()
>>> Introduce include/llvm/Support/DebugInfo.h:
>>
>> We already have include/llvm/Analysis/DebugInfo.h, so I suggest that
>> you use another name for this new header.
>
> More strongly, why do we need this new code when we have
> llvm/Analysis/Debuginfo.h?  What does this do that
> llvm/Analysis/DebugInfo doesn't, or shouldn't do?

llvm/Analysis/DebugInfo.h doesn't search for the debug info, you have to
give it that as a parameter to the constructor.
My functions search for the llvm.dbg.stoppoint given an
Instruction*/BasicBlock*, and for llvm.dbg.declare given a Value*.
> I'd really rather make Analysis/DebugInfo.h better rather than
> introduce a new parallel way to analyze debug info.

I moved the functions to include/llvm/Analysis/DebugInfo.h, see
02-dbginfo-utils.patch.

Attachments:
01-dbginfo.patch:
-  fix getFieldAs(), it was always looking at field 6, instead of Elt!
-  DIVariable.getType() was leading to linker error: undefined reference
to DIType::DIType(GlobalVariable *GV), define the constructor

02-dbginfo-utils.patch:
- in my previous patch this was include/llvm/Support/DebugInfo.h, it
introduces:
- findStopPoint
- findBBStopPoint
- findDbgDeclare

03-pass.patch:
- the -print-dbginfo pass from my previous email, now it uses
llvm/Analysis/DebugInfo.h
- caveats: derived types are printed as "", no testcase (should I add one?)

Best regards,
--Edwin
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From echeng at apple.com  Thu Dec 11 11:08:14 2008
From: echeng at apple.com (Evan Cheng)
Date: Thu, 11 Dec 2008 09:08:14 -0800
Subject: [llvm-commits] [llvm] r60857 - in /llvm/trunk:
	lib/CodeGen/SelectionDAG/DAGCombiner.cpp	test/CodeGen/X86/add-with-overflow.ll
In-Reply-To: 
References: <200812102236.mBAMaKQ6018412@zion.cs.uiuc.edu>
	
	
	
Message-ID: 


On Dec 11, 2008, at 1:13 AM, Eli Friedman wrote:

> On Thu, Dec 11, 2008 at 12:23 AM, Bill Wendling   
> wrote:
>> On Dec 10, 2008, at 3:44 PM, Eli Friedman wrote:
>>
>>> On Wed, Dec 10, 2008 at 2:36 PM, Bill Wendling 
>>> wrote:
>>>> Author: void
>>>> Date: Wed Dec 10 16:36:00 2008
>>>> New Revision: 60857
>>>>
>>>> URL: http://llvm.org/viewvc/llvm-project?rev=60857&view=rev
>>>> Log:
>>>> If ADD, SUB, or MUL have an overflow bit that's used, don't do
>>>> transformation on
>>>> them. The DAG combiner expects that nodes that are transformed have
>>>> one value
>>>> result.
>>>
>>> This approach somehow seems a little scary; I'm not completely sure,
>>> but do we really want target-independent nodes producing
>>> platform-specific results?  I don't think any other code does this,
>>> and it seems like it's overloading the semantics in a dangerous way.
>>> Is there some particular reason why you preferred this over adding
>>> instructions like X86ISD::ADD_FLAGS for an add that sets EFLAGS?
>>>
>> The idea is that there be platform independent ways of calculating
>> when an overflow has occurred, and rely upon target-specific lowering
>> when the target can handle the flags. This is what ADDO and SUBO do.
>> MULO is trickier, so it doesn't do that . . . yet.
>
> I'm aware of all of that, and it's not really what I was asking about.
> My question is, why are you using the second output value of ISD::ADD?
> Per the platform-independent definition, the output you're using
> doesn't exist; the fact that it gets lowered to the expected result
> is, as far as I can tell, essentially a quirk in the way instruction
> selection works.  Also, no other existing code uses a pattern like
> this.

We're going to fix this soon.

Evan

>
>
> -Eli
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From brukman+llvm at gmail.com  Thu Dec 11 11:13:05 2008
From: brukman+llvm at gmail.com (Misha Brukman)
Date: Thu, 11 Dec 2008 17:13:05 -0000
Subject: [llvm-commits] [llvm] r60879 -
	/llvm/trunk/docs/CommandGuide/index.html
Message-ID: <200812111713.mBBHD7f1029678@zion.cs.uiuc.edu>

Author: brukman
Date: Thu Dec 11 11:12:52 2008
New Revision: 60879

URL: http://llvm.org/viewvc/llvm-project?rev=60879&view=rev
Log:
* Fixed formatting of command descriptions to be consistent:
  - descriptions on new line
  - no terminating period
* Changed the W3C logos from yellow to blue to not stand out

Modified:
    llvm/trunk/docs/CommandGuide/index.html

Modified: llvm/trunk/docs/CommandGuide/index.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/index.html?rev=60879&r1=60878&r2=60879&view=diff

==============================================================================
--- llvm/trunk/docs/CommandGuide/index.html (original)
+++ llvm/trunk/docs/CommandGuide/index.html Thu Dec 11 11:12:52 2008
@@ -64,13 +64,13 @@
     format raw `llvmprof.out' data into a human-readable report
 
 llvm-ld -
-  general purpose linker with loadable runtime optimization support
+    general purpose linker with loadable runtime optimization support
 
 llvm-config -
-  print out LLVM compilation options, libraries, etc. as configured.
+    print out LLVM compilation options, libraries, etc. as configured
 
-llvmc - a generic
-customizable compiler driver.
+llvmc -
+    a generic customizable compiler driver
 
 
 
@@ -139,9 +139,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   LLVM Compiler Infrastructure

   Last modified: $Date$




From brukman+llvm at gmail.com  Thu Dec 11 11:35:00 2008
From: brukman+llvm at gmail.com (Misha Brukman)
Date: Thu, 11 Dec 2008 17:35:00 -0000
Subject: [llvm-commits] [llvm] r60880 - /llvm/trunk/docs/
Message-ID: <200812111735.mBBHZ4Qq030556@zion.cs.uiuc.edu>

Author: brukman
Date: Thu Dec 11 11:34:48 2008
New Revision: 60880

URL: http://llvm.org/viewvc/llvm-project?rev=60880&view=rev
Log:
Global replace of yellow W3C "valid HTML/CSS" icons with blue ones.

Modified:
    llvm/trunk/docs/AliasAnalysis.html
    llvm/trunk/docs/BitCodeFormat.html
    llvm/trunk/docs/Bugpoint.html
    llvm/trunk/docs/CFEBuildInstrs.html
    llvm/trunk/docs/CMake.html
    llvm/trunk/docs/CodeGenerator.html
    llvm/trunk/docs/CodingStandards.html
    llvm/trunk/docs/CommandLine.html
    llvm/trunk/docs/CompilerDriver.html
    llvm/trunk/docs/CompilerWriterInfo.html
    llvm/trunk/docs/DeveloperPolicy.html
    llvm/trunk/docs/ExceptionHandling.html
    llvm/trunk/docs/ExtendingLLVM.html
    llvm/trunk/docs/FAQ.html
    llvm/trunk/docs/GCCFEBuildInstrs.html
    llvm/trunk/docs/GarbageCollection.html
    llvm/trunk/docs/GetElementPtr.html
    llvm/trunk/docs/GettingStarted.html
    llvm/trunk/docs/GettingStartedVS.html
    llvm/trunk/docs/HowToReleaseLLVM.html
    llvm/trunk/docs/HowToSubmitABug.html
    llvm/trunk/docs/LangRef.html
    llvm/trunk/docs/Lexicon.html
    llvm/trunk/docs/LinkTimeOptimization.html
    llvm/trunk/docs/MakefileGuide.html
    llvm/trunk/docs/Passes.html
    llvm/trunk/docs/ProgrammersManual.html
    llvm/trunk/docs/Projects.html
    llvm/trunk/docs/ReleaseNotes.html
    llvm/trunk/docs/SourceLevelDebugging.html
    llvm/trunk/docs/SystemLibrary.html
    llvm/trunk/docs/TableGenFundamentals.html
    llvm/trunk/docs/TestingGuide.html
    llvm/trunk/docs/UsingLibraries.html
    llvm/trunk/docs/WritingAnLLVMBackend.html
    llvm/trunk/docs/WritingAnLLVMPass.html
    llvm/trunk/docs/index.html

Modified: llvm/trunk/docs/AliasAnalysis.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/AliasAnalysis.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/AliasAnalysis.html (original)
+++ llvm/trunk/docs/AliasAnalysis.html Thu Dec 11 11:34:48 2008
@@ -971,9 +971,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   Chris Lattner

   LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/BitCodeFormat.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/BitCodeFormat.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/BitCodeFormat.html (original)
+++ llvm/trunk/docs/BitCodeFormat.html Thu Dec 11 11:34:48 2008
@@ -678,9 +678,9 @@
 
 
  
+ src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
 
+ src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
  Chris Lattner

 The LLVM Compiler Infrastructure

 Last modified: $Date$

Modified: llvm/trunk/docs/Bugpoint.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/Bugpoint.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/Bugpoint.html (original)
+++ llvm/trunk/docs/Bugpoint.html Thu Dec 11 11:34:48 2008
@@ -226,9 +226,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   Chris Lattner

   LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/CFEBuildInstrs.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CFEBuildInstrs.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/CFEBuildInstrs.html (original)
+++ llvm/trunk/docs/CFEBuildInstrs.html Thu Dec 11 11:34:48 2008
@@ -17,9 +17,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   LLVM Compiler Infrastructure

   Last modified: $Date: 2008-02-13 17:46:10 +0100 (Wed, 13 Feb 2008) $

Modified: llvm/trunk/docs/CMake.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CMake.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/CMake.html (original)
+++ llvm/trunk/docs/CMake.html Thu Dec 11 11:34:48 2008
@@ -309,9 +309,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   Oscar Fuentes

   LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/CodeGenerator.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodeGenerator.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/CodeGenerator.html (original)
+++ llvm/trunk/docs/CodeGenerator.html Thu Dec 11 11:34:48 2008
@@ -2029,9 +2029,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01" />
 
   Chris Lattner

   The LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/CodingStandards.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodingStandards.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/CodingStandards.html (original)
+++ llvm/trunk/docs/CodingStandards.html Thu Dec 11 11:34:48 2008
@@ -793,9 +793,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   Chris Lattner

   LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/CommandLine.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandLine.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/CommandLine.html (original)
+++ llvm/trunk/docs/CommandLine.html Thu Dec 11 11:34:48 2008
@@ -1957,9 +1957,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   Chris Lattner

   LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/CompilerDriver.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerDriver.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/CompilerDriver.html (original)
+++ llvm/trunk/docs/CompilerDriver.html Thu Dec 11 11:34:48 2008
@@ -410,7 +410,7 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS" />
   
   The LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/CompilerWriterInfo.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerWriterInfo.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/CompilerWriterInfo.html (original)
+++ llvm/trunk/docs/CompilerWriterInfo.html Thu Dec 11 11:34:48 2008
@@ -250,9 +250,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   Misha Brukman

   LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/DeveloperPolicy.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/DeveloperPolicy.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/DeveloperPolicy.html (original)
+++ llvm/trunk/docs/DeveloperPolicy.html Thu Dec 11 11:34:48 2008
@@ -563,9 +563,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01" />
   Written by the 
   LLVM Oversight Group

   The LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/ExceptionHandling.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ExceptionHandling.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/ExceptionHandling.html (original)
+++ llvm/trunk/docs/ExceptionHandling.html Thu Dec 11 11:34:48 2008
@@ -465,9 +465,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   Chris Lattner

   LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/ExtendingLLVM.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ExtendingLLVM.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/ExtendingLLVM.html (original)
+++ llvm/trunk/docs/ExtendingLLVM.html Thu Dec 11 11:34:48 2008
@@ -378,9 +378,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01" />
 
   The LLVM Compiler Infrastructure
   


Modified: llvm/trunk/docs/FAQ.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/FAQ.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/FAQ.html (original)
+++ llvm/trunk/docs/FAQ.html Thu Dec 11 11:34:48 2008
@@ -723,9 +723,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   LLVM Compiler Infrastructure

   Last modified: $Date$

Modified: llvm/trunk/docs/GCCFEBuildInstrs.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GCCFEBuildInstrs.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/GCCFEBuildInstrs.html (original)
+++ llvm/trunk/docs/GCCFEBuildInstrs.html Thu Dec 11 11:34:48 2008
@@ -261,9 +261,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   LLVM Compiler Infrastructure

   Last modified: $Date$

Modified: llvm/trunk/docs/GarbageCollection.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GarbageCollection.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/GarbageCollection.html (original)
+++ llvm/trunk/docs/GarbageCollection.html Thu Dec 11 11:34:48 2008
@@ -1433,9 +1433,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   Chris Lattner

   LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/GetElementPtr.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GetElementPtr.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/GetElementPtr.html (original)
+++ llvm/trunk/docs/GetElementPtr.html Thu Dec 11 11:34:48 2008
@@ -360,9 +360,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01" />
   The LLVM Compiler Infrastructure

   Last modified: $Date$
 

Modified: llvm/trunk/docs/GettingStarted.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GettingStarted.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/GettingStarted.html (original)
+++ llvm/trunk/docs/GettingStarted.html Thu Dec 11 11:34:48 2008
@@ -1636,9 +1636,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01" />
 
   Chris Lattner

   Reid Spencer


Modified: llvm/trunk/docs/GettingStartedVS.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GettingStartedVS.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/GettingStartedVS.html (original)
+++ llvm/trunk/docs/GettingStartedVS.html Thu Dec 11 11:34:48 2008
@@ -399,9 +399,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01" />
 
   Jeff Cohen

   The LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/HowToReleaseLLVM.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/HowToReleaseLLVM.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/HowToReleaseLLVM.html (original)
+++ llvm/trunk/docs/HowToReleaseLLVM.html Thu Dec 11 11:34:48 2008
@@ -589,9 +589,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01" />
   The LLVM Compiler Infrastructure
   

   Last modified: $Date$

Modified: llvm/trunk/docs/HowToSubmitABug.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/HowToSubmitABug.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/HowToSubmitABug.html (original)
+++ llvm/trunk/docs/HowToSubmitABug.html Thu Dec 11 11:34:48 2008
@@ -341,9 +341,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01" />
 
   Chris Lattner

   The LLVM Compiler Infrastructure

Modified: llvm/trunk/docs/LangRef.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/LangRef.html (original)
+++ llvm/trunk/docs/LangRef.html Thu Dec 11 11:34:48 2008
@@ -6497,9 +6497,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   Chris Lattner

   The LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/Lexicon.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/Lexicon.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/Lexicon.html (original)
+++ llvm/trunk/docs/Lexicon.html Thu Dec 11 11:34:48 2008
@@ -250,9 +250,9 @@
 
 
  The LLVM Team

 The LLVM Compiler Infrastructure

 Last modified: $Date$

Modified: llvm/trunk/docs/LinkTimeOptimization.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LinkTimeOptimization.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/LinkTimeOptimization.html (original)
+++ llvm/trunk/docs/LinkTimeOptimization.html Thu Dec 11 11:34:48 2008
@@ -342,9 +342,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   Devang Patel and Nick Kledzik

   LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/MakefileGuide.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/MakefileGuide.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/MakefileGuide.html (original)
+++ llvm/trunk/docs/MakefileGuide.html Thu Dec 11 11:34:48 2008
@@ -1029,9 +1029,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01" />
 
   Reid Spencer

   The LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/Passes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/Passes.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/Passes.html (original)
+++ llvm/trunk/docs/Passes.html Thu Dec 11 11:34:48 2008
@@ -1957,9 +1957,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   Reid Spencer

   LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/ProgrammersManual.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ProgrammersManual.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/ProgrammersManual.html (original)
+++ llvm/trunk/docs/ProgrammersManual.html Thu Dec 11 11:34:48 2008
@@ -3411,7 +3411,7 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
 

Modified: llvm/trunk/docs/Projects.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/Projects.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/Projects.html (original)
+++ llvm/trunk/docs/Projects.html Thu Dec 11 11:34:48 2008
@@ -446,9 +446,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01" />
 
   John Criswell

   The LLVM Compiler Infrastructure

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Thu Dec 11 11:34:48 2008
@@ -891,9 +891,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   LLVM Compiler Infrastructure

   Last modified: $Date$

Modified: llvm/trunk/docs/SourceLevelDebugging.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/SourceLevelDebugging.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/SourceLevelDebugging.html (original)
+++ llvm/trunk/docs/SourceLevelDebugging.html Thu Dec 11 11:34:48 2008
@@ -1790,9 +1790,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   Chris Lattner

   LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/SystemLibrary.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/SystemLibrary.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/SystemLibrary.html (original)
+++ llvm/trunk/docs/SystemLibrary.html Thu Dec 11 11:34:48 2008
@@ -332,9 +332,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   Reid Spencer

   LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/TableGenFundamentals.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/TableGenFundamentals.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/TableGenFundamentals.html (original)
+++ llvm/trunk/docs/TableGenFundamentals.html Thu Dec 11 11:34:48 2008
@@ -740,9 +740,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   Chris Lattner

   LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/TestingGuide.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/TestingGuide.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/TestingGuide.html (original)
+++ llvm/trunk/docs/TestingGuide.html Thu Dec 11 11:34:48 2008
@@ -951,9 +951,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   John T. Criswell, Reid Spencer, and Tanya Lattner

   The LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/UsingLibraries.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/UsingLibraries.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/UsingLibraries.html (original)
+++ llvm/trunk/docs/UsingLibraries.html Thu Dec 11 11:34:48 2008
@@ -436,9 +436,9 @@
 
 
   
+    src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"/>
   
+    src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01" />
   Reid Spencer
 
 The LLVM Compiler Infrastructure 

Modified: llvm/trunk/docs/WritingAnLLVMBackend.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/WritingAnLLVMBackend.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/WritingAnLLVMBackend.html (original)
+++ llvm/trunk/docs/WritingAnLLVMBackend.html Thu Dec 11 11:34:48 2008
@@ -2148,9 +2148,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   Mason Woo and Misha Brukman

   The LLVM Compiler Infrastructure

Modified: llvm/trunk/docs/WritingAnLLVMPass.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/WritingAnLLVMPass.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/WritingAnLLVMPass.html (original)
+++ llvm/trunk/docs/WritingAnLLVMPass.html Thu Dec 11 11:34:48 2008
@@ -1813,9 +1813,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01" />
 
   Chris Lattner

   The LLVM Compiler Infrastructure


Modified: llvm/trunk/docs/index.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/index.html?rev=60880&r1=60879&r2=60880&view=diff

==============================================================================
--- llvm/trunk/docs/index.html (original)
+++ llvm/trunk/docs/index.html Thu Dec 11 11:34:48 2008
@@ -265,9 +265,9 @@
 
 
   
+  src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS">
   
+  src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01">
 
   LLVM Compiler Infrastructure

   Last modified: $Date$




From nicholas at mxc.ca  Thu Dec 11 11:40:17 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Thu, 11 Dec 2008 17:40:17 -0000
Subject: [llvm-commits] [llvm] r60881 - in /llvm/trunk:
 lib/Analysis/ScalarEvolution.cpp
 test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll
 test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll
Message-ID: <200812111740.mBBHeJW0030720@zion.cs.uiuc.edu>

Author: nicholas
Date: Thu Dec 11 11:40:14 2008
New Revision: 60881

URL: http://llvm.org/viewvc/llvm-project?rev=60881&view=rev
Log:
Sneaky, sneaky: move the -1 to the outside of the SMax. Reinstate the
optimization of SGE/SLE with unit stride, now that it works properly.

Added:
    llvm/trunk/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll
Modified:
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp
    llvm/trunk/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=60881&r1=60880&r2=60881&view=diff

==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Thu Dec 11 11:40:14 2008
@@ -2924,8 +2924,12 @@
   if (!R)
     return true;
 
-  if (isSigned)
+  if (isSigned) {
+    if (SC->getValue()->isOne())
+      return R->getValue()->isMaxValue(true);
+
     return true;  // XXX: because we don't have an sdiv scev.
+  }
 
   // If negative, it wraps around every iteration, but we don't care about that.
   APInt S = SC->getValue()->getValue().abs();
@@ -2971,14 +2975,6 @@
     // run (m-n)/s times.
     SCEVHandle End = RHS;
 
-    if (!executesAtLeastOnce(L, isSigned, trueWhenEqual,
-                             SE.getMinusSCEV(Start, One), RHS)) {
-      // If not, we get the value of the LHS in the first iteration in which
-      // the above condition doesn't hold.  This equals to max(m,n).
-      End = isSigned ? SE.getSMaxExpr(RHS, Start)
-                     : SE.getUMaxExpr(RHS, Start);
-    }
-
     // If the expression is less-than-or-equal to, we need to extend the
     // loop by one iteration.
     //
@@ -2987,12 +2983,16 @@
     // division would equal one, but the loop runs twice putting the
     // induction variable at 12.
 
-    if (!trueWhenEqual)
-      // (Stride - 1) is correct only because we know it's unsigned.
-      // What we really want is to decrease the magnitude of Stride by one.
-      Start = SE.getMinusSCEV(Start, SE.getMinusSCEV(Stride, One));
-    else
-      Start = SE.getMinusSCEV(Start, Stride);
+    if (trueWhenEqual)
+      End = SE.getAddExpr(End, One);
+
+    if (!executesAtLeastOnce(L, isSigned, trueWhenEqual,
+                             SE.getMinusSCEV(Start, One), RHS)) {
+      // If not, we get the value of the LHS in the first iteration in which
+      // the above condition doesn't hold.  This equals to max(m,n).
+      End = isSigned ? SE.getSMaxExpr(End, Start)
+                     : SE.getUMaxExpr(End, Start);
+    }
 
     // Finally, we subtract these two values to get the number of times the
     // backedge is executed: max(m,n)-n.

Modified: llvm/trunk/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll?rev=60881&r1=60880&r2=60881&view=diff

==============================================================================
--- llvm/trunk/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll (original)
+++ llvm/trunk/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll Thu Dec 11 11:40:14 2008
@@ -1,5 +1,4 @@
 ; RUN: llvm-as < %s | opt -analyze -scalar-evolution | grep {255 iterations}
-; XFAIL: *
 
 define i32 @foo(i32 %x, i32 %y, i32* %lam, i32* %alp) nounwind {
 bb1.thread:

Added: llvm/trunk/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll?rev=60881&view=auto

==============================================================================
--- llvm/trunk/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll (added)
+++ llvm/trunk/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll Thu Dec 11 11:40:14 2008
@@ -0,0 +1,27 @@
+; RUN: llvm-as < %s | opt -analyze -scalar-evolution | grep {0 smax}
+
+define i32 @f(i32 %c.idx.val) {
+
+bb2:
+	%k.018 = add i32 %c.idx.val, -1		;  [#uses=2]
+	%a14 = icmp slt i32 %k.018, 0		;  [#uses=1]
+	br i1 %a14, label %bb19, label %bb16.preheader
+
+bb16.preheader:
+	%k.019 = phi i32 [ %k.0, %bb18 ], [ %k.018, %bb2 ]		;  [#uses=5]
+	%x = phi i32 [ 0, %bb2 ], [ %x.1, %bb18]
+	br label %bb18
+
+bb18:		; preds = %bb18.loopexit
+	%x.1 = add i32 %x, 1
+	%k.0 = add i32 %k.019, -1		;  [#uses=2]
+	%a107 = icmp slt i32 %k.0, 0		;  [#uses=1]
+	br i1 %a107, label %bb18.bb19_crit_edge, label %bb16.preheader
+
+bb18.bb19_crit_edge:
+	ret i32 %x
+
+bb19:
+	ret i32 0
+
+}




From brukman+llvm at gmail.com  Thu Dec 11 12:14:09 2008
From: brukman+llvm at gmail.com (Misha Brukman)
Date: Thu, 11 Dec 2008 18:14:09 -0000
Subject: [llvm-commits] [llvm] r60884 - /llvm/trunk/docs/index.html
Message-ID: <200812111814.mBBIE9ol031863@zion.cs.uiuc.edu>

Author: brukman
Date: Thu Dec 11 12:14:06 2008
New Revision: 60884

URL: http://llvm.org/viewvc/llvm-project?rev=60884&view=rev
Log:
Conform to the HTML 4.01 Strict specification.

Modified:
    llvm/trunk/docs/index.html

Modified: llvm/trunk/docs/index.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/index.html?rev=60884&r1=60883&r2=60884&view=diff

==============================================================================
--- llvm/trunk/docs/index.html (original)
+++ llvm/trunk/docs/index.html Thu Dec 11 12:14:06 2008
@@ -21,9 +21,11 @@
 
 
   
+    
       
       

       
+    
   
 
 
@@ -70,7 +72,7 @@
 policy towards developers and their contributions.
 
 LLVM Command Guide - A reference
-manual for the LLVM command line utilities ("man" pages for LLVM tools).

+manual for the LLVM command line utilities ("man" pages for LLVM tools).

 Current tools:
  llvm-ar,
  llvm-as,




From jlerouge at apple.com  Thu Dec 11 13:17:37 2008
From: jlerouge at apple.com (Julien Lerouge)
Date: Thu, 11 Dec 2008 19:17:37 -0000
Subject: [llvm-commits] [test-suite] r60886 -
 /test-suite/trunk/MultiSource/Benchmarks/VersaBench/8b10b/Makefile
Message-ID: <200812111917.mBBJHbeE001973@zion.cs.uiuc.edu>

Author: jlerouge
Date: Thu Dec 11 13:17:34 2008
New Revision: 60886

URL: http://llvm.org/viewvc/llvm-project?rev=60886&view=rev
Log:
Make this test work if objdir != srcdir.

Modified:
    test-suite/trunk/MultiSource/Benchmarks/VersaBench/8b10b/Makefile

Modified: test-suite/trunk/MultiSource/Benchmarks/VersaBench/8b10b/Makefile
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/MultiSource/Benchmarks/VersaBench/8b10b/Makefile?rev=60886&r1=60885&r2=60886&view=diff

==============================================================================
--- test-suite/trunk/MultiSource/Benchmarks/VersaBench/8b10b/Makefile (original)
+++ test-suite/trunk/MultiSource/Benchmarks/VersaBench/8b10b/Makefile Thu Dec 11 13:17:34 2008
@@ -2,9 +2,9 @@
 
 PROG     = 8b10b
 ifdef SMALL_PROBLEM_SIZE
-RUN_OPTIONS = input.txt 2000
+RUN_OPTIONS = $(PROJ_SRC_DIR)/input.txt 2000
 else
-RUN_OPTIONS = input.txt 20000
+RUN_OPTIONS = $(PROJ_SRC_DIR)/input.txt 20000
 endif
 include $(LEVEL)/MultiSource/Makefile.multisrc
 




From brukman+llvm at gmail.com  Thu Dec 11 13:37:06 2008
From: brukman+llvm at gmail.com (Misha Brukman)
Date: Thu, 11 Dec 2008 19:37:06 -0000
Subject: [llvm-commits] [llvm] r60889 - /llvm/trunk/docs/CodingStandards.html
Message-ID: <200812111937.mBBJb7EK002882@zion.cs.uiuc.edu>

Author: brukman
Date: Thu Dec 11 13:37:04 2008
New Revision: 60889

URL: http://llvm.org/viewvc/llvm-project?rev=60889&view=rev
Log:
*  is not valid HTML 4.01 - removed alignment
* ^{cannot appear inside a  - replaced  with  and 

* Added standard "Notes" section
* Sprinkled fixed-width  tags in a few places for consistency

Modified:
    llvm/trunk/docs/CodingStandards.html

Modified: llvm/trunk/docs/CodingStandards.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodingStandards.html?rev=60889&r1=60888&r2=60889&view=diff

==============================================================================
--- llvm/trunk/docs/CodingStandards.html (original)
+++ llvm/trunk/docs/CodingStandards.html Thu Dec 11 13:37:04 2008
@@ -526,7 +526,6 @@
 example) is allowed normally, it is just <iostream> that is
 causing problems.
 
-
 
@@ -571,17 +570,22 @@
       
-       
+    
+  
+
   
     void print(std::ostream &Out);
 // ...
 print(std::cerr); void print(llvm::OStream Out);¹
-// ...
-print(llvm::cerr);
+      void print(llvm::OStream Out);¹

+// ...

+print(llvm::cerr);
+      
 
-  
-
+Notes:
 
-
-¹llvm::OStream is a light-weight class so it should never
-be passed by reference. This is important because in some configurations,
-DOUT is an rvalue.
+
+
+llvm::OStream is a light-weight class so it
+    should never be passed by reference. This is important because in some
+    configurations, DOUT is an rvalue.
+
 
 
 
@@ -675,8 +679,8 @@
 "using namespace std;".
 
  In header files, adding a 'using namespace XXX' directive pollutes
-the namespace of any source file that includes the header.  This is clearly a
-bad thing.
+the namespace of any source file that #includes the header.  This is
+clearly a bad thing.
 
 In implementation files (e.g. .cpp files), the rule is more of a stylistic
 rule, but is still important.  Basically, using explicit namespace prefixes
@@ -710,9 +714,9 @@
 
If a class is defined in a header file and has a v-table (either it has 
 virtual methods or it derives from classes with virtual methods), it must 
 always have at least one out-of-line virtual method in the class.  Without 
-this, the compiler will copy the vtable and RTTI into every .o file that
-#includes the header, bloating .o file sizes and increasing link times.
-
+this, the compiler will copy the vtable and RTTI into every .o file
+that #includes the header, bloating .o file sizes and
+increasing link times.}

 




From brukman+llvm at gmail.com  Thu Dec 11 13:44:51 2008
From: brukman+llvm at gmail.com (Misha Brukman)
Date: Thu, 11 Dec 2008 19:44:51 -0000
Subject: [llvm-commits] [llvm] r60891 - /llvm/trunk/docs/DeveloperPolicy.html
Message-ID: <200812111944.mBBJip12003286@zion.cs.uiuc.edu>

Author: brukman
Date: Thu Dec 11 13:44:51 2008
New Revision: 60891

URL: http://llvm.org/viewvc/llvm-project?rev=60891&view=rev
Log:
* Removed stray  tag
* Whitespace cleanups

Modified:
    llvm/trunk/docs/DeveloperPolicy.html

Modified: llvm/trunk/docs/DeveloperPolicy.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/DeveloperPolicy.html?rev=60891&r1=60890&r2=60891&view=diff

==============================================================================
--- llvm/trunk/docs/DeveloperPolicy.html (original)
+++ llvm/trunk/docs/DeveloperPolicy.html Thu Dec 11 13:44:51 2008
@@ -91,8 +91,8 @@
 
 
 
-When making a patch for review, the goal is to make it as easy for the
-   reviewer to read it as possible.  As such, we recommend that you:
+  When making a patch for review, the goal is to make it as easy for the
+  reviewer to read it as possible.  As such, we recommend that you:
   
     Make your patch against the Subversion trunk, not a branch, and not an 
     old version of LLVM.  This makes it easy to apply the patch.
@@ -102,14 +102,13 @@
     the time the patch was created and the time it is applied.
         
     Patches should be made with this command:
-    svn diff -x -u
-     or with the utility utils/mkpatch, which makes it easy to read the
-     diff.
+    svn diff -x -u
+    or with the utility utils/mkpatch, which makes it easy to read the
+    diff.
      
     Patches should not include differences in generated code such as the
     code generated by flex, bison or tblgen. The
     utils/mkpatch utility takes care of this for you.
-    
   
   
   When sending a patch to a mailing list, it is a good idea to send it as an
@@ -124,7 +123,6 @@
   Content-Disposition: inline rather than Content-Disposition:
   attachment. Apple Mail gamely displays such a file inline, making it
   difficult to work with for reviewers using that program.
-
 
 
 




From echeng at apple.com  Thu Dec 11 15:17:14 2008
From: echeng at apple.com (Evan Cheng)
Date: Thu, 11 Dec 2008 13:17:14 -0800
Subject: [llvm-commits] Patch: mmx truncation and selects
In-Reply-To: <8F55D9BD-6D98-45B0-B821-84CDE9527187@apple.com>
References: <8F55D9BD-6D98-45B0-B821-84CDE9527187@apple.com>
Message-ID: 

Looks good. Thanks.

Evan
On Dec 10, 2008, at 11:34 PM, Mon Ping Wang wrote:

>
> This is a patch that fixes two issues that widening discovered for  
> X86 and mmx.
> - For X86, we don't support SELECT v8i8 and v4i16.  This patch  
> implements it the same way that SSE does.
> - For X86, we could not codegen truncating a v8i16 to v8i8 (both are  
> legal types).  The patch will allow legal code generation that we  
> should improve on it later.
>
> Thanks,
> -- Mon Ping
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From evan.cheng at apple.com  Thu Dec 11 16:02:28 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 11 Dec 2008 22:02:28 -0000
Subject: [llvm-commits] [llvm] r60901 -
	/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
Message-ID: <200812112202.mBBM2cpk008253@zion.cs.uiuc.edu>

Author: evancheng
Date: Thu Dec 11 16:02:02 2008
New Revision: 60901

URL: http://llvm.org/viewvc/llvm-project?rev=60901&view=rev
Log:
Fix a 80 col. violation.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrVFP.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=60901&r1=60900&r2=60901&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Thu Dec 11 16:02:02 2008
@@ -234,7 +234,8 @@
 // FMDHR: GPR -> SPR
 // FMDLR: GPR -> SPR
 
-def FMDRR : AVConv5I<0b11000100, 0b1011, (outs DPR:$dst), (ins GPR:$src1, GPR:$src2),
+def FMDRR : AVConv5I<0b11000100, 0b1011,
+                     (outs DPR:$dst), (ins GPR:$src1, GPR:$src2),
                 "fmdrr", " $dst, $src1, $src2",
                 [(set DPR:$dst, (arm_fmdrr GPR:$src1, GPR:$src2))]>;
 




From foldr at codedgers.com  Thu Dec 11 16:19:45 2008
From: foldr at codedgers.com (Mikhail Glushenkov)
Date: Thu, 11 Dec 2008 22:19:45 -0000
Subject: [llvm-commits] [llvm] r60902 -
	/llvm/trunk/tools/llvmc/plugins/Base/Base.td
Message-ID: <200812112220.mBBMK0tv008715@zion.cs.uiuc.edu>

Author: foldr
Date: Thu Dec 11 16:19:14 2008
New Revision: 60902

URL: http://llvm.org/viewvc/llvm-project?rev=60902&view=rev
Log:
Add a '-Wo,' option that passes options to opt.

Modified:
    llvm/trunk/tools/llvmc/plugins/Base/Base.td

Modified: llvm/trunk/tools/llvmc/plugins/Base/Base.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/plugins/Base/Base.td?rev=60902&r1=60901&r2=60902&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/plugins/Base/Base.td (original)
+++ llvm/trunk/tools/llvmc/plugins/Base/Base.td Thu Dec 11 16:19:14 2008
@@ -43,7 +43,9 @@
  (prefix_list_option "l",
     (help "Search a library when linking")),
  (prefix_list_option "Wl,",
-    (help "Pass options to linker"))
+    (help "Pass options to linker")),
+ (prefix_list_option "Wo,",
+    (help "Pass options to opt"))
 ]>;
 
 // Tools
@@ -86,6 +88,7 @@
 [(in_language "llvm-bitcode"),
  (out_language "llvm-bitcode"),
  (output_suffix "bc"),
+ (actions (case (not_empty "Wo,"), (unpack_values "Wo,"))),
  (cmd_line "opt -f $INFILE -o $OUTFILE")
 ]>;
 




From grosbach at apple.com  Thu Dec 11 16:27:02 2008
From: grosbach at apple.com (Jim Grosbach)
Date: Thu, 11 Dec 2008 22:27:02 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r60903 - in /llvm-gcc-4.2/trunk/gcc:
 ChangeLog.apple config/arm/arm.md
Message-ID: <200812112227.mBBMRBmc008939@zion.cs.uiuc.edu>

Author: grosbach
Date: Thu Dec 11 16:26:30 2008
New Revision: 60903

URL: http://llvm.org/viewvc/llvm-project?rev=60903&view=rev
Log:
2008-12-10   Jim Grosbach 

 Radar 6387939
 * config/arm/arm.md (builtin_setjmp_setup): Properly terminate
 the code snipped to prevent the rtl template from adding an


Modified:
    llvm-gcc-4.2/trunk/gcc/ChangeLog.apple
    llvm-gcc-4.2/trunk/gcc/config/arm/arm.md

Modified: llvm-gcc-4.2/trunk/gcc/ChangeLog.apple
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/ChangeLog.apple?rev=60903&r1=60902&r2=60903&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/ChangeLog.apple (original)
+++ llvm-gcc-4.2/trunk/gcc/ChangeLog.apple Thu Dec 11 16:26:30 2008
@@ -1,3 +1,10 @@
+2008-12-10   Jim Grosbach 
+
+	Radar 6387939
+	* config/arm/arm.md (builtin_setjmp_setup): Properly terminate
+	the code snipped to prevent the rtl template from adding an
+	extraneous "use" insn into the instruction list.
+
 2008-11-18  Stuart Hastings  
 
 	Radar 6353006

Modified: llvm-gcc-4.2/trunk/gcc/config/arm/arm.md
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/arm/arm.md?rev=60903&r1=60902&r2=60903&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/config/arm/arm.md (original)
+++ llvm-gcc-4.2/trunk/gcc/config/arm/arm.md Thu Dec 11 16:26:30 2008
@@ -4813,6 +4813,8 @@
   resume_reg = force_reg (Pmode, resume_addr);
   resume_reg = gen_rtx_IOR (Pmode, resume_reg, GEN_INT (1));
   emit_move_insn (resume_addr, resume_reg);
+  ;; APPLE LOCAL 6387939
+  DONE;
 })
 
 ;; Very similar to the logic in builtins.c, except that we always




From dpatel at apple.com  Thu Dec 11 17:22:15 2008
From: dpatel at apple.com (Devang Patel)
Date: Thu, 11 Dec 2008 23:22:15 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r60908 - in /llvm-gcc-4.2/trunk/gcc:
 llvm-backend.cpp llvm-convert.cpp llvm-debug.cpp llvm-debug.h
 llvm-linker-hack.cpp
Message-ID: <200812112322.mBBNMH3V010894@zion.cs.uiuc.edu>

Author: dpatel
Date: Thu Dec 11 17:22:08 2008
New Revision: 60908

URL: http://llvm.org/viewvc/llvm-project?rev=60908&view=rev
Log:
Use DebugInfo instead of MachineModuleInfo to generate debugging information.

Modified:
    llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
    llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
    llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp
    llvm-gcc-4.2/trunk/gcc/llvm-debug.h
    llvm-gcc-4.2/trunk/gcc/llvm-linker-hack.cpp

Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=60908&r1=60907&r2=60908&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Thu Dec 11 17:22:08 2008
@@ -303,9 +303,6 @@
   readLLVMTypesStringTable();
   readLLVMValues();
 
-  if (TheDebugInfo)
-    TheDebugInfo->readLLVMDebugInfo();
-
   flag_llvm_pch_read = 1;
 }
 

Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=60908&r1=60907&r2=60908&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Thu Dec 11 17:22:08 2008
@@ -469,7 +469,7 @@
       SET_DECL_LLVM(ResultDecl, Tmp);
       if (TheDebugInfo) {
         TheDebugInfo->EmitDeclare(ResultDecl,
-                                  llvm::dwarf::DW_TAG_return_variable,
+                                  dwarf::DW_TAG_return_variable,
                                   "agg.result", RetTy, Tmp,
                                   Builder.GetInsertBlock());
       }
@@ -735,7 +735,7 @@
       AI->setName(Name);
       SET_DECL_LLVM(Args, AI);
       if (!isInvRef && TheDebugInfo)
-        TheDebugInfo->EmitDeclare(Args, llvm::dwarf::DW_TAG_arg_variable,
+        TheDebugInfo->EmitDeclare(Args, dwarf::DW_TAG_arg_variable,
                                   Name, TREE_TYPE(Args),
                                   AI, Builder.GetInsertBlock());
       ++AI;
@@ -747,7 +747,7 @@
       Tmp->setName(std::string(Name)+"_addr");
       SET_DECL_LLVM(Args, Tmp);
       if (TheDebugInfo) {
-        TheDebugInfo->EmitDeclare(Args, llvm::dwarf::DW_TAG_arg_variable,
+        TheDebugInfo->EmitDeclare(Args, dwarf::DW_TAG_arg_variable,
                                   Name, TREE_TYPE(Args), Tmp, 
                                   Builder.GetInsertBlock());
       }
@@ -1727,11 +1727,11 @@
   
   if (TheDebugInfo) {
     if (DECL_NAME(decl)) {
-      TheDebugInfo->EmitDeclare(decl, llvm::dwarf::DW_TAG_auto_variable,
+      TheDebugInfo->EmitDeclare(decl, dwarf::DW_TAG_auto_variable,
                                 Name, TREE_TYPE(decl), AI,
                                 Builder.GetInsertBlock());
     } else if (TREE_CODE(decl) == RESULT_DECL) {
-      TheDebugInfo->EmitDeclare(decl, llvm::dwarf::DW_TAG_return_variable,
+      TheDebugInfo->EmitDeclare(decl, dwarf::DW_TAG_return_variable,
                                 Name, TREE_TYPE(decl), AI,
                                 Builder.GetInsertBlock());
     }

Modified: llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp?rev=60908&r1=60907&r2=60908&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp Thu Dec 11 17:22:08 2008
@@ -37,7 +37,6 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/SmallVector.h"
-#include "llvm/CodeGen/MachineModuleInfo.h"
 
 extern "C" {
 #include "langhooks.h"
@@ -178,25 +177,22 @@
   return Location;
 }
 
-/// GetGlobalNames - Sets the names for a global descriptor.
-///
-static void GetGlobalNames(tree Node, GlobalDesc *Global) {
+static const char *getLinkageName(tree Node) {
+
   tree decl_name = DECL_NAME(Node);
   if (decl_name != NULL && IDENTIFIER_POINTER (decl_name) != NULL) {
-    Global->setName(lang_hooks.decl_printable_name (Node, 0));
-    Global->setFullName(lang_hooks.decl_printable_name (Node, 1));
-    
     if (TREE_PUBLIC(Node) &&
         DECL_ASSEMBLER_NAME(Node) != DECL_NAME(Node) && 
         !DECL_ABSTRACT(Node)) {
-        Global->setLinkageName(IDENTIFIER_POINTER(DECL_ASSEMBLER_NAME(Node)));
-    }
+      return IDENTIFIER_POINTER(DECL_ASSEMBLER_NAME(Node));
+    } 
   }
-}  
+  return "";
+}
 
 DebugInfo::DebugInfo(Module *m)
 : M(m)
-, SR()
+, DebugFactory(*m)
 , CurFullPath("")
 , CurLineNo(0)
 , PrevFullPath("")
@@ -208,104 +204,50 @@
 , RegionStartFn(NULL)
 , RegionEndFn(NULL)
 , DeclareFn(NULL)
-, CompileUnitAnchor(NULL)
-, GlobalVariableAnchor(NULL)
-, SubprogramAnchor(NULL)
 , RegionStack()
-, Subprogram(NULL)
-{
-  // uint64_t and int64_t are used in the debug descriptors for sizes and
-  // offsets.  So, we should make sure we don't lose any accuracy. 
-  DEBUGASSERT(sizeof(HOST_WIDE_INT) <= sizeof(int64_t) &&
-              "Bit size exceeds values stored in debug descriptors");
-         
-  // Let the debug serializer know where the module lives.
-  SR.setModule(M);
-}
-
-/// getValueFor - Return a llvm representation for a given debug information
-/// descriptor.
-Value *DebugInfo::getValueFor(DebugInfoDesc *DD) {
-  return SR.Serialize(DD);
-}
-
-/// getCastValueFor - Return a llvm representation for a given debug information
-/// descriptor cast to an empty struct pointer.
-Value *DebugInfo::getCastValueFor(DebugInfoDesc *DD) {
-  return TheFolder->CreateBitCast(SR.Serialize(DD), SR.getEmptyStructPtrType());
-}
+{}
 
 /// EmitFunctionStart - Constructs the debug code for entering a function -
 /// "llvm.dbg.func.start."
 void DebugInfo::EmitFunctionStart(tree FnDecl, Function *Fn,
                                   BasicBlock *CurBB) {
-  PrevFullPath = "";
-  PrevLineNo = 0;
-  PrevBB = NULL;
-  
-  // Create subprogram descriptor.
-  Subprogram = new SubprogramDesc();
-  
-  // Make sure we have an anchor.
-  if (!SubprogramAnchor) {
-    SubprogramAnchor = new AnchorDesc(Subprogram);
-  }
-
-  // Get name information.
-  GetGlobalNames(FnDecl, Subprogram);
-  
   // Gather location information.
-  CompileUnitDesc *Unit = getOrCreateCompileUnit(CurFullPath);
-  
-  // Get function type.
-  TypeDesc *SPTy = getOrCreateType(TREE_TYPE(TREE_TYPE(FnDecl)), Unit);
+  DICompileUnit Unit = getOrCreateCompileUnit(CurFullPath);
+  const char *LinkageName = getLinkageName(FnDecl);
+  DIType FnTy = getOrCreateType(TREE_TYPE(TREE_TYPE(FnDecl)), Unit);
+  DISubprogram SP = DebugFactory.CreateSubprogram(Unit, Fn->getNameStr(),
+                                                 Fn->getNameStr(), LinkageName,
+                                                 Unit, CurLineNo, FnTy,
+                                                 Fn->hasInternalLinkage(), 
+                                                 true /*definition*/);
 
-  Subprogram->setAnchor(SubprogramAnchor);
-  Subprogram->setContext(Unit);
-  Subprogram->setFile(Unit);
-  Subprogram->setLine(CurLineNo);
-  Subprogram->setType(SPTy);
-  Subprogram->setIsStatic(Fn->hasInternalLinkage());
-  Subprogram->setIsDefinition(true);
-  
-  // Lazily construct llvm.dbg.func.start.
-  if (!FuncStartFn)
-    FuncStartFn = Intrinsic::getDeclaration(M, Intrinsic::dbg_func_start);
+  DebugFactory.InsertSubprogramStart(SP, CurBB);
 
-  // Call llvm.dbg.func.start which also implicitly calls llvm.dbg.stoppoint.
-  CallInst::Create(FuncStartFn, getCastValueFor(Subprogram), "", CurBB);
-  
   // Push function on region stack.
-  RegionStack.push_back(Subprogram);
+  RegionStack.push_back(SP);
 }
 
 /// EmitRegionStart- Constructs the debug code for entering a declarative
 /// region - "llvm.dbg.region.start."
 void DebugInfo::EmitRegionStart(Function *Fn, BasicBlock *CurBB) {
-  BlockDesc *Block = new BlockDesc();
-  Block->setContext(RegionStack.back());
-  RegionStack.push_back(Block);
-
-  // Lazily construct llvm.dbg.region.start function.
-  if (!RegionStartFn)
-    RegionStartFn = Intrinsic::getDeclaration(M, Intrinsic::dbg_region_start);
-  
-  // Call llvm.dbg.func.start.
-  CallInst::Create(RegionStartFn, getCastValueFor(Block), "", CurBB);
+  llvm::DIDescriptor D;
+  if (!RegionStack.empty())
+    D = RegionStack.back();
+  D = DebugFactory.CreateBlock(D);
+  RegionStack.push_back(D);
+  DebugFactory.InsertRegionStart(D, CurBB);
 }
 
 /// EmitRegionEnd - Constructs the debug code for exiting a declarative
 /// region - "llvm.dbg.region.end."
 void DebugInfo::EmitRegionEnd(Function *Fn, BasicBlock *CurBB) {
-  // Lazily construct llvm.dbg.region.end function.
-  if (!RegionEndFn)
-    RegionEndFn = Intrinsic::getDeclaration(M, Intrinsic::dbg_region_end);
-  
+
+  assert(!RegionStack.empty() && "Region stack mismatch, stack empty!");
+
   // Provide an region stop point.
   EmitStopPoint(Fn, CurBB);
   
-  // Call llvm.dbg.func.end.
-  CallInst::Create(RegionEndFn, getCastValueFor(RegionStack.back()), "", CurBB);
+  DebugFactory.InsertRegionEnd(RegionStack.back(), CurBB);
   RegionStack.pop_back();
 }
 
@@ -317,36 +259,18 @@
   if (DECL_IGNORED_P(decl))
     return;
 
-  // Lazily construct llvm.dbg.declare function.
-  const PointerType *EmpPtr = SR.getEmptyStructPtrType();
-  if (!DeclareFn)
-    DeclareFn = Intrinsic::getDeclaration(M, Intrinsic::dbg_declare);
-
-  // Get type information.
-  CompileUnitDesc *Unit = getOrCreateCompileUnit(CurFullPath);
-  TypeDesc *TyDesc = getOrCreateType(type, Unit);
+  assert(!RegionStack.empty() && "Region stack mismatch, stack empty!");
 
   expanded_location Loc = GetNodeLocation(decl, false);
-  CompileUnitDesc *File = Loc.line ? getOrCreateCompileUnit(Loc.file) : NULL;
+  DICompileUnit File = getOrCreateCompileUnit(Loc.file);
 
   // Construct variable.
-  VariableDesc *Variable = new VariableDesc(Tag);
-  Variable->setContext(RegionStack.back());
-  Variable->setName(Name);
-  Variable->setFile(File);
-  Variable->setLine(Loc.line);
-  Variable->setType(TyDesc);
-
-  // Cast the AllocA result to a {}* for the call to llvm.dbg.declare. Since
-  // only pointer types are involved, this is always a BitCast
-  Value *AllocACast = new BitCastInst(AI, EmpPtr, Name, CurBB);
-
-  // Call llvm.dbg.declare.
-  Value *Args[2] = {
-    AllocACast,
-    getCastValueFor(Variable)
-  };
-  CallInst::Create(DeclareFn, Args, Args + 2, "", CurBB);
+  llvm::DIVariable D =
+    DebugFactory.CreateVariable(Tag, RegionStack.back(), Name, File, Loc.line,
+                                getOrCreateType(type, File));
+
+  // Insert an llvm.dbg.declare into the current block.
+  DebugFactory.InsertDeclare(AI, D, CurBB);
 }
 
 /// EmitStopPoint - Emit a call to llvm.dbg.stoppoint to indicate a change of 
@@ -365,109 +289,49 @@
   PrevBB = CurBB;
   
   // Get the appropriate compile unit.
-  CompileUnitDesc *Unit = getOrCreateCompileUnit(CurFullPath);
-  
-  // Lazily construct llvm.dbg.stoppoint function.
-  if (!StopPointFn)
-    StopPointFn = Intrinsic::getDeclaration(M, Intrinsic::dbg_stoppoint);
-  
-  // Invoke llvm.dbg.stoppoint
-  Value *Args[3] = {
-    ConstantInt::get(Type::Int32Ty, CurLineNo),
-    ConstantInt::get(Type::Int32Ty, 0),
-    getCastValueFor(Unit)
-  };
-  CallInst::Create(StopPointFn, Args, Args+3, "", CurBB);
+  DICompileUnit Unit = getOrCreateCompileUnit(CurFullPath);
+
+  DebugFactory.InsertStopPoint(Unit, CurLineNo, 0 /*column no. */,
+                              CurBB);
 }
 
 /// EmitGlobalVariable - Emit information about a global variable.
 ///
 void DebugInfo::EmitGlobalVariable(GlobalVariable *GV, tree decl) {
-  // FIXME - lots to do here.
-  // Create global variable debug descriptor.
-  GlobalVariableDesc *Global = new GlobalVariableDesc();
-
-  // Make sure we have an anchor.
-  if (!GlobalVariableAnchor) {
-    GlobalVariableAnchor = new AnchorDesc(Global);
-  }
-  
-  // Get name information.
-  GetGlobalNames(decl, Global);
-
   // Gather location information.
   expanded_location location = expand_location(DECL_SOURCE_LOCATION(decl));
-  CompileUnitDesc *Unit = getOrCreateCompileUnit(location.file);
-  
-  TypeDesc *TyD = getOrCreateType(TREE_TYPE(decl), Unit);
-  
-  // Fill in the blanks.
-  Global->setAnchor(GlobalVariableAnchor);
-  Global->setContext(Unit);
-  Global->setFile(Unit);
-  Global->setLine(location.line);
-  Global->setType(TyD);
-  Global->setIsDefinition(true);
-  Global->setIsStatic(GV->hasInternalLinkage());
-  Global->setGlobalVariable(GV);
-  
-  // Make sure global is created if needed.
-  getValueFor(Global);
-}
-
-/// AddTypeQualifiers - Add const/volatile qualifiers prior to the type
-/// descriptor.
-TypeDesc *DebugInfo::AddTypeQualifiers(tree_node *type, CompileUnitDesc *Unit,
-                                       TypeDesc *TyDesc) {
-  if (TYPE_READONLY(type)) {
-    DerivedTypeDesc *DerivedTy = new DerivedTypeDesc(DW_TAG_const_type);
-    DerivedTy->setContext(Unit);
-    DerivedTy->setFromType(TyDesc);
-    TypeDesc *Slot = TypeCache[TYPE_MAIN_VARIANT(type)];
-    if (!Slot)
-      TypeCache[TYPE_MAIN_VARIANT(type)] = TyDesc;
-    TyDesc = DerivedTy;
-  }
-  if (TYPE_VOLATILE(type)) {
-    DerivedTypeDesc *DerivedTy = new DerivedTypeDesc(DW_TAG_volatile_type);
-    DerivedTy->setContext(Unit);
-    DerivedTy->setFromType(TyDesc);
-    TypeDesc *Slot = TypeCache[TYPE_MAIN_VARIANT(type)];
-    if (!Slot)
-      TypeCache[TYPE_MAIN_VARIANT(type)] = TyDesc;
-    TyDesc = DerivedTy;
-  }
-  
-  // FIXME - Add private/public/protected.
-  
-  return TyDesc;
+  DICompileUnit Unit = getOrCreateCompileUnit(location.file);
+  const char *LinkageName = getLinkageName(decl);  
+  DIType TyD = getOrCreateType(TREE_TYPE(decl), Unit);
+  
+  DebugFactory.CreateGlobalVariable(Unit, GV->getNameStr(), GV->getNameStr(), 
+                                    LinkageName, Unit, location.line,
+                                    TyD, GV->hasInternalLinkage(),
+                                    true/*definition*/, GV);
+
 }
 
 /// getOrCreateType - Get the type from the cache or create a new type if
 /// necessary.
 /// FIXME - I hate jumbo methods - split up.
-TypeDesc *DebugInfo::getOrCreateType(tree type, CompileUnitDesc *Unit) {
+DIType DebugInfo::getOrCreateType(tree type, DICompileUnit Unit) {
   DEBUGASSERT(type != NULL_TREE && type != error_mark_node &&
               "Not a type.");
-  if (type == NULL_TREE || type == error_mark_node) return NULL;
+  if (type == NULL_TREE || type == error_mark_node) return DIType();
 
   // Should only be void if a pointer/reference/return type.  Returning NULL
   // allows the caller to produce a non-derived type.
-  if (TREE_CODE(type) == VOID_TYPE) return NULL;
+  if (TREE_CODE(type) == VOID_TYPE) return DIType();
   
   // Check to see if the compile unit already has created this type.
-  TypeDesc *Slot = TypeCache[type];
-  if (Slot && !(Slot->isForwardDecl() && TYPE_SIZE(type) != 0))
-    // FIXME: If previously created type is just a forward declaration, emit
-    // a new descriptor for the type definition. The correct fix is to *fix*
-    // up the llvm ir (since MMI may have already been converted to llvm). But
-    // that's correctly not doable. We'll fix this when we convert to the new
-    // API in DebugInfo.h
+  DIType &Slot = TypeCache[type];
+  if (!Slot.isNull())
     return Slot;
   
-  // Ty will have contain the resulting type.
-  TypeDesc *Ty = NULL;
-  
+  DIType MainTy;
+  if (type != TYPE_MAIN_VARIANT(type))
+    MainTy = getOrCreateType(TYPE_MAIN_VARIANT(type), Unit);
+
   // Get the name and location early to assist debugging.
   const char *TypeName = GetNodeName(type);
   expanded_location Loc = GetNodeLocation(type);
@@ -476,87 +340,109 @@
   uint64_t Size = NodeSizeInBits(type);
   uint64_t Align = NodeAlignInBits(type);
   uint64_t Offset = 0;
-  
+
+  DIType Ty;
   // Do we have a typedef?
   if (tree Name = TYPE_NAME(type)) {
     if (TREE_CODE(Name) == TYPE_DECL &&  DECL_ORIGINAL_TYPE(Name)) {
-      // typedefs are derived from some other type.
-      DerivedTypeDesc *DerivedTy = new DerivedTypeDesc(DW_TAG_typedef);
+      Ty = DebugFactory.CreateDerivedType(DW_TAG_typedef, Unit, "", 
+                                          DICompileUnit(), Loc.line,
+                                          0 /*size*/,
+                                          0 /*align*/,
+                                          0 /*offset */, 
+                                          0 /*flags*/, 
+                                          MainTy);
       // Set the slot early to prevent recursion difficulties.
-      TypeCache[type] = Ty = DerivedTy;
-      // Handle derived type.
-      TypeDesc *FromTy = getOrCreateType(DECL_ORIGINAL_TYPE(Name), Unit);
-      DerivedTy->setFromType(FromTy);
-      // typedefs size should be fetched from the derived type.
-      Size = Align = 0;
+      TypeCache[type] = Ty;
+      return Ty;
     }
   }
-  
-  // If no result so far.
-  if (!Ty) {
-    // Work out details of type.
-    switch (TREE_CODE(type)) {
+
+  if (TYPE_VOLATILE(type)) {
+    Ty = DebugFactory.CreateDerivedType(DW_TAG_volatile_type, Unit, "", 
+                                        DICompileUnit(), 0 /*line no*/, 
+                                        NodeSizeInBits(type),
+                                        NodeAlignInBits(type),
+                                        0 /*offset */, 
+                                        0 /* flags */, 
+                                        MainTy);
+    MainTy = Ty;
+  }
+
+  if (TYPE_READONLY(type)) 
+    Ty =  DebugFactory.CreateDerivedType(DW_TAG_const_type, Unit, "", 
+                                         DICompileUnit(), 0 /*line no*/, 
+                                         NodeSizeInBits(type),
+                                         NodeAlignInBits(type),
+                                         0 /*offset */, 
+                                         0 /* flags */, 
+                                         MainTy);
+  
+  if (TYPE_VOLATILE(type) || TYPE_READONLY(type)) {
+    TypeCache[type] = Ty;
+    return Ty;
+  }
+
+  // Work out details of type.
+  switch (TREE_CODE(type)) {
     case ERROR_MARK:
     case LANG_TYPE:
     case TRANSLATION_UNIT_DECL:
     default: {
       DEBUGASSERT(0 && "Unsupported type");
-      return NULL;
+      return DIType();
     }
-
+    
     case POINTER_TYPE:
     case REFERENCE_TYPE:
     case BLOCK_POINTER_TYPE: {
+
+      DIType FromTy = getOrCreateType(TREE_TYPE(type), Unit);
       // type* and type&
       // FIXME: Should BLOCK_POINTER_TYP have its own DW_TAG?
-      unsigned T = (TREE_CODE(type) == POINTER_TYPE ||
-                    TREE_CODE(type) == BLOCK_POINTER_TYPE) ?
+      unsigned Tag = (TREE_CODE(type) == POINTER_TYPE ||
+                      TREE_CODE(type) == BLOCK_POINTER_TYPE) ?
         DW_TAG_pointer_type :
         DW_TAG_reference_type;
-      DerivedTypeDesc *DerivedTy = new DerivedTypeDesc(T);
-      Ty = DerivedTy;
-      // Set the slot early to prevent recursion difficulties.
-      // Any other use of the type should include the qualifiers.
-      TypeCache[type] = AddTypeQualifiers(type, Unit, DerivedTy);
-      // Handle the derived type.
-      TypeDesc *FromTy = getOrCreateType(TREE_TYPE(type), Unit);
-      DerivedTy->setFromType(FromTy);
+      Ty =  DebugFactory.CreateDerivedType(Tag, Unit, "", 
+                                           DICompileUnit(), 0 /*line no*/, 
+                                           NodeSizeInBits(type),
+                                           NodeAlignInBits(type),
+                                           0 /*offset */, 
+                                           0 /* flags */, 
+                                           MainTy);
+      
       break;
     }
     
     case OFFSET_TYPE: {
       // gen_type_die(TYPE_OFFSET_BASETYPE(type), context_die);
-      
       // gen_type_die(TREE_TYPE(type), context_die);
-      
       // gen_ptr_to_mbr_type_die(type, context_die);
       break;
     }
 
     case FUNCTION_TYPE:
     case METHOD_TYPE: {
-      CompositeTypeDesc *SubrTy = new CompositeTypeDesc(DW_TAG_subroutine_type);
-      Ty = SubrTy;
-      // Set the slot early to prevent recursion difficulties.
-      // Any other use of the type should include the qualifiers.
-      TypeCache[type] = AddTypeQualifiers(type, Unit, SubrTy);
+      llvm::SmallVector EltTys;
+    
+      // Add the result type at least.
+      EltTys.push_back(getOrCreateType(TREE_TYPE(type), Unit));
       
-      // Prepare to add the arguments for the subroutine.
-      std::vector &Elements = SubrTy->getElements();
-      // Get result type.
-      TypeDesc *ArgTy = getOrCreateType(TREE_TYPE(type), Unit);
-      Elements.push_back(ArgTy);
-
       // Set up remainder of arguments.
       for (tree arg = TYPE_ARG_TYPES(type); arg; arg = TREE_CHAIN(arg)) {
         tree formal_type = TREE_VALUE(arg);
-        
         if (formal_type == void_type_node) break;
-        
-        ArgTy = getOrCreateType(formal_type, Unit);
-        Elements.push_back(ArgTy);
+        EltTys.push_back(getOrCreateType(formal_type, Unit));
       }
       
+      llvm::DIArray EltTypeArray =
+        DebugFactory.GetOrCreateArray(&EltTys[0], EltTys.size());
+      
+      Ty = DebugFactory.CreateCompositeType(llvm::dwarf::DW_TAG_subroutine_type,
+                                            Unit, "", llvm::DICompileUnit(),
+                                            0, 0, 0, 0, 0,
+                                            llvm::DIType(), EltTypeArray);
       break;
     }
       
@@ -565,75 +451,72 @@
       // type[n][m]...[p]
       if (TYPE_STRING_FLAG(type) && TREE_CODE(TREE_TYPE(type)) == INTEGER_TYPE){
         DEBUGASSERT(0 && "Don't support pascal strings");
-        return NULL;
+        return DIType();
       }
       
-      CompositeTypeDesc *ArrayTy;
+      unsigned Tag = 0;
       
-      if (TREE_CODE(type) == VECTOR_TYPE) {
-        Ty = ArrayTy = new CompositeTypeDesc(DW_TAG_vector_type);
-        // Set the slot early to prevent recursion difficulties.
-        // Any other use of the type should include the qualifiers.
-        TypeCache[type] = AddTypeQualifiers(type, Unit, ArrayTy);
-        // Use the element type of the from this point.
-        type = TREE_TYPE(TYPE_FIELDS(TYPE_DEBUG_REPRESENTATION_TYPE(type)));
-      } else {
-        Ty = ArrayTy = new CompositeTypeDesc(DW_TAG_array_type);
-        // Set the slot early to prevent recursion difficulties.
-        // Any other use of the type should include the qualifiers.
-        TypeCache[type] = AddTypeQualifiers(type, Unit, ArrayTy);
-      }
+      if (TREE_CODE(type) == VECTOR_TYPE) 
+        Tag = DW_TAG_vector_type;
+      else
+        Tag = DW_TAG_array_type;
 
-      // Prepare to add the dimensions of the array.
-      std::vector &Elements = ArrayTy->getElements();
+      // Add the dimensions of the array.  FIXME: This loses CV qualifiers from
+      // interior arrays, do we care?  Why aren't nested arrays represented the
+      // obvious/recursive way?
+      llvm::SmallVector Subscripts;
 
       // There will be ARRAY_TYPE nodes for each rank.  Followed by the derived
       // type.
+      tree EltTy = TREE_TYPE(type);
       for (; TREE_CODE(type) == ARRAY_TYPE; type = TREE_TYPE(type)) {
         tree Domain = TYPE_DOMAIN(type);
-        SubrangeDesc *Subrange = new SubrangeDesc();
-
         if (Domain) {
           // FIXME - handle dynamic ranges
           tree MinValue = TYPE_MIN_VALUE(Domain);
           tree MaxValue = TYPE_MAX_VALUE(Domain);
           if (MinValue && MaxValue &&
               isInt64(MinValue, 0) && isInt64(MaxValue, 0)) {
-            Subrange->setLo(getInt64(MinValue, 0));
-            Subrange->setHi(getInt64(MaxValue, 0));
+            uint64_t Low = getInt64(MinValue, 0);
+            uint64_t Hi = getInt64(MaxValue, 0);
+            Subscripts.push_back(DebugFactory.GetOrCreateSubrange(Low, Hi));
           }
         }
-        
-        Elements.push_back(Subrange);
+        EltTy = TREE_TYPE(type);
       }
-      
-      // Now handle the derived type.
-      ArrayTy->setFromType(getOrCreateType(type, Unit));
+
+      llvm::DIArray SubscriptArray =
+        DebugFactory.GetOrCreateArray(&Subscripts[0], Subscripts.size());
+
+      Ty = DebugFactory.CreateCompositeType(llvm::dwarf::DW_TAG_array_type,
+                                            Unit, "", llvm::DICompileUnit(),
+                                            0, Size, Align, 0, 0,
+                                            getOrCreateType(EltTy, Unit),
+                                            SubscriptArray);
       break;
     }
     
     case ENUMERAL_TYPE: {
       // enum { a, b, ..., z };
-      CompositeTypeDesc *Enum = new CompositeTypeDesc(DW_TAG_enumeration_type);
-      Ty = Enum;
-      // Any other use of the type should include the qualifiers.
-      TypeCache[type] = AddTypeQualifiers(type, Unit, Enum);
-      // Prepare to add the enumeration values.
-      std::vector &Elements = Enum->getElements();
+      llvm::SmallVector Elements;
 
       if (TYPE_SIZE(type)) {
         for (tree Link = TYPE_VALUES(type); Link; Link = TREE_CHAIN(Link)) {
-          EnumeratorDesc *EnumDesc = new EnumeratorDesc();
-
           tree EnumValue = TREE_VALUE(Link);
           int64_t Value = getInt64(EnumValue, tree_int_cst_sgn(EnumValue) > 0);
           const char *EnumName = IDENTIFIER_POINTER(TREE_PURPOSE(Link));
-          EnumDesc->setName(EnumName);
-          EnumDesc->setValue(Value);
-        
-          Elements.push_back(EnumDesc);
+          Elements.push_back(DebugFactory.CreateEnumerator(EnumName, Value));
         }
       }
+
+      llvm::DIArray EltArray =
+        DebugFactory.GetOrCreateArray(&Elements[0], Elements.size());
+
+      expanded_location Loc = GetNodeLocation(type, false);
+      Ty = DebugFactory.CreateCompositeType(llvm::dwarf::DW_TAG_enumeration_type,
+                                            Unit, TypeName, Unit, Loc.line,
+                                            Size, Align, 0, 0,
+                                            llvm::DIType(), EltArray);
       break;
     }
     
@@ -643,42 +526,45 @@
       // struct { a; b; ... z; }; | union { a; b; ... z; };
       unsigned Tag = TREE_CODE(type) == RECORD_TYPE ? DW_TAG_structure_type :
                                                       DW_TAG_union_type;
-      CompositeTypeDesc *StructTy = new CompositeTypeDesc(Tag);
-      Ty = StructTy;
-      // Set the slot early to prevent recursion difficulties.
-      // Any other use of the type should include the qualifiers.
-      TypeCache[type] = AddTypeQualifiers(type, Unit, StructTy);
 
-      // If it's a forward declaration, mark it as such.
+      // Records and classes and unions can all be recursive.  To handle them, we
+      // first generate a debug descriptor for the struct as a forward declaration.
+      // Then (if it is a definition) we go through and get debug info for all of
+      // its members.  Finally, we create a descriptor for the complete type (which
+      // may refer to the forward decl if the struct is recursive) and replace all
+      // uses of the forward declaration with the final definition.
+      expanded_location Loc = GetNodeLocation(type, false);
+      llvm::DIType FwdDecl =
+        DebugFactory.CreateCompositeType(Tag, Unit, TypeName, Unit, Loc.line, 0, 0, 0, 0,
+                                         llvm::DIType(), llvm::DIArray());
+  
+
+      // forward declaration, 
       if (TYPE_SIZE(type) == 0) {
-        StructTy->setIsForwardDecl();
+        Ty = FwdDecl;
         break;
       }
 
-      // Prepare to add the fields.
-      std::vector &Elements = StructTy->getElements();
-      
+      // Insert into the TypeCache so that recursive uses will find it.
+      TypeCache[type] =  FwdDecl;
+
+      // Convert all the elements.
+      llvm::SmallVector EltTys;
+
       if (tree binfo = TYPE_BINFO(type)) {
         VEC (tree, gc) *accesses = BINFO_BASE_ACCESSES (binfo);
         
         for (unsigned i = 0, e = BINFO_N_BASE_BINFOS(binfo); i != e; ++i) {
           tree BInfo = BINFO_BASE_BINFO(binfo, i);
           tree BInfoType = BINFO_TYPE (BInfo);
-          TypeDesc *BaseClass = getOrCreateType(BInfoType, Unit);
-          DerivedTypeDesc *MemberDesc = new DerivedTypeDesc(DW_TAG_inheritance);
-          MemberDesc->setFromType(BaseClass);
-          
-          if (accesses) {
-            tree access = VEC_index(tree, accesses, i);
-            if (access == access_protected_node) {
-              MemberDesc->setIsProtected();
-            } else if (access == access_private_node) {
-              MemberDesc->setIsPrivate();
-            }
-          }
-          
-          MemberDesc->setOffset(getInt64(BINFO_OFFSET(BInfo), 0));
-          Elements.push_back(MemberDesc);
+          DIType BaseClass = getOrCreateType(BInfoType, Unit);
+         
+          // FIXME : name, size, align etc...
+          DIType DTy = 
+            DebugFactory.CreateDerivedType(DW_TAG_inheritance, Unit,"", Unit, 0,0,0, 
+                                           getInt64(BINFO_OFFSET(BInfo), 0),
+                                           0, BaseClass);
+          EltTys.push_back(DTy);
         }
       }
 
@@ -690,9 +576,7 @@
 
         // Get the location of the member.
         expanded_location MemLoc = GetNodeLocation(Member, false);
-        CompileUnitDesc *MemFile = MemLoc.line ?
-                                   getOrCreateCompileUnit(MemLoc.file) :
-                                   NULL;
+        DICompileUnit MemFile = getOrCreateCompileUnit(MemLoc.file);
 
         if (TREE_CODE(Member) == FIELD_DECL) {
           if (DECL_FIELD_OFFSET(Member) == 0 ||
@@ -700,78 +584,51 @@
             // FIXME: field with variable position, skip it for now.
             continue;
 
-          DerivedTypeDesc *MemberDesc = new DerivedTypeDesc(DW_TAG_member);
           // Field type is the declared type of the field.
           tree FieldNodeType = FieldType(Member);
-          TypeDesc *MemberType = getOrCreateType(FieldNodeType, Unit);
+          DIType MemberType = getOrCreateType(FieldNodeType, Unit);
           const char *MemberName = GetNodeName(Member);
           
-          MemberDesc->setName(MemberName);
-          MemberDesc->setFile(MemFile);
-          MemberDesc->setLine(MemLoc.line);
-          MemberDesc->setFromType(MemberType);
-          MemberDesc->setSize(NodeSizeInBits(Member));
-          MemberDesc->setAlign(NodeAlignInBits(FieldNodeType));
-          MemberDesc->setOffset(int_bit_position(Member));
-          
-          if (TREE_PROTECTED(Member)) {
-            MemberDesc->setIsProtected();
-          } else if (TREE_PRIVATE(Member)) {
-            MemberDesc->setIsPrivate();
-          }
-
-          Elements.push_back(MemberDesc);
-        } else if (TREE_CODE(Member) == VAR_DECL) {
-          GlobalVariableDesc *Static = new GlobalVariableDesc();
-
-          // Get name information.
-          GetGlobalNames(Member, Static);
-
-          TypeDesc *TyD = getOrCreateType(TREE_TYPE(Member), Unit);
-          
-          // Fill in the blanks.
-          Static->setContext(Unit);
-          Static->setFile(MemFile);
-          Static->setLine(MemLoc.line);
-          Static->setType(TyD);
-          Static->setIsDefinition(false);
-          Static->setIsStatic(!TREE_PUBLIC(Member));
-
-          Elements.push_back(Static);
+          DIType DTy =
+            DebugFactory.CreateDerivedType(DW_TAG_member, Unit, MemberName,
+                                           Unit, MemLoc.line, NodeSizeInBits(Member),
+                                           NodeAlignInBits(FieldNodeType),
+                                           0, 0, MemberType);
+          EltTys.push_back(DTy);
         } else {
-          // FIXME - ignoring others for the time being.
+          DEBUGASSERT(0 && "Unsupported member tree code!");
         }
       }
+
       for (tree Member = TYPE_METHODS(type); Member;
                 Member = TREE_CHAIN(Member)) {
                 
         if (DECL_ABSTRACT_ORIGIN (Member)) continue;
-                
-        // Create subprogram descriptor.
-        Subprogram = new SubprogramDesc();
-        
-        // Get name information.
-        GetGlobalNames(Member, Subprogram);
-        
-        // Get function type.
-        TypeDesc *SPTy = getOrCreateType(TREE_TYPE(Member), Unit);
-
-        if (TREE_PROTECTED(Member)) {
-          SPTy->setIsProtected();
-        } else if (TREE_PRIVATE(Member)) {
-          SPTy->setIsPrivate();
-        }
 
-        Subprogram->setContext(Unit);
-        Subprogram->setFile(Unit);
-        Subprogram->setLine(CurLineNo);
-        Subprogram->setType(SPTy);
-        Subprogram->setIsStatic(!TREE_PUBLIC(Member));
-        Subprogram->setIsDefinition(false);
+        const char *MemberName = GetNodeName(Member);                
+        expanded_location MemLoc = GetNodeLocation(Member, false);
+        DIType SPTy = getOrCreateType(TREE_TYPE(Member), Unit);
+        DISubprogram SP = 
+          DebugFactory.CreateSubprogram(Unit, MemberName, MemberName,
+                                        MemberName, Unit, MemLoc.line,
+                                        SPTy, false, false);
+
+        EltTys.push_back(SP);
+      }
+
+      llvm::DIArray Elements =
+        DebugFactory.GetOrCreateArray(&EltTys[0], EltTys.size());
+      
+      llvm::DIType RealDecl =
+        DebugFactory.CreateCompositeType(Tag, Unit, TypeName, Unit, Loc.line, Size,
+                                         Align, 0, 0, llvm::DIType(), Elements);
+
+      // Now that we have a real decl for the struct, replace anything using the
+      // old decl with the new one.  This will recursively update the debug info.
+      FwdDecl.getGV()->replaceAllUsesWith(RealDecl.getGV());
+      FwdDecl.getGV()->eraseFromParent();
+      Ty = RealDecl;
 
-        Elements.push_back(Subprogram);
-      }
-      
       break;
     }
 
@@ -779,155 +636,85 @@
     case REAL_TYPE:   
     case COMPLEX_TYPE:
     case BOOLEAN_TYPE: {
-      // char, short, int, long long, bool, float, double.
-      BasicTypeDesc *BTy = new BasicTypeDesc();
-      Ty = BTy;
-      // Any other use of the type should include the qualifiers.
-      TypeCache[type] = AddTypeQualifiers(type, Unit, BTy);
-      // The encoding specific to the type.
+
       unsigned Encoding = 0;
 
       switch (TREE_CODE(type)) {
-      case INTEGER_TYPE:
-        if (TYPE_STRING_FLAG (type)) {
-          if (TYPE_UNSIGNED (type))
-            Encoding = DW_ATE_unsigned_char;
+        case INTEGER_TYPE:
+          if (TYPE_STRING_FLAG (type)) {
+            if (TYPE_UNSIGNED (type))
+              Encoding = DW_ATE_unsigned_char;
+            else
+              Encoding = DW_ATE_signed_char;
+          }
+          else if (TYPE_UNSIGNED (type))
+            Encoding = DW_ATE_unsigned;
           else
-            Encoding = DW_ATE_signed_char;
-        }
-        else if (TYPE_UNSIGNED (type))
-          Encoding = DW_ATE_unsigned;
-        else
+            Encoding = DW_ATE_signed;
+          break;
+        case REAL_TYPE:
+          Encoding = DW_ATE_float;
+          break;
+        case COMPLEX_TYPE:
+          Encoding = TREE_CODE(TREE_TYPE(type)) == REAL_TYPE ?
+            DW_ATE_complex_float : DW_ATE_lo_user;
+          break;
+        case BOOLEAN_TYPE:
+          Encoding = DW_ATE_boolean;
+          break;
+        default: { 
+          DEBUGASSERT(0 && "Basic type case missing");
           Encoding = DW_ATE_signed;
-        break;
-      case REAL_TYPE:
-        Encoding = DW_ATE_float;
-        break;
-      case COMPLEX_TYPE:
-        Encoding = TREE_CODE(TREE_TYPE(type)) == REAL_TYPE ?
-                             DW_ATE_complex_float : DW_ATE_lo_user;
-        break;
-      case BOOLEAN_TYPE:
-        Encoding = DW_ATE_boolean;
-        break;
-      default: { 
-        DEBUGASSERT(0 && "Basic type case missing");
-        Encoding = DW_ATE_signed;
-        Size = BITS_PER_WORD;
-        Align = BITS_PER_WORD;
-        break;
-      }
+          Size = BITS_PER_WORD;
+          Align = BITS_PER_WORD;
+          break;
+        }
       }
-      
-      BTy->setEncoding(Encoding);
-      // Don't associate basic type with a location.
-      Loc.line = 0;
-    }
+      Ty = DebugFactory.CreateBasicType(Unit, TypeName, Unit, 0, Size, Align,
+                                        Offset, 0, Encoding);
     }
   }
-
-  // If the type is defined, fill in teh details.
-  if (Ty) {
-    CompileUnitDesc *File = Loc.line ? getOrCreateCompileUnit(Loc.file) : NULL;
- 
-    Ty->setContext(Unit);
-    Ty->setName(TypeName);
-    Ty->setFile(File);
-    Ty->setLine(Loc.line);
-    Ty->setSize(Size);
-    Ty->setAlign(Align);
-    Ty->setOffset(Offset);
-  }
-
-  DEBUGASSERT(TypeCache[type] && "Unimplemented type");
-  return TypeCache[type];
+  TypeCache[type] = Ty;
+  return Ty;
 }
 
 /// getOrCreateCompileUnit - Get the compile unit from the cache or create a new
 /// one if necessary.
-CompileUnitDesc *DebugInfo::getOrCreateCompileUnit(const std::string &FullPath){
+DICompileUnit DebugInfo::getOrCreateCompileUnit(const std::string &FullPath){
   // See if this compile unit has been used before.
-  CompileUnitDesc *&Slot = CompileUnitCache[FullPath];
-  if (Slot) return Slot;
-
-  // Create new compile unit.
-  CompileUnitDesc *Unit = new CompileUnitDesc();
-
-  // Make sure we have an anchor.
-  if (!CompileUnitAnchor) {
-    CompileUnitAnchor = new AnchorDesc(Unit);
-  }
+  DICompileUnit &Slot = CompileUnitCache[FullPath];
+  if (!Slot.isNull()) return Slot;
 
   // Get source file information.
   std::string Directory;
   std::string FileName;
   DirectoryAndFile(FullPath, Directory, FileName);
   
-  Unit->setAnchor(CompileUnitAnchor);
-  Unit->setFileName(FileName);
-  Unit->setDirectory(Directory);
-  
-  // Set up producer name.
-  Unit->setProducer(version_string);
-
   // Set up Language number.
-  unsigned Language;
+  unsigned LangTag;
   const std::string LanguageName(lang_hooks.name);
   if (LanguageName == "GNU C")
-    Unit->setLanguage(DW_LANG_C89);
+    LangTag = DW_LANG_C89;
   else if (LanguageName == "GNU C++")
-    Unit->setLanguage(DW_LANG_C_plus_plus);
+    LangTag = DW_LANG_C_plus_plus;
   else if (LanguageName == "GNU Ada")
-    Unit->setLanguage(DW_LANG_Ada95);
+    LangTag = DW_LANG_Ada95;
   else if (LanguageName == "GNU F77")
-    Unit->setLanguage(DW_LANG_Fortran77);
+    LangTag = DW_LANG_Fortran77;
   else if (LanguageName == "GNU Pascal")
-    Unit->setLanguage(DW_LANG_Pascal83);
+    LangTag = DW_LANG_Pascal83;
   else if (LanguageName == "GNU Java")
-    Unit->setLanguage(DW_LANG_Java);
+    LangTag = DW_LANG_Java;
   else if (LanguageName == "GNU Objective-C")
-    Unit->setLanguage(DW_LANG_ObjC);
+    LangTag = DW_LANG_ObjC;
   else if (LanguageName == "GNU Objective-C++") 
-    Unit->setLanguage(DW_LANG_ObjC_plus_plus);
+    LangTag = DW_LANG_ObjC_plus_plus;
   else
-    Unit->setLanguage(DW_LANG_C89);
-    
-  // Update cache.
-  Slot = Unit;
-  
-  return Unit;
-}
-
-/// readLLVMDebugInfo - Read debug info from PCH file. TheModule already
-/// represents module read from PCH file. Restore AnchorDesc from PCH file.
-void DebugInfo::readLLVMDebugInfo() {
-  MachineModuleInfo MMI;
-  MMI.AnalyzeModule(*TheModule);
+    LangTag = DW_LANG_C89;
 
-  std::vector Subprograms;
-  MMI.getAnchoredDescriptors(*TheModule, Subprograms);
-
-  if (!Subprograms.empty())
-    SubprogramAnchor = Subprograms[0]->getAnchor();
-
-  std::vector CUs;
-  MMI.getAnchoredDescriptors(*TheModule, CUs);
-
-  if (!CUs.empty())
-    CompileUnitAnchor = CUs[0]->getAnchor();
-
-  std::vector GVs;
-  MMI.getAnchoredDescriptors(*TheModule, GVs);
-
-  if (!GVs.empty())
-    GlobalVariableAnchor = GVs[0]->getAnchor();
-
-  const std::map &GlobalDescs
-    = MMI.getDIDeserializer()->getGlobalDescs();
-  for (std::map::const_iterator 
-         I = GlobalDescs.begin(), E = GlobalDescs.end(); I != E; ++I) 
-    SR.addDescriptor(I->second, I->first);
+  return Slot = DebugFactory.CreateCompileUnit(LangTag, FileName, Directory, 
+                                               version_string);
 }
-  
+
 /* LLVM LOCAL end (ENTIRE FILE!)  */
 

Modified: llvm-gcc-4.2/trunk/gcc/llvm-debug.h
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-debug.h?rev=60908&r1=60907&r2=60908&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-debug.h (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-debug.h Thu Dec 11 17:22:08 2008
@@ -28,7 +28,8 @@
 #ifndef LLVM_DEBUG_H
 #define LLVM_DEBUG_H
 
-#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/Analysis/DebugInfo.h"
+#include "llvm/Support/Dwarf.h"
 
 extern "C" {
 #include "llvm.h"
@@ -36,6 +37,7 @@
 
 #include 
 #include 
+#include 
 
 namespace llvm {
 
@@ -51,16 +53,16 @@
 class DebugInfo {
 private:
   Module *M;                            // The current module.
-  DISerializer SR;                      // Debug information serializer.
+  DIFactory DebugFactory;               
   const char *CurFullPath;              // Previous location file encountered.
   int CurLineNo;                        // Previous location line# encountered.
   const char *PrevFullPath;             // Previous location file encountered.
   int PrevLineNo;                       // Previous location line# encountered.
   BasicBlock *PrevBB;                   // Last basic block encountered.
-  std::map CompileUnitCache;
+  std::map CompileUnitCache;
                                         // Cache of previously constructed 
                                         // CompileUnits.
-  DenseMap TypeCache;
+  std::map TypeCache;
                                         // Cache of previously constructed 
                                         // Types.
   Function *StopPointFn;                // llvm.dbg.stoppoint
@@ -68,12 +70,8 @@
   Function *RegionStartFn;              // llvm.dbg.region.start
   Function *RegionEndFn;                // llvm.dbg.region.end
   Function *DeclareFn;                  // llvm.dbg.declare
-  AnchorDesc *CompileUnitAnchor;        // Anchor for compile units.
-  AnchorDesc *GlobalVariableAnchor;     // Anchor for global variables.
-  AnchorDesc *SubprogramAnchor;         // Anchor for subprograms.
-  std::vector RegionStack;
+  std::vector RegionStack;
                                         // Stack to track declarative scopes.
-  SubprogramDesc *Subprogram;           // Current subprogram.                                        
   
 public:
   DebugInfo(Module *m);
@@ -82,14 +80,6 @@
   void setLocationFile(const char *FullPath) { CurFullPath = FullPath; }
   void setLocationLine(int LineNo)           { CurLineNo = LineNo; }
   
-  /// getValueFor - Return a llvm representation for a given debug information
-  /// descriptor.
-  Value *getValueFor(DebugInfoDesc *DD);
-  
-  /// getCastValueFor - Return a llvm representation for a given debug 
-  /// information descriptor cast to an empty struct pointer.
-  Value *getCastValueFor(DebugInfoDesc *DD);
-
   /// EmitFunctionStart - Constructs the debug code for entering a function -
   /// "llvm.dbg.func.start."
   void EmitFunctionStart(tree_node *FnDecl, Function *Fn, BasicBlock *CurBB);
@@ -118,19 +108,12 @@
 
   /// getOrCreateType - Get the type from the cache or create a new type if
   /// necessary.
-  TypeDesc *getOrCreateType(tree_node *type, CompileUnitDesc *Unit);
-
-  /// AddTypeQualifiers - Add const/volatile qualifiers prior to the type
-  /// descriptor.
-  TypeDesc *AddTypeQualifiers(tree_node *type, CompileUnitDesc *Unit,
-                              TypeDesc *TyDesc);
+  DIType getOrCreateType(tree_node *type, DICompileUnit Unit);
 
   /// getOrCreateCompileUnit - Get the compile unit from the cache or create a
   /// new one if necessary.
-  CompileUnitDesc *getOrCreateCompileUnit(const std::string &FullPath);
-
-  /// readLLVMDebugInfo - Read debug info from PCH file.
-  void readLLVMDebugInfo();
+  DICompileUnit getOrCreateCompileUnit(const std::string &FullPath);
+  
 };
 
 } // end namespace llvm

Modified: llvm-gcc-4.2/trunk/gcc/llvm-linker-hack.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-linker-hack.cpp?rev=60908&r1=60907&r2=60908&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-linker-hack.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-linker-hack.cpp Thu Dec 11 17:22:08 2008
@@ -23,6 +23,7 @@
 #include "llvm/Module.h"
 #include "llvm/ModuleProvider.h"
 #include "llvm/Analysis/Verifier.h"
+#include "llvm/Analysis/DebugInfo.h"
 #include "llvm/Assembly/PrintModulePass.h"
 #include "llvm/Target/TargetMachineRegistry.h"
 #include "llvm/Transforms/Scalar.h"
@@ -89,6 +90,7 @@
   llvm::createAddReadAttrsPass();
   llvm::createPrintModulePass(0);
 
+  llvm::DIFactory::DIFactory(*MP->getModule());
   std::string Err;
   llvm::TargetMachineRegistry::getClosestStaticTargetForModule(*MP->getModule(),
                                                                Err);




From foldr at codedgers.com  Thu Dec 11 17:24:40 2008
From: foldr at codedgers.com (Mikhail Glushenkov)
Date: Thu, 11 Dec 2008 23:24:40 -0000
Subject: [llvm-commits] [llvm] r60909 - in /llvm/trunk:
 docs/CompilerDriver.html docs/CompilerDriverTutorial.html docs/index.html
 docs/llvm-rst.css tools/llvmc/doc/LLVMC-Reference.rst
 tools/llvmc/doc/LLVMC-Tutorial.rst tools/llvmc/doc/Makefile
 tools/llvmc/doc/footer.html tools/llvmc/doc/llvm-rst.css
 tools/llvmc/doc/llvm.css
Message-ID: <200812112324.mBBNOfda011002@zion.cs.uiuc.edu>

Author: foldr
Date: Thu Dec 11 17:24:40 2008
New Revision: 60909

URL: http://llvm.org/viewvc/llvm-project?rev=60909&view=rev
Log:
Update the auto-generated llvmc documentation.

Added:
    llvm/trunk/docs/CompilerDriverTutorial.html
    llvm/trunk/docs/llvm-rst.css
      - copied, changed from r60902, llvm/trunk/tools/llvmc/doc/llvm.css
    llvm/trunk/tools/llvmc/doc/footer.html
    llvm/trunk/tools/llvmc/doc/llvm-rst.css
      - copied, changed from r60902, llvm/trunk/tools/llvmc/doc/llvm.css
Removed:
    llvm/trunk/tools/llvmc/doc/llvm.css
Modified:
    llvm/trunk/docs/CompilerDriver.html
    llvm/trunk/docs/index.html
    llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst
    llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst
    llvm/trunk/tools/llvmc/doc/Makefile

Modified: llvm/trunk/docs/CompilerDriver.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerDriver.html?rev=60909&r1=60908&r2=60909&view=diff

==============================================================================
--- llvm/trunk/docs/CompilerDriver.html (original)
+++ llvm/trunk/docs/CompilerDriver.html Thu Dec 11 17:24:40 2008
@@ -3,20 +3,22 @@
 
 
 
-
+
 Customizing LLVMC: Reference Manual
-
+
+
 
 
 
-
-Customizing LLVMC: Reference Manual
-
-
-  Note: This document is a work-in-progress.  Additions and clarifications
-  are welcome.
-
-
+Customizing LLVMC: Reference Manual
+
+++
+
+
+
+

Author: Mikhail Glushenkov <foldr@codedegers.com>
 LLVMC is a generic compiler driver, designed to be customizable and
 extensible. It plays the same role for LLVM as the gcc program
 does for GCC - LLVMC's job is essentially to transform a set of input
@@ -25,34 +27,46 @@
 are completely customizable - in fact, LLVMC knows nothing about the
 specifics of transformation (even the command-line options are mostly
 not hard-coded) and regards the transformation structure as an
-abstract graph. This makes it possible to adapt LLVMC for other
-purposes - for example, as a build tool for game resources.
-Because LLVMC employs TableGen [1] as its configuration language, you
+abstract graph. The structure of this graph is completely determined
+by plugins, which can be either statically or dynamically linked. This
+makes it possible to easily adapt LLVMC for other purposes - for
+example, as a build tool for game resources.
+Because LLVMC employs TableGen [1] as its configuration language, you
 need to be familiar with it to customize LLVMC.
 
+Contents
 
-Compiling with LLVMC
-Predefined options
-Customizing LLVMC: the compilation graph
-Writing a tool description
-Option list - specifying all options in a single place
-Using hooks and environment variables in the cmd_line property
-Conditional evaluation: the case expression
-Language map
-References
+Compiling with LLVMC
+Predefined options
+Compiling LLVMC plugins
+Customizing LLVMC: the compilation graph
+Describing options
+External options
+
+
+Conditional evaluation
+Writing a tool description
+Actions
+
+
+Language map
+More advanced topics
+Hooks and environment variables
+How plugins are loaded
+Debugging
+
+
+References
 
 
-
-Written by Mikhail Glushenkov
-
-
-Compiling with LLVMC
+
+Compiling with LLVMC
 LLVMC tries hard to be as compatible with gcc as possible,
 although there are some small differences. Most of the time, however,
 you shouldn't be able to notice them:
  $ # This works as expected:
-$ llvmc2 -O3 -Wall hello.cpp
+$ llvmc -O3 -Wall hello.cpp
 $ ./a.out
 hello
 
@@ -63,8 +77,8 @@
 extensions). If you want to force files ending with ".c" to compile as
 C++, use the -x option, just like you would do it with gcc:
 -$ llvmc2 -x c hello.cpp
-$ # hello.cpp is really a C file
+$ # hello.c is really a C++ file
+$ llvmc -x c++ hello.c
 $ ./a.out
 hello
 
@@ -72,25 +86,30 @@
 object files you should provide the --linker option since it's
 impossible for LLVMC to choose the right linker in that case:
 -$ llvmc2 -c hello.cpp
-$ llvmc2 hello.o
+$ llvmc -c hello.cpp
+$ llvmc hello.o
 [A lot of link-time errors skipped]
-$ llvmc2 --linker=c++ hello.o
+$ llvmc --linker=c++ hello.o
 $ ./a.out
 hello
 
+By default, LLVMC uses llvm-gcc to compile the source code. It is
+also possible to choose the work-in-progress clang compiler with
+the -clang option.
 
-
-Predefined options
+
+Predefined options
 LLVMC has some built-in options that can't be overridden in the
-configuration files:
+configuration libraries:
 
 -o FILE - Output file name.
 -x LANGUAGE - Specify the language of the following input files
 until the next -x option.
+-load PLUGIN_NAME - Load the specified plugin DLL. Example:
+-load $LLVM_DIR/Release/lib/LLVMCSimple.so.
 -v - Enable verbose mode, i.e. print out all executed commands.
 --view-graph - Show a graphical representation of the compilation
-graph. Requires that you have dot and gv commands
+graph. Requires that you have dot and gv programs
 installed. Hidden option, useful for debugging.
 --write-graph - Write a compilation-graph.dot file in the
 current directory with the compilation graph description in the
@@ -101,47 +120,91 @@
 their standard meaning.
 
 
-
-Customizing LLVMC: the compilation graph
-At the time of writing LLVMC does not support on-the-fly reloading of
-configuration, so to customize LLVMC you'll have to recompile the
-source code (which lives under $LLVM_DIR/tools/llvmc2). The
-default configuration files are Common.td (contains common
-definitions, don't forget to include it in your configuration
-files), Tools.td (tool descriptions) and Graph.td (compilation
-graph definition).
-To compile LLVMC with your own configuration file (say,``MyGraph.td``),
-run make like this:
--$ cd $LLVM_DIR/tools/llvmc2
-$ make GRAPH=MyGraph.td TOOLNAME=my_llvmc
-
-This will build an executable named my_llvmc. There are also
-several sample configuration files in the llvmc2/examples
-subdirectory that should help to get you started.
+
+Compiling LLVMC plugins
+It's easiest to start working on your own LLVMC plugin by copying the
+skeleton project which lives under $LLVMC_DIR/plugins/Simple:
++$ cd $LLVMC_DIR/plugins
+$ cp -r Simple MyPlugin
+$ cd MyPlugin
+$ ls
+Makefile PluginMain.cpp Simple.td
+
+As you can see, our basic plugin consists of only two files (not
+counting the build script). Simple.td contains TableGen
+description of the compilation graph; its format is documented in the
+following sections. PluginMain.cpp is just a helper file used to
+compile the auto-generated C++ code produced from TableGen source. It
+can also contain hook definitions (see below).
+The first thing that you should do is to change the LLVMC_PLUGIN
+variable in the Makefile to avoid conflicts (since this variable
+is used to name the resulting library):
++LLVMC_PLUGIN=MyPlugin
+
+It is also a good idea to rename Simple.td to something less
+generic:
++$ mv Simple.td MyPlugin.td
+
+Note that the plugin source directory must be placed under
+$LLVMC_DIR/plugins to make use of the existing build
+infrastructure. To build a version of the LLVMC executable called
+mydriver with your plugin compiled in, use the following command:
++$ cd $LLVMC_DIR
+$ make BUILTIN_PLUGINS=MyPlugin DRIVER_NAME=mydriver
+
+To build your plugin as a dynamic library, just cd to its source
+directory and run make. The resulting file will be called
+LLVMC$(LLVMC_PLUGIN).$(DLL_EXTENSION) (in our case,
+LLVMCMyPlugin.so). This library can be then loaded in with the
+-load option. Example:
++$ cd $LLVMC_DIR/plugins/Simple
+$ make
+$ llvmc -load $LLVM_DIR/Release/lib/LLVMCSimple.so
+
+Sometimes, you will want a 'bare-bones' version of LLVMC that has no
+built-in plugins. It can be compiled with the following command:
++$ cd $LLVMC_DIR
+$ make BUILTIN_PLUGINS=""
+
+
+
+Customizing LLVMC: the compilation graph
+Each TableGen configuration file should include the common
+definitions:
++include "llvm/CompilerDriver/Common.td"
+
 Internally, LLVMC stores information about possible source
 transformations in form of a graph. Nodes in this graph represent
 tools, and edges between two nodes represent a transformation path. A
 special "root" node is used to mark entry points for the
 transformations. LLVMC also assigns a weight to each edge (more on
 this later) to choose between several alternative edges.
-The definition of the compilation graph (see file Graph.td) is
-just a list of edges:
+The definition of the compilation graph (see file
+plugins/Base/Base.td for an example) is just a list of edges:
  def CompilationGraph : CompilationGraph<[
-    Edge<root, llvm_gcc_c>,
-    Edge<root, llvm_gcc_assembler>,
+    Edge<"root", "llvm_gcc_c">,
+    Edge<"root", "llvm_gcc_assembler">,
     ...
 
-    Edge<llvm_gcc_c, llc>,
-    Edge<llvm_gcc_cpp, llc>,
+    Edge<"llvm_gcc_c", "llc">,
+    Edge<"llvm_gcc_cpp", "llc">,
     ...
 
-    OptionalEdge<llvm_gcc_c, opt, [(switch_on "opt")]>,
-    OptionalEdge<llvm_gcc_cpp, opt, [(switch_on "opt")]>,
+    OptionalEdge<"llvm_gcc_c", "opt", (case (switch_on "opt"),
+                                      (inc_weight))>,
+    OptionalEdge<"llvm_gcc_cpp", "opt", (case (switch_on "opt"),
+                                              (inc_weight))>,
     ...
 
-    OptionalEdge<llvm_gcc_assembler, llvm_gcc_cpp_linker,
+    OptionalEdge<"llvm_gcc_assembler", "llvm_gcc_cpp_linker",
         (case (input_languages_contain "c++"), (inc_weight),
               (or (parameter_equals "linker", "g++"),
                   (parameter_equals "linker", "c++")), (inc_weight))>,
@@ -150,80 +213,50 @@
     ]>;
 
 As you can see, the edges can be either default or optional, where
-optional edges are differentiated by sporting a case expression
-used to calculate the edge's weight.
+optional edges are differentiated by an additional case expression
+used to calculate the weight of this edge. Notice also that we refer
+to tools via their names (as strings). This makes it possible to add
+edges to an existing compilation graph in plugins without having to
+know about all tool definitions used in the graph.
 The default edges are assigned a weight of 1, and optional edges get a
 weight of 0 + 2*N where N is the number of tests that evaluated to
 true in the case expression. It is also possible to provide an
 integer parameter to inc_weight and dec_weight - in this case,
 the weight is increased (or decreased) by the provided value instead
-of the default 2.
+of the default 2. It is also possible to change the default weight of
+an optional edge by using the default clause of the case
+construct.
 When passing an input file through the graph, LLVMC picks the edge
 with the maximum weight. To avoid ambiguity, there should be only one
 default edge between two nodes (with the exception of the root node,
 which gets a special treatment - there you are allowed to specify one
 default edge per language).
+When multiple plugins are loaded, their compilation graphs are merged
+together. Since multiple edges that have the same end nodes are not
+allowed (i.e. the graph is not a multigraph), an edge defined in
+several plugins will be replaced by the definition from the plugin
+that was loaded last. Plugin load order can be controlled by using the
+plugin priority feature described above.
 To get a visual representation of the compilation graph (useful for
-debugging), run llvmc2 --view-graph. You will need dot and
+debugging), run llvmc --view-graph. You will need dot and
 gsview installed for this to work properly.
 
-
-Writing a tool description
-As was said earlier, nodes in the compilation graph represent tools,
-which are described separately. A tool definition looks like this
-(taken from the Tools.td file):
+
+Describing options
+Command-line options that the plugin supports are defined by using an
+OptionList:
 -def llvm_gcc_cpp : Tool<[
-    (in_language "c++"),
-    (out_language "llvm-assembler"),
-    (output_suffix "bc"),
-    (cmd_line "llvm-g++ -c $INFILE -o $OUTFILE -emit-llvm"),
-    (sink)
-    ]>;
-
-This defines a new tool called llvm_gcc_cpp, which is an alias for
-llvm-g++. As you can see, a tool definition is just a list of
-properties; most of them should be self-explanatory. The sink
-property means that this tool should be passed all command-line
-options that lack explicit descriptions.
-The complete list of the currently implemented tool properties follows:
-
-Possible tool properties:
-in_language - input language name.
-out_language - output language name.
-output_suffix - output file suffix.
-cmd_line - the actual command used to run the tool. You can
-use $INFILE and $OUTFILE variables, output redirection
-with >, hook invocations ($CALL), environment variables
-(via $ENV) and the case construct (more on this below).
-join - this tool is a "join node" in the graph, i.e. it gets a
-list of input files and joins them together. Used for linkers.
-sink - all command-line options that are not handled by other
-tools are passed to this tool.
-
-
-
-The next tool definition is slightly more complex:
--def llvm_gcc_linker : Tool<[
-    (in_language "object-code"),
-    (out_language "executable"),
-    (output_suffix "out"),
-    (cmd_line "llvm-gcc $INFILE -o $OUTFILE"),
-    (join),
-    (prefix_list_option "L", (forward),
-                        (help "add a directory to link path")),
-    (prefix_list_option "l", (forward),
-                        (help "search a library when linking")),
-    (prefix_list_option "Wl", (unpack_values),
-                        (help "pass options to linker"))
-    ]>;
+def Options : OptionList<[
+(switch_option "E", (help "Help string")),
+(alias_option "quiet", "q")
+...
+]>;
 
-This tool has a "join" property, which means that it behaves like a
-linker. This tool also defines several command-line options: -l,
--L and -Wl which have their usual meaning. An option has two
-attributes: a name and a (possibly empty) list of properties. All
-currently implemented option types and properties are described below:
+As you can see, the option list is just a list of DAGs, where each DAG
+is an option description consisting of the option name and some
+properties. A plugin can define more than one option list (they are
+all merged together in the end), which can be handy if one wants to
+separate option groups syntactically.
 
 Possible option types:
 
@@ -247,88 +280,59 @@
 Possible option properties:
 
 
-append_cmd - append a string to the tool invocation command.
-forward - forward this option unchanged.
-output_suffix - modify the output suffix of this
-tool. Example : (switch "E", (output_suffix "i").
-stop_compilation - stop compilation after this phase.
-unpack_values - used for for splitting and forwarding
-comma-separated lists of options, e.g. -Wa,-foo=bar,-baz is
-converted to -foo=bar -baz and appended to the tool invocation
-command.
 help - help string associated with this option. Used for
 --help output.
 required - this option is obligatory.
+hidden - this option should not appear in the --help
+output (but should appear in the --help-hidden output).
+really_hidden - the option should not appear in any help
+output.
+extern - this option is defined in some other plugin, see below.
 
 
 
 
-
-
-Option list - specifying all options in a single place
-It can be handy to have all information about options gathered in a
-single place to provide an overview. This can be achieved by using a
-so-called OptionList:
+
+External options
+Sometimes, when linking several plugins together, one plugin needs to
+access options defined in some other plugin. Because of the way
+options are implemented, such options should be marked as
+extern. This is what the extern option property is
+for. Example:
 -def Options : OptionList<[
-(switch_option "E", (help "Help string")),
-(alias_option "quiet", "q")
 ...
-]>;
+(switch_option "E", (extern))
+...
 
-OptionList is also a good place to specify option aliases.
-Tool-specific option properties like append_cmd have (obviously)
-no meaning in the context of OptionList, so the only properties
-allowed there are help and required.
-Option lists are used at the file scope. See file
-examples/Clang.td for an example of OptionList usage.
+See also the section on plugin priorities.
 
-
-Using hooks and environment variables in the cmd_line property
-Normally, LLVMC executes programs from the system PATH. Sometimes,
-this is not sufficient: for example, we may want to specify tool names
-in the configuration file. This can be achieved via the mechanism of
-hooks - to compile LLVMC with your hooks, just drop a .cpp file into
-tools/llvmc2 directory. Hooks should live in the hooks
-namespace and have the signature std::string hooks::MyHookName
-(void). They can be used from the cmd_line tool property:
--(cmd_line "$CALL(MyHook)/path/to/file -o $CALL(AnotherHook)")
-
-It is also possible to use environment variables in the same manner:
--(cmd_line "$ENV(VAR1)/path/to/file -o $ENV(VAR2)")
-
-To change the command line string based on user-provided options use
-the case expression (documented below):
--(cmd_line
-  (case
-    (switch_on "E"),
-       "llvm-g++ -E -x c $INFILE -o $OUTFILE",
-    (default),
-       "llvm-g++ -c -x c $INFILE -o $OUTFILE -emit-llvm"))
-
 
-
-Conditional evaluation: the case expression
-The 'case' construct can be used to calculate weights of the optional
-edges and to choose between several alternative command line strings
-in the cmd_line tool property. It is designed after the
-similarly-named construct in functional languages and takes the form
-(case (test_1), statement_1, (test_2), statement_2, ... (test_N),
-statement_N). The statements are evaluated only if the corresponding
-tests evaluate to true.
+
+Conditional evaluation
+The 'case' construct is the main means by which programmability is
+achieved in LLVMC. It can be used to calculate edge weights, program
+actions and modify the shell commands to be executed. The 'case'
+expression is designed after the similarly-named construct in
+functional languages and takes the form (case (test_1), statement_1,
+(test_2), statement_2, ... (test_N), statement_N). The statements
+are evaluated only if the corresponding tests evaluate to true.
 Examples:
 +// Edge weight calculation
+
 // Increases edge weight by 5 if "-A" is provided on the
 // command-line, and by 5 more if "-B" is also provided.
 (case
     (switch_on "A"), (inc_weight 5),
     (switch_on "B"), (inc_weight 5))
 
-// Evaluates to "cmdline1" if option "-A" is provided on the
-// command line, otherwise to "cmdline2"
+
+// Tool command line specification
+
+// Evaluates to "cmdline1" if the option "-A" is provided on the
+// command line; to "cmdline2" if "-B" is provided;
+// otherwise to "cmdline3".
+
 (case
     (switch_on "A"), "cmdline1",
     (switch_on "B"), "cmdline2",
@@ -349,25 +353,25 @@
 use TableGen inheritance instead.
 
 Possible tests are:
-switch_on - Returns true if a given command-line option is
-provided by the user. Example: (switch_on "opt"). Note that
-you have to define all possible command-line options separately in
-the tool descriptions. See the next doc_text for the discussion of
-different kinds of command-line options.
+switch_on - Returns true if a given command-line switch is
+provided by the user. Example: (switch_on "opt").
 parameter_equals - Returns true if a command-line parameter equals
-a given value. Example: (parameter_equals "W", "all").
-element_in_list - Returns true if a command-line parameter list
-includes a given value. Example: (parameter_in_list "l", "pthread").
+a given value.
+Example: (parameter_equals "W", "all").
+element_in_list - Returns true if a command-line parameter
+list contains a given value.
+Example: (parameter_in_list "l", "pthread").
 input_languages_contain - Returns true if a given language
-belongs to the current input language set. Example:
-`(input_languages_contain "c++").
-in_language - Evaluates to true if the language of the input
-file equals to the argument. Valid only when using case
-expression in a cmd_line tool property. Example:
-`(in_language "c++").
+belongs to the current input language set.
+Example: (input_languages_contain "c++").
+in_language - Evaluates to true if the input file language
+equals to the argument. At the moment works only with cmd_line
+and actions (on non-join nodes).
+Example: (in_language "c++").
 not_empty - Returns true if a given option (which should be
 either a parameter or a parameter list) is set by the
-user. Example: `(not_empty "o").
+user.
+Example: (not_empty "o").
 default - Always evaluates to true. Should always be the last
 test in the case expression.
 and - A standard logical combinator that returns true iff all
@@ -381,13 +385,112 @@
 
 
 
-
-Language map
-One last thing that you will need to modify when adding support for a
-new language to LLVMC is the language map, which defines mappings from
-file extensions to language names. It is used to choose the proper
-toolchain(s) for a given input file set. Language map definition is
-located in the file Tools.td and looks like this:
+
+Writing a tool description
+As was said earlier, nodes in the compilation graph represent tools,
+which are described separately. A tool definition looks like this
+(taken from the include/llvm/CompilerDriver/Tools.td file):
++def llvm_gcc_cpp : Tool<[
+    (in_language "c++"),
+    (out_language "llvm-assembler"),
+    (output_suffix "bc"),
+    (cmd_line "llvm-g++ -c $INFILE -o $OUTFILE -emit-llvm"),
+    (sink)
+    ]>;
+
+This defines a new tool called llvm_gcc_cpp, which is an alias for
+llvm-g++. As you can see, a tool definition is just a list of
+properties; most of them should be self-explanatory. The sink
+property means that this tool should be passed all command-line
+options that aren't mentioned in the option list.
+The complete list of all currently implemented tool properties follows.
+
+Possible tool properties:
+in_language - input language name. Can be either a string or a
+list, in case the tool supports multiple input languages.
+out_language - output language name. Tools are not allowed to
+have multiple output languages.
+output_suffix - output file suffix. Can also be changed
+dynamically, see documentation on actions.
+cmd_line - the actual command used to run the tool. You can
+use $INFILE and $OUTFILE variables, output redirection
+with >, hook invocations ($CALL), environment variables
+(via $ENV) and the case construct.
+join - this tool is a "join node" in the graph, i.e. it gets a
+list of input files and joins them together. Used for linkers.
+sink - all command-line options that are not handled by other
+tools are passed to this tool.
+actions - A single big case expression that specifies how
+this tool reacts on command-line options (described in more detail
+below).
+
+
+
+
+Actions
+A tool often needs to react to command-line options, and this is
+precisely what the actions property is for. The next example
+illustrates this feature:
++def llvm_gcc_linker : Tool<[
+    (in_language "object-code"),
+    (out_language "executable"),
+    (output_suffix "out"),
+    (cmd_line "llvm-gcc $INFILE -o $OUTFILE"),
+    (join),
+    (actions (case (not_empty "L"), (forward "L"),
+                   (not_empty "l"), (forward "l"),
+                   (not_empty "dummy"),
+                             [(append_cmd "-dummy1"), (append_cmd "-dummy2")])
+    ]>;
+
+The actions tool property is implemented on top of the omnipresent
+case expression. It associates one or more different actions
+with given conditions - in the example, the actions are forward,
+which forwards a given option unchanged, and append_cmd, which
+appends a given string to the tool execution command. Multiple actions
+can be associated with a single condition by using a list of actions
+(used in the example to append some dummy options). The same case
+construct can also be used in the cmd_line property to modify the
+tool command line.
+The "join" property used in the example means that this tool behaves
+like a linker.
+The list of all possible actions follows.
+
+Possible actions:
+
+
+append_cmd - append a string to the tool invocation
+command.
+Example: (case (switch_on "pthread"), (append_cmd "-lpthread"))
+forward - forward an option unchanged.
+Example: (forward "Wall").
+forward_as - Change the name of an option, but forward the
+argument unchanged.
+Example: (forward_as "O0" "--disable-optimization").
+output_suffix - modify the output suffix of this
+tool.
+Example: (output_suffix "i").
+stop_compilation - stop compilation after this tool processes
+its input. Used without arguments.
+unpack_values - used for for splitting and forwarding
+comma-separated lists of options, e.g. -Wa,-foo=bar,-baz is
+converted to -foo=bar -baz and appended to the tool invocation
+command.
+Example: (unpack_values "Wa,").
+
+
+
+
+
+
+
+Language map
+If you are adding support for a new language to LLVMC, you'll need to
+modify the language map, which defines mappings from file extensions
+to language names. It is used to choose the proper toolchain(s) for a
+given input file set. Language map definition looks like this:
  def LanguageMap : LanguageMap<
     [LangToSuffixes<"c++", ["cc", "cp", "cxx", "cpp", "CPP", "c++", "C"]>,
@@ -395,26 +498,106 @@
      ...
     ]>;
 
+For example, without those definitions the following command wouldn't work:
++$ llvmc hello.cpp
+llvmc: Unknown suffix: cpp
+
+The language map entries should be added only for tools that are
+linked with the root node. Since tools are not allowed to have
+multiple output languages, for nodes "inside" the graph the input and
+output languages should match. This is enforced at compile-time.
+
+
+More advanced topics
+
+Hooks and environment variables
+Normally, LLVMC executes programs from the system PATH. Sometimes,
+this is not sufficient: for example, we may want to specify tool names
+in the configuration file. This can be achieved via the mechanism of
+hooks - to write your own hooks, just add their definitions to the
+PluginMain.cpp or drop a .cpp file into the
+$LLVMC_DIR/driver directory. Hooks should live in the hooks
+namespace and have the signature std::string hooks::MyHookName
+(void). They can be used from the cmd_line tool property:
++(cmd_line "$CALL(MyHook)/path/to/file -o $CALL(AnotherHook)")
+
+It is also possible to use environment variables in the same manner:
++(cmd_line "$ENV(VAR1)/path/to/file -o $ENV(VAR2)")
+
+To change the command line string based on user-provided options use
+the case expression (documented above):
++(cmd_line
+  (case
+    (switch_on "E"),
+       "llvm-g++ -E -x c $INFILE -o $OUTFILE",
+    (default),
+       "llvm-g++ -c -x c $INFILE -o $OUTFILE -emit-llvm"))
+
 
-
-References
-
+
+How plugins are loaded
+It is possible for LLVMC plugins to depend on each other. For example,
+one can create edges between nodes defined in some other plugin. To
+make this work, however, that plugin should be loaded first. To
+achieve this, the concept of plugin priority was introduced. By
+default, every plugin has priority zero; to specify the priority
+explicitly, put the following line in your plugin's TableGen file:
++def Priority : PluginPriority<$PRIORITY_VALUE>;
+# Where PRIORITY_VALUE is some integer > 0
+
+Plugins are loaded in order of their (increasing) priority, starting
+with 0. Therefore, the plugin with the highest priority value will be
+loaded last.
+
+
+Debugging
+When writing LLVMC plugins, it can be useful to get a visual view of
+the resulting compilation graph. This can be achieved via the command
+line option --view-graph. This command assumes that Graphviz [2] and
+Ghostview [3] are installed. There is also a --dump-graph option that
+creates a Graphviz source file(compilation-graph.dot) in the
+current directory.
+
+
+
+References
+

-
 
 [1] TableGen Fundamentals
+
[1] TableGen Fundamentals
 http://llvm.cs.uiuc.edu/docs/TableGenFundamentals.html
 
 
-
-
-
+
+
+
+
+
+[2] Graphviz
+http://www.graphviz.org/
+
+
+
+
+
+[3] Ghostview
+http://pages.cs.wisc.edu/~ghost/
+
 
-  
-  
-  The LLVM Compiler Infrastructure

-  Last modified: $Date$
+  
+  
+
+  Mikhail Glushenkov

+  LLVM Compiler Infrastructure

+
+  Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $
 
+
+
 
 

Added: llvm/trunk/docs/CompilerDriverTutorial.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerDriverTutorial.html?rev=60909&view=auto

==============================================================================
--- llvm/trunk/docs/CompilerDriverTutorial.html (added)
+++ llvm/trunk/docs/CompilerDriverTutorial.html Thu Dec 11 17:24:40 2008
@@ -0,0 +1,603 @@
+
+
+
+
+
+
+Customizing LLVMC: Reference Manual
+
+
+
+
+
+Customizing LLVMC: Reference Manual
+
+++
+
+
+
+

Author: Mikhail Glushenkov <foldr@codedegers.com>
+LLVMC is a generic compiler driver, designed to be customizable and
+extensible. It plays the same role for LLVM as the gcc program
+does for GCC - LLVMC's job is essentially to transform a set of input
+files into a set of targets depending on configuration rules and user
+options. What makes LLVMC different is that these transformation rules
+are completely customizable - in fact, LLVMC knows nothing about the
+specifics of transformation (even the command-line options are mostly
+not hard-coded) and regards the transformation structure as an
+abstract graph. The structure of this graph is completely determined
+by plugins, which can be either statically or dynamically linked. This
+makes it possible to easily adapt LLVMC for other purposes - for
+example, as a build tool for game resources.
+Because LLVMC employs TableGen [1] as its configuration language, you
+need to be familiar with it to customize LLVMC.
+
+Contents
+
+Compiling with LLVMC
+Predefined options
+Compiling LLVMC plugins
+Customizing LLVMC: the compilation graph
+Describing options
+External options
+
+
+Conditional evaluation
+Writing a tool description
+Actions
+
+
+Language map
+More advanced topics
+Hooks and environment variables
+How plugins are loaded
+Debugging
+
+
+References
+
+
+
+Compiling with LLVMC
+LLVMC tries hard to be as compatible with gcc as possible,
+although there are some small differences. Most of the time, however,
+you shouldn't be able to notice them:
++$ # This works as expected:
+$ llvmc -O3 -Wall hello.cpp
+$ ./a.out
+hello
+
+One nice feature of LLVMC is that one doesn't have to distinguish
+between different compilers for different languages (think g++ and
+gcc) - the right toolchain is chosen automatically based on input
+language names (which are, in turn, determined from file
+extensions). If you want to force files ending with ".c" to compile as
+C++, use the -x option, just like you would do it with gcc:
++$ # hello.c is really a C++ file
+$ llvmc -x c++ hello.c
+$ ./a.out
+hello
+
+On the other hand, when using LLVMC as a linker to combine several C++
+object files you should provide the --linker option since it's
+impossible for LLVMC to choose the right linker in that case:
++$ llvmc -c hello.cpp
+$ llvmc hello.o
+[A lot of link-time errors skipped]
+$ llvmc --linker=c++ hello.o
+$ ./a.out
+hello
+
+By default, LLVMC uses llvm-gcc to compile the source code. It is
+also possible to choose the work-in-progress clang compiler with
+the -clang option.
+
+
+Predefined options
+LLVMC has some built-in options that can't be overridden in the
+configuration libraries:
+
+-o FILE - Output file name.
+-x LANGUAGE - Specify the language of the following input files
+until the next -x option.
+-load PLUGIN_NAME - Load the specified plugin DLL. Example:
+-load $LLVM_DIR/Release/lib/LLVMCSimple.so.
+-v - Enable verbose mode, i.e. print out all executed commands.
+--view-graph - Show a graphical representation of the compilation
+graph. Requires that you have dot and gv programs
+installed. Hidden option, useful for debugging.
+--write-graph - Write a compilation-graph.dot file in the
+current directory with the compilation graph description in the
+Graphviz format. Hidden option, useful for debugging.
+--save-temps - Write temporary files to the current directory
+and do not delete them on exit. Hidden option, useful for debugging.
+--help, --help-hidden, --version - These options have
+their standard meaning.
+
+
+
+Compiling LLVMC plugins
+It's easiest to start working on your own LLVMC plugin by copying the
+skeleton project which lives under $LLVMC_DIR/plugins/Simple:
++$ cd $LLVMC_DIR/plugins
+$ cp -r Simple MyPlugin
+$ cd MyPlugin
+$ ls
+Makefile PluginMain.cpp Simple.td
+
+As you can see, our basic plugin consists of only two files (not
+counting the build script). Simple.td contains TableGen
+description of the compilation graph; its format is documented in the
+following sections. PluginMain.cpp is just a helper file used to
+compile the auto-generated C++ code produced from TableGen source. It
+can also contain hook definitions (see below).
+The first thing that you should do is to change the LLVMC_PLUGIN
+variable in the Makefile to avoid conflicts (since this variable
+is used to name the resulting library):
++LLVMC_PLUGIN=MyPlugin
+
+It is also a good idea to rename Simple.td to something less
+generic:
++$ mv Simple.td MyPlugin.td
+
+Note that the plugin source directory must be placed under
+$LLVMC_DIR/plugins to make use of the existing build
+infrastructure. To build a version of the LLVMC executable called
+mydriver with your plugin compiled in, use the following command:
++$ cd $LLVMC_DIR
+$ make BUILTIN_PLUGINS=MyPlugin DRIVER_NAME=mydriver
+
+To build your plugin as a dynamic library, just cd to its source
+directory and run make. The resulting file will be called
+LLVMC$(LLVMC_PLUGIN).$(DLL_EXTENSION) (in our case,
+LLVMCMyPlugin.so). This library can be then loaded in with the
+-load option. Example:
++$ cd $LLVMC_DIR/plugins/Simple
+$ make
+$ llvmc -load $LLVM_DIR/Release/lib/LLVMCSimple.so
+
+Sometimes, you will want a 'bare-bones' version of LLVMC that has no
+built-in plugins. It can be compiled with the following command:
++$ cd $LLVMC_DIR
+$ make BUILTIN_PLUGINS=""
+
+
+
+Customizing LLVMC: the compilation graph
+Each TableGen configuration file should include the common
+definitions:
++include "llvm/CompilerDriver/Common.td"
+
+Internally, LLVMC stores information about possible source
+transformations in form of a graph. Nodes in this graph represent
+tools, and edges between two nodes represent a transformation path. A
+special "root" node is used to mark entry points for the
+transformations. LLVMC also assigns a weight to each edge (more on
+this later) to choose between several alternative edges.
+The definition of the compilation graph (see file
+plugins/Base/Base.td for an example) is just a list of edges:
++def CompilationGraph : CompilationGraph<[
+    Edge<"root", "llvm_gcc_c">,
+    Edge<"root", "llvm_gcc_assembler">,
+    ...
+
+    Edge<"llvm_gcc_c", "llc">,
+    Edge<"llvm_gcc_cpp", "llc">,
+    ...
+
+    OptionalEdge<"llvm_gcc_c", "opt", (case (switch_on "opt"),
+                                      (inc_weight))>,
+    OptionalEdge<"llvm_gcc_cpp", "opt", (case (switch_on "opt"),
+                                              (inc_weight))>,
+    ...
+
+    OptionalEdge<"llvm_gcc_assembler", "llvm_gcc_cpp_linker",
+        (case (input_languages_contain "c++"), (inc_weight),
+              (or (parameter_equals "linker", "g++"),
+                  (parameter_equals "linker", "c++")), (inc_weight))>,
+    ...
+
+    ]>;
+
+As you can see, the edges can be either default or optional, where
+optional edges are differentiated by an additional case expression
+used to calculate the weight of this edge. Notice also that we refer
+to tools via their names (as strings). This makes it possible to add
+edges to an existing compilation graph in plugins without having to
+know about all tool definitions used in the graph.
+The default edges are assigned a weight of 1, and optional edges get a
+weight of 0 + 2*N where N is the number of tests that evaluated to
+true in the case expression. It is also possible to provide an
+integer parameter to inc_weight and dec_weight - in this case,
+the weight is increased (or decreased) by the provided value instead
+of the default 2. It is also possible to change the default weight of
+an optional edge by using the default clause of the case
+construct.
+When passing an input file through the graph, LLVMC picks the edge
+with the maximum weight. To avoid ambiguity, there should be only one
+default edge between two nodes (with the exception of the root node,
+which gets a special treatment - there you are allowed to specify one
+default edge per language).
+When multiple plugins are loaded, their compilation graphs are merged
+together. Since multiple edges that have the same end nodes are not
+allowed (i.e. the graph is not a multigraph), an edge defined in
+several plugins will be replaced by the definition from the plugin
+that was loaded last. Plugin load order can be controlled by using the
+plugin priority feature described above.
+To get a visual representation of the compilation graph (useful for
+debugging), run llvmc --view-graph. You will need dot and
+gsview installed for this to work properly.
+
+
+Describing options
+Command-line options that the plugin supports are defined by using an
+OptionList:
++def Options : OptionList<[
+(switch_option "E", (help "Help string")),
+(alias_option "quiet", "q")
+...
+]>;
+
+As you can see, the option list is just a list of DAGs, where each DAG
+is an option description consisting of the option name and some
+properties. A plugin can define more than one option list (they are
+all merged together in the end), which can be handy if one wants to
+separate option groups syntactically.
+
+Possible option types:
+
+
+switch_option - a simple boolean switch, for example -time.
+parameter_option - option that takes an argument, for example
+-std=c99;
+parameter_list_option - same as the above, but more than one
+occurence of the option is allowed.
+prefix_option - same as the parameter_option, but the option name
+and parameter value are not separated.
+prefix_list_option - same as the above, but more than one
+occurence of the option is allowed; example: -lm -lpthread.
+alias_option - a special option type for creating
+aliases. Unlike other option types, aliases are not allowed to
+have any properties besides the aliased option name. Usage
+example: (alias_option "preprocess", "E")
+
+
+
+Possible option properties:
+
+
+help - help string associated with this option. Used for
+--help output.
+required - this option is obligatory.
+hidden - this option should not appear in the --help
+output (but should appear in the --help-hidden output).
+really_hidden - the option should not appear in any help
+output.
+extern - this option is defined in some other plugin, see below.
+
+
+
+
+
+External options
+Sometimes, when linking several plugins together, one plugin needs to
+access options defined in some other plugin. Because of the way
+options are implemented, such options should be marked as
+extern. This is what the extern option property is
+for. Example:
++...
+(switch_option "E", (extern))
+...
+
+See also the section on plugin priorities.
+
+
+
+Conditional evaluation
+The 'case' construct is the main means by which programmability is
+achieved in LLVMC. It can be used to calculate edge weights, program
+actions and modify the shell commands to be executed. The 'case'
+expression is designed after the similarly-named construct in
+functional languages and takes the form (case (test_1), statement_1,
+(test_2), statement_2, ... (test_N), statement_N). The statements
+are evaluated only if the corresponding tests evaluate to true.
+Examples:
++// Edge weight calculation
+
+// Increases edge weight by 5 if "-A" is provided on the
+// command-line, and by 5 more if "-B" is also provided.
+(case
+    (switch_on "A"), (inc_weight 5),
+    (switch_on "B"), (inc_weight 5))
+
+
+// Tool command line specification
+
+// Evaluates to "cmdline1" if the option "-A" is provided on the
+// command line; to "cmdline2" if "-B" is provided;
+// otherwise to "cmdline3".
+
+(case
+    (switch_on "A"), "cmdline1",
+    (switch_on "B"), "cmdline2",
+    (default), "cmdline3")
+
+Note the slight difference in 'case' expression handling in contexts
+of edge weights and command line specification - in the second example
+the value of the "B" switch is never checked when switch "A" is
+enabled, and the whole expression always evaluates to "cmdline1" in
+that case.
+Case expressions can also be nested, i.e. the following is legal:
++(case (switch_on "E"), (case (switch_on "o"), ..., (default), ...)
+      (default), ...)
+
+You should, however, try to avoid doing that because it hurts
+readability. It is usually better to split tool descriptions and/or
+use TableGen inheritance instead.
+
+Possible tests are:
+switch_on - Returns true if a given command-line switch is
+provided by the user. Example: (switch_on "opt").
+parameter_equals - Returns true if a command-line parameter equals
+a given value.
+Example: (parameter_equals "W", "all").
+element_in_list - Returns true if a command-line parameter
+list contains a given value.
+Example: (parameter_in_list "l", "pthread").
+input_languages_contain - Returns true if a given language
+belongs to the current input language set.
+Example: (input_languages_contain "c++").
+in_language - Evaluates to true if the input file language
+equals to the argument. At the moment works only with cmd_line
+and actions (on non-join nodes).
+Example: (in_language "c++").
+not_empty - Returns true if a given option (which should be
+either a parameter or a parameter list) is set by the
+user.
+Example: (not_empty "o").
+default - Always evaluates to true. Should always be the last
+test in the case expression.
+and - A standard logical combinator that returns true iff all
+of its arguments return true. Used like this: (and (test1),
+(test2), ... (testN)). Nesting of and and or is allowed,
+but not encouraged.
+or - Another logical combinator that returns true only if any
+one of its arguments returns true. Example: (or (test1),
+(test2), ... (testN)).
+
+
+
+
+
+Writing a tool description
+As was said earlier, nodes in the compilation graph represent tools,
+which are described separately. A tool definition looks like this
+(taken from the include/llvm/CompilerDriver/Tools.td file):
++def llvm_gcc_cpp : Tool<[
+    (in_language "c++"),
+    (out_language "llvm-assembler"),
+    (output_suffix "bc"),
+    (cmd_line "llvm-g++ -c $INFILE -o $OUTFILE -emit-llvm"),
+    (sink)
+    ]>;
+
+This defines a new tool called llvm_gcc_cpp, which is an alias for
+llvm-g++. As you can see, a tool definition is just a list of
+properties; most of them should be self-explanatory. The sink
+property means that this tool should be passed all command-line
+options that aren't mentioned in the option list.
+The complete list of all currently implemented tool properties follows.
+
+Possible tool properties:
+in_language - input language name. Can be either a string or a
+list, in case the tool supports multiple input languages.
+out_language - output language name. Tools are not allowed to
+have multiple output languages.
+output_suffix - output file suffix. Can also be changed
+dynamically, see documentation on actions.
+cmd_line - the actual command used to run the tool. You can
+use $INFILE and $OUTFILE variables, output redirection
+with >, hook invocations ($CALL), environment variables
+(via $ENV) and the case construct.
+join - this tool is a "join node" in the graph, i.e. it gets a
+list of input files and joins them together. Used for linkers.
+sink - all command-line options that are not handled by other
+tools are passed to this tool.
+actions - A single big case expression that specifies how
+this tool reacts on command-line options (described in more detail
+below).
+
+
+
+
+Actions
+A tool often needs to react to command-line options, and this is
+precisely what the actions property is for. The next example
+illustrates this feature:
++def llvm_gcc_linker : Tool<[
+    (in_language "object-code"),
+    (out_language "executable"),
+    (output_suffix "out"),
+    (cmd_line "llvm-gcc $INFILE -o $OUTFILE"),
+    (join),
+    (actions (case (not_empty "L"), (forward "L"),
+                   (not_empty "l"), (forward "l"),
+                   (not_empty "dummy"),
+                             [(append_cmd "-dummy1"), (append_cmd "-dummy2")])
+    ]>;
+
+The actions tool property is implemented on top of the omnipresent
+case expression. It associates one or more different actions
+with given conditions - in the example, the actions are forward,
+which forwards a given option unchanged, and append_cmd, which
+appends a given string to the tool execution command. Multiple actions
+can be associated with a single condition by using a list of actions
+(used in the example to append some dummy options). The same case
+construct can also be used in the cmd_line property to modify the
+tool command line.
+The "join" property used in the example means that this tool behaves
+like a linker.
+The list of all possible actions follows.
+
+Possible actions:
+
+
+append_cmd - append a string to the tool invocation
+command.
+Example: (case (switch_on "pthread"), (append_cmd "-lpthread"))
+forward - forward an option unchanged.
+Example: (forward "Wall").
+forward_as - Change the name of an option, but forward the
+argument unchanged.
+Example: (forward_as "O0" "--disable-optimization").
+output_suffix - modify the output suffix of this
+tool.
+Example: (output_suffix "i").
+stop_compilation - stop compilation after this tool processes
+its input. Used without arguments.
+unpack_values - used for for splitting and forwarding
+comma-separated lists of options, e.g. -Wa,-foo=bar,-baz is
+converted to -foo=bar -baz and appended to the tool invocation
+command.
+Example: (unpack_values "Wa,").
+
+
+
+
+
+
+
+Language map
+If you are adding support for a new language to LLVMC, you'll need to
+modify the language map, which defines mappings from file extensions
+to language names. It is used to choose the proper toolchain(s) for a
+given input file set. Language map definition looks like this:
++def LanguageMap : LanguageMap<
+    [LangToSuffixes<"c++", ["cc", "cp", "cxx", "cpp", "CPP", "c++", "C"]>,
+     LangToSuffixes<"c", ["c"]>,
+     ...
+    ]>;
+
+For example, without those definitions the following command wouldn't work:
++$ llvmc hello.cpp
+llvmc: Unknown suffix: cpp
+
+The language map entries should be added only for tools that are
+linked with the root node. Since tools are not allowed to have
+multiple output languages, for nodes "inside" the graph the input and
+output languages should match. This is enforced at compile-time.
+
+
+More advanced topics
+
+Hooks and environment variables
+Normally, LLVMC executes programs from the system PATH. Sometimes,
+this is not sufficient: for example, we may want to specify tool names
+in the configuration file. This can be achieved via the mechanism of
+hooks - to write your own hooks, just add their definitions to the
+PluginMain.cpp or drop a .cpp file into the
+$LLVMC_DIR/driver directory. Hooks should live in the hooks
+namespace and have the signature std::string hooks::MyHookName
+(void). They can be used from the cmd_line tool property:
++(cmd_line "$CALL(MyHook)/path/to/file -o $CALL(AnotherHook)")
+
+It is also possible to use environment variables in the same manner:
++(cmd_line "$ENV(VAR1)/path/to/file -o $ENV(VAR2)")
+
+To change the command line string based on user-provided options use
+the case expression (documented above):
++(cmd_line
+  (case
+    (switch_on "E"),
+       "llvm-g++ -E -x c $INFILE -o $OUTFILE",
+    (default),
+       "llvm-g++ -c -x c $INFILE -o $OUTFILE -emit-llvm"))
+
+
+
+How plugins are loaded
+It is possible for LLVMC plugins to depend on each other. For example,
+one can create edges between nodes defined in some other plugin. To
+make this work, however, that plugin should be loaded first. To
+achieve this, the concept of plugin priority was introduced. By
+default, every plugin has priority zero; to specify the priority
+explicitly, put the following line in your plugin's TableGen file:
++def Priority : PluginPriority<$PRIORITY_VALUE>;
+# Where PRIORITY_VALUE is some integer > 0
+
+Plugins are loaded in order of their (increasing) priority, starting
+with 0. Therefore, the plugin with the highest priority value will be
+loaded last.
+
+
+Debugging
+When writing LLVMC plugins, it can be useful to get a visual view of
+the resulting compilation graph. This can be achieved via the command
+line option --view-graph. This command assumes that Graphviz [2] and
+Ghostview [3] are installed. There is also a --dump-graph option that
+creates a Graphviz source file(compilation-graph.dot) in the
+current directory.
+
+
+
+References
+
+
+
+
+
+[1] TableGen Fundamentals
+http://llvm.cs.uiuc.edu/docs/TableGenFundamentals.html
+
+
+
+
+
+[2] Graphviz
+http://www.graphviz.org/
+
+
+
+
+
+[3] Ghostview
+http://pages.cs.wisc.edu/~ghost/
+
+
+  
+  
+
+  Mikhail Glushenkov

+  LLVM Compiler Infrastructure

+
+  Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $
+
+
+
+
+

Modified: llvm/trunk/docs/index.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/index.html?rev=60909&r1=60908&r2=60909&view=diff

==============================================================================
--- llvm/trunk/docs/index.html (original)
+++ llvm/trunk/docs/index.html Thu Dec 11 17:24:40 2008
@@ -30,7 +30,7 @@
 
 
 
-    
+
   Written by The LLVM Team
 
 
@@ -100,7 +100,7 @@
 
Frequently Asked Questions - A list of common
 questions and problems and their solutions.

 
-Release notes for the current release 
+
Release notes for the current release
 - This describes new features, known bugs, and other limitations.
 
 How to Submit A Bug Report -
@@ -116,9 +116,9 @@
 
The LLVM Lexicon - Definition of acronyms, terms
 and concepts used in LLVM.
 
-You can probably find help on the unofficial LLVM IRC 
-channel.  We often are on irc.oftc.net in the #llvm channel.  If you are 
-using the mozilla browser, and have chatzilla installed, you can You can probably find help on the unofficial LLVM IRC
+channel.  We often are on irc.oftc.net in the #llvm channel.  If you are
+using the mozilla browser, and have chatzilla installed, you can join #llvm on irc.oftc.net directly.
 
 
@@ -152,7 +152,7 @@
 Details the LLVM coding standards and provides useful information on writing
 efficient C++ code.
 
-Extending LLVM - Look here to see how 
+
Extending LLVM - Look here to see how
 to add instructions and intrinsics to LLVM.
 
 Using LLVM Libraries - Look here to
@@ -161,7 +161,7 @@
 
How To Release LLVM To The Public - This
 is a guide to preparing LLVM releases. Most developers can ignore it.
 
-Doxygen generated 
+
Doxygen generated
 documentation (classes)
 
@@ -205,18 +205,22 @@
 LLVM - This document describes the design and philosophy behind the LLVM
 source-level debugger.
 
-Zero Cost Exception handling in LLVM 
+
Zero Cost Exception handling in LLVM
 - This document describes the design and implementation of exception handling
 in LLVM.
 
 Bugpoint - automatic bug finder and test-case
 reducer description and usage information.
 
-Compiler Driver (llvmc) - This document
-describes the design and configuration of the LLVM compiler driver tool,
-llvmc.
+Compiler Driver (llvmc) Tutorial
+- This document is a tutorial introduction to the usage and
+configuration of the LLVM compiler driver tool, llvmc.
+
+Compiler Driver (llvmc)
+Reference - This document describes the design and configuration
+of llvmc in more detail.
 
-LLVM Bitcode File Format - This describes 
+
LLVM Bitcode File Format - This describes
 the file format and encoding used for LLVM "bc" files.
 
 System Library - This document describes
@@ -236,22 +240,22 @@
 
 
 The 
-LLVM Announcements List: This is a low volume list that provides important 
+LLVM Announcements List: This is a low volume list that provides important
 announcements regarding LLVM.  It gets email about once a month.
 
 The Developer's
-List: This list is for people who want to be included in technical 
-discussions of LLVM. People post to this list when they have questions about 
+List: This list is for people who want to be included in technical
+discussions of LLVM. People post to this list when they have questions about
 writing code for or using the LLVM tools. It is relatively low volume.
 
 The Bugs &
 Patches Archive: This list gets emailed every time a bug is opened and
-closed, and when people submit patches to be included in LLVM.  It is higher 
+closed, and when people submit patches to be included in LLVM.  It is higher
 volume than the LLVMdev list.
 
 The Commits
-Archive: This list contains all commit messages that are made when LLVM 
-developers commit code changes to the repository. It is useful for those who 
+Archive: This list contains all commit messages that are made when LLVM
+developers commit code changes to the repository. It is useful for those who
 want to stay on the bleeding edge of LLVM development. This list is very high
 volume.
 

Copied: llvm/trunk/docs/llvm-rst.css (from r60902, llvm/trunk/tools/llvmc/doc/llvm.css)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/llvm-rst.css?p2=llvm/trunk/docs/llvm-rst.css&p1=llvm/trunk/tools/llvmc/doc/llvm.css&r1=60902&r2=60909&rev=60909&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/doc/llvm.css (original)
+++ llvm/trunk/docs/llvm-rst.css Thu Dec 11 17:24:40 2008
@@ -23,7 +23,7 @@
  * Documentation
  */
 /* Common for title and header */
-h1 {
+h1, h2 {
   color: black; background: url("img/lines.gif");
   font-family: "Georgia,Palatino,Times,Roman,SanSerif"; font-weight: bold;
   border-width: 1px;
@@ -32,19 +32,23 @@
   vertical-align: middle;
   padding-left: 8pt;
   padding-top: 1px;
-  padding-bottom: 2px
+  padding-bottom: 2px;
+}
+
+h1 {
+  text-align: center;
+  font-size: 22pt;
+  margin: 20pt 0pt 5pt 0pt;
 }
 
-.doc_title      { text-align: left;   font-size: 25pt }
-.doc_section    { text-align: center; font-size: 22pt;
-                  margin: 20pt 0pt 5pt 0pt; }
-.doc_subsection { width: 75%;
-                  text-align: left;  font-size: 12pt; padding: 4pt 4pt 4pt 4pt;
-                  margin: 1.5em 0.5em 0.5em 0.5em }
-
-.doc_subsubsection { margin: 2.0em 0.5em 0.5em 0.5em;
-                     font-weight: bold; font-style: oblique;
-                     border-bottom: 1px solid #999999; font-size: 12pt;
+.title      { padding-top: 0; margin-top: 0; text-align: left;   font-size: 25pt }
+h2 { width: 75%;
+     text-align: left;  font-size: 12pt; padding: 4pt 4pt 4pt 4pt;
+     margin: 1.5em 0.5em 0.5em 0.5em }
+
+h3 { margin: 2.0em 0.5em 0.5em 0.5em;
+     font-weight: bold; font-style: oblique;
+     border-bottom: 1px solid #999999; font-size: 12pt;
                      width: 75%; }
 .doc_author     { text-align: left; font-weight: bold; padding-left: 20pt }
 .doc_text       { text-align: left; padding-left: 20pt; padding-right: 10pt }
@@ -83,4 +87,4 @@
 /* Left align table cell */
 .td_left        { border: 2px solid gray; text-align: left; }
 
-.toc-backref    { color: black; }
+.toc-backref    { color: black; text-decoration: none; }

Modified: llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst?rev=60909&r1=60908&r2=60909&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst (original)
+++ llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst Thu Dec 11 17:24:40 2008
@@ -597,3 +597,6 @@
 
 .. [3] Ghostview
        http://pages.cs.wisc.edu/~ghost/
+
+.. raw:: html
+   :file: footer.html

Modified: llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst?rev=60909&r1=60908&r2=60909&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst (original)
+++ llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst Thu Dec 11 17:24:40 2008
@@ -98,3 +98,6 @@
 
 .. [1] TableGen Fundamentals
        http://llvm.cs.uiuc.edu/docs/TableGenFundamentals.html
+
+.. raw:: html
+   :file: footer.html

Modified: llvm/trunk/tools/llvmc/doc/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/Makefile?rev=60909&r1=60908&r2=60909&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/doc/Makefile (original)
+++ llvm/trunk/tools/llvmc/doc/Makefile Thu Dec 11 17:24:40 2008
@@ -7,15 +7,23 @@
 #
 ##===----------------------------------------------------------------------===##
 
-RST2HTML=rst2html --stylesheet=llvm.css --link-stylesheet
+LEVEL=../../..
+include $(LEVEL)/Makefile.config
 
-all : LLVMC-Reference.html LLVMC-Tutorial.html
+RST_CSS=llvm-rst.css
+DOC_DIR=../../../docs
+RST2HTML=rst2html --stylesheet=$(RST_CSS) --link-stylesheet
 
-LLVMC-Tutorial.html : LLVMC-Tutorial.rst llvm.css
+all : LLVMC-Reference.html LLVMC-Tutorial.html $(RST_CSS)
+	$(CP) $(RST_CSS) $(DOC_DIR)/$(RST_CSS)
+	$(CP) LLVMC-Reference.html $(DOC_DIR)/CompilerDriver.html
+	$(CP) LLVMC-Reference.html $(DOC_DIR)/CompilerDriverTutorial.html
+
+LLVMC-Tutorial.html : LLVMC-Tutorial.rst $(RST_CSS)
 	$(RST2HTML) $< $@
 
-LLVMC-Reference.html : LLVMC-Reference.rst llvm.css
+LLVMC-Reference.html : LLVMC-Reference.rst $(RST_CSS)
 	$(RST2HTML) $< $@
 
 clean :
-	rm *.html
+	$(RM) LLVMC-Tutorial.html LLVMC-Reference.html

Added: llvm/trunk/tools/llvmc/doc/footer.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/footer.html?rev=60909&view=auto

==============================================================================
--- llvm/trunk/tools/llvmc/doc/footer.html (added)
+++ llvm/trunk/tools/llvmc/doc/footer.html Thu Dec 11 17:24:40 2008
@@ -0,0 +1,10 @@
+
+
+  
+  
+
+  Mikhail Glushenkov

+  LLVM Compiler Infrastructure

+
+  Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $
+

Copied: llvm/trunk/tools/llvmc/doc/llvm-rst.css (from r60902, llvm/trunk/tools/llvmc/doc/llvm.css)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/llvm-rst.css?p2=llvm/trunk/tools/llvmc/doc/llvm-rst.css&p1=llvm/trunk/tools/llvmc/doc/llvm.css&r1=60902&r2=60909&rev=60909&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/doc/llvm.css (original)
+++ llvm/trunk/tools/llvmc/doc/llvm-rst.css Thu Dec 11 17:24:40 2008
@@ -23,7 +23,7 @@
  * Documentation
  */
 /* Common for title and header */
-h1 {
+h1, h2 {
   color: black; background: url("img/lines.gif");
   font-family: "Georgia,Palatino,Times,Roman,SanSerif"; font-weight: bold;
   border-width: 1px;
@@ -32,19 +32,23 @@
   vertical-align: middle;
   padding-left: 8pt;
   padding-top: 1px;
-  padding-bottom: 2px
+  padding-bottom: 2px;
+}
+
+h1 {
+  text-align: center;
+  font-size: 22pt;
+  margin: 20pt 0pt 5pt 0pt;
 }
 
-.doc_title      { text-align: left;   font-size: 25pt }
-.doc_section    { text-align: center; font-size: 22pt;
-                  margin: 20pt 0pt 5pt 0pt; }
-.doc_subsection { width: 75%;
-                  text-align: left;  font-size: 12pt; padding: 4pt 4pt 4pt 4pt;
-                  margin: 1.5em 0.5em 0.5em 0.5em }
-
-.doc_subsubsection { margin: 2.0em 0.5em 0.5em 0.5em;
-                     font-weight: bold; font-style: oblique;
-                     border-bottom: 1px solid #999999; font-size: 12pt;
+.title      { padding-top: 0; margin-top: 0; text-align: left;   font-size: 25pt }
+h2 { width: 75%;
+     text-align: left;  font-size: 12pt; padding: 4pt 4pt 4pt 4pt;
+     margin: 1.5em 0.5em 0.5em 0.5em }
+
+h3 { margin: 2.0em 0.5em 0.5em 0.5em;
+     font-weight: bold; font-style: oblique;
+     border-bottom: 1px solid #999999; font-size: 12pt;
                      width: 75%; }
 .doc_author     { text-align: left; font-weight: bold; padding-left: 20pt }
 .doc_text       { text-align: left; padding-left: 20pt; padding-right: 10pt }
@@ -83,4 +87,4 @@
 /* Left align table cell */
 .td_left        { border: 2px solid gray; text-align: left; }
 
-.toc-backref    { color: black; }
+.toc-backref    { color: black; text-decoration: none; }

Removed: llvm/trunk/tools/llvmc/doc/llvm.css
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/llvm.css?rev=60908&view=auto

==============================================================================
--- llvm/trunk/tools/llvmc/doc/llvm.css (original)
+++ llvm/trunk/tools/llvmc/doc/llvm.css (removed)
@@ -1,86 +0,0 @@
-/*
- * LLVM documentation style sheet
- */
-
-/* Common styles */
-.body { color: black; background: white; margin: 0 0 0 0 }
-
-/* No borders on image links */
-a:link img, a:visited img {border-style: none}
-
-address img { float: right; width: 88px; height: 31px; }
-address     { clear: right; }
-
-TR, TD      { border: 2px solid gray; padding: 4pt 4pt 2pt 2pt; }
-TH          { border: 2px solid gray; font-weight: bold; font-size: 105%;
-              background: url("img/lines.gif");
-              font-family: "Georgia,Palatino,Times,Roman,SanSerif"; text-align:center;
-              vertical-align: middle; }
-TABLE       { text-align: center; border: 2px solid black;
-              border-collapse: collapse; margin-top: 1em; margin-left: 1em;
-              margin-right: 1em; margin-bottom: 1em; }
-/*
- * Documentation
- */
-/* Common for title and header */
-h1 {
-  color: black; background: url("img/lines.gif");
-  font-family: "Georgia,Palatino,Times,Roman,SanSerif"; font-weight: bold;
-  border-width: 1px;
-  border-style: solid none solid none;
-  text-align: center;
-  vertical-align: middle;
-  padding-left: 8pt;
-  padding-top: 1px;
-  padding-bottom: 2px
-}
-
-.doc_title      { text-align: left;   font-size: 25pt }
-.doc_section    { text-align: center; font-size: 22pt;
-                  margin: 20pt 0pt 5pt 0pt; }
-.doc_subsection { width: 75%;
-                  text-align: left;  font-size: 12pt; padding: 4pt 4pt 4pt 4pt;
-                  margin: 1.5em 0.5em 0.5em 0.5em }
-
-.doc_subsubsection { margin: 2.0em 0.5em 0.5em 0.5em;
-                     font-weight: bold; font-style: oblique;
-                     border-bottom: 1px solid #999999; font-size: 12pt;
-                     width: 75%; }
-.doc_author     { text-align: left; font-weight: bold; padding-left: 20pt }
-.doc_text       { text-align: left; padding-left: 20pt; padding-right: 10pt }
-
-.doc_footer     { text-align: left; padding: 0 0 0 0 }
-
-.doc_hilite     { color: blue; font-weight: bold; }
-
-.doc_table      { text-align: center; width: 90%;
-                  padding: 1px 1px 1px 1px; border: 1px; }
-
-.doc_table_nw   { text-align: center; border: 1px;
-                  padding: 1px 1px 1px 1px; }
-
-.doc_warning    { color: red; font-weight: bold }
-
-.literal-block  { border: solid 1px gray; background: #eeeeee;
-                  margin: 0 1em 0 1em;
-                  padding: 0 1em 0 1em;
-                  display:table;
-                }
-.doc_notes      { background: #fafafa; border: 1px solid #cecece; padding: 0.1em }
-
-TABLE.layout    { text-align: left; border: none; border-collapse: collapse;
-                  padding: 4px 4px 4px 4px; }
-TR.layout       { border: none; padding: 4pt 4pt 2pt 2pt; }
-TD.layout       { border: none; padding: 4pt 4pt 2pt 2pt;
-                  vertical-align: top;}
-TD.left         { border: none; padding: 4pt 4pt 2pt 2pt; text-align: left;
-                  vertical-align: top;}
-TD.right        { border: none; padding: 4pt 4pt 2pt 2pt; text-align: right;
-                  vertical-align: top;}
-TH.layout       { border: none; font-weight: bold; font-size: 105%;
-                  text-align:center; vertical-align: middle; }
-
-/* Left align table cell */
-.td_left        { border: 2px solid gray; text-align: left; }
-
-.toc-backref    { color: black; }




From foldr at codedgers.com  Thu Dec 11 17:33:34 2008
From: foldr at codedgers.com (Mikhail Glushenkov)
Date: Thu, 11 Dec 2008 23:33:34 -0000
Subject: [llvm-commits] [llvm] r60910 - in /llvm/trunk:
 docs/CompilerDriverTutorial.html tools/llvmc/doc/Makefile
Message-ID: <200812112333.mBBNXY31011249@zion.cs.uiuc.edu>

Author: foldr
Date: Thu Dec 11 17:33:33 2008
New Revision: 60910

URL: http://llvm.org/viewvc/llvm-project?rev=60910&view=rev
Log:
Use correct file for the llvmc tutorial.

Modified:
    llvm/trunk/docs/CompilerDriverTutorial.html
    llvm/trunk/tools/llvmc/doc/Makefile

Modified: llvm/trunk/docs/CompilerDriverTutorial.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerDriverTutorial.html?rev=60910&r1=60909&r2=60910&view=diff

==============================================================================
--- llvm/trunk/docs/CompilerDriverTutorial.html (original)
+++ llvm/trunk/docs/CompilerDriverTutorial.html Thu Dec 11 17:33:33 2008
@@ -4,13 +4,13 @@
 
 
 
-Customizing LLVMC: Reference Manual
+Tutorial - Using LLVMC
 
 
 
 
-
-Customizing LLVMC: Reference Manual
+
+Tutorial - Using LLVMC
 @@ -19,574 +19,99 @@
 
 
 
Mikhail Glushenkov <foldr@codedegers.com>
 
 
-LLVMC is a generic compiler driver, designed to be customizable and
-extensible. It plays the same role for LLVM as the gcc program
-does for GCC - LLVMC's job is essentially to transform a set of input
-files into a set of targets depending on configuration rules and user
-options. What makes LLVMC different is that these transformation rules
-are completely customizable - in fact, LLVMC knows nothing about the
-specifics of transformation (even the command-line options are mostly
-not hard-coded) and regards the transformation structure as an
-abstract graph. The structure of this graph is completely determined
-by plugins, which can be either statically or dynamically linked. This
-makes it possible to easily adapt LLVMC for other purposes - for
-example, as a build tool for game resources.
-Because LLVMC employs TableGen [1] as its configuration language, you
-need to be familiar with it to customize LLVMC.
+LLVMC is a generic compiler driver, which plays the same role for LLVM
+as the gcc program does for GCC - the difference being that LLVMC
+is designed to be more adaptable and easier to customize. Most of
+LLVMC functionality is implemented via plugins, which can be loaded
+dynamically or compiled in. This tutorial describes the basic usage
+and configuration of LLVMC.
 
 Contents
 
-Compiling with LLVMC
-Predefined options
-Compiling LLVMC plugins
-Customizing LLVMC: the compilation graph
-Describing options
-External options
-
-
-Conditional evaluation
-Writing a tool description
-Actions
-
-
-Language map
-More advanced topics
-Hooks and environment variables
-How plugins are loaded
-Debugging
-
-
-References
+Compiling with LLVMC
+Using LLVMC to generate toolchain drivers
+References
 
 
 
-Compiling with LLVMC
-LLVMC tries hard to be as compatible with gcc as possible,
-although there are some small differences. Most of the time, however,
-you shouldn't be able to notice them:
+Compiling with LLVMC
+In general, LLVMC tries to be command-line compatible with gcc as
+much as possible, so most of the familiar options work:
 -$ # This works as expected:
 $ llvmc -O3 -Wall hello.cpp
 $ ./a.out
 hello
 
-One nice feature of LLVMC is that one doesn't have to distinguish
-between different compilers for different languages (think g++ and
-gcc) - the right toolchain is chosen automatically based on input
-language names (which are, in turn, determined from file
-extensions). If you want to force files ending with ".c" to compile as
-C++, use the -x option, just like you would do it with gcc:
--$ # hello.c is really a C++ file
-$ llvmc -x c++ hello.c
-$ ./a.out
-hello
-
-On the other hand, when using LLVMC as a linker to combine several C++
-object files you should provide the --linker option since it's
-impossible for LLVMC to choose the right linker in that case:
--$ llvmc -c hello.cpp
-$ llvmc hello.o
-[A lot of link-time errors skipped]
-$ llvmc --linker=c++ hello.o
-$ ./a.out
-hello
-
-By default, LLVMC uses llvm-gcc to compile the source code. It is
-also possible to choose the work-in-progress clang compiler with
-the -clang option.
-
-
-Predefined options
-LLVMC has some built-in options that can't be overridden in the
-configuration libraries:
-
--o FILE - Output file name.
--x LANGUAGE - Specify the language of the following input files
-until the next -x option.
--load PLUGIN_NAME - Load the specified plugin DLL. Example:
--load $LLVM_DIR/Release/lib/LLVMCSimple.so.
--v - Enable verbose mode, i.e. print out all executed commands.
---view-graph - Show a graphical representation of the compilation
-graph. Requires that you have dot and gv programs
-installed. Hidden option, useful for debugging.
---write-graph - Write a compilation-graph.dot file in the
-current directory with the compilation graph description in the
-Graphviz format. Hidden option, useful for debugging.
---save-temps - Write temporary files to the current directory
-and do not delete them on exit. Hidden option, useful for debugging.
---help, --help-hidden, --version - These options have
-their standard meaning.
-
-
-
-Compiling LLVMC plugins
-It's easiest to start working on your own LLVMC plugin by copying the
-skeleton project which lives under $LLVMC_DIR/plugins/Simple:
--$ cd $LLVMC_DIR/plugins
-$ cp -r Simple MyPlugin
-$ cd MyPlugin
-$ ls
-Makefile PluginMain.cpp Simple.td
-
-As you can see, our basic plugin consists of only two files (not
-counting the build script). Simple.td contains TableGen
-description of the compilation graph; its format is documented in the
-following sections. PluginMain.cpp is just a helper file used to
-compile the auto-generated C++ code produced from TableGen source. It
-can also contain hook definitions (see below).
-The first thing that you should do is to change the LLVMC_PLUGIN
-variable in the Makefile to avoid conflicts (since this variable
-is used to name the resulting library):
--LLVMC_PLUGIN=MyPlugin
-
-It is also a good idea to rename Simple.td to something less
-generic:
--$ mv Simple.td MyPlugin.td
-
-Note that the plugin source directory must be placed under
-$LLVMC_DIR/plugins to make use of the existing build
-infrastructure. To build a version of the LLVMC executable called
-mydriver with your plugin compiled in, use the following command:
--$ cd $LLVMC_DIR
-$ make BUILTIN_PLUGINS=MyPlugin DRIVER_NAME=mydriver
-
-To build your plugin as a dynamic library, just cd to its source
-directory and run make. The resulting file will be called
-LLVMC$(LLVMC_PLUGIN).$(DLL_EXTENSION) (in our case,
-LLVMCMyPlugin.so). This library can be then loaded in with the
--load option. Example:
--$ cd $LLVMC_DIR/plugins/Simple
-$ make
-$ llvmc -load $LLVM_DIR/Release/lib/LLVMCSimple.so
-
-Sometimes, you will want a 'bare-bones' version of LLVMC that has no
-built-in plugins. It can be compiled with the following command:
--$ cd $LLVMC_DIR
-$ make BUILTIN_PLUGINS=""
-
-
-
-Customizing LLVMC: the compilation graph
-Each TableGen configuration file should include the common
-definitions:
+This will invoke llvm-g++ under the hood (you can see which
+commands are executed by using the -v option). For further help on
+command-line LLVMC usage, refer to the llvmc --help output.
+
+
+Using LLVMC to generate toolchain drivers
+LLVMC plugins are written mostly using TableGen [1], so you need to
+be familiar with it to get anything done.
+Start by compiling plugins/Simple/Simple.td, which is a primitive
+wrapper for gcc:
++$ cd $LLVM_DIR/tools/llvmc
+$ make DRIVER_NAME=mygcc BUILTIN_PLUGINS=Simple
+$ cat > hello.c
+[...]
+$ mygcc hello.c
+$ ./hello.out
+Hello
+
+Here we link our plugin with the LLVMC core statically to form an
+executable file called mygcc. It is also possible to build our
+plugin as a standalone dynamic library; this is described in the
+reference manual.
+Contents of the file Simple.td look like this:
 +// Include common definitions
 include "llvm/CompilerDriver/Common.td"
-
-Internally, LLVMC stores information about possible source
-transformations in form of a graph. Nodes in this graph represent
-tools, and edges between two nodes represent a transformation path. A
-special "root" node is used to mark entry points for the
-transformations. LLVMC also assigns a weight to each edge (more on
-this later) to choose between several alternative edges.
-The definition of the compilation graph (see file
-plugins/Base/Base.td for an example) is just a list of edges:
--def CompilationGraph : CompilationGraph<[
-    Edge<"root", "llvm_gcc_c">,
-    Edge<"root", "llvm_gcc_assembler">,
-    ...
-
-    Edge<"llvm_gcc_c", "llc">,
-    Edge<"llvm_gcc_cpp", "llc">,
-    ...
 
-    OptionalEdge<"llvm_gcc_c", "opt", (case (switch_on "opt"),
-                                      (inc_weight))>,
-    OptionalEdge<"llvm_gcc_cpp", "opt", (case (switch_on "opt"),
-                                              (inc_weight))>,
-    ...
-
-    OptionalEdge<"llvm_gcc_assembler", "llvm_gcc_cpp_linker",
-        (case (input_languages_contain "c++"), (inc_weight),
-              (or (parameter_equals "linker", "g++"),
-                  (parameter_equals "linker", "c++")), (inc_weight))>,
-    ...
-
-    ]>;
-
-As you can see, the edges can be either default or optional, where
-optional edges are differentiated by an additional case expression
-used to calculate the weight of this edge. Notice also that we refer
-to tools via their names (as strings). This makes it possible to add
-edges to an existing compilation graph in plugins without having to
-know about all tool definitions used in the graph.
-The default edges are assigned a weight of 1, and optional edges get a
-weight of 0 + 2*N where N is the number of tests that evaluated to
-true in the case expression. It is also possible to provide an
-integer parameter to inc_weight and dec_weight - in this case,
-the weight is increased (or decreased) by the provided value instead
-of the default 2. It is also possible to change the default weight of
-an optional edge by using the default clause of the case
-construct.
-When passing an input file through the graph, LLVMC picks the edge
-with the maximum weight. To avoid ambiguity, there should be only one
-default edge between two nodes (with the exception of the root node,
-which gets a special treatment - there you are allowed to specify one
-default edge per language).
-When multiple plugins are loaded, their compilation graphs are merged
-together. Since multiple edges that have the same end nodes are not
-allowed (i.e. the graph is not a multigraph), an edge defined in
-several plugins will be replaced by the definition from the plugin
-that was loaded last. Plugin load order can be controlled by using the
-plugin priority feature described above.
-To get a visual representation of the compilation graph (useful for
-debugging), run llvmc --view-graph. You will need dot and
-gsview installed for this to work properly.
-
-
-Describing options
-Command-line options that the plugin supports are defined by using an
-OptionList:
--def Options : OptionList<[
-(switch_option "E", (help "Help string")),
-(alias_option "quiet", "q")
-...
+// Tool descriptions
+def gcc : Tool<
+[(in_language "c"),
+ (out_language "executable"),
+ (output_suffix "out"),
+ (cmd_line "gcc $INFILE -o $OUTFILE"),
+ (sink)
 ]>;
-
-As you can see, the option list is just a list of DAGs, where each DAG
-is an option description consisting of the option name and some
-properties. A plugin can define more than one option list (they are
-all merged together in the end), which can be handy if one wants to
-separate option groups syntactically.
-
-Possible option types:
-
-
-switch_option - a simple boolean switch, for example -time.
-parameter_option - option that takes an argument, for example
--std=c99;
-parameter_list_option - same as the above, but more than one
-occurence of the option is allowed.
-prefix_option - same as the parameter_option, but the option name
-and parameter value are not separated.
-prefix_list_option - same as the above, but more than one
-occurence of the option is allowed; example: -lm -lpthread.
-alias_option - a special option type for creating
-aliases. Unlike other option types, aliases are not allowed to
-have any properties besides the aliased option name. Usage
-example: (alias_option "preprocess", "E")
-
-
-
-Possible option properties:
-
-
-help - help string associated with this option. Used for
---help output.
-required - this option is obligatory.
-hidden - this option should not appear in the --help
-output (but should appear in the --help-hidden output).
-really_hidden - the option should not appear in any help
-output.
-extern - this option is defined in some other plugin, see below.
-
-
-
-
-
-External options
-Sometimes, when linking several plugins together, one plugin needs to
-access options defined in some other plugin. Because of the way
-options are implemented, such options should be marked as
-extern. This is what the extern option property is
-for. Example:
--...
-(switch_option "E", (extern))
-...
-
-See also the section on plugin priorities.
-
-
-
-Conditional evaluation
-The 'case' construct is the main means by which programmability is
-achieved in LLVMC. It can be used to calculate edge weights, program
-actions and modify the shell commands to be executed. The 'case'
-expression is designed after the similarly-named construct in
-functional languages and takes the form (case (test_1), statement_1,
-(test_2), statement_2, ... (test_N), statement_N). The statements
-are evaluated only if the corresponding tests evaluate to true.
-Examples:
--// Edge weight calculation
 
-// Increases edge weight by 5 if "-A" is provided on the
-// command-line, and by 5 more if "-B" is also provided.
-(case
-    (switch_on "A"), (inc_weight 5),
-    (switch_on "B"), (inc_weight 5))
+// Language map
+def LanguageMap : LanguageMap<[LangToSuffixes<"c", ["c"]>]>;
 
-
-// Tool command line specification
-
-// Evaluates to "cmdline1" if the option "-A" is provided on the
-// command line; to "cmdline2" if "-B" is provided;
-// otherwise to "cmdline3".
-
-(case
-    (switch_on "A"), "cmdline1",
-    (switch_on "B"), "cmdline2",
-    (default), "cmdline3")
-
-Note the slight difference in 'case' expression handling in contexts
-of edge weights and command line specification - in the second example
-the value of the "B" switch is never checked when switch "A" is
-enabled, and the whole expression always evaluates to "cmdline1" in
-that case.
-Case expressions can also be nested, i.e. the following is legal:
--(case (switch_on "E"), (case (switch_on "o"), ..., (default), ...)
-      (default), ...)
-
-You should, however, try to avoid doing that because it hurts
-readability. It is usually better to split tool descriptions and/or
-use TableGen inheritance instead.
-
-Possible tests are:
-switch_on - Returns true if a given command-line switch is
-provided by the user. Example: (switch_on "opt").
-parameter_equals - Returns true if a command-line parameter equals
-a given value.
-Example: (parameter_equals "W", "all").
-element_in_list - Returns true if a command-line parameter
-list contains a given value.
-Example: (parameter_in_list "l", "pthread").
-input_languages_contain - Returns true if a given language
-belongs to the current input language set.
-Example: (input_languages_contain "c++").
-in_language - Evaluates to true if the input file language
-equals to the argument. At the moment works only with cmd_line
-and actions (on non-join nodes).
-Example: (in_language "c++").
-not_empty - Returns true if a given option (which should be
-either a parameter or a parameter list) is set by the
-user.
-Example: (not_empty "o").
-default - Always evaluates to true. Should always be the last
-test in the case expression.
-and - A standard logical combinator that returns true iff all
-of its arguments return true. Used like this: (and (test1),
-(test2), ... (testN)). Nesting of and and or is allowed,
-but not encouraged.
-or - Another logical combinator that returns true only if any
-one of its arguments returns true. Example: (or (test1),
-(test2), ... (testN)).
-
-
-
-
-
-Writing a tool description
-As was said earlier, nodes in the compilation graph represent tools,
-which are described separately. A tool definition looks like this
-(taken from the include/llvm/CompilerDriver/Tools.td file):
--def llvm_gcc_cpp : Tool<[
-    (in_language "c++"),
-    (out_language "llvm-assembler"),
-    (output_suffix "bc"),
-    (cmd_line "llvm-g++ -c $INFILE -o $OUTFILE -emit-llvm"),
-    (sink)
-    ]>;
-
-This defines a new tool called llvm_gcc_cpp, which is an alias for
-llvm-g++. As you can see, a tool definition is just a list of
-properties; most of them should be self-explanatory. The sink
-property means that this tool should be passed all command-line
-options that aren't mentioned in the option list.
-The complete list of all currently implemented tool properties follows.
-
-Possible tool properties:
-in_language - input language name. Can be either a string or a
-list, in case the tool supports multiple input languages.
-out_language - output language name. Tools are not allowed to
-have multiple output languages.
-output_suffix - output file suffix. Can also be changed
-dynamically, see documentation on actions.
-cmd_line - the actual command used to run the tool. You can
-use $INFILE and $OUTFILE variables, output redirection
-with >, hook invocations ($CALL), environment variables
-(via $ENV) and the case construct.
-join - this tool is a "join node" in the graph, i.e. it gets a
-list of input files and joins them together. Used for linkers.
-sink - all command-line options that are not handled by other
-tools are passed to this tool.
-actions - A single big case expression that specifies how
-this tool reacts on command-line options (described in more detail
-below).
-
-
-
-
-Actions
-A tool often needs to react to command-line options, and this is
-precisely what the actions property is for. The next example
-illustrates this feature:
--def llvm_gcc_linker : Tool<[
-    (in_language "object-code"),
-    (out_language "executable"),
-    (output_suffix "out"),
-    (cmd_line "llvm-gcc $INFILE -o $OUTFILE"),
-    (join),
-    (actions (case (not_empty "L"), (forward "L"),
-                   (not_empty "l"), (forward "l"),
-                   (not_empty "dummy"),
-                             [(append_cmd "-dummy1"), (append_cmd "-dummy2")])
-    ]>;
-
-The actions tool property is implemented on top of the omnipresent
-case expression. It associates one or more different actions
-with given conditions - in the example, the actions are forward,
-which forwards a given option unchanged, and append_cmd, which
-appends a given string to the tool execution command. Multiple actions
-can be associated with a single condition by using a list of actions
-(used in the example to append some dummy options). The same case
-construct can also be used in the cmd_line property to modify the
-tool command line.
-The "join" property used in the example means that this tool behaves
-like a linker.
-The list of all possible actions follows.
-
-Possible actions:
-
-
-append_cmd - append a string to the tool invocation
-command.
-Example: (case (switch_on "pthread"), (append_cmd "-lpthread"))
-forward - forward an option unchanged.
-Example: (forward "Wall").
-forward_as - Change the name of an option, but forward the
-argument unchanged.
-Example: (forward_as "O0" "--disable-optimization").
-output_suffix - modify the output suffix of this
-tool.
-Example: (output_suffix "i").
-stop_compilation - stop compilation after this tool processes
-its input. Used without arguments.
-unpack_values - used for for splitting and forwarding
-comma-separated lists of options, e.g. -Wa,-foo=bar,-baz is
-converted to -foo=bar -baz and appended to the tool invocation
-command.
-Example: (unpack_values "Wa,").
-
-
-
-
-
-
-
-Language map
-If you are adding support for a new language to LLVMC, you'll need to
-modify the language map, which defines mappings from file extensions
-to language names. It is used to choose the proper toolchain(s) for a
-given input file set. Language map definition looks like this:
--def LanguageMap : LanguageMap<
-    [LangToSuffixes<"c++", ["cc", "cp", "cxx", "cpp", "CPP", "c++", "C"]>,
-     LangToSuffixes<"c", ["c"]>,
-     ...
-    ]>;
+// Compilation graph
+def CompilationGraph : CompilationGraph<[Edge<"root", "gcc">]>;
 
-For example, without those definitions the following command wouldn't work:
--$ llvmc hello.cpp
-llvmc: Unknown suffix: cpp
-
-The language map entries should be added only for tools that are
-linked with the root node. Since tools are not allowed to have
-multiple output languages, for nodes "inside" the graph the input and
-output languages should match. This is enforced at compile-time.
-
-
-More advanced topics
-
-Hooks and environment variables
-Normally, LLVMC executes programs from the system PATH. Sometimes,
-this is not sufficient: for example, we may want to specify tool names
-in the configuration file. This can be achieved via the mechanism of
-hooks - to write your own hooks, just add their definitions to the
-PluginMain.cpp or drop a .cpp file into the
-$LLVMC_DIR/driver directory. Hooks should live in the hooks
-namespace and have the signature std::string hooks::MyHookName
-(void). They can be used from the cmd_line tool property:
--(cmd_line "$CALL(MyHook)/path/to/file -o $CALL(AnotherHook)")
-
-It is also possible to use environment variables in the same manner:
--(cmd_line "$ENV(VAR1)/path/to/file -o $ENV(VAR2)")
-
-To change the command line string based on user-provided options use
-the case expression (documented above):
--(cmd_line
-  (case
-    (switch_on "E"),
-       "llvm-g++ -E -x c $INFILE -o $OUTFILE",
-    (default),
-       "llvm-g++ -c -x c $INFILE -o $OUTFILE -emit-llvm"))
-
-
-
-How plugins are loaded
-It is possible for LLVMC plugins to depend on each other. For example,
-one can create edges between nodes defined in some other plugin. To
-make this work, however, that plugin should be loaded first. To
-achieve this, the concept of plugin priority was introduced. By
-default, every plugin has priority zero; to specify the priority
-explicitly, put the following line in your plugin's TableGen file:
--def Priority : PluginPriority<$PRIORITY_VALUE>;
-# Where PRIORITY_VALUE is some integer > 0
-
-Plugins are loaded in order of their (increasing) priority, starting
-with 0. Therefore, the plugin with the highest priority value will be
-loaded last.
+As you can see, this file consists of three parts: tool descriptions,
+language map, and the compilation graph definition.
+At the heart of LLVMC is the idea of a compilation graph: vertices in
+this graph are tools, and edges represent a transformation path
+between two tools (for example, assembly source produced by the
+compiler can be transformed into executable code by an assembler). The
+compilation graph is basically a list of edges; a special node named
+root is used to mark graph entry points.
+Tool descriptions are represented as property lists: most properties
+in the example above should be self-explanatory; the sink property
+means that all options lacking an explicit description should be
+forwarded to this tool.
+The LanguageMap associates a language name with a list of suffixes
+and is used for deciding which toolchain corresponds to a given input
+file.
+To learn more about LLVMC customization, refer to the reference
+manual and plugin source code in the plugins directory.
 
 
-Debugging
-When writing LLVMC plugins, it can be useful to get a visual view of
-the resulting compilation graph. This can be achieved via the command
-line option --view-graph. This command assumes that Graphviz [2] and
-Ghostview [3] are installed. There is also a --dump-graph option that
-creates a Graphviz source file(compilation-graph.dot) in the
-current directory.
-
-
-
-References
-
+References
+
-
 
 [1] TableGen Fundamentals
+
[1] TableGen Fundamentals
 http://llvm.cs.uiuc.edu/docs/TableGenFundamentals.html
 
 
-
-
-
-
-
-[2] Graphviz
-http://www.graphviz.org/
-
-
-
-
-
-[3] Ghostview
-http://pages.cs.wisc.edu/~ghost/
 
 
   

Modified: llvm/trunk/tools/llvmc/doc/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/Makefile?rev=60910&r1=60909&r2=60910&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/doc/Makefile (original)
+++ llvm/trunk/tools/llvmc/doc/Makefile Thu Dec 11 17:33:33 2008
@@ -17,7 +17,7 @@
 all : LLVMC-Reference.html LLVMC-Tutorial.html $(RST_CSS)
 	$(CP) $(RST_CSS) $(DOC_DIR)/$(RST_CSS)
 	$(CP) LLVMC-Reference.html $(DOC_DIR)/CompilerDriver.html
-	$(CP) LLVMC-Reference.html $(DOC_DIR)/CompilerDriverTutorial.html
+	$(CP) LLVMC-Tutorial.html $(DOC_DIR)/CompilerDriverTutorial.html
 
 LLVMC-Tutorial.html : LLVMC-Tutorial.rst $(RST_CSS)
 	$(RST2HTML) $< $@




From foldr at codedgers.com  Thu Dec 11 17:43:17 2008
From: foldr at codedgers.com (Mikhail Glushenkov)
Date: Thu, 11 Dec 2008 23:43:17 -0000
Subject: [llvm-commits] [llvm] r60912 - in /llvm/trunk:
 docs/CompilerDriver.html docs/CompilerDriverTutorial.html
 tools/llvmc/doc/footer.html
Message-ID: <200812112343.mBBNhHhj011535@zion.cs.uiuc.edu>

Author: foldr
Date: Thu Dec 11 17:43:14 2008
New Revision: 60912

URL: http://llvm.org/viewvc/llvm-project?rev=60912&view=rev
Log:
Fix W3C validator errors.

Modified:
    llvm/trunk/docs/CompilerDriver.html
    llvm/trunk/docs/CompilerDriverTutorial.html
    llvm/trunk/tools/llvmc/doc/footer.html

Modified: llvm/trunk/docs/CompilerDriver.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerDriver.html?rev=60912&r1=60911&r2=60912&view=diff

==============================================================================
--- llvm/trunk/docs/CompilerDriver.html (original)
+++ llvm/trunk/docs/CompilerDriver.html Thu Dec 11 17:43:14 2008
@@ -587,13 +587,15 @@
 http://pages.cs.wisc.edu/~ghost/
 
 
-
+
 
-  
-  
+  
+  
 
-  Mikhail Glushenkov

-  LLVM Compiler Infrastructure

+  Mikhail Glushenkov

+  LLVM Compiler Infrastructure

 
   Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $
 

Modified: llvm/trunk/docs/CompilerDriverTutorial.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerDriverTutorial.html?rev=60912&r1=60911&r2=60912&view=diff

==============================================================================
--- llvm/trunk/docs/CompilerDriverTutorial.html (original)
+++ llvm/trunk/docs/CompilerDriverTutorial.html Thu Dec 11 17:43:14 2008
@@ -112,13 +112,15 @@
 http://llvm.cs.uiuc.edu/docs/TableGenFundamentals.html
 
 
-
+
 
-  
-  
+  
+  
 
-  Mikhail Glushenkov

-  LLVM Compiler Infrastructure

+  Mikhail Glushenkov

+  LLVM Compiler Infrastructure

 
   Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $
 

Modified: llvm/trunk/tools/llvmc/doc/footer.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/footer.html?rev=60912&r1=60911&r2=60912&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/doc/footer.html (original)
+++ llvm/trunk/tools/llvmc/doc/footer.html Thu Dec 11 17:43:14 2008
@@ -1,10 +1,12 @@
-
+
 
-  
-  
+  
+  
 
-  Mikhail Glushenkov

-  LLVM Compiler Infrastructure

+  Mikhail Glushenkov

+  LLVM Compiler Infrastructure

 
   Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $
 




From dpatel at apple.com  Thu Dec 11 18:20:49 2008
From: dpatel at apple.com (Devang Patel)
Date: Fri, 12 Dec 2008 00:20:49 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r60913 -
	/llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1
Message-ID: <200812120020.mBC0Kn57012668@zion.cs.uiuc.edu>

Author: dpatel
Date: Thu Dec 11 18:20:49 2008
New Revision: 60913

URL: http://llvm.org/viewvc/llvm-project?rev=60913&view=rev
Log:
Add our own man page!

Added:
    llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1

Added: llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1?rev=60913&view=auto

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1 (added)
+++ llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1 Thu Dec 11 18:20:49 2008
@@ -0,0 +1,28 @@
+.Dd December 11, 2008
+.Dt llvm-gcc 1
+.Os Darwin
+.Sh NAME
+.Nm llvm-gcc
+.Sh SYNOPSIS
+llvm-gcc  [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard\fR]
+          [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR]
+          [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR]
+          [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...]
+          [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
+          [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...]
+          [\fB\-o\fR \fIoutfile\fR] \fIinfile\fR...
+.Sh DESCRIPTION
+llvm-gcc is a C, C++, Objective-C and Objective-C++ compiler. llvm-gcc uses gcc front-end and gcc's command line interface. Consult cc(1) man page for command line options supported by llvm-gcc. Only selected LLVM specific options are listed here.
+.Pp
+.Bl -tag -width -indent
+.It Fl flto
+Enables Link Time Optimization. Link Time Optimization is performed by ld(1) transparently using LLVM optimizer. The object file generated contains intermediate LLVM bitcode instead of Mach-O objects.
+.It Fl O4
+Enables Link Time Optimization in addition to all optimizations enabled at -O3.
+.El
+.Pp
+.Sh SEE ALSO 
+.Xr cc 1, 
+.Xr ld 1 
+.\" .Sh BUGS              \" Document known, unremedied bugs 
+.\" .Sh HISTORY           \" Document history if command behaves in a unique manner 




From dpatel at apple.com  Thu Dec 11 18:21:43 2008
From: dpatel at apple.com (Devang Patel)
Date: Fri, 12 Dec 2008 00:21:43 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r60914 - /llvm-gcc-4.2/trunk/build_gcc
Message-ID: <200812120021.mBC0Lhmx012708@zion.cs.uiuc.edu>

Author: dpatel
Date: Thu Dec 11 18:21:42 2008
New Revision: 60914

URL: http://llvm.org/viewvc/llvm-project?rev=60914&view=rev
Log:
Install new llvm-gcc man page.

Modified:
    llvm-gcc-4.2/trunk/build_gcc

Modified: llvm-gcc-4.2/trunk/build_gcc
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/build_gcc?rev=60914&r1=60913&r2=60914&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/build_gcc (original)
+++ llvm-gcc-4.2/trunk/build_gcc Thu Dec 11 18:21:42 2008
@@ -512,6 +512,9 @@
 # LLVM LOCAL begin
 # Compress manpages
 gzip -f $MDIR/*
+mkdir -p /Developer/usr/share/man/man1
+cp $ORIG_SRC_DIR/gcc/doc/llvm-gcc.1 /Developer/usr/share/man/man1/llvm-gcc.1
+gzip -f /Developer/usr/share/man/man1/llvm-gcc.1
 # LLVM LOCAL end
 
 # Build driver-driver using fully-named drivers




From isanbard at gmail.com  Thu Dec 11 18:56:38 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Fri, 12 Dec 2008 00:56:38 -0000
Subject: [llvm-commits] [llvm] r60915 - in /llvm/trunk/lib:
 CodeGen/SelectionDAG/DAGCombiner.cpp Target/X86/X86ISelLowering.cpp
 Target/X86/X86ISelLowering.h Target/X86/X86Instr64bit.td
 Target/X86/X86InstrInfo.td
Message-ID: <200812120056.mBC0ucER013691@zion.cs.uiuc.edu>

Author: void
Date: Thu Dec 11 18:56:36 2008
New Revision: 60915

URL: http://llvm.org/viewvc/llvm-project?rev=60915&view=rev
Log:
Redo the arithmetic with overflow architecture. I was changing the semantics of
ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace
the intrinsic with an ISD::SADDO node. Then custom lower that into an
X86ISD::ADD node with a associated SETCC that checks the correct condition code
(overflow or carry). Then that gets lowered into the correct X86::ADDOvf
instruction.

Similar for SUB and MUL instructions.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.h
    llvm/trunk/lib/Target/X86/X86Instr64bit.td
    llvm/trunk/lib/Target/X86/X86InstrInfo.td

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=60915&r1=60914&r2=60915&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Dec 11 18:56:36 2008
@@ -967,11 +967,6 @@
     if (FoldedVOp.getNode()) return FoldedVOp;
   }
 
-  if (N->getNumValues() != 1)
-    // FIXME: DAG combiner cannot handle arithmetic operators which produce
-    // multiple results.
-    return SDValue();
-  
   // fold (add x, undef) -> undef
   if (N0.getOpcode() == ISD::UNDEF)
     return N0;
@@ -1167,11 +1162,6 @@
     if (FoldedVOp.getNode()) return FoldedVOp;
   }
 
-  if (N->getNumValues() != 1)
-    // FIXME: DAG combiner cannot handle arithmetic operators which produce
-    // multiple results.
-    return SDValue();
-  
   // fold (sub x, x) -> 0
   if (N0 == N1)
     return DAG.getConstant(0, N->getValueType(0));
@@ -1230,11 +1220,6 @@
     if (FoldedVOp.getNode()) return FoldedVOp;
   }
   
-  if (N->getNumValues() != 1)
-    // FIXME: DAG combiner cannot handle arithmetic operators which produce
-    // multiple results.
-    return SDValue();
-    
   // fold (mul x, undef) -> 0
   if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF)
     return DAG.getConstant(0, VT);

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=60915&r1=60914&r2=60915&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Dec 11 18:56:36 2008
@@ -5210,9 +5210,9 @@
 
   if (Cond.getOpcode() == ISD::SETCC)
     Cond = LowerSETCC(Cond, DAG);
-  else if (Cond.getOpcode() == ISD::SADDO || Cond.getOpcode() == ISD::UADDO ||
-           Cond.getOpcode() == ISD::SSUBO || Cond.getOpcode() == ISD::USUBO ||
-           Cond.getOpcode() == ISD::SMULO || Cond.getOpcode() == ISD::UMULO)
+  else if (Cond.getOpcode() == X86ISD::ADD ||
+           Cond.getOpcode() == X86ISD::SUB ||
+           Cond.getOpcode() == X86ISD::MUL)
     Cond = LowerXALUO(Cond, DAG);
 
   // If condition flag is set by a X86ISD::CMP, then use it as the condition
@@ -6142,27 +6142,27 @@
   switch (Op.getOpcode()) {
   default: assert(0 && "Unknown ovf instruction!");
   case ISD::SADDO:
-    BaseOp = ISD::ADD;
+    BaseOp = X86ISD::ADD;
     Cond = X86::COND_O;
     break;
   case ISD::UADDO:
-    BaseOp = ISD::ADD;
+    BaseOp = X86ISD::ADD;
     Cond = X86::COND_C;
     break;
   case ISD::SSUBO:
-    BaseOp = ISD::SUB;
+    BaseOp = X86ISD::SUB;
     Cond = X86::COND_O;
     break;
   case ISD::USUBO:
-    BaseOp = ISD::SUB;
+    BaseOp = X86ISD::SUB;
     Cond = X86::COND_C;
     break;
   case ISD::SMULO:
-    BaseOp = ISD::MUL;
+    BaseOp = X86ISD::MUL;
     Cond = X86::COND_O;
     break;
   case ISD::UMULO:
-    BaseOp = ISD::MUL;
+    BaseOp = X86ISD::MUL;
     Cond = X86::COND_C;
     break;
   }
@@ -6488,6 +6488,9 @@
   case X86ISD::PCMPGTW:            return "X86ISD::PCMPGTW";
   case X86ISD::PCMPGTD:            return "X86ISD::PCMPGTD";
   case X86ISD::PCMPGTQ:            return "X86ISD::PCMPGTQ";
+  case X86ISD::ADD:                return "X86ISD::ADD";
+  case X86ISD::SUB:                return "X86ISD::SUB";
+  case X86ISD::MUL:                return "X86ISD::MUL";
   }
 }
 

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=60915&r1=60914&r2=60915&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Thu Dec 11 18:56:36 2008
@@ -227,7 +227,11 @@
       
       // PCMP* - Vector integer comparisons.
       PCMPEQB, PCMPEQW, PCMPEQD, PCMPEQQ,
-      PCMPGTB, PCMPGTW, PCMPGTD, PCMPGTQ
+      PCMPGTB, PCMPGTW, PCMPGTD, PCMPGTQ,
+
+      // ADD, SUB, MUL - Arithmetic operations with overflow/carry
+      // intrinsics.
+      ADD, SUB, MUL
     };
   }
 

Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=60915&r1=60914&r2=60915&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original)
+++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Thu Dec 11 18:56:36 2008
@@ -312,39 +312,76 @@
 let isTwoAddress = 1 in {
 let isConvertibleToThreeAddress = 1 in {
 let isCommutable = 1 in
-def ADD64rr  : RI<0x01, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
-                  "add{q}\t{$src2, $dst|$dst, $src2}",
-                  [(set GR64:$dst, (add GR64:$src1, GR64:$src2)),
-                   (implicit EFLAGS)]>;
+// Register-Register Addition
+def ADD64rr    : RI<0x01, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
+                    "add{q}\t{$src2, $dst|$dst, $src2}",
+                    [(set GR64:$dst, (add GR64:$src1, GR64:$src2))]>;
 
-def ADD64ri32 : RIi32<0x81, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2),
-                      "add{q}\t{$src2, $dst|$dst, $src2}",
-                      [(set GR64:$dst, (add GR64:$src1, i64immSExt32:$src2)),
-                       (implicit EFLAGS)]>;
-def ADD64ri8 : RIi8<0x83, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2),
+// Register-Register Addition with Overflow
+def ADDOvf64rr : RI<0x01, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
                     "add{q}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR64:$dst, (add GR64:$src1, i64immSExt8:$src2)),
+                    [(set GR64:$dst, (X86add_ovf GR64:$src1, GR64:$src2)),
                      (implicit EFLAGS)]>;
+
+// Register-Integer Addition
+def ADD64ri32 : RIi32<0x81, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2),
+                      "add{q}\t{$src2, $dst|$dst, $src2}",
+                      [(set GR64:$dst, (add GR64:$src1, i64immSExt32:$src2))]>;
+def ADD64ri8  : RIi8<0x83, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2),
+                     "add{q}\t{$src2, $dst|$dst, $src2}",
+                     [(set GR64:$dst, (add GR64:$src1, i64immSExt8:$src2))]>;
+
+// Register-Integer Addition with Overflow
+def ADDOvf64ri32 : RIi32<0x81, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2),
+                         "add{q}\t{$src2, $dst|$dst, $src2}",
+                         [(set GR64:$dst, (X86add_ovf GR64:$src1, i64immSExt32:$src2)),
+                          (implicit EFLAGS)]>;
+def ADDOvf64ri8  : RIi8<0x83, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2),
+                        "add{q}\t{$src2, $dst|$dst, $src2}",
+                        [(set GR64:$dst, (X86add_ovf GR64:$src1, i64immSExt8:$src2)),
+                         (implicit EFLAGS)]>;
 } // isConvertibleToThreeAddress
 
-def ADD64rm  : RI<0x03, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2),
-                  "add{q}\t{$src2, $dst|$dst, $src2}",
-                  [(set GR64:$dst, (add GR64:$src1, (load addr:$src2))),
-                   (implicit EFLAGS)]>;
+// Register-Memory Addition
+def ADD64rm     : RI<0x03, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2),
+                     "add{q}\t{$src2, $dst|$dst, $src2}",
+                     [(set GR64:$dst, (add GR64:$src1, (load addr:$src2)))]>;
+
+// Register-Memory Addition with Overflow
+def ADDOvf64rm  : RI<0x03, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2),
+                     "add{q}\t{$src2, $dst|$dst, $src2}",
+                     [(set GR64:$dst, (X86add_ovf GR64:$src1, (load addr:$src2))),
+                      (implicit EFLAGS)]>;
 } // isTwoAddress
 
+// Memory-Register Addition
 def ADD64mr  : RI<0x01, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2),
                   "add{q}\t{$src2, $dst|$dst, $src2}",
-                  [(store (add (load addr:$dst), GR64:$src2), addr:$dst),
-                   (implicit EFLAGS)]>;
+                  [(store (add (load addr:$dst), GR64:$src2), addr:$dst)]>;
 def ADD64mi32 : RIi32<0x81, MRM0m, (outs), (ins i64mem:$dst, i64i32imm :$src2),
                       "add{q}\t{$src2, $dst|$dst, $src2}",
-               [(store (add (load addr:$dst), i64immSExt32:$src2), addr:$dst),
-                (implicit EFLAGS)]>;
+               [(store (add (load addr:$dst), i64immSExt32:$src2), addr:$dst)]>;
 def ADD64mi8 : RIi8<0x83, MRM0m, (outs), (ins i64mem:$dst, i64i8imm :$src2),
                     "add{q}\t{$src2, $dst|$dst, $src2}",
-                [(store (add (load addr:$dst), i64immSExt8:$src2), addr:$dst),
-                 (implicit EFLAGS)]>;
+                [(store (add (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>;
+
+// Memory-Register Addition with Overflow
+def ADDOvf64mr   : RI<0x01, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2),
+                      "add{q}\t{$src2, $dst|$dst, $src2}",
+                      [(store (X86add_ovf (load addr:$dst), GR64:$src2),
+                              addr:$dst),
+                       (implicit EFLAGS)]>;
+def ADDOvf64mi32 : RIi32<0x81, MRM0m, (outs),(ins i64mem:$dst, i64i32imm:$src2),
+                         "add{q}\t{$src2, $dst|$dst, $src2}",
+                         [(store (X86add_ovf (load addr:$dst),
+                                             i64immSExt32:$src2),
+                                 addr:$dst),
+                          (implicit EFLAGS)]>;
+def ADDOvf64mi8 : RIi8<0x83, MRM0m, (outs), (ins i64mem:$dst, i64i8imm :$src2),
+                       "add{q}\t{$src2, $dst|$dst, $src2}",
+                       [(store (X86add_ovf (load addr:$dst), i64immSExt8:$src2),
+                               addr:$dst),
+                        (implicit EFLAGS)]>;
 
 let Uses = [EFLAGS] in {
 let isTwoAddress = 1 in {
@@ -377,38 +414,86 @@
 } // Uses = [EFLAGS]
 
 let isTwoAddress = 1 in {
+// Register-Register Subtraction
 def SUB64rr  : RI<0x29, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
                   "sub{q}\t{$src2, $dst|$dst, $src2}",
-                  [(set GR64:$dst, (sub GR64:$src1, GR64:$src2)),
-                   (implicit EFLAGS)]>;
+                  [(set GR64:$dst, (sub GR64:$src1, GR64:$src2))]>;
+
+// Register-Register Subtraction with Overflow
+def SUBOvf64rr : RI<0x29, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
+                    "sub{q}\t{$src2, $dst|$dst, $src2}",
+                    [(set GR64:$dst, (X86sub_ovf GR64:$src1, GR64:$src2)),
+                     (implicit EFLAGS)]>;
 
+// Register-Memory Subtraction
 def SUB64rm  : RI<0x2B, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2),
                   "sub{q}\t{$src2, $dst|$dst, $src2}",
-                  [(set GR64:$dst, (sub GR64:$src1, (load addr:$src2))),
-                   (implicit EFLAGS)]>;
+                  [(set GR64:$dst, (sub GR64:$src1, (load addr:$src2)))]>;
+
+// Register-Memory Subtraction with Overflow
+def SUBOvf64rm : RI<0x2B, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2),
+                    "sub{q}\t{$src2, $dst|$dst, $src2}",
+                    [(set GR64:$dst, (X86sub_ovf GR64:$src1, (load addr:$src2))),
+                     (implicit EFLAGS)]>;
 
-def SUB64ri32 : RIi32<0x81, MRM5r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2),
+// Register-Integer Subtraction
+def SUB64ri32 : RIi32<0x81, MRM5r, (outs GR64:$dst),
+                                   (ins GR64:$src1, i64i32imm:$src2),
                       "sub{q}\t{$src2, $dst|$dst, $src2}",
-                      [(set GR64:$dst, (sub GR64:$src1, i64immSExt32:$src2)),
-                   (implicit EFLAGS)]>;
-def SUB64ri8 : RIi8<0x83, MRM5r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2),
+                      [(set GR64:$dst, (sub GR64:$src1, i64immSExt32:$src2))]>;
+def SUB64ri8 : RIi8<0x83, MRM5r, (outs GR64:$dst),
+                                 (ins GR64:$src1, i64i8imm:$src2),
                     "sub{q}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR64:$dst, (sub GR64:$src1, i64immSExt8:$src2)),
-                   (implicit EFLAGS)]>;
+                    [(set GR64:$dst, (sub GR64:$src1, i64immSExt8:$src2))]>;
+
+// Register-Integer Subtraction with Overflow
+def SUBOvf64ri32 : RIi32<0x81, MRM5r, (outs GR64:$dst),
+                                      (ins GR64:$src1, i64i32imm:$src2),
+                         "sub{q}\t{$src2, $dst|$dst, $src2}",
+                         [(set GR64:$dst, (X86sub_ovf GR64:$src1,
+                                                      i64immSExt32:$src2)),
+                          (implicit EFLAGS)]>;
+def SUBOvf64ri8 : RIi8<0x83, MRM5r, (outs GR64:$dst),
+                                    (ins GR64:$src1, i64i8imm:$src2),
+                       "sub{q}\t{$src2, $dst|$dst, $src2}",
+                       [(set GR64:$dst, (X86sub_ovf GR64:$src1,
+                                                    i64immSExt8:$src2)),
+                        (implicit EFLAGS)]>;
 } // isTwoAddress
 
+// Memory-Register Subtraction
 def SUB64mr  : RI<0x29, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), 
                   "sub{q}\t{$src2, $dst|$dst, $src2}",
-                  [(store (sub (load addr:$dst), GR64:$src2), addr:$dst),
-                   (implicit EFLAGS)]>;
-def SUB64mi32 : RIi32<0x81, MRM5m, (outs), (ins i64mem:$dst, i64i32imm:$src2), 
+                  [(store (sub (load addr:$dst), GR64:$src2), addr:$dst)]>;
+
+// Memory-Register Subtraction with Overflow
+def SUBOvf64mr : RI<0x29, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), 
+                    "sub{q}\t{$src2, $dst|$dst, $src2}",
+                    [(store (X86sub_ovf (load addr:$dst), GR64:$src2),
+                            addr:$dst),
+                     (implicit EFLAGS)]>;
+
+// Memory-Integer Subtraction
+def SUB64mi32 : RIi32<0x81, MRM5m, (outs), (ins i64mem:$dst, i64i32imm:$src2),
                       "sub{q}\t{$src2, $dst|$dst, $src2}",
-               [(store (sub (load addr:$dst), i64immSExt32:$src2), addr:$dst),
-                   (implicit EFLAGS)]>;
+                      [(store (sub (load addr:$dst), i64immSExt32:$src2),
+                              addr:$dst)]>;
 def SUB64mi8 : RIi8<0x83, MRM5m, (outs), (ins i64mem:$dst, i64i8imm :$src2), 
                     "sub{q}\t{$src2, $dst|$dst, $src2}",
-                [(store (sub (load addr:$dst), i64immSExt8:$src2), addr:$dst),
-                   (implicit EFLAGS)]>;
+                    [(store (sub (load addr:$dst), i64immSExt8:$src2),
+                            addr:$dst)]>;
+
+// Memory-Integer Subtraction with Overflow
+def SUBOvf64mi32 : RIi32<0x81, MRM5m, (outs), (ins i64mem:$dst,i64i32imm:$src2),
+                         "sub{q}\t{$src2, $dst|$dst, $src2}",
+                         [(store (X86sub_ovf (load addr:$dst),
+                                             i64immSExt32:$src2), addr:$dst),
+                          (implicit EFLAGS)]>;
+def SUBOvf64mi8 : RIi8<0x83, MRM5m, (outs), (ins i64mem:$dst, i64i8imm :$src2), 
+                       "sub{q}\t{$src2, $dst|$dst, $src2}",
+                       [(store (X86sub_ovf (load addr:$dst), i64immSExt8:$src2),
+                               addr:$dst),
+                        (implicit EFLAGS)]>;
 
 let Uses = [EFLAGS] in {
 let isTwoAddress = 1 in {
@@ -459,38 +544,85 @@
 let Defs = [EFLAGS] in {
 let isTwoAddress = 1 in {
 let isCommutable = 1 in
-def IMUL64rr : RI<0xAF, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
+// Register-Register Integer Multiplication
+def IMUL64rr : RI<0xAF, MRMSrcReg, (outs GR64:$dst),
+                                   (ins GR64:$src1, GR64:$src2),
                   "imul{q}\t{$src2, $dst|$dst, $src2}",
-                  [(set GR64:$dst, (mul GR64:$src1, GR64:$src2)),
-                   (implicit EFLAGS)]>, TB;
+                  [(set GR64:$dst, (mul GR64:$src1, GR64:$src2))]>, TB;
 
-def IMUL64rm : RI<0xAF, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2),
+// Register-Register Multiplication with Overflow
+def IMULOvf64rr : RI<0xAF, MRMSrcReg, (outs GR64:$dst),
+                                      (ins GR64:$src1, GR64:$src2),
+                     "imul{q}\t{$src2, $dst|$dst, $src2}",
+                     [(set GR64:$dst, (X86mul_ovf GR64:$src1, GR64:$src2)),
+                      (implicit EFLAGS)]>, TB;
+
+// Register-Memory Integer Multiplication
+def IMUL64rm : RI<0xAF, MRMSrcMem, (outs GR64:$dst),
+                                   (ins GR64:$src1, i64mem:$src2),
                   "imul{q}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR64:$dst, (mul GR64:$src1, (load addr:$src2))),
-                  (implicit EFLAGS)]>, TB;
+                  [(set GR64:$dst, (mul GR64:$src1, (load addr:$src2)))]>, TB;
+
+// Register-Memory Integer Multiplication with Overflow
+def IMULOvf64rm : RI<0xAF, MRMSrcMem, (outs GR64:$dst),
+                                      (ins GR64:$src1, i64mem:$src2),
+                     "imul{q}\t{$src2, $dst|$dst, $src2}",
+                     [(set GR64:$dst, (X86mul_ovf GR64:$src1,
+                                                  (load addr:$src2))),
+                      (implicit EFLAGS)]>, TB;
 } // isTwoAddress
 
 // Suprisingly enough, these are not two address instructions!
+
+// Register-Integer Integer Multiplication
 def IMUL64rri32 : RIi32<0x69, MRMSrcReg,                    // GR64 = GR64*I32
                         (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2),
                         "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                       [(set GR64:$dst, (mul GR64:$src1, i64immSExt32:$src2)),
-                        (implicit EFLAGS)]>;
+                       [(set GR64:$dst, (mul GR64:$src1, i64immSExt32:$src2))]>;
 def IMUL64rri8 : RIi8<0x6B, MRMSrcReg,                      // GR64 = GR64*I8
                       (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2),
                       "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                      [(set GR64:$dst, (mul GR64:$src1, i64immSExt8:$src2)),
-                       (implicit EFLAGS)]>;
+                      [(set GR64:$dst, (mul GR64:$src1, i64immSExt8:$src2))]>;
+
+// Register-Integer Integer Multiplication with Overflow
+def IMULOvf64rri32 : RIi32<0x69, MRMSrcReg,                 // GR64 = GR64*I32
+                           (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2),
+                           "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                           [(set GR64:$dst, (X86mul_ovf GR64:$src1,
+                                                        i64immSExt32:$src2)),
+                            (implicit EFLAGS)]>;
+def IMULOvf64rri8 : RIi8<0x6B, MRMSrcReg,                   // GR64 = GR64*I8
+                         (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2),
+                         "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                         [(set GR64:$dst, (X86mul_ovf GR64:$src1,
+                                                      i64immSExt8:$src2)),
+                          (implicit EFLAGS)]>;
+
+// Memory-Integer Integer Multiplication
 def IMUL64rmi32 : RIi32<0x69, MRMSrcMem,                   // GR64 = [mem64]*I32
                         (outs GR64:$dst), (ins i64mem:$src1, i64i32imm:$src2),
                         "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                [(set GR64:$dst, (mul (load addr:$src1), i64immSExt32:$src2)),
-                 (implicit EFLAGS)]>;
+                        [(set GR64:$dst, (mul (load addr:$src1),
+                                              i64immSExt32:$src2))]>;
 def IMUL64rmi8 : RIi8<0x6B, MRMSrcMem,                      // GR64 = [mem64]*I8
                       (outs GR64:$dst), (ins i64mem:$src1, i64i8imm: $src2),
                       "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                 [(set GR64:$dst, (mul (load addr:$src1), i64immSExt8:$src2)),
-                  (implicit EFLAGS)]>;
+                      [(set GR64:$dst, (mul (load addr:$src1),
+                                            i64immSExt8:$src2))]>;
+
+// Memory-Integer Integer Multiplication with Overflow
+def IMULOvf64rmi32 : RIi32<0x69, MRMSrcMem,                   // GR64 = [mem64]*I32
+                           (outs GR64:$dst), (ins i64mem:$src1, i64i32imm:$src2),
+                           "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                           [(set GR64:$dst, (X86mul_ovf (load addr:$src1),
+                                                        i64immSExt32:$src2)),
+                            (implicit EFLAGS)]>;
+def IMULOvf64rmi8 : RIi8<0x6B, MRMSrcMem,                      // GR64 = [mem64]*I8
+                         (outs GR64:$dst), (ins i64mem:$src1, i64i8imm: $src2),
+                         "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                         [(set GR64:$dst, (X86mul_ovf (load addr:$src1),
+                                                      i64immSExt8:$src2)),
+                          (implicit EFLAGS)]>;
 } // Defs = [EFLAGS]
 
 // Unsigned division / remainder

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=60915&r1=60914&r2=60915&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Thu Dec 11 18:56:36 2008
@@ -27,6 +27,10 @@
                                   [SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>,
                                    SDTCisVT<3, i8>, SDTCisVT<4, i32>]>;
 
+def SDTArithOvf : SDTypeProfile<1, 2,
+                                [SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>,
+                                 SDTCisInt<0>]>;
+
 def SDTX86BrCond  : SDTypeProfile<0, 3,
                                   [SDTCisVT<0, OtherVT>,
                                    SDTCisVT<1, i8>, SDTCisVT<2, i32>]>;
@@ -140,6 +144,10 @@
 def X86tcret : SDNode<"X86ISD::TC_RETURN", SDT_X86TCRET, 
                         [SDNPHasChain,  SDNPOptInFlag]>;
 
+def X86add_ovf : SDNode<"X86ISD::ADD", SDTArithOvf>;
+def X86sub_ovf : SDNode<"X86ISD::SUB", SDTArithOvf>;
+def X86mul_ovf : SDNode<"X86ISD::MUL", SDTArithOvf>;
+
 //===----------------------------------------------------------------------===//
 // X86 Operand Definitions.
 //
@@ -1923,104 +1931,202 @@
 // Arithmetic.
 let Defs = [EFLAGS] in {
 let isCommutable = 1 in {   // X = ADD Y, Z   --> X = ADD Z, Y
-def ADD8rr   : I<0x00, MRMDestReg, (outs GR8 :$dst),
-                                   (ins GR8 :$src1, GR8 :$src2),
-                 "add{b}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR8:$dst, (add GR8:$src1, GR8:$src2)),
-                  (implicit EFLAGS)]>;
+// Register-Register Addition
+def ADD8rr    : I<0x00, MRMDestReg, (outs GR8 :$dst),
+                                    (ins GR8 :$src1, GR8 :$src2),
+                  "add{b}\t{$src2, $dst|$dst, $src2}",
+                  [(set GR8:$dst, (add GR8:$src1, GR8:$src2))]>;
+
+// Register-Register Addition with Overflow
+def ADDOvf8rr : I<0x00, MRMDestReg, (outs GR8 :$dst),
+                                    (ins GR8 :$src1, GR8 :$src2),
+                  "add{b}\t{$src2, $dst|$dst, $src2}",
+                  [(set GR8:$dst, (X86add_ovf GR8:$src1, GR8:$src2)),
+                   (implicit EFLAGS)]>;
+
 let isConvertibleToThreeAddress = 1 in {   // Can transform into LEA.
+// Register-Register Addition
 def ADD16rr  : I<0x01, MRMDestReg, (outs GR16:$dst),
                                    (ins GR16:$src1, GR16:$src2),
                  "add{w}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR16:$dst, (add GR16:$src1, GR16:$src2)),
-                  (implicit EFLAGS)]>, OpSize;
+                 [(set GR16:$dst, (add GR16:$src1, GR16:$src2))]>, OpSize;
 def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst),
                                    (ins GR32:$src1, GR32:$src2),
                  "add{l}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2)),
-                  (implicit EFLAGS)]>;
+                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
+
+// Register-Register Addition with Overflow
+def ADDOvf16rr : I<0x01, MRMDestReg, (outs GR16:$dst),
+                                     (ins GR16:$src1, GR16:$src2),
+                   "add{w}\t{$src2, $dst|$dst, $src2}",
+                   [(set GR16:$dst, (X86add_ovf GR16:$src1, GR16:$src2)),
+                    (implicit EFLAGS)]>, OpSize;
+def ADDOvf32rr : I<0x01, MRMDestReg, (outs GR32:$dst),
+                                     (ins GR32:$src1, GR32:$src2),
+                   "add{l}\t{$src2, $dst|$dst, $src2}",
+                   [(set GR32:$dst, (X86add_ovf GR32:$src1, GR32:$src2)),
+                    (implicit EFLAGS)]>;
 } // end isConvertibleToThreeAddress
 } // end isCommutable
+
+// Register-Memory Addition
 def ADD8rm   : I<0x02, MRMSrcMem, (outs GR8 :$dst),
                                   (ins GR8 :$src1, i8mem :$src2),
                  "add{b}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR8:$dst, (add GR8:$src1, (load addr:$src2))),
-                  (implicit EFLAGS)]>;
+                 [(set GR8:$dst, (add GR8:$src1, (load addr:$src2)))]>;
 def ADD16rm  : I<0x03, MRMSrcMem, (outs GR16:$dst),
                                   (ins GR16:$src1, i16mem:$src2),
                  "add{w}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR16:$dst, (add GR16:$src1, (load addr:$src2))),
-                  (implicit EFLAGS)]>, OpSize;
+                 [(set GR16:$dst, (add GR16:$src1, (load addr:$src2)))]>,OpSize;
 def ADD32rm  : I<0x03, MRMSrcMem, (outs GR32:$dst),
                                   (ins GR32:$src1, i32mem:$src2),
                  "add{l}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR32:$dst, (add GR32:$src1, (load addr:$src2))),
-                  (implicit EFLAGS)]>;
+                 [(set GR32:$dst, (add GR32:$src1, (load addr:$src2)))]>;
 
-def ADD8ri   : Ii8<0x80, MRM0r, (outs GR8:$dst), (ins GR8:$src1, i8imm:$src2),
+// Register-Memory Addition with Overflow
+def ADDOvf8rm  : I<0x02, MRMSrcMem, (outs GR8 :$dst),
+                                    (ins GR8 :$src1, i8mem :$src2),
                    "add{b}\t{$src2, $dst|$dst, $src2}",
-                   [(set GR8:$dst, (add GR8:$src1, imm:$src2)),
+                   [(set GR8:$dst, (X86add_ovf GR8:$src1, (load addr:$src2))),
+                    (implicit EFLAGS)]>;
+def ADDOvf16rm : I<0x03, MRMSrcMem, (outs GR16:$dst),
+                                    (ins GR16:$src1, i16mem:$src2),
+                   "add{w}\t{$src2, $dst|$dst, $src2}",
+                   [(set GR16:$dst, (X86add_ovf GR16:$src1, (load addr:$src2))),
+                    (implicit EFLAGS)]>, OpSize;
+def ADDOvf32rm : I<0x03, MRMSrcMem, (outs GR32:$dst),
+                                    (ins GR32:$src1, i32mem:$src2),
+                   "add{l}\t{$src2, $dst|$dst, $src2}",
+                   [(set GR32:$dst, (X86add_ovf GR32:$src1, (load addr:$src2))),
                     (implicit EFLAGS)]>;
 
+// Register-Integer Addition
+def ADD8ri    : Ii8<0x80, MRM0r, (outs GR8:$dst), (ins GR8:$src1, i8imm:$src2),
+                    "add{b}\t{$src2, $dst|$dst, $src2}",
+                    [(set GR8:$dst, (add GR8:$src1, imm:$src2))]>;
+
+// Register-Integer Addition with Overflow
+def ADDOvf8ri  : Ii8<0x80, MRM0r, (outs GR8:$dst), (ins GR8:$src1, i8imm:$src2),
+                     "add{b}\t{$src2, $dst|$dst, $src2}",
+                     [(set GR8:$dst, (X86add_ovf GR8:$src1, imm:$src2)),
+                      (implicit EFLAGS)]>;
+
 let isConvertibleToThreeAddress = 1 in {   // Can transform into LEA.
+// Register-Integer Addition
 def ADD16ri  : Ii16<0x81, MRM0r, (outs GR16:$dst),
                                  (ins GR16:$src1, i16imm:$src2),
                     "add{w}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR16:$dst, (add GR16:$src1, imm:$src2)),
-                     (implicit EFLAGS)]>, OpSize;
+                    [(set GR16:$dst, (add GR16:$src1, imm:$src2))]>, OpSize;
 def ADD32ri  : Ii32<0x81, MRM0r, (outs GR32:$dst),
                                  (ins GR32:$src1, i32imm:$src2),
                     "add{l}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR32:$dst, (add GR32:$src1, imm:$src2)),
-                     (implicit EFLAGS)]>;
+                    [(set GR32:$dst, (add GR32:$src1, imm:$src2))]>;
 def ADD16ri8 : Ii8<0x83, MRM0r, (outs GR16:$dst),
                                 (ins GR16:$src1, i16i8imm:$src2),
                    "add{w}\t{$src2, $dst|$dst, $src2}",
-                [(set GR16:$dst, (add GR16:$src1, i16immSExt8:$src2)),
-                 (implicit EFLAGS)]>, OpSize;
+                [(set GR16:$dst, (add GR16:$src1, i16immSExt8:$src2))]>, OpSize;
 def ADD32ri8 : Ii8<0x83, MRM0r, (outs GR32:$dst),
                                 (ins GR32:$src1, i32i8imm:$src2),
                    "add{l}\t{$src2, $dst|$dst, $src2}",
-                [(set GR32:$dst, (add GR32:$src1, i32immSExt8:$src2)),
-                 (implicit EFLAGS)]>;
+                [(set GR32:$dst, (add GR32:$src1, i32immSExt8:$src2))]>;
+
+// Register-Integer Addition with Overflow
+def ADDOvf16ri  : Ii16<0x81, MRM0r, (outs GR16:$dst),
+                                    (ins GR16:$src1, i16imm:$src2),
+                       "add{w}\t{$src2, $dst|$dst, $src2}",
+                       [(set GR16:$dst, (X86add_ovf GR16:$src1, imm:$src2)),
+                        (implicit EFLAGS)]>, OpSize;
+def ADDOvf32ri  : Ii32<0x81, MRM0r, (outs GR32:$dst),
+                                    (ins GR32:$src1, i32imm:$src2),
+                       "add{l}\t{$src2, $dst|$dst, $src2}",
+                       [(set GR32:$dst, (X86add_ovf GR32:$src1, imm:$src2)),
+                        (implicit EFLAGS)]>;
+def ADDOvf16ri8 : Ii8<0x83, MRM0r, (outs GR16:$dst),
+                                   (ins GR16:$src1, i16i8imm:$src2),
+                      "add{w}\t{$src2, $dst|$dst, $src2}",
+                      [(set GR16:$dst, (X86add_ovf GR16:$src1,
+                                                   i16immSExt8:$src2)),
+                       (implicit EFLAGS)]>, OpSize;
+def ADDOvf32ri8 : Ii8<0x83, MRM0r, (outs GR32:$dst),
+                                   (ins GR32:$src1, i32i8imm:$src2),
+                      "add{l}\t{$src2, $dst|$dst, $src2}",
+                      [(set GR32:$dst, (X86add_ovf GR32:$src1,
+                                        i32immSExt8:$src2)),
+                       (implicit EFLAGS)]>;
 }
 
 let isTwoAddress = 0 in {
+  // Memory-Register Addition
   def ADD8mr   : I<0x00, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src2),
                    "add{b}\t{$src2, $dst|$dst, $src2}",
-                   [(store (add (load addr:$dst), GR8:$src2), addr:$dst),
-                    (implicit EFLAGS)]>;
+                   [(store (add (load addr:$dst), GR8:$src2), addr:$dst)]>;
   def ADD16mr  : I<0x01, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2),
                    "add{w}\t{$src2, $dst|$dst, $src2}",
-                   [(store (add (load addr:$dst), GR16:$src2), addr:$dst),
-                    (implicit EFLAGS)]>,
-                 OpSize;
+                   [(store (add (load addr:$dst), GR16:$src2), addr:$dst)]>,
+                   OpSize;
   def ADD32mr  : I<0x01, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2),
                    "add{l}\t{$src2, $dst|$dst, $src2}",
-                   [(store (add (load addr:$dst), GR32:$src2), addr:$dst),
-                    (implicit EFLAGS)]>;
+                   [(store (add (load addr:$dst), GR32:$src2), addr:$dst)]>;
   def ADD8mi   : Ii8<0x80, MRM0m, (outs), (ins i8mem :$dst, i8imm :$src2),
                      "add{b}\t{$src2, $dst|$dst, $src2}",
-                   [(store (add (loadi8 addr:$dst), imm:$src2), addr:$dst),
-                    (implicit EFLAGS)]>;
+                   [(store (add (loadi8 addr:$dst), imm:$src2), addr:$dst)]>;
   def ADD16mi  : Ii16<0x81, MRM0m, (outs), (ins i16mem:$dst, i16imm:$src2),
                       "add{w}\t{$src2, $dst|$dst, $src2}",
-                  [(store (add (loadi16 addr:$dst), imm:$src2), addr:$dst),
-                   (implicit EFLAGS)]>,
-                 OpSize;
+                  [(store (add (loadi16 addr:$dst), imm:$src2), addr:$dst)]>,
+                  OpSize;
   def ADD32mi  : Ii32<0x81, MRM0m, (outs), (ins i32mem:$dst, i32imm:$src2),
                       "add{l}\t{$src2, $dst|$dst, $src2}",
-                  [(store (add (loadi32 addr:$dst), imm:$src2), addr:$dst),
-                   (implicit EFLAGS)]>;
+                  [(store (add (loadi32 addr:$dst), imm:$src2), addr:$dst)]>;
   def ADD16mi8 : Ii8<0x83, MRM0m, (outs), (ins i16mem:$dst, i16i8imm :$src2),
                      "add{w}\t{$src2, $dst|$dst, $src2}",
-                  [(store (add (load addr:$dst), i16immSExt8:$src2), addr:$dst),
-                   (implicit EFLAGS)]>,
-                 OpSize;
+                  [(store (add (load addr:$dst), i16immSExt8:$src2),
+                               addr:$dst)]>, OpSize;
   def ADD32mi8 : Ii8<0x83, MRM0m, (outs), (ins i32mem:$dst, i32i8imm :$src2),
                      "add{l}\t{$src2, $dst|$dst, $src2}",
-                  [(store (add (load addr:$dst), i32immSExt8:$src2), addr:$dst),
-                   (implicit EFLAGS)]>;
+                  [(store (add (load addr:$dst), i32immSExt8:$src2),
+                               addr:$dst)]>;
+
+  // Memory-Register Addition with Overflow
+  def ADDOvf8mr   : I<0x00, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src2),
+                      "add{b}\t{$src2, $dst|$dst, $src2}",
+                      [(store (X86add_ovf (load addr:$dst), GR8:$src2),
+                                          addr:$dst),
+                       (implicit EFLAGS)]>;
+  def ADDOvf16mr  : I<0x01, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2),
+                      "add{w}\t{$src2, $dst|$dst, $src2}",
+                      [(store (X86add_ovf (load addr:$dst), GR16:$src2),
+                                          addr:$dst),
+                       (implicit EFLAGS)]>, OpSize;
+  def ADDOvf32mr  : I<0x01, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2),
+                      "add{l}\t{$src2, $dst|$dst, $src2}",
+                      [(store (X86add_ovf (load addr:$dst), GR32:$src2),
+                                          addr:$dst),
+                       (implicit EFLAGS)]>;
+  def ADDOvf8mi   : Ii8<0x80, MRM0m, (outs), (ins i8mem :$dst, i8imm :$src2),
+                        "add{b}\t{$src2, $dst|$dst, $src2}",
+                        [(store (X86add_ovf (loadi8 addr:$dst), imm:$src2),
+                                            addr:$dst),
+                        (implicit EFLAGS)]>;
+  def ADDOvf16mi  : Ii16<0x81, MRM0m, (outs), (ins i16mem:$dst, i16imm:$src2),
+                         "add{w}\t{$src2, $dst|$dst, $src2}",
+                         [(store (X86add_ovf (loadi16 addr:$dst), imm:$src2),
+                                             addr:$dst),
+                          (implicit EFLAGS)]>, OpSize;
+  def ADDOvf32mi  : Ii32<0x81, MRM0m, (outs), (ins i32mem:$dst, i32imm:$src2),
+                         "add{l}\t{$src2, $dst|$dst, $src2}",
+                         [(store (X86add_ovf (loadi32 addr:$dst), imm:$src2),
+                                             addr:$dst),
+                          (implicit EFLAGS)]>;
+  def ADDOvf16mi8 : Ii8<0x83, MRM0m, (outs), (ins i16mem:$dst, i16i8imm :$src2),
+                        "add{w}\t{$src2, $dst|$dst, $src2}",
+                        [(store (X86add_ovf (load addr:$dst),i16immSExt8:$src2),
+                                            addr:$dst),
+                         (implicit EFLAGS)]>, OpSize;
+  def ADDOvf32mi8 : Ii8<0x83, MRM0m, (outs), (ins i32mem:$dst, i32i8imm :$src2),
+                        "add{l}\t{$src2, $dst|$dst, $src2}",
+                        [(store (X86add_ovf (load addr:$dst),i32immSExt8:$src2),
+                                            addr:$dst),
+                         (implicit EFLAGS)]>;
 }
 
 let Uses = [EFLAGS] in {
@@ -2052,84 +2158,193 @@
 }
 } // Uses = [EFLAGS]
 
-def SUB8rr   : I<0x28, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src1, GR8 :$src2),
-                 "sub{b}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR8:$dst, (sub GR8:$src1, GR8:$src2)),
-                  (implicit EFLAGS)]>;
-def SUB16rr  : I<0x29, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2),
-                 "sub{w}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR16:$dst, (sub GR16:$src1, GR16:$src2)),
-                  (implicit EFLAGS)]>, OpSize;
-def SUB32rr  : I<0x29, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
-                 "sub{l}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR32:$dst, (sub GR32:$src1, GR32:$src2)),
-                  (implicit EFLAGS)]>;
-def SUB8rm   : I<0x2A, MRMSrcMem, (outs GR8 :$dst), (ins GR8 :$src1, i8mem :$src2),
-                 "sub{b}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR8:$dst, (sub GR8:$src1, (load addr:$src2))),
-                  (implicit EFLAGS)]>;
-def SUB16rm  : I<0x2B, MRMSrcMem, (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2),
-                 "sub{w}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR16:$dst, (sub GR16:$src1, (load addr:$src2))),
-                  (implicit EFLAGS)]>, OpSize;
-def SUB32rm  : I<0x2B, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2),
-                 "sub{l}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR32:$dst, (sub GR32:$src1, (load addr:$src2))),
-                  (implicit EFLAGS)]>;
+// Register-Register Subtraction
+def SUB8rr  : I<0x28, MRMDestReg, (outs GR8:$dst), (ins GR8:$src1, GR8:$src2),
+                "sub{b}\t{$src2, $dst|$dst, $src2}",
+                [(set GR8:$dst, (sub GR8:$src1, GR8:$src2))]>;
+def SUB16rr : I<0x29, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1,GR16:$src2),
+                "sub{w}\t{$src2, $dst|$dst, $src2}",
+                [(set GR16:$dst, (sub GR16:$src1, GR16:$src2))]>, OpSize;
+def SUB32rr : I<0x29, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1,GR32:$src2),
+                "sub{l}\t{$src2, $dst|$dst, $src2}",
+                [(set GR32:$dst, (sub GR32:$src1, GR32:$src2))]>;
+
+// Register-Register Subtraction with Overflow
+def SUBOvf8rr  : I<0x28, MRMDestReg, (outs GR8:$dst),
+                                     (ins GR8:$src1, GR8:$src2),
+                   "sub{b}\t{$src2, $dst|$dst, $src2}",
+                   [(set GR8:$dst, (X86sub_ovf GR8:$src1, GR8:$src2)),
+                    (implicit EFLAGS)]>;
+def SUBOvf16rr : I<0x29, MRMDestReg, (outs GR16:$dst),
+                                     (ins GR16:$src1, GR16:$src2),
+                   "sub{w}\t{$src2, $dst|$dst, $src2}",
+                   [(set GR16:$dst, (X86sub_ovf GR16:$src1, GR16:$src2)),
+                    (implicit EFLAGS)]>, OpSize;
+def SUBOvf32rr : I<0x29, MRMDestReg, (outs GR32:$dst),
+                                     (ins GR32:$src1, GR32:$src2),
+                   "sub{l}\t{$src2, $dst|$dst, $src2}",
+                   [(set GR32:$dst, (X86sub_ovf GR32:$src1, GR32:$src2)),
+                    (implicit EFLAGS)]>;
 
-def SUB8ri   : Ii8 <0x80, MRM5r, (outs GR8:$dst), (ins GR8:$src1, i8imm:$src2),
+// Register-Memory Subtraction
+def SUB8rm  : I<0x2A, MRMSrcMem, (outs GR8 :$dst),
+                                 (ins GR8 :$src1, i8mem :$src2),
+                "sub{b}\t{$src2, $dst|$dst, $src2}",
+                [(set GR8:$dst, (sub GR8:$src1, (load addr:$src2)))]>;
+def SUB16rm : I<0x2B, MRMSrcMem, (outs GR16:$dst),
+                                 (ins GR16:$src1, i16mem:$src2),
+                "sub{w}\t{$src2, $dst|$dst, $src2}",
+                [(set GR16:$dst, (sub GR16:$src1, (load addr:$src2)))]>, OpSize;
+def SUB32rm : I<0x2B, MRMSrcMem, (outs GR32:$dst),
+                                 (ins GR32:$src1, i32mem:$src2),
+                "sub{l}\t{$src2, $dst|$dst, $src2}",
+                [(set GR32:$dst, (sub GR32:$src1, (load addr:$src2)))]>;
+
+// Register-Memory Subtraction with Overflow
+def SUBOvf8rm  : I<0x2A, MRMSrcMem, (outs GR8:$dst),
+                                    (ins GR8:$src1, i8mem:$src2),
                     "sub{b}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR8:$dst, (sub GR8:$src1, imm:$src2)),
+                    [(set GR8:$dst, (X86sub_ovf GR8:$src1, (load addr:$src2))),
+                     (implicit EFLAGS)]>;
+def SUBOvf16rm : I<0x2B, MRMSrcMem, (outs GR16:$dst),
+                                    (ins GR16:$src1, i16mem:$src2),
+                   "sub{w}\t{$src2, $dst|$dst, $src2}",
+                   [(set GR16:$dst, (X86sub_ovf GR16:$src1, (load addr:$src2))),
+                    (implicit EFLAGS)]>, OpSize;
+def SUBOvf32rm : I<0x2B, MRMSrcMem, (outs GR32:$dst),
+                                    (ins GR32:$src1, i32mem:$src2),
+                   "sub{l}\t{$src2, $dst|$dst, $src2}",
+                   [(set GR32:$dst, (X86sub_ovf GR32:$src1, (load addr:$src2))),
                     (implicit EFLAGS)]>;
-def SUB16ri  : Ii16<0x81, MRM5r, (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2),
+
+// Register-Integer Subtraction
+def SUB8ri   : Ii8 <0x80, MRM5r, (outs GR8:$dst),
+                                 (ins GR8:$src1, i8imm:$src2),
+                    "sub{b}\t{$src2, $dst|$dst, $src2}",
+                    [(set GR8:$dst, (sub GR8:$src1, imm:$src2))]>;
+def SUB16ri  : Ii16<0x81, MRM5r, (outs GR16:$dst),
+                                 (ins GR16:$src1, i16imm:$src2),
                     "sub{w}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR16:$dst, (sub GR16:$src1, imm:$src2)),
-                    (implicit EFLAGS)]>, OpSize;
-def SUB32ri  : Ii32<0x81, MRM5r, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2),
+                    [(set GR16:$dst, (sub GR16:$src1, imm:$src2))]>, OpSize;
+def SUB32ri  : Ii32<0x81, MRM5r, (outs GR32:$dst),
+                                 (ins GR32:$src1, i32imm:$src2),
                     "sub{l}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR32:$dst, (sub GR32:$src1, imm:$src2)),
-                    (implicit EFLAGS)]>;
-def SUB16ri8 : Ii8<0x83, MRM5r, (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2),
+                    [(set GR32:$dst, (sub GR32:$src1, imm:$src2))]>;
+def SUB16ri8 : Ii8<0x83, MRM5r, (outs GR16:$dst),
+                                (ins GR16:$src1, i16i8imm:$src2),
                    "sub{w}\t{$src2, $dst|$dst, $src2}",
-                   [(set GR16:$dst, (sub GR16:$src1, i16immSExt8:$src2)),
-                   (implicit EFLAGS)]>, OpSize;
-def SUB32ri8 : Ii8<0x83, MRM5r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2),
+                   [(set GR16:$dst, (sub GR16:$src1, i16immSExt8:$src2))]>,
+                   OpSize;
+def SUB32ri8 : Ii8<0x83, MRM5r, (outs GR32:$dst),
+                                (ins GR32:$src1, i32i8imm:$src2),
                    "sub{l}\t{$src2, $dst|$dst, $src2}",
-                   [(set GR32:$dst, (sub GR32:$src1, i32immSExt8:$src2)),
-                   (implicit EFLAGS)]>;
+                   [(set GR32:$dst, (sub GR32:$src1, i32immSExt8:$src2))]>;
+
+// Register-Integer Subtraction with Overflow
+def SUBOvf8ri   : Ii8 <0x80, MRM5r, (outs GR8:$dst),
+                                    (ins GR8:$src1, i8imm:$src2),
+                       "sub{b}\t{$src2, $dst|$dst, $src2}",
+                       [(set GR8:$dst, (X86sub_ovf GR8:$src1, imm:$src2)),
+                        (implicit EFLAGS)]>;
+def SUBOvf16ri  : Ii16<0x81, MRM5r, (outs GR16:$dst),
+                                    (ins GR16:$src1, i16imm:$src2),
+                       "sub{w}\t{$src2, $dst|$dst, $src2}",
+                       [(set GR16:$dst, (X86sub_ovf GR16:$src1, imm:$src2)),
+                        (implicit EFLAGS)]>, OpSize;
+def SUBOvf32ri  : Ii32<0x81, MRM5r, (outs GR32:$dst),
+                                    (ins GR32:$src1, i32imm:$src2),
+                       "sub{l}\t{$src2, $dst|$dst, $src2}",
+                       [(set GR32:$dst, (X86sub_ovf GR32:$src1, imm:$src2)),
+                        (implicit EFLAGS)]>;
+def SUBOvf16ri8 : Ii8<0x83, MRM5r, (outs GR16:$dst),
+                                   (ins GR16:$src1, i16i8imm:$src2),
+                      "sub{w}\t{$src2, $dst|$dst, $src2}",
+                      [(set GR16:$dst, (X86sub_ovf GR16:$src1,
+                                                   i16immSExt8:$src2)),
+                       (implicit EFLAGS)]>, OpSize;
+def SUBOvf32ri8 : Ii8<0x83, MRM5r, (outs GR32:$dst),
+                                   (ins GR32:$src1, i32i8imm:$src2),
+                      "sub{l}\t{$src2, $dst|$dst, $src2}",
+                      [(set GR32:$dst, (X86sub_ovf GR32:$src1,
+                                                   i32immSExt8:$src2)),
+                       (implicit EFLAGS)]>;
+
 let isTwoAddress = 0 in {
+  // Memory-Register Subtraction
   def SUB8mr   : I<0x28, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src2),
                    "sub{b}\t{$src2, $dst|$dst, $src2}",
-                   [(store (sub (load addr:$dst), GR8:$src2), addr:$dst),
-                   (implicit EFLAGS)]>;
+                   [(store (sub (load addr:$dst), GR8:$src2), addr:$dst)]>;
   def SUB16mr  : I<0x29, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2),
                    "sub{w}\t{$src2, $dst|$dst, $src2}",
-                   [(store (sub (load addr:$dst), GR16:$src2), addr:$dst),
-                   (implicit EFLAGS)]>, OpSize;
+                   [(store (sub (load addr:$dst), GR16:$src2), addr:$dst)]>,
+                   OpSize;
   def SUB32mr  : I<0x29, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), 
                    "sub{l}\t{$src2, $dst|$dst, $src2}",
-                   [(store (sub (load addr:$dst), GR32:$src2), addr:$dst),
-                   (implicit EFLAGS)]>;
+                   [(store (sub (load addr:$dst), GR32:$src2), addr:$dst)]>;
+
+  // Memory-Register Subtraction with Overflow
+  def SUBOvf8mr  : I<0x28, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src2),
+                     "sub{b}\t{$src2, $dst|$dst, $src2}",
+                     [(store (X86sub_ovf (load addr:$dst), GR8:$src2),
+                                         addr:$dst),
+                      (implicit EFLAGS)]>;
+  def SUBOvf16mr : I<0x29, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2),
+                     "sub{w}\t{$src2, $dst|$dst, $src2}",
+                     [(store (X86sub_ovf (load addr:$dst), GR16:$src2),
+                                         addr:$dst),
+                      (implicit EFLAGS)]>, OpSize;
+  def SUBOvf32mr : I<0x29, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), 
+                     "sub{l}\t{$src2, $dst|$dst, $src2}",
+                     [(store (X86sub_ovf (load addr:$dst), GR32:$src2),
+                                         addr:$dst),
+                      (implicit EFLAGS)]>;
+
+  // Memory-Integer Subtraction
   def SUB8mi   : Ii8<0x80, MRM5m, (outs), (ins i8mem :$dst, i8imm:$src2), 
                      "sub{b}\t{$src2, $dst|$dst, $src2}",
-                   [(store (sub (loadi8 addr:$dst), imm:$src2), addr:$dst),
-                   (implicit EFLAGS)]>;
+                     [(store (sub (loadi8 addr:$dst), imm:$src2), addr:$dst)]>;
   def SUB16mi  : Ii16<0x81, MRM5m, (outs), (ins i16mem:$dst, i16imm:$src2), 
                       "sub{w}\t{$src2, $dst|$dst, $src2}",
-                  [(store (sub (loadi16 addr:$dst), imm:$src2), addr:$dst),
-                  (implicit EFLAGS)]>, OpSize;
+                      [(store (sub (loadi16 addr:$dst), imm:$src2),addr:$dst)]>,
+                      OpSize;
   def SUB32mi  : Ii32<0x81, MRM5m, (outs), (ins i32mem:$dst, i32imm:$src2), 
                       "sub{l}\t{$src2, $dst|$dst, $src2}",
-                  [(store (sub (loadi32 addr:$dst), imm:$src2), addr:$dst),
-                  (implicit EFLAGS)]>;
+                      [(store (sub (loadi32 addr:$dst), imm:$src2),addr:$dst)]>;
   def SUB16mi8 : Ii8<0x83, MRM5m, (outs), (ins i16mem:$dst, i16i8imm :$src2), 
                      "sub{w}\t{$src2, $dst|$dst, $src2}",
-                [(store (sub (load addr:$dst), i16immSExt8:$src2), addr:$dst),
-                  (implicit EFLAGS)]>, OpSize;
-  def SUB32mi8 : Ii8<0x83, MRM5m, (outs), (ins i32mem:$dst, i32i8imm :$src2), 
+                     [(store (sub (load addr:$dst), i16immSExt8:$src2),
+                             addr:$dst)]>, OpSize;
+  def SUB32mi8 : Ii8<0x83, MRM5m, (outs), (ins i32mem:$dst, i32i8imm :$src2),
                      "sub{l}\t{$src2, $dst|$dst, $src2}",
-                [(store (sub (load addr:$dst), i32immSExt8:$src2), addr:$dst),
-                (implicit EFLAGS)]>;
+                     [(store (sub (load addr:$dst), i32immSExt8:$src2),
+                             addr:$dst)]>;
+
+  // Memory-Integer Subtraction with Overflow
+  def SUBOvf8mi   : Ii8<0x80, MRM5m, (outs), (ins i8mem :$dst, i8imm:$src2), 
+                        "sub{b}\t{$src2, $dst|$dst, $src2}",
+                        [(store (X86sub_ovf (loadi8 addr:$dst), imm:$src2),
+                                addr:$dst),
+                         (implicit EFLAGS)]>;
+  def SUBOvf16mi  : Ii16<0x81, MRM5m, (outs), (ins i16mem:$dst, i16imm:$src2), 
+                         "sub{w}\t{$src2, $dst|$dst, $src2}",
+                         [(store (X86sub_ovf (loadi16 addr:$dst), imm:$src2),
+                                 addr:$dst),
+                          (implicit EFLAGS)]>, OpSize;
+  def SUBOvf32mi  : Ii32<0x81, MRM5m, (outs), (ins i32mem:$dst, i32imm:$src2), 
+                         "sub{l}\t{$src2, $dst|$dst, $src2}",
+                         [(store (X86sub_ovf (loadi32 addr:$dst), imm:$src2),
+                                             addr:$dst),
+                          (implicit EFLAGS)]>;
+  def SUBOvf16mi8 : Ii8<0x83, MRM5m, (outs), (ins i16mem:$dst, i16i8imm :$src2), 
+                        "sub{w}\t{$src2, $dst|$dst, $src2}",
+                        [(store (X86sub_ovf (load addr:$dst),i16immSExt8:$src2),
+                                            addr:$dst),
+                         (implicit EFLAGS)]>, OpSize;
+  def SUBOvf32mi8 : Ii8<0x83, MRM5m, (outs), (ins i32mem:$dst, i32i8imm :$src2), 
+                        "sub{l}\t{$src2, $dst|$dst, $src2}",
+                        [(store (X86sub_ovf (load addr:$dst),i32immSExt8:$src2),
+                                            addr:$dst),
+                         (implicit EFLAGS)]>;
 }
 
 let Uses = [EFLAGS] in {
@@ -2165,70 +2380,143 @@
 
 let Defs = [EFLAGS] in {
 let isCommutable = 1 in {  // X = IMUL Y, Z --> X = IMUL Z, Y
-def IMUL16rr : I<0xAF, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2),
+// Register-Register Integer Multiply
+def IMUL16rr : I<0xAF, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src1,GR16:$src2),
                  "imul{w}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR16:$dst, (mul GR16:$src1, GR16:$src2)),
-                 (implicit EFLAGS)]>, TB, OpSize;
-def IMUL32rr : I<0xAF, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
+                 [(set GR16:$dst, (mul GR16:$src1, GR16:$src2))]>, TB, OpSize;
+def IMUL32rr : I<0xAF, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1,GR32:$src2),
                  "imul{l}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR32:$dst, (mul GR32:$src1, GR32:$src2)),
-                 (implicit EFLAGS)]>, TB;
+                 [(set GR32:$dst, (mul GR32:$src1, GR32:$src2))]>, TB;
+
+// Register-Register Integer Multiply
+def IMULOvf16rr : I<0xAF, MRMSrcReg, (outs GR16:$dst),
+                                     (ins GR16:$src1, GR16:$src2),
+                    "imul{w}\t{$src2, $dst|$dst, $src2}",
+                    [(set GR16:$dst, (X86mul_ovf GR16:$src1, GR16:$src2)),
+                     (implicit EFLAGS)]>, TB, OpSize;
+def IMULOvf32rr : I<0xAF, MRMSrcReg, (outs GR32:$dst),
+                                     (ins GR32:$src1, GR32:$src2),
+                    "imul{l}\t{$src2, $dst|$dst, $src2}",
+                    [(set GR32:$dst, (X86mul_ovf GR32:$src1, GR32:$src2)),
+                     (implicit EFLAGS)]>, TB;
 }
-def IMUL16rm : I<0xAF, MRMSrcMem, (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2),
+
+// Register-Memory Integer Multiply
+def IMUL16rm : I<0xAF, MRMSrcMem, (outs GR16:$dst),
+                                  (ins GR16:$src1, i16mem:$src2),
                  "imul{w}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR16:$dst, (mul GR16:$src1, (load addr:$src2))),
-                 (implicit EFLAGS)]>,
+                 [(set GR16:$dst, (mul GR16:$src1, (load addr:$src2)))]>,
                  TB, OpSize;
 def IMUL32rm : I<0xAF, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2),
                  "imul{l}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR32:$dst, (mul GR32:$src1, (load addr:$src2))),
-                 (implicit EFLAGS)]>, TB;
+                 [(set GR32:$dst, (mul GR32:$src1, (load addr:$src2)))]>, TB;
+
+// Register-Memory Integer Multiply with Overflow
+def IMULOvf16rm : I<0xAF, MRMSrcMem, (outs GR16:$dst),
+                                     (ins GR16:$src1, i16mem:$src2),
+                    "imul{w}\t{$src2, $dst|$dst, $src2}",
+                    [(set GR16:$dst, (X86mul_ovf GR16:$src1,(load addr:$src2))),
+                     (implicit EFLAGS)]>,
+                    TB, OpSize;
+def IMULOvf32rm : I<0xAF, MRMSrcMem, (outs GR32:$dst),
+                                     (ins GR32:$src1, i32mem:$src2),
+                    "imul{l}\t{$src2, $dst|$dst, $src2}",
+                    [(set GR32:$dst, (X86mul_ovf GR32:$src1,(load addr:$src2))),
+                     (implicit EFLAGS)]>, TB;
 } // Defs = [EFLAGS]
 } // end Two Address instructions
 
 // Suprisingly enough, these are not two address instructions!
 let Defs = [EFLAGS] in {
+// Register-Integer Integer Multiply
 def IMUL16rri  : Ii16<0x69, MRMSrcReg,                      // GR16 = GR16*I16
                       (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2),
                       "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                      [(set GR16:$dst, (mul GR16:$src1, imm:$src2)),
-                      (implicit EFLAGS)]>, OpSize;
+                      [(set GR16:$dst, (mul GR16:$src1, imm:$src2))]>, OpSize;
 def IMUL32rri  : Ii32<0x69, MRMSrcReg,                      // GR32 = GR32*I32
                       (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2),
                       "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                      [(set GR32:$dst, (mul GR32:$src1, imm:$src2)),
-                      (implicit EFLAGS)]>;
+                      [(set GR32:$dst, (mul GR32:$src1, imm:$src2))]>;
 def IMUL16rri8 : Ii8<0x6B, MRMSrcReg,                       // GR16 = GR16*I8
                      (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2),
                      "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                     [(set GR16:$dst, (mul GR16:$src1, i16immSExt8:$src2)),
-                     (implicit EFLAGS)]>, OpSize;
+                     [(set GR16:$dst, (mul GR16:$src1, i16immSExt8:$src2))]>,
+                     OpSize;
 def IMUL32rri8 : Ii8<0x6B, MRMSrcReg,                       // GR32 = GR32*I8
                      (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2),
                      "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                     [(set GR32:$dst, (mul GR32:$src1, i32immSExt8:$src2)),
-                     (implicit EFLAGS)]>;
+                     [(set GR32:$dst, (mul GR32:$src1, i32immSExt8:$src2))]>;
 
+// Register-Integer Integer Multiply with Overflow
+def IMULOvf16rri  : Ii16<0x69, MRMSrcReg,                   // GR16 = GR16*I16
+                        (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2),
+                        "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                        [(set GR16:$dst, (X86mul_ovf GR16:$src1, imm:$src2)),
+                         (implicit EFLAGS)]>, OpSize;
+def IMULOvf32rri  : Ii32<0x69, MRMSrcReg,                   // GR32 = GR32*I32
+                        (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2),
+                        "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                        [(set GR32:$dst, (X86mul_ovf GR32:$src1, imm:$src2)),
+                         (implicit EFLAGS)]>;
+def IMULOvf16rri8 : Ii8<0x6B, MRMSrcReg,                    // GR16 = GR16*I8
+                       (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2),
+                       "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                       [(set GR16:$dst, (X86mul_ovf GR16:$src1,
+                                         i16immSExt8:$src2)),
+                        (implicit EFLAGS)]>, OpSize;
+def IMULOvf32rri8 : Ii8<0x6B, MRMSrcReg,                    // GR32 = GR32*I8
+                       (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2),
+                       "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                       [(set GR32:$dst, (X86mul_ovf GR32:$src1,
+                                         i32immSExt8:$src2)),
+                        (implicit EFLAGS)]>;
+
+// Memory-Integer Integer Multiply
 def IMUL16rmi  : Ii16<0x69, MRMSrcMem,                      // GR16 = [mem16]*I16
                       (outs GR16:$dst), (ins i16mem:$src1, i16imm:$src2),
                       "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                      [(set GR16:$dst, (mul (load addr:$src1), imm:$src2)),
-                      (implicit EFLAGS)]>, OpSize;
+                      [(set GR16:$dst, (mul (load addr:$src1), imm:$src2))]>,
+                      OpSize;
 def IMUL32rmi  : Ii32<0x69, MRMSrcMem,                      // GR32 = [mem32]*I32
                       (outs GR32:$dst), (ins i32mem:$src1, i32imm:$src2),
                       "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                      [(set GR32:$dst, (mul (load addr:$src1), imm:$src2)),
-                      (implicit EFLAGS)]>;
+                      [(set GR32:$dst, (mul (load addr:$src1), imm:$src2))]>;
 def IMUL16rmi8 : Ii8<0x6B, MRMSrcMem,                       // GR16 = [mem16]*I8
                      (outs GR16:$dst), (ins i16mem:$src1, i16i8imm :$src2),
                      "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                  [(set GR16:$dst, (mul (load addr:$src1), i16immSExt8:$src2)),
-                  (implicit EFLAGS)]>, OpSize;
+                     [(set GR16:$dst, (mul (load addr:$src1),
+                                       i16immSExt8:$src2))]>, OpSize;
 def IMUL32rmi8 : Ii8<0x6B, MRMSrcMem,                       // GR32 = [mem32]*I8
                      (outs GR32:$dst), (ins i32mem:$src1, i32i8imm: $src2),
                      "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                  [(set GR32:$dst, (mul (load addr:$src1), i32immSExt8:$src2)),
-                  (implicit EFLAGS)]>;
+                     [(set GR32:$dst, (mul (load addr:$src1),
+                                           i32immSExt8:$src2))]>;
+
+// Memory-Integer Integer Multiply with Overflow
+def IMULOvf16rmi  : Ii16<0x69, MRMSrcMem,                   // GR16 = [mem16]*I16
+                        (outs GR16:$dst), (ins i16mem:$src1, i16imm:$src2),
+                        "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                        [(set GR16:$dst, (X86mul_ovf (load addr:$src1),
+                                                     imm:$src2)),
+                         (implicit EFLAGS)]>, OpSize;
+def IMULOvf32rmi  : Ii32<0x69, MRMSrcMem,                   // GR32 = [mem32]*I32
+                        (outs GR32:$dst), (ins i32mem:$src1, i32imm:$src2),
+                        "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                        [(set GR32:$dst, (X86mul_ovf (load addr:$src1),
+                                                     imm:$src2)),
+                         (implicit EFLAGS)]>;
+def IMULOvf16rmi8 : Ii8<0x6B, MRMSrcMem,                    // GR16 = [mem16]*I8
+                        (outs GR16:$dst), (ins i16mem:$src1, i16i8imm :$src2),
+                        "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                        [(set GR16:$dst, (X86mul_ovf (load addr:$src1),
+                                                     i16immSExt8:$src2)),
+                         (implicit EFLAGS)]>, OpSize;
+def IMULOvf32rmi8 : Ii8<0x6B, MRMSrcMem,                    // GR32 = [mem32]*I8
+                        (outs GR32:$dst), (ins i32mem:$src1, i32i8imm: $src2),
+                        "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                        [(set GR32:$dst, (X86mul_ovf (load addr:$src1),
+                                                     i32immSExt8:$src2)),
+                         (implicit EFLAGS)]>;
 } // Defs = [EFLAGS]
 
 //===----------------------------------------------------------------------===//




From wangmp at apple.com  Thu Dec 11 19:25:52 2008
From: wangmp at apple.com (Mon P Wang)
Date: Fri, 12 Dec 2008 01:25:52 -0000
Subject: [llvm-commits] [llvm] r60916 - in /llvm/trunk/lib:
 CodeGen/SelectionDAG/LegalizeDAG.cpp Target/X86/X86ISelLowering.cpp
 Target/X86/X86InstrMMX.td
Message-ID: <200812120125.mBC1Prsl014619@zion.cs.uiuc.edu>

Author: wangmp
Date: Thu Dec 11 19:25:51 2008
New Revision: 60916

URL: http://llvm.org/viewvc/llvm-project?rev=60916&view=rev
Log:
Added support for SELECT v8i8 v4i16 for X86 (MMX)
Added support for TRUNC v8i16 to v8i8 for X86 (MMX)

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86InstrMMX.td

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=60916&r1=60915&r2=60916&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Dec 11 19:25:51 2008
@@ -3937,6 +3937,10 @@
           if (Tmp1.getNode()) Result = Tmp1;
         }
         break;
+      case TargetLowering::Expand:
+        assert(Result.getValueType().isVector() && "must be vector type");
+        // Unroll the truncate.  We should do better.
+        Result = LegalizeOp(UnrollVectorOp(Result));
       }
       break;
     case Expand:

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=60916&r1=60915&r2=60916&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Dec 11 19:25:51 2008
@@ -650,6 +650,13 @@
     setOperationAction(ISD::SCALAR_TO_VECTOR,   MVT::v1i64, Custom);
 
     setOperationAction(ISD::INSERT_VECTOR_ELT,  MVT::v4i16, Custom);
+
+    setTruncStoreAction(MVT::v8i16, MVT::v8i8, Expand);
+    setOperationAction(ISD::TRUNCATE,           MVT::v8i8, Expand);
+    setOperationAction(ISD::SELECT,             MVT::v8i8, Promote);
+    setOperationAction(ISD::SELECT,             MVT::v4i16, Promote);
+    setOperationAction(ISD::SELECT,             MVT::v2i32, Promote);
+    setOperationAction(ISD::SELECT,             MVT::v1i64, Custom);
   }
 
   if (Subtarget->hasSSE1()) {
@@ -6960,6 +6967,7 @@
   const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
   switch (MI->getOpcode()) {
   default: assert(false && "Unexpected instr type to insert");
+  case X86::CMOV_V1I64:
   case X86::CMOV_FR32:
   case X86::CMOV_FR64:
   case X86::CMOV_V4F32:

Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=60916&r1=60915&r2=60916&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Thu Dec 11 19:25:51 2008
@@ -681,3 +681,14 @@
                                                   (iPTR 0))))),
           (v8i8 (MMX_MOVDQ2Qrr VR128:$src))>;
 
+// CMOV* - Used to implement the SELECT DAG operation.  Expanded by the
+// scheduler into a branch sequence.
+// These are expanded by the scheduler.
+let Uses = [EFLAGS], usesCustomDAGSchedInserter = 1 in {
+  def CMOV_V1I64 : I<0, Pseudo,
+                    (outs VR64:$dst), (ins VR64:$t, VR64:$f, i8imm:$cond),
+                    "#CMOV_V1I64 PSEUDO!",
+                    [(set VR64:$dst,
+                      (v1i64 (X86cmov VR64:$t, VR64:$f, imm:$cond,
+                                          EFLAGS)))]>;
+}




From foldr at codedgers.com  Thu Dec 11 20:34:57 2008
From: foldr at codedgers.com (Mikhail Glushenkov)
Date: Fri, 12 Dec 2008 02:34:57 -0000
Subject: [llvm-commits] [llvm] r60918 -
	/llvm/trunk/docs/CommandGuide/llvmc.pod
Message-ID: <200812120234.mBC2YwC5016784@zion.cs.uiuc.edu>

Author: foldr
Date: Thu Dec 11 20:34:56 2008
New Revision: 60918

URL: http://llvm.org/viewvc/llvm-project?rev=60918&view=rev
Log:
Man page update.

Modified:
    llvm/trunk/docs/CommandGuide/llvmc.pod

Modified: llvm/trunk/docs/CommandGuide/llvmc.pod
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvmc.pod?rev=60918&r1=60917&r2=60918&view=diff

==============================================================================
--- llvm/trunk/docs/CommandGuide/llvmc.pod (original)
+++ llvm/trunk/docs/CommandGuide/llvmc.pod Thu Dec 11 20:34:56 2008
@@ -85,6 +85,10 @@
 
 Use Clang instead of llvm-gcc.
 
+=item B<-opt>
+
+Enable optimization with B.
+
 =item B<-I> I
 
 Add a directory to the header file search path.  This option can be
@@ -114,6 +118,10 @@
 
 Pass options to linker.
 
+=item B<-Wo>
+
+Pass options to opt.
+
 =back
 
 =head1 EXIT STATUS




From echeng at apple.com  Thu Dec 11 21:10:27 2008
From: echeng at apple.com (Evan Cheng)
Date: Thu, 11 Dec 2008 19:10:27 -0800
Subject: [llvm-commits] [llvm-gcc-4.2] r60908 - in
	/llvm-gcc-4.2/trunk/gcc: llvm-backend.cpp llvm-convert.cpp
	llvm-debug.cpp llvm-debug.h llvm-linker-hack.cpp
In-Reply-To: <200812112322.mBBNMH3V010894@zion.cs.uiuc.edu>
References: <200812112322.mBBNMH3V010894@zion.cs.uiuc.edu>
Message-ID: <72C2AB95-251A-41B1-907A-ADFDFFFEBBE6@apple.com>

Awesome! Is it all done now?

On Dec 11, 2008, at 3:22 PM, Devang Patel wrote:

>  // Check to see if the compile unit already has created this type.
> -  TypeDesc *Slot = TypeCache[type];
> -  if (Slot && !(Slot->isForwardDecl() && TYPE_SIZE(type) != 0))
> -    // FIXME: If previously created type is just a forward  
> declaration, emit
> -    // a new descriptor for the type definition. The correct fix is  
> to *fix*
> -    // up the llvm ir (since MMI may have already been converted to  
> llvm). But
> -    // that's correctly not doable. We'll fix this when we convert  
> to the new
> -    // API in DebugInfo.h
> +  DIType &Slot = TypeCache[type];
> +  if (!Slot.isNull())
>     return Slot;

How do you solve this? It's a type that was previously a forward  
declaration but it's now defined:

struct ST;

void foo(struct ST *x) {
}

struct ST {
   int a;
};

typedef struct ST STtype;
STtype X;

void bar() {
   X.a = 1;
}

Evan


From echeng at apple.com  Thu Dec 11 21:10:56 2008
From: echeng at apple.com (Evan Cheng)
Date: Thu, 11 Dec 2008 19:10:56 -0800
Subject: [llvm-commits] [llvm-gcc-4.2] r60913 -
	/llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1
In-Reply-To: <200812120020.mBC0Kn57012668@zion.cs.uiuc.edu>
References: <200812120020.mBC0Kn57012668@zion.cs.uiuc.edu>
Message-ID: <8EB32E2D-F62F-40D0-B112-985F9D6218C5@apple.com>

Very cool! :-)

Evan

On Dec 11, 2008, at 4:20 PM, Devang Patel wrote:

> Author: dpatel
> Date: Thu Dec 11 18:20:49 2008
> New Revision: 60913
>
> URL: http://llvm.org/viewvc/llvm-project?rev=60913&view=rev
> Log:
> Add our own man page!
>
> Added:
>    llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1
>
> Added: llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1
> URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1?rev=60913&view=auto
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1 (added)
> +++ llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1 Thu Dec 11 18:20:49 2008
> @@ -0,0 +1,28 @@
> +.Dd December 11, 2008
> +.Dt llvm-gcc 1
> +.Os Darwin
> +.Sh NAME
> +.Nm llvm-gcc
> +.Sh SYNOPSIS
> +llvm-gcc  [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard 
> \fR]
> +          [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR]
> +          [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR]
> +          [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...]
> +          [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro 
> \fR]
> +          [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option 
> \fR...]
> +          [\fB\-o\fR \fIoutfile\fR] \fIinfile\fR...
> +.Sh DESCRIPTION
> +llvm-gcc is a C, C++, Objective-C and Objective-C++ compiler. llvm- 
> gcc uses gcc front-end and gcc's command line interface. Consult  
> cc(1) man page for command line options supported by llvm-gcc. Only  
> selected LLVM specific options are listed here.
> +.Pp
> +.Bl -tag -width -indent
> +.It Fl flto
> +Enables Link Time Optimization. Link Time Optimization is performed  
> by ld(1) transparently using LLVM optimizer. The object file  
> generated contains intermediate LLVM bitcode instead of Mach-O  
> objects.
> +.It Fl O4
> +Enables Link Time Optimization in addition to all optimizations  
> enabled at -O3.
> +.El
> +.Pp
> +.Sh SEE ALSO
> +.Xr cc 1,
> +.Xr ld 1
> +.\" .Sh BUGS              \" Document known, unremedied bugs
> +.\" .Sh HISTORY           \" Document history if command behaves in  
> a unique manner
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From eli.friedman at gmail.com  Thu Dec 11 21:30:56 2008
From: eli.friedman at gmail.com (Eli Friedman)
Date: Thu, 11 Dec 2008 19:30:56 -0800
Subject: [llvm-commits] [llvm] r60915 - in /llvm/trunk/lib:
	CodeGen/SelectionDAG/DAGCombiner.cpp
	Target/X86/X86ISelLowering.cpp Target/X86/X86ISelLowering.h
	Target/X86/X86Instr64bit.td Target/X86/X86InstrInfo.td
In-Reply-To: <200812120056.mBC0ucER013691@zion.cs.uiuc.edu>
References: <200812120056.mBC0ucER013691@zion.cs.uiuc.edu>
Message-ID: 

On Thu, Dec 11, 2008 at 4:56 PM, Bill Wendling  wrote:
> Author: void
> Date: Thu Dec 11 18:56:36 2008
> New Revision: 60915
>
> URL: http://llvm.org/viewvc/llvm-project?rev=60915&view=rev
> Log:
> Redo the arithmetic with overflow architecture. I was changing the semantics of
> ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace
> the intrinsic with an ISD::SADDO node. Then custom lower that into an
> X86ISD::ADD node with a associated SETCC that checks the correct condition code
> (overflow or carry). Then that gets lowered into the correct X86::ADDOvf
> instruction.
>
> Similar for SUB and MUL instructions.

Looks generally good...

In case you didn't notice it, though, PR3197 is a rather serious flaw
in the current implementation of overflow checking for unsigned
multiplication.

-Eli


From sabre at nondot.org  Thu Dec 11 22:20:09 2008
From: sabre at nondot.org (Chris Lattner)
Date: Fri, 12 Dec 2008 04:20:09 -0000
Subject: [llvm-commits] [llvm] r60919 -
	/llvm/trunk/docs/tutorial/OCamlLangImpl3.html
Message-ID: <200812120420.mBC4KA3e019848@zion.cs.uiuc.edu>

Author: lattner
Date: Thu Dec 11 22:20:01 2008
New Revision: 60919

URL: http://llvm.org/viewvc/llvm-project?rev=60919&view=rev
Log:
fix some incorrect links.

Modified:
    llvm/trunk/docs/tutorial/OCamlLangImpl3.html

Modified: llvm/trunk/docs/tutorial/OCamlLangImpl3.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/OCamlLangImpl3.html?rev=60919&r1=60918&r2=60919&view=diff

==============================================================================
--- llvm/trunk/docs/tutorial/OCamlLangImpl3.html (original)
+++ llvm/trunk/docs/tutorial/OCamlLangImpl3.html Thu Dec 11 22:20:01 2008
@@ -26,7 +26,7 @@
     Full Code Listing
   

 

-Chapter 4: Adding JIT and Optimizer
+
Chapter 4: Adding JIT and Optimizer
 Support
 
 
@@ -491,7 +491,7 @@
 
 
 Note how the parser turns the top-level expression into anonymous functions
-for us.  This will be handy when we add JIT
+for us.  This will be handy when we add JIT
 support in the next chapter.  Also note that the code is very literally
 transcribed, no optimizations are being performed.  We will
 add optimizations explicitly
@@ -599,7 +599,7 @@
 each other.
 
 This wraps up the third chapter of the Kaleidoscope tutorial.  Up next, we'll
-describe how to add JIT codegen and optimizer
+describe how to add JIT codegen and optimizer
 support to this so we can actually start running code!
 
 




From isanbard at gmail.com  Thu Dec 11 23:02:44 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 11 Dec 2008 21:02:44 -0800
Subject: [llvm-commits] [llvm] r60915 - in /llvm/trunk/lib:
	CodeGen/SelectionDAG/DAGCombiner.cpp
	Target/X86/X86ISelLowering.cpp Target/X86/X86ISelLowering.h
	Target/X86/X86Instr64bit.td Target/X86/X86InstrInfo.td
In-Reply-To: 
References: <200812120056.mBC0ucER013691@zion.cs.uiuc.edu>
	
Message-ID: <511EC2DB-CB0A-4458-8E03-A690DBE33162@gmail.com>

Ah! I didn't see. I'll take a look.

-bw

On Dec 11, 2008, at 7:30 PM, "Eli Friedman"   
wrote:

> On Thu, Dec 11, 2008 at 4:56 PM, Bill Wendling   
> wrote:
>> Author: void
>> Date: Thu Dec 11 18:56:36 2008
>> New Revision: 60915
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=60915&view=rev
>> Log:
>> Redo the arithmetic with overflow architecture. I was changing the  
>> semantics of
>> ISD::ADD to emit an implicit EFLAGS. This was horribly broken.  
>> Instead, replace
>> the intrinsic with an ISD::SADDO node. Then custom lower that into an
>> X86ISD::ADD node with a associated SETCC that checks the correct  
>> condition code
>> (overflow or carry). Then that gets lowered into the correct  
>> X86::ADDOvf
>> instruction.
>>
>> Similar for SUB and MUL instructions.
>
> Looks generally good...
>
> In case you didn't notice it, though, PR3197 is a rather serious flaw
> in the current implementation of overflow checking for unsigned
> multiplication.
>
> -Eli
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits


From evan.cheng at apple.com  Fri Dec 12 01:05:24 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 11 Dec 2008 23:05:24 -0800
Subject: [llvm-commits] [llvm] r60915 - in /llvm/trunk/lib:
 CodeGen/SelectionDAG/DAGCombiner.cpp Target/X86/X86ISelLowering.cpp
 Target/X86/X86ISelLowering.h Target/X86/X86Instr64bit.td
 Target/X86/X86InstrInfo.td
In-Reply-To: <200812120056.mBC0ucER013691@zion.cs.uiuc.edu>
References: <200812120056.mBC0ucER013691@zion.cs.uiuc.edu>
Message-ID: <4FEBE9BA-1146-4754-9A4F-E3BBAF635CFF@apple.com>

Do we really need different instructions? How us ADD32rr different  
from ADDvfo32er? Both implicitly define EFLAGS.

Evan

On Dec 11, 2008, at 4:56 PM, Bill Wendling  wrote:

> Author: void
> Date: Thu Dec 11 18:56:36 2008
> New Revision: 60915
>
> URL: http://llvm.org/viewvc/llvm-project?rev=60915&view=rev
> Log:
> Redo the arithmetic with overflow architecture. I was changing the  
> semantics of
> ISD::ADD to emit an implicit EFLAGS. This was horribly broken.  
> Instead, replace
> the intrinsic with an ISD::SADDO node. Then custom lower that into an
> X86ISD::ADD node with a associated SETCC that checks the correct  
> condition code
> (overflow or carry). Then that gets lowered into the correct  
> X86::ADDOvf
> instruction.
>
> Similar for SUB and MUL instructions.
>
> Modified:
>    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
>    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>    llvm/trunk/lib/Target/X86/X86ISelLowering.h
>    llvm/trunk/lib/Target/X86/X86Instr64bit.td
>    llvm/trunk/lib/Target/X86/X86InstrInfo.td
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=60915&r1=60914&r2=60915&view=diff
>
> === 
> === 
> === 
> =====================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Dec 11  
> 18:56:36 2008
> @@ -967,11 +967,6 @@
>     if (FoldedVOp.getNode()) return FoldedVOp;
>   }
>
> -  if (N->getNumValues() != 1)
> -    // FIXME: DAG combiner cannot handle arithmetic operators which  
> produce
> -    // multiple results.
> -    return SDValue();
> -
>   // fold (add x, undef) -> undef
>   if (N0.getOpcode() == ISD::UNDEF)
>     return N0;
> @@ -1167,11 +1162,6 @@
>     if (FoldedVOp.getNode()) return FoldedVOp;
>   }
>
> -  if (N->getNumValues() != 1)
> -    // FIXME: DAG combiner cannot handle arithmetic operators which  
> produce
> -    // multiple results.
> -    return SDValue();
> -
>   // fold (sub x, x) -> 0
>   if (N0 == N1)
>     return DAG.getConstant(0, N->getValueType(0));
> @@ -1230,11 +1220,6 @@
>     if (FoldedVOp.getNode()) return FoldedVOp;
>   }
>
> -  if (N->getNumValues() != 1)
> -    // FIXME: DAG combiner cannot handle arithmetic operators which  
> produce
> -    // multiple results.
> -    return SDValue();
> -
>   // fold (mul x, undef) -> 0
>   if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF)
>     return DAG.getConstant(0, VT);
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=60915&r1=60914&r2=60915&view=diff
>
> === 
> === 
> === 
> =====================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Dec 11  
> 18:56:36 2008
> @@ -5210,9 +5210,9 @@
>
>   if (Cond.getOpcode() == ISD::SETCC)
>     Cond = LowerSETCC(Cond, DAG);
> -  else if (Cond.getOpcode() == ISD::SADDO || Cond.getOpcode() ==  
> ISD::UADDO ||
> -           Cond.getOpcode() == ISD::SSUBO || Cond.getOpcode() ==  
> ISD::USUBO ||
> -           Cond.getOpcode() == ISD::SMULO || Cond.getOpcode() ==  
> ISD::UMULO)
> +  else if (Cond.getOpcode() == X86ISD::ADD ||
> +           Cond.getOpcode() == X86ISD::SUB ||
> +           Cond.getOpcode() == X86ISD::MUL)
>     Cond = LowerXALUO(Cond, DAG);
>
>   // If condition flag is set by a X86ISD::CMP, then use it as the  
> condition
> @@ -6142,27 +6142,27 @@
>   switch (Op.getOpcode()) {
>   default: assert(0 && "Unknown ovf instruction!");
>   case ISD::SADDO:
> -    BaseOp = ISD::ADD;
> +    BaseOp = X86ISD::ADD;
>     Cond = X86::COND_O;
>     break;
>   case ISD::UADDO:
> -    BaseOp = ISD::ADD;
> +    BaseOp = X86ISD::ADD;
>     Cond = X86::COND_C;
>     break;
>   case ISD::SSUBO:
> -    BaseOp = ISD::SUB;
> +    BaseOp = X86ISD::SUB;
>     Cond = X86::COND_O;
>     break;
>   case ISD::USUBO:
> -    BaseOp = ISD::SUB;
> +    BaseOp = X86ISD::SUB;
>     Cond = X86::COND_C;
>     break;
>   case ISD::SMULO:
> -    BaseOp = ISD::MUL;
> +    BaseOp = X86ISD::MUL;
>     Cond = X86::COND_O;
>     break;
>   case ISD::UMULO:
> -    BaseOp = ISD::MUL;
> +    BaseOp = X86ISD::MUL;
>     Cond = X86::COND_C;
>     break;
>   }
> @@ -6488,6 +6488,9 @@
>   case X86ISD::PCMPGTW:            return "X86ISD::PCMPGTW";
>   case X86ISD::PCMPGTD:            return "X86ISD::PCMPGTD";
>   case X86ISD::PCMPGTQ:            return "X86ISD::PCMPGTQ";
> +  case X86ISD::ADD:                return "X86ISD::ADD";
> +  case X86ISD::SUB:                return "X86ISD::SUB";
> +  case X86ISD::MUL:                return "X86ISD::MUL";
>   }
> }
>
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=60915&r1=60914&r2=60915&view=diff
>
> === 
> === 
> === 
> =====================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Thu Dec 11 18:56:36  
> 2008
> @@ -227,7 +227,11 @@
>
>       // PCMP* - Vector integer comparisons.
>       PCMPEQB, PCMPEQW, PCMPEQD, PCMPEQQ,
> -      PCMPGTB, PCMPGTW, PCMPGTD, PCMPGTQ
> +      PCMPGTB, PCMPGTW, PCMPGTD, PCMPGTQ,
> +
> +      // ADD, SUB, MUL - Arithmetic operations with overflow/carry
> +      // intrinsics.
> +      ADD, SUB, MUL
>     };
>   }
>
>
> Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=60915&r1=60914&r2=60915&view=diff
>
> === 
> === 
> === 
> =====================================================================
> --- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original)
> +++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Thu Dec 11 18:56:36  
> 2008
> @@ -312,39 +312,76 @@
> let isTwoAddress = 1 in {
> let isConvertibleToThreeAddress = 1 in {
> let isCommutable = 1 in
> -def ADD64rr  : RI<0x01, MRMDestReg, (outs GR64:$dst), (ins  
> GR64:$src1, GR64:$src2),
> -                  "add{q}\t{$src2, $dst|$dst, $src2}",
> -                  [(set GR64:$dst, (add GR64:$src1, GR64:$src2)),
> -                   (implicit EFLAGS)]>;
> +// Register-Register Addition
> +def ADD64rr    : RI<0x01, MRMDestReg, (outs GR64:$dst), (ins  
> GR64:$src1, GR64:$src2),
> +                    "add{q}\t{$src2, $dst|$dst, $src2}",
> +                    [(set GR64:$dst, (add GR64:$src1, GR64:$src2))]>;
>
> -def ADD64ri32 : RIi32<0x81, MRM0r, (outs GR64:$dst), (ins  
> GR64:$src1, i64i32imm:$src2),
> -                      "add{q}\t{$src2, $dst|$dst, $src2}",
> -                      [(set GR64:$dst, (add GR64:$src1,  
> i64immSExt32:$src2)),
> -                       (implicit EFLAGS)]>;
> -def ADD64ri8 : RIi8<0x83, MRM0r, (outs GR64:$dst), (ins GR64:$src1,  
> i64i8imm:$src2),
> +// Register-Register Addition with Overflow
> +def ADDOvf64rr : RI<0x01, MRMDestReg, (outs GR64:$dst), (ins  
> GR64:$src1, GR64:$src2),
>                     "add{q}\t{$src2, $dst|$dst, $src2}",
> -                    [(set GR64:$dst, (add GR64:$src1,  
> i64immSExt8:$src2)),
> +                    [(set GR64:$dst, (X86add_ovf GR64:$src1,  
> GR64:$src2)),
>                      (implicit EFLAGS)]>;
> +
> +// Register-Integer Addition
> +def ADD64ri32 : RIi32<0x81, MRM0r, (outs GR64:$dst), (ins  
> GR64:$src1, i64i32imm:$src2),
> +                      "add{q}\t{$src2, $dst|$dst, $src2}",
> +                      [(set GR64:$dst, (add GR64:$src1,  
> i64immSExt32:$src2))]>;
> +def ADD64ri8  : RIi8<0x83, MRM0r, (outs GR64:$dst), (ins  
> GR64:$src1, i64i8imm:$src2),
> +                     "add{q}\t{$src2, $dst|$dst, $src2}",
> +                     [(set GR64:$dst, (add GR64:$src1,  
> i64immSExt8:$src2))]>;
> +
> +// Register-Integer Addition with Overflow
> +def ADDOvf64ri32 : RIi32<0x81, MRM0r, (outs GR64:$dst), (ins  
> GR64:$src1, i64i32imm:$src2),
> +                         "add{q}\t{$src2, $dst|$dst, $src2}",
> +                         [(set GR64:$dst, (X86add_ovf GR64:$src1,  
> i64immSExt32:$src2)),
> +                          (implicit EFLAGS)]>;
> +def ADDOvf64ri8  : RIi8<0x83, MRM0r, (outs GR64:$dst), (ins  
> GR64:$src1, i64i8imm:$src2),
> +                        "add{q}\t{$src2, $dst|$dst, $src2}",
> +                        [(set GR64:$dst, (X86add_ovf GR64:$src1,  
> i64immSExt8:$src2)),
> +                         (implicit EFLAGS)]>;
> } // isConvertibleToThreeAddress
>
> -def ADD64rm  : RI<0x03, MRMSrcMem, (outs GR64:$dst), (ins  
> GR64:$src1, i64mem:$src2),
> -                  "add{q}\t{$src2, $dst|$dst, $src2}",
> -                  [(set GR64:$dst, (add GR64:$src1, (load addr: 
> $src2))),
> -                   (implicit EFLAGS)]>;
> +// Register-Memory Addition
> +def ADD64rm     : RI<0x03, MRMSrcMem, (outs GR64:$dst), (ins  
> GR64:$src1, i64mem:$src2),
> +                     "add{q}\t{$src2, $dst|$dst, $src2}",
> +                     [(set GR64:$dst, (add GR64:$src1, (load addr: 
> $src2)))]>;
> +
> +// Register-Memory Addition with Overflow
> +def ADDOvf64rm  : RI<0x03, MRMSrcMem, (outs GR64:$dst), (ins  
> GR64:$src1, i64mem:$src2),
> +                     "add{q}\t{$src2, $dst|$dst, $src2}",
> +                     [(set GR64:$dst, (X86add_ovf GR64:$src1, (load  
> addr:$src2))),
> +                      (implicit EFLAGS)]>;
> } // isTwoAddress
>
> +// Memory-Register Addition
> def ADD64mr  : RI<0x01, MRMDestMem, (outs), (ins i64mem:$dst,  
> GR64:$src2),
>                   "add{q}\t{$src2, $dst|$dst, $src2}",
> -                  [(store (add (load addr:$dst), GR64:$src2), addr: 
> $dst),
> -                   (implicit EFLAGS)]>;
> +                  [(store (add (load addr:$dst), GR64:$src2), addr: 
> $dst)]>;
> def ADD64mi32 : RIi32<0x81, MRM0m, (outs), (ins i64mem:$dst,  
> i64i32imm :$src2),
>                       "add{q}\t{$src2, $dst|$dst, $src2}",
> -               [(store (add (load addr:$dst), i64immSExt32:$src2),  
> addr:$dst),
> -                (implicit EFLAGS)]>;
> +               [(store (add (load addr:$dst), i64immSExt32:$src2),  
> addr:$dst)]>;
> def ADD64mi8 : RIi8<0x83, MRM0m, (outs), (ins i64mem:$dst, i64i8imm : 
> $src2),
>                     "add{q}\t{$src2, $dst|$dst, $src2}",
> -                [(store (add (load addr:$dst), i64immSExt8:$src2),  
> addr:$dst),
> -                 (implicit EFLAGS)]>;
> +                [(store (add (load addr:$dst), i64immSExt8:$src2),  
> addr:$dst)]>;
> +
> +// Memory-Register Addition with Overflow
> +def ADDOvf64mr   : RI<0x01, MRMDestMem, (outs), (ins i64mem:$dst,  
> GR64:$src2),
> +                      "add{q}\t{$src2, $dst|$dst, $src2}",
> +                      [(store (X86add_ovf (load addr:$dst),  
> GR64:$src2),
> +                              addr:$dst),
> +                       (implicit EFLAGS)]>;
> +def ADDOvf64mi32 : RIi32<0x81, MRM0m, (outs),(ins i64mem:$dst,  
> i64i32imm:$src2),
> +                         "add{q}\t{$src2, $dst|$dst, $src2}",
> +                         [(store (X86add_ovf (load addr:$dst),
> +                                             i64immSExt32:$src2),
> +                                 addr:$dst),
> +                          (implicit EFLAGS)]>;
> +def ADDOvf64mi8 : RIi8<0x83, MRM0m, (outs), (ins i64mem:$dst,  
> i64i8imm :$src2),
> +                       "add{q}\t{$src2, $dst|$dst, $src2}",
> +                       [(store (X86add_ovf (load addr:$dst),  
> i64immSExt8:$src2),
> +                               addr:$dst),
> +                        (implicit EFLAGS)]>;
>
> let Uses = [EFLAGS] in {
> let isTwoAddress = 1 in {
> @@ -377,38 +414,86 @@
> } // Uses = [EFLAGS]
>
> let isTwoAddress = 1 in {
> +// Register-Register Subtraction
> def SUB64rr  : RI<0x29, MRMDestReg, (outs GR64:$dst), (ins  
> GR64:$src1, GR64:$src2),
>                   "sub{q}\t{$src2, $dst|$dst, $src2}",
> -                  [(set GR64:$dst, (sub GR64:$src1, GR64:$src2)),
> -                   (implicit EFLAGS)]>;
> +                  [(set GR64:$dst, (sub GR64:$src1, GR64:$src2))]>;
> +
> +// Register-Register Subtraction with Overflow
> +def SUBOvf64rr : RI<0x29, MRMDestReg, (outs GR64:$dst), (ins  
> GR64:$src1, GR64:$src2),
> +                    "sub{q}\t{$src2, $dst|$dst, $src2}",
> +                    [(set GR64:$dst, (X86sub_ovf GR64:$src1,  
> GR64:$src2)),
> +                     (implicit EFLAGS)]>;
>
> +// Register-Memory Subtraction
> def SUB64rm  : RI<0x2B, MRMSrcMem, (outs GR64:$dst), (ins  
> GR64:$src1, i64mem:$src2),
>                   "sub{q}\t{$src2, $dst|$dst, $src2}",
> -                  [(set GR64:$dst, (sub GR64:$src1, (load addr: 
> $src2))),
> -                   (implicit EFLAGS)]>;
> +                  [(set GR64:$dst, (sub GR64:$src1, (load addr: 
> $src2)))]>;
> +
> +// Register-Memory Subtraction with Overflow
> +def SUBOvf64rm : RI<0x2B, MRMSrcMem, (outs GR64:$dst), (ins  
> GR64:$src1, i64mem:$src2),
> +                    "sub{q}\t{$src2, $dst|$dst, $src2}",
> +                    [(set GR64:$dst, (X86sub_ovf GR64:$src1, (load  
> addr:$src2))),
> +                     (implicit EFLAGS)]>;
>
> -def SUB64ri32 : RIi32<0x81, MRM5r, (outs GR64:$dst), (ins  
> GR64:$src1, i64i32imm:$src2),
> +// Register-Integer Subtraction
> +def SUB64ri32 : RIi32<0x81, MRM5r, (outs GR64:$dst),
> +                                   (ins GR64:$src1, i64i32imm:$src2),
>                       "sub{q}\t{$src2, $dst|$dst, $src2}",
> -                      [(set GR64:$dst, (sub GR64:$src1,  
> i64immSExt32:$src2)),
> -                   (implicit EFLAGS)]>;
> -def SUB64ri8 : RIi8<0x83, MRM5r, (outs GR64:$dst), (ins GR64:$src1,  
> i64i8imm:$src2),
> +                      [(set GR64:$dst, (sub GR64:$src1,  
> i64immSExt32:$src2))]>;
> +def SUB64ri8 : RIi8<0x83, MRM5r, (outs GR64:$dst),
> +                                 (ins GR64:$src1, i64i8imm:$src2),
>                     "sub{q}\t{$src2, $dst|$dst, $src2}",
> -                    [(set GR64:$dst, (sub GR64:$src1,  
> i64immSExt8:$src2)),
> -                   (implicit EFLAGS)]>;
> +                    [(set GR64:$dst, (sub GR64:$src1,  
> i64immSExt8:$src2))]>;
> +
> +// Register-Integer Subtraction with Overflow
> +def SUBOvf64ri32 : RIi32<0x81, MRM5r, (outs GR64:$dst),
> +                                      (ins GR64:$src1, i64i32imm: 
> $src2),
> +                         "sub{q}\t{$src2, $dst|$dst, $src2}",
> +                         [(set GR64:$dst, (X86sub_ovf GR64:$src1,
> +                                                       
> i64immSExt32:$src2)),
> +                          (implicit EFLAGS)]>;
> +def SUBOvf64ri8 : RIi8<0x83, MRM5r, (outs GR64:$dst),
> +                                    (ins GR64:$src1, i64i8imm:$src2),
> +                       "sub{q}\t{$src2, $dst|$dst, $src2}",
> +                       [(set GR64:$dst, (X86sub_ovf GR64:$src1,
> +                                                     
> i64immSExt8:$src2)),
> +                        (implicit EFLAGS)]>;
> } // isTwoAddress
>
> +// Memory-Register Subtraction
> def SUB64mr  : RI<0x29, MRMDestMem, (outs), (ins i64mem:$dst,  
> GR64:$src2),
>                   "sub{q}\t{$src2, $dst|$dst, $src2}",
> -                  [(store (sub (load addr:$dst), GR64:$src2), addr: 
> $dst),
> -                   (implicit EFLAGS)]>;
> -def SUB64mi32 : RIi32<0x81, MRM5m, (outs), (ins i64mem:$dst,  
> i64i32imm:$src2),
> +                  [(store (sub (load addr:$dst), GR64:$src2), addr: 
> $dst)]>;
> +
> +// Memory-Register Subtraction with Overflow
> +def SUBOvf64mr : RI<0x29, MRMDestMem, (outs), (ins i64mem:$dst,  
> GR64:$src2),
> +                    "sub{q}\t{$src2, $dst|$dst, $src2}",
> +                    [(store (X86sub_ovf (load addr:$dst),  
> GR64:$src2),
> +                            addr:$dst),
> +                     (implicit EFLAGS)]>;
> +
> +// Memory-Integer Subtraction
> +def SUB64mi32 : RIi32<0x81, MRM5m, (outs), (ins i64mem:$dst,  
> i64i32imm:$src2),
>                       "sub{q}\t{$src2, $dst|$dst, $src2}",
> -               [(store (sub (load addr:$dst), i64immSExt32:$src2),  
> addr:$dst),
> -                   (implicit EFLAGS)]>;
> +                      [(store (sub (load addr:$dst),  
> i64immSExt32:$src2),
> +                              addr:$dst)]>;
> def SUB64mi8 : RIi8<0x83, MRM5m, (outs), (ins i64mem:$dst, i64i8imm : 
> $src2),
>                     "sub{q}\t{$src2, $dst|$dst, $src2}",
> -                [(store (sub (load addr:$dst), i64immSExt8:$src2),  
> addr:$dst),
> -                   (implicit EFLAGS)]>;
> +                    [(store (sub (load addr:$dst),  
> i64immSExt8:$src2),
> +                            addr:$dst)]>;
> +
> +// Memory-Integer Subtraction with Overflow
> +def SUBOvf64mi32 : RIi32<0x81, MRM5m, (outs), (ins i64mem: 
> $dst,i64i32imm:$src2),
> +                         "sub{q}\t{$src2, $dst|$dst, $src2}",
> +                         [(store (X86sub_ovf (load addr:$dst),
> +                                             i64immSExt32:$src2),  
> addr:$dst),
> +                          (implicit EFLAGS)]>;
> +def SUBOvf64mi8 : RIi8<0x83, MRM5m, (outs), (ins i64mem:$dst,  
> i64i8imm :$src2),
> +                       "sub{q}\t{$src2, $dst|$dst, $src2}",
> +                       [(store (X86sub_ovf (load addr:$dst),  
> i64immSExt8:$src2),
> +                               addr:$dst),
> +                        (implicit EFLAGS)]>;
>
> let Uses = [EFLAGS] in {
> let isTwoAddress = 1 in {
> @@ -459,38 +544,85 @@
> let Defs = [EFLAGS] in {
> let isTwoAddress = 1 in {
> let isCommutable = 1 in
> -def IMUL64rr : RI<0xAF, MRMSrcReg, (outs GR64:$dst), (ins  
> GR64:$src1, GR64:$src2),
> +// Register-Register Integer Multiplication
> +def IMUL64rr : RI<0xAF, MRMSrcReg, (outs GR64:$dst),
> +                                   (ins GR64:$src1, GR64:$src2),
>                   "imul{q}\t{$src2, $dst|$dst, $src2}",
> -                  [(set GR64:$dst, (mul GR64:$src1, GR64:$src2)),
> -                   (implicit EFLAGS)]>, TB;
> +                  [(set GR64:$dst, (mul GR64:$src1, GR64:$src2))]>,  
> TB;
>
> -def IMUL64rm : RI<0xAF, MRMSrcMem, (outs GR64:$dst), (ins  
> GR64:$src1, i64mem:$src2),
> +// Register-Register Multiplication with Overflow
> +def IMULOvf64rr : RI<0xAF, MRMSrcReg, (outs GR64:$dst),
> +                                      (ins GR64:$src1, GR64:$src2),
> +                     "imul{q}\t{$src2, $dst|$dst, $src2}",
> +                     [(set GR64:$dst, (X86mul_ovf GR64:$src1,  
> GR64:$src2)),
> +                      (implicit EFLAGS)]>, TB;
> +
> +// Register-Memory Integer Multiplication
> +def IMUL64rm : RI<0xAF, MRMSrcMem, (outs GR64:$dst),
> +                                   (ins GR64:$src1, i64mem:$src2),
>                   "imul{q}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR64:$dst, (mul GR64:$src1, (load addr: 
> $src2))),
> -                  (implicit EFLAGS)]>, TB;
> +                  [(set GR64:$dst, (mul GR64:$src1, (load addr: 
> $src2)))]>, TB;
> +
> +// Register-Memory Integer Multiplication with Overflow
> +def IMULOvf64rm : RI<0xAF, MRMSrcMem, (outs GR64:$dst),
> +                                      (ins GR64:$src1, i64mem:$src2),
> +                     "imul{q}\t{$src2, $dst|$dst, $src2}",
> +                     [(set GR64:$dst, (X86mul_ovf GR64:$src1,
> +                                                  (load addr: 
> $src2))),
> +                      (implicit EFLAGS)]>, TB;
> } // isTwoAddress
>
> // Suprisingly enough, these are not two address instructions!
> +
> +// Register-Integer Integer Multiplication
> def IMUL64rri32 : RIi32<0x69, MRMSrcReg,                    // GR64  
> = GR64*I32
>                         (outs GR64:$dst), (ins GR64:$src1, i64i32imm: 
> $src2),
>                         "imul{q}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> -                       [(set GR64:$dst, (mul GR64:$src1,  
> i64immSExt32:$src2)),
> -                        (implicit EFLAGS)]>;
> +                       [(set GR64:$dst, (mul GR64:$src1,  
> i64immSExt32:$src2))]>;
> def IMUL64rri8 : RIi8<0x6B, MRMSrcReg,                      // GR64  
> = GR64*I8
>                       (outs GR64:$dst), (ins GR64:$src1, i64i8imm: 
> $src2),
>                       "imul{q}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> -                      [(set GR64:$dst, (mul GR64:$src1,  
> i64immSExt8:$src2)),
> -                       (implicit EFLAGS)]>;
> +                      [(set GR64:$dst, (mul GR64:$src1,  
> i64immSExt8:$src2))]>;
> +
> +// Register-Integer Integer Multiplication with Overflow
> +def IMULOvf64rri32 : RIi32<0x69, MRMSrcReg,                 // GR64  
> = GR64*I32
> +                           (outs GR64:$dst), (ins GR64:$src1,  
> i64i32imm:$src2),
> +                           "imul{q}\t{$src2, $src1, $dst|$dst,  
> $src1, $src2}",
> +                           [(set GR64:$dst, (X86mul_ovf GR64:$src1,
> +                                                         
> i64immSExt32:$src2)),
> +                            (implicit EFLAGS)]>;
> +def IMULOvf64rri8 : RIi8<0x6B, MRMSrcReg,                   // GR64  
> = GR64*I8
> +                         (outs GR64:$dst), (ins GR64:$src1,  
> i64i8imm:$src2),
> +                         "imul{q}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> +                         [(set GR64:$dst, (X86mul_ovf GR64:$src1,
> +                                                       
> i64immSExt8:$src2)),
> +                          (implicit EFLAGS)]>;
> +
> +// Memory-Integer Integer Multiplication
> def IMUL64rmi32 : RIi32<0x69, MRMSrcMem,                   // GR64 =  
> [mem64]*I32
>                         (outs GR64:$dst), (ins i64mem:$src1,  
> i64i32imm:$src2),
>                         "imul{q}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> -                [(set GR64:$dst, (mul (load addr:$src1),  
> i64immSExt32:$src2)),
> -                 (implicit EFLAGS)]>;
> +                        [(set GR64:$dst, (mul (load addr:$src1),
> +                                              i64immSExt32:$src2))]>;
> def IMUL64rmi8 : RIi8<0x6B, MRMSrcMem,                      // GR64  
> = [mem64]*I8
>                       (outs GR64:$dst), (ins i64mem:$src1, i64i8imm:  
> $src2),
>                       "imul{q}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> -                 [(set GR64:$dst, (mul (load addr:$src1),  
> i64immSExt8:$src2)),
> -                  (implicit EFLAGS)]>;
> +                      [(set GR64:$dst, (mul (load addr:$src1),
> +                                            i64immSExt8:$src2))]>;
> +
> +// Memory-Integer Integer Multiplication with Overflow
> +def IMULOvf64rmi32 : RIi32<0x69, MRMSrcMem,                   //  
> GR64 = [mem64]*I32
> +                           (outs GR64:$dst), (ins i64mem:$src1,  
> i64i32imm:$src2),
> +                           "imul{q}\t{$src2, $src1, $dst|$dst,  
> $src1, $src2}",
> +                           [(set GR64:$dst, (X86mul_ovf (load addr: 
> $src1),
> +                                                         
> i64immSExt32:$src2)),
> +                            (implicit EFLAGS)]>;
> +def IMULOvf64rmi8 : RIi8<0x6B, MRMSrcMem,                      //  
> GR64 = [mem64]*I8
> +                         (outs GR64:$dst), (ins i64mem:$src1,  
> i64i8imm: $src2),
> +                         "imul{q}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> +                         [(set GR64:$dst, (X86mul_ovf (load addr: 
> $src1),
> +                                                       
> i64immSExt8:$src2)),
> +                          (implicit EFLAGS)]>;
> } // Defs = [EFLAGS]
>
> // Unsigned division / remainder
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=60915&r1=60914&r2=60915&view=diff
>
> === 
> === 
> === 
> =====================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Thu Dec 11 18:56:36 2008
> @@ -27,6 +27,10 @@
>                                   [SDTCisSameAs<0, 1>,  
> SDTCisSameAs<1, 2>,
>                                    SDTCisVT<3, i8>, SDTCisVT<4,  
> i32>]>;
>
> +def SDTArithOvf : SDTypeProfile<1, 2,
> +                                [SDTCisSameAs<0, 1>,  
> SDTCisSameAs<0, 2>,
> +                                 SDTCisInt<0>]>;
> +
> def SDTX86BrCond  : SDTypeProfile<0, 3,
>                                   [SDTCisVT<0, OtherVT>,
>                                    SDTCisVT<1, i8>, SDTCisVT<2,  
> i32>]>;
> @@ -140,6 +144,10 @@
> def X86tcret : SDNode<"X86ISD::TC_RETURN", SDT_X86TCRET,
>                         [SDNPHasChain,  SDNPOptInFlag]>;
>
> +def X86add_ovf : SDNode<"X86ISD::ADD", SDTArithOvf>;
> +def X86sub_ovf : SDNode<"X86ISD::SUB", SDTArithOvf>;
> +def X86mul_ovf : SDNode<"X86ISD::MUL", SDTArithOvf>;
> +
> // 
> === 
> --- 
> ------------------------------------------------------------------- 
> ===//
> // X86 Operand Definitions.
> //
> @@ -1923,104 +1931,202 @@
> // Arithmetic.
> let Defs = [EFLAGS] in {
> let isCommutable = 1 in {   // X = ADD Y, Z   --> X = ADD Z, Y
> -def ADD8rr   : I<0x00, MRMDestReg, (outs GR8 :$dst),
> -                                   (ins GR8 :$src1, GR8 :$src2),
> -                 "add{b}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR8:$dst, (add GR8:$src1, GR8:$src2)),
> -                  (implicit EFLAGS)]>;
> +// Register-Register Addition
> +def ADD8rr    : I<0x00, MRMDestReg, (outs GR8 :$dst),
> +                                    (ins GR8 :$src1, GR8 :$src2),
> +                  "add{b}\t{$src2, $dst|$dst, $src2}",
> +                  [(set GR8:$dst, (add GR8:$src1, GR8:$src2))]>;
> +
> +// Register-Register Addition with Overflow
> +def ADDOvf8rr : I<0x00, MRMDestReg, (outs GR8 :$dst),
> +                                    (ins GR8 :$src1, GR8 :$src2),
> +                  "add{b}\t{$src2, $dst|$dst, $src2}",
> +                  [(set GR8:$dst, (X86add_ovf GR8:$src1, GR8:$src2)),
> +                   (implicit EFLAGS)]>;
> +
> let isConvertibleToThreeAddress = 1 in {   // Can transform into LEA.
> +// Register-Register Addition
> def ADD16rr  : I<0x01, MRMDestReg, (outs GR16:$dst),
>                                    (ins GR16:$src1, GR16:$src2),
>                  "add{w}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR16:$dst, (add GR16:$src1, GR16:$src2)),
> -                  (implicit EFLAGS)]>, OpSize;
> +                 [(set GR16:$dst, (add GR16:$src1, GR16:$src2))]>,  
> OpSize;
> def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst),
>                                    (ins GR32:$src1, GR32:$src2),
>                  "add{l}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2)),
> -                  (implicit EFLAGS)]>;
> +                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
> +
> +// Register-Register Addition with Overflow
> +def ADDOvf16rr : I<0x01, MRMDestReg, (outs GR16:$dst),
> +                                     (ins GR16:$src1, GR16:$src2),
> +                   "add{w}\t{$src2, $dst|$dst, $src2}",
> +                   [(set GR16:$dst, (X86add_ovf GR16:$src1,  
> GR16:$src2)),
> +                    (implicit EFLAGS)]>, OpSize;
> +def ADDOvf32rr : I<0x01, MRMDestReg, (outs GR32:$dst),
> +                                     (ins GR32:$src1, GR32:$src2),
> +                   "add{l}\t{$src2, $dst|$dst, $src2}",
> +                   [(set GR32:$dst, (X86add_ovf GR32:$src1,  
> GR32:$src2)),
> +                    (implicit EFLAGS)]>;
> } // end isConvertibleToThreeAddress
> } // end isCommutable
> +
> +// Register-Memory Addition
> def ADD8rm   : I<0x02, MRMSrcMem, (outs GR8 :$dst),
>                                   (ins GR8 :$src1, i8mem :$src2),
>                  "add{b}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR8:$dst, (add GR8:$src1, (load addr:$src2))),
> -                  (implicit EFLAGS)]>;
> +                 [(set GR8:$dst, (add GR8:$src1, (load addr: 
> $src2)))]>;
> def ADD16rm  : I<0x03, MRMSrcMem, (outs GR16:$dst),
>                                   (ins GR16:$src1, i16mem:$src2),
>                  "add{w}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR16:$dst, (add GR16:$src1, (load addr: 
> $src2))),
> -                  (implicit EFLAGS)]>, OpSize;
> +                 [(set GR16:$dst, (add GR16:$src1, (load addr: 
> $src2)))]>,OpSize;
> def ADD32rm  : I<0x03, MRMSrcMem, (outs GR32:$dst),
>                                   (ins GR32:$src1, i32mem:$src2),
>                  "add{l}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR32:$dst, (add GR32:$src1, (load addr: 
> $src2))),
> -                  (implicit EFLAGS)]>;
> +                 [(set GR32:$dst, (add GR32:$src1, (load addr: 
> $src2)))]>;
>
> -def ADD8ri   : Ii8<0x80, MRM0r, (outs GR8:$dst), (ins GR8:$src1,  
> i8imm:$src2),
> +// Register-Memory Addition with Overflow
> +def ADDOvf8rm  : I<0x02, MRMSrcMem, (outs GR8 :$dst),
> +                                    (ins GR8 :$src1, i8mem :$src2),
>                    "add{b}\t{$src2, $dst|$dst, $src2}",
> -                   [(set GR8:$dst, (add GR8:$src1, imm:$src2)),
> +                   [(set GR8:$dst, (X86add_ovf GR8:$src1, (load  
> addr:$src2))),
> +                    (implicit EFLAGS)]>;
> +def ADDOvf16rm : I<0x03, MRMSrcMem, (outs GR16:$dst),
> +                                    (ins GR16:$src1, i16mem:$src2),
> +                   "add{w}\t{$src2, $dst|$dst, $src2}",
> +                   [(set GR16:$dst, (X86add_ovf GR16:$src1, (load  
> addr:$src2))),
> +                    (implicit EFLAGS)]>, OpSize;
> +def ADDOvf32rm : I<0x03, MRMSrcMem, (outs GR32:$dst),
> +                                    (ins GR32:$src1, i32mem:$src2),
> +                   "add{l}\t{$src2, $dst|$dst, $src2}",
> +                   [(set GR32:$dst, (X86add_ovf GR32:$src1, (load  
> addr:$src2))),
>                     (implicit EFLAGS)]>;
>
> +// Register-Integer Addition
> +def ADD8ri    : Ii8<0x80, MRM0r, (outs GR8:$dst), (ins GR8:$src1,  
> i8imm:$src2),
> +                    "add{b}\t{$src2, $dst|$dst, $src2}",
> +                    [(set GR8:$dst, (add GR8:$src1, imm:$src2))]>;
> +
> +// Register-Integer Addition with Overflow
> +def ADDOvf8ri  : Ii8<0x80, MRM0r, (outs GR8:$dst), (ins GR8:$src1,  
> i8imm:$src2),
> +                     "add{b}\t{$src2, $dst|$dst, $src2}",
> +                     [(set GR8:$dst, (X86add_ovf GR8:$src1, imm: 
> $src2)),
> +                      (implicit EFLAGS)]>;
> +
> let isConvertibleToThreeAddress = 1 in {   // Can transform into LEA.
> +// Register-Integer Addition
> def ADD16ri  : Ii16<0x81, MRM0r, (outs GR16:$dst),
>                                  (ins GR16:$src1, i16imm:$src2),
>                     "add{w}\t{$src2, $dst|$dst, $src2}",
> -                    [(set GR16:$dst, (add GR16:$src1, imm:$src2)),
> -                     (implicit EFLAGS)]>, OpSize;
> +                    [(set GR16:$dst, (add GR16:$src1, imm: 
> $src2))]>, OpSize;
> def ADD32ri  : Ii32<0x81, MRM0r, (outs GR32:$dst),
>                                  (ins GR32:$src1, i32imm:$src2),
>                     "add{l}\t{$src2, $dst|$dst, $src2}",
> -                    [(set GR32:$dst, (add GR32:$src1, imm:$src2)),
> -                     (implicit EFLAGS)]>;
> +                    [(set GR32:$dst, (add GR32:$src1, imm:$src2))]>;
> def ADD16ri8 : Ii8<0x83, MRM0r, (outs GR16:$dst),
>                                 (ins GR16:$src1, i16i8imm:$src2),
>                    "add{w}\t{$src2, $dst|$dst, $src2}",
> -                [(set GR16:$dst, (add GR16:$src1,  
> i16immSExt8:$src2)),
> -                 (implicit EFLAGS)]>, OpSize;
> +                [(set GR16:$dst, (add GR16:$src1,  
> i16immSExt8:$src2))]>, OpSize;
> def ADD32ri8 : Ii8<0x83, MRM0r, (outs GR32:$dst),
>                                 (ins GR32:$src1, i32i8imm:$src2),
>                    "add{l}\t{$src2, $dst|$dst, $src2}",
> -                [(set GR32:$dst, (add GR32:$src1,  
> i32immSExt8:$src2)),
> -                 (implicit EFLAGS)]>;
> +                [(set GR32:$dst, (add GR32:$src1,  
> i32immSExt8:$src2))]>;
> +
> +// Register-Integer Addition with Overflow
> +def ADDOvf16ri  : Ii16<0x81, MRM0r, (outs GR16:$dst),
> +                                    (ins GR16:$src1, i16imm:$src2),
> +                       "add{w}\t{$src2, $dst|$dst, $src2}",
> +                       [(set GR16:$dst, (X86add_ovf GR16:$src1, imm: 
> $src2)),
> +                        (implicit EFLAGS)]>, OpSize;
> +def ADDOvf32ri  : Ii32<0x81, MRM0r, (outs GR32:$dst),
> +                                    (ins GR32:$src1, i32imm:$src2),
> +                       "add{l}\t{$src2, $dst|$dst, $src2}",
> +                       [(set GR32:$dst, (X86add_ovf GR32:$src1, imm: 
> $src2)),
> +                        (implicit EFLAGS)]>;
> +def ADDOvf16ri8 : Ii8<0x83, MRM0r, (outs GR16:$dst),
> +                                   (ins GR16:$src1, i16i8imm:$src2),
> +                      "add{w}\t{$src2, $dst|$dst, $src2}",
> +                      [(set GR16:$dst, (X86add_ovf GR16:$src1,
> +                                                    
> i16immSExt8:$src2)),
> +                       (implicit EFLAGS)]>, OpSize;
> +def ADDOvf32ri8 : Ii8<0x83, MRM0r, (outs GR32:$dst),
> +                                   (ins GR32:$src1, i32i8imm:$src2),
> +                      "add{l}\t{$src2, $dst|$dst, $src2}",
> +                      [(set GR32:$dst, (X86add_ovf GR32:$src1,
> +                                        i32immSExt8:$src2)),
> +                       (implicit EFLAGS)]>;
> }
>
> let isTwoAddress = 0 in {
> +  // Memory-Register Addition
>   def ADD8mr   : I<0x00, MRMDestMem, (outs), (ins i8mem :$dst, GR8 : 
> $src2),
>                    "add{b}\t{$src2, $dst|$dst, $src2}",
> -                   [(store (add (load addr:$dst), GR8:$src2), addr: 
> $dst),
> -                    (implicit EFLAGS)]>;
> +                   [(store (add (load addr:$dst), GR8:$src2), addr: 
> $dst)]>;
>   def ADD16mr  : I<0x01, MRMDestMem, (outs), (ins i16mem:$dst,  
> GR16:$src2),
>                    "add{w}\t{$src2, $dst|$dst, $src2}",
> -                   [(store (add (load addr:$dst), GR16:$src2), addr: 
> $dst),
> -                    (implicit EFLAGS)]>,
> -                 OpSize;
> +                   [(store (add (load addr:$dst), GR16:$src2), addr: 
> $dst)]>,
> +                   OpSize;
>   def ADD32mr  : I<0x01, MRMDestMem, (outs), (ins i32mem:$dst,  
> GR32:$src2),
>                    "add{l}\t{$src2, $dst|$dst, $src2}",
> -                   [(store (add (load addr:$dst), GR32:$src2), addr: 
> $dst),
> -                    (implicit EFLAGS)]>;
> +                   [(store (add (load addr:$dst), GR32:$src2), addr: 
> $dst)]>;
>   def ADD8mi   : Ii8<0x80, MRM0m, (outs), (ins i8mem :$dst, i8imm : 
> $src2),
>                      "add{b}\t{$src2, $dst|$dst, $src2}",
> -                   [(store (add (loadi8 addr:$dst), imm:$src2),  
> addr:$dst),
> -                    (implicit EFLAGS)]>;
> +                   [(store (add (loadi8 addr:$dst), imm:$src2),  
> addr:$dst)]>;
>   def ADD16mi  : Ii16<0x81, MRM0m, (outs), (ins i16mem:$dst, i16imm: 
> $src2),
>                       "add{w}\t{$src2, $dst|$dst, $src2}",
> -                  [(store (add (loadi16 addr:$dst), imm:$src2),  
> addr:$dst),
> -                   (implicit EFLAGS)]>,
> -                 OpSize;
> +                  [(store (add (loadi16 addr:$dst), imm:$src2),  
> addr:$dst)]>,
> +                  OpSize;
>   def ADD32mi  : Ii32<0x81, MRM0m, (outs), (ins i32mem:$dst, i32imm: 
> $src2),
>                       "add{l}\t{$src2, $dst|$dst, $src2}",
> -                  [(store (add (loadi32 addr:$dst), imm:$src2),  
> addr:$dst),
> -                   (implicit EFLAGS)]>;
> +                  [(store (add (loadi32 addr:$dst), imm:$src2),  
> addr:$dst)]>;
>   def ADD16mi8 : Ii8<0x83, MRM0m, (outs), (ins i16mem:$dst,  
> i16i8imm :$src2),
>                      "add{w}\t{$src2, $dst|$dst, $src2}",
> -                  [(store (add (load addr:$dst),  
> i16immSExt8:$src2), addr:$dst),
> -                   (implicit EFLAGS)]>,
> -                 OpSize;
> +                  [(store (add (load addr:$dst), i16immSExt8:$src2),
> +                               addr:$dst)]>, OpSize;
>   def ADD32mi8 : Ii8<0x83, MRM0m, (outs), (ins i32mem:$dst,  
> i32i8imm :$src2),
>                      "add{l}\t{$src2, $dst|$dst, $src2}",
> -                  [(store (add (load addr:$dst),  
> i32immSExt8:$src2), addr:$dst),
> -                   (implicit EFLAGS)]>;
> +                  [(store (add (load addr:$dst), i32immSExt8:$src2),
> +                               addr:$dst)]>;
> +
> +  // Memory-Register Addition with Overflow
> +  def ADDOvf8mr   : I<0x00, MRMDestMem, (outs), (ins i8mem :$dst,  
> GR8 :$src2),
> +                      "add{b}\t{$src2, $dst|$dst, $src2}",
> +                      [(store (X86add_ovf (load addr:$dst),  
> GR8:$src2),
> +                                          addr:$dst),
> +                       (implicit EFLAGS)]>;
> +  def ADDOvf16mr  : I<0x01, MRMDestMem, (outs), (ins i16mem:$dst,  
> GR16:$src2),
> +                      "add{w}\t{$src2, $dst|$dst, $src2}",
> +                      [(store (X86add_ovf (load addr:$dst),  
> GR16:$src2),
> +                                          addr:$dst),
> +                       (implicit EFLAGS)]>, OpSize;
> +  def ADDOvf32mr  : I<0x01, MRMDestMem, (outs), (ins i32mem:$dst,  
> GR32:$src2),
> +                      "add{l}\t{$src2, $dst|$dst, $src2}",
> +                      [(store (X86add_ovf (load addr:$dst),  
> GR32:$src2),
> +                                          addr:$dst),
> +                       (implicit EFLAGS)]>;
> +  def ADDOvf8mi   : Ii8<0x80, MRM0m, (outs), (ins i8mem :$dst,  
> i8imm :$src2),
> +                        "add{b}\t{$src2, $dst|$dst, $src2}",
> +                        [(store (X86add_ovf (loadi8 addr:$dst), imm: 
> $src2),
> +                                            addr:$dst),
> +                        (implicit EFLAGS)]>;
> +  def ADDOvf16mi  : Ii16<0x81, MRM0m, (outs), (ins i16mem:$dst,  
> i16imm:$src2),
> +                         "add{w}\t{$src2, $dst|$dst, $src2}",
> +                         [(store (X86add_ovf (loadi16 addr:$dst),  
> imm:$src2),
> +                                             addr:$dst),
> +                          (implicit EFLAGS)]>, OpSize;
> +  def ADDOvf32mi  : Ii32<0x81, MRM0m, (outs), (ins i32mem:$dst,  
> i32imm:$src2),
> +                         "add{l}\t{$src2, $dst|$dst, $src2}",
> +                         [(store (X86add_ovf (loadi32 addr:$dst),  
> imm:$src2),
> +                                             addr:$dst),
> +                          (implicit EFLAGS)]>;
> +  def ADDOvf16mi8 : Ii8<0x83, MRM0m, (outs), (ins i16mem:$dst,  
> i16i8imm :$src2),
> +                        "add{w}\t{$src2, $dst|$dst, $src2}",
> +                        [(store (X86add_ovf (load addr: 
> $dst),i16immSExt8:$src2),
> +                                            addr:$dst),
> +                         (implicit EFLAGS)]>, OpSize;
> +  def ADDOvf32mi8 : Ii8<0x83, MRM0m, (outs), (ins i32mem:$dst,  
> i32i8imm :$src2),
> +                        "add{l}\t{$src2, $dst|$dst, $src2}",
> +                        [(store (X86add_ovf (load addr: 
> $dst),i32immSExt8:$src2),
> +                                            addr:$dst),
> +                         (implicit EFLAGS)]>;
> }
>
> let Uses = [EFLAGS] in {
> @@ -2052,84 +2158,193 @@
> }
> } // Uses = [EFLAGS]
>
> -def SUB8rr   : I<0x28, MRMDestReg, (outs GR8 :$dst), (ins GR8 : 
> $src1, GR8 :$src2),
> -                 "sub{b}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR8:$dst, (sub GR8:$src1, GR8:$src2)),
> -                  (implicit EFLAGS)]>;
> -def SUB16rr  : I<0x29, MRMDestReg, (outs GR16:$dst), (ins  
> GR16:$src1, GR16:$src2),
> -                 "sub{w}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR16:$dst, (sub GR16:$src1, GR16:$src2)),
> -                  (implicit EFLAGS)]>, OpSize;
> -def SUB32rr  : I<0x29, MRMDestReg, (outs GR32:$dst), (ins  
> GR32:$src1, GR32:$src2),
> -                 "sub{l}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR32:$dst, (sub GR32:$src1, GR32:$src2)),
> -                  (implicit EFLAGS)]>;
> -def SUB8rm   : I<0x2A, MRMSrcMem, (outs GR8 :$dst), (ins GR8 : 
> $src1, i8mem :$src2),
> -                 "sub{b}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR8:$dst, (sub GR8:$src1, (load addr:$src2))),
> -                  (implicit EFLAGS)]>;
> -def SUB16rm  : I<0x2B, MRMSrcMem, (outs GR16:$dst), (ins  
> GR16:$src1, i16mem:$src2),
> -                 "sub{w}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR16:$dst, (sub GR16:$src1, (load addr: 
> $src2))),
> -                  (implicit EFLAGS)]>, OpSize;
> -def SUB32rm  : I<0x2B, MRMSrcMem, (outs GR32:$dst), (ins  
> GR32:$src1, i32mem:$src2),
> -                 "sub{l}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR32:$dst, (sub GR32:$src1, (load addr: 
> $src2))),
> -                  (implicit EFLAGS)]>;
> +// Register-Register Subtraction
> +def SUB8rr  : I<0x28, MRMDestReg, (outs GR8:$dst), (ins GR8:$src1,  
> GR8:$src2),
> +                "sub{b}\t{$src2, $dst|$dst, $src2}",
> +                [(set GR8:$dst, (sub GR8:$src1, GR8:$src2))]>;
> +def SUB16rr : I<0x29, MRMDestReg, (outs GR16:$dst), (ins  
> GR16:$src1,GR16:$src2),
> +                "sub{w}\t{$src2, $dst|$dst, $src2}",
> +                [(set GR16:$dst, (sub GR16:$src1, GR16:$src2))]>,  
> OpSize;
> +def SUB32rr : I<0x29, MRMDestReg, (outs GR32:$dst), (ins  
> GR32:$src1,GR32:$src2),
> +                "sub{l}\t{$src2, $dst|$dst, $src2}",
> +                [(set GR32:$dst, (sub GR32:$src1, GR32:$src2))]>;
> +
> +// Register-Register Subtraction with Overflow
> +def SUBOvf8rr  : I<0x28, MRMDestReg, (outs GR8:$dst),
> +                                     (ins GR8:$src1, GR8:$src2),
> +                   "sub{b}\t{$src2, $dst|$dst, $src2}",
> +                   [(set GR8:$dst, (X86sub_ovf GR8:$src1,  
> GR8:$src2)),
> +                    (implicit EFLAGS)]>;
> +def SUBOvf16rr : I<0x29, MRMDestReg, (outs GR16:$dst),
> +                                     (ins GR16:$src1, GR16:$src2),
> +                   "sub{w}\t{$src2, $dst|$dst, $src2}",
> +                   [(set GR16:$dst, (X86sub_ovf GR16:$src1,  
> GR16:$src2)),
> +                    (implicit EFLAGS)]>, OpSize;
> +def SUBOvf32rr : I<0x29, MRMDestReg, (outs GR32:$dst),
> +                                     (ins GR32:$src1, GR32:$src2),
> +                   "sub{l}\t{$src2, $dst|$dst, $src2}",
> +                   [(set GR32:$dst, (X86sub_ovf GR32:$src1,  
> GR32:$src2)),
> +                    (implicit EFLAGS)]>;
>
> -def SUB8ri   : Ii8 <0x80, MRM5r, (outs GR8:$dst), (ins GR8:$src1,  
> i8imm:$src2),
> +// Register-Memory Subtraction
> +def SUB8rm  : I<0x2A, MRMSrcMem, (outs GR8 :$dst),
> +                                 (ins GR8 :$src1, i8mem :$src2),
> +                "sub{b}\t{$src2, $dst|$dst, $src2}",
> +                [(set GR8:$dst, (sub GR8:$src1, (load addr: 
> $src2)))]>;
> +def SUB16rm : I<0x2B, MRMSrcMem, (outs GR16:$dst),
> +                                 (ins GR16:$src1, i16mem:$src2),
> +                "sub{w}\t{$src2, $dst|$dst, $src2}",
> +                [(set GR16:$dst, (sub GR16:$src1, (load addr: 
> $src2)))]>, OpSize;
> +def SUB32rm : I<0x2B, MRMSrcMem, (outs GR32:$dst),
> +                                 (ins GR32:$src1, i32mem:$src2),
> +                "sub{l}\t{$src2, $dst|$dst, $src2}",
> +                [(set GR32:$dst, (sub GR32:$src1, (load addr: 
> $src2)))]>;
> +
> +// Register-Memory Subtraction with Overflow
> +def SUBOvf8rm  : I<0x2A, MRMSrcMem, (outs GR8:$dst),
> +                                    (ins GR8:$src1, i8mem:$src2),
>                     "sub{b}\t{$src2, $dst|$dst, $src2}",
> -                    [(set GR8:$dst, (sub GR8:$src1, imm:$src2)),
> +                    [(set GR8:$dst, (X86sub_ovf GR8:$src1, (load  
> addr:$src2))),
> +                     (implicit EFLAGS)]>;
> +def SUBOvf16rm : I<0x2B, MRMSrcMem, (outs GR16:$dst),
> +                                    (ins GR16:$src1, i16mem:$src2),
> +                   "sub{w}\t{$src2, $dst|$dst, $src2}",
> +                   [(set GR16:$dst, (X86sub_ovf GR16:$src1, (load  
> addr:$src2))),
> +                    (implicit EFLAGS)]>, OpSize;
> +def SUBOvf32rm : I<0x2B, MRMSrcMem, (outs GR32:$dst),
> +                                    (ins GR32:$src1, i32mem:$src2),
> +                   "sub{l}\t{$src2, $dst|$dst, $src2}",
> +                   [(set GR32:$dst, (X86sub_ovf GR32:$src1, (load  
> addr:$src2))),
>                     (implicit EFLAGS)]>;
> -def SUB16ri  : Ii16<0x81, MRM5r, (outs GR16:$dst), (ins GR16:$src1,  
> i16imm:$src2),
> +
> +// Register-Integer Subtraction
> +def SUB8ri   : Ii8 <0x80, MRM5r, (outs GR8:$dst),
> +                                 (ins GR8:$src1, i8imm:$src2),
> +                    "sub{b}\t{$src2, $dst|$dst, $src2}",
> +                    [(set GR8:$dst, (sub GR8:$src1, imm:$src2))]>;
> +def SUB16ri  : Ii16<0x81, MRM5r, (outs GR16:$dst),
> +                                 (ins GR16:$src1, i16imm:$src2),
>                     "sub{w}\t{$src2, $dst|$dst, $src2}",
> -                    [(set GR16:$dst, (sub GR16:$src1, imm:$src2)),
> -                    (implicit EFLAGS)]>, OpSize;
> -def SUB32ri  : Ii32<0x81, MRM5r, (outs GR32:$dst), (ins GR32:$src1,  
> i32imm:$src2),
> +                    [(set GR16:$dst, (sub GR16:$src1, imm: 
> $src2))]>, OpSize;
> +def SUB32ri  : Ii32<0x81, MRM5r, (outs GR32:$dst),
> +                                 (ins GR32:$src1, i32imm:$src2),
>                     "sub{l}\t{$src2, $dst|$dst, $src2}",
> -                    [(set GR32:$dst, (sub GR32:$src1, imm:$src2)),
> -                    (implicit EFLAGS)]>;
> -def SUB16ri8 : Ii8<0x83, MRM5r, (outs GR16:$dst), (ins GR16:$src1,  
> i16i8imm:$src2),
> +                    [(set GR32:$dst, (sub GR32:$src1, imm:$src2))]>;
> +def SUB16ri8 : Ii8<0x83, MRM5r, (outs GR16:$dst),
> +                                (ins GR16:$src1, i16i8imm:$src2),
>                    "sub{w}\t{$src2, $dst|$dst, $src2}",
> -                   [(set GR16:$dst, (sub GR16:$src1,  
> i16immSExt8:$src2)),
> -                   (implicit EFLAGS)]>, OpSize;
> -def SUB32ri8 : Ii8<0x83, MRM5r, (outs GR32:$dst), (ins GR32:$src1,  
> i32i8imm:$src2),
> +                   [(set GR16:$dst, (sub GR16:$src1,  
> i16immSExt8:$src2))]>,
> +                   OpSize;
> +def SUB32ri8 : Ii8<0x83, MRM5r, (outs GR32:$dst),
> +                                (ins GR32:$src1, i32i8imm:$src2),
>                    "sub{l}\t{$src2, $dst|$dst, $src2}",
> -                   [(set GR32:$dst, (sub GR32:$src1,  
> i32immSExt8:$src2)),
> -                   (implicit EFLAGS)]>;
> +                   [(set GR32:$dst, (sub GR32:$src1,  
> i32immSExt8:$src2))]>;
> +
> +// Register-Integer Subtraction with Overflow
> +def SUBOvf8ri   : Ii8 <0x80, MRM5r, (outs GR8:$dst),
> +                                    (ins GR8:$src1, i8imm:$src2),
> +                       "sub{b}\t{$src2, $dst|$dst, $src2}",
> +                       [(set GR8:$dst, (X86sub_ovf GR8:$src1, imm: 
> $src2)),
> +                        (implicit EFLAGS)]>;
> +def SUBOvf16ri  : Ii16<0x81, MRM5r, (outs GR16:$dst),
> +                                    (ins GR16:$src1, i16imm:$src2),
> +                       "sub{w}\t{$src2, $dst|$dst, $src2}",
> +                       [(set GR16:$dst, (X86sub_ovf GR16:$src1, imm: 
> $src2)),
> +                        (implicit EFLAGS)]>, OpSize;
> +def SUBOvf32ri  : Ii32<0x81, MRM5r, (outs GR32:$dst),
> +                                    (ins GR32:$src1, i32imm:$src2),
> +                       "sub{l}\t{$src2, $dst|$dst, $src2}",
> +                       [(set GR32:$dst, (X86sub_ovf GR32:$src1, imm: 
> $src2)),
> +                        (implicit EFLAGS)]>;
> +def SUBOvf16ri8 : Ii8<0x83, MRM5r, (outs GR16:$dst),
> +                                   (ins GR16:$src1, i16i8imm:$src2),
> +                      "sub{w}\t{$src2, $dst|$dst, $src2}",
> +                      [(set GR16:$dst, (X86sub_ovf GR16:$src1,
> +                                                    
> i16immSExt8:$src2)),
> +                       (implicit EFLAGS)]>, OpSize;
> +def SUBOvf32ri8 : Ii8<0x83, MRM5r, (outs GR32:$dst),
> +                                   (ins GR32:$src1, i32i8imm:$src2),
> +                      "sub{l}\t{$src2, $dst|$dst, $src2}",
> +                      [(set GR32:$dst, (X86sub_ovf GR32:$src1,
> +                                                    
> i32immSExt8:$src2)),
> +                       (implicit EFLAGS)]>;
> +
> let isTwoAddress = 0 in {
> +  // Memory-Register Subtraction
>   def SUB8mr   : I<0x28, MRMDestMem, (outs), (ins i8mem :$dst, GR8 : 
> $src2),
>                    "sub{b}\t{$src2, $dst|$dst, $src2}",
> -                   [(store (sub (load addr:$dst), GR8:$src2), addr: 
> $dst),
> -                   (implicit EFLAGS)]>;
> +                   [(store (sub (load addr:$dst), GR8:$src2), addr: 
> $dst)]>;
>   def SUB16mr  : I<0x29, MRMDestMem, (outs), (ins i16mem:$dst,  
> GR16:$src2),
>                    "sub{w}\t{$src2, $dst|$dst, $src2}",
> -                   [(store (sub (load addr:$dst), GR16:$src2), addr: 
> $dst),
> -                   (implicit EFLAGS)]>, OpSize;
> +                   [(store (sub (load addr:$dst), GR16:$src2), addr: 
> $dst)]>,
> +                   OpSize;
>   def SUB32mr  : I<0x29, MRMDestMem, (outs), (ins i32mem:$dst,  
> GR32:$src2),
>                    "sub{l}\t{$src2, $dst|$dst, $src2}",
> -                   [(store (sub (load addr:$dst), GR32:$src2), addr: 
> $dst),
> -                   (implicit EFLAGS)]>;
> +                   [(store (sub (load addr:$dst), GR32:$src2), addr: 
> $dst)]>;
> +
> +  // Memory-Register Subtraction with Overflow
> +  def SUBOvf8mr  : I<0x28, MRMDestMem, (outs), (ins i8mem :$dst,  
> GR8 :$src2),
> +                     "sub{b}\t{$src2, $dst|$dst, $src2}",
> +                     [(store (X86sub_ovf (load addr:$dst),  
> GR8:$src2),
> +                                         addr:$dst),
> +                      (implicit EFLAGS)]>;
> +  def SUBOvf16mr : I<0x29, MRMDestMem, (outs), (ins i16mem:$dst,  
> GR16:$src2),
> +                     "sub{w}\t{$src2, $dst|$dst, $src2}",
> +                     [(store (X86sub_ovf (load addr:$dst),  
> GR16:$src2),
> +                                         addr:$dst),
> +                      (implicit EFLAGS)]>, OpSize;
> +  def SUBOvf32mr : I<0x29, MRMDestMem, (outs), (ins i32mem:$dst,  
> GR32:$src2),
> +                     "sub{l}\t{$src2, $dst|$dst, $src2}",
> +                     [(store (X86sub_ovf (load addr:$dst),  
> GR32:$src2),
> +                                         addr:$dst),
> +                      (implicit EFLAGS)]>;
> +
> +  // Memory-Integer Subtraction
>   def SUB8mi   : Ii8<0x80, MRM5m, (outs), (ins i8mem :$dst, i8imm: 
> $src2),
>                      "sub{b}\t{$src2, $dst|$dst, $src2}",
> -                   [(store (sub (loadi8 addr:$dst), imm:$src2),  
> addr:$dst),
> -                   (implicit EFLAGS)]>;
> +                     [(store (sub (loadi8 addr:$dst), imm:$src2),  
> addr:$dst)]>;
>   def SUB16mi  : Ii16<0x81, MRM5m, (outs), (ins i16mem:$dst, i16imm: 
> $src2),
>                       "sub{w}\t{$src2, $dst|$dst, $src2}",
> -                  [(store (sub (loadi16 addr:$dst), imm:$src2),  
> addr:$dst),
> -                  (implicit EFLAGS)]>, OpSize;
> +                      [(store (sub (loadi16 addr:$dst), imm: 
> $src2),addr:$dst)]>,
> +                      OpSize;
>   def SUB32mi  : Ii32<0x81, MRM5m, (outs), (ins i32mem:$dst, i32imm: 
> $src2),
>                       "sub{l}\t{$src2, $dst|$dst, $src2}",
> -                  [(store (sub (loadi32 addr:$dst), imm:$src2),  
> addr:$dst),
> -                  (implicit EFLAGS)]>;
> +                      [(store (sub (loadi32 addr:$dst), imm: 
> $src2),addr:$dst)]>;
>   def SUB16mi8 : Ii8<0x83, MRM5m, (outs), (ins i16mem:$dst,  
> i16i8imm :$src2),
>                      "sub{w}\t{$src2, $dst|$dst, $src2}",
> -                [(store (sub (load addr:$dst), i16immSExt8:$src2),  
> addr:$dst),
> -                  (implicit EFLAGS)]>, OpSize;
> -  def SUB32mi8 : Ii8<0x83, MRM5m, (outs), (ins i32mem:$dst,  
> i32i8imm :$src2),
> +                     [(store (sub (load addr:$dst),  
> i16immSExt8:$src2),
> +                             addr:$dst)]>, OpSize;
> +  def SUB32mi8 : Ii8<0x83, MRM5m, (outs), (ins i32mem:$dst,  
> i32i8imm :$src2),
>                      "sub{l}\t{$src2, $dst|$dst, $src2}",
> -                [(store (sub (load addr:$dst), i32immSExt8:$src2),  
> addr:$dst),
> -                (implicit EFLAGS)]>;
> +                     [(store (sub (load addr:$dst),  
> i32immSExt8:$src2),
> +                             addr:$dst)]>;
> +
> +  // Memory-Integer Subtraction with Overflow
> +  def SUBOvf8mi   : Ii8<0x80, MRM5m, (outs), (ins i8mem :$dst,  
> i8imm:$src2),
> +                        "sub{b}\t{$src2, $dst|$dst, $src2}",
> +                        [(store (X86sub_ovf (loadi8 addr:$dst), imm: 
> $src2),
> +                                addr:$dst),
> +                         (implicit EFLAGS)]>;
> +  def SUBOvf16mi  : Ii16<0x81, MRM5m, (outs), (ins i16mem:$dst,  
> i16imm:$src2),
> +                         "sub{w}\t{$src2, $dst|$dst, $src2}",
> +                         [(store (X86sub_ovf (loadi16 addr:$dst),  
> imm:$src2),
> +                                 addr:$dst),
> +                          (implicit EFLAGS)]>, OpSize;
> +  def SUBOvf32mi  : Ii32<0x81, MRM5m, (outs), (ins i32mem:$dst,  
> i32imm:$src2),
> +                         "sub{l}\t{$src2, $dst|$dst, $src2}",
> +                         [(store (X86sub_ovf (loadi32 addr:$dst),  
> imm:$src2),
> +                                             addr:$dst),
> +                          (implicit EFLAGS)]>;
> +  def SUBOvf16mi8 : Ii8<0x83, MRM5m, (outs), (ins i16mem:$dst,  
> i16i8imm :$src2),
> +                        "sub{w}\t{$src2, $dst|$dst, $src2}",
> +                        [(store (X86sub_ovf (load addr: 
> $dst),i16immSExt8:$src2),
> +                                            addr:$dst),
> +                         (implicit EFLAGS)]>, OpSize;
> +  def SUBOvf32mi8 : Ii8<0x83, MRM5m, (outs), (ins i32mem:$dst,  
> i32i8imm :$src2),
> +                        "sub{l}\t{$src2, $dst|$dst, $src2}",
> +                        [(store (X86sub_ovf (load addr: 
> $dst),i32immSExt8:$src2),
> +                                            addr:$dst),
> +                         (implicit EFLAGS)]>;
> }
>
> let Uses = [EFLAGS] in {
> @@ -2165,70 +2380,143 @@
>
> let Defs = [EFLAGS] in {
> let isCommutable = 1 in {  // X = IMUL Y, Z --> X = IMUL Z, Y
> -def IMUL16rr : I<0xAF, MRMSrcReg, (outs GR16:$dst), (ins  
> GR16:$src1, GR16:$src2),
> +// Register-Register Integer Multiply
> +def IMUL16rr : I<0xAF, MRMSrcReg, (outs GR16:$dst), (ins  
> GR16:$src1,GR16:$src2),
>                  "imul{w}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR16:$dst, (mul GR16:$src1, GR16:$src2)),
> -                 (implicit EFLAGS)]>, TB, OpSize;
> -def IMUL32rr : I<0xAF, MRMSrcReg, (outs GR32:$dst), (ins  
> GR32:$src1, GR32:$src2),
> +                 [(set GR16:$dst, (mul GR16:$src1, GR16:$src2))]>,  
> TB, OpSize;
> +def IMUL32rr : I<0xAF, MRMSrcReg, (outs GR32:$dst), (ins  
> GR32:$src1,GR32:$src2),
>                  "imul{l}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR32:$dst, (mul GR32:$src1, GR32:$src2)),
> -                 (implicit EFLAGS)]>, TB;
> +                 [(set GR32:$dst, (mul GR32:$src1, GR32:$src2))]>,  
> TB;
> +
> +// Register-Register Integer Multiply
> +def IMULOvf16rr : I<0xAF, MRMSrcReg, (outs GR16:$dst),
> +                                     (ins GR16:$src1, GR16:$src2),
> +                    "imul{w}\t{$src2, $dst|$dst, $src2}",
> +                    [(set GR16:$dst, (X86mul_ovf GR16:$src1,  
> GR16:$src2)),
> +                     (implicit EFLAGS)]>, TB, OpSize;
> +def IMULOvf32rr : I<0xAF, MRMSrcReg, (outs GR32:$dst),
> +                                     (ins GR32:$src1, GR32:$src2),
> +                    "imul{l}\t{$src2, $dst|$dst, $src2}",
> +                    [(set GR32:$dst, (X86mul_ovf GR32:$src1,  
> GR32:$src2)),
> +                     (implicit EFLAGS)]>, TB;
> }
> -def IMUL16rm : I<0xAF, MRMSrcMem, (outs GR16:$dst), (ins  
> GR16:$src1, i16mem:$src2),
> +
> +// Register-Memory Integer Multiply
> +def IMUL16rm : I<0xAF, MRMSrcMem, (outs GR16:$dst),
> +                                  (ins GR16:$src1, i16mem:$src2),
>                  "imul{w}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR16:$dst, (mul GR16:$src1, (load addr: 
> $src2))),
> -                 (implicit EFLAGS)]>,
> +                 [(set GR16:$dst, (mul GR16:$src1, (load addr: 
> $src2)))]>,
>                  TB, OpSize;
> def IMUL32rm : I<0xAF, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1,  
> i32mem:$src2),
>                  "imul{l}\t{$src2, $dst|$dst, $src2}",
> -                 [(set GR32:$dst, (mul GR32:$src1, (load addr: 
> $src2))),
> -                 (implicit EFLAGS)]>, TB;
> +                 [(set GR32:$dst, (mul GR32:$src1, (load addr: 
> $src2)))]>, TB;
> +
> +// Register-Memory Integer Multiply with Overflow
> +def IMULOvf16rm : I<0xAF, MRMSrcMem, (outs GR16:$dst),
> +                                     (ins GR16:$src1, i16mem:$src2),
> +                    "imul{w}\t{$src2, $dst|$dst, $src2}",
> +                    [(set GR16:$dst, (X86mul_ovf GR16:$src1,(load  
> addr:$src2))),
> +                     (implicit EFLAGS)]>,
> +                    TB, OpSize;
> +def IMULOvf32rm : I<0xAF, MRMSrcMem, (outs GR32:$dst),
> +                                     (ins GR32:$src1, i32mem:$src2),
> +                    "imul{l}\t{$src2, $dst|$dst, $src2}",
> +                    [(set GR32:$dst, (X86mul_ovf GR32:$src1,(load  
> addr:$src2))),
> +                     (implicit EFLAGS)]>, TB;
> } // Defs = [EFLAGS]
> } // end Two Address instructions
>
> // Suprisingly enough, these are not two address instructions!
> let Defs = [EFLAGS] in {
> +// Register-Integer Integer Multiply
> def IMUL16rri  : Ii16<0x69, MRMSrcReg,                      // GR16  
> = GR16*I16
>                       (outs GR16:$dst), (ins GR16:$src1, i16imm: 
> $src2),
>                       "imul{w}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> -                      [(set GR16:$dst, (mul GR16:$src1, imm:$src2)),
> -                      (implicit EFLAGS)]>, OpSize;
> +                      [(set GR16:$dst, (mul GR16:$src1, imm: 
> $src2))]>, OpSize;
> def IMUL32rri  : Ii32<0x69, MRMSrcReg,                      // GR32  
> = GR32*I32
>                       (outs GR32:$dst), (ins GR32:$src1, i32imm: 
> $src2),
>                       "imul{l}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> -                      [(set GR32:$dst, (mul GR32:$src1, imm:$src2)),
> -                      (implicit EFLAGS)]>;
> +                      [(set GR32:$dst, (mul GR32:$src1, imm: 
> $src2))]>;
> def IMUL16rri8 : Ii8<0x6B, MRMSrcReg,                       // GR16  
> = GR16*I8
>                      (outs GR16:$dst), (ins GR16:$src1, i16i8imm: 
> $src2),
>                      "imul{w}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> -                     [(set GR16:$dst, (mul GR16:$src1,  
> i16immSExt8:$src2)),
> -                     (implicit EFLAGS)]>, OpSize;
> +                     [(set GR16:$dst, (mul GR16:$src1,  
> i16immSExt8:$src2))]>,
> +                     OpSize;
> def IMUL32rri8 : Ii8<0x6B, MRMSrcReg,                       // GR32  
> = GR32*I8
>                      (outs GR32:$dst), (ins GR32:$src1, i32i8imm: 
> $src2),
>                      "imul{l}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> -                     [(set GR32:$dst, (mul GR32:$src1,  
> i32immSExt8:$src2)),
> -                     (implicit EFLAGS)]>;
> +                     [(set GR32:$dst, (mul GR32:$src1,  
> i32immSExt8:$src2))]>;
>
> +// Register-Integer Integer Multiply with Overflow
> +def IMULOvf16rri  : Ii16<0x69, MRMSrcReg,                   // GR16  
> = GR16*I16
> +                        (outs GR16:$dst), (ins GR16:$src1, i16imm: 
> $src2),
> +                        "imul{w}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> +                        [(set GR16:$dst, (X86mul_ovf GR16:$src1,  
> imm:$src2)),
> +                         (implicit EFLAGS)]>, OpSize;
> +def IMULOvf32rri  : Ii32<0x69, MRMSrcReg,                   // GR32  
> = GR32*I32
> +                        (outs GR32:$dst), (ins GR32:$src1, i32imm: 
> $src2),
> +                        "imul{l}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> +                        [(set GR32:$dst, (X86mul_ovf GR32:$src1,  
> imm:$src2)),
> +                         (implicit EFLAGS)]>;
> +def IMULOvf16rri8 : Ii8<0x6B, MRMSrcReg,                    // GR16  
> = GR16*I8
> +                       (outs GR16:$dst), (ins GR16:$src1, i16i8imm: 
> $src2),
> +                       "imul{w}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> +                       [(set GR16:$dst, (X86mul_ovf GR16:$src1,
> +                                         i16immSExt8:$src2)),
> +                        (implicit EFLAGS)]>, OpSize;
> +def IMULOvf32rri8 : Ii8<0x6B, MRMSrcReg,                    // GR32  
> = GR32*I8
> +                       (outs GR32:$dst), (ins GR32:$src1, i32i8imm: 
> $src2),
> +                       "imul{l}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> +                       [(set GR32:$dst, (X86mul_ovf GR32:$src1,
> +                                         i32immSExt8:$src2)),
> +                        (implicit EFLAGS)]>;
> +
> +// Memory-Integer Integer Multiply
> def IMUL16rmi  : Ii16<0x69, MRMSrcMem,                      // GR16  
> = [mem16]*I16
>                       (outs GR16:$dst), (ins i16mem:$src1, i16imm: 
> $src2),
>                       "imul{w}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> -                      [(set GR16:$dst, (mul (load addr:$src1), imm: 
> $src2)),
> -                      (implicit EFLAGS)]>, OpSize;
> +                      [(set GR16:$dst, (mul (load addr:$src1), imm: 
> $src2))]>,
> +                      OpSize;
> def IMUL32rmi  : Ii32<0x69, MRMSrcMem,                      // GR32  
> = [mem32]*I32
>                       (outs GR32:$dst), (ins i32mem:$src1, i32imm: 
> $src2),
>                       "imul{l}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> -                      [(set GR32:$dst, (mul (load addr:$src1), imm: 
> $src2)),
> -                      (implicit EFLAGS)]>;
> +                      [(set GR32:$dst, (mul (load addr:$src1), imm: 
> $src2))]>;
> def IMUL16rmi8 : Ii8<0x6B, MRMSrcMem,                       // GR16  
> = [mem16]*I8
>                      (outs GR16:$dst), (ins i16mem:$src1, i16i8imm : 
> $src2),
>                      "imul{w}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> -                  [(set GR16:$dst, (mul (load addr:$src1),  
> i16immSExt8:$src2)),
> -                  (implicit EFLAGS)]>, OpSize;
> +                     [(set GR16:$dst, (mul (load addr:$src1),
> +                                       i16immSExt8:$src2))]>, OpSize;
> def IMUL32rmi8 : Ii8<0x6B, MRMSrcMem,                       // GR32  
> = [mem32]*I8
>                      (outs GR32:$dst), (ins i32mem:$src1, i32i8imm:  
> $src2),
>                      "imul{l}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> -                  [(set GR32:$dst, (mul (load addr:$src1),  
> i32immSExt8:$src2)),
> -                  (implicit EFLAGS)]>;
> +                     [(set GR32:$dst, (mul (load addr:$src1),
> +                                           i32immSExt8:$src2))]>;
> +
> +// Memory-Integer Integer Multiply with Overflow
> +def IMULOvf16rmi  : Ii16<0x69, MRMSrcMem,                   // GR16  
> = [mem16]*I16
> +                        (outs GR16:$dst), (ins i16mem:$src1, i16imm: 
> $src2),
> +                        "imul{w}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> +                        [(set GR16:$dst, (X86mul_ovf (load addr: 
> $src1),
> +                                                     imm:$src2)),
> +                         (implicit EFLAGS)]>, OpSize;
> +def IMULOvf32rmi  : Ii32<0x69, MRMSrcMem,                   // GR32  
> = [mem32]*I32
> +                        (outs GR32:$dst), (ins i32mem:$src1, i32imm: 
> $src2),
> +                        "imul{l}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> +                        [(set GR32:$dst, (X86mul_ovf (load addr: 
> $src1),
> +                                                     imm:$src2)),
> +                         (implicit EFLAGS)]>;
> +def IMULOvf16rmi8 : Ii8<0x6B, MRMSrcMem,                    // GR16  
> = [mem16]*I8
> +                        (outs GR16:$dst), (ins i16mem:$src1,  
> i16i8imm :$src2),
> +                        "imul{w}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> +                        [(set GR16:$dst, (X86mul_ovf (load addr: 
> $src1),
> +                                                      
> i16immSExt8:$src2)),
> +                         (implicit EFLAGS)]>, OpSize;
> +def IMULOvf32rmi8 : Ii8<0x6B, MRMSrcMem,                    // GR32  
> = [mem32]*I8
> +                        (outs GR32:$dst), (ins i32mem:$src1,  
> i32i8imm: $src2),
> +                        "imul{l}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> +                        [(set GR32:$dst, (X86mul_ovf (load addr: 
> $src1),
> +                                                      
> i32immSExt8:$src2)),
> +                         (implicit EFLAGS)]>;
> } // Defs = [EFLAGS]
>
> // 
> === 
> --- 
> ------------------------------------------------------------------- 
> ===//
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> def IMULOvf16rmi8 : Ii8<0x6B, MRMSrcMem,                    // GR16  
> = [mem16]*I8
> +                        (outs GR16:$dst), (ins i16mem:$src1,  
> i16i8imm :$src2),
> +                        "imul{w}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> +                        [(set GR16:$dst, (X86mul_ovf (load addr: 
> $src1),
> +                                                      
> i16immSExt8:$src2)),
> +                         (implicit EFLAGS)]>, OpSize;
> +def IMULOvf32rmi8 : Ii8<0x6B, MRMSrcMem,                    // GR32  
> = [mem32]*I8
> +                        (outs GR32:$dst), (ins i32mem:$src1,  
> i32i8imm: $src2),
> +                        "imul{l}\t{$src2, $src1, $dst|$dst, $src1,  
> $src2}",
> +                        [(set GR32:$dst, (X86mul_ovf (load addr: 
> $src1),
> +                                                      
> i32immSExt8:$src2)),
> +                         (implicit EFLAGS)]>;
> } // Defs = [EFLAGS]
>
> // 
> === 
> --- 
> ------------------------------------------------------------------- 
> ===//
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits


From baldrick at free.fr  Fri Dec 12 01:54:44 2008
From: baldrick at free.fr (Duncan Sands)
Date: Fri, 12 Dec 2008 08:54:44 +0100
Subject: [llvm-commits] [llvm-gcc-4.2] r60913 -
	/llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1
In-Reply-To: <200812120020.mBC0Kn57012668@zion.cs.uiuc.edu>
References: <200812120020.mBC0Kn57012668@zion.cs.uiuc.edu>
Message-ID: <200812120854.44474.baldrick@free.fr>

Hi Devang,

> +llvm-gcc is a C, C++, Objective-C and Objective-C++ compiler.

You forgot Ada and Fortran :)

> llvm-gcc uses gcc front-end and gcc's command line interface. Consult cc(1) man page for command line options supported by llvm-gcc.

Consult cc(1) man page -> Consult the cc(1) man page

> +Enables Link Time Optimization. Link Time Optimization is performed by ld(1) transparently using LLVM optimizer. The object file generated contains intermediate LLVM bitcode instead of Mach-O objects.

using LLVM optimizer -> using the LLVM optimizer
Note that this is only correct on Darwin.
Mach-O is also darwin specific.

Ciao,

Duncan.


From baldrick at free.fr  Fri Dec 12 02:05:46 2008
From: baldrick at free.fr (Duncan Sands)
Date: Fri, 12 Dec 2008 08:05:46 -0000
Subject: [llvm-commits] [llvm] r60944 -
	/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
Message-ID: <200812120805.mBC85kOP026406@zion.cs.uiuc.edu>

Author: baldrick
Date: Fri Dec 12 02:05:40 2008
New Revision: 60944

URL: http://llvm.org/viewvc/llvm-project?rev=60944&view=rev
Log:
Don't make use of an illegal type (i64) when
lowering f64 function arguments.

Modified:
    llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp

Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=60944&r1=60943&r2=60944&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Fri Dec 12 02:05:40 2008
@@ -347,12 +347,37 @@
         RegsToPass.push_back(std::make_pair(ArgRegs[RegsToPass.size()], Val));
       }
       break;
-    case MVT::f64:
+    case MVT::f64: {
       ObjSize = 8;
-      // Otherwise, convert this to a FP value in int regs.
-      Val = DAG.getNode(ISD::BIT_CONVERT, MVT::i64, Val);
-      // FALL THROUGH
-    case MVT::i64:
+      if (RegsToPass.size() >= 6) {
+        ValToStore = Val;    // Whole thing is passed in memory.
+        break;
+      }
+
+      // Break into top and bottom parts by storing to the stack and loading
+      // out the parts as integers.  Top part goes in a reg.
+      SDValue StackPtr = DAG.CreateStackTemporary(MVT::f64, MVT::i32);
+      SDValue Store = DAG.getStore(DAG.getEntryNode(), Val, StackPtr, NULL, 0);
+      // Sparc is big-endian, so the high part comes first.
+      SDValue Hi = DAG.getLoad(MVT::i32, Store, StackPtr, NULL, 0, 0);
+      // Increment the pointer to the other half.
+      StackPtr = DAG.getNode(ISD::ADD, StackPtr.getValueType(), StackPtr,
+                             DAG.getIntPtrConstant(4));
+      // Load the low part.
+      SDValue Lo = DAG.getLoad(MVT::i32, Store, StackPtr, NULL, 0, 0);
+
+      RegsToPass.push_back(std::make_pair(ArgRegs[RegsToPass.size()], Hi));
+
+      if (RegsToPass.size() >= 6) {
+        ValToStore = Lo;
+        ArgOffset += 4;
+        ObjSize = 4;
+      } else {
+        RegsToPass.push_back(std::make_pair(ArgRegs[RegsToPass.size()], Lo));
+      }
+      break;
+    }
+    case MVT::i64: {
       ObjSize = 8;
       if (RegsToPass.size() >= 6) {
         ValToStore = Val;    // Whole thing is passed in memory.
@@ -375,6 +400,7 @@
       }
       break;
     }
+    }
 
     if (ValToStore.getNode()) {
       SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);




From edwintorok at gmail.com  Fri Dec 12 02:07:18 2008
From: edwintorok at gmail.com (=?ISO-8859-1?Q?T=F6r=F6k_Edwin?=)
Date: Fri, 12 Dec 2008 10:07:18 +0200
Subject: [llvm-commits] [PATCH] Debug info utilities and printer pass
In-Reply-To: <4940FF97.30204@gmail.com>
References: <4940122B.5040005@gmail.com>
	
	
	<4940FF97.30204@gmail.com>
Message-ID: <49421BB6.7040207@gmail.com>

On 2008-12-11 13:55, T?r?k Edwin wrote:
> On 2008-12-11 04:13, Chris Lattner wrote:
>   
>> On Dec 10, 2008, at 1:13 PM, Devang Patel wrote:
>>     
>>>> 02-intrin.patch:
>>>> Introduce DbgFuncStart::getDisplayName() (which refers to unmangled C
>>>> ++
>>>> name!), and DbgDeclareInst::getVariableName()
>>>> Introduce include/llvm/Support/DebugInfo.h:
>>>>         
>>> We already have include/llvm/Analysis/DebugInfo.h, so I suggest that
>>> you use another name for this new header.
>>>       
>> More strongly, why do we need this new code when we have
>> llvm/Analysis/Debuginfo.h?  What does this do that
>> llvm/Analysis/DebugInfo doesn't, or shouldn't do?
>>     
>
> llvm/Analysis/DebugInfo.h doesn't search for the debug info, you have to
> give it that as a parameter to the constructor.
> My functions search for the llvm.dbg.stoppoint given an
> Instruction*/BasicBlock*, and for llvm.dbg.declare given a Value*.
>   
>> I'd really rather make Analysis/DebugInfo.h better rather than
>> introduce a new parallel way to analyze debug info.
>>     
>
> I moved the functions to include/llvm/Analysis/DebugInfo.h, see
> 02-dbginfo-utils.patch.
>
> Attachments:
> 01-dbginfo.patch:
> -  fix getFieldAs(), it was always looking at field 6, instead of Elt!
> -  DIVariable.getType() was leading to linker error: undefined reference
> to DIType::DIType(GlobalVariable *GV), define the constructor
>
> 02-dbginfo-utils.patch:
> - in my previous patch this was include/llvm/Support/DebugInfo.h, it
> introduces:
> - findStopPoint
> - findBBStopPoint
> - findDbgDeclare
>
> 03-pass.patch:
> - the -print-dbginfo pass from my previous email, now it uses
> llvm/Analysis/DebugInfo.h
> - caveats: derived types are printed as "", no testcase (should I add one?)
>   

Are these OK to commit?

Best regards,
--Edwin


From baldrick at free.fr  Fri Dec 12 02:13:38 2008
From: baldrick at free.fr (Duncan Sands)
Date: Fri, 12 Dec 2008 08:13:38 -0000
Subject: [llvm-commits] [llvm] r60945 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Message-ID: <200812120813.mBC8DcZt026660@zion.cs.uiuc.edu>

Author: baldrick
Date: Fri Dec 12 02:13:38 2008
New Revision: 60945

URL: http://llvm.org/viewvc/llvm-project?rev=60945&view=rev
Log:
When using a 4 byte jump table on a 64 bit machine,
do an extending load of the 4 bytes rather than a
potentially illegal (type) i32 load followed by a
sign extend.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=60945&r1=60944&r2=60945&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Dec 12 02:13:38 2008
@@ -1951,23 +1951,15 @@
       unsigned EntrySize = MF.getJumpTableInfo()->getEntrySize();
       Index= DAG.getNode(ISD::MUL, PTy, Index, DAG.getConstant(EntrySize, PTy));
       SDValue Addr = DAG.getNode(ISD::ADD, PTy, Index, Table);
-      
-      SDValue LD;
-      switch (EntrySize) {
-      default: assert(0 && "Size of jump table not supported yet."); break;
-      case 4: LD = DAG.getLoad(MVT::i32, Chain, Addr,
-                               PseudoSourceValue::getJumpTable(), 0); break;
-      case 8: LD = DAG.getLoad(MVT::i64, Chain, Addr,
-                               PseudoSourceValue::getJumpTable(), 0); break;
-      }
 
+      MVT MemVT = MVT::getIntegerVT(EntrySize * 8);
+      SDValue LD = DAG.getExtLoad(ISD::SEXTLOAD, PTy, Chain, Addr,
+                                  PseudoSourceValue::getJumpTable(), 0, MemVT);
       Addr = LD;
       if (TLI.getTargetMachine().getRelocationModel() == Reloc::PIC_) {
         // For PIC, the sequence is:
         // BRIND(load(Jumptable + index) + RelocBase)
         // RelocBase can be JumpTable, GOT or some sort of global base.
-        if (PTy != MVT::i32)
-          Addr = DAG.getNode(ISD::SIGN_EXTEND, PTy, Addr);
         Addr = DAG.getNode(ISD::ADD, PTy, Addr,
                            TLI.getPICJumpTableRelocBase(Table, DAG));
       }




From baldrick at free.fr  Fri Dec 12 02:14:14 2008
From: baldrick at free.fr (Duncan Sands)
Date: Fri, 12 Dec 2008 09:14:14 +0100
Subject: [llvm-commits] [llvm] r60944 -
	/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
In-Reply-To: <200812120805.mBC85kOP026406@zion.cs.uiuc.edu>
References: <200812120805.mBC85kOP026406@zion.cs.uiuc.edu>
Message-ID: <200812120914.15023.baldrick@free.fr>

> Don't make use of an illegal type (i64) when
> lowering f64 function arguments.

I forgot to say that this does not change the
generated code.

Ciao,

Duncan.


From isanbard at gmail.com  Fri Dec 12 02:18:12 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Fri, 12 Dec 2008 00:18:12 -0800
Subject: [llvm-commits] [llvm] r60915 - in /llvm/trunk/lib:
	CodeGen/SelectionDAG/DAGCombiner.cpp
	Target/X86/X86ISelLowering.cpp Target/X86/X86ISelLowering.h
	Target/X86/X86Instr64bit.td Target/X86/X86InstrInfo.td
In-Reply-To: <4FEBE9BA-1146-4754-9A4F-E3BBAF635CFF@apple.com>
References: <200812120056.mBC0ucER013691@zion.cs.uiuc.edu>
	<4FEBE9BA-1146-4754-9A4F-E3BBAF635CFF@apple.com>
Message-ID: <7BA3827D-E711-438D-9DDD-F5FB5C1D836D@gmail.com>

On Dec 11, 2008, at 11:05 PM, Evan Cheng wrote:

> Do we really need different instructions? How us ADD32rr different
> from ADDvfo32er? Both implicitly define EFLAGS.
>
ADDOvf32rr matches on X86ISD::ADD.

-bw



From monping at apple.com  Fri Dec 12 04:21:56 2008
From: monping at apple.com (Mon Ping Wang)
Date: Fri, 12 Dec 2008 02:21:56 -0800
Subject: [llvm-commits] vsetcc and mov gs seg patch
Message-ID: 

Hi,

This is a small patch that allows legalize expansion of VSetCC to some  
legal code and another patch to add support of mov GS Seg to a register.

-- Mon Ping

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From espindola at google.com  Fri Dec 12 09:53:10 2008
From: espindola at google.com (Rafael Espindola)
Date: Fri, 12 Dec 2008 15:53:10 +0000
Subject: [llvm-commits] [llvm] r60881 - in /llvm/trunk:
	lib/Analysis/ScalarEvolution.cpp
	test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll
	test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll
In-Reply-To: <200812111740.mBBHeJW0030720@zion.cs.uiuc.edu>
References: <200812111740.mBBHeJW0030720@zion.cs.uiuc.edu>
Message-ID: <38a0d8450812120753u42717beaod1e16741411c68f5@mail.gmail.com>

2008/12/11 Nick Lewycky :
> Author: nicholas
> Date: Thu Dec 11 11:40:14 2008
> New Revision: 60881
>
> URL: http://llvm.org/viewvc/llvm-project?rev=60881&view=rev
> Log:
> Sneaky, sneaky: move the -1 to the outside of the SMax. Reinstate the
> optimization of SGE/SLE with unit stride, now that it works properly.
>
> Added:
>    llvm/trunk/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll
> Modified:
>    llvm/trunk/lib/Analysis/ScalarEvolution.cpp
>    llvm/trunk/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll
>
> Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=60881&r1=60880&r2=60881&view=diff

This broke llvm-gcc bootstrap on linux x86-64. The build halts on

echo | /usr/local/espindola/llvm/llvm-gcc-build/./gcc/xgcc
-B/usr/local/espindola/llvm/llvm-gcc-build/./gcc/
-B/usr/local/x86_64-unknown-linux-gnu/bin/
-B/usr/local/x86_64-unknown-linux-gnu/lib/ -isystem
/usr/local/x86_64-unknown-linux-gnu/include -isystem
/usr/local/x86_64-unknown-linux-gnu/sys-include -E -dM - | \
	  sed -n -e 's/^#define \([^_][a-zA-Z0-9_]*\).*/\1/p' \
		 -e 's/^#define \(_[^_A-Z][a-zA-Z0-9_]*\).*/\1/p' | \
	  sort -u > tmp-macro_list

With cc1 using 100% cpu.


Cheers,
-- 
Rafael Avila de Espindola

Google | Gordon House | Barrow Street | Dublin 4 | Ireland
Registered in Dublin, Ireland | Registration Number: 368047


From echeng at apple.com  Fri Dec 12 10:41:44 2008
From: echeng at apple.com (Evan Cheng)
Date: Fri, 12 Dec 2008 08:41:44 -0800
Subject: [llvm-commits] [llvm] r60915 - in /llvm/trunk/lib:
	CodeGen/SelectionDAG/DAGCombiner.cpp	Target/X86/X86ISelLowering.cpp
	Target/X86/X86ISelLowering.h	Target/X86/X86Instr64bit.td
	Target/X86/X86InstrInfo.td
In-Reply-To: <7BA3827D-E711-438D-9DDD-F5FB5C1D836D@gmail.com>
References: <200812120056.mBC0ucER013691@zion.cs.uiuc.edu>
	<4FEBE9BA-1146-4754-9A4F-E3BBAF635CFF@apple.com>
	<7BA3827D-E711-438D-9DDD-F5FB5C1D836D@gmail.com>
Message-ID: <0936B7B1-D5C9-4F17-BA61-72D371910C96@apple.com>

That's not what I asked. If you look at X86GenInstrInfo.inc, you will  
see:

   { 41, 3,      1,      0,      "ADD32rr", 0| 
(1< On Dec 11, 2008, at 11:05 PM, Evan Cheng wrote:
>
>> Do we really need different instructions? How us ADD32rr different
>> from ADDvfo32er? Both implicitly define EFLAGS.
>>
> ADDOvf32rr matches on X86ISD::ADD.
>
> -bw
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From nicholas at mxc.ca  Fri Dec 12 11:09:09 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Fri, 12 Dec 2008 17:09:09 -0000
Subject: [llvm-commits] [llvm] r60951 - in /llvm/trunk:
 lib/Analysis/ScalarEvolution.cpp
 test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll
 test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll
Message-ID: <200812121709.mBCH99Nl022224@zion.cs.uiuc.edu>

Author: nicholas
Date: Fri Dec 12 11:09:07 2008
New Revision: 60951

URL: http://llvm.org/viewvc/llvm-project?rev=60951&view=rev
Log:
Revert my re-instated reverted commit, fixes the bootstrap build on x86-64 linux.

Modified:
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp
    llvm/trunk/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll
    llvm/trunk/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=60951&r1=60950&r2=60951&view=diff

==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Fri Dec 12 11:09:07 2008
@@ -2924,12 +2924,8 @@
   if (!R)
     return true;
 
-  if (isSigned) {
-    if (SC->getValue()->isOne())
-      return R->getValue()->isMaxValue(true);
-
+  if (isSigned)
     return true;  // XXX: because we don't have an sdiv scev.
-  }
 
   // If negative, it wraps around every iteration, but we don't care about that.
   APInt S = SC->getValue()->getValue().abs();
@@ -2975,6 +2971,14 @@
     // run (m-n)/s times.
     SCEVHandle End = RHS;
 
+    if (!executesAtLeastOnce(L, isSigned, trueWhenEqual,
+                             SE.getMinusSCEV(Start, One), RHS)) {
+      // If not, we get the value of the LHS in the first iteration in which
+      // the above condition doesn't hold.  This equals to max(m,n).
+      End = isSigned ? SE.getSMaxExpr(RHS, Start)
+                     : SE.getUMaxExpr(RHS, Start);
+    }
+
     // If the expression is less-than-or-equal to, we need to extend the
     // loop by one iteration.
     //
@@ -2983,16 +2987,12 @@
     // division would equal one, but the loop runs twice putting the
     // induction variable at 12.
 
-    if (trueWhenEqual)
-      End = SE.getAddExpr(End, One);
-
-    if (!executesAtLeastOnce(L, isSigned, trueWhenEqual,
-                             SE.getMinusSCEV(Start, One), RHS)) {
-      // If not, we get the value of the LHS in the first iteration in which
-      // the above condition doesn't hold.  This equals to max(m,n).
-      End = isSigned ? SE.getSMaxExpr(End, Start)
-                     : SE.getUMaxExpr(End, Start);
-    }
+    if (!trueWhenEqual)
+      // (Stride - 1) is correct only because we know it's unsigned.
+      // What we really want is to decrease the magnitude of Stride by one.
+      Start = SE.getMinusSCEV(Start, SE.getMinusSCEV(Stride, One));
+    else
+      Start = SE.getMinusSCEV(Start, Stride);
 
     // Finally, we subtract these two values to get the number of times the
     // backedge is executed: max(m,n)-n.

Modified: llvm/trunk/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll?rev=60951&r1=60950&r2=60951&view=diff

==============================================================================
--- llvm/trunk/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll (original)
+++ llvm/trunk/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll Fri Dec 12 11:09:07 2008
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | opt -analyze -scalar-evolution | grep {255 iterations}
+; XFAIL: *
 
 define i32 @foo(i32 %x, i32 %y, i32* %lam, i32* %alp) nounwind {
 bb1.thread:

Modified: llvm/trunk/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll?rev=60951&r1=60950&r2=60951&view=diff

==============================================================================
--- llvm/trunk/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll (original)
+++ llvm/trunk/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll Fri Dec 12 11:09:07 2008
@@ -1,4 +1,5 @@
 ; RUN: llvm-as < %s | opt -analyze -scalar-evolution | grep {0 smax}
+; XFAIL: *
 
 define i32 @f(i32 %c.idx.val) {
 




From isanbard at gmail.com  Fri Dec 12 11:14:05 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Fri, 12 Dec 2008 09:14:05 -0800
Subject: [llvm-commits] [llvm] r60915 - in /llvm/trunk/lib:
	CodeGen/SelectionDAG/DAGCombiner.cpp
	Target/X86/X86ISelLowering.cpp Target/X86/X86ISelLowering.h
	Target/X86/X86Instr64bit.td Target/X86/X86InstrInfo.td
In-Reply-To: <0936B7B1-D5C9-4F17-BA61-72D371910C96@apple.com>
References: <200812120056.mBC0ucER013691@zion.cs.uiuc.edu>
	<4FEBE9BA-1146-4754-9A4F-E3BBAF635CFF@apple.com>
	<7BA3827D-E711-438D-9DDD-F5FB5C1D836D@gmail.com>
	<0936B7B1-D5C9-4F17-BA61-72D371910C96@apple.com>
Message-ID: <16e5fdf90812120914g5a230cffved0af3a36d78b8b5@mail.gmail.com>

On Fri, Dec 12, 2008 at 8:41 AM, Evan Cheng  wrote:
> That's not what I asked. If you look at X86GenInstrInfo.inc, you will
> see:
>
>   { 41, 3,      1,      0,      "ADD32rr", 0|
> (1< ImplicitList1, Barriers1, OperandInfo9 },  // Inst #41 = ADD32rr
>   { 67, 3,      1,      0,      "ADDOvf32rr", 0|
> (1< ImplicitList1, Barriers1, OperandInfo9 },  // Inst #67 = ADDOvf32rr
>
> Apart from opcode number, these two instructions are identical. There
> is no reason to have a separate ADDOvf32rr instruction. You can have
> multiple patterns matching the same instruction.
>
Okay.

-bw


From echeng at apple.com  Fri Dec 12 11:16:14 2008
From: echeng at apple.com (Evan Cheng)
Date: Fri, 12 Dec 2008 09:16:14 -0800
Subject: [llvm-commits] [llvm] r60881 - in /llvm/trunk:
	lib/Analysis/ScalarEvolution.cpp
	test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll
	test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll
In-Reply-To: <38a0d8450812120753u42717beaod1e16741411c68f5@mail.gmail.com>
References: <200812111740.mBBHeJW0030720@zion.cs.uiuc.edu>
	<38a0d8450812120753u42717beaod1e16741411c68f5@mail.gmail.com>
Message-ID: <4DBB4A0F-89C5-4667-9364-293DE3760612@apple.com>

llvm-gcc build on Mac OS X / x86 is also broken.

Evan

On Dec 12, 2008, at 7:53 AM, Rafael Espindola wrote:

> 2008/12/11 Nick Lewycky :
>> Author: nicholas
>> Date: Thu Dec 11 11:40:14 2008
>> New Revision: 60881
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=60881&view=rev
>> Log:
>> Sneaky, sneaky: move the -1 to the outside of the SMax. Reinstate the
>> optimization of SGE/SLE with unit stride, now that it works properly.
>>
>> Added:
>>   llvm/trunk/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll
>> Modified:
>>   llvm/trunk/lib/Analysis/ScalarEvolution.cpp
>>   llvm/trunk/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll
>>
>> Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=60881&r1=60880&r2=60881&view=diff
>
> This broke llvm-gcc bootstrap on linux x86-64. The build halts on
>
> echo | /usr/local/espindola/llvm/llvm-gcc-build/./gcc/xgcc
> -B/usr/local/espindola/llvm/llvm-gcc-build/./gcc/
> -B/usr/local/x86_64-unknown-linux-gnu/bin/
> -B/usr/local/x86_64-unknown-linux-gnu/lib/ -isystem
> /usr/local/x86_64-unknown-linux-gnu/include -isystem
> /usr/local/x86_64-unknown-linux-gnu/sys-include -E -dM - | \
> 	  sed -n -e 's/^#define \([^_][a-zA-Z0-9_]*\).*/\1/p' \
> 		 -e 's/^#define \(_[^_A-Z][a-zA-Z0-9_]*\).*/\1/p' | \
> 	  sort -u > tmp-macro_list
>
> With cc1 using 100% cpu.
>
>
> Cheers,
> -- 
> Rafael Avila de Espindola
>
> Google | Gordon House | Barrow Street | Dublin 4 | Ireland
> Registered in Dublin, Ireland | Registration Number: 368047
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From nicholas at mxc.ca  Fri Dec 12 11:19:10 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Fri, 12 Dec 2008 09:19:10 -0800
Subject: [llvm-commits] [llvm] r60881 - in
 /llvm/trunk:	lib/Analysis/ScalarEvolution.cpp
 test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll	test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll
In-Reply-To: <4DBB4A0F-89C5-4667-9364-293DE3760612@apple.com>
References: <200812111740.mBBHeJW0030720@zion.cs.uiuc.edu>	<38a0d8450812120753u42717beaod1e16741411c68f5@mail.gmail.com>
	<4DBB4A0F-89C5-4667-9364-293DE3760612@apple.com>
Message-ID: <49429D0E.9050309@mxc.ca>

Evan Cheng wrote:
> llvm-gcc build on Mac OS X / x86 is also broken.

I just reverted the change. Update and it should be working now.

Sorry for the breakage...

Nick

> Evan
> 
> On Dec 12, 2008, at 7:53 AM, Rafael Espindola wrote:
> 
>> 2008/12/11 Nick Lewycky :
>>> Author: nicholas
>>> Date: Thu Dec 11 11:40:14 2008
>>> New Revision: 60881
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=60881&view=rev
>>> Log:
>>> Sneaky, sneaky: move the -1 to the outside of the SMax. Reinstate the
>>> optimization of SGE/SLE with unit stride, now that it works properly.
>>>
>>> Added:
>>>   llvm/trunk/test/Analysis/ScalarEvolution/2008-12-11-SMaxOverflow.ll
>>> Modified:
>>>   llvm/trunk/lib/Analysis/ScalarEvolution.cpp
>>>   llvm/trunk/test/Analysis/ScalarEvolution/2008-12-08-FiniteSGE.ll
>>>
>>> Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=60881&r1=60880&r2=60881&view=diff
>> This broke llvm-gcc bootstrap on linux x86-64. The build halts on
>>
>> echo | /usr/local/espindola/llvm/llvm-gcc-build/./gcc/xgcc
>> -B/usr/local/espindola/llvm/llvm-gcc-build/./gcc/
>> -B/usr/local/x86_64-unknown-linux-gnu/bin/
>> -B/usr/local/x86_64-unknown-linux-gnu/lib/ -isystem
>> /usr/local/x86_64-unknown-linux-gnu/include -isystem
>> /usr/local/x86_64-unknown-linux-gnu/sys-include -E -dM - | \
>> 	  sed -n -e 's/^#define \([^_][a-zA-Z0-9_]*\).*/\1/p' \
>> 		 -e 's/^#define \(_[^_A-Z][a-zA-Z0-9_]*\).*/\1/p' | \
>> 	  sort -u > tmp-macro_list
>>
>> With cc1 using 100% cpu.
>>
>>
>> Cheers,
>> -- 
>> Rafael Avila de Espindola
>>
>> Google | Gordon House | Barrow Street | Dublin 4 | Ireland
>> Registered in Dublin, Ireland | Registration Number: 368047
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 



From grosbach at apple.com  Fri Dec 12 11:21:59 2008
From: grosbach at apple.com (Jim Grosbach)
Date: Fri, 12 Dec 2008 17:21:59 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r60952 -
	/llvm-gcc-4.2/trunk/gcc/config/arm/arm.md
Message-ID: <200812121721.mBCHLx5b022689@zion.cs.uiuc.edu>

Author: grosbach
Date: Fri Dec 12 11:21:59 2008
New Revision: 60952

URL: http://llvm.org/viewvc/llvm-project?rev=60952&view=rev
Log:
update errant comment

Modified:
    llvm-gcc-4.2/trunk/gcc/config/arm/arm.md

Modified: llvm-gcc-4.2/trunk/gcc/config/arm/arm.md
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/arm/arm.md?rev=60952&r1=60951&r2=60952&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/config/arm/arm.md (original)
+++ llvm-gcc-4.2/trunk/gcc/config/arm/arm.md Fri Dec 12 11:21:59 2008
@@ -4813,7 +4813,7 @@
   resume_reg = force_reg (Pmode, resume_addr);
   resume_reg = gen_rtx_IOR (Pmode, resume_reg, GEN_INT (1));
   emit_move_insn (resume_addr, resume_reg);
-  ;; APPLE LOCAL 6387939
+  /* APPLE LOCAL 6387939 */
   DONE;
 })
 




From evan.cheng at apple.com  Fri Dec 12 11:49:49 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 12 Dec 2008 09:49:49 -0800
Subject: [llvm-commits] [llvm] r60915 - in /llvm/trunk/lib:
	CodeGen/SelectionDAG/DAGCombiner.cpp	Target/X86/X86ISelLowering.cpp
	Target/X86/X86ISelLowering.h	Target/X86/X86Instr64bit.td
	Target/X86/X86InstrInfo.td
In-Reply-To: <16e5fdf90812120914g5a230cffved0af3a36d78b8b5@mail.gmail.com>
References: <200812120056.mBC0ucER013691@zion.cs.uiuc.edu>
	<4FEBE9BA-1146-4754-9A4F-E3BBAF635CFF@apple.com>
	<7BA3827D-E711-438D-9DDD-F5FB5C1D836D@gmail.com>
	<0936B7B1-D5C9-4F17-BA61-72D371910C96@apple.com>
	<16e5fdf90812120914g5a230cffved0af3a36d78b8b5@mail.gmail.com>
Message-ID: 


On Dec 12, 2008, at 9:14 AM, Bill Wendling wrote:

> On Fri, Dec 12, 2008 at 8:41 AM, Evan Cheng  wrote:
>> That's not what I asked. If you look at X86GenInstrInfo.inc, you will
>> see:
>>
>>  { 41, 3,      1,      0,      "ADD32rr", 0|
>> (1<> ImplicitList1, Barriers1, OperandInfo9 },  // Inst #41 = ADD32rr
>>  { 67, 3,      1,      0,      "ADDOvf32rr", 0|
>> (1<> ImplicitList1, Barriers1, OperandInfo9 },  // Inst #67 = ADDOvf32rr
>>
>> Apart from opcode number, these two instructions are identical. There
>> is no reason to have a separate ADDOvf32rr instruction. You can have
>> multiple patterns matching the same instruction.
>>
> Okay.

Thanks. Just to clarify, the correct thing to do is to rename  
ADDOvf32rr to ADD32rr and delete the old ADD32rr. That is, we always  
select to an X86::ADD* instruction that produces two values, with the  
second one being EFLAGS. In the *normal* case, the scheduler will see  
EFLAGS is not used and it will mark it dead.

But make sure you try it on a couple of these instructions first  
before you convert everything over. Just in case I am full of it. :-)

Evan

>
>
> -bw
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From evan.cheng at apple.com  Fri Dec 12 11:53:36 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 12 Dec 2008 09:53:36 -0800
Subject: [llvm-commits] Patch for add/sub expansion without addc in
	LegalizeDAG.cpp
In-Reply-To: 
References: 
Message-ID: <47B4DE07-055B-42A4-9575-7AD2826F30DC@apple.com>


On Dec 9, 2008, at 1:27 PM, Daniel M Gessel wrote:

> We're not yet using Legalize Types in our project, and, with help from
> Mon Ping, I found what looks like a bug in the add/sub expansion in
> LegalizeDAG.cpp that's still in the SVN repository. Mon Ping checked
> how it's done in  LegalizeIntegerTypes.cpp and this updates
> LegalizeDAG.cpp to reflect that.
>
> IIUC, this code will soon be fully deprecated but I thought I'd post
> the patch anyway.

Thanks. The patch is generally correct but

SDVTList VTList = DAG.getVTList(LHSL.getValueType(), MVT::Flag);

should be moved into

     if(hasCarry) {
     }

Do you have commit privilege?

Thanks,

Evan

>
>
> Dan
>
>
>
> Index: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
> ===================================================================
> --- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	(revision 60773)
> +++ lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	(working copy)
> @@ -6865,8 +6865,8 @@
>        break;
>      } else {
>        if (Node->getOpcode() == ISD::ADD) {
> -        Lo = DAG.getNode(ISD::ADD, VTList, LoOps, 2);
> -        Hi = DAG.getNode(ISD::ADD, VTList, HiOps, 2);
> +        Lo = DAG.getNode(ISD::ADD, NVT, LoOps, 2);
> +        Hi = DAG.getNode(ISD::ADD, NVT, HiOps, 2);
>          SDValue Cmp1 = DAG.getSetCC(TLI.getSetCCResultType(Lo),
>                                      Lo, LoOps[0], ISD::SETULT);
>          SDValue Carry1 = DAG.getNode(ISD::SELECT, NVT, Cmp1,
> @@ -6879,8 +6879,8 @@
>                                      Carry1);
>          Hi = DAG.getNode(ISD::ADD, NVT, Hi, Carry2);
>        } else {
> -        Lo = DAG.getNode(ISD::SUB, VTList, LoOps, 2);
> -        Hi = DAG.getNode(ISD::SUB, VTList, HiOps, 2);
> +        Lo = DAG.getNode(ISD::SUB, NVT, LoOps, 2);
> +        Hi = DAG.getNode(ISD::SUB, NVT, HiOps, 2);
>          SDValue Cmp = DAG.getSetCC(NVT, LoOps[0], LoOps[1],
> ISD::SETULT);
>          SDValue Borrow = DAG.getNode(ISD::SELECT, NVT, Cmp,
>                                       DAG.getConstant(1, NVT),
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From dpatel at apple.com  Fri Dec 12 11:55:07 2008
From: dpatel at apple.com (Devang Patel)
Date: Fri, 12 Dec 2008 17:55:07 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r60953 -
	/llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1
Message-ID: <200812121755.mBCHt76x024051@zion.cs.uiuc.edu>

Author: dpatel
Date: Fri Dec 12 11:55:06 2008
New Revision: 60953

URL: http://llvm.org/viewvc/llvm-project?rev=60953&view=rev
Log:
Fix grammar.

Modified:
    llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1

Modified: llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1?rev=60953&r1=60952&r2=60953&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1 (original)
+++ llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1 Fri Dec 12 11:55:06 2008
@@ -12,11 +12,11 @@
           [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...]
           [\fB\-o\fR \fIoutfile\fR] \fIinfile\fR...
 .Sh DESCRIPTION
-llvm-gcc is a C, C++, Objective-C and Objective-C++ compiler. llvm-gcc uses gcc front-end and gcc's command line interface. Consult cc(1) man page for command line options supported by llvm-gcc. Only selected LLVM specific options are listed here.
+llvm-gcc is a C, C++, Objective-C and Objective-C++ compiler. llvm-gcc uses gcc front-end and gcc's command line interface. Consult the cc(1) man page for command line options supported by llvm-gcc. Only selected LLVM specific options are listed here.
 .Pp
 .Bl -tag -width -indent
 .It Fl flto
-Enables Link Time Optimization. Link Time Optimization is performed by ld(1) transparently using LLVM optimizer. The object file generated contains intermediate LLVM bitcode instead of Mach-O objects.
+Enables Link Time Optimization. Link Time Optimization is performed by ld(1) transparently using the LLVM optimizer. The object file generated contains intermediate LLVM bitcode instead of Mach-O objects.
 .It Fl O4
 Enables Link Time Optimization in addition to all optimizations enabled at -O3.
 .El




From evan.cheng at apple.com  Fri Dec 12 12:01:55 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 12 Dec 2008 10:01:55 -0800
Subject: [llvm-commits] vsetcc and mov gs seg patch
In-Reply-To: 
References: 
Message-ID: <6643B90E-8BFE-4D8A-9D66-2F329FFE73CB@apple.com>


On Dec 12, 2008, at 2:21 AM, Mon Ping Wang wrote:

> Hi,
>
> This is a small patch that allows legalize expansion of VSetCC to  
> some legal code and another patch to add support of mov GS Seg to a  
> register.

Ok. But where is the code that produce a X86ISD::MOV32GS node?

Evan

>
>
> -- Mon Ping
>
> < 
> vsetcc 
> .patch>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From dpatel at apple.com  Fri Dec 12 12:16:25 2008
From: dpatel at apple.com (Devang Patel)
Date: Fri, 12 Dec 2008 10:16:25 -0800
Subject: [llvm-commits] [llvm-gcc-4.2] r60913 -
	/llvm-gcc-4.2/trunk/gcc/doc/llvm-gcc.1
In-Reply-To: <200812120854.44474.baldrick@free.fr>
References: <200812120020.mBC0Kn57012668@zion.cs.uiuc.edu>
	<200812120854.44474.baldrick@free.fr>
Message-ID: <433D317D-A850-4EFE-847B-29B4AC3A510E@apple.com>


On Dec 11, 2008, at 11:54 PM, Duncan Sands wrote:

> Hi Devang,
>
>> +llvm-gcc is a C, C++, Objective-C and Objective-C++ compiler.
>
> You forgot Ada and Fortran :)
>
>> llvm-gcc uses gcc front-end and gcc's command line interface.  
>> Consult cc(1) man page for command line options supported by llvm- 
>> gcc.
>
> Consult cc(1) man page -> Consult the cc(1) man page

Fixed.

>
>
>> +Enables Link Time Optimization. Link Time Optimization is  
>> performed by ld(1) transparently using LLVM optimizer. The object  
>> file generated contains intermediate LLVM bitcode instead of Mach-O  
>> objects.
>
> using LLVM optimizer -> using the LLVM optimizer

Fixed.

>
> Note that this is only correct on Darwin.
> Mach-O is also darwin specific.

Note, this tiny man page is only used by build script used on Darwin.  
Traditional ./configure && make && make install will use standard gcc  
man page, which needs title change other modifications for llvm  
specific behaviors.


-
Devang





From evan.cheng at apple.com  Fri Dec 12 12:49:09 2008
From: evan.cheng at apple.com (Evan Cheng)
Date: Fri, 12 Dec 2008 18:49:09 -0000
Subject: [llvm-commits] [llvm] r60958 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Message-ID: <200812121849.mBCIn9RN025933@zion.cs.uiuc.edu>

Author: evancheng
Date: Fri Dec 12 12:49:09 2008
New Revision: 60958

URL: http://llvm.org/viewvc/llvm-project?rev=60958&view=rev
Log:
Fix add/sub expansion: don't create ADD / SUB with two results (seems like everyone is doing this these days :-). Patch by Daniel M Gessel!

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=60958&r1=60957&r2=60958&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Dec 12 12:49:09 2008
@@ -6862,7 +6862,6 @@
     SDValue LHSL, LHSH, RHSL, RHSH;
     ExpandOp(Node->getOperand(0), LHSL, LHSH);
     ExpandOp(Node->getOperand(1), RHSL, RHSH);
-    SDVTList VTList = DAG.getVTList(LHSL.getValueType(), MVT::Flag);
     SDValue LoOps[2], HiOps[3];
     LoOps[0] = LHSL;
     LoOps[1] = RHSL;
@@ -6881,6 +6880,7 @@
     }
 
     if(hasCarry) {
+      SDVTList VTList = DAG.getVTList(LHSL.getValueType(), MVT::Flag);
       if (Node->getOpcode() == ISD::ADD) {
         Lo = DAG.getNode(ISD::ADDC, VTList, LoOps, 2);
         HiOps[2] = Lo.getValue(1);
@@ -6893,8 +6893,8 @@
       break;
     } else {
       if (Node->getOpcode() == ISD::ADD) {
-        Lo = DAG.getNode(ISD::ADD, VTList, LoOps, 2);
-        Hi = DAG.getNode(ISD::ADD, VTList, HiOps, 2);
+        Lo = DAG.getNode(ISD::ADD, NVT, LoOps, 2);
+        Hi = DAG.getNode(ISD::ADD, NVT, HiOps, 2);
         SDValue Cmp1 = DAG.getSetCC(TLI.getSetCCResultType(Lo),
                                     Lo, LoOps[0], ISD::SETULT);
         SDValue Carry1 = DAG.getNode(ISD::SELECT, NVT, Cmp1,
@@ -6907,8 +6907,8 @@
                                     Carry1);
         Hi = DAG.getNode(ISD::ADD, NVT, Hi, Carry2);
       } else {
-        Lo = DAG.getNode(ISD::SUB, VTList, LoOps, 2);
-        Hi = DAG.getNode(ISD::SUB, VTList, HiOps, 2);
+        Lo = DAG.getNode(ISD::SUB, NVT, LoOps, 2);
+        Hi = DAG.getNode(ISD::SUB, NVT, HiOps, 2);
         SDValue Cmp = DAG.getSetCC(NVT, LoOps[0], LoOps[1], ISD::SETULT);
         SDValue Borrow = DAG.getNode(ISD::SELECT, NVT, Cmp,
                                      DAG.getConstant(1, NVT), 




From dpatel at apple.com  Fri Dec 12 13:08:09 2008
From: dpatel at apple.com (Devang Patel)
Date: Fri, 12 Dec 2008 19:08:09 -0000
Subject: [llvm-commits] [llvm] r60959 - in /llvm/trunk/test/FrontendC++:
 2006-09-27-Debug-Protection.cpp 2006-11-30-Pubnames.cpp
Message-ID: <200812121908.mBCJ89Tv026653@zion.cs.uiuc.edu>

Author: dpatel
Date: Fri Dec 12 13:08:08 2008
New Revision: 60959

URL: http://llvm.org/viewvc/llvm-project?rev=60959&view=rev
Log:
XFAIL these tests for now.

Modified:
    llvm/trunk/test/FrontendC++/2006-09-27-Debug-Protection.cpp
    llvm/trunk/test/FrontendC++/2006-11-30-Pubnames.cpp

Modified: llvm/trunk/test/FrontendC++/2006-09-27-Debug-Protection.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2006-09-27-Debug-Protection.cpp?rev=60959&r1=60958&r2=60959&view=diff

==============================================================================
--- llvm/trunk/test/FrontendC++/2006-09-27-Debug-Protection.cpp (original)
+++ llvm/trunk/test/FrontendC++/2006-09-27-Debug-Protection.cpp Fri Dec 12 13:08:08 2008
@@ -1,6 +1,6 @@
 // RUN: %llvmgxx -O0 -emit-llvm -S -g -o - %s | grep {i32 1,}
 // RUN: %llvmgxx -O0 -emit-llvm -S -g -o - %s | grep {i32 2,}
-
+// XFAIL: *
 class A {
 public:
   int x;

Modified: llvm/trunk/test/FrontendC++/2006-11-30-Pubnames.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2006-11-30-Pubnames.cpp?rev=60959&r1=60958&r2=60959&view=diff

==============================================================================
--- llvm/trunk/test/FrontendC++/2006-11-30-Pubnames.cpp (original)
+++ llvm/trunk/test/FrontendC++/2006-11-30-Pubnames.cpp Fri Dec 12 13:08:08 2008
@@ -7,7 +7,7 @@
 // RUN: echo {break main\nrun\np Pubnames::pubname} > %t.in
 // RUN: gdb -q -batch -n -x %t.in %t.exe | tee %t.out | grep {\$1 = 10}
 // XFAIL: alpha|ia64|arm
-
+// XFAIL: *
 struct Pubnames {
   static int pubname;
 };




From isanbard at gmail.com  Fri Dec 12 15:15:47 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Fri, 12 Dec 2008 21:15:47 -0000
Subject: [llvm-commits] [llvm] r60963 - in /llvm/trunk:
 lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86ISelLowering.h
 lib/Target/X86/X86Instr64bit.td lib/Target/X86/X86InstrInfo.td
 test/CodeGen/X86/mul-with-overflow.ll
 test/CodeGen/X86/smul-with-overflow.ll test/CodeGen/X86/umul-with-carry.ll
Message-ID: <200812122115.mBCLFqjB030870@zion.cs.uiuc.edu>

Author: void
Date: Fri Dec 12 15:15:41 2008
New Revision: 60963

URL: http://llvm.org/viewvc/llvm-project?rev=60963&view=rev
Log:
- Use patterns instead of creating completely new instruction matching patterns,
  which are identical to the original patterns.

- Change the multiply with overflow so that we distinguish between signed and
  unsigned multiplication. Currently, unsigned multiplication with overflow
  isn't working!

Added:
    llvm/trunk/test/CodeGen/X86/smul-with-overflow.ll
    llvm/trunk/test/CodeGen/X86/umul-with-carry.ll
      - copied, changed from r60951, llvm/trunk/test/CodeGen/X86/mul-with-overflow.ll
Removed:
    llvm/trunk/test/CodeGen/X86/mul-with-overflow.ll
Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.h
    llvm/trunk/lib/Target/X86/X86Instr64bit.td
    llvm/trunk/lib/Target/X86/X86InstrInfo.td

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=60963&r1=60962&r2=60963&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Dec 12 15:15:41 2008
@@ -5217,9 +5217,10 @@
 
   if (Cond.getOpcode() == ISD::SETCC)
     Cond = LowerSETCC(Cond, DAG);
-  else if (Cond.getOpcode() == X86ISD::ADD ||
-           Cond.getOpcode() == X86ISD::SUB ||
-           Cond.getOpcode() == X86ISD::MUL)
+  else if (Cond.getOpcode() == X86ISD::ADD  ||
+           Cond.getOpcode() == X86ISD::SUB  ||
+           Cond.getOpcode() == X86ISD::SMUL ||
+           Cond.getOpcode() == X86ISD::UMUL)
     Cond = LowerXALUO(Cond, DAG);
 
   // If condition flag is set by a X86ISD::CMP, then use it as the condition
@@ -6165,11 +6166,11 @@
     Cond = X86::COND_C;
     break;
   case ISD::SMULO:
-    BaseOp = X86ISD::MUL;
+    BaseOp = X86ISD::SMUL;
     Cond = X86::COND_O;
     break;
   case ISD::UMULO:
-    BaseOp = X86ISD::MUL;
+    BaseOp = X86ISD::UMUL;
     Cond = X86::COND_C;
     break;
   }
@@ -6497,7 +6498,8 @@
   case X86ISD::PCMPGTQ:            return "X86ISD::PCMPGTQ";
   case X86ISD::ADD:                return "X86ISD::ADD";
   case X86ISD::SUB:                return "X86ISD::SUB";
-  case X86ISD::MUL:                return "X86ISD::MUL";
+  case X86ISD::SMUL:               return "X86ISD::SMUL";
+  case X86ISD::UMUL:               return "X86ISD::UMUL";
   }
 }
 

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=60963&r1=60962&r2=60963&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Fri Dec 12 15:15:41 2008
@@ -229,9 +229,9 @@
       PCMPEQB, PCMPEQW, PCMPEQD, PCMPEQQ,
       PCMPGTB, PCMPGTW, PCMPGTD, PCMPGTQ,
 
-      // ADD, SUB, MUL - Arithmetic operations with overflow/carry
+      // ADD, SUB, SMUL, UMUL - Arithmetic operations with overflow/carry
       // intrinsics.
-      ADD, SUB, MUL
+      ADD, SUB, SMUL, UMUL
     };
   }
 

Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=60963&r1=60962&r2=60963&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original)
+++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Fri Dec 12 15:15:41 2008
@@ -315,73 +315,40 @@
 // Register-Register Addition
 def ADD64rr    : RI<0x01, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
                     "add{q}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR64:$dst, (add GR64:$src1, GR64:$src2))]>;
-
-// Register-Register Addition with Overflow
-def ADDOvf64rr : RI<0x01, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
-                    "add{q}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR64:$dst, (X86add_ovf GR64:$src1, GR64:$src2)),
+                    [(set GR64:$dst, (add GR64:$src1, GR64:$src2)),
                      (implicit EFLAGS)]>;
 
 // Register-Integer Addition
 def ADD64ri32 : RIi32<0x81, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2),
                       "add{q}\t{$src2, $dst|$dst, $src2}",
-                      [(set GR64:$dst, (add GR64:$src1, i64immSExt32:$src2))]>;
+                      [(set GR64:$dst, (add GR64:$src1, i64immSExt32:$src2)),
+                       (implicit EFLAGS)]>;
 def ADD64ri8  : RIi8<0x83, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2),
                      "add{q}\t{$src2, $dst|$dst, $src2}",
-                     [(set GR64:$dst, (add GR64:$src1, i64immSExt8:$src2))]>;
-
-// Register-Integer Addition with Overflow
-def ADDOvf64ri32 : RIi32<0x81, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2),
-                         "add{q}\t{$src2, $dst|$dst, $src2}",
-                         [(set GR64:$dst, (X86add_ovf GR64:$src1, i64immSExt32:$src2)),
-                          (implicit EFLAGS)]>;
-def ADDOvf64ri8  : RIi8<0x83, MRM0r, (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2),
-                        "add{q}\t{$src2, $dst|$dst, $src2}",
-                        [(set GR64:$dst, (X86add_ovf GR64:$src1, i64immSExt8:$src2)),
-                         (implicit EFLAGS)]>;
+                     [(set GR64:$dst, (add GR64:$src1, i64immSExt8:$src2)),
+                      (implicit EFLAGS)]>;
 } // isConvertibleToThreeAddress
 
 // Register-Memory Addition
 def ADD64rm     : RI<0x03, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2),
                      "add{q}\t{$src2, $dst|$dst, $src2}",
-                     [(set GR64:$dst, (add GR64:$src1, (load addr:$src2)))]>;
-
-// Register-Memory Addition with Overflow
-def ADDOvf64rm  : RI<0x03, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2),
-                     "add{q}\t{$src2, $dst|$dst, $src2}",
-                     [(set GR64:$dst, (X86add_ovf GR64:$src1, (load addr:$src2))),
+                     [(set GR64:$dst, (add GR64:$src1, (load addr:$src2))),
                       (implicit EFLAGS)]>;
 } // isTwoAddress
 
 // Memory-Register Addition
 def ADD64mr  : RI<0x01, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2),
                   "add{q}\t{$src2, $dst|$dst, $src2}",
-                  [(store (add (load addr:$dst), GR64:$src2), addr:$dst)]>;
+                  [(store (add (load addr:$dst), GR64:$src2), addr:$dst),
+                   (implicit EFLAGS)]>;
 def ADD64mi32 : RIi32<0x81, MRM0m, (outs), (ins i64mem:$dst, i64i32imm :$src2),
                       "add{q}\t{$src2, $dst|$dst, $src2}",
-               [(store (add (load addr:$dst), i64immSExt32:$src2), addr:$dst)]>;
+               [(store (add (load addr:$dst), i64immSExt32:$src2), addr:$dst),
+                (implicit EFLAGS)]>;
 def ADD64mi8 : RIi8<0x83, MRM0m, (outs), (ins i64mem:$dst, i64i8imm :$src2),
                     "add{q}\t{$src2, $dst|$dst, $src2}",
-                [(store (add (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>;
-
-// Memory-Register Addition with Overflow
-def ADDOvf64mr   : RI<0x01, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2),
-                      "add{q}\t{$src2, $dst|$dst, $src2}",
-                      [(store (X86add_ovf (load addr:$dst), GR64:$src2),
-                              addr:$dst),
-                       (implicit EFLAGS)]>;
-def ADDOvf64mi32 : RIi32<0x81, MRM0m, (outs),(ins i64mem:$dst, i64i32imm:$src2),
-                         "add{q}\t{$src2, $dst|$dst, $src2}",
-                         [(store (X86add_ovf (load addr:$dst),
-                                             i64immSExt32:$src2),
-                                 addr:$dst),
-                          (implicit EFLAGS)]>;
-def ADDOvf64mi8 : RIi8<0x83, MRM0m, (outs), (ins i64mem:$dst, i64i8imm :$src2),
-                       "add{q}\t{$src2, $dst|$dst, $src2}",
-                       [(store (X86add_ovf (load addr:$dst), i64immSExt8:$src2),
-                               addr:$dst),
-                        (implicit EFLAGS)]>;
+                [(store (add (load addr:$dst), i64immSExt8:$src2), addr:$dst),
+                 (implicit EFLAGS)]>;
 
 let Uses = [EFLAGS] in {
 let isTwoAddress = 1 in {
@@ -417,83 +384,45 @@
 // Register-Register Subtraction
 def SUB64rr  : RI<0x29, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
                   "sub{q}\t{$src2, $dst|$dst, $src2}",
-                  [(set GR64:$dst, (sub GR64:$src1, GR64:$src2))]>;
-
-// Register-Register Subtraction with Overflow
-def SUBOvf64rr : RI<0x29, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
-                    "sub{q}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR64:$dst, (X86sub_ovf GR64:$src1, GR64:$src2)),
-                     (implicit EFLAGS)]>;
+                  [(set GR64:$dst, (sub GR64:$src1, GR64:$src2)),
+                   (implicit EFLAGS)]>;
 
 // Register-Memory Subtraction
 def SUB64rm  : RI<0x2B, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2),
                   "sub{q}\t{$src2, $dst|$dst, $src2}",
-                  [(set GR64:$dst, (sub GR64:$src1, (load addr:$src2)))]>;
-
-// Register-Memory Subtraction with Overflow
-def SUBOvf64rm : RI<0x2B, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2),
-                    "sub{q}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR64:$dst, (X86sub_ovf GR64:$src1, (load addr:$src2))),
-                     (implicit EFLAGS)]>;
+                  [(set GR64:$dst, (sub GR64:$src1, (load addr:$src2))),
+                   (implicit EFLAGS)]>;
 
 // Register-Integer Subtraction
 def SUB64ri32 : RIi32<0x81, MRM5r, (outs GR64:$dst),
                                    (ins GR64:$src1, i64i32imm:$src2),
                       "sub{q}\t{$src2, $dst|$dst, $src2}",
-                      [(set GR64:$dst, (sub GR64:$src1, i64immSExt32:$src2))]>;
+                      [(set GR64:$dst, (sub GR64:$src1, i64immSExt32:$src2)),
+                       (implicit EFLAGS)]>;
 def SUB64ri8 : RIi8<0x83, MRM5r, (outs GR64:$dst),
                                  (ins GR64:$src1, i64i8imm:$src2),
                     "sub{q}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR64:$dst, (sub GR64:$src1, i64immSExt8:$src2))]>;
-
-// Register-Integer Subtraction with Overflow
-def SUBOvf64ri32 : RIi32<0x81, MRM5r, (outs GR64:$dst),
-                                      (ins GR64:$src1, i64i32imm:$src2),
-                         "sub{q}\t{$src2, $dst|$dst, $src2}",
-                         [(set GR64:$dst, (X86sub_ovf GR64:$src1,
-                                                      i64immSExt32:$src2)),
-                          (implicit EFLAGS)]>;
-def SUBOvf64ri8 : RIi8<0x83, MRM5r, (outs GR64:$dst),
-                                    (ins GR64:$src1, i64i8imm:$src2),
-                       "sub{q}\t{$src2, $dst|$dst, $src2}",
-                       [(set GR64:$dst, (X86sub_ovf GR64:$src1,
-                                                    i64immSExt8:$src2)),
-                        (implicit EFLAGS)]>;
+                    [(set GR64:$dst, (sub GR64:$src1, i64immSExt8:$src2)),
+                     (implicit EFLAGS)]>;
 } // isTwoAddress
 
 // Memory-Register Subtraction
 def SUB64mr  : RI<0x29, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), 
                   "sub{q}\t{$src2, $dst|$dst, $src2}",
-                  [(store (sub (load addr:$dst), GR64:$src2), addr:$dst)]>;
-
-// Memory-Register Subtraction with Overflow
-def SUBOvf64mr : RI<0x29, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), 
-                    "sub{q}\t{$src2, $dst|$dst, $src2}",
-                    [(store (X86sub_ovf (load addr:$dst), GR64:$src2),
-                            addr:$dst),
-                     (implicit EFLAGS)]>;
+                  [(store (sub (load addr:$dst), GR64:$src2), addr:$dst),
+                   (implicit EFLAGS)]>;
 
 // Memory-Integer Subtraction
 def SUB64mi32 : RIi32<0x81, MRM5m, (outs), (ins i64mem:$dst, i64i32imm:$src2),
                       "sub{q}\t{$src2, $dst|$dst, $src2}",
                       [(store (sub (load addr:$dst), i64immSExt32:$src2),
-                              addr:$dst)]>;
+                              addr:$dst),
+                       (implicit EFLAGS)]>;
 def SUB64mi8 : RIi8<0x83, MRM5m, (outs), (ins i64mem:$dst, i64i8imm :$src2), 
                     "sub{q}\t{$src2, $dst|$dst, $src2}",
                     [(store (sub (load addr:$dst), i64immSExt8:$src2),
-                            addr:$dst)]>;
-
-// Memory-Integer Subtraction with Overflow
-def SUBOvf64mi32 : RIi32<0x81, MRM5m, (outs), (ins i64mem:$dst,i64i32imm:$src2),
-                         "sub{q}\t{$src2, $dst|$dst, $src2}",
-                         [(store (X86sub_ovf (load addr:$dst),
-                                             i64immSExt32:$src2), addr:$dst),
-                          (implicit EFLAGS)]>;
-def SUBOvf64mi8 : RIi8<0x83, MRM5m, (outs), (ins i64mem:$dst, i64i8imm :$src2), 
-                       "sub{q}\t{$src2, $dst|$dst, $src2}",
-                       [(store (X86sub_ovf (load addr:$dst), i64immSExt8:$src2),
-                               addr:$dst),
-                        (implicit EFLAGS)]>;
+                            addr:$dst),
+                     (implicit EFLAGS)]>;
 
 let Uses = [EFLAGS] in {
 let isTwoAddress = 1 in {
@@ -544,85 +473,48 @@
 let Defs = [EFLAGS] in {
 let isTwoAddress = 1 in {
 let isCommutable = 1 in
-// Register-Register Integer Multiplication
+// Register-Register Signed Integer Multiplication
 def IMUL64rr : RI<0xAF, MRMSrcReg, (outs GR64:$dst),
                                    (ins GR64:$src1, GR64:$src2),
                   "imul{q}\t{$src2, $dst|$dst, $src2}",
-                  [(set GR64:$dst, (mul GR64:$src1, GR64:$src2))]>, TB;
+                  [(set GR64:$dst, (mul GR64:$src1, GR64:$src2)),
+                   (implicit EFLAGS)]>, TB;
 
-// Register-Register Multiplication with Overflow
-def IMULOvf64rr : RI<0xAF, MRMSrcReg, (outs GR64:$dst),
-                                      (ins GR64:$src1, GR64:$src2),
-                     "imul{q}\t{$src2, $dst|$dst, $src2}",
-                     [(set GR64:$dst, (X86mul_ovf GR64:$src1, GR64:$src2)),
-                      (implicit EFLAGS)]>, TB;
-
-// Register-Memory Integer Multiplication
+// Register-Memory Signed Integer Multiplication
 def IMUL64rm : RI<0xAF, MRMSrcMem, (outs GR64:$dst),
                                    (ins GR64:$src1, i64mem:$src2),
                   "imul{q}\t{$src2, $dst|$dst, $src2}",
-                  [(set GR64:$dst, (mul GR64:$src1, (load addr:$src2)))]>, TB;
-
-// Register-Memory Integer Multiplication with Overflow
-def IMULOvf64rm : RI<0xAF, MRMSrcMem, (outs GR64:$dst),
-                                      (ins GR64:$src1, i64mem:$src2),
-                     "imul{q}\t{$src2, $dst|$dst, $src2}",
-                     [(set GR64:$dst, (X86mul_ovf GR64:$src1,
-                                                  (load addr:$src2))),
-                      (implicit EFLAGS)]>, TB;
+                  [(set GR64:$dst, (mul GR64:$src1, (load addr:$src2))),
+                   (implicit EFLAGS)]>, TB;
 } // isTwoAddress
 
 // Suprisingly enough, these are not two address instructions!
 
-// Register-Integer Integer Multiplication
+// Register-Integer Signed Integer Multiplication
 def IMUL64rri32 : RIi32<0x69, MRMSrcReg,                    // GR64 = GR64*I32
                         (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2),
                         "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                       [(set GR64:$dst, (mul GR64:$src1, i64immSExt32:$src2))]>;
+                       [(set GR64:$dst, (mul GR64:$src1, i64immSExt32:$src2)),
+                        (implicit EFLAGS)]>;
 def IMUL64rri8 : RIi8<0x6B, MRMSrcReg,                      // GR64 = GR64*I8
                       (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2),
                       "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                      [(set GR64:$dst, (mul GR64:$src1, i64immSExt8:$src2))]>;
-
-// Register-Integer Integer Multiplication with Overflow
-def IMULOvf64rri32 : RIi32<0x69, MRMSrcReg,                 // GR64 = GR64*I32
-                           (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2),
-                           "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                           [(set GR64:$dst, (X86mul_ovf GR64:$src1,
-                                                        i64immSExt32:$src2)),
-                            (implicit EFLAGS)]>;
-def IMULOvf64rri8 : RIi8<0x6B, MRMSrcReg,                   // GR64 = GR64*I8
-                         (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2),
-                         "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                         [(set GR64:$dst, (X86mul_ovf GR64:$src1,
-                                                      i64immSExt8:$src2)),
-                          (implicit EFLAGS)]>;
+                      [(set GR64:$dst, (mul GR64:$src1, i64immSExt8:$src2)),
+                       (implicit EFLAGS)]>;
 
-// Memory-Integer Integer Multiplication
+// Memory-Integer Signed Integer Multiplication
 def IMUL64rmi32 : RIi32<0x69, MRMSrcMem,                   // GR64 = [mem64]*I32
                         (outs GR64:$dst), (ins i64mem:$src1, i64i32imm:$src2),
                         "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
                         [(set GR64:$dst, (mul (load addr:$src1),
-                                              i64immSExt32:$src2))]>;
+                                              i64immSExt32:$src2)),
+                         (implicit EFLAGS)]>;
 def IMUL64rmi8 : RIi8<0x6B, MRMSrcMem,                      // GR64 = [mem64]*I8
                       (outs GR64:$dst), (ins i64mem:$src1, i64i8imm: $src2),
                       "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
                       [(set GR64:$dst, (mul (load addr:$src1),
-                                            i64immSExt8:$src2))]>;
-
-// Memory-Integer Integer Multiplication with Overflow
-def IMULOvf64rmi32 : RIi32<0x69, MRMSrcMem,                   // GR64 = [mem64]*I32
-                           (outs GR64:$dst), (ins i64mem:$src1, i64i32imm:$src2),
-                           "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                           [(set GR64:$dst, (X86mul_ovf (load addr:$src1),
-                                                        i64immSExt32:$src2)),
-                            (implicit EFLAGS)]>;
-def IMULOvf64rmi8 : RIi8<0x6B, MRMSrcMem,                      // GR64 = [mem64]*I8
-                         (outs GR64:$dst), (ins i64mem:$src1, i64i8imm: $src2),
-                         "imul{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                         [(set GR64:$dst, (X86mul_ovf (load addr:$src1),
-                                                      i64immSExt8:$src2)),
-                          (implicit EFLAGS)]>;
+                                            i64immSExt8:$src2)),
+                       (implicit EFLAGS)]>;
 } // Defs = [EFLAGS]
 
 // Unsigned division / remainder
@@ -1614,6 +1506,101 @@
 def : Pat<(subc GR64:$src1, i64immSExt8:$src2),
           (SUB64ri8 GR64:$src1, i64immSExt8:$src2)>;
 
+//===----------------------------------------------------------------------===//
+// Overflow Patterns
+//===----------------------------------------------------------------------===//
+
+// Register-Register Addition with Overflow
+def : Pat<(parallel (X86add_ovf GR64:$src1, GR64:$src2),
+                    (implicit EFLAGS)),
+          (ADD64rr GR64:$src1, GR64:$src2)>;
+
+// Register-Integer Addition with Overflow
+def : Pat<(parallel (X86add_ovf GR64:$src1, i64immSExt32:$src2),
+                    (implicit EFLAGS)),
+          (ADD64ri32 GR64:$src1, i64immSExt32:$src2)>;
+def : Pat<(parallel (X86add_ovf GR64:$src1, i64immSExt8:$src2),
+                    (implicit EFLAGS)),
+          (ADD64ri8 GR64:$src1, i64immSExt8:$src2)>;
+
+// Register-Memory Addition with Overflow
+def : Pat<(parallel (X86add_ovf GR64:$src1, (load addr:$src2)),
+                    (implicit EFLAGS)),
+          (ADD64rm GR64:$src1, addr:$src2)>;
+
+// Memory-Register Addition with Overflow
+def : Pat<(parallel (store (X86add_ovf (load addr:$dst), GR64:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (ADD64mr addr:$dst, GR64:$src2)>;
+def : Pat<(parallel (store (X86add_ovf (load addr:$dst), i64immSExt32:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (ADD64mi32 addr:$dst, i64immSExt32:$src2)>;
+def : Pat<(parallel (store (X86add_ovf (load addr:$dst), i64immSExt8:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (ADD64mi8 addr:$dst, i64immSExt8:$src2)>;
+
+// Register-Register Subtraction with Overflow
+def : Pat<(parallel (X86sub_ovf GR64:$src1, GR64:$src2),
+                    (implicit EFLAGS)),
+          (SUB64rr GR64:$src1, GR64:$src2)>;
+
+// Register-Memory Subtraction with Overflow
+def : Pat<(parallel (X86sub_ovf GR64:$src1, (load addr:$src2)),
+                    (implicit EFLAGS)),
+          (SUB64rm GR64:$src1, addr:$src2)>;
+
+// Register-Integer Subtraction with Overflow
+def : Pat<(parallel (X86sub_ovf GR64:$src1, i64immSExt32:$src2),
+                    (implicit EFLAGS)),
+          (SUB64ri32 GR64:$src1, i64immSExt32:$src2)>;
+def : Pat<(parallel (X86sub_ovf GR64:$src1, i64immSExt8:$src2),
+                    (implicit EFLAGS)),
+          (SUB64ri8 GR64:$src1, i64immSExt8:$src2)>;
+
+// Memory-Register Subtraction with Overflow
+def : Pat<(parallel (store (X86sub_ovf (load addr:$dst), GR64:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (SUB64mr addr:$dst, GR64:$src2)>;
+
+// Memory-Integer Subtraction with Overflow
+def : Pat<(parallel (store (X86sub_ovf (load addr:$dst), i64immSExt32:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (SUB64mi32 addr:$dst, i64immSExt32:$src2)>;
+def : Pat<(parallel (store (X86sub_ovf (load addr:$dst), i64immSExt8:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (SUB64mi8 addr:$dst, i64immSExt8:$src2)>;
+
+// Register-Register Signed Integer Multiplication with Overflow
+def : Pat<(parallel (X86smul_ovf GR64:$src1, GR64:$src2),
+                    (implicit EFLAGS)),
+          (IMUL64rr GR64:$src1, GR64:$src2)>;
+
+// Register-Memory Signed Integer Multiplication with Overflow
+def : Pat<(parallel (X86smul_ovf GR64:$src1, (load addr:$src2)),
+                    (implicit EFLAGS)),
+          (IMUL64rm GR64:$src1, addr:$src2)>;
+
+// Register-Integer Signed Integer Multiplication with Overflow
+def : Pat<(parallel (X86smul_ovf GR64:$src1, i64immSExt32:$src2),
+                    (implicit EFLAGS)),
+          (IMUL64rri32 GR64:$src1, i64immSExt32:$src2)>;
+def : Pat<(parallel (X86smul_ovf GR64:$src1, i64immSExt8:$src2),
+                    (implicit EFLAGS)),
+          (IMUL64rri8 GR64:$src1, i64immSExt8:$src2)>;
+
+// Memory-Integer Signed Integer Multiplication with Overflow
+def : Pat<(parallel (X86smul_ovf (load addr:$src1), i64immSExt32:$src2),
+                    (implicit EFLAGS)),
+          (IMUL64rmi32 addr:$src1, i64immSExt32:$src2)>;
+def : Pat<(parallel (X86smul_ovf (load addr:$src1), i64immSExt8:$src2),
+                    (implicit EFLAGS)),
+          (IMUL64rmi8 addr:$src1, i64immSExt8:$src2)>;
 
 //===----------------------------------------------------------------------===//
 // X86-64 SSE Instructions

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=60963&r1=60962&r2=60963&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Fri Dec 12 15:15:41 2008
@@ -27,9 +27,11 @@
                                   [SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>,
                                    SDTCisVT<3, i8>, SDTCisVT<4, i32>]>;
 
-def SDTArithOvf : SDTypeProfile<1, 2,
-                                [SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>,
-                                 SDTCisInt<0>]>;
+def SDTUnaryArithOvf  : SDTypeProfile<1, 1,
+                                      [SDTCisInt<0>]>;
+def SDTBinaryArithOvf : SDTypeProfile<1, 2,
+                                      [SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>,
+                                       SDTCisInt<0>]>;
 
 def SDTX86BrCond  : SDTypeProfile<0, 3,
                                   [SDTCisVT<0, OtherVT>,
@@ -144,9 +146,10 @@
 def X86tcret : SDNode<"X86ISD::TC_RETURN", SDT_X86TCRET, 
                         [SDNPHasChain,  SDNPOptInFlag]>;
 
-def X86add_ovf : SDNode<"X86ISD::ADD", SDTArithOvf>;
-def X86sub_ovf : SDNode<"X86ISD::SUB", SDTArithOvf>;
-def X86mul_ovf : SDNode<"X86ISD::MUL", SDTArithOvf>;
+def X86add_ovf  : SDNode<"X86ISD::ADD",  SDTBinaryArithOvf>;
+def X86sub_ovf  : SDNode<"X86ISD::SUB",  SDTBinaryArithOvf>;
+def X86smul_ovf : SDNode<"X86ISD::SMUL", SDTBinaryArithOvf>;
+def X86umul_ovf : SDNode<"X86ISD::UMUL", SDTUnaryArithOvf>;
 
 //===----------------------------------------------------------------------===//
 // X86 Operand Definitions.
@@ -717,27 +720,38 @@
                // FIXME: Used for 8-bit mul, ignore result upper 8 bits.
                // This probably ought to be moved to a def : Pat<> if the
                // syntax can be accepted.
-               [(set AL, (mul AL, GR8:$src))]>;     // AL,AH = AL*GR8
+               [(set AL, (mul AL, GR8:$src)),
+                (implicit EFLAGS)]>;     // AL,AH = AL*GR8
+
 let Defs = [AX,DX,EFLAGS], Uses = [AX], neverHasSideEffects = 1 in
-def MUL16r : I<0xF7, MRM4r, (outs),  (ins GR16:$src), "mul{w}\t$src", 
-             []>, OpSize;    // AX,DX = AX*GR16
+def MUL16r : I<0xF7, MRM4r, (outs),  (ins GR16:$src),
+               "mul{w}\t$src", 
+               []>, OpSize;    // AX,DX = AX*GR16
+
 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX], neverHasSideEffects = 1 in
-def MUL32r : I<0xF7, MRM4r, (outs),  (ins GR32:$src), "mul{l}\t$src", []>;
-                       // EAX,EDX = EAX*GR32
+def MUL32r : I<0xF7, MRM4r, (outs),  (ins GR32:$src),
+               "mul{l}\t$src",
+               []>; // EAX,EDX = EAX*GR32
+
 let Defs = [AL,AH,EFLAGS], Uses = [AL] in
 def MUL8m  : I<0xF6, MRM4m, (outs), (ins i8mem :$src),
                "mul{b}\t$src",
                // FIXME: Used for 8-bit mul, ignore result upper 8 bits.
                // This probably ought to be moved to a def : Pat<> if the
                // syntax can be accepted.
-               [(set AL, (mul AL, (loadi8 addr:$src)))]>;   // AL,AH = AL*[mem8]
+               [(set AL, (mul AL, (loadi8 addr:$src))),
+                (implicit EFLAGS)]>;   // AL,AH = AL*[mem8]
+
 let mayLoad = 1, neverHasSideEffects = 1 in {
 let Defs = [AX,DX,EFLAGS], Uses = [AX] in
 def MUL16m : I<0xF7, MRM4m, (outs), (ins i16mem:$src),
-               "mul{w}\t$src", []>, OpSize; // AX,DX = AX*[mem16]
+               "mul{w}\t$src",
+               []>, OpSize; // AX,DX = AX*[mem16]
+
 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX] in
 def MUL32m : I<0xF7, MRM4m, (outs), (ins i32mem:$src),
-              "mul{l}\t$src", []>;          // EAX,EDX = EAX*[mem32]
+              "mul{l}\t$src",
+              []>;          // EAX,EDX = EAX*[mem32]
 }
 
 let neverHasSideEffects = 1 in {
@@ -1935,13 +1949,7 @@
 def ADD8rr    : I<0x00, MRMDestReg, (outs GR8 :$dst),
                                     (ins GR8 :$src1, GR8 :$src2),
                   "add{b}\t{$src2, $dst|$dst, $src2}",
-                  [(set GR8:$dst, (add GR8:$src1, GR8:$src2))]>;
-
-// Register-Register Addition with Overflow
-def ADDOvf8rr : I<0x00, MRMDestReg, (outs GR8 :$dst),
-                                    (ins GR8 :$src1, GR8 :$src2),
-                  "add{b}\t{$src2, $dst|$dst, $src2}",
-                  [(set GR8:$dst, (X86add_ovf GR8:$src1, GR8:$src2)),
+                  [(set GR8:$dst, (add GR8:$src1, GR8:$src2)),
                    (implicit EFLAGS)]>;
 
 let isConvertibleToThreeAddress = 1 in {   // Can transform into LEA.
@@ -1949,23 +1957,13 @@
 def ADD16rr  : I<0x01, MRMDestReg, (outs GR16:$dst),
                                    (ins GR16:$src1, GR16:$src2),
                  "add{w}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR16:$dst, (add GR16:$src1, GR16:$src2))]>, OpSize;
+                 [(set GR16:$dst, (add GR16:$src1, GR16:$src2)),
+                  (implicit EFLAGS)]>, OpSize;
 def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst),
                                    (ins GR32:$src1, GR32:$src2),
                  "add{l}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
-
-// Register-Register Addition with Overflow
-def ADDOvf16rr : I<0x01, MRMDestReg, (outs GR16:$dst),
-                                     (ins GR16:$src1, GR16:$src2),
-                   "add{w}\t{$src2, $dst|$dst, $src2}",
-                   [(set GR16:$dst, (X86add_ovf GR16:$src1, GR16:$src2)),
-                    (implicit EFLAGS)]>, OpSize;
-def ADDOvf32rr : I<0x01, MRMDestReg, (outs GR32:$dst),
-                                     (ins GR32:$src1, GR32:$src2),
-                   "add{l}\t{$src2, $dst|$dst, $src2}",
-                   [(set GR32:$dst, (X86add_ovf GR32:$src1, GR32:$src2)),
-                    (implicit EFLAGS)]>;
+                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2)),
+                  (implicit EFLAGS)]>;
 } // end isConvertibleToThreeAddress
 } // end isCommutable
 
@@ -1973,160 +1971,85 @@
 def ADD8rm   : I<0x02, MRMSrcMem, (outs GR8 :$dst),
                                   (ins GR8 :$src1, i8mem :$src2),
                  "add{b}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR8:$dst, (add GR8:$src1, (load addr:$src2)))]>;
+                 [(set GR8:$dst, (add GR8:$src1, (load addr:$src2))),
+                  (implicit EFLAGS)]>;
 def ADD16rm  : I<0x03, MRMSrcMem, (outs GR16:$dst),
                                   (ins GR16:$src1, i16mem:$src2),
                  "add{w}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR16:$dst, (add GR16:$src1, (load addr:$src2)))]>,OpSize;
+                 [(set GR16:$dst, (add GR16:$src1, (load addr:$src2))),
+                  (implicit EFLAGS)]>, OpSize;
 def ADD32rm  : I<0x03, MRMSrcMem, (outs GR32:$dst),
                                   (ins GR32:$src1, i32mem:$src2),
                  "add{l}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR32:$dst, (add GR32:$src1, (load addr:$src2)))]>;
-
-// Register-Memory Addition with Overflow
-def ADDOvf8rm  : I<0x02, MRMSrcMem, (outs GR8 :$dst),
-                                    (ins GR8 :$src1, i8mem :$src2),
-                   "add{b}\t{$src2, $dst|$dst, $src2}",
-                   [(set GR8:$dst, (X86add_ovf GR8:$src1, (load addr:$src2))),
-                    (implicit EFLAGS)]>;
-def ADDOvf16rm : I<0x03, MRMSrcMem, (outs GR16:$dst),
-                                    (ins GR16:$src1, i16mem:$src2),
-                   "add{w}\t{$src2, $dst|$dst, $src2}",
-                   [(set GR16:$dst, (X86add_ovf GR16:$src1, (load addr:$src2))),
-                    (implicit EFLAGS)]>, OpSize;
-def ADDOvf32rm : I<0x03, MRMSrcMem, (outs GR32:$dst),
-                                    (ins GR32:$src1, i32mem:$src2),
-                   "add{l}\t{$src2, $dst|$dst, $src2}",
-                   [(set GR32:$dst, (X86add_ovf GR32:$src1, (load addr:$src2))),
-                    (implicit EFLAGS)]>;
+                 [(set GR32:$dst, (add GR32:$src1, (load addr:$src2))),
+                  (implicit EFLAGS)]>;
 
 // Register-Integer Addition
 def ADD8ri    : Ii8<0x80, MRM0r, (outs GR8:$dst), (ins GR8:$src1, i8imm:$src2),
                     "add{b}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR8:$dst, (add GR8:$src1, imm:$src2))]>;
-
-// Register-Integer Addition with Overflow
-def ADDOvf8ri  : Ii8<0x80, MRM0r, (outs GR8:$dst), (ins GR8:$src1, i8imm:$src2),
-                     "add{b}\t{$src2, $dst|$dst, $src2}",
-                     [(set GR8:$dst, (X86add_ovf GR8:$src1, imm:$src2)),
-                      (implicit EFLAGS)]>;
+                    [(set GR8:$dst, (add GR8:$src1, imm:$src2)),
+                     (implicit EFLAGS)]>;
 
 let isConvertibleToThreeAddress = 1 in {   // Can transform into LEA.
 // Register-Integer Addition
 def ADD16ri  : Ii16<0x81, MRM0r, (outs GR16:$dst),
                                  (ins GR16:$src1, i16imm:$src2),
                     "add{w}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR16:$dst, (add GR16:$src1, imm:$src2))]>, OpSize;
+                    [(set GR16:$dst, (add GR16:$src1, imm:$src2)),
+                     (implicit EFLAGS)]>, OpSize;
 def ADD32ri  : Ii32<0x81, MRM0r, (outs GR32:$dst),
                                  (ins GR32:$src1, i32imm:$src2),
                     "add{l}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR32:$dst, (add GR32:$src1, imm:$src2))]>;
+                    [(set GR32:$dst, (add GR32:$src1, imm:$src2)),
+                     (implicit EFLAGS)]>;
 def ADD16ri8 : Ii8<0x83, MRM0r, (outs GR16:$dst),
                                 (ins GR16:$src1, i16i8imm:$src2),
                    "add{w}\t{$src2, $dst|$dst, $src2}",
-                [(set GR16:$dst, (add GR16:$src1, i16immSExt8:$src2))]>, OpSize;
+                   [(set GR16:$dst, (add GR16:$src1, i16immSExt8:$src2)),
+                    (implicit EFLAGS)]>, OpSize;
 def ADD32ri8 : Ii8<0x83, MRM0r, (outs GR32:$dst),
                                 (ins GR32:$src1, i32i8imm:$src2),
                    "add{l}\t{$src2, $dst|$dst, $src2}",
-                [(set GR32:$dst, (add GR32:$src1, i32immSExt8:$src2))]>;
-
-// Register-Integer Addition with Overflow
-def ADDOvf16ri  : Ii16<0x81, MRM0r, (outs GR16:$dst),
-                                    (ins GR16:$src1, i16imm:$src2),
-                       "add{w}\t{$src2, $dst|$dst, $src2}",
-                       [(set GR16:$dst, (X86add_ovf GR16:$src1, imm:$src2)),
-                        (implicit EFLAGS)]>, OpSize;
-def ADDOvf32ri  : Ii32<0x81, MRM0r, (outs GR32:$dst),
-                                    (ins GR32:$src1, i32imm:$src2),
-                       "add{l}\t{$src2, $dst|$dst, $src2}",
-                       [(set GR32:$dst, (X86add_ovf GR32:$src1, imm:$src2)),
-                        (implicit EFLAGS)]>;
-def ADDOvf16ri8 : Ii8<0x83, MRM0r, (outs GR16:$dst),
-                                   (ins GR16:$src1, i16i8imm:$src2),
-                      "add{w}\t{$src2, $dst|$dst, $src2}",
-                      [(set GR16:$dst, (X86add_ovf GR16:$src1,
-                                                   i16immSExt8:$src2)),
-                       (implicit EFLAGS)]>, OpSize;
-def ADDOvf32ri8 : Ii8<0x83, MRM0r, (outs GR32:$dst),
-                                   (ins GR32:$src1, i32i8imm:$src2),
-                      "add{l}\t{$src2, $dst|$dst, $src2}",
-                      [(set GR32:$dst, (X86add_ovf GR32:$src1,
-                                        i32immSExt8:$src2)),
-                       (implicit EFLAGS)]>;
+                   [(set GR32:$dst, (add GR32:$src1, i32immSExt8:$src2)),
+                    (implicit EFLAGS)]>;
 }
 
 let isTwoAddress = 0 in {
   // Memory-Register Addition
-  def ADD8mr   : I<0x00, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src2),
+  def ADD8mr   : I<0x00, MRMDestMem, (outs), (ins i8mem:$dst, GR8:$src2),
                    "add{b}\t{$src2, $dst|$dst, $src2}",
-                   [(store (add (load addr:$dst), GR8:$src2), addr:$dst)]>;
+                   [(store (add (load addr:$dst), GR8:$src2), addr:$dst),
+                    (implicit EFLAGS)]>;
   def ADD16mr  : I<0x01, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2),
                    "add{w}\t{$src2, $dst|$dst, $src2}",
-                   [(store (add (load addr:$dst), GR16:$src2), addr:$dst)]>,
-                   OpSize;
+                   [(store (add (load addr:$dst), GR16:$src2), addr:$dst),
+                    (implicit EFLAGS)]>, OpSize;
   def ADD32mr  : I<0x01, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2),
                    "add{l}\t{$src2, $dst|$dst, $src2}",
-                   [(store (add (load addr:$dst), GR32:$src2), addr:$dst)]>;
+                   [(store (add (load addr:$dst), GR32:$src2), addr:$dst),
+                    (implicit EFLAGS)]>;
   def ADD8mi   : Ii8<0x80, MRM0m, (outs), (ins i8mem :$dst, i8imm :$src2),
                      "add{b}\t{$src2, $dst|$dst, $src2}",
-                   [(store (add (loadi8 addr:$dst), imm:$src2), addr:$dst)]>;
+                   [(store (add (loadi8 addr:$dst), imm:$src2), addr:$dst),
+                    (implicit EFLAGS)]>;
   def ADD16mi  : Ii16<0x81, MRM0m, (outs), (ins i16mem:$dst, i16imm:$src2),
                       "add{w}\t{$src2, $dst|$dst, $src2}",
-                  [(store (add (loadi16 addr:$dst), imm:$src2), addr:$dst)]>,
-                  OpSize;
+                  [(store (add (loadi16 addr:$dst), imm:$src2), addr:$dst),
+                   (implicit EFLAGS)]>, OpSize;
   def ADD32mi  : Ii32<0x81, MRM0m, (outs), (ins i32mem:$dst, i32imm:$src2),
                       "add{l}\t{$src2, $dst|$dst, $src2}",
-                  [(store (add (loadi32 addr:$dst), imm:$src2), addr:$dst)]>;
+                      [(store (add (loadi32 addr:$dst), imm:$src2), addr:$dst),
+                       (implicit EFLAGS)]>;
   def ADD16mi8 : Ii8<0x83, MRM0m, (outs), (ins i16mem:$dst, i16i8imm :$src2),
                      "add{w}\t{$src2, $dst|$dst, $src2}",
-                  [(store (add (load addr:$dst), i16immSExt8:$src2),
-                               addr:$dst)]>, OpSize;
+                     [(store (add (load addr:$dst), i16immSExt8:$src2),
+                                  addr:$dst),
+                      (implicit EFLAGS)]>, OpSize;
   def ADD32mi8 : Ii8<0x83, MRM0m, (outs), (ins i32mem:$dst, i32i8imm :$src2),
                      "add{l}\t{$src2, $dst|$dst, $src2}",
                   [(store (add (load addr:$dst), i32immSExt8:$src2),
-                               addr:$dst)]>;
-
-  // Memory-Register Addition with Overflow
-  def ADDOvf8mr   : I<0x00, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src2),
-                      "add{b}\t{$src2, $dst|$dst, $src2}",
-                      [(store (X86add_ovf (load addr:$dst), GR8:$src2),
-                                          addr:$dst),
-                       (implicit EFLAGS)]>;
-  def ADDOvf16mr  : I<0x01, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2),
-                      "add{w}\t{$src2, $dst|$dst, $src2}",
-                      [(store (X86add_ovf (load addr:$dst), GR16:$src2),
-                                          addr:$dst),
-                       (implicit EFLAGS)]>, OpSize;
-  def ADDOvf32mr  : I<0x01, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2),
-                      "add{l}\t{$src2, $dst|$dst, $src2}",
-                      [(store (X86add_ovf (load addr:$dst), GR32:$src2),
-                                          addr:$dst),
-                       (implicit EFLAGS)]>;
-  def ADDOvf8mi   : Ii8<0x80, MRM0m, (outs), (ins i8mem :$dst, i8imm :$src2),
-                        "add{b}\t{$src2, $dst|$dst, $src2}",
-                        [(store (X86add_ovf (loadi8 addr:$dst), imm:$src2),
-                                            addr:$dst),
-                        (implicit EFLAGS)]>;
-  def ADDOvf16mi  : Ii16<0x81, MRM0m, (outs), (ins i16mem:$dst, i16imm:$src2),
-                         "add{w}\t{$src2, $dst|$dst, $src2}",
-                         [(store (X86add_ovf (loadi16 addr:$dst), imm:$src2),
-                                             addr:$dst),
-                          (implicit EFLAGS)]>, OpSize;
-  def ADDOvf32mi  : Ii32<0x81, MRM0m, (outs), (ins i32mem:$dst, i32imm:$src2),
-                         "add{l}\t{$src2, $dst|$dst, $src2}",
-                         [(store (X86add_ovf (loadi32 addr:$dst), imm:$src2),
-                                             addr:$dst),
-                          (implicit EFLAGS)]>;
-  def ADDOvf16mi8 : Ii8<0x83, MRM0m, (outs), (ins i16mem:$dst, i16i8imm :$src2),
-                        "add{w}\t{$src2, $dst|$dst, $src2}",
-                        [(store (X86add_ovf (load addr:$dst),i16immSExt8:$src2),
-                                            addr:$dst),
-                         (implicit EFLAGS)]>, OpSize;
-  def ADDOvf32mi8 : Ii8<0x83, MRM0m, (outs), (ins i32mem:$dst, i32i8imm :$src2),
-                        "add{l}\t{$src2, $dst|$dst, $src2}",
-                        [(store (X86add_ovf (load addr:$dst),i32immSExt8:$src2),
-                                            addr:$dst),
-                         (implicit EFLAGS)]>;
+                               addr:$dst),
+                   (implicit EFLAGS)]>;
 }
 
 let Uses = [EFLAGS] in {
@@ -2161,190 +2084,99 @@
 // Register-Register Subtraction
 def SUB8rr  : I<0x28, MRMDestReg, (outs GR8:$dst), (ins GR8:$src1, GR8:$src2),
                 "sub{b}\t{$src2, $dst|$dst, $src2}",
-                [(set GR8:$dst, (sub GR8:$src1, GR8:$src2))]>;
+                [(set GR8:$dst, (sub GR8:$src1, GR8:$src2)),
+                 (implicit EFLAGS)]>;
 def SUB16rr : I<0x29, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1,GR16:$src2),
                 "sub{w}\t{$src2, $dst|$dst, $src2}",
-                [(set GR16:$dst, (sub GR16:$src1, GR16:$src2))]>, OpSize;
+                [(set GR16:$dst, (sub GR16:$src1, GR16:$src2)),
+                 (implicit EFLAGS)]>, OpSize;
 def SUB32rr : I<0x29, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1,GR32:$src2),
                 "sub{l}\t{$src2, $dst|$dst, $src2}",
-                [(set GR32:$dst, (sub GR32:$src1, GR32:$src2))]>;
-
-// Register-Register Subtraction with Overflow
-def SUBOvf8rr  : I<0x28, MRMDestReg, (outs GR8:$dst),
-                                     (ins GR8:$src1, GR8:$src2),
-                   "sub{b}\t{$src2, $dst|$dst, $src2}",
-                   [(set GR8:$dst, (X86sub_ovf GR8:$src1, GR8:$src2)),
-                    (implicit EFLAGS)]>;
-def SUBOvf16rr : I<0x29, MRMDestReg, (outs GR16:$dst),
-                                     (ins GR16:$src1, GR16:$src2),
-                   "sub{w}\t{$src2, $dst|$dst, $src2}",
-                   [(set GR16:$dst, (X86sub_ovf GR16:$src1, GR16:$src2)),
-                    (implicit EFLAGS)]>, OpSize;
-def SUBOvf32rr : I<0x29, MRMDestReg, (outs GR32:$dst),
-                                     (ins GR32:$src1, GR32:$src2),
-                   "sub{l}\t{$src2, $dst|$dst, $src2}",
-                   [(set GR32:$dst, (X86sub_ovf GR32:$src1, GR32:$src2)),
-                    (implicit EFLAGS)]>;
+                [(set GR32:$dst, (sub GR32:$src1, GR32:$src2)),
+                 (implicit EFLAGS)]>;
 
 // Register-Memory Subtraction
 def SUB8rm  : I<0x2A, MRMSrcMem, (outs GR8 :$dst),
                                  (ins GR8 :$src1, i8mem :$src2),
                 "sub{b}\t{$src2, $dst|$dst, $src2}",
-                [(set GR8:$dst, (sub GR8:$src1, (load addr:$src2)))]>;
+                [(set GR8:$dst, (sub GR8:$src1, (load addr:$src2))),
+                 (implicit EFLAGS)]>;
 def SUB16rm : I<0x2B, MRMSrcMem, (outs GR16:$dst),
                                  (ins GR16:$src1, i16mem:$src2),
                 "sub{w}\t{$src2, $dst|$dst, $src2}",
-                [(set GR16:$dst, (sub GR16:$src1, (load addr:$src2)))]>, OpSize;
+                [(set GR16:$dst, (sub GR16:$src1, (load addr:$src2))),
+                 (implicit EFLAGS)]>, OpSize;
 def SUB32rm : I<0x2B, MRMSrcMem, (outs GR32:$dst),
                                  (ins GR32:$src1, i32mem:$src2),
                 "sub{l}\t{$src2, $dst|$dst, $src2}",
-                [(set GR32:$dst, (sub GR32:$src1, (load addr:$src2)))]>;
-
-// Register-Memory Subtraction with Overflow
-def SUBOvf8rm  : I<0x2A, MRMSrcMem, (outs GR8:$dst),
-                                    (ins GR8:$src1, i8mem:$src2),
-                    "sub{b}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR8:$dst, (X86sub_ovf GR8:$src1, (load addr:$src2))),
-                     (implicit EFLAGS)]>;
-def SUBOvf16rm : I<0x2B, MRMSrcMem, (outs GR16:$dst),
-                                    (ins GR16:$src1, i16mem:$src2),
-                   "sub{w}\t{$src2, $dst|$dst, $src2}",
-                   [(set GR16:$dst, (X86sub_ovf GR16:$src1, (load addr:$src2))),
-                    (implicit EFLAGS)]>, OpSize;
-def SUBOvf32rm : I<0x2B, MRMSrcMem, (outs GR32:$dst),
-                                    (ins GR32:$src1, i32mem:$src2),
-                   "sub{l}\t{$src2, $dst|$dst, $src2}",
-                   [(set GR32:$dst, (X86sub_ovf GR32:$src1, (load addr:$src2))),
-                    (implicit EFLAGS)]>;
+                [(set GR32:$dst, (sub GR32:$src1, (load addr:$src2))),
+                 (implicit EFLAGS)]>;
 
 // Register-Integer Subtraction
 def SUB8ri   : Ii8 <0x80, MRM5r, (outs GR8:$dst),
                                  (ins GR8:$src1, i8imm:$src2),
                     "sub{b}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR8:$dst, (sub GR8:$src1, imm:$src2))]>;
+                    [(set GR8:$dst, (sub GR8:$src1, imm:$src2)),
+                     (implicit EFLAGS)]>;
 def SUB16ri  : Ii16<0x81, MRM5r, (outs GR16:$dst),
                                  (ins GR16:$src1, i16imm:$src2),
                     "sub{w}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR16:$dst, (sub GR16:$src1, imm:$src2))]>, OpSize;
+                    [(set GR16:$dst, (sub GR16:$src1, imm:$src2)),
+                     (implicit EFLAGS)]>, OpSize;
 def SUB32ri  : Ii32<0x81, MRM5r, (outs GR32:$dst),
                                  (ins GR32:$src1, i32imm:$src2),
                     "sub{l}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR32:$dst, (sub GR32:$src1, imm:$src2))]>;
+                    [(set GR32:$dst, (sub GR32:$src1, imm:$src2)),
+                     (implicit EFLAGS)]>;
 def SUB16ri8 : Ii8<0x83, MRM5r, (outs GR16:$dst),
                                 (ins GR16:$src1, i16i8imm:$src2),
                    "sub{w}\t{$src2, $dst|$dst, $src2}",
-                   [(set GR16:$dst, (sub GR16:$src1, i16immSExt8:$src2))]>,
-                   OpSize;
+                   [(set GR16:$dst, (sub GR16:$src1, i16immSExt8:$src2)),
+                    (implicit EFLAGS)]>, OpSize;
 def SUB32ri8 : Ii8<0x83, MRM5r, (outs GR32:$dst),
                                 (ins GR32:$src1, i32i8imm:$src2),
                    "sub{l}\t{$src2, $dst|$dst, $src2}",
-                   [(set GR32:$dst, (sub GR32:$src1, i32immSExt8:$src2))]>;
-
-// Register-Integer Subtraction with Overflow
-def SUBOvf8ri   : Ii8 <0x80, MRM5r, (outs GR8:$dst),
-                                    (ins GR8:$src1, i8imm:$src2),
-                       "sub{b}\t{$src2, $dst|$dst, $src2}",
-                       [(set GR8:$dst, (X86sub_ovf GR8:$src1, imm:$src2)),
-                        (implicit EFLAGS)]>;
-def SUBOvf16ri  : Ii16<0x81, MRM5r, (outs GR16:$dst),
-                                    (ins GR16:$src1, i16imm:$src2),
-                       "sub{w}\t{$src2, $dst|$dst, $src2}",
-                       [(set GR16:$dst, (X86sub_ovf GR16:$src1, imm:$src2)),
-                        (implicit EFLAGS)]>, OpSize;
-def SUBOvf32ri  : Ii32<0x81, MRM5r, (outs GR32:$dst),
-                                    (ins GR32:$src1, i32imm:$src2),
-                       "sub{l}\t{$src2, $dst|$dst, $src2}",
-                       [(set GR32:$dst, (X86sub_ovf GR32:$src1, imm:$src2)),
-                        (implicit EFLAGS)]>;
-def SUBOvf16ri8 : Ii8<0x83, MRM5r, (outs GR16:$dst),
-                                   (ins GR16:$src1, i16i8imm:$src2),
-                      "sub{w}\t{$src2, $dst|$dst, $src2}",
-                      [(set GR16:$dst, (X86sub_ovf GR16:$src1,
-                                                   i16immSExt8:$src2)),
-                       (implicit EFLAGS)]>, OpSize;
-def SUBOvf32ri8 : Ii8<0x83, MRM5r, (outs GR32:$dst),
-                                   (ins GR32:$src1, i32i8imm:$src2),
-                      "sub{l}\t{$src2, $dst|$dst, $src2}",
-                      [(set GR32:$dst, (X86sub_ovf GR32:$src1,
-                                                   i32immSExt8:$src2)),
-                       (implicit EFLAGS)]>;
+                   [(set GR32:$dst, (sub GR32:$src1, i32immSExt8:$src2)),
+                    (implicit EFLAGS)]>;
 
 let isTwoAddress = 0 in {
   // Memory-Register Subtraction
   def SUB8mr   : I<0x28, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src2),
                    "sub{b}\t{$src2, $dst|$dst, $src2}",
-                   [(store (sub (load addr:$dst), GR8:$src2), addr:$dst)]>;
+                   [(store (sub (load addr:$dst), GR8:$src2), addr:$dst),
+                    (implicit EFLAGS)]>;
   def SUB16mr  : I<0x29, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2),
                    "sub{w}\t{$src2, $dst|$dst, $src2}",
-                   [(store (sub (load addr:$dst), GR16:$src2), addr:$dst)]>,
-                   OpSize;
+                   [(store (sub (load addr:$dst), GR16:$src2), addr:$dst),
+                    (implicit EFLAGS)]>, OpSize;
   def SUB32mr  : I<0x29, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), 
                    "sub{l}\t{$src2, $dst|$dst, $src2}",
-                   [(store (sub (load addr:$dst), GR32:$src2), addr:$dst)]>;
-
-  // Memory-Register Subtraction with Overflow
-  def SUBOvf8mr  : I<0x28, MRMDestMem, (outs), (ins i8mem :$dst, GR8 :$src2),
-                     "sub{b}\t{$src2, $dst|$dst, $src2}",
-                     [(store (X86sub_ovf (load addr:$dst), GR8:$src2),
-                                         addr:$dst),
-                      (implicit EFLAGS)]>;
-  def SUBOvf16mr : I<0x29, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2),
-                     "sub{w}\t{$src2, $dst|$dst, $src2}",
-                     [(store (X86sub_ovf (load addr:$dst), GR16:$src2),
-                                         addr:$dst),
-                      (implicit EFLAGS)]>, OpSize;
-  def SUBOvf32mr : I<0x29, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), 
-                     "sub{l}\t{$src2, $dst|$dst, $src2}",
-                     [(store (X86sub_ovf (load addr:$dst), GR32:$src2),
-                                         addr:$dst),
-                      (implicit EFLAGS)]>;
+                   [(store (sub (load addr:$dst), GR32:$src2), addr:$dst),
+                    (implicit EFLAGS)]>;
 
   // Memory-Integer Subtraction
   def SUB8mi   : Ii8<0x80, MRM5m, (outs), (ins i8mem :$dst, i8imm:$src2), 
                      "sub{b}\t{$src2, $dst|$dst, $src2}",
-                     [(store (sub (loadi8 addr:$dst), imm:$src2), addr:$dst)]>;
+                     [(store (sub (loadi8 addr:$dst), imm:$src2), addr:$dst),
+                      (implicit EFLAGS)]>;
   def SUB16mi  : Ii16<0x81, MRM5m, (outs), (ins i16mem:$dst, i16imm:$src2), 
                       "sub{w}\t{$src2, $dst|$dst, $src2}",
-                      [(store (sub (loadi16 addr:$dst), imm:$src2),addr:$dst)]>,
-                      OpSize;
+                      [(store (sub (loadi16 addr:$dst), imm:$src2),addr:$dst),
+                       (implicit EFLAGS)]>, OpSize;
   def SUB32mi  : Ii32<0x81, MRM5m, (outs), (ins i32mem:$dst, i32imm:$src2), 
                       "sub{l}\t{$src2, $dst|$dst, $src2}",
-                      [(store (sub (loadi32 addr:$dst), imm:$src2),addr:$dst)]>;
+                      [(store (sub (loadi32 addr:$dst), imm:$src2),addr:$dst),
+                       (implicit EFLAGS)]>;
   def SUB16mi8 : Ii8<0x83, MRM5m, (outs), (ins i16mem:$dst, i16i8imm :$src2), 
                      "sub{w}\t{$src2, $dst|$dst, $src2}",
                      [(store (sub (load addr:$dst), i16immSExt8:$src2),
-                             addr:$dst)]>, OpSize;
+                             addr:$dst),
+                      (implicit EFLAGS)]>, OpSize;
   def SUB32mi8 : Ii8<0x83, MRM5m, (outs), (ins i32mem:$dst, i32i8imm :$src2),
                      "sub{l}\t{$src2, $dst|$dst, $src2}",
                      [(store (sub (load addr:$dst), i32immSExt8:$src2),
-                             addr:$dst)]>;
-
-  // Memory-Integer Subtraction with Overflow
-  def SUBOvf8mi   : Ii8<0x80, MRM5m, (outs), (ins i8mem :$dst, i8imm:$src2), 
-                        "sub{b}\t{$src2, $dst|$dst, $src2}",
-                        [(store (X86sub_ovf (loadi8 addr:$dst), imm:$src2),
-                                addr:$dst),
-                         (implicit EFLAGS)]>;
-  def SUBOvf16mi  : Ii16<0x81, MRM5m, (outs), (ins i16mem:$dst, i16imm:$src2), 
-                         "sub{w}\t{$src2, $dst|$dst, $src2}",
-                         [(store (X86sub_ovf (loadi16 addr:$dst), imm:$src2),
-                                 addr:$dst),
-                          (implicit EFLAGS)]>, OpSize;
-  def SUBOvf32mi  : Ii32<0x81, MRM5m, (outs), (ins i32mem:$dst, i32imm:$src2), 
-                         "sub{l}\t{$src2, $dst|$dst, $src2}",
-                         [(store (X86sub_ovf (loadi32 addr:$dst), imm:$src2),
-                                             addr:$dst),
-                          (implicit EFLAGS)]>;
-  def SUBOvf16mi8 : Ii8<0x83, MRM5m, (outs), (ins i16mem:$dst, i16i8imm :$src2), 
-                        "sub{w}\t{$src2, $dst|$dst, $src2}",
-                        [(store (X86sub_ovf (load addr:$dst),i16immSExt8:$src2),
-                                            addr:$dst),
-                         (implicit EFLAGS)]>, OpSize;
-  def SUBOvf32mi8 : Ii8<0x83, MRM5m, (outs), (ins i32mem:$dst, i32i8imm :$src2), 
-                        "sub{l}\t{$src2, $dst|$dst, $src2}",
-                        [(store (X86sub_ovf (load addr:$dst),i32immSExt8:$src2),
-                                            addr:$dst),
-                         (implicit EFLAGS)]>;
+                             addr:$dst),
+                      (implicit EFLAGS)]>;
 }
 
 let Uses = [EFLAGS] in {
@@ -2380,143 +2212,77 @@
 
 let Defs = [EFLAGS] in {
 let isCommutable = 1 in {  // X = IMUL Y, Z --> X = IMUL Z, Y
-// Register-Register Integer Multiply
+// Register-Register Signed Integer Multiply
 def IMUL16rr : I<0xAF, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src1,GR16:$src2),
                  "imul{w}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR16:$dst, (mul GR16:$src1, GR16:$src2))]>, TB, OpSize;
+                 [(set GR16:$dst, (mul GR16:$src1, GR16:$src2)),
+                  (implicit EFLAGS)]>, TB, OpSize;
 def IMUL32rr : I<0xAF, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1,GR32:$src2),
                  "imul{l}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR32:$dst, (mul GR32:$src1, GR32:$src2))]>, TB;
-
-// Register-Register Integer Multiply
-def IMULOvf16rr : I<0xAF, MRMSrcReg, (outs GR16:$dst),
-                                     (ins GR16:$src1, GR16:$src2),
-                    "imul{w}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR16:$dst, (X86mul_ovf GR16:$src1, GR16:$src2)),
-                     (implicit EFLAGS)]>, TB, OpSize;
-def IMULOvf32rr : I<0xAF, MRMSrcReg, (outs GR32:$dst),
-                                     (ins GR32:$src1, GR32:$src2),
-                    "imul{l}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR32:$dst, (X86mul_ovf GR32:$src1, GR32:$src2)),
-                     (implicit EFLAGS)]>, TB;
+                 [(set GR32:$dst, (mul GR32:$src1, GR32:$src2)),
+                  (implicit EFLAGS)]>, TB;
 }
 
-// Register-Memory Integer Multiply
+// Register-Memory Signed Integer Multiply
 def IMUL16rm : I<0xAF, MRMSrcMem, (outs GR16:$dst),
                                   (ins GR16:$src1, i16mem:$src2),
                  "imul{w}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR16:$dst, (mul GR16:$src1, (load addr:$src2)))]>,
-                 TB, OpSize;
+                 [(set GR16:$dst, (mul GR16:$src1, (load addr:$src2))),
+                  (implicit EFLAGS)]>, TB, OpSize;
 def IMUL32rm : I<0xAF, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2),
                  "imul{l}\t{$src2, $dst|$dst, $src2}",
-                 [(set GR32:$dst, (mul GR32:$src1, (load addr:$src2)))]>, TB;
-
-// Register-Memory Integer Multiply with Overflow
-def IMULOvf16rm : I<0xAF, MRMSrcMem, (outs GR16:$dst),
-                                     (ins GR16:$src1, i16mem:$src2),
-                    "imul{w}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR16:$dst, (X86mul_ovf GR16:$src1,(load addr:$src2))),
-                     (implicit EFLAGS)]>,
-                    TB, OpSize;
-def IMULOvf32rm : I<0xAF, MRMSrcMem, (outs GR32:$dst),
-                                     (ins GR32:$src1, i32mem:$src2),
-                    "imul{l}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR32:$dst, (X86mul_ovf GR32:$src1,(load addr:$src2))),
-                     (implicit EFLAGS)]>, TB;
+                 [(set GR32:$dst, (mul GR32:$src1, (load addr:$src2))),
+                  (implicit EFLAGS)]>, TB;
 } // Defs = [EFLAGS]
 } // end Two Address instructions
 
 // Suprisingly enough, these are not two address instructions!
 let Defs = [EFLAGS] in {
-// Register-Integer Integer Multiply
+// Register-Integer Signed Integer Multiply
 def IMUL16rri  : Ii16<0x69, MRMSrcReg,                      // GR16 = GR16*I16
                       (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2),
                       "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                      [(set GR16:$dst, (mul GR16:$src1, imm:$src2))]>, OpSize;
+                      [(set GR16:$dst, (mul GR16:$src1, imm:$src2)),
+                       (implicit EFLAGS)]>, OpSize;
 def IMUL32rri  : Ii32<0x69, MRMSrcReg,                      // GR32 = GR32*I32
                       (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2),
                       "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                      [(set GR32:$dst, (mul GR32:$src1, imm:$src2))]>;
+                      [(set GR32:$dst, (mul GR32:$src1, imm:$src2)),
+                       (implicit EFLAGS)]>;
 def IMUL16rri8 : Ii8<0x6B, MRMSrcReg,                       // GR16 = GR16*I8
                      (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2),
                      "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                     [(set GR16:$dst, (mul GR16:$src1, i16immSExt8:$src2))]>,
-                     OpSize;
+                     [(set GR16:$dst, (mul GR16:$src1, i16immSExt8:$src2)),
+                      (implicit EFLAGS)]>, OpSize;
 def IMUL32rri8 : Ii8<0x6B, MRMSrcReg,                       // GR32 = GR32*I8
                      (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2),
                      "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                     [(set GR32:$dst, (mul GR32:$src1, i32immSExt8:$src2))]>;
-
-// Register-Integer Integer Multiply with Overflow
-def IMULOvf16rri  : Ii16<0x69, MRMSrcReg,                   // GR16 = GR16*I16
-                        (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2),
-                        "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                        [(set GR16:$dst, (X86mul_ovf GR16:$src1, imm:$src2)),
-                         (implicit EFLAGS)]>, OpSize;
-def IMULOvf32rri  : Ii32<0x69, MRMSrcReg,                   // GR32 = GR32*I32
-                        (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2),
-                        "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                        [(set GR32:$dst, (X86mul_ovf GR32:$src1, imm:$src2)),
-                         (implicit EFLAGS)]>;
-def IMULOvf16rri8 : Ii8<0x6B, MRMSrcReg,                    // GR16 = GR16*I8
-                       (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2),
-                       "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                       [(set GR16:$dst, (X86mul_ovf GR16:$src1,
-                                         i16immSExt8:$src2)),
-                        (implicit EFLAGS)]>, OpSize;
-def IMULOvf32rri8 : Ii8<0x6B, MRMSrcReg,                    // GR32 = GR32*I8
-                       (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2),
-                       "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                       [(set GR32:$dst, (X86mul_ovf GR32:$src1,
-                                         i32immSExt8:$src2)),
-                        (implicit EFLAGS)]>;
+                     [(set GR32:$dst, (mul GR32:$src1, i32immSExt8:$src2)),
+                      (implicit EFLAGS)]>;
 
-// Memory-Integer Integer Multiply
+// Memory-Integer Signed Integer Multiply
 def IMUL16rmi  : Ii16<0x69, MRMSrcMem,                      // GR16 = [mem16]*I16
                       (outs GR16:$dst), (ins i16mem:$src1, i16imm:$src2),
                       "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                      [(set GR16:$dst, (mul (load addr:$src1), imm:$src2))]>,
-                      OpSize;
+                      [(set GR16:$dst, (mul (load addr:$src1), imm:$src2)),
+                       (implicit EFLAGS)]>, OpSize;
 def IMUL32rmi  : Ii32<0x69, MRMSrcMem,                      // GR32 = [mem32]*I32
                       (outs GR32:$dst), (ins i32mem:$src1, i32imm:$src2),
                       "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                      [(set GR32:$dst, (mul (load addr:$src1), imm:$src2))]>;
+                      [(set GR32:$dst, (mul (load addr:$src1), imm:$src2)),
+                       (implicit EFLAGS)]>;
 def IMUL16rmi8 : Ii8<0x6B, MRMSrcMem,                       // GR16 = [mem16]*I8
                      (outs GR16:$dst), (ins i16mem:$src1, i16i8imm :$src2),
                      "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
                      [(set GR16:$dst, (mul (load addr:$src1),
-                                       i16immSExt8:$src2))]>, OpSize;
+                                       i16immSExt8:$src2)),
+                      (implicit EFLAGS)]>, OpSize;
 def IMUL32rmi8 : Ii8<0x6B, MRMSrcMem,                       // GR32 = [mem32]*I8
                      (outs GR32:$dst), (ins i32mem:$src1, i32i8imm: $src2),
                      "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
                      [(set GR32:$dst, (mul (load addr:$src1),
-                                           i32immSExt8:$src2))]>;
-
-// Memory-Integer Integer Multiply with Overflow
-def IMULOvf16rmi  : Ii16<0x69, MRMSrcMem,                   // GR16 = [mem16]*I16
-                        (outs GR16:$dst), (ins i16mem:$src1, i16imm:$src2),
-                        "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                        [(set GR16:$dst, (X86mul_ovf (load addr:$src1),
-                                                     imm:$src2)),
-                         (implicit EFLAGS)]>, OpSize;
-def IMULOvf32rmi  : Ii32<0x69, MRMSrcMem,                   // GR32 = [mem32]*I32
-                        (outs GR32:$dst), (ins i32mem:$src1, i32imm:$src2),
-                        "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                        [(set GR32:$dst, (X86mul_ovf (load addr:$src1),
-                                                     imm:$src2)),
-                         (implicit EFLAGS)]>;
-def IMULOvf16rmi8 : Ii8<0x6B, MRMSrcMem,                    // GR16 = [mem16]*I8
-                        (outs GR16:$dst), (ins i16mem:$src1, i16i8imm :$src2),
-                        "imul{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                        [(set GR16:$dst, (X86mul_ovf (load addr:$src1),
-                                                     i16immSExt8:$src2)),
-                         (implicit EFLAGS)]>, OpSize;
-def IMULOvf32rmi8 : Ii8<0x6B, MRMSrcMem,                    // GR32 = [mem32]*I8
-                        (outs GR32:$dst), (ins i32mem:$src1, i32i8imm: $src2),
-                        "imul{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
-                        [(set GR32:$dst, (X86mul_ovf (load addr:$src1),
-                                                     i32immSExt8:$src2)),
-                         (implicit EFLAGS)]>;
+                                           i32immSExt8:$src2)),
+                      (implicit EFLAGS)]>;
 } // Defs = [EFLAGS]
 
 //===----------------------------------------------------------------------===//
@@ -3494,6 +3260,207 @@
           (SHLD16mri8 addr:$dst, GR16:$src2, (i8 imm:$amt1))>;
 
 //===----------------------------------------------------------------------===//
+// Overflow Patterns
+//===----------------------------------------------------------------------===//
+
+// Register-Register Addition with Overflow
+def : Pat<(parallel (X86add_ovf GR8:$src1, GR8:$src2),
+                    (implicit EFLAGS)),
+          (ADD8rr GR8:$src1, GR8:$src2)>;
+
+// Register-Register Addition with Overflow
+def : Pat<(parallel (X86add_ovf GR16:$src1, GR16:$src2),
+                    (implicit EFLAGS)),
+          (ADD16rr GR16:$src1, GR16:$src2)>;
+def : Pat<(parallel (X86add_ovf GR32:$src1, GR32:$src2),
+                    (implicit EFLAGS)),
+          (ADD32rr GR32:$src1, GR32:$src2)>;
+
+// Register-Memory Addition with Overflow
+def : Pat<(parallel (X86add_ovf GR8:$src1, (load addr:$src2)),
+                    (implicit EFLAGS)),
+          (ADD8rm GR8:$src1, addr:$src2)>;
+def : Pat<(parallel (X86add_ovf GR16:$src1, (load addr:$src2)),
+                    (implicit EFLAGS)),
+          (ADD16rm GR16:$src1, addr:$src2)>;
+def : Pat<(parallel (X86add_ovf GR32:$src1, (load addr:$src2)),
+                    (implicit EFLAGS)),
+          (ADD32rm GR32:$src1, addr:$src2)>;
+
+// Register-Integer Addition with Overflow
+def : Pat<(parallel (X86add_ovf GR8:$src1, imm:$src2),
+                    (implicit EFLAGS)),
+          (ADD8ri GR8:$src1, imm:$src2)>;
+
+// Register-Integer Addition with Overflow
+def : Pat<(parallel (X86add_ovf GR16:$src1, imm:$src2),
+                    (implicit EFLAGS)),
+          (ADD16ri GR16:$src1, imm:$src2)>;
+def : Pat<(parallel (X86add_ovf GR32:$src1, imm:$src2),
+                    (implicit EFLAGS)),
+          (ADD32ri GR32:$src1, imm:$src2)>;
+def : Pat<(parallel (X86add_ovf GR16:$src1, i16immSExt8:$src2),
+                    (implicit EFLAGS)),
+          (ADD16ri8 GR16:$src1, i16immSExt8:$src2)>;
+def : Pat<(parallel (X86add_ovf GR32:$src1, i32immSExt8:$src2),
+                    (implicit EFLAGS)),
+          (ADD32ri8 GR32:$src1, i32immSExt8:$src2)>;
+
+// Memory-Register Addition with Overflow
+def : Pat<(parallel (store (X86add_ovf (load addr:$dst), GR8:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (ADD8mr addr:$dst, GR8:$src2)>;
+def : Pat<(parallel (store (X86add_ovf (load addr:$dst), GR16:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (ADD16mr addr:$dst, GR16:$src2)>;
+def : Pat<(parallel (store (X86add_ovf (load addr:$dst), GR32:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (ADD32mr addr:$dst, GR32:$src2)>;
+def : Pat<(parallel (store (X86add_ovf (loadi8 addr:$dst), imm:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (ADD8mi addr:$dst, imm:$src2)>;
+def : Pat<(parallel (store (X86add_ovf (loadi16 addr:$dst), imm:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (ADD16mi addr:$dst, imm:$src2)>;
+def : Pat<(parallel (store (X86add_ovf (loadi32 addr:$dst), imm:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (ADD32mi addr:$dst, imm:$src2)>;
+def : Pat<(parallel (store (X86add_ovf (load addr:$dst), i16immSExt8:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (ADD16mi8 addr:$dst, i16immSExt8:$src2)>;
+def : Pat<(parallel (store (X86add_ovf (load addr:$dst), i32immSExt8:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (ADD32mi8 addr:$dst, i32immSExt8:$src2)>;
+
+// Register-Register Subtraction with Overflow
+def : Pat<(parallel (X86sub_ovf GR8:$src1, GR8:$src2),
+                    (implicit EFLAGS)),
+          (SUB8rr GR8:$src1, GR8:$src2)>;
+def : Pat<(parallel (X86sub_ovf GR16:$src1, GR16:$src2),
+                    (implicit EFLAGS)),
+          (SUB16rr GR16:$src1, GR16:$src2)>;
+def : Pat<(parallel (X86sub_ovf GR32:$src1, GR32:$src2),
+                    (implicit EFLAGS)),
+          (SUB32rr GR32:$src1, GR32:$src2)>;
+
+// Register-Memory Subtraction with Overflow
+def : Pat<(parallel (X86sub_ovf GR8:$src1, (load addr:$src2)),
+                    (implicit EFLAGS)),
+          (SUB8rm GR8:$src1, addr:$src2)>;
+def : Pat<(parallel (X86sub_ovf GR16:$src1, (load addr:$src2)),
+                    (implicit EFLAGS)),
+          (SUB16rm GR16:$src1, addr:$src2)>;
+def : Pat<(parallel (X86sub_ovf GR32:$src1, (load addr:$src2)),
+                    (implicit EFLAGS)),
+          (SUB32rm GR32:$src1, addr:$src2)>;
+
+// Register-Integer Subtraction with Overflow
+def : Pat<(parallel (X86sub_ovf GR8:$src1, imm:$src2),
+                    (implicit EFLAGS)),
+          (SUB8ri GR8:$src1, imm:$src2)>;
+def : Pat<(parallel (X86sub_ovf GR16:$src1, imm:$src2),
+                    (implicit EFLAGS)),
+          (SUB16ri GR16:$src1, imm:$src2)>;
+def : Pat<(parallel (X86sub_ovf GR32:$src1, imm:$src2),
+                    (implicit EFLAGS)),
+          (SUB32ri GR32:$src1, imm:$src2)>;
+def : Pat<(parallel (X86sub_ovf GR16:$src1, i16immSExt8:$src2),
+                    (implicit EFLAGS)),
+          (SUB16ri8 GR16:$src1, i16immSExt8:$src2)>;
+def : Pat<(parallel (X86sub_ovf GR32:$src1, i32immSExt8:$src2),
+                    (implicit EFLAGS)),
+          (SUB32ri8 GR32:$src1, i32immSExt8:$src2)>;
+
+// Memory-Register Subtraction with Overflow
+def : Pat<(parallel (store (X86sub_ovf (load addr:$dst), GR8:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (SUB8mr addr:$dst, GR8:$src2)>;
+def : Pat<(parallel (store (X86sub_ovf (load addr:$dst), GR16:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (SUB16mr addr:$dst, GR16:$src2)>;
+def : Pat<(parallel (store (X86sub_ovf (load addr:$dst), GR32:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (SUB32mr addr:$dst, GR32:$src2)>;
+
+// Memory-Integer Subtraction with Overflow
+def : Pat<(parallel (store (X86sub_ovf (loadi8 addr:$dst), imm:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (SUB8mi addr:$dst, imm:$src2)>;
+def : Pat<(parallel (store (X86sub_ovf (loadi16 addr:$dst), imm:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (SUB16mi addr:$dst, imm:$src2)>;
+def : Pat<(parallel (store (X86sub_ovf (loadi32 addr:$dst), imm:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (SUB32mi addr:$dst, imm:$src2)>;
+def : Pat<(parallel (store (X86sub_ovf (load addr:$dst), i16immSExt8:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (SUB16mi8 addr:$dst, i16immSExt8:$src2)>;
+def : Pat<(parallel (store (X86sub_ovf (load addr:$dst), i32immSExt8:$src2),
+                           addr:$dst),
+                    (implicit EFLAGS)),
+          (SUB32mi8 addr:$dst, i32immSExt8:$src2)>;
+
+
+// Register-Register Signed Integer Multiply with Overflow
+def : Pat<(parallel (X86smul_ovf GR16:$src1, GR16:$src2),
+                    (implicit EFLAGS)),
+          (IMUL16rr GR16:$src1, GR16:$src2)>;
+def : Pat<(parallel (X86smul_ovf GR32:$src1, GR32:$src2),
+                    (implicit EFLAGS)),
+          (IMUL32rr GR32:$src1, GR32:$src2)>;
+
+// Register-Memory Signed Integer Multiply with Overflow
+def : Pat<(parallel (X86smul_ovf GR16:$src1, (load addr:$src2)),
+                    (implicit EFLAGS)),
+          (IMUL16rm GR16:$src1, addr:$src2)>;
+def : Pat<(parallel (X86smul_ovf GR32:$src1, (load addr:$src2)),
+                    (implicit EFLAGS)),
+          (IMUL32rm GR32:$src1, addr:$src2)>;
+
+// Register-Integer Signed Integer Multiply with Overflow
+def : Pat<(parallel (X86smul_ovf GR16:$src1, imm:$src2),
+                    (implicit EFLAGS)),
+          (IMUL16rri GR16:$src1, imm:$src2)>;
+def : Pat<(parallel (X86smul_ovf GR32:$src1, imm:$src2),
+                    (implicit EFLAGS)),
+          (IMUL32rri GR32:$src1, imm:$src2)>;
+def : Pat<(parallel (X86smul_ovf GR16:$src1, i16immSExt8:$src2),
+                    (implicit EFLAGS)),
+          (IMUL16rri8 GR16:$src1, i16immSExt8:$src2)>;
+def : Pat<(parallel (X86smul_ovf GR32:$src1, i32immSExt8:$src2),
+                    (implicit EFLAGS)),
+          (IMUL32rri8 GR32:$src1, i32immSExt8:$src2)>;
+
+// Memory-Integer Signed Integer Multiply with Overflow
+def : Pat<(parallel (X86smul_ovf (load addr:$src1), imm:$src2),
+                    (implicit EFLAGS)),
+          (IMUL16rmi addr:$src1, imm:$src2)>;
+def : Pat<(parallel (X86smul_ovf (load addr:$src1), imm:$src2),
+                    (implicit EFLAGS)),
+          (IMUL32rmi addr:$src1, imm:$src2)>;
+def : Pat<(parallel (X86smul_ovf (load addr:$src1), i16immSExt8:$src2),
+                    (implicit EFLAGS)),
+          (IMUL16rmi8 addr:$src1, i16immSExt8:$src2)>;
+def : Pat<(parallel (X86smul_ovf (load addr:$src1), i32immSExt8:$src2),
+                    (implicit EFLAGS)),
+          (IMUL32rmi8 addr:$src1, i32immSExt8:$src2)>;
+
+//===----------------------------------------------------------------------===//
 // Floating Point Stack Support
 //===----------------------------------------------------------------------===//
 

Removed: llvm/trunk/test/CodeGen/X86/mul-with-overflow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-with-overflow.ll?rev=60962&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-with-overflow.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-with-overflow.ll (removed)
@@ -1,41 +0,0 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep {jo} | count 1
-; RUN: llvm-as < %s | llc -march=x86 | grep {jc} | count 1
-
- at ok = internal constant [4 x i8] c"%d\0A\00"
- at no = internal constant [4 x i8] c"no\0A\00"
-
-define i1 @func1(i32 %v1, i32 %v2) nounwind {
-entry:
-  %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
-  %sum = extractvalue {i32, i1} %t, 0
-  %obit = extractvalue {i32, i1} %t, 1
-  br i1 %obit, label %overflow, label %normal
-
-normal:
-  %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
-  ret i1 true
-
-overflow:
-  %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
-  ret i1 false
-}
-
-define i1 @func2(i32 %v1, i32 %v2) nounwind {
-entry:
-  %t = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %v1, i32 %v2)
-  %sum = extractvalue {i32, i1} %t, 0
-  %obit = extractvalue {i32, i1} %t, 1
-  br i1 %obit, label %carry, label %normal
-
-normal:
-  %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
-  ret i1 true
-
-carry:
-  %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
-  ret i1 false
-}
-
-declare i32 @printf(i8*, ...) nounwind
-declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32)
-declare {i32, i1} @llvm.umul.with.overflow.i32(i32, i32)

Added: llvm/trunk/test/CodeGen/X86/smul-with-overflow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/smul-with-overflow.ll?rev=60963&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/smul-with-overflow.ll (added)
+++ llvm/trunk/test/CodeGen/X86/smul-with-overflow.ll Fri Dec 12 15:15:41 2008
@@ -0,0 +1,23 @@
+; RUN: llvm-as < %s | llc -march=x86 | grep {jo} | count 1
+
+ at ok = internal constant [4 x i8] c"%d\0A\00"
+ at no = internal constant [4 x i8] c"no\0A\00"
+
+define i1 @func1(i32 %v1, i32 %v2) nounwind {
+entry:
+  %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
+  %sum = extractvalue {i32, i1} %t, 0
+  %obit = extractvalue {i32, i1} %t, 1
+  br i1 %obit, label %overflow, label %normal
+
+normal:
+  %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
+  ret i1 true
+
+overflow:
+  %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
+  ret i1 false
+}
+
+declare i32 @printf(i8*, ...) nounwind
+declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32)

Copied: llvm/trunk/test/CodeGen/X86/umul-with-carry.ll (from r60951, llvm/trunk/test/CodeGen/X86/mul-with-overflow.ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/umul-with-carry.ll?p2=llvm/trunk/test/CodeGen/X86/umul-with-carry.ll&p1=llvm/trunk/test/CodeGen/X86/mul-with-overflow.ll&r1=60951&r2=60963&rev=60963&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-with-overflow.ll (original)
+++ llvm/trunk/test/CodeGen/X86/umul-with-carry.ll Fri Dec 12 15:15:41 2008
@@ -1,26 +1,12 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep {jo} | count 1
 ; RUN: llvm-as < %s | llc -march=x86 | grep {jc} | count 1
+; XFAIL: *
+
+; FIXME: umul-with-overflow not supported yet.
 
 @ok = internal constant [4 x i8] c"%d\0A\00"
 @no = internal constant [4 x i8] c"no\0A\00"
 
-define i1 @func1(i32 %v1, i32 %v2) nounwind {
-entry:
-  %t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
-  %sum = extractvalue {i32, i1} %t, 0
-  %obit = extractvalue {i32, i1} %t, 1
-  br i1 %obit, label %overflow, label %normal
-
-normal:
-  %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
-  ret i1 true
-
-overflow:
-  %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
-  ret i1 false
-}
-
-define i1 @func2(i32 %v1, i32 %v2) nounwind {
+define i1 @func(i32 %v1, i32 %v2) nounwind {
 entry:
   %t = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %v1, i32 %v2)
   %sum = extractvalue {i32, i1} %t, 0
@@ -37,5 +23,4 @@
 }
 
 declare i32 @printf(i8*, ...) nounwind
-declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32)
 declare {i32, i1} @llvm.umul.with.overflow.i32(i32, i32)




From isanbard at gmail.com  Fri Dec 12 15:17:27 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Fri, 12 Dec 2008 13:17:27 -0800
Subject: [llvm-commits] [llvm] r60915 - in /llvm/trunk/lib:
	CodeGen/SelectionDAG/DAGCombiner.cpp
	Target/X86/X86ISelLowering.cpp Target/X86/X86ISelLowering.h
	Target/X86/X86Instr64bit.td Target/X86/X86InstrInfo.td
In-Reply-To: 
References: <200812120056.mBC0ucER013691@zion.cs.uiuc.edu>
	<4FEBE9BA-1146-4754-9A4F-E3BBAF635CFF@apple.com>
	<7BA3827D-E711-438D-9DDD-F5FB5C1D836D@gmail.com>
	<0936B7B1-D5C9-4F17-BA61-72D371910C96@apple.com>
	<16e5fdf90812120914g5a230cffved0af3a36d78b8b5@mail.gmail.com>
	
Message-ID: <16e5fdf90812121317l7670eb79g52b2496aac9670ff@mail.gmail.com>

On Fri, Dec 12, 2008 at 9:49 AM, Evan Cheng  wrote:
> Thanks. Just to clarify, the correct thing to do is to rename
> ADDOvf32rr to ADD32rr and delete the old ADD32rr. That is, we always
> select to an X86::ADD* instruction that produces two values, with the
> second one being EFLAGS. In the *normal* case, the scheduler will see
> EFLAGS is not used and it will mark it dead.
>
> But make sure you try it on a couple of these instructions first
> before you convert everything over. Just in case I am full of it. :-)
>
That sounds good. I went ahead and changed them. I wasn't able to get
unsigned multiply to work just yet, but will work on that next.

-bw


From baldrick at free.fr  Fri Dec 12 15:47:20 2008
From: baldrick at free.fr (Duncan Sands)
Date: Fri, 12 Dec 2008 21:47:20 -0000
Subject: [llvm-commits] [llvm] r60964 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Message-ID: <200812122147.mBCLlOgj032117@zion.cs.uiuc.edu>

Author: baldrick
Date: Fri Dec 12 15:47:02 2008
New Revision: 60964

URL: http://llvm.org/viewvc/llvm-project?rev=60964&view=rev
Log:
When expanding unaligned loads and stores do not make
use of illegal integer types: instead, use a stack slot
and copying via integer registers.  The existing code
is still used if the bitconvert is to a legal integer
type.

This fires on the PPC testcases 2007-09-08-unaligned.ll
and vec_misaligned.ll.  It looks like equivalent code
is generated with these changes, just permuted, but
it's hard to tell.

With these changes, nothing in LegalizeDAG produces
illegal integer types anymore.  This is a prerequisite
for removing the LegalizeDAG type legalization code.

While there I noticed that the existing code doesn't
handle trunc store of f64 to f32: it turns this into
an i64 store, which represents a 4 byte stack smash.
I added a FIXME about this.  Hopefully someone more
motivated than I am will take care of it.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=60964&r1=60963&r2=60964&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Dec 12 15:47:02 2008
@@ -630,21 +630,64 @@
   int SVOffset = ST->getSrcValueOffset();
   if (ST->getMemoryVT().isFloatingPoint() ||
       ST->getMemoryVT().isVector()) {
-    // Expand to a bitconvert of the value to the integer type of the 
-    // same size, then a (misaligned) int store.
-    MVT intVT;
-    if (VT.is128BitVector() || VT == MVT::ppcf128 || VT == MVT::f128)
-      intVT = MVT::i128;
-    else if (VT.is64BitVector() || VT==MVT::f64)
-      intVT = MVT::i64;
-    else if (VT==MVT::f32)
-      intVT = MVT::i32;
-    else
-      assert(0 && "Unaligned store of unsupported type");
-
-    SDValue Result = DAG.getNode(ISD::BIT_CONVERT, intVT, Val);
-    return DAG.getStore(Chain, Result, Ptr, ST->getSrcValue(),
-                        SVOffset, ST->isVolatile(), Alignment);
+    MVT intVT = MVT::getIntegerVT(VT.getSizeInBits());
+    if (TLI.isTypeLegal(intVT)) {
+      // Expand to a bitconvert of the value to the integer type of the
+      // same size, then a (misaligned) int store.
+      // FIXME: Does not handle truncating floating point stores!
+      SDValue Result = DAG.getNode(ISD::BIT_CONVERT, intVT, Val);
+      return DAG.getStore(Chain, Result, Ptr, ST->getSrcValue(),
+                          SVOffset, ST->isVolatile(), Alignment);
+    } else {
+      // Do a (aligned) store to a stack slot, then copy from the stack slot
+      // to the final destination using (unaligned) integer loads and stores.
+      MVT StoredVT = ST->getMemoryVT();
+      MVT RegVT =
+        TLI.getRegisterType(MVT::getIntegerVT(StoredVT.getSizeInBits()));
+      unsigned StoredBytes = StoredVT.getSizeInBits() / 8;
+      unsigned RegBytes = RegVT.getSizeInBits() / 8;
+      unsigned NumRegs = (StoredBytes + RegBytes - 1) / RegBytes;
+
+      // Make sure the stack slot is wide enough that we can do NumRegs full
+      // width loads from it.
+      SDValue StackPtr = DAG.CreateStackTemporary(StoredVT,
+                                     MVT::getIntegerVT(NumRegs * RegBytes * 8));
+      // Perform the original store only redirected to the stack slot.
+      SDValue Store = DAG.getTruncStore(Chain, Val, StackPtr, NULL, 0,StoredVT);
+      SDValue Increment = DAG.getConstant(RegBytes, TLI.getPointerTy());
+      SmallVector Stores;
+      unsigned Offset = 0;
+
+      // Do all but one copies using the full register width.
+      for (unsigned i = 1; i < NumRegs; i++) {
+        // Load one integer register's worth from the stack slot.
+        SDValue Load = DAG.getLoad(RegVT, Store, StackPtr, NULL, 0);
+        // Store it to the final location.  Remember the store.
+        Stores.push_back(DAG.getStore(Load.getValue(1), Load, Ptr,
+                                      ST->getSrcValue(), SVOffset + Offset,
+                                      ST->isVolatile(),
+                                      MinAlign(ST->getAlignment(), Offset)));
+        // Increment the pointers.
+        Offset += RegBytes;
+        StackPtr = DAG.getNode(ISD::ADD, StackPtr.getValueType(), StackPtr,
+                               Increment);
+        Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr, Increment);
+      }
+
+      // Load one integer register's worth from the stack slot.
+      SDValue Load = DAG.getLoad(RegVT, Store, StackPtr, NULL, 0);
+
+      // The last store may be partial.  Do a truncating store.
+      unsigned BytesLeft = StoredBytes - Offset;
+      Stores.push_back(DAG.getTruncStore(Load.getValue(1), Load, Ptr,
+                                         ST->getSrcValue(), SVOffset + Offset,
+                                         MVT::getIntegerVT(BytesLeft * 8),
+                                         ST->isVolatile(),
+                                         MinAlign(ST->getAlignment(), Offset)));
+      // The order of the stores doesn't matter - say it with a TokenFactor.
+      return DAG.getNode(ISD::TokenFactor, MVT::Other, &Stores[0],
+                         Stores.size());
+    }
   }
   assert(ST->getMemoryVT().isInteger() &&
          !ST->getMemoryVT().isVector() &&
@@ -685,28 +728,74 @@
   MVT VT = LD->getValueType(0);
   MVT LoadedVT = LD->getMemoryVT();
   if (VT.isFloatingPoint() || VT.isVector()) {
-    // Expand to a (misaligned) integer load of the same size,
-    // then bitconvert to floating point or vector.
-    MVT intVT;
-    if (LoadedVT.is128BitVector() ||
-         LoadedVT == MVT::ppcf128 || LoadedVT == MVT::f128)
-      intVT = MVT::i128;
-    else if (LoadedVT.is64BitVector() || LoadedVT == MVT::f64)
-      intVT = MVT::i64;
-    else if (LoadedVT == MVT::f32)
-      intVT = MVT::i32;
-    else
-      assert(0 && "Unaligned load of unsupported type");
-
-    SDValue newLoad = DAG.getLoad(intVT, Chain, Ptr, LD->getSrcValue(),
-                                    SVOffset, LD->isVolatile(), 
+    MVT intVT = MVT::getIntegerVT(LoadedVT.getSizeInBits());
+    if (TLI.isTypeLegal(intVT)) {
+      // Expand to a (misaligned) integer load of the same size,
+      // then bitconvert to floating point or vector.
+      SDValue newLoad = DAG.getLoad(intVT, Chain, Ptr, LD->getSrcValue(),
+                                    SVOffset, LD->isVolatile(),
                                     LD->getAlignment());
-    SDValue Result = DAG.getNode(ISD::BIT_CONVERT, LoadedVT, newLoad);
-    if (VT.isFloatingPoint() && LoadedVT != VT)
-      Result = DAG.getNode(ISD::FP_EXTEND, VT, Result);
+      SDValue Result = DAG.getNode(ISD::BIT_CONVERT, LoadedVT, newLoad);
+      if (VT.isFloatingPoint() && LoadedVT != VT)
+        Result = DAG.getNode(ISD::FP_EXTEND, VT, Result);
 
-    SDValue Ops[] = { Result, Chain };
-    return DAG.getMergeValues(Ops, 2);
+      SDValue Ops[] = { Result, Chain };
+      return DAG.getMergeValues(Ops, 2);
+    } else {
+      // Copy the value to a (aligned) stack slot using (unaligned) integer
+      // loads and stores, then do a (aligned) load from the stack slot.
+      MVT RegVT = TLI.getRegisterType(intVT);
+      unsigned LoadedBytes = LoadedVT.getSizeInBits() / 8;
+      unsigned RegBytes = RegVT.getSizeInBits() / 8;
+      unsigned NumRegs = (LoadedBytes + RegBytes - 1) / RegBytes;
+
+      // Make sure the stack slot wide enough that we can do NumRegs full width
+      // stores to it.
+      SDValue StackBase = DAG.CreateStackTemporary(LoadedVT,
+                                     MVT::getIntegerVT(NumRegs * RegBytes * 8));
+      SDValue Increment = DAG.getConstant(RegBytes, TLI.getPointerTy());
+      SmallVector Stores;
+      SDValue StackPtr = StackBase;
+      unsigned Offset = 0;
+
+      // Do all but one copies using the full register width.
+      for (unsigned i = 1; i < NumRegs; i++) {
+        // Load one integer register's worth from the original location.
+        SDValue Load = DAG.getLoad(RegVT, Chain, Ptr, LD->getSrcValue(),
+                                   SVOffset + Offset, LD->isVolatile(),
+                                   MinAlign(LD->getAlignment(), Offset));
+        // Follow the load with a store to the stack slot.  Remember the store.
+        Stores.push_back(DAG.getStore(Load.getValue(1), Load, StackPtr,
+                                      NULL, 0));
+        // Increment the pointers.
+        Offset += RegBytes;
+        Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr, Increment);
+        StackPtr = DAG.getNode(ISD::ADD, StackPtr.getValueType(), StackPtr,
+                               Increment);
+      }
+
+      // The last copy may be partial.  Do an extending load.
+      unsigned BytesLeft = LoadedBytes - Offset;
+      SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, RegVT, Chain, Ptr,
+                                    LD->getSrcValue(), SVOffset + Offset,
+                                    MVT::getIntegerVT(BytesLeft * 8),
+                                    LD->isVolatile(),
+                                    MinAlign(LD->getAlignment(), Offset));
+      // Follow the load with a store to the stack slot.  Remember the store.
+      Stores.push_back(DAG.getStore(Load.getValue(1), Load, StackPtr, NULL, 0));
+
+      // The order of the stores doesn't matter - say it with a TokenFactor.
+      SDValue TF = DAG.getNode(ISD::TokenFactor, MVT::Other, &Stores[0],
+                               Stores.size());
+
+      // Finally, perform the original load only redirected to the stack slot.
+      Load = DAG.getExtLoad(LD->getExtensionType(), VT, TF, StackBase,
+                            NULL, 0, LoadedVT);
+
+      // Callers expect a MERGE_VALUES node.
+      SDValue Ops[] = { Load, TF };
+      return DAG.getMergeValues(Ops, 2);
+    }
   }
   assert(LoadedVT.isInteger() && !LoadedVT.isVector() &&
          "Unaligned load of unsupported type.");




From dpatel at apple.com  Fri Dec 12 15:58:03 2008
From: dpatel at apple.com (Devang Patel)
Date: Fri, 12 Dec 2008 21:58:03 -0000
Subject: [llvm-commits] [llvm] r60965 -
	/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfWriter.cpp
Message-ID: <200812122158.mBCLw3sx032447@zion.cs.uiuc.edu>

Author: dpatel
Date: Fri Dec 12 15:57:54 2008
New Revision: 60965

URL: http://llvm.org/viewvc/llvm-project?rev=60965&view=rev
Log:
Do not print empty DW_AT_comp_dir.

Modified:
    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfWriter.cpp

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfWriter.cpp?rev=60965&r1=60964&r2=60965&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfWriter.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfWriter.cpp Fri Dec 12 15:57:54 2008
@@ -1805,7 +1805,8 @@
     AddString(Die, DW_AT_producer,  DW_FORM_string, UnitDesc->getProducer());
     AddUInt  (Die, DW_AT_language,  DW_FORM_data1,  UnitDesc->getLanguage());
     AddString(Die, DW_AT_name,      DW_FORM_string, UnitDesc->getFileName());
-    AddString(Die, DW_AT_comp_dir,  DW_FORM_string, UnitDesc->getDirectory());
+    if (!UnitDesc->getDirectory().empty())
+      AddString(Die, DW_AT_comp_dir,  DW_FORM_string, UnitDesc->getDirectory());
 
     // Construct compile unit.
     CompileUnit *Unit = new CompileUnit(UnitDesc, ID, Die);




From dalej at apple.com  Fri Dec 12 16:32:44 2008
From: dalej at apple.com (Dale Johannesen)
Date: Fri, 12 Dec 2008 14:32:44 -0800
Subject: [llvm-commits] [llvm] r60964 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
In-Reply-To: <200812122147.mBCLlOgj032117@zion.cs.uiuc.edu>
References: <200812122147.mBCLlOgj032117@zion.cs.uiuc.edu>
Message-ID: <9D914A02-3A92-454A-B333-8CEB67DB2BEE@apple.com>


On Dec 12, 2008, at 1:47 PMPST, Duncan Sands wrote:
>
> While there I noticed that the existing code doesn't
> handle trunc store of f64 to f32: it turns this into
> an i64 store, which represents a 4 byte stack smash.
> I added a FIXME about this.  Hopefully someone more
> motivated than I am will take care of it.

This only occurs if f64 is not a legal type, right?



From dpatel at apple.com  Fri Dec 12 16:41:51 2008
From: dpatel at apple.com (Devang Patel)
Date: Fri, 12 Dec 2008 22:41:51 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r60967 -
	/llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp
Message-ID: <200812122241.mBCMfqeg001394@zion.cs.uiuc.edu>

Author: dpatel
Date: Fri Dec 12 16:41:51 2008
New Revision: 60967

URL: http://llvm.org/viewvc/llvm-project?rev=60967&view=rev
Log:
Encode member's access level.

Modified:
    llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp

Modified: llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp?rev=60967&r1=60966&r2=60967&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp Fri Dec 12 16:41:51 2008
@@ -588,12 +588,18 @@
           tree FieldNodeType = FieldType(Member);
           DIType MemberType = getOrCreateType(FieldNodeType, Unit);
           const char *MemberName = GetNodeName(Member);
-          
+          unsigned Flags = 0;
+          if (TREE_PROTECTED(Member))
+            Flags = DW_ACCESS_protected;
+          else if (TREE_PRIVATE(Member))
+            Flags = DW_ACCESS_private;
+          else
+            Flags = DW_ACCESS_public;
           DIType DTy =
             DebugFactory.CreateDerivedType(DW_TAG_member, Unit, MemberName,
                                            Unit, MemLoc.line, NodeSizeInBits(Member),
                                            NodeAlignInBits(FieldNodeType),
-                                           0, 0, MemberType);
+                                           0, Flags, MemberType);
           EltTys.push_back(DTy);
         } else {
           DEBUGASSERT(0 && "Unsupported member tree code!");




From dpatel at apple.com  Fri Dec 12 16:42:35 2008
From: dpatel at apple.com (Devang Patel)
Date: Fri, 12 Dec 2008 22:42:35 -0000
Subject: [llvm-commits] [llvm] r60968 -
	/llvm/trunk/test/FrontendC++/2006-09-27-Debug-Protection.cpp
Message-ID: <200812122242.mBCMgZtc001425@zion.cs.uiuc.edu>

Author: dpatel
Date: Fri Dec 12 16:42:35 2008
New Revision: 60968

URL: http://llvm.org/viewvc/llvm-project?rev=60968&view=rev
Log:
Re-enable test.

Modified:
    llvm/trunk/test/FrontendC++/2006-09-27-Debug-Protection.cpp

Modified: llvm/trunk/test/FrontendC++/2006-09-27-Debug-Protection.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2006-09-27-Debug-Protection.cpp?rev=60968&r1=60967&r2=60968&view=diff

==============================================================================
--- llvm/trunk/test/FrontendC++/2006-09-27-Debug-Protection.cpp (original)
+++ llvm/trunk/test/FrontendC++/2006-09-27-Debug-Protection.cpp Fri Dec 12 16:42:35 2008
@@ -1,6 +1,5 @@
 // RUN: %llvmgxx -O0 -emit-llvm -S -g -o - %s | grep {i32 1,}
 // RUN: %llvmgxx -O0 -emit-llvm -S -g -o - %s | grep {i32 2,}
-// XFAIL: *
 class A {
 public:
   int x;




From foldr at codedgers.com  Fri Dec 12 20:29:02 2008
From: foldr at codedgers.com (Mikhail Glushenkov)
Date: Sat, 13 Dec 2008 02:29:02 -0000
Subject: [llvm-commits] [llvm] r60969 - in /llvm/trunk:
 docs/CompilerDriver.html docs/CompilerDriverTutorial.html docs/llvm-rst.css
 tools/llvmc/doc/LLVMC-Reference.rst tools/llvmc/doc/LLVMC-Tutorial.rst
 tools/llvmc/doc/footer.html tools/llvmc/doc/llvm-rst.css
Message-ID: <200812130229.mBD2T2vg008528@zion.cs.uiuc.edu>

Author: foldr
Date: Fri Dec 12 20:28:58 2008
New Revision: 60969

URL: http://llvm.org/viewvc/llvm-project?rev=60969&view=rev
Log:
More cosmetic tweaks for llvmc docs.

Removed:
    llvm/trunk/tools/llvmc/doc/footer.html
Modified:
    llvm/trunk/docs/CompilerDriver.html
    llvm/trunk/docs/CompilerDriverTutorial.html
    llvm/trunk/docs/llvm-rst.css
    llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst
    llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst
    llvm/trunk/tools/llvmc/doc/llvm-rst.css

Modified: llvm/trunk/docs/CompilerDriver.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerDriver.html?rev=60969&r1=60968&r2=60969&view=diff

==============================================================================
--- llvm/trunk/docs/CompilerDriver.html (original)
+++ llvm/trunk/docs/CompilerDriver.html Fri Dec 12 20:28:58 2008
@@ -5,20 +5,41 @@
 
 
 Customizing LLVMC: Reference Manual
-
 
 
 
 
 Customizing LLVMC: Reference Manual
-
---
-
-
-
-

Author: Mikhail Glushenkov <foldr@codedegers.com>
+
+Contents
+
+Introduction
+Compiling with LLVMC
+Predefined options
+Compiling LLVMC plugins
+Customizing LLVMC: the compilation graph
+Describing options
+External options
+
+
+Conditional evaluation
+Writing a tool description
+Actions
+
+
+Language map
+More advanced topics
+Hooks and environment variables
+How plugins are loaded
+Debugging
+
+
+
+
+
+Written by Mikhail Glushenkov
+

+Introduction
 LLVMC is a generic compiler driver, designed to be customizable and
 extensible. It plays the same role for LLVM as the gcc program
 does for GCC - LLVMC's job is essentially to transform a set of input
@@ -31,36 +52,11 @@
 by plugins, which can be either statically or dynamically linked. This
 makes it possible to easily adapt LLVMC for other purposes - for
 example, as a build tool for game resources.
-Because LLVMC employs TableGen [1] as its configuration language, you
+
Because LLVMC employs TableGen as its configuration language, you
 need to be familiar with it to customize LLVMC.
-
-Contents
-
-Compiling with LLVMC
-Predefined options
-Compiling LLVMC plugins
-Customizing LLVMC: the compilation graph
-Describing options
-External options
-
-
-Conditional evaluation
-Writing a tool description
-Actions
-
-
-Language map
-More advanced topics
-Hooks and environment variables
-How plugins are loaded
-Debugging
-
-
-References
-
 
 
-Compiling with LLVMC
+Compiling with LLVMC
 LLVMC tries hard to be as compatible with gcc as possible,
 although there are some small differences. Most of the time, however,
 you shouldn't be able to notice them:
@@ -98,7 +94,7 @@
 the -clang option.
 
 
-Predefined options
+Predefined options
 LLVMC has some built-in options that can't be overridden in the
 configuration libraries:
 
@@ -121,7 +117,7 @@
 
 
 
-Compiling LLVMC plugins
+Compiling LLVMC plugins
 It's easiest to start working on your own LLVMC plugin by copying the
 skeleton project which lives under $LLVMC_DIR/plugins/Simple:
 @@ -174,7 +170,7 @@
 
 
 
-Customizing LLVMC: the compilation graph
+Customizing LLVMC: the compilation graph
 Each TableGen configuration file should include the common
 definitions:
 @@ -242,7 +238,7 @@
 gsview installed for this to work properly.
 
 
-Describing options
+Describing options
 Command-line options that the plugin supports are defined by using an
 OptionList:
 @@ -293,7 +289,7 @@
 
 
 
-External options
+External options
 Sometimes, when linking several plugins together, one plugin needs to
 access options defined in some other plugin. Because of the way
 options are implemented, such options should be marked as
@@ -308,7 +304,7 @@
 
 
 
-Conditional evaluation
+Conditional evaluation
 The 'case' construct is the main means by which programmability is
 achieved in LLVMC. It can be used to calculate edge weights, program
 actions and modify the shell commands to be executed. The 'case'
@@ -386,7 +382,7 @@
 
 
 
-Writing a tool description
+Writing a tool description
 As was said earlier, nodes in the compilation graph represent tools,
 which are described separately. A tool definition looks like this
 (taken from the include/llvm/CompilerDriver/Tools.td file):
@@ -428,7 +424,7 @@
 
 
 
-Actions
+Actions
 A tool often needs to react to command-line options, and this is
 precisely what the actions property is for. The next example
 illustrates this feature:
@@ -486,7 +482,7 @@
 
 
 
-Language map
+Language map
 If you are adding support for a new language to LLVMC, you'll need to
 modify the language map, which defines mappings from file extensions
 to language names. It is used to choose the proper toolchain(s) for a
@@ -509,9 +505,9 @@
 output languages should match. This is enforced at compile-time.
 
 
-More advanced topics
+More advanced topics
 
-Hooks and environment variables
+Hooks and environment variables
 Normally, LLVMC executes programs from the system PATH. Sometimes,
 this is not sufficient: for example, we may want to specify tool names
 in the configuration file. This can be achieved via the mechanism of
@@ -539,7 +535,7 @@
 

 
 
-How plugins are loaded
+How plugins are loaded
 It is possible for LLVMC plugins to depend on each other. For example,
 one can create edges between nodes defined in some other plugin. To
 make this work, however, that plugin should be loaded first. To
@@ -555,50 +551,27 @@
 loaded last.
 
 
-Debugging
+Debugging
 When writing LLVMC plugins, it can be useful to get a visual view of
 the resulting compilation graph. This can be achieved via the command
-line option --view-graph. This command assumes that Graphviz [2] and
-Ghostview [3] are installed. There is also a --dump-graph option that
-creates a Graphviz source file(compilation-graph.dot) in the
+line option --view-graph. This command assumes that Graphviz and
+Ghostview are installed. There is also a --dump-graph option that
+creates a Graphviz source file (compilation-graph.dot) in the
 current directory.
-
-
-
-References
-
-
-
-
-
-[1] TableGen Fundamentals
-http://llvm.cs.uiuc.edu/docs/TableGenFundamentals.html
-
-
-
-
-
-[2] Graphviz
-http://www.graphviz.org/
-
-
-
-
-
-[3] Ghostview
-http://pages.cs.wisc.edu/~ghost/
 
 
-  
-  
+
+
+
+
 
-  Mikhail Glushenkov

-  LLVM Compiler Infrastructure

+Mikhail Glushenkov

+LLVM Compiler Infrastructure

 
-  Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $
-
+Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $
+
 
 
 

Modified: llvm/trunk/docs/CompilerDriverTutorial.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerDriverTutorial.html?rev=60969&r1=60968&r2=60969&view=diff

==============================================================================
--- llvm/trunk/docs/CompilerDriverTutorial.html (original)
+++ llvm/trunk/docs/CompilerDriverTutorial.html Fri Dec 12 20:28:58 2008
@@ -5,36 +5,32 @@
 
 
 Tutorial - Using LLVMC
-
 
 
 
 
 Tutorial - Using LLVMC
-
---
-
-
-
-

Author: Mikhail Glushenkov <foldr@codedegers.com>
+
+Contents
+
+Introduction
+Compiling with LLVMC
+Using LLVMC to generate toolchain drivers
+
+
+
+Written by Mikhail Glushenkov
+

+Introduction
 LLVMC is a generic compiler driver, which plays the same role for LLVM
 as the gcc program does for GCC - the difference being that LLVMC
 is designed to be more adaptable and easier to customize. Most of
 LLVMC functionality is implemented via plugins, which can be loaded
 dynamically or compiled in. This tutorial describes the basic usage
 and configuration of LLVMC.
-
-Contents
-
-Compiling with LLVMC
-Using LLVMC to generate toolchain drivers
-References
-
 
 
-Compiling with LLVMC
+Compiling with LLVMC
 In general, LLVMC tries to be command-line compatible with gcc as
 much as possible, so most of the familiar options work:
 @@ -47,8 +43,8 @@
 command-line LLVMC usage, refer to the llvmc --help output.
 
 
-Using LLVMC to generate toolchain drivers
-LLVMC plugins are written mostly using TableGen [1], so you need to
+
Using LLVMC to generate toolchain drivers
+LLVMC plugins are written mostly using TableGen, so you need to
 be familiar with it to get anything done.
 Start by compiling plugins/Simple/Simple.td, which is a primitive
 wrapper for gcc:
@@ -102,29 +98,20 @@
 file.
 To learn more about LLVMC customization, refer to the reference
 manual and plugin source code in the plugins directory.
-
-
-References
-
-
-
-
-
-[1] TableGen Fundamentals
-http://llvm.cs.uiuc.edu/docs/TableGenFundamentals.html
 
 
-  
-  
+
+
+
+
 
-  Mikhail Glushenkov

-  LLVM Compiler Infrastructure

+Mikhail Glushenkov

+LLVM Compiler Infrastructure

 
-  Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $
-
-
+Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $
+
 
 
 

Modified: llvm/trunk/docs/llvm-rst.css
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/llvm-rst.css?rev=60969&r1=60968&r2=60969&view=diff

==============================================================================
--- llvm/trunk/docs/llvm-rst.css (original)
+++ llvm/trunk/docs/llvm-rst.css Fri Dec 12 20:28:58 2008
@@ -41,7 +41,10 @@
   margin: 20pt 0pt 5pt 0pt;
 }
 
-.title      { padding-top: 0; margin-top: 0; text-align: left;   font-size: 25pt }
+.title      { padding-top: 0; margin-top: 0; text-align: left;
+              font-size: 25pt }
+
+#contents { font-weight: bold; }
 h2 { width: 75%;
      text-align: left;  font-size: 12pt; padding: 4pt 4pt 4pt 4pt;
      margin: 1.5em 0.5em 0.5em 0.5em }
@@ -67,7 +70,7 @@
 
 .literal-block  { border: solid 1px gray; background: #eeeeee;
                   margin: 0 1em 0 1em;
-                  padding: 0 1em 0 1em;
+                  padding: 1em 2em 1em 1em;
                   display:table;
                 }
 .doc_notes      { background: #fafafa; border: 1px solid #cecece; padding: 0.1em }

Modified: llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst?rev=60969&r1=60968&r2=60969&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst (original)
+++ llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst Fri Dec 12 20:28:58 2008
@@ -1,7 +1,17 @@
 ===================================
 Customizing LLVMC: Reference Manual
 ===================================
-:Author: Mikhail Glushenkov 
+
+.. contents::
+
+.. raw:: html
+
+   
+   Written by Mikhail Glushenkov
+   
+
+Introduction
+============
 
 LLVMC is a generic compiler driver, designed to be customizable and
 extensible. It plays the same role for LLVM as the ``gcc`` program
@@ -16,11 +26,10 @@
 makes it possible to easily adapt LLVMC for other purposes - for
 example, as a build tool for game resources.
 
-Because LLVMC employs TableGen [1]_ as its configuration language, you
+Because LLVMC employs TableGen_ as its configuration language, you
 need to be familiar with it to customize LLVMC.
 
-
-.. contents::
+.. _TableGen: http://llvm.cs.uiuc.edu/docs/TableGenFundamentals.html
 
 
 Compiling with LLVMC
@@ -580,23 +589,27 @@
 
 When writing LLVMC plugins, it can be useful to get a visual view of
 the resulting compilation graph. This can be achieved via the command
-line option ``--view-graph``. This command assumes that Graphviz [2]_ and
-Ghostview [3]_ are installed. There is also a ``--dump-graph`` option that
-creates a Graphviz source file(``compilation-graph.dot``) in the
+line option ``--view-graph``. This command assumes that Graphviz_ and
+Ghostview_ are installed. There is also a ``--dump-graph`` option that
+creates a Graphviz source file (``compilation-graph.dot``) in the
 current directory.
 
+.. _Graphviz: http://www.graphviz.org/
+.. _Ghostview: http://pages.cs.wisc.edu/~ghost/
 
-References
-==========
-
-.. [1] TableGen Fundamentals
-       http://llvm.cs.uiuc.edu/docs/TableGenFundamentals.html
+.. raw:: html
 
-.. [2] Graphviz
-       http://www.graphviz.org/
+   
+   
+   
+   
+   
+   
 
-.. [3] Ghostview
-       http://pages.cs.wisc.edu/~ghost/
+   Mikhail Glushenkov

+   LLVM Compiler Infrastructure

 
-.. raw:: html
-   :file: footer.html
+   Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $
+   

Modified: llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst?rev=60969&r1=60968&r2=60969&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst (original)
+++ llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst Fri Dec 12 20:28:58 2008
@@ -1,7 +1,17 @@
 ======================
 Tutorial - Using LLVMC
 ======================
-:Author: Mikhail Glushenkov 
+
+.. contents::
+
+.. raw:: html
+
+   
+   Written by Mikhail Glushenkov
+   
+
+Introduction
+============
 
 LLVMC is a generic compiler driver, which plays the same role for LLVM
 as the ``gcc`` program does for GCC - the difference being that LLVMC
@@ -11,9 +21,6 @@
 and configuration of LLVMC.
 
 
-.. contents::
-
-
 Compiling with LLVMC
 ====================
 
@@ -32,9 +39,11 @@
 Using LLVMC to generate toolchain drivers
 =========================================
 
-LLVMC plugins are written mostly using TableGen [1]_, so you need to
+LLVMC plugins are written mostly using TableGen_, so you need to
 be familiar with it to get anything done.
 
+.. _TableGen: http://llvm.cs.uiuc.edu/docs/TableGenFundamentals.html
+
 Start by compiling ``plugins/Simple/Simple.td``, which is a primitive
 wrapper for ``gcc``::
 
@@ -93,11 +102,19 @@
 To learn more about LLVMC customization, refer to the reference
 manual and plugin source code in the ``plugins`` directory.
 
-References
-==========
+.. raw:: html
 
-.. [1] TableGen Fundamentals
-       http://llvm.cs.uiuc.edu/docs/TableGenFundamentals.html
+   
+   
+   
+   
+   
+   
 
-.. raw:: html
-   :file: footer.html
+   Mikhail Glushenkov

+   LLVM Compiler Infrastructure

+
+   Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $
+   

Removed: llvm/trunk/tools/llvmc/doc/footer.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/footer.html?rev=60968&view=auto

==============================================================================
--- llvm/trunk/tools/llvmc/doc/footer.html (original)
+++ llvm/trunk/tools/llvmc/doc/footer.html (removed)
@@ -1,12 +0,0 @@
-
-
-  
-  
-
-  Mikhail Glushenkov

-  LLVM Compiler Infrastructure

-
-  Last modified: $Date: 2008-12-11 11:34:48 -0600 (Thu, 11 Dec 2008) $
-

Modified: llvm/trunk/tools/llvmc/doc/llvm-rst.css
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/llvm-rst.css?rev=60969&r1=60968&r2=60969&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/doc/llvm-rst.css (original)
+++ llvm/trunk/tools/llvmc/doc/llvm-rst.css Fri Dec 12 20:28:58 2008
@@ -41,7 +41,10 @@
   margin: 20pt 0pt 5pt 0pt;
 }
 
-.title      { padding-top: 0; margin-top: 0; text-align: left;   font-size: 25pt }
+.title      { padding-top: 0; margin-top: 0; text-align: left;
+              font-size: 25pt }
+
+#contents { font-weight: bold; }
 h2 { width: 75%;
      text-align: left;  font-size: 12pt; padding: 4pt 4pt 4pt 4pt;
      margin: 1.5em 0.5em 0.5em 0.5em }
@@ -67,7 +70,7 @@
 
 .literal-block  { border: solid 1px gray; background: #eeeeee;
                   margin: 0 1em 0 1em;
-                  padding: 0 1em 0 1em;
+                  padding: 1em 2em 1em 1em;
                   display:table;
                 }
 .doc_notes      { background: #fafafa; border: 1px solid #cecece; padding: 0.1em }




From foldr at codedgers.com  Fri Dec 12 21:11:37 2008
From: foldr at codedgers.com (Mikhail Glushenkov)
Date: Sat, 13 Dec 2008 03:11:37 -0000
Subject: [llvm-commits] [llvm] r60970 - in /llvm/trunk: docs/llvm-rst.css
 tools/llvmc/doc/llvm-rst.css
Message-ID: <200812130311.mBD3BbNg009836@zion.cs.uiuc.edu>

Author: foldr
Date: Fri Dec 12 21:11:37 2008
New Revision: 60970

URL: http://llvm.org/viewvc/llvm-project?rev=60970&view=rev
Log:
Some more documentation tweaks.

Modified:
    llvm/trunk/docs/llvm-rst.css
    llvm/trunk/tools/llvmc/doc/llvm-rst.css

Modified: llvm/trunk/docs/llvm-rst.css
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/llvm-rst.css?rev=60970&r1=60969&r2=60970&view=diff

==============================================================================
--- llvm/trunk/docs/llvm-rst.css (original)
+++ llvm/trunk/docs/llvm-rst.css Fri Dec 12 21:11:37 2008
@@ -44,7 +44,6 @@
 .title      { padding-top: 0; margin-top: 0; text-align: left;
               font-size: 25pt }
 
-#contents { font-weight: bold; }
 h2 { width: 75%;
      text-align: left;  font-size: 12pt; padding: 4pt 4pt 4pt 4pt;
      margin: 1.5em 0.5em 0.5em 0.5em }
@@ -53,6 +52,10 @@
      font-weight: bold; font-style: oblique;
      border-bottom: 1px solid #999999; font-size: 12pt;
                      width: 75%; }
+
+#contents { display: none; }
+ul  { list-style-type: decimal }
+
 .doc_author     { text-align: left; font-weight: bold; padding-left: 20pt }
 .doc_text       { text-align: left; padding-left: 20pt; padding-right: 10pt }
 

Modified: llvm/trunk/tools/llvmc/doc/llvm-rst.css
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/llvm-rst.css?rev=60970&r1=60969&r2=60970&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/doc/llvm-rst.css (original)
+++ llvm/trunk/tools/llvmc/doc/llvm-rst.css Fri Dec 12 21:11:37 2008
@@ -44,7 +44,6 @@
 .title      { padding-top: 0; margin-top: 0; text-align: left;
               font-size: 25pt }
 
-#contents { font-weight: bold; }
 h2 { width: 75%;
      text-align: left;  font-size: 12pt; padding: 4pt 4pt 4pt 4pt;
      margin: 1.5em 0.5em 0.5em 0.5em }
@@ -53,6 +52,10 @@
      font-weight: bold; font-style: oblique;
      border-bottom: 1px solid #999999; font-size: 12pt;
                      width: 75%; }
+
+#contents { display: none; }
+ul  { list-style-type: decimal }
+
 .doc_author     { text-align: left; font-weight: bold; padding-left: 20pt }
 .doc_text       { text-align: left; padding-left: 20pt; padding-right: 10pt }
 




From brukman+llvm at gmail.com  Fri Dec 12 23:21:37 2008
From: brukman+llvm at gmail.com (Misha Brukman)
Date: Sat, 13 Dec 2008 05:21:37 -0000
Subject: [llvm-commits] [llvm] r60971 -
	/llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp
Message-ID: <200812130521.mBD5Lc23014654@zion.cs.uiuc.edu>

Author: brukman
Date: Fri Dec 12 23:21:37 2008
New Revision: 60971

URL: http://llvm.org/viewvc/llvm-project?rev=60971&view=rev
Log:
Fix spelling.

Modified:
    llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp

Modified: llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp?rev=60971&r1=60970&r2=60971&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Fri Dec 12 23:21:37 2008
@@ -33,7 +33,7 @@
 using namespace llvm;
 
 // Provide a command-line option to aggregate function arguments into a struct
-// for functions produced by the code extrator. This is useful when converting
+// for functions produced by the code extractor. This is useful when converting
 // extracted functions to pthread-based code, as only one argument (void*) can
 // be passed in to pthread_create().
 static cl::opt




From baldrick at free.fr  Sat Dec 13 00:35:48 2008
From: baldrick at free.fr (Duncan Sands)
Date: Sat, 13 Dec 2008 07:35:48 +0100
Subject: [llvm-commits] [llvm] r60964 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
In-Reply-To: <9D914A02-3A92-454A-B333-8CEB67DB2BEE@apple.com>
References: <200812122147.mBCLlOgj032117@zion.cs.uiuc.edu>
	<9D914A02-3A92-454A-B333-8CEB67DB2BEE@apple.com>
Message-ID: <200812130735.48239.baldrick@free.fr>

Hi Dale,

> > While there I noticed that the existing code doesn't
> > handle trunc store of f64 to f32: it turns this into
> > an i64 store, which represents a 4 byte stack smash.
> > I added a FIXME about this.  Hopefully someone more
> > motivated than I am will take care of it.
> 
> This only occurs if f64 is not a legal type, right?

I don't think so: the DAG combiner can create these:

  // If this is an FP_ROUND or TRUNC followed by a store, fold this into a
  // truncating store.  We can do this even if this is already a truncstore.

Ciao,

Duncan.


From baldrick at free.fr  Sat Dec 13 01:18:39 2008
From: baldrick at free.fr (Duncan Sands)
Date: Sat, 13 Dec 2008 07:18:39 -0000
Subject: [llvm-commits] [llvm] r60972 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Message-ID: <200812130718.mBD7Id1I018213@zion.cs.uiuc.edu>

Author: baldrick
Date: Sat Dec 13 01:18:38 2008
New Revision: 60972

URL: http://llvm.org/viewvc/llvm-project?rev=60972&view=rev
Log:
On big-endian machines it is wrong to do a full
width register load followed by a truncating
store for the copy, since the load will not place
the value in the lower bits.  Probably partial
loads/stores can never happen here, but fix it
anyway.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=60972&r1=60971&r2=60972&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sat Dec 13 01:18:38 2008
@@ -648,11 +648,10 @@
       unsigned RegBytes = RegVT.getSizeInBits() / 8;
       unsigned NumRegs = (StoredBytes + RegBytes - 1) / RegBytes;
 
-      // Make sure the stack slot is wide enough that we can do NumRegs full
-      // width loads from it.
-      SDValue StackPtr = DAG.CreateStackTemporary(StoredVT,
-                                     MVT::getIntegerVT(NumRegs * RegBytes * 8));
-      // Perform the original store only redirected to the stack slot.
+      // Make sure the stack slot is also aligned for the register type.
+      SDValue StackPtr = DAG.CreateStackTemporary(StoredVT, RegVT);
+
+      // Perform the original store, only redirected to the stack slot.
       SDValue Store = DAG.getTruncStore(Chain, Val, StackPtr, NULL, 0,StoredVT);
       SDValue Increment = DAG.getConstant(RegBytes, TLI.getPointerTy());
       SmallVector Stores;
@@ -674,15 +673,18 @@
         Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr, Increment);
       }
 
-      // Load one integer register's worth from the stack slot.
-      SDValue Load = DAG.getLoad(RegVT, Store, StackPtr, NULL, 0);
+      // The last store may be partial.  Do a truncating store.  On big-endian
+      // machines this requires an extending load from the stack slot to ensure
+      // that the bits are in the right place.
+      MVT MemVT = MVT::getIntegerVT(8 * (StoredBytes - Offset));
+
+      // Load from the stack slot.
+      SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, RegVT, Store, StackPtr,
+                                    NULL, 0, MemVT);
 
-      // The last store may be partial.  Do a truncating store.
-      unsigned BytesLeft = StoredBytes - Offset;
       Stores.push_back(DAG.getTruncStore(Load.getValue(1), Load, Ptr,
                                          ST->getSrcValue(), SVOffset + Offset,
-                                         MVT::getIntegerVT(BytesLeft * 8),
-                                         ST->isVolatile(),
+                                         MemVT, ST->isVolatile(),
                                          MinAlign(ST->getAlignment(), Offset)));
       // The order of the stores doesn't matter - say it with a TokenFactor.
       return DAG.getNode(ISD::TokenFactor, MVT::Other, &Stores[0],
@@ -749,10 +751,9 @@
       unsigned RegBytes = RegVT.getSizeInBits() / 8;
       unsigned NumRegs = (LoadedBytes + RegBytes - 1) / RegBytes;
 
-      // Make sure the stack slot wide enough that we can do NumRegs full width
-      // stores to it.
-      SDValue StackBase = DAG.CreateStackTemporary(LoadedVT,
-                                     MVT::getIntegerVT(NumRegs * RegBytes * 8));
+      // Make sure the stack slot is also aligned for the register type.
+      SDValue StackBase = DAG.CreateStackTemporary(LoadedVT, RegVT);
+
       SDValue Increment = DAG.getConstant(RegBytes, TLI.getPointerTy());
       SmallVector Stores;
       SDValue StackPtr = StackBase;
@@ -775,14 +776,16 @@
       }
 
       // The last copy may be partial.  Do an extending load.
-      unsigned BytesLeft = LoadedBytes - Offset;
+      MVT MemVT = MVT::getIntegerVT(8 * (LoadedBytes - Offset));
       SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, RegVT, Chain, Ptr,
                                     LD->getSrcValue(), SVOffset + Offset,
-                                    MVT::getIntegerVT(BytesLeft * 8),
-                                    LD->isVolatile(),
+                                    MemVT, LD->isVolatile(),
                                     MinAlign(LD->getAlignment(), Offset));
       // Follow the load with a store to the stack slot.  Remember the store.
-      Stores.push_back(DAG.getStore(Load.getValue(1), Load, StackPtr, NULL, 0));
+      // On big-endian machines this requires a truncating store to ensure
+      // that the bits end up in the right place.
+      Stores.push_back(DAG.getTruncStore(Load.getValue(1), Load, StackPtr,
+                                         NULL, 0, MemVT));
 
       // The order of the stores doesn't matter - say it with a TokenFactor.
       SDValue TF = DAG.getNode(ISD::TokenFactor, MVT::Other, &Stores[0],




From sabre at nondot.org  Sat Dec 13 01:22:47 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sat, 13 Dec 2008 07:22:47 -0000
Subject: [llvm-commits] [llvm] r60973 - in /llvm/trunk:
 lib/Transforms/Scalar/GVN.cpp
 test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
 test/Transforms/GVN/2007-07-26-PhiErasure.ll
 test/Transforms/GVN/2007-07-31-NoDomInherit.ll
 test/Transforms/GVN/nonlocal.ll test/Transforms/GVN/rle-must-alias.ll
 test/Transforms/GVN/semidominated.ll
Message-ID: <200812130722.mBD7Ml5j018371@zion.cs.uiuc.edu>

Author: lattner
Date: Sat Dec 13 01:22:47 2008
New Revision: 60973

URL: http://llvm.org/viewvc/llvm-project?rev=60973&view=rev
Log:
make RLE preserve the name of the load that it replaces.  This is just
a pretification of the IR.

Modified:
    llvm/trunk/lib/Transforms/Scalar/GVN.cpp
    llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
    llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll
    llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
    llvm/trunk/test/Transforms/GVN/nonlocal.ll
    llvm/trunk/test/Transforms/GVN/rle-must-alias.ll
    llvm/trunk/test/Transforms/GVN/semidominated.ll

Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=60973&r1=60972&r2=60973&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Sat Dec 13 01:22:47 2008
@@ -1034,6 +1034,7 @@
     // Perform PHI construction.
     Value* v = GetValueForBlock(LI->getParent(), LI, BlockReplValues, true);
     LI->replaceAllUsesWith(v);
+    v->takeName(LI);
     if (isa(v->getType()))
       MD->invalidateCachedPointerInfo(v);
     toErase.push_back(LI);

Modified: llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll?rev=60973&r1=60972&r2=60973&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll Sat Dec 13 01:22:47 2008
@@ -1,5 +1,5 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {tmp17625 =}
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {tmp17631 =}
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp17625.* = phi i32. }
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp17631 = phi i32. }
 
 @last = external global [65 x i32*]		; <[65 x i32*]*> [#uses=1]
 

Modified: llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll?rev=60973&r1=60972&r2=60973&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll Sat Dec 13 01:22:47 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {tmp298316 =}
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp298316 = phi i32 }
 
 	%struct..0anon = type { i32 }
 	%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }

Modified: llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll?rev=60973&r1=60972&r2=60973&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll Sat Dec 13 01:22:47 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep tmp51.rle
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp47 = phi i32 }
 
 	%struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* }
 @debug = external constant i32		;  [#uses=0]

Modified: llvm/trunk/test/Transforms/GVN/nonlocal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/nonlocal.ll?rev=60973&r1=60972&r2=60973&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/nonlocal.ll (original)
+++ llvm/trunk/test/Transforms/GVN/nonlocal.ll Sat Dec 13 01:22:47 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {DEAD =}
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {%DEAD = phi i32. }
 
 define i32 @main(i32** %p) {
 block1:

Modified: llvm/trunk/test/Transforms/GVN/rle-must-alias.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-must-alias.ll?rev=60973&r1=60972&r2=60973&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/rle-must-alias.ll (original)
+++ llvm/trunk/test/Transforms/GVN/rle-must-alias.ll Sat Dec 13 01:22:47 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {DEAD.rle = phi i32}
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {DEAD = phi i32 }
 ; The %7 and %4 loads combine to make %DEAD unneeded.
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i386-apple-darwin7"

Modified: llvm/trunk/test/Transforms/GVN/semidominated.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/semidominated.ll?rev=60973&r1=60972&r2=60973&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/semidominated.ll (original)
+++ llvm/trunk/test/Transforms/GVN/semidominated.ll Sat Dec 13 01:22:47 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {DEAD =}
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {DEAD = phi i32 }
 
 define i32 @main(i32* %p) {
 block1:




From wangmp at apple.com  Sat Dec 13 02:15:15 2008
From: wangmp at apple.com (Mon P Wang)
Date: Sat, 13 Dec 2008 08:15:15 -0000
Subject: [llvm-commits] [llvm] r60974 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Message-ID: <200812130815.mBD8FFN8019986@zion.cs.uiuc.edu>

Author: wangmp
Date: Sat Dec 13 02:15:14 2008
New Revision: 60974

URL: http://llvm.org/viewvc/llvm-project?rev=60974&view=rev
Log:
Added basic support for expanding VSETCC

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=60974&r1=60973&r2=60974&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sat Dec 13 02:15:14 2008
@@ -3126,6 +3126,25 @@
       Tmp1 = TLI.LowerOperation(Result, DAG);
       if (Tmp1.getNode()) Result = Tmp1;
       break;
+    case TargetLowering::Expand: {
+      // Unroll into a nasty set of scalar code for now.
+      MVT VT = Node->getValueType(0);
+      unsigned NumElems = VT.getVectorNumElements();
+      MVT EltVT = VT.getVectorElementType();
+      MVT TmpEltVT = Tmp1.getValueType().getVectorElementType();
+      SmallVector Ops(NumElems);
+      for (unsigned i = 0; i < NumElems; ++i) {
+        SDValue In1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, TmpEltVT,
+                                  Tmp1, DAG.getIntPtrConstant(i));
+        Ops[i] = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(In1), In1,
+                              DAG.getNode(ISD::EXTRACT_VECTOR_ELT, TmpEltVT,
+                                          Tmp2, DAG.getIntPtrConstant(i)),
+                              CC);
+        Ops[i] = DAG.getNode(ISD::SIGN_EXTEND, EltVT, Ops[i]);
+      }
+      Result = DAG.getNode(ISD::BUILD_VECTOR, VT, &Ops[0], NumElems);
+      break;
+    }
     }
     break;
   }
@@ -3204,7 +3223,7 @@
          Node->getOpcode() == ISD::SRA) &&
         !Node->getValueType(0).isVector()) {
       Tmp2 = LegalizeShiftAmount(Tmp2);
-     }
+    }
 
     Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2);
 
@@ -8002,7 +8021,7 @@
         NewOps.push_back(PermOp.getOperand(i));
       } else {
         unsigned Idx =
-        cast(PermOp.getOperand(i))->getZExtValue();
+          cast(PermOp.getOperand(i))->getZExtValue();
         if (Idx < NumElts) {
           NewOps.push_back(PermOp.getOperand(i));
         }




From wangmp at apple.com  Sat Dec 13 02:16:43 2008
From: wangmp at apple.com (Mon P Wang)
Date: Sat, 13 Dec 2008 08:16:43 -0000
Subject: [llvm-commits] [llvm] r60975 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Message-ID: <200812130816.mBD8GhHU020037@zion.cs.uiuc.edu>

Author: wangmp
Date: Sat Dec 13 02:16:43 2008
New Revision: 60975

URL: http://llvm.org/viewvc/llvm-project?rev=60975&view=rev
Log:
Remove assertion to allow promotion of a truncating store operand

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=60975&r1=60974&r2=60975&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Sat Dec 13 02:16:43 2008
@@ -969,8 +969,6 @@
 
   SDValue Val = GetPromotedInteger(N->getValue());  // Get promoted value.
 
-  assert(!N->isTruncatingStore() && "Cannot promote this store operand!");
-
   // Truncate the value and store the result.
   return DAG.getTruncStore(Ch, Val, Ptr, N->getSrcValue(),
                            SVOffset, N->getMemoryVT(),




From edwintorok at gmail.com  Sat Dec 13 02:25:29 2008
From: edwintorok at gmail.com (Torok Edwin)
Date: Sat, 13 Dec 2008 08:25:29 -0000
Subject: [llvm-commits] [llvm] r60976 - in /llvm/trunk:
 include/llvm/Analysis/DebugInfo.h lib/Analysis/DebugInfo.cpp
Message-ID: <200812130825.mBD8PTW8020331@zion.cs.uiuc.edu>

Author: edwin
Date: Sat Dec 13 02:25:29 2008
New Revision: 60976

URL: http://llvm.org/viewvc/llvm-project?rev=60976&view=rev
Log:
Fix getFieldAs() to use the parameter instead of 6.
Add missing DIType constructor, needed by DIVariable::getType().

Modified:
    llvm/trunk/include/llvm/Analysis/DebugInfo.h
    llvm/trunk/lib/Analysis/DebugInfo.cpp

Modified: llvm/trunk/include/llvm/Analysis/DebugInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/DebugInfo.h?rev=60976&r1=60975&r2=60976&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Analysis/DebugInfo.h (original)
+++ llvm/trunk/include/llvm/Analysis/DebugInfo.h Sat Dec 13 02:25:29 2008
@@ -60,7 +60,7 @@
     
     template 
     DescTy getFieldAs(unsigned Elt) const {
-      return DescTy(getDescriptorField(6).getGV());
+      return DescTy(getDescriptorField(Elt).getGV());
     }
   
     GlobalVariable *getGlobalVariableField(unsigned Elt) const;

Modified: llvm/trunk/lib/Analysis/DebugInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/DebugInfo.cpp?rev=60976&r1=60975&r2=60976&view=diff

==============================================================================
--- llvm/trunk/lib/Analysis/DebugInfo.cpp (original)
+++ llvm/trunk/lib/Analysis/DebugInfo.cpp Sat Dec 13 02:25:29 2008
@@ -100,6 +100,14 @@
   : DIGlobal(GV, dwarf::DW_TAG_variable) {}
 DIBlock::DIBlock(GlobalVariable *GV)
   : DIDescriptor(GV, dwarf::DW_TAG_lexical_block) {}
+// needed by DIVariable::getType()
+DIType::DIType(GlobalVariable *GV) : DIDescriptor(GV) {
+  if (!GV) return;
+  unsigned tag = getTag();
+  if (tag != dwarf::DW_TAG_base_type && !DIDerivedType::isDerivedType(tag) &&
+      !DICompositeType::isCompositeType(tag))
+    GV = 0;
+}
 
 /// isDerivedType - Return true if the specified tag is legal for
 /// DIDerivedType.




From nicholas at mxc.ca  Sat Dec 13 02:51:14 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Sat, 13 Dec 2008 00:51:14 -0800
Subject: [llvm-commits] non-unit strides for signed induction variables
Message-ID: <49437782.1010606@mxc.ca>

I have a new patch for SCEV which passes both llvm-test and an llvm-gcc 
bootstrap. This is a super-set of the change I tried to make twice last 
week, supporting the full generality of any comparison type with 
non-unit (but known constant) strides.

Since I managed to break the build twice in a row with a *less risky* 
version of this patch, I'm taking a cool-down period and sending it out 
for review first.

If no issues are found, I plan to commit it on Sunday evening (Pacific 
time) to give the nightly testers a chance to hack on it before Monday 
morning (which is when I get to revert it, har har.)

Please test or review, and let me know if you find any problems!

Nick

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From monping at apple.com  Sat Dec 13 02:59:09 2008
From: monping at apple.com (Mon Ping Wang)
Date: Sat, 13 Dec 2008 00:59:09 -0800
Subject: [llvm-commits] Patch: LegalizeType for promoting some operands
Message-ID: <7BF246A0-A2EB-4C0E-A20F-0A65A0A62BBC@apple.com>

Hi,

This is a patch to add some support to legalize some operands
   - ExpandOp_SCALAR_TO_VECTOR by using build vector

   - ExpandOp_INSERT_VECTOR_ELT by bit casting the input vector to the  
expand type, insert the expanded operand, and casting it back.

  - A modification to PromoteIntRes_EXTRACT_VECTOR_ELT to check if the  
extract vector element type is the expected promoted type and if not,  
then extend the result.

For the last one, I ran into the case where I was doing a add of two 8  
bit integers where one integer is extracted from a vector element  
where only a 32 bit was available.  In the promotion code, the first  
operand was promoted to 32 bits but the extract vector element was  
promoted to 16 bits.  This causes a problem when the add was promoted  
to 32 bits and checked its two input operand type.

Please let me know if you have any comments.

Thanks,
   -- Mon Ping

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From isanbard at gmail.com  Sat Dec 13 03:28:47 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Sat, 13 Dec 2008 09:28:47 -0000
Subject: [llvm-commits] [llvm] r60977 - in /llvm/trunk:
 lib/Transforms/Scalar/GVN.cpp
 test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
 test/Transforms/GVN/2007-07-26-PhiErasure.ll
 test/Transforms/GVN/2007-07-31-NoDomInherit.ll
 test/Transforms/GVN/nonlocal.ll test/Transforms/GVN/rle-must-alias.ll
 test/Transforms/GVN/semidominated.ll
Message-ID: <200812130928.mBD9Slf0032144@zion.cs.uiuc.edu>

Author: void
Date: Sat Dec 13 03:28:44 2008
New Revision: 60977

URL: http://llvm.org/viewvc/llvm-project?rev=60977&view=rev
Log:
Temporarily revert r60973. It's inexplicably causing a failure when self-hosting LLVM:

llvm[2]: Linking Release executable opt (without symbols)
..
Undefined symbols:
  "llvm::APFloat::IEEEsingle", referenced from:
      __ZN4llvm7APFloat10IEEEsingleE$non_lazy_ptr in libLLVMCore.a(Constants.o)
      __ZN4llvm7APFloat10IEEEsingleE$non_lazy_ptr in libLLVMCore.a(AsmWriter.o)
      __ZN4llvm7APFloat10IEEEsingleE$non_lazy_ptr in libLLVMCore.a(ConstantFold.o)
  "llvm::APFloat::IEEEdouble", referenced from:
      __ZN4llvm7APFloat10IEEEdoubleE$non_lazy_ptr in libLLVMCore.a(Constants.o)
      __ZN4llvm7APFloat10IEEEdoubleE$non_lazy_ptr in libLLVMCore.a(AsmWriter.o)
      __ZN4llvm7APFloat10IEEEdoubleE$non_lazy_ptr in libLLVMCore.a(ConstantFold.o)
ld: symbol(s) not found

This is in release mode. To replicate, compile llvm and llvm-gcc in optimized
mode. Then build llvm, in optimized mode, with the newly created compiler.

Modified:
    llvm/trunk/lib/Transforms/Scalar/GVN.cpp
    llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
    llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll
    llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
    llvm/trunk/test/Transforms/GVN/nonlocal.ll
    llvm/trunk/test/Transforms/GVN/rle-must-alias.ll
    llvm/trunk/test/Transforms/GVN/semidominated.ll

Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=60977&r1=60976&r2=60977&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Sat Dec 13 03:28:44 2008
@@ -1034,7 +1034,6 @@
     // Perform PHI construction.
     Value* v = GetValueForBlock(LI->getParent(), LI, BlockReplValues, true);
     LI->replaceAllUsesWith(v);
-    v->takeName(LI);
     if (isa(v->getType()))
       MD->invalidateCachedPointerInfo(v);
     toErase.push_back(LI);

Modified: llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll?rev=60977&r1=60976&r2=60977&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll Sat Dec 13 03:28:44 2008
@@ -1,5 +1,5 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp17625.* = phi i32. }
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp17631 = phi i32. }
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {tmp17625 =}
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {tmp17631 =}
 
 @last = external global [65 x i32*]		; <[65 x i32*]*> [#uses=1]
 

Modified: llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll?rev=60977&r1=60976&r2=60977&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll Sat Dec 13 03:28:44 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp298316 = phi i32 }
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {tmp298316 =}
 
 	%struct..0anon = type { i32 }
 	%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }

Modified: llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll?rev=60977&r1=60976&r2=60977&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll Sat Dec 13 03:28:44 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp47 = phi i32 }
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep tmp51.rle
 
 	%struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* }
 @debug = external constant i32		;  [#uses=0]

Modified: llvm/trunk/test/Transforms/GVN/nonlocal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/nonlocal.ll?rev=60977&r1=60976&r2=60977&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/nonlocal.ll (original)
+++ llvm/trunk/test/Transforms/GVN/nonlocal.ll Sat Dec 13 03:28:44 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {%DEAD = phi i32. }
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {DEAD =}
 
 define i32 @main(i32** %p) {
 block1:

Modified: llvm/trunk/test/Transforms/GVN/rle-must-alias.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-must-alias.ll?rev=60977&r1=60976&r2=60977&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/rle-must-alias.ll (original)
+++ llvm/trunk/test/Transforms/GVN/rle-must-alias.ll Sat Dec 13 03:28:44 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {DEAD = phi i32 }
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {DEAD.rle = phi i32}
 ; The %7 and %4 loads combine to make %DEAD unneeded.
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i386-apple-darwin7"

Modified: llvm/trunk/test/Transforms/GVN/semidominated.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/semidominated.ll?rev=60977&r1=60976&r2=60977&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/semidominated.ll (original)
+++ llvm/trunk/test/Transforms/GVN/semidominated.ll Sat Dec 13 03:28:44 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {DEAD = phi i32 }
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {DEAD =}
 
 define i32 @main(i32* %p) {
 block1:




From isanbard at gmail.com  Sat Dec 13 03:29:04 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Sat, 13 Dec 2008 01:29:04 -0800
Subject: [llvm-commits] [llvm] r60973 - in /llvm/trunk:
	lib/Transforms/Scalar/GVN.cpp
	test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
	test/Transforms/GVN/2007-07-26-PhiErasure.ll
	test/Transforms/GVN/2007-07-31-NoDomInherit.ll
	test/Transforms/GVN/nonlocal.ll
	test/Transforms/GVN/rle-must-alias.ll
	test/Transforms/GVN/semidominated.ll
In-Reply-To: <200812130722.mBD7Ml5j018371@zion.cs.uiuc.edu>
References: <200812130722.mBD7Ml5j018371@zion.cs.uiuc.edu>
Message-ID: 

On Dec 12, 2008, at 11:22 PM, Chris Lattner wrote:

> Author: lattner
> Date: Sat Dec 13 01:22:47 2008
> New Revision: 60973
>
> URL: http://llvm.org/viewvc/llvm-project?rev=60973&view=rev
> Log:
> make RLE preserve the name of the load that it replaces.  This is just
> a pretification of the IR.
>
Chris,

This patch is inexplicably causing a failure for self-hosted LLVM in  
release mode. See here for the failure:

http://bwendling.apple.com:8020/builders/full-llvm-OSX/builds/180/steps/shell/logs/stdio

I temporarily reverted this.

-bw

> Modified:
>    llvm/trunk/lib/Transforms/Scalar/GVN.cpp
>    llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
>    llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll
>    llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
>    llvm/trunk/test/Transforms/GVN/nonlocal.ll
>    llvm/trunk/test/Transforms/GVN/rle-must-alias.ll
>    llvm/trunk/test/Transforms/GVN/semidominated.ll
>
> Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=60973&r1=60972&r2=60973&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
> +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Sat Dec 13 01:22:47 2008
> @@ -1034,6 +1034,7 @@
>     // Perform PHI construction.
>     Value* v = GetValueForBlock(LI->getParent(), LI,  
> BlockReplValues, true);
>     LI->replaceAllUsesWith(v);
> +    v->takeName(LI);
>     if (isa(v->getType()))
>       MD->invalidateCachedPointerInfo(v);
>     toErase.push_back(LI);
>
> Modified: llvm/trunk/test/Transforms/GVN/2007-07-26- 
> InterlockingLoops.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll?rev=60973&r1=60972&r2=60973&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll  
> (original)
> +++ llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll  
> Sat Dec 13 01:22:47 2008
> @@ -1,5 +1,5 @@
> -; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {tmp17625 =}
> -; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {tmp17631 =}
> +; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp17625.* = phi  
> i32. }
> +; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp17631 = phi  
> i32. }
>
> @last = external global [65 x i32*]		; <[65 x i32*]*> [#uses=1]
>
>
> Modified: llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll?rev=60973&r1=60972&r2=60973&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll (original)
> +++ llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll Sat Dec  
> 13 01:22:47 2008
> @@ -1,4 +1,4 @@
> -; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {tmp298316 =}
> +; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp298316 = phi  
> i32 }
>
> 	%struct..0anon = type { i32 }
> 	%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32,  
> i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32  
> (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8],  
> [1 x i8], %struct.__sbuf, i32, i64 }
>
> Modified: llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll?rev=60973&r1=60972&r2=60973&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll  
> (original)
> +++ llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll Sat  
> Dec 13 01:22:47 2008
> @@ -1,4 +1,4 @@
> -; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep tmp51.rle
> +; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp47 = phi i32 }
>
> 	%struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32],  
> i8*, i8*, i8* }
> @debug = external constant i32		;  [#uses=0]
>
> Modified: llvm/trunk/test/Transforms/GVN/nonlocal.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/nonlocal.ll?rev=60973&r1=60972&r2=60973&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/test/Transforms/GVN/nonlocal.ll (original)
> +++ llvm/trunk/test/Transforms/GVN/nonlocal.ll Sat Dec 13 01:22:47  
> 2008
> @@ -1,4 +1,4 @@
> -; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {DEAD =}
> +; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {%DEAD = phi i32. }
>
> define i32 @main(i32** %p) {
> block1:
>
> Modified: llvm/trunk/test/Transforms/GVN/rle-must-alias.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-must-alias.ll?rev=60973&r1=60972&r2=60973&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/test/Transforms/GVN/rle-must-alias.ll (original)
> +++ llvm/trunk/test/Transforms/GVN/rle-must-alias.ll Sat Dec 13  
> 01:22:47 2008
> @@ -1,4 +1,4 @@
> -; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {DEAD.rle = phi i32}
> +; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {DEAD = phi i32 }
> ; The %7 and %4 loads combine to make %DEAD unneeded.
> target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32- 
> i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64- 
> f80:128:128"
> target triple = "i386-apple-darwin7"
>
> Modified: llvm/trunk/test/Transforms/GVN/semidominated.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/semidominated.ll?rev=60973&r1=60972&r2=60973&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/test/Transforms/GVN/semidominated.ll (original)
> +++ llvm/trunk/test/Transforms/GVN/semidominated.ll Sat Dec 13  
> 01:22:47 2008
> @@ -1,4 +1,4 @@
> -; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {DEAD =}
> +; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {DEAD = phi i32 }
>
> define i32 @main(i32* %p) {
> block1:
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From nicholas at mxc.ca  Sat Dec 13 04:05:26 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Sat, 13 Dec 2008 02:05:26 -0800
Subject: [llvm-commits] [llvm] r60314
	-	/llvm/trunk/lib/Transforms/Scalar/GVN.cpp
In-Reply-To: <200812010131.mB11VapM001156@zion.cs.uiuc.edu>
References: <200812010131.mB11VapM001156@zion.cs.uiuc.edu>
Message-ID: <494388E6.1090708@mxc.ca>

Chris, this patch breaks Obsequi on x86 Linux. Unfortunately, I don't 
have a testcase for you because bugpoint-{opt,llvm-ld,llc,cbe} all just 
reduce down to a nullary testcase.

Unfortunately, I can't build a current tree with just this patch backed 
out. Please investigate, and let me know if you need any testing done on 
a linux box.

Nick

Chris Lattner wrote:
> Author: lattner
> Date: Sun Nov 30 19:31:36 2008
> New Revision: 60314
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=60314&view=rev
> Log:
> Make GVN be more intelligent about redundant load 
> elimination: when finding dependent load/stores, realize that
> they are the same if aliasing claims must alias instead of relying
> on the pointers to be exactly equal.  This makes load elimination
> more aggressive.  For example, on 403.gcc, we had:
> 
> <     68 gvn    - Number of instructions PRE'd
> < 152718 gvn    - Number of instructions deleted
> <  49699 gvn    - Number of loads deleted
> <   6153 memdep - Number of dirty cached non-local responses
> < 169336 memdep - Number of fully cached non-local responses
> < 162428 memdep - Number of uncached non-local responses
> 
> now we have:
> 
>>     64 gvn    - Number of instructions PRE'd
>> 153623 gvn    - Number of instructions deleted
>>  49856 gvn    - Number of loads deleted
>>   5022 memdep - Number of dirty cached non-local responses
>> 159030 memdep - Number of fully cached non-local responses
>> 162443 memdep - Number of uncached non-local responses
> 
> That's an extra 157 loads deleted and extra 905 other instructions nuked.
> 
> This slows down GVN very slightly, from 3.91 to 3.96s.
> 
> 
> Modified:
>     llvm/trunk/lib/Transforms/Scalar/GVN.cpp
> 
> Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=60314&r1=60313&r2=60314&view=diff
> 
> ==============================================================================
> --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
> +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Sun Nov 30 19:31:36 2008
> @@ -915,11 +915,28 @@
>      }
>    
>      if (StoreInst* S = dyn_cast(DepInfo.getInst())) {
> -      if (S->getPointerOperand() != L->getPointerOperand())
> +      // Reject loads and stores that are to the same address but are of 
> +      // different types.
> +      // NOTE: 403.gcc does have this case (e.g. in readonly_fields_p) because
> +      // of bitfield access, it would be interesting to optimize for it at some
> +      // point.
> +      if (S->getOperand(0)->getType() != L->getType())
> +        return false;
> +      
> +      if (S->getPointerOperand() != L->getPointerOperand() &&
> +          VN.getAliasAnalysis()->alias(S->getPointerOperand(), 1,
> +                                       L->getPointerOperand(), 1)
> +            != AliasAnalysis::MustAlias)
>          return false;
>        repl[DepBB] = S->getOperand(0);
>      } else if (LoadInst* LD = dyn_cast(DepInfo.getInst())) {
> -      if (LD->getPointerOperand() != L->getPointerOperand())
> +      if (LD->getType() != L->getType())
> +        return false;
> +      
> +      if (LD->getPointerOperand() != L->getPointerOperand() &&
> +          VN.getAliasAnalysis()->alias(LD->getPointerOperand(), 1,
> +                                       L->getPointerOperand(), 1)
> +            != AliasAnalysis::MustAlias)
>          return false;
>        repl[DepBB] = LD;
>      } else {
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 



From cedric.venet at laposte.net  Sat Dec 13 04:55:19 2008
From: cedric.venet at laposte.net (Cedric Venet)
Date: Sat, 13 Dec 2008 10:55:19 -0000
Subject: [llvm-commits] [llvm] r60978 - in /llvm/trunk/include/llvm/ADT:
	SmallVector.h ilist.h
Message-ID: <200812131055.mBDAtKSX003039@zion.cs.uiuc.edu>

Author: venet
Date: Sat Dec 13 04:55:13 2008
New Revision: 60978

URL: http://llvm.org/viewvc/llvm-project?rev=60978&view=rev
Log:
Add explicit this-> for some member function in templated base class.
These call are probably dependent but VS with /Za don't seems to think so. We need to help him.

Modified:
    llvm/trunk/include/llvm/ADT/SmallVector.h
    llvm/trunk/include/llvm/ADT/ilist.h

Modified: llvm/trunk/include/llvm/ADT/SmallVector.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/SmallVector.h?rev=60978&r1=60977&r2=60978&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/SmallVector.h (original)
+++ llvm/trunk/include/llvm/ADT/SmallVector.h Sat Dec 13 04:55:13 2008
@@ -566,17 +566,17 @@
     : SmallVectorImpl(NumTsAvailable) {
     this->reserve(Size);
     while (Size--)
-      push_back(Value);
+      this->push_back(Value);
   }
   
   template
   SmallVector(ItTy S, ItTy E) : SmallVectorImpl(NumTsAvailable) {
-    append(S, E);
+    this->append(S, E);
   }
   
   SmallVector(const SmallVector &RHS) : SmallVectorImpl(NumTsAvailable) {
     if (!RHS.empty())
-      operator=(RHS);
+      SmallVectorImpl::operator=(RHS);
   }
 
   const SmallVector &operator=(const SmallVector &RHS) {

Modified: llvm/trunk/include/llvm/ADT/ilist.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ilist.h?rev=60978&r1=60977&r2=60978&view=diff

==============================================================================
--- llvm/trunk/include/llvm/ADT/ilist.h (original)
+++ llvm/trunk/include/llvm/ADT/ilist.h Sat Dec 13 04:55:13 2008
@@ -265,16 +265,16 @@
   // circularly linked list where we snip the 'next' link from the sentinel node
   // back to the first node in the list (to preserve assertions about going off
   // the end of the list).
-  NodeTy *getTail() { return getPrev(Head); }
-  const NodeTy *getTail() const { return getPrev(Head); }
-  void setTail(NodeTy *N) const { setPrev(Head, N); }
+  NodeTy *getTail() { return this->getPrev(Head); }
+  const NodeTy *getTail() const { return this->getPrev(Head); }
+  void setTail(NodeTy *N) const { this->setPrev(Head, N); }
   
   /// CreateLazySentinal - This method verifies whether the sentinal for the
   /// list has been created and lazily makes it if not.
   void CreateLazySentinal() const {
     if (Head != 0) return;
     Head = Traits::createSentinel();
-    setNext(Head, 0);
+    this->setNext(Head, 0);
     setTail(Head);
   }
 
@@ -346,11 +346,11 @@
   }
   reference back() {
     assert(!empty() && "Called back() on empty list!");
-    return *getPrev(getTail());
+    return *this->getPrev(getTail());
   }
   const_reference back() const {
     assert(!empty() && "Called back() on empty list!");
-    return *getPrev(getTail());
+    return *this->getPrev(getTail());
   }
 
   void swap(iplist &RHS) {
@@ -359,31 +359,31 @@
   }
 
   iterator insert(iterator where, NodeTy *New) {
-    NodeTy *CurNode = where.getNodePtrUnchecked(), *PrevNode = getPrev(CurNode);
-    setNext(New, CurNode);
-    setPrev(New, PrevNode);
+    NodeTy *CurNode = where.getNodePtrUnchecked(), *PrevNode = this->getPrev(CurNode);
+    this->setNext(New, CurNode);
+    this->setPrev(New, PrevNode);
 
     if (CurNode != Head)  // Is PrevNode off the beginning of the list?
-      setNext(PrevNode, New);
+      this->setNext(PrevNode, New);
     else
       Head = New;
-    setPrev(CurNode, New);
+    this->setPrev(CurNode, New);
 
-    addNodeToList(New);  // Notify traits that we added a node...
+    this->addNodeToList(New);  // Notify traits that we added a node...
     return New;
   }
 
   NodeTy *remove(iterator &IT) {
     assert(IT != end() && "Cannot remove end of list!");
     NodeTy *Node = &*IT;
-    NodeTy *NextNode = getNext(Node);
-    NodeTy *PrevNode = getPrev(Node);
+    NodeTy *NextNode = this->getNext(Node);
+    NodeTy *PrevNode = this->getPrev(Node);
 
     if (Node != Head)  // Is PrevNode off the beginning of the list?
-      setNext(PrevNode, NextNode);
+      this->setNext(PrevNode, NextNode);
     else
       Head = NextNode;
-    setPrev(NextNode, PrevNode);
+    this->setPrev(NextNode, PrevNode);
     IT = NextNode;
     removeNodeFromList(Node);  // Notify traits that we removed a node...
     
@@ -392,8 +392,8 @@
     // an ilist (and potentially deleted) with iterators still pointing at it.
     // When those iterators are incremented or decremented, they will assert on
     // the null next/prev pointer instead of "usually working".
-    setNext(Node, 0);
-    setPrev(Node, 0);
+    this->setNext(Node, 0);
+    this->setPrev(Node, 0);
     return Node;
   }
 
@@ -428,10 +428,10 @@
       NodeTy *First = &*first, *Prev = getPrev(First);
       NodeTy *Next = last.getNodePtrUnchecked(), *Last = getPrev(Next);
       if (Prev)
-        setNext(Prev, Next);
+        this->setNext(Prev, Next);
       else
         L2.Head = Next;
-      setPrev(Next, Prev);
+      this->setPrev(Next, Prev);
 
       // Splice [first, last) into its new position.
       NodeTy *PosNext = position.getNodePtrUnchecked();
@@ -439,14 +439,14 @@
 
       // Fix head of list...
       if (PosPrev)
-        setNext(PosPrev, First);
+        this->setNext(PosPrev, First);
       else
         Head = First;
-      setPrev(First, PosPrev);
+      this->setPrev(First, PosPrev);
 
       // Fix end of list...
-      setNext(Last, PosNext);
-      setPrev(PosNext, Last);
+      this->setNext(Last, PosNext);
+      this->setPrev(PosNext, Last);
 
       transferNodesFromList(L2, First, PosNext);
 




From baldrick at free.fr  Sat Dec 13 06:07:50 2008
From: baldrick at free.fr (Duncan Sands)
Date: Sat, 13 Dec 2008 13:07:50 +0100
Subject: [llvm-commits] Patch: LegalizeType for promoting some operands
In-Reply-To: <7BF246A0-A2EB-4C0E-A20F-0A65A0A62BBC@apple.com>
References: <7BF246A0-A2EB-4C0E-A20F-0A65A0A62BBC@apple.com>
Message-ID: <200812131307.50844.baldrick@free.fr>

Hi Mon Ping, do you have any testcases?  I will reply completely later.

Ciao,

Duncan.

PS:

>   - A modification to PromoteIntRes_EXTRACT_VECTOR_ELT to check if the  
> extract vector element type is the expected promoted type and if not,  
> then extend the result.

Yes, this is a bug.


From foldr at codedgers.com  Sat Dec 13 11:51:00 2008
From: foldr at codedgers.com (Mikhail Glushenkov)
Date: Sat, 13 Dec 2008 17:51:00 -0000
Subject: [llvm-commits] [llvm] r60984 - in /llvm/trunk:
 docs/CompilerDriver.html docs/CompilerDriverTutorial.html docs/llvm-rst.css
 docs/llvm.css tools/llvmc/doc/Makefile tools/llvmc/doc/llvm-rst.css
Message-ID: <200812131751.mBDHp0BO016400@zion.cs.uiuc.edu>

Author: foldr
Date: Sat Dec 13 11:50:58 2008
New Revision: 60984

URL: http://llvm.org/viewvc/llvm-project?rev=60984&view=rev
Log:
Merge llvm-rst.css and llvm.css.

Removed:
    llvm/trunk/docs/llvm-rst.css
    llvm/trunk/tools/llvmc/doc/llvm-rst.css
Modified:
    llvm/trunk/docs/CompilerDriver.html
    llvm/trunk/docs/CompilerDriverTutorial.html
    llvm/trunk/docs/llvm.css
    llvm/trunk/tools/llvmc/doc/Makefile

Modified: llvm/trunk/docs/CompilerDriver.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerDriver.html?rev=60984&r1=60983&r2=60984&view=diff

==============================================================================
--- llvm/trunk/docs/CompilerDriver.html (original)
+++ llvm/trunk/docs/CompilerDriver.html Sat Dec 13 11:50:58 2008
@@ -5,7 +5,7 @@
 
 
 Customizing LLVMC: Reference Manual
-
+
 
 
 

Modified: llvm/trunk/docs/CompilerDriverTutorial.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerDriverTutorial.html?rev=60984&r1=60983&r2=60984&view=diff

==============================================================================
--- llvm/trunk/docs/CompilerDriverTutorial.html (original)
+++ llvm/trunk/docs/CompilerDriverTutorial.html Sat Dec 13 11:50:58 2008
@@ -5,7 +5,7 @@
 
 
 Tutorial - Using LLVMC
-
+
 
 
 

Removed: llvm/trunk/docs/llvm-rst.css
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/llvm-rst.css?rev=60983&view=auto

==============================================================================
--- llvm/trunk/docs/llvm-rst.css (original)
+++ llvm/trunk/docs/llvm-rst.css (removed)
@@ -1,96 +0,0 @@
-/*
- * LLVM documentation style sheet
- */
-
-/* Common styles */
-.body { color: black; background: white; margin: 0 0 0 0 }
-
-/* No borders on image links */
-a:link img, a:visited img {border-style: none}
-
-address img { float: right; width: 88px; height: 31px; }
-address     { clear: right; }
-
-TR, TD      { border: 2px solid gray; padding: 4pt 4pt 2pt 2pt; }
-TH          { border: 2px solid gray; font-weight: bold; font-size: 105%;
-              background: url("img/lines.gif");
-              font-family: "Georgia,Palatino,Times,Roman,SanSerif"; text-align:center;
-              vertical-align: middle; }
-TABLE       { text-align: center; border: 2px solid black;
-              border-collapse: collapse; margin-top: 1em; margin-left: 1em;
-              margin-right: 1em; margin-bottom: 1em; }
-/*
- * Documentation
- */
-/* Common for title and header */
-h1, h2 {
-  color: black; background: url("img/lines.gif");
-  font-family: "Georgia,Palatino,Times,Roman,SanSerif"; font-weight: bold;
-  border-width: 1px;
-  border-style: solid none solid none;
-  text-align: center;
-  vertical-align: middle;
-  padding-left: 8pt;
-  padding-top: 1px;
-  padding-bottom: 2px;
-}
-
-h1 {
-  text-align: center;
-  font-size: 22pt;
-  margin: 20pt 0pt 5pt 0pt;
-}
-
-.title      { padding-top: 0; margin-top: 0; text-align: left;
-              font-size: 25pt }
-
-h2 { width: 75%;
-     text-align: left;  font-size: 12pt; padding: 4pt 4pt 4pt 4pt;
-     margin: 1.5em 0.5em 0.5em 0.5em }
-
-h3 { margin: 2.0em 0.5em 0.5em 0.5em;
-     font-weight: bold; font-style: oblique;
-     border-bottom: 1px solid #999999; font-size: 12pt;
-                     width: 75%; }
-
-#contents { display: none; }
-ul  { list-style-type: decimal }
-
-.doc_author     { text-align: left; font-weight: bold; padding-left: 20pt }
-.doc_text       { text-align: left; padding-left: 20pt; padding-right: 10pt }
-
-.doc_footer     { text-align: left; padding: 0 0 0 0 }
-
-.doc_hilite     { color: blue; font-weight: bold; }
-
-.doc_table      { text-align: center; width: 90%;
-                  padding: 1px 1px 1px 1px; border: 1px; }
-
-.doc_table_nw   { text-align: center; border: 1px;
-                  padding: 1px 1px 1px 1px; }
-
-.doc_warning    { color: red; font-weight: bold }
-
-.literal-block  { border: solid 1px gray; background: #eeeeee;
-                  margin: 0 1em 0 1em;
-                  padding: 1em 2em 1em 1em;
-                  display:table;
-                }
-.doc_notes      { background: #fafafa; border: 1px solid #cecece; padding: 0.1em }
-
-TABLE.layout    { text-align: left; border: none; border-collapse: collapse;
-                  padding: 4px 4px 4px 4px; }
-TR.layout       { border: none; padding: 4pt 4pt 2pt 2pt; }
-TD.layout       { border: none; padding: 4pt 4pt 2pt 2pt;
-                  vertical-align: top;}
-TD.left         { border: none; padding: 4pt 4pt 2pt 2pt; text-align: left;
-                  vertical-align: top;}
-TD.right        { border: none; padding: 4pt 4pt 2pt 2pt; text-align: right;
-                  vertical-align: top;}
-TH.layout       { border: none; font-weight: bold; font-size: 105%;
-                  text-align:center; vertical-align: middle; }
-
-/* Left align table cell */
-.td_left        { border: 2px solid gray; text-align: left; }
-
-.toc-backref    { color: black; text-decoration: none; }

Modified: llvm/trunk/docs/llvm.css
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/llvm.css?rev=60984&r1=60983&r2=60984&view=diff

==============================================================================
--- llvm/trunk/docs/llvm.css (original)
+++ llvm/trunk/docs/llvm.css Sat Dec 13 11:50:58 2008
@@ -12,18 +12,19 @@
 address     { clear: right; }
 
 TR, TD      { border: 2px solid gray; padding: 4pt 4pt 2pt 2pt; }
-TH          { border: 2px solid gray; font-weight: bold; font-size: 105%; 
+TH          { border: 2px solid gray; font-weight: bold; font-size: 105%;
               background: url("img/lines.gif");
-              font-family: "Georgia,Palatino,Times,Roman,SanSerif"; text-align:center;
+              font-family: "Georgia,Palatino,Times,Roman,SanSerif";
+              text-align:center;
               vertical-align: middle; }
-TABLE       { text-align: center; border: 2px solid black; 
-              border-collapse: collapse; margin-top: 1em; margin-left: 1em; 
+TABLE       { text-align: center; border: 2px solid black;
+              border-collapse: collapse; margin-top: 1em; margin-left: 1em;
               margin-right: 1em; margin-bottom: 1em; }
-/* 
- * Documentation 
+/*
+ * Documentation
  */
 /* Common for title and header */
-.doc_title, .doc_section, .doc_subsection { 
+.doc_title, .doc_section, .doc_subsection, h1, h2 {
   color: black; background: url("img/lines.gif");
   font-family: "Georgia,Palatino,Times,Roman,SanSerif"; font-weight: bold;
   border-width: 1px;
@@ -35,17 +36,21 @@
   padding-bottom: 2px
 }
 
-.doc_title      { text-align: left;   font-size: 25pt }
-.doc_section    { text-align: center; font-size: 22pt;
-                  margin: 20pt 0pt 5pt 0pt; }
-.doc_subsection { width: 75%;
-                  text-align: left;  font-size: 12pt; padding: 4pt 4pt 4pt 4pt;
-                  margin: 1.5em 0.5em 0.5em 0.5em }
-
-.doc_subsubsection { margin: 2.0em 0.5em 0.5em 0.5em;
-                     font-weight: bold; font-style: oblique;
-                     border-bottom: 1px solid #999999; font-size: 12pt;
-                     width: 75%; }
+h1, .doc_section   { text-align: center; font-size: 22pt;
+                     margin: 20pt 0pt 5pt 0pt; }
+
+.doc_title, .title { text-align: left;   font-size: 25pt }
+
+h2, .doc_subsection { width: 75%;
+                      text-align: left;  font-size: 12pt;
+                      padding: 4pt 4pt 4pt 4pt;
+                      margin: 1.5em 0.5em 0.5em 0.5em }
+
+h3, .doc_subsubsection { margin: 2.0em 0.5em 0.5em 0.5em;
+                         font-weight: bold; font-style: oblique;
+                         border-bottom: 1px solid #999999; font-size: 12pt;
+                         width: 75%; }
+
 .doc_author     { text-align: left; font-weight: bold; padding-left: 20pt }
 .doc_text       { text-align: left; padding-left: 20pt; padding-right: 10pt }
 
@@ -53,32 +58,42 @@
 
 .doc_hilite     { color: blue; font-weight: bold; }
 
-.doc_table      { text-align: center; width: 90%; 
+.doc_table      { text-align: center; width: 90%;
                   padding: 1px 1px 1px 1px; border: 1px; }
 
-.doc_table_nw   { text-align: center; border: 1px; 
+.doc_table_nw   { text-align: center; border: 1px;
     		  padding: 1px 1px 1px 1px; }
 
 .doc_warning    { color: red; font-weight: bold }
 
-.doc_code       { border: solid 1px gray; background: #eeeeee;
-                  margin: 0 1em 0 1em; 
+.doc_code, .literal-block
+                { border: solid 1px gray; background: #eeeeee;
+                  margin: 0 1em 0 1em;
                   padding: 0 1em 0 1em;
                   display:table;
                 }
-.doc_notes      { background: #fafafa; border: 1px solid #cecece; padding: 0.1em }
+
+.doc_notes      { background: #fafafa; border: 1px solid #cecece;
+                  padding: 0.1em }
 
 TABLE.layout    { text-align: left; border: none; border-collapse: collapse;
                   padding: 4px 4px 4px 4px; }
 TR.layout       { border: none; padding: 4pt 4pt 2pt 2pt; }
-TD.layout       { border: none; padding: 4pt 4pt 2pt 2pt; 
+TD.layout       { border: none; padding: 4pt 4pt 2pt 2pt;
                   vertical-align: top;}
-TD.left         { border: none; padding: 4pt 4pt 2pt 2pt; text-align: left; 
+TD.left         { border: none; padding: 4pt 4pt 2pt 2pt; text-align: left;
                   vertical-align: top;}
-TD.right        { border: none; padding: 4pt 4pt 2pt 2pt; text-align: right; 
+TD.right        { border: none; padding: 4pt 4pt 2pt 2pt; text-align: right;
                   vertical-align: top;}
-TH.layout       { border: none; font-weight: bold; font-size: 105%; 
+TH.layout       { border: none; font-weight: bold; font-size: 105%;
                   text-align:center; vertical-align: middle; }
 
 /* Left align table cell */
 .td_left        { border: 2px solid gray; text-align: left; }
+
+/* ReST-specific */
+.title { margin-top: 0}
+#contents { display: none; }
+div.contents ul { list-style-type: decimal }
+.literal-block { padding: 1em 2em 1em 1em }
+.toc-backref    { color: black; text-decoration: none; }

Modified: llvm/trunk/tools/llvmc/doc/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/Makefile?rev=60984&r1=60983&r2=60984&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/doc/Makefile (original)
+++ llvm/trunk/tools/llvmc/doc/Makefile Sat Dec 13 11:50:58 2008
@@ -10,19 +10,17 @@
 LEVEL=../../..
 include $(LEVEL)/Makefile.config
 
-RST_CSS=llvm-rst.css
 DOC_DIR=../../../docs
-RST2HTML=rst2html --stylesheet=$(RST_CSS) --link-stylesheet
+RST2HTML=rst2html --stylesheet=llvm.css --link-stylesheet
 
-all : LLVMC-Reference.html LLVMC-Tutorial.html $(RST_CSS)
-	$(CP) $(RST_CSS) $(DOC_DIR)/$(RST_CSS)
+all : LLVMC-Reference.html LLVMC-Tutorial.html
 	$(CP) LLVMC-Reference.html $(DOC_DIR)/CompilerDriver.html
 	$(CP) LLVMC-Tutorial.html $(DOC_DIR)/CompilerDriverTutorial.html
 
-LLVMC-Tutorial.html : LLVMC-Tutorial.rst $(RST_CSS)
+LLVMC-Tutorial.html : LLVMC-Tutorial.rst
 	$(RST2HTML) $< $@
 
-LLVMC-Reference.html : LLVMC-Reference.rst $(RST_CSS)
+LLVMC-Reference.html : LLVMC-Reference.rst
 	$(RST2HTML) $< $@
 
 clean :

Removed: llvm/trunk/tools/llvmc/doc/llvm-rst.css
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/llvm-rst.css?rev=60983&view=auto

==============================================================================
--- llvm/trunk/tools/llvmc/doc/llvm-rst.css (original)
+++ llvm/trunk/tools/llvmc/doc/llvm-rst.css (removed)
@@ -1,96 +0,0 @@
-/*
- * LLVM documentation style sheet
- */
-
-/* Common styles */
-.body { color: black; background: white; margin: 0 0 0 0 }
-
-/* No borders on image links */
-a:link img, a:visited img {border-style: none}
-
-address img { float: right; width: 88px; height: 31px; }
-address     { clear: right; }
-
-TR, TD      { border: 2px solid gray; padding: 4pt 4pt 2pt 2pt; }
-TH          { border: 2px solid gray; font-weight: bold; font-size: 105%;
-              background: url("img/lines.gif");
-              font-family: "Georgia,Palatino,Times,Roman,SanSerif"; text-align:center;
-              vertical-align: middle; }
-TABLE       { text-align: center; border: 2px solid black;
-              border-collapse: collapse; margin-top: 1em; margin-left: 1em;
-              margin-right: 1em; margin-bottom: 1em; }
-/*
- * Documentation
- */
-/* Common for title and header */
-h1, h2 {
-  color: black; background: url("img/lines.gif");
-  font-family: "Georgia,Palatino,Times,Roman,SanSerif"; font-weight: bold;
-  border-width: 1px;
-  border-style: solid none solid none;
-  text-align: center;
-  vertical-align: middle;
-  padding-left: 8pt;
-  padding-top: 1px;
-  padding-bottom: 2px;
-}
-
-h1 {
-  text-align: center;
-  font-size: 22pt;
-  margin: 20pt 0pt 5pt 0pt;
-}
-
-.title      { padding-top: 0; margin-top: 0; text-align: left;
-              font-size: 25pt }
-
-h2 { width: 75%;
-     text-align: left;  font-size: 12pt; padding: 4pt 4pt 4pt 4pt;
-     margin: 1.5em 0.5em 0.5em 0.5em }
-
-h3 { margin: 2.0em 0.5em 0.5em 0.5em;
-     font-weight: bold; font-style: oblique;
-     border-bottom: 1px solid #999999; font-size: 12pt;
-                     width: 75%; }
-
-#contents { display: none; }
-ul  { list-style-type: decimal }
-
-.doc_author     { text-align: left; font-weight: bold; padding-left: 20pt }
-.doc_text       { text-align: left; padding-left: 20pt; padding-right: 10pt }
-
-.doc_footer     { text-align: left; padding: 0 0 0 0 }
-
-.doc_hilite     { color: blue; font-weight: bold; }
-
-.doc_table      { text-align: center; width: 90%;
-                  padding: 1px 1px 1px 1px; border: 1px; }
-
-.doc_table_nw   { text-align: center; border: 1px;
-                  padding: 1px 1px 1px 1px; }
-
-.doc_warning    { color: red; font-weight: bold }
-
-.literal-block  { border: solid 1px gray; background: #eeeeee;
-                  margin: 0 1em 0 1em;
-                  padding: 1em 2em 1em 1em;
-                  display:table;
-                }
-.doc_notes      { background: #fafafa; border: 1px solid #cecece; padding: 0.1em }
-
-TABLE.layout    { text-align: left; border: none; border-collapse: collapse;
-                  padding: 4px 4px 4px 4px; }
-TR.layout       { border: none; padding: 4pt 4pt 2pt 2pt; }
-TD.layout       { border: none; padding: 4pt 4pt 2pt 2pt;
-                  vertical-align: top;}
-TD.left         { border: none; padding: 4pt 4pt 2pt 2pt; text-align: left;
-                  vertical-align: top;}
-TD.right        { border: none; padding: 4pt 4pt 2pt 2pt; text-align: right;
-                  vertical-align: top;}
-TH.layout       { border: none; font-weight: bold; font-size: 105%;
-                  text-align:center; vertical-align: middle; }
-
-/* Left align table cell */
-.td_left        { border: 2px solid gray; text-align: left; }
-
-.toc-backref    { color: black; text-decoration: none; }




From foldr at codedgers.com  Sat Dec 13 11:51:47 2008
From: foldr at codedgers.com (Mikhail Glushenkov)
Date: Sat, 13 Dec 2008 17:51:47 -0000
Subject: [llvm-commits] [llvm] r60985 - in /llvm/trunk:
 docs/CompilerDriver.html docs/CompilerDriverTutorial.html
 tools/llvmc/doc/LLVMC-Reference.rst tools/llvmc/doc/LLVMC-Tutorial.rst
Message-ID: <200812131751.mBDHpm7Y016438@zion.cs.uiuc.edu>

Author: foldr
Date: Sat Dec 13 11:51:47 2008
New Revision: 60985

URL: http://llvm.org/viewvc/llvm-project?rev=60985&view=rev
Log:
Add a comment to the auto-generated docs.

Modified:
    llvm/trunk/docs/CompilerDriver.html
    llvm/trunk/docs/CompilerDriverTutorial.html
    llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst
    llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst

Modified: llvm/trunk/docs/CompilerDriver.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerDriver.html?rev=60985&r1=60984&r2=60985&view=diff

==============================================================================
--- llvm/trunk/docs/CompilerDriver.html (original)
+++ llvm/trunk/docs/CompilerDriver.html Sat Dec 13 11:51:47 2008
@@ -10,6 +10,9 @@
 
 
 Customizing LLVMC: Reference Manual
+
 
 Contents
 

Modified: llvm/trunk/docs/CompilerDriverTutorial.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerDriverTutorial.html?rev=60985&r1=60984&r2=60985&view=diff

==============================================================================
--- llvm/trunk/docs/CompilerDriverTutorial.html (original)
+++ llvm/trunk/docs/CompilerDriverTutorial.html Sat Dec 13 11:51:47 2008
@@ -10,6 +10,9 @@
 
 
 Tutorial - Using LLVMC
+
 
 Contents
 

Modified: llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst?rev=60985&r1=60984&r2=60985&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst (original)
+++ llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst Sat Dec 13 11:51:47 2008
@@ -1,6 +1,10 @@
 ===================================
 Customizing LLVMC: Reference Manual
 ===================================
+..
+   This file was automatically generated by rst2html.
+   Please do not edit directly!
+   The ReST source lives in the directory 'tools/llvmc/doc'.
 
 .. contents::
 

Modified: llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst?rev=60985&r1=60984&r2=60985&view=diff

==============================================================================
--- llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst (original)
+++ llvm/trunk/tools/llvmc/doc/LLVMC-Tutorial.rst Sat Dec 13 11:51:47 2008
@@ -1,6 +1,10 @@
 ======================
 Tutorial - Using LLVMC
 ======================
+..
+   This file was automatically generated by rst2html.
+   Please do not edit directly!
+   The ReST source lives in the directory 'tools/llvmc/doc'.
 
 .. contents::
 




From sabre at nondot.org  Sat Dec 13 12:37:59 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sat, 13 Dec 2008 18:37:59 -0000
Subject: [llvm-commits] [llvm] r60986 - /llvm/trunk/lib/VMCore/Value.cpp
Message-ID: <200812131837.mBDIbxrK018043@zion.cs.uiuc.edu>

Author: lattner
Date: Sat Dec 13 12:37:58 2008
New Revision: 60986

URL: http://llvm.org/viewvc/llvm-project?rev=60986&view=rev
Log:
These messages should always be emitted when NDEBUG is unset, not when
NDEBUG is unset and -debug is passed.

Modified:
    llvm/trunk/lib/VMCore/Value.cpp

Modified: llvm/trunk/lib/VMCore/Value.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Value.cpp?rev=60986&r1=60985&r2=60986&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/Value.cpp (original)
+++ llvm/trunk/lib/VMCore/Value.cpp Sat Dec 13 12:37:58 2008
@@ -54,9 +54,9 @@
   // a 
   //
   if (!use_empty()) {
-    DOUT << "While deleting: " << *VTy << " %" << getNameStr() << "\n";
+    cerr << "While deleting: " << *VTy << " %" << getNameStr() << "\n";
     for (use_iterator I = use_begin(), E = use_end(); I != E; ++I)
-      DOUT << "Use still stuck around after Def is destroyed:"
+      cerr << "Use still stuck around after Def is destroyed:"
            << **I << "\n";
   }
 #endif




From sabre at nondot.org  Sat Dec 13 12:39:45 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sat, 13 Dec 2008 18:39:45 -0000
Subject: [llvm-commits] [llvm] r60987 -
	/llvm/trunk/test/Transforms/GVN/2008-12-12-RLE-Crash.ll
Message-ID: <200812131839.mBDIdjjP018109@zion.cs.uiuc.edu>

Author: lattner
Date: Sat Dec 13 12:39:44 2008
New Revision: 60987

URL: http://llvm.org/viewvc/llvm-project?rev=60987&view=rev
Log:
gvn should never crash on this.

Added:
    llvm/trunk/test/Transforms/GVN/2008-12-12-RLE-Crash.ll

Added: llvm/trunk/test/Transforms/GVN/2008-12-12-RLE-Crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2008-12-12-RLE-Crash.ll?rev=60987&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/GVN/2008-12-12-RLE-Crash.ll (added)
+++ llvm/trunk/test/Transforms/GVN/2008-12-12-RLE-Crash.ll Sat Dec 13 12:39:44 2008
@@ -0,0 +1,35 @@
+; RUN: llvm-as < %s | opt -gvn | llvm-dis
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+
+define i32 @main(i32 %argc, i8** %argv) nounwind {
+entry:
+	br label %bb84
+
+bb41:		; preds = %bb82
+	%tmp = load i8* %opt.0, align 1		;  [#uses=0]
+	%tmp1 = getelementptr i8* %opt.0, i32 1		;  [#uses=2]
+	switch i32 0, label %bb81 [
+		i32 102, label %bb82
+		i32 110, label %bb79
+		i32 118, label %bb80
+	]
+
+bb79:		; preds = %bb41
+	br label %bb82
+
+bb80:		; preds = %bb41
+	ret i32 0
+
+bb81:		; preds = %bb41
+	ret i32 1
+
+bb82:		; preds = %bb84, %bb79, %bb41
+	%opt.0 = phi i8* [ %tmp3, %bb84 ], [ %tmp1, %bb79 ], [ %tmp1, %bb41 ]		;  [#uses=3]
+	%tmp2 = load i8* %opt.0, align 1		;  [#uses=0]
+	br i1 false, label %bb84, label %bb41
+
+bb84:		; preds = %bb82, %entry
+	%tmp3 = getelementptr i8* null, i32 1		;  [#uses=1]
+	br label %bb82
+}




From sabre at nondot.org  Sat Dec 13 12:47:40 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sat, 13 Dec 2008 18:47:40 -0000
Subject: [llvm-commits] [llvm] r60988 - in /llvm/trunk/test/Transforms/GVN:
 bitcast-of-call.ll call.ll calls-nonlocal.ll calls-readonly.ll dominated.ll
 lpre-basic.ll nonlocal-cse.ll nonlocal.ll pre-basic-add.ll pre-load.ll
 pre.ll readonly-calls.ll rle-dominated.ll rle-nonlocal.ll
 rle-semidominated.ll semidominated.ll
Message-ID: <200812131847.mBDIle1n018444@zion.cs.uiuc.edu>

Author: lattner
Date: Sat Dec 13 12:47:40 2008
New Revision: 60988

URL: http://llvm.org/viewvc/llvm-project?rev=60988&view=rev
Log:
rename some tests to be more uniform in naming convention.

Added:
    llvm/trunk/test/Transforms/GVN/bitcast-of-call.ll
      - copied unchanged from r60971, llvm/trunk/test/Transforms/GVN/call.ll
    llvm/trunk/test/Transforms/GVN/calls-nonlocal.ll
      - copied unchanged from r60971, llvm/trunk/test/Transforms/GVN/nonlocal-cse.ll
    llvm/trunk/test/Transforms/GVN/calls-readonly.ll
      - copied unchanged from r60971, llvm/trunk/test/Transforms/GVN/readonly-calls.ll
    llvm/trunk/test/Transforms/GVN/lpre-basic.ll
      - copied unchanged from r60971, llvm/trunk/test/Transforms/GVN/pre-load.ll
    llvm/trunk/test/Transforms/GVN/pre-basic-add.ll
      - copied unchanged from r60971, llvm/trunk/test/Transforms/GVN/pre.ll
    llvm/trunk/test/Transforms/GVN/rle-dominated.ll
      - copied unchanged from r60971, llvm/trunk/test/Transforms/GVN/dominated.ll
    llvm/trunk/test/Transforms/GVN/rle-nonlocal.ll
      - copied, changed from r60973, llvm/trunk/test/Transforms/GVN/nonlocal.ll
    llvm/trunk/test/Transforms/GVN/rle-semidominated.ll
      - copied, changed from r60973, llvm/trunk/test/Transforms/GVN/semidominated.ll
Removed:
    llvm/trunk/test/Transforms/GVN/call.ll
    llvm/trunk/test/Transforms/GVN/dominated.ll
    llvm/trunk/test/Transforms/GVN/nonlocal-cse.ll
    llvm/trunk/test/Transforms/GVN/nonlocal.ll
    llvm/trunk/test/Transforms/GVN/pre-load.ll
    llvm/trunk/test/Transforms/GVN/pre.ll
    llvm/trunk/test/Transforms/GVN/readonly-calls.ll
    llvm/trunk/test/Transforms/GVN/semidominated.ll

Removed: llvm/trunk/test/Transforms/GVN/call.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/call.ll?rev=60987&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/GVN/call.ll (original)
+++ llvm/trunk/test/Transforms/GVN/call.ll (removed)
@@ -1,12 +0,0 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep tmp2
-; PR2213
-
-define i32* @f(i8* %x) {
-entry:
-        %tmp = call i8* @m( i32 12 )            ;  [#uses=2]
-        %tmp1 = bitcast i8* %tmp to i32*                ;  [#uses=0]
-        %tmp2 = bitcast i8* %tmp to i32*                ;  [#uses=0]
-        ret i32* %tmp2
-}
-
-declare i8* @m(i32)

Removed: llvm/trunk/test/Transforms/GVN/dominated.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/dominated.ll?rev=60987&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/GVN/dominated.ll (original)
+++ llvm/trunk/test/Transforms/GVN/dominated.ll (removed)
@@ -1,20 +0,0 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep DEAD
-
-define i32 @main(i32** %p) {
-block1:
-  %z = load i32** %p
-	br i1 true, label %block2, label %block3
-
-block2:
- %a = load i32** %p
- br label %block4
-
-block3:
-  %b = load i32** %p
-  br label %block4
-
-block4:
-  %DEAD = load i32** %p
-  %c = load i32* %DEAD
-  ret i32 %c
-}

Removed: llvm/trunk/test/Transforms/GVN/nonlocal-cse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/nonlocal-cse.ll?rev=60987&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/GVN/nonlocal-cse.ll (original)
+++ llvm/trunk/test/Transforms/GVN/nonlocal-cse.ll (removed)
@@ -1,49 +0,0 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep strlen | count 2
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-target triple = "i386-apple-darwin9"
-
-define i32 @test(i32 %g, i8* %P) nounwind  {
-entry:
-	%tmp2 = call i32 @strlen( i8* %P ) nounwind readonly 		;  [#uses=1]
-	%tmp3 = icmp eq i32 %tmp2, 100		;  [#uses=1]
-	%tmp34 = zext i1 %tmp3 to i8		;  [#uses=1]
-	%toBool = icmp ne i8 %tmp34, 0		;  [#uses=1]
-	br i1 %toBool, label %bb, label %bb6
-
-bb:		; preds = %entry
-	br label %bb27
-
-bb6:		; preds = %entry
-	%tmp8 = add i32 %g, 42		;  [#uses=2]
-	%tmp10 = call i32 @strlen( i8* %P ) nounwind readonly 		;  [#uses=1]
-	%tmp11 = icmp eq i32 %tmp10, 100		;  [#uses=1]
-	%tmp1112 = zext i1 %tmp11 to i8		;  [#uses=1]
-	%toBool13 = icmp ne i8 %tmp1112, 0		;  [#uses=1]
-	br i1 %toBool13, label %bb14, label %bb16
-
-bb14:		; preds = %bb6
-	br label %bb27
-
-bb16:		; preds = %bb6
-	%tmp18 = mul i32 %tmp8, 2		;  [#uses=1]
-	%tmp20 = call i32 @strlen( i8* %P ) nounwind readonly 		;  [#uses=1]
-	%tmp21 = icmp eq i32 %tmp20, 100		;  [#uses=1]
-	%tmp2122 = zext i1 %tmp21 to i8		;  [#uses=1]
-	%toBool23 = icmp ne i8 %tmp2122, 0		;  [#uses=1]
-	br i1 %toBool23, label %bb24, label %bb26
-
-bb24:		; preds = %bb16
-	br label %bb27
-
-bb26:		; preds = %bb16
-	br label %bb27
-
-bb27:		; preds = %bb26, %bb24, %bb14, %bb
-	%tmp.0 = phi i32 [ 11, %bb26 ], [ %tmp18, %bb24 ], [ %tmp8, %bb14 ], [ %g, %bb ]		;  [#uses=1]
-	br label %return
-
-return:		; preds = %bb27
-	ret i32 %tmp.0
-}
-
-declare i32 @strlen(i8*) nounwind readonly 

Removed: llvm/trunk/test/Transforms/GVN/nonlocal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/nonlocal.ll?rev=60987&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/GVN/nonlocal.ll (original)
+++ llvm/trunk/test/Transforms/GVN/nonlocal.ll (removed)
@@ -1,19 +0,0 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {DEAD =}
-
-define i32 @main(i32** %p) {
-block1:
-	br i1 true, label %block2, label %block3
-
-block2:
- %a = load i32** %p
- br label %block4
-
-block3:
-  %b = load i32** %p
-  br label %block4
-
-block4:
-  %DEAD = load i32** %p
-  %c = load i32* %DEAD
-  ret i32 %c
-}

Removed: llvm/trunk/test/Transforms/GVN/pre-load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/pre-load.ll?rev=60987&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/GVN/pre-load.ll (original)
+++ llvm/trunk/test/Transforms/GVN/pre-load.ll (removed)
@@ -1,18 +0,0 @@
-; RUN: llvm-as < %s | opt -gvn -enable-load-pre | llvm-dis | grep {%PRE = phi}
-
-define i32 @test(i32* %p, i1 %C) {
-block1:
-	br i1 %C, label %block2, label %block3
-
-block2:
- br label %block4
-
-block3:
-  %b = bitcast i32 0 to i32
-  store i32 %b, i32* %p
-  br label %block4
-
-block4:
-  %PRE = load i32* %p
-  ret i32 %PRE
-}

Removed: llvm/trunk/test/Transforms/GVN/pre.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/pre.ll?rev=60987&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/GVN/pre.ll (original)
+++ llvm/trunk/test/Transforms/GVN/pre.ll (removed)
@@ -1,27 +0,0 @@
-; RUN: llvm-as < %s | opt -gvn -enable-pre | llvm-dis | grep {.pre}
-
- at H = common global i32 0		;  [#uses=2]
- at G = common global i32 0		;  [#uses=1]
-
-define i32 @test() nounwind {
-entry:
-	%0 = load i32* @H, align 4		;  [#uses=2]
-	%1 = call i32 (...)* @foo() nounwind		;  [#uses=1]
-	%2 = icmp ne i32 %1, 0		;  [#uses=1]
-	br i1 %2, label %bb, label %bb1
-
-bb:		; preds = %entry
-	%3 = add i32 %0, 42		;  [#uses=1]
-	store i32 %3, i32* @G, align 4
-	br label %bb1
-
-bb1:		; preds = %bb, %entry
-	%4 = add i32 %0, 42		;  [#uses=1]
-	store i32 %4, i32* @H, align 4
-	br label %return
-
-return:		; preds = %bb1
-	ret i32 0
-}
-
-declare i32 @foo(...)

Removed: llvm/trunk/test/Transforms/GVN/readonly-calls.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/readonly-calls.ll?rev=60987&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/GVN/readonly-calls.ll (original)
+++ llvm/trunk/test/Transforms/GVN/readonly-calls.ll (removed)
@@ -1,29 +0,0 @@
-; RUN: llvm-as < %s | opt -basicaa -gvn | llvm-dis | grep {call.*strlen} | count 1
-; Should delete the second call to strlen even though the intervening strchr call exists.
-
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-target triple = "i386-apple-darwin7"
-
-define i8* @test(i8* %P, i8* %Q, i32 %x, i32 %y) nounwind readonly {
-entry:
-	%0 = tail call i32 @strlen(i8* %P) nounwind readonly		;  [#uses=2]
-	%1 = icmp eq i32 %0, 0		;  [#uses=1]
-	br i1 %1, label %bb, label %bb1
-
-bb:		; preds = %entry
-	%2 = sdiv i32 %x, %y		;  [#uses=1]
-	br label %bb1
-
-bb1:		; preds = %bb, %entry
-	%x_addr.0 = phi i32 [ %2, %bb ], [ %x, %entry ]		;  [#uses=1]
-	%3 = tail call i8* @strchr(i8* %Q, i32 97) nounwind readonly		;  [#uses=1]
-	%4 = tail call i32 @strlen(i8* %P) nounwind readonly		;  [#uses=1]
-	%5 = add i32 %x_addr.0, %0		;  [#uses=1]
-	%.sum = sub i32 %5, %4		;  [#uses=1]
-	%6 = getelementptr i8* %3, i32 %.sum		;  [#uses=1]
-	ret i8* %6
-}
-
-declare i32 @strlen(i8*) nounwind readonly
-
-declare i8* @strchr(i8*, i32) nounwind readonly

Copied: llvm/trunk/test/Transforms/GVN/rle-nonlocal.ll (from r60973, llvm/trunk/test/Transforms/GVN/nonlocal.ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-nonlocal.ll?p2=llvm/trunk/test/Transforms/GVN/rle-nonlocal.ll&p1=llvm/trunk/test/Transforms/GVN/nonlocal.ll&r1=60973&r2=60988&rev=60988&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/nonlocal.ll (original)
+++ llvm/trunk/test/Transforms/GVN/rle-nonlocal.ll Sat Dec 13 12:47:40 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {%DEAD = phi i32. }
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {DEAD =}
 
 define i32 @main(i32** %p) {
 block1:

Copied: llvm/trunk/test/Transforms/GVN/rle-semidominated.ll (from r60973, llvm/trunk/test/Transforms/GVN/semidominated.ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-semidominated.ll?p2=llvm/trunk/test/Transforms/GVN/rle-semidominated.ll&p1=llvm/trunk/test/Transforms/GVN/semidominated.ll&r1=60973&r2=60988&rev=60988&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/semidominated.ll (original)
+++ llvm/trunk/test/Transforms/GVN/rle-semidominated.ll Sat Dec 13 12:47:40 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {DEAD = phi i32 }
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {DEAD =}
 
 define i32 @main(i32* %p) {
 block1:

Removed: llvm/trunk/test/Transforms/GVN/semidominated.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/semidominated.ll?rev=60987&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/GVN/semidominated.ll (original)
+++ llvm/trunk/test/Transforms/GVN/semidominated.ll (removed)
@@ -1,19 +0,0 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {DEAD =}
-
-define i32 @main(i32* %p) {
-block1:
-  %z = load i32* %p
-	br i1 true, label %block2, label %block3
-
-block2:
- br label %block4
-
-block3:
-  %b = bitcast i32 0 to i32
-  store i32 %b, i32* %p
-  br label %block4
-
-block4:
-  %DEAD = load i32* %p
-  ret i32 %DEAD
-}




From clattner at apple.com  Sat Dec 13 12:48:46 2008
From: clattner at apple.com (Chris Lattner)
Date: Sat, 13 Dec 2008 10:48:46 -0800
Subject: [llvm-commits] [llvm] r60973 - in /llvm/trunk:
	lib/Transforms/Scalar/GVN.cpp
	test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
	test/Transforms/GVN/2007-07-26-PhiErasure.ll
	test/Transforms/GVN/2007-07-31-NoDomInherit.ll	test/Transforms/GVN/nonlocal.ll
	test/Transforms/GVN/rle-must-alias.ll	test/Transforms/GVN/semidominated.ll
In-Reply-To: 
References: <200812130722.mBD7Ml5j018371@zion.cs.uiuc.edu>
	
Message-ID: <0F3C08D2-FD5D-49FC-8BE6-491D4D185631@apple.com>


On Dec 13, 2008, at 1:29 AM, Bill Wendling wrote:

> On Dec 12, 2008, at 11:22 PM, Chris Lattner wrote:
>
>> Author: lattner
>> Date: Sat Dec 13 01:22:47 2008
>> New Revision: 60973
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=60973&view=rev
>> Log:
>> make RLE preserve the name of the load that it replaces.  This is  
>> just
>> a pretification of the IR.
>>
> Chris,
>
> This patch is inexplicably causing a failure for self-hosted LLVM in
> release mode. See here for the failure:
>
> http://bwendling.apple.com:8020/builders/full-llvm-OSX/builds/180/steps/shell/logs/stdio

Is this reproducible or a one-time burp?  I can't imagine this causing  
any sort of problem like this.

-Chris


From isanbard at gmail.com  Sat Dec 13 14:41:47 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Sat, 13 Dec 2008 12:41:47 -0800
Subject: [llvm-commits] [llvm] r60973 - in /llvm/trunk:
	lib/Transforms/Scalar/GVN.cpp
	test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
	test/Transforms/GVN/2007-07-26-PhiErasure.ll
	test/Transforms/GVN/2007-07-31-NoDomInherit.ll	test/Transforms/GVN/nonlocal.ll
	test/Transforms/GVN/rle-must-alias.ll	test/Transforms/GVN/semidominated.ll
In-Reply-To: <0F3C08D2-FD5D-49FC-8BE6-491D4D185631@apple.com>
References: <200812130722.mBD7Ml5j018371@zion.cs.uiuc.edu>
	
	<0F3C08D2-FD5D-49FC-8BE6-491D4D185631@apple.com>
Message-ID: <524101C9-5DF5-45B4-A336-25856909F5BB@gmail.com>

On Dec 13, 2008, at 10:48 AM, Chris Lattner wrote:

> On Dec 13, 2008, at 1:29 AM, Bill Wendling wrote:
>
>> On Dec 12, 2008, at 11:22 PM, Chris Lattner wrote:
>>
>>> Author: lattner
>>> Date: Sat Dec 13 01:22:47 2008
>>> New Revision: 60973
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=60973&view=rev
>>> Log:
>>> make RLE preserve the name of the load that it replaces.  This is
>>> just
>>> a pretification of the IR.
>>>
>> Chris,
>>
>> This patch is inexplicably causing a failure for self-hosted LLVM in
>> release mode. See here for the failure:
>>
>> http://bwendling.apple.com:8020/builders/full-llvm-OSX/builds/180/steps/shell/logs/stdio
>
> Is this reproducible or a one-time burp?  I can't imagine this causing
> any sort of problem like this.
>
I was able to reproduce it on my machine, but it seems involved  
because it's complaining about .o files in a .a file missing  
something. I could get you a .bc of the .o files and let you try to  
grok what's going on from there. Maybe this llvm::APFloat::IEEEsingle  
symbol is just being misnamed?

-bw



From sabre at nondot.org  Sat Dec 13 15:04:20 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sat, 13 Dec 2008 21:04:20 -0000
Subject: [llvm-commits] [llvm] r60994 -
	/llvm/trunk/test/Transforms/GVN/rle-no-phi-translate.ll
Message-ID: <200812132104.mBDL4KId023049@zion.cs.uiuc.edu>

Author: lattner
Date: Sat Dec 13 15:04:20 2008
New Revision: 60994

URL: http://llvm.org/viewvc/llvm-project?rev=60994&view=rev
Log:
RLE isn't smart enough to eliminate this safely yet.

Added:
    llvm/trunk/test/Transforms/GVN/rle-no-phi-translate.ll

Added: llvm/trunk/test/Transforms/GVN/rle-no-phi-translate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-no-phi-translate.ll?rev=60994&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/GVN/rle-no-phi-translate.ll (added)
+++ llvm/trunk/test/Transforms/GVN/rle-no-phi-translate.ll Sat Dec 13 15:04:20 2008
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep load
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+
+define i32 @g(i32* %b, i32* %c) nounwind {
+entry:
+        store i32 1, i32* %b
+        store i32 2, i32* %c
+        
+	%t1 = icmp eq i32* %b, null		;  [#uses=1]
+	br i1 %t1, label %bb, label %bb2
+
+bb:		; preds = %entry
+	br label %bb2
+
+bb2:		; preds = %bb1, %bb
+	%c_addr.0 = phi i32* [ %b, %entry ], [ %c, %bb ]		;  [#uses=1]
+	%cv = load i32* %c_addr.0, align 4		;  [#uses=1]
+	ret i32 %cv
+}
+




From baldrick at free.fr  Sat Dec 13 16:33:39 2008
From: baldrick at free.fr (Duncan Sands)
Date: Sat, 13 Dec 2008 22:33:39 -0000
Subject: [llvm-commits] [llvm] r60997 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAG.h
 lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <200812132233.mBDMXdMl025849@zion.cs.uiuc.edu>

Author: baldrick
Date: Sat Dec 13 16:33:38 2008
New Revision: 60997

URL: http://llvm.org/viewvc/llvm-project?rev=60997&view=rev
Log:
LegalizeDAG is not supposed to introduce illegal
types into the DAG if they were not already there.
Check this with an assertion.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=60997&r1=60996&r2=60997&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Sat Dec 13 16:33:38 2008
@@ -212,7 +212,7 @@
   ///
   /// Note that this is an involved process that may invalidate pointers into
   /// the graph.
-  void Legalize();
+  void Legalize(bool TypesNeedLegalizing);
 
   /// RemoveDeadNodes - This method deletes all unreachable nodes in the
   /// SelectionDAG.

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=60997&r1=60996&r2=60997&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sat Dec 13 16:33:38 2008
@@ -51,6 +51,7 @@
 class VISIBILITY_HIDDEN SelectionDAGLegalize {
   TargetLowering &TLI;
   SelectionDAG &DAG;
+  bool TypesNeedLegalizing;
 
   // Libcall insertion helpers.
   
@@ -127,7 +128,7 @@
   }
 
 public:
-  explicit SelectionDAGLegalize(SelectionDAG &DAG);
+  explicit SelectionDAGLegalize(SelectionDAG &DAG, bool TypesNeedLegalizing);
 
   /// getTypeAction - Return how we should legalize values of this type, either
   /// it is already legal or we need to expand it into multiple registers of
@@ -348,8 +349,8 @@
   return TLI.isShuffleMaskLegal(Mask, VT) ? Mask.getNode() : 0;
 }
 
-SelectionDAGLegalize::SelectionDAGLegalize(SelectionDAG &dag)
-  : TLI(dag.getTargetLoweringInfo()), DAG(dag),
+SelectionDAGLegalize::SelectionDAGLegalize(SelectionDAG &dag, bool types)
+  : TLI(dag.getTargetLoweringInfo()), DAG(dag), TypesNeedLegalizing(types),
     ValueTypeActions(TLI.getValueTypeActions()) {
   assert(MVT::LAST_VALUETYPE <= 32 &&
          "Too many value types for ValueTypeActions to hold!");
@@ -488,6 +489,8 @@
 /// appropriate for its type.
 void SelectionDAGLegalize::HandleOp(SDValue Op) {
   MVT VT = Op.getValueType();
+  assert((TypesNeedLegalizing || getTypeAction(VT) == Legal) &&
+         "Illegal type introduced after type legalization?");
   switch (getTypeAction(VT)) {
   default: assert(0 && "Bad type action!");
   case Legal:   (void)LegalizeOp(Op); break;
@@ -8602,9 +8605,9 @@
 
 // SelectionDAG::Legalize - This is the entry point for the file.
 //
-void SelectionDAG::Legalize() {
+void SelectionDAG::Legalize(bool TypesNeedLegalizing) {
   /// run - This is the main entry point to this class.
   ///
-  SelectionDAGLegalize(*this).LegalizeDAG();
+  SelectionDAGLegalize(*this, TypesNeedLegalizing).LegalizeDAG();
 }
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=60997&r1=60996&r2=60997&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sat Dec 13 16:33:38 2008
@@ -620,9 +620,9 @@
 
   if (TimePassesIsEnabled) {
     NamedRegionTimer T("DAG Legalization", GroupName);
-    CurDAG->Legalize();
+    CurDAG->Legalize(DisableLegalizeTypes);
   } else {
-    CurDAG->Legalize();
+    CurDAG->Legalize(DisableLegalizeTypes);
   }
   
   DOUT << "Legalized selection DAG:\n";




From kremenek at apple.com  Sat Dec 13 16:54:52 2008
From: kremenek at apple.com (Ted Kremenek)
Date: Sat, 13 Dec 2008 22:54:52 -0000
Subject: [llvm-commits] [llvm] r60999 - /llvm/tags/checker/checker-133/
Message-ID: <200812132254.mBDMsqRD026498@zion.cs.uiuc.edu>

Author: kremenek
Date: Sat Dec 13 16:54:52 2008
New Revision: 60999

URL: http://llvm.org/viewvc/llvm-project?rev=60999&view=rev
Log:
Tagging checker-133.

Added:
    llvm/tags/checker/checker-133/
      - copied from r60998, llvm/trunk/



From isanbard at gmail.com  Sat Dec 13 17:49:11 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Sat, 13 Dec 2008 15:49:11 -0800
Subject: [llvm-commits] [llvm] r60973 - in /llvm/trunk:
	lib/Transforms/Scalar/GVN.cpp
	test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
	test/Transforms/GVN/2007-07-26-PhiErasure.ll
	test/Transforms/GVN/2007-07-31-NoDomInherit.ll	test/Transforms/GVN/nonlocal.ll
	test/Transforms/GVN/rle-must-alias.ll	test/Transforms/GVN/semidominated.ll
In-Reply-To: <0F3C08D2-FD5D-49FC-8BE6-491D4D185631@apple.com>
References: <200812130722.mBD7Ml5j018371@zion.cs.uiuc.edu>
	
	<0F3C08D2-FD5D-49FC-8BE6-491D4D185631@apple.com>
Message-ID: 

On Dec 13, 2008, at 10:48 AM, Chris Lattner wrote:

> On Dec 13, 2008, at 1:29 AM, Bill Wendling wrote:
>
>> On Dec 12, 2008, at 11:22 PM, Chris Lattner wrote:
>>
>>> Author: lattner
>>> Date: Sat Dec 13 01:22:47 2008
>>> New Revision: 60973
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=60973&view=rev
>>> Log:
>>> make RLE preserve the name of the load that it replaces.  This is
>>> just
>>> a pretification of the IR.
>>>
>> Chris,
>>
>> This patch is inexplicably causing a failure for self-hosted LLVM in
>> release mode. See here for the failure:
>>
>> http://bwendling.apple.com:8020/builders/full-llvm-OSX/builds/180/steps/shell/logs/stdio
>
> Is this reproducible or a one-time burp?  I can't imagine this causing
> any sort of problem like this.
>
Attached are the APFloat.bc and Constants.bc files. They were compiled  
with:

   "-O3 -emit-llvm -c -mllvm -disable-llvm-optzns"

You can probably get the output with "opt -O3" with opt compiled in  
Release mode.

-bw

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From isanbard at gmail.com  Sat Dec 13 17:53:01 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Sat, 13 Dec 2008 23:53:01 -0000
Subject: [llvm-commits] [llvm] r61001 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAG.h
 lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <200812132353.mBDNr1RM028780@zion.cs.uiuc.edu>

Author: void
Date: Sat Dec 13 17:53:00 2008
New Revision: 61001

URL: http://llvm.org/viewvc/llvm-project?rev=61001&view=rev
Log:
Temporarily revert r60997. It was causing this failure:

Running /Users/void/llvm/llvm.src/test/CodeGen/Generic/dg.exp ...
FAIL: /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll
Failed with exit(1) at line 1
while running:  llvm-as < /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll |  llc | /usr/bin/grep 68719476738
Assertion failed: ((TypesNeedLegalizing || getTypeAction(VT) == Legal) && "Illegal type introduced after type legalization?"), function HandleOp, file /Users/void/llvm/llvm.src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 493.
0   llc               0x0085392e char const* std::find(char const*, char const*, char const&) + 98
1   llc               0x00853e63 llvm::sys::PrintStackTraceOnErrorSignal() + 593
2   libSystem.B.dylib 0x96cac09b _sigtramp + 43
3   libSystem.B.dylib 0xffffffff _sigtramp + 1765097359
4   libSystem.B.dylib 0x96d24ec2 raise + 26
5   libSystem.B.dylib 0x96d3447f abort + 73
6   libSystem.B.dylib 0x96d26063 __assert_rtn + 101
7   llc               0x004f9018 llvm::cast_retty::ret_type llvm::castLegalize(DisableLegalizeTypes);
+    CurDAG->Legalize();
   } else {
-    CurDAG->Legalize(DisableLegalizeTypes);
+    CurDAG->Legalize();
   }
   
   DOUT << "Legalized selection DAG:\n";




From isanbard at gmail.com  Sat Dec 13 17:53:13 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Sat, 13 Dec 2008 15:53:13 -0800
Subject: [llvm-commits] [llvm] r60997 - in /llvm/trunk:
	include/llvm/CodeGen/SelectionDAG.h
	lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
	lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
In-Reply-To: <200812132233.mBDMXdMl025849@zion.cs.uiuc.edu>
References: <200812132233.mBDMXdMl025849@zion.cs.uiuc.edu>
Message-ID: <4F6EF79C-645C-4561-8402-A5222F12F6AD@gmail.com>

Duncan,

This patch is causing this failure:

Running /Users/void/llvm/llvm.src/test/CodeGen/Generic/dg.exp ...
FAIL: /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large- 
immediate.ll
Failed with exit(1) at line 1
while running:  llvm-as < /Users/void/llvm/llvm.src/test/CodeGen/ 
Generic/asm-large-immediate.ll |  llc | /usr/bin/grep 68719476738
Assertion failed: ((TypesNeedLegalizing || getTypeAction(VT) == Legal)  
&& "Illegal type introduced after type legalization?"), function  
HandleOp, file /Users/void/llvm/llvm.src/lib/CodeGen/SelectionDAG/ 
LegalizeDAG.cpp, line 493.
0   llc               0x0085392e char const* std::find(char const*, char const*, char const&) + 98
1   llc               0x00853e63  
llvm::sys::PrintStackTraceOnErrorSignal() + 593
2   libSystem.B.dylib 0x96cac09b _sigtramp + 43
3   libSystem.B.dylib 0xffffffff _sigtramp + 1765097359
4   libSystem.B.dylib 0x96d24ec2 raise + 26
5   libSystem.B.dylib 0x96d3447f abort + 73
6   libSystem.B.dylib 0x96d26063 __assert_rtn + 101
7   llc               0x004f9018  
llvm::cast_retty::ret_type  
llvm::cast Author: baldrick
> Date: Sat Dec 13 16:33:38 2008
> New Revision: 60997
>
> URL: http://llvm.org/viewvc/llvm-project?rev=60997&view=rev
> Log:
> LegalizeDAG is not supposed to introduce illegal
> types into the DAG if they were not already there.
> Check this with an assertion.
>
> Modified:
>    llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
>    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
>    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
>
> Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=60997&r1=60996&r2=60997&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Sat Dec 13  
> 16:33:38 2008
> @@ -212,7 +212,7 @@
>   ///
>   /// Note that this is an involved process that may invalidate  
> pointers into
>   /// the graph.
> -  void Legalize();
> +  void Legalize(bool TypesNeedLegalizing);
>
>   /// RemoveDeadNodes - This method deletes all unreachable nodes in  
> the
>   /// SelectionDAG.
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=60997&r1=60996&r2=60997&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sat Dec 13  
> 16:33:38 2008
> @@ -51,6 +51,7 @@
> class VISIBILITY_HIDDEN SelectionDAGLegalize {
>   TargetLowering &TLI;
>   SelectionDAG &DAG;
> +  bool TypesNeedLegalizing;
>
>   // Libcall insertion helpers.
>
> @@ -127,7 +128,7 @@
>   }
>
> public:
> -  explicit SelectionDAGLegalize(SelectionDAG &DAG);
> +  explicit SelectionDAGLegalize(SelectionDAG &DAG, bool  
> TypesNeedLegalizing);
>
>   /// getTypeAction - Return how we should legalize values of this  
> type, either
>   /// it is already legal or we need to expand it into multiple  
> registers of
> @@ -348,8 +349,8 @@
>   return TLI.isShuffleMaskLegal(Mask, VT) ? Mask.getNode() : 0;
> }
>
> -SelectionDAGLegalize::SelectionDAGLegalize(SelectionDAG &dag)
> -  : TLI(dag.getTargetLoweringInfo()), DAG(dag),
> +SelectionDAGLegalize::SelectionDAGLegalize(SelectionDAG &dag, bool  
> types)
> +  : TLI(dag.getTargetLoweringInfo()), DAG(dag),  
> TypesNeedLegalizing(types),
>     ValueTypeActions(TLI.getValueTypeActions()) {
>   assert(MVT::LAST_VALUETYPE <= 32 &&
>          "Too many value types for ValueTypeActions to hold!");
> @@ -488,6 +489,8 @@
> /// appropriate for its type.
> void SelectionDAGLegalize::HandleOp(SDValue Op) {
>   MVT VT = Op.getValueType();
> +  assert((TypesNeedLegalizing || getTypeAction(VT) == Legal) &&
> +         "Illegal type introduced after type legalization?");
>   switch (getTypeAction(VT)) {
>   default: assert(0 && "Bad type action!");
>   case Legal:   (void)LegalizeOp(Op); break;
> @@ -8602,9 +8605,9 @@
>
> // SelectionDAG::Legalize - This is the entry point for the file.
> //
> -void SelectionDAG::Legalize() {
> +void SelectionDAG::Legalize(bool TypesNeedLegalizing) {
>   /// run - This is the main entry point to this class.
>   ///
> -  SelectionDAGLegalize(*this).LegalizeDAG();
> +  SelectionDAGLegalize(*this, TypesNeedLegalizing).LegalizeDAG();
> }
>
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=60997&r1=60996&r2=60997&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp  
> (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sat Dec  
> 13 16:33:38 2008
> @@ -620,9 +620,9 @@
>
>   if (TimePassesIsEnabled) {
>     NamedRegionTimer T("DAG Legalization", GroupName);
> -    CurDAG->Legalize();
> +    CurDAG->Legalize(DisableLegalizeTypes);
>   } else {
> -    CurDAG->Legalize();
> +    CurDAG->Legalize(DisableLegalizeTypes);
>   }
>
>   DOUT << "Legalized selection DAG:\n";
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From monping at apple.com  Sat Dec 13 20:25:20 2008
From: monping at apple.com (Mon Ping Wang)
Date: Sat, 13 Dec 2008 18:25:20 -0800
Subject: [llvm-commits] Patch: LegalizeType for promoting some operands
In-Reply-To: <200812131307.50844.baldrick@free.fr>
References: <7BF246A0-A2EB-4C0E-A20F-0A65A0A62BBC@apple.com>
	<200812131307.50844.baldrick@free.fr>
Message-ID: 

Hi Duncan,

For the insert issue, the following program will cause it.   The  
scalar to vector problem is show in widening where we generate a  
scalar_to_vector of an i64 to v2i64 (when we disable mmx).  I'm going  
to try to checkin the widening this weekend or Monday (it hasn't  
changed since the last patch). I'll try to construct IR that will  
generate a scalar_to_vector node with the current tot llvm.  The  
extract vector element is more difficult as it was shown in  
architecture where we need promote basic integer types.

Cheers,
-- Mon Ping

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On Dec 13, 2008, at 1:07 PM, Duncan Sands wrote:

> Hi Mon Ping, do you have any testcases?  I will reply completely  
> later.
>
> Ciao,
>
> Duncan.
>
> PS:
>
>>  - A modification to PromoteIntRes_EXTRACT_VECTOR_ELT to check if the
>> extract vector element type is the expected promoted type and if not,
>> then extend the result.
>
> Yes, this is a bug.


From brukman+llvm at gmail.com  Sun Dec 14 01:20:37 2008
From: brukman+llvm at gmail.com (Misha Brukman)
Date: Sun, 14 Dec 2008 07:20:37 -0000
Subject: [llvm-commits] [llvm] r61004 - /llvm/trunk/docs/llvm.css
Message-ID: <200812140720.mBE7KcFS010272@zion.cs.uiuc.edu>

Author: brukman
Date: Sun Dec 14 01:20:36 2008
New Revision: 61004

URL: http://llvm.org/viewvc/llvm-project?rev=61004&view=rev
Log:
CSS cleanup:
* Lowercased all HTML element names
* Standardized spacing around { and }
* removed class "doc_table_nw": grep finds no uses

Modified:
    llvm/trunk/docs/llvm.css

Modified: llvm/trunk/docs/llvm.css
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/llvm.css?rev=61004&r1=61003&r2=61004&view=diff

==============================================================================
--- llvm/trunk/docs/llvm.css (original)
+++ llvm/trunk/docs/llvm.css Sun Dec 14 01:20:36 2008
@@ -6,20 +6,19 @@
 .body { color: black; background: white; margin: 0 0 0 0 }
 
 /* No borders on image links */
-a:link img, a:visited img {border-style: none}
+a:link img, a:visited img { border-style: none }
 
 address img { float: right; width: 88px; height: 31px; }
 address     { clear: right; }
 
-TR, TD      { border: 2px solid gray; padding: 4pt 4pt 2pt 2pt; }
-TH          { border: 2px solid gray; font-weight: bold; font-size: 105%;
-              background: url("img/lines.gif");
-              font-family: "Georgia,Palatino,Times,Roman,SanSerif";
-              text-align:center;
-              vertical-align: middle; }
-TABLE       { text-align: center; border: 2px solid black;
+table       { text-align: center; border: 2px solid black;
               border-collapse: collapse; margin-top: 1em; margin-left: 1em;
               margin-right: 1em; margin-bottom: 1em; }
+tr, td      { border: 2px solid gray; padding: 4pt 4pt 2pt 2pt; }
+th          { border: 2px solid gray; font-weight: bold; font-size: 105%;
+              background: url("img/lines.gif");
+              font-family: "Georgia,Palatino,Times,Roman,SanSerif";
+              text-align: center; vertical-align: middle; }
 /*
  * Documentation
  */
@@ -61,39 +60,33 @@
 .doc_table      { text-align: center; width: 90%;
                   padding: 1px 1px 1px 1px; border: 1px; }
 
-.doc_table_nw   { text-align: center; border: 1px;
-    		  padding: 1px 1px 1px 1px; }
-
 .doc_warning    { color: red; font-weight: bold }
 
 .doc_code, .literal-block
                 { border: solid 1px gray; background: #eeeeee;
                   margin: 0 1em 0 1em;
                   padding: 0 1em 0 1em;
-                  display:table;
+                  display: table;
                 }
 
 .doc_notes      { background: #fafafa; border: 1px solid #cecece;
                   padding: 0.1em }
 
-TABLE.layout    { text-align: left; border: none; border-collapse: collapse;
+table.layout    { text-align: left; border: none; border-collapse: collapse;
                   padding: 4px 4px 4px 4px; }
-TR.layout       { border: none; padding: 4pt 4pt 2pt 2pt; }
-TD.layout       { border: none; padding: 4pt 4pt 2pt 2pt;
-                  vertical-align: top;}
-TD.left         { border: none; padding: 4pt 4pt 2pt 2pt; text-align: left;
-                  vertical-align: top;}
-TD.right        { border: none; padding: 4pt 4pt 2pt 2pt; text-align: right;
-                  vertical-align: top;}
-TH.layout       { border: none; font-weight: bold; font-size: 105%;
-                  text-align:center; vertical-align: middle; }
+tr.layout, td.layout, td.left, td.right
+                { border: none; padding: 4pt 4pt 2pt 2pt; vertical-align: top; }
+td.left         { text-align: left }
+td.right        { text-align: right }
+th.layout       { border: none; font-weight: bold; font-size: 105%;
+                  text-align: center; vertical-align: middle; }
 
 /* Left align table cell */
 .td_left        { border: 2px solid gray; text-align: left; }
 
 /* ReST-specific */
-.title { margin-top: 0}
-#contents { display: none; }
+.title { margin-top: 0 }
+#contents { display: none }
 div.contents ul { list-style-type: decimal }
 .literal-block { padding: 1em 2em 1em 1em }
 .toc-backref    { color: black; text-decoration: none; }




From brukman+llvm at gmail.com  Sun Dec 14 02:01:51 2008
From: brukman+llvm at gmail.com (Misha Brukman)
Date: Sun, 14 Dec 2008 08:01:51 -0000
Subject: [llvm-commits] [llvm] r61005 - /llvm/trunk/docs/Lexicon.html
Message-ID: <200812140801.mBE81qpR011529@zion.cs.uiuc.edu>

Author: brukman
Date: Sun Dec 14 02:01:51 2008
New Revision: 61005

URL: http://llvm.org/viewvc/llvm-project?rev=61005&view=rev
Log:
Fixed HTML validator warning.

Modified:
    llvm/trunk/docs/Lexicon.html

Modified: llvm/trunk/docs/Lexicon.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/Lexicon.html?rev=61005&r1=61004&r2=61005&view=diff

==============================================================================
--- llvm/trunk/docs/Lexicon.html (original)
+++ llvm/trunk/docs/Lexicon.html Sun Dec 14 02:01:51 2008
@@ -214,7 +214,7 @@
     Root
 In garbage collection, a
     pointer variable lying outside of the heap from which
     the collector begins its reachability analysis. In the context of code
-    generation, "root" almost always refers to a "stack root"—a local or
+    generation, "root" almost always refers to a "stack root" -- a local or
     temporary variable within an executing function.
   
 




From baldrick at free.fr  Sun Dec 14 02:08:48 2008
From: baldrick at free.fr (Duncan Sands)
Date: Sun, 14 Dec 2008 09:08:48 +0100
Subject: [llvm-commits] [llvm] r60997 - in /llvm/trunk:
	include/llvm/CodeGen/SelectionDAG.h
	lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
	lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
In-Reply-To: <4F6EF79C-645C-4561-8402-A5222F12F6AD@gmail.com>
References: <200812132233.mBDMXdMl025849@zion.cs.uiuc.edu>
	<4F6EF79C-645C-4561-8402-A5222F12F6AD@gmail.com>
Message-ID: <200812140908.49014.baldrick@free.fr>

> This patch is causing this failure:

Which platform is this on?

Thanks,

Duncan.


From isanbard at gmail.com  Sun Dec 14 02:57:31 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Sun, 14 Dec 2008 00:57:31 -0800
Subject: [llvm-commits] [llvm] r60997 - in /llvm/trunk:
	include/llvm/CodeGen/SelectionDAG.h
	lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
	lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
In-Reply-To: <200812140908.49014.baldrick@free.fr>
References: <200812132233.mBDMXdMl025849@zion.cs.uiuc.edu>
	<4F6EF79C-645C-4561-8402-A5222F12F6AD@gmail.com>
	<200812140908.49014.baldrick@free.fr>
Message-ID: 

On Dec 14, 2008, at 12:08 AM, Duncan Sands wrote:

>> This patch is causing this failure:
>
> Which platform is this on?
>
Darwin - Leopard.

-bw



From baldrick at free.fr  Sun Dec 14 03:43:15 2008
From: baldrick at free.fr (Duncan Sands)
Date: Sun, 14 Dec 2008 09:43:15 -0000
Subject: [llvm-commits] [llvm] r61006 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAG.h
 lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <200812140943.mBE9hGXk024714@zion.cs.uiuc.edu>

Author: baldrick
Date: Sun Dec 14 03:43:15 2008
New Revision: 61006

URL: http://llvm.org/viewvc/llvm-project?rev=61006&view=rev
Log:
Reapply r60997, this time without forgetting that
target constants are allowed to have an illegal
type.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=61006&r1=61005&r2=61006&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Sun Dec 14 03:43:15 2008
@@ -212,7 +212,7 @@
   ///
   /// Note that this is an involved process that may invalidate pointers into
   /// the graph.
-  void Legalize();
+  void Legalize(bool TypesNeedLegalizing);
 
   /// RemoveDeadNodes - This method deletes all unreachable nodes in the
   /// SelectionDAG.

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=61006&r1=61005&r2=61006&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sun Dec 14 03:43:15 2008
@@ -51,6 +51,7 @@
 class VISIBILITY_HIDDEN SelectionDAGLegalize {
   TargetLowering &TLI;
   SelectionDAG &DAG;
+  bool TypesNeedLegalizing;
 
   // Libcall insertion helpers.
   
@@ -127,7 +128,7 @@
   }
 
 public:
-  explicit SelectionDAGLegalize(SelectionDAG &DAG);
+  explicit SelectionDAGLegalize(SelectionDAG &DAG, bool TypesNeedLegalizing);
 
   /// getTypeAction - Return how we should legalize values of this type, either
   /// it is already legal or we need to expand it into multiple registers of
@@ -348,8 +349,8 @@
   return TLI.isShuffleMaskLegal(Mask, VT) ? Mask.getNode() : 0;
 }
 
-SelectionDAGLegalize::SelectionDAGLegalize(SelectionDAG &dag)
-  : TLI(dag.getTargetLoweringInfo()), DAG(dag),
+SelectionDAGLegalize::SelectionDAGLegalize(SelectionDAG &dag, bool types)
+  : TLI(dag.getTargetLoweringInfo()), DAG(dag), TypesNeedLegalizing(types),
     ValueTypeActions(TLI.getValueTypeActions()) {
   assert(MVT::LAST_VALUETYPE <= 32 &&
          "Too many value types for ValueTypeActions to hold!");
@@ -488,6 +489,12 @@
 /// appropriate for its type.
 void SelectionDAGLegalize::HandleOp(SDValue Op) {
   MVT VT = Op.getValueType();
+  // If the type legalizer was run then we should never see any illegal result
+  // types here except for target constants (the type legalizer does not touch
+  // those).
+  assert((TypesNeedLegalizing || getTypeAction(VT) == Legal ||
+          Op.getOpcode() == ISD::TargetConstant) &&
+         "Illegal type introduced after type legalization?");
   switch (getTypeAction(VT)) {
   default: assert(0 && "Bad type action!");
   case Legal:   (void)LegalizeOp(Op); break;
@@ -8602,9 +8609,9 @@
 
 // SelectionDAG::Legalize - This is the entry point for the file.
 //
-void SelectionDAG::Legalize() {
+void SelectionDAG::Legalize(bool TypesNeedLegalizing) {
   /// run - This is the main entry point to this class.
   ///
-  SelectionDAGLegalize(*this).LegalizeDAG();
+  SelectionDAGLegalize(*this, TypesNeedLegalizing).LegalizeDAG();
 }
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=61006&r1=61005&r2=61006&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sun Dec 14 03:43:15 2008
@@ -620,9 +620,9 @@
 
   if (TimePassesIsEnabled) {
     NamedRegionTimer T("DAG Legalization", GroupName);
-    CurDAG->Legalize();
+    CurDAG->Legalize(DisableLegalizeTypes);
   } else {
-    CurDAG->Legalize();
+    CurDAG->Legalize(DisableLegalizeTypes);
   }
   
   DOUT << "Legalized selection DAG:\n";




From baldrick at free.fr  Sun Dec 14 03:44:47 2008
From: baldrick at free.fr (Duncan Sands)
Date: Sun, 14 Dec 2008 10:44:47 +0100
Subject: [llvm-commits] [llvm] r60997 - in /llvm/trunk:
	include/llvm/CodeGen/SelectionDAG.h
	lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
	lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
In-Reply-To: <4F6EF79C-645C-4561-8402-A5222F12F6AD@gmail.com>
References: <200812132233.mBDMXdMl025849@zion.cs.uiuc.edu>
	<4F6EF79C-645C-4561-8402-A5222F12F6AD@gmail.com>
Message-ID: <200812141044.47901.baldrick@free.fr>

Hi Bill, I forgot that the type legalizer does not
try to legalize target constants.  I should have
caught this with my x86-32 checking, but while I
ran the full llvm and Ada testsuites, it looks like
I forgot to do a simple "make check", d'oh!  I've
committed a fixed version.

Ciao,

Duncan.


From nicholas at mxc.ca  Sun Dec 14 11:02:27 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Sun, 14 Dec 2008 09:02:27 -0800
Subject: [llvm-commits] [llvm] r61005 - /llvm/trunk/docs/Lexicon.html
In-Reply-To: <200812140801.mBE81qpR011529@zion.cs.uiuc.edu>
References: <200812140801.mBE81qpR011529@zion.cs.uiuc.edu>
Message-ID: <49453C23.6010106@mxc.ca>

Misha Brukman wrote:
> Author: brukman
> Date: Sun Dec 14 02:01:51 2008
> New Revision: 61005
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=61005&view=rev
> Log:
> Fixed HTML validator warning.
> 
> Modified:
>     llvm/trunk/docs/Lexicon.html
> 
> Modified: llvm/trunk/docs/Lexicon.html
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/Lexicon.html?rev=61005&r1=61004&r2=61005&view=diff
> 
> ==============================================================================
> --- llvm/trunk/docs/Lexicon.html (original)
> +++ llvm/trunk/docs/Lexicon.html Sun Dec 14 02:01:51 2008
> @@ -214,7 +214,7 @@
>      Root
 In garbage collection, a
>      pointer variable lying outside of the heap from which
>      the collector begins its reachability analysis. In the context of code
> -    generation, "root" almost always refers to a "stack root"—a local or
> +    generation, "root" almost always refers to a "stack root" -- a local or

Please use – or —, in this case I think an — is in order.

http://www.alistapart.com/stories/emen/ is an excellent reference for 
this sort of thing.

Nick

>      temporary variable within an executing function.
>    
>  
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 



From resistor at mac.com  Sun Dec 14 13:10:35 2008
From: resistor at mac.com (Owen Anderson)
Date: Sun, 14 Dec 2008 19:10:35 -0000
Subject: [llvm-commits] [llvm] r61009 -
	/llvm/trunk/lib/Transforms/Scalar/GVN.cpp
Message-ID: <200812141910.mBEJAZgD003038@zion.cs.uiuc.edu>

Author: resistor
Date: Sun Dec 14 13:10:35 2008
New Revision: 61009

URL: http://llvm.org/viewvc/llvm-project?rev=61009&view=rev
Log:
Generalize GVN's phi construciton routine to work for things other than loads.

Modified:
    llvm/trunk/lib/Transforms/Scalar/GVN.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=61009&r1=61008&r2=61009&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Sun Dec 14 13:10:35 2008
@@ -728,7 +728,7 @@
     bool processNonLocalLoad(LoadInst* L,
                              SmallVectorImpl &toErase);
     bool processBlock(DomTreeNode* DTN);
-    Value *GetValueForBlock(BasicBlock *BB, LoadInst* orig,
+    Value *GetValueForBlock(BasicBlock *BB, Instruction* orig,
                             DenseMap &Phis,
                             bool top_level = false);
     void dump(DenseMap& d);
@@ -789,7 +789,7 @@
 
 /// GetValueForBlock - Get the value to use within the specified basic block.
 /// available values are in Phis.
-Value *GVN::GetValueForBlock(BasicBlock *BB, LoadInst* orig,
+Value *GVN::GetValueForBlock(BasicBlock *BB, Instruction* orig,
                              DenseMap &Phis,
                              bool top_level) { 
                                  
@@ -837,7 +837,11 @@
   Value* v = CollapsePhi(PN);
   if (!v) {
     // Cache our phi construction results
-    phiMap[orig->getPointerOperand()].insert(PN);
+    if (LoadInst* L = dyn_cast(orig))
+      phiMap[L->getPointerOperand()].insert(PN);
+    else
+      phiMap[orig].insert(PN);
+    
     return PN;
   }
     




From isanbard at gmail.com  Sun Dec 14 13:28:37 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Sun, 14 Dec 2008 11:28:37 -0800
Subject: [llvm-commits] [llvm] r60997 - in /llvm/trunk:
	include/llvm/CodeGen/SelectionDAG.h
	lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
	lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
In-Reply-To: <200812141044.47901.baldrick@free.fr>
References: <200812132233.mBDMXdMl025849@zion.cs.uiuc.edu>
	<4F6EF79C-645C-4561-8402-A5222F12F6AD@gmail.com>
	<200812141044.47901.baldrick@free.fr>
Message-ID: 

On Dec 14, 2008, at 1:44 AM, Duncan Sands wrote:

> Hi Bill, I forgot that the type legalizer does not
> try to legalize target constants.  I should have
> caught this with my x86-32 checking, but while I
> ran the full llvm and Ada testsuites, it looks like
> I forgot to do a simple "make check", d'oh!  I've
> committed a fixed version.
>
Great! Thanks, Duncan.

-bw



From clattner at apple.com  Sun Dec 14 14:21:10 2008
From: clattner at apple.com (Chris Lattner)
Date: Sun, 14 Dec 2008 12:21:10 -0800
Subject: [llvm-commits] [llvm] r61009 -
	/llvm/trunk/lib/Transforms/Scalar/GVN.cpp
In-Reply-To: <200812141910.mBEJAZgD003038@zion.cs.uiuc.edu>
References: <200812141910.mBEJAZgD003038@zion.cs.uiuc.edu>
Message-ID: <4244F4F1-A11F-44B1-B16F-8ECFB4918FA1@apple.com>


On Dec 14, 2008, at 11:10 AM, Owen Anderson wrote:

> Author: resistor
> Date: Sun Dec 14 13:10:35 2008
> New Revision: 61009
>
> URL: http://llvm.org/viewvc/llvm-project?rev=61009&view=rev
> Log:
> Generalize GVN's phi construciton routine to work for things other  
> than loads.

What if the scalar value being analyzed is a load?

-Chris

>
>
> Modified:
>    llvm/trunk/lib/Transforms/Scalar/GVN.cpp
>
> Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=61009&r1=61008&r2=61009&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
> +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Sun Dec 14 13:10:35 2008
> @@ -728,7 +728,7 @@
>     bool processNonLocalLoad(LoadInst* L,
>                              SmallVectorImpl &toErase);
>     bool processBlock(DomTreeNode* DTN);
> -    Value *GetValueForBlock(BasicBlock *BB, LoadInst* orig,
> +    Value *GetValueForBlock(BasicBlock *BB, Instruction* orig,
>                             DenseMap &Phis,
>                             bool top_level = false);
>     void dump(DenseMap& d);
> @@ -789,7 +789,7 @@
>
> /// GetValueForBlock - Get the value to use within the specified  
> basic block.
> /// available values are in Phis.
> -Value *GVN::GetValueForBlock(BasicBlock *BB, LoadInst* orig,
> +Value *GVN::GetValueForBlock(BasicBlock *BB, Instruction* orig,
>                              DenseMap &Phis,
>                              bool top_level) {
>
> @@ -837,7 +837,11 @@
>   Value* v = CollapsePhi(PN);
>   if (!v) {
>     // Cache our phi construction results
> -    phiMap[orig->getPointerOperand()].insert(PN);
> +    if (LoadInst* L = dyn_cast(orig))
> +      phiMap[L->getPointerOperand()].insert(PN);
> +    else
> +      phiMap[orig].insert(PN);
> +
>     return PN;
>   }
>
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From nicholas at mxc.ca  Sun Dec 14 15:08:48 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Sun, 14 Dec 2008 21:08:48 -0000
Subject: [llvm-commits] [llvm] r61010 - /llvm/trunk/docs/AliasAnalysis.html
Message-ID: <200812142108.mBEL8nuw006820@zion.cs.uiuc.edu>

Author: nicholas
Date: Sun Dec 14 15:08:48 2008
New Revision: 61010

URL: http://llvm.org/viewvc/llvm-project?rev=61010&view=rev
Log:
Clarify the meaning of the NoAlias response. The plan is to refer to this from
a future version of LangRef.

Modified:
    llvm/trunk/docs/AliasAnalysis.html

Modified: llvm/trunk/docs/AliasAnalysis.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/AliasAnalysis.html?rev=61010&r1=61009&r2=61010&view=diff

==============================================================================
--- llvm/trunk/docs/AliasAnalysis.html (original)
+++ llvm/trunk/docs/AliasAnalysis.html Sun Dec 14 15:08:48 2008
@@ -191,16 +191,20 @@
 
 
 
-
-An Alias Analysis implementation can return one of three responses:
-MustAlias, MayAlias, and NoAlias.  The No and May alias results are obvious: if
-the two pointers can never equal each other, return NoAlias, if they might,
-return MayAlias.
-
-The MustAlias response is trickier though.  In LLVM, the Must Alias response
-may only be returned if the two memory objects are guaranteed to always start at
-exactly the same location.  If two memory objects overlap, but do not start at
-the same location, return MayAlias.
+The NoAlias response is used when the two pointers refer to distinct objects,
+even regardless of whether the pointers compare equal.  For example, freed
+pointers don't alias any pointers that were allocated afterwards.  As a
+degenerate case, pointers returned by malloc(0) have no bytes for an object,
+and are considered NoAlias even when malloc returns the same pointer.  The same
+rule applies to NULL pointers.
+
+The MayAlias response is used whenever the two pointers might refer to the
+same object.  If the two memory objects overlap, but do not start at the same
+location, return MayAlias.
+
+The MustAlias response may only be returned if the two memory objects are
+guaranteed to always start at exactly the same location. A MustAlias response
+implies that the pointers compare equal.
 
 
 




From resistor at mac.com  Sun Dec 14 15:12:58 2008
From: resistor at mac.com (Owen Anderson)
Date: Sun, 14 Dec 2008 13:12:58 -0800
Subject: [llvm-commits] [llvm] r61009 -
 /llvm/trunk/lib/Transforms/Scalar/GVN.cpp
In-Reply-To: <4244F4F1-A11F-44B1-B16F-8ECFB4918FA1@apple.com>
References: <200812141910.mBEJAZgD003038@zion.cs.uiuc.edu>
	<4244F4F1-A11F-44B1-B16F-8ECFB4918FA1@apple.com>
Message-ID: <1E1AD8E0-365B-4629-9535-7F569385F70C@mac.com>


On Dec 14, 2008, at 12:21 PM, Chris Lattner wrote:
> What if the scalar value being analyzed is a load?
>
> -Chris
>>
>>  Value* v = CollapsePhi(PN);
>>  if (!v) {
>>    // Cache our phi construction results
>> -    phiMap[orig->getPointerOperand()].insert(PN);
>> +    if (LoadInst* L = dyn_cast(orig))
>> +      phiMap[L->getPointerOperand()].insert(PN);
>> +    else
>> +      phiMap[orig].insert(PN);
>> +
>>    return PN;

You'll notice that there's a special case for loads in the one place  
that it matters.

--Owen
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From sabre at nondot.org  Sun Dec 14 15:20:48 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 14 Dec 2008 21:20:48 -0000
Subject: [llvm-commits] [llvm] r61011 -
	/llvm/trunk/test/Transforms/GVN/2008-12-14-rle-reanalyze.ll
Message-ID: <200812142120.mBELKm1D007270@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Dec 14 15:20:46 2008
New Revision: 61011

URL: http://llvm.org/viewvc/llvm-project?rev=61011&view=rev
Log:
another random testcase that shouldn't crash gvn and is
good for coverage with future changes.

Added:
    llvm/trunk/test/Transforms/GVN/2008-12-14-rle-reanalyze.ll

Added: llvm/trunk/test/Transforms/GVN/2008-12-14-rle-reanalyze.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2008-12-14-rle-reanalyze.ll?rev=61011&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/GVN/2008-12-14-rle-reanalyze.ll (added)
+++ llvm/trunk/test/Transforms/GVN/2008-12-14-rle-reanalyze.ll Sun Dec 14 15:20:46 2008
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | opt -gvn | llvm-dis
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+ at sort_value = external global [256 x i32], align 32		; <[256 x i32]*> [#uses=2]
+
+define i32 @Quiesce(i32 %alpha, i32 %beta, i32 %wtm, i32 %ply) nounwind {
+entry:
+	br label %bb22
+
+bb22:		; preds = %bb23, %bb22, %entry
+	br i1 false, label %bb23, label %bb22
+
+bb23:		; preds = %bb23, %bb22
+	%sortv.233 = phi i32* [ getelementptr ([256 x i32]* @sort_value, i32 0, i32 0), %bb22 ], [ %sortv.2, %bb23 ]		;  [#uses=1]
+	%0 = load i32* %sortv.233, align 4		;  [#uses=0]
+	%sortv.2 = getelementptr [256 x i32]* @sort_value, i32 0, i32 0		;  [#uses=1]
+	br i1 false, label %bb23, label %bb22
+}




From sabre at nondot.org  Sun Dec 14 15:36:23 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 14 Dec 2008 21:36:23 -0000
Subject: [llvm-commits] [llvm] r61012 -
 /llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp
Message-ID: <200812142136.mBELaNDV007752@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Dec 14 15:36:23 2008
New Revision: 61012

URL: http://llvm.org/viewvc/llvm-project?rev=61012&view=rev
Log:
eliminate warning when asserts disabled.

Modified:
    llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp?rev=61012&r1=61011&r2=61012&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp Sun Dec 14 15:36:23 2008
@@ -96,7 +96,7 @@
     NewBlock = SplitBlock(NextInst->getParent(), NextInst, this);
 
     bool B = InlineFunction(Call, 0, TD);
-    assert(B && "half_powr didn't inline?");
+    assert(B && "half_powr didn't inline?"); B=B;
 
     BasicBlock *NewBody = NewBlock->getSinglePredecessor();
     assert(NewBody);




From sabre at nondot.org  Sun Dec 14 15:37:33 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 14 Dec 2008 21:37:33 -0000
Subject: [llvm-commits] [llvm] r61013 -
	/llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td
Message-ID: <200812142137.mBELbX3X007795@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Dec 14 15:37:33 2008
New Revision: 61013

URL: http://llvm.org/viewvc/llvm-project?rev=61013&view=rev
Log:
silence warning when asserts disabled.

Modified:
    llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td

Modified: llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td?rev=61013&r1=61012&r2=61013&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td Sun Dec 14 15:37:33 2008
@@ -861,6 +861,7 @@
 //An ugly trick to get the opcode as an imm I can use
 def immBRCond : SDNodeXFormgetZExtValue()) {
+    default: assert(0 && "Unknown branch type");
     case 0:  return getI64Imm(Alpha::BEQ);
     case 1:  return getI64Imm(Alpha::BNE);
     case 2:  return getI64Imm(Alpha::BGE);
@@ -875,7 +876,6 @@
     case 23: return getI64Imm(Alpha::FBGT);
     case 24: return getI64Imm(Alpha::FBLE);
     case 25: return getI64Imm(Alpha::FBLT);
-    default: assert(0 && "Unknown branch type");
   }
 }]>;
 




From sabre at nondot.org  Sun Dec 14 15:38:24 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 14 Dec 2008 21:38:24 -0000
Subject: [llvm-commits] [llvm] r61014 -
	/llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp
Message-ID: <200812142138.mBELcOgs007838@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Dec 14 15:38:24 2008
New Revision: 61014

URL: http://llvm.org/viewvc/llvm-project?rev=61014&view=rev
Log:
silence warning when asserts disabled.

Modified:
    llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp?rev=61014&r1=61013&r2=61014&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp Sun Dec 14 15:38:24 2008
@@ -218,12 +218,12 @@
     case ISD::SUBE: 
     case ISD::ADDE: {
       SDValue InFlag = Node->getOperand(2), CmpLHS;
-      unsigned Opc = InFlag.getOpcode(), MOp;
-
+      unsigned Opc = InFlag.getOpcode(); Opc=Opc;
       assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) || 
               (Opc == ISD::SUBC || Opc == ISD::SUBE)) &&  
              "(ADD|SUB)E flag operand must come from (ADD|SUB)C/E insn");
 
+      unsigned MOp;
       if (Opcode == ISD::ADDE) {
         CmpLHS = InFlag.getValue(0);
         MOp = Mips::ADDu;




From eli.friedman at gmail.com  Sun Dec 14 15:40:26 2008
From: eli.friedman at gmail.com (Eli Friedman)
Date: Sun, 14 Dec 2008 13:40:26 -0800
Subject: [llvm-commits] [llvm] r61010 -
	/llvm/trunk/docs/AliasAnalysis.html
In-Reply-To: <200812142108.mBEL8nuw006820@zion.cs.uiuc.edu>
References: <200812142108.mBEL8nuw006820@zion.cs.uiuc.edu>
Message-ID: 

On Sun, Dec 14, 2008 at 1:08 PM, Nick Lewycky  wrote:
> +The MustAlias response may only be returned if the two memory objects are
> +guaranteed to always start at exactly the same location. A MustAlias response
> +implies that the pointers compare equal.

Do we really guarantee the pointer equality property?  I can easily
imagine an implementation for which this doesn't hold...

-Eli


From nicholas at mxc.ca  Sun Dec 14 15:48:28 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Sun, 14 Dec 2008 13:48:28 -0800
Subject: [llvm-commits] [llvm] r61010
	-	/llvm/trunk/docs/AliasAnalysis.html
In-Reply-To: 
References: <200812142108.mBEL8nuw006820@zion.cs.uiuc.edu>
	
Message-ID: <49457F2C.20301@mxc.ca>

Eli Friedman wrote:
> On Sun, Dec 14, 2008 at 1:08 PM, Nick Lewycky  wrote:
>> +The MustAlias response may only be returned if the two memory objects are
>> +guaranteed to always start at exactly the same location. A MustAlias response
>> +implies that the pointers compare equal.
> 
> Do we really guarantee the pointer equality property?  I can easily
> imagine an implementation for which this doesn't hold...

I'm quite sure that p MustAlias q implies p == q. Am I missing something?

Nick


From sabre at nondot.org  Sun Dec 14 15:58:58 2008
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 14 Dec 2008 21:58:58 -0000
Subject: [llvm-commits] [test-suite] r61016 - in /test-suite/trunk:
 External/SPEC/Makefile.spec Makefile.programs
Message-ID: <200812142158.mBELwwu0008543@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Dec 14 15:58:58 2008
New Revision: 61016

URL: http://llvm.org/viewvc/llvm-project?rev=61016&view=rev
Log:
use bugpoint -llc-safe when debugging opt llvm-ld and opt-beta.  If we're
debugging the optimizer, we'll assume that llc works.  This is less flaky
and faster than depending on the CBE + native compiler.

Modified:
    test-suite/trunk/External/SPEC/Makefile.spec
    test-suite/trunk/Makefile.programs

Modified: test-suite/trunk/External/SPEC/Makefile.spec
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/External/SPEC/Makefile.spec?rev=61016&r1=61015&r2=61016&view=diff

==============================================================================
--- test-suite/trunk/External/SPEC/Makefile.spec (original)
+++ test-suite/trunk/External/SPEC/Makefile.spec Sun Dec 14 15:58:58 2008
@@ -119,7 +119,7 @@
 Output/%.bugpoint-opt: Output/%.noopt-llvm.bc $(LBUGPOINT) \
                          Output/opt-pass-args Output/%.out-nat
 	$(SPEC_SANDBOX) bugpoint-$(RUN_TYPE) $@ $(REF_IN_DIR) \
-	    $(LBUGPOINT) ../$*.noopt-llvm.bc `cat Output/opt-pass-args` $(OPTPASSES) \
+	    $(LBUGPOINT) -llc-safe ../$*.noopt-llvm.bc `cat Output/opt-pass-args` $(OPTPASSES) \
 	    $(BUGPOINT_OPTIONS) $(BUGPOINT_ARGS)
 	@echo "===> Leaving Output/bugpoint-$(RUN_TYPE)"
 
@@ -127,7 +127,7 @@
 Output/%.bugpoint-llvm-ld: Output/%.nollvm-ldopt-llvm.bc $(LBUGPOINT) \
                          Output/llvm-ld-pass-args Output/%.out-nat
 	$(SPEC_SANDBOX) bugpoint-$(RUN_TYPE) $@ $(REF_IN_DIR) \
-	    $(LBUGPOINT) ../$*.nollvm-ldopt-llvm.bc `cat Output/llvm-ld-pass-args` $(OPTPASSES) \
+	    $(LBUGPOINT) -llc-safe ../$*.nollvm-ldopt-llvm.bc `cat Output/llvm-ld-pass-args` $(OPTPASSES) \
 	    $(BUGPOINT_OPTIONS) $(BUGPOINT_ARGS)
 	@echo "===> Leaving Output/bugpoint-$(RUN_TYPE)"
 

Modified: test-suite/trunk/Makefile.programs
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=61016&r1=61015&r2=61016&view=diff

==============================================================================
--- test-suite/trunk/Makefile.programs (original)
+++ test-suite/trunk/Makefile.programs Sun Dec 14 15:58:58 2008
@@ -512,12 +512,12 @@
 $(PROGRAMS_TO_TEST:%=Output/%.bugpoint-opt): \
 Output/%.bugpoint-opt: Output/%.noopt-llvm.bc $(LBUGPOINT) \
                          Output/opt-pass-args Output/%.out-nat
-	$(LBUGPOINT) $< `cat Output/opt-pass-args` $(BUGPOINT_OPTIONS) $(BUGPOINT_ARGS)
+	$(LBUGPOINT) -llc-safe $< `cat Output/opt-pass-args` $(BUGPOINT_OPTIONS) $(BUGPOINT_ARGS)
 
 $(PROGRAMS_TO_TEST:%=Output/%.bugpoint-llvm-ld): \
 Output/%.bugpoint-llvm-ld: Output/%.nollvm-ldopt-llvm.bc $(LBUGPOINT) \
                          Output/llvm-ld-pass-args Output/%.out-nat
-	$(LBUGPOINT) $< `cat Output/llvm-ld-pass-args` $(OPTPASSES) $(BUGPOINT_OPTIONS) $(BUGPOINT_ARGS)
+	$(LBUGPOINT) -llc-safe $< `cat Output/llvm-ld-pass-args` $(OPTPASSES) $(BUGPOINT_OPTIONS) $(BUGPOINT_ARGS)
 
 $(PROGRAMS_TO_TEST:%=Output/%.bugpoint-llc): \
 Output/%.bugpoint-llc: Output/%.llvm.bc $(LBUGPOINT) Output/%.out-nat
@@ -529,7 +529,7 @@
 
 $(PROGRAMS_TO_TEST:%=Output/%.bugpoint-opt-beta): \
 Output/%.bugpoint-opt-beta: Output/%.linked.rbc $(LBUGPOINT) Output/%.out-nat
-	$(LBUGPOINT) $<  $(BUGPOINT_OPTIONS) $(LLCBETAOPTION) $(BUGPOINT_ARGS)
+	$(LBUGPOINT) -llc-safe $<  $(BUGPOINT_OPTIONS) $(LLCBETAOPTION) $(BUGPOINT_ARGS)
 
 $(PROGRAMS_TO_TEST:%=Output/%.bugpoint-jit): \
 Output/%.bugpoint-jit: Output/%.llvm.bc $(LBUGPOINT) Output/%.out-nat




From eli.friedman at gmail.com  Sun Dec 14 16:16:35 2008
From: eli.friedman at gmail.com (Eli Friedman)
Date: Sun, 14 Dec 2008 14:16:35 -0800
Subject: [llvm-commits] [llvm] r61010 -
	/llvm/trunk/docs/AliasAnalysis.html
In-Reply-To: <49457F2C.20301@mxc.ca>
References: <200812142108.mBEL8nuw006820@zion.cs.uiuc.edu>
	
	<49457F2C.20301@mxc.ca>
Message-ID: 

On Sun, Dec 14, 2008 at 1:48 PM, Nick Lewycky  wrote:
> Eli Friedman wrote:
>> On Sun, Dec 14, 2008 at 1:08 PM, Nick Lewycky  wrote:
>>> +The MustAlias response may only be returned if the two memory objects are
>>> +guaranteed to always start at exactly the same location. A MustAlias response
>>> +implies that the pointers compare equal.
>>
>> Do we really guarantee the pointer equality property?  I can easily
>> imagine an implementation for which this doesn't hold...
>
> I'm quite sure that p MustAlias q implies p == q. Am I missing something?

No, nevermind, I'm not sure what I was thinking... a pass that didn't
honor that would cause problems.

-Eli


From baldrick at free.fr  Sun Dec 14 14:11:50 2008
From: baldrick at free.fr (Duncan Sands)
Date: Sun, 14 Dec 2008 21:11:50 +0100
Subject: [llvm-commits] Patch: LegalizeType for promoting some operands
In-Reply-To: <7BF246A0-A2EB-4C0E-A20F-0A65A0A62BBC@apple.com>
References: <7BF246A0-A2EB-4C0E-A20F-0A65A0A62BBC@apple.com>
Message-ID: <200812142111.51375.baldrick@free.fr>

Hi Mon Ping,

> -  return DAG.getNode(ISD::SELECT, NewVT, Odd, Hi, Lo);
> +  SDValue Res = DAG.getNode(ISD::SELECT, NewVT, Odd, Hi, Lo);
> +  MVT NVT = TLI.getTypeToTransformTo(OldVT);
> +  if (Res.getValueType() != NVT) {
> +    assert(Res.getValueType().getSizeInBits() < NVT.getSizeInBits() &&
> +           "Unexpected Result Type");
> +    Res = DAG.getNode(ISD::ANY_EXTEND, NVT, Res);
> +  }

you might as well not bother testing Res.getValueType() != NVT, and
always do the extension.  If the types are equal then SelectionDAG
will fold the node and simply return Res.  The assertion is also
useless: this is checked by the getNode call.

> +  MVT OldEVT = Val.getValueType();

Please add an assertion that this is the same as the vector element
type.

> +  // BitConvert a vector of twice the length out of the expanded elements,

-> Bitconvert to a vector of twice the length with elements of the expanded type,

> +  SDValue Idx = N->getOperand(2);
> +  if (ConstantSDNode *CIdx = dyn_cast(Idx)) {
> +    unsigned IdxVal = CIdx->getZExtValue()*2;
> +    NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, NewVecVT, NewVec, Lo,
> +                         DAG.getIntPtrConstant(IdxVal));
> +    NewVec =  DAG.getNode(ISD::INSERT_VECTOR_ELT, NewVecVT, NewVec, Hi,
> +                          DAG.getIntPtrConstant(IdxVal + 1));
> +  } else {
> +    Idx = DAG.getNode(ISD::SHL, Idx.getValueType(), Idx,
> +                      DAG.getIntPtrConstant(1));
> +    NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, NewVecVT, NewVec, Lo,
> Idx); +    Idx = DAG.getNode(ISD::ADD, Idx.getValueType(), Idx,
> +                      DAG.getIntPtrConstant(1));
> +    NewVec =  DAG.getNode(ISD::INSERT_VECTOR_ELT, NewVecVT, NewVec, Hi,
> Idx); +  }

I think you should drop the special version for constants, and keep
the second version.  Also, in the second version it seems better to
calculate 2*Idx by adding Idx to itself, rather than shifting left
by 1.

> +  for (unsigned i=1; i < NumElts; ++i)

Missing spaces around the equals sign.

Thanks for doing this.

Best wishes,

Duncan.


From baldrick at free.fr  Sun Dec 14 14:13:23 2008
From: baldrick at free.fr (Duncan Sands)
Date: Sun, 14 Dec 2008 21:13:23 +0100
Subject: [llvm-commits] Patch: LegalizeType for promoting some operands
In-Reply-To: 
References: <7BF246A0-A2EB-4C0E-A20F-0A65A0A62BBC@apple.com>
	<200812131307.50844.baldrick@free.fr>
	
Message-ID: <200812142113.23696.baldrick@free.fr>

Hi Mon Ping, thanks for the explanation.  Please don't forget
to add the testcase when you check in the revised patch.

Thanks,

Duncan.


From baldrick at free.fr  Sun Dec 14 17:28:55 2008
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 15 Dec 2008 00:28:55 +0100
Subject: [llvm-commits] Patch: updated widen in LegalizeType
In-Reply-To: <6400B666-5A24-42E8-8C6C-2F70F94E3020@apple.com>
References: <6400B666-5A24-42E8-8C6C-2F70F94E3020@apple.com>
Message-ID: <200812150028.55469.baldrick@free.fr>

Hi Mon Ping,

> +          return VT == VT.getPow2VectorType() ? Expand : Promote;

this seems like an expensive way of testing whether the the number
of elements is a power of two.

> +        // vector length is a power of 2 - split to half the size
vector -> Vector
Missing full stop at end of line.

> +      v2i8           =  14,   //  2 x i8
> +      v4i8           =  15,   //  4 x i8
> +      v2i16          =  16,   //  2 x i16
> +      v8i8           =  17,   //  8 x i8
> +      v4i16          =  18,   //  4 x i16
> +      v2i32          =  19,   //  2 x i32
> +      v1i64          =  20,   //  1 x i64
> +      v16i8          =  21,   // 16 x i8
> +      v8i16          =  22,   //  8 x i16
> +      v3i32          =  23,   //  3 x i32
> +      v4i32          =  24,   //  4 x i32
> +      v2i64          =  25,   //  2 x i64

What's the logic behind this order?  How about dropping
v3i32 and v3f32 from the list of simple value types?

> +  case WidenVector:
> +    if (OutVT.bitsEq(TLI.getTypeToTransformTo(InVT)))

This should be NInVT rather than TLI.getTypeToTransformTo(InVT).

> +      // The input widens to the same size.  Convert to the widen value.

widen value -> widened value

> +    case ISD::SCALAR_TO_VECTOR: Res = ExpandIntOp_SCALAR_TO_VECTOR(N);

Duplicate from your other patch.

> +SDValue DAGTypeLegalizer::ExpandIntOp_SCALAR_TO_VECTOR(SDNode *N) {

Duplicate from your other patch.

> +  unsigned Opcode = N->getOpcode();
> +  unsigned InVTNumElts = InVT.getVectorNumElements();
> +  if (InVTNumElts == WidenNumElts)
> +    return DAG.getNode(Opcode, WidenVT, InOp);

Don't you get here only if the test
  if (getTypeAction(InVT) == WidenVector) {
passed a few lines earlier?  If so, this early exit
would be better inside that previous logic.

> +  if (TLI.isTypeLegal(InWidenVT)) {
> +    // Because the result and the input are different vector types, widening
> +    // the result could create a legal type but widening the input might make
> +    // it an illegal type that might lead to repeatedly splitting the input
> +    // and then widening it. To avoid this, we widen the input only if
> +    // it results in a legal type.

I don't see why this is a problem for this code, which is legalizing the
result.  Isn't it really a problem for WidenVecOp_Convert or SplitVecOp_Convert?
They can refuse to turn a legal result type into an illegal one, instead falling
back to some evil BUILD_VECTOR.

> +    if (InVTNumElts % WidenNumElts == 0) {

How can this happen?

> +  unsigned MinElts = std::min(InVTNumElts, WidenNumElts);

How can this ever be different to InVTNumElts?

> +  case PromoteInteger:
> +    InOp = GetPromotedInteger(InOp);
> +    InVT = InOp.getValueType();
> +    if (WidenVT.bitsEq(InVT))
> +      // The InOp promotes to the same size.  Convert the promoted value.
> +      return DAG.getNode(ISD::BIT_CONVERT, WidenVT, InOp);

I don't think it's wise to modify InOp and InVT like this when
you are not sure to return.  It at least needs a comment in the
break case.  For that matter, it is missing a break (harmless
here, but better style to put one).

> +  case WidenVector:
> +    InOp = GetWidenedVector(InOp);
> +    InVT = InOp.getValueType();
> +    if (WidenVT.bitsEq(InVT))
> +      // The input widens to the same size. Convert to the widen value.
> +      return DAG.getNode(ISD::BIT_CONVERT, WidenVT, InOp);
> +  }

Likewise, including like of an explicit break;.

> +  if (WidenSize % InSize == 0) {
> +    MVT NewInVT;
> +    unsigned NewNumElts = WidenSize / InSize;
> +    if (InVT.isVector()) {
> +      MVT InEltVT = InVT.getVectorElementType();
> +      NewInVT= MVT::getVectorVT(InEltVT, InEltVT.getSizeInBits() / WidenSize);

Shouldn't this be WidenSize / InEltVT.getSizeInBits()?  Can you exercise
this code path with a testcase?  Isn't NewNumElts wrong in this case?

> +    } else
> +      NewInVT = MVT::getVectorVT(InVT, NewNumElts);

Missing braces { } around this line.

How about a comment here about the invariants that should hold for
NewInVT etc.

> +    if (TLI.isTypeLegal(NewInVT)) {
> +      // Because the result and the input are different vector types, widening
> +      // the result could create a legal type but widening the input might make
> +      // it an illegal type that might lead to repeatedly splitting the input
> +      // and then widening it. To avoid this, we widen the input only if
> +      // it results in a legal type.

Same comment as above: looks like this belongs in the bitconvert operand
legalization logic.

> +  // This should occur very rarely. Lower the bit-convert to a store/load
> +  // from the stack, then widen the load.
> +  SDValue Op = CreateStackStoreLoad(InOp, N->getValueType(0));
> +  return WidenVecRes_LOAD(cast(Op.getNode()));

Sorry, but this will now cause a failure if you run llc with
enable-legalize-types-checking (I tightened up a bunch of
invariants).  For that matter, please add widening support
to DAGTypeLegalizer::PerformExpensiveChecks.

> +  unsigned WidenNumElts = WidenVT.getVectorNumElements();
> +
> +  SmallVector NewOps(N->op_begin(), N->op_end());

How about reserving space for WidenNumElts?

> +SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {

I was too tired to review this.

> +SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {

I don't plan to review this.

> +SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {

I was too tired to review this.

> +SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
> +  MVT WidenVT = TLI.getTypeToTransformTo(N->getValueType(0));
> +  SDValue InOp = GetWidenedVector(N->getOperand(0));
> +  assert(InOp.getValueType() == WidenVT);

Please don't use getTypeToTransformTo, and just get WidenVT as
InOp.getValueType() instead.

> +SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {

I was too tired to review this.

> +    MVT CondEltVT = CondVT.getVectorElementType();
> +    MVT CondWidenVT =  MVT::getVectorVT(CondEltVT, WidenNumElts);
> +    if (getTypeAction(CondVT) == WidenVector)
> +      Cond1 = GetWidenedVector(Cond1);
> +    if (Cond1.getValueType() != CondWidenVT)
> +       Cond1 = WidenToType(Cond1, CondWidenVT);

This second "if" can just be "else".  How about introducing
a utility function which gets a value of the widened type
using either GetWidenedVector or WidenToType?

> +  assert(CondVT.isVector() && "can not widen non vector type");

non vector -> non-vector

> +  assert(CondVT == Cond2.getValueType() && "mismatch lhs/rhs");

mismatch -> mismatched

> +  assert(Cond1.getValueType() == WidenCondVT &&
> +         Cond2.getValueType() == WidenCondVT && "condition not widen");

Why should the conditions widen?  In fact, why should the conditions
be vectors at all?  And if they are, is it valid to just extend them
with undefined values (via widening)?  For example, if the CC was Eq,
then after widening originally equal vectors may no longer be equal.

> +  assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() ==
> WidenVT && +         "operands not widen");

Seems like a pointless assertion.  The fact that the types of these
match the result type should be checked in SelectionDAG.cpp.

> +  // Readjust mask based on new input vector length.

Readjust -> Adjust

> +SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
...
> +  assert(InVT.isVector() && "can not widen non vector type");

How can there be a non-vector type here?

> +  InOp1 = GetWidenedVector(InOp1);

Why should the operands widen?  The result has a different
vector type, and it is the result that you know widens.

> +  // If the result is N, the sub-method updated N in place.
> +  if (Res.getNode() == N) {
> +    // Mark N as new and remark N and its operands.  This allows us to
> correctly +    // revisit N if it needs another step of promotion and
> allows us to visit +    // any new operands to N.
> +    ReanalyzeNode(N);
> +    return true;
> +  }

I changed the way this stuff works.  Please copy the new logic from
one of the similar places.

> +SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
...
> +  SDValue InOp = N->getOperand(0);

If you use the widened vector instead, you avoid the need for the
legalizer to later widen the EXTRACT_VECTOR_ELT nodes you create.

> +SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
...
> +    SDValue InOp = N->getOperand(i);

Likewise it would be more efficient to use the already widened
vectors here.

> +SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {

I was too tired to review this.  However it looks like you have
introduced truncating vector stores (and presumably extending vector
loads).  If so, you should extensively document this.


> +// Vector Widening Utilities

I was too tired to review these.  However at first glance they seem
rather messy, with millions of parameters etc.

> +/// Given a vector input, widens (narrows) it to a vector of WidenVT.  The

what does (narrows) mean?  Should it be: widens or narrows?  If so, please
change the name to something like TakeWidthFromType.  Also, isn't it likely
that a need to narrow represents a bug?

>          SplitVectorResult(N, i);
>          Changed = true;
>          goto NodeDone;
> +      case WidenVector:
> +        WidenVectorResult(N, i);
> +        goto NodeDone;

You forgot to set Changed to true.

> +      case WidenVector:
> +        NeedsRevisit = WidenVectorOperand(N, i);
> +        break;

Likewise.

>    bool IgnoreNodeResults(SDNode *N) const {
> -    return N->getOpcode() == ISD::TargetConstant;
> +    return N->getOpcode() == ISD::TargetConstant ||
> +           IgnoredNodesResultsSet.count(N);

This is a temporary measure until PR2957 is fixed.  Please add a
comment stating this.  Even better, how about fixing PR2957 :)

> +  /// WidenVectors - For vector nodes that need to be widened, this map
> +  /// which widen value to use.

-> For vector nodes that need to be widened, indicates the widened value to use.

> +  SDValue ExpandIntOp_SCALAR_TO_VECTOR(SDNode *N);

Duplicate from your other patch.

> +    assert(WidenedOp.getNode() && "Operand wasn't Widened?");

wasn't Widened -> wasn't widened

Finally, I think you should apply your patch (with cleanups): while there
are further improvements that can be made, at this point I think it is best
to get it into the tree.  Don't forget to add testcases.  Can you get complete
coverage?

Ciao,

Duncan.


From isanbard at gmail.com  Sun Dec 14 18:27:40 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 15 Dec 2008 00:27:40 -0000
Subject: [llvm-commits] [llvm] r61017 - /llvm/tags/Apple/llvmCore-2089/
Message-ID: <200812150027.mBF0RepR013285@zion.cs.uiuc.edu>

Author: void
Date: Sun Dec 14 18:27:39 2008
New Revision: 61017

URL: http://llvm.org/viewvc/llvm-project?rev=61017&view=rev
Log:
Creating llvmCore-2089 branch

Added:
    llvm/tags/Apple/llvmCore-2089/
      - copied from r61016, llvm/trunk/



From isanbard at gmail.com  Sun Dec 14 18:27:49 2008
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 15 Dec 2008 00:27:49 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r61018 -
	/llvm-gcc-4.2/tags/Apple/llvmgcc42-2089/
Message-ID: <200812150027.mBF0RnXV013304@zion.cs.uiuc.edu>

Author: void
Date: Sun Dec 14 18:27:49 2008
New Revision: 61018

URL: http://llvm.org/viewvc/llvm-project?rev=61018&view=rev
Log:
Creating llvmgcc42-2089 branch

Added:
    llvm-gcc-4.2/tags/Apple/llvmgcc42-2089/
      - copied from r61017, llvm-gcc-4.2/trunk/



From nicholas at mxc.ca  Sun Dec 14 19:34:59 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Mon, 15 Dec 2008 01:34:59 -0000
Subject: [llvm-commits] [llvm] r61019 - in /llvm/trunk:
 docs/AliasAnalysis.html docs/LangRef.html include/llvm/Attributes.h
 lib/AsmParser/LLLexer.cpp lib/AsmParser/llvmAsmParser.y
 lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Writer/BitcodeWriter.cpp
 lib/VMCore/Attributes.cpp
Message-ID: <200812150134.mBF1YxKZ015699@zion.cs.uiuc.edu>

Author: nicholas
Date: Sun Dec 14 19:34:58 2008
New Revision: 61019

URL: http://llvm.org/viewvc/llvm-project?rev=61019&view=rev
Log:
Introducing nocapture, a parameter attribute for pointers to indicate that the
callee will not introduce any new aliases of that pointer.

The attributes had all bits allocated already, so I decided to collapse
alignment. Alignment was previously stored as a 16-bit integer from bits 16 to
32 of the attribute, but it was required to be a power of 2. Now it's stored in
log2 encoded form in five bits from 16 to 21. That gives us 11 more bits of
space.

You may have already noticed that you only need four bits to encode a 16-bit
power of two, so why five bits? Because the AsmParser accepted 32-bit
alignments, even though we couldn't store them (they were silently discarded).
Now we can store them in memory, but not in the bitcode.

The bitcode format was already storing these as 64-bit VBR integers. So, the
bitcode format stays the same, keeping the alignment values stored as 16 bit
raw values. There's some hideous code in the reader and writer that deals with
this, waiting to be ripped out the moment we run out of bits again and have to
replace the parameter attributes table encoding.


Modified:
    llvm/trunk/docs/AliasAnalysis.html
    llvm/trunk/docs/LangRef.html
    llvm/trunk/include/llvm/Attributes.h
    llvm/trunk/lib/AsmParser/LLLexer.cpp
    llvm/trunk/lib/AsmParser/llvmAsmParser.y
    llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp
    llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
    llvm/trunk/lib/VMCore/Attributes.cpp

Modified: llvm/trunk/docs/AliasAnalysis.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/AliasAnalysis.html?rev=61019&r1=61018&r2=61019&view=diff

==============================================================================
--- llvm/trunk/docs/AliasAnalysis.html (original)
+++ llvm/trunk/docs/AliasAnalysis.html Sun Dec 14 19:34:58 2008
@@ -192,11 +192,11 @@
 
 
 The NoAlias response is used when the two pointers refer to distinct objects,
-even regardless of whether the pointers compare equal.  For example, freed
-pointers don't alias any pointers that were allocated afterwards.  As a
-degenerate case, pointers returned by malloc(0) have no bytes for an object,
-and are considered NoAlias even when malloc returns the same pointer.  The same
-rule applies to NULL pointers.
+regardless of whether the pointers compare equal.  For example, freed pointers
+don't alias any pointers that were allocated afterwards.  As a degenerate case,
+pointers returned by malloc(0) have no bytes for an object, and are considered
+NoAlias even when malloc returns the same pointer.  The same rule applies to
+NULL pointers.
 
 The MayAlias response is used whenever the two pointers might refer to the
 same object.  If the two memory objects overlap, but do not start at the same

Modified: llvm/trunk/docs/LangRef.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=61019&r1=61018&r2=61019&view=diff

==============================================================================
--- llvm/trunk/docs/LangRef.html (original)
+++ llvm/trunk/docs/LangRef.html Sun Dec 14 19:34:58 2008
@@ -894,9 +894,15 @@
     parameter.  The caller is responsible for ensuring that this is the
     case. On a function return value, noalias additionally indicates
     that the pointer does not alias any other pointers visible to the
-    caller. Note that this applies only to pointers that can be used to actually
-    load/store a value: NULL, unique pointers from malloc(0), and freed pointers
-    are considered to not alias anything.
+    caller. For further details, please see the discussion of the NoAlias
+    response in
+    alias
+    analysis.
+
+    
nocapture
+    This indicates that the callee does not make any copies of the pointer
+    that outlive the callee itself. This is not a valid attribute for return
+    values.
 
     nest
     This indicates that the pointer parameter can be excised using the

Modified: llvm/trunk/include/llvm/Attributes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Attributes.h?rev=61019&r1=61018&r2=61019&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Attributes.h (original)
+++ llvm/trunk/include/llvm/Attributes.h Sun Dec 14 19:34:58 2008
@@ -15,6 +15,7 @@
 #ifndef LLVM_ATTRIBUTES_H
 #define LLVM_ATTRIBUTES_H
 
+#include "llvm/Support/MathExtras.h"
 #include 
 #include 
 
@@ -23,7 +24,7 @@
 
 /// Attributes - A bitset of attributes.
 typedef unsigned Attributes;
-  
+
 namespace Attribute {
 
 /// Function parameters and results can have attributes to indicate how they 
@@ -44,16 +45,17 @@
 const Attributes Nest      = 1<<8;  ///< Nested function static chain
 const Attributes ReadNone  = 1<<9;  ///< Function does not access memory
 const Attributes ReadOnly  = 1<<10; ///< Function only reads from memory
-const Attributes NoInline        = 1<<11; // inline=never 
-const Attributes AlwaysInline    = 1<<12; // inline=always
-const Attributes OptimizeForSize = 1<<13; // opt_size
-const Attributes StackProtect    = 1<<14; // Stack protection.
-const Attributes StackProtectReq = 1<<15; // Stack protection required.
-const Attributes Alignment = 0xffff<<16; ///< Alignment of parameter (16 bits)
-                                    // 0 = unknown, else in clear (not log)
-                                    
+const Attributes NoInline        = 1<<11; ///< inline=never 
+const Attributes AlwaysInline    = 1<<12; ///< inline=always
+const Attributes OptimizeForSize = 1<<13; ///< opt_size
+const Attributes StackProtect    = 1<<14; ///< Stack protection.
+const Attributes StackProtectReq = 1<<15; ///< Stack protection required.
+const Attributes Alignment = 31<<16; ///< Alignment of parameter (5 bits)
+                                     // stored as log2 of alignment.
+const Attributes NoCapture = 1<<21; ///< Function creates no aliases of pointer
+
 /// @brief Attributes that only apply to function parameters.
-const Attributes ParameterOnly = ByVal | Nest | StructRet;
+const Attributes ParameterOnly = ByVal | Nest | StructRet | NoCapture;
 
 /// @brief Attributes that only apply to function.
 const Attributes FunctionOnly = NoReturn | NoUnwind | ReadNone | ReadOnly | 
@@ -64,7 +66,7 @@
 
 /// @brief Attributes that are mutually incompatible.
 const Attributes MutuallyIncompatible[4] = {
-  ByVal | InReg | Nest  | StructRet,
+  ByVal | InReg | Nest | StructRet,
   ZExt  | SExt,
   ReadNone | ReadOnly,
   NoInline | AlwaysInline
@@ -76,7 +78,8 @@
 /// This turns an int alignment (a power of 2, normally) into the
 /// form used internally in Attributes.
 inline Attributes constructAlignmentFromInt(unsigned i) {
-  return (i << 16);
+  assert(isPowerOf2_32(i) && "Alignment must be a power of two.");
+  return Log2_32(i) << 16;
 }
 
 /// The set of Attributes set in Attributes is converted to a

Modified: llvm/trunk/lib/AsmParser/LLLexer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLLexer.cpp?rev=61019&r1=61018&r2=61019&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/LLLexer.cpp (original)
+++ llvm/trunk/lib/AsmParser/LLLexer.cpp Sun Dec 14 19:34:58 2008
@@ -491,6 +491,7 @@
   KEYWORD("nounwind", NOUNWIND);
   KEYWORD("noreturn", NORETURN);
   KEYWORD("noalias", NOALIAS);
+  KEYWORD("nocapture", NOCAPTURE);
   KEYWORD("byval", BYVAL);
   KEYWORD("nest", NEST);
   KEYWORD("readnone", READNONE);

Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y?rev=61019&r1=61018&r2=61019&view=diff

==============================================================================
--- llvm/trunk/lib/AsmParser/llvmAsmParser.y (original)
+++ llvm/trunk/lib/AsmParser/llvmAsmParser.y Sun Dec 14 19:34:58 2008
@@ -1136,8 +1136,8 @@
 %token  EXTRACTVALUE INSERTVALUE
 
 // Function Attributes
-%token SIGNEXT ZEROEXT NORETURN INREG SRET NOUNWIND NOALIAS BYVAL NEST
-%token READNONE READONLY GC OPTSIZE NOINLINE ALWAYSINLINE SSP SSPREQ
+%token SIGNEXT ZEROEXT NORETURN INREG SRET NOUNWIND NOALIAS NOCAPTURE BYVAL
+%token READNONE READONLY GC OPTSIZE NOINLINE ALWAYSINLINE SSP SSPREQ NEST
 
 // Visibility Styles
 %token DEFAULT HIDDEN PROTECTED
@@ -1265,15 +1265,16 @@
                   CHECK_FOR_ERROR
                  };
 
-Attribute     : ZEROEXT { $$ = Attribute::ZExt;      }
-              | ZEXT    { $$ = Attribute::ZExt;      }
-              | SIGNEXT { $$ = Attribute::SExt;      }
-              | SEXT    { $$ = Attribute::SExt;      }
-              | INREG   { $$ = Attribute::InReg;     }
-              | SRET    { $$ = Attribute::StructRet; }
-              | NOALIAS { $$ = Attribute::NoAlias;   }
-              | BYVAL   { $$ = Attribute::ByVal;     }
-              | NEST    { $$ = Attribute::Nest;      }
+Attribute     : ZEROEXT   { $$ = Attribute::ZExt;      }
+              | ZEXT      { $$ = Attribute::ZExt;      }
+              | SIGNEXT   { $$ = Attribute::SExt;      }
+              | SEXT      { $$ = Attribute::SExt;      }
+              | INREG     { $$ = Attribute::InReg;     }
+              | SRET      { $$ = Attribute::StructRet; }
+              | NOALIAS   { $$ = Attribute::NoAlias;   }
+              | NOCAPTURE { $$ = Attribute::NoCapture; }
+              | BYVAL     { $$ = Attribute::ByVal;     }
+              | NEST      { $$ = Attribute::Nest;      }
               | ALIGN EUINT64VAL { $$ =
                           Attribute::constructAlignmentFromInt($2);    }
               ;

Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=61019&r1=61018&r2=61019&view=diff

==============================================================================
--- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original)
+++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Sun Dec 14 19:34:58 2008
@@ -362,6 +362,20 @@
       Attributes RetAttribute = Attribute::None;
       Attributes FnAttribute = Attribute::None;
       for (unsigned i = 0, e = Record.size(); i != e; i += 2) {
+        // FIXME: remove in LLVM 3.0
+        // The alignment is stored as a 16-bit raw value from bits 31--16.
+        // We shift the bits above 31 down by 11 bits.
+
+        unsigned Alignment = (Record[i+1] & (0xffffull << 16)) >> 16;
+        if (Alignment && !isPowerOf2_32(Alignment))
+          return Error("Alignment is not a power of two.");
+
+        Attributes ReconstitutedAttr = Record[i+1] & 0xffff;
+        if (Alignment)
+          ReconstitutedAttr |= Attribute::constructAlignmentFromInt(Alignment);
+        ReconstitutedAttr |= (Record[i+1] & (0xffffull << 32)) >> 11;
+        Record[i+1] = ReconstitutedAttr;
+
         if (Record[i] == 0)
           RetAttribute = Record[i+1];
         else if (Record[i] == ~0U)

Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=61019&r1=61018&r2=61019&view=diff

==============================================================================
--- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original)
+++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Sun Dec 14 19:34:58 2008
@@ -122,7 +122,16 @@
     for (unsigned i = 0, e = A.getNumSlots(); i != e; ++i) {
       const AttributeWithIndex &PAWI = A.getSlot(i);
       Record.push_back(PAWI.Index);
-      Record.push_back(PAWI.Attrs);
+
+      // FIXME: remove in LLVM 3.0
+      // Store the alignment in the bitcode as a 16-bit raw value instead of a
+      // 5-bit log2 encoded value. Shift the bits above the alignment up by
+      // 11 bits.
+      uint64_t FauxAttr = PAWI.Attrs & 0xffff;
+      FauxAttr |= (1ull<<16)<<((PAWI.Attrs & Attribute::Alignment) >> 16);
+      FauxAttr |= (PAWI.Attrs & (0x3FFull << 21)) << 11;
+
+      Record.push_back(FauxAttr);
     }
     
     Stream.EmitRecord(bitc::PARAMATTR_CODE_ENTRY, Record);

Modified: llvm/trunk/lib/VMCore/Attributes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Attributes.cpp?rev=61019&r1=61018&r2=61019&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/Attributes.cpp (original)
+++ llvm/trunk/lib/VMCore/Attributes.cpp Sun Dec 14 19:34:58 2008
@@ -37,6 +37,8 @@
     Result += "inreg ";
   if (Attrs & Attribute::NoAlias)
     Result += "noalias ";
+  if (Attrs & Attribute::NoCapture)
+    Result += "nocapture ";
   if (Attrs & Attribute::StructRet)
     Result += "sret ";  
   if (Attrs & Attribute::ByVal)
@@ -59,10 +61,11 @@
     Result += "sspreq ";
   if (Attrs & Attribute::Alignment) {
     Result += "align ";
-    Result += utostr((Attrs & Attribute::Alignment) >> 16);
+    Result += utostr(1ull << ((Attrs & Attribute::Alignment)>>16));
     Result += " ";
   }
   // Trim the trailing space.
+  assert(!Result.empty() && "Unknown attribute!");
   Result.erase(Result.end()-1);
   return Result;
 }
@@ -76,7 +79,7 @@
   
   if (!isa(Ty))
     // Attributes that only apply to pointers.
-    Incompatible |= ByVal | Nest | NoAlias | StructRet;
+    Incompatible |= ByVal | Nest | NoAlias | StructRet | NoCapture;
   
   return Incompatible;
 }




From nicholas at mxc.ca  Sun Dec 14 19:35:36 2008
From: nicholas at mxc.ca (Nick Lewycky)
Date: Mon, 15 Dec 2008 01:35:36 -0000
Subject: [llvm-commits] [llvm] r61020 -
	/llvm/trunk/lib/Analysis/ConstantFolding.cpp
Message-ID: <200812150135.mBF1ZaKC015727@zion.cs.uiuc.edu>

Author: nicholas
Date: Sun Dec 14 19:35:36 2008
New Revision: 61020

URL: http://llvm.org/viewvc/llvm-project?rev=61020&view=rev
Log:
Fix whitespace in comment.
Remove TODO; icmp isn't a binary operator, so this function will never deal
with them.

Modified:
    llvm/trunk/lib/Analysis/ConstantFolding.cpp

Modified: llvm/trunk/lib/Analysis/ConstantFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ConstantFolding.cpp?rev=61020&r1=61019&r2=61020&view=diff

==============================================================================
--- llvm/trunk/lib/Analysis/ConstantFolding.cpp (original)
+++ llvm/trunk/lib/Analysis/ConstantFolding.cpp Sun Dec 14 19:35:36 2008
@@ -87,7 +87,7 @@
 
 
 /// SymbolicallyEvaluateBinop - One of Op0/Op1 is a constant expression.
-/// Attempt to symbolically evaluate the result of  a binary operator merging
+/// Attempt to symbolically evaluate the result of a binary operator merging
 /// these together.  If target data info is available, it is provided as TD, 
 /// otherwise TD is null.
 static Constant *SymbolicallyEvaluateBinop(unsigned Opc, Constant *Op0,
@@ -113,7 +113,6 @@
       }
   }
     
-  // TODO: Fold icmp setne/seteq as well.
   return 0;
 }
 




From resistor at mac.com  Sun Dec 14 20:03:00 2008
From: resistor at mac.com (Owen Anderson)
Date: Mon, 15 Dec 2008 02:03:00 -0000
Subject: [llvm-commits] [llvm] r61021 -
	/llvm/trunk/lib/Transforms/Scalar/GVN.cpp
Message-ID: <200812150203.mBF230Nj016611@zion.cs.uiuc.edu>

Author: resistor
Date: Sun Dec 14 20:03:00 2008
New Revision: 61021

URL: http://llvm.org/viewvc/llvm-project?rev=61021&view=rev
Log:
Add support for slow-path GVN with full phi construction for scalars.  This is disabled for now, as it actually pessimizes code in the abscence
of phi translation for load elimination.  This slow down GVN a bit, by about 2% on 403.gcc.

Modified:
    llvm/trunk/lib/Transforms/Scalar/GVN.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=61021&r1=61020&r2=61021&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Sun Dec 14 20:03:00 2008
@@ -25,6 +25,7 @@
 #include "llvm/Value.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/DepthFirstIterator.h"
+#include "llvm/ADT/PostOrderIterator.h"
 #include "llvm/ADT/SmallPtrSet.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
@@ -727,7 +728,7 @@
                             SmallVectorImpl &toErase);
     bool processNonLocalLoad(LoadInst* L,
                              SmallVectorImpl &toErase);
-    bool processBlock(DomTreeNode* DTN);
+    bool processBlock(BasicBlock* BB);
     Value *GetValueForBlock(BasicBlock *BB, Instruction* orig,
                             DenseMap &Phis,
                             bool top_level = false);
@@ -738,6 +739,7 @@
     bool performPRE(Function& F);
     Value* lookupNumber(BasicBlock* BB, uint32_t num);
     bool mergeBlockIntoPredecessor(BasicBlock* BB);
+    Value* AttemptRedundancyElimination(Instruction* orig, unsigned valno);
     void cleanupGlobalSets();
   };
   
@@ -1222,6 +1224,60 @@
   return 0;
 }
 
+/// AttemptRedundancyElimination - If the "fast path" of redundancy elimination
+/// by inheritance from the dominator fails, see if we can perform phi 
+/// construction to eliminate the redundancy.
+Value* GVN::AttemptRedundancyElimination(Instruction* orig, unsigned valno) {
+  BasicBlock* BaseBlock = orig->getParent();
+  
+  SmallPtrSet Visited;
+  SmallVector Stack;
+  Stack.push_back(BaseBlock);
+  
+  DenseMap Results;
+  
+  // Walk backwards through our predecessors, looking for instances of the
+  // value number we're looking for.  Instances are recorded in the Results
+  // map, which is then used to perform phi construction.
+  while (!Stack.empty()) {
+    BasicBlock* Current = Stack.back();
+    Stack.pop_back();
+    
+    // If we've walked all the way to a proper dominator, then give up. Cases
+    // where the instance is in the dominator will have been caught by the fast
+    // path, and any cases that require phi construction further than this are
+    // probably not worth it anyways.  Note that this is a SIGNIFICANT compile
+    // time improvement.
+    if (DT->properlyDominates(Current, orig->getParent())) return 0;
+    
+    DenseMap::iterator LA =
+                                                       localAvail.find(Current);
+    if (LA == localAvail.end()) return 0;
+    DenseMap::iterator V = LA->second->table.find(valno);
+    
+    if (V != LA->second->table.end()) {
+      // Found an instance, record it.
+      Results.insert(std::make_pair(Current, V->second));
+      continue;
+    }
+    
+    // If we reach the beginning of the function, then give up.
+    if (pred_begin(Current) == pred_end(Current))
+      return 0;
+    
+    for (pred_iterator PI = pred_begin(Current), PE = pred_end(Current);
+         PI != PE; ++PI)
+      if (Visited.insert(*PI))
+        Stack.push_back(*PI);
+  }
+  
+  // If we didn't find instances, give up.  Otherwise, perform phi construction.
+  if (Results.size() == 0)
+    return 0;
+  else
+    return GetValueForBlock(BaseBlock, orig, Results, true);
+}
+
 /// processInstruction - When calculating availability, handle an instruction
 /// by inserting it into the appropriate sets
 bool GVN::processInstruction(Instruction *I,
@@ -1270,7 +1326,8 @@
   } else if (num == nextNum) {
     localAvail[I->getParent()]->table.insert(std::make_pair(num, I));
     
-  // Perform value-number based elimination
+  // Perform fast-path value-number based elimination of values inherited from
+  // dominators.
   } else if (Value* repl = lookupNumber(I->getParent(), num)) {
     // Remove it!
     VN.erase(I);
@@ -1279,6 +1336,18 @@
       MD->invalidateCachedPointerInfo(repl);
     toErase.push_back(I);
     return true;
+
+#if 0
+  // Perform slow-pathvalue-number based elimination with phi construction.
+  } else if (Value* repl = AttemptRedundancyElimination(I, num)) {
+    // Remove it!
+    VN.erase(I);
+    I->replaceAllUsesWith(repl);
+    if (isa(repl->getType()))
+      MD->invalidateCachedPointerInfo(repl);
+    toErase.push_back(I);
+    return true;
+#endif
   } else {
     localAvail[I->getParent()]->table.insert(std::make_pair(num, I));
   }
@@ -1337,8 +1406,8 @@
 }
 
 
-bool GVN::processBlock(DomTreeNode* DTN) {
-  BasicBlock* BB = DTN->getBlock();
+bool GVN::processBlock(BasicBlock* BB) {
+  DomTreeNode* DTN = DT->getNode(BB);
   // FIXME: Kill off toErase by doing erasing eagerly in a helper function (and
   // incrementing BI before processing an instruction).
   SmallVector toErase;
@@ -1538,9 +1607,10 @@
 
   // Top-down walk of the dominator tree
   bool changed = false;
-  for (df_iterator DI = df_begin(DT->getRootNode()),
-       DE = df_end(DT->getRootNode()); DI != DE; ++DI)
-    changed |= processBlock(*DI);
+  ReversePostOrderTraversal RPOT(&F);
+  for (ReversePostOrderTraversal::rpo_iterator RI = RPOT.begin(),
+       RE = RPOT.end(); RI != RE; ++RI)
+    changed |= processBlock(*RI);
   
   return changed;
 }




From sabre at nondot.org  Sun Dec 14 21:35:32 2008
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 15 Dec 2008 03:35:32 -0000
Subject: [llvm-commits] [llvm] r61022 - in /llvm/trunk:
 include/llvm/Analysis/MemoryDependenceAnalysis.h
 lib/Analysis/MemoryDependenceAnalysis.cpp
 test/Transforms/GVN/rle-must-alias.ll
 test/Transforms/GVN/rle-no-phi-translate.ll
 test/Transforms/GVN/rle-phi-translate.ll
Message-ID: <200812150335.mBF3ZWqq019687@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Dec 14 21:35:32 2008
New Revision: 61022

URL: http://llvm.org/viewvc/llvm-project?rev=61022&view=rev
Log:
Implement initial support for PHI translation in memdep.  This means that
memdep keeps track of how PHIs affect the pointer in dep queries, which 
allows it to eliminate the load in cases like rle-phi-translate.ll, which
basically end up being:

BB1:
   X = load P
   br BB3
BB2:
   Y = load Q
   br BB3
BB3:
   R = phi [P] [Q]
   load R

turning "load R" into a phi of X/Y.  In addition to additional exposed
opportunities, this makes memdep safe in many cases that it wasn't before
(which is required for load PRE) and also makes it substantially more 
efficient.  For example, consider:


bb1:  // has many predecessors.
   P = some_operator()
   load P

In this example, previously memdep would scan all the predecessors of BB1
to see if they had something that would mustalias P.  In some cases (e.g.
test/Transforms/GVN/rle-must-alias.ll) it would actually find them and end
up eliminating something.  In many other cases though, it would scan and not
find anything useful.  MemDep now stops at a block if the pointer is defined
in that block and cannot be phi translated to predecessors.  This causes it
to miss the (rare) cases like rle-must-alias.ll, but makes it faster by not
scanning tons of stuff that is unlikely to be useful.  For example, this
speeds up GVN as a whole from 3.928s to 2.448s (60%)!.  IMO, scalar GVN 
should be enhanced to simplify the rle-must-alias pointer base anyway, which
would allow the loads to be eliminated.

In the future, this should be enhanced to phi translate through geps and 
bitcasts as well (as indicated by FIXMEs) making memdep even more powerful.


Added:
    llvm/trunk/test/Transforms/GVN/rle-phi-translate.ll
Modified:
    llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h
    llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
    llvm/trunk/test/Transforms/GVN/rle-must-alias.ll
    llvm/trunk/test/Transforms/GVN/rle-no-phi-translate.ll

Modified: llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h?rev=61022&r1=61021&r2=61022&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h (original)
+++ llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h Sun Dec 14 21:35:32 2008
@@ -156,12 +156,18 @@
     /// ValueIsLoadPair - This is a pair where the bool is true if
     /// the dependence is a read only dependence, false if read/write.
     typedef PointerIntPair ValueIsLoadPair;
-    
+
+    /// BBSkipFirstBlockPair - This pair is used when caching information for a
+    /// block.  If the pointer is null, the cache value is not a full query that
+    /// starts at the specified block.  If non-null, the bool indicates whether
+    /// or not the contents of the block was skipped.
+    typedef PointerIntPair BBSkipFirstBlockPair;
+
     /// CachedNonLocalPointerInfo - This map stores the cached results of doing
     /// a pointer lookup at the bottom of a block.  The key of this map is the
     /// pointer+isload bit, the value is a list of result> mappings.
-    typedef DenseMap > CachedNonLocalPointerInfo;
+    typedef DenseMap > CachedNonLocalPointerInfo;
     CachedNonLocalPointerInfo NonLocalPointerDeps;
 
     // A map from instructions to their non-local pointer dependencies.
@@ -259,10 +265,11 @@
     MemDepResult getCallSiteDependencyFrom(CallSite C, bool isReadOnlyCall,
                                            BasicBlock::iterator ScanIt,
                                            BasicBlock *BB);
-    void getNonLocalPointerDepFromBB(Value *Pointer, uint64_t Size,
+    bool getNonLocalPointerDepFromBB(Value *Pointer, uint64_t Size,
                                      bool isLoad, BasicBlock *BB,
                                      SmallVectorImpl &Result,
-                                     SmallPtrSet &Visited);
+                                     DenseMap &Visited,
+                                     bool SkipFirstBlock = false);
     MemDepResult GetNonLocalInfoForBlock(Value *Pointer, uint64_t PointeeSize,
                                          bool isLoad, BasicBlock *BB,
                                          NonLocalDepInfo *Cache,

Modified: llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp?rev=61022&r1=61021&r2=61022&view=diff

==============================================================================
--- llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp Sun Dec 14 21:35:32 2008
@@ -382,8 +382,7 @@
   
   // isReadonlyCall - If this is a read-only call, we can be more aggressive.
   bool isReadonlyCall = AA->onlyReadsMemory(QueryCS);
-  
-  // Visited checked first, vector in sorted order.
+
   SmallPtrSet Visited;
   
   unsigned NumSortedEntries = Cache.size();
@@ -487,10 +486,16 @@
   const Type *EltTy = cast(Pointer->getType())->getElementType();
   uint64_t PointeeSize = TD->getTypeStoreSize(EltTy);
   
-  // While we have blocks to analyze, get their values.
-  SmallPtrSet Visited;
-  getNonLocalPointerDepFromBB(Pointer, PointeeSize, isLoad, FromBB,
-                              Result, Visited);
+  // This is the set of blocks we've inspected, and the pointer we consider in
+  // each block.  Because of critical edges, we currently bail out if querying
+  // a block with multiple different pointers.  This can happen during PHI
+  // translation.
+  DenseMap Visited;
+  if (!getNonLocalPointerDepFromBB(Pointer, PointeeSize, isLoad, FromBB,
+                                   Result, Visited, true))
+    return;
+  Result.push_back(std::make_pair(FromBB,
+                                  MemDepResult::getClobber(FromBB->begin())));
 }
 
 /// GetNonLocalInfoForBlock - Compute the memdep value for BB with
@@ -566,35 +571,51 @@
 }
 
 
-/// getNonLocalPointerDepFromBB - 
-void MemoryDependenceAnalysis::
+/// getNonLocalPointerDepFromBB - Perform a dependency query based on
+/// pointer/pointeesize starting at the end of StartBB.  Add any clobber/def
+/// results to the results vector and keep track of which blocks are visited in
+/// 'Visited'.
+///
+/// This has special behavior for the first block queries (when SkipFirstBlock
+/// is true).  In this special case, it ignores the contents of the specified
+/// block and starts returning dependence info for its predecessors.
+///
+/// This function returns false on success, or true to indicate that it could
+/// not compute dependence information for some reason.  This should be treated
+/// as a clobber dependence on the first instruction in the predecessor block.
+bool MemoryDependenceAnalysis::
 getNonLocalPointerDepFromBB(Value *Pointer, uint64_t PointeeSize,
                             bool isLoad, BasicBlock *StartBB,
                             SmallVectorImpl &Result,
-                            SmallPtrSet &Visited) {
+                            DenseMap &Visited,
+                            bool SkipFirstBlock) {
+  
   // Look up the cached info for Pointer.
   ValueIsLoadPair CacheKey(Pointer, isLoad);
   
-  std::pair &CacheInfo =
-    NonLocalPointerDeps[CacheKey];
-  NonLocalDepInfo *Cache = &CacheInfo.second;
+  std::pair *CacheInfo =
+    &NonLocalPointerDeps[CacheKey];
+  NonLocalDepInfo *Cache = &CacheInfo->second;
 
   // If we have valid cached information for exactly the block we are
   // investigating, just return it with no recomputation.
-  if (CacheInfo.first == StartBB) {
+  if (CacheInfo->first == BBSkipFirstBlockPair(StartBB, SkipFirstBlock)) {
     for (NonLocalDepInfo::iterator I = Cache->begin(), E = Cache->end();
          I != E; ++I)
       if (!I->second.isNonLocal())
         Result.push_back(*I);
     ++NumCacheCompleteNonLocalPtr;
-    return;
+    return false;
   }
   
   // Otherwise, either this is a new block, a block with an invalid cache
   // pointer or one that we're about to invalidate by putting more info into it
   // than its valid cache info.  If empty, the result will be valid cache info,
   // otherwise it isn't.
-  CacheInfo.first = Cache->empty() ? StartBB : 0;
+  if (Cache->empty())
+    CacheInfo->first = BBSkipFirstBlockPair(StartBB, SkipFirstBlock);
+  else
+    CacheInfo->first = BBSkipFirstBlockPair();
   
   SmallVector Worklist;
   Worklist.push_back(StartBB);
@@ -606,23 +627,14 @@
   // revisit blocks after we insert info for them.
   unsigned NumSortedEntries = Cache->size();
   
-  // SkipFirstBlock - If this is the very first block that we're processing, we
-  // don't want to scan or think about its body, because the client was supposed
-  // to do a local dependence query.  Instead, just start processing it by
-  // adding its predecessors to the worklist and iterating.
-  bool SkipFirstBlock = Visited.empty();
-  
   while (!Worklist.empty()) {
     BasicBlock *BB = Worklist.pop_back_val();
     
     // Skip the first block if we have it.
-    if (SkipFirstBlock) {
-      SkipFirstBlock = false;
-    } else {
+    if (!SkipFirstBlock) {
       // Analyze the dependency of *Pointer in FromBB.  See if we already have
       // been here.
-      if (!Visited.insert(BB))
-        continue;
+      assert(Visited.count(BB) && "Should check 'visited' before adding to WL");
 
       // Get the dependency info for Pointer in BB.  If we have cached
       // information, we will use it, otherwise we compute it.
@@ -636,11 +648,123 @@
       }
     }
     
-    // Otherwise, we have to process all the predecessors of this block to scan
-    // them as well.
-    for (BasicBlock **PI = PredCache->GetPreds(BB); *PI; ++PI) {
-      // TODO: PHI TRANSLATE.
-      Worklist.push_back(*PI);
+    // If 'Pointer' is an instruction defined in this block, then we need to do
+    // phi translation to change it into a value live in the predecessor block.
+    // If phi translation fails, then we can't continue dependence analysis.
+    Instruction *PtrInst = dyn_cast(Pointer);
+    bool NeedsPHITranslation = PtrInst && PtrInst->getParent() == BB;
+    
+    // If no PHI translation is needed, just add all the predecessors of this
+    // block to scan them as well.
+    if (!NeedsPHITranslation) {
+      SkipFirstBlock = false;
+      for (BasicBlock **PI = PredCache->GetPreds(BB); *PI; ++PI) {
+        // Verify that we haven't looked at this block yet.
+        std::pair::iterator, bool>
+          InsertRes = Visited.insert(std::make_pair(*PI, Pointer));
+        if (InsertRes.second) {
+          // First time we've looked at *PI.
+          Worklist.push_back(*PI);
+          continue;
+        }
+        
+        // If we have seen this block before, but it was with a different
+        // pointer then we have a phi translation failure and we have to treat
+        // this as a clobber.
+        if (InsertRes.first->second != Pointer)
+          goto PredTranslationFailure;
+      }
+      continue;
+    }
+    
+    // If we do need to do phi translation, then there are a bunch of different
+    // cases, because we have to find a Value* live in the predecessor block. We
+    // know that PtrInst is defined in this block at least.
+    
+    // If this is directly a PHI node, just use the incoming values for each
+    // pred as the phi translated version.
+    if (PHINode *PtrPHI = dyn_cast(PtrInst)) {
+      for (BasicBlock **PI = PredCache->GetPreds(BB); *PI; ++PI){
+        BasicBlock *Pred = *PI;
+        Value *PredPtr = PtrPHI->getIncomingValueForBlock(Pred);
+        
+        // Check to see if we have already visited this pred block with another
+        // pointer.  If so, we can't do this lookup.  This failure can occur
+        // with PHI translation when a critical edge exists and the PHI node in
+        // the successor translates to a pointer value different than the
+        // pointer the block was first analyzed with.
+        std::pair::iterator, bool>
+          InsertRes = Visited.insert(std::make_pair(Pred, PredPtr));
+
+        if (!InsertRes.second) {
+          // If the predecessor was visited with PredPtr, then we already did
+          // the analysis and can ignore it.
+          if (InsertRes.first->second == PredPtr)
+            continue;
+          
+          // Otherwise, the block was previously analyzed with a different
+          // pointer.  We can't represent the result of this case, so we just
+          // treat this as a phi translation failure.
+          goto PredTranslationFailure;
+        }
+        
+        // If we have a problem phi translating, fall through to the code below
+        // to handle the failure condition.
+        if (getNonLocalPointerDepFromBB(PredPtr, PointeeSize, isLoad, Pred,
+                                        Result, Visited))
+          goto PredTranslationFailure;
+      }
+      
+      // Refresh the CacheInfo/Cache pointer so that it isn't invalidated.
+      CacheInfo = &NonLocalPointerDeps[CacheKey];
+      Cache = &CacheInfo->second;
+      
+      // Since we did phi translation, the "Cache" set won't contain all of the
+      // results for the query.  This is ok (we can still use it to accelerate
+      // specific block queries) but we can't do the fastpath "return all
+      // results from the set"  Clear out the indicator for this.
+      CacheInfo->first = BBSkipFirstBlockPair();
+      SkipFirstBlock = false;
+      continue;
+    }
+    
+    // TODO: BITCAST, GEP.
+    
+    //   cerr << "MEMDEP: Could not PHI translate: " << *Pointer;
+    //   if (isa(PtrInst) || isa(PtrInst))
+    //     cerr << "OP:\t\t\t\t" << *PtrInst->getOperand(0);
+  PredTranslationFailure:
+    
+    // Refresh the CacheInfo/Cache pointer so that it isn't invalidated.
+    CacheInfo = &NonLocalPointerDeps[CacheKey];
+    Cache = &CacheInfo->second;
+    
+    // Since we did phi translation, the "Cache" set won't contain all of the
+    // results for the query.  This is ok (we can still use it to accelerate
+    // specific block queries) but we can't do the fastpath "return all
+    // results from the set"  Clear out the indicator for this.
+    CacheInfo->first = BBSkipFirstBlockPair();
+    
+    // If *nothing* works, mark the pointer as being clobbered by the first
+    // instruction in this block.
+    //
+    // If this is the magic first block, return this as a clobber of the whole
+    // incoming value.  Since we can't phi translate to one of the predecessors,
+    // we have to bail out.
+    if (SkipFirstBlock)
+      return true;
+    
+    for (NonLocalDepInfo::reverse_iterator I = Cache->rbegin(); ; ++I) {
+      assert(I != Cache->rend() && "Didn't find current block??");
+      if (I->first != BB)
+        continue;
+      
+      assert(I->second.isNonLocal() &&
+             "Should only be here with transparent block");
+      I->second = MemDepResult::getClobber(BB->begin());
+      ReverseNonLocalPtrDeps[BB->begin()].insert(CacheKey.getOpaqueValue());
+      Result.push_back(*I);
+      break;
     }
   }
   
@@ -658,19 +782,22 @@
     Cache->insert(Entry, Val);
     // FALL THROUGH.
   }
-  case 1: {
+  case 1:
     // One new entry, Just insert the new value at the appropriate position.
-    NonLocalDepEntry Val = Cache->back();
-    Cache->pop_back();
-    NonLocalDepInfo::iterator Entry =
-      std::upper_bound(Cache->begin(), Cache->end(), Val);
-    Cache->insert(Entry, Val);
+    if (Cache->size() != 1) {
+      NonLocalDepEntry Val = Cache->back();
+      Cache->pop_back();
+      NonLocalDepInfo::iterator Entry =
+        std::upper_bound(Cache->begin(), Cache->end(), Val);
+      Cache->insert(Entry, Val);
+    }
     break;
-  }
   default:
     // Added many values, do a full scale sort.
     std::sort(Cache->begin(), Cache->end());
   }
+  
+  return false;
 }
 
 /// RemoveCachedNonLocalPointerDependencies - If P exists in
@@ -851,7 +978,7 @@
       NonLocalDepInfo &NLPDI = NonLocalPointerDeps[P].second;
       
       // The cache is not valid for any specific block anymore.
-      NonLocalPointerDeps[P].first = 0;
+      NonLocalPointerDeps[P].first = BBSkipFirstBlockPair();
       
       // Update any entries for RemInst to use the instruction after it.
       for (NonLocalDepInfo::iterator DI = NLPDI.begin(), DE = NLPDI.end();

Modified: llvm/trunk/test/Transforms/GVN/rle-must-alias.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-must-alias.ll?rev=61022&r1=61021&r2=61022&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/rle-must-alias.ll (original)
+++ llvm/trunk/test/Transforms/GVN/rle-must-alias.ll Sun Dec 14 21:35:32 2008
@@ -1,4 +1,9 @@
 ; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {DEAD.rle = phi i32}
+; XFAIL: *
+
+; FIXME: GVN should eliminate the fully redundant %9 GEP which 
+; allows DEAD to be removed.  This is PR3198.
+
 ; The %7 and %4 loads combine to make %DEAD unneeded.
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i386-apple-darwin7"

Modified: llvm/trunk/test/Transforms/GVN/rle-no-phi-translate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-no-phi-translate.ll?rev=61022&r1=61021&r2=61022&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/rle-no-phi-translate.ll (original)
+++ llvm/trunk/test/Transforms/GVN/rle-no-phi-translate.ll Sun Dec 14 21:35:32 2008
@@ -1,4 +1,7 @@
 ; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep load
+; FIXME: This should be promotable, but memdep/gvn don't track values
+; path/edge sensitively enough.
+
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i386-apple-darwin7"
 

Added: llvm/trunk/test/Transforms/GVN/rle-phi-translate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-phi-translate.ll?rev=61022&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/GVN/rle-phi-translate.ll (added)
+++ llvm/trunk/test/Transforms/GVN/rle-phi-translate.ll Sun Dec 14 21:35:32 2008
@@ -0,0 +1,32 @@
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {%cv.rle = phi i32}
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {%bv.rle = phi i32}
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin7"
+
+define i32 @g(i32* %b, i32* %c) nounwind {
+entry:
+	%g = alloca i32		;  [#uses=4]
+	%t1 = icmp eq i32* %b, null		;  [#uses=1]
+	br i1 %t1, label %bb, label %bb1
+
+bb:		; preds = %entry
+	%t2 = load i32* %c, align 4		;  [#uses=1]
+	%t3 = add i32 %t2, 1		;  [#uses=1]
+	store i32 %t3, i32* %g, align 4
+	br label %bb2
+
+bb1:		; preds = %entry
+	%t5 = load i32* %b, align 4		;  [#uses=1]
+	%t6 = add i32 %t5, 1		;  [#uses=1]
+	store i32 %t6, i32* %g, align 4
+	br label %bb2
+
+bb2:		; preds = %bb1, %bb
+	%c_addr.0 = phi i32* [ %g, %bb1 ], [ %c, %bb ]		;  [#uses=1]
+	%b_addr.0 = phi i32* [ %b, %bb1 ], [ %g, %bb ]		;  [#uses=1]
+	%cv = load i32* %c_addr.0, align 4		;  [#uses=1]
+	%bv = load i32* %b_addr.0, align 4		;  [#uses=1]
+	%ret = add i32 %cv, %bv		;  [#uses=1]
+	ret i32 %ret
+}
+




From sabre at nondot.org  Sun Dec 14 21:46:39 2008
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 15 Dec 2008 03:46:39 -0000
Subject: [llvm-commits] [llvm] r61023 - in /llvm/trunk:
 lib/Transforms/Scalar/GVN.cpp
 test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
 test/Transforms/GVN/2007-07-26-PhiErasure.ll
 test/Transforms/GVN/2007-07-31-NoDomInherit.ll
 test/Transforms/GVN/rle-dominated.ll test/Transforms/GVN/rle-must-alias.ll
 test/Transforms/GVN/rle-nonlocal.ll
 test/Transforms/GVN/rle-phi-translate.ll
 test/Transforms/GVN/rle-semidominated.ll
Message-ID: <200812150346.mBF3kdCG020069@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Dec 14 21:46:38 2008
New Revision: 61023

URL: http://llvm.org/viewvc/llvm-project?rev=61023&view=rev
Log:
make GVN try to rename inputs to the resultant replaced values, which
cleans up the generated code a bit.  This should have the added benefit of
not randomly renaming functions/globals like my previous patch did. :)

Modified:
    llvm/trunk/lib/Transforms/Scalar/GVN.cpp
    llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
    llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll
    llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
    llvm/trunk/test/Transforms/GVN/rle-dominated.ll
    llvm/trunk/test/Transforms/GVN/rle-must-alias.ll
    llvm/trunk/test/Transforms/GVN/rle-nonlocal.ll
    llvm/trunk/test/Transforms/GVN/rle-phi-translate.ll
    llvm/trunk/test/Transforms/GVN/rle-semidominated.ll

Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=61023&r1=61022&r2=61023&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Sun Dec 14 21:46:38 2008
@@ -1040,6 +1040,9 @@
     // Perform PHI construction.
     Value* v = GetValueForBlock(LI->getParent(), LI, BlockReplValues, true);
     LI->replaceAllUsesWith(v);
+    
+    if (!isa(v))
+      v->takeName(LI);
     if (isa(v->getType()))
       MD->invalidateCachedPointerInfo(v);
     toErase.push_back(LI);
@@ -1135,7 +1138,8 @@
   // Perform PHI construction.
   Value* v = GetValueForBlock(LI->getParent(), LI, BlockReplValues, true);
   LI->replaceAllUsesWith(v);
-  v->takeName(LI);
+  if (!isa(v))
+    v->takeName(LI);
   if (isa(v->getType()))
     MD->invalidateCachedPointerInfo(v);
   toErase.push_back(LI);

Modified: llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll?rev=61023&r1=61022&r2=61023&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll Sun Dec 14 21:46:38 2008
@@ -1,5 +1,5 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {tmp17625 =}
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {tmp17631 =}
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp17625 = phi i32. }
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp17631.* = phi i32. }
 
 @last = external global [65 x i32*]		; <[65 x i32*]*> [#uses=1]
 

Modified: llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll?rev=61023&r1=61022&r2=61023&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2007-07-26-PhiErasure.ll Sun Dec 14 21:46:38 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {tmp298316 =}
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp298316 = phi i32 }
 
 	%struct..0anon = type { i32 }
 	%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }

Modified: llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll?rev=61023&r1=61022&r2=61023&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll Sun Dec 14 21:46:38 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep tmp51.rle
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp47 = phi i32 }
 
 	%struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* }
 @debug = external constant i32		;  [#uses=0]

Modified: llvm/trunk/test/Transforms/GVN/rle-dominated.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-dominated.ll?rev=61023&r1=61022&r2=61023&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/rle-dominated.ll (original)
+++ llvm/trunk/test/Transforms/GVN/rle-dominated.ll Sun Dec 14 21:46:38 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep DEAD
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep load | count 2
 
 define i32 @main(i32** %p) {
 block1:
@@ -14,7 +14,7 @@
   br label %block4
 
 block4:
-  %DEAD = load i32** %p
-  %c = load i32* %DEAD
-  ret i32 %c
+  %c = load i32** %p
+  %d = load i32* %c
+  ret i32 %d
 }

Modified: llvm/trunk/test/Transforms/GVN/rle-must-alias.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-must-alias.ll?rev=61023&r1=61022&r2=61023&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/rle-must-alias.ll (original)
+++ llvm/trunk/test/Transforms/GVN/rle-must-alias.ll Sun Dec 14 21:46:38 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {DEAD.rle = phi i32}
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {DEAD = phi i32 }
 ; XFAIL: *
 
 ; FIXME: GVN should eliminate the fully redundant %9 GEP which 

Modified: llvm/trunk/test/Transforms/GVN/rle-nonlocal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-nonlocal.ll?rev=61023&r1=61022&r2=61023&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/rle-nonlocal.ll (original)
+++ llvm/trunk/test/Transforms/GVN/rle-nonlocal.ll Sun Dec 14 21:46:38 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {DEAD =}
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {%DEAD = phi i32. }
 
 define i32 @main(i32** %p) {
 block1:

Modified: llvm/trunk/test/Transforms/GVN/rle-phi-translate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-phi-translate.ll?rev=61023&r1=61022&r2=61023&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/rle-phi-translate.ll (original)
+++ llvm/trunk/test/Transforms/GVN/rle-phi-translate.ll Sun Dec 14 21:46:38 2008
@@ -1,5 +1,5 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {%cv.rle = phi i32}
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {%bv.rle = phi i32}
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {%cv = phi i32}
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {%bv = phi i32}
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i386-apple-darwin7"
 

Modified: llvm/trunk/test/Transforms/GVN/rle-semidominated.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-semidominated.ll?rev=61023&r1=61022&r2=61023&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/rle-semidominated.ll (original)
+++ llvm/trunk/test/Transforms/GVN/rle-semidominated.ll Sun Dec 14 21:46:38 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | not grep {DEAD =}
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {DEAD = phi i32 }
 
 define i32 @main(i32* %p) {
 block1:




From resistor at mac.com  Sun Dec 14 21:52:17 2008
From: resistor at mac.com (Owen Anderson)
Date: Mon, 15 Dec 2008 03:52:17 -0000
Subject: [llvm-commits] [llvm] r61024 -
	/llvm/trunk/lib/Transforms/Scalar/GVN.cpp
Message-ID: <200812150352.mBF3qHAY020283@zion.cs.uiuc.edu>

Author: resistor
Date: Sun Dec 14 21:52:17 2008
New Revision: 61024

URL: http://llvm.org/viewvc/llvm-project?rev=61024&view=rev
Log:
Ifdef out some code that I didn't mean to enable by default yet.

Modified:
    llvm/trunk/lib/Transforms/Scalar/GVN.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=61024&r1=61023&r2=61024&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Sun Dec 14 21:52:17 2008
@@ -1611,11 +1611,18 @@
 
   // Top-down walk of the dominator tree
   bool changed = false;
+#if 0
+  // Needed for value numbering with phi construction to work.
   ReversePostOrderTraversal RPOT(&F);
   for (ReversePostOrderTraversal::rpo_iterator RI = RPOT.begin(),
        RE = RPOT.end(); RI != RE; ++RI)
     changed |= processBlock(*RI);
-  
+#else
+  for (df_iterator DI = df_begin(DT->getRootNode()),
+       DE = df_end(DT->getRootNode()); DI != DE; ++DI)
+    changed |= processBlock(DI->getBlock());
+#endif
+
   return changed;
 }
 




From sabre at nondot.org  Sun Dec 14 22:42:01 2008
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 15 Dec 2008 04:42:01 -0000
Subject: [llvm-commits] [llvm] r61025 -
 /llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
Message-ID: <200812150442.mBF4g171021843@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Dec 14 22:42:00 2008
New Revision: 61025

URL: http://llvm.org/viewvc/llvm-project?rev=61025&view=rev
Log:
Adjust testcase to make it more stable across visitation order changes,
unbreaking it after r61024.

Modified:
    llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll

Modified: llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll?rev=61025&r1=61024&r2=61025&view=diff

==============================================================================
--- llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll Sun Dec 14 22:42:00 2008
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp17625 = phi i32. }
+; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp17625.* = phi i32. }
 ; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {tmp17631.* = phi i32. }
 
 @last = external global [65 x i32*]		; <[65 x i32*]*> [#uses=1]




From sabre at nondot.org  Sun Dec 14 22:58:30 2008
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 15 Dec 2008 04:58:30 -0000
Subject: [llvm-commits] [llvm] r61026 -
	/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
Message-ID: <200812150458.mBF4wU2C022507@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Dec 14 22:58:29 2008
New Revision: 61026

URL: http://llvm.org/viewvc/llvm-project?rev=61026&view=rev
Log:
if we have a phi translation failure of the start block,
return *just* a clobber of the start block, not other 
random stuff as well.

Modified:
    llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp

Modified: llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp?rev=61026&r1=61025&r2=61026&view=diff

==============================================================================
--- llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp Sun Dec 14 22:58:29 2008
@@ -494,6 +494,7 @@
   if (!getNonLocalPointerDepFromBB(Pointer, PointeeSize, isLoad, FromBB,
                                    Result, Visited, true))
     return;
+  Result.clear();
   Result.push_back(std::make_pair(FromBB,
                                   MemDepResult::getClobber(FromBB->begin())));
 }




From sabre at nondot.org  Sun Dec 14 23:28:29 2008
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 15 Dec 2008 05:28:29 -0000
Subject: [llvm-commits] [llvm] r61027 -
	/llvm/trunk/lib/Transforms/Scalar/GVN.cpp
Message-ID: <200812150528.mBF5SToR023306@zion.cs.uiuc.edu>

Author: lattner
Date: Sun Dec 14 23:28:29 2008
New Revision: 61027

URL: http://llvm.org/viewvc/llvm-project?rev=61027&view=rev
Log:
Enable Load PRE.  This teaches GVN to push partially redundant loads up the
CFG when there is exactly one predecessor where the load is not available.
This is designed to not increase code size but still eliminate partially
redundant loads.  This fires 1765 times on 403.gcc even though it doesn't
do critical edge splitting yet (the most common reason for it to fail).

Modified:
    llvm/trunk/lib/Transforms/Scalar/GVN.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=61027&r1=61026&r2=61027&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Sun Dec 14 23:28:29 2008
@@ -48,7 +48,7 @@
 
 static cl::opt EnablePRE("enable-pre",
                                cl::init(true), cl::Hidden);
-cl::opt EnableLoadPRE("enable-load-pre"/*, cl::init(true)*/);
+cl::opt EnableLoadPRE("enable-load-pre", cl::init(true));
 
 //===----------------------------------------------------------------------===//
 //                         ValueTable Class
@@ -957,6 +957,11 @@
   if (Deps.size() > 100)
     return false;
   
+  // If we had a phi translation failure, we'll have a single entry which is a
+  // clobber in the current block.  Reject this early.
+  if (Deps.size() == 1 && Deps[0].second.isClobber())
+    return false;
+  
   // Filter out useless results (non-locals, etc).  Keep track of the blocks
   // where we have a value available in repl, also keep track of whether we see
   // dependencies that produce an unknown value for the load (such as a call







[1]	TableGen Fundamentals +
[1]	TableGen Fundamentals http://llvm.cs.uiuc.edu/docs/TableGenFundamentals.html