From evan.cheng at apple.com Mon Mar 30 01:17:34 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 30 Mar 2009 06:17:34 -0000 Subject: [llvm-commits] [llvm] r68025 - /llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll Message-ID: <200903300617.n2U6HZnH006135@zion.cs.uiuc.edu> Author: evancheng Date: Mon Mar 30 01:17:34 2009 New Revision: 68025 URL: http://llvm.org/viewvc/llvm-project?rev=68025&view=rev Log: Forgot this test. Added: llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll Added: llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll?rev=68025&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll (added) +++ llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll Mon Mar 30 01:17:34 2009 @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -no-implicit-float + +define double @t(double %x) nounwind ssp { +entry: + br i1 false, label %return, label %bb3 + +bb3: ; preds = %entry + ret double 0.000000e+00 + +return: ; preds = %entry + ret double undef +} From sabre at nondot.org Mon Mar 30 01:35:00 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 30 Mar 2009 06:35:00 -0000 Subject: [llvm-commits] [llvm] r68026 - /llvm/trunk/docs/BitCodeFormat.html Message-ID: <200903300635.n2U6Z1pI006739@zion.cs.uiuc.edu> Author: lattner Date: Mon Mar 30 01:34:59 2009 New Revision: 68026 URL: http://llvm.org/viewvc/llvm-project?rev=68026&view=rev Log: fix some validation problems. Modified: llvm/trunk/docs/BitCodeFormat.html Modified: llvm/trunk/docs/BitCodeFormat.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/BitCodeFormat.html?rev=68026&r1=68025&r2=68026&view=diff ============================================================================== --- llvm/trunk/docs/BitCodeFormat.html (original) +++ llvm/trunk/docs/BitCodeFormat.html Mon Mar 30 01:34:59 2009 @@ -563,13 +563,8 @@

-

-[Magic32,
- Version32,
- Offset32,
- Size32,
- CPUType32]
-

+[Magic32, Version32, Offset32, + Size32, CPUType32]

Each of the fields are 32-bit fields stored in little endian form (as with the rest of the bitcode file fields). The Magic number is always From evan.cheng at apple.com Mon Mar 30 03:42:15 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 30 Mar 2009 01:42:15 -0700 Subject: [llvm-commits] [llvm] r67881 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp In-Reply-To: <200903272355.n2RNt58L001640@zion.cs.uiuc.edu> References: <200903272355.n2RNt58L001640@zion.cs.uiuc.edu> Message-ID: <03E88F79-1516-44B8-A395-A048166AA1AE@apple.com> Hi Dan, This is pretty bizarre. Somehow this patch is causing lua to fail see "grawp-pic". I think the bug is elsewhere (because the fix is obvious). But do you mind taking a look? Evan On Mar 27, 2009, at 4:55 PM, Dan Gohman wrote: > Author: djg > Date: Fri Mar 27 18:55:04 2009 > New Revision: 67881 > > URL: http://llvm.org/viewvc/llvm-project?rev=67881&view=rev > Log: > Fix what surely must be a copy+pasto. > > Modified: > llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=67881&r1=67880&r2=67881&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp > (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri Mar > 27 18:55:04 2009 > @@ -548,8 +548,8 @@ > FLI.LiveOutRegInfo.resize(DestReg+1); > FunctionLoweringInfo::LiveOutInfo &LOI = > FLI.LiveOutRegInfo[DestReg]; > LOI.NumSignBits = NumSignBits; > - LOI.KnownOne = NumSignBits; > - LOI.KnownZero = NumSignBits; > + LOI.KnownOne = KnownOne; > + LOI.KnownZero = KnownZero; > } > } > } > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From gohman at apple.com Mon Mar 30 09:47:50 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 30 Mar 2009 07:47:50 -0700 Subject: [llvm-commits] [llvm] r67879 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h In-Reply-To: <200903281155.09133.baldrick@free.fr> References: <200903272351.n2RNp3h6001260@zion.cs.uiuc.edu> <200903281155.09133.baldrick@free.fr> Message-ID: On Mar 28, 2009, at 3:55 AM, Duncan Sands wrote: > Hi Dan, > >> Initialize LiveOutInfo's APInt members to zero, as APInt's >> default constructor produces an uninitialized APInt. >> This fixes PR3896. > > is this the correct fix? If LiveOutInfo was default > constructed, doesn't this mean it doesn't contain > anything useful. If so, why is it being examined? > Also, will the code that uses it come to the right > conclusions given this initialization? Hi Duncan, LiveOutRegInfo is a std::vector which is populated with resize. The expectation is that elements contain "nothing known" values unless more information is added to them. Dan From gohman at apple.com Mon Mar 30 09:55:08 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 30 Mar 2009 07:55:08 -0700 Subject: [llvm-commits] [llvm] r67849 - /llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll In-Reply-To: References: <200903271617.n2RGHboQ032209@zion.cs.uiuc.edu> Message-ID: <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> On Mar 28, 2009, at 3:07 AM, Bill Wendling wrote: > On Mar 27, 2009, at 9:17 AM, Dan Gohman wrote: > >> Author: djg >> Date: Fri Mar 27 11:17:22 2009 >> New Revision: 67849 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=67849&view=rev >> Log: >> Fix this test so that it doesn't spuriously fail due to some >> unrelated debugging output happening to contain the string "store". >> >> Modified: >> llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll >> >> Modified: llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll?rev=67849&r1=67848&r2=67849&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll (original) >> +++ llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll Fri Mar 27 >> 11:17:22 2009 >> @@ -1,4 +1,4 @@ >> -; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep store >> +; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep {= store} > > I thought that "store" instructions were never assigned to a > variable... This test is grepping through the -debug output of llc, and the stores its looking for do happen to be printed with =. Grepping through -debug output isn't very nice in any case, but at the moment there aren't any better ways to express this specific test. Dan From asl at math.spbu.ru Mon Mar 30 10:27:05 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 30 Mar 2009 15:27:05 -0000 Subject: [llvm-commits] [llvm] r68031 - in /llvm/trunk: include/llvm/Target/ELFTargetAsmInfo.h include/llvm/Target/TargetAsmInfo.h lib/Target/DarwinTargetAsmInfo.cpp lib/Target/ELFTargetAsmInfo.cpp lib/Target/TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.cpp Message-ID: <200903301527.n2UFR5Lg008061@zion.cs.uiuc.edu> Author: asl Date: Mon Mar 30 10:27:03 2009 New Revision: 68031 URL: http://llvm.org/viewvc/llvm-project?rev=68031&view=rev Log: Add data.rel stuff Modified: llvm/trunk/include/llvm/Target/ELFTargetAsmInfo.h llvm/trunk/include/llvm/Target/TargetAsmInfo.h llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp llvm/trunk/lib/Target/TargetAsmInfo.cpp llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Modified: llvm/trunk/include/llvm/Target/ELFTargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/ELFTargetAsmInfo.h?rev=68031&r1=68030&r2=68031&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/ELFTargetAsmInfo.h (original) +++ llvm/trunk/include/llvm/Target/ELFTargetAsmInfo.h Mon Mar 30 10:27:03 2009 @@ -32,6 +32,11 @@ const Section* MergeableStringSection(const GlobalVariable *GV) const; virtual const Section* SelectSectionForMachineConst(const Type *Ty) const; + + const Section* DataRelSection; + const Section* DataRelLocalSection; + const Section* DataRelROSection; + const Section* DataRelROLocalSection; }; } Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=68031&r1=68030&r2=68031&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Mon Mar 30 10:27:03 2009 @@ -36,8 +36,12 @@ Unknown = 0, ///< Custom section Text, ///< Text section Data, ///< Data section + DataRel, ///< Contains data that has relocations + DataRelLocal, ///< Contains data that has only local relocations BSS, ///< BSS section ROData, ///< Readonly data section + DataRelRO, ///< Contains data that is otherwise readonly + DataRelROLocal, ///< Contains r/o data with only local relocations RODataMergeStr, ///< Readonly data section (mergeable strings) RODataMergeConst, ///< Readonly data section (mergeable constants) SmallData, ///< Small data section Modified: llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp?rev=68031&r1=68030&r2=68031&view=diff ============================================================================== --- llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp Mon Mar 30 10:27:03 2009 @@ -85,6 +85,9 @@ else return TextSection; case SectionKind::Data: + case SectionKind::DataRel: + case SectionKind::DataRelRO: + case SectionKind::DataRelROLocal: case SectionKind::ThreadData: case SectionKind::BSS: case SectionKind::ThreadBSS: Modified: llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp?rev=68031&r1=68030&r2=68031&view=diff ============================================================================== --- llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp Mon Mar 30 10:27:03 2009 @@ -35,6 +35,13 @@ TLSBSSSection = getNamedSection("\t.tbss", SectionFlags::Writeable | SectionFlags::TLS | SectionFlags::BSS); + DataRelSection = getNamedSection("\t.data.rel", SectionFlags::Writeable); + DataRelLocalSection = getNamedSection("\t.data.rel.local", + SectionFlags::Writeable); + DataRelROSection = getNamedSection("\t.data.rel.ro", + SectionFlags::Writeable); + DataRelROLocalSection = getNamedSection("\t.data.rel.ro.local", + SectionFlags::Writeable); } const Section* @@ -67,6 +74,14 @@ case SectionKind::Data: case SectionKind::SmallData: return DataSection; + case SectionKind::DataRel: + return DataRelSection; + case SectionKind::DataRelLocal: + return DataRelLocalSection; + case SectionKind::DataRelRO: + return DataRelROSection; + case SectionKind::DataRelROLocal: + return DataRelROLocalSection; case SectionKind::BSS: case SectionKind::SmallBSS: // ELF targets usually have BSS sections Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=68031&r1=68030&r2=68031&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Mon Mar 30 10:27:03 2009 @@ -124,7 +124,7 @@ DataSection = getUnnamedSection("\t.data", SectionFlags::Writeable); } -TargetAsmInfo::TargetAsmInfo(const TargetMachine &tm) +TargetAsmInfo::TargetAsmInfo(const TargetMachine &tm) : TM(tm) { fillDefaultValues(); } @@ -220,14 +220,18 @@ unsigned Reloc = RelocBehaviour(); // We already did a query for 'all' relocs, thus - early exits. - if (Reloc == Reloc::LocalOrGlobal) - return SectionKind::Data; - else if (Reloc == Reloc::None) + if (Reloc == Reloc::LocalOrGlobal) { + return (C->ContainsRelocations(Reloc::Local) ? + SectionKind::DataRelROLocal : SectionKind::DataRelRO); + } else if (Reloc == Reloc::None) return SectionKind::ROData; else { // Ok, target wants something funny. Honour it. - return (C->ContainsRelocations(Reloc) ? - SectionKind::Data : SectionKind::ROData); + if (C->ContainsRelocations(Reloc)) { + return (Reloc == Reloc::Local ? + SectionKind::DataRelROLocal : SectionKind::DataRelRO); + } else + return SectionKind::ROData; } } else { // Check, if initializer is a null-terminated string @@ -238,8 +242,19 @@ } } - // Variable is not constant or thread-local - emit to generic data section. - return (isThreadLocal ? SectionKind::ThreadData : SectionKind::Data); + // Variable either is not constant or thread-local - output to data section. + if (isThreadLocal) + return SectionKind::ThreadData; + + if (GVar->hasInitializer()) { + Constant *C = GVar->getInitializer(); + unsigned Reloc = RelocBehaviour(); + if (Reloc != Reloc::None && C->ContainsRelocations(Reloc)) + return (C->ContainsRelocations(Reloc::Local) ? + SectionKind::DataRelLocal : SectionKind::DataRel); + } + + return SectionKind::Data; } unsigned @@ -259,6 +274,10 @@ Flags |= SectionFlags::TLS; // FALLS THROUGH case SectionKind::Data: + case SectionKind::DataRel: + case SectionKind::DataRelLocal: + case SectionKind::DataRelRO: + case SectionKind::DataRelROLocal: case SectionKind::BSS: Flags |= SectionFlags::Writeable; break; @@ -360,6 +379,14 @@ return ".gnu.linkonce.t." + GV->getName(); case SectionKind::Data: return ".gnu.linkonce.d." + GV->getName(); + case SectionKind::DataRel: + return ".gnu.linkonce.d.rel" + GV->getName(); + case SectionKind::DataRelLocal: + return ".gnu.linkonce.d.rel.local" + GV->getName(); + case SectionKind::DataRelRO: + return ".gnu.linkonce.d.rel.ro" + GV->getName(); + case SectionKind::DataRelROLocal: + return ".gnu.linkonce.d.rel.ro.local" + GV->getName(); case SectionKind::SmallData: return ".gnu.linkonce.s." + GV->getName(); case SectionKind::BSS: Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=68031&r1=68030&r2=68031&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Mon Mar 30 10:27:03 2009 @@ -305,17 +305,12 @@ switch (kind) { case SectionKind::Text: return ".text$linkonce" + GV->getName(); - case SectionKind::Data: - case SectionKind::BSS: - case SectionKind::ThreadData: - case SectionKind::ThreadBSS: - return ".data$linkonce" + GV->getName(); case SectionKind::ROData: case SectionKind::RODataMergeConst: case SectionKind::RODataMergeStr: return ".rdata$linkonce" + GV->getName(); default: - assert(0 && "Unknown section kind"); + return ".data$linkonce" + GV->getName(); } return NULL; } From asl at math.spbu.ru Mon Mar 30 10:27:43 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 30 Mar 2009 15:27:43 -0000 Subject: [llvm-commits] [llvm] r68032 - in /llvm/trunk: include/llvm/Target/ELFTargetAsmInfo.h lib/Target/DarwinTargetAsmInfo.cpp lib/Target/ELFTargetAsmInfo.cpp lib/Target/TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.cpp Message-ID: <200903301527.n2UFRh8l008094@zion.cs.uiuc.edu> Author: asl Date: Mon Mar 30 10:27:43 2009 New Revision: 68032 URL: http://llvm.org/viewvc/llvm-project?rev=68032&view=rev Log: Do not propagate ELF-specific stuff (data.rel) into other targets. This simplifies code and also ensures correctness. Modified: llvm/trunk/include/llvm/Target/ELFTargetAsmInfo.h llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp llvm/trunk/lib/Target/TargetAsmInfo.cpp llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Modified: llvm/trunk/include/llvm/Target/ELFTargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/ELFTargetAsmInfo.h?rev=68032&r1=68031&r2=68032&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/ELFTargetAsmInfo.h (original) +++ llvm/trunk/include/llvm/Target/ELFTargetAsmInfo.h Mon Mar 30 10:27:43 2009 @@ -25,6 +25,7 @@ struct ELFTargetAsmInfo: public TargetAsmInfo { explicit ELFTargetAsmInfo(const TargetMachine &TM); + SectionKind::Kind SectionKindForGlobal(const GlobalValue *GV) const; virtual const Section* SelectSectionForGlobal(const GlobalValue *GV) const; virtual std::string printSectionFlags(unsigned flags) const; const Section* MergeableConstSection(const GlobalVariable *GV) const; Modified: llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp?rev=68032&r1=68031&r2=68032&view=diff ============================================================================== --- llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp Mon Mar 30 10:27:43 2009 @@ -85,9 +85,6 @@ else return TextSection; case SectionKind::Data: - case SectionKind::DataRel: - case SectionKind::DataRelRO: - case SectionKind::DataRelROLocal: case SectionKind::ThreadData: case SectionKind::BSS: case SectionKind::ThreadBSS: Modified: llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp?rev=68032&r1=68031&r2=68032&view=diff ============================================================================== --- llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp Mon Mar 30 10:27:43 2009 @@ -44,6 +44,30 @@ SectionFlags::Writeable); } +SectionKind::Kind +ELFTargetAsmInfo::SectionKindForGlobal(const GlobalValue *GV) const { + SectionKind::Kind Kind = TargetAsmInfo::SectionKindForGlobal(GV); + + if (Kind != SectionKind::Data) + return Kind; + + // Decide, whether we need data.rel stuff + const GlobalVariable* GVar = dyn_cast(GV); + if (GVar->hasInitializer()) { + Constant *C = GVar->getInitializer(); + bool isConstant = GVar->isConstant(); + unsigned Reloc = RelocBehaviour(); + if (Reloc != Reloc::None && C->ContainsRelocations(Reloc)) + return (C->ContainsRelocations(Reloc::Local) ? + (isConstant ? + SectionKind::DataRelROLocal : SectionKind::DataRelLocal) : + (isConstant ? + SectionKind::DataRelRO : SectionKind::DataRel)); + } + + return Kind; +} + const Section* ELFTargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const { SectionKind::Kind Kind = SectionKindForGlobal(GV); Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=68032&r1=68031&r2=68032&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Mon Mar 30 10:27:43 2009 @@ -220,18 +220,14 @@ unsigned Reloc = RelocBehaviour(); // We already did a query for 'all' relocs, thus - early exits. - if (Reloc == Reloc::LocalOrGlobal) { - return (C->ContainsRelocations(Reloc::Local) ? - SectionKind::DataRelROLocal : SectionKind::DataRelRO); - } else if (Reloc == Reloc::None) + if (Reloc == Reloc::LocalOrGlobal) + return SectionKind::Data; + else if (Reloc == Reloc::None) return SectionKind::ROData; else { // Ok, target wants something funny. Honour it. - if (C->ContainsRelocations(Reloc)) { - return (Reloc == Reloc::Local ? - SectionKind::DataRelROLocal : SectionKind::DataRelRO); - } else - return SectionKind::ROData; + return (C->ContainsRelocations(Reloc) ? + SectionKind::Data : SectionKind::ROData); } } else { // Check, if initializer is a null-terminated string @@ -243,18 +239,7 @@ } // Variable either is not constant or thread-local - output to data section. - if (isThreadLocal) - return SectionKind::ThreadData; - - if (GVar->hasInitializer()) { - Constant *C = GVar->getInitializer(); - unsigned Reloc = RelocBehaviour(); - if (Reloc != Reloc::None && C->ContainsRelocations(Reloc)) - return (C->ContainsRelocations(Reloc::Local) ? - SectionKind::DataRelLocal : SectionKind::DataRel); - } - - return SectionKind::Data; + return (isThreadLocal ? SectionKind::ThreadData : SectionKind::Data); } unsigned Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=68032&r1=68031&r2=68032&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Mon Mar 30 10:27:43 2009 @@ -305,12 +305,17 @@ switch (kind) { case SectionKind::Text: return ".text$linkonce" + GV->getName(); + case SectionKind::Data: + case SectionKind::BSS: + case SectionKind::ThreadData: + case SectionKind::ThreadBSS: + return ".data$linkonce" + GV->getName(); case SectionKind::ROData: case SectionKind::RODataMergeConst: case SectionKind::RODataMergeStr: return ".rdata$linkonce" + GV->getName(); default: - return ".data$linkonce" + GV->getName(); + assert(0 && "Unknown section kind"); } return NULL; } From asl at math.spbu.ru Mon Mar 30 10:28:00 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 30 Mar 2009 15:28:00 -0000 Subject: [llvm-commits] [llvm] r68033 - /llvm/trunk/lib/VMCore/Constants.cpp Message-ID: <200903301528.n2UFS0VM008112@zion.cs.uiuc.edu> Author: asl Date: Mon Mar 30 10:28:00 2009 New Revision: 68033 URL: http://llvm.org/viewvc/llvm-project?rev=68033&view=rev Log: Properly propagate Kind. Modified: llvm/trunk/lib/VMCore/Constants.cpp Modified: llvm/trunk/lib/VMCore/Constants.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=68033&r1=68032&r2=68033&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Constants.cpp (original) +++ llvm/trunk/lib/VMCore/Constants.cpp Mon Mar 30 10:28:00 2009 @@ -110,7 +110,7 @@ } for (unsigned i = 0, e = getNumOperands(); i != e; ++i) - if (getOperand(i)->ContainsRelocations()) + if (getOperand(i)->ContainsRelocations(Kind)) return true; return false; From asl at math.spbu.ru Mon Mar 30 10:28:21 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 30 Mar 2009 15:28:21 -0000 Subject: [llvm-commits] [llvm] r68034 - /llvm/trunk/lib/VMCore/Constants.cpp Message-ID: <200903301528.n2UFSLQE008134@zion.cs.uiuc.edu> Author: asl Date: Mon Mar 30 10:28:21 2009 New Revision: 68034 URL: http://llvm.org/viewvc/llvm-project?rev=68034&view=rev Log: Fix infinite looping Modified: llvm/trunk/lib/VMCore/Constants.cpp Modified: llvm/trunk/lib/VMCore/Constants.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=68034&r1=68033&r2=68034&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Constants.cpp (original) +++ llvm/trunk/lib/VMCore/Constants.cpp Mon Mar 30 10:28:21 2009 @@ -107,6 +107,8 @@ // requested return true; } + + return false; } for (unsigned i = 0, e = getNumOperands(); i != e; ++i) From asl at math.spbu.ru Mon Mar 30 10:28:40 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 30 Mar 2009 15:28:40 -0000 Subject: [llvm-commits] [llvm] r68035 - /llvm/trunk/test/CodeGen/X86/rodata-relocs.ll Message-ID: <200903301528.n2UFSeLw008153@zion.cs.uiuc.edu> Author: asl Date: Mon Mar 30 10:28:40 2009 New Revision: 68035 URL: http://llvm.org/viewvc/llvm-project?rev=68035&view=rev Log: Tweak test for recent relro stuff Modified: llvm/trunk/test/CodeGen/X86/rodata-relocs.ll Modified: llvm/trunk/test/CodeGen/X86/rodata-relocs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rodata-relocs.ll?rev=68035&r1=68034&r2=68035&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/rodata-relocs.ll (original) +++ llvm/trunk/test/CodeGen/X86/rodata-relocs.ll Mon Mar 30 10:28:40 2009 @@ -1,15 +1,23 @@ ; RUN: llvm-as < %s | llc -relocation-model=static | grep rodata | count 3 ; RUN: llvm-as < %s | llc -relocation-model=static | grep -F "rodata.cst" | count 2 ; RUN: llvm-as < %s | llc -relocation-model=pic | grep rodata | count 2 -; RUN: llvm-as < %s | llc -relocation-model=pic | grep -F ".data" | count 1 +; RUN: llvm-as < %s | llc -relocation-model=pic | grep -F ".data.rel.ro" | count 2 +; RUN: llvm-as < %s | llc -relocation-model=pic | grep -F ".data.rel.ro.local" | count 1 +; RUN: llvm-as < %s | llc -relocation-model=pic | grep -F ".data.rel" | count 4 +; RUN: llvm-as < %s | llc -relocation-model=pic | grep -F ".data.rel.local" | count 1 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" - at a = internal constant [2 x i32] [i32 1, i32 2] ; <[2 x i32]*> [#uses=1] - at a1 = constant [2 x i32] [i32 1, i32 2] ; <[2 x i32]*> [#uses=1] - at e = internal constant [2 x [2 x i32]] [[2 x i32] [i32 1, i32 2], [2 x i32] [i32 3, i32 4]], align 16 ; <[2 x [2 x i32]]*> [#uses=1] - at e1 = constant [2 x [2 x i32]] [[2 x i32] [i32 1, i32 2], [2 x i32] [i32 3, i32 4]], align 16 ; <[2 x [2 x i32]]*> [#uses=1] - at p = constant i8* bitcast ([2 x i32]* @a to i8*) ; [#uses=0] - at t = constant i8* bitcast ([2 x [2 x i32]]* @e to i8*) ; [#uses=0] - at p1 = constant i8* bitcast ([2 x i32]* @a1 to i8*) ; [#uses=0] - at t1 = constant i8* bitcast ([2 x [2 x i32]]* @e1 to i8*) ; [#uses=0] + at a = internal constant [2 x i32] [i32 1, i32 2] + at a1 = constant [2 x i32] [i32 1, i32 2] + at e = internal constant [2 x [2 x i32]] [[2 x i32] [i32 1, i32 2], [2 x i32] [i32 3, i32 4]], align 16 + at e1 = constant [2 x [2 x i32]] [[2 x i32] [i32 1, i32 2], [2 x i32] [i32 3, i32 4]], align 16 + at p = constant i8* bitcast ([2 x i32]* @a to i8*) + at t = constant i8* bitcast ([2 x [2 x i32]]* @e to i8*) + at p1 = constant i8* bitcast ([2 x i32]* @a1 to i8*) + at t1 = constant i8* bitcast ([2 x [2 x i32]]* @e1 to i8*) + at p2 = internal global i8* bitcast([2 x i32]* @a1 to i8*) + at t2 = internal global i8* bitcast([2 x [2 x i32]]* @e1 to i8*) + at p3 = internal global i8* bitcast([2 x i32]* @a to i8*) + at t3 = internal global i8* bitcast([2 x [2 x i32]]* @e to i8*) + From gohman at apple.com Mon Mar 30 10:43:40 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 30 Mar 2009 08:43:40 -0700 Subject: [llvm-commits] [llvm] r68004 - in /llvm/trunk: include/llvm/Constant.h lib/VMCore/Constants.cpp In-Reply-To: <200903291713.n2THDLls031259@zion.cs.uiuc.edu> References: <200903291713.n2THDLls031259@zion.cs.uiuc.edu> Message-ID: On Mar 29, 2009, at 10:13 AM, Anton Korobeynikov wrote: > Author: asl > Date: Sun Mar 29 12:13:18 2009 > New Revision: 68004 > > URL: http://llvm.org/viewvc/llvm-project?rev=68004&view=rev > Log: > Extend the relocation tracker handler, so we can filter on different > 'kinds' of relocations required. > > Modified: > llvm/trunk/include/llvm/Constant.h > llvm/trunk/lib/VMCore/Constants.cpp > > Modified: llvm/trunk/include/llvm/Constant.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constant.h?rev=68004&r1=68003&r2=68004&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/include/llvm/Constant.h (original) > +++ llvm/trunk/include/llvm/Constant.h Sun Mar 29 12:13:18 2009 > @@ -19,6 +19,12 @@ > namespace llvm { > template class SmallVectorImpl; > > + namespace Reloc { > + const unsigned Local = 1 << 0; ///< Local relocations are > required > + const unsigned Global = 1 << 1; ///< Global relocations are > required > + const unsigned LocalOrGlobal = Local | Global; > + } Hi Anton, Can you add comments describing what "local" and "global" mean here? Specifically, do these express linkage information, visibility information, both, or something else? Looking at the code, it appears the answer is linkage information. Please mention this in a comment in Constant.h. Thanks, Dan From gohman at apple.com Mon Mar 30 11:49:37 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 30 Mar 2009 09:49:37 -0700 Subject: [llvm-commits] [llvm] r68023 - /llvm/trunk/docs/TestingGuide.html In-Reply-To: <200903300437.n2U4bsT6002346@zion.cs.uiuc.edu> References: <200903300437.n2U4bsT6002346@zion.cs.uiuc.edu> Message-ID: <17C222A8-8566-478A-A274-66E082256A19@apple.com> On Mar 29, 2009, at 9:37 PM, John Mosby wrote: > Author: jdm > Date: Sun Mar 29 23:37:51 2009 > New Revision: 68023 > > URL: http://llvm.org/viewvc/llvm-project?rev=68023&view=rev > Log: > Clarify section on setting up and running test-suite > > Modified: > llvm/trunk/docs/TestingGuide.html > > Modified: llvm/trunk/docs/TestingGuide.html > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/TestingGuide.html?rev=68023&r1=68022&r2=68023&view=diff Hi John, > > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/docs/TestingGuide.html (original) > +++ llvm/trunk/docs/TestingGuide.html Sun Mar 29 23:37:51 2009 > @@ -695,12 +695,14 @@ > >

First, all tests are executed within the LLVM object directory > tree. They > are not executed inside of the LLVM source tree. This is > because the > -test suite creates temporary files during execution.

> +test suite creates temporary files during execution. This means you > must create > +a build tree separate from the LLVM source tree in which to run the > test suite.

Is this true? Is it not possible to run the test-suite in srdir == objdir mode when it is run from projects/test-suite? In fact, there's a major problem with running the test-suite in srcdir != objdir mode -- the objdir contains copies of the srcdir's Makefiles, and the copies are not updated after an svn update. > > >

To run the test suite, you need to use the following steps:

> >
    > -
  1. cd into the llvm/projects directory
    2. > +
  2. cd into the llvm/projects directory in your > source tree. > +
    3. > >

  3. Check out the test-suite module with:

    > > @@ -709,24 +711,35 @@ > % svn co http://llvm.org/svn/llvm-project/test-suite/trunk test-suite > > > - > -

    This will get the test suite into llvm/projects/llvm- > test

    > - > -

  4. Configure the test suite using llvm configure. This will > automatically > - configure test-suite. You must do it from the top level > otherwise llvm-gcc > - will not be set which is required to run llvm-test:

    > +

    This will get the test suite into llvm/projects/test- > suite. > +
    [The Makefiles expect the test suite directory to be > named either > + test-suite or llvm-test. To be safe, use > + test-suite as in the above svn command line.]

    The name "llvm-test" is a historical artifact. "test-suite" is the preferred name currently. It would be better to avoid mentioning "llvm-test" here, to avoid confusion. Dan From artur.pietrek at kalray.eu Mon Mar 30 09:50:55 2009 From: artur.pietrek at kalray.eu (Artur Pietrek) Date: Mon, 30 Mar 2009 16:50:55 +0200 Subject: [llvm-commits] MSIL codegen, global pointers initialization fix Message-ID: <49D0DC4F.40105@kalray.eu> Hello, The patch proposal for fixing global pointers initialization in MSIL codegen. See attachement. Regards, Artur -------------- next part -------------- A non-text attachment was scrubbed... Name: fix_globals_init.patch Type: text/x-patch Size: 1492 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090330/e2d9b41f/attachment.bin From mrs at apple.com Mon Mar 30 12:06:18 2009 From: mrs at apple.com (Mike Stump) Date: Mon, 30 Mar 2009 10:06:18 -0700 Subject: [llvm-commits] [llvm] r67892 - in /llvm/trunk: include/llvm/Support/CommandLine.h lib/Support/CommandLine.cpp In-Reply-To: <0EAEDD00-16A2-4847-8C24-315B87661232@apple.com> References: <200903280208.n2S28lQ4010375@zion.cs.uiuc.edu> <0EAEDD00-16A2-4847-8C24-315B87661232@apple.com> Message-ID: <8B5AC6AA-D7EF-45B6-BB7A-D9912244CE12@apple.com> On Mar 27, 2009, at 7:09 PM, Chris Lattner wrote: > Mike, who delete[]'s the string that is new'd in this code? It leaks. > Why should this exist? I put it in so that we could handle -foption and -fno-option style options. From clattner at apple.com Mon Mar 30 12:08:02 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 30 Mar 2009 10:08:02 -0700 Subject: [llvm-commits] [llvm] r67849 - /llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll In-Reply-To: <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> References: <200903271617.n2RGHboQ032209@zion.cs.uiuc.edu> <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> Message-ID: <520670C5-EEC2-40B9-9317-7700D3DCF0FA@apple.com> On Mar 30, 2009, at 7:55 AM, Dan Gohman wrote: >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll (original) >>> +++ llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll Fri Mar 27 >>> 11:17:22 2009 >>> @@ -1,4 +1,4 @@ >>> -; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep store >>> +; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep {= store} >> >> I thought that "store" instructions were never assigned to a >> variable... > > This test is grepping through the -debug output of llc, and the stores > its > looking for do happen to be printed with =. > > Grepping through -debug output isn't very nice in any case, but at the > moment there aren't any better ways to express this specific test. Actually, now that you mention it, grepping through -debug output is not acceptable. This test won't pass in a release-asserts build. -Chris From fvbommel at wxs.nl Mon Mar 30 12:09:50 2009 From: fvbommel at wxs.nl (Frits van Bommel) Date: Mon, 30 Mar 2009 19:09:50 +0200 Subject: [llvm-commits] [llvm] r68032 - in /llvm/trunk: include/llvm/Target/ELFTargetAsmInfo.h lib/Target/DarwinTargetAsmInfo.cpp lib/Target/ELFTargetAsmInfo.cpp lib/Target/TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.cpp In-Reply-To: <200903301527.n2UFRh8l008094@zion.cs.uiuc.edu> References: <200903301527.n2UFRh8l008094@zion.cs.uiuc.edu> Message-ID: <49D0FCDE.3010907@wxs.nl> Anton Korobeynikov wrote: > Modified: llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp?rev=68032&r1=68031&r2=68032&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp (original) > +++ llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp Mon Mar 30 10:27:43 2009 > @@ -44,6 +44,30 @@ > SectionFlags::Writeable); > } > > +SectionKind::Kind > +ELFTargetAsmInfo::SectionKindForGlobal(const GlobalValue *GV) const { > + SectionKind::Kind Kind = TargetAsmInfo::SectionKindForGlobal(GV); > + > + if (Kind != SectionKind::Data) > + return Kind; > + > + // Decide, whether we need data.rel stuff > + const GlobalVariable* GVar = dyn_cast(GV); > + if (GVar->hasInitializer()) { > + Constant *C = GVar->getInitializer(); > + bool isConstant = GVar->isConstant(); > + unsigned Reloc = RelocBehaviour(); > + if (Reloc != Reloc::None && C->ContainsRelocations(Reloc)) > + return (C->ContainsRelocations(Reloc::Local) ? > + (isConstant ? > + SectionKind::DataRelROLocal : SectionKind::DataRelLocal) : > + (isConstant ? > + SectionKind::DataRelRO : SectionKind::DataRel)); Doesn't this last bit put data with both global and local relocations in the section supposedly reserved for data with *only* local relocations? (According to the comments you added in the previous commit) So shouldn't this be something like: ---- + return (C->ContainsRelocations(Reloc::Global) ? + (isConstant ? + SectionKind::DataRelRO : SectionKind::DataRel) : + (isConstant ? + SectionKind::DataRelROLocal : SectionKind::DataRelLocal)); ---- instead? > + } > + > + return Kind; > +} > + > const Section* > ELFTargetAsmInfo::SelectSectionForGlobal(const GlobalValue *GV) const { > SectionKind::Kind Kind = SectionKindForGlobal(GV); > From ojomojo at gmail.com Mon Mar 30 12:23:38 2009 From: ojomojo at gmail.com (John Mosby) Date: Mon, 30 Mar 2009 11:23:38 -0600 Subject: [llvm-commits] [llvm] r68023 - /llvm/trunk/docs/TestingGuide.html In-Reply-To: <17C222A8-8566-478A-A274-66E082256A19@apple.com> References: <200903300437.n2U4bsT6002346@zion.cs.uiuc.edu> <17C222A8-8566-478A-A274-66E082256A19@apple.com> Message-ID: <645d868c0903301023n25c412aic8f269c9da916711@mail.gmail.com> On Mon, Mar 30, 2009 at 10:49 AM, Dan Gohman wrote: > > Hi John, > > > > > ====================================================================== > > --- llvm/trunk/docs/TestingGuide.html (original) > > +++ llvm/trunk/docs/TestingGuide.html Sun Mar 29 23:37:51 2009 > > @@ -695,12 +695,14 @@ > > > >

    First, all tests are executed within the LLVM object directory > > tree. They > > are not executed inside of the LLVM source tree. This is > > because the > > -test suite creates temporary files during execution.

    > > +test suite creates temporary files during execution. This means you > > must create > > +a build tree separate from the LLVM source tree in which to run the > > test suite.

    > > Is this true? Is it not possible to run the test-suite in srdir == > objdir mode > when it is run from projects/test-suite? I followed what appeared to be the original process description which starts off saying that tests are run from within the object (build) directory rather than the source tree. > In fact, there's a major problem with running the test-suite in > srcdir != objdir mode -- the objdir contains copies of the srcdir's > Makefiles, and the > copies are not updated after an svn update. Absolutely. I see now I confused things here. I run the test suite from within a build tree and I maintain consistency manually by removing old test results and re-configing in the build tree. I originally ran it from within my source tree but wanted to have more than one test area. Should the docs describe running from within the source tree only? > ... > > +
    [The Makefiles expect the test suite directory to be > > named either > > + test-suite or llvm-test. To be safe, use > > + test-suite as in the above svn command line.]

    > > The name "llvm-test" is a historical artifact. "test-suite" is the > preferred name currently. It would be better to avoid mentioning > "llvm-test" > here, to avoid confusion. I was unsure about that, I'll remove "llvm-test". Thanks for your help, John -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090330/6d5bbf87/attachment.html From anton at korobeynikov.info Mon Mar 30 12:37:05 2009 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Mon, 30 Mar 2009 21:37:05 +0400 Subject: [llvm-commits] [llvm] r68032 - in /llvm/trunk: include/llvm/Target/ELFTargetAsmInfo.h lib/Target/DarwinTargetAsmInfo.cpp lib/Target/ELFTargetAsmInfo.cpp lib/Target/TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.cpp In-Reply-To: <49D0FCDE.3010907@wxs.nl> References: <200903301527.n2UFRh8l008094@zion.cs.uiuc.edu> <49D0FCDE.3010907@wxs.nl> Message-ID: <1238434625.12734.45.camel@aslstation> Hi, Frits > Doesn't this last bit put data with both global and local relocations in > the section supposedly reserved for data with *only* local relocations? > (According to the comments you added in the previous commit) Nice catch! Thanks! -- With best regards, Anton Korobeynikov. Faculty of Mathematics & Mechanics, Saint Petersburg State University. From asl at math.spbu.ru Mon Mar 30 12:37:44 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 30 Mar 2009 17:37:44 -0000 Subject: [llvm-commits] [llvm] r68036 - /llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp Message-ID: <200903301737.n2UHbiFP013683@zion.cs.uiuc.edu> Author: asl Date: Mon Mar 30 12:37:43 2009 New Revision: 68036 URL: http://llvm.org/viewvc/llvm-project?rev=68036&view=rev Log: Fix thinko: put stuff with both global and local relocations into data.rel{.ro}, not .local Modified: llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp Modified: llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp?rev=68036&r1=68035&r2=68036&view=diff ============================================================================== --- llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp Mon Mar 30 12:37:43 2009 @@ -58,11 +58,11 @@ bool isConstant = GVar->isConstant(); unsigned Reloc = RelocBehaviour(); if (Reloc != Reloc::None && C->ContainsRelocations(Reloc)) - return (C->ContainsRelocations(Reloc::Local) ? + return (C->ContainsRelocations(Reloc::Global) ? (isConstant ? - SectionKind::DataRelROLocal : SectionKind::DataRelLocal) : + SectionKind::DataRelRO : SectionKind::DataRel) : (isConstant ? - SectionKind::DataRelRO : SectionKind::DataRel)); + SectionKind::DataRelROLocal : SectionKind::DataRelLocal)); } return Kind; From asl at math.spbu.ru Mon Mar 30 12:38:00 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 30 Mar 2009 17:38:00 -0000 Subject: [llvm-commits] [llvm] r68037 - /llvm/trunk/include/llvm/Constant.h Message-ID: <200903301738.n2UHc06u013706@zion.cs.uiuc.edu> Author: asl Date: Mon Mar 30 12:38:00 2009 New Revision: 68037 URL: http://llvm.org/viewvc/llvm-project?rev=68037&view=rev Log: Clearify local/global relocations wording Modified: llvm/trunk/include/llvm/Constant.h Modified: llvm/trunk/include/llvm/Constant.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constant.h?rev=68037&r1=68036&r2=68037&view=diff ============================================================================== --- llvm/trunk/include/llvm/Constant.h (original) +++ llvm/trunk/include/llvm/Constant.h Mon Mar 30 12:38:00 2009 @@ -19,6 +19,13 @@ namespace llvm { template class SmallVectorImpl; + /// If object contains references to other objects, then relocations are + /// usually required for emission of such object (especially in PIC mode). One + /// usually distinguishes local and global relocations. Local relocations are + /// made wrt objects in the same module and these objects have local (internal + /// or private) linkage. Global relocations are made wrt externally visible + /// objects. In most cases local relocations can be resolved via so-called + /// 'pre-link' technique. namespace Reloc { const unsigned None = 0; const unsigned Local = 1 << 0; ///< Local relocations are required @@ -70,7 +77,9 @@ bool canTrap() const; /// ContainsRelocations - Return true if the constant value contains - /// relocations which cannot be resolved at compile time. + /// relocations which cannot be resolved at compile time. Note that answer is + /// not exclusive: there can be possibility that relocations of other kind are + /// required as well. bool ContainsRelocations(unsigned Kind = Reloc::LocalOrGlobal) const; // Specialize get/setOperand for Constants as their operands are always From anton at korobeynikov.info Mon Mar 30 12:37:48 2009 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Mon, 30 Mar 2009 21:37:48 +0400 Subject: [llvm-commits] [llvm] r68004 - in /llvm/trunk: include/llvm/Constant.h lib/VMCore/Constants.cpp In-Reply-To: References: <200903291713.n2THDLls031259@zion.cs.uiuc.edu> Message-ID: <1238434668.12734.46.camel@aslstation> Hi Dan > Looking at the code, it appears the answer is linkage information. That's correct. Just local / non-local linkage. > Please mention this in a comment in Constant.h. Done! -- With best regards, Anton Korobeynikov. Faculty of Mathematics & Mechanics, Saint Petersburg State University. From mrs at apple.com Mon Mar 30 12:43:05 2009 From: mrs at apple.com (Mike Stump) Date: Mon, 30 Mar 2009 17:43:05 -0000 Subject: [llvm-commits] [llvm] r68038 - /llvm/trunk/Makefile Message-ID: <200903301743.n2UHh5o3013979@zion.cs.uiuc.edu> Author: mrs Date: Mon Mar 30 12:43:04 2009 New Revision: 68038 URL: http://llvm.org/viewvc/llvm-project?rev=68038&view=rev Log: Add ccc back for now. Modified: llvm/trunk/Makefile Modified: llvm/trunk/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile?rev=68038&r1=68037&r2=68038&view=diff ============================================================================== --- llvm/trunk/Makefile (original) +++ llvm/trunk/Makefile Mon Mar 30 12:43:04 2009 @@ -56,7 +56,7 @@ ifeq ($(MAKECMDGOALS),install-clang) DIRS := tools/clang/tools/driver tools/clang/tools/clang-cc \ - tools/clang/lib/Headers + tools/clang/lib/Headers tools/clang/tools/ccc OPTIONAL_DIRS := NO_INSTALL = 1 endif From dpatel at apple.com Mon Mar 30 13:34:48 2009 From: dpatel at apple.com (Devang Patel) Date: Mon, 30 Mar 2009 18:34:48 -0000 Subject: [llvm-commits] [llvm] r68047 - /llvm/trunk/lib/Analysis/AliasSetTracker.cpp Message-ID: <200903301834.n2UIYmnp016556@zion.cs.uiuc.edu> Author: dpatel Date: Mon Mar 30 13:34:47 2009 New Revision: 68047 URL: http://llvm.org/viewvc/llvm-project?rev=68047&view=rev Log: getEntryFor() may invalidate DenseMap iterator. Walking an invalidated iterator is not a good idea. Modified: llvm/trunk/lib/Analysis/AliasSetTracker.cpp Modified: llvm/trunk/lib/Analysis/AliasSetTracker.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasSetTracker.cpp?rev=68047&r1=68046&r2=68047&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/AliasSetTracker.cpp (original) +++ llvm/trunk/lib/Analysis/AliasSetTracker.cpp Mon Mar 30 13:34:47 2009 @@ -520,6 +520,7 @@ if (Entry.hasAliasSet()) return; // Already in the tracker! // Add it to the alias set it aliases... + I = PointerMap.find(From); AliasSet *AS = I->second->getAliasSet(*this); AS->addPointer(*this, Entry, I->second->getSize(), true); } From lattner at apple.com Mon Mar 30 13:35:54 2009 From: lattner at apple.com (Tanya Lattner) Date: Mon, 30 Mar 2009 11:35:54 -0700 Subject: [llvm-commits] [llvm] r68023 - /llvm/trunk/docs/TestingGuide.html In-Reply-To: <17C222A8-8566-478A-A274-66E082256A19@apple.com> References: <200903300437.n2U4bsT6002346@zion.cs.uiuc.edu> <17C222A8-8566-478A-A274-66E082256A19@apple.com> Message-ID: <673D9F82-6ABF-4BE8-92A7-6E3B9B34F396@apple.com> On Mar 30, 2009, at 9:49 AM, Dan Gohman wrote: > > On Mar 29, 2009, at 9:37 PM, John Mosby wrote: > >> Author: jdm >> Date: Sun Mar 29 23:37:51 2009 >> New Revision: 68023 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=68023&view=rev >> Log: >> Clarify section on setting up and running test-suite >> >> Modified: >> llvm/trunk/docs/TestingGuide.html >> >> Modified: llvm/trunk/docs/TestingGuide.html >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/TestingGuide.html?rev=68023&r1=68022&r2=68023&view=diff > > Hi John, > >> >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm/trunk/docs/TestingGuide.html (original) >> +++ llvm/trunk/docs/TestingGuide.html Sun Mar 29 23:37:51 2009 >> @@ -695,12 +695,14 @@ >> >>

    First, all tests are executed within the LLVM object directory >> tree. They >> are not executed inside of the LLVM source tree. This is >> because the >> -test suite creates temporary files during execution.

    >> +test suite creates temporary files during execution. This means you >> must create >> +a build tree separate from the LLVM source tree in which to run the >> test suite.

    > > Is this true? Is it not possible to run the test-suite in srdir == > objdir mode > when it is run from projects/test-suite? > This is NOT true. I test this every single time I do a release (srcdir=objdir). Please undo this change to the documentation. -Tanya > In fact, there's a major problem with running the test-suite in > srcdir != objdir > mode -- the objdir contains copies of the srcdir's Makefiles, and the > copies > are not updated after an svn update. > >> >> >>

    To run the test suite, you need to use the following steps:

    >> >>
      >> -
    1. cd into the llvm/projects directory
      2. >> +
    2. cd into the llvm/projects directory in your >> source tree. >> +
      3. >> >>

    3. Check out the test-suite module with:

      >> >> @@ -709,24 +711,35 @@ >> % svn co http://llvm.org/svn/llvm-project/test-suite/trunk test-suite >> >> >> - >> -

      This will get the test suite into llvm/projects/llvm- >> test

      >> - >> -

    4. Configure the test suite using llvm configure. This will >> automatically >> - configure test-suite. You must do it from the top level >> otherwise llvm-gcc >> - will not be set which is required to run llvm-test:

      >> +

      This will get the test suite into llvm/projects/test- >> suite. >> +
      [The Makefiles expect the test suite directory to be >> named either >> + test-suite or llvm-test. To be safe, use >> + test-suite as in the above svn command line.]

      > > The name "llvm-test" is a historical artifact. "test-suite" is the > preferred > name currently. It would be better to avoid mentioning "llvm-test" > here, > to avoid confusion. > > Dan > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090330/f2612597/attachment.html From brukman at gmail.com Mon Mar 30 13:36:20 2009 From: brukman at gmail.com (Misha Brukman) Date: Mon, 30 Mar 2009 14:36:20 -0400 Subject: [llvm-commits] [llvm] r67849 - /llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll In-Reply-To: <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> References: <200903271617.n2RGHboQ032209@zion.cs.uiuc.edu> <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> Message-ID: On Mon, Mar 30, 2009 at 10:55 AM, Dan Gohman wrote: > >> --- llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll (original) > >> +++ llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll Fri Mar 27 > >> 11:17:22 2009 > >> @@ -1,4 +1,4 @@ > >> -; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep store > >> +; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep {= store} > > > > I thought that "store" instructions were never assigned to a > > variable... > > This test is grepping through the -debug output of llc, and the stores > its > looking for do happen to be printed with =. > > Grepping through -debug output isn't very nice in any case, but at the > moment there aren't any better ways to express this specific test. > You can write a unittest to check this. It might require some refactoring to be able to run all of LLC's passes separately from running the tool on the command line, since they are currently hard-coded in its main() function. Let me know if you run into any issues with writing the tests. Misha -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090330/cafe1717/attachment.html From bob.wilson at apple.com Mon Mar 30 13:49:37 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Mon, 30 Mar 2009 18:49:37 -0000 Subject: [llvm-commits] [llvm] r68050 - /llvm/trunk/lib/Target/ARM/ARMAddressingModes.h Message-ID: <200903301849.n2UInb6n017095@zion.cs.uiuc.edu> Author: bwilson Date: Mon Mar 30 13:49:37 2009 New Revision: 68050 URL: http://llvm.org/viewvc/llvm-project?rev=68050&view=rev Log: Fix comment to match function name. Modified: llvm/trunk/lib/Target/ARM/ARMAddressingModes.h Modified: llvm/trunk/lib/Target/ARM/ARMAddressingModes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAddressingModes.h?rev=68050&r1=68049&r2=68050&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMAddressingModes.h (original) +++ llvm/trunk/lib/Target/ARM/ARMAddressingModes.h Mon Mar 30 13:49:37 2009 @@ -131,7 +131,7 @@ static inline unsigned getSOImmValImm(unsigned Imm) { return Imm & 0xFF; } - /// getSOImmValRotate - Given an encoded imm field for the reg/imm form, return + /// getSOImmValRot - Given an encoded imm field for the reg/imm form, return /// the rotate amount. static inline unsigned getSOImmValRot(unsigned Imm) { return (Imm >> 8) * 2; From gohman at apple.com Mon Mar 30 13:49:16 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 30 Mar 2009 11:49:16 -0700 Subject: [llvm-commits] [llvm] r68037 - /llvm/trunk/include/llvm/Constant.h In-Reply-To: <200903301738.n2UHc06u013706@zion.cs.uiuc.edu> References: <200903301738.n2UHc06u013706@zion.cs.uiuc.edu> Message-ID: <561A08B8-7A46-42F5-AAFD-D8293EC94E08@apple.com> On Mar 30, 2009, at 10:38 AM, Anton Korobeynikov wrote: > Author: asl > Date: Mon Mar 30 12:38:00 2009 > New Revision: 68037 > > URL: http://llvm.org/viewvc/llvm-project?rev=68037&view=rev > Log: > Clearify local/global relocations wording > > Modified: > llvm/trunk/include/llvm/Constant.h > > Modified: llvm/trunk/include/llvm/Constant.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constant.h?rev=68037&r1=68036&r2=68037&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/include/llvm/Constant.h (original) > +++ llvm/trunk/include/llvm/Constant.h Mon Mar 30 12:38:00 2009 > @@ -19,6 +19,13 @@ > namespace llvm { > template class SmallVectorImpl; > > + /// If object contains references to other objects, then > relocations are > + /// usually required for emission of such object (especially in > PIC mode). One > + /// usually distinguishes local and global relocations. Local > relocations are > + /// made wrt objects in the same module and these objects have > local (internal > + /// or private) linkage. Global relocations are made wrt > externally visible > + /// objects. In most cases local relocations can be resolved via > so-called > + /// 'pre-link' technique. Thanks for adding this. This is still a little unclear to me though, however it may just be wording now. The phrase "objects in the same module" seems either redundant or contradictory. The rest of the comment seems to support that it's redundant. However, many optimizations that apply to symbols with internal and private linkage also apply to symbols with hidden or protected visibility and a definition in the same module, so the intent here isn't clear. Thanks, Dan From ojomojo at gmail.com Mon Mar 30 13:56:53 2009 From: ojomojo at gmail.com (John Mosby) Date: Mon, 30 Mar 2009 18:56:53 -0000 Subject: [llvm-commits] [llvm] r68051 - /llvm/trunk/docs/TestingGuide.html Message-ID: <200903301856.n2UIurNQ017438@zion.cs.uiuc.edu> Author: jdm Date: Mon Mar 30 13:56:53 2009 New Revision: 68051 URL: http://llvm.org/viewvc/llvm-project?rev=68051&view=rev Log: docs/TestingGuide.html: correction to prev. text (objdir!=srcdir required for running test-suite), removed refs to llvm-test Modified: llvm/trunk/docs/TestingGuide.html Modified: llvm/trunk/docs/TestingGuide.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/TestingGuide.html?rev=68051&r1=68050&r2=68051&view=diff ============================================================================== --- llvm/trunk/docs/TestingGuide.html (original) +++ llvm/trunk/docs/TestingGuide.html Mon Mar 30 13:56:53 2009 @@ -695,8 +695,7 @@

      First, all tests are executed within the LLVM object directory tree. They are not executed inside of the LLVM source tree. This is because the -test suite creates temporary files during execution. This means you must create -a build tree separate from the LLVM source tree in which to run the test suite.

      +test suite creates temporary files during execution.

      To run the test suite, you need to use the following steps:

      @@ -711,13 +710,10 @@ % svn co http://llvm.org/svn/llvm-project/test-suite/trunk test-suite -

      This will get the test suite into llvm/projects/test-suite. -
      [The Makefiles expect the test suite directory to be named either - test-suite or llvm-test. To be safe, use - test-suite as in the above svn command line.]

      +

      This will get the test suite into llvm/projects/test-suite.

    5. Configure llvm from the top level of each build tree (LLVM object directory tree) - in which you want to run the test suite, just like what you do before building LLVM.

      + in which you want to run the test suite, just as you do before building LLVM.

      When running configure, you must either: (1) have llvm-gcc in your path, or (2) specify the directory where llvm-gcc is installed using --with-llvmgccdir=$LLVM_GCC_DIR.

      From anton at korobeynikov.info Mon Mar 30 14:31:44 2009 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Mon, 30 Mar 2009 23:31:44 +0400 Subject: [llvm-commits] [llvm] r68037 - /llvm/trunk/include/llvm/Constant.h In-Reply-To: <561A08B8-7A46-42F5-AAFD-D8293EC94E08@apple.com> References: <200903301738.n2UHc06u013706@zion.cs.uiuc.edu> <561A08B8-7A46-42F5-AAFD-D8293EC94E08@apple.com> Message-ID: Hi, Dan > The rest of the comment seems to support that it's > redundant. However, many optimizations that apply to > symbols with internal and private linkage also apply to > symbols with hidden or protected visibility and a > definition in the same module, so the intent here > isn't clear. Here I tried to mimic gcc's behaviour. It does not check for visibility at all during computation of relocations. I don't know for sure, whether adding visibility stuff here would break things or not, that's why I tried to be as conservative as possible. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From clattner at apple.com Mon Mar 30 14:52:24 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 30 Mar 2009 12:52:24 -0700 Subject: [llvm-commits] [llvm] r67849 - /llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll In-Reply-To: References: <200903271617.n2RGHboQ032209@zion.cs.uiuc.edu> <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> Message-ID: On Mar 30, 2009, at 11:36 AM, Misha Brukman wrote: > >> @@ -1,4 +1,4 @@ > >> -; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep store > >> +; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep {= > store} > > > > I thought that "store" instructions were never assigned to a > > variable... > > This test is grepping through the -debug output of llc, and the stores > its > looking for do happen to be printed with =. > > Grepping through -debug output isn't very nice in any case, but at the > moment there aren't any better ways to express this specific test. > > You can write a unittest to check this. It might require some > refactoring to be able to run all of LLC's passes separately from > running the tool on the command line, since they are currently hard- > coded in its main() function. I don't think we want unit tests for passes. We only want unit tests for low level APIs. -Chris -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090330/788ed9c4/attachment.html From gohman at apple.com Mon Mar 30 14:59:02 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 30 Mar 2009 19:59:02 -0000 Subject: [llvm-commits] [llvm] r68053 - /llvm/trunk/utils/llvm.grm Message-ID: <200903301959.n2UJx2Ju019793@zion.cs.uiuc.edu> Author: djg Date: Mon Mar 30 14:59:02 2009 New Revision: 68053 URL: http://llvm.org/viewvc/llvm-project?rev=68053&view=rev Log: Update the polygen grammer to reflect that zext and sext are no longer valid argument attributes (zeroext and signext are). Modified: llvm/trunk/utils/llvm.grm Modified: llvm/trunk/utils/llvm.grm URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/llvm.grm?rev=68053&r1=68052&r2=68053&view=diff ============================================================================== --- llvm/trunk/utils/llvm.grm (original) +++ llvm/trunk/utils/llvm.grm Mon Mar 30 14:59:02 2009 @@ -130,9 +130,7 @@ cc EUINT64VAL ; ParamAttr ::= zeroext - | zext | signext - | sext | inreg | sret | noalias From gohman at apple.com Mon Mar 30 15:06:29 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 30 Mar 2009 20:06:29 -0000 Subject: [llvm-commits] [llvm] r68054 - in /llvm/trunk: include/llvm/CodeGen/MachineBasicBlock.h lib/CodeGen/MachineBasicBlock.cpp Message-ID: <200903302006.n2UK6TNa020184@zion.cs.uiuc.edu> Author: djg Date: Mon Mar 30 15:06:29 2009 New Revision: 68054 URL: http://llvm.org/viewvc/llvm-project?rev=68054&view=rev Log: Constify arguments in isSuccessor and isLayoutSuccessor. Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=68054&r1=68053&r2=68054&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Mon Mar 30 15:06:29 2009 @@ -239,14 +239,14 @@ /// isSuccessor - Return true if the specified MBB is a successor of this /// block. - bool isSuccessor(MachineBasicBlock *MBB) const; + bool isSuccessor(const MachineBasicBlock *MBB) const; /// isLayoutSuccessor - Return true if the specified MBB will be emitted /// immediately after this block, such that if this block exits by /// falling through, control will transfer to the specified MBB. Note /// that MBB need not be a successor at all, for example if this block /// ends with an unconditional branch to some other block. - bool isLayoutSuccessor(MachineBasicBlock *MBB) const; + bool isLayoutSuccessor(const MachineBasicBlock *MBB) const; /// getFirstTerminator - returns an iterator to the first terminator /// instruction of this basic block. If a terminator does not exist, Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=68054&r1=68053&r2=68054&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Mon Mar 30 15:06:29 2009 @@ -248,13 +248,13 @@ fromMBB->removeSuccessor(fromMBB->succ_begin()); } -bool MachineBasicBlock::isSuccessor(MachineBasicBlock *MBB) const { +bool MachineBasicBlock::isSuccessor(const MachineBasicBlock *MBB) const { std::vector::const_iterator I = std::find(Successors.begin(), Successors.end(), MBB); return I != Successors.end(); } -bool MachineBasicBlock::isLayoutSuccessor(MachineBasicBlock *MBB) const { +bool MachineBasicBlock::isLayoutSuccessor(const MachineBasicBlock *MBB) const { MachineFunction::const_iterator I(this); return next(I) == MachineFunction::const_iterator(MBB); } From sabre at nondot.org Mon Mar 30 15:28:50 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 30 Mar 2009 20:28:50 -0000 Subject: [llvm-commits] [llvm] r68055 - /llvm/trunk/include/llvm/ADT/PointerIntPair.h Message-ID: <200903302028.n2UKSoAb021308@zion.cs.uiuc.edu> Author: lattner Date: Mon Mar 30 15:28:50 2009 New Revision: 68055 URL: http://llvm.org/viewvc/llvm-project?rev=68055&view=rev Log: fix the PointerLikeTypeTraits specialization for PointerIntPair to allow the traits to be specified as well. Modified: llvm/trunk/include/llvm/ADT/PointerIntPair.h Modified: llvm/trunk/include/llvm/ADT/PointerIntPair.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/PointerIntPair.h?rev=68055&r1=68054&r2=68055&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/PointerIntPair.h (original) +++ llvm/trunk/include/llvm/ADT/PointerIntPair.h Mon Mar 30 15:28:50 2009 @@ -125,8 +125,10 @@ }; // Teach SmallPtrSet that PointerIntPair is "basically a pointer". -template -class PointerLikeTypeTraits > { +template +class PointerLikeTypeTraits > { public: static inline void * getAsVoidPointer(const PointerIntPair &P) { From sabre at nondot.org Mon Mar 30 15:29:27 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 30 Mar 2009 20:29:27 -0000 Subject: [llvm-commits] [llvm] r68056 - /llvm/trunk/include/llvm/ADT/PointerUnion.h Message-ID: <200903302029.n2UKTSRl021342@zion.cs.uiuc.edu> Author: lattner Date: Mon Mar 30 15:29:27 2009 New Revision: 68056 URL: http://llvm.org/viewvc/llvm-project?rev=68056&view=rev Log: add a PointerUnion3 class and generalize PointerUnion to work with anything pointer-like, which may or may not actually be a pointer. Modified: llvm/trunk/include/llvm/ADT/PointerUnion.h Modified: llvm/trunk/include/llvm/ADT/PointerUnion.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/PointerUnion.h?rev=68056&r1=68055&r2=68056&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/PointerUnion.h (original) +++ llvm/trunk/include/llvm/ADT/PointerUnion.h Mon Mar 30 15:29:27 2009 @@ -22,12 +22,11 @@ /// getPointerUnionTypeNum - If the argument has type PT1* or PT2* return /// false or true respectively. template - static inline bool getPointerUnionTypeNum(PT1 *P) { return false; } + static inline int getPointerUnionTypeNum(PT1 *P) { return 0; } template - static inline bool getPointerUnionTypeNum(PT2 *P) { return true; } - // Enable, if we could use static_assert. - //template - //static inline bool getPointerUnionTypeNum(...) { abort() } + static inline int getPointerUnionTypeNum(PT2 *P) { return 1; } + template + static inline int getPointerUnionTypeNum(...) { return -1; } /// Provide PointerLikeTypeTraits for void* that is used by PointerUnion @@ -70,22 +69,25 @@ PointerUnion() {} PointerUnion(PT1 V) { - Val.setPointer(V); + Val.setPointer(PointerLikeTypeTraits::getAsVoidPointer(V)); Val.setInt(0); } PointerUnion(PT2 V) { - Val.setPointer(V); + Val.setPointer(PointerLikeTypeTraits::getAsVoidPointer(V)); Val.setInt(1); } /// isNull - Return true if the pointer help in the union is null, /// regardless of which type it is. bool isNull() const { return Val.getPointer() == 0; } - + operator bool() const { return !isNull(); } + /// is() return true if the Union currently holds the type matching T. template int is() const { - return Val.getInt() == ::llvm::getPointerUnionTypeNum((T*)0); + int TyNo = ::llvm::getPointerUnionTypeNum((T*)0); + assert(TyNo != -1 && "Type query could never succeed on PointerUnion!"); + return Val.getInt() == TyNo; } /// get() - Return the value of the specified pointer type. If the @@ -93,26 +95,26 @@ template T get() const { assert(is() && "Invalid accessor called"); - return static_cast(Val.getPointer()); + return PointerLikeTypeTraits::getFromVoidPointer(Val.getPointer()); } /// dyn_cast() - If the current value is of the specified pointer type, /// return it, otherwise return null. template T dyn_cast() const { - if (is()) return static_cast(Val.getPointer()); + if (is()) return get(); return T(); } /// Assignment operators - Allow assigning into this union from either /// pointer type, setting the discriminator to remember what it came from. const PointerUnion &operator=(const PT1 &RHS) { - Val.setPointer(RHS); + Val.setPointer(PointerLikeTypeTraits::getAsVoidPointer(RHS)); Val.setInt(0); return *this; } const PointerUnion &operator=(const PT2 &RHS) { - Val.setPointer(RHS); + Val.setPointer(PointerLikeTypeTraits::getAsVoidPointer(RHS)); Val.setInt(1); return *this; } @@ -125,7 +127,7 @@ } }; - // Teach SmallPtrSet that PointerIntPair is "basically a pointer", that has + // Teach SmallPtrSet that PointerUnion is "basically a pointer", that has // # low bits available = min(PT1bits,PT2bits)-1. template class PointerLikeTypeTraits > { @@ -142,7 +144,110 @@ // The number of bits available are the min of the two pointer types. enum { NumLowBitsAvailable = - PointerUnion::ValTy::NumLowBitsAvailable + PointerLikeTypeTraits::ValTy> + ::NumLowBitsAvailable + }; + }; + + + /// PointerUnion3 - This is a pointer union of three pointer types. See + /// documentation for PointerUnion for usage. + template + class PointerUnion3 { + public: + typedef PointerUnion InnerUnion; + typedef PointerUnion ValTy; + private: + ValTy Val; + public: + PointerUnion3() {} + + PointerUnion3(PT1 V) { + Val = InnerUnion(V); + } + PointerUnion3(PT2 V) { + Val = InnerUnion(V); + } + PointerUnion3(PT3 V) { + Val = V; + } + + /// isNull - Return true if the pointer help in the union is null, + /// regardless of which type it is. + bool isNull() const { return Val.isNull(); } + operator bool() const { return !isNull(); } + + /// is() return true if the Union currently holds the type matching T. + template + int is() const { + // Is it PT1/PT2? + if (::llvm::getPointerUnionTypeNum((T*)0) != -1) + return Val.get().is(); + // Must be PT3 or statically invalid. + assert(Val.is()); + return true; + } + + /// get() - Return the value of the specified pointer type. If the + /// specified pointer type is incorrect, assert. + template + T get() const { + assert(is() && "Invalid accessor called"); + if (Val.is()) + return Val.get(); + return Val.get().get(); + } + + /// dyn_cast() - If the current value is of the specified pointer type, + /// return it, otherwise return null. + template + T dyn_cast() const { + if (is()) return get(); + return T(); + } + + /// Assignment operators - Allow assigning into this union from either + /// pointer type, setting the discriminator to remember what it came from. + const PointerUnion3 &operator=(const PT1 &RHS) { + Val = InnerUnion(RHS); + return *this; + } + const PointerUnion3 &operator=(const PT2 &RHS) { + Val = InnerUnion(RHS); + return *this; + } + const PointerUnion3 &operator=(const PT3 &RHS) { + Val = RHS; + return *this; + } + + void *getOpaqueValue() const { return Val.getOpaqueValue(); } + static PointerUnion3 getFromOpaqueValue(void *VP) { + PointerUnion3 V; + V.Val = ValTy::getFromOpaqueValue(VP); + return V; + } + }; + + // Teach SmallPtrSet that PointerUnion3 is "basically a pointer", that has + // # low bits available = min(PT1bits,PT2bits,PT2bits)-2. + template + class PointerLikeTypeTraits > { + public: + static inline void * + getAsVoidPointer(const PointerUnion3 &P) { + return P.getOpaqueValue(); + } + static inline PointerUnion3 + getFromVoidPointer(void *P) { + return PointerUnion3::getFromOpaqueValue(P); + } + + // The number of bits available are the min of the two pointer types. + enum { + NumLowBitsAvailable = + PointerLikeTypeTraits::ValTy> + ::NumLowBitsAvailable }; }; } From isanbard at gmail.com Mon Mar 30 15:30:02 2009 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 30 Mar 2009 20:30:02 -0000 Subject: [llvm-commits] [llvm] r68057 - /llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Message-ID: <200903302030.n2UKU2Lb021389@zion.cs.uiuc.edu> Author: void Date: Mon Mar 30 15:30:02 2009 New Revision: 68057 URL: http://llvm.org/viewvc/llvm-project?rev=68057&view=rev Log: Fix grammar-o in comment. Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=68057&r1=68056&r2=68057&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Mon Mar 30 15:30:02 2009 @@ -1746,7 +1746,7 @@ // vr1024 = op // = vr1025 // Even though vr1025 is copied from vr1024, it's not safe to - // coalesced them since live range of vr1025 intersects the + // coalesce them since the live range of vr1025 intersects the // def of vr1024. This happens because vr1025 is assigned the // value of the previous iteration of vr1024. return false; From isanbard at gmail.com Mon Mar 30 15:32:22 2009 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 30 Mar 2009 20:32:22 -0000 Subject: [llvm-commits] [llvm] r68059 - /llvm/trunk/lib/CodeGen/Spiller.cpp Message-ID: <200903302032.n2UKWMtq021527@zion.cs.uiuc.edu> Author: void Date: Mon Mar 30 15:32:22 2009 New Revision: 68059 URL: http://llvm.org/viewvc/llvm-project?rev=68059&view=rev Log: Balance out quote in debug output. Modified: llvm/trunk/lib/CodeGen/Spiller.cpp Modified: llvm/trunk/lib/CodeGen/Spiller.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/Spiller.cpp?rev=68059&r1=68058&r2=68059&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/Spiller.cpp (original) +++ llvm/trunk/lib/CodeGen/Spiller.cpp Mon Mar 30 15:32:22 2009 @@ -906,7 +906,7 @@ AvailableSpills &Spills, BitVector &RegKills, std::vector &KillOps) { DOUT << "\n**** Local spiller rewriting MBB '" - << MBB.getBasicBlock()->getName() << ":\n"; + << MBB.getBasicBlock()->getName() << "':\n"; MachineFunction &MF = *MBB.getParent(); From brukman at gmail.com Mon Mar 30 15:34:59 2009 From: brukman at gmail.com (Misha Brukman) Date: Mon, 30 Mar 2009 16:34:59 -0400 Subject: [llvm-commits] [llvm] r67849 - /llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll In-Reply-To: References: <200903271617.n2RGHboQ032209@zion.cs.uiuc.edu> <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> Message-ID: On Mon, Mar 30, 2009 at 3:52 PM, Chris Lattner wrote: > On Mar 30, 2009, at 11:36 AM, Misha Brukman wrote: > > >> @@ -1,4 +1,4 @@ >> >> -; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep store >> >> +; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep {= store} >> > >> > I thought that "store" instructions were never assigned to a >> > variable... >> >> This test is grepping through the -debug output of llc, and the stores >> its >> looking for do happen to be printed with =. >> >> Grepping through -debug output isn't very nice in any case, but at the >> moment there aren't any better ways to express this specific test. >> > > You can write a unittest to check this. It might require some refactoring > to be able to run all of LLC's passes separately from running the tool on > the command line, since they are currently hard-coded in its main() > function. > > I don't think we want unit tests for passes. We only want unit tests for > low level APIs. > Let's drop the term "unit" and just call them tests. I'm proposing we test passes in C++ instead of a shell script that calls grep. How else can we check the correctness of a pass, which involves pattern-matching multiple instructions? Grep can only look at a single line at a time, and doesn't have the semantic knowledge of what's an instruction and what's an operand, whereas we have all this information in C++. This thread also shows how brittle shell scripts are for testing pass output, which shouldn't be the case for the LLVM C++ API. Misha -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090330/856c5e86/attachment.html From sabre at nondot.org Mon Mar 30 15:44:07 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 30 Mar 2009 20:44:07 -0000 Subject: [llvm-commits] [llvm] r68060 - /llvm/trunk/include/llvm/ADT/PointerUnion.h Message-ID: <200903302044.n2UKi7td022105@zion.cs.uiuc.edu> Author: lattner Date: Mon Mar 30 15:44:04 2009 New Revision: 68060 URL: http://llvm.org/viewvc/llvm-project?rev=68060&view=rev Log: update comment. Modified: llvm/trunk/include/llvm/ADT/PointerUnion.h Modified: llvm/trunk/include/llvm/ADT/PointerUnion.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/PointerUnion.h?rev=68060&r1=68059&r2=68060&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/PointerUnion.h (original) +++ llvm/trunk/include/llvm/ADT/PointerUnion.h Mon Mar 30 15:44:04 2009 @@ -54,7 +54,7 @@ /// printf("%d %d", P.is(), P.is()); // prints "1 0" /// X = P.get(); // ok. /// Y = P.get(); // runtime assertion failure. - /// Z = P.get(); // does not compile. + /// Z = P.get(); // runtime assertion failure (regardless of tag) /// P = (float*)0; /// Y = P.get(); // ok. /// X = P.get(); // runtime assertion failure. From evan.cheng at apple.com Mon Mar 30 16:34:12 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 30 Mar 2009 21:34:12 -0000 Subject: [llvm-commits] [llvm] r68065 - in /llvm/trunk: lib/CodeGen/TwoAddressInstructionPass.cpp test/CodeGen/X86/inline-asm-2addr.ll Message-ID: <200903302134.n2ULYCoN024377@zion.cs.uiuc.edu> Author: evancheng Date: Mon Mar 30 16:34:07 2009 New Revision: 68065 URL: http://llvm.org/viewvc/llvm-project?rev=68065&view=rev Log: Turn a 2-address instruction into a 3-address one when it's profitable even if the two-address operand is killed. e.g. %reg1024 = MOV r1 %reg1025 = ADD %reg1024, %reg1026 r0 = MOV %reg1025 If it's not possible / profitable to commute ADD, then turning ADD into a LEA saves a copy. Modified: llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp llvm/trunk/test/CodeGen/X86/inline-asm-2addr.ll Modified: llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp?rev=68065&r1=68064&r2=68065&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp (original) +++ llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp Mon Mar 30 16:34:07 2009 @@ -96,6 +96,13 @@ MachineFunction::iterator &mbbi, unsigned RegB, unsigned RegC, unsigned Dist); + bool isProfitableToConv3Addr(unsigned RegA); + + bool ConvertInstTo3Addr(MachineBasicBlock::iterator &mi, + MachineBasicBlock::iterator &nmi, + MachineFunction::iterator &mbbi, + unsigned RegB, unsigned Dist); + void ProcessCopy(MachineInstr *MI, MachineBasicBlock *MBB, SmallPtrSet &Processed); public: @@ -334,7 +341,9 @@ /// as a two-address use. If so, return the destination register by reference. static bool isTwoAddrUse(MachineInstr &MI, unsigned Reg, unsigned &DstReg) { const TargetInstrDesc &TID = MI.getDesc(); - for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) { + unsigned NumOps = (MI.getOpcode() == TargetInstrInfo::INLINEASM) + ? MI.getNumOperands() : TID.getNumOperands(); + for (unsigned i = 0; i != NumOps; ++i) { const MachineOperand &MO = MI.getOperand(i); if (!MO.isReg() || !MO.isUse() || MO.getReg() != Reg) continue; @@ -503,6 +512,53 @@ return true; } +/// isProfitableToConv3Addr - Return true if it is profitable to convert the +/// given 2-address instruction to a 3-address one. +bool +TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA) { + // Look for situations like this: + // %reg1024 = MOV r1 + // %reg1025 = MOV r0 + // %reg1026 = ADD %reg1024, %reg1025 + // r2 = MOV %reg1026 + // Turn ADD into a 3-address instruction to avoid a copy. + unsigned FromRegA = getMappedReg(RegA, SrcRegMap); + unsigned ToRegA = getMappedReg(RegA, DstRegMap); + return (FromRegA && ToRegA && !regsAreCompatible(FromRegA, ToRegA, TRI)); +} + +/// ConvertInstTo3Addr - Convert the specified two-address instruction into a +/// three address one. Return true if this transformation was successful. +bool +TwoAddressInstructionPass::ConvertInstTo3Addr(MachineBasicBlock::iterator &mi, + MachineBasicBlock::iterator &nmi, + MachineFunction::iterator &mbbi, + unsigned RegB, unsigned Dist) { + MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, LV); + if (NewMI) { + DOUT << "2addr: CONVERTING 2-ADDR: " << *mi; + DOUT << "2addr: TO 3-ADDR: " << *NewMI; + bool Sunk = false; + + if (NewMI->findRegisterUseOperand(RegB, false, TRI)) + // FIXME: Temporary workaround. If the new instruction doesn't + // uses RegB, convertToThreeAddress must have created more + // then one instruction. + Sunk = Sink3AddrInstruction(mbbi, NewMI, RegB, mi); + + mbbi->erase(mi); // Nuke the old inst. + + if (!Sunk) { + DistanceMap.insert(std::make_pair(NewMI, Dist)); + mi = NewMI; + nmi = next(mi); + } + return true; + } + + return false; +} + /// ProcessCopy - If the specified instruction is not yet processed, process it /// if it's a copy. For a copy instruction, we find the physical registers the /// source and destination registers might be mapped to. These are kept in @@ -716,26 +772,7 @@ assert(TID.getOperandConstraint(i, TOI::TIED_TO) == -1); #endif - MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, LV); - if (NewMI) { - DOUT << "2addr: CONVERTING 2-ADDR: " << *mi; - DOUT << "2addr: TO 3-ADDR: " << *NewMI; - bool Sunk = false; - - if (NewMI->findRegisterUseOperand(regB, false, TRI)) - // FIXME: Temporary workaround. If the new instruction doesn't - // uses regB, convertToThreeAddress must have created more - // then one instruction. - Sunk = Sink3AddrInstruction(mbbi, NewMI, regB, mi); - - mbbi->erase(mi); // Nuke the old inst. - - if (!Sunk) { - DistanceMap.insert(std::make_pair(NewMI, Dist)); - mi = NewMI; - nmi = next(mi); - } - + if (ConvertInstTo3Addr(mi, nmi, mbbi, regB, Dist)) { ++NumConvertedTo3Addr; break; // Done with this instruction. } @@ -750,9 +787,19 @@ ++NumAggrCommuted; ++NumCommuted; regB = regC; + goto InstructionRearranged; } } + // If it's profitable to convert the 2-address instruction to a + // 3-address one, do so. + if (TID.isConvertibleTo3Addr() && isProfitableToConv3Addr(regA)) { + if (ConvertInstTo3Addr(mi, nmi, mbbi, regB, Dist)) { + ++NumConvertedTo3Addr; + break; // Done with this instruction. + } + } + InstructionRearranged: const TargetRegisterClass* rc = MRI->getRegClass(regB); MachineInstr *DefMI = MRI->getVRegDef(regB); Modified: llvm/trunk/test/CodeGen/X86/inline-asm-2addr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-2addr.ll?rev=68065&r1=68064&r2=68065&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/inline-asm-2addr.ll (original) +++ llvm/trunk/test/CodeGen/X86/inline-asm-2addr.ll Mon Mar 30 16:34:07 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movq | count 1 +; RUN: llvm-as < %s | llc -march=x86-64 | not grep movq define i64 @t(i64 %a, i64 %b) nounwind ssp { entry: From evan.cheng at apple.com Mon Mar 30 16:36:48 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 30 Mar 2009 21:36:48 -0000 Subject: [llvm-commits] [llvm] r68066 - in /llvm/trunk/lib/Target/X86: X86ISelDAGToDAG.cpp X86ISelLowering.cpp X86ISelLowering.h X86Instr64bit.td X86InstrInfo.td Message-ID: <200903302136.n2ULanHc024467@zion.cs.uiuc.edu> Author: evancheng Date: Mon Mar 30 16:36:47 2009 New Revision: 68066 URL: http://llvm.org/viewvc/llvm-project?rev=68066&view=rev Log: When optimzing a mul by immediate into two, the resulting mul's should get a x86 specific node to avoid dag combiner from hacking on them further. Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h llvm/trunk/lib/Target/X86/X86Instr64bit.td llvm/trunk/lib/Target/X86/X86InstrInfo.td Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=68066&r1=68065&r2=68066&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Mar 30 16:36:47 2009 @@ -852,6 +852,7 @@ if (N.getResNo() != 0) break; // FALL THROUGH case ISD::MUL: + case X86ISD::MUL_IMM: // X*[3,5,9] -> X+X*[2,4,8] if (AM.BaseType == X86ISelAddressMode::RegBase && AM.Base.Reg.getNode() == 0 && Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=68066&r1=68065&r2=68066&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Mar 30 16:36:47 2009 @@ -7176,6 +7176,7 @@ case X86ISD::UMUL: return "X86ISD::UMUL"; case X86ISD::INC: return "X86ISD::INC"; case X86ISD::DEC: return "X86ISD::DEC"; + case X86ISD::MUL_IMM: return "X86ISD::MUL_IMM"; } } @@ -8458,14 +8459,14 @@ NewMul = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0), DAG.getConstant(Log2_64(MulAmt1), MVT::i8)); else - NewMul = DAG.getNode(ISD::MUL, DL, VT, N->getOperand(0), + NewMul = DAG.getNode(X86ISD::MUL_IMM, DL, VT, N->getOperand(0), DAG.getConstant(MulAmt1, VT)); if (isPowerOf2_64(MulAmt2)) NewMul = DAG.getNode(ISD::SHL, DL, VT, NewMul, DAG.getConstant(Log2_64(MulAmt2), MVT::i8)); else - NewMul = DAG.getNode(ISD::MUL, DL, VT, NewMul, + NewMul = DAG.getNode(X86ISD::MUL_IMM, DL, VT, NewMul, DAG.getConstant(MulAmt2, VT)); // Do not add new nodes to DAG combiner worklist. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=68066&r1=68065&r2=68066&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Mon Mar 30 16:36:47 2009 @@ -237,7 +237,10 @@ // ADD, SUB, SMUL, UMUL, etc. - Arithmetic operations with FLAGS results. ADD, SUB, SMUL, UMUL, - INC, DEC + INC, DEC, + + // MUL_IMM - X86 specific multiply by immediate. + MUL_IMM }; } Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=68066&r1=68065&r2=68066&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original) +++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Mon Mar 30 16:36:47 2009 @@ -36,8 +36,8 @@ // Complex Pattern Definitions. // def lea64addr : ComplexPattern; + [add, mul, X86mul_imm, shl, or, frameindex, X86Wrapper], + []>; //===----------------------------------------------------------------------===// // Pattern fragments. Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=68066&r1=68065&r2=68066&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Mon Mar 30 16:36:47 2009 @@ -157,6 +157,8 @@ def X86inc_flag : SDNode<"X86ISD::INC", SDTUnaryArithWithFlags>; def X86dec_flag : SDNode<"X86ISD::DEC", SDTUnaryArithWithFlags>; +def X86mul_imm : SDNode<"X86ISD::MUL_IMM", SDTIntBinOp>; + //===----------------------------------------------------------------------===// // X86 Operand Definitions. // From dgregor at apple.com Mon Mar 30 16:44:13 2009 From: dgregor at apple.com (Douglas Gregor) Date: Mon, 30 Mar 2009 21:44:13 -0000 Subject: [llvm-commits] [llvm] r68067 - /llvm/trunk/include/llvm/ADT/PointerUnion.h Message-ID: <200903302144.n2ULiDHC024748@zion.cs.uiuc.edu> Author: dgregor Date: Mon Mar 30 16:44:13 2009 New Revision: 68067 URL: http://llvm.org/viewvc/llvm-project?rev=68067&view=rev Log: Make PointerUnion3::get work properly Modified: llvm/trunk/include/llvm/ADT/PointerUnion.h Modified: llvm/trunk/include/llvm/ADT/PointerUnion.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/PointerUnion.h?rev=68067&r1=68066&r2=68067&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/PointerUnion.h (original) +++ llvm/trunk/include/llvm/ADT/PointerUnion.h Mon Mar 30 16:44:13 2009 @@ -193,9 +193,11 @@ template T get() const { assert(is() && "Invalid accessor called"); - if (Val.is()) - return Val.get(); - return Val.get().get(); + // Is it PT1/PT2? + if (::llvm::getPointerUnionTypeNum((T*)0) != -1) + return Val.get().get(); + + return Val.get(); } /// dyn_cast() - If the current value is of the specified pointer type, From dpatel at apple.com Mon Mar 30 17:24:10 2009 From: dpatel at apple.com (Devang Patel) Date: Mon, 30 Mar 2009 22:24:10 -0000 Subject: [llvm-commits] [llvm] r68071 - in /llvm/trunk: lib/Transforms/Scalar/LoopIndexSplit.cpp test/Transforms/LoopIndexSplit/2009-03-30-undef.ll Message-ID: <200903302224.n2UMOACE026181@zion.cs.uiuc.edu> Author: dpatel Date: Mon Mar 30 17:24:10 2009 New Revision: 68071 URL: http://llvm.org/viewvc/llvm-project?rev=68071&view=rev Log: Loop Index Split can eliminate a loop if it can determin if loop body is executed only once. There was a bug in determining IV based value of the iteration for which the loop body is executed. Fix it. Added: llvm/trunk/test/Transforms/LoopIndexSplit/2009-03-30-undef.ll Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=68071&r1=68070&r2=68071&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Mon Mar 30 17:24:10 2009 @@ -48,6 +48,7 @@ #include "llvm/Analysis/Dominators.h" #include "llvm/Transforms/Utils/BasicBlockUtils.h" #include "llvm/Transforms/Utils/Cloning.h" +#include "llvm/Transforms/Utils/Local.h" #include "llvm/Support/Compiler.h" #include "llvm/ADT/DepthFirstIterator.h" #include "llvm/ADT/Statistic.h" @@ -345,10 +346,25 @@ if (!L->isLoopInvariant(SplitValue)) return false; Instruction *OPI = dyn_cast(OPV); - if (!OPI) return false; + if (!OPI) + return false; if (OPI->getParent() != Header || isUsedOutsideLoop(OPI, L)) return false; - + Value *StartValue = IVStartValue; + Value *ExitValue = IVExitValue;; + + if (OPV != IndVar) { + // If BR operand is IV based then use this operand to calculate + // effective conditions for loop body. + BinaryOperator *BOPV = dyn_cast(OPV); + if (!BOPV) + return false; + if (BOPV->getOpcode() != Instruction::Add) + return false; + StartValue = BinaryOperator::CreateAdd(OPV, StartValue, "" , BR); + ExitValue = BinaryOperator::CreateAdd(OPV, ExitValue, "" , BR); + } + if (!cleanBlock(Header)) return false; @@ -399,13 +415,13 @@ // and i32 c1, c2 Instruction *C1 = new ICmpInst(ExitCondition->isSignedPredicate() ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE, - SplitValue, IVStartValue, "lisplit", BR); + SplitValue, StartValue, "lisplit", BR); CmpInst::Predicate C2P = ExitCondition->getPredicate(); BranchInst *LatchBR = cast(Latch->getTerminator()); if (LatchBR->getOperand(0) != Header) C2P = CmpInst::getInversePredicate(C2P); - Instruction *C2 = new ICmpInst(C2P, SplitValue, IVExitValue, "lisplit", BR); + Instruction *C2 = new ICmpInst(C2P, SplitValue, ExitValue, "lisplit", BR); Instruction *NSplitCond = BinaryOperator::CreateAnd(C1, C2, "lisplit", BR); SplitCondition->replaceAllUsesWith(NSplitCond); @@ -419,11 +435,11 @@ if (Header != *SI) LatchSucc = *SI; } - LatchBR->setUnconditionalDest(LatchSucc); - // Remove IVIncrement - IVIncrement->replaceAllUsesWith(UndefValue::get(IVIncrement->getType())); - IVIncrement->eraseFromParent(); + // Clean up latch block. + Value *LatchBRCond = LatchBR->getCondition(); + LatchBR->setUnconditionalDest(LatchSucc); + RecursivelyDeleteTriviallyDeadInstructions(LatchBRCond); LPM->deleteLoopFromQueue(L); Added: llvm/trunk/test/Transforms/LoopIndexSplit/2009-03-30-undef.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIndexSplit/2009-03-30-undef.ll?rev=68071&view=auto ============================================================================== --- llvm/trunk/test/Transforms/LoopIndexSplit/2009-03-30-undef.ll (added) +++ llvm/trunk/test/Transforms/LoopIndexSplit/2009-03-30-undef.ll Mon Mar 30 17:24:10 2009 @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | opt -loop-index-split | llvm-dis | not grep undef +define i32 @main() { +entry: + br label %header + +header: + %r = phi i32 [ 0, %entry ], [ %r3, %skip ] + %i = phi i32 [ 0, %entry ], [ %i1, %skip ] + %i99 = add i32 %i, 99 + %cond = icmp eq i32 %i99, 3 + br i1 %cond, label %body, label %skip + +body: + br label %skip + +skip: + %r3 = phi i32 [ %r, %header ], [ 3, %body ] + %i1 = add i32 %i, 1 + %exitcond = icmp eq i32 %i1, 10 + br i1 %exitcond, label %exit, label %header + +exit: + ret i32 %r3 +} From gohman at apple.com Mon Mar 30 17:55:18 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 30 Mar 2009 22:55:18 -0000 Subject: [llvm-commits] [llvm] r68073 - in /llvm/trunk: include/llvm/CodeGen/MachineBasicBlock.h lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Message-ID: <200903302255.n2UMtIQc027270@zion.cs.uiuc.edu> Author: djg Date: Mon Mar 30 17:55:17 2009 New Revision: 68073 URL: http://llvm.org/viewvc/llvm-project?rev=68073&view=rev Log: Except in asm-verbose mode, avoid printing labels for blocks that are only reachable via fall-through edges. This dramatically reduces the number of labels printed, and thus also the number of labels the assembler must parse and remember. Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=68073&r1=68072&r2=68073&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Mon Mar 30 17:55:17 2009 @@ -253,6 +253,15 @@ /// it returns end() iterator getFirstTerminator(); + /// isOnlyReachableViaFallthough - Return true if this basic block has + /// exactly one predecessor and the control transfer mechanism between + /// the predecessor and this block is a fall-through. + bool isOnlyReachableByFallthrough() const { + return !pred_empty() && + next(pred_begin()) == pred_end() && + (*pred_begin())->getFirstTerminator() == (*pred_begin())->end(); + } + void pop_front() { Insts.pop_front(); } void pop_back() { Insts.pop_back(); } void push_back(MachineInstr *MI) { Insts.push_back(MI); } Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=68073&r1=68072&r2=68073&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Mon Mar 30 17:55:17 2009 @@ -238,7 +238,12 @@ for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); I != E; ++I) { // Print a label for the basic block. - if (!I->pred_empty()) { + if (!VerboseAsm && (I->pred_empty() || I->isOnlyReachableByFallthrough())) { + // This is an entry block or a block that's only reachable via a + // fallthrough edge. In non-VerboseAsm mode, don't print the label. + assert((I->pred_empty() || (*I->pred_begin())->isLayoutSuccessor(I)) && + "Fall-through predecessor not adjacent to its successor!"); + } else { printBasicBlockLabel(I, true, true, VerboseAsm); O << '\n'; } From dgregor at apple.com Mon Mar 30 19:34:32 2009 From: dgregor at apple.com (Douglas Gregor) Date: Tue, 31 Mar 2009 00:34:32 -0000 Subject: [llvm-commits] [llvm] r68079 - /llvm/trunk/include/llvm/ADT/PointerUnion.h Message-ID: <200903310034.n2V0YWRB031269@zion.cs.uiuc.edu> Author: dgregor Date: Mon Mar 30 19:34:31 2009 New Revision: 68079 URL: http://llvm.org/viewvc/llvm-project?rev=68079&view=rev Log: Really, really fix PointerUnion3::is Modified: llvm/trunk/include/llvm/ADT/PointerUnion.h Modified: llvm/trunk/include/llvm/ADT/PointerUnion.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/PointerUnion.h?rev=68079&r1=68078&r2=68079&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/PointerUnion.h (original) +++ llvm/trunk/include/llvm/ADT/PointerUnion.h Mon Mar 30 19:34:31 2009 @@ -182,7 +182,7 @@ int is() const { // Is it PT1/PT2? if (::llvm::getPointerUnionTypeNum((T*)0) != -1) - return Val.get().is(); + return Val.is() && Val.get().is(); // Must be PT3 or statically invalid. assert(Val.is()); return true; From stuart at apple.com Mon Mar 30 19:39:26 2009 From: stuart at apple.com (Stuart Hastings) Date: Tue, 31 Mar 2009 00:39:26 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r68080 - /llvm-gcc-4.2/trunk/gcc/config/darwin.c Message-ID: <200903310039.n2V0dQmO031458@zion.cs.uiuc.edu> Author: stuart Date: Mon Mar 30 19:39:25 2009 New Revision: 68080 URL: http://llvm.org/viewvc/llvm-project?rev=68080&view=rev Log: Move ObjC CFString objects to a writable __DATA section under -fwritable-strings. Modified: llvm-gcc-4.2/trunk/gcc/config/darwin.c Modified: llvm-gcc-4.2/trunk/gcc/config/darwin.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/darwin.c?rev=68080&r1=68079&r2=68080&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/darwin.c (original) +++ llvm-gcc-4.2/trunk/gcc/config/darwin.c Mon Mar 30 19:39:25 2009 @@ -1760,7 +1760,11 @@ else return "__OBJC, __string_object,no_dead_strip"; } else if (!strcmp(IDENTIFIER_POINTER(typename), "__builtin_CFString")) { - return "__DATA, __cfstring"; + return +#ifdef LLVM_CONST_DATA_SECTION + (flag_writable_strings) ? LLVM_CONST_DATA_SECTION : +#endif + "__DATA, __cfstring"; } else { return 0; } From evan.cheng at apple.com Mon Mar 30 20:13:54 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 31 Mar 2009 01:13:54 -0000 Subject: [llvm-commits] [llvm] r68082 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Message-ID: <200903310113.n2V1DsSl032730@zion.cs.uiuc.edu> Author: evancheng Date: Mon Mar 30 20:13:53 2009 New Revision: 68082 URL: http://llvm.org/viewvc/llvm-project?rev=68082&view=rev Log: X86 address mode isel tweak. If the base of the address is also used by a CopyToReg (i.e. it's likely live-out), do not fold the sub-expressions into the addressing mode to avoid computing the address twice. The CopyToReg use will be isel'ed to a LEA, re-use it for address instead. This is not yet enabled. Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=68082&r1=68081&r2=68082&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Mar 30 20:13:53 2009 @@ -41,6 +41,9 @@ #include "llvm/ADT/Statistic.h" using namespace llvm; +#include "llvm/Support/CommandLine.h" +static cl::opt AvoidDupAddrCompute("x86-avoid-dup-address", cl::Hidden); + STATISTIC(NumLoadMoved, "Number of loads moved below TokenFactor"); //===----------------------------------------------------------------------===// @@ -1035,7 +1038,28 @@ SDValue &Scale, SDValue &Index, SDValue &Disp) { X86ISelAddressMode AM; - if (MatchAddress(N, AM)) + bool Done = false; + if (AvoidDupAddrCompute && !N.hasOneUse()) { + unsigned Opcode = N.getOpcode(); + if (Opcode != ISD::Constant && Opcode != ISD::FrameIndex && + Opcode != X86ISD::Wrapper) { + // If we are able to fold N into addressing mode, then we'll allow it even + // if N has multiple uses. In general, addressing computation is used as + // addresses by all of its uses. But watch out for CopyToReg uses, that + // means the address computation is liveout. It will be computed by a LEA + // so we want to avoid computing the address twice. + for (SDNode::use_iterator UI = N.getNode()->use_begin(), + UE = N.getNode()->use_end(); UI != UE; ++UI) { + if (UI->getOpcode() == ISD::CopyToReg) { + MatchAddressBase(N, AM, true, 0); + Done = true; + break; + } + } + } + } + + if (!Done && MatchAddress(N, AM)) return false; MVT VT = N.getValueType(); From gohman at apple.com Mon Mar 30 20:38:29 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 31 Mar 2009 01:38:29 -0000 Subject: [llvm-commits] [llvm] r68083 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp test/CodeGen/X86/live-out-reg-info.ll Message-ID: <200903310138.n2V1cTe2001172@zion.cs.uiuc.edu> Author: djg Date: Mon Mar 30 20:38:29 2009 New Revision: 68083 URL: http://llvm.org/viewvc/llvm-project?rev=68083&view=rev Log: Fix live-out reg logic to not insert over-aggressive AssertZExt instructions. This fixes lua. Added: llvm/trunk/test/CodeGen/X86/live-out-reg-info.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp?rev=68083&r1=68082&r2=68083&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Mon Mar 30 20:38:29 2009 @@ -4587,15 +4587,15 @@ isSExt = false, FromVT = MVT::i1; // ASSERT ZEXT 1 else if (NumSignBits > RegSize-8) isSExt = true, FromVT = MVT::i8; // ASSERT SEXT 8 - else if (NumZeroBits >= RegSize-9) + else if (NumZeroBits >= RegSize-8) isSExt = false, FromVT = MVT::i8; // ASSERT ZEXT 8 else if (NumSignBits > RegSize-16) isSExt = true, FromVT = MVT::i16; // ASSERT SEXT 16 - else if (NumZeroBits >= RegSize-17) + else if (NumZeroBits >= RegSize-16) isSExt = false, FromVT = MVT::i16; // ASSERT ZEXT 16 else if (NumSignBits > RegSize-32) isSExt = true, FromVT = MVT::i32; // ASSERT SEXT 32 - else if (NumZeroBits >= RegSize-33) + else if (NumZeroBits >= RegSize-32) isSExt = false, FromVT = MVT::i32; // ASSERT ZEXT 32 if (FromVT != MVT::Other) { Added: llvm/trunk/test/CodeGen/X86/live-out-reg-info.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/live-out-reg-info.ll?rev=68083&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/live-out-reg-info.ll (added) +++ llvm/trunk/test/CodeGen/X86/live-out-reg-info.ll Mon Mar 30 20:38:29 2009 @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep testl + +; Make sure dagcombine doesn't eliminate the comparison due +; to an off-by-one bug with ComputeMaskedBits information. + +declare void @qux() + +define void @foo(i32 %a) { + %t0 = lshr i32 %a, 23 + br label %next +next: + %t1 = and i32 %t0, 256 + %t2 = icmp eq i32 %t1, 0 + br i1 %t2, label %true, label %false +true: + call void @qux() + ret void +false: + ret void +} From clattner at apple.com Mon Mar 30 20:38:50 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 30 Mar 2009 18:38:50 -0700 Subject: [llvm-commits] [llvm] r68082 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp In-Reply-To: <200903310113.n2V1DsSl032730@zion.cs.uiuc.edu> References: <200903310113.n2V1DsSl032730@zion.cs.uiuc.edu> Message-ID: On Mar 30, 2009, at 6:13 PM, Evan Cheng wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=68082&view=rev > Log: > X86 address mode isel tweak. If the base of the address is also used > by a CopyToReg (i.e. it's likely live-out), do not fold the sub- > expressions into the addressing mode to avoid computing the address > twice. The CopyToReg use will be isel'ed to a LEA, re-use it for > address instead. Ok. > + for (SDNode::use_iterator UI = N.getNode()->use_begin(), > + UE = N.getNode()->use_end(); UI != UE; ++UI) { > + if (UI->getOpcode() == ISD::CopyToReg) { How about turning this into a "isUsedByCopyToRegNode" predicate? -Chris From sabre at nondot.org Tue Mar 31 02:25:23 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 31 Mar 2009 07:25:23 -0000 Subject: [llvm-commits] [llvm] r68087 - /llvm/trunk/include/llvm/Value.h Message-ID: <200903310725.n2V7PNdu012239@zion.cs.uiuc.edu> Author: lattner Date: Tue Mar 31 02:25:22 2009 New Revision: 68087 URL: http://llvm.org/viewvc/llvm-project?rev=68087&view=rev Log: shrink subclassid, liberating some bits for future (ab)use. Modified: llvm/trunk/include/llvm/Value.h Modified: llvm/trunk/include/llvm/Value.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Value.h?rev=68087&r1=68086&r2=68087&view=diff ============================================================================== --- llvm/trunk/include/llvm/Value.h (original) +++ llvm/trunk/include/llvm/Value.h Tue Mar 31 02:25:22 2009 @@ -53,7 +53,7 @@ /// using this Value. /// @brief LLVM Value Representation class Value { - const unsigned short SubclassID; // Subclass identifier (for isa/dyn_cast) + const unsigned char SubclassID; // Subclass identifier (for isa/dyn_cast) protected: /// SubclassData - This member is defined by this class, but is not used for /// anything. Subclasses can use it to hold whatever state they find useful. From isanbard at gmail.com Tue Mar 31 03:00:31 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 31 Mar 2009 08:00:31 -0000 Subject: [llvm-commits] [llvm] r68089 - in /llvm/branches/Apple/Dib/lib/Target/X86: X86ISelDAGToDAG.cpp X86ISelLowering.cpp X86ISelLowering.h X86Instr64bit.td X86InstrInfo.td Message-ID: <200903310800.n2V80XWF019395@zion.cs.uiuc.edu> Author: void Date: Tue Mar 31 03:00:28 2009 New Revision: 68089 URL: http://llvm.org/viewvc/llvm-project?rev=68089&view=rev Log: --- Merging (from foreign repository) r68066 into '.': U lib/Target/X86/X86Instr64bit.td U lib/Target/X86/X86InstrInfo.td U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86ISelDAGToDAG.cpp U lib/Target/X86/X86ISelLowering.h When optimzing a mul by immediate into two, the resulting mul's should get a x86 specific node to avoid dag combiner from hacking on them further. Modified: llvm/branches/Apple/Dib/lib/Target/X86/X86ISelDAGToDAG.cpp llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.h llvm/branches/Apple/Dib/lib/Target/X86/X86Instr64bit.td llvm/branches/Apple/Dib/lib/Target/X86/X86InstrInfo.td Modified: llvm/branches/Apple/Dib/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=68089&r1=68088&r2=68089&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/branches/Apple/Dib/lib/Target/X86/X86ISelDAGToDAG.cpp Tue Mar 31 03:00:28 2009 @@ -852,6 +852,7 @@ if (N.getResNo() != 0) break; // FALL THROUGH case ISD::MUL: + case X86ISD::MUL_IMM: // X*[3,5,9] -> X+X*[2,4,8] if (AM.BaseType == X86ISelAddressMode::RegBase && AM.Base.Reg.getNode() == 0 && Modified: llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp?rev=68089&r1=68088&r2=68089&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp Tue Mar 31 03:00:28 2009 @@ -7176,6 +7176,7 @@ case X86ISD::UMUL: return "X86ISD::UMUL"; case X86ISD::INC: return "X86ISD::INC"; case X86ISD::DEC: return "X86ISD::DEC"; + case X86ISD::MUL_IMM: return "X86ISD::MUL_IMM"; } } @@ -8451,14 +8452,14 @@ NewMul = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0), DAG.getConstant(Log2_64(MulAmt1), MVT::i8)); else - NewMul = DAG.getNode(ISD::MUL, DL, VT, N->getOperand(0), + NewMul = DAG.getNode(X86ISD::MUL_IMM, DL, VT, N->getOperand(0), DAG.getConstant(MulAmt1, VT)); if (isPowerOf2_64(MulAmt2)) NewMul = DAG.getNode(ISD::SHL, DL, VT, NewMul, DAG.getConstant(Log2_64(MulAmt2), MVT::i8)); else - NewMul = DAG.getNode(ISD::MUL, DL, VT, NewMul, + NewMul = DAG.getNode(X86ISD::MUL_IMM, DL, VT, NewMul, DAG.getConstant(MulAmt2, VT)); // Do not add new nodes to DAG combiner worklist. Modified: llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.h?rev=68089&r1=68088&r2=68089&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.h Tue Mar 31 03:00:28 2009 @@ -237,7 +237,10 @@ // ADD, SUB, SMUL, UMUL, etc. - Arithmetic operations with FLAGS results. ADD, SUB, SMUL, UMUL, - INC, DEC + INC, DEC, + + // MUL_IMM - X86 specific multiply by immediate. + MUL_IMM }; } Modified: llvm/branches/Apple/Dib/lib/Target/X86/X86Instr64bit.td URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Target/X86/X86Instr64bit.td?rev=68089&r1=68088&r2=68089&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/Target/X86/X86Instr64bit.td (original) +++ llvm/branches/Apple/Dib/lib/Target/X86/X86Instr64bit.td Tue Mar 31 03:00:28 2009 @@ -36,8 +36,8 @@ // Complex Pattern Definitions. // def lea64addr : ComplexPattern; + [add, mul, X86mul_imm, shl, or, frameindex, X86Wrapper], + []>; //===----------------------------------------------------------------------===// // Pattern fragments. Modified: llvm/branches/Apple/Dib/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Target/X86/X86InstrInfo.td?rev=68089&r1=68088&r2=68089&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/branches/Apple/Dib/lib/Target/X86/X86InstrInfo.td Tue Mar 31 03:00:28 2009 @@ -157,6 +157,8 @@ def X86inc_flag : SDNode<"X86ISD::INC", SDTUnaryArithWithFlags>; def X86dec_flag : SDNode<"X86ISD::DEC", SDTUnaryArithWithFlags>; +def X86mul_imm : SDNode<"X86ISD::MUL_IMM", SDTIntBinOp>; + //===----------------------------------------------------------------------===// // X86 Operand Definitions. // From isanbard at gmail.com Tue Mar 31 03:01:04 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 31 Mar 2009 08:01:04 -0000 Subject: [llvm-commits] [llvm] r68090 - /llvm/branches/Apple/Dib/lib/Analysis/AliasSetTracker.cpp Message-ID: <200903310801.n2V81431019482@zion.cs.uiuc.edu> Author: void Date: Tue Mar 31 03:01:04 2009 New Revision: 68090 URL: http://llvm.org/viewvc/llvm-project?rev=68090&view=rev Log: --- Merging (from foreign repository) r68047 into '.': U lib/Analysis/AliasSetTracker.cpp getEntryFor() may invalidate DenseMap iterator. Walking an invalidated iterator is not a good idea. Modified: llvm/branches/Apple/Dib/lib/Analysis/AliasSetTracker.cpp Modified: llvm/branches/Apple/Dib/lib/Analysis/AliasSetTracker.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Analysis/AliasSetTracker.cpp?rev=68090&r1=68089&r2=68090&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/Analysis/AliasSetTracker.cpp (original) +++ llvm/branches/Apple/Dib/lib/Analysis/AliasSetTracker.cpp Tue Mar 31 03:01:04 2009 @@ -520,6 +520,7 @@ if (Entry.hasAliasSet()) return; // Already in the tracker! // Add it to the alias set it aliases... + I = PointerMap.find(From); AliasSet *AS = I->second->getAliasSet(*this); AS->addPointer(*this, Entry, I->second->getSize(), true); } From isanbard at gmail.com Tue Mar 31 03:26:28 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 31 Mar 2009 08:26:28 -0000 Subject: [llvm-commits] [llvm] r68092 - in /llvm/trunk: include/llvm/CodeGen/MachineBasicBlock.h lib/CodeGen/Spiller.cpp lib/CodeGen/Spiller.h lib/CodeGen/VirtRegMap.cpp lib/CodeGen/VirtRegMap.h lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Message-ID: <200903310826.n2V8QTqd024503@zion.cs.uiuc.edu> Author: void Date: Tue Mar 31 03:26:26 2009 New Revision: 68092 URL: http://llvm.org/viewvc/llvm-project?rev=68092&view=rev Log: Revert r68073. It's causing a failure in the Apple-style builds. Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h llvm/trunk/lib/CodeGen/Spiller.cpp llvm/trunk/lib/CodeGen/Spiller.h llvm/trunk/lib/CodeGen/VirtRegMap.cpp llvm/trunk/lib/CodeGen/VirtRegMap.h llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=68092&r1=68091&r2=68092&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Tue Mar 31 03:26:26 2009 @@ -253,15 +253,6 @@ /// it returns end() iterator getFirstTerminator(); - /// isOnlyReachableViaFallthough - Return true if this basic block has - /// exactly one predecessor and the control transfer mechanism between - /// the predecessor and this block is a fall-through. - bool isOnlyReachableByFallthrough() const { - return !pred_empty() && - next(pred_begin()) == pred_end() && - (*pred_begin())->getFirstTerminator() == (*pred_begin())->end(); - } - void pop_front() { Insts.pop_front(); } void pop_back() { Insts.pop_back(); } void push_back(MachineInstr *MI) { Insts.push_back(MI); } Modified: llvm/trunk/lib/CodeGen/Spiller.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/Spiller.cpp?rev=68092&r1=68091&r2=68092&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/Spiller.cpp (original) +++ llvm/trunk/lib/CodeGen/Spiller.cpp Tue Mar 31 03:26:26 2009 @@ -578,6 +578,20 @@ DOUT << "**** Post Machine Instrs ****\n"; DEBUG(MF.dump()); + // See if any of the spills we added are actually dead and can be deleted. + for (std::vector >::iterator + I = AddedSpills.begin(), E = AddedSpills.end(); I != E; ++I) { + MachineInstr *MI = *I; + + if (VRM.OnlyUseOfStackSlot(MI)) { + MachineBasicBlock *MBB = MI->getParent(); + DOUT << "Removed dead store:\t" << *MI; + VRM.RemoveMachineInstrFromMaps(MI); + MBB->erase(MI); + ++NumDSE; + } + } + // Mark unused spill slots. MachineFrameInfo *MFI = MF.getFrameInfo(); int SS = VRM.getLowSpillSlot(); @@ -588,6 +602,7 @@ ++NumDSS; } + AddedSpills.clear(); return true; } @@ -798,9 +813,50 @@ return false; } +void LocalSpiller::RemoveDeadStore(MachineInstr *Store, + MachineBasicBlock &MBB, + MachineBasicBlock::iterator &MII, + SmallSet &ReMatDefs, + BitVector &RegKills, + std::vector &KillOps, + VirtRegMap &VRM) { + // If there is a dead store to this stack slot, nuke it now. + DOUT << "Removed dead store:\t" << *Store; + ++NumDSE; + SmallVector KillRegs; + InvalidateKills(*Store, RegKills, KillOps, &KillRegs); + + MachineBasicBlock::iterator PrevMII = Store; + bool CheckDef = PrevMII != MBB.begin(); + if (CheckDef) --PrevMII; + + VRM.RemoveMachineInstrFromMaps(Store); + MBB.erase(Store); + + if (CheckDef) { + // Look at defs of killed registers on the store. Mark the defs as dead + // since the store has been deleted and they aren't being reused. + for (unsigned j = 0, ee = KillRegs.size(); j != ee; ++j) { + bool HasOtherDef = false; + + if (InvalidateRegDef(PrevMII, *MII, KillRegs[j], HasOtherDef)) { + MachineInstr *DeadDef = PrevMII; + + if (ReMatDefs.count(DeadDef) && !HasOtherDef) { + // FIXME: This assumes a remat def does not have side effects. + VRM.RemoveMachineInstrFromMaps(DeadDef); + MBB.erase(DeadDef); + ++NumDRM; + } + } + } + } +} + /// SpillRegToStackSlot - Spill a register to a specified stack slot. Check if /// the last store to the same slot is now dead. If so, remove the last store. -void LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB, +void +LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MII, int Idx, unsigned PhysReg, int StackSlot, const TargetRegisterClass *RC, @@ -816,36 +872,8 @@ DOUT << "Store:\t" << *StoreMI; // If there is a dead store to this stack slot, nuke it now. - if (LastStore) { - DOUT << "Removed dead store:\t" << *LastStore; - ++NumDSE; - SmallVector KillRegs; - InvalidateKills(*LastStore, RegKills, KillOps, &KillRegs); - MachineBasicBlock::iterator PrevMII = LastStore; - bool CheckDef = PrevMII != MBB.begin(); - if (CheckDef) - --PrevMII; - VRM.RemoveMachineInstrFromMaps(LastStore); - MBB.erase(LastStore); - if (CheckDef) { - // Look at defs of killed registers on the store. Mark the defs - // as dead since the store has been deleted and they aren't - // being reused. - for (unsigned j = 0, ee = KillRegs.size(); j != ee; ++j) { - bool HasOtherDef = false; - if (InvalidateRegDef(PrevMII, *MII, KillRegs[j], HasOtherDef)) { - MachineInstr *DeadDef = PrevMII; - if (ReMatDefs.count(DeadDef) && !HasOtherDef) { - // FIXME: This assumes a remat def does not have side - // effects. - VRM.RemoveMachineInstrFromMaps(DeadDef); - MBB.erase(DeadDef); - ++NumDRM; - } - } - } - } - } + if (LastStore) + RemoveDeadStore(LastStore, MBB, MII, ReMatDefs, RegKills, KillOps, VRM); LastStore = next(MII); @@ -1060,6 +1088,7 @@ if (VRM.isSpillPt(&MI)) { std::vector > &SpillRegs = VRM.getSpillPtSpills(&MI); + for (unsigned i = 0, e = SpillRegs.size(); i != e; ++i) { unsigned VirtReg = SpillRegs[i].first; bool isKill = SpillRegs[i].second; @@ -1073,7 +1102,9 @@ VRM.addSpillSlotUse(StackSlot, StoreMI); DOUT << "Store:\t" << *StoreMI; VRM.virtFolded(VirtReg, StoreMI, VirtRegMap::isMod); + AddedSpills.push_back(StoreMI); } + NextMII = next(MII); } Modified: llvm/trunk/lib/CodeGen/Spiller.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/Spiller.h?rev=68092&r1=68091&r2=68092&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/Spiller.h (original) +++ llvm/trunk/lib/CodeGen/Spiller.h Tue Mar 31 03:26:26 2009 @@ -285,6 +285,7 @@ const TargetRegisterInfo *TRI; const TargetInstrInfo *TII; DenseMap DistanceMap; + std::vector AddedSpills; public: bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM); private: @@ -305,6 +306,14 @@ std::vector &KillOps, const TargetRegisterInfo *TRI, VirtRegMap &VRM); + void RemoveDeadStore(MachineInstr *Store, + MachineBasicBlock &MBB, + MachineBasicBlock::iterator &MII, + SmallSet &ReMatDefs, + BitVector &RegKills, + std::vector &KillOps, + VirtRegMap &VRM); + void SpillRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MII, int Idx, unsigned PhysReg, int StackSlot, Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=68092&r1=68091&r2=68092&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Tue Mar 31 03:26:26 2009 @@ -188,7 +188,7 @@ if (MF->getFrameInfo()->isFixedObjectIndex(FI)) continue; // This stack reference was produced by instruction selection and - // is not a spill + // is not a spill. if (FI < LowSpillSlot) continue; assert((unsigned)FI-LowSpillSlot < SpillSlotToUsesMap.size() @@ -201,6 +201,27 @@ EmergencySpillMap.erase(MI); } +bool VirtRegMap::OnlyUseOfStackSlot(const MachineInstr *MI) const { + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + const MachineOperand &MO = MI->getOperand(i); + if (!MO.isFI()) + continue; + int FI = MO.getIndex(); + if (MF->getFrameInfo()->isFixedObjectIndex(FI)) + continue; + // This stack reference was produced by instruction selection and + // is not a spill. + if (FI < LowSpillSlot) + continue; + assert((unsigned)FI-LowSpillSlot < SpillSlotToUsesMap.size() + && "Invalid spill slot"); + if (SpillSlotToUsesMap[FI - LowSpillSlot].size() != 1) + return false; + } + + return true; +} + void VirtRegMap::print(std::ostream &OS, const Module* M) const { const TargetRegisterInfo* TRI = MF->getTarget().getRegisterInfo(); Modified: llvm/trunk/lib/CodeGen/VirtRegMap.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.h?rev=68092&r1=68091&r2=68092&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.h (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.h Tue Mar 31 03:26:26 2009 @@ -430,6 +430,8 @@ /// the folded instruction map and spill point map. void RemoveMachineInstrFromMaps(MachineInstr *MI); + bool OnlyUseOfStackSlot(const MachineInstr *MI) const; + void print(std::ostream &OS, const Module* M = 0) const; void print(std::ostream *OS) const { if (OS) print(*OS); } void dump() const; Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=68092&r1=68091&r2=68092&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Tue Mar 31 03:26:26 2009 @@ -238,12 +238,7 @@ for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); I != E; ++I) { // Print a label for the basic block. - if (!VerboseAsm && (I->pred_empty() || I->isOnlyReachableByFallthrough())) { - // This is an entry block or a block that's only reachable via a - // fallthrough edge. In non-VerboseAsm mode, don't print the label. - assert((I->pred_empty() || (*I->pred_begin())->isLayoutSuccessor(I)) && - "Fall-through predecessor not adjacent to its successor!"); - } else { + if (!I->pred_empty()) { printBasicBlockLabel(I, true, true, VerboseAsm); O << '\n'; } From isanbard at gmail.com Tue Mar 31 03:27:00 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 31 Mar 2009 01:27:00 -0700 Subject: [llvm-commits] [llvm] r68073 - in /llvm/trunk: include/llvm/CodeGen/MachineBasicBlock.h lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp In-Reply-To: <200903302255.n2UMtIQc027270@zion.cs.uiuc.edu> References: <200903302255.n2UMtIQc027270@zion.cs.uiuc.edu> Message-ID: Dan, This is causing a failure in the Apple-style builds. I had to revert it. Please take a look. Thanks! http://blamebot.apple.com:8020/builders/full-llvm-OSX/builds/982/steps/shell/logs/stdio -bw On Mar 30, 2009, at 3:55 PM, Dan Gohman wrote: > Author: djg > Date: Mon Mar 30 17:55:17 2009 > New Revision: 68073 > > URL: http://llvm.org/viewvc/llvm-project?rev=68073&view=rev > Log: > Except in asm-verbose mode, avoid printing labels for blocks that are > only reachable via fall-through edges. This dramatically reduces the > number of labels printed, and thus also the number of labels the > assembler must parse and remember. > > Modified: > llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h > llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp > > Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=68073&r1=68072&r2=68073&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original) > +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Mon Mar 30 > 17:55:17 2009 > @@ -253,6 +253,15 @@ > /// it returns end() > iterator getFirstTerminator(); > > + /// isOnlyReachableViaFallthough - Return true if this basic > block has > + /// exactly one predecessor and the control transfer mechanism > between > + /// the predecessor and this block is a fall-through. > + bool isOnlyReachableByFallthrough() const { > + return !pred_empty() && > + next(pred_begin()) == pred_end() && > + (*pred_begin())->getFirstTerminator() == (*pred_begin())- > >end(); > + } > + > void pop_front() { Insts.pop_front(); } > void pop_back() { Insts.pop_back(); } > void push_back(MachineInstr *MI) { Insts.push_back(MI); } > > Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=68073&r1=68072&r2=68073&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp > (original) > +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Mon > Mar 30 17:55:17 2009 > @@ -238,7 +238,12 @@ > for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); > I != E; ++I) { > // Print a label for the basic block. > - if (!I->pred_empty()) { > + if (!VerboseAsm && (I->pred_empty() || I- > >isOnlyReachableByFallthrough())) { > + // This is an entry block or a block that's only reachable > via a > + // fallthrough edge. In non-VerboseAsm mode, don't print the > label. > + assert((I->pred_empty() || (*I->pred_begin())- > >isLayoutSuccessor(I)) && > + "Fall-through predecessor not adjacent to its > successor!"); > + } else { > printBasicBlockLabel(I, true, true, VerboseAsm); > O << '\n'; > } > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From resistor at mac.com Tue Mar 31 03:27:10 2009 From: resistor at mac.com (Owen Anderson) Date: Tue, 31 Mar 2009 08:27:10 -0000 Subject: [llvm-commits] [llvm] r68093 - in /llvm/trunk: lib/CodeGen/PreAllocSplitting.cpp test/CodeGen/X86/pre-split4.ll Message-ID: <200903310827.n2V8RAq0024636@zion.cs.uiuc.edu> Author: resistor Date: Tue Mar 31 03:27:09 2009 New Revision: 68093 URL: http://llvm.org/viewvc/llvm-project?rev=68093&view=rev Log: Remove the "fast" cases for spill and restore point determination, as these were subtlely wrong in obscure cases. Patch the testcase to account for this change. Modified: llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp llvm/trunk/test/CodeGen/X86/pre-split4.ll Modified: llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp?rev=68093&r1=68092&r2=68093&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp (original) +++ llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp Tue Mar 31 03:27:09 2009 @@ -232,68 +232,38 @@ unsigned &SpillIndex) { MachineBasicBlock::iterator Pt = MBB->begin(); - // Go top down if RefsInMBB is empty. - if (RefsInMBB.empty() && !DefMI) { - MachineBasicBlock::iterator MII = MBB->begin(); - MachineBasicBlock::iterator EndPt = MI; - - if (MII == EndPt) return Pt; - - do { - ++MII; - unsigned Index = LIs->getInstructionIndex(MII); - unsigned Gap = LIs->findGapBeforeInstr(Index); - - // We can't insert the spill between the barrier (a call), and its - // corresponding call frame setup/teardown. - if (prior(MII)->getOpcode() == TRI->getCallFrameSetupOpcode()) { - bool reachedBarrier = false; - do { - if (MII == EndPt) { - reachedBarrier = true; - break; - } - ++MII; - } while (MII->getOpcode() != TRI->getCallFrameDestroyOpcode()); - - if (reachedBarrier) break; - } else if (Gap) { - Pt = MII; - SpillIndex = Gap; - break; - } - } while (MII != EndPt); - } else { - MachineBasicBlock::iterator MII = MI; - MachineBasicBlock::iterator EndPt = DefMI - ? MachineBasicBlock::iterator(DefMI) : MBB->begin(); + MachineBasicBlock::iterator MII = MI; + MachineBasicBlock::iterator EndPt = DefMI + ? MachineBasicBlock::iterator(DefMI) : MBB->begin(); - while (MII != EndPt && !RefsInMBB.count(MII)) { - unsigned Index = LIs->getInstructionIndex(MII); - - // We can't insert the spill between the barrier (a call), and its - // corresponding call frame setup. - if (prior(MII)->getOpcode() == TRI->getCallFrameSetupOpcode()) { + while (MII != EndPt && !RefsInMBB.count(MII) && + MII->getOpcode() != TRI->getCallFrameSetupOpcode()) + --MII; + if (MII == EndPt || RefsInMBB.count(MII)) return Pt; + + while (MII != EndPt && !RefsInMBB.count(MII)) { + unsigned Index = LIs->getInstructionIndex(MII); + + // We can't insert the spill between the barrier (a call), and its + // corresponding call frame setup. + if (MII->getOpcode() == TRI->getCallFrameDestroyOpcode()) { + while (MII->getOpcode() != TRI->getCallFrameSetupOpcode()) { --MII; - continue; - } if (MII->getOpcode() == TRI->getCallFrameDestroyOpcode()) { - bool reachedBarrier = false; - while (MII->getOpcode() != TRI->getCallFrameSetupOpcode()) { - --MII; - if (MII == EndPt) { - reachedBarrier = true; - break; - } + if (MII == EndPt) { + return Pt; } - - if (reachedBarrier) break; - else continue; - } else if (LIs->hasGapBeforeInstr(Index)) { - Pt = MII; - SpillIndex = LIs->findGapBeforeInstr(Index, true); } - --MII; + continue; + } else if (LIs->hasGapBeforeInstr(Index)) { + Pt = MII; + SpillIndex = LIs->findGapBeforeInstr(Index, true); } + + if (RefsInMBB.count(MII)) + return Pt; + + + --MII; } return Pt; @@ -311,81 +281,44 @@ // FIXME: Allow spill to be inserted to the beginning of the mbb. Update mbb // begin index accordingly. MachineBasicBlock::iterator Pt = MBB->end(); - unsigned EndIdx = LIs->getMBBEndIdx(MBB); + MachineBasicBlock::iterator EndPt = MBB->getFirstTerminator(); - // Go bottom up if RefsInMBB is empty and the end of the mbb isn't beyond - // the last index in the live range. - if (RefsInMBB.empty() && LastIdx >= EndIdx) { - MachineBasicBlock::iterator MII = MBB->getFirstTerminator(); - MachineBasicBlock::iterator EndPt = MI; - - if (MII == EndPt) return Pt; - - --MII; - do { - unsigned Index = LIs->getInstructionIndex(MII); - unsigned Gap = LIs->findGapBeforeInstr(Index); - - // We can't insert a restore between the barrier (a call) and its - // corresponding call frame teardown. - if (MII->getOpcode() == TRI->getCallFrameDestroyOpcode()) { - bool reachedBarrier = false; - while (MII->getOpcode() != TRI->getCallFrameSetupOpcode()) { - --MII; - if (MII == EndPt) { - reachedBarrier = true; - break; - } - } - - if (reachedBarrier) break; - else continue; - } else if (Gap) { - Pt = MII; - RestoreIndex = Gap; - break; - } - - --MII; - } while (MII != EndPt); - } else { - MachineBasicBlock::iterator MII = MI; - MII = ++MII; - - // FIXME: Limit the number of instructions to examine to reduce - // compile time? - while (MII != MBB->getFirstTerminator()) { - unsigned Index = LIs->getInstructionIndex(MII); - if (Index > LastIdx) - break; - unsigned Gap = LIs->findGapBeforeInstr(Index); + // We start at the call, so walk forward until we find the call frame teardown + // since we can't insert restores before that. Bail if we encounter a use + // during this time. + MachineBasicBlock::iterator MII = MI; + if (MII == EndPt) return Pt; + + while (MII != EndPt && !RefsInMBB.count(MII) && + MII->getOpcode() != TRI->getCallFrameDestroyOpcode()) + ++MII; + if (MII == EndPt || RefsInMBB.count(MII)) return Pt; + ++MII; + + // FIXME: Limit the number of instructions to examine to reduce + // compile time? + while (MII != EndPt) { + unsigned Index = LIs->getInstructionIndex(MII); + if (Index > LastIdx) + break; + unsigned Gap = LIs->findGapBeforeInstr(Index); - // We can't insert a restore between the barrier (a call) and its - // corresponding call frame teardown. - if (MII->getOpcode() == TRI->getCallFrameDestroyOpcode()) { + // We can't insert a restore between the barrier (a call) and its + // corresponding call frame teardown. + if (MII->getOpcode() == TRI->getCallFrameSetupOpcode()) { + do { + if (MII == EndPt || RefsInMBB.count(MII)) return Pt; ++MII; - continue; - } else if (prior(MII)->getOpcode() == TRI->getCallFrameSetupOpcode()) { - bool reachedBarrier = false; - do { - if (MII == MBB->getFirstTerminator() || RefsInMBB.count(MII)) { - reachedBarrier = true; - break; - } - - ++MII; - } while (MII->getOpcode() != TRI->getCallFrameDestroyOpcode()); - - if (reachedBarrier) break; - } else if (Gap) { - Pt = MII; - RestoreIndex = Gap; - } - - if (RefsInMBB.count(MII)) - break; - ++MII; + } while (MII->getOpcode() != TRI->getCallFrameDestroyOpcode()); + } else if (Gap) { + Pt = MII; + RestoreIndex = Gap; } + + if (RefsInMBB.count(MII)) + return Pt; + + ++MII; } return Pt; Modified: llvm/trunk/test/CodeGen/X86/pre-split4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pre-split4.ll?rev=68093&r1=68092&r2=68093&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/pre-split4.ll (original) +++ llvm/trunk/test/CodeGen/X86/pre-split4.ll Tue Mar 31 03:27:09 2009 @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \ -; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 4 +; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 2 define i32 @main(i32 %argc, i8** %argv) nounwind { entry: From isanbard at gmail.com Tue Mar 31 03:33:19 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 31 Mar 2009 08:33:19 -0000 Subject: [llvm-commits] [llvm] r68096 - in /llvm/branches/Apple/Dib: lib/CodeGen/TwoAddressInstructionPass.cpp test/CodeGen/X86/inline-asm-2addr.ll Message-ID: <200903310833.n2V8XKI4025099@zion.cs.uiuc.edu> Author: void Date: Tue Mar 31 03:33:19 2009 New Revision: 68096 URL: http://llvm.org/viewvc/llvm-project?rev=68096&view=rev Log: --- Merging (from foreign repository) r68065 into '.': U test/CodeGen/X86/inline-asm-2addr.ll U lib/CodeGen/TwoAddressInstructionPass.cpp Turn a 2-address instruction into a 3-address one when it's profitable even if the two-address operand is killed. e.g. %reg1024 = MOV r1 %reg1025 = ADD %reg1024, %reg1026 r0 = MOV %reg1025 If it's not possible / profitable to commute ADD, then turning ADD into a LEA saves a copy. Modified: llvm/branches/Apple/Dib/lib/CodeGen/TwoAddressInstructionPass.cpp llvm/branches/Apple/Dib/test/CodeGen/X86/inline-asm-2addr.ll Modified: llvm/branches/Apple/Dib/lib/CodeGen/TwoAddressInstructionPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/CodeGen/TwoAddressInstructionPass.cpp?rev=68096&r1=68095&r2=68096&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/CodeGen/TwoAddressInstructionPass.cpp (original) +++ llvm/branches/Apple/Dib/lib/CodeGen/TwoAddressInstructionPass.cpp Tue Mar 31 03:33:19 2009 @@ -96,6 +96,13 @@ MachineFunction::iterator &mbbi, unsigned RegB, unsigned RegC, unsigned Dist); + bool isProfitableToConv3Addr(unsigned RegA); + + bool ConvertInstTo3Addr(MachineBasicBlock::iterator &mi, + MachineBasicBlock::iterator &nmi, + MachineFunction::iterator &mbbi, + unsigned RegB, unsigned Dist); + void ProcessCopy(MachineInstr *MI, MachineBasicBlock *MBB, SmallPtrSet &Processed); public: @@ -334,7 +341,9 @@ /// as a two-address use. If so, return the destination register by reference. static bool isTwoAddrUse(MachineInstr &MI, unsigned Reg, unsigned &DstReg) { const TargetInstrDesc &TID = MI.getDesc(); - for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) { + unsigned NumOps = (MI.getOpcode() == TargetInstrInfo::INLINEASM) + ? MI.getNumOperands() : TID.getNumOperands(); + for (unsigned i = 0; i != NumOps; ++i) { const MachineOperand &MO = MI.getOperand(i); if (!MO.isReg() || !MO.isUse() || MO.getReg() != Reg) continue; @@ -503,6 +512,53 @@ return true; } +/// isProfitableToConv3Addr - Return true if it is profitable to convert the +/// given 2-address instruction to a 3-address one. +bool +TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA) { + // Look for situations like this: + // %reg1024 = MOV r1 + // %reg1025 = MOV r0 + // %reg1026 = ADD %reg1024, %reg1025 + // r2 = MOV %reg1026 + // Turn ADD into a 3-address instruction to avoid a copy. + unsigned FromRegA = getMappedReg(RegA, SrcRegMap); + unsigned ToRegA = getMappedReg(RegA, DstRegMap); + return (FromRegA && ToRegA && !regsAreCompatible(FromRegA, ToRegA, TRI)); +} + +/// ConvertInstTo3Addr - Convert the specified two-address instruction into a +/// three address one. Return true if this transformation was successful. +bool +TwoAddressInstructionPass::ConvertInstTo3Addr(MachineBasicBlock::iterator &mi, + MachineBasicBlock::iterator &nmi, + MachineFunction::iterator &mbbi, + unsigned RegB, unsigned Dist) { + MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, LV); + if (NewMI) { + DOUT << "2addr: CONVERTING 2-ADDR: " << *mi; + DOUT << "2addr: TO 3-ADDR: " << *NewMI; + bool Sunk = false; + + if (NewMI->findRegisterUseOperand(RegB, false, TRI)) + // FIXME: Temporary workaround. If the new instruction doesn't + // uses RegB, convertToThreeAddress must have created more + // then one instruction. + Sunk = Sink3AddrInstruction(mbbi, NewMI, RegB, mi); + + mbbi->erase(mi); // Nuke the old inst. + + if (!Sunk) { + DistanceMap.insert(std::make_pair(NewMI, Dist)); + mi = NewMI; + nmi = next(mi); + } + return true; + } + + return false; +} + /// ProcessCopy - If the specified instruction is not yet processed, process it /// if it's a copy. For a copy instruction, we find the physical registers the /// source and destination registers might be mapped to. These are kept in @@ -716,26 +772,7 @@ assert(TID.getOperandConstraint(i, TOI::TIED_TO) == -1); #endif - MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, LV); - if (NewMI) { - DOUT << "2addr: CONVERTING 2-ADDR: " << *mi; - DOUT << "2addr: TO 3-ADDR: " << *NewMI; - bool Sunk = false; - - if (NewMI->findRegisterUseOperand(regB, false, TRI)) - // FIXME: Temporary workaround. If the new instruction doesn't - // uses regB, convertToThreeAddress must have created more - // then one instruction. - Sunk = Sink3AddrInstruction(mbbi, NewMI, regB, mi); - - mbbi->erase(mi); // Nuke the old inst. - - if (!Sunk) { - DistanceMap.insert(std::make_pair(NewMI, Dist)); - mi = NewMI; - nmi = next(mi); - } - + if (ConvertInstTo3Addr(mi, nmi, mbbi, regB, Dist)) { ++NumConvertedTo3Addr; break; // Done with this instruction. } @@ -750,9 +787,19 @@ ++NumAggrCommuted; ++NumCommuted; regB = regC; + goto InstructionRearranged; } } + // If it's profitable to convert the 2-address instruction to a + // 3-address one, do so. + if (TID.isConvertibleTo3Addr() && isProfitableToConv3Addr(regA)) { + if (ConvertInstTo3Addr(mi, nmi, mbbi, regB, Dist)) { + ++NumConvertedTo3Addr; + break; // Done with this instruction. + } + } + InstructionRearranged: const TargetRegisterClass* rc = MRI->getRegClass(regB); MachineInstr *DefMI = MRI->getVRegDef(regB); Modified: llvm/branches/Apple/Dib/test/CodeGen/X86/inline-asm-2addr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/test/CodeGen/X86/inline-asm-2addr.ll?rev=68096&r1=68095&r2=68096&view=diff ============================================================================== --- llvm/branches/Apple/Dib/test/CodeGen/X86/inline-asm-2addr.ll (original) +++ llvm/branches/Apple/Dib/test/CodeGen/X86/inline-asm-2addr.ll Tue Mar 31 03:33:19 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movq | count 1 +; RUN: llvm-as < %s | llc -march=x86-64 | not grep movq define i64 @t(i64 %a, i64 %b) nounwind ssp { entry: From isanbard at gmail.com Tue Mar 31 03:35:22 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 31 Mar 2009 08:35:22 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r68097 - /llvm-gcc-4.2/branches/Apple/Dib/gcc/config/darwin.c Message-ID: <200903310835.n2V8ZMWc025165@zion.cs.uiuc.edu> Author: void Date: Tue Mar 31 03:35:22 2009 New Revision: 68097 URL: http://llvm.org/viewvc/llvm-project?rev=68097&view=rev Log: --- Merging (from foreign repository) r68080 into '.': U gcc/config/darwin.c Move ObjC CFString objects to a writable __DATA section under -fwritable-strings. Modified: llvm-gcc-4.2/branches/Apple/Dib/gcc/config/darwin.c Modified: llvm-gcc-4.2/branches/Apple/Dib/gcc/config/darwin.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/branches/Apple/Dib/gcc/config/darwin.c?rev=68097&r1=68096&r2=68097&view=diff ============================================================================== --- llvm-gcc-4.2/branches/Apple/Dib/gcc/config/darwin.c (original) +++ llvm-gcc-4.2/branches/Apple/Dib/gcc/config/darwin.c Tue Mar 31 03:35:22 2009 @@ -1760,7 +1760,11 @@ else return "__OBJC, __string_object,no_dead_strip"; } else if (!strcmp(IDENTIFIER_POINTER(typename), "__builtin_CFString")) { - return "__DATA, __cfstring"; + return +#ifdef LLVM_CONST_DATA_SECTION + (flag_writable_strings) ? LLVM_CONST_DATA_SECTION : +#endif + "__DATA, __cfstring"; } else { return 0; } From isanbard at gmail.com Tue Mar 31 03:41:32 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 31 Mar 2009 08:41:32 -0000 Subject: [llvm-commits] [llvm] r68099 - in /llvm/trunk: include/llvm/CodeGen/MachineBasicBlock.h lib/CodeGen/Spiller.cpp lib/CodeGen/Spiller.h lib/CodeGen/VirtRegMap.cpp lib/CodeGen/VirtRegMap.h lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Message-ID: <200903310841.n2V8fWDR025503@zion.cs.uiuc.edu> Author: void Date: Tue Mar 31 03:41:31 2009 New Revision: 68099 URL: http://llvm.org/viewvc/llvm-project?rev=68099&view=rev Log: Oy! When reverting r68073, I added in experimental code. Sorry... Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h llvm/trunk/lib/CodeGen/Spiller.cpp llvm/trunk/lib/CodeGen/Spiller.h llvm/trunk/lib/CodeGen/VirtRegMap.cpp llvm/trunk/lib/CodeGen/VirtRegMap.h llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=68099&r1=68098&r2=68099&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Tue Mar 31 03:41:31 2009 @@ -253,6 +253,15 @@ /// it returns end() iterator getFirstTerminator(); + /// isOnlyReachableViaFallthough - Return true if this basic block has + /// exactly one predecessor and the control transfer mechanism between + /// the predecessor and this block is a fall-through. + bool isOnlyReachableByFallthrough() const { + return !pred_empty() && + next(pred_begin()) == pred_end() && + (*pred_begin())->getFirstTerminator() == (*pred_begin())->end(); + } + void pop_front() { Insts.pop_front(); } void pop_back() { Insts.pop_back(); } void push_back(MachineInstr *MI) { Insts.push_back(MI); } Modified: llvm/trunk/lib/CodeGen/Spiller.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/Spiller.cpp?rev=68099&r1=68098&r2=68099&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/Spiller.cpp (original) +++ llvm/trunk/lib/CodeGen/Spiller.cpp Tue Mar 31 03:41:31 2009 @@ -578,20 +578,6 @@ DOUT << "**** Post Machine Instrs ****\n"; DEBUG(MF.dump()); - // See if any of the spills we added are actually dead and can be deleted. - for (std::vector >::iterator - I = AddedSpills.begin(), E = AddedSpills.end(); I != E; ++I) { - MachineInstr *MI = *I; - - if (VRM.OnlyUseOfStackSlot(MI)) { - MachineBasicBlock *MBB = MI->getParent(); - DOUT << "Removed dead store:\t" << *MI; - VRM.RemoveMachineInstrFromMaps(MI); - MBB->erase(MI); - ++NumDSE; - } - } - // Mark unused spill slots. MachineFrameInfo *MFI = MF.getFrameInfo(); int SS = VRM.getLowSpillSlot(); @@ -602,7 +588,6 @@ ++NumDSS; } - AddedSpills.clear(); return true; } @@ -813,50 +798,9 @@ return false; } -void LocalSpiller::RemoveDeadStore(MachineInstr *Store, - MachineBasicBlock &MBB, - MachineBasicBlock::iterator &MII, - SmallSet &ReMatDefs, - BitVector &RegKills, - std::vector &KillOps, - VirtRegMap &VRM) { - // If there is a dead store to this stack slot, nuke it now. - DOUT << "Removed dead store:\t" << *Store; - ++NumDSE; - SmallVector KillRegs; - InvalidateKills(*Store, RegKills, KillOps, &KillRegs); - - MachineBasicBlock::iterator PrevMII = Store; - bool CheckDef = PrevMII != MBB.begin(); - if (CheckDef) --PrevMII; - - VRM.RemoveMachineInstrFromMaps(Store); - MBB.erase(Store); - - if (CheckDef) { - // Look at defs of killed registers on the store. Mark the defs as dead - // since the store has been deleted and they aren't being reused. - for (unsigned j = 0, ee = KillRegs.size(); j != ee; ++j) { - bool HasOtherDef = false; - - if (InvalidateRegDef(PrevMII, *MII, KillRegs[j], HasOtherDef)) { - MachineInstr *DeadDef = PrevMII; - - if (ReMatDefs.count(DeadDef) && !HasOtherDef) { - // FIXME: This assumes a remat def does not have side effects. - VRM.RemoveMachineInstrFromMaps(DeadDef); - MBB.erase(DeadDef); - ++NumDRM; - } - } - } - } -} - /// SpillRegToStackSlot - Spill a register to a specified stack slot. Check if /// the last store to the same slot is now dead. If so, remove the last store. -void -LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB, +void LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MII, int Idx, unsigned PhysReg, int StackSlot, const TargetRegisterClass *RC, @@ -872,8 +816,36 @@ DOUT << "Store:\t" << *StoreMI; // If there is a dead store to this stack slot, nuke it now. - if (LastStore) - RemoveDeadStore(LastStore, MBB, MII, ReMatDefs, RegKills, KillOps, VRM); + if (LastStore) { + DOUT << "Removed dead store:\t" << *LastStore; + ++NumDSE; + SmallVector KillRegs; + InvalidateKills(*LastStore, RegKills, KillOps, &KillRegs); + MachineBasicBlock::iterator PrevMII = LastStore; + bool CheckDef = PrevMII != MBB.begin(); + if (CheckDef) + --PrevMII; + VRM.RemoveMachineInstrFromMaps(LastStore); + MBB.erase(LastStore); + if (CheckDef) { + // Look at defs of killed registers on the store. Mark the defs + // as dead since the store has been deleted and they aren't + // being reused. + for (unsigned j = 0, ee = KillRegs.size(); j != ee; ++j) { + bool HasOtherDef = false; + if (InvalidateRegDef(PrevMII, *MII, KillRegs[j], HasOtherDef)) { + MachineInstr *DeadDef = PrevMII; + if (ReMatDefs.count(DeadDef) && !HasOtherDef) { + // FIXME: This assumes a remat def does not have side + // effects. + VRM.RemoveMachineInstrFromMaps(DeadDef); + MBB.erase(DeadDef); + ++NumDRM; + } + } + } + } + } LastStore = next(MII); @@ -1088,7 +1060,6 @@ if (VRM.isSpillPt(&MI)) { std::vector > &SpillRegs = VRM.getSpillPtSpills(&MI); - for (unsigned i = 0, e = SpillRegs.size(); i != e; ++i) { unsigned VirtReg = SpillRegs[i].first; bool isKill = SpillRegs[i].second; @@ -1102,9 +1073,7 @@ VRM.addSpillSlotUse(StackSlot, StoreMI); DOUT << "Store:\t" << *StoreMI; VRM.virtFolded(VirtReg, StoreMI, VirtRegMap::isMod); - AddedSpills.push_back(StoreMI); } - NextMII = next(MII); } Modified: llvm/trunk/lib/CodeGen/Spiller.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/Spiller.h?rev=68099&r1=68098&r2=68099&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/Spiller.h (original) +++ llvm/trunk/lib/CodeGen/Spiller.h Tue Mar 31 03:41:31 2009 @@ -285,7 +285,6 @@ const TargetRegisterInfo *TRI; const TargetInstrInfo *TII; DenseMap DistanceMap; - std::vector AddedSpills; public: bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM); private: @@ -306,14 +305,6 @@ std::vector &KillOps, const TargetRegisterInfo *TRI, VirtRegMap &VRM); - void RemoveDeadStore(MachineInstr *Store, - MachineBasicBlock &MBB, - MachineBasicBlock::iterator &MII, - SmallSet &ReMatDefs, - BitVector &RegKills, - std::vector &KillOps, - VirtRegMap &VRM); - void SpillRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MII, int Idx, unsigned PhysReg, int StackSlot, Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=68099&r1=68098&r2=68099&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Tue Mar 31 03:41:31 2009 @@ -188,7 +188,7 @@ if (MF->getFrameInfo()->isFixedObjectIndex(FI)) continue; // This stack reference was produced by instruction selection and - // is not a spill. + // is not a spill if (FI < LowSpillSlot) continue; assert((unsigned)FI-LowSpillSlot < SpillSlotToUsesMap.size() @@ -201,27 +201,6 @@ EmergencySpillMap.erase(MI); } -bool VirtRegMap::OnlyUseOfStackSlot(const MachineInstr *MI) const { - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - const MachineOperand &MO = MI->getOperand(i); - if (!MO.isFI()) - continue; - int FI = MO.getIndex(); - if (MF->getFrameInfo()->isFixedObjectIndex(FI)) - continue; - // This stack reference was produced by instruction selection and - // is not a spill. - if (FI < LowSpillSlot) - continue; - assert((unsigned)FI-LowSpillSlot < SpillSlotToUsesMap.size() - && "Invalid spill slot"); - if (SpillSlotToUsesMap[FI - LowSpillSlot].size() != 1) - return false; - } - - return true; -} - void VirtRegMap::print(std::ostream &OS, const Module* M) const { const TargetRegisterInfo* TRI = MF->getTarget().getRegisterInfo(); Modified: llvm/trunk/lib/CodeGen/VirtRegMap.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.h?rev=68099&r1=68098&r2=68099&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.h (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.h Tue Mar 31 03:41:31 2009 @@ -430,8 +430,6 @@ /// the folded instruction map and spill point map. void RemoveMachineInstrFromMaps(MachineInstr *MI); - bool OnlyUseOfStackSlot(const MachineInstr *MI) const; - void print(std::ostream &OS, const Module* M = 0) const; void print(std::ostream *OS) const { if (OS) print(*OS); } void dump() const; Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=68099&r1=68098&r2=68099&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Tue Mar 31 03:41:31 2009 @@ -238,7 +238,12 @@ for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); I != E; ++I) { // Print a label for the basic block. - if (!I->pred_empty()) { + if (!VerboseAsm && (I->pred_empty() || I->isOnlyReachableByFallthrough())) { + // This is an entry block or a block that's only reachable via a + // fallthrough edge. In non-VerboseAsm mode, don't print the label. + assert((I->pred_empty() || (*I->pred_begin())->isLayoutSuccessor(I)) && + "Fall-through predecessor not adjacent to its successor!"); + } else { printBasicBlockLabel(I, true, true, VerboseAsm); O << '\n'; } From isanbard at gmail.com Tue Mar 31 03:42:40 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 31 Mar 2009 08:42:40 -0000 Subject: [llvm-commits] [llvm] r68100 - in /llvm/trunk: include/llvm/CodeGen/MachineBasicBlock.h lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Message-ID: <200903310842.n2V8genb025581@zion.cs.uiuc.edu> Author: void Date: Tue Mar 31 03:42:40 2009 New Revision: 68100 URL: http://llvm.org/viewvc/llvm-project?rev=68100&view=rev Log: Really temporarily revert r68073. Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=68100&r1=68099&r2=68100&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Tue Mar 31 03:42:40 2009 @@ -253,15 +253,6 @@ /// it returns end() iterator getFirstTerminator(); - /// isOnlyReachableViaFallthough - Return true if this basic block has - /// exactly one predecessor and the control transfer mechanism between - /// the predecessor and this block is a fall-through. - bool isOnlyReachableByFallthrough() const { - return !pred_empty() && - next(pred_begin()) == pred_end() && - (*pred_begin())->getFirstTerminator() == (*pred_begin())->end(); - } - void pop_front() { Insts.pop_front(); } void pop_back() { Insts.pop_back(); } void push_back(MachineInstr *MI) { Insts.push_back(MI); } Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=68100&r1=68099&r2=68100&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Tue Mar 31 03:42:40 2009 @@ -238,12 +238,7 @@ for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); I != E; ++I) { // Print a label for the basic block. - if (!VerboseAsm && (I->pred_empty() || I->isOnlyReachableByFallthrough())) { - // This is an entry block or a block that's only reachable via a - // fallthrough edge. In non-VerboseAsm mode, don't print the label. - assert((I->pred_empty() || (*I->pred_begin())->isLayoutSuccessor(I)) && - "Fall-through predecessor not adjacent to its successor!"); - } else { + if (!I->pred_empty()) { printBasicBlockLabel(I, true, true, VerboseAsm); O << '\n'; } From rafael.espindola at gmail.com Tue Mar 31 11:17:00 2009 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Tue, 31 Mar 2009 16:17:00 -0000 Subject: [llvm-commits] [llvm] r68109 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Message-ID: <200903311617.n2VGH05k014030@zion.cs.uiuc.edu> Author: rafael Date: Tue Mar 31 11:16:57 2009 New Revision: 68109 URL: http://llvm.org/viewvc/llvm-project?rev=68109&view=rev Log: remove unused arguments. Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=68109&r1=68108&r2=68109&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Tue Mar 31 11:16:57 2009 @@ -160,9 +160,8 @@ SDNode *SelectAtomic64(SDNode *Node, unsigned Opc); bool MatchAddress(SDValue N, X86ISelAddressMode &AM, - bool isRoot = true, unsigned Depth = 0); - bool MatchAddressBase(SDValue N, X86ISelAddressMode &AM, - bool isRoot, unsigned Depth); + unsigned Depth = 0); + bool MatchAddressBase(SDValue N, X86ISelAddressMode &AM); bool SelectAddr(SDValue Op, SDValue N, SDValue &Base, SDValue &Scale, SDValue &Index, SDValue &Disp); bool SelectLEAAddr(SDValue Op, SDValue N, SDValue &Base, @@ -731,13 +730,13 @@ /// returning true if it cannot be done. This just pattern matches for the /// addressing mode. bool X86DAGToDAGISel::MatchAddress(SDValue N, X86ISelAddressMode &AM, - bool isRoot, unsigned Depth) { + unsigned Depth) { bool is64Bit = Subtarget->is64Bit(); DebugLoc dl = N.getDebugLoc(); DOUT << "MatchAddress: "; DEBUG(AM.dump()); // Limit recursion. if (Depth > 5) - return MatchAddressBase(N, AM, isRoot, Depth); + return MatchAddressBase(N, AM); // RIP relative addressing: %rip + 32-bit displacement! if (AM.isRIPRel) { @@ -896,12 +895,12 @@ case ISD::ADD: { X86ISelAddressMode Backup = AM; - if (!MatchAddress(N.getNode()->getOperand(0), AM, false, Depth+1) && - !MatchAddress(N.getNode()->getOperand(1), AM, false, Depth+1)) + if (!MatchAddress(N.getNode()->getOperand(0), AM, Depth+1) && + !MatchAddress(N.getNode()->getOperand(1), AM, Depth+1)) return false; AM = Backup; - if (!MatchAddress(N.getNode()->getOperand(1), AM, false, Depth+1) && - !MatchAddress(N.getNode()->getOperand(0), AM, false, Depth+1)) + if (!MatchAddress(N.getNode()->getOperand(1), AM, Depth+1) && + !MatchAddress(N.getNode()->getOperand(0), AM, Depth+1)) return false; AM = Backup; @@ -926,7 +925,7 @@ X86ISelAddressMode Backup = AM; uint64_t Offset = CN->getSExtValue(); // Start with the LHS as an addr mode. - if (!MatchAddress(N.getOperand(0), AM, false) && + if (!MatchAddress(N.getOperand(0), AM, Depth+1) && // Address could not have picked a GV address for the displacement. AM.GV == NULL && // On x86-64, the resultant disp must fit in 32-bits. @@ -1005,13 +1004,12 @@ } } - return MatchAddressBase(N, AM, isRoot, Depth); + return MatchAddressBase(N, AM); } /// MatchAddressBase - Helper for MatchAddress. Add the specified node to the /// specified addressing mode without any further recursion. -bool X86DAGToDAGISel::MatchAddressBase(SDValue N, X86ISelAddressMode &AM, - bool isRoot, unsigned Depth) { +bool X86DAGToDAGISel::MatchAddressBase(SDValue N, X86ISelAddressMode &AM) { // Is the base register already occupied? if (AM.BaseType != X86ISelAddressMode::RegBase || AM.Base.Reg.getNode()) { // If so, check to see if the scale index register is set. @@ -1051,7 +1049,7 @@ for (SDNode::use_iterator UI = N.getNode()->use_begin(), UE = N.getNode()->use_end(); UI != UE; ++UI) { if (UI->getOpcode() == ISD::CopyToReg) { - MatchAddressBase(N, AM, true, 0); + MatchAddressBase(N, AM); Done = true; break; } From gohman at apple.com Tue Mar 31 11:46:45 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 31 Mar 2009 16:46:45 -0000 Subject: [llvm-commits] [llvm] r68111 - /llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h Message-ID: <200903311646.n2VGkjhA015161@zion.cs.uiuc.edu> Author: djg Date: Tue Mar 31 11:46:45 2009 New Revision: 68111 URL: http://llvm.org/viewvc/llvm-project?rev=68111&view=rev Log: Add a comment. Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h?rev=68111&r1=68110&r2=68111&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h (original) +++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h Tue Mar 31 11:46:45 2009 @@ -145,7 +145,8 @@ /// TreePatternNode objects! class TreePatternNode { /// The inferred type for this node, or EMVT::isUnknown if it hasn't - /// been determined yet. + /// been determined yet. This is a std::vector because during inference + /// there may be multiple possible types. std::vector Types; /// Operator - The Record for the operator if this is an interior node (not From gohman at apple.com Tue Mar 31 11:48:35 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 31 Mar 2009 16:48:35 -0000 Subject: [llvm-commits] [llvm] r68112 - /llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp Message-ID: <200903311648.n2VGmZRX015261@zion.cs.uiuc.edu> Author: djg Date: Tue Mar 31 11:48:35 2009 New Revision: 68112 URL: http://llvm.org/viewvc/llvm-project?rev=68112&view=rev Log: Tidy up some comments. Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp?rev=68112&r1=68111&r2=68112&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp (original) +++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp Tue Mar 31 11:48:35 2009 @@ -75,16 +75,16 @@ return true; } -/// isExtIntegerVT - Return true if the specified extended value type vector -/// contains isInt or an integer value type. namespace llvm { namespace EMVT { +/// isExtIntegerInVTs - Return true if the specified extended value type vector +/// contains isInt or an integer value type. bool isExtIntegerInVTs(const std::vector &EVTs) { assert(!EVTs.empty() && "Cannot check for integer in empty ExtVT list!"); return EVTs[0] == isInt || !(FilterEVTs(EVTs, isInteger).empty()); } -/// isExtFloatingPointVT - Return true if the specified extended value type +/// isExtFloatingPointInVTs - Return true if the specified extended value type /// vector contains isFP or a FP value type. bool isExtFloatingPointInVTs(const std::vector &EVTs) { assert(!EVTs.empty() && "Cannot check for integer in empty ExtVT list!"); From gohman at apple.com Tue Mar 31 11:51:19 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 31 Mar 2009 16:51:19 -0000 Subject: [llvm-commits] [llvm] r68113 - /llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp Message-ID: <200903311651.n2VGpJi8015356@zion.cs.uiuc.edu> Author: djg Date: Tue Mar 31 11:51:18 2009 New Revision: 68113 URL: http://llvm.org/viewvc/llvm-project?rev=68113&view=rev Log: Minor top-level comment fix. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp?rev=68113&r1=68112&r2=68113&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp Tue Mar 31 11:51:18 2009 @@ -1,4 +1,4 @@ -//===-- llvm/CallingConvLower.cpp - Calling Conventions -------------------===// +//===-- CallingConvLower.cpp - Calling Conventions ------------------------===// // // The LLVM Compiler Infrastructure // From daniel at zuster.org Tue Mar 31 12:30:15 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 31 Mar 2009 17:30:15 -0000 Subject: [llvm-commits] [llvm] r68118 - in /llvm/trunk: include/llvm/System/Host.h lib/System/Unix/Host.inc lib/System/Win32/Host.inc Message-ID: <200903311730.n2VHUFqp016822@zion.cs.uiuc.edu> Author: ddunbar Date: Tue Mar 31 12:30:15 2009 New Revision: 68118 URL: http://llvm.org/viewvc/llvm-project?rev=68118&view=rev Log: Add llvm::sys::getHostTriple and remove llvm::sys::getOS{Name,Version}. Right now the implementation just derives from LLVM_HOSTTRIPLE (which is wrong, but it doesn't look like we have a define for the target triple). Ideally this routine would actually be able to compute the triple for targets we care about. Modified: llvm/trunk/include/llvm/System/Host.h llvm/trunk/lib/System/Unix/Host.inc llvm/trunk/lib/System/Win32/Host.inc Modified: llvm/trunk/include/llvm/System/Host.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/Host.h?rev=68118&r1=68117&r2=68118&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/Host.h (original) +++ llvm/trunk/include/llvm/System/Host.h Tue Mar 31 12:30:15 2009 @@ -32,13 +32,15 @@ return !isLittleEndianHost(); } - /// getOSName() - Return the name of the host operating system or "" if - /// unknown. - std::string getOSName(); + /// getHostTriple() - Return the target triple of the running + /// system. + /// + /// The target triple is a string in the format of: + /// CPU_TYPE-VENDOR-OPERATING_SYSTEM + /// or + /// CPU_TYPE-VENDOR-KERNEL-OPERATING_SYSTEM + std::string getHostTriple(); - /// getOSVersion() - Return the operating system version as a string or - /// "" if unknown. - std::string getOSVersion(); } } Modified: llvm/trunk/lib/System/Unix/Host.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Unix/Host.inc?rev=68118&r1=68117&r2=68118&view=diff ============================================================================== --- llvm/trunk/lib/System/Unix/Host.inc (original) +++ llvm/trunk/lib/System/Unix/Host.inc Tue Mar 31 12:30:15 2009 @@ -23,20 +23,36 @@ using namespace llvm; -std::string llvm::sys::getOSName() { +static std::string getOSVersion() { struct utsname info; if (uname(&info)) return ""; - return info.sysname; + return info.release; } -std::string llvm::sys::getOSVersion() { - struct utsname info; - - if (uname(&info)) - return ""; +std::string sys::getHostTriple() { + // FIXME: Derive more directly instead of relying on the autoconf + // generated variable. + + std::string Triple = LLVM_HOSTTRIPLE; + + // Force i86 to i386. + if (Triple[0] == 'i' && isdigit(Triple[1]) && + Triple[2] == '8' && Triple[3] == '6') + Triple[1] = '3'; + + // On darwin, we want to update the version to match that of the + // host. + std::string::size_type DarwinDashIdx = Triple.find("-darwin"); + if (DarwinDashIdx != std::string::npos) { + Triple.resize(DarwinDashIdx + strlen("-darwin")); + + // Only add the major part of the os version. + std::string Version = getOSVersion(); + Triple += Version.substr(0, Version.find('.')); + } - return info.release; + return Triple; } Modified: llvm/trunk/lib/System/Win32/Host.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/Host.inc?rev=68118&r1=68117&r2=68118&view=diff ============================================================================== --- llvm/trunk/lib/System/Win32/Host.inc (original) +++ llvm/trunk/lib/System/Win32/Host.inc Tue Mar 31 12:30:15 2009 @@ -17,21 +17,7 @@ using namespace llvm; -std::string sys::getOSName() { - return "Windows"; -} - -std::string sys::getOSVersion() { - OSVERSIONINFO osvi; - - memset(&osvi, 0, sizeof(osvi)); - osvi.dwOSVersionInfoSize = sizeof(OSVERSIONINFO); - - if (!GetVersionEx(&osvi)) - return ""; - - char buf[64]; - sprintf(buf, "%d.%d", (int)osvi.dwMajorVersion, (int)osvi.dwMinorVersion); - - return buf; +std::string sys::getHostTriple() { + // FIXME: Adapt to running version. + return LLVM_HOSTTRIPLE; } From dpatel at apple.com Tue Mar 31 12:36:12 2009 From: dpatel at apple.com (Devang Patel) Date: Tue, 31 Mar 2009 17:36:12 -0000 Subject: [llvm-commits] [llvm] r68120 - in /llvm/trunk: lib/Transforms/Utils/InlineFunction.cpp test/Other/2009-03-31-CallGraph.ll Message-ID: <200903311736.n2VHaCjg017012@zion.cs.uiuc.edu> Author: dpatel Date: Tue Mar 31 12:36:12 2009 New Revision: 68120 URL: http://llvm.org/viewvc/llvm-project?rev=68120&view=rev Log: Update call graph after inlining invoke. Patch by Jay Foad. Added: llvm/trunk/test/Other/2009-03-31-CallGraph.ll Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp?rev=68120&r1=68119&r2=68120&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Tue Mar 31 12:36:12 2009 @@ -41,7 +41,8 @@ /// block of the inlined code (the last block is the end of the function), /// and InlineCodeInfo is information about the code that got inlined. static void HandleInlinedInvoke(InvokeInst *II, BasicBlock *FirstNewBlock, - ClonedCodeInfo &InlinedCodeInfo) { + ClonedCodeInfo &InlinedCodeInfo, + CallGraph *CG) { BasicBlock *InvokeDest = II->getUnwindDest(); std::vector InvokeDestPHIValues; @@ -93,6 +94,22 @@ // Make sure that anything using the call now uses the invoke! CI->replaceAllUsesWith(II); + // Update the callgraph. + if (CG) { + // We should be able to do this: + // (*CG)[Caller]->replaceCallSite(CI, II); + // but that fails if the old call site isn't in the call graph, + // which, because of LLVM bug 3601, it sometimes isn't. + CallGraphNode *CGN = (*CG)[Caller]; + for (CallGraphNode::iterator NI = CGN->begin(), NE = CGN->end(); + NI != NE; ++NI) { + if (NI->first == CI) { + NI->first = II; + break; + } + } + } + // Delete the unconditional branch inserted by splitBasicBlock BB->getInstList().pop_back(); Split->getInstList().pop_front(); // Delete the original call @@ -433,7 +450,7 @@ // any inlined 'unwind' instructions into branches to the invoke exception // destination, and call instructions into invoke instructions. if (InvokeInst *II = dyn_cast(TheCall)) - HandleInlinedInvoke(II, FirstNewBlock, InlinedFunctionInfo); + HandleInlinedInvoke(II, FirstNewBlock, InlinedFunctionInfo, CG); // If we cloned in _exactly one_ basic block, and if that block ends in a // return instruction, we splice the body of the inlined callee directly into Added: llvm/trunk/test/Other/2009-03-31-CallGraph.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/2009-03-31-CallGraph.ll?rev=68120&view=auto ============================================================================== --- llvm/trunk/test/Other/2009-03-31-CallGraph.ll (added) +++ llvm/trunk/test/Other/2009-03-31-CallGraph.ll Tue Mar 31 12:36:12 2009 @@ -0,0 +1,31 @@ +; RUN: llvm-as < %s | opt -inline -prune-eh -disable-output +define void @f2() { + invoke void @f6() + to label %ok1 unwind label %lpad1 + +ok1: + ret void + +lpad1: + invoke void @f4() + to label %ok2 unwind label %lpad2 + +ok2: + call void @f8() + unreachable + +lpad2: + unreachable +} + +declare void @f3() + +define void @f4() { + call void @f3() + ret void +} + +declare void @f6() nounwind + +declare void @f8() + From isanbard at gmail.com Tue Mar 31 13:18:28 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 31 Mar 2009 18:18:28 -0000 Subject: [llvm-commits] [llvm] r68123 - in /llvm/branches/Apple/Dib: lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp test/CodeGen/X86/live-out-reg-info.ll Message-ID: <200903311818.n2VIITEH018822@zion.cs.uiuc.edu> Author: void Date: Tue Mar 31 13:18:28 2009 New Revision: 68123 URL: http://llvm.org/viewvc/llvm-project?rev=68123&view=rev Log: --- Merging (from foreign repository) r68083 into '.': A test/CodeGen/X86/live-out-reg-info.ll U lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Fix live-out reg logic to not insert over-aggressive AssertZExt instructions. This fixes lua. Added: llvm/branches/Apple/Dib/test/CodeGen/X86/live-out-reg-info.ll Modified: llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Modified: llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp?rev=68123&r1=68122&r2=68123&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp (original) +++ llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Tue Mar 31 13:18:28 2009 @@ -4587,15 +4587,15 @@ isSExt = false, FromVT = MVT::i1; // ASSERT ZEXT 1 else if (NumSignBits > RegSize-8) isSExt = true, FromVT = MVT::i8; // ASSERT SEXT 8 - else if (NumZeroBits >= RegSize-9) + else if (NumZeroBits >= RegSize-8) isSExt = false, FromVT = MVT::i8; // ASSERT ZEXT 8 else if (NumSignBits > RegSize-16) isSExt = true, FromVT = MVT::i16; // ASSERT SEXT 16 - else if (NumZeroBits >= RegSize-17) + else if (NumZeroBits >= RegSize-16) isSExt = false, FromVT = MVT::i16; // ASSERT ZEXT 16 else if (NumSignBits > RegSize-32) isSExt = true, FromVT = MVT::i32; // ASSERT SEXT 32 - else if (NumZeroBits >= RegSize-33) + else if (NumZeroBits >= RegSize-32) isSExt = false, FromVT = MVT::i32; // ASSERT ZEXT 32 if (FromVT != MVT::Other) { Added: llvm/branches/Apple/Dib/test/CodeGen/X86/live-out-reg-info.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/test/CodeGen/X86/live-out-reg-info.ll?rev=68123&view=auto ============================================================================== --- llvm/branches/Apple/Dib/test/CodeGen/X86/live-out-reg-info.ll (added) +++ llvm/branches/Apple/Dib/test/CodeGen/X86/live-out-reg-info.ll Tue Mar 31 13:18:28 2009 @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep testl + +; Make sure dagcombine doesn't eliminate the comparison due +; to an off-by-one bug with ComputeMaskedBits information. + +declare void @qux() + +define void @foo(i32 %a) { + %t0 = lshr i32 %a, 23 + br label %next +next: + %t1 = and i32 %t0, 256 + %t2 = icmp eq i32 %t1, 0 + br i1 %t2, label %true, label %false +true: + call void @qux() + ret void +false: + ret void +} From gohman at apple.com Tue Mar 31 13:20:47 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 31 Mar 2009 18:20:47 -0000 Subject: [llvm-commits] [llvm] r68124 - in /llvm/trunk/test/CodeGen/X86: 2006-10-19-SwitchUnnecessaryBranching.ll 2007-06-04-tailmerge4.ll 2008-03-23-DarwinAsmComments.ll 2009-03-16-PHIElimInLPad.ll Message-ID: <200903311820.n2VIKloL018911@zion.cs.uiuc.edu> Author: djg Date: Tue Mar 31 13:20:47 2009 New Revision: 68124 URL: http://llvm.org/viewvc/llvm-project?rev=68124&view=rev Log: Add an explicit -asm-verbose to these tests, to make it possible to run the tests with -asm-verbose defaulting to false. Modified: llvm/trunk/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll llvm/trunk/test/CodeGen/X86/2007-06-04-tailmerge4.ll llvm/trunk/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll llvm/trunk/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll Modified: llvm/trunk/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll?rev=68124&r1=68123&r2=68124&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll (original) +++ llvm/trunk/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll Tue Mar 31 13:20:47 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | %prcontext je 1 | \ +; RUN: llvm-as < %s | llc -march=x86 -asm-verbose | %prcontext je 1 | \ ; RUN: grep BB1_1: @str = internal constant [14 x i8] c"Hello world!\0A\00" ; <[14 x i8]*> [#uses=1] Modified: llvm/trunk/test/CodeGen/X86/2007-06-04-tailmerge4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-06-04-tailmerge4.ll?rev=68124&r1=68123&r2=68124&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2007-06-04-tailmerge4.ll (original) +++ llvm/trunk/test/CodeGen/X86/2007-06-04-tailmerge4.ll Tue Mar 31 13:20:47 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -enable-eh | grep invcont131 +; RUN: llvm-as < %s | llc -enable-eh -asm-verbose | grep invcont131 ; PR 1496: tail merge was incorrectly removing this block ; ModuleID = 'report.1.bc' Modified: llvm/trunk/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll?rev=68124&r1=68123&r2=68124&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll (original) +++ llvm/trunk/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll Tue Mar 31 13:20:47 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep {#} | not grep -v {##} +; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -asm-verbose | grep {#} | not grep -v {##} %struct.AGenericCall = type { %struct.AGenericManager*, %struct.ComponentParameters*, i32* } %struct.AGenericManager = type <{ i8 }> Modified: llvm/trunk/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll?rev=68124&r1=68123&r2=68124&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll (original) +++ llvm/trunk/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll Tue Mar 31 13:20:47 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep -A 1 lpad | grep Llabel +; RUN: llvm-as < %s | llc -march=x86 -asm-verbose | grep -A 1 lpad | grep Llabel ; Check that register copies in the landing pad come after the EH_LABEL declare i32 @f() From dgregor at apple.com Tue Mar 31 13:31:03 2009 From: dgregor at apple.com (Douglas Gregor) Date: Tue, 31 Mar 2009 18:31:03 -0000 Subject: [llvm-commits] [llvm] r68126 - /llvm/trunk/include/llvm/ADT/PointerUnion.h Message-ID: <200903311831.n2VIV3k8019425@zion.cs.uiuc.edu> Author: dgregor Date: Tue Mar 31 13:31:03 2009 New Revision: 68126 URL: http://llvm.org/viewvc/llvm-project?rev=68126&view=rev Log: Stop guessing, start thinking, and make PointerUnion3::is actually be correct. Modified: llvm/trunk/include/llvm/ADT/PointerUnion.h Modified: llvm/trunk/include/llvm/ADT/PointerUnion.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/PointerUnion.h?rev=68126&r1=68125&r2=68126&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/PointerUnion.h (original) +++ llvm/trunk/include/llvm/ADT/PointerUnion.h Tue Mar 31 13:31:03 2009 @@ -183,9 +183,7 @@ // Is it PT1/PT2? if (::llvm::getPointerUnionTypeNum((T*)0) != -1) return Val.is() && Val.get().is(); - // Must be PT3 or statically invalid. - assert(Val.is()); - return true; + return Val.is(); } /// get() - Return the value of the specified pointer type. If the From foldr at codedgers.com Tue Mar 31 13:33:55 2009 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Tue, 31 Mar 2009 18:33:55 -0000 Subject: [llvm-commits] [llvm] r68127 - /llvm/trunk/tools/llvmc/plugins/Base/Base.td Message-ID: <200903311833.n2VIXtIe019531@zion.cs.uiuc.edu> Author: foldr Date: Tue Mar 31 13:33:54 2009 New Revision: 68127 URL: http://llvm.org/viewvc/llvm-project?rev=68127&view=rev Log: Do not pass '-relocation-model=pic' to llc. Does not work well on 32 bit targets. Bug reported by Albert Graef. This patch also adds new "-Wllc,option" syntax to pass options to llc. Modified: llvm/trunk/tools/llvmc/plugins/Base/Base.td Modified: llvm/trunk/tools/llvmc/plugins/Base/Base.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/plugins/Base/Base.td?rev=68127&r1=68126&r2=68127&view=diff ============================================================================== --- llvm/trunk/tools/llvmc/plugins/Base/Base.td (original) +++ llvm/trunk/tools/llvmc/plugins/Base/Base.td Tue Mar 31 13:33:54 2009 @@ -38,6 +38,8 @@ (help "Add a directory to include path")), (prefix_list_option "Wa,", (help "Pass options to assembler")), + (prefix_list_option "Wllc,", + (help "Pass options to llc")), (prefix_list_option "L", (help "Add a directory to link path")), (prefix_list_option "l", @@ -113,8 +115,10 @@ [(in_language "llvm-bitcode"), (out_language "assembler"), (output_suffix "s"), - (cmd_line "llc -relocation-model=pic -f $INFILE -o $OUTFILE"), - (actions (case (switch_on "S"), (stop_compilation))) + (cmd_line "llc -f $INFILE -o $OUTFILE"), + (actions (case + (switch_on "S"), (stop_compilation), + (not_empty "Wllc,"), (unpack_values "Wllc,"))) ]>; // Base class for linkers From gohman at apple.com Tue Mar 31 13:39:13 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 31 Mar 2009 18:39:13 -0000 Subject: [llvm-commits] [llvm] r68129 - in /llvm/trunk: include/llvm/CodeGen/MachineBasicBlock.h lib/CodeGen/MachineBasicBlock.cpp lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Message-ID: <200903311839.n2VIdDi8019797@zion.cs.uiuc.edu> Author: djg Date: Tue Mar 31 13:39:13 2009 New Revision: 68129 URL: http://llvm.org/viewvc/llvm-project?rev=68129&view=rev Log: Reapply 68073, with fixes. EH Landing-pad basic blocks are not entered via fall-through. Don't miss fallthroughs from blocks terminated by conditional branches. Also, move isOnlyReachableByFallthrough out of line. Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=68129&r1=68128&r2=68129&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Tue Mar 31 13:39:13 2009 @@ -253,6 +253,11 @@ /// it returns end() iterator getFirstTerminator(); + /// isOnlyReachableViaFallthough - Return true if this basic block has + /// exactly one predecessor and the control transfer mechanism between + /// the predecessor and this block is a fall-through. + bool isOnlyReachableByFallthrough() const; + void pop_front() { Insts.pop_front(); } void pop_back() { Insts.pop_back(); } void push_back(MachineInstr *MI) { Insts.push_back(MI); } Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=68129&r1=68128&r2=68129&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Tue Mar 31 13:39:13 2009 @@ -123,6 +123,16 @@ return I; } +bool +MachineBasicBlock::isOnlyReachableByFallthrough() const { + return !isLandingPad() && + !pred_empty() && + next(pred_begin()) == pred_end() && + (*pred_begin())->isLayoutSuccessor(this) && + ((*pred_begin())->empty() || + !(*pred_begin())->back().getDesc().isBarrier()); +} + void MachineBasicBlock::dump() const { print(*cerr.stream()); } Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=68129&r1=68128&r2=68129&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Tue Mar 31 13:39:13 2009 @@ -238,7 +238,10 @@ for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); I != E; ++I) { // Print a label for the basic block. - if (!I->pred_empty()) { + if (!VerboseAsm && (I->pred_empty() || I->isOnlyReachableByFallthrough())) { + // This is an entry block or a block that's only reachable via a + // fallthrough edge. In non-VerboseAsm mode, don't print the label. + } else { printBasicBlockLabel(I, true, true, VerboseAsm); O << '\n'; } From isanbard at gmail.com Tue Mar 31 13:42:31 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 31 Mar 2009 11:42:31 -0700 Subject: [llvm-commits] [llvm] r68129 - in /llvm/trunk: include/llvm/CodeGen/MachineBasicBlock.h lib/CodeGen/MachineBasicBlock.cpp lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp In-Reply-To: <200903311839.n2VIdDi8019797@zion.cs.uiuc.edu> References: <200903311839.n2VIdDi8019797@zion.cs.uiuc.edu> Message-ID: <16e5fdf90903311142i79ef8d42ja809cf56556048ed@mail.gmail.com> On Tue, Mar 31, 2009 at 11:39 AM, Dan Gohman wrote: > Author: djg > Date: Tue Mar 31 13:39:13 2009 > New Revision: 68129 > > URL: http://llvm.org/viewvc/llvm-project?rev=68129&view=rev > Log: > Reapply 68073, with fixes. EH Landing-pad basic blocks are not > entered via fall-through. Don't miss fallthroughs from blocks > terminated by conditional branches. Also, move > isOnlyReachableByFallthrough out of line. > Thanks, Dan! -bw From evan.cheng at apple.com Tue Mar 31 14:38:54 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 31 Mar 2009 19:38:54 -0000 Subject: [llvm-commits] [llvm] r68133 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200903311938.n2VJcsOG022044@zion.cs.uiuc.edu> Author: evancheng Date: Tue Mar 31 14:38:51 2009 New Revision: 68133 URL: http://llvm.org/viewvc/llvm-project?rev=68133&view=rev Log: i128 shift libcalls are not available on x86. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=68133&r1=68132&r2=68133&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Mar 31 14:38:51 2009 @@ -816,6 +816,13 @@ setOperationAction(ISD::UMULO, MVT::i32, Custom); setOperationAction(ISD::UMULO, MVT::i64, Custom); + if (!Subtarget->is64Bit()) { + // These libcalls are not available in 32-bit. + setLibcallName(RTLIB::SHL_I128, 0); + setLibcallName(RTLIB::SRL_I128, 0); + setLibcallName(RTLIB::SRA_I128, 0); + } + // We have target-specific dag combine patterns for the following nodes: setTargetDAGCombine(ISD::VECTOR_SHUFFLE); setTargetDAGCombine(ISD::BUILD_VECTOR); From evan.cheng at apple.com Tue Mar 31 14:39:24 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 31 Mar 2009 19:39:24 -0000 Subject: [llvm-commits] [llvm] r68134 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp lib/CodeGen/SelectionDAG/LegalizeTypes.h test/CodeGen/X86/shift-i128.ll test/CodeGen/X86/shift-i256.ll Message-ID: <200903311939.n2VJdO5S022073@zion.cs.uiuc.edu> Author: evancheng Date: Tue Mar 31 14:39:24 2009 New Revision: 68134 URL: http://llvm.org/viewvc/llvm-project?rev=68134&view=rev Log: Fully general expansion of integer shift of any size. Added: llvm/trunk/test/CodeGen/X86/shift-i128.ll llvm/trunk/test/CodeGen/X86/shift-i256.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=68134&r1=68133&r2=68134&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Tue Mar 31 14:39:24 2009 @@ -1231,6 +1231,78 @@ return false; } +/// ExpandShiftWithUnknownAmountBit - Fully general expansion of integer shift +/// of any size. +bool DAGTypeLegalizer:: +ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) { + SDValue Amt = N->getOperand(1); + MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0)); + MVT ShTy = Amt.getValueType(); + unsigned NVTBits = NVT.getSizeInBits(); + assert(isPowerOf2_32(NVTBits) && + "Expanded integer type size not a power of two!"); + DebugLoc dl = N->getDebugLoc(); + + // Get the incoming operand to be shifted. + SDValue InL, InH; + GetExpandedInteger(N->getOperand(0), InL, InH); + + SDValue NVBitsNode = DAG.getConstant(NVTBits, ShTy); + SDValue Amt2 = DAG.getNode(ISD::SUB, dl, ShTy, NVBitsNode, Amt); + SDValue Cmp = DAG.getSetCC(dl, TLI.getSetCCResultType(ShTy), + Amt, NVBitsNode, ISD::SETULT); + + SDValue Lo1, Hi1, Lo2, Hi2; + switch (N->getOpcode()) { + default: assert(0 && "Unknown shift"); + case ISD::SHL: + // ShAmt < NVTBits + Lo1 = DAG.getConstant(0, NVT); // Low part is zero. + Hi1 = DAG.getNode(ISD::SHL, dl, NVT, InL, Amt); // High part from Lo part. + + // ShAmt >= NVTBits + Lo2 = DAG.getNode(ISD::SHL, dl, NVT, InL, Amt); + Hi2 = DAG.getNode(ISD::OR, dl, NVT, + DAG.getNode(ISD::SHL, dl, NVT, InH, Amt), + DAG.getNode(ISD::SRL, dl, NVT, InL, Amt2)); + + Lo = DAG.getNode(ISD::SELECT, dl, NVT, Cmp, Lo1, Lo2); + Hi = DAG.getNode(ISD::SELECT, dl, NVT, Cmp, Hi1, Hi2); + return true; + case ISD::SRL: + // ShAmt < NVTBits + Hi1 = DAG.getConstant(0, NVT); // Hi part is zero. + Lo1 = DAG.getNode(ISD::SRL, dl, NVT, InH, Amt); // Lo part from Hi part. + + // ShAmt >= NVTBits + Hi2 = DAG.getNode(ISD::SRL, dl, NVT, InH, Amt); + Lo2 = DAG.getNode(ISD::OR, dl, NVT, + DAG.getNode(ISD::SRL, dl, NVT, InL, Amt), + DAG.getNode(ISD::SHL, dl, NVT, InH, Amt2)); + + Lo = DAG.getNode(ISD::SELECT, dl, NVT, Cmp, Lo1, Lo2); + Hi = DAG.getNode(ISD::SELECT, dl, NVT, Cmp, Hi1, Hi2); + return true; + case ISD::SRA: + // ShAmt < NVTBits + Hi1 = DAG.getNode(ISD::SRA, dl, NVT, InH, // Sign extend high part. + DAG.getConstant(NVTBits-1, ShTy)); + Lo1 = DAG.getNode(ISD::SRA, dl, NVT, InH, Amt); // Lo part from Hi part. + + // ShAmt >= NVTBits + Hi2 = DAG.getNode(ISD::SRA, dl, NVT, InH, Amt); + Lo2 = DAG.getNode(ISD::OR, dl, NVT, + DAG.getNode(ISD::SRL, dl, NVT, InL, Amt), + DAG.getNode(ISD::SHL, dl, NVT, InH, Amt2)); + + Lo = DAG.getNode(ISD::SELECT, dl, NVT, Cmp, Lo1, Lo2); + Hi = DAG.getNode(ISD::SELECT, dl, NVT, Cmp, Hi1, Hi2); + return true; + } + + return false; +} + void DAGTypeLegalizer::ExpandIntRes_ADDSUB(SDNode *N, SDValue &Lo, SDValue &Hi) { DebugLoc dl = N->getDebugLoc(); @@ -1792,10 +1864,15 @@ else if (VT == MVT::i128) LC = RTLIB::SRA_I128; } - assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported shift!"); + + if (LC != RTLIB::UNKNOWN_LIBCALL && TLI.getLibcallName(LC)) { + SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) }; + SplitInteger(MakeLibCall(LC, VT, Ops, 2, isSigned, dl), Lo, Hi); + return; + } - SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) }; - SplitInteger(MakeLibCall(LC, VT, Ops, 2, isSigned, dl), Lo, Hi); + if (!ExpandShiftWithUnknownAmountBit(N, Lo, Hi)) + assert(0 && "Unsupported shift!"); } void DAGTypeLegalizer::ExpandIntRes_SIGN_EXTEND(SDNode *N, Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=68134&r1=68133&r2=68134&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Tue Mar 31 14:39:24 2009 @@ -353,6 +353,7 @@ void ExpandShiftByConstant(SDNode *N, unsigned Amt, SDValue &Lo, SDValue &Hi); bool ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi); + bool ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi); // Integer Operand Expansion. bool ExpandIntegerOperand(SDNode *N, unsigned OperandNo); Added: llvm/trunk/test/CodeGen/X86/shift-i128.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-i128.ll?rev=68134&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/shift-i128.ll (added) +++ llvm/trunk/test/CodeGen/X86/shift-i128.ll Tue Mar 31 14:39:24 2009 @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=x86 +; RUN: llvm-as < %s | llc -march=x86-64 + +define void @t(i128 %x, i128 %a, i128* nocapture %r) nounwind { +entry: + %0 = lshr i128 %x, %a + store i128 %0, i128* %r, align 16 + ret void +} Added: llvm/trunk/test/CodeGen/X86/shift-i256.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-i256.ll?rev=68134&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/shift-i256.ll (added) +++ llvm/trunk/test/CodeGen/X86/shift-i256.ll Tue Mar 31 14:39:24 2009 @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=x86 +; RUN: llvm-as < %s | llc -march=x86-64 + +define void @t(i256 %x, i256 %a, i256* nocapture %r) nounwind readnone { +entry: + %0 = ashr i256 %x, %a + store i256 %0, i256* %r + ret void +} From isanbard at gmail.com Tue Mar 31 15:05:03 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 31 Mar 2009 20:05:03 -0000 Subject: [llvm-commits] [llvm] r68135 - in /llvm/branches/Apple/Dib: include/llvm/CodeGen/MachineBasicBlock.h lib/CodeGen/MachineBasicBlock.cpp lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Message-ID: <200903312005.n2VK53M5023217@zion.cs.uiuc.edu> Author: void Date: Tue Mar 31 15:05:03 2009 New Revision: 68135 URL: http://llvm.org/viewvc/llvm-project?rev=68135&view=rev Log: --- Merging (from foreign repository) r68129 into '.': U include/llvm/CodeGen/MachineBasicBlock.h U lib/CodeGen/MachineBasicBlock.cpp U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Reapply 68073, with fixes. EH Landing-pad basic blocks are not entered via fall-through. Don't miss fallthroughs from blocks terminated by conditional branches. Also, move isOnlyReachableByFallthrough out of line. Modified: llvm/branches/Apple/Dib/include/llvm/CodeGen/MachineBasicBlock.h llvm/branches/Apple/Dib/lib/CodeGen/MachineBasicBlock.cpp llvm/branches/Apple/Dib/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Modified: llvm/branches/Apple/Dib/include/llvm/CodeGen/MachineBasicBlock.h URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/include/llvm/CodeGen/MachineBasicBlock.h?rev=68135&r1=68134&r2=68135&view=diff ============================================================================== --- llvm/branches/Apple/Dib/include/llvm/CodeGen/MachineBasicBlock.h (original) +++ llvm/branches/Apple/Dib/include/llvm/CodeGen/MachineBasicBlock.h Tue Mar 31 15:05:03 2009 @@ -253,6 +253,11 @@ /// it returns end() iterator getFirstTerminator(); + /// isOnlyReachableViaFallthough - Return true if this basic block has + /// exactly one predecessor and the control transfer mechanism between + /// the predecessor and this block is a fall-through. + bool isOnlyReachableByFallthrough() const; + void pop_front() { Insts.pop_front(); } void pop_back() { Insts.pop_back(); } void push_back(MachineInstr *MI) { Insts.push_back(MI); } Modified: llvm/branches/Apple/Dib/lib/CodeGen/MachineBasicBlock.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/CodeGen/MachineBasicBlock.cpp?rev=68135&r1=68134&r2=68135&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/CodeGen/MachineBasicBlock.cpp (original) +++ llvm/branches/Apple/Dib/lib/CodeGen/MachineBasicBlock.cpp Tue Mar 31 15:05:03 2009 @@ -123,6 +123,16 @@ return I; } +bool +MachineBasicBlock::isOnlyReachableByFallthrough() const { + return !isLandingPad() && + !pred_empty() && + next(pred_begin()) == pred_end() && + (*pred_begin())->isLayoutSuccessor(this) && + ((*pred_begin())->empty() || + !(*pred_begin())->back().getDesc().isBarrier()); +} + void MachineBasicBlock::dump() const { print(*cerr.stream()); } Modified: llvm/branches/Apple/Dib/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=68135&r1=68134&r2=68135&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original) +++ llvm/branches/Apple/Dib/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Tue Mar 31 15:05:03 2009 @@ -238,7 +238,10 @@ for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); I != E; ++I) { // Print a label for the basic block. - if (!I->pred_empty()) { + if (!VerboseAsm && (I->pred_empty() || I->isOnlyReachableByFallthrough())) { + // This is an entry block or a block that's only reachable via a + // fallthrough edge. In non-VerboseAsm mode, don't print the label. + } else { printBasicBlockLabel(I, true, true, VerboseAsm); O << '\n'; } From isanbard at gmail.com Tue Mar 31 15:08:06 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 31 Mar 2009 20:08:06 -0000 Subject: [llvm-commits] [llvm] r68137 - in /llvm/branches/Apple/Dib: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp lib/CodeGen/SelectionDAG/LegalizeTypes.h lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/shift-i128.ll test/CodeGen/X86/shift-i256.ll Message-ID: <200903312008.n2VK86GF023375@zion.cs.uiuc.edu> Author: void Date: Tue Mar 31 15:08:05 2009 New Revision: 68137 URL: http://llvm.org/viewvc/llvm-project?rev=68137&view=rev Log: --- Merging (from foreign repository) r68133 into '.': U lib/Target/X86/X86ISelLowering.cpp i128 shift libcalls are not available on x86. --- Merging (from foreign repository) r68134 into '.': A test/CodeGen/X86/shift-i128.ll A test/CodeGen/X86/shift-i256.ll U lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp U lib/CodeGen/SelectionDAG/LegalizeTypes.h Fully general expansion of integer shift of any size. Added: llvm/branches/Apple/Dib/test/CodeGen/X86/shift-i128.ll llvm/branches/Apple/Dib/test/CodeGen/X86/shift-i256.ll Modified: llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/LegalizeTypes.h llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=68137&r1=68136&r2=68137&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original) +++ llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Tue Mar 31 15:08:05 2009 @@ -1231,6 +1231,78 @@ return false; } +/// ExpandShiftWithUnknownAmountBit - Fully general expansion of integer shift +/// of any size. +bool DAGTypeLegalizer:: +ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) { + SDValue Amt = N->getOperand(1); + MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0)); + MVT ShTy = Amt.getValueType(); + unsigned NVTBits = NVT.getSizeInBits(); + assert(isPowerOf2_32(NVTBits) && + "Expanded integer type size not a power of two!"); + DebugLoc dl = N->getDebugLoc(); + + // Get the incoming operand to be shifted. + SDValue InL, InH; + GetExpandedInteger(N->getOperand(0), InL, InH); + + SDValue NVBitsNode = DAG.getConstant(NVTBits, ShTy); + SDValue Amt2 = DAG.getNode(ISD::SUB, dl, ShTy, NVBitsNode, Amt); + SDValue Cmp = DAG.getSetCC(dl, TLI.getSetCCResultType(ShTy), + Amt, NVBitsNode, ISD::SETULT); + + SDValue Lo1, Hi1, Lo2, Hi2; + switch (N->getOpcode()) { + default: assert(0 && "Unknown shift"); + case ISD::SHL: + // ShAmt < NVTBits + Lo1 = DAG.getConstant(0, NVT); // Low part is zero. + Hi1 = DAG.getNode(ISD::SHL, dl, NVT, InL, Amt); // High part from Lo part. + + // ShAmt >= NVTBits + Lo2 = DAG.getNode(ISD::SHL, dl, NVT, InL, Amt); + Hi2 = DAG.getNode(ISD::OR, dl, NVT, + DAG.getNode(ISD::SHL, dl, NVT, InH, Amt), + DAG.getNode(ISD::SRL, dl, NVT, InL, Amt2)); + + Lo = DAG.getNode(ISD::SELECT, dl, NVT, Cmp, Lo1, Lo2); + Hi = DAG.getNode(ISD::SELECT, dl, NVT, Cmp, Hi1, Hi2); + return true; + case ISD::SRL: + // ShAmt < NVTBits + Hi1 = DAG.getConstant(0, NVT); // Hi part is zero. + Lo1 = DAG.getNode(ISD::SRL, dl, NVT, InH, Amt); // Lo part from Hi part. + + // ShAmt >= NVTBits + Hi2 = DAG.getNode(ISD::SRL, dl, NVT, InH, Amt); + Lo2 = DAG.getNode(ISD::OR, dl, NVT, + DAG.getNode(ISD::SRL, dl, NVT, InL, Amt), + DAG.getNode(ISD::SHL, dl, NVT, InH, Amt2)); + + Lo = DAG.getNode(ISD::SELECT, dl, NVT, Cmp, Lo1, Lo2); + Hi = DAG.getNode(ISD::SELECT, dl, NVT, Cmp, Hi1, Hi2); + return true; + case ISD::SRA: + // ShAmt < NVTBits + Hi1 = DAG.getNode(ISD::SRA, dl, NVT, InH, // Sign extend high part. + DAG.getConstant(NVTBits-1, ShTy)); + Lo1 = DAG.getNode(ISD::SRA, dl, NVT, InH, Amt); // Lo part from Hi part. + + // ShAmt >= NVTBits + Hi2 = DAG.getNode(ISD::SRA, dl, NVT, InH, Amt); + Lo2 = DAG.getNode(ISD::OR, dl, NVT, + DAG.getNode(ISD::SRL, dl, NVT, InL, Amt), + DAG.getNode(ISD::SHL, dl, NVT, InH, Amt2)); + + Lo = DAG.getNode(ISD::SELECT, dl, NVT, Cmp, Lo1, Lo2); + Hi = DAG.getNode(ISD::SELECT, dl, NVT, Cmp, Hi1, Hi2); + return true; + } + + return false; +} + void DAGTypeLegalizer::ExpandIntRes_ADDSUB(SDNode *N, SDValue &Lo, SDValue &Hi) { DebugLoc dl = N->getDebugLoc(); @@ -1792,10 +1864,15 @@ else if (VT == MVT::i128) LC = RTLIB::SRA_I128; } - assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported shift!"); + + if (LC != RTLIB::UNKNOWN_LIBCALL && TLI.getLibcallName(LC)) { + SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) }; + SplitInteger(MakeLibCall(LC, VT, Ops, 2, isSigned, dl), Lo, Hi); + return; + } - SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) }; - SplitInteger(MakeLibCall(LC, VT, Ops, 2, isSigned, dl), Lo, Hi); + if (!ExpandShiftWithUnknownAmountBit(N, Lo, Hi)) + assert(0 && "Unsupported shift!"); } void DAGTypeLegalizer::ExpandIntRes_SIGN_EXTEND(SDNode *N, Modified: llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/LegalizeTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=68137&r1=68136&r2=68137&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original) +++ llvm/branches/Apple/Dib/lib/CodeGen/SelectionDAG/LegalizeTypes.h Tue Mar 31 15:08:05 2009 @@ -353,6 +353,7 @@ void ExpandShiftByConstant(SDNode *N, unsigned Amt, SDValue &Lo, SDValue &Hi); bool ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi); + bool ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi); // Integer Operand Expansion. bool ExpandIntegerOperand(SDNode *N, unsigned OperandNo); Modified: llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp?rev=68137&r1=68136&r2=68137&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp Tue Mar 31 15:08:05 2009 @@ -816,6 +816,13 @@ setOperationAction(ISD::UMULO, MVT::i32, Custom); setOperationAction(ISD::UMULO, MVT::i64, Custom); + if (!Subtarget->is64Bit()) { + // These libcalls are not available in 32-bit. + setLibcallName(RTLIB::SHL_I128, 0); + setLibcallName(RTLIB::SRL_I128, 0); + setLibcallName(RTLIB::SRA_I128, 0); + } + // We have target-specific dag combine patterns for the following nodes: setTargetDAGCombine(ISD::VECTOR_SHUFFLE); setTargetDAGCombine(ISD::BUILD_VECTOR); Added: llvm/branches/Apple/Dib/test/CodeGen/X86/shift-i128.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/test/CodeGen/X86/shift-i128.ll?rev=68137&view=auto ============================================================================== --- llvm/branches/Apple/Dib/test/CodeGen/X86/shift-i128.ll (added) +++ llvm/branches/Apple/Dib/test/CodeGen/X86/shift-i128.ll Tue Mar 31 15:08:05 2009 @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=x86 +; RUN: llvm-as < %s | llc -march=x86-64 + +define void @t(i128 %x, i128 %a, i128* nocapture %r) nounwind { +entry: + %0 = lshr i128 %x, %a + store i128 %0, i128* %r, align 16 + ret void +} Added: llvm/branches/Apple/Dib/test/CodeGen/X86/shift-i256.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/test/CodeGen/X86/shift-i256.ll?rev=68137&view=auto ============================================================================== --- llvm/branches/Apple/Dib/test/CodeGen/X86/shift-i256.ll (added) +++ llvm/branches/Apple/Dib/test/CodeGen/X86/shift-i256.ll Tue Mar 31 15:08:05 2009 @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=x86 +; RUN: llvm-as < %s | llc -march=x86-64 + +define void @t(i256 %x, i256 %a, i256* nocapture %r) nounwind readnone { +entry: + %0 = ashr i256 %x, %a + store i256 %0, i256* %r + ret void +} From evan.cheng at apple.com Tue Mar 31 15:42:46 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 31 Mar 2009 20:42:46 -0000 Subject: [llvm-commits] [llvm] r68142 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/select-2.ll Message-ID: <200903312042.n2VKgkQ5025152@zion.cs.uiuc.edu> Author: evancheng Date: Tue Mar 31 15:42:45 2009 New Revision: 68142 URL: http://llvm.org/viewvc/llvm-project?rev=68142&view=rev Log: Throttle back "fold select into operand" transformation. InstCombine should not generate selects of two constants unless they are selects of 0 and 1. e.g. define i32 @t1(i32 %c, i32 %x) nounwind { %t1 = icmp eq i32 %c, 0 %t2 = lshr i32 %x, 18 %t3 = select i1 %t1, i32 %t2, i32 %x ret i32 %t3 } was turned into define i32 @t2(i32 %c, i32 %x) nounwind { %t1 = icmp eq i32 %c, 0 %t2 = select i1 %t1, i32 18, i32 0 %t3 = lshr i32 %x, %t2 ret i32 %t3 } For most targets, that means materializing two constants and then a select. e.g. On x86-64 movl %esi, %eax shrl $18, %eax testl %edi, %edi cmovne %esi, %eax ret => xorl %eax, %eax testl %edi, %edi movl $18, %ecx cmovne %eax, %ecx movl %esi, %eax shrl %cl, %eax ret Also, the optimizer and codegen can reason about shl / and / add, etc. by a constant. This optimization will hinder optimizations using ComputeMaskedBits. Added: llvm/trunk/test/Transforms/InstCombine/select-2.ll Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=68142&r1=68141&r2=68142&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Mar 31 15:42:45 2009 @@ -223,6 +223,7 @@ Instruction *visitBitCast(BitCastInst &CI); Instruction *FoldSelectOpOp(SelectInst &SI, Instruction *TI, Instruction *FI); + Instruction *FoldSelectIntoOp(SelectInst &SI, Value*, Value*); Instruction *visitSelectInst(SelectInst &SI); Instruction *visitSelectInstWithICmp(SelectInst &SI, ICmpInst *ICI); Instruction *visitCallInst(CallInst &CI); @@ -8836,6 +8837,83 @@ return 0; } +static bool isSelect01(Constant *C1, Constant *C2) { + ConstantInt *C1I = dyn_cast(C1); + if (!C1I) + return false; + ConstantInt *C2I = dyn_cast(C2); + if (!C2I) + return false; + return (C1I->isZero() || C1I->isOne()) && (C2I->isZero() || C2I->isOne()); +} + +/// FoldSelectIntoOp - Try fold the select into one of the operands to +/// facilitate further optimization. +Instruction *InstCombiner::FoldSelectIntoOp(SelectInst &SI, Value *TrueVal, + Value *FalseVal) { + // See the comment above GetSelectFoldableOperands for a description of the + // transformation we are doing here. + if (Instruction *TVI = dyn_cast(TrueVal)) { + if (TVI->hasOneUse() && TVI->getNumOperands() == 2 && + !isa(FalseVal)) { + if (unsigned SFO = GetSelectFoldableOperands(TVI)) { + unsigned OpToFold = 0; + if ((SFO & 1) && FalseVal == TVI->getOperand(0)) { + OpToFold = 1; + } else if ((SFO & 2) && FalseVal == TVI->getOperand(1)) { + OpToFold = 2; + } + + if (OpToFold) { + Constant *C = GetSelectFoldableConstant(TVI); + Value *OOp = TVI->getOperand(2-OpToFold); + // Avoid creating select between 2 constants unless it's selecting + // between 0 and 1. + if (!isa(OOp) || isSelect01(C, cast(OOp))) { + Instruction *NewSel = SelectInst::Create(SI.getCondition(), OOp, C); + InsertNewInstBefore(NewSel, SI); + NewSel->takeName(TVI); + if (BinaryOperator *BO = dyn_cast(TVI)) + return BinaryOperator::Create(BO->getOpcode(), FalseVal, NewSel); + assert(0 && "Unknown instruction!!"); + } + } + } + } + } + + if (Instruction *FVI = dyn_cast(FalseVal)) { + if (FVI->hasOneUse() && FVI->getNumOperands() == 2 && + !isa(TrueVal)) { + if (unsigned SFO = GetSelectFoldableOperands(FVI)) { + unsigned OpToFold = 0; + if ((SFO & 1) && TrueVal == FVI->getOperand(0)) { + OpToFold = 1; + } else if ((SFO & 2) && TrueVal == FVI->getOperand(1)) { + OpToFold = 2; + } + + if (OpToFold) { + Constant *C = GetSelectFoldableConstant(FVI); + Value *OOp = FVI->getOperand(2-OpToFold); + // Avoid creating select between 2 constants unless it's selecting + // between 0 and 1. + if (!isa(OOp) || isSelect01(C, cast(OOp))) { + Instruction *NewSel = SelectInst::Create(SI.getCondition(), C, OOp); + InsertNewInstBefore(NewSel, SI); + NewSel->takeName(FVI); + if (BinaryOperator *BO = dyn_cast(FVI)) + return BinaryOperator::Create(BO->getOpcode(), TrueVal, NewSel); + assert(0 && "Unknown instruction!!"); + } + } + } + } + } + + return 0; +} + /// visitSelectInstWithICmp - Visit a SelectInst that has an /// ICmpInst as its first operand. /// @@ -9181,58 +9259,9 @@ // See if we can fold the select into one of our operands. if (SI.getType()->isInteger()) { - // See the comment above GetSelectFoldableOperands for a description of the - // transformation we are doing here. - if (Instruction *TVI = dyn_cast(TrueVal)) - if (TVI->hasOneUse() && TVI->getNumOperands() == 2 && - !isa(FalseVal)) - if (unsigned SFO = GetSelectFoldableOperands(TVI)) { - unsigned OpToFold = 0; - if ((SFO & 1) && FalseVal == TVI->getOperand(0)) { - OpToFold = 1; - } else if ((SFO & 2) && FalseVal == TVI->getOperand(1)) { - OpToFold = 2; - } - - if (OpToFold) { - Constant *C = GetSelectFoldableConstant(TVI); - Instruction *NewSel = - SelectInst::Create(SI.getCondition(), - TVI->getOperand(2-OpToFold), C); - InsertNewInstBefore(NewSel, SI); - NewSel->takeName(TVI); - if (BinaryOperator *BO = dyn_cast(TVI)) - return BinaryOperator::Create(BO->getOpcode(), FalseVal, NewSel); - else { - assert(0 && "Unknown instruction!!"); - } - } - } - - if (Instruction *FVI = dyn_cast(FalseVal)) - if (FVI->hasOneUse() && FVI->getNumOperands() == 2 && - !isa(TrueVal)) - if (unsigned SFO = GetSelectFoldableOperands(FVI)) { - unsigned OpToFold = 0; - if ((SFO & 1) && TrueVal == FVI->getOperand(0)) { - OpToFold = 1; - } else if ((SFO & 2) && TrueVal == FVI->getOperand(1)) { - OpToFold = 2; - } - - if (OpToFold) { - Constant *C = GetSelectFoldableConstant(FVI); - Instruction *NewSel = - SelectInst::Create(SI.getCondition(), C, - FVI->getOperand(2-OpToFold)); - InsertNewInstBefore(NewSel, SI); - NewSel->takeName(FVI); - if (BinaryOperator *BO = dyn_cast(FVI)) - return BinaryOperator::Create(BO->getOpcode(), TrueVal, NewSel); - else - assert(0 && "Unknown instruction!!"); - } - } + Instruction *FoldI = FoldSelectIntoOp(SI, TrueVal, FalseVal); + if (FoldI) + return FoldI; } if (BinaryOperator::isNot(CondVal)) { Added: llvm/trunk/test/Transforms/InstCombine/select-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/select-2.ll?rev=68142&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/select-2.ll (added) +++ llvm/trunk/test/Transforms/InstCombine/select-2.ll Tue Mar 31 15:42:45 2009 @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep select | count 2 + +; Make sure instcombine don't fold select into operands. We don't want to emit +; select of two integers unless it's selecting 0 / 1. + +define i32 @t1(i32 %c, i32 %x) nounwind { + %t1 = icmp eq i32 %c, 0 + %t2 = lshr i32 %x, 18 + %t3 = select i1 %t1, i32 %t2, i32 %x + ret i32 %t3 +} + +define i32 @t2(i32 %c, i32 %x) nounwind { + %t1 = icmp eq i32 %c, 0 + %t2 = and i32 %x, 18 + %t3 = select i1 %t1, i32 %t2, i32 %x + ret i32 %t3 +} From isanbard at gmail.com Tue Mar 31 15:52:46 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 31 Mar 2009 20:52:46 -0000 Subject: [llvm-commits] [llvm] r68143 - in /llvm/branches/Apple/Dib: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/select-2.ll Message-ID: <200903312052.n2VKqkjJ025517@zion.cs.uiuc.edu> Author: void Date: Tue Mar 31 15:52:46 2009 New Revision: 68143 URL: http://llvm.org/viewvc/llvm-project?rev=68143&view=rev Log: --- Merging (from foreign repository) r68142 into '.': A test/Transforms/InstCombine/select-2.ll U lib/Transforms/Scalar/InstructionCombining.cpp Throttle back "fold select into operand" transformation. InstCombine should not generate selects of two constants unless they are selects of 0 and 1. e.g. define i32 @t1(i32 %c, i32 %x) nounwind { %t1 = icmp eq i32 %c, 0 %t2 = lshr i32 %x, 18 %t3 = select i1 %t1, i32 %t2, i32 %x ret i32 %t3 } was turned into define i32 @t2(i32 %c, i32 %x) nounwind { %t1 = icmp eq i32 %c, 0 %t2 = select i1 %t1, i32 18, i32 0 %t3 = lshr i32 %x, %t2 ret i32 %t3 } For most targets, that means materializing two constants and then a select. e.g. On x86-64 movl %esi, %eax shrl $18, %eax testl %edi, %edi cmovne %esi, %eax ret => xorl %eax, %eax testl %edi, %edi movl $18, %ecx cmovne %eax, %ecx movl %esi, %eax shrl %cl, %eax ret Also, the optimizer and codegen can reason about shl / and / add, etc. by a constant. This optimization will hinder optimizations using ComputeMaskedBits. Added: llvm/branches/Apple/Dib/test/Transforms/InstCombine/select-2.ll Modified: llvm/branches/Apple/Dib/lib/Transforms/Scalar/InstructionCombining.cpp Modified: llvm/branches/Apple/Dib/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Transforms/Scalar/InstructionCombining.cpp?rev=68143&r1=68142&r2=68143&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/branches/Apple/Dib/lib/Transforms/Scalar/InstructionCombining.cpp Tue Mar 31 15:52:46 2009 @@ -223,6 +223,7 @@ Instruction *visitBitCast(BitCastInst &CI); Instruction *FoldSelectOpOp(SelectInst &SI, Instruction *TI, Instruction *FI); + Instruction *FoldSelectIntoOp(SelectInst &SI, Value*, Value*); Instruction *visitSelectInst(SelectInst &SI); Instruction *visitSelectInstWithICmp(SelectInst &SI, ICmpInst *ICI); Instruction *visitCallInst(CallInst &CI); @@ -8820,6 +8821,83 @@ return 0; } +static bool isSelect01(Constant *C1, Constant *C2) { + ConstantInt *C1I = dyn_cast(C1); + if (!C1I) + return false; + ConstantInt *C2I = dyn_cast(C2); + if (!C2I) + return false; + return (C1I->isZero() || C1I->isOne()) && (C2I->isZero() || C2I->isOne()); +} + +/// FoldSelectIntoOp - Try fold the select into one of the operands to +/// facilitate further optimization. +Instruction *InstCombiner::FoldSelectIntoOp(SelectInst &SI, Value *TrueVal, + Value *FalseVal) { + // See the comment above GetSelectFoldableOperands for a description of the + // transformation we are doing here. + if (Instruction *TVI = dyn_cast(TrueVal)) { + if (TVI->hasOneUse() && TVI->getNumOperands() == 2 && + !isa(FalseVal)) { + if (unsigned SFO = GetSelectFoldableOperands(TVI)) { + unsigned OpToFold = 0; + if ((SFO & 1) && FalseVal == TVI->getOperand(0)) { + OpToFold = 1; + } else if ((SFO & 2) && FalseVal == TVI->getOperand(1)) { + OpToFold = 2; + } + + if (OpToFold) { + Constant *C = GetSelectFoldableConstant(TVI); + Value *OOp = TVI->getOperand(2-OpToFold); + // Avoid creating select between 2 constants unless it's selecting + // between 0 and 1. + if (!isa(OOp) || isSelect01(C, cast(OOp))) { + Instruction *NewSel = SelectInst::Create(SI.getCondition(), OOp, C); + InsertNewInstBefore(NewSel, SI); + NewSel->takeName(TVI); + if (BinaryOperator *BO = dyn_cast(TVI)) + return BinaryOperator::Create(BO->getOpcode(), FalseVal, NewSel); + assert(0 && "Unknown instruction!!"); + } + } + } + } + } + + if (Instruction *FVI = dyn_cast(FalseVal)) { + if (FVI->hasOneUse() && FVI->getNumOperands() == 2 && + !isa(TrueVal)) { + if (unsigned SFO = GetSelectFoldableOperands(FVI)) { + unsigned OpToFold = 0; + if ((SFO & 1) && TrueVal == FVI->getOperand(0)) { + OpToFold = 1; + } else if ((SFO & 2) && TrueVal == FVI->getOperand(1)) { + OpToFold = 2; + } + + if (OpToFold) { + Constant *C = GetSelectFoldableConstant(FVI); + Value *OOp = FVI->getOperand(2-OpToFold); + // Avoid creating select between 2 constants unless it's selecting + // between 0 and 1. + if (!isa(OOp) || isSelect01(C, cast(OOp))) { + Instruction *NewSel = SelectInst::Create(SI.getCondition(), C, OOp); + InsertNewInstBefore(NewSel, SI); + NewSel->takeName(FVI); + if (BinaryOperator *BO = dyn_cast(FVI)) + return BinaryOperator::Create(BO->getOpcode(), TrueVal, NewSel); + assert(0 && "Unknown instruction!!"); + } + } + } + } + } + + return 0; +} + /// visitSelectInstWithICmp - Visit a SelectInst that has an /// ICmpInst as its first operand. /// @@ -9165,58 +9243,9 @@ // See if we can fold the select into one of our operands. if (SI.getType()->isInteger()) { - // See the comment above GetSelectFoldableOperands for a description of the - // transformation we are doing here. - if (Instruction *TVI = dyn_cast(TrueVal)) - if (TVI->hasOneUse() && TVI->getNumOperands() == 2 && - !isa(FalseVal)) - if (unsigned SFO = GetSelectFoldableOperands(TVI)) { - unsigned OpToFold = 0; - if ((SFO & 1) && FalseVal == TVI->getOperand(0)) { - OpToFold = 1; - } else if ((SFO & 2) && FalseVal == TVI->getOperand(1)) { - OpToFold = 2; - } - - if (OpToFold) { - Constant *C = GetSelectFoldableConstant(TVI); - Instruction *NewSel = - SelectInst::Create(SI.getCondition(), - TVI->getOperand(2-OpToFold), C); - InsertNewInstBefore(NewSel, SI); - NewSel->takeName(TVI); - if (BinaryOperator *BO = dyn_cast(TVI)) - return BinaryOperator::Create(BO->getOpcode(), FalseVal, NewSel); - else { - assert(0 && "Unknown instruction!!"); - } - } - } - - if (Instruction *FVI = dyn_cast(FalseVal)) - if (FVI->hasOneUse() && FVI->getNumOperands() == 2 && - !isa(TrueVal)) - if (unsigned SFO = GetSelectFoldableOperands(FVI)) { - unsigned OpToFold = 0; - if ((SFO & 1) && TrueVal == FVI->getOperand(0)) { - OpToFold = 1; - } else if ((SFO & 2) && TrueVal == FVI->getOperand(1)) { - OpToFold = 2; - } - - if (OpToFold) { - Constant *C = GetSelectFoldableConstant(FVI); - Instruction *NewSel = - SelectInst::Create(SI.getCondition(), C, - FVI->getOperand(2-OpToFold)); - InsertNewInstBefore(NewSel, SI); - NewSel->takeName(FVI); - if (BinaryOperator *BO = dyn_cast(FVI)) - return BinaryOperator::Create(BO->getOpcode(), TrueVal, NewSel); - else - assert(0 && "Unknown instruction!!"); - } - } + Instruction *FoldI = FoldSelectIntoOp(SI, TrueVal, FalseVal); + if (FoldI) + return FoldI; } if (BinaryOperator::isNot(CondVal)) { Added: llvm/branches/Apple/Dib/test/Transforms/InstCombine/select-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/test/Transforms/InstCombine/select-2.ll?rev=68143&view=auto ============================================================================== --- llvm/branches/Apple/Dib/test/Transforms/InstCombine/select-2.ll (added) +++ llvm/branches/Apple/Dib/test/Transforms/InstCombine/select-2.ll Tue Mar 31 15:52:46 2009 @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep select | count 2 + +; Make sure instcombine don't fold select into operands. We don't want to emit +; select of two integers unless it's selecting 0 / 1. + +define i32 @t1(i32 %c, i32 %x) nounwind { + %t1 = icmp eq i32 %c, 0 + %t2 = lshr i32 %x, 18 + %t3 = select i1 %t1, i32 %t2, i32 %x + ret i32 %t3 +} + +define i32 @t2(i32 %c, i32 %x) nounwind { + %t1 = icmp eq i32 %c, 0 + %t2 = and i32 %x, 18 + %t3 = select i1 %t1, i32 %t2, i32 %x + ret i32 %t3 +} From sabre at nondot.org Tue Mar 31 15:57:23 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 31 Mar 2009 20:57:23 -0000 Subject: [llvm-commits] [llvm] r68145 - /llvm/trunk/include/llvm/ADT/DenseMap.h Message-ID: <200903312057.n2VKvNPo025764@zion.cs.uiuc.edu> Author: lattner Date: Tue Mar 31 15:57:23 2009 New Revision: 68145 URL: http://llvm.org/viewvc/llvm-project?rev=68145&view=rev Log: add some accessors so I can play games with DenseMaps. Modified: llvm/trunk/include/llvm/ADT/DenseMap.h Modified: llvm/trunk/include/llvm/ADT/DenseMap.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/DenseMap.h?rev=68145&r1=68144&r2=68145&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/DenseMap.h (original) +++ llvm/trunk/include/llvm/ADT/DenseMap.h Tue Mar 31 15:57:23 2009 @@ -279,6 +279,18 @@ return *this; } + /// isPointerIntoBucketsArray - Return true if the specified pointer points + /// somewhere into the DenseMap's array of buckets (i.e. either to a key or + /// value in the DenseMap). + bool isPointerIntoBucketsArray(const void *Ptr) const { + return Ptr >= Buckets && Ptr < Buckets+NumBuckets; + } + + /// getPointerIntoBucketsArray() - Return an opaque pointer into the buckets + /// array. In conjunction with the previous method, this can be used to + /// determine whether an insertion caused the DenseMap to reallocate. + const void *getPointerIntoBucketsArray() const { return Buckets; } + private: void CopyFrom(const DenseMap& other) { if (NumBuckets != 0 && (!KeyInfoT::isPod() || !ValueInfoT::isPod())) { From sabre at nondot.org Tue Mar 31 16:28:39 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 31 Mar 2009 21:28:39 -0000 Subject: [llvm-commits] [llvm] r68147 - in /llvm/trunk/include/llvm: Support/PointerLikeTypeTraits.h Use.h Message-ID: <200903312128.n2VLSd0w027118@zion.cs.uiuc.edu> Author: lattner Date: Tue Mar 31 16:28:39 2009 New Revision: 68147 URL: http://llvm.org/viewvc/llvm-project?rev=68147&view=rev Log: teach PointerLikeTypeTraits that all pointers to pointers may only be 4-byte aligned. Modified: llvm/trunk/include/llvm/Support/PointerLikeTypeTraits.h llvm/trunk/include/llvm/Use.h Modified: llvm/trunk/include/llvm/Support/PointerLikeTypeTraits.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/PointerLikeTypeTraits.h?rev=68147&r1=68146&r2=68147&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/PointerLikeTypeTraits.h (original) +++ llvm/trunk/include/llvm/Support/PointerLikeTypeTraits.h Tue Mar 31 16:28:39 2009 @@ -58,6 +58,20 @@ enum { NumLowBitsAvailable = 3 }; }; +// Pointers to pointers are only 4-byte aligned on 32-bit systems. +template +class PointerLikeTypeTraits { +public: + static inline void *getAsVoidPointer(T** P) { return P; } + static inline T **getFromVoidPointer(void *P) { + return static_cast(P); + } + enum { NumLowBitsAvailable = 2 }; +}; + + + + // Provide PointerLikeTypeTraits for uintptr_t. template<> class PointerLikeTypeTraits { Modified: llvm/trunk/include/llvm/Use.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Use.h?rev=68147&r1=68146&r2=68147&view=diff ============================================================================== --- llvm/trunk/include/llvm/Use.h (original) +++ llvm/trunk/include/llvm/Use.h Tue Mar 31 16:28:39 2009 @@ -29,17 +29,6 @@ /// Tag - generic tag type for (at least 32 bit) pointers enum Tag { noTag, tagOne, tagTwo, tagThree }; -// Use** is only 4-byte aligned. -template<> -class PointerLikeTypeTraits { -public: - static inline void *getAsVoidPointer(Use** P) { return P; } - static inline Use **getFromVoidPointer(void *P) { - return static_cast(P); - } - enum { NumLowBitsAvailable = 2 }; -}; - //===----------------------------------------------------------------------===// // Use Class //===----------------------------------------------------------------------===// From baldrick at free.fr Tue Mar 31 16:33:29 2009 From: baldrick at free.fr (Duncan Sands) Date: Tue, 31 Mar 2009 23:33:29 +0200 Subject: [llvm-commits] [llvm] r68120 - in /llvm/trunk: lib/Transforms/Utils/InlineFunction.cpp test/Other/2009-03-31-CallGraph.ll In-Reply-To: <200903311736.n2VHaCjg017012@zion.cs.uiuc.edu> References: <200903311736.n2VHaCjg017012@zion.cs.uiuc.edu> Message-ID: <200903312333.29419.baldrick@free.fr> Hi Devang, > + // We should be able to do this: > + // (*CG)[Caller]->replaceCallSite(CI, II); > + // but that fails if the old call site isn't in the call graph, > + // which, because of LLVM bug 3601, it sometimes isn't. wouldn't it be better to fix PR3601? Ciao, Duncan. > + CallGraphNode *CGN = (*CG)[Caller]; > + for (CallGraphNode::iterator NI = CGN->begin(), NE = CGN->end(); > + NI != NE; ++NI) { > + if (NI->first == CI) { > + NI->first = II; > + break; > + } > + } > + } > + From dpatel at apple.com Tue Mar 31 16:46:32 2009 From: dpatel at apple.com (Devang Patel) Date: Tue, 31 Mar 2009 14:46:32 -0700 Subject: [llvm-commits] [llvm] r68120 - in /llvm/trunk: lib/Transforms/Utils/InlineFunction.cpp test/Other/2009-03-31-CallGraph.ll In-Reply-To: <200903312333.29419.baldrick@free.fr> References: <200903311736.n2VHaCjg017012@zion.cs.uiuc.edu> <200903312333.29419.baldrick@free.fr> Message-ID: On Mar 31, 2009, at 2:33 PM, Duncan Sands wrote: > Hi Devang, > >> + // We should be able to do this: >> + // (*CG)[Caller]->replaceCallSite(CI, II); >> + // but that fails if the old call site isn't in the >> call graph, >> + // which, because of LLVM bug 3601, it sometimes isn't. > > wouldn't it be better to fix PR3601? Eventually yes, but I won't be able to get to it soon enough. - Devang > > > Ciao, > > Duncan. > >> + CallGraphNode *CGN = (*CG)[Caller]; >> + for (CallGraphNode::iterator NI = CGN->begin(), NE = >> CGN->end(); >> + NI != NE; ++NI) { >> + if (NI->first == CI) { >> + NI->first = II; >> + break; >> + } >> + } >> + } >> + From baldrick at free.fr Tue Mar 31 16:53:13 2009 From: baldrick at free.fr (Duncan Sands) Date: Tue, 31 Mar 2009 23:53:13 +0200 Subject: [llvm-commits] [llvm] r68120 - in /llvm/trunk: lib/Transforms/Utils/InlineFunction.cpp test/Other/2009-03-31-CallGraph.ll In-Reply-To: References: <200903311736.n2VHaCjg017012@zion.cs.uiuc.edu> <200903312333.29419.baldrick@free.fr> Message-ID: <200903312353.13863.baldrick@free.fr> > > wouldn't it be better to fix PR3601? > > Eventually yes, but I won't be able to get to it soon enough. OK :) Please don't forget to remove this hack when pr3601 is fixed though! Ciao, Duncan. From sabre at nondot.org Tue Mar 31 17:11:06 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 31 Mar 2009 22:11:06 -0000 Subject: [llvm-commits] [llvm] r68149 - in /llvm/trunk: include/llvm/Support/ValueHandle.h include/llvm/Value.h lib/VMCore/Value.cpp Message-ID: <200903312211.n2VMB6b6029029@zion.cs.uiuc.edu> Author: lattner Date: Tue Mar 31 17:11:05 2009 New Revision: 68149 URL: http://llvm.org/viewvc/llvm-project?rev=68149&view=rev Log: Add two new classes: WeakVH and AssertingVH. These are both "ValueHandles", which are effectively smart pointers to Value*'s. They are both very light weight and simple, and react to values being destroyed or being RAUW'd. WeakVN does a best effort to follow a value around, including through RAUW operations and will get nulled out of the value is destroyed. This is useful for the eventual "metadata that references a value" work, because it is a reference to a value that does not show up on its use_* list. AssertingVH is a pointer that compiles down to a dumb raw pointer when assertions are disabled. When enabled, it emits an assertion if the pointed-to value is destroyed while it is still being referenced. This is very useful for Maps and other things, and should have caught the recent bugs in CallGraph and Reassociate, for example. Added: llvm/trunk/include/llvm/Support/ValueHandle.h Modified: llvm/trunk/include/llvm/Value.h llvm/trunk/lib/VMCore/Value.cpp Added: llvm/trunk/include/llvm/Support/ValueHandle.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ValueHandle.h?rev=68149&view=auto ============================================================================== --- llvm/trunk/include/llvm/Support/ValueHandle.h (added) +++ llvm/trunk/include/llvm/Support/ValueHandle.h Tue Mar 31 17:11:05 2009 @@ -0,0 +1,217 @@ +//===- llvm/Support/ValueHandle.h - Value Smart Pointer classes -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the ValueHandle class and its sub-classes. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_VALUEHANDLE_H +#define LLVM_SUPPORT_VALUEHANDLE_H + +#include "llvm/ADT/PointerIntPair.h" +#include "llvm/Value.h" + +namespace llvm { + +/// ValueHandleBase - This is the common base class of value handles. +/// ValueHandle's are smart pointers to Value's that have special behavior when +/// the value is deleted or ReplaceAllUsesWith'd. See the specific handles +/// below for details. +/// +class ValueHandleBase { + friend class Value; +protected: + /// HandleBaseKind - This indicates what base class the handle actually is. + /// This is to avoid having a vtable for the light-weight handle pointers. The + /// fully generally Callback version does have a vtable. + enum HandleBaseKind { + Assert, + Weak, + Callback + }; +private: + + PointerIntPair PrevPair; + ValueHandleBase *Next; + Value *VP; +public: + ValueHandleBase(HandleBaseKind Kind) : PrevPair(0, Kind), Next(0), VP(0) {} + ValueHandleBase(HandleBaseKind Kind, Value *V) + : PrevPair(0, Kind), Next(0), VP(V) { + if (V) + AddToUseList(); + } + ValueHandleBase(HandleBaseKind Kind, const ValueHandleBase &RHS) + : PrevPair(0, Kind), Next(0), VP(RHS.VP) { + if (VP) + AddToExistingUseList(RHS.getPrevPtr()); + } + ~ValueHandleBase() { + if (VP) + RemoveFromUseList(); + } + + Value *operator=(Value *RHS) { + if (VP == RHS) return RHS; + if (VP) RemoveFromUseList(); + VP = RHS; + if (VP) AddToUseList(); + return RHS; + } + + Value *operator=(const ValueHandleBase &RHS) { + if (VP == RHS.VP) return RHS.VP; + if (VP) RemoveFromUseList(); + VP = RHS.VP; + if (VP) AddToExistingUseList(RHS.getPrevPtr()); + return VP; + } + + Value *operator->() const { return getValPtr(); } + Value &operator*() const { return *getValPtr(); } + + bool operator==(const Value *RHS) const { return VP == RHS; } + bool operator==(const ValueHandleBase &RHS) const { return VP == RHS.VP; } + bool operator!=(const Value *RHS) const { return VP != RHS; } + bool operator!=(const ValueHandleBase &RHS) const { return VP != RHS.VP; } + bool operator<(const Value *RHS) const { return VP < RHS; } + bool operator<(const ValueHandleBase &RHS) const { return VP < RHS.VP; } + bool operator>(const Value *RHS) const { return VP > RHS; } + bool operator>(const ValueHandleBase &RHS) const { return VP > RHS.VP; } + bool operator<=(const Value *RHS) const { return VP <= RHS; } + bool operator<=(const ValueHandleBase &RHS) const { return VP <= RHS.VP; } + bool operator>=(const Value *RHS) const { return VP >= RHS; } + bool operator>=(const ValueHandleBase &RHS) const { return VP >= RHS.VP; } + +protected: + Value *getValPtr() const { return VP; } +private: + // Callbacks made from Value. + static void ValueIsDeleted(Value *V); + static void ValueIsRAUWd(Value *Old, Value *New); + + // Internal implementation details. + ValueHandleBase **getPrevPtr() const { return PrevPair.getPointer(); } + HandleBaseKind getKind() const { return PrevPair.getInt(); } + void setPrevPtr(ValueHandleBase **Ptr) { PrevPair.setPointer(Ptr); } + + /// AddToUseList - Add this ValueHandle to the use list for VP, where List is + /// known to point into the existing use list. + void AddToExistingUseList(ValueHandleBase **List); + + /// AddToUseList - Add this ValueHandle to the use list for VP. + void AddToUseList(); + /// RemoveFromUseList - Remove this ValueHandle from its current use list. + void RemoveFromUseList(); +}; + +/// WeakVH - This is a value handle that tries hard to point to a Value, even +/// across RAUW operations, but will null itself out if the value is destroyed. +/// this is useful for advisory sorts of information, but should not be used as +/// the key of a map (since the map would have to rearrange itself when the +/// pointer changes). +class WeakVH : public ValueHandleBase { +public: + WeakVH() : ValueHandleBase(Weak) {} + WeakVH(Value *P) : ValueHandleBase(Weak, P) {} + WeakVH(const WeakVH &RHS) + : ValueHandleBase(Weak, RHS) {} + +}; + +/// AssertingVH - This is a Value Handle that points to a value and asserts out +/// if the value is destroyed while the handle is still live. This is very +/// useful for catching dangling pointer bugs and other things which can be +/// non-obvious. One particularly useful place to use this is as the Key of a +/// map. Dangling pointer bugs often lead to really subtle bugs that only occur +/// if another object happens to get allocated to the same address as the old +/// one. Using an AssertingVH ensures that an assert is triggered as soon as +/// the bad delete occurs. +/// +/// Note that an AssertingVH handle does *not* follow values across RAUW +/// operations. This means that RAUW's need to explicitly update the +/// AssertingVH's as it moves. This is required because in non-assert mode this + /// class turns into a trivial wrapper around a pointer. +template +class AssertingVH +#ifndef NDEBUG + : public ValueHandleBase +#endif + { + +#ifndef NDEBUG + ValueTy *getValPtr() const { + return static_cast(ValueHandleBase::getValPtr()); + } + void setValPtr(ValueTy *P) { + ValueHandleBase::operator=(P); + } +#else + ValueTy *ThePtr; + ValueTy *getValPtr() const { return ThePtr; } + void setValPtr(ValueTy *P) { ThePtr = P; } +#endif + +public: +#ifndef NDEBUG + AssertingVH() : ValueHandleBase(Assert) {} + AssertingVH(ValueTy *P) : ValueHandleBase(Assert, P) {} + AssertingVH(const AssertingVH &RHS) : ValueHandleBase(Assert, RHS) {} +#else + AssertingVH() : ThePtr(0) {} + AssertingVH(ValueTy *P) : ThePtr(P) {} +#endif + + operator ValueTy*() const { + return getValPtr(); + } + + ValueTy *operator=(ValueTy *RHS) { + setValPtr(RHS); + return getValPtr(); + } + ValueTy *operator=(AssertingVH &RHS) { + setValPtr(RHS.getValPtr()); + return getValPtr(); + } + + ValueTy *operator->() const { return getValPtr(); } + ValueTy &operator*() const { return getValPtr(); } + + // Duplicate these from the base class so that they work when assertions are + // off. + bool operator==(const Value *RHS) const { return getValPtr() == RHS; } + bool operator!=(const Value *RHS) const { return getValPtr() != RHS; } + bool operator<(const Value *RHS) const { return getValPtr() < RHS; } + bool operator>(const Value *RHS) const { return getValPtr() > RHS; } + bool operator<=(const Value *RHS) const { return getValPtr() <= RHS; } + bool operator>=(const Value *RHS) const { return getValPtr() >= RHS; } + bool operator==(const AssertingVH &RHS) const { + return getValPtr() == RHS.getValPtr(); + } + bool operator!=(const AssertingVH &RHS) const { + return getValPtr() != RHS.getValPtr(); + } + bool operator<(const AssertingVH &RHS) const { + return getValPtr() < RHS.getValPtr(); + } + bool operator>(const AssertingVH &RHS) const { + return getValPtr() > RHS.getValPtr(); + } + bool operator<=(const AssertingVH &RHS) const { + return getValPtr() <= RHS.getValPtr(); + } + bool operator>=(const AssertingVH &RHS) const { + return getValPtr() >= RHS.getValPtr(); + } +}; + +} // End llvm namespace + +#endif Modified: llvm/trunk/include/llvm/Value.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Value.h?rev=68149&r1=68148&r2=68149&view=diff ============================================================================== --- llvm/trunk/include/llvm/Value.h (original) +++ llvm/trunk/include/llvm/Value.h Tue Mar 31 17:11:05 2009 @@ -37,6 +37,7 @@ typedef StringMapEntry ValueName; class raw_ostream; class AssemblyAnnotationWriter; +class ValueHandleBase; //===----------------------------------------------------------------------===// // Value Class @@ -50,10 +51,14 @@ /// automatically updates the module's symbol table. /// /// Every value has a "use list" that keeps track of which other Values are -/// using this Value. +/// using this Value. A Value can also have an arbitrary number of ValueHandle +/// objects that watch it and listen to RAUW and Destroy events see +/// llvm/Support/ValueHandle.h for details. +/// /// @brief LLVM Value Representation class Value { const unsigned char SubclassID; // Subclass identifier (for isa/dyn_cast) + unsigned char HasValueHandle : 1; // Has a ValueHandle pointing to this? protected: /// SubclassData - This member is defined by this class, but is not used for /// anything. Subclasses can use it to hold whatever state they find useful. @@ -65,6 +70,7 @@ friend class ValueSymbolTable; // Allow ValueSymbolTable to directly mod Name. friend class SymbolTable; // Allow SymbolTable to directly poke Name. + friend class ValueHandleBase; ValueName *Name; void operator=(const Value &); // Do not implement Modified: llvm/trunk/lib/VMCore/Value.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Value.cpp?rev=68149&r1=68148&r2=68149&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Value.cpp (original) +++ llvm/trunk/lib/VMCore/Value.cpp Tue Mar 31 17:11:05 2009 @@ -7,7 +7,7 @@ // //===----------------------------------------------------------------------===// // -// This file implements the Value and User classes. +// This file implements the Value, ValueHandle, and User classes. // //===----------------------------------------------------------------------===// @@ -20,6 +20,9 @@ #include "llvm/ValueSymbolTable.h" #include "llvm/Support/Debug.h" #include "llvm/Support/LeakDetector.h" +#include "llvm/Support/ManagedStatic.h" +#include "llvm/Support/ValueHandle.h" +#include "llvm/ADT/DenseMap.h" #include using namespace llvm; @@ -33,7 +36,7 @@ } Value::Value(const Type *ty, unsigned scid) - : SubclassID(scid), SubclassData(0), VTy(checkType(ty)), + : SubclassID(scid), HasValueHandle(0), SubclassData(0), VTy(checkType(ty)), UseList(0), Name(0) { if (isa(this) || isa(this)) assert((VTy->isFirstClassType() || VTy == Type::VoidTy || @@ -46,6 +49,10 @@ } Value::~Value() { + // Notify all ValueHandles (if present) that this value is going away. + if (HasValueHandle) + ValueHandleBase::ValueIsDeleted(this); + #ifndef NDEBUG // Only in -g mode... // Check to make sure that there are no uses of this value that are still // around when the value is destroyed. If there are, then we have a dangling @@ -297,6 +304,10 @@ // this problem. // void Value::uncheckedReplaceAllUsesWith(Value *New) { + // Notify all ValueHandles (if present) that this value is going away. + if (HasValueHandle) + ValueHandleBase::ValueIsRAUWd(this, New); + while (!use_empty()) { Use &U = *UseList; // Must handle Constants specially, we cannot call replaceUsesOfWith on a @@ -383,6 +394,158 @@ return this; } +//===----------------------------------------------------------------------===// +// ValueHandleBase Class +//===----------------------------------------------------------------------===// + +/// ValueHandles - This map keeps track of all of the value handles that are +/// watching a Value*. The Value::HasValueHandle bit is used to know whether or +/// not a value has an entry in this map. +typedef DenseMap ValueHandlesTy; +static ManagedStatic ValueHandles; + +/// AddToUseList - Add this ValueHandle to the use list for VP, where List is +/// known to point into the existing use list. +void ValueHandleBase::AddToExistingUseList(ValueHandleBase **List) { + assert(List && "Handle list is null?"); + + // Splice ourselves into the list. + Next = *List; + *List = this; + setPrevPtr(List); + if (Next) { + Next->setPrevPtr(&Next); + assert(VP == Next->VP && "Added to wrong list?"); + } +} + +/// AddToUseList - Add this ValueHandle to the use list for VP. +void ValueHandleBase::AddToUseList() { + assert(VP && "Null pointer doesn't have a use list!"); + if (VP->HasValueHandle) { + // If this value already has a ValueHandle, then it must be in the + // ValueHandles map already. + ValueHandleBase *&Entry = (*ValueHandles)[VP]; + assert(Entry != 0 && "Value doesn't have any handles?"); + return AddToExistingUseList(&Entry); + } + + // Ok, it doesn't have any handles yet, so we must insert it into the + // DenseMap. However, doing this insertion could cause the DenseMap to + // reallocate itself, which would invalidate all of the PrevP pointers that + // point into the old table. Handle this by checking for reallocation and + // updating the stale pointers only if needed. + ValueHandlesTy &Handles = *ValueHandles; + const void *OldBucketPtr = Handles.getPointerIntoBucketsArray(); + + ValueHandleBase *&Entry = Handles[VP]; + assert(Entry == 0 && "Value really did already have handles?"); + AddToExistingUseList(&Entry); + VP->HasValueHandle = 1; + + // If reallocation didn't happen or if this was the first insertion, don't + // walk the table. + if (Handles.isPointerIntoBucketsArray(OldBucketPtr) || + Handles.size() == 1) + return; + + // Okay, reallocation did happen. Fix the Prev Pointers. + for (ValueHandlesTy::iterator I = Handles.begin(), E = Handles.end(); + I != E; ++I) { + assert(I->second && I->first == I->second->VP && "List invariant broken!"); + I->second->setPrevPtr(&I->second); + } +} + +/// RemoveFromUseList - Remove this ValueHandle from its current use list. +void ValueHandleBase::RemoveFromUseList() { + assert(VP && VP->HasValueHandle && "Pointer doesn't have a use list!"); + + // Unlink this from its use list. + ValueHandleBase **PrevPtr = getPrevPtr(); + assert(*PrevPtr == this && "List invariant broken"); + + *PrevPtr = Next; + if (Next) { + assert(Next->getPrevPtr() == &Next && "List invariant broken"); + Next->setPrevPtr(PrevPtr); + return; + } + + // If the Next pointer was null, then it is possible that this was the last + // ValueHandle watching VP. If so, delete its entry from the ValueHandles + // map. + ValueHandlesTy &Handles = *ValueHandles; + if (Handles.isPointerIntoBucketsArray(PrevPtr)) { + Handles.erase(VP); + VP->HasValueHandle = false; + } +} + + +void ValueHandleBase::ValueIsDeleted(Value *V) { + assert(V->HasValueHandle && "Should only be called if ValueHandles present"); + + // Get the linked list base, which is guaranteed to exist since the + // HasValueHandle flag is set. + ValueHandleBase *Entry = (*ValueHandles)[V]; + assert(Entry && "Value bit set but no entries exist"); + + while (Entry) { + // Advance pointer to avoid invalidation. + ValueHandleBase *ThisNode = Entry; + Entry = Entry->Next; + + switch (ThisNode->getKind()) { + case Assert: +#ifndef NDEBUG // Only in -g mode... + cerr << "While deleting: " << *V->getType() << " %" << V->getNameStr() + << "\n"; +#endif + cerr << "An asserting value handle still pointed to this value!\n"; + abort(); + case Weak: + // Weak just goes to null, which will unlink it from the list. + ThisNode->operator=(0); + break; + case Callback: + assert(0 && "Callback not implemented yet!"); + } + } + + // All callbacks and weak references should be dropped by now. + assert(!V->HasValueHandle && "All references to V were not removed?"); +} + + +void ValueHandleBase::ValueIsRAUWd(Value *Old, Value *New) { + assert(Old->HasValueHandle &&"Should only be called if ValueHandles present"); + assert(Old != New && "Changing value into itself!"); + + // Get the linked list base, which is guaranteed to exist since the + // HasValueHandle flag is set. + ValueHandleBase *Entry = (*ValueHandles)[Old]; + assert(Entry && "Value bit set but no entries exist"); + + while (Entry) { + // Advance pointer to avoid invalidation. + ValueHandleBase *ThisNode = Entry; + Entry = Entry->Next; + + switch (ThisNode->getKind()) { + case Assert: + // Asserting handle does not follow RAUW implicitly. + break; + case Weak: + // Weak goes to the new value, which will unlink it from Old's list. + ThisNode->operator=(New); + break; + case Callback: + assert(0 && "Callback not implemented yet!"); + } + } +} + //===----------------------------------------------------------------------===// // User Class From sabre at nondot.org Tue Mar 31 17:13:29 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 31 Mar 2009 22:13:29 -0000 Subject: [llvm-commits] [llvm] r68150 - /llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp Message-ID: <200903312213.n2VMDT4T029093@zion.cs.uiuc.edu> Author: lattner Date: Tue Mar 31 17:13:29 2009 New Revision: 68150 URL: http://llvm.org/viewvc/llvm-project?rev=68150&view=rev Log: Make the key of ValueRankMap an AssertingVH, so that we die violently if it dangles. Modified: llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp Modified: llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp?rev=68150&r1=68149&r2=68150&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp Tue Mar 31 17:13:29 2009 @@ -32,6 +32,7 @@ #include "llvm/Support/CFG.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/ValueHandle.h" #include "llvm/ADT/PostOrderIterator.h" #include "llvm/ADT/Statistic.h" #include @@ -71,7 +72,7 @@ namespace { class VISIBILITY_HIDDEN Reassociate : public FunctionPass { std::map RankMap; - std::map ValueRankMap; + std::map, unsigned> ValueRankMap; bool MadeChange; public: static char ID; // Pass identification, replacement for typeid @@ -138,7 +139,7 @@ // Assign distinct ranks to function arguments for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; ++I) - ValueRankMap[I] = ++i; + ValueRankMap[&*I] = ++i; ReversePostOrderTraversal RPOT(&F); for (ReversePostOrderTraversal::rpo_iterator I = RPOT.begin(), @@ -151,7 +152,7 @@ // all different in the block. for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) if (isUnmovableInstruction(I)) - ValueRankMap[I] = ++BBRank; + ValueRankMap[&*I] = ++BBRank; } } @@ -197,7 +198,7 @@ /// LowerNegateToMultiply - Replace 0-X with X*-1. /// static Instruction *LowerNegateToMultiply(Instruction *Neg, - std::map &ValueRankMap) { + std::map, unsigned> &ValueRankMap) { Constant *Cst = ConstantInt::getAllOnesValue(Neg->getType()); Instruction *Res = BinaryOperator::CreateMul(Neg->getOperand(1), Cst, "",Neg); @@ -427,7 +428,7 @@ /// only used by an add, transform this into (X+(0-Y)) to promote better /// reassociation. static Instruction *BreakUpSubtract(Instruction *Sub, - std::map &ValueRankMap) { + std::map, unsigned> &ValueRankMap) { // Convert a subtract into an add and a neg instruction... so that sub // instructions can be commuted with other add instructions... // @@ -452,7 +453,7 @@ /// by one, change this into a multiply by a constant to assist with further /// reassociation. static Instruction *ConvertShiftToMul(Instruction *Shl, - std::map &ValueRankMap){ + std::map, unsigned> &ValueRankMap) { // If an operand of this shift is a reassociable multiply, or if the shift // is used by a reassociable multiply or add, turn into a multiply. if (isReassociableOp(Shl->getOperand(0), Instruction::Mul) || From espindola at google.com Tue Mar 31 17:17:50 2009 From: espindola at google.com (Rafael Espindola) Date: Tue, 31 Mar 2009 23:17:50 +0100 Subject: [llvm-commits] [llvm] r66922 - in /llvm/trunk: lib/Target/X86/X86InstrInfo.td test/CodeGen/X86/tls13.ll test/CodeGen/X86/tls14.ll In-Reply-To: References: <200903131837.n2DIb7PC008719@zion.cs.uiuc.edu> Message-ID: <38a0d8450903311517m60b40486wc1af6a391faa6b6f@mail.gmail.com> > Instead of making it TLS specific, I'd just make that operand "specify > the segment". ?Even though we do nothing with FS or ES or DS etc, it > would be nice to be able to have a clean model where the instructions > think about these machine level things, and isel lowering handles the > translation of "TLS to GS" I am having some problem along this path. I have added a X86::SegmentAddress node and TLS addresses are lowered into it. This works perfectly for the case we do a load. Just another recursive call in MatchAddress and record the segment. The problem is when we just want to compute the address as in int __thread v; int *f(void) { return &v; } In this case, Select is called on the wrapper and it must be expanded into two instructions. A "mov gs:0, %a_register" to get the thread pointer and a leal/add to get the address. Is Select really the best place to do such expansion? An option that looks better so far is to keep the current THREAD_POINTER node. The idea is: 1) Lowering produces an add of and offset and the THREAD_POINTER as it does now. 2) The THREAD_POINTER is selected into a mov gs:0, a_register 3) If we are computing and address, we are done 4) If we are doing a load, the two instructions get folded post the instruction selection. In summary, at the DAG level we will see a THREAD_POINTER and not addresses with segments. At the machine instruction level we will see addresses with segments. I am just not sure if the folding described in 4 will always be done. comments? > -Chris > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > Cheers, -- ::: Rafael Avila de Espindola Google | Gordon House | Barrow Street | Dublin 4 | Ireland Registered in Dublin, Ireland | Registration Number: 368047 From dalej at apple.com Tue Mar 31 17:22:14 2009 From: dalej at apple.com (Dale Johannesen) Date: Tue, 31 Mar 2009 22:22:14 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r68152 - in /llvm-gcc-4.2/trunk/gcc: llvm-convert.cpp llvm-debug.cpp llvm-debug.h Message-ID: <200903312222.n2VMMECu029424@zion.cs.uiuc.edu> Author: johannes Date: Tue Mar 31 17:22:13 2009 New Revision: 68152 URL: http://llvm.org/viewvc/llvm-project?rev=68152&view=rev Log: Fix nondeterminism in whether line numbers got generated near the beginning of a function. Now they do, an improvement. This allows checking in 67884 finally: Enable debug info at -O. I've fixed a lot of bugs where -g affects optimization recently; there are currently no such cases in the llvm testsuite or a substantial amount of other code on Darwin, which seems sufficient to turn it on. Woot. I make no claims about the quality of the generated debug info. Any cases where you see -g affecting optimization can now usefully be reported as bugs. TEST=ipodbgopt should test this in the llvm testsuite. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp llvm-gcc-4.2/trunk/gcc/llvm-debug.h Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=68152&r1=68151&r2=68152&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Mar 31 17:22:13 2009 @@ -668,7 +668,7 @@ } if (TheDebugInfo) { TheDebugInfo->EmitStopPoint(Fn, Builder.GetInsertBlock()); - TheDebugInfo->EmitRegionEnd(Builder.GetInsertBlock()); + TheDebugInfo->EmitRegionEnd(Builder.GetInsertBlock(), true); } if (RetVals.empty()) Builder.CreateRetVoid(); Modified: llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp?rev=68152&r1=68151&r2=68152&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp Tue Mar 31 17:22:13 2009 @@ -273,10 +273,17 @@ /// EmitRegionEnd - Constructs the debug code for exiting a declarative /// region - "llvm.dbg.region.end." -void DebugInfo::EmitRegionEnd(BasicBlock *CurBB) { +void DebugInfo::EmitRegionEnd(BasicBlock *CurBB, bool EndFunction) { assert(!RegionStack.empty() && "Region stack mismatch, stack empty!"); DebugFactory.InsertRegionEnd(RegionStack.back(), CurBB); RegionStack.pop_back(); + // Blocks get erased; clearing these is needed for determinism, and also + // a good idea if the next function gets inlined. + if (EndFunction) { + PrevBB = NULL; + PrevLineNo = 0; + PrevFullPath = NULL; + } } /// EmitDeclare - Constructs the debug code for allocation of a new variable. @@ -310,10 +317,6 @@ /// source line - "llvm.dbg.stoppoint." void DebugInfo::EmitStopPoint(Function *Fn, BasicBlock *CurBB) { - // Do not emit line number info, for now. - if (optimize) - return; - // Don't bother if things are the same as last time. if (PrevLineNo == CurLineNo && PrevBB == CurBB && Modified: llvm-gcc-4.2/trunk/gcc/llvm-debug.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-debug.h?rev=68152&r1=68151&r2=68152&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-debug.h (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-debug.h Tue Mar 31 17:22:13 2009 @@ -89,7 +89,7 @@ /// EmitRegionEnd - Constructs the debug code for exiting a declarative /// region - "llvm.dbg.region.end." - void EmitRegionEnd(BasicBlock *CurBB); + void EmitRegionEnd(BasicBlock *CurBB, bool EndFunction); /// EmitDeclare - Constructs the debug code for allocation of a new variable. /// region - "llvm.dbg.declare." From dalej at apple.com Tue Mar 31 17:24:49 2009 From: dalej at apple.com (Dale Johannesen) Date: Tue, 31 Mar 2009 22:24:49 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r68153 - /llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp Message-ID: <200903312224.n2VMOnOE029511@zion.cs.uiuc.edu> Author: johannes Date: Tue Mar 31 17:24:49 2009 New Revision: 68153 URL: http://llvm.org/viewvc/llvm-project?rev=68153&view=rev Log: Restore a comment. Modified: llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp?rev=68153&r1=68152&r2=68153&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp Tue Mar 31 17:24:49 2009 @@ -314,7 +314,7 @@ } /// EmitStopPoint - Emit a call to llvm.dbg.stoppoint to indicate a change of -/// source line - "llvm.dbg.stoppoint." +/// source line - "llvm.dbg.stoppoint." Now enabled at -O. void DebugInfo::EmitStopPoint(Function *Fn, BasicBlock *CurBB) { // Don't bother if things are the same as last time. From isanbard at gmail.com Tue Mar 31 17:31:16 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 31 Mar 2009 22:31:16 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r68154 - in /llvm-gcc-4.2/branches/Apple/Dib/gcc: llvm-convert.cpp llvm-debug.cpp llvm-debug.h Message-ID: <200903312231.n2VMVGux029749@zion.cs.uiuc.edu> Author: void Date: Tue Mar 31 17:31:16 2009 New Revision: 68154 URL: http://llvm.org/viewvc/llvm-project?rev=68154&view=rev Log: --- Merging (from foreign repository) r68152 into '.': U gcc/llvm-convert.cpp U gcc/llvm-debug.cpp U gcc/llvm-debug.h Fix nondeterminism in whether line numbers got generated near the beginning of a function. Now they do, an improvement. This allows checking in 67884 finally: Enable debug info at -O. I've fixed a lot of bugs where -g affects optimization recently; there are currently no such cases in the llvm testsuite or a substantial amount of other code on Darwin, which seems sufficient to turn it on. Woot. I make no claims about the quality of the generated debug info. Any cases where you see -g affecting optimization can now usefully be reported as bugs. TEST=ipodbgopt should test this in the llvm testsuite. Modified: llvm-gcc-4.2/branches/Apple/Dib/gcc/llvm-convert.cpp llvm-gcc-4.2/branches/Apple/Dib/gcc/llvm-debug.cpp llvm-gcc-4.2/branches/Apple/Dib/gcc/llvm-debug.h Modified: llvm-gcc-4.2/branches/Apple/Dib/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/branches/Apple/Dib/gcc/llvm-convert.cpp?rev=68154&r1=68153&r2=68154&view=diff ============================================================================== --- llvm-gcc-4.2/branches/Apple/Dib/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/branches/Apple/Dib/gcc/llvm-convert.cpp Tue Mar 31 17:31:16 2009 @@ -668,7 +668,7 @@ } if (TheDebugInfo) { TheDebugInfo->EmitStopPoint(Fn, Builder.GetInsertBlock()); - TheDebugInfo->EmitRegionEnd(Builder.GetInsertBlock()); + TheDebugInfo->EmitRegionEnd(Builder.GetInsertBlock(), true); } if (RetVals.empty()) Builder.CreateRetVoid(); Modified: llvm-gcc-4.2/branches/Apple/Dib/gcc/llvm-debug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/branches/Apple/Dib/gcc/llvm-debug.cpp?rev=68154&r1=68153&r2=68154&view=diff ============================================================================== --- llvm-gcc-4.2/branches/Apple/Dib/gcc/llvm-debug.cpp (original) +++ llvm-gcc-4.2/branches/Apple/Dib/gcc/llvm-debug.cpp Tue Mar 31 17:31:16 2009 @@ -273,10 +273,17 @@ /// EmitRegionEnd - Constructs the debug code for exiting a declarative /// region - "llvm.dbg.region.end." -void DebugInfo::EmitRegionEnd(BasicBlock *CurBB) { +void DebugInfo::EmitRegionEnd(BasicBlock *CurBB, bool EndFunction) { assert(!RegionStack.empty() && "Region stack mismatch, stack empty!"); DebugFactory.InsertRegionEnd(RegionStack.back(), CurBB); RegionStack.pop_back(); + // Blocks get erased; clearing these is needed for determinism, and also + // a good idea if the next function gets inlined. + if (EndFunction) { + PrevBB = NULL; + PrevLineNo = 0; + PrevFullPath = NULL; + } } /// EmitDeclare - Constructs the debug code for allocation of a new variable. @@ -307,13 +314,9 @@ } /// EmitStopPoint - Emit a call to llvm.dbg.stoppoint to indicate a change of -/// source line - "llvm.dbg.stoppoint." +/// source line - "llvm.dbg.stoppoint." Now enabled at -O. void DebugInfo::EmitStopPoint(Function *Fn, BasicBlock *CurBB) { - // Do not emit line number info, for now. - if (optimize) - return; - // Don't bother if things are the same as last time. if (PrevLineNo == CurLineNo && PrevBB == CurBB && Modified: llvm-gcc-4.2/branches/Apple/Dib/gcc/llvm-debug.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/branches/Apple/Dib/gcc/llvm-debug.h?rev=68154&r1=68153&r2=68154&view=diff ============================================================================== --- llvm-gcc-4.2/branches/Apple/Dib/gcc/llvm-debug.h (original) +++ llvm-gcc-4.2/branches/Apple/Dib/gcc/llvm-debug.h Tue Mar 31 17:31:16 2009 @@ -89,7 +89,7 @@ /// EmitRegionEnd - Constructs the debug code for exiting a declarative /// region - "llvm.dbg.region.end." - void EmitRegionEnd(BasicBlock *CurBB); + void EmitRegionEnd(BasicBlock *CurBB, bool EndFunction); /// EmitDeclare - Constructs the debug code for allocation of a new variable. /// region - "llvm.dbg.declare." From clattner at apple.com Tue Mar 31 17:54:21 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 31 Mar 2009 15:54:21 -0700 Subject: [llvm-commits] [llvm] r68120 - in /llvm/trunk: lib/Transforms/Utils/InlineFunction.cpp test/Other/2009-03-31-CallGraph.ll In-Reply-To: <200903312333.29419.baldrick@free.fr> References: <200903311736.n2VHaCjg017012@zion.cs.uiuc.edu> <200903312333.29419.baldrick@free.fr> Message-ID: On Mar 31, 2009, at 2:33 PM, Duncan Sands wrote: > Hi Devang, > >> + // We should be able to do this: >> + // (*CG)[Caller]->replaceCallSite(CI, II); >> + // but that fails if the old call site isn't in the >> call graph, >> + // which, because of LLVM bug 3601, it sometimes isn't. > > wouldn't it be better to fix PR3601? Incidentally, converting CallGraph to use AssertingVH would be a great way to flush out these sorts of bugs. -Chris From sabre at nondot.org Tue Mar 31 17:55:10 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 31 Mar 2009 22:55:10 -0000 Subject: [llvm-commits] [llvm] r68156 - in /llvm/trunk/lib/Bitcode/Reader: BitcodeReader.cpp BitcodeReader.h Message-ID: <200903312255.n2VMtAqb030630@zion.cs.uiuc.edu> Author: lattner Date: Tue Mar 31 17:55:09 2009 New Revision: 68156 URL: http://llvm.org/viewvc/llvm-project?rev=68156&view=rev Log: reimplement BitcodeReaderValueList in terms of WeakVH instead of making it be an LLVM IR User object. Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=68156&r1=68155&r2=68156&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Tue Mar 31 17:55:09 2009 @@ -146,64 +146,67 @@ /// Provide fast operand accessors - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); + //DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); }; } - - // FIXME: can we inherit this from ConstantExpr? +// FIXME: can we inherit this from ConstantExpr? template <> struct OperandTraits : FixedNumOperandTraits<1> { }; - -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(ConstantPlaceHolder, Value) } -void BitcodeReaderValueList::resize(unsigned Desired) { - if (Desired > Capacity) { - // Since we expect many values to come from the bitcode file we better - // allocate the double amount, so that the array size grows exponentially - // at each reallocation. Also, add a small amount of 100 extra elements - // each time, to reallocate less frequently when the array is still small. - // - Capacity = Desired * 2 + 100; - Use *New = allocHungoffUses(Capacity); - Use *Old = OperandList; - unsigned Ops = getNumOperands(); - for (int i(Ops - 1); i >= 0; --i) - New[i] = Old[i].get(); - OperandList = New; - if (Old) Use::zap(Old, Old + Ops, true); + +void BitcodeReaderValueList::AssignValue(Value *V, unsigned Idx) { + if (Idx == size()) { + push_back(V); + return; + } + + if (Idx >= size()) + resize(Idx+1); + + WeakVH &OldV = ValuePtrs[Idx]; + if (OldV == 0) { + OldV = V; + return; + } + + // Handle constants and non-constants (e.g. instrs) differently for + // efficiency. + if (Constant *PHC = dyn_cast(&*OldV)) { + ResolveConstants.push_back(std::make_pair(PHC, Idx)); + OldV = V; + } else { + // If there was a forward reference to this value, replace it. + Value *PrevVal = OldV; + OldV->replaceAllUsesWith(V); + delete PrevVal; } } + Constant *BitcodeReaderValueList::getConstantFwdRef(unsigned Idx, const Type *Ty) { - if (Idx >= size()) { - // Insert a bunch of null values. + if (Idx >= size()) resize(Idx + 1); - NumOperands = Idx+1; - } - if (Value *V = OperandList[Idx]) { + if (Value *V = ValuePtrs[Idx]) { assert(Ty == V->getType() && "Type mismatch in constant table!"); return cast(V); } // Create and return a placeholder, which will later be RAUW'd. Constant *C = new ConstantPlaceHolder(Ty); - OperandList[Idx] = C; + ValuePtrs[Idx] = C; return C; } Value *BitcodeReaderValueList::getValueFwdRef(unsigned Idx, const Type *Ty) { - if (Idx >= size()) { - // Insert a bunch of null values. + if (Idx >= size()) resize(Idx + 1); - NumOperands = Idx+1; - } - if (Value *V = OperandList[Idx]) { + if (Value *V = ValuePtrs[Idx]) { assert((Ty == 0 || Ty == V->getType()) && "Type mismatch in value table!"); return V; } @@ -213,7 +216,7 @@ // Create and return a placeholder, which will later be RAUW'd. Value *V = new Argument(Ty); - OperandList[Idx] = V; + ValuePtrs[Idx] = V; return V; } @@ -232,7 +235,7 @@ SmallVector NewOps; while (!ResolveConstants.empty()) { - Value *RealVal = getOperand(ResolveConstants.back().second); + Value *RealVal = operator[](ResolveConstants.back().second); Constant *Placeholder = ResolveConstants.back().first; ResolveConstants.pop_back(); @@ -268,7 +271,7 @@ std::pair(cast(*I), 0)); assert(It != ResolveConstants.end() && It->first == *I); - NewOp = this->getOperand(It->second); + NewOp = operator[](It->second); } NewOps.push_back(cast(NewOp)); @@ -2064,7 +2067,7 @@ if (CallInst* CI = dyn_cast(*UI++)) UpgradeIntrinsicCall(CI, I->second); } - ValueList.replaceUsesOfWith(I->first, I->second); + I->first->replaceAllUsesWith(I->second); I->first->eraseFromParent(); } } Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h?rev=68156&r1=68155&r2=68156&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h Tue Mar 31 17:55:09 2009 @@ -20,6 +20,7 @@ #include "llvm/OperandTraits.h" #include "llvm/Bitcode/BitstreamReader.h" #include "llvm/Bitcode/LLVMBitCodes.h" +#include "llvm/Support/ValueHandle.h" #include "llvm/ADT/DenseMap.h" #include @@ -30,8 +31,8 @@ // BitcodeReaderValueList Class //===----------------------------------------------------------------------===// -class BitcodeReaderValueList : public User { - unsigned Capacity; +class BitcodeReaderValueList { + std::vector ValuePtrs; /// ResolveConstants - As we resolve forward-referenced constants, we add /// information about them to this vector. This allows us to resolve them in @@ -43,88 +44,46 @@ typedef std::vector > ResolveConstantsTy; ResolveConstantsTy ResolveConstants; public: - BitcodeReaderValueList() : User(Type::VoidTy, Value::ArgumentVal, 0, 0) - , Capacity(0) {} + BitcodeReaderValueList() {} ~BitcodeReaderValueList() { assert(ResolveConstants.empty() && "Constants not resolved?"); } - /// Provide fast operand accessors - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); - // vector compatibility methods - unsigned size() const { return getNumOperands(); } - void resize(unsigned); + unsigned size() const { return ValuePtrs.size(); } + void resize(unsigned N) { ValuePtrs.resize(N); } void push_back(Value *V) { - unsigned OldOps(NumOperands), NewOps(NumOperands + 1); - resize(NewOps); - NumOperands = NewOps; - OperandList[OldOps] = V; + ValuePtrs.push_back(V); } void clear() { assert(ResolveConstants.empty() && "Constants not resolved?"); - if (OperandList) dropHungoffUses(OperandList); - Capacity = 0; + ValuePtrs.clear(); } - Value *operator[](unsigned i) const { return getOperand(i); } + Value *operator[](unsigned i) const { + assert(i < ValuePtrs.size()); + return ValuePtrs[i]; + } - Value *back() const { return getOperand(size() - 1); } - void pop_back() { setOperand(size() - 1, 0); --NumOperands; } - bool empty() const { return NumOperands == 0; } + Value *back() const { return ValuePtrs.back(); } + void pop_back() { ValuePtrs.pop_back(); } + bool empty() const { return ValuePtrs.empty(); } void shrinkTo(unsigned N) { - assert(N <= NumOperands && "Invalid shrinkTo request!"); - while (NumOperands > N) - pop_back(); + assert(N <= size() && "Invalid shrinkTo request!"); + ValuePtrs.resize(N); } - virtual void print(std::ostream&) const {} Constant *getConstantFwdRef(unsigned Idx, const Type *Ty); Value *getValueFwdRef(unsigned Idx, const Type *Ty); - void AssignValue(Value *V, unsigned Idx) { - if (Idx == size()) { - push_back(V); - } else if (Value *OldV = getOperand(Idx)) { - // Handle constants and non-constants (e.g. instrs) differently for - // efficiency. - if (Constant *PHC = dyn_cast(OldV)) { - ResolveConstants.push_back(std::make_pair(PHC, Idx)); - setOperand(Idx, V); - } else { - // If there was a forward reference to this value, replace it. - setOperand(Idx, V); - OldV->replaceAllUsesWith(V); - delete OldV; - } - } else { - initVal(Idx, V); - } - } + void AssignValue(Value *V, unsigned Idx); /// ResolveConstantForwardRefs - Once all constants are read, this method bulk /// resolves any forward references. void ResolveConstantForwardRefs(); - -private: - void initVal(unsigned Idx, Value *V) { - if (Idx >= size()) { - // Insert a bunch of null values. - resize(Idx * 2 + 1); - } - assert(getOperand(Idx) == 0 && "Cannot init an already init'd Use!"); - OperandList[Idx] = V; - } }; -template <> -struct OperandTraits - : HungoffOperandTraits { -}; - -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(BitcodeReaderValueList, Value) - class BitcodeReader : public ModuleProvider { MemoryBuffer *Buffer; BitstreamReader Stream; From sabre at nondot.org Tue Mar 31 18:09:54 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 31 Mar 2009 23:09:54 -0000 Subject: [llvm-commits] [llvm] r68158 - /llvm/trunk/include/llvm/Support/ValueHandle.h Message-ID: <200903312309.n2VN9sxi031099@zion.cs.uiuc.edu> Author: lattner Date: Tue Mar 31 18:09:51 2009 New Revision: 68158 URL: http://llvm.org/viewvc/llvm-project?rev=68158&view=rev Log: add a converting operator Modified: llvm/trunk/include/llvm/Support/ValueHandle.h Modified: llvm/trunk/include/llvm/Support/ValueHandle.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ValueHandle.h?rev=68158&r1=68157&r2=68158&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/ValueHandle.h (original) +++ llvm/trunk/include/llvm/Support/ValueHandle.h Tue Mar 31 18:09:51 2009 @@ -123,6 +123,9 @@ WeakVH(const WeakVH &RHS) : ValueHandleBase(Weak, RHS) {} + operator Value*() const { + return getValPtr(); + } }; /// AssertingVH - This is a Value Handle that points to a value and asserts out From dgregor at apple.com Tue Mar 31 18:19:55 2009 From: dgregor at apple.com (Douglas Gregor) Date: Tue, 31 Mar 2009 23:19:55 -0000 Subject: [llvm-commits] [llvm] r68159 - /llvm/trunk/include/llvm/ADT/PointerUnion.h Message-ID: <200903312319.n2VNJtaf031406@zion.cs.uiuc.edu> Author: dgregor Date: Tue Mar 31 18:19:54 2009 New Revision: 68159 URL: http://llvm.org/viewvc/llvm-project?rev=68159&view=rev Log: Allow the use of pointers to const within PointerUnion. Modified: llvm/trunk/include/llvm/ADT/PointerUnion.h Modified: llvm/trunk/include/llvm/ADT/PointerUnion.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/PointerUnion.h?rev=68159&r1=68158&r2=68159&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/PointerUnion.h (original) +++ llvm/trunk/include/llvm/ADT/PointerUnion.h Tue Mar 31 18:19:54 2009 @@ -69,11 +69,13 @@ PointerUnion() {} PointerUnion(PT1 V) { - Val.setPointer(PointerLikeTypeTraits::getAsVoidPointer(V)); + Val.setPointer( + const_cast(PointerLikeTypeTraits::getAsVoidPointer(V))); Val.setInt(0); } PointerUnion(PT2 V) { - Val.setPointer(PointerLikeTypeTraits::getAsVoidPointer(V)); + Val.setPointer( + const_cast(PointerLikeTypeTraits::getAsVoidPointer(V))); Val.setInt(1); } @@ -109,12 +111,14 @@ /// Assignment operators - Allow assigning into this union from either /// pointer type, setting the discriminator to remember what it came from. const PointerUnion &operator=(const PT1 &RHS) { - Val.setPointer(PointerLikeTypeTraits::getAsVoidPointer(RHS)); + Val.setPointer( + const_cast(PointerLikeTypeTraits::getAsVoidPointer(RHS))); Val.setInt(0); return *this; } const PointerUnion &operator=(const PT2 &RHS) { - Val.setPointer(PointerLikeTypeTraits::getAsVoidPointer(RHS)); + Val.setPointer( + const_cast(PointerLikeTypeTraits::getAsVoidPointer(RHS))); Val.setInt(1); return *this; } From isanbard at gmail.com Tue Mar 31 18:58:23 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 31 Mar 2009 23:58:23 -0000 Subject: [llvm-commits] [llvm] r68161 - in /llvm/branches/Apple/Dib: include/llvm/CodeGen/MachineBasicBlock.h lib/CodeGen/MachineBasicBlock.cpp Message-ID: <200903312358.n2VNwNSq000574@zion.cs.uiuc.edu> Author: void Date: Tue Mar 31 18:58:23 2009 New Revision: 68161 URL: http://llvm.org/viewvc/llvm-project?rev=68161&view=rev Log: --- Merging (from foreign repository) r68054 into '.': U include/llvm/CodeGen/MachineBasicBlock.h U lib/CodeGen/MachineBasicBlock.cpp Constify arguments in isSuccessor and isLayoutSuccessor. Modified: llvm/branches/Apple/Dib/include/llvm/CodeGen/MachineBasicBlock.h llvm/branches/Apple/Dib/lib/CodeGen/MachineBasicBlock.cpp Modified: llvm/branches/Apple/Dib/include/llvm/CodeGen/MachineBasicBlock.h URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/include/llvm/CodeGen/MachineBasicBlock.h?rev=68161&r1=68160&r2=68161&view=diff ============================================================================== --- llvm/branches/Apple/Dib/include/llvm/CodeGen/MachineBasicBlock.h (original) +++ llvm/branches/Apple/Dib/include/llvm/CodeGen/MachineBasicBlock.h Tue Mar 31 18:58:23 2009 @@ -239,14 +239,14 @@ /// isSuccessor - Return true if the specified MBB is a successor of this /// block. - bool isSuccessor(MachineBasicBlock *MBB) const; + bool isSuccessor(const MachineBasicBlock *MBB) const; /// isLayoutSuccessor - Return true if the specified MBB will be emitted /// immediately after this block, such that if this block exits by /// falling through, control will transfer to the specified MBB. Note /// that MBB need not be a successor at all, for example if this block /// ends with an unconditional branch to some other block. - bool isLayoutSuccessor(MachineBasicBlock *MBB) const; + bool isLayoutSuccessor(const MachineBasicBlock *MBB) const; /// getFirstTerminator - returns an iterator to the first terminator /// instruction of this basic block. If a terminator does not exist, Modified: llvm/branches/Apple/Dib/lib/CodeGen/MachineBasicBlock.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/CodeGen/MachineBasicBlock.cpp?rev=68161&r1=68160&r2=68161&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/CodeGen/MachineBasicBlock.cpp (original) +++ llvm/branches/Apple/Dib/lib/CodeGen/MachineBasicBlock.cpp Tue Mar 31 18:58:23 2009 @@ -258,13 +258,13 @@ fromMBB->removeSuccessor(fromMBB->succ_begin()); } -bool MachineBasicBlock::isSuccessor(MachineBasicBlock *MBB) const { +bool MachineBasicBlock::isSuccessor(const MachineBasicBlock *MBB) const { std::vector::const_iterator I = std::find(Successors.begin(), Successors.end(), MBB); return I != Successors.end(); } -bool MachineBasicBlock::isLayoutSuccessor(MachineBasicBlock *MBB) const { +bool MachineBasicBlock::isLayoutSuccessor(const MachineBasicBlock *MBB) const { MachineFunction::const_iterator I(this); return next(I) == MachineFunction::const_iterator(MBB); } From brukman at gmail.com Tue Mar 31 19:09:01 2009 From: brukman at gmail.com (Misha Brukman) Date: Tue, 31 Mar 2009 20:09:01 -0400 Subject: [llvm-commits] [llvm] r68156 - in /llvm/trunk/lib/Bitcode/Reader: BitcodeReader.cpp BitcodeReader.h In-Reply-To: <200903312255.n2VMtAqb030630@zion.cs.uiuc.edu> References: <200903312255.n2VMtAqb030630@zion.cs.uiuc.edu> Message-ID: On Tue, Mar 31, 2009 at 6:55 PM, Chris Lattner wrote: > > ============================================================================== > --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) > +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Tue Mar 31 17:55:09 > 2009 > @@ -146,64 +146,67 @@ > > > /// Provide fast operand accessors > - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); > + //DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); Chris, Did you mean to delete this line? -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090331/3cc99fe3/attachment.html From brukman+llvm at gmail.com Tue Mar 31 19:15:46 2009 From: brukman+llvm at gmail.com (Misha Brukman) Date: Wed, 01 Apr 2009 00:15:46 -0000 Subject: [llvm-commits] [llvm] r68163 - in /llvm/trunk: include/llvm/Support/CommandLine.h lib/Support/CommandLine.cpp Message-ID: <200904010015.n310Flpx001183@zion.cs.uiuc.edu> Author: brukman Date: Tue Mar 31 19:15:46 2009 New Revision: 68163 URL: http://llvm.org/viewvc/llvm-project?rev=68163&view=rev Log: * Fixed spelling of `invertible' * Simplified if statement Modified: llvm/trunk/include/llvm/Support/CommandLine.h llvm/trunk/lib/Support/CommandLine.cpp Modified: llvm/trunk/include/llvm/Support/CommandLine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CommandLine.h?rev=68163&r1=68162&r2=68163&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/CommandLine.h (original) +++ llvm/trunk/include/llvm/Support/CommandLine.h Tue Mar 31 19:15:46 2009 @@ -537,7 +537,7 @@ // template<> class parser : public basic_parser { - bool IsInvertable; // Should we synthezise a -xno- style option? + bool IsInvertible; // Should we synthesize a -xno- style option? const char *ArgStr; public: void getExtraOptionNames(std::vector &OptionNames); @@ -547,10 +547,7 @@ template void initialize(Opt &O) { - if (O.getMiscFlags() & llvm::cl::AllowInverse) - IsInvertable = true; - else - IsInvertable = false; + IsInvertible = (O.getMiscFlags() & llvm::cl::AllowInverse); ArgStr = O.ArgStr; } Modified: llvm/trunk/lib/Support/CommandLine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/CommandLine.cpp?rev=68163&r1=68162&r2=68163&view=diff ============================================================================== --- llvm/trunk/lib/Support/CommandLine.cpp (original) +++ llvm/trunk/lib/Support/CommandLine.cpp Tue Mar 31 19:15:46 2009 @@ -872,13 +872,13 @@ return O.error(": '" + Arg + "' is invalid value for boolean argument! Try 0 or 1"); } - if (IsInvertable && strncmp(ArgName+1, "no-", 3) == 0) + if (IsInvertible && strncmp(ArgName+1, "no-", 3) == 0) Value = !Value; return false; } void parser::getExtraOptionNames(std::vector &OptionNames) { - if (!IsInvertable) + if (!IsInvertible) return; char *s = new char [strlen(ArgStr) + 3 + 1]; From brukman+llvm at gmail.com Tue Mar 31 19:35:00 2009 From: brukman+llvm at gmail.com (Misha Brukman) Date: Wed, 01 Apr 2009 00:35:00 -0000 Subject: [llvm-commits] [llvm] r68167 - /llvm/trunk/unittests/Makefile.unittest Message-ID: <200904010035.n310Z1Gr001862@zion.cs.uiuc.edu> Author: brukman Date: Tue Mar 31 19:35:00 2009 New Revision: 68167 URL: http://llvm.org/viewvc/llvm-project?rev=68167&view=rev Log: include Makefile.common before using $(BuildMode) to get its definition Modified: llvm/trunk/unittests/Makefile.unittest Modified: llvm/trunk/unittests/Makefile.unittest URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/Makefile.unittest?rev=68167&r1=68166&r2=68167&view=diff ============================================================================== --- llvm/trunk/unittests/Makefile.unittest (original) +++ llvm/trunk/unittests/Makefile.unittest Tue Mar 31 19:35:00 2009 @@ -14,11 +14,10 @@ # Set up variables for building a unit test. ifdef TESTNAME -LLVMUnitTestDir := $(LLVM_OBJ_ROOT)/$(BuildMode)/unittests -LLVMUnitTestExe := $(LLVMUnitTestDir)/$(TESTNAME)Tests$(EXEEXT) - include $(LEVEL)/Makefile.common +LLVMUnitTestExe = $(BuildMode)/$(TESTNAME)Tests$(EXEEXT) + CPP.Flags += -I$(LLVM_SRC_ROOT)/utils/unittest/googletest/include/ CPP.Flags += -Wno-variadic-macros LIBS += -lGoogleTest -lUnitTestMain From clattner at apple.com Tue Mar 31 19:35:22 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 31 Mar 2009 17:35:22 -0700 Subject: [llvm-commits] [llvm] r68156 - in /llvm/trunk/lib/Bitcode/Reader: BitcodeReader.cpp BitcodeReader.h In-Reply-To: References: <200903312255.n2VMtAqb030630@zion.cs.uiuc.edu> Message-ID: <80797F9A-8242-47C4-A98B-782800923534@apple.com> On Mar 31, 2009, at 5:09 PM, Misha Brukman wrote: > On Tue, Mar 31, 2009 at 6:55 PM, Chris Lattner > wrote: > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) > +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Tue Mar 31 > 17:55:09 2009 > @@ -146,64 +146,67 @@ > > > /// Provide fast operand accessors > - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); > + //DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); > > Chris, > > Did you mean to delete this line? Actually, I meant to ask Gabor about it, thanks! Gabor, that line causes a warning when I left it in... should it stay or should it go? What is your opinion? -Chris -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090331/af037308/attachment.html From clattner at apple.com Tue Mar 31 19:53:39 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 31 Mar 2009 17:53:39 -0700 Subject: [llvm-commits] [llvm] r67892 - in /llvm/trunk: include/llvm/Support/CommandLine.h lib/Support/CommandLine.cpp In-Reply-To: <8B5AC6AA-D7EF-45B6-BB7A-D9912244CE12@apple.com> References: <200903280208.n2S28lQ4010375@zion.cs.uiuc.edu> <0EAEDD00-16A2-4847-8C24-315B87661232@apple.com> <8B5AC6AA-D7EF-45B6-BB7A-D9912244CE12@apple.com> Message-ID: On Mar 30, 2009, at 10:06 AM, Mike Stump wrote: > On Mar 27, 2009, at 7:09 PM, Chris Lattner wrote: >> Mike, who delete[]'s the string that is new'd in this code? > > It leaks. That sucks. >> Why should this exist? > > I put it in so that we could handle -foption and -fno-option style > options. Lets remove it when the clang driver starts handling this. -Chris From clattner at apple.com Tue Mar 31 20:04:51 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 31 Mar 2009 18:04:51 -0700 Subject: [llvm-commits] [llvm] r67849 - /llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll In-Reply-To: References: <200903271617.n2RGHboQ032209@zion.cs.uiuc.edu> <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> Message-ID: <0D69456D-406F-47DC-B508-3571C9FC938B@apple.com> On Mar 30, 2009, at 1:34 PM, Misha Brukman wrote: >> Grepping through -debug output isn't very nice in any case, but at >> the >> moment there aren't any better ways to express this specific test. >> >> You can write a unittest to check this. It might require some >> refactoring to be able to run all of LLC's passes separately from >> running the tool on the command line, since they are currently hard- >> coded in its main() function. > > I don't think we want unit tests for passes. We only want unit > tests for low level APIs. > > Let's drop the term "unit" and just call them tests. Ok. > I'm proposing we test passes in C++ instead of a shell script that > calls grep. What is the real value of doing this? The costs I see are 1) increased link time and 2) more dependence on the API (more to update when an API changes). > How else can we check the correctness of a pass, which involves > pattern-matching multiple instructions? Grep can only look at a > single line at a time, and doesn't have the semantic knowledge of > what's an instruction and what's an operand, whereas we have all > this information in C++. I think the answer is that we need to build *one* small "llvmirgrep" tool that does this, which could be used by many different tests. I don't know exactly the syntax for it, but I think it should be something like the tool we use in clang. In clang, we write tests for diagnostics like this: // RUN: clang-cc %s -verify -pedantic -fsyntax-only void test4() { static int var; var =+ 5; // expected-warning {{use of unary operator that may be intended as compound assignment (+=)}} var =- 5; // expected-warning {{use of unary operator that may be intended as compound assignment (-=)}} var = +5; // no warning when space between the = and +. var = -5; var =+5; // no warning when the subexpr of the unary op has no space before it. var =-5; #define FIVE 5 var=-FIVE; // no warning with macros. var=-FIVE; } In this case, the tool is built into clang, but it doesn't need to be. The -verify mode basically runs the compiler as normal, but captures the generated diagnostics to a buffer. It then scans the .c file for the "expected-" comments and "diffs" the generated and expected diagnostics. If we had an llvmirgrep tool, then we could do something like this: ; RUN: llvm-as < %s | opt -instcombine | llvm-irgrep %s define i32 @test(float %f) { ; irgrep {%t1 = bitcast float %f to i32} ; irgrep {ret i32 %t1} %tmp7 = insertelement <4 x float> undef, float %f, i32 0 %tmp17 = bitcast <4 x float> %tmp7 to <4 x i32> %tmp19 = extractelement <4 x i32> %tmp17, i32 0 ret i32 %tmp19 } Which would be smart enough to require that those two instructions be in that basic block of that function, and it would do a fuzzy match to ignore the fact that the generated code names the first instruction "%tmp19". This is based on test/Transforms/InstCombine/vec_extract_elt.ll, and is just a really hand wavy theoretical syntax just to get the idea across. What do you think? -Chris -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090331/1eca2217/attachment.html From clattner at apple.com Tue Mar 31 20:06:00 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 31 Mar 2009 18:06:00 -0700 Subject: [llvm-commits] [llvm] r68142 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/select-2.ll In-Reply-To: <200903312042.n2VKgkQ5025152@zion.cs.uiuc.edu> References: <200903312042.n2VKgkQ5025152@zion.cs.uiuc.edu> Message-ID: <5AB2C871-B0E4-4AA3-86A7-F2BC85A023B3@apple.com> On Mar 31, 2009, at 1:42 PM, Evan Cheng wrote: > Author: evancheng > Date: Tue Mar 31 15:42:45 2009 > New Revision: 68142 > > URL: http://llvm.org/viewvc/llvm-project?rev=68142&view=rev > Log: > Throttle back "fold select into operand" transformation. InstCombine > should not generate selects of two constants unless they are selects > of 0 and 1. Ok, nice. Should instcombine try to fold the other way? If it sees: > define i32 @t2(i32 %c, i32 %x) nounwind { > %t1 = icmp eq i32 %c, 0 > %t2 = select i1 %t1, i32 18, i32 0 > %t3 = lshr i32 %x, %t2 > ret i32 %t3 > } should it turn it into: > define i32 @t1(i32 %c, i32 %x) nounwind { > %t1 = icmp eq i32 %c, 0 > %t2 = lshr i32 %x, 18 > %t3 = select i1 %t1, i32 %t2, i32 %x > ret i32 %t3 > } ? -Chris From evan.cheng at apple.com Tue Mar 31 20:20:28 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 31 Mar 2009 18:20:28 -0700 Subject: [llvm-commits] [llvm] r68142 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/select-2.ll In-Reply-To: <5AB2C871-B0E4-4AA3-86A7-F2BC85A023B3@apple.com> References: <200903312042.n2VKgkQ5025152@zion.cs.uiuc.edu> <5AB2C871-B0E4-4AA3-86A7-F2BC85A023B3@apple.com> Message-ID: <1D3720B8-87E8-4FDF-83D1-8EBB17A99BF7@apple.com> On Mar 31, 2009, at 6:06 PM, Chris Lattner wrote: > > On Mar 31, 2009, at 1:42 PM, Evan Cheng wrote: > >> Author: evancheng >> Date: Tue Mar 31 15:42:45 2009 >> New Revision: 68142 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=68142&view=rev >> Log: >> Throttle back "fold select into operand" transformation. InstCombine >> should not generate selects of two constants unless they are selects >> of 0 and 1. > > Ok, nice. Should instcombine try to fold the other way? If it sees: > >> define i32 @t2(i32 %c, i32 %x) nounwind { >> %t1 = icmp eq i32 %c, 0 >> %t2 = select i1 %t1, i32 18, i32 0 >> %t3 = lshr i32 %x, %t2 >> ret i32 %t3 >> } > > should it turn it into: > >> define i32 @t1(i32 %c, i32 %x) nounwind { >> %t1 = icmp eq i32 %c, 0 >> %t2 = lshr i32 %x, 18 >> %t3 = select i1 %t1, i32 %t2, i32 %x >> ret i32 %t3 >> } > > ? Yes, it's probably a win. Evan > > > -Chris > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From resistor at mac.com Tue Mar 31 20:20:45 2009 From: resistor at mac.com (Owen Anderson) Date: Wed, 01 Apr 2009 01:20:45 -0000 Subject: [llvm-commits] [llvm] r68172 - in /llvm/trunk: lib/Transforms/Scalar/GVN.cpp test/Transforms/GVN/condprop.ll Message-ID: <200904010120.n311Kj8P003670@zion.cs.uiuc.edu> Author: resistor Date: Tue Mar 31 20:20:45 2009 New Revision: 68172 URL: http://llvm.org/viewvc/llvm-project?rev=68172&view=rev Log: Enhance GVN to propagate simple conditionals. This fixes PR3921. Added: llvm/trunk/test/Transforms/GVN/condprop.ll Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=68172&r1=68171&r2=68172&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Tue Mar 31 20:20:45 2009 @@ -121,6 +121,7 @@ AliasAnalysis* AA; MemoryDependenceAnalysis* MD; DominatorTree* DT; + uint32_t true_vn, false_vn; uint32_t nextValueNumber; @@ -138,7 +139,14 @@ Expression create_expression(CallInst* C); Expression create_expression(Constant* C); public: - ValueTable() : nextValueNumber(1) { } + ValueTable() : nextValueNumber(1) { + true_vn = lookup_or_add(ConstantInt::getTrue()); + false_vn = lookup_or_add(ConstantInt::getFalse()); + } + + uint32_t getTrueVN() { return true_vn; } + uint32_t getFalseVN() { return false_vn; } + uint32_t lookup_or_add(Value* V); uint32_t lookup(Value* V) const; void add(Value* V, uint32_t num); @@ -1294,9 +1302,27 @@ uint32_t nextNum = VN.getNextUnusedValueNumber(); unsigned num = VN.lookup_or_add(I); + if (BranchInst* BI = dyn_cast(I)) { + localAvail[I->getParent()]->table.insert(std::make_pair(num, I)); + + if (!BI->isConditional() || isa(BI->getCondition())) + return false; + + Value* branchCond = BI->getCondition(); + uint32_t condVN = VN.lookup_or_add(branchCond); + + BasicBlock* trueSucc = BI->getSuccessor(0); + BasicBlock* falseSucc = BI->getSuccessor(1); + + localAvail[trueSucc]->table.insert(std::make_pair(condVN, + ConstantInt::getTrue())); + localAvail[falseSucc]->table.insert(std::make_pair(condVN, + ConstantInt::getFalse())); + return false; + // Allocations are always uniquely numbered, so we can save time and memory - // by fast failing them. - if (isa(I) || isa(I)) { + // by fast failing them. + } else if (isa(I) || isa(I)) { localAvail[I->getParent()]->table.insert(std::make_pair(num, I)); return false; } @@ -1405,18 +1431,11 @@ bool GVN::processBlock(BasicBlock* BB) { - DomTreeNode* DTN = DT->getNode(BB); // FIXME: Kill off toErase by doing erasing eagerly in a helper function (and // incrementing BI before processing an instruction). SmallVector toErase; bool changed_function = false; - if (DTN->getIDom()) - localAvail[BB] = - new ValueNumberScope(localAvail[DTN->getIDom()->getBlock()]); - else - localAvail[BB] = new ValueNumberScope(0); - for (BasicBlock::iterator BI = BB->begin(), BE = BB->end(); BI != BE;) { changed_function |= processInstruction(BI, toErase); @@ -1607,6 +1626,15 @@ bool GVN::iterateOnFunction(Function &F) { cleanupGlobalSets(); + for (df_iterator DI = df_begin(DT->getRootNode()), + DE = df_end(DT->getRootNode()); DI != DE; ++DI) { + if (DI->getIDom()) + localAvail[DI->getBlock()] = + new ValueNumberScope(localAvail[DI->getIDom()->getBlock()]); + else + localAvail[DI->getBlock()] = new ValueNumberScope(0); + } + // Top-down walk of the dominator tree bool changed = false; #if 0 Added: llvm/trunk/test/Transforms/GVN/condprop.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/condprop.ll?rev=68172&view=auto ============================================================================== --- llvm/trunk/test/Transforms/GVN/condprop.ll (added) +++ llvm/trunk/test/Transforms/GVN/condprop.ll Tue Mar 31 20:20:45 2009 @@ -0,0 +1,52 @@ +; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {br i1 false} + + at a = external global i32 ; [#uses=7] + +define i32 @foo() nounwind { +entry: + %0 = load i32* @a, align 4 ; [#uses=1] + %1 = icmp eq i32 %0, 4 ; [#uses=1] + br i1 %1, label %bb, label %bb1 + +bb: ; preds = %entry + br label %bb8 + +bb1: ; preds = %entry + %2 = load i32* @a, align 4 ; [#uses=1] + %3 = icmp eq i32 %2, 5 ; [#uses=1] + br i1 %3, label %bb2, label %bb3 + +bb2: ; preds = %bb1 + br label %bb8 + +bb3: ; preds = %bb1 + %4 = load i32* @a, align 4 ; [#uses=1] + %5 = icmp eq i32 %4, 4 ; [#uses=1] + br i1 %5, label %bb4, label %bb5 + +bb4: ; preds = %bb3 + %6 = load i32* @a, align 4 ; [#uses=1] + %7 = add i32 %6, 5 ; [#uses=1] + br label %bb8 + +bb5: ; preds = %bb3 + %8 = load i32* @a, align 4 ; [#uses=1] + %9 = icmp eq i32 %8, 5 ; [#uses=1] + br i1 %9, label %bb6, label %bb7 + +bb6: ; preds = %bb5 + %10 = load i32* @a, align 4 ; [#uses=1] + %11 = add i32 %10, 4 ; [#uses=1] + br label %bb8 + +bb7: ; preds = %bb5 + %12 = load i32* @a, align 4 ; [#uses=1] + br label %bb8 + +bb8: ; preds = %bb7, %bb6, %bb4, %bb2, %bb + %.0 = phi i32 [ %12, %bb7 ], [ %11, %bb6 ], [ %7, %bb4 ], [ 4, %bb2 ], [ 5, %bb ] ; [#uses=1] + br label %return + +return: ; preds = %bb8 + ret i32 %.0 +} From sabre at nondot.org Tue Mar 31 20:43:05 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 01 Apr 2009 01:43:05 -0000 Subject: [llvm-commits] [llvm] r68173 - /llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Message-ID: <200904010143.n311h5iM004493@zion.cs.uiuc.edu> Author: lattner Date: Tue Mar 31 20:43:03 2009 New Revision: 68173 URL: http://llvm.org/viewvc/llvm-project?rev=68173&view=rev Log: fix a serious regression I introduced in my previous patch. Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=68173&r1=68172&r2=68173&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Tue Mar 31 20:43:03 2009 @@ -2067,7 +2067,8 @@ if (CallInst* CI = dyn_cast(*UI++)) UpgradeIntrinsicCall(CI, I->second); } - I->first->replaceAllUsesWith(I->second); + if (!I->first->use_empty()) + I->first->replaceAllUsesWith(I->second); I->first->eraseFromParent(); } } From sabre at nondot.org Tue Mar 31 21:03:38 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 01 Apr 2009 02:03:38 -0000 Subject: [llvm-commits] [llvm] r68175 - /llvm/trunk/lib/System/Win32/Path.inc Message-ID: <200904010203.n3123cFW005312@zion.cs.uiuc.edu> Author: lattner Date: Tue Mar 31 21:03:38 2009 New Revision: 68175 URL: http://llvm.org/viewvc/llvm-project?rev=68175&view=rev Log: hopefully fix an apparent build error on windows. Modified: llvm/trunk/lib/System/Win32/Path.inc Modified: llvm/trunk/lib/System/Win32/Path.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/Path.inc?rev=68175&r1=68174&r2=68175&view=diff ============================================================================== --- llvm/trunk/lib/System/Win32/Path.inc (original) +++ llvm/trunk/lib/System/Win32/Path.inc Tue Mar 31 21:03:38 2009 @@ -21,6 +21,7 @@ #include "Win32.h" #include +#include // We need to undo a macro defined in Windows.h, otherwise we won't compile: #undef CopyFile From nicholas at mxc.ca Tue Mar 31 22:48:08 2009 From: nicholas at mxc.ca (Nick Lewycky) Date: Tue, 31 Mar 2009 20:48:08 -0700 Subject: [llvm-commits] [llvm] r67849 - /llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll In-Reply-To: <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> References: <200903271617.n2RGHboQ032209@zion.cs.uiuc.edu> <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> Message-ID: <49D2E3F8.9010208@mxc.ca> Dan Gohman wrote: > On Mar 28, 2009, at 3:07 AM, Bill Wendling wrote: > >> On Mar 27, 2009, at 9:17 AM, Dan Gohman wrote: >> >>> Author: djg >>> Date: Fri Mar 27 11:17:22 2009 >>> New Revision: 67849 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=67849&view=rev >>> Log: >>> Fix this test so that it doesn't spuriously fail due to some >>> unrelated debugging output happening to contain the string "store". >>> >>> Modified: >>> llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll >>> >>> Modified: llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll?rev=67849&r1=67848&r2=67849&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ===================================================================== >>> --- llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll (original) >>> +++ llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll Fri Mar 27 >>> 11:17:22 2009 >>> @@ -1,4 +1,4 @@ >>> -; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep store >>> +; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep {= store} >> I thought that "store" instructions were never assigned to a >> variable... > > This test is grepping through the -debug output of llc, and the stores > its > looking for do happen to be printed with =. > > Grepping through -debug output isn't very nice in any case, but at the > moment there aren't any better ways to express this specific test. The issue with using -debug in a test like this is that the user might have compiled a release build. I don't know about llc, but opt -debug is disabled and llc -debug might be in the future. Perhaps it's time to consider a unit test? Is this something you could test through the API? Nick From nicholas at mxc.ca Tue Mar 31 23:39:25 2009 From: nicholas at mxc.ca (Nick Lewycky) Date: Wed, 01 Apr 2009 04:39:25 -0000 Subject: [llvm-commits] [llvm] r68187 - /llvm/trunk/autoconf/configure.ac Message-ID: <200904010439.n314dP2p010541@zion.cs.uiuc.edu> Author: nicholas Date: Tue Mar 31 23:39:25 2009 New Revision: 68187 URL: http://llvm.org/viewvc/llvm-project?rev=68187&view=rev Log: Detect that we're building from a git checkout like we do for cvs and svn. Based on a patch by Nicolas Trangez on the unladen-swallow mailing list! Modified: llvm/trunk/autoconf/configure.ac Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=68187&r1=68186&r2=68187&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Tue Mar 31 23:39:25 2009 @@ -255,13 +255,13 @@ AC_SUBST(LLVM_CROSS_COMPILING, [0]) fi -dnl Check to see if there's a "CVS" (or .svn) directory indicating that this -dnl build is being done from a checkout. This sets up several defaults for the -dnl command line switches. When we build with a CVS directory, we get a -dnl debug with assertions turned on. Without, we assume a source release and we -dnl get an optimized build without assertions. See --enable-optimized and -dnl --enable-assertions below -if test -d "CVS" -o -d "${srcdir}/CVS" -o -d ".svn" -o -d "${srcdir}/.svn"; then +dnl Check to see if there's a "CVS" (or .svn or .git) directory indicating +dnl that this build is being done from a checkout. This sets up several +dnl defaults for the command line switches. When we build with a CVS directory, +dnl we get a debug with assertions turned on. Without, we assume a source +dnl release and we get an optimized build without assertions. +dnl See --enable-optimized and --enable-assertions below +if test -d "CVS" -o -d "${srcdir}/CVS" -o -d ".svn" -o -d "${srcdir}/.svn" -o -d ".git" -o -d "${srcdir}/.git"; then cvsbuild="yes" optimize="no" AC_SUBST(CVSBUILD,[[CVSBUILD=1]]) From clattner at apple.com Wed Apr 1 00:52:35 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 31 Mar 2009 22:52:35 -0700 Subject: [llvm-commits] [llvm] r67849 - /llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll In-Reply-To: <49D2E3F8.9010208@mxc.ca> References: <200903271617.n2RGHboQ032209@zion.cs.uiuc.edu> <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> <49D2E3F8.9010208@mxc.ca> Message-ID: On Mar 31, 2009, at 8:48 PM, Nick Lewycky wrote: >>>> = >>>> = >>>> =================================================================== >>>> --- llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll (original) >>>> +++ llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll Fri Mar 27 >>>> 11:17:22 2009 >>>> @@ -1,4 +1,4 @@ >>>> -; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep store >>>> +; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep {= >>>> store} >>> I thought that "store" instructions were never assigned to a >>> variable... >> >> This test is grepping through the -debug output of llc, and the >> stores >> its >> looking for do happen to be printed with =. >> >> Grepping through -debug output isn't very nice in any case, but at >> the >> moment there aren't any better ways to express this specific test. > > The issue with using -debug in a test like this is that the user might > have compiled a release build. I don't know about llc, but opt - > debug is > disabled and llc -debug might be in the future. Right, -debug in general doesn't exist in -asserts mode. > Perhaps it's time to consider a unit test? Is this something you could > test through the API? Does anyone know what this testing is attempting to test? If not, just remove that RUN line. -Chris From kremenek at apple.com Wed Apr 1 10:40:21 2009 From: kremenek at apple.com (Ted Kremenek) Date: Wed, 01 Apr 2009 15:40:21 -0000 Subject: [llvm-commits] [llvm] r68206 - /llvm/trunk/include/llvm/CMakeLists.txt Message-ID: <200904011540.n31FeLjO013864@zion.cs.uiuc.edu> Author: kremenek Date: Wed Apr 1 10:40:21 2009 New Revision: 68206 URL: http://llvm.org/viewvc/llvm-project?rev=68206&view=rev Log: CMake: Have generated Xcode projects also contain the LLVM header files. Modified: llvm/trunk/include/llvm/CMakeLists.txt Modified: llvm/trunk/include/llvm/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CMakeLists.txt?rev=68206&r1=68205&r2=68206&view=diff ============================================================================== --- llvm/trunk/include/llvm/CMakeLists.txt (original) +++ llvm/trunk/include/llvm/CMakeLists.txt Wed Apr 1 10:40:21 2009 @@ -7,7 +7,7 @@ set(LLVM_COMMON_DEPENDS ${LLVM_COMMON_DEPENDS} intrinsics_gen PARENT_SCOPE) -if( MSVC_IDE ) +if( MSVC_IDE OR XCODE ) # Creates a dummy target containing all headers for the benefit of # Visual Studio users. file(GLOB_RECURSE headers *.h) From brukman+llvm at gmail.com Wed Apr 1 11:13:29 2009 From: brukman+llvm at gmail.com (Misha Brukman) Date: Wed, 01 Apr 2009 16:13:29 -0000 Subject: [llvm-commits] [llvm] r68209 - /llvm/trunk/include/llvm/TypeSymbolTable.h Message-ID: <200904011613.n31GDUwE015178@zion.cs.uiuc.edu> Author: brukman Date: Wed Apr 1 11:13:29 2009 New Revision: 68209 URL: http://llvm.org/viewvc/llvm-project?rev=68209&view=rev Log: Fixed spelling. Modified: llvm/trunk/include/llvm/TypeSymbolTable.h Modified: llvm/trunk/include/llvm/TypeSymbolTable.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/TypeSymbolTable.h?rev=68209&r1=68208&r2=68209&view=diff ============================================================================== --- llvm/trunk/include/llvm/TypeSymbolTable.h (original) +++ llvm/trunk/include/llvm/TypeSymbolTable.h Wed Apr 1 11:13:29 2009 @@ -87,7 +87,7 @@ /// @brief Get a const_iterator to the start of the symbol table inline const_iterator begin() const { return tmap.begin(); } - /// Get an iterator to the end of the symbol talbe. + /// Get an iterator to the end of the symbol table. inline iterator end() { return tmap.end(); } /// Get a const_iterator to the end of the symbol table. From gohman at apple.com Wed Apr 1 11:37:48 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 01 Apr 2009 16:37:48 -0000 Subject: [llvm-commits] [llvm] r68211 - in /llvm/trunk: lib/Transforms/Scalar/GVN.cpp test/Transforms/GVN/condprop.ll Message-ID: <200904011637.n31Gbmd0016248@zion.cs.uiuc.edu> Author: djg Date: Wed Apr 1 11:37:47 2009 New Revision: 68211 URL: http://llvm.org/viewvc/llvm-project?rev=68211&view=rev Log: Revert r68172. It caused regressions in Applications/Burg/burg Applications/ClamAV/clamscan and many other tests. Removed: llvm/trunk/test/Transforms/GVN/condprop.ll Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=68211&r1=68210&r2=68211&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Wed Apr 1 11:37:47 2009 @@ -121,7 +121,6 @@ AliasAnalysis* AA; MemoryDependenceAnalysis* MD; DominatorTree* DT; - uint32_t true_vn, false_vn; uint32_t nextValueNumber; @@ -139,14 +138,7 @@ Expression create_expression(CallInst* C); Expression create_expression(Constant* C); public: - ValueTable() : nextValueNumber(1) { - true_vn = lookup_or_add(ConstantInt::getTrue()); - false_vn = lookup_or_add(ConstantInt::getFalse()); - } - - uint32_t getTrueVN() { return true_vn; } - uint32_t getFalseVN() { return false_vn; } - + ValueTable() : nextValueNumber(1) { } uint32_t lookup_or_add(Value* V); uint32_t lookup(Value* V) const; void add(Value* V, uint32_t num); @@ -1302,27 +1294,9 @@ uint32_t nextNum = VN.getNextUnusedValueNumber(); unsigned num = VN.lookup_or_add(I); - if (BranchInst* BI = dyn_cast(I)) { - localAvail[I->getParent()]->table.insert(std::make_pair(num, I)); - - if (!BI->isConditional() || isa(BI->getCondition())) - return false; - - Value* branchCond = BI->getCondition(); - uint32_t condVN = VN.lookup_or_add(branchCond); - - BasicBlock* trueSucc = BI->getSuccessor(0); - BasicBlock* falseSucc = BI->getSuccessor(1); - - localAvail[trueSucc]->table.insert(std::make_pair(condVN, - ConstantInt::getTrue())); - localAvail[falseSucc]->table.insert(std::make_pair(condVN, - ConstantInt::getFalse())); - return false; - // Allocations are always uniquely numbered, so we can save time and memory - // by fast failing them. - } else if (isa(I) || isa(I)) { + // by fast failing them. + if (isa(I) || isa(I)) { localAvail[I->getParent()]->table.insert(std::make_pair(num, I)); return false; } @@ -1431,11 +1405,18 @@ bool GVN::processBlock(BasicBlock* BB) { + DomTreeNode* DTN = DT->getNode(BB); // FIXME: Kill off toErase by doing erasing eagerly in a helper function (and // incrementing BI before processing an instruction). SmallVector toErase; bool changed_function = false; + if (DTN->getIDom()) + localAvail[BB] = + new ValueNumberScope(localAvail[DTN->getIDom()->getBlock()]); + else + localAvail[BB] = new ValueNumberScope(0); + for (BasicBlock::iterator BI = BB->begin(), BE = BB->end(); BI != BE;) { changed_function |= processInstruction(BI, toErase); @@ -1626,15 +1607,6 @@ bool GVN::iterateOnFunction(Function &F) { cleanupGlobalSets(); - for (df_iterator DI = df_begin(DT->getRootNode()), - DE = df_end(DT->getRootNode()); DI != DE; ++DI) { - if (DI->getIDom()) - localAvail[DI->getBlock()] = - new ValueNumberScope(localAvail[DI->getIDom()->getBlock()]); - else - localAvail[DI->getBlock()] = new ValueNumberScope(0); - } - // Top-down walk of the dominator tree bool changed = false; #if 0 Removed: llvm/trunk/test/Transforms/GVN/condprop.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/condprop.ll?rev=68210&view=auto ============================================================================== --- llvm/trunk/test/Transforms/GVN/condprop.ll (original) +++ llvm/trunk/test/Transforms/GVN/condprop.ll (removed) @@ -1,52 +0,0 @@ -; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {br i1 false} - - at a = external global i32 ; [#uses=7] - -define i32 @foo() nounwind { -entry: - %0 = load i32* @a, align 4 ; [#uses=1] - %1 = icmp eq i32 %0, 4 ; [#uses=1] - br i1 %1, label %bb, label %bb1 - -bb: ; preds = %entry - br label %bb8 - -bb1: ; preds = %entry - %2 = load i32* @a, align 4 ; [#uses=1] - %3 = icmp eq i32 %2, 5 ; [#uses=1] - br i1 %3, label %bb2, label %bb3 - -bb2: ; preds = %bb1 - br label %bb8 - -bb3: ; preds = %bb1 - %4 = load i32* @a, align 4 ; [#uses=1] - %5 = icmp eq i32 %4, 4 ; [#uses=1] - br i1 %5, label %bb4, label %bb5 - -bb4: ; preds = %bb3 - %6 = load i32* @a, align 4 ; [#uses=1] - %7 = add i32 %6, 5 ; [#uses=1] - br label %bb8 - -bb5: ; preds = %bb3 - %8 = load i32* @a, align 4 ; [#uses=1] - %9 = icmp eq i32 %8, 5 ; [#uses=1] - br i1 %9, label %bb6, label %bb7 - -bb6: ; preds = %bb5 - %10 = load i32* @a, align 4 ; [#uses=1] - %11 = add i32 %10, 4 ; [#uses=1] - br label %bb8 - -bb7: ; preds = %bb5 - %12 = load i32* @a, align 4 ; [#uses=1] - br label %bb8 - -bb8: ; preds = %bb7, %bb6, %bb4, %bb2, %bb - %.0 = phi i32 [ %12, %bb7 ], [ %11, %bb6 ], [ %7, %bb4 ], [ 4, %bb2 ], [ 5, %bb ] ; [#uses=1] - br label %return - -return: ; preds = %bb8 - ret i32 %.0 -} From mrs at apple.com Wed Apr 1 12:27:40 2009 From: mrs at apple.com (Mike Stump) Date: Wed, 1 Apr 2009 10:27:40 -0700 Subject: [llvm-commits] [llvm] r67892 - in /llvm/trunk: include/llvm/Support/CommandLine.h lib/Support/CommandLine.cpp In-Reply-To: References: <200903280208.n2S28lQ4010375@zion.cs.uiuc.edu> <0EAEDD00-16A2-4847-8C24-315B87661232@apple.com> <8B5AC6AA-D7EF-45B6-BB7A-D9912244CE12@apple.com> Message-ID: On Mar 31, 2009, at 5:53 PM, Chris Lattner wrote: > Lets remove it when the clang driver starts handling this. Sure. From bob.wilson at apple.com Wed Apr 1 12:58:54 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Wed, 01 Apr 2009 17:58:54 -0000 Subject: [llvm-commits] [llvm] r68218 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMISelLowering.h test/CodeGen/ARM/inlineasm-imm-arm.ll test/CodeGen/ARM/inlineasm-imm-thumb.ll Message-ID: <200904011758.n31HwsYV020158@zion.cs.uiuc.edu> Author: bwilson Date: Wed Apr 1 12:58:54 2009 New Revision: 68218 URL: http://llvm.org/viewvc/llvm-project?rev=68218&view=rev Log: Fix PR3862: Recognize some ARM-specific constraints for immediates in inline assembly. Added: llvm/trunk/test/CodeGen/ARM/inlineasm-imm-arm.ll llvm/trunk/test/CodeGen/ARM/inlineasm-imm-thumb.ll Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.h Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=68218&r1=68217&r2=68218&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Apr 1 12:58:54 2009 @@ -2014,3 +2014,138 @@ return std::vector(); } + +/// LowerAsmOperandForConstraint - Lower the specified operand into the Ops +/// vector. If it is invalid, don't add anything to Ops. +void ARMTargetLowering::LowerAsmOperandForConstraint(SDValue Op, + char Constraint, + bool hasMemory, + std::vector&Ops, + SelectionDAG &DAG) const { + SDValue Result(0, 0); + + switch (Constraint) { + default: break; + case 'I': case 'J': case 'K': case 'L': + case 'M': case 'N': case 'O': + ConstantSDNode *C = dyn_cast(Op); + if (!C) + return; + + int64_t CVal64 = C->getSExtValue(); + int CVal = (int) CVal64; + // None of these constraints allow values larger than 32 bits. Check + // that the value fits in an int. + if (CVal != CVal64) + return; + + switch (Constraint) { + case 'I': + if (Subtarget->isThumb()) { + // This must be a constant between 0 and 255, for ADD immediates. + if (CVal >= 0 && CVal <= 255) + break; + } else { + // A constant that can be used as an immediate value in a + // data-processing instruction. + if (ARM_AM::getSOImmVal(CVal) != -1) + break; + } + return; + + case 'J': + if (Subtarget->isThumb()) { + // This must be a constant between -255 and -1, for negated ADD + // immediates. This can be used in GCC with an "n" modifier that + // prints the negated value, for use with SUB instructions. It is + // not useful otherwise but is implemented for compatibility. + if (CVal >= -255 && CVal <= -1) + break; + } else { + // This must be a constant between -4095 and 4095. It is not clear + // what this constraint is intended for. Implemented for + // compatibility with GCC. + if (CVal >= -4095 && CVal <= 4095) + break; + } + return; + + case 'K': + if (Subtarget->isThumb()) { + // A 32-bit value where only one byte has a nonzero value. Exclude + // zero to match GCC. This constraint is used by GCC internally for + // constants that can be loaded with a move/shift combination. + // It is not useful otherwise but is implemented for compatibility. + if (CVal != 0 && ARM_AM::isThumbImmShiftedVal(CVal)) + break; + } else { + // A constant whose bitwise inverse can be used as an immediate + // value in a data-processing instruction. This can be used in GCC + // with a "B" modifier that prints the inverted value, for use with + // BIC and MVN instructions. It is not useful otherwise but is + // implemented for compatibility. + if (ARM_AM::getSOImmVal(~CVal) != -1) + break; + } + return; + + case 'L': + if (Subtarget->isThumb()) { + // This must be a constant between -7 and 7, + // for 3-operand ADD/SUB immediate instructions. + if (CVal >= -7 && CVal < 7) + break; + } else { + // A constant whose negation can be used as an immediate value in a + // data-processing instruction. This can be used in GCC with an "n" + // modifier that prints the negated value, for use with SUB + // instructions. It is not useful otherwise but is implemented for + // compatibility. + if (ARM_AM::getSOImmVal(-CVal) != -1) + break; + } + return; + + case 'M': + if (Subtarget->isThumb()) { + // This must be a multiple of 4 between 0 and 1020, for + // ADD sp + immediate. + if ((CVal >= 0 && CVal <= 1020) && ((CVal & 3) == 0)) + break; + } else { + // A power of two or a constant between 0 and 32. This is used in + // GCC for the shift amount on shifted register operands, but it is + // useful in general for any shift amounts. + if ((CVal >= 0 && CVal <= 32) || ((CVal & (CVal - 1)) == 0)) + break; + } + return; + + case 'N': + if (Subtarget->isThumb()) { + // This must be a constant between 0 and 31, for shift amounts. + if (CVal >= 0 && CVal <= 31) + break; + } + return; + + case 'O': + if (Subtarget->isThumb()) { + // This must be a multiple of 4 between -508 and 508, for + // ADD/SUB sp = sp + immediate. + if ((CVal >= -508 && CVal <= 508) && ((CVal & 3) == 0)) + break; + } + return; + } + Result = DAG.getTargetConstant(CVal, Op.getValueType()); + break; + } + + if (Result.getNode()) { + Ops.push_back(Result); + return; + } + return TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, hasMemory, + Ops, DAG); +} Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.h?rev=68218&r1=68217&r2=68218&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.h (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.h Wed Apr 1 12:58:54 2009 @@ -124,6 +124,16 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint, MVT VT) const; + /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops + /// vector. If it is invalid, don't add anything to Ops. If hasMemory is + /// true it means one of the asm constraint of the inline asm instruction + /// being processed is 'm'. + virtual void LowerAsmOperandForConstraint(SDValue Op, + char ConstraintLetter, + bool hasMemory, + std::vector &Ops, + SelectionDAG &DAG) const; + virtual const ARMSubtarget* getSubtarget() { return Subtarget; } Added: llvm/trunk/test/CodeGen/ARM/inlineasm-imm-arm.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/inlineasm-imm-arm.ll?rev=68218&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/inlineasm-imm-arm.ll (added) +++ llvm/trunk/test/CodeGen/ARM/inlineasm-imm-arm.ll Wed Apr 1 12:58:54 2009 @@ -0,0 +1,31 @@ +; RUN: llvm-as < %s | llc -march=arm + +; Test ARM-mode "I" constraint, for any Data Processing immediate. +define i32 @testI(i32 %x) { + %y = call i32 asm "add $0, $1, $2", "=r,r,I"( i32 %x, i32 65280 ) nounwind + ret i32 %y +} + +; Test ARM-mode "J" constraint, for compatibility with unknown use in GCC. +define void @testJ() { + tail call void asm sideeffect ".word $0", "J"( i32 4080 ) nounwind + ret void +} + +; Test ARM-mode "K" constraint, for bitwise inverted Data Processing immediates. +define void @testK() { + tail call void asm sideeffect ".word $0", "K"( i32 16777215 ) nounwind + ret void +} + +; Test ARM-mode "L" constraint, for negated Data Processing immediates. +define void @testL() { + tail call void asm sideeffect ".word $0", "L"( i32 -65280 ) nounwind + ret void +} + +; Test ARM-mode "M" constraint, for value between 0 and 32. +define i32 @testM(i32 %x) { + %y = call i32 asm "lsl $0, $1, $2", "=r,r,M"( i32 %x, i32 31 ) nounwind + ret i32 %y +} Added: llvm/trunk/test/CodeGen/ARM/inlineasm-imm-thumb.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/inlineasm-imm-thumb.ll?rev=68218&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/inlineasm-imm-thumb.ll (added) +++ llvm/trunk/test/CodeGen/ARM/inlineasm-imm-thumb.ll Wed Apr 1 12:58:54 2009 @@ -0,0 +1,43 @@ +; RUN: llvm-as < %s | llc -march=thumb + +; Test Thumb-mode "I" constraint, for ADD immediate. +define i32 @testI(i32 %x) { + %y = call i32 asm "add $0, $1, $2", "=r,r,I"( i32 %x, i32 255 ) nounwind + ret i32 %y +} + +; Test Thumb-mode "J" constraint, for negated ADD immediates. +define void @testJ() { + tail call void asm sideeffect ".word $0", "J"( i32 -255 ) nounwind + ret void +} + +; Test Thumb-mode "K" constraint, for compatibility with GCC's internal use. +define void @testK() { + tail call void asm sideeffect ".word $0", "K"( i32 65280 ) nounwind + ret void +} + +; Test Thumb-mode "L" constraint, for 3-operand ADD immediates. +define i32 @testL(i32 %x) { + %y = call i32 asm "add $0, $1, $2", "=r,r,L"( i32 %x, i32 -7 ) nounwind + ret i32 %y +} + +; Test Thumb-mode "M" constraint, for "ADD r = sp + imm". +define i32 @testM() { + %y = call i32 asm "add $0, sp, $1", "=r,M"( i32 1020 ) nounwind + ret i32 %y +} + +; Test Thumb-mode "N" constraint, for values between 0 and 31. +define i32 @testN(i32 %x) { + %y = call i32 asm "lsl $0, $1, $2", "=r,r,N"( i32 %x, i32 31 ) nounwind + ret i32 %y +} + +; Test Thumb-mode "O" constraint, for "ADD sp = sp + imm". +define void @testO() { + tail call void asm sideeffect "add sp, sp, $0; add sp, sp, $1", "O,O"( i32 -508, i32 508 ) nounwind + ret void +} From gohman at apple.com Wed Apr 1 13:00:32 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 1 Apr 2009 11:00:32 -0700 Subject: [llvm-commits] [llvm] r67849 - /llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll In-Reply-To: References: <200903271617.n2RGHboQ032209@zion.cs.uiuc.edu> <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> <49D2E3F8.9010208@mxc.ca> Message-ID: <06CE8AB1-C016-46A3-A9E1-318343B72583@apple.com> On Mar 31, 2009, at 10:52 PM, Chris Lattner wrote: > > On Mar 31, 2009, at 8:48 PM, Nick Lewycky wrote: > >>>>> = >>>>> = >>>>> = >>>>> ================================================================== >>>>> --- llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll (original) >>>>> +++ llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll Fri Mar 27 >>>>> 11:17:22 2009 >>>>> @@ -1,4 +1,4 @@ >>>>> -; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep store >>>>> +; RUN: llvm-as < %s | llc -march=ppc64 -debug |& not grep {= >>>>> store} >>>> I thought that "store" instructions were never assigned to a >>>> variable... >>> >>> This test is grepping through the -debug output of llc, and the >>> stores >>> its >>> looking for do happen to be printed with =. >>> >>> Grepping through -debug output isn't very nice in any case, but at >>> the >>> moment there aren't any better ways to express this specific test. >> >> The issue with using -debug in a test like this is that the user >> might >> have compiled a release build. I don't know about llc, but opt - >> debug is >> disabled and llc -debug might be in the future. > > Right, -debug in general doesn't exist in -asserts mode. > >> Perhaps it's time to consider a unit test? Is this something you >> could >> test through the API? > > > Does anyone know what this testing is attempting to test? If not, > just remove that RUN line. It's testing that the SelectionDAG phase doesn't introduce a store. There isn't currently a greppable display for the SelectionDAG, though it ought to be possible to create one, with something like DumpNodes. Dan From clattner at apple.com Wed Apr 1 13:05:55 2009 From: clattner at apple.com (Chris Lattner) Date: Wed, 1 Apr 2009 11:05:55 -0700 Subject: [llvm-commits] [llvm] r67849 - /llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll In-Reply-To: <06CE8AB1-C016-46A3-A9E1-318343B72583@apple.com> References: <200903271617.n2RGHboQ032209@zion.cs.uiuc.edu> <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> <49D2E3F8.9010208@mxc.ca> <06CE8AB1-C016-46A3-A9E1-318343B72583@apple.com> Message-ID: On Apr 1, 2009, at 11:00 AM, Dan Gohman wrote: >> >> Does anyone know what this testing is attempting to test? If not, >> just remove that RUN line. > > It's testing that the SelectionDAG phase doesn't introduce a store. > There > isn't currently a greppable display for the SelectionDAG, though it > ought to be possible to create one, with something like DumpNodes. > Why not grep the .s file for the PPC store? The test is ppc64 specific anyway. -Chris From gohman at apple.com Wed Apr 1 13:10:16 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 01 Apr 2009 18:10:16 -0000 Subject: [llvm-commits] [llvm] r68219 - /llvm/trunk/lib/Target/TargetData.cpp Message-ID: <200904011810.n31IAH2v020637@zion.cs.uiuc.edu> Author: djg Date: Wed Apr 1 13:10:16 2009 New Revision: 68219 URL: http://llvm.org/viewvc/llvm-project?rev=68219&view=rev Log: Use LLVM type names instead of C type names in comments, to be less ambiguous and less C-specific. Modified: llvm/trunk/lib/Target/TargetData.cpp Modified: llvm/trunk/lib/Target/TargetData.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetData.cpp?rev=68219&r1=68218&r2=68219&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetData.cpp (original) +++ llvm/trunk/lib/Target/TargetData.cpp Wed Apr 1 13:10:16 2009 @@ -176,11 +176,11 @@ PointerPrefAlign = PointerABIAlign; // Default alignments - setAlignment(INTEGER_ALIGN, 1, 1, 1); // Bool - setAlignment(INTEGER_ALIGN, 1, 1, 8); // Byte - setAlignment(INTEGER_ALIGN, 2, 2, 16); // short - setAlignment(INTEGER_ALIGN, 4, 4, 32); // int - setAlignment(INTEGER_ALIGN, 4, 8, 64); // long + setAlignment(INTEGER_ALIGN, 1, 1, 1); // i1 + setAlignment(INTEGER_ALIGN, 1, 1, 8); // i8 + setAlignment(INTEGER_ALIGN, 2, 2, 16); // i16 + setAlignment(INTEGER_ALIGN, 4, 4, 32); // i32 + setAlignment(INTEGER_ALIGN, 4, 8, 64); // i64 setAlignment(FLOAT_ALIGN, 4, 4, 32); // float setAlignment(FLOAT_ALIGN, 8, 8, 64); // double setAlignment(VECTOR_ALIGN, 8, 8, 64); // v2i32 From kremenek at apple.com Wed Apr 1 13:24:22 2009 From: kremenek at apple.com (Ted Kremenek) Date: Wed, 01 Apr 2009 18:24:22 -0000 Subject: [llvm-commits] [llvm] r68222 - /llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp Message-ID: <200904011824.n31IOMRk021431@zion.cs.uiuc.edu> Author: kremenek Date: Wed Apr 1 13:24:22 2009 New Revision: 68222 URL: http://llvm.org/viewvc/llvm-project?rev=68222&view=rev Log: Constify method to make VC++ happy. Patch by Brian Diekelman! Modified: llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp Modified: llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp?rev=68222&r1=68221&r2=68222&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/ClangDiagnosticsEmitter.cpp Wed Apr 1 13:24:22 2009 @@ -135,8 +135,8 @@ namespace { struct VISIBILITY_HIDDEN CompareOptName { - bool operator()(const Record* A, const Record* B) { - return getOptName(A) < getOptName(B); + bool operator()(const Record* A, const Record* B) const { + return getOptName(A) < getOptName(B); } }; } From criswell at uiuc.edu Wed Apr 1 13:26:12 2009 From: criswell at uiuc.edu (John Criswell) Date: Wed, 01 Apr 2009 18:26:12 -0000 Subject: [llvm-commits] [poolalloc] r68224 - in /poolalloc/trunk: Makefile tools/Pa/Makefile tools/Pa/pa.cpp Message-ID: <200904011826.n31IQCvW021513@zion.cs.uiuc.edu> Author: criswell Date: Wed Apr 1 13:26:12 2009 New Revision: 68224 URL: http://llvm.org/viewvc/llvm-project?rev=68224&view=rev Log: The pa tool now builds by default. Modified: poolalloc/trunk/Makefile poolalloc/trunk/tools/Pa/Makefile poolalloc/trunk/tools/Pa/pa.cpp Modified: poolalloc/trunk/Makefile URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/Makefile?rev=68224&r1=68223&r2=68224&view=diff ============================================================================== --- poolalloc/trunk/Makefile (original) +++ poolalloc/trunk/Makefile Wed Apr 1 13:26:12 2009 @@ -10,7 +10,7 @@ # # Directories that needs to be built. # -DIRS = lib runtime +DIRS = lib runtime tools # # Include the Master Makefile that knows how to build all. Modified: poolalloc/trunk/tools/Pa/Makefile URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/tools/Pa/Makefile?rev=68224&r1=68223&r2=68224&view=diff ============================================================================== --- poolalloc/trunk/tools/Pa/Makefile (original) +++ poolalloc/trunk/tools/Pa/Makefile Wed Apr 1 13:26:12 2009 @@ -12,8 +12,8 @@ # Initialize the USEDLIBS so we can add to it -LINK_COMPONENTS := bitreader bitwriter instrumentation scalaropts ipo - +LINK_COMPONENTS := bitreader bitwriter instrumentation scalaropts ipo \ + nativecodegen USEDLIBS := poolalloc LLVMDataStructure # Include this here so we can get the configuration of the targets Modified: poolalloc/trunk/tools/Pa/pa.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/tools/Pa/pa.cpp?rev=68224&r1=68223&r2=68224&view=diff ============================================================================== --- poolalloc/trunk/tools/Pa/pa.cpp (original) +++ poolalloc/trunk/tools/Pa/pa.cpp Wed Apr 1 13:26:12 2009 @@ -27,6 +27,9 @@ #include "llvm/System/Signals.h" #include "llvm/Config/config.h" +#include "dsa/DSSupport.h" +#include "dsa/DataStructure.h" + #include "poolalloc/PoolAllocate.h" #include From criswell at uiuc.edu Wed Apr 1 13:28:43 2009 From: criswell at uiuc.edu (John Criswell) Date: Wed, 01 Apr 2009 18:28:43 -0000 Subject: [llvm-commits] [poolalloc] r68225 - in /poolalloc/trunk/include/poolalloc/ADT: ./ HashExtras.h Message-ID: <200904011828.n31IShnu021613@zion.cs.uiuc.edu> Author: criswell Date: Wed Apr 1 13:28:43 2009 New Revision: 68225 URL: http://llvm.org/viewvc/llvm-project?rev=68225&view=rev Log: Adding a GCC compatible header file which allows us to use hash_map and hash_set on pointers and strings. Added: poolalloc/trunk/include/poolalloc/ADT/ poolalloc/trunk/include/poolalloc/ADT/HashExtras.h Added: poolalloc/trunk/include/poolalloc/ADT/HashExtras.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc/ADT/HashExtras.h?rev=68225&view=auto ============================================================================== --- poolalloc/trunk/include/poolalloc/ADT/HashExtras.h (added) +++ poolalloc/trunk/include/poolalloc/ADT/HashExtras.h Wed Apr 1 13:28:43 2009 @@ -0,0 +1,49 @@ +//===-- poolalloc/ADT/HashExtras.h - STL hashing for LLVM -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains some templates that are useful if you are working with the +// STL Hashed containers. +// +// No library is required when using these functions. +// +// This header files is a modification of HashExtras.h from LLVM. It is GNU +// C++ specific. +// +//===----------------------------------------------------------------------===// + +#ifndef POOLALLOC_ADT_HASHEXTRAS_H +#define POOLALLOC_ADT_HASHEXTRAS_H + +#include +#include +#include +#include + +// Cannot specialize hash template from outside of the std namespace. +namespace __gnu_cxx { + +// Provide a hash function for arbitrary pointers... +template struct hash { + inline size_t operator()(const T *Val) const { + return reinterpret_cast(Val); + } +}; + +template <> struct hash { + size_t operator()(std::string const &str) const { + return hash()(str.c_str()); + } +}; + +} // End namespace std + +// Use the namespace so that we don't need to state it explictly. +using namespace __gnu_cxx; + +#endif From criswell at uiuc.edu Wed Apr 1 13:33:37 2009 From: criswell at uiuc.edu (John Criswell) Date: Wed, 01 Apr 2009 18:33:37 -0000 Subject: [llvm-commits] [poolalloc] r68226 - in /poolalloc/trunk: include/dsa/DSGraph.h include/dsa/DSNode.h include/dsa/DSSupport.h include/dsa/DataStructure.h include/poolalloc/PoolAllocate.h lib/DSA/DataStructure.cpp Message-ID: <200904011833.n31IXbmV021889@zion.cs.uiuc.edu> Author: criswell Date: Wed Apr 1 13:33:36 2009 New Revision: 68226 URL: http://llvm.org/viewvc/llvm-project?rev=68226&view=rev Log: Modified code to use its own header files to use the hash_set and hash_map containers. LLVM removed support for these last month. Modified: poolalloc/trunk/include/dsa/DSGraph.h poolalloc/trunk/include/dsa/DSNode.h poolalloc/trunk/include/dsa/DSSupport.h poolalloc/trunk/include/dsa/DataStructure.h poolalloc/trunk/include/poolalloc/PoolAllocate.h poolalloc/trunk/lib/DSA/DataStructure.cpp Modified: poolalloc/trunk/include/dsa/DSGraph.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DSGraph.h?rev=68226&r1=68225&r2=68226&view=diff ============================================================================== --- poolalloc/trunk/include/dsa/DSGraph.h (original) +++ poolalloc/trunk/include/dsa/DSGraph.h Wed Apr 1 13:33:36 2009 @@ -16,12 +16,15 @@ #define LLVM_ANALYSIS_DSGRAPH_H #include "dsa/DSNode.h" -#include "llvm/ADT/hash_map.h" #include "llvm/ADT/EquivalenceClasses.h" +#include "poolalloc/ADT/HashExtras.h" +#include +#include #include #include #include + namespace llvm { Modified: poolalloc/trunk/include/dsa/DSNode.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DSNode.h?rev=68226&r1=68225&r2=68226&view=diff ============================================================================== --- poolalloc/trunk/include/dsa/DSNode.h (original) +++ poolalloc/trunk/include/dsa/DSNode.h Wed Apr 1 13:33:36 2009 @@ -15,8 +15,8 @@ #define LLVM_ANALYSIS_DSNODE_H #include "dsa/DSSupport.h" -#include "llvm/ADT/hash_map.h" #include "llvm/Support/Streams.h" +#include "poolalloc/ADT/HashExtras.h" namespace llvm { Modified: poolalloc/trunk/include/dsa/DSSupport.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DSSupport.h?rev=68226&r1=68225&r2=68226&view=diff ============================================================================== --- poolalloc/trunk/include/dsa/DSSupport.h (original) +++ poolalloc/trunk/include/dsa/DSSupport.h Wed Apr 1 13:33:36 2009 @@ -15,9 +15,8 @@ #define LLVM_ANALYSIS_DSSUPPORT_H #include -#include "llvm/ADT/hash_map.h" -#include "llvm/ADT/hash_set.h" #include "llvm/Support/CallSite.h" +#include "poolalloc/ADT/HashExtras.h" namespace llvm { @@ -146,7 +145,7 @@ inline void swap(llvm::DSNodeHandle &NH1, llvm::DSNodeHandle &NH2) { NH1.swap(NH2); } } -namespace HASH_NAMESPACE { +namespace __gnu_cxx { // Provide a hash function for arbitrary pointers... template <> struct hash { inline size_t operator()(const llvm::DSNodeHandle &Val) const { Modified: poolalloc/trunk/include/dsa/DataStructure.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DataStructure.h?rev=68226&r1=68225&r2=68226&view=diff ============================================================================== --- poolalloc/trunk/include/dsa/DataStructure.h (original) +++ poolalloc/trunk/include/dsa/DataStructure.h Wed Apr 1 13:33:36 2009 @@ -17,10 +17,10 @@ #include "llvm/Pass.h" #include "llvm/Target/TargetData.h" #include "llvm/Support/CallSite.h" -#include "llvm/ADT/hash_map.h" -#include "llvm/ADT/hash_set.h" #include "llvm/ADT/EquivalenceClasses.h" +#include "poolalloc/ADT/HashExtras.h" + #include namespace llvm { Modified: poolalloc/trunk/include/poolalloc/PoolAllocate.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc/PoolAllocate.h?rev=68226&r1=68225&r2=68226&view=diff ============================================================================== --- poolalloc/trunk/include/poolalloc/PoolAllocate.h (original) +++ poolalloc/trunk/include/poolalloc/PoolAllocate.h Wed Apr 1 13:33:36 2009 @@ -25,9 +25,9 @@ #include "llvm/Support/CallSite.h" #include "llvm/ADT/EquivalenceClasses.h" #include "llvm/ADT/VectorExtras.h" -#include "llvm/ADT/hash_set.h" #include "llvm/Support/CommandLine.h" #include "dsa/DataStructure.h" +#include "poolalloc/ADT/HashExtras.h" #include "poolalloc/Config/config.h" #include Modified: poolalloc/trunk/lib/DSA/DataStructure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DataStructure.cpp?rev=68226&r1=68225&r2=68226&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DataStructure.cpp (original) +++ poolalloc/trunk/lib/DSA/DataStructure.cpp Wed Apr 1 13:33:36 2009 @@ -30,7 +30,7 @@ #include "llvm/ADT/Statistic.h" #include "llvm/Support/Timer.h" #include "llvm/Support/raw_ostream.h" -#include "llvm/ADT/hash_map.h" +#include "poolalloc/ADT/HashExtras.h" #include #include From gohman at apple.com Wed Apr 1 13:45:58 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 01 Apr 2009 18:45:58 -0000 Subject: [llvm-commits] [llvm] r68227 - in /llvm/trunk: include/llvm/ADT/APInt.h include/llvm/ADT/BitVector.h include/llvm/ADT/SparseBitVector.h include/llvm/Bitcode/BitstreamReader.h include/llvm/CodeGen/LiveInterval.h include/llvm/CodeGen/MachineConstantPool.h include/llvm/CodeGen/SelectionDAGNodes.h include/llvm/Support/CommandLine.h lib/ExecutionEngine/Interpreter/Execution.cpp lib/ExecutionEngine/JIT/JITMemoryManager.cpp lib/Support/APInt.cpp lib/Target/CellSPU/SPUISelLowering.cpp tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp Message-ID: <200904011846.n31Ik00A022388@zion.cs.uiuc.edu> Author: djg Date: Wed Apr 1 13:45:54 2009 New Revision: 68227 URL: http://llvm.org/viewvc/llvm-project?rev=68227&view=rev Log: Use CHAR_BIT instead of hard-coding 8 in several places where it is appropriate. This helps visually differentiate host-oriented calculations from target-oriented calculations. Modified: llvm/trunk/include/llvm/ADT/APInt.h llvm/trunk/include/llvm/ADT/BitVector.h llvm/trunk/include/llvm/ADT/SparseBitVector.h llvm/trunk/include/llvm/Bitcode/BitstreamReader.h llvm/trunk/include/llvm/CodeGen/LiveInterval.h llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h llvm/trunk/include/llvm/Support/CommandLine.h llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp llvm/trunk/lib/ExecutionEngine/JIT/JITMemoryManager.cpp llvm/trunk/lib/Support/APInt.cpp llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp Modified: llvm/trunk/include/llvm/ADT/APInt.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APInt.h?rev=68227&r1=68226&r2=68227&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/APInt.h (original) +++ llvm/trunk/include/llvm/ADT/APInt.h Wed Apr 1 13:45:54 2009 @@ -18,6 +18,7 @@ #include "llvm/Support/DataTypes.h" #include "llvm/Support/MathExtras.h" #include +#include #include #include @@ -81,7 +82,8 @@ /// This enum is used to hold the constants we needed for APInt. enum { /// Bits in a word - APINT_BITS_PER_WORD = static_cast(sizeof(uint64_t)) * 8, + APINT_BITS_PER_WORD = static_cast(sizeof(uint64_t)) * + CHAR_BIT, /// Byte size of a word APINT_WORD_SIZE = static_cast(sizeof(uint64_t)) }; Modified: llvm/trunk/include/llvm/ADT/BitVector.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/BitVector.h?rev=68227&r1=68226&r2=68227&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/BitVector.h (original) +++ llvm/trunk/include/llvm/ADT/BitVector.h Wed Apr 1 13:45:54 2009 @@ -17,6 +17,7 @@ #include "llvm/Support/MathExtras.h" #include #include +#include #include namespace llvm { @@ -24,7 +25,7 @@ class BitVector { typedef unsigned long BitWord; - enum { BITWORD_SIZE = (unsigned)sizeof(BitWord) * 8 }; + enum { BITWORD_SIZE = (unsigned)sizeof(BitWord) * CHAR_BIT }; BitWord *Bits; // Actual bits. unsigned Size; // Size of bitvector in bits. Modified: llvm/trunk/include/llvm/ADT/SparseBitVector.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/SparseBitVector.h?rev=68227&r1=68226&r2=68227&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/SparseBitVector.h (original) +++ llvm/trunk/include/llvm/ADT/SparseBitVector.h Wed Apr 1 13:45:54 2009 @@ -16,6 +16,7 @@ #define LLVM_ADT_SPARSEBITVECTOR_H #include +#include #include #include "llvm/Support/DataTypes.h" #include "llvm/ADT/STLExtras.h" @@ -44,7 +45,7 @@ public: typedef unsigned long BitWord; enum { - BITWORD_SIZE = sizeof(BitWord) * 8, + BITWORD_SIZE = sizeof(BitWord) * CHAR_BIT, BITWORDS_PER_ELEMENT = (ElementSize + BITWORD_SIZE - 1) / BITWORD_SIZE, BITS_PER_ELEMENT = ElementSize }; Modified: llvm/trunk/include/llvm/Bitcode/BitstreamReader.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Bitcode/BitstreamReader.h?rev=68227&r1=68226&r2=68227&view=diff ============================================================================== --- llvm/trunk/include/llvm/Bitcode/BitstreamReader.h (original) +++ llvm/trunk/include/llvm/Bitcode/BitstreamReader.h Wed Apr 1 13:45:54 2009 @@ -16,6 +16,7 @@ #define BITSTREAM_READER_H #include "llvm/Bitcode/BitCodes.h" +#include #include namespace llvm { @@ -114,7 +115,7 @@ /// GetCurrentBitNo - Return the bit # of the bit we are reading. uint64_t GetCurrentBitNo() const { - return (NextChar-FirstChar)*8 + ((32-BitsInCurWord) & 31); + return (NextChar-FirstChar)*CHAR_BIT + ((32-BitsInCurWord) & 31); } /// JumpToBit - Reset the stream to the specified bit number. Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveInterval.h?rev=68227&r1=68226&r2=68227&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveInterval.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveInterval.h Wed Apr 1 13:45:54 2009 @@ -25,6 +25,7 @@ #include "llvm/Support/Allocator.h" #include #include +#include namespace llvm { class MachineInstr; @@ -115,7 +116,7 @@ LiveInterval(unsigned Reg, float Weight, bool IsSS = false) : reg(Reg), weight(Weight), preference(0) { if (IsSS) - reg = reg | (1U << (sizeof(unsigned)*8-1)); + reg = reg | (1U << (sizeof(unsigned)*CHAR_BIT-1)); } typedef Ranges::iterator iterator; @@ -159,14 +160,14 @@ /// isStackSlot - Return true if this is a stack slot interval. /// bool isStackSlot() const { - return reg & (1U << (sizeof(unsigned)*8-1)); + return reg & (1U << (sizeof(unsigned)*CHAR_BIT-1)); } /// getStackSlotIndex - Return stack slot index if this is a stack slot /// interval. int getStackSlotIndex() const { assert(isStackSlot() && "Interval is not a stack slot interval!"); - return reg & ~(1U << (sizeof(unsigned)*8-1)); + return reg & ~(1U << (sizeof(unsigned)*CHAR_BIT-1)); } bool hasAtLeastOneValue() const { return !valnos.empty(); } Modified: llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h?rev=68227&r1=68226&r2=68227&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h Wed Apr 1 13:45:54 2009 @@ -17,6 +17,7 @@ #define LLVM_CODEGEN_MACHINECONSTANTPOOL_H #include +#include #include namespace llvm { @@ -81,7 +82,7 @@ MachineConstantPoolEntry(MachineConstantPoolValue *V, unsigned A) : Alignment(A) { Val.MachineCPVal = V; - Alignment |= 1 << (sizeof(unsigned)*8-1); + Alignment |= 1 << (sizeof(unsigned)*CHAR_BIT-1); } bool isMachineConstantPoolEntry() const { @@ -89,7 +90,7 @@ } int getAlignment() const { - return Alignment & ~(1 << (sizeof(unsigned)*8-1)); + return Alignment & ~(1 << (sizeof(unsigned)*CHAR_BIT-1)); } const Type *getType() const; Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=68227&r1=68226&r2=68227&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Wed Apr 1 13:45:54 2009 @@ -32,6 +32,7 @@ #include "llvm/Support/DataTypes.h" #include "llvm/CodeGen/DebugLoc.h" #include +#include namespace llvm { @@ -1864,7 +1865,7 @@ getSDVTList(VT)), Offset(o), Alignment(0) { assert((int)Offset >= 0 && "Offset is too large"); Val.MachineCPVal = v; - Offset |= 1 << (sizeof(unsigned)*8-1); + Offset |= 1 << (sizeof(unsigned)*CHAR_BIT-1); } ConstantPoolSDNode(bool isTarget, MachineConstantPoolValue *v, MVT VT, int o, unsigned Align) @@ -1873,7 +1874,7 @@ getSDVTList(VT)), Offset(o), Alignment(Align) { assert((int)Offset >= 0 && "Offset is too large"); Val.MachineCPVal = v; - Offset |= 1 << (sizeof(unsigned)*8-1); + Offset |= 1 << (sizeof(unsigned)*CHAR_BIT-1); } public: @@ -1892,7 +1893,7 @@ } int getOffset() const { - return Offset & ~(1 << (sizeof(unsigned)*8-1)); + return Offset & ~(1 << (sizeof(unsigned)*CHAR_BIT-1)); } // Return the alignment of this constant pool object, which is either 0 (for Modified: llvm/trunk/include/llvm/Support/CommandLine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CommandLine.h?rev=68227&r1=68226&r2=68227&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/CommandLine.h (original) +++ llvm/trunk/include/llvm/Support/CommandLine.h Wed Apr 1 13:45:54 2009 @@ -25,6 +25,7 @@ #include "llvm/Support/Compiler.h" #include "llvm/ADT/SmallVector.h" #include +#include #include #include #include @@ -1109,7 +1110,7 @@ template static unsigned Bit(const T &V) { unsigned BitPos = reinterpret_cast(V); - assert(BitPos < sizeof(unsigned) * 8 && + assert(BitPos < sizeof(unsigned) * CHAR_BIT && "enum exceeds width of bit vector!"); return 1 << BitPos; } @@ -1150,7 +1151,7 @@ template static unsigned Bit(const T &V) { unsigned BitPos = reinterpret_cast(V); - assert(BitPos < sizeof(unsigned) * 8 && + assert(BitPos < sizeof(unsigned) * CHAR_BIT && "enum exceeds width of bit vector!"); return 1 << BitPos; } Modified: llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp?rev=68227&r1=68226&r2=68227&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp Wed Apr 1 13:45:54 2009 @@ -1092,10 +1092,10 @@ Dest.PointerVal = Src.PointerVal; } else if (DstTy->isInteger()) { if (SrcTy == Type::FloatTy) { - Dest.IntVal.zext(sizeof(Src.FloatVal) * 8); + Dest.IntVal.zext(sizeof(Src.FloatVal) * CHAR_BIT); Dest.IntVal.floatToBits(Src.FloatVal); } else if (SrcTy == Type::DoubleTy) { - Dest.IntVal.zext(sizeof(Src.DoubleVal) * 8); + Dest.IntVal.zext(sizeof(Src.DoubleVal) * CHAR_BIT); Dest.IntVal.doubleToBits(Src.DoubleVal); } else if (SrcTy->isInteger()) { Dest.IntVal = Src.IntVal; Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITMemoryManager.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITMemoryManager.cpp?rev=68227&r1=68226&r2=68227&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/JIT/JITMemoryManager.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/JIT/JITMemoryManager.cpp Wed Apr 1 13:45:54 2009 @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -48,7 +49,7 @@ /// BlockSize - This is the size in bytes of this memory block, /// including this header. - uintptr_t BlockSize : (sizeof(intptr_t)*8 - 2); + uintptr_t BlockSize : (sizeof(intptr_t)*CHAR_BIT - 2); /// getBlockAfter - Return the memory block immediately after this one. Modified: llvm/trunk/lib/Support/APInt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=68227&r1=68226&r2=68227&view=diff ============================================================================== --- llvm/trunk/lib/Support/APInt.cpp (original) +++ llvm/trunk/lib/Support/APInt.cpp Wed Apr 1 13:45:54 2009 @@ -1631,7 +1631,7 @@ // can't use 64-bit operands here because we don't have native results of // 128-bits. Furthermore, casting the 64-bit values to 32-bit values won't // work on large-endian machines. - uint64_t mask = ~0ull >> (sizeof(unsigned)*8); + uint64_t mask = ~0ull >> (sizeof(unsigned)*CHAR_BIT); unsigned n = rhsWords * 2; unsigned m = (lhsWords * 2) - n; @@ -1661,7 +1661,7 @@ for (unsigned i = 0; i < lhsWords; ++i) { uint64_t tmp = (LHS.getNumWords() == 1 ? LHS.VAL : LHS.pVal[i]); U[i * 2] = (unsigned)(tmp & mask); - U[i * 2 + 1] = (unsigned)(tmp >> (sizeof(unsigned)*8)); + U[i * 2 + 1] = (unsigned)(tmp >> (sizeof(unsigned)*CHAR_BIT)); } U[m+n] = 0; // this extra word is for "spill" in the Knuth algorithm. @@ -1670,7 +1670,7 @@ for (unsigned i = 0; i < rhsWords; ++i) { uint64_t tmp = (RHS.getNumWords() == 1 ? RHS.VAL : RHS.pVal[i]); V[i * 2] = (unsigned)(tmp & mask); - V[i * 2 + 1] = (unsigned)(tmp >> (sizeof(unsigned)*8)); + V[i * 2 + 1] = (unsigned)(tmp >> (sizeof(unsigned)*CHAR_BIT)); } // initialize the quotient and remainder Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=68227&r1=68226&r2=68227&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Wed Apr 1 13:45:54 2009 @@ -2909,7 +2909,7 @@ const SelectionDAG &DAG, unsigned Depth ) const { #if 0 - const uint64_t uint64_sizebits = sizeof(uint64_t) * 8; + const uint64_t uint64_sizebits = sizeof(uint64_t) * CHAR_BIT; switch (Op.getOpcode()) { default: Modified: llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp?rev=68227&r1=68226&r2=68227&view=diff ============================================================================== --- llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp (original) +++ llvm/trunk/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp Wed Apr 1 13:45:54 2009 @@ -425,7 +425,7 @@ if (Dump) std::cerr << "\n\n"; - uint64_t BufferSizeBits = Buffer->getBufferSize()*8; + uint64_t BufferSizeBits = Buffer->getBufferSize()*CHAR_BIT; // Print a summary of the read file. std::cerr << "Summary of " << InputFilename << ":\n"; std::cerr << " Total size: "; From evan.cheng at apple.com Wed Apr 1 13:54:59 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 01 Apr 2009 18:54:59 -0000 Subject: [llvm-commits] [llvm] r68229 - /llvm/trunk/tools/lto/LTOCodeGenerator.cpp Message-ID: <200904011855.n31It1un022927@zion.cs.uiuc.edu> Author: evancheng Date: Wed Apr 1 13:54:56 2009 New Revision: 68229 URL: http://llvm.org/viewvc/llvm-project?rev=68229&view=rev Log: Recognize arm triplets. Modified: llvm/trunk/tools/lto/LTOCodeGenerator.cpp Modified: llvm/trunk/tools/lto/LTOCodeGenerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOCodeGenerator.cpp?rev=68229&r1=68228&r2=68229&view=diff ============================================================================== --- llvm/trunk/tools/lto/LTOCodeGenerator.cpp (original) +++ llvm/trunk/tools/lto/LTOCodeGenerator.cpp Wed Apr 1 13:54:56 2009 @@ -240,6 +240,27 @@ args.push_back("-arch"); args.push_back("ppc64"); } + else if (strncmp(targetTriple.c_str(), "arm-apple-", 10) == 0) { + args.push_back("-arch"); + args.push_back("arm"); + } + else if ((strncmp(targetTriple.c_str(), "armv4t-apple-", 13) == 0) || + (strncmp(targetTriple.c_str(), "thumbv4t-apple-", 15) == 0)) { + args.push_back("-arch"); + args.push_back("armv4t"); + } + else if ((strncmp(targetTriple.c_str(), "armv5-apple-", 12) == 0) || + (strncmp(targetTriple.c_str(), "armv5e-apple-", 13) == 0) || + (strncmp(targetTriple.c_str(), "thumbv5-apple-", 14) == 0) || + (strncmp(targetTriple.c_str(), "thumbv5e-apple-", 15) == 0)) { + args.push_back("-arch"); + args.push_back("armv5"); + } + else if ((strncmp(targetTriple.c_str(), "armv6-apple-", 12) == 0) || + (strncmp(targetTriple.c_str(), "thumbv6-apple-", 14) == 0)) { + args.push_back("-arch"); + args.push_back("armv6"); + } } args.push_back("-c"); args.push_back("-x"); From brukman at gmail.com Wed Apr 1 14:35:33 2009 From: brukman at gmail.com (Misha Brukman) Date: Wed, 1 Apr 2009 15:35:33 -0400 Subject: [llvm-commits] [poolalloc] r68225 - in /poolalloc/trunk/include/poolalloc/ADT: ./ HashExtras.h In-Reply-To: <200904011828.n31IShnu021613@zion.cs.uiuc.edu> References: <200904011828.n31IShnu021613@zion.cs.uiuc.edu> Message-ID: On Wed, Apr 1, 2009 at 2:28 PM, John Criswell wrote: > Author: criswell > Date: Wed Apr 1 13:28:43 2009 > New Revision: 68225 > > URL: http://llvm.org/viewvc/llvm-project?rev=68225&view=rev > Log: > Adding a GCC compatible header file which allows us to use hash_map > and hash_set on pointers and strings. > > Added: > poolalloc/trunk/include/poolalloc/ADT/ > poolalloc/trunk/include/poolalloc/ADT/HashExtras.h I am probably missing something... but why not use the HashExtras.h in LLVM? It seems oddly similar. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090401/ca01f2a4/attachment.html From brukman at gmail.com Wed Apr 1 14:36:13 2009 From: brukman at gmail.com (Misha Brukman) Date: Wed, 1 Apr 2009 15:36:13 -0400 Subject: [llvm-commits] [poolalloc] r68225 - in /poolalloc/trunk/include/poolalloc/ADT: ./ HashExtras.h In-Reply-To: References: <200904011828.n31IShnu021613@zion.cs.uiuc.edu> Message-ID: On Wed, Apr 1, 2009 at 3:35 PM, Misha Brukman wrote: > On Wed, Apr 1, 2009 at 2:28 PM, John Criswell wrote: > >> Author: criswell >> Date: Wed Apr 1 13:28:43 2009 >> New Revision: 68225 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=68225&view=rev >> Log: >> Adding a GCC compatible header file which allows us to use hash_map >> and hash_set on pointers and strings. >> >> Added: >> poolalloc/trunk/include/poolalloc/ADT/ >> poolalloc/trunk/include/poolalloc/ADT/HashExtras.h > > > I am probably missing something... but why not use the HashExtras.h in > LLVM? > It seems oddly similar. > Nevermind, I just read your other commit message. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090401/ee9d4831/attachment.html From mrs at apple.com Wed Apr 1 14:44:50 2009 From: mrs at apple.com (Mike Stump) Date: Wed, 1 Apr 2009 12:44:50 -0700 Subject: [llvm-commits] [llvm] r67849 - /llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll In-Reply-To: <0D69456D-406F-47DC-B508-3571C9FC938B@apple.com> References: <200903271617.n2RGHboQ032209@zion.cs.uiuc.edu> <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> <0D69456D-406F-47DC-B508-3571C9FC938B@apple.com> Message-ID: <2E6CF50A-3DE8-46D7-8400-7CA0C5B64C1A@apple.com> On Mar 31, 2009, at 6:04 PM, Chris Lattner wrote: > I don't know exactly the syntax for it, but I think it should be > something like the tool we use in clang. Oh, I love that thang, it is such a nice way to do testing. From isanbard at gmail.com Wed Apr 1 14:47:27 2009 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 01 Apr 2009 19:47:27 -0000 Subject: [llvm-commits] [llvm] r68237 - /llvm/branches/Apple/Dib/tools/lto/LTOCodeGenerator.cpp Message-ID: <200904011947.n31JlRbV025668@zion.cs.uiuc.edu> Author: void Date: Wed Apr 1 14:47:27 2009 New Revision: 68237 URL: http://llvm.org/viewvc/llvm-project?rev=68237&view=rev Log: --- Merging (from foreign repository) r68229 into '.': U tools/lto/LTOCodeGenerator.cpp Recognize arm triplets. Modified: llvm/branches/Apple/Dib/tools/lto/LTOCodeGenerator.cpp Modified: llvm/branches/Apple/Dib/tools/lto/LTOCodeGenerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/tools/lto/LTOCodeGenerator.cpp?rev=68237&r1=68236&r2=68237&view=diff ============================================================================== --- llvm/branches/Apple/Dib/tools/lto/LTOCodeGenerator.cpp (original) +++ llvm/branches/Apple/Dib/tools/lto/LTOCodeGenerator.cpp Wed Apr 1 14:47:27 2009 @@ -240,6 +240,27 @@ args.push_back("-arch"); args.push_back("ppc64"); } + else if (strncmp(targetTriple.c_str(), "arm-apple-", 10) == 0) { + args.push_back("-arch"); + args.push_back("arm"); + } + else if ((strncmp(targetTriple.c_str(), "armv4t-apple-", 13) == 0) || + (strncmp(targetTriple.c_str(), "thumbv4t-apple-", 15) == 0)) { + args.push_back("-arch"); + args.push_back("armv4t"); + } + else if ((strncmp(targetTriple.c_str(), "armv5-apple-", 12) == 0) || + (strncmp(targetTriple.c_str(), "armv5e-apple-", 13) == 0) || + (strncmp(targetTriple.c_str(), "thumbv5-apple-", 14) == 0) || + (strncmp(targetTriple.c_str(), "thumbv5e-apple-", 15) == 0)) { + args.push_back("-arch"); + args.push_back("armv5"); + } + else if ((strncmp(targetTriple.c_str(), "armv6-apple-", 12) == 0) || + (strncmp(targetTriple.c_str(), "thumbv6-apple-", 14) == 0)) { + args.push_back("-arch"); + args.push_back("armv6"); + } } args.push_back("-c"); args.push_back("-x"); From sabre at nondot.org Wed Apr 1 14:50:49 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 01 Apr 2009 19:50:49 -0000 Subject: [llvm-commits] [llvm] r68239 - in /llvm/trunk/include/llvm/ADT: DenseMap.h DenseSet.h Message-ID: <200904011950.n31JooEU025836@zion.cs.uiuc.edu> Author: lattner Date: Wed Apr 1 14:50:49 2009 New Revision: 68239 URL: http://llvm.org/viewvc/llvm-project?rev=68239&view=rev Log: Add range insert method for DenseSet and define DenseMapInfo for chars. Patch by Kevin Fan! Modified: llvm/trunk/include/llvm/ADT/DenseMap.h llvm/trunk/include/llvm/ADT/DenseSet.h Modified: llvm/trunk/include/llvm/ADT/DenseMap.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/DenseMap.h?rev=68239&r1=68238&r2=68239&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/DenseMap.h (original) +++ llvm/trunk/include/llvm/ADT/DenseMap.h Wed Apr 1 14:50:49 2009 @@ -51,6 +51,17 @@ static bool isPod() { return true; } }; +// Provide DenseMapInfo for chars. +template<> struct DenseMapInfo { + static inline char getEmptyKey() { return ~0; } + static inline char getTombstoneKey() { return ~0 - 1; } + static unsigned getHashValue(const char& Val) { return Val * 37; } + static bool isPod() { return true; } + static bool isEqual(const char &LHS, const char &RHS) { + return LHS == RHS; + } +}; + // Provide DenseMapInfo for unsigned ints. template<> struct DenseMapInfo { static inline unsigned getEmptyKey() { return ~0; } Modified: llvm/trunk/include/llvm/ADT/DenseSet.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/DenseSet.h?rev=68239&r1=68238&r2=68239&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/DenseSet.h (original) +++ llvm/trunk/include/llvm/ADT/DenseSet.h Wed Apr 1 14:50:49 2009 @@ -90,6 +90,13 @@ std::pair insert(const ValueT &V) { return TheMap.insert(std::make_pair(V, 0)); } + + // Range insertion of values. + template + void insert(InputIt I, InputIt E) { + for (; I != E; ++I) + insert(*I); + } }; } // end namespace llvm From brukman at gmail.com Wed Apr 1 15:33:56 2009 From: brukman at gmail.com (Misha Brukman) Date: Wed, 1 Apr 2009 16:33:56 -0400 Subject: [llvm-commits] [llvm] r67849 - /llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll In-Reply-To: <0D69456D-406F-47DC-B508-3571C9FC938B@apple.com> References: <200903271617.n2RGHboQ032209@zion.cs.uiuc.edu> <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> <0D69456D-406F-47DC-B508-3571C9FC938B@apple.com> Message-ID: On Tue, Mar 31, 2009 at 9:04 PM, Chris Lattner wrote: > On Mar 30, 2009, at 1:34 PM, Misha Brukman wrote: > > I'm proposing we test passes in C++ instead of a shell script that calls > grep. > > What is the real value of doing this? The costs I see are 1) increased > link time and 2) more dependence on the API (more to update when an API > changes). > I address your issue (1) in #3 below. I accept your point (2) as valid, but based on personal experience, although it's a non-zero effort, it's not as painful as you imagine, and coupled with the benefits below, I think it's worthwhile. Consider it a tradeoff (of CPU time for human time), rather than simply an added cost. Let's look at the benefits: 1) Tests can be written at any level of the LLVM API, so you can write tests to verify a single function, check that a class modifies its state properly (even private state), verify a pass output, or verify that llc or opt does everything end-to-end correctly. For instance, let's say we have a transformation that's dependent on an analysis, and say we have a test case where the transformation should have no effect. We could test with the opt/diff to make sure the output is the same as input, but that's not really testing what we think we are, because it's testing the interaction of the two, so a bug in one can mask a bug in another. In other words, there are many code paths that can "return false" along the way, and cause the transformation not to be applied, but do you really know WHICH one is responsible? With a C++ test, you can test the analysis pass separately and test its outputs on one test, and then in another test, inject a Mock (or Fake) analysis object with known values, and see how the pass behaves. This lets you test each piece of code independently, and prevents complex interactions from messing with your tests. 2) Although LLVM may have high line-coverage via large tests, we don't know what code path coverage it has, which is also important. If we can only test at the granularity of a pass, there are 2**N code paths, and it's hard to contrive .ll inputs that will cause function foo() to be called with inputs bar and quux (also makes debugging more difficult than it should be, see #3 below). With a single test, you can synthesize exactly what you want the inputs to be, thus avoiding single-stepping through a debugger when you don't need to. So instead of writing, say O(2**N) tests, you can write O(N) tests (in number, not runtime!) to get much better path coverage. 3) Currently, when something is broken, bugpoint is introduced to narrow down the test case to something small, and then the developer steps through the code with a debugger will (hopefully) to find which part of which data structure isn't being updated properly. I have personally been spending *MUCH* less time interacting with debuggers thanks to testing -- instead of setting a break point and manually verifying state at function entry/exit, I can set up the test scenario, and call EXPECT() to verify what I think it should be, and let it run! I'll quickly know if it's a problem or a red herring. This works for any granularity of code, and is really valuable. Without tests, each developer manually repeats the debugging via "Oh, I think it's caused when X happens and Y interacts with Z!". If you have a test for that that you commit to the repository, anyone who thinks it's broken can just re-run the test and see that no, that guess was wrong, try again. This will save everyone a LOT of time, and given that developer time is more valuable than CPU time, I would rather have the machine compile/link/run tests (which is inactive time for me -- I can switch to working on something else), than firing up my debugger to single-step through code and inspect complex data structures that could and should be verified automatically, given my specification (in the form of a test). 4) There are other things we cannot test via opt/grep directly, or even llvmirgrep: (a) anything that doesn't have text-based output to grep through, e.g. (i) analysis passes (alias analysis, etc.) (ii) PassManager (e.g., verify pass ordering in the presence of FunctionPasses and ModulePasses, etc. that's independent of code being run) (b) things that read or emit data are only tested indirectly: bitcode reader/writer, TableGen, code emitters, etc. Bottom line -- I see at least 2 open bugs on Andersen's that would benefit. How about we expose its class in a header to be able to write tests and see how it goes? And there is a bug for a pass that seems to run out of memory that might also benefit. And next time there's some difficult-to-debug problem that you see as similar to the above, please file a bug and assign it to me, I'll see what I can do for it with some targetted tests. How does that sound? > How else can we check the correctness of a pass, which involves > pattern-matching multiple instructions? Grep can only look at a single line > at a time, and doesn't have the semantic knowledge of what's an instruction > and what's an operand, whereas we have all this information in C++. > > I think the answer is that we need to build *one* small "llvmirgrep" tool > that does this, which could be used by many different tests. > This is a tool that doesn't exist yet, which means it will require time and effort to design and implement it, as well as (dare I say it?) test it. But LLVM already has something like this in C++, llvm::PatternMatch. I was thinking this could be used to pattern-match on LLVM expressions to verify the transformations. > I don't know exactly the syntax for it, but I think it should be something > like the tool we use in clang. In clang, we write tests for diagnostics > like this: > [snip example] > In this case, the tool is built into clang, but it doesn't need to be. The > -verify mode basically runs the compiler as normal, but captures the > generated diagnostics to a buffer. It then scans the .c file for the > "expected-" comments and "diffs" the generated and expected diagnostics. > Sure, this works because the diagnostic is on the same line as the error, i.e., you don't need to pattern-match multiple lines. If we had an llvmirgrep tool, then we could do something like this: > > ; RUN: llvm-as < %s | opt -instcombine | llvm-irgrep %s > > define i32 @test(float %f) { > ; irgrep {%t1 = bitcast float %f to i32} > ; irgrep {ret i32 %t1} > %tmp7 = insertelement <4 x float> undef, float %f, i32 0 > %tmp17 = bitcast <4 x float> %tmp7 to <4 x i32> > %tmp19 = extractelement <4 x i32> %tmp17, i32 0 > ret i32 %tmp19 > } > > Which would be smart enough to require that those two instructions be in > that basic block of that function, and it would do a fuzzy match to ignore > the fact that the generated code names the first instruction "%tmp19". > The syntax will get complex when you want to have a pass that deletes an instruction, or moves it outside of a loop, or breaks up a loop header, etc. What you want is structural equivalence, which is what I think llvm::PatternMatch would do for instructions, or llvm-irgrep will re-implement. If it re-uses that API, we should just write tests with it and extend when necessary. If it's re-creating the API, then we're duplicating effort. Since we're hand-waving, let me hand wave some testing code. TEST(InstCombine, BitCast) { // .. create the IR using IRBuilder or other method Function *F = ...; InstCombine.runOnFunction(F); // We want to see a single BasicBlock with this code: // %y = bitcast float %x to i32 // ret i32 %y EXPECT_EQ(1, F->numBasicBlocks()); const BasicBlock &BB = F->front(); Value *X, *Y; ASSERT_TRUE(llvm::PatternMatch::match(BB.getTerminator(), m_BitCast(m_Value(X), m_value(Y)))); ASSERT_EQ(Type::float, X->type()); ASSERT_EQ(Type::i32, Y->type()); } Alternatively, if we write a test helper function to compare equality of two BasicBlocks, we can just do: BasicBlock *ExpectedBB = ...; EXPECT_TRUE(AreBasicBlocksEqual(*ExpectedBB, F->front())); after we set up the ExpectedBB with the code we want it to have. It sounds like llvm-irgrep will have to have this functionality anyway to run your example, but here, you can compare anything structurally, e.g. the flow graph, or even an entire Module, which will probably be hard to express in text for llvm-irgrep. Misha -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090401/d39695d5/attachment.html From isanbard at gmail.com Wed Apr 1 15:39:03 2009 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 01 Apr 2009 20:39:03 -0000 Subject: [llvm-commits] [llvm] r68242 - /llvm/branches/Apple/Dib/lib/CodeGen/Spiller.cpp Message-ID: <200904012039.n31Kd4HT028082@zion.cs.uiuc.edu> Author: void Date: Wed Apr 1 15:38:51 2009 New Revision: 68242 URL: http://llvm.org/viewvc/llvm-project?rev=68242&view=rev Log: Remove dead local variables. Modified: llvm/branches/Apple/Dib/lib/CodeGen/Spiller.cpp Modified: llvm/branches/Apple/Dib/lib/CodeGen/Spiller.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/CodeGen/Spiller.cpp?rev=68242&r1=68241&r2=68242&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/CodeGen/Spiller.cpp (original) +++ llvm/branches/Apple/Dib/lib/CodeGen/Spiller.cpp Wed Apr 1 15:38:51 2009 @@ -218,7 +218,6 @@ static void UpdateKills(MachineInstr &MI, BitVector &RegKills, std::vector &KillOps, const TargetRegisterInfo* TRI) { - const TargetInstrDesc &TID = MI.getDesc(); for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { MachineOperand &MO = MI.getOperand(i); if (!MO.isReg() || !MO.isUse()) @@ -881,7 +880,6 @@ } if (LastUDMI) { - const TargetInstrDesc &TID = LastUDMI->getDesc(); MachineOperand *LastUD = NULL; for (unsigned i = 0, e = LastUDMI->getNumOperands(); i != e; ++i) { MachineOperand &MO = LastUDMI->getOperand(i); @@ -944,7 +942,6 @@ NextMII = next(MII); MachineInstr &MI = *MII; - const TargetInstrDesc &TID = MI.getDesc(); if (VRM.hasEmergencySpills(&MI)) { // Spill physical register(s) in the rare case the allocator has run out From lattner at apple.com Wed Apr 1 16:03:40 2009 From: lattner at apple.com (Tanya Lattner) Date: Wed, 1 Apr 2009 14:03:40 -0700 Subject: [llvm-commits] Coming soon: separate mailing list for branch commits Message-ID: <15A741CC-61F1-41CB-A84F-2E121EEF2352@apple.com> Soon, all commits to branches will have their own mailing list. We hope this will reduce the traffic on llvm-commits and make it easier to see patches to mainline that need to be reviewed. I'll announce details once I have completed the transition. Thanks, Tanya From sabre at nondot.org Wed Apr 1 16:11:19 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 01 Apr 2009 21:11:19 -0000 Subject: [llvm-commits] [llvm] r68243 - /llvm/trunk/docs/ExtendedIntegerResults.txt Message-ID: <200904012111.n31LBK0P029404@zion.cs.uiuc.edu> Author: lattner Date: Wed Apr 1 16:11:04 2009 New Revision: 68243 URL: http://llvm.org/viewvc/llvm-project?rev=68243&view=rev Log: add this to SVN to allow collaborative hacking. Added: llvm/trunk/docs/ExtendedIntegerResults.txt Added: llvm/trunk/docs/ExtendedIntegerResults.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ExtendedIntegerResults.txt?rev=68243&view=auto ============================================================================== --- llvm/trunk/docs/ExtendedIntegerResults.txt (added) +++ llvm/trunk/docs/ExtendedIntegerResults.txt Wed Apr 1 16:11:04 2009 @@ -0,0 +1,133 @@ +//===----------------------------------------------------------------------===// +// Representing sign/zero extension of function results +//===----------------------------------------------------------------------===// + +Mar 25, 2009 - Initial Revision + +Most ABIs specify that functions which return small integers do so in a +specific integer GPR. This is an efficient way to go, but raises the question: +if the returned value is smaller than the register, what do the high bits hold? + +There are three (interesting) possible answers: undefined, zero extended, or +sign extended. The number of bits in question depends on the data-type that +the front-end is referencing (typically i1/i8/i16/i32). + +Knowing the answer to this is important for two reasons: 1) we want to be able +to implement the ABI correctly. If we need to sign extend the result according +to the ABI, we really really do need to do this to preserve correctness. 2) +this information is often useful for optimization purposes, and we want the +mid-level optimizers to be able to process this (e.g. eliminate redundant +extensions). + +For example, lets pretend that X86 requires the caller to properly extend the +result of a return (I'm not sure this is the case, but the argument doesn't +depend on this). Given this, we should compile this: + +int a(); +short b() { return a(); } + +into: + +_b: + subl $12, %esp + call L_a$stub + addl $12, %esp + cwtl + ret + +An optimization example is that we should be able to eliminate the explicit +sign extension in this example: + +short y(); +int z() { + return ((int)y() << 16) >> 16; +} + +_z: + subl $12, %esp + call _y + ;; movswl %ax, %eax -> not needed because eax is already sext'd + addl $12, %esp + ret + +//===----------------------------------------------------------------------===// +// What we have right now. +//===----------------------------------------------------------------------===// + +Currently, these sorts of things are modelled by compiling a function to return +the small type and a signext/zeroext marker is used. For example, we compile +Z into: + +define i32 @z() nounwind { +entry: + %0 = tail call signext i16 (...)* @y() nounwind + %1 = sext i16 %0 to i32 + ret i32 %1 +} + +and b into: + +define signext i16 @b() nounwind { +entry: + %0 = tail call i32 (...)* @a() nounwind ; [#uses=1] + %retval12 = trunc i32 %0 to i16 ; [#uses=1] + ret i16 %retval12 +} + +This has some problems: 1) the actual precise semantics are really poorly +defined (see PR3779). 2) some targets might want the caller to extend, some +might want the callee to extend 3) the mid-level optimizer doesn't know the +size of the GPR, so it doesn't know that %0 is sign extended up to 32-bits +here, and even if it did, it could not eliminate the sext. 4) the code +generator has historically assumed that the result is extended to i32, which is +a problem on PIC16 (and is also probably wrong on alpha and other 64-bit +targets). + +//===----------------------------------------------------------------------===// +// The proposal +//===----------------------------------------------------------------------===// + +I suggest that we have the front-end fully lower out the ABI issues here to +LLVM IR. This makes it 100% explicit what is going on and means that there is +no cause for confusion. For example, the cases above should compile into: + +define i32 @z() nounwind { +entry: + %0 = tail call i32 (...)* @y() nounwind + %1 = trunc i32 %0 to i16 + %2 = sext i16 %1 to i32 + ret i32 %2 +} +define i32 @b() nounwind { +entry: + %0 = tail call i32 (...)* @a() nounwind + %retval12 = trunc i32 %0 to i16 + %tmp = sext i16 %retval12 to i32 + ret i32 %tmp +} + +In this model, no functions will return an i1/i8/i16 (and on a x86-64 target +that extends results to i64, no i32). This solves the ambiguity issue, allows us +to fully describe all possible ABIs, and now allows the optimizers to reason +about and eliminate these extensions. + +The one thing that is missing is the ability for the front-end and optimizer to +specify/infer the guarantees provided by the ABI to allow other optimizations. +For example, in the y/z case, since y is known to return a sign extended value, +the trunc/sext in z should be eliminable. + +This can be done by introducing new sext/zext attributes which mean "I know +that the result of the function is sign extended at least N bits. Given this, +and given that it is stuck on the y function, the mid-level optimizer could +easily eliminate the extensions etc with existing functionality. + +The major disadvantage of doing this sort of thing is that it makes the ABI +lowering stuff even more explicit in the front-end, and that we would like to +eventually move to having the code generator do more of this work. However, +the sad truth of the matter is that this is a) unlikely to happen anytime in +the near future, and b) this is no worse than we have now with the existing +attributes. + +C compilers fundamentally have to reason about the target in many ways. +This is ugly and horrible, but a fact of life. + From dpatel at apple.com Wed Apr 1 16:27:14 2009 From: dpatel at apple.com (Devang Patel) Date: Wed, 01 Apr 2009 21:27:14 -0000 Subject: [llvm-commits] [llvm] r68246 - in /llvm/trunk/include/llvm: Pass.h PassAnalysisSupport.h Message-ID: <200904012127.n31LRFeI030489@zion.cs.uiuc.edu> Author: dpatel Date: Wed Apr 1 16:27:08 2009 New Revision: 68246 URL: http://llvm.org/viewvc/llvm-project?rev=68246&view=rev Log: Remove dead code. Modified: llvm/trunk/include/llvm/Pass.h llvm/trunk/include/llvm/PassAnalysisSupport.h Modified: llvm/trunk/include/llvm/Pass.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Pass.h?rev=68246&r1=68245&r2=68246&view=diff ============================================================================== --- llvm/trunk/include/llvm/Pass.h (original) +++ llvm/trunk/include/llvm/Pass.h Wed Apr 1 16:27:08 2009 @@ -72,10 +72,6 @@ class Pass { AnalysisResolver *Resolver; // Used to resolve analysis intptr_t PassID; - // AnalysisImpls - This keeps track of which passes implement the interfaces - // that are required by the current pass (to implement getAnalysis()). - // - std::vector > AnalysisImpls; void operator=(const Pass&); // DO NOT IMPLEMENT Pass(const Pass &); // DO NOT IMPLEMENT Modified: llvm/trunk/include/llvm/PassAnalysisSupport.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassAnalysisSupport.h?rev=68246&r1=68245&r2=68246&view=diff ============================================================================== --- llvm/trunk/include/llvm/PassAnalysisSupport.h (original) +++ llvm/trunk/include/llvm/PassAnalysisSupport.h Wed Apr 1 16:27:08 2009 @@ -148,8 +148,6 @@ // AnalysisImpls - This keeps track of which passes implements the interfaces // that are required by the current pass (to implement getAnalysis()). - // NOTE : Remove AnalysisImpls from class Pass, when AnalysisResolver - // replaces AnalysisResolver std::vector > AnalysisImpls; private: From brukman+llvm at gmail.com Wed Apr 1 16:33:08 2009 From: brukman+llvm at gmail.com (Misha Brukman) Date: Wed, 01 Apr 2009 21:33:08 -0000 Subject: [llvm-commits] [llvm] r68248 - /llvm/trunk/include/llvm/ADT/HashExtras.h Message-ID: <200904012133.n31LX9ER030813@zion.cs.uiuc.edu> Author: brukman Date: Wed Apr 1 16:33:08 2009 New Revision: 68248 URL: http://llvm.org/viewvc/llvm-project?rev=68248&view=rev Log: Fixed spelling. Modified: llvm/trunk/include/llvm/ADT/HashExtras.h Modified: llvm/trunk/include/llvm/ADT/HashExtras.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/HashExtras.h?rev=68248&r1=68247&r2=68248&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/HashExtras.h (original) +++ llvm/trunk/include/llvm/ADT/HashExtras.h Wed Apr 1 16:33:08 2009 @@ -10,7 +10,7 @@ // This file contains some templates that are useful if you are working with the // STL Hashed containers. // -// No library is required when using these functinons. +// No library is required when using these functions. // //===----------------------------------------------------------------------===// From brukman+llvm at gmail.com Wed Apr 1 16:36:40 2009 From: brukman+llvm at gmail.com (Misha Brukman) Date: Wed, 01 Apr 2009 21:36:40 -0000 Subject: [llvm-commits] [llvm] r68249 - in /llvm/trunk/unittests/Support: MathExtrasTest.cpp raw_ostream_test.cpp Message-ID: <200904012136.n31Laela030970@zion.cs.uiuc.edu> Author: brukman Date: Wed Apr 1 16:36:40 2009 New Revision: 68249 URL: http://llvm.org/viewvc/llvm-project?rev=68249&view=rev Log: Added tests for math utility functions; fixed another test's header comment. Added: llvm/trunk/unittests/Support/MathExtrasTest.cpp Modified: llvm/trunk/unittests/Support/raw_ostream_test.cpp Added: llvm/trunk/unittests/Support/MathExtrasTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/Support/MathExtrasTest.cpp?rev=68249&view=auto ============================================================================== --- llvm/trunk/unittests/Support/MathExtrasTest.cpp (added) +++ llvm/trunk/unittests/Support/MathExtrasTest.cpp Wed Apr 1 16:36:40 2009 @@ -0,0 +1,104 @@ +//===- llvm/unittest/Support/MathExtrasTest.cpp - math utils tests --------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "gtest/gtest.h" +#include "llvm/Support/MathExtras.h" + +using namespace llvm; + +namespace { + +TEST(MathExtras, isPowerOf2_32) { + EXPECT_TRUE(isPowerOf2_32(1 << 6)); + EXPECT_TRUE(isPowerOf2_32(1 << 12)); + EXPECT_FALSE(isPowerOf2_32((1 << 19) + 3)); + EXPECT_FALSE(isPowerOf2_32(0xABCDEF0)); +} + +TEST(MathExtras, isPowerOf2_64) { + EXPECT_TRUE(isPowerOf2_64(1LL << 46)); + EXPECT_TRUE(isPowerOf2_64(1LL << 12)); + EXPECT_FALSE(isPowerOf2_64((1LL << 53) + 3)); + EXPECT_FALSE(isPowerOf2_64(0xABCDEF0ABCDEF0)); +} + +TEST(MathExtras, ByteSwap_32) { + EXPECT_EQ(0x44332211u, ByteSwap_32(0x11223344)); + EXPECT_EQ(0xDDCCBBAAu, ByteSwap_32(0xAABBCCDD)); +} + +TEST(MathExtras, ByteSwap_64) { + EXPECT_EQ(0x8877665544332211ULL, ByteSwap_64(0x1122334455667788)); + EXPECT_EQ(0x1100FFEEDDCCBBAAULL, ByteSwap_64(0xAABBCCDDEEFF0011)); +} + +TEST(MathExtras, CountLeadingZeros_32) { + EXPECT_EQ(8u, CountLeadingZeros_32(0x00F000FF)); + EXPECT_EQ(8u, CountLeadingZeros_32(0x00F12345)); + for (unsigned i = 0; i <= 30; ++i) { + EXPECT_EQ(31 - i, CountLeadingZeros_32(1 << i)); + } +} + +TEST(MathExtras, CountLeadingZeros_64) { + EXPECT_EQ(8u, CountLeadingZeros_64(0x00F1234500F12345)); + EXPECT_EQ(1u, CountLeadingZeros_64(1LL << 62)); + for (unsigned i = 0; i <= 62; ++i) { + EXPECT_EQ(63 - i, CountLeadingZeros_64(1LL << i)); + } +} + +TEST(MathExtras, CountLeadingOnes_32) { + for (int i = 30; i >= 0; --i) { + // Start with all ones and unset some bit. + EXPECT_EQ(31u - i, CountLeadingOnes_32(0xFFFFFFFF ^ (1 << i))); + } +} + +TEST(MathExtras, CountLeadingOnes_64) { + for (int i = 62; i >= 0; --i) { + // Start with all ones and unset some bit. + EXPECT_EQ(63u - i, CountLeadingOnes_64(0xFFFFFFFFFFFFFFFF ^ (1LL << i))); + } + for (int i = 30; i >= 0; --i) { + // Start with all ones and unset some bit. + EXPECT_EQ(31u - i, CountLeadingOnes_32(0xFFFFFFFF ^ (1 << i))); + } +} + +TEST(MathExtras, FloatBits) { + static const float kValue = 5632.34; + EXPECT_FLOAT_EQ(kValue, BitsToFloat(FloatToBits(kValue))); +} + +TEST(MathExtras, DoubleBits) { + static const double kValue = 87987234.983498; + EXPECT_FLOAT_EQ(kValue, BitsToDouble(DoubleToBits(kValue))); +} + +TEST(MathExtras, MinAlign) { + EXPECT_EQ(1u, MinAlign(2, 3)); + EXPECT_EQ(2u, MinAlign(2, 4)); + EXPECT_EQ(1u, MinAlign(17, 64)); + EXPECT_EQ(256u, MinAlign(256, 512)); +} + +TEST(MathExtras, NextPowerOf2) { + EXPECT_EQ(4u, NextPowerOf2(3)); + EXPECT_EQ(16u, NextPowerOf2(15)); + EXPECT_EQ(256u, NextPowerOf2(128)); +} + +TEST(MathExtras, RoundUpToAlignment) { + EXPECT_EQ(8u, RoundUpToAlignment(5, 8)); + EXPECT_EQ(24u, RoundUpToAlignment(17, 8)); + EXPECT_EQ(0u, RoundUpToAlignment(~0LL, 8)); +} + +} Modified: llvm/trunk/unittests/Support/raw_ostream_test.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/Support/raw_ostream_test.cpp?rev=68249&r1=68248&r2=68249&view=diff ============================================================================== --- llvm/trunk/unittests/Support/raw_ostream_test.cpp (original) +++ llvm/trunk/unittests/Support/raw_ostream_test.cpp Wed Apr 1 16:36:40 2009 @@ -1,4 +1,4 @@ -//===- llvm/unittest/Support/raw_ostream.cpp - raw_ostream unit tests -----===// +//===- llvm/unittest/Support/raw_ostream_test.cpp - raw_ostream tests -----===// // // The LLVM Compiler Infrastructure // From brukman+llvm at gmail.com Wed Apr 1 16:37:19 2009 From: brukman+llvm at gmail.com (Misha Brukman) Date: Wed, 01 Apr 2009 21:37:19 -0000 Subject: [llvm-commits] [llvm] r68250 - /llvm/trunk/tools/opt/Makefile Message-ID: <200904012137.n31LbJrK031016@zion.cs.uiuc.edu> Author: brukman Date: Wed Apr 1 16:37:19 2009 New Revision: 68250 URL: http://llvm.org/viewvc/llvm-project?rev=68250&view=rev Log: Fixed file header comment. Modified: llvm/trunk/tools/opt/Makefile Modified: llvm/trunk/tools/opt/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/Makefile?rev=68250&r1=68249&r2=68250&view=diff ============================================================================== --- llvm/trunk/tools/opt/Makefile (original) +++ llvm/trunk/tools/opt/Makefile Wed Apr 1 16:37:19 2009 @@ -1,10 +1,10 @@ -##===- tools/opt/Makefile ------------------------------*- Makefile -*-===## -# +##===- tools/opt/Makefile ----------------------------------*- Makefile -*-===## +# # The LLVM Compiler Infrastructure # # This file is distributed under the University of Illinois Open Source # License. See LICENSE.TXT for details. -# +# ##===----------------------------------------------------------------------===## LEVEL = ../.. TOOLNAME = opt From daniel at zuster.org Wed Apr 1 16:53:24 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 01 Apr 2009 21:53:24 -0000 Subject: [llvm-commits] [llvm] r68252 - in /llvm/trunk: include/llvm/ADT/Triple.h lib/Support/Triple.cpp unittests/ADT/TripleTest.cpp Message-ID: <200904012153.n31LrOIC031758@zion.cs.uiuc.edu> Author: ddunbar Date: Wed Apr 1 16:53:23 2009 New Revision: 68252 URL: http://llvm.org/viewvc/llvm-project?rev=68252&view=rev Log: Add llvm::Triple class for abstracting access to target triples. - The code is silly, I'm just amusing myself. Rewrite to be efficient if you like. :) Also, if you wish to debate the proper names of the triple components I'm all ears. Added: llvm/trunk/include/llvm/ADT/Triple.h llvm/trunk/lib/Support/Triple.cpp llvm/trunk/unittests/ADT/TripleTest.cpp Added: llvm/trunk/include/llvm/ADT/Triple.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Triple.h?rev=68252&view=auto ============================================================================== --- llvm/trunk/include/llvm/ADT/Triple.h (added) +++ llvm/trunk/include/llvm/ADT/Triple.h Wed Apr 1 16:53:23 2009 @@ -0,0 +1,196 @@ +//===-- llvm/ADT/Triple.h - Target triple helper class ----------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_TRIPLE_H +#define LLVM_ADT_TRIPLE_H + +#include + +namespace llvm { + +/// Triple - Helper class for working with target triples. +/// +/// Target triples are strings in the format of: +/// ARCHITECTURE-VENDOR-OPERATING_SYSTEM +/// or +/// ARCHITECTURE-VENDOR-OPERATING_SYSTEM-ENVIRONMENT +/// +/// This class is used for clients which want to support arbitrary +/// target triples, but also want to implement certain special +/// behavior for particular targets. This class isolates the mapping +/// from the components of the target triple to well known IDs. +/// +/// See autoconf/config.guess for a glimpse into what they look like +/// in practice. +class Triple { +public: + enum ArchType { + UnknownArch, + + x86, // i?86 + ppc, // powerpc + ppc64, // powerpc64 + x86_64, // amd64, x86_64 + + InvalidArch + }; + enum VendorType { + UnknownVendor, + + Apple, + PC + }; + enum OSType { + UnknownOS, + + Darwin, + FreeBSD, + Linux + }; + +private: + std::string Data; + + /// The parsed arch type (or InvalidArch if uninitialized). + mutable ArchType Arch; + + /// The parsed vendor type. + mutable VendorType Vendor; + + /// The parsed OS type. + mutable OSType OS; + + bool isInitialized() const { return Arch != InvalidArch; } + void Parse() const; + +public: + /// @name Constructors + /// @{ + + Triple() : Data(""), Arch(InvalidArch) {} + explicit Triple(const char *Str) : Data(Str), Arch(InvalidArch) {} + + /// @} + /// @name Typed Component Access + /// @{ + + /// getArch - Get the parsed architecture type of this triple. + ArchType getArch() const { + if (!isInitialized()) Parse(); + return Arch; + } + + /// getVendor - Get the parsed vendor type of this triple. + VendorType getVendor() const { + if (!isInitialized()) Parse(); + return Vendor; + } + + /// getOS - Get the parsed operating system type of this triple. + OSType getOS() const { + if (!isInitialized()) Parse(); + return OS; + } + + /// hasEnvironment - Does this triple have the optional environment + /// (fourth) component? + bool hasEnvironment() const { + return getEnvironmentName() != ""; + } + + /// @} + /// @name Direct Component Access + /// @{ + + const std::string &getTriple() const { return Data; } + + // FIXME: Invent a lightweight string representation for these to + // use. + + /// getArchName - Get the architecture (first) component of the + /// triple. + std::string getArchName() const; + + /// getVendorName - Get the vendor (second) component of the triple. + std::string getVendorName() const; + + /// getOSName - Get the operating system (third) component of the + /// triple. + std::string getOSName() const; + + /// getEnvironmentName - Get the optional environment (fourth) + /// component of the triple, or "" if empty. + std::string getEnvironmentName() const; + + /// getOSAndEnvironmentName - Get the operating system and optional + /// environment components as a single string (separated by a '-' + /// if the environment component is present). + std::string getOSAndEnvironmentName() const; + + /// @} + /// @name Mutators + /// @{ + + /// setArch - Set the architecture (first) component of the triple + /// to a known type. + void setArch(ArchType Kind); + + /// setVendor - Set the vendor (second) component of the triple to a + /// known type. + void setVendor(VendorType Kind); + + /// setOS - Set the operating system (third) component of the triple + /// to a known type. + void setOS(OSType Kind); + + /// setTriple - Set all components to the new triple \arg Str. + void setTriple(const std::string &Str); + + /// setArchName - Set the architecture (first) component of the + /// triple by name. + void setArchName(const std::string &Str); + + /// setVendorName - Set the vendor (second) component of the triple + /// by name. + void setVendorName(const std::string &Str); + + /// setOSName - Set the operating system (third) component of the + /// triple by name. + void setOSName(const std::string &Str); + + /// setEnvironmentName - Set the optional environment (fourth) + /// component of the triple by name. + void setEnvironmentName(const std::string &Str); + + /// setOSAndEnvironmentName - Set the operating system and optional + /// environment components with a single string. + void setOSAndEnvironmentName(const std::string &Str); + + /// @} + /// @name Static helpers for IDs. + /// @{ + + /// getArchTypeName - Get the canonical name for the \arg Kind + /// architecture. + static const char *getArchTypeName(ArchType Kind); + + /// getVendorTypeName - Get the canonical name for the \arg Kind + /// vendor. + static const char *getVendorTypeName(VendorType Kind); + + /// getOSTypeName - Get the canonical name for the \arg Kind vendor. + static const char *getOSTypeName(OSType Kind); + + /// @} +}; + +} // End llvm namespace + + +#endif Added: llvm/trunk/lib/Support/Triple.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Triple.cpp?rev=68252&view=auto ============================================================================== --- llvm/trunk/lib/Support/Triple.cpp (added) +++ llvm/trunk/lib/Support/Triple.cpp Wed Apr 1 16:53:23 2009 @@ -0,0 +1,183 @@ +//===--- Triple.cpp - Target triple helper class --------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/Triple.h" +#include +using namespace llvm; + +// + +const char *Triple::getArchTypeName(ArchType Kind) { + switch (Kind) { + case InvalidArch: return ""; + case UnknownArch: return "unknown"; + + case x86: return "i386"; + case x86_64: return "x86_64"; + case ppc: return "powerpc"; + case ppc64: return "powerpc64"; + } + + return ""; +} + +const char *Triple::getVendorTypeName(VendorType Kind) { + switch (Kind) { + case UnknownVendor: return "unknown"; + + case Apple: return "apple"; + case PC: return "PC"; + } + + return ""; +} + +const char *Triple::getOSTypeName(OSType Kind) { + switch (Kind) { + case UnknownOS: return "unknown"; + + case Darwin: return "darwin"; + case FreeBSD: return "freebsd"; + case Linux: return "linux"; + } + + return ""; +} + +// + +void Triple::Parse() const { + assert(!isInitialized() && "Invalid parse call."); + + std::string ArchName = getArchName(); + if (ArchName.size() == 4 && ArchName[0] == 'i' && + ArchName[2] == '8' && ArchName[3] == '6') + Arch = x86; + else if (ArchName == "amd64" || ArchName == "x86_64") + Arch = x86_64; + else if (ArchName == "powerpc") + Arch = ppc; + else if (ArchName == "powerpc64") + Arch = ppc64; + else + Arch = UnknownArch; + + std::string VendorName = getVendorName(); + if (VendorName == "apple") + Vendor = Apple; + else if (VendorName == "pc") + Vendor = PC; + else + Vendor = UnknownVendor; + + std::string OSName = getOSName(); + if (memcmp(&OSName[0], "darwin", 6) == 0) + OS = Darwin; + else if (memcmp(&OSName[0], "freebsd", 7) == 0) + OS = FreeBSD; + else if (memcmp(&OSName[0], "linux", 5) == 0) + OS = Linux; + else + OS = UnknownOS; + + assert(isInitialized() && "Failed to initialize!"); +} + +static std::string extract(const std::string &A, + std::string::size_type begin, + std::string::size_type end) { + if (begin == std::string::npos) + return ""; + if (end == std::string::npos) + return A.substr(begin); + return A.substr(begin, end - begin); +} + +static std::string extract1(const std::string &A, + std::string::size_type begin, + std::string::size_type end) { + if (begin == std::string::npos || begin == end) + return ""; + return extract(A, begin + 1, end); +} + +std::string Triple::getArchName() const { + std::string Tmp = Data; + return extract(Tmp, 0, Tmp.find('-')); +} + +std::string Triple::getVendorName() const { + std::string Tmp = Data; + Tmp = extract1(Tmp, Tmp.find('-'), std::string::npos); + return extract(Tmp, 0, Tmp.find('-')); +} + +std::string Triple::getOSName() const { + std::string Tmp = Data; + Tmp = extract1(Tmp, Tmp.find('-'), std::string::npos); + Tmp = extract1(Tmp, Tmp.find('-'), std::string::npos); + return extract(Tmp, 0, Tmp.find('-')); +} + +std::string Triple::getEnvironmentName() const { + std::string Tmp = Data; + Tmp = extract1(Tmp, Tmp.find('-'), std::string::npos); + Tmp = extract1(Tmp, Tmp.find('-'), std::string::npos); + Tmp = extract1(Tmp, Tmp.find('-'), std::string::npos); + return extract(Tmp, 0, std::string::npos); +} + +std::string Triple::getOSAndEnvironmentName() const { + std::string Tmp = Data; + Tmp = extract1(Tmp, Tmp.find('-'), std::string::npos); + Tmp = extract1(Tmp, Tmp.find('-'), std::string::npos); + return extract(Tmp, 0, std::string::npos); +} + +void Triple::setTriple(const std::string &Str) { + Data = Str; + Arch = InvalidArch; +} + +void Triple::setArch(ArchType Kind) { + setArchName(getArchTypeName(Kind)); +} + +void Triple::setVendor(VendorType Kind) { + setVendorName(getVendorTypeName(Kind)); +} + +void Triple::setOS(OSType Kind) { + setOSName(getOSTypeName(Kind)); +} + +void Triple::setArchName(const std::string &Str) { + setTriple(Str + "-" + getVendorName() + "-" + getOSAndEnvironmentName()); +} + +void Triple::setVendorName(const std::string &Str) { + setTriple(getArchName() + "-" + Str + "-" + getOSAndEnvironmentName()); +} + +void Triple::setOSName(const std::string &Str) { + if (hasEnvironment()) + setTriple(getArchName() + "-" + getVendorName() + "-" + Str + + "-" + getEnvironmentName()); + else + setTriple(getArchName() + "-" + getVendorName() + "-" + Str); +} + +void Triple::setEnvironmentName(const std::string &Str) { + setTriple(getArchName() + "-" + getVendorName() + "-" + getOSName() + + "-" + Str); +} + +void Triple::setOSAndEnvironmentName(const std::string &Str) { + setTriple(getArchName() + "-" + getVendorName() + "-" + Str); +} Added: llvm/trunk/unittests/ADT/TripleTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ADT/TripleTest.cpp?rev=68252&view=auto ============================================================================== --- llvm/trunk/unittests/ADT/TripleTest.cpp (added) +++ llvm/trunk/unittests/ADT/TripleTest.cpp Wed Apr 1 16:53:23 2009 @@ -0,0 +1,137 @@ +//===----------- Triple.cpp - Triple unit tests ---------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "gtest/gtest.h" +#include "llvm/ADT/Triple.h" + +using namespace llvm; + +namespace { + +TEST(TripleTest, BasicParsing) { + Triple T; + + T = Triple(""); + EXPECT_EQ(T.getArchName(), ""); + EXPECT_EQ(T.getVendorName(), ""); + EXPECT_EQ(T.getOSName(), ""); + EXPECT_EQ(T.getEnvironmentName(), ""); + + T = Triple("-"); + EXPECT_EQ(T.getArchName(), ""); + EXPECT_EQ(T.getVendorName(), ""); + EXPECT_EQ(T.getOSName(), ""); + EXPECT_EQ(T.getEnvironmentName(), ""); + + T = Triple("--"); + EXPECT_EQ(T.getArchName(), ""); + EXPECT_EQ(T.getVendorName(), ""); + EXPECT_EQ(T.getOSName(), ""); + EXPECT_EQ(T.getEnvironmentName(), ""); + + T = Triple("---"); + EXPECT_EQ(T.getArchName(), ""); + EXPECT_EQ(T.getVendorName(), ""); + EXPECT_EQ(T.getOSName(), ""); + EXPECT_EQ(T.getEnvironmentName(), ""); + + T = Triple("----"); + EXPECT_EQ(T.getArchName(), ""); + EXPECT_EQ(T.getVendorName(), ""); + EXPECT_EQ(T.getOSName(), ""); + EXPECT_EQ(T.getEnvironmentName(), "-"); + + T = Triple("a"); + EXPECT_EQ(T.getArchName(), "a"); + EXPECT_EQ(T.getVendorName(), ""); + EXPECT_EQ(T.getOSName(), ""); + EXPECT_EQ(T.getEnvironmentName(), ""); + + T = Triple("a-b"); + EXPECT_EQ(T.getArchName(), "a"); + EXPECT_EQ(T.getVendorName(), "b"); + EXPECT_EQ(T.getOSName(), ""); + EXPECT_EQ(T.getEnvironmentName(), ""); + + T = Triple("a-b-c"); + EXPECT_EQ(T.getArchName(), "a"); + EXPECT_EQ(T.getVendorName(), "b"); + EXPECT_EQ(T.getOSName(), "c"); + EXPECT_EQ(T.getEnvironmentName(), ""); + + T = Triple("a-b-c-d"); + EXPECT_EQ(T.getArchName(), "a"); + EXPECT_EQ(T.getVendorName(), "b"); + EXPECT_EQ(T.getOSName(), "c"); + EXPECT_EQ(T.getEnvironmentName(), "d"); +} + +TEST(TripleTest, ParsedIDs) { + Triple T; + + T = Triple("i386-apple-darwin"); + EXPECT_EQ(T.getArch(), Triple::x86); + EXPECT_EQ(T.getVendor(), Triple::Apple); + EXPECT_EQ(T.getOS(), Triple::Darwin); + + T = Triple("x86_64-pc-linux-gnu"); + EXPECT_EQ(T.getArch(), Triple::x86_64); + EXPECT_EQ(T.getVendor(), Triple::PC); + EXPECT_EQ(T.getOS(), Triple::Linux); + + T = Triple("powerpc-dunno-notsure"); + EXPECT_EQ(T.getArch(), Triple::ppc); + EXPECT_EQ(T.getVendor(), Triple::UnknownVendor); + EXPECT_EQ(T.getOS(), Triple::UnknownOS); + + T = Triple("huh"); + EXPECT_EQ(T.getArch(), Triple::UnknownArch); +} + +TEST(TripleTest, MutateName) { + Triple T; + EXPECT_EQ(T.getArch(), Triple::UnknownArch); + EXPECT_EQ(T.getVendor(), Triple::UnknownVendor); + EXPECT_EQ(T.getOS(), Triple::UnknownOS); + + T.setArchName("i386"); + EXPECT_EQ(T.getArch(), Triple::x86); + EXPECT_EQ(T.getTriple(), "i386--"); + + T.setVendorName("pc"); + EXPECT_EQ(T.getArch(), Triple::x86); + EXPECT_EQ(T.getVendor(), Triple::PC); + EXPECT_EQ(T.getTriple(), "i386-pc-"); + + T.setOSName("linux"); + EXPECT_EQ(T.getArch(), Triple::x86); + EXPECT_EQ(T.getVendor(), Triple::PC); + EXPECT_EQ(T.getOS(), Triple::Linux); + EXPECT_EQ(T.getTriple(), "i386-pc-linux"); + + T.setEnvironmentName("gnu"); + EXPECT_EQ(T.getArch(), Triple::x86); + EXPECT_EQ(T.getVendor(), Triple::PC); + EXPECT_EQ(T.getOS(), Triple::Linux); + EXPECT_EQ(T.getTriple(), "i386-pc-linux-gnu"); + + T.setOSName("freebsd"); + EXPECT_EQ(T.getArch(), Triple::x86); + EXPECT_EQ(T.getVendor(), Triple::PC); + EXPECT_EQ(T.getOS(), Triple::FreeBSD); + EXPECT_EQ(T.getTriple(), "i386-pc-freebsd-gnu"); + + T.setOSAndEnvironmentName("darwin"); + EXPECT_EQ(T.getArch(), Triple::x86); + EXPECT_EQ(T.getVendor(), Triple::PC); + EXPECT_EQ(T.getOS(), Triple::Darwin); + EXPECT_EQ(T.getTriple(), "i386-pc-darwin"); +} + +} From sabre at nondot.org Wed Apr 1 17:14:46 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 01 Apr 2009 22:14:46 -0000 Subject: [llvm-commits] [llvm] r68253 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200904012214.n31MEk8L032766@zion.cs.uiuc.edu> Author: lattner Date: Wed Apr 1 17:14:45 2009 New Revision: 68253 URL: http://llvm.org/viewvc/llvm-project?rev=68253&view=rev Log: silence warning in release-asserts build. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=68253&r1=68252&r2=68253&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Apr 1 17:14:45 2009 @@ -4869,8 +4869,6 @@ case TLSModel::InitialExec: // not implemented case TLSModel::LocalExec: // not implemented return LowerToTLSGeneralDynamicModel64(GA, DAG, getPointerTy()); - default: - assert (0 && "Unknown TLS model"); } } else { switch (model) { @@ -4881,10 +4879,10 @@ case TLSModel::InitialExec: case TLSModel::LocalExec: return LowerToTLSExecModel(GA, DAG, getPointerTy(), model); - default: - assert (0 && "Unknown TLS model"); } } + assert(0 && "Unreachable"); + return SDValue(); } SDValue From dpatel at apple.com Wed Apr 1 17:34:42 2009 From: dpatel at apple.com (Devang Patel) Date: Wed, 01 Apr 2009 22:34:42 -0000 Subject: [llvm-commits] [llvm] r68254 - in /llvm/trunk: include/llvm/PassAnalysisSupport.h include/llvm/PassManagers.h lib/VMCore/PassManager.cpp Message-ID: <200904012234.n31MYgDV001285@zion.cs.uiuc.edu> Author: dpatel Date: Wed Apr 1 17:34:41 2009 New Revision: 68254 URL: http://llvm.org/viewvc/llvm-project?rev=68254&view=rev Log: Clean up pass manager cache after each run. Modified: llvm/trunk/include/llvm/PassAnalysisSupport.h llvm/trunk/include/llvm/PassManagers.h llvm/trunk/lib/VMCore/PassManager.cpp Modified: llvm/trunk/include/llvm/PassAnalysisSupport.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassAnalysisSupport.h?rev=68254&r1=68253&r2=68254&view=diff ============================================================================== --- llvm/trunk/include/llvm/PassAnalysisSupport.h (original) +++ llvm/trunk/include/llvm/PassAnalysisSupport.h Wed Apr 1 17:34:41 2009 @@ -143,6 +143,12 @@ AnalysisImpls.push_back(pir); } + /// clearAnalysisImpls - Clear cache that is used to connect a pass to the + /// the analysis (PassInfo). + void clearAnalysisImpls() { + AnalysisImpls.clear(); + } + // getAnalysisIfAvailable - Return analysis result or null if it doesn't exist Pass *getAnalysisIfAvailable(AnalysisID ID, bool Direction) const; Modified: llvm/trunk/include/llvm/PassManagers.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassManagers.h?rev=68254&r1=68253&r2=68254&view=diff ============================================================================== --- llvm/trunk/include/llvm/PassManagers.h (original) +++ llvm/trunk/include/llvm/PassManagers.h Wed Apr 1 17:34:41 2009 @@ -414,6 +414,9 @@ /// whether any of the passes modifies the module, and if so, return true. bool runOnFunction(Function &F); bool runOnModule(Module &M); + + /// cleanup - After running all passes, clean up pass manager cache. + void cleanup(); /// doInitialization - Run all of the initializers for the function passes. /// Modified: llvm/trunk/lib/VMCore/PassManager.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/PassManager.cpp?rev=68254&r1=68253&r2=68254&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/PassManager.cpp (original) +++ llvm/trunk/lib/VMCore/PassManager.cpp Wed Apr 1 17:34:41 2009 @@ -1267,6 +1267,16 @@ return Changed; } +/// cleanup - After running all passes, clean up pass manager cache. +void FPPassManager::cleanup() { + for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) { + FunctionPass *FP = getContainedPass(Index); + AnalysisResolver *AR = FP->getResolver(); + assert(AR && "Analysis Resolver is not set"); + AR->clearAnalysisImpls(); + } +} + // Execute all the passes managed by this top level manager. // Return true if any function is modified by a pass. bool FunctionPassManagerImpl::run(Function &F) { @@ -1279,6 +1289,10 @@ initializeAllAnalysisInfo(); for (unsigned Index = 0; Index < getNumContainedManagers(); ++Index) Changed |= getContainedManager(Index)->runOnFunction(F); + + for (unsigned Index = 0; Index < getNumContainedManagers(); ++Index) + getContainedManager(Index)->cleanup(); + return Changed; } From isanbard at gmail.com Wed Apr 1 17:39:53 2009 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 01 Apr 2009 22:39:53 -0000 Subject: [llvm-commits] [llvm] r68256 - in /llvm/branches/Apple/Dib: include/llvm/PassAnalysisSupport.h include/llvm/PassManagers.h lib/VMCore/PassManager.cpp Message-ID: <200904012239.n31MdrgD001546@zion.cs.uiuc.edu> Author: void Date: Wed Apr 1 17:39:52 2009 New Revision: 68256 URL: http://llvm.org/viewvc/llvm-project?rev=68256&view=rev Log: --- Merging (from foreign repository) r68254 into '.': U include/llvm/PassAnalysisSupport.h U include/llvm/PassManagers.h U lib/VMCore/PassManager.cpp Clean up pass manager cache after each run. Modified: llvm/branches/Apple/Dib/include/llvm/PassAnalysisSupport.h llvm/branches/Apple/Dib/include/llvm/PassManagers.h llvm/branches/Apple/Dib/lib/VMCore/PassManager.cpp Modified: llvm/branches/Apple/Dib/include/llvm/PassAnalysisSupport.h URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/include/llvm/PassAnalysisSupport.h?rev=68256&r1=68255&r2=68256&view=diff ============================================================================== --- llvm/branches/Apple/Dib/include/llvm/PassAnalysisSupport.h (original) +++ llvm/branches/Apple/Dib/include/llvm/PassAnalysisSupport.h Wed Apr 1 17:39:52 2009 @@ -143,6 +143,12 @@ AnalysisImpls.push_back(pir); } + /// clearAnalysisImpls - Clear cache that is used to connect a pass to the + /// the analysis (PassInfo). + void clearAnalysisImpls() { + AnalysisImpls.clear(); + } + // getAnalysisIfAvailable - Return analysis result or null if it doesn't exist Pass *getAnalysisIfAvailable(AnalysisID ID, bool Direction) const; Modified: llvm/branches/Apple/Dib/include/llvm/PassManagers.h URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/include/llvm/PassManagers.h?rev=68256&r1=68255&r2=68256&view=diff ============================================================================== --- llvm/branches/Apple/Dib/include/llvm/PassManagers.h (original) +++ llvm/branches/Apple/Dib/include/llvm/PassManagers.h Wed Apr 1 17:39:52 2009 @@ -414,6 +414,9 @@ /// whether any of the passes modifies the module, and if so, return true. bool runOnFunction(Function &F); bool runOnModule(Module &M); + + /// cleanup - After running all passes, clean up pass manager cache. + void cleanup(); /// doInitialization - Run all of the initializers for the function passes. /// Modified: llvm/branches/Apple/Dib/lib/VMCore/PassManager.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/VMCore/PassManager.cpp?rev=68256&r1=68255&r2=68256&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/VMCore/PassManager.cpp (original) +++ llvm/branches/Apple/Dib/lib/VMCore/PassManager.cpp Wed Apr 1 17:39:52 2009 @@ -1267,6 +1267,16 @@ return Changed; } +/// cleanup - After running all passes, clean up pass manager cache. +void FPPassManager::cleanup() { + for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) { + FunctionPass *FP = getContainedPass(Index); + AnalysisResolver *AR = FP->getResolver(); + assert(AR && "Analysis Resolver is not set"); + AR->clearAnalysisImpls(); + } +} + // Execute all the passes managed by this top level manager. // Return true if any function is modified by a pass. bool FunctionPassManagerImpl::run(Function &F) { @@ -1279,6 +1289,10 @@ initializeAllAnalysisInfo(); for (unsigned Index = 0; Index < getNumContainedManagers(); ++Index) Changed |= getContainedManager(Index)->runOnFunction(F); + + for (unsigned Index = 0; Index < getNumContainedManagers(); ++Index) + getContainedManager(Index)->cleanup(); + return Changed; } From isanbard at gmail.com Wed Apr 1 17:44:19 2009 From: isanbard at gmail.com (Bill Wendling) Date: Wed, 01 Apr 2009 22:44:19 -0000 Subject: [llvm-commits] [llvm] r68258 - /llvm/trunk/unittests/Support/MathExtrasTest.cpp Message-ID: <200904012244.n31MiJhg001767@zion.cs.uiuc.edu> Author: void Date: Wed Apr 1 17:44:18 2009 New Revision: 68258 URL: http://llvm.org/viewvc/llvm-project?rev=68258&view=rev Log: Make the constants fit. Modified: llvm/trunk/unittests/Support/MathExtrasTest.cpp Modified: llvm/trunk/unittests/Support/MathExtrasTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/Support/MathExtrasTest.cpp?rev=68258&r1=68257&r2=68258&view=diff ============================================================================== --- llvm/trunk/unittests/Support/MathExtrasTest.cpp (original) +++ llvm/trunk/unittests/Support/MathExtrasTest.cpp Wed Apr 1 17:44:18 2009 @@ -25,7 +25,7 @@ EXPECT_TRUE(isPowerOf2_64(1LL << 46)); EXPECT_TRUE(isPowerOf2_64(1LL << 12)); EXPECT_FALSE(isPowerOf2_64((1LL << 53) + 3)); - EXPECT_FALSE(isPowerOf2_64(0xABCDEF0ABCDEF0)); + EXPECT_FALSE(isPowerOf2_64(0xABCDEF0ABCDEF0LL)); } TEST(MathExtras, ByteSwap_32) { @@ -34,8 +34,8 @@ } TEST(MathExtras, ByteSwap_64) { - EXPECT_EQ(0x8877665544332211ULL, ByteSwap_64(0x1122334455667788)); - EXPECT_EQ(0x1100FFEEDDCCBBAAULL, ByteSwap_64(0xAABBCCDDEEFF0011)); + EXPECT_EQ(0x8877665544332211ULL, ByteSwap_64(0x1122334455667788LL)); + EXPECT_EQ(0x1100FFEEDDCCBBAAULL, ByteSwap_64(0xAABBCCDDEEFF0011LL)); } TEST(MathExtras, CountLeadingZeros_32) { @@ -47,7 +47,7 @@ } TEST(MathExtras, CountLeadingZeros_64) { - EXPECT_EQ(8u, CountLeadingZeros_64(0x00F1234500F12345)); + EXPECT_EQ(8u, CountLeadingZeros_64(0x00F1234500F12345LL)); EXPECT_EQ(1u, CountLeadingZeros_64(1LL << 62)); for (unsigned i = 0; i <= 62; ++i) { EXPECT_EQ(63 - i, CountLeadingZeros_64(1LL << i)); @@ -64,7 +64,7 @@ TEST(MathExtras, CountLeadingOnes_64) { for (int i = 62; i >= 0; --i) { // Start with all ones and unset some bit. - EXPECT_EQ(63u - i, CountLeadingOnes_64(0xFFFFFFFFFFFFFFFF ^ (1LL << i))); + EXPECT_EQ(63u - i, CountLeadingOnes_64(0xFFFFFFFFFFFFFFFFLL ^ (1LL << i))); } for (int i = 30; i >= 0; --i) { // Start with all ones and unset some bit. From resistor at mac.com Wed Apr 1 18:53:49 2009 From: resistor at mac.com (Owen Anderson) Date: Wed, 01 Apr 2009 23:53:49 -0000 Subject: [llvm-commits] [llvm] r68262 - in /llvm/trunk: lib/Transforms/Scalar/GVN.cpp test/Transforms/GVN/condprop.ll Message-ID: <200904012353.n31Nrn8c004938@zion.cs.uiuc.edu> Author: resistor Date: Wed Apr 1 18:53:49 2009 New Revision: 68262 URL: http://llvm.org/viewvc/llvm-project?rev=68262&view=rev Log: Reapply r68211, with the miscompilations it caused fixed. Added: llvm/trunk/test/Transforms/GVN/condprop.ll Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=68262&r1=68261&r2=68262&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Wed Apr 1 18:53:49 2009 @@ -1294,9 +1294,28 @@ uint32_t nextNum = VN.getNextUnusedValueNumber(); unsigned num = VN.lookup_or_add(I); + if (BranchInst* BI = dyn_cast(I)) { + localAvail[I->getParent()]->table.insert(std::make_pair(num, I)); + + if (!BI->isConditional() || isa(BI->getCondition())) + return false; + + Value* branchCond = BI->getCondition(); + uint32_t condVN = VN.lookup_or_add(branchCond); + + BasicBlock* trueSucc = BI->getSuccessor(0); + BasicBlock* falseSucc = BI->getSuccessor(1); + + if (trueSucc->getSinglePredecessor()) + localAvail[trueSucc]->table[condVN] = ConstantInt::getTrue(); + if (falseSucc->getSinglePredecessor()) + localAvail[falseSucc]->table[condVN] = ConstantInt::getFalse(); + + return false; + // Allocations are always uniquely numbered, so we can save time and memory - // by fast failing them. - if (isa(I) || isa(I)) { + // by fast failing them. + } else if (isa(I) || isa(I)) { localAvail[I->getParent()]->table.insert(std::make_pair(num, I)); return false; } @@ -1405,18 +1424,11 @@ bool GVN::processBlock(BasicBlock* BB) { - DomTreeNode* DTN = DT->getNode(BB); // FIXME: Kill off toErase by doing erasing eagerly in a helper function (and // incrementing BI before processing an instruction). SmallVector toErase; bool changed_function = false; - if (DTN->getIDom()) - localAvail[BB] = - new ValueNumberScope(localAvail[DTN->getIDom()->getBlock()]); - else - localAvail[BB] = new ValueNumberScope(0); - for (BasicBlock::iterator BI = BB->begin(), BE = BB->end(); BI != BE;) { changed_function |= processInstruction(BI, toErase); @@ -1607,6 +1619,15 @@ bool GVN::iterateOnFunction(Function &F) { cleanupGlobalSets(); + for (df_iterator DI = df_begin(DT->getRootNode()), + DE = df_end(DT->getRootNode()); DI != DE; ++DI) { + if (DI->getIDom()) + localAvail[DI->getBlock()] = + new ValueNumberScope(localAvail[DI->getIDom()->getBlock()]); + else + localAvail[DI->getBlock()] = new ValueNumberScope(0); + } + // Top-down walk of the dominator tree bool changed = false; #if 0 Added: llvm/trunk/test/Transforms/GVN/condprop.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/condprop.ll?rev=68262&view=auto ============================================================================== --- llvm/trunk/test/Transforms/GVN/condprop.ll (added) +++ llvm/trunk/test/Transforms/GVN/condprop.ll Wed Apr 1 18:53:49 2009 @@ -0,0 +1,52 @@ +; RUN: llvm-as < %s | opt -gvn | llvm-dis | grep {br i1 false} + + at a = external global i32 ; [#uses=7] + +define i32 @foo() nounwind { +entry: + %0 = load i32* @a, align 4 ; [#uses=1] + %1 = icmp eq i32 %0, 4 ; [#uses=1] + br i1 %1, label %bb, label %bb1 + +bb: ; preds = %entry + br label %bb8 + +bb1: ; preds = %entry + %2 = load i32* @a, align 4 ; [#uses=1] + %3 = icmp eq i32 %2, 5 ; [#uses=1] + br i1 %3, label %bb2, label %bb3 + +bb2: ; preds = %bb1 + br label %bb8 + +bb3: ; preds = %bb1 + %4 = load i32* @a, align 4 ; [#uses=1] + %5 = icmp eq i32 %4, 4 ; [#uses=1] + br i1 %5, label %bb4, label %bb5 + +bb4: ; preds = %bb3 + %6 = load i32* @a, align 4 ; [#uses=1] + %7 = add i32 %6, 5 ; [#uses=1] + br label %bb8 + +bb5: ; preds = %bb3 + %8 = load i32* @a, align 4 ; [#uses=1] + %9 = icmp eq i32 %8, 5 ; [#uses=1] + br i1 %9, label %bb6, label %bb7 + +bb6: ; preds = %bb5 + %10 = load i32* @a, align 4 ; [#uses=1] + %11 = add i32 %10, 4 ; [#uses=1] + br label %bb8 + +bb7: ; preds = %bb5 + %12 = load i32* @a, align 4 ; [#uses=1] + br label %bb8 + +bb8: ; preds = %bb7, %bb6, %bb4, %bb2, %bb + %.0 = phi i32 [ %12, %bb7 ], [ %11, %bb6 ], [ %7, %bb4 ], [ 4, %bb2 ], [ 5, %bb ] ; [#uses=1] + br label %return + +return: ; preds = %bb8 + ret i32 %.0 +} From gohman at apple.com Wed Apr 1 19:44:49 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 1 Apr 2009 17:44:49 -0700 Subject: [llvm-commits] [llvm] r66922 - in /llvm/trunk: lib/Target/X86/X86InstrInfo.td test/CodeGen/X86/tls13.ll test/CodeGen/X86/tls14.ll In-Reply-To: <38a0d8450903311517m60b40486wc1af6a391faa6b6f@mail.gmail.com> References: <200903131837.n2DIb7PC008719@zion.cs.uiuc.edu> <38a0d8450903311517m60b40486wc1af6a391faa6b6f@mail.gmail.com> Message-ID: <01131E67-E237-482B-BBBE-843A1F6DE0D0@apple.com> On Mar 31, 2009, at 3:17 PM, Rafael Espindola wrote: >> Instead of making it TLS specific, I'd just make that operand >> "specify >> the segment". Even though we do nothing with FS or ES or DS etc, it >> would be nice to be able to have a clean model where the instructions >> think about these machine level things, and isel lowering handles the >> translation of "TLS to GS" > > I am having some problem along this path. > > I have added a X86::SegmentAddress node and TLS addresses are lowered > into it. This > works perfectly for the case we do a load. Just another recursive call > in MatchAddress > and record the segment. > > The problem is when we just want to compute the address as in > > int __thread v; > int *f(void) > { > return &v; > } > > In this case, Select is called on the wrapper and it must be expanded > into two instructions. A "mov gs:0, %a_register" to get the thread > pointer > and a leal/add to get the address. Is Select really the best place > to do > such expansion? > > > An option that looks better so far is to keep the current > THREAD_POINTER > node. The idea is: > > 1) Lowering produces an add of and offset and the THREAD_POINTER > as it does now. > 2) The THREAD_POINTER is selected into a mov gs:0, a_register > 3) If we are computing and address, we are done > 4) If we are doing a load, the two instructions get folded post the > instruction selection. > > In summary, at the DAG level we will see a THREAD_POINTER and > not addresses with segments. At the machine instruction level we > will see addresses with segments. > > I am just not sure if the folding described in 4 will always be done. > > comments? I agree with your analysis. It looks like too much complexity to handle in Select. This is something X86ISelLowering should handle. I think Chris' interest is to have a single place where TLS is lowered to segment register usage, with the particular place being less important. This can be accomplished with the approach you describe only with THREAD_POINTER renamed to GET_GS, so that it's clear that Lowering has fully lowered the TLS addressing. Dan From kremenek at apple.com Wed Apr 1 19:52:48 2009 From: kremenek at apple.com (Ted Kremenek) Date: Thu, 02 Apr 2009 00:52:48 -0000 Subject: [llvm-commits] [llvm] r68265 - /llvm/tags/checker/checker-0.182/ Message-ID: <200904020052.n320qmqa007480@zion.cs.uiuc.edu> Author: kremenek Date: Wed Apr 1 19:52:47 2009 New Revision: 68265 URL: http://llvm.org/viewvc/llvm-project?rev=68265&view=rev Log: Tagging checker-0.182. Added: llvm/tags/checker/checker-0.182/ - copied from r68264, llvm/trunk/ From foldr at codedgers.com Wed Apr 1 20:11:38 2009 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Thu, 02 Apr 2009 01:11:38 -0000 Subject: [llvm-commits] [llvm] r68269 - /llvm/trunk/lib/Support/Triple.cpp Message-ID: <200904020111.n321BcR8008264@zion.cs.uiuc.edu> Author: foldr Date: Wed Apr 1 20:11:37 2009 New Revision: 68269 URL: http://llvm.org/viewvc/llvm-project?rev=68269&view=rev Log: Fix build on Linux. Modified: llvm/trunk/lib/Support/Triple.cpp Modified: llvm/trunk/lib/Support/Triple.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Triple.cpp?rev=68269&r1=68268&r2=68269&view=diff ============================================================================== --- llvm/trunk/lib/Support/Triple.cpp (original) +++ llvm/trunk/lib/Support/Triple.cpp Wed Apr 1 20:11:37 2009 @@ -9,6 +9,7 @@ #include "llvm/ADT/Triple.h" #include +#include using namespace llvm; // From jyasskin at google.com Wed Apr 1 21:01:22 2009 From: jyasskin at google.com (Jeffrey Yasskin) Date: Wed, 1 Apr 2009 19:01:22 -0700 Subject: [llvm-commits] Fix for overflow in SmallVector Message-ID: The code was doing "if (End+NumInputs > Capacity) ...". If End is close to 0xFFFFFFFF and NumInputs is large, it'll overflow, the condition will come out false, and the vector won't grow to accommodate the new elements, and the program will crash in memmove. To my amazement, this actually crashed our buildbot. I think I got all of the examples of this mistake, but I may have missed some if they weren't spelled "Capacity". make -C test isn't entirely happy with me in FrontendC, FrontendC++, and FrontendFortran, but that could be because I'm using a 2.5 build of llvm-gcc and not a trunk build. -------------- next part -------------- A non-text attachment was scrubbed... Name: small_vector_overflow.patch Type: application/octet-stream Size: 1133 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090401/51222924/attachment.obj From sabre at nondot.org Wed Apr 1 22:06:29 2009 From: sabre at nondot.org (Chris Lattner) Date: Thu, 02 Apr 2009 03:06:29 -0000 Subject: [llvm-commits] [llvm] r68277 - /llvm/trunk/include/llvm/ADT/SmallVector.h Message-ID: <200904020306.n3236TDb012424@zion.cs.uiuc.edu> Author: lattner Date: Wed Apr 1 22:06:26 2009 New Revision: 68277 URL: http://llvm.org/viewvc/llvm-project?rev=68277&view=rev Log: fix overflow checks in SmallVector: "The code was doing "if (End+NumInputs > Capacity) ...". If End is close to 0xFFFFFFFF and NumInputs is large, it'll overflow, the condition will come out false, and the vector won't grow to accommodate the new elements, and the program will crash in memmove." Patch by Jeffrey Yasskin! Modified: llvm/trunk/include/llvm/ADT/SmallVector.h Modified: llvm/trunk/include/llvm/ADT/SmallVector.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/SmallVector.h?rev=68277&r1=68276&r2=68277&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/SmallVector.h (original) +++ llvm/trunk/include/llvm/ADT/SmallVector.h Wed Apr 1 22:06:26 2009 @@ -210,7 +210,7 @@ void append(in_iter in_start, in_iter in_end) { size_type NumInputs = std::distance(in_start, in_end); // Grow allocated space if needed. - if (End+NumInputs > Capacity) + if (NumInputs > size_type(Capacity-End)) grow(size()+NumInputs); // Copy the new elements over. @@ -222,7 +222,7 @@ /// void append(size_type NumInputs, const T &Elt) { // Grow allocated space if needed. - if (End+NumInputs > Capacity) + if (NumInputs > size_type(Capacity-End)) grow(size()+NumInputs); // Copy the new elements over. @@ -456,9 +456,9 @@ std::swap(Capacity, RHS.Capacity); return; } - if (Begin+RHS.size() > Capacity) + if (RHS.size() > size_type(Capacity-Begin)) grow(RHS.size()); - if (RHS.begin()+size() > RHS.Capacity) + if (size() > size_type(RHS.Capacity-RHS.begin())) RHS.grow(size()); // Swap the shared elements. From clattner at apple.com Wed Apr 1 22:06:46 2009 From: clattner at apple.com (Chris Lattner) Date: Wed, 1 Apr 2009 20:06:46 -0700 Subject: [llvm-commits] Fix for overflow in SmallVector In-Reply-To: References: Message-ID: <71FAF897-9B2B-41FE-9318-600D4BC5C4F3@apple.com> On Apr 1, 2009, at 7:01 PM, Jeffrey Yasskin wrote: > The code was doing "if (End+NumInputs > Capacity) ...". If End is > close to 0xFFFFFFFF and NumInputs is large, it'll overflow, the > condition will come out false, and the vector won't grow to > accommodate the new elements, and the program will crash in memmove. Whoa, nice catch! Fixed here: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20090330/075970.html -Chris From clattner at apple.com Wed Apr 1 22:07:49 2009 From: clattner at apple.com (Chris Lattner) Date: Wed, 1 Apr 2009 20:07:49 -0700 Subject: [llvm-commits] [llvm] r66922 - in /llvm/trunk: lib/Target/X86/X86InstrInfo.td test/CodeGen/X86/tls13.ll test/CodeGen/X86/tls14.ll In-Reply-To: <01131E67-E237-482B-BBBE-843A1F6DE0D0@apple.com> References: <200903131837.n2DIb7PC008719@zion.cs.uiuc.edu> <38a0d8450903311517m60b40486wc1af6a391faa6b6f@mail.gmail.com> <01131E67-E237-482B-BBBE-843A1F6DE0D0@apple.com> Message-ID: On Apr 1, 2009, at 5:44 PM, Dan Gohman wrote: >> comments? > > I agree with your analysis. It looks like too much complexity to > handle > in Select. This is something X86ISelLowering should handle. > > I think Chris' interest is to have a single place where TLS is lowered > to segment register usage, with the particular place being less > important. Yep, that's exactly what I'm interested in seeing! Thanks guys, -Chris From clattner at apple.com Wed Apr 1 22:11:19 2009 From: clattner at apple.com (Chris Lattner) Date: Wed, 1 Apr 2009 20:11:19 -0700 Subject: [llvm-commits] [llvm] r66922 - in /llvm/trunk: lib/Target/X86/X86InstrInfo.td test/CodeGen/X86/tls13.ll test/CodeGen/X86/tls14.ll In-Reply-To: <38a0d8450903291322g22af1782j5d5331f89bd38ad6@mail.gmail.com> References: <200903131837.n2DIb7PC008719@zion.cs.uiuc.edu> <38a0d8450903281321n5853d007vf3d7447cab6eb2b8@mail.gmail.com> <76D5C23E-6C42-479A-A71B-0B7C96B0AACB@apple.com> <38a0d8450903291322g22af1782j5d5331f89bd38ad6@mail.gmail.com> Message-ID: On Mar 29, 2009, at 1:22 PM, Rafael Espindola wrote: >> I'd really like to get here, but I also really like having a flat >> list of >> operands. I haven't figured out a way to do this without making a >> machine >> operand that is a pointer to a separately allocated "memory operand >> thing". >> Having them be separately allocated like this is bad for a couple of >> reasons 1) memory use/allocation cost, 2) traversals of "all >> operands" is a >> tree walk, not a linear scan. 3) locality of the walk is much >> less, because >> it isn't linear walk anymore. >> >> I'd really like to fix this somehow though. Do you have any ideas? > > There are some low hanging fruits: > > *) Having fewer places is the code that do things like > ".addImm(foo).addReg(bar).add..." Stuff that does this should be fixed to use X86InstrBuilder.h, which provides abstractions for this. > *) Having auxiliary functions like getDisplacement and getSegment that > are given the > first operand number and just return .getOperand(Num + K) That makes sense. Alternatively, maybe a X86::getAddrInfo function that returns this as a struct. This would allow it to be used as: Seg = X86::getAddrInfo(MI).Seg; etc. > If we represent a X86 address with a struct that has just 4 (or 5) > pointers we > could probably still use a liner representation for the > instructions, but have > higher lever access functions that just return a pointer to the > middle of the > instruction? > > For example the instruction "movl %gs:0, %eax" would still have > 5 (or 6) operands, but could have a higher level method "getSomething" > that would return the register or the memory position. The register > is just > a regular operand. The memory position has 4 or 5 operands. Can a helper like getAddrInfo solve this problem without actually changing the MachineInstr representation? -Chris From kremenek at apple.com Wed Apr 1 22:44:58 2009 From: kremenek at apple.com (Ted Kremenek) Date: Thu, 02 Apr 2009 03:44:58 -0000 Subject: [llvm-commits] [llvm] r68284 - /llvm/tags/checker/checker-0.182/ Message-ID: <200904020344.n323iw6C013895@zion.cs.uiuc.edu> Author: kremenek Date: Wed Apr 1 22:44:57 2009 New Revision: 68284 URL: http://llvm.org/viewvc/llvm-project?rev=68284&view=rev Log: Removing checker-0.182. Removed: llvm/tags/checker/checker-0.182/ From kremenek at apple.com Wed Apr 1 22:50:39 2009 From: kremenek at apple.com (Ted Kremenek) Date: Thu, 02 Apr 2009 03:50:39 -0000 Subject: [llvm-commits] [llvm] r68286 - /llvm/tags/checker/checker-0.182/ Message-ID: <200904020350.n323oeWM014167@zion.cs.uiuc.edu> Author: kremenek Date: Wed Apr 1 22:50:39 2009 New Revision: 68286 URL: http://llvm.org/viewvc/llvm-project?rev=68286&view=rev Log: Tagging checker-0.182. Added: llvm/tags/checker/checker-0.182/ - copied from r68285, llvm/trunk/ From kremenek at apple.com Thu Apr 2 00:11:38 2009 From: kremenek at apple.com (Ted Kremenek) Date: Thu, 02 Apr 2009 05:11:38 -0000 Subject: [llvm-commits] [llvm] r68290 - /llvm/tags/checker/checker-0.182/ Message-ID: <200904020511.n325Bc0l016987@zion.cs.uiuc.edu> Author: kremenek Date: Thu Apr 2 00:11:38 2009 New Revision: 68290 URL: http://llvm.org/viewvc/llvm-project?rev=68290&view=rev Log: Removing checker-0.182. Removed: llvm/tags/checker/checker-0.182/ From kremenek at apple.com Thu Apr 2 00:14:39 2009 From: kremenek at apple.com (Ted Kremenek) Date: Thu, 02 Apr 2009 05:14:39 -0000 Subject: [llvm-commits] [llvm] r68293 - /llvm/tags/checker/checker-0.182/ Message-ID: <200904020514.n325Eds1017108@zion.cs.uiuc.edu> Author: kremenek Date: Thu Apr 2 00:14:39 2009 New Revision: 68293 URL: http://llvm.org/viewvc/llvm-project?rev=68293&view=rev Log: Tagging checker-0.182. Added: llvm/tags/checker/checker-0.182/ - copied from r68292, llvm/trunk/ From kremenek at apple.com Thu Apr 2 00:16:53 2009 From: kremenek at apple.com (Ted Kremenek) Date: Thu, 02 Apr 2009 05:16:53 -0000 Subject: [llvm-commits] [llvm] r68295 - /llvm/tags/checker/checker-0.182/ Message-ID: <200904020516.n325Gr2Z017210@zion.cs.uiuc.edu> Author: kremenek Date: Thu Apr 2 00:16:53 2009 New Revision: 68295 URL: http://llvm.org/viewvc/llvm-project?rev=68295&view=rev Log: Removing checker-0.182. Removed: llvm/tags/checker/checker-0.182/ From kremenek at apple.com Thu Apr 2 00:18:24 2009 From: kremenek at apple.com (Ted Kremenek) Date: Thu, 02 Apr 2009 05:18:24 -0000 Subject: [llvm-commits] [llvm] r68298 - /llvm/tags/checker/checker-0.182/ Message-ID: <200904020518.n325IOHC017310@zion.cs.uiuc.edu> Author: kremenek Date: Thu Apr 2 00:18:24 2009 New Revision: 68298 URL: http://llvm.org/viewvc/llvm-project?rev=68298&view=rev Log: Tagging checker-0.182. Added: llvm/tags/checker/checker-0.182/ - copied from r68297, llvm/trunk/ From clattner at apple.com Thu Apr 2 00:58:28 2009 From: clattner at apple.com (Chris Lattner) Date: Wed, 1 Apr 2009 22:58:28 -0700 Subject: [llvm-commits] [llvm] r67849 - /llvm/trunk/test/CodeGen/PowerPC/int-fp-conv-0.ll In-Reply-To: References: <200903271617.n2RGHboQ032209@zion.cs.uiuc.edu> <72C9DC5F-1723-4FEC-B8B5-B57E51201611@apple.com> <0D69456D-406F-47DC-B508-3571C9FC938B@apple.com> Message-ID: <0E4EE66F-E7AB-43B0-9F38-C94CDD1E2F50@apple.com> On Apr 1, 2009, at 1:33 PM, Misha Brukman wrote: > On Tue, Mar 31, 2009 at 9:04 PM, Chris Lattner > wrote: > On Mar 30, 2009, at 1:34 PM, Misha Brukman wrote: >> I'm proposing we test passes in C++ instead of a shell script that >> calls grep. > > What is the real value of doing this? The costs I see are 1) > increased link time and 2) more dependence on the API (more to > update when an API changes). > > I address your issue (1) in #3 below. I accept your point (2) as > valid, but based on personal experience, although it's a non-zero > effort, it's not as painful as you imagine, and coupled with the > benefits below, I think it's worthwhile. > Consider it a tradeoff (of CPU time for human time), rather than > simply an added cost. I don't agree with this at all. I spend a huge amount of time waiting for builds and make check to complete. Machine time is human time. > Let's look at the benefits: > > 1) Tests can be written at any level of the LLVM API, so you can > write tests to verify a single function, check that a class modifies > its state properly (even private state), verify a pass output, or > verify that llc or opt does everything end-to-end correctly. For > instance, let's say we have a transformation that's dependent on an > analysis, and say we have a test case where the transformation > should have no effect. While I agree that there is minor value here, I don't agree that this is a big win. Testing is a set of tradeoffs. We want to make it easy for people to write tests (because we want them to actually *do* it) and we want the tests to be as reasonably stable across future changes as possible to reduce maintenance. We also don't want testing to take an unacceptable amount of time, otherwise people won't run them regularly. We accept that testing will never catch all bugs, but that's ok, it is just one weapon in the arsenal of quality. > We could test with the opt/diff to make sure the output is the same > as input, but that's not really testing what we think we are, > because it's testing the interaction of the two, so a bug in one can > mask a bug in another. In other words, there are many code paths > that can "return false" along the way, and cause the transformation > not to be applied, but do you really know WHICH one is responsible? Who cares? Why is it so important to test that level of detail? LLVM as a whole has *very* strong APIs and interfaces, the most important of which is the IR itself. Anything that operates on the IR is going to be very stable, and all mid-level optzn passes should be easily observable based on what they do. > With a C++ test, you can test the analysis pass separately and test > its outputs on one test, and then in another test, inject a Mock (or > Fake) analysis object with known values, and see how the pass > behaves. This lets you test each piece of code independently, and > prevents complex interactions from messing with your tests. We can do this without a c++ test, just have clients like -aa-eval and other things that drive the analysis in certain ways. > 2) Although LLVM may have high line-coverage via large tests, we > don't know what code path coverage it has, which is also important. > If we can only test at the granularity of a pass, there are 2**N > code paths, and it's hard to contrive .ll inputs that will cause > function foo() to be called with inputs bar and quux (also makes > debugging more difficult than it should be, see #3 below). With a > single test, you can synthesize exactly what you want the inputs to > be, thus avoiding single-stepping through a debugger when you don't > need to. So instead of writing, say O(2**N) tests, you can write > O(N) tests (in number, not runtime!) to get much better path coverage. I don't see this to be as important as you do :) > 3) Currently, when something is broken, bugpoint is introduced to > narrow down the test case to something small, and then the developer > steps through the code with a debugger will (hopefully) to find > which part of which data structure isn't being updated properly. I > have personally been spending *MUCH* less time interacting with > debuggers thanks to testing -- instead of setting a break point and > manually verifying state at function entry/exit, I can set up the > test scenario, and call EXPECT() to verify what I think it should > be, and let it run! I'll quickly know if it's a problem or a red > herring. This works for any granularity of code, and is really > valuable. > > Without tests, each developer manually repeats the debugging via > "Oh, I think it's caused when X happens and Y interacts with Z!". > If you have a test for that that you commit to the repository, > anyone who thinks it's broken can just re-run the test and see that > no, that guess was wrong, try again. As you know Misha, LLVM has very strong interfaces. We have guarantees like "no pass should crash on a valid IR input". This is why things like bugpoint work. I personally have not suffered from the debugger issues that you are describing. Most of the bugs that I have spent a lot of time scratching my head over are not logic bugs in the pass, they are things like dangling pointer and other fun bugs. The most insidious one is the "dangling pointer as the key of a map" which manifest non-determinstically when malloc happens to recycle a node, making a new node "already be in the map". This is a great reason to improve the LLVM infrastructure (e.g. the new AssertingVH<> class) to help make these bugs impossible. This would not have been caught with any reasonable testing. > 4) There are other things we cannot test via opt/grep directly, or > even llvmirgrep: > (a) anything that doesn't have text-based output to grep through, e.g. > (i) analysis passes (alias analysis, etc.) These have text output with --aa-eval and friends. This is obviously true because we have many basicaa tests already. > (ii) PassManager (e.g., verify pass ordering in the presence of > FunctionPasses and ModulePasses, etc. that's independent of code > being run) -debug-pass=Arguments / Structure still work :) > (b) things that read or emit data are only tested indirectly: > bitcode reader/writer, We have plenty of tests for these. > TableGen, code emitters, etc. These get tested by whether or not the compiler works. > Bottom line -- I see at least 2 open bugs on Andersen's that would > benefit. Andersen's would benefit from contributors who care about it, not more tests :) > How about we expose its class in a header to be able to write > tests and see how it goes? And there is a bug for a pass that seems > to run out of memory that might also benefit. And next time there's > some difficult-to-debug problem that you see as similar to the > above, please file a bug and assign it to me, I'll see what I can do > for it with some targetted tests. How does that sound? No. Why does andersen's need any change to it to make it more testable? What part of its public interface is not testable? > >> How else can we check the correctness of a pass, which involves >> pattern-matching multiple instructions? Grep can only look at a >> single line at a time, and doesn't have the semantic knowledge of >> what's an instruction and what's an operand, whereas we have all >> this information in C++. > > I think the answer is that we need to build *one* small "llvmirgrep" > tool that does this, which could be used by many different tests. > > This is a tool that doesn't exist yet, which means it will require > time and effort to design and implement it, as well as (dare I say > it?) test it. Of course. This is an infrastructure investment to make future testing easier. Having llvm-irgrep would make it much easier to write tests (increasing the odds that they will actually be written) than having to write C++ code. In case you haven't noticed, C++ is a very low-level language, and not one that is awesome at pattern matching ;-) -Chris -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090401/8da4177c/attachment.html From isanbard at gmail.com Thu Apr 2 01:45:20 2009 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 02 Apr 2009 06:45:20 -0000 Subject: [llvm-commits] [llvm] r68303 - /llvm/branches/Apple/Dib/include/llvm/ADT/SmallVector.h Message-ID: <200904020645.n326jKiJ020624@zion.cs.uiuc.edu> Author: void Date: Thu Apr 2 01:45:19 2009 New Revision: 68303 URL: http://llvm.org/viewvc/llvm-project?rev=68303&view=rev Log: --- Merging (from foreign repository) r68277 into '.': U include/llvm/ADT/SmallVector.h fix overflow checks in SmallVector: "The code was doing "if (End+NumInputs > Capacity) ...". If End is close to 0xFFFFFFFF and NumInputs is large, it'll overflow, the condition will come out false, and the vector won't grow to accommodate the new elements, and the program will crash in memmove." Patch by Jeffrey Yasskin! Modified: llvm/branches/Apple/Dib/include/llvm/ADT/SmallVector.h Modified: llvm/branches/Apple/Dib/include/llvm/ADT/SmallVector.h URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/include/llvm/ADT/SmallVector.h?rev=68303&r1=68302&r2=68303&view=diff ============================================================================== --- llvm/branches/Apple/Dib/include/llvm/ADT/SmallVector.h (original) +++ llvm/branches/Apple/Dib/include/llvm/ADT/SmallVector.h Thu Apr 2 01:45:19 2009 @@ -210,7 +210,7 @@ void append(in_iter in_start, in_iter in_end) { size_type NumInputs = std::distance(in_start, in_end); // Grow allocated space if needed. - if (End+NumInputs > Capacity) + if (NumInputs > size_type(Capacity-End)) grow(size()+NumInputs); // Copy the new elements over. @@ -222,7 +222,7 @@ /// void append(size_type NumInputs, const T &Elt) { // Grow allocated space if needed. - if (End+NumInputs > Capacity) + if (NumInputs > size_type(Capacity-End)) grow(size()+NumInputs); // Copy the new elements over. @@ -454,9 +454,9 @@ std::swap(Capacity, RHS.Capacity); return; } - if (Begin+RHS.size() > Capacity) + if (RHS.size() > size_type(Capacity-Begin)) grow(RHS.size()); - if (RHS.begin()+size() > RHS.Capacity) + if (size() > size_type(RHS.Capacity-RHS.begin())) RHS.grow(size()); // Swap the shared elements. From isanbard at gmail.com Thu Apr 2 01:46:11 2009 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 02 Apr 2009 06:46:11 -0000 Subject: [llvm-commits] [llvm] r68304 - /llvm/branches/Apple/Dib/include/llvm/ADT/SmallVector.h Message-ID: <200904020646.n326kBi8020706@zion.cs.uiuc.edu> Author: void Date: Thu Apr 2 01:46:11 2009 New Revision: 68304 URL: http://llvm.org/viewvc/llvm-project?rev=68304&view=rev Log: --- Merging (from foreign repository) r67473 into '.': U include/llvm/ADT/SmallVector.h Fix PR3860 by correcting a predicate. Modified: llvm/branches/Apple/Dib/include/llvm/ADT/SmallVector.h Modified: llvm/branches/Apple/Dib/include/llvm/ADT/SmallVector.h URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/include/llvm/ADT/SmallVector.h?rev=68304&r1=68303&r2=68304&view=diff ============================================================================== --- llvm/branches/Apple/Dib/include/llvm/ADT/SmallVector.h (original) +++ llvm/branches/Apple/Dib/include/llvm/ADT/SmallVector.h Thu Apr 2 01:46:11 2009 @@ -293,10 +293,11 @@ // Uninvalidate the iterator. I = begin()+InsertElt; - // If we already have this many elements in the collection, append the - // dest elements at the end, then copy over the appropriate elements. Since - // we already reserved space, we know that this won't reallocate the vector. - if (size() >= NumToInsert) { + // If there are more elements between the insertion point and the end of the + // range than there are being inserted, we can use a simple approach to + // insertion. Since we already reserved space, we know that this won't + // reallocate the vector. + if (size_t(end()-I) >= NumToInsert) { T *OldEnd = End; append(End-NumToInsert, End); @@ -341,10 +342,11 @@ // Uninvalidate the iterator. I = begin()+InsertElt; - // If we already have this many elements in the collection, append the - // dest elements at the end, then copy over the appropriate elements. Since - // we already reserved space, we know that this won't reallocate the vector. - if (size() >= NumToInsert) { + // If there are more elements between the insertion point and the end of the + // range than there are being inserted, we can use a simple approach to + // insertion. Since we already reserved space, we know that this won't + // reallocate the vector. + if (size_t(end()-I) >= NumToInsert) { T *OldEnd = End; append(End-NumToInsert, End); From sanjiv.gupta at microchip.com Thu Apr 2 12:42:01 2009 From: sanjiv.gupta at microchip.com (Sanjiv Gupta) Date: Thu, 02 Apr 2009 17:42:01 -0000 Subject: [llvm-commits] [llvm] r68327 - in /llvm/trunk/lib/Target/PIC16: PIC16AsmPrinter.cpp PIC16AsmPrinter.h PIC16ISelLowering.cpp PIC16ISelLowering.h PIC16InstrInfo.td Message-ID: <200904021742.n32Hg1Ts026245@zion.cs.uiuc.edu> Author: sgupta Date: Thu Apr 2 12:42:00 2009 New Revision: 68327 URL: http://llvm.org/viewvc/llvm-project?rev=68327&view=rev Log: Params are not being generated as static globals now. The caller passes them onto the callee's stack directly and the callee loads the argvals from its own stack. Clang generated frameindexes validatd by recalculating the stack as if all frameindexes represent 1-byte slots. Modified: llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td Modified: llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp?rev=68327&r1=68326&r2=68327&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp Thu Apr 2 12:42:00 2009 @@ -335,6 +335,7 @@ void PIC16AsmPrinter::emitFunctionData(MachineFunction &MF) { const Function *F = MF.getFunction(); std::string FuncName = Mang->getValueName(F); + MachineFrameInfo *MFI= MF.getFrameInfo(); Module *M = const_cast(F->getParent()); const TargetData *TD = TM.getTargetData(); unsigned FrameSize = 0; @@ -346,15 +347,30 @@ SectionFlags::Writeable); SwitchToSection(fDataSection); - //Emit function return value. - O << CurrentFnName << ".retval:\n"; + + // Emit function frame label + O << CurrentFnName << ".frame:\n"; + const Type *RetType = F->getReturnType(); unsigned RetSize = 0; if (RetType->getTypeID() != Type::VoidTyID) RetSize = TD->getTypePaddedSize(RetType); - // Emit function arguments. - O << CurrentFnName << ".args:\n"; + //Emit function return value space + if(RetSize > 0) + O << CurrentFnName << ".retval RES " << RetSize << "\n"; + else + O << CurrentFnName << ".retval:\n"; + + // Emit variable to hold the space for function arguments + unsigned ArgSize = 0; + for (Function::const_arg_iterator argi = F->arg_begin(), + arge = F->arg_end(); argi != arge ; ++argi) { + const Type *Ty = argi->getType(); + ArgSize += TD->getTypePaddedSize(Ty); + } + O << CurrentFnName << ".args RES " << ArgSize << "\n"; + // Emit the function variables. // In PIC16 all the function arguments and local variables are global. @@ -382,34 +398,15 @@ O << VarName << " RES " << Size << "\n"; } - // Return value can not overlap with temp data, becasue a temp slot - // may be read/written after a return value is calculated and saved - // within the function. - if (RetSize > FrameSize) - O << CurrentFnName << ".dummy" << " RES " << (RetSize - FrameSize) << "\n"; - - emitFunctionTempData(MF, FrameSize); -} -void PIC16AsmPrinter::emitFunctionTempData(MachineFunction &MF, - unsigned &FrameSize) { - // Emit temporary variables. - MachineFrameInfo *FrameInfo = MF.getFrameInfo(); - if (FrameInfo->hasStackObjects()) { - int indexBegin = FrameInfo->getObjectIndexBegin(); - int indexEnd = FrameInfo->getObjectIndexEnd(); - - if (indexBegin < indexEnd) { - FrameSize += indexEnd - indexBegin; - O << CurrentFnName << ".tmp RES"<< " " - <hasStackObjects()) { + int indexBegin = MFI->getObjectIndexBegin(); + int indexEnd = MFI->getObjectIndexEnd(); + if (indexBegin < indexEnd) { + int TempSize = indexEnd - indexBegin; + O << CurrentFnName << ".tmp RES " << TempSize <<"\n"; } - */ } } Modified: llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h?rev=68327&r1=68326&r2=68327&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h (original) +++ llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h Thu Apr 2 12:42:00 2009 @@ -45,7 +45,6 @@ void EmitUnInitData (Module &M); void EmitRomData (Module &M); void emitFunctionData(MachineFunction &MF); - void emitFunctionTempData(MachineFunction &MF, unsigned &FrameSize); protected: bool doInitialization(Module &M); Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp?rev=68327&r1=68326&r2=68327&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Thu Apr 2 12:42:00 2009 @@ -244,6 +244,7 @@ case PIC16ISD::MTHI: return "PIC16ISD::MTHI"; case PIC16ISD::Banksel: return "PIC16ISD::Banksel"; case PIC16ISD::PIC16Load: return "PIC16ISD::PIC16Load"; + case PIC16ISD::PIC16LdArg: return "PIC16ISD::PIC16LdArg"; case PIC16ISD::PIC16LdWF: return "PIC16ISD::PIC16LdWF"; case PIC16ISD::PIC16Store: return "PIC16ISD::PIC16Store"; case PIC16ISD::PIC16StWF: return "PIC16ISD::PIC16StWF"; @@ -503,13 +504,24 @@ MachineFunction &MF = DAG.getMachineFunction(); const Function *Func = MF.getFunction(); + MachineFrameInfo *MFI = MF.getFrameInfo(); const std::string Name = Func->getName(); char *tmpName = new char [strlen(Name.c_str()) + 8]; - sprintf(tmpName, "%s.args", Name.c_str()); + sprintf(tmpName, "%s.frame", Name.c_str()); ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8); FrameIndexSDNode *FR = dyn_cast(Op); - Offset = FR->getIndex(); + + // FrameIndices are not stack offsets. But they represent the request + // for space on stack. That space requested may be more than one byte. + // Therefore, to calculate the stack offset that a FrameIndex aligns + // with, we need to traverse all the FrameIndices available earlier in + // the list and add their requested size. + unsigned FIndex = FR->getIndex(); + Offset = 0; + for (unsigned i=0; igetObjectSize(i); + } return; } @@ -810,7 +822,7 @@ const Function *Func = MF.getFunction(); const std::string FuncName = Func->getName(); - char *tmpName = new char [strlen(FuncName.c_str()) + 6]; + char *tmpName = new char [strlen(FuncName.c_str()) + 8]; // Put the value on stack. // Get a stack slot index and convert to es. @@ -938,11 +950,41 @@ } SDValue PIC16TargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG) { - //int NumOps = Op.getNode()->getNumOperands(); + SDValue Chain = Op.getOperand(0); + DebugLoc dl = Op.getDebugLoc(); + + if (Op.getNumOperands() == 1) // return void + return Op; + + // return should have odd number of operands + if ((Op.getNumOperands() % 2) == 0 ) { + assert(0 && "Do not know how to return this many arguments!"); + abort(); + } + + // Number of values to return + unsigned NumRet = (Op.getNumOperands() / 2); - // For default cases LLVM returns the value on the function frame - // So let LLVM do this for all the cases other than character - return Op; + // Function returns value always on stack with the offset starting + // from 0 + MachineFunction &MF = DAG.getMachineFunction(); + const Function *F = MF.getFunction(); + std::string FuncName = F->getName(); + + char *tmpName = new char [strlen(FuncName.c_str()) + 8]; + sprintf(tmpName, "%s.frame", FuncName.c_str()); + SDVTList VTs = DAG.getVTList (MVT::i8, MVT::Other); + SDValue ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8); + SDValue BS = DAG.getConstant(1, MVT::i8); + SDValue RetVal; + for(unsigned i=0;igetOperand(2*i + 1); + Chain = DAG.getNode (PIC16ISD::PIC16Store, dl, MVT::Other, Chain, RetVal, + ES, BS, + DAG.getConstant (i, MVT::i8)); + + } + return DAG.getNode(ISD::RET, dl, MVT::Other, Chain); } SDValue PIC16TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { @@ -1164,13 +1206,26 @@ SDValue PIC16TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) { SmallVector ArgValues; - unsigned NumArgs = Op.getNumOperands() - 3; + unsigned NumArgs = Op.getNode()->getNumValues()-1; DebugLoc dl = Op.getDebugLoc(); + SDValue Chain = Op.getOperand(0); // Formal arguments' chain + + MachineFunction &MF = DAG.getMachineFunction(); + //const TargetData *TD = getTargetData(); + const Function *F = MF.getFunction(); + std::string FuncName = F->getName(); - // Creating UNDEF nodes to meet the requirement of MERGE_VALUES node. - for(unsigned i = 0 ; igetValueType(i)); - ArgValues.push_back(TempNode); + char *tmpName = new char [strlen(FuncName.c_str()) + 6]; + sprintf(tmpName, "%s.args", FuncName.c_str()); + SDVTList VTs = DAG.getVTList (MVT::i8, MVT::Other); + SDValue ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8); + SDValue BS = DAG.getConstant(1, MVT::i8); + for (unsigned i=0; igetOpcode()) { - case PIC16ISD::PIC16Load: + case ISD::STORE: + return PerformStoreCombine(N, DCI); + case PIC16ISD::PIC16Load: return PerformPIC16LoadCombine(N, DCI); } return SDValue(); Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h?rev=68327&r1=68326&r2=68327&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h (original) +++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h Thu Apr 2 12:42:00 2009 @@ -29,6 +29,10 @@ Lo, // Low 8-bits of GlobalAddress. Hi, // High 8-bits of GlobalAddress. PIC16Load, + PIC16LdArg, // This is replica of PIC16Load but used to load function + // arguments and is being used for facilitating for some + // store removal optimizations. + PIC16LdWF, PIC16Store, PIC16StWF, @@ -103,17 +107,17 @@ SDValue ExpandStore(SDNode *N, SelectionDAG &DAG); SDValue ExpandLoad(SDNode *N, SelectionDAG &DAG); - //SDValue ExpandAdd(SDNode *N, SelectionDAG &DAG); SDValue ExpandGlobalAddress(SDNode *N, SelectionDAG &DAG); SDValue ExpandExternalSymbol(SDNode *N, SelectionDAG &DAG); SDValue ExpandFrameIndex(SDNode *N, SelectionDAG &DAG); SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; SDValue PerformPIC16LoadCombine(SDNode *N, DAGCombinerInfo &DCI) const; + SDValue PerformStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const; private: - // If the Node is a BUILD_PAIR representing representing an Address - // then this function will return true + // If the Node is a BUILD_PAIR representing a direct Address, + // then this function will return true. bool isDirectAddress(const SDValue &Op); // If the Node is a DirectAddress in ROM_SPACE then this @@ -149,14 +153,14 @@ // Extending the LIB Call framework of LLVM - // To hold the names of PIC16Libcalls + // to hold the names of PIC16Libcalls. const char *PIC16LibcallNames[PIC16ISD::PIC16UnknownCall]; - // To set and retrieve the lib call names + // To set and retrieve the lib call names. void setPIC16LibcallName(PIC16ISD::PIC16Libcall Call, const char *Name); const char *getPIC16LibcallName(PIC16ISD::PIC16Libcall Call); - // Make PIC16 Libcall + // Make PIC16 Libcall. SDValue MakePIC16Libcall(PIC16ISD::PIC16Libcall Call, MVT RetVT, const SDValue *Ops, unsigned NumOps, bool isSigned, SelectionDAG &DAG, DebugLoc dl); Modified: llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td?rev=68327&r1=68326&r2=68327&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td (original) +++ llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td Thu Apr 2 12:42:00 2009 @@ -88,8 +88,9 @@ [SDNPHasChain, SDNPInFlag, SDNPOutFlag]>; // Node to match a direct load operation. -def PIC16Load : SDNode<"PIC16ISD::PIC16Load", SDT_PIC16Load, [SDNPHasChain]>; -def PIC16LdWF : SDNode<"PIC16ISD::PIC16LdWF", SDT_PIC16Load, +def PIC16Load : SDNode<"PIC16ISD::PIC16Load", SDT_PIC16Load, [SDNPHasChain]>; +def PIC16LdArg : SDNode<"PIC16ISD::PIC16LdArg", SDT_PIC16Load, [SDNPHasChain]>; +def PIC16LdWF : SDNode<"PIC16ISD::PIC16LdWF", SDT_PIC16Load, [SDNPHasChain, SDNPInFlag, SDNPOutFlag]>; // Node to match PIC16 call @@ -267,6 +268,7 @@ // Load from an ES. def movf_1 : MOVF_INSN<0, texternalsym, PIC16Load>; +def movf_1_1 : MOVF_INSN<0, texternalsym, PIC16LdArg>; // Load with InFlag and OutFlag // This is same as movf_1 but has a flag. A flag is required to From sanjiv.gupta at microchip.com Thu Apr 2 13:03:10 2009 From: sanjiv.gupta at microchip.com (Sanjiv Gupta) Date: Thu, 02 Apr 2009 18:03:10 -0000 Subject: [llvm-commits] [llvm] r68329 - in /llvm/trunk/lib: CodeGen/SelectionDAG/LegalizeDAG.cpp Target/PIC16/PIC16AsmPrinter.cpp Target/PIC16/PIC16ISelLowering.cpp Target/PIC16/PIC16ISelLowering.h Target/PIC16/PIC16InstrInfo.td Message-ID: <200904021803.n32I3AGg026930@zion.cs.uiuc.edu> Author: sgupta Date: Thu Apr 2 13:03:10 2009 New Revision: 68329 URL: http://llvm.org/viewvc/llvm-project?rev=68329&view=rev Log: To convert the StopPoint insn into an assembler directive by ISel, we need to have access to the line number field. So we convert that info as an operand by custom handling DBG_STOPPOINT in legalize. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=68329&r1=68328&r2=68329&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Apr 2 13:03:10 2009 @@ -1314,6 +1314,10 @@ } break; } + case TargetLowering::Custom: + Result = TLI.LowerOperation(Op, DAG); + if (Result.getNode()) + break; case TargetLowering::Legal: { LegalizeAction Action = getTypeAction(Node->getOperand(1).getValueType()); if (Action == Legal && Tmp1 == Node->getOperand(0)) Modified: llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp?rev=68329&r1=68328&r2=68329&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp Thu Apr 2 13:03:10 2009 @@ -21,6 +21,8 @@ #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Support/Mangler.h" +#include "llvm/CodeGen/DwarfWriter.h" +#include "llvm/CodeGen/MachineModuleInfo.h" using namespace llvm; @@ -187,6 +189,12 @@ // The processor should be passed to llc as in input and the header file // should be generated accordingly. O << "\t#include P16F1937.INC\n"; + MachineModuleInfo *MMI = getAnalysisIfAvailable(); + assert(MMI); + DwarfWriter *DW = getAnalysisIfAvailable(); + assert(DW && "Dwarf Writer is not available"); + DW->BeginModule(&M, MMI, O, this, TAI); + EmitExternsAndGlobals (M); EmitInitData (M); EmitUnInitData(M); Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp?rev=68329&r1=68328&r2=68329&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Thu Apr 2 13:03:10 2009 @@ -137,6 +137,8 @@ //setOperationAction(ISD::TRUNCATE, MVT::i16, Custom); setTruncStoreAction(MVT::i16, MVT::i8, Custom); + setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Custom); + // Now deduce the information based on the above mentioned // actions computeRegisterProperties(); @@ -258,6 +260,7 @@ case PIC16ISD::SELECT_ICC: return "PIC16ISD::SELECT_ICC"; case PIC16ISD::BRCOND: return "PIC16ISD::BRCOND"; case PIC16ISD::Dummy: return "PIC16ISD::Dummy"; + case PIC16ISD::PIC16StopPoint: return "PIC16ISD::PIC16StopPoint"; } } @@ -808,10 +811,21 @@ return LowerBR_CC(Op, DAG); case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); + case ISD::DBG_STOPPOINT: + return LowerStopPoint(Op, DAG); } return SDValue(); } +SDValue PIC16TargetLowering::LowerStopPoint(SDValue Op, SelectionDAG &DAG) { + DbgStopPointSDNode *SP = dyn_cast(Op); + unsigned line = SP->getLine(); + SDValue LineNode = DAG.getConstant(line, MVT::i8); + DebugLoc dl = Op.getDebugLoc(); + return DAG.getNode(PIC16ISD::PIC16StopPoint, dl, MVT::Other, + Op.getOperand(0), LineNode); +} + SDValue PIC16TargetLowering::ConvertToMemOperand(SDValue Op, SelectionDAG &DAG, DebugLoc dl) { Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h?rev=68329&r1=68328&r2=68329&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h (original) +++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h Thu Apr 2 13:03:10 2009 @@ -48,6 +48,7 @@ SUBCC, // Compare for equality or inequality. SELECT_ICC, // Psuedo to be caught in schedular and expanded to brcond. BRCOND, // Conditional branch. + PIC16StopPoint, Dummy }; @@ -91,6 +92,7 @@ SDValue InFlag, SelectionDAG &DAG); SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG); SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG); + SDValue LowerStopPoint(SDValue Op, SelectionDAG &DAG); SDValue getPIC16Cmp(SDValue LHS, SDValue RHS, unsigned OrigCC, SDValue &CC, SelectionDAG &DAG, DebugLoc dl); virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI, Modified: llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td?rev=68329&r1=68328&r2=68329&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td (original) +++ llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td Thu Apr 2 13:03:10 2009 @@ -67,6 +67,9 @@ def PIC16callseq_end : SDNode<"ISD::CALLSEQ_END", SDTI8VoidOp, [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; +def PIC16StopPoint : SDNode<"PIC16ISD::PIC16StopPoint", SDTI8VoidOp, + [SDNPHasChain]>; + // Low 8-bits of GlobalAddress. def PIC16Lo : SDNode<"PIC16ISD::Lo", SDTI8UnaryOp>; @@ -160,6 +163,10 @@ // PIC16 Instructions. //===----------------------------------------------------------------------===// +def line_directive : ByteFormat<0, (outs), (ins i8imm:$src), + ".line $src", + [(PIC16StopPoint (i8 imm:$src))]>; + // Pseudo-instructions. def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i8imm:$amt), "!ADJCALLSTACKDOWN $amt", From sanjiv.gupta at microchip.com Thu Apr 2 13:33:13 2009 From: sanjiv.gupta at microchip.com (Sanjiv Gupta) Date: Thu, 02 Apr 2009 18:33:13 -0000 Subject: [llvm-commits] [llvm] r68333 - /llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Message-ID: <200904021833.n32IXDa4028446@zion.cs.uiuc.edu> Author: sgupta Date: Thu Apr 2 13:33:12 2009 New Revision: 68333 URL: http://llvm.org/viewvc/llvm-project?rev=68333&view=rev Log: Fixed build warnings. Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp?rev=68333&r1=68332&r2=68333&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Thu Apr 2 13:33:12 2009 @@ -1269,8 +1269,6 @@ // unwanted store operations SDValue PIC16TargetLowering:: PerformStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const { - SelectionDAG &DAG = DCI.DAG; - SDValue Chain; return SDValue(N, 0); /* // Storing an undef value is of no use, so remove it From jyasskin at google.com Thu Apr 2 13:37:52 2009 From: jyasskin at google.com (Jeffrey Yasskin) Date: Thu, 2 Apr 2009 13:37:52 -0500 Subject: [llvm-commits] TypeBuilder helper class Message-ID: When declaring global variables and functions that are defined in the Python C libraries, I've found the attached class helpful. TypeBuilder::get() will return an LLVM Type* corresponding to that function type, which is otherwise quite verbose to build up. Let me know what you think. Jeffrey -------------- next part -------------- A non-text attachment was scrubbed... Name: typebuilder.patch Type: application/octet-stream Size: 18082 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090402/c4c4142e/attachment.obj From espindola at google.com Thu Apr 2 15:46:51 2009 From: espindola at google.com (Rafael Espindola) Date: Thu, 2 Apr 2009 21:46:51 +0100 Subject: [llvm-commits] [llvm] r66922 - in /llvm/trunk: lib/Target/X86/X86InstrInfo.td test/CodeGen/X86/tls13.ll test/CodeGen/X86/tls14.ll In-Reply-To: <01131E67-E237-482B-BBBE-843A1F6DE0D0@apple.com> References: <200903131837.n2DIb7PC008719@zion.cs.uiuc.edu> <38a0d8450903311517m60b40486wc1af6a391faa6b6f@mail.gmail.com> <01131E67-E237-482B-BBBE-843A1F6DE0D0@apple.com> Message-ID: <38a0d8450904021346y48f1d13ds2c23c13fca2a886a@mail.gmail.com> > I agree with your analysis. It looks like too much complexity to handle > in Select. This is something X86ISelLowering should handle. > > I think Chris' interest is to have a single place where TLS is lowered > to segment register usage, with the particular place being less > important. This can be accomplished with the approach you describe > only with THREAD_POINTER renamed to GET_GS, so that it's clear that > Lowering has fully lowered the TLS addressing. The problem is that gs is not the same as THREAD_POINTER. The content in gs:0 is. The attached patch is correct, but has some generated code performance regressions. What it does is *) LowerToTLSExecModel lowers a thread local address to (add THREAD_POINTER, offset) (for local exec) *) THREAD_POINTER is selected to mov %gs:0, The problem is that this produces movl %gs:0, %eax movl i at NTPOFF(%eax), %eax Instead of movl %gs:i at NTPOFF, %eax} I can try to fold the instructions, but the optimization is only valid because the GNU TLS model requires that the value in gs:0 be its own address. The other option is to in LowerToTLSExecModel produce a SegmentAddress node. The problem now is when we just want to compute the address, not load from it. Since LEA doesn't use segments, we would have to select SegmentAddress(address, GS) into mov gs:0, eax leal address(%eax), %eax This again depends on the GNU TLS model. In both cases (using THREAD_POINTER or SegmentAddress) both lowering and selection have to be aware of the TLS model. If using SegmentAddress, another interesting case will be int __thread a; int __thread b; void f(int **c, int **d) { *c = &a; *d = &b; } In this case we will select mov %gs:0, eax leal address_a(%eax), %eax .... mov %gs:0, eax leal address_b(%eax), %eax Will we automatically remove the second "mov %gs:0, %eax" and use the value from the first one? So what strategy do you suggest? 1) Remove THREAD_POINTER and add a SegmentAddress 2) Keep THREAD_POINTER and try to figure out how to fold "mov gs:0, eax" into (for example) "movl i at NTPOFF(%eax), %eax"? > Dan Thanks, -- Rafael Avila de Espindola Google | Gordon House | Barrow Street | Dublin 4 | Ireland Registered in Dublin, Ireland | Registration Number: 368047 -------------- next part -------------- A non-text attachment was scrubbed... Name: llvm-wip.patch Type: text/x-diff Size: 36645 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090402/a4f8062b/attachment.bin From gohman at apple.com Thu Apr 2 16:48:08 2009 From: gohman at apple.com (Dan Gohman) Date: Thu, 2 Apr 2009 14:48:08 -0700 Subject: [llvm-commits] TypeBuilder helper class In-Reply-To: References: Message-ID: On Apr 2, 2009, at 11:37 AM, Jeffrey Yasskin wrote: > When declaring global variables and functions that are defined in the > Python C libraries, I've found the attached class helpful. > TypeBuilder::get() will return an LLVM Type* > corresponding to that function type, which is otherwise quite verbose > to build up. Let me know what you think. This looks neat, though it's problematic for cross-compiling, where the host's int and size_t may be different from those of the target. It's not a problem for everyone, but an LLVM in-tree type builder utility should support cross compilation. Dan From gohman at apple.com Thu Apr 2 17:00:37 2009 From: gohman at apple.com (Dan Gohman) Date: Thu, 2 Apr 2009 15:00:37 -0700 Subject: [llvm-commits] [llvm] r66922 - in /llvm/trunk: lib/Target/X86/X86InstrInfo.td test/CodeGen/X86/tls13.ll test/CodeGen/X86/tls14.ll In-Reply-To: <38a0d8450904021346y48f1d13ds2c23c13fca2a886a@mail.gmail.com> References: <200903131837.n2DIb7PC008719@zion.cs.uiuc.edu> <38a0d8450903311517m60b40486wc1af6a391faa6b6f@mail.gmail.com> <01131E67-E237-482B-BBBE-843A1F6DE0D0@apple.com> <38a0d8450904021346y48f1d13ds2c23c13fca2a886a@mail.gmail.com> Message-ID: <6FC4BA6E-0E41-47E4-B4E1-D984E9A08B41@apple.com> On Apr 2, 2009, at 1:46 PM, Rafael Espindola wrote: >> I agree with your analysis. It looks like too much complexity to >> handle >> in Select. This is something X86ISelLowering should handle. >> >> I think Chris' interest is to have a single place where TLS is >> lowered >> to segment register usage, with the particular place being less >> important. This can be accomplished with the approach you describe >> only with THREAD_POINTER renamed to GET_GS, so that it's clear that >> Lowering has fully lowered the TLS addressing. > > The problem is that gs is not the same as THREAD_POINTER. The content > in gs:0 is. > > The attached patch is correct, but has some generated code performance > regressions. What it does is > > *) LowerToTLSExecModel lowers a thread local address to (add > THREAD_POINTER, offset) (for local exec) > *) THREAD_POINTER is selected to mov %gs:0, > > The problem is that this produces > > movl %gs:0, %eax > movl i at NTPOFF(%eax), %eax > > Instead of > > movl %gs:i at NTPOFF, %eax} > > I can try to fold the instructions, but the optimization is > only valid because the GNU TLS model requires > that the value in gs:0 be its own address. > > The other option is to in LowerToTLSExecModel produce a > SegmentAddress node. The problem now is when we just > want to compute the address, not load from it. Since LEA > doesn't use segments, we would have to select > SegmentAddress(address, GS) into > > mov gs:0, eax > leal address(%eax), %eax > > This again depends on the GNU TLS model. In both cases > (using THREAD_POINTER or SegmentAddress) both > lowering and selection have to be aware of the TLS model. > > If using SegmentAddress, another interesting case will be > > int __thread a; > int __thread b; > void f(int **c, int **d) > { > *c = &a; > *d = &b; > } > > In this case we will select > > mov %gs:0, eax > leal address_a(%eax), %eax > .... > mov %gs:0, eax > leal address_b(%eax), %eax > > Will we automatically remove the second > "mov %gs:0, %eax" and use the value from the first one? > > So what strategy do you suggest? > > 1) Remove THREAD_POINTER and add a SegmentAddress > 2) Keep THREAD_POINTER and try to figure out how to fold > "mov gs:0, eax" into (for example) > "movl i at NTPOFF(%eax), %eax"? Ok, thanks for explaining this. How about this approach: On GNU and any other target that supports it, lower using a SegmentAddress node. On other targets, lower using a load from a SegmentAddress node. Make address-mode matching recognize SegmentAddress nodes (with appropriate special-cases for LEA). Then in the Select phase, define a special "def : Pat" that maps the SegmentAddress node to a load from the SegmentAddress node with a predicate to limit it to GNU and similar targets. Does this sound reasonable? Dan From sabre at nondot.org Thu Apr 2 18:53:04 2009 From: sabre at nondot.org (Chris Lattner) Date: Thu, 02 Apr 2009 23:53:04 -0000 Subject: [llvm-commits] [llvm] r68350 - /llvm/trunk/include/llvm/Support/ValueHandle.h Message-ID: <200904022353.n32Nr4W1008550@zion.cs.uiuc.edu> Author: lattner Date: Thu Apr 2 18:53:03 2009 New Revision: 68350 URL: http://llvm.org/viewvc/llvm-project?rev=68350&view=rev Log: add missing * Modified: llvm/trunk/include/llvm/Support/ValueHandle.h Modified: llvm/trunk/include/llvm/Support/ValueHandle.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ValueHandle.h?rev=68350&r1=68349&r2=68350&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/ValueHandle.h (original) +++ llvm/trunk/include/llvm/Support/ValueHandle.h Thu Apr 2 18:53:03 2009 @@ -141,7 +141,7 @@ /// operations. This means that RAUW's need to explicitly update the /// AssertingVH's as it moves. This is required because in non-assert mode this /// class turns into a trivial wrapper around a pointer. -template +template class AssertingVH #ifndef NDEBUG : public ValueHandleBase @@ -185,7 +185,7 @@ } ValueTy *operator->() const { return getValPtr(); } - ValueTy &operator*() const { return getValPtr(); } + ValueTy &operator*() const { return *getValPtr(); } // Duplicate these from the base class so that they work when assertions are // off. From sabre at nondot.org Thu Apr 2 19:02:39 2009 From: sabre at nondot.org (Chris Lattner) Date: Fri, 03 Apr 2009 00:02:39 -0000 Subject: [llvm-commits] [llvm] r68351 - /llvm/trunk/lib/Analysis/ConstantFolding.cpp Message-ID: <200904030002.n3302enJ008899@zion.cs.uiuc.edu> Author: lattner Date: Thu Apr 2 19:02:39 2009 New Revision: 68351 URL: http://llvm.org/viewvc/llvm-project?rev=68351&view=rev Log: use higher level APIs. Modified: llvm/trunk/lib/Analysis/ConstantFolding.cpp Modified: llvm/trunk/lib/Analysis/ConstantFolding.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ConstantFolding.cpp?rev=68351&r1=68350&r2=68351&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ConstantFolding.cpp (original) +++ llvm/trunk/lib/Analysis/ConstantFolding.cpp Thu Apr 2 19:02:39 2009 @@ -571,10 +571,9 @@ default: break; } - const ValueName *NameVal = F->getValueName(); - if (NameVal == 0) return false; - const char *Str = NameVal->getKeyData(); - unsigned Len = NameVal->getKeyLength(); + if (!F->hasName()) return false; + const char *Str = F->getNameStart(); + unsigned Len = F->getNameLen(); // In these cases, the check of the length is required. We don't want to // return true for a name like "cos\0blah" which strcmp would return equal to @@ -675,10 +674,9 @@ Constant * llvm::ConstantFoldCall(Function *F, Constant* const* Operands, unsigned NumOperands) { - const ValueName *NameVal = F->getValueName(); - if (NameVal == 0) return 0; - const char *Str = NameVal->getKeyData(); - unsigned Len = NameVal->getKeyLength(); + if (!F->hasName()) return 0; + const char *Str = F->getNameStart(); + unsigned Len = F->getNameLen(); const Type *Ty = F->getReturnType(); if (NumOperands == 1) { From sabre at nondot.org Thu Apr 2 19:10:31 2009 From: sabre at nondot.org (Chris Lattner) Date: Fri, 03 Apr 2009 00:10:31 -0000 Subject: [llvm-commits] [llvm] r68352 - /llvm/trunk/include/llvm/Value.h Message-ID: <200904030010.n330AVCR009188@zion.cs.uiuc.edu> Author: lattner Date: Thu Apr 2 19:10:31 2009 New Revision: 68352 URL: http://llvm.org/viewvc/llvm-project?rev=68352&view=rev Log: add patch to go along with r68350 Modified: llvm/trunk/include/llvm/Value.h Modified: llvm/trunk/include/llvm/Value.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Value.h?rev=68352&r1=68351&r2=68352&view=diff ============================================================================== --- llvm/trunk/include/llvm/Value.h (original) +++ llvm/trunk/include/llvm/Value.h Thu Apr 2 19:10:31 2009 @@ -34,7 +34,9 @@ class ValueSymbolTable; class TypeSymbolTable; template class StringMapEntry; -typedef StringMapEntry ValueName; +template +class AssertingVH; +typedef StringMapEntry > ValueName; class raw_ostream; class AssemblyAnnotationWriter; class ValueHandleBase; From sabre at nondot.org Thu Apr 2 19:10:56 2009 From: sabre at nondot.org (Chris Lattner) Date: Fri, 03 Apr 2009 00:10:56 -0000 Subject: [llvm-commits] [llvm] r68353 - /llvm/trunk/include/llvm/Value.h Message-ID: <200904030010.n330Auk7009211@zion.cs.uiuc.edu> Author: lattner Date: Thu Apr 2 19:10:56 2009 New Revision: 68353 URL: http://llvm.org/viewvc/llvm-project?rev=68353&view=rev Log: correct patch Modified: llvm/trunk/include/llvm/Value.h Modified: llvm/trunk/include/llvm/Value.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Value.h?rev=68353&r1=68352&r2=68353&view=diff ============================================================================== --- llvm/trunk/include/llvm/Value.h (original) +++ llvm/trunk/include/llvm/Value.h Thu Apr 2 19:10:56 2009 @@ -36,7 +36,7 @@ template class StringMapEntry; template class AssertingVH; -typedef StringMapEntry > ValueName; +typedef StringMapEntry ValueName; class raw_ostream; class AssemblyAnnotationWriter; class ValueHandleBase; From gohman at apple.com Thu Apr 2 19:25:26 2009 From: gohman at apple.com (Dan Gohman) Date: Fri, 03 Apr 2009 00:25:26 -0000 Subject: [llvm-commits] [llvm] r68355 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGNodes.h include/llvm/Target/TargetSelectionDAG.td lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp utils/TableGen/DAGISelEmitter.cpp Message-ID: <200904030025.n330PQUD009723@zion.cs.uiuc.edu> Author: djg Date: Thu Apr 2 19:25:26 2009 New Revision: 68355 URL: http://llvm.org/viewvc/llvm-project?rev=68355&view=rev Log: Delete ISD::INSERT_SUBREG and ISD::EXTRACT_SUBREG, which are unused. Note that these are distinct from TargetInstrInfo::INSERT_SUBREG and TargetInstrInfo::EXTRACT_SUBREG, which are used. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h llvm/trunk/include/llvm/Target/TargetSelectionDAG.td llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/utils/TableGen/DAGISelEmitter.cpp Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=68355&r1=68354&r2=68355&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Thu Apr 2 19:25:26 2009 @@ -327,18 +327,6 @@ /// elements 1 to N-1 of the N-element vector are undefined. SCALAR_TO_VECTOR, - // EXTRACT_SUBREG - This node is used to extract a sub-register value. - // This node takes a superreg and a constant sub-register index as operands. - // Note sub-register indices must be increasing. That is, if the - // sub-register index of a 8-bit sub-register is N, then the index for a - // 16-bit sub-register must be at least N+1. - EXTRACT_SUBREG, - - // INSERT_SUBREG - This node is used to insert a sub-register value. - // This node takes a superreg, a subreg value, and a constant sub-register - // index as operands. - INSERT_SUBREG, - // MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing // an unsigned/signed value of type i[2*N], then return the top part. MULHU, MULHS, Modified: llvm/trunk/include/llvm/Target/TargetSelectionDAG.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetSelectionDAG.td?rev=68355&r1=68354&r2=68355&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetSelectionDAG.td (original) +++ llvm/trunk/include/llvm/Target/TargetSelectionDAG.td Thu Apr 2 19:25:26 2009 @@ -406,11 +406,6 @@ def vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>; -def extract_subreg : SDNode<"ISD::EXTRACT_SUBREG", - SDTypeProfile<1, 2, []>>; -def insert_subreg : SDNode<"ISD::INSERT_SUBREG", - SDTypeProfile<1, 3, []>>; - // Nodes for intrinsics, you should use the intrinsic itself and let tblgen use // these internally. Don't reference these directly. def intrinsic_void : SDNode<"ISD::INTRINSIC_VOID", Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=68355&r1=68354&r2=68355&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Apr 2 19:25:26 2009 @@ -1589,23 +1589,6 @@ AddLegalizedOperand(SDValue(Node, i), Tmp1); } return Tmp2; - case ISD::EXTRACT_SUBREG: { - Tmp1 = LegalizeOp(Node->getOperand(0)); - ConstantSDNode *idx = dyn_cast(Node->getOperand(1)); - assert(idx && "Operand must be a constant"); - Tmp2 = DAG.getTargetConstant(idx->getAPIntValue(), idx->getValueType(0)); - Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2); - } - break; - case ISD::INSERT_SUBREG: { - Tmp1 = LegalizeOp(Node->getOperand(0)); - Tmp2 = LegalizeOp(Node->getOperand(1)); - ConstantSDNode *idx = dyn_cast(Node->getOperand(2)); - assert(idx && "Operand must be a constant"); - Tmp3 = DAG.getTargetConstant(idx->getAPIntValue(), idx->getValueType(0)); - Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3); - } - break; case ISD::BUILD_VECTOR: switch (TLI.getOperationAction(ISD::BUILD_VECTOR, Node->getValueType(0))) { default: assert(0 && "This action is not supported yet!"); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=68355&r1=68354&r2=68355&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Apr 2 19:25:26 2009 @@ -5165,9 +5165,6 @@ case ISD::SRA_PARTS: return "sra_parts"; case ISD::SRL_PARTS: return "srl_parts"; - case ISD::EXTRACT_SUBREG: return "extract_subreg"; - case ISD::INSERT_SUBREG: return "insert_subreg"; - // Conversion operators. case ISD::SIGN_EXTEND: return "sign_extend"; case ISD::ZERO_EXTEND: return "zero_extend"; Modified: llvm/trunk/utils/TableGen/DAGISelEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelEmitter.cpp?rev=68355&r1=68354&r2=68355&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/DAGISelEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/DAGISelEmitter.cpp Thu Apr 2 19:25:26 2009 @@ -1967,25 +1967,6 @@ << " MVT::Other, Tmp1, Tmp2, Chain);\n" << "}\n\n"; - OS << "SDNode *Select_EXTRACT_SUBREG(const SDValue &N) {\n" - << " SDValue N0 = N.getOperand(0);\n" - << " SDValue N1 = N.getOperand(1);\n" - << " unsigned C = cast(N1)->getZExtValue();\n" - << " SDValue Tmp = CurDAG->getTargetConstant(C, MVT::i32);\n" - << " return CurDAG->SelectNodeTo(N.getNode(), TargetInstrInfo::EXTRACT_SUBREG,\n" - << " N.getValueType(), N0, Tmp);\n" - << "}\n\n"; - - OS << "SDNode *Select_INSERT_SUBREG(const SDValue &N) {\n" - << " SDValue N0 = N.getOperand(0);\n" - << " SDValue N1 = N.getOperand(1);\n" - << " SDValue N2 = N.getOperand(2);\n" - << " unsigned C = cast(N2)->getZExtValue();\n" - << " SDValue Tmp = CurDAG->getTargetConstant(C, MVT::i32);\n" - << " return CurDAG->SelectNodeTo(N.getNode(), TargetInstrInfo::INSERT_SUBREG,\n" - << " N.getValueType(), N0, N1, Tmp);\n" - << "}\n\n"; - OS << "// The main instruction selector code.\n" << "SDNode *SelectCode(SDValue N) {\n" << " MVT::SimpleValueType NVT = N.getNode()->getValueType(0).getSimpleVT();\n" @@ -2020,8 +2001,6 @@ << " case ISD::DBG_LABEL: return Select_DBG_LABEL(N);\n" << " case ISD::EH_LABEL: return Select_EH_LABEL(N);\n" << " case ISD::DECLARE: return Select_DECLARE(N);\n" - << " case ISD::EXTRACT_SUBREG: return Select_EXTRACT_SUBREG(N);\n" - << " case ISD::INSERT_SUBREG: return Select_INSERT_SUBREG(N);\n" << " case ISD::UNDEF: return Select_UNDEF(N);\n"; // Loop over all of the case statements, emiting a call to each method we From sabre at nondot.org Thu Apr 2 19:26:02 2009 From: sabre at nondot.org (Chris Lattner) Date: Fri, 03 Apr 2009 00:26:02 -0000 Subject: [llvm-commits] [llvm] r68356 - in /llvm/trunk/include/llvm: Support/PointerLikeTypeTraits.h Support/ValueHandle.h Use.h Message-ID: <200904030026.n330Q2Qp009755@zion.cs.uiuc.edu> Author: lattner Date: Thu Apr 2 19:26:01 2009 New Revision: 68356 URL: http://llvm.org/viewvc/llvm-project?rev=68356&view=rev Log: Work around an apparent GCC miscompilation by specializing different, this fixes a regression on some compilers from r68147. Modified: llvm/trunk/include/llvm/Support/PointerLikeTypeTraits.h llvm/trunk/include/llvm/Support/ValueHandle.h llvm/trunk/include/llvm/Use.h Modified: llvm/trunk/include/llvm/Support/PointerLikeTypeTraits.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/PointerLikeTypeTraits.h?rev=68356&r1=68355&r2=68356&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/PointerLikeTypeTraits.h (original) +++ llvm/trunk/include/llvm/Support/PointerLikeTypeTraits.h Thu Apr 2 19:26:01 2009 @@ -58,20 +58,6 @@ enum { NumLowBitsAvailable = 3 }; }; -// Pointers to pointers are only 4-byte aligned on 32-bit systems. -template -class PointerLikeTypeTraits { -public: - static inline void *getAsVoidPointer(T** P) { return P; } - static inline T **getFromVoidPointer(void *P) { - return static_cast(P); - } - enum { NumLowBitsAvailable = 2 }; -}; - - - - // Provide PointerLikeTypeTraits for uintptr_t. template<> class PointerLikeTypeTraits { Modified: llvm/trunk/include/llvm/Support/ValueHandle.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ValueHandle.h?rev=68356&r1=68355&r2=68356&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/ValueHandle.h (original) +++ llvm/trunk/include/llvm/Support/ValueHandle.h Thu Apr 2 19:26:01 2009 @@ -18,6 +18,18 @@ #include "llvm/Value.h" namespace llvm { +class ValueHandleBase; + +// ValueHandleBase** is only 4-byte aligned. +template<> +class PointerLikeTypeTraits { +public: + static inline void *getAsVoidPointer(ValueHandleBase** P) { return P; } + static inline ValueHandleBase **getFromVoidPointer(void *P) { + return static_cast(P); + } + enum { NumLowBitsAvailable = 2 }; +}; /// ValueHandleBase - This is the common base class of value handles. /// ValueHandle's are smart pointers to Value's that have special behavior when Modified: llvm/trunk/include/llvm/Use.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Use.h?rev=68356&r1=68355&r2=68356&view=diff ============================================================================== --- llvm/trunk/include/llvm/Use.h (original) +++ llvm/trunk/include/llvm/Use.h Thu Apr 2 19:26:01 2009 @@ -29,6 +29,17 @@ /// Tag - generic tag type for (at least 32 bit) pointers enum Tag { noTag, tagOne, tagTwo, tagThree }; +// Use** is only 4-byte aligned. +template<> +class PointerLikeTypeTraits { +public: + static inline void *getAsVoidPointer(Use** P) { return P; } + static inline Use **getFromVoidPointer(void *P) { + return static_cast(P); + } + enum { NumLowBitsAvailable = 2 }; +}; + //===----------------------------------------------------------------------===// // Use Class //===----------------------------------------------------------------------===// From sabre at nondot.org Thu Apr 2 19:29:19 2009 From: sabre at nondot.org (Chris Lattner) Date: Fri, 03 Apr 2009 00:29:19 -0000 Subject: [llvm-commits] [llvm] r68362 - /llvm/trunk/docs/SourceLevelDebugging.html Message-ID: <200904030029.n330TJV0009921@zion.cs.uiuc.edu> Author: lattner Date: Thu Apr 2 19:29:19 2009 New Revision: 68362 URL: http://llvm.org/viewvc/llvm-project?rev=68362&view=rev Log: update some syntax Modified: llvm/trunk/docs/SourceLevelDebugging.html Modified: llvm/trunk/docs/SourceLevelDebugging.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/SourceLevelDebugging.html?rev=68362&r1=68361&r2=68362&view=diff ============================================================================== --- llvm/trunk/docs/SourceLevelDebugging.html (original) +++ llvm/trunk/docs/SourceLevelDebugging.html Thu Apr 2 19:29:19 2009 @@ -301,7 +301,7 @@

      The fields of debug descriptors used internally by LLVM (MachineModuleInfo) are restricted to only the simple data types int, uint, -bool, float, double, sbyte* and { }* +bool, float, double, i8* and { }* . References to arbitrary values are handled using a { }* and a cast to { }* expression; typically references to other field descriptors, arrays of descriptors or global variables.

      @@ -375,9 +375,9 @@ uint, ;; Tag = 17 + LLVMDebugVersion (DW_TAG_compile_unit) { }*, ;; Compile unit anchor = cast = (%llvm.dbg.anchor.type* %llvm.dbg.compile_units to { }*) uint, ;; Dwarf language identifier (ex. DW_LANG_C89) - sbyte*, ;; Source file name - sbyte*, ;; Source file directory (includes trailing slash) - sbyte* ;; Producer (ex. "4.0.1 LLVM (LLVM research group)") + i8*, ;; Source file name + i8*, ;; Source file directory (includes trailing slash) + i8* ;; Producer (ex. "4.0.1 LLVM (LLVM research group)") bool ;; True if this is a main compile unit. } @@ -415,9 +415,9 @@ uint, ;; Tag = 52 + LLVMDebugVersion (DW_TAG_variable) { }*, ;; Global variable anchor = cast (%llvm.dbg.anchor.type* %llvm.dbg.global_variables to { }*), { }*, ;; Reference to context descriptor - sbyte*, ;; Name - sbyte*, ;; Display name (fully qualified C++ name) - sbyte*, ;; MIPS linkage name (for C++) + i8*, ;; Name + i8*, ;; Display name (fully qualified C++ name) + i8*, ;; MIPS linkage name (for C++) { }*, ;; Reference to compile unit where defined uint, ;; Line number where defined { }*, ;; Reference to type descriptor @@ -444,9 +444,9 @@ uint, ;; Tag = 46 + LLVMDebugVersion (DW_TAG_subprogram) { }*, ;; Subprogram anchor = cast (%llvm.dbg.anchor.type* %llvm.dbg.subprograms to { }*), { }*, ;; Reference to context descriptor - sbyte*, ;; Name - sbyte*, ;; Display name (fully qualified C++ name) - sbyte*, ;; MIPS linkage name (for C++) + i8*, ;; Name + i8*, ;; Display name (fully qualified C++ name) + i8*, ;; MIPS linkage name (for C++) { }*, ;; Reference to compile unit where defined uint, ;; Line number where defined { }*, ;; Reference to type descriptor @@ -469,7 +469,7 @@ 
         %llvm.dbg.block = type {
-    uint,   ;; Tag = 13 + LLVMDebugVersion (DW_TAG_lexical_block)
+    i32,    ;; Tag = 13 + LLVMDebugVersion (DW_TAG_lexical_block)
     {  }*   ;; Reference to context descriptor
   }
      @@ -491,11 +491,11 @@ %llvm.dbg.basictype.type = type { uint, ;; Tag = 36 + LLVMDebugVersion (DW_TAG_base_type) { }*, ;; Reference to context (typically a compile unit) - sbyte*, ;; Name (may be "" for anonymous types) + i8*, ;; Name (may be "" for anonymous types) { }*, ;; Reference to compile unit where defined (may be NULL) uint, ;; Line number where defined (may be 0) - uint, ;; Size in bits - uint, ;; Alignment in bits + i64, ;; Size in bits + i64, ;; Alignment in bits uint, ;; Offset in bits uint ;; Dwarf type encoding } @@ -537,7 +537,7 @@ %llvm.dbg.derivedtype.type = type { uint, ;; Tag (see below) { }*, ;; Reference to context - sbyte*, ;; Name (may be "" for anonymous types) + i8*, ;; Name (may be "" for anonymous types) { }*, ;; Reference to compile unit where defined (may be NULL) uint, ;; Line number where defined (may be 0) uint, ;; Size in bits @@ -601,7 +601,7 @@ %llvm.dbg.compositetype.type = type { uint, ;; Tag (see below) { }*, ;; Reference to context - sbyte*, ;; Name (may be "" for anonymous types) + i8*, ;; Name (may be "" for anonymous types) { }*, ;; Reference to compile unit where defined (may be NULL) uint, ;; Line number where defined (may be 0) uint, ;; Size in bits @@ -701,7 +701,7 @@ 
         %llvm.dbg.enumerator.type = type {
     uint,   ;; Tag = 40 + LLVMDebugVersion (DW_TAG_enumerator)
-    sbyte*, ;; Name
+    i8*,    ;; Name
     uint    ;; Value
   }
      @@ -722,7 +722,7 @@ %llvm.dbg.variable.type = type { uint, ;; Tag (see below) { }*, ;; Context - sbyte*, ;; Name + i8*, ;; Name { }*, ;; Reference to compile unit where defined uint, ;; Line number where defined { }* ;; Type descriptor @@ -1082,7 +1082,7 @@ ;; for compile units. ;; %llvm.dbg.anchor.type = type { uint, uint } -%llvm.dbg.compile_unit.type = type { uint, { }*, uint, uint, sbyte*, sbyte*, sbyte* } +%llvm.dbg.compile_unit.type = type { uint, { }*, uint, uint, i8*, i8*, i8* } ... ;; ;; Define the anchor for compile units. Note that the second field of the @@ -1099,9 +1099,9 @@ { }* cast (%llvm.dbg.anchor.type* %llvm.dbg.compile_units to { }*), uint 1, uint 1, - sbyte* getelementptr ([13 x sbyte]* %str1, int 0, int 0), - sbyte* getelementptr ([21 x sbyte]* %str2, int 0, int 0), - sbyte* getelementptr ([33 x sbyte]* %str3, int 0, int 0) }, section "llvm.metadata" + i8* getelementptr ([13 x i8]* %str1, i32 0, i32 0), + i8* getelementptr ([21 x i8]* %str2, i32 0, i32 0), + i8* getelementptr ([33 x i8]* %str3, i32 0, i32 0) }, section "llvm.metadata" ;; ;; Define the compile unit for the header file "/Users/mine/sources/MyHeader.h". @@ -1111,17 +1111,17 @@ { }* cast (%llvm.dbg.anchor.type* %llvm.dbg.compile_units to { }*), uint 1, uint 1, - sbyte* getelementptr ([11 x sbyte]* %str4, int 0, int 0), - sbyte* getelementptr ([21 x sbyte]* %str2, int 0, int 0), - sbyte* getelementptr ([33 x sbyte]* %str3, int 0, int 0) }, section "llvm.metadata" + i8* getelementptr ([11 x i8]* %str4, int 0, int 0), + i8* getelementptr ([21 x i8]* %str2, int 0, int 0), + i8* getelementptr ([33 x i8]* %str3, int 0, int 0) }, section "llvm.metadata" ;; ;; Define each of the strings used in the compile units. ;; -%str1 = internal constant [13 x sbyte] c"MySource.cpp\00", section "llvm.metadata"; -%str2 = internal constant [21 x sbyte] c"/Users/mine/sources/\00", section "llvm.metadata"; -%str3 = internal constant [33 x sbyte] c"4.0.1 LLVM (LLVM research group)\00", section "llvm.metadata"; -%str4 = internal constant [11 x sbyte] c"MyHeader.h\00", section "llvm.metadata"; +%str1 = internal constant [13 x i8] c"MySource.cpp\00", section "llvm.metadata"; +%str2 = internal constant [21 x i8] c"/Users/mine/sources/\00", section "llvm.metadata"; +%str3 = internal constant [33 x i8] c"4.0.1 LLVM (LLVM research group)\00", section "llvm.metadata"; +%str4 = internal constant [11 x i8] c"MyHeader.h\00", section "llvm.metadata"; ... @@ -1149,8 +1149,8 @@ ;; compile unit. ;; %llvm.dbg.anchor.type = type { uint, uint } -%llvm.dbg.global_variable.type = type { uint, { }*, { }*, sbyte*, { }*, uint, { }*, bool, bool, { }*, uint } -%llvm.dbg.basictype.type = type { uint, { }*, sbyte*, { }*, int, uint, uint, uint, uint } +%llvm.dbg.global_variable.type = type { uint, { }*, { }*, i8*, { }*, uint, { }*, bool, bool, { }*, uint } +%llvm.dbg.basictype.type = type { uint, { }*, i8*, { }*, int, uint, uint, uint, uint } %llvm.dbg.compile_unit.type = ... ... ;; @@ -1173,8 +1173,8 @@ uint add(uint 52, uint 262144), { }* cast (%llvm.dbg.anchor.type* %llvm.dbg.global_variables to { }*), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([9 x sbyte]* %str1, int 0, int 0), - sbyte* getelementptr ([1 x sbyte]* %str2, int 0, int 0), + i8* getelementptr ([9 x i8]* %str1, int 0, int 0), + i8* getelementptr ([1 x i8]* %str2, int 0, int 0), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), uint 1, { }* cast (%llvm.dbg.basictype.type* %llvm.dbg.basictype to { }*), @@ -1189,7 +1189,7 @@ %llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { uint add(uint 36, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([4 x sbyte]* %str3, int 0, int 0), + i8* getelementptr ([4 x i8]* %str3, int 0, int 0), { }* null, int 0, uint 32, @@ -1200,9 +1200,9 @@ ;; ;; Define the names of the global variable and basic type. ;; -%str1 = internal constant [9 x sbyte] c"MyGlobal\00", section "llvm.metadata" -%str2 = internal constant [1 x sbyte] c"\00", section "llvm.metadata" -%str3 = internal constant [4 x sbyte] c"int\00", section "llvm.metadata" +%str1 = internal constant [9 x i8] c"MyGlobal\00", section "llvm.metadata" +%str2 = internal constant [1 x i8] c"\00", section "llvm.metadata" +%str3 = internal constant [4 x i8] c"int\00", section "llvm.metadata" @@ -1230,7 +1230,7 @@ ;; descriptor, one for the global's basic type and one for the subprogram's ;; compile unit. ;; -%llvm.dbg.subprogram.type = type { uint, { }*, { }*, sbyte*, { }*, bool, bool } +%llvm.dbg.subprogram.type = type { uint, { }*, { }*, i8*, { }*, bool, bool } %llvm.dbg.anchor.type = type { uint, uint } %llvm.dbg.compile_unit.type = ... @@ -1248,8 +1248,8 @@ uint add(uint 46, uint 262144), { }* cast (%llvm.dbg.anchor.type* %llvm.dbg.subprograms to { }*), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([5 x sbyte]* %str1, int 0, int 0), - sbyte* getelementptr ([1 x sbyte]* %str2, int 0, int 0), + i8* getelementptr ([5 x i8]* %str1, int 0, int 0), + i8* getelementptr ([1 x i8]* %str2, int 0, int 0), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), uint 1, { }* null, @@ -1259,13 +1259,13 @@ ;; ;; Define the name of the subprogram. ;; -%str1 = internal constant [5 x sbyte] c"main\00", section "llvm.metadata" -%str2 = internal constant [1 x sbyte] c"\00", section "llvm.metadata" +%str1 = internal constant [5 x i8] c"main\00", section "llvm.metadata" +%str2 = internal constant [1 x i8] c"\00", section "llvm.metadata" ;; ;; Define the subprogram itself. ;; -int %main(int %argc, sbyte** %argv) { +int %main(int %argc, i8** %argv) { ... } @@ -1294,14 +1294,14 @@ %llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { uint add(uint 36, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([5 x sbyte]* %str1, int 0, int 0), + i8* getelementptr ([5 x i8]* %str1, int 0, int 0), { }* null, int 0, uint 32, uint 32, uint 0, uint 2 }, section "llvm.metadata" -%str1 = internal constant [5 x sbyte] c"bool\00", section "llvm.metadata" +%str1 = internal constant [5 x i8] c"bool\00", section "llvm.metadata" @@ -1317,14 +1317,14 @@ %llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { uint add(uint 36, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([5 x sbyte]* %str1, int 0, int 0), + i8* getelementptr ([5 x i8]* %str1, int 0, int 0), { }* null, int 0, uint 8, uint 8, uint 0, uint 6 }, section "llvm.metadata" -%str1 = internal constant [5 x sbyte] c"char\00", section "llvm.metadata" +%str1 = internal constant [5 x i8] c"char\00", section "llvm.metadata" @@ -1340,14 +1340,14 @@ %llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { uint add(uint 36, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([14 x sbyte]* %str1, int 0, int 0), + i8* getelementptr ([14 x i8]* %str1, int 0, int 0), { }* null, int 0, uint 8, uint 8, uint 0, uint 8 }, section "llvm.metadata" -%str1 = internal constant [14 x sbyte] c"unsigned char\00", section "llvm.metadata" +%str1 = internal constant [14 x i8] c"unsigned char\00", section "llvm.metadata" @@ -1363,14 +1363,14 @@ %llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { uint add(uint 36, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([10 x sbyte]* %str1, int 0, int 0), + i8* getelementptr ([10 x i8]* %str1, int 0, int 0), { }* null, int 0, uint 16, uint 16, uint 0, uint 5 }, section "llvm.metadata" -%str1 = internal constant [10 x sbyte] c"short int\00", section "llvm.metadata" +%str1 = internal constant [10 x i8] c"short int\00", section "llvm.metadata" @@ -1386,14 +1386,14 @@ %llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { uint add(uint 36, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([19 x sbyte]* %str1, int 0, int 0), + i8* getelementptr ([19 x i8]* %str1, int 0, int 0), { }* null, int 0, uint 16, uint 16, uint 0, uint 7 }, section "llvm.metadata" -%str1 = internal constant [19 x sbyte] c"short unsigned int\00", section "llvm.metadata" +%str1 = internal constant [19 x i8] c"short unsigned int\00", section "llvm.metadata" @@ -1409,14 +1409,14 @@ %llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { uint add(uint 36, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([4 x sbyte]* %str1, int 0, int 0), + i8* getelementptr ([4 x i8]* %str1, int 0, int 0), { }* null, int 0, uint 32, uint 32, uint 0, uint 5 }, section "llvm.metadata" -%str1 = internal constant [4 x sbyte] c"int\00", section "llvm.metadata" +%str1 = internal constant [4 x i8] c"int\00", section "llvm.metadata" @@ -1432,14 +1432,14 @@ %llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { uint add(uint 36, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([13 x sbyte]* %str1, int 0, int 0), + i8* getelementptr ([13 x i8]* %str1, int 0, int 0), { }* null, int 0, uint 32, uint 32, uint 0, uint 7 }, section "llvm.metadata" -%str1 = internal constant [13 x sbyte] c"unsigned int\00", section "llvm.metadata" +%str1 = internal constant [13 x i8] c"unsigned int\00", section "llvm.metadata" @@ -1455,14 +1455,14 @@ %llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { uint add(uint 36, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([14 x sbyte]* %str1, int 0, int 0), + i8* getelementptr ([14 x i8]* %str1, int 0, int 0), { }* null, int 0, uint 64, uint 64, uint 0, uint 5 }, section "llvm.metadata" -%str1 = internal constant [14 x sbyte] c"long long int\00", section "llvm.metadata" +%str1 = internal constant [14 x i8] c"long long int\00", section "llvm.metadata" @@ -1478,14 +1478,14 @@ %llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { uint add(uint 36, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([23 x sbyte]* %str1, int 0, int 0), + i8* getelementptr ([23 x i8]* %str1, int 0, int 0), { }* null, int 0, uint 64, uint 64, uint 0, uint 7 }, section "llvm.metadata" -%str1 = internal constant [23 x sbyte] c"long long unsigned int\00", section "llvm.metadata" +%str1 = internal constant [23 x 8] c"long long unsigned int\00", section "llvm.metadata" @@ -1501,14 +1501,14 @@ %llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { uint add(uint 36, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([6 x sbyte]* %str1, int 0, int 0), + i8* getelementptr ([6 x i8]* %str1, int 0, int 0), { }* null, int 0, uint 32, uint 32, uint 0, uint 4 }, section "llvm.metadata" -%str1 = internal constant [6 x sbyte] c"float\00", section "llvm.metadata" +%str1 = internal constant [6 x i8] c"float\00", section "llvm.metadata" @@ -1524,14 +1524,14 @@ %llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { uint add(uint 36, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([7 x sbyte]* %str1, int 0, int 0), + 8* getelementptr ([7 x 8]* %str1, int 0, int 0), { }* null, int 0, uint 64, uint 64, uint 0, uint 4 }, section "llvm.metadata" -%str1 = internal constant [7 x sbyte] c"double\00", section "llvm.metadata" +%str1 = internal constant [7 x 8] c"double\00", section "llvm.metadata" @@ -1558,14 +1558,14 @@ %llvm.dbg.derivedtype1 = internal constant %llvm.dbg.derivedtype.type { uint add(uint 22, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([7 x sbyte]* %str1, int 0, int 0), + i8* getelementptr ([7 x 8]* %str1, int 0, int 0), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), int 1, uint 0, uint 0, uint 0, { }* cast (%llvm.dbg.derivedtype.type* %llvm.dbg.derivedtype2 to { }*) }, section "llvm.metadata" -%str1 = internal constant [7 x sbyte] c"IntPtr\00", section "llvm.metadata" +%str1 = internal constant [7 x 8] c"IntPtr\00", section "llvm.metadata" ;; ;; Define the pointer type. @@ -1573,7 +1573,7 @@ %llvm.dbg.derivedtype2 = internal constant %llvm.dbg.derivedtype.type { uint add(uint 15, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* null, + i8* null, { }* null, int 0, uint 32, @@ -1587,7 +1587,7 @@ %llvm.dbg.derivedtype3 = internal constant %llvm.dbg.derivedtype.type { uint add(uint 38, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* null, + i8* null, { }* null, int 0, uint 0, @@ -1601,14 +1601,14 @@ %llvm.dbg.basictype1 = internal constant %llvm.dbg.basictype.type { uint add(uint 36, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([4 x sbyte]* %str2, int 0, int 0), + 8* getelementptr ([4 x 8]* %str2, int 0, int 0), { }* null, int 0, uint 32, uint 32, uint 0, uint 5 }, section "llvm.metadata" -%str2 = internal constant [4 x sbyte] c"int\00", section "llvm.metadata" +%str2 = internal constant [4 x 8] c"int\00", section "llvm.metadata" @@ -1639,14 +1639,14 @@ %llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { uint add(uint 36, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([13 x sbyte]* %str1, int 0, int 0), + i8* getelementptr ([13 x i8]* %str1, int 0, int 0), { }* null, int 0, uint 32, uint 32, uint 0, uint 7 }, section "llvm.metadata" -%str1 = internal constant [13 x sbyte] c"unsigned int\00", section "llvm.metadata" +%str1 = internal constant [13 x i8] c"unsigned int\00", section "llvm.metadata" ;; ;; Define composite type for struct Color. @@ -1654,7 +1654,7 @@ %llvm.dbg.compositetype = internal constant %llvm.dbg.compositetype.type { uint add(uint 19, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([6 x sbyte]* %str2, int 0, int 0), + i8* getelementptr ([6 x i8]* %str2, int 0, int 0), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), int 1, uint 96, @@ -1662,7 +1662,7 @@ uint 0, { }* null, { }* cast ([3 x { }*]* %llvm.dbg.array to { }*) }, section "llvm.metadata" -%str2 = internal constant [6 x sbyte] c"Color\00", section "llvm.metadata" +%str2 = internal constant [6 x i8] c"Color\00", section "llvm.metadata" ;; ;; Define the Red field. @@ -1670,14 +1670,14 @@ %llvm.dbg.derivedtype1 = internal constant %llvm.dbg.derivedtype.type { uint add(uint 13, uint 262144), { }* null, - sbyte* getelementptr ([4 x sbyte]* %str3, int 0, int 0), + i8* getelementptr ([4 x i8]* %str3, int 0, int 0), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), int 2, uint 32, uint 32, uint 0, { }* cast (%llvm.dbg.basictype.type* %llvm.dbg.basictype to { }*) }, section "llvm.metadata" -%str3 = internal constant [4 x sbyte] c"Red\00", section "llvm.metadata" +%str3 = internal constant [4 x i8] c"Red\00", section "llvm.metadata" ;; ;; Define the Green field. @@ -1685,14 +1685,14 @@ %llvm.dbg.derivedtype2 = internal constant %llvm.dbg.derivedtype.type { uint add(uint 13, uint 262144), { }* null, - sbyte* getelementptr ([6 x sbyte]* %str4, int 0, int 0), + i8* getelementptr ([6 x i8]* %str4, int 0, int 0), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), int 3, uint 32, uint 32, uint 32, { }* cast (%llvm.dbg.basictype.type* %llvm.dbg.basictype to { }*) }, section "llvm.metadata" -%str4 = internal constant [6 x sbyte] c"Green\00", section "llvm.metadata" +%str4 = internal constant [6 x i8] c"Green\00", section "llvm.metadata" ;; ;; Define the Blue field. @@ -1700,14 +1700,14 @@ %llvm.dbg.derivedtype3 = internal constant %llvm.dbg.derivedtype.type { uint add(uint 13, uint 262144), { }* null, - sbyte* getelementptr ([5 x sbyte]* %str5, int 0, int 0), + i8* getelementptr ([5 x i8]* %str5, int 0, int 0), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), int 4, uint 32, uint 32, uint 64, { }* cast (%llvm.dbg.basictype.type* %llvm.dbg.basictype to { }*) }, section "llvm.metadata" -%str5 = internal constant [5 x sbyte] c"Blue\00", section "llvm.metadata" +%str5 = internal constant [5 x 8] c"Blue\00", section "llvm.metadata" ;; ;; Define the array of fields used by the composite type Color. @@ -1746,7 +1746,7 @@ %llvm.dbg.compositetype = internal constant %llvm.dbg.compositetype.type { uint add(uint 4, uint 262144), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), - sbyte* getelementptr ([6 x sbyte]* %str1, int 0, int 0), + i8* getelementptr ([6 x i8]* %str1, int 0, int 0), { }* cast (%llvm.dbg.compile_unit.type* %llvm.dbg.compile_unit to { }*), int 1, uint 32, @@ -1754,34 +1754,34 @@ uint 0, { }* null, { }* cast ([3 x { }*]* %llvm.dbg.array to { }*) }, section "llvm.metadata" -%str1 = internal constant [6 x sbyte] c"Trees\00", section "llvm.metadata" +%str1 = internal constant [6 x i8] c"Trees\00", section "llvm.metadata" ;; ;; Define Spruce enumerator. ;; %llvm.dbg.enumerator1 = internal constant %llvm.dbg.enumerator.type { uint add(uint 40, uint 262144), - sbyte* getelementptr ([7 x sbyte]* %str2, int 0, int 0), + i8* getelementptr ([7 x i8]* %str2, int 0, int 0), int 100 }, section "llvm.metadata" -%str2 = internal constant [7 x sbyte] c"Spruce\00", section "llvm.metadata" +%str2 = internal constant [7 x i8] c"Spruce\00", section "llvm.metadata" ;; ;; Define Oak enumerator. ;; %llvm.dbg.enumerator2 = internal constant %llvm.dbg.enumerator.type { uint add(uint 40, uint 262144), - sbyte* getelementptr ([4 x sbyte]* %str3, int 0, int 0), + i8* getelementptr ([4 x i8]* %str3, int 0, int 0), int 200 }, section "llvm.metadata" -%str3 = internal constant [4 x sbyte] c"Oak\00", section "llvm.metadata" +%str3 = internal constant [4 x i8] c"Oak\00", section "llvm.metadata" ;; ;; Define Maple enumerator. ;; %llvm.dbg.enumerator3 = internal constant %llvm.dbg.enumerator.type { uint add(uint 40, uint 262144), - sbyte* getelementptr ([6 x sbyte]* %str4, int 0, int 0), + i8* getelementptr ([6 x i8]* %str4, int 0, int 0), int 300 }, section "llvm.metadata" -%str4 = internal constant [6 x sbyte] c"Maple\00", section "llvm.metadata" +%str4 = internal constant [6 x i8] c"Maple\00", section "llvm.metadata" ;; ;; Define the array of enumerators used by composite type Trees. From clattner at apple.com Thu Apr 2 19:35:50 2009 From: clattner at apple.com (Chris Lattner) Date: Thu, 2 Apr 2009 17:35:50 -0700 Subject: [llvm-commits] TypeBuilder helper class In-Reply-To: References: Message-ID: <410577C5-37EB-4C00-83AA-67D094A877FA@apple.com> On Apr 2, 2009, at 2:48 PM, Dan Gohman wrote: > On Apr 2, 2009, at 11:37 AM, Jeffrey Yasskin wrote: >> When declaring global variables and functions that are defined in the >> Python C libraries, I've found the attached class helpful. >> TypeBuilder::get() will return an LLVM Type* >> corresponding to that function type, which is otherwise quite verbose >> to build up. Let me know what you think. > > This looks neat, though it's problematic for cross-compiling, where > the host's int and size_t may be different from those of the target. > It's not a problem for everyone, but an LLVM in-tree type builder > utility should support cross compilation. I agree, this looks very cool for JIT type applications, but in general, we do want to support cross builds. -Chris From wangmp at apple.com Thu Apr 2 21:43:31 2009 From: wangmp at apple.com (Mon P Wang) Date: Fri, 03 Apr 2009 02:43:31 -0000 Subject: [llvm-commits] [llvm] r68368 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/vec_i64.ll Message-ID: <200904030243.n332hVpg015272@zion.cs.uiuc.edu> Author: wangmp Date: Thu Apr 2 21:43:30 2009 New Revision: 68368 URL: http://llvm.org/viewvc/llvm-project?rev=68368&view=rev Log: Added a x86 dag combine to increase the chances to use a movq for v2i64 on x86-32. Added: llvm/trunk/test/CodeGen/X86/vec_i64.ll Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=68368&r1=68367&r2=68368&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Apr 2 21:43:30 2009 @@ -8061,15 +8061,43 @@ /// PerformShuffleCombine - Combine a vector_shuffle that is equal to /// build_vector load1, load2, load3, load4, <0, 1, 2, 3> into a 128-bit load /// if the load addresses are consecutive, non-overlapping, and in the right -/// order. +/// order. In the case of v2i64, it will see if it can rewrite the +/// shuffle to be an appropriate build vector so it can take advantage of +// performBuildVectorCombine. static SDValue PerformShuffleCombine(SDNode *N, SelectionDAG &DAG, const TargetLowering &TLI) { - MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); DebugLoc dl = N->getDebugLoc(); MVT VT = N->getValueType(0); MVT EVT = VT.getVectorElementType(); SDValue PermMask = N->getOperand(2); unsigned NumElems = PermMask.getNumOperands(); + + // For x86-32 machines, if we see an insert and then a shuffle in a v2i64 + // where the upper half is 0, it is advantageous to rewrite it as a build + // vector of (0, val) so it can use movq. + if (VT == MVT::v2i64) { + SDValue In[2]; + In[0] = N->getOperand(0); + In[1] = N->getOperand(1); + unsigned Idx0 =cast(PermMask.getOperand(0))->getZExtValue(); + unsigned Idx1 =cast(PermMask.getOperand(1))->getZExtValue(); + if (In[0].getValueType().getVectorNumElements() == NumElems && + In[Idx0/2].getOpcode() == ISD::INSERT_VECTOR_ELT && + In[Idx1/2].getOpcode() == ISD::BUILD_VECTOR) { + ConstantSDNode* InsertVecIdx = + dyn_cast(In[Idx0/2].getOperand(2)); + if (InsertVecIdx && + InsertVecIdx->getZExtValue() == (Idx0 % 2) && + isZeroNode(In[Idx1/2].getOperand(Idx1 % 2))) { + return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, + In[Idx0/2].getOperand(1), + In[Idx1/2].getOperand(Idx1 % 2)); + } + } + } + + // Try to combine a vector_shuffle into a 128-bit load. + MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); SDNode *Base = NULL; if (!EltsFromConsecutiveLoads(N, PermMask, NumElems, EVT, Base, DAG, MFI, TLI)) Added: llvm/trunk/test/CodeGen/X86/vec_i64.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_i64.ll?rev=68368&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_i64.ll (added) +++ llvm/trunk/test/CodeGen/X86/vec_i64.ll Thu Apr 2 21:43:30 2009 @@ -0,0 +1,22 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep movq %t | count 2 + +; Used movq to load i64 into a v2i64 when the top i64 is 0. + +define <2 x i64> @foo1(i64* %y) nounwind { +entry: + %tmp1 = load i64* %y, align 8 ; [#uses=1] + %s2v = insertelement <2 x i64> undef, i64 %tmp1, i32 0 + %loadl = shufflevector <2 x i64> zeroinitializer, <2 x i64> %s2v, <2 x i32> + ret <2 x i64> %loadl +} + + +define <4 x float> @foo2(i64* %p) nounwind { +entry: + %load = load i64* %p + %s2v = insertelement <2 x i64> undef, i64 %load, i32 0 + %loadl = shufflevector <2 x i64> zeroinitializer, <2 x i64> %s2v, <2 x i32> + %0 = bitcast <2 x i64> %loadl to <4 x float> + ret <4 x float> %0 +} From nicholas at mxc.ca Thu Apr 2 23:06:31 2009 From: nicholas at mxc.ca (Nick Lewycky) Date: Thu, 02 Apr 2009 21:06:31 -0700 Subject: [llvm-commits] TypeBuilder helper class In-Reply-To: References: Message-ID: <49D58B47.4030106@mxc.ca> Dan Gohman wrote: > On Apr 2, 2009, at 11:37 AM, Jeffrey Yasskin wrote: > >> When declaring global variables and functions that are defined in the >> Python C libraries, I've found the attached class helpful. >> TypeBuilder::get() will return an LLVM Type* >> corresponding to that function type, which is otherwise quite verbose >> to build up. Let me know what you think. > > This looks neat, though it's problematic for cross-compiling, where > the host's int and size_t may be different from those of the target. > It's not a problem for everyone, but an LLVM in-tree type builder > utility should support cross compilation. What makes this different from the IRBuilder is that it's reflective. We could have reflection based and non-reflection based IRBuilder and TypeBuilders independently. What you're asking for is a non-reflection based TypeBuilder, which would be useful for the reasons you mention, but would have a different API and is out of scope for this change. Agreed? Nick From isanbard at gmail.com Fri Apr 3 02:43:50 2009 From: isanbard at gmail.com (Bill Wendling) Date: Fri, 03 Apr 2009 07:43:50 -0000 Subject: [llvm-commits] [llvm] r68374 - in /llvm/branches/Apple/Dib: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/vec_i64.ll Message-ID: <200904030743.n337hox5026945@zion.cs.uiuc.edu> Author: void Date: Fri Apr 3 02:43:50 2009 New Revision: 68374 URL: http://llvm.org/viewvc/llvm-project?rev=68374&view=rev Log: --- Merging (from foreign repository) r68368 into '.': A test/CodeGen/X86/vec_i64.ll U lib/Target/X86/X86ISelLowering.cpp Added a x86 dag combine to increase the chances to use a movq for v2i64 on x86-32. Added: llvm/branches/Apple/Dib/test/CodeGen/X86/vec_i64.ll Modified: llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp?rev=68374&r1=68373&r2=68374&view=diff ============================================================================== --- llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp Fri Apr 3 02:43:50 2009 @@ -8056,15 +8056,43 @@ /// PerformShuffleCombine - Combine a vector_shuffle that is equal to /// build_vector load1, load2, load3, load4, <0, 1, 2, 3> into a 128-bit load /// if the load addresses are consecutive, non-overlapping, and in the right -/// order. +/// order. In the case of v2i64, it will see if it can rewrite the +/// shuffle to be an appropriate build vector so it can take advantage of +// performBuildVectorCombine. static SDValue PerformShuffleCombine(SDNode *N, SelectionDAG &DAG, const TargetLowering &TLI) { - MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); DebugLoc dl = N->getDebugLoc(); MVT VT = N->getValueType(0); MVT EVT = VT.getVectorElementType(); SDValue PermMask = N->getOperand(2); unsigned NumElems = PermMask.getNumOperands(); + + // For x86-32 machines, if we see an insert and then a shuffle in a v2i64 + // where the upper half is 0, it is advantageous to rewrite it as a build + // vector of (0, val) so it can use movq. + if (VT == MVT::v2i64) { + SDValue In[2]; + In[0] = N->getOperand(0); + In[1] = N->getOperand(1); + unsigned Idx0 =cast(PermMask.getOperand(0))->getZExtValue(); + unsigned Idx1 =cast(PermMask.getOperand(1))->getZExtValue(); + if (In[0].getValueType().getVectorNumElements() == NumElems && + In[Idx0/2].getOpcode() == ISD::INSERT_VECTOR_ELT && + In[Idx1/2].getOpcode() == ISD::BUILD_VECTOR) { + ConstantSDNode* InsertVecIdx = + dyn_cast(In[Idx0/2].getOperand(2)); + if (InsertVecIdx && + InsertVecIdx->getZExtValue() == (Idx0 % 2) && + isZeroNode(In[Idx1/2].getOperand(Idx1 % 2))) { + return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, + In[Idx0/2].getOperand(1), + In[Idx1/2].getOperand(Idx1 % 2)); + } + } + } + + // Try to combine a vector_shuffle into a 128-bit load. + MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); SDNode *Base = NULL; if (!EltsFromConsecutiveLoads(N, PermMask, NumElems, EVT, Base, DAG, MFI, TLI)) Added: llvm/branches/Apple/Dib/test/CodeGen/X86/vec_i64.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/test/CodeGen/X86/vec_i64.ll?rev=68374&view=auto ============================================================================== --- llvm/branches/Apple/Dib/test/CodeGen/X86/vec_i64.ll (added) +++ llvm/branches/Apple/Dib/test/CodeGen/X86/vec_i64.ll Fri Apr 3 02:43:50 2009 @@ -0,0 +1,22 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: grep movq %t | count 2 + +; Used movq to load i64 into a v2i64 when the top i64 is 0. + +define <2 x i64> @foo1(i64* %y) nounwind { +entry: + %tmp1 = load i64* %y, align 8 ; [#uses=1] + %s2v = insertelement <2 x i64> undef, i64 %tmp1, i32 0 + %loadl = shufflevector <2 x i64> zeroinitializer, <2 x i64> %s2v, <2 x i32> + ret <2 x i64> %loadl +} + + +define <4 x float> @foo2(i64* %p) nounwind { +entry: + %load = load i64* %p + %s2v = insertelement <2 x i64> undef, i64 %load, i32 0 + %loadl = shufflevector <2 x i64> zeroinitializer, <2 x i64> %s2v, <2 x i32> + %0 = bitcast <2 x i64> %loadl to <4 x float> + ret <4 x float> %0 +} From asl at math.spbu.ru Fri Apr 3 05:39:05 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Fri, 03 Apr 2009 10:39:05 -0000 Subject: [llvm-commits] [llvm] r68380 - in /llvm/trunk/lib/Target/IA64: AsmPrinter/ AsmPrinter/CMakeLists.txt AsmPrinter/IA64AsmPrinter.cpp AsmPrinter/Makefile IA64AsmPrinter.cpp Makefile Message-ID: <200904031039.n33Ad85a015074@zion.cs.uiuc.edu> Author: asl Date: Fri Apr 3 05:38:51 2009 New Revision: 68380 URL: http://llvm.org/viewvc/llvm-project?rev=68380&view=rev Log: Move IA64 asmprinter to separate library Added: llvm/trunk/lib/Target/IA64/AsmPrinter/ llvm/trunk/lib/Target/IA64/AsmPrinter/CMakeLists.txt llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp - copied, changed from r68037, llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp llvm/trunk/lib/Target/IA64/AsmPrinter/Makefile Removed: llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp Modified: llvm/trunk/lib/Target/IA64/Makefile Added: llvm/trunk/lib/Target/IA64/AsmPrinter/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/AsmPrinter/CMakeLists.txt?rev=68380&view=auto ============================================================================== --- llvm/trunk/lib/Target/IA64/AsmPrinter/CMakeLists.txt (added) +++ llvm/trunk/lib/Target/IA64/AsmPrinter/CMakeLists.txt Fri Apr 3 05:38:51 2009 @@ -0,0 +1,12 @@ +include_directories( + ${CMAKE_CURRENT_BINARY_DIR}/.. + ${CMAKE_CURRENT_SOURCE_DIR}/.. + ) + +add_partially_linked_object(LLVMIA64AsmPrinter + IA64AsmPrinter.cpp + ) + +target_name_of_partially_linked_object(LLVMIA64CodeGen n) + +add_dependencies(LLVMIA64AsmPrinter ${n}) Copied: llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp (from r68037, llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp) URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp?p2=llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp&p1=llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp&r1=68037&r2=68380&rev=68380&view=diff ============================================================================== (empty) Added: llvm/trunk/lib/Target/IA64/AsmPrinter/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/AsmPrinter/Makefile?rev=68380&view=auto ============================================================================== --- llvm/trunk/lib/Target/IA64/AsmPrinter/Makefile (added) +++ llvm/trunk/lib/Target/IA64/AsmPrinter/Makefile Fri Apr 3 05:38:51 2009 @@ -0,0 +1,17 @@ +##===- lib/Target/CellSPU/Makefile -------------------------*- Makefile -*-===## +# +# The LLVM Compiler Infrastructure +# +# This file is distributed under the University of Illinois Open Source +# License. See LICENSE.TXT for details. +# +##===----------------------------------------------------------------------===## + +LEVEL = ../../../.. +LIBRARYNAME = LLVMIA64AsmPrinter + +# Hack: we need to include 'main' IA64 target directory to grab +# private headers +CPPFLAGS = -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/.. + +include $(LEVEL)/Makefile.common Removed: llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp?rev=68379&view=auto ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/IA64/IA64AsmPrinter.cpp (removed) @@ -1,375 +0,0 @@ -//===-- IA64AsmPrinter.cpp - Print out IA64 LLVM as assembly --------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file contains a printer that converts from our internal representation -// of machine-dependent LLVM code to assembly accepted by the GNU binutils 'gas' -// assembler. The Intel 'ias' and HP-UX 'as' assemblers *may* choke on this -// output, but if so that's a bug I'd like to hear about: please file a bug -// report in bugzilla. FYI, the not too bad 'ias' assembler is bundled with -// the Intel C/C++ compiler for Itanium Linux. -// -//===----------------------------------------------------------------------===// - -#define DEBUG_TYPE "asm-printer" -#include "IA64.h" -#include "IA64TargetMachine.h" -#include "llvm/Module.h" -#include "llvm/Type.h" -#include "llvm/CodeGen/AsmPrinter.h" -#include "llvm/CodeGen/DwarfWriter.h" -#include "llvm/CodeGen/MachineFunctionPass.h" -#include "llvm/Target/TargetAsmInfo.h" -#include "llvm/Target/TargetMachine.h" -#include "llvm/Support/Mangler.h" -#include "llvm/Support/raw_ostream.h" -#include "llvm/ADT/Statistic.h" -using namespace llvm; - -STATISTIC(EmittedInsts, "Number of machine instrs printed"); - -namespace { - class IA64AsmPrinter : public AsmPrinter { - std::set ExternalFunctionNames, ExternalObjectNames; - public: - IA64AsmPrinter(raw_ostream &O, TargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) - : AsmPrinter(O, TM, T, F, V) {} - - virtual const char *getPassName() const { - return "IA64 Assembly Printer"; - } - - /// printInstruction - This method is automatically generated by tablegen - /// from the instruction set description. This method returns true if the - /// machine instruction was sufficiently described to print it, otherwise it - /// returns false. - bool printInstruction(const MachineInstr *MI); - - // This method is used by the tablegen'erated instruction printer. - void printOperand(const MachineInstr *MI, unsigned OpNo){ - const MachineOperand &MO = MI->getOperand(OpNo); - if (MO.getType() == MachineOperand::MO_Register) { - assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) && - "Not physref??"); - //XXX Bug Workaround: See note in Printer::doInitialization about %. - O << TM.getRegisterInfo()->get(MO.getReg()).AsmName; - } else { - printOp(MO); - } - } - - void printS8ImmOperand(const MachineInstr *MI, unsigned OpNo) { - int val=(unsigned int)MI->getOperand(OpNo).getImm(); - if(val>=128) val=val-256; // if negative, flip sign - O << val; - } - void printS14ImmOperand(const MachineInstr *MI, unsigned OpNo) { - int val=(unsigned int)MI->getOperand(OpNo).getImm(); - if(val>=8192) val=val-16384; // if negative, flip sign - O << val; - } - void printS22ImmOperand(const MachineInstr *MI, unsigned OpNo) { - int val=(unsigned int)MI->getOperand(OpNo).getImm(); - if(val>=2097152) val=val-4194304; // if negative, flip sign - O << val; - } - void printU64ImmOperand(const MachineInstr *MI, unsigned OpNo) { - O << (uint64_t)MI->getOperand(OpNo).getImm(); - } - void printS64ImmOperand(const MachineInstr *MI, unsigned OpNo) { -// XXX : nasty hack to avoid GPREL22 "relocation truncated to fit" linker -// errors - instead of add rX = @gprel(CPI), r1;; we now -// emit movl rX = @gprel(CPIgetOperand(OpNo).isImm()) { - O << (int64_t)MI->getOperand(OpNo).getImm(); - } else { // this is a constant pool reference: FIXME: assert this - printOp(MI->getOperand(OpNo)); - } - } - - void printGlobalOperand(const MachineInstr *MI, unsigned OpNo) { - printOp(MI->getOperand(OpNo), false); // this is NOT a br.call instruction - } - - void printCallOperand(const MachineInstr *MI, unsigned OpNo) { - printOp(MI->getOperand(OpNo), true); // this is a br.call instruction - } - - void printMachineInstruction(const MachineInstr *MI); - void printOp(const MachineOperand &MO, bool isBRCALLinsn= false); - void printModuleLevelGV(const GlobalVariable* GVar); - bool runOnMachineFunction(MachineFunction &F); - bool doInitialization(Module &M); - bool doFinalization(Module &M); - }; -} // end of anonymous namespace - - -// Include the auto-generated portion of the assembly writer. -#include "IA64GenAsmWriter.inc" - -/// runOnMachineFunction - This uses the printMachineInstruction() -/// method to print assembly for each instruction. -/// -bool IA64AsmPrinter::runOnMachineFunction(MachineFunction &MF) { - this->MF = &MF; - - SetupMachineFunction(MF); - O << "\n\n"; - - // Print out constants referenced by the function - EmitConstantPool(MF.getConstantPool()); - - const Function *F = MF.getFunction(); - SwitchToSection(TAI->SectionForGlobal(F)); - - // Print out labels for the function. - EmitAlignment(5); - O << "\t.global\t" << CurrentFnName << '\n'; - - printVisibility(CurrentFnName, F->getVisibility()); - - O << "\t.type\t" << CurrentFnName << ", @function\n"; - O << CurrentFnName << ":\n"; - - // Print out code for the function. - for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); - I != E; ++I) { - // Print a label for the basic block if there are any predecessors. - if (!I->pred_empty()) { - printBasicBlockLabel(I, true, true); - O << '\n'; - } - for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); - II != E; ++II) { - // Print the assembly for the instruction. - printMachineInstruction(II); - } - } - - // We didn't modify anything. - return false; -} - -void IA64AsmPrinter::printOp(const MachineOperand &MO, - bool isBRCALLinsn /* = false */) { - const TargetRegisterInfo &RI = *TM.getRegisterInfo(); - switch (MO.getType()) { - case MachineOperand::MO_Register: - O << RI.get(MO.getReg()).AsmName; - return; - - case MachineOperand::MO_Immediate: - O << MO.getImm(); - return; - case MachineOperand::MO_MachineBasicBlock: - printBasicBlockLabel(MO.getMBB()); - return; - case MachineOperand::MO_ConstantPoolIndex: { - O << "@gprel(" << TAI->getPrivateGlobalPrefix() - << "CPI" << getFunctionNumber() << "_" << MO.getIndex() << ")"; - return; - } - - case MachineOperand::MO_GlobalAddress: { - - // functions need @ltoff(@fptr(fn_name)) form - GlobalValue *GV = MO.getGlobal(); - Function *F = dyn_cast(GV); - - bool Needfptr=false; // if we're computing an address @ltoff(X), do - // we need to decorate it so it becomes - // @ltoff(@fptr(X)) ? - if (F && !isBRCALLinsn /*&& F->isDeclaration()*/) - Needfptr=true; - - // if this is the target of a call instruction, we should define - // the function somewhere (GNU gas has no problem without this, but - // Intel ias rightly complains of an 'undefined symbol') - - if (F /*&& isBRCALLinsn*/ && F->isDeclaration()) - ExternalFunctionNames.insert(Mang->getValueName(MO.getGlobal())); - else - if (GV->isDeclaration()) // e.g. stuff like 'stdin' - ExternalObjectNames.insert(Mang->getValueName(MO.getGlobal())); - - if (!isBRCALLinsn) - O << "@ltoff("; - if (Needfptr) - O << "@fptr("; - O << Mang->getValueName(MO.getGlobal()); - - if (Needfptr && !isBRCALLinsn) - O << "#))"; // close both fptr( and ltoff( - else { - if (Needfptr) - O << "#)"; // close only fptr( - if (!isBRCALLinsn) - O << "#)"; // close only ltoff( - } - - int Offset = MO.getOffset(); - if (Offset > 0) - O << " + " << Offset; - else if (Offset < 0) - O << " - " << -Offset; - return; - } - case MachineOperand::MO_ExternalSymbol: - O << MO.getSymbolName(); - ExternalFunctionNames.insert(MO.getSymbolName()); - return; - default: - O << ""; return; - } -} - -/// printMachineInstruction -- Print out a single IA64 LLVM instruction -/// MI to the current output stream. -/// -void IA64AsmPrinter::printMachineInstruction(const MachineInstr *MI) { - ++EmittedInsts; - - // Call the autogenerated instruction printer routines. - printInstruction(MI); -} - -bool IA64AsmPrinter::doInitialization(Module &M) { - bool Result = AsmPrinter::doInitialization(M); - - O << "\n.ident \"LLVM-ia64\"\n\n" - << "\t.psr lsb\n" // should be "msb" on HP-UX, for starters - << "\t.radix C\n" - << "\t.psr abi64\n"; // we only support 64 bits for now - return Result; -} - -void IA64AsmPrinter::printModuleLevelGV(const GlobalVariable* GVar) { - const TargetData *TD = TM.getTargetData(); - - if (!GVar->hasInitializer()) - return; // External global require no code - - // Check to see if this is a special global used by LLVM, if so, emit it. - if (EmitSpecialLLVMGlobal(GVar)) - return; - - O << "\n\n"; - std::string name = Mang->getValueName(GVar); - Constant *C = GVar->getInitializer(); - unsigned Size = TD->getTypePaddedSize(C->getType()); - unsigned Align = TD->getPreferredAlignmentLog(GVar); - - printVisibility(name, GVar->getVisibility()); - - SwitchToSection(TAI->SectionForGlobal(GVar)); - - if (C->isNullValue() && !GVar->hasSection()) { - if (!GVar->isThreadLocal() && - (GVar->hasLocalLinkage() || GVar->isWeakForLinker())) { - if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it. - - if (GVar->hasLocalLinkage()) { - O << "\t.lcomm " << name << "#," << Size - << ',' << (1 << Align); - O << '\n'; - } else { - O << "\t.common " << name << "#," << Size - << ',' << (1 << Align); - O << '\n'; - } - - return; - } - } - - switch (GVar->getLinkage()) { - case GlobalValue::LinkOnceAnyLinkage: - case GlobalValue::LinkOnceODRLinkage: - case GlobalValue::CommonLinkage: - case GlobalValue::WeakAnyLinkage: - case GlobalValue::WeakODRLinkage: - // Nonnull linkonce -> weak - O << "\t.weak " << name << '\n'; - break; - case GlobalValue::AppendingLinkage: - // FIXME: appending linkage variables should go into a section of - // their name or something. For now, just emit them as external. - case GlobalValue::ExternalLinkage: - // If external or appending, declare as a global symbol - O << TAI->getGlobalDirective() << name << '\n'; - // FALL THROUGH - case GlobalValue::InternalLinkage: - case GlobalValue::PrivateLinkage: - break; - case GlobalValue::GhostLinkage: - cerr << "GhostLinkage cannot appear in IA64AsmPrinter!\n"; - abort(); - case GlobalValue::DLLImportLinkage: - cerr << "DLLImport linkage is not supported by this target!\n"; - abort(); - case GlobalValue::DLLExportLinkage: - cerr << "DLLExport linkage is not supported by this target!\n"; - abort(); - default: - assert(0 && "Unknown linkage type!"); - } - - EmitAlignment(Align, GVar); - - if (TAI->hasDotTypeDotSizeDirective()) { - O << "\t.type " << name << ", at object\n"; - O << "\t.size " << name << ',' << Size << '\n'; - } - - O << name << ":\n"; - EmitGlobalConstant(C); -} - - -bool IA64AsmPrinter::doFinalization(Module &M) { - // Print out module-level global variables here. - for (Module::const_global_iterator I = M.global_begin(), E = M.global_end(); - I != E; ++I) - printModuleLevelGV(I); - - // we print out ".global X \n .type X, @function" for each external function - O << "\n\n// br.call targets referenced (and not defined) above: \n"; - for (std::set::iterator i = ExternalFunctionNames.begin(), - e = ExternalFunctionNames.end(); i!=e; ++i) { - O << "\t.global " << *i << "\n\t.type " << *i << ", @function\n"; - } - O << "\n\n"; - - // we print out ".global X \n .type X, @object" for each external object - O << "\n\n// (external) symbols referenced (and not defined) above: \n"; - for (std::set::iterator i = ExternalObjectNames.begin(), - e = ExternalObjectNames.end(); i!=e; ++i) { - O << "\t.global " << *i << "\n\t.type " << *i << ", @object\n"; - } - O << "\n\n"; - - return AsmPrinter::doFinalization(M); -} - -/// createIA64CodePrinterPass - Returns a pass that prints the IA64 -/// assembly code for a MachineFunction to the given output stream, using -/// the given target machine description. -/// -FunctionPass *llvm::createIA64CodePrinterPass(raw_ostream &o, - IA64TargetMachine &tm, - bool fast, bool verbose) { - return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); -} Modified: llvm/trunk/lib/Target/IA64/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/Makefile?rev=68380&r1=68379&r2=68380&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/Makefile (original) +++ llvm/trunk/lib/Target/IA64/Makefile Fri Apr 3 05:38:51 2009 @@ -6,7 +6,7 @@ # ##===----------------------------------------------------------------------===## LEVEL = ../../.. -LIBRARYNAME = LLVMIA64 +LIBRARYNAME = LLVMIA64CodeGen TARGET = IA64 # Make sure that tblgen is run, first thing. BUILT_SOURCES = IA64GenRegisterInfo.h.inc IA64GenRegisterNames.inc \ @@ -14,5 +14,7 @@ IA64GenInstrInfo.inc IA64GenAsmWriter.inc \ IA64GenDAGISel.inc +DIRS = AsmPrinter + include $(LEVEL)/Makefile.common From asl at math.spbu.ru Fri Apr 3 05:41:00 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Fri, 03 Apr 2009 10:41:00 -0000 Subject: [llvm-commits] [llvm] r68381 - /llvm/trunk/lib/Target/IA64/AsmPrinter/Makefile Message-ID: <200904031041.n33Af1BC015165@zion.cs.uiuc.edu> Author: asl Date: Fri Apr 3 05:41:00 2009 New Revision: 68381 URL: http://llvm.org/viewvc/llvm-project?rev=68381&view=rev Log: Fix comment Modified: llvm/trunk/lib/Target/IA64/AsmPrinter/Makefile Modified: llvm/trunk/lib/Target/IA64/AsmPrinter/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/AsmPrinter/Makefile?rev=68381&r1=68380&r2=68381&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/AsmPrinter/Makefile (original) +++ llvm/trunk/lib/Target/IA64/AsmPrinter/Makefile Fri Apr 3 05:41:00 2009 @@ -1,4 +1,4 @@ -##===- lib/Target/CellSPU/Makefile -------------------------*- Makefile -*-===## +##===- lib/Target/IA64/AsmPrinter/Makefile -----------------*- Makefile -*-===## # # The LLVM Compiler Infrastructure # From asl at math.spbu.ru Fri Apr 3 05:41:19 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Fri, 03 Apr 2009 10:41:19 -0000 Subject: [llvm-commits] [llvm] r68382 - /llvm/trunk/lib/Target/IA64/CMakeLists.txt Message-ID: <200904031041.n33AfJOd015195@zion.cs.uiuc.edu> Author: asl Date: Fri Apr 3 05:41:17 2009 New Revision: 68382 URL: http://llvm.org/viewvc/llvm-project?rev=68382&view=rev Log: Fix target library name Modified: llvm/trunk/lib/Target/IA64/CMakeLists.txt Modified: llvm/trunk/lib/Target/IA64/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/CMakeLists.txt?rev=68382&r1=68381&r2=68382&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/CMakeLists.txt (original) +++ llvm/trunk/lib/Target/IA64/CMakeLists.txt Fri Apr 3 05:41:17 2009 @@ -8,7 +8,7 @@ tablegen(IA64GenAsmWriter.inc -gen-asm-writer) tablegen(IA64GenDAGISel.inc -gen-dag-isel) -add_llvm_target(IA64 +add_llvm_target(IA64CodeGen IA64AsmPrinter.cpp IA64Bundling.cpp IA64InstrInfo.cpp From asl at math.spbu.ru Fri Apr 3 05:41:42 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Fri, 03 Apr 2009 10:41:42 -0000 Subject: [llvm-commits] [llvm] r68383 - in /llvm/trunk/lib/Target/Mips: AsmPrinter/ AsmPrinter/CMakeLists.txt AsmPrinter/Makefile AsmPrinter/MipsAsmPrinter.cpp CMakeLists.txt Makefile MipsAsmPrinter.cpp Message-ID: <200904031041.n33Afgs2015219@zion.cs.uiuc.edu> Author: asl Date: Fri Apr 3 05:41:41 2009 New Revision: 68383 URL: http://llvm.org/viewvc/llvm-project?rev=68383&view=rev Log: Separate MIPS asmprinter Added: llvm/trunk/lib/Target/Mips/AsmPrinter/ llvm/trunk/lib/Target/Mips/AsmPrinter/CMakeLists.txt llvm/trunk/lib/Target/Mips/AsmPrinter/Makefile llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp - copied, changed from r68382, llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Removed: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp Modified: llvm/trunk/lib/Target/Mips/CMakeLists.txt llvm/trunk/lib/Target/Mips/Makefile Added: llvm/trunk/lib/Target/Mips/AsmPrinter/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmPrinter/CMakeLists.txt?rev=68383&view=auto ============================================================================== --- llvm/trunk/lib/Target/Mips/AsmPrinter/CMakeLists.txt (added) +++ llvm/trunk/lib/Target/Mips/AsmPrinter/CMakeLists.txt Fri Apr 3 05:41:41 2009 @@ -0,0 +1,12 @@ +include_directories( + ${CMAKE_CURRENT_BINARY_DIR}/.. + ${CMAKE_CURRENT_SOURCE_DIR}/.. + ) + +add_partially_linked_object(LLVMMipsAsmPrinter + MipsAsmPrinter.cpp + ) + +target_name_of_partially_linked_object(LLVMMipsCodeGen n) + +add_dependencies(LLVMMipsAsmPrinter ${n}) Added: llvm/trunk/lib/Target/Mips/AsmPrinter/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmPrinter/Makefile?rev=68383&view=auto ============================================================================== --- llvm/trunk/lib/Target/Mips/AsmPrinter/Makefile (added) +++ llvm/trunk/lib/Target/Mips/AsmPrinter/Makefile Fri Apr 3 05:41:41 2009 @@ -0,0 +1,17 @@ +##===- lib/Target/Mips/AsmPrinter/Makefile -----------------*- Makefile -*-===## +# +# The LLVM Compiler Infrastructure +# +# This file is distributed under the University of Illinois Open Source +# License. See LICENSE.TXT for details. +# +##===----------------------------------------------------------------------===## + +LEVEL = ../../../.. +LIBRARYNAME = LLVMMipsAsmPrinter + +# Hack: we need to include 'main' Mips target directory to grab +# private headers +CPPFLAGS = -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/.. + +include $(LEVEL)/Makefile.common Copied: llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp (from r68382, llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp) URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp?p2=llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp&p1=llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp&r1=68382&r2=68383&rev=68383&view=diff ============================================================================== (empty) Modified: llvm/trunk/lib/Target/Mips/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/CMakeLists.txt?rev=68383&r1=68382&r2=68383&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/CMakeLists.txt (original) +++ llvm/trunk/lib/Target/Mips/CMakeLists.txt Fri Apr 3 05:41:41 2009 @@ -10,8 +10,7 @@ tablegen(MipsGenCallingConv.inc -gen-callingconv) tablegen(MipsGenSubtarget.inc -gen-subtarget) -add_llvm_target(Mips - MipsAsmPrinter.cpp +add_llvm_target(MipsCodeGen MipsDelaySlotFiller.cpp MipsInstrInfo.cpp MipsISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/Mips/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Makefile?rev=68383&r1=68382&r2=68383&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/Makefile (original) +++ llvm/trunk/lib/Target/Mips/Makefile Fri Apr 3 05:41:41 2009 @@ -7,7 +7,7 @@ # ##===----------------------------------------------------------------------===## LEVEL = ../../.. -LIBRARYNAME = LLVMMips +LIBRARYNAME = LLVMMipsCodeGen TARGET = Mips # Make sure that tblgen is run, first thing. @@ -17,5 +17,7 @@ MipsGenDAGISel.inc MipsGenCallingConv.inc \ MipsGenSubtarget.inc +DIRS = AsmPrinter + include $(LEVEL)/Makefile.common Removed: llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp?rev=68382&view=auto ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsAsmPrinter.cpp (removed) @@ -1,578 +0,0 @@ -//===-- MipsAsmPrinter.cpp - Mips LLVM assembly writer --------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file contains a printer that converts from our internal representation -// of machine-dependent LLVM code to GAS-format MIPS assembly language. -// -//===----------------------------------------------------------------------===// - -#define DEBUG_TYPE "mips-asm-printer" - -#include "Mips.h" -#include "MipsSubtarget.h" -#include "MipsInstrInfo.h" -#include "MipsTargetMachine.h" -#include "MipsMachineFunction.h" -#include "llvm/Constants.h" -#include "llvm/DerivedTypes.h" -#include "llvm/Module.h" -#include "llvm/CodeGen/AsmPrinter.h" -#include "llvm/CodeGen/DwarfWriter.h" -#include "llvm/CodeGen/MachineFunctionPass.h" -#include "llvm/CodeGen/MachineConstantPool.h" -#include "llvm/CodeGen/MachineFrameInfo.h" -#include "llvm/CodeGen/MachineInstr.h" -#include "llvm/Target/TargetAsmInfo.h" -#include "llvm/Target/TargetData.h" -#include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetOptions.h" -#include "llvm/Support/Mangler.h" -#include "llvm/ADT/Statistic.h" -#include "llvm/ADT/StringExtras.h" -#include "llvm/Support/Debug.h" -#include "llvm/Support/CommandLine.h" -#include "llvm/Support/MathExtras.h" -#include "llvm/Support/raw_ostream.h" -#include - -using namespace llvm; - -STATISTIC(EmittedInsts, "Number of machine instrs printed"); - -namespace { - class VISIBILITY_HIDDEN MipsAsmPrinter : public AsmPrinter { - const MipsSubtarget *Subtarget; - public: - MipsAsmPrinter(raw_ostream &O, MipsTargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) - : AsmPrinter(O, TM, T, F, V) { - Subtarget = &TM.getSubtarget(); - } - - virtual const char *getPassName() const { - return "Mips Assembly Printer"; - } - - bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, - unsigned AsmVariant, const char *ExtraCode); - void printOperand(const MachineInstr *MI, int opNum); - void printUnsignedImm(const MachineInstr *MI, int opNum); - void printMemOperand(const MachineInstr *MI, int opNum, - const char *Modifier = 0); - void printFCCOperand(const MachineInstr *MI, int opNum, - const char *Modifier = 0); - void printModuleLevelGV(const GlobalVariable* GVar); - void printSavedRegsBitmask(MachineFunction &MF); - void printHex32(unsigned int Value); - - const char *emitCurrentABIString(void); - void emitFunctionStart(MachineFunction &MF); - void emitFunctionEnd(MachineFunction &MF); - void emitFrameDirective(MachineFunction &MF); - - bool printInstruction(const MachineInstr *MI); // autogenerated. - bool runOnMachineFunction(MachineFunction &F); - bool doInitialization(Module &M); - bool doFinalization(Module &M); - }; -} // end of anonymous namespace - -#include "MipsGenAsmWriter.inc" - -/// createMipsCodePrinterPass - Returns a pass that prints the MIPS -/// assembly code for a MachineFunction to the given output stream, -/// using the given target machine description. This should work -/// regardless of whether the function is in SSA form. -FunctionPass *llvm::createMipsCodePrinterPass(raw_ostream &o, - MipsTargetMachine &tm, - bool fast, bool verbose) { - return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); -} - -//===----------------------------------------------------------------------===// -// -// Mips Asm Directives -// -// -- Frame directive "frame Stackpointer, Stacksize, RARegister" -// Describe the stack frame. -// -// -- Mask directives "(f)mask bitmask, offset" -// Tells the assembler which registers are saved and where. -// bitmask - contain a little endian bitset indicating which registers are -// saved on function prologue (e.g. with a 0x80000000 mask, the -// assembler knows the register 31 (RA) is saved at prologue. -// offset - the position before stack pointer subtraction indicating where -// the first saved register on prologue is located. (e.g. with a -// -// Consider the following function prologue: -// -// .frame $fp,48,$ra -// .mask 0xc0000000,-8 -// addiu $sp, $sp, -48 -// sw $ra, 40($sp) -// sw $fp, 36($sp) -// -// With a 0xc0000000 mask, the assembler knows the register 31 (RA) and -// 30 (FP) are saved at prologue. As the save order on prologue is from -// left to right, RA is saved first. A -8 offset means that after the -// stack pointer subtration, the first register in the mask (RA) will be -// saved at address 48-8=40. -// -//===----------------------------------------------------------------------===// - -//===----------------------------------------------------------------------===// -// Mask directives -//===----------------------------------------------------------------------===// - -// Create a bitmask with all callee saved registers for CPU or Floating Point -// registers. For CPU registers consider RA, GP and FP for saving if necessary. -void MipsAsmPrinter:: -printSavedRegsBitmask(MachineFunction &MF) -{ - const TargetRegisterInfo &RI = *TM.getRegisterInfo(); - MipsFunctionInfo *MipsFI = MF.getInfo(); - - // CPU and FPU Saved Registers Bitmasks - unsigned int CPUBitmask = 0; - unsigned int FPUBitmask = 0; - - // Set the CPU and FPU Bitmasks - MachineFrameInfo *MFI = MF.getFrameInfo(); - const std::vector &CSI = MFI->getCalleeSavedInfo(); - for (unsigned i = 0, e = CSI.size(); i != e; ++i) { - unsigned RegNum = MipsRegisterInfo::getRegisterNumbering(CSI[i].getReg()); - if (CSI[i].getRegClass() == Mips::CPURegsRegisterClass) - CPUBitmask |= (1 << RegNum); - else - FPUBitmask |= (1 << RegNum); - } - - // Return Address and Frame registers must also be set in CPUBitmask. - if (RI.hasFP(MF)) - CPUBitmask |= (1 << MipsRegisterInfo:: - getRegisterNumbering(RI.getFrameRegister(MF))); - - if (MF.getFrameInfo()->hasCalls()) - CPUBitmask |= (1 << MipsRegisterInfo:: - getRegisterNumbering(RI.getRARegister())); - - // Print CPUBitmask - O << "\t.mask \t"; printHex32(CPUBitmask); O << ',' - << MipsFI->getCPUTopSavedRegOff() << '\n'; - - // Print FPUBitmask - O << "\t.fmask\t"; printHex32(FPUBitmask); O << "," - << MipsFI->getFPUTopSavedRegOff() << '\n'; -} - -// Print a 32 bit hex number with all numbers. -void MipsAsmPrinter:: -printHex32(unsigned int Value) -{ - O << "0x"; - for (int i = 7; i >= 0; i--) - O << utohexstr( (Value & (0xF << (i*4))) >> (i*4) ); -} - -//===----------------------------------------------------------------------===// -// Frame and Set directives -//===----------------------------------------------------------------------===// - -/// Frame Directive -void MipsAsmPrinter:: -emitFrameDirective(MachineFunction &MF) -{ - const TargetRegisterInfo &RI = *TM.getRegisterInfo(); - - unsigned stackReg = RI.getFrameRegister(MF); - unsigned returnReg = RI.getRARegister(); - unsigned stackSize = MF.getFrameInfo()->getStackSize(); - - - O << "\t.frame\t" << '$' << LowercaseString(RI.get(stackReg).AsmName) - << ',' << stackSize << ',' - << '$' << LowercaseString(RI.get(returnReg).AsmName) - << '\n'; -} - -/// Emit Set directives. -const char * MipsAsmPrinter:: -emitCurrentABIString(void) -{ - switch(Subtarget->getTargetABI()) { - case MipsSubtarget::O32: return "abi32"; - case MipsSubtarget::O64: return "abiO64"; - case MipsSubtarget::N32: return "abiN32"; - case MipsSubtarget::N64: return "abi64"; - case MipsSubtarget::EABI: return "eabi32"; // TODO: handle eabi64 - default: break; - } - - assert(0 && "Unknown Mips ABI"); - return NULL; -} - -/// Emit the directives used by GAS on the start of functions -void MipsAsmPrinter:: -emitFunctionStart(MachineFunction &MF) -{ - // Print out the label for the function. - const Function *F = MF.getFunction(); - SwitchToSection(TAI->SectionForGlobal(F)); - - // 2 bits aligned - EmitAlignment(2, F); - - O << "\t.globl\t" << CurrentFnName << '\n'; - O << "\t.ent\t" << CurrentFnName << '\n'; - - printVisibility(CurrentFnName, F->getVisibility()); - - if ((TAI->hasDotTypeDotSizeDirective()) && Subtarget->isLinux()) - O << "\t.type\t" << CurrentFnName << ", @function\n"; - - O << CurrentFnName << ":\n"; - - emitFrameDirective(MF); - printSavedRegsBitmask(MF); - - O << '\n'; -} - -/// Emit the directives used by GAS on the end of functions -void MipsAsmPrinter:: -emitFunctionEnd(MachineFunction &MF) -{ - // There are instruction for this macros, but they must - // always be at the function end, and we can't emit and - // break with BB logic. - O << "\t.set\tmacro\n"; - O << "\t.set\treorder\n"; - - O << "\t.end\t" << CurrentFnName << '\n'; - if (TAI->hasDotTypeDotSizeDirective() && !Subtarget->isLinux()) - O << "\t.size\t" << CurrentFnName << ", .-" << CurrentFnName << '\n'; -} - -/// runOnMachineFunction - This uses the printMachineInstruction() -/// method to print assembly for each instruction. -bool MipsAsmPrinter:: -runOnMachineFunction(MachineFunction &MF) -{ - this->MF = &MF; - - SetupMachineFunction(MF); - - // Print out constants referenced by the function - EmitConstantPool(MF.getConstantPool()); - - // Print out jump tables referenced by the function - EmitJumpTableInfo(MF.getJumpTableInfo(), MF); - - O << "\n\n"; - - // Emit the function start directives - emitFunctionStart(MF); - - // Print out code for the function. - for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); - I != E; ++I) { - - // Print a label for the basic block. - if (I != MF.begin()) { - printBasicBlockLabel(I, true, true); - O << '\n'; - } - - for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); - II != E; ++II) { - // Print the assembly for the instruction. - printInstruction(II); - ++EmittedInsts; - } - - // Each Basic Block is separated by a newline - O << '\n'; - } - - // Emit function end directives - emitFunctionEnd(MF); - - // We didn't modify anything. - return false; -} - -// Print out an operand for an inline asm expression. -bool MipsAsmPrinter:: -PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, - unsigned AsmVariant, const char *ExtraCode) -{ - // Does this asm operand have a single letter operand modifier? - if (ExtraCode && ExtraCode[0]) - return true; // Unknown modifier. - - printOperand(MI, OpNo); - return false; -} - -void MipsAsmPrinter:: -printOperand(const MachineInstr *MI, int opNum) -{ - const MachineOperand &MO = MI->getOperand(opNum); - const TargetRegisterInfo &RI = *TM.getRegisterInfo(); - bool closeP = false; - bool isPIC = (TM.getRelocationModel() == Reloc::PIC_); - bool isCodeLarge = (TM.getCodeModel() == CodeModel::Large); - - // %hi and %lo used on mips gas to load global addresses on - // static code. %got is used to load global addresses when - // using PIC_. %call16 is used to load direct call targets - // on PIC_ and small code size. %call_lo and %call_hi load - // direct call targets on PIC_ and large code size. - if (MI->getOpcode() == Mips::LUi && !MO.isReg() && !MO.isImm()) { - if ((isPIC) && (isCodeLarge)) - O << "%call_hi("; - else - O << "%hi("; - closeP = true; - } else if ((MI->getOpcode() == Mips::ADDiu) && !MO.isReg() && !MO.isImm()) { - const MachineOperand &firstMO = MI->getOperand(opNum-1); - if (firstMO.getReg() == Mips::GP) - O << "%gp_rel("; - else - O << "%lo("; - closeP = true; - } else if ((isPIC) && (MI->getOpcode() == Mips::LW) && - (!MO.isReg()) && (!MO.isImm())) { - const MachineOperand &firstMO = MI->getOperand(opNum-1); - const MachineOperand &lastMO = MI->getOperand(opNum+1); - if ((firstMO.isReg()) && (lastMO.isReg())) { - if ((firstMO.getReg() == Mips::T9) && (lastMO.getReg() == Mips::GP) - && (!isCodeLarge)) - O << "%call16("; - else if ((firstMO.getReg() != Mips::T9) && (lastMO.getReg() == Mips::GP)) - O << "%got("; - else if ((firstMO.getReg() == Mips::T9) && (lastMO.getReg() != Mips::GP) - && (isCodeLarge)) - O << "%call_lo("; - closeP = true; - } - } - - switch (MO.getType()) - { - case MachineOperand::MO_Register: - if (TargetRegisterInfo::isPhysicalRegister(MO.getReg())) - O << '$' << LowercaseString (RI.get(MO.getReg()).AsmName); - else - O << '$' << MO.getReg(); - break; - - case MachineOperand::MO_Immediate: - O << (short int)MO.getImm(); - break; - - case MachineOperand::MO_MachineBasicBlock: - printBasicBlockLabel(MO.getMBB()); - return; - - case MachineOperand::MO_GlobalAddress: - { - const GlobalValue *GV = MO.getGlobal(); - O << Mang->getValueName(GV); - } - break; - - case MachineOperand::MO_ExternalSymbol: - O << MO.getSymbolName(); - break; - - case MachineOperand::MO_JumpTableIndex: - O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() - << '_' << MO.getIndex(); - break; - - case MachineOperand::MO_ConstantPoolIndex: - O << TAI->getPrivateGlobalPrefix() << "CPI" - << getFunctionNumber() << "_" << MO.getIndex(); - break; - - default: - O << ""; abort (); break; - } - - if (closeP) O << ")"; -} - -void MipsAsmPrinter:: -printUnsignedImm(const MachineInstr *MI, int opNum) -{ - const MachineOperand &MO = MI->getOperand(opNum); - if (MO.getType() == MachineOperand::MO_Immediate) - O << (unsigned short int)MO.getImm(); - else - printOperand(MI, opNum); -} - -void MipsAsmPrinter:: -printMemOperand(const MachineInstr *MI, int opNum, const char *Modifier) -{ - // when using stack locations for not load/store instructions - // print the same way as all normal 3 operand instructions. - if (Modifier && !strcmp(Modifier, "stackloc")) { - printOperand(MI, opNum+1); - O << ", "; - printOperand(MI, opNum); - return; - } - - // Load/Store memory operands -- imm($reg) - // If PIC target the target is loaded as the - // pattern lw $25,%call16($28) - printOperand(MI, opNum); - O << "("; - printOperand(MI, opNum+1); - O << ")"; -} - -void MipsAsmPrinter:: -printFCCOperand(const MachineInstr *MI, int opNum, const char *Modifier) -{ - const MachineOperand& MO = MI->getOperand(opNum); - O << Mips::MipsFCCToString((Mips::CondCode)MO.getImm()); -} - -bool MipsAsmPrinter:: -doInitialization(Module &M) -{ - Mang = new Mangler(M, "", TAI->getPrivateGlobalPrefix()); - - // Tell the assembler which ABI we are using - O << "\t.section .mdebug." << emitCurrentABIString() << '\n'; - - // TODO: handle O64 ABI - if (Subtarget->isABI_EABI()) - O << "\t.section .gcc_compiled_long" << - (Subtarget->isGP32bit() ? "32" : "64") << '\n'; - - // return to previous section - O << "\t.previous" << '\n'; - - return false; // success -} - -void MipsAsmPrinter:: -printModuleLevelGV(const GlobalVariable* GVar) { - const TargetData *TD = TM.getTargetData(); - - if (!GVar->hasInitializer()) - return; // External global require no code - - // Check to see if this is a special global used by LLVM, if so, emit it. - if (EmitSpecialLLVMGlobal(GVar)) - return; - - O << "\n\n"; - std::string name = Mang->getValueName(GVar); - Constant *C = GVar->getInitializer(); - const Type *CTy = C->getType(); - unsigned Size = TD->getTypePaddedSize(CTy); - const ConstantArray *CVA = dyn_cast(C); - bool printSizeAndType = true; - - // A data structure or array is aligned in memory to the largest - // alignment boundary required by any data type inside it (this matches - // the Preferred Type Alignment). For integral types, the alignment is - // the type size. - unsigned Align; - if (CTy->getTypeID() == Type::IntegerTyID || - CTy->getTypeID() == Type::VoidTyID) { - assert(!(Size & (Size-1)) && "Alignment is not a power of two!"); - Align = Log2_32(Size); - } else - Align = TD->getPreferredTypeAlignmentShift(CTy); - - printVisibility(name, GVar->getVisibility()); - - SwitchToSection(TAI->SectionForGlobal(GVar)); - - if (C->isNullValue() && !GVar->hasSection()) { - if (!GVar->isThreadLocal() && - (GVar->hasLocalLinkage() || GVar->isWeakForLinker())) { - if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it. - - if (GVar->hasLocalLinkage()) - O << "\t.local\t" << name << '\n'; - - O << TAI->getCOMMDirective() << name << ',' << Size; - if (TAI->getCOMMDirectiveTakesAlignment()) - O << ',' << (1 << Align); - - O << '\n'; - return; - } - } - switch (GVar->getLinkage()) { - case GlobalValue::LinkOnceAnyLinkage: - case GlobalValue::LinkOnceODRLinkage: - case GlobalValue::CommonLinkage: - case GlobalValue::WeakAnyLinkage: - case GlobalValue::WeakODRLinkage: - // FIXME: Verify correct for weak. - // Nonnull linkonce -> weak - O << "\t.weak " << name << '\n'; - break; - case GlobalValue::AppendingLinkage: - // FIXME: appending linkage variables should go into a section of their name - // or something. For now, just emit them as external. - case GlobalValue::ExternalLinkage: - // If external or appending, declare as a global symbol - O << TAI->getGlobalDirective() << name << '\n'; - // Fall Through - case GlobalValue::PrivateLinkage: - case GlobalValue::InternalLinkage: - if (CVA && CVA->isCString()) - printSizeAndType = false; - break; - case GlobalValue::GhostLinkage: - cerr << "Should not have any unmaterialized functions!\n"; - abort(); - case GlobalValue::DLLImportLinkage: - cerr << "DLLImport linkage is not supported by this target!\n"; - abort(); - case GlobalValue::DLLExportLinkage: - cerr << "DLLExport linkage is not supported by this target!\n"; - abort(); - default: - assert(0 && "Unknown linkage type!"); - } - - EmitAlignment(Align, GVar); - - if (TAI->hasDotTypeDotSizeDirective() && printSizeAndType) { - O << "\t.type " << name << ", at object\n"; - O << "\t.size " << name << ',' << Size << '\n'; - } - - O << name << ":\n"; - EmitGlobalConstant(C); -} - -bool MipsAsmPrinter:: -doFinalization(Module &M) -{ - // Print out module-level global variables here. - for (Module::const_global_iterator I = M.global_begin(), - E = M.global_end(); I != E; ++I) - printModuleLevelGV(I); - - O << '\n'; - - return AsmPrinter::doFinalization(M); -} From ofv at wanadoo.es Fri Apr 3 07:11:57 2009 From: ofv at wanadoo.es (Oscar Fuentes) Date: Fri, 03 Apr 2009 12:11:57 -0000 Subject: [llvm-commits] [llvm] r68384 - /llvm/trunk/lib/Target/IA64/CMakeLists.txt Message-ID: <200904031211.n33CBxNm018832@zion.cs.uiuc.edu> Author: ofv Date: Fri Apr 3 07:11:43 2009 New Revision: 68384 URL: http://llvm.org/viewvc/llvm-project?rev=68384&view=rev Log: CMake: removed IA64AsmPrinter.cpp from lib/Target/IA64/CMakeLists.txt Modified: llvm/trunk/lib/Target/IA64/CMakeLists.txt Modified: llvm/trunk/lib/Target/IA64/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/CMakeLists.txt?rev=68384&r1=68383&r2=68384&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/CMakeLists.txt (original) +++ llvm/trunk/lib/Target/IA64/CMakeLists.txt Fri Apr 3 07:11:43 2009 @@ -9,7 +9,6 @@ tablegen(IA64GenDAGISel.inc -gen-dag-isel) add_llvm_target(IA64CodeGen - IA64AsmPrinter.cpp IA64Bundling.cpp IA64InstrInfo.cpp IA64ISelDAGToDAG.cpp From ofv at wanadoo.es Fri Apr 3 07:16:37 2009 From: ofv at wanadoo.es (Oscar Fuentes) Date: Fri, 03 Apr 2009 12:16:37 -0000 Subject: [llvm-commits] [llvm] r68385 - /llvm/trunk/tools/llvm-config/CMakeLists.txt Message-ID: <200904031216.n33CGbIW018982@zion.cs.uiuc.edu> Author: ofv Date: Fri Apr 3 07:16:32 2009 New Revision: 68385 URL: http://llvm.org/viewvc/llvm-project?rev=68385&view=rev Log: CMake: tools/llvm-config/CMakeLists.txt: Use ! instead of comma as separator in sed scripts. Resolves Bug 3881. Modified: llvm/trunk/tools/llvm-config/CMakeLists.txt Modified: llvm/trunk/tools/llvm-config/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-config/CMakeLists.txt?rev=68385&r1=68384&r2=68385&view=diff ============================================================================== --- llvm/trunk/tools/llvm-config/CMakeLists.txt (original) +++ llvm/trunk/tools/llvm-config/CMakeLists.txt Fri Apr 3 07:16:32 2009 @@ -83,13 +83,13 @@ COMMENT "Checking for cyclic dependencies between LLVM libraries.") add_custom_command(OUTPUT ${LLVM_CONFIG} - COMMAND echo 's, at LLVM_CPPFLAGS@,${CMAKE_CPP_FLAGS},' > temp.sed - COMMAND echo 's, at LLVM_CFLAGS@,${CMAKE_C_FLAGS},' >> temp.sed - COMMAND echo 's, at LLVM_CXXFLAGS@,${CMAKE_CXX_FLAGS},' >> temp.sed - # TODO: Use general flags for linking, not just for shared libs: - COMMAND echo 's, at LLVM_LDFLAGS@,${CMAKE_SHARED_LINKER_FLAGS},' >> temp.sed - COMMAND echo 's, at LIBS@,,' >> temp.sed # TODO: System libs - COMMAND echo 's, at LLVM_BUILDMODE@,${CMAKE_BUILD_TYPE},' >> temp.sed + COMMAND echo 's!@LLVM_CPPFLAGS@!${CMAKE_CPP_FLAGS}!' > temp.sed + COMMAND echo 's!@LLVM_CFLAGS@!${CMAKE_C_FLAGS}!' >> temp.sed + COMMAND echo 's!@LLVM_CXXFLAGS@!${CMAKE_CXX_FLAGS}!' >> temp.sed + # TODO: Use general flags for linking! not just for shared libs: + COMMAND echo 's!@LLVM_LDFLAGS@!${CMAKE_SHARED_LINKER_FLAGS}!' >> temp.sed + COMMAND echo 's!@LIBS@!!' >> temp.sed # TODO: System libs + COMMAND echo 's!@LLVM_BUILDMODE@!${CMAKE_BUILD_TYPE}!' >> temp.sed COMMAND sed -f temp.sed < ${LLVM_CONFIG_IN} > ${LLVM_CONFIG} COMMAND ${CMAKE_COMMAND} -E remove -f temp.sed COMMAND cat ${FINAL_LIBDEPS} >> ${LLVM_CONFIG} From tonic at nondot.org Fri Apr 3 11:11:28 2009 From: tonic at nondot.org (Tanya Lattner) Date: Fri, 03 Apr 2009 16:11:28 -0000 Subject: [llvm-commits] [llvm] r68388 - /llvm/branches/release_25/README.txt Message-ID: <200904031611.n33GBVNp027825@zion.cs.uiuc.edu> Author: tbrethou Date: Fri Apr 3 11:11:12 2009 New Revision: 68388 URL: http://llvm.org/viewvc/llvm-project?rev=68388&view=rev Log: test commit for new branch mailing list. Modified: llvm/branches/release_25/README.txt Modified: llvm/branches/release_25/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_25/README.txt?rev=68388&r1=68387&r2=68388&view=diff ============================================================================== --- llvm/branches/release_25/README.txt (original) +++ llvm/branches/release_25/README.txt Fri Apr 3 11:11:12 2009 @@ -10,3 +10,5 @@ Please see the HTML documentation provided in docs/index.html for further assistance with LLVM. + + From espindola at google.com Fri Apr 3 11:15:37 2009 From: espindola at google.com (Rafael Espindola) Date: Fri, 3 Apr 2009 17:15:37 +0100 Subject: [llvm-commits] [llvm] r66922 - in /llvm/trunk: lib/Target/X86/X86InstrInfo.td test/CodeGen/X86/tls13.ll test/CodeGen/X86/tls14.ll In-Reply-To: <6FC4BA6E-0E41-47E4-B4E1-D984E9A08B41@apple.com> References: <200903131837.n2DIb7PC008719@zion.cs.uiuc.edu> <38a0d8450903311517m60b40486wc1af6a391faa6b6f@mail.gmail.com> <01131E67-E237-482B-BBBE-843A1F6DE0D0@apple.com> <38a0d8450904021346y48f1d13ds2c23c13fca2a886a@mail.gmail.com> <6FC4BA6E-0E41-47E4-B4E1-D984E9A08B41@apple.com> Message-ID: <38a0d8450904030915g2e92040clb9c60b173f044c52@mail.gmail.com> > Ok, thanks for explaining this. How about this approach: > > On GNU and any other target that supports it, lower using a > SegmentAddress node. ?On other targets, lower using a load > from a SegmentAddress node. ?Make address-mode matching > recognize SegmentAddress nodes (with appropriate special-cases > for LEA). That part is easy :-) > Then in the Select phase, define a special "def : Pat" that maps > the SegmentAddress node to a load from the SegmentAddress node > with a predicate to limit it to GNU and similar targets. > > Does this sound reasonable? The problem is that a (SegmentAddress ADDR, GS) has to be lowered to (+ (LOAD GS:0) ADDR) I am not sure how to do this in a .td file, so I implemented this in X86ISelDAGToDAG.cpp. The bigger problem is when ADDR is not a symbol. For example, in a InitialExec model, lowering will produce (SegmentAddr (LOAD ADDR), GS) If we are just computing the addresses, this has to be lowered to (+ (LOAD GS:0) (LOAD ADDR)) We should then combine the + and the (LOAD ADDR). I have implemented this all, but I don't like the result all that much. The function X86DAGToDAGISel::SelectSegmentAddress in particular looks very complicated. Will get more so when I add X86_64 :-( I think I will try the idea of always lowering to (load gs:0) + ADDR and then implementing some instruction folding after Select. I assume that is possible, right? > Dan Cheers, -- Rafael Avila de Espindola Google | Gordon House | Barrow Street | Dublin 4 | Ireland Registered in Dublin, Ireland | Registration Number: 368047 -------------- next part -------------- A non-text attachment was scrubbed... Name: llvm-wip.patch Type: text/x-diff Size: 42522 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090403/06f25588/attachment.bin From tonic at nondot.org Fri Apr 3 11:22:15 2009 From: tonic at nondot.org (Tanya Lattner) Date: Fri, 03 Apr 2009 16:22:15 -0000 Subject: [llvm-commits] [llvm] r68389 - /llvm/branches/release_25/README.txt Message-ID: <200904031622.n33GMGPD028310@zion.cs.uiuc.edu> Author: tbrethou Date: Fri Apr 3 11:22:07 2009 New Revision: 68389 URL: http://llvm.org/viewvc/llvm-project?rev=68389&view=rev Log: Testing hook for branch commits. Modified: llvm/branches/release_25/README.txt Modified: llvm/branches/release_25/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_25/README.txt?rev=68389&r1=68388&r2=68389&view=diff ============================================================================== --- llvm/branches/release_25/README.txt (original) +++ llvm/branches/release_25/README.txt Fri Apr 3 11:22:07 2009 @@ -10,5 +10,3 @@ Please see the HTML documentation provided in docs/index.html for further assistance with LLVM. - - From tonic at nondot.org Fri Apr 3 12:26:14 2009 From: tonic at nondot.org (Tanya Lattner) Date: Fri, 3 Apr 2009 12:26:14 -0500 Subject: [llvm-commits] CVS: llvm-www/header.incl Message-ID: <200904031726.n33HQE6W030933@zion.cs.uiuc.edu> Changes in directory llvm-www: header.incl updated: 1.77 -> 1.78 --- Log message: Add branch commit mailing list. --- Diffs of the changes: (+1 -0) header.incl | 1 + 1 files changed, 1 insertion(+) Index: llvm-www/header.incl diff -u llvm-www/header.incl:1.77 llvm-www/header.incl:1.78 --- llvm-www/header.incl:1.77 Tue Mar 3 00:48:04 2009 +++ llvm-www/header.incl Fri Apr 3 12:25:17 2009 @@ -110,6 +110,7 @@ LLVM-dev
      LLVM-bugs
      LLVM-commits + LLVM-branch-commits LLVM-testresults

      From tonic at nondot.org Fri Apr 3 12:31:25 2009 From: tonic at nondot.org (Tanya Lattner) Date: Fri, 3 Apr 2009 12:31:25 -0500 Subject: [llvm-commits] CVS: llvm-www/header.incl Message-ID: <200904031731.n33HVPAn031170@zion.cs.uiuc.edu> Changes in directory llvm-www: header.incl updated: 1.78 -> 1.79 --- Log message: Add some newlines. --- Diffs of the changes: (+2 -2) header.incl | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm-www/header.incl diff -u llvm-www/header.incl:1.78 llvm-www/header.incl:1.79 --- llvm-www/header.incl:1.78 Fri Apr 3 12:25:17 2009 +++ llvm-www/header.incl Fri Apr 3 12:30:10 2009 @@ -109,8 +109,8 @@ LLVM-announce
      LLVM-dev
      LLVM-bugs
      - LLVM-commits - LLVM-branch-commits + LLVM-commits
      + LLVM-branch-commits
      LLVM-testresults

      From clattner at apple.com Fri Apr 3 12:50:21 2009 From: clattner at apple.com (Chris Lattner) Date: Fri, 3 Apr 2009 10:50:21 -0700 Subject: [llvm-commits] TypeBuilder helper class In-Reply-To: <49D58B47.4030106@mxc.ca> References: <49D58B47.4030106@mxc.ca> Message-ID: <2516E87D-F6A1-4D9E-82AA-81E5EBD5902C@apple.com> On Apr 2, 2009, at 9:06 PM, Nick Lewycky wrote: >> This looks neat, though it's problematic for cross-compiling, where >> the host's int and size_t may be different from those of the target. >> It's not a problem for everyone, but an LLVM in-tree type builder >> utility should support cross compilation. > > What makes this different from the IRBuilder is that it's > reflective. We > could have reflection based and non-reflection based IRBuilder and > TypeBuilders independently. What you're asking for is a non-reflection > based TypeBuilder, which would be useful for the reasons you mention, > but would have a different API and is out of scope for this change. > Agreed? Instead of using native integer types, how about using place holders: typedef sometype<64> LLVMInt64; typedef sometype<64> LLVMInt32; ConvertType instead of: ConvertType ? -Chris From isanbard at gmail.com Fri Apr 3 13:00:56 2009 From: isanbard at gmail.com (Bill Wendling) Date: Fri, 03 Apr 2009 18:00:56 -0000 Subject: [llvm-commits] [llvm] r68392 - /llvm/tags/Apple/llvmCore-2105/ Message-ID: <200904031800.n33I0ufe032157@zion.cs.uiuc.edu> Author: void Date: Fri Apr 3 13:00:55 2009 New Revision: 68392 URL: http://llvm.org/viewvc/llvm-project?rev=68392&view=rev Log: Creating llvmCore-2105 from Dib branch. Added: llvm/tags/Apple/llvmCore-2105/ - copied from r68391, llvm/branches/Apple/Dib/ From isanbard at gmail.com Fri Apr 3 13:01:57 2009 From: isanbard at gmail.com (Bill Wendling) Date: Fri, 03 Apr 2009 18:01:57 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r68393 - /llvm-gcc-4.2/tags/Apple/llvmgcc42-2105/ Message-ID: <200904031801.n33I1vcQ032203@zion.cs.uiuc.edu> Author: void Date: Fri Apr 3 13:01:57 2009 New Revision: 68393 URL: http://llvm.org/viewvc/llvm-project?rev=68393&view=rev Log: Creating llvmgcc42-2105 from Dib branch. Added: llvm-gcc-4.2/tags/Apple/llvmgcc42-2105/ - copied from r68392, llvm-gcc-4.2/branches/Apple/Dib/ From clattner at apple.com Fri Apr 3 13:17:41 2009 From: clattner at apple.com (Chris Lattner) Date: Fri, 3 Apr 2009 11:17:41 -0700 Subject: [llvm-commits] embedded metadata preview In-Reply-To: <49C1EAA0.2060405@mxc.ca> References: <49BB6E93.9050802@mxc.ca> <49BF3557.8050409@mxc.ca> <7E811979-29E7-4C6D-AA1F-09BD0D7ABFC9@apple.com> <49C1EAA0.2060405@mxc.ca> Message-ID: >> The parser parts are not present in the patch. That may be a reason >> why it wasn't clear why Constant is used. > > That was accidental. They don't turn up in 'svn diff' unless I > explicitly ask for 'svn diff lib/AsmParser'. > > Here, I've attached a newer version of the patch which ought to > include everything. Hi Nick, I'm really sorry for the delay in review. Thank you for working on it! This work should be a host to a whole class of new coolness in llvm, including debug info improvements and TBAA stuff. I'm excited that you're pushing this forward! +++ include/llvm/Type.h (working copy) @@ -326,7 +326,7 @@ // ===-------------------------------------------------------------------- ===// // These are the builtin types that are always available... // - static const Type *VoidTy, *LabelTy, *FloatTy, *DoubleTy; + static const Type *VoidTy, *LabelTy, *FloatTy, *DoubleTy, *MetadataTy; static const Type *X86_FP80Ty, *FP128Ty, *PPC_FP128Ty; static const IntegerType *Int1Ty, *Int8Ty, *Int16Ty, *Int32Ty, *Int64Ty; For now (unless MD gets its own type), this should probably be named EmptyStructTy. +class MDString : public Constant { + explicit MDString(const std::vector &Val); ctor is dead, plz remove. + /// length() - The length of this string. + /// + unsigned length() const { return StrEnd - StrBegin; } how about "size()" instead of length() ? +// = = =---------------------------------------------------------------------- ===// +/// MDNode - a tuple of other values. +/// These are used to efficiently contain a byte sequence for metadata. I don't think "byte sequence" is accurate here. +class MDNode : public Constant, public FoldingSetNode { + friend struct ConstantCreator >; I think the "friend" is dead? + static MDNode *get(const std::vector &V) { + if (V.empty()) + return get(NULL, 0); + else + return get(&*V.begin(), V.size()); + } Can we just remove this ctor and force clients to do this? + /// getType() specialization - Type is always void. + /// + inline const Type *getType() const { + return Type::MetadataTy; s/void/{}/ in comment. +++ lib/VMCore/Constants.cpp (working copy) +static StringMap MDStringCache; +static FoldingSet MDNodeSet; These should use ManagedStatic<> so that the map/set is lazily created and destroyed on llvm_shutdown() +void MDNode::replaceUsesOfWithOnConstant(Value *From, Value *To, Use *U) { + assert(isa(To) && "Cannot make Constant refer to non- constant!"); + + std::vector Values; How about using a SmallVector here? +++ lib/AsmParser/LLToken.h (working copy) @@ -115,6 +115,9 @@ LocalVar, // %foo %"foo" StringConstant, // "foo" + // Metadata valued tokens. + Metadata, // !42 !"foo" Does the parser support the !42 syntax? +++ lib/Bitcode/Reader/BitcodeReader.cpp (working copy) + case bitc::CST_CODE_MDSTRING: { + if (Record.size() < 2) return Error("Invalid MDSTRING record"); + unsigned MDStringLength = Record.size(); + char *String = new char[MDStringLength]; instead of new[], please use something like: SmallString<8> String; String.resize(MDStringLength); ... + case bitc::CST_CODE_MDNODE: { + if (Record.empty() || Record.size() % 2 == 1) + return Error("Invalid CST_MDNODE record"); + + unsigned Size = Record.size(); + std::vector Elts; SmallVector plz. +++ docs/LangRef.html (working copy) +empty struct and is identified in syntax by a preceeding exclamation point preceeding -> preceding After reading through the patch, I completely agree that introducing a new "metadatatype" is the right direction to go for. Please apply with these changes, -Chris From daniel at zuster.org Fri Apr 3 13:43:18 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Fri, 03 Apr 2009 18:43:18 -0000 Subject: [llvm-commits] [llvm] r68396 - /llvm/trunk/include/llvm/Support/raw_ostream.h Message-ID: <200904031843.n33IhISB001289@zion.cs.uiuc.edu> Author: ddunbar Date: Fri Apr 3 13:43:17 2009 New Revision: 68396 URL: http://llvm.org/viewvc/llvm-project?rev=68396&view=rev Log: Add fast path for raw_ostream output of strings. - Particularly nice for small constant strings, which get optimized down nicely. On a synthetic benchmark writing out "hello" in a loop, this is about 2x faster with gcc and 3x faster with llvm-gcc. llc on insn-attrtab.bc from 403.gcc is about .5% faster. - I tried for a fancier solution which wouldn't increase code size as much (by trying to match constant arrays), but can't quite make it fly. Modified: llvm/trunk/include/llvm/Support/raw_ostream.h Modified: llvm/trunk/include/llvm/Support/raw_ostream.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/raw_ostream.h?rev=68396&r1=68395&r2=68396&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/raw_ostream.h (original) +++ llvm/trunk/include/llvm/Support/raw_ostream.h Fri Apr 3 13:43:17 2009 @@ -119,7 +119,17 @@ } raw_ostream &operator<<(const char *Str) { - write(Str, strlen(Str)); + // Inline fast path, particulary for constant strings where a + // sufficiently smart compiler will simplify strlen. + + unsigned Size = strlen(Str); + + // Make sure we can use the fast path. + if (OutBufCur+Size > OutBufEnd) + return write(Str, Size); + + memcpy(OutBufCur, Str, Size); + OutBufCur += Size; return *this; } From gohman at apple.com Fri Apr 3 15:11:30 2009 From: gohman at apple.com (Dan Gohman) Date: Fri, 03 Apr 2009 20:11:30 -0000 Subject: [llvm-commits] [llvm] r68398 - in /llvm/trunk: lib/CodeGen/SelectionDAG/TargetLowering.cpp test/CodeGen/X86/and-su.ll Message-ID: <200904032011.n33KBUd3005005@zion.cs.uiuc.edu> Author: djg Date: Fri Apr 3 15:11:30 2009 New Revision: 68398 URL: http://llvm.org/viewvc/llvm-project?rev=68398&view=rev Log: Fix a TargetLowering optimization so that it doesn't duplicate loads when an input node has multiple uses. Added: llvm/trunk/test/CodeGen/X86/and-su.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=68398&r1=68397&r2=68398&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Fri Apr 3 15:11:30 2009 @@ -1464,6 +1464,7 @@ // in the same partial word, see if we can shorten the load. if (DCI.isBeforeLegalize() && N0.getOpcode() == ISD::AND && C1 == 0 && + N0.getNode()->hasOneUse() && isa(N0.getOperand(0)) && N0.getOperand(0).getNode()->hasOneUse() && isa(N0.getOperand(1))) { Added: llvm/trunk/test/CodeGen/X86/and-su.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/and-su.ll?rev=68398&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/and-su.ll (added) +++ llvm/trunk/test/CodeGen/X86/and-su.ll Fri Apr 3 15:11:30 2009 @@ -0,0 +1,16 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep {(%} | count 1 + +; Don't duplicate the load. + +define fastcc i32 @foo(i32* %p) nounwind { + %t0 = load i32* %p + %t2 = and i32 %t0, 10 + %t3 = icmp ne i32 %t2, 0 + br i1 %t3, label %bb63, label %bb76 + +bb63: + ret i32 %t2 + +bb76: + ret i32 0 +} From sabre at nondot.org Fri Apr 3 15:23:52 2009 From: sabre at nondot.org (Chris Lattner) Date: Fri, 03 Apr 2009 20:23:52 -0000 Subject: [llvm-commits] [llvm] r68399 - /llvm/trunk/docs/GettingStartedVS.html Message-ID: <200904032023.n33KNqtD005676@zion.cs.uiuc.edu> Author: lattner Date: Fri Apr 3 15:23:52 2009 New Revision: 68399 URL: http://llvm.org/viewvc/llvm-project?rev=68399&view=rev Log: "Add documentation about the fix for missing x86 target library in windows under the "Common problems" section." Patch by Stefanus Du Toit! Modified: llvm/trunk/docs/GettingStartedVS.html Modified: llvm/trunk/docs/GettingStartedVS.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GettingStartedVS.html?rev=68399&r1=68398&r2=68399&view=diff ============================================================================== --- llvm/trunk/docs/GettingStartedVS.html (original) +++ llvm/trunk/docs/GettingStartedVS.html Fri Apr 3 15:23:52 2009 @@ -371,6 +371,16 @@
      6. +
        +
      • In Visual C++, if you are linking with the x86 target statically, the + linker will remove the x86 target library from your generated executable + or shared library because there are no references to it. You can force the + linker to include these references by using + "/INCLUDE:_X86TargetMachineModule" when linking. In Visual Studio IDE, this + can be added in Project Properties->Linker->Input->Force Symbol References. +
        • +
      +

      If you are having problems building or using LLVM, or if you have any other general questions about LLVM, please consult the Frequently Asked Questions page.

      From clattner at apple.com Fri Apr 3 15:24:34 2009 From: clattner at apple.com (Chris Lattner) Date: Fri, 3 Apr 2009 13:24:34 -0700 Subject: [llvm-commits] Ping! [PATCH] Fwd: Docs:added: fix for missing x86 target library in windows In-Reply-To: <89CDBFD4-DCDA-4550-B3D6-9E1698B8BACE@rapidmind.com> References: <49B59097.3080502@rapidmind.com> <89CDBFD4-DCDA-4550-B3D6-9E1698B8BACE@rapidmind.com> Message-ID: <6C04C2A1-E93C-4BE9-BCA6-80F69970AAF0@apple.com> On Mar 26, 2009, at 7:05 AM, Stefanus Du Toit wrote: > Just thought I would ping this patch in the hopes that someone might > apply it. It's a simple docs patch that points out a step necessary > to make Visual Studio projects work with LLVM if one wants to use > the JIT. Figuring this out caused us some frustration, so hopefully > this will help others in the same boat. Applied, thanks! http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20090330/076018.html > > > Begin forwarded message: >> From: Tareq Siraj >> Date: March 9, 2009 5:56:39 PM GMT-04:00 >> To: "llvm-commits at cs.uiuc.edu" >> Subject: [llvm-commits] Docs:added: fix for missing x86 target >> library in windows >> Reply-To: Commit Messages and Patches for LLVM > > >> >> As discussed in #llvm, added documentation about the fix for >> missing x86 >> target library in windows under the "Common problems" section. >> >> -- >> Regards, >> Tareq Ahmed Siraj >> RapidMind Inc. >> http://www.rapidmind.com >> > > -- > Stefanus Du Toit > RapidMind Inc. > phone: +1 519 885 5455 x116 -- fax: +1 519 885 1463 > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From sabre at nondot.org Fri Apr 3 15:25:41 2009 From: sabre at nondot.org (Chris Lattner) Date: Fri, 03 Apr 2009 20:25:41 -0000 Subject: [llvm-commits] [llvm] r68400 - in /llvm/trunk: include/llvm/Target/TargetRegisterInfo.h utils/TableGen/RegisterInfoEmitter.cpp Message-ID: <200904032025.n33KPf6O005746@zion.cs.uiuc.edu> Author: lattner Date: Fri Apr 3 15:25:41 2009 New Revision: 68400 URL: http://llvm.org/viewvc/llvm-project?rev=68400&view=rev Log: "This adds a getName() method to TargetRegisterClass, just like in TargetRegisterInfo. This makes debugging register classes a bit easier." Patch by Jakob Stoklund Olesen! Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegisterInfo.h?rev=68400&r1=68399&r2=68400&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h Fri Apr 3 15:25:41 2009 @@ -56,6 +56,7 @@ typedef const TargetRegisterClass* const * sc_iterator; private: unsigned ID; + const char *Name; bool isSubClass; const vt_iterator VTs; const sc_iterator SubClasses; @@ -65,19 +66,24 @@ const iterator RegsBegin, RegsEnd; public: TargetRegisterClass(unsigned id, + const char *name, const MVT *vts, const TargetRegisterClass * const *subcs, const TargetRegisterClass * const *supcs, unsigned RS, unsigned Al, int CC, iterator RB, iterator RE) - : ID(id), VTs(vts), SubClasses(subcs), SuperClasses(supcs), + : ID(id), Name(name), VTs(vts), SubClasses(subcs), SuperClasses(supcs), RegSize(RS), Alignment(Al), CopyCost(CC), RegsBegin(RB), RegsEnd(RE) {} virtual ~TargetRegisterClass() {} // Allow subclasses /// getID() - Return the register class ID number. /// unsigned getID() const { return ID; } - + + /// getName() - Return the register class name for debugging. + /// + const char *getName() const { return Name; } + /// begin/end - Return all of the registers in this class. /// iterator begin() const { return RegsBegin; } Modified: llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp?rev=68400&r1=68399&r2=68400&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp Fri Apr 3 15:25:41 2009 @@ -319,6 +319,7 @@ OS << RC.getName() << "Class::" << RC.getName() << "Class() : TargetRegisterClass(" << RC.getName() + "RegClassID" << ", " + << '\"' << RC.getName() << "\", " << RC.getName() + "VTs" << ", " << RC.getName() + "Subclasses" << ", " << RC.getName() + "Superclasses" << ", " From clattner at apple.com Fri Apr 3 15:25:59 2009 From: clattner at apple.com (Chris Lattner) Date: Fri, 3 Apr 2009 13:25:59 -0700 Subject: [llvm-commits] PATCH: Add TargetRegisterClass::getName() In-Reply-To: <6D3992A6-4671-4BEF-80DE-08DFD0F8546B@2pi.dk> References: <6D3992A6-4671-4BEF-80DE-08DFD0F8546B@2pi.dk> Message-ID: On Mar 25, 2009, at 12:39 PM, Jakob Stoklund Olesen wrote: > The attached patch adds a getName() method to TargetRegisterClass, > just like in TargetRegisterInfo. > This makes debugging register classes a bit easier. Nice, applied here: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20090330/076020.html Thanks, -Chris From isanbard at gmail.com Fri Apr 3 15:32:13 2009 From: isanbard at gmail.com (Bill Wendling) Date: Fri, 03 Apr 2009 20:32:13 -0000 Subject: [llvm-commits] [llvm] r68401 - /llvm/trunk/docs/GettingStartedVS.html Message-ID: <200904032032.n33KWDS8005952@zion.cs.uiuc.edu> Author: void Date: Fri Apr 3 15:32:13 2009 New Revision: 68401 URL: http://llvm.org/viewvc/llvm-project?rev=68401&view=rev Log: Duplicate entry. Modified: llvm/trunk/docs/GettingStartedVS.html Modified: llvm/trunk/docs/GettingStartedVS.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GettingStartedVS.html?rev=68401&r1=68400&r2=68401&view=diff ============================================================================== --- llvm/trunk/docs/GettingStartedVS.html (original) +++ llvm/trunk/docs/GettingStartedVS.html Fri Apr 3 15:32:13 2009 @@ -371,16 +371,6 @@ -
        -
      • In Visual C++, if you are linking with the x86 target statically, the - linker will remove the x86 target library from your generated executable - or shared library because there are no references to it. You can force the - linker to include these references by using - "/INCLUDE:_X86TargetMachineModule" when linking. In Visual Studio IDE, this - can be added in Project Properties->Linker->Input->Force Symbol References. -
        • -
      -

      If you are having problems building or using LLVM, or if you have any other general questions about LLVM, please consult the Frequently Asked Questions page.

      From bob.wilson at apple.com Fri Apr 3 15:53:26 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Fri, 03 Apr 2009 20:53:26 -0000 Subject: [llvm-commits] [llvm] r68404 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Message-ID: <200904032053.n33KrQdA006685@zion.cs.uiuc.edu> Author: bwilson Date: Fri Apr 3 15:53:25 2009 New Revision: 68404 URL: http://llvm.org/viewvc/llvm-project?rev=68404&view=rev Log: Fix some comments. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp?rev=68404&r1=68403&r2=68404&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Fri Apr 3 15:53:25 2009 @@ -211,7 +211,7 @@ break; } - // Try spliting an indexed load / store to a un-indexed one plus an add/sub + // Try splitting an indexed load/store to an un-indexed one plus an add/sub // operation. unsigned MemOpc = getUnindexedOpcode(MI->getOpcode()); if (MemOpc == 0) @@ -401,8 +401,8 @@ return false; } - // Likewise if it ends with a branch table followed by an unconditional branch. - // The branch folder can create these, and we must get rid of them for + // ...likewise if it ends with a branch table followed by an unconditional + // branch. The branch folder can create these, and we must get rid of them for // correctness of Thumb constant islands. if ((SecondLastOpc == ARM::BR_JTr || SecondLastOpc==ARM::BR_JTm || SecondLastOpc == ARM::BR_JTadd || SecondLastOpc==ARM::tBR_JTr) && @@ -692,7 +692,7 @@ default: break; case ARM::MOVr: { if (MI->getOperand(4).getReg() == ARM::CPSR) - // If it is updating CPSR, then it cannot be foled. + // If it is updating CPSR, then it cannot be folded. break; unsigned Pred = MI->getOperand(2).getImm(); unsigned PredReg = MI->getOperand(3).getReg(); @@ -781,7 +781,7 @@ switch (Opc) { default: break; case ARM::MOVr: - // If it is updating CPSR, then it cannot be foled. + // If it is updating CPSR, then it cannot be folded. return MI->getOperand(4).getReg() != ARM::CPSR; case ARM::tMOVr: { if (OpNum == 0) { // move -> store From bob.wilson at apple.com Fri Apr 3 16:08:43 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Fri, 03 Apr 2009 21:08:43 -0000 Subject: [llvm-commits] [llvm] r68405 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Message-ID: <200904032108.n33L8hqB007412@zion.cs.uiuc.edu> Author: bwilson Date: Fri Apr 3 16:08:42 2009 New Revision: 68405 URL: http://llvm.org/viewvc/llvm-project?rev=68405&view=rev Log: Wrap some lines to fix indentation problems. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp?rev=68405&r1=68404&r2=68405&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Fri Apr 3 16:08:42 2009 @@ -25,8 +25,9 @@ #include "llvm/Support/CommandLine.h" using namespace llvm; -static cl::opt EnableARM3Addr("enable-arm-3-addr-conv", cl::Hidden, - cl::desc("Enable ARM 2-addr to 3-addr conv")); +static cl::opt +EnableARM3Addr("enable-arm-3-addr-conv", cl::Hidden, + cl::desc("Enable ARM 2-addr to 3-addr conv")); static inline const MachineInstrBuilder &AddDefaultPred(const MachineInstrBuilder &MIB) { @@ -445,9 +446,10 @@ return 2; } -unsigned ARMInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, - MachineBasicBlock *FBB, - const SmallVectorImpl &Cond) const { +unsigned +ARMInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, + MachineBasicBlock *FBB, + const SmallVectorImpl &Cond) const { // FIXME this should probably have a DebugLoc argument DebugLoc dl = DebugLoc::getUnknownLoc(); MachineFunction &MF = *MBB.getParent(); @@ -477,10 +479,10 @@ } bool ARMInstrInfo::copyRegToReg(MachineBasicBlock &MBB, - MachineBasicBlock::iterator I, - unsigned DestReg, unsigned SrcReg, - const TargetRegisterClass *DestRC, - const TargetRegisterClass *SrcRC) const { + MachineBasicBlock::iterator I, + unsigned DestReg, unsigned SrcReg, + const TargetRegisterClass *DestRC, + const TargetRegisterClass *SrcRC) const { if (DestRC != SrcRC) { // Not yet supported! return false; @@ -600,10 +602,11 @@ } } -void ARMInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, - SmallVectorImpl &Addr, - const TargetRegisterClass *RC, - SmallVectorImpl &NewMIs) const { +void ARMInstrInfo:: +loadRegFromAddr(MachineFunction &MF, unsigned DestReg, + SmallVectorImpl &Addr, + const TargetRegisterClass *RC, + SmallVectorImpl &NewMIs) const { DebugLoc DL = DebugLoc::getUnknownLoc(); unsigned Opc = 0; if (RC == ARM::GPRRegisterClass) { @@ -632,9 +635,10 @@ return; } -bool ARMInstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - const std::vector &CSI) const { +bool ARMInstrInfo:: +spillCalleeSavedRegisters(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MI, + const std::vector &CSI) const { MachineFunction &MF = *MBB.getParent(); ARMFunctionInfo *AFI = MF.getInfo(); if (!AFI->isThumbFunction() || CSI.empty()) @@ -653,9 +657,10 @@ return true; } -bool ARMInstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - const std::vector &CSI) const { +bool ARMInstrInfo:: +restoreCalleeSavedRegisters(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MI, + const std::vector &CSI) const { MachineFunction &MF = *MBB.getParent(); ARMFunctionInfo *AFI = MF.getInfo(); if (!AFI->isThumbFunction() || CSI.empty()) @@ -679,10 +684,9 @@ return true; } -MachineInstr *ARMInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, - MachineInstr *MI, - const SmallVectorImpl &Ops, - int FI) const { +MachineInstr *ARMInstrInfo:: +foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI, + const SmallVectorImpl &Ops, int FI) const { if (Ops.size() != 1) return NULL; unsigned OpNum = Ops[0]; @@ -772,8 +776,9 @@ return NewMI; } -bool ARMInstrInfo::canFoldMemoryOperand(const MachineInstr *MI, - const SmallVectorImpl &Ops) const { +bool ARMInstrInfo:: +canFoldMemoryOperand(const MachineInstr *MI, + const SmallVectorImpl &Ops) const { if (Ops.size() != 1) return false; unsigned OpNum = Ops[0]; @@ -837,8 +842,9 @@ return PIdx != -1 && MI->getOperand(PIdx).getImm() != ARMCC::AL; } -bool ARMInstrInfo::PredicateInstruction(MachineInstr *MI, - const SmallVectorImpl &Pred) const { +bool ARMInstrInfo:: +PredicateInstruction(MachineInstr *MI, + const SmallVectorImpl &Pred) const { unsigned Opc = MI->getOpcode(); if (Opc == ARM::B || Opc == ARM::tB) { MI->setDesc(get(Opc == ARM::B ? ARM::Bcc : ARM::tBcc)); @@ -857,9 +863,9 @@ return false; } -bool -ARMInstrInfo::SubsumesPredicate(const SmallVectorImpl &Pred1, - const SmallVectorImpl &Pred2) const{ +bool ARMInstrInfo:: +SubsumesPredicate(const SmallVectorImpl &Pred1, + const SmallVectorImpl &Pred2) const { if (Pred1.size() > 2 || Pred2.size() > 2) return false; From stefanus.dutoit at rapidmind.com Fri Apr 3 16:41:53 2009 From: stefanus.dutoit at rapidmind.com (Stefanus Du Toit) Date: Fri, 03 Apr 2009 21:41:53 -0000 Subject: [llvm-commits] [llvm] r68408 - /llvm/trunk/CREDITS.TXT Message-ID: <200904032141.n33Lfrd8008944@zion.cs.uiuc.edu> Author: sdt Date: Fri Apr 3 16:41:52 2009 New Revision: 68408 URL: http://llvm.org/viewvc/llvm-project?rev=68408&view=rev Log: Test commit access to LLVM with some minor narcissism. Modified: llvm/trunk/CREDITS.TXT Modified: llvm/trunk/CREDITS.TXT URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CREDITS.TXT?rev=68408&r1=68407&r2=68408&view=diff ============================================================================== --- llvm/trunk/CREDITS.TXT (original) +++ llvm/trunk/CREDITS.TXT Fri Apr 3 16:41:52 2009 @@ -78,6 +78,10 @@ E: criswell at uiuc.edu D: Original Autoconf support, documentation improvements, bug fixes +N: Stefanus Du Toit +E: stefanus.dutoit at rapidmind.com +D: Bug fixes and minor improvements + N: Rafael Avila de Espindola E: rafael.espindola at gmail.com D: The ARM backend From stoklund at 2pi.dk Fri Apr 3 16:47:24 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Fri, 3 Apr 2009 23:47:24 +0200 Subject: [llvm-commits] [PATCH] Teach cmake to detect the presence of Graphviz and friends Message-ID: <631A63CE-EF4F-4221-A38E-0E0A2F6C0E11@2pi.dk> * Add a new cmake macro llvm_find_program that searches for a program and sets HAVE_FOO and LLVM_PATH_FOO variables. * Use llvm_find_program to find Graphviz, dot, dotty, and gv. * Add a few header file and symbol checks related to starting sub- processes and back traces. * Update config.h.cmake to include new checks. With this patch, llc built by cmake supports the -view-dag-* options and it can generate a stack trace on aborts. Tested on Mac OS X 10.5.6 with cmake 2.6 generating makefiles -------------- next part -------------- A non-text attachment was scrubbed... Name: cmake-extras.patch Type: application/octet-stream Size: 5153 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090403/0ed32ec3/attachment.obj -------------- next part -------------- From nicholas at mxc.ca Sat Apr 4 01:54:55 2009 From: nicholas at mxc.ca (Nick Lewycky) Date: Fri, 03 Apr 2009 23:54:55 -0700 Subject: [llvm-commits] embedded metadata preview In-Reply-To: References: <49BB6E93.9050802@mxc.ca> <49BF3557.8050409@mxc.ca> <7E811979-29E7-4C6D-AA1F-09BD0D7ABFC9@apple.com> <49C1EAA0.2060405@mxc.ca> Message-ID: <49D7043F.6040906@mxc.ca> Chris Lattner wrote: >>> The parser parts are not present in the patch. That may be a reason >>> why it wasn't clear why Constant is used. >> That was accidental. They don't turn up in 'svn diff' unless I >> explicitly ask for 'svn diff lib/AsmParser'. >> >> Here, I've attached a newer version of the patch which ought to >> include everything. > > Hi Nick, > > I'm really sorry for the delay in review. Thank you for working on > it! This work should be a host to a whole class of new coolness in > llvm, including debug info improvements and TBAA stuff. I'm excited > that you're pushing this forward! No problem. Thanks for the review! I'm looking forward to seeing what people make of embedded metadata. > +++ include/llvm/Type.h (working copy) > @@ -326,7 +326,7 @@ > // > ===-------------------------------------------------------------------- > ===// > // These are the builtin types that are always available... > // > - static const Type *VoidTy, *LabelTy, *FloatTy, *DoubleTy; > + static const Type *VoidTy, *LabelTy, *FloatTy, *DoubleTy, > *MetadataTy; > static const Type *X86_FP80Ty, *FP128Ty, *PPC_FP128Ty; > static const IntegerType *Int1Ty, *Int8Ty, *Int16Ty, *Int32Ty, > *Int64Ty; > > For now (unless MD gets its own type), this should probably be named > EmptyStructTy. Done. > +class MDString : public Constant { > > + explicit MDString(const std::vector &Val); > > ctor is dead, plz remove. Done. > + /// length() - The length of this string. > + /// > + unsigned length() const { return StrEnd - StrBegin; } > > how about "size()" instead of length() ? Sure. Done. > +// > = > = > =---------------------------------------------------------------------- > ===// > +/// MDNode - a tuple of other values. > +/// These are used to efficiently contain a byte sequence for metadata. > > I don't think "byte sequence" is accurate here. Oops! Fixed. New text reads: /// MDNode - a tuple of other values. /// These contain a list of the Constants that represent the metadata. > +class MDNode : public Constant, public FoldingSetNode { > + friend struct ConstantCreator >; > > I think the "friend" is dead? > > + static MDNode *get(const std::vector &V) { > + if (V.empty()) > + return get(NULL, 0); > + else > + return get(&*V.begin(), V.size()); > + } > > Can we just remove this ctor and force clients to do this? Done. Turns out the only user of it already knew the vector would never be empty. > + /// getType() specialization - Type is always void. > + /// > + inline const Type *getType() const { > + return Type::MetadataTy; > > s/void/{}/ in comment. Oops! Fixed. > +++ lib/VMCore/Constants.cpp (working copy) > > +static StringMap MDStringCache; > +static FoldingSet MDNodeSet; > > These should use ManagedStatic<> so that the map/set is lazily created > and destroyed on llvm_shutdown() Done. > +void MDNode::replaceUsesOfWithOnConstant(Value *From, Value *To, Use > *U) { > + assert(isa(To) && "Cannot make Constant refer to non- > constant!"); > + > + std::vector Values; > > > How about using a SmallVector here? Done. Note that this is a copy'n'paste of ConstantVector::replaceUsesOfWithOnConstant which I did not update because its getter takes std::vector explicitly. (It has a ptr+size constructor, but that one doesn't take the Type*.) > +++ lib/AsmParser/LLToken.h (working copy) > @@ -115,6 +115,9 @@ > LocalVar, // %foo %"foo" > StringConstant, // "foo" > > + // Metadata valued tokens. > + Metadata, // !42 !"foo" > > > Does the parser support the !42 syntax? Nope. I changed the example to // !"foo" !{i8 42} > +++ lib/Bitcode/Reader/BitcodeReader.cpp (working copy) > > > + case bitc::CST_CODE_MDSTRING: { > + if (Record.size() < 2) return Error("Invalid MDSTRING record"); > + unsigned MDStringLength = Record.size(); > + char *String = new char[MDStringLength]; > > instead of new[], please use something like: > > SmallString<8> String; > String.resize(MDStringLength); > ... Ooh, SmallString! Done deal. By the way, SmallString lets me do this: SmallString<8> String(Record.begin(), Record.end()); with no type error. As far as I can tell, this would cause the wrong thing to happen at run time. > + case bitc::CST_CODE_MDNODE: { > + if (Record.empty() || Record.size() % 2 == 1) > + return Error("Invalid CST_MDNODE record"); > + > + unsigned Size = Record.size(); > + std::vector Elts; > > SmallVector plz. Done. > +++ docs/LangRef.html (working copy) > > +empty struct and is identified in syntax by a preceeding exclamation > point > > preceeding -> preceding Doh. Fixed. > After reading through the patch, I completely agree that introducing a > new "metadatatype" is the right direction to go for. > > Please apply with these changes, Will do as soon as my nightly comes back clean! Nick From nicholas at mxc.ca Sat Apr 4 02:20:44 2009 From: nicholas at mxc.ca (Nick Lewycky) Date: Sat, 04 Apr 2009 07:20:44 -0000 Subject: [llvm-commits] [llvm] r68419 - /llvm/trunk/test/CodeGen/X86/dagcombine-buildvector.ll Message-ID: <200904040720.n347KiUZ028208@zion.cs.uiuc.edu> Author: nicholas Date: Sat Apr 4 02:20:43 2009 New Revision: 68419 URL: http://llvm.org/viewvc/llvm-project?rev=68419&view=rev Log: Fix test on non-x86 platforms. Modified: llvm/trunk/test/CodeGen/X86/dagcombine-buildvector.ll Modified: llvm/trunk/test/CodeGen/X86/dagcombine-buildvector.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dagcombine-buildvector.ll?rev=68419&r1=68418&r2=68419&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/dagcombine-buildvector.ll (original) +++ llvm/trunk/test/CodeGen/X86/dagcombine-buildvector.ll Sat Apr 4 02:20:43 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -o %t -f +; RUN: llvm-as < %s | llc -march=x86 -mattr=sse -o %t -f ; RUN: grep unpcklpd %t | count 1 ; RUN: grep movapd %t | count 1 From nicholas at mxc.ca Sat Apr 4 02:22:02 2009 From: nicholas at mxc.ca (Nick Lewycky) Date: Sat, 04 Apr 2009 07:22:02 -0000 Subject: [llvm-commits] [llvm] r68420 - in /llvm/trunk: docs/LangRef.html include/llvm/Bitcode/LLVMBitCodes.h include/llvm/Constants.h include/llvm/Type.h include/llvm/Value.h lib/AsmParser/LLLexer.cpp lib/AsmParser/LLParser.cpp lib/AsmParser/LLParser.h lib/AsmParser/LLToken.h lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Writer/BitcodeWriter.cpp lib/VMCore/AsmWriter.cpp lib/VMCore/Constants.cpp lib/VMCore/Type.cpp lib/VMCore/Verifier.cpp test/Feature/embeddedmetadata.ll unittests/VMCore/MetadataTest.cpp Message-ID: <200904040722.n347M26t028284@zion.cs.uiuc.edu> Author: nicholas Date: Sat Apr 4 02:22:01 2009 New Revision: 68420 URL: http://llvm.org/viewvc/llvm-project?rev=68420&view=rev Log: Add support for embedded metadata to LLVM. This introduces two new types of Constant, MDString and MDNode which can only be used by globals with a name that starts with "llvm." or as arguments to a function with the same naming restriction. Added: llvm/trunk/test/Feature/embeddedmetadata.ll llvm/trunk/unittests/VMCore/MetadataTest.cpp Modified: llvm/trunk/docs/LangRef.html llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h llvm/trunk/include/llvm/Constants.h llvm/trunk/include/llvm/Type.h llvm/trunk/include/llvm/Value.h llvm/trunk/lib/AsmParser/LLLexer.cpp llvm/trunk/lib/AsmParser/LLParser.cpp llvm/trunk/lib/AsmParser/LLParser.h llvm/trunk/lib/AsmParser/LLToken.h llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp llvm/trunk/lib/VMCore/AsmWriter.cpp llvm/trunk/lib/VMCore/Constants.cpp llvm/trunk/lib/VMCore/Type.cpp llvm/trunk/lib/VMCore/Verifier.cpp Modified: llvm/trunk/docs/LangRef.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=68420&r1=68419&r2=68420&view=diff ============================================================================== --- llvm/trunk/docs/LangRef.html (original) +++ llvm/trunk/docs/LangRef.html Sat Apr 4 02:22:01 2009 @@ -65,6 +65,7 @@
    6. Global Variable and Function Addresses
    7. Undefined Values
    8. Constant Expressions
      9. +
    9. Embedded Metadata
  5. Other Values @@ -1847,6 +1848,14 @@ large arrays) and is always exactly equivalent to using explicit zero initializers. + +
    Metadata node
    + +
    A metadata node is a structure-like constant with the type of an empty + struct. For example: "{ } !{ i32 0, { } !"test" }". Unlike other + constants that are meant to be interpreted as part of the instruction stream, + metadata is a place to attach additional information such as debug info. +
    @@ -2015,6 +2024,35 @@ + +
    Embedded Metadata +
    + +
    + +

    Embedded metadata provides a way to attach arbitrary data to the +instruction stream without affecting the behaviour of the program. There are +two metadata primitives, strings and nodes. All metadata has the type of an +empty struct and is identified in syntax by a preceding exclamation point +('!'). +

    + +

    A metadata string is a string surrounded by double quotes. It can contain +any character by escaping non-printable characters with "\xx" where "xx" is +the two digit hex code. For example: "!"test\00"". +

    + +

    Metadata nodes are represented with notation similar to structure constants +(a comma separated list of elements, surrounded by braces and preceeded by an +exclamation point). For example: "!{ { } !"test\00", i32 10}". +

    + +

    Optimizations may rely on metadata to provide additional information about +the program that isn't available in the instructions, or that isn't easily +computable. Similarly, the code generator may expect a certain metadata format +to be used to express debugging information.

    +
    +
    Other Values
    Modified: llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h?rev=68420&r1=68419&r2=68420&view=diff ============================================================================== --- llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h (original) +++ llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h Sat Apr 4 02:22:01 2009 @@ -126,7 +126,9 @@ CST_CODE_CE_SHUFFLEVEC = 16, // CE_SHUFFLEVEC: [opval, opval, opval] CST_CODE_CE_CMP = 17, // CE_CMP: [opty, opval, opval, pred] CST_CODE_INLINEASM = 18, // INLINEASM: [sideeffect,asmstr,conststr] - CST_CODE_CE_SHUFVEC_EX = 19 // SHUFVEC_EX: [opty, opval, opval, opval] + CST_CODE_CE_SHUFVEC_EX = 19, // SHUFVEC_EX: [opty, opval, opval, opval] + CST_CODE_MDSTRING = 20, // MDSTRING: [values] + CST_CODE_MDNODE = 21 // MDNODE: [n x (type num, value num)] }; /// CastOpcodes - These are values used in the bitcode files to encode which Modified: llvm/trunk/include/llvm/Constants.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constants.h?rev=68420&r1=68419&r2=68420&view=diff ============================================================================== --- llvm/trunk/include/llvm/Constants.h (original) +++ llvm/trunk/include/llvm/Constants.h Sat Apr 4 02:22:01 2009 @@ -26,6 +26,7 @@ #include "llvm/OperandTraits.h" #include "llvm/ADT/APInt.h" #include "llvm/ADT/APFloat.h" +#include "llvm/ADT/FoldingSet.h" #include "llvm/ADT/SmallVector.h" namespace llvm { @@ -813,6 +814,109 @@ } }; +//===----------------------------------------------------------------------===// +/// MDString - a single uniqued string. +/// These are used to efficiently contain a byte sequence for metadata. +/// +class MDString : public Constant { + MDString(const MDString &); // DO NOT IMPLEMENT + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT + MDString(const char *begin, const char *end); + + const char *StrBegin, *StrEnd; +protected: + // allocate space for exactly zero operands + void *operator new(size_t s) { + return User::operator new(s, 0); + } +public: + /// get() - Static factory methods - Return objects of the specified value. + /// + static MDString *get(const char *StrBegin, const char *StrEnd); + + /// size() - The length of this string. + /// + unsigned size() const { return StrEnd - StrBegin; } + + /// begin() - Pointer to the first byte of the string. + /// + const char *begin() const { return StrBegin; } + + /// end() - Pointer to one byte past the end of the string. + /// + const char *end() const { return StrEnd; } + + /// getType() specialization - Type is always an empty struct. + /// + inline const Type *getType() const { + return Type::EmptyStructTy; + } + + /// isNullValue - Return true if this is the value that would be returned by + /// getNullValue. This always returns false because getNullValue will never + /// produce metadata. + virtual bool isNullValue() const { + return false; + } + + virtual void destroyConstant(); + + /// Methods for support type inquiry through isa, cast, and dyn_cast: + static inline bool classof(const MDString *) { return true; } + static bool classof(const Value *V) { + return V->getValueID() == MDStringVal; + } +}; + +//===----------------------------------------------------------------------===// +/// MDNode - a tuple of other values. +/// These contain a list of the Constants that represent the metadata. +/// +class MDNode : public Constant, public FoldingSetNode { + MDNode(const MDNode &); // DO NOT IMPLEMENT +protected: + explicit MDNode(Constant*const* Vals, unsigned NumVals); +public: + /// get() - Static factory methods - Return objects of the specified value. + /// + static MDNode *get(Constant*const* Vals, unsigned NumVals); + + // Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Constant); + + /// getType() specialization - Type is always an empty struct. + /// + inline const Type *getType() const { + return Type::EmptyStructTy; + } + + /// isNullValue - Return true if this is the value that would be returned by + /// getNullValue. This always returns false because getNullValue will never + /// produce metadata. + virtual bool isNullValue() const { + return false; + } + + /// Profile - calculate a unique identifier for this MDNode to collapse + /// duplicates + void Profile(FoldingSetNodeID &ID); + + virtual void destroyConstant(); + virtual void replaceUsesOfWithOnConstant(Value *From, Value *To, Use *U); + + /// Methods for support type inquiry through isa, cast, and dyn_cast: + static inline bool classof(const MDNode *) { return true; } + static bool classof(const Value *V) { + return V->getValueID() == MDNodeVal; + } +}; + +template <> +struct OperandTraits : VariadicOperandTraits<> { +}; + +DEFINE_TRANSPARENT_CASTED_OPERAND_ACCESSORS(MDNode, Constant) + } // End llvm namespace #endif Modified: llvm/trunk/include/llvm/Type.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Type.h?rev=68420&r1=68419&r2=68420&view=diff ============================================================================== --- llvm/trunk/include/llvm/Type.h (original) +++ llvm/trunk/include/llvm/Type.h Sat Apr 4 02:22:01 2009 @@ -326,7 +326,7 @@ //===--------------------------------------------------------------------===// // These are the builtin types that are always available... // - static const Type *VoidTy, *LabelTy, *FloatTy, *DoubleTy; + static const Type *VoidTy, *LabelTy, *FloatTy, *DoubleTy, *EmptyStructTy; static const Type *X86_FP80Ty, *FP128Ty, *PPC_FP128Ty; static const IntegerType *Int1Ty, *Int8Ty, *Int16Ty, *Int32Ty, *Int64Ty; Modified: llvm/trunk/include/llvm/Value.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Value.h?rev=68420&r1=68419&r2=68420&view=diff ============================================================================== --- llvm/trunk/include/llvm/Value.h (original) +++ llvm/trunk/include/llvm/Value.h Sat Apr 4 02:22:01 2009 @@ -203,13 +203,15 @@ ConstantStructVal, // This is an instance of ConstantStruct ConstantVectorVal, // This is an instance of ConstantVector ConstantPointerNullVal, // This is an instance of ConstantPointerNull + MDStringVal, // This is an instance of MDString + MDNodeVal, // This is an instance of MDNode InlineAsmVal, // This is an instance of InlineAsm PseudoSourceValueVal, // This is an instance of PseudoSourceValue InstructionVal, // This is an instance of Instruction // Markers: ConstantFirstVal = FunctionVal, - ConstantLastVal = ConstantPointerNullVal + ConstantLastVal = MDNodeVal }; /// getValueID - Return an ID for the concrete type of this object. This is Modified: llvm/trunk/lib/AsmParser/LLLexer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLLexer.cpp?rev=68420&r1=68419&r2=68420&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/LLLexer.cpp (original) +++ llvm/trunk/lib/AsmParser/LLLexer.cpp Sat Apr 4 02:22:01 2009 @@ -265,6 +265,7 @@ case ';': SkipLineComment(); return LexToken(); + case '!': return lltok::Metadata; case '0': case '1': case '2': case '3': case '4': case '5': case '6': case '7': case '8': case '9': case '-': Modified: llvm/trunk/lib/AsmParser/LLParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.cpp?rev=68420&r1=68419&r2=68420&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/LLParser.cpp (original) +++ llvm/trunk/lib/AsmParser/LLParser.cpp Sat Apr 4 02:22:01 2009 @@ -1561,6 +1561,29 @@ ID.StrVal = Lex.getStrVal(); ID.Kind = ValID::t_LocalName; break; + case lltok::Metadata: { // !{...} MDNode, !"foo" MDString + ID.Kind = ValID::t_Constant; + Lex.Lex(); + if (Lex.getKind() == lltok::lbrace) { + // MDNode: + // ::= '!' '{' TypeAndValue (',' TypeAndValue)* '}' + SmallVector Elts; + if (ParseMDNodeVector(Elts) || + ParseToken(lltok::rbrace, "expected end of metadata node")) + return true; + + ID.ConstantVal = MDNode::get(&Elts[0], Elts.size()); + return false; + } + + // MDString: + // ::= '!' STRINGCONSTANT + std::string Str; + if (ParseStringConstant(Str)) return true; + + ID.ConstantVal = MDString::get(Str.data(), Str.data() + Str.size()); + return false; + } case lltok::APSInt: ID.APSIntVal = Lex.getAPSIntVal(); ID.Kind = ValID::t_APSInt; @@ -1661,7 +1684,7 @@ "array element #" + utostr(i) + " is not of type '" +Elts[0]->getType()->getDescription()); } - + ID.ConstantVal = ConstantArray::get(ATy, &Elts[0], Elts.size()); ID.Kind = ValID::t_Constant; return false; @@ -3221,3 +3244,21 @@ Inst = InsertValueInst::Create(Val0, Val1, Indices.begin(), Indices.end()); return false; } + +//===----------------------------------------------------------------------===// +// Embedded metadata. +//===----------------------------------------------------------------------===// + +/// ParseMDNodeVector +/// ::= TypeAndValue (',' TypeAndValue)* +bool LLParser::ParseMDNodeVector(SmallVectorImpl &Elts) { + assert(Lex.getKind() == lltok::lbrace); + Lex.Lex(); + do { + Constant *C; + if (ParseGlobalTypeAndValue(C)) return true; + Elts.push_back(C); + } while (EatIfPresent(lltok::comma)); + + return false; +} Modified: llvm/trunk/lib/AsmParser/LLParser.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.h?rev=68420&r1=68419&r2=68420&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/LLParser.h (original) +++ llvm/trunk/lib/AsmParser/LLParser.h Sat Apr 4 02:22:01 2009 @@ -27,6 +27,8 @@ class Instruction; class Constant; class GlobalValue; + class MDString; + class MDNode; struct ValID; class LLParser { @@ -156,6 +158,7 @@ bool ParseGlobalValue(const Type *Ty, Constant *&V); bool ParseGlobalTypeAndValue(Constant *&V); bool ParseGlobalValueVector(SmallVectorImpl &Elts); + bool ParseMDNodeVector(SmallVectorImpl &); // Function Semantic Analysis. Modified: llvm/trunk/lib/AsmParser/LLToken.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLToken.h?rev=68420&r1=68419&r2=68420&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/LLToken.h (original) +++ llvm/trunk/lib/AsmParser/LLToken.h Sat Apr 4 02:22:01 2009 @@ -115,6 +115,9 @@ LocalVar, // %foo %"foo" StringConstant, // "foo" + // Metadata valued tokens. + Metadata, // !"foo" !{i8 42} + // Type valued tokens (TyVal). Type, Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=68420&r1=68419&r2=68420&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Sat Apr 4 02:22:01 2009 @@ -286,10 +286,12 @@ UserCS->getType()->isPacked()); } else if (isa(UserC)) { NewC = ConstantVector::get(&NewOps[0], NewOps.size()); - } else { - // Must be a constant expression. + } else if (isa(UserC)) { NewC = cast(UserC)->getWithOperands(&NewOps[0], NewOps.size()); + } else { + assert(isa(UserC) && "Must be a metadata node."); + NewC = MDNode::get(&NewOps[0], NewOps.size()); } UserC->replaceAllUsesWith(NewC); @@ -999,6 +1001,29 @@ AsmStr, ConstrStr, HasSideEffects); break; } + case bitc::CST_CODE_MDSTRING: { + if (Record.size() < 2) return Error("Invalid MDSTRING record"); + unsigned MDStringLength = Record.size(); + SmallString<8> String; + String.resize(MDStringLength); + for (unsigned i = 0; i != MDStringLength; ++i) + String[i] = Record[i]; + V = MDString::get(String.c_str(), String.c_str() + MDStringLength); + break; + } + case bitc::CST_CODE_MDNODE: { + if (Record.empty() || Record.size() % 2 == 1) + return Error("Invalid CST_MDNODE record"); + + unsigned Size = Record.size(); + SmallVector Elts; + for (unsigned i = 0; i != Size; i += 2) { + const Type *Ty = getTypeByID(Record[i], false); + Elts.push_back(ValueList.getConstantFwdRef(Record[i+1], Ty)); + } + V = MDNode::get(&Elts[0], Elts.size()); + break; + } } ValueList.AssignValue(V, NextCstNo); Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=68420&r1=68419&r2=68420&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Sat Apr 4 02:22:01 2009 @@ -458,6 +458,8 @@ unsigned String8Abbrev = 0; unsigned CString7Abbrev = 0; unsigned CString6Abbrev = 0; + unsigned MDString8Abbrev = 0; + unsigned MDString6Abbrev = 0; // If this is a constant pool for the module, emit module-specific abbrevs. if (isGlobal) { // Abbrev for CST_CODE_AGGREGATE. @@ -485,6 +487,19 @@ Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Char6)); CString6Abbrev = Stream.EmitAbbrev(Abbv); + + // Abbrev for CST_CODE_MDSTRING. + Abbv = new BitCodeAbbrev(); + Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_MDSTRING)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 8)); + MDString8Abbrev = Stream.EmitAbbrev(Abbv); + // Abbrev for CST_CODE_MDSTRING. + Abbv = new BitCodeAbbrev(); + Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_MDSTRING)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Char6)); + MDString6Abbrev = Stream.EmitAbbrev(Abbv); } SmallVector Record; @@ -678,6 +693,22 @@ Record.push_back(CE->getPredicate()); break; } + } else if (const MDString *S = dyn_cast(C)) { + Code = bitc::CST_CODE_MDSTRING; + AbbrevToUse = MDString6Abbrev; + for (unsigned i = 0, e = S->size(); i != e; ++i) { + char V = S->begin()[i]; + Record.push_back(V); + + if (!BitCodeAbbrevOp::isChar6(V)) + AbbrevToUse = MDString8Abbrev; + } + } else if (const MDNode *N = dyn_cast(C)) { + Code = bitc::CST_CODE_MDNODE; + for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { + Record.push_back(VE.getTypeID(N->getOperand(i)->getType())); + Record.push_back(VE.getValueID(N->getOperand(i))); + } } else { assert(0 && "Unknown constant!"); } Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AsmWriter.cpp?rev=68420&r1=68419&r2=68420&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/AsmWriter.cpp (original) +++ llvm/trunk/lib/VMCore/AsmWriter.cpp Sat Apr 4 02:22:01 2009 @@ -23,6 +23,7 @@ #include "llvm/InlineAsm.h" #include "llvm/Instruction.h" #include "llvm/Instructions.h" +#include "llvm/Metadata.h" #include "llvm/Module.h" #include "llvm/ValueSymbolTable.h" #include "llvm/TypeSymbolTable.h" @@ -361,8 +362,8 @@ return; // If this is a structure or opaque type, add a name for the type. - if ((isa(Ty) || isa(Ty)) - && !TP.hasTypeName(Ty)) { + if (((isa(Ty) && cast(Ty)->getNumElements()) + || isa(Ty)) && !TP.hasTypeName(Ty)) { TP.addTypeName(Ty, "%"+utostr(unsigned(NumberedTypes.size()))); NumberedTypes.push_back(Ty); } @@ -935,7 +936,27 @@ Out << "undef"; return; } + + if (const MDString *S = dyn_cast(CV)) { + Out << "!\""; + PrintEscapedString(S->begin(), S->size(), Out); + Out << '"'; + return; + } + if (const MDNode *N = dyn_cast(CV)) { + Out << "!{"; + for (MDNode::const_op_iterator I = N->op_begin(), E = N->op_end(); I != E;){ + TypePrinter.print((*I)->getType(), Out); + Out << ' '; + WriteAsOperandInternal(Out, *I, TypePrinter, Machine); + if (++I != E) + Out << ", "; + } + Out << "}"; + return; + } + if (const ConstantExpr *CE = dyn_cast(CV)) { Out << CE->getOpcodeName(); if (CE->isCompare()) Modified: llvm/trunk/lib/VMCore/Constants.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=68420&r1=68419&r2=68420&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Constants.cpp (original) +++ llvm/trunk/lib/VMCore/Constants.cpp Sat Apr 4 02:22:01 2009 @@ -17,7 +17,9 @@ #include "llvm/GlobalValue.h" #include "llvm/Instructions.h" #include "llvm/Module.h" +#include "llvm/ADT/FoldingSet.h" #include "llvm/ADT/StringExtras.h" +#include "llvm/ADT/StringMap.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ManagedStatic.h" @@ -1657,6 +1659,63 @@ destroyConstantImpl(); } +//---- MDString::get() implementation +// + +MDString::MDString(const char *begin, const char *end) + : Constant(Type::EmptyStructTy, MDStringVal, 0, 0), + StrBegin(begin), StrEnd(end) {} + +static ManagedStatic > MDStringCache; + +MDString *MDString::get(const char *StrBegin, const char *StrEnd) { + StringMapEntry &Entry = MDStringCache->GetOrCreateValue(StrBegin, + StrEnd); + MDString *&S = Entry.getValue(); + if (!S) S = new MDString(Entry.getKeyData(), + Entry.getKeyData() + Entry.getKeyLength()); + return S; +} + +void MDString::destroyConstant() { + MDStringCache->erase(MDStringCache->find(StrBegin, StrEnd)); + destroyConstantImpl(); +} + +//---- MDNode::get() implementation +// + +static ManagedStatic > MDNodeSet; + +MDNode::MDNode(Constant*const* Vals, unsigned NumVals) + : Constant(Type::EmptyStructTy, MDNodeVal, + OperandTraits::op_end(this) - NumVals, NumVals) { + std::copy(Vals, Vals + NumVals, OperandList); +} + +void MDNode::Profile(FoldingSetNodeID &ID) { + for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) + ID.AddPointer(*I); +} + +MDNode *MDNode::get(Constant*const* Vals, unsigned NumVals) { + FoldingSetNodeID ID; + for (unsigned i = 0; i != NumVals; ++i) + ID.AddPointer(Vals[i]); + + void *InsertPoint; + if (MDNode *N = MDNodeSet->FindNodeOrInsertPos(ID, InsertPoint)) + return N; + + // InsertPoint will have been set by the FindNodeOrInsertPos call. + MDNode *N = new(NumVals) MDNode(Vals, NumVals); + MDNodeSet->InsertNode(N, InsertPoint); + return N; +} + +void MDNode::destroyConstant() { + destroyConstantImpl(); +} //---- ConstantExpr::get() implementations... // @@ -2741,3 +2800,24 @@ // Delete the old constant! destroyConstant(); } + +void MDNode::replaceUsesOfWithOnConstant(Value *From, Value *To, Use *U) { + assert(isa(To) && "Cannot make Constant refer to non-constant!"); + + SmallVector Values; + Values.reserve(getNumOperands()); // Build replacement array... + for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { + Constant *Val = getOperand(i); + if (Val == From) Val = cast(To); + Values.push_back(Val); + } + + Constant *Replacement = MDNode::get(&Values[0], Values.size()); + assert(Replacement != this && "I didn't contain From!"); + + // Everyone using this now uses the replacement. + uncheckedReplaceAllUsesWith(Replacement); + + // Delete the old constant! + destroyConstant(); +} Modified: llvm/trunk/lib/VMCore/Type.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Type.cpp?rev=68420&r1=68419&r2=68420&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Type.cpp (original) +++ llvm/trunk/lib/VMCore/Type.cpp Sat Apr 4 02:22:01 2009 @@ -288,6 +288,8 @@ const IntegerType *Type::Int32Ty = new BuiltinIntegerType(32); const IntegerType *Type::Int64Ty = new BuiltinIntegerType(64); +const Type *Type::EmptyStructTy = StructType::get(NULL, NULL); + //===----------------------------------------------------------------------===// // Derived Type Constructors Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=68420&r1=68419&r2=68420&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Sat Apr 4 02:22:01 2009 @@ -338,6 +338,36 @@ #define Assert4(C, M, V1, V2, V3, V4) \ do { if (!(C)) { CheckFailed(M, V1, V2, V3, V4); return; } } while (0) +/// Check whether or not a Value is metadata or made up of a constant +/// expression involving metadata. +static bool isMetadata(Value *X) { + SmallPtrSet Visited; + SmallVector Queue; + Queue.push_back(X); + + while (!Queue.empty()) { + Value *V = Queue.back(); + Queue.pop_back(); + if (!Visited.insert(V)) + continue; + + if (isa(V) || isa(V)) + return true; + if (!isa(V)) + continue; + ConstantExpr *CE = cast(V); + + if (CE->getType() != Type::EmptyStructTy) + continue; + + // The only constant expression that works on metadata type is select. + if (CE->getOpcode() != Instruction::Select) return false; + + Queue.push_back(CE->getOperand(1)); + Queue.push_back(CE->getOperand(2)); + } + return false; +} void Verifier::visit(Instruction &I) { for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) @@ -649,6 +679,7 @@ "Found return instr that returns non-void in Function of void " "return type!", &RI, F->getReturnType()); else if (N == 1 && F->getReturnType() == RI.getOperand(0)->getType()) { + Assert1(!isMetadata(RI.getOperand(0)), "Invalid use of metadata!", &RI); // Exactly one return value and it matches the return type. Good. } else if (const StructType *STy = dyn_cast(F->getReturnType())) { // The return type is a struct; check for multiple return values. @@ -696,6 +727,8 @@ Assert1(SI.getTrueValue()->getType() == SI.getType(), "Select values must have same type as select instruction!", &SI); + Assert1(!isMetadata(SI.getOperand(1)) && !isMetadata(SI.getOperand(2)), + "Invalid use of metadata!", &SI); visitInstruction(SI); } @@ -951,6 +984,13 @@ Assert1(PN.getType() == PN.getIncomingValue(i)->getType(), "PHI node operands are not the same type as the result!", &PN); + // Check that it's not a PHI of metadata. + if (PN.getType() == Type::EmptyStructTy) { + for (unsigned i = 0, e = PN.getNumIncomingValues(); i != e; ++i) + Assert1(!isMetadata(PN.getIncomingValue(i)), + "Invalid use of metadata!", &PN); + } + // All other PHI node constraints are checked in the visitBasicBlock method. visitInstruction(PN); @@ -981,6 +1021,14 @@ "Call parameter type does not match function signature!", CS.getArgument(i), FTy->getParamType(i), I); + if (CS.getCalledValue()->getNameLen() < 5 || + strncmp(CS.getCalledValue()->getNameStart(), "llvm.", 5) != 0) { + // Verify that none of the arguments are metadata... + for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i) + Assert2(!isMetadata(CS.getArgument(i)), "Invalid use of metadata!", + CS.getArgument(i), I); + } + const AttrListPtr &Attrs = CS.getAttributes(); Assert1(VerifyAttributeCount(Attrs, CS.arg_size()), @@ -1152,6 +1200,7 @@ cast(SI.getOperand(1)->getType())->getElementType(); Assert2(ElTy == SI.getOperand(0)->getType(), "Stored value type does not match pointer operand type!", &SI, ElTy); + Assert1(!isMetadata(SI.getOperand(0)), "Invalid use of metadata!", &SI); visitInstruction(SI); } @@ -1481,7 +1530,7 @@ if (EltTy != Ty) Suffix += "v" + utostr(NumElts); - Suffix += "i" + utostr(GotBits);; + Suffix += "i" + utostr(GotBits); // Check some constraints on various intrinsics. switch (ID) { Added: llvm/trunk/test/Feature/embeddedmetadata.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Feature/embeddedmetadata.ll?rev=68420&view=auto ============================================================================== --- llvm/trunk/test/Feature/embeddedmetadata.ll (added) +++ llvm/trunk/test/Feature/embeddedmetadata.ll Sat Apr 4 02:22:01 2009 @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llvm-dis | not grep undef + +declare i8 @llvm.something({ } %a) + + at llvm.foo = internal constant { } !{i17 123, { } !"foobar"} + +define void @foo() { + %x = call i8 @llvm.something({ } !{{ } !"f\00oa", i42 123}) + ret void +} + Added: llvm/trunk/unittests/VMCore/MetadataTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/VMCore/MetadataTest.cpp?rev=68420&view=auto ============================================================================== --- llvm/trunk/unittests/VMCore/MetadataTest.cpp (added) +++ llvm/trunk/unittests/VMCore/MetadataTest.cpp Sat Apr 4 02:22:01 2009 @@ -0,0 +1,96 @@ +//===- llvm/unittest/VMCore/Metadata.cpp - Metadata unit tests ------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "gtest/gtest.h" +#include "llvm/Constants.h" +#include + +using namespace llvm; + +namespace { + +// Test that construction of MDString with different value produces different +// MDString objects, even with the same string pointer and nulls in the string. +TEST(MDStringTest, CreateDifferent) { + char x[3] = { 'f', 0, 'A' }; + MDString *s1 = MDString::get(&x[0], &x[3]); + x[2] = 'B'; + MDString *s2 = MDString::get(&x[0], &x[3]); + EXPECT_NE(s1, s2); +} + +// Test that creation of MDStrings with the same string contents produces the +// same MDString object, even with different pointers. +TEST(MDStringTest, CreateSame) { + char x[4] = { 'a', 'b', 'c', 'X' }; + char y[4] = { 'a', 'b', 'c', 'Y' }; + + MDString *s1 = MDString::get(&x[0], &x[3]); + MDString *s2 = MDString::get(&y[0], &y[3]); + EXPECT_EQ(s1, s2); +} + +// Test that MDString prints out the string we fed it. +TEST(MDStringTest, PrintingSimple) { + char *str = new char[13]; + strncpy(str, "testing 1 2 3", 13); + MDString *s = MDString::get(str, str+13); + strncpy(str, "aaaaaaaaaaaaa", 13); + delete[] str; + + std::ostringstream oss; + s->print(oss); + EXPECT_STREQ("{ } !\"testing 1 2 3\"", oss.str().c_str()); +} + +// Test printing of MDString with non-printable characters. +TEST(MDStringTest, PrintingComplex) { + char str[5] = {0, '\n', '"', '\\', -1}; + MDString *s = MDString::get(str+0, str+5); + std::ostringstream oss; + s->print(oss); + EXPECT_STREQ("{ } !\"\\00\\0A\\22\\5C\\FF\"", oss.str().c_str()); +} + +// Test the two constructors, and containing other Constants. +TEST(MDNodeTest, Everything) { + char x[3] = { 'a', 'b', 'c' }; + char y[3] = { '1', '2', '3' }; + + MDString *s1 = MDString::get(&x[0], &x[3]); + MDString *s2 = MDString::get(&y[0], &y[3]); + ConstantInt *CI = ConstantInt::get(APInt(8, 0)); + + std::vector V; + V.push_back(s1); + V.push_back(CI); + V.push_back(s2); + + MDNode *n1 = MDNode::get(&V[0], 3); + MDNode *n2 = MDNode::get((Constant**)&n1, 1); + MDNode *n3 = MDNode::get(&V[0], 3); + EXPECT_NE(n1, n2); + EXPECT_EQ(n1, n3); + + EXPECT_EQ(3u, n1->getNumOperands()); + EXPECT_EQ(s1, n1->getOperand(0)); + EXPECT_EQ(CI, n1->getOperand(1)); + EXPECT_EQ(s2, n1->getOperand(2)); + + EXPECT_EQ(1u, n2->getNumOperands()); + EXPECT_EQ(n1, n2->getOperand(0)); + + std::ostringstream oss1, oss2; + n1->print(oss1); + n2->print(oss2); + EXPECT_STREQ("{ } !{{ } !\"abc\", i8 0, { } !\"123\"}", oss1.str().c_str()); + EXPECT_STREQ("{ } !{{ } !{{ } !\"abc\", i8 0, { } !\"123\"}}", + oss2.str().c_str()); +} +} From nicholas at mxc.ca Sat Apr 4 02:42:49 2009 From: nicholas at mxc.ca (Nick Lewycky) Date: Sat, 04 Apr 2009 07:42:49 -0000 Subject: [llvm-commits] [llvm] r68421 - /llvm/trunk/lib/VMCore/AsmWriter.cpp Message-ID: <200904040742.n347gnMj030404@zion.cs.uiuc.edu> Author: nicholas Date: Sat Apr 4 02:42:46 2009 New Revision: 68421 URL: http://llvm.org/viewvc/llvm-project?rev=68421&view=rev Log: Remove bogus include. Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AsmWriter.cpp?rev=68421&r1=68420&r2=68421&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/AsmWriter.cpp (original) +++ llvm/trunk/lib/VMCore/AsmWriter.cpp Sat Apr 4 02:42:46 2009 @@ -23,7 +23,6 @@ #include "llvm/InlineAsm.h" #include "llvm/Instruction.h" #include "llvm/Instructions.h" -#include "llvm/Metadata.h" #include "llvm/Module.h" #include "llvm/ValueSymbolTable.h" #include "llvm/TypeSymbolTable.h" From nicholas at mxc.ca Sat Apr 4 04:39:36 2009 From: nicholas at mxc.ca (Nick Lewycky) Date: Sat, 04 Apr 2009 09:39:36 -0000 Subject: [llvm-commits] [llvm] r68422 - /llvm/trunk/tools/bugpoint/CrashDebugger.cpp Message-ID: <200904040939.n349dbL8012093@zion.cs.uiuc.edu> Author: nicholas Date: Sat Apr 4 04:39:23 2009 New Revision: 68422 URL: http://llvm.org/viewvc/llvm-project?rev=68422&view=rev Log: CloneModule stores the BasicBlock mapping in ValueMap. There's no need to recompute it. This fixes a O(n^2) in number of blocks when reducing a crash. Modified: llvm/trunk/tools/bugpoint/CrashDebugger.cpp Modified: llvm/trunk/tools/bugpoint/CrashDebugger.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/CrashDebugger.cpp?rev=68422&r1=68421&r2=68422&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/CrashDebugger.cpp (original) +++ llvm/trunk/tools/bugpoint/CrashDebugger.cpp Sat Apr 4 04:39:23 2009 @@ -21,6 +21,7 @@ #include "llvm/Pass.h" #include "llvm/PassManager.h" #include "llvm/ValueSymbolTable.h" +#include "llvm/ADT/SmallPtrSet.h" #include "llvm/Analysis/Verifier.h" #include "llvm/Support/CFG.h" #include "llvm/Transforms/Scalar.h" @@ -267,21 +268,9 @@ Module *M = CloneModule(BD.getProgram(), ValueMap); // Convert list to set for fast lookup... - std::set Blocks; - for (unsigned i = 0, e = BBs.size(); i != e; ++i) { - // Convert the basic block from the original module to the new module... - const Function *F = BBs[i]->getParent(); - Function *CMF = cast(ValueMap[F]); - assert(CMF && "Function not in module?!"); - assert(CMF->getFunctionType() == F->getFunctionType() && "wrong type?"); - assert(CMF->getName() == F->getName() && "wrong name?"); - - // Get the mapped basic block... - Function::iterator CBI = CMF->begin(); - std::advance(CBI, std::distance(F->begin(), - Function::const_iterator(BBs[i]))); - Blocks.insert(CBI); - } + SmallPtrSet Blocks; + for (unsigned i = 0, e = BBs.size(); i != e; ++i) + Blocks.insert(cast(ValueMap[BBs[i]])); std::cout << "Checking for crash with only these blocks:"; unsigned NumPrint = Blocks.size(); @@ -320,8 +309,8 @@ // have to take. std::vector > BlockInfo; - for (std::set::iterator I = Blocks.begin(), E = Blocks.end(); - I != E; ++I) + for (SmallPtrSet::iterator I = Blocks.begin(), + E = Blocks.end(); I != E; ++I) BlockInfo.push_back(std::make_pair((*I)->getParent(), (*I)->getName())); // Now run the CFG simplify pass on the function... From nicholas at mxc.ca Sat Apr 4 05:24:28 2009 From: nicholas at mxc.ca (Nick Lewycky) Date: Sat, 04 Apr 2009 10:24:28 -0000 Subject: [llvm-commits] [llvm] r68423 - /llvm/trunk/test/CodeGen/X86/dagcombine-buildvector.ll Message-ID: <200904041024.n34AOTQ3013340@zion.cs.uiuc.edu> Author: nicholas Date: Sat Apr 4 05:24:24 2009 New Revision: 68423 URL: http://llvm.org/viewvc/llvm-project?rev=68423&view=rev Log: Try SSE2? Modified: llvm/trunk/test/CodeGen/X86/dagcombine-buildvector.ll Modified: llvm/trunk/test/CodeGen/X86/dagcombine-buildvector.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/dagcombine-buildvector.ll?rev=68423&r1=68422&r2=68423&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/dagcombine-buildvector.ll (original) +++ llvm/trunk/test/CodeGen/X86/dagcombine-buildvector.ll Sat Apr 4 05:24:24 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=sse -o %t -f +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f ; RUN: grep unpcklpd %t | count 1 ; RUN: grep movapd %t | count 1 From isanbard at gmail.com Sat Apr 4 17:27:03 2009 From: isanbard at gmail.com (Bill Wendling) Date: Sat, 04 Apr 2009 22:27:03 -0000 Subject: [llvm-commits] [llvm] r68426 - /llvm/trunk/docs/BitCodeFormat.html Message-ID: <200904042227.n34MR3uj009821@zion.cs.uiuc.edu> Author: void Date: Sat Apr 4 17:27:03 2009 New Revision: 68426 URL: http://llvm.org/viewvc/llvm-project?rev=68426&view=rev Log: General clean-up of the bitcode format documentation. Having the paragraphs formatted the same, putting words in tags, adding —s, etc. Modified: llvm/trunk/docs/BitCodeFormat.html Modified: llvm/trunk/docs/BitCodeFormat.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/BitCodeFormat.html?rev=68426&r1=68425&r2=68426&view=diff ============================================================================== --- llvm/trunk/docs/BitCodeFormat.html (original) +++ llvm/trunk/docs/BitCodeFormat.html Sat Apr 4 17:27:03 2009 @@ -180,13 +180,15 @@

    6-bit characters encode common characters into a fixed 6-bit field. They represent the following characters with the following 6-bit values:

    -
      -
    • 'a' .. 'z' - 0 .. 25
      • -
    • 'A' .. 'Z' - 26 .. 51
      • -
    • '0' .. '9' - 52 .. 61
      • -
    • '.' - 62
      • -
    • '_' - 63
      • -
    +
    +
    +'a' .. 'z' —  0 .. 25
+'A' .. 'Z' — 26 .. 51
+'0' .. '9' — 52 .. 61
+       '.' — 62
+       '_' — 63
+
    +

    This encoding is only suitable for encoding characters and strings that consist only of the above characters. It is completely incapable of encoding @@ -226,14 +228,14 @@

      -
    • 0 - END_BLOCK - This abbrev ID marks the end of the - current block.
      • -
    • 1 - ENTER_SUBBLOCK - This abbrev ID marks the - beginning of a new block.
      • -
    • 2 - DEFINE_ABBREV - This defines a new - abbreviation.
      • -
    • 3 - UNABBREV_RECORD - This ID specifies the - definition of an unabbreviated record.
      • +
    • 0 - END_BLOCK — This abbrev ID marks + the end of the current block.
      • +
    • 1 - ENTER_SUBBLOCK — This + abbrev ID marks the beginning of a new block.
      • +
    • 2 - DEFINE_ABBREV — This defines + a new abbreviation.
      • +
    • 3 - UNABBREV_RECORD — This ID + specifies the definition of an unabbreviated record.

    Abbreviation IDs 4 and above are defined by the stream itself, and specify @@ -273,14 +275,17 @@

  6. A set of abbreviations. Abbreviations may be defined within a block, in which case they are only defined in that block (neither subblocks nor enclosing blocks see the abbreviation). Abbreviations can also be defined - inside a BLOCKINFO block, in which case they are - defined in all blocks that match the ID that the BLOCKINFO block is describing. + inside a BLOCKINFO block, in which case + they are defined in all blocks that match the ID that the BLOCKINFO block is + describing.
-

As sub blocks are entered, these properties are saved and the new sub-block -has its own set of abbreviations, and its own abbrev id width. When a sub-block -is popped, the saved values are restored.

+

+As sub blocks are entered, these properties are saved and the new sub-block has +its own set of abbreviations, and its own abbrev id width. When a sub-block is +popped, the saved values are restored. +

@@ -294,14 +299,14 @@ <align32bits>, blocklen32]

-The ENTER_SUBBLOCK abbreviation ID specifies the start of a new block record. -The blockid value is encoded as a 8-bit VBR identifier, and indicates -the type of block being entered (which can be a standard -block or an application-specific block). The -newabbrevlen value is a 4-bit VBR which specifies the -abbrev id width for the sub-block. The blocklen is a 32-bit aligned -value that specifies the size of the subblock, in 32-bit words. This value -allows the reader to skip over the entire block in one jump. +The ENTER_SUBBLOCK abbreviation ID specifies the start of a new block +record. The blockid value is encoded as an 8-bit VBR identifier, and +indicates the type of block being entered, which can be +a standard block or an application-specific block. +The newabbrevlen value is a 4-bit VBR, which specifies the abbrev id +width for the sub-block. The blocklen value is a 32-bit aligned value +that specifies the size of the subblock in 32-bit words. This value allows the +reader to skip over the entire block in one jump.

@@ -315,9 +320,10 @@

[END_BLOCK, <align32bits>]

-The END_BLOCK abbreviation ID specifies the end of the current block record. -Its end is aligned to 32-bits to ensure that the size of the block is an even -multiple of 32-bits.

+The END_BLOCK abbreviation ID specifies the end of the current block +record. Its end is aligned to 32-bits to ensure that the size of the block is +an even multiple of 32-bits. +

@@ -331,11 +337,12 @@

Data records consist of a record code and a number of (up to) 64-bit integer values. The interpretation of the code and values is application specific and -there are multiple different ways to encode a record (with an unabbrev record -or with an abbreviation). In the LLVM IR format, for example, there is a record -which encodes the target triple of a module. The code is MODULE_CODE_TRIPLE, -and the values of the record are the ascii codes for the characters in the -string.

+there are multiple different ways to encode a record (with an unabbrev record or +with an abbreviation). In the LLVM IR format, for example, there is a record +which encodes the target triple of a module. The code is +MODULE_CODE_TRIPLE, and the values of the record are the ASCII codes +for the characters in the string. +

@@ -348,17 +355,21 @@

[UNABBREV_RECORD, codevbr6, numopsvbr6, op0vbr6, op1vbr6, ...]

-

An UNABBREV_RECORD provides a default fallback encoding, which is both -completely general and also extremely inefficient. It can describe an arbitrary -record, by emitting the code and operands as vbrs.

- -

For example, emitting an LLVM IR target triple as an unabbreviated record -requires emitting the UNABBREV_RECORD abbrevid, a vbr6 for the -MODULE_CODE_TRIPLE code, a vbr6 for the length of the string (which is equal to -the number of operands), and a vbr6 for each character. Since there are no -letters with value less than 32, each letter would need to be emitted as at -least a two-part VBR, which means that each letter would require at least 12 -bits. This is not an efficient encoding, but it is fully general.

+

+An UNABBREV_RECORD provides a default fallback encoding, which is both +completely general and extremely inefficient. It can describe an arbitrary +record by emitting the code and operands as vbrs. +

+ +

+For example, emitting an LLVM IR target triple as an unabbreviated record +requires emitting the UNABBREV_RECORD abbrevid, a vbr6 for the +MODULE_CODE_TRIPLE code, a vbr6 for the length of the string, which is +equal to the number of operands, and a vbr6 for each character. Because there +are no letters with values less than 32, each letter would need to be emitted as +at least a two-part VBR, which means that each letter would require at least 12 +bits. This is not an efficient encoding, but it is fully general. +

@@ -370,13 +381,14 @@

[<abbrevid>, fields...]

-

An abbreviated record is a abbreviation id followed by a set of fields that -are encoded according to the abbreviation -definition. This allows records to be encoded significantly more densely -than records encoded with the UNABBREV_RECORD -type, and allows the abbreviation types to be specified in the stream itself, -which allows the files to be completely self describing. The actual encoding -of abbreviations is defined below. +

+An abbreviated record is a abbreviation id followed by a set of fields that are +encoded according to the abbreviation definition. +This allows records to be encoded significantly more densely than records +encoded with the UNABBREV_RECORD type, +and allows the abbreviation types to be specified in the stream itself, which +allows the files to be completely self describing. The actual encoding of +abbreviations is defined below.

@@ -395,7 +407,7 @@

-Abbreviations can be determined dynamically per client, per file. Since the +Abbreviations can be determined dynamically per client, per file. Because the abbreviations are stored in the bitstream itself, different streams of the same format can contain different sets of abbreviations if the specific stream does not need it. As a concrete example, LLVM IR files usually emit an abbreviation @@ -413,33 +425,36 @@

[DEFINE_ABBREV, numabbrevopsvbr5, abbrevop0, abbrevop1, ...]

-

A DEFINE_ABBREV record adds an abbreviation to the list of currently -defined abbreviations in the scope of this block. This definition only -exists inside this immediate block -- it is not visible in subblocks or -enclosing blocks. -Abbreviations are implicitly assigned IDs -sequentially starting from 4 (the first application-defined abbreviation ID). -Any abbreviations defined in a BLOCKINFO record receive IDs first, in order, -followed by any abbreviations defined within the block itself. -Abbreviated data records reference this ID to indicate what abbreviation -they are invoking.

+

+A DEFINE_ABBREV record adds an abbreviation to the list of currently +defined abbreviations in the scope of this block. This definition only exists +inside this immediate block — it is not visible in subblocks or enclosing +blocks. Abbreviations are implicitly assigned IDs sequentially starting from 4 +(the first application-defined abbreviation ID). Any abbreviations defined in a +BLOCKINFO record receive IDs first, in order, followed by any +abbreviations defined within the block itself. Abbreviated data records +reference this ID to indicate what abbreviation they are invoking. +

-

An abbreviation definition consists of the DEFINE_ABBREV abbrevid followed -by a VBR that specifies the number of abbrev operands, then the abbrev +

+An abbreviation definition consists of the DEFINE_ABBREV abbrevid +followed by a VBR that specifies the number of abbrev operands, then the abbrev operands themselves. Abbreviation operands come in three forms. They all start with a single bit that indicates whether the abbrev operand is a literal operand -(when the bit is 1) or an encoding operand (when the bit is 0).

+(when the bit is 1) or an encoding operand (when the bit is 0). +

    -
  1. Literal operands - [11, litvaluevbr8] - -Literal operands specify that the value in the result -is always a single specific value. This specific value is emitted as a vbr8 -after the bit indicating that it is a literal operand.
    2. -
  2. Encoding info without data - [01, encoding3] - - Operand encodings that do not have extra data are just emitted as their code. +
  3. Literal operands — [11, litvaluevbr8] +— Literal operands specify that the value in the result is always a single +specific value. This specific value is emitted as a vbr8 after the bit +indicating that it is a literal operand.
    4. +
  4. Encoding info without data — [01, + encoding3] — Operand encodings that do not have extra + data are just emitted as their code.
    5. -
  5. Encoding info with data - [01, encoding3, -valuevbr5] - Operand encodings that do have extra data are +
  6. Encoding info with data — [01, encoding3, +valuevbr5] — Operand encodings that do have extra data are emitted as their code, followed by the extra data.
@@ -447,53 +462,65 @@

The possible operand encodings are:

-

For example, target triples in LLVM modules are encoded as a record of the +

+For example, target triples in LLVM modules are encoded as a record of the form [TRIPLE, 'a', 'b', 'c', 'd']. Consider if the bitstream emitted -the following abbrev entry:

+the following abbrev entry: +

- +
+
+[0, Fixed, 4]
+[0, Array]
+[0, Char6]
+
+
-

When emitting a record with this abbreviation, the above entry would be -emitted as:

+

+When emitting a record with this abbreviation, the above entry would be emitted +as: +

-

[4abbrevwidth, 24, 4vbr6, - 06, 16, 26, 36]

+
+
+[4abbrevwidth, 24, 4vbr6, 06, 16, 26, 36]
+
+

These values are:

  1. The first value, 4, is the abbreviation ID for this abbreviation.
    2. -
  2. The second value, 2, is the code for TRIPLE in LLVM IR files.
    3. +
  3. The second value, 2, is the code for TRIPLE in LLVM IR files.
  4. The third value, 4, is the length of the array.
    5. -
  5. The rest of the values are the char6 encoded values for "abcd".
    6. +
  6. The rest of the values are the char6 encoded values + for "abcd".
-

With this abbreviation, the triple is emitted with only 37 bits (assuming a +

+With this abbreviation, the triple is emitted with only 37 bits (assuming a abbrev id width of 3). Without the abbreviation, significantly more space would -be required to emit the target triple. Also, since the TRIPLE value is not -emitted as a literal in the abbreviation, the abbreviation can also be used for -any other string value. +be required to emit the target triple. Also, because the TRIPLE value +is not emitted as a literal in the abbreviation, the abbreviation can also be +used for any other string value.

@@ -519,33 +546,38 @@
-

The BLOCKINFO block allows the description of metadata for other blocks. The - currently specified records are:

- - +

+The BLOCKINFO block allows the description of metadata for other +blocks. The currently specified records are: +

+ +
+
+[SETBID (#1), blockid]
+[DEFINE_ABBREV, ...]
+
+

-The SETBID record indicates which block ID is being described. SETBID -records can occur multiple times throughout the block to change which -block ID is being described. There must be a SETBID record prior to -any other records. +The SETBID record indicates which block ID is being +described. SETBID records can occur multiple times throughout the +block to change which block ID is being described. There must be +a SETBID record prior to any other records.

-Standard DEFINE_ABBREV records can occur inside BLOCKINFO blocks, but unlike -their occurrence in normal blocks, the abbreviation is defined for blocks -matching the block ID we are describing, not the BLOCKINFO block itself. -The abbreviations defined in BLOCKINFO blocks receive abbreviation ids -as described in DEFINE_ABBREV. +Standard DEFINE_ABBREV records can occur inside BLOCKINFO +blocks, but unlike their occurrence in normal blocks, the abbreviation is +defined for blocks matching the block ID we are describing, not the +BLOCKINFO block itself. The abbreviations defined +in BLOCKINFO blocks receive abbreviation IDs as described +in DEFINE_ABBREV.

-Note that although the data in BLOCKINFO blocks is described as "metadata," the -abbreviations they contain are essential for parsing records from the -corresponding blocks. It is not safe to skip them. +Note that although the data in BLOCKINFO blocks is described as +"metadata," the abbreviations they contain are essential for parsing records +from the corresponding blocks. It is not safe to skip them.

@@ -556,24 +588,29 @@
-

Bitcode files for LLVM IR may optionally be wrapped in a simple wrapper +

+Bitcode files for LLVM IR may optionally be wrapped in a simple wrapper structure. This structure contains a simple header that indicates the offset and size of the embedded BC file. This allows additional information to be stored alongside the BC file. The structure of this file header is:

-

-[Magic32, Version32, Offset32, - Size32, CPUType32]

+
+
+[Magic32, Version32, Offset32, Size32, CPUType32]
+
+
-

Each of the fields are 32-bit fields stored in little endian form (as with +

+Each of the fields are 32-bit fields stored in little endian form (as with the rest of the bitcode file fields). The Magic number is always 0x0B17C0DE and the version is currently always 0. The Offset field is the offset in bytes to the start of the bitcode stream in the file, and the Size field is a size in bytes of the stream. CPUType is a target-specific value that can be used to encode the CPU of the target. -

+

+
LLVM IR Encoding
@@ -581,12 +618,14 @@
-

LLVM IR is encoded into a bitstream by defining blocks and records. It uses +

+LLVM IR is encoded into a bitstream by defining blocks and records. It uses blocks for things like constant pools, functions, symbol tables, etc. It uses records for things like instructions, global variable descriptors, type descriptions, etc. This document does not describe the set of abbreviations that the writer uses, as these are fully self-described in the file, and the -reader is not allowed to build in any knowledge of this.

+reader is not allowed to build in any knowledge of this. +

@@ -603,9 +642,16 @@ The magic number for LLVM IR files is:

-

[0x04, 0xC4, 0xE4, 0xD4]

+
+
+[0x04, 0xC4, 0xE4, 0xD4]
+
+
-

When combined with the bitcode magic number and viewed as bytes, this is "BC 0xC0DE".

+

+When combined with the bitcode magic number and viewed as bytes, this is +"BC 0xC0DE". +

@@ -618,9 +664,12 @@ Variable Width Integers are an efficient way to encode arbitrary sized unsigned values, but is an extremely inefficient way to encode signed values (as signed values are otherwise treated as maximally large -unsigned values).

+unsigned values). +

-

As such, signed vbr values of a specific width are emitted as follows:

+

+As such, signed vbr values of a specific width are emitted as follows: +

-

With this encoding, small positive and small negative values can both be -emitted efficiently.

+

+With this encoding, small positive and small negative values can both be emitted +efficiently. +

@@ -645,15 +696,21 @@

From isanbard at gmail.com Sat Apr 4 17:36:02 2009 From: isanbard at gmail.com (Bill Wendling) Date: Sat, 04 Apr 2009 22:36:02 -0000 Subject: [llvm-commits] [llvm] r68427 - /llvm/trunk/docs/BitCodeFormat.html Message-ID: <200904042236.n34Ma2B7010363@zion.cs.uiuc.edu> Author: void Date: Sat Apr 4 17:36:02 2009 New Revision: 68427 URL: http://llvm.org/viewvc/llvm-project?rev=68427&view=rev Log: Fix some HTML validation errors. Modified: llvm/trunk/docs/BitCodeFormat.html Modified: llvm/trunk/docs/BitCodeFormat.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/BitCodeFormat.html?rev=68427&r1=68426&r2=68427&view=diff ============================================================================== --- llvm/trunk/docs/BitCodeFormat.html (original) +++ llvm/trunk/docs/BitCodeFormat.html Sat Apr 4 17:36:02 2009 @@ -500,9 +500,10 @@

-
-[4abbrevwidth, 24, 4vbr6, 06, 16, 26, 36]
-
+

+[4abbrevwidth, 24, 4vbr6, 06, +16, 26, 36] +

These values are:

@@ -596,9 +597,10 @@

-
-[Magic32, Version32, Offset32, Size32, CPUType32]
-
+

+[Magic32, Version32, Offset32, +Size32, CPUType32] +

@@ -643,9 +645,9 @@

-
-[0x04, 0xC4, 0xE4, 0xD4]
-
+

+[0x04, 0xC4, 0xE4, 0xD4] +

From ofv at wanadoo.es Sat Apr 4 17:41:07 2009 From: ofv at wanadoo.es (Oscar Fuentes) Date: Sat, 04 Apr 2009 22:41:07 -0000 Subject: [llvm-commits] [llvm] r68428 - in /llvm/trunk: CMakeLists.txt cmake/config-ix.cmake cmake/modules/AddLLVMDefinitions.cmake tools/llvm-config/CMakeLists.txt Message-ID: <200904042241.n34Mf80H010693@zion.cs.uiuc.edu> Author: ofv Date: Sat Apr 4 17:41:07 2009 New Revision: 68428 URL: http://llvm.org/viewvc/llvm-project?rev=68428&view=rev Log: CMake: defines and uses macro add_llvm_definitions for keeping track of compiler parameters explicitly added by the build specification. This macro replaces the cmake built-in `add_definitions'. Detects glibc and defines _GNU_SOURCE accordingly. Resolves bug 3882. Added: llvm/trunk/cmake/modules/AddLLVMDefinitions.cmake Modified: llvm/trunk/CMakeLists.txt llvm/trunk/cmake/config-ix.cmake llvm/trunk/tools/llvm-config/CMakeLists.txt Modified: llvm/trunk/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CMakeLists.txt?rev=68428&r1=68427&r2=68428&view=diff ============================================================================== --- llvm/trunk/CMakeLists.txt (original) +++ llvm/trunk/CMakeLists.txt Sat Apr 4 17:41:07 2009 @@ -74,6 +74,8 @@ "${LLVM_MAIN_SRC_DIR}/cmake/modules" ) +include(AddLLVMDefinitions) + if(WIN32) if(CYGWIN) set(LLVM_ON_WIN32 0) @@ -110,7 +112,7 @@ if( LLVM_ENABLE_PIC ) if( SUPPORTS_FPIC_FLAG ) message(STATUS "Building with -fPIC") - add_definitions(-fPIC) + add_llvm_definitions(-fPIC) else( SUPPORTS_FPIC_FLAG ) message(STATUS "Warning: -fPIC not supported.") endif() @@ -122,8 +124,8 @@ # set(CMAKE_VERBOSE_MAKEFILE true) -add_definitions( -D__STDC_LIMIT_MACROS ) -add_definitions( -D__STDC_CONSTANT_MACROS ) +add_llvm_definitions( -D__STDC_LIMIT_MACROS ) +add_llvm_definitions( -D__STDC_CONSTANT_MACROS ) set(LLVM_PLO_FLAGS "" CACHE STRING "Flags for creating partially linked objects.") @@ -133,7 +135,7 @@ option(LLVM_BUILD_32_BITS "Build 32 bits executables and libraries." OFF) if( LLVM_BUILD_32_BITS ) message(STATUS "Building 32 bits executables and libraries.") - add_definitions( -m32 ) + add_llvm_definitions( -m32 ) list(APPEND CMAKE_EXE_LINKER_FLAGS -m32) list(APPEND CMAKE_SHARED_LINKER_FLAGS -m32) set( LLVM_PLO_FLAGS -melf_i386 ${LLVM_PLO_FLAGS} ) @@ -141,11 +143,11 @@ endif( CMAKE_SIZEOF_VOID_P EQUAL 8 AND NOT WIN32 ) if( MSVC ) - add_definitions( -D_CRT_SECURE_NO_DEPRECATE -D_CRT_SECURE_NO_WARNINGS ) - add_definitions( -D_SCL_SECURE_NO_WARNINGS -DCRT_NONSTDC_NO_WARNINGS ) - add_definitions( -D_SCL_SECURE_NO_DEPRECATE ) - add_definitions( -wd4146 -wd4503 -wd4996 -wd4800 -wd4244 -wd4624 ) - add_definitions( -wd4355 -wd4715 -wd4180 -wd4345 -wd4224 ) + add_llvm_definitions( -D_CRT_SECURE_NO_DEPRECATE -D_CRT_SECURE_NO_WARNINGS ) + add_llvm_definitions( -D_SCL_SECURE_NO_WARNINGS -DCRT_NONSTDC_NO_WARNINGS ) + add_llvm_definitions( -D_SCL_SECURE_NO_DEPRECATE ) + add_llvm_definitions( -wd4146 -wd4503 -wd4996 -wd4800 -wd4244 -wd4624 ) + add_llvm_definitions( -wd4355 -wd4715 -wd4180 -wd4345 -wd4224 ) endif( MSVC ) include_directories( ${LLVM_BINARY_DIR}/include ${LLVM_MAIN_INCLUDE_DIR}) Modified: llvm/trunk/cmake/config-ix.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/config-ix.cmake?rev=68428&r1=68427&r2=68428&view=diff ============================================================================== --- llvm/trunk/cmake/config-ix.cmake (original) +++ llvm/trunk/cmake/config-ix.cmake Sat Apr 4 17:41:07 2009 @@ -52,6 +52,11 @@ check_symbol_exists(pthread_mutex_lock pthread.h HAVE_PTHREAD_MUTEX_LOCK) check_symbol_exists(strtoll stdlib.h HAVE_STRTOLL) +check_symbol_exists(__GLIBC__ stdio.h LLVM_USING_GLIBC) +if( LLVM_USING_GLIBC ) + add_llvm_definitions( -D_GNU_SOURCE ) +endif() + include(CheckCXXCompilerFlag) check_cxx_compiler_flag("-fPIC" SUPPORTS_FPIC_FLAG) Added: llvm/trunk/cmake/modules/AddLLVMDefinitions.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/AddLLVMDefinitions.cmake?rev=68428&view=auto ============================================================================== --- llvm/trunk/cmake/modules/AddLLVMDefinitions.cmake (added) +++ llvm/trunk/cmake/modules/AddLLVMDefinitions.cmake Sat Apr 4 17:41:07 2009 @@ -0,0 +1,11 @@ +# There is no clear way of keeping track of compiler command-line +# options chosen via `add_definitions', so we need our own method for +# using it on tools/llvm-config/CMakeLists.txt. + +# Beware that there is no implementation of remove_llvm_definitions. + +macro(add_llvm_definitions) + set(LLVM_DEFINITIONS "${LLVM_DEFINITIONS} ${ARGN}") + add_definitions( ${ARGN} ) +endmacro(add_llvm_definitions) + Modified: llvm/trunk/tools/llvm-config/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-config/CMakeLists.txt?rev=68428&r1=68427&r2=68428&view=diff ============================================================================== --- llvm/trunk/tools/llvm-config/CMakeLists.txt (original) +++ llvm/trunk/tools/llvm-config/CMakeLists.txt Sat Apr 4 17:41:07 2009 @@ -82,10 +82,15 @@ DEPENDS ${LIBDEPS} COMMENT "Checking for cyclic dependencies between LLVM libraries.") +string(TOUPPER ${CMAKE_BUILD_TYPE} uppercase_CMAKE_BUILD_TYPE) +set(C_FLGS "${CMAKE_C_FLAGS_${uppercase_CMAKE_BUILD_TYPE}} ${LLVM_DEFINITIONS}") +set(CXX_FLGS "${CMAKE_CXX_FLAGS_${uppercase_CMAKE_BUILD_TYPE}} ${LLVM_DEFINITIONS}") +set(CPP_FLGS "${CMAKE_CPP_FLAGS_${uppercase_CMAKE_BUILD_TYPE}} ${LLVM_DEFINITIONS}") + add_custom_command(OUTPUT ${LLVM_CONFIG} - COMMAND echo 's!@LLVM_CPPFLAGS@!${CMAKE_CPP_FLAGS}!' > temp.sed - COMMAND echo 's!@LLVM_CFLAGS@!${CMAKE_C_FLAGS}!' >> temp.sed - COMMAND echo 's!@LLVM_CXXFLAGS@!${CMAKE_CXX_FLAGS}!' >> temp.sed + COMMAND echo 's!@LLVM_CPPFLAGS@!${CPP_FLGS}!' > temp.sed + COMMAND echo 's!@LLVM_CFLAGS@!${C_FLGS}!' >> temp.sed + COMMAND echo 's!@LLVM_CXXFLAGS@!${CXX_FLGS}!' >> temp.sed # TODO: Use general flags for linking! not just for shared libs: COMMAND echo 's!@LLVM_LDFLAGS@!${CMAKE_SHARED_LINKER_FLAGS}!' >> temp.sed COMMAND echo 's!@LIBS@!!' >> temp.sed # TODO: System libs From ofv at wanadoo.es Sat Apr 4 17:52:02 2009 From: ofv at wanadoo.es (Oscar Fuentes) Date: Sat, 04 Apr 2009 22:52:02 -0000 Subject: [llvm-commits] [llvm] r68429 - in /llvm/trunk: CMakeLists.txt cmake/README Message-ID: <200904042252.n34Mq2wd011460@zion.cs.uiuc.edu> Author: ofv Date: Sat Apr 4 17:52:02 2009 New Revision: 68429 URL: http://llvm.org/viewvc/llvm-project?rev=68429&view=rev Log: CMake: Added notes pointing to the LLVM CMake documentation. Added: llvm/trunk/cmake/README Modified: llvm/trunk/CMakeLists.txt Modified: llvm/trunk/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CMakeLists.txt?rev=68429&r1=68428&r2=68429&view=diff ============================================================================== --- llvm/trunk/CMakeLists.txt (original) +++ llvm/trunk/CMakeLists.txt Sat Apr 4 17:52:02 2009 @@ -1,3 +1,5 @@ +# See docs/CMake.html for instructions about how to build LLVM with CMake. + project(LLVM) cmake_minimum_required(VERSION 2.6.1) Added: llvm/trunk/cmake/README URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/README?rev=68429&view=auto ============================================================================== --- llvm/trunk/cmake/README (added) +++ llvm/trunk/cmake/README Sat Apr 4 17:52:02 2009 @@ -0,0 +1 @@ +See docs/CMake.html for instructions on how to build LLVM with CMake. From isanbard at gmail.com Sat Apr 4 19:41:19 2009 From: isanbard at gmail.com (Bill Wendling) Date: Sun, 05 Apr 2009 00:41:19 -0000 Subject: [llvm-commits] [llvm] r68431 - in /llvm/trunk/docs: HowToSubmitABug.html WritingAnLLVMBackend.html Message-ID: <200904050041.n350fKds016051@zion.cs.uiuc.edu> Author: void Date: Sat Apr 4 19:41:19 2009 New Revision: 68431 URL: http://llvm.org/viewvc/llvm-project?rev=68431&view=rev Log: A lot of formatting changes. Modified: llvm/trunk/docs/HowToSubmitABug.html llvm/trunk/docs/WritingAnLLVMBackend.html Modified: llvm/trunk/docs/HowToSubmitABug.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/HowToSubmitABug.html?rev=68431&r1=68430&r2=68431&view=diff ============================================================================== --- llvm/trunk/docs/HowToSubmitABug.html (original) +++ llvm/trunk/docs/HowToSubmitABug.html Sat Apr 4 19:41:19 2009 @@ -269,7 +269,7 @@ 

 bugpoint -run-jit -output=[correct output file] [bitcode file]  \
-         --tool-args -- [arguments to pass to lli]               \
+         --tool-args -- [arguments to pass to lli]              \
          --args -- [program arguments]
@@ -279,7 +279,7 @@ 
 bugpoint -run-llc -output=[correct output file] [bitcode file]  \
-         --tool-args -- [arguments to pass to llc]               \
+         --tool-args -- [arguments to pass to llc]              \
          --args -- [program arguments]
Modified: llvm/trunk/docs/WritingAnLLVMBackend.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/WritingAnLLVMBackend.html?rev=68431&r1=68430&r2=68431&view=diff ============================================================================== --- llvm/trunk/docs/WritingAnLLVMBackend.html (original) +++ llvm/trunk/docs/WritingAnLLVMBackend.html Sat Apr 4 19:41:19 2009 @@ -54,7 +54,8 @@
-

Written by Mason Woo and Misha Brukman

+

Written by Mason Woo and + Misha Brukman

@@ -64,23 +65,30 @@
-

This document describes techniques for writing compiler backends -that convert the LLVM IR (intermediate representation) to code for a specified -machine or other languages. Code intended for a specific machine can take the -form of either assembly code or binary code (usable for a JIT compiler).

- -

The backend of LLVM features a target-independent code generator -that may create output for several types of target CPUs, including X86, -PowerPC, Alpha, and SPARC. The backend may also be used to generate code -targeted at SPUs of the Cell processor or GPUs to support the execution of -compute kernels.

- -

The document focuses on existing examples found in subdirectories -of llvm/lib/Target in a downloaded LLVM release. In particular, this document -focuses on the example of creating a static compiler (one that emits text -assembly) for a SPARC target, because SPARC has fairly standard + +

+This document describes techniques for writing compiler backends that convert +the LLVM Intermediate Representation (IR) to code for a specified machine or +other languages. Code intended for a specific machine can take the form of +either assembly code or binary code (usable for a JIT compiler). +

+ +

+The backend of LLVM features a target-independent code generator that may create +output for several types of target CPUs — including X86, PowerPC, Alpha, +and SPARC. The backend may also be used to generate code targeted at SPUs of the +Cell processor or GPUs to support the execution of compute kernels. +

+ +

+The document focuses on existing examples found in subdirectories +of llvm/lib/Target in a downloaded LLVM release. In particular, this +document focuses on the example of creating a static compiler (one that emits +text assembly) for a SPARC target, because SPARC has fairly standard characteristics, such as a RISC instruction set and straightforward calling -conventions.

+conventions. +

+
@@ -88,8 +96,12 @@
-

The audience for this document is anyone who needs to write an -LLVM backend to generate code for a specific hardware or software target.

+ +

+The audience for this document is anyone who needs to write an LLVM backend to +generate code for a specific hardware or software target. +

+
@@ -97,149 +109,174 @@
-These essential documents must be read before reading this document: + +

+These essential documents must be read before reading this document: +

+ -To follow the SPARC examples in this document, have a copy of -The SPARC Architecture Manual, Version 8 -for reference. For details about the ARM instruction set, refer to the -ARM Architecture Reference Manual -For more about the GNU Assembler format (GAS), see -Using As -especially for the assembly printer. Using As contains lists of target machine dependent features. + +

+To follow the SPARC examples in this document, have a copy of +The SPARC Architecture +Manual, Version 8 for reference. For details about the ARM instruction +set, refer to the ARM Architecture +Reference Manual. For more about the GNU Assembler format +(GAS), see +Using As, +especially for the assembly printer. Using As contains a list of target +machine dependent features. +

+
Basic Steps
+
-

To write a compiler -backend for LLVM that converts the LLVM IR (intermediate representation) -to code for a specified target (machine or other language), follow these steps:

+ +

+To write a compiler backend for LLVM that converts the LLVM IR to code for a +specified target (machine or other language), follow these steps: +

-

In the .cpp and .h files, initially stub up these methods and +

+In the .cpp and .h. files, initially stub up these methods and then implement them later. Initially, you may not know which private members -that the class will need and which components will need to be subclassed.

+that the class will need and which components will need to be subclassed. +

+
Preliminaries
+
-

To actually create -your compiler backend, you need to create and modify a few files. The absolute -minimum is discussed here, but to actually use the LLVM target-independent code -generator, you must perform the steps described in the LLVM -Target-Independent Code Generator document.

- -

First, you should -create a subdirectory under lib/Target to hold all the files related to your -target. If your target is called "Dummy", create the directory -lib/Target/Dummy.

- -

In this new -directory, create a Makefile. It is easiest to copy a Makefile of another -target and modify it. It should at least contain the LEVEL, LIBRARYNAME and -TARGET variables, and then include $(LEVEL)/Makefile.common. The library can be -named LLVMDummy (for example, see the MIPS target). Alternatively, you can -split the library into LLVMDummyCodeGen and LLVMDummyAsmPrinter, the latter of -which should be implemented in a subdirectory below lib/Target/Dummy (for -example, see the PowerPC target).

- -

Note that these two -naming schemes are hardcoded into llvm-config. Using any other naming scheme -will confuse llvm-config and produce lots of (seemingly unrelated) linker -errors when linking llc.

- -

To make your target -actually do something, you need to implement a subclass of TargetMachine. This -implementation should typically be in the file -lib/Target/DummyTargetMachine.cpp, but any file in the lib/Target directory will -be built and should work. To use LLVM's target -independent code generator, you should do what all current machine backends do: create a subclass -of LLVMTargetMachine. (To create a target from scratch, create a subclass of -TargetMachine.)

- -

To get LLVM to -actually build and link your target, you need to add it to the TARGETS_TO_BUILD -variable. To do this, you modify the configure script to know about your target -when parsing the --enable-targets option. Search the configure script for TARGETS_TO_BUILD, -add your target to the lists there (some creativity required) and then + +

+To actually create your compiler backend, you need to create and modify a few +files. The absolute minimum is discussed here. But to actually use the LLVM +target-independent code generator, you must perform the steps described in +the LLVM +Target-Independent Code Generator document. +

+ +

+First, you should create a subdirectory under lib/Target to hold all +the files related to your target. If your target is called "Dummy," create the +directory lib/Target/Dummy. +

+ +

+In this new +directory, create a Makefile. It is easiest to copy a +Makefile of another target and modify it. It should at least contain +the LEVEL, LIBRARYNAME and TARGET variables, and then +include $(LEVEL)/Makefile.common. The library can be +named LLVMDummy (for example, see the MIPS target). Alternatively, you +can split the library into LLVMDummyCodeGen +and LLVMDummyAsmPrinter, the latter of which should be implemented in a +subdirectory below lib/Target/Dummy (for example, see the PowerPC +target). +

+ +

+Note that these two naming schemes are hardcoded into llvm-config. +Using any other naming scheme will confuse llvm-config and produce a +lot of (seemingly unrelated) linker errors when linking llc. +

+ +

+To make your target actually do something, you need to implement a subclass of +TargetMachine. This implementation should typically be in the file +lib/Target/DummyTargetMachine.cpp, but any file in +the lib/Target directory will be built and should work. To use LLVM's +target independent code generator, you should do what all current machine +backends do: create a subclass of LLVMTargetMachine. (To create a +target from scratch, create a subclass of TargetMachine.) +

+ +

+To get LLVM to actually build and link your target, you need to add it to +the TARGETS_TO_BUILD variable. To do this, you modify the configure +script to know about your target when parsing the --enable-targets +option. Search the configure script for TARGETS_TO_BUILD, add your +target to the lists there (some creativity required), and then reconfigure. Alternatively, you can change autotools/configure.ac and -regenerate configure by running ./autoconf/AutoRegen.sh

+regenerate configure by running ./autoconf/AutoRegen.sh. +

+
@@ -247,36 +284,47 @@ Target Machine +
-

LLVMTargetMachine is designed as a base class for targets -implemented with the LLVM target-independent code generator. The -LLVMTargetMachine class should be specialized by a concrete target class that -implements the various virtual methods. LLVMTargetMachine is defined as a -subclass of TargetMachine in include/llvm/Target/TargetMachine.h. The -TargetMachine class implementation (TargetMachine.cpp) also processes numerous -command-line options.

- -

To create a concrete target-specific subclass of -LLVMTargetMachine, start by copying an existing TargetMachine class and header. -You should name the files that you create to reflect your specific target. For + +

+LLVMTargetMachine is designed as a base class for targets implemented +with the LLVM target-independent code generator. The LLVMTargetMachine +class should be specialized by a concrete target class that implements the +various virtual methods. LLVMTargetMachine is defined as a subclass of +TargetMachine in include/llvm/Target/TargetMachine.h. The +TargetMachine class implementation (TargetMachine.cpp) also +processes numerous command-line options. +

+ +

+To create a concrete target-specific subclass of LLVMTargetMachine, +start by copying an existing TargetMachine class and header. You +should name the files that you create to reflect your specific target. For instance, for the SPARC target, name the files SparcTargetMachine.h and -SparcTargetMachine.cpp

+SparcTargetMachine.cpp. +

-

For a target machine XXX, the implementation of XXXTargetMachine -must have access methods to obtain objects that represent target components. -These methods are named get*Info and are intended to obtain the instruction set -(getInstrInfo), register set (getRegisterInfo), stack frame layout -(getFrameInfo), and similar information. XXXTargetMachine must also implement -the getTargetData method to access an object with target-specific data -characteristics, such as data type size and alignment requirements.

+

+For a target machine XXX, the implementation of +XXXTargetMachine must have access methods to obtain objects that +represent target components. These methods are named get*Info, and are +intended to obtain the instruction set (getInstrInfo), register set +(getRegisterInfo), stack frame layout (getFrameInfo), and +similar information. XXXTargetMachine must also implement the +getTargetData method to access an object with target-specific data +characteristics, such as data type size and alignment requirements. +

-

For instance, for the SPARC target, the header file SparcTargetMachine.h -declares prototypes for several get*Info and getTargetData methods that simply -return a class member.

-
+

+For instance, for the SPARC target, the header file +SparcTargetMachine.h declares prototypes for several get*Info +and getTargetData methods that simply return a class member. +

-
namespace llvm {
+
+namespace llvm {
 
 class Module;
 
@@ -287,8 +335,7 @@
   TargetFrameInfo FrameInfo;
   
 protected:
-  virtual const TargetAsmInfo *createTargetAsmInfo()
-const;
+  virtual const TargetAsmInfo *createTargetAsmInfo() const;
   
 public:
   SparcTargetMachine(const Module &M, const std::string &FS);
@@ -313,110 +360,141 @@
+ + +
+ -

For some targets, you also need to support the following methods: -

+ +

For some targets, you also need to support the following methods:

-

In addition, the XXXTargetMachine constructor should specify a -TargetDescription string that determines the data layout for the target machine, -including characteristics such as pointer size, alignment, and endianness. For -example, the constructor for SparcTargetMachine contains the following:

-
+ +

+In addition, the XXXTargetMachine constructor should specify a +TargetDescription string that determines the data layout for the target +machine, including characteristics such as pointer size, alignment, and +endianness. For example, the constructor for SparcTargetMachine contains the +following: +

 SparcTargetMachine::SparcTargetMachine(const Module &M, const std::string &FS)
-  : DataLayout("E-p:32:32-f128:128:128"),
+  : DataLayout("E-p:32:32-f128:128:128"),
     Subtarget(M, FS), InstrInfo(Subtarget),
     FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
 }
+ +
-

Hyphens separate portions of the TargetDescription string.

+ +

Hyphens separate portions of the TargetDescription string.

+ -

You must also register your target using the RegisterTarget -template. (See the TargetMachineRegistry class.) For example, in SparcTargetMachine.cpp, -the target is registered with:

-
+ +

+You must also register your target using the RegisterTarget +template. (See the TargetMachineRegistry class.) For example, +in SparcTargetMachine.cpp, the target is registered with: +

 namespace {
   // Register the target.
-  RegisterTarget<SparcTargetMachine>X("sparc", "SPARC");
+  RegisterTarget<SparcTargetMachine>X("sparc", "SPARC");
 }
+ +
Register Set and Register Classes
+
-

You should describe -a concrete target-specific class -that represents the register file of a target machine. This class is -called XXXRegisterInfo (where XXX identifies the target) and represents the -class register file data that is used for register allocation and also -describes the interactions between registers.

- -

You also need to -define register classes to categorize related registers. A register class -should be added for groups of registers that are all treated the same way for -some instruction. Typical examples are register classes that include integer, -floating-point, or vector registers. A register allocator allows an + +

+You should describe a concrete target-specific class that represents the +register file of a target machine. This class is called XXXRegisterInfo +(where XXX identifies the target) and represents the class register +file data that is used for register allocation. It also describes the +interactions between registers. +

+ +

+You also need to define register classes to categorize related registers. A +register class should be added for groups of registers that are all treated the +same way for some instruction. Typical examples are register classes for +integer, floating-point, or vector registers. A register allocator allows an instruction to use any register in a specified register class to perform the instruction in a similar manner. Register classes allocate virtual registers to instructions from these sets, and register classes let the target-independent -register allocator automatically choose the actual registers.

+register allocator automatically choose the actual registers. +

+ +

+Much of the code for registers, including register definition, register aliases, +and register classes, is generated by TableGen from XXXRegisterInfo.td +input files and placed in XXXGenRegisterInfo.h.inc and +XXXGenRegisterInfo.inc output files. Some of the code in the +implementation of XXXRegisterInfo requires hand-coding. +

-

Much of the code for registers, including register definition, -register aliases, and register classes, is generated by TableGen from -XXXRegisterInfo.td input files and placed in XXXGenRegisterInfo.h.inc and -XXXGenRegisterInfo.inc output files. Some of the code in the implementation of -XXXRegisterInfo requires hand-coding.

Defining a Register
+
-

The XXXRegisterInfo.td file typically starts with register definitions -for a target machine. The Register class (specified in Target.td) is used to -define an object for each register. The specified string n becomes the Name of -the register. The basic Register object does not have any subregisters and does -not specify any aliases.

-
+ +

+The XXXRegisterInfo.td file typically starts with register definitions +for a target machine. The Register class (specified +in Target.td) is used to define an object for each register. The +specified string n becomes the Name of the register. The +basic Register object does not have any subregisters and does not +specify any aliases. +

+ 
 class Register<string n> {
-  string Namespace = "";
+  string Namespace = "";
   string AsmName = n;
   string Name = n;
   int SpillSize = 0;
@@ -428,47 +506,51 @@
-
-

For example, in the X86RegisterInfo.td file, there are register -definitions that utilize the Register class, such as:

-
+

+For example, in the X86RegisterInfo.td file, there are register +definitions that utilize the Register class, such as: +

+ 
-def AL : Register<"AL">,
-DwarfRegNum<[0, 0, 0]>;
+def AL : Register<"AL">, DwarfRegNum<[0, 0, 0]>;
-
-

This defines the register AL and assigns it values (with -DwarfRegNum) that are used by gcc, gdb, or a debug information writer (such as -DwarfWriter in llvm/lib/CodeGen) to identify a register. For register AL, -DwarfRegNum takes an array of 3 values, representing 3 different modes: the -first element is for X86-64, the second for EH (exception handling) on X86-32, -and the third is generic. -1 is a special Dwarf number that indicates the gcc -number is undefined, and -2 indicates the register number is invalid for this -mode.

+

+This defines the register AL and assigns it values (with +DwarfRegNum) that are used by gcc, gdb, or a debug +information writer (such as DwarfWriter +in llvm/lib/CodeGen/AsmPrinter) to identify a register. For register +AL, DwarfRegNum takes an array of 3 values representing 3 +different modes: the first element is for X86-64, the second for exception +handling (EH) on X86-32, and the third is generic. -1 is a special Dwarf number +that indicates the gcc number is undefined, and -2 indicates the register number +is invalid for this mode. +

+ +

+From the previously described line in the X86RegisterInfo.td file, +TableGen generates this code in the X86GenRegisterInfo.inc file: +

-

From the previously described line in the X86RegisterInfo.td -file, TableGen generates this code in the X86GenRegisterInfo.inc file:

-
-  static const unsigned GR8[] = { X86::AL, ... };
- 
-  const unsigned AL_AliasSet[] = { X86::AX, X86::EAX, X86::RAX, 0 };
- 
-  const TargetRegisterDesc RegisterDescriptors[] = { 
-    ...
-    { "AL", "AL", AL_AliasSet, Empty_SubRegsSet, Empty_SubRegsSet, AL_SuperRegsSet }, ...
+static const unsigned GR8[] = { X86::AL, ... };
+
+const unsigned AL_AliasSet[] = { X86::AX, X86::EAX, X86::RAX, 0 };
+
+const TargetRegisterDesc RegisterDescriptors[] = { 
+  ...
+{ "AL", "AL", AL_AliasSet, Empty_SubRegsSet, Empty_SubRegsSet, AL_SuperRegsSet }, ...
-
-

From the register info file, TableGen generates a -TargetRegisterDesc object for each register. TargetRegisterDesc is defined in -include/llvm/Target/TargetRegisterInfo.h with the following fields:

-
+

+From the register info file, TableGen generates a TargetRegisterDesc +object for each register. TargetRegisterDesc is defined in +include/llvm/Target/TargetRegisterInfo.h with the following fields: +

@@ -482,41 +564,47 @@
 };
-
-

TableGen uses the entire target description file (.td) to -determine text names for the register (in the AsmName and Name fields of -TargetRegisterDesc) and the relationships of other registers to the defined -register (in the other TargetRegisterDesc fields). In this example, other -definitions establish the registers "AX", "EAX", and "RAX" as aliases for one -another, so TableGen generates a null-terminated array (AL_AliasSet) for this -register alias set.

- -

The Register class is commonly used as a base class for more -complex classes. In Target.td, the Register class is the base for the -RegisterWithSubRegs class that is used to define registers that need to specify -subregisters in the SubRegs list, as shown here:

-
+

+TableGen uses the entire target description file (.td) to determine +text names for the register (in the AsmName and Name fields of +TargetRegisterDesc) and the relationships of other registers to the +defined register (in the other TargetRegisterDesc fields). In this +example, other definitions establish the registers "AX", +"EAX", and "RAX" as aliases for one another, so TableGen +generates a null-terminated array (AL_AliasSet) for this register alias +set. +

+ +

+The Register class is commonly used as a base class for more complex +classes. In Target.td, the Register class is the base for the +RegisterWithSubRegs class that is used to define registers that need to +specify subregisters in the SubRegs list, as shown here: +

+ 
 class RegisterWithSubRegs<string n,
 list<Register> subregs> : Register<n> {
   let SubRegs = subregs;
-}
+} +
-
-

In SparcRegisterInfo.td, additional register classes are defined -for SPARC: a Register subclass, SparcReg, and further subclasses: Ri, Rf, and -Rd. SPARC registers are identified by 5-bit ID numbers, which is a feature -common to these subclasses. Note the use of ‘let’ expressions to override values -that are initially defined in a superclass (such as SubRegs field in the Rd -class).

-
+

+In SparcRegisterInfo.td, additional register classes are defined for +SPARC: a Register subclass, SparcReg, and further subclasses: Ri, +Rf, and Rd. SPARC registers are identified by 5-bit ID +numbers, which is a feature common to these subclasses. Note the use of +'let' expressions to override values that are initially defined in a +superclass (such as SubRegs field in the Rd class). +

+ 
 class SparcReg<string n> : Register<n> {
   field bits<5> Num;
-  let Namespace = "SP";
+  let Namespace = "SP";
 }
 // Ri - 32-bit integer registers
 class Ri<bits<5> num, string n> :
@@ -534,48 +622,57 @@
 list<Register> subregs> : SparcReg<n> {
   let Num = num;
   let SubRegs = subregs;
-}
-
-
-

In the SparcRegisterInfo.td file, there are register definitions -that utilize these subclasses of Register, such as:

+} +
+ +

+In the SparcRegisterInfo.td file, there are register definitions that +utilize these subclasses of Register, such as: +

+ 
-def G0 : Ri< 0, "G0">,
+def G0 : Ri< 0, "G0">,
 DwarfRegNum<[0]>;
-def G1 : Ri< 1, "G1">, DwarfRegNum<[1]>;
+def G1 : Ri< 1, "G1">, DwarfRegNum<[1]>;
 ...
-def F0 : Rf< 0, "F0">,
+def F0 : Rf< 0, "F0">,
 DwarfRegNum<[32]>;
-def F1 : Rf< 1, "F1">,
+def F1 : Rf< 1, "F1">,
 DwarfRegNum<[33]>;
 ...
-def D0 : Rd< 0, "F0", [F0, F1]>,
+def D0 : Rd< 0, "F0", [F0, F1]>,
 DwarfRegNum<[32]>;
-def D1 : Rd< 2, "F2", [F2, F3]>,
+def D1 : Rd< 2, "F2", [F2, F3]>,
 DwarfRegNum<[34]>;
-
-

The last two registers shown above (D0 and D1) are double-precision -floating-point registers that are aliases for pairs of single-precision -floating-point sub-registers. In addition to aliases, the sub-register and -super-register relationships of the defined register are in fields of a -register’s TargetRegisterDesc.

+ +

+The last two registers shown above (D0 and D1) are +double-precision floating-point registers that are aliases for pairs of +single-precision floating-point sub-registers. In addition to aliases, the +sub-register and super-register relationships of the defined register are in +fields of a register's TargetRegisterDesc. +

+
Defining a Register Class
+
-

The RegisterClass class (specified in Target.td) is used to + +

+The RegisterClass class (specified in Target.td) is used to define an object that represents a group of related registers and also defines the default allocation order of the registers. A target description file -XXXRegisterInfo.td that uses Target.td can construct register classes using the -following class:

-
+XXXRegisterInfo.td that uses Target.td can construct register +classes using the following class: +

@@ -586,7 +683,7 @@
   list<ValueType> RegTypes = regTypes;
   int Size = 0;  // spill size, in bits; zero lets tblgen pick the size
   int Alignment = alignment;
- 
+
   // CopyCost is the cost of copying a value between two registers
   // default value 1 means a single instruction
   // A negative value means copying is extremely expensive or impossible
@@ -598,251 +695,286 @@
   
   code MethodProtos = [{}];  // to insert arbitrary code
   code MethodBodies = [{}];
-}
+} +
-
+

To define a RegisterClass, use the following 4 arguments:

+ -

In SparcRegisterInfo.td, three RegisterClass objects are defined: -FPRegs, DFPRegs, and IntRegs. For all three register classes, the first -argument defines the namespace with the string “SP”. FPRegs defines a group of 32 -single-precision floating-point registers (F0 to F31); DFPRegs defines a group -of 16 double-precision registers (D0-D15). For IntRegs, the MethodProtos and -MethodBodies methods are used by TableGen to insert the specified code into generated -output.

-
+

+In SparcRegisterInfo.td, three RegisterClass objects are defined: +FPRegs, DFPRegs, and IntRegs. For all three register +classes, the first argument defines the namespace with the string +'SP'. FPRegs defines a group of 32 single-precision +floating-point registers (F0 to F31); DFPRegs defines +a group of 16 double-precision registers +(D0-D15). For IntRegs, the MethodProtos +and MethodBodies methods are used by TableGen to insert the specified +code into generated output. +

+ 
-def FPRegs : RegisterClass<"SP", [f32], 32, [F0, F1, F2, F3, F4, F5, F6, F7,   
-  F8, F9, F10, F11, F12, F13, F14, F15, F16, F17, F18, F19, F20, F21, F22,
-  F23, F24, F25, F26, F27, F28, F29, F30, F31]>;
- 
-def DFPRegs : RegisterClass<"SP", [f64], 64, [D0, D1, D2, D3, D4, D5, D6, D7,
-  D8, D9, D10, D11, D12, D13, D14, D15]>;
+def FPRegs : RegisterClass<"SP", [f32], 32,
+  [F0, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, F13, F14, F15,
+   F16, F17, F18, F19, F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, F30, F31]>;
+
+def DFPRegs : RegisterClass<"SP", [f64], 64,
+  [D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15]>;
  
-def IntRegs : RegisterClass<"SP", [i32], 32, [L0, L1, L2, L3, L4, L5, L6, L7,
-                                     I0, I1, I2, I3, I4, I5,
-                                     O0, O1, O2, O3, O4, O5, O7,
-                                     G1,
-                                     // Non-allocatable regs:
-                                     G2, G3, G4, 
-                                     O6, // stack ptr
-                                     I6, // frame ptr
-                                     I7, // return address
-                                     G0, // constant zero
-                                     G5, G6, G7 // reserved for kernel
-                                     ]> {
+def IntRegs : RegisterClass<"SP", [i32], 32,
+    [L0, L1, L2, L3, L4, L5, L6, L7,
+     I0, I1, I2, I3, I4, I5,
+     O0, O1, O2, O3, O4, O5, O7,
+     G1,
+     // Non-allocatable regs:
+     G2, G3, G4, 
+     O6,        // stack ptr
+    I6,        // frame ptr
+     I7,        // return address
+     G0,        // constant zero
+     G5, G6, G7 // reserved for kernel
+    ]> {
   let MethodProtos = [{
     iterator allocation_order_end(const MachineFunction &MF) const;
   }];
   let MethodBodies = [{
     IntRegsClass::iterator
     IntRegsClass::allocation_order_end(const MachineFunction &MF) const {
-      return end()-10  // Don't allocate special registers
-         -1;  
+      return end() - 10  // Don't allocate special registers
+         -1;
     }
   }];
 }
-
-

Using SparcRegisterInfo.td with TableGen generates several output -files that are intended for inclusion in other source code that you write. -SparcRegisterInfo.td generates SparcGenRegisterInfo.h.inc, which should be -included in the header file for the implementation of the SPARC register -implementation that you write (SparcRegisterInfo.h). In +

+Using SparcRegisterInfo.td with TableGen generates several output files +that are intended for inclusion in other source code that you write. +SparcRegisterInfo.td generates SparcGenRegisterInfo.h.inc, +which should be included in the header file for the implementation of the SPARC +register implementation that you write (SparcRegisterInfo.h). In SparcGenRegisterInfo.h.inc a new structure is defined called -SparcGenRegisterInfo that uses TargetRegisterInfo as its base. It also -specifies types, based upon the defined register classes: DFPRegsClass, FPRegsClass, -and IntRegsClass.

- -

SparcRegisterInfo.td also generates SparcGenRegisterInfo.inc, -which is included at the bottom of SparcRegisterInfo.cpp, the SPARC register -implementation. The code below shows only the generated integer registers and -associated register classes. The order of registers in IntRegs reflects the -order in the definition of IntRegs in the target description file. Take special -note of the use of MethodBodies in SparcRegisterInfo.td to create code in -SparcGenRegisterInfo.inc. MethodProtos generates similar code in -SparcGenRegisterInfo.h.inc.

-
+SparcGenRegisterInfo that uses TargetRegisterInfo as its +base. It also specifies types, based upon the defined register +classes: DFPRegsClass, FPRegsClass, and IntRegsClass. +

+ +

+SparcRegisterInfo.td also generates SparcGenRegisterInfo.inc, +which is included at the bottom of SparcRegisterInfo.cpp, the SPARC +register implementation. The code below shows only the generated integer +registers and associated register classes. The order of registers +in IntRegs reflects the order in the definition of IntRegs in +the target description file. Take special note of the use +of MethodBodies in SparcRegisterInfo.td to create code in +SparcGenRegisterInfo.inc. MethodProtos generates similar code +in SparcGenRegisterInfo.h.inc. +

  // IntRegs Register Class...
   static const unsigned IntRegs[] = {
     SP::L0, SP::L1, SP::L2, SP::L3, SP::L4, SP::L5,
-SP::L6, SP::L7, SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5, SP::O0, SP::O1,
-SP::O2, SP::O3, SP::O4, SP::O5, SP::O7, SP::G1, SP::G2, SP::G3, SP::G4, SP::O6,
-SP::I6, SP::I7, SP::G0, SP::G5, SP::G6, SP::G7, 
+    SP::L6, SP::L7, SP::I0, SP::I1, SP::I2, SP::I3,
+    SP::I4, SP::I5, SP::O0, SP::O1, SP::O2, SP::O3,
+    SP::O4, SP::O5, SP::O7, SP::G1, SP::G2, SP::G3,
+    SP::G4, SP::O6, SP::I6, SP::I7, SP::G0, SP::G5,
+    SP::G6, SP::G7, 
   };
- 
+
   // IntRegsVTs Register Class Value Types...
   static const MVT::ValueType IntRegsVTs[] = {
     MVT::i32, MVT::Other
   };
+
 namespace SP {   // Register class instances
   DFPRegsClass    DFPRegsRegClass;
   FPRegsClass     FPRegsRegClass;
   IntRegsClass    IntRegsRegClass;
 ...
- 
-// IntRegs Sub-register Classess...
+  // IntRegs Sub-register Classess...
   static const TargetRegisterClass* const IntRegsSubRegClasses [] = {
     NULL
   };
 ...
-// IntRegs Super-register Classess...
+  // IntRegs Super-register Classess...
   static const TargetRegisterClass* const IntRegsSuperRegClasses [] = {
     NULL
   };
- 
-// IntRegs Register Class sub-classes...
+...
+  // IntRegs Register Class sub-classes...
   static const TargetRegisterClass* const IntRegsSubclasses [] = {
     NULL
   };
 ...
- 
-// IntRegs Register Class super-classes...
+  // IntRegs Register Class super-classes...
   static const TargetRegisterClass* const IntRegsSuperclasses [] = {
     NULL
   };
 ...
- 
   IntRegsClass::iterator
   IntRegsClass::allocation_order_end(const MachineFunction &MF) const {
-
      return end()-10  // Don't allocate special registers
-         -1; 
+         -1;
   }
   
-IntRegsClass::IntRegsClass() : TargetRegisterClass(IntRegsRegClassID, 
-   IntRegsVTs, IntRegsSubclasses, IntRegsSuperclasses, IntRegsSubRegClasses, 
-   IntRegsSuperRegClasses, 4, 4, 1, IntRegs, IntRegs + 32) {}
+  IntRegsClass::IntRegsClass() : TargetRegisterClass(IntRegsRegClassID, 
+    IntRegsVTs, IntRegsSubclasses, IntRegsSuperclasses, IntRegsSubRegClasses, 
+    IntRegsSuperRegClasses, 4, 4, 1, IntRegs, IntRegs + 32) {}
 }
+ + +
Implement a subclass of TargetRegisterInfo
+
-

The final step is to hand code portions of XXXRegisterInfo, which -implements the interface described in TargetRegisterInfo.h. These functions -return 0, NULL, or false, unless overridden. Here’s a list of functions that -are overridden for the SPARC implementation in SparcRegisterInfo.cpp:

+ +

+The final step is to hand code portions of XXXRegisterInfo, which +implements the interface described in TargetRegisterInfo.h. These +functions return 0, NULL, or false, unless +overridden. Here is a list of functions that are overridden for the SPARC +implementation in SparcRegisterInfo.cpp: +

+ +
Instruction Set
+
-

During the early stages of code generation, the LLVM IR code is -converted to a SelectionDAG with nodes that are instances of the SDNode class -containing target instructions. An SDNode has an opcode, operands, type -requirements, and operation properties (for example, is an operation -commutative, does an operation load from memory). The various operation node -types are described in the include/llvm/CodeGen/SelectionDAGNodes.h file (values -of the NodeType enum in the ISD namespace).

-

TableGen uses the following target description (.td) input files -to generate much of the code for instruction definition:

+

+During the early stages of code generation, the LLVM IR code is converted to a +SelectionDAG with nodes that are instances of the SDNode class +containing target instructions. An SDNode has an opcode, operands, type +requirements, and operation properties. For example, is an operation +commutative, does an operation load from memory. The various operation node +types are described in the include/llvm/CodeGen/SelectionDAGNodes.h +file (values of the NodeType enum in the ISD namespace). +

+ +

+TableGen uses the following target description (.td) input files to +generate much of the code for instruction definition: +

+ -

There is also a target-specific XXX.td file, where XXX is the -name of the target. The XXX.td file includes the other .td input files, but its -contents are only directly important for subtargets.

- -

You should describe -a concrete target-specific class -XXXInstrInfo that represents machine -instructions supported by a target machine. XXXInstrInfo contains an array of -XXXInstrDescriptor objects, each of which describes one instruction. An -instruction descriptor defines:

+ +

+There is also a target-specific XXX.td file, where XXX is the +name of the target. The XXX.td file includes the other .td +input files, but its contents are only directly important for subtargets. +

+ +

+You should describe a concrete target-specific class XXXInstrInfo that +represents machine instructions supported by a target machine. +XXXInstrInfo contains an array of XXXInstrDescriptor objects, +each of which describes one instruction. An instruction descriptor defines:

+ -

The Instruction class (defined in Target.td) is mostly used as a -base for more complex instruction classes.

-
+

+The Instruction class (defined in Target.td) is mostly used as a base +for more complex instruction classes. +

class Instruction {
-  string Namespace = "";
+  string Namespace = "";
   dag OutOperandList;       // An dag containing the MI def operand list.
   dag InOperandList;        // An dag containing the MI use operand list.
-  string AsmString = "";    // The .s format to print the instruction with.
+  string AsmString = "";    // The .s format to print the instruction with.
   list<dag> Pattern;  // Set to the DAG pattern for this instruction
   list<Register> Uses = []; 
   list<Register> Defs = [];
@@ -851,135 +983,157 @@
 }
-
-

A SelectionDAG node (SDNode) should contain an object -representing a target-specific instruction that is defined in XXXInstrInfo.td. The -instruction objects should represent instructions from the architecture manual -of the target machine (such as the -SPARC Architecture Manual for the SPARC target).

- -

A single -instruction from the architecture manual is often modeled as multiple target -instructions, depending upon its operands.  For example, a manual might + +

+A SelectionDAG node (SDNode) should contain an object +representing a target-specific instruction that is defined +in XXXInstrInfo.td. The instruction objects should represent +instructions from the architecture manual of the target machine (such as the +SPARC Architecture Manual for the SPARC target). +

+ +

+A single instruction from the architecture manual is often modeled as multiple +target instructions, depending upon its operands. For example, a manual might describe an add instruction that takes a register or an immediate operand. An -LLVM target could model this with two instructions named ADDri and ADDrr.

+LLVM target could model this with two instructions named ADDri and +ADDrr. +

+ +

+You should define a class for each instruction category and define each opcode +as a subclass of the category with appropriate parameters such as the fixed +binary encoding of opcodes and extended opcodes. You should map the register +bits to the bits of the instruction in which they are encoded (for the +JIT). Also you should specify how the instruction should be printed when the +automatic assembly printer is used. +

+ +

+As is described in the SPARC Architecture Manual, Version 8, there are three +major 32-bit formats for instructions. Format 1 is only for the CALL +instruction. Format 2 is for branch on condition codes and SETHI (set +high bits of a register) instructions. Format 3 is for other instructions. +

+ +

+Each of these formats has corresponding classes in SparcInstrFormat.td. +InstSP is a base class for other instruction classes. Additional base +classes are specified for more precise formats: for example +in SparcInstrFormat.td, F2_1 is for SETHI, +and F2_2 is for branches. There are three other base +classes: F3_1 for register/register operations, F3_2 for +register/immediate operations, and F3_3 for floating-point +operations. SparcInstrInfo.td also adds the base class Pseudo for +synthetic SPARC instructions. +

+ +

+SparcInstrInfo.td largely consists of operand and instruction +definitions for the SPARC target. In SparcInstrInfo.td, the following +target description file entry, LDrr, defines the Load Integer +instruction for a Word (the LD SPARC opcode) from a memory address to a +register. The first parameter, the value 3 (112), is the +operation value for this category of operation. The second parameter +(0000002) is the specific operation value +for LD/Load Word. The third parameter is the output destination, which +is a register operand and defined in the Register target description +file (IntRegs). +

-

You should define a -class for each instruction category and define each opcode as a subclass of the -category with appropriate parameters such as the fixed binary encoding of -opcodes and extended opcodes. You should map the register bits to the bits of -the instruction in which they are encoded (for the JIT). Also you should specify -how the instruction should be printed when the automatic assembly printer is -used.

- -

As is described in -the SPARC Architecture Manual, Version 8, there are three major 32-bit formats -for instructions. Format 1 is only for the CALL instruction. Format 2 is for -branch on condition codes and SETHI (set high bits of a register) instructions. -Format 3 is for other instructions.

- -

Each of these -formats has corresponding classes in SparcInstrFormat.td. InstSP is a base -class for other instruction classes. Additional base classes are specified for -more precise formats: for example in SparcInstrFormat.td, F2_1 is for SETHI, -and F2_2 is for branches. There are three other base classes: F3_1 for -register/register operations, F3_2 for register/immediate operations, and F3_3 for -floating-point operations. SparcInstrInfo.td also adds the base class Pseudo for -synthetic SPARC instructions.

- -

SparcInstrInfo.td -largely consists of operand and instruction definitions for the SPARC target. In -SparcInstrInfo.td, the following target description file entry, LDrr, defines -the Load Integer instruction for a Word (the LD SPARC opcode) from a memory -address to a register. The first parameter, the value 3 (112), is -the operation value for this category of operation. The second parameter -(0000002) is the specific operation value for LD/Load Word. The -third parameter is the output destination, which is a register operand and -defined in the Register target description file (IntRegs).

-
def LDrr : F3_1 <3, 0b000000, (outs IntRegs:$dst), (ins MEMrr:$addr),
-                 "ld [$addr], $dst",
+                 "ld [$addr], $dst",
                  [(set IntRegs:$dst, (load ADDRrr:$addr))]>;
-
-

The fourth -parameter is the input source, which uses the address operand MEMrr that is -defined earlier in SparcInstrInfo.td:

-
+

+The fourth parameter is the input source, which uses the address +operand MEMrr that is defined earlier in SparcInstrInfo.td: +

+ 
def MEMrr : Operand<i32> {
-  let PrintMethod = "printMemOperand";
+  let PrintMethod = "printMemOperand";
   let MIOperandInfo = (ops IntRegs, IntRegs);
 }
-
-

The fifth parameter is a string that is used by the assembly -printer and can be left as an empty string until the assembly printer interface -is implemented. The sixth and final parameter is the pattern used to match the -instruction during the SelectionDAG Select Phase described in -(The LLVM Target-Independent Code Generator). -This parameter is detailed in the next section, Instruction Selector.

- -

Instruction class definitions are not overloaded for different -operand types, so separate versions of instructions are needed for register, -memory, or immediate value operands. For example, to perform a -Load Integer instruction for a Word + +

+The fifth parameter is a string that is used by the assembly printer and can be +left as an empty string until the assembly printer interface is implemented. The +sixth and final parameter is the pattern used to match the instruction during +the SelectionDAG Select Phase described in +(The LLVM +Target-Independent Code Generator). This parameter is detailed in the next +section, Instruction Selector. +

+ +

+Instruction class definitions are not overloaded for different operand types, so +separate versions of instructions are needed for register, memory, or immediate +value operands. For example, to perform a Load Integer instruction for a Word from an immediate operand to a register, the following instruction class is -defined:

-
+defined: +

+ 
def LDri : F3_2 <3, 0b000000, (outs IntRegs:$dst), (ins MEMri:$addr),
-                 "ld [$addr], $dst",
+                 "ld [$addr], $dst",
                  [(set IntRegs:$dst, (load ADDRri:$addr))]>;
-
-

Writing these definitions for so many similar instructions can -involve a lot of cut and paste. In td files, the multiclass directive enables -the creation of templates to define several instruction classes at once (using -the defm directive). For example in -SparcInstrInfo.td, the multiclass pattern F3_12 is defined to create 2 -instruction classes each time F3_12 is invoked:

-
+ +

+Writing these definitions for so many similar instructions can involve a lot of +cut and paste. In td files, the multiclass directive enables the +creation of templates to define several instruction classes at once (using +the defm directive). For example in SparcInstrInfo.td, the +multiclass pattern F3_12 is defined to create 2 instruction +classes each time F3_12 is invoked: +

+ 
multiclass F3_12 <string OpcStr, bits<6> Op3Val, SDNode OpNode> {
   def rr  : F3_1 <2, Op3Val, 
                  (outs IntRegs:$dst), (ins IntRegs:$b, IntRegs:$c),
-                 !strconcat(OpcStr, " $b, $c, $dst"),
+                 !strconcat(OpcStr, " $b, $c, $dst"),
                  [(set IntRegs:$dst, (OpNode IntRegs:$b, IntRegs:$c))]>;
   def ri  : F3_2 <2, Op3Val,
                  (outs IntRegs:$dst), (ins IntRegs:$b, i32imm:$c),
-                 !strconcat(OpcStr, " $b, $c, $dst"),
+                 !strconcat(OpcStr, " $b, $c, $dst"),
                  [(set IntRegs:$dst, (OpNode IntRegs:$b, simm13:$c))]>;
 }
-
-

So when the defm directive is used for the XOR and ADD -instructions, as seen below, it creates four instruction objects: XORrr, XORri, -ADDrr, and ADDri.

-
+ +

+So when the defm directive is used for the XOR +and ADD instructions, as seen below, it creates four instruction +objects: XORrr, XORri, ADDrr, and ADDri. +

+
-
defm XOR   : F3_12<"xor", 0b000011, xor>;
-defm ADD   : F3_12<"add", 0b000000, add>;
+
+defm XOR   : F3_12<"xor", 0b000011, xor>;
+defm ADD   : F3_12<"add", 0b000000, add>;
-
-

SparcInstrInfo.td -also includes definitions for condition codes that are referenced by branch -instructions. The following definitions in SparcInstrInfo.td indicate the bit location -of the SPARC condition code; for example, the 10th bit represents -the ‘greater than’ condition for integers, and the 22nd bit -represents the ‘greater than’ condition for floats.

-
+

+SparcInstrInfo.td also includes definitions for condition codes that +are referenced by branch instructions. The following definitions +in SparcInstrInfo.td indicate the bit location of the SPARC condition +code. For example, the 10th bit represents the 'greater than' +condition for integers, and the 22nd bit represents the 'greater +than' condition for floats. +

-
def ICC_NE  : ICC_VAL< 9>;  // Not Equal
+
+def ICC_NE  : ICC_VAL< 9>;  // Not Equal
 def ICC_E   : ICC_VAL< 1>;  // Equal
 def ICC_G   : ICC_VAL<10>;  // Greater
 ...
@@ -990,37 +1144,46 @@
-
-

(Note that Sparc.h -also defines enums that correspond to the same SPARC condition codes. Care must -be taken to ensure the values in Sparc.h correspond to the values in -SparcInstrInfo.td; that is, SPCC::ICC_NE = 9, SPCC::FCC_U = 23 and so on.)

+

+(Note that Sparc.h also defines enums that correspond to the same SPARC +condition codes. Care must be taken to ensure the values in Sparc.h +correspond to the values in SparcInstrInfo.td. I.e., +SPCC::ICC_NE = 9, SPCC::FCC_U = 23 and so on.) +

+
Instruction Operand Mapping
+
-

The code generator backend maps instruction operands to fields in -the instruction. Operands are assigned to unbound fields in the instruction in -the order they are defined. Fields are bound when they are assigned a value. -For example, the Sparc target defines the XNORrr instruction as a F3_1 format -instruction having three operands.

-
-
+

+The code generator backend maps instruction operands to fields in the
+instruction.  Operands are assigned to unbound fields in the instruction in the
+order they are defined. Fields are bound when they are assigned a value.  For
+example, the Sparc target defines the XNORrr instruction as
+a F3_1 format instruction having three operands.
+

+
+

+
 def XNORrr  : F3_1<2, 0b000111,
                    (outs IntRegs:$dst), (ins IntRegs:$b, IntRegs:$c),
                    "xnor $b, $c, $dst",
                    [(set IntRegs:$dst, (not (xor IntRegs:$b, IntRegs:$c)))]>;
-

-
-

-
The instruction templates in SparcInstrFormats.td show the base class for F3_1 is InstSP.

+
-
+

+The instruction templates in SparcInstrFormats.td show the base class
+for F3_1 is InstSP.
+

+
+

+
 class InstSP<dag outs, dag ins, string asmstr, list<dag> pattern> : Instruction {
   field bits<32> Inst;
   let Namespace = "SP";
@@ -1031,14 +1194,13 @@
   let AsmString   = asmstr;
   let Pattern = pattern;
 }
-

-

-

-InstSP leaves the op field unbound.
-

+
-
+
InstSP leaves the op field unbound.

+
+

+
 class F3<dag outs, dag ins, string asmstr, list<dag> pattern>
     : InstSP<outs, ins, asmstr, pattern> {
   bits<5> rd;
@@ -1049,15 +1211,17 @@
   let Inst{24-19} = op3;
   let Inst{18-14} = rs1;
 }
-

-

+
+
+

-F3 binds the op field and defines the rd, op3, and rs1 fields. F3 format instructions will -bind the operands rd, op3, and rs1 fields. +F3 binds the op field and defines the rd, +op3, and rs1 fields. F3 format instructions will +bind the operands rd, op3, and rs1 fields.

- -
+

+
 class F3_1<bits<2> opVal, bits<6> op3val, dag outs, dag ins,
            string asmstr, list<dag> pattern> : F3<outs, ins, asmstr, pattern> {
   bits<8> asi = 0; // asi not currently used
@@ -1068,16 +1232,18 @@
   let Inst{12-5} = asi;   // address space identifier
   let Inst{4-0}  = rs2;
 }
-

-

-

-F3_1 binds the op3 field and defines the rs2 fields.  F3_1 format instructions will
-bind the operands to the rd, rs1, and rs2 fields. This results in the XNORrr instruction
-binding $dst, $b, and $c operands to the rd, rs1, and rs2 fields respectively.
-

+
+

+F3_1 binds the op3 field and defines the rs2 +fields. F3_1 format instructions will bind the operands to the rd, +rs1, and rs2 fields. This results in the XNORrr +instruction binding $dst, $b, and $c operands to +the rd, rs1, and rs2 fields respectively. +

+
@@ -1086,35 +1252,43 @@
-

The final step is to hand code portions of XXXInstrInfo, which -implements the interface described in TargetInstrInfo.h. These functions return -0 or a Boolean or they assert, unless overridden. Here's a list of functions -that are overridden for the SPARC implementation in SparcInstrInfo.cpp:

+ +

+The final step is to hand code portions of XXXInstrInfo, which +implements the interface described in TargetInstrInfo.h. These +functions return 0 or a Boolean or they assert, unless +overridden. Here's a list of functions that are overridden for the SPARC +implementation in SparcInstrInfo.cpp: +

+ +
@@ -1122,43 +1296,51 @@ Branch Folding and If Conversion
-

Performance can be improved by combining instructions or by eliminating -instructions that are never reached. The AnalyzeBranch method in XXXInstrInfo may -be implemented to examine conditional instructions and remove unnecessary -instructions. AnalyzeBranch looks at the end of a machine basic block (MBB) for -opportunities for improvement, such as branch folding and if conversion. The -BranchFolder and IfConverter machine function passes (see the source files -BranchFolding.cpp and IfConversion.cpp in the lib/CodeGen directory) call + +

+Performance can be improved by combining instructions or by eliminating +instructions that are never reached. The AnalyzeBranch method +in XXXInstrInfo may be implemented to examine conditional instructions +and remove unnecessary instructions. AnalyzeBranch looks at the end of +a machine basic block (MBB) for opportunities for improvement, such as branch +folding and if conversion. The BranchFolder and IfConverter +machine function passes (see the source files BranchFolding.cpp and +IfConversion.cpp in the lib/CodeGen directory) call AnalyzeBranch to improve the control flow graph that represents the -instructions.

+instructions. +

-

Several implementations of AnalyzeBranch (for ARM, Alpha, and -X86) can be examined as models for your own AnalyzeBranch implementation. Since -SPARC does not implement a useful AnalyzeBranch, the ARM target implementation -is shown below.

+

+Several implementations of AnalyzeBranch (for ARM, Alpha, and X86) can +be examined as models for your own AnalyzeBranch implementation. Since +SPARC does not implement a useful AnalyzeBranch, the ARM target +implementation is shown below. +

AnalyzeBranch returns a Boolean value and takes four parameters:

+ -

In the simplest case, if a block ends without a branch, then it -falls through to the successor block. No destination blocks are specified for -either TBB or FBB, so both parameters return NULL. The start of the AnalyzeBranch -(see code below for the ARM target) shows the function parameters and the code -for the simplest case.

-
+

+In the simplest case, if a block ends without a branch, then it falls through to +the successor block. No destination blocks are specified for either TBB +or FBB, so both parameters return NULL. The start of +the AnalyzeBranch (see code below for the ARM target) shows the +function parameters and the code for the simplest case. +

bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
@@ -1171,28 +1353,30 @@
-
-

If a block ends with a single unconditional branch instruction, -then AnalyzeBranch (shown below) should return the destination of that branch -in the TBB parameter.

-
+

+If a block ends with a single unconditional branch instruction, then +AnalyzeBranch (shown below) should return the destination of that +branch in the TBB parameter. +

-
if (LastOpc == ARM::B || LastOpc == ARM::tB) {
-      TBB = LastInst->getOperand(0).getMBB();
-      return false;
-    }
+
+  if (LastOpc == ARM::B || LastOpc == ARM::tB) {
+    TBB = LastInst->getOperand(0).getMBB();
+    return false;
+  }
-
-

If a block ends with two unconditional branches, then the second -branch is never reached. In that situation, as shown below, remove the last -branch instruction and return the penultimate branch in the TBB parameter.

-
+

+If a block ends with two unconditional branches, then the second branch is never +reached. In that situation, as shown below, remove the last branch instruction +and return the penultimate branch in the TBB parameter. +

-
if ((SecondLastOpc == ARM::B || SecondLastOpc==ARM::tB) &&
+
+  if ((SecondLastOpc == ARM::B || SecondLastOpc==ARM::tB) &&
       (LastOpc == ARM::B || LastOpc == ARM::tB)) {
     TBB = SecondLastInst->getOperand(0).getMBB();
     I = LastInst;
@@ -1201,37 +1385,41 @@
   }
-
-

A block may end with a single conditional branch instruction that -falls through to successor block if the condition evaluates to false. In that -case, AnalyzeBranch (shown below) should return the destination of that -conditional branch in the TBB parameter and a list of operands in the Cond -parameter to evaluate the condition.

-
+ +

+A block may end with a single conditional branch instruction that falls through +to successor block if the condition evaluates to false. In that case, +AnalyzeBranch (shown below) should return the destination of that +conditional branch in the TBB parameter and a list of operands in +the Cond parameter to evaluate the condition. +

-
if (LastOpc == ARM::Bcc || LastOpc == ARM::tBcc) {
-      // Block ends with fall-through condbranch.
-      TBB = LastInst->getOperand(0).getMBB();
-      Cond.push_back(LastInst->getOperand(1));
-      Cond.push_back(LastInst->getOperand(2));
-      return false;
-    }
+
+  if (LastOpc == ARM::Bcc || LastOpc == ARM::tBcc) {
+    // Block ends with fall-through condbranch.
+    TBB = LastInst->getOperand(0).getMBB();
+    Cond.push_back(LastInst->getOperand(1));
+    Cond.push_back(LastInst->getOperand(2));
+    return false;
+  }
-
-

If a block ends with both a conditional branch and an ensuing -unconditional branch, then AnalyzeBranch (shown below) should return the -conditional branch destination (assuming it corresponds to a conditional -evaluation of ‘true’) in the TBB parameter and the unconditional branch -destination in the FBB (corresponding to a conditional evaluation of ‘false’). -A list of operands to evaluate the condition should be returned in the Cond -parameter.

-
+

+If a block ends with both a conditional branch and an ensuing unconditional +branch, then AnalyzeBranch (shown below) should return the conditional +branch destination (assuming it corresponds to a conditional evaluation of +'true') in the TBB parameter and the unconditional branch +destination in the FBB (corresponding to a conditional evaluation of +'false'). A list of operands to evaluate the condition should be +returned in the Cond parameter. +

-
unsigned SecondLastOpc = SecondLastInst->getOpcode();
+
+  unsigned SecondLastOpc = SecondLastInst->getOpcode();
+
   if ((SecondLastOpc == ARM::Bcc && LastOpc == ARM::B) ||
       (SecondLastOpc == ARM::tBcc && LastOpc == ARM::tB)) {
     TBB =  SecondLastInst->getOperand(0).getMBB();
@@ -1243,19 +1431,23 @@
-
-

For the last two cases (ending with a single conditional branch or -ending with one conditional and one unconditional branch), the operands returned -in the Cond parameter can be passed to methods of other instructions to create -new branches or perform other operations. An implementation of AnalyzeBranch -requires the helper methods RemoveBranch and InsertBranch to manage subsequent -operations.

+

+For the last two cases (ending with a single conditional branch or ending with +one conditional and one unconditional branch), the operands returned in +the Cond parameter can be passed to methods of other instructions to +create new branches or perform other operations. An implementation +of AnalyzeBranch requires the helper methods RemoveBranch +and InsertBranch to manage subsequent operations. +

-

AnalyzeBranch should return false indicating success in most circumstances. +

+AnalyzeBranch should return false indicating success in most circumstances. AnalyzeBranch should only return true when the method is stumped about what to do, for example, if a block has three terminating branches. AnalyzeBranch may return true if it encounters a terminator it cannot handle, such as an indirect -branch.

+branch. +

+
@@ -1264,75 +1456,92 @@ -
-

LLVM uses a SelectionDAG to represent LLVM IR instructions, and nodes -of the SelectionDAG ideally represent native target instructions. During code -generation, instruction selection passes are performed to convert non-native -DAG instructions into native target-specific instructions. The pass described -in XXXISelDAGToDAG.cpp is used to match patterns and perform DAG-to-DAG -instruction selection. Optionally, a pass may be defined (in -XXXBranchSelector.cpp) to perform similar DAG-to-DAG operations for branch -instructions. Later, -the code in XXXISelLowering.cpp replaces or removes operations and data types -not supported natively (legalizes) in a Selection DAG.

+
+ +

+LLVM uses a SelectionDAG to represent LLVM IR instructions, and nodes +of the SelectionDAG ideally represent native target +instructions. During code generation, instruction selection passes are performed +to convert non-native DAG instructions into native target-specific +instructions. The pass described in XXXISelDAGToDAG.cpp is used to +match patterns and perform DAG-to-DAG instruction selection. Optionally, a pass +may be defined (in XXXBranchSelector.cpp) to perform similar DAG-to-DAG +operations for branch instructions. Later, the code in +XXXISelLowering.cpp replaces or removes operations and data types not +supported natively (legalizes) in a SelectionDAG. +

+ +

+TableGen generates code for instruction selection using the following target +description input files: +

-

TableGen generates code for instruction selection using the -following target description input files:

    -
  • XXXInstrInfo.td contains definitions of instructions in a -target-specific instruction set, generates XXXGenDAGISel.inc, which is included -in XXXISelDAGToDAG.cpp.
    • - -
  • XXXCallingConv.td contains the calling and return value conventions -for the target architecture, and it generates XXXGenCallingConv.inc, which is -included in XXXISelLowering.cpp.
    • +
  • XXXInstrInfo.td — Contains definitions of instructions in a + target-specific instruction set, generates XXXGenDAGISel.inc, which + is included in XXXISelDAGToDAG.cpp.
    • + +
  • XXXCallingConv.td — Contains the calling and return value + conventions for the target architecture, and it generates + XXXGenCallingConv.inc, which is included in + XXXISelLowering.cpp.
-

The implementation of an instruction selection pass must include -a header that declares the FunctionPass class or a subclass of FunctionPass. In -XXXTargetMachine.cpp, a Pass Manager (PM) should add each instruction selection -pass into the queue of passes to run.

- -

The LLVM static -compiler (llc) is an excellent tool for visualizing the contents of DAGs. To display -the SelectionDAG before or after specific processing phases, use the command -line options for llc, described at +

+The implementation of an instruction selection pass must include a header that +declares the FunctionPass class or a subclass of FunctionPass. In +XXXTargetMachine.cpp, a Pass Manager (PM) should add each instruction +selection pass into the queue of passes to run. +

+ +

+The LLVM static compiler (llc) is an excellent tool for visualizing the +contents of DAGs. To display the SelectionDAG before or after specific +processing phases, use the command line options for llc, described +at SelectionDAG Instruction Selection Process.

-

To describe instruction selector behavior, you should add -patterns for lowering LLVM code into a SelectionDAG as the last parameter of -the instruction definitions in XXXInstrInfo.td. For example, in -SparcInstrInfo.td, this entry defines a register store operation, and the last -parameter describes a pattern with the store DAG operator.

-
+

+To describe instruction selector behavior, you should add patterns for lowering +LLVM code into a SelectionDAG as the last parameter of the instruction +definitions in XXXInstrInfo.td. For example, in +SparcInstrInfo.td, this entry defines a register store operation, and +the last parameter describes a pattern with the store DAG operator. +

-
def STrr  : F3_1< 3, 0b000100, (outs), (ins MEMrr:$addr, IntRegs:$src),
-                 "st $src, [$addr]", [(store IntRegs:$src, ADDRrr:$addr)]>;
+
+def STrr  : F3_1< 3, 0b000100, (outs), (ins MEMrr:$addr, IntRegs:$src),
+                 "st $src, [$addr]", [(store IntRegs:$src, ADDRrr:$addr)]>;
-
-

ADDRrr is a memory mode that is also defined in SparcInstrInfo.td:

-
+

+ADDRrr is a memory mode that is also defined in +SparcInstrInfo.td: +

-
def ADDRrr : ComplexPattern<i32, 2, "SelectADDRrr", [], []>;
+
+def ADDRrr : ComplexPattern<i32, 2, "SelectADDRrr", [], []>;
-
-

The definition of ADDRrr refers to SelectADDRrr, which is a function defined in an -implementation of the Instructor Selector (such as SparcISelDAGToDAG.cpp).

+

+The definition of ADDRrr refers to SelectADDRrr, which is a +function defined in an implementation of the Instructor Selector (such +as SparcISelDAGToDAG.cpp). +

-

In lib/Target/TargetSelectionDAG.td, the DAG operator for store -is defined below:

-
+

+In lib/Target/TargetSelectionDAG.td, the DAG operator for store is +defined below: +

-
def store : PatFrag<(ops node:$val, node:$ptr),
+
+def store : PatFrag<(ops node:$val, node:$ptr),
                     (st node:$val, node:$ptr), [{
   if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
     return !ST->isTruncatingStore() && 
@@ -1341,15 +1550,17 @@
 }]>;
-
-

XXXInstrInfo.td also generates (in XXXGenDAGISel.inc) the -SelectCode method that is used to call the appropriate processing method for an -instruction. In this example, SelectCode calls Select_ISD_STORE for the -ISD::STORE opcode.

-
+ +

+XXXInstrInfo.td also generates (in XXXGenDAGISel.inc) the +SelectCode method that is used to call the appropriate processing +method for an instruction. In this example, SelectCode +calls Select_ISD_STORE for the ISD::STORE opcode. +

-
SDNode *SelectCode(SDValue N) {
+
+SDNode *SelectCode(SDValue N) {
   ... 
   MVT::ValueType NVT = N.getNode()->getValueType(0);
   switch (N.getOpcode()) {
@@ -1364,22 +1575,25 @@
   ...
-
-

The pattern for STrr is matched, so elsewhere in -XXXGenDAGISel.inc, code for STrr is created for Select_ISD_STORE. The Emit_22 method -is also generated in XXXGenDAGISel.inc to complete the processing of this -instruction.

-
+ +

+The pattern for STrr is matched, so elsewhere in +XXXGenDAGISel.inc, code for STrr is created for +Select_ISD_STORE. The Emit_22 method is also generated +in XXXGenDAGISel.inc to complete the processing of this +instruction. +

-
SDNode *Select_ISD_STORE(const SDValue &N) {
+
+SDNode *Select_ISD_STORE(const SDValue &N) {
   SDValue Chain = N.getOperand(0);
   if (Predicate_store(N.getNode())) {
     SDValue N1 = N.getOperand(1);
     SDValue N2 = N.getOperand(2);
     SDValue CPTmp0;
     SDValue CPTmp1;
- 
+
     // Pattern: (st:void IntRegs:i32:$src, 
     //           ADDRrr:i32:$addr)<<P:Predicate_store>>
     // Emits: (STrr:void ADDRrr:i32:$addr, IntRegs:i32:$src)
@@ -1393,64 +1607,80 @@
+
+
The SelectionDAG Legalize Phase
+
-

The Legalize phase converts a DAG to use types and operations -that are natively supported by the target. For natively unsupported types and -operations, you need to add code to the target-specific XXXTargetLowering implementation -to convert unsupported types and operations to supported ones.

-

In the constructor for the XXXTargetLowering class, first use the -addRegisterClass method to specify which types are supports and which register -classes are associated with them. The code for the register classes are generated -by TableGen from XXXRegisterInfo.td and placed in XXXGenRegisterInfo.h.inc. For -example, the implementation of the constructor for the SparcTargetLowering -class (in SparcISelLowering.cpp) starts with the following code:

-
+

+The Legalize phase converts a DAG to use types and operations that are natively +supported by the target. For natively unsupported types and operations, you need +to add code to the target-specific XXXTargetLowering implementation to convert +unsupported types and operations to supported ones. +

+ +

+In the constructor for the XXXTargetLowering class, first use the +addRegisterClass method to specify which types are supports and which +register classes are associated with them. The code for the register classes are +generated by TableGen from XXXRegisterInfo.td and placed +in XXXGenRegisterInfo.h.inc. For example, the implementation of the +constructor for the SparcTargetLowering class (in +SparcISelLowering.cpp) starts with the following code: +

-
addRegisterClass(MVT::i32, SP::IntRegsRegisterClass);
+
+addRegisterClass(MVT::i32, SP::IntRegsRegisterClass);
 addRegisterClass(MVT::f32, SP::FPRegsRegisterClass);
 addRegisterClass(MVT::f64, SP::DFPRegsRegisterClass);
-
-

You should examine the node types in the ISD namespace -(include/llvm/CodeGen/SelectionDAGNodes.h) -and determine which operations the target natively supports. For operations -that do not have native support, add a callback to the constructor for -the XXXTargetLowering class, so the instruction selection process knows what to -do. The TargetLowering class callback methods (declared in -llvm/Target/TargetLowering.h) are:

+

+You should examine the node types in the ISD namespace +(include/llvm/CodeGen/SelectionDAGNodes.h) and determine which +operations the target natively supports. For operations that do not have +native support, add a callback to the constructor for the XXXTargetLowering +class, so the instruction selection process knows what to do. The TargetLowering +class callback methods (declared in llvm/Target/TargetLowering.h) are: +

+ -

Note: on older releases, setLoadXAction is used instead of setLoadExtAction. -Also, on older releases, setCondCodeAction may not be supported. Examine your -release to see what methods are specifically supported.

- -

These callbacks are used to determine that an operation does or -does not work with a specified type (or types). And in all cases, the third -parameter is a LegalAction type enum value: Promote, Expand, +

+Note: on older releases, setLoadXAction is used instead +of setLoadExtAction. Also, on older releases, +setCondCodeAction may not be supported. Examine your release +to see what methods are specifically supported. +

+ +

+These callbacks are used to determine that an operation does or does not work +with a specified type (or types). And in all cases, the third parameter is +a LegalAction type enum value: Promote, Expand, Custom, or Legal. SparcISelLowering.cpp -contains examples of all four LegalAction values.

+contains examples of all four LegalAction values. +

+
@@ -1459,104 +1689,133 @@
-

For an operation without native support for a given type, the -specified type may be promoted to a larger type that is supported. For example, -SPARC does not support a sign-extending load for Boolean values (i1 type), so -in SparcISelLowering.cpp the third -parameter below, Promote, changes i1 type -values to a large type before loading.

-
+ +

+For an operation without native support for a given type, the specified type may +be promoted to a larger type that is supported. For example, SPARC does not +support a sign-extending load for Boolean values (i1 type), so +in SparcISelLowering.cpp the third parameter below, Promote, +changes i1 type values to a large type before loading. +

-
setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
+
+setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
+ +
Expand
+
-

For a type without native support, a value may need to be broken -down further, rather than promoted. For an operation without native support, a -combination of other operations may be used to similar effect. In SPARC, the -floating-point sine and cosine trig operations are supported by expansion to -other operations, as indicated by the third parameter, Expand, to -setOperationAction:

-
+ +

+For a type without native support, a value may need to be broken down further, +rather than promoted. For an operation without native support, a combination of +other operations may be used to similar effect. In SPARC, the floating-point +sine and cosine trig operations are supported by expansion to other operations, +as indicated by the third parameter, Expand, to +setOperationAction: +

-
setOperationAction(ISD::FSIN, MVT::f32, Expand);
+
+setOperationAction(ISD::FSIN, MVT::f32, Expand);
 setOperationAction(ISD::FCOS, MVT::f32, Expand);
+ +
Custom
+
-

For some operations, simple type promotion or operation expansion -may be insufficient. In some cases, a special intrinsic function must be -implemented.

- -

For example, a constant value may require special treatment, or -an operation may require spilling and restoring registers in the stack and -working with register allocators.

-

As seen in SparcISelLowering.cpp code below, to perform a type +

+For some operations, simple type promotion or operation expansion may be +insufficient. In some cases, a special intrinsic function must be implemented. +

+ +

+For example, a constant value may require special treatment, or an operation may +require spilling and restoring registers in the stack and working with register +allocators. +

+ +

+As seen in SparcISelLowering.cpp code below, to perform a type conversion from a floating point value to a signed integer, first the -setOperationAction should be called with Custom as the third parameter:

-
+setOperationAction should be called with Custom as the third +parameter: +

-
setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom);
+
+setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom);
-
-

In the LowerOperation method, for each Custom operation, a case -statement should be added to indicate what function to call. In the following -code, an FP_TO_SINT opcode will call the LowerFP_TO_SINT method:

-
+ +

+In the LowerOperation method, for each Custom operation, a +case statement should be added to indicate what function to call. In the +following code, an FP_TO_SINT opcode will call +the LowerFP_TO_SINT method: +

-
SDValue SparcTargetLowering::LowerOperation(
-                               SDValue Op, SelectionDAG &DAG) {
+
+SDValue SparcTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
   switch (Op.getOpcode()) {
   case ISD::FP_TO_SINT: return LowerFP_TO_SINT(Op, DAG);
   ...
   }
 }
 

-
-
-

Finally, the LowerFP_TO_SINT method is implemented, using an FP -register to convert the floating-point value to an integer.

+

+Finally, the LowerFP_TO_SINT method is implemented, using an FP +register to convert the floating-point value to an integer. +

+
-
static SDValue LowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) {
-assert(Op.getValueType() == MVT::i32);
+
+static SDValue LowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) {
+  assert(Op.getValueType() == MVT::i32);
   Op = DAG.getNode(SPISD::FTOI, MVT::f32, Op.getOperand(0));
   return DAG.getNode(ISD::BIT_CONVERT, MVT::i32, Op);
 }
+ + +
Legal
+
-

The Legal LegalizeAction enum value simply indicates that an -operation is natively supported. Legal represents the default condition, -so it is rarely used. In SparcISelLowering.cpp, the action for CTPOP (an -operation to count the bits set in an integer) is natively supported only for -SPARC v9. The following code enables the Expand conversion technique for non-v9 -SPARC implementations.

-
+ +

+The Legal LegalizeAction enum value simply indicates that an +operation is natively supported. Legal represents the default +condition, so it is rarely used. In SparcISelLowering.cpp, the action +for CTPOP (an operation to count the bits set in an integer) is +natively supported only for SPARC v9. The following code enables +the Expand conversion technique for non-v9 SPARC implementations. +

-
setOperationAction(ISD::CTPOP, MVT::i32, Expand);
+
+setOperationAction(ISD::CTPOP, MVT::i32, Expand);
 ...
 if (TM.getSubtarget<SparcSubtarget>().isV9())
   setOperationAction(ISD::CTPOP, MVT::i32, Legal);
@@ -1568,132 +1827,157 @@
 }
+ + +
Calling Conventions
+
-

To support target-specific calling conventions, XXXGenCallingConv.td + +

+To support target-specific calling conventions, XXXGenCallingConv.td uses interfaces (such as CCIfType and CCAssignToReg) that are defined in -lib/Target/TargetCallingConv.td. TableGen can take the target descriptor file -XXXGenCallingConv.td and generate the header file XXXGenCallingConv.inc, which -is typically included in XXXISelLowering.cpp. You can use the interfaces in -TargetCallingConv.td to specify:

+lib/Target/TargetCallingConv.td. TableGen can take the target +descriptor file XXXGenCallingConv.td and generate the header +file XXXGenCallingConv.inc, which is typically included +in XXXISelLowering.cpp. You can use the interfaces in +TargetCallingConv.td to specify: +

+ -

The following example demonstrates the use of the CCIfType and -CCAssignToReg interfaces. If the CCIfType predicate is true (that is, if the -current argument is of type f32 or f64), then the action is performed. In this -case, the CCAssignToReg action assigns the argument value to the first -available register: either R0 or R1.

-
+

+The following example demonstrates the use of the CCIfType and +CCAssignToReg interfaces. If the CCIfType predicate is true +(that is, if the current argument is of type f32 or f64), then +the action is performed. In this case, the CCAssignToReg action assigns +the argument value to the first available register: either R0 +or R1. +

+
-
CCIfType<[f32,f64], CCAssignToReg<[R0, R1]>>
+
+CCIfType<[f32,f64], CCAssignToReg<[R0, R1]>>
-
-

SparcCallingConv.td contains definitions for a target-specific return-value -calling convention (RetCC_Sparc32) and a basic 32-bit C calling convention -(CC_Sparc32). The definition of RetCC_Sparc32 (shown below) indicates which -registers are used for specified scalar return types. A single-precision float -is returned to register F0, and a double-precision float goes to register D0. A -32-bit integer is returned in register I0 or I1.

-
+ +

+SparcCallingConv.td contains definitions for a target-specific +return-value calling convention (RetCC_Sparc32) and a basic 32-bit C calling +convention (CC_Sparc32). The definition of RetCC_Sparc32 +(shown below) indicates which registers are used for specified scalar return +types. A single-precision float is returned to register F0, and a +double-precision float goes to register D0. A 32-bit integer is +returned in register I0 or I1. +

-
def RetCC_Sparc32 : CallingConv<[
+
+def RetCC_Sparc32 : CallingConv<[
   CCIfType<[i32], CCAssignToReg<[I0, I1]>>,
   CCIfType<[f32], CCAssignToReg<[F0]>>,
   CCIfType<[f64], CCAssignToReg<[D0]>>
 ]>;
-
-

The definition of CC_Sparc32 in SparcCallingConv.td introduces -CCAssignToStack, which assigns the value to a stack slot with the specified size -and alignment. In the example below, the first parameter, 4, indicates the size -of the slot, and the second parameter, also 4, indicates the stack alignment -along 4-byte units. (Special cases: if size is zero, then the ABI size is used; -if alignment is zero, then the ABI alignment is used.)

-
+ +

+The definition of CC_Sparc32 in SparcCallingConv.td introduces +CCAssignToStack, which assigns the value to a stack slot with the +specified size and alignment. In the example below, the first parameter, 4, +indicates the size of the slot, and the second parameter, also 4, indicates the +stack alignment along 4-byte units. (Special cases: if size is zero, then the +ABI size is used; if alignment is zero, then the ABI alignment is used.) +

-
def CC_Sparc32 : CallingConv<[
+
+def CC_Sparc32 : CallingConv<[
   // All arguments get passed in integer registers if there is space.
   CCIfType<[i32, f32, f64], CCAssignToReg<[I0, I1, I2, I3, I4, I5]>>,
   CCAssignToStack<4, 4>
 ]>;
-
-

CCDelegateTo is another commonly used interface, which tries to find -a specified sub-calling convention and, if a match is found, it is invoked. In -the following example (in X86CallingConv.td), the definition of RetCC_X86_32_C -ends with CCDelegateTo. After the current value is assigned to the register ST0 -or ST1, the RetCC_X86Common is invoked.

-
+ +

+CCDelegateTo is another commonly used interface, which tries to find a +specified sub-calling convention, and, if a match is found, it is invoked. In +the following example (in X86CallingConv.td), the definition of +RetCC_X86_32_C ends with CCDelegateTo. After the current value +is assigned to the register ST0 or ST1, +the RetCC_X86Common is invoked. +

-
def RetCC_X86_32_C : CallingConv<[
+
+def RetCC_X86_32_C : CallingConv<[
   CCIfType<[f32], CCAssignToReg<[ST0, ST1]>>,
   CCIfType<[f64], CCAssignToReg<[ST0, ST1]>>,
   CCDelegateTo<RetCC_X86Common>
 ]>;
-
-

CCIfCC is an interface that attempts to match the given name to -the current calling convention. If the name identifies the current calling + +

+CCIfCC is an interface that attempts to match the given name to the +current calling convention. If the name identifies the current calling convention, then a specified action is invoked. In the following example (in -X86CallingConv.td), if the Fast calling convention is in use, then RetCC_X86_32_Fast -is invoked. If the SSECall calling convention is in use, then RetCC_X86_32_SSE -is invoked.

-
+X86CallingConv.td), if the Fast calling convention is in use, +then RetCC_X86_32_Fast is invoked. If the SSECall calling +convention is in use, then RetCC_X86_32_SSE is invoked. +

-
def RetCC_X86_32 : CallingConv<[
-  CCIfCC<"CallingConv::Fast", CCDelegateTo<RetCC_X86_32_Fast>>,
-  CCIfCC<"CallingConv::X86_SSECall", CCDelegateTo<RetCC_X86_32_SSE>>,
+
+def RetCC_X86_32 : CallingConv<[
+  CCIfCC<"CallingConv::Fast", CCDelegateTo<RetCC_X86_32_Fast>>,
+  CCIfCC<"CallingConv::X86_SSECall", CCDelegateTo<RetCC_X86_32_SSE>>,
   CCDelegateTo<RetCC_X86_32_C>
 ]>;
-
+

Other calling convention interfaces include:

+ +
@@ -1703,92 +1987,114 @@
-

During the code -emission stage, the code generator may utilize an LLVM pass to produce assembly -output. To do this, you want to implement the code for a printer that converts -LLVM IR to a GAS-format assembly language for your target machine, using the -following steps:

-
+

+The code in XXXTargetAsmInfo.h is usually a trivial declaration of the +XXXTargetAsmInfo class for use in XXXTargetAsmInfo.cpp. +Similarly, XXXTargetAsmInfo.cpp usually has a few declarations of +XXXTargetAsmInfo replacement values that override the default values +in TargetAsmInfo.cpp. For example in SparcTargetAsmInfo.cpp: +

-
SparcTargetAsmInfo::SparcTargetAsmInfo(const SparcTargetMachine &TM) {
-  Data16bitsDirective = "\t.half\t";
-  Data32bitsDirective = "\t.word\t";
+
+SparcTargetAsmInfo::SparcTargetAsmInfo(const SparcTargetMachine &TM) {
+  Data16bitsDirective = "\t.half\t";
+  Data32bitsDirective = "\t.word\t";
   Data64bitsDirective = 0;  // .xword is only supported by V9.
-  ZeroDirective = "\t.skip\t";
-  CommentString = "!";
-  ConstantPoolSection = "\t.section \".rodata\",#alloc\n";
+  ZeroDirective = "\t.skip\t";
+  CommentString = "!";
+  ConstantPoolSection = "\t.section \".rodata\",#alloc\n";
 }
-
-

The X86 assembly printer implementation (X86TargetAsmInfo) is an -example where the target specific TargetAsmInfo class uses overridden methods: -ExpandInlineAsm and PreferredEHDataFormat.

-

A target-specific implementation of AsmPrinter is written in -XXXAsmPrinter.cpp, which implements the AsmPrinter class that converts the LLVM -to printable assembly. The implementation must include the following headers -that have declarations for the AsmPrinter and MachineFunctionPass classes. The -MachineFunctionPass is a subclass of FunctionPass.

-
+

+The X86 assembly printer implementation (X86TargetAsmInfo) is an +example where the target specific TargetAsmInfo class uses overridden +methods: ExpandInlineAsm and PreferredEHDataFormat. +

+ +

+A target-specific implementation of AsmPrinter is written in +XXXAsmPrinter.cpp, which implements the AsmPrinter class that +converts the LLVM to printable assembly. The implementation must include the +following headers that have declarations for the AsmPrinter and +MachineFunctionPass classes. The MachineFunctionPass is a +subclass of FunctionPass. +

-
#include "llvm/CodeGen/AsmPrinter.h"
-#include "llvm/CodeGen/MachineFunctionPass.h" 
+
+#include "llvm/CodeGen/AsmPrinter.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
-
-

As a FunctionPass, AsmPrinter first calls doInitialization to set -up the AsmPrinter. In SparcAsmPrinter, a Mangler object is instantiated to -process variable names.

+

+As a FunctionPass, AsmPrinter first +calls doInitialization to set up the AsmPrinter. In +SparcAsmPrinter, a Mangler object is instantiated to process +variable names. +

+ +

+In XXXAsmPrinter.cpp, the runOnMachineFunction method +(declared in MachineFunctionPass) must be implemented +for XXXAsmPrinter. In MachineFunctionPass, +the runOnFunction method invokes runOnMachineFunction. +Target-specific implementations of runOnMachineFunction differ, but +generally do the following to process each machine function: +

-

In XXXAsmPrinter.cpp, the runOnMachineFunction method (declared -in MachineFunctionPass) must be implemented for XXXAsmPrinter. In -MachineFunctionPass, the runOnFunction method invokes runOnMachineFunction. -Target-specific implementations of runOnMachineFunction differ, but generally -do the following to process each machine function:

-

The XXXAsmPrinter implementation must also include the code -generated by TableGen that is output in the XXXGenAsmWriter.inc file. The code -in XXXGenAsmWriter.inc contains an implementation of the printInstruction -method that may call these methods:

+ +

+The XXXAsmPrinter implementation must also include the code generated +by TableGen that is output in the XXXGenAsmWriter.inc file. The code +in XXXGenAsmWriter.inc contains an implementation of the +printInstruction method that may call these methods: +

+ -

The implementations of printDeclare, printImplicitDef, -printInlineAsm, and printLabel in AsmPrinter.cpp are generally adequate for -printing assembly and do not need to be overridden. (printBasicBlockLabel is -another method that is implemented in AsmPrinter.cpp that may be directly used -in an implementation of XXXAsmPrinter.)

+

+The implementations of printDeclare, printImplicitDef, +printInlineAsm, and printLabel in AsmPrinter.cpp are +generally adequate for printing assembly and do not need to be +overridden. (printBasicBlockLabel is another method that is implemented +in AsmPrinter.cpp that may be directly used in an implementation of +XXXAsmPrinter.) +

-

The printOperand method is implemented with a long switch/case +

+The printOperand method is implemented with a long switch/case statement for the type of operand: register, immediate, basic block, external symbol, global address, constant pool index, or jump table index. For an -instruction with a memory address operand, the printMemOperand method should be -implemented to generate the proper output. Similarly, printCCOperand should be -used to print a conditional operand.

- -

doFinalization should be overridden in XXXAsmPrinter, and -it should be called to shut down the assembly printer. During doFinalization, -global variables and constants are printed to output.

+instruction with a memory address operand, the printMemOperand method +should be implemented to generate the proper output. Similarly, +printCCOperand should be used to print a conditional operand. +

+ +

doFinalization should be overridden in XXXAsmPrinter, and +it should be called to shut down the assembly printer. During +doFinalization, global variables and constants are printed to +output. +

+
+
Subtarget Support @@ -1835,33 +2150,40 @@
-

Subtarget support is used to inform the code generation process -of instruction set variations for a given chip set. For example, the LLVM -SPARC implementation provided covers three major versions of the SPARC -microprocessor architecture: Version 8 (V8, which is a 32-bit architecture), -Version 9 (V9, a 64-bit architecture), and the UltraSPARC architecture. V8 has -16 double-precision floating-point registers that are also usable as either 32 -single-precision or 8 quad-precision registers. V8 is also purely big-endian. V9 -has 32 double-precision floating-point registers that are also usable as 16 + +

+Subtarget support is used to inform the code generation process of instruction +set variations for a given chip set. For example, the LLVM SPARC implementation +provided covers three major versions of the SPARC microprocessor architecture: +Version 8 (V8, which is a 32-bit architecture), Version 9 (V9, a 64-bit +architecture), and the UltraSPARC architecture. V8 has 16 double-precision +floating-point registers that are also usable as either 32 single-precision or 8 +quad-precision registers. V8 is also purely big-endian. V9 has 32 +double-precision floating-point registers that are also usable as 16 quad-precision registers, but cannot be used as single-precision registers. The UltraSPARC architecture combines V9 with UltraSPARC Visual Instruction Set -extensions.

+extensions. +

-

If subtarget support is needed, you should implement a -target-specific XXXSubtarget class for your architecture. This class should -process the command-line options –mcpu= and –mattr=

+

+If subtarget support is needed, you should implement a target-specific +XXXSubtarget class for your architecture. This class should process the +command-line options -mcpu= and -mattr=. +

-

TableGen uses definitions in the Target.td and Sparc.td files to -generate code in SparcGenSubtarget.inc. In Target.td, shown below, the -SubtargetFeature interface is defined. The first 4 string parameters of the -SubtargetFeature interface are a feature name, an attribute set by the feature, -the value of the attribute, and a description of the feature. (The fifth -parameter is a list of features whose presence is implied, and its default -value is an empty array.)

-
+

+TableGen uses definitions in the Target.td and Sparc.td files +to generate code in SparcGenSubtarget.inc. In Target.td, shown +below, the SubtargetFeature interface is defined. The first 4 string +parameters of the SubtargetFeature interface are a feature name, an +attribute set by the feature, the value of the attribute, and a description of +the feature. (The fifth parameter is a list of features whose presence is +implied, and its default value is an empty array.) +

-
class SubtargetFeature<string n, string a,  string v, string d,
+
+class SubtargetFeature<string n, string a,  string v, string d,
                        list<SubtargetFeature> i = []> {
   string Name = n;
   string Attribute = a;
@@ -1871,60 +2193,64 @@
 }
-
-

In the Sparc.td file, the SubtargetFeature is used to define the -following features.

-
+ +

+In the Sparc.td file, the SubtargetFeature is used to define the +following features. +

-
def FeatureV9 : SubtargetFeature<"v9", "IsV9", "true",
-                     "Enable SPARC-V9 instructions">;
-def FeatureV8Deprecated : SubtargetFeature<"deprecated-v8", 
-                     "V8DeprecatedInsts", "true",
-                     "Enable deprecated V8 instructions in V9 mode">;
-def FeatureVIS : SubtargetFeature<"vis", "IsVIS", "true",
-                     "Enable UltraSPARC Visual Instruction Set extensions">;
+
+def FeatureV9 : SubtargetFeature<"v9", "IsV9", "true",
+                     "Enable SPARC-V9 instructions">;
+def FeatureV8Deprecated : SubtargetFeature<"deprecated-v8", 
+                     "V8DeprecatedInsts", "true",
+                     "Enable deprecated V8 instructions in V9 mode">;
+def FeatureVIS : SubtargetFeature<"vis", "IsVIS", "true",
+                     "Enable UltraSPARC Visual Instruction Set extensions">;
-
-

Elsewhere in Sparc.td, the Proc class is defined and then is used -to define particular SPARC processor subtypes that may have the previously -described features.

-
+

+Elsewhere in Sparc.td, the Proc class is defined and then is used to +define particular SPARC processor subtypes that may have the previously +described features. +

-
class Proc<string Name, list<SubtargetFeature> Features>
- : Processor<Name, NoItineraries, Features>;
+
+class Proc<string Name, list<SubtargetFeature> Features>
+  : Processor<Name, NoItineraries, Features>;
  
-def : Proc<"generic",         []>;
-def : Proc<"v8",              []>;
-def : Proc<"supersparc",      []>;
-def : Proc<"sparclite",       []>;
-def : Proc<"f934",            []>;
-def : Proc<"hypersparc",      []>;
-def : Proc<"sparclite86x",    []>;
-def : Proc<"sparclet",        []>;
-def : Proc<"tsc701",          []>;
-def : Proc<"v9",              [FeatureV9]>;
-def : Proc<"ultrasparc",      [FeatureV9, FeatureV8Deprecated]>;
-def : Proc<"ultrasparc3",     [FeatureV9, FeatureV8Deprecated]>;
-def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
+def : Proc<"generic",         []>;
+def : Proc<"v8",              []>;
+def : Proc<"supersparc",      []>;
+def : Proc<"sparclite",       []>;
+def : Proc<"f934",            []>;
+def : Proc<"hypersparc",      []>;
+def : Proc<"sparclite86x",    []>;
+def : Proc<"sparclet",        []>;
+def : Proc<"tsc701",          []>;
+def : Proc<"v9",              [FeatureV9]>;
+def : Proc<"ultrasparc",      [FeatureV9, FeatureV8Deprecated]>;
+def : Proc<"ultrasparc3",     [FeatureV9, FeatureV8Deprecated]>;
+def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
-
-

From Target.td and Sparc.td files, the resulting +

+From Target.td and Sparc.td files, the resulting SparcGenSubtarget.inc specifies enum values to identify the features, arrays of constants to represent the CPU features and CPU subtypes, and the ParseSubtargetFeatures method that parses the features string that sets -specified subtarget options. The generated SparcGenSubtarget.inc file should be -included in the SparcSubtarget.cpp. The target-specific implementation of the XXXSubtarget -method should follow this pseudocode:

-
+specified subtarget options. The generated SparcGenSubtarget.inc file +should be included in the SparcSubtarget.cpp. The target-specific +implementation of the XXXSubtarget method should follow this pseudocode: +

-
XXXSubtarget::XXXSubtarget(const Module &M, const std::string &FS) {
+
+XXXSubtarget::XXXSubtarget(const Module &M, const std::string &FS) {
   // Set the default features
   // Determine default and user specified characteristics of the CPU
   // Call ParseSubtargetFeatures(FS, CPU) to parse the features string
@@ -1940,54 +2266,70 @@
 
 
 

-
The implementation of a target machine optionally includes a Just-In-Time
-(JIT) code generator that emits machine code and auxiliary structures as binary
-output that can be written directly to memory. 
-To do this, implement JIT code generation by performing the following
-steps:

+
+

+The implementation of a target machine optionally includes a Just-In-Time (JIT)
+code generator that emits machine code and auxiliary structures as binary output
+that can be written directly to memory.  To do this, implement JIT code
+generation by performing the following steps:
+

+
 
    
 
  • Write an XXXCodeEmitter.cpp file that contains a machine function
-pass that transforms target-machine instructions into relocatable machine code.
    • 
+    pass that transforms target-machine instructions into relocatable machine
+    code.
 
-
  • Write an XXXJITInfo.cpp file that implements the JIT interfaces
-for target-specific code-generation
-activities, such as emitting machine code and stubs. 
    • 
+
  • Write an XXXJITInfo.cpp file that implements the JIT interfaces for
+    target-specific code-generation activities, such as emitting machine code
+    and stubs.
    • 
 
-
  • Modify XXXTargetMachine so that it provides a TargetJITInfo
-object through its getJITInfo method. 
    • 
+
  • Modify XXXTargetMachine so that it provides a
+    TargetJITInfo object through its getJITInfo method.
    • 
 

 
-
There are several different approaches to writing the JIT support
-code. For instance, TableGen and target descriptor files may be used for
-creating a JIT code generator, but are not mandatory. For the Alpha and PowerPC
-target machines, TableGen is used to generate XXXGenCodeEmitter.inc, which
+

+There are several different approaches to writing the JIT support code. For
+instance, TableGen and target descriptor files may be used for creating a JIT
+code generator, but are not mandatory. For the Alpha and PowerPC target
+machines, TableGen is used to generate XXXGenCodeEmitter.inc, which
 contains the binary coding of machine instructions and the
-getBinaryCodeForInstr method to access those codes. Other JIT implementations
-do not.

+getBinaryCodeForInstr method to access those codes. Other JIT
+implementations do not.
+

+
+

+Both XXXJITInfo.cpp and XXXCodeEmitter.cpp must include the
+llvm/CodeGen/MachineCodeEmitter.h header file that defines the
+MachineCodeEmitter class containing code for several callback functions
+that write data (in bytes, words, strings, etc.) to the output stream.
+

 
-
Both XXXJITInfo.cpp and XXXCodeEmitter.cpp must include the
-llvm/CodeGen/MachineCodeEmitter.h header file that defines the MachineCodeEmitter
-class containing code for several callback functions that write data (in bytes,
-words, strings, etc.) to the output stream.

 

+
 
 

   Machine Code Emitter
 

 
 

-
In XXXCodeEmitter.cpp, a target-specific of the Emitter class is
-implemented as a function pass (subclass of MachineFunctionPass). The
-target-specific implementation of runOnMachineFunction (invoked by
-runOnFunction in MachineFunctionPass) iterates through the MachineBasicBlock
-calls emitInstruction to process each instruction and emit binary code. emitInstruction
-is largely implemented with case statements on the instruction types defined in
-XXXInstrInfo.h. For example, in X86CodeEmitter.cpp, the emitInstruction method
-is built around the following switch/case statements:

-

+
+

+In XXXCodeEmitter.cpp, a target-specific of the Emitter class
+is implemented as a function pass (subclass
+of MachineFunctionPass). The target-specific implementation
+of runOnMachineFunction (invoked by
+runOnFunction in MachineFunctionPass) iterates through the
+MachineBasicBlock calls emitInstruction to process each
+instruction and emit binary code. emitInstruction is largely
+implemented with case statements on the instruction types defined in
+XXXInstrInfo.h. For example, in X86CodeEmitter.cpp,
+the emitInstruction method is built around the following switch/case
+statements:
+

 
 

-
switch (Desc->TSFlags & X86::FormMask) {
+
+switch (Desc->TSFlags & X86::FormMask) {
 case X86II::Pseudo:  // for not yet implemented instructions 
    ...               // or pseudo-instructions
    break;
@@ -2027,23 +2369,26 @@
 }
 

 

-

-
The implementations of these case statements often first emit the
-opcode and then get the operand(s). Then depending upon the operand, helper
-methods may be called to process the operand(s). For example, in X86CodeEmitter.cpp,
-for the X86II::AddRegFrm case, the first data emitted (by emitByte) is the
-opcode added to the register operand. Then an object representing the machine
-operand, MO1, is extracted. The helper methods such as isImmediate,
+
+

+The implementations of these case statements often first emit the opcode and
+then get the operand(s). Then depending upon the operand, helper methods may be
+called to process the operand(s). For example, in X86CodeEmitter.cpp,
+for the X86II::AddRegFrm case, the first data emitted
+(by emitByte) is the opcode added to the register operand. Then an
+object representing the machine operand, MO1, is extracted. The helper
+methods such as isImmediate,
 isGlobalAddress, isExternalSymbol, isConstantPoolIndex, and 
-isJumpTableIndex
-determine the operand type. (X86CodeEmitter.cpp also has private methods such
-as emitConstant, emitGlobalAddress, 
+isJumpTableIndex determine the operand
+type. (X86CodeEmitter.cpp also has private methods such
+as emitConstant, emitGlobalAddress,
 emitExternalSymbolAddress, emitConstPoolAddress,
-and emitJumpTableAddress that emit the data into the output stream.) 

-

+and emitJumpTableAddress that emit the data into the output stream.)
+

 
 

-
case X86II::AddRegFrm:
+
+case X86II::AddRegFrm:
   MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(CurOp++).getReg()));
   
   if (CurOp != NumOps) {
@@ -2072,75 +2417,95 @@
   break;
 

 

-

-
In the previous example, XXXCodeEmitter.cpp uses the variable rt,
-which is a RelocationType enum that may be used to relocate addresses (for
-example, a global address with a PIC base offset). The RelocationType enum for
-that target is defined in the short target-specific XXXRelocations.h file. The
-RelocationType is used by the relocate method defined in XXXJITInfo.cpp to
-rewrite addresses for referenced global symbols.

-
-
For example, X86Relocations.h specifies the following relocation
-types for the X86 addresses. In all four cases, the relocated value is added to
-the value already in memory. For reloc_pcrel_word and reloc_picrel_word, 
-there is an additional initial adjustment.

-

+
+

+In the previous example, XXXCodeEmitter.cpp uses the
+variable rt, which is a RelocationType enum that may be used to
+relocate addresses (for example, a global address with a PIC base offset). The
+RelocationType enum for that target is defined in the short
+target-specific XXXRelocations.h file. The RelocationType is used by
+the relocate method defined in XXXJITInfo.cpp to rewrite
+addresses for referenced global symbols.
+

+
+

+For example, X86Relocations.h specifies the following relocation types
+for the X86 addresses. In all four cases, the relocated value is added to the
+value already in memory. For reloc_pcrel_word
+and reloc_picrel_word, there is an additional initial adjustment.
+

 
 

-
enum RelocationType {
-  reloc_pcrel_word = 0,  // add reloc value after adjusting for the PC loc
-  reloc_picrel_word = 1, // add reloc value after adjusting for the PIC base
+
+enum RelocationType {
+  reloc_pcrel_word = 0,    // add reloc value after adjusting for the PC loc
+  reloc_picrel_word = 1,   // add reloc value after adjusting for the PIC base
   reloc_absolute_word = 2, // absolute relocation; no additional adjustment 
   reloc_absolute_dword = 3 // absolute relocation; no additional adjustment
 };
 

 

+
+
+
Target JIT Info
+
-

XXXJITInfo.cpp implements the JIT interfaces for target-specific code-generation -activities, such as emitting machine code and stubs. At minimum, -a target-specific version of XXXJITInfo implements the following:

+ +

+XXXJITInfo.cpp implements the JIT interfaces for target-specific +code-generation activities, such as emitting machine code and stubs. At minimum, +a target-specific version of XXXJITInfo implements the following: +

+
    -
  • getLazyResolverFunction – initializes the JIT, gives the -target a function that is used for compilation
    • +
  • getLazyResolverFunction — Initializes the JIT, gives the + target a function that is used for compilation.
    • -
  • emitFunctionStub – returns a native function with a -specified address for a callback function
    • +
  • emitFunctionStub — Returns a native function with a specified + address for a callback function.
    • -
  • relocate – changes the addresses of referenced globals, -based on relocation types
    • +
  • relocate — Changes the addresses of referenced globals, based + on relocation types.
    • -
  • callback function that are wrappers to a function stub that is -used when the real target is not initially known
    • +
  • Callback function that are wrappers to a function stub that is used when the + real target is not initially known.
-

getLazyResolverFunction is generally trivial to implement. It -makes the incoming parameter as the global JITCompilerFunction and returns the +

+getLazyResolverFunction is generally trivial to implement. It makes the +incoming parameter as the global JITCompilerFunction and returns the callback function that will be used a function wrapper. For the Alpha target -(in AlphaJITInfo.cpp), the getLazyResolverFunction implementation is simply:

-
+(in AlphaJITInfo.cpp), the getLazyResolverFunction +implementation is simply: +

-
TargetJITInfo::LazyResolverFn AlphaJITInfo::getLazyResolverFunction(  
-                                            JITCompilerFn F) 
-{
+
+TargetJITInfo::LazyResolverFn AlphaJITInfo::getLazyResolverFunction(  
+                                            JITCompilerFn F) {
   JITCompilerFunction = F;
   return AlphaCompilationCallback;
 }
-
-

For the X86 target, the getLazyResolverFunction implementation is -a little more complication, because it returns a different callback function -for processors with SSE instructions and XMM registers.

- -

The callback function initially saves and later restores the -callee register values, incoming arguments, and frame and return address. The -callback function needs low-level access to the registers or stack, so it is typically -implemented with assembler.

+ +

+For the X86 target, the getLazyResolverFunction implementation is a +little more complication, because it returns a different callback function for +processors with SSE instructions and XMM registers. +

+ +

+The callback function initially saves and later restores the callee register +values, incoming arguments, and frame and return address. The callback function +needs low-level access to the registers or stack, so it is typically implemented +with assembler. +

+
From isanbard at gmail.com Sat Apr 4 19:43:04 2009 From: isanbard at gmail.com (Bill Wendling) Date: Sun, 05 Apr 2009 00:43:04 -0000 Subject: [llvm-commits] [llvm] r68432 - /llvm/trunk/docs/WritingAnLLVMBackend.html Message-ID: <200904050043.n350h5jp016110@zion.cs.uiuc.edu> Author: void Date: Sat Apr 4 19:43:04 2009 New Revision: 68432 URL: http://llvm.org/viewvc/llvm-project?rev=68432&view=rev Log: Fix validation error. Modified: llvm/trunk/docs/WritingAnLLVMBackend.html Modified: llvm/trunk/docs/WritingAnLLVMBackend.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/WritingAnLLVMBackend.html?rev=68432&r1=68431&r2=68432&view=diff ============================================================================== --- llvm/trunk/docs/WritingAnLLVMBackend.html (original) +++ llvm/trunk/docs/WritingAnLLVMBackend.html Sat Apr 4 19:43:04 2009 @@ -2259,6 +2259,8 @@
+ +
JIT Support From isanbard at gmail.com Sat Apr 4 19:44:06 2009 From: isanbard at gmail.com (Bill Wendling) Date: Sun, 05 Apr 2009 00:44:06 -0000 Subject: [llvm-commits] [llvm] r68433 - /llvm/trunk/docs/WritingAnLLVMBackend.html Message-ID: <200904050044.n350i6j2016169@zion.cs.uiuc.edu> Author: void Date: Sat Apr 4 19:44:06 2009 New Revision: 68433 URL: http://llvm.org/viewvc/llvm-project?rev=68433&view=rev Log: Add character encoding declaration. Modified: llvm/trunk/docs/WritingAnLLVMBackend.html Modified: llvm/trunk/docs/WritingAnLLVMBackend.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/WritingAnLLVMBackend.html?rev=68433&r1=68432&r2=68433&view=diff ============================================================================== --- llvm/trunk/docs/WritingAnLLVMBackend.html (original) +++ llvm/trunk/docs/WritingAnLLVMBackend.html Sat Apr 4 19:44:06 2009 @@ -2,6 +2,7 @@ "http://www.w3.org/TR/html4/strict.dtd"> + Writing an LLVM Compiler Backend From foldr at codedgers.com Sun Apr 5 04:07:20 2009 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Sun, 05 Apr 2009 09:07:20 -0000 Subject: [llvm-commits] [llvm] r68438 - /llvm/trunk/include/llvm/Support/ELF.h Message-ID: <200904050907.n3597P3I010263@zion.cs.uiuc.edu> Author: foldr Date: Sun Apr 5 04:07:08 2009 New Revision: 68438 URL: http://llvm.org/viewvc/llvm-project?rev=68438&view=rev Log: Add segment flag bits to ELF.h. Modified: llvm/trunk/include/llvm/Support/ELF.h Modified: llvm/trunk/include/llvm/Support/ELF.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ELF.h?rev=68438&r1=68437&r2=68438&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/ELF.h (original) +++ llvm/trunk/include/llvm/Support/ELF.h Sun Apr 5 04:07:08 2009 @@ -280,6 +280,7 @@ Elf32_Word p_align; // Segment alignment constraint }; +// Segment types. enum { PT_NULL = 0, // Unused segment. PT_LOAD = 1, // Loadable segment. @@ -292,6 +293,14 @@ PT_HIPROC = 0x7fffffff // Highest processor-specific program hdr entry type. }; +// Segment flag bits. +enum { + PF_X = 1, // Execute + PF_W = 2, // Write + PF_R = 4, // Read + PF_MASKPROC = 0xf0000000 // Unspecified +}; + } // end namespace ELF } // end namespace llvm From espindola at google.com Sun Apr 5 04:57:53 2009 From: espindola at google.com (Rafael Espindola) Date: Sun, 5 Apr 2009 10:57:53 +0100 Subject: [llvm-commits] [llvm] r66922 - in /llvm/trunk: lib/Target/X86/X86InstrInfo.td test/CodeGen/X86/tls13.ll test/CodeGen/X86/tls14.ll In-Reply-To: <38a0d8450904030915g2e92040clb9c60b173f044c52@mail.gmail.com> References: <200903131837.n2DIb7PC008719@zion.cs.uiuc.edu> <38a0d8450903311517m60b40486wc1af6a391faa6b6f@mail.gmail.com> <01131E67-E237-482B-BBBE-843A1F6DE0D0@apple.com> <38a0d8450904021346y48f1d13ds2c23c13fca2a886a@mail.gmail.com> <6FC4BA6E-0E41-47E4-B4E1-D984E9A08B41@apple.com> <38a0d8450904030915g2e92040clb9c60b173f044c52@mail.gmail.com> Message-ID: <38a0d8450904050257t17371fb5ucb36fed305e0b8d@mail.gmail.com> I noticed I emailed an old version of the patch. The new one is attached. Cheers, -- Rafael Avila de Espindola Google | Gordon House | Barrow Street | Dublin 4 | Ireland Registered in Dublin, Ireland | Registration Number: 368047 -------------- next part -------------- A non-text attachment was scrubbed... Name: llvm-wip.patch Type: application/octet-stream Size: 42522 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090405/130d45c4/attachment.obj From isanbard at gmail.com Sun Apr 5 07:38:01 2009 From: isanbard at gmail.com (Bill Wendling) Date: Sun, 05 Apr 2009 12:38:01 -0000 Subject: [llvm-commits] [llvm] r68439 - /llvm/trunk/docs/DeveloperPolicy.html Message-ID: <200904051238.n35Cc2A6008574@zion.cs.uiuc.edu> Author: void Date: Sun Apr 5 07:37:44 2009 New Revision: 68439 URL: http://llvm.org/viewvc/llvm-project?rev=68439&view=rev Log: Obsessively format this document. Modified: llvm/trunk/docs/DeveloperPolicy.html Modified: llvm/trunk/docs/DeveloperPolicy.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/DeveloperPolicy.html?rev=68439&r1=68438&r2=68439&view=diff ============================================================================== --- llvm/trunk/docs/DeveloperPolicy.html (original) +++ llvm/trunk/docs/DeveloperPolicy.html Sun Apr 5 07:37:44 2009 @@ -37,240 +37,263 @@
Introduction
-

This document contains the LLVM Developer Policy which defines the - project's policy towards developers and their contributions. The intent of - this policy is to eliminate mis-communication, rework, and confusion that - might arise from the distributed nature of LLVM's development. By stating - the policy in clear terms, we hope each developer can know ahead of time - what to expect when making LLVM contributions.

-

This policy is also designed to accomplish the following objectives:

-
    -
  1. Attract both users and developers to the LLVM project.
    2. -
  2. Make life as simple and easy for contributors as possible.
    3. -
  3. Keep the top of Subversion trees as stable as possible.
    4. -
- -

This policy is aimed at frequent contributors to LLVM. People interested in - contributing one-off patches can do so in an informal way by sending them to - the - llvm-commits mailing list and engaging another developer to see it through - the process.

+

This document contains the LLVM Developer Policy which defines the project's + policy towards developers and their contributions. The intent of this policy + is to eliminate miscommunication, rework, and confusion that might arise from + the distributed nature of LLVM's development. By stating the policy in clear + terms, we hope each developer can know ahead of time what to expect when + making LLVM contributions.

+

This policy is also designed to accomplish the following objectives:

+ +
    +
  1. Attract both users and developers to the LLVM project.
    2. + +
  2. Make life as simple and easy for contributors as possible.
    3. + +
  3. Keep the top of Subversion trees as stable as possible.
    4. +
+

This policy is aimed at frequent contributors to LLVM. People interested in + contributing one-off patches can do so in an informal way by sending them to + the + llvm-commits + mailing list and engaging another developer to see it through the + process.

Developer Policies
-

This section contains policies that pertain to frequent LLVM - developers. We always welcome one-off patches from - people who do not routinely contribute to LLVM, but we expect more from - frequent contributors to keep the system as efficient as possible for - everyone. - Frequent LLVM contributors are expected to meet the following requirements in - order for LLVM to maintain a high standard of quality.

+

This section contains policies that pertain to frequent LLVM developers. We + always welcome one-off patches from people who do not + routinely contribute to LLVM, but we expect more from frequent contributors + to keep the system as efficient as possible for everyone. Frequent LLVM + contributors are expected to meet the following requirements in order for + LLVM to maintain a high standard of quality.

Stay Informed
-

Developers should stay informed by reading at least the - llvmdev - email list. If you are doing anything more than just casual work on LLVM, - it is suggested that you also subscribe to the - llvm-commits +

Developers should stay informed by reading at least the + llvmdev email + list. If you are doing anything more than just casual work on LLVM, it is + suggested that you also subscribe to the + llvm-commits list and pay attention to changes being made by others.

-

We recommend that active developers register an email account with - LLVM Bugzilla and preferably subscribe to - the llvm-bugs - email list to keep track of bugs and enhancements occurring in LLVM.

+ +

We recommend that active developers register an email account with + LLVM Bugzilla and preferably subscribe to + the llvm-bugs + email list to keep track of bugs and enhancements occurring in LLVM.

Making a Patch
+

When making a patch for review, the goal is to make it as easy for the + reviewer to read it as possible. As such, we recommend that you:

-

When making a patch for review, the goal is to make it as easy for the - reviewer to read it as possible. As such, we recommend that you:

-
    -
  1. Make your patch against the Subversion trunk, not a branch, and not an - old version of LLVM. This makes it easy to apply the patch.
    2. - -
  2. Similarly, patches should be submitted soon after they are generated. - Old patches may not apply correctly if the underlying code changes between - the time the patch was created and the time it is applied.
    3. +
      +
    1. Make your patch against the Subversion trunk, not a branch, and not an old + version of LLVM. This makes it easy to apply the patch.
      2. -
    2. Patches should be made with this command: - 
      svn diff -x -u
      - or with the utility utils/mkpatch, which makes it easy to read the - diff.
      3. - -
    3. Patches should not include differences in generated code such as the - code generated by autoconf or tblgen. The - utils/mkpatch utility takes care of this for you.
      4. -
    - -

    When sending a patch to a mailing list, it is a good idea to send it as an - attachment to the message, not embedded into the text of the - message. This ensures that your mailer will not mangle the patch when it - sends it (e.g. by making whitespace changes or by wrapping lines).

    - -

    For Thunderbird users: Before submitting a patch, please open - Preferences → Advanced → General → Config Editor, - find the key mail.content_disposition_type, and set its value to - 1. Without this setting, Thunderbird sends your attachment using - Content-Disposition: inline rather than Content-Disposition: - attachment. Apple Mail gamely displays such a file inline, making it - difficult to work with for reviewers using that program.

    +
  3. Similarly, patches should be submitted soon after they are generated. Old + patches may not apply correctly if the underlying code changes between the + time the patch was created and the time it is applied.
    4. + +
  4. Patches should be made with this command: +
    +
    +svn diff -x -u
+
    +
    + or with the utility utils/mkpatch, which makes it easy to read + the diff.
    5. + +
  5. Patches should not include differences in generated code such as the code + generated by autoconf or tblgen. The + utils/mkpatch utility takes care of this for you.
    6. +
+ +

When sending a patch to a mailing list, it is a good idea to send it as an + attachment to the message, not embedded into the text of the + message. This ensures that your mailer will not mangle the patch when it + sends it (e.g. by making whitespace changes or by wrapping lines).

+ +

For Thunderbird users: Before submitting a patch, please open + Preferences → Advanced → General → Config Editor, + find the key mail.content_disposition_type, and set its value to + 1. Without this setting, Thunderbird sends your attachment using + Content-Disposition: inline rather than Content-Disposition: + attachment. Apple Mail gamely displays such a file inline, making it + difficult to work with for reviewers using that program.

Code Reviews
-

LLVM has a code review policy. Code review is one way to increase the - quality of software. We generally follow these policies:

-
    -
  1. All developers are required to have significant changes reviewed - before they are committed to the repository.
    2. -
  2. Code reviews are conducted by email, usually on the llvm-commits - list.
    3. -
  3. Code can be reviewed either before it is committed or after. We expect - major changes to be reviewed before being committed, but smaller - changes (or changes where the developer owns the component) can be - reviewed after commit.
    4. -
  4. The developer responsible for a code change is also responsible for - making all necessary review-related changes.
    5. -
  5. Code review can be an iterative process, which continues until the patch - is ready to be committed.
    6. -
- -

Developers should participate in code reviews as both reviewers and - reviewees. If someone is kind enough to review your code, you should - return the favor for someone else. Note that anyone is welcome to review - and give feedback on a patch, but only people with Subversion write access - can approve it.

+

LLVM has a code review policy. Code review is one way to increase the quality + of software. We generally follow these policies:

+ +
    +
  1. All developers are required to have significant changes reviewed before + they are committed to the repository.
    2. + +
  2. Code reviews are conducted by email, usually on the llvm-commits + list.
    3. + +
  3. Code can be reviewed either before it is committed or after. We expect + major changes to be reviewed before being committed, but smaller changes + (or changes where the developer owns the component) can be reviewed after + commit.
    4. + +
  4. The developer responsible for a code change is also responsible for making + all necessary review-related changes.
    5. +
  5. Code review can be an iterative process, which continues until the patch + is ready to be committed.
    6. +
+ +

Developers should participate in code reviews as both reviewers and + reviewees. If someone is kind enough to review your code, you should return + the favor for someone else. Note that anyone is welcome to review and give + feedback on a patch, but only people with Subversion write access can approve + it.

Code Owners
-

The LLVM Project relies on two features of its process to maintain rapid - development in addition to the high quality of its source base: the - combination of code review plus post-commit review for trusted maintainers. - Having both is a great way for the project to take advantage of the fact - that most people do the right thing most of the time, and only commit - patches without pre-commit review when they are confident they are - right.

+

The LLVM Project relies on two features of its process to maintain rapid + development in addition to the high quality of its source base: the + combination of code review plus post-commit review for trusted maintainers. + Having both is a great way for the project to take advantage of the fact that + most people do the right thing most of the time, and only commit patches + without pre-commit review when they are confident they are right.

-

The trick to this is that the project has to guarantee that all patches - that are committed are reviewed after they go in: you don't want everyone - to assume someone else will review it, allowing the patch to go unreviewed. - To solve this problem, we have a notion of an 'owner' for a piece of the - code. The sole responsibility of a code owner is to ensure that a commit - to their area of the code is appropriately reviewed, either by themself or - by someone else. The current code owners are:

- -
    -
  1. Anton Korobeynikov: Exception handling, debug information, and - Windows codegen.
    2. -
  2. Duncan Sands: llvm-gcc 4.2.
    3. -
  3. Evan Cheng: Code generator and all targets.
    4. -
  4. Chris Lattner: Everything else.
    5. -
- -

Note that code ownership is completely different than reviewers: anyone can - review a piece of code, and we welcome code review from anyone who is - interested. Code owners are the "last line of defense" to guarantee that - all patches that are committed are actually reviewed.

- -

Being a code owner is a somewhat unglamorous position, but it is incredibly - important for the ongoing success of the project. Because people get busy, - interests change, and unexpected things happen, code ownership is purely - opt-in, and anyone can choose to resign their "title" at any time. For now, - we do not have an official policy on how one gets elected to be a code - owner. -

+

The trick to this is that the project has to guarantee that all patches that + are committed are reviewed after they go in: you don't want everyone to + assume someone else will review it, allowing the patch to go unreviewed. To + solve this problem, we have a notion of an 'owner' for a piece of the code. + The sole responsibility of a code owner is to ensure that a commit to their + area of the code is appropriately reviewed, either by themself or by someone + else. The current code owners are:

+ +
    +
  1. Anton Korobeynikov: Exception handling, debug information, and + Windows codegen.
    2. -
+
  • Duncan Sands: llvm-gcc 4.2.
    • +
  • Evan Cheng: Code generator and all targets.
    • + +
  • Chris Lattner: Everything else.
    • + + +

    Note that code ownership is completely different than reviewers: anyone can + review a piece of code, and we welcome code review from anyone who is + interested. Code owners are the "last line of defense" to guarantee that all + patches that are committed are actually reviewed.

    + +

    Being a code owner is a somewhat unglamorous position, but it is incredibly + important for the ongoing success of the project. Because people get busy, + interests change, and unexpected things happen, code ownership is purely + opt-in, and anyone can choose to resign their "title" at any time. For now, + we do not have an official policy on how one gets elected to be a code + owner.

    +
    Test Cases
    -

    Developers are required to create test cases for any bugs fixed and any new - features added. Some tips for getting your testcase approved:

    -
      -
    1. All feature and regression test cases are added to the - llvm/test directory. The appropriate sub-directory should be - selected (see the Testing Guide for - details).
      2. -
    2. Test cases should be written in - LLVM assembly language unless the - feature or regression being tested requires another language (e.g. the - bug being fixed or feature being implemented is in the llvm-gcc C++ - front-end, in which case it must be written in C++).
      3. -
    3. Test cases, especially for regressions, should be reduced as much as - possible, by bugpoint or - manually. It is unacceptable - to place an entire failing program into llvm/test as this creates - a time-to-test burden on all developers. Please keep them short.
      4. -
    - -

    Note that llvm/test is designed for regression and small feature tests - only. More extensive test cases (e.g., entire applications, benchmarks, - etc) should be added to the llvm-test test suite. The llvm-test - suite is for coverage (correctness, performance, etc) testing, not feature - or regression testing.

    +

    Developers are required to create test cases for any bugs fixed and any new + features added. Some tips for getting your testcase approved:

    + +
      +
    1. All feature and regression test cases are added to the + llvm/test directory. The appropriate sub-directory should be + selected (see the Testing Guide for + details).
      2. + +
    2. Test cases should be written in LLVM assembly + language unless the feature or regression being tested requires + another language (e.g. the bug being fixed or feature being implemented is + in the llvm-gcc C++ front-end, in which case it must be written in + C++).
      3. + +
    3. Test cases, especially for regressions, should be reduced as much as + possible, by bugpoint or manually. It is + unacceptable to place an entire failing program into llvm/test as + this creates a time-to-test burden on all developers. Please keep + them short.
      4. +
    + +

    Note that llvm/test is designed for regression and small feature tests + only. More extensive test cases (e.g., entire applications, benchmarks, etc) + should be added to the llvm-test test suite. The llvm-test suite is + for coverage (correctness, performance, etc) testing, not feature or + regression testing.

    Quality
    -

    The minimum quality standards that any change must satisfy before being - committed to the main development branch are:

    -
      -
    1. Code must adhere to the - LLVM Coding Standards.
      2. -
    2. Code must compile cleanly (no errors, no warnings) on at least one - platform.
      3. -
    3. Bug fixes and new features should include a - testcase so we know if the fix/feature ever regresses in the - future.
      4. -
    4. Code must pass the dejagnu (llvm/test) test suite.
      5. -
    5. The code must not cause regressions on a reasonable subset of llvm-test, - where "reasonable" depends on the contributor's judgement and the scope - of the change (more invasive changes require more testing). A reasonable - subset might be something like - "llvm-test/MultiSource/Benchmarks".
      6. -
    -

    Additionally, the committer is responsible for addressing any problems - found in the future that the change is responsible for. For example:

    - - -

    We prefer for this to be handled before submission but understand that it - isn't possible to test all of this for every submission. Our nightly - testing - infrastructure normally finds these problems. A good rule of thumb is to - check the nightly testers for regressions the day after your change.

    - -

    Commits that violate these quality standards (e.g. are very broken) may - be reverted. This is necessary when the change blocks other developers from - making progress. The developer is welcome to re-commit the change after - the problem has been fixed.

    +

    The minimum quality standards that any change must satisfy before being + committed to the main development branch are:

    + +
      +
    1. Code must adhere to the LLVM Coding + Standards.
      2. + +
    2. Code must compile cleanly (no errors, no warnings) on at least one + platform.
      3. + +
    3. Bug fixes and new features should include a + testcase so we know if the fix/feature ever regresses in the + future.
      4. + +
    4. Code must pass the dejagnu (llvm/test) test suite.
      5. + +
    5. The code must not cause regressions on a reasonable subset of llvm-test, + where "reasonable" depends on the contributor's judgement and the scope of + the change (more invasive changes require more testing). A reasonable + subset might be something like + "llvm-test/MultiSource/Benchmarks".
      6. +
    + +

    Additionally, the committer is responsible for addressing any problems found + in the future that the change is responsible for. For example:

    + + + +

    We prefer for this to be handled before submission but understand that it + isn't possible to test all of this for every submission. Our nightly testing + infrastructure normally finds these problems. A good rule of thumb is to + check the nightly testers for regressions the day after your change.

    + +

    Commits that violate these quality standards (e.g. are very broken) may be + reverted. This is necessary when the change blocks other developers from + making progress. The developer is welcome to re-commit the change after the + problem has been fixed.

    @@ -278,15 +301,17 @@ Obtaining Commit Access
    -

    -We grant commit access to contributors with a track record of submitting high -quality patches. If you would like commit access, please send an email to -Chris with the following information:

    +

    We grant commit access to contributors with a track record of submitting high + quality patches. If you would like commit access, please send an email to + Chris with the following + information:

      -
    1. The user name you want to commit with, e.g. "sabre".
      2. +
    2. The user name you want to commit with, e.g. "hacker".
      3. +
    3. The full name and email address you want message to llvm-commits to come - from, e.g. "Chris Lattner <sabre at nondot.org>".
      4. + from, e.g. "J. Random Hacker <hacker at yoyodyne.com>". +
    4. A "password hash" of the password you want to use, e.g. "2ACR96qjUqsyM". Note that you don't ever tell us what your password is, you just give it to us in an encrypted form. To get this, run "htpasswd" (a utility that @@ -307,135 +332,139 @@

      If you have recently been granted commit access, these policies apply:

        -
      1. You are granted commit-after-approval to all parts of LLVM. - To get approval, submit a patch to - - llvm-commits. When approved you may commit it yourself.
        2. +
      2. You are granted commit-after-approval to all parts of LLVM. To get + approval, submit a patch to + llvm-commits. + When approved you may commit it yourself.
        3. +
      3. You are allowed to commit patches without approval which you think are - obvious. This is clearly a subjective decision — we simply expect you - to use good judgement. Examples include: fixing build breakage, reverting - obviously broken patches, documentation/comment changes, any other minor - changes.
        4. -
      4. You are allowed to commit patches without approval to those portions - of LLVM that you have contributed or maintain (i.e., have been assigned - responsibility for), with the proviso that such commits must not break the - build. This is a "trust but verify" policy and commits of this nature are - reviewed after they are committed.
        5. -
      5. Multiple violations of these policies or a single egregious violation - may cause commit access to be revoked.
        6. + obvious. This is clearly a subjective decision — we simply expect + you to use good judgement. Examples include: fixing build breakage, + reverting obviously broken patches, documentation/comment changes, any + other minor changes. + +
      6. You are allowed to commit patches without approval to those portions of + LLVM that you have contributed or maintain (i.e., have been assigned + responsibility for), with the proviso that such commits must not break the + build. This is a "trust but verify" policy and commits of this nature are + reviewed after they are committed.
        7. + +
      7. Multiple violations of these policies or a single egregious violation may + cause commit access to be revoked.

      In any case, your changes are still subject to code -review (either before or after they are committed, depending on the nature -of the change). You are encouraged to review other peoples' patches as well, -but you aren't required to.

      - + review (either before or after they are committed, depending on the + nature of the change). You are encouraged to review other peoples' patches + as well, but you aren't required to.

    Making a Major Change
    -

    When a developer begins a major new project with the aim of contributing - it back to LLVM, s/he should inform the community with an email to - the llvmdev - email list, to the extent possible. The reason for this is to: -

      -
    1. keep the community informed about future changes to LLVM,
      2. -
    2. avoid duplication of effort by preventing multiple parties working on - the same thing and not knowing about it, and
      3. -
    3. ensure that any technical issues around the proposed work are - discussed and resolved before any significant work is done.
      4. -
    - -

    The design of LLVM is carefully controlled to ensure that all the pieces - fit together well and are as consistent as possible. If you plan to make a - major change to the way LLVM works or want to add a major new extension, it - is a good idea to get consensus with the development - community before you start working on it.

    - -

    Once the design of the new feature is finalized, the work itself should be - done as a series of incremental changes, not as - a long-term development branch.

    - +

    When a developer begins a major new project with the aim of contributing it + back to LLVM, s/he should inform the community with an email to + the llvmdev + email list, to the extent possible. The reason for this is to: + +

      +
    1. keep the community informed about future changes to LLVM,
      2. + +
    2. avoid duplication of effort by preventing multiple parties working on the + same thing and not knowing about it, and
      3. + +
    3. ensure that any technical issues around the proposed work are discussed + and resolved before any significant work is done.
      4. +
    + +

    The design of LLVM is carefully controlled to ensure that all the pieces fit + together well and are as consistent as possible. If you plan to make a major + change to the way LLVM works or want to add a major new extension, it is a + good idea to get consensus with the development community before you start + working on it.

    + +

    Once the design of the new feature is finalized, the work itself should be + done as a series of incremental changes, not as a + long-term development branch.

    Incremental Development
    -

    In the LLVM project, we do all significant changes as a series of - incremental patches. We have a strong dislike for huge changes or - long-term development branches. Long-term development branches have a - number of drawbacks:

    - -
      -
    1. Branches must have mainline merged into them periodically. If the branch - development and mainline development occur in the same pieces of code, - resolving merge conflicts can take a lot of time.
      2. -
    2. Other people in the community tend to ignore work on branches.
      3. -
    3. Huge changes (produced when a branch is merged back onto mainline) are - extremely difficult to code review.
      4. -
    4. Branches are not routinely tested by our nightly tester - infrastructure.
      5. -
    5. Changes developed as monolithic large changes often don't work until the - entire set of changes is done. Breaking it down into a set of smaller - changes increases the odds that any of the work will be committed to the - main repository.
      6. -
    - -

    - To address these problems, LLVM uses an incremental development style and we - require contributors to follow this practice when making a large/invasive - change. Some tips:

    - - + +

    If you are interested in making a large change, and this scares you, please + make sure to first discuss the change/gather consensus + then ask about the best way to go about making the change.

    Attribution of Changes
    -

    We believe in correct attribution of contributions to - their contributors. However, we do not want the source code to be littered - with random attributions "this code written by J Random Guy" (this is noisy - and distracting). In practice, the revision control system keeps a perfect - history of who changed what, and the CREDITS.txt file describes higher-level - contributions. If you commit a patch for someone else, please say "patch - contributed by J Random Guy!" in the commit message.

    +

    We believe in correct attribution of contributions to their contributors. + However, we do not want the source code to be littered with random + attributions "this code written by J. Random Hacker" (this is noisy and + distracting). In practice, the revision control system keeps a perfect + history of who changed what, and the CREDITS.txt file describes higher-level + contributions. If you commit a patch for someone else, please say "patch + contributed by J. Random Hacker!" in the commit message.

    -

    Overall, please do not add contributor names to the source code.

    +

    Overall, please do not add contributor names to the source code.

    - -
    Copyright, License, and Patents @@ -443,118 +472,113 @@
    -

    This section addresses the issues of copyright, license and patents for - the LLVM project. - Currently, the University of Illinois is the LLVM copyright holder and the - terms of its license to LLVM users and developers is the - University of - Illinois/NCSA Open Source License.

    +

    This section addresses the issues of copyright, license and patents for the + LLVM project. Currently, the University of Illinois is the LLVM copyright + holder and the terms of its license to LLVM users and developers is the + University of + Illinois/NCSA Open Source License.

    -

    NOTE: This section - deals with legal matters but does not provide legal advice. We are not - lawyers, please seek legal counsel from an attorney.

    +

    NOTE: This section deals with + legal matters but does not provide legal advice. We are not lawyers, please + seek legal counsel from an attorney.

    Copyright
    -

    -

    For consistency and ease of management, the project requires the - copyright for all LLVM software to be held by a single copyright holder: - the University of Illinois (UIUC).

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    - Although UIUC may eventually reassign the copyright of the software to another - entity (e.g. a dedicated non-profit "LLVM Organization") - the intent for the project is to always have a single entity hold the - copyrights to LLVM at any given time.

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    We believe that having a single copyright - holder is in the best interests of all developers and users as it greatly - reduces the managerial burden for any kind of administrative or technical - decisions about LLVM. The goal of the LLVM project is to always keep the code - open and licensed under a very liberal license.

    - +

    For consistency and ease of management, the project requires the copyright + for all LLVM software to be held by a single copyright holder: the University + of Illinois (UIUC).

    + +

    Although UIUC may eventually reassign the copyright of the software to + another entity (e.g. a dedicated non-profit "LLVM Organization") the intent + for the project is to always have a single entity hold the copyrights to LLVM + at any given time.

    + +

    We believe that having a single copyright holder is in the best interests of + all developers and users as it greatly reduces the managerial burden for any + kind of administrative or technical decisions about LLVM. The goal of the + LLVM project is to always keep the code open and licensed + under a very liberal license.

    License
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    We intend to keep LLVM perpetually open source - and to use a liberal open source license. The current license is the - - University of Illinois/NCSA Open Source License, which boils - down to this:

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      -
    • You can freely distribute LLVM.
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    • You must retain the copyright notice if you redistribute LLVM.
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    • Binaries derived from LLVM must reproduce the copyright notice (e.g. - in an included readme file).
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    • You can't use our names to promote your LLVM derived products.
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    We believe this fosters the widest adoption of LLVM because it allows - commercial products to be derived from LLVM with few restrictions and - without a requirement for making any derived works also open source (i.e. - LLVM's license is not a "copyleft" license like the GPL). We suggest that you - read the License - if further clarification is needed.

    - -

    Note that the LLVM Project does distribute llvm-gcc, which is GPL. - This means that anything "linked" into llvm-gcc must itself be compatible - with the GPL, and must be releasable under the terms of the GPL. This implies - that any code linked into llvm-gcc and distributed to others may be subject - to the viral aspects of the GPL (for example, a proprietary code generator - linked into llvm-gcc must be made available under the GPL). This is not a - problem for code already distributed under a more liberal license (like the - UIUC license), and does not affect code generated by llvm-gcc. It may be a - problem if you intend to base commercial development on llvm-gcc without - redistributing your source code.

    - -

    We have no plans to change the license of LLVM. If you have questions - or comments about the license, please contact the LLVM Oversight Group.

    - +

    We intend to keep LLVM perpetually open source and to use a liberal open + source license. The current license is the + University of + llinois/NCSA Open Source License, which boils down to this:

    + +
      +
    • You can freely distribute LLVM.
      • + +
    • You must retain the copyright notice if you redistribute LLVM.
      • + +
    • Binaries derived from LLVM must reproduce the copyright notice (e.g. in + an included readme file).
      • + +
    • You can't use our names to promote your LLVM derived products.
      • + +
    • There's no warranty on LLVM at all.
      • +
    + +

    We believe this fosters the widest adoption of LLVM because it allows + commercial products to be derived from LLVM with few restrictions and + without a requirement for making any derived works also open source (i.e. + LLVM's license is not a "copyleft" license like the GPL). We suggest that you + read the License + if further clarification is needed.

    + +

    Note that the LLVM Project does distribute llvm-gcc, which is GPL. + This means that anything "linked" into llvm-gcc must itself be compatible + with the GPL, and must be releasable under the terms of the GPL. This + implies that any code linked into llvm-gcc and distributed to others may + be subject to the viral aspects of the GPL (for example, a proprietary + code generator linked into llvm-gcc must be made available under the GPL). + This is not a problem for code already distributed under a more liberal + license (like the UIUC license), and does not affect code generated by + llvm-gcc. It may be a problem if you intend to base commercial development + on llvm-gcc without redistributing your source code.

    + +

    We have no plans to change the license of LLVM. If you have questions or + comments about the license, please contact the + LLVM Oversight Group.

    Patents
    -

    To the best of our knowledge, LLVM does not infringe on any patents (we have actually removed code from LLVM in the past that was found to infringe). - Having code in LLVM that infringes on patents would violate an important - goal of the project by making it hard or impossible to reuse the code for + Having code in LLVM that infringes on patents would violate an important goal + of the project by making it hard or impossible to reuse the code for arbitrary purposes (including commercial use).

    When contributing code, we expect contributors to notify us of any potential - for patent-related trouble with their changes. If you or your employer - own the rights to a - patent and would like to contribute code to LLVM that relies on it, we - require that - the copyright owner sign an agreement that allows any other user of LLVM to - freely use your patent. Please contact the oversight group for more + for patent-related trouble with their changes. If you or your employer own + the rights to a patent and would like to contribute code to LLVM that relies + on it, we require that the copyright owner sign an agreement that allows any + other user of LLVM to freely use your patent. Please contact + the oversight group for more details.

    -
    Developer Agreements
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    With regards to the LLVM copyright and licensing, developers agree to - assign their copyrights to UIUC for any contribution made so that - the entire software base can be managed by a single copyright holder. This - implies that any contributions can be licensed under the license that the - project uses.

    - -

    When contributing code, you also affirm that you are legally entitled to - grant this copyright, personally or on behalf of your employer. If the code - belongs to some other entity, please raise this issue with the oversight - group before the code is committed.

    +

    With regards to the LLVM copyright and licensing, developers agree to assign + their copyrights to UIUC for any contribution made so that the entire + software base can be managed by a single copyright holder. This implies that + any contributions can be licensed under the license that the project + uses.

    + +

    When contributing code, you also affirm that you are legally entitled to + grant this copyright, personally or on behalf of your employer. If the code + belongs to some other entity, please raise this issue with the oversight + group before the code is committed.

    From isanbard at gmail.com Sun Apr 5 07:38:50 2009 From: isanbard at gmail.com (Bill Wendling) Date: Sun, 05 Apr 2009 12:38:50 -0000 Subject: [llvm-commits] [llvm] r68440 - /llvm/trunk/docs/DeveloperPolicy.html Message-ID: <200904051238.n35CcoCl008609@zion.cs.uiuc.edu> Author: void Date: Sun Apr 5 07:38:44 2009 New Revision: 68440 URL: http://llvm.org/viewvc/llvm-project?rev=68440&view=rev Log: Add character encoding declaration to fix verification warning. Modified: llvm/trunk/docs/DeveloperPolicy.html Modified: llvm/trunk/docs/DeveloperPolicy.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/DeveloperPolicy.html?rev=68440&r1=68439&r2=68440&view=diff ============================================================================== --- llvm/trunk/docs/DeveloperPolicy.html (original) +++ llvm/trunk/docs/DeveloperPolicy.html Sun Apr 5 07:38:44 2009 @@ -2,6 +2,7 @@ "http://www.w3.org/TR/html4/strict.dtd"> + LLVM Developer Policy From espindola at google.com Sun Apr 5 07:41:41 2009 From: espindola at google.com (Rafael Espindola) Date: Sun, 5 Apr 2009 13:41:41 +0100 Subject: [llvm-commits] [llvm] r66922 - in /llvm/trunk: lib/Target/X86/X86InstrInfo.td test/CodeGen/X86/tls13.ll test/CodeGen/X86/tls14.ll In-Reply-To: <38a0d8450904030915g2e92040clb9c60b173f044c52@mail.gmail.com> References: <200903131837.n2DIb7PC008719@zion.cs.uiuc.edu> <38a0d8450903311517m60b40486wc1af6a391faa6b6f@mail.gmail.com> <01131E67-E237-482B-BBBE-843A1F6DE0D0@apple.com> <38a0d8450904021346y48f1d13ds2c23c13fca2a886a@mail.gmail.com> <6FC4BA6E-0E41-47E4-B4E1-D984E9A08B41@apple.com> <38a0d8450904030915g2e92040clb9c60b173f044c52@mail.gmail.com> Message-ID: <38a0d8450904050541r5e13b580o3a66bfa69069a455@mail.gmail.com> > I think I will try the idea of always lowering to (load gs:0) + ADDR > and then implementing some instruction folding after Select. I assume > that is possible, right? The attached patch does that. I like it a lot more. All that was needed to get performance back was a small change to MatchAddress to handle a load inside a load. The only possible issue is that now we produce movl $i at NTPOFF, %eax addl %gs:0, %eax Instead of movl %gs:0, %eax leal i at NTPOFF(%eax), %eax I don't have enough experience with X86 to know which one is best. What do you think of the current approach? Thanks, -- Rafael Avila de Espindola Google | Gordon House | Barrow Street | Dublin 4 | Ireland Registered in Dublin, Ireland | Registration Number: 368047 -------------- next part -------------- A non-text attachment was scrubbed... Name: llvm-wip.patch Type: text/x-diff Size: 40307 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090405/0ccfca56/attachment.bin